From 1a70a0538b28eea0a9de76fb5ef8a0f71aa07abd Mon Sep 17 00:00:00 2001 From: Tonymac32 Date: Fri, 5 May 2017 02:04:31 -0400 Subject: [PATCH] Reorganized rockchip patches no mingling of dts and driver patches, etc. --- .../100_miniarm_dts_RK3288_dtsi_updates.patch | 767 + .../110_rtl8723bs-v4.4.0.patch | 304748 +++++++++++++++ .../120_workaround_tinker_board_reboot.patch | 44 + .../130_Clk_RK3288_assignment_fixes.patch | 55 + 4 files changed, 305614 insertions(+) create mode 100644 patch/kernel/rockchip-default/100_miniarm_dts_RK3288_dtsi_updates.patch create mode 100644 patch/kernel/rockchip-default/110_rtl8723bs-v4.4.0.patch create mode 100644 patch/kernel/rockchip-default/120_workaround_tinker_board_reboot.patch create mode 100644 patch/kernel/rockchip-default/130_Clk_RK3288_assignment_fixes.patch diff --git a/patch/kernel/rockchip-default/100_miniarm_dts_RK3288_dtsi_updates.patch b/patch/kernel/rockchip-default/100_miniarm_dts_RK3288_dtsi_updates.patch new file mode 100644 index 000000000..8c185f275 --- /dev/null +++ b/patch/kernel/rockchip-default/100_miniarm_dts_RK3288_dtsi_updates.patch @@ -0,0 +1,767 @@ +diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts +index e1177dd..3aefd31 100644 +--- a/arch/arm/boot/dts/rk3288-miniarm.dts ++++ b/arch/arm/boot/dts/rk3288-miniarm.dts +@@ -39,16 +39,54 @@ + */ + + /dts-v1/; ++ ++#include + #include "rk3288.dtsi" ++#include + + / { + compatible = "rockchip,rk3288-miniarm", "rockchip,rk3288"; + ++ ion { ++ compatible = "rockchip,ion"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cma-heap { ++ reg = <0x78000000 0x08000000>; ++ }; ++ ++ system-heap { ++ }; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x0 0x80000000>; + }; + ++ wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default","rts_gpio"; ++ pinctrl-0 = <&uart0_rts>; ++ pinctrl-1 = <&uart0_gpios>; ++ BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>; ++ BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "8723bs"; ++ sdio_vref = <1800>; ++ WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ + ext_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; +@@ -56,6 +94,29 @@ + #clock-cells = <0>; + }; + ++ io_domains: io-domains { ++ compatible = "rockchip,rk3288-io-voltage-domain"; ++ rockchip,grf = <&grf>; ++ wifi-supply = <&vcc_18>; ++ sdcard-supply = <&vccio_sd>; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk808 RK808_CLKOUT1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 27 GPIO_ACTIVE_LOW>; ++ }; ++ + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; +@@ -84,8 +145,13 @@ + }; + + act-led { +- gpios=<&gpio2 3 GPIO_ACTIVE_LOW>; +- linux,default-trigger="mmc0"; ++ gpios = <&gpio1 0x18 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "mmc0"; ++ }; ++ ++ heartbeat-led { ++ gpios = <&gpio1 0x19 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; + }; + }; + +@@ -111,18 +177,12 @@ + regulator-boot-on; + }; + +- io_domains: io-domains { +- compatible = "rockchip,rk3288-io-voltage-domain"; +- rockchip,grf = <&grf>; +- +- sdcard-supply = <&vccio_sd>; +- }; +- + /* + * NOTE: vcc_sd isn't hooked up on v1.0 boards where power comes from + * vcc_io directly. Those boards won't be able to power cycle SD cards + * but it shouldn't hurt to toggle this pin there anyway. + */ ++ + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; +@@ -134,6 +194,13 @@ + startup-delay-us = <100000>; + vin-supply = <&vcc_io>; + }; ++ ++ vdd_log: vdd_log { ++ compatible = "regulator-fixed"; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ regulator-name = "vdd_logic"; ++ }; + }; + + &cpu0 { +@@ -167,6 +234,12 @@ + #sound-dai-cells = <0>; + ddc-i2c-bus = <&i2c5>; + status = "okay"; ++ /* Don't use vopl for HDMI */ ++ ports { ++ hdmi_in: port { ++ /delete-node/ endpoint@1; ++ }; ++ }; + }; + + &i2c0 { +@@ -180,6 +253,10 @@ + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int &global_pwroff>; ++ ++ dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>, ++ <&gpio0 12 GPIO_ACTIVE_HIGH>; ++ + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; +@@ -191,12 +268,12 @@ + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; +- vcc8-supply = <&vcc_18>; ++ vcc8-supply = <&vcc_io>; + vcc9-supply = <&vcc_io>; + vcc10-supply = <&vcc_io>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc_io>; +- vddio-supply = <&vcc18_ldo1>; ++ vddio-supply = <&vcc_io>; + + regulators { + vdd_cpu: DCDC_REG1 { +@@ -205,6 +282,7 @@ + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-name = "vdd_arm"; ++ regulator-ramp-delay = <6000>; + regulator-state-mem { + regulator-off-in-suspend; + }; +@@ -340,7 +418,6 @@ + }; + + vcc33_sd: SWITCH_REG1 { +- regulator-always-on; + regulator-boot-on; + regulator-name = "vcc33_sd"; + regulator-state-mem { +@@ -362,6 +439,20 @@ + + &i2c2 { + status = "okay"; ++ ++ eeprom:m24c08@50 { ++ compatible = "at,24c08"; ++ reg = <0x50>; ++ }; ++ ++}; ++ ++&i2c3 { ++ status = "okay"; ++}; ++ ++&i2c4 { ++ status = "okay"; + }; + + &i2c5 { +@@ -373,6 +464,24 @@ + status = "okay"; + }; + ++&sdio0 { ++ status = "okay"; ++ clock-frequency = <50000000>; ++ clock-freq-min-max = <200000 50000000>; ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ disable-wp; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; /*Look here if issue */ ++ non-removable; ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ sd-uhs-sdr104; ++ supports-sdio; ++}; ++ + &pwm0 { + status = "okay"; + }; +@@ -386,6 +495,10 @@ + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; + card-detect-delay = <200>; + disable-wp; /* wp not hooked up */ + num-slots = <1>; +@@ -393,7 +506,7 @@ + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + status = "okay"; + supports-sd; +- vmmc-supply = <&vcc_sd>; ++ vmmc-supply = <&vcc33_sd>; + vqmmc-supply = <&vccio_sd>; + }; + +@@ -404,6 +517,10 @@ + }; + + &uart0 { ++ dmas = <&dmac_peri 1>, <&dmac_peri 2>; ++ dma-names = "tx", "rx"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>; + status = "okay"; + }; + +@@ -428,6 +545,8 @@ + }; + + &usb_host0_ehci { ++ ++ no-relinquish-port; + status = "okay"; + }; + +@@ -449,13 +568,22 @@ + + &vopl { + status = "okay"; ++ /* Don't use vopl for hdmi */ ++ vopl_out: port { ++ /delete-node/ endpoint@0; ++ }; + }; + + &vopl_mmu { + status = "okay"; ++ + }; + +-&vpu { ++&hevc_service { ++ status = "okay"; ++}; ++ ++&vpu_service { + status = "okay"; + }; + +@@ -495,6 +623,23 @@ + pmic_int: pmic-int { + rockchip,pins = ; + }; ++ dvs_1: dvs-1 { ++ rockchip,pins = ; ++ }; ++ ++ dvs_2: dvs-2 { ++ rockchip,pins = ; ++ }; ++ ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ chip_enable_h: chip-enable-h { ++ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; + }; + + sdmmc { +@@ -504,9 +649,9 @@ + */ + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, +- <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, +- <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, +- <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; ++ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, ++ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, ++ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; + }; + + sdmmc_clk: sdmmc-clk { +@@ -531,4 +676,46 @@ + rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; ++ ++ wireless-bluetooth { ++ uart0_gpios: uart0-gpios { ++ rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ cam_pins { ++ cam0_default_pins:cam0_default_pins { ++ rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>,/*sensor power pin: GPIO0_C1 */ ++ <2 0 RK_FUNC_GPIO &pcfg_pull_none>,/*sensor power down pin: GPIO2_A0*/ ++ <2 11 RK_FUNC_1 &pcfg_pull_none>;/*sensor mclk: cif_clkout*/ ++ }; ++ ++ cam0_sleep_pins:cam0_sleep_pins { ++ rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>,/*sensor power pin: GPIO0_C1 */ ++ <2 0 RK_FUNC_GPIO &pcfg_pull_none>,/* cif power down pin */ ++ <2 11 RK_FUNC_GPIO &pcfg_pull_none>;/* cif_clkout */ ++ }; ++ }; ++}; ++ ++&dmc { ++ status = "okay"; ++ logic-supply = <&vdd_log>; ++ rockchip,odt-disable-freq = <666000000>; ++ rockchip,dll-disable-freq = <333000000>; ++ rockchip,sr-enable-freq = <333000000>; ++ rockchip,auto-self-refresh-cnt = <0>; ++ rockchip,auto-power-down-cnt = <64>; ++ rockchip,ddr-speed-bin = <21>; ++ rockchip,trcd = <10>; ++ rockchip,trp = <10>; ++ rockchip,pd-enable-freq = <333000000>; ++ operating-points = < ++ /* KHz uV */ ++ 200000 1000000 ++ 333000 1000000 ++ 533000 1000000 ++ >; ++ ++ #cooling-cells = <2>; /* min followed by max */ + }; +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index f65e406..8ef0393 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -94,23 +94,8 @@ + compatible = "arm,cortex-a12"; + reg = <0x500>; + resets = <&cru SRST_CORE0>; +- operating-points = < +- /* KHz uV */ +- 1608000 1350000 +- 1512000 1300000 +- 1416000 1200000 +- 1200000 1100000 +- 1008000 1050000 +- 816000 1000000 +- 696000 950000 +- 600000 900000 +- 408000 900000 +- 312000 900000 +- 216000 900000 +- 126000 900000 +- >; ++ operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; /* min followed by max */ +- clock-latency = <40000>; + clocks = <&cru ARMCLK>; + }; + cpu1: cpu@501 { +@@ -118,18 +103,83 @@ + compatible = "arm,cortex-a12"; + reg = <0x501>; + resets = <&cru SRST_CORE1>; ++ operating-points-v2 = <&cpu0_opp_table>; + }; + cpu2: cpu@502 { + device_type = "cpu"; + compatible = "arm,cortex-a12"; + reg = <0x502>; + resets = <&cru SRST_CORE2>; ++ operating-points-v2 = <&cpu0_opp_table>; + }; + cpu3: cpu@503 { + device_type = "cpu"; + compatible = "arm,cortex-a12"; + reg = <0x503>; + resets = <&cru SRST_CORE3>; ++ operating-points-v2 = <&cpu0_opp_table>; ++ }; ++ }; ++ ++ cpu0_opp_table: opp_table0 { ++ compatible = "operating-points-v2"; ++ opp-shared; ++ ++ opp@126000000 { ++ opp-hz = /bits/ 64 <126000000>; ++ opp-microvolt = <900000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp@216000000 { ++ opp-hz = /bits/ 64 <216000000>; ++ opp-microvolt = <900000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp@408000000 { ++ opp-hz = /bits/ 64 <408000000>; ++ opp-microvolt = <900000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp@600000000 { ++ opp-hz = /bits/ 64 <600000000>; ++ opp-microvolt = <900000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp@696000000 { ++ opp-hz = /bits/ 64 <696000000>; ++ opp-microvolt = <950000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp@816000000 { ++ opp-hz = /bits/ 64 <816000000>; ++ opp-microvolt = <1000000>; ++ clock-latency-ns = <40000>; ++ opp-suspend; ++ }; ++ opp@1008000000 { ++ opp-hz = /bits/ 64 <1008000000>; ++ opp-microvolt = <1050000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp@1200000000 { ++ opp-hz = /bits/ 64 <1200000000>; ++ opp-microvolt = <1100000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp@1416000000 { ++ opp-hz = /bits/ 64 <1416000000>; ++ opp-microvolt = <1200000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp@1512000000 { ++ opp-hz = /bits/ 64 <1512000000>; ++ opp-microvolt = <1300000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp@1608000000 { ++ opp-hz = /bits/ 64 <1608000000>; ++ opp-microvolt = <1350000>; ++ clock-latency-ns = <40000>; + }; + }; + +@@ -549,6 +599,26 @@ + status = "disabled"; + }; + ++ dmc: dmc@ff610000 { ++ compatible = "rockchip,rk3288-dmc", "syscon"; ++ rockchip,cru = <&cru>; ++ rockchip,grf = <&grf>; ++ rockchip,pmu = <&pmu>; ++ rockchip,sgrf = <&sgrf>; ++ rockchip,noc = <&noc>; ++ reg = <0xff610000 0x3fc ++ 0xff620000 0x294 ++ 0xff630000 0x3fc ++ 0xff640000 0x294>; ++ rockchip,sram = <&ddr_sram>; ++ clocks = <&cru PCLK_DDRUPCTL0>, <&cru PCLK_PUBL0>, ++ <&cru PCLK_DDRUPCTL1>, <&cru PCLK_PUBL1>, ++ <&cru ARMCLK>; ++ clock-names = "pclk_ddrupctl0", "pclk_publ0", ++ "pclk_ddrupctl1", "pclk_publ1", ++ "arm_clk"; ++ }; ++ + i2c0: i2c@ff650000 { + compatible = "rockchip,rk3288-i2c"; + reg = <0xff650000 0x1000>; +@@ -629,6 +699,10 @@ + compatible = "rockchip,rk3066-smp-sram"; + reg = <0x00 0x10>; + }; ++ ddr_sram: ddr-sram@1000 { ++ compatible = "rockchip,rk3288-ddr-sram"; ++ reg = <0x1000 0x4000>; ++ }; + }; + + sram@ff720000 { +@@ -636,6 +710,76 @@ + reg = <0xff720000 0x1000>; + }; + ++ qos_gpu_r: qos@ffaa0000 { ++ compatible = "syscon"; ++ reg = <0xffaa0000 0x20>; ++ }; ++ ++ qos_gpu_w: qos@ffaa0080 { ++ compatible = "syscon"; ++ reg = <0xffaa0080 0x20>; ++ }; ++ ++ qos_vio1_vop: qos@ffad0000 { ++ compatible = "syscon"; ++ reg = <0xffad0000 0x20>; ++ }; ++ ++ qos_vio1_isp_w0: qos@ffad0100 { ++ compatible = "syscon"; ++ reg = <0xffad0100 0x20>; ++ }; ++ ++ qos_vio1_isp_w1: qos@ffad0180 { ++ compatible = "syscon"; ++ reg = <0xffad0180 0x20>; ++ }; ++ ++ qos_vio0_vop: qos@ffad0400 { ++ compatible = "syscon"; ++ reg = <0xffad0400 0x20>; ++ }; ++ ++ qos_vio0_vip: qos@ffad0480 { ++ compatible = "syscon"; ++ reg = <0xffad0480 0x20>; ++ }; ++ ++ qos_vio0_iep: qos@ffad0500 { ++ compatible = "syscon"; ++ reg = <0xffad0500 0x20>; ++ }; ++ ++ qos_vio2_rga_r: qos@ffad0800 { ++ compatible = "syscon"; ++ reg = <0xffad0800 0x20>; ++ }; ++ ++ qos_vio2_rga_w: qos@ffad0880 { ++ compatible = "syscon"; ++ reg = <0xffad0880 0x20>; ++ }; ++ ++ qos_vio1_isp_r: qos@ffad0900 { ++ compatible = "syscon"; ++ reg = <0xffad0900 0x20>; ++ }; ++ ++ qos_video: qos@ffae0000 { ++ compatible = "syscon"; ++ reg = <0xffae0000 0x20>; ++ }; ++ ++ qos_hevc_r: qos@ffaf0000 { ++ compatible = "syscon"; ++ reg = <0xffaf0000 0x20>; ++ }; ++ ++ qos_hevc_w: qos@ffaf0080 { ++ compatible = "syscon"; ++ reg = <0xffaf0080 0x20>; ++ }; ++ + pmu: power-management@ff730000 { + compatible = "rockchip,rk3288-pmu", "syscon", "simple-mfd"; + reg = <0xff730000 0x100>; +@@ -696,6 +840,15 @@ + <&cru SCLK_ISP_JPE>, + <&cru SCLK_ISP>, + <&cru SCLK_RGA>; ++ pm_qos = <&qos_vio0_iep>, ++ <&qos_vio1_vop>, ++ <&qos_vio1_isp_w0>, ++ <&qos_vio1_isp_w1>, ++ <&qos_vio0_vop>, ++ <&qos_vio0_vip>, ++ <&qos_vio2_rga_r>, ++ <&qos_vio2_rga_w>, ++ <&qos_vio1_isp_r>; + }; + + /* +@@ -707,6 +860,8 @@ + clocks = <&cru ACLK_HEVC>, + <&cru SCLK_HEVC_CABAC>, + <&cru SCLK_HEVC_CORE>; ++ pm_qos = <&qos_hevc_r>, ++ <&qos_hevc_w>; + }; + + /* +@@ -718,6 +873,7 @@ + reg = ; + clocks = <&cru ACLK_VCODEC>, + <&cru HCLK_VCODEC>; ++ pm_qos = <&qos_video>; + }; + + /* +@@ -727,6 +883,8 @@ + pd_gpu { + reg = ; + clocks = <&cru ACLK_GPU>; ++ pm_qos = <&qos_gpu_r>, ++ <&qos_gpu_w>; + }; + }; + +@@ -1056,6 +1214,11 @@ + status = "disabled"; + }; + ++ noc: syscon@ffac0000 { ++ compatible = "rockchip,rk3288-noc", "syscon"; ++ reg = <0xffac0000 0x2000>; ++ }; ++ + vpu: video-codec@ff9a0000 { + compatible = "rockchip,rk3288-vpu"; + reg = <0xff9a0000 0x800>; +@@ -1071,6 +1234,26 @@ + status = "disabled"; + }; + ++ vpu_service: vpu-service@ff9a0000 { ++ compatible = "rockchip,vpu_service"; ++ reg = <0xff9a0000 0x800>; ++ interrupts = , ++ ; ++ interrupt-names = "irq_enc", "irq_dec"; ++ clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; ++ clock-names = "aclk_vcodec", "hclk_vcodec"; ++ power-domains = <&power RK3288_PD_VIDEO>; ++ rockchip,grf = <&grf>; ++ resets = <&cru SRST_VCODEC_AXI>, <&cru SRST_VCODEC_AHB>; ++ reset-names = "video_a", "video_h"; ++ iommus = <&vpu_mmu>; ++ iommu_enabled = <1>; ++ dev_mode = <0>; ++ status = "disabled"; ++ /* 0 means ion, 1 means drm */ ++ allocator = <1>; ++ }; ++ + vpu_mmu: iommu@ff9a0800 { + compatible = "rockchip,iommu"; + reg = <0xff9a0800 0x100>; +@@ -1093,6 +1276,47 @@ + interrupts = ; + }; + ++ hevc_service: hevc-service@ff9c0000 { ++ compatible = "rockchip,hevc_service"; ++ reg = <0xff9c0000 0x400>; ++ interrupts = ; ++ interrupt-names = "irq_dec"; ++ clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>, ++ <&cru SCLK_HEVC_CORE>, ++ <&cru SCLK_HEVC_CABAC>; ++ clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core", ++ "clk_cabac"; ++ /* ++ * The 4K hevc would also work well with 500/125/300/300, ++ * no more err irq and reset request. ++ */ ++ assigned-clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>, ++ <&cru SCLK_HEVC_CORE>, ++ <&cru SCLK_HEVC_CABAC>; ++ assigned-clock-rates = <400000000>, <100000000>, ++ <300000000>, <300000000>; ++ ++ resets = <&cru SRST_HEVC>; ++ reset-names = "video"; ++ power-domains = <&power RK3288_PD_HEVC>; ++ rockchip,grf = <&grf>; ++ dev_mode = <1>; ++ iommus = <&hevc_mmu>; ++ iommu_enabled = <1>; ++ status = "disabled"; ++ /* 0 means ion, 1 means drm */ ++ allocator = <1>; ++ }; ++ ++ hevc_mmu: iommu@ff9c0440 { ++ compatible = "rockchip,iommu"; ++ reg = <0xff9c0440 0x40>, <0xff9c0480 0x40>; ++ interrupts = ; ++ interrupt-names = "hevc_mmu"; ++ power-domains = <&power RK3288_PD_HEVC>; ++ #iommu-cells = <0>; ++ }; ++ + efuse: efuse@ffb40000 { + compatible = "rockchip,rockchip-efuse"; + reg = <0xffb40000 0x20>; +@@ -1703,5 +1927,21 @@ + rockchip,pins = ; + }; + }; ++ ++ cif { ++ cif_dvp_d2d9:cif-dvp-d2d9 { ++ rockchip,pins = <2 0 RK_FUNC_1 &pcfg_pull_none>,/* cif_data2 */ ++ <2 1 RK_FUNC_1 &pcfg_pull_none>,/* cif_data3 */ ++ <2 2 RK_FUNC_1 &pcfg_pull_none>,/* cif_data4 */ ++ <2 3 RK_FUNC_1 &pcfg_pull_none>,/* cif_data5 */ ++ <2 4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data6 */ ++ <2 5 RK_FUNC_1 &pcfg_pull_none>,/* cif_data7 */ ++ <2 6 RK_FUNC_1 &pcfg_pull_none>,/* cif_data8 */ ++ <2 7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data9 */ ++ <2 8 RK_FUNC_1 &pcfg_pull_none>,/* cif_vsync */ ++ <2 9 RK_FUNC_1 &pcfg_pull_none>,/* cif_href */ ++ <2 11 RK_FUNC_1 &pcfg_pull_none>;/* cif_clkin */ ++ }; ++ }; + }; + }; diff --git a/patch/kernel/rockchip-default/110_rtl8723bs-v4.4.0.patch b/patch/kernel/rockchip-default/110_rtl8723bs-v4.4.0.patch new file mode 100644 index 000000000..a8e23e975 --- /dev/null +++ b/patch/kernel/rockchip-default/110_rtl8723bs-v4.4.0.patch @@ -0,0 +1,304748 @@ +diff --git a/drivers/net/wireless/rockchip_wlan/Kconfig b/drivers/net/wireless/rockchip_wlan/Kconfig +index 097c10a..faa34f7 100644 +--- a/drivers/net/wireless/rockchip_wlan/Kconfig ++++ b/drivers/net/wireless/rockchip_wlan/Kconfig +@@ -11,6 +11,8 @@ config WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP + ---help--- + Wifi driver will be load (use late_initcall) when kernel bootup + ++ + source "drivers/net/wireless/rockchip_wlan/rkwifi/Kconfig" ++source "drivers/net/wireless/rockchip_wlan/rtl8723bs/Kconfig" + source "drivers/net/wireless/rockchip_wlan/rtl8188eu/Kconfig" + endif # WL_ROCKCHIP +diff --git a/drivers/net/wireless/rockchip_wlan/Makefile b/drivers/net/wireless/rockchip_wlan/Makefile +index 84d2725..e4b1c14 100644 +--- a/drivers/net/wireless/rockchip_wlan/Makefile ++++ b/drivers/net/wireless/rockchip_wlan/Makefile +@@ -1,3 +1,4 @@ + obj-$(CONFIG_AP6XXX) += rkwifi/ + obj-$(CONFIG_RTL8188EU) += rtl8188eu/ + obj-$(CONFIG_WL_ROCKCHIP) += wifi_sys/rkwifi_sys_iface.o ++obj-$(CONFIG_RTL8723BS) += rtl8723bs/ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile +old mode 100755 +new mode 100644 +index a836d24..4071565 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile +@@ -13,10 +13,11 @@ EXTRA_CFLAGS += -Wno-unused-label + EXTRA_CFLAGS += -Wno-unused-parameter + EXTRA_CFLAGS += -Wno-unused-function + EXTRA_CFLAGS += -Wno-unused +- + #EXTRA_CFLAGS += -Wno-uninitialized ++#EXTRA_CFLAGS += -Wno-error=date-time # Fix compile error on gcc 4.9 and later + + EXTRA_CFLAGS += -I$(src)/include ++EXTRA_CFLAGS += -I$(src)/hal/phydm + + EXTRA_LDFLAGS += --strip-debug + +@@ -24,14 +25,14 @@ CONFIG_AUTOCFG_CP = n + + ########################## WIFI IC ############################ + CONFIG_MULTIDRV = n +-CONFIG_RTL8192C = n +-CONFIG_RTL8192D = n +-CONFIG_RTL8723A = n + CONFIG_RTL8188E = n + CONFIG_RTL8812A = n + CONFIG_RTL8821A = n + CONFIG_RTL8192E = n + CONFIG_RTL8723B = y ++CONFIG_RTL8814A = n ++CONFIG_RTL8723C = n ++CONFIG_RTL8188F = n + ######################### Interface ########################### + CONFIG_USB_HCI = n + CONFIG_PCI_HCI = n +@@ -44,7 +45,6 @@ CONFIG_USB_AUTOSUSPEND = n + CONFIG_HW_PWRP_DETECTION = n + CONFIG_WIFI_TEST = n + CONFIG_BT_COEXIST = y +-CONFIG_RTL8192CU_REDEFINE_1X1 = n + CONFIG_INTEL_WIDI = n + CONFIG_WAPI_SUPPORT = n + CONFIG_EFUSE_CONFIG_FILE = n +@@ -55,20 +55,25 @@ CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY = n + CONFIG_CALIBRATE_TX_POWER_TO_MAX = n + CONFIG_RTW_ADAPTIVITY_EN = disable + CONFIG_RTW_ADAPTIVITY_MODE = normal +-CONFIG_SKIP_SIGNAL_SCALE_MAPPING = n ++CONFIG_SIGNAL_SCALE_MAPPING = n + CONFIG_80211W = n + CONFIG_REDUCE_TX_CPU_LOADING = n + CONFIG_BR_EXT = y + CONFIG_ANTENNA_DIVERSITY = n ++CONFIG_TDLS = n ++CONFIG_WIFI_MONITOR = n + ######################## Wake On Lan ########################## + CONFIG_WOWLAN = n + CONFIG_GPIO_WAKEUP = n + CONFIG_WAKEUP_GPIO_IDX = default ++CONFIG_HIGH_ACTIVE = n + CONFIG_PNO_SUPPORT = n + CONFIG_PNO_SET_DEBUG = n + CONFIG_AP_WOWLAN = n + ######### Notify SDIO Host Keep Power During Syspend ########## + CONFIG_RTW_SDIO_PM_KEEP_POWER = y ++###################### MP HW TX MODE FOR VHT ####################### ++CONFIG_MP_VHT_HW_TX_MODE = n + ###################### Platform Related ####################### + CONFIG_PLATFORM_I386_PC = y + CONFIG_PLATFORM_ANDROID_X86 = n +@@ -92,9 +97,10 @@ CONFIG_PLATFORM_TEGRA4_DALMORE = n + CONFIG_PLATFORM_ARM_TCC8900 = n + CONFIG_PLATFORM_ARM_TCC8920 = n + CONFIG_PLATFORM_ARM_TCC8920_JB42 = n ++CONFIG_PLATFORM_ARM_TCC8930_JB42 = n + CONFIG_PLATFORM_ARM_RK2818 = n + CONFIG_PLATFORM_ARM_RK3066 = n +-CONFIG_PLATFORM_ARM_RK3188 = y ++CONFIG_PLATFORM_ARM_RK3188 = n + CONFIG_PLATFORM_ARM_URBETTER = n + CONFIG_PLATFORM_ARM_TI_PANDA = n + CONFIG_PLATFORM_MIPS_JZ4760 = n +@@ -105,9 +111,12 @@ CONFIG_PLATFORM_SZEBOOK = n + CONFIG_PLATFORM_ARM_SUNxI = n + CONFIG_PLATFORM_ARM_SUN6I = n + CONFIG_PLATFORM_ARM_SUN7I = n +-CONFIG_PLATFORM_ARM_SUN8I = n ++CONFIG_PLATFORM_ARM_SUN8I_W3P1 = n ++CONFIG_PLATFORM_ARM_SUN8I_W5P1 = n + CONFIG_PLATFORM_ACTIONS_ATM702X = n + CONFIG_PLATFORM_ACTIONS_ATV5201 = n ++CONFIG_PLATFORM_ACTIONS_ATM705X = n ++CONFIG_PLATFORM_ARM_SUN50IW1P1 = n + CONFIG_PLATFORM_ARM_RTD299X = n + CONFIG_PLATFORM_ARM_SPREADTRUM_6820 = n + CONFIG_PLATFORM_ARM_SPREADTRUM_8810 = n +@@ -115,6 +124,8 @@ CONFIG_PLATFORM_ARM_WMT = n + CONFIG_PLATFORM_TI_DM365 = n + CONFIG_PLATFORM_MOZART = n + CONFIG_PLATFORM_RTK119X = n ++CONFIG_PLATFORM_NOVATEK_NT72668 = n ++CONFIG_PLATFORM_HISILICON = n + ############################################################### + + CONFIG_DRVEXT_MODULE = n +@@ -153,6 +164,10 @@ _OS_INTFS_FILES := os_dep/osdep_service.o \ + os_dep/linux/rtw_android.o \ + os_dep/linux/rtw_proc.o + ++ifeq ($(CONFIG_MP_INCLUDED), y) ++_OS_INTFS_FILES += os_dep/linux/ioctl_mp.o ++endif ++ + ifeq ($(CONFIG_SDIO_HCI), y) + _OS_INTFS_FILES += os_dep/linux/custom_gpio_linux.o + _OS_INTFS_FILES += os_dep/linux/$(HCI_NAME)_ops_linux.o +@@ -170,62 +185,77 @@ _HAL_INTFS_FILES := hal/hal_intf.o \ + hal/hal_phy.o \ + hal/hal_dm.o \ + hal/hal_btcoex.o \ ++ hal/hal_mp.o \ + hal/hal_hci/hal_$(HCI_NAME).o \ + hal/led/hal_$(HCI_NAME)_led.o + +-_OUTSRC_FILES := hal/OUTSRC/phydm_debug.o \ +- hal/OUTSRC/phydm_AntDiv.o\ +- hal/OUTSRC/phydm_interface.o\ +- hal/OUTSRC/phydm_HWConfig.o\ +- hal/OUTSRC/phydm.o\ +- hal/OUTSRC/HalPhyRf.o\ +- hal/OUTSRC/phydm_EdcaTurboCheck.o\ +- hal/OUTSRC/phydm_DIG.o\ +- hal/OUTSRC/phydm_PathDiv.o\ +- hal/OUTSRC/phydm_RaInfo.o\ +- hal/OUTSRC/phydm_DynamicBBPowerSaving.o\ +- hal/OUTSRC/phydm_PowerTracking.o\ +- hal/OUTSRC/phydm_DynamicTxPower.o\ +- hal/OUTSRC/PhyDM_Adaptivity.o\ +- hal/OUTSRC/phydm_CfoTracking.o\ +- hal/OUTSRC/phydm_NoiseMonitor.o\ +- hal/OUTSRC/phydm_ACS.o ++ ++_OUTSRC_FILES := hal/phydm/phydm_debug.o \ ++ hal/phydm/phydm_antdiv.o\ ++ hal/phydm/phydm_antdect.o\ ++ hal/phydm/phydm_interface.o\ ++ hal/phydm/phydm_hwconfig.o\ ++ hal/phydm/phydm.o\ ++ hal/phydm/halphyrf_ce.o\ ++ hal/phydm/phydm_edcaturbocheck.o\ ++ hal/phydm/phydm_dig.o\ ++ hal/phydm/phydm_pathdiv.o\ ++ hal/phydm/phydm_rainfo.o\ ++ hal/phydm/phydm_dynamicbbpowersaving.o\ ++ hal/phydm/phydm_powertracking_ce.o\ ++ hal/phydm/phydm_dynamictxpower.o\ ++ hal/phydm/phydm_adaptivity.o\ ++ hal/phydm/phydm_cfotracking.o\ ++ hal/phydm/phydm_noisemonitor.o\ ++ hal/phydm/phydm_acs.o\ ++ hal/phydm/phydm_beamforming.o\ ++ hal/phydm/txbf/halcomtxbf.o\ ++ hal/phydm/txbf/haltxbfinterface.o ++ + + EXTRA_CFLAGS += -I$(src)/platform + _PLATFORM_FILES := platform/platform_ops.o + + ifeq ($(CONFIG_BT_COEXIST), y) +-EXTRA_CFLAGS += -I$(src)/hal/OUTSRC-BTCoexist +-_OUTSRC_FILES += hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.o \ +- hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.o +-endif +- +-########### HAL_RTL8192C ################################# +- +-ifeq ($(CONFIG_RTL8192C), y) +-RTL871X = rtl8192c ++EXTRA_CFLAGS += -I$(src)/hal/btc ++_OUTSRC_FILES += hal/btc/HalBtc8192e1Ant.o \ ++ hal/btc/HalBtc8192e2Ant.o \ ++ hal/btc/HalBtc8723b1Ant.o \ ++ hal/btc/HalBtc8723b2Ant.o \ ++ hal/btc/HalBtc8812a1Ant.o \ ++ hal/btc/HalBtc8812a2Ant.o \ ++ hal/btc/HalBtc8821a1Ant.o \ ++ hal/btc/HalBtc8821a2Ant.o \ ++ hal/btc/HalBtc8821aCsr2Ant.o \ ++ hal/btc/HalBtc8703b1Ant.o ++endif ++ ++ ++########### HAL_RTL8188E ################################# ++ifeq ($(CONFIG_RTL8188E), y) ++ ++RTL871X = rtl8188e ++ifeq ($(CONFIG_SDIO_HCI), y) ++MODULE_NAME = 8189es ++endif ++ ++ifeq ($(CONFIG_GSPI_HCI), y) ++MODULE_NAME = 8189es ++endif ++ + ifeq ($(CONFIG_USB_HCI), y) +-MODULE_NAME = 8192cu ++MODULE_NAME = 8188eu + endif ++ + ifeq ($(CONFIG_PCI_HCI), y) +-MODULE_NAME = 8192ce ++MODULE_NAME = 8188ee + endif +-EXTRA_CFLAGS += -DCONFIG_RTL8192C ++EXTRA_CFLAGS += -DCONFIG_RTL8188E + +-_HAL_INTFS_FILES += \ +- hal/$(RTL871X)/$(RTL871X)_sreset.o \ +- hal/$(RTL871X)/$(RTL871X)_xmit.o ++_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ ++ hal/$(RTL871X)/Hal8188EPwrSeq.o\ ++ hal/$(RTL871X)/$(RTL871X)_xmit.o\ ++ hal/$(RTL871X)/$(RTL871X)_sreset.o + + _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(RTL871X)_phycfg.o \ +@@ -238,43 +268,59 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o + ++ifeq ($(CONFIG_SDIO_HCI), y) ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o ++else ++ifeq ($(CONFIG_GSPI_HCI), y) ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o ++else + _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o +- +- +-ifeq ($(CONFIG_MP_INCLUDED), y) +-_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o + endif +- +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/phydm_RTL8192C.o\ +- hal/OUTSRC/$(RTL871X)/HalDMOutSrc8192C_CE.o ++endif + + ifeq ($(CONFIG_USB_HCI), y) +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8192CUFWImg_CE.o \ +- hal/OUTSRC/$(RTL871X)/Hal8192CUPHYImg_CE.o \ +- hal/OUTSRC/$(RTL871X)/Hal8192CUMACImg_CE.o ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_USB.o + endif +- + ifeq ($(CONFIG_PCI_HCI), y) +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8192CEFWImg_CE.o \ +- hal/OUTSRC/$(RTL871X)/Hal8192CEPHYImg_CE.o \ +- hal/OUTSRC/$(RTL871X)/Hal8192CEMACImg_CE.o ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_PCIE.o + endif ++ifeq ($(CONFIG_SDIO_HCI), y) ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_SDIO.o ++endif ++ ++#hal/OUTSRC/$(RTL871X)/Hal8188EFWImg_CE.o ++_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8188e_mac.o\ ++ hal/phydm/$(RTL871X)/halhwimg8188e_bb.o\ ++ hal/phydm/$(RTL871X)/halhwimg8188e_rf.o\ ++ hal/phydm/$(RTL871X)/halhwimg8188e_t_fw.o\ ++ hal/phydm/$(RTL871X)/halhwimg8188e_s_fw.o\ ++ hal/phydm/$(RTL871X)/halphyrf_8188e_ce.o\ ++ hal/phydm/$(RTL871X)/phydm_regconfig8188e.o\ ++ hal/phydm/$(RTL871X)/hal8188erateadaptive.o\ ++ hal/phydm/$(RTL871X)/phydm_rtl8188e.o + + endif + +-########### HAL_RTL8192D ################################# +-ifeq ($(CONFIG_RTL8192D), y) +-RTL871X = rtl8192d ++########### HAL_RTL8192E ################################# ++ifeq ($(CONFIG_RTL8192E), y) ++ ++RTL871X = rtl8192e ++ifeq ($(CONFIG_SDIO_HCI), y) ++MODULE_NAME = 8192es ++endif ++ + ifeq ($(CONFIG_USB_HCI), y) +-MODULE_NAME = 8192du ++MODULE_NAME = 8192eu + endif ++ + ifeq ($(CONFIG_PCI_HCI), y) +-MODULE_NAME = 8192de ++MODULE_NAME = 8192ee + endif +-EXTRA_CFLAGS += -DCONFIG_RTL8192D +- +-_HAL_INTFS_FILES += \ +- hal/$(RTL871X)/$(RTL871X)_xmit.o ++EXTRA_CFLAGS += -DCONFIG_RTL8192E ++_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ ++ hal/$(RTL871X)/Hal8192EPwrSeq.o\ ++ hal/$(RTL871X)/$(RTL871X)_xmit.o\ ++ hal/$(RTL871X)/$(RTL871X)_sreset.o + + _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(RTL871X)_phycfg.o \ +@@ -287,52 +333,54 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o + ++ifeq ($(CONFIG_SDIO_HCI), y) ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o ++else ++ifeq ($(CONFIG_GSPI_HCI), y) ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o ++else + _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o +- +-ifeq ($(CONFIG_MP_INCLUDED), y) +-_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o + endif +- +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/phydm_RTL8192D.o\ +- hal/OUTSRC/$(RTL871X)/HalDMOutSrc8192D_CE.o +- ++endif + + ifeq ($(CONFIG_USB_HCI), y) +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8192DUFWImg_CE.o \ +- hal/OUTSRC/$(RTL871X)/Hal8192DUPHYImg_CE.o \ +- hal/OUTSRC/$(RTL871X)/Hal8192DUMACImg_CE.o ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8192E_USB.o + endif +- + ifeq ($(CONFIG_PCI_HCI), y) +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8192DEFWImg_CE.o \ +- hal/OUTSRC/$(RTL871X)/Hal8192DEPHYImg_CE.o \ +- hal/OUTSRC/$(RTL871X)/Hal8192DEMACImg_CE.o ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8192E_PCIE.o + endif + ++#hal/OUTSRC/$(RTL871X)/HalHWImg8188E_FW.o ++_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8192e_mac.o\ ++ hal/phydm/$(RTL871X)/halhwimg8192e_bb.o\ ++ hal/phydm/$(RTL871X)/halhwimg8192e_rf.o\ ++ hal/phydm/$(RTL871X)/halhwimg8192e_fw.o\ ++ hal/phydm/$(RTL871X)/halphyrf_8192e_ce.o\ ++ hal/phydm/$(RTL871X)/phydm_regconfig8192e.o\ ++ hal/phydm/$(RTL871X)/phydm_rtl8192e.o ++ + endif + +-########### HAL_RTL8723A ################################# +-ifeq ($(CONFIG_RTL8723A), y) ++########### HAL_RTL8812A_RTL8821A ################################# + +-RTL871X = rtl8723a +-ifeq ($(CONFIG_GSPI_HCI), y) +-MODULE_NAME = 8723as +-endif +-ifeq ($(CONFIG_SDIO_HCI), y) +-MODULE_NAME = 8723as +-endif ++ifneq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A), n_n) ++ ++RTL871X = rtl8812a + ifeq ($(CONFIG_USB_HCI), y) +-MODULE_NAME = 8723au ++MODULE_NAME = 8812au + endif + ifeq ($(CONFIG_PCI_HCI), y) +-MODULE_NAME = 8723ae ++MODULE_NAME = 8812ae ++endif ++ifeq ($(CONFIG_SDIO_HCI), y) ++MODULE_NAME = 8812as + endif +-EXTRA_CFLAGS += -DCONFIG_RTL8723A + +-_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ +- hal/$(RTL871X)/Hal8723PwrSeq.o\ +- hal/$(RTL871X)/$(RTL871X)_xmit.o \ +- hal/$(RTL871X)/$(RTL871X)_sreset.o ++_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ ++ hal/$(RTL871X)/Hal8812PwrSeq.o \ ++ hal/$(RTL871X)/Hal8821APwrSeq.o\ ++ hal/$(RTL871X)/$(RTL871X)_xmit.o\ ++ hal/$(RTL871X)/$(RTL871X)_sreset.o + + _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(RTL871X)_phycfg.o \ +@@ -355,62 +403,90 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o + endif + endif + +-ifeq ($(CONFIG_MP_INCLUDED), y) +-_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o ++ifeq ($(CONFIG_RTL8812A), y) ++ifeq ($(CONFIG_USB_HCI), y) ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8812A_USB.o + endif +- +-ifeq ($(CONFIG_GSPI_HCI), y) +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8723SHWImg_CE.o ++ifeq ($(CONFIG_PCI_HCI), y) ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8812A_PCIE.o + endif +- +-ifeq ($(CONFIG_SDIO_HCI), y) +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8723SHWImg_CE.o + endif +- ++ifeq ($(CONFIG_RTL8821A), y) + ifeq ($(CONFIG_USB_HCI), y) +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8723UHWImg_CE.o ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8821A_USB.o + endif +- + ifeq ($(CONFIG_PCI_HCI), y) +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8723EHWImg_CE.o ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8821A_PCIE.o ++endif + endif + +-#hal/OUTSRC/$(RTL871X)/HalHWImg8723A_FW.o +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8723A_BB.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8723A_MAC.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8723A_RF.o\ +- hal/OUTSRC/$(RTL871X)/phydm_RegConfig8723A.o ++ifeq ($(CONFIG_RTL8812A), y) ++EXTRA_CFLAGS += -DCONFIG_RTL8812A ++_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8812a_fw.o\ ++ hal/phydm/$(RTL871X)/halhwimg8812a_mac.o\ ++ hal/phydm/$(RTL871X)/halhwimg8812a_bb.o\ ++ hal/phydm/$(RTL871X)/halhwimg8812a_rf.o\ ++ hal/phydm/$(RTL871X)/halphyrf_8812a_ce.o\ ++ hal/phydm/$(RTL871X)/phydm_regconfig8812a.o\ ++ hal/phydm/$(RTL871X)/phydm_rtl8812a.o\ ++ hal/phydm/txbf/haltxbfjaguar.o ++endif + +-_OUTSRC_FILES += hal/OUTSRC/rtl8192c/HalDMOutSrc8192C_CE.o ++ifeq ($(CONFIG_RTL8821A), y) + ++ifeq ($(CONFIG_RTL8812A), n) + ++RTL871X = rtl8821a ++ifeq ($(CONFIG_USB_HCI), y) ++ifeq ($(CONFIG_BT_COEXIST), y) ++MODULE_NAME := 8821au ++else ++MODULE_NAME := 8811au ++endif ++endif ++ifeq ($(CONFIG_PCI_HCI), y) ++MODULE_NAME := 8821ae ++endif ++ifeq ($(CONFIG_SDIO_HCI), y) ++MODULE_NAME := 8821as + endif + ++endif + +-########### HAL_RTL8188E ################################# +-ifeq ($(CONFIG_RTL8188E), y) +- +-RTL871X = rtl8188e +-ifeq ($(CONFIG_SDIO_HCI), y) +-MODULE_NAME = 8189es ++EXTRA_CFLAGS += -DCONFIG_RTL8821A ++_OUTSRC_FILES += hal/phydm/rtl8821a/halhwimg8821a_fw.o\ ++ hal/phydm/rtl8821a/halhwimg8821a_mac.o\ ++ hal/phydm/rtl8821a/halhwimg8821a_bb.o\ ++ hal/phydm/rtl8821a/halhwimg8821a_rf.o\ ++ hal/phydm/rtl8812a/halphyrf_8812a_ce.o\ ++ hal/phydm/rtl8821a/halphyrf_8821a_ce.o\ ++ hal/phydm/rtl8821a/phydm_regconfig8821a.o\ ++ hal/phydm/rtl8821a/phydm_rtl8821a.o\ ++ hal/phydm/rtl8821a/phydm_iqk_8821a_ce.o\ ++ hal/phydm/txbf/haltxbfjaguar.o ++ + endif + +-ifeq ($(CONFIG_GSPI_HCI), y) +-MODULE_NAME = 8189es + endif + ++########### HAL_RTL8723B ################################# ++ifeq ($(CONFIG_RTL8723B), y) ++ ++RTL871X = rtl8723b + ifeq ($(CONFIG_USB_HCI), y) +-MODULE_NAME = 8188eu ++MODULE_NAME = 8723bu + endif +- + ifeq ($(CONFIG_PCI_HCI), y) +-MODULE_NAME = 8188ee ++MODULE_NAME = 8723be ++endif ++ifeq ($(CONFIG_SDIO_HCI), y) ++MODULE_NAME = 8723bs + endif +-EXTRA_CFLAGS += -DCONFIG_RTL8188E + +-_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ +- hal/$(RTL871X)/Hal8188EPwrSeq.o\ +- hal/$(RTL871X)/$(RTL871X)_xmit.o\ ++EXTRA_CFLAGS += -DCONFIG_RTL8723B ++ ++_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ ++ hal/$(RTL871X)/Hal8723BPwrSeq.o\ + hal/$(RTL871X)/$(RTL871X)_sreset.o + + _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ +@@ -419,55 +495,59 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(RTL871X)_dm.o \ + hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ + hal/$(RTL871X)/$(RTL871X)_cmd.o \ ++ ++ ++_HAL_INTFS_FILES += \ + hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o + +-ifeq ($(CONFIG_SDIO_HCI), y) +-_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o ++ifeq ($(CONFIG_PCI_HCI), y) ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o + else +-ifeq ($(CONFIG_GSPI_HCI), y) + _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o +-else +-_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o +-endif + endif + +-ifeq ($(CONFIG_MP_INCLUDED), y) +-_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o ++ifeq ($(CONFIG_USB_HCI), y) ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723B_USB.o + endif +- +-#hal/OUTSRC/$(RTL871X)/Hal8188EFWImg_CE.o +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8188E_MAC.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8188E_BB.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8188E_RF.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8188E_FW.o\ +- hal/OUTSRC/$(RTL871X)/HalPhyRf_8188e.o\ +- hal/OUTSRC/$(RTL871X)/phydm_RegConfig8188E.o\ +- hal/OUTSRC/$(RTL871X)/Hal8188ERateAdaptive.o\ +- hal/OUTSRC/$(RTL871X)/phydm_RTL8188E.o +- ++ifeq ($(CONFIG_PCI_HCI), y) ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723B_PCIE.o + endif + +-########### HAL_RTL8192E ################################# +-ifeq ($(CONFIG_RTL8192E), y) ++_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8723b_bb.o\ ++ hal/phydm/$(RTL871X)/halhwimg8723b_mac.o\ ++ hal/phydm/$(RTL871X)/halhwimg8723b_rf.o\ ++ hal/phydm/$(RTL871X)/halhwimg8723b_fw.o\ ++ hal/phydm/$(RTL871X)/halhwimg8723b_mp.o\ ++ hal/phydm/$(RTL871X)/phydm_regconfig8723b.o\ ++ hal/phydm/$(RTL871X)/halphyrf_8723b_ce.o\ ++ hal/phydm/$(RTL871X)/phydm_rtl8723b.o + +-RTL871X = rtl8192e +-ifeq ($(CONFIG_SDIO_HCI), y) +-MODULE_NAME = 8192es + endif + ++########### HAL_RTL8814A ################################# ++ifeq ($(CONFIG_RTL8814A), y) ++## ADD NEW VHT MP HW TX MODE ## ++EXTRA_CFLAGS += -DCONFIG_MP_VHT_HW_TX_MODE ++CONFIG_MP_VHT_HW_TX_MODE = y ++########################################## ++RTL871X = rtl8814a + ifeq ($(CONFIG_USB_HCI), y) +-MODULE_NAME = 8192eu ++MODULE_NAME = 8814au + endif +- + ifeq ($(CONFIG_PCI_HCI), y) +-MODULE_NAME = 8192ee ++MODULE_NAME = 8814ae + endif +-EXTRA_CFLAGS += -DCONFIG_RTL8192E +-_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ +- hal/$(RTL871X)/Hal8192EPwrSeq.o\ ++ifeq ($(CONFIG_SDIO_HCI), y) ++MODULE_NAME = 8814as ++endif ++ ++EXTRA_CFLAGS += -DCONFIG_RTL8814A ++ ++_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ ++ hal/$(RTL871X)/Hal8814PwrSeq.o \ + hal/$(RTL871X)/$(RTL871X)_xmit.o\ + hal/$(RTL871X)/$(RTL871X)_sreset.o + +@@ -477,6 +557,9 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(RTL871X)_dm.o \ + hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ + hal/$(RTL871X)/$(RTL871X)_cmd.o \ ++ ++ ++_HAL_INTFS_FILES += \ + hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ +@@ -492,40 +575,46 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o + endif + endif + +-ifeq ($(CONFIG_MP_INCLUDED), y) +-_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o ++ifeq ($(CONFIG_USB_HCI), y) ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8814A_USB.o ++endif ++ifeq ($(CONFIG_PCI_HCI), y) ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8814A_PCIE.o + endif + +-#hal/OUTSRC/$(RTL871X)/HalHWImg8188E_FW.o +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8192E_MAC.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8192E_BB.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8192E_RF.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8192E_FW.o\ +- hal/OUTSRC/$(RTL871X)/HalPhyRf_8192e.o\ +- hal/OUTSRC/$(RTL871X)/phydm_RegConfig8192E.o\ +- hal/OUTSRC/$(RTL871X)/phydm_RTL8192E.o ++_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8814a_bb.o\ ++ hal/phydm/$(RTL871X)/halhwimg8814a_mac.o\ ++ hal/phydm/$(RTL871X)/halhwimg8814a_rf.o\ ++ hal/phydm/$(RTL871X)/halhwimg8814a_fw.o\ ++ hal/phydm/$(RTL871X)/phydm_iqk_8814a.o\ ++ hal/phydm/$(RTL871X)/phydm_regconfig8814a.o\ ++ hal/phydm/$(RTL871X)/halphyrf_8814a_ce.o\ ++ hal/phydm/$(RTL871X)/phydm_rtl8814a.o\ ++ hal/phydm/txbf/haltxbf8814a.o + + endif + +-########### HAL_RTL8812A_RTL8821A ################################# +- +-ifneq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A), n_n) ++########### HAL_RTL8723C ################################# ++ifeq ($(CONFIG_RTL8723C), y) + +-RTL871X = rtl8812a ++RTL871X = rtl8703b + ifeq ($(CONFIG_USB_HCI), y) +-MODULE_NAME = 8812au ++MODULE_NAME = 8723cu ++MODULE_SUB_NAME = 8703bu + endif + ifeq ($(CONFIG_PCI_HCI), y) +-MODULE_NAME = 8812ae ++MODULE_NAME = 8723ce ++MODULE_SUB_NAME = 8703be + endif + ifeq ($(CONFIG_SDIO_HCI), y) +-MODULE_NAME = 8812as ++MODULE_NAME = 8723cs ++MODULE_SUB_NAME = 8703bs + endif + +-_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ +- hal/$(RTL871X)/Hal8812PwrSeq.o \ +- hal/$(RTL871X)/Hal8821APwrSeq.o\ +- hal/$(RTL871X)/$(RTL871X)_xmit.o\ ++EXTRA_CFLAGS += -DCONFIG_RTL8703B ++ ++_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ ++ hal/$(RTL871X)/Hal8703BPwrSeq.o\ + hal/$(RTL871X)/$(RTL871X)_sreset.o + + _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ +@@ -534,86 +623,53 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(RTL871X)_dm.o \ + hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ + hal/$(RTL871X)/$(RTL871X)_cmd.o \ ++ ++ ++_HAL_INTFS_FILES += \ + hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ +- hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ +- hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ +- hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o ++ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ ++ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ ++ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o + +-ifeq ($(CONFIG_SDIO_HCI), y) +-_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o ++ifeq ($(CONFIG_PCI_HCI), y) ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o + else +-ifeq ($(CONFIG_GSPI_HCI), y) + _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o +-else +-_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o +-endif + endif + +-ifeq ($(CONFIG_MP_INCLUDED), y) +-_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o +-endif +- +-ifeq ($(CONFIG_RTL8812A), y) +-EXTRA_CFLAGS += -DCONFIG_RTL8812A +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8812A_FW.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8812A_MAC.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8812A_BB.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8812A_RF.o\ +- hal/OUTSRC/$(RTL871X)/HalPhyRf_8812A.o\ +- hal/OUTSRC/$(RTL871X)/phydm_RegConfig8812A.o\ +- hal/OUTSRC/$(RTL871X)/phydm_RTL8812A.o +-endif +- +-ifeq ($(CONFIG_RTL8821A), y) +- +-ifeq ($(CONFIG_RTL8812A), n) +- +-RTL871X = rtl8821a + ifeq ($(CONFIG_USB_HCI), y) +-MODULE_NAME := 8821au ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8703B_USB.o + endif + ifeq ($(CONFIG_PCI_HCI), y) +-MODULE_NAME := 8821ae +-endif +-ifeq ($(CONFIG_SDIO_HCI), y) +-MODULE_NAME := 8821as ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8703B_PCIE.o + endif + ++_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8703b_bb.o\ ++ hal/phydm/$(RTL871X)/halhwimg8703b_mac.o\ ++ hal/phydm/$(RTL871X)/halhwimg8703b_rf.o\ ++ hal/phydm/$(RTL871X)/halhwimg8703b_fw.o\ ++ hal/phydm/$(RTL871X)/phydm_regconfig8703b.o\ ++ hal/phydm/$(RTL871X)/halphyrf_8703b.o + endif + +-EXTRA_CFLAGS += -DCONFIG_RTL8821A +-_OUTSRC_FILES += hal/OUTSRC/rtl8821a/HalHWImg8821A_FW.o\ +- hal/OUTSRC/rtl8821a/HalHWImg8821A_MAC.o\ +- hal/OUTSRC/rtl8821a/HalHWImg8821A_BB.o\ +- hal/OUTSRC/rtl8821a/HalHWImg8821A_RF.o\ +- hal/OUTSRC/rtl8812a/HalPhyRf_8812A.o\ +- hal/OUTSRC/rtl8821a/HalPhyRf_8821A.o\ +- hal/OUTSRC/rtl8821a/phydm_RegConfig8821A.o\ +- hal/OUTSRC/rtl8821a/phydm_RTL8821A.o\ +- hal/OUTSRC/rtl8821a/PhyDM_IQK_8821A.o +-endif +- +- +-endif ++########### HAL_RTL8188F ################################# ++ifeq ($(CONFIG_RTL8188F), y) + +-########### HAL_RTL8723B ################################# +-ifeq ($(CONFIG_RTL8723B), y) +- +-RTL871X = rtl8723b ++RTL871X = rtl8188f + ifeq ($(CONFIG_USB_HCI), y) +-MODULE_NAME = 8723bu ++MODULE_NAME = 8188fu + endif + ifeq ($(CONFIG_PCI_HCI), y) +-MODULE_NAME = 8723be ++MODULE_NAME = 8188fe + endif + ifeq ($(CONFIG_SDIO_HCI), y) +-MODULE_NAME = 8723bs ++MODULE_NAME = 8189fs + endif + +-EXTRA_CFLAGS += -DCONFIG_RTL8723B ++EXTRA_CFLAGS += -DCONFIG_RTL8188F + + _HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ +- hal/$(RTL871X)/Hal8723BPwrSeq.o\ ++ hal/$(RTL871X)/Hal8188FPwrSeq.o\ + hal/$(RTL871X)/$(RTL871X)_sreset.o + + _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ +@@ -636,18 +692,21 @@ else + _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o + endif + +-ifeq ($(CONFIG_MP_INCLUDED), y) +-_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o ++ifeq ($(CONFIG_USB_HCI), y) ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188F_USB.o + endif + +-_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8723B_BB.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8723B_MAC.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8723B_RF.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8723B_FW.o\ +- hal/OUTSRC/$(RTL871X)/HalHWImg8723B_MP.o\ +- hal/OUTSRC/$(RTL871X)/phydm_RegConfig8723B.o\ +- hal/OUTSRC/$(RTL871X)/HalPhyRf_8723B.o\ +- hal/OUTSRC/$(RTL871X)/phydm_RTL8723B.o ++ifeq ($(CONFIG_SDIO_HCI), y) ++_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188F_SDIO.o ++endif ++ ++_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8188f_bb.o\ ++ hal/phydm/$(RTL871X)/halhwimg8188f_mac.o\ ++ hal/phydm/$(RTL871X)/halhwimg8188f_rf.o\ ++ hal/phydm/$(RTL871X)/halhwimg8188f_fw.o\ ++ hal/phydm/$(RTL871X)/phydm_regconfig8188f.o\ ++ hal/phydm/$(RTL871X)/halphyrf_8188f.o \ ++ hal/phydm/$(RTL871X)/phydm_rtl8188f.o + + endif + +@@ -660,6 +719,10 @@ $(shell cp $(TopDIR)/autoconf_multidrv_$(HCI_NAME)_linux.h $(TopDIR)/include/aut + else + ifeq ($(CONFIG_RTL8188E)$(CONFIG_SDIO_HCI),yy) + $(shell cp $(TopDIR)/autoconf_rtl8189e_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) ++else ifeq ($(CONFIG_RTL8188F)$(CONFIG_SDIO_HCI),yy) ++$(shell cp $(TopDIR)/autoconf_rtl8189f_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) ++else ifeq ($(CONFIG_RTL8723C),y) ++$(shell cp $(TopDIR)/autoconf_rtl8723c_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) + else + $(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) + endif +@@ -697,10 +760,6 @@ ifeq ($(CONFIG_BT_COEXIST), y) + EXTRA_CFLAGS += -DCONFIG_BT_COEXIST + endif + +-ifeq ($(CONFIG_RTL8192CU_REDEFINE_1X1), y) +-EXTRA_CFLAGS += -DRTL8192C_RECONFIG_TO_1T1R +-endif +- + ifeq ($(CONFIG_INTEL_WIDI), y) + EXTRA_CFLAGS += -DCONFIG_INTEL_WIDI + endif +@@ -712,16 +771,29 @@ endif + + ifeq ($(CONFIG_EFUSE_CONFIG_FILE), y) + EXTRA_CFLAGS += -DCONFIG_EFUSE_CONFIG_FILE +-ifeq ($(MODULE_NAME), 8189es) ++ ++#EFUSE_MAP_PATH ++USER_EFUSE_MAP_PATH ?= ++ifneq ($(USER_EFUSE_MAP_PATH),) ++EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"$(USER_EFUSE_MAP_PATH)\" ++else ifeq ($(MODULE_NAME), 8189es) + EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_8189e.map\" + else ifeq ($(MODULE_NAME), 8723bs) + EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_8723bs.map\" + else + EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_$(MODULE_NAME).map\" + endif ++ ++#WIFIMAC_PATH ++USER_WIFIMAC_PATH ?= ++ifneq ($(USER_WIFIMAC_PATH),) ++EXTRA_CFLAGS += -DWIFIMAC_PATH=\"$(USER_WIFIMAC_PATH)\" ++else + EXTRA_CFLAGS += -DWIFIMAC_PATH=\"/data/wifimac.txt\" + endif + ++endif ++ + ifeq ($(CONFIG_EXT_CLK), y) + EXTRA_CFLAGS += -DCONFIG_EXT_CLK + endif +@@ -756,8 +828,8 @@ else ifeq ($(CONFIG_RTW_ADAPTIVITY_MODE), carrier_sense) + EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_MODE=1 + endif + +-ifeq ($(CONFIG_SKIP_SIGNAL_SCALE_MAPPING), y) +-EXTRA_CFLAGS += -DCONFIG_SKIP_SIGNAL_SCALE_MAPPING ++ifeq ($(CONFIG_SIGNAL_SCALE_MAPPING), y) ++EXTRA_CFLAGS += -DCONFIG_SIGNAL_SCALE_MAPPING + endif + + ifeq ($(CONFIG_80211W), y) +@@ -787,6 +859,11 @@ endif + + ifeq ($(CONFIG_GPIO_WAKEUP), y) + EXTRA_CFLAGS += -DCONFIG_GPIO_WAKEUP ++ifeq ($(CONFIG_HIGH_ACTIVE), y) ++EXTRA_CFLAGS += -DHIGH_ACTIVE=1 ++else ++EXTRA_CFLAGS += -DHIGH_ACTIVE=0 ++endif + endif + + ifneq ($(CONFIG_WAKEUP_GPIO_IDX), default) +@@ -813,12 +890,30 @@ ifeq ($(CONFIG_ANTENNA_DIVERSITY), y) + EXTRA_CFLAGS += -DCONFIG_ANTENNA_DIVERSITY + endif + ++ifeq ($(CONFIG_TDLS), y) ++EXTRA_CFLAGS += -DCONFIG_TDLS ++endif ++ ++ifeq ($(CONFIG_WIFI_MONITOR), y) ++EXTRA_CFLAGS += -DCONFIG_WIFI_MONITOR ++endif ++ ++ifeq ($(CONFIG_MP_VHT_HW_TX_MODE), y) ++EXTRA_CFLAGS += -DCONFIG_MP_VHT_HW_TX_MODE ++ifeq ($(CONFIG_PLATFORM_I386_PC), y) ++## For I386 X86 ToolChain use Hardware FLOATING ++EXTRA_CFLAGS += -mhard-float ++else ++## For ARM ToolChain use Hardware FLOATING ++EXTRA_CFLAGS += -mfloat-abi=hard ++endif ++endif ++ ++EXTRA_CFLAGS += -DDM_ODM_SUPPORT_TYPE=0x04 + + ifeq ($(CONFIG_PLATFORM_I386_PC), y) + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +-EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +-EXTRA_CFLAGS += -DCONFIG_P2P_IPS + SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) + ARCH ?= $(SUBARCH) + CROSS_COMPILE ?= +@@ -840,6 +935,55 @@ KSRC := $(KERNEL_BUILD_PATH) + MODULE_NAME :=wlan + endif + ++ ++ifeq ($(CONFIG_PLATFORM_ACTIONS_ATM705X), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++#EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC ++# default setting for Android 4.1, 4.2, 4.3, 4.4 ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_ACTIONS_ATM705X ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++ ++# Enable this for Android 5.0 ++EXTRA_CFLAGS += -DCONFIG_RADIO_WORK ++ ++ifeq ($(CONFIG_SDIO_HCI), y) ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS ++_PLATFORM_FILES += platform/platform_arm_act_sdio.o ++endif ++ ++ARCH := arm ++CROSS_COMPILE := /opt/arm-2011.09/bin/arm-none-linux-gnueabi- ++KSRC := /home/android_sdk/Action-semi/705a_android_L/android/kernel ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_SUN50IW1P1), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN50IW1P1 ++EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT ++# default setting for Android 4.1, 4.2 ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_RESUME_IN_WORKQUEUE ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS ++ ++# Enable this for Android 5.0 ++EXTRA_CFLAGS += -DCONFIG_RADIO_WORK ++ ++ifeq ($(CONFIG_USB_HCI), y) ++EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX ++_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o ++endif ++ifeq ($(CONFIG_SDIO_HCI), y) ++_PLATFORM_FILES += platform/platform_ARM_SUN50IW1P1_sdio.o ++endif ++ ++ARCH := arm64 ++# ===Cross compile setting for Android 5.1(64) SDK === ++CROSS_COMPILE := /home/android_sdk/Allwinner/a64/android-51/lichee/out/sun50iw1p1/android/common/buildroot/external-toolchain/bin/aarch64-linux-gnu- ++KSRC :=/home/android_sdk/Allwinner/a64/android-51/lichee/linux-3.10/ ++endif ++ + ifeq ($(CONFIG_PLATFORM_TI_AM3517), y) + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_SHUTTLE + CROSS_COMPILE := arm-eabi- +@@ -856,7 +1000,10 @@ KSRC:= /usr/src/Mstar_kernel/2.6.28.9/ + endif + + ifeq ($(CONFIG_PLATFORM_MSTAR), y) +-EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR #-DCONFIG_PLATFORM_MSTAR_SCAN_BEFORE_CONNECT ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR -DCONFIG_USE_USB_BUFFER_ALLOC_TX -DCONFIG_FIX_NR_BULKIN_BUFFER -DCONFIG_PREALLOC_RX_SKB_BUFFER ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_MSTAR_HIGH + ARCH:=arm + CROSS_COMPILE:= /usr/src/bin/arm-none-linux-gnueabi- + KVER:= 3.1.10 +@@ -878,7 +1025,6 @@ EXTRA_CFLAGS += -DCONFIG_PLATFORM_INTEL_BYT + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +-EXTRA_CFLAGS += -DCONFIG_P2P_IPS + EXTRA_CFLAGS += -DCONFIG_SKIP_SIGNAL_SCALE_MAPPING + ifeq ($(CONFIG_SDIO_HCI), y) + EXTRA_CFLAGS += -DCONFIG_RESUME_IN_WORKQUEUE +@@ -889,7 +1035,6 @@ ifeq ($(CONFIG_PLATFORM_JB_X86), y) + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +-EXTRA_CFLAGS += -DCONFIG_P2P_IPS + SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) + ARCH := $(SUBARCH) + CROSS_COMPILE := /home/android_sdk/android-x86_JB/prebuilts/gcc/linux-x86/x86/i686-linux-android-4.7/bin/i686-linux-android- +@@ -1041,7 +1186,6 @@ EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN + EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +-EXTRA_CFLAGS += -DCONFIG_P2P_IPS + ARCH := arm + CROSS_COMPILE := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- + KSRC := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/out/target/product/cardhu/obj/KERNEL +@@ -1054,7 +1198,6 @@ EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN + EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +-EXTRA_CFLAGS += -DCONFIG_P2P_IPS + ARCH := arm + CROSS_COMPILE := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- + KSRC := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/out/target/product/dalmore/obj/KERNEL +@@ -1082,7 +1225,6 @@ EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN + # default setting for Android 4.1, 4.2 + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +-EXTRA_CFLAGS += -DCONFIG_P2P_IPS + ARCH := arm + CROSS_COMPILE := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- + KSRC := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/kernel +@@ -1106,11 +1248,10 @@ EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC + EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN + # default setting for Special function +-EXTRA_CFLAGS += -DCONFIG_P2P_IPS + ARCH := arm +-CROSS_COMPILE := /home/xxh/work/rk3288_lollipop_develop/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- +-KSRC := /home/xxh/work/rk3288_lollipop_develop/kernel +-MODULE_NAME := 8723bs ++CROSS_COMPILE := /home/android_sdk/Rockchip/Rk3188/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- ++KSRC := /home/android_sdk/Rockchip/Rk3188/kernel ++MODULE_NAME := wlan + endif + + ifeq ($(CONFIG_PLATFORM_ARM_RK3066), y) +@@ -1119,7 +1260,6 @@ EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 +-EXTRA_CFLAGS += -DCONFIG_P2P_IPS + ifeq ($(CONFIG_SDIO_HCI), y) + EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN + endif +@@ -1181,7 +1321,6 @@ EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUNxI + # default setting for Android 4.1, 4.2 + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +-EXTRA_CFLAGS += -DDCONFIG_P2P_IPS + + EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS + ifeq ($(CONFIG_USB_HCI), y) +@@ -1209,7 +1348,7 @@ EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT + # default setting for Android 4.1, 4.2, 4.3, 4.4 + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +-EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_QOS_OPTIMIZATION ++EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION + + EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS + ifeq ($(CONFIG_USB_HCI), y) +@@ -1241,7 +1380,7 @@ EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT + # default setting for Android 4.1, 4.2, 4.3, 4.4 + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +-EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_QOS_OPTIMIZATION ++EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION + + EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS + ifeq ($(CONFIG_USB_HCI), y) +@@ -1264,14 +1403,14 @@ CROSS_COMPILE := /home/android_sdk/Allwinner/a20/kitkat-a20_v4.4/lichee/out/andr + KSRC := /home/android_sdk/Allwinner/a20/kitkat-a20_v4.4/lichee/linux-3.4 + endif + +-ifeq ($(CONFIG_PLATFORM_ARM_SUN8I), y) ++ifeq ($(CONFIG_PLATFORM_ARM_SUN8I_W3P1), y) + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN + EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN8I ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN8I_W3P1 + EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT + # default setting for Android 4.1, 4.2 + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +-EXTRA_CFLAGS += -DCONFIG_P2P_IPS + + EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS + ifeq ($(CONFIG_USB_HCI), y) +@@ -1291,6 +1430,33 @@ CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-kk44/lichee/out/android + KSRC :=/home/android_sdk/Allwinner/a23/android-kk44/lichee/linux-3.4 + endif + ++ifeq ($(CONFIG_PLATFORM_ARM_SUN8I_W5P1), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN8I ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN8I_W5P1 ++EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT ++# default setting for Android 4.1, 4.2 ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++ ++# Enable this for Android 5.0 ++EXTRA_CFLAGS += -DCONFIG_RADIO_WORK ++ ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS ++ifeq ($(CONFIG_USB_HCI), y) ++EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX ++_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o ++endif ++ifeq ($(CONFIG_SDIO_HCI), y) ++_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o ++endif ++ ++ARCH := arm ++# ===Cross compile setting for Android L SDK === ++CROSS_COMPILE := /home/android_sdk/Allwinner/a33/android-L/lichee/out/sun8iw5p1/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- ++KSRC :=/home/android_sdk/Allwinner/a33/android-L/lichee/linux-3.4 ++endif ++ + ifeq ($(CONFIG_PLATFORM_ACTIONS_ATV5201), y) + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATV5201 + EXTRA_CFLAGS += -DCONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP +@@ -1301,12 +1467,35 @@ KSRC:= $(CFGDIR)/../../kernel/linux-$(KERNEL_VER) + endif + + ifeq ($(CONFIG_PLATFORM_ARM_RTD299X), y) +-EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DUSB_XMITBUF_ALIGN_SZ=1024 -DUSB_PACKET_OFFSET_SZ=0 ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++EXTRA_CFLAGS += -DUSB_XMITBUF_ALIGN_SZ=1024 -DUSB_PACKET_OFFSET_SZ=0 ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++ifeq ($(CONFIG_ANDROID), y) ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++# Enable this for Android 5.0 ++EXTRA_CFLAGS += -DCONFIG_RADIO_WORK ++endif + #ARCH, CROSS_COMPILE, KSRC,and MODDESTDIR are provided by external makefile + INSTALL_PREFIX := + endif + +-# Platfrom setting ++ifeq ($(CONFIG_PLATFORM_HISILICON), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_HISILICON ++ifeq ($(SUPPORT_CONCURRENT),y) ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++endif ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++ARCH := arm ++ifeq ($(CROSS_COMPILE),) ++ CROSS_COMPILE = arm-hisiv200-linux- ++endif ++MODULE_NAME := rtl8192eu ++ifeq ($(KSRC),) ++ KSRC := ../../../../../../kernel/linux-3.4.y ++endif ++endif ++ ++# Platform setting + ifeq ($(CONFIG_PLATFORM_ARM_SPREADTRUM_6820), y) + ifeq ($(CONFIG_ANDROID_2X), y) + EXTRA_CFLAGS += -DANDROID_2X +@@ -1360,7 +1549,7 @@ EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT + # default setting for Android 4.1, 4.2 + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +-#EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_QOS_OPTIMIZATION ++#EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION + EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION + + #EXTRA_CFLAGS += -DCONFIG_#PLATFORM_OPS +@@ -1384,6 +1573,30 @@ MODULE_NAME := 8192eu + + endif + ++ifeq ($(CONFIG_PLATFORM_NOVATEK_NT72668), y) ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_NOVATEK_NT72668 ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_RX ++EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX ++ARCH ?= arm ++CROSS_COMPILE := arm-linux-gnueabihf- ++KVER := 3.8.0 ++KSRC := /Custom/Novatek/TCL/linux-3.8_header ++#KSRC := $(KERNELDIR) ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_TCC8930_JB42), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++# default setting for Android 4.1, 4.2 ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++ARCH := arm ++CROSS_COMPILE := /home/android_sdk/Telechips/v13.05_r1-tcc-android-4.2.2_tcc893x-evm_build/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- ++KSRC := /home/android_sdk/Telechips/v13.05_r1-tcc-android-4.2.2_tcc893x-evm_build/kernel ++MODULE_NAME := wlan ++endif + + ifeq ($(CONFIG_MULTIDRV), y) + +@@ -1434,7 +1647,7 @@ rtk_core := core/rtw_cmd.o \ + core/rtw_btcoex.o \ + core/rtw_beamforming.o \ + core/rtw_odm.o \ +- core/efuse/rtw_efuse.o ++ core/efuse/rtw_efuse.o + + $(MODULE_NAME)-y += $(rtk_core) + +@@ -1451,15 +1664,9 @@ $(MODULE_NAME)-y += $(_PLATFORM_FILES) + $(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o \ + core/rtw_mp_ioctl.o + +-ifeq ($(CONFIG_RTL8723A), y) +-$(MODULE_NAME)-$(CONFIG_MP_INCLUDED)+= core/rtw_bt_mp.o +-endif + ifeq ($(CONFIG_RTL8723B), y) + $(MODULE_NAME)-$(CONFIG_MP_INCLUDED)+= core/rtw_bt_mp.o + endif +-ifeq ($(CONFIG_RTL8821A), y) +-$(MODULE_NAME)-$(CONFIG_MP_INCLUDED)+= core/rtw_bt_mp.o +-endif + + obj-$(CONFIG_RTL8723BS) := $(MODULE_NAME).o + +@@ -1491,8 +1698,8 @@ config_r: + .PHONY: modules clean + + clean: +- cd hal/OUTSRC/ ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko +- cd hal/OUTSRC/ ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd hal/phydm/ ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko ++ cd hal/phydm/ ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko + cd hal/led ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko + cd hal ; rm -fr */*/*.mod.c */*/*.mod */*/*.o */*/.*.cmd */*/*.ko + cd hal ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/efuse/rtw_efuse.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/efuse/rtw_efuse.c +old mode 100755 +new mode 100644 +index 5d3f80a..2f9f9f2 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/efuse/rtw_efuse.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/efuse/rtw_efuse.c +@@ -22,6 +22,7 @@ + #include + #include + ++#include "../hal/efuse/efuse_mask.h" + + /*------------------------Define local variable------------------------------*/ + u8 fakeEfuseBank=0; +@@ -39,6 +40,8 @@ u32 fakeBTEfuseUsedBytes=0; + u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; + u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]={0}; + u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]={0}; ++ ++u8 maskfileBuffer[32]; + /*------------------------Define local variable------------------------------*/ + + //------------------------------------------------------------------------------ +@@ -433,7 +436,8 @@ efuse_OneByteRead( + u32 tmpidx = 0; + u8 bResult; + u8 readbyte; +- ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ + //DBG_871X("===> EFUSE_OneByteRead(), addr = %x\n", addr); + //DBG_871X("===> EFUSE_OneByteRead() start, 0x34 = 0x%X\n", rtw_read32(pAdapter, EFUSE_TEST)); + +@@ -442,9 +446,11 @@ efuse_OneByteRead( + bResult = Efuse_Read1ByteFromFakeContent(pAdapter, addr, data); + return bResult; + } +- ++ + if( IS_HARDWARE_TYPE_8723B(pAdapter) || +- (IS_HARDWARE_TYPE_8192E(pAdapter) && IS_VENDOR_8192E_B_CUT(pAdapter))) ++ (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->VersionID))) || ++ (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->VersionID)) ++ ) + { + // <20130121, Kordan> For SMIC EFUSE specificatoin. + //0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) +@@ -495,7 +501,8 @@ efuse_OneByteWrite( + u8 tmpidx = 0; + u8 bResult=_FALSE; + u32 efuseValue = 0; +- ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ + //DBG_871X("===> EFUSE_OneByteWrite(), addr = %x data=%x\n", addr, data); + //DBG_871X("===> EFUSE_OneByteWrite() start, 0x34 = 0x%X\n", rtw_read32(pAdapter, EFUSE_TEST)); + +@@ -515,10 +522,11 @@ efuse_OneByteWrite( + efuseValue &= ~(0x3FFFF); + efuseValue |= ((addr<<8 | data) & 0x3FFFF); + +- + // <20130227, Kordan> 8192E MP chip A-cut had better not set 0x34[11] until B-Cut. +- if (IS_HARDWARE_TYPE_8723B(pAdapter)||(IS_HARDWARE_TYPE_8192E(pAdapter) && IS_VENDOR_8192E_B_CUT(pAdapter))) +- { ++ if ( IS_HARDWARE_TYPE_8723B(pAdapter) || ++ (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->VersionID))) || ++ (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->VersionID)) ++ ) { + // <20130121, Kordan> For SMIC EFUSE specificatoin. + //0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) + //PHY_SetMacReg(pAdapter, 0x34, BIT11, 1); +@@ -548,8 +556,10 @@ efuse_OneByteWrite( + } + + // disable Efuse program enable +- if (IS_HARDWARE_TYPE_8723B(pAdapter)) +- { ++ if ( IS_HARDWARE_TYPE_8723B(pAdapter) || ++ (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->VersionID))) || ++ (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->VersionID)) ++ ) { + PHY_SetMacReg(pAdapter, EFUSE_TEST, BIT(11), 0); + } + +@@ -711,6 +721,8 @@ u8 rtw_efuse_access(PADAPTER padapter, u8 bWrite, u16 start_addr, u16 cnts, u8 * + u16 efuse_GetMaxSize(PADAPTER padapter) + { + u16 max_size; ++ ++ max_size = 0; + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_size, _FALSE); + return max_size; + } +@@ -724,6 +736,24 @@ u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size) + return _SUCCESS; + } + //------------------------------------------------------------------------------ ++u16 efuse_bt_GetMaxSize(PADAPTER padapter) ++{ ++ u16 max_size; ++ ++ max_size = 0; ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_size, _FALSE); ++ return max_size; ++} ++ ++u8 efuse_bt_GetCurrentSize(PADAPTER padapter, u16 *size) ++{ ++ Efuse_PowerSwitch(padapter, _FALSE, _TRUE); ++ *size = Efuse_GetCurrentSize(padapter, EFUSE_BT, _FALSE); ++ Efuse_PowerSwitch(padapter, _FALSE, _FALSE); ++ ++ return _SUCCESS; ++} ++ + u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) + { + u16 mapLen=0; +@@ -759,6 +789,165 @@ u8 rtw_BT_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) + + return _SUCCESS; + } ++ ++BOOLEAN rtw_file_efuse_IsMasked( ++ PADAPTER pAdapter, ++ u16 Offset ++ ) ++{ ++ int r = Offset/16; ++ int c = (Offset%16) / 2; ++ int result = 0; ++ ++ if(pAdapter->registrypriv.boffefusemask) ++ return FALSE; ++ ++ //DBG_871X(" %s ,Offset=%x r= %d , c=%d , maskfileBuffer[r]= %x \n",__func__,Offset,r,c,maskfileBuffer[r]); ++ if (c < 4) // Upper double word ++ result = (maskfileBuffer[r] & (0x10 << c)); ++ else ++ result = (maskfileBuffer[r] & (0x01 << (c-4))); ++ ++ return (result > 0) ? 0 : 1; ++ ++} ++ ++ ++u8 rtw_efuse_file_read(PADAPTER padapter,u8 *filepatch,u8 *buf,u32 len) ++{ ++ char *ptmp; ++ char *ptmpbuf=NULL; ++ u32 rtStatus; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ ptmpbuf = rtw_zmalloc(2048); ++ ++ if (ptmpbuf == NULL) ++ return _FALSE; ++ ++ _rtw_memset(ptmpbuf,'\0',2048); ++ ++ rtStatus = rtw_retrieve_from_file(filepatch, ptmpbuf, 2048); ++ ++ if( rtStatus > 100 ) ++ { ++ u32 i,j; ++ for(i=0,j=0;jregistrypriv.boffefusemask) ++ return FALSE; ++ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++#if defined(CONFIG_RTL8188E) ++ if (IS_HARDWARE_TYPE_8188E(pAdapter)) ++ return (IS_MASKED(8188E,_MUSB,Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8812A) ++ if (IS_HARDWARE_TYPE_8812(pAdapter)) ++ return (IS_MASKED(8812A,_MUSB,Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8821A) ++ //if (IS_HARDWARE_TYPE_8811AU(pAdapter)) ++ // return (IS_MASKED(8811A,_MUSB,Offset)) ? TRUE : FALSE; ++ if (IS_HARDWARE_TYPE_8821(pAdapter)) ++ return (IS_MASKED(8821A,_MUSB,Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8192E) ++ if (IS_HARDWARE_TYPE_8192E(pAdapter)) ++ return (IS_MASKED(8192E,_MUSB,Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8723B) ++ if (IS_HARDWARE_TYPE_8723B(pAdapter)) ++ return (IS_MASKED(8723B,_MUSB,Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8703B) ++ if (IS_HARDWARE_TYPE_8703B(pAdapter)) ++ return (IS_MASKED(8703B, _MUSB, Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8814A) ++ if (IS_HARDWARE_TYPE_8814A(pAdapter)) ++ return (IS_MASKED(8814A, _MUSB, Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8188F) ++ if (IS_HARDWARE_TYPE_8188F(pAdapter)) ++ return (IS_MASKED(8188F, _MUSB, Offset)) ? TRUE : FALSE; ++#endif ++#elif DEV_BUS_TYPE == RT_PCI_INTERFACE ++#if defined(CONFIG_RTL8188E) ++ if (IS_HARDWARE_TYPE_8188E(pAdapter)) ++ return (IS_MASKED(8188E,_MPCIE,Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8192E) ++ if (IS_HARDWARE_TYPE_8192E(pAdapter)) ++ return (IS_MASKED(8192E,_MPCIE,Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8812A) ++ if (IS_HARDWARE_TYPE_8812(pAdapter)) ++ return (IS_MASKED(8812A,_MPCIE,Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8821A) ++ if (IS_HARDWARE_TYPE_8821(pAdapter)) ++ return (IS_MASKED(8821A,_MPCIE,Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8723B) ++ if (IS_HARDWARE_TYPE_8723B(pAdapter)) ++ return (IS_MASKED(8723B,_MPCIE,Offset)) ? TRUE : FALSE; ++#endif ++#if defined(CONFIG_RTL8814A) ++ if (IS_HARDWARE_TYPE_8814A(pAdapter)) ++ return (IS_MASKED(8814A, _MPCIE, Offset)) ? TRUE : FALSE; ++#endif ++ //else if (IS_HARDWARE_TYPE_8821B(pAdapter)) ++ // return (IS_MASKED(8821B,_MPCIE,Offset)) ? TRUE : FALSE; ++ ++#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE ++#ifdef CONFIG_RTL8188E_SDIO ++ if (IS_HARDWARE_TYPE_8188E(pAdapter)) ++ return (IS_MASKED(8188E,_MSDIO,Offset)) ? TRUE : FALSE; ++#endif ++#ifdef CONFIG_RTL8188F_SDIO ++ if (IS_HARDWARE_TYPE_8188F(pAdapter)) ++ return (IS_MASKED(8188F, _MSDIO, Offset)) ? TRUE : FALSE; ++#endif ++#endif ++ ++ return FALSE; ++} ++ + //------------------------------------------------------------------------------ + u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) + { +@@ -775,7 +964,6 @@ u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) + s32 i, j, idx; + u8 ret = _SUCCESS; + u16 mapLen=0; +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); +@@ -796,6 +984,23 @@ u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) + ret = rtw_efuse_map_read(padapter, 0, mapLen, map); + if (ret == _FAIL) goto exit; + ++ if(padapter->registrypriv.boffefusemask==0) ++ { ++ for (i =0; i < cnts; i++) ++ { ++ if(padapter->registrypriv.bFileMaskEfuse==_TRUE) ++ { ++ if (rtw_file_efuse_IsMasked(padapter, addr+i)) /*use file efuse mask. */ ++ data[i] = map[addr+i]; ++ } ++ else ++ { ++ if ( efuse_IsMasked(padapter, addr+i )) ++ data[i] = map[addr+i]; ++ } ++ DBG_8192C("%s , data[%d] = %x, map[addr+i]= %x\n", __func__, i, data[i], map[addr+i]); ++ } ++ } + Efuse_PowerSwitch(padapter, _TRUE, _TRUE); + + idx = 0; +@@ -816,10 +1021,10 @@ u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) + { + if (IS_C_CUT(pHalData->VersionID) || IS_B_CUT(pHalData->VersionID)) + { +- if(pEEPROM->adjuseVoltageVal == 6) ++ if(pHalData->adjuseVoltageVal == 6) + { + newdata[i] = map[addr + idx]; +- DBG_8192C(" %s ,\n adjuseVoltageVal = %d ,newdata[%d] = %x \n",__func__,pEEPROM->adjuseVoltageVal,i,newdata[i]); ++ DBG_8192C(" %s ,\n adjuseVoltageVal = %d ,newdata[%d] = %x \n",__func__,pHalData->adjuseVoltageVal,i,newdata[i]); + } + } + } +@@ -851,8 +1056,35 @@ exit: + return ret; + } + ++u8 rtw_efuse_mask_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) ++{ ++ u8 ret = _SUCCESS; ++ u16 mapLen = 0, i = 0; ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); ++ ++ ret = rtw_efuse_map_read(padapter, addr, cnts , data); ++ ++ if (padapter->registrypriv.boffefusemask == 0) { ++ ++ for (i = 0; i < cnts; i++) { ++ if (padapter->registrypriv.bFileMaskEfuse == _TRUE) { ++ if (rtw_file_efuse_IsMasked(padapter, addr+i)) /*use file efuse mask.*/ ++ data[i] = 0xff; ++ } else { ++ /*DBG_8192C(" %s , data[%d] = %x\n", __func__, i, data[i]);*/ ++ if (efuse_IsMasked(padapter, addr+i)) { ++ data[i] = 0xff; ++ /*DBG_8192C(" %s ,mask data[%d] = %x\n", __func__, i, data[i]);*/ ++ } ++ } ++ } ++ ++ } ++ return ret; ++ ++} + +-//------------------------------------------------------------------------------ + u8 rtw_BT_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) + { + #define RT_ASSERT_RET(expr) \ +@@ -1005,9 +1237,9 @@ efuse_ShadowRead1Byte( + IN u16 Offset, + IN OUT u8 *Value) + { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + +- *Value = pEEPROM->efuse_eeprom_data[Offset]; ++ *Value = pHalData->efuse_eeprom_data[Offset]; + + } // EFUSE_ShadowRead1Byte + +@@ -1018,10 +1250,10 @@ efuse_ShadowRead2Byte( + IN u16 Offset, + IN OUT u16 *Value) + { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + +- *Value = pEEPROM->efuse_eeprom_data[Offset]; +- *Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8; ++ *Value = pHalData->efuse_eeprom_data[Offset]; ++ *Value |= pHalData->efuse_eeprom_data[Offset+1]<<8; + + } // EFUSE_ShadowRead2Byte + +@@ -1032,12 +1264,12 @@ efuse_ShadowRead4Byte( + IN u16 Offset, + IN OUT u32 *Value) + { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + +- *Value = pEEPROM->efuse_eeprom_data[Offset]; +- *Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8; +- *Value |= pEEPROM->efuse_eeprom_data[Offset+2]<<16; +- *Value |= pEEPROM->efuse_eeprom_data[Offset+3]<<24; ++ *Value = pHalData->efuse_eeprom_data[Offset]; ++ *Value |= pHalData->efuse_eeprom_data[Offset+1]<<8; ++ *Value |= pHalData->efuse_eeprom_data[Offset+2]<<16; ++ *Value |= pHalData->efuse_eeprom_data[Offset+3]<<24; + + } // efuse_ShadowRead4Byte + +@@ -1073,9 +1305,9 @@ efuse_ShadowWrite1Byte( + IN u16 Offset, + IN u8 Value) + { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + +- pEEPROM->efuse_eeprom_data[Offset] = Value; ++ pHalData->efuse_eeprom_data[Offset] = Value; + + } // efuse_ShadowWrite1Byte + +@@ -1086,10 +1318,12 @@ efuse_ShadowWrite2Byte( + IN u16 Offset, + IN u16 Value) + { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); ++ + +- pEEPROM->efuse_eeprom_data[Offset] = Value&0x00FF; +- pEEPROM->efuse_eeprom_data[Offset+1] = Value>>8; ++ pHalData->efuse_eeprom_data[Offset] = Value&0x00FF; ++ pHalData->efuse_eeprom_data[Offset+1] = Value>>8; + + } // efuse_ShadowWrite1Byte + +@@ -1100,12 +1334,12 @@ efuse_ShadowWrite4Byte( + IN u16 Offset, + IN u32 Value) + { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + +- pEEPROM->efuse_eeprom_data[Offset] = (u8)(Value&0x000000FF); +- pEEPROM->efuse_eeprom_data[Offset+1] = (u8)((Value>>8)&0x0000FF); +- pEEPROM->efuse_eeprom_data[Offset+2] = (u8)((Value>>16)&0x00FF); +- pEEPROM->efuse_eeprom_data[Offset+3] = (u8)((Value>>24)&0xFF); ++ pHalData->efuse_eeprom_data[Offset] = (u8)(Value&0x000000FF); ++ pHalData->efuse_eeprom_data[Offset+1] = (u8)((Value>>8)&0x0000FF); ++ pHalData->efuse_eeprom_data[Offset+2] = (u8)((Value>>16)&0x00FF); ++ pHalData->efuse_eeprom_data[Offset+3] = (u8)((Value>>24)&0xFF); + + } // efuse_ShadowWrite1Byte + +@@ -1130,25 +1364,25 @@ void EFUSE_ShadowMapUpdate( + IN u8 efuseType, + IN BOOLEAN bPseudoTest) + { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + u16 mapLen=0; + + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest); + +- if (pEEPROM->bautoload_fail_flag == _TRUE) ++ if (pHalData->bautoload_fail_flag == _TRUE) + { +- _rtw_memset(pEEPROM->efuse_eeprom_data, 0xFF, mapLen); ++ _rtw_memset(pHalData->efuse_eeprom_data, 0xFF, mapLen); + } + else + { + #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE +- if(_SUCCESS != retriveAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pEEPROM)) { ++ if(_SUCCESS != retriveAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pHalData->efuse_eeprom_data)) { + #endif + +- Efuse_ReadAllMap(pAdapter, efuseType, pEEPROM->efuse_eeprom_data, bPseudoTest); ++ Efuse_ReadAllMap(pAdapter, efuseType, pHalData->efuse_eeprom_data, bPseudoTest); + + #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE +- storeAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pEEPROM); ++ storeAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pHalData->efuse_eeprom_data); + } + #endif + } +@@ -1265,6 +1499,40 @@ Efuse_InitSomeVar( + _rtw_memset((PVOID)&fakeBTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN); + } + ++const u8 _mac_hidden_max_bw_to_hal_bw_cap[MAC_HIDDEN_MAX_BW_NUM] = { ++ 0, ++ 0, ++ (BW_CAP_160M|BW_CAP_80M|BW_CAP_40M|BW_CAP_20M|BW_CAP_10M|BW_CAP_5M), ++ (BW_CAP_5M), ++ (BW_CAP_10M|BW_CAP_5M), ++ (BW_CAP_20M|BW_CAP_10M|BW_CAP_5M), ++ (BW_CAP_40M|BW_CAP_20M|BW_CAP_10M|BW_CAP_5M), ++ (BW_CAP_80M|BW_CAP_40M|BW_CAP_20M|BW_CAP_10M|BW_CAP_5M), ++}; ++ ++const u8 _mac_hidden_proto_to_hal_proto_cap[MAC_HIDDEN_PROTOCOL_NUM] = { ++ 0, ++ 0, ++ (PROTO_CAP_11N|PROTO_CAP_11G|PROTO_CAP_11B), ++ (PROTO_CAP_11AC|PROTO_CAP_11N|PROTO_CAP_11G|PROTO_CAP_11B), ++}; ++ ++u8 mac_hidden_wl_func_to_hal_wl_func(u8 func) ++{ ++ u8 wl_func = 0; ++ ++ if (func & BIT0) ++ wl_func |= WL_FUNC_MIRACAST; ++ if (func & BIT1) ++ wl_func |= WL_FUNC_P2P; ++ if (func & BIT2) ++ wl_func |= WL_FUNC_TDLS; ++ if (func & BIT3) ++ wl_func |= WL_FUNC_FTM; ++ ++ return wl_func; ++} ++ + #ifdef PLATFORM_LINUX + #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE + //#include +@@ -1274,12 +1542,12 @@ Efuse_InitSomeVar( + return _TRUE; + } + +-int storeAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv) ++int storeAdaptorInfoFile(char *path, u8* efuse_data) + { + int ret =_SUCCESS; + +- if(path && eeprom_priv) { +- ret = rtw_store_to_file(path, eeprom_priv->efuse_eeprom_data, EEPROM_MAX_SIZE_512); ++ if(path && efuse_data) { ++ ret = rtw_store_to_file(path, efuse_data, EEPROM_MAX_SIZE_512); + if(ret == EEPROM_MAX_SIZE) + ret = _SUCCESS; + else +@@ -1291,15 +1559,15 @@ int storeAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv) + return ret; + } + +-int retriveAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv) ++int retriveAdaptorInfoFile(char *path, u8* efuse_data) + { + int ret = _SUCCESS; + mm_segment_t oldfs; + struct file *fp; + +- if(path && eeprom_priv) { ++ if(path && efuse_data) { + +- ret = rtw_retrive_from_file(path, eeprom_priv->efuse_eeprom_data, EEPROM_MAX_SIZE); ++ ret = rtw_retrieve_from_file(path, efuse_data, EEPROM_MAX_SIZE); + + if(ret == EEPROM_MAX_SIZE) + ret = _SUCCESS; +@@ -1320,117 +1588,141 @@ int retriveAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv) + } + return ret; + } +-#endif //CONFIG_ADAPTOR_INFO_CACHING_FILE +-#endif //PLATFORM_LINUX ++#endif /* CONFIG_ADAPTOR_INFO_CACHING_FILE */ + + #ifdef CONFIG_EFUSE_CONFIG_FILE +- +-void Rtw_Hal_ReadMACAddrFromFile(PADAPTER padapter) ++u32 rtw_read_efuse_from_file(const char *path, u8 *buf) + { + u32 i; ++ u8 temp[3]; ++ u32 ret = _FAIL; ++ + struct file *fp; + mm_segment_t fs; +- u8 source_addr[18]; + loff_t pos = 0; +- u32 curtime = rtw_get_current_time(); +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- u8 *head, *end; +- +- u8 null_mac_addr[ETH_ALEN] = {0, 0, 0,0, 0, 0}; +- u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; +- +- _rtw_memset(source_addr, 0, 18); +- _rtw_memset(pEEPROM->mac_addr, 0, ETH_ALEN); + +- fp = filp_open("/data/wifimac.txt", O_RDWR, 0644); +- if (IS_ERR(fp)) { +- pEEPROM->bloadmac_fail_flag = _TRUE; +- DBG_871X("Error, wifi mac address file doesn't exist.\n"); +- } else { +- fs = get_fs(); +- set_fs(KERNEL_DS); +- +- DBG_871X("wifi mac address:\n"); +- vfs_read(fp, source_addr, 18, &pos); +- source_addr[17] = ':'; ++ fp = filp_open(path, O_RDONLY, 0); ++ if (fp == NULL || IS_ERR(fp)) { ++ if (fp != NULL) ++ DBG_871X_LEVEL(_drv_always_, "%s open %s fail, err:%ld\n" ++ , __func__, path, PTR_ERR(fp)); ++ else ++ DBG_871X_LEVEL(_drv_always_, "%s open %s fail, fp is NULL\n" ++ , __func__, path); + +- head = end = source_addr; +- for (i=0; imac_addr[i] = simple_strtoul(head, NULL, 16 ); ++ fs = get_fs(); ++ set_fs(KERNEL_DS); + +- if (end) { +- end++; +- head = end; ++ for (i = 0 ; i < HWSET_MAX_SIZE ; i++) { ++ vfs_read(fp, temp, 2, &pos); ++ if (sscanf(temp, "%hhx", &buf[i]) != 1) { ++ if (0) ++ DBG_871X_LEVEL(_drv_err_, "%s sscanf fail\n", __func__); ++ buf[i] = 0xFF; ++ } ++ if ((i % EFUSE_FILE_COLUMN_NUM) == (EFUSE_FILE_COLUMN_NUM - 1)) { ++ /* Filter the lates space char. */ ++ vfs_read(fp, temp, 1, &pos); ++ if (strchr(temp, ' ') == NULL) { ++ pos--; ++ vfs_read(fp, temp, 2, &pos); + } +- DBG_871X("%02x \n", pEEPROM->mac_addr[i]); ++ } else { ++ pos += 1; /* Filter the space character */ + } +- DBG_871X("\n"); +- set_fs(fs); +- pEEPROM->bloadmac_fail_flag = _FALSE; +- filp_close(fp, NULL); + } + +- if ( (_rtw_memcmp(pEEPROM->mac_addr, null_mac_addr, ETH_ALEN)) || +- (_rtw_memcmp(pEEPROM->mac_addr, multi_mac_addr, ETH_ALEN)) ) { +- pEEPROM->mac_addr[0] = 0x00; +- pEEPROM->mac_addr[1] = 0xe0; +- pEEPROM->mac_addr[2] = 0x4c; +- pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ; +- pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ; +- pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ; ++ set_fs(fs); ++ ++ DBG_871X_LEVEL(_drv_always_, "efuse file: %s\n", path); ++#ifdef CONFIG_DEBUG ++ for (i = 0; i < HWSET_MAX_SIZE; i++) { ++ if (i % 16 == 0) ++ DBG_871X_SEL_NL(RTW_DBGDUMP, "0x%03x: ", i); ++ ++ DBG_871X_SEL(RTW_DBGDUMP, "%02X%s" ++ , buf[i] ++ , ((i + 1) % 16 == 0) ? "\n" : (((i + 1) % 8 == 0) ? " " : " ") ++ ); + } ++ DBG_871X_SEL(RTW_DBGDUMP, "\n"); ++#endif + +- DBG_871X("Hal_ReadMACAddrFromFile: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x !!!\n", +- pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], +- pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], +- pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); +-} ++ ret = _SUCCESS; + ++exit: ++ return ret; ++} + +-u32 Rtw_Hal_readPGDataFromConfigFile(PADAPTER padapter) ++u32 rtw_read_macaddr_from_file(const char *path, u8 *buf) + { +- u32 i; + struct file *fp; + mm_segment_t fs; +- u8 temp[3]; + loff_t pos = 0; +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- u8 *PROMContent = pEEPROM->efuse_eeprom_data; + ++ u8 source_addr[18]; ++ u8 *head, *end; ++ int i; ++ u32 ret = _FAIL; + +- temp[2] = 0; // add end of string '\0' ++ _rtw_memset(source_addr, 0, 18); + +- fp = filp_open("/system/etc/wifi/wifi_efuse.map", O_RDWR, 0644); +- if (IS_ERR(fp)) { +- pEEPROM->bloadfile_fail_flag = _TRUE; +- DBG_871X("Error, Efuse configure file doesn't exist.\n"); +- return _FAIL; ++ fp = filp_open(path, O_RDONLY, 0); ++ if (fp == NULL || IS_ERR(fp)) { ++ if (fp != NULL) ++ DBG_871X_LEVEL(_drv_always_, "%s open %s fail, err:%ld\n" ++ , __func__, path, PTR_ERR(fp)); ++ else ++ DBG_871X_LEVEL(_drv_always_, "%s open %s fail, fp is NULL\n" ++ , __func__, path); ++ ++ goto exit; + } + + fs = get_fs(); + set_fs(KERNEL_DS); + +- DBG_871X("Efuse configure file:\n"); +- for (i=0; i< EFUSE_MAP_SIZE ; i++) { +- vfs_read(fp, temp, 2, &pos); +- PROMContent[i] = simple_strtoul(temp, NULL, 16 ); +- pos += 1; // Filter the space character +- DBG_871X("%02X \n", PROMContent[i]); ++ vfs_read(fp, source_addr, 18, &pos); ++ source_addr[17] = ':'; ++ ++ head = end = source_addr; ++ for (i = 0; i < ETH_ALEN; i++) { ++ while (end && (*end != ':')) ++ end++; ++ ++ if (end && (*end == ':')) ++ *end = '\0'; ++ ++ if (sscanf(head, "%hhx", &buf[i]) != 1) { ++ if (0) ++ DBG_871X_LEVEL(_drv_err_, "%s sscanf fail\n", __func__); ++ buf[i] = 0xFF; ++ } ++ ++ if (end) { ++ end++; ++ head = end; ++ } + } +- DBG_871X("\n"); ++ + set_fs(fs); + +- filp_close(fp, NULL); +- +- pEEPROM->bloadfile_fail_flag = _FALSE; +- +- return _SUCCESS; ++ DBG_871X_LEVEL(_drv_always_, "wifi_mac file: %s\n", path); ++#ifdef CONFIG_DEBUG ++ DBG_871X(MAC_FMT"\n", MAC_ARG(buf)); ++#endif ++ ++ ret = _SUCCESS; ++ ++exit: ++ return ret; + } ++#endif /* CONFIG_EFUSE_CONFIG_FILE */ ++ ++#endif /* PLATFORM_LINUX */ + +-#endif //#CONFIG_EFUSE_CONFIG_FILE +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ap.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ap.c +old mode 100755 +new mode 100644 +index ca63436..5aa5fa8 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ap.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ap.c +@@ -1,3515 +1,4210 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#define _RTW_AP_C_ +- +-#include +- +- +-#ifdef CONFIG_AP_MODE +- +-extern unsigned char RTW_WPA_OUI[]; +-extern unsigned char WMM_OUI[]; +-extern unsigned char WPS_OUI[]; +-extern unsigned char P2P_OUI[]; +-extern unsigned char WFD_OUI[]; +- +-void init_mlme_ap_info(_adapter *padapter) +-{ +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; +- +- +- _rtw_spinlock_init(&pmlmepriv->bcn_update_lock); +- +- //for ACL +- _rtw_init_queue(&pacl_list->acl_node_q); +- +- //pmlmeext->bstart_bss = _FALSE; +- +- start_ap_mode(padapter); +-} +- +-void free_mlme_ap_info(_adapter *padapter) +-{ +- _irqL irqL; +- struct sta_info *psta=NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- //stop_ap_mode(padapter); +- +- pmlmepriv->update_bcn = _FALSE; +- pmlmeext->bstart_bss = _FALSE; +- +- rtw_sta_flush(padapter); +- +- pmlmeinfo->state = _HW_STATE_NOLINK_; +- +- //free_assoc_sta_resources +- rtw_free_all_stainfo(padapter); +- +- //free bc/mc sta_info +- psta = rtw_get_bcmc_stainfo(padapter); +- //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); +- rtw_free_stainfo(padapter, psta); +- //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); +- +- +- _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); +- +-} +- +-static void update_BCNTIM(_adapter *padapter) +-{ +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); +- unsigned char *pie = pnetwork_mlmeext->IEs; +- +- //DBG_871X("%s\n", __FUNCTION__); +- +- //update TIM IE +- //if(pstapriv->tim_bitmap) +- if(_TRUE) +- { +- u8 *p, *dst_ie, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; +- u16 tim_bitmap_le; +- uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen; +- +- tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap); +- +- p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen, pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_); +- if (p != NULL && tim_ielen>0) +- { +- tim_ielen += 2; +- +- premainder_ie = p+tim_ielen; +- +- tim_ie_offset = (sint)(p -pie); +- +- remainder_ielen = pnetwork_mlmeext->IELength - tim_ie_offset - tim_ielen; +- +- //append TIM IE from dst_ie offset +- dst_ie = p; +- } +- else +- { +- tim_ielen = 0; +- +- //calucate head_len +- offset = _FIXED_IE_LENGTH_; +- +- /* get ssid_ie len */ +- p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SSID_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); +- if (p != NULL) +- offset += tmp_len+2; +- +- // get supported rates len +- p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); +- if (p != NULL) +- { +- offset += tmp_len+2; +- } +- +- //DS Parameter Set IE, len=3 +- offset += 3; +- +- premainder_ie = pie + offset; +- +- remainder_ielen = pnetwork_mlmeext->IELength - offset - tim_ielen; +- +- //append TIM IE from offset +- dst_ie = pie + offset; +- +- } +- +- +- if(remainder_ielen>0) +- { +- pbackup_remainder_ie = rtw_malloc(remainder_ielen); +- if(pbackup_remainder_ie && premainder_ie) +- _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); +- } +- +- *dst_ie++=_TIM_IE_; +- +- if((pstapriv->tim_bitmap&0xff00) && (pstapriv->tim_bitmap&0x00fe)) +- tim_ielen = 5; +- else +- tim_ielen = 4; +- +- *dst_ie++= tim_ielen; +- +- *dst_ie++=0;//DTIM count +- *dst_ie++=1;//DTIM peroid +- +- if(pstapriv->tim_bitmap&BIT(0))//for bc/mc frames +- *dst_ie++ = BIT(0);//bitmap ctrl +- else +- *dst_ie++ = 0; +- +- if(tim_ielen==4) +- { +- u8 pvb=0; +- +- if(pstapriv->tim_bitmap&0x00fe) +- pvb = (u8)tim_bitmap_le; +- else if(pstapriv->tim_bitmap&0xff00) +- pvb = (u8)(tim_bitmap_le>>8); +- else +- pvb = (u8)tim_bitmap_le; +- +- *dst_ie++ = pvb; +- +- } +- else if(tim_ielen==5) +- { +- _rtw_memcpy(dst_ie, &tim_bitmap_le, 2); +- dst_ie+=2; +- } +- +- //copy remainder IE +- if(pbackup_remainder_ie) +- { +- _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); +- +- rtw_mfree(pbackup_remainder_ie, remainder_ielen); +- } +- +- offset = (uint)(dst_ie - pie); +- pnetwork_mlmeext->IELength = offset + remainder_ielen; +- +- } +-} +- +-void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len) +-{ +- PNDIS_802_11_VARIABLE_IEs pIE; +- u8 bmatch = _FALSE; +- u8 *pie = pnetwork->IEs; +- u8 *p=NULL, *dst_ie=NULL, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; +- u32 i, offset, ielen, ie_offset, remainder_ielen = 0; +- +- for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pnetwork->IELength;) +- { +- pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); +- +- if (pIE->ElementID > index) +- { +- break; +- } +- else if(pIE->ElementID == index) // already exist the same IE +- { +- p = (u8 *)pIE; +- ielen = pIE->Length; +- bmatch = _TRUE; +- break; +- } +- +- p = (u8 *)pIE; +- ielen = pIE->Length; +- i += (pIE->Length + 2); +- } +- +- if (p != NULL && ielen>0) +- { +- ielen += 2; +- +- premainder_ie = p+ielen; +- +- ie_offset = (sint)(p -pie); +- +- remainder_ielen = pnetwork->IELength - ie_offset - ielen; +- +- if(bmatch) +- dst_ie = p; +- else +- dst_ie = (p+ielen); +- } +- +- if(dst_ie == NULL) +- return; +- +- if(remainder_ielen>0) +- { +- pbackup_remainder_ie = rtw_malloc(remainder_ielen); +- if(pbackup_remainder_ie && premainder_ie) +- _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); +- } +- +- *dst_ie++=index; +- *dst_ie++=len; +- +- _rtw_memcpy(dst_ie, data, len); +- dst_ie+=len; +- +- //copy remainder IE +- if(pbackup_remainder_ie) +- { +- _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); +- +- rtw_mfree(pbackup_remainder_ie, remainder_ielen); +- } +- +- offset = (uint)(dst_ie - pie); +- pnetwork->IELength = offset + remainder_ielen; +-} +- +-void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index) +-{ +- u8 *p, *dst_ie=NULL, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; +- uint offset, ielen, ie_offset, remainder_ielen = 0; +- u8 *pie = pnetwork->IEs; +- +- p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, index, &ielen, pnetwork->IELength - _FIXED_IE_LENGTH_); +- if (p != NULL && ielen>0) +- { +- ielen += 2; +- +- premainder_ie = p+ielen; +- +- ie_offset = (sint)(p -pie); +- +- remainder_ielen = pnetwork->IELength - ie_offset - ielen; +- +- dst_ie = p; +- } +- else { +- return; +- } +- +- if(remainder_ielen>0) +- { +- pbackup_remainder_ie = rtw_malloc(remainder_ielen); +- if(pbackup_remainder_ie && premainder_ie) +- _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); +- } +- +- //copy remainder IE +- if(pbackup_remainder_ie) +- { +- _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); +- +- rtw_mfree(pbackup_remainder_ie, remainder_ielen); +- } +- +- offset = (uint)(dst_ie - pie); +- pnetwork->IELength = offset + remainder_ielen; +-} +- +- +-u8 chk_sta_is_alive(struct sta_info *psta); +-u8 chk_sta_is_alive(struct sta_info *psta) +-{ +- u8 ret = _FALSE; +- #ifdef DBG_EXPIRATION_CHK +- DBG_871X("sta:"MAC_FMT", rssi:%d, rx:"STA_PKTS_FMT", expire_to:%u, %s%ssq_len:%u\n" +- , MAC_ARG(psta->hwaddr) +- , psta->rssi_stat.UndecoratedSmoothedPWDB +- //, STA_RX_PKTS_ARG(psta) +- , STA_RX_PKTS_DIFF_ARG(psta) +- , psta->expire_to +- , psta->state&WIFI_SLEEP_STATE?"PS, ":"" +- , psta->state&WIFI_STA_ALIVE_CHK_STATE?"SAC, ":"" +- , psta->sleepq_len +- ); +- #endif +- +- //if(sta_last_rx_pkts(psta) == sta_rx_pkts(psta)) +- if((psta->sta_stats.last_rx_data_pkts + psta->sta_stats.last_rx_ctrl_pkts) == (psta->sta_stats.rx_data_pkts + psta->sta_stats.rx_ctrl_pkts)) +- { +- #if 0 +- if(psta->state&WIFI_SLEEP_STATE) +- ret = _TRUE; +- #endif +- } +- else +- { +- ret = _TRUE; +- } +- +- sta_update_last_rx_pkts(psta); +- +- return ret; +-} +- +-void expire_timeout_chk(_adapter *padapter) +-{ +- _irqL irqL; +- _list *phead, *plist; +- u8 updated = _FALSE; +- struct sta_info *psta=NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- u8 chk_alive_num = 0; +- char chk_alive_list[NUM_STA]; +- int i; +- +- +- _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); +- +- phead = &pstapriv->auth_list; +- plist = get_next(phead); +- +- //check auth_queue +- #ifdef DBG_EXPIRATION_CHK +- if (rtw_end_of_queue_search(phead, plist) == _FALSE) { +- DBG_871X(FUNC_NDEV_FMT" auth_list, cnt:%u\n" +- , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->auth_list_cnt); +- } +- #endif +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) +- { +- psta = LIST_CONTAINOR(plist, struct sta_info, auth_list); +- +- plist = get_next(plist); +- +- +-#ifdef CONFIG_ATMEL_RC_PATCH +- if (_TRUE == _rtw_memcmp((void *)(pstapriv->atmel_rc_pattern), (void *)(psta->hwaddr), ETH_ALEN)) +- continue; +- if (psta->flag_atmel_rc) +- continue; +-#endif +- if(psta->expire_to>0) +- { +- psta->expire_to--; +- if (psta->expire_to == 0) +- { +- rtw_list_delete(&psta->auth_list); +- pstapriv->auth_list_cnt--; +- +- DBG_871X("auth expire %02X%02X%02X%02X%02X%02X\n", +- psta->hwaddr[0],psta->hwaddr[1],psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]); +- +- _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); +- +- //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); +- rtw_free_stainfo(padapter, psta); +- //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); +- +- _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); +- } +- } +- +- } +- +- _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); +- psta = NULL; +- +- +- _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- phead = &pstapriv->asoc_list; +- plist = get_next(phead); +- +- //check asoc_queue +- #ifdef DBG_EXPIRATION_CHK +- if (rtw_end_of_queue_search(phead, plist) == _FALSE) { +- DBG_871X(FUNC_NDEV_FMT" asoc_list, cnt:%u\n" +- , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->asoc_list_cnt); +- } +- #endif +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) +- { +- psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); +- plist = get_next(plist); +-#ifdef CONFIG_ATMEL_RC_PATCH +- DBG_871X("%s:%d psta=%p, %02x,%02x||%02x,%02x \n\n", __func__, __LINE__, +- psta,pstapriv->atmel_rc_pattern[0], pstapriv->atmel_rc_pattern[5], psta->hwaddr[0], psta->hwaddr[5]); +- if (_TRUE == _rtw_memcmp((void *)pstapriv->atmel_rc_pattern, (void *)(psta->hwaddr), ETH_ALEN)) +- continue; +- if (psta->flag_atmel_rc) +- continue; +- DBG_871X("%s: debug line:%d \n", __func__, __LINE__); +-#endif +-#ifdef CONFIG_AUTO_AP_MODE +- if(psta->isrc) +- continue; +-#endif +- if (chk_sta_is_alive(psta) || !psta->expire_to) { +- psta->expire_to = pstapriv->expire_to; +- psta->keep_alive_trycnt = 0; +- #ifdef CONFIG_TX_MCAST2UNI +- psta->under_exist_checking = 0; +- #endif // CONFIG_TX_MCAST2UNI +- } else { +- psta->expire_to--; +- } +- +-#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK +-#ifdef CONFIG_80211N_HT +-#ifdef CONFIG_TX_MCAST2UNI +- if ( (psta->flags & WLAN_STA_HT) && (psta->htpriv.agg_enable_bitmap || psta->under_exist_checking) ) { +- // check sta by delba(addba) for 11n STA +- // ToDo: use CCX report to check for all STAs +- //DBG_871X("asoc check by DELBA/ADDBA! (pstapriv->expire_to=%d s)(psta->expire_to=%d s), [%02x, %d]\n", pstapriv->expire_to*2, psta->expire_to*2, psta->htpriv.agg_enable_bitmap, psta->under_exist_checking); +- +- if ( psta->expire_to <= (pstapriv->expire_to - 50 ) ) { +- DBG_871X("asoc expire by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); +- psta->under_exist_checking = 0; +- psta->expire_to = 0; +- } else if ( psta->expire_to <= (pstapriv->expire_to - 3) && (psta->under_exist_checking==0)) { +- DBG_871X("asoc check by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); +- psta->under_exist_checking = 1; +- //tear down TX AMPDU +- send_delba(padapter, 1, psta->hwaddr);// // originator +- psta->htpriv.agg_enable_bitmap = 0x0;//reset +- psta->htpriv.candidate_tid_bitmap = 0x0;//reset +- } +- } +-#endif //CONFIG_TX_MCAST2UNI +-#endif //CONFIG_80211N_HT +-#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK +- +- if (psta->expire_to <= 0) +- { +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- +- if (padapter->registrypriv.wifi_spec == 1) +- { +- psta->expire_to = pstapriv->expire_to; +- continue; +- } +- +-#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK +-#ifdef CONFIG_80211N_HT +- +-#define KEEP_ALIVE_TRYCNT (3) +- +- if(psta->keep_alive_trycnt > 0 && psta->keep_alive_trycnt <= KEEP_ALIVE_TRYCNT) +- { +- if(psta->state & WIFI_STA_ALIVE_CHK_STATE) +- psta->state ^= WIFI_STA_ALIVE_CHK_STATE; +- else +- psta->keep_alive_trycnt = 0; +- +- } +- else if((psta->keep_alive_trycnt > KEEP_ALIVE_TRYCNT) && !(psta->state & WIFI_STA_ALIVE_CHK_STATE)) +- { +- psta->keep_alive_trycnt = 0; +- } +- if((psta->htpriv.ht_option==_TRUE) && (psta->htpriv.ampdu_enable==_TRUE)) +- { +- uint priority = 1; //test using BK +- u8 issued=0; +- +- //issued = (psta->htpriv.agg_enable_bitmap>>priority)&0x1; +- issued |= (psta->htpriv.candidate_tid_bitmap>>priority)&0x1; +- +- if(0==issued) +- { +- if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) +- { +- psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); +- +- if (psta->state & WIFI_SLEEP_STATE) +- psta->expire_to = 2; // 2x2=4 sec +- else +- psta->expire_to = 1; // 2 sec +- +- psta->state |= WIFI_STA_ALIVE_CHK_STATE; +- +- //add_ba_hdl(padapter, (u8*)paddbareq_parm); +- +- DBG_871X("issue addba_req to check if sta alive, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); +- +- issue_action_BA(padapter, psta->hwaddr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)priority); +- +- _set_timer(&psta->addba_retry_timer, ADDBA_TO); +- +- psta->keep_alive_trycnt++; +- +- continue; +- } +- } +- } +- if(psta->keep_alive_trycnt > 0 && psta->state & WIFI_STA_ALIVE_CHK_STATE) +- { +- psta->keep_alive_trycnt = 0; +- psta->state ^= WIFI_STA_ALIVE_CHK_STATE; +- DBG_871X("change to another methods to check alive if staion is at ps mode\n"); +- } +- +-#endif //CONFIG_80211N_HT +-#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK +- if (psta->state & WIFI_SLEEP_STATE) { +- if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) { +- //to check if alive by another methods if staion is at ps mode. +- psta->expire_to = pstapriv->expire_to; +- psta->state |= WIFI_STA_ALIVE_CHK_STATE; +- +- //DBG_871X("alive chk, sta:" MAC_FMT " is at ps mode!\n", MAC_ARG(psta->hwaddr)); +- +- //to update bcn with tim_bitmap for this station +- pstapriv->tim_bitmap |= BIT(psta->aid); +- update_beacon(padapter, _TIM_IE_, NULL, _TRUE); +- +- if(!pmlmeext->active_keep_alive_check) +- continue; +- } +- } +- #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK +- if (pmlmeext->active_keep_alive_check) { +- int stainfo_offset; +- +- stainfo_offset = rtw_stainfo_offset(pstapriv, psta); +- if (stainfo_offset_valid(stainfo_offset)) { +- chk_alive_list[chk_alive_num++] = stainfo_offset; +- } +- +- continue; +- } +- #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ +- rtw_list_delete(&psta->asoc_list); +- pstapriv->asoc_list_cnt--; +- DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); +- updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING); +- } +- else +- { +- /* TODO: Aging mechanism to digest frames in sleep_q to avoid running out of xmitframe */ +- if (psta->sleepq_len > (NR_XMITFRAME/pstapriv->asoc_list_cnt) +- && padapter->xmitpriv.free_xmitframe_cnt < ((NR_XMITFRAME/pstapriv->asoc_list_cnt)/2) +- ){ +- DBG_871X("%s sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n", __func__ +- , MAC_ARG(psta->hwaddr) +- , psta->sleepq_len, padapter->xmitpriv.free_xmitframe_cnt, pstapriv->asoc_list_cnt); +- wakeup_sta_to_xmit(padapter, psta); +- } +- } +- } +- +- _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +-#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK +-if (chk_alive_num) { +- +- u8 backup_oper_channel=0; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- /* switch to correct channel of current network before issue keep-alive frames */ +- if (rtw_get_oper_ch(padapter) != pmlmeext->cur_channel) { +- backup_oper_channel = rtw_get_oper_ch(padapter); +- SelectChannel(padapter, pmlmeext->cur_channel); +- } +- +- /* issue null data to check sta alive*/ +- for (i = 0; i < chk_alive_num; i++) { +- int ret = _FAIL; +- +- psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); +-#ifdef CONFIG_ATMEL_RC_PATCH +- if (_TRUE == _rtw_memcmp( pstapriv->atmel_rc_pattern, psta->hwaddr, ETH_ALEN)) +- continue; +- if (psta->flag_atmel_rc) +- continue; +-#endif +- if(!(psta->state &_FW_LINKED)) +- continue; +- +- if (psta->state & WIFI_SLEEP_STATE) +- ret = issue_nulldata(padapter, psta->hwaddr, 0, 1, 50); +- else +- ret = issue_nulldata(padapter, psta->hwaddr, 0, 3, 50); +- +- psta->keep_alive_trycnt++; +- if (ret == _SUCCESS) +- { +- DBG_871X("asoc check, sta(" MAC_FMT ") is alive\n", MAC_ARG(psta->hwaddr)); +- psta->expire_to = pstapriv->expire_to; +- psta->keep_alive_trycnt = 0; +- continue; +- } +- else if (psta->keep_alive_trycnt <= 3) +- { +- DBG_871X("ack check for asoc expire, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); +- psta->expire_to = 1; +- continue; +- } +- +- psta->keep_alive_trycnt = 0; +- DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); +- _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- if (rtw_is_list_empty(&psta->asoc_list)==_FALSE) { +- rtw_list_delete(&psta->asoc_list); +- pstapriv->asoc_list_cnt--; +- updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING); +- } +- _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- } +- +- if (backup_oper_channel>0) /* back to the original operation channel */ +- SelectChannel(padapter, backup_oper_channel); +-} +-#endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ +- +- associated_clients_update(padapter, updated); +-} +- +-void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level) +-{ +- int i; +- u8 rf_type; +- unsigned char sta_band = 0, shortGIrate = _FALSE; +- unsigned int tx_ra_bitmap=0; +- struct ht_priv *psta_ht = NULL; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; +- +-#ifdef CONFIG_80211N_HT +- if(psta) +- psta_ht = &psta->htpriv; +- else +- return; +-#endif //CONFIG_80211N_HT +- +- if(!(psta->state & _FW_LINKED)) +- return; +- +-#if 0//gtest +- if(get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R) +- { +- //is this a 2r STA? +- if((pstat->tx_ra_bitmap & 0x0ff00000) != 0 && !(priv->pshare->has_2r_sta & BIT(pstat->aid))) +- { +- priv->pshare->has_2r_sta |= BIT(pstat->aid); +- if(rtw_read16(padapter, 0x102501f6) != 0xffff) +- { +- rtw_write16(padapter, 0x102501f6, 0xffff); +- reset_1r_sta_RA(priv, 0xffff); +- Switch_1SS_Antenna(priv, 3); +- } +- } +- else// bg or 1R STA? +- { +- if((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len && priv->pshare->has_2r_sta == 0) +- { +- if(rtw_read16(padapter, 0x102501f6) != 0x7777) +- { // MCS7 SGI +- rtw_write16(padapter, 0x102501f6,0x7777); +- reset_1r_sta_RA(priv, 0x7777); +- Switch_1SS_Antenna(priv, 2); +- } +- } +- } +- +- } +- +- if ((pstat->rssi_level < 1) || (pstat->rssi_level > 3)) +- { +- if (pstat->rssi >= priv->pshare->rf_ft_var.raGoDownUpper) +- pstat->rssi_level = 1; +- else if ((pstat->rssi >= priv->pshare->rf_ft_var.raGoDown20MLower) || +- ((priv->pshare->is_40m_bw) && (pstat->ht_cap_len) && +- (pstat->rssi >= priv->pshare->rf_ft_var.raGoDown40MLower) && +- (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_SUPPORT_CH_WDTH_)))) +- pstat->rssi_level = 2; +- else +- pstat->rssi_level = 3; +- } +- +- // rate adaptive by rssi +- if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len) +- { +- if ((get_rf_mimo_mode(priv) == MIMO_1T2R) || (get_rf_mimo_mode(priv) == MIMO_1T1R)) +- { +- switch (pstat->rssi_level) { +- case 1: +- pstat->tx_ra_bitmap &= 0x100f0000; +- break; +- case 2: +- pstat->tx_ra_bitmap &= 0x100ff000; +- break; +- case 3: +- if (priv->pshare->is_40m_bw) +- pstat->tx_ra_bitmap &= 0x100ff005; +- else +- pstat->tx_ra_bitmap &= 0x100ff001; +- +- break; +- } +- } +- else +- { +- switch (pstat->rssi_level) { +- case 1: +- pstat->tx_ra_bitmap &= 0x1f0f0000; +- break; +- case 2: +- pstat->tx_ra_bitmap &= 0x1f0ff000; +- break; +- case 3: +- if (priv->pshare->is_40m_bw) +- pstat->tx_ra_bitmap &= 0x000ff005; +- else +- pstat->tx_ra_bitmap &= 0x000ff001; +- +- break; +- } +- +- // Don't need to mask high rates due to new rate adaptive parameters +- //if (pstat->is_broadcom_sta) // use MCS12 as the highest rate vs. Broadcom sta +- // pstat->tx_ra_bitmap &= 0x81ffffff; +- +- // NIC driver will report not supporting MCS15 and MCS14 in asoc req +- //if (pstat->is_rtl8190_sta && !pstat->is_2t_mimo_sta) +- // pstat->tx_ra_bitmap &= 0x83ffffff; // if Realtek 1x2 sta, don't use MCS15 and MCS14 +- } +- } +- else if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) && isErpSta(pstat)) +- { +- switch (pstat->rssi_level) { +- case 1: +- pstat->tx_ra_bitmap &= 0x00000f00; +- break; +- case 2: +- pstat->tx_ra_bitmap &= 0x00000ff0; +- break; +- case 3: +- pstat->tx_ra_bitmap &= 0x00000ff5; +- break; +- } +- } +- else +- { +- pstat->tx_ra_bitmap &= 0x0000000d; +- } +- +- // disable tx short GI when station cannot rx MCS15(AP is 2T2R) +- // disable tx short GI when station cannot rx MCS7 (AP is 1T2R or 1T1R) +- // if there is only 1r STA and we are 2T2R, DO NOT mask SGI rate +- if ((!(pstat->tx_ra_bitmap & 0x8000000) && (priv->pshare->has_2r_sta > 0) && (get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R)) || +- (!(pstat->tx_ra_bitmap & 0x80000) && (get_rf_mimo_mode(padapter) != RTL8712_RF_2T2R))) +- { +- pstat->tx_ra_bitmap &= ~BIT(28); +- } +-#endif +- +- rtw_hal_update_sta_rate_mask(padapter, psta); +- tx_ra_bitmap = psta->ra_mask; +- +- shortGIrate = query_ra_short_GI(psta); +- +- if ( pcur_network->Configuration.DSConfig > 14 ) { +- +- if (tx_ra_bitmap & 0xffff000) +- sta_band |= WIRELESS_11_5N ; +- +- if (tx_ra_bitmap & 0xff0) +- sta_band |= WIRELESS_11A; +- +- // 5G band +- #ifdef CONFIG_80211AC_VHT +- if (psta->vhtpriv.vht_option) { +- sta_band = WIRELESS_11_5AC; +- } +- #endif +- +- } else { +- if (tx_ra_bitmap & 0xffff000) +- sta_band |= WIRELESS_11_24N; +- +- if (tx_ra_bitmap & 0xff0) +- sta_band |= WIRELESS_11G; +- +- if (tx_ra_bitmap & 0x0f) +- sta_band |= WIRELESS_11B; +- } +- +- psta->wireless_mode = sta_band; +- psta->raid = rtw_hal_networktype_to_raid(padapter, psta); +- +- if (psta->aid < NUM_STA) +- { +- u8 arg[4] = {0}; +- +- arg[0] = psta->mac_id; +- arg[1] = psta->raid; +- arg[2] = shortGIrate; +- arg[3] = psta->init_rate; +- +- DBG_871X("%s=> mac_id:%d , raid:%d , shortGIrate=%d, bitmap=0x%x\n", +- __FUNCTION__ , psta->mac_id, psta->raid ,shortGIrate, tx_ra_bitmap); +- +- rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, rssi_level); +- } +- else +- { +- DBG_871X("station aid %d exceed the max number\n", psta->aid); +- } +- +-} +- +-void update_bmc_sta(_adapter *padapter) +-{ +- _irqL irqL; +- unsigned char network_type; +- int supportRateNum = 0; +- unsigned int tx_ra_bitmap=0; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; +- struct sta_info *psta = rtw_get_bcmc_stainfo(padapter); +- +- if(psta) +- { +- psta->aid = 0;//default set to 0 +- +- pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; +- +- psta->qos_option = 0; +-#ifdef CONFIG_80211N_HT +- psta->htpriv.ht_option = _FALSE; +-#endif //CONFIG_80211N_HT +- +- psta->ieee8021x_blocked = 0; +- +- _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); +- +- //psta->dot118021XPrivacy = _NO_PRIVACY_;//!!! remove it, because it has been set before this. +- +- //prepare for add_RATid +- supportRateNum = rtw_get_rateset_len((u8*)&pcur_network->SupportedRates); +- network_type = rtw_check_network_type((u8*)&pcur_network->SupportedRates, supportRateNum, pcur_network->Configuration.DSConfig); +- if (IsSupportedTxCCK(network_type)) { +- network_type = WIRELESS_11B; +- } +- else if (network_type == WIRELESS_INVALID) { // error handling +- if ( pcur_network->Configuration.DSConfig > 14 ) +- network_type = WIRELESS_11A; +- else +- network_type = WIRELESS_11B; +- } +- update_sta_basic_rate(psta, network_type); +- psta->wireless_mode = network_type; +- +- rtw_hal_update_sta_rate_mask(padapter, psta); +- tx_ra_bitmap = psta->ra_mask; +- +- psta->raid = rtw_hal_networktype_to_raid(padapter,psta); +- +- //ap mode +- rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); +- +- //if(pHalData->fw_ractrl == _TRUE) +- { +- u8 arg[4] = {0}; +- +- arg[0] = psta->mac_id; +- arg[1] = psta->raid; +- arg[2] = 0; +- arg[3] = psta->init_rate; +- +- DBG_871X("%s=> mac_id:%d , raid:%d , bitmap=0x%x\n", +- __FUNCTION__ , psta->mac_id, psta->raid , tx_ra_bitmap); +- +- rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, 0); +- } +- +- rtw_sta_media_status_rpt(padapter, psta, 1); +- +- _enter_critical_bh(&psta->lock, &irqL); +- psta->state = _FW_LINKED; +- _exit_critical_bh(&psta->lock, &irqL); +- +- } +- else +- { +- DBG_871X("add_RATid_bmc_sta error!\n"); +- } +- +-} +- +-//notes: +-//AID: 1~MAX for sta and 0 for bc/mc in ap/adhoc mode +-//MAC_ID = AID+1 for sta in ap/adhoc mode +-//MAC_ID = 1 for bc/mc for sta/ap/adhoc +-//MAC_ID = 0 for bssid for sta/ap/adhoc +-//CAM_ID = //0~3 for default key, cmd_id=macid + 3, macid=aid+1; +- +-void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) +-{ +- _irqL irqL; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +-#ifdef CONFIG_80211N_HT +- struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; +- struct ht_priv *phtpriv_sta = &psta->htpriv; +-#endif //CONFIG_80211N_HT +- u8 cur_ldpc_cap=0, cur_stbc_cap=0, cur_beamform_cap=0; +- //set intf_tag to if1 +- //psta->intf_tag = 0; +- +- DBG_871X("%s\n",__FUNCTION__); +- +- //psta->mac_id = psta->aid+4; +- //psta->mac_id = psta->aid+1;//alloc macid when call rtw_alloc_stainfo(), +- //release macid when call rtw_free_stainfo() +- +- //ap mode +- rtw_hal_set_odm_var(padapter,HAL_ODM_STA_INFO,psta,_TRUE); +- +- if(psecuritypriv->dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) +- psta->ieee8021x_blocked = _TRUE; +- else +- psta->ieee8021x_blocked = _FALSE; +- +- +- //update sta's cap +- +- //ERP +- VCS_update(padapter, psta); +-#ifdef CONFIG_80211N_HT +- //HT related cap +- if(phtpriv_sta->ht_option) +- { +- //check if sta supports rx ampdu +- phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable; +- +- phtpriv_sta->rx_ampdu_min_spacing = (phtpriv_sta->ht_cap.ampdu_params_info&IEEE80211_HT_CAP_AMPDU_DENSITY)>>2; +- +- // bwmode +- if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) +- { +- psta->bw_mode = CHANNEL_WIDTH_40; +- } +- else +- { +- psta->bw_mode = CHANNEL_WIDTH_20; +- } +- +- if(pmlmeext->cur_bwmode < psta->bw_mode) +- { +- psta->bw_mode = pmlmeext->cur_bwmode; +- } +- +- phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; +- +- +- //check if sta support s Short GI 20M +- if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) +- { +- phtpriv_sta->sgi_20m = _TRUE; +- } +- +- //check if sta support s Short GI 40M +- if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) +- { +- if(psta->bw_mode == CHANNEL_WIDTH_40) //according to psta->bw_mode +- phtpriv_sta->sgi_40m = _TRUE; +- else +- phtpriv_sta->sgi_40m = _FALSE; +- } +- +- psta->qos_option = _TRUE; +- +- // B0 Config LDPC Coding Capability +- if (TEST_FLAG(phtpriv_ap->ldpc_cap, LDPC_HT_ENABLE_TX) && +- GET_HT_CAP_ELE_LDPC_CAP((u8 *)(&phtpriv_sta->ht_cap))) +- { +- SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); +- DBG_871X("Enable HT Tx LDPC for STA(%d)\n",psta->aid); +- } +- +- // B7 B8 B9 Config STBC setting +- if (TEST_FLAG(phtpriv_ap->stbc_cap, STBC_HT_ENABLE_TX) && +- GET_HT_CAP_ELE_RX_STBC((u8 *)(&phtpriv_sta->ht_cap))) +- { +- SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX) ); +- DBG_871X("Enable HT Tx STBC for STA(%d)\n",psta->aid); +- } +- +-#ifdef CONFIG_BEAMFORMING +- // Config Tx beamforming setting +- if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && +- GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP((u8 *)(&phtpriv_sta->ht_cap))) +- { +- SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); +- } +- +- if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && +- GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP((u8 *)(&phtpriv_sta->ht_cap))) +- { +- SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); +- } +- +- if (cur_beamform_cap) { +- DBG_871X("Client STA(%d) HT Beamforming Cap = 0x%02X\n", psta->aid, cur_beamform_cap); +- } +-#endif //CONFIG_BEAMFORMING +- } +- else +- { +- phtpriv_sta->ampdu_enable = _FALSE; +- +- phtpriv_sta->sgi_20m = _FALSE; +- phtpriv_sta->sgi_40m = _FALSE; +- psta->bw_mode = CHANNEL_WIDTH_20; +- phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- } +- +- phtpriv_sta->ldpc_cap = cur_ldpc_cap; +- phtpriv_sta->stbc_cap = cur_stbc_cap; +- phtpriv_sta->beamform_cap = cur_beamform_cap; +- +- //Rx AMPDU +- send_delba(padapter, 0, psta->hwaddr);// recipient +- +- //TX AMPDU +- send_delba(padapter, 1, psta->hwaddr);// // originator +- phtpriv_sta->agg_enable_bitmap = 0x0;//reset +- phtpriv_sta->candidate_tid_bitmap = 0x0;//reset +-#endif //CONFIG_80211N_HT +- +-#ifdef CONFIG_80211AC_VHT +- update_sta_vht_info_apmode(padapter, psta); +-#endif +- +- update_ldpc_stbc_cap(psta); +- +- //todo: init other variables +- +- _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); +- +- +- //add ratid +- //add_RATid(padapter, psta);//move to ap_sta_info_defer_update() +- +- +- _enter_critical_bh(&psta->lock, &irqL); +- psta->state |= _FW_LINKED; +- _exit_critical_bh(&psta->lock, &irqL); +- +- +-} +- +-static void update_ap_info(_adapter *padapter, struct sta_info *psta) +-{ +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +-#ifdef CONFIG_80211N_HT +- struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; +-#endif //CONFIG_80211N_HT +- +- +- psta->wireless_mode = pmlmeext->cur_wireless_mode; +- +- psta->bssratelen = rtw_get_rateset_len(pnetwork->SupportedRates); +- _rtw_memcpy(psta->bssrateset, pnetwork->SupportedRates, psta->bssratelen); +- +-#ifdef CONFIG_80211N_HT +- //HT related cap +- if(phtpriv_ap->ht_option) +- { +- //check if sta supports rx ampdu +- //phtpriv_ap->ampdu_enable = phtpriv_ap->ampdu_enable; +- +- //check if sta support s Short GI 20M +- if((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) +- { +- phtpriv_ap->sgi_20m = _TRUE; +- } +- //check if sta support s Short GI 40M +- if((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) +- { +- phtpriv_ap->sgi_40m = _TRUE; +- } +- +- psta->qos_option = _TRUE; +- } +- else +- { +- phtpriv_ap->ampdu_enable = _FALSE; +- +- phtpriv_ap->sgi_20m = _FALSE; +- phtpriv_ap->sgi_40m = _FALSE; +- } +- +- psta->bw_mode = pmlmeext->cur_bwmode; +- phtpriv_ap->ch_offset = pmlmeext->cur_ch_offset; +- +- phtpriv_ap->agg_enable_bitmap = 0x0;//reset +- phtpriv_ap->candidate_tid_bitmap = 0x0;//reset +- +- _rtw_memcpy(&psta->htpriv, &pmlmepriv->htpriv, sizeof(struct ht_priv)); +- +-#ifdef CONFIG_80211AC_VHT +- _rtw_memcpy(&psta->vhtpriv, &pmlmepriv->vhtpriv, sizeof(struct vht_priv)); +-#endif //CONFIG_80211AC_VHT +- +-#endif //CONFIG_80211N_HT +-} +- +-static void update_hw_ht_param(_adapter *padapter) +-{ +- unsigned char max_AMPDU_len; +- unsigned char min_MPDU_spacing; +- struct registry_priv *pregpriv = &padapter->registrypriv; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- DBG_871X("%s\n", __FUNCTION__); +- +- +- //handle A-MPDU parameter field +- /* +- AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k +- AMPDU_para [4:2]:Min MPDU Start Spacing +- */ +- max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; +- +- min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; +- +- rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); +- +- rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); +- +- // +- // Config SM Power Save setting +- // +- pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; +- if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) +- { +- /*u8 i; +- //update the MCS rates +- for (i = 0; i < 16; i++) +- { +- pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; +- }*/ +- DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); +- } +- +- // +- // Config current HT Protection mode. +- // +- //pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; +- +-} +- +-void start_bss_network(_adapter *padapter, u8 *pbuf) +-{ +- u8 *p; +- u8 val8, cur_channel, cur_bwmode, cur_ch_offset; +- u16 bcn_interval; +- u32 acparm; +- int ie_len; +- struct registry_priv *pregpriv = &padapter->registrypriv; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct security_priv* psecuritypriv=&(padapter->securitypriv); +- WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); +- struct HT_info_element *pht_info=NULL; +-#ifdef CONFIG_P2P +- struct wifidirect_info *pwdinfo = &(padapter->wdinfo); +-#endif //CONFIG_P2P +- u8 cbw40_enable=0; +- u8 change_band = _FALSE; +- +- //DBG_871X("%s\n", __FUNCTION__); +- +- bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod; +- cur_channel = pnetwork->Configuration.DSConfig; +- cur_bwmode = CHANNEL_WIDTH_20; +- cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- +- +- //check if there is wps ie, +- //if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, +- //and at first time the security ie ( RSN/WPA IE) will not include in beacon. +- if(NULL == rtw_get_wps_ie(pnetwork->IEs+_FIXED_IE_LENGTH_, pnetwork->IELength-_FIXED_IE_LENGTH_, NULL, NULL)) +- { +- pmlmeext->bstart_bss = _TRUE; +- } +- +- //todo: update wmm, ht cap +- //pmlmeinfo->WMM_enable; +- //pmlmeinfo->HT_enable; +- if(pmlmepriv->qospriv.qos_option) +- pmlmeinfo->WMM_enable = _TRUE; +-#ifdef CONFIG_80211N_HT +- if(pmlmepriv->htpriv.ht_option) +- { +- pmlmeinfo->WMM_enable = _TRUE; +- pmlmeinfo->HT_enable = _TRUE; +- //pmlmeinfo->HT_info_enable = _TRUE; +- //pmlmeinfo->HT_caps_enable = _TRUE; +- +- update_hw_ht_param(padapter); +- } +-#endif //#CONFIG_80211N_HT +- +-#ifdef CONFIG_80211AC_VHT +- if(pmlmepriv->vhtpriv.vht_option) { +- pmlmeinfo->VHT_enable = _TRUE; +- update_hw_vht_param(padapter); +- } +-#endif //CONFIG_80211AC_VHT +- +- if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time +- { +- //WEP Key will be set before this function, do not clear CAM. +- if ((psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)) +- flush_all_cam_entry(padapter); //clear CAM +- } +- +- //set MSR to AP_Mode +- Set_MSR(padapter, _HW_STATE_AP_); +- +- //Set BSSID REG +- rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pnetwork->MacAddress); +- +- //Set EDCA param reg +-#ifdef CONFIG_CONCURRENT_MODE +- acparm = 0x005ea42b; +-#else +- acparm = 0x002F3217; // VO +-#endif +- rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); +- acparm = 0x005E4317; // VI +- rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); +- //acparm = 0x00105320; // BE +- acparm = 0x005ea42b; +- rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); +- acparm = 0x0000A444; // BK +- rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); +- +- //Set Security +- val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; +- rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); +- +- //Beacon Control related register +- rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval)); +- +- rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, NULL); +- +- if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time +- { +- //u32 initialgain; +- +- //initialgain = 0x1e; +- +- +- //disable dynamic functions, such as high power, DIG +- //Save_DM_Func_Flag(padapter); +- //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); +- +- //turn on all dynamic functions +- Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE); +- +- //rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); +- +- } +-#ifdef CONFIG_80211N_HT +- //set channel, bwmode +- p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if( p && ie_len) +- { +- pht_info = (struct HT_info_element *)(p+2); +- +- if (cur_channel > 14) { +- if ((pregpriv->bw_mode & 0xf0) > 0) +- cbw40_enable = 1; +- } else { +- if ((pregpriv->bw_mode & 0x0f) > 0) +- cbw40_enable = 1; +- } +- +- if ((cbw40_enable) && (pht_info->infos[0] & BIT(2))) +- { +- //switch to the 40M Hz mode +- //pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; +- cur_bwmode = CHANNEL_WIDTH_40; +- switch (pht_info->infos[0] & 0x3) +- { +- case 1: +- //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; +- cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; +- break; +- +- case 3: +- //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; +- cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; +- break; +- +- default: +- //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- break; +- } +- +- } +- +- } +-#endif //CONFIG_80211N_HT +- +-#ifdef CONFIG_80211AC_VHT +- p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTOperation, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if( p && ie_len) +- { +- if(GET_VHT_OPERATION_ELE_CHL_WIDTH(p+2) >= 1) { +- cur_bwmode = CHANNEL_WIDTH_80; +- } +- } +-#endif +- +-#ifdef CONFIG_DUALMAC_CONCURRENT +- dc_set_ap_channel_bandwidth(padapter, cur_channel, cur_ch_offset, cur_bwmode); +-#else //!CONFIG_DUALMAC_CONCURRENT +-#ifdef CONFIG_CONCURRENT_MODE +- //TODO: need to judge the phy parameters on concurrent mode for single phy +- concurrent_set_ap_chbw(padapter, cur_channel, cur_ch_offset, cur_bwmode); +-#else //!CONFIG_CONCURRENT_MODE +- set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); +- DBG_871X("CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); +- pmlmeext->cur_channel = cur_channel; +- pmlmeext->cur_bwmode = cur_bwmode; +- pmlmeext->cur_ch_offset = cur_ch_offset; +-#endif //!CONFIG_CONCURRENT_MODE +-#endif //!CONFIG_DUALMAC_CONCURRENT +- +- pmlmeext->cur_wireless_mode = pmlmepriv->cur_network.network_type; +- +- //let pnetwork_mlmeext == pnetwork_mlme. +- _rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length); +- +- //update cur_wireless_mode +- update_wireless_mode(padapter); +- +- //update RRSR after set channel and bandwidth +- UpdateBrateTbl(padapter, pnetwork->SupportedRates); +- rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); +- +- //udpate capability after cur_wireless_mode updated +- update_capinfo(padapter, rtw_get_capability((WLAN_BSSID_EX *)pnetwork)); +- +- +-#ifdef CONFIG_P2P +- _rtw_memcpy(pwdinfo->p2p_group_ssid, pnetwork->Ssid.Ssid, pnetwork->Ssid.SsidLength); +- pwdinfo->p2p_group_ssid_len = pnetwork->Ssid.SsidLength; +-#endif //CONFIG_P2P +- +- if(_TRUE == pmlmeext->bstart_bss) +- { +- update_beacon(padapter, _TIM_IE_, NULL, _TRUE); +- +-#ifndef CONFIG_INTERRUPT_BASED_TXBCN //other case will tx beacon when bcn interrupt coming in. +-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +- //issue beacon frame +- if(send_beacon(padapter)==_FAIL) +- { +- DBG_871X("issue_beacon, fail!\n"); +- } +-#endif +-#endif //!CONFIG_INTERRUPT_BASED_TXBCN +- +- } +- +- +- //update bc/mc sta_info +- update_bmc_sta(padapter); +- +- //pmlmeext->bstart_bss = _TRUE; +- +-} +- +-int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) +-{ +- int ret=_SUCCESS; +- u8 *p; +- u8 *pHT_caps_ie=NULL; +- u8 *pHT_info_ie=NULL; +- struct sta_info *psta = NULL; +- u16 cap, ht_cap=_FALSE; +- uint ie_len = 0; +- int group_cipher, pairwise_cipher; +- u8 channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX]; +- int supportRateNum = 0; +- u8 OUI1[] = {0x00, 0x50, 0xf2,0x01}; +- u8 wps_oui[4]={0x0,0x50,0xf2,0x04}; +- u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; +- struct registry_priv *pregistrypriv = &padapter->registrypriv; +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; +- struct sta_priv *pstapriv = &padapter->stapriv; +- u8 *ie = pbss_network->IEs; +- u8 vht_cap=_FALSE; +- +- /* SSID */ +- /* Supported rates */ +- /* DS Params */ +- /* WLAN_EID_COUNTRY */ +- /* ERP Information element */ +- /* Extended supported rates */ +- /* WPA/WPA2 */ +- /* Wi-Fi Wireless Multimedia Extensions */ +- /* ht_capab, ht_oper */ +- /* WPS IE */ +- +- DBG_871X("%s, len=%d\n", __FUNCTION__, len); +- +- if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) +- return _FAIL; +- +- +- if(len>MAX_IE_SZ) +- return _FAIL; +- +- pbss_network->IELength = len; +- +- _rtw_memset(ie, 0, MAX_IE_SZ); +- +- _rtw_memcpy(ie, pbuf, pbss_network->IELength); +- +- +- if(pbss_network->InfrastructureMode!=Ndis802_11APMode) +- return _FAIL; +- +- pbss_network->Rssi = 0; +- +- _rtw_memcpy(pbss_network->MacAddress, myid(&(padapter->eeprompriv)), ETH_ALEN); +- +- //beacon interval +- p = rtw_get_beacon_interval_from_ie(ie);//ie + 8; // 8: TimeStamp, 2: Beacon Interval 2:Capability +- //pbss_network->Configuration.BeaconPeriod = le16_to_cpu(*(unsigned short*)p); +- pbss_network->Configuration.BeaconPeriod = RTW_GET_LE16(p); +- +- //capability +- //cap = *(unsigned short *)rtw_get_capability_from_ie(ie); +- //cap = le16_to_cpu(cap); +- cap = RTW_GET_LE16(ie); +- +- //SSID +- p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength -_BEACON_IE_OFFSET_)); +- if(p && ie_len>0) +- { +- _rtw_memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); +- _rtw_memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); +- pbss_network->Ssid.SsidLength = ie_len; +- } +- +- //chnnel +- channel = 0; +- pbss_network->Configuration.Length = 0; +- p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _DSSET_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); +- if(p && ie_len>0) +- channel = *(p + 2); +- +- pbss_network->Configuration.DSConfig = channel; +- +- +- _rtw_memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX); +- // get supported rates +- p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); +- if (p != NULL) +- { +- _rtw_memcpy(supportRate, p+2, ie_len); +- supportRateNum = ie_len; +- } +- +- //get ext_supported rates +- p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_); +- if (p != NULL) +- { +- _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); +- supportRateNum += ie_len; +- +- } +- +- network_type = rtw_check_network_type(supportRate, supportRateNum, channel); +- +- rtw_set_supported_rate(pbss_network->SupportedRates, network_type); +- +- +- //parsing ERP_IE +- p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); +- if(p && ie_len>0) +- { +- ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); +- } +- +- //update privacy/security +- if (cap & BIT(4)) +- pbss_network->Privacy = 1; +- else +- pbss_network->Privacy = 0; +- +- psecuritypriv->wpa_psk = 0; +- +- //wpa2 +- group_cipher = 0; pairwise_cipher = 0; +- psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; +- psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; +- p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); +- if(p && ie_len>0) +- { +- if(rtw_parse_wpa2_ie(p, ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) +- { +- psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; +- +- psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x +- psecuritypriv->wpa_psk |= BIT(1); +- +- psecuritypriv->wpa2_group_cipher = group_cipher; +- psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; +-#if 0 +- switch(group_cipher) +- { +- case WPA_CIPHER_NONE: +- psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; +- break; +- case WPA_CIPHER_WEP40: +- psecuritypriv->wpa2_group_cipher = _WEP40_; +- break; +- case WPA_CIPHER_TKIP: +- psecuritypriv->wpa2_group_cipher = _TKIP_; +- break; +- case WPA_CIPHER_CCMP: +- psecuritypriv->wpa2_group_cipher = _AES_; +- break; +- case WPA_CIPHER_WEP104: +- psecuritypriv->wpa2_group_cipher = _WEP104_; +- break; +- } +- +- switch(pairwise_cipher) +- { +- case WPA_CIPHER_NONE: +- psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; +- break; +- case WPA_CIPHER_WEP40: +- psecuritypriv->wpa2_pairwise_cipher = _WEP40_; +- break; +- case WPA_CIPHER_TKIP: +- psecuritypriv->wpa2_pairwise_cipher = _TKIP_; +- break; +- case WPA_CIPHER_CCMP: +- psecuritypriv->wpa2_pairwise_cipher = _AES_; +- break; +- case WPA_CIPHER_WEP104: +- psecuritypriv->wpa2_pairwise_cipher = _WEP104_; +- break; +- } +-#endif +- } +- +- } +- +- //wpa +- ie_len = 0; +- group_cipher = 0; pairwise_cipher = 0; +- psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; +- psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; +- for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) +- { +- p = rtw_get_ie(p, _SSN_IE_1_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); +- if ((p) && (_rtw_memcmp(p+2, OUI1, 4))) +- { +- if(rtw_parse_wpa_ie(p, ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) +- { +- psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; +- +- psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x +- +- psecuritypriv->wpa_psk |= BIT(0); +- +- psecuritypriv->wpa_group_cipher = group_cipher; +- psecuritypriv->wpa_pairwise_cipher = pairwise_cipher; +- +-#if 0 +- switch(group_cipher) +- { +- case WPA_CIPHER_NONE: +- psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; +- break; +- case WPA_CIPHER_WEP40: +- psecuritypriv->wpa_group_cipher = _WEP40_; +- break; +- case WPA_CIPHER_TKIP: +- psecuritypriv->wpa_group_cipher = _TKIP_; +- break; +- case WPA_CIPHER_CCMP: +- psecuritypriv->wpa_group_cipher = _AES_; +- break; +- case WPA_CIPHER_WEP104: +- psecuritypriv->wpa_group_cipher = _WEP104_; +- break; +- } +- +- switch(pairwise_cipher) +- { +- case WPA_CIPHER_NONE: +- psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; +- break; +- case WPA_CIPHER_WEP40: +- psecuritypriv->wpa_pairwise_cipher = _WEP40_; +- break; +- case WPA_CIPHER_TKIP: +- psecuritypriv->wpa_pairwise_cipher = _TKIP_; +- break; +- case WPA_CIPHER_CCMP: +- psecuritypriv->wpa_pairwise_cipher = _AES_; +- break; +- case WPA_CIPHER_WEP104: +- psecuritypriv->wpa_pairwise_cipher = _WEP104_; +- break; +- } +-#endif +- } +- +- break; +- +- } +- +- if ((p == NULL) || (ie_len == 0)) +- { +- break; +- } +- +- } +- +- //wmm +- ie_len = 0; +- pmlmepriv->qospriv.qos_option = 0; +- if(pregistrypriv->wmm_enable) +- { +- for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) +- { +- p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); +- if((p) && _rtw_memcmp(p+2, WMM_PARA_IE, 6)) +- { +- pmlmepriv->qospriv.qos_option = 1; +- +- *(p+8) |= BIT(7);//QoS Info, support U-APSD +- +- /* disable all ACM bits since the WMM admission control is not supported */ +- *(p + 10) &= ~BIT(4); /* BE */ +- *(p + 14) &= ~BIT(4); /* BK */ +- *(p + 18) &= ~BIT(4); /* VI */ +- *(p + 22) &= ~BIT(4); /* VO */ +- +- break; +- } +- +- if ((p == NULL) || (ie_len == 0)) +- { +- break; +- } +- } +- } +-#ifdef CONFIG_80211N_HT +- //parsing HT_CAP_IE +- p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); +- if(p && ie_len>0) +- { +- u8 rf_type=0; +- HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor=MAX_AMPDU_FACTOR_64K; +- struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2); +- +- if (0) { +- DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter)); +- dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len); +- } +- +- pHT_caps_ie=p; +- +- ht_cap = _TRUE; +- network_type |= WIRELESS_11_24N; +- +- rtw_ht_use_default_setting(padapter); +- +- /* Update HT Capabilities Info field */ +- if (pmlmepriv->htpriv.sgi_20m == _FALSE) +- pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20); +- +- if (pmlmepriv->htpriv.sgi_40m == _FALSE) +- pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_40); +- +- if (!TEST_FLAG(pmlmepriv->htpriv.ldpc_cap, LDPC_HT_ENABLE_RX)) +- { +- pht_cap->cap_info &= ~(IEEE80211_HT_CAP_LDPC_CODING); +- } +- +- if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_TX)) +- { +- pht_cap->cap_info &= ~(IEEE80211_HT_CAP_TX_STBC); +- } +- +- if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_RX)) +- { +- pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R); +- } +- +- /* Update A-MPDU Parameters field */ +- pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR|IEEE80211_HT_CAP_AMPDU_DENSITY); +- +- if((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || +- (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) +- { +- pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); +- } +- else +- { +- pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); +- } +- +- rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); +- pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); //set Max Rx AMPDU size to 64K +- +- /* Update Supported MCS Set field */ +- { +- int i; +- +- rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); +- +- /* RX MCS Bitmask */ +- switch(rf_type) +- { +- case RF_1T1R: +- case RF_1T2R: //? +- set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R); +- break; +- case RF_2T2R: +- default: +- set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R); +- } +- for (i = 0; i < 10; i++) +- *(HT_CAP_ELE_RX_MCS_MAP(pht_cap)+i) &= padapter->mlmeextpriv.default_supported_mcs_set[i]; +- } +- +-#ifdef CONFIG_BEAMFORMING +- // Use registry value to enable HT Beamforming. +- // ToDo: use configure file to set these capability. +- pht_cap->tx_BF_cap_info = 0; +- +- // HT Beamformer +- if(TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) +- { +- // Transmit NDP Capable +- SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(pht_cap, 1); +- // Explicit Compressed Steering Capable +- SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pht_cap, 1); +- // Compressed Steering Number Antennas +- SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, 1); +- } +- +- // HT Beamformee +- if(TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) +- { +- // Receive NDP Capable +- SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(pht_cap, 1); +- // Explicit Compressed Beamforming Feedback Capable +- SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pht_cap, 2); +- } +-#endif //CONFIG_BEAMFORMING +- +- _rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len); +- +- if (0) { +- DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter)); +- dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len); +- } +- } +- +- //parsing HT_INFO_IE +- p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); +- if(p && ie_len>0) +- { +- pHT_info_ie=p; +- } +-#endif //CONFIG_80211N_HT +- switch(network_type) +- { +- case WIRELESS_11B: +- pbss_network->NetworkTypeInUse = Ndis802_11DS; +- break; +- case WIRELESS_11G: +- case WIRELESS_11BG: +- case WIRELESS_11G_24N: +- case WIRELESS_11BG_24N: +- pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; +- break; +- case WIRELESS_11A: +- pbss_network->NetworkTypeInUse = Ndis802_11OFDM5; +- break; +- default : +- pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; +- break; +- } +- +- pmlmepriv->cur_network.network_type = network_type; +- +-#ifdef CONFIG_80211N_HT +- pmlmepriv->htpriv.ht_option = _FALSE; +- +- if( (psecuritypriv->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || +- (psecuritypriv->wpa_pairwise_cipher&WPA_CIPHER_TKIP)) +- { +- //todo: +- //ht_cap = _FALSE; +- } +- +- //ht_cap +- if(pregistrypriv->ht_enable && ht_cap==_TRUE) +- { +- pmlmepriv->htpriv.ht_option = _TRUE; +- pmlmepriv->qospriv.qos_option = 1; +- +- if(pregistrypriv->ampdu_enable==1) +- { +- pmlmepriv->htpriv.ampdu_enable = _TRUE; +- } +- +- HT_caps_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_caps_ie); +- +- HT_info_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_info_ie); +- } +-#endif +- +-#ifdef CONFIG_80211AC_VHT +- +- //Parsing VHT CAP IE +- p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); +- if(p && ie_len>0) +- { +- vht_cap = _TRUE; +- } +- //Parsing VHT OPERATION IE +- +- +- pmlmepriv->vhtpriv.vht_option = _FALSE; +- // if channel in 5G band, then add vht ie . +- if ((pbss_network->Configuration.DSConfig > 14) && +- (pmlmepriv->htpriv.ht_option == _TRUE) && +- (pregistrypriv->vht_enable)) +- { +- if(vht_cap == _TRUE) +- { +- pmlmepriv->vhtpriv.vht_option = _TRUE; +- } +- else if(pregistrypriv->vht_enable == 2) // auto enabled +- { +- u8 cap_len, operation_len; +- +- rtw_vht_use_default_setting(padapter); +- +- // VHT Capabilities element +- cap_len = rtw_build_vht_cap_ie(padapter, pbss_network->IEs + pbss_network->IELength); +- pbss_network->IELength += cap_len; +- +- // VHT Operation element +- operation_len = rtw_build_vht_operation_ie(padapter, pbss_network->IEs + pbss_network->IELength, pbss_network->Configuration.DSConfig); +- pbss_network->IELength += operation_len; +- +- pmlmepriv->vhtpriv.vht_option = _TRUE; +- } +- } +-#endif //CONFIG_80211AC_VHT +- +- pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pbss_network); +- +- //issue beacon to start bss network +- //start_bss_network(padapter, (u8*)pbss_network); +- rtw_startbss_cmd(padapter, RTW_CMDF_WAIT_ACK); +- +- +- //alloc sta_info for ap itself +- psta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress); +- if(!psta) +- { +- psta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress); +- if (psta == NULL) +- { +- return _FAIL; +- } +- } +- +- // update AP's sta info +- update_ap_info(padapter, psta); +- +- psta->state |= WIFI_AP_STATE; //Aries, add,fix bug of flush_cam_entry at STOP AP mode , 0724 +- rtw_indicate_connect( padapter); +- +- pmlmepriv->cur_network.join_res = _TRUE;//for check if already set beacon +- +- //update bc/mc sta_info +- //update_bmc_sta(padapter); +- +- return ret; +- +-} +- +-void rtw_set_macaddr_acl(_adapter *padapter, int mode) +-{ +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; +- +- DBG_871X("%s, mode=%d\n", __func__, mode); +- +- pacl_list->mode = mode; +-} +- +-int rtw_acl_add_sta(_adapter *padapter, u8 *addr) +-{ +- _irqL irqL; +- _list *plist, *phead; +- u8 added = _FALSE; +- int i, ret=0; +- struct rtw_wlan_acl_node *paclnode; +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; +- _queue *pacl_node_q =&pacl_list->acl_node_q; +- +- DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); +- +- if((NUM_ACL-1) < pacl_list->num) +- return (-1); +- +- +- _enter_critical_bh(&(pacl_node_q->lock), &irqL); +- +- phead = get_list_head(pacl_node_q); +- plist = get_next(phead); +- +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) +- { +- paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); +- plist = get_next(plist); +- +- if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN)) +- { +- if(paclnode->valid == _TRUE) +- { +- added = _TRUE; +- DBG_871X("%s, sta has been added\n", __func__); +- break; +- } +- } +- } +- +- _exit_critical_bh(&(pacl_node_q->lock), &irqL); +- +- +- if(added == _TRUE) +- return ret; +- +- +- _enter_critical_bh(&(pacl_node_q->lock), &irqL); +- +- for(i=0; i< NUM_ACL; i++) +- { +- paclnode = &pacl_list->aclnode[i]; +- +- if(paclnode->valid == _FALSE) +- { +- _rtw_init_listhead(&paclnode->list); +- +- _rtw_memcpy(paclnode->addr, addr, ETH_ALEN); +- +- paclnode->valid = _TRUE; +- +- rtw_list_insert_tail(&paclnode->list, get_list_head(pacl_node_q)); +- +- pacl_list->num++; +- +- break; +- } +- } +- +- DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); +- +- _exit_critical_bh(&(pacl_node_q->lock), &irqL); +- +- return ret; +-} +- +-int rtw_acl_remove_sta(_adapter *padapter, u8 *addr) +-{ +- _irqL irqL; +- _list *plist, *phead; +- int i, ret=0; +- struct rtw_wlan_acl_node *paclnode; +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; +- _queue *pacl_node_q =&pacl_list->acl_node_q; +- u8 baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; //Baddr is used for clearing acl_list +- +- DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); +- +- _enter_critical_bh(&(pacl_node_q->lock), &irqL); +- +- phead = get_list_head(pacl_node_q); +- plist = get_next(phead); +- +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) +- { +- paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); +- plist = get_next(plist); +- +- if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN) || _rtw_memcmp(baddr, addr, ETH_ALEN)) +- { +- if(paclnode->valid == _TRUE) +- { +- paclnode->valid = _FALSE; +- +- rtw_list_delete(&paclnode->list); +- +- pacl_list->num--; +- } +- } +- } +- +- _exit_critical_bh(&(pacl_node_q->lock), &irqL); +- +- DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); +- +- return ret; +- +-} +- +-u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta) +-{ +- struct cmd_obj* ph2c; +- struct set_stakey_parm *psetstakey_para; +- struct cmd_priv *pcmdpriv=&padapter->cmdpriv; +- u8 res=_SUCCESS; +- +- ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); +- if ( ph2c == NULL){ +- res= _FAIL; +- goto exit; +- } +- +- psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); +- if(psetstakey_para==NULL){ +- rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); +- res=_FAIL; +- goto exit; +- } +- +- init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); +- +- +- psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; +- +- _rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); +- +- _rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); +- +- +- res = rtw_enqueue_cmd(pcmdpriv, ph2c); +- +-exit: +- +- return res; +- +-} +- +-static int rtw_ap_set_key(_adapter *padapter, u8 *key, u8 alg, int keyid, u8 set_tx) +-{ +- u8 keylen; +- struct cmd_obj* pcmd; +- struct setkey_parm *psetkeyparm; +- struct cmd_priv *pcmdpriv=&(padapter->cmdpriv); +- int res=_SUCCESS; +- +- //DBG_871X("%s\n", __FUNCTION__); +- +- pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); +- if(pcmd==NULL){ +- res= _FAIL; +- goto exit; +- } +- psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); +- if(psetkeyparm==NULL){ +- rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); +- res= _FAIL; +- goto exit; +- } +- +- _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); +- +- psetkeyparm->keyid=(u8)keyid; +- if (is_wep_enc(alg)) +- padapter->securitypriv.key_mask |= BIT(psetkeyparm->keyid); +- +- psetkeyparm->algorithm = alg; +- +- psetkeyparm->set_tx = set_tx; +- +- switch(alg) +- { +- case _WEP40_: +- keylen = 5; +- break; +- case _WEP104_: +- keylen = 13; +- break; +- case _TKIP_: +- case _TKIP_WTMIC_: +- case _AES_: +- default: +- keylen = 16; +- } +- +- _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); +- +- pcmd->cmdcode = _SetKey_CMD_; +- pcmd->parmbuf = (u8 *)psetkeyparm; +- pcmd->cmdsz = (sizeof(struct setkey_parm)); +- pcmd->rsp = NULL; +- pcmd->rspsz = 0; +- +- +- _rtw_init_listhead(&pcmd->list); +- +- res = rtw_enqueue_cmd(pcmdpriv, pcmd); +- +-exit: +- +- return res; +-} +- +-int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) +-{ +- DBG_871X("%s\n", __FUNCTION__); +- +- return rtw_ap_set_key(padapter, key, alg, keyid, 1); +-} +- +-int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx) +-{ +- u8 alg; +- +- switch(keylen) +- { +- case 5: +- alg =_WEP40_; +- break; +- case 13: +- alg =_WEP104_; +- break; +- default: +- alg =_NO_PRIVACY_; +- } +- +- DBG_871X("%s\n", __FUNCTION__); +- +- return rtw_ap_set_key(padapter, key, alg, keyid, set_tx); +-} +- +-#ifdef CONFIG_NATIVEAP_MLME +- +-static void update_bcn_fixed_ie(_adapter *padapter) +-{ +- DBG_871X("%s\n", __FUNCTION__); +- +-} +- +-static void update_bcn_erpinfo_ie(_adapter *padapter) +-{ +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); +- unsigned char *p, *ie = pnetwork->IEs; +- u32 len = 0; +- +- DBG_871X("%s, ERP_enable=%d\n", __FUNCTION__, pmlmeinfo->ERP_enable); +- +- if(!pmlmeinfo->ERP_enable) +- return; +- +- //parsing ERP_IE +- p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); +- if(p && len>0) +- { +- PNDIS_802_11_VARIABLE_IEs pIE = (PNDIS_802_11_VARIABLE_IEs)p; +- +- if (pmlmepriv->num_sta_non_erp == 1) +- pIE->data[0] |= RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION; +- else +- pIE->data[0] &= ~(RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION); +- +- if(pmlmepriv->num_sta_no_short_preamble > 0) +- pIE->data[0] |= RTW_ERP_INFO_BARKER_PREAMBLE_MODE; +- else +- pIE->data[0] &= ~(RTW_ERP_INFO_BARKER_PREAMBLE_MODE); +- +- ERP_IE_handler(padapter, pIE); +- } +- +-} +- +-static void update_bcn_htcap_ie(_adapter *padapter) +-{ +- DBG_871X("%s\n", __FUNCTION__); +- +-} +- +-static void update_bcn_htinfo_ie(_adapter *padapter) +-{ +- DBG_871X("%s\n", __FUNCTION__); +- +-} +- +-static void update_bcn_rsn_ie(_adapter *padapter) +-{ +- DBG_871X("%s\n", __FUNCTION__); +- +-} +- +-static void update_bcn_wpa_ie(_adapter *padapter) +-{ +- DBG_871X("%s\n", __FUNCTION__); +- +-} +- +-static void update_bcn_wmm_ie(_adapter *padapter) +-{ +- DBG_871X("%s\n", __FUNCTION__); +- +-} +- +-static void update_bcn_wps_ie(_adapter *padapter) +-{ +- u8 *pwps_ie=NULL, *pwps_ie_src, *premainder_ie, *pbackup_remainder_ie=NULL; +- uint wps_ielen=0, wps_offset, remainder_ielen; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); +- unsigned char *ie = pnetwork->IEs; +- u32 ielen = pnetwork->IELength; +- +- +- DBG_871X("%s\n", __FUNCTION__); +- +- pwps_ie = rtw_get_wps_ie(ie+_FIXED_IE_LENGTH_, ielen-_FIXED_IE_LENGTH_, NULL, &wps_ielen); +- +- if(pwps_ie==NULL || wps_ielen==0) +- return; +- +- pwps_ie_src = pmlmepriv->wps_beacon_ie; +- if(pwps_ie_src == NULL) +- return; +- +- wps_offset = (uint)(pwps_ie-ie); +- +- premainder_ie = pwps_ie + wps_ielen; +- +- remainder_ielen = ielen - wps_offset - wps_ielen; +- +- if(remainder_ielen>0) +- { +- pbackup_remainder_ie = rtw_malloc(remainder_ielen); +- if(pbackup_remainder_ie) +- _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); +- } +- +- wps_ielen = (uint)pwps_ie_src[1];//to get ie data len +- if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) +- { +- _rtw_memcpy(pwps_ie, pwps_ie_src, wps_ielen+2); +- pwps_ie += (wps_ielen+2); +- +- if(pbackup_remainder_ie) +- _rtw_memcpy(pwps_ie, pbackup_remainder_ie, remainder_ielen); +- +- //update IELength +- pnetwork->IELength = wps_offset + (wps_ielen+2) + remainder_ielen; +- } +- +- if(pbackup_remainder_ie) +- rtw_mfree(pbackup_remainder_ie, remainder_ielen); +- +- // deal with the case without set_tx_beacon_cmd() in update_beacon() +-#if defined( CONFIG_INTERRUPT_BASED_TXBCN ) || defined( CONFIG_PCI_HCI ) +- if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) +- { +- u8 sr = 0; +- rtw_get_wps_attr_content(pwps_ie_src, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); +- +- if( sr ) { +- set_fwstate(pmlmepriv, WIFI_UNDER_WPS); +- DBG_871X("%s, set WIFI_UNDER_WPS\n", __func__); +- } +- } +-#endif +-} +- +-static void update_bcn_p2p_ie(_adapter *padapter) +-{ +- +-} +- +-static void update_bcn_vendor_spec_ie(_adapter *padapter, u8*oui) +-{ +- DBG_871X("%s\n", __FUNCTION__); +- +- if(_rtw_memcmp(RTW_WPA_OUI, oui, 4)) +- { +- update_bcn_wpa_ie(padapter); +- } +- else if(_rtw_memcmp(WMM_OUI, oui, 4)) +- { +- update_bcn_wmm_ie(padapter); +- } +- else if(_rtw_memcmp(WPS_OUI, oui, 4)) +- { +- update_bcn_wps_ie(padapter); +- } +- else if(_rtw_memcmp(P2P_OUI, oui, 4)) +- { +- update_bcn_p2p_ie(padapter); +- } +- else +- { +- DBG_871X("unknown OUI type!\n"); +- } +- +- +-} +- +-void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag) +-{ +- _irqL irqL; +- struct mlme_priv *pmlmepriv; +- struct mlme_ext_priv *pmlmeext; +- //struct mlme_ext_info *pmlmeinfo; +- +- //DBG_871X("%s\n", __FUNCTION__); +- +- if(!padapter) +- return; +- +- pmlmepriv = &(padapter->mlmepriv); +- pmlmeext = &(padapter->mlmeextpriv); +- //pmlmeinfo = &(pmlmeext->mlmext_info); +- +- if(_FALSE == pmlmeext->bstart_bss) +- return; +- +- _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); +- +- switch(ie_id) +- { +- case 0xFF: +- +- update_bcn_fixed_ie(padapter);//8: TimeStamp, 2: Beacon Interval 2:Capability +- +- break; +- +- case _TIM_IE_: +- +- update_BCNTIM(padapter); +- +- break; +- +- case _ERPINFO_IE_: +- +- update_bcn_erpinfo_ie(padapter); +- +- break; +- +- case _HT_CAPABILITY_IE_: +- +- update_bcn_htcap_ie(padapter); +- +- break; +- +- case _RSN_IE_2_: +- +- update_bcn_rsn_ie(padapter); +- +- break; +- +- case _HT_ADD_INFO_IE_: +- +- update_bcn_htinfo_ie(padapter); +- +- break; +- +- case _VENDOR_SPECIFIC_IE_: +- +- update_bcn_vendor_spec_ie(padapter, oui); +- +- break; +- +- default: +- break; +- } +- +- pmlmepriv->update_bcn = _TRUE; +- +- _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); +- +-#ifndef CONFIG_INTERRUPT_BASED_TXBCN +-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +- if(tx) +- { +- //send_beacon(padapter);//send_beacon must execute on TSR level +- if (0) +- DBG_871X(FUNC_ADPT_FMT" ie_id:%u - %s\n", FUNC_ADPT_ARG(padapter), ie_id, tag); +- set_tx_beacon_cmd(padapter); +- } +-#else +- { +- //PCI will issue beacon when BCN interrupt occurs. +- } +-#endif +-#endif //!CONFIG_INTERRUPT_BASED_TXBCN +- +-} +- +-#ifdef CONFIG_80211N_HT +- +-/* +-op_mode +-Set to 0 (HT pure) under the followign conditions +- - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or +- - all STAs in the BSS are 20 MHz HT in 20 MHz BSS +-Set to 1 (HT non-member protection) if there may be non-HT STAs +- in both the primary and the secondary channel +-Set to 2 if only HT STAs are associated in BSS, +- however and at least one 20 MHz HT STA is associated +-Set to 3 (HT mixed mode) when one or more non-HT STAs are associated +- (currently non-GF HT station is considered as non-HT STA also) +-*/ +-static int rtw_ht_operation_update(_adapter *padapter) +-{ +- u16 cur_op_mode, new_op_mode; +- int op_mode_changes = 0; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; +- +- if(pmlmepriv->htpriv.ht_option == _TRUE) +- return 0; +- +- //if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed) +- // return 0; +- +- DBG_871X("%s current operation mode=0x%X\n", +- __FUNCTION__, pmlmepriv->ht_op_mode); +- +- if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) +- && pmlmepriv->num_sta_ht_no_gf) { +- pmlmepriv->ht_op_mode |= +- HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; +- op_mode_changes++; +- } else if ((pmlmepriv->ht_op_mode & +- HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) && +- pmlmepriv->num_sta_ht_no_gf == 0) { +- pmlmepriv->ht_op_mode &= +- ~HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; +- op_mode_changes++; +- } +- +- if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && +- (pmlmepriv->num_sta_no_ht || pmlmepriv->olbc_ht)) { +- pmlmepriv->ht_op_mode |= HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; +- op_mode_changes++; +- } else if ((pmlmepriv->ht_op_mode & +- HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && +- (pmlmepriv->num_sta_no_ht == 0 && !pmlmepriv->olbc_ht)) { +- pmlmepriv->ht_op_mode &= +- ~HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; +- op_mode_changes++; +- } +- +- /* Note: currently we switch to the MIXED op mode if HT non-greenfield +- * station is associated. Probably it's a theoretical case, since +- * it looks like all known HT STAs support greenfield. +- */ +- new_op_mode = 0; +- if (pmlmepriv->num_sta_no_ht || +- (pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)) +- new_op_mode = OP_MODE_MIXED; +- else if ((phtpriv_ap->ht_cap.cap_info & IEEE80211_HT_CAP_SUP_WIDTH) +- && pmlmepriv->num_sta_ht_20mhz) +- new_op_mode = OP_MODE_20MHZ_HT_STA_ASSOCED; +- else if (pmlmepriv->olbc_ht) +- new_op_mode = OP_MODE_MAY_BE_LEGACY_STAS; +- else +- new_op_mode = OP_MODE_PURE; +- +- cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK; +- if (cur_op_mode != new_op_mode) { +- pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_OP_MODE_MASK; +- pmlmepriv->ht_op_mode |= new_op_mode; +- op_mode_changes++; +- } +- +- DBG_871X("%s new operation mode=0x%X changes=%d\n", +- __FUNCTION__, pmlmepriv->ht_op_mode, op_mode_changes); +- +- return op_mode_changes; +- +-} +- +-#endif /* CONFIG_80211N_HT */ +- +-void associated_clients_update(_adapter *padapter, u8 updated) +-{ +- //update associcated stations cap. +- if(updated == _TRUE) +- { +- _irqL irqL; +- _list *phead, *plist; +- struct sta_info *psta=NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- +- _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- phead = &pstapriv->asoc_list; +- plist = get_next(phead); +- +- //check asoc_queue +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) +- { +- psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); +- +- plist = get_next(plist); +- +- VCS_update(padapter, psta); +- } +- +- _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- } +- +-} +- +-/* called > TSR LEVEL for USB or SDIO Interface*/ +-void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta) +-{ +- u8 beacon_updated = _FALSE; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- +- +-#if 0 +- if (!(psta->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) && +- !psta->no_short_preamble_set) { +- psta->no_short_preamble_set = 1; +- pmlmepriv->num_sta_no_short_preamble++; +- if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && +- (pmlmepriv->num_sta_no_short_preamble == 1)) +- ieee802_11_set_beacons(hapd->iface); +- } +-#endif +- +- +- if(!(psta->flags & WLAN_STA_SHORT_PREAMBLE)) +- { +- if(!psta->no_short_preamble_set) +- { +- psta->no_short_preamble_set = 1; +- +- pmlmepriv->num_sta_no_short_preamble++; +- +- if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && +- (pmlmepriv->num_sta_no_short_preamble == 1)) +- { +- beacon_updated = _TRUE; +- update_beacon(padapter, 0xFF, NULL, _TRUE); +- } +- +- } +- } +- else +- { +- if(psta->no_short_preamble_set) +- { +- psta->no_short_preamble_set = 0; +- +- pmlmepriv->num_sta_no_short_preamble--; +- +- if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && +- (pmlmepriv->num_sta_no_short_preamble == 0)) +- { +- beacon_updated = _TRUE; +- update_beacon(padapter, 0xFF, NULL, _TRUE); +- } +- +- } +- } +- +-#if 0 +- if (psta->flags & WLAN_STA_NONERP && !psta->nonerp_set) { +- psta->nonerp_set = 1; +- pmlmepriv->num_sta_non_erp++; +- if (pmlmepriv->num_sta_non_erp == 1) +- ieee802_11_set_beacons(hapd->iface); +- } +-#endif +- +- if(psta->flags & WLAN_STA_NONERP) +- { +- if(!psta->nonerp_set) +- { +- psta->nonerp_set = 1; +- +- pmlmepriv->num_sta_non_erp++; +- +- if (pmlmepriv->num_sta_non_erp == 1) +- { +- beacon_updated = _TRUE; +- update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); +- } +- } +- +- } +- else +- { +- if(psta->nonerp_set) +- { +- psta->nonerp_set = 0; +- +- pmlmepriv->num_sta_non_erp--; +- +- if (pmlmepriv->num_sta_non_erp == 0) +- { +- beacon_updated = _TRUE; +- update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); +- } +- } +- +- } +- +- +-#if 0 +- if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT) && +- !psta->no_short_slot_time_set) { +- psta->no_short_slot_time_set = 1; +- pmlmepriv->num_sta_no_short_slot_time++; +- if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && +- (pmlmepriv->num_sta_no_short_slot_time == 1)) +- ieee802_11_set_beacons(hapd->iface); +- } +-#endif +- +- if(!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT)) +- { +- if(!psta->no_short_slot_time_set) +- { +- psta->no_short_slot_time_set = 1; +- +- pmlmepriv->num_sta_no_short_slot_time++; +- +- if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && +- (pmlmepriv->num_sta_no_short_slot_time == 1)) +- { +- beacon_updated = _TRUE; +- update_beacon(padapter, 0xFF, NULL, _TRUE); +- } +- +- } +- } +- else +- { +- if(psta->no_short_slot_time_set) +- { +- psta->no_short_slot_time_set = 0; +- +- pmlmepriv->num_sta_no_short_slot_time--; +- +- if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && +- (pmlmepriv->num_sta_no_short_slot_time == 0)) +- { +- beacon_updated = _TRUE; +- update_beacon(padapter, 0xFF, NULL, _TRUE); +- } +- } +- } +- +-#ifdef CONFIG_80211N_HT +- +- if (psta->flags & WLAN_STA_HT) +- { +- u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); +- +- DBG_871X("HT: STA " MAC_FMT " HT Capabilities " +- "Info: 0x%04x\n", MAC_ARG(psta->hwaddr), ht_capab); +- +- if (psta->no_ht_set) { +- psta->no_ht_set = 0; +- pmlmepriv->num_sta_no_ht--; +- } +- +- if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) { +- if (!psta->no_ht_gf_set) { +- psta->no_ht_gf_set = 1; +- pmlmepriv->num_sta_ht_no_gf++; +- } +- DBG_871X("%s STA " MAC_FMT " - no " +- "greenfield, num of non-gf stations %d\n", +- __FUNCTION__, MAC_ARG(psta->hwaddr), +- pmlmepriv->num_sta_ht_no_gf); +- } +- +- if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) { +- if (!psta->ht_20mhz_set) { +- psta->ht_20mhz_set = 1; +- pmlmepriv->num_sta_ht_20mhz++; +- } +- DBG_871X("%s STA " MAC_FMT " - 20 MHz HT, " +- "num of 20MHz HT STAs %d\n", +- __FUNCTION__, MAC_ARG(psta->hwaddr), +- pmlmepriv->num_sta_ht_20mhz); +- } +- +- } +- else +- { +- if (!psta->no_ht_set) { +- psta->no_ht_set = 1; +- pmlmepriv->num_sta_no_ht++; +- } +- if(pmlmepriv->htpriv.ht_option == _TRUE) { +- DBG_871X("%s STA " MAC_FMT +- " - no HT, num of non-HT stations %d\n", +- __FUNCTION__, MAC_ARG(psta->hwaddr), +- pmlmepriv->num_sta_no_ht); +- } +- } +- +- if (rtw_ht_operation_update(padapter) > 0) +- { +- update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); +- update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); +- } +- +-#endif /* CONFIG_80211N_HT */ +- +- //update associcated stations cap. +- associated_clients_update(padapter, beacon_updated); +- +- DBG_871X("%s, updated=%d\n", __func__, beacon_updated); +- +-} +- +-u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta) +-{ +- u8 beacon_updated = _FALSE; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- +- if(!psta) +- return beacon_updated; +- +- if (psta->no_short_preamble_set) { +- psta->no_short_preamble_set = 0; +- pmlmepriv->num_sta_no_short_preamble--; +- if (pmlmeext->cur_wireless_mode > WIRELESS_11B +- && pmlmepriv->num_sta_no_short_preamble == 0) +- { +- beacon_updated = _TRUE; +- update_beacon(padapter, 0xFF, NULL, _TRUE); +- } +- } +- +- if (psta->nonerp_set) { +- psta->nonerp_set = 0; +- pmlmepriv->num_sta_non_erp--; +- if (pmlmepriv->num_sta_non_erp == 0) +- { +- beacon_updated = _TRUE; +- update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); +- } +- } +- +- if (psta->no_short_slot_time_set) { +- psta->no_short_slot_time_set = 0; +- pmlmepriv->num_sta_no_short_slot_time--; +- if (pmlmeext->cur_wireless_mode > WIRELESS_11B +- && pmlmepriv->num_sta_no_short_slot_time == 0) +- { +- beacon_updated = _TRUE; +- update_beacon(padapter, 0xFF, NULL, _TRUE); +- } +- } +- +-#ifdef CONFIG_80211N_HT +- +- if (psta->no_ht_gf_set) { +- psta->no_ht_gf_set = 0; +- pmlmepriv->num_sta_ht_no_gf--; +- } +- +- if (psta->no_ht_set) { +- psta->no_ht_set = 0; +- pmlmepriv->num_sta_no_ht--; +- } +- +- if (psta->ht_20mhz_set) { +- psta->ht_20mhz_set = 0; +- pmlmepriv->num_sta_ht_20mhz--; +- } +- +- if (rtw_ht_operation_update(padapter) > 0) +- { +- update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); +- update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); +- } +- +-#endif /* CONFIG_80211N_HT */ +- +- //update associcated stations cap. +- //associated_clients_update(padapter, beacon_updated); //move it to avoid deadlock +- +- DBG_871X("%s, updated=%d\n", __func__, beacon_updated); +- +- return beacon_updated; +- +-} +- +-u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason) +-{ +- _irqL irqL; +- u8 beacon_updated = _FALSE; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct sta_priv *pstapriv = &padapter->stapriv; +- +- if(!psta) +- return beacon_updated; +- +- if (active == _TRUE) +- { +-#ifdef CONFIG_80211N_HT +- //tear down Rx AMPDU +- send_delba(padapter, 0, psta->hwaddr);// recipient +- +- //tear down TX AMPDU +- send_delba(padapter, 1, psta->hwaddr);// // originator +- +-#endif //CONFIG_80211N_HT +- +- issue_deauth(padapter, psta->hwaddr, reason); +- } +- +-#ifdef CONFIG_BEAMFORMING +- beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_LEAVE, psta->hwaddr, ETH_ALEN, 1); +-#endif +- +- psta->htpriv.agg_enable_bitmap = 0x0;//reset +- psta->htpriv.candidate_tid_bitmap = 0x0;//reset +- +- +- //report_del_sta_event(padapter, psta->hwaddr, reason); +- +- //clear cam entry / key +- rtw_clearstakey_cmd(padapter, psta, _TRUE); +- +- +- _enter_critical_bh(&psta->lock, &irqL); +- psta->state &= ~_FW_LINKED; +- _exit_critical_bh(&psta->lock, &irqL); +- +- #ifdef CONFIG_IOCTL_CFG80211 +- if (1) { +- #ifdef COMPAT_KERNEL_RELEASE +- rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); +- #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) +- rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); +- #else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) +- /* will call rtw_cfg80211_indicate_sta_disassoc() in cmd_thread for old API context */ +- #endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) +- } else +- #endif //CONFIG_IOCTL_CFG80211 +- { +- rtw_indicate_sta_disassoc_event(padapter, psta); +- } +- +- report_del_sta_event(padapter, psta->hwaddr, reason); +- +- beacon_updated = bss_cap_update_on_sta_leave(padapter, psta); +- +- //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); +- rtw_free_stainfo(padapter, psta); +- //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); +- +- +- return beacon_updated; +- +-} +- +-int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset) +-{ +- _irqL irqL; +- _list *phead, *plist; +- int ret=0; +- struct sta_info *psta = NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; +- +- if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) +- return ret; +- +- DBG_871X(FUNC_NDEV_FMT" with ch:%u, offset:%u\n", +- FUNC_NDEV_ARG(padapter->pnetdev), new_ch, ch_offset); +- +- _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- phead = &pstapriv->asoc_list; +- plist = get_next(phead); +- +- /* for each sta in asoc_queue */ +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) +- { +- psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); +- plist = get_next(plist); +- +- issue_action_spct_ch_switch(padapter, psta->hwaddr, new_ch, ch_offset); +- psta->expire_to = ((pstapriv->expire_to * 2) > 5) ? 5 : (pstapriv->expire_to * 2); +- } +- _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- issue_action_spct_ch_switch(padapter, bc_addr, new_ch, ch_offset); +- +- return ret; +-} +- +-int rtw_sta_flush(_adapter *padapter) +-{ +- _irqL irqL; +- _list *phead, *plist; +- int ret=0; +- struct sta_info *psta = NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; +- +- if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) +- return ret; +- +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev)); +- _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- phead = &pstapriv->asoc_list; +- plist = get_next(phead); +- +- //free sta asoc_queue +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) +- { +- psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); +- +- plist = get_next(plist); +- +- rtw_list_delete(&psta->asoc_list); +- pstapriv->asoc_list_cnt--; +- +- //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING); +- //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- } +- _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- +- issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING); +- +- associated_clients_update(padapter, _TRUE); +- +- return ret; +- +-} +- +-/* called > TSR LEVEL for USB or SDIO Interface*/ +-void sta_info_update(_adapter *padapter, struct sta_info *psta) +-{ +- int flags = psta->flags; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- +- +- //update wmm cap. +- if(WLAN_STA_WME&flags) +- psta->qos_option = 1; +- else +- psta->qos_option = 0; +- +- if(pmlmepriv->qospriv.qos_option == 0) +- psta->qos_option = 0; +- +- +-#ifdef CONFIG_80211N_HT +- //update 802.11n ht cap. +- if(WLAN_STA_HT&flags) +- { +- psta->htpriv.ht_option = _TRUE; +- psta->qos_option = 1; +- } +- else +- { +- psta->htpriv.ht_option = _FALSE; +- } +- +- if(pmlmepriv->htpriv.ht_option == _FALSE) +- psta->htpriv.ht_option = _FALSE; +-#endif +- +-#ifdef CONFIG_80211AC_VHT +- //update 802.11AC vht cap. +- if(WLAN_STA_VHT&flags) +- { +- psta->vhtpriv.vht_option = _TRUE; +- } +- else +- { +- psta->vhtpriv.vht_option = _FALSE; +- } +- +- if(pmlmepriv->vhtpriv.vht_option == _FALSE) +- psta->vhtpriv.vht_option = _FALSE; +-#endif +- +- +- update_sta_info_apmode(padapter, psta); +- +- +-} +- +-/* called >= TSR LEVEL for USB or SDIO Interface*/ +-void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta) +-{ +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- if(psta->state & _FW_LINKED) +- { +- pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; +- +- //add ratid +- add_RATid(padapter, psta, 0);//DM_RATR_STA_INIT +- } +-} +-/* restore hw setting from sw data structures */ +-void rtw_ap_restore_network(_adapter *padapter) +-{ +- struct mlme_priv *mlmepriv = &padapter->mlmepriv; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct sta_priv * pstapriv = &padapter->stapriv; +- struct sta_info *psta; +- struct security_priv* psecuritypriv=&(padapter->securitypriv); +- _irqL irqL; +- _list *phead, *plist; +- u8 chk_alive_num = 0; +- char chk_alive_list[NUM_STA]; +- int i; +- +- rtw_setopmode_cmd(padapter, Ndis802_11APMode,_FALSE); +- +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); +- +- start_bss_network(padapter, (u8*)&mlmepriv->cur_network.network); +- +- if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || +- (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) +- { +- /* restore group key, WEP keys is restored in ips_leave() */ +- rtw_set_key(padapter, psecuritypriv, psecuritypriv->dot118021XGrpKeyid, 0,_FALSE); +- } +- +- _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- phead = &pstapriv->asoc_list; +- plist = get_next(phead); +- +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { +- int stainfo_offset; +- +- psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); +- plist = get_next(plist); +- +- stainfo_offset = rtw_stainfo_offset(pstapriv, psta); +- if (stainfo_offset_valid(stainfo_offset)) { +- chk_alive_list[chk_alive_num++] = stainfo_offset; +- } +- } +- +- _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- for (i = 0; i < chk_alive_num; i++) { +- psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); +- +- if (psta == NULL) { +- DBG_871X(FUNC_ADPT_FMT" sta_info is null\n", FUNC_ADPT_ARG(padapter)); +- } else if (psta->state &_FW_LINKED) { +- rtw_sta_media_status_rpt(padapter, psta, 1); +- Update_RA_Entry(padapter, psta); +- //pairwise key +- /* per sta pairwise key and settings */ +- if( (padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || +- (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) +- { +- rtw_setstakey_cmd(padapter, psta, _TRUE,_FALSE); +- } +- } +- } +- +-} +- +-void start_ap_mode(_adapter *padapter) +-{ +- int i; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; +- +- pmlmepriv->update_bcn = _FALSE; +- +- //init_mlme_ap_info(padapter); +- pmlmeext->bstart_bss = _FALSE; +- +- pmlmepriv->num_sta_non_erp = 0; +- +- pmlmepriv->num_sta_no_short_slot_time = 0; +- +- pmlmepriv->num_sta_no_short_preamble = 0; +- +- pmlmepriv->num_sta_ht_no_gf = 0; +-#ifdef CONFIG_80211N_HT +- pmlmepriv->num_sta_no_ht = 0; +-#endif //CONFIG_80211N_HT +- pmlmepriv->num_sta_ht_20mhz = 0; +- +- pmlmepriv->olbc = _FALSE; +- +- pmlmepriv->olbc_ht = _FALSE; +- +-#ifdef CONFIG_80211N_HT +- pmlmepriv->ht_op_mode = 0; +-#endif +- +- for(i=0; ista_aid[i] = NULL; +- +-/* to avoid memory leak issue, don't set to NULL directly +- pmlmepriv->wps_beacon_ie = NULL; +- pmlmepriv->wps_probe_resp_ie = NULL; +- pmlmepriv->wps_assoc_resp_ie = NULL; +- +- pmlmepriv->p2p_beacon_ie = NULL; +- pmlmepriv->p2p_probe_resp_ie = NULL; +-*/ +- +- //for ACL +- _rtw_init_listhead(&(pacl_list->acl_node_q.queue)); +- pacl_list->num = 0; +- pacl_list->mode = 0; +- for(i = 0; i < NUM_ACL; i++) +- { +- _rtw_init_listhead(&pacl_list->aclnode[i].list); +- pacl_list->aclnode[i].valid = _FALSE; +- } +- +-} +- +-void stop_ap_mode(_adapter *padapter) +-{ +- _irqL irqL; +- _list *phead, *plist; +- struct rtw_wlan_acl_node *paclnode; +- struct sta_info *psta=NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; +- _queue *pacl_node_q =&pacl_list->acl_node_q; +- +- pmlmepriv->update_bcn = _FALSE; +- pmlmeext->bstart_bss = _FALSE; +- padapter->netif_up = _FALSE; +- //_rtw_spinlock_free(&pmlmepriv->bcn_update_lock); +- +- //reset and init security priv , this can refine with rtw_reset_securitypriv +- _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); +- padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; +- padapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; +- +- //for ACL +- _enter_critical_bh(&(pacl_node_q->lock), &irqL); +- phead = get_list_head(pacl_node_q); +- plist = get_next(phead); +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) +- { +- paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); +- plist = get_next(plist); +- +- if(paclnode->valid == _TRUE) +- { +- paclnode->valid = _FALSE; +- +- rtw_list_delete(&paclnode->list); +- +- pacl_list->num--; +- } +- } +- _exit_critical_bh(&(pacl_node_q->lock), &irqL); +- +- DBG_871X("%s, free acl_node_queue, num=%d\n", __func__, pacl_list->num); +- +- rtw_sta_flush(padapter); +- +- //free_assoc_sta_resources +- rtw_free_all_stainfo(padapter); +- +- psta = rtw_get_bcmc_stainfo(padapter); +- //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); +- rtw_free_stainfo(padapter, psta); +- //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); +- +- rtw_init_bcmc_stainfo(padapter); +- +- rtw_free_mlme_priv_ie_data(pmlmepriv); +- +-#ifdef CONFIG_BT_COEXIST +- rtw_btcoex_MediaStatusNotify(padapter, 0); //disconnect +-#endif +- +-} +- +-#endif //CONFIG_NATIVEAP_MLME +- +-#ifdef CONFIG_CONCURRENT_MODE +-void concurrent_set_ap_chbw(_adapter *padapter, u8 channel, u8 channel_offset, u8 bwmode) +-{ +- u8 *p; +- int ie_len=0; +- u8 cur_channel, cur_bwmode, cur_ch_offset, change_band; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct HT_info_element *pht_info=NULL; +- +- cur_channel = channel; +- cur_bwmode = bwmode; +- cur_ch_offset = channel_offset; +- change_band = _FALSE; +- +- p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if( p && ie_len) +- { +- pht_info = (struct HT_info_element *)(p+2); +- } +- +- +- if(!check_buddy_fwstate(padapter, _FW_LINKED|_FW_UNDER_LINKING|_FW_UNDER_SURVEY)) +- { +- set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); +- } +- else if(check_buddy_fwstate(padapter, _FW_LINKED)==_TRUE) +- { +- _adapter *pbuddy_adapter = padapter->pbuddy_adapter; +- struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +- +- //To sync cur_channel/cur_bwmode/cur_ch_offset with buddy adapter +- DBG_871X(ADPT_FMT" is at linked state\n", ADPT_ARG(pbuddy_adapter)); +- DBG_871X(ADPT_FMT": CH=%d, BW=%d, offset=%d\n", ADPT_ARG(pbuddy_adapter), pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); +- DBG_871X(ADPT_FMT": CH=%d, BW=%d, offset=%d\n", ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); +- +- if((cur_channel <= 14 && pbuddy_mlmeext->cur_channel >= 36) || +- (cur_channel >= 36 && pbuddy_mlmeext->cur_channel <= 14)) +- change_band = _TRUE; +- +- cur_channel = pbuddy_mlmeext->cur_channel; +- +-#ifdef CONFIG_80211AC_VHT +- if(cur_bwmode == CHANNEL_WIDTH_80) +- { +- u8 *pvht_cap_ie, *pvht_op_ie; +- int vht_cap_ielen, vht_op_ielen; +- +- pvht_cap_ie = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTCapability, &vht_cap_ielen, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- pvht_op_ie = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTOperation, &vht_op_ielen, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- +- if(pbuddy_mlmeext->cur_channel <= 14) // downgrade to 20/40Mhz +- { +- //modify vht cap ie +- if( pvht_cap_ie && vht_cap_ielen) +- { +- SET_VHT_CAPABILITY_ELE_SHORT_GI80M(pvht_cap_ie+2, 0); +- } +- +- //modify vht op ie +- if( pvht_op_ie && vht_op_ielen) +- { +- SET_VHT_OPERATION_ELE_CHL_WIDTH(pvht_op_ie+2, 0); //change to 20/40Mhz +- SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(pvht_op_ie+2, 0); +- SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(pvht_op_ie+2, 0); +- //SET_VHT_OPERATION_ELE_BASIC_MCS_SET(p+2, 0xFFFF); +- cur_bwmode = CHANNEL_WIDTH_40; +- } +- } +- else +- { +- u8 center_freq; +- +- cur_bwmode = CHANNEL_WIDTH_80; +- +- if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40 || +- pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80) +- { +- cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; +- } +- else if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_20) +- { +- cur_ch_offset = rtw_get_offset_by_ch(cur_channel); +- } +- +- //modify ht info ie +- if(pht_info) +- pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; +- +- switch(cur_ch_offset) +- { +- case HAL_PRIME_CHNL_OFFSET_LOWER: +- if(pht_info) +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; +- //cur_bwmode = CHANNEL_WIDTH_40; +- break; +- case HAL_PRIME_CHNL_OFFSET_UPPER: +- if(pht_info) +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; +- //cur_bwmode = CHANNEL_WIDTH_40; +- break; +- case HAL_PRIME_CHNL_OFFSET_DONT_CARE: +- default: +- if(pht_info) +- pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; +- cur_bwmode = CHANNEL_WIDTH_20; +- cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- break; +- } +- +- //modify vht op ie +- center_freq = rtw_get_center_ch(cur_channel, cur_bwmode, HAL_PRIME_CHNL_OFFSET_LOWER); +- if( pvht_op_ie && vht_op_ielen) +- SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(pvht_op_ie+2, center_freq); +- +- set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); +- +- } +- +- } +-#endif //CONFIG_80211AC_VHT +- +- if(cur_bwmode == CHANNEL_WIDTH_40) +- { +- if(pht_info) +- pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; +- +- if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40 || +- pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80) +- { +- cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; +- +- //to update cur_ch_offset value in beacon +- if(pht_info) +- { +- switch(cur_ch_offset) +- { +- case HAL_PRIME_CHNL_OFFSET_LOWER: +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; +- break; +- case HAL_PRIME_CHNL_OFFSET_UPPER: +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; +- break; +- case HAL_PRIME_CHNL_OFFSET_DONT_CARE: +- default: +- break; +- } +- } +- +- } +- else if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_20) +- { +- cur_ch_offset = rtw_get_offset_by_ch(cur_channel); +- +- switch(cur_ch_offset) +- { +- case HAL_PRIME_CHNL_OFFSET_LOWER: +- if(pht_info) +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; +- cur_bwmode = CHANNEL_WIDTH_40; +- break; +- case HAL_PRIME_CHNL_OFFSET_UPPER: +- if(pht_info) +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; +- cur_bwmode = CHANNEL_WIDTH_40; +- break; +- case HAL_PRIME_CHNL_OFFSET_DONT_CARE: +- default: +- if(pht_info) +- pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; +- cur_bwmode = CHANNEL_WIDTH_20; +- cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- break; +- } +- +- } +- +- set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); +- +- } +- else +- { +- set_channel_bwmode(padapter, cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); +- } +- +- // to update channel value in beacon +- pnetwork->Configuration.DSConfig = cur_channel; +- p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if(p && ie_len>0) +- *(p + 2) = cur_channel; +- +- if(pht_info) +- pht_info->primary_channel = cur_channel; +- } +- +- DBG_871X(FUNC_ADPT_FMT" CH=%d, BW=%d, offset=%d\n", FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); +- +- pmlmeext->cur_channel = cur_channel; +- pmlmeext->cur_bwmode = cur_bwmode; +- pmlmeext->cur_ch_offset = cur_ch_offset; +- +- //buddy interface band is different from current interface, update ERP, support rate, ext support rate IE +- if(change_band == _TRUE) +- change_band_update_ie(padapter, pnetwork); +- +-} +-#endif //CONFIG_CONCURRENT_MODE +- +-#endif //CONFIG_AP_MODE +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_AP_C_ ++ ++#include ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++extern unsigned char RTW_WPA_OUI[]; ++extern unsigned char WMM_OUI[]; ++extern unsigned char WPS_OUI[]; ++extern unsigned char P2P_OUI[]; ++extern unsigned char WFD_OUI[]; ++ ++void init_mlme_ap_info(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ ++ _rtw_spinlock_init(&pmlmepriv->bcn_update_lock); ++ ++ //for ACL ++ _rtw_init_queue(&pacl_list->acl_node_q); ++ ++ //pmlmeext->bstart_bss = _FALSE; ++ ++ start_ap_mode(padapter); ++} ++ ++void free_mlme_ap_info(_adapter *padapter) ++{ ++ _irqL irqL; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //stop_ap_mode(padapter); ++ ++ pmlmepriv->update_bcn = _FALSE; ++ pmlmeext->bstart_bss = _FALSE; ++ ++ rtw_sta_flush(padapter, _TRUE); ++ ++ pmlmeinfo->state = _HW_STATE_NOLINK_; ++ ++ //free_assoc_sta_resources ++ rtw_free_all_stainfo(padapter); ++ ++ //free bc/mc sta_info ++ psta = rtw_get_bcmc_stainfo(padapter); ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ ++ _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); ++ ++} ++ ++static void update_BCNTIM(_adapter *padapter) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); ++ unsigned char *pie = pnetwork_mlmeext->IEs; ++ ++/* ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ //update TIM IE ++ //if(pstapriv->tim_bitmap) ++*/ ++ if (_TRUE) { ++ u8 *p, *dst_ie, *premainder_ie = NULL, *pbackup_remainder_ie = NULL; ++ u16 tim_bitmap_le; ++ uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen; ++ ++ tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap); ++ ++ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen, pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL && tim_ielen > 0) { ++ tim_ielen += 2; ++ ++ premainder_ie = p + tim_ielen; ++ ++ tim_ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork_mlmeext->IELength - tim_ie_offset - tim_ielen; ++ ++ /*append TIM IE from dst_ie offset*/ ++ dst_ie = p; ++ } else { ++ tim_ielen = 0; ++ ++ /*calculate head_len*/ ++ offset = _FIXED_IE_LENGTH_; ++ ++ /* get ssid_ie len */ ++ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SSID_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ offset += tmp_len+2; ++ ++ /*get supported rates len*/ ++ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ { ++ offset += tmp_len+2; ++ } ++ ++ /*DS Parameter Set IE, len=3*/ ++ offset += 3; ++ ++ premainder_ie = pie + offset; ++ ++ remainder_ielen = pnetwork_mlmeext->IELength - offset - tim_ielen; ++ ++ /*append TIM IE from offset*/ ++ dst_ie = pie + offset; ++ ++ } ++ ++ if (remainder_ielen > 0) { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ *dst_ie++=_TIM_IE_; ++ ++ if ((pstapriv->tim_bitmap&0xff00) && (pstapriv->tim_bitmap&0x00fe)) ++ tim_ielen = 5; ++ else ++ tim_ielen = 4; ++ ++ *dst_ie++ = tim_ielen; ++ ++ *dst_ie++ = 0;/*DTIM count*/ ++ *dst_ie++ = 1;/*DTIM period*/ ++ ++ if (pstapriv->tim_bitmap & BIT(0))/*for bc/mc frames*/ ++ *dst_ie++ = BIT(0);/*bitmap ctrl */ ++ else ++ *dst_ie++ = 0; ++ ++ if (tim_ielen == 4) { ++ u8 pvb = 0; ++ ++ if (pstapriv->tim_bitmap & 0x00fe) ++ pvb = (u8)tim_bitmap_le; ++ else if (pstapriv->tim_bitmap & 0xff00) ++ pvb = (u8)(tim_bitmap_le >> 8); ++ else ++ pvb = (u8)tim_bitmap_le; ++ ++ *dst_ie++ = pvb; ++ ++ } else if (tim_ielen == 5) { ++ _rtw_memcpy(dst_ie, &tim_bitmap_le, 2); ++ dst_ie += 2; ++ } ++ ++ /*copy remainder IE*/ ++ if (pbackup_remainder_ie) { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork_mlmeext->IELength = offset + remainder_ielen; ++ ++ } ++} ++ ++void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len) ++{ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 bmatch = _FALSE; ++ u8 *pie = pnetwork->IEs; ++ u8 *p=NULL, *dst_ie=NULL, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; ++ u32 i, offset, ielen, ie_offset, remainder_ielen = 0; ++ ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pnetwork->IELength;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); ++ ++ if (pIE->ElementID > index) ++ { ++ break; ++ } ++ else if(pIE->ElementID == index) // already exist the same IE ++ { ++ p = (u8 *)pIE; ++ ielen = pIE->Length; ++ bmatch = _TRUE; ++ break; ++ } ++ ++ p = (u8 *)pIE; ++ ielen = pIE->Length; ++ i += (pIE->Length + 2); ++ } ++ ++ if (p != NULL && ielen>0) ++ { ++ ielen += 2; ++ ++ premainder_ie = p+ielen; ++ ++ ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork->IELength - ie_offset - ielen; ++ ++ if(bmatch) ++ dst_ie = p; ++ else ++ dst_ie = (p+ielen); ++ } ++ ++ if(dst_ie == NULL) ++ return; ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ *dst_ie++=index; ++ *dst_ie++=len; ++ ++ _rtw_memcpy(dst_ie, data, len); ++ dst_ie+=len; ++ ++ //copy remainder IE ++ if(pbackup_remainder_ie) ++ { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork->IELength = offset + remainder_ielen; ++} ++ ++void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index) ++{ ++ u8 *p, *dst_ie=NULL, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; ++ uint offset, ielen, ie_offset, remainder_ielen = 0; ++ u8 *pie = pnetwork->IEs; ++ ++ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, index, &ielen, pnetwork->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL && ielen>0) ++ { ++ ielen += 2; ++ ++ premainder_ie = p+ielen; ++ ++ ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork->IELength - ie_offset - ielen; ++ ++ dst_ie = p; ++ } ++ else { ++ return; ++ } ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ //copy remainder IE ++ if(pbackup_remainder_ie) ++ { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork->IELength = offset + remainder_ielen; ++} ++ ++ ++u8 chk_sta_is_alive(struct sta_info *psta); ++u8 chk_sta_is_alive(struct sta_info *psta) ++{ ++ u8 ret = _FALSE; ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("sta:"MAC_FMT", rssi:%d, rx:"STA_PKTS_FMT", expire_to:%u, %s%ssq_len:%u\n" ++ , MAC_ARG(psta->hwaddr) ++ , psta->rssi_stat.UndecoratedSmoothedPWDB ++ //, STA_RX_PKTS_ARG(psta) ++ , STA_RX_PKTS_DIFF_ARG(psta) ++ , psta->expire_to ++ , psta->state&WIFI_SLEEP_STATE?"PS, ":"" ++ , psta->state&WIFI_STA_ALIVE_CHK_STATE?"SAC, ":"" ++ , psta->sleepq_len ++ ); ++ #endif ++ ++ //if(sta_last_rx_pkts(psta) == sta_rx_pkts(psta)) ++ if((psta->sta_stats.last_rx_data_pkts + psta->sta_stats.last_rx_ctrl_pkts) == (psta->sta_stats.rx_data_pkts + psta->sta_stats.rx_ctrl_pkts)) ++ { ++ #if 0 ++ if(psta->state&WIFI_SLEEP_STATE) ++ ret = _TRUE; ++ #endif ++ } ++ else ++ { ++ ret = _TRUE; ++ } ++ ++ sta_update_last_rx_pkts(psta); ++ ++ return ret; ++} ++ ++void expire_timeout_chk(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 updated = _FALSE; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 chk_alive_num = 0; ++ char chk_alive_list[NUM_STA]; ++ int i; ++ ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ phead = &pstapriv->auth_list; ++ plist = get_next(phead); ++ ++ //check auth_queue ++ #ifdef DBG_EXPIRATION_CHK ++ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ DBG_871X(FUNC_NDEV_FMT" auth_list, cnt:%u\n" ++ , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->auth_list_cnt); ++ } ++ #endif ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, auth_list); ++ ++ plist = get_next(plist); ++ ++ ++#ifdef CONFIG_ATMEL_RC_PATCH ++ if (_TRUE == _rtw_memcmp((void *)(pstapriv->atmel_rc_pattern), (void *)(psta->hwaddr), ETH_ALEN)) ++ continue; ++ if (psta->flag_atmel_rc) ++ continue; ++#endif ++ if(psta->expire_to>0) ++ { ++ psta->expire_to--; ++ if (psta->expire_to == 0) ++ { ++ rtw_list_delete(&psta->auth_list); ++ pstapriv->auth_list_cnt--; ++ ++ DBG_871X("auth expire %02X%02X%02X%02X%02X%02X\n", ++ psta->hwaddr[0],psta->hwaddr[1],psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]); ++ ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ } ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ psta = NULL; ++ ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ #ifdef DBG_EXPIRATION_CHK ++ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ DBG_871X(FUNC_NDEV_FMT" asoc_list, cnt:%u\n" ++ , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->asoc_list_cnt); ++ } ++ #endif ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++#ifdef CONFIG_ATMEL_RC_PATCH ++ DBG_871X("%s:%d psta=%p, %02x,%02x||%02x,%02x \n\n", __func__, __LINE__, ++ psta,pstapriv->atmel_rc_pattern[0], pstapriv->atmel_rc_pattern[5], psta->hwaddr[0], psta->hwaddr[5]); ++ if (_TRUE == _rtw_memcmp((void *)pstapriv->atmel_rc_pattern, (void *)(psta->hwaddr), ETH_ALEN)) ++ continue; ++ if (psta->flag_atmel_rc) ++ continue; ++ DBG_871X("%s: debug line:%d \n", __func__, __LINE__); ++#endif ++#ifdef CONFIG_AUTO_AP_MODE ++ if(psta->isrc) ++ continue; ++#endif ++ if (chk_sta_is_alive(psta) || !psta->expire_to) { ++ psta->expire_to = pstapriv->expire_to; ++ psta->keep_alive_trycnt = 0; ++ #ifdef CONFIG_TX_MCAST2UNI ++ psta->under_exist_checking = 0; ++ #endif // CONFIG_TX_MCAST2UNI ++ } else { ++ psta->expire_to--; ++ } ++ ++#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++#ifdef CONFIG_80211N_HT ++#ifdef CONFIG_TX_MCAST2UNI ++ if ( (psta->flags & WLAN_STA_HT) && (psta->htpriv.agg_enable_bitmap || psta->under_exist_checking) ) { ++ // check sta by delba(addba) for 11n STA ++ // ToDo: use CCX report to check for all STAs ++ //DBG_871X("asoc check by DELBA/ADDBA! (pstapriv->expire_to=%d s)(psta->expire_to=%d s), [%02x, %d]\n", pstapriv->expire_to*2, psta->expire_to*2, psta->htpriv.agg_enable_bitmap, psta->under_exist_checking); ++ ++ if ( psta->expire_to <= (pstapriv->expire_to - 50 ) ) { ++ DBG_871X("asoc expire by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); ++ psta->under_exist_checking = 0; ++ psta->expire_to = 0; ++ } else if ( psta->expire_to <= (pstapriv->expire_to - 3) && (psta->under_exist_checking==0)) { ++ DBG_871X("asoc check by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); ++ psta->under_exist_checking = 1; ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ } ++ } ++#endif //CONFIG_TX_MCAST2UNI ++#endif //CONFIG_80211N_HT ++#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ ++ if (psta->expire_to <= 0) ++ { ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ if (padapter->registrypriv.wifi_spec == 1) ++ { ++ psta->expire_to = pstapriv->expire_to; ++ continue; ++ } ++ ++#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++#ifdef CONFIG_80211N_HT ++ ++#define KEEP_ALIVE_TRYCNT (3) ++ ++ if(psta->keep_alive_trycnt > 0 && psta->keep_alive_trycnt <= KEEP_ALIVE_TRYCNT) ++ { ++ if(psta->state & WIFI_STA_ALIVE_CHK_STATE) ++ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; ++ else ++ psta->keep_alive_trycnt = 0; ++ ++ } ++ else if((psta->keep_alive_trycnt > KEEP_ALIVE_TRYCNT) && !(psta->state & WIFI_STA_ALIVE_CHK_STATE)) ++ { ++ psta->keep_alive_trycnt = 0; ++ } ++ if((psta->htpriv.ht_option==_TRUE) && (psta->htpriv.ampdu_enable==_TRUE)) ++ { ++ uint priority = 1; //test using BK ++ u8 issued=0; ++ ++ //issued = (psta->htpriv.agg_enable_bitmap>>priority)&0x1; ++ issued |= (psta->htpriv.candidate_tid_bitmap>>priority)&0x1; ++ ++ if(0==issued) ++ { ++ if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) ++ { ++ psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); ++ ++ if (psta->state & WIFI_SLEEP_STATE) ++ psta->expire_to = 2; // 2x2=4 sec ++ else ++ psta->expire_to = 1; // 2 sec ++ ++ psta->state |= WIFI_STA_ALIVE_CHK_STATE; ++ ++ //add_ba_hdl(padapter, (u8*)paddbareq_parm); ++ ++ DBG_871X("issue addba_req to check if sta alive, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); ++ ++ issue_addba_req(padapter, psta->hwaddr, (u8)priority); ++ ++ _set_timer(&psta->addba_retry_timer, ADDBA_TO); ++ ++ psta->keep_alive_trycnt++; ++ ++ continue; ++ } ++ } ++ } ++ if(psta->keep_alive_trycnt > 0 && psta->state & WIFI_STA_ALIVE_CHK_STATE) ++ { ++ psta->keep_alive_trycnt = 0; ++ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; ++ DBG_871X("change to another methods to check alive if staion is at ps mode\n"); ++ } ++ ++#endif //CONFIG_80211N_HT ++#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ if (psta->state & WIFI_SLEEP_STATE) { ++ if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) { ++ //to check if alive by another methods if staion is at ps mode. ++ psta->expire_to = pstapriv->expire_to; ++ psta->state |= WIFI_STA_ALIVE_CHK_STATE; ++ ++ //DBG_871X("alive chk, sta:" MAC_FMT " is at ps mode!\n", MAC_ARG(psta->hwaddr)); ++ ++ //to update bcn with tim_bitmap for this station ++ pstapriv->tim_bitmap |= BIT(psta->aid); ++ update_beacon(padapter, _TIM_IE_, NULL, _TRUE); ++ ++ if(!pmlmeext->active_keep_alive_check) ++ continue; ++ } ++ } ++ #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ if (pmlmeext->active_keep_alive_check) { ++ int stainfo_offset; ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) { ++ chk_alive_list[chk_alive_num++] = stainfo_offset; ++ } ++ ++ continue; ++ } ++ #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); ++ updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); ++ } ++ else ++ { ++ /* TODO: Aging mechanism to digest frames in sleep_q to avoid running out of xmitframe */ ++ if (psta->sleepq_len > (NR_XMITFRAME/pstapriv->asoc_list_cnt) ++ && padapter->xmitpriv.free_xmitframe_cnt < ((NR_XMITFRAME/pstapriv->asoc_list_cnt)/2) ++ ){ ++ DBG_871X("%s sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n", __func__ ++ , MAC_ARG(psta->hwaddr) ++ , psta->sleepq_len, padapter->xmitpriv.free_xmitframe_cnt, pstapriv->asoc_list_cnt); ++ wakeup_sta_to_xmit(padapter, psta); ++ } ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++if (chk_alive_num) { ++ ++ u8 backup_oper_channel=0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ /* switch to correct channel of current network before issue keep-alive frames */ ++ if (rtw_get_oper_ch(padapter) != pmlmeext->cur_channel) { ++ backup_oper_channel = rtw_get_oper_ch(padapter); ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ } ++ ++ /* issue null data to check sta alive*/ ++ for (i = 0; i < chk_alive_num; i++) { ++ int ret = _FAIL; ++ ++ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); ++#ifdef CONFIG_ATMEL_RC_PATCH ++ if (_TRUE == _rtw_memcmp( pstapriv->atmel_rc_pattern, psta->hwaddr, ETH_ALEN)) ++ continue; ++ if (psta->flag_atmel_rc) ++ continue; ++#endif ++ if(!(psta->state &_FW_LINKED)) ++ continue; ++ ++ if (psta->state & WIFI_SLEEP_STATE) ++ ret = issue_nulldata(padapter, psta->hwaddr, 0, 1, 50); ++ else ++ ret = issue_nulldata(padapter, psta->hwaddr, 0, 3, 50); ++ ++ psta->keep_alive_trycnt++; ++ if (ret == _SUCCESS) ++ { ++ DBG_871X("asoc check, sta(" MAC_FMT ") is alive\n", MAC_ARG(psta->hwaddr)); ++ psta->expire_to = pstapriv->expire_to; ++ psta->keep_alive_trycnt = 0; ++ continue; ++ } ++ else if (psta->keep_alive_trycnt <= 3) ++ { ++ DBG_871X("ack check for asoc expire, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); ++ psta->expire_to = 1; ++ continue; ++ } ++ ++ psta->keep_alive_trycnt = 0; ++ DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (rtw_is_list_empty(&psta->asoc_list)==_FALSE) { ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ ++ if (backup_oper_channel>0) /* back to the original operation channel */ ++ SelectChannel(padapter, backup_oper_channel); ++} ++#endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ ++ ++ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); ++} ++ ++void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level) ++{ ++ int i; ++ u8 rf_type; ++ unsigned char sta_band = 0, shortGIrate = _FALSE; ++ u64 tx_ra_bitmap = 0; ++ struct ht_priv *psta_ht = NULL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ ++#ifdef CONFIG_80211N_HT ++ if(psta) ++ psta_ht = &psta->htpriv; ++ else ++ return; ++#endif //CONFIG_80211N_HT ++ ++ if(!(psta->state & _FW_LINKED)) ++ return; ++ ++#if 0//gtest ++ if(get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R) ++ { ++ //is this a 2r STA? ++ if((pstat->tx_ra_bitmap & 0x0ff00000) != 0 && !(priv->pshare->has_2r_sta & BIT(pstat->aid))) ++ { ++ priv->pshare->has_2r_sta |= BIT(pstat->aid); ++ if(rtw_read16(padapter, 0x102501f6) != 0xffff) ++ { ++ rtw_write16(padapter, 0x102501f6, 0xffff); ++ reset_1r_sta_RA(priv, 0xffff); ++ Switch_1SS_Antenna(priv, 3); ++ } ++ } ++ else// bg or 1R STA? ++ { ++ if((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len && priv->pshare->has_2r_sta == 0) ++ { ++ if(rtw_read16(padapter, 0x102501f6) != 0x7777) ++ { // MCS7 SGI ++ rtw_write16(padapter, 0x102501f6,0x7777); ++ reset_1r_sta_RA(priv, 0x7777); ++ Switch_1SS_Antenna(priv, 2); ++ } ++ } ++ } ++ ++ } ++ ++ if ((pstat->rssi_level < 1) || (pstat->rssi_level > 3)) ++ { ++ if (pstat->rssi >= priv->pshare->rf_ft_var.raGoDownUpper) ++ pstat->rssi_level = 1; ++ else if ((pstat->rssi >= priv->pshare->rf_ft_var.raGoDown20MLower) || ++ ((priv->pshare->is_40m_bw) && (pstat->ht_cap_len) && ++ (pstat->rssi >= priv->pshare->rf_ft_var.raGoDown40MLower) && ++ (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_SUPPORT_CH_WDTH_)))) ++ pstat->rssi_level = 2; ++ else ++ pstat->rssi_level = 3; ++ } ++ ++ // rate adaptive by rssi ++ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len) ++ { ++ if ((get_rf_mimo_mode(priv) == MIMO_1T2R) || (get_rf_mimo_mode(priv) == MIMO_1T1R)) ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x100f0000; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x100ff000; ++ break; ++ case 3: ++ if (priv->pshare->is_40m_bw) ++ pstat->tx_ra_bitmap &= 0x100ff005; ++ else ++ pstat->tx_ra_bitmap &= 0x100ff001; ++ ++ break; ++ } ++ } ++ else ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x1f0f0000; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x1f0ff000; ++ break; ++ case 3: ++ if (priv->pshare->is_40m_bw) ++ pstat->tx_ra_bitmap &= 0x000ff005; ++ else ++ pstat->tx_ra_bitmap &= 0x000ff001; ++ ++ break; ++ } ++ ++ // Don't need to mask high rates due to new rate adaptive parameters ++ //if (pstat->is_broadcom_sta) // use MCS12 as the highest rate vs. Broadcom sta ++ // pstat->tx_ra_bitmap &= 0x81ffffff; ++ ++ // NIC driver will report not supporting MCS15 and MCS14 in asoc req ++ //if (pstat->is_rtl8190_sta && !pstat->is_2t_mimo_sta) ++ // pstat->tx_ra_bitmap &= 0x83ffffff; // if Realtek 1x2 sta, don't use MCS15 and MCS14 ++ } ++ } ++ else if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) && isErpSta(pstat)) ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x00000f00; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x00000ff0; ++ break; ++ case 3: ++ pstat->tx_ra_bitmap &= 0x00000ff5; ++ break; ++ } ++ } ++ else ++ { ++ pstat->tx_ra_bitmap &= 0x0000000d; ++ } ++ ++ // disable tx short GI when station cannot rx MCS15(AP is 2T2R) ++ // disable tx short GI when station cannot rx MCS7 (AP is 1T2R or 1T1R) ++ // if there is only 1r STA and we are 2T2R, DO NOT mask SGI rate ++ if ((!(pstat->tx_ra_bitmap & 0x8000000) && (priv->pshare->has_2r_sta > 0) && (get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R)) || ++ (!(pstat->tx_ra_bitmap & 0x80000) && (get_rf_mimo_mode(padapter) != RTL8712_RF_2T2R))) ++ { ++ pstat->tx_ra_bitmap &= ~BIT(28); ++ } ++#endif ++ ++ rtw_hal_update_sta_rate_mask(padapter, psta); ++ tx_ra_bitmap = psta->ra_mask; ++ ++ shortGIrate = query_ra_short_GI(psta); ++ ++ if ( pcur_network->Configuration.DSConfig > 14 ) { ++ ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_5N ; ++ ++ if (tx_ra_bitmap & 0xff0) ++ sta_band |= WIRELESS_11A; ++ ++ // 5G band ++ #ifdef CONFIG_80211AC_VHT ++ if (psta->vhtpriv.vht_option) { ++ sta_band = WIRELESS_11_5AC; ++ } ++ #endif ++ ++ } else { ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_24N; ++ ++ if (tx_ra_bitmap & 0xff0) ++ sta_band |= WIRELESS_11G; ++ ++ if (tx_ra_bitmap & 0x0f) ++ sta_band |= WIRELESS_11B; ++ } ++ ++ psta->wireless_mode = sta_band; ++ psta->raid = rtw_hal_networktype_to_raid(padapter, psta); ++ ++ if (psta->aid < NUM_STA) ++ { ++ u8 arg[4] = {0}; ++ ++ arg[0] = psta->mac_id; ++ arg[1] = psta->raid; ++ arg[2] = shortGIrate; ++ arg[3] = psta->init_rate; ++ ++ DBG_871X("%s=> mac_id:%d , raid:%d , shortGIrate=%d, tx_ra_bitmap:0x%016llx, networkType:0x%02x\n", ++ __FUNCTION__, psta->mac_id, psta->raid, shortGIrate, tx_ra_bitmap, psta->wireless_mode); ++ ++ rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, rssi_level); ++ } ++ else ++ { ++ DBG_871X("station aid %d exceed the max number\n", psta->aid); ++ } ++ ++} ++ ++void update_bmc_sta(_adapter *padapter) ++{ ++ _irqL irqL; ++ unsigned char network_type; ++ int supportRateNum = 0; ++ u64 tx_ra_bitmap = 0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct sta_info *psta = rtw_get_bcmc_stainfo(padapter); ++ ++ if(psta) ++ { ++ psta->aid = 0;//default set to 0 ++ psta->qos_option = 0; ++#ifdef CONFIG_80211N_HT ++ psta->htpriv.ht_option = _FALSE; ++#endif //CONFIG_80211N_HT ++ ++ psta->ieee8021x_blocked = 0; ++ ++ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); ++ ++ //psta->dot118021XPrivacy = _NO_PRIVACY_;//!!! remove it, because it has been set before this. ++ ++ //prepare for add_RATid ++ supportRateNum = rtw_get_rateset_len((u8*)&pcur_network->SupportedRates); ++ network_type = rtw_check_network_type((u8*)&pcur_network->SupportedRates, supportRateNum, pcur_network->Configuration.DSConfig); ++ if (IsSupportedTxCCK(network_type)) { ++ network_type = WIRELESS_11B; ++ } ++ else if (network_type == WIRELESS_INVALID) { // error handling ++ if ( pcur_network->Configuration.DSConfig > 14 ) ++ network_type = WIRELESS_11A; ++ else ++ network_type = WIRELESS_11B; ++ } ++ update_sta_basic_rate(psta, network_type); ++ psta->wireless_mode = network_type; ++ ++ rtw_hal_update_sta_rate_mask(padapter, psta); ++ tx_ra_bitmap = psta->ra_mask; ++ ++ psta->raid = rtw_hal_networktype_to_raid(padapter,psta); ++ ++ //if(pHalData->fw_ractrl == _TRUE) ++ { ++ u8 arg[4] = {0}; ++ ++ arg[0] = psta->mac_id; ++ arg[1] = psta->raid; ++ arg[2] = 0; ++ arg[3] = psta->init_rate; ++ ++ DBG_871X("%s=> mac_id:%d , raid:%d , bitmap=0x%016llx\n", ++ __FUNCTION__ , psta->mac_id, psta->raid , tx_ra_bitmap); ++ ++ rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, 0); ++ } ++ ++ rtw_sta_media_status_rpt(padapter, psta, 1); ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state = _FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ } ++ else ++ { ++ DBG_871X("add_RATid_bmc_sta error!\n"); ++ } ++ ++} ++ ++//notes: ++//AID: 1~MAX for sta and 0 for bc/mc in ap/adhoc mode ++//MAC_ID = AID+1 for sta in ap/adhoc mode ++//MAC_ID = 1 for bc/mc for sta/ap/adhoc ++//MAC_ID = 0 for bssid for sta/ap/adhoc ++//CAM_ID = //0~3 for default key, cmd_id=macid + 3, macid=aid+1; ++ ++void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++#ifdef CONFIG_80211N_HT ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++ struct ht_priv *phtpriv_sta = &psta->htpriv; ++#endif //CONFIG_80211N_HT ++ u8 cur_ldpc_cap=0, cur_stbc_cap=0, cur_beamform_cap=0; ++ //set intf_tag to if1 ++ //psta->intf_tag = 0; ++ ++ DBG_871X("%s\n",__FUNCTION__); ++ ++ //psta->mac_id = psta->aid+4; ++ //psta->mac_id = psta->aid+1;//alloc macid when call rtw_alloc_stainfo(), ++ //release macid when call rtw_free_stainfo() ++ ++ //ap mode ++ rtw_hal_set_odm_var(padapter,HAL_ODM_STA_INFO,psta,_TRUE); ++ ++ if(psecuritypriv->dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) ++ psta->ieee8021x_blocked = _TRUE; ++ else ++ psta->ieee8021x_blocked = _FALSE; ++ ++ ++ //update sta's cap ++ ++ //ERP ++ VCS_update(padapter, psta); ++#ifdef CONFIG_80211N_HT ++ //HT related cap ++ if(phtpriv_sta->ht_option) ++ { ++ //check if sta supports rx ampdu ++ phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable; ++ ++ phtpriv_sta->rx_ampdu_min_spacing = (phtpriv_sta->ht_cap.ampdu_params_info&IEEE80211_HT_CAP_AMPDU_DENSITY)>>2; ++ ++ // bwmode ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) ++ { ++ psta->bw_mode = CHANNEL_WIDTH_40; ++ } ++ else ++ { ++ psta->bw_mode = CHANNEL_WIDTH_20; ++ } ++ ++ if (psta->ht_40mhz_intolerant) ++ psta->bw_mode = CHANNEL_WIDTH_20; ++ ++ if(pmlmeext->cur_bwmode < psta->bw_mode) ++ { ++ psta->bw_mode = pmlmeext->cur_bwmode; ++ } ++ ++ phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; ++ ++ ++ //check if sta support s Short GI 20M ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) ++ { ++ phtpriv_sta->sgi_20m = _TRUE; ++ } ++ ++ //check if sta support s Short GI 40M ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) ++ { ++ if(psta->bw_mode == CHANNEL_WIDTH_40) //according to psta->bw_mode ++ phtpriv_sta->sgi_40m = _TRUE; ++ else ++ phtpriv_sta->sgi_40m = _FALSE; ++ } ++ ++ psta->qos_option = _TRUE; ++ ++ // B0 Config LDPC Coding Capability ++ if (TEST_FLAG(phtpriv_ap->ldpc_cap, LDPC_HT_ENABLE_TX) && ++ GET_HT_CAP_ELE_LDPC_CAP((u8 *)(&phtpriv_sta->ht_cap))) ++ { ++ SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); ++ DBG_871X("Enable HT Tx LDPC for STA(%d)\n",psta->aid); ++ } ++ ++ // B7 B8 B9 Config STBC setting ++ if (TEST_FLAG(phtpriv_ap->stbc_cap, STBC_HT_ENABLE_TX) && ++ GET_HT_CAP_ELE_RX_STBC((u8 *)(&phtpriv_sta->ht_cap))) ++ { ++ SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX) ); ++ DBG_871X("Enable HT Tx STBC for STA(%d)\n",psta->aid); ++ } ++ ++#ifdef CONFIG_BEAMFORMING ++ /*Config Tx beamforming setting*/ ++ if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && ++ GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP((u8 *)(&phtpriv_sta->ht_cap))) ++ { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); ++ /*Shift to BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP*/ ++ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS((u8 *)(&phtpriv_sta->ht_cap)) << 6); ++ } ++ ++ if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && ++ GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP((u8 *)(&phtpriv_sta->ht_cap))) ++ { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); ++ /*Shift to BEAMFORMING_HT_BEAMFORMER_STEER_NUM*/ ++ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS((u8 *)(&phtpriv_sta->ht_cap)) << 4); ++ } ++ if (cur_beamform_cap) { ++ DBG_871X("Client STA(%d) HT Beamforming Cap = 0x%02X\n", psta->aid, cur_beamform_cap); ++ } ++#endif /*CONFIG_BEAMFORMING*/ ++ } ++ else ++ { ++ phtpriv_sta->ampdu_enable = _FALSE; ++ ++ phtpriv_sta->sgi_20m = _FALSE; ++ phtpriv_sta->sgi_40m = _FALSE; ++ psta->bw_mode = CHANNEL_WIDTH_20; ++ phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ } ++ ++ phtpriv_sta->ldpc_cap = cur_ldpc_cap; ++ phtpriv_sta->stbc_cap = cur_stbc_cap; ++ phtpriv_sta->beamform_cap = cur_beamform_cap; ++ ++ //Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ phtpriv_sta->agg_enable_bitmap = 0x0;//reset ++ phtpriv_sta->candidate_tid_bitmap = 0x0;//reset ++#endif //CONFIG_80211N_HT ++ ++#ifdef CONFIG_80211AC_VHT ++ update_sta_vht_info_apmode(padapter, psta); ++#endif ++ ++ update_ldpc_stbc_cap(psta); ++ ++ //todo: init other variables ++ ++ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); ++ ++ ++ //add ratid ++ //add_RATid(padapter, psta);//move to ap_sta_info_defer_update() ++ ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state |= _FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ ++} ++ ++static void update_ap_info(_adapter *padapter, struct sta_info *psta) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++#ifdef CONFIG_80211N_HT ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++#endif //CONFIG_80211N_HT ++ ++ psta->wireless_mode = pmlmeext->cur_wireless_mode; ++ ++ psta->bssratelen = rtw_get_rateset_len(pnetwork->SupportedRates); ++ _rtw_memcpy(psta->bssrateset, pnetwork->SupportedRates, psta->bssratelen); ++ ++#ifdef CONFIG_80211N_HT ++ //HT related cap ++ if(phtpriv_ap->ht_option) ++ { ++ //check if sta supports rx ampdu ++ //phtpriv_ap->ampdu_enable = phtpriv_ap->ampdu_enable; ++ ++ //check if sta support s Short GI 20M ++ if((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) ++ { ++ phtpriv_ap->sgi_20m = _TRUE; ++ } ++ //check if sta support s Short GI 40M ++ if((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) ++ { ++ phtpriv_ap->sgi_40m = _TRUE; ++ } ++ ++ psta->qos_option = _TRUE; ++ } ++ else ++ { ++ phtpriv_ap->ampdu_enable = _FALSE; ++ ++ phtpriv_ap->sgi_20m = _FALSE; ++ phtpriv_ap->sgi_40m = _FALSE; ++ } ++ ++ psta->bw_mode = pmlmeext->cur_bwmode; ++ phtpriv_ap->ch_offset = pmlmeext->cur_ch_offset; ++ ++ phtpriv_ap->agg_enable_bitmap = 0x0;//reset ++ phtpriv_ap->candidate_tid_bitmap = 0x0;//reset ++ ++ _rtw_memcpy(&psta->htpriv, &pmlmepriv->htpriv, sizeof(struct ht_priv)); ++ ++#ifdef CONFIG_80211AC_VHT ++ _rtw_memcpy(&psta->vhtpriv, &pmlmepriv->vhtpriv, sizeof(struct vht_priv)); ++#endif //CONFIG_80211AC_VHT ++ ++#endif //CONFIG_80211N_HT ++ ++ psta->state |= WIFI_AP_STATE; /* Aries, add,fix bug of flush_cam_entry at STOP AP mode , 0724 */ ++} ++ ++static void rtw_set_hw_wmm_param(_adapter *padapter) ++{ ++ u8 ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime; ++ u8 acm_mask; ++ u16 TXOP; ++ u32 acParm, i; ++ u32 edca[4], inx[4]; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ acm_mask = 0; ++ ++ if (IsSupported5G(pmlmeext->cur_wireless_mode) || ++ (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) ++ aSifsTime = 16; ++ else ++ aSifsTime = 10; ++ ++ if (pmlmeinfo->WMM_enable == 0) { ++ padapter->mlmepriv.acm_mask = 0; ++ ++ AIFS = aSifsTime + (2 * pmlmeinfo->slotTime); ++ ++ if (pmlmeext->cur_wireless_mode & (WIRELESS_11G | WIRELESS_11A)) { ++ ECWMin = 4; ++ ECWMax = 10; ++ } else if (pmlmeext->cur_wireless_mode & WIRELESS_11B) { ++ ECWMin = 5; ++ ECWMax = 10; ++ } else { ++ ECWMin = 4; ++ ECWMax = 10; ++ } ++ ++ TXOP = 0; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); ++ ++ ECWMin = 2; ++ ECWMax = 3; ++ TXOP = 0x2f; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); ++ ++ } else { ++ edca[0] = edca[1] = edca[2] = edca[3] = 0; ++ ++ /*TODO:*/ ++ acm_mask = 0; ++ padapter->mlmepriv.acm_mask = acm_mask; ++ ++ /* ++ //BK ++ //AIFS = AIFSN * slot time + SIFS - r2t phy delay ++ */ ++ AIFS = (7 * pmlmeinfo->slotTime) + aSifsTime; ++ ECWMin = 4; ++ ECWMax = 10; ++ TXOP = 0; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); ++ edca[XMIT_BK_QUEUE] = acParm; ++ DBG_871X("WMM(BK): %x\n", acParm); ++ ++ /* BE */ ++ AIFS = (3 * pmlmeinfo->slotTime) + aSifsTime; ++ ECWMin = 4; ++ ECWMax = 6; ++ TXOP = 0; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); ++ edca[XMIT_BE_QUEUE] = acParm; ++ DBG_871X("WMM(BE): %x\n", acParm); ++ ++ /* VI */ ++ AIFS = (1 * pmlmeinfo->slotTime) + aSifsTime; ++ ECWMin = 3; ++ ECWMax = 4; ++ TXOP = 94; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); ++ edca[XMIT_VI_QUEUE] = acParm; ++ DBG_871X("WMM(VI): %x\n", acParm); ++ ++ /* VO */ ++ AIFS = (1 * pmlmeinfo->slotTime) + aSifsTime; ++ ECWMin = 2; ++ ECWMax = 3; ++ TXOP = 47; ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); ++ edca[XMIT_VO_QUEUE] = acParm; ++ DBG_871X("WMM(VO): %x\n", acParm); ++ ++ ++ if (padapter->registrypriv.acm_method == 1) ++ rtw_hal_set_hwreg(padapter, HW_VAR_ACM_CTRL, (u8 *)(&acm_mask)); ++ else ++ padapter->mlmepriv.acm_mask = acm_mask; ++ ++ inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; ++ ++ if (pregpriv->wifi_spec == 1) { ++ u32 j, tmp, change_inx = _FALSE; ++ ++ /* entry indx: 0->vo, 1->vi, 2->be, 3->bk. */ ++ for (i = 0 ; i < 4 ; i++) { ++ for (j = i+1 ; j < 4 ; j++) { ++ /* compare CW and AIFS */ ++ if ((edca[j] & 0xFFFF) < (edca[i] & 0xFFFF)) { ++ change_inx = _TRUE; ++ } else if ((edca[j] & 0xFFFF) == (edca[i] & 0xFFFF)) { ++ /* compare TXOP */ ++ if ((edca[j] >> 16) > (edca[i] >> 16)) ++ change_inx = _TRUE; ++ } ++ ++ if (change_inx) { ++ tmp = edca[i]; ++ edca[i] = edca[j]; ++ edca[j] = tmp; ++ ++ tmp = inx[i]; ++ inx[i] = inx[j]; ++ inx[j] = tmp; ++ ++ change_inx = _FALSE; ++ } ++ } ++ } ++ } ++ ++ for (i = 0 ; i < 4 ; i++) { ++ pxmitpriv->wmm_para_seq[i] = inx[i]; ++ DBG_871X("wmm_para_seq(%d): %d\n", i, pxmitpriv->wmm_para_seq[i]); ++ } ++ ++ } ++ ++} ++ ++static void update_hw_ht_param(_adapter *padapter) ++{ ++ unsigned char max_AMPDU_len; ++ unsigned char min_MPDU_spacing; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ ++ //handle A-MPDU parameter field ++ /* ++ AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k ++ AMPDU_para [4:2]:Min MPDU Start Spacing ++ */ ++ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; ++ ++ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); ++ ++ // ++ // Config SM Power Save setting ++ // ++ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; ++ if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) ++ { ++ /*u8 i; ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ }*/ ++ DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); ++ } ++ ++ // ++ // Config current HT Protection mode. ++ // ++ //pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; ++ ++} ++ ++static void rtw_ap_check_scan(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ u32 delta_time, lifetime; ++ struct wlan_network *pnetwork = NULL; ++ WLAN_BSSID_EX *pbss = NULL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ u8 do_scan = _FALSE; ++ ++ lifetime = SCANQUEUE_LIFETIME; /* 20 sec */ ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ phead = get_list_head(queue); ++ if (rtw_end_of_queue_search(phead, get_next(phead)) == _TRUE) ++ if (padapter->registrypriv.wifi_spec) ++ do_scan = _TRUE; ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ if (padapter->registrypriv.acs_auto_scan) { ++ do_scan = _TRUE; ++ rtw_acs_start(padapter, _TRUE); ++ } ++#endif ++ ++ if (_TRUE == do_scan) { ++ DBG_871X("%s : drv scans by itself and wait_completed\n", __func__); ++ rtw_drv_scan_by_self(padapter); ++ rtw_scan_wait_completed(padapter); ++ } ++ ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ if (padapter->registrypriv.acs_auto_scan) ++ rtw_acs_start(padapter, _FALSE); ++#endif ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while (1) { ++ ++ if (rtw_end_of_queue_search(phead, plist) == _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ if (rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0 ++ && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE ++ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid))) { ++ delta_time = (u32) rtw_get_passing_time_ms(pnetwork->last_scanned); ++ ++ if (delta_time < lifetime) { ++ ++ uint ie_len = 0; ++ u8 *pbuf = NULL; ++ u8 *ie = NULL; ++ ++ pbss = &pnetwork->network; ++ ie = pbss->IEs; ++ ++ /*check if HT CAP INFO IE exists or not*/ ++ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss->IELength - _BEACON_IE_OFFSET_)); ++ if (pbuf == NULL) { ++ /* HT CAP INFO IE don't exist, it is b/g mode bss.*/ ++ ++ if (pmlmepriv->olbc == _FALSE) ++ pmlmepriv->olbc = _TRUE; ++ ++ if (pmlmepriv->olbc_ht == _FALSE) ++ pmlmepriv->olbc_ht = _TRUE; ++ } ++ } ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ pmlmepriv->num_sta_no_ht = 0; /* reset to 0 after ap do scanning*/ ++ ++} ++ ++void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter) ++{ ++ WLAN_BSSID_EX *pnetwork = &(adapter->mlmepriv.cur_network.network); ++ struct sta_info *sta = NULL; ++ ++ /* update cur_wireless_mode */ ++ update_wireless_mode(adapter); ++ ++ /* update RRSR and RTS_INIT_RATE register after set channel and bandwidth */ ++ UpdateBrateTbl(adapter, pnetwork->SupportedRates); ++ rtw_hal_set_hwreg(adapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); ++ ++ /* update capability after cur_wireless_mode updated */ ++ update_capinfo(adapter, rtw_get_capability(pnetwork)); ++ ++ /* update bc/mc sta_info */ ++ update_bmc_sta(adapter); ++ ++ /* update AP's sta info */ ++ sta = rtw_get_stainfo(&adapter->stapriv, pnetwork->MacAddress); ++ if (!sta) { ++ DBG_871X(FUNC_ADPT_FMT" !sta for macaddr="MAC_FMT"\n", FUNC_ADPT_ARG(adapter), MAC_ARG(pnetwork->MacAddress)); ++ rtw_warn_on(1); ++ return; ++ } ++ ++ update_ap_info(adapter, sta); ++} ++ ++void start_bss_network(_adapter *padapter, struct createbss_parm *parm) ++{ ++#define DUMP_ADAPTERS_STATUS 0 ++ ++ u8 val8; ++ u16 bcn_interval; ++ u32 acparm; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; /* used as input */ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); ++ u8 req_ch, req_bw, req_offset; ++ bool ch_setting_changed = _FALSE; ++ u8 ch_to_set = 0, bw_to_set, offset_to_set; ++ u8 doiqk = _FALSE; ++ ++ if (parm->req_ch == 0) { ++ /* change to unspecificed ch, bw, offset, get from IE */ ++ goto get_cbhw_from_ie; ++ } else if (parm->req_ch > 0) { ++ /* change ch, bw, offset */ ++ req_ch = parm->req_ch; ++ req_bw = parm->req_bw; ++ req_offset = parm->req_offset; ++ goto change_chbw; ++ } ++ ++ bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod; ++ ++ //check if there is wps ie, ++ //if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, ++ //and at first time the security ie ( RSN/WPA IE) will not include in beacon. ++ if(NULL == rtw_get_wps_ie(pnetwork->IEs+_FIXED_IE_LENGTH_, pnetwork->IELength-_FIXED_IE_LENGTH_, NULL, NULL)) ++ { ++ pmlmeext->bstart_bss = _TRUE; ++ } ++ ++ //todo: update wmm, ht cap ++ //pmlmeinfo->WMM_enable; ++ //pmlmeinfo->HT_enable; ++ if(pmlmepriv->qospriv.qos_option) ++ pmlmeinfo->WMM_enable = _TRUE; ++#ifdef CONFIG_80211N_HT ++ if(pmlmepriv->htpriv.ht_option) ++ { ++ pmlmeinfo->WMM_enable = _TRUE; ++ pmlmeinfo->HT_enable = _TRUE; ++ //pmlmeinfo->HT_info_enable = _TRUE; ++ //pmlmeinfo->HT_caps_enable = _TRUE; ++ ++ update_hw_ht_param(padapter); ++ } ++#endif //#CONFIG_80211N_HT ++ ++#ifdef CONFIG_80211AC_VHT ++ if(pmlmepriv->vhtpriv.vht_option) { ++ pmlmeinfo->VHT_enable = _TRUE; ++ update_hw_vht_param(padapter); ++ } ++#endif //CONFIG_80211AC_VHT ++ ++ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time ++ { ++ //WEP Key will be set before this function, do not clear CAM. ++ if ((psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)) ++ flush_all_cam_entry(padapter); //clear CAM ++ } ++ ++ //set MSR to AP_Mode ++ Set_MSR(padapter, _HW_STATE_AP_); ++ ++ //Set BSSID REG ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pnetwork->MacAddress); ++ ++ //Set EDCA param reg ++#ifdef CONFIG_CONCURRENT_MODE ++ acparm = 0x005ea42b; ++#else ++ acparm = 0x002F3217; // VO ++#endif ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); ++ acparm = 0x005E4317; // VI ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); ++ //acparm = 0x00105320; // BE ++ acparm = 0x005ea42b; ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); ++ acparm = 0x0000A444; // BK ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); ++ ++ //Set Security ++ val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ ++ //Beacon Control related register ++ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval)); ++ ++#if 0 ++ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time ++ { ++ //u32 initialgain; ++ ++ //initialgain = 0x1e; ++ ++ ++ //disable dynamic functions, such as high power, DIG ++ /*rtw_phydm_ability_backup(padapter);*/ ++ /*rtw_phydm_func_disable_all(padapter);*/ ++ ++ //turn on all dynamic functions ++ /* Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE);*/ ++ ++ /*rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE);*/ ++ ++ } ++#endif ++ ++get_cbhw_from_ie: ++ rtw_ies_get_chbw(pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs) ++ , pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs) ++ , &req_ch, &req_bw, &req_offset); ++ ++change_chbw: ++ rtw_warn_on(req_ch == 0); ++ ++ ch_setting_changed = rtw_ap_chbw_decision(padapter, req_ch, req_bw, req_offset ++ , &ch_to_set, &bw_to_set, &offset_to_set); ++ ++ //let pnetwork_mlmeext == pnetwork_mlme. ++ _rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length); ++ ++ rtw_start_bss_hdl_after_chbw_decided(padapter); ++ ++ #if defined(CONFIG_DFS_MASTER) ++ rtw_dfs_master_status_apply(padapter, MLME_AP_STARTED); ++ #endif ++ ++ doiqk = _TRUE; ++ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); ++ ++ if (ch_to_set != 0) ++ set_channel_bwmode(padapter, ch_to_set, offset_to_set, bw_to_set); ++ ++ doiqk = _FALSE; ++ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); ++ if (DUMP_ADAPTERS_STATUS) { ++ DBG_871X(FUNC_ADPT_FMT" done\n", FUNC_ADPT_ARG(padapter)); ++ dump_adapters_status(RTW_DBGDUMP , adapter_to_dvobj(padapter)); ++ } ++ ++ if (_TRUE == pmlmeext->bstart_bss ++ && !check_fwstate(pmlmepriv, WIFI_SITE_MONITOR) ++ && !check_fwstate(pmlmepriv, WIFI_OP_CH_SWITCHING) ++ #ifdef CONFIG_CONCURRENT_MODE ++ && !check_buddy_fwstate(padapter, WIFI_SITE_MONITOR) ++ #endif ++ ) { ++ ++ if ((pmlmepriv->olbc == _TRUE) || (pmlmepriv->olbc_ht == _TRUE)) { ++ ++ /* AP is not starting a 40 MHz BSS in presence of an 802.11g BSS. */ ++ ++ pmlmepriv->ht_op_mode &= (~HT_INFO_OPERATION_MODE_OP_MODE_MASK); ++ pmlmepriv->ht_op_mode |= OP_MODE_MAY_BE_LEGACY_STAS; ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE); ++ } ++ ++ update_beacon(padapter, _TIM_IE_, NULL, _TRUE); ++ ++ #if !defined(CONFIG_INTERRUPT_BASED_TXBCN) ++ #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ /* other case will tx beacon when bcn interrupt coming in. */ ++ if (send_beacon(padapter) == _FAIL) ++ DBG_871X("issue_beacon, fail!\n"); ++ #endif ++ #endif /* !defined(CONFIG_INTERRUPT_BASED_TXBCN) */ ++ } ++ ++ /*Set EDCA param reg after update cur_wireless_mode & update_capinfo*/ ++ if (pregpriv->wifi_spec == 1) ++ rtw_set_hw_wmm_param(padapter); ++ ++ /*pmlmeext->bstart_bss = _TRUE;*/ ++} ++ ++int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) ++{ ++ int ret=_SUCCESS; ++ u8 *p; ++ u8 *pHT_caps_ie=NULL; ++ u8 *pHT_info_ie=NULL; ++ u16 cap, ht_cap=_FALSE; ++ uint ie_len = 0; ++ int group_cipher, pairwise_cipher; ++ u8 channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX]; ++ int supportRateNum = 0; ++ u8 OUI1[] = {0x00, 0x50, 0xf2,0x01}; ++ u8 wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ie = pbss_network->IEs; ++ u8 vht_cap=_FALSE; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 rf_num = 0; ++ ++ /* SSID */ ++ /* Supported rates */ ++ /* DS Params */ ++ /* WLAN_EID_COUNTRY */ ++ /* ERP Information element */ ++ /* Extended supported rates */ ++ /* WPA/WPA2 */ ++ /* Wi-Fi Wireless Multimedia Extensions */ ++ /* ht_capab, ht_oper */ ++ /* WPS IE */ ++ ++ DBG_871X("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return _FAIL; ++ ++ ++ if(len>MAX_IE_SZ) ++ return _FAIL; ++ ++ pbss_network->IELength = len; ++ ++ _rtw_memset(ie, 0, MAX_IE_SZ); ++ ++ _rtw_memcpy(ie, pbuf, pbss_network->IELength); ++ ++ ++ if(pbss_network->InfrastructureMode!=Ndis802_11APMode) ++ return _FAIL; ++ ++ ++ rtw_ap_check_scan(padapter); ++ ++ ++ pbss_network->Rssi = 0; ++ ++ _rtw_memcpy(pbss_network->MacAddress, adapter_mac_addr(padapter), ETH_ALEN); ++ ++ //beacon interval ++ p = rtw_get_beacon_interval_from_ie(ie);//ie + 8; // 8: TimeStamp, 2: Beacon Interval 2:Capability ++ //pbss_network->Configuration.BeaconPeriod = le16_to_cpu(*(unsigned short*)p); ++ pbss_network->Configuration.BeaconPeriod = RTW_GET_LE16(p); ++ ++ //capability ++ //cap = *(unsigned short *)rtw_get_capability_from_ie(ie); ++ //cap = le16_to_cpu(cap); ++ cap = RTW_GET_LE16(ie); ++ ++ //SSID ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength -_BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ _rtw_memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); ++ pbss_network->Ssid.SsidLength = ie_len; ++ #ifdef CONFIG_P2P ++ _rtw_memcpy(padapter->wdinfo.p2p_group_ssid, pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); ++ padapter->wdinfo.p2p_group_ssid_len = pbss_network->Ssid.SsidLength; ++ #endif ++ } ++ ++ //chnnel ++ channel = 0; ++ pbss_network->Configuration.Length = 0; ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _DSSET_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ channel = *(p + 2); ++ ++ pbss_network->Configuration.DSConfig = channel; ++ ++ ++ _rtw_memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX); ++ // get supported rates ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ { ++ _rtw_memcpy(supportRate, p+2, ie_len); ++ supportRateNum = ie_len; ++ } ++ ++ //get ext_supported rates ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_); ++ if (p != NULL) ++ { ++ _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); ++ supportRateNum += ie_len; ++ ++ } ++ ++ network_type = rtw_check_network_type(supportRate, supportRateNum, channel); ++ ++ rtw_set_supported_rate(pbss_network->SupportedRates, network_type); ++ ++ ++ //parsing ERP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); ++ } ++ ++ //update privacy/security ++ if (cap & BIT(4)) ++ pbss_network->Privacy = 1; ++ else ++ pbss_network->Privacy = 0; ++ ++ psecuritypriv->wpa_psk = 0; ++ ++ //wpa2 ++ group_cipher = 0; pairwise_cipher = 0; ++ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; ++ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ if(rtw_parse_wpa2_ie(p, ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) ++ { ++ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ ++ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x ++ psecuritypriv->wpa_psk |= BIT(1); ++ ++ psecuritypriv->wpa2_group_cipher = group_cipher; ++ psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; ++#if 0 ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa2_group_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa2_group_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa2_group_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa2_group_cipher = _WEP104_; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa2_pairwise_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa2_pairwise_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa2_pairwise_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa2_pairwise_cipher = _WEP104_; ++ break; ++ } ++#endif ++ } ++ ++ } ++ ++ //wpa ++ ie_len = 0; ++ group_cipher = 0; pairwise_cipher = 0; ++ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; ++ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; ++ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) ++ { ++ p = rtw_get_ie(p, _SSN_IE_1_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if ((p) && (_rtw_memcmp(p+2, OUI1, 4))) ++ { ++ if(rtw_parse_wpa_ie(p, ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) ++ { ++ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ ++ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x ++ ++ psecuritypriv->wpa_psk |= BIT(0); ++ ++ psecuritypriv->wpa_group_cipher = group_cipher; ++ psecuritypriv->wpa_pairwise_cipher = pairwise_cipher; ++ ++#if 0 ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa_group_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa_group_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa_group_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa_group_cipher = _WEP104_; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa_pairwise_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa_pairwise_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa_pairwise_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa_pairwise_cipher = _WEP104_; ++ break; ++ } ++#endif ++ } ++ ++ break; ++ ++ } ++ ++ if ((p == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ ++ } ++ ++ //wmm ++ ie_len = 0; ++ pmlmepriv->qospriv.qos_option = 0; ++ if(pregistrypriv->wmm_enable) ++ { ++ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) ++ { ++ p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if((p) && _rtw_memcmp(p+2, WMM_PARA_IE, 6)) ++ { ++ pmlmepriv->qospriv.qos_option = 1; ++ ++ *(p+8) |= BIT(7);//QoS Info, support U-APSD ++ ++ /* disable all ACM bits since the WMM admission control is not supported */ ++ *(p + 10) &= ~BIT(4); /* BE */ ++ *(p + 14) &= ~BIT(4); /* BK */ ++ *(p + 18) &= ~BIT(4); /* VI */ ++ *(p + 22) &= ~BIT(4); /* VO */ ++ ++ break; ++ } ++ ++ if ((p == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ } ++ } ++#ifdef CONFIG_80211N_HT ++ //parsing HT_CAP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ u8 rf_type=0; ++ HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor=MAX_AMPDU_FACTOR_64K; ++ struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2); ++ ++ if (0) { ++ DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter)); ++ dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len); ++ } ++ ++ pHT_caps_ie=p; ++ ++ ht_cap = _TRUE; ++ network_type |= WIRELESS_11_24N; ++ ++ rtw_ht_use_default_setting(padapter); ++ ++ /* Update HT Capabilities Info field */ ++ if (pmlmepriv->htpriv.sgi_20m == _FALSE) ++ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20); ++ ++ if (pmlmepriv->htpriv.sgi_40m == _FALSE) ++ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_40); ++ ++ if (!TEST_FLAG(pmlmepriv->htpriv.ldpc_cap, LDPC_HT_ENABLE_RX)) ++ { ++ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_LDPC_CODING); ++ } ++ ++ if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_TX)) ++ { ++ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_TX_STBC); ++ } ++ ++ if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_RX)) ++ { ++ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R); ++ } ++ ++ /* Update A-MPDU Parameters field */ ++ pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR|IEEE80211_HT_CAP_AMPDU_DENSITY); ++ ++ if((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || ++ (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) ++ { ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); ++ } ++ else ++ { ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); ++ } ++ ++ rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); //set Max Rx AMPDU size to 64K ++ ++ _rtw_memcpy(&(pmlmeinfo->HT_caps), pht_cap, sizeof(struct HT_caps_element)); ++ ++ /* Update Supported MCS Set field */ ++ { ++ int i; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ /* RX MCS Bitmask */ ++ switch(rf_type) ++ { ++ case RF_1T1R: ++ case RF_1T2R: //? ++ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R); ++ break; ++ case RF_2T2R: ++ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R); ++ break; ++ case RF_3T3R: ++ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_3R); ++ break; ++ default: ++ DBG_871X("[warning] rf_type %d is not expected\n", rf_type); ++ } ++ for (i = 0; i < 10; i++) ++ *(HT_CAP_ELE_RX_MCS_MAP(pht_cap)+i) &= padapter->mlmeextpriv.default_supported_mcs_set[i]; ++ } ++ ++#ifdef CONFIG_BEAMFORMING ++ // Use registry value to enable HT Beamforming. ++ // ToDo: use configure file to set these capability. ++ pht_cap->tx_BF_cap_info = 0; ++ ++ // HT Beamformer ++ if(TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) ++ { ++ // Transmit NDP Capable ++ SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(pht_cap, 1); ++ // Explicit Compressed Steering Capable ++ SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pht_cap, 1); ++ // Compressed Steering Number Antennas ++ SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, 1); ++ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); ++ SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pht_cap, rf_num); ++ } ++ ++ // HT Beamformee ++ if(TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) ++ { ++ // Receive NDP Capable ++ SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(pht_cap, 1); ++ // Explicit Compressed Beamforming Feedback Capable ++ SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pht_cap, 2); ++ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); ++ SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, rf_num); ++ } ++#endif //CONFIG_BEAMFORMING ++ ++ _rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len); ++ ++ if (0) { ++ DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter)); ++ dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len); ++ } ++ } ++ ++ //parsing HT_INFO_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ pHT_info_ie=p; ++ } ++#endif //CONFIG_80211N_HT ++ switch(network_type) ++ { ++ case WIRELESS_11B: ++ pbss_network->NetworkTypeInUse = Ndis802_11DS; ++ break; ++ case WIRELESS_11G: ++ case WIRELESS_11BG: ++ case WIRELESS_11G_24N: ++ case WIRELESS_11BG_24N: ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; ++ break; ++ case WIRELESS_11A: ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM5; ++ break; ++ default : ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; ++ break; ++ } ++ ++ pmlmepriv->cur_network.network_type = network_type; ++ ++#ifdef CONFIG_80211N_HT ++ pmlmepriv->htpriv.ht_option = _FALSE; ++ ++ if( (psecuritypriv->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || ++ (psecuritypriv->wpa_pairwise_cipher&WPA_CIPHER_TKIP)) ++ { ++ //todo: ++ //ht_cap = _FALSE; ++ } ++ ++ //ht_cap ++ if(pregistrypriv->ht_enable && ht_cap==_TRUE) ++ { ++ pmlmepriv->htpriv.ht_option = _TRUE; ++ pmlmepriv->qospriv.qos_option = 1; ++ ++ if(pregistrypriv->ampdu_enable==1) ++ { ++ pmlmepriv->htpriv.ampdu_enable = _TRUE; ++ } ++ ++ HT_caps_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_caps_ie); ++ ++ HT_info_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_info_ie); ++ } ++#endif ++ ++#ifdef CONFIG_80211AC_VHT ++ ++ //Parsing VHT CAP IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ vht_cap = _TRUE; ++ } ++ //Parsing VHT OPERATION IE ++ ++ ++ pmlmepriv->vhtpriv.vht_option = _FALSE; ++ // if channel in 5G band, then add vht ie . ++ if ((pbss_network->Configuration.DSConfig > 14) ++ && (pmlmepriv->htpriv.ht_option == _TRUE) ++ && REGSTY_IS_11AC_ENABLE(pregistrypriv) ++ && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) ++ && (!pmlmepriv->country_ent || COUNTRY_CHPLAN_EN_11AC(pmlmepriv->country_ent)) ++ ) { ++ if (vht_cap == _TRUE) ++ pmlmepriv->vhtpriv.vht_option = _TRUE; ++ else if (REGSTY_IS_11AC_AUTO(pregistrypriv)) { ++ u8 cap_len, operation_len; ++ ++ rtw_vht_use_default_setting(padapter); ++ ++ { ++ /* VHT Operation mode notifiy bit in Extended IE (127) */ ++ uint len = 0; ++ ++ SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(pmlmepriv->ext_capab_ie_data, 1); ++ pmlmepriv->ext_capab_ie_len = 10; ++ rtw_set_ie(pbss_network->IEs + pbss_network->IELength, EID_EXTCapability, 8, pmlmepriv->ext_capab_ie_data, &len); ++ pbss_network->IELength += pmlmepriv->ext_capab_ie_len; ++ } ++ ++ // VHT Capabilities element ++ cap_len = rtw_build_vht_cap_ie(padapter, pbss_network->IEs + pbss_network->IELength); ++ pbss_network->IELength += cap_len; ++ ++ // VHT Operation element ++ operation_len = rtw_build_vht_operation_ie(padapter, pbss_network->IEs + pbss_network->IELength, pbss_network->Configuration.DSConfig); ++ pbss_network->IELength += operation_len; ++ ++ pmlmepriv->vhtpriv.vht_option = _TRUE; ++ } ++ } ++#endif //CONFIG_80211AC_VHT ++ ++ pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pbss_network); ++ ++ rtw_ies_get_chbw(pbss_network->IEs + _BEACON_IE_OFFSET_, pbss_network->IELength - _BEACON_IE_OFFSET_ ++ , &pmlmepriv->ori_ch, &pmlmepriv->ori_bw, &pmlmepriv->ori_offset); ++ rtw_warn_on(pmlmepriv->ori_ch == 0); ++ ++{ ++ /* alloc sta_info for ap itself */ ++ ++ struct sta_info *sta; ++ ++ sta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress); ++ if (!sta) { ++ sta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress); ++ if (sta == NULL) ++ return _FAIL; ++ } ++} ++ ++ rtw_startbss_cmd(padapter, RTW_CMDF_WAIT_ACK); ++ ++ rtw_indicate_connect( padapter); ++ ++ pmlmepriv->cur_network.join_res = _TRUE;//for check if already set beacon ++ ++ //update bc/mc sta_info ++ //update_bmc_sta(padapter); ++ ++ return ret; ++ ++} ++ ++void rtw_set_macaddr_acl(_adapter *padapter, int mode) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ DBG_871X("%s, mode=%d\n", __func__, mode); ++ ++ pacl_list->mode = mode; ++} ++ ++int rtw_acl_add_sta(_adapter *padapter, u8 *addr) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ u8 added = _FALSE; ++ int i, ret=0; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ ++ DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); ++ ++ if((NUM_ACL-1) < pacl_list->num) ++ return (-1); ++ ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN)) ++ { ++ if(paclnode->valid == _TRUE) ++ { ++ added = _TRUE; ++ DBG_871X("%s, sta has been added\n", __func__); ++ break; ++ } ++ } ++ } ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ ++ if(added == _TRUE) ++ return ret; ++ ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ for(i=0; i< NUM_ACL; i++) ++ { ++ paclnode = &pacl_list->aclnode[i]; ++ ++ if(paclnode->valid == _FALSE) ++ { ++ _rtw_init_listhead(&paclnode->list); ++ ++ _rtw_memcpy(paclnode->addr, addr, ETH_ALEN); ++ ++ paclnode->valid = _TRUE; ++ ++ rtw_list_insert_tail(&paclnode->list, get_list_head(pacl_node_q)); ++ ++ pacl_list->num++; ++ ++ break; ++ } ++ } ++ ++ DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ return ret; ++} ++ ++int rtw_acl_remove_sta(_adapter *padapter, u8 *addr) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ int i, ret=0; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ u8 baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; //Baddr is used for clearing acl_list ++ ++ DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN) || _rtw_memcmp(baddr, addr, ETH_ALEN)) ++ { ++ if(paclnode->valid == _TRUE) ++ { ++ paclnode->valid = _FALSE; ++ ++ rtw_list_delete(&paclnode->list); ++ ++ pacl_list->num--; ++ } ++ } ++ } ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); ++ ++ return ret; ++ ++} ++ ++u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta) ++{ ++ struct cmd_obj* ph2c; ++ struct set_stakey_parm *psetstakey_para; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if ( ph2c == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); ++ if(psetstakey_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ++ ++ ++ psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; ++ ++ _rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); ++ ++ _rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); ++ ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++ return res; ++ ++} ++ ++static int rtw_ap_set_key(_adapter *padapter, u8 *key, u8 alg, int keyid, u8 set_tx) ++{ ++ u8 keylen; ++ struct cmd_obj* pcmd; ++ struct setkey_parm *psetkeyparm; ++ struct cmd_priv *pcmdpriv=&(padapter->cmdpriv); ++ int res=_SUCCESS; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); ++ if(psetkeyparm==NULL){ ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); ++ ++ psetkeyparm->keyid=(u8)keyid; ++ if (is_wep_enc(alg)) ++ padapter->securitypriv.key_mask |= BIT(psetkeyparm->keyid); ++ ++ psetkeyparm->algorithm = alg; ++ ++ psetkeyparm->set_tx = set_tx; ++ ++ switch(alg) ++ { ++ case _WEP40_: ++ keylen = 5; ++ break; ++ case _WEP104_: ++ keylen = 13; ++ break; ++ case _TKIP_: ++ case _TKIP_WTMIC_: ++ case _AES_: ++ default: ++ keylen = 16; ++ } ++ ++ _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); ++ ++ pcmd->cmdcode = _SetKey_CMD_; ++ pcmd->parmbuf = (u8 *)psetkeyparm; ++ pcmd->cmdsz = (sizeof(struct setkey_parm)); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ ++ _rtw_init_listhead(&pcmd->list); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++ return res; ++} ++ ++int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ return rtw_ap_set_key(padapter, key, alg, keyid, 1); ++} ++ ++int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx) ++{ ++ u8 alg; ++ ++ switch(keylen) ++ { ++ case 5: ++ alg =_WEP40_; ++ break; ++ case 13: ++ alg =_WEP104_; ++ break; ++ default: ++ alg =_NO_PRIVACY_; ++ } ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ return rtw_ap_set_key(padapter, key, alg, keyid, set_tx); ++} ++ ++u8 rtw_ap_bmc_frames_hdl(_adapter *padapter) ++{ ++#define HIQ_XMIT_COUNTS (6) ++ _irqL irqL; ++ struct sta_info *psta_bmc; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe = NULL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ bool update_tim = _FALSE; ++ ++ ++ if (padapter->registrypriv.wifi_spec != 1) ++ return H2C_SUCCESS; ++ ++ ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ if (!psta_bmc) ++ return H2C_SUCCESS; ++ ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if ((pstapriv->tim_bitmap & BIT(0)) && (psta_bmc->sleepq_len > 0)) { ++ int tx_counts = 0; ++ ++ _update_beacon(padapter, _TIM_IE_, NULL, _FALSE, "update TIM with TIB=1"); ++ ++ DBG_871X("sleepq_len of bmc_sta = %d\n", psta_bmc->sleepq_len); ++ ++ xmitframe_phead = get_list_head(&psta_bmc->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ psta_bmc->sleepq_len--; ++ tx_counts++; ++ ++ if (psta_bmc->sleepq_len > 0) ++ pxmitframe->attrib.mdata = 1; ++ else ++ pxmitframe->attrib.mdata = 0; ++ ++ if (tx_counts == HIQ_XMIT_COUNTS) ++ pxmitframe->attrib.mdata = 0; ++ ++ pxmitframe->attrib.triggered = 1; ++ ++ if (xmitframe_hiq_filter(pxmitframe) == _TRUE) ++ pxmitframe->attrib.qsel = QSLT_HIGH;/*HIQ*/ ++ ++ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); ++ ++ if (tx_counts == HIQ_XMIT_COUNTS) ++ break; ++ ++ } ++ ++ } else { ++ if (psta_bmc->sleepq_len == 0) { ++ ++ /*DBG_871X("sleepq_len of bmc_sta = %d\n", psta_bmc->sleepq_len);*/ ++ ++ if (pstapriv->tim_bitmap & BIT(0)) ++ update_tim = _TRUE; ++ ++ pstapriv->tim_bitmap &= ~BIT(0); ++ pstapriv->sta_dz_bitmap &= ~BIT(0); ++ ++ if (update_tim == _TRUE) { ++ DBG_871X("clear TIB\n"); ++ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "bmc sleepq and HIQ empty"); ++ } ++ } ++ } ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++/* ++ //HIQ Check ++ rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); ++ ++ while (_FALSE == empty && rtw_get_passing_time_ms(start) < 3000) ++ { ++ rtw_msleep_os(100); ++ rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); ++ } ++ ++ ++ printk("check if hiq empty=%d\n", empty); ++*/ ++ ++ return H2C_SUCCESS; ++} ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ ++static void associated_stainfo_update(_adapter *padapter, struct sta_info *psta, u32 sta_info_type) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ DBG_871X("%s: "MAC_FMT", updated_type=0x%x\n", __func__, MAC_ARG(psta->hwaddr), sta_info_type); ++ ++ if (sta_info_type & STA_INFO_UPDATE_BW) { ++ ++ if ((psta->flags & WLAN_STA_HT) && !psta->ht_20mhz_set) { ++ if (pmlmepriv->sw_to_20mhz) { ++ psta->bw_mode = CHANNEL_WIDTH_20; ++ /*psta->htpriv.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;*/ ++ psta->htpriv.sgi_40m = _FALSE; ++ } else { ++ /*TODO: Switch back to 40MHZ?80MHZ*/ ++ } ++ } ++ } ++ ++/* ++ if (sta_info_type & STA_INFO_UPDATE_RATE) { ++ ++ } ++*/ ++ ++ if (sta_info_type & STA_INFO_UPDATE_PROTECTION_MODE) ++ VCS_update(padapter, psta); ++ ++/* ++ if (sta_info_type & STA_INFO_UPDATE_CAP) { ++ ++ } ++ ++ if (sta_info_type & STA_INFO_UPDATE_HT_CAP) { ++ ++ } ++ ++ if (sta_info_type & STA_INFO_UPDATE_VHT_CAP) { ++ ++ } ++*/ ++ ++} ++ ++static void update_bcn_ext_capab_ie(_adapter *padapter) ++{ ++ sint ie_len = 0; ++ unsigned char *pbuf; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ u8 *ie = pnetwork->IEs; ++ u8 null_extcap_data[8] = {0}; ++ ++ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_CAP_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if (pbuf && ie_len > 0) ++ rtw_remove_bcn_ie(padapter, pnetwork, _EXT_CAP_IE_); ++ ++ if ((pmlmepriv->ext_capab_ie_len > 0) && ++ (_rtw_memcmp(pmlmepriv->ext_capab_ie_data, null_extcap_data, sizeof(null_extcap_data)) == _FALSE)) ++ rtw_add_bcn_ie(padapter, pnetwork, _EXT_CAP_IE_, pmlmepriv->ext_capab_ie_data, pmlmepriv->ext_capab_ie_len); ++ ++} ++ ++static void update_bcn_fixed_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_erpinfo_ie(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ unsigned char *p, *ie = pnetwork->IEs; ++ u32 len = 0; ++ ++ DBG_871X("%s, ERP_enable=%d\n", __FUNCTION__, pmlmeinfo->ERP_enable); ++ ++ if(!pmlmeinfo->ERP_enable) ++ return; ++ ++ //parsing ERP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if(p && len>0) ++ { ++ PNDIS_802_11_VARIABLE_IEs pIE = (PNDIS_802_11_VARIABLE_IEs)p; ++ ++ if (pmlmepriv->num_sta_non_erp == 1) ++ pIE->data[0] |= RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION; ++ else ++ pIE->data[0] &= ~(RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION); ++ ++ if(pmlmepriv->num_sta_no_short_preamble > 0) ++ pIE->data[0] |= RTW_ERP_INFO_BARKER_PREAMBLE_MODE; ++ else ++ pIE->data[0] &= ~(RTW_ERP_INFO_BARKER_PREAMBLE_MODE); ++ ++ ERP_IE_handler(padapter, pIE); ++ } ++ ++} ++ ++static void update_bcn_htcap_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_htinfo_ie(_adapter *padapter) ++{ ++ /* ++ u8 beacon_updated = _FALSE; ++ u32 sta_info_update_type = STA_INFO_UPDATE_NONE; ++ */ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ unsigned char *p, *ie = pnetwork->IEs; ++ u32 len = 0; ++ ++ if (pmlmepriv->htpriv.ht_option == _FALSE) ++ return; ++ ++ if (pmlmeinfo->HT_info_enable != 1) ++ return; ++ ++ ++ DBG_871X("%s current operation mode=0x%X\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode); ++ ++ DBG_871X("num_sta_40mhz_intolerant(%d), 20mhz_width_req(%d), intolerant_ch_rpt(%d), olbc(%d)\n", ++ pmlmepriv->num_sta_40mhz_intolerant, pmlmepriv->ht_20mhz_width_req, pmlmepriv->ht_intolerant_ch_reported, pmlmepriv->olbc); ++ ++ /*parsing HT_INFO_IE, currently only update ht_op_mode - pht_info->infos[1] & pht_info->infos[2] for wifi logo test*/ ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if (p && len > 0) { ++ struct HT_info_element *pht_info = NULL; ++ ++ pht_info = (struct HT_info_element *)(p + 2); ++ ++ /* for STA Channel Width/Secondary Channel Offset*/ ++ if ((pmlmepriv->sw_to_20mhz == 0) && (pmlmeext->cur_channel <= 14)) { ++ if ((pmlmepriv->num_sta_40mhz_intolerant > 0) || (pmlmepriv->ht_20mhz_width_req == _TRUE) ++ || (pmlmepriv->ht_intolerant_ch_reported == _TRUE) || (pmlmepriv->olbc == _TRUE)) { ++ SET_HT_OP_ELE_2ND_CHL_OFFSET(pht_info, 0); ++ SET_HT_OP_ELE_STA_CHL_WIDTH(pht_info, 0); ++ ++ pmlmepriv->sw_to_20mhz = 1; ++ /* ++ sta_info_update_type |= STA_INFO_UPDATE_BW; ++ beacon_updated = _TRUE; ++ */ ++ ++ DBG_871X("%s:switching to 20Mhz\n", __FUNCTION__); ++ ++ /*TODO : cur_bwmode/cur_ch_offset switches to 20Mhz*/ ++ } ++ } else { ++ ++ if ((pmlmepriv->num_sta_40mhz_intolerant == 0) && (pmlmepriv->ht_20mhz_width_req == _FALSE) ++ && (pmlmepriv->ht_intolerant_ch_reported == _FALSE) && (pmlmepriv->olbc == _FALSE)) { ++ ++ if (pmlmeext->cur_bwmode >= CHANNEL_WIDTH_40) { ++ ++ SET_HT_OP_ELE_STA_CHL_WIDTH(pht_info, 1); ++ ++ SET_HT_OP_ELE_2ND_CHL_OFFSET(pht_info, ++ (pmlmeext->cur_ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) ? ++ HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE : HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW); ++ ++ pmlmepriv->sw_to_20mhz = 0; ++ /* ++ sta_info_update_type |= STA_INFO_UPDATE_BW; ++ beacon_updated = _TRUE; ++ */ ++ ++ DBG_871X("%s:switching back to 40Mhz\n", __FUNCTION__); ++ } ++ } ++ } ++ ++ /* to update ht_op_mode*/ ++ *(u16 *)(pht_info->infos + 1) = cpu_to_le16(pmlmepriv->ht_op_mode); ++ ++ } ++ ++ /*associated_clients_update(padapter, beacon_updated, sta_info_update_type);*/ ++ ++} ++ ++static void update_bcn_rsn_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wpa_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wmm_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wps_ie(_adapter *padapter) ++{ ++ u8 *pwps_ie=NULL, *pwps_ie_src, *premainder_ie, *pbackup_remainder_ie=NULL; ++ uint wps_ielen=0, wps_offset, remainder_ielen; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ unsigned char *ie = pnetwork->IEs; ++ u32 ielen = pnetwork->IELength; ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ pwps_ie = rtw_get_wps_ie(ie+_FIXED_IE_LENGTH_, ielen-_FIXED_IE_LENGTH_, NULL, &wps_ielen); ++ ++ if(pwps_ie==NULL || wps_ielen==0) ++ return; ++ ++ pwps_ie_src = pmlmepriv->wps_beacon_ie; ++ if(pwps_ie_src == NULL) ++ return; ++ ++ wps_offset = (uint)(pwps_ie-ie); ++ ++ premainder_ie = pwps_ie + wps_ielen; ++ ++ remainder_ielen = ielen - wps_offset - wps_ielen; ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ wps_ielen = (uint)pwps_ie_src[1];//to get ie data len ++ if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) ++ { ++ _rtw_memcpy(pwps_ie, pwps_ie_src, wps_ielen+2); ++ pwps_ie += (wps_ielen+2); ++ ++ if(pbackup_remainder_ie) ++ _rtw_memcpy(pwps_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ //update IELength ++ pnetwork->IELength = wps_offset + (wps_ielen+2) + remainder_ielen; ++ } ++ ++ if(pbackup_remainder_ie) ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ ++ // deal with the case without set_tx_beacon_cmd() in update_beacon() ++#if defined( CONFIG_INTERRUPT_BASED_TXBCN ) || defined( CONFIG_PCI_HCI ) ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ u8 sr = 0; ++ rtw_get_wps_attr_content(pwps_ie_src, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); ++ ++ if( sr ) { ++ set_fwstate(pmlmepriv, WIFI_UNDER_WPS); ++ DBG_871X("%s, set WIFI_UNDER_WPS\n", __func__); ++ } ++ } ++#endif ++} ++ ++static void update_bcn_p2p_ie(_adapter *padapter) ++{ ++ ++} ++ ++static void update_bcn_vendor_spec_ie(_adapter *padapter, u8*oui) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if(_rtw_memcmp(RTW_WPA_OUI, oui, 4)) ++ { ++ update_bcn_wpa_ie(padapter); ++ } ++ else if(_rtw_memcmp(WMM_OUI, oui, 4)) ++ { ++ update_bcn_wmm_ie(padapter); ++ } ++ else if(_rtw_memcmp(WPS_OUI, oui, 4)) ++ { ++ update_bcn_wps_ie(padapter); ++ } ++ else if(_rtw_memcmp(P2P_OUI, oui, 4)) ++ { ++ update_bcn_p2p_ie(padapter); ++ } ++ else ++ { ++ DBG_871X("unknown OUI type!\n"); ++ } ++ ++ ++} ++ ++void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv; ++ struct mlme_ext_priv *pmlmeext; ++ //struct mlme_ext_info *pmlmeinfo; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if(!padapter) ++ return; ++ ++ pmlmepriv = &(padapter->mlmepriv); ++ pmlmeext = &(padapter->mlmeextpriv); ++ //pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(_FALSE == pmlmeext->bstart_bss) ++ return; ++ ++ _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++ switch(ie_id) ++ { ++ case 0xFF: ++ ++ update_bcn_fixed_ie(padapter);//8: TimeStamp, 2: Beacon Interval 2:Capability ++ ++ break; ++ ++ case _TIM_IE_: ++ ++ update_BCNTIM(padapter); ++ ++ break; ++ ++ case _ERPINFO_IE_: ++ ++ update_bcn_erpinfo_ie(padapter); ++ ++ break; ++ ++ case _HT_CAPABILITY_IE_: ++ ++ update_bcn_htcap_ie(padapter); ++ ++ break; ++ ++ case _RSN_IE_2_: ++ ++ update_bcn_rsn_ie(padapter); ++ ++ break; ++ ++ case _HT_ADD_INFO_IE_: ++ ++ update_bcn_htinfo_ie(padapter); ++ ++ break; ++ ++ case _EXT_CAP_IE_: ++ ++ update_bcn_ext_capab_ie(padapter); ++ ++ break; ++ ++ case _VENDOR_SPECIFIC_IE_: ++ ++ update_bcn_vendor_spec_ie(padapter, oui); ++ ++ break; ++ ++ default: ++ break; ++ } ++ ++ pmlmepriv->update_bcn = _TRUE; ++ ++ _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++#ifndef CONFIG_INTERRUPT_BASED_TXBCN ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ if(tx) ++ { ++ //send_beacon(padapter);//send_beacon must execute on TSR level ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" ie_id:%u - %s\n", FUNC_ADPT_ARG(padapter), ie_id, tag); ++ set_tx_beacon_cmd(padapter); ++ } ++#else ++ { ++ //PCI will issue beacon when BCN interrupt occurs. ++ } ++#endif ++#endif //!CONFIG_INTERRUPT_BASED_TXBCN ++ ++} ++ ++#ifdef CONFIG_80211N_HT ++ ++void rtw_process_public_act_bsscoex(_adapter *padapter, u8 *pframe, uint frame_len) ++{ ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); ++ uint frame_body_len = frame_len - sizeof(struct rtw_ieee80211_hdr_3addr); ++ u8 category, action; ++ ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ if (psta == NULL) ++ return; ++ ++ ++ category = frame_body[0]; ++ action = frame_body[1]; ++ ++ if (frame_body_len > 0) { ++ if ((frame_body[2] == EID_BSSCoexistence) && (frame_body[3] > 0)) { ++ u8 ie_data = frame_body[4]; ++ ++ if (ie_data & RTW_WLAN_20_40_BSS_COEX_40MHZ_INTOL) { ++ if (psta->ht_40mhz_intolerant == 0) { ++ psta->ht_40mhz_intolerant = 1; ++ pmlmepriv->num_sta_40mhz_intolerant++; ++ beacon_updated = _TRUE; ++ } ++ } else if (ie_data & RTW_WLAN_20_40_BSS_COEX_20MHZ_WIDTH_REQ) { ++ if (pmlmepriv->ht_20mhz_width_req == _FALSE) { ++ pmlmepriv->ht_20mhz_width_req = _TRUE; ++ beacon_updated = _TRUE; ++ } ++ } else ++ beacon_updated = _FALSE; ++ } ++ } ++ ++ if (frame_body_len > 8) { ++ /* if EID_BSSIntolerantChlReport ie exists */ ++ if ((frame_body[5] == EID_BSSIntolerantChlReport) && (frame_body[6] > 0)) { ++ /*todo:*/ ++ if (pmlmepriv->ht_intolerant_ch_reported == _FALSE) { ++ pmlmepriv->ht_intolerant_ch_reported = _TRUE; ++ beacon_updated = _TRUE; ++ } ++ } ++ } ++ ++ if (beacon_updated) { ++ ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ ++ associated_stainfo_update(padapter, psta, STA_INFO_UPDATE_BW); ++ } ++ ++ ++ ++} ++ ++void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field) ++{ ++ u8 e_field, m_field; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ psta = rtw_get_stainfo(pstapriv, ta); ++ if (psta == NULL) ++ return; ++ ++ e_field = (ctrl_field & BIT(0)) ? 1 : 0; ++ m_field = (ctrl_field & BIT(1)) ? 1 : 0; ++ ++ if (e_field) { ++ ++ /* enable */ ++ /* 0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/ ++ ++ if (m_field) /*mode*/ ++ psta->htpriv.smps_cap = 1; ++ else ++ psta->htpriv.smps_cap = 0; ++ } else { ++ /*disable*/ ++ psta->htpriv.smps_cap = 3; ++ } ++ ++ rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta); ++ ++} ++ ++/* ++op_mode ++Set to 0 (HT pure) under the followign conditions ++ - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or ++ - all STAs in the BSS are 20 MHz HT in 20 MHz BSS ++Set to 1 (HT non-member protection) if there may be non-HT STAs ++ in both the primary and the secondary channel ++Set to 2 if only HT STAs are associated in BSS, ++ however and at least one 20 MHz HT STA is associated ++Set to 3 (HT mixed mode) when one or more non-HT STAs are associated ++ (currently non-GF HT station is considered as non-HT STA also) ++*/ ++static int rtw_ht_operation_update(_adapter *padapter) ++{ ++ u16 cur_op_mode, new_op_mode; ++ int op_mode_changes = 0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++ ++ if (pmlmepriv->htpriv.ht_option == _FALSE) ++ return 0; ++ ++ /*if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed) ++ return 0;*/ ++ ++ DBG_871X("%s current operation mode=0x%X\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode); ++ ++ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) ++ && pmlmepriv->num_sta_ht_no_gf) { ++ pmlmepriv->ht_op_mode |= ++ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; ++ op_mode_changes++; ++ } else if ((pmlmepriv->ht_op_mode & ++ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) && ++ pmlmepriv->num_sta_ht_no_gf == 0) { ++ pmlmepriv->ht_op_mode &= ++ ~HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; ++ op_mode_changes++; ++ } ++ ++ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && ++ (pmlmepriv->num_sta_no_ht || pmlmepriv->olbc_ht)) { ++ pmlmepriv->ht_op_mode |= HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; ++ op_mode_changes++; ++ } else if ((pmlmepriv->ht_op_mode & ++ HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && ++ (pmlmepriv->num_sta_no_ht == 0 && !pmlmepriv->olbc_ht)) { ++ pmlmepriv->ht_op_mode &= ++ ~HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; ++ op_mode_changes++; ++ } ++ ++ /* Note: currently we switch to the MIXED op mode if HT non-greenfield ++ * station is associated. Probably it's a theoretical case, since ++ * it looks like all known HT STAs support greenfield. ++ */ ++ new_op_mode = 0; ++ if (pmlmepriv->num_sta_no_ht /*|| ++ (pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)*/) ++ new_op_mode = OP_MODE_MIXED; ++ else if ((phtpriv_ap->ht_cap.cap_info & IEEE80211_HT_CAP_SUP_WIDTH) ++ && pmlmepriv->num_sta_ht_20mhz) ++ new_op_mode = OP_MODE_20MHZ_HT_STA_ASSOCED; ++ else if (pmlmepriv->olbc_ht) ++ new_op_mode = OP_MODE_MAY_BE_LEGACY_STAS; ++ else ++ new_op_mode = OP_MODE_PURE; ++ ++ cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK; ++ if (cur_op_mode != new_op_mode) { ++ pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_OP_MODE_MASK; ++ pmlmepriv->ht_op_mode |= new_op_mode; ++ op_mode_changes++; ++ } ++ ++ DBG_871X("%s new operation mode=0x%X changes=%d\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode, op_mode_changes); ++ ++ return op_mode_changes; ++ ++} ++ ++#endif /* CONFIG_80211N_HT */ ++ ++void associated_clients_update(_adapter *padapter, u8 updated, u32 sta_info_type) ++{ ++ //update associcated stations cap. ++ if(updated == _TRUE) ++ { ++ _irqL irqL; ++ _list *phead, *plist; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ associated_stainfo_update(padapter, psta, sta_info_type); ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ ++} ++ ++/* called > TSR LEVEL for USB or SDIO Interface*/ ++void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta) ++{ ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ ++#if 0 ++ if (!(psta->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) && ++ !psta->no_short_preamble_set) { ++ psta->no_short_preamble_set = 1; ++ pmlmepriv->num_sta_no_short_preamble++; ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 1)) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ ++ if(!(psta->flags & WLAN_STA_SHORT_PREAMBLE)) ++ { ++ if(!psta->no_short_preamble_set) ++ { ++ psta->no_short_preamble_set = 1; ++ ++ pmlmepriv->num_sta_no_short_preamble++; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 1)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ else ++ { ++ if(psta->no_short_preamble_set) ++ { ++ psta->no_short_preamble_set = 0; ++ ++ pmlmepriv->num_sta_no_short_preamble--; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 0)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ ++#if 0 ++ if (psta->flags & WLAN_STA_NONERP && !psta->nonerp_set) { ++ psta->nonerp_set = 1; ++ pmlmepriv->num_sta_non_erp++; ++ if (pmlmepriv->num_sta_non_erp == 1) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ if(psta->flags & WLAN_STA_NONERP) ++ { ++ if(!psta->nonerp_set) ++ { ++ psta->nonerp_set = 1; ++ ++ pmlmepriv->num_sta_non_erp++; ++ ++ if (pmlmepriv->num_sta_non_erp == 1) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ } ++ else ++ { ++ if(psta->nonerp_set) ++ { ++ psta->nonerp_set = 0; ++ ++ pmlmepriv->num_sta_non_erp--; ++ ++ if (pmlmepriv->num_sta_non_erp == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ } ++ ++ ++#if 0 ++ if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT) && ++ !psta->no_short_slot_time_set) { ++ psta->no_short_slot_time_set = 1; ++ pmlmepriv->num_sta_no_short_slot_time++; ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 1)) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ if(!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT)) ++ { ++ if(!psta->no_short_slot_time_set) ++ { ++ psta->no_short_slot_time_set = 1; ++ ++ pmlmepriv->num_sta_no_short_slot_time++; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 1)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ else ++ { ++ if(psta->no_short_slot_time_set) ++ { ++ psta->no_short_slot_time_set = 0; ++ ++ pmlmepriv->num_sta_no_short_slot_time--; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 0)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ } ++ ++#ifdef CONFIG_80211N_HT ++ ++ if (psta->flags & WLAN_STA_HT) ++ { ++ u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); ++ ++ DBG_871X("HT: STA " MAC_FMT " HT Capabilities " ++ "Info: 0x%04x\n", MAC_ARG(psta->hwaddr), ht_capab); ++ ++ if (psta->no_ht_set) { ++ psta->no_ht_set = 0; ++ pmlmepriv->num_sta_no_ht--; ++ } ++ ++ if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) { ++ if (!psta->no_ht_gf_set) { ++ psta->no_ht_gf_set = 1; ++ pmlmepriv->num_sta_ht_no_gf++; ++ } ++ DBG_871X("%s STA " MAC_FMT " - no " ++ "greenfield, num of non-gf stations %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_ht_no_gf); ++ } ++ ++ if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) { ++ if (!psta->ht_20mhz_set) { ++ psta->ht_20mhz_set = 1; ++ pmlmepriv->num_sta_ht_20mhz++; ++ } ++ DBG_871X("%s STA " MAC_FMT " - 20 MHz HT, " ++ "num of 20MHz HT STAs %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_ht_20mhz); ++ } ++ ++ ++ if (ht_capab & RTW_IEEE80211_HT_CAP_40MHZ_INTOLERANT) { ++ ++ if (!psta->ht_40mhz_intolerant) { ++ psta->ht_40mhz_intolerant = 1; ++ pmlmepriv->num_sta_40mhz_intolerant++; ++ DBG_871X("%s STA " MAC_FMT " - HT_CAP_40MHZ_INTOLERANT is set\n" , ++ __FUNCTION__, MAC_ARG(psta->hwaddr)); ++ beacon_updated = _TRUE; ++ } ++ ++/* ++ if (pmlmepriv->ht_40mhz_intolerant == _FALSE) { ++ ++ pmlmepriv->ht_40mhz_intolerant = _TRUE; ++ ++ DBG_871X("%s STA " MAC_FMT " - HT_CAP_40MHZ_INTOLERANT is set\n" , ++ __FUNCTION__, MAC_ARG(psta->hwaddr)); ++ ++ beacon_updated = _TRUE; ++ } ++*/ ++ ++ /*update ext_capab_ie_len & ext_capab_ie_data for beacon, probersp, assocrsp.*/ ++ if (pmlmepriv->ext_capab_ie_len == 0) ++ pmlmepriv->ext_capab_ie_len = 1; ++ SET_EXT_CAPABILITY_ELE_BSS_COEXIST(pmlmepriv->ext_capab_ie_data, 1); ++ ++ update_beacon(padapter, _EXT_CAP_IE_, NULL, _FALSE); ++ } ++ ++ } ++ else ++ { ++ if (!psta->no_ht_set) { ++ psta->no_ht_set = 1; ++ pmlmepriv->num_sta_no_ht++; ++ } ++ if(pmlmepriv->htpriv.ht_option == _TRUE) { ++ DBG_871X("%s STA " MAC_FMT ++ " - no HT, num of non-HT stations %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_no_ht); ++ } ++ } ++ ++ if (rtw_ht_operation_update(padapter) > 0) { ++ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ /*beacon_updated = _TRUE;*/ ++ } ++ ++#endif /* CONFIG_80211N_HT */ ++ ++ //update associcated stations cap. ++ associated_clients_update(padapter, beacon_updated, STA_INFO_UPDATE_ALL); ++ ++ DBG_871X("%s, updated=%d\n", __func__, beacon_updated); ++ ++} ++ ++u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta) ++{ ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ if(!psta) ++ return beacon_updated; ++ ++ if (psta->no_short_preamble_set) { ++ psta->no_short_preamble_set = 0; ++ pmlmepriv->num_sta_no_short_preamble--; ++ if (pmlmeext->cur_wireless_mode > WIRELESS_11B ++ && pmlmepriv->num_sta_no_short_preamble == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ ++ if (psta->nonerp_set) { ++ psta->nonerp_set = 0; ++ pmlmepriv->num_sta_non_erp--; ++ if (pmlmepriv->num_sta_non_erp == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ if (psta->no_short_slot_time_set) { ++ psta->no_short_slot_time_set = 0; ++ pmlmepriv->num_sta_no_short_slot_time--; ++ if (pmlmeext->cur_wireless_mode > WIRELESS_11B ++ && pmlmepriv->num_sta_no_short_slot_time == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ ++#ifdef CONFIG_80211N_HT ++ ++ if (psta->no_ht_gf_set) { ++ psta->no_ht_gf_set = 0; ++ pmlmepriv->num_sta_ht_no_gf--; ++ } ++ ++ if (psta->no_ht_set) { ++ psta->no_ht_set = 0; ++ pmlmepriv->num_sta_no_ht--; ++ } ++ ++ if (psta->ht_20mhz_set) { ++ psta->ht_20mhz_set = 0; ++ pmlmepriv->num_sta_ht_20mhz--; ++ } ++ ++ if (psta->ht_40mhz_intolerant) { ++ psta->ht_40mhz_intolerant = 0; ++ pmlmepriv->num_sta_40mhz_intolerant--; ++ ++ /*update ext_capab_ie_len & ext_capab_ie_data for beacon, probersp, assocrsp.*/ ++ if ((pmlmepriv->ext_capab_ie_len > 0) && (pmlmepriv->num_sta_40mhz_intolerant == 0)) { ++ SET_EXT_CAPABILITY_ELE_BSS_COEXIST(pmlmepriv->ext_capab_ie_data, 0); ++ update_beacon(padapter, _EXT_CAP_IE_, NULL, _FALSE); ++ } ++ ++ beacon_updated = _TRUE; ++ ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE); ++ } ++ ++ if (rtw_ht_operation_update(padapter) > 0) { ++ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ } ++ ++#endif /* CONFIG_80211N_HT */ ++ ++ /* update associated stations cap. ++ associated_clients_update(padapter, beacon_updated, STA_INFO_UPDATE_ALL); //move it to avoid deadlock ++ */ ++ ++ DBG_871X("%s, updated=%d\n", __func__, beacon_updated); ++ ++ return beacon_updated; ++ ++} ++ ++u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason, bool enqueue) ++{ ++ _irqL irqL; ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if(!psta) ++ return beacon_updated; ++ ++ if (active == _TRUE) ++ { ++#ifdef CONFIG_80211N_HT ++ //tear down Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ ++#endif //CONFIG_80211N_HT ++ ++ issue_deauth(padapter, psta->hwaddr, reason); ++ } ++ ++#ifdef CONFIG_BEAMFORMING ++ beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_LEAVE, psta->hwaddr, ETH_ALEN, 1); ++#endif ++ ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ //clear cam entry / key ++ rtw_clearstakey_cmd(padapter, psta, enqueue); ++ ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state &= ~_FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ #ifdef CONFIG_IOCTL_CFG80211 ++ if (1) { ++ #ifdef COMPAT_KERNEL_RELEASE ++ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); ++ #else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ /* will call rtw_cfg80211_indicate_sta_disassoc() in cmd_thread for old API context */ ++ #endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ } else ++ #endif //CONFIG_IOCTL_CFG80211 ++ { ++ rtw_indicate_sta_disassoc_event(padapter, psta); ++ } ++ ++ report_del_sta_event(padapter, psta->hwaddr, reason, enqueue, _FALSE); ++ ++ beacon_updated = bss_cap_update_on_sta_leave(padapter, psta); ++ ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ ++ return beacon_updated; ++ ++} ++ ++int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ int ret=0; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return ret; ++ ++ DBG_871X(FUNC_NDEV_FMT" with ch:%u, offset:%u\n", ++ FUNC_NDEV_ARG(padapter->pnetdev), new_ch, ch_offset); ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ /* for each sta in asoc_queue */ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ issue_action_spct_ch_switch(padapter, psta->hwaddr, new_ch, ch_offset); ++ psta->expire_to = ((pstapriv->expire_to * 2) > 5) ? 5 : (pstapriv->expire_to * 2); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ issue_action_spct_ch_switch(padapter, bc_addr, new_ch, ch_offset); ++ ++ return ret; ++} ++ ++int rtw_sta_flush(_adapter *padapter, bool enqueue) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ int ret = 0; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ u8 flush_num = 0; ++ char flush_list[NUM_STA]; ++ int i; ++ ++ if ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return ret; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev)); ++ ++ /* pick sta from sta asoc_queue */ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ int stainfo_offset; ++ ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) ++ flush_list[flush_num++] = stainfo_offset; ++ else ++ rtw_warn_on(1); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ /* call ap_free_sta() for each sta picked */ ++ for (i = 0; i < flush_num; i++) { ++ psta = rtw_get_stainfo_by_offset(pstapriv, flush_list[i]); ++ ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, enqueue); ++ } ++ ++ issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING); ++ ++ associated_clients_update(padapter, _TRUE, STA_INFO_UPDATE_ALL); ++ ++ return ret; ++} ++ ++/* called > TSR LEVEL for USB or SDIO Interface*/ ++void sta_info_update(_adapter *padapter, struct sta_info *psta) ++{ ++ int flags = psta->flags; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ ++ //update wmm cap. ++ if(WLAN_STA_WME&flags) ++ psta->qos_option = 1; ++ else ++ psta->qos_option = 0; ++ ++ if(pmlmepriv->qospriv.qos_option == 0) ++ psta->qos_option = 0; ++ ++ ++#ifdef CONFIG_80211N_HT ++ //update 802.11n ht cap. ++ if(WLAN_STA_HT&flags) ++ { ++ psta->htpriv.ht_option = _TRUE; ++ psta->qos_option = 1; ++ ++ psta->htpriv.smps_cap = (psta->htpriv.ht_cap.cap_info & IEEE80211_HT_CAP_SM_PS)>>2; ++ } ++ else ++ { ++ psta->htpriv.ht_option = _FALSE; ++ } ++ ++ if(pmlmepriv->htpriv.ht_option == _FALSE) ++ psta->htpriv.ht_option = _FALSE; ++#endif ++ ++#ifdef CONFIG_80211AC_VHT ++ //update 802.11AC vht cap. ++ if(WLAN_STA_VHT&flags) ++ { ++ psta->vhtpriv.vht_option = _TRUE; ++ } ++ else ++ { ++ psta->vhtpriv.vht_option = _FALSE; ++ } ++ ++ if(pmlmepriv->vhtpriv.vht_option == _FALSE) ++ psta->vhtpriv.vht_option = _FALSE; ++#endif ++ ++ ++ update_sta_info_apmode(padapter, psta); ++ ++ ++} ++ ++/* called >= TSR LEVEL for USB or SDIO Interface*/ ++void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta) ++{ ++ if (psta->state & _FW_LINKED) { ++ //add ratid ++ add_RATid(padapter, psta, 0);//DM_RATR_STA_INIT ++ } ++} ++/* restore hw setting from sw data structures */ ++void rtw_ap_restore_network(_adapter *padapter) ++{ ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 chk_alive_num = 0; ++ char chk_alive_list[NUM_STA]; ++ int i; ++ ++ rtw_setopmode_cmd(padapter, Ndis802_11APMode,_FALSE); ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ rtw_startbss_cmd(padapter, RTW_CMDF_DIRECTLY); ++ ++ if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) ++ { ++ /* restore group key, WEP keys is restored in ips_leave() */ ++ rtw_set_key(padapter, psecuritypriv, psecuritypriv->dot118021XGrpKeyid, 0,_FALSE); ++ } ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ int stainfo_offset; ++ ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) { ++ chk_alive_list[chk_alive_num++] = stainfo_offset; ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ for (i = 0; i < chk_alive_num; i++) { ++ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); ++ ++ if (psta == NULL) { ++ DBG_871X(FUNC_ADPT_FMT" sta_info is null\n", FUNC_ADPT_ARG(padapter)); ++ } else if (psta->state &_FW_LINKED) { ++ rtw_sta_media_status_rpt(padapter, psta, 1); ++ Update_RA_Entry(padapter, psta); ++ //pairwise key ++ /* per sta pairwise key and settings */ ++ if( (padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) ++ { ++ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY,_FALSE); ++ } ++ } ++ } ++ ++} ++ ++void start_ap_mode(_adapter *padapter) ++{ ++ int i; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ pmlmepriv->update_bcn = _FALSE; ++ ++ /*init_mlme_ap_info(padapter);*/ ++ ++ pmlmeext->bstart_bss = _FALSE; ++ ++ pmlmepriv->num_sta_non_erp = 0; ++ ++ pmlmepriv->num_sta_no_short_slot_time = 0; ++ ++ pmlmepriv->num_sta_no_short_preamble = 0; ++ ++ pmlmepriv->num_sta_ht_no_gf = 0; ++#ifdef CONFIG_80211N_HT ++ pmlmepriv->num_sta_no_ht = 0; ++#endif //CONFIG_80211N_HT ++ pmlmeinfo->HT_info_enable = 0; ++ pmlmeinfo->HT_caps_enable = 0; ++ pmlmeinfo->HT_enable = 0; ++ ++ pmlmepriv->num_sta_ht_20mhz = 0; ++ pmlmepriv->num_sta_40mhz_intolerant = 0; ++ pmlmepriv->olbc = _FALSE; ++ pmlmepriv->olbc_ht = _FALSE; ++ ++#ifdef CONFIG_80211N_HT ++ pmlmepriv->ht_20mhz_width_req = _FALSE; ++ pmlmepriv->ht_intolerant_ch_reported = _FALSE; ++ pmlmepriv->ht_op_mode = 0; ++ pmlmepriv->sw_to_20mhz = 0; ++#endif ++ ++ _rtw_memset(pmlmepriv->ext_capab_ie_data, 0, sizeof(pmlmepriv->ext_capab_ie_data)); ++ pmlmepriv->ext_capab_ie_len = 0; ++ ++ for (i = 0 ; i < NUM_STA ; i++) ++ pstapriv->sta_aid[i] = NULL; ++ ++ //for ACL ++ _rtw_init_listhead(&(pacl_list->acl_node_q.queue)); ++ pacl_list->num = 0; ++ pacl_list->mode = 0; ++ for(i = 0; i < NUM_ACL; i++) ++ { ++ _rtw_init_listhead(&pacl_list->aclnode[i].list); ++ pacl_list->aclnode[i].valid = _FALSE; ++ } ++ ++} ++ ++void stop_ap_mode(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ ++ pmlmepriv->update_bcn = _FALSE; ++ pmlmeext->bstart_bss = _FALSE; ++ padapter->netif_up = _FALSE; ++ //_rtw_spinlock_free(&pmlmepriv->bcn_update_lock); ++ ++ //reset and init security priv , this can refine with rtw_reset_securitypriv ++ _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; ++ ++ #ifdef CONFIG_DFS_MASTER ++ rtw_dfs_master_status_apply(padapter, MLME_AP_STOPPED); ++ #endif ++ ++ /* free scan queue */ ++ rtw_free_network_queue(padapter, _TRUE); ++ ++ //for ACL ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(paclnode->valid == _TRUE) ++ { ++ paclnode->valid = _FALSE; ++ ++ rtw_list_delete(&paclnode->list); ++ ++ pacl_list->num--; ++ } ++ } ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ DBG_871X("%s, free acl_node_queue, num=%d\n", __func__, pacl_list->num); ++ ++ rtw_sta_flush(padapter, _TRUE); ++ ++ //free_assoc_sta_resources ++ rtw_free_all_stainfo(padapter); ++ ++ psta = rtw_get_bcmc_stainfo(padapter); ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ rtw_init_bcmc_stainfo(padapter); ++ ++ rtw_free_mlme_priv_ie_data(pmlmepriv); ++ ++#ifdef CONFIG_BT_COEXIST ++ rtw_btcoex_MediaStatusNotify(padapter, 0); //disconnect ++#endif ++ ++} ++ ++#endif //CONFIG_NATIVEAP_MLME ++ ++void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, u8 offset) ++{ ++#define UPDATE_VHT_CAP 1 ++#define UPDATE_HT_CAP 1 ++ ++#ifdef CONFIG_80211AC_VHT ++ { ++ struct vht_priv *vhtpriv = &adapter->mlmepriv.vhtpriv; ++ u8 *vht_cap_ie, *vht_op_ie; ++ int vht_cap_ielen, vht_op_ielen; ++ u8 center_freq; ++ ++ vht_cap_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTCapability, &vht_cap_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ vht_op_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTOperation, &vht_op_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ center_freq = rtw_get_center_ch(ch, bw, offset); ++ ++ /* update vht cap ie */ ++ if (vht_cap_ie && vht_cap_ielen) { ++ #if UPDATE_VHT_CAP ++ /* if ((bw == CHANNEL_WIDTH_160 || bw == CHANNEL_WIDTH_80_80) && pvhtpriv->sgi_160m) ++ SET_VHT_CAPABILITY_ELE_SHORT_GI160M(pvht_cap_ie + 2, 1); ++ else */ ++ SET_VHT_CAPABILITY_ELE_SHORT_GI160M(vht_cap_ie + 2, 0); ++ ++ if (bw >= CHANNEL_WIDTH_80 && vhtpriv->sgi_80m) ++ SET_VHT_CAPABILITY_ELE_SHORT_GI80M(vht_cap_ie + 2, 1); ++ else ++ SET_VHT_CAPABILITY_ELE_SHORT_GI80M(vht_cap_ie + 2, 0); ++ #endif ++ } ++ ++ /* update vht op ie */ ++ if (vht_op_ie && vht_op_ielen) { ++ if (bw < CHANNEL_WIDTH_80) { ++ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 0); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, 0); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0); ++ } else if (bw == CHANNEL_WIDTH_80) { ++ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 1); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, center_freq); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0); ++ } else { ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" unsupported BW:%u\n", FUNC_ADPT_ARG(adapter), bw); ++ rtw_warn_on(1); ++ } ++ } ++ } ++#endif /* CONFIG_80211AC_VHT */ ++#ifdef CONFIG_80211N_HT ++ { ++ struct ht_priv *htpriv = &adapter->mlmepriv.htpriv; ++ u8 *ht_cap_ie, *ht_op_ie; ++ int ht_cap_ielen, ht_op_ielen; ++ ++ ht_cap_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_HTCapability, &ht_cap_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ ht_op_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_HTInfo, &ht_op_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ ++ /* update ht cap ie */ ++ if (ht_cap_ie && ht_cap_ielen) { ++ #if UPDATE_HT_CAP ++ if (bw >= CHANNEL_WIDTH_40) ++ SET_HT_CAP_ELE_CHL_WIDTH(ht_cap_ie + 2, 1); ++ else ++ SET_HT_CAP_ELE_CHL_WIDTH(ht_cap_ie + 2, 0); ++ ++ if (bw >= CHANNEL_WIDTH_40 && htpriv->sgi_40m) ++ SET_HT_CAP_ELE_SHORT_GI40M(ht_cap_ie + 2, 1); ++ else ++ SET_HT_CAP_ELE_SHORT_GI40M(ht_cap_ie + 2, 0); ++ ++ if (htpriv->sgi_20m) ++ SET_HT_CAP_ELE_SHORT_GI20M(ht_cap_ie + 2, 1); ++ else ++ SET_HT_CAP_ELE_SHORT_GI20M(ht_cap_ie + 2, 0); ++ #endif ++ } ++ ++ /* update ht op ie */ ++ if (ht_op_ie && ht_op_ielen) { ++ SET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2, ch); ++ switch (offset) { ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCA); ++ break; ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCB); ++ break; ++ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: ++ default: ++ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCN); ++ break; ++ } ++ ++ if (bw >= CHANNEL_WIDTH_40) ++ SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2, 1); ++ else ++ SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2, 0); ++ } ++ } ++#endif /* CONFIG_80211N_HT */ ++ ++{ ++ u8 *p; ++ int ie_len; ++ u8 old_ch = bss->Configuration.DSConfig; ++ bool change_band = _FALSE; ++ ++ if ((ch <= 14 && old_ch >= 36) || (ch >= 36 && old_ch <= 14)) ++ change_band = _TRUE; ++ ++ /* update channel in IE */ ++ p = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if (p && ie_len > 0) ++ *(p + 2) = ch; ++ ++ bss->Configuration.DSConfig = ch; ++ ++ /* band is changed, update ERP, support rate, ext support rate IE */ ++ if (change_band == _TRUE) ++ change_band_update_ie(adapter, bss, ch); ++} ++ ++} ++ ++bool rtw_ap_chbw_decision(_adapter *adapter, u8 req_ch, u8 req_bw, u8 req_offset ++ , u8 *ch, u8 *bw, u8 *offset) ++{ ++ u8 dec_ch, dec_bw, dec_offset; ++ u8 u_ch = 0, u_offset, u_bw; ++ bool changed = _FALSE; ++ struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); ++ u8 sta_num; ++ u8 ld_sta_num; ++ u8 lg_sta_num; ++ u8 ap_num; ++ u8 ld_ap_num; ++ bool set_u_ch = _FALSE, set_dec_ch = _FALSE; ++ ++ dec_ch = req_ch; ++ dec_bw = req_bw; ++ dec_offset = req_offset; ++ ++ rtw_dev_iface_status_no_self(adapter, &sta_num, &ld_sta_num, &lg_sta_num, &ap_num, &ld_ap_num); ++ DBG_871X(FUNC_ADPT_FMT" ld_sta_num:%u, lg_sta_num%u, ap_num:%u\n" ++ , FUNC_ADPT_ARG(adapter), ld_sta_num, lg_sta_num, ap_num); ++ ++ if (ld_sta_num || ap_num) { ++ /* has linked STA or AP mode, follow */ ++ ++ rtw_warn_on(!rtw_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset)); ++ ++ DBG_871X(FUNC_ADPT_FMT" union no self: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); ++ DBG_871X(FUNC_ADPT_FMT" req: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); ++ ++ rtw_adjust_chbw(adapter, u_ch, &dec_bw, &dec_offset); ++ ++ rtw_sync_chbw(&dec_ch, &dec_bw, &dec_offset ++ , &u_ch, &u_bw, &u_offset); ++ ++ rtw_ap_update_bss_chbw(adapter, &(adapter->mlmepriv.cur_network.network) ++ , dec_ch, dec_bw, dec_offset); ++ ++ set_u_ch = _TRUE; ++ } else if (lg_sta_num) { ++ /* has linking STA */ ++ ++ rtw_warn_on(!rtw_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset)); ++ ++ DBG_871X(FUNC_ADPT_FMT" union no self: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); ++ DBG_871X(FUNC_ADPT_FMT" req: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); ++ ++ rtw_adjust_chbw(adapter, dec_ch, &dec_bw, &dec_offset); ++ ++ if (rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch, dec_bw, dec_offset)) { ++ ++ rtw_sync_chbw(&dec_ch, &dec_bw, &dec_offset ++ , &u_ch, &u_bw, &u_offset); ++ ++ rtw_ap_update_bss_chbw(adapter, &(adapter->mlmepriv.cur_network.network) ++ , dec_ch, dec_bw, dec_offset); ++ ++ set_u_ch = _TRUE; ++ } else { ++ /* set this for possible ch change when join down*/ ++ set_fwstate(&adapter->mlmepriv, WIFI_OP_CH_SWITCHING); ++ } ++ } else { ++ /* single AP mode */ ++ ++ DBG_871X(FUNC_ADPT_FMT" req: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset); ++ rtw_adjust_chbw(adapter, dec_ch, &dec_bw, &dec_offset); ++ ++ #if defined(CONFIG_DFS_MASTER) ++ /* check NOL */ ++ if (rtw_chset_is_ch_non_ocp(mlmeext->channel_set, dec_ch, dec_bw, dec_offset)) { ++ /* choose 5G DFS channel for debug */ ++ if (adapter_to_rfctl(adapter)->dbg_dfs_master_choose_dfs_ch_first ++ && rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G|RTW_CHF_NON_DFS) == _TRUE) { ++ DBG_871X(FUNC_ADPT_FMT" choose 5G DFS channel for debug\n", FUNC_ADPT_ARG(adapter)); ++ } else ++ /* choose from 5G no DFS */ ++ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G|RTW_CHF_DFS) == _FALSE) { ++ /* including 5G DFS, not long CAC */ ++ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G|RTW_CHF_LONG_CAC) == _FALSE) { ++ /* including 5G DFS, long CAC */ ++ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G) == _FALSE) { ++ /* including 2.4G channel */ ++ if (rtw_choose_available_chbw(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_5G) == _FALSE) { ++ DBG_871X(FUNC_ADPT_FMT" no available ch\n", FUNC_ADPT_ARG(adapter)); ++ rtw_warn_on(1); ++ } ++ } ++ } ++ } ++ } ++ #endif /* defined(CONFIG_DFS_MASTER) */ ++ ++ rtw_ap_update_bss_chbw(adapter, &(adapter->mlmepriv.cur_network.network) ++ , dec_ch, dec_bw, dec_offset); ++ ++ set_dec_ch = _TRUE; ++ } ++ ++ if (check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) ++ #ifdef CONFIG_CONCURRENT_MODE ++ || check_buddy_fwstate(adapter, _FW_UNDER_SURVEY) ++ #endif ++ ) { ++ /* scanning, leave ch setting to scan state machine */ ++ set_u_ch = set_dec_ch = _FALSE; ++ } ++ ++ if (mlmeext->cur_channel != dec_ch ++ || mlmeext->cur_bwmode != dec_bw ++ || mlmeext->cur_ch_offset != dec_offset) ++ changed = _TRUE; ++ ++ if (changed == _TRUE && rtw_linked_check(adapter) == _TRUE) { ++ #ifdef CONFIG_SPCT_CH_SWITCH ++ if (1) ++ rtw_ap_inform_ch_switch(adapter, dec_ch, dec_offset); ++ else ++ #endif ++ rtw_sta_flush(adapter, _FALSE); ++ } ++ ++ mlmeext->cur_channel = dec_ch; ++ mlmeext->cur_bwmode = dec_bw; ++ mlmeext->cur_ch_offset = dec_offset; ++ ++ if (u_ch != 0) ++ DBG_871X(FUNC_ADPT_FMT" union: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); ++ ++ DBG_871X(FUNC_ADPT_FMT" dec: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw, dec_offset); ++ ++ if (set_u_ch == _TRUE) { ++ *ch = u_ch; ++ *bw = u_bw; ++ *offset = u_offset; ++ } else if (set_dec_ch == _TRUE) { ++ *ch = dec_ch; ++ *bw = dec_bw; ++ *offset = dec_offset; ++ } ++ ++ return changed; ++} ++ ++#endif //CONFIG_AP_MODE ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_beamforming.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_beamforming.c +old mode 100755 +new mode 100644 +index 8d8c614..854f8ef +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_beamforming.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_beamforming.c +@@ -1,1010 +1,1244 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#define _RTW_BEAMFORMING_C_ +- +-#include +-#include +- +-#ifdef CONFIG_BEAMFORMING +- +-struct beamforming_entry *beamforming_get_entry_by_addr(struct mlme_priv *pmlmepriv, u8* ra,u8* idx) +-{ +- u8 i = 0; +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); +- +- for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) +- { +- if( pBeamInfo->beamforming_entry[i].bUsed && +- (_rtw_memcmp(ra,pBeamInfo->beamforming_entry[i].mac_addr, ETH_ALEN))) +- { +- *idx = i; +- return &(pBeamInfo->beamforming_entry[i]); +- } +- } +- +- return NULL; +-} +- +-BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv ,u8 mac_id) +-{ +- u8 i = 0; +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO((struct mlme_priv *)pmlmepriv); +- BEAMFORMING_CAP BeamformEntryCap = BEAMFORMING_CAP_NONE; +- +- for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) +- { +- if( pBeamInfo->beamforming_entry[i].bUsed && +- (mac_id == pBeamInfo->beamforming_entry[i].mac_id)) +- { +- BeamformEntryCap = pBeamInfo->beamforming_entry[i].beamforming_entry_cap; +- i = BEAMFORMING_ENTRY_NUM; +- } +- } +- +- return BeamformEntryCap; +-} +- +-struct beamforming_entry *beamforming_get_free_entry(struct mlme_priv *pmlmepriv, u8* idx) +-{ +- u8 i = 0; +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); +- +- for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) +- { +- if(pBeamInfo->beamforming_entry[i].bUsed == _FALSE) +- { +- *idx = i; +- return &(pBeamInfo->beamforming_entry[i]); +- } +- } +- return NULL; +-} +- +- +-struct beamforming_entry *beamforming_add_entry(PADAPTER adapter, u8* ra, u16 aid, +- u16 mac_id, CHANNEL_WIDTH bw, BEAMFORMING_CAP beamfrom_cap, u8* idx) +-{ +- struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); +- struct beamforming_entry *pEntry = beamforming_get_free_entry(pmlmepriv, idx); +- +- if(pEntry != NULL) +- { +- pEntry->bUsed = _TRUE; +- pEntry->aid = aid; +- pEntry->mac_id = mac_id; +- pEntry->sound_bw = bw; +- if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) +- { +- u16 BSSID = ((adapter->eeprompriv.mac_addr[5] & 0xf0) >> 4) ^ +- (adapter->eeprompriv.mac_addr[5] & 0xf); // BSSID[44:47] xor BSSID[40:43] +- pEntry->p_aid = (aid + BSSID * 32) & 0x1ff; // (dec(A) + dec(B)*32) mod 512 +- } +- else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) +- { +- pEntry->p_aid = 0; +- } +- else +- { +- pEntry->p_aid = ra[5]; // BSSID[39:47] +- pEntry->p_aid = (pEntry->p_aid << 1) | (ra[4] >> 7 ); +- } +- _rtw_memcpy(pEntry->mac_addr, ra, ETH_ALEN); +- pEntry->bSound = _FALSE; +- +- //3 TODO SW/FW sound period +- pEntry->sound_period = 200; +- pEntry->beamforming_entry_cap = beamfrom_cap; +- pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; +- +- pEntry->LogSeq = 0xff; +- pEntry->LogRetryCnt = 0; +- pEntry->LogSuccessCnt = 0; +- pEntry->LogStatusFailCnt = 0; +- +- return pEntry; +- } +- else +- return NULL; +-} +- +-BOOLEAN beamforming_remove_entry(struct mlme_priv *pmlmepriv, u8* ra, u8* idx) +-{ +- struct beamforming_entry *pEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); +- +- if(pEntry != NULL) +- { +- pEntry->bUsed = _FALSE; +- pEntry->beamforming_entry_cap = BEAMFORMING_CAP_NONE; +- pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; +- return _TRUE; +- } +- else +- return _FALSE; +-} +- +-/* Used for BeamformingStart_V1 */ +-void beamforming_dym_ndpa_rate(PADAPTER adapter) +-{ +- u16 NDPARate = MGN_6M; +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); +- +- if(pHalData->dmpriv.MinUndecoratedPWDBForDM > 30) // link RSSI > 30% +- NDPARate = MGN_24M; +- else +- NDPARate = MGN_6M; +- +- //BW = CHANNEL_WIDTH_20; +- NDPARate = NDPARate << 8; +- rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_RATE, (u8 *)&NDPARate); +-} +- +-void beamforming_dym_period(PADAPTER Adapter) +-{ +- u8 Idx; +- BOOLEAN bChangePeriod = _FALSE; +- u16 SoundPeriod_SW, SoundPeriod_FW; +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); +- struct beamforming_entry *pBeamformEntry; +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(( &Adapter->mlmepriv)); +- struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); +- +- //3 TODO per-client throughput caculation. +- +- if(pdvobjpriv->traffic_stat.cur_tx_tp + pdvobjpriv->traffic_stat.cur_rx_tp > 2) +- { +- SoundPeriod_SW = 32*20; +- SoundPeriod_FW = 2; +- } +- else +- { +- SoundPeriod_SW = 32*2000; +- SoundPeriod_FW = 200; +- } +- +- for(Idx = 0; Idx < BEAMFORMING_ENTRY_NUM; Idx++) +- { +- pBeamformEntry = pBeamInfo->beamforming_entry+Idx; +- if(pBeamformEntry->bDefaultCSI) +- { +- SoundPeriod_SW = 32*2000; +- SoundPeriod_FW = 200; +- } +- +- if(pBeamformEntry->beamforming_entry_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) +- { +- if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) +- { +- if(pBeamformEntry->sound_period != SoundPeriod_FW) +- { +- pBeamformEntry->sound_period = SoundPeriod_FW; +- bChangePeriod = _TRUE; // Only FW sounding need to send H2C packet to change sound period. +- } +- } +- else if(pBeamformEntry->sound_period != SoundPeriod_SW) +- { +- pBeamformEntry->sound_period = SoundPeriod_SW; +- } +- } +- } +- +- if(bChangePeriod) +- rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&Idx); +-} +- +-u32 beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame) +-{ +- u32 ret = _SUCCESS; +- struct beamforming_entry *pBeamformEntry = NULL; +- struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); +- u8 *pframe = precv_frame->u.hdr.rx_data; +- u32 frame_len = precv_frame->u.hdr.len; +- u8 *ta; +- u8 idx, offset; +- +- //DBG_871X("beamforming_get_report_frame\n"); +- +- //Memory comparison to see if CSI report is the same with previous one +- ta = GetAddr2Ptr(pframe); +- pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); +- if(pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) +- offset = 31; //24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2) +- else if(pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) +- offset = 34; //24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2) +- else +- return ret; +- +- //DBG_871X("%s MacId %d offset=%d\n", __FUNCTION__, pBeamformEntry->mac_id, offset); +- +- if(_rtw_memcmp(pBeamformEntry->PreCsiReport + offset, pframe+offset, frame_len-offset) == _FALSE) +- { +- pBeamformEntry->DefaultCsiCnt = 0; +- //DBG_871X("%s CSI report is NOT the same with previos one\n", __FUNCTION__); +- } +- else +- { +- pBeamformEntry->DefaultCsiCnt ++; +- //DBG_871X("%s CSI report is the SAME with previos one\n", __FUNCTION__); +- } +- _rtw_memcpy(&pBeamformEntry->PreCsiReport, pframe, frame_len); +- +- pBeamformEntry->bDefaultCSI = _FALSE; +- +- if(pBeamformEntry->DefaultCsiCnt > 20) +- pBeamformEntry->bDefaultCSI = _TRUE; +- else +- pBeamformEntry->bDefaultCSI = _FALSE; +- +- return ret; +-} +- +-void beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame) +-{ +- u8 *ta; +- u8 idx, Sequence; +- u8 *pframe = precv_frame->u.hdr.rx_data; +- struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); +- struct beamforming_entry *pBeamformEntry = NULL; +- +- //DBG_871X("beamforming_get_ndpa_frame\n"); +- +- if(IS_HARDWARE_TYPE_8812(Adapter) == _FALSE) +- return; +- else if(GetFrameSubType(pframe) != WIFI_NDPA) +- return; +- +- ta = GetAddr2Ptr(pframe); +- // Remove signaling TA. +- ta[0] = ta[0] & 0xFE; +- +- pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); +- +- if(pBeamformEntry == NULL) +- return; +- else if(!(pBeamformEntry->beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU)) +- return; +- else if(pBeamformEntry->LogSuccessCnt > 1) +- return; +- +- Sequence = (pframe[16]) >> 2; +- +- if(pBeamformEntry->LogSeq != Sequence) +- { +- /* Previous frame doesn't retry when meet new sequence number */ +- if(pBeamformEntry->LogSeq != 0xff && pBeamformEntry->LogRetryCnt == 0) +- pBeamformEntry->LogSuccessCnt++; +- +- pBeamformEntry->LogSeq = Sequence; +- pBeamformEntry->LogRetryCnt = 0; +- } +- else +- { +- if(pBeamformEntry->LogRetryCnt == 3) +- beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_CLK, NULL, 0, 1); +- +- pBeamformEntry->LogRetryCnt++; +- } +- +- DBG_871X("%s LogSeq %d LogRetryCnt %d LogSuccessCnt %d\n", +- __FUNCTION__, pBeamformEntry->LogSeq, pBeamformEntry->LogRetryCnt, pBeamformEntry->LogSuccessCnt); +-} +- +-BOOLEAN issue_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct rtw_ieee80211_hdr *pwlanhdr; +- struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); +- struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- u8 ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; +- u8 *pframe; +- u16 *fctrl; +- u16 duration = 0; +- u8 aSifsTime = 0; +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- return _FALSE; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- update_mgntframe_attrib(Adapter, pattrib); +- +- if (qidx == BCN_QUEUE_INX) +- pattrib->qsel = QSLT_BEACON; +- pattrib->rate = MGN_MCS8; +- pattrib->bwmode = bw; +- pattrib->order = 1; +- pattrib->subtype = WIFI_ACTION_NOACK; +- +- _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); +- +- pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; +- +- pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; +- +- fctrl = &pwlanhdr->frame_ctl; +- *(fctrl) = 0; +- +- SetOrderBit(pframe); +- SetFrameSubType(pframe, WIFI_ACTION_NOACK); +- +- _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(Adapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- +- if( pmlmeext->cur_wireless_mode == WIRELESS_11B) +- aSifsTime = 10; +- else +- aSifsTime = 16; +- +- duration = 2*aSifsTime + 40; +- +- if(bw == CHANNEL_WIDTH_40) +- duration+= 87; +- else +- duration+= 180; +- +- SetDuration(pframe, duration); +- +- //HT control field +- SET_HT_CTRL_CSI_STEERING(pframe+24, 3); +- SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); +- +- _rtw_memcpy(pframe+28, ActionHdr, 4); +- +- pattrib->pktlen = 32; +- +- pattrib->last_txcmdsz = pattrib->pktlen; +- +- dump_mgntframe(Adapter, pmgntframe); +- +- return _TRUE; +-} +- +-BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) +-{ +- return issue_ht_ndpa_packet(Adapter, ra, bw, qidx); +-} +- +-BOOLEAN issue_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct rtw_ieee80211_hdr *pwlanhdr; +- struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); +- struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); +- struct rtw_ndpa_sta_info sta_info; +- u8 *pframe; +- u16 *fctrl; +- u16 duration = 0; +- u8 sequence = 0, aSifsTime = 0; +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- return _FALSE; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- update_mgntframe_attrib(Adapter, pattrib); +- +- if (qidx == BCN_QUEUE_INX) +- pattrib->qsel = QSLT_BEACON; +- pattrib->rate = MGN_VHT2SS_MCS0; +- pattrib->bwmode = bw; +- pattrib->subtype = WIFI_NDPA; +- +- _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); +- +- pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; +- +- pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; +- +- fctrl = &pwlanhdr->frame_ctl; +- *(fctrl) = 0; +- +- SetFrameSubType(pframe, WIFI_NDPA); +- +- _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(Adapter->eeprompriv)), ETH_ALEN); +- +- if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) +- aSifsTime = 16; +- else +- aSifsTime = 10; +- +- duration = 2*aSifsTime + 44; +- +- if(bw == CHANNEL_WIDTH_80) +- duration += 40; +- else if(bw == CHANNEL_WIDTH_40) +- duration+= 87; +- else +- duration+= 180; +- +- SetDuration(pframe, duration); +- +- sequence = pBeamInfo->sounding_sequence<< 2; +- if (pBeamInfo->sounding_sequence >= 0x3f) +- pBeamInfo->sounding_sequence = 0; +- else +- pBeamInfo->sounding_sequence++; +- +- _rtw_memcpy(pframe+16, &sequence,1); +- +- if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) +- aid = 0; +- +- sta_info.aid = aid; +- sta_info.feedback_type = 0; +- sta_info.nc_index= 0; +- +- _rtw_memcpy(pframe+17, (u8 *)&sta_info, 2); +- +- pattrib->pktlen = 19; +- +- pattrib->last_txcmdsz = pattrib->pktlen; +- +- dump_mgntframe(Adapter, pmgntframe); +- +- return _TRUE; +-} +- +-BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) +-{ +- return issue_vht_ndpa_packet(Adapter, ra, aid, bw, qidx); +-} +- +-BOOLEAN beamfomring_bSounding(struct beamforming_info *pBeamInfo) +-{ +- BOOLEAN bSounding = _FALSE; +- +- if(( beamforming_get_beamform_cap(pBeamInfo) & BEAMFORMER_CAP) == 0) +- bSounding = _FALSE; +- else +- bSounding = _TRUE; +- +- return bSounding; +-} +- +-u8 beamforming_sounding_idx(struct beamforming_info *pBeamInfo) +-{ +- u8 idx = 0; +- u8 i; +- +- for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) +- { +- if (pBeamInfo->beamforming_entry[i].bUsed && +- (_FALSE == pBeamInfo->beamforming_entry[i].bSound)) +- { +- idx = i; +- break; +- } +- } +- +- return idx; +-} +- +-SOUNDING_MODE beamforming_sounding_mode(struct beamforming_info *pBeamInfo, u8 idx) +-{ +- struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; +- SOUNDING_MODE mode; +- +- if(BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) +- { +- mode = SOUNDING_FW_VHT_TIMER; +- } +- else if(BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) +- { +- mode = SOUNDING_FW_HT_TIMER; +- } +- else +- { +- mode = SOUNDING_STOP_All_TIMER; +- } +- +- return mode; +-} +- +-u16 beamforming_sounding_time(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) +-{ +- u16 sounding_time = 0xffff; +- struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; +- +- sounding_time = BeamEntry.sound_period; +- +- return sounding_time; +-} +- +-CHANNEL_WIDTH beamforming_sounding_bw(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) +-{ +- CHANNEL_WIDTH sounding_bw = CHANNEL_WIDTH_20; +- struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; +- +- sounding_bw = BeamEntry.sound_bw; +- +- return sounding_bw; +-} +- +-BOOLEAN beamforming_select_beam_entry(struct beamforming_info *pBeamInfo) +-{ +- struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); +- +- pSoundInfo->sound_idx = beamforming_sounding_idx(pBeamInfo); +- +- if(pSoundInfo->sound_idx < BEAMFORMING_ENTRY_NUM) +- pSoundInfo->sound_mode = beamforming_sounding_mode(pBeamInfo, pSoundInfo->sound_idx); +- else +- pSoundInfo->sound_mode = SOUNDING_STOP_All_TIMER; +- +- if(SOUNDING_STOP_All_TIMER == pSoundInfo->sound_mode) +- { +- return _FALSE; +- } +- else +- { +- pSoundInfo->sound_bw = beamforming_sounding_bw(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx ); +- pSoundInfo->sound_period = beamforming_sounding_time(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx ); +- return _TRUE; +- } +-} +- +-BOOLEAN beamforming_start_fw(PADAPTER adapter, u8 idx) +-{ +- u8 *RA = NULL; +- struct beamforming_entry *pEntry; +- BOOLEAN ret = _TRUE; +- struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); +- +- pEntry = &(pBeamInfo->beamforming_entry[idx]); +- if(pEntry->bUsed == _FALSE) +- { +- DBG_871X("Skip Beamforming, no entry for Idx =%d\n", idx); +- return _FALSE; +- } +- +- pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING; +- pEntry->bSound = _TRUE; +- rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); +- +- return _TRUE; +-} +- +-void beamforming_end_fw(PADAPTER adapter) +-{ +- u8 idx = 0; +- +- rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); +- +- DBG_871X("%s\n", __FUNCTION__); +-} +- +-BOOLEAN beamforming_start_period(PADAPTER adapter) +-{ +- BOOLEAN ret = _TRUE; +- struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); +- struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); +- +- beamforming_dym_ndpa_rate(adapter); +- +- beamforming_select_beam_entry(pBeamInfo); +- +- if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) +- { +- ret = beamforming_start_fw(adapter, pSoundInfo->sound_idx); +- } +- else +- { +- ret = _FALSE; +- } +- +- DBG_871X("%s Idx %d Mode %d BW %d Period %d\n", __FUNCTION__, +- pSoundInfo->sound_idx, pSoundInfo->sound_mode, pSoundInfo->sound_bw, pSoundInfo->sound_period); +- +- return ret; +-} +- +-void beamforming_end_period(PADAPTER adapter) +-{ +- u8 idx = 0; +- struct beamforming_entry *pBeamformEntry; +- struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); +- struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); +- +- +- if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) +- { +- beamforming_end_fw(adapter); +- } +-} +- +-void beamforming_notify(PADAPTER adapter) +-{ +- BOOLEAN bSounding = _FALSE; +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(adapter->mlmepriv)); +- +- bSounding = beamfomring_bSounding(pBeamInfo); +- +- if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_IDLE) +- { +- if(bSounding) +- { +- if(beamforming_start_period(adapter) == _TRUE) +- pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; +- } +- } +- else if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_START) +- { +- if(bSounding) +- { +- if(beamforming_start_period(adapter) == _FALSE) +- pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; +- } +- else +- { +- beamforming_end_period(adapter); +- pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; +- } +- } +- else if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_END) +- { +- if(bSounding) +- { +- if(beamforming_start_period(adapter) == _TRUE) +- pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; +- } +- } +- else +- { +- DBG_871X("%s BeamformState %d\n", __FUNCTION__, pBeamInfo->beamforming_state); +- } +- +- DBG_871X("%s BeamformState %d bSounding %d\n", __FUNCTION__, pBeamInfo->beamforming_state, bSounding); +-} +- +-BOOLEAN beamforming_init_entry(PADAPTER adapter, struct sta_info *psta, u8* idx) +-{ +- struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); +- struct ht_priv *phtpriv = &(pmlmepriv->htpriv); +-#ifdef CONFIG_80211AC_VHT +- struct vht_priv *pvhtpriv = &(pmlmepriv->vhtpriv); +-#endif +- struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct beamforming_entry *pBeamformEntry = NULL; +- u8 *ra; +- u16 aid, mac_id; +- u8 wireless_mode; +- CHANNEL_WIDTH bw = CHANNEL_WIDTH_20; +- BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; +- +- // The current setting does not support Beaforming +- if (0 == phtpriv->beamform_cap +-#ifdef CONFIG_80211AC_VHT +- && 0 == pvhtpriv->beamform_cap +-#endif +- ) { +- DBG_871X("The configuration disabled Beamforming! Skip...\n"); +- return _FALSE; +- } +- +- aid = psta->aid; +- ra = psta->hwaddr; +- mac_id = psta->mac_id; +- wireless_mode = psta->wireless_mode; +- bw = psta->bw_mode; +- +- if (IsSupportedHT(wireless_mode) || IsSupportedVHT(wireless_mode)) { +- //3 // HT +- u8 cur_beamform; +- +- cur_beamform = psta->htpriv.beamform_cap; +- +- // We are Beamformee because the STA is Beamformer +- if(TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) +- beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMEE_CAP_HT_EXPLICIT); +- +- // We are Beamformer because the STA is Beamformee +- if(TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) +- beamform_cap =(BEAMFORMING_CAP)(beamform_cap | BEAMFORMER_CAP_HT_EXPLICIT); +-#ifdef CONFIG_80211AC_VHT +- if (IsSupportedVHT(wireless_mode)) { +- //3 // VHT +- cur_beamform = psta->vhtpriv.beamform_cap; +- +- // We are Beamformee because the STA is Beamformer +- if(TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) +- beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMEE_CAP_VHT_SU); +- // We are Beamformer because the STA is Beamformee +- if(TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) +- beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMER_CAP_VHT_SU); +- } +-#endif //CONFIG_80211AC_VHT +- +- if(beamform_cap == BEAMFORMING_CAP_NONE) +- return _FALSE; +- +- DBG_871X("Beamforming Config Capability = 0x%02X\n", beamform_cap); +- +- pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); +- if (pBeamformEntry == NULL) { +- pBeamformEntry = beamforming_add_entry(adapter, ra, aid, mac_id, bw, beamform_cap, idx); +- if(pBeamformEntry == NULL) +- return _FALSE; +- else +- pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; +- } else { +- // Entry has been created. If entry is initialing or progressing then errors occur. +- if (pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && +- pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) { +- DBG_871X("Error State of Beamforming"); +- return _FALSE; +- } else { +- pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; +- } +- } +- +- pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; +- +- DBG_871X("%s Idx %d\n", __FUNCTION__, *idx); +- } else { +- return _FALSE; +- } +- +- return _SUCCESS; +-} +- +-void beamforming_deinit_entry(PADAPTER adapter, u8* ra) +-{ +- u8 idx = 0; +- struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); +- +- if(beamforming_remove_entry(pmlmepriv, ra, &idx) == _TRUE) +- { +- rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); +- } +- +- DBG_871X("%s Idx %d\n", __FUNCTION__, idx); +-} +- +-void beamforming_reset(PADAPTER adapter) +-{ +- u8 idx = 0; +- struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); +- +- for(idx = 0; idx < BEAMFORMING_ENTRY_NUM; idx++) +- { +- if(pBeamInfo->beamforming_entry[idx].bUsed == _TRUE) +- { +- pBeamInfo->beamforming_entry[idx].bUsed = _FALSE; +- pBeamInfo->beamforming_entry[idx].beamforming_entry_cap = BEAMFORMING_CAP_NONE; +- pBeamInfo->beamforming_entry[idx].beamforming_entry_state= BEAMFORMING_ENTRY_STATE_UNINITIALIZE; +- rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); +- } +- } +- +- DBG_871X("%s\n", __FUNCTION__); +-} +- +-void beamforming_sounding_fail(PADAPTER Adapter) +-{ +- struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); +- struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); +- +- pEntry->bSound = _FALSE; +- rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); +- beamforming_deinit_entry(Adapter, pEntry->mac_addr); +-} +- +-void beamforming_check_sounding_success(PADAPTER Adapter,BOOLEAN status) +-{ +- struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); +- struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); +- +- if(status == 1) +- { +- pEntry->LogStatusFailCnt = 0; +- } +- else +- { +- pEntry->LogStatusFailCnt++; +- DBG_871X("%s LogStatusFailCnt %d\n", __FUNCTION__, pEntry->LogStatusFailCnt); +- } +- if(pEntry->LogStatusFailCnt > 20) +- { +- DBG_871X("%s LogStatusFailCnt > 20, Stop SOUNDING\n", __FUNCTION__); +- //pEntry->bSound = _FALSE; +- //rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); +- //beamforming_deinit_entry(Adapter, pEntry->mac_addr); +- beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_FAIL, NULL, 0, 1); +- } +-} +- +-void beamforming_enter(PADAPTER adapter, PVOID psta) +-{ +- u8 idx = 0xff; +- +- if(beamforming_init_entry(adapter, (struct sta_info *)psta, &idx)) +- rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_ENTER, (u8 *)&idx); +- +- //DBG_871X("%s Idx %d\n", __FUNCTION__, idx); +-} +- +-void beamforming_leave(PADAPTER adapter,u8* ra) +-{ +- if(ra == NULL) +- beamforming_reset(adapter); +- else +- beamforming_deinit_entry(adapter, ra); +- +- beamforming_notify(adapter); +-} +- +-BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo) +-{ +- u8 i; +- BOOLEAN bSelfBeamformer = _FALSE; +- BOOLEAN bSelfBeamformee = _FALSE; +- struct beamforming_entry beamforming_entry; +- BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; +- +- for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) +- { +- beamforming_entry = pBeamInfo->beamforming_entry[i]; +- +- if(beamforming_entry.bUsed) +- { +- if( (beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU) || +- (beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT)) +- bSelfBeamformee = _TRUE; +- if( (beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) || +- (beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) +- bSelfBeamformer = _TRUE; +- } +- +- if(bSelfBeamformer && bSelfBeamformee) +- i = BEAMFORMING_ENTRY_NUM; +- } +- +- if(bSelfBeamformer) +- beamform_cap |= BEAMFORMER_CAP; +- if(bSelfBeamformee) +- beamform_cap |= BEAMFORMEE_CAP; +- +- return beamform_cap; +-} +- +-void beamforming_watchdog(PADAPTER Adapter) +-{ +- struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(( &(Adapter->mlmepriv))); +- +- if(pBeamInfo->beamforming_state != BEAMFORMING_STATE_START) +- return; +- +- beamforming_dym_period(Adapter); +- beamforming_dym_ndpa_rate(Adapter); +-} +- +-void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf) +-{ +- +-_func_enter_; +- +- switch(type) +- { +- case BEAMFORMING_CTRL_ENTER: +- beamforming_enter(padapter, (PVOID)pbuf); +- break; +- +- case BEAMFORMING_CTRL_LEAVE: +- beamforming_leave(padapter, pbuf); +- break; +- +- case BEAMFORMING_CTRL_SOUNDING_FAIL: +- beamforming_sounding_fail(padapter); +- break; +- +- case BEAMFORMING_CTRL_SOUNDING_CLK: +- rtw_hal_set_hwreg(padapter, HW_VAR_SOUNDING_CLK, NULL); +- break; +- +- default: +- break; +- } +- +-_func_exit_; +-} +- +-u8 beamforming_wk_cmd(_adapter*padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue) +-{ +- struct cmd_obj *ph2c; +- struct drvextra_cmd_parm *pdrvextra_cmd_parm; +- struct cmd_priv *pcmdpriv = &padapter->cmdpriv; +- u8 res = _SUCCESS; +- +-_func_enter_; +- +- if(enqueue) +- { +- u8 *wk_buf; +- +- ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); +- if(ph2c==NULL){ +- res= _FAIL; +- goto exit; +- } +- +- pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); +- if(pdrvextra_cmd_parm==NULL){ +- rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); +- res= _FAIL; +- goto exit; +- } +- +- if (pbuf != NULL) { +- wk_buf = rtw_zmalloc(size); +- if(wk_buf==NULL){ +- rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); +- rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); +- res= _FAIL; +- goto exit; +- } +- +- _rtw_memcpy(wk_buf, pbuf, size); +- } else { +- wk_buf = NULL; +- size = 0; +- } +- +- pdrvextra_cmd_parm->ec_id = BEAMFORMING_WK_CID; +- pdrvextra_cmd_parm->type = type; +- pdrvextra_cmd_parm->size = size; +- pdrvextra_cmd_parm->pbuf = wk_buf; +- +- init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); +- +- res = rtw_enqueue_cmd(pcmdpriv, ph2c); +- } +- else +- { +- beamforming_wk_hdl(padapter, type, pbuf); +- } +- +-exit: +- +-_func_exit_; +- +- return res; +-} +- +-#endif //CONFIG_BEAMFORMING +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_BEAMFORMING_C_ ++ ++#include ++#include ++ ++#ifdef CONFIG_BEAMFORMING ++ ++#if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/ ++struct beamforming_entry *beamforming_get_entry_by_addr(struct mlme_priv *pmlmepriv, u8* ra,u8* idx) ++{ ++ u8 i = 0; ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ ++ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) ++ { ++ if( pBeamInfo->beamforming_entry[i].bUsed && ++ (_rtw_memcmp(ra,pBeamInfo->beamforming_entry[i].mac_addr, ETH_ALEN))) ++ { ++ *idx = i; ++ return &(pBeamInfo->beamforming_entry[i]); ++ } ++ } ++ ++ return NULL; ++} ++ ++BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv ,u8 mac_id) ++{ ++ u8 i = 0; ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO((struct mlme_priv *)pmlmepriv); ++ BEAMFORMING_CAP BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ ++ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) ++ { ++ if( pBeamInfo->beamforming_entry[i].bUsed && ++ (mac_id == pBeamInfo->beamforming_entry[i].mac_id)) ++ { ++ BeamformEntryCap = pBeamInfo->beamforming_entry[i].beamforming_entry_cap; ++ i = BEAMFORMING_ENTRY_NUM; ++ } ++ } ++ ++ return BeamformEntryCap; ++} ++ ++struct beamforming_entry *beamforming_get_free_entry(struct mlme_priv *pmlmepriv, u8* idx) ++{ ++ u8 i = 0; ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ ++ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) ++ { ++ if(pBeamInfo->beamforming_entry[i].bUsed == _FALSE) ++ { ++ *idx = i; ++ return &(pBeamInfo->beamforming_entry[i]); ++ } ++ } ++ return NULL; ++} ++ ++ ++struct beamforming_entry *beamforming_add_entry(PADAPTER adapter, u8* ra, u16 aid, ++ u16 mac_id, CHANNEL_WIDTH bw, BEAMFORMING_CAP beamfrom_cap, u8* idx) ++{ ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct beamforming_entry *pEntry = beamforming_get_free_entry(pmlmepriv, idx); ++ ++ if(pEntry != NULL) ++ { ++ pEntry->bUsed = _TRUE; ++ pEntry->aid = aid; ++ pEntry->mac_id = mac_id; ++ pEntry->sound_bw = bw; ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++ u16 BSSID = ((*(adapter_mac_addr(adapter) + 5) & 0xf0) >> 4) ^ ++ (*(adapter_mac_addr(adapter) + 5) & 0xf); /* BSSID[44:47] xor BSSID[40:43] */ ++ pEntry->p_aid = (aid + BSSID * 32) & 0x1ff; // (dec(A) + dec(B)*32) mod 512 ++ pEntry->g_id = 63; ++ } ++ else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ++ { ++ pEntry->p_aid = 0; ++ pEntry->g_id = 63; ++ } ++ else ++ { ++ pEntry->p_aid = ra[5]; // BSSID[39:47] ++ pEntry->p_aid = (pEntry->p_aid << 1) | (ra[4] >> 7 ); ++ pEntry->g_id = 0; ++ } ++ _rtw_memcpy(pEntry->mac_addr, ra, ETH_ALEN); ++ pEntry->bSound = _FALSE; ++ ++ //3 TODO SW/FW sound period ++ pEntry->sound_period = 200; ++ pEntry->beamforming_entry_cap = beamfrom_cap; ++ pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ ++ ++ pEntry->PreLogSeq = 0; /*Modified by Jeffery @2015-04-13*/ ++ pEntry->LogSeq = 0; /*Modified by Jeffery @2014-10-29*/ ++ pEntry->LogRetryCnt = 0; /*Modified by Jeffery @2014-10-29*/ ++ pEntry->LogSuccess = 0; /*LogSuccess is NOT needed to be accumulated, so LogSuccessCnt->LogSuccess, 2015-04-13, Jeffery*/ ++ pEntry->ClockResetTimes = 0; /*Modified by Jeffery @2015-04-13*/ ++ pEntry->LogStatusFailCnt = 0; ++ ++ return pEntry; ++ } ++ else ++ return NULL; ++} ++ ++BOOLEAN beamforming_remove_entry(struct mlme_priv *pmlmepriv, u8* ra, u8* idx) ++{ ++ struct beamforming_entry *pEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); ++ ++ if(pEntry != NULL) ++ { ++ pEntry->bUsed = _FALSE; ++ pEntry->beamforming_entry_cap = BEAMFORMING_CAP_NONE; ++ pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ return _TRUE; ++ } ++ else ++ return _FALSE; ++} ++ ++/* Used for BeamformingStart_V1 */ ++void beamforming_dym_ndpa_rate(PADAPTER adapter) ++{ ++ u16 NDPARate = MGN_6M; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); ++ ++ if(pHalData->MinUndecoratedPWDBForDM > 30) // link RSSI > 30% ++ NDPARate = MGN_24M; ++ else ++ NDPARate = MGN_6M; ++ ++ //BW = CHANNEL_WIDTH_20; ++ NDPARate = NDPARate << 8; ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_RATE, (u8 *)&NDPARate); ++} ++ ++void beamforming_dym_period(PADAPTER Adapter) ++{ ++ u8 Idx; ++ BOOLEAN bChangePeriod = _FALSE; ++ u16 SoundPeriod_SW, SoundPeriod_FW; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); ++ struct beamforming_entry *pBeamformEntry; ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(( &Adapter->mlmepriv)); ++ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); ++ ++ //3 TODO per-client throughput caculation. ++ ++ if(pdvobjpriv->traffic_stat.cur_tx_tp + pdvobjpriv->traffic_stat.cur_rx_tp > 2) ++ { ++ SoundPeriod_SW = 32*20; ++ SoundPeriod_FW = 2; ++ } ++ else ++ { ++ SoundPeriod_SW = 32*2000; ++ SoundPeriod_FW = 200; ++ } ++ ++ for(Idx = 0; Idx < BEAMFORMING_ENTRY_NUM; Idx++) ++ { ++ pBeamformEntry = pBeamInfo->beamforming_entry+Idx; ++ if(pBeamformEntry->bDefaultCSI) ++ { ++ SoundPeriod_SW = 32*2000; ++ SoundPeriod_FW = 200; ++ } ++ ++ if(pBeamformEntry->beamforming_entry_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) ++ { ++ if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) ++ { ++ if(pBeamformEntry->sound_period != SoundPeriod_FW) ++ { ++ pBeamformEntry->sound_period = SoundPeriod_FW; ++ bChangePeriod = _TRUE; // Only FW sounding need to send H2C packet to change sound period. ++ } ++ } ++ else if(pBeamformEntry->sound_period != SoundPeriod_SW) ++ { ++ pBeamformEntry->sound_period = SoundPeriod_SW; ++ } ++ } ++ } ++ ++ if(bChangePeriod) ++ rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&Idx); ++} ++ ++BOOLEAN issue_ht_sw_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; ++ u8 *pframe; ++ u16 *fctrl; ++ u16 duration = 0; ++ u8 aSifsTime = 0; ++ u8 NDPTxRate = 0; ++ ++ DBG_871X("%s: issue_ht_sw_ndpa_packet!\n", __func__); ++ ++ NDPTxRate = MGN_MCS8; ++ DBG_871X("%s: NDPTxRate =%d\n", __func__, NDPTxRate); ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) ++ return _FALSE; ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ pattrib->qsel = QSLT_MGNT; ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = bw; ++ pattrib->order = 1; ++ pattrib->subtype = WIFI_ACTION_NOACK; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetOrderBit(pframe); ++ SetFrameSubType(pframe, WIFI_ACTION_NOACK); ++ ++ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ if (pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ duration = 2*aSifsTime + 40; ++ ++ if (bw == CHANNEL_WIDTH_40) ++ duration += 87; ++ else ++ duration += 180; ++ ++ SetDuration(pframe, duration); ++ ++ /*HT control field*/ ++ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); ++ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); ++ ++ _rtw_memcpy(pframe+28, ActionHdr, 4); ++ ++ pattrib->pktlen = 32; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++ ++ ++} ++BOOLEAN issue_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; ++ u8 *pframe; ++ u16 *fctrl; ++ u16 duration = 0; ++ u8 aSifsTime = 0; ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) ++ return _FALSE; ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ ++ if (qidx == BCN_QUEUE_INX) ++ pattrib->qsel = QSLT_BEACON; ++ pattrib->rate = MGN_MCS8; ++ pattrib->bwmode = bw; ++ pattrib->order = 1; ++ pattrib->subtype = WIFI_ACTION_NOACK; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetOrderBit(pframe); ++ SetFrameSubType(pframe, WIFI_ACTION_NOACK); ++ ++ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ if( pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ duration = 2*aSifsTime + 40; ++ ++ if(bw == CHANNEL_WIDTH_40) ++ duration+= 87; ++ else ++ duration+= 180; ++ ++ SetDuration(pframe, duration); ++ ++ //HT control field ++ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); ++ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); ++ ++ _rtw_memcpy(pframe+28, ActionHdr, 4); ++ ++ pattrib->pktlen = 32; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++} ++ ++BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ return issue_ht_ndpa_packet(Adapter, ra, bw, qidx); ++} ++BOOLEAN issue_vht_sw_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct rtw_ndpa_sta_info sta_info; ++ u8 NDPTxRate = 0; ++ ++ u8 *pframe; ++ u16 *fctrl; ++ u16 duration = 0; ++ u8 sequence = 0, aSifsTime = 0; ++ ++ DBG_871X("%s: issue_vht_sw_ndpa_packet!\n", __func__); ++ ++ ++ NDPTxRate = MGN_VHT2SS_MCS0; ++ DBG_871X("%s: NDPTxRate =%d\n", __func__, NDPTxRate); ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) { ++ DBG_871X("%s, alloc mgnt frame fail\n", __func__); ++ return _FALSE; ++ } ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ pattrib->qsel = QSLT_MGNT; ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = bw; ++ pattrib->subtype = WIFI_NDPA; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetFrameSubType(pframe, WIFI_NDPA); ++ ++ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); ++ ++ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) ++ aSifsTime = 16; ++ else ++ aSifsTime = 10; ++ ++ duration = 2*aSifsTime + 44; ++ ++ if (bw == CHANNEL_WIDTH_80) ++ duration += 40; ++ else if (bw == CHANNEL_WIDTH_40) ++ duration += 87; ++ else ++ duration += 180; ++ ++ SetDuration(pframe, duration); ++ ++ sequence = pBeamInfo->sounding_sequence << 2; ++ if (pBeamInfo->sounding_sequence >= 0x3f) ++ pBeamInfo->sounding_sequence = 0; ++ else ++ pBeamInfo->sounding_sequence++; ++ ++ _rtw_memcpy(pframe+16, &sequence, 1); ++ if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ aid = 0; ++ ++ sta_info.aid = aid; ++ sta_info.feedback_type = 0; ++ sta_info.nc_index = 0; ++ ++ _rtw_memcpy(pframe+17, (u8 *)&sta_info, 2); ++ ++ pattrib->pktlen = 19; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ ++ return _TRUE; ++ ++} ++BOOLEAN issue_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct rtw_ndpa_sta_info sta_info; ++ u8 *pframe; ++ u16 *fctrl; ++ u16 duration = 0; ++ u8 sequence = 0, aSifsTime = 0; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ return _FALSE; ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ ++ if (qidx == BCN_QUEUE_INX) ++ pattrib->qsel = QSLT_BEACON; ++ pattrib->rate = MGN_VHT2SS_MCS0; ++ pattrib->bwmode = bw; ++ pattrib->subtype = WIFI_NDPA; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetFrameSubType(pframe, WIFI_NDPA); ++ ++ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(Adapter), ETH_ALEN); ++ ++ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) ++ aSifsTime = 16; ++ else ++ aSifsTime = 10; ++ ++ duration = 2*aSifsTime + 44; ++ ++ if(bw == CHANNEL_WIDTH_80) ++ duration += 40; ++ else if(bw == CHANNEL_WIDTH_40) ++ duration+= 87; ++ else ++ duration+= 180; ++ ++ SetDuration(pframe, duration); ++ ++ sequence = pBeamInfo->sounding_sequence<< 2; ++ if (pBeamInfo->sounding_sequence >= 0x3f) ++ pBeamInfo->sounding_sequence = 0; ++ else ++ pBeamInfo->sounding_sequence++; ++ ++ _rtw_memcpy(pframe+16, &sequence,1); ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ aid = 0; ++ ++ sta_info.aid = aid; ++ sta_info.feedback_type = 0; ++ sta_info.nc_index= 0; ++ ++ _rtw_memcpy(pframe+17, (u8 *)&sta_info, 2); ++ ++ pattrib->pktlen = 19; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++} ++ ++BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) ++{ ++ return issue_vht_ndpa_packet(Adapter, ra, aid, bw, qidx); ++} ++ ++BOOLEAN beamfomring_bSounding(struct beamforming_info *pBeamInfo) ++{ ++ BOOLEAN bSounding = _FALSE; ++ ++ if(( beamforming_get_beamform_cap(pBeamInfo) & BEAMFORMER_CAP) == 0) ++ bSounding = _FALSE; ++ else ++ bSounding = _TRUE; ++ ++ return bSounding; ++} ++ ++u8 beamforming_sounding_idx(struct beamforming_info *pBeamInfo) ++{ ++ u8 idx = 0; ++ u8 i; ++ ++ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) ++ { ++ if (pBeamInfo->beamforming_entry[i].bUsed && ++ (_FALSE == pBeamInfo->beamforming_entry[i].bSound)) ++ { ++ idx = i; ++ break; ++ } ++ } ++ ++ return idx; ++} ++ ++SOUNDING_MODE beamforming_sounding_mode(struct beamforming_info *pBeamInfo, u8 idx) ++{ ++ struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; ++ SOUNDING_MODE mode; ++ ++ if(BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) ++ { ++ mode = SOUNDING_FW_VHT_TIMER; ++ } ++ else if(BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) ++ { ++ mode = SOUNDING_FW_HT_TIMER; ++ } ++ else ++ { ++ mode = SOUNDING_STOP_All_TIMER; ++ } ++ ++ return mode; ++} ++ ++u16 beamforming_sounding_time(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) ++{ ++ u16 sounding_time = 0xffff; ++ struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; ++ ++ sounding_time = BeamEntry.sound_period; ++ ++ return sounding_time; ++} ++ ++CHANNEL_WIDTH beamforming_sounding_bw(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) ++{ ++ CHANNEL_WIDTH sounding_bw = CHANNEL_WIDTH_20; ++ struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; ++ ++ sounding_bw = BeamEntry.sound_bw; ++ ++ return sounding_bw; ++} ++ ++BOOLEAN beamforming_select_beam_entry(struct beamforming_info *pBeamInfo) ++{ ++ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); ++ ++ pSoundInfo->sound_idx = beamforming_sounding_idx(pBeamInfo); ++ ++ if(pSoundInfo->sound_idx < BEAMFORMING_ENTRY_NUM) ++ pSoundInfo->sound_mode = beamforming_sounding_mode(pBeamInfo, pSoundInfo->sound_idx); ++ else ++ pSoundInfo->sound_mode = SOUNDING_STOP_All_TIMER; ++ ++ if(SOUNDING_STOP_All_TIMER == pSoundInfo->sound_mode) ++ { ++ return _FALSE; ++ } ++ else ++ { ++ pSoundInfo->sound_bw = beamforming_sounding_bw(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx ); ++ pSoundInfo->sound_period = beamforming_sounding_time(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx ); ++ return _TRUE; ++ } ++} ++ ++BOOLEAN beamforming_start_fw(PADAPTER adapter, u8 idx) ++{ ++ u8 *RA = NULL; ++ struct beamforming_entry *pEntry; ++ BOOLEAN ret = _TRUE; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ ++ pEntry = &(pBeamInfo->beamforming_entry[idx]); ++ if(pEntry->bUsed == _FALSE) ++ { ++ DBG_871X("Skip Beamforming, no entry for Idx =%d\n", idx); ++ return _FALSE; ++ } ++ ++ pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING; ++ pEntry->bSound = _TRUE; ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); ++ ++ return _TRUE; ++} ++ ++void beamforming_end_fw(PADAPTER adapter) ++{ ++ u8 idx = 0; ++ ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++} ++ ++BOOLEAN beamforming_start_period(PADAPTER adapter) ++{ ++ BOOLEAN ret = _TRUE; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); ++ ++ beamforming_dym_ndpa_rate(adapter); ++ ++ beamforming_select_beam_entry(pBeamInfo); ++ ++ if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) ++ { ++ ret = beamforming_start_fw(adapter, pSoundInfo->sound_idx); ++ } ++ else ++ { ++ ret = _FALSE; ++ } ++ ++ DBG_871X("%s Idx %d Mode %d BW %d Period %d\n", __FUNCTION__, ++ pSoundInfo->sound_idx, pSoundInfo->sound_mode, pSoundInfo->sound_bw, pSoundInfo->sound_period); ++ ++ return ret; ++} ++ ++void beamforming_end_period(PADAPTER adapter) ++{ ++ u8 idx = 0; ++ struct beamforming_entry *pBeamformEntry; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); ++ ++ ++ if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) ++ { ++ beamforming_end_fw(adapter); ++ } ++} ++ ++void beamforming_notify(PADAPTER adapter) ++{ ++ BOOLEAN bSounding = _FALSE; ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(adapter->mlmepriv)); ++ ++ bSounding = beamfomring_bSounding(pBeamInfo); ++ ++ if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_IDLE) ++ { ++ if(bSounding) ++ { ++ if(beamforming_start_period(adapter) == _TRUE) ++ pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; ++ } ++ } ++ else if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_START) ++ { ++ if(bSounding) ++ { ++ if(beamforming_start_period(adapter) == _FALSE) ++ pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; ++ } ++ else ++ { ++ beamforming_end_period(adapter); ++ pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; ++ } ++ } ++ else if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_END) ++ { ++ if(bSounding) ++ { ++ if(beamforming_start_period(adapter) == _TRUE) ++ pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; ++ } ++ } ++ else ++ { ++ DBG_871X("%s BeamformState %d\n", __FUNCTION__, pBeamInfo->beamforming_state); ++ } ++ ++ DBG_871X("%s BeamformState %d bSounding %d\n", __FUNCTION__, pBeamInfo->beamforming_state, bSounding); ++} ++ ++BOOLEAN beamforming_init_entry(PADAPTER adapter, struct sta_info *psta, u8* idx) ++{ ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct ht_priv *phtpriv = &(pmlmepriv->htpriv); ++#ifdef CONFIG_80211AC_VHT ++ struct vht_priv *pvhtpriv = &(pmlmepriv->vhtpriv); ++#endif ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct beamforming_entry *pBeamformEntry = NULL; ++ u8 *ra; ++ u16 aid, mac_id; ++ u8 wireless_mode; ++ CHANNEL_WIDTH bw = CHANNEL_WIDTH_20; ++ BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; ++ ++ // The current setting does not support Beaforming ++ if (0 == phtpriv->beamform_cap ++#ifdef CONFIG_80211AC_VHT ++ && 0 == pvhtpriv->beamform_cap ++#endif ++ ) { ++ DBG_871X("The configuration disabled Beamforming! Skip...\n"); ++ return _FALSE; ++ } ++ ++ aid = psta->aid; ++ ra = psta->hwaddr; ++ mac_id = psta->mac_id; ++ wireless_mode = psta->wireless_mode; ++ bw = psta->bw_mode; ++ ++ if (IsSupportedHT(wireless_mode) || IsSupportedVHT(wireless_mode)) { ++ //3 // HT ++ u8 cur_beamform; ++ ++ cur_beamform = psta->htpriv.beamform_cap; ++ ++ // We are Beamformee because the STA is Beamformer ++ if(TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) ++ beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMEE_CAP_HT_EXPLICIT); ++ ++ // We are Beamformer because the STA is Beamformee ++ if(TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) ++ beamform_cap =(BEAMFORMING_CAP)(beamform_cap | BEAMFORMER_CAP_HT_EXPLICIT); ++#ifdef CONFIG_80211AC_VHT ++ if (IsSupportedVHT(wireless_mode)) { ++ //3 // VHT ++ cur_beamform = psta->vhtpriv.beamform_cap; ++ ++ // We are Beamformee because the STA is Beamformer ++ if(TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) ++ beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMEE_CAP_VHT_SU); ++ // We are Beamformer because the STA is Beamformee ++ if(TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) ++ beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMER_CAP_VHT_SU); ++ } ++#endif //CONFIG_80211AC_VHT ++ ++ if(beamform_cap == BEAMFORMING_CAP_NONE) ++ return _FALSE; ++ ++ DBG_871X("Beamforming Config Capability = 0x%02X\n", beamform_cap); ++ ++ pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); ++ if (pBeamformEntry == NULL) { ++ pBeamformEntry = beamforming_add_entry(adapter, ra, aid, mac_id, bw, beamform_cap, idx); ++ if(pBeamformEntry == NULL) ++ return _FALSE; ++ else ++ pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; ++ } else { ++ // Entry has been created. If entry is initialing or progressing then errors occur. ++ if (pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && ++ pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ DBG_871X("Error State of Beamforming"); ++ return _FALSE; ++ } else { ++ pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; ++ } ++ } ++ ++ pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ psta->txbf_paid = pBeamformEntry->p_aid; ++ psta->txbf_gid = pBeamformEntry->g_id; ++ ++ DBG_871X("%s Idx %d\n", __FUNCTION__, *idx); ++ } else { ++ return _FALSE; ++ } ++ ++ return _SUCCESS; ++} ++ ++void beamforming_deinit_entry(PADAPTER adapter, u8* ra) ++{ ++ u8 idx = 0; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ ++ if(beamforming_remove_entry(pmlmepriv, ra, &idx) == _TRUE) ++ { ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); ++ } ++ ++ DBG_871X("%s Idx %d\n", __FUNCTION__, idx); ++} ++ ++void beamforming_reset(PADAPTER adapter) ++{ ++ u8 idx = 0; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ ++ for(idx = 0; idx < BEAMFORMING_ENTRY_NUM; idx++) ++ { ++ if(pBeamInfo->beamforming_entry[idx].bUsed == _TRUE) ++ { ++ pBeamInfo->beamforming_entry[idx].bUsed = _FALSE; ++ pBeamInfo->beamforming_entry[idx].beamforming_entry_cap = BEAMFORMING_CAP_NONE; ++ pBeamInfo->beamforming_entry[idx].beamforming_entry_state= BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); ++ } ++ } ++ ++ DBG_871X("%s\n", __FUNCTION__); ++} ++ ++void beamforming_sounding_fail(PADAPTER Adapter) ++{ ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); ++ ++ pEntry->bSound = _FALSE; ++ rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); ++ beamforming_deinit_entry(Adapter, pEntry->mac_addr); ++} ++ ++void beamforming_check_sounding_success(PADAPTER Adapter,BOOLEAN status) ++{ ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); ++ struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); ++ ++ if(status == 1) ++ { ++ pEntry->LogStatusFailCnt = 0; ++ } ++ else ++ { ++ pEntry->LogStatusFailCnt++; ++ DBG_871X("%s LogStatusFailCnt %d\n", __FUNCTION__, pEntry->LogStatusFailCnt); ++ } ++ if(pEntry->LogStatusFailCnt > 20) ++ { ++ DBG_871X("%s LogStatusFailCnt > 20, Stop SOUNDING\n", __FUNCTION__); ++ //pEntry->bSound = _FALSE; ++ //rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); ++ //beamforming_deinit_entry(Adapter, pEntry->mac_addr); ++ beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_FAIL, NULL, 0, 1); ++ } ++} ++ ++void beamforming_enter(PADAPTER adapter, PVOID psta) ++{ ++ u8 idx = 0xff; ++ ++ if(beamforming_init_entry(adapter, (struct sta_info *)psta, &idx)) ++ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_ENTER, (u8 *)&idx); ++ ++ //DBG_871X("%s Idx %d\n", __FUNCTION__, idx); ++} ++ ++void beamforming_leave(PADAPTER adapter,u8* ra) ++{ ++ if(ra == NULL) ++ beamforming_reset(adapter); ++ else ++ beamforming_deinit_entry(adapter, ra); ++ ++ beamforming_notify(adapter); ++} ++ ++BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo) ++{ ++ u8 i; ++ BOOLEAN bSelfBeamformer = _FALSE; ++ BOOLEAN bSelfBeamformee = _FALSE; ++ struct beamforming_entry beamforming_entry; ++ BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; ++ ++ for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) ++ { ++ beamforming_entry = pBeamInfo->beamforming_entry[i]; ++ ++ if(beamforming_entry.bUsed) ++ { ++ if( (beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU) || ++ (beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT)) ++ bSelfBeamformee = _TRUE; ++ if( (beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) || ++ (beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) ++ bSelfBeamformer = _TRUE; ++ } ++ ++ if(bSelfBeamformer && bSelfBeamformee) ++ i = BEAMFORMING_ENTRY_NUM; ++ } ++ ++ if(bSelfBeamformer) ++ beamform_cap |= BEAMFORMER_CAP; ++ if(bSelfBeamformee) ++ beamform_cap |= BEAMFORMEE_CAP; ++ ++ return beamform_cap; ++} ++ ++void beamforming_watchdog(PADAPTER Adapter) ++{ ++ struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(( &(Adapter->mlmepriv))); ++ ++ if(pBeamInfo->beamforming_state != BEAMFORMING_STATE_START) ++ return; ++ ++ beamforming_dym_period(Adapter); ++ beamforming_dym_ndpa_rate(Adapter); ++} ++#endif/* #if (BEAMFORMING_SUPPORT ==0) - for diver defined beamforming*/ ++ ++u32 beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame) ++{ ++ u32 ret = _SUCCESS; ++#if (BEAMFORMING_SUPPORT == 1) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ ++ ret = Beamforming_GetReportFrame(pDM_Odm, precv_frame); ++ ++#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ ++ struct beamforming_entry *pBeamformEntry = NULL; ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ u32 frame_len = precv_frame->u.hdr.len; ++ u8 *ta; ++ u8 idx, offset; ++ ++ /*DBG_871X("beamforming_get_report_frame\n");*/ ++ ++ /*Memory comparison to see if CSI report is the same with previous one*/ ++ ta = GetAddr2Ptr(pframe); ++ pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); ++ if (pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) ++ offset = 31; /*24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ ++ else if (pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) ++ offset = 34; /*24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ ++ else ++ return ret; ++ ++ /*DBG_871X("%s MacId %d offset=%d\n", __FUNCTION__, pBeamformEntry->mac_id, offset);*/ ++ ++ if (_rtw_memcmp(pBeamformEntry->PreCsiReport + offset, pframe+offset, frame_len-offset) == _FALSE) ++ pBeamformEntry->DefaultCsiCnt = 0; ++ else ++ pBeamformEntry->DefaultCsiCnt++; ++ ++ _rtw_memcpy(&pBeamformEntry->PreCsiReport, pframe, frame_len); ++ ++ pBeamformEntry->bDefaultCSI = _FALSE; ++ ++ if (pBeamformEntry->DefaultCsiCnt > 20) ++ pBeamformEntry->bDefaultCSI = _TRUE; ++ else ++ pBeamformEntry->bDefaultCSI = _FALSE; ++#endif ++ return ret; ++} ++ ++void beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame) ++{ ++#if (BEAMFORMING_SUPPORT == 1) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ ++ Beamforming_GetNDPAFrame(pDM_Odm, precv_frame); ++ ++#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ ++ u8 *ta; ++ u8 idx, Sequence; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct beamforming_entry *pBeamformEntry = NULL; ++ ++ /*DBG_871X("beamforming_get_ndpa_frame\n");*/ ++ ++ if (IS_HARDWARE_TYPE_8812(Adapter) == _FALSE) ++ return; ++ else if (GetFrameSubType(pframe) != WIFI_NDPA) ++ return; ++ ++ ta = GetAddr2Ptr(pframe); ++ /*Remove signaling TA. */ ++ ta[0] = ta[0] & 0xFE; ++ ++ pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); ++ ++ if (pBeamformEntry == NULL) ++ return; ++ else if (!(pBeamformEntry->beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU)) ++ return; ++ /*LogSuccess: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/ ++ /*ClockResetTimes: While BFer entry always doesn't receive our CSI, clock will reset again and again.So ClockResetTimes is limited to 5 times.2015-04-13, Jeffery*/ ++ else if ((pBeamformEntry->LogSuccess == 1) || (pBeamformEntry->ClockResetTimes == 5)) { ++ DBG_871X("[%s] LogSeq=%d, PreLogSeq=%d\n", __func__, pBeamformEntry->LogSeq, pBeamformEntry->PreLogSeq); ++ return; ++ } ++ ++ Sequence = (pframe[16]) >> 2; ++ DBG_871X("[%s] Start, Sequence=%d, LogSeq=%d, PreLogSeq=%d, LogRetryCnt=%d, ClockResetTimes=%d, LogSuccess=%d\n", ++ __func__, Sequence, pBeamformEntry->LogSeq, pBeamformEntry->PreLogSeq, pBeamformEntry->LogRetryCnt, pBeamformEntry->ClockResetTimes, pBeamformEntry->LogSuccess); ++ ++ if ((pBeamformEntry->LogSeq != 0) && (pBeamformEntry->PreLogSeq != 0)) { ++ /*Success condition*/ ++ if ((pBeamformEntry->LogSeq != Sequence) && (pBeamformEntry->PreLogSeq != pBeamformEntry->LogSeq)) { ++ /* break option for clcok reset, 2015-03-30, Jeffery */ ++ pBeamformEntry->LogRetryCnt = 0; ++ /*As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/ ++ /*That is, LogSuccess is NOT needed to be reset to zero, 2015-04-13, Jeffery*/ ++ pBeamformEntry->LogSuccess = 1; ++ ++ } else {/*Fail condition*/ ++ ++ if (pBeamformEntry->LogRetryCnt == 5) { ++ pBeamformEntry->ClockResetTimes++; ++ pBeamformEntry->LogRetryCnt = 0; ++ ++ DBG_871X("[%s] Clock Reset!!! ClockResetTimes=%d\n", __func__, pBeamformEntry->ClockResetTimes); ++ beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_CLK, NULL, 0, 1); ++ ++ } else ++ pBeamformEntry->LogRetryCnt++; ++ } ++ } ++ ++ /*Update LogSeq & PreLogSeq*/ ++ pBeamformEntry->PreLogSeq = pBeamformEntry->LogSeq; ++ pBeamformEntry->LogSeq = Sequence; ++ ++#endif ++ ++} ++ ++ ++ ++ ++void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++_func_enter_; ++ ++#if (BEAMFORMING_SUPPORT == 1) /*(BEAMFORMING_SUPPORT == 1)- for PHYDM beamfoming*/ ++ switch (type) { ++ case BEAMFORMING_CTRL_ENTER: ++ { ++ struct sta_info *psta = (PVOID)pbuf; ++ u16 staIdx = psta->mac_id; ++ ++ Beamforming_Enter(pDM_Odm, staIdx); ++ break; ++ } ++ case BEAMFORMING_CTRL_LEAVE: ++ Beamforming_Leave(pDM_Odm, pbuf); ++ break; ++ default: ++ break; ++ ++ } ++#else /*(BEAMFORMING_SUPPORT == 0)- for drv beamfoming*/ ++ switch (type) { ++ case BEAMFORMING_CTRL_ENTER: ++ beamforming_enter(padapter, (PVOID)pbuf); ++ break; ++ ++ case BEAMFORMING_CTRL_LEAVE: ++ beamforming_leave(padapter, pbuf); ++ break; ++ ++ case BEAMFORMING_CTRL_SOUNDING_FAIL: ++ beamforming_sounding_fail(padapter); ++ break; ++ ++ case BEAMFORMING_CTRL_SOUNDING_CLK: ++ rtw_hal_set_hwreg(padapter, HW_VAR_SOUNDING_CLK, NULL); ++ break; ++ ++ default: ++ break; ++ } ++#endif ++_func_exit_; ++} ++ ++u8 beamforming_wk_cmd(_adapter*padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ if(enqueue) ++ { ++ u8 *wk_buf; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ if (pbuf != NULL) { ++ wk_buf = rtw_zmalloc(size); ++ if(wk_buf==NULL){ ++ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memcpy(wk_buf, pbuf, size); ++ } else { ++ wk_buf = NULL; ++ size = 0; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = BEAMFORMING_WK_CID; ++ pdrvextra_cmd_parm->type = type; ++ pdrvextra_cmd_parm->size = size; ++ pdrvextra_cmd_parm->pbuf = wk_buf; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ } ++ else ++ { ++ beamforming_wk_hdl(padapter, type, pbuf); ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void update_attrib_txbf_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta) ++{ ++ if (psta) { ++ pattrib->txbf_g_id = psta->txbf_gid; ++ pattrib->txbf_p_aid = psta->txbf_paid; ++ } ++} ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_br_ext.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_br_ext.c +old mode 100755 +new mode 100644 +index b1fc8aa..024049c +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_br_ext.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_br_ext.c +@@ -48,8 +48,11 @@ + #include + #include + #include +-#include ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) + #include ++#else ++#include ++#endif + #endif + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_bt_mp.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_bt_mp.c +old mode 100755 +new mode 100644 +index 73f2105..338a5b3 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_bt_mp.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_bt_mp.c +@@ -1,1775 +1,1753 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +- +- +-#include +-#include +- +-#ifdef CONFIG_RTL8723A +-#include +-#elif defined(CONFIG_RTL8723B) +-#include +-#endif +- +-#if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) +-void MPh2c_timeout_handle(void *FunctionContext) +-{ +- PADAPTER pAdapter; +- PMPT_CONTEXT pMptCtx; +- +- +- DBG_8192C("[MPT], MPh2c_timeout_handle \n"); +- +- pAdapter = (PADAPTER)FunctionContext; +- pMptCtx = &pAdapter->mppriv.MptCtx; +- +- pMptCtx->bMPh2c_timeout = _TRUE; +- +- if ((_FALSE == pMptCtx->MptH2cRspEvent) +- || ((_TRUE == pMptCtx->MptH2cRspEvent) +- && (_FALSE == pMptCtx->MptBtC2hEvent))) +- { +- _rtw_up_sema(&pMptCtx->MPh2c_Sema); +- } +-} +- +-u32 WaitC2Hevent(PADAPTER pAdapter, u8 *C2H_event, u32 delay_time) +-{ +- PMPT_CONTEXT pMptCtx=&(pAdapter->mppriv.MptCtx); +- pMptCtx->bMPh2c_timeout=_FALSE; +- +- if( pAdapter->registrypriv.mp_mode == 0 ) +- { +- DBG_8192C("[MPT], Error!! WaitC2Hevent mp_mode == 0!!\n"); +- return _FALSE; +- } +- +- _set_timer( &pMptCtx->MPh2c_timeout_timer, delay_time ); +- +- _rtw_down_sema(&pMptCtx->MPh2c_Sema); +- +- if (pMptCtx->bMPh2c_timeout == _TRUE) +- { +- *C2H_event = _FALSE; +- +- return _FALSE; +- } +- +- // for safty, cancel timer here again +- _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); +- +- return _TRUE; +-} +- +-BT_CTRL_STATUS +-mptbt_CheckC2hFrame( +- PADAPTER Adapter, +- PBT_H2C pH2c, +- PBT_EXT_C2H pExtC2h +- ) +-{ +- BT_CTRL_STATUS c2hStatus = BT_STATUS_C2H_SUCCESS; +- +- //DBG_8192C("[MPT], MPT rsp C2H hex: %x %x %x %x %x %x \n"), pExtC2h , pExtC2h+1 ,pExtC2h+2 ,pExtC2h+3 ,pExtC2h+4 ,pExtC2h+5); +- +- DBG_8192C("[MPT], statusCode = 0x%x\n", pExtC2h->statusCode); +- DBG_8192C("[MPT], retLen = %d\n", pExtC2h->retLen); +- DBG_8192C("[MPT], opCodeVer : req/rsp=%d/%d\n", pH2c->opCodeVer, pExtC2h->opCodeVer); +- DBG_8192C("[MPT], reqNum : req/rsp=%d/%d\n", pH2c->reqNum, pExtC2h->reqNum); +- if(pExtC2h->reqNum != pH2c->reqNum) +- { +- c2hStatus = BT_STATUS_C2H_REQNUM_MISMATCH; +- DBG_8192C("[MPT], Error!! C2H reqNum Mismatch!!\n"); +- } +- else if(pExtC2h->opCodeVer != pH2c->opCodeVer) +- { +- c2hStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; +- DBG_8192C("[MPT], Error!! OPCode version L mismatch!!\n"); +- } +- +- return c2hStatus; +-} +- +-BT_CTRL_STATUS +-mptbt_SendH2c( +- PADAPTER Adapter, +- PBT_H2C pH2c, +- u2Byte h2cCmdLen +- ) +-{ +- //KIRQL OldIrql = KeGetCurrentIrql(); +- BT_CTRL_STATUS h2cStatus=BT_STATUS_H2C_SUCCESS; +- PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); +- u1Byte i; +- +- DBG_8192C("[MPT], mptbt_SendH2c()=========>\n"); +- +- //PlatformResetEvent(&pMptCtx->MptH2cRspEvent); +- //PlatformResetEvent(&pMptCtx->MptBtC2hEvent); +- +-// if(OldIrql == PASSIVE_LEVEL) +-// { +- //RTPRINT_DATA(FMPBT, FMPBT_H2C_CONTENT, ("[MPT], MPT H2C hex: \n"), pH2c, h2cCmdLen); +- +- for(i=0; iMptH2cRspEvent = _FALSE; +- pMptCtx->MptBtC2hEvent = _FALSE; +- +-#if defined(CONFIG_RTL8723A) +- rtw_hal_fill_h2c_cmd(Adapter, 70, h2cCmdLen, (pu1Byte)pH2c); +-#elif defined(CONFIG_RTL8723B) +- rtl8723b_set_FwBtMpOper_cmd(Adapter, pH2c->opCode, pH2c->opCodeVer, pH2c->reqNum, pH2c->buf); +-#endif +- pMptCtx->h2cReqNum++; +- pMptCtx->h2cReqNum %= 16; +- +- if(WaitC2Hevent(Adapter, &pMptCtx->MptH2cRspEvent, 100)) +- { +- DBG_8192C("[MPT], Received WiFi MptH2cRspEvent!!!\n"); +- if(WaitC2Hevent(Adapter, &pMptCtx->MptBtC2hEvent, 400)) +- { +- DBG_8192C("[MPT], Received MptBtC2hEvent!!!\n"); +- break; +- } +- else +- { +- DBG_8192C("[MPT], Error!!BT MptBtC2hEvent timeout!!\n"); +- h2cStatus = BT_STATUS_H2C_BT_NO_RSP; +- } +- } +- else +- { +- DBG_8192C("[MPT], Error!!WiFi MptH2cRspEvent timeout!!\n"); +- h2cStatus = BT_STATUS_H2C_TIMTOUT; +- } +- } +-// } +-// else +-// { +-// RT_ASSERT(FALSE, ("[MPT], mptbt_SendH2c() can only run under PASSIVE_LEVEL!!\n")); +-// h2cStatus = BT_STATUS_WRONG_LEVEL; +-// } +- +- DBG_8192C("[MPT], mptbt_SendH2c()<=========\n"); +- return h2cStatus; +-} +- +- +- +-BT_CTRL_STATUS +-mptbt_CheckBtRspStatus( +- PADAPTER Adapter, +- PBT_EXT_C2H pExtC2h +- ) +-{ +- BT_CTRL_STATUS retStatus=BT_OP_STATUS_SUCCESS; +- +- switch(pExtC2h->statusCode) +- { +- case BT_OP_STATUS_SUCCESS: +- retStatus = BT_STATUS_BT_OP_SUCCESS; +- DBG_8192C("[MPT], BT status : BT_STATUS_SUCCESS\n"); +- break; +- case BT_OP_STATUS_VERSION_MISMATCH: +- retStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; +- DBG_8192C("[MPT], BT status : BT_STATUS_OPCODE_L_VERSION_MISMATCH\n"); +- break; +- case BT_OP_STATUS_UNKNOWN_OPCODE: +- retStatus = BT_STATUS_UNKNOWN_OPCODE_L; +- DBG_8192C("[MPT], BT status : BT_STATUS_UNKNOWN_OPCODE_L\n"); +- break; +- case BT_OP_STATUS_ERROR_PARAMETER: +- retStatus = BT_STATUS_PARAMETER_FORMAT_ERROR_L; +- DBG_8192C("[MPT], BT status : BT_STATUS_PARAMETER_FORMAT_ERROR_L\n"); +- break; +- default: +- retStatus = BT_STATUS_UNKNOWN_STATUS_L; +- DBG_8192C("[MPT], BT status : BT_STATUS_UNKNOWN_STATUS_L\n"); +- break; +- } +- +- return retStatus; +-} +- +- +- +-BT_CTRL_STATUS +-mptbt_BtFwOpCodeProcess( +- PADAPTER Adapter, +- u1Byte btFwOpCode, +- u1Byte opCodeVer, +- pu1Byte pH2cPar, +- u1Byte h2cParaLen +- ) +-{ +- u1Byte H2C_Parameter[6] ={0}; +- PBT_H2C pH2c=(PBT_H2C)&H2C_Parameter[0]; +- PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); +- PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; +- u2Byte paraLen=0,i; +- BT_CTRL_STATUS h2cStatus=BT_STATUS_H2C_SUCCESS, c2hStatus=BT_STATUS_C2H_SUCCESS; +- BT_CTRL_STATUS retStatus=BT_STATUS_H2C_BT_NO_RSP; +- +- if( Adapter->registrypriv.mp_mode == 0 ) +- { +- DBG_8192C("[MPT], Error!! mptbt_BtFwOpCodeProces mp_mode == 0!!\n"); +- return _FALSE; +- } +- +- pH2c->opCode = btFwOpCode; +- pH2c->opCodeVer = opCodeVer; +- pH2c->reqNum = pMptCtx->h2cReqNum; +- //PlatformMoveMemory(&pH2c->buf[0], pH2cPar, h2cParaLen); +- //_rtw_memcpy(&pH2c->buf[0], pH2cPar, h2cParaLen); +- _rtw_memcpy(pH2c->buf, pH2cPar, h2cParaLen); +- +- DBG_8192C("[MPT], pH2c->opCode=%d\n", pH2c->opCode); +- DBG_8192C("[MPT], pH2c->opCodeVer=%d\n", pH2c->opCodeVer); +- DBG_8192C("[MPT], pH2c->reqNum=%d\n", pH2c->reqNum); +- DBG_8192C("[MPT], h2c parameter length=%d\n", h2cParaLen); +- for (i=0; ibuf[i]); +- } +- +- h2cStatus = mptbt_SendH2c(Adapter, pH2c, h2cParaLen+2); +- if(BT_STATUS_H2C_SUCCESS == h2cStatus) +- { +- // if reach here, it means H2C get the correct c2h response, +- c2hStatus = mptbt_CheckC2hFrame(Adapter, pH2c, pExtC2h); +- if(BT_STATUS_C2H_SUCCESS == c2hStatus) +- { +- retStatus = mptbt_CheckBtRspStatus(Adapter, pExtC2h); +- } +- else +- { +- DBG_8192C("[MPT], Error!! C2H failed for pH2c->opCode=%d\n", pH2c->opCode); +- // check c2h status error, return error status code to upper layer. +- retStatus = c2hStatus; +- } +- } +- else +- { +- DBG_8192C("[MPT], Error!! H2C failed for pH2c->opCode=%d\n", pH2c->opCode); +- // check h2c status error, return error status code to upper layer. +- retStatus = h2cStatus; +- } +- +- return retStatus; +-} +- +- +- +- +-u2Byte +-mptbt_BtReady( +- PADAPTER Adapter, +- PBT_REQ_CMD pBtReq, +- PBT_RSP_CMD pBtRsp +- ) +-{ +- u1Byte h2cParaBuf[6] ={0}; +- u1Byte h2cParaLen=0; +- u2Byte paraLen=0; +- u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; +- u1Byte btOpcode; +- u1Byte btOpcodeVer=0; +- PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); +- PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; +- u1Byte i; +- u1Byte btFwVer=0, bdAddr[6]={0}; +- u2Byte btRealFwVer=0; +- pu2Byte pu2Tmp=NULL; +- +- // +- // check upper layer parameters +- // +- +- // 1. check upper layer opcode version +- if(pBtReq->opCodeVer != 1) +- { +- DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); +- pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; +- return paraLen; +- } +- +- pBtRsp->pParamStart[0] = MP_BT_NOT_READY; +- paraLen = 10; +- // +- // execute lower layer opcodes +- // +- +- // Get BT FW version +- // fill h2c parameters +- btOpcode = BT_LO_OP_GET_BT_VERSION; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- else +- { +- pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; +- btRealFwVer = *pu2Tmp; +- btFwVer = pExtC2h->buf[1]; +- DBG_8192C("[MPT], btRealFwVer=0x%x, btFwVer=0x%x\n", btRealFwVer, btFwVer); +- } +- +- // Get BD Address +- // fill h2c parameters +- btOpcode = BT_LO_OP_GET_BD_ADDR_L; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- else +- { +- bdAddr[5] = pExtC2h->buf[0]; +- bdAddr[4] = pExtC2h->buf[1]; +- bdAddr[3] = pExtC2h->buf[2]; +- } +- +- // fill h2c parameters +- btOpcode = BT_LO_OP_GET_BD_ADDR_H; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- else +- { +- bdAddr[2] = pExtC2h->buf[0]; +- bdAddr[1] = pExtC2h->buf[1]; +- bdAddr[0] = pExtC2h->buf[2]; +- } +- DBG_8192C("[MPT], Local BDAddr:"); +- for(i=0; i<6; i++) +- { +- DBG_8192C(" 0x%x ", bdAddr[i]); +- } +- pBtRsp->status = BT_STATUS_SUCCESS; +- pBtRsp->pParamStart[0] = MP_BT_READY; +- pu2Tmp = (pu2Byte)&pBtRsp->pParamStart[1]; +- *pu2Tmp = btRealFwVer; +- pBtRsp->pParamStart[3] = btFwVer; +- for(i=0; i<6; i++) +- { +- pBtRsp->pParamStart[4+i] = bdAddr[5-i]; +- } +- +- return paraLen; +-} +- +-void mptbt_close_WiFiRF(PADAPTER Adapter) +-{ +- PHY_SetBBReg(Adapter, 0x824, 0xF, 0x0); +- PHY_SetBBReg(Adapter, 0x824, 0x700000, 0x0); +- PHY_SetRFReg(Adapter, RF90_PATH_A, 0x0, 0xF0000, 0x0); +-} +- +-void mptbt_open_WiFiRF(PADAPTER Adapter) +-{ +- PHY_SetBBReg(Adapter, 0x824, 0x700000, 0x3); +- PHY_SetBBReg(Adapter, 0x824, 0xF, 0x2); +- PHY_SetRFReg(Adapter, RF90_PATH_A, 0x0, 0xF0000, 0x3); +-} +- +-u4Byte mptbt_switch_RF(PADAPTER Adapter, u1Byte Enter) +-{ +- u2Byte tmp_2byte = 0; +- +- //Enter test mode +- if (Enter) { +- ////1>. close WiFi RF +- mptbt_close_WiFiRF(Adapter); +- +- ////2>. change ant switch to BT +- tmp_2byte = rtw_read16(Adapter, 0x860); +- tmp_2byte = tmp_2byte | BIT(9); +- tmp_2byte = tmp_2byte & (~BIT(8)); +- rtw_write16(Adapter, 0x860, tmp_2byte); +- rtw_write16(Adapter, 0x870, 0x300); +- } else { +- ////1>. Open WiFi RF +- mptbt_open_WiFiRF(Adapter); +- +- ////2>. change ant switch back +- tmp_2byte = rtw_read16(Adapter, 0x860); +- tmp_2byte = tmp_2byte | BIT(8); +- tmp_2byte = tmp_2byte & (~BIT(9)); +- rtw_write16(Adapter, 0x860, tmp_2byte); +- rtw_write16(Adapter, 0x870, 0x300); +- } +- +- return 0; +-} +- +-u2Byte +-mptbt_BtSetMode( +- PADAPTER Adapter, +- PBT_REQ_CMD pBtReq, +- PBT_RSP_CMD pBtRsp +- ) +-{ +- u1Byte h2cParaBuf[6] ={0}; +- u1Byte h2cParaLen=0; +- u2Byte paraLen=0; +- u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; +- u1Byte btOpcode; +- u1Byte btOpcodeVer=0; +- u1Byte btModeToSet=0; +- +- // +- // check upper layer parameters +- // +- // 1. check upper layer opcode version +- if(pBtReq->opCodeVer != 1) +- { +- DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); +- pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; +- return paraLen; +- } +- // 2. check upper layer parameter length +- if(1 == pBtReq->paraLength) +- { +- btModeToSet = pBtReq->pParamStart[0]; +- DBG_8192C("[MPT], BtTestMode=%d \n", btModeToSet); +- } +- else +- { +- DBG_8192C("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); +- pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; +- return paraLen; +- } +- +- // +- // execute lower layer opcodes +- // +- +- // 1. fill h2c parameters +- // check bt mode +- btOpcode = BT_LO_OP_SET_BT_MODE; +- if(btModeToSet >= MP_BT_MODE_MAX) +- { +- pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- else +- { +- mptbt_switch_RF(Adapter, 1); +- +- h2cParaBuf[0] = btModeToSet; +- h2cParaLen = 1; +- // 2. execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- } +- +- // 3. construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS == retStatus) +- { +- pBtRsp->status = BT_STATUS_SUCCESS; +- } +- else +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- } +- +- return paraLen; +-} +- +- +-VOID +-MPTBT_FwC2hBtMpCtrl( +- PADAPTER Adapter, +- pu1Byte tmpBuf, +- u1Byte length +- ) +-{ +- u32 i; +- PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); +- PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)tmpBuf; +- +- if(Adapter->bBTFWReady == _FALSE || Adapter->registrypriv.mp_mode == 0 ) +- { +- //DBG_8192C("Ignore C2H BT MP Info since not in MP mode \n"); +- return; +- } +- if( length > 32 || length < 3 ) +- { +- DBG_8192C("\n [MPT], pExtC2h->buf hex: length=%d > 32 || < 3\n",length); +- return; +- } +- +- //cancel_timeout for h2c handle +- _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); +- +- for (i=0; iextendId=0x%x\n", pExtC2h->extendId); +- +- switch(pExtC2h->extendId) +- { +- case EXT_C2H_WIFI_FW_ACTIVE_RSP: +- DBG_8192C("[MPT], EXT_C2H_WIFI_FW_ACTIVE_RSP\n"); +-#if 0 +- DBG_8192C("[MPT], pExtC2h->buf hex: \n"); +- for (i=0; i<(length-3); i++) +- { +- DBG_8192C(" 0x%x ", pExtC2h->buf[i]); +- } +-#endif +- if ((_FALSE == pMptCtx->bMPh2c_timeout) +- && (_FALSE == pMptCtx->MptH2cRspEvent)) +- { +- pMptCtx->MptH2cRspEvent = _TRUE; +- _rtw_up_sema(&pMptCtx->MPh2c_Sema); +- } +- break; +- +- case EXT_C2H_TRIG_BY_BT_FW: +- DBG_8192C("[MPT], EXT_C2H_TRIG_BY_BT_FW\n"); +- _rtw_memcpy(&pMptCtx->c2hBuf[0], tmpBuf, length); +- DBG_8192C("[MPT], pExtC2h->statusCode=0x%x\n", pExtC2h->statusCode); +- DBG_8192C("[MPT], pExtC2h->retLen=0x%x\n", pExtC2h->retLen); +- DBG_8192C("[MPT], pExtC2h->opCodeVer=0x%x\n", pExtC2h->opCodeVer); +- DBG_8192C("[MPT], pExtC2h->reqNum=0x%x\n", pExtC2h->reqNum); +- for (i=0; i<(length-3); i++) +- { +- DBG_8192C("[MPT], pExtC2h->buf[%d]=0x%02x\n", i, pExtC2h->buf[i]); +- } +- +- if ((_FALSE == pMptCtx->bMPh2c_timeout) +- && (_TRUE == pMptCtx->MptH2cRspEvent) +- && (_FALSE == pMptCtx->MptBtC2hEvent)) +- { +- pMptCtx->MptBtC2hEvent = _TRUE; +- _rtw_up_sema(&pMptCtx->MPh2c_Sema); +- } +- break; +- +- default: +- DBG_8192C("[MPT], EXT_C2H Target not found,pExtC2h->extendId =%d ,pExtC2h->reqNum=%d\n",pExtC2h->extendId,pExtC2h->reqNum); +- break; +- } +- +- +- +-} +- +- +-u2Byte +-mptbt_BtGetGeneral( +- IN PADAPTER Adapter, +- IN PBT_REQ_CMD pBtReq, +- IN PBT_RSP_CMD pBtRsp +- ) +-{ +- PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); +- PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; +- u1Byte h2cParaBuf[6] ={0}; +- u1Byte h2cParaLen=0; +- u2Byte paraLen=0; +- u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; +- u1Byte btOpcode, bdAddr[6]={0}; +- u1Byte btOpcodeVer=0; +- u1Byte getType=0, i; +- u2Byte getParaLen=0, validParaLen=0; +- u1Byte regType=0, reportType=0; +- u4Byte regAddr=0, regValue=0; +- pu4Byte pu4Tmp; +- pu2Byte pu2Tmp; +- pu1Byte pu1Tmp; +- +- // +- // check upper layer parameters +- // +- +- // check upper layer opcode version +- if(pBtReq->opCodeVer != 1) +- { +- DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); +- pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; +- return paraLen; +- } +- // check upper layer parameter length +- if(pBtReq->paraLength < 1) +- { +- DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); +- pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; +- return paraLen; +- } +- getParaLen = pBtReq->paraLength - 1; +- getType = pBtReq->pParamStart[0]; +- +- DBG_8192C("[MPT], getType=%d, getParaLen=%d\n", getType, getParaLen); +- +- // check parameter first +- switch(getType) +- { +- case BT_GGET_REG: +- DBG_8192C("[MPT], [BT_GGET_REG]\n"); +- validParaLen = 5; +- if(getParaLen == validParaLen) +- { +- btOpcode = BT_LO_OP_READ_REG; +- regType = pBtReq->pParamStart[1]; +- pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; +- regAddr = *pu4Tmp; +- DBG_8192C("[MPT], BT_GGET_REG regType=0x%02x, regAddr=0x%08x!!\n", +- regType, regAddr); +- if(regType >= BT_REG_MAX) +- { +- pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- else +- { +- if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) || +- ((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) || +- ((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) || +- ((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) || +- ((BT_REG_LE==regType)&&(regAddr>0xfff)) ) +- { +- pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- } +- } +- break; +- case BT_GGET_STATUS: +- DBG_8192C("[MPT], [BT_GGET_STATUS]\n"); +- validParaLen = 0; +- break; +- case BT_GGET_REPORT: +- DBG_8192C("[MPT], [BT_GGET_REPORT]\n"); +- validParaLen = 1; +- if(getParaLen == validParaLen) +- { +- reportType = pBtReq->pParamStart[1]; +- DBG_8192C("[MPT], BT_GGET_REPORT reportType=0x%x!!\n", reportType); +- if(reportType >= BT_REPORT_MAX) +- { +- pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- } +- break; +- default: +- { +- DBG_8192C("[MPT], Error!! getType=%d, out of range\n", getType); +- pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- break; +- } +- if(getParaLen != validParaLen) +- { +- DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_GET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", +- getParaLen, getType, validParaLen); +- pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; +- return paraLen; +- } +- +- // +- // execute lower layer opcodes +- // +- if(BT_GGET_REG == getType) +- { +- // fill h2c parameters +- // here we should write reg value first then write the address, adviced by Austin +- btOpcode = BT_LO_OP_READ_REG; +- h2cParaBuf[0] = regType; +- h2cParaBuf[1] = pBtReq->pParamStart[2]; +- h2cParaBuf[2] = pBtReq->pParamStart[3]; +- h2cParaLen = 3; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; +- regValue = *pu2Tmp; +- DBG_8192C("[MPT], read reg regType=0x%02x, regAddr=0x%08x, regValue=0x%04x\n", +- regType, regAddr, regValue); +- +- pu4Tmp = (pu4Byte)&pBtRsp->pParamStart[0]; +- *pu4Tmp = regValue; +- paraLen = 4; +- } +- else if(BT_GGET_STATUS == getType) +- { +- btOpcode = BT_LO_OP_GET_BT_STATUS; +- h2cParaLen = 0; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- pBtRsp->pParamStart[0] = pExtC2h->buf[0]; +- pBtRsp->pParamStart[1] = pExtC2h->buf[1]; +- DBG_8192C("[MPT], read bt status, testMode=0x%x, testStatus=0x%x\n", +- pBtRsp->pParamStart[0], pBtRsp->pParamStart[1]); +- paraLen = 2; +- } +- else if(BT_GGET_REPORT == getType) +- { +- switch(reportType) +- { +- case BT_REPORT_RX_PACKET_CNT: +- { +- DBG_8192C("[MPT], [Rx Packet Counts]\n"); +- btOpcode = BT_LO_OP_GET_RX_PKT_CNT_L; +- h2cParaLen = 0; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- pBtRsp->pParamStart[0] = pExtC2h->buf[0]; +- pBtRsp->pParamStart[1] = pExtC2h->buf[1]; +- +- btOpcode = BT_LO_OP_GET_RX_PKT_CNT_H; +- h2cParaLen = 0; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- pBtRsp->pParamStart[2] = pExtC2h->buf[0]; +- pBtRsp->pParamStart[3] = pExtC2h->buf[1]; +- paraLen = 4; +- } +- break; +- case BT_REPORT_RX_ERROR_BITS: +- { +- DBG_8192C("[MPT], [Rx Error Bits]\n"); +- btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_L; +- h2cParaLen = 0; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- pBtRsp->pParamStart[0] = pExtC2h->buf[0]; +- pBtRsp->pParamStart[1] = pExtC2h->buf[1]; +- +- btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_H; +- h2cParaLen = 0; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- pBtRsp->pParamStart[2] = pExtC2h->buf[0]; +- pBtRsp->pParamStart[3] = pExtC2h->buf[1]; +- paraLen = 4; +- } +- break; +- case BT_REPORT_RSSI: +- { +- DBG_8192C("[MPT], [RSSI]\n"); +- btOpcode = BT_LO_OP_GET_RSSI; +- h2cParaLen = 0; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- pBtRsp->pParamStart[0] = pExtC2h->buf[0]; +- pBtRsp->pParamStart[1] = pExtC2h->buf[1]; +- paraLen = 2; +- } +- break; +- case BT_REPORT_CFO_HDR_QUALITY: +- { +- DBG_8192C("[MPT], [CFO & Header Quality]\n"); +- btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_L; +- h2cParaLen = 0; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- pBtRsp->pParamStart[0] = pExtC2h->buf[0]; +- pBtRsp->pParamStart[1] = pExtC2h->buf[1]; +- +- btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_H; +- h2cParaLen = 0; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- pBtRsp->pParamStart[2] = pExtC2h->buf[0]; +- pBtRsp->pParamStart[3] = pExtC2h->buf[1]; +- paraLen = 4; +- } +- break; +- case BT_REPORT_CONNECT_TARGET_BD_ADDR: +- { +- DBG_8192C("[MPT], [Connected Target BD ADDR]\n"); +- btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_L; +- h2cParaLen = 0; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- bdAddr[5] = pExtC2h->buf[0]; +- bdAddr[4] = pExtC2h->buf[1]; +- bdAddr[3] = pExtC2h->buf[2]; +- +- btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_H; +- h2cParaLen = 0; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- bdAddr[2] = pExtC2h->buf[0]; +- bdAddr[1] = pExtC2h->buf[1]; +- bdAddr[0] = pExtC2h->buf[2]; +- +- DBG_8192C("[MPT], Connected Target BDAddr:%s", bdAddr); +- for(i=0; i<6; i++) +- { +- pBtRsp->pParamStart[i] = bdAddr[5-i]; +- } +- paraLen = 6; +- } +- break; +- default: +- pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- break; +- } +- } +- +- pBtRsp->status = BT_STATUS_SUCCESS; +- return paraLen; +-} +- +- +- +-u2Byte +-mptbt_BtSetGeneral( +- IN PADAPTER Adapter, +- IN PBT_REQ_CMD pBtReq, +- IN PBT_RSP_CMD pBtRsp +- ) +-{ +- u1Byte h2cParaBuf[6] ={0}; +- u1Byte h2cParaLen=0; +- u2Byte paraLen=0; +- u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; +- u1Byte btOpcode; +- u1Byte btOpcodeVer=0; +- u1Byte setType=0; +- u2Byte setParaLen=0, validParaLen=0; +- u1Byte regType=0, bdAddr[6]={0}, calVal=0; +- u4Byte regAddr=0, regValue=0; +- pu4Byte pu4Tmp; +- pu2Byte pu2Tmp; +- pu1Byte pu1Tmp; +- +- // +- // check upper layer parameters +- // +- +- // check upper layer opcode version +- if(pBtReq->opCodeVer != 1) +- { +- DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); +- pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; +- return paraLen; +- } +- // check upper layer parameter length +- if(pBtReq->paraLength < 1) +- { +- DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); +- pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; +- return paraLen; +- } +- setParaLen = pBtReq->paraLength - 1; +- setType = pBtReq->pParamStart[0]; +- +- DBG_8192C("[MPT], setType=%d, setParaLen=%d\n", setType, setParaLen); +- +- // check parameter first +- switch(setType) +- { +- case BT_GSET_REG: +- DBG_8192C ("[MPT], [BT_GSET_REG]\n"); +- validParaLen = 9; +- if(setParaLen == validParaLen) +- { +- btOpcode = BT_LO_OP_WRITE_REG_VALUE; +- regType = pBtReq->pParamStart[1]; +- pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; +- regAddr = *pu4Tmp; +- pu4Tmp = (pu4Byte)&pBtReq->pParamStart[6]; +- regValue = *pu4Tmp; +- DBG_8192C("[MPT], BT_GSET_REG regType=0x%x, regAddr=0x%x, regValue=0x%x!!\n", +- regType, regAddr, regValue); +- if(regType >= BT_REG_MAX) +- { +- pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- else +- { +- if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) || +- ((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) || +- ((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) || +- ((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) || +- ((BT_REG_LE==regType)&&(regAddr>0xfff)) ) +- { +- pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- } +- } +- break; +- case BT_GSET_RESET: +- DBG_8192C("[MPT], [BT_GSET_RESET]\n"); +- validParaLen = 0; +- break; +- case BT_GSET_TARGET_BD_ADDR: +- DBG_8192C("[MPT], [BT_GSET_TARGET_BD_ADDR]\n"); +- validParaLen = 6; +- if(setParaLen == validParaLen) +- { +- btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; +- if( (pBtReq->pParamStart[1]==0) && +- (pBtReq->pParamStart[2]==0) && +- (pBtReq->pParamStart[3]==0) && +- (pBtReq->pParamStart[4]==0) && +- (pBtReq->pParamStart[5]==0) && +- (pBtReq->pParamStart[6]==0) ) +- { +- DBG_8192C("[MPT], Error!! targetBDAddr=all zero\n"); +- pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- if( (pBtReq->pParamStart[1]==0xff) && +- (pBtReq->pParamStart[2]==0xff) && +- (pBtReq->pParamStart[3]==0xff) && +- (pBtReq->pParamStart[4]==0xff) && +- (pBtReq->pParamStart[5]==0xff) && +- (pBtReq->pParamStart[6]==0xff) ) +- { +- DBG_8192C("[MPT], Error!! targetBDAddr=all 0xf\n"); +- pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- bdAddr[0] = pBtReq->pParamStart[6]; +- bdAddr[1] = pBtReq->pParamStart[5]; +- bdAddr[2] = pBtReq->pParamStart[4]; +- bdAddr[3] = pBtReq->pParamStart[3]; +- bdAddr[4] = pBtReq->pParamStart[2]; +- bdAddr[5] = pBtReq->pParamStart[1]; +- DBG_8192C ("[MPT], target BDAddr:%x,%x,%x,%x,%x,%x\n", +- bdAddr[0],bdAddr[1],bdAddr[2],bdAddr[3],bdAddr[4],bdAddr[5]); +- } +- break; +- case BT_GSET_TX_PWR_FINETUNE: +- DBG_8192C("[MPT], [BT_GSET_TX_PWR_FINETUNE]\n"); +- validParaLen = 1; +- if(setParaLen == validParaLen) +- { +- btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; +- calVal = pBtReq->pParamStart[1]; +- if( (calVal<1) || (calVal>9) ) +- { +- pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- DBG_8192C ("[MPT], calVal=%d\n", calVal); +- } +- break; +- case BT_SET_TRACKING_INTERVAL: +- DBG_871X("[MPT], [BT_SET_TRACKING_INTERVAL] setParaLen =%d \n",setParaLen); +- +- validParaLen = 1; +- if(setParaLen == validParaLen) +- calVal = pBtReq->pParamStart[1]; +- break; +- case BT_SET_THERMAL_METER: +- DBG_871X("[MPT], [BT_SET_THERMAL_METER] setParaLen =%d \n",setParaLen); +- validParaLen = 1; +- if(setParaLen == validParaLen) +- calVal = pBtReq->pParamStart[1]; +- break; +- case BT_ENABLE_CFO_TRACKING: +- DBG_871X("[MPT], [BT_ENABLE_CFO_TRACKING] setParaLen =%d \n",setParaLen); +- validParaLen = 1; +- if(setParaLen == validParaLen) +- calVal = pBtReq->pParamStart[1]; +- break; +- case BT_GSET_UPDATE_BT_PATCH: +- if(IS_HARDWARE_TYPE_8723AE(Adapter) && Adapter->bFWReady) +- { +- u1Byte i; +- DBG_8192C ("[MPT], write regs for load patch\n"); +- //BTFwPatch8723A(Adapter); +- PlatformEFIOWrite1Byte(Adapter, 0xCC, 0x2d); +- rtw_msleep_os(50); +- PlatformEFIOWrite4Byte(Adapter, 0x68, 0xa005000c); +- rtw_msleep_os(50); +- PlatformEFIOWrite4Byte(Adapter, 0x68, 0xb005000c); +- rtw_msleep_os(50); +- PlatformEFIOWrite1Byte(Adapter, 0xCC, 0x29); +- for(i=0; i<12; i++) +- rtw_msleep_os(100); +-//#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) +-// BTFwPatch8723A(Adapter); +-//#endif +- DBG_8192C("[MPT], load BT FW Patch finished!!!\n"); +- } +- break; +- default: +- { +- DBG_8192C ("[MPT], Error!! setType=%d, out of range\n", setType); +- pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- break; +- } +- if(setParaLen != validParaLen) +- { +- DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_SET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", +- setParaLen, setType, validParaLen); +- pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; +- return paraLen; +- } +- +- // +- // execute lower layer opcodes +- // +- if(BT_GSET_REG == setType) +- { +- // fill h2c parameters +- // here we should write reg value first then write the address, adviced by Austin +- btOpcode = BT_LO_OP_WRITE_REG_VALUE; +- h2cParaBuf[0] = pBtReq->pParamStart[6]; +- h2cParaBuf[1] = pBtReq->pParamStart[7]; +- h2cParaBuf[2] = pBtReq->pParamStart[8]; +- h2cParaLen = 3; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- // write reg address +- btOpcode = BT_LO_OP_WRITE_REG_ADDR; +- h2cParaBuf[0] = regType; +- h2cParaBuf[1] = pBtReq->pParamStart[2]; +- h2cParaBuf[2] = pBtReq->pParamStart[3]; +- h2cParaLen = 3; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- } +- else if(BT_GSET_RESET == setType) +- { +- btOpcode = BT_LO_OP_RESET; +- h2cParaLen = 0; +- // execute h2c and check respond c2h from bt fw is correct or not +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- } +- else if(BT_GSET_TARGET_BD_ADDR == setType) +- { +- // fill h2c parameters +- btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_L; +- h2cParaBuf[0] = pBtReq->pParamStart[1]; +- h2cParaBuf[1] = pBtReq->pParamStart[2]; +- h2cParaBuf[2] = pBtReq->pParamStart[3]; +- h2cParaLen = 3; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; +- h2cParaBuf[0] = pBtReq->pParamStart[4]; +- h2cParaBuf[1] = pBtReq->pParamStart[5]; +- h2cParaBuf[2] = pBtReq->pParamStart[6]; +- h2cParaLen = 3; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- } +- else if(BT_GSET_TX_PWR_FINETUNE == setType) +- { +- // fill h2c parameters +- btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; +- h2cParaBuf[0] = calVal; +- h2cParaLen = 1; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- } +- else if(BT_SET_TRACKING_INTERVAL == setType) +- { +- // BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, +- // BT_LO_OP_SET_THERMAL_METER = 0x23, +- // BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, +- btOpcode = BT_LO_OP_SET_TRACKING_INTERVAL; +- h2cParaBuf[0] = calVal; +- h2cParaLen = 1; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- } +- else if(BT_SET_THERMAL_METER == setType) +- { +- btOpcode = BT_LO_OP_SET_THERMAL_METER; +- h2cParaBuf[0] = calVal; +- h2cParaLen = 1; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- } +- else if(BT_ENABLE_CFO_TRACKING == setType) +- { +- btOpcode = BT_LO_OP_ENABLE_CFO_TRACKING; +- h2cParaBuf[0] = calVal; +- h2cParaLen = 1; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- } +- +- pBtRsp->status = BT_STATUS_SUCCESS; +- return paraLen; +-} +- +- +- +-u2Byte +-mptbt_BtSetTxRxPars( +- IN PADAPTER Adapter, +- IN PBT_REQ_CMD pBtReq, +- IN PBT_RSP_CMD pBtRsp +- ) +-{ +- u1Byte h2cParaBuf[6] ={0}; +- u1Byte h2cParaLen=0; +- u2Byte paraLen=0; +- u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; +- u1Byte btOpcode; +- u1Byte btOpcodeVer=0; +- PBT_TXRX_PARAMETERS pTxRxPars=(PBT_TXRX_PARAMETERS)&pBtReq->pParamStart[0]; +- u2Byte lenTxRx=sizeof(BT_TXRX_PARAMETERS); +- u1Byte i; +- u1Byte bdAddr[6]={0}; +- +- // +- // check upper layer parameters +- // +- +- // 1. check upper layer opcode version +- if(pBtReq->opCodeVer != 1) +- { +- DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); +- pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; +- return paraLen; +- } +- // 2. check upper layer parameter length +- if(pBtReq->paraLength == sizeof(BT_TXRX_PARAMETERS)) +- { +- DBG_8192C ("[MPT], pTxRxPars->txrxChannel=0x%x \n", pTxRxPars->txrxChannel); +- DBG_8192C ("[MPT], pTxRxPars->txrxTxPktCnt=0x%8x \n", pTxRxPars->txrxTxPktCnt); +- DBG_8192C ("[MPT], pTxRxPars->txrxTxPktInterval=0x%x \n", pTxRxPars->txrxTxPktInterval); +- DBG_8192C ("[MPT], pTxRxPars->txrxPayloadType=0x%x \n", pTxRxPars->txrxPayloadType); +- DBG_8192C ("[MPT], pTxRxPars->txrxPktType=0x%x \n", pTxRxPars->txrxPktType); +- DBG_8192C ("[MPT], pTxRxPars->txrxPayloadLen=0x%x \n", pTxRxPars->txrxPayloadLen); +- DBG_8192C ("[MPT], pTxRxPars->txrxPktHeader=0x%x \n", pTxRxPars->txrxPktHeader); +- DBG_8192C ("[MPT], pTxRxPars->txrxWhitenCoeff=0x%x \n", pTxRxPars->txrxWhitenCoeff); +- bdAddr[0] = pTxRxPars->txrxBdaddr[5]; +- bdAddr[1] = pTxRxPars->txrxBdaddr[4]; +- bdAddr[2] = pTxRxPars->txrxBdaddr[3]; +- bdAddr[3] = pTxRxPars->txrxBdaddr[2]; +- bdAddr[4] = pTxRxPars->txrxBdaddr[1]; +- bdAddr[5] = pTxRxPars->txrxBdaddr[0]; +- DBG_8192C ("[MPT], pTxRxPars->txrxBdaddr: %s", &bdAddr[0]); +- DBG_8192C ("[MPT], pTxRxPars->txrxTxGainIndex=0x%x \n", pTxRxPars->txrxTxGainIndex); +- } +- else +- { +- DBG_8192C ("[MPT], Error!! pBtReq->paraLength=%d, correct Len=%d\n", pBtReq->paraLength, lenTxRx); +- pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; +- return paraLen; +- } +- +- // +- // execute lower layer opcodes +- // +- +- // fill h2c parameters +- btOpcode = BT_LO_OP_SET_PKT_HEADER; +- if(pTxRxPars->txrxPktHeader > 0x3ffff) +- { +- DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPktHeader=0x%x is out of range, (should be between 0x0~0x3ffff)\n", pTxRxPars->txrxPktHeader); +- pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- else +- { +- h2cParaBuf[0] = (u1Byte)(pTxRxPars->txrxPktHeader&0xff); +- h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPktHeader&0xff00)>>8); +- h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPktHeader&0xff0000)>>16); +- h2cParaLen = 3; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- } +- +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- // fill h2c parameters +- btOpcode = BT_LO_OP_SET_PKT_TYPE_LEN; +- { +- u2Byte payloadLenLimit=0; +- switch(pTxRxPars->txrxPktType) +- { +- case MP_BT_PKT_DH1: +- payloadLenLimit = 27*8; +- break; +- case MP_BT_PKT_DH3: +- payloadLenLimit = 183*8; +- break; +- case MP_BT_PKT_DH5: +- payloadLenLimit = 339*8; +- break; +- case MP_BT_PKT_2DH1: +- payloadLenLimit = 54*8; +- break; +- case MP_BT_PKT_2DH3: +- payloadLenLimit = 367*8; +- break; +- case MP_BT_PKT_2DH5: +- payloadLenLimit = 679*8; +- break; +- case MP_BT_PKT_3DH1: +- payloadLenLimit = 83*8; +- break; +- case MP_BT_PKT_3DH3: +- payloadLenLimit = 552*8; +- break; +- case MP_BT_PKT_3DH5: +- payloadLenLimit = 1021*8; +- break; +- case MP_BT_PKT_LE: +- payloadLenLimit = 39*8; +- break; +- default: +- { +- DBG_8192C ("[MPT], Error!! Unknown pTxRxPars->txrxPktType=0x%x\n", pTxRxPars->txrxPktType); +- pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- break; +- } +- +- if(pTxRxPars->txrxPayloadLen > payloadLenLimit) +- { +- DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPayloadLen=0x%x, (should smaller than %d)\n", +- pTxRxPars->txrxPayloadLen, payloadLenLimit); +- pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- +- h2cParaBuf[0] = pTxRxPars->txrxPktType; +- h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPayloadLen&0xff)); +- h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPayloadLen&0xff00)>>8); +- h2cParaLen = 3; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- } +- +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- // fill h2c parameters +- btOpcode = BT_LO_OP_SET_PKT_CNT_L_PL_TYPE; +- if(pTxRxPars->txrxPayloadType > MP_BT_PAYLOAD_MAX) +- { +- DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPayloadType=0x%x, (should be between 0~4)\n", pTxRxPars->txrxPayloadType); +- pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- else +- { +- h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff)); +- h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff00)>>8); +- h2cParaBuf[2] = pTxRxPars->txrxPayloadType; +- h2cParaLen = 3; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- } +- +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- // fill h2c parameters +- btOpcode = BT_LO_OP_SET_PKT_CNT_H_PKT_INTV; +- if(pTxRxPars->txrxTxPktInterval > 15) +- { +- DBG_8192C ("[MPT], Error!! pTxRxPars->txrxTxPktInterval=0x%x, (should be between 0~15)\n", pTxRxPars->txrxTxPktInterval); +- pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- else +- { +- h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff0000)>>16); +- h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff000000)>>24); +- h2cParaBuf[2] = pTxRxPars->txrxTxPktInterval; +- h2cParaLen = 3; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- } +- +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- // fill h2c parameters +- btOpcode = BT_LO_OP_SET_WHITENCOEFF; +- { +- h2cParaBuf[0] = pTxRxPars->txrxWhitenCoeff; +- h2cParaLen = 1; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- } +- +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- +- // fill h2c parameters +- btOpcode = BT_LO_OP_SET_CHNL_TX_GAIN; +- if( (pTxRxPars->txrxChannel > 78) || +- (pTxRxPars->txrxTxGainIndex > 7) ) +- { +- DBG_8192C ("[MPT], Error!! pTxRxPars->txrxChannel=0x%x, (should be between 0~78)\n", pTxRxPars->txrxChannel); +- DBG_8192C ("[MPT], Error!! pTxRxPars->txrxTxGainIndex=0x%x, (should be between 0~7)\n", pTxRxPars->txrxTxGainIndex); +- pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- else +- { +- h2cParaBuf[0] = pTxRxPars->txrxChannel; +- h2cParaBuf[1] = pTxRxPars->txrxTxGainIndex; +- h2cParaLen = 2; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- } +- +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- // fill h2c parameters +- btOpcode = BT_LO_OP_SET_BD_ADDR_L; +- if( (pTxRxPars->txrxBdaddr[0]==0) && +- (pTxRxPars->txrxBdaddr[1]==0) && +- (pTxRxPars->txrxBdaddr[2]==0) && +- (pTxRxPars->txrxBdaddr[3]==0) && +- (pTxRxPars->txrxBdaddr[4]==0) && +- (pTxRxPars->txrxBdaddr[5]==0) ) +- { +- DBG_8192C ("[MPT], Error!! pTxRxPars->txrxBdaddr=all zero\n"); +- pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- if( (pTxRxPars->txrxBdaddr[0]==0xff) && +- (pTxRxPars->txrxBdaddr[1]==0xff) && +- (pTxRxPars->txrxBdaddr[2]==0xff) && +- (pTxRxPars->txrxBdaddr[3]==0xff) && +- (pTxRxPars->txrxBdaddr[4]==0xff) && +- (pTxRxPars->txrxBdaddr[5]==0xff) ) +- { +- DBG_8192C ("[MPT], Error!! pTxRxPars->txrxBdaddr=all 0xf\n"); +- pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- +- { +- h2cParaBuf[0] = pTxRxPars->txrxBdaddr[0]; +- h2cParaBuf[1] = pTxRxPars->txrxBdaddr[1]; +- h2cParaBuf[2] = pTxRxPars->txrxBdaddr[2]; +- h2cParaLen = 3; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- } +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- btOpcode = BT_LO_OP_SET_BD_ADDR_H; +- { +- h2cParaBuf[0] = pTxRxPars->txrxBdaddr[3]; +- h2cParaBuf[1] = pTxRxPars->txrxBdaddr[4]; +- h2cParaBuf[2] = pTxRxPars->txrxBdaddr[5]; +- h2cParaLen = 3; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- } +- // ckeck bt return status. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- pBtRsp->status = BT_STATUS_SUCCESS; +- return paraLen; +-} +- +- +- +-u2Byte +-mptbt_BtTestCtrl( +- IN PADAPTER Adapter, +- IN PBT_REQ_CMD pBtReq, +- IN PBT_RSP_CMD pBtRsp +- ) +-{ +- u1Byte h2cParaBuf[6] ={0}; +- u1Byte h2cParaLen=0; +- u2Byte paraLen=0; +- u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; +- u1Byte btOpcode; +- u1Byte btOpcodeVer=0; +- u1Byte testCtrl=0; +- +- // +- // check upper layer parameters +- // +- +- // 1. check upper layer opcode version +- if(pBtReq->opCodeVer != 1) +- { +- DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); +- pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; +- return paraLen; +- } +- // 2. check upper layer parameter length +- if(1 == pBtReq->paraLength) +- { +- testCtrl = pBtReq->pParamStart[0]; +- DBG_8192C("[MPT], testCtrl=%d \n", testCtrl); +- } +- else +- { +- DBG_8192C("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); +- pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; +- return paraLen; +- } +- +- // +- // execute lower layer opcodes +- // +- +- // 1. fill h2c parameters +- // check bt mode +- btOpcode = BT_LO_OP_TEST_CTRL; +- if(testCtrl >= MP_BT_TEST_MAX) +- { +- DBG_8192C("[MPT], Error!! testCtrl=0x%x, (should be between smaller or equal to 0x%x)\n", +- testCtrl, MP_BT_TEST_MAX-1); +- pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; +- return paraLen; +- } +- else +- { +- h2cParaBuf[0] = testCtrl; +- h2cParaLen = 1; +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- } +- +- // 3. construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- pBtRsp->status = BT_STATUS_SUCCESS; +- return paraLen; +-} +- +- +-u2Byte +-mptbt_TestBT( +- IN PADAPTER Adapter, +- IN PBT_REQ_CMD pBtReq, +- IN PBT_RSP_CMD pBtRsp +- ) +-{ +- +- u1Byte h2cParaBuf[6] ={0}; +- u1Byte h2cParaLen=0; +- u2Byte paraLen=0; +- u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; +- u1Byte btOpcode; +- u1Byte btOpcodeVer=0; +- u1Byte testCtrl=0; +- +- // 1. fill h2c parameters +- btOpcode = 0x11; +- h2cParaBuf[0] = 0x11; +- h2cParaBuf[1] = 0x0; +- h2cParaBuf[2] = 0x0; +- h2cParaBuf[3] = 0x0; +- h2cParaBuf[4] = 0x0; +- h2cParaLen = 1; +- // retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); +- retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, h2cParaBuf, h2cParaLen); +- +- +- // 3. construct respond status code and data. +- if(BT_STATUS_BT_OP_SUCCESS != retStatus) +- { +- pBtRsp->status = ((btOpcode<<8)|retStatus); +- DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); +- return paraLen; +- } +- +- pBtRsp->status = BT_STATUS_SUCCESS; +- return paraLen; +-} +- +-VOID +-mptbt_BtControlProcess( +- PADAPTER Adapter, +- PVOID pInBuf +- ) +-{ +- u1Byte H2C_Parameter[6] ={0}; +- PBT_H2C pH2c=(PBT_H2C)&H2C_Parameter[0]; +- PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); +- PBT_REQ_CMD pBtReq=(PBT_REQ_CMD)pInBuf; +- PBT_RSP_CMD pBtRsp; +- u1Byte i; +- +- +- DBG_8192C("[MPT], mptbt_BtControlProcess()=========>\n"); +- +- DBG_8192C("[MPT], input opCodeVer=%d\n", pBtReq->opCodeVer); +- DBG_8192C("[MPT], input OpCode=%d\n", pBtReq->OpCode); +- DBG_8192C("[MPT], paraLength=%d \n", pBtReq->paraLength); +- if(pBtReq->paraLength) +- { +- //DBG_8192C("[MPT], parameters(hex):0x%x %d \n",&pBtReq->pParamStart[0], pBtReq->paraLength); +- } +- +- _rtw_memset((void*)pMptCtx->mptOutBuf, 0, 100); +- pMptCtx->mptOutLen = 4; //length of (BT_RSP_CMD.status+BT_RSP_CMD.paraLength) +- +- pBtRsp = (PBT_RSP_CMD)pMptCtx->mptOutBuf; +- pBtRsp->status = BT_STATUS_SUCCESS; +- pBtRsp->paraLength = 0x0; +- +- // The following we should maintain the User OP codes sent by upper layer +- switch(pBtReq->OpCode) +- { +- case BT_UP_OP_BT_READY: +- DBG_8192C("[MPT], OPcode : [BT_READY]\n"); +- pBtRsp->paraLength = mptbt_BtReady(Adapter, pBtReq, pBtRsp); +- break; +- case BT_UP_OP_BT_SET_MODE: +- DBG_8192C("[MPT], OPcode : [BT_SET_MODE]\n"); +- pBtRsp->paraLength = mptbt_BtSetMode(Adapter, pBtReq, pBtRsp); +- break; +- case BT_UP_OP_BT_SET_TX_RX_PARAMETER: +- DBG_8192C("[MPT], OPcode : [BT_SET_TXRX_PARAMETER]\n"); +- pBtRsp->paraLength = mptbt_BtSetTxRxPars(Adapter, pBtReq, pBtRsp); +- break; +- case BT_UP_OP_BT_SET_GENERAL: +- DBG_8192C("[MPT], OPcode : [BT_SET_GENERAL]\n"); +- pBtRsp->paraLength = mptbt_BtSetGeneral(Adapter, pBtReq, pBtRsp); +- break; +- case BT_UP_OP_BT_GET_GENERAL: +- DBG_8192C("[MPT], OPcode : [BT_GET_GENERAL]\n"); +- pBtRsp->paraLength = mptbt_BtGetGeneral(Adapter, pBtReq, pBtRsp); +- break; +- case BT_UP_OP_BT_TEST_CTRL: +- DBG_8192C("[MPT], OPcode : [BT_TEST_CTRL]\n"); +- pBtRsp->paraLength = mptbt_BtTestCtrl(Adapter, pBtReq, pBtRsp); +- break; +- case BT_UP_OP_TEST_BT: +- DBG_8192C("[MPT], OPcode : [TEST_BT]\n"); +- pBtRsp->paraLength = mptbt_TestBT(Adapter, pBtReq, pBtRsp); +- break; +- default: +- DBG_8192C("[MPT], Error!! OPcode : UNDEFINED!!!!\n"); +- pBtRsp->status = BT_STATUS_UNKNOWN_OPCODE_U; +- pBtRsp->paraLength = 0x0; +- break; +- } +- +- pMptCtx->mptOutLen += pBtRsp->paraLength; +- +- DBG_8192C("[MPT], pMptCtx->mptOutLen=%d, pBtRsp->paraLength=%d\n", pMptCtx->mptOutLen, pBtRsp->paraLength); +- DBG_8192C("[MPT], mptbt_BtControlProcess()<=========\n"); +-} +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#include ++#include ++ ++#if defined(CONFIG_RTL8723B) ++#include ++#endif ++ ++#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) ++void MPh2c_timeout_handle(void *FunctionContext) ++{ ++ PADAPTER pAdapter; ++ PMPT_CONTEXT pMptCtx; ++ ++ ++ DBG_8192C("[MPT], MPh2c_timeout_handle \n"); ++ ++ pAdapter = (PADAPTER)FunctionContext; ++ pMptCtx = &pAdapter->mppriv.MptCtx; ++ ++ pMptCtx->bMPh2c_timeout = _TRUE; ++ ++ if ((_FALSE == pMptCtx->MptH2cRspEvent) ++ || ((_TRUE == pMptCtx->MptH2cRspEvent) ++ && (_FALSE == pMptCtx->MptBtC2hEvent))) ++ { ++ _rtw_up_sema(&pMptCtx->MPh2c_Sema); ++ } ++} ++ ++u32 WaitC2Hevent(PADAPTER pAdapter, u8 *C2H_event, u32 delay_time) ++{ ++ PMPT_CONTEXT pMptCtx=&(pAdapter->mppriv.MptCtx); ++ pMptCtx->bMPh2c_timeout=_FALSE; ++ ++ if( pAdapter->registrypriv.mp_mode == 0 ) ++ { ++ DBG_8192C("[MPT], Error!! WaitC2Hevent mp_mode == 0!!\n"); ++ return _FALSE; ++ } ++ ++ _set_timer( &pMptCtx->MPh2c_timeout_timer, delay_time ); ++ ++ _rtw_down_sema(&pMptCtx->MPh2c_Sema); ++ ++ if (pMptCtx->bMPh2c_timeout == _TRUE) ++ { ++ *C2H_event = _FALSE; ++ ++ return _FALSE; ++ } ++ ++ // for safty, cancel timer here again ++ _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); ++ ++ return _TRUE; ++} ++ ++BT_CTRL_STATUS ++mptbt_CheckC2hFrame( ++ PADAPTER Adapter, ++ PBT_H2C pH2c, ++ PBT_EXT_C2H pExtC2h ++ ) ++{ ++ BT_CTRL_STATUS c2hStatus = BT_STATUS_C2H_SUCCESS; ++ ++ //DBG_8192C("[MPT], MPT rsp C2H hex: %x %x %x %x %x %x \n"), pExtC2h , pExtC2h+1 ,pExtC2h+2 ,pExtC2h+3 ,pExtC2h+4 ,pExtC2h+5); ++ ++ DBG_8192C("[MPT], statusCode = 0x%x\n", pExtC2h->statusCode); ++ DBG_8192C("[MPT], retLen = %d\n", pExtC2h->retLen); ++ DBG_8192C("[MPT], opCodeVer : req/rsp=%d/%d\n", pH2c->opCodeVer, pExtC2h->opCodeVer); ++ DBG_8192C("[MPT], reqNum : req/rsp=%d/%d\n", pH2c->reqNum, pExtC2h->reqNum); ++ if(pExtC2h->reqNum != pH2c->reqNum) ++ { ++ c2hStatus = BT_STATUS_C2H_REQNUM_MISMATCH; ++ DBG_8192C("[MPT], Error!! C2H reqNum Mismatch!!\n"); ++ } ++ else if(pExtC2h->opCodeVer != pH2c->opCodeVer) ++ { ++ c2hStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; ++ DBG_8192C("[MPT], Error!! OPCode version L mismatch!!\n"); ++ } ++ ++ return c2hStatus; ++} ++ ++BT_CTRL_STATUS ++mptbt_SendH2c( ++ PADAPTER Adapter, ++ PBT_H2C pH2c, ++ u2Byte h2cCmdLen ++ ) ++{ ++ //KIRQL OldIrql = KeGetCurrentIrql(); ++ BT_CTRL_STATUS h2cStatus=BT_STATUS_H2C_SUCCESS; ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ u1Byte i; ++ ++ DBG_8192C("[MPT], mptbt_SendH2c()=========>\n"); ++ ++ //PlatformResetEvent(&pMptCtx->MptH2cRspEvent); ++ //PlatformResetEvent(&pMptCtx->MptBtC2hEvent); ++ ++// if(OldIrql == PASSIVE_LEVEL) ++// { ++ //RTPRINT_DATA(FMPBT, FMPBT_H2C_CONTENT, ("[MPT], MPT H2C hex: \n"), pH2c, h2cCmdLen); ++ ++ for(i=0; iMptH2cRspEvent = _FALSE; ++ pMptCtx->MptBtC2hEvent = _FALSE; ++ ++#if defined(CONFIG_RTL8723B) ++ rtl8723b_set_FwBtMpOper_cmd(Adapter, pH2c->opCode, pH2c->opCodeVer, pH2c->reqNum, pH2c->buf); ++#endif ++ pMptCtx->h2cReqNum++; ++ pMptCtx->h2cReqNum %= 16; ++ ++ if(WaitC2Hevent(Adapter, &pMptCtx->MptH2cRspEvent, 100)) ++ { ++ DBG_8192C("[MPT], Received WiFi MptH2cRspEvent!!!\n"); ++ if(WaitC2Hevent(Adapter, &pMptCtx->MptBtC2hEvent, 400)) ++ { ++ DBG_8192C("[MPT], Received MptBtC2hEvent!!!\n"); ++ break; ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!!BT MptBtC2hEvent timeout!!\n"); ++ h2cStatus = BT_STATUS_H2C_BT_NO_RSP; ++ } ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!!WiFi MptH2cRspEvent timeout!!\n"); ++ h2cStatus = BT_STATUS_H2C_TIMTOUT; ++ } ++ } ++// } ++// else ++// { ++// RT_ASSERT(FALSE, ("[MPT], mptbt_SendH2c() can only run under PASSIVE_LEVEL!!\n")); ++// h2cStatus = BT_STATUS_WRONG_LEVEL; ++// } ++ ++ DBG_8192C("[MPT], mptbt_SendH2c()<=========\n"); ++ return h2cStatus; ++} ++ ++ ++ ++BT_CTRL_STATUS ++mptbt_CheckBtRspStatus( ++ PADAPTER Adapter, ++ PBT_EXT_C2H pExtC2h ++ ) ++{ ++ BT_CTRL_STATUS retStatus=BT_OP_STATUS_SUCCESS; ++ ++ switch(pExtC2h->statusCode) ++ { ++ case BT_OP_STATUS_SUCCESS: ++ retStatus = BT_STATUS_BT_OP_SUCCESS; ++ DBG_8192C("[MPT], BT status : BT_STATUS_SUCCESS\n"); ++ break; ++ case BT_OP_STATUS_VERSION_MISMATCH: ++ retStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; ++ DBG_8192C("[MPT], BT status : BT_STATUS_OPCODE_L_VERSION_MISMATCH\n"); ++ break; ++ case BT_OP_STATUS_UNKNOWN_OPCODE: ++ retStatus = BT_STATUS_UNKNOWN_OPCODE_L; ++ DBG_8192C("[MPT], BT status : BT_STATUS_UNKNOWN_OPCODE_L\n"); ++ break; ++ case BT_OP_STATUS_ERROR_PARAMETER: ++ retStatus = BT_STATUS_PARAMETER_FORMAT_ERROR_L; ++ DBG_8192C("[MPT], BT status : BT_STATUS_PARAMETER_FORMAT_ERROR_L\n"); ++ break; ++ default: ++ retStatus = BT_STATUS_UNKNOWN_STATUS_L; ++ DBG_8192C("[MPT], BT status : BT_STATUS_UNKNOWN_STATUS_L\n"); ++ break; ++ } ++ ++ return retStatus; ++} ++ ++ ++ ++BT_CTRL_STATUS ++mptbt_BtFwOpCodeProcess( ++ PADAPTER Adapter, ++ u1Byte btFwOpCode, ++ u1Byte opCodeVer, ++ pu1Byte pH2cPar, ++ u1Byte h2cParaLen ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ PBT_H2C pH2c=(PBT_H2C)&H2C_Parameter[0]; ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; ++ u2Byte paraLen=0,i; ++ BT_CTRL_STATUS h2cStatus=BT_STATUS_H2C_SUCCESS, c2hStatus=BT_STATUS_C2H_SUCCESS; ++ BT_CTRL_STATUS retStatus=BT_STATUS_H2C_BT_NO_RSP; ++ ++ if( Adapter->registrypriv.mp_mode == 0 ) ++ { ++ DBG_8192C("[MPT], Error!! mptbt_BtFwOpCodeProces mp_mode == 0!!\n"); ++ return _FALSE; ++ } ++ ++ pH2c->opCode = btFwOpCode; ++ pH2c->opCodeVer = opCodeVer; ++ pH2c->reqNum = pMptCtx->h2cReqNum; ++ //PlatformMoveMemory(&pH2c->buf[0], pH2cPar, h2cParaLen); ++ //_rtw_memcpy(&pH2c->buf[0], pH2cPar, h2cParaLen); ++ _rtw_memcpy(pH2c->buf, pH2cPar, h2cParaLen); ++ ++ DBG_8192C("[MPT], pH2c->opCode=%d\n", pH2c->opCode); ++ DBG_8192C("[MPT], pH2c->opCodeVer=%d\n", pH2c->opCodeVer); ++ DBG_8192C("[MPT], pH2c->reqNum=%d\n", pH2c->reqNum); ++ DBG_8192C("[MPT], h2c parameter length=%d\n", h2cParaLen); ++ for (i=0; ibuf[i]); ++ } ++ ++ h2cStatus = mptbt_SendH2c(Adapter, pH2c, h2cParaLen+2); ++ if(BT_STATUS_H2C_SUCCESS == h2cStatus) ++ { ++ // if reach here, it means H2C get the correct c2h response, ++ c2hStatus = mptbt_CheckC2hFrame(Adapter, pH2c, pExtC2h); ++ if(BT_STATUS_C2H_SUCCESS == c2hStatus) ++ { ++ retStatus = mptbt_CheckBtRspStatus(Adapter, pExtC2h); ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!! C2H failed for pH2c->opCode=%d\n", pH2c->opCode); ++ // check c2h status error, return error status code to upper layer. ++ retStatus = c2hStatus; ++ } ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!! H2C failed for pH2c->opCode=%d\n", pH2c->opCode); ++ // check h2c status error, return error status code to upper layer. ++ retStatus = h2cStatus; ++ } ++ ++ return retStatus; ++} ++ ++ ++ ++ ++u2Byte ++mptbt_BtReady( ++ PADAPTER Adapter, ++ PBT_REQ_CMD pBtReq, ++ PBT_RSP_CMD pBtRsp ++ ) ++{ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; ++ u1Byte i; ++ u1Byte btFwVer=0, bdAddr[6]={0}; ++ u2Byte btRealFwVer=0; ++ pu2Byte pu2Tmp=NULL; ++ ++ // ++ // check upper layer parameters ++ // ++ ++ // 1. check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ ++ pBtRsp->pParamStart[0] = MP_BT_NOT_READY; ++ paraLen = 10; ++ // ++ // execute lower layer opcodes ++ // ++ ++ // Get BT FW version ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_GET_BT_VERSION; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ else ++ { ++ pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; ++ btRealFwVer = *pu2Tmp; ++ btFwVer = pExtC2h->buf[1]; ++ DBG_8192C("[MPT], btRealFwVer=0x%x, btFwVer=0x%x\n", btRealFwVer, btFwVer); ++ } ++ ++ // Get BD Address ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_GET_BD_ADDR_L; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ else ++ { ++ bdAddr[5] = pExtC2h->buf[0]; ++ bdAddr[4] = pExtC2h->buf[1]; ++ bdAddr[3] = pExtC2h->buf[2]; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_GET_BD_ADDR_H; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ else ++ { ++ bdAddr[2] = pExtC2h->buf[0]; ++ bdAddr[1] = pExtC2h->buf[1]; ++ bdAddr[0] = pExtC2h->buf[2]; ++ } ++ DBG_8192C("[MPT], Local BDAddr:"); ++ for(i=0; i<6; i++) ++ { ++ DBG_8192C(" 0x%x ", bdAddr[i]); ++ } ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ pBtRsp->pParamStart[0] = MP_BT_READY; ++ pu2Tmp = (pu2Byte)&pBtRsp->pParamStart[1]; ++ *pu2Tmp = btRealFwVer; ++ pBtRsp->pParamStart[3] = btFwVer; ++ for(i=0; i<6; i++) ++ { ++ pBtRsp->pParamStart[4+i] = bdAddr[5-i]; ++ } ++ ++ return paraLen; ++} ++ ++void mptbt_close_WiFiRF(PADAPTER Adapter) ++{ ++ PHY_SetBBReg(Adapter, 0x824, 0xF, 0x0); ++ PHY_SetBBReg(Adapter, 0x824, 0x700000, 0x0); ++ PHY_SetRFReg(Adapter, RF_PATH_A, 0x0, 0xF0000, 0x0); ++} ++ ++void mptbt_open_WiFiRF(PADAPTER Adapter) ++{ ++ PHY_SetBBReg(Adapter, 0x824, 0x700000, 0x3); ++ PHY_SetBBReg(Adapter, 0x824, 0xF, 0x2); ++ PHY_SetRFReg(Adapter, RF_PATH_A, 0x0, 0xF0000, 0x3); ++} ++ ++u4Byte mptbt_switch_RF(PADAPTER Adapter, u1Byte Enter) ++{ ++ u2Byte tmp_2byte = 0; ++ ++ //Enter test mode ++ if (Enter) { ++ ////1>. close WiFi RF ++ mptbt_close_WiFiRF(Adapter); ++ ++ ////2>. change ant switch to BT ++ tmp_2byte = rtw_read16(Adapter, 0x860); ++ tmp_2byte = tmp_2byte | BIT(9); ++ tmp_2byte = tmp_2byte & (~BIT(8)); ++ rtw_write16(Adapter, 0x860, tmp_2byte); ++ rtw_write16(Adapter, 0x870, 0x300); ++ } else { ++ ////1>. Open WiFi RF ++ mptbt_open_WiFiRF(Adapter); ++ ++ ////2>. change ant switch back ++ tmp_2byte = rtw_read16(Adapter, 0x860); ++ tmp_2byte = tmp_2byte | BIT(8); ++ tmp_2byte = tmp_2byte & (~BIT(9)); ++ rtw_write16(Adapter, 0x860, tmp_2byte); ++ rtw_write16(Adapter, 0x870, 0x300); ++ } ++ ++ return 0; ++} ++ ++u2Byte ++mptbt_BtSetMode( ++ PADAPTER Adapter, ++ PBT_REQ_CMD pBtReq, ++ PBT_RSP_CMD pBtRsp ++ ) ++{ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ u1Byte btModeToSet=0; ++ ++ // ++ // check upper layer parameters ++ // ++ // 1. check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ // 2. check upper layer parameter length ++ if(1 == pBtReq->paraLength) ++ { ++ btModeToSet = pBtReq->pParamStart[0]; ++ DBG_8192C("[MPT], BtTestMode=%d \n", btModeToSet); ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ ++ // ++ // execute lower layer opcodes ++ // ++ ++ // 1. fill h2c parameters ++ // check bt mode ++ btOpcode = BT_LO_OP_SET_BT_MODE; ++ if(btModeToSet >= MP_BT_MODE_MAX) ++ { ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ mptbt_switch_RF(Adapter, 1); ++ ++ h2cParaBuf[0] = btModeToSet; ++ h2cParaLen = 1; ++ // 2. execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // 3. construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS == retStatus) ++ { ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ } ++ else ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ } ++ ++ return paraLen; ++} ++ ++ ++VOID ++MPTBT_FwC2hBtMpCtrl( ++ PADAPTER Adapter, ++ pu1Byte tmpBuf, ++ u1Byte length ++ ) ++{ ++ u32 i; ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)tmpBuf; ++ ++ if(Adapter->bBTFWReady == _FALSE || Adapter->registrypriv.mp_mode == 0 ) ++ { ++ //DBG_8192C("Ignore C2H BT MP Info since not in MP mode \n"); ++ return; ++ } ++ if( length > 32 || length < 3 ) ++ { ++ DBG_8192C("\n [MPT], pExtC2h->buf hex: length=%d > 32 || < 3\n",length); ++ return; ++ } ++ ++ //cancel_timeout for h2c handle ++ _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); ++ ++ for (i=0; iextendId=0x%x\n", pExtC2h->extendId); ++ ++ switch(pExtC2h->extendId) ++ { ++ case EXT_C2H_WIFI_FW_ACTIVE_RSP: ++ DBG_8192C("[MPT], EXT_C2H_WIFI_FW_ACTIVE_RSP\n"); ++#if 0 ++ DBG_8192C("[MPT], pExtC2h->buf hex: \n"); ++ for (i=0; i<(length-3); i++) ++ { ++ DBG_8192C(" 0x%x ", pExtC2h->buf[i]); ++ } ++#endif ++ if ((_FALSE == pMptCtx->bMPh2c_timeout) ++ && (_FALSE == pMptCtx->MptH2cRspEvent)) ++ { ++ pMptCtx->MptH2cRspEvent = _TRUE; ++ _rtw_up_sema(&pMptCtx->MPh2c_Sema); ++ } ++ break; ++ ++ case EXT_C2H_TRIG_BY_BT_FW: ++ DBG_8192C("[MPT], EXT_C2H_TRIG_BY_BT_FW\n"); ++ _rtw_memcpy(&pMptCtx->c2hBuf[0], tmpBuf, length); ++ DBG_8192C("[MPT], pExtC2h->statusCode=0x%x\n", pExtC2h->statusCode); ++ DBG_8192C("[MPT], pExtC2h->retLen=0x%x\n", pExtC2h->retLen); ++ DBG_8192C("[MPT], pExtC2h->opCodeVer=0x%x\n", pExtC2h->opCodeVer); ++ DBG_8192C("[MPT], pExtC2h->reqNum=0x%x\n", pExtC2h->reqNum); ++ for (i=0; i<(length-3); i++) ++ { ++ DBG_8192C("[MPT], pExtC2h->buf[%d]=0x%02x\n", i, pExtC2h->buf[i]); ++ } ++ ++ if ((_FALSE == pMptCtx->bMPh2c_timeout) ++ && (_TRUE == pMptCtx->MptH2cRspEvent) ++ && (_FALSE == pMptCtx->MptBtC2hEvent)) ++ { ++ pMptCtx->MptBtC2hEvent = _TRUE; ++ _rtw_up_sema(&pMptCtx->MPh2c_Sema); ++ } ++ break; ++ ++ default: ++ DBG_8192C("[MPT], EXT_C2H Target not found,pExtC2h->extendId =%d ,pExtC2h->reqNum=%d\n",pExtC2h->extendId,pExtC2h->reqNum); ++ break; ++ } ++ ++ ++ ++} ++ ++ ++u2Byte ++mptbt_BtGetGeneral( ++ IN PADAPTER Adapter, ++ IN PBT_REQ_CMD pBtReq, ++ IN PBT_RSP_CMD pBtRsp ++ ) ++{ ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode, bdAddr[6]={0}; ++ u1Byte btOpcodeVer=0; ++ u1Byte getType=0, i; ++ u2Byte getParaLen=0, validParaLen=0; ++ u1Byte regType=0, reportType=0; ++ u4Byte regAddr=0, regValue=0; ++ pu4Byte pu4Tmp; ++ pu2Byte pu2Tmp; ++ pu1Byte pu1Tmp; ++ ++ // ++ // check upper layer parameters ++ // ++ ++ // check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ // check upper layer parameter length ++ if(pBtReq->paraLength < 1) ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ getParaLen = pBtReq->paraLength - 1; ++ getType = pBtReq->pParamStart[0]; ++ ++ DBG_8192C("[MPT], getType=%d, getParaLen=%d\n", getType, getParaLen); ++ ++ // check parameter first ++ switch(getType) ++ { ++ case BT_GGET_REG: ++ DBG_8192C("[MPT], [BT_GGET_REG]\n"); ++ validParaLen = 5; ++ if(getParaLen == validParaLen) ++ { ++ btOpcode = BT_LO_OP_READ_REG; ++ regType = pBtReq->pParamStart[1]; ++ pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; ++ regAddr = *pu4Tmp; ++ DBG_8192C("[MPT], BT_GGET_REG regType=0x%02x, regAddr=0x%08x!!\n", ++ regType, regAddr); ++ if(regType >= BT_REG_MAX) ++ { ++ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) || ++ ((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) || ++ ((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) || ++ ((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) || ++ ((BT_REG_LE==regType)&&(regAddr>0xfff)) ) ++ { ++ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ } ++ } ++ break; ++ case BT_GGET_STATUS: ++ DBG_8192C("[MPT], [BT_GGET_STATUS]\n"); ++ validParaLen = 0; ++ break; ++ case BT_GGET_REPORT: ++ DBG_8192C("[MPT], [BT_GGET_REPORT]\n"); ++ validParaLen = 1; ++ if(getParaLen == validParaLen) ++ { ++ reportType = pBtReq->pParamStart[1]; ++ DBG_8192C("[MPT], BT_GGET_REPORT reportType=0x%x!!\n", reportType); ++ if(reportType >= BT_REPORT_MAX) ++ { ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ } ++ break; ++ default: ++ { ++ DBG_8192C("[MPT], Error!! getType=%d, out of range\n", getType); ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ break; ++ } ++ if(getParaLen != validParaLen) ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_GET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", ++ getParaLen, getType, validParaLen); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ ++ // ++ // execute lower layer opcodes ++ // ++ if(BT_GGET_REG == getType) ++ { ++ // fill h2c parameters ++ // here we should write reg value first then write the address, adviced by Austin ++ btOpcode = BT_LO_OP_READ_REG; ++ h2cParaBuf[0] = regType; ++ h2cParaBuf[1] = pBtReq->pParamStart[2]; ++ h2cParaBuf[2] = pBtReq->pParamStart[3]; ++ h2cParaLen = 3; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; ++ regValue = *pu2Tmp; ++ DBG_8192C("[MPT], read reg regType=0x%02x, regAddr=0x%08x, regValue=0x%04x\n", ++ regType, regAddr, regValue); ++ ++ pu4Tmp = (pu4Byte)&pBtRsp->pParamStart[0]; ++ *pu4Tmp = regValue; ++ paraLen = 4; ++ } ++ else if(BT_GGET_STATUS == getType) ++ { ++ btOpcode = BT_LO_OP_GET_BT_STATUS; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; ++ DBG_8192C("[MPT], read bt status, testMode=0x%x, testStatus=0x%x\n", ++ pBtRsp->pParamStart[0], pBtRsp->pParamStart[1]); ++ paraLen = 2; ++ } ++ else if(BT_GGET_REPORT == getType) ++ { ++ switch(reportType) ++ { ++ case BT_REPORT_RX_PACKET_CNT: ++ { ++ DBG_8192C("[MPT], [Rx Packet Counts]\n"); ++ btOpcode = BT_LO_OP_GET_RX_PKT_CNT_L; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; ++ ++ btOpcode = BT_LO_OP_GET_RX_PKT_CNT_H; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; ++ paraLen = 4; ++ } ++ break; ++ case BT_REPORT_RX_ERROR_BITS: ++ { ++ DBG_8192C("[MPT], [Rx Error Bits]\n"); ++ btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_L; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; ++ ++ btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_H; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; ++ paraLen = 4; ++ } ++ break; ++ case BT_REPORT_RSSI: ++ { ++ DBG_8192C("[MPT], [RSSI]\n"); ++ btOpcode = BT_LO_OP_GET_RSSI; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; ++ paraLen = 2; ++ } ++ break; ++ case BT_REPORT_CFO_HDR_QUALITY: ++ { ++ DBG_8192C("[MPT], [CFO & Header Quality]\n"); ++ btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_L; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; ++ ++ btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_H; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; ++ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; ++ paraLen = 4; ++ } ++ break; ++ case BT_REPORT_CONNECT_TARGET_BD_ADDR: ++ { ++ DBG_8192C("[MPT], [Connected Target BD ADDR]\n"); ++ btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_L; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ bdAddr[5] = pExtC2h->buf[0]; ++ bdAddr[4] = pExtC2h->buf[1]; ++ bdAddr[3] = pExtC2h->buf[2]; ++ ++ btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_H; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ bdAddr[2] = pExtC2h->buf[0]; ++ bdAddr[1] = pExtC2h->buf[1]; ++ bdAddr[0] = pExtC2h->buf[2]; ++ ++ DBG_8192C("[MPT], Connected Target BDAddr:%s", bdAddr); ++ for(i=0; i<6; i++) ++ { ++ pBtRsp->pParamStart[i] = bdAddr[5-i]; ++ } ++ paraLen = 6; ++ } ++ break; ++ default: ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ break; ++ } ++ } ++ ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ return paraLen; ++} ++ ++ ++ ++u2Byte ++mptbt_BtSetGeneral( ++ IN PADAPTER Adapter, ++ IN PBT_REQ_CMD pBtReq, ++ IN PBT_RSP_CMD pBtRsp ++ ) ++{ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ u1Byte setType=0; ++ u2Byte setParaLen=0, validParaLen=0; ++ u1Byte regType=0, bdAddr[6]={0}, calVal=0; ++ u4Byte regAddr=0, regValue=0; ++ pu4Byte pu4Tmp; ++ pu2Byte pu2Tmp; ++ pu1Byte pu1Tmp; ++ ++ // ++ // check upper layer parameters ++ // ++ ++ // check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ // check upper layer parameter length ++ if(pBtReq->paraLength < 1) ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ setParaLen = pBtReq->paraLength - 1; ++ setType = pBtReq->pParamStart[0]; ++ ++ DBG_8192C("[MPT], setType=%d, setParaLen=%d\n", setType, setParaLen); ++ ++ // check parameter first ++ switch(setType) ++ { ++ case BT_GSET_REG: ++ DBG_8192C ("[MPT], [BT_GSET_REG]\n"); ++ validParaLen = 9; ++ if(setParaLen == validParaLen) ++ { ++ btOpcode = BT_LO_OP_WRITE_REG_VALUE; ++ regType = pBtReq->pParamStart[1]; ++ pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; ++ regAddr = *pu4Tmp; ++ pu4Tmp = (pu4Byte)&pBtReq->pParamStart[6]; ++ regValue = *pu4Tmp; ++ DBG_8192C("[MPT], BT_GSET_REG regType=0x%x, regAddr=0x%x, regValue=0x%x!!\n", ++ regType, regAddr, regValue); ++ if(regType >= BT_REG_MAX) ++ { ++ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) || ++ ((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) || ++ ((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) || ++ ((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) || ++ ((BT_REG_LE==regType)&&(regAddr>0xfff)) ) ++ { ++ pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ } ++ } ++ break; ++ case BT_GSET_RESET: ++ DBG_8192C("[MPT], [BT_GSET_RESET]\n"); ++ validParaLen = 0; ++ break; ++ case BT_GSET_TARGET_BD_ADDR: ++ DBG_8192C("[MPT], [BT_GSET_TARGET_BD_ADDR]\n"); ++ validParaLen = 6; ++ if(setParaLen == validParaLen) ++ { ++ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; ++ if( (pBtReq->pParamStart[1]==0) && ++ (pBtReq->pParamStart[2]==0) && ++ (pBtReq->pParamStart[3]==0) && ++ (pBtReq->pParamStart[4]==0) && ++ (pBtReq->pParamStart[5]==0) && ++ (pBtReq->pParamStart[6]==0) ) ++ { ++ DBG_8192C("[MPT], Error!! targetBDAddr=all zero\n"); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ if( (pBtReq->pParamStart[1]==0xff) && ++ (pBtReq->pParamStart[2]==0xff) && ++ (pBtReq->pParamStart[3]==0xff) && ++ (pBtReq->pParamStart[4]==0xff) && ++ (pBtReq->pParamStart[5]==0xff) && ++ (pBtReq->pParamStart[6]==0xff) ) ++ { ++ DBG_8192C("[MPT], Error!! targetBDAddr=all 0xf\n"); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ bdAddr[0] = pBtReq->pParamStart[6]; ++ bdAddr[1] = pBtReq->pParamStart[5]; ++ bdAddr[2] = pBtReq->pParamStart[4]; ++ bdAddr[3] = pBtReq->pParamStart[3]; ++ bdAddr[4] = pBtReq->pParamStart[2]; ++ bdAddr[5] = pBtReq->pParamStart[1]; ++ DBG_8192C ("[MPT], target BDAddr:%x,%x,%x,%x,%x,%x\n", ++ bdAddr[0],bdAddr[1],bdAddr[2],bdAddr[3],bdAddr[4],bdAddr[5]); ++ } ++ break; ++ case BT_GSET_TX_PWR_FINETUNE: ++ DBG_8192C("[MPT], [BT_GSET_TX_PWR_FINETUNE]\n"); ++ validParaLen = 1; ++ if(setParaLen == validParaLen) ++ { ++ btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; ++ calVal = pBtReq->pParamStart[1]; ++ if( (calVal<1) || (calVal>9) ) ++ { ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ DBG_8192C ("[MPT], calVal=%d\n", calVal); ++ } ++ break; ++ case BT_SET_TRACKING_INTERVAL: ++ DBG_871X("[MPT], [BT_SET_TRACKING_INTERVAL] setParaLen =%d \n",setParaLen); ++ ++ validParaLen = 1; ++ if(setParaLen == validParaLen) ++ calVal = pBtReq->pParamStart[1]; ++ break; ++ case BT_SET_THERMAL_METER: ++ DBG_871X("[MPT], [BT_SET_THERMAL_METER] setParaLen =%d \n",setParaLen); ++ validParaLen = 1; ++ if(setParaLen == validParaLen) ++ calVal = pBtReq->pParamStart[1]; ++ break; ++ case BT_ENABLE_CFO_TRACKING: ++ DBG_871X("[MPT], [BT_ENABLE_CFO_TRACKING] setParaLen =%d \n",setParaLen); ++ validParaLen = 1; ++ if(setParaLen == validParaLen) ++ calVal = pBtReq->pParamStart[1]; ++ break; ++ case BT_GSET_UPDATE_BT_PATCH: ++ ++ break; ++ default: ++ { ++ DBG_8192C ("[MPT], Error!! setType=%d, out of range\n", setType); ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ break; ++ } ++ if(setParaLen != validParaLen) ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_SET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", ++ setParaLen, setType, validParaLen); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ ++ // ++ // execute lower layer opcodes ++ // ++ if(BT_GSET_REG == setType) ++ { ++ // fill h2c parameters ++ // here we should write reg value first then write the address, adviced by Austin ++ btOpcode = BT_LO_OP_WRITE_REG_VALUE; ++ h2cParaBuf[0] = pBtReq->pParamStart[6]; ++ h2cParaBuf[1] = pBtReq->pParamStart[7]; ++ h2cParaBuf[2] = pBtReq->pParamStart[8]; ++ h2cParaLen = 3; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // write reg address ++ btOpcode = BT_LO_OP_WRITE_REG_ADDR; ++ h2cParaBuf[0] = regType; ++ h2cParaBuf[1] = pBtReq->pParamStart[2]; ++ h2cParaBuf[2] = pBtReq->pParamStart[3]; ++ h2cParaLen = 3; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_GSET_RESET == setType) ++ { ++ btOpcode = BT_LO_OP_RESET; ++ h2cParaLen = 0; ++ // execute h2c and check respond c2h from bt fw is correct or not ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_GSET_TARGET_BD_ADDR == setType) ++ { ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_L; ++ h2cParaBuf[0] = pBtReq->pParamStart[1]; ++ h2cParaBuf[1] = pBtReq->pParamStart[2]; ++ h2cParaBuf[2] = pBtReq->pParamStart[3]; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; ++ h2cParaBuf[0] = pBtReq->pParamStart[4]; ++ h2cParaBuf[1] = pBtReq->pParamStart[5]; ++ h2cParaBuf[2] = pBtReq->pParamStart[6]; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_GSET_TX_PWR_FINETUNE == setType) ++ { ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; ++ h2cParaBuf[0] = calVal; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_SET_TRACKING_INTERVAL == setType) ++ { ++ // BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, ++ // BT_LO_OP_SET_THERMAL_METER = 0x23, ++ // BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, ++ btOpcode = BT_LO_OP_SET_TRACKING_INTERVAL; ++ h2cParaBuf[0] = calVal; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_SET_THERMAL_METER == setType) ++ { ++ btOpcode = BT_LO_OP_SET_THERMAL_METER; ++ h2cParaBuf[0] = calVal; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ else if(BT_ENABLE_CFO_TRACKING == setType) ++ { ++ btOpcode = BT_LO_OP_ENABLE_CFO_TRACKING; ++ h2cParaBuf[0] = calVal; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ } ++ ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ return paraLen; ++} ++ ++ ++ ++u2Byte ++mptbt_BtSetTxRxPars( ++ IN PADAPTER Adapter, ++ IN PBT_REQ_CMD pBtReq, ++ IN PBT_RSP_CMD pBtRsp ++ ) ++{ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ PBT_TXRX_PARAMETERS pTxRxPars=(PBT_TXRX_PARAMETERS)&pBtReq->pParamStart[0]; ++ u2Byte lenTxRx=sizeof(BT_TXRX_PARAMETERS); ++ u1Byte i; ++ u1Byte bdAddr[6]={0}; ++ ++ // ++ // check upper layer parameters ++ // ++ ++ // 1. check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ // 2. check upper layer parameter length ++ if(pBtReq->paraLength == sizeof(BT_TXRX_PARAMETERS)) ++ { ++ DBG_8192C ("[MPT], pTxRxPars->txrxChannel=0x%x \n", pTxRxPars->txrxChannel); ++ DBG_8192C ("[MPT], pTxRxPars->txrxTxPktCnt=0x%8x \n", pTxRxPars->txrxTxPktCnt); ++ DBG_8192C ("[MPT], pTxRxPars->txrxTxPktInterval=0x%x \n", pTxRxPars->txrxTxPktInterval); ++ DBG_8192C ("[MPT], pTxRxPars->txrxPayloadType=0x%x \n", pTxRxPars->txrxPayloadType); ++ DBG_8192C ("[MPT], pTxRxPars->txrxPktType=0x%x \n", pTxRxPars->txrxPktType); ++ DBG_8192C ("[MPT], pTxRxPars->txrxPayloadLen=0x%x \n", pTxRxPars->txrxPayloadLen); ++ DBG_8192C ("[MPT], pTxRxPars->txrxPktHeader=0x%x \n", pTxRxPars->txrxPktHeader); ++ DBG_8192C ("[MPT], pTxRxPars->txrxWhitenCoeff=0x%x \n", pTxRxPars->txrxWhitenCoeff); ++ bdAddr[0] = pTxRxPars->txrxBdaddr[5]; ++ bdAddr[1] = pTxRxPars->txrxBdaddr[4]; ++ bdAddr[2] = pTxRxPars->txrxBdaddr[3]; ++ bdAddr[3] = pTxRxPars->txrxBdaddr[2]; ++ bdAddr[4] = pTxRxPars->txrxBdaddr[1]; ++ bdAddr[5] = pTxRxPars->txrxBdaddr[0]; ++ DBG_8192C ("[MPT], pTxRxPars->txrxBdaddr: %s", &bdAddr[0]); ++ DBG_8192C ("[MPT], pTxRxPars->txrxTxGainIndex=0x%x \n", pTxRxPars->txrxTxGainIndex); ++ } ++ else ++ { ++ DBG_8192C ("[MPT], Error!! pBtReq->paraLength=%d, correct Len=%d\n", pBtReq->paraLength, lenTxRx); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ ++ // ++ // execute lower layer opcodes ++ // ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_PKT_HEADER; ++ if(pTxRxPars->txrxPktHeader > 0x3ffff) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPktHeader=0x%x is out of range, (should be between 0x0~0x3ffff)\n", pTxRxPars->txrxPktHeader); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ h2cParaBuf[0] = (u1Byte)(pTxRxPars->txrxPktHeader&0xff); ++ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPktHeader&0xff00)>>8); ++ h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPktHeader&0xff0000)>>16); ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_PKT_TYPE_LEN; ++ { ++ u2Byte payloadLenLimit=0; ++ switch(pTxRxPars->txrxPktType) ++ { ++ case MP_BT_PKT_DH1: ++ payloadLenLimit = 27*8; ++ break; ++ case MP_BT_PKT_DH3: ++ payloadLenLimit = 183*8; ++ break; ++ case MP_BT_PKT_DH5: ++ payloadLenLimit = 339*8; ++ break; ++ case MP_BT_PKT_2DH1: ++ payloadLenLimit = 54*8; ++ break; ++ case MP_BT_PKT_2DH3: ++ payloadLenLimit = 367*8; ++ break; ++ case MP_BT_PKT_2DH5: ++ payloadLenLimit = 679*8; ++ break; ++ case MP_BT_PKT_3DH1: ++ payloadLenLimit = 83*8; ++ break; ++ case MP_BT_PKT_3DH3: ++ payloadLenLimit = 552*8; ++ break; ++ case MP_BT_PKT_3DH5: ++ payloadLenLimit = 1021*8; ++ break; ++ case MP_BT_PKT_LE: ++ payloadLenLimit = 39*8; ++ break; ++ default: ++ { ++ DBG_8192C ("[MPT], Error!! Unknown pTxRxPars->txrxPktType=0x%x\n", pTxRxPars->txrxPktType); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ break; ++ } ++ ++ if(pTxRxPars->txrxPayloadLen > payloadLenLimit) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPayloadLen=0x%x, (should smaller than %d)\n", ++ pTxRxPars->txrxPayloadLen, payloadLenLimit); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ ++ h2cParaBuf[0] = pTxRxPars->txrxPktType; ++ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPayloadLen&0xff)); ++ h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPayloadLen&0xff00)>>8); ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_PKT_CNT_L_PL_TYPE; ++ if(pTxRxPars->txrxPayloadType > MP_BT_PAYLOAD_MAX) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPayloadType=0x%x, (should be between 0~4)\n", pTxRxPars->txrxPayloadType); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff)); ++ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff00)>>8); ++ h2cParaBuf[2] = pTxRxPars->txrxPayloadType; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_PKT_CNT_H_PKT_INTV; ++ if(pTxRxPars->txrxTxPktInterval > 15) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxTxPktInterval=0x%x, (should be between 0~15)\n", pTxRxPars->txrxTxPktInterval); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff0000)>>16); ++ h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff000000)>>24); ++ h2cParaBuf[2] = pTxRxPars->txrxTxPktInterval; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_WHITENCOEFF; ++ { ++ h2cParaBuf[0] = pTxRxPars->txrxWhitenCoeff; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_CHNL_TX_GAIN; ++ if( (pTxRxPars->txrxChannel > 78) || ++ (pTxRxPars->txrxTxGainIndex > 7) ) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxChannel=0x%x, (should be between 0~78)\n", pTxRxPars->txrxChannel); ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxTxGainIndex=0x%x, (should be between 0~7)\n", pTxRxPars->txrxTxGainIndex); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ h2cParaBuf[0] = pTxRxPars->txrxChannel; ++ h2cParaBuf[1] = pTxRxPars->txrxTxGainIndex; ++ h2cParaLen = 2; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ // fill h2c parameters ++ btOpcode = BT_LO_OP_SET_BD_ADDR_L; ++ if( (pTxRxPars->txrxBdaddr[0]==0) && ++ (pTxRxPars->txrxBdaddr[1]==0) && ++ (pTxRxPars->txrxBdaddr[2]==0) && ++ (pTxRxPars->txrxBdaddr[3]==0) && ++ (pTxRxPars->txrxBdaddr[4]==0) && ++ (pTxRxPars->txrxBdaddr[5]==0) ) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxBdaddr=all zero\n"); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ if( (pTxRxPars->txrxBdaddr[0]==0xff) && ++ (pTxRxPars->txrxBdaddr[1]==0xff) && ++ (pTxRxPars->txrxBdaddr[2]==0xff) && ++ (pTxRxPars->txrxBdaddr[3]==0xff) && ++ (pTxRxPars->txrxBdaddr[4]==0xff) && ++ (pTxRxPars->txrxBdaddr[5]==0xff) ) ++ { ++ DBG_8192C ("[MPT], Error!! pTxRxPars->txrxBdaddr=all 0xf\n"); ++ pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ ++ { ++ h2cParaBuf[0] = pTxRxPars->txrxBdaddr[0]; ++ h2cParaBuf[1] = pTxRxPars->txrxBdaddr[1]; ++ h2cParaBuf[2] = pTxRxPars->txrxBdaddr[2]; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ btOpcode = BT_LO_OP_SET_BD_ADDR_H; ++ { ++ h2cParaBuf[0] = pTxRxPars->txrxBdaddr[3]; ++ h2cParaBuf[1] = pTxRxPars->txrxBdaddr[4]; ++ h2cParaBuf[2] = pTxRxPars->txrxBdaddr[5]; ++ h2cParaLen = 3; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ // ckeck bt return status. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ return paraLen; ++} ++ ++ ++ ++u2Byte ++mptbt_BtTestCtrl( ++ IN PADAPTER Adapter, ++ IN PBT_REQ_CMD pBtReq, ++ IN PBT_RSP_CMD pBtRsp ++ ) ++{ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ u1Byte testCtrl=0; ++ ++ // ++ // check upper layer parameters ++ // ++ ++ // 1. check upper layer opcode version ++ if(pBtReq->opCodeVer != 1) ++ { ++ DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); ++ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; ++ return paraLen; ++ } ++ // 2. check upper layer parameter length ++ if(1 == pBtReq->paraLength) ++ { ++ testCtrl = pBtReq->pParamStart[0]; ++ DBG_8192C("[MPT], testCtrl=%d \n", testCtrl); ++ } ++ else ++ { ++ DBG_8192C("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); ++ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; ++ return paraLen; ++ } ++ ++ // ++ // execute lower layer opcodes ++ // ++ ++ // 1. fill h2c parameters ++ // check bt mode ++ btOpcode = BT_LO_OP_TEST_CTRL; ++ if(testCtrl >= MP_BT_TEST_MAX) ++ { ++ DBG_8192C("[MPT], Error!! testCtrl=0x%x, (should be between smaller or equal to 0x%x)\n", ++ testCtrl, MP_BT_TEST_MAX-1); ++ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; ++ return paraLen; ++ } ++ else ++ { ++ h2cParaBuf[0] = testCtrl; ++ h2cParaLen = 1; ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ } ++ ++ // 3. construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ return paraLen; ++} ++ ++ ++u2Byte ++mptbt_TestBT( ++ IN PADAPTER Adapter, ++ IN PBT_REQ_CMD pBtReq, ++ IN PBT_RSP_CMD pBtRsp ++ ) ++{ ++ ++ u1Byte h2cParaBuf[6] ={0}; ++ u1Byte h2cParaLen=0; ++ u2Byte paraLen=0; ++ u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; ++ u1Byte btOpcode; ++ u1Byte btOpcodeVer=0; ++ u1Byte testCtrl=0; ++ ++ // 1. fill h2c parameters ++ btOpcode = 0x11; ++ h2cParaBuf[0] = 0x11; ++ h2cParaBuf[1] = 0x0; ++ h2cParaBuf[2] = 0x0; ++ h2cParaBuf[3] = 0x0; ++ h2cParaBuf[4] = 0x0; ++ h2cParaLen = 1; ++ // retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); ++ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, h2cParaBuf, h2cParaLen); ++ ++ ++ // 3. construct respond status code and data. ++ if(BT_STATUS_BT_OP_SUCCESS != retStatus) ++ { ++ pBtRsp->status = ((btOpcode<<8)|retStatus); ++ DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); ++ return paraLen; ++ } ++ ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ return paraLen; ++} ++ ++VOID ++mptbt_BtControlProcess( ++ PADAPTER Adapter, ++ PVOID pInBuf ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ PBT_H2C pH2c=(PBT_H2C)&H2C_Parameter[0]; ++ PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); ++ PBT_REQ_CMD pBtReq=(PBT_REQ_CMD)pInBuf; ++ PBT_RSP_CMD pBtRsp; ++ u1Byte i; ++ ++ ++ DBG_8192C("[MPT], mptbt_BtControlProcess()=========>\n"); ++ ++ DBG_8192C("[MPT], input opCodeVer=%d\n", pBtReq->opCodeVer); ++ DBG_8192C("[MPT], input OpCode=%d\n", pBtReq->OpCode); ++ DBG_8192C("[MPT], paraLength=%d \n", pBtReq->paraLength); ++ if(pBtReq->paraLength) ++ { ++ //DBG_8192C("[MPT], parameters(hex):0x%x %d \n",&pBtReq->pParamStart[0], pBtReq->paraLength); ++ } ++ ++ _rtw_memset((void*)pMptCtx->mptOutBuf, 0, 100); ++ pMptCtx->mptOutLen = 4; //length of (BT_RSP_CMD.status+BT_RSP_CMD.paraLength) ++ ++ pBtRsp = (PBT_RSP_CMD)pMptCtx->mptOutBuf; ++ pBtRsp->status = BT_STATUS_SUCCESS; ++ pBtRsp->paraLength = 0x0; ++ ++ // The following we should maintain the User OP codes sent by upper layer ++ switch(pBtReq->OpCode) ++ { ++ case BT_UP_OP_BT_READY: ++ DBG_8192C("[MPT], OPcode : [BT_READY]\n"); ++ pBtRsp->paraLength = mptbt_BtReady(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_BT_SET_MODE: ++ DBG_8192C("[MPT], OPcode : [BT_SET_MODE]\n"); ++ pBtRsp->paraLength = mptbt_BtSetMode(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_BT_SET_TX_RX_PARAMETER: ++ DBG_8192C("[MPT], OPcode : [BT_SET_TXRX_PARAMETER]\n"); ++ pBtRsp->paraLength = mptbt_BtSetTxRxPars(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_BT_SET_GENERAL: ++ DBG_8192C("[MPT], OPcode : [BT_SET_GENERAL]\n"); ++ pBtRsp->paraLength = mptbt_BtSetGeneral(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_BT_GET_GENERAL: ++ DBG_8192C("[MPT], OPcode : [BT_GET_GENERAL]\n"); ++ pBtRsp->paraLength = mptbt_BtGetGeneral(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_BT_TEST_CTRL: ++ DBG_8192C("[MPT], OPcode : [BT_TEST_CTRL]\n"); ++ pBtRsp->paraLength = mptbt_BtTestCtrl(Adapter, pBtReq, pBtRsp); ++ break; ++ case BT_UP_OP_TEST_BT: ++ DBG_8192C("[MPT], OPcode : [TEST_BT]\n"); ++ pBtRsp->paraLength = mptbt_TestBT(Adapter, pBtReq, pBtRsp); ++ break; ++ default: ++ DBG_8192C("[MPT], Error!! OPcode : UNDEFINED!!!!\n"); ++ pBtRsp->status = BT_STATUS_UNKNOWN_OPCODE_U; ++ pBtRsp->paraLength = 0x0; ++ break; ++ } ++ ++ pMptCtx->mptOutLen += pBtRsp->paraLength; ++ ++ DBG_8192C("[MPT], pMptCtx->mptOutLen=%d, pBtRsp->paraLength=%d\n", pMptCtx->mptOutLen, pBtRsp->paraLength); ++ DBG_8192C("[MPT], mptbt_BtControlProcess()<=========\n"); ++} ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_btcoex.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_btcoex.c +old mode 100755 +new mode 100644 +index 157b875..aafdd72 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_btcoex.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_btcoex.c +@@ -19,8 +19,9 @@ + ******************************************************************************/ + #ifdef CONFIG_BT_COEXIST + +-#include ++#include + #include ++#include + + + void rtw_btcoex_Initialize(PADAPTER padapter) +@@ -45,16 +46,38 @@ void rtw_btcoex_HAL_Initialize(PADAPTER padapter, u8 bWifiOnly) + + void rtw_btcoex_IpsNotify(PADAPTER padapter, u8 type) + { ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ + hal_btcoex_IpsNotify(padapter, type); + } + + void rtw_btcoex_LpsNotify(PADAPTER padapter, u8 type) + { ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ + hal_btcoex_LpsNotify(padapter, type); + } + + void rtw_btcoex_ScanNotify(PADAPTER padapter, u8 type) + { ++ PHAL_DATA_TYPE pHalData; ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ struct bt_coex_info *pcoex_info = &padapter->coex_info; ++ PBT_MGNT pBtMgnt=&pcoex_info->BtMgnt; ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ + #ifdef CONFIG_CONCURRENT_MODE + if ((_FALSE == type) && (padapter->pbuddy_adapter)) + { +@@ -64,11 +87,22 @@ void rtw_btcoex_ScanNotify(PADAPTER padapter, u8 type) + } + #endif + ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ if(pBtMgnt->ExtConfig.bEnableWifiScanNotify) ++ rtw_btcoex_SendScanNotify(padapter, type); ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX ++ + hal_btcoex_ScanNotify(padapter, type); + } + + void rtw_btcoex_ConnectNotify(PADAPTER padapter, u8 action) + { ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ + #ifdef DBG_CONFIG_ERROR_RESET + if (_TRUE == rtw_hal_sreset_inprogress(padapter)) + { +@@ -92,6 +126,12 @@ void rtw_btcoex_ConnectNotify(PADAPTER padapter, u8 action) + + void rtw_btcoex_MediaStatusNotify(PADAPTER padapter, u8 mediaStatus) + { ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ + #ifdef DBG_CONFIG_ERROR_RESET + if (_TRUE == rtw_hal_sreset_inprogress(padapter)) + { +@@ -121,26 +161,70 @@ void rtw_btcoex_MediaStatusNotify(PADAPTER padapter, u8 mediaStatus) + + void rtw_btcoex_SpecialPacketNotify(PADAPTER padapter, u8 pktType) + { ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ + hal_btcoex_SpecialPacketNotify(padapter, pktType); + } + + void rtw_btcoex_IQKNotify(PADAPTER padapter, u8 state) + { ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ + hal_btcoex_IQKNotify(padapter, state); + } + + void rtw_btcoex_BtInfoNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) + { ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ + hal_btcoex_BtInfoNotify(padapter, length, tmpBuf); + } + ++void rtw_btcoex_BtMpRptNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) ++{ ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ ++ if (padapter->registrypriv.mp_mode == 1) ++ return; ++ ++ hal_btcoex_BtMpRptNotify(padapter, length, tmpBuf); ++} ++ + void rtw_btcoex_SuspendNotify(PADAPTER padapter, u8 state) + { ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ + hal_btcoex_SuspendNotify(padapter, state); + } + + void rtw_btcoex_HaltNotify(PADAPTER padapter) + { ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ + if (_FALSE == padapter->bup) + { + DBG_871X(FUNC_ADPT_FMT ": bup=%d Skip!\n", +@@ -149,10 +233,9 @@ void rtw_btcoex_HaltNotify(PADAPTER padapter) + return; + } + +- if (_TRUE == padapter->bSurpriseRemoved) +- { +- DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=%d Skip!\n", +- FUNC_ADPT_ARG(padapter), padapter->bSurpriseRemoved); ++ if (rtw_is_surprise_removed(padapter)) { ++ DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=%s Skip!\n", ++ FUNC_ADPT_ARG(padapter), rtw_is_surprise_removed(padapter)?"True":"False"); + + return; + } +@@ -160,6 +243,17 @@ void rtw_btcoex_HaltNotify(PADAPTER padapter) + hal_btcoex_HaltNotify(padapter); + } + ++void rtw_btcoex_ScoreBoardStatusNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) ++{ ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ ++ hal_btcoex_ScoreBoardStatusNotify(padapter, length, tmpBuf); ++} ++ + void rtw_btcoex_SwitchBtTRxMask(PADAPTER padapter) + { + hal_btcoex_SwitchBtTRxMask(padapter); +@@ -177,14 +271,32 @@ u8 rtw_btcoex_IsBtDisabled(PADAPTER padapter) + + void rtw_btcoex_Handler(PADAPTER padapter) + { ++ PHAL_DATA_TYPE pHalData; ++ ++ pHalData = GET_HAL_DATA(padapter); ++ ++ if (_FALSE == pHalData->EEPROMBluetoothCoexist) ++ return; ++ + #if defined(CONFIG_CONCURRENT_MODE) + if (padapter->adapter_type != PRIMARY_ADAPTER) + return; + #endif + ++ ++ + hal_btcoex_Hanlder(padapter); + } + ++s32 rtw_btcoex_IsBTCoexRejectAMPDU(PADAPTER padapter) ++{ ++ s32 coexctrl; ++ ++ coexctrl = hal_btcoex_IsBTCoexRejectAMPDU(padapter); ++ ++ return coexctrl; ++} ++ + s32 rtw_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER padapter) + { + s32 coexctrl; +@@ -300,64 +412,32 @@ u8 rtw_btcoex_IsBtLinkExist(PADAPTER padapter) + return hal_btcoex_IsBtLinkExist(padapter); + } + ++void rtw_btcoex_SetBtPatchVersion(PADAPTER padapter,u16 btHciVer, u16 btPatchVer) ++{ ++ hal_btcoex_SetBtPatchVersion(padapter,btHciVer,btPatchVer); ++} ++ ++void rtw_btcoex_SetHciVersion(PADAPTER padapter, u16 hciVersion) ++{ ++ hal_btcoex_SetHciVersion(padapter, hciVersion); ++} ++ ++void rtw_btcoex_StackUpdateProfileInfo(void) ++{ ++ hal_btcoex_StackUpdateProfileInfo(); ++} ++ ++void rtw_btcoex_BTOffOnNotify(PADAPTER padapter, u8 bBTON) ++{ ++ hal_btcoex_BTOffOnNotify(padapter, bBTON); ++} ++ + // ================================================== + // Below Functions are called by BT-Coex + // ================================================== +-void rtw_btcoex_RejectApAggregatedPacket(PADAPTER padapter, u8 enable) ++void rtw_btcoex_rx_ampdu_apply(PADAPTER padapter) + { +- struct mlme_ext_info *pmlmeinfo; +- +- pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; +- +- if (_TRUE == enable) +- { +- struct sta_info *psta = NULL; +- +- pmlmeinfo->bAcceptAddbaReq = _FALSE; +- +- if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) { +- psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); +- if (psta) +- send_delba(padapter, 0, psta->hwaddr); +- } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { +- _irqL irqL; +- _list *phead, *plist; +- u8 peer_num = 0; +- char peers[NUM_STA]; +- struct sta_priv *pstapriv = &padapter->stapriv; +- int i; +- +- _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- phead = &pstapriv->asoc_list; +- plist = get_next(phead); +- +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { +- int stainfo_offset; +- +- psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); +- plist = get_next(plist); +- +- stainfo_offset = rtw_stainfo_offset(pstapriv, psta); +- if (stainfo_offset_valid(stainfo_offset)) +- peers[peer_num++] = stainfo_offset; +- } +- +- _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- if (peer_num) { +- for (i = 0; i < peer_num; i++) { +- psta = rtw_get_stainfo_by_offset(pstapriv, peers[i]); +- if (psta) +- send_delba(padapter, 0, psta->hwaddr); +- } +- } +- } +- } +- else +- { +- pmlmeinfo->bAcceptAddbaReq = _TRUE; +- } ++ rtw_rx_ampdu_apply(padapter); + } + + void rtw_btcoex_LPS_Enter(PADAPTER padapter) +@@ -387,5 +467,1273 @@ void rtw_btcoex_LPS_Leave(PADAPTER padapter) + pwrpriv->bpower_saving = _FALSE; + } + } ++ ++u16 rtw_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data) ++{ ++ return hal_btcoex_btreg_read(padapter, type, addr, data); ++} ++ ++u16 rtw_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val) ++{ ++ return hal_btcoex_btreg_write(padapter, type, addr, val); ++} ++ ++ ++// ================================================== ++// Below Functions are BT-Coex socket related function ++// ================================================== ++ ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++_adapter *pbtcoexadapter = NULL; ++u8 rtw_btcoex_btinfo_cmd(_adapter *adapter, u8 *buf, u16 len) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ u8 *btinfo; ++ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if (pdrvextra_cmd_parm == NULL) { ++ rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ btinfo = rtw_zmalloc(len); ++ if (btinfo == NULL) { ++ rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj)); ++ rtw_mfree((u8*)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = BTINFO_WK_CID; ++ pdrvextra_cmd_parm->type = 0; ++ pdrvextra_cmd_parm->size = len; ++ pdrvextra_cmd_parm->pbuf = btinfo; ++ ++ _rtw_memcpy(btinfo, buf, len); ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ return res; ++} ++ ++u8 rtw_btcoex_send_event_to_BT(_adapter *padapter, u8 status, u8 event_code, u8 opcode_low, u8 opcode_high,u8 *dbg_msg) ++{ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0,tx_event_length = 0; ++ rtw_HCI_event *pEvent; ++ ++ pEvent = (rtw_HCI_event*)(&localBuf[0]); ++ ++ pEvent->EventCode = event_code; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = opcode_low; ++ pEvent->Data[2] = opcode_high; ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++#if 0 ++ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length, dbg_msg); ++#endif ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ ++ return status; ++} ++ ++/* ++Ref: ++Realtek Wi-Fi Driver ++Host Controller Interface for ++Bluetooth 3.0 + HS V1.4 2013/02/07 ++ ++Window team code & BT team code ++ */ ++ ++ ++u8 rtw_btcoex_parse_BT_info_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) ++{ ++ #define BT_INFO_LENGTH 8 ++ ++ u8 curPollEnable = pcmd[0]; ++ u8 curPollTime = pcmd[1]; ++ u8 btInfoReason = pcmd[2]; ++ u8 btInfoLen = pcmd[3]; ++ u8 btinfo[BT_INFO_LENGTH]; ++ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0,tx_event_length = 0; ++ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; ++ rtw_HCI_event *pEvent; ++ ++ /* DBG_871X("%s\n",__func__); ++ DBG_871X("current Poll Enable: %d, currrent Poll Time: %d\n",curPollEnable,curPollTime); ++ DBG_871X("BT Info reason: %d, BT Info length: %d\n",btInfoReason,btInfoLen); ++ DBG_871X("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n" ++ ,pcmd[4],pcmd[5],pcmd[6],pcmd[7],pcmd[8],pcmd[9],pcmd[10],pcmd[11]);*/ ++ ++ _rtw_memset(btinfo, 0, BT_INFO_LENGTH); ++ ++#if 1 ++ if(BT_INFO_LENGTH != btInfoLen) ++ { ++ status = HCI_STATUS_INVALID_HCI_CMD_PARA_VALUE; ++ DBG_871X("Error BT Info Length: %d\n",btInfoLen); ++ //return _FAIL; ++ } ++ else ++#endif ++ { ++ if(0x1 == btInfoReason || 0x2 == btInfoReason) ++ { ++ _rtw_memcpy(btinfo, &pcmd[4], btInfoLen); ++ btinfo[0] = btInfoReason; ++ rtw_btcoex_btinfo_cmd(padapter,btinfo,btInfoLen); ++ } ++ else ++ { ++ DBG_871X("Other BT info reason\n"); ++ } ++ } ++ ++ //send complete event to BT ++ { ++ ++ pEvent = (rtw_HCI_event*)(&localBuf[0]); ++ ++ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_INFO_NOTIFY, OGF_EXTENSION); ++ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_INFO_NOTIFY, OGF_EXTENSION); ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++#if 0 ++ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length,"BT_info_event"); ++#endif ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ ++ return status; ++ //bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); ++ } ++} ++ ++u8 rtw_btcoex_parse_BT_patch_ver_info_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) ++{ ++ RTW_HCI_STATUS status=HCI_STATUS_SUCCESS; ++ u16 btPatchVer=0x0, btHciVer=0x0; ++ //u16 *pU2tmp; ++ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0, tx_event_length =0; ++ rtw_HCI_event *pEvent; ++ ++ btHciVer = pcmd[0] | pcmd[1]<<8; ++ btPatchVer = pcmd[2] | pcmd[3]<<8; ++ ++ ++ DBG_871X("%s, cmd:%02x %02x %02x %02x\n",__func__, pcmd[0] ,pcmd[1] ,pcmd[2] ,pcmd[3]); ++ DBG_871X("%s, HCI Ver:%d, Patch Ver:%d\n",__func__, btHciVer,btPatchVer); ++ ++ rtw_btcoex_SetBtPatchVersion(padapter,btHciVer,btPatchVer); ++ ++ ++ //send complete event to BT ++ { ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++ ++ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_PATCH_VERSION_NOTIFY, OGF_EXTENSION); ++ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_PATCH_VERSION_NOTIFY, OGF_EXTENSION); ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++#if 0 ++ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length,"BT_patch_event"); ++#endif ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ return status; ++ //bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); ++ } ++} ++ ++u8 rtw_btcoex_parse_HCI_Ver_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) ++{ ++ RTW_HCI_STATUS status=HCI_STATUS_SUCCESS; ++ u16 hciver = pcmd[0] | pcmd[1] <<8; ++ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0, tx_event_length =0; ++ rtw_HCI_event *pEvent; ++ ++ struct bt_coex_info *pcoex_info = &padapter->coex_info; ++ PBT_MGNT pBtMgnt=&pcoex_info->BtMgnt; ++ pBtMgnt->ExtConfig.HCIExtensionVer = hciver; ++ DBG_871X("%s, HCI Version: %d\n",__func__,pBtMgnt->ExtConfig.HCIExtensionVer); ++ if(pBtMgnt->ExtConfig.HCIExtensionVer < 4) ++ { ++ status = HCI_STATUS_INVALID_HCI_CMD_PARA_VALUE; ++ DBG_871X("%s, Version = %d, HCI Version < 4\n",__func__,pBtMgnt->ExtConfig.HCIExtensionVer ); ++ } ++ else ++ { ++ rtw_btcoex_SetHciVersion(padapter,hciver); ++ } ++ //send complete event to BT ++ { ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++ ++ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = HCIOPCODELOW(HCI_EXTENSION_VERSION_NOTIFY, OGF_EXTENSION); ++ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_EXTENSION_VERSION_NOTIFY, OGF_EXTENSION); ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++ ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ return status; ++ //bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); ++ } ++ ++} ++ ++u8 rtw_btcoex_parse_WIFI_scan_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) ++{ ++ RTW_HCI_STATUS status=HCI_STATUS_SUCCESS; ++ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0, tx_event_length =0; ++ rtw_HCI_event *pEvent; ++ ++ struct bt_coex_info *pcoex_info = &padapter->coex_info; ++ PBT_MGNT pBtMgnt=&pcoex_info->BtMgnt; ++ pBtMgnt->ExtConfig.bEnableWifiScanNotify= pcmd[0]; ++ DBG_871X("%s, bEnableWifiScanNotify: %d\n",__func__,pBtMgnt->ExtConfig.bEnableWifiScanNotify); ++ ++ //send complete event to BT ++ { ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++ ++ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = HCIOPCODELOW(HCI_ENABLE_WIFI_SCAN_NOTIFY, OGF_EXTENSION); ++ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_ENABLE_WIFI_SCAN_NOTIFY, OGF_EXTENSION); ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++ ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ return status; ++ //bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); ++ } ++} ++ ++u8 rtw_btcoex_parse_HCI_link_status_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) ++{ ++ RTW_HCI_STATUS status=HCI_STATUS_SUCCESS; ++ struct bt_coex_info *pcoex_info=&padapter->coex_info; ++ PBT_MGNT pBtMgnt=&pcoex_info->BtMgnt; ++ //PBT_DBG pBtDbg=&padapter->MgntInfo.BtInfo.BtDbg; ++ u8 i, numOfHandle=0, numOfAcl=0; ++ u16 conHandle; ++ u8 btProfile, btCoreSpec, linkRole; ++ u8 *pTriple; ++ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0, tx_event_length =0; ++ rtw_HCI_event *pEvent; ++ ++ //pBtDbg->dbgHciInfo.hciCmdCntLinkStatusNotify++; ++ //RT_DISP_DATA(FIOCTL, IOCTL_BT_HCICMD_EXT, "LinkStatusNotify, Hex Data :\n", ++ // &pHciCmd->Data[0], pHciCmd->Length); ++ ++ DBG_871X("BTLinkStatusNotify\n"); ++ ++ // Current only RTL8723 support this command. ++ //pBtMgnt->bSupportProfile = TRUE; ++ pBtMgnt->bSupportProfile = _FALSE; ++ ++ pBtMgnt->ExtConfig.NumberOfACL = 0; ++ pBtMgnt->ExtConfig.NumberOfSCO = 0; ++ ++ numOfHandle = pcmd[0]; ++ //RT_DISP(FIOCTL, IOCTL_BT_HCICMD_EXT, ("numOfHandle = 0x%x\n", numOfHandle)); ++ //RT_DISP(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCIExtensionVer = %d\n", pBtMgnt->ExtConfig.HCIExtensionVer)); ++ DBG_871X("numOfHandle = 0x%x\n", numOfHandle); ++ DBG_871X("HCIExtensionVer = %d\n", pBtMgnt->ExtConfig.HCIExtensionVer); ++ ++ pTriple = &pcmd[1]; ++ for(i=0; iExtConfig.HCIExtensionVer < 1) ++ { ++ conHandle = *((u8 *)&pTriple[0]); ++ btProfile = pTriple[2]; ++ btCoreSpec = pTriple[3]; ++ if(BT_PROFILE_SCO == btProfile) ++ { ++ pBtMgnt->ExtConfig.NumberOfSCO++; ++ } ++ else ++ { ++ pBtMgnt->ExtConfig.NumberOfACL++; ++ pBtMgnt->ExtConfig.aclLink[i].ConnectHandle = conHandle; ++ pBtMgnt->ExtConfig.aclLink[i].BTProfile = btProfile; ++ pBtMgnt->ExtConfig.aclLink[i].BTCoreSpec = btCoreSpec; ++ } ++ //RT_DISP(FIOCTL, IOCTL_BT_HCICMD_EXT, ++ // ("Connection_Handle=0x%x, BTProfile=%d, BTSpec=%d\n", ++ // conHandle, btProfile, btCoreSpec)); ++ DBG_871X("Connection_Handle=0x%x, BTProfile=%d, BTSpec=%d\n", conHandle, btProfile, btCoreSpec); ++ pTriple += 4; ++ } ++ else if(pBtMgnt->ExtConfig.HCIExtensionVer >= 1) ++ { ++ conHandle = *((pu2Byte)&pTriple[0]); ++ btProfile = pTriple[2]; ++ btCoreSpec = pTriple[3]; ++ linkRole = pTriple[4]; ++ if(BT_PROFILE_SCO == btProfile) ++ { ++ pBtMgnt->ExtConfig.NumberOfSCO++; ++ } ++ else ++ { ++ pBtMgnt->ExtConfig.NumberOfACL++; ++ pBtMgnt->ExtConfig.aclLink[i].ConnectHandle = conHandle; ++ pBtMgnt->ExtConfig.aclLink[i].BTProfile = btProfile; ++ pBtMgnt->ExtConfig.aclLink[i].BTCoreSpec = btCoreSpec; ++ pBtMgnt->ExtConfig.aclLink[i].linkRole = linkRole; ++ } ++ //RT_DISP(FIOCTL, IOCTL_BT_HCICMD_EXT, ++ DBG_871X("Connection_Handle=0x%x, BTProfile=%d, BTSpec=%d, LinkRole=%d\n", ++ conHandle, btProfile, btCoreSpec, linkRole); ++ pTriple += 5; ++ } ++ } ++ rtw_btcoex_StackUpdateProfileInfo(); ++ ++ //send complete event to BT ++ { ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++ ++ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = HCIOPCODELOW(HCI_LINK_STATUS_NOTIFY, OGF_EXTENSION); ++ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_LINK_STATUS_NOTIFY, OGF_EXTENSION); ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++ ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ return status; ++ //bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); ++ } ++ ++ ++} ++ ++u8 rtw_btcoex_parse_HCI_BT_coex_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) ++{ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0, tx_event_length =0; ++ rtw_HCI_event *pEvent; ++ RTW_HCI_STATUS status=HCI_STATUS_SUCCESS; ++ ++ { ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++ ++ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_COEX_NOTIFY, OGF_EXTENSION); ++ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_COEX_NOTIFY, OGF_EXTENSION); ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++ ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ return status; ++ //bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); ++ } ++} ++ ++u8 rtw_btcoex_parse_HCI_BT_operation_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) ++{ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0, tx_event_length =0; ++ rtw_HCI_event *pEvent; ++ RTW_HCI_STATUS status=HCI_STATUS_SUCCESS; ++ ++ DBG_871X("%s, OP code: %d\n",__func__,pcmd[0]); ++ ++ switch(pcmd[0]) ++ { ++ case HCI_BT_OP_NONE: ++ DBG_871X("[bt operation] : Operation None!!\n"); ++ break; ++ case HCI_BT_OP_INQUIRY_START: ++ DBG_871X("[bt operation] : Inquiry start!!\n"); ++ break; ++ case HCI_BT_OP_INQUIRY_FINISH: ++ DBG_871X("[bt operation] : Inquiry finished!!\n"); ++ break; ++ case HCI_BT_OP_PAGING_START: ++ DBG_871X("[bt operation] : Paging is started!!\n"); ++ break; ++ case HCI_BT_OP_PAGING_SUCCESS: ++ DBG_871X("[bt operation] : Paging complete successfully!!\n"); ++ break; ++ case HCI_BT_OP_PAGING_UNSUCCESS: ++ DBG_871X("[bt operation] : Paging complete unsuccessfully!!\n"); ++ break; ++ case HCI_BT_OP_PAIRING_START: ++ DBG_871X("[bt operation] : Pairing start!!\n"); ++ break; ++ case HCI_BT_OP_PAIRING_FINISH: ++ DBG_871X("[bt operation] : Pairing finished!!\n"); ++ break; ++ case HCI_BT_OP_BT_DEV_ENABLE: ++ DBG_871X("[bt operation] : BT Device is enabled!!\n"); ++ break; ++ case HCI_BT_OP_BT_DEV_DISABLE: ++ DBG_871X("[bt operation] : BT Device is disabled!!\n"); ++ break; ++ default: ++ DBG_871X("[bt operation] : Unknown, error!!\n"); ++ break; ++ } ++ ++ //send complete event to BT ++ { ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++ ++ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_OPERATION_NOTIFY, OGF_EXTENSION); ++ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_OPERATION_NOTIFY, OGF_EXTENSION); ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++ ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ return status; ++ //bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); ++ } ++} ++ ++u8 rtw_btcoex_parse_BT_AFH_MAP_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) ++{ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0, tx_event_length =0; ++ rtw_HCI_event *pEvent; ++ RTW_HCI_STATUS status=HCI_STATUS_SUCCESS; ++ ++ { ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++ ++ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_AFH_MAP_NOTIFY, OGF_EXTENSION); ++ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_AFH_MAP_NOTIFY, OGF_EXTENSION); ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++ ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ return status; ++ //bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); ++ } ++} ++ ++u8 rtw_btcoex_parse_BT_register_val_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) ++{ ++ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0, tx_event_length =0; ++ rtw_HCI_event *pEvent; ++ RTW_HCI_STATUS status=HCI_STATUS_SUCCESS; ++ ++ { ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++ ++ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_REGISTER_VALUE_NOTIFY, OGF_EXTENSION); ++ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_REGISTER_VALUE_NOTIFY, OGF_EXTENSION); ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++ ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ return status; ++ //bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); ++ } ++} ++ ++u8 rtw_btcoex_parse_HCI_BT_abnormal_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) ++{ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0, tx_event_length =0; ++ rtw_HCI_event *pEvent; ++ RTW_HCI_STATUS status=HCI_STATUS_SUCCESS; ++ ++ { ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++ ++ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_ABNORMAL_NOTIFY, OGF_EXTENSION); ++ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_ABNORMAL_NOTIFY, OGF_EXTENSION); ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++ ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ return status; ++ //bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); ++ } ++} ++ ++u8 rtw_btcoex_parse_HCI_query_RF_status_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) ++{ ++ u8 localBuf[6] = ""; ++ u8 *pRetPar; ++ u8 len=0, tx_event_length =0; ++ rtw_HCI_event *pEvent; ++ RTW_HCI_STATUS status=HCI_STATUS_SUCCESS; ++ ++ { ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++ ++ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; ++ pEvent->Data[0] = 0x1; //packet # ++ pEvent->Data[1] = HCIOPCODELOW(HCI_QUERY_RF_STATUS, OGF_EXTENSION); ++ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_QUERY_RF_STATUS, OGF_EXTENSION); ++ len = len + 3; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ pRetPar[0] = status; //status ++ ++ len++; ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++ ++ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ return status; ++ //bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); ++ } ++} ++ ++/***************************************** ++* HCI cmd format : ++*| 15 - 0 | ++*| OPcode (OCF|OGF<<10) | ++*| 15 - 8 |7 - 0 | ++*|Cmd para |Cmd para Length | ++*|Cmd para...... | ++******************************************/ ++ ++//bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ++// | OCF | OGF | ++void rtw_btcoex_parse_hci_extend_cmd(_adapter *padapter, u8 *pcmd, u16 len,const u16 hci_OCF) ++{ ++ ++ DBG_871X("%s: OCF: %x\n",__func__,hci_OCF); ++ switch(hci_OCF) ++ { ++ case HCI_EXTENSION_VERSION_NOTIFY: ++ DBG_871X("HCI_EXTENSION_VERSION_NOTIFY\n"); ++ rtw_btcoex_parse_HCI_Ver_notify_cmd(padapter,pcmd, len); ++ break; ++ case HCI_LINK_STATUS_NOTIFY: ++ DBG_871X("HCI_LINK_STATUS_NOTIFY\n"); ++ rtw_btcoex_parse_HCI_link_status_notify_cmd(padapter,pcmd, len); ++ break; ++ case HCI_BT_OPERATION_NOTIFY: ++ // only for 8723a 2ant ++ DBG_871X("HCI_BT_OPERATION_NOTIFY\n"); ++ rtw_btcoex_parse_HCI_BT_operation_notify_cmd(padapter,pcmd, len); ++ // ++ break; ++ case HCI_ENABLE_WIFI_SCAN_NOTIFY: ++ DBG_871X("HCI_ENABLE_WIFI_SCAN_NOTIFY\n"); ++ rtw_btcoex_parse_WIFI_scan_notify_cmd(padapter,pcmd, len); ++ break; ++ case HCI_QUERY_RF_STATUS: ++ // only for 8723b 2ant ++ DBG_871X("HCI_QUERY_RF_STATUS\n"); ++ rtw_btcoex_parse_HCI_query_RF_status_cmd(padapter,pcmd, len); ++ break; ++ case HCI_BT_ABNORMAL_NOTIFY: ++ DBG_871X("HCI_BT_ABNORMAL_NOTIFY\n"); ++ rtw_btcoex_parse_HCI_BT_abnormal_notify_cmd(padapter,pcmd, len); ++ break; ++ case HCI_BT_INFO_NOTIFY: ++ DBG_871X("HCI_BT_INFO_NOTIFY\n"); ++ rtw_btcoex_parse_BT_info_notify_cmd(padapter,pcmd, len); ++ break; ++ case HCI_BT_COEX_NOTIFY: ++ DBG_871X("HCI_BT_COEX_NOTIFY\n"); ++ rtw_btcoex_parse_HCI_BT_coex_notify_cmd(padapter,pcmd, len); ++ break; ++ case HCI_BT_PATCH_VERSION_NOTIFY: ++ DBG_871X("HCI_BT_PATCH_VERSION_NOTIFY\n"); ++ rtw_btcoex_parse_BT_patch_ver_info_cmd(padapter,pcmd, len); ++ break; ++ case HCI_BT_AFH_MAP_NOTIFY: ++ DBG_871X("HCI_BT_AFH_MAP_NOTIFY\n"); ++ rtw_btcoex_parse_BT_AFH_MAP_notify_cmd(padapter,pcmd, len); ++ break; ++ case HCI_BT_REGISTER_VALUE_NOTIFY: ++ DBG_871X("HCI_BT_REGISTER_VALUE_NOTIFY\n"); ++ rtw_btcoex_parse_BT_register_val_notify_cmd(padapter,pcmd, len); ++ break; ++ default: ++ DBG_871X("ERROR!!! Unknown OCF: %x\n",hci_OCF); ++ break; ++ ++ } ++} ++ ++void rtw_btcoex_parse_hci_cmd(_adapter *padapter, u8 *pcmd, u16 len) ++{ ++ u16 opcode = pcmd[0] | pcmd[1]<<8; ++ u16 hci_OGF = HCI_OGF(opcode); ++ u16 hci_OCF = HCI_OCF(opcode); ++ u8 cmdlen = len -3; ++ u8 pare_len = pcmd[2]; ++ ++ DBG_871X("%s OGF: %x,OCF: %x\n", __func__, hci_OGF, hci_OCF); ++ switch(hci_OGF) ++ { ++ case OGF_EXTENSION: ++ DBG_871X("HCI_EXTENSION_CMD_OGF\n"); ++ rtw_btcoex_parse_hci_extend_cmd(padapter, &pcmd[3], cmdlen, hci_OCF); ++ break; ++ default: ++ DBG_871X("Other OGF: %x\n",hci_OGF); ++ break; ++ } ++} ++ ++u16 rtw_btcoex_parse_recv_data(u8 *msg, u8 msg_size) ++{ ++ u8 cmp_msg1[32] = attend_ack; ++ u8 cmp_msg2[32] = leave_ack; ++ u8 cmp_msg3[32] = bt_leave; ++ u8 cmp_msg4[32] = invite_req; ++ u8 cmp_msg5[32] = attend_req; ++ u8 cmp_msg6[32] = invite_rsp; ++ u8 res = OTHER; ++ ++ if (_rtw_memcmp(cmp_msg1, msg, msg_size) == _TRUE) { ++ /*DBG_871X("%s, msg:%s\n",__func__,msg);*/ ++ res = RX_ATTEND_ACK; ++ } else if (_rtw_memcmp(cmp_msg2, msg, msg_size) == _TRUE) { ++ /*DBG_871X("%s, msg:%s\n",__func__,msg);*/ ++ res = RX_LEAVE_ACK; ++ } else if (_rtw_memcmp(cmp_msg3, msg, msg_size) == _TRUE) { ++ /*DBG_871X("%s, msg:%s\n",__func__,msg);*/ ++ res = RX_BT_LEAVE; ++ } else if (_rtw_memcmp(cmp_msg4, msg, msg_size) == _TRUE) { ++ /*DBG_871X("%s, msg:%s\n",__func__,msg);*/ ++ res = RX_INVITE_REQ; ++ } else if (_rtw_memcmp(cmp_msg5, msg, msg_size) == _TRUE) { ++ res = RX_ATTEND_REQ; ++ } else if (_rtw_memcmp(cmp_msg6, msg, msg_size) == _TRUE) { ++ res = RX_INVITE_RSP; ++ } else { ++ /*DBG_871X("%s, %s\n", __func__, msg);*/ ++ res = OTHER; ++ } ++ ++ /*DBG_871X("%s, res:%d\n", __func__, res);*/ ++ ++ return res; ++} ++ ++void rtw_btcoex_recvmsgbysocket(void *data) ++{ ++ u8 recv_data[255]; ++ u8 tx_msg[255] = leave_ack; ++ u32 len = 0; ++ u16 recv_length = 0; ++ u16 parse_res = 0; ++#if 0 ++ u8 para_len = 0, polling_enable = 0, poling_interval = 0, reason = 0, btinfo_len = 0; ++ u8 btinfo[BT_INFO_LEN] = {0}; ++#endif ++ ++ struct bt_coex_info *pcoex_info = NULL; ++ struct sock *sk = NULL; ++ struct sk_buff *skb = NULL; ++ ++ /*DBG_871X("%s\n",__func__);*/ ++ ++ if (pbtcoexadapter == NULL) { ++ DBG_871X("%s: btcoexadapter NULL!\n", __func__); ++ return; ++ } ++ ++ pcoex_info = &pbtcoexadapter->coex_info; ++ sk = pcoex_info->sk_store; ++ ++ if (sk == NULL) { ++ DBG_871X("%s: critical error when receive socket data!\n", __func__); ++ return; ++ } ++ ++ len = skb_queue_len(&sk->sk_receive_queue); ++ while (len > 0) { ++ skb = skb_dequeue(&sk->sk_receive_queue); ++ ++ /*important: cut the udp header from skb->data! header length is 8 byte*/ ++ recv_length = skb->len-8; ++ _rtw_memset(recv_data, 0, sizeof(recv_data)); ++ _rtw_memcpy(recv_data, skb->data+8, recv_length); ++ ++ parse_res = rtw_btcoex_parse_recv_data(recv_data, recv_length); ++/* ++ if (RX_ATTEND_ACK == parse_res) { ++ //attend ack ++ pcoex_info->BT_attend = _TRUE; ++ DBG_871X("RX_ATTEND_ACK!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ } else if (RX_ATTEND_REQ == parse_res) { ++ //attend req from BT ++ pcoex_info->BT_attend = _TRUE; ++ DBG_871X("RX_BT_ATTEND_REQ!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, attend_ack, sizeof(attend_ack), _FALSE); ++ } else if (RX_INVITE_REQ == parse_res) { ++ //invite req from BT ++ pcoex_info->BT_attend = _TRUE; ++ DBG_871X("RX_INVITE_REQ!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, invite_rsp, sizeof(invite_rsp), _FALSE); ++ } else if (RX_INVITE_RSP == parse_res) { ++ //invite rsp ++ pcoex_info->BT_attend = _TRUE; ++ DBG_871X("RX_INVITE_RSP!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ } else if (RX_LEAVE_ACK == parse_res) { ++ //mean BT know wifi will leave ++ pcoex_info->BT_attend = _FALSE; ++ DBG_871X("RX_LEAVE_ACK!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ } else if (RX_BT_LEAVE == parse_res) { ++ //BT leave ++ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, leave_ack, sizeof(leave_ack), _FALSE); // no ack ++ pcoex_info->BT_attend = _FALSE; ++ DBG_871X("RX_BT_LEAVE!sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ } else { ++ //todo: check if recv data are really hci cmds ++ if (_TRUE == pcoex_info->BT_attend) ++ rtw_btcoex_parse_hci_cmd(pbtcoexadapter, recv_data, recv_length); ++ } ++*/ ++ switch (parse_res) { ++ case RX_ATTEND_ACK: ++ /* attend ack */ ++ pcoex_info->BT_attend = _TRUE; ++ DBG_871X("RX_ATTEND_ACK!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ rtw_btcoex_BTOffOnNotify(pbtcoexadapter, pcoex_info->BT_attend); ++ break; ++ ++ case RX_ATTEND_REQ: ++ pcoex_info->BT_attend = _TRUE; ++ DBG_871X("RX_BT_ATTEND_REQ!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, attend_ack, sizeof(attend_ack), _FALSE); ++ rtw_btcoex_BTOffOnNotify(pbtcoexadapter, pcoex_info->BT_attend); ++ break; ++ ++ case RX_INVITE_REQ: ++ /* invite req from BT */ ++ pcoex_info->BT_attend = _TRUE; ++ DBG_871X("RX_INVITE_REQ!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, invite_rsp, sizeof(invite_rsp), _FALSE); ++ rtw_btcoex_BTOffOnNotify(pbtcoexadapter, pcoex_info->BT_attend); ++ break; ++ ++ case RX_INVITE_RSP: ++ /*invite rsp*/ ++ pcoex_info->BT_attend = _TRUE; ++ DBG_871X("RX_INVITE_RSP!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ rtw_btcoex_BTOffOnNotify(pbtcoexadapter, pcoex_info->BT_attend); ++ break; ++ ++ case RX_LEAVE_ACK: ++ /* mean BT know wifi will leave */ ++ pcoex_info->BT_attend = _FALSE; ++ DBG_871X("RX_LEAVE_ACK!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ rtw_btcoex_BTOffOnNotify(pbtcoexadapter, pcoex_info->BT_attend); ++ break; ++ ++ case RX_BT_LEAVE: ++ /* BT leave */ ++ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, leave_ack, sizeof(leave_ack), _FALSE); /* no ack */ ++ pcoex_info->BT_attend = _FALSE; ++ DBG_871X("RX_BT_LEAVE!sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ rtw_btcoex_BTOffOnNotify(pbtcoexadapter, pcoex_info->BT_attend); ++ break; ++ ++ default: ++ if (_TRUE == pcoex_info->BT_attend) ++ rtw_btcoex_parse_hci_cmd(pbtcoexadapter, recv_data, recv_length); ++ else ++ DBG_871X("ERROR!! BT is UP\n"); ++ break; ++ ++ } ++ ++ len--; ++ kfree_skb(skb); ++ } ++} ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0)) ++void rtw_btcoex_recvmsg_init(struct sock *sk_in, s32 bytes) ++#else ++void rtw_btcoex_recvmsg_init(struct sock *sk_in) ++#endif ++{ ++ struct bt_coex_info *pcoex_info = NULL; ++ ++ if (pbtcoexadapter == NULL) { ++ DBG_871X("%s: btcoexadapter NULL\n", __func__); ++ return; ++ } ++ pcoex_info = &pbtcoexadapter->coex_info; ++ pcoex_info->sk_store = sk_in; ++ if (pcoex_info->btcoex_wq != NULL) ++ queue_delayed_work(pcoex_info->btcoex_wq, &pcoex_info->recvmsg_work, 0); ++ else ++ DBG_871X("%s: BTCOEX workqueue NULL\n", __func__); ++} ++ ++u8 rtw_btcoex_sendmsgbysocket(_adapter *padapter, u8 *msg, u8 msg_size, bool force) ++{ ++ u8 error; ++ struct msghdr udpmsg; ++ mm_segment_t oldfs; ++ struct iovec iov; ++ struct bt_coex_info *pcoex_info = &padapter->coex_info; ++ ++ /* DBG_871X("%s: msg:%s, force:%s\n", __func__, msg, force == _TRUE?"TRUE":"FALSE"); */ ++ if (_FALSE == force) { ++ if (_FALSE == pcoex_info->BT_attend) { ++ DBG_871X("TX Blocked: WiFi-BT disconnected\n"); ++ return _FAIL; ++ } ++ } ++ ++ iov.iov_base = (void *)msg; ++ iov.iov_len = msg_size; ++ udpmsg.msg_name = &pcoex_info->bt_sockaddr; ++ udpmsg.msg_namelen = sizeof(struct sockaddr_in); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) ++ /* referece:sock_xmit in kernel code ++ * WRITE for sock_sendmsg, READ for sock_recvmsg ++ * third parameter for msg_iovlen ++ * last parameter for iov_len ++ */ ++ iov_iter_init(&udpmsg.msg_iter, WRITE, &iov, 1, msg_size); ++#else ++ udpmsg.msg_iov = &iov; ++ udpmsg.msg_iovlen = 1; ++#endif ++ udpmsg.msg_control = NULL; ++ udpmsg.msg_controllen = 0; ++ udpmsg.msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL; ++ oldfs = get_fs(); ++ set_fs(KERNEL_DS); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) ++ error = sock_sendmsg(pcoex_info->udpsock, &udpmsg); ++#else ++ error = sock_sendmsg(pcoex_info->udpsock, &udpmsg, msg_size); ++#endif ++ set_fs(oldfs); ++ if (error < 0) { ++ DBG_871X("Error when sendimg msg, error:%d\n", error); ++ return _FAIL; ++ } else ++ return _SUCCESS; ++} ++ ++u8 rtw_btcoex_create_kernel_socket(_adapter *padapter) ++{ ++ s8 kernel_socket_err; ++ u8 tx_msg[255] = attend_req; ++ struct bt_coex_info *pcoex_info = &padapter->coex_info; ++ s32 sock_reuse = 1; ++ u8 status = _FAIL; ++ ++ DBG_871X("%s CONNECT_PORT %d\n", __func__, CONNECT_PORT); ++ ++ if (NULL == pcoex_info) { ++ DBG_871X("coex_info: NULL\n"); ++ status = _FAIL; ++ } ++ ++ kernel_socket_err = sock_create(PF_INET, SOCK_DGRAM, 0, &pcoex_info->udpsock); ++ ++ if (kernel_socket_err < 0) { ++ DBG_871X("Error during creation of socket error:%d\n", kernel_socket_err); ++ status = _FAIL; ++ } else { ++ _rtw_memset(&(pcoex_info->wifi_sockaddr), 0, sizeof(pcoex_info->wifi_sockaddr)); ++ pcoex_info->wifi_sockaddr.sin_family = AF_INET; ++ pcoex_info->wifi_sockaddr.sin_port = htons(CONNECT_PORT); ++ pcoex_info->wifi_sockaddr.sin_addr.s_addr = htonl(INADDR_LOOPBACK); ++ ++ _rtw_memset(&(pcoex_info->bt_sockaddr), 0, sizeof(pcoex_info->bt_sockaddr)); ++ pcoex_info->bt_sockaddr.sin_family = AF_INET; ++ pcoex_info->bt_sockaddr.sin_port = htons(CONNECT_PORT_BT); ++ pcoex_info->bt_sockaddr.sin_addr.s_addr = htonl(INADDR_LOOPBACK); ++ ++ pcoex_info->sk_store = NULL; ++ kernel_socket_err = pcoex_info->udpsock->ops->bind(pcoex_info->udpsock, (struct sockaddr *)&pcoex_info->wifi_sockaddr, ++ sizeof(pcoex_info->wifi_sockaddr)); ++ if (kernel_socket_err == 0) { ++ DBG_871X("binding socket success\n"); ++ pcoex_info->udpsock->sk->sk_data_ready = rtw_btcoex_recvmsg_init; ++ pcoex_info->sock_open |= KERNEL_SOCKET_OK; ++ pcoex_info->BT_attend = _FALSE; ++ DBG_871X("WIFI sending attend_req\n"); ++ rtw_btcoex_sendmsgbysocket(padapter, attend_req, sizeof(attend_req), _TRUE); ++ status = _SUCCESS; ++ } else { ++ pcoex_info->BT_attend = _FALSE; ++ sock_release(pcoex_info->udpsock); /* bind fail release socket */ ++ DBG_871X("Error binding socket: %d\n", kernel_socket_err); ++ status = _FAIL; ++ } ++ ++ } ++ ++ return status; ++} ++ ++void rtw_btcoex_close_kernel_socket(_adapter *padapter) ++{ ++ struct bt_coex_info *pcoex_info = &padapter->coex_info; ++ if (pcoex_info->sock_open & KERNEL_SOCKET_OK) { ++ DBG_871X("release kernel socket\n"); ++ sock_release(pcoex_info->udpsock); ++ pcoex_info->sock_open &= ~(KERNEL_SOCKET_OK); ++ if (_TRUE == pcoex_info->BT_attend) ++ pcoex_info->BT_attend = _FALSE; ++ ++ DBG_871X("sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); ++ } ++} ++ ++void rtw_btcoex_init_socket(_adapter *padapter) ++{ ++ ++ u8 is_invite = _FALSE; ++ struct bt_coex_info *pcoex_info = &padapter->coex_info; ++ DBG_871X("%s\n", __func__); ++ if (_FALSE == pcoex_info->is_exist) { ++ _rtw_memset(pcoex_info,0,sizeof(struct bt_coex_info)); ++ pcoex_info->btcoex_wq = create_workqueue("BTCOEX"); ++ INIT_DELAYED_WORK(&pcoex_info->recvmsg_work, ++ (void *)rtw_btcoex_recvmsgbysocket); ++ pbtcoexadapter = padapter; ++ /* We expect BT is off if BT don't send ack to wifi */ ++ DBG_871X("We expect BT is off if BT send ack to wifi\n"); ++ rtw_btcoex_BTOffOnNotify(pbtcoexadapter, _FALSE); ++ if (rtw_btcoex_create_kernel_socket(padapter) == _SUCCESS) { ++ pcoex_info->is_exist = _TRUE; ++ } else { ++ pcoex_info->is_exist = _FALSE; ++ pbtcoexadapter = NULL; ++ } ++ ++ DBG_871X("%s: pbtcoexadapter:%p, coex_info->is_exist: %s\n" ++ , __func__, pbtcoexadapter, pcoex_info->is_exist == _TRUE?"TRUE":"FALSE"); ++ } ++} ++ ++void rtw_btcoex_close_socket(_adapter *padapter) ++{ ++ struct bt_coex_info *pcoex_info = &padapter->coex_info; ++ ++ DBG_871X("%s--coex_info->is_exist: %s, pcoex_info->BT_attend:%s\n" ++ , __func__, pcoex_info->is_exist == _TRUE?"TRUE":"FALSE", pcoex_info->BT_attend == _TRUE?"TRUE":"FALSE"); ++ ++ if (_TRUE == pcoex_info->is_exist) { ++ if (_TRUE == pcoex_info->BT_attend) { ++ /*inform BT wifi leave*/ ++ rtw_btcoex_sendmsgbysocket(padapter, wifi_leave, sizeof(wifi_leave), _FALSE); ++ msleep(50); ++ } ++ ++ if (pcoex_info->btcoex_wq != NULL) { ++ flush_workqueue(pcoex_info->btcoex_wq); ++ destroy_workqueue(pcoex_info->btcoex_wq); ++ } ++ ++ rtw_btcoex_close_kernel_socket(padapter); ++ pbtcoexadapter = NULL; ++ pcoex_info->is_exist = _FALSE; ++ } ++} ++ ++void rtw_btcoex_dump_tx_msg(u8 *tx_msg, u8 len, u8 *msg_name) ++{ ++ u8 i = 0; ++ DBG_871X("======> Msg name: %s\n", msg_name); ++ for(i=0;iEventCode = HCI_EVENT_EXTENSION_RTK; ++ pEvent->Data[0] = HCI_EVENT_EXT_BT_COEX_CONTROL; //extension event code ++ len ++; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ _rtw_memcpy(&pRetPar[0], pData, dataLen); ++ ++ len += dataLen; ++ ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++#if 0 ++ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length, "BT COEX CONTROL", _FALSE); ++#endif ++ rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ ++} ++ ++/* Porting from Windows team */ ++void rtw_btcoex_SendEventExtBtInfoControl(PADAPTER padapter, u8 dataLen, void *pData) ++{ ++ rtw_HCI_event *pEvent; ++ u8 *pRetPar; ++ u8 len=0, tx_event_length = 0; ++ u8 localBuf[32] = ""; ++ ++ struct bt_coex_info *pcoex_info = &padapter->coex_info; ++ PBT_MGNT pBtMgnt = &pcoex_info->BtMgnt; ++ ++ /* DBG_871X("%s\n",__func__);*/ ++ if(pBtMgnt->ExtConfig.HCIExtensionVer < 4) //not support ++ { ++ DBG_871X("ERROR: HCIExtensionVer = %d, HCIExtensionVer<4 !!!!\n",pBtMgnt->ExtConfig.HCIExtensionVer); ++ return; ++ } ++ ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++ //len += bthci_ExtensionEventHeaderRtk(&localBuf[0], ++ // HCI_EVENT_EXT_BT_INFO_CONTROL); ++ pEvent->EventCode = HCI_EVENT_EXTENSION_RTK; ++ pEvent->Data[0] = HCI_EVENT_EXT_BT_INFO_CONTROL; //extension event code ++ len ++; ++ ++ // Return parameters starts from here ++ pRetPar = &pEvent->Data[len]; ++ _rtw_memcpy(&pRetPar[0], pData, dataLen); ++ ++ len += dataLen; ++ ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++#if 0 ++ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length, "BT INFO CONTROL"); ++#endif ++ rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++ ++} ++ ++void rtw_btcoex_SendScanNotify(PADAPTER padapter, u8 scanType) ++{ ++ u8 len=0, tx_event_length=0; ++ u8 localBuf[7] = ""; ++ u8 *pRetPar; ++ u8 *pu1Temp; ++ rtw_HCI_event *pEvent; ++ struct bt_coex_info *pcoex_info = &padapter->coex_info; ++ PBT_MGNT pBtMgnt = &pcoex_info->BtMgnt; ++ ++// if(!pBtMgnt->BtOperationOn) ++// return; ++ ++ pEvent = (rtw_HCI_event *)(&localBuf[0]); ++ ++// len += bthci_ExtensionEventHeaderRtk(&localBuf[0], ++// HCI_EVENT_EXT_WIFI_SCAN_NOTIFY); ++ ++ pEvent->EventCode = HCI_EVENT_EXTENSION_RTK; ++ pEvent->Data[0] = HCI_EVENT_EXT_WIFI_SCAN_NOTIFY; //extension event code ++ len ++; ++ ++ // Return parameters starts from here ++ //pRetPar = &PPacketIrpEvent->Data[len]; ++ //pu1Temp = (u8 *)&pRetPar[0]; ++ //*pu1Temp = scanType; ++ pEvent->Data[len] = scanType; ++ len += 1; ++ ++ pEvent->Length = len; ++ ++ //total tx event length + EventCode length + sizeof(length) ++ tx_event_length = pEvent->Length + 2; ++#if 0 ++ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length, "WIFI SCAN OPERATION"); ++#endif ++ rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); ++} ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX + #endif // CONFIG_BT_COEXIST + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_cmd.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_cmd.c +old mode 100755 +new mode 100644 +index 6ed8f22..4954f6d +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_cmd.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_cmd.c +@@ -20,6 +20,11 @@ + #define _RTW_CMD_C_ + + #include ++#include ++ ++#ifndef DBG_CMD_EXECUTE ++ #define DBG_CMD_EXECUTE 0 ++#endif + + /* + Caller and the rtw_cmd_thread can protect cmd_q by spin_lock. +@@ -213,7 +218,7 @@ ISR/Call-Back functions can't call this sub-function. + extern u8 dump_cmd_id; + #endif + +-sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj) ++sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj, bool to_head) + { + _irqL irqL; + +@@ -222,14 +227,13 @@ _func_enter_; + if (obj == NULL) + goto exit; + +- if(obj->cmdsz > MAX_CMDSZ ){ +- DBG_871X("%s failed due to obj->cmdsz(%d) > MAX_CMDSZ(%d) \n",__FUNCTION__, obj->cmdsz,MAX_CMDSZ); +- goto exit; +- } + //_enter_critical_bh(&queue->lock, &irqL); + _enter_critical(&queue->lock, &irqL); + +- rtw_list_insert_tail(&obj->list, &queue->queue); ++ if (to_head) ++ rtw_list_insert_head(&obj->list, &queue->queue); ++ else ++ rtw_list_insert_tail(&obj->list, &queue->queue); + + #ifdef DBG_CMD_QUEUE + if(dump_cmd_id){ +@@ -413,18 +417,20 @@ int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) + if(cmd_obj->cmdcode == GEN_CMD_CODE(_SetChannelPlan)) + bAllow = _TRUE; + +- if( (pcmdpriv->padapter->hw_init_completed ==_FALSE && bAllow == _FALSE) ++ if (cmd_obj->no_io) ++ bAllow = _TRUE; ++ ++ if ((!rtw_is_hw_init_completed(pcmdpriv->padapter) && (bAllow == _FALSE)) + || ATOMIC_READ(&(pcmdpriv->cmdthd_running)) == _FALSE //com_thread not running +- ) +- { +- //DBG_871X("%s:%s: drop cmdcode:%u, hw_init_completed:%u, cmdthd_running:%u\n", caller_func, __FUNCTION__, +- // cmd_obj->cmdcode, +- // pcmdpriv->padapter->hw_init_completed, +- // pcmdpriv->cmdthd_running +- //); ++ ) { ++ if (DBG_CMD_EXECUTE) ++ DBG_871X(ADPT_FMT" drop "CMD_FMT" hw_init_completed:%u, cmdthd_running:%u\n", ADPT_ARG(cmd_obj->padapter) ++ , CMD_ARG(cmd_obj), rtw_get_hw_init_completed(cmd_obj->padapter), ATOMIC_READ(&pcmdpriv->cmdthd_running)); ++ if (0) ++ rtw_warn_on(1); + + return _FAIL; +- } ++ } + return _SUCCESS; + } + +@@ -449,12 +455,24 @@ _func_enter_; + pcmdpriv = &(padapter->pbuddy_adapter->cmdpriv); + #endif + +- if( _FAIL == (res=rtw_cmd_filter(pcmdpriv, cmd_obj)) ) { ++ res = rtw_cmd_filter(pcmdpriv, cmd_obj); ++ if ((_FAIL == res) || (cmd_obj->cmdsz > MAX_CMDSZ)) { ++ if (cmd_obj->cmdsz > MAX_CMDSZ) { ++ DBG_871X("%s failed due to obj->cmdsz(%d) > MAX_CMDSZ(%d)\n", __func__, cmd_obj->cmdsz, MAX_CMDSZ); ++ rtw_warn_on(1); ++ } ++ ++ if (cmd_obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)) { ++ struct drvextra_cmd_parm *extra_parm = (struct drvextra_cmd_parm *)cmd_obj->parmbuf; ++ ++ if (extra_parm->pbuf && extra_parm->size > 0) ++ rtw_mfree(extra_parm->pbuf, extra_parm->size); ++ } + rtw_free_cmd_obj(cmd_obj); + goto exit; + } + +- res = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, cmd_obj); ++ res = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, cmd_obj, 0); + + if(res == _SUCCESS) + _rtw_up_sema(&pcmdpriv->cmd_queue_sema); +@@ -491,12 +509,9 @@ void rtw_free_cmd_obj(struct cmd_obj *pcmd) + struct drvextra_cmd_parm *extra_parm = NULL; + _func_enter_; + +- if(pcmd->parmbuf != NULL){ +- if((pcmd->cmdcode!=_JoinBss_CMD_) &&(pcmd->cmdcode!= _CreateBss_CMD_)) +- { +- //free parmbuf in cmd_obj +- rtw_mfree((unsigned char*)pcmd->parmbuf, pcmd->cmdsz); +- } ++ if (pcmd->parmbuf != NULL) { ++ /* free parmbuf in cmd_obj */ ++ rtw_mfree((unsigned char *)pcmd->parmbuf, pcmd->cmdsz); + } + if(pcmd->rsp!=NULL) + { +@@ -552,17 +567,18 @@ _func_enter_; + + RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("start r871x rtw_cmd_thread !!!!\n")); + +- while(1) +- { ++ while (1) { + if (_rtw_down_sema(&pcmdpriv->cmd_queue_sema) == _FAIL) { + DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" _rtw_down_sema(&pcmdpriv->cmd_queue_sema) return _FAIL, break\n", FUNC_ADPT_ARG(padapter)); + break; + } + +- if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved == _TRUE)) +- { +- DBG_871X_LEVEL(_drv_always_, "%s: DriverStopped(%d) SurpriseRemoved(%d) break at line %d\n", +- __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved, __LINE__); ++ if (RTW_CANNOT_RUN(padapter)) { ++ DBG_871X_LEVEL(_drv_always_, "%s: DriverStopped(%s) SurpriseRemoved(%s) break at line %d\n", ++ __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False" ++ , __LINE__); + break; + } + +@@ -572,42 +588,54 @@ _func_enter_; + } + + _enter_critical(&pcmdpriv->cmd_queue.lock, &irqL); +- if(rtw_is_list_empty(&(pcmdpriv->cmd_queue.queue))) +- { ++ if (rtw_is_list_empty(&(pcmdpriv->cmd_queue.queue))) { + //DBG_871X("%s: cmd queue is empty!\n", __func__); + _exit_critical(&pcmdpriv->cmd_queue.lock, &irqL); + continue; + } + _exit_critical(&pcmdpriv->cmd_queue.lock, &irqL); + +-#ifdef CONFIG_LPS_LCLK +- if (rtw_register_cmd_alive(padapter) != _SUCCESS) +- { +- RT_TRACE(_module_hal_xmit_c_, _drv_notice_, +- ("%s: wait to leave LPS_LCLK\n", __FUNCTION__)); +- continue; +- } +-#endif +- + _next: +- if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) +- { +- DBG_871X_LEVEL(_drv_always_, "%s: DriverStopped(%d) SurpriseRemoved(%d) break at line %d\n", +- __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved, __LINE__); ++ if (RTW_CANNOT_RUN(padapter)) { ++ DBG_871X_LEVEL(_drv_always_, "%s: DriverStopped(%s) SurpriseRemoved(%s) break at line %d\n", ++ __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False" ++ , __LINE__); + break; + } + +- if(!(pcmd = rtw_dequeue_cmd(pcmdpriv))) { +-#ifdef CONFIG_LPS_LCLK ++ pcmd = rtw_dequeue_cmd(pcmdpriv); ++ if (!pcmd) { ++ #ifdef CONFIG_LPS_LCLK + rtw_unregister_cmd_alive(padapter); +-#endif ++ #endif + continue; + } + + cmd_start_time = rtw_get_current_time(); ++ pcmdpriv->cmd_issued_cnt++; + +- if( _FAIL == rtw_cmd_filter(pcmdpriv, pcmd) ) +- { ++ if (pcmd->cmdsz > MAX_CMDSZ) { ++ DBG_871X_LEVEL(_drv_err_, "%s cmdsz:%d > MAX_CMDSZ:%d\n", __func__, pcmd->cmdsz, MAX_CMDSZ); ++ pcmd->res = H2C_PARAMETERS_ERROR; ++ goto post_process; ++ } ++ ++ if (pcmd->cmdcode >= (sizeof(wlancmds) / sizeof(struct cmd_hdl))) { ++ DBG_871X_LEVEL(_drv_err_, "%s undefined cmdcode:%d\n", __func__, pcmd->cmdcode); ++ pcmd->res = H2C_PARAMETERS_ERROR; ++ goto post_process; ++ } ++ ++ cmd_hdl = wlancmds[pcmd->cmdcode].h2cfuns; ++ if (!cmd_hdl) { ++ DBG_871X_LEVEL(_drv_err_, "%s no cmd_hdl for cmdcode:%d\n", __func__, pcmd->cmdcode); ++ pcmd->res = H2C_PARAMETERS_ERROR; ++ goto post_process; ++ } ++ ++ if (_FAIL == rtw_cmd_filter(pcmdpriv, pcmd)) { + pcmd->res = H2C_DROPPED; + if (pcmd->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)) { + extra_parm = (struct drvextra_cmd_parm *)pcmd->parmbuf; +@@ -617,42 +645,46 @@ _next: + goto post_process; + } + +- pcmdpriv->cmd_issued_cnt++; +- +- pcmd->cmdsz = _RND4((pcmd->cmdsz));//_RND4 ++ #ifdef CONFIG_LPS_LCLK ++ if (pcmd->no_io) { ++ rtw_unregister_cmd_alive(padapter); ++ } else { ++ if (rtw_register_cmd_alive(padapter) != _SUCCESS) { ++ if (DBG_CMD_EXECUTE) ++ DBG_871X_LEVEL(_drv_always_, "%s: wait to leave LPS_LCLK\n", __func__); ++ ++ pcmd->res = H2C_ENQ_HEAD; ++ ret = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, pcmd, 1); ++ if (ret == _SUCCESS) { ++ if (DBG_CMD_EXECUTE) ++ DBG_871X(ADPT_FMT" "CMD_FMT" ENQ_HEAD\n", ADPT_ARG(pcmd->padapter), CMD_ARG(pcmd)); ++ continue; ++ } + +- if(pcmd->cmdsz > MAX_CMDSZ ){ +- DBG_871X("%s cmdsz:%d > MAX_CMDSZ:%d\n",__FUNCTION__,pcmd->cmdsz,MAX_CMDSZ); ++ DBG_871X(ADPT_FMT" "CMD_FMT" ENQ_HEAD_FAIL\n", ADPT_ARG(pcmd->padapter), CMD_ARG(pcmd)); ++ pcmd->res = H2C_ENQ_HEAD_FAIL; ++ rtw_warn_on(1); ++ } + } ++ #endif /* CONFIG_LPS_LCLK */ + +- _rtw_memcpy(pcmdbuf, pcmd->parmbuf, pcmd->cmdsz); +- +- if(pcmd->cmdcode < (sizeof(wlancmds) /sizeof(struct cmd_hdl))) +- { +- cmd_hdl = wlancmds[pcmd->cmdcode].h2cfuns; +- +- if (cmd_hdl) +- { +- ret = cmd_hdl(pcmd->padapter, pcmdbuf); +- pcmd->res = ret; +- } ++ if (DBG_CMD_EXECUTE) ++ DBG_871X(ADPT_FMT" "CMD_FMT" %sexecute\n", ADPT_ARG(pcmd->padapter), CMD_ARG(pcmd) ++ , pcmd->res == H2C_ENQ_HEAD ? "ENQ_HEAD " : (pcmd->res == H2C_ENQ_HEAD_FAIL ? "ENQ_HEAD_FAIL " : "")); + +- pcmdpriv->cmd_seq++; +- } +- else +- { +- pcmd->res = H2C_PARAMETERS_ERROR; +- } ++ _rtw_memcpy(pcmdbuf, pcmd->parmbuf, pcmd->cmdsz); ++ ret = cmd_hdl(pcmd->padapter, pcmdbuf); ++ pcmd->res = ret; + +- cmd_hdl = NULL; ++ pcmdpriv->cmd_seq++; + + post_process: + + _enter_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL); + if (pcmd->sctx) { + if (0) +- DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" pcmd->sctx\n", +- FUNC_ADPT_ARG(pcmd->padapter)); ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" pcmd->sctx\n", ++ FUNC_ADPT_ARG(pcmd->padapter)); + if (pcmd->res == H2C_SUCCESS) + rtw_sctx_done(&pcmd->sctx); + else +@@ -660,24 +692,11 @@ post_process: + } + _exit_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL); + +- +- if((cmd_process_time = rtw_get_passing_time_ms(cmd_start_time)) > 1000) +- { +- if (pcmd->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)) { +- struct drvextra_cmd_parm *drvextra_parm = (struct drvextra_cmd_parm *)pcmdbuf; +- DBG_871X(ADPT_FMT" cmd=%d,%d,%d process_time=%d > 1 sec\n", +- ADPT_ARG(pcmd->padapter), pcmd->cmdcode, drvextra_parm->ec_id, drvextra_parm->type, cmd_process_time); +- //rtw_warn_on(1); +- } else if(pcmd->cmdcode == GEN_CMD_CODE(_Set_MLME_EVT)){ +- struct C2HEvent_Header *pc2h_evt_hdr = (struct C2HEvent_Header *)pcmdbuf; +- DBG_871X(ADPT_FMT" cmd=%d,%d, process_time=%d > 1 sec\n", +- ADPT_ARG(pcmd->padapter), pcmd->cmdcode, pc2h_evt_hdr->ID, cmd_process_time); +- //rtw_warn_on(1); +- } else { +- DBG_871X(ADPT_FMT" cmd=%d, process_time=%d > 1 sec\n", +- ADPT_ARG(pcmd->padapter), pcmd->cmdcode, cmd_process_time); +- //rtw_warn_on(1); +- } ++ cmd_process_time = rtw_get_passing_time_ms(cmd_start_time); ++ if (cmd_process_time > 1000) { ++ DBG_871X(ADPT_FMT" "CMD_FMT" process_time=%d\n", ADPT_ARG(pcmd->padapter), CMD_ARG(pcmd), cmd_process_time); ++ if (0) ++ rtw_warn_on(1); + } + + //call callback function for post-processed +@@ -707,16 +726,21 @@ post_process: + + } + +- // free all cmd_obj resources +- do{ +- pcmd = rtw_dequeue_cmd(pcmdpriv); +- if(pcmd==NULL){ + #ifdef CONFIG_LPS_LCLK +- rtw_unregister_cmd_alive(padapter); ++ rtw_unregister_cmd_alive(padapter); + #endif ++ ++ /* to avoid enqueue cmd after free all cmd_obj */ ++ ATOMIC_SET(&(pcmdpriv->cmdthd_running), _FALSE); ++ ++ /* free all cmd_obj resources */ ++ do { ++ pcmd = rtw_dequeue_cmd(pcmdpriv); ++ if (pcmd == NULL) + break; +- } +- //DBG_871X("%s: leaving... drop cmdcode:%u size:%d\n", __FUNCTION__, pcmd->cmdcode, pcmd->cmdsz); ++ ++ if (0) ++ DBG_871X("%s: leaving... drop "CMD_FMT"\n", __func__, CMD_ARG(pcmd)); + + if (pcmd->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)) { + extra_parm = (struct drvextra_cmd_parm *)pcmd->parmbuf; +@@ -726,10 +750,9 @@ post_process: + } + + rtw_free_cmd_obj(pcmd); +- }while(1); ++ } while (1); + + _rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema); +- ATOMIC_SET(&(pcmdpriv->cmdthd_running), _FALSE); + + _func_exit_; + +@@ -912,8 +935,8 @@ _func_enter_; + _rtw_memcpy(&psurveyPara->ssid[i], &ssid[i], sizeof(NDIS_802_11_SSID)); + psurveyPara->ssid_num++; + if (0) +- DBG_871X(FUNC_ADPT_FMT" ssid:(%s, %d)\n", FUNC_ADPT_ARG(padapter), +- psurveyPara->ssid[i].Ssid, psurveyPara->ssid[i].SsidLength); ++ DBG_871X(FUNC_ADPT_FMT" ssid:(%s, %d)\n", FUNC_ADPT_ARG(padapter), ++ psurveyPara->ssid[i].Ssid, psurveyPara->ssid[i].SsidLength); + } + } + } +@@ -926,8 +949,8 @@ _func_enter_; + _rtw_memcpy(&psurveyPara->ch[i], &ch[i], sizeof(struct rtw_ieee80211_channel)); + psurveyPara->ch_num++; + if (0) +- DBG_871X(FUNC_ADPT_FMT" ch:%u\n", FUNC_ADPT_ARG(padapter), +- psurveyPara->ch[i].hw_value); ++ DBG_871X(FUNC_ADPT_FMT" ch:%u\n", FUNC_ADPT_ARG(padapter), ++ psurveyPara->ch[i].hw_value); + } + } + } +@@ -940,13 +963,18 @@ _func_enter_; + + pmlmepriv->scan_start_time = rtw_get_current_time(); + +-#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++#ifdef CONFIG_SCAN_BACKOP + if((padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state&0x03) == WIFI_FW_AP_STATE) +- _set_timer(&pmlmepriv->scan_to_timer, SURVEY_TO * +- ( padapter->mlmeextpriv.max_chan_nums + ( padapter->mlmeextpriv.max_chan_nums / RTW_SCAN_NUM_OF_CH ) * RTW_STAY_AP_CH_MILLISECOND ) + 1000 ); ++ { ++ if(IsSupported5G(padapter->registrypriv.wireless_mode) ++ && IsSupported24G(padapter->registrypriv.wireless_mode)) //dual band ++ mlme_set_scan_to_timer(pmlmepriv, CONC_SCANNING_TIMEOUT_DUAL_BAND); ++ else //single band ++ mlme_set_scan_to_timer(pmlmepriv, CONC_SCANNING_TIMEOUT_SINGLE_BAND); ++ } + else +-#endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE +- _set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT); ++#endif /* CONFIG_SCAN_BACKOP */ ++ mlme_set_scan_to_timer(pmlmepriv, SCANNING_TIMEOUT); + + rtw_led_control(padapter, LED_CTL_SITE_SURVEY); + } else { +@@ -1075,6 +1103,45 @@ _func_exit_; + return res; + } + ++u8 rtw_getmacreg_cmd(_adapter *padapter, u8 len, u32 addr) ++{ ++ struct cmd_obj *ph2c; ++ struct readMAC_parm *preadmacparm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ preadmacparm = (struct readMAC_parm *)rtw_zmalloc(sizeof(struct readMAC_parm)); ++ ++ if (preadmacparm == NULL) { ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, preadmacparm, GEN_CMD_CODE(_GetMACReg)); ++ ++ preadmacparm->len = len; ++ preadmacparm->addr = addr; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++_func_exit_; ++ return res; ++} ++ ++void rtw_usb_catc_trigger_cmd(_adapter *padapter, const char *caller) ++{ ++ DBG_871X("%s caller:%s\n", __func__, caller); ++ rtw_getmacreg_cmd(padapter, 1, 0x1c4); ++} ++ + u8 rtw_setbbreg_cmd(_adapter*padapter, u8 offset, u8 val) + { + struct cmd_obj* ph2c; +@@ -1242,135 +1309,93 @@ void rtw_readtssi_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) + _func_exit_; + } + +-u8 rtw_createbss_cmd(_adapter *padapter) ++static u8 rtw_createbss_cmd(_adapter *adapter, int flags, bool adhoc ++ , s16 req_ch, u8 req_bw, u8 req_offset) + { +- struct cmd_obj* pcmd; +- struct cmd_priv *pcmdpriv=&padapter->cmdpriv; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- WLAN_BSSID_EX *pdev_network = &padapter->registrypriv.dev_network; +- u8 res=_SUCCESS; +- +-_func_enter_; +- +- rtw_led_control(padapter, LED_CTL_START_TO_LINK); ++ struct cmd_obj *cmdobj; ++ struct createbss_parm *parm; ++ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct submit_ctx sctx; ++ u8 res = _SUCCESS; + +- if (pmlmepriv->assoc_ssid.SsidLength == 0){ +- RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,(" createbss for Any SSid:%s\n",pmlmepriv->assoc_ssid.Ssid)); +- } else { +- RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,(" createbss for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); +- } +- +- pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); +- if(pcmd==NULL){ +- res= _FAIL; ++ /* prepare cmd parameter */ ++ parm = (struct createbss_parm *)rtw_zmalloc(sizeof(*parm)); ++ if (parm == NULL) { ++ res = _FAIL; + goto exit; + } + +- _rtw_init_listhead(&pcmd->list); +- pcmd->cmdcode = _CreateBss_CMD_; +- pcmd->parmbuf = (unsigned char *)pdev_network; +- pcmd->cmdsz = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX*)pdev_network); +- pcmd->rsp = NULL; +- pcmd->rspsz = 0; +- +- pdev_network->Length = pcmd->cmdsz; +- +-#ifdef CONFIG_RTL8712 +- //notes: translate IELength & Length after assign the Length to cmdsz; +- pdev_network->Length = cpu_to_le32(pcmd->cmdsz); +- pdev_network->IELength = cpu_to_le32(pdev_network->IELength); +- pdev_network->Ssid.SsidLength = cpu_to_le32(pdev_network->Ssid.SsidLength); +-#endif +- +- res = rtw_enqueue_cmd(pcmdpriv, pcmd); +- +-exit: +- +-_func_exit_; +- +- return res; +-} +- +-u8 rtw_createbss_cmd_ex(_adapter *padapter, unsigned char *pbss, unsigned int sz) +-{ +- struct cmd_obj* pcmd; +- struct cmd_priv *pcmdpriv=&padapter->cmdpriv; +- u8 res=_SUCCESS; +- +-_func_enter_; +- +- pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); +- if(pcmd==NULL){ +- res= _FAIL; +- goto exit; ++ if (adhoc) { ++ /* for now, adhoc doesn't support ch,bw,offset request */ ++ parm->adhoc = 1; ++ } else { ++ parm->adhoc = 0; ++ parm->req_ch = req_ch; ++ parm->req_bw = req_bw; ++ parm->req_offset = req_offset; + } + +- _rtw_init_listhead(&pcmd->list); +- pcmd->cmdcode = GEN_CMD_CODE(_CreateBss); +- pcmd->parmbuf = pbss; +- pcmd->cmdsz = sz; +- pcmd->rsp = NULL; +- pcmd->rspsz = 0; +- +- res = rtw_enqueue_cmd(pcmdpriv, pcmd); +- +-exit: +- +-_func_exit_; +- +- return res; +-} +- +-u8 rtw_startbss_cmd(_adapter *padapter, int flags) +-{ +- struct cmd_obj* pcmd; +- struct cmd_priv *pcmdpriv=&padapter->cmdpriv; +- struct submit_ctx sctx; +- u8 res=_SUCCESS; +- +-_func_enter_; +- + if (flags & RTW_CMDF_DIRECTLY) { + /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ +- start_bss_network(padapter, (u8*)&(padapter->mlmepriv.cur_network.network)); ++ if (H2C_SUCCESS != createbss_hdl(adapter, (u8 *)parm)) ++ res = _FAIL; ++ rtw_mfree((u8 *)parm, sizeof(*parm)); + } else { + /* need enqueue, prepare cmd_obj and enqueue */ +- pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); +- if (pcmd == NULL) { ++ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); ++ if (cmdobj == NULL) { + res = _FAIL; ++ rtw_mfree((u8 *)parm, sizeof(*parm)); + goto exit; + } + +- _rtw_init_listhead(&pcmd->list); +- pcmd->cmdcode = GEN_CMD_CODE(_CreateBss); +- pcmd->parmbuf = NULL; +- pcmd->cmdsz = 0; +- pcmd->rsp = NULL; +- pcmd->rspsz = 0; ++ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, GEN_CMD_CODE(_CreateBss)); + + if (flags & RTW_CMDF_WAIT_ACK) { +- pcmd->sctx = &sctx; ++ cmdobj->sctx = &sctx; + rtw_sctx_init(&sctx, 2000); + } + +- res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); + + if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { + rtw_sctx_wait(&sctx, __func__); + _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); + if (sctx.status == RTW_SCTX_SUBMITTED) +- pcmd->sctx = NULL; ++ cmdobj->sctx = NULL; + _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); + } + } + + exit: +- +-_func_exit_; +- + return res; + } + ++inline u8 rtw_create_ibss_cmd(_adapter *adapter, int flags) ++{ ++ return rtw_createbss_cmd(adapter, flags ++ , 1 ++ , -1, 0, 0 /* for now, adhoc doesn't support ch,bw,offset request */ ++ ); ++} ++ ++inline u8 rtw_startbss_cmd(_adapter *adapter, int flags) ++{ ++ return rtw_createbss_cmd(adapter, flags ++ , 0 ++ , -1, 0, 0 /* doesn't request ch, bw, offset */ ++ ); ++} ++ ++inline u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags, u8 req_ch, u8 req_bw, u8 req_offset) ++{ ++ return rtw_createbss_cmd(adapter, flags ++ , 0 ++ , req_ch, req_bw, req_offset ++ ); ++} ++ + u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network* pnetwork) + { + u8 *auth, res = _SUCCESS; +@@ -1437,6 +1462,7 @@ _func_enter_; + case Ndis802_11APMode: + case Ndis802_11AutoUnknown: + case Ndis802_11InfrastructureMax: ++ case Ndis802_11Monitor: + break; + + } +@@ -1444,7 +1470,11 @@ _func_enter_; + + pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->network.IEs, pnetwork->network.IELength); + +- psecnetwork=(WLAN_BSSID_EX *)&psecuritypriv->sec_bss; ++ /* ++ Modified by Arvin 2015/05/13 ++ Solution for allocating a new WLAN_BSSID_EX to avoid race condition issue between disconnect and joinbss ++ */ ++ psecnetwork = (WLAN_BSSID_EX *)rtw_zmalloc(sizeof(WLAN_BSSID_EX)); + if(psecnetwork==NULL) + { + if(pcmd !=NULL) +@@ -1526,7 +1556,11 @@ _func_enter_; + + #ifdef CONFIG_80211AC_VHT + pvhtpriv->vht_option = _FALSE; +- if (phtpriv->ht_option && pregistrypriv->vht_enable) { ++ if (phtpriv->ht_option ++ && REGSTY_IS_11AC_ENABLE(pregistrypriv) ++ && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) ++ && (!pmlmepriv->country_ent || COUNTRY_CHPLAN_EN_11AC(pmlmepriv->country_ent)) ++ ) { + rtw_restructure_vht_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], + pnetwork->network.IELength, &psecnetwork->IELength); + } +@@ -1549,7 +1583,7 @@ _func_enter_; + } + #endif + +- pcmd->cmdsz = get_WLAN_BSSID_EX_sz(psecnetwork);//get cmdsz before endian conversion ++ pcmd->cmdsz = sizeof(WLAN_BSSID_EX); + + #ifdef CONFIG_RTL8712 + //wlan_network endian conversion +@@ -1667,7 +1701,7 @@ _func_exit_; + return res; + } + +-u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 unicast_key, bool enqueue) ++u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 key_type, bool enqueue) + { + struct cmd_obj* ph2c; + struct set_stakey_parm *psetstakey_para; +@@ -1689,27 +1723,23 @@ _func_enter_; + _rtw_memcpy(psetstakey_para->addr, sta->hwaddr,ETH_ALEN); + + if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)){ +-#ifdef CONFIG_TDLS +- if(sta->tdls_sta_state&TDLS_LINKED_STATE) +- psetstakey_para->algorithm=(u8)sta->dot118021XPrivacy; +- else +-#endif //CONFIG_TDLS + psetstakey_para->algorithm =(unsigned char) psecuritypriv->dot11PrivacyAlgrthm; + }else{ + GET_ENCRY_ALGO(psecuritypriv, sta, psetstakey_para->algorithm, _FALSE); + } + +- if (unicast_key == _TRUE) { ++ if (key_type == GROUP_KEY) { ++ _rtw_memcpy(&psetstakey_para->key, &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, 16); ++ } ++ else if (key_type == UNICAST_KEY) { ++ _rtw_memcpy(&psetstakey_para->key, &sta->dot118021x_UncstKey, 16); ++ } + #ifdef CONFIG_TDLS +- if((sta->tdls_sta_state&TDLS_LINKED_STATE)==TDLS_LINKED_STATE) ++ else if(key_type == TDLS_KEY){ + _rtw_memcpy(&psetstakey_para->key, sta->tpk.tk, 16); +- else +-#endif //CONFIG_TDLS +- _rtw_memcpy(&psetstakey_para->key, &sta->dot118021x_UncstKey, 16); +- } +- else { +- _rtw_memcpy(&psetstakey_para->key, &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, 16); ++ psetstakey_para->algorithm=(u8)sta->dot118021XPrivacy; + } ++#endif /* CONFIG_TDLS */ + + //jeff: set this becasue at least sw key is ready + padapter->securitypriv.busetkipkey=_TRUE; +@@ -1762,7 +1792,7 @@ _func_enter_; + + if(!enqueue) + { +- while((cam_id = rtw_camid_search(padapter, sta->hwaddr, -1)) >= 0) { ++ while ((cam_id = rtw_camid_search(padapter, sta->hwaddr, -1, -1)) >= 0) { + DBG_871X_LEVEL(_drv_always_, "clear key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(sta->hwaddr), cam_id); + clear_cam_entry(padapter, cam_id); + rtw_camid_free(padapter, cam_id); +@@ -1966,6 +1996,46 @@ _func_exit_; + + return res; + } ++ ++u8 rtw_addbarsp_cmd(_adapter *padapter, u8 *addr, u16 tid, u8 status, u8 size, u16 start_seq) ++{ ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ struct cmd_obj *ph2c; ++ struct addBaRsp_parm *paddBaRsp_parm; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ paddBaRsp_parm = (struct addBaRsp_parm *)rtw_zmalloc(sizeof(struct addBaRsp_parm)); ++ ++ if (paddBaRsp_parm == NULL) { ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memcpy(paddBaRsp_parm->addr, addr, ETH_ALEN); ++ paddBaRsp_parm->tid = tid; ++ paddBaRsp_parm->status = status; ++ paddBaRsp_parm->size = size; ++ paddBaRsp_parm->start_seq = start_seq; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, paddBaRsp_parm, GEN_CMD_CODE(_AddBARsp)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} + //add for CONFIG_IEEE80211W, none 11w can use it + u8 rtw_reset_securitypriv_cmd(_adapter*padapter) + { +@@ -2152,59 +2222,72 @@ _func_exit_; + return res; + } + +-u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enqueue, u8 swconfig) ++u8 _rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, const struct country_chplan *country_ent, u8 swconfig) + { +- struct cmd_obj* pcmdobj; +- struct SetChannelPlan_param *setChannelPlan_param; +- struct cmd_priv *pcmdpriv = &padapter->cmdpriv; +- +- u8 res=_SUCCESS; ++ struct cmd_obj *cmdobj; ++ struct SetChannelPlan_param *parm; ++ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct submit_ctx sctx; ++ u8 res = _SUCCESS; + + _func_enter_; + +- RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_chplan_cmd\n")); +- +- // check if allow software config +- if (swconfig && rtw_hal_is_disable_sw_channel_plan(padapter) == _TRUE) +- { ++ /* check if allow software config */ ++ if (swconfig && rtw_hal_is_disable_sw_channel_plan(adapter) == _TRUE) { + res = _FAIL; + goto exit; + } + +- //check input parameter +- if(!rtw_is_channel_plan_valid(chplan)) { ++ /* if country_entry is provided, replace chplan */ ++ if (country_ent) ++ chplan = country_ent->chplan; ++ ++ /* check input parameter */ ++ if (!rtw_is_channel_plan_valid(chplan)) { + res = _FAIL; + goto exit; + } + +- //prepare cmd parameter +- setChannelPlan_param = (struct SetChannelPlan_param *)rtw_zmalloc(sizeof(struct SetChannelPlan_param)); +- if(setChannelPlan_param == NULL) { +- res= _FAIL; ++ /* prepare cmd parameter */ ++ parm = (struct SetChannelPlan_param *)rtw_zmalloc(sizeof(*parm)); ++ if (parm == NULL) { ++ res = _FAIL; + goto exit; + } +- setChannelPlan_param->channel_plan=chplan; ++ parm->country_ent = country_ent; ++ parm->channel_plan = chplan; + +- if(enqueue) +- { +- //need enqueue, prepare cmd_obj and enqueue +- pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); +- if(pcmdobj == NULL){ +- rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param)); +- res=_FAIL; ++ if (flags & RTW_CMDF_DIRECTLY) { ++ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ ++ if (H2C_SUCCESS != set_chplan_hdl(adapter, (u8 *)parm)) ++ res = _FAIL; ++ rtw_mfree((u8 *)parm, sizeof(*parm)); ++ } else { ++ /* need enqueue, prepare cmd_obj and enqueue */ ++ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); ++ if (cmdobj == NULL) { ++ res = _FAIL; ++ rtw_mfree((u8 *)parm, sizeof(*parm)); + goto exit; + } + +- init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelPlan_param, GEN_CMD_CODE(_SetChannelPlan)); +- res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); +- } +- else +- { +- //no need to enqueue, do the cmd hdl directly and free cmd parameter +- if( H2C_SUCCESS != set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param) ) +- res = _FAIL; +- +- rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param)); ++ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, GEN_CMD_CODE(_SetChannelPlan)); ++ ++ if (flags & RTW_CMDF_WAIT_ACK) { ++ cmdobj->sctx = &sctx; ++ rtw_sctx_init(&sctx, 2000); ++ } ++ ++ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); ++ ++ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { ++ rtw_sctx_wait(&sctx, __func__); ++ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); ++ if (sctx.status == RTW_SCTX_SUBMITTED) ++ cmdobj->sctx = NULL; ++ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); ++ } + } + + exit: +@@ -2214,6 +2297,34 @@ _func_exit_; + return res; + } + ++inline u8 rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, u8 swconfig) ++{ ++ return _rtw_set_chplan_cmd(adapter, flags, chplan, NULL, swconfig); ++} ++ ++inline u8 rtw_set_country_cmd(_adapter *adapter, int flags, const char *country_code, u8 swconfig) ++{ ++ const struct country_chplan *ent; ++ ++ if (is_alpha(country_code[0]) == _FALSE ++ || is_alpha(country_code[1]) == _FALSE ++ ) { ++ DBG_871X_LEVEL(_drv_always_, "%s input country_code is not alpha2\n", __func__); ++ return _FAIL; ++ } ++ ++ ent = rtw_get_chplan_from_country(country_code); ++ ++ if (ent == NULL) { ++ DBG_871X_LEVEL(_drv_always_, "%s unsupported country_code:\"%c%c\"\n", __func__, country_code[0], country_code[1]); ++ return _FAIL; ++ } ++ ++ DBG_871X_LEVEL(_drv_always_, "%s country_code:\"%c%c\" mapping to chplan:0x%02x\n", __func__, country_code[0], country_code[1], ent->chplan); ++ ++ return _rtw_set_chplan_cmd(adapter, flags, RTW_CHPLAN_MAX, ent, swconfig); ++} ++ + u8 rtw_led_blink_cmd(_adapter*padapter, PVOID pLed) + { + struct cmd_obj* pcmdobj; +@@ -2289,7 +2400,7 @@ _func_exit_; + return res; + } + +-u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option) ++u8 rtw_tdls_cmd(_adapter *padapter, const u8 *addr, u8 option) + { + struct cmd_obj* pcmdobj; + struct TDLSoption_param *TDLSoption; +@@ -2318,7 +2429,8 @@ _func_enter_; + } + + _rtw_spinlock(&(padapter->tdlsinfo.cmd_lock)); +- _rtw_memcpy(TDLSoption->addr, addr, 6); ++ if (addr != NULL) ++ _rtw_memcpy(TDLSoption->addr, addr, 6); + TDLSoption->option = option; + _rtw_spinunlock(&(padapter->tdlsinfo.cmd_lock)); + init_h2fwcmd_w_parm_no_rsp(pcmdobj, TDLSoption, GEN_CMD_CODE(_TDLS)); +@@ -2334,6 +2446,41 @@ _func_exit_; + return res; + } + ++u8 rtw_enable_hw_update_tsf_cmd(_adapter *padapter) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++ ++ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if (pdrvextra_cmd_parm == NULL) { ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = EN_HW_UPDATE_TSF_WK_CID; ++ pdrvextra_cmd_parm->type = 0; ++ pdrvextra_cmd_parm->size = 0; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ return res; ++} ++ ++ + static void collect_traffic_statistics(_adapter *padapter) + { + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); +@@ -2383,14 +2530,9 @@ static void collect_traffic_statistics(_adapter *padapter) + u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) + { + u8 bEnterPS = _FALSE; +-#ifdef CONFIG_BT_COEXIST +- u16 BusyThresholdHigh = 25; +- u16 BusyThresholdLow = 10; +-#else +- u16 BusyThresholdHigh = 100; +- u16 BusyThresholdLow = 75; +-#endif +- u16 BusyThreshold = BusyThresholdHigh; ++ u16 BusyThresholdHigh; ++ u16 BusyThresholdLow; ++ u16 BusyThreshold; + u8 bBusyTraffic = _FALSE, bTxBusyTraffic = _FALSE, bRxBusyTraffic = _FALSE; + u8 bHigherBusyTraffic = _FALSE, bHigherBusyRxTraffic = _FALSE, bHigherBusyTxTraffic = _FALSE; + +@@ -2403,6 +2545,18 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) + + RT_LINK_DETECT_T * link_detect = &pmlmepriv->LinkDetectInfo; + ++#ifdef CONFIG_BT_COEXIST ++ if (padapter->registrypriv.wifi_spec != 1) { ++ BusyThresholdHigh = 25; ++ BusyThresholdLow = 10; ++ } else ++#endif /* CONFIG_BT_COEXIST */ ++ { ++ BusyThresholdHigh = 100; ++ BusyThresholdLow = 75; ++ } ++ BusyThreshold = BusyThresholdHigh; ++ + collect_traffic_statistics(padapter); + + // +@@ -2458,12 +2612,14 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) + + #ifdef CONFIG_TDLS + #ifdef CONFIG_TDLS_AUTOSETUP +- if( ( ptdlsinfo->watchdog_count % TDLS_WATCHDOG_PERIOD ) == 0 ) //10 * 2sec, periodically sending +- { +- _rtw_memcpy(txmgmt.peer, baddr, ETH_ALEN); +- issue_tdls_dis_req( padapter, &txmgmt ); ++ /* TDLS_WATCHDOG_PERIOD * 2sec, periodically send */ ++ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _TRUE) { ++ if ((ptdlsinfo->watchdog_count % TDLS_WATCHDOG_PERIOD) == 0) { ++ _rtw_memcpy(txmgmt.peer, baddr, ETH_ALEN); ++ issue_tdls_dis_req(padapter, &txmgmt); ++ } ++ ptdlsinfo->watchdog_count++; + } +- ptdlsinfo->watchdog_count++; + #endif //CONFIG_TDLS_AUTOSETUP + #endif //CONFIG_TDLS + +@@ -2477,7 +2633,10 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) + #endif //CONFIG_LPS_SLOW_TRANSITION + ) + { +- //DBG_871X("(-)Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); ++#ifdef DBG_RX_COUNTER_DUMP ++ if( padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA) ++ DBG_871X("(-)Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); ++#endif + bEnterPS= _FALSE; + #ifdef CONFIG_LPS_SLOW_TRANSITION + if(bBusyTraffic == _TRUE) +@@ -2499,7 +2658,10 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) + } + else + { +- //DBG_871X("(+)Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); ++#ifdef DBG_RX_COUNTER_DUMP ++ if( padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA) ++ DBG_871X("(+)Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); ++#endif + #ifdef CONFIG_LPS_SLOW_TRANSITION + if(pmlmepriv->LinkDetectInfo.TrafficTransitionCount>=2) + pmlmepriv->LinkDetectInfo.TrafficTransitionCount -=2; +@@ -2588,6 +2750,8 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) + #endif + } + ++ session_tracker_chk_cmd(padapter, NULL); ++ + pmlmepriv->LinkDetectInfo.NumRxOkInPeriod = 0; + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod = 0; + pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod = 0; +@@ -2627,14 +2791,19 @@ void dynamic_chk_wk_hdl(_adapter *padapter) + + //if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)==_FALSE) + { +- linked_status_chk(padapter, 0); ++ linked_status_chk(padapter, 0); + traffic_status_watchdog(padapter, 0); ++ #ifdef DBG_RX_COUNTER_DUMP ++ rtw_dump_rx_counters(padapter); ++ #endif + dm_DynamicUsbTxAgg(padapter, 0); + } + + #ifdef CONFIG_BEAMFORMING ++#if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/ + beamforming_watchdog(padapter); + #endif ++#endif + + rtw_hal_dm_watchdog(padapter); + +@@ -2650,7 +2819,7 @@ void dynamic_chk_wk_hdl(_adapter *padapter) + + #ifdef CONFIG_IPS_CHECK_IN_WD + //always call rtw_ps_processor() at last one. +- if(is_primary_adapter(padapter)) ++ if (is_primary_adapter(padapter)) + rtw_ps_processor(padapter); + #endif + } +@@ -2717,9 +2886,11 @@ _func_enter_; + LPS_Leave(padapter, "LPS_CTRL_SPECIAL_PACKET"); + break; + case LPS_CTRL_LEAVE: +- //DBG_871X("LPS_CTRL_LEAVE \n"); + LPS_Leave(padapter, "LPS_CTRL_LEAVE"); + break; ++ case LPS_CTRL_LEAVE_CFG80211_PWRMGMT: ++ LPS_Leave(padapter, "CFG80211_PWRMGMT"); ++ break; + case LPS_CTRL_TRAFFIC_BUSY: + LPS_Leave(padapter, "LPS_CTRL_TRAFFIC_BUSY"); + break; +@@ -2960,7 +3131,7 @@ _func_exit_; + #ifdef CONFIG_ANTENNA_DIVERSITY + void antenna_select_wk_hdl(_adapter *padapter, u8 antenna) + { +- rtw_hal_set_hwreg(padapter, HW_VAR_ANTENNA_DIVERSITY_SELECT, (u8 *)(&antenna)); ++ rtw_hal_set_odm_var(padapter, HAL_ODM_ANTDIV_SELECT, &antenna, _TRUE); + } + + u8 rtw_antenna_select_cmd(_adapter*padapter, u8 antenna,u8 enqueue) +@@ -2968,12 +3139,20 @@ u8 rtw_antenna_select_cmd(_adapter*padapter, u8 antenna,u8 enqueue) + struct cmd_obj *ph2c; + struct drvextra_cmd_parm *pdrvextra_cmd_parm; + struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + u8 bSupportAntDiv = _FALSE; + u8 res = _SUCCESS; ++ int i; + + _func_enter_; + rtw_hal_get_def_var(padapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv)); +- if(_FALSE == bSupportAntDiv ) return res; ++ if (_FALSE == bSupportAntDiv) ++ return _FAIL; ++ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ if (rtw_linked_check(dvobj->padapters[i])) ++ return _FAIL; ++ } + + if(_TRUE == enqueue) + { +@@ -3238,7 +3417,271 @@ exit: + return res; + + } +-#endif ++ ++#ifdef CONFIG_DFS_MASTER ++u8 rtw_dfs_master_hdl(_adapter *adapter) ++{ ++ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); ++ struct mlme_priv *mlme = &adapter->mlmepriv; ++ ++ if (!rfctl->dfs_master_enabled) ++ goto exit; ++ ++ if (rtw_get_on_cur_ch_time(adapter) == 0 ++ || rtw_get_passing_time_ms(rtw_get_on_cur_ch_time(adapter)) < 300 ++ ) { ++ /* offchannel , by pass radar detect */ ++ goto cac_status_chk; ++ } ++ ++ if (rfctl->dbg_dfs_master_fake_radar_detect_cnt ++ || rtw_odm_radar_detect(adapter) == _TRUE ++ ) { ++ if (rfctl->dbg_dfs_master_fake_radar_detect_cnt != 0) { ++ DBG_871X(FUNC_ADPT_FMT" fake radar detect, cnt:%d\n", FUNC_ADPT_ARG(adapter) ++ , rfctl->dbg_dfs_master_fake_radar_detect_cnt); ++ rfctl->dbg_dfs_master_fake_radar_detect_cnt--; ++ } ++ ++ if (rfctl->dbg_dfs_master_radar_detect_trigger_non) { ++ /* radar detect debug mode, trigger no mlme flow */ ++ DBG_871X(FUNC_ADPT_FMT" radar detected, trigger no mlme flow for debug\n", FUNC_ADPT_ARG(adapter)); ++ } else { ++ /* TODO: move timer to rfctl */ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ int i; ++ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ if (!dvobj->padapters[i]) ++ continue; ++ if (check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_AP_STATE) ++ && check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_AP_STATE)) ++ break; ++ } ++ ++ if (i >= dvobj->iface_nums) { ++ /* what? */ ++ rtw_warn_on(1); ++ } else { ++ rtw_chset_update_non_ocp(dvobj->padapters[i]->mlmeextpriv.channel_set ++ , rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset); ++ ++ /* change op ch, inform ch switch */ ++ rtw_change_bss_chbw_cmd(dvobj->padapters[i], RTW_CMDF_DIRECTLY, 0, 0, 0); ++ } ++ ++ if (rfctl->dfs_master_enabled) ++ goto set_timer; ++ goto exit; ++ } ++ } ++ ++cac_status_chk: ++ ++ if (!IS_UNDER_CAC(rfctl) && !IS_CAC_STOPPED(rfctl)) { ++ u8 pause = 0x00; ++ ++ rtw_hal_set_hwreg(adapter, HW_VAR_TXPAUSE, &pause); ++ rfctl->cac_end_time = RTW_CAC_STOPPED; ++ } ++ ++set_timer: ++ _set_timer(&mlme->dfs_master_timer, DFS_MASTER_TIMER_MS); ++ ++exit: ++ return H2C_SUCCESS; ++} ++ ++u8 rtw_dfs_master_cmd(_adapter *adapter, bool enqueue) ++{ ++ struct cmd_obj *cmdobj; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; ++ u8 res = _FAIL; ++ ++ if (enqueue) { ++ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (cmdobj == NULL) ++ goto exit; ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if (pdrvextra_cmd_parm == NULL) { ++ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = DFS_MASTER_WK_CID; ++ pdrvextra_cmd_parm->type = 0; ++ pdrvextra_cmd_parm->size = 0; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ ++ init_h2fwcmd_w_parm_no_rsp(cmdobj, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); ++ } else { ++ rtw_dfs_master_hdl(adapter); ++ res = _SUCCESS; ++ } ++ ++exit: ++ return res; ++} ++ ++void rtw_dfs_master_timer_hdl(RTW_TIMER_HDL_ARGS) ++{ ++ _adapter *adapter = (_adapter *)FunctionContext; ++ ++ rtw_dfs_master_cmd(adapter, _TRUE); ++} ++ ++void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset) ++{ ++ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); ++ ++ /* TODO: move timer to rfctl */ ++ adapter = GET_PRIMARY_ADAPTER(adapter); ++ ++ DBG_871X(FUNC_ADPT_FMT" on %u,%u,%u\n", FUNC_ADPT_ARG(adapter), ch, bw, offset); ++ ++ rfctl->pre_radar_detect_by_sta_link = rfctl->radar_detect_by_sta_link; ++ rfctl->radar_detect_by_sta_link = _FALSE; ++ ++ rfctl->pre_radar_detect_ch = rfctl->radar_detect_ch; ++ rfctl->pre_radar_detect_bw = rfctl->radar_detect_bw; ++ rfctl->pre_radar_detect_offset = rfctl->radar_detect_offset; ++ rfctl->radar_detect_ch = ch; ++ rfctl->radar_detect_bw = bw; ++ rfctl->radar_detect_offset = offset; ++ ++ if (rtw_is_cac_reset_needed(adapter) == _TRUE) ++ rtw_rfctl_reset_cac(adapter_to_rfctl(adapter)); ++ ++ if (!rfctl->dfs_master_enabled) { ++ DBG_871X(FUNC_ADPT_FMT" set dfs_master_enabled\n", FUNC_ADPT_ARG(adapter)); ++ rfctl->dfs_master_enabled = 1; ++ _set_timer(&adapter->mlmepriv.dfs_master_timer, DFS_MASTER_TIMER_MS); ++ ++ if (rtw_rfctl_overlap_radar_detect_ch(rfctl)) { ++ if (IS_UNDER_CAC(rfctl)) { ++ u8 pause = 0xFF; ++ ++ rtw_hal_set_hwreg(adapter, HW_VAR_TXPAUSE, &pause); ++ } ++ rtw_odm_radar_detect_enable(adapter); ++ } ++ } ++} ++ ++void rtw_dfs_master_disable(_adapter *adapter, bool ld_sta_in_dfs) ++{ ++ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); ++ ++ /* TODO: move timer to rfctl */ ++ adapter = GET_PRIMARY_ADAPTER(adapter); ++ ++ rfctl->pre_radar_detect_by_sta_link = rfctl->radar_detect_by_sta_link; ++ rfctl->radar_detect_by_sta_link = ld_sta_in_dfs; ++ ++ if (rfctl->dfs_master_enabled) { ++ bool overlap_radar_detect_ch = rtw_rfctl_overlap_radar_detect_ch(rfctl); ++ ++ DBG_871X(FUNC_ADPT_FMT" clear dfs_master_enabled\n", FUNC_ADPT_ARG(adapter)); ++ ++ rfctl->dfs_master_enabled = 0; ++ rfctl->radar_detect_ch = rfctl->pre_radar_detect_ch = 0; ++ rfctl->radar_detect_bw = rfctl->pre_radar_detect_bw = 0; ++ rfctl->radar_detect_offset = rfctl->pre_radar_detect_offset = 0; ++ rfctl->cac_end_time = RTW_CAC_STOPPED; ++ _cancel_timer_ex(&adapter->mlmepriv.dfs_master_timer); ++ ++ if (overlap_radar_detect_ch) { ++ u8 pause = 0x00; ++ ++ rtw_hal_set_hwreg(adapter, HW_VAR_TXPAUSE, &pause); ++ rtw_odm_radar_detect_disable(adapter); ++ } ++ } ++} ++ ++void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action) ++{ ++ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; ++ u8 ld_sta_num, lg_sta_num, ap_num; ++ u8 u_ch, u_bw, u_offset; ++ bool ld_sta_in_dfs = _FALSE; ++ bool sync_ch = _FALSE; /* _FALSE: asign channel directly */ ++ bool needed = _FALSE; ++ ++ rtw_dev_iface_status_no_self(adapter, NULL, &ld_sta_num, &lg_sta_num, &ap_num, NULL); ++ rtw_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset); ++ if (u_ch != 0) ++ sync_ch = _TRUE; ++ ++ switch (self_action) { ++ case MLME_STA_CONNECTING: ++ lg_sta_num++; ++ break; ++ case MLME_STA_CONNECTED: ++ ld_sta_num++; ++ break; ++ case MLME_AP_STARTED: ++ ap_num++; ++ break; ++ case MLME_AP_STOPPED: ++ case MLME_STA_DISCONNECTED: ++ default: ++ break; ++ } ++ ++ if (sync_ch == _TRUE) { ++ if (!rtw_is_chbw_grouped(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset)) { ++ DBG_871X(FUNC_ADPT_FMT" can't sync %u,%u,%u with %u,%u,%u\n", FUNC_ADPT_ARG(adapter) ++ , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset); ++ goto apply; ++ } ++ ++ rtw_sync_chbw(&mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset ++ , &u_ch, &u_bw, &u_offset); ++ } else { ++ u_ch = mlmeext->cur_channel; ++ u_bw = mlmeext->cur_bwmode; ++ u_offset = mlmeext->cur_ch_offset; ++ } ++ ++ if (ld_sta_num > 0) { ++ /* rely on AP on which STA mode connects */ ++ if (rtw_is_dfs_ch(u_ch, u_bw, u_offset)) ++ ld_sta_in_dfs = _TRUE; ++ goto apply; ++ } ++ ++ if (lg_sta_num > 0) { ++ /* STA mode is linking */ ++ goto apply; ++ } ++ ++ if (ap_num == 0) { ++ /* No working AP mode */ ++ goto apply; ++ } ++ ++ if (rtw_is_dfs_ch(u_ch, u_bw, u_offset)) ++ needed = _TRUE; ++ ++apply: ++ ++ DBG_871X(FUNC_ADPT_FMT" needed:%d, self_action:%u\n" ++ , FUNC_ADPT_ARG(adapter), needed, self_action); ++ DBG_871X(FUNC_ADPT_FMT" ld_sta_num:%u, lg_sta_num:%u, ap_num:%u, %u,%u,%u\n" ++ , FUNC_ADPT_ARG(adapter), ld_sta_num, lg_sta_num, ap_num, u_ch, u_bw, u_offset); ++ ++ if (needed == _TRUE) ++ rtw_dfs_master_enable(adapter, u_ch, u_bw, u_offset); ++ else ++ rtw_dfs_master_disable(adapter, ld_sta_in_dfs); ++} ++#endif /* CONFIG_DFS_MASTER */ ++ ++#endif /* CONFIG_AP_MODE */ + + #ifdef CONFIG_BT_COEXIST + struct btinfo { +@@ -3282,35 +3725,39 @@ void btinfo_evt_dump(void *sel, void *buf) + DBG_871X_SEL_NL(sel, "cid:0x%02x, len:%u\n", info->cid, info->len); + + if (info->len > 2) +- DBG_871X_SEL_NL(sel, "byte2:%s%s%s%s%s%s%s%s\n" +- , info->bConnection?"bConnection ":"" +- , info->bSCOeSCO?"bSCOeSCO ":"" +- , info->bInQPage?"bInQPage ":"" +- , info->bACLBusy?"bACLBusy ":"" +- , info->bSCOBusy?"bSCOBusy ":"" +- , info->bHID?"bHID ":"" +- , info->bA2DP?"bA2DP ":"" +- , info->bFTP?"bFTP":"" +- ); ++ DBG_871X_SEL_NL(sel, "byte2:%s%s%s%s%s%s%s%s\n" ++ , info->bConnection?"bConnection ":"" ++ , info->bSCOeSCO?"bSCOeSCO ":"" ++ , info->bInQPage?"bInQPage ":"" ++ , info->bACLBusy?"bACLBusy ":"" ++ , info->bSCOBusy?"bSCOBusy ":"" ++ , info->bHID?"bHID ":"" ++ , info->bA2DP?"bA2DP ":"" ++ , info->bFTP?"bFTP":"" ++ ); + + if (info->len > 3) +- DBG_871X_SEL_NL(sel, "retry_cnt:%u\n", info->retry_cnt); ++ DBG_871X_SEL_NL(sel, "retry_cnt:%u\n", info->retry_cnt); + + if (info->len > 4) +- DBG_871X_SEL_NL(sel, "rssi:%u\n", info->rssi); ++ DBG_871X_SEL_NL(sel, "rssi:%u\n", info->rssi); + + if (info->len > 5) +- DBG_871X_SEL_NL(sel, "byte5:%s%s\n" +- , info->eSCO_SCO?"eSCO_SCO ":"" +- , info->Master_Slave?"Master_Slave ":"" +- ); ++ DBG_871X_SEL_NL(sel, "byte5:%s%s\n" ++ , info->eSCO_SCO?"eSCO_SCO ":"" ++ , info->Master_Slave?"Master_Slave ":"" ++ ); + } + + static void rtw_btinfo_hdl(_adapter *adapter, u8 *buf, u16 buf_len) + { + #define BTINFO_WIFI_FETCH 0x23 + #define BTINFO_BT_AUTO_RPT 0x27 ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ struct btinfo_8761ATV *info = (struct btinfo_8761ATV *)buf; ++#else //!CONFIG_BT_COEXIST_SOCKET_TRX + struct btinfo *info = (struct btinfo *)buf; ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX + u8 cmd_idx; + u8 len; + +@@ -3325,14 +3772,23 @@ static void rtw_btinfo_hdl(_adapter *adapter, u8 *buf, u16 buf_len) + + //#define DBG_PROC_SET_BTINFO_EVT + #ifdef DBG_PROC_SET_BTINFO_EVT ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ DBG_871X("%s: btinfo[0]=%x,btinfo[1]=%x,btinfo[2]=%x,btinfo[3]=%x btinfo[4]=%x,btinfo[5]=%x,btinfo[6]=%x,btinfo[7]=%x\n" ++ , __func__, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); ++#else//!CONFIG_BT_COEXIST_SOCKET_TRX + btinfo_evt_dump(RTW_DBGDUMP, info); +-#endif ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX ++#endif // DBG_PROC_SET_BTINFO_EVT + + /* transform BT-FW btinfo to WiFI-FW C2H format and notify */ + if (cmd_idx == BTINFO_WIFI_FETCH) + buf[1] = 0; + else if (cmd_idx == BTINFO_BT_AUTO_RPT) + buf[1] = 2; ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ else if(0x01 == cmd_idx || 0x02 == cmd_idx) ++ buf[1] = buf[0]; ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX + rtw_btcoex_BtInfoNotify(adapter ,len+1, &buf[1]); + } + +@@ -3379,7 +3835,7 @@ u8 rtw_btinfo_cmd(_adapter *adapter, u8 *buf, u16 len) + exit: + return res; + } +-#endif ++#endif //CONFIG_BT_COEXIST + + //#ifdef CONFIG_C2H_PACKET_EN + u8 rtw_c2h_packet_wk_cmd(PADAPTER padapter, u8 *pbuf, u16 length) +@@ -3387,6 +3843,7 @@ u8 rtw_c2h_packet_wk_cmd(PADAPTER padapter, u8 *pbuf, u16 length) + struct cmd_obj *ph2c; + struct drvextra_cmd_parm *pdrvextra_cmd_parm; + struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 *extra_cmd_buf; + u8 res = _SUCCESS; + + ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); +@@ -3402,10 +3859,19 @@ u8 rtw_c2h_packet_wk_cmd(PADAPTER padapter, u8 *pbuf, u16 length) + goto exit; + } + ++ extra_cmd_buf = rtw_zmalloc(length); ++ if (extra_cmd_buf == NULL) { ++ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memcpy(extra_cmd_buf, pbuf, length); + pdrvextra_cmd_parm->ec_id = C2H_WK_CID; + pdrvextra_cmd_parm->type = 0; + pdrvextra_cmd_parm->size = length; +- pdrvextra_cmd_parm->pbuf = pbuf; ++ pdrvextra_cmd_parm->pbuf = extra_cmd_buf; + + init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + +@@ -3536,6 +4002,9 @@ static void c2h_wk_callback(_workitem *work) + rtw_mfree(c2h_evt, 16); + continue; + } ++ } else { ++ rtw_warn_on(1); ++ continue; + } + + /* Special pointer to trigger c2h_evt_clear only */ +@@ -3561,6 +4030,284 @@ static void c2h_wk_callback(_workitem *work) + } + #endif + ++u8 session_tracker_cmd(_adapter *adapter, u8 cmd, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) ++{ ++ struct cmd_priv *cmdpriv = &adapter->cmdpriv; ++ struct cmd_obj *cmdobj; ++ struct drvextra_cmd_parm *cmd_parm; ++ struct st_cmd_parm *st_parm; ++ u8 res = _SUCCESS; ++ ++ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (cmdobj == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if (cmd_parm == NULL) { ++ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ st_parm = (struct st_cmd_parm *)rtw_zmalloc(sizeof(struct st_cmd_parm)); ++ if (st_parm == NULL) { ++ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *)cmd_parm, sizeof(struct drvextra_cmd_parm)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ st_parm->cmd = cmd; ++ st_parm->sta = sta; ++ if (cmd != ST_CMD_CHK) { ++ _rtw_memcpy(&st_parm->local_naddr, local_naddr, 4); ++ _rtw_memcpy(&st_parm->local_port, local_port, 2); ++ _rtw_memcpy(&st_parm->remote_naddr, remote_naddr, 4); ++ _rtw_memcpy(&st_parm->remote_port, remote_port, 2); ++ } ++ ++ cmd_parm->ec_id = SESSION_TRACKER_WK_CID; ++ cmd_parm->type = 0; ++ cmd_parm->size = sizeof(struct st_cmd_parm); ++ cmd_parm->pbuf = (u8 *)st_parm; ++ init_h2fwcmd_w_parm_no_rsp(cmdobj, cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ cmdobj->no_io = 1; ++ ++ res = rtw_enqueue_cmd(cmdpriv, cmdobj); ++ ++exit: ++ return res; ++} ++ ++inline u8 session_tracker_chk_cmd(_adapter *adapter, struct sta_info *sta) ++{ ++ return session_tracker_cmd(adapter, ST_CMD_CHK, sta, NULL, NULL, NULL, NULL); ++} ++ ++inline u8 session_tracker_add_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) ++{ ++ return session_tracker_cmd(adapter, ST_CMD_ADD, sta, local_naddr, local_port, remote_naddr, remote_port); ++} ++ ++inline u8 session_tracker_del_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) ++{ ++ return session_tracker_cmd(adapter, ST_CMD_DEL, sta, local_naddr, local_port, remote_naddr, remote_port); ++} ++ ++void session_tracker_chk_for_sta(_adapter *adapter, struct sta_info *sta) ++{ ++ struct st_ctl_t *st_ctl = &sta->st_ctl; ++ int i; ++ _irqL irqL; ++ _list *plist, *phead, *pnext; ++ _list dlist; ++ struct session_tracker *st = NULL; ++ u8 op_wfd_mode = MIRACAST_DISABLED; ++ ++ if (DBG_SESSION_TRACKER) ++ DBG_871X(FUNC_ADPT_FMT" sta:%p\n", FUNC_ADPT_ARG(adapter), sta); ++ ++ if (!(sta->state & _FW_LINKED)) ++ goto exit; ++ ++ for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) { ++ if (st_ctl->reg[i].s_proto != 0) ++ break; ++ } ++ if (i >= SESSION_TRACKER_REG_ID_NUM) ++ goto chk_sta; ++ ++ _rtw_init_listhead(&dlist); ++ ++ _enter_critical_bh(&st_ctl->tracker_q.lock, &irqL); ++ ++ phead = &st_ctl->tracker_q.queue; ++ plist = get_next(phead); ++ pnext = get_next(plist); ++ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ st = LIST_CONTAINOR(plist, struct session_tracker, list); ++ plist = pnext; ++ pnext = get_next(pnext); ++ ++ if (st->status != ST_STATUS_ESTABLISH ++ && rtw_get_passing_time_ms(st->set_time) > ST_EXPIRE_MS ++ ) { ++ rtw_list_delete(&st->list); ++ rtw_list_insert_tail(&st->list, &dlist); ++ } ++ ++ /* TODO: check OS for status update */ ++ if (st->status == ST_STATUS_CHECK) ++ st->status = ST_STATUS_ESTABLISH; ++ ++ if (st->status != ST_STATUS_ESTABLISH) ++ continue; ++ ++ #ifdef CONFIG_WFD ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" local:%u, remote:%u, rtsp:%u, %u, %u\n", FUNC_ADPT_ARG(adapter) ++ , ntohs(st->local_port), ntohs(st->remote_port), adapter->wfd_info.rtsp_ctrlport, adapter->wfd_info.tdls_rtsp_ctrlport ++ , adapter->wfd_info.peer_rtsp_ctrlport); ++ if (ntohs(st->local_port) == adapter->wfd_info.rtsp_ctrlport) ++ op_wfd_mode |= MIRACAST_SINK; ++ if (ntohs(st->local_port) == adapter->wfd_info.tdls_rtsp_ctrlport) ++ op_wfd_mode |= MIRACAST_SINK; ++ if (ntohs(st->remote_port) == adapter->wfd_info.peer_rtsp_ctrlport) ++ op_wfd_mode |= MIRACAST_SOURCE; ++ #endif ++ } ++ ++ _exit_critical_bh(&st_ctl->tracker_q.lock, &irqL); ++ ++ plist = get_next(&dlist); ++ while (rtw_end_of_queue_search(&dlist, plist) == _FALSE) { ++ st = LIST_CONTAINOR(plist, struct session_tracker, list); ++ plist = get_next(plist); ++ rtw_mfree((u8 *)st, sizeof(struct session_tracker)); ++ } ++ ++chk_sta: ++ if (STA_OP_WFD_MODE(sta) != op_wfd_mode) { ++ STA_SET_OP_WFD_MODE(sta, op_wfd_mode); ++ rtw_sta_media_status_rpt_cmd(adapter, sta, 1); ++ } ++ ++exit: ++ return; ++} ++ ++void session_tracker_chk_for_adapter(_adapter *adapter) ++{ ++ struct sta_priv *stapriv = &adapter->stapriv; ++ struct sta_info *sta; ++ int i; ++ _irqL irqL; ++ _list *plist, *phead; ++ u8 op_wfd_mode = MIRACAST_DISABLED; ++ ++ _enter_critical_bh(&stapriv->sta_hash_lock, &irqL); ++ ++ for (i = 0; i < NUM_STA; i++) { ++ phead = &(stapriv->sta_hash[i]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ sta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ plist = get_next(plist); ++ ++ session_tracker_chk_for_sta(adapter, sta); ++ ++ op_wfd_mode |= STA_OP_WFD_MODE(sta); ++ } ++ } ++ ++ _exit_critical_bh(&stapriv->sta_hash_lock, &irqL); ++ ++#ifdef CONFIG_WFD ++ adapter->wfd_info.op_wfd_mode = MIRACAST_MODE_REVERSE(op_wfd_mode); ++#endif ++} ++ ++void session_tracker_cmd_hdl(_adapter *adapter, struct st_cmd_parm *parm) ++{ ++ u8 cmd = parm->cmd; ++ struct sta_info *sta = parm->sta; ++ ++ if (cmd == ST_CMD_CHK) { ++ if (sta) ++ session_tracker_chk_for_sta(adapter, sta); ++ else ++ session_tracker_chk_for_adapter(adapter); ++ ++ goto exit; ++ ++ } else if (cmd == ST_CMD_ADD || cmd == ST_CMD_DEL) { ++ struct st_ctl_t *st_ctl; ++ u32 local_naddr = parm->local_naddr; ++ u16 local_port = parm->local_port; ++ u32 remote_naddr = parm->remote_naddr; ++ u16 remote_port = parm->remote_port; ++ struct session_tracker *st = NULL; ++ _irqL irqL; ++ _list *plist, *phead; ++ u8 free_st = 0; ++ u8 alloc_st = 0; ++ ++ if (DBG_SESSION_TRACKER) ++ DBG_871X(FUNC_ADPT_FMT" cmd:%u, sta:%p, local:"IP_FMT":"PORT_FMT", remote:"IP_FMT":"PORT_FMT"\n" ++ , FUNC_ADPT_ARG(adapter), cmd, sta ++ , IP_ARG(&local_naddr), PORT_ARG(&local_port) ++ , IP_ARG(&remote_naddr), PORT_ARG(&remote_port) ++ ); ++ ++ if (!(sta->state & _FW_LINKED)) ++ goto exit; ++ ++ st_ctl = &sta->st_ctl; ++ ++ _enter_critical_bh(&st_ctl->tracker_q.lock, &irqL); ++ ++ phead = &st_ctl->tracker_q.queue; ++ plist = get_next(phead); ++ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ st = LIST_CONTAINOR(plist, struct session_tracker, list); ++ ++ if (st->local_naddr == local_naddr ++ && st->local_port == local_port ++ && st->remote_naddr == remote_naddr ++ && st->remote_port == remote_port) ++ break; ++ ++ plist = get_next(plist); ++ } ++ ++ if (rtw_end_of_queue_search(phead, plist) == _TRUE) ++ st = NULL; ++ ++ switch (cmd) { ++ case ST_CMD_DEL: ++ if (st) { ++ rtw_list_delete(plist); ++ free_st = 1; ++ } ++ goto unlock; ++ case ST_CMD_ADD: ++ if (!st) ++ alloc_st = 1; ++ } ++ ++unlock: ++ _exit_critical_bh(&st_ctl->tracker_q.lock, &irqL); ++ ++ if (free_st) { ++ rtw_mfree((u8 *)st, sizeof(struct session_tracker)); ++ goto exit; ++ } ++ ++ if (alloc_st) { ++ st = (struct session_tracker *)rtw_zmalloc(sizeof(struct session_tracker)); ++ if (!st) ++ goto exit; ++ ++ st->local_naddr = local_naddr; ++ st->local_port = local_port; ++ st->remote_naddr = remote_naddr; ++ st->remote_port = remote_port; ++ st->set_time = rtw_get_current_time(); ++ st->status = ST_STATUS_CHECK; ++ ++ _enter_critical_bh(&st_ctl->tracker_q.lock, &irqL); ++ rtw_list_insert_tail(&st->list, phead); ++ _exit_critical_bh(&st_ctl->tracker_q.lock, &irqL); ++ } ++ } ++ ++exit: ++ return; ++} ++ + u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) + { + struct drvextra_cmd_parm *pdrvextra_cmd; +@@ -3570,26 +4317,27 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) + + pdrvextra_cmd = (struct drvextra_cmd_parm*)pbuf; + +- switch(pdrvextra_cmd->ec_id) +- { +- case DYNAMIC_CHK_WK_CID://only primary padapter go to this cmd, but execute dynamic_chk_wk_hdl() for two interfaces ++ switch (pdrvextra_cmd->ec_id) { ++ case STA_MSTATUS_RPT_WK_CID: ++ rtw_sta_media_status_rpt_cmd_hdl(padapter, (struct sta_media_status_rpt_cmd_parm *)pdrvextra_cmd->pbuf); ++ break; ++ ++ case DYNAMIC_CHK_WK_CID:/*only primary padapter go to this cmd, but execute dynamic_chk_wk_hdl() for two interfaces */ + #ifdef CONFIG_CONCURRENT_MODE +- if(padapter->pbuddy_adapter) +- { ++ if (padapter->pbuddy_adapter) + dynamic_chk_wk_hdl(padapter->pbuddy_adapter); +- } +-#endif //CONFIG_CONCURRENT_MODE ++#endif + dynamic_chk_wk_hdl(padapter); + break; + case POWER_SAVING_CTRL_WK_CID: +- power_saving_wk_hdl(padapter); ++ power_saving_wk_hdl(padapter); + break; + #ifdef CONFIG_LPS + case LPS_CTRL_WK_CID: + lps_ctrl_wk_hdl(padapter, (u8)pdrvextra_cmd->type); + break; +- case DM_IN_LPS_WK_CID: +- rtw_dm_in_lps_hdl(padapter); ++ case DM_IN_LPS_WK_CID: ++ rtw_dm_in_lps_hdl(padapter); + break; + case LPS_CHANGE_DTIM_CID: + rtw_lps_change_dtim_hdl(padapter, (u8)pdrvextra_cmd->type); +@@ -3609,25 +4357,27 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) + case P2P_PS_WK_CID: + p2p_ps_wk_hdl(padapter, pdrvextra_cmd->type); + break; +-#endif //CONFIG_P2P_PS ++#endif + #ifdef CONFIG_P2P + case P2P_PROTO_WK_CID: +- // Commented by Albert 2011/07/01 +- // I used the type_size as the type command +- p2p_protocol_wk_hdl( padapter, pdrvextra_cmd->type ); ++ /* ++ * Commented by Albert 2011/07/01 ++ * I used the type_size as the type command ++ */ ++ p2p_protocol_wk_hdl(padapter, pdrvextra_cmd->type); + break; +-#endif //CONFIG_P2P ++#endif + #ifdef CONFIG_AP_MODE + case CHECK_HIQ_WK_CID: + rtw_chk_hi_queue_hdl(padapter); + break; +-#endif //CONFIG_AP_MODE ++#endif + #ifdef CONFIG_INTEL_WIDI + case INTEl_WIDI_WK_CID: + intel_widi_wk_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); + break; +-#endif //CONFIG_INTEL_WIDI +- //add for CONFIG_IEEE80211W, none 11w can use it ++#endif ++ /* add for CONFIG_IEEE80211W, none 11w can use it */ + case RESET_SECURITYPRIV: + reset_securitypriv_hdl(padapter); + break; +@@ -3645,15 +4395,28 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) + case BEAMFORMING_WK_CID: + beamforming_wk_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); + break; +-#endif //CONFIG_BEAMFORMING ++#endif + case DM_RA_MSK_WK_CID: + rtw_dm_ra_mask_hdl(padapter, (struct sta_info *)pdrvextra_cmd->pbuf); + break; + #ifdef CONFIG_BT_COEXIST + case BTINFO_WK_CID: +- rtw_btinfo_hdl(padapter ,pdrvextra_cmd->pbuf, pdrvextra_cmd->size); ++ rtw_btinfo_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->size); + break; + #endif ++#ifdef CONFIG_DFS_MASTER ++ case DFS_MASTER_WK_CID: ++ rtw_dfs_master_hdl(padapter); ++ break; ++#endif ++ case SESSION_TRACKER_WK_CID: ++ session_tracker_cmd_hdl(padapter, (struct st_cmd_parm *)pdrvextra_cmd->pbuf); ++ break; ++ ++ case EN_HW_UPDATE_TSF_WK_CID: ++ rtw_hal_set_hwreg(padapter, HW_VAR_EN_HW_UPDATE_TSF, NULL); ++ break; ++ + default: + break; + } +@@ -3676,10 +4439,10 @@ _func_enter_; + { + //TODO: cancel timer and do timeout handler directly... + //need to make timeout handlerOS independent +- _set_timer(&pmlmepriv->scan_to_timer, 1); ++ mlme_set_scan_to_timer(pmlmepriv, 1); + } + else if (pcmd->res != H2C_SUCCESS) { +- _set_timer(&pmlmepriv->scan_to_timer, 1); ++ mlme_set_scan_to_timer(pmlmepriv, 1); + RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ********Error: MgntActrtw_set_802_11_bssid_LIST_SCAN Fail ************\n\n.")); + } + +@@ -3719,6 +4482,16 @@ _func_exit_; + } + + ++void rtw_getmacreg_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd) ++{ ++ ++_func_enter_; ++ ++ rtw_free_cmd_obj(pcmd); ++ ++_func_exit_; ++} ++ + void rtw_joinbss_cmd_callback(_adapter* padapter, struct cmd_obj *pcmd) + { + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +@@ -3741,132 +4514,62 @@ _func_enter_; + _func_exit_; + } + +-void rtw_createbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd) ++void rtw_create_ibss_post_hdl(_adapter *padapter, int status) + { + _irqL irqL; + u8 timer_cancelled; + struct sta_info *psta = NULL; + struct wlan_network *pwlan = NULL; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)pcmd->parmbuf; +- struct wlan_network *tgt_network = &(pmlmepriv->cur_network); +- +-_func_enter_; ++ WLAN_BSSID_EX *pdev_network = &padapter->registrypriv.dev_network; ++ struct wlan_network *mlme_cur_network = &(pmlmepriv->cur_network); + +- if (pcmd->parmbuf == NULL) +- goto exit; ++ if (status != H2C_SUCCESS) ++ _set_timer(&pmlmepriv->assoc_timer, 1); + +- if((pcmd->res != H2C_SUCCESS)) +- { +- RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ********Error: rtw_createbss_cmd_callback Fail ************\n\n.")); +- _set_timer(&pmlmepriv->assoc_timer, 1 ); +- } +- + _cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled); + +-#ifdef CONFIG_FW_MLMLE +- //endian_convert +- pnetwork->Length = le32_to_cpu(pnetwork->Length); +- pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength); +- pnetwork->Privacy =le32_to_cpu(pnetwork->Privacy); +- pnetwork->Rssi = le32_to_cpu(pnetwork->Rssi); +- pnetwork->NetworkTypeInUse =le32_to_cpu(pnetwork->NetworkTypeInUse); +- pnetwork->Configuration.ATIMWindow = le32_to_cpu(pnetwork->Configuration.ATIMWindow); +- //pnetwork->Configuration.BeaconPeriod = le32_to_cpu(pnetwork->Configuration.BeaconPeriod); +- pnetwork->Configuration.DSConfig =le32_to_cpu(pnetwork->Configuration.DSConfig); +- pnetwork->Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->Configuration.FHConfig.DwellTime); +- pnetwork->Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->Configuration.FHConfig.HopPattern); +- pnetwork->Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->Configuration.FHConfig.HopSet); +- pnetwork->Configuration.FHConfig.Length=le32_to_cpu(pnetwork->Configuration.FHConfig.Length); +- pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length); +- pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode); +- pnetwork->IELength = le32_to_cpu(pnetwork->IELength); +-#endif +- + _enter_critical_bh(&pmlmepriv->lock, &irqL); +- +- +- if(check_fwstate(pmlmepriv, WIFI_AP_STATE) ) +- { +- psta = rtw_get_stainfo(&padapter->stapriv, pnetwork->MacAddress); +- if(!psta) +- { +- psta = rtw_alloc_stainfo(&padapter->stapriv, pnetwork->MacAddress); +- if (psta == NULL) +- { +- RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nCan't alloc sta_info when createbss_cmd_callback\n")); +- goto createbss_cmd_fail ; +- } +- } +- +- rtw_indicate_connect( padapter); +- } +- else ++ + { +- _irqL irqL; ++ _irqL irqL; + + pwlan = _rtw_alloc_network(pmlmepriv); + _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); +- if ( pwlan == NULL) +- { ++ if (pwlan == NULL) { + pwlan = rtw_get_oldest_wlan_network(&pmlmepriv->scanned_queue); +- if( pwlan == NULL) +- { +- RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n Error: can't get pwlan in rtw_joinbss_event_callback \n")); ++ if (pwlan == NULL) { ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("Error: can't get pwlan in rtw_joinbss_event_callback\n")); + _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); + goto createbss_cmd_fail; + } +- pwlan->last_scanned = rtw_get_current_time(); +- } +- else +- { ++ pwlan->last_scanned = rtw_get_current_time(); ++ } else { + rtw_list_insert_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue); + } +- +- pnetwork->Length = get_WLAN_BSSID_EX_sz(pnetwork); +- _rtw_memcpy(&(pwlan->network), pnetwork, pnetwork->Length); +- //pwlan->fixed = _TRUE; + +- //rtw_list_insert_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue); ++ pdev_network->Length = get_WLAN_BSSID_EX_sz(pdev_network); ++ _rtw_memcpy(&(pwlan->network), pdev_network, pdev_network->Length); ++ //pwlan->fixed = _TRUE; + +- // copy pdev_network information to pmlmepriv->cur_network +- _rtw_memcpy(&tgt_network->network, pnetwork, (get_WLAN_BSSID_EX_sz(pnetwork))); ++ /* copy pdev_network information to pmlmepriv->cur_network */ ++ _rtw_memcpy(&mlme_cur_network->network, pdev_network, (get_WLAN_BSSID_EX_sz(pdev_network))); + +- // reset DSConfig +- //tgt_network->network.Configuration.DSConfig = (u32)rtw_ch2freq(pnetwork->Configuration.DSConfig); ++ #if 0 ++ /* reset DSConfig */ ++ mlme_cur_network->network.Configuration.DSConfig = (u32)rtw_ch2freq(pdev_network->Configuration.DSConfig); ++ #endif + + _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); + +-#if 0 +- if((pmlmepriv->fw_state) & WIFI_AP_STATE) +- { +- psta = rtw_alloc_stainfo(&padapter->stapriv, pnetwork->MacAddress); +- +- if (psta == NULL) { // for AP Mode & Adhoc Master Mode +- RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nCan't alloc sta_info when createbss_cmd_callback\n")); +- goto createbss_cmd_fail ; +- } +- +- rtw_indicate_connect( padapter); +- } +- else { +- +- //rtw_indicate_disconnect(dev); +- } +-#endif + _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); +- // we will set _FW_LINKED when there is one more sat to join us (rtw_stassoc_event_callback) +- ++ /* we will set _FW_LINKED when there is one more sat to join us (rtw_stassoc_event_callback) */ + } + + createbss_cmd_fail: +- + _exit_critical_bh(&pmlmepriv->lock, &irqL); + exit: +- rtw_free_cmd_obj(pcmd); +- +-_func_exit_; +- ++ return; + } + + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_debug.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_debug.c +old mode 100755 +new mode 100644 +index 72cad73..df0c15a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_debug.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_debug.c +@@ -20,6 +20,7 @@ + #define _RTW_DEBUG_C_ + + #include ++#include + + u32 GlobalDebugLevel = _drv_err_; + +@@ -60,10 +61,122 @@ u32 GlobalDebugLevel = _drv_err_; + + #include + ++#ifdef CONFIG_TDLS ++#define TDLS_DBG_INFO_SPACE_BTWN_ITEM_AND_VALUE 41 ++#endif ++ + void dump_drv_version(void *sel) + { +- DBG_871X_SEL_NL(sel, "%s %s\n", DRV_NAME, DRIVERVERSION); +- DBG_871X_SEL_NL(sel, "build time: %s %s\n", __DATE__, __TIME__); ++// DBG_871X_SEL_NL(sel, "%s %s\n", DRV_NAME, DRIVERVERSION); ++// DBG_871X_SEL_NL(sel, "build time: %s %s\n", __DATE__, __TIME__); ++} ++ ++void dump_drv_cfg(void *sel) ++{ ++ char *kernel_version = utsname()->release; ++ ++ DBG_871X_SEL_NL(sel, "\nKernel Version: %s\n", kernel_version); ++ DBG_871X_SEL_NL(sel, "Driver Version: %s\n", DRIVERVERSION); ++ DBG_871X_SEL_NL(sel, "------------------------------------------------\n"); ++#ifdef CONFIG_IOCTL_CFG80211 ++ DBG_871X_SEL_NL(sel, "CFG80211\n"); ++ #ifdef RTW_USE_CFG80211_STA_EVENT ++ DBG_871X_SEL_NL(sel, "RTW_USE_CFG80211_STA_EVENT\n"); ++ #endif ++#else ++ DBG_871X_SEL_NL(sel, "WEXT\n"); ++#endif ++ ++ DBG_871X_SEL_NL(sel, "DBG:%d\n", DBG); ++#ifdef CONFIG_DEBUG ++ DBG_871X_SEL_NL(sel, "CONFIG_DEBUG\n"); ++#endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ DBG_871X_SEL_NL(sel, "CONFIG_CONCURRENT_MODE\n"); ++#endif ++ ++#ifdef CONFIG_POWER_SAVING ++ DBG_871X_SEL_NL(sel, "CONFIG_POWER_SAVING\n"); ++#endif ++ ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ DBG_871X_SEL_NL(sel, "LOAD_PHY_PARA_FROM_FILE - REALTEK_CONFIG_PATH=%s\n", REALTEK_CONFIG_PATH); ++ #ifdef CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY ++ DBG_871X_SEL_NL(sel, "CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY\n"); ++ #endif ++ #ifdef CONFIG_CALIBRATE_TX_POWER_TO_MAX ++ DBG_871X_SEL_NL(sel, "CONFIG_CALIBRATE_TX_POWER_TO_MAX\n"); ++ #endif ++#endif ++ ++#ifdef CONFIG_DISABLE_ODM ++ DBG_871X_SEL_NL(sel, "CONFIG_DISABLE_ODM\n"); ++#endif ++ ++#ifdef CONFIG_MINIMAL_MEMORY_USAGE ++ DBG_871X_SEL_NL(sel, "CONFIG_MINIMAL_MEMORY_USAGE\n"); ++#endif ++ ++ DBG_871X_SEL_NL(sel, "CONFIG_RTW_ADAPTIVITY_EN = %d\n", CONFIG_RTW_ADAPTIVITY_EN); ++#if (CONFIG_RTW_ADAPTIVITY_EN) ++ DBG_871X_SEL_NL(sel, "ADAPTIVITY_MODE = %s\n", (CONFIG_RTW_ADAPTIVITY_MODE) ? "carrier_sense" : "normal"); ++#endif ++ ++#ifdef CONFIG_WOWLAN ++ DBG_871X_SEL_NL(sel, "CONFIG_WOWLAN - "); ++ ++ #ifdef CONFIG_GPIO_WAKEUP ++ DBG_871X_SEL_NL(sel, "CONFIG_GPIO_WAKEUP - WAKEUP_GPIO_IDX:%d\n", WAKEUP_GPIO_IDX); ++ #endif ++#endif ++ ++#ifdef CONFIG_TDLS ++ DBG_871X_SEL_NL(sel, "CONFIG_TDLS\n"); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ #ifdef CONFIG_SUPPORT_USB_INT ++ DBG_871X_SEL_NL(sel, "CONFIG_SUPPORT_USB_INT\n"); ++ #endif ++ #ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++ DBG_871X_SEL_NL(sel, "CONFIG_USB_INTERRUPT_IN_PIPE\n"); ++ #endif ++ #ifdef CONFIG_USB_TX_AGGREGATION ++ DBG_871X_SEL_NL(sel, "CONFIG_USB_TX_AGGREGATION\n"); ++ #endif ++ #ifdef CONFIG_USB_RX_AGGREGATION ++ DBG_871X_SEL_NL(sel, "CONFIG_USB_RX_AGGREGATION\n"); ++ #endif ++ #ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX ++ DBG_871X_SEL_NL(sel, "CONFIG_USE_USB_BUFFER_ALLOC_TX\n"); ++ #endif ++ #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++ DBG_871X_SEL_NL(sel, "CONFIG_USE_USB_BUFFER_ALLOC_RX\n"); ++ #endif ++ #ifdef CONFIG_PREALLOC_RECV_SKB ++ DBG_871X_SEL_NL(sel, "CONFIG_PREALLOC_RECV_SKB\n"); ++ #endif ++ #ifdef CONFIG_FIX_NR_BULKIN_BUFFER ++ DBG_871X_SEL_NL(sel, "CONFIG_FIX_NR_BULKIN_BUFFER\n"); ++ #endif ++#endif /*CONFIG_USB_HCI*/ ++ ++#ifdef CONFIG_SDIO_HCI ++ #ifdef CONFIG_TX_AGGREGATION ++ DBG_871X_SEL_NL(sel, "CONFIG_TX_AGGREGATION\n"); ++ #endif ++ #ifdef CONFIG_RX_AGGREGATION ++ DBG_871X_SEL_NL(sel, "CONFIG_RX_AGGREGATION\n"); ++ #endif ++#endif /*CONFIG_SDIO_HCI*/ ++ ++#ifdef CONFIG_PCI_HCI ++#endif ++ ++ DBG_871X_SEL_NL(sel, "MAX_XMITBUF_SZ = %d\n", MAX_XMITBUF_SZ); ++ DBG_871X_SEL_NL(sel, "MAX_RECVBUF_SZ = %d\n", MAX_RECVBUF_SZ); ++ + } + + void dump_log_level(void *sel) +@@ -89,6 +202,19 @@ void sd_f0_reg_dump(void *sel, _adapter *adapter) + DBG_871X_SEL(sel, "\t"); + } + } ++ ++void sdio_local_reg_dump(void *sel, _adapter *adapter) ++{ ++ int i, j = 1; ++ ++ for (i = 0x0; i < 0x100; i += 4) { ++ if (j % 4 == 1) ++ DBG_871X_SEL_NL(sel, "0x%02x", i); ++ DBG_871X_SEL(sel, " 0x%08x ", rtw_read32(adapter, (0x1025 << 16) | i)); ++ if ((j++) % 4 == 0) ++ DBG_871X_SEL(sel, "\n"); ++ } ++} + #endif /* CONFIG_SDIO_HCI */ + + void mac_reg_dump(void *sel, _adapter *adapter) +@@ -105,6 +231,19 @@ void mac_reg_dump(void *sel, _adapter *adapter) + if((j++)%4 == 0) + DBG_871X_SEL(sel, "\n"); + } ++ ++#ifdef CONFIG_RTL8814A ++ { ++ for(i=0x1000;i<0x1650;i+=4) ++ { ++ if(j%4==1) ++ DBG_871X_SEL_NL(sel, "0x%03x",i); ++ DBG_871X_SEL(sel, " 0x%08x ", rtw_read32(adapter,i)); ++ if((j++)%4 == 0) ++ DBG_871X_SEL(sel, "\n"); ++ } ++ } ++#endif /* CONFIG_RTL8814A */ + } + + void bb_reg_dump(void *sel, _adapter *adapter) +@@ -140,7 +279,6 @@ void rf_reg_dump(void *sel, _adapter *adapter) + for (path=0;pathrecvpriv); +@@ -196,6 +346,135 @@ void rtw_sink_rtp_seq_dbg( _adapter *adapter,_pkt *pkt) + } + } + ++void sta_rx_reorder_ctl_dump(void *sel, struct sta_info *sta) ++{ ++ struct recv_reorder_ctrl *reorder_ctl; ++ int i; ++ ++ for (i = 0; i < 16; i++) { ++ reorder_ctl = &sta->recvreorder_ctrl[i]; ++ if (reorder_ctl->ampdu_size != RX_AMPDU_SIZE_INVALID || reorder_ctl->indicate_seq != 0xFFFF) { ++ DBG_871X_SEL_NL(sel, "tid=%d, enable=%d, ampdu_size=%u, indicate_seq=%u\n" ++ , i, reorder_ctl->enable, reorder_ctl->ampdu_size, reorder_ctl->indicate_seq ++ ); ++ } ++ } ++} ++ ++void dump_adapters_status(void *sel, struct dvobj_priv *dvobj) ++{ ++ struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); ++ int i; ++ _adapter *iface; ++ u8 u_ch, u_bw, u_offset; ++ ++ DBG_871X_SEL_NL(sel, "%-2s %-8s %-17s %-4s %-7s %s\n" ++ , "id", "ifname", "macaddr", "port", "ch", "status"); ++ ++ DBG_871X_SEL_NL(sel, "------------------------------------------\n"); ++ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ iface = dvobj->padapters[i]; ++ if (iface) { ++ DBG_871X_SEL_NL(sel, "%2d %-8s "MAC_FMT" %4hhu %3u,%u,%u "MLME_STATE_FMT" %s%s\n" ++ , i, ADPT_ARG(iface) ++ , MAC_ARG(adapter_mac_addr(iface)) ++ , get_iface_type(iface) ++ , iface->mlmeextpriv.cur_channel ++ , iface->mlmeextpriv.cur_bwmode ++ , iface->mlmeextpriv.cur_ch_offset ++ , MLME_STATE_ARG(iface) ++ , rtw_is_surprise_removed(iface)?" SR":"" ++ , rtw_is_drv_stopped(iface)?" DS":"" ++ ); ++ } ++ } ++ ++ DBG_871X_SEL_NL(sel, "------------------------------------------\n"); ++ ++ rtw_get_ch_setting_union(dvobj->padapters[IFACE_ID0], &u_ch, &u_bw, &u_offset); ++ DBG_871X_SEL_NL(sel, "%34s %3u,%u,%u\n" ++ , "union:" ++ , u_ch, u_bw, u_offset ++ ); ++ ++ DBG_871X_SEL_NL(sel, "%34s %3u,%u,%u\n" ++ , "oper:" ++ , dvobj->oper_channel ++ , dvobj->oper_bwmode ++ , dvobj->oper_ch_offset ++ ); ++ ++ #ifdef CONFIG_DFS_MASTER ++ if (rfctl->radar_detect_ch != 0) { ++ DBG_871X_SEL_NL(sel, "%34s %3u,%u,%u" ++ , "radar_detect:" ++ , rfctl->radar_detect_ch ++ , rfctl->radar_detect_bw ++ , rfctl->radar_detect_offset ++ ); ++ ++ if (IS_UNDER_CAC(rfctl)) ++ DBG_871X_SEL(sel, ", cac:%d\n", rtw_systime_to_ms(rfctl->cac_end_time - rtw_get_current_time())); ++ else ++ DBG_871X_SEL(sel, "\n"); ++ } ++ #endif ++} ++ ++#define SEC_CAM_ENT_ID_TITLE_FMT "%-2s" ++#define SEC_CAM_ENT_ID_TITLE_ARG "id" ++#define SEC_CAM_ENT_ID_VALUE_FMT "%2u" ++#define SEC_CAM_ENT_ID_VALUE_ARG(id) (id) ++ ++#define SEC_CAM_ENT_TITLE_FMT "%-6s %-17s %-32s %-3s %-7s %-2s %-2s %-5s" ++#define SEC_CAM_ENT_TITLE_ARG "ctrl", "addr", "key", "kid", "type", "MK", "GK", "valid" ++#define SEC_CAM_ENT_VALUE_FMT "0x%04x "MAC_FMT" "KEY_FMT" %3u %-7s %2u %2u %5u" ++#define SEC_CAM_ENT_VALUE_ARG(ent) \ ++ (ent)->ctrl \ ++ , MAC_ARG((ent)->mac) \ ++ , KEY_ARG((ent)->key) \ ++ , ((ent)->ctrl) & 0x03 \ ++ , security_type_str((((ent)->ctrl) >> 2) & 0x07) \ ++ , (((ent)->ctrl) >> 5) & 0x01 \ ++ , (((ent)->ctrl) >> 6) & 0x01 \ ++ , (((ent)->ctrl) >> 15) & 0x01 ++ ++void dump_sec_cam_ent(void *sel, struct sec_cam_ent *ent, int id) ++{ ++ if (id >= 0) { ++ DBG_871X_SEL_NL(sel, SEC_CAM_ENT_ID_VALUE_FMT " " SEC_CAM_ENT_VALUE_FMT"\n" ++ , SEC_CAM_ENT_ID_VALUE_ARG(id), SEC_CAM_ENT_VALUE_ARG(ent)); ++ } else { ++ DBG_871X_SEL_NL(sel, SEC_CAM_ENT_VALUE_FMT"\n", SEC_CAM_ENT_VALUE_ARG(ent)); ++ } ++} ++ ++void dump_sec_cam_ent_title(void *sel, u8 has_id) ++{ ++ if (has_id) { ++ DBG_871X_SEL_NL(sel, SEC_CAM_ENT_ID_TITLE_FMT " " SEC_CAM_ENT_TITLE_FMT"\n" ++ , SEC_CAM_ENT_ID_TITLE_ARG, SEC_CAM_ENT_TITLE_ARG); ++ } else { ++ DBG_871X_SEL_NL(sel, SEC_CAM_ENT_TITLE_FMT"\n", SEC_CAM_ENT_TITLE_ARG); ++ } ++} ++ ++void dump_sec_cam(void *sel, _adapter *adapter) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; ++ struct sec_cam_ent ent; ++ int i; ++ ++ DBG_871X_SEL_NL(sel, "HW sec cam:\n"); ++ dump_sec_cam_ent_title(sel, 1); ++ for (i = 0; i < cam_ctl->num; i++) { ++ rtw_sec_read_cam_ent(adapter, i, (u8 *)(&ent.ctrl), ent.mac, ent.key); ++ dump_sec_cam_ent(sel , &ent, i); ++ } ++} ++ + #ifdef CONFIG_PROC_DEBUG + ssize_t proc_set_write_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) + { +@@ -210,7 +489,12 @@ ssize_t proc_set_write_reg(struct file *file, const char __user *buffer, size_t + return -EFAULT; + } + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%x %x %x", &addr, &val, &len); + +@@ -285,7 +569,12 @@ ssize_t proc_set_read_reg(struct file *file, const char __user *buffer, size_t c + return -EFAULT; + } + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%x %x", &addr, &len); + +@@ -380,7 +669,12 @@ ssize_t proc_set_roam_flags(struct file *file, const char __user *buffer, size_t + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%hhx", &flags); + +@@ -422,7 +716,12 @@ ssize_t proc_set_roam_param(struct file *file, const char __user *buffer, size_t + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%hhu %u %u", &rssi_diff_th, &scanr_exp_ms, &scan_int_ms); + +@@ -449,7 +748,12 @@ ssize_t proc_set_roam_tgt_addr(struct file *file, const char __user *buffer, siz + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", addr, addr+1, addr+2, addr+3, addr+4, addr+5); + if (num == 6) +@@ -501,6 +805,226 @@ int proc_get_rf_info(struct seq_file *m, void *v) + return 0; + } + ++int proc_get_scan_param(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; ++ struct ss_res *ss = &mlmeext->sitesurvey_res; ++ ++#define SCAN_PARAM_TITLE_FMT "%10s" ++#define SCAN_PARAM_VALUE_FMT "%-10u" ++#define SCAN_PARAM_TITLE_ARG , "scan_ch_ms" ++#define SCAN_PARAM_VALUE_ARG , ss->scan_ch_ms ++#ifdef CONFIG_80211N_HT ++ #define SCAN_PARAM_TITLE_FMT_HT " %15s %13s" ++ #define SCAN_PARAM_VALUE_FMT_HT " %-15u %-13u" ++ #define SCAN_PARAM_TITLE_ARG_HT , "rx_ampdu_accept", "rx_ampdu_size" ++ #define SCAN_PARAM_VALUE_ARG_HT , ss->rx_ampdu_accept, ss->rx_ampdu_size ++#else ++ #define SCAN_PARAM_TITLE_FMT_HT "" ++ #define SCAN_PARAM_VALUE_FMT_HT "" ++ #define SCAN_PARAM_TITLE_ARG_HT ++ #define SCAN_PARAM_VALUE_ARG_HT ++#endif ++#ifdef CONFIG_SCAN_BACKOP ++ #define SCAN_PARAM_TITLE_FMT_BACKOP " %9s %12s" ++ #define SCAN_PARAM_VALUE_FMT_BACKOP " %-9u %-12u" ++ #define SCAN_PARAM_TITLE_ARG_BACKOP , "backop_ms", "scan_cnt_max" ++ #define SCAN_PARAM_VALUE_ARG_BACKOP , ss->backop_ms, ss->scan_cnt_max ++#else ++ #define SCAN_PARAM_TITLE_FMT_BACKOP "" ++ #define SCAN_PARAM_VALUE_FMT_BACKOP "" ++ #define SCAN_PARAM_TITLE_ARG_BACKOP ++ #define SCAN_PARAM_VALUE_ARG_BACKOP ++#endif ++ ++ DBG_871X_SEL_NL(m, ++ SCAN_PARAM_TITLE_FMT ++ SCAN_PARAM_TITLE_FMT_HT ++ SCAN_PARAM_TITLE_FMT_BACKOP ++ "\n" ++ SCAN_PARAM_TITLE_ARG ++ SCAN_PARAM_TITLE_ARG_HT ++ SCAN_PARAM_TITLE_ARG_BACKOP ++ ); ++ ++ DBG_871X_SEL_NL(m, ++ SCAN_PARAM_VALUE_FMT ++ SCAN_PARAM_VALUE_FMT_HT ++ SCAN_PARAM_VALUE_FMT_BACKOP ++ "\n" ++ SCAN_PARAM_VALUE_ARG ++ SCAN_PARAM_VALUE_ARG_HT ++ SCAN_PARAM_VALUE_ARG_BACKOP ++ ); ++ ++ return 0; ++} ++ ++ssize_t proc_set_scan_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; ++ struct ss_res *ss = &mlmeext->sitesurvey_res; ++ ++ char tmp[32] = {0}; ++ ++u16 scan_ch_ms; ++#define SCAN_PARAM_INPUT_FMT "%hu" ++#define SCAN_PARAM_INPUT_ARG , &scan_ch_ms ++#ifdef CONFIG_80211N_HT ++ u8 rx_ampdu_accept; ++ u8 rx_ampdu_size; ++ #define SCAN_PARAM_INPUT_FMT_HT " %hhu %hhu" ++ #define SCAN_PARAM_INPUT_ARG_HT , &rx_ampdu_accept, &rx_ampdu_size ++#else ++ #define SCAN_PARAM_INPUT_FMT_HT "" ++ #define SCAN_PARAM_INPUT_ARG_HT ++#endif ++#ifdef CONFIG_SCAN_BACKOP ++ u16 backop_ms; ++ u8 scan_cnt_max; ++ #define SCAN_PARAM_INPUT_FMT_BACKOP " %hu %hhu" ++ #define SCAN_PARAM_INPUT_ARG_BACKOP , &backop_ms, &scan_cnt_max ++#else ++ #define SCAN_PARAM_INPUT_FMT_BACKOP "" ++ #define SCAN_PARAM_INPUT_ARG_BACKOP ++#endif ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ int num = sscanf(tmp, ++ SCAN_PARAM_INPUT_FMT ++ SCAN_PARAM_INPUT_FMT_HT ++ SCAN_PARAM_INPUT_FMT_BACKOP ++ SCAN_PARAM_INPUT_ARG ++ SCAN_PARAM_INPUT_ARG_HT ++ SCAN_PARAM_INPUT_ARG_BACKOP ++ ); ++ ++ if (num-- > 0) ++ ss->scan_ch_ms = scan_ch_ms; ++ #ifdef CONFIG_80211N_HT ++ if (num-- > 0) ++ ss->rx_ampdu_accept = rx_ampdu_accept; ++ if (num-- > 0) ++ ss->rx_ampdu_size = rx_ampdu_size; ++ #endif ++ #ifdef CONFIG_SCAN_BACKOP ++ if (num-- > 0) ++ ss->backop_ms = backop_ms; ++ if (num-- > 0) ++ ss->scan_cnt_max = scan_cnt_max; ++ #endif ++ } ++ ++ return count; ++} ++ ++int proc_get_scan_abort(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ u32 pass_ms; ++ ++ pass_ms = rtw_scan_abort_timeout(adapter, 10000); ++ ++ DBG_871X_SEL_NL(m, "%u\n", pass_ms); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_SCAN_BACKOP ++int proc_get_backop_flags_sta(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; ++ ++ DBG_871X_SEL_NL(m, "0x%02x\n", mlmeext_scan_backop_flags_sta(mlmeext)); ++ ++ return 0; ++} ++ ++ssize_t proc_set_backop_flags_sta(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; ++ ++ char tmp[32]; ++ u8 flags; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ int num = sscanf(tmp, "%hhx", &flags); ++ ++ if (num == 1) ++ mlmeext_assign_scan_backop_flags_sta(mlmeext, flags); ++ } ++ ++ return count; ++} ++ ++int proc_get_backop_flags_ap(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; ++ ++ DBG_871X_SEL_NL(m, "0x%02x\n", mlmeext_scan_backop_flags_ap(mlmeext)); ++ ++ return 0; ++} ++ ++ssize_t proc_set_backop_flags_ap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; ++ ++ char tmp[32]; ++ u8 flags; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ int num = sscanf(tmp, "%hhx", &flags); ++ ++ if (num == 1) ++ mlmeext_assign_scan_backop_flags_ap(mlmeext, flags); ++ } ++ ++ return count; ++} ++ ++#endif /* CONFIG_SCAN_BACKOP */ ++ + int proc_get_survey_info(struct seq_file *m, void *v) + { + _irqL irqL; +@@ -512,7 +1036,12 @@ int proc_get_survey_info(struct seq_file *m, void *v) + _list *plist, *phead; + s32 notify_signal; + s16 notify_noise = 0; +- u16 index = 0; ++ u16 index = 0, ie_cap = 0; ++ unsigned char *ie_wpa = NULL, *ie_wpa2 = NULL, *ie_wps = NULL; ++ unsigned char *ie_p2p = NULL, *ssid = NULL; ++ char flag_str[64]; ++ int ielen = 0; ++ u32 wpsielen = 0; + + _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); + phead = get_list_head(queue); +@@ -522,7 +1051,7 @@ int proc_get_survey_info(struct seq_file *m, void *v) + if (!plist) + return 0; + +- DBG_871X_SEL_NL(m, "%5s %-17s %3s %-3s %-4s %-4s %5s %s\n","index", "bssid", "ch", "RSSI", "SdBm", "Noise", "age", "ssid"); ++ DBG_871X_SEL_NL(m, "%5s %-17s %3s %-3s %-4s %-4s %5s %32s %32s\n", "index", "bssid", "ch", "RSSI", "SdBm", "Noise", "age", "flag", "ssid"); + while(1) + { + if (rtw_end_of_queue_search(phead,plist)== _TRUE) +@@ -543,7 +1072,21 @@ int proc_get_survey_info(struct seq_file *m, void *v) + rtw_hal_get_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&(pnetwork->network.Configuration.DSConfig), &(notify_noise)); + #endif + +- DBG_871X_SEL_NL(m, "%5d "MAC_FMT" %3d %3d %4d %4d %5d %s\n", ++ ie_wpa = rtw_get_wpa_ie(&pnetwork->network.IEs[12], &ielen, pnetwork->network.IELength-12); ++ ie_wpa2 = rtw_get_wpa2_ie(&pnetwork->network.IEs[12], &ielen, pnetwork->network.IELength-12); ++ ie_cap = rtw_get_capability(&pnetwork->network); ++ ie_wps = rtw_get_wps_ie(&pnetwork->network.IEs[12], pnetwork->network.IELength-12, NULL, &wpsielen); ++ ie_p2p = rtw_get_p2p_ie(&pnetwork->network.IEs[12], pnetwork->network.IELength-12, NULL, &ielen); ++ ssid = pnetwork->network.Ssid.Ssid; ++ sprintf(flag_str, "%s%s%s%s%s%s%s", ++ (ie_wpa) ? "[WPA]":"", ++ (ie_wpa2) ? "[WPA2]":"", ++ (!ie_wpa && !ie_wpa && ie_cap & BIT(4)) ? "[WEP]":"", ++ (ie_wps) ? "[WPS]":"", ++ (pnetwork->network.InfrastructureMode == Ndis802_11IBSS) ? "[IBSS]":"", ++ (ie_cap & BIT(0)) ? "[ESS]":"", ++ (ie_p2p) ? "[P2P]":""); ++ DBG_871X_SEL_NL(m, "%5d "MAC_FMT" %3d %3d %4d %4d %5d %32s %32s\n", + ++index, + MAC_ARG(pnetwork->network.MacAddress), + pnetwork->network.Configuration.DSConfig, +@@ -551,7 +1094,7 @@ int proc_get_survey_info(struct seq_file *m, void *v) + notify_signal, + notify_noise, + rtw_get_passing_time_ms((u32)pnetwork->last_scanned), +- //translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength), ++ flag_str, + pnetwork->network.Ssid.Ssid); + plist = get_next(plist); + } +@@ -560,15 +1103,91 @@ int proc_get_survey_info(struct seq_file *m, void *v) + return 0; + } + +-int proc_get_ap_info(struct seq_file *m, void *v) ++ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) + { +- struct net_device *dev = m->private; +- struct sta_info *psta; ++ _irqL irqL; ++ struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct wlan_network *cur_network = &(pmlmepriv->cur_network); +- struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ bool need_indicate_scan_done = _FALSE; ++ u8 _status = _FALSE; ++ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++#ifdef CONFIG_MP_INCLUDED ++ if ((padapter->registrypriv.mp_mode == 1) ++#ifdef CONFIG_CONCURRENT_MODE ++ || ((padapter->pbuddy_adapter) && (padapter->pbuddy_adapter->registrypriv.mp_mode == 1)) ++#endif ++ ){ ++ DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter)); ++ goto exit; ++ } ++#endif ++ rtw_ps_deny(padapter, PS_DENY_SCAN); ++ if (_FAIL == rtw_pwr_wakeup(padapter)) ++ goto exit; ++ ++ if (rtw_is_drv_stopped(padapter)) { ++ DBG_871X("scan abort!! bDriverStopped=_TRUE\n"); ++ goto exit; ++ } ++ ++ if (!padapter->bup) { ++ DBG_871X("scan abort!! bup=%d\n", padapter->bup); ++ goto exit; ++ } ++ ++ if (!rtw_is_hw_init_completed(padapter)) { ++ DBG_871X("scan abort!! hw_init_completed=FALSE\n"); ++ goto exit; ++ } ++ ++ if (rtw_is_scan_deny(padapter)) { ++ DBG_871X(FUNC_ADPT_FMT ": scan deny\n", FUNC_ADPT_ARG(padapter)); ++ goto exit; ++ } ++ ++ if ((pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) ++#ifdef CONFIG_CONCURRENT_MODE ++ || (rtw_get_buddy_bBusyTraffic(padapter) == _TRUE) ++#endif ++ ) { ++ DBG_871X("scan abort!! BusyTraffic == _TRUE\n"); ++ goto exit; ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) { ++ DBG_8192C("scan abort!! fwstate=0x%x\n", pmlmepriv->fw_state); ++ goto exit; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, ++ _FW_UNDER_SURVEY|_FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) { ++ DBG_871X("scan abort!! buddy_fwstate=0x%x\n", ++ get_fwstate(&(padapter->pbuddy_adapter->mlmepriv))); ++ goto exit; ++ } ++#endif ++ _status = rtw_set_802_11_bssid_list_scan(padapter, NULL, 0); ++ ++exit: ++ rtw_ps_deny_cancel(padapter, PS_DENY_SCAN); ++ return count; ++} ++ ++int proc_get_ap_info(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ struct sta_info *psta; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct sta_priv *pstapriv = &padapter->stapriv; + + psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); + if(psta) +@@ -593,16 +1212,8 @@ int proc_get_ap_info(struct seq_file *m, void *v) + DBG_871X_SEL_NL(m, "vht_ldpc_cap=0x%x, vht_stbc_cap=0x%x, vht_beamform_cap=0x%x\n", psta->vhtpriv.ldpc_cap, psta->vhtpriv.stbc_cap, psta->vhtpriv.beamform_cap); + DBG_871X_SEL_NL(m, "vht_mcs_map=0x%x, vht_highest_rate=0x%x, vht_ampdu_len=%d\n", *(u16*)psta->vhtpriv.vht_mcs_map, psta->vhtpriv.vht_highest_rate, psta->vhtpriv.ampdu_len); + #endif +- +- for(i=0;i<16;i++) +- { +- preorder_ctrl = &psta->recvreorder_ctrl[i]; +- if(preorder_ctrl->enable) +- { +- DBG_871X_SEL_NL(m, "tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq); +- } +- } +- ++ ++ sta_rx_reorder_ctl_dump(m, psta); + } + else + { +@@ -612,21 +1223,34 @@ int proc_get_ap_info(struct seq_file *m, void *v) + return 0; + } + +-int proc_get_adapter_state(struct seq_file *m, void *v) ++ssize_t proc_reset_trx_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) + { +- struct net_device *dev = m->private; ++ struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct dvobj_priv *psdpriv = padapter->dvobj; ++ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; ++ char cmd[32] = {0}; ++ u8 cnt = 0; + +-#ifdef CONFIG_CONCURRENT_MODE +- DBG_871X_SEL_NL(m, "name=%s, iface_type=%d, bSurpriseRemoved=%d, bDriverStopped=%d\n", +- dev->name, padapter->iface_type, +- padapter->bSurpriseRemoved, padapter->bDriverStopped); +-#else +- DBG_871X_SEL_NL(m, "name=%s, bSurpriseRemoved=%d, bDriverStopped=%d\n", +- dev->name, padapter->bSurpriseRemoved, padapter->bDriverStopped); +-#endif ++ if (count > sizeof(cmd)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } + +- return 0; ++ if (buffer && !copy_from_user(cmd, buffer, count)) { ++ int num = sscanf(cmd, "%hhx", &cnt); ++ ++ if (0 == cnt) { ++ pdbgpriv->dbg_rx_ampdu_drop_count = 0; ++ pdbgpriv->dbg_rx_ampdu_forced_indicate_count = 0; ++ pdbgpriv->dbg_rx_ampdu_loss_count = 0; ++ pdbgpriv->dbg_rx_dup_mgt_frame_drop_count = 0; ++ pdbgpriv->dbg_rx_ampdu_window_shift_cnt = 0; ++ pdbgpriv->dbg_rx_conflic_mac_addr_cnt = 0; ++ } ++ } ++ ++ return count; + } + + int proc_get_trx_info(struct seq_file *m, void *v) +@@ -636,6 +1260,8 @@ int proc_get_trx_info(struct seq_file *m, void *v) + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct recv_priv *precvpriv = &padapter->recvpriv; ++ struct dvobj_priv *psdpriv = padapter->dvobj; ++ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; + struct hw_xmit *phwxmit; + + dump_os_queue(m, padapter); +@@ -657,6 +1283,17 @@ int proc_get_trx_info(struct seq_file *m, void *v) + DBG_871X_SEL_NL(m, "rx_urb_pending_cn=%d\n", ATOMIC_READ(&(precvpriv->rx_pending_cnt))); + #endif + ++ //Folowing are RX info ++ //Counts of packets whose seq_num is less than preorder_ctrl->indicate_seq, Ex delay, retransmission, redundant packets and so on ++ DBG_871X_SEL_NL(m,"Rx: Counts of Packets Whose Seq_Num Less Than Reorder Control Seq_Num: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_drop_count); ++ //How many times the Rx Reorder Timer is triggered. ++ DBG_871X_SEL_NL(m,"Rx: Reorder Time-out Trigger Counts: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_forced_indicate_count); ++ //Total counts of packets loss ++ DBG_871X_SEL_NL(m,"Rx: Packet Loss Counts: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_loss_count); ++ DBG_871X_SEL_NL(m,"Rx: Duplicate Management Frame Drop Count: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_dup_mgt_frame_drop_count); ++ DBG_871X_SEL_NL(m,"Rx: AMPDU BA window shift Count: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_window_shift_cnt); ++ /*The same mac addr counts*/ ++ DBG_871X_SEL_NL(m, "Rx: Conflict MAC Address Frames Count: %llu\n", (unsigned long long)pdbgpriv->dbg_rx_conflic_mac_addr_cnt); + return 0; + } + +@@ -678,10 +1315,16 @@ ssize_t proc_set_dis_pwt(struct file *file, const char __user *buffer, size_t co + + if (count < 1) + return -EFAULT; +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%hhx", &dis_pwt); +- DBG_871X("Set Tx Power training mode:%s \n",(dis_pwt==_TRUE)?"Disable":"Enable"); ++ DBG_871X("Set Tx Power training mode:%s\n", (dis_pwt == _TRUE)?"Disable":"Enable"); + + if (num >= 1) + rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DIS_PWT, &(dis_pwt)); +@@ -704,7 +1347,7 @@ int proc_get_rate_ctl(struct seq_file *m, void *v) + data_fb = adapter->data_fb?1:0; + DBG_871X_SEL_NL(m, "FIXED %s%s%s\n" + , HDATA_RATE(data_rate) +- , sgi?" SGI":" LGI" ++ , data_rate>DESC_RATE54M?(sgi?" SGI":" LGI"):"" + , data_fb?" FB":"" + ); + DBG_871X_SEL_NL(m, "0x%02x %u\n", adapter->fix_rate, adapter->data_fb); +@@ -726,7 +1369,12 @@ ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t c + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%hhx %hhu", &fix_rate, &data_fb); + +@@ -738,36 +1386,154 @@ ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t c + + return count; + } ++#ifdef DBG_RX_COUNTER_DUMP ++int proc_get_rx_cnt_dump(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ int i; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ DBG_871X_SEL_NL(m, "BIT0- Dump RX counters of DRV \n"); ++ DBG_871X_SEL_NL(m, "BIT1- Dump RX counters of MAC \n"); ++ DBG_871X_SEL_NL(m, "BIT2- Dump RX counters of PHY \n"); ++ DBG_871X_SEL_NL(m, "BIT3- Dump TRX data frame of DRV \n"); ++ DBG_871X_SEL_NL(m, "dump_rx_cnt_mode = 0x%02x \n", adapter->dump_rx_cnt_mode); ++ ++ return 0; ++} ++ssize_t proc_set_rx_cnt_dump(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u8 dump_rx_cnt_mode; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ int num = sscanf(tmp, "%hhx", &dump_rx_cnt_mode); + ++ rtw_dump_phy_rxcnts_preprocess(adapter,dump_rx_cnt_mode); ++ adapter->dump_rx_cnt_mode = dump_rx_cnt_mode; ++ ++ } ++ ++ return count; ++} ++#endif + ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) + { + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + char tmp[32]; ++ int num; + + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { +- int num = sscanf(tmp, "%hhu %hhu", &fwdl_test_chksum_fail, &fwdl_test_wintint_rdy_fail); ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) ++ num = sscanf(tmp, "%hhu %hhu", &fwdl_test_chksum_fail, &fwdl_test_wintint_rdy_fail); ++ ++ return count; ++} ++ ++ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ int num; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) ++ num = sscanf(tmp, "%hhu", &del_rx_ampdu_test_no_tx_fail); ++ ++ return count; ++} ++ ++#ifdef CONFIG_DFS_MASTER ++int proc_get_dfs_master_test_case(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); ++ ++ DBG_871X_SEL_NL(m, "%-24s %-19s\n", "radar_detect_trigger_non", "choose_dfs_ch_first"); ++ DBG_871X_SEL_NL(m, "%24hhu %19hhu\n" ++ , rfctl->dbg_dfs_master_radar_detect_trigger_non ++ , rfctl->dbg_dfs_master_choose_dfs_ch_first ++ ); ++ ++ return 0; ++} ++ ++ssize_t proc_set_dfs_master_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); ++ char tmp[32]; ++ u8 radar_detect_trigger_non; ++ u8 choose_dfs_ch_first; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ int num = sscanf(tmp, "%hhu %hhu", &radar_detect_trigger_non, &choose_dfs_ch_first); ++ ++ if (num >= 1) ++ rfctl->dbg_dfs_master_radar_detect_trigger_non = radar_detect_trigger_non; ++ if (num >= 2) ++ rfctl->dbg_dfs_master_choose_dfs_ch_first = choose_dfs_ch_first; + } + + return count; + } ++#endif /* CONFIG_DFS_MASTER */ + + ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) + { + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + char tmp[32]; ++ int num; + + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { +- int num = sscanf(tmp, "%u", &g_wait_hiq_empty_ms); ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; + } + ++ if (buffer && !copy_from_user(tmp, buffer, count)) ++ num = sscanf(tmp, "%u", &g_wait_hiq_empty_ms); ++ + return count; + } + +@@ -1080,11 +1846,36 @@ int proc_get_hw_status(struct seq_file *m, void *v) + struct dvobj_priv *dvobj = padapter->dvobj; + struct debug_priv *pdbgpriv = &dvobj->drv_dbg; + +- DBG_871X_SEL_NL(m, "RX FIFO full count: last_time=%lld, current_time=%lld, differential=%lld\n" +- , pdbgpriv->dbg_rx_fifo_last_overflow, pdbgpriv->dbg_rx_fifo_curr_overflow, pdbgpriv->dbg_rx_fifo_diff_overflow); ++ if (pdbgpriv->dbg_rx_fifo_last_overflow == 1 ++ && pdbgpriv->dbg_rx_fifo_curr_overflow == 1 ++ && pdbgpriv->dbg_rx_fifo_diff_overflow == 1 ++ ) { ++ DBG_871X_SEL_NL(m, "RX FIFO full count: no implementation\n"); ++ } else { ++ DBG_871X_SEL_NL(m, "RX FIFO full count: last_time=%llu, current_time=%llu, differential=%llu\n" ++ , pdbgpriv->dbg_rx_fifo_last_overflow, pdbgpriv->dbg_rx_fifo_curr_overflow, pdbgpriv->dbg_rx_fifo_diff_overflow); ++ } + + return 0; + } ++int proc_get_trx_info_debug(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ int i; ++ ++ ++ /*============ tx info ============ */ ++ rtw_hal_get_def_var(padapter, HW_DEF_RA_INFO_DUMP, m); ++ ++ /*============ rx info ============ */ ++ rtw_hal_set_odm_var(padapter, HAL_ODM_RX_INFO_DUMP, m, _FALSE); ++ ++ ++return 0; ++} + + int proc_get_rx_signal(struct seq_file *m, void *v) + { +@@ -1096,9 +1887,11 @@ int proc_get_rx_signal(struct seq_file *m, void *v) + //DBG_871X_SEL_NL(m, "rxpwdb:%d\n", padapter->recvpriv.rxpwdb); + DBG_871X_SEL_NL(m, "signal_strength:%u\n", padapter->recvpriv.signal_strength); + DBG_871X_SEL_NL(m, "signal_qual:%u\n", padapter->recvpriv.signal_qual); ++ ++ rtw_get_noise(padapter); + DBG_871X_SEL_NL(m, "noise:%d\n", padapter->recvpriv.noise); +- rtw_odm_get_perpkt_rssi(m,padapter); + #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA ++ rtw_odm_get_perpkt_rssi(m,padapter); + rtw_get_raw_rssi_info(m,padapter); + #endif + return 0; +@@ -1114,7 +1907,12 @@ ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%u %u", &is_signal_dbg, &signal_strength); + +@@ -1163,7 +1961,12 @@ ssize_t proc_set_ht_enable(struct file *file, const char __user *buffer, size_t + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d ", &mode); + +@@ -1201,7 +2004,12 @@ ssize_t proc_set_bw_mode(struct file *file, const char __user *buffer, size_t co + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d ", &mode); + +@@ -1241,7 +2049,12 @@ ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d ", &mode); + +@@ -1257,18 +2070,58 @@ ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size + + } + ++int proc_get_mac_rptbuf(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u16 i; ++ u16 mac_id; ++ u32 shcut_addr = 0; ++ u32 read_addr = 0; ++#ifdef CONFIG_RTL8814A ++ DBG_871X_SEL_NL(m, "TX ShortCut:\n"); ++ for (mac_id = 0; mac_id < 64; mac_id++) { ++ rtw_write16(padapter, 0x140, 0x662 | ((mac_id & BIT5)>>5)); ++ shcut_addr = 0x8000; ++ shcut_addr = shcut_addr | ((mac_id&0x1f) << 7); ++ DBG_871X_SEL_NL(m, "mac_id=%d, 0x140=%x =>\n", mac_id, 0x662 | ((mac_id & BIT5)>>5)); ++ for (i = 0; i < 30; i++) { ++ read_addr = 0; ++ read_addr = shcut_addr | (i<<2); ++ DBG_871X_SEL_NL(m, "i=%02d: MAC_%04x= %08x ", i, read_addr, rtw_read32(padapter, read_addr)); ++ if (!((i+1) % 4)) ++ DBG_871X_SEL_NL(m, "\n"); ++ if (i == 29) ++ DBG_871X_SEL_NL(m, "\n"); ++ } ++ } ++#endif /* CONFIG_RTL8814A */ ++ return 0; ++} ++ ++ + int proc_get_rx_ampdu(struct seq_file *m, void *v) + { + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct registry_priv *pregpriv = &padapter->registrypriv; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + +- if(pregpriv) +- DBG_871X_SEL_NL(m, +- "bAcceptAddbaReq = %d , 0:Reject AP's Add BA req, 1:Accept AP's Add BA req.\n", pmlmeinfo->bAcceptAddbaReq +- ); ++ DBG_871X_SEL(m, "accept: "); ++ if (padapter->fix_rx_ampdu_accept == RX_AMPDU_ACCEPT_INVALID) ++ DBG_871X_SEL_NL(m, "%u%s\n", rtw_rx_ampdu_is_accept(padapter), "(auto)"); ++ else ++ DBG_871X_SEL_NL(m, "%u%s\n", padapter->fix_rx_ampdu_accept, "(fixed)"); ++ ++ DBG_871X_SEL(m, "size: "); ++ if (padapter->fix_rx_ampdu_size == RX_AMPDU_SIZE_INVALID) ++ DBG_871X_SEL_NL(m, "%u%s\n", rtw_rx_ampdu_size(padapter), "(auto)"); ++ else ++ DBG_871X_SEL_NL(m, "%u%s\n", padapter->fix_rx_ampdu_size, "(fixed)"); ++ ++ DBG_871X_SEL_NL(m, "%19s %17s\n", "fix_rx_ampdu_accept", "fix_rx_ampdu_size"); ++ ++ DBG_871X_SEL(m, "%-19d %-17u\n" ++ , padapter->fix_rx_ampdu_accept ++ , padapter->fix_rx_ampdu_size); + + return 0; + } +@@ -1281,28 +2134,30 @@ ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t c + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + char tmp[32]; +- u32 mode; ++ u8 accept; ++ u8 size; + + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } + +- int num = sscanf(tmp, "%d ", &mode); ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + +- if( pregpriv && mode < 2 ) +- { +- pmlmeinfo->bAcceptAddbaReq = mode; +- DBG_871X("pmlmeinfo->bAcceptAddbaReq=%d \n",pmlmeinfo->bAcceptAddbaReq); +- if(mode == 0) +- { +- //tear down Rx AMPDU +- send_delba(padapter, 0, get_my_bssid(&(pmlmeinfo->network)));// recipient +- } +- } ++ int num = sscanf(tmp, "%hhu %hhu", &accept, &size); ++ ++ if (num >= 1) ++ rtw_rx_ampdu_set_accept(padapter, accept, RX_AMPDU_DRV_FIXED); ++ if (num >= 2) ++ rtw_rx_ampdu_set_size(padapter, size, RX_AMPDU_DRV_FIXED); + ++ rtw_rx_ampdu_apply(padapter); + } + ++exit: + return count; + } + int proc_get_rx_ampdu_factor(struct seq_file *m, void *v) +@@ -1330,8 +2185,12 @@ ssize_t proc_set_rx_ampdu_factor(struct file *file, const char __user *buffer + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) +- { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d ", &factor); + +@@ -1373,8 +2232,12 @@ ssize_t proc_set_rx_ampdu_density(struct file *file, const char __user *buffer, + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) +- { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d ", &density); + +@@ -1416,8 +2279,12 @@ ssize_t proc_set_tx_ampdu_density(struct file *file, const char __user *buffer, + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) +- { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d ", &density); + +@@ -1464,7 +2331,12 @@ ssize_t proc_set_en_fwps(struct file *file, const char __user *buffer, size_t co + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d ", &mode); + +@@ -1516,7 +2388,12 @@ ssize_t proc_set_rx_stbc(struct file *file, const char __user *buffer, size_t co + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d ", &mode); + +@@ -1552,7 +2429,12 @@ ssize_t proc_set_rx_stbc(struct file *file, const char __user *buffer, size_t co + return -EFAULT; + } + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%x", &enable); + +@@ -1588,9 +2470,8 @@ int proc_get_all_sta_info(struct seq_file *m, void *v) + struct sta_info *psta; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct sta_priv *pstapriv = &padapter->stapriv; +- int i, j; ++ int i; + _list *plist, *phead; +- struct recv_reorder_ctrl *preorder_ctrl; + + DBG_871X_SEL_NL(m, "sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap); + +@@ -1632,15 +2513,8 @@ int proc_get_all_sta_info(struct seq_file *m, void *v) + DBG_871X_SEL_NL(m, "wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher); + DBG_871X_SEL_NL(m, "qos_info=0x%x\n", psta->qos_info); + DBG_871X_SEL_NL(m, "dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy); +- +- for(j=0;j<16;j++) +- { +- preorder_ctrl = &psta->recvreorder_ctrl[j]; +- if(preorder_ctrl->enable) +- { +- DBG_871X_SEL_NL(m, "tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq); +- } +- } ++ ++ sta_rx_reorder_ctl_dump(m, psta); + + #ifdef CONFIG_TDLS + DBG_871X_SEL_NL(m, "tdls_sta_state=0x%08x\n", psta->tdls_sta_state); +@@ -1650,6 +2524,12 @@ int proc_get_all_sta_info(struct seq_file *m, void *v) + DBG_871X_SEL_NL(m, "tx_data_pkts=%llu\n", psta->sta_stats.tx_pkts); + DBG_871X_SEL_NL(m, "tx_bytes=%llu\n", psta->sta_stats.tx_bytes); + #endif //CONFIG_TDLS ++ ++ dump_st_ctl(m, &psta->st_ctl); ++ ++ if (STA_OP_WFD_MODE(psta)) ++ DBG_871X_SEL_NL(m, "op_wfd_mode:0x%02x\n", STA_OP_WFD_MODE(psta)); ++ + DBG_871X_SEL_NL(m, "==============================\n"); + } + +@@ -1661,9 +2541,31 @@ int proc_get_all_sta_info(struct seq_file *m, void *v) + + return 0; + } +- ++ + #endif + ++#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER ++int proc_get_rtkm_info(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ struct recv_buf *precvbuf; ++ ++ precvbuf = (struct recv_buf *)precvpriv->precv_buf; ++ ++ DBG_871X_SEL_NL(m, "============[RTKM Info]============\n"); ++ DBG_871X_SEL_NL(m, "MAX_RTKM_NR_PREALLOC_RECV_SKB: %d\n", rtw_rtkm_get_nr_recv_skb()); ++ DBG_871X_SEL_NL(m, "MAX_RTKM_RECVBUF_SZ: %d\n", rtw_rtkm_get_buff_size()); ++ ++ DBG_871X_SEL_NL(m, "============[Driver Info]============\n"); ++ DBG_871X_SEL_NL(m, "NR_PREALLOC_RECV_SKB: %d\n", NR_PREALLOC_RECV_SKB); ++ DBG_871X_SEL_NL(m, "MAX_RECVBUF_SZ: %d\n", precvbuf->alloc_sz); ++ ++ return 0; ++} ++#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ ++ + #ifdef DBG_MEMORY_LEAK + #include + extern atomic_t _malloc_cnt;; +@@ -1744,8 +2646,12 @@ ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size + if(count < 1) + return -EFAULT; + +- if(buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) +- { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + int i; + for(i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) + { +@@ -1882,7 +2788,12 @@ ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t cou + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d", &trigger_point); + +@@ -1982,6 +2893,63 @@ int proc_get_tx_ring(struct seq_file *m, void *v) + } + #endif + ++#ifdef CONFIG_GPIO_WAKEUP ++int proc_get_wowlan_gpio_info(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++ u8 val = pwrpriv->is_high_active; ++ ++ DBG_871X_SEL_NL(m, "wakeup_gpio_idx: %d\n", WAKEUP_GPIO_IDX); ++ DBG_871X_SEL_NL(m, "high_active: %d\n", val); ++ ++ return 0; ++} ++ ++ssize_t proc_set_wowlan_gpio_info(struct file *file, const char __user *buffer, ++ size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++ char tmp[32] = {0}; ++ int num = 0; ++ u32 is_high_active = 0; ++ u8 val8 = 0; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ num = sscanf(tmp, "%u", &is_high_active); ++ ++ is_high_active = is_high_active == 0 ? 0 : 1; ++ ++ pwrpriv->is_high_active = is_high_active; ++ ++ rtw_ps_deny(padapter, PS_DENY_IOCTL); ++ LeaveAllPowerSaveModeDirect(padapter); ++ val8 = (pwrpriv->is_high_active == 0) ? 1 : 0; ++ rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, val8); ++ rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); ++ ++ DBG_871X("set %s %d\n", "gpio_high_active", ++ pwrpriv->is_high_active); ++ DBG_871X("%s: set GPIO_%d %d as default.\n", ++ __func__, WAKEUP_GPIO_IDX, val8); ++ } ++ ++ return count; ++} ++#endif /* CONFIG_GPIO_WAKEUP */ ++ + #ifdef CONFIG_P2P_WOWLAN + int proc_get_p2p_wowlan_info(struct seq_file *m, void *v) + { +@@ -2035,10 +3003,880 @@ ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_ + if(count < 1) + return -EFAULT; + +- if(buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) + sscanf(tmp, "%d ", &new_bcn_max); + + return count; + } ++ ++#ifdef CONFIG_POWER_SAVING ++int proc_get_ps_info(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++ u8 ips_mode = pwrpriv->ips_mode; ++ u8 lps_mode = pwrpriv->power_mgnt; ++ char *str = ""; ++ ++ DBG_871X_SEL_NL(m, "======Power Saving Info:======\n"); ++ DBG_871X_SEL_NL(m, "*IPS:\n"); ++ ++ if (ips_mode == IPS_NORMAL) { ++#ifdef CONFIG_FWLPS_IN_IPS ++ str = "FW_LPS_IN_IPS"; ++#else ++ str = "Card Disable"; ++#endif ++ } else if (ips_mode == IPS_NONE) { ++ str = "NO IPS"; ++ } else if (ips_mode == IPS_LEVEL_2) { ++ str = "IPS_LEVEL_2"; ++ } else { ++ str = "invalid ips_mode"; ++ } ++ ++ DBG_871X_SEL_NL(m, " IPS mode: %s\n", str); ++ DBG_871X_SEL_NL(m, " IPS enter count:%d, IPS leave count:%d\n", ++ pwrpriv->ips_enter_cnts, pwrpriv->ips_leave_cnts); ++ DBG_871X_SEL_NL(m, "------------------------------\n"); ++ DBG_871X_SEL_NL(m, "*LPS:\n"); ++ ++ if (lps_mode == PS_MODE_ACTIVE) { ++ str = "NO LPS"; ++ } else if (lps_mode == PS_MODE_MIN) { ++ str = "MIN"; ++ } else if (lps_mode == PS_MODE_MAX) { ++ str = "MAX"; ++ } else if (lps_mode == PS_MODE_DTIM) { ++ str = "DTIM"; ++ } else { ++ sprintf(str, "%d", lps_mode); ++ } ++ ++ DBG_871X_SEL_NL(m, " LPS mode: %s\n", str); ++ ++ if (pwrpriv->dtim != 0) ++ DBG_871X_SEL_NL(m, " DTIM: %d\n", pwrpriv->dtim); ++ DBG_871X_SEL_NL(m, " LPS enter count:%d, LPS leave count:%d\n", ++ pwrpriv->lps_enter_cnts, pwrpriv->lps_leave_cnts); ++ DBG_871X_SEL_NL(m, "=============================\n"); ++ return 0; ++} ++#endif //CONFIG_POWER_SAVING ++ ++#ifdef CONFIG_TDLS ++static int proc_tdls_display_tdls_function_info(struct seq_file *m) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ u8 SpaceBtwnItemAndValue = TDLS_DBG_INFO_SPACE_BTWN_ITEM_AND_VALUE; ++ u8 SpaceBtwnItemAndValueTmp = 0; ++ BOOLEAN FirstMatchFound = _FALSE; ++ int j= 0; ++ ++ DBG_871X_SEL_NL(m, "============[TDLS Function Info]============\n"); ++ DBG_871X_SEL_NL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Prohibited", (ptdlsinfo->ap_prohibited == _TRUE) ? "_TRUE" : "_FALSE"); ++ DBG_871X_SEL_NL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Channel Switch Prohibited", (ptdlsinfo->ch_switch_prohibited == _TRUE) ? "_TRUE" : "_FALSE"); ++ DBG_871X_SEL_NL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Link Established", (ptdlsinfo->link_established == _TRUE) ? "_TRUE" : "_FALSE"); ++ DBG_871X_SEL_NL(m, "%-*s = %d/%d\n", SpaceBtwnItemAndValue, "TDLS STA Num (Linked/Allowed)", ptdlsinfo->sta_cnt, MAX_ALLOWED_TDLS_STA_NUM); ++ DBG_871X_SEL_NL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Allowed STA Num Reached", (ptdlsinfo->sta_maximum == _TRUE) ? "_TRUE" : "_FALSE"); ++ ++#ifdef CONFIG_TDLS_CH_SW ++ DBG_871X_SEL_NL(m, "%-*s =", SpaceBtwnItemAndValue, "TDLS CH SW State"); ++ if (ptdlsinfo->chsw_info.ch_sw_state == TDLS_STATE_NONE) ++ { ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_STATE_NONE"); ++ } ++ else ++ { ++ for (j = 0; j < 32; j++) ++ { ++ if (ptdlsinfo->chsw_info.ch_sw_state & BIT(j)) ++ { ++ if (FirstMatchFound == _FALSE) ++ { ++ SpaceBtwnItemAndValueTmp = 1; ++ FirstMatchFound = _TRUE; ++ } ++ else ++ { ++ SpaceBtwnItemAndValueTmp = SpaceBtwnItemAndValue + 3; ++ } ++ switch (BIT(j)) ++ { ++ case TDLS_INITIATOR_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_INITIATOR_STATE"); ++ break; ++ case TDLS_RESPONDER_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_RESPONDER_STATE"); ++ break; ++ case TDLS_LINKED_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_LINKED_STATE"); ++ break; ++ case TDLS_WAIT_PTR_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_WAIT_PTR_STATE"); ++ break; ++ case TDLS_ALIVE_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_ALIVE_STATE"); ++ break; ++ case TDLS_CH_SWITCH_ON_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_CH_SWITCH_ON_STATE"); ++ break; ++ case TDLS_PEER_AT_OFF_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_PEER_AT_OFF_STATE"); ++ break; ++ case TDLS_CH_SW_INITIATOR_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_CH_SW_INITIATOR_STATE"); ++ break; ++ case TDLS_WAIT_CH_RSP_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValue, " ", "TDLS_WAIT_CH_RSP_STATE"); ++ break; ++ default: ++ DBG_871X_SEL_NL(m, "%-*sBIT(%d)\n", SpaceBtwnItemAndValueTmp, " ", j); ++ break; ++ } ++ } ++ } ++ } ++ ++ DBG_871X_SEL_NL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS CH SW On", (ATOMIC_READ(&ptdlsinfo->chsw_info.chsw_on) == _TRUE) ? "_TRUE" : "_FALSE"); ++ DBG_871X_SEL_NL(m, "%-*s = %d\n", SpaceBtwnItemAndValue, "TDLS CH SW Off-Channel Num", ptdlsinfo->chsw_info.off_ch_num); ++ DBG_871X_SEL_NL(m, "%-*s = %d\n", SpaceBtwnItemAndValue, "TDLS CH SW Channel Offset", ptdlsinfo->chsw_info.ch_offset); ++ DBG_871X_SEL_NL(m, "%-*s = %d\n", SpaceBtwnItemAndValue, "TDLS CH SW Current Time", ptdlsinfo->chsw_info.cur_time); ++ DBG_871X_SEL_NL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS CH SW Delay Switch Back", (ptdlsinfo->chsw_info.delay_switch_back == _TRUE) ? "_TRUE" : "_FALSE"); ++ DBG_871X_SEL_NL(m, "%-*s = %d\n", SpaceBtwnItemAndValue, "TDLS CH SW Dump Back", ptdlsinfo->chsw_info.dump_stack); ++#endif ++ ++ DBG_871X_SEL_NL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Device Discovered", (ptdlsinfo->dev_discovered == _TRUE) ? "_TRUE" : "_FALSE"); ++ DBG_871X_SEL_NL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Enable", (ptdlsinfo->tdls_enable == _TRUE) ? "_TRUE" : "_FALSE"); ++ DBG_871X_SEL_NL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Driver Setup", (ptdlsinfo->driver_setup == _TRUE) ? "_TRUE" : "_FALSE"); ++ ++ return 0; ++} ++ ++static int proc_tdls_display_network_info(struct seq_file *m) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ int i = 0; ++ u8 SpaceBtwnItemAndValue = TDLS_DBG_INFO_SPACE_BTWN_ITEM_AND_VALUE; ++ ++ /* Display the linked AP/GO info */ ++ DBG_871X_SEL_NL(m, "============[Associated AP/GO Info]============\n"); ++ ++ if ((pmlmepriv->fw_state & WIFI_STATION_STATE) && (pmlmepriv->fw_state & _FW_LINKED)) ++ { ++ DBG_871X_SEL_NL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "BSSID", cur_network->network.Ssid.Ssid); ++ DBG_871X_SEL_NL(m, "%-*s = "MAC_FMT"\n", SpaceBtwnItemAndValue, "Mac Address", MAC_ARG(cur_network->network.MacAddress)); ++ ++ DBG_871X_SEL_NL(m, "%-*s = ", SpaceBtwnItemAndValue, "Wireless Mode"); ++ for (i = 0; i < 8; i++) ++ { ++ if (pmlmeext->cur_wireless_mode & BIT(i)) ++ { ++ switch (BIT(i)) ++ { ++ case WIRELESS_11B: ++ DBG_871X_SEL_NL(m, "%4s", "11B "); ++ break; ++ case WIRELESS_11G: ++ DBG_871X_SEL_NL(m, "%4s", "11G "); ++ break; ++ case WIRELESS_11A: ++ DBG_871X_SEL_NL(m, "%4s", "11A "); ++ break; ++ case WIRELESS_11_24N: ++ DBG_871X_SEL_NL(m, "%7s", "11_24N "); ++ break; ++ case WIRELESS_11_5N: ++ DBG_871X_SEL_NL(m, "%6s", "11_5N "); ++ break; ++ case WIRELESS_AUTO: ++ DBG_871X_SEL_NL(m, "%5s", "AUTO "); ++ break; ++ case WIRELESS_11AC: ++ DBG_871X_SEL_NL(m, "%5s", "11AC "); ++ break; ++ } ++ } ++ } ++ DBG_871X_SEL_NL(m, "\n"); ++ ++ DBG_871X_SEL_NL(m, "%-*s = ", SpaceBtwnItemAndValue, "Privacy"); ++ switch (padapter->securitypriv.dot11PrivacyAlgrthm) ++ { ++ case _NO_PRIVACY_: ++ DBG_871X_SEL_NL(m, "%s\n", "NO PRIVACY"); ++ break; ++ case _WEP40_: ++ DBG_871X_SEL_NL(m, "%s\n", "WEP 40"); ++ break; ++ case _TKIP_: ++ DBG_871X_SEL_NL(m, "%s\n", "TKIP"); ++ break; ++ case _TKIP_WTMIC_: ++ DBG_871X_SEL_NL(m, "%s\n", "TKIP WTMIC"); ++ break; ++ case _AES_: ++ DBG_871X_SEL_NL(m, "%s\n", "AES"); ++ break; ++ case _WEP104_: ++ DBG_871X_SEL_NL(m, "%s\n", "WEP 104"); ++ break; ++ case _WEP_WPA_MIXED_: ++ DBG_871X_SEL_NL(m, "%s\n", "WEP/WPA Mixed"); ++ break; ++ case _SMS4_: ++ DBG_871X_SEL_NL(m, "%s\n", "SMS4"); ++ break; ++#ifdef CONFIG_IEEE80211W ++ case _BIP_: ++ DBG_871X_SEL_NL(m, "%s\n", "BIP"); ++ break; ++#endif //CONFIG_IEEE80211W ++ } ++ ++ DBG_871X_SEL_NL(m, "%-*s = %d\n", SpaceBtwnItemAndValue, "Channel", pmlmeext->cur_channel); ++ DBG_871X_SEL_NL(m, "%-*s = ", SpaceBtwnItemAndValue, "Channel Offset"); ++ switch (pmlmeext->cur_ch_offset) ++ { ++ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: ++ DBG_871X_SEL_NL(m, "%s\n", "N/A"); ++ break; ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ DBG_871X_SEL_NL(m, "%s\n", "Lower"); ++ break; ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ DBG_871X_SEL_NL(m, "%s\n", "Upper"); ++ break; ++ } ++ ++ DBG_871X_SEL_NL(m, "%-*s = ", SpaceBtwnItemAndValue, "Bandwidth Mode"); ++ switch (pmlmeext->cur_bwmode) ++ { ++ case CHANNEL_WIDTH_20: ++ DBG_871X_SEL_NL(m, "%s\n", "20MHz"); ++ break; ++ case CHANNEL_WIDTH_40: ++ DBG_871X_SEL_NL(m, "%s\n", "40MHz"); ++ break; ++ case CHANNEL_WIDTH_80: ++ DBG_871X_SEL_NL(m, "%s\n", "80MHz"); ++ break; ++ case CHANNEL_WIDTH_160: ++ DBG_871X_SEL_NL(m, "%s\n", "160MHz"); ++ break; ++ case CHANNEL_WIDTH_80_80: ++ DBG_871X_SEL_NL(m, "%s\n", "80MHz + 80MHz"); ++ break; ++ } ++ } ++ else ++ { ++ DBG_871X_SEL_NL(m, "No association with AP/GO exists!\n"); ++ } ++ ++ return 0; ++} ++ ++static int proc_tdls_display_tdls_sta_info(struct seq_file *m) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_info *psta; ++ int i = 0, j = 0; ++ _irqL irqL; ++ _list *plist, *phead; ++ u8 SpaceBtwnItemAndValue = TDLS_DBG_INFO_SPACE_BTWN_ITEM_AND_VALUE; ++ u8 SpaceBtwnItemAndValueTmp = 0; ++ u8 NumOfTdlsStaToShow = 0; ++ BOOLEAN FirstMatchFound = _FALSE; ++ ++ /* Search for TDLS sta info to display */ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ for (i=0; i< NUM_STA; i++) ++ { ++ phead = &(pstapriv->sta_hash[i]); ++ plist = get_next(phead); ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ plist = get_next(plist); ++ if (psta->tdls_sta_state != TDLS_STATE_NONE) ++ { ++ /* We got one TDLS sta info to show */ ++ DBG_871X_SEL_NL(m, "============[TDLS Peer STA Info: STA %d]============\n", ++NumOfTdlsStaToShow); ++ DBG_871X_SEL_NL(m, "%-*s = "MAC_FMT"\n", SpaceBtwnItemAndValue, "Mac Address", MAC_ARG(psta->hwaddr)); ++ DBG_871X_SEL_NL(m, "%-*s =", SpaceBtwnItemAndValue, "TDLS STA State"); ++ SpaceBtwnItemAndValueTmp = 0; ++ FirstMatchFound = _FALSE; ++ for (j = 0; j < 32; j++) ++ { ++ if (psta->tdls_sta_state & BIT(j)) ++ { ++ if (FirstMatchFound == _FALSE) ++ { ++ SpaceBtwnItemAndValueTmp = 1; ++ FirstMatchFound = _TRUE; ++ } ++ else ++ { ++ SpaceBtwnItemAndValueTmp = SpaceBtwnItemAndValue + 3; ++ } ++ switch (BIT(j)) ++ { ++ case TDLS_INITIATOR_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_INITIATOR_STATE"); ++ break; ++ case TDLS_RESPONDER_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_RESPONDER_STATE"); ++ break; ++ case TDLS_LINKED_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_LINKED_STATE"); ++ break; ++ case TDLS_WAIT_PTR_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_WAIT_PTR_STATE"); ++ break; ++ case TDLS_ALIVE_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_ALIVE_STATE"); ++ break; ++ case TDLS_CH_SWITCH_ON_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_CH_SWITCH_ON_STATE"); ++ break; ++ case TDLS_PEER_AT_OFF_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_PEER_AT_OFF_STATE"); ++ break; ++ case TDLS_CH_SW_INITIATOR_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_CH_SW_INITIATOR_STATE"); ++ break; ++ case TDLS_WAIT_CH_RSP_STATE: ++ DBG_871X_SEL_NL(m, "%-*s%s\n", SpaceBtwnItemAndValue, " ", "TDLS_WAIT_CH_RSP_STATE"); ++ break; ++ default: ++ DBG_871X_SEL_NL(m, "%-*sBIT(%d)\n", SpaceBtwnItemAndValueTmp, " ", j); ++ break; ++ } ++ } ++ } ++ ++ DBG_871X_SEL_NL(m, "%-*s = ", SpaceBtwnItemAndValue, "Wireless Mode"); ++ for (j = 0; j < 8; j++) ++ { ++ if (psta->wireless_mode & BIT(j)) ++ { ++ switch (BIT(j)) ++ { ++ case WIRELESS_11B: ++ DBG_871X_SEL_NL(m, "%4s", "11B "); ++ break; ++ case WIRELESS_11G: ++ DBG_871X_SEL_NL(m, "%4s", "11G "); ++ break; ++ case WIRELESS_11A: ++ DBG_871X_SEL_NL(m, "%4s", "11A "); ++ break; ++ case WIRELESS_11_24N: ++ DBG_871X_SEL_NL(m, "%7s", "11_24N "); ++ break; ++ case WIRELESS_11_5N: ++ DBG_871X_SEL_NL(m, "%6s", "11_5N "); ++ break; ++ case WIRELESS_AUTO: ++ DBG_871X_SEL_NL(m, "%5s", "AUTO "); ++ break; ++ case WIRELESS_11AC: ++ DBG_871X_SEL_NL(m, "%5s", "11AC "); ++ break; ++ } ++ } ++ } ++ DBG_871X_SEL_NL(m, "\n"); ++ ++ DBG_871X_SEL_NL(m, "%-*s = ", SpaceBtwnItemAndValue, "Bandwidth Mode"); ++ switch (psta->bw_mode) ++ { ++ case CHANNEL_WIDTH_20: ++ DBG_871X_SEL_NL(m, "%s\n", "20MHz"); ++ break; ++ case CHANNEL_WIDTH_40: ++ DBG_871X_SEL_NL(m, "%s\n", "40MHz"); ++ break; ++ case CHANNEL_WIDTH_80: ++ DBG_871X_SEL_NL(m, "%s\n", "80MHz"); ++ break; ++ case CHANNEL_WIDTH_160: ++ DBG_871X_SEL_NL(m, "%s\n", "160MHz"); ++ break; ++ case CHANNEL_WIDTH_80_80: ++ DBG_871X_SEL_NL(m, "%s\n", "80MHz + 80MHz"); ++ break; ++ } ++ ++ DBG_871X_SEL_NL(m, "%-*s = ", SpaceBtwnItemAndValue, "Privacy"); ++ switch (psta->dot118021XPrivacy) ++ { ++ case _NO_PRIVACY_: ++ DBG_871X_SEL_NL(m, "%s\n", "NO PRIVACY"); ++ break; ++ case _WEP40_: ++ DBG_871X_SEL_NL(m, "%s\n", "WEP 40"); ++ break; ++ case _TKIP_: ++ DBG_871X_SEL_NL(m, "%s\n", "TKIP"); ++ break; ++ case _TKIP_WTMIC_: ++ DBG_871X_SEL_NL(m, "%s\n", "TKIP WTMIC"); ++ break; ++ case _AES_: ++ DBG_871X_SEL_NL(m, "%s\n", "AES"); ++ break; ++ case _WEP104_: ++ DBG_871X_SEL_NL(m, "%s\n", "WEP 104"); ++ break; ++ case _WEP_WPA_MIXED_: ++ DBG_871X_SEL_NL(m, "%s\n", "WEP/WPA Mixed"); ++ break; ++ case _SMS4_: ++ DBG_871X_SEL_NL(m, "%s\n", "SMS4"); ++ break; ++#ifdef CONFIG_IEEE80211W ++ case _BIP_: ++ DBG_871X_SEL_NL(m, "%s\n", "BIP"); ++ break; ++#endif //CONFIG_IEEE80211W ++ } ++ ++ DBG_871X_SEL_NL(m, "%-*s = %d sec/%d sec\n", SpaceBtwnItemAndValue, "TPK Lifetime (Current/Expire)", psta->TPK_count, psta->TDLS_PeerKey_Lifetime); ++ DBG_871X_SEL_NL(m, "%-*s = %llu\n", SpaceBtwnItemAndValue, "Tx Packets Over Direct Link", psta->sta_stats.tx_pkts); ++ DBG_871X_SEL_NL(m, "%-*s = %llu\n", SpaceBtwnItemAndValue, "Rx Packets Over Direct Link", psta->sta_stats.rx_data_pkts); ++ } ++ } ++ } ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ if (NumOfTdlsStaToShow == 0) ++ { ++ DBG_871X_SEL_NL(m, "============[TDLS Peer STA Info]============\n"); ++ DBG_871X_SEL_NL(m, "No TDLS direct link exists!\n"); ++ } ++ ++ return 0; ++} ++ ++int proc_get_tdls_info(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_info *psta; ++ int i = 0, j = 0; ++ _irqL irqL; ++ _list *plist, *phead; ++ u8 SpaceBtwnItemAndValue = 41; ++ u8 SpaceBtwnItemAndValueTmp = 0; ++ u8 NumOfTdlsStaToShow = 0; ++ BOOLEAN FirstMatchFound = _FALSE; ++ ++ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { ++ DBG_871X_SEL_NL(m, "No tdls info can be shown since hal doesn't support tdls\n"); ++ return 0; ++ } ++ ++ proc_tdls_display_tdls_function_info(m); ++ proc_tdls_display_network_info(m); ++ proc_tdls_display_tdls_sta_info(m); ++ ++ return 0; ++} + #endif + ++int proc_get_monitor(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ if (WIFI_MONITOR_STATE == get_fwstate(pmlmepriv)) { ++ DBG_871X_SEL_NL(m, "Monitor mode : Enable\n"); ++ ++ DBG_871X_SEL_NL(m, "ch=%d, ch_offset=%d, bw=%d\n", ++ rtw_get_oper_ch(padapter), rtw_get_oper_choffset(padapter), rtw_get_oper_bw(padapter)); ++ } else { ++ DBG_871X_SEL_NL(m, "Monitor mode : Disable\n"); ++ } ++ ++ return 0; ++} ++ ++ssize_t proc_set_monitor(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ char tmp[32]; ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 target_chan, target_offset, target_bw; ++ ++ if (count < 3) { ++ DBG_871X("argument size is less than 3\n"); ++ return -EFAULT; ++ } ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ int num = sscanf(tmp, "%hhu %hhu %hhu", &target_chan, &target_offset, &target_bw); ++ ++ if (num != 3) { ++ DBG_871X("invalid write_reg parameter!\n"); ++ return count; ++ } ++ ++ padapter->mlmeextpriv.cur_channel = target_chan; ++ set_channel_bwmode(padapter, target_chan, target_offset, target_bw); ++ } ++ ++ return count; ++} ++ ++#include ++int proc_get_efuse_map(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); ++ PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; ++ int i, j; ++ u8 ips_mode = IPS_NUM; ++ int mapLen = EFUSE_MAP_SIZE; ++ ++ ips_mode = pwrctrlpriv->ips_mode; ++ rtw_pm_set_ips(padapter, IPS_NONE); ++ if (rtw_efuse_map_read(padapter, EFUSE_WIFI, mapLen, pEfuseHal->fakeEfuseInitMap) == _FAIL) ++ DBG_871X_SEL_NL(m, "WARN - Read Realmap Failed\n"); ++ ++ DBG_871X_SEL_NL(m, "\n"); ++ for (i = 0; i < EFUSE_MAP_SIZE; i += 16) { ++ DBG_871X_SEL_NL(m, "0x%02x\t", i); ++ for (j = 0; j < 8; j++) ++ DBG_871X_SEL_NL(m, "%02X ", pEfuseHal->fakeEfuseInitMap[i+j]); ++ ++ DBG_871X_SEL_NL(m, "\t"); ++ ++ for (; j < 16; j++) ++ DBG_871X_SEL_NL(m, "%02X ", pEfuseHal->fakeEfuseInitMap[i+j]); ++ ++ DBG_871X_SEL_NL(m, "\n"); ++ ++ } ++ rtw_pm_set_ips(padapter, ips_mode); ++ return 0; ++} ++ ++ssize_t proc_set_efuse_map(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++#if 0 ++ char tmp[256] = {0}; ++ u32 addr, cnts; ++ u8 efuse_data; ++ ++ int jj, kk; ++ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); ++ u8 ips_mode = IPS_NUM; ++ ++ if (count < 3) { ++ DBG_871X("argument size is less than 3\n"); ++ return -EFAULT; ++ } ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ int num = sscanf(tmp, "%x %d %x", &addr, &cnts, &efuse_data); ++ ++ if (num != 3) { ++ DBG_871X("invalid write_reg parameter!\n"); ++ return count; ++ } ++ } ++ ips_mode = pwrctrlpriv->ips_mode; ++ rtw_pm_set_ips(padapter, IPS_NONE); ++ if (rtw_efuse_map_write(padapter, addr, cnts, &efuse_data) == _FAIL) ++ DBG_871X("WARN - rtw_efuse_map_write error!!\n"); ++ rtw_pm_set_ips(padapter, ips_mode); ++#endif ++ return count; ++} ++ ++#ifdef CONFIG_IEEE80211W ++ssize_t proc_set_tx_sa_query(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); ++ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); ++ struct sta_info *psta; ++ _list *plist, *phead; ++ _irqL irqL; ++ char tmp[16]; ++ u8 mac_addr[NUM_STA][ETH_ALEN]; ++ u32 key_type; ++ u8 index; ++ ++ if (count > 2) { ++ DBG_871X("argument size is more than 2\n"); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%x", &key_type); ++ ++ if (num != 1) { ++ DBG_871X("invalid read_reg parameter!\n"); ++ return count; ++ } ++ DBG_871X("0: set sa query request , key_type=%d\n", key_type); ++ } ++ ++ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) && padapter->securitypriv.binstallBIPkey == _TRUE) { ++ DBG_871X("STA:"MAC_FMT"\n", MAC_ARG(get_my_bssid(&(pmlmeinfo->network)))); ++ /* TX unicast sa_query to AP */ ++ issue_action_SA_Query(padapter, get_my_bssid(&(pmlmeinfo->network)), 0, 0, (u8)key_type); ++ } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE && padapter->securitypriv.binstallBIPkey == _TRUE) { ++ /* TX unicast sa_query to every client STA */ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ for (index = 0; index < NUM_STA; index++) { ++ psta = NULL; ++ ++ phead = &(pstapriv->sta_hash[index]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ plist = get_next(plist); ++ _rtw_memcpy(&mac_addr[psta->mac_id][0], psta->hwaddr, ETH_ALEN); ++ } ++ } ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for (index = 0; index < macid_ctl->num && index < NUM_STA; index++) { ++ if (rtw_macid_is_used(macid_ctl, index) && !rtw_macid_is_bmc(macid_ctl, index)) { ++ if (!_rtw_memcmp(get_my_bssid(&(pmlmeinfo->network)), &mac_addr[index][0], ETH_ALEN) ++ && !IS_MCAST(&mac_addr[index][0])) { ++ issue_action_SA_Query(padapter, &mac_addr[index][0], 0, 0, (u8)key_type); ++ DBG_871X("STA[%u]:"MAC_FMT"\n", index , MAC_ARG(&mac_addr[index][0])); ++ } ++ } ++ } ++ } ++ ++ return count; ++} ++ ++int proc_get_tx_sa_query(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ DBG_871X_SEL_NL(m, "%s\n", __func__); ++ return 0; ++} ++ ++ssize_t proc_set_tx_deauth(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); ++ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); ++ struct sta_info *psta; ++ _list *plist, *phead; ++ _irqL irqL; ++ char tmp[16]; ++ u8 mac_addr[NUM_STA][ETH_ALEN]; ++ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ u32 key_type; ++ u8 index; ++ ++ ++ if (count > 2) { ++ DBG_871X("argument size is more than 2\n"); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%x", &key_type); ++ ++ if (num != 1) { ++ DBG_871X("invalid read_reg parameter!\n"); ++ return count; ++ } ++ DBG_871X("key_type=%d\n", key_type); ++ } ++ if (key_type < 0 || key_type > 4) ++ return count; ++ ++ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)) { ++ if (key_type == 3) /* key_type 3 only for AP mode */ ++ return count; ++ /* TX unicast deauth to AP */ ++ issue_deauth_11w(padapter, get_my_bssid(&(pmlmeinfo->network)), 0, (u8)key_type); ++ } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { ++ ++ if (key_type == 3) ++ issue_deauth_11w(padapter, bc_addr, 0, IEEE80211W_RIGHT_KEY); ++ ++ /* TX unicast deauth to every client STA */ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ for (index = 0; index < NUM_STA; index++) { ++ psta = NULL; ++ ++ phead = &(pstapriv->sta_hash[index]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ plist = get_next(plist); ++ _rtw_memcpy(&mac_addr[psta->mac_id][0], psta->hwaddr, ETH_ALEN); ++ } ++ } ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for (index = 0; index < macid_ctl->num && index < NUM_STA; index++) { ++ if (rtw_macid_is_used(macid_ctl, index) && !rtw_macid_is_bmc(macid_ctl, index)) { ++ if (!_rtw_memcmp(get_my_bssid(&(pmlmeinfo->network)), &mac_addr[index][0], ETH_ALEN)) { ++ if (key_type != 3) ++ issue_deauth_11w(padapter, &mac_addr[index][0], 0, (u8)key_type); ++ ++ psta = rtw_get_stainfo(pstapriv, &mac_addr[index][0]); ++ if (psta && key_type != IEEE80211W_WRONG_KEY && key_type != IEEE80211W_NO_KEY) { ++ u8 updated = _FALSE; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (rtw_is_list_empty(&psta->asoc_list) == _FALSE) { ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE); ++ ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); ++ } ++ ++ DBG_871X("STA[%u]:"MAC_FMT"\n", index , MAC_ARG(&mac_addr[index][0])); ++ } ++ } ++ } ++ } ++ ++ return count; ++} ++ ++int proc_get_tx_deauth(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ DBG_871X_SEL_NL(m, "%s\n", __func__); ++ return 0; ++} ++ ++ssize_t proc_set_tx_auth(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); ++ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); ++ struct sta_info *psta; ++ _list *plist, *phead; ++ _irqL irqL; ++ char tmp[16]; ++ u8 mac_addr[NUM_STA][ETH_ALEN]; ++ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ u32 tx_auth; ++ u8 index; ++ ++ ++ if (count > 2) { ++ DBG_871X("argument size is more than 2\n"); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%x", &tx_auth); ++ ++ if (num != 1) { ++ DBG_871X("invalid read_reg parameter!\n"); ++ return count; ++ } ++ DBG_871X("1: setnd auth, 2: send assoc request. tx_auth=%d\n", tx_auth); ++ } ++ ++ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)) { ++ if (tx_auth == 1) { ++ /* TX unicast auth to AP */ ++ issue_auth(padapter, NULL, 0); ++ } else if (tx_auth == 2) { ++ /* TX unicast auth to AP */ ++ issue_assocreq(padapter); ++ } ++ } ++ ++ return count; ++} ++ ++int proc_get_tx_auth(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ DBG_871X_SEL_NL(m, "%s\n", __func__); ++ return 0; ++} ++#endif /* CONFIG_IEEE80211W */ ++ ++#endif /* CONFIG_PROC_DEBUG */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_eeprom.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_eeprom.c +old mode 100755 +new mode 100644 +index fd07d64..e83c090 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_eeprom.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_eeprom.c +@@ -48,8 +48,8 @@ void shift_out_bits(_adapter * padapter, u16 data, u16 count) + u16 x,mask; + _func_enter_; + +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + mask = 0x01 << (count - 1); +@@ -62,9 +62,9 @@ _func_enter_; + x &= ~_EEDI; + if(data & mask) + x |= _EEDI; +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); +- goto out; ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; + } + rtw_write8(padapter, EE_9346CR, (u8)x); + rtw_udelay_os(CLOCK_RATE); +@@ -72,8 +72,8 @@ _func_enter_; + down_clk(padapter, &x); + mask = mask >> 1; + } while(mask); +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + x &= ~_EEDI; +@@ -86,8 +86,8 @@ u16 shift_in_bits (_adapter * padapter) + { + u16 x,d=0,i; + _func_enter_; +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + x = rtw_read8(padapter, EE_9346CR); +@@ -99,8 +99,8 @@ _func_enter_; + { + d = d << 1; + up_clk(padapter, &x); +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + x = rtw_read8(padapter, EE_9346CR); +@@ -157,24 +157,24 @@ void eeprom_clean(_adapter * padapter) + { + u16 x; + _func_enter_; +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + x = rtw_read8(padapter, EE_9346CR); +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + x &= ~(_EECS | _EEDI); + rtw_write8(padapter, EE_9346CR, (u8)x); +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + up_clk(padapter, &x); +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + down_clk(padapter, &x); +@@ -288,15 +288,15 @@ u16 eeprom_read16(_adapter * padapter, u16 reg) //ReadEEprom + #endif + _func_enter_; + +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + // select EEPROM, reset bits, set _EECS + x = rtw_read8(padapter, EE_9346CR); + +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + +@@ -337,15 +337,15 @@ void eeprom_read_sz(_adapter * padapter, u16 reg, u8* data, u32 sz) + u16 x, data16; + u32 i; + _func_enter_; +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + // select EEPROM, reset bits, set _EECS + x = rtw_read8(padapter, EE_9346CR); + +- if(padapter->bSurpriseRemoved==_TRUE){ +- RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ if (rtw_is_surprise_removed(padapter)) { ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE")); + goto out; + } + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ieee80211.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ieee80211.c +old mode 100755 +new mode 100644 +index 3a7ad41..893be78 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ieee80211.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ieee80211.c +@@ -66,6 +66,53 @@ static u8 WIFI_OFDMRATES[] = + IEEE80211_OFDM_RATE_48MB, + IEEE80211_OFDM_RATE_54MB}; + ++u8 mgn_rates_cck[4] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}; ++u8 mgn_rates_ofdm[8] = {MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M}; ++u8 mgn_rates_mcs0_7[8] = {MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7}; ++u8 mgn_rates_mcs8_15[8] = {MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15}; ++u8 mgn_rates_mcs16_23[8] = {MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23}; ++u8 mgn_rates_mcs24_31[8] = {MGN_MCS24, MGN_MCS25, MGN_MCS26, MGN_MCS27, MGN_MCS28, MGN_MCS29, MGN_MCS30, MGN_MCS31}; ++u8 mgn_rates_vht1ss[10] = {MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4 ++ , MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9}; ++u8 mgn_rates_vht2ss[10] = {MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4 ++ , MGN_VHT2SS_MCS5, MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9}; ++u8 mgn_rates_vht3ss[10] = {MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3, MGN_VHT3SS_MCS4 ++ , MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7, MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9}; ++u8 mgn_rates_vht4ss[10] = {MGN_VHT4SS_MCS0, MGN_VHT4SS_MCS1, MGN_VHT4SS_MCS2, MGN_VHT4SS_MCS3, MGN_VHT4SS_MCS4 ++ , MGN_VHT4SS_MCS5, MGN_VHT4SS_MCS6, MGN_VHT4SS_MCS7, MGN_VHT4SS_MCS8, MGN_VHT4SS_MCS9}; ++ ++static const char * const _rate_section_str[] = { ++ "CCK", ++ "OFDM", ++ "HT_1SS", ++ "HT_2SS", ++ "HT_3SS", ++ "HT_4SS", ++ "VHT_1SS", ++ "VHT_2SS", ++ "VHT_3SS", ++ "VHT_4SS", ++ "RATE_SECTION_UNKNOWN", ++}; ++ ++const char *rate_section_str(u8 section) ++{ ++ section = (section >= RATE_SECTION_NUM) ? RATE_SECTION_NUM : section; ++ return _rate_section_str[section]; ++} ++ ++struct rate_section_ent rates_by_sections[RATE_SECTION_NUM] = { ++ {RF_1TX, 4, mgn_rates_cck}, ++ {RF_1TX, 8, mgn_rates_ofdm}, ++ {RF_1TX, 8, mgn_rates_mcs0_7}, ++ {RF_2TX, 8, mgn_rates_mcs8_15}, ++ {RF_3TX, 8, mgn_rates_mcs16_23}, ++ {RF_4TX, 8, mgn_rates_mcs24_31}, ++ {RF_1TX, 10, mgn_rates_vht1ss}, ++ {RF_2TX, 10, mgn_rates_vht2ss}, ++ {RF_3TX, 10, mgn_rates_vht3ss}, ++ {RF_4TX, 10, mgn_rates_vht4ss}, ++}; + + int rtw_get_bit_value_from_ieee_value(u8 val) + { +@@ -88,7 +135,7 @@ uint rtw_is_cckrates_included(u8 *rate) + { + if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || + (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) +- return _TRUE; ++ return _TRUE; + i++; + } + +@@ -104,8 +151,7 @@ uint rtw_is_cckratesonly_included(u8 *rate) + { + if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && + (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) +- +- return _FALSE; ++ return _FALSE; + + i++; + } +@@ -333,12 +379,10 @@ int rtw_ies_remove_ie(u8 *ies, uint *ies_len, uint offset, u8 eid, u8 *oui, u8 o + while (1) { + target_ie = rtw_get_ie_ex(start, search_len, eid, oui, oui_len, NULL, &target_ielen); + if (target_ie && target_ielen) { +- u8 buf[MAX_IE_SZ] = {0}; + u8 *remain_ies = target_ie + target_ielen; + uint remain_len = search_len - (remain_ies - start); +- +- _rtw_memcpy(buf, remain_ies, remain_len); +- _rtw_memcpy(target_ie, buf, remain_len); ++ ++ _rtw_memmove(target_ie, remain_ies, remain_len); + *ies_len = *ies_len - target_ielen; + ret = _SUCCESS; + +@@ -438,18 +482,19 @@ _func_enter_; + ie = rtw_set_ie(ie, _SSID_IE_, pdev_network->Ssid.SsidLength, pdev_network->Ssid.Ssid, &sz); + + //supported rates +- if(pregistrypriv->wireless_mode == WIRELESS_11ABGN) +- { ++ if (pregistrypriv->wireless_mode == WIRELESS_11ABGN) { + if(pdev_network->Configuration.DSConfig > 14) + wireless_mode = WIRELESS_11A_5N; + else + wireless_mode = WIRELESS_11BG_24N; +- } +- else +- { ++ } else if (pregistrypriv->wireless_mode == WIRELESS_MODE_MAX) { /* WIRELESS_11ABGN | WIRELESS_11AC */ ++ if (pdev_network->Configuration.DSConfig > 14) ++ wireless_mode = WIRELESS_11_5AC; ++ else ++ wireless_mode = WIRELESS_11BG_24N; ++ } else + wireless_mode = pregistrypriv->wireless_mode; +- } +- ++ + rtw_set_supported_rate(pdev_network->SupportedRates, wireless_mode) ; + + rateLen = rtw_get_rateset_len(pdev_network->SupportedRates); +@@ -933,41 +978,45 @@ u8 *rtw_get_wps_ie_from_scan_queue(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps + u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen) + { + uint cnt; +- u8 *wpsie_ptr=NULL; +- u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ u8 *wpsie_ptr = NULL; ++ u8 eid, wps_oui[4] = {0x00, 0x50, 0xf2, 0x04}; + +- if(wps_ielen) ++ if (wps_ielen) + *wps_ielen = 0; + +- if(!in_ie || in_len<=0) ++ if (!in_ie) { ++ rtw_warn_on(1); ++ return wpsie_ptr; ++ } ++ ++ if (in_len <= 0) + return wpsie_ptr; + + cnt = 0; + +- while(cnt= MAX_IE_SZ) { ++ rtw_warn_on(1); ++ return NULL; ++ } + +- if(wps_ie) +- _rtw_memcpy(wps_ie, &in_ie[cnt], in_ie[cnt+1]+2); +- +- if(wps_ielen) +- *wps_ielen = in_ie[cnt+1]+2; +- +- cnt+=in_ie[cnt+1]+2; ++ if (eid == WLAN_EID_VENDOR_SPECIFIC && _rtw_memcmp(&in_ie[cnt + 2], wps_oui, 4) == _TRUE) { ++ wpsie_ptr = in_ie + cnt; ++ ++ if (wps_ie) ++ _rtw_memcpy(wps_ie, &in_ie[cnt], in_ie[cnt + 1] + 2); ++ ++ if (wps_ielen) ++ *wps_ielen = in_ie[cnt + 1] + 2; + + break; ++ } else { ++ cnt += in_ie[cnt + 1] + 2; + } +- else +- { +- cnt+=in_ie[cnt+1]+2; //goto next +- } + +- } ++ } + + return wpsie_ptr; + } +@@ -1364,7 +1413,7 @@ int rtw_get_mac_addr_intel(unsigned char *buf) + + DBG_871X("%s Enter\n", __FUNCTION__); + +- ret = rtw_retrive_from_file(fname, c_mac, MAC_ADDRESS_LEN); ++ ret = rtw_retrieve_from_file(fname, c_mac, MAC_ADDRESS_LEN); + if(ret < MAC_ADDRESS_LEN) + { + return -1; +@@ -1382,61 +1431,112 @@ int rtw_get_mac_addr_intel(unsigned char *buf) + } + #endif //CONFIG_PLATFORM_INTEL_BYT + ++/* ++ * Description: ++ * rtw_check_invalid_mac_address: ++ * This is only used for checking mac address valid or not. ++ * ++ * Input: ++ * adapter: mac_address pointer. ++ * check_local_bit: check locally bit or not. ++ * ++ * Output: ++ * _TRUE: The mac address is invalid. ++ * _FALSE: The mac address is valid. ++ * ++ * Auther: Isaac.Li ++ */ ++u8 rtw_check_invalid_mac_address(u8 *mac_addr, u8 check_local_bit) ++{ ++ u8 null_mac_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; ++ u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ u8 res = _FALSE; ++ ++ if (_rtw_memcmp(mac_addr, null_mac_addr, ETH_ALEN)) { ++ res = _TRUE; ++ goto func_exit; ++ } ++ ++ if (_rtw_memcmp(mac_addr, multi_mac_addr, ETH_ALEN)) { ++ res = _TRUE; ++ goto func_exit; ++ } ++ ++ if (mac_addr[0] & BIT0) { ++ res = _TRUE; ++ goto func_exit; ++ } ++ ++ if (check_local_bit == _TRUE) { ++ if (mac_addr[0] & BIT1) { ++ res = _TRUE; ++ goto func_exit; ++ } ++ } ++ ++func_exit: ++ return res; ++} ++ + extern char* rtw_initmac; +-#include +-void rtw_macaddr_cfg(u8 *mac_addr) ++/** ++ * rtw_macaddr_cfg - Decide the mac address used ++ * @out: buf to store mac address decided ++ * @hw_mac_addr: mac address from efuse/epprom ++ */ ++void rtw_macaddr_cfg(u8 *out, const u8 *hw_mac_addr) + { +- u8 mac[ETH_ALEN]; ++#define DEFAULT_RANDOM_MACADDR 1 ++ u8 mac[ETH_ALEN]; + +- if(mac_addr == NULL) return; +- +- if ( rtw_initmac ) +- { // Users specify the mac address ++ if (out == NULL) { ++ rtw_warn_on(1); ++ return; ++ } ++ ++ /* Users specify the mac address */ ++ if (rtw_initmac) { + int jj,kk; + +- for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) +- { +- mac[jj] = key_2char2num(rtw_initmac[kk], rtw_initmac[kk+ 1]); +- } +- _rtw_memcpy(mac_addr, mac, ETH_ALEN); ++ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3) ++ mac[jj] = key_2char2num(rtw_initmac[kk], rtw_initmac[kk + 1]); ++ ++ goto err_chk; + } ++ ++ /* platform specified */ + #ifdef CONFIG_PLATFORM_INTEL_BYT +- else if (0 == rtw_get_mac_addr_intel(mac)) +- { +- _rtw_memcpy(mac_addr, mac, ETH_ALEN); ++ if (rtw_get_mac_addr_intel(mac) == 0) ++ goto err_chk; ++#endif ++ ++ /* Use the mac address stored in the Efuse */ ++ if (hw_mac_addr) { ++ _rtw_memcpy(mac, hw_mac_addr, ETH_ALEN); ++ goto err_chk; + } +-#endif //CONFIG_PLATFORM_INTEL_BYT +- else +- { +- printk("Wifi Efuse Mac => %02x:%02x:%02x:%02x:%02x:%02x\n", mac_addr[0], mac_addr[1], +- mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]); +- if (!rockchip_wifi_mac_addr(mac)) { +- printk("=========> get mac address from flash=[%02x:%02x:%02x:%02x:%02x:%02x]\n", mac[0], mac[1], +- mac[2], mac[3], mac[4], mac[5]); +- _rtw_memcpy(mac_addr, mac, ETH_ALEN); +- } else { +- // Use the mac address stored in the Efuse +- _rtw_memcpy(mac, mac_addr, ETH_ALEN); +- } +- } +- +- if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && +- (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || +- ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && +- (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) +- { ++ ++err_chk: ++ if (rtw_check_invalid_mac_address(mac, _TRUE) == _TRUE) { ++ #if DEFAULT_RANDOM_MACADDR ++ DBG_871X_LEVEL(_drv_err_, "invalid mac addr:"MAC_FMT", assign random MAC\n", MAC_ARG(mac)); ++ *((u32 *)(&mac[2])) = rtw_random32(); ++ mac[0] = 0x00; ++ mac[1] = 0xe0; ++ mac[2] = 0x4c; ++ #else ++ DBG_871X_LEVEL(_drv_err_, "invalid mac addr:"MAC_FMT", assign default one\n", MAC_ARG(mac)); + mac[0] = 0x00; + mac[1] = 0xe0; + mac[2] = 0x4c; + mac[3] = 0x87; + mac[4] = 0x00; + mac[5] = 0x00; +- // use default mac addresss +- _rtw_memcpy(mac_addr, mac, ETH_ALEN); +- DBG_871X("MAC Address from efuse error, assign default one !!!\n"); +- } ++ #endif ++ } + +- DBG_871X("rtw_macaddr_cfg MAC Address = "MAC_FMT"\n", MAC_ARG(mac_addr)); ++ _rtw_memcpy(out, mac, ETH_ALEN); ++ DBG_871X("%s mac addr:"MAC_FMT"\n", __func__, MAC_ARG(out)); + } + + #ifdef CONFIG_80211N_HT +@@ -1482,13 +1582,13 @@ void dump_ies(void *sel, u8 *buf, u32 buf_len) + + DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len); + #ifdef CONFIG_80211N_HT +- dump_ht_cap_ie(sel, pos, len); ++ dump_ht_cap_ie(sel, pos, len + 2); + #endif +- dump_wps_ie(sel, pos, len); ++ dump_wps_ie(sel, pos, len + 2); + #ifdef CONFIG_P2P +- dump_p2p_ie(sel, pos, len); ++ dump_p2p_ie(sel, pos, len + 2); + #ifdef CONFIG_WFD +- dump_wfd_ie(sel, pos, len); ++ dump_wfd_ie(sel, pos, len + 2); + #endif + #endif + +@@ -1506,21 +1606,197 @@ void dump_wps_ie(void *sel, u8 *ie, u32 ie_len) + uint wps_ielen; + + wps_ie = rtw_get_wps_ie(ie, ie_len, NULL, &wps_ielen); +- if(wps_ie != ie || wps_ielen == 0) ++ if (wps_ie != ie || wps_ielen == 0) + return; + +- pos+=6; +- while(pos-ie < ie_len){ ++ pos += 6; ++ while (pos - ie + 4 <= ie_len) { + id = RTW_GET_BE16(pos); + len = RTW_GET_BE16(pos + 2); + +- DBG_871X_SEL_NL(sel, "%s ID:0x%04x, LEN:%u\n", __FUNCTION__, id, len); ++ DBG_871X_SEL_NL(sel, "%s ID:0x%04x, LEN:%u%s\n", __func__, id, len ++ , ((pos - ie + 4 + len) <= ie_len) ? "" : "(exceed ie_len)"); + +- pos+=(4+len); ++ pos += (4 + len); ++ } ++} ++ ++/** ++ * rtw_ies_get_chbw - get operation ch, bw, offset from IEs of BSS. ++ * @ies: pointer of the first tlv IE ++ * @ies_len: length of @ies ++ * @ch: pointer of ch, used as output ++ * @bw: pointer of bw, used as output ++ * @offset: pointer of offset, used as output ++ */ ++void rtw_ies_get_chbw(u8 *ies, int ies_len, u8 *ch, u8 *bw, u8 *offset) ++{ ++ u8 *p; ++ int ie_len; ++ ++ *ch = 0; ++ *bw = CHANNEL_WIDTH_20; ++ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ p = rtw_get_ie(ies, _DSSET_IE_, &ie_len, ies_len); ++ if (p && ie_len > 0) ++ *ch = *(p + 2); ++ ++#ifdef CONFIG_80211N_HT ++{ ++ u8 *ht_cap_ie, *ht_op_ie; ++ int ht_cap_ielen, ht_op_ielen; ++ ++ ht_cap_ie = rtw_get_ie(ies, EID_HTCapability, &ht_cap_ielen, ies_len); ++ if (ht_cap_ie && ht_cap_ielen) { ++ if (GET_HT_CAP_ELE_CHL_WIDTH(ht_cap_ie + 2)) ++ *bw = CHANNEL_WIDTH_40; ++ } ++ ++ ht_op_ie = rtw_get_ie(ies, EID_HTInfo, &ht_op_ielen, ies_len); ++ if (ht_op_ie && ht_op_ielen) { ++ if (*ch == 0) { ++ *ch = GET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2); ++ } else if (*ch != 0 && *ch != GET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2)) { ++ DBG_871X("%s ch inconsistent, DSSS:%u, HT primary:%u\n" ++ , __func__, *ch, GET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2)); ++ } ++ ++ if (!GET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2)) ++ *bw = CHANNEL_WIDTH_20; ++ ++ if (*bw == CHANNEL_WIDTH_40) { ++ switch (GET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2)) { ++ case SCA: ++ *offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ case SCB: ++ *offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ } ++ } ++ } ++} ++#endif /* CONFIG_80211N_HT */ ++#ifdef CONFIG_80211AC_VHT ++{ ++ u8 *vht_op_ie; ++ int vht_op_ielen; ++ ++ vht_op_ie = rtw_get_ie(ies, EID_VHTOperation, &vht_op_ielen, ies_len); ++ if (vht_op_ie && vht_op_ielen) { ++ if (GET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2) >= 1) ++ *bw = CHANNEL_WIDTH_80; ++ } ++} ++#endif ++} ++ ++void rtw_bss_get_chbw(WLAN_BSSID_EX *bss, u8 *ch, u8 *bw, u8 *offset) ++{ ++ rtw_ies_get_chbw(bss->IEs + sizeof(NDIS_802_11_FIXED_IEs) ++ , bss->IELength - sizeof(NDIS_802_11_FIXED_IEs) ++ , ch, bw, offset); ++ ++ if (*ch == 0) { ++ *ch = bss->Configuration.DSConfig; ++ } else if (*ch != bss->Configuration.DSConfig) { ++ DBG_871X("inconsistent ch - ies:%u bss->Configuration.DSConfig:%u\n" ++ , *ch, bss->Configuration.DSConfig); ++ *ch = bss->Configuration.DSConfig; ++ rtw_warn_on(1); ++ } ++} ++ ++/** ++ * rtw_is_chbw_grouped - test if the two ch settings can be grouped together ++ * @ch_a: ch of set a ++ * @bw_a: bw of set a ++ * @offset_a: offset of set a ++ * @ch_b: ch of set b ++ * @bw_b: bw of set b ++ * @offset_b: offset of set b ++ */ ++bool rtw_is_chbw_grouped(u8 ch_a, u8 bw_a, u8 offset_a ++ , u8 ch_b, u8 bw_b, u8 offset_b) ++{ ++ bool is_grouped = _FALSE; ++ ++ if (ch_a != ch_b) { ++ /* ch is different */ ++ goto exit; ++ } else if ((bw_a == CHANNEL_WIDTH_40 || bw_a == CHANNEL_WIDTH_80) ++ && (bw_b == CHANNEL_WIDTH_40 || bw_b == CHANNEL_WIDTH_80) ++ ) { ++ if (offset_a != offset_b) ++ goto exit; ++ } ++ ++ is_grouped = _TRUE; ++ ++exit: ++ return is_grouped; ++} ++ ++/** ++ * rtw_sync_chbw - obey g_ch, adjust g_bw, g_offset, bw, offset ++ * @req_ch: pointer of the request ch, may be modified further ++ * @req_bw: pointer of the request bw, may be modified further ++ * @req_offset: pointer of the request offset, may be modified further ++ * @g_ch: pointer of the ongoing group ch ++ * @g_bw: pointer of the ongoing group bw, may be modified further ++ * @g_offset: pointer of the ongoing group offset, may be modified further ++ */ ++void rtw_sync_chbw(u8 *req_ch, u8 *req_bw, u8 *req_offset ++ , u8 *g_ch, u8 *g_bw, u8 *g_offset) ++{ ++ ++ *req_ch = *g_ch; ++ ++ if (*req_bw == CHANNEL_WIDTH_80 && *g_ch <= 14) { ++ /*2.4G ch, downgrade to 40Mhz */ ++ *req_bw = CHANNEL_WIDTH_40; ++ } ++ ++ switch (*req_bw) { ++ case CHANNEL_WIDTH_80: ++ if (*g_bw == CHANNEL_WIDTH_40 || *g_bw == CHANNEL_WIDTH_80) ++ *req_offset = *g_offset; ++ else if (*g_bw == CHANNEL_WIDTH_20) ++ *req_offset = rtw_get_offset_by_ch(*req_ch); ++ ++ if (*req_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) { ++ DBG_871X_LEVEL(_drv_err_, "%s req 80MHz BW without offset, down to 20MHz\n", __func__); ++ rtw_warn_on(1); ++ *req_bw = CHANNEL_WIDTH_20; ++ } ++ break; ++ case CHANNEL_WIDTH_40: ++ if (*g_bw == CHANNEL_WIDTH_40 || *g_bw == CHANNEL_WIDTH_80) ++ *req_offset = *g_offset; ++ else if (*g_bw == CHANNEL_WIDTH_20) ++ *req_offset = rtw_get_offset_by_ch(*req_ch); ++ ++ if (*req_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) { ++ DBG_871X_LEVEL(_drv_err_, "%s req 40MHz BW without offset, down to 20MHz\n", __func__); ++ rtw_warn_on(1); ++ *req_bw = CHANNEL_WIDTH_20; ++ } ++ break; ++ case CHANNEL_WIDTH_20: ++ *req_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ default: ++ DBG_871X_LEVEL(_drv_err_, "%s req unsupported BW:%u\n", __func__, *req_bw); ++ rtw_warn_on(1); ++ } ++ ++ if (*req_bw > *g_bw) { ++ *g_bw = *req_bw; ++ *g_offset = *req_offset; + } + } + +-#ifdef CONFIG_P2P + /** + * rtw_get_p2p_merged_len - Get merged ie length from muitiple p2p ies. + * @in_ie: Pointer of the first p2p ie +@@ -1592,49 +1868,29 @@ int rtw_p2p_merge_ies(u8 *in_ie, u32 in_len, u8 *merge_ie) + return 0; + } + +-void dump_p2p_ie(void *sel, u8 *ie, u32 ie_len) { ++void dump_p2p_ie(void *sel, u8 *ie, u32 ie_len) ++{ + u8* pos = (u8*)ie; + u8 id; + u16 len; + + u8 *p2p_ie; + uint p2p_ielen; +- ++ + p2p_ie = rtw_get_p2p_ie(ie, ie_len, NULL, &p2p_ielen); +- if(p2p_ie != ie || p2p_ielen == 0) ++ if (p2p_ie != ie || p2p_ielen == 0) + return; + +- pos+=6; +- while(pos-ie < ie_len){ ++ pos += 6; ++ while (pos - ie + 3 <= ie_len) { + id = *pos; +- len = RTW_GET_LE16(pos+1); ++ len = RTW_GET_LE16(pos + 1); + +- DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len); ++ DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u%s\n", __func__, id, len ++ , ((pos - ie + 3 + len) <= ie_len) ? "" : "(exceed ie_len)"); + +- pos+=(3+len); +- } +-} +- +-u8 *rtw_get_p2p_ie_from_scan_queue(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen, u8 frame_type) +-{ +- u8* p2p = NULL; +- +- DBG_871X( "[%s] frame_type = %d\n", __FUNCTION__, frame_type ); +- switch( frame_type ) +- { +- case 1: +- case 3: +- { // Beacon or Probe Response +- p2p = rtw_get_p2p_ie(in_ie + _PROBERSP_IE_OFFSET_, in_len - _PROBERSP_IE_OFFSET_, p2p_ie, p2p_ielen); +- break; +- } +- case 2: +- { // Probe Request +- p2p = rtw_get_p2p_ie(in_ie + _PROBEREQ_IE_OFFSET_ , in_len - _PROBEREQ_IE_OFFSET_ , p2p_ie, p2p_ielen); +- break; +- } ++ pos += (3 + len); + } +- return p2p; + } + + /** +@@ -1648,47 +1904,48 @@ u8 *rtw_get_p2p_ie_from_scan_queue(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ + */ + u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen) + { +- uint cnt = 0; +- u8 *p2p_ie_ptr; +- u8 eid, p2p_oui[4]={0x50,0x6F,0x9A,0x09}; ++ uint cnt; ++ u8 *p2p_ie_ptr = NULL; ++ u8 eid, p2p_oui[4] = {0x50, 0x6F, 0x9A, 0x09}; + +- if ( p2p_ielen != NULL ) ++ if (p2p_ielen) + *p2p_ielen = 0; + +- while(cnt MAX_IE_SZ)) { +- rtw_dump_stack(); ++ ++ if (cnt + 1 + 4 >= MAX_IE_SZ) { ++ rtw_warn_on(1); + return NULL; +- } +- if( ( eid == _VENDOR_SPECIFIC_IE_ ) && ( _rtw_memcmp( &in_ie[cnt+2], p2p_oui, 4) == _TRUE ) ) +- { ++ } ++ ++ if (eid == WLAN_EID_VENDOR_SPECIFIC && _rtw_memcmp(&in_ie[cnt + 2], p2p_oui, 4) == _TRUE) { + p2p_ie_ptr = in_ie + cnt; +- +- if ( p2p_ie != NULL ) +- { +- _rtw_memcpy( p2p_ie, &in_ie[ cnt ], in_ie[ cnt + 1 ] + 2 ); +- } + +- if ( p2p_ielen != NULL ) +- { +- *p2p_ielen = in_ie[ cnt + 1 ] + 2; +- } +- +- return p2p_ie_ptr; ++ if (p2p_ie) ++ _rtw_memcpy(p2p_ie, &in_ie[cnt], in_ie[cnt + 1] + 2); ++ ++ if (p2p_ielen) ++ *p2p_ielen = in_ie[cnt + 1] + 2; + + break; ++ } else { ++ cnt += in_ie[cnt + 1] + 2; + } +- else +- { +- cnt += in_ie[ cnt + 1 ] +2; //goto next +- } +- +- } + +- return NULL; ++ } + ++ return p2p_ie_ptr; + } + + /** +@@ -1705,45 +1962,45 @@ u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_attr + { + u8 *attr_ptr = NULL; + u8 *target_attr_ptr = NULL; +- u8 p2p_oui[4]={0x50,0x6F,0x9A,0x09}; ++ u8 p2p_oui[4] = {0x50, 0x6F, 0x9A, 0x09}; + +- if(len_attr) ++ if (len_attr) + *len_attr = 0; + +- if ( !p2p_ie || ( p2p_ie[0] != _VENDOR_SPECIFIC_IE_ ) || +- ( _rtw_memcmp( p2p_ie + 2, p2p_oui , 4 ) != _TRUE ) ) +- { ++ if (!p2p_ie ++ || p2p_ielen <= 6 ++ || (p2p_ie[0] != WLAN_EID_VENDOR_SPECIFIC) ++ || (_rtw_memcmp(p2p_ie + 2, p2p_oui, 4) != _TRUE)) + return attr_ptr; +- } + +- // 6 = 1(Element ID) + 1(Length) + 3 (OUI) + 1(OUI Type) +- attr_ptr = p2p_ie + 6; //goto first attr +- +- while(attr_ptr - p2p_ie < p2p_ielen) +- { +- // 3 = 1(Attribute ID) + 2(Length) ++ /* 6 = 1(Element ID) + 1(Length) + 3 (OUI) + 1(OUI Type) */ ++ attr_ptr = p2p_ie + 6; /* goto first attr */ ++ ++ while ((attr_ptr - p2p_ie + 3) <= p2p_ielen) { ++ /* 3 = 1(Attribute ID) + 2(Length) */ + u8 attr_id = *attr_ptr; + u16 attr_data_len = RTW_GET_LE16(attr_ptr + 1); + u16 attr_len = attr_data_len + 3; +- +- //DBG_871X("%s attr_ptr:%p, id:%u, length:%u\n", __FUNCTION__, attr_ptr, attr_id, attr_data_len); +- if( attr_id == target_attr_id ) +- { ++ ++ if (0) ++ DBG_871X("%s attr_ptr:%p, id:%u, length:%u\n", __func__, attr_ptr, attr_id, attr_data_len); ++ ++ if ((attr_ptr - p2p_ie + attr_len) > p2p_ielen) ++ break; ++ ++ if (attr_id == target_attr_id) { + target_attr_ptr = attr_ptr; +- +- if(buf_attr) ++ ++ if (buf_attr) + _rtw_memcpy(buf_attr, attr_ptr, attr_len); +- +- if(len_attr) ++ ++ if (len_attr) + *len_attr = attr_len; +- ++ + break; ++ } else { ++ attr_ptr += attr_len; + } +- else +- { +- attr_ptr += attr_len; //goto next +- } +- + } + + return target_attr_ptr; +@@ -1764,20 +2021,19 @@ u8 *rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 * + u8 *attr_ptr; + u32 attr_len; + +- if(len_content) ++ if (len_content) + *len_content = 0; +- ++ + attr_ptr = rtw_get_p2p_attr(p2p_ie, p2p_ielen, target_attr_id, NULL, &attr_len); + +- if(attr_ptr && attr_len) +- { +- if(buf_content) +- _rtw_memcpy(buf_content, attr_ptr+3, attr_len-3); ++ if (attr_ptr && attr_len) { ++ if (buf_content) ++ _rtw_memcpy(buf_content, attr_ptr + 3, attr_len - 3); + +- if(len_content) +- *len_content = attr_len-3; ++ if (len_content) ++ *len_content = attr_len - 3; + +- return attr_ptr+3; ++ return attr_ptr + 3; + } + + return NULL; +@@ -1800,41 +2056,84 @@ u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr) + return a_len; + } + +-static uint rtw_p2p_attr_remove(u8 *ie, uint ielen_ori, u8 attr_id) ++uint rtw_del_p2p_ie(u8 *ies, uint ies_len_ori, const char *msg) ++{ ++#define DBG_DEL_P2P_IE 0 ++ ++ u8 *target_ie; ++ u32 target_ie_len; ++ uint ies_len = ies_len_ori; ++ int index = 0; ++ ++ while (1) { ++ target_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &target_ie_len); ++ if (target_ie && target_ie_len) { ++ u8 *next_ie = target_ie + target_ie_len; ++ uint remain_len = ies_len - (next_ie - ies); ++ ++ if (DBG_DEL_P2P_IE && msg) { ++ DBG_871X("%s %d before\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, ies, ies_len); ++ ++ DBG_871X("ies:%p, ies_len:%u\n", ies, ies_len); ++ DBG_871X("target_ie:%p, target_ie_len:%u\n", target_ie, target_ie_len); ++ DBG_871X("next_ie:%p, remain_len:%u\n", next_ie, remain_len); ++ } ++ ++ _rtw_memmove(target_ie, next_ie, remain_len); ++ _rtw_memset(target_ie + remain_len, 0, target_ie_len); ++ ies_len -= target_ie_len; ++ ++ if (DBG_DEL_P2P_IE && msg) { ++ DBG_871X("%s %d after\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, ies, ies_len); ++ } ++ ++ index++; ++ } else { ++ break; ++ } ++ } ++ ++ return ies_len; ++} ++ ++uint rtw_del_p2p_attr(u8 *ie, uint ielen_ori, u8 attr_id) + { ++#define DBG_DEL_P2P_ATTR 0 ++ + u8 *target_attr; + u32 target_attr_len; + uint ielen = ielen_ori; +- int index=0; ++ int index = 0; + + while(1) { +- target_attr=rtw_get_p2p_attr(ie, ielen, attr_id, NULL, &target_attr_len); +- if(target_attr && target_attr_len) +- { +- u8 *next_attr = target_attr+target_attr_len; +- uint remain_len = ielen-(next_attr-ie); +- //dump_ies(RTW_DBGDUMP, ie, ielen); +- #if 0 +- DBG_871X("[%d] ie:%p, ielen:%u\n" +- "target_attr:%p, target_attr_len:%u\n" +- "next_attr:%p, remain_len:%u\n" +- , index++ +- , ie, ielen +- , target_attr, target_attr_len +- , next_attr, remain_len +- ); +- #endif +- +- _rtw_memset(target_attr, 0, target_attr_len); +- _rtw_memcpy(target_attr, next_attr, remain_len); +- _rtw_memset(target_attr+remain_len, 0, target_attr_len); +- *(ie+1) -= target_attr_len; +- ielen-=target_attr_len; +- } +- else +- { +- //if(index>0) +- // dump_ies(RTW_DBGDUMP, ie, ielen); ++ target_attr = rtw_get_p2p_attr(ie, ielen, attr_id, NULL, &target_attr_len); ++ if (target_attr && target_attr_len) { ++ u8 *next_attr = target_attr + target_attr_len; ++ uint remain_len = ielen - (next_attr - ie); ++ ++ if (DBG_DEL_P2P_ATTR) { ++ DBG_871X("%s %d before\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, ie, ielen); ++ ++ DBG_871X("ie:%p, ielen:%u\n", ie, ielen); ++ DBG_871X("target_attr:%p, target_attr_len:%u\n", target_attr, target_attr_len); ++ DBG_871X("next_attr:%p, remain_len:%u\n", next_attr, remain_len); ++ } ++ ++ _rtw_memmove(target_attr, next_attr, remain_len); ++ _rtw_memset(target_attr + remain_len, 0, target_attr_len); ++ *(ie + 1) -= target_attr_len; ++ ielen -= target_attr_len; ++ ++ if (DBG_DEL_P2P_ATTR) { ++ DBG_871X("%s %d after\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, ie, ielen); ++ } ++ ++ index++; ++ } else { + break; + } + } +@@ -1842,42 +2141,83 @@ static uint rtw_p2p_attr_remove(u8 *ie, uint ielen_ori, u8 attr_id) + return ielen; + } + +-void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id) ++inline u8 *rtw_bss_ex_get_p2p_ie(WLAN_BSSID_EX *bss_ex, u8 *p2p_ie, uint *p2p_ielen) + { +- u8 *p2p_ie; +- uint p2p_ielen, p2p_ielen_ori; +- int cnt; +- +- if( (p2p_ie=rtw_get_p2p_ie(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_, NULL, &p2p_ielen_ori)) ) +- { +- if (0) +- if(rtw_get_p2p_attr(p2p_ie, p2p_ielen_ori, attr_id, NULL, NULL)) { +- DBG_871X("rtw_get_p2p_attr: GOT P2P_ATTR:%u!!!!!!!!\n", attr_id); +- dump_ies(RTW_DBGDUMP, bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_); +- } ++ return rtw_get_p2p_ie(BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex), p2p_ie, p2p_ielen); ++} + +- p2p_ielen=rtw_p2p_attr_remove(p2p_ie, p2p_ielen_ori, attr_id); +- if(p2p_ielen != p2p_ielen_ori) { +- +- u8 *next_ie_ori = p2p_ie+p2p_ielen_ori; +- u8 *next_ie = p2p_ie+p2p_ielen; +- uint remain_len = bss_ex->IELength-(next_ie_ori-bss_ex->IEs); ++void rtw_bss_ex_del_p2p_ie(WLAN_BSSID_EX *bss_ex) ++{ ++#define DBG_BSS_EX_DEL_P2P_IE 0 ++ ++ u8 *ies = BSS_EX_TLV_IES(bss_ex); ++ uint ies_len_ori = BSS_EX_TLV_IES_LEN(bss_ex); ++ uint ies_len; + +- _rtw_memcpy(next_ie, next_ie_ori, remain_len); +- _rtw_memset(next_ie+remain_len, 0, p2p_ielen_ori-p2p_ielen); +- bss_ex->IELength -= p2p_ielen_ori-p2p_ielen; ++ ies_len = rtw_del_p2p_ie(ies, ies_len_ori, DBG_BSS_EX_DEL_P2P_IE ? __func__ : NULL); ++ bss_ex->IELength -= ies_len_ori - ies_len; ++} ++ ++void rtw_bss_ex_del_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id) ++{ ++#define DBG_BSS_EX_DEL_P2P_ATTR 0 ++ ++ u8 *ies = BSS_EX_TLV_IES(bss_ex); ++ uint ies_len = BSS_EX_TLV_IES_LEN(bss_ex); + +- if (0) { +- DBG_871X("remove P2P_ATTR:%u!\n", attr_id); +- dump_ies(RTW_DBGDUMP, bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_); ++ u8 *ie; ++ uint ie_len, ie_len_ori; ++ ++ int index = 0; ++ ++ while (1) { ++ ie = rtw_get_p2p_ie(ies, ies_len, NULL, &ie_len_ori); ++ if (ie) { ++ u8 *next_ie_ori = ie + ie_len_ori; ++ uint remain_len = bss_ex->IELength - (next_ie_ori - bss_ex->IEs); ++ u8 has_target_attr = 0; ++ ++ if (DBG_BSS_EX_DEL_P2P_ATTR) { ++ if (rtw_get_p2p_attr(ie, ie_len_ori, attr_id, NULL, NULL)) { ++ DBG_871X("%s %d before\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex)); ++ ++ DBG_871X("ies:%p, ies_len:%u\n", ies, ies_len); ++ DBG_871X("ie:%p, ie_len_ori:%u\n", ie, ie_len_ori); ++ DBG_871X("next_ie_ori:%p, remain_len:%u\n", next_ie_ori, remain_len); ++ has_target_attr = 1; ++ } ++ } ++ ++ ie_len = rtw_del_p2p_attr(ie, ie_len_ori, attr_id); ++ if (ie_len != ie_len_ori) { ++ u8 *next_ie = ie + ie_len; ++ ++ _rtw_memmove(next_ie, next_ie_ori, remain_len); ++ _rtw_memset(next_ie + remain_len, 0, ie_len_ori - ie_len); ++ bss_ex->IELength -= ie_len_ori - ie_len; ++ ++ ies = next_ie; ++ } else { ++ ies = next_ie_ori; ++ } ++ ++ if (DBG_BSS_EX_DEL_P2P_ATTR) { ++ if (has_target_attr) { ++ DBG_871X("%s %d after\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex)); ++ } + } ++ ++ ies_len = remain_len; ++ ++ index++; ++ } else { ++ break; + } + } + } + +-#endif //CONFIG_P2P +- +-#ifdef CONFIG_WFD + void dump_wfd_ie(void *sel, u8 *ie, u32 ie_len) + { + u8* pos = (u8*)ie; +@@ -1887,152 +2227,328 @@ void dump_wfd_ie(void *sel, u8 *ie, u32 ie_len) + u8 *wfd_ie; + uint wfd_ielen; + +- if(rtw_get_wfd_ie(ie, ie_len, NULL, &wfd_ielen) == _FALSE) ++ wfd_ie = rtw_get_wfd_ie(ie, ie_len, NULL, &wfd_ielen); ++ if (wfd_ie != ie || wfd_ielen == 0) + return; + +- pos+=6; +- while(pos-ie < ie_len){ ++ pos += 6; ++ while (pos - ie + 3 <= ie_len) { + id = *pos; +- len = RTW_GET_BE16(pos+1); ++ len = RTW_GET_BE16(pos + 1); + +- DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len); ++ DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u%s\n", __func__, id, len ++ , ((pos - ie + 3 + len) <= ie_len) ? "" : "(exceed ie_len)"); + +- pos+=(3+len); ++ pos += (3 + len); + } + } + +-int rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen) ++/** ++ * rtw_get_wfd_ie - Search WFD IE from a series of IEs ++ * @in_ie: Address of IEs to search ++ * @in_len: Length limit from in_ie ++ * @wfd_ie: If not NULL and WFD IE is found, WFD IE will be copied to the buf starting from wfd_ie ++ * @wfd_ielen: If not NULL and WFD IE is found, will set to the length of the entire WFD IE ++ * ++ * Returns: The address of the P2P IE found, or NULL ++ */ ++u8 *rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen) + { +- int match; +- uint cnt = 0; +- u8 eid, wfd_oui[4]={0x50,0x6F,0x9A,0x0A}; +- ++ uint cnt; ++ u8 *wfd_ie_ptr = NULL; ++ u8 eid, wfd_oui[4] = {0x50, 0x6F, 0x9A, 0x0A}; + +- match=_FALSE; ++ if (wfd_ielen) ++ *wfd_ielen = 0; + +- if ( in_len < 0 ) +- { +- return match; ++ if (!in_ie || in_len < 0) { ++ rtw_warn_on(1); ++ return wfd_ie_ptr; + } + +- while(cnt= MAX_IE_SZ) { ++ rtw_warn_on(1); ++ return NULL; ++ } ++ ++ if (eid == WLAN_EID_VENDOR_SPECIFIC && _rtw_memcmp(&in_ie[cnt + 2], wfd_oui, 4) == _TRUE) { ++ wfd_ie_ptr = in_ie + cnt; ++ ++ if (wfd_ie) ++ _rtw_memcpy(wfd_ie, &in_ie[cnt], in_ie[cnt + 1] + 2); ++ ++ if (wfd_ielen) ++ *wfd_ielen = in_ie[cnt + 1] + 2; ++ + break; ++ } else { ++ cnt += in_ie[cnt + 1] + 2; + } +- else +- { +- cnt += in_ie[ cnt + 1 ] +2; //goto next +- } +- +- } + +- if ( match == _TRUE ) +- { +- match = cnt; + } +- +- return match; + ++ return wfd_ie_ptr; + } + +-int rtw_get_wfd_ie_from_scan_queue(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen, u8 frame_type) ++/** ++ * rtw_get_wfd_attr - Search a specific WFD attribute from a given WFD IE ++ * @wfd_ie: Address of WFD IE to search ++ * @wfd_ielen: Length limit from wfd_ie ++ * @target_attr_id: The attribute ID of WFD attribute to search ++ * @buf_attr: If not NULL and the WFD attribute is found, WFD attribute will be copied to the buf starting from buf_attr ++ * @len_attr: If not NULL and the WFD attribute is found, will set to the length of the entire WFD attribute ++ * ++ * Returns: the address of the specific WPS attribute found, or NULL ++ */ ++u8 *rtw_get_wfd_attr(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id, u8 *buf_attr, u32 *len_attr) + { +- int match; ++ u8 *attr_ptr = NULL; ++ u8 *target_attr_ptr = NULL; ++ u8 wfd_oui[4] = {0x50, 0x6F, 0x9A, 0x0A}; + +- match=_FALSE; ++ if (len_attr) ++ *len_attr = 0; + +- DBG_871X( "[%s] frame_type = %d\n", __FUNCTION__, frame_type ); +- switch( frame_type ) +- { +- case 1: +- case 3: +- { // Beacon or Probe Response +- match = rtw_get_wfd_ie(in_ie + _PROBERSP_IE_OFFSET_, in_len - _PROBERSP_IE_OFFSET_, wfd_ie, wfd_ielen); ++ if (!wfd_ie ++ || wfd_ielen <= 6 ++ || (wfd_ie[0] != WLAN_EID_VENDOR_SPECIFIC) ++ || (_rtw_memcmp(wfd_ie + 2, wfd_oui, 4) != _TRUE)) ++ return attr_ptr; ++ ++ /* 6 = 1(Element ID) + 1(Length) + 3 (OUI) + 1(OUI Type) */ ++ attr_ptr = wfd_ie + 6; /* goto first attr */ ++ ++ while ((attr_ptr - wfd_ie + 3) <= wfd_ielen) { ++ /* 3 = 1(Attribute ID) + 2(Length) */ ++ u8 attr_id = *attr_ptr; ++ u16 attr_data_len = RTW_GET_BE16(attr_ptr + 1); ++ u16 attr_len = attr_data_len + 3; ++ ++ if (0) ++ DBG_871X("%s attr_ptr:%p, id:%u, length:%u\n", __func__, attr_ptr, attr_id, attr_data_len); ++ ++ if ((attr_ptr - wfd_ie + attr_len) > wfd_ielen) + break; +- } +- case 2: +- { // Probe Request +- match = rtw_get_wfd_ie(in_ie + _PROBEREQ_IE_OFFSET_ , in_len - _PROBEREQ_IE_OFFSET_ , wfd_ie, wfd_ielen); ++ ++ if (attr_id == target_attr_id) { ++ target_attr_ptr = attr_ptr; ++ ++ if (buf_attr) ++ _rtw_memcpy(buf_attr, attr_ptr, attr_len); ++ ++ if (len_attr) ++ *len_attr = attr_len; ++ + break; ++ } else { ++ attr_ptr += attr_len; + } + } +- return match; ++ ++ return target_attr_ptr; + } + +-// attr_content: The output buffer, contains the "body field" of WFD attribute. +-// attr_contentlen: The data length of the "body field" of WFD attribute. +-int rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id ,u8 *attr_content, uint *attr_contentlen) ++/** ++ * rtw_get_wfd_attr_content - Search a specific WFD attribute content from a given WFD IE ++ * @wfd_ie: Address of WFD IE to search ++ * @wfd_ielen: Length limit from wfd_ie ++ * @target_attr_id: The attribute ID of WFD attribute to search ++ * @buf_content: If not NULL and the WFD attribute is found, WFD attribute content will be copied to the buf starting from buf_content ++ * @len_content: If not NULL and the WFD attribute is found, will set to the length of the WFD attribute content ++ * ++ * Returns: the address of the specific WFD attribute content found, or NULL ++ */ ++u8 *rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id, u8 *buf_content, uint *len_content) + { +- int match; +- uint cnt = 0; +- u8 attr_id, wfd_oui[4]={0x50,0x6F,0x9A,0x0A}; ++ u8 *attr_ptr; ++ u32 attr_len; + ++ if (len_content) ++ *len_content = 0; + +- match=_FALSE; ++ attr_ptr = rtw_get_wfd_attr(wfd_ie, wfd_ielen, target_attr_id, NULL, &attr_len); + +- if ( ( wfd_ie[ 0 ] != _VENDOR_SPECIFIC_IE_ ) || +- ( _rtw_memcmp( wfd_ie + 2, wfd_oui , 4 ) != _TRUE ) ) +- { +- return( match ); ++ if (attr_ptr && attr_len) { ++ if (buf_content) ++ _rtw_memcpy(buf_content, attr_ptr + 3, attr_len - 3); ++ ++ if (len_content) ++ *len_content = attr_len - 3; ++ ++ return attr_ptr + 3; + } + +- // 1 ( WFD IE ) + 1 ( Length ) + 3 ( OUI ) + 1 ( OUI Type ) +- cnt = 6; +- while( cnt < wfd_ielen ) +- { +- u16 attrlen = RTW_GET_BE16(wfd_ie + cnt + 1); +- +- attr_id = wfd_ie[cnt]; +- if( attr_id == target_attr_id ) +- { +- // 3 -> 1 byte for attribute ID field, 2 bytes for length field +- if(attr_content) +- _rtw_memcpy( attr_content, &wfd_ie[ cnt + 3 ], attrlen ); +- +- if(attr_contentlen) +- *attr_contentlen = attrlen; +- +- cnt += attrlen + 3; ++ return NULL; ++} + +- match = _TRUE; ++uint rtw_del_wfd_ie(u8 *ies, uint ies_len_ori, const char *msg) ++{ ++#define DBG_DEL_WFD_IE 0 ++ ++ u8 *target_ie; ++ u32 target_ie_len; ++ uint ies_len = ies_len_ori; ++ int index = 0; ++ ++ while (1) { ++ target_ie = rtw_get_wfd_ie(ies, ies_len, NULL, &target_ie_len); ++ if (target_ie && target_ie_len) { ++ u8 *next_ie = target_ie + target_ie_len; ++ uint remain_len = ies_len - (next_ie - ies); ++ ++ if (DBG_DEL_WFD_IE && msg) { ++ DBG_871X("%s %d before\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, ies, ies_len); ++ ++ DBG_871X("ies:%p, ies_len:%u\n", ies, ies_len); ++ DBG_871X("target_ie:%p, target_ie_len:%u\n", target_ie, target_ie_len); ++ DBG_871X("next_ie:%p, remain_len:%u\n", next_ie, remain_len); ++ } ++ ++ _rtw_memmove(target_ie, next_ie, remain_len); ++ _rtw_memset(target_ie + remain_len, 0, target_ie_len); ++ ies_len -= target_ie_len; ++ ++ if (DBG_DEL_WFD_IE && msg) { ++ DBG_871X("%s %d after\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, ies, ies_len); ++ } ++ ++ index++; ++ } else { + break; + } +- else +- { +- cnt += attrlen + 3; //goto next +- } +- +- } ++ } + +- return match; ++ return ies_len; ++} ++ ++uint rtw_del_wfd_attr(u8 *ie, uint ielen_ori, u8 attr_id) ++{ ++#define DBG_DEL_WFD_ATTR 0 ++ ++ u8 *target_attr; ++ u32 target_attr_len; ++ uint ielen = ielen_ori; ++ int index = 0; ++ ++ while (1) { ++ target_attr = rtw_get_wfd_attr(ie, ielen, attr_id, NULL, &target_attr_len); ++ if (target_attr && target_attr_len) { ++ u8 *next_attr = target_attr + target_attr_len; ++ uint remain_len = ielen - (next_attr - ie); ++ ++ if (DBG_DEL_WFD_ATTR) { ++ DBG_871X("%s %d before\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, ie, ielen); ++ ++ DBG_871X("ie:%p, ielen:%u\n", ie, ielen); ++ DBG_871X("target_attr:%p, target_attr_len:%u\n", target_attr, target_attr_len); ++ DBG_871X("next_attr:%p, remain_len:%u\n", next_attr, remain_len); ++ } + ++ _rtw_memmove(target_attr, next_attr, remain_len); ++ _rtw_memset(target_attr + remain_len, 0, target_attr_len); ++ *(ie + 1) -= target_attr_len; ++ ielen -= target_attr_len; ++ ++ if (DBG_DEL_WFD_ATTR) { ++ DBG_871X("%s %d after\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, ie, ielen); ++ } ++ ++ index++; ++ } else { ++ break; ++ } ++ } ++ ++ return ielen; ++} ++ ++inline u8 *rtw_bss_ex_get_wfd_ie(WLAN_BSSID_EX *bss_ex, u8 *wfd_ie, uint *wfd_ielen) ++{ ++ return rtw_get_wfd_ie(BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex), wfd_ie, wfd_ielen); ++} ++ ++void rtw_bss_ex_del_wfd_ie(WLAN_BSSID_EX *bss_ex) ++{ ++#define DBG_BSS_EX_DEL_WFD_IE 0 ++ u8 *ies = BSS_EX_TLV_IES(bss_ex); ++ uint ies_len_ori = BSS_EX_TLV_IES_LEN(bss_ex); ++ uint ies_len; ++ ++ ies_len = rtw_del_wfd_ie(ies, ies_len_ori, DBG_BSS_EX_DEL_WFD_IE ? __func__ : NULL); ++ bss_ex->IELength -= ies_len_ori - ies_len; ++} ++ ++void rtw_bss_ex_del_wfd_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id) ++{ ++#define DBG_BSS_EX_DEL_WFD_ATTR 0 ++ ++ u8 *ies = BSS_EX_TLV_IES(bss_ex); ++ uint ies_len = BSS_EX_TLV_IES_LEN(bss_ex); ++ ++ u8 *ie; ++ uint ie_len, ie_len_ori; ++ ++ int index = 0; ++ ++ while (1) { ++ ie = rtw_get_wfd_ie(ies, ies_len, NULL, &ie_len_ori); ++ if (ie) { ++ u8 *next_ie_ori = ie + ie_len_ori; ++ uint remain_len = bss_ex->IELength - (next_ie_ori - bss_ex->IEs); ++ u8 has_target_attr = 0; ++ ++ if (DBG_BSS_EX_DEL_WFD_ATTR) { ++ if (rtw_get_wfd_attr(ie, ie_len_ori, attr_id, NULL, NULL)) { ++ DBG_871X("%s %d before\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex)); ++ ++ DBG_871X("ies:%p, ies_len:%u\n", ies, ies_len); ++ DBG_871X("ie:%p, ie_len_ori:%u\n", ie, ie_len_ori); ++ DBG_871X("next_ie_ori:%p, remain_len:%u\n", next_ie_ori, remain_len); ++ has_target_attr = 1; ++ } ++ } ++ ++ ie_len = rtw_del_wfd_attr(ie, ie_len_ori, attr_id); ++ if (ie_len != ie_len_ori) { ++ u8 *next_ie = ie + ie_len; ++ ++ _rtw_memmove(next_ie, next_ie_ori, remain_len); ++ _rtw_memset(next_ie + remain_len, 0, ie_len_ori - ie_len); ++ bss_ex->IELength -= ie_len_ori - ie_len; ++ ++ ies = next_ie; ++ } else { ++ ies = next_ie_ori; ++ } ++ ++ if (DBG_BSS_EX_DEL_WFD_ATTR) { ++ if (has_target_attr) { ++ DBG_871X("%s %d after\n", __func__, index); ++ dump_ies(RTW_DBGDUMP, BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex)); ++ } ++ } ++ ++ ies_len = remain_len; ++ ++ index++; ++ } else { ++ break; ++ } ++ } + } +-#endif // CONFIG_WFD + + //Baron adds to avoid FreeBSD warning + int ieee80211_is_empty_essid(const char *essid, int essid_len) +@@ -2177,34 +2693,48 @@ void rtw_get_bcn_info(struct wlan_network *pnetwork) + } + } + ++u8 rtw_ht_mcsset_to_nss(u8 *supp_mcs_set) ++{ ++ u8 nss = 1; ++ ++ if (supp_mcs_set[3]) ++ nss = 4; ++ else if (supp_mcs_set[2]) ++ nss = 3; ++ else if (supp_mcs_set[1]) ++ nss = 2; ++ else if (supp_mcs_set[0]) ++ nss = 1; ++ else ++ DBG_871X("%s,%d, warning! supp_mcs_set is zero\n", __func__, __LINE__); ++ /* DBG_871X("%s HT: %dSS\n", __FUNCTION__, nss); */ ++ return nss; ++} ++ + //show MCS rate, unit: 100Kbps + u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char * MCS_rate) + { + u16 max_rate = 0; +- +- if(rf_type == RF_1T1R) +- { +- if(MCS_rate[0] & BIT(7)) +- max_rate = (bw_40MHz) ? ((short_GI)?1500:1350):((short_GI)?722:650); +- else if(MCS_rate[0] & BIT(6)) ++ ++ /*MCS_rate[2] = 3T3R , MCS_rate[1] = 2T2R , MCS_rate[0] = 1T1R*/ ++ if (MCS_rate[2]) { ++ if (MCS_rate[2] & BIT(7)) ++ max_rate = (bw_40MHz) ? ((short_GI)?4500:4050):((short_GI)?2167:1950); ++ else if (MCS_rate[2] & BIT(6)) ++ max_rate = (bw_40MHz) ? ((short_GI)?4050:3645):((short_GI)?1950:1750); ++ else if (MCS_rate[2] & BIT(5)) ++ max_rate = (bw_40MHz) ? ((short_GI)?3600:3240):((short_GI)?1733:1560); ++ else if (MCS_rate[2] & BIT(4)) ++ max_rate = (bw_40MHz) ? ((short_GI)?2700:2430):((short_GI)?1300:1170); ++ else if (MCS_rate[2] & BIT(3)) ++ max_rate = (bw_40MHz) ? ((short_GI)?1800:1620):((short_GI)?867:780); ++ else if (MCS_rate[2] & BIT(2)) + max_rate = (bw_40MHz) ? ((short_GI)?1350:1215):((short_GI)?650:585); +- else if(MCS_rate[0] & BIT(5)) +- max_rate = (bw_40MHz) ? ((short_GI)?1200:1080):((short_GI)?578:520); +- else if(MCS_rate[0] & BIT(4)) ++ else if (MCS_rate[2] & BIT(1)) + max_rate = (bw_40MHz) ? ((short_GI)?900:810):((short_GI)?433:390); +- else if(MCS_rate[0] & BIT(3)) +- max_rate = (bw_40MHz) ? ((short_GI)?600:540):((short_GI)?289:260); +- else if(MCS_rate[0] & BIT(2)) ++ else if (MCS_rate[2] & BIT(0)) + max_rate = (bw_40MHz) ? ((short_GI)?450:405):((short_GI)?217:195); +- else if(MCS_rate[0] & BIT(1)) +- max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); +- else if(MCS_rate[0] & BIT(0)) +- max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); +- } +- else +- { +- if(MCS_rate[1]) +- { ++ } else if (MCS_rate[1]) { + if(MCS_rate[1] & BIT(7)) + max_rate = (bw_40MHz) ? ((short_GI)?3000:2700):((short_GI)?1444:1300); + else if(MCS_rate[1] & BIT(6)) +@@ -2221,9 +2751,7 @@ u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char * MCS_rate) + max_rate = (bw_40MHz) ? ((short_GI)?600:540):((short_GI)?289:260); + else if(MCS_rate[1] & BIT(0)) + max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); +- } +- else +- { ++ } else { + if(MCS_rate[0] & BIT(7)) + max_rate = (bw_40MHz) ? ((short_GI)?1500:1350):((short_GI)?722:650); + else if(MCS_rate[0] & BIT(6)) +@@ -2241,7 +2769,7 @@ u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char * MCS_rate) + else if(MCS_rate[0] & BIT(0)) + max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); + } +- } ++ + return max_rate; + } + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_io.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_io.c +old mode 100755 +new mode 100644 +index e4c0245..d08c16d +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_io.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_io.c +@@ -50,6 +50,7 @@ jackson@realtek.com.tw + #define _RTW_IO_C_ + + #include ++#include + + #if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) + #error "Shall be Linux or Windows, but not both!\n" +@@ -197,6 +198,111 @@ u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr) + _func_exit_; + return r_val; + } ++ ++#ifdef CONFIG_SDIO_INDIRECT_ACCESS ++u8 _rtw_sd_iread8(_adapter *adapter, u32 addr) ++{ ++ u8 r_val = 0x00; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ u8 (*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr); ++ ++ _sd_iread8 = pintfhdl->io_ops._sd_iread8; ++ ++ if (_sd_iread8) ++ r_val = _sd_iread8(pintfhdl, addr); ++ else ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iread8 callback is NULL\n", FUNC_ADPT_ARG(adapter)); ++ ++ return r_val; ++} ++ ++u16 _rtw_sd_iread16(_adapter *adapter, u32 addr) ++{ ++ u16 r_val = 0x00; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ u16 (*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr); ++ ++ _sd_iread16 = pintfhdl->io_ops._sd_iread16; ++ ++ if (_sd_iread16) ++ r_val = _sd_iread16(pintfhdl, addr); ++ else ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iread16 callback is NULL\n", FUNC_ADPT_ARG(adapter)); ++ ++ return r_val; ++} ++ ++u32 _rtw_sd_iread32(_adapter *adapter, u32 addr) ++{ ++ u32 r_val = 0x00; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ u32 (*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr); ++ ++ _sd_iread32 = pintfhdl->io_ops._sd_iread32; ++ ++ if (_sd_iread32) ++ r_val = _sd_iread32(pintfhdl, addr); ++ else ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iread32 callback is NULL\n", FUNC_ADPT_ARG(adapter)); ++ ++ return r_val; ++} ++ ++int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val) ++{ ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++ int ret = -1; ++ ++ _sd_iwrite8 = pintfhdl->io_ops._sd_iwrite8; ++ ++ if (_sd_iwrite8) ++ ret = _sd_iwrite8(pintfhdl, addr, val); ++ else ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iwrite8 callback is NULL\n", FUNC_ADPT_ARG(adapter)); ++ ++ return RTW_STATUS_CODE(ret); ++} ++ ++int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val) ++{ ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++ int ret = -1; ++ ++ _sd_iwrite16 = pintfhdl->io_ops._sd_iwrite16; ++ ++ if (_sd_iwrite16) ++ ret = _sd_iwrite16(pintfhdl, addr, val); ++ else ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iwrite16 callback is NULL\n", FUNC_ADPT_ARG(adapter)); ++ ++ return RTW_STATUS_CODE(ret); ++} ++int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val) ++{ ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++ int ret = -1; ++ ++ _sd_iwrite32 = pintfhdl->io_ops._sd_iwrite32; ++ ++ if (_sd_iwrite32) ++ ret = _sd_iwrite32(pintfhdl, addr, val); ++ else ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iwrite32 callback is NULL\n", FUNC_ADPT_ARG(adapter)); ++ ++ return RTW_STATUS_CODE(ret); ++} ++ ++#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ ++ + #endif /* CONFIG_SDIO_HCI */ + + int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val) +@@ -254,10 +360,11 @@ void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) + + _func_enter_; + +- if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE)) +- { +- RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved)); +- return; ++ if (RTW_CANNOT_RUN(adapter)) { ++ RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_mem:bDriverStopped(%s) OR bSurpriseRemoved(%s)" ++ , rtw_is_drv_stopped(adapter)?"True":"False" ++ , rtw_is_surprise_removed(adapter)?"True":"False")); ++ return; + } + + _read_mem = pintfhdl->io_ops._read_mem; +@@ -294,9 +401,10 @@ void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) + + _func_enter_; + +- if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE)) +- { +- RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved)); ++ if (RTW_CANNOT_RUN(adapter)) { ++ RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_port:bDriverStopped(%s) OR bSurpriseRemoved(%s)" ++ , rtw_is_drv_stopped(adapter)?"True":"False" ++ , rtw_is_surprise_removed(adapter)?"True":"False")); + return; + } + +@@ -416,19 +524,19 @@ void rtw_reset_continual_io_error(struct dvobj_priv *dvobj) + + #ifdef DBG_IO + +-u16 read_sniff_ranges[][2] = { ++u32 read_sniff_ranges[][2] = { + //{0x520, 0x523}, + }; + +-u16 write_sniff_ranges[][2] = { ++u32 write_sniff_ranges[][2] = { + //{0x520, 0x523}, + //{0x4c, 0x4c}, + }; + +-int read_sniff_num = sizeof(read_sniff_ranges)/sizeof(u16)/2; +-int write_sniff_num = sizeof(write_sniff_ranges)/sizeof(u16)/2; ++int read_sniff_num = sizeof(read_sniff_ranges)/sizeof(u32)/2; ++int write_sniff_num = sizeof(write_sniff_ranges)/sizeof(u32)/2; + +-bool match_read_sniff_ranges(u16 addr, u16 len) ++bool match_read_sniff_ranges(u32 addr, u16 len) + { + int i; + for (i = 0; imlmepriv); + struct security_priv *psecuritypriv=&(padapter->securitypriv); +- WLAN_BSSID_EX *psecnetwork=(WLAN_BSSID_EX*)&(psecuritypriv->sec_bss); ++ WLAN_BSSID_EX *psecnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; + u8 * pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); + unsigned char i,*auth_ie,*supp_ie; + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ioctl_rtl.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ioctl_rtl.c +old mode 100755 +new mode 100644 +index d97d3aa..9989659 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ioctl_rtl.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ioctl_rtl.c +@@ -492,7 +492,6 @@ NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv* poid_par_priv) + { + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); +- struct eeprom_priv* peeprompriv = &padapter->eeprompriv; + + if(poid_par_priv->type_of_oid != QUERY_OID) + { +@@ -500,7 +499,7 @@ NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv* poid_par_priv) + return status; + } + *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; +- *(u16 *)poid_par_priv->information_buf = peeprompriv->channel_plan ; ++ *(u16 *)poid_par_priv->information_buf = padapter->mlmepriv.ChannelPlan ; + + return status; + } +@@ -508,7 +507,6 @@ NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv* poid_par_priv) + { + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); +- struct eeprom_priv* peeprompriv = &padapter->eeprompriv; + + if(poid_par_priv->type_of_oid != SET_OID) + { +@@ -516,7 +514,7 @@ NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv* poid_par_priv) + return status; + } + +- peeprompriv->channel_plan = *(u16 *)poid_par_priv->information_buf ; ++ padapter->mlmepriv.ChannelPlan = *(u16 *)poid_par_priv->information_buf ; + + return status; + } +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ioctl_set.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ioctl_set.c +old mode 100755 +new mode 100644 +index 59b88f4..25b1687 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ioctl_set.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ioctl_set.c +@@ -20,6 +20,7 @@ + #define _RTW_IOCTL_SET_C_ + + #include ++#include + + + extern void indicate_wx_scan_complete_event(_adapter *padapter); +@@ -159,9 +160,8 @@ _func_enter_; + + rtw_generate_random_ibss(pibss); + +- if(rtw_createbss_cmd(padapter)!=_SUCCESS) +- { +- RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("***Error=>do_goin: rtw_createbss_cmd status FAIL*** \n ")); ++ if (rtw_create_ibss_cmd(padapter, 0) != _SUCCESS) { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("***Error=>do_goin: rtw_create_ibss_cmd status FAIL***\n")); + ret = _FALSE; + goto exit; + } +@@ -361,7 +361,7 @@ _func_enter_; + rtw_disassoc_cmd(padapter, 0, _TRUE); + + if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + + rtw_free_assoc_resources(padapter, 1); + +@@ -415,7 +415,7 @@ _func_enter_; + DBG_871X_LEVEL(_drv_always_, "set ssid [%s] fw_state=0x%08x\n", + ssid->Ssid, get_fwstate(pmlmepriv)); + +- if(padapter->hw_init_completed==_FALSE){ ++ if (!rtw_is_hw_init_completed(padapter)) { + RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, + ("set_ssid: hw_init_completed==_FALSE=>exit!!!\n")); + status = _FAIL; +@@ -451,7 +451,7 @@ _func_enter_; + rtw_disassoc_cmd(padapter, 0, _TRUE); + + if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + + rtw_free_assoc_resources(padapter, 1); + +@@ -480,7 +480,7 @@ _func_enter_; + rtw_disassoc_cmd(padapter, 0, _TRUE); + + if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + + rtw_free_assoc_resources(padapter, 1); + +@@ -549,7 +549,7 @@ _func_enter_; + goto exit; + } + +- if(padapter->hw_init_completed==_FALSE){ ++ if (!rtw_is_hw_init_completed(padapter)) { + RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, + ("set_ssid: hw_init_completed==_FALSE=>exit!!!\n")); + status = _FAIL; +@@ -644,7 +644,7 @@ _func_enter_; + { + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) + { +- rtw_indicate_disconnect(padapter); //will clr Linked_state; before this function, we must have chked whether issue dis-assoc_cmd or not ++ rtw_indicate_disconnect(padapter, 0, _FALSE); /*will clr Linked_state; before this function, we must have checked whether issue dis-assoc_cmd or not*/ + } + } + +@@ -673,7 +673,10 @@ _func_enter_; + + case Ndis802_11AutoUnknown: + case Ndis802_11InfrastructureMax: +- break; ++ break; ++ case Ndis802_11Monitor: ++ set_fwstate(pmlmepriv, WIFI_MONITOR_STATE); ++ break; + } + + //SecClearAllKeys(adapter); +@@ -704,7 +707,7 @@ _func_enter_; + RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_disassociate: rtw_indicate_disconnect\n")); + + rtw_disassoc_cmd(padapter, 0, _TRUE); +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + //modify for CONFIG_IEEE80211W, none 11w can use it + rtw_free_assoc_resources_cmd(padapter); + if (_FAIL == rtw_pwr_wakeup(padapter)) +@@ -732,7 +735,7 @@ _func_enter_; + res=_FALSE; + goto exit; + } +- if (padapter->hw_init_completed==_FALSE){ ++ if (!rtw_is_hw_init_completed(padapter)) { + res = _FALSE; + RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n===rtw_set_802_11_bssid_list_scan:hw_init_completed==_FALSE===\n")); + goto exit; +@@ -996,8 +999,8 @@ _func_enter_; + } + } + +- // Check key length for WEP. For NDTEST, 2005.01.27, by rcnjko. +- if( (encryptionalgo== _WEP40_|| encryptionalgo== _WEP104_) && (key->KeyLength != 5 || key->KeyLength != 13)) { ++ /* Check key length for WEP. For NDTEST, 2005.01.27, by rcnjko. -> modify checking condition*/ ++ if (((encryptionalgo == _WEP40_) && (key->KeyLength != 5)) || ((encryptionalgo == _WEP104_) && (key->KeyLength != 13))) { + RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("WEP KeyLength:0x%x != 5 or 13\n", key->KeyLength)); + ret=_FAIL; + goto exit; +@@ -1252,16 +1255,22 @@ _func_enter_; + + + //Set key to CAM through H2C command ++ #if 0 + if(bgrouptkey)//never go to here + { +- res=rtw_setstakey_cmd(padapter, stainfo, _FALSE, _TRUE); ++ res=rtw_setstakey_cmd(padapter, stainfo, GROUP_KEY, _TRUE); + RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(group)\n")); + } + else{ +- res=rtw_setstakey_cmd(padapter, stainfo, _TRUE, _TRUE); ++ res=rtw_setstakey_cmd(padapter, stainfo, UNICAST_KEY, _TRUE); + RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(unicast)\n")); + } ++ #else + ++ res = rtw_setstakey_cmd(padapter, stainfo, UNICAST_KEY, _TRUE); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(unicast)\n")); ++ #endif ++ + if(res ==_FALSE) + ret= _FAIL; + +@@ -1428,7 +1437,7 @@ int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan) + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + + //handle by cmd_thread to sync with scan operation +- return rtw_set_chplan_cmd(adapter, channel_plan, 1, 1); ++ return rtw_set_chplan_cmd(adapter, RTW_CMDF_WAIT_ACK, channel_plan, 1); + } + + /* +@@ -1440,26 +1449,11 @@ int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan) + */ + int rtw_set_country(_adapter *adapter, const char *country_code) + { +- int channel_plan = RT_CHANNEL_DOMAIN_WORLD_WIDE_5G; +- +- DBG_871X("%s country_code:%s\n", __func__, country_code); +- +- //TODO: should have a table to match country code and RT_CHANNEL_DOMAIN +- //TODO: should consider 2-character and 3-character country code +- if(0 == strcmp(country_code, "US")) +- channel_plan = RT_CHANNEL_DOMAIN_FCC; +- else if(0 == strcmp(country_code, "EU")) +- channel_plan = RT_CHANNEL_DOMAIN_ETSI; +- else if(0 == strcmp(country_code, "JP")) +- channel_plan = RT_CHANNEL_DOMAIN_MKK; +- else if(0 == strcmp(country_code, "CN")) +- channel_plan = RT_CHANNEL_DOMAIN_CHINA; +- else if(0 == strcmp(country_code, "IN")) +- channel_plan = RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN; +- else +- DBG_871X("%s unknown country_code:%s\n", __FUNCTION__, country_code); +- +- return rtw_set_channel_plan(adapter, channel_plan); ++#ifdef CONFIG_RTW_IOCTL_SET_COUNTRY ++ return rtw_set_country_cmd(adapter, RTW_CMDF_WAIT_ACK, country_code, 1); ++#else ++ return _FAIL; ++#endif + } + + /* +@@ -1469,7 +1463,7 @@ int rtw_set_country(_adapter *adapter, const char *country_code) + * + * Return _SUCCESS or _FAIL + */ +-int rtw_set_band(_adapter *adapter, enum _BAND band) ++int rtw_set_band(_adapter *adapter, u8 band) + { + if (rtw_band_valid(band)) { + DBG_871X(FUNC_ADPT_FMT" band:%d\n", FUNC_ADPT_ARG(adapter), band); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_iol.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_iol.c +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mem.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mem.c +old mode 100755 +new mode 100644 +index a4de3e6..45ccd9d +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mem.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mem.c +@@ -1,103 +1,122 @@ +- +-#include +-#include +- +-MODULE_LICENSE("GPL"); +-MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); +-MODULE_AUTHOR("Realtek Semiconductor Corp."); +-MODULE_VERSION("DRIVERVERSION"); +- +-struct sk_buff_head rtk_skb_mem_q; +-struct u8* rtk_buf_mem[NR_RECVBUFF]; +- +-struct u8 * rtw_get_buf_premem(int index) +-{ +- printk("%s, rtk_buf_mem index : %d\n", __func__, index); +- return rtk_buf_mem[index]; +-} +- +-struct sk_buff *rtw_alloc_skb_premem(void) +-{ +- struct sk_buff *skb = NULL; +- +- skb = skb_dequeue(&rtk_skb_mem_q); +- +- printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); +- +- return skb; +-} +-EXPORT_SYMBOL(rtw_alloc_skb_premem); +- +-int rtw_free_skb_premem(struct sk_buff *pskb) +-{ +- if(!pskb) +- return -1; +- +- if(skb_queue_len(&rtk_skb_mem_q) >= NR_PREALLOC_RECV_SKB) +- return -1; +- +- skb_queue_tail(&rtk_skb_mem_q, pskb); +- +- printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); +- +- return 0; +-} +-EXPORT_SYMBOL(rtw_free_skb_premem); +- +-static int __init rtw_mem_init(void) +-{ +- int i; +- SIZE_PTR tmpaddr=0; +- SIZE_PTR alignment=0; +- struct sk_buff *pskb=NULL; +- +- printk("%s\n", __func__); +- +-#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX +- for(i=0; i ++#include ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); ++MODULE_AUTHOR("Realtek Semiconductor Corp."); ++MODULE_VERSION("DRIVERVERSION"); ++ ++struct sk_buff_head rtk_skb_mem_q; ++struct u8* rtk_buf_mem[NR_RECVBUFF]; ++ ++struct u8 * rtw_get_buf_premem(int index) ++{ ++ printk("%s, rtk_buf_mem index : %d\n", __func__, index); ++ return rtk_buf_mem[index]; ++} ++ ++u16 rtw_rtkm_get_buff_size(void) ++{ ++ return MAX_RTKM_RECVBUF_SZ; ++} ++EXPORT_SYMBOL(rtw_rtkm_get_buff_size); ++ ++u8 rtw_rtkm_get_nr_recv_skb(void) ++{ ++ return MAX_RTKM_NR_PREALLOC_RECV_SKB; ++} ++EXPORT_SYMBOL(rtw_rtkm_get_nr_recv_skb); ++ ++struct sk_buff *rtw_alloc_skb_premem(u16 in_size) ++{ ++ struct sk_buff *skb = NULL; ++ ++ if (in_size > MAX_RTKM_RECVBUF_SZ) { ++ pr_info("warning %s: driver buffer size(%d) > rtkm buffer size(%d)\n", __func__, in_size, MAX_RTKM_RECVBUF_SZ); ++ WARN_ON(1); ++ return skb; ++ } ++ ++ skb = skb_dequeue(&rtk_skb_mem_q); ++ ++ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); ++ ++ return skb; ++} ++EXPORT_SYMBOL(rtw_alloc_skb_premem); ++ ++int rtw_free_skb_premem(struct sk_buff *pskb) ++{ ++ if(!pskb) ++ return -1; ++ ++ if (skb_queue_len(&rtk_skb_mem_q) >= MAX_RTKM_NR_PREALLOC_RECV_SKB) ++ return -1; ++ ++ skb_queue_tail(&rtk_skb_mem_q, pskb); ++ ++ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); ++ ++ return 0; ++} ++EXPORT_SYMBOL(rtw_free_skb_premem); ++ ++static int __init rtw_mem_init(void) ++{ ++ int i; ++ SIZE_PTR tmpaddr=0; ++ SIZE_PTR alignment=0; ++ struct sk_buff *pskb=NULL; ++ ++ printk("%s\n", __func__); ++ pr_info("MAX_RTKM_NR_PREALLOC_RECV_SKB: %d\n", MAX_RTKM_NR_PREALLOC_RECV_SKB); ++ pr_info("MAX_RTKM_RECVBUF_SZ: %d\n", MAX_RTKM_RECVBUF_SZ); ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++ for(i=0; idata; +- alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); +- skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); +- +- skb_queue_tail(&rtk_skb_mem_q, pskb); +- } +- else +- { +- printk("%s, alloc skb memory fail!\n", __func__); +- } +- +- pskb=NULL; +- } +- +- printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); +- +- return 0; +- +-} +- +-static void __exit rtw_mem_exit(void) +-{ +- if (skb_queue_len(&rtk_skb_mem_q)) { +- printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); +- } +- +- skb_queue_purge(&rtk_skb_mem_q); +- +- printk("%s\n", __func__); +-} +- +-module_init(rtw_mem_init); +-module_exit(rtw_mem_exit); +- ++ rtk_buf_mem[i] = usb_buffer_alloc(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma); ++ } ++#endif //CONFIG_USE_USB_BUFFER_ALLOC_RX ++ ++ skb_queue_head_init(&rtk_skb_mem_q); ++ ++ for(i=0; idata; ++ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); ++ skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); ++ ++ skb_queue_tail(&rtk_skb_mem_q, pskb); ++ } ++ else ++ { ++ printk("%s, alloc skb memory fail!\n", __func__); ++ } ++ ++ pskb=NULL; ++ } ++ ++ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); ++ ++ return 0; ++ ++} ++ ++static void __exit rtw_mem_exit(void) ++{ ++ if (skb_queue_len(&rtk_skb_mem_q)) { ++ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); ++ } ++ ++ skb_queue_purge(&rtk_skb_mem_q); ++ ++ printk("%s\n", __func__); ++} ++ ++module_init(rtw_mem_init); ++module_exit(rtw_mem_exit); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mlme.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mlme.c +old mode 100755 +new mode 100644 +index 4da0fee..98f69bf +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mlme.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mlme.c +@@ -19,8 +19,7 @@ + ******************************************************************************/ + #define _RTW_MLME_C_ + +-#include +- ++#include + + extern void indicate_wx_scan_complete_event(_adapter *padapter); + extern u8 rtw_do_join(_adapter * padapter); +@@ -77,6 +76,9 @@ _func_enter_; + //allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf + + rtw_clear_scan_deny(padapter); ++#ifdef CONFIG_ARP_KEEP_ALIVE ++ pmlmepriv->bGetGateway = 0; ++#endif + + #ifdef CONFIG_LAYER2_ROAMING + #define RTW_ROAM_SCAN_RESULT_EXP_MS 5*1000 +@@ -140,6 +142,7 @@ void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv) + rtw_free_mlme_ie_data(&pmlmepriv->p2p_probe_resp_ie, &pmlmepriv->p2p_probe_resp_ie_len); + rtw_free_mlme_ie_data(&pmlmepriv->p2p_go_probe_resp_ie, &pmlmepriv->p2p_go_probe_resp_ie_len); + rtw_free_mlme_ie_data(&pmlmepriv->p2p_assoc_req_ie, &pmlmepriv->p2p_assoc_req_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->p2p_assoc_resp_ie, &pmlmepriv->p2p_assoc_resp_ie_len); + #endif + + #if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) +@@ -148,10 +151,108 @@ void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv) + rtw_free_mlme_ie_data(&pmlmepriv->wfd_probe_resp_ie, &pmlmepriv->wfd_probe_resp_ie_len); + rtw_free_mlme_ie_data(&pmlmepriv->wfd_go_probe_resp_ie, &pmlmepriv->wfd_go_probe_resp_ie_len); + rtw_free_mlme_ie_data(&pmlmepriv->wfd_assoc_req_ie, &pmlmepriv->wfd_assoc_req_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wfd_assoc_resp_ie, &pmlmepriv->wfd_assoc_resp_ie_len); + #endif + + } + ++#if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) ++int rtw_mlme_update_wfd_ie_data(struct mlme_priv *mlme, u8 type, u8 *ie, u32 ie_len) ++{ ++ _adapter *adapter = mlme_to_adapter(mlme); ++ struct wifi_display_info *wfd_info = &adapter->wfd_info; ++ u8 clear = 0; ++ u8 **t_ie = NULL; ++ u32 *t_ie_len = NULL; ++ int ret = _FAIL; ++ ++ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) ++ goto success; ++ ++ if (wfd_info->wfd_enable == _TRUE) ++ goto success; /* WFD IE is build by self */ ++ ++ if (!ie && !ie_len) { ++ clear = 1; ++ } else if (!ie || !ie_len) { ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" type:%u, ie:%p, ie_len:%u" ++ , FUNC_ADPT_ARG(adapter), type, ie, ie_len); ++ rtw_warn_on(1); ++ goto exit; ++ } ++ ++ switch (type) { ++ case MLME_BEACON_IE: ++ t_ie = &mlme->wfd_beacon_ie; ++ t_ie_len = &mlme->wfd_beacon_ie_len; ++ break; ++ case MLME_PROBE_REQ_IE: ++ t_ie = &mlme->wfd_probe_req_ie; ++ t_ie_len = &mlme->wfd_probe_req_ie_len; ++ break; ++ case MLME_PROBE_RESP_IE: ++ t_ie = &mlme->wfd_probe_resp_ie; ++ t_ie_len = &mlme->wfd_probe_resp_ie_len; ++ break; ++ case MLME_GO_PROBE_RESP_IE: ++ t_ie = &mlme->wfd_go_probe_resp_ie; ++ t_ie_len = &mlme->wfd_go_probe_resp_ie_len; ++ break; ++ case MLME_ASSOC_REQ_IE: ++ t_ie = &mlme->wfd_assoc_req_ie; ++ t_ie_len = &mlme->wfd_assoc_req_ie_len; ++ break; ++ case MLME_ASSOC_RESP_IE: ++ t_ie = &mlme->wfd_assoc_resp_ie; ++ t_ie_len = &mlme->wfd_assoc_resp_ie_len; ++ break; ++ default: ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" unsupported type:%u" ++ , FUNC_ADPT_ARG(adapter), type); ++ rtw_warn_on(1); ++ goto exit; ++ } ++ ++ if (*t_ie) { ++ u32 free_len = *t_ie_len; ++ *t_ie_len = 0; ++ rtw_mfree(*t_ie, free_len); ++ *t_ie = NULL; ++ } ++ ++ if (!clear) { ++ *t_ie = rtw_malloc(ie_len); ++ if (*t_ie == NULL) { ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" type:%u, rtw_malloc() fail\n" ++ , FUNC_ADPT_ARG(adapter), type); ++ goto exit; ++ } ++ _rtw_memcpy(*t_ie, ie, ie_len); ++ *t_ie_len = ie_len; ++ } ++ ++ if (*t_ie && *t_ie_len) { ++ u8 *attr_content; ++ u32 attr_contentlen = 0; ++ ++ attr_content = rtw_get_wfd_attr_content(*t_ie, *t_ie_len, WFD_ATTR_DEVICE_INFO, NULL, &attr_contentlen); ++ if (attr_content && attr_contentlen) { ++ if (RTW_GET_BE16(attr_content + 2) != wfd_info->rtsp_ctrlport) { ++ wfd_info->rtsp_ctrlport = RTW_GET_BE16(attr_content + 2); ++ DBG_871X(FUNC_ADPT_FMT" type:%u, RTSP CTRL port = %u\n" ++ , FUNC_ADPT_ARG(adapter), type, wfd_info->rtsp_ctrlport); ++ } ++ } ++ } ++ ++success: ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++#endif /* defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) */ ++ + void _rtw_free_mlme_priv (struct mlme_priv *pmlmepriv) + { + _func_enter_; +@@ -427,9 +528,11 @@ sint rtw_if_up(_adapter *padapter) { + sint res; + _func_enter_; + +- if( padapter->bDriverStopped || padapter->bSurpriseRemoved || +- (check_fwstate(&padapter->mlmepriv, _FW_LINKED)== _FALSE)){ +- RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_if_up:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ if (RTW_CANNOT_RUN(padapter) || ++ (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == _FALSE)) { ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_if_up:bDriverStopped(%s) OR bSurpriseRemoved(%s)" ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False")); + res=_FALSE; + } + else +@@ -442,17 +545,10 @@ _func_exit_; + + void rtw_generate_random_ibss(u8* pibss) + { +- u32 curtime = rtw_get_current_time(); +- +-_func_enter_; +- pibss[0] = 0x02; //in ad-hoc mode bit1 must set to 1 ++ *((u32 *)(&pibss[2])) = rtw_random32(); ++ pibss[0] = 0x02; /* in ad-hoc mode local bit must set to 1 */ + pibss[1] = 0x11; + pibss[2] = 0x87; +- pibss[3] = (u8)(curtime & 0xff) ;//p[0]; +- pibss[4] = (u8)((curtime>>8) & 0xff) ;//p[1]; +- pibss[5] = (u8)((curtime>>16) & 0xff) ;//p[2]; +-_func_exit_; +- return; + } + + u8 *rtw_get_capability_from_ie(u8 *ie) +@@ -936,8 +1032,7 @@ _func_enter_; + goto exit; + } + #ifdef CONFIG_ANTENNA_DIVERSITY +- //target->PhyInfo.Optimum_antenna = pHalData->CurAntenna;//optimum_antenna=>For antenna diversity +- rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna)); ++ rtw_hal_get_odm_var(adapter, HAL_ODM_ANTDIV_SELECT, &(target->PhyInfo.Optimum_antenna), NULL); + #endif + _rtw_memcpy(&(pnetwork->network), target, get_WLAN_BSSID_EX_sz(target)); + //pnetwork->last_scanned = rtw_get_current_time(); +@@ -966,8 +1061,7 @@ _func_enter_; + bssid_ex_sz = get_WLAN_BSSID_EX_sz(target); + target->Length = bssid_ex_sz; + #ifdef CONFIG_ANTENNA_DIVERSITY +- //target->PhyInfo.Optimum_antenna = pHalData->CurAntenna; +- rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna)); ++ rtw_hal_get_odm_var(adapter, HAL_ODM_ANTDIV_SELECT, &(target->PhyInfo.Optimum_antenna), NULL); + #endif + _rtw_memcpy(&(pnetwork->network), target, bssid_ex_sz ); + +@@ -1025,9 +1119,13 @@ _func_enter_; + //_enter_critical_bh(&queue->lock, &irqL); + + #if defined(CONFIG_P2P) && defined(CONFIG_P2P_REMOVE_GROUP_INFO) +- rtw_WLAN_BSSID_EX_remove_p2p_attr(pnetwork, P2P_ATTR_GROUP_INFO); ++ if (adapter->registrypriv.wifi_spec == 0) ++ rtw_bss_ex_del_p2p_attr(pnetwork, P2P_ATTR_GROUP_INFO); + #endif + ++ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) ++ rtw_bss_ex_del_wfd_ie(pnetwork); ++ + update_current_network(adapter, pnetwork); + + rtw_update_scanned_network(adapter, pnetwork); +@@ -1198,51 +1296,37 @@ _func_exit_; + return; + } + +- +- + void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf) + { + _irqL irqL; +- u8 timer_cancelled = _FALSE; ++ u8 timer_cancelled; + struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); +- +-#ifdef CONFIG_MLME_EXT + ++#ifdef CONFIG_MLME_EXT + mlmeext_surveydone_event_callback(adapter); +- + #endif + +-_func_enter_; ++_func_enter_; + + _enter_critical_bh(&pmlmepriv->lock, &irqL); +- if(pmlmepriv->wps_probe_req_ie) +- { ++ if (pmlmepriv->wps_probe_req_ie) { + u32 free_len = pmlmepriv->wps_probe_req_ie_len; + pmlmepriv->wps_probe_req_ie_len = 0; + rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); +- pmlmepriv->wps_probe_req_ie = NULL; ++ pmlmepriv->wps_probe_req_ie = NULL; + } +- ++ + RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_surveydone_event_callback: fw_state:%x\n\n", get_fwstate(pmlmepriv))); +- +- if (check_fwstate(pmlmepriv,_FW_UNDER_SURVEY)) +- { +- //u8 timer_cancelled; + +- timer_cancelled = _TRUE; +- //_cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled); +- +- _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); ++ if (check_fwstate(pmlmepriv,_FW_UNDER_SURVEY) == _FALSE) { ++ DBG_871X(FUNC_ADPT_FMT" fw_state:0x%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv)); ++ //rtw_warn_on(1); + } +- else { +- +- RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("nic status =%x, survey done event comes too late!\n", get_fwstate(pmlmepriv))); +- } +- _exit_critical_bh(&pmlmepriv->lock, &irqL); + +- if(timer_cancelled) +- _cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled); ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); + ++ _cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled); + + _enter_critical_bh(&pmlmepriv->lock, &irqL); + +@@ -1258,12 +1342,12 @@ _func_enter_; + { + set_fwstate(pmlmepriv, _FW_UNDER_LINKING); + +- if(rtw_select_and_join_from_scanned_queue(pmlmepriv)==_SUCCESS) +- { +- _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT ); +- } +- else +- { ++ if(rtw_select_and_join_from_scanned_queue(pmlmepriv)==_SUCCESS) ++ { ++ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); ++ } ++ else ++ { + WLAN_BSSID_EX *pdev_network = &(adapter->registrypriv.dev_network); + u8 *pibss = adapter->registrypriv.dev_network.MacAddress; + +@@ -1278,12 +1362,11 @@ _func_enter_; + rtw_update_registrypriv_dev_network(adapter); + rtw_generate_random_ibss(pibss); + +- pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE; ++ ++ pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE; + +- if(rtw_createbss_cmd(adapter)!=_SUCCESS) +- { +- RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Error=>rtw_createbss_cmd status FAIL\n")); +- } ++ if (rtw_create_ibss_cmd(adapter, 0) != _SUCCESS) ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("Error=>rtw_create_ibss_cmd status FAIL\n")); + + pmlmepriv->to_join = _FALSE; + } +@@ -1321,14 +1404,14 @@ _func_enter_; + } + #endif // CONFIG_INTEL_WIDI + rtw_free_assoc_resources(adapter, 1); +- rtw_indicate_disconnect(adapter); ++ rtw_indicate_disconnect(adapter, 0, _FALSE); + } else { + pmlmepriv->to_join = _TRUE; + } + } + else + { +- rtw_indicate_disconnect(adapter); ++ rtw_indicate_disconnect(adapter, 0, _FALSE); + } + _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); + } +@@ -1340,7 +1423,7 @@ _func_enter_; + { + if (rtw_select_roaming_candidate(pmlmepriv) == _SUCCESS) { + receive_disconnect(adapter, pmlmepriv->cur_network.network.MacAddress +- , WLAN_REASON_ACTIVE_ROAM); ++ , WLAN_REASON_ACTIVE_ROAM, _FALSE); + } + } + } +@@ -1360,9 +1443,6 @@ _func_enter_; + #ifdef CONFIG_CONCURRENT_MODE + rtw_os_xmit_schedule(adapter->pbuddy_adapter); + #endif +-#ifdef CONFIG_DUALMAC_CONCURRENT +- dc_resume_xmit(adapter); +-#endif + + #ifdef CONFIG_DRVEXT_MODULE_WSC + drvext_surveydone_callback(&adapter->drvextpriv); +@@ -1483,16 +1563,14 @@ _func_enter_; + RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("tgt_network->network.MacAddress="MAC_FMT" ssid=%s\n", + MAC_ARG(tgt_network->network.MacAddress), tgt_network->network.Ssid.Ssid)); + +- if(check_fwstate( pmlmepriv, WIFI_STATION_STATE|WIFI_AP_STATE)) +- { ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { + struct sta_info* psta; + + psta = rtw_get_stainfo(&adapter->stapriv, tgt_network->network.MacAddress); + + #ifdef CONFIG_TDLS +- if(ptdlsinfo->link_established == _TRUE) +- { +- rtw_tdls_cmd(adapter, myid(&(adapter->eeprompriv)), TDLS_RS_RCR); ++ if (ptdlsinfo->link_established == _TRUE) { ++ rtw_tdls_cmd(adapter, NULL, TDLS_RS_RCR); + rtw_reset_tdls_info(adapter); + rtw_free_all_stainfo(adapter); + //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); +@@ -1508,8 +1586,7 @@ _func_enter_; + + } + +- if(check_fwstate( pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)) +- { ++ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) { + struct sta_info* psta; + + rtw_free_all_stainfo(adapter); +@@ -1524,7 +1601,7 @@ _func_enter_; + + if(lock_scanned_queue) + _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); +- ++ + pwlan = _rtw_find_same_network(&pmlmepriv->scanned_queue, tgt_network); + if(pwlan) + { +@@ -1549,7 +1626,8 @@ _func_enter_; + if((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) && (adapter->stapriv.asoc_sta_count== 1)) + /*||check_fwstate(pmlmepriv, WIFI_STATION_STATE)*/) + { +- rtw_free_network_nolock(adapter, pwlan); ++ if (pwlan) ++ rtw_free_network_nolock(adapter, pwlan); + } + + if(lock_scanned_queue) +@@ -1580,10 +1658,6 @@ _func_enter_; + if(!check_fwstate(&padapter->mlmepriv, _FW_LINKED)) + { + +-#ifdef CONFIG_SW_ANTENNA_DIVERSITY +- rtw_hal_set_hwreg(padapter, HW_VAR_ANTENNA_DIVERSITY_LINK, 0); +-#endif +- + set_fwstate(pmlmepriv, _FW_LINKED); + + rtw_led_control(padapter, LED_CTL_LINK); +@@ -1624,7 +1698,7 @@ _func_exit_; + /* + *rtw_indicate_disconnect: the caller has to lock pmlmepriv->lock + */ +-void rtw_indicate_disconnect( _adapter *padapter ) ++void rtw_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generated) + { + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +@@ -1679,7 +1753,8 @@ _func_enter_; + || (rtw_to_roam(padapter) <= 0) + ) + { +- rtw_os_indicate_disconnect(padapter); ++ ++ rtw_os_indicate_disconnect(padapter, reason, locally_generated); + + //set ips_deny_time to avoid enter IPS before LPS leave + rtw_set_ips_deny(padapter, 3000); +@@ -1701,7 +1776,7 @@ _func_enter_; + + #ifdef CONFIG_BEAMFORMING + beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_LEAVE, cur_network->MacAddress, ETH_ALEN, 1); +-#endif ++#endif /*CONFIG_BEAMFORMING*/ + + _func_exit_; + } +@@ -1730,36 +1805,79 @@ inline void rtw_indicate_scan_done( _adapter *padapter, bool aborted) + #endif // CONFIG_IPS + } + +-void rtw_scan_abort(_adapter *adapter) ++static u32 _rtw_wait_scan_done(_adapter *adapter, u8 abort, u32 timeout_ms) + { +- u32 cnt=0; + u32 start; +- struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ u32 pass_ms; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); + + start = rtw_get_current_time(); +- pmlmeext->scan_abort = _TRUE; ++ ++ pmlmeext->scan_abort = abort; ++ + while (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) +- && rtw_get_passing_time_ms(start) <= 200) { ++ && rtw_get_passing_time_ms(start) <= timeout_ms) { + +- if (adapter->bDriverStopped || adapter->bSurpriseRemoved) ++ if (RTW_CANNOT_RUN(adapter)) + break; + + DBG_871X(FUNC_NDEV_FMT"fw_state=_FW_UNDER_SURVEY!\n", FUNC_NDEV_ARG(adapter->pnetdev)); + rtw_msleep_os(20); + } + +- if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) { +- if (!adapter->bDriverStopped && !adapter->bSurpriseRemoved) +- DBG_871X(FUNC_NDEV_FMT"waiting for scan_abort time out!\n", FUNC_NDEV_ARG(adapter->pnetdev)); +- #ifdef CONFIG_PLATFORM_MSTAR +- //_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); +- set_survey_timer(pmlmeext, 0); +- _set_timer(&pmlmepriv->scan_to_timer, 50); +- #endif +- rtw_indicate_scan_done(adapter, _TRUE); ++ if (_TRUE == abort) { ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) { ++ if (!RTW_CANNOT_RUN(adapter)) ++ DBG_871X(FUNC_NDEV_FMT"waiting for scan_abort time out!\n", FUNC_NDEV_ARG(adapter->pnetdev)); ++ #ifdef CONFIG_PLATFORM_MSTAR ++ /*_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);*/ ++ set_survey_timer(pmlmeext, 0); ++ mlme_set_scan_to_timer(pmlmepriv, 50); ++ #endif ++ rtw_indicate_scan_done(adapter, _TRUE); ++ } + } ++ + pmlmeext->scan_abort = _FALSE; ++ pass_ms = rtw_get_passing_time_ms(start); ++ ++ return pass_ms; ++ ++} ++ ++void rtw_scan_wait_completed(_adapter *adapter) ++{ ++ u32 scan_to = SCANNING_TIMEOUT; ++ ++#ifdef CONFIG_SCAN_BACKOP ++ if (IsSupported5G(adapter->registrypriv.wireless_mode) ++ && IsSupported24G(adapter->registrypriv.wireless_mode)) /*dual band*/ ++ scan_to = CONC_SCANNING_TIMEOUT_DUAL_BAND; ++ else /*single band*/ ++ scan_to = CONC_SCANNING_TIMEOUT_SINGLE_BAND; ++#endif /* CONFIG_SCAN_BACKOP */ ++ ++ _rtw_wait_scan_done(adapter, _FALSE, scan_to); ++} ++ ++u32 rtw_scan_abort_timeout(_adapter *adapter, u32 timeout_ms) ++{ ++ return _rtw_wait_scan_done(adapter, _TRUE, timeout_ms); ++} ++ ++void rtw_scan_abort_no_wait(_adapter *adapter) ++{ ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) ++ pmlmeext->scan_abort = _TRUE; ++} ++ ++void rtw_scan_abort(_adapter *adapter) ++{ ++ rtw_scan_abort_timeout(adapter, 200); + } + + static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wlan_network *pnetwork) +@@ -1855,6 +1973,7 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl + #endif + preorder_ctrl->wend_b= 0xffff; + preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 ++ preorder_ctrl->ampdu_size = RX_AMPDU_SIZE_INVALID; + } + + +@@ -1873,6 +1992,7 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl + #endif + preorder_ctrl->wend_b= 0xffff; + preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 ++ preorder_ctrl->ampdu_size = RX_AMPDU_SIZE_INVALID; + } + } + } +@@ -2079,29 +2199,20 @@ _func_enter_; + + + //s3. find ptarget_sta & update ptarget_sta after update cur_network only for station mode +- if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) +- { ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { + ptarget_sta = rtw_joinbss_update_stainfo(adapter, pnetwork); +- if(ptarget_sta==NULL) +- { +- RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't update stainfo when joinbss_event callback\n")); ++ if (ptarget_sta == NULL) { ++ DBG_871X_LEVEL(_drv_err_, "Can't update stainfo when joinbss_event callback\n"); + _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); + goto ignore_joinbss_callback; + } + } + + //s4. indicate connect +- if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) +- { ++ if (MLME_IS_STA(adapter) || MLME_IS_ADHOC(adapter)) { + pmlmepriv->cur_network_scanned = ptarget_wlan; + rtw_indicate_connect(adapter); + } +- else +- { +- //adhoc mode will rtw_indicate_connect when rtw_stassoc_event_callback +- RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("adhoc mode, fw_state:%x", get_fwstate(pmlmepriv))); +- } +- + + //s5. Cancle assoc_timer + _cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled); +@@ -2189,89 +2300,128 @@ _func_enter_; + rtw_os_xmit_schedule(adapter->pbuddy_adapter); + #endif + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- dc_resume_xmit(adapter); +-#endif +- + _func_exit_; + } + +-#if 0 +-//#if (RATE_ADAPTIVE_SUPPORT==1) //for 88E RA +-u8 search_max_mac_id(_adapter *padapter) ++void rtw_sta_media_status_rpt(_adapter *adapter, struct sta_info *sta, bool connected) + { +- u8 mac_id, aid; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct sta_priv *pstapriv = &padapter->stapriv; ++ struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; ++ bool miracast_enabled = 0; ++ bool miracast_sink = 0; ++ u8 role = H2C_MSR_ROLE_RSVD; ++ ++ if (sta == NULL) { ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" sta is NULL\n" ++ , FUNC_ADPT_ARG(adapter)); ++ rtw_warn_on(1); ++ return; ++ } + +-#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) +- if(check_fwstate(pmlmepriv, WIFI_AP_STATE)){ +- +-#if 1 +- _irqL irqL; +- struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); ++ if (sta->mac_id >= macid_ctl->num) { ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" invalid macid:%u\n" ++ , FUNC_ADPT_ARG(adapter), sta->mac_id); ++ rtw_warn_on(1); ++ return; ++ } + +- _enter_critical_bh(&pdvobj->lock, &irqL); +- for(mac_id=(NUM_STA-1); mac_id>0; mac_id--) +- if(pdvobj->macid[mac_id] == _TRUE) +- break; +- _exit_critical_bh(&pdvobj->lock, &irqL); ++ if (!rtw_macid_is_used(macid_ctl, sta->mac_id)) { ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" macid:%u not is used, set connected to 0\n" ++ , FUNC_ADPT_ARG(adapter), sta->mac_id); ++ connected = 0; ++ rtw_warn_on(1); ++ } + +-#else +- for (aid = (pstapriv->max_num_sta); aid > 0; aid--) +- { +- if (pstapriv->sta_aid[aid-1] != NULL) +- { +- psta = pstapriv->sta_aid[aid-1]; +- break; +- } ++ if (connected && !rtw_macid_is_bmc(macid_ctl, sta->mac_id)) { ++ miracast_enabled = STA_OP_WFD_MODE(sta) != 0 && is_miracast_enabled(adapter); ++ miracast_sink = miracast_enabled && (STA_OP_WFD_MODE(sta) & MIRACAST_SINK); ++ ++ #ifdef CONFIG_TDLS ++ if (sta->tdls_sta_state & TDLS_LINKED_STATE) ++ role = H2C_MSR_ROLE_TDLS; ++ else ++ #endif ++ if (MLME_IS_STA(adapter)) { ++ if (MLME_IS_GC(adapter)) ++ role = H2C_MSR_ROLE_GO; ++ else ++ role = H2C_MSR_ROLE_AP; ++ } else if (MLME_IS_AP(adapter)) { ++ if (MLME_IS_GO(adapter)) ++ role = H2C_MSR_ROLE_GC; ++ else ++ role = H2C_MSR_ROLE_STA; ++ } else if (MLME_IS_ADHOC(adapter) || MLME_IS_ADHOC_MASTER(adapter)) ++ role = H2C_MSR_ROLE_ADHOC; ++ ++ #ifdef CONFIG_WFD ++ if (role == H2C_MSR_ROLE_GC ++ || role == H2C_MSR_ROLE_GO ++ || role == H2C_MSR_ROLE_TDLS ++ ) { ++ if (adapter->wfd_info.rtsp_ctrlport ++ || adapter->wfd_info.tdls_rtsp_ctrlport ++ || adapter->wfd_info.peer_rtsp_ctrlport) ++ rtw_wfd_st_switch(sta, 1); + } +-/* +- for (mac_id = (pstapriv->max_num_sta-1); mac_id >= 0; mac_id--) +- { +- if (pstapriv->sta_aid[mac_id] != NULL) +- break; +- } +-*/ +- mac_id = aid + 1; +-#endif ++ #endif + } +- else +-#endif +- {//adhoc id = 31~2 +- for (mac_id = (NUM_STA-1); mac_id >= IBSS_START_MAC_ID ; mac_id--) +- { +- if (pmlmeinfo->FW_sta_info[mac_id].status == 1) +- { +- break; +- } +- } ++ ++ rtw_hal_set_FwMediaStatusRpt_single_cmd(adapter ++ , connected ++ , miracast_enabled ++ , miracast_sink ++ , role ++ , sta->mac_id ++ ); ++} ++ ++u8 rtw_sta_media_status_rpt_cmd(_adapter *adapter, struct sta_info *sta, bool connected) ++{ ++ struct cmd_priv *cmdpriv = &adapter->cmdpriv; ++ struct cmd_obj *cmdobj; ++ struct drvextra_cmd_parm *cmd_parm; ++ struct sta_media_status_rpt_cmd_parm *rpt_parm; ++ u8 res = _SUCCESS; ++ ++ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (cmdobj == NULL) { ++ res = _FAIL; ++ goto exit; + } + +- DBG_871X("max mac_id=%d\n", mac_id); ++ cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if (cmd_parm == NULL) { ++ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } + +- return mac_id; ++ rpt_parm = (struct sta_media_status_rpt_cmd_parm *)rtw_zmalloc(sizeof(struct sta_media_status_rpt_cmd_parm)); ++ if (rpt_parm == NULL) { ++ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *)cmd_parm, sizeof(struct drvextra_cmd_parm)); ++ res = _FAIL; ++ goto exit; ++ } + +-} +-#endif ++ rpt_parm->sta = sta; ++ rpt_parm->connected = connected; + +-//FOR STA, AP ,AD-HOC mode +-void rtw_sta_media_status_rpt(_adapter *adapter,struct sta_info *psta, u32 mstatus) +-{ +- u16 media_status_rpt; ++ cmd_parm->ec_id = STA_MSTATUS_RPT_WK_CID; ++ cmd_parm->type = 0; ++ cmd_parm->size = sizeof(struct sta_media_status_rpt_cmd_parm); ++ cmd_parm->pbuf = (u8 *)rpt_parm; ++ init_h2fwcmd_w_parm_no_rsp(cmdobj, cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + +- if(psta==NULL) return; ++ res = rtw_enqueue_cmd(cmdpriv, cmdobj); + +- #if (RATE_ADAPTIVE_SUPPORT==1) //for 88E RA +- { +- u8 macid = rtw_search_max_mac_id(adapter); +- rtw_hal_set_hwreg(adapter,HW_VAR_TX_RPT_MAX_MACID, (u8*)&macid); +- } +- #endif +- media_status_rpt = (u16)((psta->mac_id<<8)|mstatus); // MACID|OPMODE:1 connect +- rtw_hal_set_hwreg(adapter,HW_VAR_H2C_MEDIA_STATUS_RPT,(u8 *)&media_status_rpt); ++exit: ++ return res; ++} ++ ++inline void rtw_sta_media_status_rpt_cmd_hdl(_adapter *adapter, struct sta_media_status_rpt_cmd_parm *parm) ++{ ++ rtw_sta_media_status_rpt(adapter, parm->sta, parm->connected); + } + + void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf) +@@ -2335,35 +2485,21 @@ _func_enter_; + + #ifdef CONFIG_BEAMFORMING + beamforming_wk_cmd(adapter, BEAMFORMING_CTRL_ENTER, (u8 *)psta, sizeof(struct sta_info), 0); +-#endif ++#endif/*CONFIG_BEAMFORMING*/ + } + goto exit; + } + #endif //defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) + +- //for AD-HOC mode +- psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr); +- if( psta != NULL) +- { +- //the sta have been in sta_info_queue => do nothing +- +- RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Error: rtw_stassoc_event_callback: sta has been in sta_hash_queue \n")); +- +- goto exit; //(between drv has received this event before and fw have not yet to set key to CAM_ENTRY) +- } +- +- psta = rtw_alloc_stainfo(&adapter->stapriv, pstassoc->macaddr); ++ /* for AD-HOC mode */ ++ psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr); + if (psta == NULL) { +- RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't alloc sta_info when rtw_stassoc_event_callback\n")); ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" get no sta_info with "MAC_FMT"\n" ++ , FUNC_ADPT_ARG(adapter), MAC_ARG(pstassoc->macaddr)); ++ rtw_warn_on(1); + goto exit; +- } +- +- //to do : init sta_info variable +- psta->qos_option = 0; +- psta->mac_id = (uint)pstassoc->cam_id; +- //psta->aid = (uint)pstassoc->cam_id; +- DBG_871X("%s\n",__FUNCTION__); +- //for ad-hoc mode ++ } ++ + rtw_hal_set_odm_var(adapter,HAL_ODM_STA_INFO,psta,_TRUE); + + rtw_sta_media_status_rpt(adapter, psta, 1); +@@ -2398,7 +2534,7 @@ _func_enter_; + + #ifdef CONFIG_RTL8711 + //submit SetStaKey_cmd to tell fw, fw will allocate an CAM entry for this sta +- rtw_setstakey_cmd(adapter, psta, _FALSE, _TRUE); ++ rtw_setstakey_cmd(adapter, psta, GROUP_KEY, _TRUE); + #endif + + exit: +@@ -2407,6 +2543,38 @@ _func_exit_; + + } + ++#ifdef CONFIG_IEEE80211W ++void rtw_sta_timeout_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ _irqL irqL; ++ struct sta_info *psta; ++ struct stadel_event *pstadel = (struct stadel_event *)pbuf; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ ++_func_enter_; ++ ++ psta = rtw_get_stainfo(&adapter->stapriv, pstadel->macaddr); ++ ++ if (psta) { ++ u8 updated = _FALSE; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (rtw_is_list_empty(&psta->asoc_list) == _FALSE) { ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ updated = ap_free_sta(adapter, psta, _TRUE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL); ++ } ++ ++ ++_func_exit_; ++ ++} ++#endif /* CONFIG_IEEE80211W */ ++ + void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) + { + _irqL irqL,irqL2; +@@ -2421,7 +2589,8 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) + struct wlan_network *tgt_network = &(pmlmepriv->cur_network); + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- ++ struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; ++ + _func_enter_; + + psta = rtw_get_stainfo(&adapter->stapriv, pstadel->macaddr); +@@ -2432,12 +2601,25 @@ _func_enter_; + + DBG_871X("%s(mac_id=%d)=" MAC_FMT "\n", __func__, mac_id, MAC_ARG(pstadel->macaddr)); + +- if(mac_id>=0){ +- u16 media_status; +- media_status = (mac_id<<8)|0; // MACID|OPMODE:0 means disconnect +- //for STA,AP,ADHOC mode, report disconnect stauts to FW +- rtw_hal_set_hwreg(adapter, HW_VAR_H2C_MEDIA_STATUS_RPT, (u8 *)&media_status); +- } ++ if (mac_id >= 0 && mac_id < macid_ctl->num) { ++ rtw_hal_set_FwMediaStatusRpt_single_cmd(adapter, 0, 0, 0, 0, mac_id); ++ /* ++ * For safety, prevent from keeping macid sleep. ++ * If we can sure all power mode enter/leave are paired, ++ * this check can be removed. ++ * Lucas@20131113 ++ */ ++ /* wakeup macid after disconnect. */ ++ if (MLME_IS_STA(adapter)) ++ rtw_hal_macid_wakeup(adapter, mac_id); ++ ++ if (psta) ++ rtw_wfd_st_switch(psta, 0); ++ } else { ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" invalid macid:%u\n" ++ , FUNC_ADPT_ARG(adapter), mac_id); ++ rtw_warn_on(1); ++ } + + //if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) + if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) +@@ -2492,7 +2674,7 @@ _func_enter_; + rtw_free_uc_swdec_pending_queue(adapter); + + rtw_free_assoc_resources(adapter, 1); +- rtw_indicate_disconnect(adapter); ++ rtw_indicate_disconnect(adapter, *(u16 *)pstadel->rsvd, pstadel->locally_generated); + rtw_free_mlme_priv_ie_data(pmlmepriv); + + _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); +@@ -2552,14 +2734,9 @@ _func_enter_; + _clr_fwstate_(pmlmepriv, WIFI_ADHOC_STATE); + } + +- if(rtw_createbss_cmd(adapter)!=_SUCCESS) +- { +- +- RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("***Error=>stadel_event_callback: rtw_createbss_cmd status FAIL*** \n ")); ++ if (rtw_create_ibss_cmd(adapter, 0) != _SUCCESS) ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("***Error=>stadel_event_callback: rtw_create_ibss_cmd status FAIL***\n")); + +- } +- +- + } + + } +@@ -2611,7 +2788,7 @@ void _rtw_join_timeout_handler (_adapter *adapter) + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + + #if 0 +- if (adapter->bDriverStopped == _TRUE){ ++ if (rtw_is_drv_stopped(adapter)) { + _rtw_up_sema(&pmlmepriv->assoc_terminate); + return; + } +@@ -2622,7 +2799,7 @@ _func_enter_; + + DBG_871X("%s, fw_state=%x\n", __FUNCTION__, get_fwstate(pmlmepriv)); + +- if(adapter->bDriverStopped ||adapter->bSurpriseRemoved) ++ if (RTW_CANNOT_RUN(adapter)) + return; + + +@@ -2650,7 +2827,7 @@ _func_enter_; + } + #endif // CONFIG_INTEL_WIDI + DBG_871X("%s We've try roaming but fail\n", __FUNCTION__); +- rtw_indicate_disconnect(adapter); ++ rtw_indicate_disconnect(adapter, 0, _FALSE); + break; + } + } +@@ -2658,12 +2835,12 @@ _func_enter_; + } else + #endif + { +- rtw_indicate_disconnect(adapter); ++ rtw_indicate_disconnect(adapter, 0, _FALSE); + free_scanqueue(pmlmepriv);//??? + + #ifdef CONFIG_IOCTL_CFG80211 + //indicate disconnect for the case that join_timeout and check_fwstate != FW_LINKED +- rtw_cfg80211_indicate_disconnect(adapter); ++ rtw_cfg80211_indicate_disconnect(adapter, 0, _FALSE); + #endif //CONFIG_IOCTL_CFG80211 + + } +@@ -2687,16 +2864,19 @@ _func_exit_; + void rtw_scan_timeout_handler (_adapter *adapter) + { + _irqL irqL; +- struct mlme_priv *pmlmepriv = &adapter->mlmepriv; +- ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + DBG_871X(FUNC_ADPT_FMT" fw_state=%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv)); + + _enter_critical_bh(&pmlmepriv->lock, &irqL); + + _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); +- ++ + _exit_critical_bh(&pmlmepriv->lock, &irqL); +- ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_surveydone_event_callback(adapter); ++#endif //CONFIG_IOCTL_CFG80211 ++ + rtw_indicate_scan_done(adapter, _TRUE); + + #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_IOCTL_CFG80211) +@@ -2733,6 +2913,14 @@ void rtw_mlme_reset_auto_scan_int(_adapter *adapter) + goto exit; + } + #endif ++ ++#ifdef CONFIG_TDLS ++ if (adapter->tdlsinfo.link_established == _TRUE) { ++ mlme->auto_scan_int_ms = 0; ++ goto exit; ++ } ++#endif ++ + if(pmlmeinfo->VHT_enable) //disable auto scan when connect to 11AC AP + { + mlme->auto_scan_int_ms = 0; +@@ -2751,49 +2939,50 @@ exit: + return; + } + +-static void rtw_auto_scan_handler(_adapter *padapter) ++void rtw_drv_scan_by_self(_adapter *padapter) + { + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + +- rtw_mlme_reset_auto_scan_int(padapter); +- +- if (pmlmepriv->auto_scan_int_ms != 0 +- && rtw_get_passing_time_ms(pmlmepriv->scan_start_time) > pmlmepriv->auto_scan_int_ms) { +- +- if (!padapter->registrypriv.wifi_spec) { +- if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) +- { +- DBG_871X(FUNC_ADPT_FMT" _FW_UNDER_SURVEY|_FW_UNDER_LINKING\n", FUNC_ADPT_ARG(padapter)); +- goto exit; +- } ++ if (!padapter->registrypriv.wifi_spec) { ++ if (check_fwstate(pmlmepriv, (_FW_UNDER_SURVEY | _FW_UNDER_LINKING)) == _TRUE) { ++ DBG_871X(FUNC_ADPT_FMT" _FW_UNDER_SURVEY|_FW_UNDER_LINKING\n", FUNC_ADPT_ARG(padapter)); ++ goto exit; ++ } + +- if(pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) +- { +- DBG_871X(FUNC_ADPT_FMT" exit BusyTraffic\n", FUNC_ADPT_ARG(padapter)); +- goto exit; +- } ++ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) { ++ DBG_871X(FUNC_ADPT_FMT" exit BusyTraffic\n", FUNC_ADPT_ARG(padapter)); ++ goto exit; + } ++ } + + #ifdef CONFIG_CONCURRENT_MODE +- if (rtw_buddy_adapter_up(padapter)) +- { +- if ((check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) || +- (padapter->pbuddy_adapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE)) +- { +- DBG_871X(FUNC_ADPT_FMT", but buddy_intf is under scanning or linking or BusyTraffic\n" +- , FUNC_ADPT_ARG(padapter)); ++ if (rtw_buddy_adapter_up(padapter)) { ++ if ((check_buddy_fwstate(padapter, (_FW_UNDER_SURVEY | _FW_UNDER_LINKING)) == _TRUE) || ++ (padapter->pbuddy_adapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE)) { ++ DBG_871X(FUNC_ADPT_FMT", but buddy_intf is under scanning or linking or BusyTraffic\n", FUNC_ADPT_ARG(padapter)); + goto exit; +- } + } ++ } + #endif + +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); + +- rtw_set_802_11_bssid_list_scan(padapter, NULL, 0); +- } ++ rtw_set_802_11_bssid_list_scan(padapter, NULL, 0); + + exit: +- return; ++ return; ++} ++ ++static void rtw_auto_scan_handler(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ rtw_mlme_reset_auto_scan_int(padapter); ++ ++ if (pmlmepriv->auto_scan_int_ms != 0 ++ && rtw_get_passing_time_ms(pmlmepriv->scan_start_time) > pmlmepriv->auto_scan_int_ms) ++ rtw_drv_scan_by_self(padapter); ++ + } + + void rtw_dynamic_check_timer_handlder(_adapter *adapter) +@@ -2809,10 +2998,10 @@ void rtw_dynamic_check_timer_handlder(_adapter *adapter) + if(!adapter) + return; + +- if(adapter->hw_init_completed == _FALSE) ++ if (!rtw_is_hw_init_completed(adapter)) + return; + +- if ((adapter->bDriverStopped == _TRUE)||(adapter->bSurpriseRemoved== _TRUE)) ++ if (RTW_CANNOT_RUN(adapter)) + return; + + +@@ -2832,11 +3021,13 @@ void rtw_dynamic_check_timer_handlder(_adapter *adapter) + } + + #ifdef CONFIG_BT_COEXIST +- if(is_primary_adapter(adapter)) +- DBG_871X("IsBtDisabled=%d, IsBtControlLps=%d\n", rtw_btcoex_IsBtDisabled(adapter), rtw_btcoex_IsBtControlLps(adapter)); ++ if (is_primary_adapter(adapter)) { ++ if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist == 1) ++ DBG_871X("IsBtDisabled=%d, IsBtControlLps=%d\n" , rtw_btcoex_IsBtDisabled(adapter) , rtw_btcoex_IsBtControlLps(adapter)); ++ } + #endif + +-#ifdef CONFIG_LPS_LCLK_WD_TIMER ++#ifdef CONFIG_LPS_LCLK_WD_TIMER /* to avoid leaving lps 32k frequently*/ + if ((adapter_to_pwrctl(adapter)->bFwCurrentInPSMode ==_TRUE ) + #ifdef CONFIG_BT_COEXIST + && (rtw_btcoex_IsBtControlLps(adapter) == _FALSE) +@@ -2928,7 +3119,7 @@ inline void rtw_clear_scan_deny(_adapter *adapter) + struct mlme_priv *mlmepriv = &adapter->mlmepriv; + ATOMIC_SET(&mlmepriv->set_scan_deny, 0); + if (0) +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); + } + + void rtw_set_scan_deny_timer_hdl(_adapter *adapter) +@@ -2944,7 +3135,7 @@ void rtw_set_scan_deny(_adapter *adapter, u32 ms) + #endif + + if (0) +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); + ATOMIC_SET(&mlmepriv->set_scan_deny, 1); + _set_timer(&mlmepriv->set_scan_deny_timer, ms); + +@@ -2953,7 +3144,7 @@ void rtw_set_scan_deny(_adapter *adapter, u32 ms) + return; + + if (0) +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter->pbuddy_adapter)); ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter->pbuddy_adapter)); + b_mlmepriv = &adapter->pbuddy_adapter->mlmepriv; + ATOMIC_SET(&b_mlmepriv->set_scan_deny, 1); + _set_timer(&b_mlmepriv->set_scan_deny_timer, ms); +@@ -3053,11 +3244,11 @@ _func_enter_; + mlme->pscanned = get_next(mlme->pscanned); + + if (0) +- DBG_871X("%s("MAC_FMT", ch%u) rssi:%d\n" +- , pnetwork->network.Ssid.Ssid +- , MAC_ARG(pnetwork->network.MacAddress) +- , pnetwork->network.Configuration.DSConfig +- , (int)pnetwork->network.Rssi); ++ DBG_871X("%s("MAC_FMT", ch%u) rssi:%d\n" ++ , pnetwork->network.Ssid.Ssid ++ , MAC_ARG(pnetwork->network.MacAddress) ++ , pnetwork->network.Configuration.DSConfig ++ , (int)pnetwork->network.Rssi); + + rtw_check_roaming_candidate(mlme, &candidate, pnetwork); + +@@ -3131,16 +3322,11 @@ static int rtw_check_join_candidate(struct mlme_priv *mlme + } + + if(updated){ +- DBG_871X("[by_bssid:%u][assoc_ssid:%s]" +- #ifdef CONFIG_LAYER2_ROAMING +- "[to_roam:%u] " +- #endif ++ DBG_871X("[by_bssid:%u][assoc_ssid:%s][to_roam:%u] " + "new candidate: %s("MAC_FMT", ch%u) rssi:%d\n", + mlme->assoc_by_bssid, + mlme->assoc_ssid.Ssid, +- #ifdef CONFIG_LAYER2_ROAMING + rtw_to_roam(adapter), +- #endif + (*candidate)->network.Ssid.Ssid, + MAC_ARG((*candidate)->network.MacAddress), + (*candidate)->network.Configuration.DSConfig, +@@ -3203,11 +3389,11 @@ _func_enter_; + pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); + + if (0) +- DBG_871X("%s("MAC_FMT", ch%u) rssi:%d\n" +- , pnetwork->network.Ssid.Ssid +- , MAC_ARG(pnetwork->network.MacAddress) +- , pnetwork->network.Configuration.DSConfig +- , (int)pnetwork->network.Rssi); ++ DBG_871X("%s("MAC_FMT", ch%u) rssi:%d\n" ++ , pnetwork->network.Ssid.Ssid ++ , MAC_ARG(pnetwork->network.MacAddress) ++ , pnetwork->network.Configuration.DSConfig ++ , (int)pnetwork->network.Rssi); + + rtw_check_join_candidate(pmlmepriv, &candidate, pnetwork); + +@@ -3248,7 +3434,7 @@ candidate_exist: + #endif + { + rtw_disassoc_cmd(adapter, 0, _TRUE); +- rtw_indicate_disconnect(adapter); ++ rtw_indicate_disconnect(adapter, 0, _FALSE); + rtw_free_assoc_resources(adapter, 0); + } + } +@@ -3258,10 +3444,10 @@ candidate_exist: + if(_TRUE == bSupportAntDiv) + { + u8 CurrentAntenna; +- rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(CurrentAntenna)); ++ rtw_hal_get_odm_var(adapter, HAL_ODM_ANTDIV_SELECT, &(CurrentAntenna), NULL); + DBG_871X("#### Opt_Ant_(%s) , cur_Ant(%s)\n", +- (2==candidate->network.PhyInfo.Optimum_antenna)?"A":"B", +- (2==CurrentAntenna)?"A":"B" ++ (MAIN_ANT == candidate->network.PhyInfo.Optimum_antenna) ? "MAIN_ANT":"AUX_ANT", ++ (MAIN_ANT == CurrentAntenna) ? "MAIN_ANT":"AUX_ANT" + ); + } + #endif +@@ -3650,9 +3836,8 @@ _func_exit_; + void rtw_init_registrypriv_dev_network( _adapter* adapter) + { + struct registry_priv* pregistrypriv = &adapter->registrypriv; +- struct eeprom_priv* peepriv = &adapter->eeprompriv; + WLAN_BSSID_EX *pdev_network = &pregistrypriv->dev_network; +- u8 *myhwaddr = myid(peepriv); ++ u8 *myhwaddr = adapter_mac_addr(adapter); + + _func_enter_; + +@@ -3680,6 +3865,7 @@ void rtw_update_registrypriv_dev_network(_adapter* adapter) + struct security_priv* psecuritypriv = &adapter->securitypriv; + struct wlan_network *cur_network = &adapter->mlmepriv.cur_network; + //struct xmit_priv *pxmitpriv = &adapter->xmitpriv; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + + _func_enter_; + +@@ -3727,9 +3913,15 @@ _func_enter_; + pdev_network->Configuration.DSConfig = (pregistrypriv->channel); + RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("pregistrypriv->channel=%d, pdev_network->Configuration.DSConfig=0x%x\n", pregistrypriv->channel, pdev_network->Configuration.DSConfig)); + +- if(cur_network->network.InfrastructureMode == Ndis802_11IBSS) ++ if (cur_network->network.InfrastructureMode == Ndis802_11IBSS) { + pdev_network->Configuration.ATIMWindow = (0); + ++ if (pmlmeext->cur_channel != 0) ++ pdev_network->Configuration.DSConfig = pmlmeext->cur_channel; ++ else ++ pdev_network->Configuration.DSConfig = 1; ++ } ++ + pdev_network->InfrastructureMode = (cur_network->network.InfrastructureMode); + + // 1. Supported rates +@@ -3829,7 +4021,7 @@ void rtw_ht_use_default_setting(_adapter *padapter) + SET_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX); + } + if (phtpriv->ldpc_cap) +- DBG_871X("[HT] Support LDPC = 0x%02X\n", phtpriv->ldpc_cap); ++ DBG_871X("[HT] HAL Support LDPC = 0x%02X\n", phtpriv->ldpc_cap); + + // STBC + rtw_hal_get_def_var(padapter, HAL_DEF_TX_STBC, (u8 *)&bHwSTBCSupport); +@@ -3846,7 +4038,7 @@ void rtw_ht_use_default_setting(_adapter *padapter) + SET_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX); + } + if (phtpriv->stbc_cap) +- DBG_871X("[HT] Support STBC = 0x%02X\n", phtpriv->stbc_cap); ++ DBG_871X("[HT] HAL Support STBC = 0x%02X\n", phtpriv->stbc_cap); + + // Beamforming setting + rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&bHwSupportBeamformer); +@@ -3855,15 +4047,14 @@ void rtw_ht_use_default_setting(_adapter *padapter) + if(TEST_FLAG(pregistrypriv->beamform_cap, BIT4) && bHwSupportBeamformer) + { + SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); +- DBG_871X("[HT] Support Beamformer\n"); ++ DBG_871X("[HT] HAL Support Beamformer\n"); + } + if(TEST_FLAG(pregistrypriv->beamform_cap, BIT5) && bHwSupportBeamformee) + { + SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); +- DBG_871X("[HT] Support Beamformee\n"); ++ DBG_871X("[HT] HAL Support Beamformee\n"); + } + } +- + void rtw_build_wmm_ie_ht(_adapter *padapter, u8 *out_ie, uint *pout_len) + { + unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; +@@ -3885,9 +4076,10 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui + { + u32 ielen, out_len; + HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor; ++ HT_CAP_AMPDU_DENSITY best_ampdu_density; + unsigned char *p, *pframe; + struct rtw_ieee80211_ht_cap ht_capie; +- u8 cbw40_enable = 0, stbc_rx_enable = 0, rf_type = 0, operation_bw=0; ++ u8 cbw40_enable = 0, rf_type = 0, operation_bw = 0, rf_num = 0, rx_stbc_nss = 0; + struct registry_priv *pregistrypriv = &padapter->registrypriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct ht_priv *phtpriv = &pmlmepriv->htpriv; +@@ -3935,12 +4127,14 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui + } + + /* to disable 40M Hz support while gd_bw_40MHz_en = 0 */ +- if (channel > 14) { +- if ((pregistrypriv->bw_mode & 0xf0) > 0) +- cbw40_enable = 1; +- } else { +- if ((pregistrypriv->bw_mode & 0x0f) > 0) +- cbw40_enable = 1; ++ if (hal_chk_bw_cap(padapter, BW_CAP_40M)) { ++ if (channel > 14) { ++ if (REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) ++ cbw40_enable = 1; ++ } else { ++ if (REGSTY_IS_BW_2G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) ++ cbw40_enable = 1; ++ } + } + + if ((cbw40_enable == 1) && (operation_bw == CHANNEL_WIDTH_40)) { +@@ -3949,19 +4143,31 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui + ht_capie.cap_info |= IEEE80211_HT_CAP_SGI_40; + } + +- if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX)) +- ht_capie.cap_info |= IEEE80211_HT_CAP_TX_STBC; +- + /* todo: disable SM power save mode */ + ht_capie.cap_info |= IEEE80211_HT_CAP_SM_PS; + ++ /* RX LDPC */ ++ if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_RX)) { ++ ht_capie.cap_info |= IEEE80211_HT_CAP_LDPC_CODING; ++ DBG_871X("[HT] Declare supporting RX LDPC\n"); ++ } ++ ++ /* TX STBC */ ++ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX)) { ++ ht_capie.cap_info |= IEEE80211_HT_CAP_TX_STBC; ++ DBG_871X("[HT] Declare supporting TX STBC\n"); ++ } ++ ++ /* RX STBC */ + if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX)) { + if((pregistrypriv->rx_stbc == 0x3) || /* enable for 2.4/5 GHz */ +- ((channel <= 14) && (pregistrypriv->rx_stbc == 0x1)) || /* enable for 2.4GHz */ ++ ((channel <= 14) && (pregistrypriv->rx_stbc == 0x1)) || /* enable for 2.4GHz */ + ((channel > 14) && (pregistrypriv->rx_stbc == 0x2)) || /* enable for 5GHz */ + (pregistrypriv->wifi_spec == 1)) { +- stbc_rx_enable = 1; +- DBG_871X("declare supporting RX STBC\n"); ++ /* HAL_DEF_RX_STBC means STBC RX spatial stream, todo: VHT 4 streams */ ++ rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)(&rx_stbc_nss)); ++ SET_HT_CAP_ELE_RX_STBC(&ht_capie, rx_stbc_nss); ++ DBG_871X("[HT] Declare supporting RX STBC = %d\n", rx_stbc_nss); + } + } + +@@ -3974,29 +4180,25 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui + switch(rf_type) + { + case RF_1T1R: +- +- if (stbc_rx_enable) +- ht_capie.cap_info |= IEEE80211_HT_CAP_RX_STBC_1R;//RX STBC One spatial stream +- +- set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_1R); ++ set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_1R); + break; + + case RF_2T2R: + case RF_1T2R: +- default: +- +- if (stbc_rx_enable) +- ht_capie.cap_info |= IEEE80211_HT_CAP_RX_STBC_2R;//RX STBC two spatial stream +- + #ifdef CONFIG_DISABLE_MCS13TO15 + if(((cbw40_enable == 1) && (operation_bw == CHANNEL_WIDTH_40)) && (pregistrypriv->wifi_spec!=1)) + set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R_13TO15_OFF); + else + set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R); + #else //CONFIG_DISABLE_MCS13TO15 +- set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R); ++ set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R); + #endif //CONFIG_DISABLE_MCS13TO15 + break; ++ case RF_3T3R: ++ set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_3R); ++ break; ++ default: ++ DBG_871X("[warning] rf_type %d is not expected\n", rf_type); + } + + { +@@ -4035,34 +4237,43 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui + } + else + { +- if(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ ) +- ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); +- else ++ if (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) { ++ /* ++ * Todo : Each chip must to ask DD , this chip best ampdu_density setting ++ * By yiwei.sun ++ */ ++ rtw_hal_get_def_var(padapter, HW_VAR_BEST_AMPDU_DENSITY, &best_ampdu_density); ++ ++ ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & (best_ampdu_density << 2)); ++ ++ } else + ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); + } + #ifdef CONFIG_BEAMFORMING + ht_capie.tx_BF_cap_info = 0; + +- // HT Beamformer +- if(TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) +- { +- // Transmit NDP Capable ++ /* HT Beamformer*/ ++ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { ++ /* Transmit NDP Capable */ + SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(&ht_capie, 1); +- // Explicit Compressed Steering Capable ++ /* Explicit Compressed Steering Capable */ + SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(&ht_capie, 1); +- // Compressed Steering Number Antennas ++ /* Compressed Steering Number Antennas */ + SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(&ht_capie, 1); ++ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); ++ SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(&ht_capie, rf_num); + } + +- // HT Beamformee +- if(TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) +- { +- // Receive NDP Capable ++ /* HT Beamformee */ ++ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) { ++ /* Receive NDP Capable */ + SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(&ht_capie, 1); +- // Explicit Compressed Beamforming Feedback Capable ++ /* Explicit Compressed Beamforming Feedback Capable */ + SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(&ht_capie, 2); ++ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); ++ SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(&ht_capie, rf_num); + } +-#endif ++#endif/*CONFIG_BEAMFORMING*/ + + pframe = rtw_set_ie(out_ie+out_len, _HT_CAPABILITY_IE_, + sizeof(struct rtw_ieee80211_ht_cap), (unsigned char*)&ht_capie, pout_len); +@@ -4154,12 +4365,14 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) + //todo: + } + +- if (channel > 14) { +- if ((pregistrypriv->bw_mode & 0xf0) > 0) +- cbw40_enable = 1; +- } else { +- if ((pregistrypriv->bw_mode & 0x0f) > 0) +- cbw40_enable = 1; ++ if (hal_chk_bw_cap(padapter, BW_CAP_40M)) { ++ if (channel > 14) { ++ if (REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) ++ cbw40_enable = 1; ++ } else { ++ if (REGSTY_IS_BW_2G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) ++ cbw40_enable = 1; ++ } + } + + //update cur_bwmode & cur_ch_offset +@@ -4168,7 +4381,7 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) + (pmlmeinfo->HT_info.infos[0] & BIT(2))) + { + int i; +- u8 rf_type; ++ u8 rf_type = RF_1T1R; + + rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); + +@@ -4183,9 +4396,8 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) + case RF_1T2R: + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R); + break; +- case RF_2T2R: +- default: +-#ifdef CONFIG_DISABLE_MCS13TO15 ++ case RF_2T2R: ++ #ifdef CONFIG_DISABLE_MCS13TO15 + if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1 ) + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R_13TO15_OFF); + else +@@ -4193,6 +4405,12 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) + #else //CONFIG_DISABLE_MCS13TO15 + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); + #endif //CONFIG_DISABLE_MCS13TO15 ++ break; ++ case RF_3T3R: ++ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_3R); ++ break; ++ default: ++ DBG_871X("[warning] rf_type %d is not expected\n", rf_type); + } + + //switch to the 40M Hz mode accoring to the AP +@@ -4289,21 +4507,17 @@ void rtw_issue_addbareq_cmd_tdls(_adapter *padapter, struct xmit_frame *pxmitfra + + priority = pattrib->priority; + +- if(pattrib->direct_link == _TRUE) +- { ++ if (pattrib->direct_link == _TRUE) { + ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); +- if((ptdls_sta != NULL) && (ptdls_sta->tdls_sta_state & TDLS_ESTABLISHED)) +- { ++ if ((ptdls_sta != NULL) && (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) { + phtpriv = &ptdls_sta->htpriv; + +- if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) +- { ++ if ((phtpriv->ht_option == _TRUE) && (phtpriv->ampdu_enable == _TRUE)) { + issued = (phtpriv->agg_enable_bitmap>>priority)&0x1; + issued |= (phtpriv->candidate_tid_bitmap>>priority)&0x1; + +- if(0==issued) +- { +- DBG_871X("rtw_issue_addbareq_cmd, p=%d\n", priority); ++ if (0 == issued) { ++ DBG_871X("[%s], p=%d\n", __FUNCTION__, priority); + ptdls_sta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); + rtw_addbareq_cmd(padapter,(u8)priority, pattrib->dst); + } +@@ -4376,9 +4590,9 @@ void rtw_append_exented_cap(_adapter *padapter, u8 *out_ie, uint *pout_len) + #ifdef CONFIG_80211AC_VHT + struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; + #endif //CONFIG_80211AC_VHT +- u8 cap_content[8] = {0}; ++ u8 cap_content[8] = { 0 }; + u8 *pframe; +- ++ u8 null_content[8] = {0}; + + if (phtpriv->bss_coexist) { + SET_EXT_CAPABILITY_ELE_BSS_COEXIST(cap_content, 1); +@@ -4389,8 +4603,13 @@ void rtw_append_exented_cap(_adapter *padapter, u8 *out_ie, uint *pout_len) + SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(cap_content, 1); + } + #endif //CONFIG_80211AC_VHT +- +- pframe = rtw_set_ie(out_ie+*pout_len, EID_EXTCapability, 8, cap_content , pout_len); ++ /* ++ From 802.11 specification,if a STA does not support any of capabilities defined ++ in the Extended Capabilities element, then the STA is not required to ++ transmit the Extended Capabilities element. ++ */ ++ if (_FALSE == _rtw_memcmp(cap_content, null_content, 8)) ++ pframe = rtw_set_ie(out_ie + *pout_len, EID_EXTCapability, 8, cap_content , pout_len); + } + #endif + +@@ -4451,7 +4670,7 @@ void _rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network) + continue; + } else { + DBG_871X("%s(%d) -to roaming fail, indicate_disconnect\n", __FUNCTION__,__LINE__); +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + break; + } + } +@@ -4461,6 +4680,31 @@ void _rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network) + } + #endif /* CONFIG_LAYER2_ROAMING */ + ++bool rtw_adjust_chbw(_adapter *adapter, u8 req_ch, u8 *req_bw, u8 *req_offset) ++{ ++ struct registry_priv *regsty = adapter_to_regsty(adapter); ++ u8 allowed_bw; ++ ++ if (req_ch <= 14) ++ allowed_bw = REGSTY_BW_2G(regsty); ++ else ++ allowed_bw = REGSTY_BW_5G(regsty); ++ ++ allowed_bw = hal_largest_bw(adapter, allowed_bw); ++ ++ if (allowed_bw == CHANNEL_WIDTH_80 && *req_bw > CHANNEL_WIDTH_80) ++ *req_bw = CHANNEL_WIDTH_80; ++ else if (allowed_bw == CHANNEL_WIDTH_40 && *req_bw > CHANNEL_WIDTH_40) ++ *req_bw = CHANNEL_WIDTH_40; ++ else if (allowed_bw == CHANNEL_WIDTH_20 && *req_bw > CHANNEL_WIDTH_20) { ++ *req_bw = CHANNEL_WIDTH_20; ++ *req_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ } else ++ return _FALSE; ++ ++ return _TRUE; ++} ++ + sint rtw_linked_check(_adapter *padapter) + { + if( (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) || +@@ -4487,18 +4731,12 @@ sint rtw_buddy_adapter_up(_adapter *padapter) + + + if(padapter->pbuddy_adapter == NULL) +- { + res = _FALSE; +- } +- else if( (padapter->pbuddy_adapter->bDriverStopped) || (padapter->pbuddy_adapter->bSurpriseRemoved) || +- (padapter->pbuddy_adapter->bup == _FALSE) || (padapter->pbuddy_adapter->hw_init_completed == _FALSE)) +- { ++ else if (RTW_CANNOT_RUN(padapter) || ++ (padapter->pbuddy_adapter->bup == _FALSE) || (!rtw_is_hw_init_completed(padapter))) + res = _FALSE; +- } + else +- { + res = _TRUE; +- } + + return res; + +@@ -4534,3 +4772,71 @@ u8 rtw_get_buddy_bBusyTraffic(_adapter *padapter) + } + + #endif //CONFIG_CONCURRENT_MODE ++ ++bool is_miracast_enabled(_adapter *adapter) ++{ ++ bool enabled = 0; ++#ifdef CONFIG_WFD ++ struct wifi_display_info *wfdinfo = &adapter->wfd_info; ++ ++ enabled = (wfdinfo->stack_wfd_mode & (MIRACAST_SOURCE | MIRACAST_SINK)) ++ || (wfdinfo->op_wfd_mode & (MIRACAST_SOURCE | MIRACAST_SINK)); ++#endif ++ ++ return enabled; ++} ++ ++bool rtw_chk_miracast_mode(_adapter *adapter, u8 mode) ++{ ++ bool ret = 0; ++#ifdef CONFIG_WFD ++ struct wifi_display_info *wfdinfo = &adapter->wfd_info; ++ ++ ret = (wfdinfo->stack_wfd_mode & mode) || (wfdinfo->op_wfd_mode & mode); ++#endif ++ ++ return ret; ++} ++ ++const char *get_miracast_mode_str(int mode) ++{ ++ if (mode == MIRACAST_SOURCE) ++ return "SOURCE"; ++ else if (mode == MIRACAST_SINK) ++ return "SINK"; ++ else if (mode == (MIRACAST_SOURCE | MIRACAST_SINK)) ++ return "SOURCE&SINK"; ++ else if (mode == MIRACAST_DISABLED) ++ return "DISABLED"; ++ else ++ return "INVALID"; ++} ++ ++#ifdef CONFIG_WFD ++static bool wfd_st_match_rule(_adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) ++{ ++ struct wifi_display_info *wfdinfo = &adapter->wfd_info; ++ ++ if (ntohs(*((u16 *)local_port)) == wfdinfo->rtsp_ctrlport ++ || ntohs(*((u16 *)local_port)) == wfdinfo->tdls_rtsp_ctrlport ++ || ntohs(*((u16 *)remote_port)) == wfdinfo->peer_rtsp_ctrlport) ++ return _TRUE; ++ return _FALSE; ++} ++ ++static struct st_register wfd_st_reg = { ++ .s_proto = 0x06, ++ .rule = wfd_st_match_rule, ++}; ++#endif /* CONFIG_WFD */ ++ ++inline void rtw_wfd_st_switch(struct sta_info *sta, bool on) ++{ ++#ifdef CONFIG_WFD ++ if (on) ++ rtw_st_ctl_register(&sta->st_ctl, SESSION_TRACKER_REG_ID_WFD, &wfd_st_reg); ++ else ++ rtw_st_ctl_unregister(&sta->st_ctl, SESSION_TRACKER_REG_ID_WFD); ++#endif ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mlme_ext.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mlme_ext.c +old mode 100755 +new mode 100644 +index c411a98..455e3b4 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mlme_ext.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mlme_ext.c +@@ -23,6 +23,7 @@ + #ifdef CONFIG_IOCTL_CFG80211 + #include + #endif //CONFIG_IOCTL_CFG80211 ++#include + + + struct mlme_handler mlme_sta_tbl[]={ +@@ -113,182 +114,569 @@ unsigned char RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02}; + + extern unsigned char REALTEK_96B_IE[]; + +- ++#ifdef LEGACY_CHANNEL_PLAN_REF + /******************************************************** + ChannelPlan definitions + *********************************************************/ +-/*static RT_CHANNEL_PLAN DefaultChannelPlan[RT_CHANNEL_DOMAIN_MAX] = { +- {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},32}, // 0x00, RT_CHANNEL_DOMAIN_FCC +- {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},31}, // 0x01, RT_CHANNEL_DOMAIN_IC +- {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},32}, // 0x02, RT_CHANNEL_DOMAIN_ETSI +- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x03, RT_CHANNEL_DOMAIN_SPAIN +- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x04, RT_CHANNEL_DOMAIN_FRANCE +- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x05, RT_CHANNEL_DOMAIN_MKK +- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x06, RT_CHANNEL_DOMAIN_MKK1 +- {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, // 0x07, RT_CHANNEL_DOMAIN_ISRAEL +- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // 0x08, RT_CHANNEL_DOMAIN_TELEC +- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, // 0x09, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN +- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x0A, RT_CHANNEL_DOMAIN_WORLD_WIDE_13 +- {{1,2,3,4,5,6,7,8,9,10,11,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},26}, // 0x0B, RT_CHANNEL_DOMAIN_TAIWAN +- {{1,2,3,4,5,6,7,8,9,10,11,12,13,149,153,157,161,165},18}, // 0x0C, RT_CHANNEL_DOMAIN_CHINA +- {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, // 0x0D, RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO +- {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165},31}, // 0x0E, RT_CHANNEL_DOMAIN_KOREA +- {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, // 0x0F, RT_CHANNEL_DOMAIN_TURKEY +- {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},32}, // 0x10, RT_CHANNEL_DOMAIN_JAPAN +- {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,149,153,157,161,165},20}, // 0x11, RT_CHANNEL_DOMAIN_FCC_NO_DFS +- {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48},17}, // 0x12, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS +- {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},37}, // 0x13, RT_CHANNEL_DOMAIN_WORLD_WIDE_5G +- {{1,2,3,4,5,6,7,8,9,10,11,56,60,64,149,153,157,161,165},19}, // 0x14, RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS +-};*/ +- +-static RT_CHANNEL_PLAN_2G RTW_ChannelPlan2G[RT_CHANNEL_DOMAIN_2G_MAX] = { +- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x00, RT_CHANNEL_DOMAIN_2G_WORLD , Passive scan CH 12, 13 +- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x01, RT_CHANNEL_DOMAIN_2G_ETSI1 +- {{1,2,3,4,5,6,7,8,9,10,11},11}, // 0x02, RT_CHANNEL_DOMAIN_2G_FCC1 +- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, // 0x03, RT_CHANNEL_DOMAIN_2G_MIKK1 +- {{10,11,12,13},4}, // 0x04, RT_CHANNEL_DOMAIN_2G_ETSI2 +- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, // 0x05, RT_CHANNEL_DOMAIN_2G_GLOBAL , Passive scan CH 12, 13, 14 +- {{},0}, // 0x06, RT_CHANNEL_DOMAIN_2G_NULL ++static RT_CHANNEL_PLAN legacy_channel_plan[] = { ++ /* 0x00, RTW_CHPLAN_FCC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 32}, ++ /* 0x01, RTW_CHPLAN_IC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 31}, ++ /* 0x02, RTW_CHPLAN_ETSI */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32}, ++ /* 0x03, RTW_CHPLAN_SPAIN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, ++ /* 0x04, RTW_CHPLAN_FRANCE */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, ++ /* 0x05, RTW_CHPLAN_MKK */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, ++ /* 0x06, RTW_CHPLAN_MKK1 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, ++ /* 0x07, RTW_CHPLAN_ISRAEL */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21}, ++ /* 0x08, RTW_CHPLAN_TELEC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22}, ++ /* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14}, ++ /* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, ++ /* 0x0B, RTW_CHPLAN_TAIWAN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 26}, ++ /* 0x0C, RTW_CHPLAN_CHINA */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 149, 153, 157, 161, 165}, 18}, ++ /* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 24}, ++ /* 0x0E, RTW_CHPLAN_KOREA */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 31}, ++ /* 0x0F, RTW_CHPLAN_TURKEY */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64}, 19}, ++ /* 0x10, RTW_CHPLAN_JAPAN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32}, ++ /* 0x11, RTW_CHPLAN_FCC_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 149, 153, 157, 161, 165}, 20}, ++ /* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48}, 17}, ++ /* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 37}, ++ /* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 149, 153, 157, 161, 165}, 19}, ++}; ++#endif ++ ++static RT_CHANNEL_PLAN_2G RTW_ChannelPlan2G[] = { ++ /* 0, RTW_RD_2G_NULL */ {{}, 0}, ++ /* 1, RTW_RD_2G_WORLD */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, ++ /* 2, RTW_RD_2G_ETSI1 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, ++ /* 3, RTW_RD_2G_FCC1 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11}, ++ /* 4, RTW_RD_2G_MKK1 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14}, ++ /* 5, RTW_RD_2G_ETSI2 */ {{10, 11, 12, 13}, 4}, ++ /* 6, RTW_RD_2G_GLOBAL */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14}, ++ /* 7, RTW_RD_2G_MKK2 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, ++ /* 8, RTW_RD_2G_FCC2 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, + }; + +-static RT_CHANNEL_PLAN_5G RTW_ChannelPlan5G[RT_CHANNEL_DOMAIN_5G_MAX] = { +- {{},0}, // 0x00, RT_CHANNEL_DOMAIN_5G_NULL +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},19}, // 0x01, RT_CHANNEL_DOMAIN_5G_ETSI1 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},24}, // 0x02, RT_CHANNEL_DOMAIN_5G_ETSI2 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165},22}, // 0x03, RT_CHANNEL_DOMAIN_5G_ETSI3 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},24}, // 0x04, RT_CHANNEL_DOMAIN_5G_FCC1 +- {{36,40,44,48,149,153,157,161,165},9}, // 0x05, RT_CHANNEL_DOMAIN_5G_FCC2 +- {{36,40,44,48,52,56,60,64,149,153,157,161,165},13}, // 0x06, RT_CHANNEL_DOMAIN_5G_FCC3 +- {{36,40,44,48,52,56,60,64,149,153,157,161},12}, // 0x07, RT_CHANNEL_DOMAIN_5G_FCC4 +- {{149,153,157,161,165},5}, // 0x08, RT_CHANNEL_DOMAIN_5G_FCC5 +- {{36,40,44,48,52,56,60,64},8}, // 0x09, RT_CHANNEL_DOMAIN_5G_FCC6 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},20}, // 0x0A, RT_CHANNEL_DOMAIN_5G_FCC7_IC1 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165},20}, // 0x0B, RT_CHANNEL_DOMAIN_5G_KCC1 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},19}, // 0x0C, RT_CHANNEL_DOMAIN_5G_MKK1 +- {{36,40,44,48,52,56,60,64},8}, // 0x0D, RT_CHANNEL_DOMAIN_5G_MKK2 +- {{100,104,108,112,116,120,124,128,132,136,140},11}, // 0x0E, RT_CHANNEL_DOMAIN_5G_MKK3 +- {{56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},15}, // 0x0F, RT_CHANNEL_DOMAIN_5G_NCC1 +- {{56,60,64,149,153,157,161,165},8}, // 0x10, RT_CHANNEL_DOMAIN_5G_NCC2 +- {{149,153,157,161,165},5}, // 0x11, RT_CHANNEL_DOMAIN_5G_NCC3 +- {{36,40,44,48},4}, // 0x12, RT_CHANNEL_DOMAIN_5G_ETSI4 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x13, RT_CHANNEL_DOMAIN_5G_ETSI5 +- {{149,153,157,161},4}, // 0x14, RT_CHANNEL_DOMAIN_5G_FCC8 +- {{36,40,44,48,52,56,60,64},8}, // 0x15, RT_CHANNEL_DOMAIN_5G_ETSI6 +- {{36,40,44,48,52,56,60,64,149,153,157,161,165},13}, // 0x16, RT_CHANNEL_DOMAIN_5G_ETSI7 +- {{36,40,44,48,149,153,157,161,165},9}, // 0x17, RT_CHANNEL_DOMAIN_5G_ETSI8 +- {{100,104,108,112,116,120,124,128,132,136,140},11}, // 0x18, RT_CHANNEL_DOMAIN_5G_ETSI9 +- {{149,153,157,161,165},5}, // 0x19, RT_CHANNEL_DOMAIN_5G_ETSI10 +- {{36,40,44,48,52,56,60,64,132,136,140,149,153,157,161,165},16}, // 0x1A, RT_CHANNEL_DOMAIN_5G_ETSI11 +- {{52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},17}, // 0x1B, RT_CHANNEL_DOMAIN_5G_NCC4 +- {{149,153,157,161},4}, // 0x1C, RT_CHANNEL_DOMAIN_5G_ETSI12 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x1D, RT_CHANNEL_DOMAIN_5G_FCC9 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140},16}, // 0x1E, RT_CHANNEL_DOMAIN_5G_ETSI13 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161},20}, // 0x1F, RT_CHANNEL_DOMAIN_5G_FCC10 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161},19}, // 0x20, RT_CHANNEL_DOMAIN_5G_KCC2 +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x21, RT_CHANNEL_DOMAIN_5G_FCC11 +- {{56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},16}, // 0x22, RT_CHANNEL_DOMAIN_5G_NCC5 +- {{36,40,44,48},4}, // 0x23, RT_CHANNEL_DOMAIN_5G_MKK4 +- //===== Driver self defined for old channel plan Compatible ,Remember to modify if have new channel plan definition ===== +- {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x30, RT_CHANNEL_DOMAIN_5G_FCC +- {{36,40,44,48},4}, // 0x31, RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS +- {{36,40,44,48,149,153,157,161},8}, // 0x32, RT_CHANNEL_DOMAIN_5G_FCC4_NO_DFS ++static RT_CHANNEL_PLAN_5G RTW_ChannelPlan5G[] = { ++ /* 0, RTW_RD_5G_NULL */ {{}, 0}, ++ /* 1, RTW_RD_5G_ETSI1 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19}, ++ /* 2, RTW_RD_5G_ETSI2 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24}, ++ /* 3, RTW_RD_5G_ETSI3 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165}, 22}, ++ /* 4, RTW_RD_5G_FCC1 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24}, ++ /* 5, RTW_RD_5G_FCC2 */ {{36, 40, 44, 48, 149, 153, 157, 161, 165}, 9}, ++ /* 6, RTW_RD_5G_FCC3 */ {{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 13}, ++ /* 7, RTW_RD_5G_FCC4 */ {{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161}, 12}, ++ /* 8, RTW_RD_5G_FCC5 */ {{149, 153, 157, 161, 165}, 5}, ++ /* 9, RTW_RD_5G_FCC6 */ {{36, 40, 44, 48, 52, 56, 60, 64}, 8}, ++ /* 10, RTW_RD_5G_FCC7 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 21}, ++ /* 11, RTW_RD_5G_KCC1 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161}, 19}, ++ /* 12, RTW_RD_5G_MKK1 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19}, ++ /* 13, RTW_RD_5G_MKK2 */ {{36, 40, 44, 48, 52, 56, 60, 64}, 8}, ++ /* 14, RTW_RD_5G_MKK3 */ {{100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 11}, ++ /* 15, RTW_RD_5G_NCC1 */ {{56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 16}, ++ /* 16, RTW_RD_5G_NCC2 */ {{56, 60, 64, 149, 153, 157, 161, 165}, 8}, ++ /* 17, RTW_RD_5G_NCC3 */ {{149, 153, 157, 161, 165}, 5}, ++ /* 18, RTW_RD_5G_ETSI4 */ {{36, 40, 44, 48}, 4}, ++ /* 19, RTW_RD_5G_ETSI5 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 21}, ++ /* 20, RTW_RD_5G_FCC8 */ {{149, 153, 157, 161}, 4}, ++ /* 21, RTW_RD_5G_ETSI6 */ {{36, 40, 44, 48, 52, 56, 60, 64}, 8}, ++ /* 22, RTW_RD_5G_ETSI7 */ {{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 13}, ++ /* 23, RTW_RD_5G_ETSI8 */ {{36, 40, 44, 48, 149, 153, 157, 161, 165}, 9}, ++ /* 24, RTW_RD_5G_ETSI9 */ {{100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 11}, ++ /* 25, RTW_RD_5G_ETSI10 */ {{149, 153, 157, 161, 165}, 5}, ++ /* 26, RTW_RD_5G_ETSI11 */ {{36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, 149, 153, 157, 161, 165}, 16}, ++ /* 27, RTW_RD_5G_NCC4 */ {{52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 17}, ++ /* 28, RTW_RD_5G_ETSI12 */ {{149, 153, 157, 161}, 4}, ++ /* 29, RTW_RD_5G_FCC9 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 21}, ++ /* 30, RTW_RD_5G_ETSI13 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140}, 16}, ++ /* 31, RTW_RD_5G_FCC10 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161}, 20}, ++ /* 32, RTW_RD_5G_MKK4 */ {{36, 40, 44, 48}, 4}, ++ /* 33, RTW_RD_5G_ETSI14 */ {{36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140}, 11}, ++ ++ /* === Below are driver defined for legacy channel plan compatible, NO static index assigned ==== */ ++ /* RTW_RD_5G_OLD_FCC1 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 20}, ++ /* RTW_RD_5G_OLD_NCC1 */ {{56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 15}, ++ /* RTW_RD_5G_OLD_KCC1 */ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 20}, + }; + +-static RT_CHANNEL_PLAN_MAP RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = { +- //===== 0x00 ~ 0x1F , Old Define ===== +- {0x02,0x20}, //0x00, RT_CHANNEL_DOMAIN_FCC +- {0x02,0x0A}, //0x01, RT_CHANNEL_DOMAIN_IC +- {0x01,0x01}, //0x02, RT_CHANNEL_DOMAIN_ETSI +- {0x01,0x00}, //0x03, RT_CHANNEL_DOMAIN_SPAIN +- {0x01,0x00}, //0x04, RT_CHANNEL_DOMAIN_FRANCE +- {0x03,0x00}, //0x05, RT_CHANNEL_DOMAIN_MKK +- {0x03,0x00}, //0x06, RT_CHANNEL_DOMAIN_MKK1 +- {0x01,0x09}, //0x07, RT_CHANNEL_DOMAIN_ISRAEL +- {0x03,0x09}, //0x08, RT_CHANNEL_DOMAIN_TELEC +- {0x03,0x00}, //0x09, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN +- {0x00,0x00}, //0x0A, RT_CHANNEL_DOMAIN_WORLD_WIDE_13 +- {0x02,0x0F}, //0x0B, RT_CHANNEL_DOMAIN_TAIWAN +- {0x01,0x08}, //0x0C, RT_CHANNEL_DOMAIN_CHINA +- {0x02,0x06}, //0x0D, RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO +- {0x02,0x0B}, //0x0E, RT_CHANNEL_DOMAIN_KOREA +- {0x02,0x09}, //0x0F, RT_CHANNEL_DOMAIN_TURKEY +- {0x01,0x01}, //0x10, RT_CHANNEL_DOMAIN_JAPAN +- {0x02,0x05}, //0x11, RT_CHANNEL_DOMAIN_FCC_NO_DFS +- {0x01,0x21}, //0x12, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS +- {0x00,0x04}, //0x13, RT_CHANNEL_DOMAIN_WORLD_WIDE_5G +- {0x02,0x10}, //0x14, RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS +- {0x00,0x21}, //0x15, RT_CHANNEL_DOMAIN_ETSI_NO_DFS +- {0x00,0x22}, //0x16, RT_CHANNEL_DOMAIN_KOREA_NO_DFS +- {0x03,0x21}, //0x17, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS +- {0x06,0x08}, //0x18, RT_CHANNEL_DOMAIN_PAKISTAN_NO_DFS +- {0x02,0x08}, //0x19, RT_CHANNEL_DOMAIN_TAIWAN2_NO_DFS +- {0x00,0x00}, //0x1A, +- {0x00,0x00}, //0x1B, +- {0x00,0x00}, //0x1C, +- {0x00,0x00}, //0x1D, +- {0x00,0x00}, //0x1E, +- {0x06,0x04}, //0x1F, RT_CHANNEL_DOMAIN_WORLD_WIDE_ONLY_5G +- //===== 0x20 ~ 0x7F ,New Define ===== +- {0x00,0x00}, //0x20, RT_CHANNEL_DOMAIN_WORLD_NULL +- {0x01,0x00}, //0x21, RT_CHANNEL_DOMAIN_ETSI1_NULL +- {0x02,0x00}, //0x22, RT_CHANNEL_DOMAIN_FCC1_NULL +- {0x03,0x00}, //0x23, RT_CHANNEL_DOMAIN_MKK1_NULL +- {0x04,0x00}, //0x24, RT_CHANNEL_DOMAIN_ETSI2_NULL +- {0x02,0x04}, //0x25, RT_CHANNEL_DOMAIN_FCC1_FCC1 +- {0x00,0x01}, //0x26, RT_CHANNEL_DOMAIN_WORLD_ETSI1 +- {0x03,0x0C}, //0x27, RT_CHANNEL_DOMAIN_MKK1_MKK1 +- {0x00,0x20}, //0x28, RT_CHANNEL_DOMAIN_5G_KCC2 +- {0x00,0x05}, //0x29, RT_CHANNEL_DOMAIN_WORLD_FCC2 +- {0x00,0x00}, //0x2A, +- {0x00,0x00}, //0x2B, +- {0x00,0x00}, //0x2C, +- {0x00,0x00}, //0x2D, +- {0x00,0x00}, //0x2E, +- {0x00,0x00}, //0x2F, +- {0x00,0x06}, //0x30, RT_CHANNEL_DOMAIN_WORLD_FCC3 +- {0x00,0x07}, //0x31, RT_CHANNEL_DOMAIN_WORLD_FCC4 +- {0x00,0x08}, //0x32, RT_CHANNEL_DOMAIN_WORLD_FCC5 +- {0x00,0x09}, //0x33, RT_CHANNEL_DOMAIN_WORLD_FCC6 +- {0x02,0x21}, //0x34, RT_CHANNEL_DOMAIN_5G_FCC11 +- {0x00,0x02}, //0x35, RT_CHANNEL_DOMAIN_WORLD_ETSI2 +- {0x00,0x03}, //0x36, RT_CHANNEL_DOMAIN_WORLD_ETSI3 +- {0x03,0x0D}, //0x37, RT_CHANNEL_DOMAIN_MKK1_MKK2 +- {0x03,0x0E}, //0x38, RT_CHANNEL_DOMAIN_MKK1_MKK3 +- {0x02,0x22}, //0x39, RT_CHANNEL_DOMAIN_5G_NCC5 +- {0x00,0x00}, //0x3A, +- {0x00,0x00}, //0x3B, +- {0x00,0x00}, //0x3C, +- {0x00,0x00}, //0x3D, +- {0x00,0x00}, //0x3E, +- {0x00,0x00}, //0x3F, +- {0x02,0x10}, //0x40, RT_CHANNEL_DOMAIN_FCC1_NCC2 +- {0x05,0x00}, //0x41, RT_CHANNEL_DOMAIN_GLOBAL_NULL +- {0x01,0x12}, //0x42, RT_CHANNEL_DOMAIN_ETSI1_ETSI4 +- {0x02,0x05}, //0x43, RT_CHANNEL_DOMAIN_FCC1_FCC2 +- {0x02,0x11}, //0x44, RT_CHANNEL_DOMAIN_FCC1_NCC3 +- {0x00,0x13}, //0x45, RT_CHANNEL_DOMAIN_WORLD_ETSI5 +- {0x02,0x14}, //0x46, RT_CHANNEL_DOMAIN_FCC1_FCC8 +- {0x00,0x15}, //0x47, RT_CHANNEL_DOMAIN_WORLD_ETSI6 +- {0x00,0x16}, //0x48, RT_CHANNEL_DOMAIN_WORLD_ETSI7 +- {0x00,0x17}, //0x49, RT_CHANNEL_DOMAIN_WORLD_ETSI8 +- {0x00,0x00}, //0x4A, +- {0x00,0x00}, //0x4B, +- {0x00,0x00}, //0x4C, +- {0x00,0x00}, //0x4D, +- {0x00,0x00}, //0x4E, +- {0x00,0x00}, //0x4F, +- {0x00,0x18}, //0x50, RT_CHANNEL_DOMAIN_WORLD_ETSI9 +- {0x00,0x19}, //0x51, RT_CHANNEL_DOMAIN_WORLD_ETSI10 +- {0x00,0x1A}, //0x52, RT_CHANNEL_DOMAIN_WORLD_ETSI11 +- {0x02,0x1B}, //0x53, RT_CHANNEL_DOMAIN_FCC1_NCC4 +- {0x00,0x1C}, //0x54, RT_CHANNEL_DOMAIN_WORLD_ETSI12 +- {0x02,0x1D}, //0x55, RT_CHANNEL_DOMAIN_FCC1_FCC9 +- {0x00,0x1E}, //0x56, RT_CHANNEL_DOMAIN_WORLD_ETSI13 +- {0x02,0x1F}, //0x57, RT_CHANNEL_DOMAIN_FCC1_FCC10 +- {0x01,0x23}, //0x58, RT_CHANNEL_DOMAIN_WORLD_MKK4 ++static RT_CHANNEL_PLAN_MAP RTW_ChannelPlanMap[] = { ++ /* ===== 0x00 ~ 0x1F, legacy channel plan ===== */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_KCC1, TXPWR_LMT_FCC}, /* 0x00, RTW_CHPLAN_FCC */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_OLD_FCC1, TXPWR_LMT_FCC}, /* 0x01, RTW_CHPLAN_IC */ ++ {RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI}, /* 0x02, RTW_CHPLAN_ETSI */ ++ {RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI}, /* 0x03, RTW_CHPLAN_SPAIN */ ++ {RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI}, /* 0x04, RTW_CHPLAN_FRANCE */ ++ {RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK}, /* 0x05, RTW_CHPLAN_MKK */ ++ {RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK}, /* 0x06, RTW_CHPLAN_MKK1 */ ++ {RTW_RD_2G_ETSI1, RTW_RD_5G_FCC6, TXPWR_LMT_ETSI}, /* 0x07, RTW_CHPLAN_ISRAEL */ ++ {RTW_RD_2G_MKK1, RTW_RD_5G_FCC6, TXPWR_LMT_MKK}, /* 0x08, RTW_CHPLAN_TELEC */ ++ {RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_OLD_NCC1, TXPWR_LMT_FCC}, /* 0x0B, RTW_CHPLAN_TAIWAN */ ++ {RTW_RD_2G_ETSI1, RTW_RD_5G_FCC5, TXPWR_LMT_ETSI}, /* 0x0C, RTW_CHPLAN_CHINA */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_FCC3, TXPWR_LMT_WW}, /* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ /* ETSI:Singapore, India. FCC:Mexico => WW */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_OLD_KCC1, TXPWR_LMT_ETSI}, /* 0x0E, RTW_CHPLAN_KOREA */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_FCC6, TXPWR_LMT_ETSI}, /* 0x0F, RTW_CHPLAN_TURKEY */ ++ {RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_MKK}, /* 0x10, RTW_CHPLAN_JAPAN */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_FCC2, TXPWR_LMT_FCC}, /* 0x11, RTW_CHPLAN_FCC_NO_DFS */ ++ {RTW_RD_2G_ETSI1, RTW_RD_5G_FCC7, TXPWR_LMT_MKK}, /* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_FCC1, TXPWR_LMT_WW}, /* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_NCC2, TXPWR_LMT_FCC}, /* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_FCC7, TXPWR_LMT_ETSI}, /* 0x15, RTW_CHPLAN_ETSI_NO_DFS */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_NCC1, TXPWR_LMT_ETSI}, /* 0x16, RTW_CHPLAN_KOREA_NO_DFS */ ++ {RTW_RD_2G_MKK1, RTW_RD_5G_FCC7, TXPWR_LMT_MKK}, /* 0x17, RTW_CHPLAN_JAPAN_NO_DFS */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_FCC5, TXPWR_LMT_ETSI}, /* 0x18, RTW_CHPLAN_PAKISTAN_NO_DFS */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_FCC5, TXPWR_LMT_FCC}, /* 0x19, RTW_CHPLAN_TAIWAN2_NO_DFS */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x1A, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x1B, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x1C, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x1D, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x1E, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_FCC1, TXPWR_LMT_WW}, /* 0x1F, RTW_CHPLAN_WORLD_WIDE_ONLY_5G */ ++ ++ /* ===== 0x20 ~ 0x7F, new channel plan ===== */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x20, RTW_CHPLAN_WORLD_NULL */ ++ {RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI}, /* 0x21, RTW_CHPLAN_ETSI1_NULL */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_NULL, TXPWR_LMT_FCC}, /* 0x22, RTW_CHPLAN_FCC1_NULL */ ++ {RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK}, /* 0x23, RTW_CHPLAN_MKK1_NULL */ ++ {RTW_RD_2G_ETSI2, RTW_RD_5G_NULL, TXPWR_LMT_ETSI}, /* 0x24, RTW_CHPLAN_ETSI2_NULL */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_FCC1, TXPWR_LMT_FCC}, /* 0x25, RTW_CHPLAN_FCC1_FCC1 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI}, /* 0x26, RTW_CHPLAN_WORLD_ETSI1 */ ++ {RTW_RD_2G_MKK1, RTW_RD_5G_MKK1, TXPWR_LMT_MKK}, /* 0x27, RTW_CHPLAN_MKK1_MKK1 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_KCC1, TXPWR_LMT_ETSI}, /* 0x28, RTW_CHPLAN_WORLD_KCC1 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_FCC2, TXPWR_LMT_FCC}, /* 0x29, RTW_CHPLAN_WORLD_FCC2 */ ++ {RTW_RD_2G_FCC2, RTW_RD_5G_NULL, TXPWR_LMT_FCC}, /* 0x2A, RTW_CHPLAN_FCC2_NULL */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x2B, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x2C, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x2D, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x2E, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x2F, */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_FCC3, TXPWR_LMT_FCC}, /* 0x30, RTW_CHPLAN_WORLD_FCC3 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_FCC4, TXPWR_LMT_FCC}, /* 0x31, RTW_CHPLAN_WORLD_FCC4 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_FCC5, TXPWR_LMT_FCC}, /* 0x32, RTW_CHPLAN_WORLD_FCC5 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_FCC6, TXPWR_LMT_FCC}, /* 0x33, RTW_CHPLAN_WORLD_FCC6 */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_FCC7, TXPWR_LMT_FCC}, /* 0x34, RTW_CHPLAN_FCC1_FCC7 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI2, TXPWR_LMT_ETSI}, /* 0x35, RTW_CHPLAN_WORLD_ETSI2 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI3, TXPWR_LMT_ETSI}, /* 0x36, RTW_CHPLAN_WORLD_ETSI3 */ ++ {RTW_RD_2G_MKK1, RTW_RD_5G_MKK2, TXPWR_LMT_MKK}, /* 0x37, RTW_CHPLAN_MKK1_MKK2 */ ++ {RTW_RD_2G_MKK1, RTW_RD_5G_MKK3, TXPWR_LMT_MKK}, /* 0x38, RTW_CHPLAN_MKK1_MKK3 */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_NCC1, TXPWR_LMT_FCC}, /* 0x39, RTW_CHPLAN_FCC1_NCC1 */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x3A, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x3B, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x3C, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x3D, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x3E, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x3F, */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_NCC2, TXPWR_LMT_FCC}, /* 0x40, RTW_CHPLAN_FCC1_NCC2 */ ++ {RTW_RD_2G_GLOBAL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x41, RTW_CHPLAN_GLOBAL_NULL */ ++ {RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI4, TXPWR_LMT_ETSI}, /* 0x42, RTW_CHPLAN_ETSI1_ETSI4 */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_FCC2, TXPWR_LMT_FCC}, /* 0x43, RTW_CHPLAN_FCC1_FCC2 */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_NCC3, TXPWR_LMT_FCC}, /* 0x44, RTW_CHPLAN_FCC1_NCC3 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI5, TXPWR_LMT_ETSI}, /* 0x45, RTW_CHPLAN_WORLD_ETSI5 */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_FCC8, TXPWR_LMT_FCC}, /* 0x46, RTW_CHPLAN_FCC1_FCC8 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI6, TXPWR_LMT_ETSI}, /* 0x47, RTW_CHPLAN_WORLD_ETSI6 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI7, TXPWR_LMT_ETSI}, /* 0x48, RTW_CHPLAN_WORLD_ETSI7 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI8, TXPWR_LMT_ETSI}, /* 0x49, RTW_CHPLAN_WORLD_ETSI8 */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x4A, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x4B, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x4C, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x4D, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x4E, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x4F, */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI9, TXPWR_LMT_ETSI}, /* 0x50, RTW_CHPLAN_WORLD_ETSI9 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI10, TXPWR_LMT_ETSI}, /* 0x51, RTW_CHPLAN_WORLD_ETSI10 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI11, TXPWR_LMT_ETSI}, /* 0x52, RTW_CHPLAN_WORLD_ETSI11 */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_NCC4, TXPWR_LMT_FCC}, /* 0x53, RTW_CHPLAN_FCC1_NCC4 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI12, TXPWR_LMT_ETSI}, /* 0x54, RTW_CHPLAN_WORLD_ETSI12 */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_FCC9, TXPWR_LMT_FCC}, /* 0x55, RTW_CHPLAN_FCC1_FCC9 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI13, TXPWR_LMT_ETSI}, /* 0x56, RTW_CHPLAN_WORLD_ETSI13 */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_FCC10, TXPWR_LMT_FCC}, /* 0x57, RTW_CHPLAN_FCC1_FCC10 */ ++ {RTW_RD_2G_MKK2, RTW_RD_5G_MKK4, TXPWR_LMT_MKK}, /* 0x58, RTW_CHPLAN_MKK2_MKK4 */ ++ {RTW_RD_2G_WORLD, RTW_RD_5G_ETSI14, TXPWR_LMT_ETSI}, /* 0x59, RTW_CHPLAN_WORLD_ETSI14 */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x5A, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x5B, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x5C, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x5D, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x5E, */ ++ {RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW}, /* 0x5F, */ ++ {RTW_RD_2G_FCC1, RTW_RD_5G_FCC5, TXPWR_LMT_FCC}, /* 0x60, RTW_CHPLAN_FCC1_FCC5 */ + }; + +-static RT_CHANNEL_PLAN_MAP RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = {0x01,0x02}; //use the conbination for max channel numbers ++static RT_CHANNEL_PLAN_MAP RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = { ++ RTW_RD_2G_WORLD, RTW_RD_5G_FCC1, TXPWR_LMT_FCC /* 0x7F, Realtek Define */ ++}; ++ ++bool rtw_chplan_is_empty(u8 id) ++{ ++ RT_CHANNEL_PLAN_MAP *chplan_map; ++ ++ if (id == RTW_CHPLAN_REALTEK_DEFINE) ++ chplan_map = &RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE; ++ else ++ chplan_map = &RTW_ChannelPlanMap[id]; ++ ++ if (chplan_map->Index2G == RTW_RD_2G_NULL ++ && chplan_map->Index5G == RTW_RD_5G_NULL) ++ return _TRUE; ++ ++ return _FALSE; ++} ++ ++#ifdef CONFIG_DFS_MASTER ++void rtw_rfctl_reset_cac(struct rf_ctl_t *rfctl) ++{ ++ if (rtw_is_long_cac_ch(rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset)) ++ rfctl->cac_end_time = rtw_get_current_time() + rtw_ms_to_systime(CAC_TIME_CE_MS); ++ else ++ rfctl->cac_end_time = rtw_get_current_time() + rtw_ms_to_systime(CAC_TIME_MS); ++} ++ ++/* ++* check if channel coverage includes new range and the new range is in DFS range ++* called after radar_detect_ch,bw,offset is updated ++*/ ++bool rtw_is_cac_reset_needed(_adapter *adapter) ++{ ++ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); ++ bool needed = _FALSE; ++ u32 pre_hi, pre_lo, hi, lo; ++ ++ if (0) ++ DBG_871X("pre_radar_detect_ch:%d, pre_radar_detect_by_sta_link:%d\n" ++ , rfctl->pre_radar_detect_ch, rfctl->pre_radar_detect_by_sta_link); ++ ++ if (rfctl->pre_radar_detect_by_sta_link == _TRUE) ++ goto exit; ++ ++ if (rfctl->pre_radar_detect_ch == 0) { ++ needed = _TRUE; ++ goto exit; ++ } ++ ++ if (rtw_chbw_to_freq_range(rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset, &hi, &lo) == _FALSE) ++ rtw_warn_on(1); ++ if (rtw_chbw_to_freq_range(rfctl->pre_radar_detect_ch, rfctl->pre_radar_detect_bw, rfctl->pre_radar_detect_offset, &pre_hi, &pre_lo) == _FALSE) ++ rtw_warn_on(1); ++ ++ if (!rtw_is_range_a_in_b(hi, lo, pre_hi, pre_lo)) { ++ if (rtw_is_range_a_in_b(pre_hi, pre_lo, hi, lo)) { ++ /* currrent is supper set of previous */ ++ if (rtw_is_dfs_range(hi, lo)) ++ needed = _TRUE; ++ } else if (rtw_is_range_overlap(hi, lo, pre_hi, pre_lo)) { ++ /* currrent is not supper set of previous, but has overlap */ ++ u32 new_hi, new_lo; ++ ++ if (lo < pre_lo) { ++ new_hi = pre_lo; ++ new_lo = lo; ++ if (hi <= pre_lo || hi >= pre_hi) { ++ DBG_871X_LEVEL(_drv_err_, "hi:%u, lo:%u, pre_hi:%u, pre_lo:%u\n" ++ , hi, lo, pre_hi, pre_lo); ++ rtw_warn_on(1); ++ goto exit; ++ } ++ } else if (hi > pre_hi) { ++ new_hi = hi; ++ new_lo = pre_hi; ++ if (lo >= pre_hi && lo <= pre_lo) { ++ DBG_871X_LEVEL(_drv_err_, "hi:%u, lo:%u, pre_hi:%u, pre_lo:%u\n" ++ , hi, lo, pre_hi, pre_lo); ++ rtw_warn_on(1); ++ goto exit; ++ } ++ } else { ++ DBG_871X_LEVEL(_drv_err_, "hi:%u, lo:%u, pre_hi:%u, pre_lo:%u\n" ++ , hi, lo, pre_hi, pre_lo); ++ rtw_warn_on(1); ++ goto exit; ++ } ++ ++ if (rtw_is_dfs_range(new_hi, new_lo)) ++ needed = _TRUE; ++ ++ } else { ++ /* no overlap */ ++ if (rtw_is_dfs_range(hi, lo)) ++ needed = _TRUE; ++ } ++ } ++ ++exit: ++ return needed; ++} ++ ++bool _rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset) ++{ ++ bool ret = _FALSE; ++ u32 hi = 0, lo = 0; ++ u32 r_hi = 0, r_lo = 0; ++ int i; ++ ++ if (rfctl->radar_detect_ch == 0) ++ goto exit; ++ ++ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) { ++ rtw_warn_on(1); ++ goto exit; ++ } ++ ++ if (rtw_chbw_to_freq_range(rfctl->radar_detect_ch ++ , rfctl->radar_detect_bw, rfctl->radar_detect_offset ++ , &r_hi, &r_lo) == _FALSE) { ++ rtw_warn_on(1); ++ goto exit; ++ } ++ ++ if (rtw_is_range_overlap(hi, lo, r_hi, r_lo)) ++ ret = _TRUE; ++ ++exit: ++ return ret; ++} ++ ++bool rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl) ++{ ++ return _rtw_rfctl_overlap_radar_detect_ch(rfctl ++ , rfctl_to_dvobj(rfctl)->oper_channel ++ , rfctl_to_dvobj(rfctl)->oper_bwmode ++ , rfctl_to_dvobj(rfctl)->oper_ch_offset); ++} ++ ++bool rtw_rfctl_is_tx_blocked_by_cac(struct rf_ctl_t *rfctl) ++{ ++ return (rtw_rfctl_overlap_radar_detect_ch(rfctl) && IS_UNDER_CAC(rfctl)); ++} ++ ++bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset) ++{ ++ bool ret = _FALSE; ++ u32 hi = 0, lo = 0; ++ int i; ++ ++ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) ++ goto exit; ++ ++ for (i = 0; ch_set[i].ChannelNum != 0; i++) { ++ if (!rtw_ch2freq(ch_set[i].ChannelNum)) { ++ rtw_warn_on(1); ++ continue; ++ } ++ ++ if (!CH_IS_NON_OCP(&ch_set[i])) ++ continue; ++ ++ if (lo <= rtw_ch2freq(ch_set[i].ChannelNum) ++ && rtw_ch2freq(ch_set[i].ChannelNum) <= hi ++ ) { ++ ret = _TRUE; ++ break; ++ } ++ } ++ ++exit: ++ return ret; ++} ++ ++/** ++ * rtw_chset_update_non_ocp - update non_ocp_end_time according to the given @ch, @bw, @offset into @ch_set ++ * @ch_set: the given channel set ++ * @ch: channel number on which radar is detected ++ * @bw: bandwidth on which radar is detected ++ * @offset: bandwidth offset on which radar is detected ++ * @ms: ms to add from now to update non_ocp_end_time, ms < 0 means use NON_OCP_TIME_MS ++ */ ++static void _rtw_chset_update_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset, int ms) ++{ ++ u32 hi = 0, lo = 0; ++ int i; ++ ++ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) ++ goto exit; ++ ++ for (i = 0; ch_set[i].ChannelNum != 0; i++) { ++ if (!rtw_ch2freq(ch_set[i].ChannelNum)) { ++ rtw_warn_on(1); ++ continue; ++ } ++ ++ if (lo <= rtw_ch2freq(ch_set[i].ChannelNum) ++ && rtw_ch2freq(ch_set[i].ChannelNum) <= hi ++ ) { ++ if (ms >= 0) ++ ch_set[i].non_ocp_end_time = rtw_get_current_time() + rtw_ms_to_systime(ms); ++ else ++ ch_set[i].non_ocp_end_time = rtw_get_current_time() + rtw_ms_to_systime(NON_OCP_TIME_MS); ++ } ++ } ++ ++exit: ++ return; ++} ++ ++inline void rtw_chset_update_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset) ++{ ++ _rtw_chset_update_non_ocp(ch_set, ch, bw, offset, -1); ++} ++ ++inline void rtw_chset_update_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset, int ms) ++{ ++ _rtw_chset_update_non_ocp(ch_set, ch, bw, offset, ms); ++} ++#endif /* CONFIG_DFS_MASTER */ ++ ++bool rtw_choose_available_chbw(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8 *dec_bw, u8 *dec_offset, u8 d_flags) ++{ ++ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; ++ int i; ++ ++ if (!dec_ch || !dec_bw || !dec_offset) { ++ rtw_warn_on(1); ++ return _FAIL; ++ } ++ ++ for (i = 0; i < mlmeext->max_chan_nums; i++) { ++ ++ *dec_ch = mlmeext->channel_set[i].ChannelNum; ++ *dec_bw = req_bw; ++ if (*dec_bw == CHANNEL_WIDTH_20) ++ *dec_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ else ++ *dec_offset = rtw_get_offset_by_ch(*dec_ch); ++ ++ if ((d_flags & RTW_CHF_2G) && *dec_ch <= 14) ++ continue; ++ ++ if ((d_flags & RTW_CHF_5G) && *dec_ch > 14) ++ continue; ++ ++ rtw_adjust_chbw(adapter, *dec_ch, dec_bw, dec_offset); ++ ++ if ((d_flags & RTW_CHF_DFS) && rtw_is_dfs_ch(*dec_ch, *dec_bw, *dec_offset)) ++ continue; ++ ++ if ((d_flags & RTW_CHF_LONG_CAC) && rtw_is_long_cac_ch(*dec_ch, *dec_bw, *dec_offset)) ++ continue; ++ ++ if ((d_flags & RTW_CHF_NON_DFS) && !rtw_is_dfs_ch(*dec_ch, *dec_bw, *dec_offset)) ++ continue; ++ ++ if ((d_flags & RTW_CHF_NON_LONG_CAC) && !rtw_is_long_cac_ch(*dec_ch, *dec_bw, *dec_offset)) ++ continue; ++ ++ if (!rtw_chset_is_ch_non_ocp(mlmeext->channel_set, *dec_ch, *dec_bw, *dec_offset)) ++ break; ++ } ++ ++ return (i < mlmeext->max_chan_nums)?_TRUE:_FALSE; ++} ++ ++void dump_country_chplan(void *sel, const struct country_chplan *ent) ++{ ++ DBG_871X_SEL(sel, "\"%c%c\", 0x%02X%s\n" ++ , ent->alpha2[0], ent->alpha2[1], ent->chplan ++ , COUNTRY_CHPLAN_EN_11AC(ent) ? " ac" : "" ++ ); ++} ++ ++void dump_country_chplan_map(void *sel) ++{ ++ const struct country_chplan *ent; ++ u8 code[2]; ++ ++#if RTW_DEF_MODULE_REGULATORY_CERT ++ DBG_871X_SEL(sel, "RTW_DEF_MODULE_REGULATORY_CERT:0x%x\n", RTW_DEF_MODULE_REGULATORY_CERT); ++#endif ++#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP ++ DBG_871X_SEL(sel, "CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP\n"); ++#endif ++ ++ for (code[0] = 'A'; code[0] <= 'Z'; code[0]++) { ++ for (code[1] = 'A'; code[1] <= 'Z'; code[1]++) { ++ ent = rtw_get_chplan_from_country(code); ++ if (!ent) ++ continue; ++ ++ dump_country_chplan(sel, ent); ++ } ++ } ++} ++ ++void dump_chplan_id_list(void *sel) ++{ ++ int i; ++ ++ for (i = 0; i < RTW_CHPLAN_MAX; i++) { ++ if (!rtw_is_channel_plan_valid(i)) ++ continue; ++ ++ DBG_871X_SEL(sel, "0x%02X ", i); ++ } ++ ++ DBG_871X_SEL_NL(sel, "0x7F\n"); ++} ++ ++void dump_chplan_test(void *sel) ++{ ++ int i, j; ++ ++ /* check invalid channel */ ++ for (i = 0; i < RTW_RD_2G_MAX; i++) { ++ for (j = 0; j < RTW_ChannelPlan2G[i].Len; j++) { ++ if (rtw_ch2freq(RTW_ChannelPlan2G[i].Channel[j]) == 0) ++ DBG_871X_SEL_NL(sel, "invalid ch:%u at (%d,%d)\n", RTW_ChannelPlan2G[i].Channel[j], i, j); ++ } ++ } ++ ++ for (i = 0; i < RTW_RD_5G_MAX; i++) { ++ for (j = 0; j < RTW_ChannelPlan5G[i].Len; j++) { ++ if (rtw_ch2freq(RTW_ChannelPlan5G[i].Channel[j]) == 0) ++ DBG_871X_SEL_NL(sel, "invalid ch:%u at (%d,%d)\n", RTW_ChannelPlan5G[i].Channel[j], i, j); ++ } ++ } ++} ++ ++void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set) ++{ ++ u8 i; ++ ++ for (i = 0; ch_set[i].ChannelNum != 0; i++) { ++ DBG_871X_SEL_NL(sel, "ch:%3u, freq:%u, scan_type:%d" ++ , ch_set[i].ChannelNum, rtw_ch2freq(ch_set[i].ChannelNum), ch_set[i].ScanType); ++ ++ #ifdef CONFIG_FIND_BEST_CHANNEL ++ DBG_871X_SEL(sel, ", rx_count:%u", ch_set[i].rx_count); ++ #endif ++ ++ #ifdef CONFIG_DFS_MASTER ++ if (rtw_is_dfs_ch(ch_set[i].ChannelNum, CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE)) { ++ if (CH_IS_NON_OCP(&ch_set[i])) ++ DBG_871X_SEL(sel, ", non_ocp:%d" ++ , rtw_systime_to_ms(ch_set[i].non_ocp_end_time - rtw_get_current_time())); ++ else ++ DBG_871X_SEL(sel, ", non_ocp:N/A"); ++ } ++ #endif ++ ++ DBG_871X_SEL(sel, "\n"); ++ } ++ ++ DBG_871X_SEL_NL(sel, "total ch number:%d\n", i); ++} ++ ++void dump_cur_chset(void *sel, _adapter *adapter) ++{ ++ struct mlme_priv *mlme = &adapter->mlmepriv; ++ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ ++ if (mlme->country_ent) ++ dump_country_chplan(sel, mlme->country_ent); ++ else ++ DBG_871X_SEL_NL(sel, "chplan:0x%02X\n", mlme->ChannelPlan); ++ ++ DBG_871X_SEL_NL(sel, "2G_PLS:%u, 5G_PLS:%u\n" ++ , hal_data->Regulation2_4G, hal_data->Regulation5G); ++ dump_chset(sel, mlmeext->channel_set); ++} + + /* + * Search the @param ch in given @param ch_set +@@ -319,9 +707,9 @@ int rtw_ch_set_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch) + */ + bool rtw_mlme_band_check(_adapter *adapter, const u32 ch) + { +- if (adapter->setband == GHZ24_50 /* 2.4G and 5G */ +- || (adapter->setband == GHZ_24 && ch < 35) /* 2.4G only */ +- || (adapter->setband == GHZ_50 && ch > 35) /* 5G only */ ++ if (adapter->setband == WIFI_FREQUENCY_BAND_AUTO /* 2.4G and 5G */ ++ || (adapter->setband == WIFI_FREQUENCY_BAND_2GHZ && ch < 35) /* 2.4G only */ ++ || (adapter->setband == WIFI_FREQUENCY_BAND_5GHZ && ch > 35) /* 5G only */ + ) { + return _TRUE; + } +@@ -351,7 +739,7 @@ void init_mlme_default_rate_set(_adapter* padapter) + + unsigned char mixed_datarate[NumRates] = {_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_,_9M_RATE_, _12M_RATE_, _18M_RATE_, _24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_, 0xff}; + unsigned char mixed_basicrate[NumRates] ={_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_, _12M_RATE_, _24M_RATE_, 0xff,}; +- unsigned char supported_mcs_set[16] = {0xff, 0xff, 0x00, 0x00, 0x00, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; ++ unsigned char supported_mcs_set[16] = {0xff, 0xff, 0xff, 0x00, 0x00, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; + + _rtw_memcpy(pmlmeext->datarate, mixed_datarate, NumRates); + _rtw_memcpy(pmlmeext->basicrate, mixed_basicrate, NumRates); +@@ -386,9 +774,22 @@ static void init_mlme_ext_priv_value(_adapter* padapter) + else + pmlmeext->tx_rate = IEEE80211_CCK_RATE_1MB; + +- pmlmeext->sitesurvey_res.state = SCAN_DISABLE; ++ mlmeext_set_scan_state(pmlmeext, SCAN_DISABLE); + pmlmeext->sitesurvey_res.channel_idx = 0; + pmlmeext->sitesurvey_res.bss_cnt = 0; ++ pmlmeext->sitesurvey_res.scan_ch_ms = SURVEY_TO; ++ pmlmeext->sitesurvey_res.rx_ampdu_accept = RX_AMPDU_ACCEPT_INVALID; ++ pmlmeext->sitesurvey_res.rx_ampdu_size = RX_AMPDU_SIZE_INVALID; ++ #ifdef CONFIG_SCAN_BACKOP ++ mlmeext_assign_scan_backop_flags_sta(pmlmeext, /*SS_BACKOP_EN|*/SS_BACKOP_PS_ANNC|SS_BACKOP_TX_RESUME); ++ mlmeext_assign_scan_backop_flags_ap(pmlmeext, SS_BACKOP_EN|SS_BACKOP_PS_ANNC|SS_BACKOP_TX_RESUME); ++ pmlmeext->sitesurvey_res.scan_cnt = 0; ++ pmlmeext->sitesurvey_res.scan_cnt_max = RTW_SCAN_NUM_OF_CH; ++ pmlmeext->sitesurvey_res.backop_ms = RTW_BACK_OP_CH_MS; ++ #endif ++ #if defined(CONFIG_ANTENNA_DIVERSITY) || defined(DBG_SCAN_SW_ANTDIV_BL) ++ pmlmeext->sitesurvey_res.is_sw_antdiv_bl_scan = 0; ++ #endif + pmlmeext->scan_abort = _FALSE; + + pmlmeinfo->state = WIFI_FW_NULL_STATE; +@@ -431,6 +832,7 @@ static int has_channel(RT_CHANNEL_INFO *channel_set, + static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set, + u8 chanset_size, + struct p2p_channels *channel_list) { ++ struct registry_priv *regsty = adapter_to_regsty(padapter); + + struct p2p_oper_class_map op_class[] = { + { IEEE80211G, 81, 1, 13, 1, BW20 }, +@@ -466,7 +868,7 @@ static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set, + if ((0 == padapter->registrypriv.ht_enable) && (8 == o->inc)) + continue; + +- if ((0 < (padapter->registrypriv.bw_mode & 0xf0)) && ++ if ((REGSTY_IS_BW_5G_SUPPORT(regsty, CHANNEL_WIDTH_40)) && + ((BW40MINUS == o->bw) || (BW40PLUS == o->bw))) + continue; + +@@ -489,57 +891,49 @@ static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO * + u8 index,chanset_size = 0; + u8 b5GBand = _FALSE, b2_4GBand = _FALSE; + u8 Index2G = 0, Index5G=0; ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); ++ int i; + + if (!rtw_is_channel_plan_valid(ChannelPlan)) { +- DBG_871X("ChannelPlan ID %x error !!!!!\n",ChannelPlan); ++ DBG_871X_LEVEL(_drv_err_, "ChannelPlan ID 0x%02X error !!!!!\n", ChannelPlan); + return chanset_size; + } + + _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO)*MAX_CHANNEL_NUM); + +- if(IsSupported24G(padapter->registrypriv.wireless_mode)) +- { ++ if (IsSupported24G(padapter->registrypriv.wireless_mode)) + b2_4GBand = _TRUE; +- if(RT_CHANNEL_DOMAIN_REALTEK_DEFINE == ChannelPlan) +- Index2G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index2G; +- else +- Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G; +- } + +- if(IsSupported5G(padapter->registrypriv.wireless_mode)) +- { ++ if (IsSupported5G(padapter->registrypriv.wireless_mode)) + b5GBand = _TRUE; +- if(RT_CHANNEL_DOMAIN_REALTEK_DEFINE == ChannelPlan) +- Index5G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index5G; ++ ++ if (b2_4GBand) { ++ if (RTW_CHPLAN_REALTEK_DEFINE == ChannelPlan) ++ Index2G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index2G; + else +- Index5G = RTW_ChannelPlanMap[ChannelPlan].Index5G; +- } ++ Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G; + +- if(b2_4GBand) +- { +- for(index=0;index= 1 && channel_set[chanset_size].ChannelNum <= 11) + channel_set[chanset_size].ScanType = SCAN_ACTIVE; + else if((channel_set[chanset_size].ChannelNum >= 12 && channel_set[chanset_size].ChannelNum <= 14)) + channel_set[chanset_size].ScanType = SCAN_PASSIVE; +- } +- else if(RT_CHANNEL_DOMAIN_WORLD_WIDE_13 == ChannelPlan || +- RT_CHANNEL_DOMAIN_WORLD_WIDE_5G == ChannelPlan || +- RT_CHANNEL_DOMAIN_2G_WORLD == Index2G)// channel 12~13, passive scan +- { ++ } else if (RTW_CHPLAN_WORLD_WIDE_13 == ChannelPlan ++ || RTW_CHPLAN_WORLD_WIDE_5G == ChannelPlan ++ || RTW_RD_2G_WORLD == Index2G ++ ) { ++ /* channel 12~13, passive scan */ + if(channel_set[chanset_size].ChannelNum <= 11) + channel_set[chanset_size].ScanType = SCAN_ACTIVE; + else + channel_set[chanset_size].ScanType = SCAN_PASSIVE; +- } +- else +- { ++ } else { + channel_set[chanset_size].ScanType = SCAN_ACTIVE; + } + +@@ -547,16 +941,19 @@ static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO * + } + } + +- if(b5GBand) +- { +- for(index=0;index= 149 ) + { +- if(RT_CHANNEL_DOMAIN_WORLD_WIDE_5G == ChannelPlan)//passive scan for all 5G channels ++ if (RTW_CHPLAN_WORLD_WIDE_5G == ChannelPlan) /* passive scan for all 5G channels */ + channel_set[chanset_size].ScanType = SCAN_PASSIVE; + else + channel_set[chanset_size].ScanType = SCAN_ACTIVE; +@@ -567,10 +964,11 @@ static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO * + } + chanset_size++; + #else /* CONFIG_DFS */ +- if ( RTW_ChannelPlan5G[Index5G].Channel[index] <= 48 +- || RTW_ChannelPlan5G[Index5G].Channel[index] >= 149 ) { ++ if (RTW_ChannelPlan5G[Index5G].Channel[index] <= 48 ++ || RTW_ChannelPlan5G[Index5G].Channel[index] >= 149 ++ ) { + channel_set[chanset_size].ChannelNum = RTW_ChannelPlan5G[Index5G].Channel[index]; +- if(RT_CHANNEL_DOMAIN_WORLD_WIDE_5G == ChannelPlan)//passive scan for all 5G channels ++ if (RTW_CHPLAN_WORLD_WIDE_5G == ChannelPlan) /* passive scan for all 5G channels */ + channel_set[chanset_size].ScanType = SCAN_PASSIVE; + else + channel_set[chanset_size].ScanType = SCAN_ACTIVE; +@@ -581,9 +979,22 @@ static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO * + } + } + +- Hal_ChannelPlanToRegulation(padapter, ChannelPlan); ++ if (RTW_CHPLAN_REALTEK_DEFINE == ChannelPlan) { ++ hal_data->Regulation2_4G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.regd; ++ hal_data->Regulation5G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.regd; ++ } else { ++ hal_data->Regulation2_4G = RTW_ChannelPlanMap[ChannelPlan].regd; ++ hal_data->Regulation5G = RTW_ChannelPlanMap[ChannelPlan].regd; ++ } ++ ++#ifdef CONFIG_DFS_MASTER ++ for (i = 0; i < chanset_size; i++) ++ channel_set[i].non_ocp_end_time = rtw_get_current_time(); ++#endif ++ ++ DBG_871X(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, ch num:%d\n" ++ , FUNC_ADPT_ARG(padapter), ChannelPlan, chanset_size); + +- DBG_871X("%s ChannelPlan ID %x Chan num:%d \n",__FUNCTION__,ChannelPlan,chanset_size); + return chanset_size; + } + +@@ -614,7 +1025,6 @@ int init_mlme_ext_priv(_adapter* padapter) + pmlmeext->max_chan_nums = init_channel_set(padapter, pmlmepriv->ChannelPlan,pmlmeext->channel_set); + init_channel_list(padapter, pmlmeext->channel_set, pmlmeext->max_chan_nums, &pmlmeext->channel_list); + pmlmeext->last_scan_time = 0; +- pmlmeext->chan_scan_time = SURVEY_TO; + pmlmeext->mlmeext_init = _TRUE; + + +@@ -639,8 +1049,7 @@ void free_mlme_ext_priv (struct mlme_ext_priv *pmlmeext) + if (!padapter) + return; + +- if (padapter->bDriverStopped == _TRUE) +- { ++ if (rtw_is_drv_stopped(padapter)) { + _cancel_timer_ex(&pmlmeext->survey_timer); + _cancel_timer_ex(&pmlmeext->link_timer); + //_cancel_timer_ex(&pmlmeext->ADDBA_timer); +@@ -679,7 +1088,7 @@ static void _mgt_dispatcher(_adapter *padapter, struct mlme_handler *ptable, uni + if(ptable->func) + { + //receive the frames that ra(a1) is my address or ra(a1) is bc address. +- if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) && ++ if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_mac_addr(padapter), ETH_ALEN) && + !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) + { + return; +@@ -726,7 +1135,7 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame) + } + + //receive the frames that ra(a1) is my address or ra(a1) is bc address. +- if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) && ++ if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_mac_addr(padapter), ETH_ALEN) && + !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) + { + return; +@@ -738,9 +1147,9 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame) + + #ifdef CONFIG_TDLS + if((index << 4)==WIFI_ACTION){ +- //category==public (4), action==TDLS_DISCOVERY_RESPONSE +- if(*(pframe+24)==0x04 && *(pframe+25)==TDLS_DISCOVERY_RESPONSE){ +- DBG_871X("recv tdls discovery response frame from "MAC_FMT"\n", MAC_ARG(GetAddr2Ptr(pframe))); ++ /* category==public (4), action==TDLS_DISCOVERY_RESPONSE */ ++ if (*(pframe+24) == RTW_WLAN_CATEGORY_PUBLIC && *(pframe+25) == TDLS_DISCOVERY_RESPONSE) { ++ DBG_871X("[TDLS] Recv %s from "MAC_FMT"\n", rtw_tdls_action_txt(TDLS_DISCOVERY_RESPONSE), MAC_ARG(GetAddr2Ptr(pframe))); + On_TDLS_Dis_Rsp(padapter, precv_frame); + } + } +@@ -905,7 +1314,17 @@ unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame) + struct wifidirect_info *pwdinfo = &(padapter->wdinfo); + struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; + u8 wifi_test_chk_rate = 1; +- ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if ((pwdinfo->driver_interface == DRIVER_CFG80211) ++ && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) ++ && (GET_CFG80211_REPORT_MGMT(adapter_wdev_data(padapter), IEEE80211_STYPE_PROBE_REQ) == _TRUE) ++ ) { ++ rtw_cfg80211_rx_probe_request(padapter, pframe, len); ++ return _SUCCESS; ++ } ++#endif /* CONFIG_IOCTL_CFG80211 */ ++ + if ( !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && + !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE) && + !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && +@@ -1043,7 +1462,7 @@ _continue: + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + //generate pairing ID +- mac_addr = myid(&(padapter->eeprompriv)); ++ mac_addr = adapter_mac_addr(padapter); + peer_addr = psta->hwaddr; + psta->pid = (u16)(((mac_addr[4]<<8) + mac_addr[5]) + ((peer_addr[4]<<8) + peer_addr[5])); + +@@ -1091,7 +1510,7 @@ _continue: + psta->state |= _FW_LINKED; + _exit_critical_bh(&psta->lock, &irqL); + +- report_add_sta_event(padapter, psta->hwaddr, psta->aid); ++ report_add_sta_event(padapter, psta->hwaddr); + + } + +@@ -1216,15 +1635,11 @@ unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame) + #endif + + +- if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) +- { ++ if (mlmeext_chk_scan_state(pmlmeext, SCAN_PROCESS)) { + report_survey_event(padapter, precv_frame); + #ifdef CONFIG_CONCURRENT_MODE + report_survey_event(padapter->pbuddy_adapter, precv_frame); + #endif +-#ifdef CONFIG_DUALMAC_CONCURRENT +- dc_report_survey_event(padapter, precv_frame); +-#endif + return _SUCCESS; + } + +@@ -1247,7 +1662,6 @@ unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame) + + unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) + { +- int cam_idx; + struct sta_info *psta; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +@@ -1259,6 +1673,13 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) + int ret = _SUCCESS; + u8 *p = NULL; + u32 ielen = 0; ++#ifdef CONFIG_TDLS ++ struct sta_info *ptdls_sta; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++#ifdef CONFIG_TDLS_CH_SW ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++#endif ++#endif /* CONFIG_TDLS */ + + #ifdef CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR + p = rtw_get_ie(pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ielen, precv_frame->u.hdr.len -sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_); +@@ -1273,17 +1694,11 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) + } + #endif + +- if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) +- { ++ if (mlmeext_chk_scan_state(pmlmeext, SCAN_PROCESS)) { + report_survey_event(padapter, precv_frame); + #ifdef CONFIG_CONCURRENT_MODE + report_survey_event(padapter->pbuddy_adapter, precv_frame); + #endif +- +-#ifdef CONFIG_DUALMAC_CONCURRENT +- dc_report_survey_event(padapter, precv_frame); +-#endif +- + return _SUCCESS; + } + +@@ -1334,6 +1749,17 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) + process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)); + #endif //CONFIG_P2P_PS + ++#if defined(CONFIG_P2P)&&defined(CONFIG_CONCURRENT_MODE) ++ if (padapter->registrypriv.wifi_spec) { ++ if (process_p2p_cross_connect_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)) == _FALSE) { ++ if((padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state&0x03) == WIFI_FW_AP_STATE) { ++ DBG_871X_LEVEL(_drv_always_, "no issue auth, P2P cross-connect does not permit\n "); ++ return _SUCCESS; ++ } ++ } ++ } ++#endif // CONFIG_P2P CONFIG_P2P and CONFIG_CONCURRENT_MODE ++ + //start auth + start_clnt_auth(padapter); + +@@ -1350,7 +1776,7 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) + { // join wrong channel, deauth and reconnect + issue_deauth(padapter, (&(pmlmeinfo->network))->MacAddress, WLAN_REASON_DEAUTH_LEAVING); + +- report_del_sta_event(padapter,(&(pmlmeinfo->network))->MacAddress, WLAN_REASON_JOIN_WRONG_CHANNEL); ++ report_del_sta_event(padapter, (&(pmlmeinfo->network))->MacAddress, WLAN_REASON_JOIN_WRONG_CHANNEL, _TRUE, _FALSE); + pmlmeinfo->state &= (~WIFI_FW_ASSOC_SUCCESS); + return _SUCCESS; + } +@@ -1359,7 +1785,7 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) + ret = rtw_check_bcn_info(padapter, pframe, len); + if (!ret) { + DBG_871X_LEVEL(_drv_always_, "ap has changed, disconnect now\n "); +- receive_disconnect(padapter, pmlmeinfo->network.MacAddress , 0); ++ receive_disconnect(padapter, pmlmeinfo->network.MacAddress , 0, _FALSE); + return _SUCCESS; + } + //update WMM, ERP in the beacon +@@ -1372,55 +1798,79 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) + + adaptive_early_32k(pmlmeext, pframe, len); + +-#ifdef CONFIG_DFS +- process_csa_ie(padapter, pframe, len); //channel switch announcement ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++ if (rtw_tdls_is_chsw_allowed(padapter) == _TRUE) ++ { ++ /* Send TDLS Channel Switch Request when receiving Beacon */ ++ if ((padapter->tdlsinfo.chsw_info.ch_sw_state & TDLS_CH_SW_INITIATOR_STATE) && (ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) ++ && (pmlmeext->cur_channel == rtw_get_oper_ch(padapter))) { ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, padapter->tdlsinfo.chsw_info.addr); ++ if (ptdls_sta != NULL) { ++ if (ptdls_sta->tdls_sta_state | TDLS_LINKED_STATE) ++ _set_timer(&ptdls_sta->stay_on_base_chnl_timer, TDLS_CH_SW_STAY_ON_BASE_CHNL_TIMEOUT); ++ } ++ } ++ } ++#endif ++#endif /* CONFIG_TDLS */ ++ ++#ifdef CONFIG_DFS ++ process_csa_ie(padapter, pframe, len); //channel switch announcement + #endif //CONFIG_DFS + + #ifdef CONFIG_P2P_PS + process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)); + #endif //CONFIG_P2P_PS + ++ if (pmlmeext->en_hw_update_tsf) ++ rtw_enable_hw_update_tsf_cmd(padapter); ++ + #if 0 //move to validate_recv_mgnt_frame + psta->sta_stats.rx_mgnt_pkts++; + #endif + } +- } +- else if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) +- { +- if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL) +- { +- //update WMM, ERP in the beacon +- //todo: the timer is used instead of the number of the beacon received ++ ++ } else if ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { ++ _irqL irqL; ++ u8 rate_set[16]; ++ u8 rate_num = 0; ++ ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ if (psta != NULL) { ++ /* ++ * update WMM, ERP in the beacon ++ * todo: the timer is used instead of the number of the beacon received ++ */ + if ((sta_rx_pkts(psta) & 0xf) == 0) +- { +- //DBG_871X("update_bcn_info\n"); + update_beacon_info(padapter, pframe, len, psta); +- } + +- #if 0 //move to validate_recv_mgnt_frame +- psta->sta_stats.rx_mgnt_pkts++; +- #endif +- } +- else +- { +- //allocate a new CAM entry for IBSS station +- if ((cam_idx = allocate_fw_sta_entry(padapter)) == NUM_STA) +- { ++ if (pmlmeext->en_hw_update_tsf) ++ rtw_enable_hw_update_tsf_cmd(padapter); ++ ++ } else { ++ rtw_ies_get_supported_rate(pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_, len - WLAN_HDR_A3_LEN - _BEACON_IE_OFFSET_, rate_set, &rate_num); ++ if (rate_num == 0) { ++ DBG_871X(FUNC_ADPT_FMT" RX beacon with no supported rate\n", FUNC_ADPT_ARG(padapter)); + goto _END_ONBEACON_; + } + +- //get supported rate +- if (update_sta_support_rate(padapter, (pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_), (len - WLAN_HDR_A3_LEN - _BEACON_IE_OFFSET_), cam_idx) == _FAIL) +- { +- pmlmeinfo->FW_sta_info[cam_idx].status = 0; ++ psta = rtw_alloc_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ if (psta == NULL) { ++ DBG_871X(FUNC_ADPT_FMT" Exceed the upper limit of supported clients\n", FUNC_ADPT_ARG(padapter)); + goto _END_ONBEACON_; + } + ++ psta->expire_to = pstapriv->adhoc_expire_to; ++ ++ _rtw_memcpy(psta->bssrateset, rate_set, rate_num); ++ psta->bssratelen = rate_num; ++ + //update TSF Value + update_TSF(pmlmeext, pframe, len); + + //report sta add event +- report_add_sta_event(padapter, GetAddr2Ptr(pframe), cam_idx); ++ report_add_sta_event(padapter, GetAddr2Ptr(pframe)); + } + } + } +@@ -1564,35 +2014,39 @@ unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) + + //pstat->flags = 0; + //pstat->capability = 0; +- } +- else +- { ++ } else { ++#ifdef CONFIG_IEEE80211W ++ if (pstat->bpairwise_key_installed != _TRUE && !(pstat->state & WIFI_FW_ASSOC_SUCCESS)) ++#endif /* CONFIG_IEEE80211W */ ++ { + +- _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- if(rtw_is_list_empty(&pstat->asoc_list)==_FALSE) +- { +- rtw_list_delete(&pstat->asoc_list); +- pstapriv->asoc_list_cnt--; +- if (pstat->expire_to > 0) +- { +- //TODO: STA re_auth within expire_to ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (rtw_is_list_empty(&pstat->asoc_list) == _FALSE) { ++ rtw_list_delete(&pstat->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ if (pstat->expire_to > 0) ++ ;/* TODO: STA re_auth within expire_to */ + } +- } +- _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- if (seq==1) { +- //TODO: STA re_auth and auth timeout ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ if (seq == 1) ++ ; /* TODO: STA re_auth and auth timeout */ ++ + } + } + +- _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); +- if (rtw_is_list_empty(&pstat->auth_list)) +- { +- +- rtw_list_insert_tail(&pstat->auth_list, &pstapriv->auth_list); +- pstapriv->auth_list_cnt++; +- } +- _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++#ifdef CONFIG_IEEE80211W ++ if (pstat->bpairwise_key_installed != _TRUE && !(pstat->state & WIFI_FW_ASSOC_SUCCESS)) ++#endif /* CONFIG_IEEE80211W */ ++ { ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ if (rtw_is_list_empty(&pstat->auth_list)) { ++ ++ rtw_list_insert_tail(&pstat->auth_list, &pstapriv->auth_list); ++ pstapriv->auth_list_cnt++; ++ } ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ } + + if (pstat->auth_seq == 0) + pstat->expire_to = pstapriv->auth_to; +@@ -1610,9 +2064,14 @@ unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) + { + if (seq == 1) + { +- pstat->state &= ~WIFI_FW_AUTH_NULL; +- pstat->state |= WIFI_FW_AUTH_SUCCESS; +- pstat->expire_to = pstapriv->assoc_to; ++#ifdef CONFIG_IEEE80211W ++ if (pstat->bpairwise_key_installed != _TRUE && !(pstat->state & WIFI_FW_ASSOC_SUCCESS)) ++#endif /* CONFIG_IEEE80211W */ ++ { ++ pstat->state &= ~WIFI_FW_AUTH_NULL; ++ pstat->state |= WIFI_FW_AUTH_SUCCESS; ++ pstat->expire_to = pstapriv->assoc_to; ++ } + pstat->authalg = algorithm; + } + else +@@ -1631,9 +2090,13 @@ unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) + + //get_random_bytes((void *)pstat->chg_txt, 128);//TODO: + _rtw_memset((void *)pstat->chg_txt, 78, 128); +- +- pstat->state &= ~WIFI_FW_AUTH_NULL; +- pstat->state |= WIFI_FW_AUTH_STATE; ++#ifdef CONFIG_IEEE80211W ++ if (pstat->bpairwise_key_installed != _TRUE && !(pstat->state & WIFI_FW_ASSOC_SUCCESS)) ++#endif /* CONFIG_IEEE80211W */ ++ { ++ pstat->state &= ~WIFI_FW_AUTH_NULL; ++ pstat->state |= WIFI_FW_AUTH_STATE; ++ } + pstat->authalg = algorithm; + pstat->auth_seq = 2; + } +@@ -1654,10 +2117,15 @@ unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) + + if (_rtw_memcmp((void *)(p + 2), pstat->chg_txt, 128)) + { +- pstat->state &= (~WIFI_FW_AUTH_STATE); +- pstat->state |= WIFI_FW_AUTH_SUCCESS; +- // challenging txt is correct... +- pstat->expire_to = pstapriv->assoc_to; ++#ifdef CONFIG_IEEE80211W ++ if (pstat->bpairwise_key_installed != _TRUE && !(pstat->state & WIFI_FW_ASSOC_SUCCESS)) ++#endif /* CONFIG_IEEE80211W */ ++ { ++ pstat->state &= (~WIFI_FW_AUTH_STATE); ++ pstat->state |= WIFI_FW_AUTH_SUCCESS; ++ /* challenging txt is correct... */ ++ pstat->expire_to = pstapriv->assoc_to; ++ } + } + else + { +@@ -1683,7 +2151,7 @@ unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) + issue_auth(padapter, pstat, (unsigned short)(_STATS_SUCCESSFUL_)); + #endif + +- if (pstat->state & WIFI_FW_AUTH_SUCCESS) ++ if ((pstat->state & WIFI_FW_AUTH_SUCCESS) || (pstat->state & WIFI_FW_ASSOC_SUCCESS)) + pstat->auth_seq = 0; + + +@@ -1721,7 +2189,7 @@ unsigned int OnAuthClient(_adapter *padapter, union recv_frame *precv_frame) + DBG_871X("%s\n", __FUNCTION__); + + //check A1 matches or not +- if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) ++ if (!_rtw_memcmp(adapter_mac_addr(padapter), get_da(pframe), ETH_ALEN)) + return _SUCCESS; + + if (!(pmlmeinfo->state & WIFI_FW_AUTH_STATE)) +@@ -1819,8 +2287,8 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) + unsigned char reassoc, *p, *pos, *wpa_ie; + unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01}; + int i, ie_len, wpa_ie_len, left; +- unsigned char supportRate[16]; +- int supportRateNum; ++ u8 rate_set[16]; ++ u8 rate_num; + unsigned short status = _STATS_SUCCESSFUL_; + unsigned short frame_type, ie_offset=0; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +@@ -1836,10 +2304,6 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) + u8 p2p_status_code = P2P_STATUS_SUCCESS; + u8 *p2pie; + u32 p2pielen = 0; +-#ifdef CONFIG_WFD +- u8 wfd_ie[ 128 ] = { 0x00 }; +- u32 wfd_ielen = 0; +-#endif // CONFIG_WFD + #endif //CONFIG_P2P + + #ifdef CONFIG_CONCURRENT_MODE +@@ -1969,39 +2433,14 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) + if(_STATS_SUCCESSFUL_ != status) + goto OnAssocReqFail; + +- // check if the supported rate is ok +- p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _SUPPORTEDRATES_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); +- if (p == NULL) { +- DBG_871X("Rx a sta assoc-req which supported rate is empty!\n"); +- // use our own rate set as statoin used +- //_rtw_memcpy(supportRate, AP_BSSRATE, AP_BSSRATE_LEN); +- //supportRateNum = AP_BSSRATE_LEN; +- ++ rtw_ies_get_supported_rate(pframe + WLAN_HDR_A3_LEN + ie_offset, pkt_len - WLAN_HDR_A3_LEN - ie_offset, rate_set, &rate_num); ++ if (rate_num == 0) { ++ DBG_871X(FUNC_ADPT_FMT" RX assoc-req with no supported rate\n", FUNC_ADPT_ARG(padapter)); + status = _STATS_FAILURE_; + goto OnAssocReqFail; + } +- else { +- _rtw_memcpy(supportRate, p+2, ie_len); +- supportRateNum = ie_len; +- +- p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _EXT_SUPPORTEDRATES_IE_ , &ie_len, +- pkt_len - WLAN_HDR_A3_LEN - ie_offset); +- if (p != NULL) { +- +- if(supportRateNum<=sizeof(supportRate)) +- { +- _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); +- supportRateNum += ie_len; +- } +- } +- } +- +- //todo: mask supportRate between AP & STA -> move to update raid +- //get_matched_rate(pmlmeext, supportRate, &supportRateNum, 0); +- +- //update station supportRate +- pstat->bssratelen = supportRateNum; +- _rtw_memcpy(pstat->bssrateset, supportRate, supportRateNum); ++ _rtw_memcpy(pstat->bssrateset, rate_set, rate_num); ++ pstat->bssratelen = rate_num; + UpdateBrateTblForSoftAP(pstat->bssrateset, pstat->bssratelen); + + //check RSN/WPA/WPS +@@ -2235,17 +2674,6 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) + goto OnAssocReqFail; + } + +- +- if ((pstat->flags & WLAN_STA_HT) && +- ((pstat->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || +- (pstat->wpa_pairwise_cipher&WPA_CIPHER_TKIP))) +- { +- DBG_871X("HT: " MAC_FMT " tried to " +- "use TKIP with HT association\n", MAC_ARG(pstat->hwaddr)); +- +- //status = WLAN_STATUS_CIPHER_REJECTED_PER_POLICY; +- //goto OnAssocReqFail; +- } + #endif /* CONFIG_80211N_HT */ + + #ifdef CONFIG_80211AC_VHT +@@ -2274,6 +2702,20 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) + } + #endif /* CONFIG_80211AC_VHT */ + ++ if (((pstat->flags & WLAN_STA_HT) || (pstat->flags & WLAN_STA_VHT)) && ++ ((pstat->wpa2_pairwise_cipher & WPA_CIPHER_TKIP) || ++ (pstat->wpa_pairwise_cipher & WPA_CIPHER_TKIP))) { ++ ++ DBG_871X("(V)HT: " MAC_FMT " tried to use TKIP with (V)HT association\n", MAC_ARG(pstat->hwaddr)); ++ ++ pstat->flags &= ~WLAN_STA_HT; ++ pstat->flags &= ~WLAN_STA_VHT; ++ /*status = WLAN_STATUS_CIPHER_REJECTED_PER_POLICY; ++ * goto OnAssocReqFail; ++ */ ++ } ++ ++ + // + //if (hapd->iface->current_mode->mode == HOSTAPD_MODE_IEEE80211G)//? + pstat->flags |= WLAN_STA_NONERP; +@@ -2308,21 +2750,9 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) + goto OnAssocReqFail; + } + } +-#ifdef CONFIG_WFD +- if(rtw_get_wfd_ie(pframe + WLAN_HDR_A3_LEN + ie_offset , pkt_len - WLAN_HDR_A3_LEN - ie_offset , wfd_ie, &wfd_ielen )) +- { +- u8 attr_content[ 10 ] = { 0x00 }; +- u32 attr_contentlen = 0; +- +- DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); +- rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); +- if ( attr_contentlen ) +- { +- pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); +- DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); +- } +- } +-#endif ++ #ifdef CONFIG_WFD ++ rtw_process_wfd_ies(padapter, pframe + WLAN_HDR_A3_LEN + ie_offset, pkt_len - WLAN_HDR_A3_LEN - ie_offset, __func__); ++ #endif + } + pstat->p2p_status_code = p2p_status_code; + #endif //CONFIG_P2P +@@ -2339,57 +2769,68 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) + if (pstat->aid > 0) { + DBG_871X(" old AID %d\n", pstat->aid); + } else { +- for (pstat->aid = 1; pstat->aid <= NUM_STA; pstat->aid++) +- if (pstapriv->sta_aid[pstat->aid - 1] == NULL) +- break; +- +- //if (pstat->aid > NUM_STA) { +- if (pstat->aid > pstapriv->max_num_sta) { ++ for (pstat->aid = 1; pstat->aid <= NUM_STA; pstat->aid++) { ++ if (pstapriv->sta_aid[pstat->aid - 1] == NULL) { ++ if (pstat->aid > pstapriv->max_num_sta) { ++ pstat->aid = 0; + +- pstat->aid = 0; +- +- DBG_871X(" no room for more AIDs\n"); ++ DBG_871X(" no room for more AIDs\n"); + +- status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA; ++ status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA; + +- goto OnAssocReqFail; ++ goto OnAssocReqFail; + + +- } else { +- pstapriv->sta_aid[pstat->aid - 1] = pstat; +- DBG_871X("allocate new AID = (%d)\n", pstat->aid); ++ } else { ++ pstapriv->sta_aid[pstat->aid - 1] = pstat; ++ DBG_871X("allocate new AID = (%d)\n", pstat->aid); ++ break; ++ } ++ } + } + } + + + pstat->state &= (~WIFI_FW_ASSOC_STATE); + pstat->state |= WIFI_FW_ASSOC_SUCCESS; +- +- _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); +- if (!rtw_is_list_empty(&pstat->auth_list)) +- { +- rtw_list_delete(&pstat->auth_list); +- pstapriv->auth_list_cnt--; +- } +- _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); +- +- _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- if (rtw_is_list_empty(&pstat->asoc_list)) ++ /* DBG_871X("==================%s, %d, (%x), bpairwise_key_installed=%d, MAC:"MAC_FMT"\n" ++ , __func__, __LINE__, pstat->state, pstat->bpairwise_key_installed, MAC_ARG(pstat->hwaddr)); */ ++#ifdef CONFIG_IEEE80211W ++ if (pstat->bpairwise_key_installed != _TRUE) ++#endif /* CONFIG_IEEE80211W */ + { +- pstat->expire_to = pstapriv->expire_to; +- rtw_list_insert_tail(&pstat->asoc_list, &pstapriv->asoc_list); +- pstapriv->asoc_list_cnt++; ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ if (!rtw_is_list_empty(&pstat->auth_list)) { ++ rtw_list_delete(&pstat->auth_list); ++ pstapriv->auth_list_cnt--; ++ } ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (rtw_is_list_empty(&pstat->asoc_list)) { ++ pstat->expire_to = pstapriv->expire_to; ++ rtw_list_insert_tail(&pstat->asoc_list, &pstapriv->asoc_list); ++ pstapriv->asoc_list_cnt++; ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + } +- _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + // now the station is qualified to join our BSS... + if(pstat && (pstat->state & WIFI_FW_ASSOC_SUCCESS) && (_STATS_SUCCESSFUL_==status)) + { + #ifdef CONFIG_NATIVEAP_MLME +- //.1 bss_cap_update & sta_info_update +- bss_cap_update_on_sta_join(padapter, pstat); +- sta_info_update(padapter, pstat); +- ++#ifdef CONFIG_IEEE80211W ++ if (pstat->bpairwise_key_installed != _TRUE) ++#endif /* CONFIG_IEEE80211W */ ++ { ++ /* .1 bss_cap_update & sta_info_update */ ++ bss_cap_update_on_sta_join(padapter, pstat); ++ sta_info_update(padapter, pstat); ++ } ++#ifdef CONFIG_IEEE80211W ++ if (pstat->bpairwise_key_installed == _TRUE) ++ status = _STATS_REFUSED_TEMPORARILY_; ++#endif /* CONFIG_IEEE80211W */ + //.2 issue assoc rsp before notify station join event. + if (frame_type == WIFI_ASSOCREQ) + issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP); +@@ -2413,10 +2854,19 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) + } + _exit_critical_bh(&pstat->lock, &irqL); + #endif //CONFIG_IOCTL_CFG80211 +- +- //.3-(1) report sta add event +- report_add_sta_event(padapter, pstat->hwaddr, pstat->aid); +- ++#ifdef CONFIG_IEEE80211W ++ if (pstat->bpairwise_key_installed != _TRUE) ++#endif /* CONFIG_IEEE80211W */ ++ { ++ /* .3-(1) report sta add event */ ++ report_add_sta_event(padapter, pstat->hwaddr); ++ } ++#ifdef CONFIG_IEEE80211W ++ if (pstat->bpairwise_key_installed == _TRUE && padapter->securitypriv.binstallBIPkey == _TRUE) { ++ DBG_871X(MAC_FMT"\n", MAC_ARG(pstat->hwaddr)); ++ issue_action_SA_Query(padapter, pstat->hwaddr, 0, 0, IEEE80211W_RIGHT_KEY); ++ } ++#endif /* CONFIG_IEEE80211W */ + #endif //CONFIG_NATIVEAP_MLME + } + +@@ -2465,7 +2915,7 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) + DBG_871X("%s\n", __FUNCTION__); + + //check A1 matches or not +- if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) ++ if (!_rtw_memcmp(adapter_mac_addr(padapter), get_da(pframe), ETH_ALEN)) + return _SUCCESS; + + if (!(pmlmeinfo->state & (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE))) +@@ -2511,8 +2961,7 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) + #if defined(CONFIG_P2P) && defined(CONFIG_WFD) + else if ( _rtw_memcmp(pIE->data, WFD_OUI, 4)) //WFD + { +- DBG_871X( "[%s] Found WFD IE\n", __FUNCTION__ ); +- WFD_info_handler( padapter, pIE ); ++ rtw_process_wfd_ie(padapter, (u8 *)pIE, pIE->Length, __func__); + } + #endif + break; +@@ -2543,7 +2992,15 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) + + case _ERPINFO_IE_: + ERP_IE_handler(padapter, pIE); +- ++ break; ++#ifdef CONFIG_TDLS ++ case _EXT_CAP_IE_: ++ if (check_ap_tdls_prohibited(pIE->data, pIE->Length) == _TRUE) ++ padapter->tdlsinfo.ap_prohibited = _TRUE; ++ if (check_ap_tdls_ch_switching_prohibited(pIE->data, pIE->Length) == _TRUE) ++ padapter->tdlsinfo.ch_switch_prohibited = _TRUE; ++ break; ++#endif /* CONFIG_TDLS */ + default: + break; + } +@@ -2588,6 +3045,8 @@ unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame) + if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) + return _SUCCESS; + ++ DBG_871X(FUNC_ADPT_FMT" - Start to Disconnect\n", FUNC_ADPT_ARG(padapter)); ++ + #ifdef CONFIG_P2P + if ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) + { +@@ -2598,8 +3057,6 @@ unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame) + + reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); + +- DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason); +- + rtw_lock_rx_suspend_timeout(8000); + + #ifdef CONFIG_AP_MODE +@@ -2613,8 +3070,8 @@ unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame) + //rtw_free_stainfo(padapter, psta); + //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); + +- DBG_871X_LEVEL(_drv_always_, "ap recv deauth reason code(%d) sta:%pM\n", +- reason, GetAddr2Ptr(pframe)); ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" reason=%u, ta=%pM\n" ++ , FUNC_ADPT_ARG(padapter), reason, GetAddr2Ptr(pframe)); + + psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); + if(psta) +@@ -2626,12 +3083,12 @@ unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame) + { + rtw_list_delete(&psta->asoc_list); + pstapriv->asoc_list_cnt--; +- updated = ap_free_sta(padapter, psta, _FALSE, reason); ++ updated = ap_free_sta(padapter, psta, _FALSE, reason, _TRUE); + + } + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + +- associated_clients_update(padapter, updated); ++ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); + } + + +@@ -2659,12 +3116,12 @@ unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame) + } + } + +- DBG_871X_LEVEL(_drv_always_, "sta recv deauth reason code(%d) sta:%pM, ignore = %d\n", +- reason, GetAddr3Ptr(pframe), ignore_received_deauth); +- ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" reason=%u, ta=%pM, ignore=%d\n" ++ , FUNC_ADPT_ARG(padapter), reason, GetAddr2Ptr(pframe), ignore_received_deauth); ++ + if ( 0 == ignore_received_deauth ) + { +- receive_disconnect(padapter, GetAddr3Ptr(pframe) ,reason); ++ receive_disconnect(padapter, GetAddr2Ptr(pframe), reason, _FALSE); + } + } + pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; +@@ -2687,6 +3144,8 @@ unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame) + if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) + return _SUCCESS; + ++ DBG_871X(FUNC_ADPT_FMT" - Start to Disconnect\n", FUNC_ADPT_ARG(padapter)); ++ + #ifdef CONFIG_P2P + if ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) + { +@@ -2697,8 +3156,6 @@ unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame) + + reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); + +- DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason); +- + rtw_lock_rx_suspend_timeout(8000); + + #ifdef CONFIG_AP_MODE +@@ -2712,8 +3169,8 @@ unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame) + //rtw_free_stainfo(padapter, psta); + //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); + +- DBG_871X_LEVEL(_drv_always_, "ap recv disassoc reason code(%d) sta:%pM\n", +- reason, GetAddr2Ptr(pframe)); ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" reason=%u, ta=%pM\n" ++ , FUNC_ADPT_ARG(padapter), reason, GetAddr2Ptr(pframe)); + + psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); + if(psta) +@@ -2725,12 +3182,12 @@ unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame) + { + rtw_list_delete(&psta->asoc_list); + pstapriv->asoc_list_cnt--; +- updated = ap_free_sta(padapter, psta, _FALSE, reason); ++ updated = ap_free_sta(padapter, psta, _FALSE, reason, _TRUE); + + } + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + +- associated_clients_update(padapter, updated); ++ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); + } + + return _SUCCESS; +@@ -2738,10 +3195,10 @@ unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame) + else + #endif + { +- DBG_871X_LEVEL(_drv_always_, "sta recv disassoc reason code(%d) sta:%pM\n", +- reason, GetAddr3Ptr(pframe)); +- +- receive_disconnect(padapter, GetAddr3Ptr(pframe), reason); ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" reason=%u, ta=%pM\n" ++ , FUNC_ADPT_ARG(padapter), reason, GetAddr2Ptr(pframe)); ++ ++ receive_disconnect(padapter, GetAddr2Ptr(pframe), reason, _FALSE); + } + pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; + return _SUCCESS; +@@ -2865,106 +3322,384 @@ unsigned int OnAction_dls(_adapter *padapter, union recv_frame *precv_frame) + return _SUCCESS; + } + +-unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame) ++/** ++ * rtw_rx_ampdu_size - Get the target RX AMPDU buffer size for the specific @adapter ++ * @adapter: the adapter to get target RX AMPDU buffer size ++ * ++ * Returns: the target RX AMPDU buffer size ++ */ ++u8 rtw_rx_ampdu_size(_adapter *adapter) + { +- u8 *addr; +- struct sta_info *psta=NULL; +- struct recv_reorder_ctrl *preorder_ctrl; +- unsigned char *frame_body; +- unsigned char category, action; +- unsigned short tid, status, reason_code = 0; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- u8 *pframe = precv_frame->u.hdr.rx_data; +- struct sta_priv *pstapriv = &padapter->stapriv; +-#ifdef CONFIG_80211N_HT ++ u8 size; ++ HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor; + +- DBG_871X("%s\n", __FUNCTION__); ++ if (adapter->fix_rx_ampdu_size != RX_AMPDU_SIZE_INVALID) { ++ size = adapter->fix_rx_ampdu_size; ++ goto exit; ++ } + +- //check RA matches or not +- if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode +- return _SUCCESS; ++#ifdef CONFIG_BT_COEXIST ++ if (rtw_btcoex_IsBTCoexCtrlAMPDUSize(adapter) == _TRUE) { ++ size = rtw_btcoex_GetAMPDUSize(adapter); ++ goto exit; ++ } ++#endif + +-/* +- //check A1 matches or not +- if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) +- return _SUCCESS; +-*/ ++ /* for scan */ ++ if (!mlmeext_chk_scan_state(&adapter->mlmeextpriv, SCAN_DISABLE) ++ && !mlmeext_chk_scan_state(&adapter->mlmeextpriv, SCAN_COMPLETE) ++ && adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_size != RX_AMPDU_SIZE_INVALID ++ ) { ++ size = adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_size; ++ goto exit; ++ } + +- if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) +- if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) +- return _SUCCESS; ++ /* default value based on max_rx_ampdu_factor */ ++ if (adapter->driver_rx_ampdu_factor != 0xFF) ++ max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)adapter->driver_rx_ampdu_factor; ++ else ++ rtw_hal_get_def_var(adapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); ++ ++ if (MAX_AMPDU_FACTOR_64K == max_rx_ampdu_factor) ++ size = 64; ++ else if (MAX_AMPDU_FACTOR_32K == max_rx_ampdu_factor) ++ size = 32; ++ else if (MAX_AMPDU_FACTOR_16K == max_rx_ampdu_factor) ++ size = 16; ++ else if (MAX_AMPDU_FACTOR_8K == max_rx_ampdu_factor) ++ size = 8; ++ else ++ size = 64; + +- addr = GetAddr2Ptr(pframe); +- psta = rtw_get_stainfo(pstapriv, addr); ++exit: + +- if(psta==NULL) +- return _SUCCESS; ++ if (size > 127) ++ size = 127; + +- frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ return size; ++} + +- category = frame_body[0]; +- if (category == RTW_WLAN_CATEGORY_BACK)// representing Block Ack +- { +-#ifdef CONFIG_TDLS +- if((psta->tdls_sta_state & TDLS_LINKED_STATE) && +- (psta->htpriv.ht_option==_TRUE) && +- (psta->htpriv.ampdu_enable==_TRUE)) +- { +- DBG_871X("Recv [%s] from direc link\n", __FUNCTION__); +- } +- else +-#endif //CONFIG_TDLS +- if (!pmlmeinfo->HT_enable) +- { +- return _SUCCESS; +- } ++/** ++ * rtw_rx_ampdu_is_accept - Get the permission if RX AMPDU should be set up for the specific @adapter ++ * @adapter: the adapter to get the permission if RX AMPDU should be set up ++ * ++ * Returns: accept or not ++ */ ++bool rtw_rx_ampdu_is_accept(_adapter *adapter) ++{ ++ bool accept; + +- action = frame_body[1]; +- DBG_871X("%s, action=%d\n", __FUNCTION__, action); +- switch (action) +- { +- case RTW_WLAN_ACTION_ADDBA_REQ: //ADDBA request ++ if (adapter->fix_rx_ampdu_accept != RX_AMPDU_ACCEPT_INVALID) { ++ accept = adapter->fix_rx_ampdu_accept; ++ goto exit; ++ } + +- _rtw_memcpy(&(pmlmeinfo->ADDBA_req), &(frame_body[2]), sizeof(struct ADDBA_request)); +- //process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), GetAddr3Ptr(pframe)); +- process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), addr); +- +- if(pmlmeinfo->bAcceptAddbaReq == _TRUE) +- { +- issue_action_BA(padapter, addr, RTW_WLAN_ACTION_ADDBA_RESP, 0); +- } +- else +- { +- issue_action_BA(padapter, addr, RTW_WLAN_ACTION_ADDBA_RESP, 37);//reject ADDBA Req +- } +- +- break; ++#ifdef CONFIG_BT_COEXIST ++ if (rtw_btcoex_IsBTCoexRejectAMPDU(adapter) == _TRUE) { ++ accept = _FALSE; ++ goto exit; ++ } ++#endif + +- case RTW_WLAN_ACTION_ADDBA_RESP: //ADDBA response ++ /* for scan */ ++ if (!mlmeext_chk_scan_state(&adapter->mlmeextpriv, SCAN_DISABLE) ++ && !mlmeext_chk_scan_state(&adapter->mlmeextpriv, SCAN_COMPLETE) ++ && adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_accept != RX_AMPDU_ACCEPT_INVALID ++ ) { ++ accept = adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_accept; ++ goto exit; ++ } + +- //status = frame_body[3] | (frame_body[4] << 8); //endian issue +- status = RTW_GET_LE16(&frame_body[3]); +- tid = ((frame_body[5] >> 2) & 0x7); ++ /* default value for other cases */ ++ accept = adapter->mlmeextpriv.mlmext_info.bAcceptAddbaReq; + +- if (status == 0) +- { //successful +- DBG_871X("agg_enable for TID=%d\n", tid); +- psta->htpriv.agg_enable_bitmap |= 1 << tid; +- psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); +- } +- else +- { +- psta->htpriv.agg_enable_bitmap &= ~BIT(tid); +- } ++exit: ++ return accept; ++} + +- if(psta->state & WIFI_STA_ALIVE_CHK_STATE) +- { +- DBG_871X("%s alive check - rx ADDBA response\n", __func__); +- psta->htpriv.agg_enable_bitmap &= ~BIT(tid); +- psta->expire_to = pstapriv->expire_to; +- psta->state ^= WIFI_STA_ALIVE_CHK_STATE; +- } ++/** ++ * rtw_rx_ampdu_set_size - Set the target RX AMPDU buffer size for the specific @adapter and specific @reason ++ * @adapter: the adapter to set target RX AMPDU buffer size ++ * @size: the target RX AMPDU buffer size to set ++ * @reason: reason for the target RX AMPDU buffer size setting ++ * ++ * Returns: whether the target RX AMPDU buffer size is changed ++ */ ++bool rtw_rx_ampdu_set_size(_adapter *adapter, u8 size, u8 reason) ++{ ++ bool is_adj = _FALSE; ++ struct mlme_ext_priv *mlmeext; ++ struct mlme_ext_info *mlmeinfo; ++ ++ mlmeext = &adapter->mlmeextpriv; ++ mlmeinfo = &mlmeext->mlmext_info; ++ ++ if (reason == RX_AMPDU_DRV_FIXED) { ++ if (adapter->fix_rx_ampdu_size != size) { ++ adapter->fix_rx_ampdu_size = size; ++ is_adj = _TRUE; ++ DBG_871X(FUNC_ADPT_FMT" fix_rx_ampdu_size:%u\n", FUNC_ADPT_ARG(adapter), size); ++ } ++ } else if (reason == RX_AMPDU_DRV_SCAN) { ++ struct ss_res *ss = &adapter->mlmeextpriv.sitesurvey_res; ++ ++ if (ss->rx_ampdu_size != size) { ++ ss->rx_ampdu_size = size; ++ is_adj = _TRUE; ++ DBG_871X(FUNC_ADPT_FMT" ss.rx_ampdu_size:%u\n", FUNC_ADPT_ARG(adapter), size); ++ } ++ } ++ ++ return is_adj; ++} ++ ++/** ++ * rtw_rx_ampdu_set_accept - Set the permission if RX AMPDU should be set up for the specific @adapter and specific @reason ++ * @adapter: the adapter to set if RX AMPDU should be set up ++ * @accept: if RX AMPDU should be set up ++ * @reason: reason for the permission if RX AMPDU should be set up ++ * ++ * Returns: whether the permission if RX AMPDU should be set up is changed ++ */ ++bool rtw_rx_ampdu_set_accept(_adapter *adapter, u8 accept, u8 reason) ++{ ++ bool is_adj = _FALSE; ++ struct mlme_ext_priv *mlmeext; ++ struct mlme_ext_info *mlmeinfo; ++ ++ mlmeext = &adapter->mlmeextpriv; ++ mlmeinfo = &mlmeext->mlmext_info; ++ ++ if (reason == RX_AMPDU_DRV_FIXED) { ++ if (adapter->fix_rx_ampdu_accept != accept) { ++ adapter->fix_rx_ampdu_accept = accept; ++ is_adj = _TRUE; ++ DBG_871X(FUNC_ADPT_FMT" fix_rx_ampdu_accept:%u\n", FUNC_ADPT_ARG(adapter), accept); ++ } ++ } else if (reason == RX_AMPDU_DRV_SCAN) { ++ if (adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_accept != accept) { ++ adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_accept = accept; ++ is_adj = _TRUE; ++ DBG_871X(FUNC_ADPT_FMT" ss.rx_ampdu_accept:%u\n", FUNC_ADPT_ARG(adapter), accept); ++ } ++ } ++ ++ return is_adj; ++} ++ ++/** ++ * rx_ampdu_apply_sta_tid - Apply RX AMPDU setting to the specific @sta and @tid ++ * @adapter: the adapter to which @sta belongs ++ * @sta: the sta to be checked ++ * @tid: the tid to be checked ++ * @accept: the target permission if RX AMPDU should be set up ++ * @size: the target RX AMPDU buffer size ++ * ++ * Returns: ++ * 0: no canceled ++ * 1: canceled by no permission ++ * 2: canceled by different buffer size ++ * 3: canceled by potential mismatched status ++ * ++ * Blocking function, may sleep ++ */ ++u8 rx_ampdu_apply_sta_tid(_adapter *adapter, struct sta_info *sta, u8 tid, u8 accept, u8 size) ++{ ++ u8 ret = 0; ++ struct recv_reorder_ctrl *reorder_ctl = &sta->recvreorder_ctrl[tid]; ++ ++ if (reorder_ctl->enable == _FALSE) { ++ if (reorder_ctl->ampdu_size != RX_AMPDU_SIZE_INVALID) { ++ send_delba_sta_tid_wait_ack(adapter, 0, sta, tid, 1); ++ ret = 3; ++ } ++ goto exit; ++ } ++ ++ if (accept == _FALSE) { ++ send_delba_sta_tid_wait_ack(adapter, 0, sta, tid, 0); ++ ret = 1; ++ } else if (reorder_ctl->ampdu_size != size) { ++ send_delba_sta_tid_wait_ack(adapter, 0, sta, tid, 0); ++ ret = 2; ++ } ++ ++exit: ++ return ret; ++} ++ ++/** ++ * rx_ampdu_apply_sta - Apply RX AMPDU setting to the specific @sta ++ * @adapter: the adapter to which @sta belongs ++ * @sta: the sta to be checked ++ * @accept: the target permission if RX AMPDU should be set up ++ * @size: the target RX AMPDU buffer size ++ * ++ * Returns: number of the RX AMPDU assciation canceled for applying current target setting ++ * ++ * Blocking function, may sleep ++ */ ++u8 rx_ampdu_apply_sta(_adapter *adapter, struct sta_info *sta, u8 accept, u8 size) ++{ ++ u8 change_cnt = 0; ++ int i; ++ ++ for (i = 0; i < TID_NUM; i++) { ++ if (rx_ampdu_apply_sta_tid(adapter, sta, i, accept, size) != 0) ++ change_cnt++; ++ } ++ ++ return change_cnt; ++} ++ ++/** ++ * rtw_rx_ampdu_apply - Apply the current target RX AMPDU setting for the specific @adapter ++ * @adapter: the adapter to be applied ++ * ++ * Returns: number of the RX AMPDU assciation canceled for applying current target setting ++ */ ++u16 rtw_rx_ampdu_apply(_adapter *adapter) ++{ ++ u16 adj_cnt = 0; ++ struct mlme_ext_priv *mlmeext; ++ struct sta_info *sta; ++ u8 accept = rtw_rx_ampdu_is_accept(adapter); ++ u8 size = rtw_rx_ampdu_size(adapter); ++ ++ mlmeext = &adapter->mlmeextpriv; ++ ++ if (mlmeext_msr(mlmeext) == WIFI_FW_STATION_STATE) { ++ sta = rtw_get_stainfo(&adapter->stapriv, get_bssid(&adapter->mlmepriv)); ++ if (sta) ++ adj_cnt += rx_ampdu_apply_sta(adapter, sta, accept, size); ++ ++ } else if (mlmeext_msr(mlmeext) == WIFI_FW_AP_STATE) { ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 peer_num = 0; ++ char peers[NUM_STA]; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ int i; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ int stainfo_offset; ++ ++ sta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, sta); ++ if (stainfo_offset_valid(stainfo_offset)) ++ peers[peer_num++] = stainfo_offset; ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ for (i = 0; i < peer_num; i++) { ++ sta = rtw_get_stainfo_by_offset(pstapriv, peers[i]); ++ if (sta) ++ adj_cnt += rx_ampdu_apply_sta(adapter, sta, accept, size); ++ } ++ } ++ ++ return adj_cnt; ++} ++ ++unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ u8 *addr; ++ struct sta_info *psta=NULL; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ unsigned char *frame_body; ++ unsigned char category, action; ++ unsigned short tid, status, reason_code = 0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++#ifdef CONFIG_80211N_HT ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ //check RA matches or not ++ if (!_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(pframe), ETH_ALEN)) ++ return _SUCCESS; ++ ++/* ++ //check A1 matches or not ++ if (!_rtw_memcmp(adapter_mac_addr(padapter), get_da(pframe), ETH_ALEN)) ++ return _SUCCESS; ++*/ ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) ++ return _SUCCESS; ++ ++ addr = GetAddr2Ptr(pframe); ++ psta = rtw_get_stainfo(pstapriv, addr); ++ ++ if(psta==NULL) ++ return _SUCCESS; ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ category = frame_body[0]; ++ if (category == RTW_WLAN_CATEGORY_BACK)// representing Block Ack ++ { ++#ifdef CONFIG_TDLS ++ if((psta->tdls_sta_state & TDLS_LINKED_STATE) && ++ (psta->htpriv.ht_option==_TRUE) && ++ (psta->htpriv.ampdu_enable==_TRUE)) ++ { ++ DBG_871X("Recv [%s] from direc link\n", __FUNCTION__); ++ } ++ else ++#endif //CONFIG_TDLS ++ if (!pmlmeinfo->HT_enable) ++ { ++ return _SUCCESS; ++ } ++ ++ action = frame_body[1]; ++ DBG_871X("%s, action=%d\n", __FUNCTION__, action); ++ switch (action) ++ { ++ case RTW_WLAN_ACTION_ADDBA_REQ: //ADDBA request ++ ++ _rtw_memcpy(&(pmlmeinfo->ADDBA_req), &(frame_body[2]), sizeof(struct ADDBA_request)); ++ //process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), GetAddr3Ptr(pframe)); ++ process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), addr); ++ ++ break; ++ ++ case RTW_WLAN_ACTION_ADDBA_RESP: //ADDBA response ++ ++ //status = frame_body[3] | (frame_body[4] << 8); //endian issue ++ status = RTW_GET_LE16(&frame_body[3]); ++ tid = ((frame_body[5] >> 2) & 0x7); ++ ++ if (status == 0) ++ { //successful ++ DBG_871X("agg_enable for TID=%d\n", tid); ++ psta->htpriv.agg_enable_bitmap |= 1 << tid; ++ psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); ++ } ++ else ++ { ++ psta->htpriv.agg_enable_bitmap &= ~BIT(tid); ++ } ++ ++ if(psta->state & WIFI_STA_ALIVE_CHK_STATE) ++ { ++ DBG_871X("%s alive check - rx ADDBA response\n", __func__); ++ psta->htpriv.agg_enable_bitmap &= ~BIT(tid); ++ psta->expire_to = pstapriv->expire_to; ++ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; ++ } + + //DBG_871X("marc: ADDBA RSP: %x\n", pmlmeinfo->agg_enable_bitmap); + break; +@@ -2982,13 +3717,9 @@ unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame) + { + tid = (frame_body[3] >> 4) & 0x0F; + +- preorder_ctrl = &psta->recvreorder_ctrl[tid]; ++ preorder_ctrl = &psta->recvreorder_ctrl[tid]; + preorder_ctrl->enable = _FALSE; +- preorder_ctrl->indicate_seq = 0xffff; +- #ifdef DBG_RX_SEQ +- DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, +- preorder_ctrl->indicate_seq); +- #endif ++ preorder_ctrl->ampdu_size = RX_AMPDU_SIZE_INVALID; + } + + DBG_871X("%s(): DELBA: %x(%x)\n", __FUNCTION__,pmlmeinfo->agg_enable_bitmap, reason_code); +@@ -3056,7 +3787,7 @@ void issue_p2p_GO_request(_adapter *padapter, u8* raddr) + u16 len_channellist_attr = 0; + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; +@@ -3088,8 +3819,8 @@ void issue_p2p_GO_request(_adapter *padapter, u8* raddr) + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); + pmlmeext->mgnt_seq++; +@@ -3275,7 +4006,7 @@ void issue_p2p_GO_request(_adapter *padapter, u8* raddr) + p2pielen += 2; + + // Value: +- _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); + p2pielen += ETH_ALEN; + + +@@ -3292,7 +4023,8 @@ void issue_p2p_GO_request(_adapter *padapter, u8* raddr) + + get_reg_classes_full_count(pmlmeext->channel_list); + + #ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ if (check_buddy_fwstate(padapter , _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); + } +@@ -3319,7 +4051,8 @@ void issue_p2p_GO_request(_adapter *padapter, u8* raddr) + // Channel Entry List + + #ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ if (check_buddy_fwstate(padapter , _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + _adapter *pbuddy_adapter = padapter->pbuddy_adapter; + struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +@@ -3394,7 +4127,7 @@ void issue_p2p_GO_request(_adapter *padapter, u8* raddr) + + // Value: + // P2P Device Address +- _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); + p2pielen += ETH_ALEN; + + // Config Method +@@ -3477,7 +4210,7 @@ void issue_p2p_GO_request(_adapter *padapter, u8* raddr) + wfdielen = build_nego_req_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pattrib->pktlen += wfdielen; +-#endif //CONFIG_WFD ++#endif + + pattrib->last_txcmdsz = pattrib->pktlen; + +@@ -3515,7 +4248,7 @@ void issue_p2p_GO_response(_adapter *padapter, u8* raddr, u8* frame_body,uint le + + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { +@@ -3536,8 +4269,8 @@ void issue_p2p_GO_response(_adapter *padapter, u8* raddr, u8* frame_body,uint le + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); + pmlmeext->mgnt_seq++; +@@ -3775,7 +4508,7 @@ void issue_p2p_GO_response(_adapter *padapter, u8* raddr, u8* frame_body,uint le + p2pielen += 2; + + // Value: +- _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); + p2pielen += ETH_ALEN; + + // Channel List +@@ -3790,7 +4523,8 @@ void issue_p2p_GO_response(_adapter *padapter, u8* raddr, u8* frame_body,uint le + + get_reg_classes_full_count(pmlmeext->channel_list); + + #ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ if (check_buddy_fwstate(padapter , _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); + } +@@ -3817,7 +4551,8 @@ void issue_p2p_GO_response(_adapter *padapter, u8* raddr, u8* frame_body,uint le + // Channel Entry List + + #ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ if (check_buddy_fwstate(padapter , _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + _adapter *pbuddy_adapter = padapter->pbuddy_adapter; + struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +@@ -3893,7 +4628,7 @@ void issue_p2p_GO_response(_adapter *padapter, u8* raddr, u8* frame_body,uint le + + // Value: + // P2P Device Address +- _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); + p2pielen += ETH_ALEN; + + // Config Method +@@ -3959,7 +4694,7 @@ void issue_p2p_GO_response(_adapter *padapter, u8* raddr, u8* frame_body,uint le + wfdielen = build_nego_resp_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pattrib->pktlen += wfdielen; +-#endif //CONFIG_WFD ++#endif + + pattrib->last_txcmdsz = pattrib->pktlen; + +@@ -3990,7 +4725,7 @@ void issue_p2p_GO_confirm(_adapter *padapter, u8* raddr, u8 result) + struct wifidirect_info *pwdinfo = &( padapter->wdinfo); + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { +@@ -4011,8 +4746,8 @@ void issue_p2p_GO_confirm(_adapter *padapter, u8* raddr, u8 result) + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); + pmlmeext->mgnt_seq++; +@@ -4226,7 +4961,7 @@ void issue_p2p_GO_confirm(_adapter *padapter, u8* raddr, u8 result) + wfdielen = build_nego_confirm_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pattrib->pktlen += wfdielen; +-#endif //CONFIG_WFD ++#endif + + pattrib->last_txcmdsz = pattrib->pktlen; + +@@ -4250,7 +4985,7 @@ void issue_p2p_invitation_request(_adapter *padapter, u8* raddr ) + u16 len_channellist_attr = 0; + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + #ifdef CONFIG_CONCURRENT_MODE + _adapter *pbuddy_adapter = padapter->pbuddy_adapter; + struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; +@@ -4287,7 +5022,7 @@ void issue_p2p_invitation_request(_adapter *padapter, u8* raddr ) + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, raddr, ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -4374,7 +5109,7 @@ void issue_p2p_invitation_request(_adapter *padapter, u8* raddr ) + // Channel Number + p2pie[ p2pielen++ ] = pwdinfo->invitereq_info.operating_ch; // operating channel number + +- if ( _rtw_memcmp( myid( &padapter->eeprompriv ), pwdinfo->invitereq_info.go_bssid, ETH_ALEN ) ) ++ if (_rtw_memcmp(adapter_mac_addr(padapter), pwdinfo->invitereq_info.go_bssid, ETH_ALEN)) + { + // P2P Group BSSID + // Type: +@@ -4404,7 +5139,8 @@ void issue_p2p_invitation_request(_adapter *padapter, u8* raddr ) + + get_reg_classes_full_count(pmlmeext->channel_list); + + #ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ if (check_buddy_fwstate(padapter , _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); + } +@@ -4430,7 +5166,8 @@ void issue_p2p_invitation_request(_adapter *padapter, u8* raddr ) + + // Channel Entry List + #ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ if (check_buddy_fwstate(padapter, _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + _adapter *pbuddy_adapter = padapter->pbuddy_adapter; + struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +@@ -4524,7 +5261,7 @@ void issue_p2p_invitation_request(_adapter *padapter, u8* raddr ) + + // Value: + // P2P Device Address +- _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); + p2pielen += ETH_ALEN; + + // Config Method +@@ -4567,7 +5304,7 @@ void issue_p2p_invitation_request(_adapter *padapter, u8* raddr ) + wfdielen = build_invitation_req_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pattrib->pktlen += wfdielen; +-#endif //CONFIG_WFD ++#endif + + pattrib->last_txcmdsz = pattrib->pktlen; + +@@ -4596,7 +5333,7 @@ void issue_p2p_invitation_response(_adapter *padapter, u8* raddr, u8 dialogToken + #endif + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; +@@ -4627,7 +5364,7 @@ void issue_p2p_invitation_response(_adapter *padapter, u8* raddr, u8 dialogToken + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, raddr, ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -4732,7 +5469,7 @@ void issue_p2p_invitation_response(_adapter *padapter, u8* raddr, u8 dialogToken + + // Value: + // P2P Device Address for GO +- _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); + p2pielen += ETH_ALEN; + + } +@@ -4750,7 +5487,8 @@ void issue_p2p_invitation_response(_adapter *padapter, u8* raddr, u8 dialogToken + + get_reg_classes_full_count(pmlmeext->channel_list); + + #ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ if (check_buddy_fwstate(padapter, _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); + } +@@ -4776,7 +5514,8 @@ void issue_p2p_invitation_response(_adapter *padapter, u8* raddr, u8 dialogToken + + // Channel Entry List + #ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ if (check_buddy_fwstate(padapter , _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + _adapter *pbuddy_adapter = padapter->pbuddy_adapter; + struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +@@ -4846,7 +5585,7 @@ void issue_p2p_invitation_response(_adapter *padapter, u8* raddr, u8 dialogToken + wfdielen = build_invitation_resp_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pattrib->pktlen += wfdielen; +-#endif //CONFIG_WFD ++#endif + + pattrib->last_txcmdsz = pattrib->pktlen; + +@@ -4868,7 +5607,7 @@ void issue_p2p_provision_request(_adapter *padapter, u8* pssid, u8 ussidlen, u8* + u32 p2pielen = 0; + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; +@@ -4900,7 +5639,7 @@ void issue_p2p_provision_request(_adapter *padapter, u8* pssid, u8 ussidlen, u8* + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, pdev_raddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, pdev_raddr, ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -4958,7 +5697,7 @@ void issue_p2p_provision_request(_adapter *padapter, u8* pssid, u8 ussidlen, u8* + wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pattrib->pktlen += wfdielen; +-#endif //CONFIG_WFD ++#endif + + pattrib->last_txcmdsz = pattrib->pktlen; + +@@ -5011,7 +5750,7 @@ void issue_probersp_p2p(_adapter *padapter, unsigned char *da) + u32 wpsielen = 0, p2pielen = 0; + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + #ifdef CONFIG_INTEL_WIDI + u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 }; + #endif //CONFIG_INTEL_WIDI +@@ -5032,7 +5771,7 @@ void issue_probersp_p2p(_adapter *padapter, unsigned char *da) + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + +- mac = myid(&(padapter->eeprompriv)); ++ mac = adapter_mac_addr(padapter); + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; +@@ -5191,7 +5930,7 @@ void issue_probersp_p2p(_adapter *padapter, unsigned char *da) + // Value: + if (pwdinfo->external_uuid == 0) { + _rtw_memset( wpsie + wpsielen, 0x0, 16 ); +- _rtw_memcpy( wpsie + wpsielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(wpsie + wpsielen, mac, ETH_ALEN); + } else { + _rtw_memcpy( wpsie + wpsielen, pwdinfo->uuid, 0x10 ); + } +@@ -5306,24 +6045,10 @@ void issue_probersp_p2p(_adapter *padapter, unsigned char *da) + } + + #ifdef CONFIG_WFD +-#ifdef CONFIG_IOCTL_CFG80211 +- if ( _TRUE == pwdinfo->wfd_info->wfd_enable ) +-#endif //CONFIG_IOCTL_CFG80211 +- { +- wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe, 0); +- pframe += wfdielen; +- pattrib->pktlen += wfdielen; +- } +-#ifdef CONFIG_IOCTL_CFG80211 +- else if (pmlmepriv->wfd_probe_resp_ie != NULL && pmlmepriv->wfd_probe_resp_ie_len>0) +- { +- //WFD IE +- _rtw_memcpy(pframe, pmlmepriv->wfd_probe_resp_ie, pmlmepriv->wfd_probe_resp_ie_len); +- pattrib->pktlen += pmlmepriv->wfd_probe_resp_ie_len; +- pframe += pmlmepriv->wfd_probe_resp_ie_len; +- } +-#endif //CONFIG_IOCTL_CFG80211 +-#endif //CONFIG_WFD ++ wfdielen = rtw_append_probe_resp_wfd_ie(padapter, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif + + pattrib->last_txcmdsz = pattrib->pktlen; + +@@ -5354,7 +6079,7 @@ int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack) + u16 wpsielen = 0, p2pielen = 0; + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + +@@ -5374,7 +6099,7 @@ int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack) + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + +- mac = myid(&(padapter->eeprompriv)); ++ mac = adapter_mac_addr(padapter); + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; +@@ -5471,7 +6196,7 @@ int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack) + // Value: + if (pwdinfo->external_uuid == 0) { + _rtw_memset( wpsie + wpsielen, 0x0, 16 ); +- _rtw_memcpy( wpsie + wpsielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(wpsie + wpsielen, mac, ETH_ALEN); + } else { + _rtw_memcpy( wpsie + wpsielen, pwdinfo->uuid, 0x10 ); + } +@@ -5647,24 +6372,10 @@ int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack) + } + + #ifdef CONFIG_WFD +-#ifdef CONFIG_IOCTL_CFG80211 +- if ( _TRUE == pwdinfo->wfd_info->wfd_enable ) ++ wfdielen = rtw_append_probe_req_wfd_ie(padapter, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; + #endif +- { +- wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe); +- pframe += wfdielen; +- pattrib->pktlen += wfdielen; +- } +-#ifdef CONFIG_IOCTL_CFG80211 +- else if (pmlmepriv->wfd_probe_req_ie != NULL && pmlmepriv->wfd_probe_req_ie_len>0) +- { +- //WFD IE +- _rtw_memcpy(pframe, pmlmepriv->wfd_probe_req_ie, pmlmepriv->wfd_probe_req_ie_len); +- pattrib->pktlen += pmlmepriv->wfd_probe_req_ie_len; +- pframe += pmlmepriv->wfd_probe_req_ie_len; +- } +-#endif //CONFIG_IOCTL_CFG80211 +-#endif //CONFIG_WFD + + pattrib->last_txcmdsz = pattrib->pktlen; + +@@ -5686,6 +6397,11 @@ inline void issue_probereq_p2p(_adapter *adapter, u8 *da) + _issue_probereq_p2p(adapter, da, _FALSE); + } + ++/* ++ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT ++ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX ++ * try_cnt means the maximal TX count to try ++ */ + int issue_probereq_p2p_ex(_adapter *adapter, u8 *da, int try_cnt, int wait_ms) + { + int ret; +@@ -5698,7 +6414,7 @@ int issue_probereq_p2p_ex(_adapter *adapter, u8 *da, int try_cnt, int wait_ms) + + i++; + +- if (adapter->bDriverStopped || adapter->bSurpriseRemoved) ++ if (RTW_CANNOT_RUN(adapter)) + break; + + if(i < try_cnt && wait_ms > 0 && ret==_FAIL) +@@ -5729,36 +6445,27 @@ exit: + + #endif //CONFIG_P2P + +-s32 rtw_action_public_decache(union recv_frame *recv_frame, s32 token) ++s32 rtw_action_public_decache(union recv_frame *rframe, u8 token_offset) + { +- _adapter *adapter = recv_frame->u.hdr.adapter; ++ _adapter *adapter = rframe->u.hdr.adapter; + struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); +- u8 *frame = recv_frame->u.hdr.rx_data; +- u16 seq_ctrl = ( (recv_frame->u.hdr.attrib.seq_num&0xffff) << 4) | +- (recv_frame->u.hdr.attrib.frag_num & 0xf); +- ++ u8 *frame = rframe->u.hdr.rx_data; ++ u16 seq_ctrl = ((rframe->u.hdr.attrib.seq_num&0xffff) << 4) | (rframe->u.hdr.attrib.frag_num & 0xf); ++ u8 token = *(rframe->u.hdr.rx_data + sizeof(struct rtw_ieee80211_hdr_3addr) + token_offset); ++ + if (GetRetry(frame)) { +- if (token >= 0) { +- if ((seq_ctrl == mlmeext->action_public_rxseq) +- && (token == mlmeext->action_public_dialog_token)) +- { +- DBG_871X(FUNC_ADPT_FMT" seq_ctrl=0x%x, rxseq=0x%x, token:%d\n", +- FUNC_ADPT_ARG(adapter), seq_ctrl, mlmeext->action_public_rxseq, token); +- return _FAIL; +- } +- } else { +- if (seq_ctrl == mlmeext->action_public_rxseq) { +- DBG_871X(FUNC_ADPT_FMT" seq_ctrl=0x%x, rxseq=0x%x\n", +- FUNC_ADPT_ARG(adapter), seq_ctrl, mlmeext->action_public_rxseq); +- return _FAIL; +- } ++ if ((seq_ctrl == mlmeext->action_public_rxseq) ++ && (token == mlmeext->action_public_dialog_token) ++ ) { ++ DBG_871X(FUNC_ADPT_FMT" seq_ctrl=0x%x, rxseq=0x%x, token:%d\n", ++ FUNC_ADPT_ARG(adapter), seq_ctrl, mlmeext->action_public_rxseq, token); ++ return _FAIL; + } + } +- ++ ++ /* TODO: per sta seq & token */ + mlmeext->action_public_rxseq = seq_ctrl; +- +- if (token >= 0) +- mlmeext->action_public_dialog_token = token; ++ mlmeext->action_public_dialog_token = token; + + return _SUCCESS; + } +@@ -5769,7 +6476,6 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) + u8 *pframe = precv_frame->u.hdr.rx_data; + uint len = precv_frame->u.hdr.len; + u8 *frame_body; +- u8 dialogToken=0; + #ifdef CONFIG_P2P + u8 *p2p_ie; + u32 p2p_ielen, wps_ielen; +@@ -5782,11 +6488,6 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) + + frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); + +- dialogToken = frame_body[7]; +- +- if (rtw_action_public_decache(precv_frame, dialogToken) == _FAIL) +- return _FAIL; +- + #ifdef CONFIG_P2P + _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey ); + #ifdef CONFIG_IOCTL_CFG80211 +@@ -5978,7 +6679,7 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) + rtw_get_p2p_attr_content( merged_p2pie, merged_p2p_ielen, P2P_ATTR_GROUP_ID, ( u8* ) &group_id, &attr_contentlen); + if ( attr_contentlen ) + { +- if ( _rtw_memcmp( group_id.go_device_addr, myid( &padapter->eeprompriv ), ETH_ALEN ) ) ++ if (_rtw_memcmp(group_id.go_device_addr, adapter_mac_addr(padapter), ETH_ALEN)) + { + // The p2p device sending this p2p invitation request wants this Wi-Fi device to be the persistent GO. + rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_GO ); +@@ -6053,7 +6754,7 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) + rtw_get_p2p_attr_content( merged_p2pie, merged_p2p_ielen, P2P_ATTR_GROUP_ID, ( u8* ) &group_id, &attr_contentlen); + if ( attr_contentlen ) + { +- if ( _rtw_memcmp( group_id.go_device_addr, myid( &padapter->eeprompriv ), ETH_ALEN ) ) ++ if (_rtw_memcmp(group_id.go_device_addr, adapter_mac_addr(padapter), ETH_ALEN)) + { + // In this case, the GO can't be myself. + rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_DISMATCH ); +@@ -6119,14 +6820,11 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) + + if ( attr_content == P2P_STATUS_SUCCESS ) + { +- if ( _rtw_memcmp( pwdinfo->invitereq_info.go_bssid, myid( &padapter->eeprompriv ), ETH_ALEN )) +- { ++ if (_rtw_memcmp(pwdinfo->invitereq_info.go_bssid, adapter_mac_addr(padapter), ETH_ALEN)) + rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO ); +- } + else +- { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); +- } ++ + rtw_p2p_set_state( pwdinfo, P2P_STATE_RX_INVITE_RESP_OK ); + } + else +@@ -6220,9 +6918,16 @@ unsigned int on_action_public_vendor(union recv_frame *precv_frame) + u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); + + if (_rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE) { ++ if (rtw_action_public_decache(precv_frame, 7) == _FAIL) ++ goto exit; ++ ++ if (!hal_chk_wl_func(precv_frame->u.hdr.adapter, WL_FUNC_MIRACAST)) ++ rtw_rframe_del_wfd_ie(precv_frame, 8); ++ + ret = on_action_public_p2p(precv_frame); + } + ++exit: + return ret; + } + +@@ -6239,7 +6944,7 @@ unsigned int on_action_public_default(union recv_frame *precv_frame, u8 action) + + token = frame_body[2]; + +- if (rtw_action_public_decache(precv_frame, token) == _FAIL) ++ if (rtw_action_public_decache(precv_frame, 2) == _FAIL) + goto exit; + + #ifdef CONFIG_IOCTL_CFG80211 +@@ -6262,15 +6967,24 @@ unsigned int on_action_public(_adapter *padapter, union recv_frame *precv_frame) + u8 category, action; + + /* check RA matches or not */ +- if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN)) ++ if (!_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(pframe), ETH_ALEN)) + goto exit; + + category = frame_body[0]; +- if(category != RTW_WLAN_CATEGORY_PUBLIC) ++ if (category != RTW_WLAN_CATEGORY_PUBLIC) + goto exit; + + action = frame_body[1]; + switch (action) { ++ case ACT_PUBLIC_BSSCOEXIST: ++#ifdef CONFIG_80211N_HT ++#ifdef CONFIG_AP_MODE ++ /*20/40 BSS Coexistence Management frame is a Public Action frame*/ ++ if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) ++ rtw_process_public_act_bsscoex(padapter, pframe, frame_len); ++#endif /*CONFIG_AP_MODE*/ ++#endif /*CONFIG_80211N_HT*/ ++ break; + case ACT_PUBLIC_VENDOR: + ret = on_action_public_vendor(precv_frame); + break; +@@ -6291,20 +7005,28 @@ unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame) + u8 category, action; + + /* check RA matches or not */ +- if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN)) ++ if (!_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(pframe), ETH_ALEN)) + goto exit; + + category = frame_body[0]; +- if(category != RTW_WLAN_CATEGORY_HT) ++ if (category != RTW_WLAN_CATEGORY_HT) + goto exit; + + action = frame_body[1]; + switch (action) { ++ case RTW_WLAN_ACTION_HT_SM_PS: ++#ifdef CONFIG_80211N_HT ++#ifdef CONFIG_AP_MODE ++ if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) ++ rtw_process_ht_action_smps(padapter, GetAddr2Ptr(pframe), frame_body[2]); ++#endif /*CONFIG_AP_MODE*/ ++#endif /*CONFIG_80211N_HT*/ ++ break; + case RTW_WLAN_ACTION_HT_COMPRESS_BEAMFORMING: + #ifdef CONFIG_BEAMFORMING +- //DBG_871X("RTW_WLAN_ACTION_HT_COMPRESS_BEAMFORMING\n"); ++ /*DBG_871X("RTW_WLAN_ACTION_HT_COMPRESS_BEAMFORMING\n");*/ + beamforming_get_report_frame(padapter, precv_frame); +-#endif //CONFIG_BEAMFORMING ++#endif /*CONFIG_BEAMFORMING*/ + break; + default: + break; +@@ -6321,7 +7043,10 @@ unsigned int OnAction_sa_query(_adapter *padapter, union recv_frame *precv_frame + u8 *pframe = precv_frame->u.hdr.rx_data; + struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- unsigned short tid; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u16 tid; + //Baron + + DBG_871X("OnAction_sa_query\n"); +@@ -6329,14 +7054,19 @@ unsigned int OnAction_sa_query(_adapter *padapter, union recv_frame *precv_frame + switch (pframe[WLAN_HDR_A3_LEN+1]) + { + case 0: //SA Query req +- _rtw_memcpy(&tid, &pframe[WLAN_HDR_A3_LEN+2], sizeof(unsigned short)); +- DBG_871X("OnAction_sa_query request,action=%d, tid=%04x\n", pframe[WLAN_HDR_A3_LEN+1], tid); +- issue_action_SA_Query(padapter, GetAddr2Ptr(pframe), 1, tid); ++ _rtw_memcpy(&tid, &pframe[WLAN_HDR_A3_LEN+2], sizeof(u16)); ++ DBG_871X("OnAction_sa_query request,action=%d, tid=%04x, pframe=%02x-%02x\n" ++ , pframe[WLAN_HDR_A3_LEN+1], tid, pframe[WLAN_HDR_A3_LEN+2], pframe[WLAN_HDR_A3_LEN+3]); ++ issue_action_SA_Query(padapter, GetAddr2Ptr(pframe), 1, tid, IEEE80211W_RIGHT_KEY); + break; + + case 1: //SA Query rsp +- _cancel_timer_ex(&pmlmeext->sa_query_timer); +- DBG_871X("OnAction_sa_query response,action=%d, tid=%04x, cancel timer\n", pframe[WLAN_HDR_A3_LEN+1], pframe[WLAN_HDR_A3_LEN+2]); ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ if (psta != NULL) ++ _cancel_timer_ex(&psta->dot11w_expire_timer); ++ ++ _rtw_memcpy(&tid, &pframe[WLAN_HDR_A3_LEN+2], sizeof(u16)); ++ DBG_871X("OnAction_sa_query response,action=%d, tid=%04x, cancel timer\n", pframe[WLAN_HDR_A3_LEN+1], tid); + break; + default: + break; +@@ -6365,12 +7095,13 @@ unsigned int OnAction_vht(_adapter *padapter, union recv_frame *precv_frame) + struct rx_pkt_attrib *prxattrib = &precv_frame->u.hdr.attrib; + u8 *pframe = precv_frame->u.hdr.rx_data; + uint frame_len = precv_frame->u.hdr.len; ++ struct rtw_ieee80211_hdr_3addr *whdr = (struct rtw_ieee80211_hdr_3addr *)pframe; + u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); + u8 category, action; + struct sta_info *psta = NULL; + + /* check RA matches or not */ +- if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN)) ++ if (!_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(pframe), ETH_ALEN)) + goto exit; + + category = frame_body[0]; +@@ -6381,14 +7112,14 @@ unsigned int OnAction_vht(_adapter *padapter, union recv_frame *precv_frame) + switch (action) { + case RTW_WLAN_ACTION_VHT_COMPRESSED_BEAMFORMING: + #ifdef CONFIG_BEAMFORMING +- //DBG_871X("RTW_WLAN_ACTION_VHT_COMPRESSED_BEAMFORMING\n"); ++ /*DBG_871X("RTW_WLAN_ACTION_VHT_COMPRESSED_BEAMFORMING\n");*/ + beamforming_get_report_frame(padapter, precv_frame); +-#endif //CONFIG_BEAMFORMING ++#endif /*CONFIG_BEAMFORMING*/ + break; + case RTW_WLAN_ACTION_VHT_OPMODE_NOTIFICATION: + // CategoryCode(1) + ActionCode(1) + OpModeNotification(1) + //DBG_871X("RTW_WLAN_ACTION_VHT_OPMODE_NOTIFICATION\n"); +- psta = rtw_get_stainfo(&padapter->stapriv, prxattrib->ta); ++ psta = rtw_get_stainfo(&padapter->stapriv, whdr->addr2); + if (psta) + rtw_process_vht_op_mode_notify(padapter, &frame_body[2], psta); + break; +@@ -6412,7 +7143,7 @@ unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame) + struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); + + //check RA matches or not +- if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode ++ if (!_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(pframe), ETH_ALEN)) + return _SUCCESS; + + frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); +@@ -6425,8 +7156,9 @@ unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame) + return _SUCCESS; + + #ifdef CONFIG_IOCTL_CFG80211 +- if(adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) +- { ++ if (adapter_wdev_data(padapter)->p2p_enabled ++ && pwdinfo->driver_interface == DRIVER_CFG80211 ++ ) { + rtw_cfg80211_rx_action_p2p(padapter, pframe, len); + return _SUCCESS; + } +@@ -6557,17 +7289,30 @@ void update_mgnt_tx_rate(_adapter *padapter, u8 rate) + //DBG_871X("%s(): rate = %x\n",__FUNCTION__, rate); + } + +-void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib) ++ ++void update_monitor_frame_attrib(_adapter *padapter, struct pkt_attrib *pattrib) + { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 wireless_mode; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct xmit_priv *pxmitpriv = &padapter->xmitpriv; +- //_rtw_memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib)); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *pbcmc_sta = NULL; ++ ++ psta = rtw_get_stainfo(pstapriv, pattrib->ra); ++ pbcmc_sta = rtw_get_bcmc_stainfo(padapter); + + pattrib->hdrlen = 24; + pattrib->nr_frags = 1; + pattrib->priority = 7; +- pattrib->mac_id = 0; ++ ++ if (pbcmc_sta) ++ pattrib->mac_id = pbcmc_sta->mac_id; ++ else { ++ pattrib->mac_id = 0; ++ DBG_871X("mgmt use mac_id 0 will affect RA\n"); ++ } + pattrib->qsel = QSLT_MGNT; + + pattrib->pktlen = 0; +@@ -6576,14 +7321,30 @@ void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib) + wireless_mode = WIRELESS_11B; + else + wireless_mode = WIRELESS_11G; +- pattrib->raid = rtw_get_mgntframe_raid(padapter, wireless_mode); +- pattrib->rate = pmlmeext->tx_rate; ++ ++ pattrib->raid = rtw_get_mgntframe_raid(padapter, wireless_mode); ++ #ifdef CONFIG_80211AC_VHT ++ if (pHalData->rf_type == RF_1T1R) ++ pattrib->raid = RATEID_IDX_VHT_1SS; ++ else if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_2T4R) ++ pattrib->raid = RATEID_IDX_VHT_2SS; ++ else if (pHalData->rf_type == RF_3T3R) ++ pattrib->raid = RATEID_IDX_VHT_3SS; ++ else ++ pattrib->raid = RATEID_IDX_BGN_40M_1SS; ++ #endif ++ ++ #ifdef CONFIG_80211AC_VHT ++ pattrib->rate = MGN_VHT1SS_MCS9; ++ #else ++ pattrib->rate = MGN_MCS7; ++ #endif + + pattrib->encrypt = _NO_PRIVACY_; +- pattrib->bswenc = _FALSE; ++ pattrib->bswenc = _FALSE; + + pattrib->qos_en = _FALSE; +- pattrib->ht_en = _FALSE; ++ pattrib->ht_en = 1; + pattrib->bwmode = CHANNEL_WIDTH_20; + pattrib->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + pattrib->sgi = _FALSE; +@@ -6597,8 +7358,66 @@ void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib) + + } + +-void update_mgntframe_attrib_addr(_adapter *padapter, struct xmit_frame *pmgntframe) +-{ ++ ++void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib) ++{ ++ u8 wireless_mode; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *pbcmc_sta = NULL; ++ //_rtw_memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib)); ++ ++ pbcmc_sta = rtw_get_bcmc_stainfo(padapter); ++ ++ pattrib->hdrlen = 24; ++ pattrib->nr_frags = 1; ++ pattrib->priority = 7; ++ ++ if (pbcmc_sta) ++ pattrib->mac_id = pbcmc_sta->mac_id; ++ else { ++ pattrib->mac_id = 0; ++ DBG_871X("mgmt use mac_id 0 will affect RA\n"); ++ } ++ pattrib->qsel = QSLT_MGNT; ++ ++ pattrib->pktlen = 0; ++ ++ if (pmlmeext->tx_rate == IEEE80211_CCK_RATE_1MB) ++ wireless_mode = WIRELESS_11B; ++ else ++ wireless_mode = WIRELESS_11G; ++ pattrib->raid = rtw_get_mgntframe_raid(padapter, wireless_mode); ++ pattrib->rate = pmlmeext->tx_rate; ++ ++ pattrib->encrypt = _NO_PRIVACY_; ++ pattrib->bswenc = _FALSE; ++ ++ pattrib->qos_en = _FALSE; ++ pattrib->ht_en = _FALSE; ++ pattrib->bwmode = CHANNEL_WIDTH_20; ++ pattrib->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ pattrib->sgi = _FALSE; ++ ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ ++ pattrib->retry_ctrl = _TRUE; ++ ++ pattrib->mbssid = 0; ++ pattrib->hw_ssn_sel = pxmitpriv->hw_ssn_seq_no; ++ ++ #ifdef CONFIG_BEAMFORMING ++ psta = rtw_get_stainfo(pstapriv, pattrib->ra); ++ if (psta) ++ update_attrib_txbf_info(padapter, pattrib, psta); ++ #endif ++ ++} ++ ++void update_mgntframe_attrib_addr(_adapter *padapter, struct xmit_frame *pmgntframe) ++{ + u8 *pframe; + struct pkt_attrib *pattrib = &pmgntframe->attrib; + +@@ -6610,9 +7429,7 @@ void update_mgntframe_attrib_addr(_adapter *padapter, struct xmit_frame *pmgntfr + + void dump_mgntframe(_adapter *padapter, struct xmit_frame *pmgntframe) + { +- if(padapter->bSurpriseRemoved == _TRUE || +- padapter->bDriverStopped == _TRUE) +- { ++ if (RTW_CANNOT_RUN(padapter)) { + rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); + rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); + return; +@@ -6629,9 +7446,7 @@ s32 dump_mgntframe_and_wait(_adapter *padapter, struct xmit_frame *pmgntframe, i + struct xmit_buf *pxmitbuf = pmgntframe->pxmitbuf; + struct submit_ctx sctx; + +- if(padapter->bSurpriseRemoved == _TRUE || +- padapter->bDriverStopped == _TRUE) +- { ++ if (RTW_CANNOT_RUN(padapter)) { + rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); + rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); + return ret; +@@ -6652,21 +7467,18 @@ s32 dump_mgntframe_and_wait(_adapter *padapter, struct xmit_frame *pmgntframe, i + return ret; + } + +-s32 dump_mgntframe_and_wait_ack(_adapter *padapter, struct xmit_frame *pmgntframe) ++s32 dump_mgntframe_and_wait_ack_timeout(_adapter *padapter, struct xmit_frame *pmgntframe, int timeout_ms) + { + #ifdef CONFIG_XMIT_ACK + static u8 seq_no = 0; + s32 ret = _FAIL; +- u32 timeout_ms = 500;// 500ms + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + #ifdef CONFIG_CONCURRENT_MODE + if (padapter->pbuddy_adapter && !padapter->isprimary) + pxmitpriv = &(padapter->pbuddy_adapter->xmitpriv); + #endif + +- if(padapter->bSurpriseRemoved == _TRUE || +- padapter->bDriverStopped == _TRUE) +- { ++ if (RTW_CANNOT_RUN(padapter)) { + rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); + rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); + return -1; +@@ -6676,21 +7488,33 @@ s32 dump_mgntframe_and_wait_ack(_adapter *padapter, struct xmit_frame *pmgntfram + pxmitpriv->ack_tx = _TRUE; + pxmitpriv->seq_no = seq_no++; + pmgntframe->ack_report = 1; ++ rtw_sctx_init(&(pxmitpriv->ack_tx_ops), timeout_ms); + if (rtw_hal_mgnt_xmit(padapter, pmgntframe) == _SUCCESS) { +- ret = rtw_ack_tx_wait(pxmitpriv, timeout_ms); ++#ifdef CONFIG_XMIT_ACK_POLLING ++ ret = rtw_ack_tx_polling(pxmitpriv, timeout_ms); ++#else ++ ret = rtw_sctx_wait(&(pxmitpriv->ack_tx_ops), __func__); ++#endif + } + + pxmitpriv->ack_tx = _FALSE; + _exit_critical_mutex(&pxmitpriv->ack_tx_mutex, NULL); + + return ret; +-#else //!CONFIG_XMIT_ACK ++#else /* !CONFIG_XMIT_ACK */ + dump_mgntframe(padapter, pmgntframe); + rtw_msleep_os(50); + return _SUCCESS; +-#endif //!CONFIG_XMIT_ACK ++#endif /* !CONFIG_XMIT_ACK */ + } + ++s32 dump_mgntframe_and_wait_ack(_adapter *padapter, struct xmit_frame *pmgntframe) ++{ ++ /* In this case, use 500 ms as the default wait_ack timeout */ ++ return dump_mgntframe_and_wait_ack_timeout(padapter, pmgntframe, 500); ++} ++ ++ + int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode) + { + u8 *ssid_ie; +@@ -6785,7 +7609,7 @@ void issue_beacon(_adapter *padapter, int timeout_ms) + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); +@@ -6947,27 +7771,12 @@ void issue_beacon(_adapter *padapter, int timeout_ms) + + pframe += len; + pattrib->pktlen += len; +-#ifdef CONFIG_WFD +-#ifdef CONFIG_IOCTL_CFG80211 +- if(_TRUE == pwdinfo->wfd_info->wfd_enable) +-#endif //CONFIG_IOCTL_CFG80211 +- { +- len = build_beacon_wfd_ie( pwdinfo, pframe ); +- } +-#ifdef CONFIG_IOCTL_CFG80211 +- else +- { +- len = 0; +- if(pmlmepriv->wfd_beacon_ie && pmlmepriv->wfd_beacon_ie_len>0) +- { +- len = pmlmepriv->wfd_beacon_ie_len; +- _rtw_memcpy(pframe, pmlmepriv->wfd_beacon_ie, len); +- } +- } +-#endif //CONFIG_IOCTL_CFG80211 ++ ++ #ifdef CONFIG_WFD ++ len = rtw_append_beacon_wfd_ie(padapter, pframe); + pframe += len; + pattrib->pktlen += len; +-#endif //CONFIG_WFD ++ #endif + } + #endif //CONFIG_P2P + +@@ -7074,7 +7883,7 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe + struct wifidirect_info *pwdinfo = &(padapter->wdinfo); + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + #endif //CONFIG_P2P + + //DBG_871X("%s\n", __FUNCTION__); +@@ -7082,6 +7891,9 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe + if(da == NULL) + return; + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ return; ++ + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + DBG_871X("%s, alloc mgnt frame fail\n", __FUNCTION__); +@@ -7098,7 +7910,7 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + +- mac = myid(&(padapter->eeprompriv)); ++ mac = adapter_mac_addr(padapter); + bssid = cur_network->MacAddress; + + fctrl = &(pwlanhdr->frame_ctl); +@@ -7278,28 +8090,11 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe + pframe += len; + pattrib->pktlen += len; + +-#ifdef CONFIG_WFD +-#ifdef CONFIG_IOCTL_CFG80211 +- if(_TRUE == pwdinfo->wfd_info->wfd_enable) +-#endif //CONFIG_IOCTL_CFG80211 +- { +- len = build_probe_resp_wfd_ie(pwdinfo, pframe, 0); +- } +-#ifdef CONFIG_IOCTL_CFG80211 +- else +- { +- len = 0; +- if(pmlmepriv->wfd_probe_resp_ie && pmlmepriv->wfd_probe_resp_ie_len>0) +- { +- len = pmlmepriv->wfd_probe_resp_ie_len; +- _rtw_memcpy(pframe, pmlmepriv->wfd_probe_resp_ie, len); +- } +- } +-#endif //CONFIG_IOCTL_CFG80211 ++ #ifdef CONFIG_WFD ++ len = rtw_append_probe_resp_wfd_ie(padapter, pframe); + pframe += len; + pattrib->pktlen += len; +-#endif //CONFIG_WFD +- ++ #endif + } + #endif //CONFIG_P2P + +@@ -7361,7 +8156,8 @@ int _issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch, + int bssrate_len = 0; + u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + +- RT_TRACE(_module_rtl871x_mlme_c_,_drv_notice_,("+issue_probereq\n")); ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ goto exit; + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { +@@ -7378,7 +8174,7 @@ int _issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch, + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + +- mac = myid(&(padapter->eeprompriv)); ++ mac = adapter_mac_addr(padapter); + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; +@@ -7456,20 +8252,28 @@ inline void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da) + _issue_probereq(padapter, pssid, da, 0, 1, _FALSE); + } + ++/* ++ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT ++ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX ++ * try_cnt means the maximal TX count to try ++ */ + int issue_probereq_ex(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch, bool append_wps, + int try_cnt, int wait_ms) + { +- int ret; ++ int ret = _FAIL; + int i = 0; + u32 start = rtw_get_current_time(); + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ goto exit; ++ + do + { + ret = _issue_probereq(padapter, pssid, da, ch, append_wps, wait_ms>0?_TRUE:_FALSE); + + i++; + +- if (padapter->bDriverStopped || padapter->bSurpriseRemoved) ++ if (RTW_CANNOT_RUN(padapter)) + break; + + if(i < try_cnt && wait_ms > 0 && ret==_FAIL) +@@ -7513,6 +8317,9 @@ void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ return; ++ + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + return; +@@ -7543,8 +8350,8 @@ void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status + #ifdef CONFIG_NATIVEAP_MLME + + _rtw_memcpy(pwlanhdr->addr1, psta->hwaddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + + + // setting auth algo number +@@ -7580,7 +8387,7 @@ void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status + else + { + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); + + // setting auth algo number +@@ -7651,7 +8458,7 @@ void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *p + struct rtw_ieee80211_hdr *pwlanhdr; + struct pkt_attrib *pattrib; + unsigned char *pbuf, *pframe; +- unsigned short val; ++ unsigned short val, ie_status; + unsigned short *fctrl; + struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +@@ -7663,10 +8470,13 @@ void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *p + struct wifidirect_info *pwdinfo = &(padapter->wdinfo); + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + + #endif //CONFIG_P2P + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ return; ++ + DBG_871X("%s\n", __FUNCTION__); + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +@@ -7688,7 +8498,7 @@ void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *p + *(fctrl) = 0; + + _rtw_memcpy((void *)GetAddr1Ptr(pwlanhdr), pstat->hwaddr, ETH_ALEN); +- _rtw_memcpy((void *)GetAddr2Ptr(pwlanhdr), myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy((void *)GetAddr2Ptr(pwlanhdr), adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy((void *)GetAddr3Ptr(pwlanhdr), get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + +@@ -7708,8 +8518,8 @@ void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *p + + pframe = rtw_set_fixed_ie(pframe, _CAPABILITY_ , (unsigned char *)&val, &(pattrib->pktlen)); + +- status = cpu_to_le16(status); +- pframe = rtw_set_fixed_ie(pframe , _STATUS_CODE_ , (unsigned char *)&status, &(pattrib->pktlen)); ++ ie_status = cpu_to_le16(status); ++ pframe = rtw_set_fixed_ie(pframe , _STATUS_CODE_ , (unsigned char *)&ie_status, &(pattrib->pktlen)); + + val = cpu_to_le16(pstat->aid | BIT(14) | BIT(15)); + pframe = rtw_set_fixed_ie(pframe, _ASOC_ID_ , (unsigned char *)&val, &(pattrib->pktlen)); +@@ -7724,6 +8534,18 @@ void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *p + pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (pstat->bssratelen-8), pstat->bssrateset+8, &(pattrib->pktlen)); + } + ++#ifdef CONFIG_IEEE80211W ++ if (status == _STATS_REFUSED_TEMPORARILY_) { ++ u8 timeout_itvl[5]; ++ u32 timeout_interval = 3000; ++ /* Association Comeback time */ ++ timeout_itvl[0] = 0x03; ++ timeout_interval = cpu_to_le32(timeout_interval); ++ _rtw_memcpy(timeout_itvl+1, &timeout_interval, 4); ++ pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); ++ } ++#endif /* CONFIG_IEEE80211W */ ++ + #ifdef CONFIG_80211N_HT + if ((pstat->flags & WLAN_STA_HT) && (pmlmepriv->htpriv.ht_option)) + { +@@ -7752,8 +8574,22 @@ void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *p + } + #endif + ++ /*adding EXT_CAPAB_IE */ ++ if (pmlmepriv->ext_capab_ie_len > 0) { ++ uint ie_len = 0; ++ ++ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_CAP_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if (pbuf && ie_len > 0) { ++ _rtw_memcpy(pframe, pbuf, ie_len+2); ++ pframe += (ie_len+2); ++ pattrib->pktlen += (ie_len+2); ++ } ++ } ++ + #ifdef CONFIG_80211AC_VHT +- if ((pstat->flags & WLAN_STA_VHT) && (pmlmepriv->vhtpriv.vht_option)) ++ if ((pstat->flags & WLAN_STA_VHT) && (pmlmepriv->vhtpriv.vht_option) ++ && (pstat->wpa_pairwise_cipher != WPA_CIPHER_TKIP) ++ && (pstat->wpa2_pairwise_cipher != WPA_CIPHER_TKIP)) + { + u32 ie_len=0; + +@@ -7819,31 +8655,31 @@ void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *p + } + + #ifdef CONFIG_P2P +- if( padapter->wdinfo.driver_interface == DRIVER_WEXT ) +- { +- if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && (pstat->is_p2p_device == _TRUE)) +- { +- u32 len; ++ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && (pstat->is_p2p_device == _TRUE)) { ++ u32 len; + ++ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) { ++ len = 0; ++ if (pmlmepriv->p2p_assoc_resp_ie && pmlmepriv->p2p_assoc_resp_ie_len > 0) { ++ len = pmlmepriv->p2p_assoc_resp_ie_len; ++ _rtw_memcpy(pframe, pmlmepriv->p2p_assoc_resp_ie, len); ++ } ++ } else { + len = build_assoc_resp_p2p_ie(pwdinfo, pframe, pstat->p2p_status_code); +- +- pframe += len; +- pattrib->pktlen += len; + } ++ pframe += len; ++ pattrib->pktlen += len; + } +-#ifdef CONFIG_WFD +- if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) +-#ifdef CONFIG_IOCTL_CFG80211 +- && (_TRUE == pwdinfo->wfd_info->wfd_enable) +-#endif //CONFIG_IOCTL_CFG80211 +- ) +- { +- wfdielen = build_assoc_resp_wfd_ie(pwdinfo, pframe); ++ ++ #ifdef CONFIG_WFD ++ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { ++ wfdielen = rtw_append_assoc_resp_wfd_ie(padapter, pframe); + pframe += wfdielen; + pattrib->pktlen += wfdielen; + } +-#endif //CONFIG_WFD +-#endif //CONFIG_P2P ++ #endif ++ ++#endif /* CONFIG_P2P */ + + pattrib->last_txcmdsz = pattrib->pktlen; + +@@ -7877,7 +8713,7 @@ void issue_assocreq(_adapter *padapter) + u16 p2pielen = 0; + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + #endif //CONFIG_P2P + + #ifdef CONFIG_DFS +@@ -7888,6 +8724,9 @@ void issue_assocreq(_adapter *padapter) + u8 sup_ch[ 30 * 2 ] = {0x00 }, sup_ch_idx = 0, idx_5g = 2; //For supported channel + #endif //CONFIG_DFS + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ goto exit; ++ + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + goto exit; + +@@ -7904,7 +8743,7 @@ void issue_assocreq(_adapter *padapter) + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -8036,13 +8875,16 @@ void issue_assocreq(_adapter *padapter) + } + + +- if (bssrate_len > 8) { ++ if (bssrate_len > 8) ++ { + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); +- } else if (bssrate_len > 0) { ++ } ++ else if (bssrate_len > 0) ++ { + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); + } else { +- DBG_871X("%s: Connect to AP without 11b and 11g data rate!\n", __FUNCTION__); ++ DBG_871X("%s: Connect to AP without 11b and 11g data rate!\n",__FUNCTION__); + } + + //vendor specific IE, such as WPA, WMM, WPS +@@ -8206,7 +9048,7 @@ void issue_assocreq(_adapter *padapter) + + // Value: + // P2P Device Address +- _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); + p2pielen += ETH_ALEN; + + // Config Method +@@ -8270,36 +9112,16 @@ void issue_assocreq(_adapter *padapter) + p2pielen += ETH_ALEN; + + pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); +- +-#ifdef CONFIG_WFD +- //wfdielen = build_assoc_req_wfd_ie(pwdinfo, pframe); +- //pframe += wfdielen; +- //pattrib->pktlen += wfdielen; +-#endif //CONFIG_WFD + } + } + + #endif //CONFIG_P2P + + #ifdef CONFIG_WFD +-#ifdef CONFIG_IOCTL_CFG80211 +- if ( _TRUE == pwdinfo->wfd_info->wfd_enable ) +-#endif //CONFIG_IOCTL_CFG80211 +- { +- wfdielen = build_assoc_req_wfd_ie(pwdinfo, pframe); +- pframe += wfdielen; +- pattrib->pktlen += wfdielen; +- } +-#ifdef CONFIG_IOCTL_CFG80211 +- else if (pmlmepriv->wfd_assoc_req_ie != NULL && pmlmepriv->wfd_assoc_req_ie_len>0) +- { +- //WFD IE +- _rtw_memcpy(pframe, pmlmepriv->wfd_assoc_req_ie, pmlmepriv->wfd_assoc_req_ie_len); +- pattrib->pktlen += pmlmepriv->wfd_assoc_req_ie_len; +- pframe += pmlmepriv->wfd_assoc_req_ie_len; +- } +-#endif //CONFIG_IOCTL_CFG80211 +-#endif //CONFIG_WFD ++ wfdielen = rtw_append_assoc_req_wfd_ie(padapter, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif + + pattrib->last_txcmdsz = pattrib->pktlen; + dump_mgntframe(padapter, pmgntframe); +@@ -8333,6 +9155,9 @@ static int _issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int p + if(!padapter) + goto exit; + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ goto exit; ++ + pxmitpriv = &(padapter->xmitpriv); + pmlmeext = &(padapter->mlmeextpriv); + pmlmeinfo = &(pmlmeext->mlmext_info); +@@ -8370,7 +9195,7 @@ static int _issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int p + } + + _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -8399,18 +9224,23 @@ exit: + /* + * [IMPORTANT] Don't call this function in interrupt context + * +- * When wait_ms > 0, this function shoule be called at process context ++ * When wait_ms > 0, this function should be called at process context ++ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT ++ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX ++ * try_cnt means the maximal TX count to try + * da == NULL for station mode + */ + int issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms) + { +- int ret; ++ int ret = _FAIL; + int i = 0; + u32 start = rtw_get_current_time(); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct sta_info *psta; + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ goto exit; + + /* da == NULL, assum it's null data for sta to ap*/ + if (da == NULL) +@@ -8433,7 +9263,7 @@ int issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int power_mod + + i++; + +- if (padapter->bDriverStopped || padapter->bSurpriseRemoved) ++ if (RTW_CANNOT_RUN(padapter)) + break; + + if(i < try_cnt && wait_ms > 0 && ret==_FAIL) +@@ -8500,6 +9330,9 @@ static int _issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, i + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ goto exit; ++ + DBG_871X("%s\n", __FUNCTION__); + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +@@ -8546,7 +9379,7 @@ static int _issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, i + SetAckpolicy(qc, pattrib->ack_policy); + + _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -8572,16 +9405,24 @@ exit: + return ret; + } + +-//when wait_ms >0 , this function shoule be called at process context +-//da == NULL for station mode ++/* ++ * when wait_ms >0 , this function should be called at process context ++ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT ++ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX ++ * try_cnt means the maximal TX count to try ++ * da == NULL for station mode ++ */ + int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, int try_cnt, int wait_ms) + { +- int ret; ++ int ret = _FAIL; + int i = 0; + u32 start = rtw_get_current_time(); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ goto exit; ++ + /* da == NULL, assum it's null data for sta to ap*/ + if (da == NULL) + da = get_my_bssid(&(pmlmeinfo->network)); +@@ -8592,7 +9433,7 @@ int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, int try_c + + i++; + +- if (padapter->bDriverStopped || padapter->bSurpriseRemoved) ++ if (RTW_CANNOT_RUN(padapter)) + break; + + if(i < try_cnt && wait_ms > 0 && ret==_FAIL) +@@ -8621,7 +9462,7 @@ exit: + return ret; + } + +-static int _issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason, u8 wait_ack) ++static int _issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason, u8 wait_ack, u8 key_type) + { + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; +@@ -8646,6 +9487,9 @@ static int _issue_deauth(_adapter *padapter, unsigned char *da, unsigned short r + } + #endif //CONFIG_P2P + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ goto exit; ++ + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + goto exit; +@@ -8655,7 +9499,7 @@ static int _issue_deauth(_adapter *padapter, unsigned char *da, unsigned short r + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + pattrib->retry_ctrl = _FALSE; +- ++ pattrib->key_type = key_type; + _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); + + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; +@@ -8665,7 +9509,7 @@ static int _issue_deauth(_adapter *padapter, unsigned char *da, unsigned short r + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -8698,23 +9542,39 @@ exit: + int issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason) + { + DBG_871X("%s to "MAC_FMT"\n", __func__, MAC_ARG(da)); +- return _issue_deauth(padapter, da, reason, _FALSE); ++ return _issue_deauth(padapter, da, reason, _FALSE, IEEE80211W_RIGHT_KEY); ++} ++ ++#ifdef CONFIG_IEEE80211W ++int issue_deauth_11w(_adapter *padapter, unsigned char *da, unsigned short reason, u8 key_type) ++{ ++ DBG_871X("%s to "MAC_FMT"\n", __func__, MAC_ARG(da)); ++ return _issue_deauth(padapter, da, reason, _FALSE, key_type); + } ++#endif /* CONFIG_IEEE80211W */ + ++/* ++ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT ++ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX ++ * try_cnt means the maximal TX count to try ++ */ + int issue_deauth_ex(_adapter *padapter, u8 *da, unsigned short reason, int try_cnt, + int wait_ms) + { +- int ret; ++ int ret = _FAIL; + int i = 0; + u32 start = rtw_get_current_time(); + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ goto exit; ++ + do + { +- ret = _issue_deauth(padapter, da, reason, wait_ms>0?_TRUE:_FALSE); ++ ret = _issue_deauth(padapter, da, reason, wait_ms > 0 ? _TRUE:_FALSE, IEEE80211W_RIGHT_KEY); + + i++; + +- if (padapter->bDriverStopped || padapter->bSurpriseRemoved) ++ if (RTW_CANNOT_RUN(padapter)) + break; + + if(i < try_cnt && wait_ms > 0 && ret==_FAIL) +@@ -8757,6 +9617,8 @@ void issue_action_spct_ch_switch(_adapter *padapter, u8 *ra, u8 new_ch, u8 ch_of + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ return; + + DBG_871X(FUNC_NDEV_FMT" ra="MAC_FMT", ch:%u, offset:%u\n", + FUNC_NDEV_ARG(padapter->pnetdev), MAC_ARG(ra), new_ch, ch_offset); +@@ -8777,7 +9639,7 @@ void issue_action_spct_ch_switch(_adapter *padapter, u8 *ra, u8 new_ch, u8 ch_of + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); /* RA */ +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); /* TA */ ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); /* TA */ + _rtw_memcpy(pwlanhdr->addr3, ra, ETH_ALEN); /* DA = RA */ + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -8808,7 +9670,7 @@ void issue_action_spct_ch_switch(_adapter *padapter, u8 *ra, u8 new_ch, u8 ch_of + } + + #ifdef CONFIG_IEEE80211W +-void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short tid) ++void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short tid, u8 key_type) + { + u8 category = RTW_WLAN_CATEGORY_SA_QUERY; + u16 reason_code; +@@ -8823,9 +9685,12 @@ void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned ch + struct sta_info *psta; + struct sta_priv *pstapriv = &padapter->stapriv; + struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ return; + +- DBG_871X("%s\n", __FUNCTION__); ++ DBG_871X("%s, %04x\n", __FUNCTION__, tid); + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { +@@ -8836,7 +9701,7 @@ void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned ch + //update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); +- ++ pattrib->key_type = key_type; + _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); + + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; +@@ -8849,7 +9714,7 @@ void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned ch + _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); + else + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -8867,12 +9732,19 @@ void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned ch + case 0: //SA Query req + pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&pmlmeext->sa_query_seq, &pattrib->pktlen); + pmlmeext->sa_query_seq++; +- //send sa query request to AP, AP should reply sa query response in 1 second +- set_sa_query_timer(pmlmeext, 1000); ++ /* send sa query request to AP, AP should reply sa query response in 1 second */ ++ if (pattrib->key_type == IEEE80211W_RIGHT_KEY) { ++ psta = rtw_get_stainfo(pstapriv, raddr); ++ if (psta != NULL) { ++ /* DBG_871X("%s, %d, set dot11w_expire_timer\n", __func__, __LINE__); */ ++ _set_timer(&psta->dot11w_expire_timer, 1000); ++ } ++ } + break; + + case 1: //SA Query rsp + tid = cpu_to_le16(tid); ++ /* DBG_871X("rtw_set_fixed_ie, %04x\n", tid); */ + pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&tid, &pattrib->pktlen); + break; + default: +@@ -8885,16 +9757,30 @@ void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned ch + } + #endif //CONFIG_IEEE80211W + +-void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short status) ++/** ++ * issue_action_ba - internal function to TX Block Ack action frame ++ * @padapter: the adapter to TX ++ * @raddr: receiver address ++ * @action: Block Ack Action ++ * @tid: tid ++ * @size: the announced AMPDU buffer size. used by ADDBA_RESP ++ * @status: status/reason code. used by ADDBA_RESP, DELBA ++ * @initiator: if we are the initiator of AMPDU association. used by DELBA ++ * @wait_ack: used xmit ack ++ * ++ * Returns: ++ * _SUCCESS: No xmit ack is used or acked ++ * _FAIL: not acked when using xmit ack ++ */ ++static int issue_action_ba(_adapter *padapter, unsigned char *raddr, unsigned char action ++ , u8 tid, u8 size, u16 status, u8 initiator, int wait_ack) + { ++ int ret = _FAIL; + u8 category = RTW_WLAN_CATEGORY_BACK; + u16 start_seq; + u16 BA_para_set; +- u16 reason_code; + u16 BA_timeout_value; + u16 BA_starting_seqctrl; +- HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor; +- u8 ba_rxbuf_sz; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + u8 *pframe; +@@ -8909,10 +9795,11 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act + + #ifdef CONFIG_80211N_HT + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ goto exit; ++ + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- return; +- } ++ goto exit; + + //update attribute + pattrib = &pmgntframe->attrib; +@@ -8928,7 +9815,7 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act + + //_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -8941,23 +9828,20 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act + pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); + +- status = cpu_to_le16(status); +- +- + if (category == 3) + { + switch (action) + { +- case 0: //ADDBA req ++ case RTW_WLAN_ACTION_ADDBA_REQ: + do { + pmlmeinfo->dialogToken++; + } while (pmlmeinfo->dialogToken == 0); + pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen)); + + #if defined(CONFIG_RTL8188E) && defined(CONFIG_SDIO_HCI) +- BA_para_set = (0x0802 | ((status & 0xf) << 2)); //immediate ack & 16 buffer size ++ BA_para_set = (0x0802 | ((tid & 0xf) << 2)); /* immediate ack & 16 buffer size */ + #else +- BA_para_set = (0x1002 | ((status & 0xf) << 2)); //immediate ack & 64 buffer size ++ BA_para_set = (0x1002 | ((tid & 0xf) << 2)); /* immediate ack & 64 buffer size */ + #endif + + BA_para_set = cpu_to_le16(BA_para_set); +@@ -8971,55 +9855,31 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act + //if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) + if ((psta = rtw_get_stainfo(pstapriv, raddr)) != NULL) + { +- start_seq = (psta->sta_xmitpriv.txseq_tid[status & 0x07]&0xfff) + 1; ++ start_seq = (psta->sta_xmitpriv.txseq_tid[tid & 0x07]&0xfff) + 1; + +- DBG_871X("BA_starting_seqctrl = %d for TID=%d\n", start_seq, status & 0x07); ++ DBG_871X("BA_starting_seqctrl = %d for TID=%d\n", start_seq, tid & 0x07); + +- psta->BA_starting_seqctrl[status & 0x07] = start_seq; ++ psta->BA_starting_seqctrl[tid & 0x07] = start_seq; + + BA_starting_seqctrl = start_seq << 4; + } + + BA_starting_seqctrl = cpu_to_le16(BA_starting_seqctrl); + pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_starting_seqctrl)), &(pattrib->pktlen)); +- DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status); + break; + +- case 1: //ADDBA rsp ++ case RTW_WLAN_ACTION_ADDBA_RESP: + pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->ADDBA_req.dialog_token), &(pattrib->pktlen)); ++ status = cpu_to_le16(status); + pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&status), &(pattrib->pktlen)); + + BA_para_set = le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set); + +- if(padapter->driver_rx_ampdu_factor != 0xFF) +- max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)padapter->driver_rx_ampdu_factor; +- else +- rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); +- +- if(MAX_AMPDU_FACTOR_64K == max_rx_ampdu_factor) +- ba_rxbuf_sz = 64; +- else if(MAX_AMPDU_FACTOR_32K == max_rx_ampdu_factor) +- ba_rxbuf_sz = 32; +- else if(MAX_AMPDU_FACTOR_16K == max_rx_ampdu_factor) +- ba_rxbuf_sz = 16; +- else if(MAX_AMPDU_FACTOR_8K == max_rx_ampdu_factor) +- ba_rxbuf_sz = 8; +- else +- ba_rxbuf_sz = 64; +- +- #ifdef CONFIG_BT_COEXIST +- if (rtw_btcoex_IsBTCoexCtrlAMPDUSize(padapter) == _TRUE) +- ba_rxbuf_sz = rtw_btcoex_GetAMPDUSize(padapter); +- #endif +- +- if (padapter->fix_ba_rxbuf_bz != 0xFF) +- ba_rxbuf_sz = padapter->fix_ba_rxbuf_bz; +- +- if (ba_rxbuf_sz > 127) +- ba_rxbuf_sz = 127; ++ BA_para_set &= ~IEEE80211_ADDBA_PARAM_TID_MASK; ++ BA_para_set |= (tid << 2) & IEEE80211_ADDBA_PARAM_TID_MASK; + + BA_para_set &= ~RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; +- BA_para_set |= (ba_rxbuf_sz << 6) & RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; ++ BA_para_set |= (size << 6) & RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; + + if (!padapter->registrypriv.wifi_spec) { + if(pregpriv->ampdu_amsdu==0)//disabled +@@ -9032,17 +9892,17 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act + + pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(pmlmeinfo->ADDBA_req.BA_timeout_value)), &(pattrib->pktlen)); +- DBG_871X("%s, category=%d, action=%d, status=%d, rxbuf_sz=%u\n", __FUNCTION__, category, action, status, ba_rxbuf_sz); + break; +- case 2://DELBA +- BA_para_set = (status & 0x1F) << 3; ++ ++ case RTW_WLAN_ACTION_DELBA: ++ BA_para_set = 0; ++ BA_para_set |= (tid << 12) & IEEE80211_DELBA_PARAM_TID_MASK; ++ BA_para_set |= (initiator << 11) & IEEE80211_DELBA_PARAM_INITIATOR_MASK; ++ + BA_para_set = cpu_to_le16(BA_para_set); + pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); +- +- reason_code = 37;//Requested from peer STA as it does not want to use the mechanism +- reason_code = cpu_to_le16(reason_code); +- pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(reason_code)), &(pattrib->pktlen)); +- DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status); ++ status = cpu_to_le16(status); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(status)), &(pattrib->pktlen)); + break; + default: + break; +@@ -9051,43 +9911,227 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act + + pattrib->last_txcmdsz = pattrib->pktlen; + +- dump_mgntframe(padapter, pmgntframe); ++ if (wait_ack) { ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ } else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++exit: + #endif //CONFIG_80211N_HT ++ return ret; + } + +-static void issue_action_BSSCoexistPacket(_adapter *padapter) +-{ +- _irqL irqL; +- _list *plist, *phead; +- unsigned char category, action; +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- unsigned char *pframe; +- struct rtw_ieee80211_hdr *pwlanhdr; +- unsigned short *fctrl; +- struct wlan_network *pnetwork = NULL; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- _queue *queue = &(pmlmepriv->scanned_queue); +- u8 InfoContent[16] = {0}; +- u8 ICS[8][15]; +-#ifdef CONFIG_80211N_HT +- if((pmlmepriv->num_FortyMHzIntolerant==0) || (pmlmepriv->num_sta_no_ht==0)) +- return; +- +- if(_TRUE == pmlmeinfo->bwmode_updated) +- return; +- +- +- DBG_871X("%s\n", __FUNCTION__); +- ++/** ++ * issue_addba_req - TX ADDBA_REQ ++ * @adapter: the adapter to TX ++ * @ra: receiver address ++ * @tid: tid ++ */ ++inline void issue_addba_req(_adapter *adapter, unsigned char *ra, u8 tid) ++{ ++ issue_action_ba(adapter, ra, RTW_WLAN_ACTION_ADDBA_REQ ++ , tid ++ , 0 /* unused */ ++ , 0 /* unused */ ++ , 0 /* unused */ ++ , _FALSE ++ ); ++ DBG_871X(FUNC_ADPT_FMT" ra="MAC_FMT" tid=%u\n" ++ , FUNC_ADPT_ARG(adapter), MAC_ARG(ra), tid); + +- category = RTW_WLAN_CATEGORY_PUBLIC; +- action = ACT_PUBLIC_BSSCOEXIST; ++} + +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++/** ++ * issue_addba_rsp - TX ADDBA_RESP ++ * @adapter: the adapter to TX ++ * @ra: receiver address ++ * @tid: tid ++ * @status: status code ++ * @size: the announced AMPDU buffer size ++ */ ++inline void issue_addba_rsp(_adapter *adapter, unsigned char *ra, u8 tid, u16 status, u8 size) ++{ ++ issue_action_ba(adapter, ra, RTW_WLAN_ACTION_ADDBA_RESP ++ , tid ++ , size ++ , status ++ , 0 /* unused */ ++ , _FALSE ++ ); ++ DBG_871X(FUNC_ADPT_FMT" ra="MAC_FMT" status=%u, tid=%u, size=%u\n" ++ , FUNC_ADPT_ARG(adapter), MAC_ARG(ra), status, tid, size); ++} ++ ++/** ++ * issue_addba_rsp_wait_ack - TX ADDBA_RESP and wait ack ++ * @adapter: the adapter to TX ++ * @ra: receiver address ++ * @tid: tid ++ * @status: status code ++ * @size: the announced AMPDU buffer size ++ * @try_cnt: the maximal TX count to try ++ * @wait_ms: == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT ++ * > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX ++ */ ++inline u8 issue_addba_rsp_wait_ack(_adapter *adapter, unsigned char *ra, u8 tid, u16 status, u8 size, int try_cnt, int wait_ms) ++{ ++ int ret = _FAIL; ++ int i = 0; ++ u32 start = rtw_get_current_time(); ++ ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(adapter))) ++ goto exit; ++ ++ do { ++ ret = issue_action_ba(adapter, ra, RTW_WLAN_ACTION_ADDBA_RESP ++ , tid ++ , size ++ , status ++ , 0 /* unused */ ++ , _TRUE ++ ); ++ ++ i++; ++ ++ if (RTW_CANNOT_RUN(adapter)) ++ break; ++ ++ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) ++ rtw_msleep_os(wait_ms); ++ ++ } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); ++ ++ if (ret != _FAIL) { ++ ret = _SUCCESS; ++ #ifndef DBG_XMIT_ACK ++ /* goto exit; */ ++ #endif ++ } ++ ++ if (try_cnt && wait_ms) { ++ DBG_871X(FUNC_ADPT_FMT" ra="MAC_FMT" tid=%u%s, %d/%d in %u ms\n" ++ , FUNC_ADPT_ARG(adapter), MAC_ARG(ra), tid ++ , ret == _SUCCESS?", acked":"", i, try_cnt, rtw_get_passing_time_ms(start)); ++ } ++ ++exit: ++ return ret; ++} ++ ++/** ++ * issue_del_ba - TX DELBA ++ * @adapter: the adapter to TX ++ * @ra: receiver address ++ * @tid: tid ++ * @reason: reason code ++ * @initiator: if we are the initiator of AMPDU association. used by DELBA ++ */ ++inline void issue_del_ba(_adapter *adapter, unsigned char *ra, u8 tid, u16 reason, u8 initiator) ++{ ++ issue_action_ba(adapter, ra, RTW_WLAN_ACTION_DELBA ++ , tid ++ , 0 /* unused */ ++ , reason ++ , initiator ++ , _FALSE ++ ); ++ DBG_871X(FUNC_ADPT_FMT" ra="MAC_FMT" reason=%u, tid=%u, initiator=%u\n" ++ , FUNC_ADPT_ARG(adapter), MAC_ARG(ra), reason, tid, initiator); ++} ++ ++/** ++ * issue_del_ba_ex - TX DELBA with xmit ack options ++ * @adapter: the adapter to TX ++ * @ra: receiver address ++ * @tid: tid ++ * @reason: reason code ++ * @initiator: if we are the initiator of AMPDU association. used by DELBA ++ * @try_cnt: the maximal TX count to try ++ * @wait_ms: == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT ++ * > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX ++ */ ++int issue_del_ba_ex(_adapter *adapter, unsigned char *ra, u8 tid, u16 reason, u8 initiator ++ , int try_cnt, int wait_ms) ++{ ++ int ret = _FAIL; ++ int i = 0; ++ u32 start = rtw_get_current_time(); ++ ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(adapter))) ++ goto exit; ++ ++ do { ++ ret = issue_action_ba(adapter, ra, RTW_WLAN_ACTION_DELBA ++ , tid ++ , 0 /* unused */ ++ , reason ++ , initiator ++ , wait_ms > 0?_TRUE:_FALSE ++ ); ++ ++ i++; ++ ++ if (RTW_CANNOT_RUN(adapter)) ++ break; ++ ++ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) ++ rtw_msleep_os(wait_ms); ++ ++ } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); ++ ++ if (ret != _FAIL) { ++ ret = _SUCCESS; ++ #ifndef DBG_XMIT_ACK ++ /* goto exit; */ ++ #endif ++ } ++ ++ if (try_cnt && wait_ms) { ++ DBG_871X(FUNC_ADPT_FMT" ra="MAC_FMT" reason=%u, tid=%u, initiator=%u%s, %d/%d in %u ms\n" ++ , FUNC_ADPT_ARG(adapter), MAC_ARG(ra), reason, tid, initiator ++ , ret == _SUCCESS?", acked":"", i, try_cnt, rtw_get_passing_time_ms(start)); ++ } ++exit: ++ return ret; ++} ++ ++static void issue_action_BSSCoexistPacket(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ unsigned char category, action; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct wlan_network *pnetwork = NULL; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ u8 InfoContent[16] = {0}; ++ u8 ICS[8][15]; ++#ifdef CONFIG_80211N_HT ++ if((pmlmepriv->num_FortyMHzIntolerant==0) || (pmlmepriv->num_sta_no_ht==0)) ++ return; ++ ++ if(_TRUE == pmlmeinfo->bwmode_updated) ++ return; ++ ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ return; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ ++ category = RTW_WLAN_CATEGORY_PUBLIC; ++ action = ACT_PUBLIC_BSSCOEXIST; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + return; + } +@@ -9105,7 +10149,7 @@ static void issue_action_BSSCoexistPacket(_adapter *padapter) + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -9217,8 +10261,8 @@ static void issue_action_BSSCoexistPacket(_adapter *padapter) + int _issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoPsMode , u8 wait_ack) + { + +- int ret=0; +- unsigned char category = RTW_WLAN_CATEGORY_HT; ++ int ret = _FAIL; ++ unsigned char category = RTW_WLAN_CATEGORY_HT; + u8 action = RTW_WLAN_ACTION_HT_SM_PS; + u8 sm_power_control=0; + struct xmit_frame *pmgntframe; +@@ -9248,6 +10292,9 @@ int _issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoP + else + return ret; + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ return ret; ++ + DBG_871X("%s, sm_power_control=%u, NewMimoPsMode=%u\n", __FUNCTION__ , sm_power_control , NewMimoPsMode ); + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +@@ -9266,7 +10313,7 @@ int _issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoP + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); /* RA */ +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); /* TA */ ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); /* TA */ + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); /* DA = RA */ + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +@@ -9300,18 +10347,26 @@ int _issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoP + return ret; + } + ++/* ++ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT ++ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX ++ * try_cnt means the maximal TX count to try ++ */ + int issue_action_SM_PS_wait_ack(_adapter *padapter, unsigned char *raddr, u8 NewMimoPsMode, int try_cnt, int wait_ms) + { +- int ret = 0; ++ int ret = _FAIL; + int i = 0; + u32 start = rtw_get_current_time(); + ++ if (rtw_rfctl_is_tx_blocked_by_cac(adapter_to_rfctl(padapter))) ++ goto exit; ++ + do { + ret = _issue_action_SM_PS(padapter, raddr, NewMimoPsMode , wait_ms>0?_TRUE:_FALSE ); + + i++; + +- if (padapter->bDriverStopped || padapter->bSurpriseRemoved) ++ if (RTW_CANNOT_RUN(padapter)) + break; + + if(i < try_cnt && wait_ms > 0 && ret==_FAIL) +@@ -9347,62 +10402,101 @@ int issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoPs + return _issue_action_SM_PS(padapter, raddr, NewMimoPsMode , _FALSE ); + } + ++/** ++ * _send_delba_sta_tid - Cancel the AMPDU association for the specific @sta, @tid ++ * @adapter: the adapter to which @sta belongs ++ * @initiator: if we are the initiator of AMPDU association ++ * @sta: the sta to be checked ++ * @tid: the tid to be checked ++ * @force: cancel and send DELBA even when no AMPDU association is setup ++ * @wait_ack: send delba with xmit ack (valid when initiator == 0) ++ * ++ * Returns: ++ * _FAIL if sta is NULL ++ * when initiator is 1, always _SUCCESS ++ * when initiator is 0, _SUCCESS if DELBA is acked ++ */ ++static unsigned int _send_delba_sta_tid(_adapter *adapter, u8 initiator, struct sta_info *sta, u8 tid ++ , u8 force, int wait_ack) ++{ ++ int ret = _SUCCESS; ++ ++ if (sta == NULL) { ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ if (initiator == 0) { ++ /* recipient */ ++ if (force || sta->recvreorder_ctrl[tid].enable == _TRUE) { ++ u8 ampdu_size_bak = sta->recvreorder_ctrl[tid].ampdu_size; ++ ++ sta->recvreorder_ctrl[tid].enable = _FALSE; ++ sta->recvreorder_ctrl[tid].ampdu_size = RX_AMPDU_SIZE_INVALID; ++ ++ if (rtw_del_rx_ampdu_test_trigger_no_tx_fail()) ++ ret = _FAIL; ++ else if (wait_ack) ++ ret = issue_del_ba_ex(adapter, sta->hwaddr, tid, 37, initiator, 3, 1); ++ else ++ issue_del_ba(adapter, sta->hwaddr, tid, 37, initiator); ++ ++ if (ret == _FAIL && sta->recvreorder_ctrl[tid].enable == _FALSE) ++ sta->recvreorder_ctrl[tid].ampdu_size = ampdu_size_bak; ++ } ++ } else if (initiator == 1) { ++ /* originator */ ++#ifdef CONFIG_80211N_HT ++ if (force || sta->htpriv.agg_enable_bitmap & BIT(tid)) { ++ sta->htpriv.agg_enable_bitmap &= ~BIT(tid); ++ sta->htpriv.candidate_tid_bitmap &= ~BIT(tid); ++ issue_del_ba(adapter, sta->hwaddr, tid, 37, initiator); ++ } ++#endif ++ } ++ ++exit: ++ return ret; ++} ++ ++inline unsigned int send_delba_sta_tid(_adapter *adapter, u8 initiator, struct sta_info *sta, u8 tid ++ , u8 force) ++{ ++ return _send_delba_sta_tid(adapter, initiator, sta, tid, force, 0); ++} ++ ++inline unsigned int send_delba_sta_tid_wait_ack(_adapter *adapter, u8 initiator, struct sta_info *sta, u8 tid ++ , u8 force) ++{ ++ return _send_delba_sta_tid(adapter, initiator, sta, tid, force, 1); ++} ++ + unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr) + { + struct sta_priv *pstapriv = &padapter->stapriv; + struct sta_info *psta = NULL; +- //struct recv_reorder_ctrl *preorder_ctrl; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u16 tid; + +- if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ if ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) + if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) + return _SUCCESS; +- ++ + psta = rtw_get_stainfo(pstapriv, addr); + if(psta==NULL) + return _SUCCESS; + +- //DBG_871X("%s:%s\n", __FUNCTION__, (initiator==0)?"RX_DIR":"TX_DIR"); +- +- if(initiator==0) // recipient +- { +- for(tid = 0;tidrecvreorder_ctrl[tid].enable == _TRUE) +- { +- DBG_871X("rx agg disable tid(%d)\n",tid); +- issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid <<1) |initiator)&0x1F)); +- psta->recvreorder_ctrl[tid].enable = _FALSE; +- psta->recvreorder_ctrl[tid].indicate_seq = 0xffff; +- #ifdef DBG_RX_SEQ +- DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, +- psta->recvreorder_ctrl[tid].indicate_seq); +- #endif +- } +- } +- } +- else if(initiator == 1)// originator +- { +-#ifdef CONFIG_80211N_HT +- //DBG_871X("tx agg_enable_bitmap(0x%08x)\n", psta->htpriv.agg_enable_bitmap); +- for(tid = 0;tidhtpriv.agg_enable_bitmap & BIT(tid)) +- { +- DBG_871X("tx agg disable tid(%d)\n",tid); +- issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid <<1) |initiator)&0x1F) ); +- psta->htpriv.agg_enable_bitmap &= ~BIT(tid); +- psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); +- +- } +- } +-#endif //CONFIG_80211N_HT +- } +- ++ #if 0 ++ DBG_871X("%s:%s\n", __func__, (initiator == 0)?"RX_DIR":"TX_DIR"); ++ if (initiator == 1) /* originator */ ++ DBG_871X("tx agg_enable_bitmap(0x%08x)\n", psta->htpriv.agg_enable_bitmap); ++ #endif ++ ++ for (tid = 0; tid < TID_NUM; tid++) ++ send_delba_sta_tid(padapter, initiator, psta, tid, 0); ++ + return _SUCCESS; +- + } + + unsigned int send_beacon(_adapter *padapter) +@@ -9410,6 +10504,9 @@ unsigned int send_beacon(_adapter *padapter) + u8 bxmitok = _FALSE; + int issue=0; + int poll = 0; ++#if defined(CONFIG_PCI_HCI) && defined(RTL8814AE_SW_BCN) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++#endif + //#ifdef CONFIG_CONCURRENT_MODE + //struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + //struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +@@ -9427,6 +10524,12 @@ unsigned int send_beacon(_adapter *padapter) + + issue_beacon(padapter, 0); + ++#ifdef RTL8814AE_SW_BCN ++ if (pHalData->bCorrectBCN != 0) ++ DBG_871X("%s, line%d, Warnning, pHalData->bCorrectBCN != 0\n", __func__, __LINE__); ++ pHalData->bCorrectBCN = 1; ++#endif ++ + return _SUCCESS; + #endif + +@@ -9442,14 +10545,12 @@ unsigned int send_beacon(_adapter *padapter) + rtw_yield_os(); + rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bxmitok)); + poll++; +- }while((poll%10)!=0 && _FALSE == bxmitok && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); ++ } while ((poll%10) != 0 && _FALSE == bxmitok && !RTW_CANNOT_RUN(padapter)); + +- }while(_FALSE == bxmitok && issue<100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); ++ } while (_FALSE == bxmitok && issue < 100 && !RTW_CANNOT_RUN(padapter)); + +- if(padapter->bSurpriseRemoved || padapter->bDriverStopped) +- { ++ if (RTW_CANNOT_RUN(padapter)) + return _FAIL; +- } + + + if(_FALSE == bxmitok) +@@ -9466,6 +10567,8 @@ unsigned int send_beacon(_adapter *padapter) + //else + // DBG_871X("%s success, issue:%d, poll:%d, %u ms\n", __FUNCTION__, issue, poll, rtw_get_passing_time_ms(start)); + ++ rtw_hal_fw_correct_bcn(padapter); ++ + return _SUCCESS; + } + +@@ -9495,507 +10598,86 @@ BOOLEAN IsLegal5GChannel( + return _FALSE; + } + +-void site_survey(_adapter *padapter) ++//collect bss info from Beacon and Probe request/response frames. ++u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid) + { +- unsigned char survey_channel = 0, val8; +- RT_SCAN_TYPE ScanType = SCAN_PASSIVE; ++ int i; ++ u32 len; ++ u8 *p; ++ u16 val16, subtype; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ u32 packet_len = precv_frame->u.hdr.len; ++ u8 ie_offset; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- u32 initialgain = 0; +- u32 channel_scan_time_ms = 0,val32 = 0; + +-#ifdef CONFIG_P2P ++ len = packet_len - sizeof(struct rtw_ieee80211_hdr_3addr); + +-#ifdef CONFIG_CONCURRENT_MODE ++ if (len > MAX_IE_SZ) ++ { ++ //DBG_871X("IE too long for survey event\n"); ++ return _FAIL; ++ } + +-#if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH) +- u8 stay_buddy_ch = 0; +-#endif +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; +- struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ _rtw_memset(bssid, 0, sizeof(WLAN_BSSID_EX)); + +-#endif //CONFIG_CONCURRENT_MODE +- struct wifidirect_info *pwdinfo= &(padapter->wdinfo); +- static unsigned char prev_survey_channel = 0; +- static unsigned int p2p_scan_count = 0; +- +- if ( ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) || ( pwdinfo->p2p_info.scan_op_ch_only ) ) +- { +- if ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) +- { +- survey_channel = pwdinfo->rx_invitereq_info.operation_ch[pmlmeext->sitesurvey_res.channel_idx]; ++ subtype = GetFrameSubType(pframe); ++ ++ if(subtype==WIFI_BEACON) { ++ bssid->Reserved[0] = 1; ++ ie_offset = _BEACON_IE_OFFSET_; ++ } else { ++ // FIXME : more type ++ if (subtype == WIFI_PROBERSP) { ++ ie_offset = _PROBERSP_IE_OFFSET_; ++ bssid->Reserved[0] = 3; + } +- else +- { +- survey_channel = pwdinfo->p2p_info.operation_ch[pmlmeext->sitesurvey_res.channel_idx]; ++ else if (subtype == WIFI_PROBEREQ) { ++ ie_offset = _PROBEREQ_IE_OFFSET_; ++ bssid->Reserved[0] = 2; ++ } ++ else { ++ bssid->Reserved[0] = 0; ++ ie_offset = _FIXED_IE_LENGTH_; + } +- ScanType = SCAN_ACTIVE; + } +- else if(rtw_p2p_findphase_ex_is_social(pwdinfo)) ++ ++ bssid->Length = sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + len; ++ ++ //below is to copy the information element ++ bssid->IELength = len; ++ _rtw_memcpy(bssid->IEs, (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)), bssid->IELength); ++ ++ //get the signal strength ++ //bssid->Rssi = precv_frame->u.hdr.attrib.SignalStrength; // 0-100 index. ++ bssid->Rssi = precv_frame->u.hdr.attrib.phy_info.RecvSignalPower; // in dBM.raw data ++ bssid->PhyInfo.SignalQuality = precv_frame->u.hdr.attrib.phy_info.SignalQuality;//in percentage ++ bssid->PhyInfo.SignalStrength = precv_frame->u.hdr.attrib.phy_info.SignalStrength;//in percentage ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ rtw_hal_get_odm_var(padapter, HAL_ODM_ANTDIV_SELECT, &(bssid->PhyInfo.Optimum_antenna), NULL); ++#endif ++ ++ // checking SSID ++ if ((p = rtw_get_ie(bssid->IEs + ie_offset, _SSID_IE_, &len, bssid->IELength - ie_offset)) == NULL) + { +- // Commented by Albert 2011/06/03 +- // The driver is in the find phase, it should go through the social channel. +- int ch_set_idx; +- survey_channel = pwdinfo->social_chan[pmlmeext->sitesurvey_res.channel_idx]; +- ch_set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, survey_channel); +- if (ch_set_idx >= 0) +- ScanType = pmlmeext->channel_set[ch_set_idx].ScanType; +- else +- ScanType = SCAN_ACTIVE; ++ DBG_871X("marc: cannot find SSID for survey event\n"); ++ return _FAIL; + } +- else +-#endif //CONFIG_P2P ++ ++ if (*(p + 1)) + { +- struct rtw_ieee80211_channel *ch; +- if (pmlmeext->sitesurvey_res.channel_idx < pmlmeext->sitesurvey_res.ch_num) { +- ch = &pmlmeext->sitesurvey_res.ch[pmlmeext->sitesurvey_res.channel_idx]; +- survey_channel = ch->hw_value; +- ScanType = (ch->flags & RTW_IEEE80211_CHAN_PASSIVE_SCAN) ? SCAN_PASSIVE : SCAN_ACTIVE; ++ if (len > NDIS_802_11_LENGTH_SSID) ++ { ++ DBG_871X("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); ++ return _FAIL; + } ++ _rtw_memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1)); ++ bssid->Ssid.SsidLength = *(p + 1); + } +- +- if (0){ +-#ifdef CONFIG_P2P +- DBG_871X(FUNC_ADPT_FMT" ch:%u (cnt:%u,idx:%d) at %dms, %c%c%c\n" +- , FUNC_ADPT_ARG(padapter) +- , survey_channel +- , pwdinfo->find_phase_state_exchange_cnt, pmlmeext->sitesurvey_res.channel_idx +- , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) +- , ScanType?'A':'P', pmlmeext->sitesurvey_res.scan_mode?'A':'P' +- , pmlmeext->sitesurvey_res.ssid[0].SsidLength?'S':' ' +- ); +-#else +- DBG_871X(FUNC_ADPT_FMT" ch:%u (cnt:%u) at %dms, %c%c%c\n" +- , FUNC_ADPT_ARG(padapter) +- , survey_channel +- , pmlmeext->sitesurvey_res.channel_idx +- , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) +- , ScanType?'A':'P', pmlmeext->sitesurvey_res.scan_mode?'A':'P' +- , pmlmeext->sitesurvey_res.ssid[0].SsidLength?'S':' ' +- ); +-#endif // CONFIG_P2P +- #ifdef DBG_FIXED_CHAN +- DBG_871X(FUNC_ADPT_FMT" fixed_chan:%u\n", pmlmeext->fixed_chan); +- #endif +- } +- +- if(survey_channel != 0) +- { +- //PAUSE 4-AC Queue when site_survey +- //rtw_hal_get_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); +- //val8 |= 0x0f; +- //rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); +-#if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH) +- if((padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state&0x03) == WIFI_FW_AP_STATE) +- { +- if( pmlmeinfo->scan_cnt == RTW_SCAN_NUM_OF_CH ) +- { +- pmlmeinfo->scan_cnt = 0; +- survey_channel = pbuddy_mlmeext->cur_channel; +- stay_buddy_ch = 1; +- } +- else +- { +- if( pmlmeinfo->scan_cnt == 0 ) +- stay_buddy_ch = 2; +- pmlmeinfo->scan_cnt++; +- } +- } +-#endif +- if(pmlmeext->sitesurvey_res.channel_idx == 0) +- { +-#ifdef DBG_FIXED_CHAN +- if(pmlmeext->fixed_chan !=0xff) +- set_channel_bwmode(padapter, pmlmeext->fixed_chan, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); +- else +-#endif +- set_channel_bwmode(padapter, survey_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); +- } +- else +- { +-#ifdef DBG_FIXED_CHAN +- if(pmlmeext->fixed_chan!=0xff) +- SelectChannel(padapter, pmlmeext->fixed_chan); +- else +-#endif +- SelectChannel(padapter, survey_channel); +- } +- +-#if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH) +- if( stay_buddy_ch == 1 ) +- { +- val8 = 0; //survey done +- rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); +- +- if(check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && +- check_buddy_fwstate(padapter, _FW_LINKED)) +- { +- update_beacon(padapter->pbuddy_adapter, 0, NULL, _TRUE); +- } +- } +- else if( stay_buddy_ch == 2 ) +- { +- val8 = 1; //under site survey +- rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); +- } +-#endif +- +- if(ScanType == SCAN_ACTIVE) //obey the channel plan setting... +- { +- #ifdef CONFIG_P2P +- if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || +- rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) +- ) +- { +- issue_probereq_p2p(padapter, NULL); +- issue_probereq_p2p(padapter, NULL); +- issue_probereq_p2p(padapter, NULL); +- } +- else +- #endif //CONFIG_P2P +- { +- int i; +- for(i=0;isitesurvey_res.ssid[i].SsidLength) { +- /* IOT issue, When wifi_spec is not set, send one probe req without WPS IE. */ +- if (padapter->registrypriv.wifi_spec) +- issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL); +- else +- issue_probereq_ex(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL, 0, 0, 0, 0); +- issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL); +- } +- } +- +- if(pmlmeext->sitesurvey_res.scan_mode == SCAN_ACTIVE) { +- /* IOT issue, When wifi_spec is not set, send one probe req without WPS IE. */ +- if (padapter->registrypriv.wifi_spec) +- issue_probereq(padapter, NULL, NULL); +- else +- issue_probereq_ex(padapter, NULL, NULL, 0, 0, 0, 0); +- issue_probereq(padapter, NULL, NULL); +- } +- } +- } +- +-#if defined(CONFIG_ATMEL_RC_PATCH) +- // treat wlan0 & p2p0 in same way, may be changed in near feature. +- // assume home channel is 6, channel switch sequence will be +- // 1,2-6-3,4-6-5,6-6-7,8-6-9,10-6-11,12-6-13,14 +- //if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)==_TRUE) +- +- if( stay_buddy_ch == 1 ){ +- channel_scan_time_ms = pmlmeext->chan_scan_time * RTW_STAY_AP_CH_MILLISECOND; +- } +- else { +- if( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) +- channel_scan_time_ms = 20; +- else +- channel_scan_time_ms = 40 +- } +-#elif defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) +- if( stay_buddy_ch == 1 ) +- channel_scan_time_ms = pmlmeext->chan_scan_time * RTW_STAY_AP_CH_MILLISECOND ; +- else +- channel_scan_time_ms = pmlmeext->chan_scan_time; +-#else +- channel_scan_time_ms = pmlmeext->chan_scan_time; +-#endif +- +- set_survey_timer(pmlmeext, channel_scan_time_ms); +-#if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) +- { +- struct noise_info info; +- info.bPauseDIG = _FALSE; +- info.IGIValue = 0; +- info.max_time = channel_scan_time_ms/2;//ms +- info.chan = survey_channel; +- rtw_hal_set_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&info, _FALSE); +- } +-#endif +- +- } +- else +- { +- +- // channel number is 0 or this channel is not valid. +- +-#ifdef CONFIG_CONCURRENT_MODE +- u8 cur_channel; +- u8 cur_bwmode; +- u8 cur_ch_offset; +- +- if (rtw_get_ch_setting_union(padapter, &cur_channel, &cur_bwmode, &cur_ch_offset) != 0) +- { +- if (0) +- DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", +- FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); +- } +- #ifdef CONFIG_IOCTL_CFG80211 +- else if(padapter->pbuddy_adapter +- && pbuddy_adapter->wdinfo.driver_interface == DRIVER_CFG80211 +- && adapter_wdev_data(pbuddy_adapter)->p2p_enabled +- && rtw_p2p_chk_state(&pbuddy_adapter->wdinfo, P2P_STATE_LISTEN) +- ) +- { +- cur_channel = pbuddy_adapter->wdinfo.listen_channel; +- cur_bwmode = pbuddy_mlmeext->cur_bwmode; +- cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; +- } +- #endif +- else +- { +- cur_channel = pmlmeext->cur_channel; +- cur_bwmode = pmlmeext->cur_bwmode; +- cur_ch_offset = pmlmeext->cur_ch_offset; +- } +-#endif +- +- +-#ifdef CONFIG_P2P +- if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)) +- { +- if( ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) || ( pwdinfo->p2p_info.scan_op_ch_only ) ) +- { +- // Set the find_phase_state_exchange_cnt to P2P_FINDPHASE_EX_CNT. +- // This will let the following flow to run the scanning end. +- rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_MAX); +- } +- #ifdef CONFIG_DBG_P2P +- DBG_871X( "[%s] find phase exchange cnt = %d\n", __FUNCTION__, pwdinfo->find_phase_state_exchange_cnt ); +- #endif +- } +- +- if(rtw_p2p_findphase_ex_is_needed(pwdinfo)) +- { +- // Set the P2P State to the listen state of find phase and set the current channel to the listen channel +- set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); +- rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_LISTEN); +- pmlmeext->sitesurvey_res.state = SCAN_DISABLE; +- +- //turn on phy-dynamic functions +- Restore_DM_Func_Flag(padapter); +- //Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); +- +- initialgain = 0xff; //restore RX GAIN +- rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); +- +- _set_timer( &pwdinfo->find_phase_timer, ( u32 ) ( ( u32 ) ( pwdinfo->listen_dwell ) * 100 ) ); +- } +- else +-#endif //CONFIG_P2P +- { +- +-#if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH) +- pmlmeinfo->scan_cnt = 0; +-#endif +- +-#ifdef CONFIG_ANTENNA_DIVERSITY +- // 20100721:Interrupt scan operation here. +- // For SW antenna diversity before link, it needs to switch to another antenna and scan again. +- // It compares the scan result and select beter one to do connection. +- if(rtw_hal_antdiv_before_linked(padapter)) +- { +- pmlmeext->sitesurvey_res.bss_cnt = 0; +- pmlmeext->sitesurvey_res.channel_idx = -1; +- pmlmeext->chan_scan_time = SURVEY_TO /2; +- set_survey_timer(pmlmeext, pmlmeext->chan_scan_time); +- return; +- } +-#endif +- +-#ifdef CONFIG_P2P +- if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)) +- { +- #ifdef CONFIG_CONCURRENT_MODE +- if( pwdinfo->driver_interface == DRIVER_WEXT ) +- { +- if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) +- { +- _set_timer( &pwdinfo->ap_p2p_switch_timer, 500 ); +- } +- } +- rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); +- #else +- rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); +- #endif +- } +- rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); +-#endif //CONFIG_P2P +- +- pmlmeext->sitesurvey_res.state = SCAN_COMPLETE; +- +- //switch back to the original channel +- //SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset); +- +- { +-#ifdef CONFIG_CONCURRENT_MODE +- set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); +-#else +-#ifdef CONFIG_DUALMAC_CONCURRENT +- dc_set_channel_bwmode_survey_done(padapter); +-#else +- +-#ifdef CONFIG_P2P +- if( (pwdinfo->driver_interface == DRIVER_WEXT) && (rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN)) ) +- set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); +- else +-#endif //CONFIG_P2P +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); +- +-#endif //CONFIG_DUALMAC_CONCURRENT +-#endif //CONFIG_CONCURRENT_MODE +- } +- +- //flush 4-AC Queue after site_survey +- //val8 = 0; +- //rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); +- +- //config MSR +- Set_MSR(padapter, (pmlmeinfo->state & 0x3)); +- +- //turn on phy-dynamic functions +- Restore_DM_Func_Flag(padapter); +- //Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE); +- +- initialgain = 0xff; //restore RX GAIN +- rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); +- +- +- if (is_client_associated_to_ap(padapter) == _TRUE) +- { +- issue_nulldata(padapter, NULL, 0, 3, 500); +- +-#ifdef CONFIG_CONCURRENT_MODE +- if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) +- { +- DBG_871X("adapter is surveydone(buddy_adapter is linked), issue nulldata(pwrbit=0)\n"); +- +- issue_nulldata(padapter->pbuddy_adapter, NULL, 0, 3, 500); +- } +-#endif +- } +-#ifdef CONFIG_CONCURRENT_MODE +- else if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) +- { +- issue_nulldata(padapter->pbuddy_adapter, NULL, 0, 3, 500); +- } +-#endif +- +- val8 = 0; //survey done +- rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); +- +- report_surveydone_event(padapter); +- +- pmlmeext->chan_scan_time = SURVEY_TO; +- pmlmeext->sitesurvey_res.state = SCAN_DISABLE; +- +- issue_action_BSSCoexistPacket(padapter); +- issue_action_BSSCoexistPacket(padapter); +- issue_action_BSSCoexistPacket(padapter); +- +- } +- +-#ifdef CONFIG_CONCURRENT_MODE +- if(check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && +- check_buddy_fwstate(padapter, _FW_LINKED)) +- { +- +- DBG_871X("survey done, current CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); +- +- DBG_871X("restart pbuddy_adapter's beacon\n"); +- +- update_beacon(padapter->pbuddy_adapter, 0, NULL, _TRUE); +- } +-#endif +- +- } +- +- return; +- +-} +- +-//collect bss info from Beacon and Probe request/response frames. +-u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid) +-{ +- int i; +- u32 len; +- u8 *p; +- u16 val16, subtype; +- u8 *pframe = precv_frame->u.hdr.rx_data; +- u32 packet_len = precv_frame->u.hdr.len; +- u8 ie_offset; +- struct registry_priv *pregistrypriv = &padapter->registrypriv; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- len = packet_len - sizeof(struct rtw_ieee80211_hdr_3addr); +- +- if (len > MAX_IE_SZ) +- { +- //DBG_871X("IE too long for survey event\n"); +- return _FAIL; +- } +- +- _rtw_memset(bssid, 0, sizeof(WLAN_BSSID_EX)); +- +- subtype = GetFrameSubType(pframe); +- +- if(subtype==WIFI_BEACON) { +- bssid->Reserved[0] = 1; +- ie_offset = _BEACON_IE_OFFSET_; +- } else { +- // FIXME : more type +- if (subtype == WIFI_PROBERSP) { +- ie_offset = _PROBERSP_IE_OFFSET_; +- bssid->Reserved[0] = 3; +- } +- else if (subtype == WIFI_PROBEREQ) { +- ie_offset = _PROBEREQ_IE_OFFSET_; +- bssid->Reserved[0] = 2; +- } +- else { +- bssid->Reserved[0] = 0; +- ie_offset = _FIXED_IE_LENGTH_; +- } +- } +- +- bssid->Length = sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + len; +- +- //below is to copy the information element +- bssid->IELength = len; +- _rtw_memcpy(bssid->IEs, (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)), bssid->IELength); +- +- //get the signal strength +- //bssid->Rssi = precv_frame->u.hdr.attrib.SignalStrength; // 0-100 index. +- bssid->Rssi = precv_frame->u.hdr.attrib.phy_info.RecvSignalPower; // in dBM.raw data +- bssid->PhyInfo.SignalQuality = precv_frame->u.hdr.attrib.phy_info.SignalQuality;//in percentage +- bssid->PhyInfo.SignalStrength = precv_frame->u.hdr.attrib.phy_info.SignalStrength;//in percentage +-#ifdef CONFIG_ANTENNA_DIVERSITY +- //rtw_hal_get_hwreg(padapter, HW_VAR_CURRENT_ANTENNA, (u8 *)(&bssid->PhyInfo.Optimum_antenna)); +- rtw_hal_get_def_var(padapter, HAL_DEF_CURRENT_ANTENNA, &bssid->PhyInfo.Optimum_antenna); +-#endif +- +- // checking SSID +- if ((p = rtw_get_ie(bssid->IEs + ie_offset, _SSID_IE_, &len, bssid->IELength - ie_offset)) == NULL) +- { +- DBG_871X("marc: cannot find SSID for survey event\n"); +- return _FAIL; +- } +- +- if (*(p + 1)) +- { +- if (len > NDIS_802_11_LENGTH_SSID) +- { +- DBG_871X("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); +- return _FAIL; +- } +- _rtw_memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1)); +- bssid->Ssid.SsidLength = *(p + 1); +- } +- else +- { +- bssid->Ssid.SsidLength = 0; ++ else ++ { ++ bssid->Ssid.SsidLength = 0; + } + + _rtw_memset(bssid->SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX); +@@ -10048,10 +10730,8 @@ u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSI + u32 attr_contentlen = 0; + u8 listen_ch[5] = { 0x00 }; + +- if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, listen_ch, &attr_contentlen) != NULL) +- bssid->Configuration.DSConfig = listen_ch[4]; +- else +- return _FALSE; // Intel device maybe no bring Listen Channel ++ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, listen_ch, &attr_contentlen); ++ bssid->Configuration.DSConfig = listen_ch[4]; + } else + { // use current channel + bssid->Configuration.DSConfig = padapter->mlmeextpriv.cur_channel; +@@ -10176,6 +10856,7 @@ void start_create_ibss(_adapter* padapter) + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ u8 doiqk = _FALSE; + pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig; + pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork); + +@@ -10192,12 +10873,16 @@ void start_create_ibss(_adapter* padapter) + val8 = 0xcf; + rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); + +- rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, NULL); ++ doiqk = _TRUE; ++ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); + + //switch channel + //SelectChannel(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE); + set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); + ++ doiqk = _FALSE; ++ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); ++ + beacon_timing_control(padapter); + + //set msr to WIFI_FW_ADHOC_STATE +@@ -10255,6 +10940,7 @@ void start_clnt_join(_adapter* padapter) + u8 iot_flag = _TRUE; + rtw_hal_set_hwreg(padapter, HW_VAR_ASIX_IOT, (u8 *)(&iot_flag)); + } ++ + if (caps&cap_ESS) + { + Set_MSR(padapter, WIFI_FW_STATION_STATE); +@@ -10292,8 +10978,6 @@ void start_clnt_join(_adapter* padapter) + for (pos = get_next(head);!rtw_end_of_queue_search(head, pos); pos = get_next(pos)) { + + scanned = LIST_CONTAINOR(pos, struct wlan_network, list); +- if(scanned==NULL) +- rtw_warn_on(1); + + if (_rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE + && _rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE +@@ -10384,12 +11068,11 @@ void start_clnt_assoc(_adapter* padapter) + set_link_timer(pmlmeext, REASSOC_TO); + } + +-unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsigned short reason) ++unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsigned short reason, u8 locally_generated) + { + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + +- //check A3 + if (!(_rtw_memcmp(MacAddr, get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) + return _SUCCESS; + +@@ -10400,14 +11083,15 @@ unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsi + if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) + { + pmlmeinfo->state = WIFI_FW_NULL_STATE; +- report_del_sta_event(padapter, MacAddr, reason); ++ report_del_sta_event(padapter, MacAddr, reason, _TRUE, locally_generated); + + } + else if (pmlmeinfo->state & WIFI_FW_LINKING_STATE) + { + pmlmeinfo->state = WIFI_FW_NULL_STATE; + report_join_res(padapter, -2); +- } ++ } else ++ DBG_871X(FUNC_ADPT_FMT" - End to Disconnect\n", FUNC_ADPT_ARG(padapter)); + } + + return _SUCCESS; +@@ -10577,7 +11261,7 @@ static void process_80211d(PADAPTER padapter, WLAN_BSSID_EX *bssid) + if (pregistrypriv->wireless_mode & WIRELESS_11A) + { + do { +- if ((i == MAX_CHANNEL_NUM) || ++ if ((i >= MAX_CHANNEL_NUM) || + (chplan_sta[i].ChannelNum == 0)) + break; + +@@ -10915,39 +11599,27 @@ void report_wmm_edca_update(_adapter *padapter) + + } + +-void report_del_sta_event(_adapter *padapter, unsigned char* MacAddr, unsigned short reason) ++void report_del_sta_event(_adapter *padapter, unsigned char *MacAddr, unsigned short reason, bool enqueue, u8 locally_generated) + { + struct cmd_obj *pcmd_obj; + u8 *pevtcmd; + u32 cmdsz; + struct sta_info *psta; +- int mac_id; ++ int mac_id = -1; + struct stadel_event *pdel_sta_evt; + struct C2HEvent_Header *pc2h_evt_hdr; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; + +- if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) +- { +- return; +- } +- ++ /* prepare cmd parameter */ + cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header)); +- if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) +- { +- rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); +- return; ++ pevtcmd = (u8 *)rtw_zmalloc(cmdsz); ++ if (pevtcmd == NULL) { ++ res = _FAIL; ++ goto exit; + } + +- _rtw_init_listhead(&pcmd_obj->list); +- +- pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); +- pcmd_obj->cmdsz = cmdsz; +- pcmd_obj->parmbuf = pevtcmd; +- +- pcmd_obj->rsp = NULL; +- pcmd_obj->rspsz = 0; +- + pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); + pc2h_evt_hdr->len = sizeof(struct stadel_event); + pc2h_evt_hdr->ID = GEN_EVT_CODE(_DelSTA); +@@ -10956,24 +11628,46 @@ void report_del_sta_event(_adapter *padapter, unsigned char* MacAddr, unsigned s + pdel_sta_evt = (struct stadel_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); + _rtw_memcpy((unsigned char *)(&(pdel_sta_evt->macaddr)), MacAddr, ETH_ALEN); + _rtw_memcpy((unsigned char *)(pdel_sta_evt->rsvd),(unsigned char *)(&reason),2); +- +- + psta = rtw_get_stainfo(&padapter->stapriv, MacAddr); + if(psta) + mac_id = (int)psta->mac_id; + else + mac_id = (-1); +- + pdel_sta_evt->mac_id = mac_id; ++ pdel_sta_evt->locally_generated = locally_generated; + +- DBG_871X("report_del_sta_event: delete STA, mac_id=%d\n", mac_id); ++ if (!enqueue) { ++ /* do directly */ ++ rtw_stadel_event_callback(padapter, (u8 *)pdel_sta_evt); ++ rtw_mfree(pevtcmd, cmdsz); ++ } else { ++ pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (pcmd_obj == NULL) { ++ rtw_mfree(pevtcmd, cmdsz); ++ res = _FAIL; ++ goto exit; ++ } + +- rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ _rtw_init_listhead(&pcmd_obj->list); ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ } ++ ++exit: ++ ++ DBG_871X(FUNC_ADPT_FMT" "MAC_FMT" mac_id=%d, enqueue:%d, res:%u\n" ++ , FUNC_ADPT_ARG(padapter), MAC_ARG(MacAddr), mac_id, enqueue, res); + + return; + } + +-void report_add_sta_event(_adapter *padapter, unsigned char* MacAddr, int cam_idx) ++void report_add_sta_event(_adapter *padapter, unsigned char *MacAddr) + { + struct cmd_obj *pcmd_obj; + u8 *pevtcmd; +@@ -11011,7 +11705,6 @@ void report_add_sta_event(_adapter *padapter, unsigned char* MacAddr, int cam_id + + padd_sta_evt = (struct stassoc_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); + _rtw_memcpy((unsigned char *)(&(padd_sta_evt->macaddr)), MacAddr, ETH_ALEN); +- padd_sta_evt->cam_id = cam_idx; + + DBG_871X("report_add_sta_event: add STA\n"); + +@@ -11204,22 +11897,6 @@ static void rtw_mlmeext_disconnect(_adapter *padapter) + + //set_opmode_cmd(padapter, infra_client_with_mlme); + +-#if 1 +- /* +- * For safety, prevent from keeping macid sleep. +- * If we can sure all power mode enter/leave are paired, +- * this check can be removed. +- * Lucas@20131113 +- */ +- /* wakeup macid after disconnect. */ +- { +- struct sta_info *psta; +- psta = rtw_get_stainfo(&padapter->stapriv, get_my_bssid(pnetwork)); +- if (psta) +- rtw_hal_macid_wakeup(padapter, psta->mac_id); +- } +-#endif +- + rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0); + rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr); + +@@ -11247,41 +11924,28 @@ static void rtw_mlmeext_disconnect(_adapter *padapter) + } + } + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- dc_set_channel_bwmode_disconnect(padapter); +-#else //!CONFIG_DUALMAC_CONCURRENT +-#ifdef CONFIG_CONCURRENT_MODE +- if((check_buddy_fwstate(padapter, _FW_LINKED)) != _TRUE) +- { +-#endif //CONFIG_CONCURRENT_MODE +- //switch to the 20M Hz mode after disconnect +- pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; +- pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ /* switch to the 20M Hz mode after disconnect */ ++ pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); +-#ifdef CONFIG_CONCURRENT_MODE +- } +-#endif //CONFIG_CONCURRENT_MODE + #ifdef CONFIG_FCS_MODE +- else +- { +- PADAPTER pbuddy_adapter; +- struct mlme_ext_priv *pbuddy_mlmeext; ++ if (EN_FCS(padapter)) ++ rtw_hal_set_hwreg(padapter, HW_VAR_STOP_FCS_MODE, NULL); ++#endif + +- if(EN_FCS(padapter)) +- { +- pbuddy_adapter = padapter->pbuddy_adapter; +- pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +- +- rtw_hal_set_hwreg(padapter, HW_VAR_STOP_FCS_MODE, NULL); ++#ifdef CONFIG_DFS_MASTER ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ rtw_dfs_master_status_apply(padapter, MLME_AP_STOPPED); ++ else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) ++ rtw_dfs_master_status_apply(padapter, MLME_STA_DISCONNECTED); ++#endif ++ ++ { ++ u8 ch, bw, offset; + +- //switch to buddy's channel setting if buddy is linked +- set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); +- } ++ if (rtw_get_ch_setting_union_no_self(padapter, &ch, &bw, &offset) != 0) ++ set_channel_bwmode(padapter, ch, offset, bw); + } +-#endif //!CONFIG_FCS_MODE +-#endif //!CONFIG_DUALMAC_CONCURRENT +- + + flush_all_cam_entry(padapter); + +@@ -11291,6 +11955,16 @@ static void rtw_mlmeext_disconnect(_adapter *padapter) + pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0; + pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0; + ++#ifdef CONFIG_TDLS ++ padapter->tdlsinfo.ap_prohibited = _FALSE; ++ ++ /* For TDLS channel switch, currently we only allow it to work in wifi logo test mode */ ++ if (padapter->registrypriv.wifi_spec == 1) ++ { ++ padapter->tdlsinfo.ch_switch_prohibited = _FALSE; ++ } ++#endif /* CONFIG_TDLS */ ++ + } + + void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) +@@ -11301,6 +11975,10 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + struct sta_priv *pstapriv = &padapter->stapriv; + u8 join_type; ++#ifdef CONFIG_ARP_KEEP_ALIVE ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#endif ++ struct security_priv *psecuritypriv = &padapter->securitypriv; + + if(join_res < 0) + { +@@ -11310,6 +11988,9 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) + + goto exit_mlmeext_joinbss_event_callback; + } ++#ifdef CONFIG_ARP_KEEP_ALIVE ++ pmlmepriv->bGetGateway = 1; ++#endif + + if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) + { +@@ -11319,7 +12000,7 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) + + + //turn on dynamic functions +- Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE); ++ /* Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE); */ + + // update IOT-releated issue + update_IOT_info(padapter); +@@ -11343,17 +12024,9 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) + VHTOnAssocRsp(padapter); + #endif + +-#ifndef CONFIG_CONCURRENT_MODE +- // Call set_channel_bwmode when the CONFIG_CONCURRENT_MODE doesn't be defined. +- //Set cur_channel&cur_bwmode&cur_ch_offset +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); +-#endif +- + psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); + if (psta) //only for infra. mode + { +- pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; +- + //DBG_871X("set_sta_rate\n"); + + psta->wireless_mode = pmlmeext->cur_wireless_mode; +@@ -11368,6 +12041,11 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) + rtw_hal_macid_wakeup(padapter, psta->mac_id); + } + ++#ifndef CONFIG_IOCTL_CFG80211 ++ if (is_wep_enc(psecuritypriv->dot11PrivacyAlgrthm)) ++ rtw_sec_restore_wep_key(padapter); ++#endif /* CONFIG_IOCTL_CFG80211 */ ++ + if (rtw_port_switch_chk(padapter) == _TRUE) + rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); + +@@ -11390,19 +12068,13 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) + #ifdef CONFIG_BEAMFORMING + if (psta) + beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_ENTER, (u8 *)psta, sizeof(struct sta_info), 0); +-#endif ++#endif/*CONFIG_BEAMFORMING*/ + + exit_mlmeext_joinbss_event_callback: + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- dc_handle_join_done(padapter, join_res); +-#endif +-#ifdef CONFIG_CONCURRENT_MODE +- concurrent_chk_joinbss_done(padapter, join_res); +-#endif +- +- DBG_871X("=>%s\n", __FUNCTION__); ++ rtw_join_done_chk_ch(padapter, join_res); + ++ DBG_871X("=>%s - End to Connection without 4-way\n", __FUNCTION__); + } + + //currently only adhoc mode will go here +@@ -11429,28 +12101,16 @@ void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta) + correct_TSF(padapter, pmlmeext); + + //start beacon +- if(send_beacon(padapter)==_FAIL) +- { +- pmlmeinfo->FW_sta_info[psta->mac_id].status = 0; +- +- pmlmeinfo->state ^= WIFI_FW_ADHOC_STATE; +- +- return; +- } ++ if (send_beacon(padapter) == _FAIL) ++ rtw_warn_on(1); + + pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; +- + } + + join_type = 2; + rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); + } + +- pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; +- +- psta->bssratelen = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[psta->mac_id].SupportedRates); +- _rtw_memcpy(psta->bssrateset, pmlmeinfo->FW_sta_info[psta->mac_id].SupportedRates, psta->bssratelen); +- + //update adhoc sta_info + update_sta_info(padapter, psta); + +@@ -11486,9 +12146,8 @@ void _linked_info_dump(_adapter *padapter) + int i; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- int UndecoratedSmoothedPWDB; +- struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); +- struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); ++ HAL_DATA_TYPE *HalData = GET_HAL_DATA(padapter); ++ int UndecoratedSmoothedPWDB = 0; + + if(padapter->bLinkInfoDump){ + +@@ -11523,26 +12182,60 @@ void _linked_info_dump(_adapter *padapter) + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + } +- for(i=0; inum; i++) +- { +- if(rtw_macid_is_used(macid_ctl, i) +- && !rtw_macid_is_bmc(macid_ctl, i) /* skip bc/mc sta */ +- ) { +- //============ tx info ============ +- rtw_hal_get_def_var(padapter, HW_DEF_RA_INFO_DUMP, &i); +- } +- } +- rtw_hal_set_def_var(padapter, HAL_DEF_DBG_RX_INFO_DUMP, NULL); +- ++ ++ /*============ tx info ============ */ ++ rtw_hal_get_def_var(padapter, HW_DEF_RA_INFO_DUMP, RTW_DBGDUMP); ++ ++ rtw_hal_set_odm_var(padapter, HAL_ODM_RX_INFO_DUMP, RTW_DBGDUMP, _FALSE); + + } + + + } ++void rtw_delba_check(_adapter *padapter, struct sta_info *psta, u8 from_timer) ++{ ++ int i = 0; ++ int ret = _SUCCESS; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ /* ++ IOT issue,occur Broadcom ap(Buffalo WZR-D1800H,Netgear R6300). ++ AP is originator.AP does not transmit unicast packets when STA response its BAR. ++ This case probably occur ap issue BAR after AP builds BA. ++ ++ Follow 802.11 spec, STA shall maintain an inactivity timer for every negotiated Block Ack setup. ++ The inactivity timer is not reset when MPDUs corresponding to other TIDs are received. ++ */ ++ if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) { ++ for (i = 0; i < TID_NUM ; i++) { ++ if (sta_rx_data_qos_pkts(psta, i) == sta_last_rx_data_qos_pkts(psta, i)) { ++ if (_TRUE == rtw_inc_and_chk_continual_no_rx_packet(psta, i)) { ++ if (psta->recvreorder_ctrl[i].enable) { ++ /* send a DELBA frame to the peer STA with the Reason Code field set to TIMEOUT */ ++ if (!from_timer) ++ ret = issue_del_ba_ex(padapter, psta->hwaddr, i, 39, 0, 3, 1); ++ else ++ issue_del_ba(padapter, psta->hwaddr, i, 39, 0); ++ psta->recvreorder_ctrl[i].enable = _FALSE; ++ if (ret != _FAIL) ++ psta->recvreorder_ctrl[i].ampdu_size = RX_AMPDU_SIZE_INVALID; ++ rtw_reset_continual_no_rx_packet(psta, i); ++ } ++ } ++ } ++ else{ ++ /* The inactivity timer is reset when MPDUs to the TID is received. */ ++ rtw_reset_continual_no_rx_packet(psta, i); ++ } ++ } ++ } ++} + + u8 chk_ap_is_alive(_adapter *padapter, struct sta_info *psta) + { + u8 ret = _FALSE; ++ int i = 0; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + +@@ -11581,16 +12274,62 @@ u8 chk_ap_is_alive(_adapter *padapter, struct sta_info *psta) + + sta_update_last_rx_pkts(psta); + ++ /* ++ record last rx data packets for every tid. ++ */ ++ for (i = 0; i < TID_NUM; i++) ++ psta->sta_stats.last_rx_data_qos_pkts[i] = psta->sta_stats.rx_data_qos_pkts[i]; ++ ++ return ret; ++} ++ ++u8 chk_adhoc_peer_is_alive(struct sta_info *psta) ++{ ++ u8 ret = _TRUE; ++ ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("sta:"MAC_FMT", rssi:%d, rx:"STA_PKTS_FMT", beacon:%llu, probersp_to_self:%llu" ++ /*", probersp_bm:%llu, probersp_uo:%llu, probereq:%llu, BI:%u"*/ ++ ", expire_to:%u\n" ++ , MAC_ARG(psta->hwaddr) ++ , psta->rssi_stat.UndecoratedSmoothedPWDB ++ , STA_RX_PKTS_DIFF_ARG(psta) ++ , psta->sta_stats.rx_beacon_pkts - psta->sta_stats.last_rx_beacon_pkts ++ , psta->sta_stats.rx_probersp_pkts - psta->sta_stats.last_rx_probersp_pkts ++ /*, psta->sta_stats.rx_probersp_bm_pkts - psta->sta_stats.last_rx_probersp_bm_pkts ++ , psta->sta_stats.rx_probersp_uo_pkts - psta->sta_stats.last_rx_probersp_uo_pkts ++ , psta->sta_stats.rx_probereq_pkts - psta->sta_stats.last_rx_probereq_pkts ++ , pmlmeinfo->bcn_interval*/ ++ , psta->expire_to ++ ); ++ #endif ++ ++ if (sta_rx_data_pkts(psta) == sta_last_rx_data_pkts(psta) ++ && sta_rx_beacon_pkts(psta) == sta_last_rx_beacon_pkts(psta) ++ && sta_rx_probersp_pkts(psta) == sta_last_rx_probersp_pkts(psta)) ++ ret = _FALSE; ++ ++ sta_update_last_rx_pkts(psta); ++ + return ret; + } + + #ifdef CONFIG_TDLS ++u8 chk_tdls_peer_sta_is_alive(_adapter *padapter, struct sta_info *psta) ++{ ++ if ((psta->sta_stats.rx_data_pkts == psta->sta_stats.last_rx_data_pkts) ++ && (psta->sta_stats.rx_tdls_disc_rsp_pkts == psta->sta_stats.last_rx_tdls_disc_rsp_pkts)) ++ return _FALSE; ++ ++ return _TRUE; ++} ++ + void linked_status_chk_tdls(_adapter *padapter) + { +-struct candidate_pool{ +- struct sta_info *psta; +- u8 addr[ETH_ALEN]; +-}; ++ struct candidate_pool { ++ struct sta_info *psta; ++ u8 addr[ETH_ALEN]; ++ }; + struct sta_priv *pstapriv = &padapter->stapriv; + _irqL irqL; + u8 ack_chk; +@@ -11598,8 +12337,10 @@ struct candidate_pool{ + int i, num_teardown=0, num_checkalive=0; + _list *plist, *phead; + struct tdls_txmgmt txmgmt; +- struct candidate_pool checkalive[NUM_STA]; +- struct candidate_pool teardown[NUM_STA]; ++ struct candidate_pool checkalive[MAX_ALLOWED_TDLS_STA_NUM]; ++ struct candidate_pool teardown[MAX_ALLOWED_TDLS_STA_NUM]; ++ u8 tdls_sta_max = _FALSE; ++ + #define ALIVE_MIN 2 + #define ALIVE_MAX 5 + +@@ -11624,15 +12365,8 @@ struct candidate_pool{ + psta->alive_count++; + if(psta->alive_count >= ALIVE_MIN) + { +-#ifdef CONFIG_XMIT_ACK +- if(psta->sta_stats.last_rx_data_pkts >= psta->sta_stats.rx_data_pkts) +-#else +- if((psta->sta_stats.last_rx_data_pkts >= psta->sta_stats.rx_data_pkts) && +- (!(psta->tdls_sta_state & TDLS_ALIVE_STATE)) ) +-#endif +- { +- if(psta->alive_count < ALIVE_MAX) +- { ++ if (chk_tdls_peer_sta_is_alive(padapter, psta) == _FALSE) { ++ if (psta->alive_count < ALIVE_MAX) { + _rtw_memcpy(checkalive[num_checkalive].addr, psta->hwaddr, ETH_ALEN); + checkalive[num_checkalive].psta = psta; + num_checkalive++; +@@ -11646,35 +12380,30 @@ struct candidate_pool{ + } + else + { +- psta->tdls_sta_state &= (~TDLS_ALIVE_STATE); + psta->alive_count = 0; + } + } + psta->sta_stats.last_rx_data_pkts = psta->sta_stats.rx_data_pkts; ++ psta->sta_stats.last_rx_tdls_disc_rsp_pkts = psta->sta_stats.rx_tdls_disc_rsp_pkts; ++ ++ if ((num_checkalive >= MAX_ALLOWED_TDLS_STA_NUM) || (num_teardown >= MAX_ALLOWED_TDLS_STA_NUM)) { ++ tdls_sta_max = _TRUE; ++ break; ++ } + } + } ++ ++ if (tdls_sta_max == _TRUE) ++ break; + } + _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); + +- if(num_checkalive > 0) +- { +- for(i=0; i< num_checkalive; i++) +- { +-#ifdef CONFIG_XMIT_ACK +- //TDLS: Should we set wait_ms to 300 for keeping alive? +- ack_chk = issue_nulldata_to_TDLS_peer_STA(padapter, checkalive[i].addr, 0, 3, 300); +- +- if(ack_chk == _SUCCESS) +- { +- checkalive[i].psta->alive_count = 0; +- } +-#else +- checkalive[i].psta->tdls_sta_state &= (~TDLS_ALIVE_STATE); ++ if (num_checkalive > 0) { ++ for (i = 0; i < num_checkalive; i++) { + _rtw_memcpy(txmgmt.peer, checkalive[i].addr, ETH_ALEN); + issue_tdls_dis_req(padapter, &txmgmt); + issue_tdls_dis_req(padapter, &txmgmt); + issue_tdls_dis_req(padapter, &txmgmt); +-#endif //CONFIG_XMIT_ACK + } + } + +@@ -11702,6 +12431,9 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct sta_priv *pstapriv = &padapter->stapriv; ++#ifdef CONFIG_ARP_KEEP_ALIVE ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#endif + + + if (is_client_associated_to_ap(padapter)) +@@ -11719,6 +12451,17 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) + #else + rx_chk_limit = 8; + #endif ++#ifdef CONFIG_ARP_KEEP_ALIVE ++ if (!from_timer && pmlmepriv->bGetGateway == 1) { ++ DBG_871X("do rtw_gw_addr_query()"); ++ if (rtw_gw_addr_query(padapter) == 0) { ++ pmlmepriv->bGetGateway = 0; ++ } else { ++ _rtw_memset(pmlmepriv->gw_ip, 0, 4); ++ _rtw_memset(pmlmepriv->gw_mac_addr, 0, 6); ++ } ++ } ++#endif + #ifdef CONFIG_P2P + if (!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) + { +@@ -11736,13 +12479,16 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) + link_count_limit = 29; // 60 sec + } + +- // Marked by Kurt 20130715 +- // For WiDi 3.5 and latered on, they don't ask WiDi sink to do roaming, so we could not check rx limit that strictly. +- // todo: To check why we under miracast session, rx_chk would be _FALSE +- //#ifdef CONFIG_INTEL_WIDI +- //if (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_NONE) +- // rx_chk_limit = 1; +- //#endif ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++ if (ATOMIC_READ(&padapter->tdlsinfo.chsw_info.chsw_on) == _TRUE) ++ return; ++#endif /* CONFIG_TDLS_CH_SW */ ++ ++#ifdef CONFIG_TDLS_AUTOCHECKALIVE ++ linked_status_chk_tdls(padapter); ++#endif /* CONFIG_TDLS_AUTOCHECKALIVE */ ++#endif /* CONFIG_TDLS */ + + if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) + { +@@ -11750,7 +12496,10 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) + #ifdef CONFIG_P2P + is_p2p_enable = !rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE); + #endif +- ++ ++ /*issue delba when ap does not tx data packet that is Broadcom ap */ ++ rtw_delba_check(padapter, psta, from_timer); ++ + if (chk_ap_is_alive(padapter, psta) == _FALSE) + rx_chk = _FAIL; + +@@ -11810,7 +12559,7 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) + DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" disconnect or roaming\n", + FUNC_ADPT_ARG(padapter)); + receive_disconnect(padapter, pmlmeinfo->network.MacAddress +- , WLAN_REASON_EXPIRATION_CHK); ++ , WLAN_REASON_EXPIRATION_CHK, _FALSE); + return; + } + } else { +@@ -11826,118 +12575,81 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) + + } //end of if ((psta = rtw_get_stainfo(pstapriv, passoc_res->network.MacAddress)) != NULL) + +-#if defined (CONFIG_TDLS) && defined (CONFIG_TDLS_AUTOCHECKALIVE) +- linked_status_chk_tdls(padapter); +-#endif //CONFIG_TDLS ++ } else if (is_client_associated_to_ibss(padapter)) { ++ _irqL irqL; ++ _list *phead, *plist, dlist; + +- } +- else if (is_client_associated_to_ibss(padapter)) +- { +- //linked IBSS mode +- //for each assoc list entry to check the rx pkt counter +- for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) +- { +- if (pmlmeinfo->FW_sta_info[i].status == 1) +- { +- psta = pmlmeinfo->FW_sta_info[i].psta; ++ _rtw_init_listhead(&dlist); + +- if(NULL==psta) continue; ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); + +- if (pmlmeinfo->FW_sta_info[i].rx_pkt == sta_rx_pkts(psta)) +- { ++ for (i = 0; i < NUM_STA; i++) { + +- if(pmlmeinfo->FW_sta_info[i].retry<3) +- { +- pmlmeinfo->FW_sta_info[i].retry++; +- } +- else +- { +- pmlmeinfo->FW_sta_info[i].retry = 0; +- pmlmeinfo->FW_sta_info[i].status = 0; +- report_del_sta_event(padapter, psta->hwaddr +- , 65535// indicate disconnect caused by no rx +- ); +- } +- } ++ phead = &(pstapriv->sta_hash[i]); ++ plist = get_next(phead); ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ plist = get_next(plist); ++ ++ if (is_broadcast_mac_addr(psta->hwaddr)) ++ continue; ++ ++ if (chk_adhoc_peer_is_alive(psta) || !psta->expire_to) ++ psta->expire_to = pstapriv->adhoc_expire_to; + else +- { +- pmlmeinfo->FW_sta_info[i].retry = 0; +- pmlmeinfo->FW_sta_info[i].rx_pkt = (u32)sta_rx_pkts(psta); ++ psta->expire_to--; ++ ++ if (psta->expire_to <= 0) { ++ rtw_list_delete(&psta->list); ++ rtw_list_insert_tail(&psta->list, &dlist); + } + } + } + +- //set_link_timer(pmlmeext, DISCONNECT_TO); ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); + ++ plist = get_next(&dlist); ++ while (rtw_end_of_queue_search(&dlist, plist) == _FALSE) { ++ psta = LIST_CONTAINOR(plist, struct sta_info, list); ++ plist = get_next(plist); ++ rtw_list_delete(&psta->list); ++ DBG_871X(FUNC_ADPT_FMT" ibss expire "MAC_FMT"\n" ++ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->hwaddr)); ++ report_del_sta_event(padapter, psta->hwaddr, WLAN_REASON_EXPIRATION_CHK, from_timer ? _TRUE : _FALSE, _FALSE); ++ } + } + + } + + void survey_timer_hdl(_adapter *padapter) + { +- struct cmd_obj *ph2c; +- struct sitesurvey_parm *psurveyPara; +- struct cmd_priv *pcmdpriv=&padapter->cmdpriv; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct cmd_obj *cmd; ++ struct sitesurvey_parm *psurveyPara; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + #ifdef CONFIG_P2P + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); + #endif + +- //DBG_871X("marc: survey timer\n"); +- +- //issue rtw_sitesurvey_cmd +- if (pmlmeext->sitesurvey_res.state > SCAN_START) +- { +- if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) +- { +-#if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH) +- if( padapter->mlmeextpriv.mlmext_info.scan_cnt != RTW_SCAN_NUM_OF_CH ) +-#endif +- pmlmeext->sitesurvey_res.channel_idx++; +- } +- +- if(pmlmeext->scan_abort == _TRUE) +- { +- #ifdef CONFIG_P2P +- if(!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) +- { +- rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_MAX); +- pmlmeext->sitesurvey_res.channel_idx = 3; +- DBG_871X("%s idx:%d, cnt:%u\n", __FUNCTION__ +- , pmlmeext->sitesurvey_res.channel_idx +- , pwdinfo->find_phase_state_exchange_cnt +- ); +- } +- else +- #endif +- { +- pmlmeext->sitesurvey_res.channel_idx = pmlmeext->sitesurvey_res.ch_num; +- DBG_871X("%s idx:%d\n", __FUNCTION__ +- , pmlmeext->sitesurvey_res.channel_idx +- ); +- } +- +- pmlmeext->scan_abort = _FALSE;//reset ++ if (mlmeext_scan_state(pmlmeext) > SCAN_DISABLE) { ++ cmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (cmd == NULL) { ++ rtw_warn_on(1); ++ goto exit; + } + +- if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) +- { +- goto exit_survey_timer_hdl; +- } +- +- if ((psurveyPara = (struct sitesurvey_parm*)rtw_zmalloc(sizeof(struct sitesurvey_parm))) == NULL) +- { +- rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); +- goto exit_survey_timer_hdl; ++ psurveyPara = (struct sitesurvey_parm *)rtw_zmalloc(sizeof(struct sitesurvey_parm)); ++ if (psurveyPara == NULL) { ++ rtw_warn_on(1); ++ rtw_mfree((unsigned char *)cmd, sizeof(struct cmd_obj)); ++ goto exit; + } + +- init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, GEN_CMD_CODE(_SiteSurvey)); +- rtw_enqueue_cmd(pcmdpriv, ph2c); ++ init_h2fwcmd_w_parm_no_rsp(cmd, psurveyPara, GEN_CMD_CODE(_SiteSurvey)); ++ rtw_enqueue_cmd(pcmdpriv, cmd); + } + +- +-exit_survey_timer_hdl: +- ++exit: + return; + } + +@@ -11994,110 +12706,111 @@ void link_timer_hdl(_adapter *padapter) + issue_assocreq(padapter); + set_link_timer(pmlmeext, REASSOC_TO); + } +-#if 0 +- else if (is_client_associated_to_ap(padapter)) +- { +- //linked infrastructure client mode +- if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) +- { +- /*to monitor whether the AP is alive or not*/ +- if (rx_pkt == psta->sta_stats.rx_pkts) +- { +- receive_disconnect(padapter, pmlmeinfo->network.MacAddress); +- return; +- } +- else +- { +- rx_pkt = psta->sta_stats.rx_pkts; +- set_link_timer(pmlmeext, DISCONNECT_TO); +- } + +- //update the EDCA paramter according to the Tx/RX mode +- update_EDCA_param(padapter); ++ return; ++} + +- /*to send the AP a nulldata if no frame is xmitted in order to keep alive*/ +- if (pmlmeinfo->link_count++ == 0) +- { +- tx_cnt = pxmitpriv->tx_pkts; +- } +- else if ((pmlmeinfo->link_count & 0xf) == 0) +- { +- if (tx_cnt == pxmitpriv->tx_pkts) +- { +- issue_nulldata_in_interrupt(padapter, NULL, 0); +- } ++void addba_timer_hdl(struct sta_info *psta) ++{ ++#ifdef CONFIG_80211N_HT ++ struct ht_priv *phtpriv; + +- tx_cnt = pxmitpriv->tx_pkts; +- } +- } //end of if ((psta = rtw_get_stainfo(pstapriv, passoc_res->network.MacAddress)) != NULL) +- } +- else if (is_client_associated_to_ibss(padapter)) ++ if(!psta) ++ return; ++ ++ phtpriv = &psta->htpriv; ++ ++ if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) + { +- //linked IBSS mode +- //for each assoc list entry to check the rx pkt counter +- for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) +- { +- if (pmlmeinfo->FW_sta_info[i].status == 1) +- { +- psta = pmlmeinfo->FW_sta_info[i].psta; ++ if(phtpriv->candidate_tid_bitmap) ++ phtpriv->candidate_tid_bitmap=0x0; ++ ++ } ++#endif //CONFIG_80211N_HT ++} + +- if (pmlmeinfo->FW_sta_info[i].rx_pkt == psta->sta_stats.rx_pkts) +- { +- pmlmeinfo->FW_sta_info[i].status = 0; +- report_del_sta_event(padapter, psta->hwaddr); +- } +- else +- { +- pmlmeinfo->FW_sta_info[i].rx_pkt = psta->sta_stats.rx_pkts; +- } +- } +- } ++#ifdef CONFIG_IEEE80211W ++void report_sta_timeout_event(_adapter *padapter, u8 *MacAddr, unsigned short reason) ++{ ++ struct cmd_obj *pcmd_obj; ++ u8 *pevtcmd; ++ u32 cmdsz; ++ struct sta_info *psta; ++ int mac_id; ++ struct stadel_event *pdel_sta_evt; ++ struct C2HEvent_Header *pc2h_evt_hdr; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (pcmd_obj == NULL) ++ return; + +- set_link_timer(pmlmeext, DISCONNECT_TO); ++ cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header)); ++ pevtcmd = (u8 *)rtw_zmalloc(cmdsz); ++ if (pevtcmd == NULL) { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ return; + } +-#endif ++ ++ _rtw_init_listhead(&pcmd_obj->list); ++ ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ pc2h_evt_hdr = (struct C2HEvent_Header *)(pevtcmd); ++ pc2h_evt_hdr->len = sizeof(struct stadel_event); ++ pc2h_evt_hdr->ID = GEN_EVT_CODE(_TimeoutSTA); ++ pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); ++ ++ pdel_sta_evt = (struct stadel_event *)(pevtcmd + sizeof(struct C2HEvent_Header)); ++ _rtw_memcpy((unsigned char *)(&(pdel_sta_evt->macaddr)), MacAddr, ETH_ALEN); ++ _rtw_memcpy((unsigned char *)(pdel_sta_evt->rsvd), (unsigned char *)(&reason), 2); ++ ++ ++ psta = rtw_get_stainfo(&padapter->stapriv, MacAddr); ++ if (psta) ++ mac_id = (int)psta->mac_id; ++ else ++ mac_id = (-1); ++ ++ pdel_sta_evt->mac_id = mac_id; ++ ++ DBG_871X("report_del_sta_event: delete STA, mac_id=%d\n", mac_id); ++ ++ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); + + return; + } + +-void addba_timer_hdl(struct sta_info *psta) ++void clnt_sa_query_timeout(_adapter *padapter) + { +-#ifdef CONFIG_80211N_HT +- struct ht_priv *phtpriv; + +- if(!psta) +- return; +- +- phtpriv = &psta->htpriv; ++ rtw_disassoc_cmd(padapter, 0, _TRUE); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); ++ rtw_free_assoc_resources(padapter, 1); + +- if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) +- { +- if(phtpriv->candidate_tid_bitmap) +- phtpriv->candidate_tid_bitmap=0x0; +- +- } +-#endif //CONFIG_80211N_HT ++ DBG_871X("SA query timeout client disconnect\n"); + } + +-#ifdef CONFIG_IEEE80211W +-void sa_query_timer_hdl(_adapter *padapter) ++void sa_query_timer_hdl(struct sta_info *psta) + { +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_priv * pmlmepriv = &padapter->mlmepriv; ++ _adapter *padapter = psta->padapter; + _irqL irqL; +- //disconnect +- _enter_critical_bh(&pmlmepriv->lock, &irqL); +- +- if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) +- { +- rtw_disassoc_cmd(padapter, 0, _TRUE); +- rtw_indicate_disconnect(padapter); +- rtw_free_assoc_resources(padapter, 1); +- } ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + +- _exit_critical_bh(&pmlmepriv->lock, &irqL); +- DBG_871X("SA query timeout disconnect\n"); ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE && ++ check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ clnt_sa_query_timeout(padapter); ++ else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ report_sta_timeout_event(padapter, psta->hwaddr, WLAN_REASON_PREV_AUTH_NOT_VALID); + } ++ + #endif //CONFIG_IEEE80211W + + u8 NULL_hdl(_adapter *padapter, u8 *pbuf) +@@ -12241,6 +12954,8 @@ u8 setopmode_hdl(_adapter *padapter, u8 *pbuf) + else if(psetop->mode == Ndis802_11IBSS) + { + type = _HW_STATE_ADHOC_; ++ } else if (psetop->mode == Ndis802_11Monitor) { ++ type = _HW_STATE_MONITOR_; + } + else + { +@@ -12289,20 +13004,21 @@ u8 createbss_hdl(_adapter *padapter, u8 *pbuf) + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); +- struct joinbss_parm *pparm = (struct joinbss_parm *)pbuf; +- //u32 initialgain; ++ WLAN_BSSID_EX *pdev_network = &padapter->registrypriv.dev_network; ++ struct createbss_parm *parm = (struct createbss_parm *)pbuf; ++ u8 ret = H2C_SUCCESS; ++ //u8 initialgain; + + #ifdef CONFIG_AP_MODE + if (pmlmeinfo->state == WIFI_FW_AP_STATE) { +- WLAN_BSSID_EX *network = &padapter->mlmepriv.cur_network.network; +- start_bss_network(padapter, (u8*)network); +- return H2C_SUCCESS; ++ start_bss_network(padapter, parm); ++ goto exit; + } + #endif + +- //below is for ad-hoc master +- if(pparm->network.InfrastructureMode == Ndis802_11IBSS) +- { ++ /* below is for ad-hoc master */ ++ if (parm->adhoc) { ++ rtw_warn_on(pdev_network->InfrastructureMode != Ndis802_11IBSS); + rtw_joinbss_reset(padapter); + + pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; +@@ -12317,11 +13033,11 @@ u8 createbss_hdl(_adapter *padapter, u8 *pbuf) + + //config the initial gain under linking, need to write the BB registers + //initialgain = 0x1E; +- //rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ /*rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE);*/ + + //disable dynamic functions, such as high power, DIG +- Save_DM_Func_Flag(padapter); +- Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ rtw_phydm_ability_backup(padapter); ++ rtw_phydm_func_disable_all(padapter); + + //cancel link timer + _cancel_timer_ex(&pmlmeext->link_timer); +@@ -12329,20 +13045,27 @@ u8 createbss_hdl(_adapter *padapter, u8 *pbuf) + //clear CAM + flush_all_cam_entry(padapter); + +- _rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); +- pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength; ++ pdev_network->Length = get_WLAN_BSSID_EX_sz(pdev_network); ++ _rtw_memcpy(pnetwork, pdev_network, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); ++ pnetwork->IELength = pdev_network->IELength; + +- if(pnetwork->IELength>MAX_IE_SZ)//Check pbuf->IELength +- return H2C_PARAMETERS_ERROR; ++ if (pnetwork->IELength > MAX_IE_SZ) { ++ ret = H2C_PARAMETERS_ERROR; ++ goto ibss_post_hdl; ++ } + +- _rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength); +- ++ _rtw_memcpy(pnetwork->IEs, pdev_network->IEs, pnetwork->IELength); + start_create_ibss(padapter); ++ } else { ++ rtw_warn_on(1); ++ ret = H2C_PARAMETERS_ERROR; ++ } + +- } +- +- return H2C_SUCCESS; ++ibss_post_hdl: ++ rtw_create_ibss_post_hdl(padapter, ret); + ++exit: ++ return ret; + } + + u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) +@@ -12357,10 +13080,10 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) + struct joinbss_parm *pparm = (struct joinbss_parm *)pbuf; + #endif //CONFIG_ANTENNA_DIVERSITY + u32 i; +- u8 cbw40_enable=0; +- //u32 initialgain; ++ //u8 initialgain; + //u32 acparm; +- u8 ch, bw, offset; ++ u8 u_ch, u_bw, u_offset; ++ u8 doiqk = _FALSE; + + //check already connecting to AP or not + if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) +@@ -12393,9 +13116,7 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) + #endif + + rtw_joinbss_reset(padapter); +- +- pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; +- pmlmeext->cur_ch_offset= HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ + pmlmeinfo->ERP_enable = 0; + pmlmeinfo->WMM_enable = 0; + pmlmeinfo->HT_enable = 0; +@@ -12412,18 +13133,20 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) + + if(pnetwork->IELength>MAX_IE_SZ)//Check pbuf->IELength + return H2C_PARAMETERS_ERROR; +- ++ ++ if (pnetwork->IELength < 2) { ++ report_join_res(padapter, (-4)); ++ return H2C_SUCCESS; ++ } + _rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength); + +- pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig; + pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork); + + //Check AP vendor to move rtw_joinbss_cmd() + //pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->IEs, pnetwork->IELength); + + //sizeof(NDIS_802_11_FIXED_IEs) +- for (i = _FIXED_IE_LENGTH_; i < pnetwork->IELength;) +- { ++ for (i = _FIXED_IE_LENGTH_ ; i < pnetwork->IELength - 2 ;) { + pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); + + switch (pIE->ElementID) +@@ -12435,74 +13158,36 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) + } + break; + ++#ifdef CONFIG_80211N_HT + case _HT_CAPABILITY_IE_: //Get HT Cap IE. + pmlmeinfo->HT_caps_enable = 1; + break; + + case _HT_EXTRA_INFO_IE_: //Get HT Info IE. +-#ifdef CONFIG_80211N_HT + pmlmeinfo->HT_info_enable = 1; +- +- //spec case only for cisco's ap because cisco's ap issue assoc rsp using mcs rate @40MHz or @20MHz +-//#if !defined(CONFIG_CONCURRENT_MODE) && !defined(CONFIG_DUALMAC_CONCURRENT) +-// if(pmlmeinfo->assoc_AP_vendor == ciscoAP) +-//#endif +- { +- struct HT_info_element *pht_info = (struct HT_info_element *)(pIE->data); +- +- if (pnetwork->Configuration.DSConfig > 14) { +- if ((pregpriv->bw_mode >> 4) > CHANNEL_WIDTH_20) +- cbw40_enable = 1; +- } else { +- if ((pregpriv->bw_mode & 0x0f) > CHANNEL_WIDTH_20) +- cbw40_enable = 1; +- } +- +- if ((cbw40_enable) && (pht_info->infos[0] & BIT(2))) +- { +- //switch to the 40M Hz mode according to the AP +- pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; +- switch (pht_info->infos[0] & 0x3) +- { +- case 1: +- pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; +- break; +- +- case 3: +- pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; +- break; +- +- default: +- pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; +- break; +- } +- +- DBG_871X("set HT ch/bw before connected\n"); +- } +- } +-#endif //CONFIG_80211N_HT + break; ++#endif /* CONFIG_80211N_HT */ ++ + #ifdef CONFIG_80211AC_VHT + case EID_VHTCapability://Get VHT Cap IE. + pmlmeinfo->VHT_enable = 1; + break; + + case EID_VHTOperation://Get VHT Operation IE. +- if((GET_VHT_OPERATION_ELE_CHL_WIDTH(pIE->data) >= 1) +- && ((pregpriv->bw_mode >> 4) >= CHANNEL_WIDTH_80)) { +- pmlmeext->cur_bwmode = CHANNEL_WIDTH_80; +- DBG_871X("VHT center ch = %d\n", GET_VHT_OPERATION_ELE_CENTER_FREQ1(pIE->data)); +- DBG_871X("set VHT ch/bw before connected\n"); +- } + break; +-#endif ++#endif /* CONFIG_80211AC_VHT */ + default: + break; + } + + i += (pIE->Length + 2); + } ++ ++ rtw_bss_get_chbw(pnetwork ++ , &pmlmeext->cur_channel, &pmlmeext->cur_bwmode, &pmlmeext->cur_ch_offset); ++ ++ rtw_adjust_chbw(padapter, pmlmeext->cur_channel, &pmlmeext->cur_bwmode, &pmlmeext->cur_ch_offset); ++ + #if 0 + if (padapter->registrypriv.wifi_spec) { + // for WiFi test, follow WMM test plan spec +@@ -12534,31 +13219,28 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) + #endif + + /* check channel, bandwidth, offset and switch */ +-#ifdef CONFIG_DUALMAC_CONCURRENT +- if(dc_handle_join_request(padapter, &ch, &bw, &offset) == _FAIL) { +- DBG_871X("dc_handle_join_request fail !!!\n"); +- return H2C_SUCCESS; +- } +-#else //NON CONFIG_DUALMAC_CONCURRENT +- if(rtw_chk_start_clnt_join(padapter, &ch, &bw, &offset) == _FAIL) { ++ if (rtw_chk_start_clnt_join(padapter, &u_ch, &u_bw, &u_offset) == _FAIL) { + report_join_res(padapter, (-4)); + return H2C_SUCCESS; + } +-#endif + + //disable dynamic functions, such as high power, DIG +- //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ /*rtw_phydm_func_disable_all(padapter);*/ + + //config the initial gain under linking, need to write the BB registers + //initialgain = 0x1E; +- //rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ /*rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE);*/ + + rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); + join_type = 0; + rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); +- rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, NULL); ++ doiqk = _TRUE; ++ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); + +- set_channel_bwmode(padapter, ch, offset, bw); ++ set_channel_bwmode(padapter, u_ch, u_offset, u_bw); ++ ++ doiqk = _FALSE; ++ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); + + //cancel link timer + _cancel_timer_ex(&pmlmeext->link_timer); +@@ -12605,11 +13287,166 @@ u8 disconnect_hdl(_adapter *padapter, unsigned char *pbuf) + rtw_mlmeext_disconnect(padapter); + + rtw_free_uc_swdec_pending_queue(padapter); +- ++ + return H2C_SUCCESS; + } + +-int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel *out, ++static const char * const _scan_state_str[] = { ++ "SCAN_DISABLE", ++ "SCAN_START", ++ "SCAN_PS_ANNC_WAIT", ++ "SCAN_ENTER", ++ "SCAN_PROCESS", ++ "SCAN_BACKING_OP", ++ "SCAN_BACK_OP", ++ "SCAN_LEAVING_OP", ++ "SCAN_LEAVE_OP", ++ "SCAN_SW_ANTDIV_BL", ++ "SCAN_TO_P2P_LISTEN", ++ "SCAN_P2P_LISTEN", ++ "SCAN_COMPLETE", ++ "SCAN_STATE_MAX", ++}; ++ ++const char *scan_state_str(u8 state) ++{ ++ state = (state >= SCAN_STATE_MAX) ? SCAN_STATE_MAX : state; ++ return _scan_state_str[state]; ++} ++ ++static bool scan_abort_hdl(_adapter *adapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct ss_res *ss = &pmlmeext->sitesurvey_res; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++#endif ++ bool ret = _FALSE; ++ ++ if (pmlmeext->scan_abort == _TRUE) { ++ #ifdef CONFIG_P2P ++ if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) { ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_MAX); ++ ss->channel_idx = 3; ++ DBG_871X("%s idx:%d, cnt:%u\n", __FUNCTION__ ++ , ss->channel_idx ++ , pwdinfo->find_phase_state_exchange_cnt ++ ); ++ } else ++ #endif ++ { ++ ss->channel_idx = ss->ch_num; ++ DBG_871X("%s idx:%d\n", __FUNCTION__ ++ , ss->channel_idx ++ ); ++ } ++ pmlmeext->scan_abort = _FALSE; ++ ret = _TRUE; ++ } ++ ++ return ret; ++} ++ ++u8 rtw_scan_sparse(_adapter *adapter, struct rtw_ieee80211_channel *ch, u8 ch_num) ++{ ++/* interval larger than this is treated as backgroud scan */ ++#ifndef RTW_SCAN_SPARSE_BG_INTERVAL_MS ++#define RTW_SCAN_SPARSE_BG_INTERVAL_MS 12000 ++#endif ++ ++#ifndef RTW_SCAN_SPARSE_CH_NUM_MIRACAST ++#define RTW_SCAN_SPARSE_CH_NUM_MIRACAST 1 ++#endif ++#ifndef RTW_SCAN_SPARSE_CH_NUM_BG ++#define RTW_SCAN_SPARSE_CH_NUM_BG 4 ++#endif ++ ++#define SCAN_SPARSE_CH_NUM_INVALID 255 ++ ++ static u8 token = 255; ++ u32 interval; ++ bool busy_traffic = _FALSE; ++ bool miracast_enabled = _FALSE; ++ bool bg_scan = _FALSE; ++ u8 max_allow_ch = SCAN_SPARSE_CH_NUM_INVALID; ++ u8 scan_division_num; ++ u8 ret_num = ch_num; ++ struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter)); ++ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; ++ ++ if (regsty->wifi_spec) ++ goto exit; ++ ++ /* assume ch_num > 6 is normal scan */ ++ if (ch_num <= 6) ++ goto exit; ++ ++ if (mlmeext->last_scan_time == 0) ++ mlmeext->last_scan_time = rtw_get_current_time(); ++ ++ interval = rtw_get_passing_time_ms(mlmeext->last_scan_time); ++ ++ if (adapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE ++ #ifdef CONFIG_CONCURRENT_MODE ++ || (adapter->pbuddy_adapter && adapter->pbuddy_adapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE) ++ #endif ++ ) ++ busy_traffic = _TRUE; ++ ++ if (is_miracast_enabled(adapter) ++ #ifdef CONFIG_CONCURRENT_MODE ++ || (adapter->pbuddy_adapter && is_miracast_enabled(adapter->pbuddy_adapter)) ++ #endif ++ ) ++ miracast_enabled = _TRUE; ++ ++ if (interval > RTW_SCAN_SPARSE_BG_INTERVAL_MS) ++ bg_scan = _TRUE; ++ ++ /* max_allow_ch by conditions*/ ++ ++ #if RTW_SCAN_SPARSE_MIRACAST ++ if (miracast_enabled == _TRUE && busy_traffic == _TRUE) ++ max_allow_ch = rtw_min(max_allow_ch, RTW_SCAN_SPARSE_CH_NUM_MIRACAST); ++ #endif ++ ++ #if RTW_SCAN_SPARSE_BG ++ if (bg_scan == _TRUE) ++ max_allow_ch = rtw_min(max_allow_ch, RTW_SCAN_SPARSE_CH_NUM_BG); ++ #endif ++ ++ ++ if (max_allow_ch != SCAN_SPARSE_CH_NUM_INVALID) { ++ int i; ++ int k = 0; ++ ++ scan_division_num = (ch_num / max_allow_ch) + ((ch_num % max_allow_ch)?1:0); ++ token = (token + 1) % scan_division_num; ++ ++ if (0) ++ DBG_871X("scan_division_num:%u, token:%u\n", scan_division_num, token); ++ ++ for (i = 0; i < ch_num; i++) { ++ if (ch[i].hw_value && (i % scan_division_num) == token ++ ) { ++ if (i != k) ++ _rtw_memcpy(&ch[k], &ch[i], sizeof(struct rtw_ieee80211_channel)); ++ k++; ++ } ++ } ++ ++ _rtw_memset(&ch[k], 0, sizeof(struct rtw_ieee80211_channel)); ++ ++ ret_num = k; ++ mlmeext->last_scan_time = rtw_get_current_time(); ++ } ++ ++exit: ++ return ret_num; ++} ++ ++static int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel *out, + u32 out_num, struct rtw_ieee80211_channel *in, u32 in_num) + { + int i, j; +@@ -12625,7 +13462,7 @@ int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel *out, + for (i=0;ichannel_set, in[i].hw_value)) >=0 +@@ -12654,7 +13491,7 @@ int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel *out, + for (i=0;imax_chan_nums;i++) { + + if (0) +- DBG_871X(FUNC_ADPT_FMT" ch:%u\n", FUNC_ADPT_ARG(padapter), pmlmeext->channel_set[i].ChannelNum); ++ DBG_871X(FUNC_ADPT_FMT" ch:%u\n", FUNC_ADPT_ARG(padapter), pmlmeext->channel_set[i].ChannelNum); + + if (rtw_mlme_band_check(padapter, pmlmeext->channel_set[i].ChannelNum) == _TRUE) { + +@@ -12674,1182 +13511,1250 @@ int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel *out, + } + } + +-#ifdef CONFIG_SCAN_SPARSE //partial scan, ASUS RK3188 use the feature +- /* assume j>6 is normal scan */ +- if ((j > 6) && (padapter->registrypriv.wifi_spec != 1)) +- { +- static u8 token = 0; +- u32 interval; ++ /* scan_sparse */ ++ j = rtw_scan_sparse(padapter, out, j); + +- if (pmlmeext->last_scan_time == 0) +- pmlmeext->last_scan_time = rtw_get_current_time(); ++ return j; ++} + +- interval = rtw_get_passing_time_ms(pmlmeext->last_scan_time); +- if ((interval > ALLOW_SCAN_INTERVAL) +-#if 0 // Miracast can't do AP scan +- || (padapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE) +-#ifdef CONFIG_CONCURRENT_MODE +- || (padapter->pbuddy_adapter +- && (padapter->pbuddy_adapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE)) +-#endif // CONFIG_CONCURRENT_MODE ++static void sitesurvey_res_reset(_adapter *adapter, struct sitesurvey_parm *parm) ++{ ++ struct ss_res *ss = &adapter->mlmeextpriv.sitesurvey_res; ++ int i; ++ ++ ss->bss_cnt = 0; ++ ss->channel_idx = 0; ++#ifdef CONFIG_SCAN_BACKOP ++ ss->scan_cnt = 0; ++#endif ++#if defined(CONFIG_ANTENNA_DIVERSITY) || defined(DBG_SCAN_SW_ANTDIV_BL) ++ ss->is_sw_antdiv_bl_scan = 0; ++#endif ++ ++ for (i = 0; i < RTW_SSID_SCAN_AMOUNT; i++) { ++ if (parm->ssid[i].SsidLength) { ++ _rtw_memcpy(ss->ssid[i].Ssid, parm->ssid[i].Ssid, IW_ESSID_MAX_SIZE); ++ ss->ssid[i].SsidLength = parm->ssid[i].SsidLength; ++ } else { ++ ss->ssid[i].SsidLength = 0; ++ } ++ } ++ ++ ss->ch_num = rtw_scan_ch_decision(adapter ++ , ss->ch, RTW_CHANNEL_SCAN_AMOUNT ++ , parm->ch, parm->ch_num ++ ); ++ ++ ss->scan_mode = parm->scan_mode; ++} ++ ++static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE *type) ++{ ++ u8 next_state; ++ u8 scan_ch = 0; ++ RT_SCAN_TYPE scan_type = SCAN_PASSIVE; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ struct ss_res *ss = &pmlmeext->sitesurvey_res; ++ ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; + #endif +- ) ++ ++ /* handle scan abort request */ ++ scan_abort_hdl(padapter); ++ ++#ifdef CONFIG_P2P ++ if (pwdinfo->rx_invitereq_info.scan_op_ch_only || pwdinfo->p2p_info.scan_op_ch_only) { ++ if (pwdinfo->rx_invitereq_info.scan_op_ch_only) ++ scan_ch = pwdinfo->rx_invitereq_info.operation_ch[ss->channel_idx]; ++ else ++ scan_ch = pwdinfo->p2p_info.operation_ch[ss->channel_idx]; ++ scan_type = SCAN_ACTIVE; ++ } else if (rtw_p2p_findphase_ex_is_social(pwdinfo)) { ++ /* ++ * Commented by Albert 2011/06/03 ++ * The driver is in the find phase, it should go through the social channel. ++ */ ++ int ch_set_idx; ++ ++ scan_ch = pwdinfo->social_chan[ss->channel_idx]; ++ ch_set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, scan_ch); ++ if (ch_set_idx >= 0) ++ scan_type = pmlmeext->channel_set[ch_set_idx].ScanType; ++ else ++ scan_type = SCAN_ACTIVE; ++ } else ++#endif /* CONFIG_P2P */ ++ { ++ struct rtw_ieee80211_channel *ch; ++ ++ if (ss->channel_idx < ss->ch_num) { ++ ch = &ss->ch[ss->channel_idx]; ++ scan_ch = ch->hw_value; ++ scan_type = (ch->flags & RTW_IEEE80211_CHAN_PASSIVE_SCAN) ? SCAN_PASSIVE : SCAN_ACTIVE; ++ } ++ } ++ ++ if (scan_ch != 0) { ++ next_state = SCAN_PROCESS; ++ #ifdef CONFIG_SCAN_BACKOP + { +- // modify scan plan +- int k = 0; +- _rtw_memset(in, 0, sizeof(struct rtw_ieee80211_channel)*in_num); +- _rtw_memcpy(in, out, sizeof(struct rtw_ieee80211_channel)*j); +- _rtw_memset(out, 0, sizeof(struct rtw_ieee80211_channel)*j); ++ u8 sta_num; ++ u8 ld_sta_num; ++ u8 ap_num; ++ u8 ld_ap_num; ++ u8 backop_flags = 0; + +- for (i=0;i 0 && mlmeext_chk_scan_backop_flags_sta(pmlmeext, SS_BACKOP_EN)) ++ || (sta_num > 0 && mlmeext_chk_scan_backop_flags_sta(pmlmeext, SS_BACKOP_EN_NL)) ++ ) { ++ backop_flags |= mlmeext_scan_backop_flags_sta(pmlmeext); ++ } ++ ++ if ((ld_ap_num > 0 && mlmeext_chk_scan_backop_flags_ap(pmlmeext, SS_BACKOP_EN)) ++ || (ap_num > 0 && mlmeext_chk_scan_backop_flags_ap(pmlmeext, SS_BACKOP_EN_NL)) ++ ) { ++ backop_flags |= mlmeext_scan_backop_flags_ap(pmlmeext); ++ } ++ ++ if (backop_flags) { ++ if (ss->scan_cnt < ss->scan_cnt_max) { ++ ss->scan_cnt++; ++ } else { ++ mlmeext_assign_scan_backop_flags(pmlmeext, backop_flags); ++ next_state = SCAN_BACKING_OP; ++ } ++ } ++ } ++ #endif /* CONFIG_SCAN_BACKOP */ ++ } else if (rtw_p2p_findphase_ex_is_needed(pwdinfo)) { ++ /* go p2p listen */ ++ next_state = SCAN_TO_P2P_LISTEN; ++ ++ #ifdef CONFIG_ANTENNA_DIVERSITY ++ } else if (rtw_hal_antdiv_before_linked(padapter)) { ++ /* go sw antdiv before link */ ++ next_state = SCAN_SW_ANTDIV_BL; ++ #endif ++ } else { ++ next_state = SCAN_COMPLETE; ++ ++ #if defined(DBG_SCAN_SW_ANTDIV_BL) ++ { ++ /* for SCAN_SW_ANTDIV_BL state testing */ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); ++ int i; ++ bool is_linked = _FALSE; ++ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ if (rtw_linked_check(dvobj->padapters[i])) ++ is_linked = _TRUE; ++ } ++ ++ if (!is_linked) { ++ static bool fake_sw_antdiv_bl_state = 0; ++ ++ if (fake_sw_antdiv_bl_state == 0) { ++ next_state = SCAN_SW_ANTDIV_BL; ++ fake_sw_antdiv_bl_state = 1; ++ } else { ++ fake_sw_antdiv_bl_state = 0; + } +- if(k>=out_num) +- break; + } ++ } ++ #endif /* defined(DBG_SCAN_SW_ANTDIV_BL) */ ++ } ++ ++ #ifdef CONFIG_SCAN_BACKOP ++ if (next_state != SCAN_PROCESS) ++ ss->scan_cnt = 0; ++ #endif ++ ++ ++#ifdef DBG_FIXED_CHAN ++ if (pmlmeext->fixed_chan != 0xff && next_state == SCAN_PROCESS) ++ scan_ch = pmlmeext->fixed_chan; ++#endif ++ ++ if (ch) ++ *ch = scan_ch; ++ if (type) ++ *type = scan_type; ++ ++ return next_state; ++} ++ ++void site_survey(_adapter *padapter, u8 survey_channel, RT_SCAN_TYPE ScanType) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++#endif + +- j = k; +- token = (token+1)%SCAN_DIVISION_NUM; ++ if (survey_channel != 0) { ++ set_channel_bwmode(padapter, survey_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ ++ #ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ if (ACS_ENABLE == GET_ACS_STATE(padapter)) { ++ ACS_OP acs_op = ACS_RESET; ++ ++ rtw_hal_set_odm_var(padapter, HAL_ODM_AUTO_CHNL_SEL, &acs_op, _TRUE); ++ rtw_set_acs_channel(padapter, survey_channel); ++ #ifdef DBG_AUTO_CHNL_SEL_NHM ++ DBG_871X("[ACS-"ADPT_FMT"]-set ch:%u\n", ++ ADPT_ARG(padapter), rtw_get_acs_channel(padapter)); ++ #endif + } ++ #endif + +- pmlmeext->last_scan_time = rtw_get_current_time(); ++ if (ScanType == SCAN_ACTIVE) { ++ #ifdef CONFIG_P2P ++ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || ++ rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) ++ ) { ++ issue_probereq_p2p(padapter, NULL); ++ issue_probereq_p2p(padapter, NULL); ++ issue_probereq_p2p(padapter, NULL); ++ } else ++ #endif /* CONFIG_P2P */ ++ { ++ int i; ++ ++ for (i = 0; i < RTW_SSID_SCAN_AMOUNT; i++) { ++ if (pmlmeext->sitesurvey_res.ssid[i].SsidLength) { ++ /* IOT issue, When wifi_spec is not set, send one probe req without WPS IE. */ ++ if (padapter->registrypriv.wifi_spec) ++ issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL); ++ else ++ issue_probereq_ex(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL, 0, 0, 0, 0); ++ issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL); ++ } ++ } ++ ++ if (pmlmeext->sitesurvey_res.scan_mode == SCAN_ACTIVE) { ++ /* IOT issue, When wifi_spec is not set, send one probe req without WPS IE. */ ++ if (padapter->registrypriv.wifi_spec) ++ issue_probereq(padapter, NULL, NULL); ++ else ++ issue_probereq_ex(padapter, NULL, NULL, 0, 0, 0, 0); ++ issue_probereq(padapter, NULL, NULL); ++ } ++ } ++ } ++ } else { ++ /* channel number is 0 or this channel is not valid. */ ++ rtw_warn_on(1); + } +-#endif //CONFIG_SCAN_SPARSE + +- return j; ++ return; + } + +-u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf) ++void survey_done_set_ch_bw(_adapter *padapter) + { +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct sitesurvey_parm *pparm = (struct sitesurvey_parm *)pbuf; +- u8 bdelayscan = _FALSE; +- u8 val8; +- u32 initialgain; +- u32 i; +- struct dvobj_priv *psdpriv = padapter->dvobj; +- struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ u8 cur_channel = 0; ++ u8 cur_bwmode; ++ u8 cur_ch_offset; ++ ++ if (rtw_get_ch_setting_union(padapter, &cur_channel, &cur_bwmode, &cur_ch_offset) != 0) { ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", ++ FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); ++ } else { ++ #ifdef CONFIG_P2P ++ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); ++ _adapter *iface; ++ int i; + +-#ifdef CONFIG_P2P +- struct wifidirect_info* pwdinfo = &padapter->wdinfo; +-#endif +-#ifdef DBG_CHECK_FW_PS_STATE +- if(rtw_fw_ps_state(padapter) == _FAIL) +- { +- DBG_871X("scan without leave 32k\n"); +- pdbgpriv->dbg_scan_pwr_state_cnt++; +- } +-#endif //DBG_CHECK_FW_PS_STATE ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ iface = dvobj->padapters[i]; ++ if (!iface) ++ continue; + +- if (pmlmeext->sitesurvey_res.state == SCAN_DISABLE) +- { +-#ifdef CONFIG_CONCURRENT_MODE +- //for first time sitesurvey_cmd +- rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); +-#endif //CONFIG_CONCURRENT_MODE +- +- pmlmeext->sitesurvey_res.state = SCAN_START; +- pmlmeext->sitesurvey_res.bss_cnt = 0; +- pmlmeext->sitesurvey_res.channel_idx = 0; +- +- for(i=0;issid[i].SsidLength) { +- _rtw_memcpy(pmlmeext->sitesurvey_res.ssid[i].Ssid, pparm->ssid[i].Ssid, IW_ESSID_MAX_SIZE); +- pmlmeext->sitesurvey_res.ssid[i].SsidLength= pparm->ssid[i].SsidLength; +- } else { +- pmlmeext->sitesurvey_res.ssid[i].SsidLength= 0; ++ #ifdef CONFIG_IOCTL_CFG80211 ++ if (iface->wdinfo.driver_interface == DRIVER_CFG80211 && !adapter_wdev_data(iface)->p2p_enabled) ++ continue; ++ #endif ++ ++ if (rtw_p2p_chk_state(&iface->wdinfo, P2P_STATE_LISTEN)) { ++ cur_channel = iface->wdinfo.listen_channel; ++ cur_bwmode = CHANNEL_WIDTH_20; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" back to "ADPT_FMT"'s listen ch - ch:%u, bw:%u, offset:%u\n", ++ FUNC_ADPT_ARG(padapter), ADPT_ARG(iface), cur_channel, cur_bwmode, cur_ch_offset); ++ break; + } + } ++ #endif /* CONFIG_P2P */ + +- pmlmeext->sitesurvey_res.ch_num = rtw_scan_ch_decision(padapter +- , pmlmeext->sitesurvey_res.ch, RTW_CHANNEL_SCAN_AMOUNT +- , pparm->ch, pparm->ch_num +- ); +- +- pmlmeext->sitesurvey_res.scan_mode = pparm->scan_mode; ++ if (cur_channel == 0) { ++ cur_channel = pmlmeext->cur_channel; ++ cur_bwmode = pmlmeext->cur_bwmode; ++ cur_ch_offset = pmlmeext->cur_ch_offset; ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" back to ch:%u, bw:%u, offset:%u\n", ++ FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); ++ } ++ } + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- bdelayscan = dc_handle_site_survey(padapter); +-#endif ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++} + +- //issue null data if associating to the AP +- if (is_client_associated_to_ap(padapter) == _TRUE) +- { +- pmlmeext->sitesurvey_res.state = SCAN_TXNULL; ++/** ++ * sitesurvey_ps_annc - check and doing ps announcement for all the adapters of given @dvobj ++ * @dvobj: the dvobj to check ++ * @ps: power saving or not ++ * ++ * Returns: 0: no ps announcement is doing. 1: ps announcement is doing ++ */ ++u8 sitesurvey_ps_annc(struct dvobj_priv *dvobj, bool ps) ++{ ++ _adapter *adapter; ++ int i; ++ u8 ps_anc = 0; + +- issue_nulldata(padapter, NULL, 1, 3, 500); ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ adapter = dvobj->padapters[i]; ++ if (!adapter) ++ continue; + +-#ifdef CONFIG_CONCURRENT_MODE +- if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) +- { +- DBG_871X("adapter is scanning(buddy_adapter is linked), issue nulldata(pwrbit=1)\n"); +- +- issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); ++ if (ps) { ++ if (is_client_associated_to_ap(adapter) == _TRUE) { ++ /* TODO: TDLS peers */ ++ issue_nulldata(adapter, NULL, 1, 3, 500); ++ ps_anc = 1; + } +-#endif +- bdelayscan = _TRUE; +- } +-#ifdef CONFIG_CONCURRENT_MODE +- else if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) +- { +- #ifdef CONFIG_TDLS +- if(padapter->pbuddy_adapter->wdinfo.wfd_tdls_enable == 1) +- { +- issue_tunneled_probe_req(padapter->pbuddy_adapter); ++ } else { ++ if (is_client_associated_to_ap(adapter) == _TRUE) { ++ /* TODO: TDLS peers */ ++ issue_nulldata(adapter, NULL, 0, 3, 500); ++ ps_anc = 1; + } +- #endif //CONFIG_TDLS +- +- pmlmeext->sitesurvey_res.state = SCAN_TXNULL; +- +- issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); +- +- bdelayscan = _TRUE; +- } +-#endif +- if(bdelayscan) +- { +- //delay 50ms to protect nulldata(1). +- set_survey_timer(pmlmeext, 50); +- return H2C_SUCCESS; + } + } + +- if ((pmlmeext->sitesurvey_res.state == SCAN_START) || (pmlmeext->sitesurvey_res.state == SCAN_TXNULL)) +- { +-#ifdef CONFIG_FIND_BEST_CHANNEL +-#if 0 +- for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) { +- pmlmeext->channel_set[i].rx_count = 0; +- } ++ return ps_anc; ++} ++ ++void sitesurvey_set_igi(_adapter *adapter, bool enter) ++{ ++ u8 igi; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; + #endif +-#endif /* CONFIG_FIND_BEST_CHANNEL */ + +- //config the initial gain under scaning, need to write the BB registers ++ if (enter) { + #ifdef CONFIG_P2P + #ifdef CONFIG_IOCTL_CFG80211 +- if(adapter_wdev_data(padapter)->p2p_enabled == _TRUE && pwdinfo->driver_interface == DRIVER_CFG80211 ) +- initialgain = 0x30; ++ if (adapter_wdev_data(adapter)->p2p_enabled == _TRUE && pwdinfo->driver_interface == DRIVER_CFG80211) ++ igi = 0x30; + else +-#endif //CONFIG_IOCTL_CFG80211 +- if ( !rtw_p2p_chk_state( pwdinfo, P2P_STATE_NONE ) ) +- initialgain = 0x28; ++#endif /* CONFIG_IOCTL_CFG80211 */ ++ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ igi = 0x28; + else +-#endif //CONFIG_P2P +- initialgain = 0x1e; +- +- rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); +- +- //disable dynamic functions, such as high power, DIG +- Save_DM_Func_Flag(padapter); +- Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); +- +- //set MSR to no link state +- Set_MSR(padapter, _HW_STATE_NOLINK_); +- +- val8 = 1; //under site survey +- rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); +- +- pmlmeext->sitesurvey_res.state = SCAN_PROCESS; +- } +- +- site_survey(padapter); +- +- return H2C_SUCCESS; +- +-} +- +-u8 setauth_hdl(_adapter *padapter, unsigned char *pbuf) +-{ +- struct setauth_parm *pparm = (struct setauth_parm *)pbuf; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- if (pparm->mode < 4) +- { +- pmlmeinfo->auth_algo = pparm->mode; ++#endif /* CONFIG_P2P */ ++ igi = 0x1e; ++ } else { ++ igi = 0xff; /* restore RX GAIN */ + } + +- return H2C_SUCCESS; ++ rtw_hal_set_odm_var(adapter, HAL_ODM_INITIAL_GAIN, &igi, _FALSE); + } + +-u8 setkey_hdl(_adapter *padapter, u8 *pbuf) ++u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf) + { +- u16 ctrl = 0; +- s16 cam_id = 0; +- struct setkey_parm *pparm = (struct setkey_parm *)pbuf; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- unsigned char null_addr[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; +- u8 *addr; +- +- //main tx key for wep. +- if(pparm->set_tx) +- pmlmeinfo->key_index = pparm->keyid; ++ struct sitesurvey_parm *pparm = (struct sitesurvey_parm *)pbuf; ++ struct dvobj_priv *dvobj = padapter->dvobj; ++ struct debug_priv *pdbgpriv = &dvobj->drv_dbg; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct ss_res *ss = &pmlmeext->sitesurvey_res; ++ u8 val8; + +- cam_id = rtw_camid_alloc(padapter, NULL, pparm->keyid); ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++#endif + +- if (cam_id < 0){ +- } else { +- if (cam_id > 3) /* not default key, searched by A2 */ +- addr = get_bssid(&padapter->mlmepriv); +- else +- addr = null_addr; +- +- ctrl = BIT(15) | BIT6 |((pparm->algorithm) << 2) | pparm->keyid; +- write_cam(padapter, cam_id, ctrl, addr, pparm->key); +- DBG_871X_LEVEL(_drv_always_, "set group key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n" +- ,cam_id, MAC_ARG(addr), pparm->keyid, security_type_str(pparm->algorithm)); ++#ifdef DBG_CHECK_FW_PS_STATE ++ if (rtw_fw_ps_state(padapter) == _FAIL) { ++ DBG_871X("scan without leave 32k\n"); ++ pdbgpriv->dbg_scan_pwr_state_cnt++; + } ++#endif /* DBG_CHECK_FW_PS_STATE */ + +- #ifdef DYNAMIC_CAMID_ALLOC +- if (cam_id >=0 && cam_id <=3) +- rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8*)_TRUE); +- #endif ++ /* increase channel idx */ ++ if (mlmeext_chk_scan_state(pmlmeext, SCAN_PROCESS)) ++ ss->channel_idx++; + +- //allow multicast packets to driver +- padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_ON_RCR_AM, null_addr); ++ /* update scan state to next state (assigned by previous cmd hdl) */ ++ if (mlmeext_scan_state(pmlmeext) != mlmeext_scan_next_state(pmlmeext)) ++ mlmeext_set_scan_state(pmlmeext, mlmeext_scan_next_state(pmlmeext)); + +- return H2C_SUCCESS; +-} ++operation_by_state: ++ switch (mlmeext_scan_state(pmlmeext)) { + +-u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf) +-{ +- u16 ctrl = 0; +- s16 cam_id = 0; +- u8 ret = H2C_SUCCESS; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct set_stakey_parm *pparm = (struct set_stakey_parm *)pbuf; +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct sta_info *psta; +-#ifdef CONFIG_TDLS +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +-#endif //CONFIG_TDLS ++ case SCAN_DISABLE: ++ /* ++ * SW parameter initialization ++ */ + +- if(pparm->algorithm == _NO_PRIVACY_) +- goto write_to_cam; ++ sitesurvey_res_reset(padapter, pparm); ++ mlmeext_set_scan_state(pmlmeext, SCAN_START); ++ goto operation_by_state; + +- psta = rtw_get_stainfo(pstapriv, pparm->addr); +- if (!psta) { +- DBG_871X_LEVEL(_drv_always_, "%s sta:"MAC_FMT" not found\n", __func__, MAC_ARG(pparm->addr)); +- ret = H2C_REJECTED; +- goto exit; +- } ++ case SCAN_START: ++ /* ++ * prepare to leave operating channel ++ */ + +- pmlmeinfo->enc_algo = pparm->algorithm; +- cam_id = rtw_camid_alloc(padapter, psta, 0); +- if (cam_id < 0) +- goto exit; ++ /* apply rx ampdu setting */ ++ if (ss->rx_ampdu_accept != RX_AMPDU_ACCEPT_INVALID ++ || ss->rx_ampdu_size != RX_AMPDU_SIZE_INVALID ++ ) { ++ rtw_rx_ampdu_apply(padapter); ++ } + +-write_to_cam: +- if(pparm->algorithm == _NO_PRIVACY_) { +- while((cam_id = rtw_camid_search(padapter, pparm->addr, -1)) >= 0) { +- DBG_871X_LEVEL(_drv_always_, "clear key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(pparm->addr), cam_id); +- clear_cam_entry(padapter, cam_id); +- rtw_camid_free(padapter,cam_id); ++ /* clear HW TX queue before scan */ ++ rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); ++ ++ /* power save state announcement */ ++ if (sitesurvey_ps_annc(adapter_to_dvobj(padapter), 1)) { ++ mlmeext_set_scan_state(pmlmeext, SCAN_PS_ANNC_WAIT); ++ mlmeext_set_scan_next_state(pmlmeext, SCAN_ENTER); ++ set_survey_timer(pmlmeext, 50); /* delay 50ms to protect nulldata(1) */ ++ } else { ++ mlmeext_set_scan_state(pmlmeext, SCAN_ENTER); ++ goto operation_by_state; + } +- } else { +- DBG_871X_LEVEL(_drv_always_, "set pairwise key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n", +- cam_id, MAC_ARG(pparm->addr), pparm->keyid, security_type_str(pparm->algorithm)); +- ctrl = BIT(15) | ((pparm->algorithm) << 2) | pparm->keyid; +- write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key); +- } +- ret = H2C_SUCCESS_RSP; + +-exit: +- return ret; +-} ++ break; + +-u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf) +-{ +- struct addBaReq_parm *pparm = (struct addBaReq_parm *)pbuf; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ case SCAN_ENTER: ++ /* ++ * HW register and DM setting for enter scan ++ */ + +- struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, pparm->addr); +- +- if(!psta) +- return H2C_SUCCESS; ++ /* config the initial gain under scanning */ ++ sitesurvey_set_igi(padapter, 1); + +-#ifdef CONFIG_80211N_HT +- if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && (pmlmeinfo->HT_enable)) || +- ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) +- { +- //pmlmeinfo->ADDBA_retry_count = 0; +- //pmlmeinfo->candidate_tid_bitmap |= (0x1 << pparm->tid); +- //psta->htpriv.candidate_tid_bitmap |= BIT(pparm->tid); +- issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid); +- //_set_timer(&pmlmeext->ADDBA_timer, ADDBA_TO); +- _set_timer(&psta->addba_retry_timer, ADDBA_TO); +- } +-#ifdef CONFIG_TDLS +- else if((psta->tdls_sta_state & TDLS_LINKED_STATE)&& +- (psta->htpriv.ht_option==_TRUE) && +- (psta->htpriv.ampdu_enable==_TRUE) ) +- { +- issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid); +- //_set_timer(&pmlmeext->ADDBA_timer, ADDBA_TO); +- _set_timer(&psta->addba_retry_timer, ADDBA_TO); +- } +-#endif //CONFIG +- else +- { +- psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid); +- } +-#endif //CONFIG_80211N_HT +- return H2C_SUCCESS; +-} ++ /* disable dynamic functions, such as high power, DIG */ ++ rtw_phydm_ability_backup(padapter); ++ rtw_phydm_func_for_offchannel(padapter); ++ /* set MSR to no link state */ ++ Set_MSR(padapter, _HW_STATE_NOLINK_); ++ val8 = 1; /* under site survey */ ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); + ++ mlmeext_set_scan_state(pmlmeext, SCAN_PROCESS); ++ goto operation_by_state; + +-u8 chk_bmc_sleepq_cmd(_adapter* padapter) +-{ +- struct cmd_obj *ph2c; +- struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); +- u8 res = _SUCCESS; ++ case SCAN_PROCESS: ++ { ++ u8 scan_ch; ++ RT_SCAN_TYPE scan_type; ++ u8 next_state; ++ u32 scan_ms; + +-_func_enter_; ++ #ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ if ((ACS_ENABLE == GET_ACS_STATE(padapter)) && (0 != rtw_get_acs_channel(padapter))) { ++ ACS_OP acs_op = ACS_SELECT; + +- if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) +- { +- res= _FAIL; +- goto exit; +- } ++ rtw_hal_set_odm_var(padapter, HAL_ODM_AUTO_CHNL_SEL, &acs_op, _TRUE); ++ } ++ #endif + +- init_h2fwcmd_w_parm_no_parm_rsp(ph2c, GEN_CMD_CODE(_ChkBMCSleepq)); ++ next_state = sitesurvey_pick_ch_behavior(padapter, &scan_ch, &scan_type); ++ if (next_state != SCAN_PROCESS) { ++ #ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ if (ACS_ENABLE == GET_ACS_STATE(padapter)) { ++ rtw_set_acs_channel(padapter, 0); ++ #ifdef DBG_AUTO_CHNL_SEL_NHM ++ DBG_871X("[ACS-"ADPT_FMT"]-set ch:%u\n", ADPT_ARG(padapter), rtw_get_acs_channel(padapter)); ++ #endif ++ } ++ #endif + +- res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ mlmeext_set_scan_state(pmlmeext, next_state); ++ goto operation_by_state; ++ } + +-exit: ++ /* still SCAN_PROCESS state */ ++ if (0) ++ #ifdef CONFIG_P2P ++ DBG_871X(FUNC_ADPT_FMT" %s ch:%u (cnt:%u,idx:%d) at %dms, %c%c%c\n" ++ , FUNC_ADPT_ARG(padapter) ++ , mlmeext_scan_state_str(pmlmeext) ++ , scan_ch ++ , pwdinfo->find_phase_state_exchange_cnt, ss->channel_idx ++ , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) ++ , scan_type?'A':'P', ss->scan_mode?'A':'P' ++ , ss->ssid[0].SsidLength?'S':' ' ++ ); ++ #else ++ DBG_871X(FUNC_ADPT_FMT" %s ch:%u (idx:%d) at %dms, %c%c%c\n" ++ , FUNC_ADPT_ARG(padapter) ++ , mlmeext_scan_state_str(pmlmeext) ++ , scan_ch ++ , ss->channel_idx ++ , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) ++ , scan_type?'A':'P', ss->scan_mode?'A':'P' ++ , ss->ssid[0].SsidLength?'S':' ' ++ ); ++ #endif /* CONFIG_P2P */ + +-_func_exit_; ++ #ifdef DBG_FIXED_CHAN ++ if (pmlmeext->fixed_chan != 0xff) ++ DBG_871X(FUNC_ADPT_FMT" fixed_chan:%u\n", pmlmeext->fixed_chan); ++ #endif + +- return res; +-} ++ site_survey(padapter, scan_ch, scan_type); + +-u8 set_tx_beacon_cmd(_adapter* padapter) +-{ +- struct cmd_obj *ph2c; +- struct Tx_Beacon_param *ptxBeacon_parm; +- struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- u8 res = _SUCCESS; +- int len_diff = 0; +- +-_func_enter_; ++ #if defined(CONFIG_ATMEL_RC_PATCH) ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ scan_ms = 20; ++ else ++ scan_ms = 40; ++ #else ++ scan_ms = ss->scan_ch_ms; ++ #endif + +- if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) +- { +- res= _FAIL; +- goto exit; +- } ++ #if defined(CONFIG_ANTENNA_DIVERSITY) || defined(DBG_SCAN_SW_ANTDIV_BL) ++ if (ss->is_sw_antdiv_bl_scan) ++ scan_ms = scan_ms/2; ++ #endif + +- if ((ptxBeacon_parm = (struct Tx_Beacon_param *)rtw_zmalloc(sizeof(struct Tx_Beacon_param))) == NULL) +- { +- rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); +- res= _FAIL; +- goto exit; ++ #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) ++ { ++ struct noise_info info; ++ ++ info.bPauseDIG = _FALSE; ++ info.IGIValue = 0; ++ info.max_time = scan_ms/2; ++ info.chan = scan_ch; ++ rtw_hal_set_odm_var(padapter, HAL_ODM_NOISE_MONITOR, &info, _FALSE); ++ } ++ #endif ++ ++ set_survey_timer(pmlmeext, scan_ms); ++ break; + } + +- _rtw_memcpy(&(ptxBeacon_parm->network), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX)); ++ #ifdef CONFIG_SCAN_BACKOP ++ case SCAN_BACKING_OP: ++ { ++ u8 back_ch, back_bw, back_ch_offset; + +- len_diff = update_hidden_ssid( +- ptxBeacon_parm->network.IEs+_BEACON_IE_OFFSET_ +- , ptxBeacon_parm->network.IELength-_BEACON_IE_OFFSET_ +- , pmlmeinfo->hidden_ssid_mode +- ); +- ptxBeacon_parm->network.IELength += len_diff; ++ if (rtw_get_ch_setting_union(padapter, &back_ch, &back_bw, &back_ch_offset) == 0) ++ rtw_warn_on(1); + +- init_h2fwcmd_w_parm_no_rsp(ph2c, ptxBeacon_parm, GEN_CMD_CODE(_TX_Beacon)); ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" %s ch:%u, bw:%u, offset:%u at %dms\n" ++ , FUNC_ADPT_ARG(padapter) ++ , mlmeext_scan_state_str(pmlmeext) ++ , back_ch, back_bw, back_ch_offset ++ , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) ++ ); + +- res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ set_channel_bwmode(padapter, back_ch, back_ch_offset, back_bw); + +- +-exit: +- +-_func_exit_; ++ Set_MSR(padapter, (pmlmeinfo->state & 0x3)); ++ val8 = 0; /* survey done */ ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); + +- return res; +-} ++ if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_PS_ANNC)) { ++ sitesurvey_set_igi(padapter, 0); ++ sitesurvey_ps_annc(adapter_to_dvobj(padapter), 0); ++ } + ++ mlmeext_set_scan_state(pmlmeext, SCAN_BACK_OP); ++ ss->backop_time = rtw_get_current_time(); + +-u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf) +-{ +- u8 evt_code, evt_seq; +- u16 evt_sz; +- uint *peventbuf; +- void (*event_callback)(_adapter *dev, u8 *pbuf); +- struct evt_priv *pevt_priv = &(padapter->evtpriv); ++ if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_TX_RESUME)) { ++ int i; + +- if (pbuf == NULL) +- goto _abort_event_; ++ /* resume TX */ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ if (!dvobj->padapters[i]) ++ continue; + +- peventbuf = (uint*)pbuf; +- evt_sz = (u16)(*peventbuf&0xffff); +- evt_seq = (u8)((*peventbuf>>24)&0x7f); +- evt_code = (u8)((*peventbuf>>16)&0xff); +- +- +- #ifdef CHECK_EVENT_SEQ +- // checking event sequence... +- if (evt_seq != (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f) ) +- { +- RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("Evetn Seq Error! %d vs %d\n", (evt_seq & 0x7f), (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f))); +- +- pevt_priv->event_seq = (evt_seq+1)&0x7f; ++ rtw_os_xmit_schedule(dvobj->padapters[i]); ++ } ++ } + +- goto _abort_event_; ++ goto operation_by_state; + } +- #endif ++ ++ case SCAN_BACK_OP: ++ if (rtw_get_passing_time_ms(ss->backop_time) >= ss->backop_ms ++ || pmlmeext->scan_abort ++ ) { ++ mlmeext_set_scan_state(pmlmeext, SCAN_LEAVING_OP); ++ goto operation_by_state; ++ } ++ set_survey_timer(pmlmeext, 50); ++ break; + +- // checking if event code is valid +- if (evt_code >= MAX_C2HEVT) +- { +- RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent Code(%d) mismatch!\n", evt_code)); +- goto _abort_event_; +- } ++ case SCAN_LEAVING_OP: ++ /* ++ * prepare to leave operating channel ++ */ + +- // checking if event size match the event parm size +- if ((wlanevents[evt_code].parmsize != 0) && +- (wlanevents[evt_code].parmsize != evt_sz)) +- { +- +- RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent(%d) Parm Size mismatch (%d vs %d)!\n", +- evt_code, wlanevents[evt_code].parmsize, evt_sz)); +- goto _abort_event_; +- +- } ++ /* clear HW TX queue before scan */ ++ rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); + +- ATOMIC_INC(&pevt_priv->event_seq); ++ if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_PS_ANNC) ++ && sitesurvey_ps_annc(adapter_to_dvobj(padapter), 1) ++ ) { ++ mlmeext_set_scan_state(pmlmeext, SCAN_PS_ANNC_WAIT); ++ mlmeext_set_scan_next_state(pmlmeext, SCAN_LEAVE_OP); ++ set_survey_timer(pmlmeext, 50); /* delay 50ms to protect nulldata(1) */ ++ } else { ++ mlmeext_set_scan_state(pmlmeext, SCAN_LEAVE_OP); ++ goto operation_by_state; ++ } + +- peventbuf += 2; +- +- if(peventbuf) +- { +- event_callback = wlanevents[evt_code].event_callback; +- event_callback(padapter, (u8*)peventbuf); ++ break; + +- pevt_priv->evt_done_cnt++; +- } ++ case SCAN_LEAVE_OP: ++ /* ++ * HW register and DM setting for enter scan ++ */ + ++ if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_PS_ANNC)) { ++ /* config the initial gain under scanning */ ++ sitesurvey_set_igi(padapter, 1); ++ } + +-_abort_event_: ++ /* set MSR to no link state */ ++ Set_MSR(padapter, _HW_STATE_NOLINK_); ++ val8 = 1; //under site survey ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); + ++ mlmeext_set_scan_state(pmlmeext, SCAN_PROCESS); ++ goto operation_by_state; + +- return H2C_SUCCESS; +- +-} ++ #endif /* CONFIG_SCAN_BACKOP */ + +-u8 h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) +-{ +- if(!pbuf) +- return H2C_PARAMETERS_ERROR; ++ #if defined(CONFIG_ANTENNA_DIVERSITY) || defined(DBG_SCAN_SW_ANTDIV_BL) ++ case SCAN_SW_ANTDIV_BL: ++ /* ++ * 20100721 ++ * For SW antenna diversity before link, it needs to switch to another antenna and scan again. ++ * It compares the scan result and select better one to do connection. ++ */ ++ ss->bss_cnt = 0; ++ ss->channel_idx = 0; ++ ss->is_sw_antdiv_bl_scan = 1; + +- return H2C_SUCCESS; +-} ++ mlmeext_set_scan_next_state(pmlmeext, SCAN_PROCESS); ++ set_survey_timer(pmlmeext, ss->scan_ch_ms); ++ break; ++ #endif + +-u8 chk_bmc_sleepq_hdl(_adapter *padapter, unsigned char *pbuf) +-{ +-#ifdef CONFIG_AP_MODE +- _irqL irqL; +- struct sta_info *psta_bmc; +- _list *xmitframe_plist, *xmitframe_phead; +- struct xmit_frame *pxmitframe=NULL; +- struct xmit_priv *pxmitpriv = &padapter->xmitpriv; +- struct sta_priv *pstapriv = &padapter->stapriv; ++ #ifdef CONFIG_P2P ++ case SCAN_TO_P2P_LISTEN: ++ /* ++ * Set the P2P State to the listen state of find phase ++ * and set the current channel to the listen channel ++ */ ++ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_LISTEN); ++ ++ /* turn on phy-dynamic functions */ ++ rtw_phydm_ability_restore(padapter); + +- //for BC/MC Frames +- psta_bmc = rtw_get_bcmc_stainfo(padapter); +- if(!psta_bmc) +- return H2C_SUCCESS; ++ sitesurvey_set_igi(padapter, 0); + +- if((pstapriv->tim_bitmap&BIT(0)) && (psta_bmc->sleepq_len>0)) +- { +-#ifndef CONFIG_PCI_HCI +- rtw_msleep_os(10);// 10ms, ATIM(HIQ) Windows +-#endif +- //_enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); +- _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ mlmeext_set_scan_state(pmlmeext, SCAN_P2P_LISTEN); ++ _set_timer(&pwdinfo->find_phase_timer, (u32)((u32)pwdinfo->listen_dwell * 100)); ++ break; + +- xmitframe_phead = get_list_head(&psta_bmc->sleep_q); +- xmitframe_plist = get_next(xmitframe_phead); ++ case SCAN_P2P_LISTEN: ++ mlmeext_set_scan_state(pmlmeext, SCAN_PROCESS); ++ ss->channel_idx = 0; ++ goto operation_by_state; ++ #endif /* CONFIG_P2P */ ++ ++ case SCAN_COMPLETE: ++ #ifdef CONFIG_P2P ++ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) ++ || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) ++ ) { ++ #ifdef CONFIG_CONCURRENT_MODE ++ if (pwdinfo->driver_interface == DRIVER_WEXT) { ++ if (check_buddy_fwstate(padapter, _FW_LINKED)) ++ _set_timer(&pwdinfo->ap_p2p_switch_timer, 500); ++ } ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ #else ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ #endif ++ } ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); ++ #endif /* CONFIG_P2P */ + +- while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) +- { +- pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ /* switch channel */ ++ survey_done_set_ch_bw(padapter); + +- xmitframe_plist = get_next(xmitframe_plist); ++ /* config MSR */ ++ Set_MSR(padapter, (pmlmeinfo->state & 0x3)); ++ val8 = 0; /* survey done */ ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); + +- rtw_list_delete(&pxmitframe->list); ++ /* turn on phy-dynamic functions */ ++ rtw_phydm_ability_restore(padapter); + +- psta_bmc->sleepq_len--; +- if(psta_bmc->sleepq_len>0) +- pxmitframe->attrib.mdata = 1; +- else +- pxmitframe->attrib.mdata = 0; ++ sitesurvey_set_igi(padapter, 0); + +- pxmitframe->attrib.triggered=1; ++ sitesurvey_ps_annc(adapter_to_dvobj(padapter), 0); + +- if (xmitframe_hiq_filter(pxmitframe) == _TRUE) +- pxmitframe->attrib.qsel = QSLT_HIGH;//HIQ ++ /* apply rx ampdu setting */ ++ rtw_rx_ampdu_apply(padapter); + +- #if 0 +- _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); +- if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) +- { +- rtw_os_xmit_complete(padapter, pxmitframe); +- } +- _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); +- #endif +- rtw_hal_xmitframe_enqueue(padapter, pxmitframe); +- } ++ mlmeext_set_scan_state(pmlmeext, SCAN_DISABLE); + +- //_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); +- _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ report_surveydone_event(padapter); + +- if (padapter->interface_type != RTW_PCIE) { +- /* check hi queue and bmc_sleepq */ +- rtw_chk_hi_queue_cmd(padapter); +- } ++ issue_action_BSSCoexistPacket(padapter); ++ issue_action_BSSCoexistPacket(padapter); ++ issue_action_BSSCoexistPacket(padapter); + } +-#endif + + return H2C_SUCCESS; + } + +-u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf) ++u8 setauth_hdl(_adapter *padapter, unsigned char *pbuf) + { +- if(send_beacon(padapter)==_FAIL) ++ struct setauth_parm *pparm = (struct setauth_parm *)pbuf; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (pparm->mode < 4) + { +- DBG_871X("issue_beacon, fail!\n"); +- return H2C_PARAMETERS_ERROR; ++ pmlmeinfo->auth_algo = pparm->mode; + } + +- /* tx bc/mc frames after update TIM */ +- chk_bmc_sleepq_hdl(padapter, NULL); +- +- return H2C_SUCCESS; ++ return H2C_SUCCESS; + } + +-void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork) ++u8 setkey_hdl(_adapter *padapter, u8 *pbuf) + { +- u8 network_type,rate_len, total_rate_len,remainder_rate_len; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- u8 erpinfo=0x4; ++ u16 ctrl = 0; ++ s16 cam_id = 0; ++ struct setkey_parm *pparm = (struct setkey_parm *)pbuf; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ unsigned char null_addr[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; ++ struct set_stakey_parm sta_pparm; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ u8 *addr; ++ bool used; + +- //DBG_871X("%s\n", __FUNCTION__); ++ //main tx key for wep. ++ if(pparm->set_tx) ++ pmlmeinfo->key_index = pparm->keyid; + +- if(pmlmeext->cur_channel >= 36) +- { +- network_type = WIRELESS_11A; +- total_rate_len = IEEE80211_NUM_OFDM_RATESLEN; +- DBG_871X("%s(): change to 5G Band\n",__FUNCTION__); +- rtw_remove_bcn_ie(padapter, pnetwork, _ERPINFO_IE_); +- } ++ cam_id = rtw_camid_alloc(padapter, NULL, pparm->keyid, &used); ++ ++ if (cam_id < 0) ++ goto enable_mc; ++ ++ if (cam_id > 3) /* not default key, searched by A2 */ ++ addr = get_bssid(&padapter->mlmepriv); + else +- { +- network_type = WIRELESS_11BG; +- total_rate_len = IEEE80211_CCK_RATE_LEN+IEEE80211_NUM_OFDM_RATESLEN; +- DBG_871X("%s(): change to 2.4G Band\n",__FUNCTION__); +- rtw_add_bcn_ie(padapter, pnetwork, _ERPINFO_IE_, &erpinfo, 1); +- } ++ addr = null_addr; + +- rtw_set_supported_rate(pnetwork->SupportedRates, network_type); ++ #ifdef DYNAMIC_CAMID_ALLOC ++ /* cam entry searched is pairwise key */ ++ if (used == _TRUE && rtw_camid_is_gk(padapter, cam_id) == _FALSE) { ++ s16 camid_clr; + +- UpdateBrateTbl(padapter, pnetwork->SupportedRates); +- rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" group key with "MAC_FMT" id:%u the same key id as pairwise key\n" ++ , FUNC_ADPT_ARG(padapter), MAC_ARG(addr), pparm->keyid); + +- if(total_rate_len > 8) +- { +- rate_len = 8; +- remainder_rate_len = total_rate_len - 8; +- } +- else +- { +- rate_len = total_rate_len; +- remainder_rate_len = 0; +- } ++ /* HW has problem to distinguish this group key with existing pairwise key, stop HW enc and dec for BMC */ ++ rtw_camctl_set_flags(padapter, SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH); ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, NULL); + +- rtw_add_bcn_ie(padapter, pnetwork, _SUPPORTEDRATES_IE_, pnetwork->SupportedRates, rate_len); ++ /* clear group key */ ++ while ((camid_clr = rtw_camid_search(padapter, addr, -1, 1)) >= 0) { ++ DBG_871X_LEVEL(_drv_always_, "clear group key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(addr), camid_clr); ++ clear_cam_entry(padapter, camid_clr); ++ rtw_camid_free(padapter, camid_clr); ++ } + +- if(remainder_rate_len) +- { +- rtw_add_bcn_ie(padapter, pnetwork, _EXT_SUPPORTEDRATES_IE_, (pnetwork->SupportedRates+8), remainder_rate_len); ++ goto enable_mc; + } +- else +- { +- rtw_remove_bcn_ie(padapter, pnetwork, _EXT_SUPPORTEDRATES_IE_); ++ #endif ++ ++ ctrl = BIT(15) | BIT6 | ((pparm->algorithm) << 2) | pparm->keyid; ++ DBG_871X_LEVEL(_drv_always_, "set group key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n" ++ , cam_id, MAC_ARG(addr), pparm->keyid, security_type_str(pparm->algorithm)); ++ write_cam(padapter, cam_id, ctrl, addr, pparm->key); ++ ++ #ifdef DYNAMIC_CAMID_ALLOC ++ if (cam_id >=0 && cam_id <=3) ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8*)_TRUE); ++ #endif ++ /* 8814au should set both broadcast and unicast CAM entry for WEP key in STA mode */ ++ if (_rtw_camctl_chk_cap(padapter, SEC_CAP_CHK_BMC) && is_wep_enc(psecuritypriv->dot11PrivacyAlgrthm)) { ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ sta_pparm.algorithm = pparm->algorithm; ++ sta_pparm.keyid = pparm->keyid; ++ _rtw_memcpy(sta_pparm.key, pparm->key, 16); ++ _rtw_memcpy(sta_pparm.addr, get_bssid(pmlmepriv), ETH_ALEN); ++ set_stakey_hdl(padapter, (u8 *) &sta_pparm); + } ++ ++enable_mc: ++ //allow multicast packets to driver ++ rtw_hal_set_hwreg(padapter, HW_VAR_ON_RCR_AM, null_addr); ++ ++ return H2C_SUCCESS; + } + +-#ifdef CONFIG_DUALMAC_CONCURRENT +-void dc_SelectChannel(_adapter *padapter, unsigned char channel) ++u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf) + { +- PADAPTER ptarget_adapter; ++ u16 ctrl = 0; ++ s16 cam_id = 0; ++ bool used; ++ u8 ret = H2C_SUCCESS; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct set_stakey_parm *pparm = (struct set_stakey_parm *)pbuf; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta; + +- if( (padapter->pbuddy_adapter != NULL) && +- (padapter->DualMacConcurrent == _TRUE) && +- (padapter->adapter_type == SECONDARY_ADAPTER)) +- { +- // only mac0 could control BB&RF +- ptarget_adapter = padapter->pbuddy_adapter; +- } +- else +- { +- ptarget_adapter = padapter; ++ if(pparm->algorithm == _NO_PRIVACY_) ++ goto write_to_cam; ++ ++ psta = rtw_get_stainfo(pstapriv, pparm->addr); ++ if (!psta) { ++ DBG_871X_LEVEL(_drv_always_, "%s sta:"MAC_FMT" not found\n", __func__, MAC_ARG(pparm->addr)); ++ ret = H2C_REJECTED; ++ goto exit; + } + +- _enter_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setch_mutex), NULL); ++ pmlmeinfo->enc_algo = pparm->algorithm; ++ cam_id = rtw_camid_alloc(padapter, psta, 0, &used); ++ if (cam_id < 0) ++ goto exit; + +- rtw_hal_set_chan(ptarget_adapter, channel); ++ #ifdef DYNAMIC_CAMID_ALLOC ++ /* cam entry searched is group key */ ++ if (used == _TRUE && rtw_camid_is_gk(padapter, cam_id) == _TRUE) { ++ s16 camid_clr; + +- _exit_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setch_mutex), NULL); +-} ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" pairwise key with "MAC_FMT" id:%u the same key id as group key\n" ++ , FUNC_ADPT_ARG(padapter), MAC_ARG(pparm->addr), pparm->keyid); + +-void dc_SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset) +-{ +- PADAPTER ptarget_adapter; ++ /* HW has problem to distinguish this pairwise key with existing group key, stop HW enc and dec for BMC */ ++ rtw_camctl_set_flags(padapter, SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH); ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, NULL); + +- if( (padapter->pbuddy_adapter != NULL) && +- (padapter->DualMacConcurrent == _TRUE) && +- (padapter->adapter_type == SECONDARY_ADAPTER)) +- { +- // only mac0 could control BB&RF +- ptarget_adapter = padapter->pbuddy_adapter; +- } +- else +- { +- ptarget_adapter = padapter; ++ /* clear group key */ ++ while ((camid_clr = rtw_camid_search(padapter, pparm->addr, -1, 1)) >= 0) { ++ DBG_871X_LEVEL(_drv_always_, "clear group key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(pparm->addr), camid_clr); ++ clear_cam_entry(padapter, camid_clr); ++ rtw_camid_free(padapter, camid_clr); ++ } + } ++ #endif + +- _enter_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setbw_mutex), NULL); +- +- rtw_hal_set_bwmode(ptarget_adapter, (CHANNEL_WIDTH)bwmode, channel_offset); ++write_to_cam: ++ if(pparm->algorithm == _NO_PRIVACY_) { ++ while ((cam_id = rtw_camid_search(padapter, pparm->addr, -1, -1)) >= 0) { ++ DBG_871X_LEVEL(_drv_always_, "clear key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(pparm->addr), cam_id); ++ clear_cam_entry(padapter, cam_id); ++ rtw_camid_free(padapter,cam_id); ++ } ++ } else { ++ DBG_871X_LEVEL(_drv_always_, "set pairwise key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n", ++ cam_id, MAC_ARG(pparm->addr), pparm->keyid, security_type_str(pparm->algorithm)); ++ ctrl = BIT(15) | ((pparm->algorithm) << 2) | pparm->keyid; ++ write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key); ++ } ++ ret = H2C_SUCCESS_RSP; + +- _exit_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setbw_mutex), NULL); ++exit: ++ return ret; + } + +-void dc_set_channel_bwmode_disconnect(_adapter *padapter) ++u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf) + { ++ struct addBaReq_parm *pparm = (struct addBaReq_parm *)pbuf; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; +- struct mlme_priv *pbuddy_mlmepriv = NULL; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + +- if(pbuddy_adapter != NULL && +- padapter->DualMacConcurrent == _TRUE) ++ struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, pparm->addr); ++ ++ if(!psta) ++ return H2C_SUCCESS; ++ ++#ifdef CONFIG_80211N_HT ++ if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && (pmlmeinfo->HT_enable)) || ++ ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { +- pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); +- if((check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) != _TRUE) +- { +- //switch to the 20M Hz mode after disconnect +- pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; +- pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); +- } ++ //pmlmeinfo->ADDBA_retry_count = 0; ++ //pmlmeinfo->candidate_tid_bitmap |= (0x1 << pparm->tid); ++ //psta->htpriv.candidate_tid_bitmap |= BIT(pparm->tid); ++ issue_addba_req(padapter, pparm->addr, (u8)pparm->tid); ++ //_set_timer(&pmlmeext->ADDBA_timer, ADDBA_TO); ++ _set_timer(&psta->addba_retry_timer, ADDBA_TO); + } +- else ++#ifdef CONFIG_TDLS ++ else if((psta->tdls_sta_state & TDLS_LINKED_STATE)&& ++ (psta->htpriv.ht_option==_TRUE) && ++ (psta->htpriv.ampdu_enable==_TRUE) ) + { +- //switch to the 20M Hz mode after disconnect +- pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; +- pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ issue_addba_req(padapter, pparm->addr, (u8)pparm->tid); ++ _set_timer(&psta->addba_retry_timer, ADDBA_TO); ++ } ++#endif //CONFIG ++ else ++ { ++ psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid); + } ++#endif //CONFIG_80211N_HT ++ return H2C_SUCCESS; + } + +-u8 dc_handle_join_request(_adapter *padapter, u8 *ch, u8 *bw, u8 *offset) +-{ +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); +- PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; +- struct mlme_ext_priv *pbuddy_mlmeext = NULL; +- struct mlme_priv *pbuddy_mlmepriv = NULL; +- u8 ret = _SUCCESS; + +- if(pbuddy_adapter != NULL && +- padapter->DualMacConcurrent == _TRUE) +- { +- pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +- pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++u8 add_ba_rsp_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct addBaRsp_parm *pparm = (struct addBaRsp_parm *)pbuf; ++ u8 ret = _TRUE, i = 0, try_cnt = 3, wait_ms = 50; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta; + +- if(pmlmeext->cur_channel != pbuddy_mlmeext->cur_channel || +- pmlmeext->cur_bwmode != pbuddy_mlmeext->cur_bwmode || +- pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) +- { +- if((check_fwstate(pbuddy_mlmepriv, WIFI_AP_STATE)) == _TRUE) +- { +- //issue deauth to all stas if if2 is at ap mode +- rtw_sta_flush(pbuddy_adapter); ++ psta = rtw_get_stainfo(pstapriv, pparm->addr); ++ if (!psta) ++ goto exit; + +- //rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); +- rtw_hal_set_hwreg(pbuddy_adapter, HW_VAR_CHECK_TXBUF, 0); +- } +- else if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED) == _TRUE) +- { +- if(pmlmeext->cur_channel == pbuddy_mlmeext->cur_channel) +- { +- // CHANNEL_WIDTH_40 or CHANNEL_WIDTH_20 but channel offset is different +- if((pmlmeext->cur_bwmode == pbuddy_mlmeext->cur_bwmode) && +- (pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) ) +- { +- report_join_res(padapter, -4); +- ret = _FAIL; +- } +- } +- else +- { +- report_join_res(padapter, -4); +- ret = _FAIL; +- } +- } +- } +- else if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) +- { +- issue_nulldata(pbuddy_adapter, NULL, 1, 0, 0); +- } +- } ++ preorder_ctrl = &psta->recvreorder_ctrl[pparm->tid]; ++ ret = issue_addba_rsp_wait_ack(padapter, pparm->addr, pparm->tid, pparm->status, pparm->size, 3, 50); + +- if (!ch || !bw || !offset) { +- rtw_warn_on(1); +- ret = _FAIL; ++ #ifdef CONFIG_UPDATE_INDICATE_SEQ_WHILE_PROCESS_ADDBA_REQ ++ /* status = 0 means accept this addba req, so update indicate seq = start_seq under this compile flag */ ++ if (pparm->status == 0) { ++ preorder_ctrl->indicate_seq = pparm->start_seq; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, start_seq: %d\n", __func__, __LINE__, ++ preorder_ctrl->indicate_seq, pparm->start_seq); ++ #endif + } ++ #else ++ preorder_ctrl->indicate_seq = 0xffff; ++ #endif + +- if (ret == _SUCCESS) { +- *ch = pmlmeext->cur_channel; +- *bw = pmlmeext->cur_bwmode; +- *offset = pmlmeext->cur_ch_offset; +- } ++ /* ++ * status = 0 means accept this addba req ++ * status = 37 means reject this addba req ++ */ ++ if (pparm->status == 0) { ++ preorder_ctrl->enable = _TRUE; ++ preorder_ctrl->ampdu_size = pparm->size; ++ } else if (pparm->status == 37) ++ preorder_ctrl->enable = _FALSE; + + exit: +- return ret; ++ return H2C_SUCCESS; + } + +-void dc_handle_join_done(_adapter *padapter, u8 join_res) ++u8 chk_bmc_sleepq_cmd(_adapter* padapter) + { +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; +- struct mlme_priv *pbuddy_mlmepriv = NULL; +- struct mlme_ext_priv *pbuddy_mlmeext = NULL; +- struct mlme_ext_info *pbuddy_mlmeinfo = NULL; +- WLAN_BSSID_EX *pbuddy_network_mlmeext = NULL; +- u8 change_band = _FALSE; ++ struct cmd_obj *ph2c; ++ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); ++ u8 res = _SUCCESS; + ++_func_enter_; + +- if(pbuddy_adapter != NULL && +- padapter->DualMacConcurrent == _TRUE) ++ if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) + { +- pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); +- pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +- pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info); +- pbuddy_network_mlmeext = &(pbuddy_mlmeinfo->network); +- +- if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && +- check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) +- { +- //restart and update beacon +- DBG_871X("after join, current adapter, CH=%d, BW=%d, offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); +- +- if(join_res >= 0) +- { +- u8 *p; +- int ie_len; +- struct HT_info_element *pht_info=NULL; +- +- if((pbuddy_mlmeext->cur_channel <= 14 && pmlmeext->cur_channel >= 36) || +- (pbuddy_mlmeext->cur_channel >= 36 && pmlmeext->cur_channel <= 14)) +- { +- change_band = _TRUE; +- } ++ res= _FAIL; ++ goto exit; ++ } + +- //sync channel/bwmode/ch_offset with another adapter +- pbuddy_mlmeext->cur_channel = pmlmeext->cur_channel; +- +- if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) +- { +- p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if( p && ie_len) +- { +- pht_info = (struct HT_info_element *)(p+2); +- pht_info->infos[0] &= ~(BIT(0)|BIT(1)); //no secondary channel is present +- } +- +- if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40) +- { +- pbuddy_mlmeext->cur_ch_offset = pmlmeext->cur_ch_offset; ++ init_h2fwcmd_w_parm_no_parm_rsp(ph2c, GEN_CMD_CODE(_ChkBMCSleepq)); + +- //to update cur_ch_offset value in beacon +- if( pht_info ) +- { +- switch(pmlmeext->cur_ch_offset) +- { +- case HAL_PRIME_CHNL_OFFSET_LOWER: +- pht_info->infos[0] |= 0x1; +- break; +- case HAL_PRIME_CHNL_OFFSET_UPPER: +- pht_info->infos[0] |= 0x3; +- break; +- case HAL_PRIME_CHNL_OFFSET_DONT_CARE: +- default: +- break; +- } +- } +- } +- else if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) +- { +- pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_20; +- pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); + +- if(pmlmeext->cur_channel>0 && pmlmeext->cur_channel<5) +- { +- if(pht_info) +- pht_info->infos[0] |= 0x1; ++exit: + +- pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_40; +- pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; +- } ++_func_exit_; + +- if(pmlmeext->cur_channel>7 && pmlmeext->cur_channel<(14+1)) +- { +- if(pht_info) +- pht_info->infos[0] |= 0x3; ++ return res; ++} + +- pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_40; +- pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; +- } ++u8 set_tx_beacon_cmd(_adapter* padapter) ++{ ++ struct cmd_obj *ph2c; ++ struct Tx_Beacon_param *ptxBeacon_parm; ++ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 res = _SUCCESS; ++ int len_diff = 0; ++ ++_func_enter_; + +- set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); +- } +- } ++ if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ res= _FAIL; ++ goto exit; ++ } + +- // to update channel value in beacon +- pbuddy_network_mlmeext->Configuration.DSConfig = pmlmeext->cur_channel; +- p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if(p && ie_len>0) +- *(p + 2) = pmlmeext->cur_channel; ++ if ((ptxBeacon_parm = (struct Tx_Beacon_param *)rtw_zmalloc(sizeof(struct Tx_Beacon_param))) == NULL) ++ { ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } + +- p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if( p && ie_len) +- { +- pht_info = (struct HT_info_element *)(p+2); +- pht_info->primary_channel = pmlmeext->cur_channel; +- } ++ _rtw_memcpy(&(ptxBeacon_parm->network), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX)); + +- // update mlmepriv's cur_network +- _rtw_memcpy(&pbuddy_mlmepriv->cur_network.network, pbuddy_network_mlmeext, pbuddy_network_mlmeext->Length); +- } +- else +- { +- // switch back to original channel/bwmode/ch_offset; +- set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); +- } ++ len_diff = update_hidden_ssid( ++ ptxBeacon_parm->network.IEs+_BEACON_IE_OFFSET_ ++ , ptxBeacon_parm->network.IELength-_BEACON_IE_OFFSET_ ++ , pmlmeinfo->hidden_ssid_mode ++ ); ++ ptxBeacon_parm->network.IELength += len_diff; + +- DBG_871X("after join, another adapter, CH=%d, BW=%d, offset=%d\n", pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); ++ init_h2fwcmd_w_parm_no_rsp(ph2c, ptxBeacon_parm, GEN_CMD_CODE(_TX_Beacon)); + +- if(change_band == _TRUE) +- change_band_update_ie(pbuddy_adapter, pbuddy_network_mlmeext); ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); + +- DBG_871X("update pbuddy_adapter's beacon\n"); ++ ++exit: ++ ++_func_exit_; + +- update_beacon(pbuddy_adapter, 0, NULL, _TRUE); +- } +- else if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) +- { +- if((pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) && +- (pmlmeext->cur_bwmode == CHANNEL_WIDTH_20)) +- { +- set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); +- } +- +- issue_nulldata(pbuddy_adapter, NULL, 0, 0, 0); +- } +- } ++ return res; + } + +-sint dc_check_fwstate(_adapter *padapter, sint fw_state) ++ ++u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf) + { +- PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; +- struct mlme_priv *pbuddy_mlmepriv = NULL; ++ u8 evt_code, evt_seq; ++ u16 evt_sz; ++ uint *peventbuf; ++ void (*event_callback)(_adapter *dev, u8 *pbuf); ++ struct evt_priv *pevt_priv = &(padapter->evtpriv); + +- if(padapter->pbuddy_adapter != NULL && +- padapter->DualMacConcurrent == _TRUE) ++ if (pbuf == NULL) ++ goto _abort_event_; + ++ peventbuf = (uint*)pbuf; ++ evt_sz = (u16)(*peventbuf&0xffff); ++ evt_seq = (u8)((*peventbuf>>24)&0x7f); ++ evt_code = (u8)((*peventbuf>>16)&0xff); ++ ++ ++ #ifdef CHECK_EVENT_SEQ ++ // checking event sequence... ++ if (evt_seq != (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f) ) + { +- pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("Evetn Seq Error! %d vs %d\n", (evt_seq & 0x7f), (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f))); ++ ++ pevt_priv->event_seq = (evt_seq+1)&0x7f; + +- return check_fwstate(pbuddy_mlmepriv, fw_state); ++ goto _abort_event_; + } ++ #endif + +- return _FALSE; +-} +- +-u8 dc_handle_site_survey(_adapter *padapter) +-{ +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; +- +- // only mac0 can do scan request, help issue nulldata(1) for mac1 +- if(pbuddy_adapter != NULL && +- padapter->DualMacConcurrent == _TRUE) ++ // checking if event code is valid ++ if (evt_code >= MAX_C2HEVT) + { +- if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) +- { +- pmlmeext->sitesurvey_res.state = SCAN_TXNULL; +- +- issue_nulldata(pbuddy_adapter, NULL, 1, 2, 0); +- +- return _TRUE; +- } ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent Code(%d) mismatch!\n", evt_code)); ++ goto _abort_event_; + } + +- return _FALSE; +-} +- +-void dc_report_survey_event(_adapter *padapter, union recv_frame *precv_frame) +-{ +- if(padapter->pbuddy_adapter != NULL && +- padapter->DualMacConcurrent == _TRUE) ++ // checking if event size match the event parm size ++ if ((wlanevents[evt_code].parmsize != 0) && ++ (wlanevents[evt_code].parmsize != evt_sz)) + { +- report_survey_event(padapter->pbuddy_adapter, precv_frame); ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent(%d) Parm Size mismatch (%d vs %d)!\n", ++ evt_code, wlanevents[evt_code].parmsize, evt_sz)); ++ goto _abort_event_; ++ + } +-} + +-void dc_set_channel_bwmode_survey_done(_adapter *padapter) +-{ +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; +- struct mlme_priv *pbuddy_mlmepriv = NULL; +- struct mlme_ext_priv *pbuddy_mlmeext = NULL; +- struct mlme_ext_info *pbuddy_mlmeinfo = NULL; +- u8 cur_channel; +- u8 cur_bwmode; +- u8 cur_ch_offset; ++ ATOMIC_INC(&pevt_priv->event_seq); + +- if(pbuddy_adapter != NULL && +- padapter->DualMacConcurrent == _TRUE) ++ peventbuf += 2; ++ ++ if(peventbuf) + { +- pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); +- pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +- pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info); +- +- if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) +- { +- if(check_fwstate(pmlmepriv, _FW_LINKED) && +- (pmlmeext->cur_bwmode == CHANNEL_WIDTH_40)) +- { +- cur_channel = pmlmeext->cur_channel; +- cur_bwmode = pmlmeext->cur_bwmode; +- cur_ch_offset = pmlmeext->cur_ch_offset; +- } +- else +- { +- cur_channel = pbuddy_mlmeext->cur_channel; +- cur_bwmode = pbuddy_mlmeext->cur_bwmode; +- cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; +- } +- } +- else +- { +- cur_channel = pmlmeext->cur_channel; +- cur_bwmode = pmlmeext->cur_bwmode; +- cur_ch_offset = pmlmeext->cur_ch_offset; +- } ++ event_callback = wlanevents[evt_code].event_callback; ++ event_callback(padapter, (u8*)peventbuf); + +- set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++ pevt_priv->evt_done_cnt++; ++ } + +- if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) +- { +- //issue null data +- issue_nulldata(pbuddy_adapter, NULL, 0, 0, 0); +- } + +- if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && +- check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) +- { ++_abort_event_: + +- DBG_871X("survey done, current CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); + +- DBG_871X("restart pbuddy_adapter's beacon\n"); ++ return H2C_SUCCESS; + +- update_beacon(pbuddy_adapter, 0, NULL, _TRUE); +- } +- } +- else +- { +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); +- } + } + +-void dc_set_ap_channel_bandwidth(_adapter *padapter, u8 channel, u8 channel_offset, u8 bwmode) ++u8 h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) + { +- u8 *p; +- u8 val8, cur_channel, cur_bwmode, cur_ch_offset, change_band; +- int ie_len; +- struct registry_priv *pregpriv = &padapter->registrypriv; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct HT_info_element *pht_info=NULL; +- _adapter *pbuddy_adapter = padapter->pbuddy_adapter; +- struct mlme_priv *pbuddy_mlmepriv = NULL; +- struct mlme_ext_priv *pbuddy_mlmeext = NULL; ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ return H2C_SUCCESS; ++} + +- DBG_871X("dualmac_concurrent_ap_set_channel_bwmode ==>\n"); ++u8 chk_bmc_sleepq_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++#ifdef CONFIG_AP_MODE ++ _irqL irqL; ++ struct sta_info *psta_bmc; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; + +- cur_channel = channel; +- cur_bwmode = bwmode; +- cur_ch_offset = channel_offset; +- change_band = _FALSE; ++ //for BC/MC Frames ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ if(!psta_bmc) ++ return H2C_SUCCESS; + +- p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if( p && ie_len) ++ if((pstapriv->tim_bitmap&BIT(0)) && (psta_bmc->sleepq_len>0)) + { +- pht_info = (struct HT_info_element *)(p+2); +- } ++#ifndef CONFIG_PCI_HCI ++ rtw_msleep_os(10);// 10ms, ATIM(HIQ) Windows ++#endif ++ //_enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); + +- if(pbuddy_adapter != NULL && +- padapter->DualMacConcurrent == _TRUE) +- { +- pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); +- pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +- +- if(!check_fwstate(pbuddy_mlmepriv, _FW_LINKED|_FW_UNDER_LINKING|_FW_UNDER_SURVEY)) +- { +- set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); +- } +- else if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED)==_TRUE) +- { +- //To sync cur_channel/cur_bwmode/cur_ch_offset with another adapter +- DBG_871X("Another iface is at linked state, sync cur_channel/cur_bwmode/cur_ch_offset\n"); +- DBG_871X("Another adapter, CH=%d, BW=%d, offset=%d\n", pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); +- DBG_871X("Current adapter, CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); +- +- cur_channel = pbuddy_mlmeext->cur_channel; +- if(cur_bwmode == CHANNEL_WIDTH_40) +- { +- if(pht_info) +- pht_info->infos[0] &= ~(BIT(0)|BIT(1)); ++ xmitframe_phead = get_list_head(&psta_bmc->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); + +- if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) +- { +- cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); + +- //to update cur_ch_offset value in beacon +- if(pht_info) +- { +- switch(cur_ch_offset) +- { +- case HAL_PRIME_CHNL_OFFSET_LOWER: +- pht_info->infos[0] |= 0x1; +- break; +- case HAL_PRIME_CHNL_OFFSET_UPPER: +- pht_info->infos[0] |= 0x3; +- break; +- case HAL_PRIME_CHNL_OFFSET_DONT_CARE: +- default: +- break; +- } +- } +- } +- else if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_20) +- { +- cur_bwmode = CHANNEL_WIDTH_20; +- cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ xmitframe_plist = get_next(xmitframe_plist); + +- if(cur_channel>0 && cur_channel<5) +- { +- if(pht_info) +- pht_info->infos[0] |= 0x1; ++ rtw_list_delete(&pxmitframe->list); + +- cur_bwmode = CHANNEL_WIDTH_40; +- cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; +- } ++ psta_bmc->sleepq_len--; ++ if(psta_bmc->sleepq_len>0) ++ pxmitframe->attrib.mdata = 1; ++ else ++ pxmitframe->attrib.mdata = 0; + +- if(cur_channel>7 && cur_channel<(14+1)) +- { +- if(pht_info) +- pht_info->infos[0] |= 0x3; ++ pxmitframe->attrib.triggered=1; + +- cur_bwmode = CHANNEL_WIDTH_40; +- cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; +- } ++ if (xmitframe_hiq_filter(pxmitframe) == _TRUE) ++ pxmitframe->attrib.qsel = QSLT_HIGH;//HIQ + +- set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); +- } ++ #if 0 ++ _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(padapter, pxmitframe); + } ++ _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ #endif ++ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); ++ } + +- // to update channel value in beacon +- pnetwork->Configuration.DSConfig = cur_channel; +- p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if(p && ie_len>0) +- *(p + 2) = cur_channel; ++ //_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); + +- if(pht_info) +- pht_info->primary_channel = cur_channel; ++ if (rtw_get_intf_type(padapter) != RTW_PCIE) { ++ /* check hi queue and bmc_sleepq */ ++ rtw_chk_hi_queue_cmd(padapter); + } + } +- else +- { +- set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); +- } ++#endif + +- DBG_871X("CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); ++ return H2C_SUCCESS; ++} + +- if((channel <= 14 && cur_channel >= 36) || +- (channel >= 36 && cur_channel <= 14)) ++u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ if(send_beacon(padapter)==_FAIL) + { +- change_band = _TRUE; ++ DBG_871X("issue_beacon, fail!\n"); ++ return H2C_PARAMETERS_ERROR; + } + +- pmlmeext->cur_channel = cur_channel; +- pmlmeext->cur_bwmode = cur_bwmode; +- pmlmeext->cur_ch_offset = cur_ch_offset; + +- if(change_band == _TRUE) +- change_band_update_ie(padapter, pnetwork); ++ if (padapter->registrypriv.wifi_spec == 1) ++ return H2C_SUCCESS; ++ ++ /* tx bc/mc frames after update TIM */ ++ chk_bmc_sleepq_hdl(padapter, NULL); + +- DBG_871X("dualmac_concurrent_ap_set_channel_bwmode <==\n"); ++ return H2C_SUCCESS; + } + +-void dc_resume_xmit(_adapter *padapter) ++/* ++* according to channel ++* add/remove WLAN_BSSID_EX.IEs's ERP ie ++* set WLAN_BSSID_EX.SupportedRates ++* update WLAN_BSSID_EX.IEs's Supported Rate and Extended Supported Rate ie ++*/ ++void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 ch) + { +- PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; +- +- if(pbuddy_adapter != NULL && +- padapter->DualMacConcurrent == _TRUE) ++ u8 network_type,rate_len, total_rate_len,remainder_rate_len; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 erpinfo=0x4; ++ ++ if (ch >= 36) { ++ network_type = WIRELESS_11A; ++ total_rate_len = IEEE80211_NUM_OFDM_RATESLEN; ++ rtw_remove_bcn_ie(padapter, pnetwork, _ERPINFO_IE_); ++ } else { ++ network_type = WIRELESS_11BG; ++ total_rate_len = IEEE80211_CCK_RATE_LEN+IEEE80211_NUM_OFDM_RATESLEN; ++ rtw_add_bcn_ie(padapter, pnetwork, _ERPINFO_IE_, &erpinfo, 1); ++ } ++ ++ rtw_set_supported_rate(pnetwork->SupportedRates, network_type); ++ ++ UpdateBrateTbl(padapter, pnetwork->SupportedRates); ++ ++ if(total_rate_len > 8) + { +- DBG_871X("dc_resume_xmit, resume pbuddy_adapter Tx\n"); +- rtw_os_xmit_schedule(pbuddy_adapter); ++ rate_len = 8; ++ remainder_rate_len = total_rate_len - 8; ++ } ++ else ++ { ++ rate_len = total_rate_len; ++ remainder_rate_len = 0; + } +-} + +-u8 dc_check_xmit(_adapter *padapter) +-{ +- PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; +- struct mlme_priv *pbuddy_mlmepriv = NULL; ++ rtw_add_bcn_ie(padapter, pnetwork, _SUPPORTEDRATES_IE_, pnetwork->SupportedRates, rate_len); + +- if(pbuddy_adapter != NULL && +- padapter->DualMacConcurrent == _TRUE) ++ if(remainder_rate_len) + { +- pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); +- if (check_fwstate(pbuddy_mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) +- { +- DBG_871X("dc_check_xmit pbuddy_adapter is under survey or under linking\n"); +- return _FALSE; +- } ++ rtw_add_bcn_ie(padapter, pnetwork, _EXT_SUPPORTEDRATES_IE_, (pnetwork->SupportedRates+8), remainder_rate_len); ++ } ++ else ++ { ++ rtw_remove_bcn_ie(padapter, pnetwork, _EXT_SUPPORTEDRATES_IE_); + } + +- return _TRUE; ++ pnetwork->Length = get_WLAN_BSSID_EX_sz(pnetwork); + } +-#endif + + #ifdef CONFIG_CONCURRENT_MODE + sint check_buddy_mlmeinfo_state(_adapter *padapter, u32 state) +@@ -13876,442 +14781,259 @@ sint check_buddy_mlmeinfo_state(_adapter *padapter, u32 state) + return _FALSE; + + } ++#endif /* CONFIG_CONCURRENT_MODE */ + +-void concurrent_chk_joinbss_done(_adapter *padapter, int join_res) ++void rtw_join_done_chk_ch(_adapter *adapter, int join_res) + { +- struct mlme_ext_priv *pmlmeext; +- struct mlme_ext_info *pmlmeinfo; +- PADAPTER pbuddy_adapter; +- struct mlme_priv *pbuddy_mlmepriv; +- struct mlme_ext_priv *pbuddy_mlmeext; +- struct mlme_ext_info *pbuddy_mlmeinfo; +- WLAN_BSSID_EX *pbuddy_network_mlmeext; +- WLAN_BSSID_EX *pnetwork; ++#define DUMP_ADAPTERS_STATUS 0 + +- pmlmeext = &padapter->mlmeextpriv; +- pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct dvobj_priv *dvobj; ++ _adapter *iface; ++ struct mlme_priv *mlme; ++ struct mlme_ext_priv *mlmeext; ++ u8 u_ch, u_offset, u_bw; ++ int i; + ++ dvobj = adapter_to_dvobj(adapter); + +- if(!rtw_buddy_adapter_up(padapter)) +- { +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); +- return; ++ if (DUMP_ADAPTERS_STATUS) { ++ DBG_871X(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(adapter)); ++ dump_adapters_status(RTW_DBGDUMP , dvobj); + } + +- pbuddy_adapter = padapter->pbuddy_adapter; +- pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); +- pnetwork = (WLAN_BSSID_EX *)&pbuddy_mlmepriv->cur_network.network; +- pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +- pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info); +- pbuddy_network_mlmeext = &(pbuddy_mlmeinfo->network); +- +- if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && +- check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) +- { +- //restart and update beacon +- +- DBG_871X("after join,primary adapter, CH=%d, BW=%d, offset=%d\n" +- , pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); +- +- +- if(join_res >= 0) +- { +- u8 *p; +- int ie_len; +- u8 change_band = _FALSE; +- struct HT_info_element *pht_info=NULL; +- +- if((pmlmeext->cur_channel <= 14 && pbuddy_mlmeext->cur_channel >= 36) || +- (pmlmeext->cur_channel >= 36 && pbuddy_mlmeext->cur_channel <= 14)) +- change_band = _TRUE; +- +- p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if( p && ie_len) +- { +- pht_info = (struct HT_info_element *)(p+2); +- pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; //no secondary channel is present +- } +- +- pbuddy_mlmeext->cur_channel = pmlmeext->cur_channel; +-#ifdef CONFIG_80211AC_VHT +- if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80) +- { +- u8 *pvht_cap_ie, *pvht_op_ie; +- int vht_cap_ielen, vht_op_ielen; +- +- pvht_cap_ie = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTCapability, &vht_cap_ielen, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- pvht_op_ie = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTOperation, &vht_op_ielen, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- +- if(pmlmeext->cur_channel <= 14) // downgrade to 20/40Mhz +- { +- //modify vht cap ie +- if( pvht_cap_ie && vht_cap_ielen) +- { +- SET_VHT_CAPABILITY_ELE_SHORT_GI80M(pvht_cap_ie+2, 0); +- } +- +- //modify vht op ie +- if( pvht_op_ie && vht_op_ielen) +- { +- SET_VHT_OPERATION_ELE_CHL_WIDTH(pvht_op_ie+2, 0); //change to 20/40Mhz +- SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(pvht_op_ie+2, 0); +- SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(pvht_op_ie+2, 0); +- //SET_VHT_OPERATION_ELE_BASIC_MCS_SET(p+2, 0xFFFF); +- pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_40; +- } +- } +- else +- { +- u8 center_freq; +- +- pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_80; +- +- if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 || +- pmlmeext->cur_bwmode == CHANNEL_WIDTH_80) +- { +- pbuddy_mlmeext->cur_ch_offset = pmlmeext->cur_ch_offset; +- } +- else if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) +- { +- pbuddy_mlmeext->cur_ch_offset = rtw_get_offset_by_ch(pmlmeext->cur_channel); +- } +- +- //modify ht info ie +- if(pht_info) +- pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; +- +- switch(pbuddy_mlmeext->cur_ch_offset) +- { +- case HAL_PRIME_CHNL_OFFSET_LOWER: +- if(pht_info) +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; +- //cur_bwmode = CHANNEL_WIDTH_40; +- break; +- case HAL_PRIME_CHNL_OFFSET_UPPER: +- if(pht_info) +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; +- //cur_bwmode = CHANNEL_WIDTH_40; +- break; +- case HAL_PRIME_CHNL_OFFSET_DONT_CARE: +- default: +- if(pht_info) +- pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; +- pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_20; +- pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- break; +- } +- +- //modify vht op ie +- center_freq = rtw_get_center_ch(pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, HAL_PRIME_CHNL_OFFSET_LOWER); +- if( pvht_op_ie && vht_op_ielen) +- SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(pvht_op_ie+2, center_freq); +- +- set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); +- +- } +- +- } +-#endif //CONFIG_80211AC_VHT +- +- if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) +- { +- p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if( p && ie_len) +- { +- pht_info = (struct HT_info_element *)(p+2); +- pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; //no secondary channel is present +- } +- +- if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 || +- pmlmeext->cur_bwmode == CHANNEL_WIDTH_80) +- { +- pbuddy_mlmeext->cur_ch_offset = pmlmeext->cur_ch_offset; +- +- //to update cur_ch_offset value in beacon +- if( pht_info ) +- { +- switch(pmlmeext->cur_ch_offset) +- { +- case HAL_PRIME_CHNL_OFFSET_LOWER: +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; +- break; +- case HAL_PRIME_CHNL_OFFSET_UPPER: +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; +- break; +- case HAL_PRIME_CHNL_OFFSET_DONT_CARE: +- default: +- break; +- } +- +- } +- +- } +- else if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) +- { +- pbuddy_mlmeext->cur_ch_offset = rtw_get_offset_by_ch(pmlmeext->cur_channel); +- +- switch(pbuddy_mlmeext->cur_ch_offset) +- { +- case HAL_PRIME_CHNL_OFFSET_LOWER: +- if(pht_info) +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; +- pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_40; +- break; +- case HAL_PRIME_CHNL_OFFSET_UPPER: +- if(pht_info) +- pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; +- pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_40; +- break; +- case HAL_PRIME_CHNL_OFFSET_DONT_CARE: +- default: +- if(pht_info) +- pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; +- pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_20; +- pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- break; +- } ++ if (join_res >= 0) { ++ if (rtw_get_ch_setting_union(adapter, &u_ch, &u_bw, &u_offset) <= 0) { ++ dump_adapters_status(RTW_DBGDUMP , dvobj); ++ rtw_warn_on(1); ++ } ++ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ iface = dvobj->padapters[i]; ++ mlme = &iface->mlmepriv; ++ mlmeext = &iface->mlmeextpriv; ++ ++ if (!iface || iface == adapter) ++ continue; ++ ++ if (check_fwstate(mlme, WIFI_AP_STATE) ++ && check_fwstate(mlme, WIFI_ASOC_STATE) ++ ) { ++ bool is_grouped = rtw_is_chbw_grouped(u_ch, u_bw, u_offset ++ , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); ++ ++ if (is_grouped == _FALSE) { ++ /* handle AP which need to switch ch setting */ ++ ++ /* restore original bw, adjust bw by registry setting on target ch */ ++ mlmeext->cur_bwmode = mlme->ori_bw; ++ mlmeext->cur_channel = u_ch; ++ rtw_adjust_chbw(iface ++ , mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset); + +- } ++ rtw_sync_chbw(&mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset ++ , &u_ch, &u_bw, &u_offset); + +- set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ rtw_ap_update_bss_chbw(iface, &(mlmeext->mlmext_info.network) ++ , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); + +- } +- else +- { +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); +- } ++ _rtw_memcpy(&(mlme->cur_network.network), &(mlmeext->mlmext_info.network), sizeof(WLAN_BSSID_EX)); + +- +- // to update channel value in beacon +- pbuddy_network_mlmeext->Configuration.DSConfig = pmlmeext->cur_channel; +- p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if(p && ie_len>0) +- *(p + 2) = pmlmeext->cur_channel; +- +- p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); +- if( p && ie_len) +- { +- pht_info = (struct HT_info_element *)(p+2); +- pht_info->primary_channel = pmlmeext->cur_channel; ++ rtw_start_bss_hdl_after_chbw_decided(iface); ++ } ++ ++ update_beacon(iface, 0, NULL, _TRUE); + } + +- //buddy interface band is different from current interface, update ERP, support rate, ext support rate IE +- if(change_band == _TRUE) +- change_band_update_ie(pbuddy_adapter, pbuddy_network_mlmeext); +- } +- else +- { +- // switch back to original channel/bwmode/ch_offset; +- set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ clr_fwstate(mlme, WIFI_OP_CH_SWITCHING); + } + +- DBG_871X("after join, second adapter, CH=%d, BW=%d, offset=%d\n", pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); ++ #ifdef CONFIG_DFS_MASTER ++ rtw_dfs_master_status_apply(adapter, MLME_STA_CONNECTED); ++ #endif ++ } else { ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ iface = dvobj->padapters[i]; ++ mlme = &iface->mlmepriv; ++ mlmeext = &iface->mlmeextpriv; + +- DBG_871X("update pbuddy_adapter's beacon\n"); +- +- _rtw_memcpy(pnetwork, pbuddy_network_mlmeext, sizeof(WLAN_BSSID_EX)); +- //update bmc rate to avoid bb cck hang +- update_bmc_sta(pbuddy_adapter); +- update_beacon(pbuddy_adapter, 0, NULL, _TRUE); ++ if (!iface || iface == adapter) ++ continue; + +- } +- else if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) && +- check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) +- { +- if(join_res >= 0) +- { +- pbuddy_mlmeext->cur_channel = pmlmeext->cur_channel; +- if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40 || +- pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80) +- set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); +- else if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 || +- pmlmeext->cur_bwmode == CHANNEL_WIDTH_80) +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); +- else +- set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ if (check_fwstate(mlme, WIFI_AP_STATE) ++ && check_fwstate(mlme, WIFI_ASOC_STATE)) ++ update_beacon(iface, 0, NULL, _TRUE); ++ ++ clr_fwstate(mlme, WIFI_OP_CH_SWITCHING); + } +- else +- { +- // switch back to original channel/bwmode/ch_offset; +- set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); +- } ++ #ifdef CONFIG_DFS_MASTER ++ rtw_dfs_master_status_apply(adapter, MLME_STA_DISCONNECTED); ++ #endif + } +- else +- { +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ if (rtw_get_ch_setting_union(adapter, &u_ch, &u_bw, &u_offset)) ++ set_channel_bwmode(adapter, u_ch, u_offset, u_bw); ++ ++ if (DUMP_ADAPTERS_STATUS) { ++ DBG_871X(FUNC_ADPT_FMT" exit\n", FUNC_ADPT_ARG(adapter)); ++ dump_adapters_status(RTW_DBGDUMP , dvobj); + } +- + } +-#endif //CONFIG_CONCURRENT_MODE + +-int rtw_chk_start_clnt_join(_adapter *padapter, u8 *ch, u8 *bw, u8 *offset) ++int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) + { +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- unsigned char cur_ch = pmlmeext->cur_channel; +- unsigned char cur_bw = pmlmeext->cur_bwmode; +- unsigned char cur_ch_offset = pmlmeext->cur_ch_offset; + bool chbw_allow = _TRUE; + bool connect_allow = _TRUE; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ u8 cur_ch, cur_bw, cur_ch_offset; ++ u8 u_ch, u_offset, u_bw; + +-#ifdef CONFIG_CONCURRENT_MODE +- PADAPTER pbuddy_adapter; +- struct mlme_ext_priv *pbuddy_mlmeext; +- struct mlme_ext_info *pbuddy_pmlmeinfo; +- struct mlme_priv *pbuddy_mlmepriv; ++ u_ch = cur_ch = pmlmeext->cur_channel; ++ u_bw = cur_bw = pmlmeext->cur_bwmode; ++ u_offset = cur_ch_offset = pmlmeext->cur_ch_offset; + +- if (!rtw_buddy_adapter_up(padapter)) { ++ if (!ch || !bw || !offset) { ++ connect_allow = _FALSE; ++ rtw_warn_on(1); + goto exit; + } + +- pbuddy_adapter = padapter->pbuddy_adapter; +- pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +- pbuddy_pmlmeinfo = &(pbuddy_mlmeext->mlmext_info); +- pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ if (cur_ch == 0) { ++ connect_allow = _FALSE; ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" cur_ch:%u\n" ++ , FUNC_ADPT_ARG(adapter), cur_ch); ++ rtw_warn_on(1); ++ goto exit; ++ } ++ DBG_871X(FUNC_ADPT_FMT" req: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); + +- if((pbuddy_pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)//for AP MODE +- { +- DBG_871X("start_clnt_join: "ADPT_FMT"(ch=%d, bw=%d, ch_offset=%d)" +- ", "ADPT_FMT" AP mode(ch=%d, bw=%d, ch_offset=%d)\n", +- ADPT_ARG(padapter), pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset, +- ADPT_ARG(pbuddy_adapter), pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); ++#ifdef CONFIG_CONCURRENT_MODE ++{ ++ struct dvobj_priv *dvobj; ++ _adapter *iface; ++ struct mlme_priv *mlme; ++ struct mlme_ext_priv *mlmeext; ++ u8 sta_num; ++ u8 ld_sta_num; ++ u8 lg_sta_num; ++ u8 ap_num; ++ u8 ld_ap_num; ++ int i; + +- if(pmlmeext->cur_channel != pbuddy_mlmeext->cur_channel) +- { +- chbw_allow = _FALSE; +- } +- else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_40) && +- (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) && +- (pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset)) +- { +- chbw_allow = _FALSE; +- } +- else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) && +- ((pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40)|| +- (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80)) ) +- { +- cur_ch = pmlmeext->cur_channel; +- cur_bw = pbuddy_mlmeext->cur_bwmode; +- cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; +- } ++ dvobj = adapter_to_dvobj(adapter); + +- DBG_871X("start_clnt_join: connect_allow:%d, chbw_allow:%d\n", connect_allow, chbw_allow); +- if (chbw_allow == _FALSE) { +- #ifdef CONFIG_SPCT_CH_SWITCH +- if (1) { +- rtw_ap_inform_ch_switch(pbuddy_adapter, pmlmeext->cur_channel , pmlmeext->cur_ch_offset); +- } else ++ rtw_dev_iface_status_no_self(adapter, &sta_num, &ld_sta_num, &lg_sta_num, &ap_num, &ld_ap_num); ++ DBG_871X(FUNC_ADPT_FMT" ld_sta_num:%u, ap_num:%u\n" ++ , FUNC_ADPT_ARG(adapter), ld_sta_num, ap_num); ++ ++ if (!ld_sta_num && !ap_num) { ++ /* consider linking STA? */ ++ goto connect_allow_hdl; ++ } ++ ++ if (rtw_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset) <= 0) { ++ dump_adapters_status(RTW_DBGDUMP , dvobj); ++ rtw_warn_on(1); ++ } ++ DBG_871X(FUNC_ADPT_FMT" union no self: %u,%u,%u\n" ++ , FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); ++ ++ /* chbw_allow? */ ++ chbw_allow = rtw_is_chbw_grouped(pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset ++ , u_ch, u_bw, u_offset); ++ ++ DBG_871X(FUNC_ADPT_FMT" chbw_allow:%d\n" ++ , FUNC_ADPT_ARG(adapter), chbw_allow); ++ ++ if (chbw_allow == _TRUE) { ++ rtw_sync_chbw(&cur_ch, &cur_bw, &cur_ch_offset, &u_ch, &u_bw, &u_offset); ++ rtw_warn_on(cur_ch != pmlmeext->cur_channel); ++ rtw_warn_on(cur_bw != pmlmeext->cur_bwmode); ++ rtw_warn_on(cur_ch_offset != pmlmeext->cur_ch_offset); ++ goto connect_allow_hdl; ++ } ++ ++ /* chbw_allow is _FALSE, connect allow? */ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ iface = dvobj->padapters[i]; ++ mlme = &iface->mlmepriv; ++ mlmeext = &iface->mlmeextpriv; ++ ++ #ifdef CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT ++ if (check_fwstate(mlme, WIFI_STATION_STATE) ++ && check_fwstate(mlme, WIFI_ASOC_STATE) ++ #if defined(CONFIG_P2P) ++ && rtw_p2p_chk_state(&(iface->wdinfo), P2P_STATE_NONE) + #endif +- { +- //issue deauth to all stas if if2 is at ap mode +- rtw_sta_flush(pbuddy_adapter); +- } +- rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); ++ ) { ++ connect_allow = _FALSE; ++ break; + } ++ #endif /* CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT */ + } +- else if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED) == _TRUE && +- check_fwstate(pbuddy_mlmepriv, WIFI_STATION_STATE) == _TRUE) //for Client Mode/p2p client +- { +- DBG_871X("start_clnt_join: "ADPT_FMT"(ch=%d, bw=%d, ch_offset=%d)" +- ", "ADPT_FMT" STA mode(ch=%d, bw=%d, ch_offset=%d)\n", +- ADPT_ARG(padapter), pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset, +- ADPT_ARG(pbuddy_adapter), pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); ++ DBG_871X(FUNC_ADPT_FMT" connect_allow:%d\n" ++ , FUNC_ADPT_ARG(adapter), connect_allow); + +- if(pmlmeext->cur_channel != pbuddy_mlmeext->cur_channel) +- { +- chbw_allow = _FALSE; +- } +- else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) && +- (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40)) +- { +- cur_bw = CHANNEL_WIDTH_40; +- cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; +- } +- else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) && +- (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80)) +- { +- cur_bw = CHANNEL_WIDTH_80; +- cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; +- } +- else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_40) && +- (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) && +- (pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset)) +- { +- chbw_allow = _FALSE; +- } +- else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_40) && +- (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80)) +- { +- if(pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) +- { +- chbw_allow = _FALSE; +- } +- else +- { +- cur_bw = CHANNEL_WIDTH_80; +- } +- } +- else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_80) && +- (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40)) +- { +- if(pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) +- { +- chbw_allow = _FALSE; +- } +- } +- else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_80) && +- (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80)) +- { +- if(pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) +- { +- chbw_allow = _FALSE; +- } +- } ++ if (connect_allow == _FALSE) ++ goto exit; + ++connect_allow_hdl: ++ /* connect_allow == _TRUE */ + +- connect_allow = chbw_allow; ++ #ifdef CONFIG_DFS_MASTER ++ rtw_dfs_master_status_apply(adapter, MLME_STA_CONNECTING); ++ #endif + +-#ifdef CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT +- #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) +- /* wlan0-sta mode has higher priority than p2p0-p2p client */ +- if (!rtw_p2p_chk_state(&(pbuddy_adapter->wdinfo), P2P_STATE_NONE) +- && pbuddy_adapter->wdinfo.driver_interface == DRIVER_CFG80211) +- { +- connect_allow = _TRUE; +- } +- #endif /* CONFIG_P2P && CONFIG_IOCTL_CFG80211 */ +-#else +- connect_allow = _TRUE; +-#endif /* CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT */ ++ if (chbw_allow == _FALSE) { ++ u_ch = cur_ch; ++ u_bw = cur_bw; ++ u_offset = cur_ch_offset; + +- DBG_871X("start_clnt_join: connect_allow:%d, chbw_allow:%d\n", connect_allow, chbw_allow); +- if (connect_allow == _TRUE && chbw_allow == _FALSE) { +- /* disconnect buddy's connection */ +- rtw_disassoc_cmd(pbuddy_adapter, 500, _FALSE); +- rtw_indicate_disconnect(pbuddy_adapter); +- rtw_free_assoc_resources(pbuddy_adapter, 1); +- } +- } ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ iface = dvobj->padapters[i]; ++ mlme = &iface->mlmepriv; ++ mlmeext = &iface->mlmeextpriv; + +-exit: +-#endif /* CONFIG_CONCURRENT_MODE */ ++ if (!iface || iface == adapter) ++ continue; + +- if (!ch || !bw || !offset) { +- rtw_warn_on(1); +- connect_allow = _FALSE; ++ if (check_fwstate(mlme, WIFI_AP_STATE) ++ && check_fwstate(mlme, WIFI_ASOC_STATE) ++ ) { ++ #ifdef CONFIG_SPCT_CH_SWITCH ++ if (1) ++ rtw_ap_inform_ch_switch(iface, pmlmeext->cur_channel , pmlmeext->cur_ch_offset); ++ else ++ #endif ++ rtw_sta_flush(iface, _FALSE); ++ ++ rtw_hal_set_hwreg(iface, HW_VAR_CHECK_TXBUF, 0); ++ set_fwstate(mlme, WIFI_OP_CH_SWITCHING); ++ } else if (check_fwstate(mlme, WIFI_STATION_STATE) ++ && check_fwstate(mlme, WIFI_ASOC_STATE) ++ ) { ++ rtw_disassoc_cmd(iface, 500, _FALSE); ++ rtw_indicate_disconnect(iface, 0, _FALSE); ++ rtw_free_assoc_resources(iface, 1); ++ } ++ } + } ++} ++#endif /* CONFIG_CONCURRENT_MODE */ ++ ++exit: + + if (connect_allow == _TRUE) { +- DBG_871X("start_join_set_ch_bw: ch=%d, bwmode=%d, ch_offset=%d\n", cur_ch, cur_bw, cur_ch_offset); +- *ch = cur_ch; +- *bw = cur_bw; +- *offset = cur_ch_offset; ++ DBG_871X(FUNC_ADPT_FMT" union: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); ++ *ch = u_ch; ++ *bw = u_bw; ++ *offset = u_offset; + } + + return connect_allow == _TRUE ? _SUCCESS : _FAIL; + } + + /* Find union about ch, bw, ch_offset of all linked/linking interfaces */ +-int rtw_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) ++int _rtw_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset, bool include_self) + { + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + _adapter *iface; +@@ -14333,6 +15055,12 @@ int rtw_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) + if (!check_fwstate(&iface->mlmepriv, _FW_LINKED|_FW_UNDER_LINKING)) + continue; + ++ if (check_fwstate(&iface->mlmepriv, WIFI_OP_CH_SWITCHING)) ++ continue; ++ ++ if (include_self == _FALSE && adapter == iface) ++ continue; ++ + if (num == 0) { + ch_ret = mlmeext->cur_channel; + bw_ret = mlmeext->cur_bwmode; +@@ -14366,6 +15094,90 @@ int rtw_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) + return num; + } + ++inline int rtw_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) ++{ ++ return _rtw_get_ch_setting_union(adapter, ch, bw, offset, 1); ++} ++ ++inline int rtw_get_ch_setting_union_no_self(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) ++{ ++ return _rtw_get_ch_setting_union(adapter, ch, bw, offset, 0); ++} ++ ++void _rtw_dev_iface_status(_adapter *adapter, u8 *sta_num, u8 *ld_sta_num, u8 *lg_sta_num ++ , u8 *ap_num, u8 *ld_ap_num, bool include_self) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ _adapter *iface; ++ struct mlme_ext_priv *mlmeext; ++ struct mlme_ext_info *mlmeextinfo; ++ int i; ++ u8 sta_num_ret = 0; ++ u8 ld_sta_num_ret = 0; ++ u8 lg_sta_num_ret = 0; ++ u8 ap_num_ret = 0; ++ u8 ld_ap_num_ret = 0; ++ ++ if (sta_num) ++ *sta_num = 0; ++ if (ld_sta_num) ++ *ld_sta_num = 0; ++ if (lg_sta_num) ++ *lg_sta_num = 0; ++ if (ap_num) ++ *ap_num = 0; ++ if (ld_ap_num) ++ *ld_ap_num = 0; ++ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ iface = dvobj->padapters[i]; ++ ++ if (include_self == _FALSE && iface == adapter) ++ continue; ++ ++ mlmeext = &iface->mlmeextpriv; ++ ++ if (mlmeext_msr(mlmeext) == WIFI_FW_STATION_STATE) { ++ sta_num_ret++; ++ if (check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE) ++ ld_sta_num_ret++; ++ if (check_fwstate(&iface->mlmepriv, _FW_UNDER_LINKING) == _TRUE) ++ lg_sta_num_ret++; ++ } ++ ++ if (mlmeext_msr(mlmeext) == WIFI_FW_AP_STATE ++ && check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE ++ ) { ++ ap_num_ret++; ++ if (iface->stapriv.asoc_sta_count > 2) ++ ld_ap_num_ret++; ++ } ++ } ++ ++ if (sta_num) ++ *sta_num = sta_num_ret; ++ if (ld_sta_num) ++ *ld_sta_num = ld_sta_num_ret; ++ if (lg_sta_num) ++ *lg_sta_num = lg_sta_num_ret; ++ if (ap_num) ++ *ap_num = ap_num_ret; ++ if (ld_ap_num) ++ *ld_ap_num = ld_ap_num_ret; ++} ++ ++inline void rtw_dev_iface_status(_adapter *adapter, u8 *sta_num, u8 *ld_sta_num, u8 *lg_sta_num ++ , u8 *ap_num, u8 *ld_ap_num) ++{ ++ return _rtw_dev_iface_status(adapter, sta_num, ld_sta_num, lg_sta_num, ap_num, ld_ap_num, 1); ++} ++ ++inline void rtw_dev_iface_status_no_self(_adapter *adapter, u8 *sta_num, u8 *ld_sta_num, u8 *lg_sta_num ++ , u8 *ap_num, u8 *ld_ap_num) ++{ ++ return _rtw_dev_iface_status(adapter, sta_num, ld_sta_num, lg_sta_num, ap_num, ld_ap_num, 0); ++} ++ + u8 set_ch_hdl(_adapter *padapter, u8 *pbuf) + { + struct set_ch_parm *set_ch_parm; +@@ -14405,6 +15217,7 @@ u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf) + return H2C_PARAMETERS_ERROR; + } + ++ mlme->country_ent = setChannelPlan_param->country_ent; + mlme->ChannelPlan = setChannelPlan_param->channel_plan; + + pmlmeext->max_chan_nums = init_channel_set(padapter, setChannelPlan_param->channel_plan, pmlmeext->channel_set); +@@ -14458,7 +15271,7 @@ u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf) + rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &gval8); + + rtw_disassoc_cmd(padapter, 0, _FALSE); +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + rtw_free_assoc_resources(padapter, 1); + rtw_free_network_queue(padapter, _TRUE); + +@@ -14473,201 +15286,227 @@ u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf) + + } + +-// TDLS_ESTABLISHED : write RCR DATA BIT +-// TDLS_CS_OFF : go back to the channel linked with AP, terminating channel switch procedure +-// TDLS_INIT_CH_SEN : init channel sensing, receive all data and mgnt frame +-// TDLS_DONE_CH_SEN: channel sensing and report candidate channel +-// TDLS_OFF_CH : first time set channel to off channel +-// TDLS_BASE_CH : go back tp the channel linked with AP when set base channel as target channel +-// TDLS_P_OFF_CH : periodically go to off channel +-// TDLS_P_BASE_CH : periodically go back to base channel +-// TDLS_RS_RCR : restore RCR +-// TDLS_TEAR_STA : free tdls sta + u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf) + { + #ifdef CONFIG_TDLS + _irqL irqL; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++#ifdef CONFIG_TDLS_CH_SW ++ struct tdls_ch_switch *pchsw_info = &ptdlsinfo->chsw_info; ++#endif + struct TDLSoption_param *TDLSoption; +- struct sta_info *ptdls_sta; ++ struct sta_info *ptdls_sta = NULL; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + u8 survey_channel, i, min, option; ++ struct tdls_txmgmt txmgmt; ++ u32 setchtime, resp_sleep = 0, wait_time; ++ u8 zaddr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; ++ u8 ret; ++ u8 doiqk; + +- if(!pbuf) ++ if (!pbuf) + return H2C_PARAMETERS_ERROR; + + TDLSoption = (struct TDLSoption_param *)pbuf; +- +- ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), TDLSoption->addr ); + option = TDLSoption->option; + +- if( ptdls_sta == NULL ) +- { +- if( option != TDLS_RS_RCR ) ++ if (!_rtw_memcmp(TDLSoption->addr, zaddr, ETH_ALEN)) { ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), TDLSoption->addr ); ++ if (ptdls_sta == NULL) { ++ return H2C_REJECTED; ++ } ++ } else { ++ if (!(option == TDLS_RS_RCR)) + return H2C_REJECTED; + } + + //_enter_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); +- DBG_871X("[%s] option:%d\n", __FUNCTION__, option); ++ //DBG_871X("[%s] option:%d\n", __FUNCTION__, option); + +- switch(option){ +- case TDLS_ESTABLISHED: +- { +- u8 sta_band = 0; +- +- //leave ALL PS when TDLS is established ++ switch (option) { ++ case TDLS_ESTABLISHED: ++ { ++ /* As long as TDLS handshake success, we should set RCR_CBSSID_DATA bit to 0 */ ++ /* So we can receive all kinds of data frames. */ ++ u8 sta_band = 0; ++ ++ //leave ALL PS when TDLS is established + rtw_pwr_wakeup(padapter); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_WRCR, 0); ++ DBG_871X("Created Direct Link with "MAC_FMT"\n", MAC_ARG(ptdls_sta->hwaddr)); ++ ++ /* Set TDLS sta rate. */ ++ /* Update station supportRate */ ++ rtw_hal_update_sta_rate_mask(padapter, ptdls_sta); ++ if (pmlmeext->cur_channel > 14) { ++ if (ptdls_sta->ra_mask & 0xffff000) ++ sta_band |= WIRELESS_11_5N ; ++ ++ if (ptdls_sta->ra_mask & 0xff0) ++ sta_band |= WIRELESS_11A; ++ ++ /* 5G band */ ++ #ifdef CONFIG_80211AC_VHT ++ if (ptdls_sta->vhtpriv.vht_option) ++ sta_band = WIRELESS_11_5AC; ++ #endif + +- //As long as TDLS handshake success, we should set RCR_CBSSID_DATA bit to 0 +- //so we can receive all kinds of data frames. +- rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_WRCR, 0); +- DBG_871X("Created Direct Link with "MAC_FMT"\n", MAC_ARG(ptdls_sta->hwaddr)); +- +- pmlmeinfo->FW_sta_info[ptdls_sta->mac_id].psta = ptdls_sta; +- //set TDLS sta rate. +- //update station supportRate +- rtw_hal_update_sta_rate_mask(padapter, ptdls_sta); +- if(padapter->mlmeextpriv.cur_channel > 14) { +- if (ptdls_sta->ra_mask & 0xffff000) +- sta_band |= WIRELESS_11_5N ; +- +- if (ptdls_sta->ra_mask & 0xff0) +- sta_band |= WIRELESS_11A; +- +- // 5G band +- #ifdef CONFIG_80211AC_VHT +- if (ptdls_sta->vhtpriv.vht_option) { +- sta_band = WIRELESS_11_5AC; +- } +- #endif +- +- } else { +- if (ptdls_sta->ra_mask & 0xffff000) +- sta_band |= WIRELESS_11_24N; ++ } else { ++ if (ptdls_sta->ra_mask & 0xffff000) ++ sta_band |= WIRELESS_11_24N; + +- if (ptdls_sta->ra_mask & 0xff0) +- sta_band |= WIRELESS_11G; ++ if (ptdls_sta->ra_mask & 0xff0) ++ sta_band |= WIRELESS_11G; + +- if (ptdls_sta->ra_mask & 0x0f) +- sta_band |= WIRELESS_11B; +- } +- ptdls_sta->wireless_mode = sta_band; +- ptdls_sta->raid = rtw_hal_networktype_to_raid(padapter,ptdls_sta); +- set_sta_rate(padapter, ptdls_sta); +- //sta mode +- rtw_hal_set_odm_var(padapter,HAL_ODM_STA_INFO,ptdls_sta,_TRUE); +- break; ++ if (ptdls_sta->ra_mask & 0x0f) ++ sta_band |= WIRELESS_11B; + } +- case TDLS_SD_PTI: +- ptdls_sta->tdls_sta_state |= TDLS_WAIT_PTR_STATE; +- issue_tdls_peer_traffic_indication(padapter, ptdls_sta); +- _set_timer(&ptdls_sta->pti_timer, TDLS_PTI_TIME); +- break; +- case TDLS_CS_OFF: +- _cancel_timer_ex(&ptdls_sta->base_ch_timer); +- _cancel_timer_ex(&ptdls_sta->off_ch_timer); +- SelectChannel(padapter, pmlmeext->cur_channel); +- ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SWITCH_ON_STATE | +- TDLS_PEER_AT_OFF_STATE | +- TDLS_AT_OFF_CH_STATE); +- DBG_871X("go back to base channel\n "); +- issue_nulldata(padapter, NULL, 0, 0, 0); +- break; +- case TDLS_INIT_CH_SEN: +- rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_INIT_CH_SEN, 0); +- pmlmeext->sitesurvey_res.channel_idx = 0; +- ptdls_sta->option = TDLS_DONE_CH_SEN; +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_DONE_CH_SEN); ++ ptdls_sta->wireless_mode = sta_band; ++ ptdls_sta->raid = rtw_hal_networktype_to_raid(padapter,ptdls_sta); ++ set_sta_rate(padapter, ptdls_sta); ++ rtw_sta_media_status_rpt(padapter, ptdls_sta, 1); ++ /* Sta mode */ ++ rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, ptdls_sta,_TRUE); ++ break; ++ } ++ case TDLS_ISSUE_PTI: ++ ptdls_sta->tdls_sta_state |= TDLS_WAIT_PTR_STATE; ++ issue_tdls_peer_traffic_indication(padapter, ptdls_sta); ++ _set_timer(&ptdls_sta->pti_timer, TDLS_PTI_TIME); ++ break; ++#ifdef CONFIG_TDLS_CH_SW ++ case TDLS_CH_SW_RESP: ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ txmgmt.status_code = 0; ++ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); ++ ++ issue_nulldata(padapter, NULL, 1, 3, 3); ++ ++ DBG_871X("[TDLS ] issue tdls channel switch response\n"); ++ ret = issue_tdls_ch_switch_rsp(padapter, &txmgmt, _TRUE); ++ ++ /* If we receive TDLS_CH_SW_REQ at off channel which it's target is AP's channel */ ++ /* then we just SelectChannel to AP's channel*/ ++ if (padapter->mlmeextpriv.cur_channel == pchsw_info->off_ch_num) { ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_END_TO_BASE_CHNL); + break; +- case TDLS_DONE_CH_SEN: +- survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum; +- if(survey_channel){ +- SelectChannel(padapter, survey_channel); +- ptdlsinfo->cur_channel = survey_channel; +- pmlmeext->sitesurvey_res.channel_idx++; +- _set_timer(&ptdls_sta->option_timer, SURVEY_TO); +- }else{ +- SelectChannel(padapter, pmlmeext->cur_channel); +- +- rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_DONE_CH_SEN, 0); +- +- if(ptdlsinfo->ch_sensing==1){ +- ptdlsinfo->ch_sensing=0; +- ptdlsinfo->cur_channel=1; +- min=ptdlsinfo->collect_pkt_num[0]; +- for(i=1; i ptdlsinfo->collect_pkt_num[i]){ +- ptdlsinfo->cur_channel=i+1; +- min=ptdlsinfo->collect_pkt_num[i]; +- } +- ptdlsinfo->collect_pkt_num[i]=0; +- } +- ptdlsinfo->collect_pkt_num[0]=0; +- ptdlsinfo->candidate_ch=ptdlsinfo->cur_channel; +- DBG_871X("TDLS channel sensing done, candidate channel: %02x\n", ptdlsinfo->candidate_ch); +- ptdlsinfo->cur_channel=0; ++ } + +- } ++ if (ret == _SUCCESS) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_TO_OFF_CHNL); ++ else ++ DBG_871X("[TDLS] issue_tdls_ch_switch_rsp wait ack fail !!!!!!!!!!\n"); + +- if(ptdls_sta->tdls_sta_state & TDLS_PEER_SLEEP_STATE){ +- ptdls_sta->tdls_sta_state |= TDLS_APSD_CHSW_STATE; +- }else{ +- //send null data with pwrbit==1 before send ch_switching_req to peer STA. +- issue_nulldata(padapter, NULL, 1, 0, 0); ++ break; ++ case TDLS_CH_SW_PREPARE: ++ pchsw_info->ch_sw_state |= TDLS_CH_SWITCH_PREPARE_STATE; ++ ++ /* to collect IQK info of off-chnl */ ++ doiqk = _TRUE; ++ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, &doiqk); ++ set_channel_bwmode(padapter, pchsw_info->off_ch_num, pchsw_info->ch_offset, (pchsw_info->ch_offset) ? CHANNEL_WIDTH_40 : CHANNEL_WIDTH_20); ++ doiqk = _FALSE; ++ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, &doiqk); ++ ++ /* switch back to base-chnl */ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); + +- ptdls_sta->tdls_sta_state |= TDLS_CH_SW_INITIATOR_STATE; ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_START); + +- issue_tdls_ch_switch_req(padapter, ptdls_sta->hwaddr); +- DBG_871X("issue tdls ch switch req\n"); ++ pchsw_info->ch_sw_state &= ~(TDLS_CH_SWITCH_PREPARE_STATE); ++ ++ break; ++ case TDLS_CH_SW_START: ++ rtw_tdls_set_ch_sw_oper_control(padapter, _TRUE); ++ break; ++ case TDLS_CH_SW_TO_OFF_CHNL: ++ issue_nulldata(padapter, NULL, 1, 3, 3); ++ ++ if (!(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE)) ++ _set_timer(&ptdls_sta->ch_sw_timer, (u32)(ptdls_sta->ch_switch_timeout) / 1000); ++ ++ if (rtw_tdls_do_ch_sw(padapter, TDLS_CH_SW_OFF_CHNL, pchsw_info->off_ch_num, ++ pchsw_info->ch_offset, (pchsw_info->ch_offset) ? CHANNEL_WIDTH_40 : CHANNEL_WIDTH_20, ptdls_sta->ch_switch_time) == _SUCCESS) { ++ pchsw_info->ch_sw_state &= ~(TDLS_PEER_AT_OFF_STATE); ++ if (pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE) { ++ if (issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta->hwaddr, 0, 1, 3) == _FAIL) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_TO_BASE_CHNL); + } ++ } else { ++ u8 bcancelled; ++ ++ if (!(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE)) ++ _cancel_timer(&ptdls_sta->ch_sw_timer, &bcancelled); ++ } ++ ++ ++ break; ++ case TDLS_CH_SW_END: ++ case TDLS_CH_SW_END_TO_BASE_CHNL: ++ rtw_tdls_set_ch_sw_oper_control(padapter, _FALSE); ++ _cancel_timer_ex(&ptdls_sta->ch_sw_timer); ++ _cancel_timer_ex(&ptdls_sta->stay_on_base_chnl_timer); ++ _cancel_timer_ex(&ptdls_sta->ch_sw_monitor_timer); ++#if 0 ++ _rtw_memset(pHalData->tdls_ch_sw_iqk_info_base_chnl, 0x00, sizeof(pHalData->tdls_ch_sw_iqk_info_base_chnl)); ++ _rtw_memset(pHalData->tdls_ch_sw_iqk_info_off_chnl, 0x00, sizeof(pHalData->tdls_ch_sw_iqk_info_off_chnl)); ++#endif ++ ++ if (option == TDLS_CH_SW_END_TO_BASE_CHNL) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_TO_BASE_CHNL); ++ ++ break; ++ case TDLS_CH_SW_TO_BASE_CHNL_UNSOLICITED: ++ case TDLS_CH_SW_TO_BASE_CHNL: ++ pchsw_info->ch_sw_state &= ~(TDLS_PEER_AT_OFF_STATE | TDLS_WAIT_CH_RSP_STATE); ++ ++ if (option == TDLS_CH_SW_TO_BASE_CHNL_UNSOLICITED) { ++ if (ptdls_sta != NULL) { ++ /* Send unsolicited channel switch rsp. to peer */ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ txmgmt.status_code = 0; ++ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); ++ issue_tdls_ch_switch_rsp(padapter, &txmgmt, _FALSE); + } +- break; +- case TDLS_OFF_CH: +- issue_nulldata(padapter, NULL, 1, 0, 0); +- SelectChannel(padapter, ptdls_sta->off_ch); +- +- DBG_871X("change channel to tar ch:%02x\n", ptdls_sta->off_ch); +- ptdls_sta->tdls_sta_state |= TDLS_AT_OFF_CH_STATE; +- ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_AT_OFF_STATE); +- _set_timer(&ptdls_sta->option_timer, (u32)ptdls_sta->ch_switch_time); +- break; +- case TDLS_BASE_CH: +- _cancel_timer_ex(&ptdls_sta->base_ch_timer); +- _cancel_timer_ex(&ptdls_sta->off_ch_timer); +- SelectChannel(padapter, pmlmeext->cur_channel); +- ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SWITCH_ON_STATE | +- TDLS_PEER_AT_OFF_STATE | +- TDLS_AT_OFF_CH_STATE); +- DBG_871X("go back to base channel\n "); +- issue_nulldata(padapter, NULL, 0, 0, 0); +- _set_timer(&ptdls_sta->option_timer, (u32)ptdls_sta->ch_switch_time); +- break; +- case TDLS_P_OFF_CH: +- SelectChannel(padapter, pmlmeext->cur_channel); +- issue_nulldata(padapter, NULL, 0, 0, 0); +- DBG_871X("change channel to base ch:%02x\n", pmlmeext->cur_channel); +- ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_AT_OFF_STATE| TDLS_AT_OFF_CH_STATE); +- _set_timer(&ptdls_sta->off_ch_timer, TDLS_STAY_TIME); +- break; +- case TDLS_P_BASE_CH: +- issue_nulldata(ptdls_sta->padapter, NULL, 1, 0, 0); +- SelectChannel(padapter, ptdls_sta->off_ch); +- DBG_871X("change channel to off ch:%02x\n", ptdls_sta->off_ch); +- ptdls_sta->tdls_sta_state |= TDLS_AT_OFF_CH_STATE; +- if((ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE) != TDLS_PEER_AT_OFF_STATE){ +- issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 0, 3, 300); +- } +- _set_timer(&ptdls_sta->base_ch_timer, TDLS_STAY_TIME); +- break; +- case TDLS_RS_RCR: +- rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_RS_RCR, 0); +- DBG_871X("wirte REG_RCR, set bit6 on\n"); +- break; +- case TDLS_TEAR_STA: +- free_tdls_sta(padapter, ptdls_sta); +- break; +- ++ } ++ ++ if (rtw_tdls_do_ch_sw(padapter, TDLS_CH_SW_BASE_CHNL, pmlmeext->cur_channel, ++ pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode, ptdls_sta->ch_switch_time) == _SUCCESS) { ++ issue_nulldata(padapter, NULL, 0, 3, 3); ++ /* set ch sw monitor timer for responder */ ++ if (!(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE)) ++ _set_timer(&ptdls_sta->ch_sw_monitor_timer, TDLS_CH_SW_MONITOR_TIMEOUT); ++ } ++ ++ break; ++#endif ++ case TDLS_RS_RCR: ++ rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_RS_RCR, 0); ++ DBG_871X("[TDLS] write REG_RCR, set bit6 on\n"); ++ break; ++ case TDLS_TEARDOWN_STA: ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ txmgmt.status_code = 0; ++ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); ++ ++ issue_tdls_teardown(padapter, &txmgmt, _TRUE); ++ break; ++ case TDLS_TEARDOWN_STA_LOCALLY: ++#ifdef CONFIG_TDLS_CH_SW ++ if (_rtw_memcmp(TDLSoption->addr, pchsw_info->addr, ETH_ALEN) == _TRUE) { ++ pchsw_info->ch_sw_state &= ~(TDLS_CH_SW_INITIATOR_STATE | ++ TDLS_CH_SWITCH_ON_STATE | ++ TDLS_PEER_AT_OFF_STATE); ++ rtw_tdls_set_ch_sw_oper_control(padapter, _FALSE); ++ _rtw_memset(pchsw_info->addr, 0x00, ETH_ALEN); ++ } ++#endif ++ rtw_sta_media_status_rpt(padapter, ptdls_sta, 0); ++ free_tdls_sta(padapter, ptdls_sta); ++ break; + } + + //_exit_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); +@@ -14675,7 +15514,7 @@ u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf) + return H2C_SUCCESS; + #else + return H2C_REJECTED; +-#endif //CONFIG_TDLS ++#endif /* CONFIG_TDLS */ + + } + +@@ -14694,3 +15533,38 @@ u8 run_in_thread_hdl(_adapter *padapter, u8 *pbuf) + return H2C_SUCCESS; + } + ++u8 rtw_getmacreg_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ ++ struct readMAC_parm *preadmacparm = NULL; ++ u8 sz = 0; ++ u32 addr = 0; ++ u32 value = 0; ++ ++ if (!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ preadmacparm = (struct readMAC_parm *) pbuf; ++ sz = preadmacparm->len; ++ addr = preadmacparm->addr; ++ value = 0; ++ ++ switch (sz) { ++ case 1: ++ value = rtw_read8(padapter, addr); ++ break; ++ case 2: ++ value = rtw_read16(padapter, addr); ++ break; ++ case 4: ++ value = rtw_read32(padapter, addr); ++ break; ++ default: ++ DBG_871X("%s: Unknown size\n", __func__); ++ break; ++ } ++ DBG_871X("%s: addr:0x%02x valeu:0x%02x\n", __func__, addr, value); ++ ++ return H2C_SUCCESS; ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mp.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mp.c +old mode 100755 +new mode 100644 +index 772633e..970ad98 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mp.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mp.c +@@ -18,18 +18,29 @@ + * + ******************************************************************************/ + #define _RTW_MP_C_ +- + #include +- + #ifdef PLATFORM_FREEBSD + #include /* for RFHIGHPID */ + #endif + +-#include "../hal/OUTSRC/phydm_precomp.h" +-#if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) ++#include "../hal/phydm/phydm_precomp.h" ++#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) + #include + #endif + ++#ifdef CONFIG_MP_VHT_HW_TX_MODE ++#define CEILING_POS(X) ((X - (int)(X)) > 0 ? (int)(X + 1) : (int)(X)) ++#define CEILING_NEG(X) ((X - (int)(X)) < 0 ? (int)(X - 1) : (int)(X)) ++#define ceil(X) (((X) > 0) ? CEILING_POS(X) : CEILING_NEG(X)) ++ ++int rtfloor(float x) ++{ ++int i = x - 2; ++while ++(++i <= x - 1); ++return i; ++} ++#endif + + #ifdef CONFIG_MP_INCLUDED + +@@ -117,7 +128,7 @@ static void _init_mp_priv_(struct mp_priv *pmp_priv) + pmp_priv->channel = 1; + pmp_priv->bandwidth = CHANNEL_WIDTH_20; + pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- pmp_priv->rateidx = MPT_RATE_1M; ++ pmp_priv->rateidx = RATE_1M; + pmp_priv->txpoweridx = 0x2A; + + pmp_priv->antenna_tx = ANTENNA_A; +@@ -139,12 +150,19 @@ static void _init_mp_priv_(struct mp_priv *pmp_priv) + pmp_priv->network_macaddr[5] = 0x55; + + pmp_priv->bSetRxBssid = _FALSE; ++ pmp_priv->bRTWSmbCfg = _FALSE; + + pnetwork = &pmp_priv->mp_network.network; + _rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN); + + pnetwork->Ssid.SsidLength = 8; + _rtw_memcpy(pnetwork->Ssid.Ssid, "mp_871x", pnetwork->Ssid.SsidLength); ++ ++ pmp_priv->tx.payload = 2; ++#ifdef CONFIG_80211N_HT ++ pmp_priv->tx.attrib.ht_en = 1; ++#endif ++ + } + + #ifdef PLATFORM_WINDOWS +@@ -255,6 +273,8 @@ _exit_init_mp_priv: + + static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter) + { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ + struct pkt_attrib *pattrib; + + // init xmitframe attribute +@@ -263,8 +283,10 @@ static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter) + _rtw_memset(pmptx->desc, 0, TXDESC_SIZE); + + pattrib->ether_type = 0x8712; +- //_rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN); +-// _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ #if 0 ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ #endif + _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); + + // pattrib->dhcp_pkt = 0; +@@ -280,20 +302,37 @@ static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter) + pattrib->encrypt = 0; + pattrib->bswenc = _FALSE; + pattrib->qos_en = _FALSE; ++ ++ pattrib->pktlen = 1500; ++ ++#ifdef CONFIG_80211AC_VHT ++ if (pHalData->rf_type == RF_1T1R) ++ pattrib->raid = RATEID_IDX_VHT_1SS; ++ else if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_2T4R) ++ pattrib->raid = RATEID_IDX_VHT_2SS; ++ else if (pHalData->rf_type == RF_3T3R) ++ pattrib->raid = RATEID_IDX_VHT_3SS; ++ else ++ pattrib->raid = RATEID_IDX_BGN_40M_1SS; ++#endif + } + + s32 init_mp_priv(PADAPTER padapter) + { + struct mp_priv *pmppriv = &padapter->mppriv; ++ PHAL_DATA_TYPE pHalData; + ++ pHalData = GET_HAL_DATA(padapter); ++ + _init_mp_priv_(pmppriv); + pmppriv->papdater = padapter; + pmppriv->mp_dm =0; + pmppriv->tx.stop = 1; +- pmppriv->bSetTxPower=0; //for manually set tx power +- pmppriv->bTxBufCkFail=_FALSE; +- pmppriv->pktInterval=0; +- ++ pmppriv->bSetTxPower = 0; /*for manually set tx power*/ ++ pmppriv->bTxBufCkFail = _FALSE; ++ pmppriv->pktInterval = 0; ++ pmppriv->pktLength = 1000; ++ + mp_init_xmit_attrib(&pmppriv->tx, padapter); + + switch (padapter->registrypriv.rf_config) { +@@ -312,11 +351,14 @@ s32 init_mp_priv(PADAPTER padapter) + pmppriv->antenna_rx = ANTENNA_AB; + break; + case RF_2T4R: +- pmppriv->antenna_tx = ANTENNA_AB; ++ pmppriv->antenna_tx = ANTENNA_BC; + pmppriv->antenna_rx = ANTENNA_ABCD; + break; + } +- ++ ++ pHalData->AntennaRxPath = pmppriv->antenna_rx; ++ pHalData->AntennaTxPath = pmppriv->antenna_tx; ++ + return _SUCCESS; + } + +@@ -356,8 +398,7 @@ static VOID PHY_SetRFPathSwitch_default( + + void mpt_InitHWConfig(PADAPTER Adapter) + { +- if (IS_HARDWARE_TYPE_8723B(Adapter)) +- { ++ if (IS_HARDWARE_TYPE_8723B(Adapter)) { + // TODO: <20130114, Kordan> The following setting is only for DPDT and Fixed board type. + // TODO: A better solution is configure it according EFUSE during the run-time. + +@@ -376,66 +417,50 @@ void mpt_InitHWConfig(PADAPTER Adapter) + PHY_SetMacReg(Adapter, 0x64, bMaskDWord, 0x36000000); //Fix BT S0/S1 + PHY_SetMacReg(Adapter, 0x948, bMaskDWord, 0x0); //Fix BT can't Tx + +- // <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou) +- PHY_SetBBReg(Adapter, 0xA00, BIT8, 0x0); //0xA01[0] = 0 +- } ++ /* <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou) */ ++ PHY_SetBBReg(Adapter, 0xA00, BIT8, 0x0); /*0xA01[0] = 0*/ ++ } else if (IS_HARDWARE_TYPE_8821(Adapter)) { ++ /* <20131121, VincentL> Add for 8821AU DPDT setting and fix switching antenna issue (Asked by Rock) ++ <20131122, VincentL> Enable for all 8821A/8811AU (Asked by Alex)*/ ++ PHY_SetMacReg(Adapter, 0x4C, BIT23, 0x0); /*0x4C[23:22]=01*/ ++ PHY_SetMacReg(Adapter, 0x4C, BIT22, 0x1); /*0x4C[23:22]=01*/ ++ } else if (IS_HARDWARE_TYPE_8188ES(Adapter)) ++ PHY_SetMacReg(Adapter, 0x4C , BIT23, 0); /*select DPDT_P and DPDT_N as output pin*/ ++#ifdef CONFIG_RTL8814A ++ else if (IS_HARDWARE_TYPE_8814A(Adapter)) ++ PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8814A, 0x2000); ++#endif ++ /* ++ else if(IS_HARDWARE_TYPE_8822B(Adapter)) ++ { ++ PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8822B, 0x2000); ++ }*/ + } + +- +-#if defined (CONFIG_RTL8192C) || defined (CONFIG_RTL8723A) +-#define PHY_IQCalibrate(a,b) rtl8192c_PHY_IQCalibrate(a,b) +-#define PHY_LCCalibrate(a) rtl8192c_PHY_LCCalibrate(a) +-//#define dm_CheckTXPowerTracking(a) rtl8192c_odm_CheckTXPowerTracking(a) +-#define PHY_SetRFPathSwitch(a,b) rtl8192c_PHY_SetRFPathSwitch(a,b) +-#endif +- +-#ifdef CONFIG_RTL8192D +-#define PHY_IQCalibrate(a,b) rtl8192d_PHY_IQCalibrate(a) +-#define PHY_LCCalibrate(a) rtl8192d_PHY_LCCalibrate(a) +-//#define dm_CheckTXPowerTracking(a) rtl8192d_odm_CheckTXPowerTracking(a) +-#define PHY_SetRFPathSwitch(a,b) rtl8192d_PHY_SetRFPathSwitch(a,b) +-#endif +- + #ifdef CONFIG_RTL8188E + #define PHY_IQCalibrate(a,b) PHY_IQCalibrate_8188E(a,b) + #define PHY_LCCalibrate(a) PHY_LCCalibrate_8188E(&(GET_HAL_DATA(a)->odmpriv)) + #define PHY_SetRFPathSwitch(a,b) PHY_SetRFPathSwitch_8188E(a,b) + #endif + +-#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) +-/* +-#define PHY_IQCalibrate(a,b) PHY_IQCalibrate_8812A(a,b) +-#define PHY_LCCalibrate(a) PHY_LCCalibrate_8812A(&(GET_HAL_DATA(a)->odmpriv)) +-#define PHY_SetRFPathSwitch(a,b) PHY_SetRFPathSwitch_8812A(a,b) +-*/ ++#ifdef CONFIG_RTL8814A ++#define PHY_IQCalibrate(a,b) PHY_IQCalibrate_8814A(&(GET_HAL_DATA(a)->odmpriv), b) ++#define PHY_LCCalibrate(a) PHY_LCCalibrate_8814A(&(GET_HAL_DATA(a)->odmpriv)) ++#define PHY_SetRFPathSwitch(a,b) PHY_SetRFPathSwitch_8814A(a,b) ++#endif /* CONFIG_RTL8814A */ + +-#ifndef CONFIG_RTL8812A +-#define PHY_IQCalibrate_8812A +-#define PHY_LCCalibrate_8812A +-#define PHY_SetRFPathSwitch_8812A ++#ifdef CONFIG_RTL8812A ++#define PHY_IQCalibrate(_Adapter, b) PHY_IQCalibrate_8812A(_Adapter, b) ++#define PHY_LCCalibrate(_Adapter) PHY_LCCalibrate_8812A(&(GET_HAL_DATA(_Adapter)->odmpriv)) ++#define PHY_SetRFPathSwitch(_Adapter, b) PHY_SetRFPathSwitch_8812A(_Adapter, b) + #endif + +-#ifndef CONFIG_RTL8821A +-#define PHY_IQCalibrate_8821A +-#define PHY_LCCalibrate_8821A +-#define PHY_SetRFPathSwitch_8812A ++#ifdef CONFIG_RTL8821A ++#define PHY_IQCalibrate(_Adapter, b) PHY_IQCalibrate_8821A(&(GET_HAL_DATA(_Adapter)->odmpriv), b) ++#define PHY_LCCalibrate(_Adapter) PHY_LCCalibrate_8821A(&(GET_HAL_DATA(_Adapter)->odmpriv)) ++#define PHY_SetRFPathSwitch(_Adapter, b) PHY_SetRFPathSwitch_8812A(_Adapter, b) + #endif + +-#define PHY_IQCalibrate(_Adapter, b) \ +- IS_HARDWARE_TYPE_8812(_Adapter) ? PHY_IQCalibrate_8812A(_Adapter, b) : \ +- IS_HARDWARE_TYPE_8821(_Adapter) ? PHY_IQCalibrate_8821A(&(GET_HAL_DATA(_Adapter)->odmpriv), b) : \ +- PHY_IQCalibrate_default(_Adapter, b) +- +-#define PHY_LCCalibrate(_Adapter) \ +- IS_HARDWARE_TYPE_8812(_Adapter) ? PHY_LCCalibrate_8812A(&(GET_HAL_DATA(_Adapter)->odmpriv)) : \ +- IS_HARDWARE_TYPE_8821(_Adapter) ? PHY_LCCalibrate_8821A(&(GET_HAL_DATA(_Adapter)->odmpriv)) : \ +- PHY_LCCalibrate_default(_Adapter) +- +-#define PHY_SetRFPathSwitch(_Adapter, b) \ +- (IS_HARDWARE_TYPE_JAGUAR(_Adapter)) ? PHY_SetRFPathSwitch_8812A(_Adapter, b) : \ +- PHY_SetRFPathSwitch_default(_Adapter, b) +- +-#endif //#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) + #ifdef CONFIG_RTL8192E + #define PHY_IQCalibrate(a,b) PHY_IQCalibrate_8192E(a,b) + #define PHY_LCCalibrate(a) PHY_LCCalibrate_8192E(&(GET_HAL_DATA(a)->odmpriv)) +@@ -460,6 +485,28 @@ static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery) + #define PHY_SetRFPathSwitch(a,b) PHY_SetRFPathSwitch_8723B(a,b) + #endif + ++#ifdef CONFIG_RTL8703B ++static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery) ++{ ++ PHY_IQCalibrate_8703B(padapter, bReCovery); ++} ++ ++ ++#define PHY_LCCalibrate(a) PHY_LCCalibrate_8703B(&(GET_HAL_DATA(a)->odmpriv)) ++#define PHY_SetRFPathSwitch(a, b) ++#endif ++ ++#ifdef CONFIG_RTL8188F ++static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery) ++{ ++ PHY_IQCalibrate_8188F(padapter, bReCovery, _FALSE); ++} ++ ++ ++#define PHY_LCCalibrate(a) PHY_LCCalibrate_8188F(&(GET_HAL_DATA(a)->odmpriv)) ++#define PHY_SetRFPathSwitch(a, b) PHY_SetRFPathSwitch_8188F(a, b) ++#endif ++ + s32 + MPT_InitializeAdapter( + IN PADAPTER pAdapter, +@@ -477,7 +524,7 @@ MPT_InitializeAdapter( + pMptCtx->bMptIndexEven = _TRUE; //default gain index is -6.0db + pMptCtx->h2cReqNum = 0x0; + //init for BT MP +-#if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) ++#if defined(CONFIG_RTL8723B) + pMptCtx->bMPh2c_timeout = _FALSE; + pMptCtx->MptH2cRspEvent = _FALSE; + pMptCtx->MptBtC2hEvent = _FALSE; +@@ -485,64 +532,40 @@ MPT_InitializeAdapter( + _init_timer( &pMptCtx->MPh2c_timeout_timer, pAdapter->pnetdev, MPh2c_timeout_handle, pAdapter ); + #endif + +-#ifdef CONFIG_RTL8723A +- rtl8723a_InitAntenna_Selection(pAdapter); +-#endif //CONFIG_RTL8723A ++ mpt_InitHWConfig(pAdapter); ++ + #ifdef CONFIG_RTL8723B + rtl8723b_InitAntenna_Selection(pAdapter); + if (IS_HARDWARE_TYPE_8723B(pAdapter)) + { +- mpt_InitHWConfig(pAdapter); +- // <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou) +- PHY_SetBBReg(pAdapter, 0xA00, BIT8, 0x0); //0xA01[0] = 0 +- PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); //default use Main +- //<20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten. ++ ++ /* <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou)*/ ++ PHY_SetBBReg(pAdapter, 0xA00, BIT8, 0x0); ++ PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /*default use Main*/ ++ /*<20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten. */ + if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)) +- PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E); + else +- PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); + } ++ /*set ant to wifi side in mp mode*/ ++ rtw_write16(pAdapter, 0x870, 0x300); ++ rtw_write16(pAdapter, 0x860, 0x110); + #endif + + pMptCtx->bMptWorkItemInProgress = _FALSE; + pMptCtx->CurrMptAct = NULL; + pMptCtx->MptRfPath = ODM_RF_PATH_A; + //------------------------------------------------------------------------- +- +-#if 1 + // Don't accept any packets + rtw_write32(pAdapter, REG_RCR, 0); +-#else +- // Accept CRC error and destination address +- //pHalData->ReceiveConfig |= (RCR_ACRC32|RCR_AAP); +- //rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig); +- rtw_write32(pAdapter, REG_RCR, 0x70000101); +-#endif +- +-#if 0 +- // If EEPROM or EFUSE is empty,we assign as RF 2T2R for MP. +- if (pHalData->AutoloadFailFlag == TRUE) +- { +- pHalData->RF_Type = RF_2T2R; +- } +-#endif + + //ledsetting = rtw_read32(pAdapter, REG_LEDCFG0); + //rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~LED0DIS); + +- if(IS_HARDWARE_TYPE_8192DU(pAdapter)) +- { +- rtw_write32(pAdapter, REG_LEDCFG0, 0x8888); +- } +- else +- { +- //rtw_write32(pAdapter, REG_LEDCFG0, 0x08080); +- ledsetting = rtw_read32(pAdapter, REG_LEDCFG0); +- +- #if defined (CONFIG_RTL8192C) || defined( CONFIG_RTL8192D ) +- rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~BIT(7)); +- #endif +- } ++ //rtw_write32(pAdapter, REG_LEDCFG0, 0x08080); ++ ledsetting = rtw_read32(pAdapter, REG_LEDCFG0); ++ + + PHY_LCCalibrate(pAdapter); + PHY_IQCalibrate(pAdapter, _FALSE); +@@ -553,17 +576,20 @@ MPT_InitializeAdapter( + pMptCtx->backup0xc50 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); + pMptCtx->backup0xc58 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); + pMptCtx->backup0xc30 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0); +-#ifdef CONFIG_RTL8188E + pMptCtx->backup0x52_RF_A = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); +- pMptCtx->backup0x52_RF_B = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); ++ pMptCtx->backup0x52_RF_B = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); ++#ifdef CONFIG_RTL8188E + rtw_write32(pAdapter, REG_MACID_NO_LINK_0, 0x0); + rtw_write32(pAdapter, REG_MACID_NO_LINK_1, 0x0); + #endif +- +- //set ant to wifi side in mp mode +- rtw_write16(pAdapter, 0x870, 0x300); +- rtw_write16(pAdapter, 0x860, 0x110); +- ++#ifdef CONFIG_RTL8814A ++ if (IS_HARDWARE_TYPE_8814A(pAdapter)) { ++ pHalData->BackUp_IG_REG_4_Chnl_Section[0] = (u1Byte)PHY_QueryBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0); ++ pHalData->BackUp_IG_REG_4_Chnl_Section[1] = (u1Byte)PHY_QueryBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0); ++ pHalData->BackUp_IG_REG_4_Chnl_Section[2] = (u1Byte)PHY_QueryBBReg(pAdapter, rC_IGI_Jaguar2, bMaskByte0); ++ pHalData->BackUp_IG_REG_4_Chnl_Section[3] = (u1Byte)PHY_QueryBBReg(pAdapter, rD_IGI_Jaguar2, bMaskByte0); ++ } ++#endif + return rtStatus; + } + +@@ -592,7 +618,7 @@ MPT_DeInitAdapter( + PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; + + pMptCtx->bMptDrvUnload = _TRUE; +- #if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) ++ #if defined(CONFIG_RTL8723B) + _rtw_free_sema(&(pMptCtx->MPh2c_Sema)); + _cancel_timer_ex( &pMptCtx->MPh2c_timeout_timer); + #endif +@@ -624,6 +650,7 @@ static u8 mpt_ProStartTest(PADAPTER padapter) + pMptCtx->bSingleCarrier = _FALSE; + pMptCtx->bCarrierSuppression = _FALSE; + pMptCtx->bSingleTone = _FALSE; ++ pMptCtx->HWTxmode = PACKETS_TX; + + return _SUCCESS; + } +@@ -634,45 +661,33 @@ static u8 mpt_ProStartTest(PADAPTER padapter) + s32 SetPowerTracking(PADAPTER padapter, u8 enable) + { + +- Hal_SetPowerTracking( padapter, enable ); ++ hal_mpt_SetPowerTracking(padapter, enable); + return 0; + } + + void GetPowerTracking(PADAPTER padapter, u8 *enable) + { +- Hal_GetPowerTracking( padapter, enable ); ++ hal_mpt_GetPowerTracking(padapter, enable); + } + + static void disable_dm(PADAPTER padapter) + { +-#ifndef CONFIG_RTL8723A + u8 v8; +-#endif + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +- ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + + //3 1. disable firmware dynamic mechanism + // disable Power Training, Rate Adaptive +-#ifdef CONFIG_RTL8723A +- SetBcnCtrlReg(padapter, 0, EN_BCN_FUNCTION); +-#else + v8 = rtw_read8(padapter, REG_BCN_CTRL); + v8 &= ~EN_BCN_FUNCTION; + rtw_write8(padapter, REG_BCN_CTRL, v8); +-#endif + + //3 2. disable driver dynamic mechanism +- // disable Dynamic Initial Gain +- // disable High Power +- // disable Power Tracking +- Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ rtw_phydm_func_disable_all(padapter); + + // enable APK, LCK and IQK but disable power tracking +-#if !(defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)|| defined(CONFIG_RTL8192E)) +- pdmpriv->TxPowerTrackControl = _FALSE; +-#endif +- Switch_DM_Func(padapter, DYNAMIC_RF_CALIBRATION, _TRUE); ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE; ++ rtw_phydm_func_set(padapter, ODM_RF_CALIBRATION); + + //#ifdef CONFIG_BT_COEXIST + // rtw_btcoex_Switch(padapter, 0); //remove for BT MP Down. +@@ -683,35 +698,30 @@ static void disable_dm(PADAPTER padapter) + void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart) + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + + if (bstart==1){ +- DBG_871X("in MPT_PwrCtlDM start \n"); +- Switch_DM_Func(padapter, DYNAMIC_RF_TX_PWR_TRACK, _TRUE); +- pdmpriv->InitODMFlag |= ODM_RF_TX_PWR_TRACK ; +- pdmpriv->InitODMFlag |= ODM_RF_CALIBRATION ; +- pdmpriv->TxPowerTrackControl = _TRUE; ++ DBG_871X("in MPT_PwrCtlDM start\n"); ++ rtw_phydm_func_set(padapter, ODM_RF_TX_PWR_TRACK | ODM_RF_CALIBRATION); ++ + pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; + padapter->mppriv.mp_dm =1; +- odm_TXPowerTrackingInit(pDM_Odm); +- ODM_ClearTxPowerTrackingState(pDM_Odm); + + }else{ + DBG_871X("in MPT_PwrCtlDM stop \n"); + disable_dm(padapter); +- pdmpriv->InitODMFlag = 0 ; +- pdmpriv->TxPowerTrackControl = _FALSE; + pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE; + padapter->mppriv.mp_dm = 0; + { + TXPWRTRACK_CFG c; + u1Byte chnl =0 ; +- ++ _rtw_memset(&c, 0, sizeof(TXPWRTRACK_CFG)); + ConfigureTxpowerTrack(pDM_Odm, &c); + ODM_ClearTxPowerTrackingState(pDM_Odm); +- (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, ODM_RF_PATH_A, chnl); +- (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, ODM_RF_PATH_B, chnl); ++ if (*c.ODM_TxPwrTrackSetPwr) { ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, ODM_RF_PATH_A, chnl); ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, ODM_RF_PATH_B, chnl); ++ } + } + } + +@@ -730,7 +740,13 @@ u32 mp_join(PADAPTER padapter,u8 mode) + struct mp_priv *pmppriv = &padapter->mppriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wlan_network *tgt_network = &pmlmepriv->cur_network; +- ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++#endif //#ifdef CONFIG_IOCTL_CFG80211 + // 1. initialize a new WLAN_BSSID_EX + _rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX)); + DBG_8192C("%s ,pmppriv->network_macaddr=%x %x %x %x %x %x \n",__func__, +@@ -743,6 +759,7 @@ u32 mp_join(PADAPTER padapter,u8 mode) + bssid.InfrastructureMode = Ndis802_11IBSS; + bssid.NetworkTypeInUse = Ndis802_11DS; + bssid.IELength = 0; ++ bssid.Configuration.DSConfig=pmppriv->channel; + + }else if(mode==WIFI_FW_STATION_STATE){ + bssid.Ssid.SsidLength = strlen("mp_pseudo_STATION"); +@@ -752,7 +769,6 @@ u32 mp_join(PADAPTER padapter,u8 mode) + bssid.IELength = 0; + } + +- + length = get_WLAN_BSSID_EX_sz(&bssid); + if (length % 4) + bssid.Length = ((length >> 2) + 1) << 2; //round up to multiple of 4 bytes. +@@ -767,19 +783,12 @@ u32 mp_join(PADAPTER padapter,u8 mode) + //init mp_start_test status + if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { + rtw_disassoc_cmd(padapter, 500, _TRUE); +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + rtw_free_assoc_resources(padapter, 1); + } + pmppriv->prev_fw_state = get_fwstate(pmlmepriv); + pmlmepriv->fw_state = WIFI_MP_STATE; +-#if 0 +- if (pmppriv->mode == _LOOPBOOK_MODE_) { +- set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); //append txdesc +- RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in Lookback mode\n")); +- } else { +- RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in normal mode\n")); +- } +-#endif ++ + set_fwstate(pmlmepriv, _FW_UNDER_LINKING); + + //3 2. create a new psta for mp driver +@@ -798,7 +807,11 @@ u32 mp_join(PADAPTER padapter,u8 mode) + //3 3. join psudo AdHoc + tgt_network->join_res = 1; + tgt_network->aid = psta->aid = 1; +- _rtw_memcpy(&tgt_network->network, &bssid, length); ++ ++ _rtw_memcpy(&padapter->registrypriv.dev_network, &bssid, length); ++ rtw_update_registrypriv_dev_network(padapter); ++ _rtw_memcpy(&tgt_network->network,&padapter->registrypriv.dev_network, padapter->registrypriv.dev_network.Length); ++ _rtw_memcpy(pnetwork,&padapter->registrypriv.dev_network, padapter->registrypriv.dev_network.Length); + + rtw_indicate_connect(padapter); + _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); +@@ -839,18 +852,24 @@ s32 mp_start_test(PADAPTER padapter) + + //3 disable dynamic mechanism + disable_dm(padapter); ++ #ifdef CONFIG_RTL8814A ++ rtl8814_InitHalDm(padapter); ++ #endif /* CONFIG_RTL8814A */ + #ifdef CONFIG_RTL8812A + rtl8812_InitHalDm(padapter); +-#endif +- #ifdef CONFIG_RTL8723A +- rtl8723a_InitHalDm(padapter); +- #endif ++ #endif /* CONFIG_RTL8812A */ + #ifdef CONFIG_RTL8723B + rtl8723b_InitHalDm(padapter); +-#endif ++ #endif /* CONFIG_RTL8723B */ ++ #ifdef CONFIG_RTL8703B ++ rtl8703b_InitHalDm(padapter); ++ #endif /* CONFIG_RTL8703B */ + #ifdef CONFIG_RTL8192E + rtl8192e_InitHalDm(padapter); + #endif ++ #ifdef CONFIG_RTL8188F ++ rtl8188f_InitHalDm(padapter); ++ #endif + + //3 0. update mp_priv + +@@ -903,7 +922,7 @@ void mp_stop_test(PADAPTER padapter) + goto end_of_mp_stop_test; + + //3 1. disconnect psudo AdHoc +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + + //3 2. clear psta used in mp test mode. + // rtw_free_assoc_resources(padapter, 1); +@@ -925,15 +944,18 @@ end_of_mp_stop_test: + #ifdef CONFIG_RTL8812A + rtl8812_InitHalDm(padapter); + #endif +- #ifdef CONFIG_RTL8723A +- rtl8723a_InitHalDm(padapter); +- #endif + #ifdef CONFIG_RTL8723B + rtl8723b_InitHalDm(padapter); + #endif ++ #ifdef CONFIG_RTL8703B ++ rtl8703b_InitHalDm(padapter); ++ #endif + #ifdef CONFIG_RTL8192E + rtl8192e_InitHalDm(padapter); + #endif ++ #ifdef CONFIG_RTL8188F ++ rtl8188f_InitHalDm(padapter); ++ #endif + } + } + /*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ +@@ -1002,19 +1024,19 @@ static VOID mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Ch + *---------------------------------------------------------------------------*/ + static void mpt_SwitchRfSetting(PADAPTER pAdapter) + { +- Hal_mpt_SwitchRfSetting(pAdapter); ++ hal_mpt_SwitchRfSetting(pAdapter); + } + + /*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ + /*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ + static void MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) + { +- Hal_MPT_CCKTxPowerAdjust(Adapter,bInCH14); ++ hal_mpt_CCKTxPowerAdjust(Adapter, bInCH14); + } + + static void MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven) + { +- Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter,beven); ++ hal_mpt_CCKTxPowerAdjustbyIndex(pAdapter, beven); + } + + /*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ +@@ -1027,7 +1049,7 @@ static void MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven) + */ + void SetChannel(PADAPTER pAdapter) + { +- Hal_SetChannel(pAdapter); ++ hal_mpt_SetChannel(pAdapter); + } + + /* +@@ -1036,61 +1058,19 @@ void SetChannel(PADAPTER pAdapter) + */ + void SetBandwidth(PADAPTER pAdapter) + { +- Hal_SetBandwidth(pAdapter); +- +-} ++ hal_mpt_SetBandwidth(pAdapter); + +-static void SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower) +-{ +- Hal_SetCCKTxPower(pAdapter,TxPower); + } + +-static void SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower) +-{ +- Hal_SetOFDMTxPower(pAdapter,TxPower); +- } +- +- + void SetAntenna(PADAPTER pAdapter) + { +- Hal_SetAntenna(pAdapter); ++ hal_mpt_SetAntenna(pAdapter); + } + +-void SetAntennaPathPower(PADAPTER pAdapter) +-{ +- Hal_SetAntennaPathPower(pAdapter); +-} +- + int SetTxPower(PADAPTER pAdapter) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +- u1Byte CurrChannel; +- BOOLEAN bResult = _TRUE; +- PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); +- u1Byte rf, TxPower[2]; + +- u8 u1TxPower = pAdapter->mppriv.txpoweridx; +- CurrChannel = pMptCtx->MptChannelToSw; +- +- if(HAL_IsLegalChannel(pAdapter, CurrChannel) == _FALSE) +- { +- DBG_871X("SetTxPower(): CurrentChannel:%d is not valid\n", CurrChannel); +- return _FALSE; +- } +- +- TxPower[ODM_RF_PATH_A] = (u1Byte)(u1TxPower&0xff); +- TxPower[ODM_RF_PATH_B] = (u1Byte)((u1TxPower&0xff00)>>8); +- DBG_871X("TxPower(A, B) = (0x%x, 0x%x)\n", TxPower[ODM_RF_PATH_A], TxPower[ODM_RF_PATH_B]); +- +- for(rf=0; rf<2; rf++) +- { +- if(TxPower[rf] > MAX_TX_PWR_INDEX_N_MODE) { +- DBG_871X("===> SetTxPower: The power index is too large.\n"); +- return _FALSE; +- } +- pMptCtx->TxPwrLevel[rf] = TxPower[rf]; +- } +- Hal_SetTxPower(pAdapter); ++ hal_mpt_SetTxPower(pAdapter); + return _TRUE; + } + +@@ -1109,71 +1089,71 @@ void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) + + void SetDataRate(PADAPTER pAdapter) + { +- Hal_SetDataRate(pAdapter); ++ hal_mpt_SetDataRate(pAdapter); + } + + void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter ,BOOLEAN bMain) + { + +- PHY_SetRFPathSwitch(pAdapter,bMain); ++ PHY_SetRFPathSwitch(pAdapter, bMain); + + } + + + s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther) + { +- return Hal_SetThermalMeter( pAdapter, target_ther); ++ return hal_mpt_SetThermalMeter(pAdapter, target_ther); + } + + static void TriggerRFThermalMeter(PADAPTER pAdapter) + { +- Hal_TriggerRFThermalMeter(pAdapter); ++ hal_mpt_TriggerRFThermalMeter(pAdapter); + } + + static u8 ReadRFThermalMeter(PADAPTER pAdapter) + { +- return Hal_ReadRFThermalMeter(pAdapter); ++ return hal_mpt_ReadRFThermalMeter(pAdapter); + } + + void GetThermalMeter(PADAPTER pAdapter, u8 *value) + { +- Hal_GetThermalMeter(pAdapter,value); ++ hal_mpt_GetThermalMeter(pAdapter, value); + } + + void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) + { + PhySetTxPowerLevel(pAdapter); +- Hal_SetSingleCarrierTx(pAdapter,bStart); ++ hal_mpt_SetSingleCarrierTx(pAdapter, bStart); + } + + void SetSingleToneTx(PADAPTER pAdapter, u8 bStart) + { + PhySetTxPowerLevel(pAdapter); +- Hal_SetSingleToneTx(pAdapter,bStart); ++ hal_mpt_SetSingleToneTx(pAdapter, bStart); + } + + void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) + { + PhySetTxPowerLevel(pAdapter); +- Hal_SetCarrierSuppressionTx(pAdapter, bStart); ++ hal_mpt_SetCarrierSuppressionTx(pAdapter, bStart); + } + + void SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) + { + PhySetTxPowerLevel(pAdapter); +- Hal_SetCCKContinuousTx(pAdapter,bStart); ++ hal_mpt_SetCCKContinuousTx(pAdapter, bStart); + } + + void SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) + { + PhySetTxPowerLevel(pAdapter); +- Hal_SetOFDMContinuousTx( pAdapter, bStart); ++ hal_mpt_SetOFDMContinuousTx(pAdapter, bStart); + }/* mpt_StartOfdmContTx */ + + void SetContinuousTx(PADAPTER pAdapter, u8 bStart) + { + PhySetTxPowerLevel(pAdapter); +- Hal_SetContinuousTx(pAdapter,bStart); ++ hal_mpt_SetContinuousTx(pAdapter, bStart); + } + + +@@ -1189,18 +1169,15 @@ void PhySetTxPowerLevel(PADAPTER pAdapter) + #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) + PHY_SetTxPowerLevel8812(pAdapter,pmp_priv->channel); + #endif +-#if defined(CONFIG_RTL8192D) +- PHY_SetTxPowerLevel8192D(pAdapter,pmp_priv->channel); +-#endif +-#if defined(CONFIG_RTL8192C) +- PHY_SetTxPowerLevel8192C(pAdapter,pmp_priv->channel); +-#endif + #if defined(CONFIG_RTL8192E) + PHY_SetTxPowerLevel8192E(pAdapter,pmp_priv->channel); + #endif + #if defined(CONFIG_RTL8723B) + PHY_SetTxPowerLevel8723B(pAdapter,pmp_priv->channel); + #endif ++#if defined(CONFIG_RTL8188F) ++ PHY_SetTxPowerLevel8188F(pAdapter, pmp_priv->channel); ++#endif + mpt_ProQueryCalTxPower(pAdapter,pmp_priv->antenna_tx); + + } +@@ -1260,8 +1237,7 @@ static thread_return mp_xmit_packet_thread(thread_context context) + pxmitframe = alloc_mp_xmitframe(pxmitpriv); + if (pxmitframe == NULL) { + if (pmptx->stop || +- padapter->bSurpriseRemoved || +- padapter->bDriverStopped) { ++ RTW_CANNOT_RUN(padapter)) { + goto exit; + } + else { +@@ -1280,8 +1256,7 @@ static thread_return mp_xmit_packet_thread(thread_context context) + pmp_priv->tx_pktcount++; + + if (pmptx->stop || +- padapter->bSurpriseRemoved || +- padapter->bDriverStopped) ++ RTW_CANNOT_RUN(padapter)) + goto exit; + if ((pmptx->count != 0) && + (pmptx->count == pmptx->sended)) +@@ -1305,46 +1280,6 @@ void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc) + _rtw_memcpy(ptxdesc, pmp_priv->tx.desc, TXDESC_SIZE); + } + +-#if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) +-void fill_tx_desc_8192cd(PADAPTER padapter) +-{ +- struct mp_priv *pmp_priv = &padapter->mppriv; +- struct tx_desc *desc = (struct tx_desc *)&(pmp_priv->tx.desc); +- struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); +- +- desc->txdw1 |= cpu_to_le32(BK); // don't aggregate(AMPDU) +- desc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x1F); //CAM_ID(MAC_ID) +- desc->txdw1 |= cpu_to_le32((pattrib->qsel << QSEL_SHT) & 0x00001F00); // Queue Select, TID +- desc->txdw1 |= cpu_to_le32((pattrib->raid << Rate_ID_SHT) & 0x000F0000); // Rate Adaptive ID +- +- // offset 8 +- // desc->txdw2 |= cpu_to_le32(AGG_BK);//AGG BK +- desc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0x0fff0000); +- desc->txdw4 |= cpu_to_le32(HW_SEQ_EN); +- +- desc->txdw4 |= cpu_to_le32(USERATE); +- desc->txdw4 |= cpu_to_le32(DISDATAFB); +- +- if( pmp_priv->preamble ){ +- if (pmp_priv->rateidx <= MPT_RATE_54M) +- desc->txdw4 |= cpu_to_le32(DATA_SHORT); // CCK Short Preamble +- } +- +- if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) +- desc->txdw4 |= cpu_to_le32(DATA_BW); +- +- // offset 20 +- desc->txdw5 |= cpu_to_le32(pmp_priv->rateidx & 0x0000001F); +- +- if( pmp_priv->preamble ){ +- if (pmp_priv->rateidx > MPT_RATE_54M) +- desc->txdw5 |= cpu_to_le32(SGI); // MCS Short Guard Interval +- } +- +- desc->txdw5 |= cpu_to_le32(0x0001FF00); // DATA/RTS Rate Fallback Limit +-} +-#endif +- + #if defined(CONFIG_RTL8188E) + void fill_tx_desc_8188e(PADAPTER padapter) + { +@@ -1376,7 +1311,7 @@ void fill_tx_desc_8188e(PADAPTER padapter) + desc->txdw4 |= cpu_to_le32(DISDATAFB); + + if( pmp_priv->preamble ){ +- if (pmp_priv->rateidx <= MPT_RATE_54M) ++ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) + desc->txdw4 |= cpu_to_le32(DATA_SHORT); // CCK Short Preamble + } + +@@ -1387,7 +1322,7 @@ void fill_tx_desc_8188e(PADAPTER padapter) + desc->txdw5 |= cpu_to_le32(pmp_priv->rateidx & 0x0000001F); + + if( pmp_priv->preamble ){ +- if (pmp_priv->rateidx > MPT_RATE_54M) ++ if (HwRateToMPTRate(pmp_priv->rateidx) > MPT_RATE_54M) + desc->txdw5 |= cpu_to_le32(SGI); // MCS Short Guard Interval + } + +@@ -1397,6 +1332,68 @@ void fill_tx_desc_8188e(PADAPTER padapter) + + } + #endif ++ ++#if defined(CONFIG_RTL8814A) ++void fill_tx_desc_8814a(PADAPTER padapter) ++{ ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ u8 *pDesc = (u8 *)&(pmp_priv->tx.desc); ++ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); ++ ++ u32 pkt_size = pattrib->last_txcmdsz; ++ s32 bmcast = IS_MCAST(pattrib->ra); ++ u8 data_rate,pwr_status,offset; ++ ++ //SET_TX_DESC_FIRST_SEG_8814A(pDesc, 1); ++ SET_TX_DESC_LAST_SEG_8814A(pDesc, 1); ++ //SET_TX_DESC_OWN_(pDesc, 1); ++ ++ SET_TX_DESC_PKT_SIZE_8814A(pDesc, pkt_size); ++ ++ offset = TXDESC_SIZE + OFFSET_SZ; ++ ++ SET_TX_DESC_OFFSET_8814A(pDesc, offset); ++#if defined(CONFIG_PCI_HCI) ++ SET_TX_DESC_PKT_OFFSET_8814A(pDesc, 0); /* 8814AE pkt_offset is 0 */ ++#else ++ SET_TX_DESC_PKT_OFFSET_8814A(pDesc, 1); ++#endif ++ ++ if (bmcast) { ++ SET_TX_DESC_BMC_8814A(pDesc, 1); ++ } ++ ++ SET_TX_DESC_MACID_8814A(pDesc, pattrib->mac_id); ++ SET_TX_DESC_RATE_ID_8814A(pDesc, pattrib->raid); ++ ++ //SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_G); ++ SET_TX_DESC_QUEUE_SEL_8814A(pDesc, pattrib->qsel); ++ //SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT); ++ ++ if ( pmp_priv->preamble ){ ++ SET_TX_DESC_DATA_SHORT_8814A(pDesc, 1); ++ } ++ ++ if (!pattrib->qos_en) { ++ SET_TX_DESC_HWSEQ_EN_8814A(pDesc, 1); // Hw set sequence number ++ } else { ++ SET_TX_DESC_SEQ_8814A(pDesc, pattrib->seqnum); ++ } ++ ++ if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160) { ++ SET_TX_DESC_DATA_BW_8814A(pDesc, pmp_priv->bandwidth); ++ } else { ++ DBG_871X("%s:Err: unknown bandwidth %d, use 20M\n", __func__,pmp_priv->bandwidth); ++ SET_TX_DESC_DATA_BW_8814A(pDesc, CHANNEL_WIDTH_20); ++ } ++ ++ SET_TX_DESC_DISABLE_FB_8814A(pDesc, 1); ++ SET_TX_DESC_USE_RATE_8814A(pDesc, 1); ++ SET_TX_DESC_TX_RATE_8814A(pDesc, pmp_priv->rateidx); ++ ++} ++#endif ++ + #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) + void fill_tx_desc_8812a(PADAPTER padapter) + { +@@ -1417,8 +1414,12 @@ void fill_tx_desc_8812a(PADAPTER padapter) + offset = TXDESC_SIZE + OFFSET_SZ; + + SET_TX_DESC_OFFSET_8812(pDesc, offset); ++ ++#if defined(CONFIG_PCI_HCI) ++ SET_TX_DESC_PKT_OFFSET_8812(pDesc, 0); ++#else + SET_TX_DESC_PKT_OFFSET_8812(pDesc, 1); +- ++#endif + if (bmcast) { + SET_TX_DESC_BMC_8812(pDesc, 1); + } +@@ -1466,12 +1467,10 @@ void fill_tx_desc_8192e(PADAPTER padapter) + offset = TXDESC_SIZE + OFFSET_SZ; + + SET_TX_DESC_OFFSET_92E(pDesc, offset); ++ #if defined(CONFIG_PCI_HCI) /* 8192EE */ + +- #if defined(CONFIG_PCI_HCI) //8192EE +- SET_TX_DESC_OFFSET_92E(pDesc, offset+8); //work around + SET_TX_DESC_PKT_OFFSET_92E(pDesc, 0); /* 8192EE pkt_offset is 0 */ +- #else //8192EU 8192ES +- SET_TX_DESC_OFFSET_92E(pDesc, offset); ++ #else /* 8192EU 8192ES */ + SET_TX_DESC_PKT_OFFSET_92E(pDesc, 1); + #endif + +@@ -1526,10 +1525,10 @@ void fill_tx_desc_8723b(PADAPTER padapter) + SET_TX_DESC_USE_RATE_8723B(ptxdesc, 1); + SET_TX_DESC_DISABLE_FB_8723B(ptxdesc, 1); + +- if (pmp_priv->preamble) +- if (pmp_priv->rateidx <= MPT_RATE_54M) { ++ if (pmp_priv->preamble) { ++ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) + SET_TX_DESC_DATA_SHORT_8723B(ptxdesc, 1); +- } ++ } + + if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) { + SET_TX_DESC_DATA_BW_8723B(ptxdesc, 1); +@@ -1542,6 +1541,69 @@ void fill_tx_desc_8723b(PADAPTER padapter) + } + #endif + ++#if defined(CONFIG_RTL8703B) ++void fill_tx_desc_8703b(PADAPTER padapter) ++{ ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); ++ u8 *ptxdesc = pmp_priv->tx.desc; ++ ++ SET_TX_DESC_AGG_BREAK_8703B(ptxdesc, 1); ++ SET_TX_DESC_MACID_8703B(ptxdesc, pattrib->mac_id); ++ SET_TX_DESC_QUEUE_SEL_8703B(ptxdesc, pattrib->qsel); ++ ++ SET_TX_DESC_RATE_ID_8703B(ptxdesc, pattrib->raid); ++ SET_TX_DESC_SEQ_8703B(ptxdesc, pattrib->seqnum); ++ SET_TX_DESC_HWSEQ_EN_8703B(ptxdesc, 1); ++ SET_TX_DESC_USE_RATE_8703B(ptxdesc, 1); ++ SET_TX_DESC_DISABLE_FB_8703B(ptxdesc, 1); ++ ++ if (pmp_priv->preamble) { ++ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) ++ SET_TX_DESC_DATA_SHORT_8703B(ptxdesc, 1); ++ } ++ ++ if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) ++ SET_TX_DESC_DATA_BW_8703B(ptxdesc, 1); ++ ++ SET_TX_DESC_TX_RATE_8703B(ptxdesc, pmp_priv->rateidx); ++ ++ SET_TX_DESC_DATA_RATE_FB_LIMIT_8703B(ptxdesc, 0x1F); ++ SET_TX_DESC_RTS_RATE_FB_LIMIT_8703B(ptxdesc, 0xF); ++} ++#endif ++ ++#if defined(CONFIG_RTL8188F) ++void fill_tx_desc_8188f(PADAPTER padapter) ++{ ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); ++ u8 *ptxdesc = pmp_priv->tx.desc; ++ ++ SET_TX_DESC_AGG_BREAK_8188F(ptxdesc, 1); ++ SET_TX_DESC_MACID_8188F(ptxdesc, pattrib->mac_id); ++ SET_TX_DESC_QUEUE_SEL_8188F(ptxdesc, pattrib->qsel); ++ ++ SET_TX_DESC_RATE_ID_8188F(ptxdesc, pattrib->raid); ++ SET_TX_DESC_SEQ_8188F(ptxdesc, pattrib->seqnum); ++ SET_TX_DESC_HWSEQ_EN_8188F(ptxdesc, 1); ++ SET_TX_DESC_USE_RATE_8188F(ptxdesc, 1); ++ SET_TX_DESC_DISABLE_FB_8188F(ptxdesc, 1); ++ ++ if (pmp_priv->preamble) ++ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) ++ SET_TX_DESC_DATA_SHORT_8188F(ptxdesc, 1); ++ ++ if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) ++ SET_TX_DESC_DATA_BW_8188F(ptxdesc, 1); ++ ++ SET_TX_DESC_TX_RATE_8188F(ptxdesc, pmp_priv->rateidx); ++ ++ SET_TX_DESC_DATA_RATE_FB_LIMIT_8188F(ptxdesc, 0x1F); ++ SET_TX_DESC_RTS_RATE_FB_LIMIT_8188F(ptxdesc, 0xF); ++} ++#endif ++ + static void Rtw_MPSetMacTxEDCA(PADAPTER padapter) + { + +@@ -1576,7 +1638,7 @@ void SetPacketTx(PADAPTER padapter) + + //3 1. update_attrib() + pattrib = &pmp_priv->tx.attrib; +- _rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); + _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); + bmcast = IS_MCAST(pattrib->ra); +@@ -1611,16 +1673,16 @@ void SetPacketTx(PADAPTER padapter) + pkt_end = pkt_start + pkt_size; + + //3 3. init TX descriptor +-#if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) +- if(IS_HARDWARE_TYPE_8192C(padapter) ||IS_HARDWARE_TYPE_8192D(padapter)) +- fill_tx_desc_8192cd(padapter); +-#endif +- + #if defined(CONFIG_RTL8188E) + if(IS_HARDWARE_TYPE_8188E(padapter)) + fill_tx_desc_8188e(padapter); + #endif + ++#if defined(CONFIG_RTL8814A) ++ if(IS_HARDWARE_TYPE_8814A(padapter)) ++ fill_tx_desc_8814a(padapter); ++#endif /* defined(CONFIG_RTL8814A) */ ++ + #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) + if(IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter)) + fill_tx_desc_8812a(padapter); +@@ -1634,7 +1696,15 @@ void SetPacketTx(PADAPTER padapter) + if(IS_HARDWARE_TYPE_8723B(padapter)) + fill_tx_desc_8723b(padapter); + #endif ++#if defined(CONFIG_RTL8703B) ++ if (IS_HARDWARE_TYPE_8703B(padapter)) ++ fill_tx_desc_8703b(padapter); ++#endif + ++#if defined(CONFIG_RTL8188F) ++ if (IS_HARDWARE_TYPE_8188F(padapter)) ++ fill_tx_desc_8188f(padapter); ++#endif + + //3 4. make wlan header, make_wlanhdr() + hdr = (struct rtw_ieee80211_hdr *)pkt_start; +@@ -1704,47 +1774,46 @@ exit: + return; + } + +-void SetPacketRx(PADAPTER pAdapter, u8 bStartRx) ++void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + struct mp_priv *pmppriv = &pAdapter->mppriv; +- u8 type; +- type = _HW_STATE_AP_; +- if(bStartRx) +- { ++ ++ ++ if (bStartRx) { + #ifdef CONFIG_RTL8723B + PHY_SetMacReg(pAdapter, 0xe70, BIT23|BIT22, 0x3);// Power on adc (in RX_WAIT_CCA state) + write_bbreg(pAdapter, 0xa01, BIT0, bDisable);// improve Rx performance by jerry + #endif +- if( pmppriv->bSetRxBssid == _TRUE ){ +- //pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF; +- pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_AMF | RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF ; +- pHalData->ReceiveConfig |= ACRC32; +- +- DBG_8192C("%s , pmppriv->network_macaddr =%x %x %x %x %x %x\n",__func__, +- pmppriv->network_macaddr[0],pmppriv->network_macaddr[1],pmppriv->network_macaddr[2],pmppriv->network_macaddr[3],pmppriv->network_macaddr[4],pmppriv->network_macaddr[5]); ++ pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AMF | RCR_HTC_LOC_CTRL; ++ pHalData->ReceiveConfig |= RCR_ACRC32; ++ pHalData->ReceiveConfig |= RCR_APP_PHYST_RXFF | RCR_APP_ICV | RCR_APP_MIC; ++ ++ if (pmppriv->bSetRxBssid == _TRUE) { ++ DBG_8192C("%s: pmppriv->network_macaddr=" MAC_FMT "\n", __func__, ++ MAC_ARG(pmppriv->network_macaddr)); ++ + //Set_MSR(pAdapter, WIFI_FW_AP_STATE); + //rtw_hal_set_hwreg(pAdapter, HW_VAR_BSSID, pmppriv->network_macaddr); + //rtw_hal_set_hwreg(pAdapter, HW_VAR_SET_OPMODE, (u8 *)(&type)); ++ } else { ++ pHalData->ReceiveConfig |= RCR_ADF; ++ ++ /* Accept all data frames */ ++ rtw_write16(pAdapter, REG_RXFLTMAP2, 0xFFFF); + } +- else +- { +- pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; +- pHalData->ReceiveConfig |= ACRC32; +- rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig); +- // Accept all data frames +- rtw_write16(pAdapter, REG_RXFLTMAP2, 0xFFFF); +- // Accept CRC error and destination address +- } +- } +- else +- { ++ ++ if (bAB) ++ pHalData->ReceiveConfig |= RCR_AB; ++ } else { + #ifdef CONFIG_RTL8723B + PHY_SetMacReg(pAdapter, 0xe70, BIT23|BIT22, 0x00);// Power off adc (in RX_WAIT_CCA state) + write_bbreg(pAdapter, 0xa01, BIT0, bEnable);// improve Rx performance by jerry + #endif +- rtw_write32(pAdapter, REG_RCR, 0); ++ pHalData->ReceiveConfig = 0; + } ++ ++ rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig); + } + + void ResetPhyRxPktCount(PADAPTER pAdapter) +@@ -1802,14 +1871,12 @@ static u32 rtw_GetPSDData(PADAPTER pAdapter, u32 point) + { + u32 psd_val=0; + +-#if defined(CONFIG_RTL8812A)||defined(CONFIG_RTL8821A) //MP PSD for 8812A ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) + u16 psd_reg = 0x910; + u16 psd_regL= 0xF44; +- + #else + u16 psd_reg = 0x808; + u16 psd_regL= 0x8B4; +- + #endif + + psd_val = rtw_read32(pAdapter, psd_reg); +@@ -2385,6 +2452,188 @@ MptToMgntRate( + } + } + ++ ++u8 HwRateToMPTRate(u8 rate) ++{ ++ u8 ret_rate = MGN_1M; ++ ++ switch (rate) { ++ case DESC_RATE1M: ++ ret_rate = MPT_RATE_1M; break; ++ case DESC_RATE2M: ++ ret_rate = MPT_RATE_2M; break; ++ case DESC_RATE5_5M: ++ ret_rate = MPT_RATE_55M; break; ++ case DESC_RATE11M: ++ ret_rate = MPT_RATE_11M; break; ++ case DESC_RATE6M: ++ ret_rate = MPT_RATE_6M; break; ++ case DESC_RATE9M: ++ ret_rate = MPT_RATE_9M; break; ++ case DESC_RATE12M: ++ ret_rate = MPT_RATE_12M; break; ++ case DESC_RATE18M: ++ ret_rate = MPT_RATE_18M; break; ++ case DESC_RATE24M: ++ ret_rate = MPT_RATE_24M; break; ++ case DESC_RATE36M: ++ ret_rate = MPT_RATE_36M; break; ++ case DESC_RATE48M: ++ ret_rate = MPT_RATE_48M; break; ++ case DESC_RATE54M: ++ ret_rate = MPT_RATE_54M; break; ++ case DESC_RATEMCS0: ++ ret_rate = MPT_RATE_MCS0; break; ++ case DESC_RATEMCS1: ++ ret_rate = MPT_RATE_MCS1; break; ++ case DESC_RATEMCS2: ++ ret_rate = MPT_RATE_MCS2; break; ++ case DESC_RATEMCS3: ++ ret_rate = MPT_RATE_MCS3; break; ++ case DESC_RATEMCS4: ++ ret_rate = MPT_RATE_MCS4; break; ++ case DESC_RATEMCS5: ++ ret_rate = MPT_RATE_MCS5; break; ++ case DESC_RATEMCS6: ++ ret_rate = MPT_RATE_MCS6; break; ++ case DESC_RATEMCS7: ++ ret_rate = MPT_RATE_MCS7; break; ++ case DESC_RATEMCS8: ++ ret_rate = MPT_RATE_MCS8; break; ++ case DESC_RATEMCS9: ++ ret_rate = MPT_RATE_MCS9; break; ++ case DESC_RATEMCS10: ++ ret_rate = MPT_RATE_MCS10; break; ++ case DESC_RATEMCS11: ++ ret_rate = MPT_RATE_MCS11; break; ++ case DESC_RATEMCS12: ++ ret_rate = MPT_RATE_MCS12; break; ++ case DESC_RATEMCS13: ++ ret_rate = MPT_RATE_MCS13; break; ++ case DESC_RATEMCS14: ++ ret_rate = MPT_RATE_MCS14; break; ++ case DESC_RATEMCS15: ++ ret_rate = MPT_RATE_MCS15; break; ++ case DESC_RATEMCS16: ++ ret_rate = MPT_RATE_MCS16; break; ++ case DESC_RATEMCS17: ++ ret_rate = MPT_RATE_MCS17; break; ++ case DESC_RATEMCS18: ++ ret_rate = MPT_RATE_MCS18; break; ++ case DESC_RATEMCS19: ++ ret_rate = MPT_RATE_MCS19; break; ++ case DESC_RATEMCS20: ++ ret_rate = MPT_RATE_MCS20; break; ++ case DESC_RATEMCS21: ++ ret_rate = MPT_RATE_MCS21; break; ++ case DESC_RATEMCS22: ++ ret_rate = MPT_RATE_MCS22; break; ++ case DESC_RATEMCS23: ++ ret_rate = MPT_RATE_MCS23; break; ++ case DESC_RATEMCS24: ++ ret_rate = MPT_RATE_MCS24; break; ++ case DESC_RATEMCS25: ++ ret_rate = MPT_RATE_MCS25; break; ++ case DESC_RATEMCS26: ++ ret_rate = MPT_RATE_MCS26; break; ++ case DESC_RATEMCS27: ++ ret_rate = MPT_RATE_MCS27; break; ++ case DESC_RATEMCS28: ++ ret_rate = MPT_RATE_MCS28; break; ++ case DESC_RATEMCS29: ++ ret_rate = MPT_RATE_MCS29; break; ++ case DESC_RATEMCS30: ++ ret_rate = MPT_RATE_MCS30; break; ++ case DESC_RATEMCS31: ++ ret_rate = MPT_RATE_MCS31; break; ++ case DESC_RATEVHTSS1MCS0: ++ ret_rate = MPT_RATE_VHT1SS_MCS0; break; ++ case DESC_RATEVHTSS1MCS1: ++ ret_rate = MPT_RATE_VHT1SS_MCS1; break; ++ case DESC_RATEVHTSS1MCS2: ++ ret_rate = MPT_RATE_VHT1SS_MCS2; break; ++ case DESC_RATEVHTSS1MCS3: ++ ret_rate = MPT_RATE_VHT1SS_MCS3; break; ++ case DESC_RATEVHTSS1MCS4: ++ ret_rate = MPT_RATE_VHT1SS_MCS4; break; ++ case DESC_RATEVHTSS1MCS5: ++ ret_rate = MPT_RATE_VHT1SS_MCS5; break; ++ case DESC_RATEVHTSS1MCS6: ++ ret_rate = MPT_RATE_VHT1SS_MCS6; break; ++ case DESC_RATEVHTSS1MCS7: ++ ret_rate = MPT_RATE_VHT1SS_MCS7; break; ++ case DESC_RATEVHTSS1MCS8: ++ ret_rate = MPT_RATE_VHT1SS_MCS8; break; ++ case DESC_RATEVHTSS1MCS9: ++ ret_rate = MPT_RATE_VHT1SS_MCS9; break; ++ case DESC_RATEVHTSS2MCS0: ++ ret_rate = MPT_RATE_VHT2SS_MCS0; break; ++ case DESC_RATEVHTSS2MCS1: ++ ret_rate = MPT_RATE_VHT2SS_MCS1; break; ++ case DESC_RATEVHTSS2MCS2: ++ ret_rate = MPT_RATE_VHT2SS_MCS2; break; ++ case DESC_RATEVHTSS2MCS3: ++ ret_rate = MPT_RATE_VHT2SS_MCS3; break; ++ case DESC_RATEVHTSS2MCS4: ++ ret_rate = MPT_RATE_VHT2SS_MCS4; break; ++ case DESC_RATEVHTSS2MCS5: ++ ret_rate = MPT_RATE_VHT2SS_MCS5; break; ++ case DESC_RATEVHTSS2MCS6: ++ ret_rate = MPT_RATE_VHT2SS_MCS6; break; ++ case DESC_RATEVHTSS2MCS7: ++ ret_rate = MPT_RATE_VHT2SS_MCS7; break; ++ case DESC_RATEVHTSS2MCS8: ++ ret_rate = MPT_RATE_VHT2SS_MCS8; break; ++ case DESC_RATEVHTSS2MCS9: ++ ret_rate = MPT_RATE_VHT2SS_MCS9; break; ++ case DESC_RATEVHTSS3MCS0: ++ ret_rate = MPT_RATE_VHT3SS_MCS0; break; ++ case DESC_RATEVHTSS3MCS1: ++ ret_rate = MPT_RATE_VHT3SS_MCS1; break; ++ case DESC_RATEVHTSS3MCS2: ++ ret_rate = MPT_RATE_VHT3SS_MCS2; break; ++ case DESC_RATEVHTSS3MCS3: ++ ret_rate = MPT_RATE_VHT3SS_MCS3; break; ++ case DESC_RATEVHTSS3MCS4: ++ ret_rate = MPT_RATE_VHT3SS_MCS4; break; ++ case DESC_RATEVHTSS3MCS5: ++ ret_rate = MPT_RATE_VHT3SS_MCS5; break; ++ case DESC_RATEVHTSS3MCS6: ++ ret_rate = MPT_RATE_VHT3SS_MCS6; break; ++ case DESC_RATEVHTSS3MCS7: ++ ret_rate = MPT_RATE_VHT3SS_MCS7; break; ++ case DESC_RATEVHTSS3MCS8: ++ ret_rate = MPT_RATE_VHT3SS_MCS8; break; ++ case DESC_RATEVHTSS3MCS9: ++ ret_rate = MPT_RATE_VHT3SS_MCS9; break; ++ case DESC_RATEVHTSS4MCS0: ++ ret_rate = MPT_RATE_VHT4SS_MCS0; break; ++ case DESC_RATEVHTSS4MCS1: ++ ret_rate = MPT_RATE_VHT4SS_MCS1; break; ++ case DESC_RATEVHTSS4MCS2: ++ ret_rate = MPT_RATE_VHT4SS_MCS2; break; ++ case DESC_RATEVHTSS4MCS3: ++ ret_rate = MPT_RATE_VHT4SS_MCS3; break; ++ case DESC_RATEVHTSS4MCS4: ++ ret_rate = MPT_RATE_VHT4SS_MCS4; break; ++ case DESC_RATEVHTSS4MCS5: ++ ret_rate = MPT_RATE_VHT4SS_MCS5; break; ++ case DESC_RATEVHTSS4MCS6: ++ ret_rate = MPT_RATE_VHT4SS_MCS6; break; ++ case DESC_RATEVHTSS4MCS7: ++ ret_rate = MPT_RATE_VHT4SS_MCS7; break; ++ case DESC_RATEVHTSS4MCS8: ++ ret_rate = MPT_RATE_VHT4SS_MCS8; break; ++ case DESC_RATEVHTSS4MCS9: ++ ret_rate = MPT_RATE_VHT4SS_MCS9; break; ++ ++ default: ++ DBG_871X("HwRateToMRate(): Non supported Rate [%x]!!!\n", rate); ++ break; ++ } ++ return ret_rate; ++} ++ + u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr) + { + u16 i=0; +@@ -2421,100 +2670,840 @@ ULONG mpt_ProQueryCalTxPower( + { + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ + ULONG TxPower = 1, PwrGroup=0, PowerDiffByRate=0; + u1Byte limit = 0, rate = 0; +- +- #if 0// defined(CONFIG_RTL8192D) ||defined(CONFIG_RTL8192C) +- if(IS_HARDWARE_TYPE_8188E_before(pAdapter)) +- return mpt_ProQueryCalTxPower_8192C(pAdapter, RfPath); +- #endif +- ++ u8 mgn_rate = MptToMgntRate(pMptCtx->MptRateIndex); ++ + #if defined(CONFIG_RTL8188E) + if (IS_HARDWARE_TYPE_8188E(pAdapter)) +- { +- //return mpt_ProQueryCalTxPower_8188E(pAdapter, RfPath); +- rate = MptToMgntRate(pAdapter->mppriv.rateidx); +- TxPower = PHY_GetTxPowerIndex_8188E(pAdapter, RfPath, rate, +- pHalData->CurrentChannelBW, pHalData->CurrentChannel); +- +- } ++ TxPower = PHY_GetTxPowerIndex_8188E(pAdapter, RfPath, mgn_rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); + #endif +- ++ + #if defined(CONFIG_RTL8723B) +- if( IS_HARDWARE_TYPE_8723B(pAdapter) ) +- { +- rate = MptToMgntRate(pAdapter->mppriv.rateidx); +- TxPower = PHY_GetTxPowerIndex_8723B(pAdapter, RfPath, rate, +- pHalData->CurrentChannelBW, pHalData->CurrentChannel); +- } ++ if (IS_HARDWARE_TYPE_8723B(pAdapter)) ++ TxPower = PHY_GetTxPowerIndex_8723B(pAdapter, RfPath, mgn_rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); + #endif +- ++ + #if defined(CONFIG_RTL8192E) +- if( IS_HARDWARE_TYPE_8192E(pAdapter) ) +- { +- rate = MptToMgntRate(pAdapter->mppriv.rateidx); +- TxPower = PHY_GetTxPowerIndex_8192E(pAdapter, RfPath, rate, +- pHalData->CurrentChannelBW, pHalData->CurrentChannel); +- } ++ if (IS_HARDWARE_TYPE_8192E(pAdapter)) ++ TxPower = PHY_GetTxPowerIndex_8192E(pAdapter, RfPath, mgn_rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); + #endif ++ + #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) +- if( IS_HARDWARE_TYPE_JAGUAR(pAdapter) ) +- { +- rate = MptToMgntRate(pAdapter->mppriv.rateidx); +- TxPower = PHY_GetTxPowerIndex_8812A(pAdapter, RfPath, rate, +- pHalData->CurrentChannelBW, pHalData->CurrentChannel); +- } ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) ++ TxPower = PHY_GetTxPowerIndex_8812A(pAdapter, RfPath, mgn_rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); + #endif ++ + #if defined(CONFIG_RTL8814A) +- if ( IS_HARDWARE_TYPE_8814A(pAdapter) ) +- { +- rate = MptToMgntRate(pAdapter->mppriv.rateidx); +- TxPower = PHY_GetTxPowerIndex_8814A(pAdapter, RfPath, rate, +- pHalData->CurrentChannelBW, pHalData->CurrentChannel); +- } ++ if (IS_HARDWARE_TYPE_8814A(pAdapter)) ++ TxPower = PHY_GetTxPowerIndex_8814A(pAdapter, RfPath, mgn_rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); ++ #endif ++ #if defined(CONFIG_RTL8703B) ++ if (IS_HARDWARE_TYPE_8703B(pAdapter)) ++ TxPower = PHY_GetTxPowerIndex_8703B(pAdapter, RfPath, mgn_rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); ++ #endif ++ ++ #if defined(CONFIG_RTL8188F) ++ if (IS_HARDWARE_TYPE_8188F(pAdapter)) ++ TxPower = PHY_GetTxPowerIndex_8188F(pAdapter, RfPath, mgn_rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); + #endif +- +- DBG_8192C("txPower=%d ,CurrentChannelBW=%d ,CurrentChannel=%d ,rate =%d\n",TxPower,pHalData->CurrentChannelBW, pHalData->CurrentChannel,rate); ++ ++ DBG_8192C("txPower=%d ,CurrentChannelBW=%d ,CurrentChannel=%d ,rate =%d\n", ++ TxPower, pHalData->CurrentChannelBW, pHalData->CurrentChannel, mgn_rate); + + pAdapter->mppriv.txpoweridx = (u8)TxPower; +- pAdapter->mppriv.txpoweridx_b = (u8)TxPower; +- Hal_SetAntennaPathPower(pAdapter); ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_A] = (u8)TxPower; ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_B] = (u8)TxPower; ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_C] = (u8)TxPower; ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_D] = (u8)TxPower; ++ hal_mpt_SetTxPower(pAdapter); + + return TxPower; + } + ++#ifdef CONFIG_MP_VHT_HW_TX_MODE ++static inline void dump_buf(u8 *buf, u32 len) ++{ ++ u32 i; ++ ++ DBG_871X("-----------------Len %d----------------\n", len); ++ for (i = 0; i < len; i++) ++ DBG_871X("%2.2x-", *(buf + i)); ++ DBG_871X("\n"); ++} ++ ++void ByteToBit( ++ UCHAR *out, ++ bool *in, ++ UCHAR in_size) ++{ ++ UCHAR i = 0, j = 0; ++ ++ for (i = 0; i < in_size; i++) { ++ for (j = 0; j < 8; j++) { ++ if (in[8*i+j]) ++ out[i] |= (1 << j); ++ } ++ } ++} ++ + +-void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCap) ++void CRC16_generator( ++ bool *out, ++ bool *in, ++ UCHAR in_size ++) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ UCHAR i = 0; ++ bool temp = 0, reg[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; + +- CrystalCap = CrystalCap & 0x3F; ++ for (i = 0; i < in_size; i++) {/* take one's complement and bit reverse*/ ++ temp = in[i]^reg[15]; ++ reg[15] = reg[14]; ++ reg[14] = reg[13]; ++ reg[13] = reg[12]; ++ reg[12] = reg[11]; ++ reg[11] = reg[10]; ++ reg[10] = reg[9]; ++ reg[9] = reg[8]; ++ reg[8] = reg[7]; + +- if(IS_HARDWARE_TYPE_8192D(pAdapter)) +- { +- PHY_SetBBReg(pAdapter, REG_AFE_XTAL_CTRL, 0xF0, CrystalCap & 0x0F); +- PHY_SetBBReg(pAdapter, REG_AFE_PLL_CTRL, 0xF0000000, (CrystalCap & 0xF0) >> 4); ++ reg[7] = reg[6]; ++ reg[6] = reg[5]; ++ reg[5] = reg[4]; ++ reg[4] = reg[3]; ++ reg[3] = reg[2]; ++ reg[2] = reg[1]; ++ reg[1] = reg[0]; ++ reg[12] = reg[12] ^ temp; ++ reg[5] = reg[5] ^ temp; ++ reg[0] = temp; + } +- else if(IS_HARDWARE_TYPE_8188E(pAdapter)) +- { +- // write 0x24[16:11] = 0x24[22:17] = CrystalCap +- PHY_SetBBReg(pAdapter, REG_AFE_XTAL_CTRL, 0x7FF800, (CrystalCap | (CrystalCap << 6))); ++ for (i = 0; i < 16; i++) /* take one's complement and bit reverse*/ ++ out[i] = 1-reg[15-i]; ++} ++ ++ ++ ++/*======================================== ++ SFD SIGNAL SERVICE LENGTH CRC ++ 16 bit 8 bit 8 bit 16 bit 16 bit ++========================================*/ ++void CCK_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo ++ ) ++{ ++ double ratio = 0; ++ bool crc16_in[32] = {0}, crc16_out[16] = {0}; ++ bool LengthExtBit; ++ double LengthExact; ++ double LengthPSDU; ++ UCHAR i; ++ UINT PacketLength = pPMacTxInfo->PacketLength; ++ ++ if (pPMacTxInfo->bSPreamble) ++ pPMacTxInfo->SFD = 0x05CF; ++ else ++ pPMacTxInfo->SFD = 0xF3A0; ++ ++ switch (pPMacPktInfo->MCS) { ++ case 0: ++ pPMacTxInfo->SignalField = 0xA; ++ ratio = 8; ++ /*CRC16_in(1,0:7)=[0 1 0 1 0 0 0 0]*/ ++ crc16_in[1] = crc16_in[3] = 1; ++ break; ++ case 1: ++ pPMacTxInfo->SignalField = 0x14; ++ ratio = 4; ++ /*CRC16_in(1,0:7)=[0 0 1 0 1 0 0 0];*/ ++ crc16_in[2] = crc16_in[4] = 1; ++ break; ++ case 2: ++ pPMacTxInfo->SignalField = 0x37; ++ ratio = 8.0/5.5; ++ /*CRC16_in(1,0:7)=[1 1 1 0 1 1 0 0];*/ ++ crc16_in[0] = crc16_in[1] = crc16_in[2] = crc16_in[4] = crc16_in[5] = 1; ++ break; ++ case 3: ++ pPMacTxInfo->SignalField = 0x6E; ++ ratio = 8.0/11.0; ++ /*CRC16_in(1,0:7)=[0 1 1 1 0 1 1 0];*/ ++ crc16_in[1] = crc16_in[2] = crc16_in[3] = crc16_in[5] = crc16_in[6] = 1; ++ break; ++ } ++ ++ LengthExact = PacketLength*ratio; ++ LengthPSDU = ceil(LengthExact); ++ ++ if ((pPMacPktInfo->MCS == 3) && ++ ((LengthPSDU-LengthExact) >= 0.727 || (LengthPSDU-LengthExact) <= -0.727)) ++ LengthExtBit = 1; ++ else ++ LengthExtBit = 0; ++ ++ ++ pPMacTxInfo->LENGTH = (UINT)LengthPSDU; ++ /* CRC16_in(1,16:31) = LengthPSDU[0:15]*/ ++ for (i = 0; i < 16; i++) ++ crc16_in[i+16] = (pPMacTxInfo->LENGTH >> i) & 0x1; ++ ++ if (LengthExtBit == 0) { ++ pPMacTxInfo->ServiceField = 0x0; ++ /* CRC16_in(1,8:15) = [0 0 0 0 0 0 0 0];*/ ++ } else { ++ pPMacTxInfo->ServiceField = 0x80; ++ /*CRC16_in(1,8:15)=[0 0 0 0 0 0 0 1];*/ ++ crc16_in[15] = 1; + } +- else if(IS_HARDWARE_TYPE_8812(pAdapter)) +- { +- // write 0x2C[30:25] = 0x2C[24:19] = CrystalCap +- PHY_SetBBReg(pAdapter, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap | (CrystalCap << 6))); +- } +- else if(IS_HARDWARE_TYPE_8821(pAdapter) || IS_HARDWARE_TYPE_8192E(pAdapter) || +- IS_HARDWARE_TYPE_8723B(pAdapter)) +- { +- // write 0x2C[23:18] = 0x2C[17:12] = CrystalCap +- PHY_SetBBReg(pAdapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); +- } ++ ++ CRC16_generator(crc16_out, crc16_in, 32); ++ ++ _rtw_memset(pPMacTxInfo->CRC16, 0, 2); ++ ByteToBit(pPMacTxInfo->CRC16, crc16_out, 2); ++ ++} ++ ++ ++void PMAC_Get_Pkt_Param( ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo) ++{ ++ ++ UCHAR TX_RATE_HEX = 0, MCS = 0; ++ UCHAR TX_RATE = pPMacTxInfo->TX_RATE; ++ ++ /* TX_RATE & Nss */ ++ if (MPT_IS_2SS_RATE(TX_RATE)) ++ pPMacPktInfo->Nss = 2; ++ else if (MPT_IS_3SS_RATE(TX_RATE)) ++ pPMacPktInfo->Nss = 3; ++ else if (MPT_IS_4SS_RATE(TX_RATE)) ++ pPMacPktInfo->Nss = 4; + else +- { +- PHY_SetBBReg(pAdapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); ++ pPMacPktInfo->Nss = 1; ++ ++ DBG_871X("PMacTxInfo.Nss =%d\n", pPMacPktInfo->Nss); ++ ++ /* MCS & TX_RATE_HEX*/ ++ if (MPT_IS_CCK_RATE(TX_RATE)) { ++ switch (TX_RATE) { ++ case MPT_RATE_1M: ++ TX_RATE_HEX = MCS = 0; break; ++ case MPT_RATE_2M: ++ TX_RATE_HEX = MCS = 1; break; ++ case MPT_RATE_55M: ++ TX_RATE_HEX = MCS = 2; break; ++ case MPT_RATE_11M: ++ TX_RATE_HEX = MCS = 3; break; ++ } ++ } else if (MPT_IS_OFDM_RATE(TX_RATE)) { ++ MCS = TX_RATE - MPT_RATE_6M; ++ TX_RATE_HEX = MCS + 4; ++ } else if (MPT_IS_HT_RATE(TX_RATE)) { ++ MCS = TX_RATE - MPT_RATE_MCS0; ++ TX_RATE_HEX = MCS + 12; ++ } else if (MPT_IS_VHT_RATE(TX_RATE)) { ++ TX_RATE_HEX = TX_RATE - MPT_RATE_VHT1SS_MCS0 + 44; ++ ++ if (MPT_IS_VHT_2S_RATE(TX_RATE)) ++ MCS = TX_RATE - MPT_RATE_VHT2SS_MCS0; ++ else if (MPT_IS_VHT_3S_RATE(TX_RATE)) ++ MCS = TX_RATE - MPT_RATE_VHT3SS_MCS0; ++ else if (MPT_IS_VHT_4S_RATE(TX_RATE)) ++ MCS = TX_RATE - MPT_RATE_VHT4SS_MCS0; ++ else ++ MCS = TX_RATE - MPT_RATE_VHT1SS_MCS0; ++ } ++ ++ pPMacPktInfo->MCS = MCS; ++ pPMacTxInfo->TX_RATE_HEX = TX_RATE_HEX; ++ ++ DBG_871X(" MCS=%d, TX_RATE_HEX =0x%x\n", MCS, pPMacTxInfo->TX_RATE_HEX); ++ /* mSTBC & Nsts*/ ++ pPMacPktInfo->Nsts = pPMacPktInfo->Nss; ++ if (pPMacTxInfo->bSTBC) { ++ if (pPMacPktInfo->Nss == 1) { ++ pPMacTxInfo->m_STBC = 2; ++ pPMacPktInfo->Nsts = pPMacPktInfo->Nss*2; ++ } else ++ pPMacTxInfo->m_STBC = 1; ++ } else ++ pPMacTxInfo->m_STBC = 1; ++} ++ ++ ++UINT LDPC_parameter_generator( ++ UINT N_pld_int, ++ UINT N_CBPSS, ++ UINT N_SS, ++ UINT R, ++ UINT m_STBC, ++ UINT N_TCB_int ++) ++{ ++ double CR = 0.; ++ double N_pld = (double)N_pld_int; ++ double N_TCB = (double)N_TCB_int; ++ double N_CW = 0., N_shrt = 0., N_spcw = 0., N_fshrt = 0.; ++ double L_LDPC = 0., K_LDPC = 0., L_LDPC_info = 0.; ++ double N_punc = 0., N_ppcw = 0., N_fpunc = 0., N_rep = 0., N_rpcw = 0., N_frep = 0.; ++ double R_eff = 0.; ++ UINT VHTSIGA2B3 = 0;/* extra symbol from VHT-SIG-A2 Bit 3*/ ++ ++ if (R == 0) ++ CR = 0.5; ++ else if (R == 1) ++ CR = 2./3.; ++ else if (R == 2) ++ CR = 3./4.; ++ else if (R == 3) ++ CR = 5./6.; ++ ++ if (N_TCB <= 648.) { ++ N_CW = 1.; ++ if (N_TCB >= N_pld+912.*(1.-CR)) ++ L_LDPC = 1296.; ++ else ++ L_LDPC = 648.; ++ } else if (N_TCB <= 1296.) { ++ N_CW = 1.; ++ if (N_TCB >= (double)N_pld + 1464.*(1.-CR)) ++ L_LDPC = 1944.; ++ else ++ L_LDPC = 1296.; ++ } else if (N_TCB <= 1944.) { ++ N_CW = 1.; ++ L_LDPC = 1944.; ++ } else if (N_TCB <= 2592.) { ++ N_CW = 2.; ++ if (N_TCB >= N_pld+2916.*(1.-CR)) ++ L_LDPC = 1944.; ++ else ++ L_LDPC = 1296.; ++ } else { ++ N_CW = ceil(N_pld/1944./CR); ++ L_LDPC = 1944.; ++ } ++ /* Number of information bits per CW*/ ++ K_LDPC = L_LDPC*CR; ++ /* Number of shortening bits max(0, (N_CW * L_LDPC * R) - N_pld)*/ ++ N_shrt = (N_CW*K_LDPC-N_pld) > 0. ? (N_CW*K_LDPC-N_pld) : 0.; ++ /* Number of shortening bits per CW N_spcw = rtfloor(N_shrt/N_CW)*/ ++ N_spcw = rtfloor(N_shrt/N_CW); ++ /* The first N_fshrt CWs shorten 1 bit more*/ ++ N_fshrt = (double)((int)N_shrt % (int)N_CW); ++ /* Number of data bits for the last N_CW-N_fshrt CWs*/ ++ L_LDPC_info = K_LDPC-N_spcw; ++ /* Number of puncturing bits*/ ++ N_punc = (N_CW*L_LDPC-N_TCB-N_shrt) > 0. ? (N_CW*L_LDPC-N_TCB-N_shrt) : 0.; ++ if (((N_punc > .1 * N_CW * L_LDPC * (1.-CR)) && (N_shrt < 1.2 * N_punc * CR/(1.-CR))) || ++ (N_punc > 0.3*N_CW*L_LDPC*(1.-CR))) { ++ /*cout << "*** N_TCB and N_punc are Recomputed ***" << endl;*/ ++ VHTSIGA2B3 = 1; ++ N_TCB += (double)N_CBPSS*N_SS*m_STBC; ++ N_punc = (N_CW*L_LDPC-N_TCB-N_shrt) > 0. ? (N_CW*L_LDPC-N_TCB-N_shrt) : 0.; ++ } else ++ VHTSIGA2B3 = 0; ++ ++ return VHTSIGA2B3; ++} /* function end of LDPC_parameter_generator */ ++ ++/*======================================== ++ Data field of PPDU ++ Get N_sym and SIGA2BB3 ++========================================*/ ++void PMAC_Nsym_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo) ++{ ++ UINT SIGA2B3 = 0; ++ UCHAR TX_RATE = pPMacTxInfo->TX_RATE; ++ ++ UINT R, R_list[10] = {0, 0, 2, 0, 2, 1, 2, 3, 2, 3}; ++ double CR = 0; ++ UINT N_SD, N_BPSC_list[10] = {1, 2, 2, 4, 4, 6, 6, 6, 8, 8}; ++ UINT N_BPSC = 0, N_CBPS = 0, N_DBPS = 0, N_ES = 0, N_SYM = 0, N_pld = 0, N_TCB = 0; ++ int D_R = 0; ++ ++ DBG_871X("TX_RATE = %d\n", TX_RATE); ++ /* N_SD*/ ++ if (pPMacTxInfo->BandWidth == 0) ++ N_SD = 52; ++ else if (pPMacTxInfo->BandWidth == 1) ++ N_SD = 108; ++ else ++ N_SD = 234; ++ ++ if (MPT_IS_HT_RATE(TX_RATE)) { ++ UCHAR MCS_temp; ++ ++ if (pPMacPktInfo->MCS > 23) ++ MCS_temp = pPMacPktInfo->MCS - 24; ++ else if (pPMacPktInfo->MCS > 15) ++ MCS_temp = pPMacPktInfo->MCS - 16; ++ else if (pPMacPktInfo->MCS > 7) ++ MCS_temp = pPMacPktInfo->MCS - 8; ++ else ++ MCS_temp = pPMacPktInfo->MCS; ++ ++ R = R_list[MCS_temp]; ++ ++ switch (R) { ++ case 0: ++ CR = .5; break; ++ case 1: ++ CR = 2./3.; break; ++ case 2: ++ CR = 3./4.; break; ++ case 3: ++ CR = 5./6.; break; ++ } ++ ++ N_BPSC = N_BPSC_list[MCS_temp]; ++ N_CBPS = N_BPSC*N_SD*pPMacPktInfo->Nss; ++ N_DBPS = (UINT)((double)N_CBPS*CR); ++ ++ if (pPMacTxInfo->bLDPC == FALSE) { ++ N_ES = (UINT)ceil((double)(N_DBPS * pPMacPktInfo->Nss)/4./300.); ++ DBG_871X("N_ES = %d\n", N_ES); ++ ++ /* N_SYM = m_STBC* (8*length+16+6*N_ES) / (m_STBC*N_DBPS)*/ ++ N_SYM = pPMacTxInfo->m_STBC*(UINT)ceil((double)(pPMacTxInfo->PacketLength*8+16+N_ES*6)/ ++ (double)(N_DBPS*pPMacTxInfo->m_STBC)); ++ ++ } else { ++ N_ES = 1; ++ /* N_pld = length * 8 + 16*/ ++ N_pld = pPMacTxInfo->PacketLength*8+16; ++ DBG_871X("N_pld = %d\n", N_pld); ++ N_SYM = pPMacTxInfo->m_STBC*(UINT)ceil((double)(N_pld)/ ++ (double)(N_DBPS*pPMacTxInfo->m_STBC)); ++ DBG_871X("N_SYM = %d\n", N_SYM); ++ /* N_avbits = N_CBPS *m_STBC *(N_pld/N_CBPS*R*m_STBC)*/ ++ N_TCB = N_CBPS*N_SYM; ++ DBG_871X("N_TCB = %d\n", N_TCB); ++ SIGA2B3 = LDPC_parameter_generator(N_pld, N_CBPS, pPMacPktInfo->Nss, R, pPMacTxInfo->m_STBC, N_TCB); ++ DBG_871X("SIGA2B3 = %d\n", SIGA2B3); ++ N_SYM = N_SYM + SIGA2B3*pPMacTxInfo->m_STBC; ++ DBG_871X("N_SYM = %d\n", N_SYM); ++ } ++ } else if (MPT_IS_VHT_RATE(TX_RATE)) { ++ R = R_list[pPMacPktInfo->MCS]; ++ ++ switch (R) { ++ case 0: ++ CR = .5; break; ++ case 1: ++ CR = 2./3.; break; ++ case 2: ++ CR = 3./4.; break; ++ case 3: ++ CR = 5./6.; break; ++ } ++ N_BPSC = N_BPSC_list[pPMacPktInfo->MCS]; ++ N_CBPS = N_BPSC*N_SD*pPMacPktInfo->Nss; ++ N_DBPS = (UINT)((double)N_CBPS*CR); ++ if (pPMacTxInfo->bLDPC == FALSE) { ++ if (pPMacTxInfo->bSGI) ++ N_ES = (UINT)ceil((double)(N_DBPS)/3.6/600.); ++ else ++ N_ES = (UINT)ceil((double)(N_DBPS)/4./600.); ++ /* N_SYM = m_STBC* (8*length+16+6*N_ES) / (m_STBC*N_DBPS)*/ ++ N_SYM = pPMacTxInfo->m_STBC*(UINT)ceil((double)(pPMacTxInfo->PacketLength*8+16+N_ES*6)/(double)(N_DBPS*pPMacTxInfo->m_STBC)); ++ SIGA2B3 = 0; ++ } else { ++ N_ES = 1; ++ /* N_SYM = m_STBC* (8*length+N_service) / (m_STBC*N_DBPS)*/ ++ N_SYM = pPMacTxInfo->m_STBC*(UINT)ceil((double)(pPMacTxInfo->PacketLength*8+16)/(double)(N_DBPS*pPMacTxInfo->m_STBC)); ++ /* N_avbits = N_sys_init * N_CBPS*/ ++ N_TCB = N_CBPS * N_SYM; ++ /* N_pld = N_sys_init * N_DBPS*/ ++ N_pld = N_SYM * N_DBPS; ++ SIGA2B3 = LDPC_parameter_generator(N_pld, N_CBPS, pPMacPktInfo->Nss, R, pPMacTxInfo->m_STBC, N_TCB); ++ N_SYM = N_SYM + SIGA2B3*pPMacTxInfo->m_STBC; ++ } ++ ++ switch (R) { ++ case 0: ++ D_R = 2; break; ++ case 1: ++ D_R = 3; break; ++ case 2: ++ D_R = 4; break; ++ case 3: ++ D_R = 6; break; ++ } ++ ++ if (((N_CBPS/N_ES)%D_R) != 0) { ++ DBG_871X("MCS= %d is not supported when Nss=%d and BW= %d !!\n", pPMacPktInfo->MCS, pPMacPktInfo->Nss, pPMacTxInfo->BandWidth); ++ return; ++ } ++ ++ DBG_871X("MCS= %d Nss=%d and BW= %d !!\n", pPMacPktInfo->MCS, pPMacPktInfo->Nss, pPMacTxInfo->BandWidth); ++ } ++ ++ pPMacPktInfo->N_sym = N_SYM; ++ pPMacPktInfo->SIGA2B3 = SIGA2B3; ++} ++ ++/*======================================== ++ L-SIG Rate R Length P Tail ++ 4b 1b 12b 1b 6b ++========================================*/ ++ ++void L_SIG_generator( ++ UINT N_SYM, /* Max: 750*/ ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo) ++{ ++ u8 sig_bi[24] = {0}; /* 24 BIT*/ ++ UINT mode, LENGTH; ++ int i; ++ ++ if (MPT_IS_OFDM_RATE(pPMacTxInfo->TX_RATE)) { ++ mode = pPMacPktInfo->MCS; ++ LENGTH = pPMacTxInfo->PacketLength; ++ } else { ++ UCHAR N_LTF; ++ double T_data; ++ UINT OFDM_symbol; ++ ++ mode = 0; ++ ++ /* Table 20-13 Num of HT-DLTFs request*/ ++ if (pPMacPktInfo->Nsts <= 2) ++ N_LTF = pPMacPktInfo->Nsts; ++ else ++ N_LTF = 4; ++ ++ if (pPMacTxInfo->bSGI) ++ T_data = 3.6; ++ else ++ T_data = 4.0; ++ ++ /*(L-SIG, HT-SIG, HT-STF, HT-LTF....HT-LTF, Data)*/ ++ if (MPT_IS_VHT_RATE(pPMacTxInfo->TX_RATE)) ++ OFDM_symbol = (UINT)ceil((double)(8+4+N_LTF*4+N_SYM*T_data+4)/4.); ++ else ++ OFDM_symbol = (UINT)ceil((double)(8+4+N_LTF*4+N_SYM*T_data)/4.); ++ ++ DBG_871X("%s , OFDM_symbol =%d\n", __func__, OFDM_symbol); ++ LENGTH = OFDM_symbol*3-3; ++ DBG_871X("%s , LENGTH =%d\n", __func__, LENGTH); ++ ++ } ++ /* Rate Field*/ ++ switch (mode) { ++ case 0: ++ sig_bi[0] = 1; sig_bi[1] = 1; sig_bi[2] = 0; sig_bi[3] = 1; ++ break; ++ case 1: ++ sig_bi[0] = 1; sig_bi[1] = 1; sig_bi[2] = 1; sig_bi[3] = 1; ++ break; ++ case 2: ++ sig_bi[0] = 0; sig_bi[1] = 1; sig_bi[2] = 0; sig_bi[3] = 1; ++ break; ++ case 3: ++ sig_bi[0] = 0; sig_bi[1] = 1; sig_bi[2] = 1; sig_bi[3] = 1; ++ break; ++ case 4: ++ sig_bi[0] = 1; sig_bi[1] = 0; sig_bi[2] = 0; sig_bi[3] = 1; ++ break; ++ case 5: ++ sig_bi[0] = 1; sig_bi[1] = 0; sig_bi[2] = 1; sig_bi[3] = 1; ++ break; ++ case 6: ++ sig_bi[0] = 0; sig_bi[1] = 0; sig_bi[2] = 0; sig_bi[3] = 1; ++ break; ++ case 7: ++ sig_bi[0] = 0; sig_bi[1] = 0; sig_bi[2] = 1; sig_bi[3] = 1; ++ break; ++ } ++ /*Reserved bit*/ ++ sig_bi[4] = 0; ++ ++ /* Length Field*/ ++ for (i = 0; i < 12; i++) ++ sig_bi[i+5] = (LENGTH>>i) & 1; ++ ++ /* Parity Bit*/ ++ sig_bi[17] = 0; ++ for (i = 0; i < 17; i++) ++ sig_bi[17] = sig_bi[17] + sig_bi[i]; ++ ++ sig_bi[17] %= 2; ++ ++ /* Tail Field*/ ++ for (i = 18; i < 24; i++) ++ sig_bi[i] = 0; ++ ++ /* dump_buf(sig_bi,24);*/ ++ _rtw_memset(pPMacTxInfo->LSIG, 0, 3); ++ ByteToBit(pPMacTxInfo->LSIG, (bool *)sig_bi, 3); ++} ++ ++ ++void CRC8_generator( ++ bool *out, ++ bool *in, ++ UCHAR in_size ++ ) ++{ ++ UCHAR i = 0; ++ bool temp = 0, reg[] = {1, 1, 1, 1, 1, 1, 1, 1}; ++ ++ for (i = 0; i < in_size; i++) { /* take one's complement and bit reverse*/ ++ temp = in[i]^reg[7]; ++ reg[7] = reg[6]; ++ reg[6] = reg[5]; ++ reg[5] = reg[4]; ++ reg[4] = reg[3]; ++ reg[3] = reg[2]; ++ reg[2] = reg[1] ^ temp; ++ reg[1] = reg[0] ^ temp; ++ reg[0] = temp; ++ } ++ for (i = 0; i < 8; i++)/* take one's complement and bit reverse*/ ++ out[i] = reg[7-i]^1; ++ } ++ ++/*/================================================================================ ++ HT-SIG1 MCS CW Length 24BIT + 24BIT ++ 7b 1b 16b ++ HT-SIG2 Smoothing Not sounding Rsvd AGG STBC FEC SGI N_ELTF CRC Tail ++ 1b 1b 1b 1b 2b 1b 1b 2b 8b 6b ++================================================================================*/ ++void HT_SIG_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo ++ ) ++{ ++ UINT i; ++ bool sig_bi[48] = {0}, crc8[8] = {0}; ++ /* MCS Field*/ ++ for (i = 0; i < 7; i++) ++ sig_bi[i] = (pPMacPktInfo->MCS >> i) & 0x1; ++ /* Packet BW Setting*/ ++ sig_bi[7] = pPMacTxInfo->BandWidth; ++ /* HT-Length Field*/ ++ for (i = 0; i < 16; i++) ++ sig_bi[i+8] = (pPMacTxInfo->PacketLength >> i) & 0x1; ++ /* Smoothing; 1->allow smoothing*/ ++ sig_bi[24] = 1; ++ /*Not Sounding*/ ++ sig_bi[25] = 1-pPMacTxInfo->NDP_sound; ++ /*Reserved bit*/ ++ sig_bi[26] = 1; ++ /*/Aggregate*/ ++ sig_bi[27] = 0; ++ /*STBC Field*/ ++ if (pPMacTxInfo->bSTBC) { ++ sig_bi[28] = 1; ++ sig_bi[29] = 0; ++ } else { ++ sig_bi[28] = 0; ++ sig_bi[29] = 0; ++ } ++ /*Advance Coding, 0: BCC, 1: LDPC*/ ++ sig_bi[30] = pPMacTxInfo->bLDPC; ++ /* Short GI*/ ++ sig_bi[31] = pPMacTxInfo->bSGI; ++ /* N_ELTFs*/ ++ if (pPMacTxInfo->NDP_sound == FALSE) { ++ sig_bi[32] = 0; ++ sig_bi[33] = 0; ++ } else { ++ int N_ELTF = pPMacTxInfo->Ntx - pPMacPktInfo->Nss; ++ ++ for (i = 0; i < 2; i++) ++ sig_bi[32+i] = (N_ELTF>>i)%2; ++ } ++ /* CRC-8*/ ++ CRC8_generator(crc8, sig_bi, 34); ++ ++ for (i = 0; i < 8; i++) ++ sig_bi[34+i] = crc8[i]; ++ ++ /*Tail*/ ++ for (i = 42; i < 48; i++) ++ sig_bi[i] = 0; ++ ++ _rtw_memset(pPMacTxInfo->HT_SIG, 0, 6); ++ ByteToBit(pPMacTxInfo->HT_SIG, sig_bi, 6); ++} ++ ++ ++/*====================================================================================== ++ VHT-SIG-A1 ++ BW Reserved STBC G_ID SU_Nsts P_AID TXOP_PS_NOT_ALLOW Reserved ++ 2b 1b 1b 6b 3b 9b 1b 2b 1b ++ VHT-SIG-A2 ++ SGI SGI_Nsym SU/MU coding LDPC_Extra SU_NCS Beamformed Reserved CRC Tail ++ 1b 1b 1b 1b 4b 1b 1b 8b 6b ++======================================================================================*/ ++void VHT_SIG_A_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo) ++{ ++ UINT i; ++ bool sig_bi[48], crc8[8]; ++ ++ _rtw_memset(sig_bi, 0, 48); ++ _rtw_memset(crc8, 0, 8); ++ ++ /* BW Setting*/ ++ for (i = 0; i < 2; i++) ++ sig_bi[i] = (pPMacTxInfo->BandWidth>>i) & 0x1; ++ /* Reserved Bit*/ ++ sig_bi[2] = 1; ++ /*STBC Field*/ ++ sig_bi[3] = pPMacTxInfo->bSTBC; ++ /*Group ID: Single User -> A value of 0 or 63 indicates an SU PPDU. */ ++ for (i = 0; i < 6; i++) ++ sig_bi[4+i] = 0; ++ /* N_STS/Partial AID*/ ++ for (i = 0; i < 12; i++) { ++ if (i < 3) ++ sig_bi[10+i] = ((pPMacPktInfo->Nsts - 1)>>i) & 0x1; ++ else ++ sig_bi[10+i] = 0; ++ } ++ /*TXOP_PS_NOT_ALLPWED*/ ++ sig_bi[22] = 0; ++ /*Reserved Bits*/ ++ sig_bi[23] = 1; ++ /*Short GI*/ ++ sig_bi[24] = pPMacTxInfo->bSGI; ++ if (pPMacTxInfo->bSGI > 0 && (pPMacPktInfo->N_sym%10) == 9) ++ sig_bi[25] = 1; ++ else ++ sig_bi[25] = 0; ++ /* SU/MU[0] Coding*/ ++ sig_bi[26] = pPMacTxInfo->bLDPC; /* 0:BCC, 1:LDPC */ ++ sig_bi[27] = pPMacPktInfo->SIGA2B3; /*/ Record Extra OFDM Symols is added or not when LDPC is used*/ ++ /*SU MCS/MU[1-3] Coding*/ ++ for (i = 0; i < 4; i++) ++ sig_bi[28+i] = (pPMacPktInfo->MCS>>i) & 0x1; ++ /*SU Beamform */ ++ sig_bi[32] = 0; /*packet.TXBF_en;*/ ++ /*Reserved Bit*/ ++ sig_bi[33] = 1; ++ /*CRC-8*/ ++ CRC8_generator(crc8, sig_bi, 34); ++ for (i = 0; i < 8; i++) ++ sig_bi[34+i] = crc8[i]; ++ /*Tail*/ ++ for (i = 42; i < 48; i++) ++ sig_bi[i] = 0; ++ ++ _rtw_memset(pPMacTxInfo->VHT_SIG_A, 0, 6); ++ ByteToBit(pPMacTxInfo->VHT_SIG_A, sig_bi, 6); ++} ++ ++/*====================================================================================== ++ VHT-SIG-B ++ Length Resesrved Trail ++ 17/19/21 BIT 3/2/2 BIT 6b ++======================================================================================*/ ++void VHT_SIG_B_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo) ++{ ++ bool sig_bi[32], crc8_bi[8]; ++ UINT i, len, res, tail = 6, total_len, crc8_in_len; ++ UINT sigb_len; ++ ++ _rtw_memset(sig_bi, 0, 32); ++ _rtw_memset(crc8_bi, 0, 8); ++ ++ /*Sounding Packet*/ ++ if (pPMacTxInfo->NDP_sound == 1) { ++ if (pPMacTxInfo->BandWidth == 0) { ++ bool sigb_temp[26] = {0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0}; ++ ++ _rtw_memcpy(sig_bi, sigb_temp, 26); ++ } else if (pPMacTxInfo->BandWidth == 1) { ++ bool sigb_temp[27] = {1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0}; ++ ++ _rtw_memcpy(sig_bi, sigb_temp, 27); ++ } else if (pPMacTxInfo->BandWidth == 2) { ++ bool sigb_temp[29] = {0, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0}; ++ ++ _rtw_memcpy(sig_bi, sigb_temp, 29); ++ } ++ } else { /* Not NDP Sounding*/ ++ bool *sigb_temp[29] = {0}; ++ ++ if (pPMacTxInfo->BandWidth == 0) { ++ len = 17; res = 3; ++ } else if (pPMacTxInfo->BandWidth == 1) { ++ len = 19; res = 2; ++ } else if (pPMacTxInfo->BandWidth == 2) { ++ len = 21; res = 2; ++ } else { ++ len = 21; res = 2; ++ } ++ total_len = len+res+tail; ++ crc8_in_len = len+res; ++ ++ /*Length Field*/ ++ sigb_len = (pPMacTxInfo->PacketLength + 3) >> 2; ++ ++ for (i = 0; i < len; i++) ++ sig_bi[i] = (sigb_len>>i) & 0x1; ++ /*Reserved Field*/ ++ for (i = 0; i < res; i++) ++ sig_bi[len+i] = 1; ++ /* CRC-8*/ ++ CRC8_generator(crc8_bi, sig_bi, crc8_in_len); ++ ++ /* Tail */ ++ for (i = 0; i < tail; i++) ++ sig_bi[len+res+i] = 0; + } ++ ++ _rtw_memset(pPMacTxInfo->VHT_SIG_B, 0, 4); ++ ByteToBit(pPMacTxInfo->VHT_SIG_B, sig_bi, 4); ++ ++ pPMacTxInfo->VHT_SIG_B_CRC = 0; ++ ByteToBit(&(pPMacTxInfo->VHT_SIG_B_CRC), crc8_bi, 1); + } ++ ++/*======================= ++ VHT Delimiter ++=======================*/ ++void VHT_Delimiter_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo ++ ) ++{ ++ bool sig_bi[32] = {0}, crc8[8] = {0}; ++ UINT crc8_in_len = 16; ++ UINT PacketLength = pPMacTxInfo->PacketLength; ++ int j; ++ ++ /* Delimiter[0]: EOF*/ ++ sig_bi[0] = 1; ++ /* Delimiter[1]: Reserved*/ ++ sig_bi[1] = 0; ++ /* Delimiter[3:2]: MPDU Length High*/ ++ sig_bi[2] = ((PacketLength - 4) >> 12) % 2; ++ sig_bi[3] = ((PacketLength - 4) >> 13) % 2; ++ /* Delimiter[15:4]: MPDU Length Low*/ ++ for (j = 4; j < 16; j++) ++ sig_bi[j] = ((PacketLength - 4) >> (j-4)) % 2; ++ CRC8_generator(crc8, sig_bi, crc8_in_len); ++ for (j = 16; j < 24; j++) /* Delimiter[23:16]: CRC 8*/ ++ sig_bi[j] = crc8[j-16]; ++ for (j = 24; j < 32; j++) /* Delimiter[31:24]: Signature ('4E' in Hex, 78 in Dec)*/ ++ sig_bi[j] = (78 >> (j-24)) % 2; ++ ++ _rtw_memset(pPMacTxInfo->VHT_Delimiter, 0, 4); ++ ByteToBit(pPMacTxInfo->VHT_Delimiter, sig_bi, 4); ++} ++ ++#endif + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mp_ioctl.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mp_ioctl.c +old mode 100755 +new mode 100644 +index 2b4c94f..ff0c66b +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mp_ioctl.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mp_ioctl.c +@@ -21,7 +21,7 @@ + + #include + #include +-#include "../hal/OUTSRC/phydm_precomp.h" ++#include "../hal/phydm/phydm_precomp.h" + + //**************** oid_rtl_seg_81_85 section start **************** + NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv *poid_par_priv) +@@ -2237,8 +2237,6 @@ NDIS_STATUS oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv) + RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_, ("Query Information, OID_RT_PRO_RX_PACKET_TYPE:%d \n",\ + Adapter->mppriv.rx_with_status)); + +- //*(u32 *)&Adapter->eeprompriv.mac_addr[0]=rtw_read32(Adapter, 0x10250050); +- //*(u16 *)&Adapter->eeprompriv.mac_addr[4]=rtw_read16(Adapter, 0x10250054); + RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("MAC addr=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x \n", + Adapter->eeprompriv.mac_addr[0],Adapter->eeprompriv.mac_addr[1],Adapter->eeprompriv.mac_addr[2],\ + Adapter->eeprompriv.mac_addr[3],Adapter->eeprompriv.mac_addr[4],Adapter->eeprompriv.mac_addr[5])); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_odm.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_odm.c +old mode 100755 +new mode 100644 +index 05063bf..7b733a9 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_odm.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_odm.c +@@ -40,23 +40,24 @@ const char *odm_comp_str[] = { + /* BIT15 */"ODM_COMP_CFO_TRACKING", + /* BIT16 */"ODM_COMP_ACS", + /* BIT17 */"PHYDM_COMP_ADAPTIVITY", +- /* BIT18 */NULL, +- /* BIT19 */NULL, ++ /* BIT18 */"PHYDM_COMP_RA_DBG", ++ /* BIT19 */"PHYDM_COMP_TXBF", + /* BIT20 */"ODM_COMP_EDCA_TURBO", + /* BIT21 */"ODM_COMP_EARLY_MODE", +- /* BIT22 */NULL, ++ /* BIT22 */"ODM_FW_DEBUG_TRACE", + /* BIT23 */NULL, + /* BIT24 */"ODM_COMP_TX_PWR_TRACK", + /* BIT25 */"ODM_COMP_RX_GAIN_TRACK", + /* BIT26 */"ODM_COMP_CALIBRATION", + /* BIT27 */NULL, +- /* BIT28 */NULL, +- /* BIT29 */NULL, ++ /* BIT28 */"ODM_PHY_CONFIG", ++ /* BIT29 */"BEAMFORMING_DEBUG", + /* BIT30 */"ODM_COMP_COMMON", + /* BIT31 */"ODM_COMP_INIT", ++ /* BIT32 */"ODM_COMP_NOISY_DETECT", + }; + +-#define RTW_ODM_COMP_MAX 32 ++#define RTW_ODM_COMP_MAX 33 + + const char *odm_ability_str[] = { + /* BIT0 */"ODM_BB_DIG", +@@ -76,7 +77,7 @@ const char *odm_ability_str[] = { + /* BIT14 */"ODM_BB_CFO_TRACKING", + /* BIT15 */"ODM_BB_NHM_CNT", + /* BIT16 */"ODM_BB_PRIMARY_CCA", +- /* BIT17 */NULL, ++ /* BIT17 */"ODM_BB_TXBF", + /* BIT18 */NULL, + /* BIT19 */NULL, + /* BIT20 */"ODM_MAC_EDCA_TURBO", +@@ -106,21 +107,22 @@ void rtw_odm_dbg_comp_msg(void *sel, _adapter *adapter) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); + DM_ODM_T *odm = &pHalData->odmpriv; + int cnt = 0; +- u64 dbg_comp; ++ u64 dbg_comp = 0; + int i; + +- rtw_hal_get_def_var(adapter, HW_DEF_ODM_DBG_FLAG, &dbg_comp); +- DBG_871X_SEL_NL(sel, "odm.DebugComponents = 0x%016llx \n", dbg_comp); ++ rtw_hal_get_odm_var(adapter, HAL_ODM_DBG_FLAG, &dbg_comp, NULL); ++ ++ DBG_871X_SEL_NL(sel, "odm.DebugComponents = 0x%016llx\n", dbg_comp); + for (i=0;iodmpriv; + int cnt = 0; +- u32 dbg_level; ++ u32 dbg_level = 0; + int i; + +- rtw_hal_get_def_var(adapter, HW_DEF_ODM_DBG_LEVEL, &dbg_level); ++ rtw_hal_get_odm_var(adapter, HAL_ODM_DBG_LEVEL, &dbg_level, NULL); + DBG_871X_SEL_NL(sel, "odm.DebugLevel = %u\n", dbg_level); + for (i=0;iodmpriv; ++ u4Byte ic_type = chip_type_to_odm_ic_type(rtw_get_chip_type(adapter)); ++ ++ rtw_warn_on(!ic_type); ++ ++ ODM_CmnInfoInit(odm, ODM_CMNINFO_IC_TYPE, ic_type); + } + + void rtw_odm_adaptivity_ver_msg(void *sel, _adapter *adapter) +@@ -173,7 +187,6 @@ void rtw_odm_adaptivity_ver_msg(void *sel, _adapter *adapter) + + #define RTW_ADAPTIVITY_EN_DISABLE 0 + #define RTW_ADAPTIVITY_EN_ENABLE 1 +-#define RTW_ADAPTIVITY_EN_AUTO 2 + + void rtw_odm_adaptivity_en_msg(void *sel, _adapter *adapter) + { +@@ -188,9 +201,6 @@ void rtw_odm_adaptivity_en_msg(void *sel, _adapter *adapter) + DBG_871X_SEL(sel, "DISABLE\n"); + } else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE) { + DBG_871X_SEL(sel, "ENABLE\n"); +- } else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO) { +- DBG_871X_SEL(sel, "AUTO, chplan:0x%02x, Regulation:%u,%u\n" +- , mlme->ChannelPlan, odm->odm_Regulation2_4G, odm->odm_Regulation5G); + } else { + DBG_871X_SEL(sel, "INVALID\n"); + } +@@ -214,41 +224,49 @@ void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter) + } + } + +-#define RTW_NHM_EN_DISABLE 0 +-#define RTW_NHM_EN_ENABLE 1 ++#define RTW_ADAPTIVITY_DML_DISABLE 0 ++#define RTW_ADAPTIVITY_DML_ENABLE 1 + +-void rtw_odm_nhm_en_msg(void *sel, _adapter *adapter) ++void rtw_odm_adaptivity_dml_msg(void *sel, _adapter *adapter) + { + struct registry_priv *regsty = &adapter->registrypriv; + +- DBG_871X_SEL_NL(sel, "RTW_NHM_EN_"); ++ DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_DML_"); + +- if (regsty->nhm_en == RTW_NHM_EN_DISABLE) { ++ if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_DISABLE) { + DBG_871X_SEL(sel, "DISABLE\n"); +- } else if (regsty->nhm_en == RTW_NHM_EN_ENABLE) { ++ } else if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_ENABLE) { + DBG_871X_SEL(sel, "ENABLE\n"); + } else { + DBG_871X_SEL(sel, "INVALID\n"); + } + } + ++void rtw_odm_adaptivity_dc_backoff_msg(void *sel, _adapter *adapter) ++{ ++ struct registry_priv *regsty = &adapter->registrypriv; ++ ++ DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_DC_BACKOFF:%u\n", regsty->adaptivity_dc_backoff); ++} ++ ++void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter) ++{ ++ rtw_odm_adaptivity_ver_msg(sel, adapter); ++ rtw_odm_adaptivity_en_msg(sel, adapter); ++ rtw_odm_adaptivity_mode_msg(sel, adapter); ++ rtw_odm_adaptivity_dml_msg(sel, adapter); ++ rtw_odm_adaptivity_dc_backoff_msg(sel, adapter); ++} ++ + bool rtw_odm_adaptivity_needed(_adapter *adapter) + { + struct registry_priv *regsty = &adapter->registrypriv; + struct mlme_priv *mlme = &adapter->mlmepriv; + bool ret = _FALSE; + +- if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE +- || regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO) ++ if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE) + ret = _TRUE; + +- if (ret == _TRUE) { +- rtw_odm_adaptivity_ver_msg(RTW_DBGDUMP, adapter); +- rtw_odm_adaptivity_en_msg(RTW_DBGDUMP, adapter); +- rtw_odm_adaptivity_mode_msg(RTW_DBGDUMP, adapter); +- rtw_odm_nhm_en_msg(RTW_DBGDUMP, adapter); +- } +- + return ret; + } + +@@ -257,43 +275,35 @@ void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); + DM_ODM_T *odm = &pHalData->odmpriv; + +- rtw_odm_adaptivity_ver_msg(sel, adapter); +- rtw_odm_adaptivity_en_msg(sel, adapter); +- rtw_odm_adaptivity_mode_msg(sel, adapter); +- rtw_odm_nhm_en_msg(sel, adapter); ++ rtw_odm_adaptivity_config_msg(sel, adapter); + +- DBG_871X_SEL_NL(sel, "%10s %16s %8s %10s %11s %14s\n" +- , "TH_L2H_ini", "TH_EDCCA_HL_diff", "IGI_Base", "ForceEDCCA", "AdapEn_RSSI", "IGI_LowerBound"); +- DBG_871X_SEL_NL(sel, "0x%-8x %-16d 0x%-6x %-10d %-11u %-14u\n" ++ DBG_871X_SEL_NL(sel, "%10s %16s %16s %22s %12s\n" ++ , "TH_L2H_ini", "TH_EDCCA_HL_diff", "TH_L2H_ini_mode2", "TH_EDCCA_HL_diff_mode2", "EDCCA_enable"); ++ DBG_871X_SEL_NL(sel, "0x%-8x %-16d 0x%-14x %-22d %-12d\n" + , (u8)odm->TH_L2H_ini + , odm->TH_EDCCA_HL_diff +- , odm->IGI_Base +- , odm->ForceEDCCA +- , odm->AdapEn_RSSI +- , odm->IGI_LowerBound ++ , (u8)odm->TH_L2H_ini_mode2 ++ , odm->TH_EDCCA_HL_diff_mode2 ++ , odm->EDCCA_enable + ); + +- DBG_871X_SEL_NL(sel, "%8s %9s\n", "EDCCA_ES","Adap_Flag"); +- DBG_871X_SEL_NL(sel, "%-8x %-9x \n" +- , odm->EDCCA_enable_state ++ DBG_871X_SEL_NL(sel, "%15s %9s\n", "AdapEnableState", "Adap_Flag"); ++ DBG_871X_SEL_NL(sel, "%-15x %-9x\n" ++ , odm->Adaptivity_enable + , odm->adaptivity_flag + ); +- +- + } + +-void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, +- s8 IGI_Base, bool ForceEDCCA, u8 AdapEn_RSSI, u8 IGI_LowerBound) ++void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, s8 TH_L2H_ini_mode2, s8 TH_EDCCA_HL_diff_mode2, u8 EDCCA_enable) + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); + DM_ODM_T *odm = &pHalData->odmpriv; + + odm->TH_L2H_ini = TH_L2H_ini; + odm->TH_EDCCA_HL_diff = TH_EDCCA_HL_diff; +- odm->IGI_Base = IGI_Base; +- odm->ForceEDCCA = ForceEDCCA; +- odm->AdapEn_RSSI = AdapEn_RSSI; +- odm->IGI_LowerBound = IGI_LowerBound; ++ odm->TH_L2H_ini_mode2 = TH_L2H_ini_mode2; ++ odm->TH_EDCCA_HL_diff_mode2 = TH_EDCCA_HL_diff_mode2; ++ odm->EDCCA_enable = EDCCA_enable; + } + + void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter) +@@ -309,13 +319,12 @@ void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter) + void rtw_odm_acquirespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; + _irqL irqL; + + switch(type) + { + case RT_IQK_SPINLOCK: +- _enter_critical_bh(&pdmpriv->IQKSpinLock, &irqL); ++ _enter_critical_bh(&pHalData->IQKSpinLock, &irqL); + default: + break; + } +@@ -324,15 +333,129 @@ void rtw_odm_acquirespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type) + void rtw_odm_releasespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; + _irqL irqL; + + switch(type) + { + case RT_IQK_SPINLOCK: +- _exit_critical_bh(&pdmpriv->IQKSpinLock, &irqL); ++ _exit_critical_bh(&pHalData->IQKSpinLock, &irqL); + default: + break; + } + } + ++#ifdef CONFIG_DFS_MASTER ++VOID rtw_odm_radar_detect_reset(_adapter *adapter) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ PDM_ODM_T pDM_Odm = &(hal_data->odmpriv); ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8192D) { ++ ODM_SetBBReg(pDM_Odm, 0xc84 , BIT25, 0); ++ ODM_SetBBReg(pDM_Odm, 0xc84 , BIT25, 1); ++ } else if (pDM_Odm->SupportICType & ODM_RTL8821) { ++ ODM_SetBBReg(pDM_Odm, 0x924 , BIT15, 0); ++ ODM_SetBBReg(pDM_Odm, 0x924 , BIT15, 1); ++ } else { ++ /* not supported yet */ ++ rtw_warn_on(1); ++ } ++} ++ ++VOID rtw_odm_radar_detect_disable(_adapter *adapter) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ PDM_ODM_T pDM_Odm = &(hal_data->odmpriv); ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8192D) ++ ODM_SetBBReg(pDM_Odm, 0xc84 , BIT25, 0); ++ else if (pDM_Odm->SupportICType & ODM_RTL8821) ++ ODM_SetBBReg(pDM_Odm, 0x924 , BIT15, 0); ++ else ++ rtw_warn_on(1); ++} ++ ++/* called after ch, bw is set, chance to adjust parameter for different ch conditions */ ++VOID rtw_odm_radar_detect_enable(_adapter *adapter) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ PDM_ODM_T pDM_Odm = &(hal_data->odmpriv); ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8192D) { ++ ODM_SetBBReg(pDM_Odm, 0xc38, BIT23 | BIT22, 2); ++ ODM_SetBBReg(pDM_Odm, 0x814, bMaskDWord, 0x04cc4d10); ++ ODM_SetBBReg(pDM_Odm, 0xc8c, BIT23 | BIT22, 3); ++ ODM_SetBBReg(pDM_Odm, 0xc30, 0xf, 0xa); ++ ODM_SetBBReg(pDM_Odm, 0xcdc, 0xf0000, 4); ++ } else if (pDM_Odm->SupportICType & ODM_RTL8821) { ++ ODM_SetBBReg(pDM_Odm, 0x814, 0x3fffffff, 0x04cc4d10); ++ ODM_SetBBReg(pDM_Odm, 0x834, bMaskByte0, 0x06); ++ ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c16ecdf); ++ ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x0152a400); ++ ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x0fa21a20); ++ ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0f57204); ++ } else { ++ /* not supported yet */ ++ rtw_warn_on(1); ++ } ++ ++ rtw_odm_radar_detect_reset(adapter); ++} ++ ++BOOLEAN rtw_odm_radar_detect(_adapter *adapter) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ PDM_ODM_T pDM_Odm = &(hal_data->odmpriv); ++ BOOLEAN enable_DFS = FALSE; ++ BOOLEAN bypass = FALSE; ++ BOOLEAN radar_detected = FALSE; ++ ++ static u8Byte last_tx_unicast = 0; ++ static u8Byte last_rx_unicast = 0; ++ static u8Byte throughput = 0; ++ int tp_th = ((*pDM_Odm->pBandWidth == ODM_BW40M) ? 45 : 20); /*refer AP team's testing number*/ ++ ++ throughput = (*(pDM_Odm->pNumTxBytesUnicast) - last_tx_unicast) + (*(pDM_Odm->pNumRxBytesUnicast) - last_rx_unicast); ++ last_tx_unicast = *(pDM_Odm->pNumTxBytesUnicast); ++ last_rx_unicast = *(pDM_Odm->pNumRxBytesUnicast); ++ ++ if (throughput>>18 > tp_th) { ++ if (pDM_Odm->SupportICType & ODM_RTL8192D) ++ ODM_SetBBReg(pDM_Odm, 0xcdc, BIT8|BIT9, 0); ++ bypass = TRUE; ++ } else { ++ if (pDM_Odm->SupportICType & ODM_RTL8192D) ++ ODM_SetBBReg(pDM_Odm, 0xcdc, BIT8|BIT9, 1); ++ } ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8192D) { ++ if (ODM_GetBBReg(pDM_Odm , 0xc84, BIT25)) ++ enable_DFS = TRUE; ++ } else if (pDM_Odm->SupportICType & ODM_RTL8821) { ++ if (ODM_GetBBReg(pDM_Odm , 0x924, BIT15)) ++ enable_DFS = TRUE; ++ } ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8192D) { ++ if (ODM_GetBBReg(pDM_Odm , 0xcf8, BIT23)) ++ radar_detected = TRUE; ++ } else if (pDM_Odm->SupportICType & ODM_RTL8821) { ++ if (ODM_GetBBReg(pDM_Odm , 0xf98, BIT17)) ++ radar_detected = TRUE; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD ++ , ("Radar detect: enable_DFS:%d, radar_detected:%d, bypass:%d\n" ++ , enable_DFS, radar_detected, bypass)); ++ if (0) ++ DBG_871X("Radar detect: enable_DFS:%d, radar_detected:%d, bypass:%d(throughput:%llu, tp_th:%d)\n" ++ , enable_DFS, radar_detected, bypass, throughput, tp_th); ++ ++ if (enable_DFS && radar_detected) ++ rtw_odm_radar_detect_reset(adapter); ++ ++exit: ++ return (enable_DFS && radar_detected && !bypass); ++} ++#endif /* CONFIG_DFS_MASTER */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_p2p.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_p2p.c +old mode 100755 +new mode 100644 +index 5f2f99c..101487d +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_p2p.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_p2p.c +@@ -295,7 +295,7 @@ static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8* raddr, + u8 wpsielen = 0; + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; +@@ -325,8 +325,8 @@ static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8* raddr, + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); + pmlmeext->mgnt_seq++; +@@ -383,7 +383,7 @@ static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8* raddr, + wfdielen = build_provdisc_resp_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pattrib->pktlen += wfdielen; +-#endif //CONFIG_WFD ++#endif + + pattrib->last_txcmdsz = pattrib->pktlen; + +@@ -544,6 +544,9 @@ u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; +@@ -652,8 +655,8 @@ u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + + rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } + + u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +@@ -665,6 +668,9 @@ u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; +@@ -768,8 +774,8 @@ u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + + rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } + + u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunneled) +@@ -780,6 +786,9 @@ u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunnel + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; +@@ -953,7 +962,7 @@ u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunnel + + // Value: + // Alternative MAC Address +- _rtw_memcpy( wfdie + wfdielen, &padapter->pbuddy_adapter->eeprompriv.mac_addr[ 0 ], ETH_ALEN ); ++ _rtw_memcpy(wfdie + wfdielen, adapter_mac_addr(padapter->pbuddy_adapter), ETH_ALEN); + // This mac address is used to make the WFD session when TDLS is enable. + + wfdielen += ETH_ALEN; +@@ -963,8 +972,8 @@ u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunnel + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } + + u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +@@ -976,16 +985,17 @@ u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + struct mlme_priv *pmlmepriv = NULL; + struct wifi_display_info *pwfd_info = NULL; + +- // WFD OUI +- if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) +- { +- return 0; +- } +- + padapter = pwdinfo->padapter; + pmlmepriv = &padapter->mlmepriv; + pwfd_info = padapter->wdinfo.wfd_info; +- ++ ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ ++ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ goto exit; ++ ++ /* WFD OUI */ + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; + wfdie[ wfdielen++ ] = 0x6F; +@@ -1072,8 +1082,8 @@ u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + + rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } + + u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +@@ -1085,6 +1095,9 @@ u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; +@@ -1172,8 +1185,8 @@ u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + + rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } + + u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +@@ -1185,6 +1198,9 @@ u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; +@@ -1272,8 +1288,8 @@ u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + + rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } + + u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +@@ -1285,6 +1301,9 @@ u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; +@@ -1373,8 +1392,8 @@ u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + + rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } + + u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +@@ -1386,6 +1405,9 @@ u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; +@@ -1474,8 +1496,8 @@ u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } + + u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +@@ -1487,6 +1509,9 @@ u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; +@@ -1589,8 +1614,8 @@ u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + + rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } + + u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +@@ -1602,6 +1627,9 @@ u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; +@@ -1704,8 +1732,8 @@ u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + + rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } + + u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +@@ -1717,6 +1745,9 @@ u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; +@@ -1805,8 +1836,8 @@ u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + + rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } + + u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +@@ -1818,6 +1849,9 @@ u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; +@@ -1905,12 +1939,10 @@ u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + + rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + ++exit: + return len; +- + } +- +- +-#endif //CONFIG_WFD ++#endif /* CONFIG_WFD */ + + u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) + { +@@ -2746,8 +2778,6 @@ u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe + u16 wps_devicepassword_id = 0x0000; + uint wps_devicepassword_id_len = 0; + #ifdef CONFIG_WFD +- u8 wfd_ie[ 128 ] = { 0x00 }; +- u32 wfd_ielen = 0; + #ifdef CONFIG_TDLS + struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; + #endif // CONFIG_TDLS +@@ -2791,13 +2821,6 @@ u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe + return( result ); + } + +- if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO ) +- { +- result = P2P_STATUS_FAIL_INFO_UNAVAILABLE; +- rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_INFOR_NOREADY); +- return( result ); +- } +- + ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; + ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; + +@@ -2821,6 +2844,7 @@ u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe + u8 ch_list_inclusioned[100] = { 0x00 }; + u8 ch_num_inclusioned = 0; + u16 cap_attr; ++ u8 listen_ch_attr[5] = { 0x00 }; + + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING); + +@@ -2877,7 +2901,11 @@ u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe + } + } + ++ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, (u8 *)listen_ch_attr, (uint *) &attr_contentlen) && attr_contentlen == 5) ++ pwdinfo->nego_req_info.peer_ch = listen_ch_attr[4]; + ++ DBG_871X(FUNC_ADPT_FMT" listen channel :%u\n", FUNC_ADPT_ARG(padapter), pwdinfo->nego_req_info.peer_ch); ++ + attr_contentlen = 0; + if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) ) + { +@@ -2906,7 +2934,8 @@ u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe + ch_list_inclusioned, ch_num_inclusioned) ) + { + #ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ if (check_buddy_fwstate(padapter, _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + DBG_871X( "[%s] desired channel NOT Found!\n", __FUNCTION__ ); + result = P2P_STATUS_FAIL_NO_COMMON_CH; +@@ -2948,24 +2977,16 @@ u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe + //Get the next P2P IE + p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); + } +- +-#ifdef CONFIG_WFD +- // Added by Albert 20110823 +- // Try to get the TCP port information when receiving the negotiation request. +- if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) +- { +- u8 attr_content[ 10 ] = { 0x00 }; +- u32 attr_contentlen = 0; + +- DBG_871X( "[%s] WFD IE Found!!\n", __FUNCTION__ ); +- rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); +- if ( attr_contentlen ) +- { +- pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); +- DBG_871X( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); +- } ++ if (pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO) { ++ result = P2P_STATUS_FAIL_INFO_UNAVAILABLE; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_INFOR_NOREADY); ++ return result; + } +-#endif // CONFIG_WFD ++ ++ #ifdef CONFIG_WFD ++ rtw_process_wfd_ies(padapter, pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, __func__); ++ #endif + + return( result ); + } +@@ -2979,8 +3000,6 @@ u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pfram + u32 ies_len; + u8 * p2p_ie; + #ifdef CONFIG_WFD +- u8 wfd_ie[ 128 ] = { 0x00 }; +- u32 wfd_ielen = 0; + #ifdef CONFIG_TDLS + struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; + #endif // CONFIG_TDLS +@@ -3152,7 +3171,8 @@ u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pfram + ch_list_inclusioned, ch_num_inclusioned) ) + { + #ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ if (check_buddy_fwstate(padapter, _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + DBG_871X( "[%s] desired channel NOT Found!\n", __FUNCTION__ ); + result = P2P_STATUS_FAIL_NO_COMMON_CH; +@@ -3211,23 +3231,9 @@ u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pfram + + } + +-#ifdef CONFIG_WFD +- // Added by Albert 20111122 +- // Try to get the TCP port information when receiving the negotiation response. +- if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) +- { +- u8 attr_content[ 10 ] = { 0x00 }; +- u32 attr_contentlen = 0; +- +- DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); +- rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); +- if ( attr_contentlen ) +- { +- pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); +- DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); +- } +- } +-#endif // CONFIG_WFD ++ #ifdef CONFIG_WFD ++ rtw_process_wfd_ies(padapter, pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, __func__); ++ #endif + + return( result ); + +@@ -3235,6 +3241,7 @@ u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pfram + + u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) + { ++ _adapter *padapter = pwdinfo->padapter; + u8 * ies; + u32 ies_len; + u8 * p2p_ie; +@@ -3289,7 +3296,8 @@ u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pf + } + + #ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(pwdinfo->padapter , _FW_LINKED ) ) ++ if (check_buddy_fwstate(padapter , _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + // Switch back to the AP channel soon. + _set_timer( &pwdinfo->ap_p2p_switch_timer, 100 ); +@@ -3422,7 +3430,7 @@ void pre_tx_invitereq_handler( _adapter* padapter ) + _func_enter_; + + set_channel_bwmode(padapter, pwdinfo->invitereq_info.peer_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); +- padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); + issue_probereq_p2p(padapter, NULL); + _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); + +@@ -3451,7 +3459,9 @@ _func_enter_; + + set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); + rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); +- issue_probereq_p2p(padapter, NULL); ++ issue_probereq_p2p(padapter , NULL); ++ /* WIN Phone only accept unicast probe request when nego back */ ++ issue_probereq_p2p(padapter , pwdinfo->nego_req_info.peerDevAddr); + _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); + + _func_exit_; +@@ -3482,8 +3492,9 @@ _func_enter_; + DBG_871X("%s, switch ch back to buddy's cur_channel=%d\n", __func__, pbuddy_mlmeext->cur_channel); + + set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); +- +- issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500); ++ ++ if (check_buddy_fwstate(padapter, WIFI_FW_STATION_STATE)) ++ issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500); + } + else if( pwdinfo->driver_interface == DRIVER_WEXT ) + { +@@ -3504,7 +3515,7 @@ _func_enter_; + + rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); + if(!check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && +- !(pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE)) + { + val8 = 1; + rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); +@@ -3528,10 +3539,10 @@ _func_enter_; + if ( pbuddy_mlmeext->cur_channel != pwdinfo->listen_channel ) + { + set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); +- if(!check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) &&!(pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ if (!check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE)) + { + val8 = 0; +- padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); + } + rtw_p2p_set_state(pwdinfo, P2P_STATE_IDLE); + issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500); +@@ -3578,7 +3589,11 @@ _func_enter_; + } + else + { +- set_channel_bwmode( padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ /* In p2p+softap. When in P2P_STATE_GONEGO_OK, not back to listen channel.*/ ++ if (!rtw_p2p_chk_state(pwdinfo , P2P_STATE_GONEGO_OK) || padapter->registrypriv.full_ch_in_p2p_handshake == 0) ++ set_channel_bwmode(padapter , pwdinfo->listen_channel , HAL_PRIME_CHNL_OFFSET_DONT_CARE , CHANNEL_WIDTH_20); ++ else ++ DBG_871X("%s, buddy not linked, go nego ok, not back to listen channel\n", __func__); + } + + _func_exit_; +@@ -3596,24 +3611,24 @@ _func_enter_; + + if (rtw_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) { + if (0) +- DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", +- FUNC_ADPT_ARG(padapter), ch, bw, offset); ++ DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", ++ FUNC_ADPT_ARG(padapter), ch, bw, offset); + } + else if (adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->listen_channel) { + ch = pwdinfo->listen_channel; + bw = CHANNEL_WIDTH_20; + offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + if (0) +- DBG_871X(FUNC_ADPT_FMT" back to listen ch - ch:%u, bw:%u, offset:%u\n", +- FUNC_ADPT_ARG(padapter), ch, bw, offset); ++ DBG_871X(FUNC_ADPT_FMT" back to listen ch - ch:%u, bw:%u, offset:%u\n", ++ FUNC_ADPT_ARG(padapter), ch, bw, offset); + } + else { + ch = pcfg80211_wdinfo->restore_channel; + bw = CHANNEL_WIDTH_20; + offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + if (0) +- DBG_871X(FUNC_ADPT_FMT" back to restore ch - ch:%u, bw:%u, offset:%u\n", +- FUNC_ADPT_ARG(padapter), ch, bw, offset); ++ DBG_871X(FUNC_ADPT_FMT" back to restore ch - ch:%u, bw:%u, offset:%u\n", ++ FUNC_ADPT_ARG(padapter), ch, bw, offset); + } + + set_channel_bwmode(padapter, ch, offset, bw); +@@ -3626,11 +3641,9 @@ _func_enter_; + pcfg80211_wdinfo->is_ro_ch = _FALSE; + pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); + +- if (pcfg80211_wdinfo->not_indic_ro_ch_exp == _TRUE) +- return; +- +- DBG_871X("cfg80211_remain_on_channel_expired, ch=%d, bw=%d, offset=%d\n", +- rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter)); ++ DBG_871X("cfg80211_remain_on_channel_expired cookie:0x%llx, ch=%d, bw=%d, offset=%d\n" ++ , pcfg80211_wdinfo->remain_on_ch_cookie ++ , rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter)); + + rtw_cfg80211_remain_on_channel_expired(padapter, + pcfg80211_wdinfo->remain_on_ch_cookie, +@@ -3866,121 +3879,161 @@ static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *fram + } + + #ifdef CONFIG_WFD +-void rtw_append_wfd_ie(_adapter *padapter, u8 *buf, u32* len) ++u32 rtw_xframe_build_wfd_ie(struct xmit_frame *xframe) + { +- unsigned char *frame_body; +- u8 category, action, OUI_Subtype, dialogToken=0; ++ _adapter *adapter = xframe->padapter; ++ struct wifidirect_info *wdinfo = &adapter->wdinfo; ++ u8 *frame = xframe->buf_addr + TXDESC_OFFSET; ++ u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr); ++ u8 *frame_tail = frame + xframe->attrib.pktlen; ++ u8 category, action, OUI_Subtype, dialogToken = 0; + u32 wfdielen = 0; +- struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); +- +- frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); +- category = frame_body[0]; + +- if(category == RTW_WLAN_CATEGORY_PUBLIC) +- { ++ category = frame_body[0]; ++ if (category == RTW_WLAN_CATEGORY_PUBLIC) { + action = frame_body[1]; + if (action == ACT_PUBLIC_VENDOR +- && _rtw_memcmp(frame_body+2, P2P_OUI, 4) == _TRUE +- ) +- { ++ && _rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE ++ ) { + OUI_Subtype = frame_body[6]; + dialogToken = frame_body[7]; +- switch( OUI_Subtype )//OUI Subtype +- { +- case P2P_GO_NEGO_REQ: +- { +- wfdielen = build_nego_req_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); +- (*len) += wfdielen; +- break; +- } +- case P2P_GO_NEGO_RESP: +- { +- wfdielen = build_nego_resp_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); +- (*len) += wfdielen; +- break; +- } +- case P2P_GO_NEGO_CONF: +- { +- wfdielen = build_nego_confirm_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); +- (*len) += wfdielen; +- break; +- } +- case P2P_INVIT_REQ: +- { +- wfdielen = build_invitation_req_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); +- (*len) += wfdielen; +- break; +- } +- case P2P_INVIT_RESP: +- { +- wfdielen = build_invitation_resp_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); +- (*len) += wfdielen; +- break; +- } +- case P2P_DEVDISC_REQ: +- break; +- case P2P_DEVDISC_RESP: +- +- break; +- case P2P_PROVISION_DISC_REQ: +- { +- wfdielen = build_provdisc_req_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); +- (*len) += wfdielen; +- break; +- } +- case P2P_PROVISION_DISC_RESP: +- { +- wfdielen = build_provdisc_resp_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); +- (*len) += wfdielen; +- break; +- } +- default: + +- break; ++ switch (OUI_Subtype) { ++ case P2P_GO_NEGO_REQ: ++ wfdielen = build_nego_req_wfd_ie(wdinfo, frame_tail); ++ break; ++ case P2P_GO_NEGO_RESP: ++ wfdielen = build_nego_resp_wfd_ie(wdinfo, frame_tail); ++ break; ++ case P2P_GO_NEGO_CONF: ++ wfdielen = build_nego_confirm_wfd_ie(wdinfo, frame_tail); ++ break; ++ case P2P_INVIT_REQ: ++ wfdielen = build_invitation_req_wfd_ie(wdinfo, frame_tail); ++ break; ++ case P2P_INVIT_RESP: ++ wfdielen = build_invitation_resp_wfd_ie(wdinfo, frame_tail); ++ break; ++ case P2P_PROVISION_DISC_REQ: ++ wfdielen = build_provdisc_req_wfd_ie(wdinfo, frame_tail); ++ break; ++ case P2P_PROVISION_DISC_RESP: ++ wfdielen = build_provdisc_resp_wfd_ie(wdinfo, frame_tail); ++ break; ++ case P2P_DEVDISC_REQ: ++ case P2P_DEVDISC_RESP: ++ default: ++ break; + } + + } +- +- } +- else if(category == RTW_WLAN_CATEGORY_P2P) +- { ++ } else if (category == RTW_WLAN_CATEGORY_P2P) { + OUI_Subtype = frame_body[5]; + dialogToken = frame_body[6]; + +-#ifdef CONFIG_DEBUG_CFG80211 +- DBG_871X("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", +- cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); +-#endif ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n" ++ , cpu_to_be32(*((u32 *)(frame_body + 1))), OUI_Subtype, dialogToken); ++ #endif + +- switch(OUI_Subtype) +- { +- case P2P_NOTICE_OF_ABSENCE: ++ switch (OUI_Subtype) { ++ case P2P_NOTICE_OF_ABSENCE: ++ break; ++ case P2P_PRESENCE_REQUEST: ++ break; ++ case P2P_PRESENCE_RESPONSE: ++ break; ++ case P2P_GO_DISC_REQUEST: ++ break; ++ default: ++ break; ++ } ++ } else { ++ DBG_871X("%s, action frame category=%d\n", __func__, category); ++ } + +- break; +- case P2P_PRESENCE_REQUEST: ++ xframe->attrib.pktlen += wfdielen; + +- break; +- case P2P_PRESENCE_RESPONSE: ++ return wfdielen; ++} ++#endif /* CONFIG_WFD */ + +- break; +- case P2P_GO_DISC_REQUEST: ++bool rtw_xframe_del_wfd_ie(struct xmit_frame *xframe) ++{ ++#define DBG_XFRAME_DEL_WFD_IE 0 + +- break; +- default: ++ _adapter *adapter = xframe->padapter; ++ u8 *frame = xframe->buf_addr + TXDESC_OFFSET; ++ u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr); ++ u8 *frame_tail = frame + xframe->attrib.pktlen; ++ u8 category, action, OUI_Subtype; ++ u8 *ies = NULL; ++ uint ies_len_ori = 0; ++ uint ies_len = 0; + +- break; +- } ++ category = frame_body[0]; ++ if (category == RTW_WLAN_CATEGORY_PUBLIC) { ++ action = frame_body[1]; ++ if (action == ACT_PUBLIC_VENDOR ++ && _rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE ++ ) { ++ OUI_Subtype = frame_body[6]; + +- } +- else +- { +- DBG_871X("%s, action frame category=%d\n", __func__, category); +- //is_p2p_frame = (-1); ++ switch (OUI_Subtype) { ++ case P2P_GO_NEGO_REQ: ++ case P2P_GO_NEGO_RESP: ++ case P2P_GO_NEGO_CONF: ++ case P2P_INVIT_REQ: ++ case P2P_INVIT_RESP: ++ case P2P_PROVISION_DISC_REQ: ++ case P2P_PROVISION_DISC_RESP: ++ ies = frame_body + 8; ++ ies_len_ori = frame_tail - (frame_body + 8); ++ break; ++ } ++ } + } + +- return; ++ if (ies && ies_len_ori) { ++ ies_len = rtw_del_wfd_ie(ies, ies_len_ori, DBG_XFRAME_DEL_WFD_IE ? __func__ : NULL); ++ xframe->attrib.pktlen -= (ies_len_ori - ies_len); ++ } ++ ++ return ies_len_ori != ies_len; + } ++ ++/* ++* rtw_xframe_chk_wfd_ie - ++* ++*/ ++void rtw_xframe_chk_wfd_ie(struct xmit_frame *xframe) ++{ ++ _adapter *adapter = xframe->padapter; ++ u8 *frame = xframe->buf_addr + TXDESC_OFFSET; ++ u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr); ++ u8 *frame_tail = frame + xframe->attrib.pktlen; ++ ++ struct wifidirect_info *wdinfo = &adapter->wdinfo; ++ struct mlme_priv *mlme = &adapter->mlmepriv; ++ u8 build = 0; ++ u8 del = 0; ++ ++ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) ++ del = 1; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if (_TRUE == wdinfo->wfd_info->wfd_enable) + #endif ++ del = build = 1; ++ ++ if (del) ++ rtw_xframe_del_wfd_ie(xframe); ++ ++#ifdef CONFIG_WFD ++ if (build) ++ rtw_xframe_build_wfd_ie(xframe); ++#endif ++} + + u8 *dump_p2p_attr_ch_list(u8 *p2p_ie, uint p2p_ielen, u8 *buf, u32 buf_len) + { +@@ -4099,8 +4152,8 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) + //pwdev_priv->provdisc_req_issued = _FALSE; + + #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) +- if(check_buddy_fwstate(padapter, _FW_LINKED)) +- rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); ++ if (check_buddy_fwstate(padapter , _FW_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) ++ rtw_cfg80211_adjust_p2pie_channel(padapter , frame_body , len-sizeof(struct rtw_ieee80211_hdr_3addr)); + #endif + } + +@@ -4123,13 +4176,14 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) + nego_info->state = 0; + + dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); +- DBG_871X("RTW_%s:P2P_GO_NEGO_REQ, dialogToken=%d, intent:%u%s, listen_ch:%d, op_ch:%d, ch_list:%s\n", +- (tx==_TRUE)?"Tx":"Rx", dialogToken, (intent>>1), intent&0x1 ? "+" : "-", listen_ch, op_ch, ch_list_buf); ++ DBG_871X("RTW_%s:P2P_GO_NEGO_REQ, dialogToken=%d, intent:%u%s, listen_ch:%d, op_ch:%d, ch_list:%s, full_ch_in_p2p_handshake:%d\n" , ++ (tx == _TRUE)?"Tx":"Rx" , dialogToken , (intent>>1) , intent&0x1 ? "+" : "-" , listen_ch , op_ch , ch_list_buf , padapter->registrypriv.full_ch_in_p2p_handshake); + + if (!tx) { + #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) +- if(check_buddy_fwstate(padapter, _FW_LINKED) +- && rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) ++ if (check_buddy_fwstate(padapter, _FW_LINKED) ++ && rtw_chk_p2pie_ch_list_with_buddy(padapter , frame_body , len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + DBG_871X(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter)); + rtw_change_p2pie_ch_list(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr), 0); +@@ -4145,8 +4199,8 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) + + if (tx) { + #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) +- if(check_buddy_fwstate(padapter, _FW_LINKED)) +- rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); ++ if (check_buddy_fwstate(padapter , _FW_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) ++ rtw_cfg80211_adjust_p2pie_channel(padapter , frame_body , len-sizeof(struct rtw_ieee80211_hdr_3addr)); + #endif + } + +@@ -4175,8 +4229,9 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) + if (!tx) { + pwdev_priv->provdisc_req_issued = _FALSE; + #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) +- if(check_buddy_fwstate(padapter, _FW_LINKED) +- && rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) ++ if (check_buddy_fwstate(padapter, _FW_LINKED) ++ && rtw_chk_p2pie_ch_list_with_buddy(padapter , frame_body , len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + { + DBG_871X(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter)); + rtw_change_p2pie_ch_list(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr), 0); +@@ -4193,7 +4248,7 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) + + if (tx) { + #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) +- if(check_buddy_fwstate(padapter, _FW_LINKED)) ++ if (check_buddy_fwstate(padapter, _FW_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); + #endif + } +@@ -4234,7 +4289,8 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) + + if (tx) { + #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) +- if(check_buddy_fwstate(padapter, _FW_LINKED)) ++ if (check_buddy_fwstate(padapter, _FW_LINKED) ++ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); + #endif + } +@@ -4260,7 +4316,7 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) + + if (!tx) { + #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) +- if(check_buddy_fwstate(padapter, _FW_LINKED)) { ++ if (check_buddy_fwstate(padapter , _FW_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) { + if (op_ch != -1 && rtw_chk_p2pie_op_ch_with_buddy(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) { + DBG_871X(FUNC_ADPT_FMT" op_ch:%u has no intersect with buddy\n", FUNC_ADPT_ARG(padapter), op_ch); + rtw_change_p2pie_ch_list(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr), 0); +@@ -4280,7 +4336,7 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) + + if (tx) { + #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) +- if(check_buddy_fwstate(padapter, _FW_LINKED)) ++ if (check_buddy_fwstate(padapter , _FW_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) + rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); + #endif + } +@@ -4505,6 +4561,46 @@ _func_enter_; + _func_exit_; + } + ++int process_p2p_cross_connect_ie(PADAPTER padapter, u8 *IEs, u32 IELength) ++{ ++ int ret = _TRUE; ++ u8 * ies; ++ u32 ies_len; ++ u8 * p2p_ie; ++ u32 p2p_ielen = 0; ++ u8 p2p_attr[MAX_P2P_IE_LEN] = { 0x00 };// NoA length should be n*(13) + 2 ++ u32 attr_contentlen = 0; ++ ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++_func_enter_; ++ ++ if(IELength <= _BEACON_IE_OFFSET_) ++ return ret; ++ ++ ies = IEs + _BEACON_IE_OFFSET_; ++ ies_len = IELength - _BEACON_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen); ++ ++ while(p2p_ie) ++ { ++ // Get P2P Manageability IE. ++ if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_MANAGEABILITY, p2p_attr, &attr_contentlen)) ++ { ++ if ((p2p_attr[0]&(BIT(0)|BIT(1))) == 0x01) { ++ ret = _FALSE; ++ } ++ break; ++ } ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ } ++ ++_func_exit_; ++ return ret; ++} ++ + #ifdef CONFIG_P2P_PS + void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength) + { +@@ -4868,7 +4964,7 @@ void reset_global_wifidirect_info( _adapter* padapter ) + pwdinfo = &padapter->wdinfo; + pwdinfo->persistent_supported = 0; + pwdinfo->session_available = _TRUE; +- pwdinfo->wfd_tdls_enable = 0; ++ rtw_tdls_wfd_enable(padapter, 0); + pwdinfo->wfd_tdls_weaksec = _TRUE; + } + +@@ -4879,7 +4975,13 @@ int rtw_init_wifi_display_info(_adapter* padapter) + struct wifi_display_info *pwfd_info = &padapter->wfd_info; + + // Used in P2P and TDLS +- pwfd_info->rtsp_ctrlport = 554; ++ pwfd_info->init_rtsp_ctrlport = 554; ++#ifdef CONFIG_IOCTL_CFG80211 ++ pwfd_info->rtsp_ctrlport = 0; ++#else ++ pwfd_info->rtsp_ctrlport = pwfd_info->init_rtsp_ctrlport; /* set non-zero value for legacy wfd */ ++#endif ++ pwfd_info->tdls_rtsp_ctrlport = 0; + pwfd_info->peer_rtsp_ctrlport = 0; // Reset to 0 + pwfd_info->wfd_enable = _FALSE; + pwfd_info->wfd_device_type = WFD_DEVINFO_PSINK; +@@ -4895,7 +4997,187 @@ int rtw_init_wifi_display_info(_adapter* padapter) + return res; + + } +-#endif //CONFIG_WFD ++ ++inline void rtw_wfd_enable(_adapter *adapter, bool on) ++{ ++ struct wifi_display_info *wfdinfo = &adapter->wfd_info; ++ ++ if (on) { ++ wfdinfo->rtsp_ctrlport = wfdinfo->init_rtsp_ctrlport; ++ wfdinfo->wfd_enable = _TRUE; ++ ++ } else { ++ wfdinfo->wfd_enable = _FALSE; ++ wfdinfo->rtsp_ctrlport = 0; ++ } ++} ++ ++inline void rtw_wfd_set_ctrl_port(_adapter *adapter, u16 port) ++{ ++ struct wifi_display_info *wfdinfo = &adapter->wfd_info; ++ ++ wfdinfo->init_rtsp_ctrlport = port; ++ if (wfdinfo->wfd_enable == _TRUE) ++ wfdinfo->rtsp_ctrlport = port; ++ if (adapter->wdinfo.wfd_tdls_enable == 1) ++ wfdinfo->tdls_rtsp_ctrlport = port; ++} ++ ++inline void rtw_tdls_wfd_enable(_adapter *adapter, bool on) ++{ ++ struct wifi_display_info *wfdinfo = &adapter->wfd_info; ++ ++ if (on) { ++ wfdinfo->tdls_rtsp_ctrlport = wfdinfo->init_rtsp_ctrlport; ++ adapter->wdinfo.wfd_tdls_enable = 1; ++ ++ } else { ++ adapter->wdinfo.wfd_tdls_enable = 0; ++ wfdinfo->tdls_rtsp_ctrlport = 0; ++ } ++} ++ ++u32 rtw_append_beacon_wfd_ie(_adapter *adapter, u8 *pbuf) ++{ ++ struct wifidirect_info *wdinfo = &adapter->wdinfo; ++ struct mlme_priv *mlme = &adapter->mlmepriv; ++ u8 build_ie_by_self = 0; ++ u32 len = 0; ++ ++ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if (_TRUE == wdinfo->wfd_info->wfd_enable) ++#endif ++ build_ie_by_self = 1; ++ ++ if (build_ie_by_self) ++ len = build_beacon_wfd_ie(wdinfo, pbuf); ++#ifdef CONFIG_IOCTL_CFG80211 ++ else if (mlme->wfd_beacon_ie && mlme->wfd_beacon_ie_len > 0) { ++ len = mlme->wfd_beacon_ie_len; ++ _rtw_memcpy(pbuf, mlme->wfd_beacon_ie, len); ++ } ++#endif ++ ++exit: ++ return len; ++} ++ ++u32 rtw_append_probe_req_wfd_ie(_adapter *adapter, u8 *pbuf) ++{ ++ struct wifidirect_info *wdinfo = &adapter->wdinfo; ++ struct mlme_priv *mlme = &adapter->mlmepriv; ++ u8 build_ie_by_self = 0; ++ u32 len = 0; ++ ++ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if (_TRUE == wdinfo->wfd_info->wfd_enable) ++#endif ++ build_ie_by_self = 1; ++ ++ if (build_ie_by_self) ++ len = build_probe_req_wfd_ie(wdinfo, pbuf); ++#ifdef CONFIG_IOCTL_CFG80211 ++ else if (mlme->wfd_probe_req_ie && mlme->wfd_probe_req_ie_len > 0) { ++ len = mlme->wfd_probe_req_ie_len; ++ _rtw_memcpy(pbuf, mlme->wfd_probe_req_ie, len); ++ } ++#endif ++ ++exit: ++ return len; ++} ++ ++u32 rtw_append_probe_resp_wfd_ie(_adapter *adapter, u8 *pbuf) ++{ ++ struct wifidirect_info *wdinfo = &adapter->wdinfo; ++ struct mlme_priv *mlme = &adapter->mlmepriv; ++ u8 build_ie_by_self = 0; ++ u32 len = 0; ++ ++ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if (_TRUE == wdinfo->wfd_info->wfd_enable) ++#endif ++ build_ie_by_self = 1; ++ ++ if (build_ie_by_self) ++ len = build_probe_resp_wfd_ie(wdinfo, pbuf, 0); ++#ifdef CONFIG_IOCTL_CFG80211 ++ else if (mlme->wfd_probe_resp_ie && mlme->wfd_probe_resp_ie_len > 0) { ++ len = mlme->wfd_probe_resp_ie_len; ++ _rtw_memcpy(pbuf, mlme->wfd_probe_resp_ie, len); ++ } ++#endif ++ ++exit: ++ return len; ++} ++ ++u32 rtw_append_assoc_req_wfd_ie(_adapter *adapter, u8 *pbuf) ++{ ++ struct wifidirect_info *wdinfo = &adapter->wdinfo; ++ struct mlme_priv *mlme = &adapter->mlmepriv; ++ u8 build_ie_by_self = 0; ++ u32 len = 0; ++ ++ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if (_TRUE == wdinfo->wfd_info->wfd_enable) ++#endif ++ build_ie_by_self = 1; ++ ++ if (build_ie_by_self) ++ len = build_assoc_req_wfd_ie(wdinfo, pbuf); ++#ifdef CONFIG_IOCTL_CFG80211 ++ else if (mlme->wfd_assoc_req_ie && mlme->wfd_assoc_req_ie_len > 0) { ++ len = mlme->wfd_assoc_req_ie_len; ++ _rtw_memcpy(pbuf, mlme->wfd_assoc_req_ie, len); ++ } ++#endif ++ ++exit: ++ return len; ++} ++ ++u32 rtw_append_assoc_resp_wfd_ie(_adapter *adapter, u8 *pbuf) ++{ ++ struct wifidirect_info *wdinfo = &adapter->wdinfo; ++ struct mlme_priv *mlme = &adapter->mlmepriv; ++ u8 build_ie_by_self = 0; ++ u32 len = 0; ++ ++ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) ++ goto exit; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if (_TRUE == wdinfo->wfd_info->wfd_enable) ++#endif ++ build_ie_by_self = 1; ++ ++ if (build_ie_by_self) ++ len = build_assoc_resp_wfd_ie(wdinfo, pbuf); ++#ifdef CONFIG_IOCTL_CFG80211 ++ else if (mlme->wfd_assoc_resp_ie && mlme->wfd_assoc_resp_ie_len > 0) { ++ len = mlme->wfd_assoc_resp_ie_len; ++ _rtw_memcpy(pbuf, mlme->wfd_assoc_resp_ie, len); ++ } ++#endif ++ ++exit: ++ return len; ++} ++ ++#endif /* CONFIG_WFD */ + + void rtw_init_wifidirect_timers(_adapter* padapter) + { +@@ -5278,7 +5560,8 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) + + rtw_hal_set_odm_var(padapter,HAL_ODM_P2P_STATE,NULL,_TRUE); + #ifdef CONFIG_WFD +- rtw_hal_set_odm_var(padapter,HAL_ODM_WIFI_DISPLAY_STATE,NULL,_TRUE); ++ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ rtw_hal_set_odm_var(padapter, HAL_ODM_WIFI_DISPLAY_STATE, NULL, _TRUE); + #endif + + } +@@ -5320,7 +5603,8 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) + + rtw_hal_set_odm_var(padapter,HAL_ODM_P2P_STATE,NULL,_FALSE); + #ifdef CONFIG_WFD +- rtw_hal_set_odm_var(padapter,HAL_ODM_WIFI_DISPLAY_STATE,NULL,_FALSE); ++ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ rtw_hal_set_odm_var(padapter, HAL_ODM_WIFI_DISPLAY_STATE, NULL, _FALSE); + #endif + + if (_FAIL == rtw_pwr_wakeup(padapter)) { +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_pwrctrl.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_pwrctrl.c +old mode 100755 +new mode 100644 +index 0a16ad5..2f0b700 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_pwrctrl.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_pwrctrl.c +@@ -38,10 +38,11 @@ int rtw_fw_ps_state(PADAPTER padapter) + + _enter_pwrlock(&pwrpriv->check_32k_lock); + +- if ((padapter->bSurpriseRemoved == _TRUE)) +- { +- DBG_871X("%s: bSurpriseRemoved=%d , hw_init_completed=%d, bDriverStopped=%d \n", __FUNCTION__, padapter->bSurpriseRemoved, +- padapter->hw_init_completed,padapter->bDriverStopped); ++ if (RTW_CANNOT_RUN(padapter)) { ++ DBG_871X("%s: bSurpriseRemoved=%s , hw_init_completed=%d, bDriverStopped=%s\n", __func__ ++ , rtw_is_surprise_removed(padapter)?"True":"False" ++ , rtw_get_hw_init_completed(padapter) ++ , rtw_is_drv_stopped(padapter)?"True":"False"); + goto exit_fw_ps_state; + } + rtw_hal_set_hwreg(padapter, HW_VAR_SET_REQ_FW_PS, (u8 *)&dont_care); +@@ -210,7 +211,7 @@ bool rtw_pwr_unassociated_idle(_adapter *adapter) + || check_fwstate(pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) + || check_fwstate(pmlmepriv, WIFI_AP_STATE) + || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) +- #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_P2P_IPS) ++ #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) + || pcfg80211_wdinfo->is_ro_ch + #elif defined(CONFIG_P2P) + || !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) +@@ -236,7 +237,7 @@ bool rtw_pwr_unassociated_idle(_adapter *adapter) + || check_fwstate(b_pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) + || check_fwstate(b_pmlmepriv, WIFI_AP_STATE) + || check_fwstate(b_pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) +- #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_P2P_IPS) ++ #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) + || b_pcfg80211_wdinfo->is_ro_ch + #elif defined(CONFIG_P2P) + || !rtw_p2p_chk_state(b_pwdinfo, P2P_STATE_NONE) +@@ -354,7 +355,6 @@ void rtw_ps_processor(_adapter*padapter) + { + pwrpriv->change_rfpwrstate = rf_off; + pwrpriv->brfoffbyhw = _TRUE; +- padapter->bCardDisableWOHSM = _TRUE; + rtw_hw_suspend(padapter ); + } + else +@@ -396,12 +396,10 @@ void rtw_ps_processor(_adapter*padapter) + DBG_871X("<==%s .pwrpriv->bInternalAutoSuspend)(%x)\n",__FUNCTION__,pwrpriv->bInternalAutoSuspend); + } else { + pwrpriv->change_rfpwrstate = rf_off; +- padapter->bCardDisableWOHSM = _TRUE; + DBG_871X("<==%s .pwrpriv->bInternalAutoSuspend)(%x) call autosuspend_enter\n",__FUNCTION__,pwrpriv->bInternalAutoSuspend); + autosuspend_enter(padapter); + } + #else +- padapter->bCardDisableWOHSM = _TRUE; + autosuspend_enter(padapter); + #endif //if defined (CONFIG_BT_COEXIST)&& defined (CONFIG_AUTOSUSPEND) + } +@@ -532,10 +530,8 @@ _func_enter_; + { + if ( (pwrpriv->rpwm == pslv) + #ifdef CONFIG_LPS_LCLK +-#ifndef CONFIG_RTL8723A + || ((pwrpriv->rpwm >= PS_STATE_S2)&&(pslv >= PS_STATE_S2)) + #endif +-#endif + ) + { + RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_, +@@ -544,20 +540,21 @@ _func_enter_; + } + } + +- if ((padapter->bSurpriseRemoved == _TRUE) || +- (padapter->hw_init_completed == _FALSE)) ++ if (rtw_is_surprise_removed(padapter) || ++ (!rtw_is_hw_init_completed(padapter))) + { + RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, +- ("%s: SurpriseRemoved(%d) hw_init_completed(%d)\n", +- __FUNCTION__, padapter->bSurpriseRemoved, padapter->hw_init_completed)); ++ ("%s: SurpriseRemoved(%s) hw_init_completed(%s)\n" ++ , __func__ ++ , rtw_is_surprise_removed(padapter)?"True":"False" ++ , rtw_is_hw_init_completed(padapter)?"True":"False")); + + pwrpriv->cpwm = PS_STATE_S4; + + return; + } + +- if (padapter->bDriverStopped == _TRUE) +- { ++ if (rtw_is_drv_stopped(padapter)) { + RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, + ("%s: change power state(0x%02X) when DriverStopped\n", __FUNCTION__, pslv)); + +@@ -610,14 +607,11 @@ _func_enter_; + do { + rtw_msleep_os(1); + poll_cnt++; ++ cpwm_now = 0; + rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now); + if ((cpwm_orig ^ cpwm_now) & 0x80) + { +-#ifdef CONFIG_RTL8723A +- pwrpriv->cpwm = PS_STATE(cpwm_now); +-#else // !CONFIG_RTL8723A + pwrpriv->cpwm = PS_STATE_S4; +-#endif // !CONFIG_RTL8723A + pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE; + #ifdef DBG_CHECK_FW_PS_STATE + DBG_871X("%s: polling cpwm OK! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x , 0x100=0x%x\n" +@@ -695,7 +689,7 @@ u8 PS_RDY_CHECK(_adapter * padapter) + || check_fwstate(pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) + || check_fwstate(pmlmepriv, WIFI_AP_STATE) + || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) +- #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_P2P_IPS) ++ #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) + || pcfg80211_wdinfo->is_ro_ch + #elif defined(CONFIG_P2P) + || !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) +@@ -722,15 +716,14 @@ u8 PS_RDY_CHECK(_adapter * padapter) + return _TRUE; + } + +-#if defined(CONFIG_FWLPS_IN_IPS) && defined(CONFIG_PNO_SUPPORT) ++#if defined(CONFIG_FWLPS_IN_IPS) + void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable) + { +- struct hal_ops *pHalFunc = &padapter->HalFunc; + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + int cnt=0; + u32 start_time; + u8 val8 = 0; +- u8 cpwm_orig, cpwm_now; ++ u8 cpwm_orig = 0, cpwm_now = 0; + u8 parm[H2C_INACTIVE_PS_LEN]={0}; + + if (padapter->netif_up == _FALSE) { +@@ -738,23 +731,25 @@ void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable) + return; + } + +- if (pHalFunc->fill_h2c_cmd == NULL) { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- return; +- } +- + //u8 cmd_param; //BIT0:enable, BIT1:NoConnect32k + if (enable) { +- + #ifdef CONFIG_BT_COEXIST + rtw_btcoex_IpsNotify(padapter, pwrpriv->ips_mode_req); + #endif + //Enter IPS + DBG_871X("%s: issue H2C to FW when entering IPS\n", __func__); ++ ++#ifdef CONFIG_PNO_SUPPORT ++ parm[0] = 0x03; ++ parm[1] = pwrpriv->pnlo_info->fast_scan_iterations; ++ parm[2] = pwrpriv->pnlo_info->slow_scan_period; ++#else + parm[0] = 0x03; +- parm[1] = 0x01; +- parm[2] = 0x01; +- pHalFunc->fill_h2c_cmd(padapter, //H2C_FWLPS_IN_IPS_, ++ parm[1] = 0x0; ++ parm[2] = 0x0; ++#endif//CONFIG_PNO_SUPPORT ++ ++ rtw_hal_fill_h2c_cmd(padapter, //H2C_FWLPS_IN_IPS_, + H2C_INACTIVE_PS_, + H2C_INACTIVE_PS_LEN, parm); + //poll 0x1cc to make sure H2C command already finished by FW; MAC_0x1cc=0 means H2C done by FW. +@@ -777,33 +772,18 @@ void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable) + DBG_871X("%s: write rpwm=%02x\n", __FUNCTION__, val8); + adapter_to_pwrctl(padapter)->tog = (val8 + 0x80) & 0x80; + cnt = val8 = 0; +- do { +- val8 = rtw_read8(padapter, REG_CR); +- cnt++; +- DBG_871X("%s polling 0x100=0x%x, cnt=%d \n", +- __func__, val8, cnt); +- DBG_871X("%s 0x08:%02x, 0x03:%02x\n", +- __func__, +- rtw_read8(padapter, 0x08), +- rtw_read8(padapter, 0x03)); +- rtw_mdelay_os(10); +- } while(cnt<20 && (val8!=0xEA)); +-#ifdef DBG_CHECK_FW_PS_STATE +- if(val8 != 0xEA) { +- DBG_871X("MAC_1B8=0x%08x\n", +- rtw_read32(padapter, 0x1b8)); +- DBG_871X("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n", +- rtw_read32(padapter, 0x1c0), +- rtw_read32(padapter, 0x1c4), +- rtw_read32(padapter, 0x1c8), +- rtw_read32(padapter, 0x1cc)); +-#endif //DBG_CHECK_FW_PS_STATE +- } else { +- DBG_871X("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n", +- rtw_read32(padapter, 0x1c0), +- rtw_read32(padapter, 0x1c4), +- rtw_read32(padapter, 0x1c8), +- rtw_read32(padapter, 0x1cc)); ++ if (parm[1] == 0 || parm[2] == 0) { ++ do { ++ val8 = rtw_read8(padapter, REG_CR); ++ cnt++; ++ DBG_871X("%s polling 0x100=0x%x, cnt=%d \n", ++ __func__, val8, cnt); ++ DBG_871X("%s 0x08:%02x, 0x03:%02x\n", ++ __func__, ++ rtw_read8(padapter, 0x08), ++ rtw_read8(padapter, 0x03)); ++ rtw_mdelay_os(10); ++ } while(cnt<20 && (val8!=0xEA)); + } + } + } else { +@@ -831,10 +811,6 @@ void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable) + + rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now); + if ((cpwm_orig ^ cpwm_now) & 0x80) { +-#ifdef DBG_CHECK_FW_PS_STATE +- DBG_871X("%s: polling cpwm ok when leaving IPS in FWLPS state, cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x \n" +- , __FUNCTION__, cpwm_orig, cpwm_now, rtw_read8(padapter, REG_CR)); +-#endif //DBG_CHECK_FW_PS_STATE + break; + } + +@@ -848,7 +824,7 @@ void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable) + parm[0] = 0x0; + parm[1] = 0x0; + parm[2] = 0x0; +- pHalFunc->fill_h2c_cmd(padapter, H2C_INACTIVE_PS_, ++ rtw_hal_fill_h2c_cmd(padapter, H2C_INACTIVE_PS_, + H2C_INACTIVE_PS_LEN, parm); + #ifdef CONFIG_BT_COEXIST + rtw_btcoex_IpsNotify(padapter, IPS_NONE); +@@ -924,9 +900,11 @@ _func_enter_; + DBG_871X(FUNC_ADPT_FMT" Leave 802.11 power save - %s\n", + FUNC_ADPT_ARG(padapter), msg); + ++ if (pwrpriv->lps_leave_cnts < UINT_MAX) ++ pwrpriv->lps_leave_cnts++; ++ else ++ pwrpriv->lps_leave_cnts = 0; + #ifdef CONFIG_TDLS +- _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); +- + for(i=0; i< NUM_STA; i++) + { + phead = &(pstapriv->sta_hash[i]); +@@ -941,8 +919,6 @@ _func_enter_; + plist = get_next(plist); + } + } +- +- _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); + #endif //CONFIG_TDLS + + pwrpriv->pwr_mode = ps_mode; +@@ -999,9 +975,11 @@ _func_enter_; + DBG_871X(FUNC_ADPT_FMT" Enter 802.11 power save - %s\n", + FUNC_ADPT_ARG(padapter), msg); + ++ if (pwrpriv->lps_enter_cnts < UINT_MAX) ++ pwrpriv->lps_enter_cnts++; ++ else ++ pwrpriv->lps_enter_cnts = 0; + #ifdef CONFIG_TDLS +- _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); +- + for(i=0; i< NUM_STA; i++) + { + phead = &(pstapriv->sta_hash[i]); +@@ -1016,8 +994,6 @@ _func_enter_; + plist = get_next(plist); + } + } +- +- _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); + #endif //CONFIG_TDLS + + #ifdef CONFIG_BT_COEXIST +@@ -1052,19 +1028,6 @@ _func_enter_; + if (val8 & BIT(4)) + pslv = PS_STATE_S2; + +-#ifdef CONFIG_RTL8723A +- val8 = rtw_btcoex_RpwmVal(padapter); +- switch (val8) +- { +- case 0x4: +- pslv = PS_STATE_S3; +- break; +- +- case 0xC: +- pslv = PS_STATE_S4; +- break; +- } +-#endif // CONFIG_RTL8723A + } + #endif // CONFIG_BT_COEXIST + +@@ -1099,8 +1062,7 @@ s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms) + if (_TRUE == bAwake) + break; + +- if (_TRUE == padapter->bSurpriseRemoved) +- { ++ if (rtw_is_surprise_removed(padapter)) { + err = -2; + DBG_871X("%s: device surprise removed!!\n", __FUNCTION__); + break; +@@ -1252,10 +1214,8 @@ _func_enter_; + + DBG_871X("%s.....\n",__FUNCTION__); + +- if (_TRUE == Adapter->bSurpriseRemoved) +- { +- DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=%d Skip!\n", +- FUNC_ADPT_ARG(Adapter), Adapter->bSurpriseRemoved); ++ if (rtw_is_surprise_removed(Adapter)) { ++ DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=_TRUE Skip!\n", FUNC_ADPT_ARG(Adapter)); + return; + } + +@@ -1291,11 +1251,7 @@ _func_enter_; + rtw_hal_get_hwreg(Adapter, HW_VAR_CPWM, &cpwm_now); + if ((cpwm_orig ^ cpwm_now) & 0x80) + { +-#ifdef CONFIG_RTL8723A +- pwrpriv->cpwm = PS_STATE(cpwm_now); +-#else // !CONFIG_RTL8723A + pwrpriv->cpwm = PS_STATE_S4; +-#endif // !CONFIG_RTL8723A + pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE; + #ifdef DBG_CHECK_FW_PS_STATE + DBG_871X("%s: polling cpwm OK! cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x \n" +@@ -1389,10 +1345,8 @@ _func_enter_; + return; + } + +- if (_TRUE == Adapter->bSurpriseRemoved) +- { +- DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=%d Skip!\n", +- FUNC_ADPT_ARG(Adapter), Adapter->bSurpriseRemoved); ++ if (rtw_is_surprise_removed(Adapter)) { ++ DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=_TRUE Skip!\n", FUNC_ADPT_ARG(Adapter)); + return; + } + +@@ -1471,10 +1425,10 @@ _func_enter_; + { + _enter_pwrlock(&pwrpriv->lock); + +- if ((padapter->bSurpriseRemoved == _TRUE) +- || (padapter->hw_init_completed == _FALSE) ++ if (rtw_is_surprise_removed(padapter) ++ || (!rtw_is_hw_init_completed(padapter)) + #ifdef CONFIG_USB_HCI +- || (padapter->bDriverStopped== _TRUE) ++ || rtw_is_drv_stopped(padapter) + #endif + || (pwrpriv->pwr_mode == PS_MODE_ACTIVE) + ) +@@ -1559,7 +1513,7 @@ static void cpwm_event_callback(struct work_struct *work) + { + struct pwrctrl_priv *pwrpriv = container_of(work, struct pwrctrl_priv, cpwm_event); + struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); +- _adapter *adapter = dvobj->if1; ++ _adapter *adapter = dvobj->padapters[IFACE_ID0]; + struct reportpwrstate_parm report; + + //DBG_871X("%s\n",__FUNCTION__); +@@ -1578,7 +1532,7 @@ static void rpwmtimeout_workitem_callback(struct work_struct *work) + + pwrpriv = container_of(work, struct pwrctrl_priv, rpwmtimeoutwi); + dvobj = pwrctl_to_dvobj(pwrpriv); +- padapter = dvobj->if1; ++ padapter = dvobj->padapters[IFACE_ID0]; + // DBG_871X("+%s: rpwm=0x%02X cpwm=0x%02X\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); + + _enter_pwrlock(&pwrpriv->lock); +@@ -1680,24 +1634,6 @@ _func_enter_; + pwrctrl = adapter_to_pwrctl(padapter); + pslv = PS_STATE_S2; + +-#if defined(CONFIG_RTL8723A) && defined(CONFIG_BT_COEXIST) +- if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) +- { +- u8 btcoex_rpwm; +- btcoex_rpwm = rtw_btcoex_RpwmVal(padapter); +- switch (btcoex_rpwm) +- { +- case 0x4: +- pslv = PS_STATE_S3; +- break; +- +- case 0xC: +- pslv = PS_STATE_S4; +- break; +- } +- } +-#endif // CONFIG_RTL8723A & CONFIG_BT_COEXIST +- + _enter_pwrlock(&pwrctrl->lock); + + register_task_alive(pwrctrl, task); +@@ -1762,19 +1698,6 @@ _func_enter_; + if (val8 & BIT(4)) + pslv = PS_STATE_S2; + +-#ifdef CONFIG_RTL8723A +- val8 = rtw_btcoex_RpwmVal(padapter); +- switch (val8) +- { +- case 0x4: +- pslv = PS_STATE_S3; +- break; +- +- case 0xC: +- pslv = PS_STATE_S4; +- break; +- } +-#endif // CONFIG_RTL8723A + } + #endif // CONFIG_BT_COEXIST + +@@ -1826,24 +1749,6 @@ _func_enter_; + pwrctrl = adapter_to_pwrctl(padapter); + pslv = PS_STATE_S2; + +-#if defined(CONFIG_RTL8723A) && defined(CONFIG_BT_COEXIST) +- if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) +- { +- u8 btcoex_rpwm; +- btcoex_rpwm = rtw_btcoex_RpwmVal(padapter); +- switch (btcoex_rpwm) +- { +- case 0x4: +- pslv = PS_STATE_S3; +- break; +- +- case 0xC: +- pslv = PS_STATE_S4; +- break; +- } +- } +-#endif // CONFIG_RTL8723A & CONFIG_BT_COEXIST +- + _enter_pwrlock(&pwrctrl->lock); + + register_task_alive(pwrctrl, XMIT_ALIVE); +@@ -1903,24 +1808,6 @@ _func_enter_; + pwrctrl = adapter_to_pwrctl(padapter); + pslv = PS_STATE_S2; + +-#if defined(CONFIG_RTL8723A) && defined(CONFIG_BT_COEXIST) +- if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) +- { +- u8 btcoex_rpwm; +- btcoex_rpwm = rtw_btcoex_RpwmVal(padapter); +- switch (btcoex_rpwm) +- { +- case 0x4: +- pslv = PS_STATE_S3; +- break; +- +- case 0xC: +- pslv = PS_STATE_S4; +- break; +- } +- } +-#endif // CONFIG_RTL8723A & CONFIG_BT_COEXIST +- + _enter_pwrlock(&pwrctrl->lock); + + register_task_alive(pwrctrl, CMD_ALIVE); +@@ -2044,19 +1931,6 @@ _func_enter_; + if (val8 & BIT(4)) + pslv = PS_STATE_S2; + +-#ifdef CONFIG_RTL8723A +- val8 = rtw_btcoex_RpwmVal(padapter); +- switch (val8) +- { +- case 0x4: +- pslv = PS_STATE_S3; +- break; +- +- case 0xC: +- pslv = PS_STATE_S4; +- break; +- } +-#endif // CONFIG_RTL8723A + } + #endif // CONFIG_BT_COEXIST + +@@ -2124,19 +1998,6 @@ _func_enter_; + if (val8 & BIT(4)) + pslv = PS_STATE_S2; + +-#ifdef CONFIG_RTL8723A +- val8 = rtw_btcoex_RpwmVal(padapter); +- switch (val8) +- { +- case 0x4: +- pslv = PS_STATE_S3; +- break; +- +- case 0xC: +- pslv = PS_STATE_S4; +- break; +- } +-#endif // CONFIG_RTL8723A + } + #endif // CONFIG_BT_COEXIST + +@@ -2228,6 +2089,8 @@ static void resume_workitem_callback(struct work_struct *work); + void rtw_init_pwrctrl_priv(PADAPTER padapter) + { + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); ++ int i = 0; ++ u8 val8 = 0; + + #if defined(CONFIG_CONCURRENT_MODE) + if (padapter->adapter_type != PRIMARY_ADAPTER) +@@ -2245,6 +2108,8 @@ _func_enter_; + pwrctrlpriv->rf_pwrstate = rf_on; + pwrctrlpriv->ips_enter_cnts=0; + pwrctrlpriv->ips_leave_cnts=0; ++ pwrctrlpriv->lps_enter_cnts=0; ++ pwrctrlpriv->lps_leave_cnts=0; + pwrctrlpriv->bips_processing = _FALSE; + + pwrctrlpriv->ips_mode = padapter->registrypriv.ips_mode; +@@ -2310,16 +2175,34 @@ _func_enter_; + rtw_register_early_suspend(pwrctrlpriv); + #endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER + ++#ifdef CONFIG_GPIO_WAKEUP ++ /*default low active*/ ++ pwrctrlpriv->is_high_active = HIGH_ACTIVE; ++ val8 = (pwrctrlpriv->is_high_active == 0) ? 1 : 0; ++ rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _TRUE); ++ rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, val8); ++ DBG_871X("%s: set GPIO_%d %d as default.\n", ++ __func__, WAKEUP_GPIO_IDX, val8); ++#endif /* CONFIG_GPIO_WAKEUP */ ++ + #ifdef CONFIG_WOWLAN +- pwrctrlpriv->wowlan_from_cmd = _FALSE; +-#endif ++ pwrctrlpriv->wowlan_pattern_idx = 0; ++ for (i = 0 ; i < MAX_WKFM_NUM; i++) { ++ _rtw_memset(pwrctrlpriv->patterns[i].content, '\0', ++ sizeof(pwrctrlpriv->patterns[i].content)); ++ _rtw_memset(pwrctrlpriv->patterns[i].mask, '\0', ++ sizeof(pwrctrlpriv->patterns[i].mask)); ++ pwrctrlpriv->patterns[i].len = 0; ++ } ++ + #ifdef CONFIG_PNO_SUPPORT + pwrctrlpriv->pno_inited = _FALSE; + pwrctrlpriv->pnlo_info = NULL; + pwrctrlpriv->pscan_info = NULL; + pwrctrlpriv->pno_ssid_list = NULL; + pwrctrlpriv->pno_in_resume = _TRUE; +-#endif ++#endif /* CONFIG_PNO_SUPPORT */ ++#endif /* CONFIG_WOWLAN */ + + _func_exit_; + +@@ -2347,6 +2230,7 @@ _func_enter_; + } + #endif + ++#ifdef CONFIG_WOWLAN + #ifdef CONFIG_PNO_SUPPORT + if (pwrctrlpriv->pnlo_info != NULL) + printk("****** pnlo_info memory leak********\n"); +@@ -2357,6 +2241,7 @@ _func_enter_; + if (pwrctrlpriv->pno_ssid_list != NULL) + printk("****** pno_ssid_list memory leak********\n"); + #endif ++#endif /* CONFIG_WOWLAN */ + + #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) + rtw_unregister_early_suspend(pwrctrlpriv); +@@ -2375,7 +2260,7 @@ static void resume_workitem_callback(struct work_struct *work) + { + struct pwrctrl_priv *pwrpriv = container_of(work, struct pwrctrl_priv, resume_work); + struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); +- _adapter *adapter = dvobj->if1; ++ _adapter *adapter = dvobj->padapters[IFACE_ID0]; + + DBG_871X("%s\n",__FUNCTION__); + +@@ -2430,7 +2315,7 @@ static void rtw_late_resume(struct early_suspend *h) + { + struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); + struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); +- _adapter *adapter = dvobj->if1; ++ _adapter *adapter = dvobj->padapters[IFACE_ID0]; + + DBG_871X("%s\n",__FUNCTION__); + +@@ -2483,7 +2368,7 @@ static void rtw_late_resume(android_early_suspend_t *h) + { + struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); + struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); +- _adapter *adapter = dvobj->if1; ++ _adapter *adapter = dvobj->padapters[IFACE_ID0]; + + DBG_871X("%s\n",__FUNCTION__); + if(pwrpriv->do_late_resume) { +@@ -2672,15 +2557,15 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller) + } + + //TODO: the following checking need to be merged... +- if(padapter->bDriverStopped ++ if (rtw_is_drv_stopped(padapter) + || !padapter->bup +- || !padapter->hw_init_completed +- ){ +- DBG_8192C("%s: bDriverStopped=%d, bup=%d, hw_init_completed=%u\n" ++ || !rtw_is_hw_init_completed(padapter) ++ ) { ++ DBG_8192C("%s: bDriverStopped=%s, bup=%d, hw_init_completed=%u\n" + , caller +- , padapter->bDriverStopped +- , padapter->bup +- , padapter->hw_init_completed); ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , padapter->bup ++ , rtw_get_hw_init_completed(padapter)); + ret= _FALSE; + goto exit; + } +@@ -2733,7 +2618,7 @@ int rtw_pm_set_ips(_adapter *padapter, u8 mode) + else if(mode ==IPS_NONE){ + rtw_ips_mode_req(pwrctrlpriv, mode); + DBG_871X("%s %s\n", __FUNCTION__, "IPS_NONE"); +- if((padapter->bSurpriseRemoved ==0)&&(_FAIL == rtw_pwr_wakeup(padapter)) ) ++ if (!rtw_is_surprise_removed(padapter) && (_FAIL == rtw_pwr_wakeup(padapter))) + return -EFAULT; + } + else { +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_recv.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_recv.c +old mode 100755 +new mode 100644 +index a5e4e2d..4b77b94 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_recv.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_recv.c +@@ -20,6 +20,7 @@ + #define _RTW_RECV_C_ + + #include ++#include + + #if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) + +@@ -30,8 +31,23 @@ + + #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS + void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS); +-#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS + ++enum { ++ SIGNAL_STAT_CALC_PROFILE_0 = 0, ++ SIGNAL_STAT_CALC_PROFILE_1, ++ SIGNAL_STAT_CALC_PROFILE_MAX ++}; ++ ++u8 signal_stat_calc_profile[SIGNAL_STAT_CALC_PROFILE_MAX][2] = { ++ {4, 1}, /* Profile 0 => pre_stat : curr_stat = 4 : 1 */ ++ {3, 7} /* Profile 1 => pre_stat : curr_stat = 3 : 7 */ ++}; ++ ++#ifndef RTW_SIGNAL_STATE_CALC_PROFILE ++#define RTW_SIGNAL_STATE_CALC_PROFILE SIGNAL_STAT_CALC_PROFILE_1 ++#endif ++ ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS + + void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv) + { +@@ -179,6 +195,19 @@ _func_exit_; + + } + ++bool rtw_rframe_del_wfd_ie(union recv_frame *rframe, u8 ies_offset) ++{ ++#define DBG_RFRAME_DEL_WFD_IE 0 ++ u8 *ies = rframe->u.hdr.rx_data + sizeof(struct rtw_ieee80211_hdr_3addr) + ies_offset; ++ uint ies_len_ori = rframe->u.hdr.len - (ies - rframe->u.hdr.rx_data); ++ uint ies_len; ++ ++ ies_len = rtw_del_wfd_ie(ies, ies_len_ori, DBG_RFRAME_DEL_WFD_IE ? __func__ : NULL); ++ rframe->u.hdr.len -= ies_len_ori - ies_len; ++ ++ return ies_len_ori != ies_len; ++} ++ + union recv_frame *_rtw_alloc_recvframe (_queue *pfree_recv_queue) + { + +@@ -562,7 +591,7 @@ _func_enter_; + + if((prxattrib->bdecrypted ==_TRUE)&& (brpt_micerror == _TRUE)) + { +- rtw_handle_tkip_mic_err(adapter,(u8)IS_MCAST(prxattrib->ra)); ++ rtw_handle_tkip_mic_err(adapter, stainfo, (u8)IS_MCAST(prxattrib->ra)); + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" mic error :prxattrib->bdecrypted=%d ",prxattrib->bdecrypted)); + DBG_871X(" mic error :prxattrib->bdecrypted=%d\n",prxattrib->bdecrypted); + } +@@ -646,7 +675,7 @@ _func_enter_; + #ifdef CONFIG_CONCURRENT_MODE + if(!IS_MCAST(prxattrib->ra))//bc/mc packets use sw decryption for concurrent mode + #endif +- psecuritypriv->hw_decrypted=_FALSE; ++ psecuritypriv->hw_decrypted=_FALSE; + + #ifdef DBG_RX_DECRYPTOR + DBG_871X("[%s] %d:prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n", +@@ -998,10 +1027,10 @@ sint OnTDLS(_adapter *adapter, union recv_frame *precv_frame) + u8 category_field = 1; + #ifdef CONFIG_WFD + u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a }; +-#endif //CONFIG_WFD ++#endif /* CONFIG_WFD */ + struct tdls_info *ptdlsinfo = &(adapter->tdlsinfo); + +- //point to action field ++ /* point to action field */ + paction+=pattrib->hdrlen + + pattrib->iv_len + + SNAP_SIZE +@@ -1009,8 +1038,15 @@ sint OnTDLS(_adapter *adapter, union recv_frame *precv_frame) + + PAYLOAD_TYPE_LEN + + category_field; + +- if(ptdlsinfo->tdls_enable == _FALSE) +- { ++ DBG_871X("[TDLS] Recv %s from "MAC_FMT" with SeqNum = %d\n", rtw_tdls_action_txt(*paction), MAC_ARG(pattrib->src), GetSequence(get_recvframe_data(precv_frame))); ++ ++ if (hal_chk_wl_func(adapter, WL_FUNC_TDLS) == _FALSE) { ++ DBG_871X("Ignore tdls frame since hal doesn't support tdls\n"); ++ ret = _FAIL; ++ return ret; ++ } ++ ++ if (ptdlsinfo->tdls_enable == _FALSE) { + DBG_871X("recv tdls frame, " + "but tdls haven't enabled\n"); + ret = _FAIL; +@@ -1018,73 +1054,66 @@ sint OnTDLS(_adapter *adapter, union recv_frame *precv_frame) + } + + switch(*paction){ +- case TDLS_SETUP_REQUEST: +- DBG_871X("recv tdls setup request frame from "MAC_FMT"\n", MAC_ARG(pattrib->src)); +- ret=On_TDLS_Setup_Req(adapter, precv_frame); +- break; +- case TDLS_SETUP_RESPONSE: +- DBG_871X("recv tdls setup response frame from "MAC_FMT"\n", MAC_ARG(pattrib->src)); +- ret=On_TDLS_Setup_Rsp(adapter, precv_frame); +- break; +- case TDLS_SETUP_CONFIRM: +- DBG_871X("recv tdls setup confirm frame from "MAC_FMT"\n", MAC_ARG(pattrib->src)); +- ret=On_TDLS_Setup_Cfm(adapter, precv_frame); +- break; +- case TDLS_TEARDOWN: +- DBG_871X("recv tdls teardown, free sta_info from "MAC_FMT"\n", MAC_ARG(pattrib->src)); +- ret=On_TDLS_Teardown(adapter, precv_frame); +- break; +- case TDLS_DISCOVERY_REQUEST: +- DBG_871X("recv tdls discovery request frame from "MAC_FMT"\n", MAC_ARG(pattrib->src)); +- ret=On_TDLS_Dis_Req(adapter, precv_frame); +- break; +- case TDLS_PEER_TRAFFIC_INDICATION: +- DBG_871X("recv tdls peer traffic indication frame\n"); +- ret=On_TDLS_Peer_Traffic_Indication(adapter, precv_frame); +- break; +- case TDLS_PEER_TRAFFIC_RESPONSE: +- DBG_871X("recv tdls peer traffic response frame\n"); +- ret=On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame); +- break; +- case TDLS_CHANNEL_SWITCH_REQUEST: +- DBG_871X("recv tdls channel switch request frame\n"); +- ret=On_TDLS_Ch_Switch_Req(adapter, precv_frame); +- break; +- case TDLS_CHANNEL_SWITCH_RESPONSE: +- DBG_871X("recv tdls channel switch response frame\n"); +- ret=On_TDLS_Ch_Switch_Rsp(adapter, precv_frame); +- break; ++ case TDLS_SETUP_REQUEST: ++ ret=On_TDLS_Setup_Req(adapter, precv_frame); ++ break; ++ case TDLS_SETUP_RESPONSE: ++ ret=On_TDLS_Setup_Rsp(adapter, precv_frame); ++ break; ++ case TDLS_SETUP_CONFIRM: ++ ret=On_TDLS_Setup_Cfm(adapter, precv_frame); ++ break; ++ case TDLS_TEARDOWN: ++ ret=On_TDLS_Teardown(adapter, precv_frame); ++ break; ++ case TDLS_DISCOVERY_REQUEST: ++ ret=On_TDLS_Dis_Req(adapter, precv_frame); ++ break; ++ case TDLS_PEER_TRAFFIC_INDICATION: ++ ret=On_TDLS_Peer_Traffic_Indication(adapter, precv_frame); ++ break; ++ case TDLS_PEER_TRAFFIC_RESPONSE: ++ ret=On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame); ++ break; ++#ifdef CONFIG_TDLS_CH_SW ++ case TDLS_CHANNEL_SWITCH_REQUEST: ++ ret=On_TDLS_Ch_Switch_Req(adapter, precv_frame); ++ break; ++ case TDLS_CHANNEL_SWITCH_RESPONSE: ++ ret=On_TDLS_Ch_Switch_Rsp(adapter, precv_frame); ++ break; ++#endif + #ifdef CONFIG_WFD +- case 0x50: //First byte of WFA OUI +- if( _rtw_memcmp(WFA_OUI, (paction), 3) ) +- { +- if( *(paction + 3) == 0x04) //Probe request frame +- { +- //WFDTDLS: for sigma test, do not setup direct link automatically +- ptdlsinfo->dev_discovered = 1; +- DBG_871X("recv tunneled probe request frame\n"); +- issue_tunneled_probe_rsp(adapter, precv_frame); +- } +- if( *(paction + 3) == 0x05) //Probe response frame +- { +- //WFDTDLS: for sigma test, do not setup direct link automatically +- ptdlsinfo->dev_discovered = 1; +- DBG_871X("recv tunneled probe response frame\n"); +- } ++ /* First byte of WFA OUI */ ++ case 0x50: ++ if (_rtw_memcmp(WFA_OUI, paction, 3)) { ++ /* Probe request frame */ ++ if (*(paction + 3) == 0x04) { ++ /* WFDTDLS: for sigma test, do not setup direct link automatically */ ++ ptdlsinfo->dev_discovered = _TRUE; ++ DBG_871X("recv tunneled probe request frame\n"); ++ issue_tunneled_probe_rsp(adapter, precv_frame); + } +- break; +-#endif //CONFIG_WFD +- default: +- DBG_871X("receive TDLS frame %d but not support\n", *paction); +- ret=_FAIL; +- break; ++ /* Probe response frame */ ++ if (*(paction + 3) == 0x05) { ++ /* WFDTDLS: for sigma test, do not setup direct link automatically */ ++ ptdlsinfo->dev_discovered = _TRUE; ++ DBG_871X("recv tunneled probe response frame\n"); ++ } ++ } ++ break; ++#endif /* CONFIG_WFD */ ++ default: ++ DBG_871X("receive TDLS frame %d but not support\n", *paction); ++ ret=_FAIL; ++ break; + } + + exit: + return ret; + + } +-#endif ++#endif /* CONFIG_TDLS */ + + void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info*sta); + void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info*sta) +@@ -1094,6 +1123,8 @@ void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_in + struct stainfo_stats *pstats = NULL; + struct rx_pkt_attrib *pattrib = & prframe->u.hdr.attrib; + struct recv_priv *precvpriv = &padapter->recvpriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + sz = get_recvframe_len(prframe); + precvpriv->rx_bytes += sz; +@@ -1115,9 +1146,11 @@ void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_in + + pstats->rx_data_pkts++; + pstats->rx_bytes += sz; ++ ++ /*record rx packets for every tid*/ ++ pstats->rx_data_qos_pkts[pattrib->priority]++; + + #ifdef CONFIG_TDLS +- + if(psta->tdls_sta_state & TDLS_LINKED_STATE) + { + struct sta_info *pap_sta = NULL; +@@ -1155,12 +1188,15 @@ sint sta2sta_data_frame( + struct sta_priv *pstapriv = &adapter->stapriv; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + u8 *mybssid = get_bssid(pmlmepriv); +- u8 *myhwaddr = myid(&adapter->eeprompriv); ++ u8 *myhwaddr = adapter_mac_addr(adapter); + u8 * sta_addr = NULL; + sint bmcast = IS_MCAST(pattrib->dst); + + #ifdef CONFIG_TDLS + struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++#ifdef CONFIG_TDLS_CH_SW ++ struct tdls_ch_switch *pchsw_info = &ptdlsinfo->chsw_info; ++#endif + struct sta_info *ptdls_sta=NULL; + u8 *psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; + //frame body located after [+2]: ether-type, [+1]: payload type +@@ -1201,69 +1237,64 @@ _func_enter_; + { + #ifdef CONFIG_TDLS + +- //direct link data transfer +- if(ptdlsinfo->link_established == _TRUE){ ++ /* direct link data transfer */ ++ if (ptdlsinfo->link_established == _TRUE) { + ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src); +- if(ptdls_sta==NULL) +- { ++ if (ptdls_sta == NULL) { + ret=_FAIL; + goto exit; +- } +- else if(ptdls_sta->tdls_sta_state&TDLS_LINKED_STATE) +- { +- // filter packets that SA is myself or multicast or broadcast +- if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){ ++ } else if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { ++ /* filter packets that SA is myself or multicast or broadcast */ ++ if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)) { + ret= _FAIL; + goto exit; + } +- // da should be for me +- if((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN))&& (!bmcast)) +- { ++ /* da should be for me */ ++ if ((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN)) && (!bmcast)) { + ret= _FAIL; + goto exit; + } +- // check BSSID +- if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ /* check BSSID */ ++ if (_rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || + _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || +- (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ) +- { ++ (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN))) { + ret= _FAIL; + goto exit; + } + +- //process UAPSD tdls sta ++#ifdef CONFIG_TDLS_CH_SW ++ if(ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) { ++ if (adapter->mlmeextpriv.cur_channel != rtw_get_oper_ch(adapter)) { ++ pchsw_info->ch_sw_state |= TDLS_PEER_AT_OFF_STATE; ++ if (!(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE)) ++ _cancel_timer_ex(&ptdls_sta->ch_sw_timer); ++ /* On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame); */ ++ } ++ } ++#endif ++ ++ /* process UAPSD tdls sta */ + process_pwrbit_data(adapter, precv_frame); + +- // if NULL-frame, check pwrbit +- if ((GetFrameSubType(ptr) & WIFI_DATA_NULL) == WIFI_DATA_NULL) +- { +- //NULL-frame with pwrbit=1, buffer_STA should buffer frames for sleep_STA +- if(GetPwrMgt(ptr)) +- { ++ /* if NULL-frame, check pwrbit */ ++ if ((GetFrameSubType(ptr) & WIFI_DATA_NULL) == WIFI_DATA_NULL) { ++ /* NULL-frame with pwrbit=1, buffer_STA should buffer frames for sleep_STA */ ++ if (GetPwrMgt(ptr)) { ++ /* it would be triggered when we are off channel and receiving NULL DATA */ ++ /* we can confirm that peer STA is at off channel */ + DBG_871X("TDLS: recv peer null frame with pwr bit 1\n"); + //ptdls_sta->tdls_sta_state|=TDLS_PEER_SLEEP_STATE; +- // it would be triggered when we are off channel and receiving NULL DATA +- // we can confirm that peer STA is at off channel +- } +- else if(ptdls_sta->tdls_sta_state&TDLS_CH_SWITCH_ON_STATE) +- { +- if((ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE) != TDLS_PEER_AT_OFF_STATE) +- { +- issue_nulldata_to_TDLS_peer_STA(adapter, ptdls_sta->hwaddr, 0, 0, 0); +- ptdls_sta->tdls_sta_state |= TDLS_PEER_AT_OFF_STATE; +- On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame); +- } + } + +- //[TDLS] TODO: Updated BSSID's seq. +- DBG_871X("drop Null Data\n"); ++ /* TODO: Updated BSSID's seq. */ ++ //DBG_871X("drop Null Data\n"); + ptdls_sta->tdls_sta_state &= ~(TDLS_WAIT_PTR_STATE); + ret= _FAIL; + goto exit; + } + +- //receive some of all TDLS management frames, process it at ON_TDLS +- if((_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, 2))){ ++ /* receive some of all TDLS management frames, process it at ON_TDLS */ ++ if (_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, 2)) { + ret= OnTDLS(adapter, precv_frame); + goto exit; + } +@@ -1280,7 +1311,7 @@ _func_enter_; + + } + else +-#endif //CONFIG_TDLS ++#endif /* CONFIG_TDLS */ + { + // For Station mode, sa and bssid should always be BSSID, and DA is my mac-address + if(!_rtw_memcmp(pattrib->bssid, pattrib->src, ETH_ALEN) ) +@@ -1351,7 +1382,7 @@ _func_enter_; + if (adapter->registrypriv.mp_mode == 1) + { + if(check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) +- adapter->mppriv.rx_pktloss++; ++ adapter->mppriv.rx_pktloss++; + } + #endif + ret= _FAIL; +@@ -1379,7 +1410,7 @@ sint ap2sta_data_frame( + struct sta_priv *pstapriv = &adapter->stapriv; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + u8 *mybssid = get_bssid(pmlmepriv); +- u8 *myhwaddr = myid(&adapter->eeprompriv); ++ u8 *myhwaddr = adapter_mac_addr(adapter); + sint bmcast = IS_MCAST(pattrib->dst); + + _func_enter_; +@@ -1473,7 +1504,8 @@ _func_enter_; + _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); + + // +- _rtw_memcpy(pattrib->bssid, mybssid, ETH_ALEN); ++ if(adapter->mppriv.bRTWSmbCfg==_FALSE) ++ _rtw_memcpy(pattrib->bssid, mybssid, ETH_ALEN); + + + *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get sta_info +@@ -1587,17 +1619,15 @@ _func_enter_; + else if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && + (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ) + { +- DBG_871X("%s ,in WIFI_MP_STATE \n",__func__); +- ++ //DBG_871X("%s ,in WIFI_MP_STATE \n",__func__); + _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); + _rtw_memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN); + _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); + _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); + _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- + // +- _rtw_memcpy(pattrib->bssid, mybssid, ETH_ALEN); +- ++ if(adapter->mppriv.bRTWSmbCfg == _FALSE) ++ _rtw_memcpy(pattrib->bssid, mybssid, ETH_ALEN); + + *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get sta_info + if (*psta == NULL) { +@@ -1611,7 +1641,7 @@ _func_enter_; + + } + else { +- u8 *myhwaddr = myid(&adapter->eeprompriv); ++ u8 *myhwaddr = adapter_mac_addr(adapter); + if (!_rtw_memcmp(pattrib->ra, myhwaddr, ETH_ALEN)) { + ret = RTW_RX_HANDLED; + goto exit; +@@ -1647,10 +1677,8 @@ sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame) + } + + //receive the frames that ra(a1) is my address +- if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN)) +- { ++ if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_mac_addr(padapter), ETH_ALEN)) + return _FAIL; +- } + + psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); + if (psta==NULL) +@@ -1796,7 +1824,7 @@ sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame) + else if(GetFrameSubType(pframe) == WIFI_NDPA) { + #ifdef CONFIG_BEAMFORMING + beamforming_get_ndpa_frame(padapter, precv_frame); +-#endif ++#endif/*CONFIG_BEAMFORMING*/ + } + + return _FAIL; +@@ -1842,7 +1870,7 @@ sint validate_recv_mgnt_frame(PADAPTER padapter, union recv_frame *precv_frame) + else if (GetFrameSubType(precv_frame->u.hdr.rx_data) == WIFI_PROBEREQ) + psta->sta_stats.rx_probereq_pkts++; + else if (GetFrameSubType(precv_frame->u.hdr.rx_data) == WIFI_PROBERSP) { +- if (_rtw_memcmp(padapter->eeprompriv.mac_addr, GetAddr1Ptr(precv_frame->u.hdr.rx_data), ETH_ALEN) == _TRUE) ++ if (_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(precv_frame->u.hdr.rx_data), ETH_ALEN) == _TRUE) + psta->sta_stats.rx_probersp_pkts++; + else if (is_broadcast_mac_addr(GetAddr1Ptr(precv_frame->u.hdr.rx_data)) + || is_multicast_mac_addr(GetAddr1Ptr(precv_frame->u.hdr.rx_data))) +@@ -2009,9 +2037,9 @@ _func_enter_; + pattrib->hdrlen = pattrib->to_fr_ds==3 ? 32 : 26; + + if(pattrib->priority!=0 && pattrib->priority!=3) +- { + adapter->recvpriv.bIsAnyNonBEPkts = _TRUE; +- } ++ else ++ adapter->recvpriv.bIsAnyNonBEPkts = _FALSE; + } + else + { +@@ -2038,14 +2066,6 @@ _func_enter_; + goto exit; + } + +-#if 0 +- if(psta->tdls_sta_state & TDLS_LINKED_STATE ) +- { +- if(psta->dot118021XPrivacy==_AES_) +- pattrib->encrypt=psta->dot118021XPrivacy; +- } +-#endif //CONFIG_TDLS +- + if(pattrib->privacy){ + + RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("validate_recv_data_frame:pattrib->privacy=%x\n", pattrib->privacy)); +@@ -2083,15 +2103,15 @@ static sint validate_80211w_mgmt(_adapter *adapter, union recv_frame *precv_fram + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; + u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &adapter->stapriv; + u8 type; + u8 subtype; + + type = GetFrameType(ptr); + subtype = GetFrameSubType(ptr); //bit(7)~bit(2) + +- //only support station mode +- if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) +- && adapter->securitypriv.binstallBIPkey == _TRUE) ++ if (adapter->securitypriv.binstallBIPkey == _TRUE) + { + //unicast management frame decrypt + if(pattrib->privacy && !(IS_MCAST(GetAddr1Ptr(ptr))) && +@@ -2162,14 +2182,15 @@ static sint validate_80211w_mgmt(_adapter *adapter, union recv_frame *precv_fram + { + DBG_871X("802.11w recv none protected packet\n"); + //drop pkt, don't issue sa query request +- //issue_action_SA_Query(adapter, NULL, 0, 0); ++ /* issue_action_SA_Query(adapter, NULL, 0, 0, 0); */ + goto validate_80211w_fail; + } + }//802.11w protect + else + { +- if(subtype == WIFI_ACTION) +- { ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(ptr)); ++ ++ if (subtype == WIFI_ACTION && psta && psta->bpairwise_key_installed == _TRUE) { + //according 802.11-2012 standard, these five types are not robust types + if( ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_PUBLIC && + ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_HT && +@@ -2189,7 +2210,7 @@ static sint validate_80211w_mgmt(_adapter *adapter, union recv_frame *precv_fram + if(reason == 6 || reason == 7) + { + //issue sa query request +- issue_action_SA_Query(adapter, NULL, 0, 0); ++ issue_action_SA_Query(adapter, NULL, 0, 0, IEEE80211W_RIGHT_KEY); + } + goto validate_80211w_fail; + } +@@ -2302,7 +2323,8 @@ _func_enter_; + + #if 1 //Dump rx packets + { +- u8 bDumpRxPkt; ++ u8 bDumpRxPkt = 0; ++ + rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt)); + if (bDumpRxPkt == 1) //dump all rx packets + dump_rx_packet(ptr); +@@ -2320,7 +2342,7 @@ _func_enter_; + if(validate_80211w_mgmt(adapter, precv_frame) == _FAIL) + { + retval = _FAIL; +- DBG_COUNTER(padapter->rx_logs.core_rx_pre_mgmt_err_80211w); ++ DBG_COUNTER(adapter->rx_logs.core_rx_pre_mgmt_err_80211w); + break; + } + #endif //CONFIG_IEEE80211W +@@ -2695,6 +2717,7 @@ static void recvframe_expand_pkt( + _pkt *ppkt; + u8 shift_sz; + u32 alloc_sz; ++ u8 *ptr; + + + pfhdr = &prframe->u.hdr; +@@ -2724,7 +2747,9 @@ static void recvframe_expand_pkt( + skb_reserve(ppkt, shift_sz); + + // copy data to new pkt +- _rtw_memcpy(skb_put(ppkt, pfhdr->len), pfhdr->rx_data, pfhdr->len); ++ ptr = skb_put(ppkt, pfhdr->len); ++ if (ptr) ++ _rtw_memcpy(ptr, pfhdr->rx_data, pfhdr->len); + + rtw_skb_free(pfhdr->pkt); + +@@ -3312,13 +3337,9 @@ int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *pre + { + //DBG_871X("recv_indicatepkts_in_order, amsdu!=1, indicate_seq=%d, seq_num=%d\n", preorder_ctrl->indicate_seq, pattrib->seq_num); + +- if ((padapter->bDriverStopped == _FALSE) && +- (padapter->bSurpriseRemoved == _FALSE)) +- { +- +- rtw_recv_indicatepkt(padapter, prframe);//indicate this recv_frame +- +- } ++ if (!RTW_CANNOT_RUN(padapter)) ++ rtw_recv_indicatepkt(padapter, prframe);/*indicate this recv_frame*/ ++ + } + else if(pattrib->amsdu==1) + { +@@ -3402,9 +3423,7 @@ int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe) + // || (pattrib->eth_type==0x0806) || (pattrib->ack_policy!=0)) + if (pattrib->qos!=1) + { +- if ((padapter->bDriverStopped == _FALSE) && +- (padapter->bSurpriseRemoved == _FALSE)) +- { ++ if (!RTW_CANNOT_RUN(padapter)) { + RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ recv_indicatepkt_reorder -recv_func recv_indicatepkt\n" )); + + rtw_recv_indicatepkt(padapter, prframe); +@@ -3536,11 +3555,15 @@ int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe) + //recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE); + if(recv_indicatepkts_in_order(padapter, preorder_ctrl, _FALSE)==_TRUE) + { ++ if (!preorder_ctrl->bReorderWaiting) { ++ preorder_ctrl->bReorderWaiting = _TRUE; + _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); ++ } + _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); + } + else + { ++ preorder_ctrl->bReorderWaiting = _FALSE; + _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); + _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); + } +@@ -3566,15 +3589,17 @@ void rtw_reordering_ctrl_timeout_handler(void *pcontext) + _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; + + +- if(padapter->bDriverStopped ||padapter->bSurpriseRemoved) +- { ++ if (RTW_CANNOT_RUN(padapter)) + return; +- } + + //DBG_871X("+rtw_reordering_ctrl_timeout_handler()=>\n"); + + _enter_critical_bh(&ppending_recvframe_queue->lock, &irql); + ++ if (preorder_ctrl) { ++ preorder_ctrl->bReorderWaiting = _FALSE; ++ } ++ + if(recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE)==_TRUE) + { + _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); +@@ -3618,9 +3643,7 @@ int process_recv_indicatepkts(_adapter *padapter, union recv_frame *prframe) + DBG_871X("DBG_RX_DROP_FRAME %s recv_indicatepkt_reorder error!\n", __FUNCTION__); + #endif + +- if ((padapter->bDriverStopped == _FALSE) && +- (padapter->bSurpriseRemoved == _FALSE)) +- { ++ if (!RTW_CANNOT_RUN(padapter)) { + retval = _FAIL; + return retval; + } +@@ -3639,19 +3662,18 @@ int process_recv_indicatepkts(_adapter *padapter, union recv_frame *prframe) + return retval; + } + +- if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE)) +- { ++ if (!RTW_CANNOT_RUN(padapter)) { + //indicate this recv_frame + RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ process_recv_indicatepkts- recv_func recv_indicatepkt\n" )); + rtw_recv_indicatepkt(padapter, prframe); +- +- + } + else + { + RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ process_recv_indicatepkts- recv_func free_indicatepkt\n" )); + +- RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_func:bDriverStopped(%s) OR bSurpriseRemoved(%s)" ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False")); + retval = _FAIL; + return retval; + } +@@ -3703,6 +3725,8 @@ static sint MPwlanhdr_to_ethhdr ( union recv_frame *precvframe) + u16 eth_type, len; + u8 bsnaphdr; + u8 *psnap_type; ++ u8 mcastheadermac[]={0x01,0x00,0x5e}; ++ + struct ieee80211_snap_hdr *psnap; + + sint ret=_SUCCESS; +@@ -3756,19 +3780,28 @@ _func_enter_; + _rtw_memcpy(ptr+12, &len, 2); + } + +- if (adapter->registrypriv.mp_mode == 1) +- { ++ + len = htons(pattrib->seq_num); + //DBG_871X("wlan seq = %d ,seq_num =%x\n",len,pattrib->seq_num); + _rtw_memcpy(ptr+12,&len, 2); ++ if(adapter->mppriv.bRTWSmbCfg==_TRUE) ++ { ++// if(_rtw_memcmp(mcastheadermac, pattrib->dst, 3) == _TRUE)//SimpleConfig Dest. ++// _rtw_memcpy(ptr+ETH_ALEN, pattrib->bssid, ETH_ALEN); ++ ++ if(_rtw_memcmp(mcastheadermac, pattrib->bssid, 3) == _TRUE) //SimpleConfig Dest. ++ _rtw_memcpy(ptr, pattrib->bssid, ETH_ALEN); ++ + } ++ ++ + _func_exit_; + return ret; + + } + + +-int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) ++int mp_recv_frame(_adapter *padapter, union recv_frame *rframe) + { + int ret = _SUCCESS; + struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; +@@ -3782,37 +3815,30 @@ int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) + u8 *ptr = rframe->u.hdr.rx_data; + u8 *psa, *pda, *pbssid; + struct sta_info *psta = NULL; +- DBG_COUNTER(padapter->rx_logs.core_rx_pre); +- +-#ifdef CONFIG_MP_INCLUDED +- if (padapter->registrypriv.mp_mode == 1) ++ DBG_COUNTER(padapter->rx_logs.core_rx_pre); ++ ++ if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) )//&&(padapter->mppriv.check_mp_pkt == 0)) + { +- +- if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) )//&&(padapter->mppriv.check_mp_pkt == 0)) ++ if (pattrib->crc_err == 1){ ++ padapter->mppriv.rx_crcerrpktcount++; ++ } ++ else{ ++ if(_SUCCESS == validate_mp_recv_frame(padapter, rframe)) ++ padapter->mppriv.rx_pktcount++; ++ else ++ padapter->mppriv.rx_pktcount_filter_out++; ++ } ++ ++ if(pmppriv->rx_bindicatePkt == _FALSE) + { +- if (pattrib->crc_err == 1){ +- padapter->mppriv.rx_crcerrpktcount++; +- } +- else{ +- if(_SUCCESS == validate_mp_recv_frame(padapter, rframe)) +- padapter->mppriv.rx_pktcount++; +- else +- padapter->mppriv.rx_pktcount_filter_out++; +- +- } +- +- if(pmppriv->rx_bindicatePkt == _FALSE) +- { +- //if (check_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE) == _FALSE) { +- //RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("MP - Not in loopback mode , drop pkt \n")); +- ret = _FAIL; +- rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame +- goto exit; +- +- } +- else { +- +- type = GetFrameType(ptr); ++ //RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("MP - Not in loopback mode , drop pkt \n")); ++ ret = _FAIL; ++ rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame ++ goto exit; ++ } ++ else ++ { ++ type = GetFrameType(ptr); + pattrib->to_fr_ds = get_tofr_ds(ptr); + pattrib->frag_num = GetFragNum(ptr); + pattrib->seq_num = GetSequence(ptr); +@@ -3870,22 +3896,20 @@ int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) + + if (ret != _SUCCESS) + { +- RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n")); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n")); + #ifdef DBG_RX_DROP_FRAME +- DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr: drop pkt\n", __FUNCTION__); ++ DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr: drop pkt\n", __FUNCTION__); + #endif +- rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame +- ret = _FAIL; +- goto exit; +- } +- +- if ((padapter->bDriverStopped == _FALSE) && (padapter->bSurpriseRemoved == _FALSE)) +- { +- RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: recv_func rtw_recv_indicatepkt\n" )); ++ rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame ++ ret = _FAIL; ++ goto exit; ++ } ++ if (!RTW_CANNOT_RUN(padapter)) { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: recv_func rtw_recv_indicatepkt\n" )); + //indicate this recv_frame +- ret = rtw_recv_indicatepkt(padapter, rframe); +- if (ret != _SUCCESS) +- { ++ ret = rtw_recv_indicatepkt(padapter, rframe); ++ if (ret != _SUCCESS) ++ { + #ifdef DBG_RX_DROP_FRAME + DBG_871X("DBG_RX_DROP_FRAME %s rtw_recv_indicatepkt fail!\n", __FUNCTION__); + #endif +@@ -3893,34 +3917,416 @@ int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) + ret = _FAIL; + + goto exit; +- } +- } +- else +- { +- RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: rtw_free_recvframe\n" )); +- RT_TRACE(_module_rtl871x_recv_c_, _drv_debug_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); +- #ifdef DBG_RX_DROP_FRAME +- DBG_871X("DBG_RX_DROP_FRAME %s ecv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", __FUNCTION__, +- padapter->bDriverStopped, padapter->bSurpriseRemoved); +- #endif +- ret = _FAIL; +- rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame +- goto exit; +- } +- + } + } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: rtw_free_recvframe\n" )); ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_debug_, ("recv_func:bDriverStopped(%s) OR bSurpriseRemoved(%s)" ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s ecv_func:bDriverStopped(%s) OR bSurpriseRemoved(%s)\n", __func__, ++ rtw_is_drv_stopped(padapter)?"True":"False", ++ rtw_is_surprise_removed(padapter)?"True":"False"); ++ #endif ++ ret = _FAIL; ++ rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame ++ goto exit; ++ } ++ ++ } ++ } + ++ } ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recv_func: validate_recv_frame fail! drop pkt\n")); ++ rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame ++ ret = _FAIL; ++ ++exit: ++ return ret; ++ ++} ++ ++static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, u8 *buf) ++{ ++#define CHAN2FREQ(a) ((a < 14)?(2407+5*a):(5000+5*a)) ++ ++#if 0 ++#define RTW_RX_RADIOTAP_PRESENT ( \ ++ (1 << IEEE80211_RADIOTAP_TSFT) | \ ++ (1 << IEEE80211_RADIOTAP_FLAGS) | \ ++ (1 << IEEE80211_RADIOTAP_RATE) | \ ++ (1 << IEEE80211_RADIOTAP_CHANNEL) | \ ++ (0 << IEEE80211_RADIOTAP_FHSS) | \ ++ (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \ ++ (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) | \ ++ (0 << IEEE80211_RADIOTAP_LOCK_QUALITY) | \ ++ (0 << IEEE80211_RADIOTAP_TX_ATTENUATION) | \ ++ (0 << IEEE80211_RADIOTAP_DB_TX_ATTENUATION) | \ ++ (0 << IEEE80211_RADIOTAP_DBM_TX_POWER) | \ ++ (1 << IEEE80211_RADIOTAP_ANTENNA) | \ ++ (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) | \ ++ (0 << IEEE80211_RADIOTAP_DB_ANTNOISE) | \ ++ (0 << IEEE80211_RADIOTAP_RX_FLAGS) | \ ++ (0 << IEEE80211_RADIOTAP_TX_FLAGS) | \ ++ (0 << IEEE80211_RADIOTAP_RTS_RETRIES) | \ ++ (0 << IEEE80211_RADIOTAP_DATA_RETRIES) | \ ++ (0 << IEEE80211_RADIOTAP_MCS) | \ ++ (0 << IEEE80211_RADIOTAP_RADIOTAP_NAMESPACE)| \ ++ (0 << IEEE80211_RADIOTAP_VENDOR_NAMESPACE) | \ ++ (0 << IEEE80211_RADIOTAP_EXT) | \ ++ 0) ++ ++ /* (0 << IEEE80211_RADIOTAP_AMPDU_STATUS) | \ */ ++ /* (0 << IEEE80211_RADIOTAP_VHT) | \ */ ++#endif ++#ifndef IEEE80211_RADIOTAP_MCS ++#define IEEE80211_RADIOTAP_MCS 19 ++#endif ++#ifndef IEEE80211_RADIOTAP_VHT ++#define IEEE80211_RADIOTAP_VHT 21 ++#endif ++ ++#ifndef IEEE80211_RADIOTAP_F_BADFCS ++#define IEEE80211_RADIOTAP_F_BADFCS 0x40 /* bad FCS */ ++#endif ++ ++ sint ret = _SUCCESS; ++ _adapter *adapter = precvframe->u.hdr.adapter; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ u16 tmp_16bit = 0; ++ ++ u8 data_rate[] = { ++ 2, 4, 11, 22, /* CCK */ ++ 12, 18, 24, 36, 48, 72, 93, 108, /* OFDM */ ++ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, /* HT MCS index */ ++ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, ++ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, /* VHT Nss 1 */ ++ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, /* VHT Nss 2 */ ++ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, /* VHT Nss 3 */ ++ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, /* VHT Nss 4 */ ++ }; ++ ++ _pkt *pskb = NULL; ++ ++ struct ieee80211_radiotap_header *rtap_hdr = NULL; ++ u8 *ptr = NULL; ++ ++ u8 hdr_buf[64] = {0}; ++ u16 rt_len = 8; ++ ++ /* create header */ ++ rtap_hdr = (struct ieee80211_radiotap_header *)&hdr_buf[0]; ++ rtap_hdr->it_version = PKTHDR_RADIOTAP_VERSION; ++ ++ /* tsft */ ++ if (pattrib->tsfl) { ++ u64 tmp_64bit; ++ ++ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_TSFT); ++ tmp_64bit = cpu_to_le64(pattrib->tsfl); ++ memcpy(&hdr_buf[rt_len], &tmp_64bit, 8); ++ rt_len += 8; ++ } ++ ++ /* flags */ ++ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_FLAGS); ++ if (0) ++ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_F_CFP; ++ ++ if (0) ++ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_F_SHORTPRE; ++ ++ if ((pattrib->encrypt == 1) || (pattrib->encrypt == 5)) ++ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_F_WEP; ++ ++ if (pattrib->mfrag) ++ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_F_FRAG; ++ ++ /* always append FCS */ ++ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_F_FCS; ++ ++ if (0) ++ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_F_DATAPAD; ++ ++ if (pattrib->crc_err) ++ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_F_BADFCS; ++ ++ if (pattrib->sgi) { ++ /* Currently unspecified but used */ ++ hdr_buf[rt_len] |= 0x80; ++ } ++ rt_len += 1; ++ ++ /* rate */ ++ if (pattrib->data_rate < 12) { ++ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_RATE); ++ if (pattrib->data_rate < 4) { ++ /* CCK */ ++ hdr_buf[rt_len] = data_rate[pattrib->data_rate]; ++ } else { ++ /* OFDM */ ++ hdr_buf[rt_len] = data_rate[pattrib->data_rate]; ++ } ++ } ++ rt_len += 1; /* force padding 1 byte for aligned */ ++ ++ /* channel */ ++ tmp_16bit = 0; ++ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_CHANNEL); ++ tmp_16bit = CHAN2FREQ(rtw_get_oper_ch(padapter)); ++ /*tmp_16bit = CHAN2FREQ(pHalData->CurrentChannel);*/ ++ memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); ++ rt_len += 2; ++ ++ /* channel flags */ ++ tmp_16bit = 0; ++ if (pHalData->CurrentBandType == 0) ++ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_2GHZ); ++ else ++ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_5GHZ); ++ ++ if (pattrib->data_rate < 12) { ++ if (pattrib->data_rate < 4) { ++ /* CCK */ ++ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_CCK); ++ } else { ++ /* OFDM */ ++ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_OFDM); + } ++ } else { ++ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_DYN); ++ } ++ memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); ++ rt_len += 2; + +- RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recv_func: validate_recv_frame fail! drop pkt\n")); +- rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame ++ /* dBm Antenna Signal */ ++ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL); ++ hdr_buf[rt_len] = pattrib->phy_info.RecvSignalPower; ++ rt_len += 1; ++ ++#if 0 ++ /* dBm Antenna Noise */ ++ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE); ++ hdr_buf[rt_len] = 0; ++ rt_len += 1; ++ ++ /* Signal Quality */ ++ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_LOCK_QUALITY); ++ hdr_buf[rt_len] = pattrib->phy_info.SignalQuality; ++ rt_len += 1; ++#endif ++ ++ /* Antenna */ ++ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_ANTENNA); ++ hdr_buf[rt_len] = 0; /* pHalData->rf_type; */ ++ rt_len += 1; ++ ++ /* RX flags */ ++ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_RX_FLAGS); ++#if 0 ++ tmp_16bit = cpu_to_le16(0); ++ memcpy(ptr, &tmp_16bit, 1); ++#endif ++ rt_len += 2; ++ ++ /* MCS information */ ++ if (pattrib->data_rate >= 12 && pattrib->data_rate < 44) { ++ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_MCS); ++ /* known, flag */ ++ hdr_buf[rt_len] |= BIT1; /* MCS index known */ ++ ++ /* bandwidth */ ++ hdr_buf[rt_len] |= BIT0; ++ hdr_buf[rt_len+1] |= (pattrib->bw & 0x03); ++ ++ /* guard interval */ ++ hdr_buf[rt_len] |= BIT2; ++ hdr_buf[rt_len+1] |= (pattrib->sgi & 0x01) << 2; ++ ++ /* STBC */ ++ hdr_buf[rt_len] |= BIT5; ++ hdr_buf[rt_len+1] |= (pattrib->stbc & 0x03) << 5; ++ ++ rt_len += 2; ++ ++ /* MCS rate index */ ++ hdr_buf[rt_len] = data_rate[pattrib->data_rate]; ++ rt_len += 1; ++ } ++ ++ /* VHT */ ++ if (pattrib->data_rate >= 44 && pattrib->data_rate < 84) { ++ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_VHT); ++ ++ /* known 16 bit, flag 8 bit */ ++ tmp_16bit = 0; ++ ++ /* Bandwidth */ ++ tmp_16bit |= BIT6; ++ ++ /* Group ID */ ++ tmp_16bit |= BIT7; ++ ++ /* Partial AID */ ++ tmp_16bit |= BIT8; ++ ++ /* STBC */ ++ tmp_16bit |= BIT0; ++ hdr_buf[rt_len+2] |= (pattrib->stbc & 0x01); ++ ++ /* Guard interval */ ++ tmp_16bit |= BIT2; ++ hdr_buf[rt_len+2] |= (pattrib->sgi & 0x01) << 2; ++ ++ /* LDPC extra OFDM symbol */ ++ tmp_16bit |= BIT4; ++ hdr_buf[rt_len+2] |= (pattrib->ldpc & 0x01) << 4; ++ ++ memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); ++ rt_len += 3; ++ ++ /* bandwidth */ ++ if (pattrib->bw == 0) ++ hdr_buf[rt_len] |= 0; ++ else if (pattrib->bw == 1) ++ hdr_buf[rt_len] |= 1; ++ else if (pattrib->bw == 2) ++ hdr_buf[rt_len] |= 4; ++ else if (pattrib->bw == 3) ++ hdr_buf[rt_len] |= 11; ++ rt_len += 1; ++ ++ /* mcs_nss */ ++ if (pattrib->data_rate >= 44 && pattrib->data_rate < 54) { ++ hdr_buf[rt_len] |= 1; ++ hdr_buf[rt_len] |= data_rate[pattrib->data_rate] << 4; ++ } else if (pattrib->data_rate >= 54 && pattrib->data_rate < 64) { ++ hdr_buf[rt_len + 1] |= 2; ++ hdr_buf[rt_len + 1] |= data_rate[pattrib->data_rate] << 4; ++ } else if (pattrib->data_rate >= 64 && pattrib->data_rate < 74) { ++ hdr_buf[rt_len + 2] |= 3; ++ hdr_buf[rt_len + 2] |= data_rate[pattrib->data_rate] << 4; ++ } else if (pattrib->data_rate >= 74 && pattrib->data_rate < 84) { ++ hdr_buf[rt_len + 3] |= 4; ++ hdr_buf[rt_len + 3] |= data_rate[pattrib->data_rate] << 4; ++ } ++ rt_len += 4; ++ ++ /* coding */ ++ hdr_buf[rt_len] = 0; ++ rt_len += 1; ++ ++ /* group_id */ ++ hdr_buf[rt_len] = 0; ++ rt_len += 1; ++ ++ /* partial_aid */ ++ tmp_16bit = 0; ++ memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); ++ rt_len += 2; ++ } ++ ++ /* push to skb */ ++ pskb = (_pkt *)buf; ++ if (skb_headroom(pskb) < rt_len) { ++ DBG_871X("%s:%d %s headroom is too small.\n", __FILE__, __LINE__, __func__); + ret = _FAIL; ++ return ret; ++ } ++ ++ ptr = skb_push(pskb, rt_len); ++ if (ptr) { ++ rtap_hdr->it_len = cpu_to_le16(rt_len); ++ memcpy(ptr, rtap_hdr, rt_len); ++ } else { ++ ret = _FAIL; ++ } ++ ++ return ret; ++ ++} ++ ++int recv_frame_monitor(_adapter *padapter, union recv_frame *rframe) ++{ ++ int ret = _SUCCESS; ++ struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; ++ _pkt *pskb = NULL; ++ ++ /* read skb information from recv frame */ ++ pskb = rframe->u.hdr.pkt; ++ pskb->len = rframe->u.hdr.len; ++ pskb->data = rframe->u.hdr.rx_data; ++ skb_set_tail_pointer(pskb, rframe->u.hdr.len); ++ ++ /* fill radiotap header */ ++ if (fill_radiotap_hdr(padapter, rframe, (u8 *)pskb) == _FAIL) { ++ ret = _FAIL; ++ rtw_free_recvframe(rframe, pfree_recv_queue); /* free this recv_frame */ + goto exit; +- } +- ++ } ++ ++ /* write skb information to recv frame */ ++ skb_reset_mac_header(pskb); ++ rframe->u.hdr.len = pskb->len; ++ rframe->u.hdr.rx_data = pskb->data; ++ rframe->u.hdr.rx_head = pskb->head; ++ rframe->u.hdr.rx_tail = skb_tail_pointer(pskb); ++ rframe->u.hdr.rx_end = skb_end_pointer(pskb); ++ ++ if (!RTW_CANNOT_RUN(padapter)) { ++ /* indicate this recv_frame */ ++ ret = rtw_recv_monitor(padapter, rframe); ++ if (ret != _SUCCESS) { ++ ret = _FAIL; ++ rtw_free_recvframe(rframe, pfree_recv_queue); /* free this recv_frame */ ++ goto exit; ++ } ++ } else { ++ ret = _FAIL; ++ rtw_free_recvframe(rframe, pfree_recv_queue); /* free this recv_frame */ ++ goto exit; ++ } ++ ++exit: ++ return ret; ++} ++ ++int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) ++{ ++ int ret = _SUCCESS; ++ struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; ++ ++#ifdef DBG_RX_COUNTER_DUMP ++ if( padapter->dump_rx_cnt_mode & DUMP_DRV_RX_COUNTER ) ++ { ++ if (pattrib->crc_err == 1) ++ padapter->drv_rx_cnt_crcerror++; ++ else ++ padapter->drv_rx_cnt_ok++; ++ } + #endif + ++#ifdef CONFIG_MP_INCLUDED ++ if (padapter->registrypriv.mp_mode == 1 || padapter->mppriv.bRTWSmbCfg ==_TRUE) ++ { ++ mp_recv_frame(padapter,rframe); ++ ret = _FAIL; ++ goto exit; ++ } ++ else ++#endif ++ { + //check the frame crtl field and decache + ret = validate_recv_frame(padapter, rframe); + if (ret != _SUCCESS) +@@ -3929,7 +4335,7 @@ int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) + rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame + goto exit; + } +- ++ } + exit: + return ret; + } +@@ -3984,10 +4390,9 @@ int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe) + + if((_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, ETH_TYPE_LEN)) && + ((*pcategory==RTW_WLAN_CATEGORY_TDLS) || (*pcategory==RTW_WLAN_CATEGORY_P2P))){ +- ret = OnTDLS(padapter, prframe); //all of functions will return _FAIL ++ ret = OnTDLS(padapter, prframe); + if(ret == _FAIL) + goto _exit_recv_func; +- //goto _exit_recv_func; + } + #endif //CONFIG_TDLS + +@@ -4044,8 +4449,7 @@ int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe) + goto _recv_data_drop; + } + +- if ((padapter->bDriverStopped == _FALSE) && (padapter->bSurpriseRemoved == _FALSE)) +- { ++ if (!RTW_CANNOT_RUN(padapter)) { + RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: recv_func rtw_recv_indicatepkt\n" )); + //indicate this recv_frame + ret = rtw_recv_indicatepkt(padapter, prframe); +@@ -4062,8 +4466,9 @@ int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe) + RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: rtw_free_recvframe\n" )); + RT_TRACE(_module_rtl871x_recv_c_, _drv_debug_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); + #ifdef DBG_RX_DROP_FRAME +- DBG_871X("DBG_RX_DROP_FRAME %s ecv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", __FUNCTION__, +- padapter->bDriverStopped, padapter->bSurpriseRemoved); ++ DBG_871X("DBG_RX_DROP_FRAME %s ecv_func:bDriverStopped(%s) OR bSurpriseRemoved(%s)\n", __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False"); + #endif + ret = _FAIL; + rtw_free_recvframe(orig_prframe, pfree_recv_queue); //free this recv_frame +@@ -4110,6 +4515,13 @@ int recv_func(_adapter *padapter, union recv_frame *rframe) + struct security_priv *psecuritypriv=&padapter->securitypriv; + struct mlme_priv *mlmepriv = &padapter->mlmepriv; + ++ if (check_fwstate(mlmepriv, WIFI_MONITOR_STATE)) { ++ /* monitor mode */ ++ recv_frame_monitor(padapter, rframe); ++ ret = _SUCCESS; ++ goto exit; ++ } else ++ + /* check if need to handle uc_swdec_pending_queue*/ + if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && psecuritypriv->busetkipkey) + { +@@ -4213,7 +4625,7 @@ void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS){ + u8 avg_signal_qual = 0; + u32 num_signal_strength = 0; + u32 num_signal_qual = 0; +- u8 _alpha = 5; // this value is based on converging_constant = 5000 and sampling_interval = 1000 ++ u8 ratio_pre_stat = 0, ratio_curr_stat = 0, ratio_total = 0, ratio_profile = SIGNAL_STAT_CALC_PROFILE_0; + + if(adapter->recvpriv.is_signal_dbg) { + //update the user specific value, signal_strength_dbg, to signal_strength, rssi +@@ -4254,21 +4666,28 @@ void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS){ + goto set_timer; + #endif + ++ if (RTW_SIGNAL_STATE_CALC_PROFILE < SIGNAL_STAT_CALC_PROFILE_MAX) ++ ratio_profile = RTW_SIGNAL_STATE_CALC_PROFILE; ++ ++ ratio_pre_stat = signal_stat_calc_profile[ratio_profile][0]; ++ ratio_curr_stat = signal_stat_calc_profile[ratio_profile][1]; ++ ratio_total = ratio_pre_stat + ratio_curr_stat; ++ + //update value of signal_strength, rssi, signal_qual +- tmp_s = (avg_signal_strength+(_alpha-1)*recvpriv->signal_strength); +- if(tmp_s %_alpha) +- tmp_s = tmp_s/_alpha + 1; ++ tmp_s = (ratio_curr_stat * avg_signal_strength + ratio_pre_stat * recvpriv->signal_strength); ++ if (tmp_s % ratio_total) ++ tmp_s = tmp_s / ratio_total + 1; + else +- tmp_s = tmp_s/_alpha; +- if(tmp_s>100) ++ tmp_s = tmp_s / ratio_total; ++ if (tmp_s > 100) + tmp_s = 100; + +- tmp_q = (avg_signal_qual+(_alpha-1)*recvpriv->signal_qual); +- if(tmp_q %_alpha) +- tmp_q = tmp_q/_alpha + 1; ++ tmp_q = (ratio_curr_stat * avg_signal_qual + ratio_pre_stat * recvpriv->signal_qual); ++ if (tmp_q % ratio_total) ++ tmp_q = tmp_q / ratio_total + 1; + else +- tmp_q = tmp_q/_alpha; +- if(tmp_q>100) ++ tmp_q = tmp_q / ratio_total; ++ if (tmp_q > 100) + tmp_q = 100; + + recvpriv->signal_strength = tmp_s; +@@ -4296,5 +4715,255 @@ set_timer: + } + #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS + ++static void rx_process_rssi(_adapter *padapter,union recv_frame *prframe) ++{ ++ u32 last_rssi, tmp_val; ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data; ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ //DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength); ++ //if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) ++ { ++ #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ if(signal_stat->update_req) { ++ signal_stat->total_num = 0; ++ signal_stat->total_val = 0; ++ signal_stat->update_req = 0; ++ } ++ ++ signal_stat->total_num++; ++ signal_stat->total_val += pattrib->phy_info.SignalStrength; ++ signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; ++ #else //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ //Adapter->RxStats.RssiCalculateCnt++; //For antenna Test ++ if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX) ++ { ++ padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX; ++ last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index]; ++ padapter->recvpriv.signal_strength_data.total_val -= last_rssi; ++ } ++ padapter->recvpriv.signal_strength_data.total_val +=pattrib->phy_info.SignalStrength; ++ ++ padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->phy_info.SignalStrength; ++ if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX) ++ padapter->recvpriv.signal_strength_data.index = 0; ++ ++ ++ tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num; ++ ++ if(padapter->recvpriv.is_signal_dbg) { ++ padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg; ++ padapter->recvpriv.rssi=(s8)translate_percentage_to_dbm(padapter->recvpriv.signal_strength_dbg); ++ } else { ++ padapter->recvpriv.signal_strength= tmp_val; ++ padapter->recvpriv.rssi=(s8)translate_percentage_to_dbm(tmp_val); ++ } ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num)); ++ #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ } ++} ++ ++static void rx_process_link_qual(_adapter *padapter,union recv_frame *prframe) ++{ ++ u32 last_evm=0, tmpVal; ++ struct rx_pkt_attrib *pattrib; ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ struct signal_stat * signal_stat; ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ if(prframe == NULL || padapter==NULL){ ++ return; ++ } + ++ pattrib = &prframe->u.hdr.attrib; ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ signal_stat = &padapter->recvpriv.signal_qual_data; ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ //DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual); ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ if(signal_stat->update_req) { ++ signal_stat->total_num = 0; ++ signal_stat->total_val = 0; ++ signal_stat->update_req = 0; ++ } ++ ++ signal_stat->total_num++; ++ signal_stat->total_val += pattrib->phy_info.SignalQuality; ++ signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; ++ ++#else //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ if(pattrib->phy_info.SignalQuality != 0) ++ { ++ // ++ // 1. Record the general EVM to the sliding window. ++ // ++ if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) ++ { ++ padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; ++ last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; ++ padapter->recvpriv.signal_qual_data.total_val -= last_evm; ++ } ++ padapter->recvpriv.signal_qual_data.total_val += pattrib->phy_info.SignalQuality; ++ ++ padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->phy_info.SignalQuality; ++ if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) ++ padapter->recvpriv.signal_qual_data.index = 0; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->phy_info.SignalQuality)); ++ ++ // <1> Showed on UI for user, in percentage. ++ tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num; ++ padapter->recvpriv.signal_qual=(u8)tmpVal; ++ ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->phy_info.SignalQuality)); ++ } ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++} ++ ++void rx_process_phy_info(_adapter *padapter, union recv_frame *rframe) ++{ ++ /* Check RSSI */ ++ rx_process_rssi(padapter, rframe); ++ ++ /* Check PWDB */ ++ //process_PWDB(padapter, rframe); ++ ++ //UpdateRxSignalStatistics8192C(Adapter, pRfd); ++ ++ /* Check EVM */ ++ rx_process_link_qual(padapter, rframe); ++ #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA ++ rtw_store_phy_info( padapter, rframe); ++ #endif ++} + ++void rx_query_phy_status( ++ union recv_frame *precvframe, ++ u8 *pphy_status) ++{ ++ PADAPTER padapter = precvframe->u.hdr.adapter; ++ struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ PODM_PHY_INFO_T pPHYInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info); ++ u8 *wlanhdr; ++ ODM_PACKET_INFO_T pkt_info; ++ u8 *sa; ++ struct sta_priv *pstapriv; ++ struct sta_info *psta = NULL; ++ struct dvobj_priv *psdpriv = padapter->dvobj; ++ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; ++ //_irqL irqL; ++ ++ pkt_info.bPacketMatchBSSID =_FALSE; ++ pkt_info.bPacketToSelf = _FALSE; ++ pkt_info.bPacketBeacon = _FALSE; ++ ++ wlanhdr = get_recvframe_data(precvframe); ++ ++ pkt_info.bPacketMatchBSSID = (!IsFrameTypeCtrl(wlanhdr)) ++ && (!pattrib->icv_err) && (!pattrib->crc_err) ++ && _rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN); ++ ++ pkt_info.bToSelf = (!pattrib->icv_err) && (!pattrib->crc_err) ++ && _rtw_memcmp(get_ra(wlanhdr), adapter_mac_addr(padapter), ETH_ALEN); ++ ++ pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID ++ && _rtw_memcmp(get_ra(wlanhdr), adapter_mac_addr(padapter), ETH_ALEN); ++ ++ pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID ++ && (GetFrameSubType(wlanhdr) == WIFI_BEACON); ++ ++ sa = get_ta(wlanhdr); ++ ++ pkt_info.StationID = 0xFF; ++ ++ if (_rtw_memcmp(adapter_mac_addr(padapter), sa, ETH_ALEN) == _TRUE) { ++ static u32 start_time = 0; ++ ++#if 0 /*For debug */ ++ if (IsFrameTypeCtrl(wlanhdr)) { ++ DBG_871X("-->Control frame: Y\n"); ++ DBG_871X("-->pkt_len: %d\n", pattrib->pkt_len); ++ DBG_871X("-->Sub Type = 0x%X\n", GetFrameSubType(wlanhdr)); ++ } ++ ++ /* Dump first 40 bytes of header */ ++ int i = 0; ++ ++ for (i = 0; i < 40; i++) ++ DBG_871X("%d: %X\n", i, *((u8 *)wlanhdr + i)); ++ ++ DBG_871X("\n"); ++#endif ++ ++ if ((start_time == 0) || (rtw_get_passing_time_ms(start_time) > 5000)) { ++ DBG_871X_LEVEL(_drv_always_, "Warning!!! %s: Confilc mac addr!!\n", __func__); ++ start_time = rtw_get_current_time(); ++ } ++ pdbgpriv->dbg_rx_conflic_mac_addr_cnt++; ++ } else{ ++ pstapriv = &padapter->stapriv; ++ psta = rtw_get_stainfo(pstapriv, sa); ++ if (psta) ++ pkt_info.StationID = psta->mac_id; ++ } ++ ++ pkt_info.DataRate = pattrib->data_rate; ++ ++ //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); ++ ODM_PhyStatusQuery(&pHalData->odmpriv, pPHYInfo, pphy_status, &pkt_info); ++ if (psta) ++ psta->rssi = pattrib->phy_info.RecvSignalPower; ++ //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); ++ ++ { ++ precvframe->u.hdr.psta = NULL; ++ if (pkt_info.bPacketMatchBSSID ++ && (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) ++ ) { ++ if (psta) { ++ precvframe->u.hdr.psta = psta; ++ rx_process_phy_info(padapter, precvframe); ++ } ++ } else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) { ++ if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) { ++ if (psta) ++ precvframe->u.hdr.psta = psta; ++ } ++ rx_process_phy_info(padapter, precvframe); ++ } ++ } ++} ++/* ++* Increase and check if the continual_no_rx_packet of this @param pmlmepriv is larger than MAX_CONTINUAL_NORXPACKET_COUNT ++* @return _TRUE: ++* @return _FALSE: ++*/ ++int rtw_inc_and_chk_continual_no_rx_packet(struct sta_info *sta, int tid_index) ++{ ++ ++ int ret = _FALSE; ++ int value = ATOMIC_INC_RETURN(&sta->continual_no_rx_packet[tid_index]); ++ ++ if (value >= MAX_CONTINUAL_NORXPACKET_COUNT) ++ ret = _TRUE; ++ ++ return ret; ++} ++ ++/* ++* Set the continual_no_rx_packet of this @param pmlmepriv to 0 ++*/ ++void rtw_reset_continual_no_rx_packet(struct sta_info *sta, int tid_index) ++{ ++ ATOMIC_SET(&sta->continual_no_rx_packet[tid_index], 0); ++} +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_rf.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_rf.c +old mode 100755 +new mode 100644 +index f3d46e8..a2299ec +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_rf.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_rf.c +@@ -20,72 +20,722 @@ + #define _RTW_RF_C_ + + #include ++#include + ++u8 center_ch_5g_all[CENTER_CH_5G_ALL_NUM] = { ++ 36, 38, 40, 42, 44, 46, 48, /* Band 1 */ ++ 52, 54, 56, 58, 60, 62, 64, /* Band 2 */ ++ 100, 102, 104, 106, 108, 110, 112, /* Band 3 */ ++ 116, 118, 120, 122, 124, 126, 128, /* Band 3 */ ++ 132, 134, 136, 138, 140, 142, 144, /* Band 3 */ ++ 149, 151, 153, 155, 157, 159, 161, /* Band 4 */ ++ 165, 167, 169, 171, 173, 175, 177}; /* Band 4 */ + +-struct ch_freq { +- u32 channel; +- u32 frequency; +-}; +- +-struct ch_freq ch_freq_map[] = { +- {1, 2412},{2, 2417},{3, 2422},{4, 2427},{5, 2432}, +- {6, 2437},{7, 2442},{8, 2447},{9, 2452},{10, 2457}, +- {11, 2462},{12, 2467},{13, 2472},{14, 2484}, +- /* UNII */ +- {36, 5180},{40, 5200},{44, 5220},{48, 5240},{52, 5260}, +- {56, 5280},{60, 5300},{64, 5320},{149, 5745},{153, 5765}, +- {157, 5785},{161, 5805},{165, 5825},{167, 5835},{169, 5845}, +- {171, 5855},{173, 5865}, +- /* HiperLAN2 */ +- {100, 5500},{104, 5520},{108, 5540},{112, 5560},{116, 5580}, +- {120, 5600},{124, 5620},{128, 5640},{132, 5660},{136, 5680}, +- {140, 5700}, +- /* Japan MMAC */ +- {34, 5170},{38, 5190},{42, 5210},{46, 5230}, +- /* Japan */ +- {184, 4920},{188, 4940},{192, 4960},{196, 4980}, +- {208, 5040},/* Japan, means J08 */ +- {212, 5060},/* Japan, means J12 */ +- {216, 5080},/* Japan, means J16 */ +-}; +- +-int ch_freq_map_num = (sizeof(ch_freq_map) / sizeof(struct ch_freq)); +- +-u32 rtw_ch2freq(u32 channel) ++u8 center_ch_5g_20m[CENTER_CH_5G_20M_NUM] = { ++ 36, 40, 44, 48, ++ 52, 56, 60, 64, ++ 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, ++ 149, 153, 157, 161, 165, 169, 173, 177 ++}; ++ ++u8 center_ch_5g_40m[CENTER_CH_5G_40M_NUM] = {38, 46, 54, 62, 102, 110, 118, 126, 134, 142, 151, 159, 167, 175}; ++ ++u8 center_ch_5g_80m[CENTER_CH_5G_80M_NUM] = {42, 58, 106, 122, 138, 155, 171}; ++ ++struct center_chs_ent { ++ u8 ch_num; ++ u8 *chs; ++}; ++ ++struct center_chs_ent center_chs_5g_by_bw[] = { ++ {CENTER_CH_5G_20M_NUM, center_ch_5g_20m}, ++ {CENTER_CH_5G_40M_NUM, center_ch_5g_40m}, ++ {CENTER_CH_5G_80M_NUM, center_ch_5g_80m}, ++}; ++ ++inline u8 center_chs_5g_num(u8 bw) + { +- u8 i; +- u32 freq = 0; +- +- for (i = 0; i < ch_freq_map_num; i++) +- { +- if (channel == ch_freq_map[i].channel) +- { +- freq = ch_freq_map[i].frequency; +- break; ++ if (bw >= CHANNEL_WIDTH_160) ++ return 0; ++ ++ return center_chs_5g_by_bw[bw].ch_num; ++} ++ ++inline u8 center_chs_5g(u8 bw, u8 id) ++{ ++ if (bw >= CHANNEL_WIDTH_160) ++ return 0; ++ ++ if (id >= center_chs_5g_num(bw)) ++ return 0; ++ ++ return center_chs_5g_by_bw[bw].chs[id]; ++} ++ ++int rtw_ch2freq(int chan) ++{ ++ /* see 802.11 17.3.8.3.2 and Annex J ++ * there are overlapping channel numbers in 5GHz and 2GHz bands */ ++ ++ /* ++ * RTK: don't consider the overlapping channel numbers: 5G channel <= 14, ++ * because we don't support it. simply judge from channel number ++ */ ++ ++ if (chan >= 1 && chan <= 14) { ++ if (chan == 14) ++ return 2484; ++ else if (chan < 14) ++ return 2407 + chan * 5; ++ } else if (chan >= 36 && chan <= 177) { ++ return 5000 + chan * 5; ++ } ++ ++ return 0; /* not supported */ ++} ++ ++int rtw_freq2ch(int freq) ++{ ++ /* see 802.11 17.3.8.3.2 and Annex J */ ++ if (freq == 2484) ++ return 14; ++ else if (freq < 2484) ++ return (freq - 2407) / 5; ++ else if (freq >= 4910 && freq <= 4980) ++ return (freq - 4000) / 5; ++ else if (freq <= 45000) /* DMG band lower limit */ ++ return (freq - 5000) / 5; ++ else if (freq >= 58320 && freq <= 64800) ++ return (freq - 56160) / 2160; ++ else ++ return 0; ++} ++ ++bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo) ++{ ++ u8 c_ch; ++ u32 freq; ++ u32 hi_ret = 0, lo_ret = 0; ++ int i; ++ bool valid = _FALSE; ++ ++ if (hi) ++ *hi = 0; ++ if (lo) ++ *lo = 0; ++ ++ c_ch = rtw_get_center_ch(ch, bw, offset); ++ freq = rtw_ch2freq(c_ch); ++ ++ if (!freq) { ++ rtw_warn_on(1); ++ goto exit; ++ } ++ ++ if (bw == CHANNEL_WIDTH_80) { ++ hi_ret = freq + 40; ++ lo_ret = freq - 40; ++ } else if (bw == CHANNEL_WIDTH_40) { ++ hi_ret = freq + 20; ++ lo_ret = freq - 20; ++ } else if (bw == CHANNEL_WIDTH_20) { ++ hi_ret = freq + 10; ++ lo_ret = freq - 10; ++ } else { ++ rtw_warn_on(1); ++ } ++ ++ if (hi) ++ *hi = hi_ret; ++ if (lo) ++ *lo = lo_ret; ++ ++ valid = _TRUE; ++ ++exit: ++ return valid; ++} ++ ++const char * const _ch_width_str[] = { ++ "20MHz", ++ "40MHz", ++ "80MHz", ++ "160MHz", ++ "80_80MHz", ++ "CHANNEL_WIDTH_MAX", ++}; ++ ++const u8 _ch_width_to_bw_cap[] = { ++ BW_CAP_20M, ++ BW_CAP_40M, ++ BW_CAP_80M, ++ BW_CAP_160M, ++ BW_CAP_80_80M, ++ 0, ++}; ++ ++const char * const _band_str[] = { ++ "2.4G", ++ "5G", ++ "BOTH", ++ "BAND_MAX", ++}; ++ ++const u8 _band_to_band_cap[] = { ++ BAND_CAP_2G, ++ BAND_CAP_5G, ++ 0, ++ 0, ++}; ++ ++#ifdef CONFIG_80211AC_VHT ++#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) , .en_11ac = (_val) ++#else ++#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) ++#endif ++ ++#if RTW_DEF_MODULE_REGULATORY_CERT ++#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) , .def_module_flags = (_val) ++#else ++#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) ++#endif ++ ++/* has def_module_flags specified, used by common map and HAL dfference map */ ++#define COUNTRY_CHPLAN_ENT(_alpha2, _chplan, _en_11ac, _def_module_flags) \ ++ {.alpha2 = (_alpha2), .chplan = (_chplan) \ ++ COUNTRY_CHPLAN_ASSIGN_EN_11AC(_en_11ac) \ ++ COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_def_module_flags) \ ++ } ++ ++#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP ++ ++#include "../platform/custom_country_chplan.h" ++ ++#elif RTW_DEF_MODULE_REGULATORY_CERT ++ ++#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2) ++static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_map[] = { ++ COUNTRY_CHPLAN_ENT("CN", 0x51, 1, 0xFB), /* China */ ++ COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0xFB), /* Russia(fac/gost), Kaliningrad */ ++ COUNTRY_CHPLAN_ENT("UA", 0x26, 0, 0xFB), /* Ukraine */ ++}; ++static const u16 RTL8821AE_HMC_M2_country_chplan_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_map)/sizeof(struct country_chplan); ++#endif ++ ++#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU) ++static const struct country_chplan RTL8821AU_country_chplan_map[] = { ++ COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0xFB), /* Russia(fac/gost), Kaliningrad */ ++ COUNTRY_CHPLAN_ENT("UA", 0x26, 0, 0xFB), /* Ukraine */ ++}; ++static const u16 RTL8821AU_country_chplan_map_sz = sizeof(RTL8821AU_country_chplan_map)/sizeof(struct country_chplan); ++#endif ++ ++#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF) ++static const struct country_chplan RTL8812AENF_NGFF_country_chplan_map[] = { ++}; ++static const u16 RTL8812AENF_NGFF_country_chplan_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_map)/sizeof(struct country_chplan); ++#endif ++ ++#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC) ++static const struct country_chplan RTL8812AEBT_HMC_country_chplan_map[] = { ++}; ++static const u16 RTL8812AEBT_HMC_country_chplan_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_map)/sizeof(struct country_chplan); ++#endif ++ ++#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2) ++static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_map[] = { ++}; ++static const u16 RTL8188EE_HMC_M2_country_chplan_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_map)/sizeof(struct country_chplan); ++#endif ++ ++#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2) ++static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_map[] = { ++}; ++static const u16 RTL8723BE_HMC_M2_country_chplan_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_map)/sizeof(struct country_chplan); ++#endif ++ ++#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216) ++static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_map[] = { ++}; ++static const u16 RTL8723BS_NGFF1216_country_chplan_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_map)/sizeof(struct country_chplan); ++#endif ++ ++#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2) ++static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_map[] = { ++}; ++static const u16 RTL8192EEBT_HMC_M2_country_chplan_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_map)/sizeof(struct country_chplan); ++#endif ++ ++/** ++ * rtw_def_module_get_chplan_from_country - ++ * @country_code: string of country code ++ * @return: ++ * Return NULL for case referring to common map ++ */ ++static const struct country_chplan *rtw_def_module_get_chplan_from_country(const char *country_code) ++{ ++ const struct country_chplan *ent = NULL; ++ const struct country_chplan *hal_map = NULL; ++ u16 hal_map_sz = 0; ++ int i; ++ ++ /* TODO: runtime selection for multi driver */ ++#if (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AE_HMC_M2) ++ hal_map = RTL8821AE_HMC_M2_country_chplan_map; ++ hal_map_sz = RTL8821AE_HMC_M2_country_chplan_map_sz; ++#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AU) ++ hal_map = RTL8821AU_country_chplan_map; ++ hal_map_sz = RTL8821AU_country_chplan_map_sz; ++#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AENF_NGFF) ++ hal_map = RTL8812AENF_NGFF_country_chplan_map; ++ hal_map_sz = RTL8812AENF_NGFF_country_chplan_map_sz; ++#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AEBT_HMC) ++ hal_map = RTL8812AEBT_HMC_country_chplan_map; ++ hal_map_sz = RTL8812AEBT_HMC_country_chplan_map_sz; ++#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8188EE_HMC_M2) ++ hal_map = RTL8188EE_HMC_M2_country_chplan_map; ++ hal_map_sz = RTL8188EE_HMC_M2_country_chplan_map_sz; ++#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BE_HMC_M2) ++ hal_map = RTL8723BE_HMC_M2_country_chplan_map; ++ hal_map_sz = RTL8723BE_HMC_M2_country_chplan_map_sz; ++#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BS_NGFF1216) ++ hal_map = RTL8723BS_NGFF1216_country_chplan_map; ++ hal_map_sz = RTL8723BS_NGFF1216_country_chplan_map_sz; ++#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8192EEBT_HMC_M2) ++ hal_map = RTL8192EEBT_HMC_M2_country_chplan_map; ++ hal_map_sz = RTL8192EEBT_HMC_M2_country_chplan_map_sz; ++#endif ++ ++ if (hal_map == NULL || hal_map_sz == 0) ++ goto exit; ++ ++ for (i = 0; i < hal_map_sz; i++) { ++ if (strncmp(country_code, hal_map[i].alpha2, 2) == 0) { ++ ent = &hal_map[i]; ++ break; + } + } +- if (i == ch_freq_map_num) +- freq = 2412; + +- return freq; ++exit: ++ return ent; + } ++#endif /* CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP or RTW_DEF_MODULE_REGULATORY_CERT */ ++ ++static const struct country_chplan country_chplan_map[] = { ++ COUNTRY_CHPLAN_ENT("AD", 0x26, 1, 0x00), /* Andorra */ ++ COUNTRY_CHPLAN_ENT("AE", 0x26, 1, 0xFB), /* United Arab Emirates */ ++ COUNTRY_CHPLAN_ENT("AF", 0x42, 1, 0x00), /* Afghanistan */ ++ COUNTRY_CHPLAN_ENT("AG", 0x30, 1, 0x00), /* Antigua & Barbuda */ ++ COUNTRY_CHPLAN_ENT("AI", 0x26, 1, 0x00), /* Anguilla(UK) */ ++ COUNTRY_CHPLAN_ENT("AL", 0x26, 1, 0xF1), /* Albania */ ++ COUNTRY_CHPLAN_ENT("AM", 0x26, 1, 0xB0), /* Armenia */ ++ COUNTRY_CHPLAN_ENT("AO", 0x26, 1, 0xE0), /* Angola */ ++ COUNTRY_CHPLAN_ENT("AQ", 0x26, 1, 0x00), /* Antarctica */ ++ COUNTRY_CHPLAN_ENT("AR", 0x57, 1, 0xF3), /* Argentina */ ++ COUNTRY_CHPLAN_ENT("AS", 0x34, 1, 0x00), /* American Samoa */ ++ COUNTRY_CHPLAN_ENT("AT", 0x26, 1, 0xFB), /* Austria */ ++ COUNTRY_CHPLAN_ENT("AU", 0x45, 1, 0xFB), /* Australia */ ++ COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0xB0), /* Aruba */ ++ COUNTRY_CHPLAN_ENT("AZ", 0x26, 1, 0xF1), /* Azerbaijan */ ++ COUNTRY_CHPLAN_ENT("BA", 0x26, 1, 0xF1), /* Bosnia & Herzegovina */ ++ COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0x50), /* Barbados */ ++ COUNTRY_CHPLAN_ENT("BD", 0x26, 1, 0xF1), /* Bangladesh */ ++ COUNTRY_CHPLAN_ENT("BE", 0x26, 1, 0xFB), /* Belgium */ ++ COUNTRY_CHPLAN_ENT("BF", 0x26, 1, 0xB0), /* Burkina Faso */ ++ COUNTRY_CHPLAN_ENT("BG", 0x26, 1, 0xF1), /* Bulgaria */ ++ COUNTRY_CHPLAN_ENT("BH", 0x47, 1, 0xF1), /* Bahrain */ ++ COUNTRY_CHPLAN_ENT("BI", 0x26, 1, 0xB0), /* Burundi */ ++ COUNTRY_CHPLAN_ENT("BJ", 0x26, 1, 0xB0), /* Benin */ ++ COUNTRY_CHPLAN_ENT("BN", 0x47, 1, 0x10), /* Brunei */ ++ COUNTRY_CHPLAN_ENT("BO", 0x30, 1, 0xF1), /* Bolivia */ ++ COUNTRY_CHPLAN_ENT("BR", 0x34, 1, 0xF1), /* Brazil */ ++ COUNTRY_CHPLAN_ENT("BS", 0x34, 1, 0x20), /* Bahamas */ ++ COUNTRY_CHPLAN_ENT("BW", 0x26, 1, 0xF1), /* Botswana */ ++ COUNTRY_CHPLAN_ENT("BY", 0x26, 1, 0xF1), /* Belarus */ ++ COUNTRY_CHPLAN_ENT("BZ", 0x34, 1, 0x00), /* Belize */ ++ COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0xFB), /* Canada */ ++ COUNTRY_CHPLAN_ENT("CC", 0x26, 1, 0x00), /* Cocos (Keeling) Islands (Australia) */ ++ COUNTRY_CHPLAN_ENT("CD", 0x26, 1, 0xB0), /* Congo, Republic of the */ ++ COUNTRY_CHPLAN_ENT("CF", 0x26, 1, 0xB0), /* Central African Republic */ ++ COUNTRY_CHPLAN_ENT("CG", 0x26, 1, 0xB0), /* Congo, Democratic Republic of the. Zaire */ ++ COUNTRY_CHPLAN_ENT("CH", 0x26, 1, 0xFB), /* Switzerland */ ++ COUNTRY_CHPLAN_ENT("CI", 0x26, 1, 0xF1), /* Cote d'Ivoire */ ++ COUNTRY_CHPLAN_ENT("CK", 0x26, 1, 0x00), /* Cook Islands */ ++ COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0xF1), /* Chile */ ++ COUNTRY_CHPLAN_ENT("CM", 0x26, 1, 0xB0), /* Cameroon */ ++ COUNTRY_CHPLAN_ENT("CN", 0x48, 1, 0xFB), /* China */ ++ COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0xF1), /* Colombia */ ++ COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0xF1), /* Costa Rica */ ++ COUNTRY_CHPLAN_ENT("CV", 0x26, 1, 0xB0), /* Cape Verde */ ++ COUNTRY_CHPLAN_ENT("CX", 0x45, 1, 0x00), /* Christmas Island (Australia) */ ++ COUNTRY_CHPLAN_ENT("CY", 0x26, 1, 0xFB), /* Cyprus */ ++ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1, 0xFB), /* Czech Republic */ ++ COUNTRY_CHPLAN_ENT("DE", 0x26, 1, 0xFB), /* Germany */ ++ COUNTRY_CHPLAN_ENT("DJ", 0x26, 1, 0x80), /* Djibouti */ ++ COUNTRY_CHPLAN_ENT("DK", 0x26, 1, 0xFB), /* Denmark */ ++ COUNTRY_CHPLAN_ENT("DM", 0x34, 1, 0x00), /* Dominica */ ++ COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0xF1), /* Dominican Republic */ ++ COUNTRY_CHPLAN_ENT("DZ", 0x26, 1, 0xF1), /* Algeria */ ++ COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0xF1), /* Ecuador */ ++ COUNTRY_CHPLAN_ENT("EE", 0x26, 1, 0xFB), /* Estonia */ ++ COUNTRY_CHPLAN_ENT("EG", 0x47, 0, 0xF1), /* Egypt */ ++ COUNTRY_CHPLAN_ENT("EH", 0x47, 1, 0x80), /* Western Sahara */ ++ COUNTRY_CHPLAN_ENT("ER", 0x26, 1, 0x00), /* Eritrea */ ++ COUNTRY_CHPLAN_ENT("ES", 0x26, 1, 0xFB), /* Spain, Canary Islands, Ceuta, Melilla */ ++ COUNTRY_CHPLAN_ENT("ET", 0x26, 1, 0xB0), /* Ethiopia */ ++ COUNTRY_CHPLAN_ENT("FI", 0x26, 1, 0xFB), /* Finland */ ++ COUNTRY_CHPLAN_ENT("FJ", 0x34, 1, 0x00), /* Fiji */ ++ COUNTRY_CHPLAN_ENT("FK", 0x26, 1, 0x00), /* Falkland Islands (Islas Malvinas) (UK) */ ++ COUNTRY_CHPLAN_ENT("FM", 0x34, 1, 0x00), /* Micronesia, Federated States of (USA) */ ++ COUNTRY_CHPLAN_ENT("FO", 0x26, 1, 0x00), /* Faroe Islands (Denmark) */ ++ COUNTRY_CHPLAN_ENT("FR", 0x26, 1, 0xFB), /* France */ ++ COUNTRY_CHPLAN_ENT("GA", 0x26, 1, 0xB0), /* Gabon */ ++ COUNTRY_CHPLAN_ENT("GB", 0x26, 1, 0xFB), /* Great Britain (United Kingdom; England) */ ++ COUNTRY_CHPLAN_ENT("GD", 0x34, 1, 0xB0), /* Grenada */ ++ COUNTRY_CHPLAN_ENT("GE", 0x26, 1, 0x00), /* Georgia */ ++ COUNTRY_CHPLAN_ENT("GF", 0x26, 1, 0x80), /* French Guiana */ ++ COUNTRY_CHPLAN_ENT("GG", 0x26, 1, 0x00), /* Guernsey (UK) */ ++ COUNTRY_CHPLAN_ENT("GH", 0x26, 1, 0xF1), /* Ghana */ ++ COUNTRY_CHPLAN_ENT("GI", 0x26, 1, 0x00), /* Gibraltar (UK) */ ++ COUNTRY_CHPLAN_ENT("GL", 0x26, 1, 0x00), /* Greenland (Denmark) */ ++ COUNTRY_CHPLAN_ENT("GM", 0x26, 1, 0xB0), /* Gambia */ ++ COUNTRY_CHPLAN_ENT("GN", 0x26, 1, 0x10), /* Guinea */ ++ COUNTRY_CHPLAN_ENT("GP", 0x26, 1, 0x00), /* Guadeloupe (France) */ ++ COUNTRY_CHPLAN_ENT("GQ", 0x26, 1, 0xB0), /* Equatorial Guinea */ ++ COUNTRY_CHPLAN_ENT("GR", 0x26, 1, 0xFB), /* Greece */ ++ COUNTRY_CHPLAN_ENT("GS", 0x26, 1, 0x00), /* South Georgia and the Sandwich Islands (UK) */ ++ COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0xF1), /* Guatemala */ ++ COUNTRY_CHPLAN_ENT("GU", 0x34, 1, 0x00), /* Guam (USA) */ ++ COUNTRY_CHPLAN_ENT("GW", 0x26, 1, 0xB0), /* Guinea-Bissau */ ++ COUNTRY_CHPLAN_ENT("GY", 0x44, 1, 0x00), /* Guyana */ ++ COUNTRY_CHPLAN_ENT("HK", 0x26, 1, 0xFB), /* Hong Kong */ ++ COUNTRY_CHPLAN_ENT("HM", 0x45, 1, 0x00), /* Heard and McDonald Islands (Australia) */ ++ COUNTRY_CHPLAN_ENT("HN", 0x32, 1, 0xF1), /* Honduras */ ++ COUNTRY_CHPLAN_ENT("HR", 0x26, 1, 0xF9), /* Croatia */ ++ COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0x50), /* Haiti */ ++ COUNTRY_CHPLAN_ENT("HU", 0x26, 1, 0xFB), /* Hungary */ ++ COUNTRY_CHPLAN_ENT("ID", 0x54, 0, 0xF3), /* Indonesia */ ++ COUNTRY_CHPLAN_ENT("IE", 0x26, 1, 0xFB), /* Ireland */ ++ COUNTRY_CHPLAN_ENT("IL", 0x47, 1, 0xF1), /* Israel */ ++ COUNTRY_CHPLAN_ENT("IM", 0x26, 1, 0x00), /* Isle of Man (UK) */ ++ COUNTRY_CHPLAN_ENT("IN", 0x47, 1, 0xF1), /* India */ ++ COUNTRY_CHPLAN_ENT("IQ", 0x26, 1, 0x00), /* Iraq */ ++ COUNTRY_CHPLAN_ENT("IR", 0x26, 0, 0x00), /* Iran */ ++ COUNTRY_CHPLAN_ENT("IS", 0x26, 1, 0xFB), /* Iceland */ ++ COUNTRY_CHPLAN_ENT("IT", 0x26, 1, 0xFB), /* Italy */ ++ COUNTRY_CHPLAN_ENT("JE", 0x26, 1, 0x00), /* Jersey (UK) */ ++ COUNTRY_CHPLAN_ENT("JM", 0x51, 1, 0xF1), /* Jamaica */ ++ COUNTRY_CHPLAN_ENT("JO", 0x49, 1, 0xFB), /* Jordan */ ++ COUNTRY_CHPLAN_ENT("JP", 0x27, 1, 0xFF), /* Japan- Telec */ ++ COUNTRY_CHPLAN_ENT("KE", 0x47, 1, 0xF9), /* Kenya */ ++ COUNTRY_CHPLAN_ENT("KG", 0x26, 1, 0xF1), /* Kyrgyzstan */ ++ COUNTRY_CHPLAN_ENT("KH", 0x26, 1, 0xF1), /* Cambodia */ ++ COUNTRY_CHPLAN_ENT("KI", 0x26, 1, 0x00), /* Kiribati */ ++ COUNTRY_CHPLAN_ENT("KN", 0x34, 1, 0x00), /* Saint Kitts and Nevis */ ++ COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0xFB), /* South Korea */ ++ COUNTRY_CHPLAN_ENT("KW", 0x47, 1, 0xFB), /* Kuwait */ ++ COUNTRY_CHPLAN_ENT("KY", 0x34, 1, 0x00), /* Cayman Islands (UK) */ ++ COUNTRY_CHPLAN_ENT("KZ", 0x26, 1, 0x00), /* Kazakhstan */ ++ COUNTRY_CHPLAN_ENT("LA", 0x26, 1, 0x00), /* Laos */ ++ COUNTRY_CHPLAN_ENT("LB", 0x26, 1, 0xF1), /* Lebanon */ ++ COUNTRY_CHPLAN_ENT("LC", 0x34, 1, 0x00), /* Saint Lucia */ ++ COUNTRY_CHPLAN_ENT("LI", 0x26, 1, 0xFB), /* Liechtenstein */ ++ COUNTRY_CHPLAN_ENT("LK", 0x26, 1, 0xF1), /* Sri Lanka */ ++ COUNTRY_CHPLAN_ENT("LR", 0x26, 1, 0xB0), /* Liberia */ ++ COUNTRY_CHPLAN_ENT("LS", 0x26, 1, 0xF1), /* Lesotho */ ++ COUNTRY_CHPLAN_ENT("LT", 0x26, 1, 0xFB), /* Lithuania */ ++ COUNTRY_CHPLAN_ENT("LU", 0x26, 1, 0xFB), /* Luxembourg */ ++ COUNTRY_CHPLAN_ENT("LV", 0x26, 1, 0xFB), /* Latvia */ ++ COUNTRY_CHPLAN_ENT("LY", 0x26, 1, 0x00), /* Libya */ ++ COUNTRY_CHPLAN_ENT("MA", 0x47, 1, 0xF1), /* Morocco */ ++ COUNTRY_CHPLAN_ENT("MC", 0x26, 1, 0xFB), /* Monaco */ ++ COUNTRY_CHPLAN_ENT("MD", 0x26, 1, 0xF1), /* Moldova */ ++ COUNTRY_CHPLAN_ENT("ME", 0x26, 1, 0xF1), /* Montenegro */ ++ COUNTRY_CHPLAN_ENT("MF", 0x34, 1, 0x00), /* Saint Martin */ ++ COUNTRY_CHPLAN_ENT("MG", 0x26, 1, 0x20), /* Madagascar */ ++ COUNTRY_CHPLAN_ENT("MH", 0x34, 1, 0x00), /* Marshall Islands (USA) */ ++ COUNTRY_CHPLAN_ENT("MK", 0x26, 1, 0xF1), /* Republic of Macedonia (FYROM) */ ++ COUNTRY_CHPLAN_ENT("ML", 0x26, 1, 0xB0), /* Mali */ ++ COUNTRY_CHPLAN_ENT("MM", 0x26, 1, 0x00), /* Burma (Myanmar) */ ++ COUNTRY_CHPLAN_ENT("MN", 0x26, 1, 0x00), /* Mongolia */ ++ COUNTRY_CHPLAN_ENT("MO", 0x26, 1, 0x00), /* Macau */ ++ COUNTRY_CHPLAN_ENT("MP", 0x34, 1, 0x00), /* Northern Mariana Islands (USA) */ ++ COUNTRY_CHPLAN_ENT("MQ", 0x26, 1, 0x40), /* Martinique (France) */ ++ COUNTRY_CHPLAN_ENT("MR", 0x26, 1, 0xA0), /* Mauritania */ ++ COUNTRY_CHPLAN_ENT("MS", 0x26, 1, 0x00), /* Montserrat (UK) */ ++ COUNTRY_CHPLAN_ENT("MT", 0x26, 1, 0xFB), /* Malta */ ++ COUNTRY_CHPLAN_ENT("MU", 0x26, 1, 0xB0), /* Mauritius */ ++ COUNTRY_CHPLAN_ENT("MV", 0x26, 1, 0x00), /* Maldives */ ++ COUNTRY_CHPLAN_ENT("MW", 0x26, 1, 0xB0), /* Malawi */ ++ COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0xF1), /* Mexico */ ++ COUNTRY_CHPLAN_ENT("MY", 0x47, 1, 0xF1), /* Malaysia */ ++ COUNTRY_CHPLAN_ENT("MZ", 0x26, 1, 0xF1), /* Mozambique */ ++ COUNTRY_CHPLAN_ENT("NA", 0x26, 0, 0x00), /* Namibia */ ++ COUNTRY_CHPLAN_ENT("NC", 0x26, 1, 0x00), /* New Caledonia */ ++ COUNTRY_CHPLAN_ENT("NE", 0x26, 1, 0xB0), /* Niger */ ++ COUNTRY_CHPLAN_ENT("NF", 0x45, 1, 0x00), /* Norfolk Island (Australia) */ ++ COUNTRY_CHPLAN_ENT("NG", 0x50, 1, 0xF9), /* Nigeria */ ++ COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0xF1), /* Nicaragua */ ++ COUNTRY_CHPLAN_ENT("NL", 0x26, 1, 0xFB), /* Netherlands */ ++ COUNTRY_CHPLAN_ENT("NO", 0x26, 1, 0xFB), /* Norway */ ++ COUNTRY_CHPLAN_ENT("NP", 0x47, 1, 0xF0), /* Nepal */ ++ COUNTRY_CHPLAN_ENT("NR", 0x26, 1, 0x00), /* Nauru */ ++ COUNTRY_CHPLAN_ENT("NU", 0x45, 1, 0x00), /* Niue */ ++ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1, 0xFB), /* New Zealand */ ++ COUNTRY_CHPLAN_ENT("OM", 0x26, 1, 0xF9), /* Oman */ ++ COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0xF1), /* Panama */ ++ COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0xF1), /* Peru */ ++ COUNTRY_CHPLAN_ENT("PF", 0x26, 1, 0x00), /* French Polynesia (France) */ ++ COUNTRY_CHPLAN_ENT("PG", 0x26, 1, 0xF1), /* Papua New Guinea */ ++ COUNTRY_CHPLAN_ENT("PH", 0x26, 1, 0xF1), /* Philippines */ ++ COUNTRY_CHPLAN_ENT("PK", 0x51, 1, 0xF1), /* Pakistan */ ++ COUNTRY_CHPLAN_ENT("PL", 0x26, 1, 0xFB), /* Poland */ ++ COUNTRY_CHPLAN_ENT("PM", 0x26, 1, 0x00), /* Saint Pierre and Miquelon (France) */ ++ COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0xF1), /* Puerto Rico */ ++ COUNTRY_CHPLAN_ENT("PT", 0x26, 1, 0xFB), /* Portugal */ ++ COUNTRY_CHPLAN_ENT("PW", 0x34, 1, 0x00), /* Palau */ ++ COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0xF1), /* Paraguay */ ++ COUNTRY_CHPLAN_ENT("QA", 0x51, 1, 0xF9), /* Qatar */ ++ COUNTRY_CHPLAN_ENT("RE", 0x26, 1, 0x00), /* Reunion (France) */ ++ COUNTRY_CHPLAN_ENT("RO", 0x26, 1, 0xF1), /* Romania */ ++ COUNTRY_CHPLAN_ENT("RS", 0x26, 1, 0xF1), /* Serbia, Kosovo */ ++ COUNTRY_CHPLAN_ENT("RU", 0x59, 1, 0xFB), /* Russia(fac/gost), Kaliningrad */ ++ COUNTRY_CHPLAN_ENT("RW", 0x26, 1, 0xB0), /* Rwanda */ ++ COUNTRY_CHPLAN_ENT("SA", 0x26, 1, 0xFB), /* Saudi Arabia */ ++ COUNTRY_CHPLAN_ENT("SB", 0x26, 1, 0x00), /* Solomon Islands */ ++ COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0x90), /* Seychelles */ ++ COUNTRY_CHPLAN_ENT("SE", 0x26, 1, 0xFB), /* Sweden */ ++ COUNTRY_CHPLAN_ENT("SG", 0x47, 1, 0xFB), /* Singapore */ ++ COUNTRY_CHPLAN_ENT("SH", 0x26, 1, 0x00), /* Saint Helena (UK) */ ++ COUNTRY_CHPLAN_ENT("SI", 0x26, 1, 0xFB), /* Slovenia */ ++ COUNTRY_CHPLAN_ENT("SJ", 0x26, 1, 0x00), /* Svalbard (Norway) */ ++ COUNTRY_CHPLAN_ENT("SK", 0x26, 1, 0xFB), /* Slovakia */ ++ COUNTRY_CHPLAN_ENT("SL", 0x26, 1, 0xB0), /* Sierra Leone */ ++ COUNTRY_CHPLAN_ENT("SM", 0x26, 1, 0x00), /* San Marino */ ++ COUNTRY_CHPLAN_ENT("SN", 0x26, 1, 0xF1), /* Senegal */ ++ COUNTRY_CHPLAN_ENT("SO", 0x26, 1, 0x00), /* Somalia */ ++ COUNTRY_CHPLAN_ENT("SR", 0x34, 1, 0x00), /* Suriname */ ++ COUNTRY_CHPLAN_ENT("ST", 0x34, 1, 0x80), /* Sao Tome and Principe */ ++ COUNTRY_CHPLAN_ENT("SV", 0x30, 1, 0xF1), /* El Salvador */ ++ COUNTRY_CHPLAN_ENT("SX", 0x34, 1, 0x00), /* Sint Marteen */ ++ COUNTRY_CHPLAN_ENT("SZ", 0x26, 1, 0x20), /* Swaziland */ ++ COUNTRY_CHPLAN_ENT("TC", 0x26, 1, 0x00), /* Turks and Caicos Islands (UK) */ ++ COUNTRY_CHPLAN_ENT("TD", 0x26, 1, 0xB0), /* Chad */ ++ COUNTRY_CHPLAN_ENT("TF", 0x26, 1, 0x80), /* French Southern and Antarctic Lands (FR Southern Territories) */ ++ COUNTRY_CHPLAN_ENT("TG", 0x26, 1, 0xB0), /* Togo */ ++ COUNTRY_CHPLAN_ENT("TH", 0x26, 1, 0xF1), /* Thailand */ ++ COUNTRY_CHPLAN_ENT("TJ", 0x26, 1, 0x40), /* Tajikistan */ ++ COUNTRY_CHPLAN_ENT("TK", 0x45, 1, 0x00), /* Tokelau */ ++ COUNTRY_CHPLAN_ENT("TM", 0x26, 1, 0x00), /* Turkmenistan */ ++ COUNTRY_CHPLAN_ENT("TN", 0x47, 1, 0xF1), /* Tunisia */ ++ COUNTRY_CHPLAN_ENT("TO", 0x26, 1, 0x00), /* Tonga */ ++ COUNTRY_CHPLAN_ENT("TR", 0x26, 1, 0xF1), /* Turkey, Northern Cyprus */ ++ COUNTRY_CHPLAN_ENT("TT", 0x42, 1, 0xF1), /* Trinidad & Tobago */ ++ COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0xFF), /* Taiwan */ ++ COUNTRY_CHPLAN_ENT("TZ", 0x26, 1, 0xF0), /* Tanzania */ ++ COUNTRY_CHPLAN_ENT("UA", 0x26, 1, 0xFB), /* Ukraine */ ++ COUNTRY_CHPLAN_ENT("UG", 0x26, 1, 0xF1), /* Uganda */ ++ COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0xFF), /* United States of America (USA) */ ++ COUNTRY_CHPLAN_ENT("UY", 0x34, 1, 0xF1), /* Uruguay */ ++ COUNTRY_CHPLAN_ENT("UZ", 0x47, 1, 0xF0), /* Uzbekistan */ ++ COUNTRY_CHPLAN_ENT("VA", 0x26, 1, 0x00), /* Holy See (Vatican City) */ ++ COUNTRY_CHPLAN_ENT("VC", 0x34, 1, 0x10), /* Saint Vincent and the Grenadines */ ++ COUNTRY_CHPLAN_ENT("VE", 0x30, 1, 0xF1), /* Venezuela */ ++ COUNTRY_CHPLAN_ENT("VI", 0x34, 1, 0x00), /* United States Virgin Islands (USA) */ ++ COUNTRY_CHPLAN_ENT("VN", 0x26, 1, 0xF1), /* Vietnam */ ++ COUNTRY_CHPLAN_ENT("VU", 0x26, 1, 0x00), /* Vanuatu */ ++ COUNTRY_CHPLAN_ENT("WF", 0x26, 1, 0x00), /* Wallis and Futuna (France) */ ++ COUNTRY_CHPLAN_ENT("WS", 0x34, 1, 0x00), /* Samoa */ ++ COUNTRY_CHPLAN_ENT("YE", 0x26, 1, 0x40), /* Yemen */ ++ COUNTRY_CHPLAN_ENT("YT", 0x26, 1, 0x80), /* Mayotte (France) */ ++ COUNTRY_CHPLAN_ENT("ZA", 0x26, 1, 0xF1), /* South Africa */ ++ COUNTRY_CHPLAN_ENT("ZM", 0x26, 1, 0xB0), /* Zambia */ ++ COUNTRY_CHPLAN_ENT("ZW", 0x26, 1, 0xF1), /* Zimbabwe */ ++}; + +-u32 rtw_freq2ch(u32 freq) ++u16 const country_chplan_map_sz = sizeof(country_chplan_map)/sizeof(struct country_chplan); ++ ++/* ++* rtw_get_chplan_from_country - ++* @country_code: string of country code ++* ++* Return pointer of struct country_chplan entry or NULL when unsupported country_code is given ++*/ ++const struct country_chplan *rtw_get_chplan_from_country(const char *country_code) + { +- u8 i; +- u32 ch = 0; +- +- for (i = 0; i < ch_freq_map_num; i++) +- { +- if (freq == ch_freq_map[i].frequency) +- { +- ch = ch_freq_map[i].channel; +- break; ++ const struct country_chplan *ent = NULL; ++ const struct country_chplan *map = NULL; ++ u16 map_sz = 0; ++ char code[2]; ++ int i; ++ ++ code[0] = alpha_to_upper(country_code[0]); ++ code[1] = alpha_to_upper(country_code[1]); ++ ++#if !defined(CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP) && RTW_DEF_MODULE_REGULATORY_CERT ++ ent = rtw_def_module_get_chplan_from_country(code); ++ if (ent != NULL) ++ goto exit; ++#endif ++ ++#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP ++ map = CUSTOMIZED_country_chplan_map; ++ map_sz = CUSTOMIZED_country_chplan_map_sz; ++#else ++ map = country_chplan_map; ++ map_sz = country_chplan_map_sz; ++#endif ++ ++ for (i = 0; i < map_sz; i++) { ++ if (strncmp(code, map[i].alpha2, 2) == 0) { ++ ent = &map[i]; ++ break; + } + } +- if (i == ch_freq_map_num) +- ch = 1; + +- return ch; ++exit: ++ #if RTW_DEF_MODULE_REGULATORY_CERT ++ if (ent && !(COUNTRY_CHPLAN_DEF_MODULE_FALGS(ent) & RTW_DEF_MODULE_REGULATORY_CERT)) ++ ent = NULL; ++ #endif ++ ++ return ent; ++} ++ ++int rtw_ch_to_bb_gain_sel(int ch) ++{ ++ int sel = -1; ++ ++ if (ch >= 1 && ch <= 14) ++ sel = BB_GAIN_2G; ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++ else if (ch >= 36 && ch < 48) ++ sel = BB_GAIN_5GLB1; ++ else if (ch >= 52 && ch <= 64) ++ sel = BB_GAIN_5GLB2; ++ else if (ch >= 100 && ch <= 120) ++ sel = BB_GAIN_5GMB1; ++ else if (ch >= 124 && ch <= 144) ++ sel = BB_GAIN_5GMB2; ++ else if (ch >= 149 && ch <= 177) ++ sel = BB_GAIN_5GHB; ++#endif ++ ++ return sel; ++} ++ ++s8 rtw_rf_get_kfree_tx_gain_offset(_adapter *padapter, u8 path, u8 ch) ++{ ++ s8 kfree_offset = 0; ++ ++#ifdef CONFIG_RF_GAIN_OFFSET ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); ++ struct kfree_data_t *kfree_data = GET_KFREE_DATA(padapter); ++ s8 bb_gain_sel = rtw_ch_to_bb_gain_sel(ch); ++ ++ if (bb_gain_sel < BB_GAIN_2G || bb_gain_sel >= BB_GAIN_NUM) { ++ rtw_warn_on(1); ++ goto exit; ++ } ++ ++ if (kfree_data->flag & KFREE_FLAG_ON) { ++ kfree_offset = kfree_data->bb_gain[bb_gain_sel][path]; ++ if (1) ++ DBG_871X("%s path:%u, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n" ++ , __func__, path, ch, bb_gain_sel, kfree_offset); ++ } ++exit: ++#endif /* CONFIG_RF_GAIN_OFFSET */ ++ return kfree_offset; ++} ++ ++void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset) ++{ ++ u8 write_value; ++ ++ DBG_871X("kfree gain_offset 0x55:0x%x ", rtw_hal_read_rfreg(adapter, path, 0x55, 0xffffffff)); ++ switch (rtw_get_chip_type(adapter)) { ++#ifdef CONFIG_RTL8703B ++ case RTL8703B: ++ write_value = RF_TX_GAIN_OFFSET_8703B(offset); ++ rtw_hal_write_rfreg(adapter, path, 0x55, 0x0fc000, write_value); ++ break; ++#endif /* CONFIG_RTL8703B */ ++#ifdef CONFIG_RTL8188F ++ case RTL8188F: ++ write_value = RF_TX_GAIN_OFFSET_8188F(offset); ++ rtw_hal_write_rfreg(adapter, path, 0x55, 0x0fc000, write_value); ++ break; ++#endif /* CONFIG_RTL8188F */ ++#ifdef CONFIG_RTL8192E ++ case RTL8192E: ++ write_value = RF_TX_GAIN_OFFSET_8192E(offset); ++ rtw_hal_write_rfreg(adapter, path, 0x55, 0x0f8000, write_value); ++ break; ++#endif /* CONFIG_RTL8188F */ ++ ++#ifdef CONFIG_RTL8821A ++ case RTL8821: ++ write_value = RF_TX_GAIN_OFFSET_8821A(offset); ++ rtw_hal_write_rfreg(adapter, path, 0x55, 0x0f8000, write_value); ++ break; ++#endif /* CONFIG_RTL8821A */ ++#ifdef CONFIG_RTL8814A ++ case RTL8814A: ++ DBG_871X("\nkfree by PhyDM on the sw CH. path %d\n", path); ++ break; ++#endif /* CONFIG_RTL8821A */ ++ ++ default: ++ rtw_warn_on(1); ++ break; ++ } ++ ++ DBG_871X(" after :0x%x\n", rtw_hal_read_rfreg(adapter, path, 0x55, 0xffffffff)); ++} ++ ++void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ s8 kfree_offset = 0; ++ s8 tx_pwr_track_offset = 0; /* TODO: 8814A should consider tx pwr track when setting tx gain offset */ ++ s8 total_offset; ++ int i; ++ ++ for (i = 0; i < hal_data->NumTotalRFPath; i++) { ++ kfree_offset = rtw_rf_get_kfree_tx_gain_offset(adapter, i, ch); ++ total_offset = kfree_offset + tx_pwr_track_offset; ++ rtw_rf_set_tx_gain_offset(adapter, i, total_offset); ++ } ++} ++ ++bool rtw_is_dfs_range(u32 hi, u32 lo) ++{ ++ return rtw_is_range_overlap(hi, lo, 5720 + 10, 5260 - 10)?_TRUE:_FALSE; ++} ++ ++bool rtw_is_dfs_ch(u8 ch, u8 bw, u8 offset) ++{ ++ u32 hi, lo; ++ ++ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) ++ return _FALSE; ++ ++ return rtw_is_dfs_range(hi, lo)?_TRUE:_FALSE; ++} ++ ++bool rtw_is_long_cac_range(u32 hi, u32 lo) ++{ ++ return rtw_is_range_overlap(hi, lo, 5660 + 10, 5600 - 10)?_TRUE:_FALSE; ++} ++ ++bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset) ++{ ++ u32 hi, lo; ++ ++ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) ++ return _FALSE; ++ ++ return rtw_is_long_cac_range(hi, lo)?_TRUE:_FALSE; + } + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_security.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_security.c +old mode 100755 +new mode 100644 +index 9841568..0729501 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_security.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_security.c +@@ -1733,8 +1733,9 @@ _func_enter_; + prwskey=pattrib->dot118021x_UncstKey.skey; + } + +-#ifdef CONFIG_TDLS //swencryption ++#ifdef CONFIG_TDLS + { ++ /* Swencryption */ + struct sta_info *ptdls_sta; + ptdls_sta=rtw_get_stainfo(&padapter->stapriv ,&pattrib->dst[0] ); + if((ptdls_sta != NULL) && (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) ) +@@ -2213,8 +2214,7 @@ u32 rtw_BIP_verify(_adapter *padapter, u8 *precvframe) + _rtw_memcpy(&temp_ipn, p+4, 6); + temp_ipn = le64_to_cpu(temp_ipn); + //BIP packet number should bigger than previous BIP packet +- if(temp_ipn <= pmlmeext->mgnt_80211w_IPN_rx) +- { ++ if (temp_ipn < pmlmeext->mgnt_80211w_IPN_rx) { + DBG_871X("replay BIP packet\n"); + goto BIP_exit; + } +@@ -3029,12 +3029,12 @@ void wpa_tdls_generate_tpk(_adapter *padapter, PVOID sta) + * added by the KDF anyway.. + */ + +- if (os_memcmp(myid(&(padapter->eeprompriv)), psta->hwaddr, ETH_ALEN) < 0) { +- _rtw_memcpy(data, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ if (os_memcmp(adapter_mac_addr(padapter), psta->hwaddr, ETH_ALEN) < 0) { ++ _rtw_memcpy(data, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(data + ETH_ALEN, psta->hwaddr, ETH_ALEN); + } else { + _rtw_memcpy(data, psta->hwaddr, ETH_ALEN); +- _rtw_memcpy(data + ETH_ALEN, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(data + ETH_ALEN, adapter_mac_addr(padapter), ETH_ALEN); + } + _rtw_memcpy(data + 2 * ETH_ALEN, get_bssid(pmlmepriv), ETH_ALEN); + +@@ -3101,6 +3101,55 @@ int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, + + } + ++/** ++ * wpa_tdls_teardown_ftie_mic - Calculate TDLS TEARDOWN FTIE MIC ++ * @kck: TPK-KCK ++ * @lnkid: Pointer to the beginning of Link Identifier IE ++ * @reason: Reason code of TDLS Teardown ++ * @dialog_token: Dialog token that was used in the MIC calculation for TPK Handshake Message 3 ++ * @trans_seq: Transaction Sequence number (1 octet) which shall be set to the value 4 ++ * @ftie: Pointer to the beginning of FT IE ++ * @mic: Pointer for writing MIC ++ * ++ * Calculate MIC for TDLS TEARDOWN frame according to Section 10.22.5 in IEEE 802.11 - 2012. ++ */ ++int wpa_tdls_teardown_ftie_mic(u8 *kck, u8 *lnkid, u16 reason, ++ u8 dialog_token, u8 trans_seq, u8 *ftie, u8 *mic) ++{ ++ u8 *buf, *pos; ++ struct wpa_tdls_ftie *_ftie; ++ int ret; ++ int len = 2 + lnkid[1] + 2 + 1 + 1 + 2 + ftie[1]; ++ ++ buf = rtw_zmalloc(len); ++ if (!buf) { ++ DBG_871X("TDLS: No memory for MIC calculation\n"); ++ return -1; ++ } ++ ++ pos = buf; ++ /* 1) Link Identifier IE */ ++ _rtw_memcpy(pos, lnkid, 2 + lnkid[1]); ++ pos += 2 + lnkid[1]; ++ /* 2) Reason Code */ ++ _rtw_memcpy(pos, (u8 *)&reason, 2); ++ pos += 2; ++ /* 3) Dialog Token */ ++ *pos++ = dialog_token; ++ /* 4) Transaction Sequence number */ ++ *pos++ = trans_seq; ++ /* 5) FTIE, with the MIC field of the FTIE set to 0 */ ++ _rtw_memcpy(pos, ftie, 2 + ftie[1]); ++ _ftie = (struct wpa_tdls_ftie *) pos; ++ _rtw_memset(_ftie->mic, 0, TDLS_MIC_LEN); ++ pos += 2 + ftie[1]; ++ ++ ret = omac1_aes_128(kck, buf, pos - buf, mic); ++ rtw_mfree(buf, len); ++ return ret; ++ ++} ++ + int tdls_verify_mic(u8 *kck, u8 trans_seq, + u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie) + { +@@ -3112,14 +3161,14 @@ int tdls_verify_mic(u8 *kck, u8 trans_seq, + + if (lnkid == NULL || rsnie == NULL || + timeoutie == NULL || ftie == NULL){ +- return 0; ++ return _FAIL; + } + + len = 2 * ETH_ALEN + 1 + 2 + 18 + 2 + *(rsnie+1) + 2 + *(timeoutie+1) + 2 + *(ftie+1); + + buf = rtw_zmalloc(len); + if (buf == NULL) +- return 0; ++ return _FAIL; + + pos = buf; + /* 1) TDLS initiator STA MAC address */ +@@ -3149,17 +3198,17 @@ int tdls_verify_mic(u8 *kck, u8 trans_seq, + ret = omac1_aes_128(kck, buf, pos - buf, mic); + rtw_mfree(buf, len); + if (ret) +- return 0; ++ return _FAIL; + rx_ftie = ftie+4; + + if (os_memcmp(mic, rx_ftie, 16) == 0) { + //Valid MIC +- return 1; ++ return _SUCCESS; + } + + //Invalid MIC + DBG_871X( "[%s] Invalid MIC\n", __FUNCTION__); +- return 0; ++ return _FAIL; + + } + #endif //CONFIG_TDLS +@@ -3173,8 +3222,10 @@ _func_enter_; + RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler ^^^\n")); + + /* +- if(padapter->bDriverStopped ||padapter->bSurpriseRemoved){ +- RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler (padapter->bDriverStopped %d)(padapter->bSurpriseRemoved %d)^^^\n",padapter->bDriverStopped,padapter->bSurpriseRemoved)); ++ if (RTW_CANNOT_RUN(padapter)) { ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler (padapter->bDriverStopped %s)(padapter->bSurpriseRemoved %s)^^^\n" ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False")); + + return; + } +@@ -3228,3 +3279,68 @@ u8 rtw_handle_tkip_countermeasure(_adapter* adapter, const char *caller) + return status; + } + ++#ifdef CONFIG_WOWLAN ++u16 rtw_cal_crc16(u8 data, u16 crc) ++{ ++ u8 shift_in, data_bit; ++ u8 crc_bit4, crc_bit11, crc_bit15; ++ u16 crc_result; ++ int index; ++ ++ for (index = 0; index < 8; index++) { ++ crc_bit15 = ((crc & BIT15) ? 1 : 0); ++ data_bit = (data & (BIT0 << index) ? 1 : 0); ++ shift_in = crc_bit15 ^ data_bit; ++ /*printf("crc_bit15=%d, DataBit=%d, shift_in=%d\n", ++ * crc_bit15, data_bit, shift_in);*/ ++ ++ crc_result = crc << 1; ++ ++ if (shift_in == 0) ++ crc_result &= (~BIT0); ++ else ++ crc_result |= BIT0; ++ /*printf("CRC =%x\n",CRC_Result);*/ ++ ++ crc_bit11 = ((crc & BIT11) ? 1 : 0) ^ shift_in; ++ ++ if (crc_bit11 == 0) ++ crc_result &= (~BIT12); ++ else ++ crc_result |= BIT12; ++ ++ /*printf("bit12 CRC =%x\n",CRC_Result);*/ ++ ++ crc_bit4 = ((crc & BIT4) ? 1 : 0) ^ shift_in; ++ ++ if (crc_bit4 == 0) ++ crc_result &= (~BIT5); ++ else ++ crc_result |= BIT5; ++ ++ /* printf("bit5 CRC =%x\n",CRC_Result); */ ++ /* repeat using the last result*/ ++ crc = crc_result; ++ } ++ return crc; ++} ++ ++/* ++ * function name :rtw_calc_crc ++ * ++ * input: char* pattern , pattern size ++ * ++ */ ++u16 rtw_calc_crc(u8 *pdata, int length) ++{ ++ u16 crc = 0xffff; ++ int i; ++ ++ for (i = 0; i < length; i++) ++ crc = rtw_cal_crc16(pdata[i], crc); ++ /* get 1' complement */ ++ crc = ~crc; ++ ++ return crc; ++} ++#endif /*CONFIG_WOWLAN*/ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_sreset.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_sreset.c +old mode 100755 +new mode 100644 +index c7066f8..17a48ed +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_sreset.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_sreset.c +@@ -1,365 +1,369 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +- +-#include +-#include +-#include +- +-void sreset_init_value(_adapter *padapter) +-{ +-#if defined(DBG_CONFIG_ERROR_DETECT) +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- struct sreset_priv *psrtpriv = &pHalData->srestpriv; +- +- _rtw_mutex_init(&psrtpriv->silentreset_mutex); +- psrtpriv->silent_reset_inprogress = _FALSE; +- psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; +- psrtpriv->last_tx_time =0; +- psrtpriv->last_tx_complete_time =0; +-#endif +-} +-void sreset_reset_value(_adapter *padapter) +-{ +-#if defined(DBG_CONFIG_ERROR_DETECT) +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- struct sreset_priv *psrtpriv = &pHalData->srestpriv; +- +- psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; +- psrtpriv->last_tx_time =0; +- psrtpriv->last_tx_complete_time =0; +-#endif +-} +- +-u8 sreset_get_wifi_status(_adapter *padapter) +-{ +-#if defined(DBG_CONFIG_ERROR_DETECT) +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- struct sreset_priv *psrtpriv = &pHalData->srestpriv; +- +- u8 status = WIFI_STATUS_SUCCESS; +- u32 val32 = 0; +- _irqL irqL; +- if(psrtpriv->silent_reset_inprogress == _TRUE) +- { +- return status; +- } +- val32 =rtw_read32(padapter,REG_TXDMA_STATUS); +- if(val32==0xeaeaeaea){ +- psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST; +- } +- else if(val32!=0){ +- DBG_8192C("txdmastatu(%x)\n",val32); +- psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR; +- } +- +- if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status) +- { +- DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status); +- status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL))); +- } +- DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status); +- +- //status restore +- psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; +- +- return status; +-#else +- return WIFI_STATUS_SUCCESS; +-#endif +-} +- +-void sreset_set_wifi_error_status(_adapter *padapter, u32 status) +-{ +-#if defined(DBG_CONFIG_ERROR_DETECT) +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- pHalData->srestpriv.Wifi_Error_Status = status; +-#endif +-} +- +-void sreset_set_trigger_point(_adapter *padapter, s32 tgp) +-{ +-#if defined(DBG_CONFIG_ERROR_DETECT) +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- pHalData->srestpriv.dbg_trigger_point = tgp; +-#endif +-} +- +-bool sreset_inprogress(_adapter *padapter) +-{ +-#if defined(DBG_CONFIG_ERROR_RESET) +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- return pHalData->srestpriv.silent_reset_inprogress; +-#else +- return _FALSE; +-#endif +-} +- +-void sreset_restore_security_station(_adapter *padapter) +-{ +- u8 EntryId = 0; +- struct mlme_priv *mlmepriv = &padapter->mlmepriv; +- struct sta_priv * pstapriv = &padapter->stapriv; +- struct sta_info *psta; +- struct security_priv* psecuritypriv=&(padapter->securitypriv); +- struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; +- +- { +- u8 val8; +- +- if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) { +- val8 = 0xcc; +- #ifdef CONFIG_WAPI_SUPPORT +- } else if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) { +- //Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey. +- val8 = 0x4c; +- #endif +- } else { +- val8 = 0xcf; +- } +- rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); +- } +- +- #if 0 +- if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) || +- ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ )) +- { +- +- for(EntryId=0; EntryId<4; EntryId++) +- { +- if(EntryId == psecuritypriv->dot11PrivacyKeyIndex) +- rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1,_FALSE); +- else +- rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0,_FALSE); +- } +- +- } +- else +- #endif +- if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || +- (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) +- { +- psta = rtw_get_stainfo(pstapriv, get_bssid(mlmepriv)); +- if (psta == NULL) { +- //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); +- } +- else +- { +- //pairwise key +- rtw_setstakey_cmd(padapter, psta, _TRUE,_FALSE); +- //group key +- rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0,_FALSE); +- } +- } +-} +- +-void sreset_restore_network_station(_adapter *padapter) +-{ +- struct mlme_priv *mlmepriv = &padapter->mlmepriv; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- #if 0 +- { +- //======================================================= +- // reset related register of Beacon control +- +- //set MSR to nolink +- Set_MSR(padapter, _HW_STATE_NOLINK_); +- // reject all data frame +- rtw_write16(padapter, REG_RXFLTMAP2,0x00); +- //reset TSF +- rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); +- +- // disable update TSF +- SetBcnCtrlReg(padapter, BIT(4), 0); +- +- //======================================================= +- } +- #endif +- +- rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure,_FALSE); +- +- { +- u8 threshold; +- #ifdef CONFIG_USB_HCI +- // TH=1 => means that invalidate usb rx aggregation +- // TH=0 => means that validate usb rx aggregation, use init value. +- if(mlmepriv->htpriv.ht_option) { +- if(padapter->registrypriv.wifi_spec==1) +- threshold = 1; +- else +- threshold = 0; +- rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); +- } else { +- threshold = 1; +- rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); +- } +- #endif +- } +- +- rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, NULL); +- +- set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); +- +- //disable dynamic functions, such as high power, DIG +- //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); +- +- rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); +- +- { +- u8 join_type = 0; +- rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); +- } +- +- Set_MSR(padapter, (pmlmeinfo->state & 0x3)); +- +- mlmeext_joinbss_event_callback(padapter, 1); +- //restore Sequence No. +- rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn); +- +- sreset_restore_security_station(padapter); +-} +- +- +-void sreset_restore_network_status(_adapter *padapter) +-{ +- struct mlme_priv *mlmepriv = &padapter->mlmepriv; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) { +- DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); +- sreset_restore_network_station(padapter); +- } else if (check_fwstate(mlmepriv, WIFI_AP_STATE)) { +- DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_AP_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); +- rtw_ap_restore_network(padapter); +- } else if (check_fwstate(mlmepriv, WIFI_ADHOC_STATE)) { +- DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); +- } else { +- DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); +- } +-} +- +-void sreset_stop_adapter(_adapter *padapter) +-{ +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct xmit_priv *pxmitpriv = &padapter->xmitpriv; +- +- if (padapter == NULL) +- return; +- +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); +- +- rtw_netif_stop_queue(padapter->pnetdev); +- +- rtw_cancel_all_timer(padapter); +- +- /* TODO: OS and HCI independent */ +- #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) +- tasklet_kill(&pxmitpriv->xmit_tasklet); +- #endif +- +- if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) +- rtw_scan_abort(padapter); +- +- if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) +- { +- rtw_set_to_roam(padapter, 0); +- _rtw_join_timeout_handler(padapter); +- } +- +-} +- +-void sreset_start_adapter(_adapter *padapter) +-{ +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct xmit_priv *pxmitpriv = &padapter->xmitpriv; +- +- if (padapter == NULL) +- return; +- +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); +- +- if (check_fwstate(pmlmepriv, _FW_LINKED)) { +- sreset_restore_network_status(padapter); +- } +- +- /* TODO: OS and HCI independent */ +- #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) +- tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); +- #endif +- +- if (is_primary_adapter(padapter)) +- _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); +- +- rtw_netif_wake_queue(padapter->pnetdev); +-} +- +-void sreset_reset(_adapter *padapter) +-{ +-#ifdef DBG_CONFIG_ERROR_RESET +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- struct sreset_priv *psrtpriv = &pHalData->srestpriv; +- struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct xmit_priv *pxmitpriv = &padapter->xmitpriv; +- _irqL irqL; +- u32 start = rtw_get_current_time(); +- struct dvobj_priv *psdpriv = padapter->dvobj; +- struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; +- +- DBG_871X("%s\n", __FUNCTION__); +- +- psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; +- +- +-#ifdef CONFIG_LPS +- rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "SRESET"); +-#endif//#ifdef CONFIG_LPS +- +- _enter_pwrlock(&pwrpriv->lock); +- +- psrtpriv->silent_reset_inprogress = _TRUE; +- pwrpriv->change_rfpwrstate = rf_off; +- +- sreset_stop_adapter(padapter); +- #ifdef CONFIG_CONCURRENT_MODE +- sreset_stop_adapter(padapter->pbuddy_adapter); +- #endif +- +- #ifdef CONFIG_IPS +- _ips_enter(padapter); +- _ips_leave(padapter); +- #endif +- +- sreset_start_adapter(padapter); +- #ifdef CONFIG_CONCURRENT_MODE +- sreset_start_adapter(padapter->pbuddy_adapter); +- #endif +- +- psrtpriv->silent_reset_inprogress = _FALSE; +- +- _exit_pwrlock(&pwrpriv->lock); +- +- DBG_871X("%s done in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); +- pdbgpriv->dbg_sreset_cnt++; +-#endif +-} +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include ++#include ++#include ++ ++void sreset_init_value(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ _rtw_mutex_init(&psrtpriv->silentreset_mutex); ++ psrtpriv->silent_reset_inprogress = _FALSE; ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ psrtpriv->last_tx_time =0; ++ psrtpriv->last_tx_complete_time =0; ++#endif ++} ++void sreset_reset_value(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ psrtpriv->last_tx_time =0; ++ psrtpriv->last_tx_complete_time =0; ++#endif ++} ++ ++u8 sreset_get_wifi_status(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ u8 status = WIFI_STATUS_SUCCESS; ++ u32 val32 = 0; ++ _irqL irqL; ++ if(psrtpriv->silent_reset_inprogress == _TRUE) ++ { ++ return status; ++ } ++ val32 =rtw_read32(padapter,REG_TXDMA_STATUS); ++ if(val32==0xeaeaeaea){ ++ psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST; ++ } ++ else if(val32!=0){ ++ DBG_8192C("txdmastatu(%x)\n",val32); ++ psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR; ++ } ++ ++ if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status) ++ { ++ DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status); ++ status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL))); ++ } ++ DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status); ++ ++ //status restore ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ ++ return status; ++#else ++ return WIFI_STATUS_SUCCESS; ++#endif ++} ++ ++void sreset_set_wifi_error_status(_adapter *padapter, u32 status) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.Wifi_Error_Status = status; ++#endif ++} ++ ++void sreset_set_trigger_point(_adapter *padapter, s32 tgp) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.dbg_trigger_point = tgp; ++#endif ++} ++ ++bool sreset_inprogress(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_RESET) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ return pHalData->srestpriv.silent_reset_inprogress; ++#else ++ return _FALSE; ++#endif ++} ++ ++void sreset_restore_security_station(_adapter *padapter) ++{ ++ u8 EntryId = 0; ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; ++ ++ { ++ u8 val8; ++ ++ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) { ++ val8 = 0xcc; ++ #ifdef CONFIG_WAPI_SUPPORT ++ } else if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) { ++ //Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey. ++ val8 = 0x4c; ++ #endif ++ } else { ++ val8 = 0xcf; ++ } ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ } ++ ++ #if 0 ++ if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) || ++ ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ )) ++ { ++ ++ for(EntryId=0; EntryId<4; EntryId++) ++ { ++ if(EntryId == psecuritypriv->dot11PrivacyKeyIndex) ++ rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1,_FALSE); ++ else ++ rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0,_FALSE); ++ } ++ ++ } ++ else ++ #endif ++ if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) ++ { ++ psta = rtw_get_stainfo(pstapriv, get_bssid(mlmepriv)); ++ if (psta == NULL) { ++ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); ++ } ++ else ++ { ++ //pairwise key ++ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY,_FALSE); ++ //group key ++ rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0,_FALSE); ++ } ++ } ++} ++ ++void sreset_restore_network_station(_adapter *padapter) ++{ ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 doiqk = _FALSE; ++ ++ #if 0 ++ { ++ //======================================================= ++ // reset related register of Beacon control ++ ++ //set MSR to nolink ++ Set_MSR(padapter, _HW_STATE_NOLINK_); ++ // reject all data frame ++ rtw_write16(padapter, REG_RXFLTMAP2,0x00); ++ //reset TSF ++ rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); ++ ++ // disable update TSF ++ SetBcnCtrlReg(padapter, BIT(4), 0); ++ ++ //======================================================= ++ } ++ #endif ++ ++ rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure,_FALSE); ++ ++ { ++ u8 threshold; ++ #ifdef CONFIG_USB_HCI ++ // TH=1 => means that invalidate usb rx aggregation ++ // TH=0 => means that validate usb rx aggregation, use init value. ++ if(mlmepriv->htpriv.ht_option) { ++ if(padapter->registrypriv.wifi_spec==1) ++ threshold = 1; ++ else ++ threshold = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); ++ } else { ++ threshold = 1; ++ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); ++ } ++ #endif ++ } ++ ++ doiqk = _TRUE; ++ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK , &doiqk); ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ doiqk = _FALSE; ++ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); ++ //disable dynamic functions, such as high power, DIG ++ /*rtw_phydm_func_disable_all(padapter);*/ ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); ++ ++ { ++ u8 join_type = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ } ++ ++ Set_MSR(padapter, (pmlmeinfo->state & 0x3)); ++ ++ mlmeext_joinbss_event_callback(padapter, 1); ++ //restore Sequence No. ++ rtw_hal_set_hwreg(padapter, HW_VAR_RESTORE_HW_SEQ, 0); ++ ++ sreset_restore_security_station(padapter); ++} ++ ++ ++void sreset_restore_network_status(_adapter *padapter) ++{ ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ sreset_restore_network_station(padapter); ++ } else if (check_fwstate(mlmepriv, WIFI_AP_STATE)) { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_AP_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ rtw_ap_restore_network(padapter); ++ } else if (check_fwstate(mlmepriv, WIFI_ADHOC_STATE)) { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ } else { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ } ++} ++ ++void sreset_stop_adapter(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ if (padapter == NULL) ++ return; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++ rtw_netif_stop_queue(padapter->pnetdev); ++ ++ rtw_cancel_all_timer(padapter); ++ ++ /* TODO: OS and HCI independent */ ++ #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) ++ tasklet_kill(&pxmitpriv->xmit_tasklet); ++ #endif ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) ++ rtw_scan_abort(padapter); ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) ++ { ++ rtw_set_to_roam(padapter, 0); ++ _rtw_join_timeout_handler(padapter); ++ } ++ ++} ++ ++void sreset_start_adapter(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ if (padapter == NULL) ++ return; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED)) { ++ sreset_restore_network_status(padapter); ++ } ++ ++ /* TODO: OS and HCI independent */ ++ #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++ #endif ++ ++ if (is_primary_adapter(padapter)) ++ _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); ++ ++ rtw_netif_wake_queue(padapter->pnetdev); ++} ++ ++void sreset_reset(_adapter *padapter) ++{ ++#ifdef DBG_CONFIG_ERROR_RESET ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ _irqL irqL; ++ u32 start = rtw_get_current_time(); ++ struct dvobj_priv *psdpriv = padapter->dvobj; ++ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ ++ ++#ifdef CONFIG_LPS ++ rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "SRESET"); ++#endif//#ifdef CONFIG_LPS ++ ++ _enter_pwrlock(&pwrpriv->lock); ++ ++ psrtpriv->silent_reset_inprogress = _TRUE; ++ pwrpriv->change_rfpwrstate = rf_off; ++ ++ sreset_stop_adapter(padapter); ++ #ifdef CONFIG_CONCURRENT_MODE ++ sreset_stop_adapter(padapter->pbuddy_adapter); ++ #endif ++ ++ #ifdef CONFIG_IPS ++ _ips_enter(padapter); ++ _ips_leave(padapter); ++ #endif ++ ++ sreset_start_adapter(padapter); ++ #ifdef CONFIG_CONCURRENT_MODE ++ sreset_start_adapter(padapter->pbuddy_adapter); ++ #endif ++ ++ psrtpriv->silent_reset_inprogress = _FALSE; ++ ++ _exit_pwrlock(&pwrpriv->lock); ++ ++ DBG_871X("%s done in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); ++ pdbgpriv->dbg_sreset_cnt++; ++#endif ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_sta_mgt.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_sta_mgt.c +old mode 100755 +new mode 100644 +index f17b2a2..85bf98a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_sta_mgt.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_sta_mgt.c +@@ -28,6 +28,140 @@ + #endif + + ++bool test_st_match_rule(_adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) ++{ ++ if (ntohs(*((u16 *)local_port)) == 5001 || ntohs(*((u16 *)remote_port)) == 5001) ++ return _TRUE; ++ return _FALSE; ++} ++ ++struct st_register test_st_reg = { ++ .s_proto = 0x06, ++ .rule = test_st_match_rule, ++}; ++ ++inline void rtw_st_ctl_init(struct st_ctl_t *st_ctl) ++{ ++ _rtw_memset(st_ctl->reg, 0 , sizeof(struct st_register) * SESSION_TRACKER_REG_ID_NUM); ++ _rtw_init_queue(&st_ctl->tracker_q); ++} ++ ++inline void rtw_st_ctl_clear_tracker_q(struct st_ctl_t *st_ctl) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ struct session_tracker *st; ++ ++ _enter_critical_bh(&st_ctl->tracker_q.lock, &irqL); ++ phead = &st_ctl->tracker_q.queue; ++ plist = get_next(phead); ++ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ st = LIST_CONTAINOR(plist, struct session_tracker, list); ++ plist = get_next(plist); ++ rtw_list_delete(&st->list); ++ rtw_mfree((u8 *)st, sizeof(struct session_tracker)); ++ } ++ _exit_critical_bh(&st_ctl->tracker_q.lock, &irqL); ++} ++ ++inline void rtw_st_ctl_deinit(struct st_ctl_t *st_ctl) ++{ ++ rtw_st_ctl_clear_tracker_q(st_ctl); ++ _rtw_deinit_queue(&st_ctl->tracker_q); ++} ++ ++inline void rtw_st_ctl_register(struct st_ctl_t *st_ctl, u8 st_reg_id, struct st_register *reg) ++{ ++ if (st_reg_id >= SESSION_TRACKER_REG_ID_NUM) { ++ rtw_warn_on(1); ++ return; ++ } ++ ++ st_ctl->reg[st_reg_id].s_proto = reg->s_proto; ++ st_ctl->reg[st_reg_id].rule = reg->rule; ++} ++ ++inline void rtw_st_ctl_unregister(struct st_ctl_t *st_ctl, u8 st_reg_id) ++{ ++ int i; ++ ++ if (st_reg_id >= SESSION_TRACKER_REG_ID_NUM) { ++ rtw_warn_on(1); ++ return; ++ } ++ ++ st_ctl->reg[st_reg_id].s_proto = 0; ++ st_ctl->reg[st_reg_id].rule = NULL; ++ ++ /* clear tracker queue if no session trecker registered */ ++ for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) ++ if (st_ctl->reg[i].s_proto != 0) ++ break; ++ if (i >= SESSION_TRACKER_REG_ID_NUM) ++ rtw_st_ctl_clear_tracker_q(st_ctl); ++} ++ ++inline bool rtw_st_ctl_chk_reg_s_proto(struct st_ctl_t *st_ctl, u8 s_proto) ++{ ++ bool ret = _FALSE; ++ int i; ++ ++ for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) { ++ if (st_ctl->reg[i].s_proto == s_proto) { ++ ret = _TRUE; ++ break; ++ } ++ } ++ ++ return ret; ++} ++ ++inline bool rtw_st_ctl_chk_reg_rule(struct st_ctl_t *st_ctl, _adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) ++{ ++ bool ret = _FALSE; ++ int i; ++ st_match_rule rule; ++ ++ for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) { ++ rule = st_ctl->reg[i].rule; ++ if (rule && rule(adapter, local_naddr, local_port, remote_naddr, remote_port) == _TRUE) { ++ ret = _TRUE; ++ break; ++ } ++ } ++ ++ return ret; ++} ++ ++#define SESSION_TRACKER_FMT IP_FMT":"PORT_FMT" "IP_FMT":"PORT_FMT" %u %d" ++#define SESSION_TRACKER_ARG(st) IP_ARG(&(st)->local_naddr), PORT_ARG(&(st)->local_port), IP_ARG(&(st)->remote_naddr), PORT_ARG(&(st)->remote_port), (st)->status, rtw_get_passing_time_ms((st)->set_time) ++ ++void dump_st_ctl(void *sel, struct st_ctl_t *st_ctl) ++{ ++ int i; ++ _irqL irqL; ++ _list *plist, *phead; ++ struct session_tracker *st; ++ ++ if (!DBG_SESSION_TRACKER) ++ return; ++ ++ for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) ++ DBG_871X_SEL_NL(sel, "reg%d: %u %p\n", i, st_ctl->reg[i].s_proto, st_ctl->reg[i].rule); ++ ++ _enter_critical_bh(&st_ctl->tracker_q.lock, &irqL); ++ phead = &st_ctl->tracker_q.queue; ++ plist = get_next(phead); ++ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ st = LIST_CONTAINOR(plist, struct session_tracker, list); ++ plist = get_next(plist); ++ ++ DBG_871X_SEL_NL(sel, SESSION_TRACKER_FMT"\n", SESSION_TRACKER_ARG(st)); ++ } ++ _exit_critical_bh(&st_ctl->tracker_q.lock, &irqL); ++ ++} ++ + void _rtw_init_stainfo(struct sta_info *psta); + void _rtw_init_stainfo(struct sta_info *psta) + { +@@ -71,6 +205,7 @@ _func_enter_; + psta->no_ht_gf_set = 0; + psta->no_ht_set = 0; + psta->ht_20mhz_set = 0; ++ psta->ht_40mhz_intolerant = 0; + #endif + + #ifdef CONFIG_TX_MCAST2UNI +@@ -80,7 +215,9 @@ _func_enter_; + psta->keep_alive_trycnt = 0; + + #endif // CONFIG_AP_MODE +- ++ ++ rtw_st_ctl_init(&psta->st_ctl); ++ + _func_exit_; + + } +@@ -123,7 +260,7 @@ _func_enter_; + psta++; + } + +- ++ pstapriv->adhoc_expire_to = 4; /* 4 * 2 = 8 sec */ + + #ifdef CONFIG_AP_MODE + +@@ -317,7 +454,7 @@ _func_exit_; + + + //struct sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr) +-struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) ++struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr) + { + _irqL irqL, irqL2; + uint tmp_aid; +@@ -390,7 +527,9 @@ _func_enter_; + pstapriv->asoc_sta_count , hwaddr[0], hwaddr[1], hwaddr[2],hwaddr[3],hwaddr[4],hwaddr[5])); + + init_addba_retry_timer(pstapriv->padapter, psta); +- ++#ifdef CONFIG_IEEE80211W ++ init_dot11w_expire_timer(pstapriv->padapter, psta); ++#endif /* CONFIG_IEEE80211W */ + #ifdef CONFIG_TDLS + rtw_init_tdls_timer(pstapriv->padapter, psta); + #endif //CONFIG_TDLS +@@ -412,6 +551,7 @@ _func_enter_; + preorder_ctrl->wend_b= 0xffff; + //preorder_ctrl->wsize_b = (NR_RECVBUFF-2); + preorder_ctrl->wsize_b = 64;//64; ++ preorder_ctrl->ampdu_size = RX_AMPDU_SIZE_INVALID; + + _rtw_init_queue(&preorder_ctrl->pending_recvframe_queue); + +@@ -427,6 +567,7 @@ _func_enter_; + #endif + /* init for the sequence number of received management frame */ + psta->RxMgmtFrameSeqNum = 0xffff; ++ psta->ra_rpt_linked = _FALSE; + + //alloc mac id for non-bc/mc station, + rtw_alloc_macid(pstapriv->padapter, psta); +@@ -536,10 +677,13 @@ _func_enter_; + // re-init sta_info; 20061114 // will be init in alloc_stainfo + //_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv); + //_rtw_init_sta_recv_priv(&psta->sta_recvpriv); +- ++#ifdef CONFIG_IEEE80211W ++ _cancel_timer_ex(&psta->dot11w_expire_timer); ++#endif /* CONFIG_IEEE80211W */ + _cancel_timer_ex(&psta->addba_retry_timer); + + #ifdef CONFIG_TDLS ++ psta->tdls_sta_state = TDLS_STATE_NONE; + rtw_free_tdls_timer(psta); + #endif //CONFIG_TDLS + +@@ -636,6 +780,8 @@ _func_enter_; + + #endif // CONFIG_AP_MODE + ++ rtw_st_ctl_deinit(&psta->st_ctl); ++ + _rtw_spinlock_free(&psta->lock); + + //_enter_critical_bh(&(pfree_sta_queue->lock), &irqL0); +@@ -712,7 +858,7 @@ _func_exit_; + } + + /* any station allocated can be searched by hash list */ +-struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) ++struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr) + { + + _irqL irqL; +@@ -723,16 +869,16 @@ struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) + + u32 index; + +- u8 *addr; ++ const u8 *addr; + +- u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ const u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; + + _func_enter_; + + if(hwaddr==NULL) + return NULL; + +- if(IS_MCAST(hwaddr)) ++ if(IS_MCAST((unsigned char *)hwaddr)) + { + addr = bc_addr; + } +@@ -788,7 +934,10 @@ _func_enter_; + RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("rtw_alloc_stainfo fail")); + goto exit; + } +- ++#ifdef CONFIG_BEAMFORMING ++ psta->txbf_gid = 63; ++ psta->txbf_paid = 0; ++#endif + ptxservq= &(psta->sta_xmitpriv.be_q); + + /* +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_tdls.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_tdls.c +old mode 100755 +new mode 100644 +index 21f9fcc..f73f2d0 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_tdls.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_tdls.c +@@ -1,2967 +1,3333 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#define _RTW_TDLS_C_ +- +-#include +- +-#ifdef CONFIG_TDLS +-extern void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame); +- +-void rtw_reset_tdls_info(_adapter* padapter) +-{ +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- +- ptdlsinfo->ap_prohibited = _FALSE; +- ptdlsinfo->link_established = _FALSE; +- ptdlsinfo->sta_cnt = 0; +- ptdlsinfo->sta_maximum = _FALSE; +- ptdlsinfo->ch_sensing = 0; +- ptdlsinfo->cur_channel = 0; +- ptdlsinfo->candidate_ch = 1; //when inplement channel switching, default candidate channel is 1 +- ptdlsinfo->watchdog_count = 0; +- ptdlsinfo->dev_discovered = 0; +- +-#ifdef CONFIG_WFD +- ptdlsinfo->wfd_info = &padapter->wfd_info; +-#endif //CONFIG_WFD +-} +- +-int rtw_init_tdls_info(_adapter* padapter) +-{ +- int res = _SUCCESS; +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- +- ptdlsinfo->tdls_enable = _TRUE; +- rtw_reset_tdls_info(padapter); +- +- _rtw_spinlock_init(&ptdlsinfo->cmd_lock); +- _rtw_spinlock_init(&ptdlsinfo->hdl_lock); +- +- return res; +- +-} +- +-void rtw_free_tdls_info(struct tdls_info *ptdlsinfo) +-{ +- _rtw_spinlock_free(&ptdlsinfo->cmd_lock); +- _rtw_spinlock_free(&ptdlsinfo->hdl_lock); +- +- _rtw_memset(ptdlsinfo, 0, sizeof(struct tdls_info) ); +- +-} +- +-int _issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int wait_ack) +-{ +- int ret = _FAIL; +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- unsigned char *pframe; +- struct rtw_ieee80211_hdr *pwlanhdr; +- unsigned short *fctrl; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- update_mgntframe_attrib(padapter, pattrib); +- pattrib->retry_ctrl = _FALSE; +- +- _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); +- +- pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; +- pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; +- +- fctrl = &(pwlanhdr->frame_ctl); +- *(fctrl) = 0; +- +- // SetToDs(fctrl); +- +- if (power_mode) +- { +- SetPwrMgt(fctrl); +- } +- +- _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- +- SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +- pmlmeext->mgnt_seq++; +- SetFrameSubType(pframe, WIFI_DATA_NULL); +- +- pframe += sizeof(struct rtw_ieee80211_hdr_3addr); +- pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); +- +- pattrib->last_txcmdsz = pattrib->pktlen; +- +- if(wait_ack) +- { +- ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); +- } +- else +- { +- dump_mgntframe(padapter, pmgntframe); +- ret = _SUCCESS; +- } +- +-exit: +- return ret; +- +-} +- +-int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms) +-{ +- int ret; +- int i = 0; +- u32 start = rtw_get_current_time(); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- //[TDLS] UAPSD : merge this from issue_nulldata() and mark it first. +- #if 0 +- psta = rtw_get_stainfo(&padapter->stapriv, da); +- if (psta) { +- if (power_mode) +- rtw_hal_macid_sleep(padapter, psta->mac_id); +- else +- rtw_hal_macid_wakeup(padapter, psta->mac_id); +- } else { +- DBG_871X(FUNC_ADPT_FMT ": Can't find sta info for " MAC_FMT ", skip macid %s!!\n", +- FUNC_ADPT_ARG(padapter), MAC_ARG(da), power_mode?"sleep":"wakeup"); +- rtw_warn_on(1); +- } +- #endif +- +- do +- { +- ret = _issue_nulldata_to_TDLS_peer_STA(padapter, da, power_mode, wait_ms>0 ? _TRUE : _FALSE); +- +- i++; +- +- if (padapter->bDriverStopped || padapter->bSurpriseRemoved) +- break; +- +- if(i < try_cnt && wait_ms > 0 && ret==_FAIL) +- rtw_msleep_os(wait_ms); +- +- }while((itdlsinfo; +- struct sta_priv *pstapriv = &padapter->stapriv; +- _irqL irqL; +- +- //free peer sta_info +- _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); +- if(ptdlsinfo->sta_cnt != 0) +- ptdlsinfo->sta_cnt--; +- _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); +- if( ptdlsinfo->sta_cnt < (NUM_STA - 2 - 4) ) // -2: AP + BC/MC sta, -4: default key +- { +- ptdlsinfo->sta_maximum = _FALSE; +- _rtw_memset( &ptdlsinfo->ss_record, 0x00, sizeof(struct tdls_ss_record) ); +- } +- +- //clear cam +- rtw_clearstakey_cmd(padapter, ptdls_sta, _TRUE); +- +- if(ptdlsinfo->sta_cnt==0){ +- rtw_tdls_cmd(padapter, myid(&(padapter->eeprompriv)), TDLS_RS_RCR); +- ptdlsinfo->link_established = _FALSE; +- } +- else +- DBG_871X("Remain tdls sta:%02x\n", ptdlsinfo->sta_cnt); +- +- rtw_free_stainfo(padapter, ptdls_sta); +- +-} +- +- +-//TDLS encryption(if needed) will always be CCMP +-void rtw_tdls_set_key(_adapter *padapter, struct rx_pkt_attrib *prx_pkt_attrib, struct sta_info *ptdls_sta) +-{ +- if(prx_pkt_attrib->encrypt) +- { +- ptdls_sta->dot118021XPrivacy=_AES_; +- rtw_setstakey_cmd(padapter, ptdls_sta, _TRUE, _TRUE); +- } +-} +- +-void rtw_tdls_process_ht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) +-{ +- /* save HT capabilities in the sta object */ +- _rtw_memset(&ptdls_sta->htpriv.ht_cap, 0, sizeof(struct rtw_ieee80211_ht_cap)); +- if (data && Length >= sizeof(struct rtw_ieee80211_ht_cap) ) +- { +- ptdls_sta->flags |= WLAN_STA_HT; +- +- ptdls_sta->flags |= WLAN_STA_WME; +- +- _rtw_memcpy(&ptdls_sta->htpriv.ht_cap, data, sizeof(struct rtw_ieee80211_ht_cap)); +- +- } else +- ptdls_sta->flags &= ~WLAN_STA_HT; +- +- if(ptdls_sta->flags & WLAN_STA_HT) +- { +- if(padapter->registrypriv.ht_enable == _TRUE) +- { +- ptdls_sta->htpriv.ht_option = _TRUE; +- } +- else +- { +- ptdls_sta->htpriv.ht_option = _FALSE; +- ptdls_sta->stat_code = _STATS_FAILURE_; +- } +- } +- +- //HT related cap +- if(ptdls_sta->htpriv.ht_option) +- { +- //check if sta supports rx ampdu +- if(padapter->registrypriv.ampdu_enable==1) +- ptdls_sta->htpriv.ampdu_enable = _TRUE; +- +- //check if sta support s Short GI 20M +- if(ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) +- { +- ptdls_sta->htpriv.sgi_20m = _TRUE; +- } +- //check if sta support s Short GI 40M +- if(ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) +- { +- ptdls_sta->htpriv.sgi_40m = _TRUE; +- } +- +- // bwmode would still followed AP's setting +- if(ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) +- { +- if (padapter->mlmeextpriv.cur_bwmode >= CHANNEL_WIDTH_40) +- ptdls_sta->bw_mode = CHANNEL_WIDTH_40; +- ptdls_sta->htpriv.ch_offset = padapter->mlmeextpriv.cur_ch_offset; +- } +- } +- +-} +- +-int rtw_tdls_set_ht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) +-{ +- int tmplen; +- +- rtw_ht_use_default_setting(padapter); +- +- tmplen = pattrib->pktlen; +- rtw_restructure_ht_ie(padapter, NULL, pframe, 0, &(pattrib->pktlen), padapter->mlmeextpriv.cur_channel); +- +- return (pattrib->pktlen - tmplen); +- +-} +- +-u8 *rtw_tdls_set_sup_ch(struct mlme_ext_priv *pmlmeext, u8 *pframe, struct pkt_attrib *pattrib) +-{ +- u8 sup_ch[ 30 * 2 ] = { 0x00 }, ch_set_idx = 0; //For supported channel +- u8 ch_24g = 0, b1 = 0, b4 = 0; +- u8 bit_table = 0, sup_ch_idx = 0; +- +- do{ +- if( pmlmeext->channel_set[ch_set_idx].ChannelNum >= 1 && +- pmlmeext->channel_set[ch_set_idx].ChannelNum <= 14 ) +- { +- ch_24g = 1; // 2.4 G channels +- } +- else if( pmlmeext->channel_set[ch_set_idx].ChannelNum >= 36 && +- pmlmeext->channel_set[ch_set_idx].ChannelNum <= 48) +- { +- b1 = 1; // 5 G band1 +- } +- else if( pmlmeext->channel_set[ch_set_idx].ChannelNum >= 149 && +- pmlmeext->channel_set[ch_set_idx].ChannelNum <= 165) +- { +- b4 = 1; // 5 G band4 +- } +- else +- { +- ch_set_idx++; // We don't claim that we support DFS channels. +- continue; +- } +- +- sup_ch_idx = (ch_24g + b1 + b4 - 1) * 2; +- if( sup_ch_idx >= 0) +- { +- if(sup_ch[sup_ch_idx] == 0) +- sup_ch[sup_ch_idx] = pmlmeext->channel_set[ch_set_idx].ChannelNum; +- sup_ch[sup_ch_idx+1]++; //Number of channel +- } +- +- ch_set_idx++; +- } +- while( pmlmeext->channel_set[ch_set_idx].ChannelNum != 0 && ch_set_idx < MAX_CHANNEL_NUM ); +- +- return(rtw_set_ie(pframe, _SUPPORTED_CH_IE_, sup_ch_idx+2, sup_ch, &(pattrib->pktlen))); +-} +- +-#ifdef CONFIG_WFD +-void rtw_tdls_process_wfd_ie(struct tdls_info *ptdlsinfo, u8 *ptr, u8 length) +-{ +- u8 wfd_ie[ 128 ] = { 0x00 }; +- u32 wfd_ielen = 0; +- u32 wfd_offset = 0; +- // Try to get the TCP port information when receiving the negotiation response. +- // +- +- wfd_offset = 0; +- wfd_offset = rtw_get_wfd_ie( ptr + wfd_offset, length - wfd_offset, wfd_ie, &wfd_ielen ); +- while( wfd_offset ) +- { +- u8 attr_content[ 10 ] = { 0x00 }; +- u32 attr_contentlen = 0; +- int i; +- +- DBG_871X( "[%s] WFD IE Found!!\n", __FUNCTION__ ); +- rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); +- if ( attr_contentlen ) +- { +- ptdlsinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); +- DBG_871X( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, ptdlsinfo->wfd_info->peer_rtsp_ctrlport ); +- } +- +- _rtw_memset( attr_content, 0x00, 10); +- attr_contentlen = 0; +- rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_LOCAL_IP_ADDR, attr_content, &attr_contentlen); +- if ( attr_contentlen ) +- { +- _rtw_memcpy(ptdlsinfo->wfd_info->peer_ip_address, ( attr_content + 1 ), 4); +- DBG_871X( "[%s] Peer IP = %02u.%02u.%02u.%02u \n", __FUNCTION__, +- ptdlsinfo->wfd_info->peer_ip_address[0], ptdlsinfo->wfd_info->peer_ip_address[1], +- ptdlsinfo->wfd_info->peer_ip_address[2], ptdlsinfo->wfd_info->peer_ip_address[3] +- ); +- } +- wfd_offset = rtw_get_wfd_ie( ptr + wfd_offset, length - wfd_offset, wfd_ie, &wfd_ielen ); +- } +-} +- +-int issue_tunneled_probe_req(_adapter *padapter) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- u8 baddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; +- struct tdls_txmgmt txmgmt; +- int ret = _FAIL; +- +- DBG_871X("[%s]\n", __FUNCTION__); +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- txmgmt.action_code = TUNNELED_PROBE_REQ; +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- +- pmgntframe->frame_tag = DATA_FRAMETAG; +- pattrib->ether_type = 0x890d; +- +- _rtw_memcpy(pattrib->dst, baddr, ETH_ALEN); +- _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- +- update_tdls_attrib(padapter, pattrib); +- pattrib->qsel = pattrib->priority; +- if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { +- rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- dump_mgntframe(padapter, pmgntframe); +- ret = _SUCCESS; +-exit: +- +- return ret; +-} +- +-int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct tdls_txmgmt txmgmt; +- int ret = _FAIL; +- +- DBG_871X("[%s]\n", __FUNCTION__); +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- txmgmt.action_code = TUNNELED_PROBE_RSP; +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- +- pmgntframe->frame_tag = DATA_FRAMETAG; +- pattrib->ether_type = 0x890d; +- +- _rtw_memcpy(pattrib->dst, precv_frame->u.hdr.attrib.src, ETH_ALEN); +- _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- +- update_tdls_attrib(padapter, pattrib); +- pattrib->qsel = pattrib->priority; +- if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { +- rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- dump_mgntframe(padapter, pmgntframe); +- ret = _SUCCESS; +-exit: +- +- return ret; +-} +-#endif //CONFIG_WFD +- +-int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack) +-{ +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct sta_info *ptdls_sta= NULL; +- _irqL irqL; +- static u8 dialogtoken = 0; +- int ret = _FAIL; +- u32 timeout_interval= TPK_RESEND_COUNT * 1000; //retry timer should set at least 301 sec, using TPK_count counting 301 times. +- +- ptxmgmt->action_code = TDLS_SETUP_REQUEST; +- if(ptdlsinfo->ap_prohibited == _TRUE) +- goto exit; +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- pmgntframe->frame_tag = DATA_FRAMETAG; +- pattrib->ether_type = 0x890d; +- +- _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); +- _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- +- update_tdls_attrib(padapter, pattrib); +- +- //init peer sta_info +- ptdls_sta = rtw_get_stainfo(pstapriv, ptxmgmt->peer); +- if(ptdls_sta==NULL) +- { +- ptdls_sta = rtw_alloc_stainfo(pstapriv, ptxmgmt->peer); +- if(ptdls_sta==NULL) +- { +- DBG_871X("[%s] rtw_alloc_stainfo fail\n", __FUNCTION__); +- rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- } +- +- if(!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) +- ptdlsinfo->sta_cnt++; +- if( ptdlsinfo->sta_cnt == (NUM_STA - 2 - 4) ) // -2: AP + BC/MC sta, -4: default key +- { +- ptdlsinfo->sta_maximum = _TRUE; +- } +- +- ptdls_sta->tdls_sta_state |= TDLS_RESPONDER_STATE; +- //for tdls; ptdls_sta->aid is used to fill dialogtoken +- ptdls_sta->dialog = dialogtoken; +- dialogtoken = (dialogtoken+1)%256; +- ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; +- _set_timer( &ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME ); +- +- pattrib->qsel = pattrib->priority; +- +- if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) !=_SUCCESS ){ +- rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- +- if (wait_ack) { +- ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); +- } else { +- dump_mgntframe(padapter, pmgntframe); +- ret = _SUCCESS; +- } +- +- ret = _SUCCESS; +- +-exit: +- +- return ret; +-} +- +-int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct sta_info *ptdls_sta=NULL; +- _irqL irqL; +- int ret = _FAIL; +- +- ptxmgmt->action_code = TDLS_TEARDOWN; +- ptdls_sta = rtw_get_stainfo(pstapriv, ptxmgmt->peer); +- if(ptdls_sta==NULL){ +- DBG_871X("Np tdls_sta for tearing down\n"); +- goto exit; +- } +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- +- pmgntframe->frame_tag = DATA_FRAMETAG; +- pattrib->ether_type = 0x890d; +- +- _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); +- _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- +- update_tdls_attrib(padapter, pattrib); +- pattrib->qsel = pattrib->priority; +- if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { +- rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- +- if (wait_ack) { +- ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); +- } else { +- dump_mgntframe(padapter, pmgntframe); +- ret = _SUCCESS; +- } +- +- if(ret == _SUCCESS) +- { +- if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE){ +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CS_OFF); +- } +- +- if( ptdls_sta->timer_flag == 1 ) +- { +- _enter_critical_bh(&(padapter->tdlsinfo.hdl_lock), &irqL); +- ptdls_sta->timer_flag = 2; +- _exit_critical_bh(&(padapter->tdlsinfo.hdl_lock), &irqL); +- } +- else +- rtw_tdls_cmd(padapter, ptxmgmt->peer, TDLS_TEAR_STA ); +- } +- +-exit: +- +- return ret; +-} +- +-int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- int ret = _FAIL; +- +- ptxmgmt->action_code = TDLS_DISCOVERY_REQUEST; +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- pmgntframe->frame_tag = DATA_FRAMETAG; +- pattrib->ether_type = 0x890d; +- +- _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); +- _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- +- update_tdls_attrib(padapter, pattrib); +- pattrib->qsel = pattrib->priority; +- if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { +- rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- dump_mgntframe(padapter, pmgntframe); +- DBG_871X("issue tdls dis req\n"); +- +- ret = _SUCCESS; +-exit: +- +- return ret; +-} +- +-int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- int ret = _FAIL; +- +- ptxmgmt->action_code = TDLS_SETUP_RESPONSE; +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- pmgntframe->frame_tag = DATA_FRAMETAG; +- pattrib->ether_type = 0x890d; +- +- _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); +- _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, get_bssid(&(padapter->mlmepriv)), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- +- update_tdls_attrib(padapter, pattrib); +- pattrib->qsel = pattrib->priority; +- if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { +- rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- +- dump_mgntframe(padapter, pmgntframe); +- +- ret = _SUCCESS; +-exit: +- +- return ret; +- +-} +- +-int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) +-{ +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- int ret = _FAIL; +- +- ptxmgmt->action_code = TDLS_SETUP_CONFIRM; +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- pmgntframe->frame_tag = DATA_FRAMETAG; +- pattrib->ether_type = 0x890d; +- +- _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); +- _rtw_memcpy(pattrib->src, myid(&padapter->eeprompriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, get_bssid(&padapter->mlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- +- update_tdls_attrib(padapter, pattrib); +- pattrib->qsel = pattrib->priority; +- if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { +- rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- +- dump_mgntframe(padapter, pmgntframe); +- +- ret = _SUCCESS; +-exit: +- +- return ret; +- +-} +- +-//TDLS Discovery Response frame is a management action frame +-int issue_tdls_dis_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- unsigned char *pframe; +- struct rtw_ieee80211_hdr *pwlanhdr; +- unsigned short *fctrl; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- int ret = _FAIL; +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- update_mgntframe_attrib(padapter, pattrib); +- +- _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); +- +- pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; +- pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; +- +- fctrl = &(pwlanhdr->frame_ctl); +- *(fctrl) = 0; +- +- // unicast probe request frame +- _rtw_memcpy(pwlanhdr->addr1, ptxmgmt->peer, ETH_ALEN); +- _rtw_memcpy(pattrib->dst, pwlanhdr->addr1, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN); +- _rtw_memcpy(pattrib->src, pwlanhdr->addr2, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, pwlanhdr->addr3, ETH_ALEN); +- +- SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +- pmlmeext->mgnt_seq++; +- SetFrameSubType(pframe, WIFI_ACTION); +- +- pframe += sizeof (struct rtw_ieee80211_hdr_3addr); +- pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); +- +- rtw_build_tdls_dis_rsp_ies(padapter, pmgntframe, pframe, ptxmgmt->dialog_token, privacy); +- +- pattrib->nr_frags = 1; +- pattrib->last_txcmdsz = pattrib->pktlen; +- +- dump_mgntframe(padapter, pmgntframe); +- ret = _SUCCESS; +- +-exit: +- return ret; +-} +- +-int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *ptdls_sta) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct tdls_txmgmt txmgmt; +- int ret = _FAIL; +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- txmgmt.action_code = TDLS_PEER_TRAFFIC_RESPONSE; +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- +- pmgntframe->frame_tag = DATA_FRAMETAG; +- pattrib->ether_type = 0x890d; +- +- _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); +- _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- +- update_tdls_attrib(padapter, pattrib); +- pattrib->qsel = pattrib->priority; +- +- if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) !=_SUCCESS ){ +- rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- +- dump_mgntframe(padapter, pmgntframe); +- ret = _SUCCESS; +- +-exit: +- +- return ret; +-} +- +-int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *ptdls_sta) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct tdls_txmgmt txmgmt; +- int ret = _FAIL; +- static u8 dialogtoken=0; +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- txmgmt.action_code = TDLS_PEER_TRAFFIC_INDICATION; +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- +- pmgntframe->frame_tag = DATA_FRAMETAG; +- pattrib->ether_type = 0x890d; +- +- _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); +- _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- +- //for tdls; pattrib->nr_frags is used to fill dialogtoken +- ptdls_sta->dialog = dialogtoken; +- dialogtoken = (dialogtoken+1)%256; +- //PTI frame's priority should be AC_VO +- pattrib->priority = 7; +- +- update_tdls_attrib(padapter, pattrib); +- pattrib->qsel = pattrib->priority; +- if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { +- rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- +- dump_mgntframe(padapter, pmgntframe); +- ret = _SUCCESS; +- +-exit: +- +- return ret; +-} +- +-int issue_tdls_ch_switch_req(_adapter *padapter, u8 *mac_addr) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct tdls_txmgmt txmgmt; +- int ret = _FAIL; +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- txmgmt.action_code = TDLS_CHANNEL_SWITCH_REQUEST; +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- +- pmgntframe->frame_tag = DATA_FRAMETAG; +- pattrib->ether_type = 0x890d; +- +- _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); +- _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- +- update_tdls_attrib(padapter, pattrib); +- pattrib->qsel = pattrib->priority; +- if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) !=_SUCCESS ){ +- rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- +- dump_mgntframe(padapter, pmgntframe); +- ret = _SUCCESS; +-exit: +- +- return ret; +-} +- +-int issue_tdls_ch_switch_rsp(_adapter *padapter, u8 *mac_addr) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct tdls_txmgmt txmgmt; +- int ret = _FAIL; +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- txmgmt.action_code = TDLS_CHANNEL_SWITCH_RESPONSE; +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- +- pmgntframe->frame_tag = DATA_FRAMETAG; +- pattrib->ether_type = 0x890d; +- +- _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); +- _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); +- +- update_tdls_attrib(padapter, pattrib); +- pattrib->qsel = pattrib->priority; +-/* +- _enter_critical_bh(&pxmitpriv->lock, &irqL); +- if(xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pmgntframe)==_TRUE){ +- _exit_critical_bh(&pxmitpriv->lock, &irqL); +- return _FALSE; +- } +-*/ +- if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) !=_SUCCESS ){ +- rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); +- rtw_free_xmitframe(pxmitpriv, pmgntframe); +- goto exit; +- } +- dump_mgntframe(padapter, pmgntframe); +- ret = _SUCCESS; +-exit: +- +- return ret; +-} +- +-int On_TDLS_Dis_Rsp(_adapter *padapter, union recv_frame *precv_frame) +-{ +- struct sta_info *ptdls_sta = NULL, *psta = rtw_get_stainfo(&(padapter->stapriv), get_bssid(&(padapter->mlmepriv))); +- struct recv_priv *precvpriv = &(padapter->recvpriv); +- u8 *ptr = precv_frame->u.hdr.rx_data, *psa; +- struct rx_pkt_attrib *pattrib = &(precv_frame->u.hdr.attrib); +- struct tdls_info *ptdlsinfo = &(padapter->tdlsinfo); +- u8 empty_addr[ETH_ALEN] = { 0x00 }; +- int UndecoratedSmoothedPWDB; +- struct tdls_txmgmt txmgmt; +- int ret = _SUCCESS; +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- //WFDTDLS: for sigma test, not to setup direct link automatically +- ptdlsinfo->dev_discovered = 1; +- +-#ifdef CONFIG_TDLS_AUTOSETUP +- psa = get_sa(ptr); +- ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), psa); +- +- if(ptdls_sta != NULL) +- { +- ptdls_sta->tdls_sta_state |= TDLS_ALIVE_STATE; +- +- //Record the tdls sta with lowest signal strength +- if( (ptdlsinfo->sta_maximum == _TRUE) && (ptdls_sta->alive_count >= 1) ) +- { +- if( _rtw_memcmp(ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN) ) +- { +- _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); +- ptdlsinfo->ss_record.RxPWDBAll = pattrib->RxPWDBAll; +- } +- else +- { +- if( ptdlsinfo->ss_record.RxPWDBAll < pattrib->RxPWDBAll ) +- { +- _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); +- ptdlsinfo->ss_record.RxPWDBAll = pattrib->RxPWDBAll; +- } +- } +- } +- +- } +- else +- { +- if( ptdlsinfo->sta_maximum == _TRUE) +- { +- if( _rtw_memcmp( ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN ) ) +- { +- //All traffics are busy, do not set up another direct link. +- ret = _FAIL; +- goto exit; +- } +- else +- { +- if( pattrib->RxPWDBAll > ptdlsinfo->ss_record.RxPWDBAll ) +- { +- _rtw_memcpy(txmgmt.peer, ptdlsinfo->ss_record.macaddr, ETH_ALEN); +- //issue_tdls_teardown(padapter, ptdlsinfo->ss_record.macaddr, _FALSE); +- } +- else +- { +- ret = _FAIL; +- goto exit; +- } +- } +- } +- +- padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, &UndecoratedSmoothedPWDB); +- +- if( pattrib->RxPWDBAll + TDLS_SIGNAL_THRESH >= UndecoratedSmoothedPWDB); +- { +- DBG_871X("pattrib->RxPWDBAll=%d, pdmpriv->UndecoratedSmoothedPWDB=%d\n", pattrib->RxPWDBAll, UndecoratedSmoothedPWDB); +- _rtw_memcpy(txmgmt.peer, psa, ETH_ALEN); +- issue_tdls_setup_req(padapter, &txmgmt, _FALSE); +- } +- } +-#endif //CONFIG_TDLS_AUTOSETUP +- +-exit: +- return ret; +- +-} +- +-sint On_TDLS_Setup_Req(_adapter *padapter, union recv_frame *precv_frame) +-{ +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- u8 *psa, *pmyid; +- struct sta_info *ptdls_sta= NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- u8 *ptr = precv_frame->u.hdr.rx_data; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- _irqL irqL; +- struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; +- u8 *prsnie, *ppairwise_cipher; +- u8 i, k; +- u8 ccmp_included=0, rsnie_included=0; +- u16 j, pairwise_count; +- u8 SNonce[32]; +- u32 *timeout_interval=NULL; +- sint parsing_length; //frame body length, without icv_len +- PNDIS_802_11_VARIABLE_IEs pIE; +- u8 FIXED_IE = 5; +- unsigned char supportRate[16]; +- int supportRateNum = 0; +- struct tdls_txmgmt txmgmt; +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- psa = get_sa(ptr); +- ptdls_sta = rtw_get_stainfo(pstapriv, psa); +- +- pmyid=myid(&(padapter->eeprompriv)); +- ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; +- parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len +- -prx_pkt_attrib->hdrlen +- -prx_pkt_attrib->iv_len +- -prx_pkt_attrib->icv_len +- -LLC_HEADER_SIZE +- -ETH_TYPE_LEN +- -PAYLOAD_TYPE_LEN +- -FIXED_IE; +- +- if(ptdlsinfo->ap_prohibited == _TRUE) +- { +- goto exit; +- } +- +- if(ptdls_sta==NULL){ +- ptdls_sta = rtw_alloc_stainfo(pstapriv, psa); +- }else{ +- if(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE){ +- //If the direct link is already set up +- //Process as re-setup after tear down +- DBG_871X("re-setup a direct link\n"); +- } +- //already receiving TDLS setup request +- else if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ +- DBG_871X("receive duplicated TDLS setup request frame in handshaking\n"); +- goto exit; +- } +- //When receiving and sending setup_req to the same link at the same time, STA with higher MAC_addr would be initiator +- //following is to check out MAC_addr +- else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ +- DBG_871X("receive setup_req after sending setup_req\n"); +- for (i=0;i<6;i++){ +- if(*(pmyid+i)==*(psa+i)){ +- } +- else if(*(pmyid+i)>*(psa+i)){ +- ptdls_sta->tdls_sta_state=TDLS_INITIATOR_STATE; +- break; +- }else if(*(pmyid+i)<*(psa+i)){ +- goto exit; +- } +- } +- } +- } +- +- if(ptdls_sta) +- { +- ptdls_sta->dialog = *(ptr+2); //copy dialog token +- ptdls_sta->stat_code = 0; +- +- //parsing information element +- for(j=FIXED_IE; jElementID) +- { +- case _SUPPORTEDRATES_IE_: +- _rtw_memcpy(supportRate, pIE->data, pIE->Length); +- supportRateNum = pIE->Length; +- break; +- case _COUNTRY_IE_: +- break; +- case _EXT_SUPPORTEDRATES_IE_: +- if(supportRateNum<=sizeof(supportRate)) +- { +- _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); +- supportRateNum += pIE->Length; +- } +- break; +- case _SUPPORTED_CH_IE_: +- break; +- case _RSN_IE_2_: +- rsnie_included=1; +- if(prx_pkt_attrib->encrypt){ +- prsnie=(u8*)pIE; +- //check whether initiator STA has CCMP pairwise_cipher. +- ppairwise_cipher=prsnie+10; +- _rtw_memcpy(ptdls_sta->TDLS_RSNIE, pIE->data, pIE->Length); +- pairwise_count = *(u16*)(ppairwise_cipher-2); +- for(k=0;kstat_code=72; +- } +- } +- break; +- case _EXT_CAP_IE_: +- break; +- case _VENDOR_SPECIFIC_IE_: +- break; +- case _FTIE_: +- if(prx_pkt_attrib->encrypt) +- _rtw_memcpy(SNonce, (ptr+j+52), 32); +- break; +- case _TIMEOUT_ITVL_IE_: +- if(prx_pkt_attrib->encrypt) +- timeout_interval = (u32 *)(ptr+j+3); +- break; +- case _RIC_Descriptor_IE_: +- break; +- case _HT_CAPABILITY_IE_: +- rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); +- break; +- case EID_BSSCoexistence: +- break; +- case _LINK_ID_IE_: +- if(_rtw_memcmp(get_bssid(pmlmepriv), pIE->data, 6) == _FALSE) +- { +- //not in the same BSS +- ptdls_sta->stat_code=7; +- } +- break; +- default: +- break; +- } +- +- j += (pIE->Length + 2); +- +- } +- +- //check status code +- //if responder STA has/hasn't security on AP, but request hasn't/has RSNIE, it should reject +- if(ptdls_sta->stat_code == 0 ) +- { +- if(rsnie_included && (prx_pkt_attrib->encrypt==0)){ +- //security disabled +- ptdls_sta->stat_code = 5; +- }else if(rsnie_included==0 && (prx_pkt_attrib->encrypt)){ +- //request haven't RSNIE +- ptdls_sta->stat_code = 38; +- } +- +-#ifdef CONFIG_WFD +- //WFD test plan version 0.18.2 test item 5.1.5 +- //SoUT does not use TDLS if AP uses weak security +- if ( padapter->wdinfo.wfd_tdls_enable ) +- { +- if(rsnie_included && (prx_pkt_attrib->encrypt != _AES_)) +- { +- ptdls_sta->stat_code = 5; +- } +- } +-#endif //CONFIG_WFD +- } +- +- ptdls_sta->tdls_sta_state|= TDLS_INITIATOR_STATE; +- if(prx_pkt_attrib->encrypt){ +- _rtw_memcpy(ptdls_sta->SNonce, SNonce, 32); +- _rtw_memcpy(&(ptdls_sta->TDLS_PeerKey_Lifetime), timeout_interval, 4); +- } +- +- //update station supportRate +- ptdls_sta->bssratelen = supportRateNum; +- _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); +- +- if(!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) +- ptdlsinfo->sta_cnt++; +- if( ptdlsinfo->sta_cnt == (NUM_STA - 2 - 4) ) // -2: AP + BC/MC sta, -4: default key +- { +- ptdlsinfo->sta_maximum = _TRUE; +- } +- +-#ifdef CONFIG_WFD +- rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length - FIXED_IE); +-#endif // CONFIG_WFD +- +- } +- else +- { +- goto exit; +- } +- +- _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); +- issue_tdls_setup_rsp(padapter, &txmgmt); +- +- if(ptdls_sta->stat_code==0) +- { +- _set_timer( &ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); +- } +- else //status code!=0 ; setup unsuccess +- { +- free_tdls_sta(padapter, ptdls_sta); +- } +- +-exit: +- +- return _SUCCESS; +-} +- +-int On_TDLS_Setup_Rsp(_adapter *padapter, union recv_frame *precv_frame) +-{ +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- struct sta_info *ptdls_sta= NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- u8 *ptr = precv_frame->u.hdr.rx_data; +- _irqL irqL; +- struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; +- u8 *psa; +- u16 stat_code; +- sint parsing_length; //frame body length, without icv_len +- PNDIS_802_11_VARIABLE_IEs pIE; +- u8 FIXED_IE =7; +- u8 ANonce[32]; +- u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL, *ppairwise_cipher=NULL; +- u16 pairwise_count, j, k; +- u8 verify_ccmp=0; +- unsigned char supportRate[16]; +- int supportRateNum = 0; +- struct tdls_txmgmt txmgmt; +- int ret = _SUCCESS; +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- psa = get_sa(ptr); +- ptdls_sta = rtw_get_stainfo(pstapriv, psa); +- +- if ( NULL == ptdls_sta ) +- { +- ret = _FAIL; +- goto exit; +- } +- +- ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; +- parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len +- -prx_pkt_attrib->hdrlen +- -prx_pkt_attrib->iv_len +- -prx_pkt_attrib->icv_len +- -LLC_HEADER_SIZE +- -TYPE_LENGTH_FIELD_SIZE +- -1 +- -FIXED_IE; +- +- _rtw_memcpy(&stat_code, ptr+2, 2); +- +- if(stat_code!=0) +- { +- DBG_871X( "[%s] status_code = %d, free_tdls_sta\n", __FUNCTION__, stat_code ); +- free_tdls_sta(padapter, ptdls_sta); +- ret = _FAIL; +- goto exit; +- } +- +- stat_code = 0; +- +- //parsing information element +- for(j=FIXED_IE; jElementID) +- { +- case _SUPPORTEDRATES_IE_: +- _rtw_memcpy(supportRate, pIE->data, pIE->Length); +- supportRateNum = pIE->Length; +- break; +- case _COUNTRY_IE_: +- break; +- case _EXT_SUPPORTEDRATES_IE_: +- if(supportRateNum<=sizeof(supportRate)) +- { +- _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); +- supportRateNum += pIE->Length; +- } +- break; +- case _SUPPORTED_CH_IE_: +- break; +- case _RSN_IE_2_: +- prsnie=(u8*)pIE; +- //check whether responder STA has CCMP pairwise_cipher. +- ppairwise_cipher=prsnie+10; +- _rtw_memcpy(&pairwise_count, (u16*)(ppairwise_cipher-2), 2); +- for(k=0;kANonce, (ptr+j+20), 32); +- _rtw_memcpy(ANonce, (ptr+j+20), 32); +- break; +- case _TIMEOUT_ITVL_IE_: +- ptimeout_ie=(u8*)pIE; +- break; +- case _RIC_Descriptor_IE_: +- break; +- case _HT_CAPABILITY_IE_: +- rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); +- break; +- case EID_BSSCoexistence: +- break; +- case _LINK_ID_IE_: +- plinkid_ie=(u8*)pIE; +- break; +- default: +- break; +- } +- +- j += (pIE->Length + 2); +- +- } +- +- //update station's supportRate +- ptdls_sta->bssratelen = supportRateNum; +- _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); +- +- _rtw_memcpy(ptdls_sta->ANonce, ANonce, 32); +- +-#ifdef CONFIG_WFD +- rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length - FIXED_IE); +-#endif // CONFIG_WFD +- +- if(stat_code != 0) +- { +- ptdls_sta->stat_code = stat_code; +- } +- else +- { +- if(prx_pkt_attrib->encrypt) +- { +- if(verify_ccmp==1) +- { +- wpa_tdls_generate_tpk(padapter, ptdls_sta); +- ptdls_sta->stat_code=0; +- if(tdls_verify_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie)==0) //0: Invalid, 1: valid +- { +- free_tdls_sta(padapter, ptdls_sta); +- ret = _FAIL; +- goto exit; +- } +- } +- else +- { +- ptdls_sta->stat_code=72; //invalide contents of RSNIE +- } +- +- }else{ +- ptdls_sta->stat_code=0; +- } +- } +- +- DBG_871X("issue_tdls_setup_cfm\n"); +- _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); +- issue_tdls_setup_cfm(padapter, &txmgmt); +- +- if(ptdls_sta->stat_code==0) +- { +- ptdlsinfo->link_established = _TRUE; +- +- if( ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE ) +- { +- ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; +- _cancel_timer_ex( &ptdls_sta->handshake_timer); +- } +- +- rtw_tdls_set_key(padapter, prx_pkt_attrib, ptdls_sta); +- +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_ESTABLISHED); +- +- } +- +-exit: +- return ret; +- +-} +- +-int On_TDLS_Setup_Cfm(_adapter *padapter, union recv_frame *precv_frame) +-{ +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- struct sta_info *ptdls_sta= NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- u8 *ptr = precv_frame->u.hdr.rx_data; +- _irqL irqL; +- struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; +- u8 *psa; +- u16 stat_code; +- sint parsing_length; +- PNDIS_802_11_VARIABLE_IEs pIE; +- u8 FIXED_IE =5; +- u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL, *ppairwise_cipher=NULL; +- u16 j, pairwise_count; +- int ret = _SUCCESS; +- +- psa = get_sa(ptr); +- ptdls_sta = rtw_get_stainfo(pstapriv, psa); +- +- if(ptdls_sta == NULL) +- { +- DBG_871X( "[%s] Direct Link Peer = "MAC_FMT" not found\n", __FUNCTION__, MAC_ARG(psa) ); +- ret = _FAIL; +- goto exit; +- } +- +- ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; +- parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len +- -prx_pkt_attrib->hdrlen +- -prx_pkt_attrib->iv_len +- -prx_pkt_attrib->icv_len +- -LLC_HEADER_SIZE +- -ETH_TYPE_LEN +- -PAYLOAD_TYPE_LEN +- -FIXED_IE; +- _rtw_memcpy(&stat_code, ptr+2, 2); +- +- if(stat_code!=0){ +- DBG_871X( "[%s] stat_code = %d\n, free_tdls_sta", __FUNCTION__, stat_code ); +- free_tdls_sta(padapter, ptdls_sta); +- ret = _FAIL; +- goto exit; +- } +- +- if(prx_pkt_attrib->encrypt){ +- //parsing information element +- for(j=FIXED_IE; jElementID) +- { +- case _RSN_IE_2_: +- prsnie=(u8*)pIE; +- break; +- case _VENDOR_SPECIFIC_IE_: +- break; +- case _FTIE_: +- pftie=(u8*)pIE; +- break; +- case _TIMEOUT_ITVL_IE_: +- ptimeout_ie=(u8*)pIE; +- break; +- case _HT_EXTRA_INFO_IE_: +- break; +- case _LINK_ID_IE_: +- plinkid_ie=(u8*)pIE; +- break; +- default: +- break; +- } +- +- j += (pIE->Length + 2); +- +- } +- +- //verify mic in FTIE MIC field +- if(tdls_verify_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie)==0){ //0: Invalid, 1: Valid +- free_tdls_sta(padapter, ptdls_sta); +- ret = _FAIL; +- goto exit; +- } +- +- } +- +- ptdlsinfo->link_established = _TRUE; +- if( ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE ) +- { +- ptdls_sta->tdls_sta_state|=TDLS_LINKED_STATE; +- _cancel_timer_ex( &ptdls_sta->handshake_timer); +- } +- +- rtw_tdls_set_key(padapter, prx_pkt_attrib, ptdls_sta); +- +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_ESTABLISHED); +- +-exit: +- return ret; +- +-} +- +-int On_TDLS_Dis_Req(_adapter *padapter, union recv_frame *precv_frame) +-{ +- struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct sta_info *psta_ap; +- u8 *ptr = precv_frame->u.hdr.rx_data; +- sint parsing_length; //frame body length, without icv_len +- PNDIS_802_11_VARIABLE_IEs pIE; +- u8 FIXED_IE = 3, *dst; +- u16 j; +- struct tdls_txmgmt txmgmt; +- int ret = _SUCCESS; +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE + 1; +- txmgmt.dialog_token = *(ptr+2); +- _rtw_memcpy(&txmgmt.peer, precv_frame->u.hdr.attrib.src, ETH_ALEN); +- txmgmt.action_code = TDLS_DISCOVERY_RESPONSE; +- parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len +- -prx_pkt_attrib->hdrlen +- -prx_pkt_attrib->iv_len +- -prx_pkt_attrib->icv_len +- -LLC_HEADER_SIZE +- -TYPE_LENGTH_FIELD_SIZE +- -1 +- -FIXED_IE; +- +- //parsing information element +- for(j=FIXED_IE; jElementID) +- { +- case _LINK_ID_IE_: +- psta_ap = rtw_get_stainfo(pstapriv, pIE->data); +- if(psta_ap == NULL) +- { +- goto exit; +- } +- dst = pIE->data + 12; +- if( (MacAddr_isBcst(dst) == _FALSE) && (_rtw_memcmp(myid(&(padapter->eeprompriv)), dst, 6) == _FALSE) ) +- { +- goto exit; +- } +- break; +- default: +- break; +- } +- +- j += (pIE->Length + 2); +- +- } +- +- issue_tdls_dis_rsp(padapter, &txmgmt, prx_pkt_attrib->privacy); +- +-exit: +- return ret; +- +-} +- +-int On_TDLS_Teardown(_adapter *padapter, union recv_frame *precv_frame) +-{ +- u8 *psa; +- u8 *ptr = precv_frame->u.hdr.rx_data; +- struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct sta_info *ptdls_sta= NULL; +- _irqL irqL; +- +- psa = get_sa(ptr); +- +- ptdls_sta = rtw_get_stainfo(pstapriv, psa); +- if(ptdls_sta!=NULL){ +- if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE){ +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CS_OFF); +- } +- free_tdls_sta(padapter, ptdls_sta); +- } +- +- return _SUCCESS; +- +-} +- +-u8 TDLS_check_ch_state(uint state){ +- if( (state & TDLS_CH_SWITCH_ON_STATE) && +- (state & TDLS_AT_OFF_CH_STATE) && +- (state & TDLS_PEER_AT_OFF_STATE) ){ +- +- if(state & TDLS_PEER_SLEEP_STATE) +- return 2; //U-APSD + ch. switch +- else +- return 1; //ch. switch +- }else +- return 0; +-} +- +-int On_TDLS_Peer_Traffic_Indication(_adapter *padapter, union recv_frame *precv_frame) +-{ +- struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; +- struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->src); +- u8 *ptr = precv_frame->u.hdr.rx_data; +- +- ptr +=pattrib->hdrlen + pattrib->iv_len + LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE + 1; +- +- if(ptdls_sta != NULL) +- { +- ptdls_sta->dialog = *(ptr+2); +- issue_tdls_peer_traffic_rsp(padapter, ptdls_sta); +- +- //issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 0, 0, 0); +- } +- else +- { +- DBG_871X("from unknown sta:"MAC_FMT"\n", MAC_ARG(pattrib->src)); +- return _FAIL; +- } +- +- return _SUCCESS; +-} +- +-//we process buffered data for 1. U-APSD, 2. ch. switch, 3. U-APSD + ch. switch here +-int On_TDLS_Peer_Traffic_Rsp(_adapter *padapter, union recv_frame *precv_frame) +-{ +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; +- struct sta_priv *pstapriv = &padapter->stapriv; +- //get peer sta infomation +- struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src); +- u8 wmmps_ac=0, state=TDLS_check_ch_state(ptdls_sta->tdls_sta_state); +- int i; +- +- ptdls_sta->sta_stats.rx_data_pkts++; +- +- ptdls_sta->tdls_sta_state &= ~(TDLS_WAIT_PTR_STATE); +- +- //receive peer traffic response frame, sleeping STA wakes up +- //ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_SLEEP_STATE); +- //process_wmmps_data( padapter, precv_frame); +- +- // if noticed peer STA wakes up by receiving peer traffic response +- // and we want to do channel swtiching, then we will transmit channel switch request first +- if(ptdls_sta->tdls_sta_state & TDLS_APSD_CHSW_STATE){ +- issue_tdls_ch_switch_req(padapter, pattrib->src); +- ptdls_sta->tdls_sta_state &= ~(TDLS_APSD_CHSW_STATE); +- return _SUCCESS; +- } +- +- //check 4-AC queue bit +- if(ptdls_sta->uapsd_vo || ptdls_sta->uapsd_vi || ptdls_sta->uapsd_be || ptdls_sta->uapsd_bk) +- wmmps_ac=1; +- +- //if it's a direct link and have buffered frame +- if(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE){ +- //[TDLS] UAPSD +- //if(wmmps_ac && state) +- if(wmmps_ac && 1) +- { +- _irqL irqL; +- _list *xmitframe_plist, *xmitframe_phead; +- struct xmit_frame *pxmitframe=NULL; +- +- _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); +- +- xmitframe_phead = get_list_head(&ptdls_sta->sleep_q); +- xmitframe_plist = get_next(xmitframe_phead); +- +- //transmit buffered frames +- while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) +- { +- pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); +- xmitframe_plist = get_next(xmitframe_plist); +- rtw_list_delete(&pxmitframe->list); +- +- ptdls_sta->sleepq_len--; +- ptdls_sta->sleepq_ac_len--; +- if(ptdls_sta->sleepq_len>0){ +- pxmitframe->attrib.mdata = 1; +- pxmitframe->attrib.eosp = 0; +- }else{ +- pxmitframe->attrib.mdata = 0; +- pxmitframe->attrib.eosp = 1; +- } +- pxmitframe->attrib.triggered = 1; +- +- rtw_hal_xmitframe_enqueue(padapter, pxmitframe); +- +- +- } +- +- if(ptdls_sta->sleepq_len==0) +- { +- DBG_871X("no buffered packets for tdls to xmit\n"); +- //on U-APSD + CH. switch state, when there is no buffered date to xmit, +- // we should go back to base channel +- if(state==2){ +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CS_OFF); +- }else if(ptdls_sta->tdls_sta_state&TDLS_SW_OFF_STATE){ +- ptdls_sta->tdls_sta_state &= ~(TDLS_SW_OFF_STATE); +- ptdlsinfo->candidate_ch= pmlmeext->cur_channel; +- issue_tdls_ch_switch_req(padapter, pattrib->src); +- DBG_871X("issue tdls ch switch req back to base channel\n"); +- } +- +- } +- else +- { +- DBG_871X("error!psta->sleepq_len=%d\n", ptdls_sta->sleepq_len); +- ptdls_sta->sleepq_len=0; +- } +- +- _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); +- +- } +- +- } +- +- return _SUCCESS; +-} +- +-sint On_TDLS_Ch_Switch_Req(_adapter *padapter, union recv_frame *precv_frame) +-{ +- struct sta_info *ptdls_sta= NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- u8 *ptr = precv_frame->u.hdr.rx_data; +- struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; +- u8 *psa; +- sint parsing_length; +- PNDIS_802_11_VARIABLE_IEs pIE; +- u8 FIXED_IE =3; +- u16 j; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- +- psa = get_sa(ptr); +- ptdls_sta = rtw_get_stainfo(pstapriv, psa); +- +- ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; +- parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len +- -prx_pkt_attrib->hdrlen +- -prx_pkt_attrib->iv_len +- -prx_pkt_attrib->icv_len +- -LLC_HEADER_SIZE +- -ETH_TYPE_LEN +- -PAYLOAD_TYPE_LEN +- -FIXED_IE; +- +- ptdls_sta->off_ch = *(ptr+2); +- +- //parsing information element +- for(j=FIXED_IE; jElementID) +- { +- case _COUNTRY_IE_: +- break; +- case _CH_SWTICH_ANNOUNCE_: +- break; +- case _LINK_ID_IE_: +- break; +- case _CH_SWITCH_TIMING_: +- _rtw_memcpy(&ptdls_sta->ch_switch_time, pIE->data, 2); +- _rtw_memcpy(&ptdls_sta->ch_switch_timeout, pIE->data+2, 2); +- default: +- break; +- } +- +- j += (pIE->Length + 2); +- +- } +- +- //todo: check status +- ptdls_sta->stat_code=0; +- ptdls_sta->tdls_sta_state |= TDLS_CH_SWITCH_ON_STATE; +- +- issue_nulldata(padapter, NULL, 1, 0, 0); +- +- issue_tdls_ch_switch_rsp(padapter, psa); +- +- DBG_871X("issue tdls channel switch response\n"); +- +- if((ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE) && ptdls_sta->off_ch==pmlmeext->cur_channel){ +- DBG_871X("back to base channel %x\n", pmlmeext->cur_channel); +- ptdls_sta->option=TDLS_BASE_CH; +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_BASE_CH); +- }else{ +- ptdls_sta->option=TDLS_OFF_CH; +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_OFF_CH); +- } +- return _SUCCESS; +-} +- +-sint On_TDLS_Ch_Switch_Rsp(_adapter *padapter, union recv_frame *precv_frame) +-{ +- struct sta_info *ptdls_sta= NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- u8 *ptr = precv_frame->u.hdr.rx_data; +- struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; +- u8 *psa; +- sint parsing_length; +- PNDIS_802_11_VARIABLE_IEs pIE; +- u8 FIXED_IE =4; +- u16 stat_code, j, switch_time, switch_timeout; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- int ret = _SUCCESS; +- +- psa = get_sa(ptr); +- ptdls_sta = rtw_get_stainfo(pstapriv, psa); +- +- //if channel switch is running and receiving Unsolicited TDLS Channel Switch Response, +- //it will go back to base channel and terminate this channel switch procedure +- if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE ){ +- if(pmlmeext->cur_channel==ptdls_sta->off_ch){ +- DBG_871X("back to base channel %x\n", pmlmeext->cur_channel); +- ptdls_sta->option=TDLS_BASE_CH; +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_BASE_CH); +- }else{ +- DBG_871X("receive unsolicited channel switch response \n"); +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CS_OFF); +- } +- ret = _FAIL; +- goto exit; +- } +- +- //avoiding duplicated or unconditional ch. switch. rsp +- if(!(ptdls_sta->tdls_sta_state & TDLS_CH_SW_INITIATOR_STATE)) +- { +- ret = _FAIL; +- goto exit; +- } +- +- ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; +- parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len +- -prx_pkt_attrib->hdrlen +- -prx_pkt_attrib->iv_len +- -prx_pkt_attrib->icv_len +- -LLC_HEADER_SIZE +- -ETH_TYPE_LEN +- -PAYLOAD_TYPE_LEN +- -FIXED_IE; +- +- _rtw_memcpy(&stat_code, ptr+2, 2); +- +- if(stat_code!=0){ +- ret = _FAIL; +- goto exit; +- } +- +- //parsing information element +- for(j=FIXED_IE; jElementID) +- { +- case _LINK_ID_IE_: +- break; +- case _CH_SWITCH_TIMING_: +- _rtw_memcpy(&switch_time, pIE->data, 2); +- if(switch_time > ptdls_sta->ch_switch_time) +- _rtw_memcpy(&ptdls_sta->ch_switch_time, &switch_time, 2); +- +- _rtw_memcpy(&switch_timeout, pIE->data+2, 2); +- if(switch_timeout > ptdls_sta->ch_switch_timeout) +- _rtw_memcpy(&ptdls_sta->ch_switch_timeout, &switch_timeout, 2); +- +- default: +- break; +- } +- +- j += (pIE->Length + 2); +- +- } +- +- ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SW_INITIATOR_STATE); +- ptdls_sta->tdls_sta_state |=TDLS_CH_SWITCH_ON_STATE; +- +- //goto set_channel_workitem_callback() +- ptdls_sta->option=TDLS_OFF_CH; +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_OFF_CH); +- +-exit: +- return ret; +-} +- +-#ifdef CONFIG_WFD +-void wfd_ie_tdls(_adapter * padapter, u8 *pframe, u32 *pktlen ) +-{ +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct wifi_display_info *pwfd_info = padapter->tdlsinfo.wfd_info; +- u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; +- u32 wfdielen = 0; +- +- // WFD OUI +- wfdielen = 0; +- wfdie[ wfdielen++ ] = 0x50; +- wfdie[ wfdielen++ ] = 0x6F; +- wfdie[ wfdielen++ ] = 0x9A; +- wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 +- +- // Commented by Albert 20110825 +- // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes +- // 1. WFD Device Information +- // 2. Associated BSSID ( Optional ) +- // 3. Local IP Adress ( Optional ) +- +- // WFD Device Information ATTR +- // Type: +- wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; +- +- // Length: +- // Note: In the WFD specification, the size of length field is 2. +- RTW_PUT_BE16(wfdie + wfdielen, 0x0006); +- wfdielen += 2; +- +- // Value1: +- // WFD device information +- // available for WFD session + Preferred TDLS + WSD ( WFD Service Discovery ) +- RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL +- | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_WSD); +- wfdielen += 2; +- +- // Value2: +- // Session Management Control Port +- // Default TCP port for RTSP messages is 554 +- RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); +- wfdielen += 2; +- +- // Value3: +- // WFD Device Maximum Throughput +- // 300Mbps is the maximum throughput +- RTW_PUT_BE16(wfdie + wfdielen, 300); +- wfdielen += 2; +- +- // Associated BSSID ATTR +- // Type: +- wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; +- +- // Length: +- // Note: In the WFD specification, the size of length field is 2. +- RTW_PUT_BE16(wfdie + wfdielen, 0x0006); +- wfdielen += 2; +- +- // Value: +- // Associated BSSID +- if ( check_fwstate( pmlmepriv, _FW_LINKED) == _TRUE ) +- { +- _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); +- } +- else +- { +- _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); +- } +- +- // Local IP Address ATTR +- wfdie[ wfdielen++ ] = WFD_ATTR_LOCAL_IP_ADDR; +- +- // Length: +- // Note: In the WFD specification, the size of length field is 2. +- RTW_PUT_BE16(wfdie + wfdielen, 0x0005); +- wfdielen += 2; +- +- // Version: +- // 0x01: Version1;IPv4 +- wfdie[ wfdielen++ ] = 0x01; +- +- // IPv4 Address +- _rtw_memcpy( wfdie + wfdielen, pwfd_info->ip_address, 4 ); +- wfdielen += 4; +- +- pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, pktlen); +- +-} +-#endif //CONFIG_WFD +- +-void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) +-{ +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- struct registry_priv *pregistrypriv = &padapter->registrypriv; +- struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); +- +- u8 payload_type = 0x02; +- u8 category = RTW_WLAN_CATEGORY_TDLS; +- u8 action = TDLS_SETUP_REQUEST; +- u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; //Use NDIS_802_11_LENGTH_RATES_EX in order to call func.rtw_set_supported_rate +- int bssrate_len = 0, i = 0 ; +- u8 more_supportedrates = 0; +- unsigned int ie_len; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- u8 link_id_addr[18] = {0}; +- u8 iedata=0; +- u8 sup_ch[ 30 * 2 ] = {0x00 }, sup_ch_idx = 0, idx_5g = 2; //For supported channel +- u8 timeout_itvl[5]; //set timeout interval to maximum value +- u32 time; +- u8 *pframe_head; +- +- //SNonce +- if(pattrib->encrypt){ +- for(i=0;i<8;i++){ +- time=rtw_get_current_time(); +- _rtw_memcpy(&ptdls_sta->SNonce[4*i], (u8 *)&time, 4); +- } +- } +- +- pframe_head = pframe; // For rtw_tdls_set_ht_cap() +- +- //payload type +- pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); +- //category, action, dialog token +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); +- +- //capability +- _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); +- +- if(pattrib->encrypt) +- *pframe =*pframe | cap_Privacy; +- pframe += 2; +- pattrib->pktlen += 2; +- +- //supported rates +- if(pmlmeext->cur_channel < 14 ) +- { +- rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); +- bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; +- } +- else +- { +- rtw_set_supported_rate(bssrate, WIRELESS_11A_5N); +- bssrate_len = IEEE80211_NUM_OFDM_RATESLEN; +- } +- +- //country(optional) +- +- if (bssrate_len > 8) +- { +- pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); +- more_supportedrates = 1; +- } +- else +- { +- pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); +- } +- +- //extended supported rates +- if(more_supportedrates==1){ +- pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); +- } +- +- //supported channels +- pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); +- +- // SRC IE +- pframe = rtw_set_ie( pframe, _SRC_IE_, sizeof(TDLS_SRC), TDLS_SRC, &(pattrib->pktlen)); +- +- //RSNIE +- if(pattrib->encrypt) +- pframe = rtw_set_ie(pframe, _RSN_IE_2_, sizeof(TDLS_RSNIE), TDLS_RSNIE, &(pattrib->pktlen)); +- +- //extended capabilities +- pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , sizeof(TDLS_EXT_CAPIE), TDLS_EXT_CAPIE, &(pattrib->pktlen)); +- +- //QoS capability(WMM_IE) +- pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, sizeof(TDLS_WMMIE), TDLS_WMMIE, &(pattrib->pktlen)); +- +- +- if(pattrib->encrypt){ +- //FTIE +- _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 +- _rtw_memset(pframe, _FTIE_, 1); //version +- _rtw_memset((pframe+1), 82, 1); //length +- _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); +- pframe += 84; +- pattrib->pktlen += 84; +- +- //Timeout interval +- timeout_itvl[0]=0x02; +- _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); +- pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); +- } +- +- //Sup_reg_classes(optional) +- //HT capabilities +- pframe += rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); +- +- //20/40 BSS coexistence +- if(pmlmepriv->num_FortyMHzIntolerant>0) +- iedata |= BIT(2);//20 MHz BSS Width Request +- pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); +- +- //Link identifier +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->src, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); +- pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); +- +-#ifdef CONFIG_WFD +- wfd_ie_tdls( padapter, pframe, &(pattrib->pktlen) ); +-#endif //CONFIG_WFD +- +-} +- +-void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) +-{ +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- struct sta_info *ptdls_sta; +- struct registry_priv *pregistrypriv = &padapter->registrypriv; +- +- u8 payload_type = 0x02; +- unsigned char category = RTW_WLAN_CATEGORY_TDLS; +- unsigned char action = TDLS_SETUP_RESPONSE; +- unsigned char bssrate[NDIS_802_11_LENGTH_RATES_EX]; +- int bssrate_len = 0; +- u8 more_supportedrates = 0; +- unsigned int ie_len; +- unsigned char *p; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- u8 link_id_addr[18] = {0}; +- u8 iedata=0; +- u8 timeout_itvl[5]; //setup response timeout interval will copy from request +- u8 ANonce[32]; //maybe it can put in ontdls_req +- u8 k; //for random ANonce +- u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL; +- u32 time; +- u8 *pframe_head; +- +- ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); +- +- if(ptdls_sta == NULL ) +- { +- DBG_871X("[%s] %d\n", __FUNCTION__, __LINE__); +- return; +- } +- +- if(pattrib->encrypt){ +- for(k=0;k<8;k++){ +- time=rtw_get_current_time(); +- _rtw_memcpy(&ptdls_sta->ANonce[4*k], (u8*)&time, 4); +- } +- } +- +- pframe_head = pframe; +- +- //payload type +- pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); +- //category, action, status code +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); +- +- if(ptdls_sta->stat_code!=0) //invalid setup request +- { +- DBG_871X("ptdls_sta->stat_code:%04x \n", ptdls_sta->stat_code); +- return; +- } +- +- //dialog token +- pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); +- +- //capability +- _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); +- +- if(pattrib->encrypt ) +- *pframe =*pframe | cap_Privacy; +- pframe += 2; +- pattrib->pktlen += 2; +- +- //supported rates +- //supported rates +- if(pmlmeext->cur_channel < 14 ) +- { +- rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); +- bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; +- } +- else +- { +- rtw_set_supported_rate(bssrate, WIRELESS_11A_5N); +- bssrate_len = IEEE80211_NUM_OFDM_RATESLEN; +- } +- +- if (bssrate_len > 8) +- { +- pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); +- more_supportedrates = 1; +- } +- else +- { +- pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); +- } +- +- //country(optional) +- //extended supported rates +- if(more_supportedrates==1){ +- pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); +- } +- +- //supported channels +- pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); +- +- // SRC IE +- pframe = rtw_set_ie(pframe, _SRC_IE_ , sizeof(TDLS_SRC), TDLS_SRC, &(pattrib->pktlen)); +- +- //RSNIE +- if(pattrib->encrypt){ +- prsnie = pframe; +- pframe = rtw_set_ie(pframe, _RSN_IE_2_, sizeof(ptdls_sta->TDLS_RSNIE), ptdls_sta->TDLS_RSNIE, &(pattrib->pktlen)); +- } +- +- //extended capabilities +- pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , sizeof(TDLS_EXT_CAPIE), TDLS_EXT_CAPIE, &(pattrib->pktlen)); +- +- //QoS capability(WMM_IE) +- pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, sizeof(TDLS_WMMIE), TDLS_WMMIE, &(pattrib->pktlen)); +- +- if(pattrib->encrypt){ +- wpa_tdls_generate_tpk(padapter, ptdls_sta); +- +- //FTIE +- pftie = pframe; +- pftie_mic = pframe+4; +- _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 +- _rtw_memset(pframe, _FTIE_, 1); //version +- _rtw_memset((pframe+1), 82, 1); //length +- _rtw_memcpy((pframe+20), ptdls_sta->ANonce, 32); +- _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); +- pframe += 84; +- pattrib->pktlen += 84; +- +- //Timeout interval +- ptimeout_ie = pframe; +- timeout_itvl[0]=0x02; +- _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); +- pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); +- } +- +- //Sup_reg_classes(optional) +- //HT capabilities +- pframe += rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); +- +- //20/40 BSS coexistence +- if(pmlmepriv->num_FortyMHzIntolerant>0) +- iedata |= BIT(2);//20 MHz BSS Width Request +- pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); +- +- //Link identifier +- plinkid_ie = pframe; +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->src, 6); +- pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); +- +- //fill FTIE mic +- if(pattrib->encrypt) +- wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); +- +-#ifdef CONFIG_WFD +- wfd_ie_tdls( padapter, pframe, &(pattrib->pktlen) ); +-#endif //CONFIG_WFD +- +-} +- +-void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) +-{ +- +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); +- +- u8 payload_type = 0x02; +- unsigned char category = RTW_WLAN_CATEGORY_TDLS; +- unsigned char action = TDLS_SETUP_CONFIRM; +- u8 more_supportedrates = 0; +- unsigned int ie_len; +- unsigned char *p; +- u8 timeout_itvl[5]; //set timeout interval to maximum value +- u8 wmm_param_ele[24] = {0}; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- u8 link_id_addr[18] = {0}; +- u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL; +- +- //payload type +- pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); +- //category, action, status code, dialog token +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); +- +- if(ptdls_sta->stat_code!=0) //invalid setup request +- return; +- +- //RSNIE +- if(pattrib->encrypt){ +- prsnie = pframe; +- pframe = rtw_set_ie(pframe, _RSN_IE_2_, sizeof(TDLS_RSNIE), TDLS_RSNIE, &(pattrib->pktlen)); +- } +- +- //EDCA param set; WMM param ele. +- if(pattrib->encrypt){ +- //FTIE +- pftie = pframe; +- pftie_mic = pframe+4; +- _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 +- _rtw_memset(pframe, _FTIE_, 1); //version +- _rtw_memset((pframe+1), 82, 1); //length +- _rtw_memcpy((pframe+20), ptdls_sta->ANonce, 32); +- _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); +- pframe += 84; +- pattrib->pktlen += 84; +- +- //Timeout interval +- ptimeout_ie = pframe; +- timeout_itvl[0]=0x02; +- _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); +- ptdls_sta->TPK_count=0; +- _set_timer(&ptdls_sta->TPK_timer, ptdls_sta->TDLS_PeerKey_Lifetime/TPK_RESEND_COUNT); +- pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); +- } +- +- //HT operation; todo +- //Link identifier +- plinkid_ie = pframe; +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->src, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); +- pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); +- +- //FTIE mic +- if(pattrib->encrypt) +- wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); +- +- //WMM Parameter Set +- if(&pmlmeinfo->WMM_param) +- { +- _rtw_memcpy(wmm_param_ele, WMM_PARA_OUI, 6); +- _rtw_memcpy(wmm_param_ele+6, (u8 *)&pmlmeinfo->WMM_param, sizeof(pmlmeinfo->WMM_param)); +- pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 24, wmm_param_ele, &(pattrib->pktlen)); +- } +- +-} +- +-void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) +-{ +- +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- u8 payload_type = 0x02; +- unsigned char category = RTW_WLAN_CATEGORY_TDLS; +- u8 action = ptxmgmt->action_code; +- u8 link_id_addr[18] = {0}; +- struct sta_info *ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); +- +- //payload type +- pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); +- //category, action, reason code +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptxmgmt->status_code, &(pattrib->pktlen)); +- +- //Link identifier +- if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->src, 6); +- }else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->src, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); +- } +- pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); +- +-} +- +-void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) +-{ +- +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- u8 payload_type = 0x02; +- u8 category = RTW_WLAN_CATEGORY_TDLS; +- u8 action = TDLS_DISCOVERY_REQUEST; +- u8 link_id_addr[18] = {0}; +- static u8 dialogtoken=0; +- +- //payload type +- pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); +- //category, action, reason code +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); +- if(ptxmgmt->external_support == _TRUE) { +- pframe = rtw_set_fixed_ie(pframe, 1, &(ptxmgmt->dialog_token), &(pattrib->pktlen)); +- } else { +- pframe = rtw_set_fixed_ie(pframe, 1, &(dialogtoken), &(pattrib->pktlen)); +- dialogtoken = (dialogtoken+1)%256; +- } +- +- //Link identifier +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->src, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); +- pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); +- +-} +- +-void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, u8 dialog, u8 privacy) +-{ +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- struct registry_priv *pregistrypriv = &padapter->registrypriv; +- +- u8 category = RTW_WLAN_CATEGORY_PUBLIC; +- u8 action = TDLS_DISCOVERY_RESPONSE; +- u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; +- int bssrate_len = 0; +- u8 more_supportedrates = 0; +- u8 *p; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- u8 link_id_addr[18] = {0}; +- u8 iedata=0; +- u8 timeout_itvl[5]; //set timeout interval to maximum value +- u32 timeout_interval= TPK_RESEND_COUNT * 1000; +- u8 *pframe_head, pktlen_index; +- +- pktlen_index = pattrib->pktlen; // For mgmt frame, pattrib->pktlen would count frame header +- pframe_head = pframe; +- +- //category, action, dialog token +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(dialog), &(pattrib->pktlen)); +- +- //capability +- _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); +- +- if(privacy) +- *pframe =*pframe | cap_Privacy; +- pframe += 2; +- pattrib->pktlen += 2; +- +- //supported rates +- rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); +- bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; +- +- if (bssrate_len > 8) +- { +- pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); +- more_supportedrates = 1; +- } +- else +- { +- pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); +- } +- +- //extended supported rates +- if(more_supportedrates==1){ +- pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); +- } +- +- //supported channels +- pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); +- +- //RSNIE +- if(privacy) +- pframe = rtw_set_ie(pframe, _RSN_IE_2_, sizeof(TDLS_RSNIE), TDLS_RSNIE, &(pattrib->pktlen)); +- +- //extended capability +- pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , sizeof(TDLS_EXT_CAPIE), TDLS_EXT_CAPIE, &(pattrib->pktlen)); +- +- if(privacy){ +- //FTIE +- _rtw_memset(pframe, 0, 84); //All fields shall be set to 0 +- _rtw_memset(pframe, _FTIE_, 1); //version +- _rtw_memset((pframe+1), 82, 1); //length +- pframe += 84; +- pattrib->pktlen += 84; +- +- //Timeout interval +- timeout_itvl[0]=0x02; +- _rtw_memcpy(timeout_itvl+1, &timeout_interval, 4); +- pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); +- } +- +- //Sup_reg_classes(optional) +- //HT capabilities +- pframe += rtw_tdls_set_ht_cap(padapter, pframe_head - pktlen_index, pattrib); +- +- //20/40 BSS coexistence +- if(pmlmepriv->num_FortyMHzIntolerant>0) +- iedata |= BIT(2);//20 MHz BSS Width Request +- pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); +- +- //Link identifier +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->src, 6); +- pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); +- +-} +- +-void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) +-{ +- +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- u8 payload_type = 0x02; +- unsigned char category = RTW_WLAN_CATEGORY_TDLS; +- unsigned char action = TDLS_PEER_TRAFFIC_INDICATION; +- +- u8 link_id_addr[18] = {0}; +- u8 AC_queue=0; +- struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); +- +- //payload type +- pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); +- //category, action, reason code +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); +- +- //Link identifier +- if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->src, 6); +- }else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->src, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); +- } +- pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); +- +- //PTI control +- //PU buffer status +- if(ptdls_sta->uapsd_bk&BIT(1)) +- AC_queue=BIT(0); +- if(ptdls_sta->uapsd_be&BIT(1)) +- AC_queue=BIT(1); +- if(ptdls_sta->uapsd_vi&BIT(1)) +- AC_queue=BIT(2); +- if(ptdls_sta->uapsd_vo&BIT(1)) +- AC_queue=BIT(3); +- pframe = rtw_set_ie(pframe, _PTI_BUFFER_STATUS_, 1, &AC_queue, &(pattrib->pktlen)); +- +-} +- +-void rtw_build_tdls_peer_traffic_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) +-{ +- +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- u8 payload_type = 0x02; +- u8 category = RTW_WLAN_CATEGORY_TDLS; +- u8 action = TDLS_PEER_TRAFFIC_RESPONSE; +- u8 link_id_addr[18] = {0}; +- struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); +- static u8 dialogtoken=0; +- +- //payload type +- pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); +- //category, action, reason code +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &ptdls_sta->dialog, &(pattrib->pktlen)); +- +- //Link identifier +- if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->src, 6); +- }else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->src, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); +- } +- pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); +- +-} +- +-void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) +-{ +- +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- u8 payload_type = 0x02; +- unsigned char category = RTW_WLAN_CATEGORY_TDLS; +- unsigned char action = TDLS_CHANNEL_SWITCH_REQUEST; +- u8 link_id_addr[18] = {0}; +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); +- u8 ch_switch_timing[4] = {0}; +- u16 switch_time= CH_SWITCH_TIME, switch_timeout=CH_SWITCH_TIMEOUT; +- +- //payload type +- pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); +- //category, action, target_ch +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(ptdlsinfo->candidate_ch), &(pattrib->pktlen)); +- +- //Link identifier +- if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->src, 6); +- }else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->src, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); +- } +- pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); +- +- //ch switch timing +- _rtw_memcpy(ch_switch_timing, &switch_time, 2); +- _rtw_memcpy(ch_switch_timing+2, &switch_timeout, 2); +- pframe = rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); +- +- //update ch switch attrib to sta_info +- ptdls_sta->off_ch=ptdlsinfo->candidate_ch; +- ptdls_sta->ch_switch_time=switch_time; +- ptdls_sta->ch_switch_timeout=switch_timeout; +- +-} +- +-void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) +-{ +- +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- u8 payload_type = 0x02; +- unsigned char category = RTW_WLAN_CATEGORY_TDLS; +- unsigned char action = TDLS_CHANNEL_SWITCH_RESPONSE; +- u8 link_id_addr[18] = {0}; +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; +- u8 ch_switch_timing[4] = {0}; +- +- //payload type +- pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); +- //category, action, status_code +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); +- +- //Link identifier +- if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->src, 6); +- }else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ +- _rtw_memcpy(link_id_addr, pattrib->ra, 6); +- _rtw_memcpy((link_id_addr+6), pattrib->src, 6); +- _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); +- } +- pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); +- +- //ch switch timing +- _rtw_memcpy(ch_switch_timing, &ptdls_sta->ch_switch_time, 2); +- _rtw_memcpy(ch_switch_timing+2, &ptdls_sta->ch_switch_timeout, 2); +- pframe = rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); +- +-} +- +-#ifdef CONFIG_WFD +-void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) +-{ +- +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- struct wifidirect_info *pwdinfo = &padapter->wdinfo; +- struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; +- u8 payload_type = 0x02; +- u8 category = RTW_WLAN_CATEGORY_P2P; +- u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; +- u8 probe_req = 4; +- u8 wfdielen = 0; +- +- //payload type +- pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); +- //category, OUI, frame_body_type +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(probe_req), &(pattrib->pktlen)); +- +- if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) +- { +- wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe); +- pframe += wfdielen; +- pattrib->pktlen += wfdielen; +- } +- else if(!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) +- { +- wfdielen = build_probe_req_wfd_ie(pbuddy_wdinfo, pframe); +- pframe += wfdielen; +- pattrib->pktlen += wfdielen; +- } +- +-} +- +-void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) +-{ +- +- struct pkt_attrib *pattrib = &pxmitframe->attrib; +- struct wifidirect_info *pwdinfo = &padapter->wdinfo; +- struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; +- u8 payload_type = 0x02; +- u8 category = RTW_WLAN_CATEGORY_P2P; +- u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; +- u8 probe_rsp = 5; +- u8 wfdielen = 0; +- +- //payload type +- pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); +- //category, OUI, frame_body_type +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(probe_rsp), &(pattrib->pktlen)); +- +- if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) +- { +- wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe, 1); +- pframe += wfdielen; +- pattrib->pktlen += wfdielen; +- } +- else if(!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) +- { +- wfdielen = build_probe_resp_wfd_ie(pbuddy_wdinfo, pframe, 1); +- pframe += wfdielen; +- pattrib->pktlen += wfdielen; +- } +- +-} +-#endif //CONFIG_WFD +- +-void _tdls_tpk_timer_hdl(void *FunctionContext) +-{ +- struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; +- struct tdls_txmgmt txmgmt; +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- ptdls_sta->TPK_count++; +- //TPK_timer set 1000 as default +- //retry timer should set at least 301 sec. +- if(ptdls_sta->TPK_count==TPK_RESEND_COUNT){ +- ptdls_sta->TPK_count=0; +- _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); +- issue_tdls_setup_req(ptdls_sta->padapter, &txmgmt, _FALSE); +- } +- +- _set_timer(&ptdls_sta->TPK_timer, ptdls_sta->TDLS_PeerKey_Lifetime/TPK_RESEND_COUNT); +-} +- +-// TDLS_DONE_CH_SEN: channel sensing and report candidate channel +-// TDLS_OFF_CH: first time set channel to off channel +-// TDLS_BASE_CH: when go back to the channel linked with AP, send null data to peer STA as an indication +-void _tdls_ch_switch_timer_hdl(void *FunctionContext) +-{ +- +- struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; +- _adapter *padapter = ptdls_sta->padapter; +- +- if( ptdls_sta->option == TDLS_DONE_CH_SEN ){ +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_DONE_CH_SEN); +- }else if( ptdls_sta->option == TDLS_OFF_CH ){ +- issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta->hwaddr, 0, 0, 0); +- _set_timer(&ptdls_sta->base_ch_timer, 500); +- }else if( ptdls_sta->option == TDLS_BASE_CH){ +- issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta->hwaddr, 0, 0, 0); +- } +-} +- +-void _tdls_base_ch_timer_hdl(void *FunctionContext) +-{ +- struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; +- rtw_tdls_cmd(ptdls_sta->padapter, ptdls_sta->hwaddr, TDLS_P_OFF_CH); +-} +- +-void _tdls_off_ch_timer_hdl(void *FunctionContext) +-{ +- struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; +- rtw_tdls_cmd(ptdls_sta->padapter, ptdls_sta->hwaddr, TDLS_P_BASE_CH ); +-} +- +-void _tdls_handshake_timer_hdl(void *FunctionContext) +-{ +- struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; +- +- if(ptdls_sta != NULL) +- { +- if( !(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) ) +- { +- DBG_871X("tdls handshake time out\n"); +- rtw_tdls_cmd(ptdls_sta->padapter, ptdls_sta->hwaddr, TDLS_TEAR_STA ); +- } +- } +-} +- +-void _tdls_pti_timer_hdl(void *FunctionContext) +-{ +- struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; +- _adapter *padapter = ptdls_sta->padapter; +- struct tdls_txmgmt txmgmt; +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); +- txmgmt.status_code = _RSON_TDLS_TEAR_TOOFAR_; +- +- if(ptdls_sta != NULL) +- { +- if( ptdls_sta->tdls_sta_state & TDLS_WAIT_PTR_STATE ) +- { +- DBG_871X("Doesn't receive PTR from peer dev:"MAC_FMT"; Send TDLS Tear Down\n", MAC_ARG(ptdls_sta->hwaddr)); +- issue_tdls_teardown(padapter, &txmgmt, _FALSE); +- } +- } +-} +- +-void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta) +-{ +- psta->padapter=padapter; +- _init_timer(&psta->TPK_timer, padapter->pnetdev, _tdls_tpk_timer_hdl, psta); +- _init_timer(&psta->option_timer, padapter->pnetdev, _tdls_ch_switch_timer_hdl, psta); +- _init_timer(&psta->base_ch_timer, padapter->pnetdev, _tdls_base_ch_timer_hdl, psta); +- _init_timer(&psta->off_ch_timer, padapter->pnetdev, _tdls_off_ch_timer_hdl, psta); +- _init_timer(&psta->handshake_timer, padapter->pnetdev, _tdls_handshake_timer_hdl, psta); +- _init_timer(&psta->pti_timer, padapter->pnetdev, _tdls_pti_timer_hdl, psta); +-} +- +-void rtw_free_tdls_timer(struct sta_info *psta) +-{ +- _cancel_timer_ex(&psta->TPK_timer); +- _cancel_timer_ex(&psta->option_timer); +- _cancel_timer_ex(&psta->base_ch_timer); +- _cancel_timer_ex(&psta->off_ch_timer); +- _cancel_timer_ex(&psta->handshake_timer); +- _cancel_timer_ex(&psta->pti_timer); +-} +- +-u8 update_sgi_tdls(_adapter *padapter, struct sta_info *psta) +-{ +- return query_ra_short_GI(psta); +-} +- +-u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta) +-{ +- unsigned char sta_band = 0; +- unsigned int tx_ra_bitmap=0; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; +- +- rtw_hal_update_sta_rate_mask(padapter, psta); +- tx_ra_bitmap = psta->ra_mask; +- +- if ( pcur_network->Configuration.DSConfig > 14 ) { +- // 5G band +- if (tx_ra_bitmap & 0xffff000) +- sta_band |= WIRELESS_11_5N | WIRELESS_11A; +- else +- sta_band |= WIRELESS_11A; +- } else { +- if (tx_ra_bitmap & 0xffff000) +- sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B; +- else if (tx_ra_bitmap & 0xff0) +- sta_band |= WIRELESS_11G |WIRELESS_11B; +- else +- sta_band |= WIRELESS_11B; +- } +- +- psta->wireless_mode = sta_band; +- +- psta->raid = rtw_hal_networktype_to_raid(padapter,psta); +- tx_ra_bitmap |= ((psta->raid<<28)&0xf0000000); +- return tx_ra_bitmap; +-} +- +-#endif //CONFIG_TDLS +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_TDLS_C_ ++ ++#include ++ ++#ifdef CONFIG_TDLS ++#define ONE_SEC 1000 /* 1000 ms */ ++ ++extern unsigned char MCS_rate_2R[16]; ++extern unsigned char MCS_rate_1R[16]; ++extern void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame); ++ ++void rtw_reset_tdls_info(_adapter* padapter) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ ptdlsinfo->ap_prohibited = _FALSE; ++ ++ /* For TDLS channel switch, currently we only allow it to work in wifi logo test mode */ ++ if (padapter->registrypriv.wifi_spec == 1) ++ { ++ ptdlsinfo->ch_switch_prohibited = _FALSE; ++ } ++ else ++ { ++ ptdlsinfo->ch_switch_prohibited = _TRUE; ++ } ++ ++ ptdlsinfo->link_established = _FALSE; ++ ptdlsinfo->sta_cnt = 0; ++ ptdlsinfo->sta_maximum = _FALSE; ++ ++#ifdef CONFIG_TDLS_CH_SW ++ ptdlsinfo->chsw_info.ch_sw_state = TDLS_STATE_NONE; ++ ATOMIC_SET(&ptdlsinfo->chsw_info.chsw_on, _FALSE); ++ ptdlsinfo->chsw_info.off_ch_num = 0; ++ ptdlsinfo->chsw_info.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ptdlsinfo->chsw_info.cur_time = 0; ++ ptdlsinfo->chsw_info.delay_switch_back = _FALSE; ++ ptdlsinfo->chsw_info.dump_stack = _FALSE; ++#endif ++ ++ ptdlsinfo->ch_sensing = 0; ++ ptdlsinfo->watchdog_count = 0; ++ ptdlsinfo->dev_discovered = _FALSE; ++ ++#ifdef CONFIG_WFD ++ ptdlsinfo->wfd_info = &padapter->wfd_info; ++#endif ++} ++ ++int rtw_init_tdls_info(_adapter* padapter) ++{ ++ int res = _SUCCESS; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ rtw_reset_tdls_info(padapter); ++ ++ ptdlsinfo->tdls_enable = _TRUE; ++#ifdef CONFIG_TDLS_DRIVER_SETUP ++ ptdlsinfo->driver_setup = _TRUE; ++#else ++ ptdlsinfo->driver_setup = _FALSE; ++#endif /* CONFIG_TDLS_DRIVER_SETUP */ ++ ++ _rtw_spinlock_init(&ptdlsinfo->cmd_lock); ++ _rtw_spinlock_init(&ptdlsinfo->hdl_lock); ++ ++ return res; ++ ++} ++ ++void rtw_free_tdls_info(struct tdls_info *ptdlsinfo) ++{ ++ _rtw_spinlock_free(&ptdlsinfo->cmd_lock); ++ _rtw_spinlock_free(&ptdlsinfo->hdl_lock); ++ ++ _rtw_memset(ptdlsinfo, 0, sizeof(struct tdls_info) ); ++ ++} ++ ++int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len) ++{ ++ u8 tdls_prohibited_bit = 0x40; /* bit(38); TDLS_prohibited */ ++ ++ if (pkt_len < 5) { ++ return _FALSE; ++ } ++ ++ pframe += 4; ++ if ((*pframe) & tdls_prohibited_bit) ++ return _TRUE; ++ ++ return _FALSE; ++} ++ ++int check_ap_tdls_ch_switching_prohibited(u8 *pframe, u8 pkt_len) ++{ ++ u8 tdls_ch_swithcing_prohibited_bit = 0x80; /* bit(39); TDLS_channel_switching prohibited */ ++ ++ if (pkt_len < 5) { ++ return _FALSE; ++ } ++ ++ pframe += 4; ++ if ((*pframe) & tdls_ch_swithcing_prohibited_bit) ++ return _TRUE; ++ ++ return _FALSE; ++} ++ ++u8 rtw_tdls_is_setup_allowed(_adapter *padapter) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ if (ptdlsinfo->ap_prohibited == _TRUE) ++ return _FALSE; ++ ++ return _TRUE; ++} ++ ++#ifdef CONFIG_TDLS_CH_SW ++u8 rtw_tdls_is_chsw_allowed(_adapter *padapter) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ if (ptdlsinfo->ch_switch_prohibited == _TRUE) ++ return _FALSE; ++ ++ if (padapter->registrypriv.wifi_spec == 0) ++ return _FALSE; ++ ++ return _TRUE; ++} ++#endif ++ ++int _issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int wait_ack) ++{ ++ int ret = _FAIL; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl, *qc; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ pattrib->hdrlen +=2; ++ pattrib->qos_en = _TRUE; ++ pattrib->eosp = 1; ++ pattrib->ack_policy = 0; ++ pattrib->mdata = 0; ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ if (power_mode) ++ SetPwrMgt(fctrl); ++ ++ qc = (unsigned short *)(pframe + pattrib->hdrlen - 2); ++ ++ SetPriority(qc, 7); /* Set priority to VO */ ++ ++ SetEOSP(qc, pattrib->eosp); ++ ++ SetAckpolicy(qc, pattrib->ack_policy); ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr_qos); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ if (wait_ack) ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++exit: ++ return ret; ++ ++} ++ ++/* ++ *wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT ++ *wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX ++ *try_cnt means the maximal TX count to try ++ */ ++int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms) ++{ ++ int ret; ++ int i = 0; ++ u32 start = rtw_get_current_time(); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ #if 0 ++ psta = rtw_get_stainfo(&padapter->stapriv, da); ++ if (psta) { ++ if (power_mode) ++ rtw_hal_macid_sleep(padapter, psta->mac_id); ++ else ++ rtw_hal_macid_wakeup(padapter, psta->mac_id); ++ } else { ++ DBG_871X(FUNC_ADPT_FMT ": Can't find sta info for " MAC_FMT ", skip macid %s!!\n", ++ FUNC_ADPT_ARG(padapter), MAC_ARG(da), power_mode?"sleep":"wakeup"); ++ rtw_warn_on(1); ++ } ++ #endif ++ ++ do { ++ ret = _issue_nulldata_to_TDLS_peer_STA(padapter, da, power_mode, wait_ms>0 ? _TRUE : _FALSE); ++ ++ i++; ++ ++ if (RTW_CANNOT_RUN(padapter)) ++ break; ++ ++ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) ++ rtw_msleep_os(wait_ms); ++ ++ } while ((i < try_cnt) && (ret==_FAIL || wait_ms==0)); ++ ++ if (ret != _FAIL) { ++ ret = _SUCCESS; ++ #ifndef DBG_XMIT_ACK ++ goto exit; ++ #endif ++ } ++ ++ if (try_cnt && wait_ms) { ++ if (da) ++ DBG_871X(FUNC_ADPT_FMT" to "MAC_FMT", ch:%u%s, %d/%d in %u ms\n", ++ FUNC_ADPT_ARG(padapter), MAC_ARG(da), rtw_get_oper_ch(padapter), ++ ret==_SUCCESS?", acked":"", i, try_cnt, rtw_get_passing_time_ms(start)); ++ else ++ DBG_871X(FUNC_ADPT_FMT", ch:%u%s, %d/%d in %u ms\n", ++ FUNC_ADPT_ARG(padapter), rtw_get_oper_ch(padapter), ++ ret==_SUCCESS?", acked":"", i, try_cnt, rtw_get_passing_time_ms(start)); ++ } ++exit: ++ return ret; ++} ++ ++void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ _irqL irqL; ++ ++ /* free peer sta_info */ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ if (ptdlsinfo->sta_cnt != 0) ++ ptdlsinfo->sta_cnt--; ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ /* -2: AP + BC/MC sta, -4: default key */ ++ if (ptdlsinfo->sta_cnt < MAX_ALLOWED_TDLS_STA_NUM) { ++ ptdlsinfo->sta_maximum = _FALSE; ++ _rtw_memset( &ptdlsinfo->ss_record, 0x00, sizeof(struct tdls_ss_record) ); ++ } ++ ++ /* clear cam */ ++ rtw_clearstakey_cmd(padapter, ptdls_sta, _TRUE); ++ ++ if (ptdlsinfo->sta_cnt == 0) { ++ rtw_tdls_cmd(padapter, NULL, TDLS_RS_RCR); ++ ptdlsinfo->link_established = _FALSE; ++ } ++ else ++ DBG_871X("Remain tdls sta:%02x\n", ptdlsinfo->sta_cnt); ++ ++ rtw_free_stainfo(padapter, ptdls_sta); ++ ++} ++ ++ ++/* TDLS encryption(if needed) will always be CCMP */ ++void rtw_tdls_set_key(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ ptdls_sta->dot118021XPrivacy=_AES_; ++ rtw_setstakey_cmd(padapter, ptdls_sta, TDLS_KEY, _TRUE); ++} ++ ++#ifdef CONFIG_80211N_HT ++void rtw_tdls_process_ht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ u8 max_AMPDU_len, min_MPDU_spacing; ++ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0; ++ ++ /* Save HT capabilities in the sta object */ ++ _rtw_memset(&ptdls_sta->htpriv.ht_cap, 0, sizeof(struct rtw_ieee80211_ht_cap)); ++ if (data && Length >= sizeof(struct rtw_ieee80211_ht_cap)) { ++ ptdls_sta->flags |= WLAN_STA_HT; ++ ptdls_sta->flags |= WLAN_STA_WME; ++ ++ _rtw_memcpy(&ptdls_sta->htpriv.ht_cap, data, sizeof(struct rtw_ieee80211_ht_cap)); ++ } else ++ ptdls_sta->flags &= ~WLAN_STA_HT; ++ ++ if (ptdls_sta->flags & WLAN_STA_HT) { ++ if (padapter->registrypriv.ht_enable == _TRUE) { ++ ptdls_sta->htpriv.ht_option = _TRUE; ++ ptdls_sta->qos_option = _TRUE; ++ } else { ++ ptdls_sta->htpriv.ht_option = _FALSE; ++ ptdls_sta->qos_option = _FALSE; ++ } ++ } ++ ++ /* HT related cap */ ++ if (ptdls_sta->htpriv.ht_option) { ++ /* Check if sta supports rx ampdu */ ++ if (padapter->registrypriv.ampdu_enable == 1) ++ ptdls_sta->htpriv.ampdu_enable = _TRUE; ++ ++ /* AMPDU Parameters field */ ++ /* Get MIN of MAX AMPDU Length Exp */ ++ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (data[2] & 0x3)) ++ max_AMPDU_len = (data[2] & 0x3); ++ else ++ max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3); ++ /* Get MAX of MIN MPDU Start Spacing */ ++ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (data[2] & 0x1c)) ++ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c); ++ else ++ min_MPDU_spacing = (data[2] & 0x1c); ++ ptdls_sta->htpriv.rx_ampdu_min_spacing = max_AMPDU_len | min_MPDU_spacing; ++ ++ /* Check if sta support s Short GI 20M */ ++ if (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) ++ ptdls_sta->htpriv.sgi_20m = _TRUE; ++ ++ /* Check if sta support s Short GI 40M */ ++ if (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) ++ ptdls_sta->htpriv.sgi_40m = _TRUE; ++ ++ /* Bwmode would still followed AP's setting */ ++ if (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) { ++ if (padapter->mlmeextpriv.cur_bwmode >= CHANNEL_WIDTH_40) ++ ptdls_sta->bw_mode = CHANNEL_WIDTH_40; ++ ptdls_sta->htpriv.ch_offset = padapter->mlmeextpriv.cur_ch_offset; ++ } ++ ++ /* Config LDPC Coding Capability */ ++ if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX) && GET_HT_CAP_ELE_LDPC_CAP(data)) { ++ SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); ++ DBG_871X("Enable HT Tx LDPC!\n"); ++ } ++ ptdls_sta->htpriv.ldpc_cap = cur_ldpc_cap; ++ ++ /* Config STBC setting */ ++ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAP_ELE_RX_STBC(data)) { ++ SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX)); ++ DBG_871X("Enable HT Tx STBC!\n"); ++ } ++ ptdls_sta->htpriv.stbc_cap = cur_stbc_cap; ++ ++#ifdef CONFIG_BEAMFORMING ++ /* Config Tx beamforming setting */ ++ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && ++ GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(data)) { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); ++ } ++ ++ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && ++ GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(data)) { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); ++ } ++ ptdls_sta->htpriv.beamform_cap = cur_beamform_cap; ++ if (cur_beamform_cap) ++ DBG_871X("Client HT Beamforming Cap = 0x%02X\n", cur_beamform_cap); ++#endif /* CONFIG_BEAMFORMING */ ++ } ++ ++} ++ ++u8 *rtw_tdls_set_ht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ rtw_ht_use_default_setting(padapter); ++ ++ rtw_restructure_ht_ie(padapter, NULL, pframe, 0, &(pattrib->pktlen), padapter->mlmeextpriv.cur_channel); ++ ++ return pframe + pattrib->pktlen; ++} ++#endif ++ ++#ifdef CONFIG_80211AC_VHT ++void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0, rf_type = RF_1T1R; ++ u8 *pcap_mcs; ++ u8 vht_mcs[2]; ++ ++ _rtw_memset(&ptdls_sta->vhtpriv, 0, sizeof(struct vht_priv)); ++ if (data && Length == 12) { ++ ptdls_sta->flags |= WLAN_STA_VHT; ++ ++ _rtw_memcpy(ptdls_sta->vhtpriv.vht_cap, data, 12); ++ ++#if 0 ++ if (elems.vht_op_mode_notify && elems.vht_op_mode_notify_len == 1) { ++ _rtw_memcpy(&pstat->vhtpriv.vht_op_mode_notify, elems.vht_op_mode_notify, 1); ++ } else /* for Frame without Operating Mode notify ie; default: 80M */ { ++ pstat->vhtpriv.vht_op_mode_notify = CHANNEL_WIDTH_80; ++ } ++#else ++ ptdls_sta->vhtpriv.vht_op_mode_notify = CHANNEL_WIDTH_80; ++#endif ++ } else ++ ptdls_sta->flags &= ~WLAN_STA_VHT; ++ ++ if (ptdls_sta->flags & WLAN_STA_VHT) { ++ if (REGSTY_IS_11AC_ENABLE(&padapter->registrypriv) ++ && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) ++ && (!pmlmepriv->country_ent || COUNTRY_CHPLAN_EN_11AC(pmlmepriv->country_ent))) ++ ptdls_sta->vhtpriv.vht_option = _TRUE; ++ else ++ ptdls_sta->vhtpriv.vht_option = _FALSE; ++ } ++ ++ /* B4 Rx LDPC */ ++ if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX) && ++ GET_VHT_CAPABILITY_ELE_RX_LDPC(data)) { ++ SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX)); ++ DBG_871X("Current VHT LDPC Setting = %02X\n", cur_ldpc_cap); ++ } ++ ptdls_sta->vhtpriv.ldpc_cap = cur_ldpc_cap; ++ ++ /* B5 Short GI for 80 MHz */ ++ ptdls_sta->vhtpriv.sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(data) & pvhtpriv->sgi_80m) ? _TRUE : _FALSE; ++ ++ /* B8 B9 B10 Rx STBC */ ++ if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX) && ++ GET_VHT_CAPABILITY_ELE_RX_STBC(data)) { ++ SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX)); ++ DBG_871X("Current VHT STBC Setting = %02X\n", cur_stbc_cap); ++ } ++ ptdls_sta->vhtpriv.stbc_cap = cur_stbc_cap; ++ ++ /* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && ++ GET_VHT_CAPABILITY_ELE_SU_BFEE(data)) { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); ++ } ++ ++ /* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) && ++ GET_VHT_CAPABILITY_ELE_SU_BFER(data)) { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ++ } ++ ptdls_sta->vhtpriv.beamform_cap = cur_beamform_cap; ++ if (cur_beamform_cap) ++ DBG_871X("Current VHT Beamforming Setting = %02X\n", cur_beamform_cap); ++ ++ /* B23 B24 B25 Maximum A-MPDU Length Exponent */ ++ ptdls_sta->vhtpriv.ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(data); ++ ++ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(data); ++ _rtw_memcpy(vht_mcs, pcap_mcs, 2); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ if ((rf_type == RF_1T1R) || (rf_type == RF_1T2R)) ++ vht_mcs[0] |= 0xfc; ++ else if (rf_type == RF_2T2R) ++ vht_mcs[0] |= 0xf0; ++ else if (rf_type == RF_3T3R) ++ vht_mcs[0] |= 0xc0; ++ ++ _rtw_memcpy(ptdls_sta->vhtpriv.vht_mcs_map, vht_mcs, 2); ++ ++ ptdls_sta->vhtpriv.vht_highest_rate = rtw_get_vht_highest_rate(ptdls_sta->vhtpriv.vht_mcs_map); ++} ++ ++u8 *rtw_tdls_set_aid(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ return rtw_set_ie(pframe, EID_AID, 2, (u8 *)&(padapter->mlmepriv.cur_network.aid), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_vht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u32 ie_len = 0; ++ ++ rtw_vht_use_default_setting(padapter); ++ ++ ie_len = rtw_build_vht_cap_ie(padapter, pframe); ++ pattrib->pktlen += ie_len; ++ ++ return pframe + ie_len; ++} ++ ++u8 *rtw_tdls_set_vht_operation(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib, u8 channel) ++{ ++ u32 ie_len = 0; ++ ++ ie_len = rtw_build_vht_operation_ie(padapter, pframe, channel); ++ pattrib->pktlen += ie_len; ++ ++ return pframe + ie_len; ++} ++ ++u8 *rtw_tdls_set_vht_op_mode_notify(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib, u8 bw) ++{ ++ u32 ie_len = 0; ++ ++ ie_len = rtw_build_vht_op_mode_notify_ie(padapter, pframe, bw); ++ pattrib->pktlen += ie_len; ++ ++ return pframe + ie_len; ++} ++#endif ++ ++ ++u8 *rtw_tdls_set_sup_ch(struct mlme_ext_priv *pmlmeext, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u8 sup_ch[30 * 2] = {0x00}, ch_set_idx = 0, sup_ch_idx = 2; ++ ++ do { ++ if (pmlmeext->channel_set[ch_set_idx].ChannelNum <= 14) { ++ sup_ch[0] = 1; /* First channel number */ ++ sup_ch[1] = pmlmeext->channel_set[ch_set_idx].ChannelNum; /* Number of channel */ ++ } else { ++ sup_ch[sup_ch_idx++] = pmlmeext->channel_set[ch_set_idx].ChannelNum; ++ sup_ch[sup_ch_idx++] = 1; ++ } ++ ch_set_idx++; ++ } while (pmlmeext->channel_set[ch_set_idx].ChannelNum != 0 && ch_set_idx < MAX_CHANNEL_NUM); ++ ++ return rtw_set_ie(pframe, _SUPPORTED_CH_IE_, sup_ch_idx, sup_ch, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_rsnie(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, int init, struct sta_info *ptdls_sta) ++{ ++ u8 *p = NULL; ++ int len = 0; ++ ++ if (ptxmgmt->len > 0) ++ p = rtw_get_ie(ptxmgmt->buf, _RSN_IE_2_, &len, ptxmgmt->len); ++ ++ if (p != NULL) ++ return rtw_set_ie(pframe, _RSN_IE_2_, len, p+2, &(pattrib->pktlen)); ++ else ++ if (init == _TRUE) ++ return rtw_set_ie(pframe, _RSN_IE_2_, sizeof(TDLS_RSNIE), TDLS_RSNIE, &(pattrib->pktlen)); ++ else ++ return rtw_set_ie(pframe, _RSN_IE_2_, sizeof(ptdls_sta->TDLS_RSNIE), ptdls_sta->TDLS_RSNIE, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_ext_cap(u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ return rtw_set_ie(pframe, _EXT_CAP_IE_ , sizeof(TDLS_EXT_CAPIE), TDLS_EXT_CAPIE, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_qos_cap(u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ return rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, sizeof(TDLS_WMMIE), TDLS_WMMIE, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_ftie(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, u8 *ANonce, u8 *SNonce) ++{ ++ struct wpa_tdls_ftie FTIE = {0}; ++ u8 *p = NULL; ++ int len = 0; ++ ++ if (ptxmgmt->len > 0) ++ p = rtw_get_ie(ptxmgmt->buf, _FTIE_, &len, ptxmgmt->len); ++ ++ if (p != NULL) ++ return rtw_set_ie(pframe, _FTIE_, len, p+2, &(pattrib->pktlen)); ++ else { ++ if (ANonce != NULL) ++ _rtw_memcpy(FTIE.Anonce, ANonce, WPA_NONCE_LEN); ++ if (SNonce != NULL) ++ _rtw_memcpy(FTIE.Snonce, SNonce, WPA_NONCE_LEN); ++ return rtw_set_ie(pframe, _FTIE_ , 82, (u8 *)FTIE.mic_ctrl, &(pattrib->pktlen)); ++ } ++} ++ ++u8 *rtw_tdls_set_timeout_interval(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, int init, struct sta_info *ptdls_sta) ++{ ++ u8 timeout_itvl[5]; /* set timeout interval to maximum value */ ++ u32 timeout_interval = TDLS_TPK_RESEND_COUNT; ++ u8 *p = NULL; ++ int len = 0; ++ ++ if (ptxmgmt->len > 0) ++ p = rtw_get_ie(ptxmgmt->buf, _TIMEOUT_ITVL_IE_, &len, ptxmgmt->len); ++ ++ if (p != NULL) ++ return rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, len, p+2, &(pattrib->pktlen)); ++ else { ++ /* Timeout interval */ ++ timeout_itvl[0]=0x02; ++ if (init == _TRUE) ++ _rtw_memcpy(timeout_itvl+1, &timeout_interval, 4); ++ else ++ _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); ++ ++ return rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); ++ } ++} ++ ++u8 *rtw_tdls_set_bss_coexist(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u8 iedata=0; ++ ++ if (padapter->mlmepriv.num_FortyMHzIntolerant > 0) ++ iedata |= BIT(2); /* 20 MHz BSS Width Request */ ++ ++ /* Information Bit should be set by TDLS test plan 5.9 */ ++ iedata |= BIT(0); ++ return rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_payload_type(u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u8 payload_type = 0x02; ++ return rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_category(u8 *pframe, struct pkt_attrib *pattrib, u8 category) ++{ ++ return rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_action(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) ++{ ++ return rtw_set_fixed_ie(pframe, 1, &(ptxmgmt->action_code), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_status_code(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) ++{ ++ return rtw_set_fixed_ie(pframe, 2, (u8 *)&(ptxmgmt->status_code), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_dialog(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) ++{ ++ u8 dialogtoken = 1; ++ if (ptxmgmt->dialog_token) ++ return rtw_set_fixed_ie(pframe, 1, &(ptxmgmt->dialog_token), &(pattrib->pktlen)); ++ else ++ return rtw_set_fixed_ie(pframe, 1, &(dialogtoken), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_reg_class(u8 *pframe, struct pkt_attrib *pattrib, struct sta_info *ptdls_sta) ++{ ++ u8 reg_class = 22; ++ return rtw_set_fixed_ie(pframe, 1, &(reg_class), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_second_channel_offset(u8 *pframe, struct pkt_attrib *pattrib, u8 ch_offset) ++{ ++ return rtw_set_ie(pframe, EID_SecondaryChnlOffset , 1, &ch_offset, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_capability(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ u8 cap_from_ie[2] = {0}; ++ ++ _rtw_memcpy(cap_from_ie, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++ ++ return rtw_set_fixed_ie(pframe, 2, cap_from_ie, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_supported_rate(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; ++ int bssrate_len = 0; ++ u8 more_supportedrates = 0; ++ ++ rtw_set_supported_rate(bssrate, (padapter->registrypriv.wireless_mode == WIRELESS_MODE_MAX) ? padapter->mlmeextpriv.cur_wireless_mode : padapter->registrypriv.wireless_mode); ++ bssrate_len = rtw_get_rateset_len(bssrate); ++ ++ if (bssrate_len > 8) { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ more_supportedrates = 1; ++ } else { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++ /* extended supported rates */ ++ if (more_supportedrates == 1) { ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ ++ return pframe; ++} ++ ++u8 *rtw_tdls_set_sup_reg_class(u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ return rtw_set_ie(pframe, _SRC_IE_ , sizeof(TDLS_SRC), TDLS_SRC, &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_linkid(u8 *pframe, struct pkt_attrib *pattrib, u8 init) ++{ ++ u8 link_id_addr[18] = {0}; ++ if (init == _TRUE) { ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ } else { ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->src, 6); ++ } ++ return rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++} ++ ++#ifdef CONFIG_TDLS_CH_SW ++u8 *rtw_tdls_set_target_ch(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u8 target_ch = 1; ++ if (padapter->tdlsinfo.chsw_info.off_ch_num) ++ return rtw_set_fixed_ie(pframe, 1, &(padapter->tdlsinfo.chsw_info.off_ch_num), &(pattrib->pktlen)); ++ else ++ return rtw_set_fixed_ie(pframe, 1, &(target_ch), &(pattrib->pktlen)); ++} ++ ++u8 *rtw_tdls_set_ch_sw(u8 *pframe, struct pkt_attrib *pattrib, struct sta_info *ptdls_sta) ++{ ++ u8 ch_switch_timing[4] = {0}; ++ u16 switch_time = (ptdls_sta->ch_switch_time >= TDLS_CH_SWITCH_TIME * 1000) ? ++ ptdls_sta->ch_switch_time : TDLS_CH_SWITCH_TIME; ++ u16 switch_timeout = (ptdls_sta->ch_switch_timeout >= TDLS_CH_SWITCH_TIMEOUT * 1000) ? ++ ptdls_sta->ch_switch_timeout : TDLS_CH_SWITCH_TIMEOUT; ++ ++ _rtw_memcpy(ch_switch_timing, &switch_time, 2); ++ _rtw_memcpy(ch_switch_timing + 2, &switch_timeout, 2); ++ ++ return rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); ++} ++ ++void rtw_tdls_set_ch_sw_oper_control(_adapter *padapter, u8 enable) ++{ ++ if (ATOMIC_READ(&padapter->tdlsinfo.chsw_info.chsw_on) != enable) ++ ATOMIC_SET(&padapter->tdlsinfo.chsw_info.chsw_on, enable); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_BCN_EARLY_C2H_RPT, &enable); ++ DBG_871X("[TDLS] %s Bcn Early C2H Report\n", (enable == _TRUE) ? "Start" : "Stop"); ++} ++ ++void rtw_tdls_ch_sw_back_to_base_chnl(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv; ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ ++ pmlmepriv = &padapter->mlmepriv; ++ ++ if ((ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) && ++ (padapter->mlmeextpriv.cur_channel != rtw_get_oper_ch(padapter))) ++ rtw_tdls_cmd(padapter, pchsw_info->addr, TDLS_CH_SW_TO_BASE_CHNL_UNSOLICITED); ++} ++ ++static void rtw_tdls_chsw_oper_init(_adapter *padapter, u32 timeout_ms) ++{ ++ struct submit_ctx *chsw_sctx = &padapter->tdlsinfo.chsw_info.chsw_sctx; ++ ++ rtw_sctx_init(chsw_sctx, timeout_ms); ++} ++ ++static int rtw_tdls_chsw_oper_wait(_adapter *padapter) ++{ ++ struct submit_ctx *chsw_sctx = &padapter->tdlsinfo.chsw_info.chsw_sctx; ++ ++ return rtw_sctx_wait(chsw_sctx, __func__); ++} ++ ++void rtw_tdls_chsw_oper_done(_adapter *padapter) ++{ ++ struct submit_ctx *chsw_sctx = &padapter->tdlsinfo.chsw_info.chsw_sctx; ++ ++ rtw_sctx_done(&chsw_sctx); ++} ++ ++s32 rtw_tdls_do_ch_sw(_adapter *padapter, u8 chnl_type, u8 channel, u8 channel_offset, u16 bwmode, u16 ch_switch_time) ++{ ++ u32 ch_sw_time_start, ch_sw_time_spent, wait_time; ++ u8 take_care_iqk; ++ s32 ret = _FAIL; ++ ++ ch_sw_time_start = rtw_systime_to_ms(rtw_get_current_time()); ++ ++ rtw_tdls_chsw_oper_init(padapter, TDLS_CH_SWITCH_OPER_OFFLOAD_TIMEOUT); ++ ++ /* channel switch IOs offload to FW */ ++ if (rtw_hal_ch_sw_oper_offload(padapter, channel, channel_offset, bwmode) == _SUCCESS) { ++ if (rtw_tdls_chsw_oper_wait(padapter) == _SUCCESS) { ++ /* set channel and bw related variables in driver */ ++ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); ++ rtw_set_oper_ch(padapter, channel); ++ rtw_set_oper_choffset(padapter, channel_offset); ++ rtw_set_oper_bw(padapter, bwmode); ++ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk); ++ if (take_care_iqk == _TRUE) ++ rtw_hal_ch_sw_iqk_info_restore(padapter, CH_SW_USE_CASE_TDLS); ++ ++ ch_sw_time_spent = rtw_systime_to_ms(rtw_get_current_time()) - ch_sw_time_start; ++ ++ if (chnl_type == TDLS_CH_SW_OFF_CHNL) { ++ if ((u32)ch_switch_time / 1000 > ch_sw_time_spent) ++ wait_time = (u32)ch_switch_time / 1000 - ch_sw_time_spent; ++ else ++ wait_time = 0; ++ ++ if (wait_time > 0) ++ rtw_msleep_os(wait_time); ++ } ++ ++ ret = _SUCCESS; ++ } else ++ DBG_871X("[TDLS] chsw oper wait fail !!\n"); ++ } ++ ++ return ret; ++} ++#endif ++ ++u8 *rtw_tdls_set_wmm_params(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 wmm_param_ele[24] = {0}; ++ ++ if (&pmlmeinfo->WMM_param) { ++ _rtw_memcpy(wmm_param_ele, WMM_PARA_OUI, 6); ++ if (_rtw_memcmp(&pmlmeinfo->WMM_param, &wmm_param_ele[6], 18) == _TRUE) ++ /* Use default WMM Param */ ++ _rtw_memcpy(wmm_param_ele + 6, (u8 *)&TDLS_WMM_PARAM_IE, sizeof(TDLS_WMM_PARAM_IE)); ++ else ++ _rtw_memcpy(wmm_param_ele + 6, (u8 *)&pmlmeinfo->WMM_param, sizeof(pmlmeinfo->WMM_param)); ++ return rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 24, wmm_param_ele, &(pattrib->pktlen)); ++ } ++ else ++ return pframe; ++} ++ ++#ifdef CONFIG_WFD ++void rtw_tdls_process_wfd_ie(struct tdls_info *ptdlsinfo, u8 *ptr, u8 length) ++{ ++ u8 *wfd_ie; ++ u32 wfd_ielen = 0; ++ ++ if (!hal_chk_wl_func(tdls_info_to_adapter(ptdlsinfo), WL_FUNC_MIRACAST)) ++ return; ++ ++ /* Try to get the TCP port information when receiving the negotiation response. */ ++ ++ wfd_ie = rtw_get_wfd_ie(ptr, length, NULL, &wfd_ielen); ++ while (wfd_ie) { ++ u8 *attr_content; ++ u32 attr_contentlen = 0; ++ int i; ++ ++ DBG_871X( "[%s] WFD IE Found!!\n", __FUNCTION__ ); ++ attr_content = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &attr_contentlen); ++ if (attr_content && attr_contentlen) { ++ ptdlsinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); ++ DBG_871X( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, ptdlsinfo->wfd_info->peer_rtsp_ctrlport ); ++ } ++ ++ attr_content = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_LOCAL_IP_ADDR, NULL, &attr_contentlen); ++ if (attr_content && attr_contentlen) { ++ _rtw_memcpy(ptdlsinfo->wfd_info->peer_ip_address, ( attr_content + 1 ), 4); ++ DBG_871X("[%s] Peer IP = %02u.%02u.%02u.%02u\n", __FUNCTION__, ++ ptdlsinfo->wfd_info->peer_ip_address[0], ptdlsinfo->wfd_info->peer_ip_address[1], ++ ptdlsinfo->wfd_info->peer_ip_address[2], ptdlsinfo->wfd_info->peer_ip_address[3]); ++ } ++ ++ wfd_ie = rtw_get_wfd_ie(wfd_ie + wfd_ielen, (ptr + length) - (wfd_ie + wfd_ielen), NULL, &wfd_ielen); ++ } ++} ++ ++int issue_tunneled_probe_req(_adapter *padapter) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ u8 baddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ struct tdls_txmgmt txmgmt; ++ int ret = _FAIL; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ txmgmt.action_code = TUNNELED_PROBE_REQ; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, baddr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++} ++ ++int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct tdls_txmgmt txmgmt; ++ int ret = _FAIL; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ txmgmt.action_code = TUNNELED_PROBE_RSP; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, precv_frame->u.hdr.attrib.src, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++} ++#endif /* CONFIG_WFD */ ++ ++int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta= NULL; ++ _irqL irqL; ++ int ret = _FAIL; ++ /* Retry timer should be set at least 301 sec, using TPK_count counting 301 times. */ ++ u32 timeout_interval = TDLS_TPK_RESEND_COUNT; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_SETUP_REQUEST; ++ if (rtw_tdls_is_setup_allowed(padapter) == _FALSE) ++ goto exit; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ ++ /* init peer sta_info */ ++ ptdls_sta = rtw_get_stainfo(pstapriv, ptxmgmt->peer); ++ if (ptdls_sta == NULL) { ++ ptdls_sta = rtw_alloc_stainfo(pstapriv, ptxmgmt->peer); ++ if (ptdls_sta == NULL) { ++ DBG_871X("[%s] rtw_alloc_stainfo fail\n", __FUNCTION__); ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ } ++ ++ if(!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) ++ ptdlsinfo->sta_cnt++; ++ ++ if (ptdlsinfo->sta_cnt == MAX_ALLOWED_TDLS_STA_NUM) ++ ptdlsinfo->sta_maximum = _TRUE; ++ ++ ptdls_sta->tdls_sta_state |= TDLS_RESPONDER_STATE; ++ ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { ++ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; ++ _set_timer(&ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); ++ } ++ ++ pattrib->qsel = pattrib->priority; ++ ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) !=_SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ if (wait_ack) { ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ } else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++exit: ++ ++ return ret; ++} ++ ++int _issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta=NULL; ++ _irqL irqL; ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_TEARDOWN; ++ ptdls_sta = rtw_get_stainfo(pstapriv, ptxmgmt->peer); ++ if (ptdls_sta == NULL) { ++ DBG_871X("Np tdls_sta for tearing down\n"); ++ goto exit; ++ } ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ rtw_set_scan_deny(padapter, 550); ++ ++ rtw_scan_abort(padapter); ++#ifdef CONFIG_CONCURRENT_MODE ++ if (rtw_buddy_adapter_up(padapter)) ++ rtw_scan_abort(padapter->pbuddy_adapter); ++#endif /* CONFIG_CONCURRENT_MODE */ ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) ++ if(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) ++ if (pattrib->encrypt) ++ _cancel_timer_ex(&ptdls_sta->TPK_timer); ++ ++ if (wait_ack) { ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ } else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++ if (rtw_tdls_is_driver_setup(padapter)) ++ rtw_tdls_cmd(padapter, ptxmgmt->peer, TDLS_TEARDOWN_STA_LOCALLY); ++ ++exit: ++ ++ return ret; ++} ++ ++int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack) ++{ ++ int ret = _FAIL; ++ ++ ret = _issue_tdls_teardown(padapter, ptxmgmt, wait_ack); ++ if ((ptxmgmt->status_code == _RSON_TDLS_TEAR_UN_RSN_) && (ret == _FAIL)) { ++ /* Change status code and send teardown again via AP */ ++ ptxmgmt->status_code = _RSON_TDLS_TEAR_TOOFAR_; ++ ret = _issue_tdls_teardown(padapter, ptxmgmt, wait_ack); ++ } ++ ++ return ret; ++} ++ ++int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_DISCOVERY_REQUEST; ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ dump_mgntframe(padapter, pmgntframe); ++ DBG_871X("issue tdls dis req\n"); ++ ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++} ++ ++int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_SETUP_RESPONSE; ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(&(padapter->mlmepriv)), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++ ++} ++ ++int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_SETUP_CONFIRM; ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(&padapter->mlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++ ++} ++ ++/* TDLS Discovery Response frame is a management action frame */ ++int issue_tdls_dis_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ /* unicast probe request frame */ ++ _rtw_memcpy(pwlanhdr->addr1, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->dst, pwlanhdr->addr1, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->src, pwlanhdr->addr2, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, pwlanhdr->addr3, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof (struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ rtw_build_tdls_dis_rsp_ies(padapter, pmgntframe, pframe, ptxmgmt, privacy); ++ ++ pattrib->nr_frags = 1; ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *ptdls_sta, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ ptxmgmt->action_code = TDLS_PEER_TRAFFIC_RESPONSE; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) !=_SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ ++exit: ++ ++ return ret; ++} ++ ++int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct tdls_txmgmt txmgmt; ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ txmgmt.action_code = TDLS_PEER_TRAFFIC_INDICATION; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ /* PTI frame's priority should be AC_VO */ ++ pattrib->priority = 7; ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ ++exit: ++ ++ return ret; ++} ++ ++#ifdef CONFIG_TDLS_CH_SW ++int issue_tdls_ch_switch_req(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct tdls_txmgmt txmgmt; ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) { ++ DBG_871X("[TDLS] Ignore %s since channel switch is not allowed\n", __func__); ++ goto exit; ++ } ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ txmgmt.action_code = TDLS_CHANNEL_SWITCH_REQUEST; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) !=_SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++exit: ++ ++ return ret; ++} ++ ++int issue_tdls_ch_switch_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ int ret = _FAIL; ++ ++ DBG_871X("[TDLS] %s\n", __FUNCTION__); ++ ++ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) { ++ DBG_871X("[TDLS] Ignore %s since channel switch is not allowed\n", __func__); ++ goto exit; ++ } ++ ++ ptxmgmt->action_code = TDLS_CHANNEL_SWITCH_RESPONSE; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ ++ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, ptxmgmt->peer, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel = pattrib->priority; ++/* ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ if(xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pmgntframe)==_TRUE){ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ return _FALSE; ++ } ++*/ ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) !=_SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ if (wait_ack) { ++ ret = dump_mgntframe_and_wait_ack_timeout(padapter, pmgntframe, 10); ++ } else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++exit: ++ ++ return ret; ++} ++#endif ++ ++int On_TDLS_Dis_Rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct sta_info *ptdls_sta = NULL, *psta = rtw_get_stainfo(&(padapter->stapriv), get_bssid(&(padapter->mlmepriv))); ++ struct recv_priv *precvpriv = &(padapter->recvpriv); ++ u8 *ptr = precv_frame->u.hdr.rx_data, *psa; ++ struct rx_pkt_attrib *pattrib = &(precv_frame->u.hdr.attrib); ++ struct tdls_info *ptdlsinfo = &(padapter->tdlsinfo); ++ u8 empty_addr[ETH_ALEN] = { 0x00 }; ++ int UndecoratedSmoothedPWDB; ++ struct tdls_txmgmt txmgmt; ++ int ret = _SUCCESS; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ /* WFDTDLS: for sigma test, not to setup direct link automatically */ ++ ptdlsinfo->dev_discovered = _TRUE; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), psa); ++ if (ptdls_sta != NULL) ++ ptdls_sta->sta_stats.rx_tdls_disc_rsp_pkts++; ++ ++#ifdef CONFIG_TDLS_AUTOSETUP ++ if (ptdls_sta != NULL) { ++ /* Record the tdls sta with lowest signal strength */ ++ if (ptdlsinfo->sta_maximum == _TRUE && ptdls_sta->alive_count >= 1 ) { ++ if (_rtw_memcmp(ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN)) { ++ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); ++ ptdlsinfo->ss_record.RxPWDBAll = pattrib->phy_info.RxPWDBAll; ++ } else { ++ if (ptdlsinfo->ss_record.RxPWDBAll < pattrib->phy_info.RxPWDBAll) { ++ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); ++ ptdlsinfo->ss_record.RxPWDBAll = pattrib->phy_info.RxPWDBAll; ++ } ++ } ++ } ++ } else { ++ if (ptdlsinfo->sta_maximum == _TRUE) { ++ if (_rtw_memcmp( ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN)) { ++ /* All traffics are busy, do not set up another direct link. */ ++ ret = _FAIL; ++ goto exit; ++ } else { ++ if (pattrib->phy_info.RxPWDBAll > ptdlsinfo->ss_record.RxPWDBAll) { ++ _rtw_memcpy(txmgmt.peer, ptdlsinfo->ss_record.macaddr, ETH_ALEN); ++ /* issue_tdls_teardown(padapter, ptdlsinfo->ss_record.macaddr, _FALSE); */ ++ } else { ++ ret = _FAIL; ++ goto exit; ++ } ++ } ++ } ++ ++ rtw_hal_get_def_var(padapter, HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, &UndecoratedSmoothedPWDB); ++ ++ if (pattrib->phy_info.RxPWDBAll + TDLS_SIGNAL_THRESH >= UndecoratedSmoothedPWDB) { ++ DBG_871X("pattrib->RxPWDBAll=%d, pdmpriv->UndecoratedSmoothedPWDB=%d\n", pattrib->phy_info.RxPWDBAll, UndecoratedSmoothedPWDB); ++ _rtw_memcpy(txmgmt.peer, psa, ETH_ALEN); ++ issue_tdls_setup_req(padapter, &txmgmt, _FALSE); ++ } ++ } ++#endif /* CONFIG_TDLS_AUTOSETUP */ ++ ++exit: ++ return ret; ++ ++} ++ ++sint On_TDLS_Setup_Req(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ u8 *psa, *pmyid; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *prsnie, *ppairwise_cipher; ++ u8 i, k; ++ u8 ccmp_included=0, rsnie_included=0; ++ u16 j, pairwise_count; ++ u8 SNonce[32]; ++ u32 timeout_interval = TDLS_TPK_RESEND_COUNT; ++ sint parsing_length; /* Frame body length, without icv_len */ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 5; ++ unsigned char supportRate[16]; ++ int supportRateNum = 0; ++ struct tdls_txmgmt txmgmt; ++ ++ if (rtw_tdls_is_setup_allowed(padapter) == _FALSE) ++ goto exit; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ pmyid = adapter_mac_addr(padapter); ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ if (ptdls_sta == NULL) { ++ ptdls_sta = rtw_alloc_stainfo(pstapriv, psa); ++ } else { ++ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { ++ /* If the direct link is already set up */ ++ /* Process as re-setup after tear down */ ++ DBG_871X("re-setup a direct link\n"); ++ } ++ /* Already receiving TDLS setup request */ ++ else if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) { ++ DBG_871X("receive duplicated TDLS setup request frame in handshaking\n"); ++ goto exit; ++ } ++ /* When receiving and sending setup_req to the same link at the same time */ ++ /* STA with higher MAC_addr would be initiator */ ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) { ++ DBG_871X("receive setup_req after sending setup_req\n"); ++ for (i=0;i<6;i++){ ++ if(*(pmyid+i)==*(psa+i)){ ++ } ++ else if(*(pmyid+i)>*(psa+i)){ ++ ptdls_sta->tdls_sta_state = TDLS_INITIATOR_STATE; ++ break; ++ }else if(*(pmyid+i)<*(psa+i)){ ++ goto exit; ++ } ++ } ++ } ++ } ++ ++ if (ptdls_sta) { ++ txmgmt.dialog_token = *(ptr+2); /* Copy dialog token */ ++ txmgmt.status_code = _STATS_SUCCESSFUL_; ++ ++ /* Parsing information element */ ++ for (j=FIXED_IE; jElementID) { ++ case _SUPPORTEDRATES_IE_: ++ _rtw_memcpy(supportRate, pIE->data, pIE->Length); ++ supportRateNum = pIE->Length; ++ break; ++ case _COUNTRY_IE_: ++ break; ++ case _EXT_SUPPORTEDRATES_IE_: ++ if (supportRateNum<=sizeof(supportRate)) { ++ _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); ++ supportRateNum += pIE->Length; ++ } ++ break; ++ case _SUPPORTED_CH_IE_: ++ break; ++ case _RSN_IE_2_: ++ rsnie_included=1; ++ if (prx_pkt_attrib->encrypt) { ++ prsnie=(u8*)pIE; ++ /* Check CCMP pairwise_cipher presence. */ ++ ppairwise_cipher=prsnie+10; ++ _rtw_memcpy(ptdls_sta->TDLS_RSNIE, pIE->data, pIE->Length); ++ pairwise_count = *(u16*)(ppairwise_cipher-2); ++ for (k=0; kencrypt) ++ _rtw_memcpy(SNonce, (ptr+j+52), 32); ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ if (prx_pkt_attrib->encrypt) ++ timeout_interval = cpu_to_le32(*(u32*)(ptr+j+3)); ++ break; ++ case _RIC_Descriptor_IE_: ++ break; ++#ifdef CONFIG_80211N_HT ++ case _HT_CAPABILITY_IE_: ++ rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); ++ break; ++#endif ++#ifdef CONFIG_80211AC_VHT ++ case EID_AID: ++ break; ++ case EID_VHTCapability: ++ rtw_tdls_process_vht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); ++ break; ++#endif ++ case EID_BSSCoexistence: ++ break; ++ case _LINK_ID_IE_: ++ if (_rtw_memcmp(get_bssid(pmlmepriv), pIE->data, 6) == _FALSE) ++ txmgmt.status_code=_STATS_NOT_IN_SAME_BSS_; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ /* Check status code */ ++ /* If responder STA has/hasn't security on AP, but request hasn't/has RSNIE, it should reject */ ++ if (txmgmt.status_code == _STATS_SUCCESSFUL_) { ++ if (rsnie_included && prx_pkt_attrib->encrypt == 0) ++ txmgmt.status_code = _STATS_SEC_DISABLED_; ++ else if (rsnie_included==0 && prx_pkt_attrib->encrypt) ++ txmgmt.status_code = _STATS_INVALID_PARAMETERS_; ++ ++#ifdef CONFIG_WFD ++ /* WFD test plan version 0.18.2 test item 5.1.5 */ ++ /* SoUT does not use TDLS if AP uses weak security */ ++ if (padapter->wdinfo.wfd_tdls_enable && (rsnie_included && prx_pkt_attrib->encrypt != _AES_)) ++ txmgmt.status_code = _STATS_SEC_DISABLED_; ++#endif /* CONFIG_WFD */ ++ } ++ ++ ptdls_sta->tdls_sta_state|= TDLS_INITIATOR_STATE; ++ if (prx_pkt_attrib->encrypt) { ++ _rtw_memcpy(ptdls_sta->SNonce, SNonce, 32); ++ ++ if (timeout_interval <= 300) ++ ptdls_sta->TDLS_PeerKey_Lifetime = TDLS_TPK_RESEND_COUNT; ++ else ++ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; ++ } ++ ++ /* Update station supportRate */ ++ ptdls_sta->bssratelen = supportRateNum; ++ _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); ++ ++ if (!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) ++ ptdlsinfo->sta_cnt++; ++ /* -2: AP + BC/MC sta, -4: default key */ ++ if (ptdlsinfo->sta_cnt == MAX_ALLOWED_TDLS_STA_NUM) ++ ptdlsinfo->sta_maximum = _TRUE; ++ ++#ifdef CONFIG_WFD ++ rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length); ++#endif ++ ++ }else { ++ goto exit; ++ } ++ ++ _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); ++ ++ if (rtw_tdls_is_driver_setup(padapter)) { ++ issue_tdls_setup_rsp(padapter, &txmgmt); ++ ++ if (txmgmt.status_code==_STATS_SUCCESSFUL_) { ++ _set_timer( &ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); ++ }else { ++ free_tdls_sta(padapter, ptdls_sta); ++ } ++ } ++ ++exit: ++ ++ return _SUCCESS; ++} ++ ++int On_TDLS_Setup_Rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ u16 status_code=0; ++ sint parsing_length; /* Frame body length, without icv_len */ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =7; ++ u8 ANonce[32]; ++ u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL, *ppairwise_cipher=NULL; ++ u16 pairwise_count, j, k; ++ u8 verify_ccmp=0; ++ unsigned char supportRate[16]; ++ int supportRateNum = 0; ++ struct tdls_txmgmt txmgmt; ++ int ret = _SUCCESS; ++ u32 timeout_interval = TDLS_TPK_RESEND_COUNT; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ if (ptdls_sta == NULL) { ++ DBG_871X("[%s] Direct Link Peer = "MAC_FMT" not found\n", __func__, MAC_ARG(psa)); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ _rtw_memcpy(&status_code, ptr+2, 2); ++ ++ if (status_code != 0) { ++ DBG_871X( "[TDLS] %s status_code = %d, free_tdls_sta\n", __FUNCTION__, status_code ); ++ free_tdls_sta(padapter, ptdls_sta); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ status_code = 0; ++ ++ /* parsing information element */ ++ for (j = FIXED_IE; jElementID) { ++ case _SUPPORTEDRATES_IE_: ++ _rtw_memcpy(supportRate, pIE->data, pIE->Length); ++ supportRateNum = pIE->Length; ++ break; ++ case _COUNTRY_IE_: ++ break; ++ case _EXT_SUPPORTEDRATES_IE_: ++ if (supportRateNum<=sizeof(supportRate)) { ++ _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); ++ supportRateNum += pIE->Length; ++ } ++ break; ++ case _SUPPORTED_CH_IE_: ++ break; ++ case _RSN_IE_2_: ++ prsnie=(u8*)pIE; ++ /* Check CCMP pairwise_cipher presence. */ ++ ppairwise_cipher=prsnie+10; ++ _rtw_memcpy(&pairwise_count, (u16*)(ppairwise_cipher-2), 2); ++ for (k=0;kwmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) ++ ptdls_sta->qos_option = _TRUE; ++ } ++ break; ++ case _FTIE_: ++ pftie=(u8*)pIE; ++ _rtw_memcpy(ANonce, (ptr+j+20), 32); ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ ptimeout_ie=(u8*)pIE; ++ timeout_interval = cpu_to_le32(*(u32*)(ptimeout_ie+3)); ++ break; ++ case _RIC_Descriptor_IE_: ++ break; ++#ifdef CONFIG_80211N_HT ++ case _HT_CAPABILITY_IE_: ++ rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); ++ break; ++#endif ++#ifdef CONFIG_80211AC_VHT ++ case EID_AID: ++ /* todo in the future if necessary */ ++ break; ++ case EID_VHTCapability: ++ rtw_tdls_process_vht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); ++ break; ++ case EID_OpModeNotification: ++ rtw_process_vht_op_mode_notify(padapter, pIE->data, ptdls_sta); ++ break; ++#endif ++ case EID_BSSCoexistence: ++ break; ++ case _LINK_ID_IE_: ++ plinkid_ie=(u8*)pIE; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ ptdls_sta->bssratelen = supportRateNum; ++ _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); ++ _rtw_memcpy(ptdls_sta->ANonce, ANonce, 32); ++ ++#ifdef CONFIG_WFD ++ rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length); ++#endif ++ ++ if (status_code != _STATS_SUCCESSFUL_) { ++ txmgmt.status_code = status_code; ++ } else { ++ if (prx_pkt_attrib->encrypt) { ++ if (verify_ccmp == 1) { ++ txmgmt.status_code = _STATS_SUCCESSFUL_; ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { ++ wpa_tdls_generate_tpk(padapter, ptdls_sta); ++ if (tdls_verify_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie) == _FAIL) { ++ DBG_871X( "[TDLS] %s tdls_verify_mic fail, free_tdls_sta\n", __FUNCTION__); ++ free_tdls_sta(padapter, ptdls_sta); ++ ret = _FAIL; ++ goto exit; ++ } ++ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; ++ } ++ } ++ else ++ { ++ txmgmt.status_code = _STATS_INVALID_RSNIE_; ++ } ++ ++ }else{ ++ txmgmt.status_code = _STATS_SUCCESSFUL_; ++ } ++ } ++ ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { ++ _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); ++ issue_tdls_setup_cfm(padapter, &txmgmt); ++ ++ if (txmgmt.status_code == _STATS_SUCCESSFUL_) { ++ ptdlsinfo->link_established = _TRUE; ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) { ++ ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; ++ ptdls_sta->state |= _FW_LINKED; ++ _cancel_timer_ex( &ptdls_sta->handshake_timer); ++ } ++ ++ if (prx_pkt_attrib->encrypt) ++ rtw_tdls_set_key(padapter, ptdls_sta); ++ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_ESTABLISHED); ++ ++ } ++ } ++ ++exit: ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) ++ return ret; ++ else ++ return _SUCCESS; ++ ++} ++ ++int On_TDLS_Setup_Cfm(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ u16 status_code=0; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =5; ++ u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL, *ppairwise_cipher=NULL; ++ u16 j, pairwise_count; ++ int ret = _SUCCESS; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ if (ptdls_sta == NULL) { ++ DBG_871X("[%s] Direct Link Peer = "MAC_FMT" not found\n", __FUNCTION__, MAC_ARG(psa)); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ _rtw_memcpy(&status_code, ptr+2, 2); ++ ++ if (status_code!= 0) { ++ DBG_871X("[%s] status_code = %d\n, free_tdls_sta", __FUNCTION__, status_code); ++ free_tdls_sta(padapter, ptdls_sta); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ /* Parsing information element */ ++ for (j = FIXED_IE; j < parsing_length;) { ++ ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr + j); ++ ++ switch (pIE->ElementID) { ++ case _RSN_IE_2_: ++ prsnie = (u8 *)pIE; ++ break; ++ case _VENDOR_SPECIFIC_IE_: ++ if (_rtw_memcmp((u8 *)pIE + 2, WMM_PARA_OUI, 6) == _TRUE) { ++ /* WMM Parameter ID and OUI */ ++ ptdls_sta->qos_option = _TRUE; ++ } ++ break; ++ case _FTIE_: ++ pftie = (u8 *)pIE; ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ ptimeout_ie = (u8 *)pIE; ++ break; ++#ifdef CONFIG_80211N_HT ++ case _HT_EXTRA_INFO_IE_: ++ break; ++#endif ++#ifdef CONFIG_80211AC_VHT ++ case EID_VHTOperation: ++ break; ++ case EID_OpModeNotification: ++ rtw_process_vht_op_mode_notify(padapter, pIE->data, ptdls_sta); ++ break; ++#endif ++ case _LINK_ID_IE_: ++ plinkid_ie = (u8 *)pIE; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ if (prx_pkt_attrib->encrypt) { ++ /* Verify mic in FTIE MIC field */ ++ if (rtw_tdls_is_driver_setup(padapter) && ++ (tdls_verify_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie) == _FAIL)) { ++ free_tdls_sta(padapter, ptdls_sta); ++ ret = _FAIL; ++ goto exit; ++ } ++ } ++ ++ if (rtw_tdls_is_driver_setup(padapter)) { ++ ptdlsinfo->link_established = _TRUE; ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) { ++ ptdls_sta->tdls_sta_state|=TDLS_LINKED_STATE; ++ ptdls_sta->state |= _FW_LINKED; ++ _cancel_timer_ex(&ptdls_sta->handshake_timer); ++ } ++ ++ if (prx_pkt_attrib->encrypt) { ++ rtw_tdls_set_key(padapter, ptdls_sta); ++ ++ /* Start TPK timer */ ++ ptdls_sta->TPK_count = 0; ++ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); ++ } ++ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_ESTABLISHED); ++ } ++ ++exit: ++ return ret; ++ ++} ++ ++int On_TDLS_Dis_Req(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta_ap; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ sint parsing_length; /* Frame body length, without icv_len */ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 3, *dst; ++ u16 j; ++ struct tdls_txmgmt txmgmt; ++ int ret = _SUCCESS; ++ ++ if (rtw_tdls_is_driver_setup(padapter) == _FALSE) ++ goto exit; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ txmgmt.dialog_token = *(ptr+2); ++ _rtw_memcpy(&txmgmt.peer, precv_frame->u.hdr.attrib.src, ETH_ALEN); ++ txmgmt.action_code = TDLS_DISCOVERY_RESPONSE; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ /* Parsing information element */ ++ for (j=FIXED_IE; jElementID) { ++ case _LINK_ID_IE_: ++ psta_ap = rtw_get_stainfo(pstapriv, pIE->data); ++ if (psta_ap == NULL) ++ goto exit; ++ dst = pIE->data + 12; ++ if (MacAddr_isBcst(dst) == _FALSE && (_rtw_memcmp(adapter_mac_addr(padapter), dst, 6) == _FALSE)) ++ goto exit; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ issue_tdls_dis_rsp(padapter, &txmgmt, prx_pkt_attrib->privacy); ++ ++exit: ++ return ret; ++ ++} ++ ++int On_TDLS_Teardown(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ u8 *psa; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta= NULL; ++ _irqL irqL; ++ u8 reason; ++ ++ reason = *(ptr + prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN + 2); ++ DBG_871X("[TDLS] %s Reason code(%d)\n", __FUNCTION__,reason); ++ ++ psa = get_sa(ptr); ++ ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ if (ptdls_sta != NULL) { ++ if (rtw_tdls_is_driver_setup(padapter)) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_TEARDOWN_STA_LOCALLY); ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++#if 0 ++u8 TDLS_check_ch_state(uint state){ ++ if (state & TDLS_CH_SWITCH_ON_STATE && ++ state & TDLS_PEER_AT_OFF_STATE) { ++ if (state & TDLS_PEER_SLEEP_STATE) ++ return 2; /* U-APSD + ch. switch */ ++ else ++ return 1; /* ch. switch */ ++ }else ++ return 0; ++} ++#endif ++ ++int On_TDLS_Peer_Traffic_Indication(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->src); ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct tdls_txmgmt txmgmt; ++ ++ ptr +=pattrib->hdrlen + pattrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ ++ if (ptdls_sta != NULL) { ++ txmgmt.dialog_token = *(ptr+2); ++ issue_tdls_peer_traffic_rsp(padapter, ptdls_sta, &txmgmt); ++ //issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 0, 0, 0); ++ } else { ++ DBG_871X("from unknown sta:"MAC_FMT"\n", MAC_ARG(pattrib->src)); ++ return _FAIL; ++ } ++ ++ return _SUCCESS; ++} ++ ++/* We process buffered data for 1. U-APSD, 2. ch. switch, 3. U-APSD + ch. switch here */ ++int On_TDLS_Peer_Traffic_Rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src); ++ u8 wmmps_ac=0; ++ /* u8 state=TDLS_check_ch_state(ptdls_sta->tdls_sta_state); */ ++ int i; ++ ++ ptdls_sta->sta_stats.rx_data_pkts++; ++ ++ ptdls_sta->tdls_sta_state &= ~(TDLS_WAIT_PTR_STATE); ++ ++ /* Check 4-AC queue bit */ ++ if (ptdls_sta->uapsd_vo || ptdls_sta->uapsd_vi || ptdls_sta->uapsd_be || ptdls_sta->uapsd_bk) ++ wmmps_ac=1; ++ ++ /* If it's a direct link and have buffered frame */ ++ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { ++ if (wmmps_ac) { ++ _irqL irqL; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ ++ _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&ptdls_sta->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ /* transmit buffered frames */ ++ while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ xmitframe_plist = get_next(xmitframe_plist); ++ rtw_list_delete(&pxmitframe->list); ++ ++ ptdls_sta->sleepq_len--; ++ ptdls_sta->sleepq_ac_len--; ++ if (ptdls_sta->sleepq_len>0) { ++ pxmitframe->attrib.mdata = 1; ++ pxmitframe->attrib.eosp = 0; ++ } else { ++ pxmitframe->attrib.mdata = 0; ++ pxmitframe->attrib.eosp = 1; ++ } ++ pxmitframe->attrib.triggered = 1; ++ ++ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); ++ } ++ ++ if (ptdls_sta->sleepq_len==0) ++ DBG_871X("no buffered packets for tdls to xmit\n"); ++ else { ++ DBG_871X("error!psta->sleepq_len=%d\n", ptdls_sta->sleepq_len); ++ ptdls_sta->sleepq_len=0; ++ } ++ ++ _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ ++ } ++ ++ } ++ ++ return _SUCCESS; ++} ++ ++#ifdef CONFIG_TDLS_CH_SW ++sint On_TDLS_Ch_Switch_Req(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 4; ++ u16 j; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct tdls_txmgmt txmgmt; ++ u8 zaddr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; ++ u16 switch_time = TDLS_CH_SWITCH_TIME * 1000, switch_timeout = TDLS_CH_SWITCH_TIMEOUT * 1000; ++ u8 take_care_iqk; ++ ++ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) { ++ DBG_871X("[TDLS] Ignore %s since channel switch is not allowed\n", __func__); ++ return _FAIL; ++ } ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ if (ptdls_sta == NULL) { ++ DBG_871X("[%s] Direct Link Peer = "MAC_FMT" not found\n", __func__, MAC_ARG(psa)); ++ return _FAIL; ++ } ++ ++ ptdls_sta->ch_switch_time=switch_time; ++ ptdls_sta->ch_switch_timeout=switch_timeout; ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ pchsw_info->off_ch_num = *(ptr + 2); ++ ++ if ((*(ptr + 2) == 2) && (hal_is_band_support(padapter, BAND_ON_5G))) { ++ pchsw_info->off_ch_num = 44; ++ } ++ ++ if (pchsw_info->off_ch_num != pmlmeext->cur_channel) { ++ pchsw_info->delay_switch_back = _FALSE; ++ } ++ ++ /* Parsing information element */ ++ for (j=FIXED_IE; jElementID) { ++ case EID_SecondaryChnlOffset: ++ switch (*(pIE->data)) { ++ case EXTCHNL_OFFSET_UPPER: ++ pchsw_info->ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case EXTCHNL_OFFSET_LOWER: ++ pchsw_info->ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ pchsw_info->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ break; ++ case _LINK_ID_IE_: ++ break; ++ case _CH_SWITCH_TIMING_: ++ ptdls_sta->ch_switch_time = (RTW_GET_LE16(pIE->data) >= TDLS_CH_SWITCH_TIME * 1000) ? ++ RTW_GET_LE16(pIE->data) : TDLS_CH_SWITCH_TIME * 1000; ++ ptdls_sta->ch_switch_timeout = (RTW_GET_LE16(pIE->data + 2) >= TDLS_CH_SWITCH_TIMEOUT * 1000) ? ++ RTW_GET_LE16(pIE->data + 2) : TDLS_CH_SWITCH_TIMEOUT * 1000; ++ DBG_871X("[TDLS] %s ch_switch_time:%d, ch_switch_timeout:%d\n" ++ , __FUNCTION__, RTW_GET_LE16(pIE->data), RTW_GET_LE16(pIE->data + 2)); ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ } ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk); ++ if (take_care_iqk == _TRUE) { ++ u8 central_chnl; ++ u8 bw_mode; ++ ++ bw_mode = (pchsw_info->ch_offset) ? CHANNEL_WIDTH_40 : CHANNEL_WIDTH_20; ++ central_chnl = rtw_get_center_ch(pchsw_info->off_ch_num, bw_mode, pchsw_info->ch_offset); ++ if (rtw_hal_ch_sw_iqk_info_search(padapter, central_chnl, bw_mode) < 0) { ++ if (!(pchsw_info->ch_sw_state & TDLS_CH_SWITCH_PREPARE_STATE)) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_PREPARE); ++ ++ return _FAIL; ++ } ++ } ++ ++ /* cancel ch sw monitor timer for responder */ ++ if (!(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE)) ++ _cancel_timer_ex(&ptdls_sta->ch_sw_monitor_timer); ++ ++ /* Todo: check status */ ++ txmgmt.status_code = 0; ++ _rtw_memcpy(txmgmt.peer, psa, ETH_ALEN); ++ ++ if (_rtw_memcmp(pchsw_info->addr, zaddr, ETH_ALEN) == _TRUE) ++ _rtw_memcpy(pchsw_info->addr, ptdls_sta->hwaddr, ETH_ALEN); ++ ++ if (ATOMIC_READ(&pchsw_info->chsw_on) == _FALSE) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_START); ++ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_RESP); ++ ++ return _SUCCESS; ++} ++ ++sint On_TDLS_Ch_Switch_Rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 4; ++ u16 status_code, j, switch_time, switch_timeout; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ int ret = _SUCCESS; ++ ++ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) { ++ DBG_871X("[TDLS] Ignore %s since channel switch is not allowed\n", __func__); ++ return _SUCCESS; ++ } ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ if (ptdls_sta == NULL) { ++ DBG_871X("[%s] Direct Link Peer = "MAC_FMT" not found\n", __func__, MAC_ARG(psa)); ++ return _FAIL; ++ } ++ ++ /* If we receive Unsolicited TDLS Channel Switch Response when channel switch is running, */ ++ /* we will go back to base channel and terminate this channel switch procedure */ ++ if (ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) { ++ if (pmlmeext->cur_channel != rtw_get_oper_ch(padapter)) { ++ DBG_871X("[TDLS] Rx unsolicited channel switch response\n"); ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_TO_BASE_CHNL); ++ goto exit; ++ } ++ } ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE+ETH_TYPE_LEN+PAYLOAD_TYPE_LEN; ++ parsing_length = ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ _rtw_memcpy(&status_code, ptr+2, 2); ++ ++ if (status_code != 0) { ++ DBG_871X("[TDLS] %s status_code:%d\n", __func__, status_code); ++ pchsw_info->ch_sw_state &= ~(TDLS_CH_SW_INITIATOR_STATE); ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_END); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ /* Parsing information element */ ++ for (j = FIXED_IE; j < parsing_length;) { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr+ j); ++ ++ switch (pIE->ElementID) { ++ case _LINK_ID_IE_: ++ break; ++ case _CH_SWITCH_TIMING_: ++ _rtw_memcpy(&switch_time, pIE->data, 2); ++ if (switch_time > ptdls_sta->ch_switch_time) ++ _rtw_memcpy(&ptdls_sta->ch_switch_time, &switch_time, 2); ++ ++ _rtw_memcpy(&switch_timeout, pIE->data + 2, 2); ++ if (switch_timeout > ptdls_sta->ch_switch_timeout) ++ _rtw_memcpy(&ptdls_sta->ch_switch_timeout, &switch_timeout, 2); ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ } ++ ++ if ((pmlmeext->cur_channel == rtw_get_oper_ch(padapter)) && ++ (pchsw_info->ch_sw_state & TDLS_WAIT_CH_RSP_STATE)) { ++ if (ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_TO_OFF_CHNL); ++ } ++ ++exit: ++ return ret; ++} ++#endif /* CONFIG_TDLS_CH_SW */ ++ ++#ifdef CONFIG_WFD ++void wfd_ie_tdls(_adapter * padapter, u8 *pframe, u32 *pktlen ) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info *pwfd_info = padapter->tdlsinfo.wfd_info; ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 wfdielen = 0; ++ ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) ++ return; ++ ++ /* WFD OUI */ ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; /* WFA WFD v1.0 */ ++ ++ /* ++ * Commented by Albert 20110825 ++ * According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes ++ * 1. WFD Device Information ++ * 2. Associated BSSID ( Optional ) ++ * 3. Local IP Adress ( Optional ) ++ */ ++ ++ /* WFD Device Information ATTR */ ++ /* Type: */ ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ /* Length: */ ++ /* Note: In the WFD specification, the size of length field is 2. */ ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ /* Value1: */ ++ /* WFD device information */ ++ /* available for WFD session + Preferred TDLS + WSD ( WFD Service Discovery ) */ ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL ++ | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_WSD); ++ wfdielen += 2; ++ ++ /* Value2: */ ++ /* Session Management Control Port */ ++ /* Default TCP port for RTSP messages is 554 */ ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->tdls_rtsp_ctrlport); ++ wfdielen += 2; ++ ++ /* Value3: */ ++ /* WFD Device Maximum Throughput */ ++ /* 300Mbps is the maximum throughput */ ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ /* Associated BSSID ATTR */ ++ /* Type: */ ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ /* Length: */ ++ /* Note: In the WFD specification, the size of length field is 2. */ ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ /* Value: */ ++ /* Associated BSSID */ ++ if (check_fwstate( pmlmepriv, _FW_LINKED) == _TRUE) ++ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN); ++ else ++ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); ++ ++ /* Local IP Address ATTR */ ++ wfdie[ wfdielen++ ] = WFD_ATTR_LOCAL_IP_ADDR; ++ ++ /* Length: */ ++ /* Note: In the WFD specification, the size of length field is 2. */ ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0005); ++ wfdielen += 2; ++ ++ /* Version: */ ++ /* 0x01: Version1;IPv4 */ ++ wfdie[ wfdielen++ ] = 0x01; ++ ++ /* IPv4 Address */ ++ _rtw_memcpy( wfdie + wfdielen, pwfd_info->ip_address, 4 ); ++ wfdielen += 4; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, pktlen); ++ ++} ++#endif /* CONFIG_WFD */ ++ ++void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); ++ ++ int i = 0 ; ++ u32 time; ++ u8 *pframe_head; ++ ++ /* SNonce */ ++ if (pattrib->encrypt) { ++ for (i=0;i<8;i++) { ++ time=rtw_get_current_time(); ++ _rtw_memcpy(&ptdls_sta->SNonce[4*i], (u8 *)&time, 4); ++ } ++ } ++ ++ pframe_head = pframe; /* For rtw_tdls_set_ht_cap() */ ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ ++ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_sup_ch(&(padapter->mlmeextpriv), pframe, pattrib); ++ pframe = rtw_tdls_set_sup_reg_class(pframe, pattrib); ++ ++ if (pattrib->encrypt) ++ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); ++ ++ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); ++ ++ if (pattrib->encrypt) { ++ pframe = rtw_tdls_set_ftie(ptxmgmt ++ , pframe ++ , pattrib ++ , NULL ++ , ptdls_sta->SNonce); ++ ++ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); ++ } ++ ++#ifdef CONFIG_80211N_HT ++ /* Sup_reg_classes(optional) */ ++ if (pregistrypriv->ht_enable == _TRUE) ++ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); ++#endif ++ ++ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); ++ ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ if ((pregistrypriv->wmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) ++ pframe = rtw_tdls_set_qos_cap(pframe, pattrib); ++ ++#ifdef CONFIG_80211AC_VHT ++ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14) ++ && REGSTY_IS_11AC_ENABLE(pregistrypriv) ++ && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) ++ && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent)) ++ ) { ++ pframe = rtw_tdls_set_aid(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_vht_cap(padapter, pframe, pattrib); ++ } ++#endif ++ ++#ifdef CONFIG_WFD ++ if (padapter->wdinfo.wfd_tdls_enable == 1) ++ wfd_ie_tdls(padapter, pframe, &(pattrib->pktlen)); ++#endif ++ ++} ++ ++void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta; ++ u8 k; /* for random ANonce */ ++ u8 *pftie=NULL, *ptimeout_ie = NULL, *plinkid_ie = NULL, *prsnie = NULL, *pftie_mic = NULL; ++ u32 time; ++ u8 *pframe_head; ++ ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); ++ ++ if (ptdls_sta == NULL) ++ DBG_871X("[%s] %d ptdls_sta is NULL\n", __FUNCTION__, __LINE__); ++ ++ if (pattrib->encrypt && ptdls_sta != NULL) { ++ for (k=0;k<8;k++) { ++ time = rtw_get_current_time(); ++ _rtw_memcpy(&ptdls_sta->ANonce[4*k], (u8*)&time, 4); ++ } ++ } ++ ++ pframe_head = pframe; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); ++ ++ if (ptxmgmt->status_code != 0) { ++ DBG_871X("[%s] status_code:%04x \n", __FUNCTION__, ptxmgmt->status_code); ++ return; ++ } ++ ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_sup_ch(&(padapter->mlmeextpriv), pframe, pattrib); ++ pframe = rtw_tdls_set_sup_reg_class(pframe, pattrib); ++ ++ if (pattrib->encrypt) { ++ prsnie = pframe; ++ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _FALSE, ptdls_sta); ++ } ++ ++ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); ++ ++ if (pattrib->encrypt) { ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) ++ wpa_tdls_generate_tpk(padapter, ptdls_sta); ++ ++ pftie = pframe; ++ pftie_mic = pframe+4; ++ pframe = rtw_tdls_set_ftie(ptxmgmt ++ , pframe ++ , pattrib ++ , ptdls_sta->ANonce ++ , ptdls_sta->SNonce); ++ ++ ptimeout_ie = pframe; ++ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _FALSE, ptdls_sta); ++ } ++ ++#ifdef CONFIG_80211N_HT ++ /* Sup_reg_classes(optional) */ ++ if (pregistrypriv->ht_enable == _TRUE) ++ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); ++#endif ++ ++ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); ++ ++ plinkid_ie = pframe; ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ ++ /* Fill FTIE mic */ ++ if (pattrib->encrypt && rtw_tdls_is_driver_setup(padapter) == _TRUE) ++ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); ++ ++ if ((pregistrypriv->wmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) ++ pframe = rtw_tdls_set_qos_cap(pframe, pattrib); ++ ++#ifdef CONFIG_80211AC_VHT ++ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14) ++ && REGSTY_IS_11AC_ENABLE(pregistrypriv) ++ && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) ++ && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent)) ++ ) { ++ pframe = rtw_tdls_set_aid(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_vht_cap(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_vht_op_mode_notify(padapter, pframe, pattrib, pmlmeext->cur_bwmode); ++ } ++#endif ++ ++#ifdef CONFIG_WFD ++ if (padapter->wdinfo.wfd_tdls_enable) ++ wfd_ie_tdls(padapter, pframe, &(pattrib->pktlen)); ++#endif ++ ++} ++ ++void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); ++ ++ unsigned int ie_len; ++ unsigned char *p; ++ u8 wmm_param_ele[24] = {0}; ++ u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ ++ if (ptxmgmt->status_code!=0) ++ return; ++ ++ if (pattrib->encrypt) { ++ prsnie = pframe; ++ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); ++ } ++ ++ if (pattrib->encrypt) { ++ pftie = pframe; ++ pftie_mic = pframe+4; ++ pframe = rtw_tdls_set_ftie(ptxmgmt ++ , pframe ++ , pattrib ++ , ptdls_sta->ANonce ++ , ptdls_sta->SNonce); ++ ++ ptimeout_ie = pframe; ++ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); ++ ++ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { ++ /* Start TPK timer */ ++ ptdls_sta->TPK_count=0; ++ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); ++ } ++ } ++ ++ /* HT operation; todo */ ++ ++ plinkid_ie = pframe; ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ if (pattrib->encrypt && (rtw_tdls_is_driver_setup(padapter) == _TRUE)) ++ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); ++ ++ if (ptdls_sta->qos_option == _TRUE) ++ pframe = rtw_tdls_set_wmm_params(padapter, pframe, pattrib); ++ ++#ifdef CONFIG_80211AC_VHT ++ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) ++ && (ptdls_sta->vhtpriv.vht_option == _TRUE) && (pmlmeext->cur_channel > 14) ++ && REGSTY_IS_11AC_ENABLE(pregistrypriv) ++ && hal_chk_proto_cap(padapter, PROTO_CAP_11AC) ++ && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent)) ++ ) { ++ pframe = rtw_tdls_set_vht_operation(padapter, pframe, pattrib, pmlmeext->cur_channel); ++ pframe = rtw_tdls_set_vht_op_mode_notify(padapter, pframe, pattrib, pmlmeext->cur_bwmode); ++ } ++#endif ++} ++ ++void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); ++ u8 *pftie = NULL, *pftie_mic = NULL, *plinkid_ie = NULL; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); ++ ++ if (pattrib->encrypt) { ++ pftie = pframe; ++ pftie_mic = pframe + 4; ++ pframe = rtw_tdls_set_ftie(ptxmgmt ++ , pframe ++ , pattrib ++ , ptdls_sta->ANonce ++ , ptdls_sta->SNonce); ++ } ++ ++ plinkid_ie = pframe; ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ if (pattrib->encrypt && (rtw_tdls_is_driver_setup(padapter) == _TRUE)) ++ wpa_tdls_teardown_ftie_mic(ptdls_sta->tpk.kck, plinkid_ie, ptxmgmt->status_code, 1, 4, pftie, pftie_mic); ++} ++ ++void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++} ++ ++void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, u8 privacy) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 *pframe_head, pktlen_index; ++ ++ pktlen_index = pattrib->pktlen; ++ pframe_head = pframe; ++ ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_PUBLIC); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); ++ ++ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); ++ ++ pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); ++ ++ if (privacy) ++ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, NULL); ++ ++ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); ++ ++ if (privacy) { ++ pframe = rtw_tdls_set_ftie(ptxmgmt, pframe, pattrib, NULL, NULL); ++ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, NULL); ++ } ++ ++#ifdef CONFIG_80211N_HT ++ if (pregistrypriv->ht_enable == _TRUE) ++ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head - pktlen_index, pattrib); ++#endif ++ ++ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ ++} ++ ++ ++void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 AC_queue=0; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ /* PTI control */ ++ /* PU buffer status */ ++ if (ptdls_sta->uapsd_bk & BIT(1)) ++ AC_queue=BIT(0); ++ if (ptdls_sta->uapsd_be & BIT(1)) ++ AC_queue=BIT(1); ++ if (ptdls_sta->uapsd_vi & BIT(1)) ++ AC_queue=BIT(2); ++ if (ptdls_sta->uapsd_vo & BIT(1)) ++ AC_queue=BIT(3); ++ pframe = rtw_set_ie(pframe, _PTI_BUFFER_STATUS_, 1, &AC_queue, &(pattrib->pktlen)); ++ ++} ++ ++void rtw_build_tdls_peer_traffic_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++} ++ ++#ifdef CONFIG_TDLS_CH_SW ++void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ u16 switch_time = TDLS_CH_SWITCH_TIME * 1000, switch_timeout = TDLS_CH_SWITCH_TIMEOUT * 1000; ++ ++ ptdls_sta->ch_switch_time=switch_time; ++ ptdls_sta->ch_switch_timeout=switch_timeout; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_target_ch(padapter, pframe, pattrib); ++ pframe = rtw_tdls_set_reg_class(pframe, pattrib, ptdls_sta); ++ ++ if (ptdlsinfo->chsw_info.ch_offset != HAL_PRIME_CHNL_OFFSET_DONT_CARE) { ++ switch (ptdlsinfo->chsw_info.ch_offset) { ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ pframe = rtw_tdls_set_second_channel_offset(pframe, pattrib, SCA); ++ break; ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ pframe = rtw_tdls_set_second_channel_offset(pframe, pattrib, SCB); ++ break; ++ } ++ } ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ pframe = rtw_tdls_set_ch_sw(pframe, pattrib, ptdls_sta); ++ ++} ++ ++void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); ++ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); ++ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); ++ ++ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _FALSE); ++ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) ++ pframe = rtw_tdls_set_linkid(pframe, pattrib, _TRUE); ++ ++ pframe = rtw_tdls_set_ch_sw(pframe, pattrib, ptdls_sta); ++} ++#endif ++ ++#ifdef CONFIG_WFD ++void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; ++ u8 category = RTW_WLAN_CATEGORY_P2P; ++ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; ++ u8 probe_req = 4; ++ u8 wfdielen = 0; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(probe_req), &(pattrib->pktlen)); ++ ++ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { ++ wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } else if (!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) { ++ wfdielen = build_probe_req_wfd_ie(pbuddy_wdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++ ++} ++ ++void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; ++ u8 category = RTW_WLAN_CATEGORY_P2P; ++ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; ++ u8 probe_rsp = 5; ++ u8 wfdielen = 0; ++ ++ pframe = rtw_tdls_set_payload_type(pframe, pattrib); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(probe_rsp), &(pattrib->pktlen)); ++ ++ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { ++ wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe, 1); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } else if (!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) { ++ wfdielen = build_probe_resp_wfd_ie(pbuddy_wdinfo, pframe, 1); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++ ++} ++#endif /* CONFIG_WFD */ ++ ++void _tdls_tpk_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ struct tdls_txmgmt txmgmt; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ ptdls_sta->TPK_count++; ++ /* TPK_timer expired in a second */ ++ /* Retry timer should set at least 301 sec. */ ++ if (ptdls_sta->TPK_count >= (ptdls_sta->TDLS_PeerKey_Lifetime - 3)) { ++ DBG_871X("[TDLS] %s, Re-Setup TDLS link with "MAC_FMT" since TPK lifetime expires!\n", __FUNCTION__, MAC_ARG(ptdls_sta->hwaddr)); ++ ptdls_sta->TPK_count=0; ++ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); ++ issue_tdls_setup_req(ptdls_sta->padapter, &txmgmt, _FALSE); ++ } ++ ++ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); ++} ++ ++#ifdef CONFIG_TDLS_CH_SW ++void _tdls_ch_switch_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_END_TO_BASE_CHNL); ++ DBG_871X("[TDLS] %s, can't get traffic from op_ch:%d\n", __func__, rtw_get_oper_ch(padapter)); ++} ++ ++void _tdls_delay_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ ++ DBG_871X("[TDLS] %s, op_ch:%d, tdls_state:0x%08x\n", __func__, rtw_get_oper_ch(padapter), ptdls_sta->tdls_sta_state); ++ pchsw_info->delay_switch_back = _TRUE; ++} ++ ++void _tdls_stay_on_base_chnl_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ ++ if (ptdls_sta != NULL) { ++ issue_tdls_ch_switch_req(padapter, ptdls_sta); ++ pchsw_info->ch_sw_state |= TDLS_WAIT_CH_RSP_STATE; ++ } ++} ++ ++void _tdls_ch_switch_monitor_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_END); ++ DBG_871X("[TDLS] %s, does not receive ch sw req\n", __func__); ++} ++ ++#endif ++ ++void _tdls_handshake_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_txmgmt txmgmt; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); ++ txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; ++ ++ if (ptdls_sta != NULL) { ++ DBG_871X("[TDLS] Handshake time out\n"); ++ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) ++ { ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_TEARDOWN_STA); ++ } ++ else ++ { ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_TEARDOWN_STA_LOCALLY); ++ } ++ } ++} ++ ++void _tdls_pti_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_txmgmt txmgmt; ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); ++ txmgmt.status_code = _RSON_TDLS_TEAR_TOOFAR_; ++ ++ if (ptdls_sta != NULL) { ++ if (ptdls_sta->tdls_sta_state & TDLS_WAIT_PTR_STATE) { ++ DBG_871X("[TDLS] Doesn't receive PTR from peer dev:"MAC_FMT"; " ++ "Send TDLS Tear Down\n", MAC_ARG(ptdls_sta->hwaddr)); ++ issue_tdls_teardown(padapter, &txmgmt, _FALSE); ++ } ++ } ++} ++ ++void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->TPK_timer, padapter->pnetdev, _tdls_tpk_timer_hdl, psta); ++#ifdef CONFIG_TDLS_CH_SW ++ _init_timer(&psta->ch_sw_timer, padapter->pnetdev, _tdls_ch_switch_timer_hdl, psta); ++ _init_timer(&psta->delay_timer, padapter->pnetdev, _tdls_delay_timer_hdl, psta); ++ _init_timer(&psta->stay_on_base_chnl_timer, padapter->pnetdev, _tdls_stay_on_base_chnl_timer_hdl, psta); ++ _init_timer(&psta->ch_sw_monitor_timer, padapter->pnetdev, _tdls_ch_switch_monitor_timer_hdl, psta); ++#endif ++ _init_timer(&psta->handshake_timer, padapter->pnetdev, _tdls_handshake_timer_hdl, psta); ++ _init_timer(&psta->pti_timer, padapter->pnetdev, _tdls_pti_timer_hdl, psta); ++} ++ ++void rtw_free_tdls_timer(struct sta_info *psta) ++{ ++ _cancel_timer_ex(&psta->TPK_timer); ++#ifdef CONFIG_TDLS_CH_SW ++ _cancel_timer_ex(&psta->ch_sw_timer); ++ _cancel_timer_ex(&psta->delay_timer); ++ _cancel_timer_ex(&psta->stay_on_base_chnl_timer); ++ _cancel_timer_ex(&psta->ch_sw_monitor_timer); ++#endif ++ _cancel_timer_ex(&psta->handshake_timer); ++ _cancel_timer_ex(&psta->pti_timer); ++} ++ ++u8 update_sgi_tdls(_adapter *padapter, struct sta_info *psta) ++{ ++ return query_ra_short_GI(psta); ++} ++ ++u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta) ++{ ++ unsigned char sta_band = 0; ++ unsigned int tx_ra_bitmap=0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ ++ rtw_hal_update_sta_rate_mask(padapter, psta); ++ tx_ra_bitmap = psta->ra_mask; ++ ++ if (pcur_network->Configuration.DSConfig > 14) { ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_5N | WIRELESS_11A; ++ else ++ sta_band |= WIRELESS_11A; ++ } else { ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B; ++ else if (tx_ra_bitmap & 0xff0) ++ sta_band |= WIRELESS_11G |WIRELESS_11B; ++ else ++ sta_band |= WIRELESS_11B; ++ } ++ ++ psta->wireless_mode = sta_band; ++ ++ psta->raid = rtw_hal_networktype_to_raid(padapter,psta); ++ tx_ra_bitmap |= ((psta->raid<<28)&0xf0000000); ++ return tx_ra_bitmap; ++} ++ ++int rtw_tdls_is_driver_setup(_adapter *padapter) ++{ ++ return padapter->tdlsinfo.driver_setup; ++} ++ ++const char * rtw_tdls_action_txt(enum TDLS_ACTION_FIELD action) ++{ ++ switch (action) { ++ case TDLS_SETUP_REQUEST: ++ return "TDLS_SETUP_REQUEST"; ++ case TDLS_SETUP_RESPONSE: ++ return "TDLS_SETUP_RESPONSE"; ++ case TDLS_SETUP_CONFIRM: ++ return "TDLS_SETUP_CONFIRM"; ++ case TDLS_TEARDOWN: ++ return "TDLS_TEARDOWN"; ++ case TDLS_PEER_TRAFFIC_INDICATION: ++ return "TDLS_PEER_TRAFFIC_INDICATION"; ++ case TDLS_CHANNEL_SWITCH_REQUEST: ++ return "TDLS_CHANNEL_SWITCH_REQUEST"; ++ case TDLS_CHANNEL_SWITCH_RESPONSE: ++ return "TDLS_CHANNEL_SWITCH_RESPONSE"; ++ case TDLS_PEER_PSM_REQUEST: ++ return "TDLS_PEER_PSM_REQUEST"; ++ case TDLS_PEER_PSM_RESPONSE: ++ return "TDLS_PEER_PSM_RESPONSE"; ++ case TDLS_PEER_TRAFFIC_RESPONSE: ++ return "TDLS_PEER_TRAFFIC_RESPONSE"; ++ case TDLS_DISCOVERY_REQUEST: ++ return "TDLS_DISCOVERY_REQUEST"; ++ case TDLS_DISCOVERY_RESPONSE: ++ return "TDLS_DISCOVERY_RESPONSE"; ++ default: ++ return "UNKNOWN"; ++ } ++} ++ ++#endif /* CONFIG_TDLS */ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_vht.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_vht.c +old mode 100755 +new mode 100644 +index ce971d5..0bdc2a3 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_vht.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_vht.c +@@ -38,10 +38,10 @@ const u16 VHT_MCS_DATA_RATE[3][2][30] = + 90, 180, 270, 360, 540, 720, 810, 900, 1080, 1200}}, // Short GI, 40MHz + { {59, 117, 176, 234, 351, 468, 527, 585, 702, 780, + 117, 234, 351, 468, 702, 936, 1053, 1170, 1404, 1560, +- 176, 351, 527, 702, 1053, 1404, 1580, 1755, 2106, 2106}, // Long GI, 80MHz ++ 176, 351, 527, 702, 1053, 1404, 1580, 1755, 2106, 2340}, /* Long GI, 80MHz */ + {65, 130, 195, 260, 390, 520, 585, 650, 780, 867, + 130, 260, 390, 520, 780, 1040, 1170, 1300, 1560,1734, +- 195, 390, 585, 780, 1170, 1560, 1755, 1950, 2340, 2340} } // Short GI, 80MHz ++ 195, 390, 585, 780, 1170, 1560, 1755, 1950, 2340, 2600} } /* Short GI, 80MHz */ + }; + + u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map) +@@ -64,7 +64,7 @@ u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map) + } + } + +- //DBG_871X("HighestVHTMCSRate is %x\n", vht_mcs_rate); ++ /* DBG_871X("HighestVHTMCSRate is %x\n", vht_mcs_rate); */ + return vht_mcs_rate; + } + +@@ -88,7 +88,7 @@ u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map) + } + } + +- //DBG_871X("%s : %dSS\n", __FUNCTION__, nss); ++ /* DBG_871X("%s : %dSS\n", __FUNCTION__, nss); */ + return nss; + } + +@@ -119,9 +119,9 @@ void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map) + + u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate) + { +- if(vht_mcs_rate > MGN_VHT2SS_MCS9) +- vht_mcs_rate = MGN_VHT2SS_MCS9; +- ++ if(vht_mcs_rate > MGN_VHT3SS_MCS9) ++ vht_mcs_rate = MGN_VHT3SS_MCS9; ++ /* DBG_871X("bw=%d, short_GI=%d, ((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)=%d\n", bw, short_GI, ((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)); */ + return VHT_MCS_DATA_RATE[bw][short_GI][((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)]; + } + +@@ -133,7 +133,8 @@ void rtw_vht_use_default_setting(_adapter *padapter) + BOOLEAN bHwLDPCSupport = _FALSE, bHwSTBCSupport = _FALSE; + BOOLEAN bHwSupportBeamformer = _FALSE, bHwSupportBeamformee = _FALSE; + u8 rf_type = 0; +- ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + pvhtpriv->sgi_80m = TEST_FLAG(pregistrypriv->short_gi, BIT2) ? _TRUE : _FALSE; + + // LDPC support +@@ -174,10 +175,17 @@ void rtw_vht_use_default_setting(_adapter *padapter) + rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&bHwSupportBeamformer); + rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, (u8 *)&bHwSupportBeamformee); + CLEAR_FLAGS(pvhtpriv->beamform_cap); +- if(TEST_FLAG(pregistrypriv->beamform_cap, BIT0) && bHwSupportBeamformer) +- { +- SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); +- DBG_871X("[VHT] Support Beamformer\n"); ++ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT0) && bHwSupportBeamformer) { ++ #ifdef CONFIG_CONCURRENT_MODE ++ if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { ++ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ++ DBG_871X("[VHT] CONCURRENT AP Support Beamformer\n"); ++ } else ++ DBG_871X("[VHT] CONCURRENT not AP ;not allow Support Beamformer\n"); ++ #else ++ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ++ DBG_871X("[VHT] Support Beamformer\n"); ++ #endif + } + if(TEST_FLAG(pregistrypriv->beamform_cap, BIT1) && bHwSupportBeamformee) + { +@@ -189,10 +197,12 @@ void rtw_vht_use_default_setting(_adapter *padapter) + + rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); + +- if (rf_type == RF_1T1R) +- pvhtpriv->vht_mcs_map[0] = 0xfe; // Only support 1SS MCS 0~9; ++ if (rf_type == RF_3T3R) ++ pvhtpriv->vht_mcs_map[0] = 0xea; /* support 1SS MCS 0~9 2SS MCS 0~9 3SS MCS 0~9 */ ++ else if(rf_type == RF_2T2R) ++ pvhtpriv->vht_mcs_map[0] = 0xfa; /* support 1SS MCS 0~9 2SS MCS 0~9 */ + else +- pvhtpriv->vht_mcs_map[0] = 0xfa; //support 1SS MCS 0~9 2SS MCS 0~9 ++ pvhtpriv->vht_mcs_map[0] = 0xfe; /* Only support 1SS MCS 0~9; */ + pvhtpriv->vht_mcs_map[1] = 0xff; + + if(pregistrypriv->vht_rate_sel == 1) +@@ -235,19 +245,21 @@ void rtw_vht_use_default_setting(_adapter *padapter) + pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map); + } + +-u32 rtw_vht_rate_to_bitmap(u8 *pVHTRate) ++u64 rtw_vht_rate_to_bitmap(u8 *pVHTRate) + { + + u8 i,j , tmpRate; +- u32 RateBitmap = 0; ++ u64 RateBitmap = 0; ++ u8 Bits_3ss = 6; + +- for(i = j= 0; i < 4; i+=2, j+=10) ++ for(i = j= 0; i < Bits_3ss; i+=2, j+=10) + { ++ /* every two bits means single sptial stream */ + tmpRate = (pVHTRate[0] >> i) & 3; + + switch(tmpRate){ + case 2: +- RateBitmap = RateBitmap | (0x03ff << j); ++ RateBitmap = RateBitmap | (0x03ff << j); + break; + case 1: + RateBitmap = RateBitmap | (0x01ff << j); +@@ -261,7 +273,7 @@ u32 rtw_vht_rate_to_bitmap(u8 *pVHTRate) + break; + } + } +- ++ DBG_871X("RateBitmap=%016llx , pVHTRate[0]=%02x, pVHTRate[1]=%02x\n", RateBitmap, pVHTRate[0], pVHTRate[1]); + return RateBitmap; + } + +@@ -273,7 +285,8 @@ void update_sta_vht_info_apmode(_adapter *padapter, PVOID sta) + struct vht_priv *pvhtpriv_ap = &pmlmepriv->vhtpriv; + struct vht_priv *pvhtpriv_sta = &psta->vhtpriv; + struct ht_priv *phtpriv_sta = &psta->htpriv; +- u8 cur_ldpc_cap=0, cur_stbc_cap=0, cur_beamform_cap=0, bw_mode = 0; ++ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, bw_mode = 0; ++ u16 cur_beamform_cap = 0; + u8 *pcap_mcs; + + if (pvhtpriv_sta->vht_option == _FALSE) { +@@ -316,11 +329,14 @@ void update_sta_vht_info_apmode(_adapter *padapter, PVOID sta) + } + pvhtpriv_sta->stbc_cap = cur_stbc_cap; + ++#ifdef CONFIG_BEAMFORMING + // B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee + if (TEST_FLAG(pvhtpriv_ap->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && + GET_VHT_CAPABILITY_ELE_SU_BFEE(pvhtpriv_sta->vht_cap)) + { + SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); ++ /*Shift to BEAMFORMING_VHT_BEAMFORMER_STS_CAP*/ ++ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pvhtpriv_sta->vht_cap)<<8); + } + + // B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer +@@ -328,11 +344,14 @@ void update_sta_vht_info_apmode(_adapter *padapter, PVOID sta) + GET_VHT_CAPABILITY_ELE_SU_BFER(pvhtpriv_sta->vht_cap)) + { + SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ++ /*Shit to BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM*/ ++ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pvhtpriv_sta->vht_cap)<<12); + } + pvhtpriv_sta->beamform_cap = cur_beamform_cap; + if (cur_beamform_cap) { + DBG_871X("Current STA(%d) VHT Beamforming Setting = %02X\n", psta->aid, cur_beamform_cap); + } ++ #endif + + // B23 B24 B25 Maximum A-MPDU Length Exponent + pvhtpriv_sta->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pvhtpriv_sta->vht_cap); +@@ -364,7 +383,8 @@ void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) + struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- u8 cur_ldpc_cap=0, cur_stbc_cap=0, cur_beamform_cap=0, rf_type = RF_1T1R; ++ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, rf_type = RF_1T1R; ++ u16 cur_beamform_cap = 0; + u8 *pcap_mcs; + u8 vht_mcs[2]; + +@@ -395,12 +415,14 @@ void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) + DBG_871X("Current VHT STBC Setting = %02X\n", cur_stbc_cap); + } + pvhtpriv->stbc_cap = cur_stbc_cap; +- ++#ifdef CONFIG_BEAMFORMING + // B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee + if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && + GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) + { + SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); ++ /*Shift to BEAMFORMING_VHT_BEAMFORMER_STS_CAP*/ ++ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pIE->data)<<8); + } + + // B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer +@@ -408,12 +430,15 @@ void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) + GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) + { + SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ++ /*Shit to BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM*/ ++ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pIE->data)<<12); ++ + } + pvhtpriv->beamform_cap = cur_beamform_cap; + if (cur_beamform_cap) { + DBG_871X("Current VHT Beamforming Setting = %02X\n", cur_beamform_cap); + } +- ++ #endif + // B23 B24 B25 Maximum A-MPDU Length Exponent + pvhtpriv->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pIE->data); + +@@ -425,6 +450,8 @@ void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) + vht_mcs[0] |= 0xfc; + else if (rf_type == RF_2T2R) + vht_mcs[0] |= 0xf0; ++ else if (rf_type == RF_3T3R) ++ vht_mcs[0] |= 0xc0; + + _rtw_memcpy(pvhtpriv->vht_mcs_map, vht_mcs, 2); + +@@ -447,6 +474,7 @@ void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct registry_priv *regsty = adapter_to_regsty(padapter); + u8 target_bw; + u8 target_rxss, current_rxss; + u8 update_ra = _FALSE; +@@ -459,7 +487,9 @@ void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta) + target_rxss = (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe)+1); + + if (target_bw != psta->bw_mode) { +- if (target_bw <= (padapter->registrypriv.bw_mode >> 4)) { ++ if (hal_is_bw_support(padapter, target_bw) ++ && REGSTY_IS_BW_5G_SUPPORT(regsty, target_bw) ++ ) { + update_ra = _TRUE; + psta->bw_mode = target_bw; + } +@@ -486,21 +516,22 @@ u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; + //struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- u8 ChnlWidth, center_freq, bw_mode; ++ u8 ChnlWidth, center_freq, bw_mode, rf_type = 0; + u32 len = 0; + u8 operation[5]; +- ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ + _rtw_memset(operation, 0, 5); + +- bw_mode = pregistrypriv->bw_mode >> 4; ++ bw_mode = REGSTY_BW_5G(pregistrypriv); /* TODO: control op bw with other info */ + +- if (bw_mode >= CHANNEL_WIDTH_80) +- { ++ if (hal_chk_bw_cap(padapter, BW_CAP_80M | BW_CAP_160M) ++ && REGSTY_BW_5G(pregistrypriv) >= CHANNEL_WIDTH_80 ++ ) { + center_freq = rtw_get_center_ch(channel, bw_mode, HAL_PRIME_CHNL_OFFSET_LOWER); + ChnlWidth = 1; +- } +- else +- { ++ } else { + center_freq = 0; + ChnlWidth = 0; + } +@@ -510,8 +541,35 @@ u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel) + //center frequency + SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(operation, center_freq);//Todo: need to set correct center channel + SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(operation,0); +- operation[3] = 0xff; ++ ++ if (padapter->registrypriv.rf_config != RF_MAX_TYPE) ++ rf_type = padapter->registrypriv.rf_config; ++ ++ switch (rf_type) { ++ case RF_1T1R: ++ operation[3] = 0xfe; + operation[4] = 0xff; ++ break; ++ case RF_1T2R: ++ case RF_2T2R: ++ case RF_2T2R_GREEN: ++ operation[3] = 0xfa; ++ operation[4] = 0xff; ++ break; ++ case RF_2T3R: ++ case RF_2T4R: ++ case RF_3T3R: ++ case RF_3T4R: ++ operation[3] = 0xea; ++ operation[4] = 0xff; ++ break; ++ case RF_4T4R: ++ operation[3] = 0xaa; ++ operation[4] = 0xff; ++ break; ++ default: ++ DBG_871X("%s, %d, unknown rf type\n", __func__, __LINE__); ++ } + + rtw_set_ie(pbuf, EID_VHTOperation, 5, operation, &len); + +@@ -530,10 +588,12 @@ u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw) + chnl_width = bw; + + rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); +- if(rf_type == RF_1T1R) +- rx_nss = 1; +- else ++ if(rf_type == RF_3T3R) ++ rx_nss = 3; ++ else if(rf_type == RF_2T2R) + rx_nss = 2; ++ else ++ rx_nss = 1; + + SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&opmode, chnl_width); + SET_VHT_OPERATING_MODE_FIELD_RX_NSS(&opmode, (rx_nss-1)); +@@ -548,7 +608,7 @@ u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw) + + u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf) + { +- u8 bw, rf_type; ++ u8 bw, rf_type, rf_num, rx_stbc_nss = 0; + u16 HighestRate; + u8 *pcap, *pcap_mcs; + u32 len = 0; +@@ -558,9 +618,19 @@ u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf) + + pcap = pvhtpriv->vht_cap; + _rtw_memset(pcap, 0, 32); +- +- // B2 B3 Supported Channel Width Set +- SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 0); //indicate we don't support neither 160M nor 80+80M bandwidth. ++ ++ /* B0 B1 Maximum MPDU Length */ ++ SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 2); ++ ++ /* B2 B3 Supported Channel Width Set */ ++ if (hal_chk_bw_cap(padapter, BW_CAP_160M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_160)) { ++ if (hal_chk_bw_cap(padapter, BW_CAP_80_80M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_80_80)) ++ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 2); ++ else ++ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 1); ++ } else { ++ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 0); ++ } + + // B4 Rx LDPC + if(TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX)) +@@ -583,29 +653,25 @@ u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf) + // B8 B9 B10 Rx STBC + if(TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX)) + { +- rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); +- if ((rf_type == RF_2T2R) || (rf_type == RF_1T2R)) { +- SET_VHT_CAPABILITY_ELE_RX_STBC(pcap, 2); +- } +- else if (rf_type == RF_1T1R) { +- SET_VHT_CAPABILITY_ELE_RX_STBC(pcap, 1); +- } ++ rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)(&rx_stbc_nss)); ++ ++ SET_VHT_CAPABILITY_ELE_RX_STBC(pcap, rx_stbc_nss); + } + + // B11 SU Beamformer Capable +- if(TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) +- { ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { + SET_VHT_CAPABILITY_ELE_SU_BFER(pcap, 1); + // B16 17 18 Number of Sounding Dimensions +- SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(pcap, 1); ++ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); ++ SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(pcap, rf_num); + } + + // B12 SU Beamformee Capable +- if(TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) +- { ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) { + SET_VHT_CAPABILITY_ELE_SU_BFEE(pcap, 1); + // B13 14 15 Compressed Steering Number of Beamformer Antennas Supported +- SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(pcap, 1); ++ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); ++ SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(pcap, rf_num); + } + + // B19 MU Beamformer Capable +@@ -634,9 +700,11 @@ u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf) + pcap_mcs = GET_VHT_CAPABILITY_ELE_TX_MCS(pcap); + _rtw_memcpy(pcap_mcs, pvhtpriv->vht_mcs_map, 2); + +- bw = (pregistrypriv->bw_mode >> 4); ++ /* find the largest bw supported by both registry and hal */ ++ bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv)); ++ + HighestRate = VHT_MCS_DATA_RATE[bw][pvhtpriv->sgi_80m][((pvhtpriv->vht_highest_rate - MGN_VHT1SS_MCS0)&0x3f)]; +- HighestRate = (HighestRate+1) >> 1; ++ HighestRate = (HighestRate+1) >> 1; + + SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(pcap, HighestRate); //indicate we support highest rx rate is 600Mbps. + SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(pcap, HighestRate); //indicate we support highest tx rate is 600Mbps. +@@ -690,7 +758,8 @@ u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_le + pframe = rtw_set_ie(out_ie+out_len, EID_VHTOperation, ielen, p+2 , pout_len); + } + +- notify_bw = pregistrypriv->bw_mode >> 4; ++ /* find the largest bw supported by both registry and hal */ ++ notify_bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv)); + + if (notify_bw > operation_bw) + notify_bw = operation_bw; +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wapi.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wapi.c +old mode 100755 +new mode 100644 +index d4835da..cf4a995 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wapi.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wapi.c +@@ -1,1326 +1,1326 @@ +-#ifdef CONFIG_WAPI_SUPPORT +- +-#include +-#include +-#include +-#include +- +- +-u32 wapi_debug_component = +-// WAPI_INIT | +-// WAPI_API | +-// WAPI_TX | +-// WAPI_RX | +- WAPI_ERR ; //always open err flags on +- +-void WapiFreeAllStaInfo(_adapter *padapter) +-{ +- PRT_WAPI_T pWapiInfo; +- PRT_WAPI_STA_INFO pWapiStaInfo; +- PRT_WAPI_BKID pWapiBkid; +- +- WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); +- pWapiInfo = &padapter->wapiInfo; +- +- //Pust to Idle List +- rtw_wapi_return_all_sta_info(padapter); +- +- //Sta Info List +- while(!list_empty(&(pWapiInfo->wapiSTAIdleList))) +- { +- pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list); +- list_del_init(&pWapiStaInfo->list); +- } +- +- //BKID List +- while(!list_empty(&(pWapiInfo->wapiBKIDIdleList))) +- { +- pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list); +- list_del_init(&pWapiBkid->list); +- } +- WAPI_TRACE(WAPI_INIT, "<=========== %s\n", __FUNCTION__); +- return; +-} +- +-void WapiSetIE(_adapter *padapter) +-{ +- PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); +- //PRT_WAPI_BKID pWapiBkid; +- u16 protocolVer = 1; +- u16 akmCnt = 1; +- u16 suiteCnt = 1; +- u16 capability = 0; +- u8 OUI[3]; +- +- OUI[0] = 0x00; +- OUI[1] = 0x14; +- OUI[2] = 0x72; +- +- pWapiInfo->wapiIELength = 0; +-//protocol version +- memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &protocolVer, 2); +- pWapiInfo->wapiIELength +=2; +-//akm +- memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &akmCnt, 2); +- pWapiInfo->wapiIELength +=2; +- +- if(pWapiInfo->bWapiPSK){ +- memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); +- pWapiInfo->wapiIELength +=3; +- pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x2; +- pWapiInfo->wapiIELength +=1; +- }else{ +- memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); +- pWapiInfo->wapiIELength +=3; +- pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; +- pWapiInfo->wapiIELength +=1; +- } +- +-//usk +- memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &suiteCnt, 2); +- pWapiInfo->wapiIELength +=2; +- memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); +- pWapiInfo->wapiIELength +=3; +- pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; +- pWapiInfo->wapiIELength +=1; +- +-//msk +- memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); +- pWapiInfo->wapiIELength +=3; +- pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; +- pWapiInfo->wapiIELength +=1; +- +-//Capbility +- memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &capability, 2); +- pWapiInfo->wapiIELength +=2; +-} +- +- +-/* PN1 > PN2, return 1, +- * else return 0. +- */ +-u32 WapiComparePN(u8 *PN1, u8 *PN2) +-{ +- char i; +- +- if ((NULL == PN1) || (NULL == PN2)) +- return 1; +- +- // overflow case +- if ((PN2[15] - PN1[15]) & 0x80) +- return 1; +- +- for (i=16; i>0; i--) +- { +- if(PN1[i-1] == PN2[i-1]) +- continue; +- else if(PN1[i-1] > PN2[i-1]) +- return 1; +- else +- return 0; +- } +- +- return 0; +-} +- +-u8 +-WapiGetEntryForCamWrite(_adapter *padapter,u8 *pMacAddr,u8 KID,BOOLEAN IsMsk) +-{ +- PRT_WAPI_T pWapiInfo=NULL; +- //PRT_WAPI_CAM_ENTRY pEntry=NULL; +- u8 i=0; +- u8 ret = 0xff; +- +- WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); +- +- pWapiInfo = &padapter->wapiInfo; +- +- //exist? +- for(i=0;iwapiCamEntry[i].IsUsed +- && (_rtw_memcmp(pMacAddr, pWapiInfo->wapiCamEntry[i].PeerMacAddr, ETH_ALEN) == _TRUE) +- && pWapiInfo->wapiCamEntry[i].keyidx == KID +- && pWapiInfo->wapiCamEntry[i].type == IsMsk) +- { +- ret = pWapiInfo->wapiCamEntry[i].entry_idx; //cover it +- break; +- } +- } +- +- if(i == WAPI_CAM_ENTRY_NUM) //not found +- { +- for(i=0;iwapiCamEntry[i].IsUsed == 0) +- { +- pWapiInfo->wapiCamEntry[i].IsUsed = 1; +- pWapiInfo->wapiCamEntry[i].type = IsMsk; +- pWapiInfo->wapiCamEntry[i].keyidx = KID; +- _rtw_memcpy(pWapiInfo->wapiCamEntry[i].PeerMacAddr, pMacAddr,ETH_ALEN); +- ret = pWapiInfo->wapiCamEntry[i].entry_idx; +- break; +- } +- } +- } +- +- WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); +- return ret; +- +-/* +- if(RTIsListEmpty(&pWapiInfo->wapiCamIdleList)){ +- RT_TRACE(COMP_SEC,DBG_LOUD,("No Entry for wapi!!!\n")); +- return 0; +- } +- +- pEntry = (PRT_WAPI_CAM_ENTRY)RTRemoveHeadList(&pWapiInfo->wapiCamIdleList); +- RTInsertTailList(&pWapiInfo->wapiCamUsedList, &pEntry->list); +- +- RT_TRACE(COMP_SEC,DBG_LOUD,("<====WapiGetCamEntry(),Get Entry Idx:%d.but we just return 4 for test\n",pEntry->entry_idx)); +- +- return pEntry->entry_idx;*/ +-} +- +-u8 WapiGetEntryForCamClear(_adapter *padapter,u8 *pPeerMac,u8 keyid,u8 IsMsk) +-{ +- PRT_WAPI_T pWapiInfo=NULL; +- u8 i=0; +- +- WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); +- +- pWapiInfo = &padapter->wapiInfo; +- +- for(i=0;iwapiCamEntry[i].IsUsed +- && (_rtw_memcmp(pPeerMac, pWapiInfo->wapiCamEntry[i].PeerMacAddr, ETH_ALEN) == _TRUE) +- && pWapiInfo->wapiCamEntry[i].keyidx == keyid +- && pWapiInfo->wapiCamEntry[i].type == IsMsk) +- { +- pWapiInfo->wapiCamEntry[i].IsUsed = 0; +- pWapiInfo->wapiCamEntry[i].keyidx = 2; +- _rtw_memset(pWapiInfo->wapiCamEntry[i].PeerMacAddr,0,ETH_ALEN); +- +- WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); +- return pWapiInfo->wapiCamEntry[i].entry_idx; +- } +- } +- +- WAPI_TRACE(WAPI_API,"<====WapiGetReturnCamEntry(), No this cam entry.\n"); +- return 0xff; +-/* +- if(RTIsListEmpty(&pWapiInfo->wapiCamUsedList)){ +- RT_TRACE(COMP_SEC,DBG_LOUD,("No Entry for wapi!!!\n")); +- return FALSE; +- } +- +- pList = &pWapiInfo->wapiCamUsedList; +- while(pList->Flink != &pWapiInfo->wapiCamUsedList) +- { +- pEntry = (PRT_WAPI_CAM_ENTRY)pList->Flink; +- if(PlatformCompareMemory(pPeerMac,pEntry->PeerMacAddr, ETHER_ADDRLEN)== 0 +- && keyid == pEntry->keyidx) +- { +- RTRemoveEntryList(pList); +- RTInsertHeadList(&pWapiInfo->wapiCamIdleList, pList); +- return pEntry->entry_idx; +- } +- pList = pList->Flink; +- } +- +- return 0; +-*/ +-} +- +-void +-WapiResetAllCamEntry(_adapter *padapter) +-{ +- PRT_WAPI_T pWapiInfo; +- int i; +- +- WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); +- +- pWapiInfo = &padapter->wapiInfo; +- +- for (i=0;iwapiCamEntry[i].PeerMacAddr, 0, ETH_ALEN); +- pWapiInfo->wapiCamEntry[i].IsUsed = 0; +- pWapiInfo->wapiCamEntry[i].keyidx = 2; //invalid +- pWapiInfo->wapiCamEntry[i].entry_idx = 4+i*2; +- } +- +- WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); +- +- return; +-} +- +-u8 WapiWriteOneCamEntry( +- _adapter *padapter, +- u8 *pMacAddr, +- u8 KeyId, +- u8 EntryId, +- u8 EncAlg, +- u8 bGroupKey, +- u8 *pKey +-) +-{ +- u8 retVal = 0; +- u16 usConfig = 0; +- +- WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); +- +- if(EntryId >= 32) +- { +- WAPI_TRACE(WAPI_ERR, "<=== CamAddOneEntry(): ulKeyId exceed!\n"); +- return retVal; +- } +- +- usConfig=usConfig|(0x01<<15)|((u16)(EncAlg)<<2)|(KeyId); +- +- if(EncAlg == _SMS4_ ) +- { +- if(bGroupKey == 1) +- usConfig |= (0x01<<6); +- if((EntryId % 2)==1) // ==0 sec key; == 1mic key +- usConfig |= (0x01<<5); +- } +- +- write_cam(padapter, EntryId, usConfig, pMacAddr, pKey); +- +- WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); +- return 1; +-} +- +-void rtw_wapi_init(_adapter *padapter) +-{ +- PRT_WAPI_T pWapiInfo; +- int i; +- +- WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); +- RT_ASSERT_RET(padapter); +- +- if (!padapter->WapiSupport) +- { +- WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); +- return; +- } +- +- pWapiInfo = &padapter->wapiInfo; +- pWapiInfo->bWapiEnable = false; +- +- //Init BKID List +- INIT_LIST_HEAD(&pWapiInfo->wapiBKIDIdleList); +- INIT_LIST_HEAD(&pWapiInfo->wapiBKIDStoreList); +- for(i=0;iwapiBKID[i].list, &pWapiInfo->wapiBKIDIdleList); +- } +- +- //Init STA List +- INIT_LIST_HEAD(&pWapiInfo->wapiSTAIdleList); +- INIT_LIST_HEAD(&pWapiInfo->wapiSTAUsedList); +- for(i=0;iwapiSta[i].list, &pWapiInfo->wapiSTAIdleList); +- } +- +- for (i=0;iwapiCamEntry[i].IsUsed = 0; +- pWapiInfo->wapiCamEntry[i].keyidx = 2; //invalid +- pWapiInfo->wapiCamEntry[i].entry_idx = 4+i*2; +- } +- +- WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); +-} +- +-void rtw_wapi_free(_adapter *padapter) +-{ +- WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); +- RT_ASSERT_RET(padapter); +- +- if (!padapter->WapiSupport) +- { +- WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); +- return; +- } +- +- WapiFreeAllStaInfo(padapter); +- +- WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); +-} +- +-void rtw_wapi_disable_tx(_adapter *padapter) +-{ +- WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); +- RT_ASSERT_RET(padapter); +- +- if (!padapter->WapiSupport) +- { +- WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); +- return; +- } +- +- padapter->wapiInfo.wapiTxMsk.bTxEnable = false; +- padapter->wapiInfo.wapiTxMsk.bSet = false; +- +- WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); +-} +- +-u8 rtw_wapi_is_wai_packet(_adapter* padapter,u8 *pkt_data) +-{ +- PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- PRT_WAPI_STA_INFO pWapiSta = NULL; +- u8 WaiPkt = 0, *pTaddr, bFind = false; +- u8 Offset_TypeWAI = 0 ; // (mac header len + llc length) +- +- WAPI_TRACE(WAPI_TX|WAPI_RX, "===========> %s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) +- { +- WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); +- return 0; +- } +- +- Offset_TypeWAI = 24 + 6 ; +- +- //YJ,add,091103. Data frame may also have skb->data[30]=0x88 and skb->data[31]=0xb4. +- if ((pkt_data[1]&0x40) !=0) +- { +- //DBG_871X("data is privacy \n"); +- return 0; +- } +- +- pTaddr = GetAddr2Ptr(pkt_data); +- if(list_empty(&pWapiInfo->wapiSTAUsedList)){ +- bFind = false; +- }else{ +- list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ +- if (_rtw_memcmp(pTaddr, pWapiSta->PeerMacAddr, 6) == _TRUE) { +- bFind = true; +- break; +- } +- } +- } +- +- WAPI_TRACE(WAPI_TX|WAPI_RX, "%s: bFind=%d pTaddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(pTaddr)); +- +- if (pkt_data[0] == WIFI_QOS_DATA_TYPE) +- { +- Offset_TypeWAI += 2; +- } +- +- // 88b4? +- if( (pkt_data[Offset_TypeWAI]==0x88) && (pkt_data[Offset_TypeWAI+1]==0xb4) ){ +- WaiPkt = pkt_data[Offset_TypeWAI+5]; +- +- psecuritypriv->hw_decrypted = _TRUE; +- }else{ +- WAPI_TRACE(WAPI_TX|WAPI_RX, "%s(): non wai packet\n",__FUNCTION__); +- } +- +- WAPI_TRACE(WAPI_TX|WAPI_RX, "%s(): Recvd WAI frame. IsWAIPkt(%d)\n",__FUNCTION__, WaiPkt); +- +- return WaiPkt; +-} +- +- +-void rtw_wapi_update_info(_adapter *padapter, union recv_frame *precv_frame) +-{ +- PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); +- struct recv_frame_hdr *precv_hdr; +- u8 *ptr; +- u8 *pTA; +- u8 *pRecvPN; +- +- +- WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) +- { +- WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); +- return; +- } +- +- precv_hdr = &precv_frame->u.hdr; +- ptr = precv_hdr->rx_data; +- +- if (precv_hdr->attrib.qos == 1) +- { +- precv_hdr->UserPriority = GetTid(ptr); +- } +- else +- { +- precv_hdr->UserPriority = 0; +- } +- +- pTA = GetAddr2Ptr(ptr); +- _rtw_memcpy((u8 *)precv_hdr->WapiSrcAddr, pTA, 6); +- pRecvPN = ptr + precv_hdr->attrib.hdrlen + 2; +- _rtw_memcpy((u8 *)precv_hdr->WapiTempPN, pRecvPN, 16); +- +- WAPI_TRACE(WAPI_RX, "<========== %s\n", __FUNCTION__); +-} +- +-/**************************************************************************** +-TRUE-----------------Drop +-FALSE---------------- handle +-add to support WAPI to N-mode +-*****************************************************************************/ +-u8 rtw_wapi_check_for_drop( +- _adapter *padapter, +- union recv_frame *precv_frame +-) +-{ +- PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); +- u8 *pLastRecvPN = NULL; +- u8 bFind = false; +- PRT_WAPI_STA_INFO pWapiSta = NULL; +- u8 bDrop = false; +- struct recv_frame_hdr *precv_hdr = &precv_frame->u.hdr; +- u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; +- u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; +- u8 *ptr = precv_frame->u.hdr.rx_data; +- int i; +- +- WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) +- { +- WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); +- return false; +- } +- +- if(precv_hdr->bIsWaiPacket !=0) +- { +- if(precv_hdr->bIsWaiPacket== 0x8) +- { +- +- DBG_871X("rtw_wapi_check_for_drop: dump packet \n"); +- for(i=0;i<50;i++) +- { +- DBG_871X("%02X ",ptr[i]); +- if((i+1) %8 ==0) +- DBG_871X("\n"); +- } +- DBG_871X("\n rtw_wapi_check_for_drop: dump packet \n"); +- +- for(i=0;i<16;i++) +- { +- if(ptr[i+27] !=0) +- break; +- } +- +- if(i== 16) +- { +- WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: drop with zero BKID \n"); +- return true; +- } +- else +- { +- return false; +- } +- } +- else +- return false; +- } +- +- if(list_empty(&pWapiInfo->wapiSTAUsedList)){ +- bFind = false; +- }else{ +- list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { +- if (_rtw_memcmp(precv_hdr->WapiSrcAddr, pWapiSta->PeerMacAddr, ETH_ALEN) == _TRUE) { +- bFind = true; +- break; +- } +- } +- } +- WAPI_TRACE(WAPI_RX, "%s: bFind=%d prxb->WapiSrcAddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(precv_hdr->WapiSrcAddr)); +- +- if(bFind) +- { +- if(IS_MCAST(precv_hdr->attrib.ra)) +- { +- WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: multicast case \n"); +- pLastRecvPN = pWapiSta->lastRxMulticastPN; +- } +- else +- { +- WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: unicast case \n"); +- switch(precv_hdr->UserPriority) +- { +- case 0: +- case 3: +- pLastRecvPN = pWapiSta->lastRxUnicastPNBEQueue; +- break; +- case 1: +- case 2: +- pLastRecvPN = pWapiSta->lastRxUnicastPNBKQueue; +- break; +- case 4: +- case 5: +- pLastRecvPN = pWapiSta->lastRxUnicastPNVIQueue; +- break; +- case 6: +- case 7: +- pLastRecvPN = pWapiSta->lastRxUnicastPNVOQueue; +- break; +- default: +- WAPI_TRACE(WAPI_ERR,"%s: Unknown TID \n",__FUNCTION__); +- break; +- } +- } +- +- if(!WapiComparePN(precv_hdr->WapiTempPN,pLastRecvPN)) +- { +- WAPI_TRACE(WAPI_RX,"%s: Equal PN!!\n",__FUNCTION__); +- if(IS_MCAST(precv_hdr->attrib.ra)) +- _rtw_memcpy(pLastRecvPN,WapiAEMultiCastPNInitialValueSrc,16); +- else +- _rtw_memcpy(pLastRecvPN,WapiAEPNInitialValueSrc,16); +- bDrop = true; +- } +- else +- { +- _rtw_memcpy(pLastRecvPN,precv_hdr->WapiTempPN,16); +- } +- } +- +- WAPI_TRACE(WAPI_RX, "<========== %s\n", __FUNCTION__); +- return bDrop; +-} +- +-void rtw_build_probe_resp_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) +-{ +- PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); +- u8 WapiIELength = 0; +- +- WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) +- { +- WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); +- return; +- } +- +- WapiSetIE(padapter); +- WapiIELength = pWapiInfo->wapiIELength; +- pframe[0] = _WAPI_IE_; +- pframe[1] = WapiIELength; +- _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); +- pframe += WapiIELength+2; +- pattrib->pktlen += WapiIELength+2; +- +- WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); +-} +- +-void rtw_build_beacon_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) +-{ +- PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); +- u8 WapiIELength = 0; +- WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) +- { +- WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); +- return; +- } +- +- WapiSetIE(padapter); +- WapiIELength = pWapiInfo->wapiIELength; +- pframe[0] = _WAPI_IE_; +- pframe[1] = WapiIELength; +- _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); +- pframe += WapiIELength+2; +- pattrib->pktlen += WapiIELength+2; +- +- WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); +-} +- +-void rtw_build_assoc_req_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) +-{ +- PRT_WAPI_BKID pWapiBKID; +- u16 bkidNum; +- PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); +- u8 WapiIELength = 0; +- +- WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) +- { +- WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); +- return; +- } +- +- WapiSetIE(padapter); +- WapiIELength = pWapiInfo->wapiIELength; +- bkidNum = 0; +- if(!list_empty(&(pWapiInfo->wapiBKIDStoreList))){ +- list_for_each_entry(pWapiBKID, &pWapiInfo->wapiBKIDStoreList, list) { +- bkidNum ++; +- _rtw_memcpy(pWapiInfo->wapiIE+WapiIELength+2, pWapiBKID->bkid,16); +- WapiIELength += 16; +- } +- } +- _rtw_memcpy(pWapiInfo->wapiIE+WapiIELength, &bkidNum, 2); +- WapiIELength += 2; +- +- pframe[0] = _WAPI_IE_; +- pframe[1] = WapiIELength; +- _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); +- pframe += WapiIELength+2; +- pattrib->pktlen += WapiIELength+2; +- WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); +-} +- +-void rtw_wapi_on_assoc_ok(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) +-{ +- PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); +- PRT_WAPI_STA_INFO pWapiSta; +- u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; +- //u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; +- u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; +- +- WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) +- { +- WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); +- return; +- } +- +- pWapiSta =(PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list); +- list_del_init(&pWapiSta->list); +- list_add_tail(&pWapiSta->list, &pWapiInfo->wapiSTAUsedList); +- _rtw_memcpy(pWapiSta->PeerMacAddr,padapter->mlmeextpriv.mlmext_info.network.MacAddress,6); +- _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); +- _rtw_memcpy(pWapiSta->lastRxUnicastPN, WapiAEPNInitialValueSrc, 16); +- +- //For chenk PN error with Qos Data after s3: add by ylb 20111114 +- _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16); +- _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16); +- _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16); +- _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16); +- +- WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); +-} +- +- +-void rtw_wapi_return_one_sta_info(_adapter *padapter, u8 *MacAddr) +-{ +- PRT_WAPI_T pWapiInfo; +- PRT_WAPI_STA_INFO pWapiStaInfo = NULL; +- PRT_WAPI_BKID pWapiBkid = NULL; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- +- pWapiInfo = &padapter->wapiInfo; +- +- WAPI_TRACE(WAPI_API, "==========> %s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) +- { +- WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); +- return; +- } +- +- if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)) +- { +- while(!list_empty(&(pWapiInfo->wapiBKIDStoreList))) +- { +- pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list); +- list_del_init(&pWapiBkid->list); +- _rtw_memset(pWapiBkid->bkid,0,16); +- list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList); +- } +- } +- +- +- WAPI_TRACE(WAPI_API, " %s: after clear bkid \n", __FUNCTION__); +- +- +- //Remove STA info +- if(list_empty(&(pWapiInfo->wapiSTAUsedList))){ +- WAPI_TRACE(WAPI_API, " %s: wapiSTAUsedList is null \n", __FUNCTION__); +- return; +- }else{ +- +- WAPI_TRACE(WAPI_API, " %s: wapiSTAUsedList is not null \n", __FUNCTION__); +-#if 0 +- pWapiStaInfo=(PRT_WAPI_STA_INFO)list_entry((pWapiInfo->wapiSTAUsedList.next),RT_WAPI_STA_INFO,list); +- +- list_for_each_entry(pWapiStaInfo, &(pWapiInfo->wapiSTAUsedList), list) { +- +- DBG_871X("MAC Addr %02x-%02x-%02x-%02x-%02x-%02x \n",MacAddr[0],MacAddr[1],MacAddr[2],MacAddr[3],MacAddr[4],MacAddr[5]); +- +- +- DBG_871X("peer Addr %02x-%02x-%02x-%02x-%02x-%02x \n",pWapiStaInfo->PeerMacAddr[0],pWapiStaInfo->PeerMacAddr[1],pWapiStaInfo->PeerMacAddr[2],pWapiStaInfo->PeerMacAddr[3],pWapiStaInfo->PeerMacAddr[4],pWapiStaInfo->PeerMacAddr[5]); +- +- if(pWapiStaInfo == NULL) +- { +- WAPI_TRACE(WAPI_API, " %s: pWapiStaInfo == NULL Case \n", __FUNCTION__); +- return; +- } +- +- if(pWapiStaInfo->PeerMacAddr == NULL) +- { +- WAPI_TRACE(WAPI_API, " %s: pWapiStaInfo->PeerMacAddr == NULL Case \n", __FUNCTION__); +- return; +- } +- +- if(MacAddr == NULL) +- { +- WAPI_TRACE(WAPI_API, " %s: MacAddr == NULL Case \n", __FUNCTION__); +- return; +- } +- +- if (_rtw_memcmp(pWapiStaInfo->PeerMacAddr, MacAddr, ETH_ALEN) == _TRUE) { +- pWapiStaInfo->bAuthenticateInProgress = false; +- pWapiStaInfo->bSetkeyOk = false; +- _rtw_memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); +- list_del_init(&pWapiStaInfo->list); +- list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); +- break; +- } +- +- } +-#endif +- +- while(!list_empty(&(pWapiInfo->wapiSTAUsedList))) +- { +- pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAUsedList.next, RT_WAPI_STA_INFO, list); +- +- DBG_871X("peer Addr %02x-%02x-%02x-%02x-%02x-%02x \n",pWapiStaInfo->PeerMacAddr[0],pWapiStaInfo->PeerMacAddr[1],pWapiStaInfo->PeerMacAddr[2],pWapiStaInfo->PeerMacAddr[3],pWapiStaInfo->PeerMacAddr[4],pWapiStaInfo->PeerMacAddr[5]); +- +- list_del_init(&pWapiStaInfo->list); +- memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); +- pWapiStaInfo->bSetkeyOk = 0; +- list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); +- } +- +- } +- +- WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); +- return; +-} +- +-void rtw_wapi_return_all_sta_info(_adapter *padapter) +-{ +- PRT_WAPI_T pWapiInfo; +- PRT_WAPI_STA_INFO pWapiStaInfo; +- PRT_WAPI_BKID pWapiBkid; +- WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); +- +- pWapiInfo = &padapter->wapiInfo; +- +- if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) +- { +- WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); +- return; +- } +- +- //Sta Info List +- while(!list_empty(&(pWapiInfo->wapiSTAUsedList))) +- { +- pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAUsedList.next, RT_WAPI_STA_INFO, list); +- list_del_init(&pWapiStaInfo->list); +- memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); +- pWapiStaInfo->bSetkeyOk = 0; +- list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); +- } +- +- //BKID List +- while(!list_empty(&(pWapiInfo->wapiBKIDStoreList))) +- { +- pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list); +- list_del_init(&pWapiBkid->list); +- memset(pWapiBkid->bkid,0,16); +- list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList); +- } +- WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); +-} +- +-void rtw_wapi_clear_cam_entry(_adapter *padapter, u8 *pMacAddr) +-{ +- u8 UcIndex = 0; +- +- WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) +- { +- WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); +- return; +- } +- +- UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 0, 0); +- if(UcIndex != 0xff){ +- //CAM_mark_invalid(Adapter, UcIndex); +- CAM_empty_entry(padapter, UcIndex); +- } +- +- UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 1, 0); +- if(UcIndex != 0xff){ +- //CAM_mark_invalid(Adapter, UcIndex); +- CAM_empty_entry(padapter, UcIndex); +- } +- +- UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 0, 1); +- if(UcIndex != 0xff){ +- //CAM_mark_invalid(Adapter, UcIndex); +- CAM_empty_entry(padapter, UcIndex); +- } +- +- UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 1, 1); +- if(UcIndex != 0xff){ +- //CAM_mark_invalid(padapter, UcIndex); +- CAM_empty_entry(padapter, UcIndex); +- } +- +- WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); +-} +- +-void rtw_wapi_clear_all_cam_entry(_adapter *padapter) +-{ +- WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) +- { +- WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); +- return; +- } +- +- invalidate_cam_all(padapter); // is this ok? +- WapiResetAllCamEntry(padapter); +- +- WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); +-} +- +-void rtw_wapi_set_key(_adapter *padapter, RT_WAPI_KEY *pWapiKey, RT_WAPI_STA_INFO *pWapiSta, u8 bGroupKey, u8 bUseDefaultKey) +-{ +- PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; +- u8 *pMacAddr = pWapiSta->PeerMacAddr; +- u32 EntryId = 0; +- BOOLEAN IsPairWise = false ; +- u8 EncAlgo; +- +- WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) +- { +- WAPI_TRACE(WAPI_API, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); +- return; +- } +- +- EncAlgo = _SMS4_; +- +- //For Tx bc/mc pkt,use defualt key entry +- if(bUseDefaultKey) +- { +- // when WAPI update key, keyid will be 0 or 1 by turns. +- if (pWapiKey->keyId == 0) +- EntryId = 0; +- else +- EntryId = 2; +- } +- else +- { +- // tx/rx unicast pkt, or rx broadcast, find the key entry by peer's MacAddr +- EntryId = WapiGetEntryForCamWrite(padapter,pMacAddr,pWapiKey->keyId,bGroupKey); +- } +- +- if(EntryId == 0xff){ +- WAPI_TRACE(WAPI_API, "===>No entry for WAPI setkey! !!\n"); +- return; +- } +- +- //EntryId is also used to diff Sec key and Mic key +- //Sec Key +- WapiWriteOneCamEntry(padapter, +- pMacAddr, +- pWapiKey->keyId, //keyid +- EntryId, //entry +- EncAlgo, //type +- bGroupKey, //pairwise or group key +- pWapiKey->dataKey); +- //MIC key +- WapiWriteOneCamEntry(padapter, +- pMacAddr, +- pWapiKey->keyId, //keyid +- EntryId+1, //entry +- EncAlgo, //type +- bGroupKey, //pairwise or group key +- pWapiKey->micKey); +- +- WAPI_TRACE(WAPI_API, "Set Wapi Key :KeyId:%d,EntryId:%d,PairwiseKey:%d.\n",pWapiKey->keyId,EntryId,!bGroupKey); +- WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); +- +-} +- +-#if 0 +-//YJ,test,091013 +-void wapi_test_set_key(struct _adapter *padapter, u8* buf) +-{ /*Data: keyType(1) + bTxEnable(1) + bAuthenticator(1) + bUpdate(1) + PeerAddr(6) + DataKey(16) + MicKey(16) + KeyId(1)*/ +- PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; +- PRT_WAPI_BKID pWapiBkid; +- PRT_WAPI_STA_INFO pWapiSta; +- u8 data[43]; +- bool bTxEnable; +- bool bUpdate; +- bool bAuthenticator; +- u8 PeerAddr[6]; +- u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; +- u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; +- u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; +- +- WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__); +- +- if (!padapter->WapiSupport){ +- return; +- } +- +- copy_from_user(data, buf, 43); +- bTxEnable = data[1]; +- bAuthenticator = data[2]; +- bUpdate = data[3]; +- memcpy(PeerAddr,data+4,6); +- +- if(data[0] == 0x3){ +- if(!list_empty(&(pWapiInfo->wapiBKIDIdleList))){ +- pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list); +- list_del_init(&pWapiBkid->list); +- memcpy(pWapiBkid->bkid, data+10, 16); +- WAPI_DATA(WAPI_INIT, "SetKey - BKID", pWapiBkid->bkid, 16); +- list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDStoreList); +- } +- }else{ +- list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { +- if(!memcmp(pWapiSta->PeerMacAddr,PeerAddr,6)){ +- pWapiSta->bAuthenticatorInUpdata = false; +- switch(data[0]){ +- case 1: //usk +- if(bAuthenticator){ //authenticator +- memcpy(pWapiSta->lastTxUnicastPN,WapiAEPNInitialValueSrc,16); +- if(!bUpdate) { //first +- WAPI_TRACE(WAPI_INIT,"AE fisrt set usk \n"); +- pWapiSta->wapiUsk.bSet = true; +- memcpy(pWapiSta->wapiUsk.dataKey,data+10,16); +- memcpy(pWapiSta->wapiUsk.micKey,data+26,16); +- pWapiSta->wapiUsk.keyId = *(data+42); +- pWapiSta->wapiUsk.bTxEnable = true; +- WAPI_DATA(WAPI_INIT, "SetKey - AE USK Data Key", pWapiSta->wapiUsk.dataKey, 16); +- WAPI_DATA(WAPI_INIT, "SetKey - AE USK Mic Key", pWapiSta->wapiUsk.micKey, 16); +- } +- else //update +- { +- WAPI_TRACE(WAPI_INIT, "AE update usk \n"); +- pWapiSta->wapiUskUpdate.bSet = true; +- pWapiSta->bAuthenticatorInUpdata = true; +- memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16); +- memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16); +- memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16); +- memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16); +- memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16); +- memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16); +- memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16); +- pWapiSta->wapiUskUpdate.keyId = *(data+42); +- pWapiSta->wapiUskUpdate.bTxEnable = true; +- } +- } +- else{ +- if(!bUpdate){ +- WAPI_TRACE(WAPI_INIT,"ASUE fisrt set usk \n"); +- if(bTxEnable){ +- pWapiSta->wapiUsk.bTxEnable = true; +- memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); +- }else{ +- pWapiSta->wapiUsk.bSet = true; +- memcpy(pWapiSta->wapiUsk.dataKey,data+10,16); +- memcpy(pWapiSta->wapiUsk.micKey,data+26,16); +- pWapiSta->wapiUsk.keyId = *(data+42); +- pWapiSta->wapiUsk.bTxEnable = false; +- } +- }else{ +- WAPI_TRACE(WAPI_INIT,"ASUE update usk \n"); +- if(bTxEnable){ +- pWapiSta->wapiUskUpdate.bTxEnable = true; +- if(pWapiSta->wapiUskUpdate.bSet){ +- memcpy(pWapiSta->wapiUsk.dataKey,pWapiSta->wapiUskUpdate.dataKey,16); +- memcpy(pWapiSta->wapiUsk.micKey,pWapiSta->wapiUskUpdate.micKey,16); +- pWapiSta->wapiUsk.keyId=pWapiSta->wapiUskUpdate.keyId; +- memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16); +- memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16); +- memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16); +- memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16); +- memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16); +- pWapiSta->wapiUskUpdate.bTxEnable = false; +- pWapiSta->wapiUskUpdate.bSet = false; +- } +- memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); +- }else{ +- pWapiSta->wapiUskUpdate.bSet = true; +- memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16); +- memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16); +- pWapiSta->wapiUskUpdate.keyId = *(data+42); +- pWapiSta->wapiUskUpdate.bTxEnable = false; +- } +- } +- } +- break; +- case 2: //msk +- if(bAuthenticator){ //authenticator +- pWapiInfo->wapiTxMsk.bSet = true; +- memcpy(pWapiInfo->wapiTxMsk.dataKey,data+10,16); +- memcpy(pWapiInfo->wapiTxMsk.micKey,data+26,16); +- pWapiInfo->wapiTxMsk.keyId = *(data+42); +- pWapiInfo->wapiTxMsk.bTxEnable = true; +- memcpy(pWapiInfo->lastTxMulticastPN,WapiAEMultiCastPNInitialValueSrc,16); +- +- if(!bUpdate){ //first +- WAPI_TRACE(WAPI_INIT, "AE fisrt set msk \n"); +- if(!pWapiSta->bSetkeyOk) +- pWapiSta->bSetkeyOk = true; +- pWapiInfo->bFirstAuthentiateInProgress= false; +- }else{ //update +- WAPI_TRACE(WAPI_INIT,"AE update msk \n"); +- } +- +- WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Data Key", pWapiInfo->wapiTxMsk.dataKey, 16); +- WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Mic Key", pWapiInfo->wapiTxMsk.micKey, 16); +- } +- else{ +- if(!bUpdate){ +- WAPI_TRACE(WAPI_INIT,"ASUE fisrt set msk \n"); +- pWapiSta->wapiMsk.bSet = true; +- memcpy(pWapiSta->wapiMsk.dataKey,data+10,16); +- memcpy(pWapiSta->wapiMsk.micKey,data+26,16); +- pWapiSta->wapiMsk.keyId = *(data+42); +- pWapiSta->wapiMsk.bTxEnable = false; +- if(!pWapiSta->bSetkeyOk) +- pWapiSta->bSetkeyOk = true; +- pWapiInfo->bFirstAuthentiateInProgress= false; +- WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Data Key", pWapiSta->wapiMsk.dataKey, 16); +- WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Mic Key", pWapiSta->wapiMsk.micKey, 16); +- }else{ +- WAPI_TRACE(WAPI_INIT,"ASUE update msk \n"); +- pWapiSta->wapiMskUpdate.bSet = true; +- memcpy(pWapiSta->wapiMskUpdate.dataKey,data+10,16); +- memcpy(pWapiSta->wapiMskUpdate.micKey,data+26,16); +- pWapiSta->wapiMskUpdate.keyId = *(data+42); +- pWapiSta->wapiMskUpdate.bTxEnable = false; +- } +- } +- break; +- default: +- WAPI_TRACE(WAPI_ERR,"Unknown Flag \n"); +- break; +- } +- } +- } +- } +- WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__); +-} +- +- +-void wapi_test_init(struct _adapter *padapter) +-{ +- u8 keybuf[100]; +- u8 mac_addr[6]={0x00,0xe0,0x4c,0x72,0x04,0x70}; +- u8 UskDataKey[16]={0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f}; +- u8 UskMicKey[16]={0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f}; +- u8 UskId = 0; +- u8 MskDataKey[16]={0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f}; +- u8 MskMicKey[16]={0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f}; +- u8 MskId = 0; +- +- WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__); +- +- //Enable Wapi +- WAPI_TRACE(WAPI_INIT, "%s: Enable wapi!!!!\n", __FUNCTION__); +- padapter->wapiInfo.bWapiEnable = true; +- padapter->pairwise_key_type = KEY_TYPE_SMS4; +- ieee->group_key_type = KEY_TYPE_SMS4; +- padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; +- padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; +- +- //set usk +- WAPI_TRACE(WAPI_INIT, "%s: Set USK!!!!\n", __FUNCTION__); +- memset(keybuf,0,100); +- keybuf[0] = 1; //set usk +- keybuf[1] = 1; //enable tx +- keybuf[2] = 1; //AE +- keybuf[3] = 0; //not update +- +- memcpy(keybuf+4,mac_addr,6); +- memcpy(keybuf+10,UskDataKey,16); +- memcpy(keybuf+26,UskMicKey,16); +- keybuf[42]=UskId; +- wapi_test_set_key(padapter, keybuf); +- +- memset(keybuf,0,100); +- keybuf[0] = 1; //set usk +- keybuf[1] = 1; //enable tx +- keybuf[2] = 0; //AE +- keybuf[3] = 0; //not update +- +- memcpy(keybuf+4,mac_addr,6); +- memcpy(keybuf+10,UskDataKey,16); +- memcpy(keybuf+26,UskMicKey,16); +- keybuf[42]=UskId; +- wapi_test_set_key(padapter, keybuf); +- +- //set msk +- WAPI_TRACE(WAPI_INIT, "%s: Set MSK!!!!\n", __FUNCTION__); +- memset(keybuf,0,100); +- keybuf[0] = 2; //set msk +- keybuf[1] = 1; //Enable TX +- keybuf[2] = 1; //AE +- keybuf[3] = 0; //not update +- memcpy(keybuf+4,mac_addr,6); +- memcpy(keybuf+10,MskDataKey,16); +- memcpy(keybuf+26,MskMicKey,16); +- keybuf[42] = MskId; +- wapi_test_set_key(padapter, keybuf); +- +- memset(keybuf,0,100); +- keybuf[0] = 2; //set msk +- keybuf[1] = 1; //Enable TX +- keybuf[2] = 0; //AE +- keybuf[3] = 0; //not update +- memcpy(keybuf+4,mac_addr,6); +- memcpy(keybuf+10,MskDataKey,16); +- memcpy(keybuf+26,MskMicKey,16); +- keybuf[42] = MskId; +- wapi_test_set_key(padapter, keybuf); +- WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__); +-} +-#endif +- +-void rtw_wapi_get_iv(_adapter *padapter,u8 *pRA, u8*IV) +-{ +- PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL; +- PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; +- bool bPNOverflow = false; +- bool bFindMatchPeer = false; +- PRT_WAPI_STA_INFO pWapiSta = NULL; +- +- pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)IV; +- +- WAPI_DATA(WAPI_RX,"wapi_get_iv: pra",pRA,6); +- +- if(IS_MCAST(pRA)){ +- if(!pWapiInfo->wapiTxMsk.bTxEnable){ +- WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); +- return; +- } +- +- if(pWapiInfo->wapiTxMsk.keyId <= 1){ +- pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId; +- pWapiExt->Reserved = 0; +- bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1); +- memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16); +- } +- } +- else +- { +- if(list_empty(&pWapiInfo->wapiSTAUsedList)){ +- WAPI_TRACE(WAPI_RX,"rtw_wapi_get_iv: list is empty \n"); +- _rtw_memset(IV,10,18); +- return; +- } +- else{ +- list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ +- WAPI_DATA(WAPI_RX,"rtw_wapi_get_iv: peermacaddr ",pWapiSta->PeerMacAddr,6); +- if (_rtw_memcmp((u8*)pWapiSta->PeerMacAddr, pRA, 6) == _TRUE) { +- bFindMatchPeer = true; +- break; +- } +- } +- +- WAPI_TRACE(WAPI_RX,"bFindMatchPeer: %d \n",bFindMatchPeer); +- WAPI_DATA(WAPI_RX,"Addr",pRA,6); +- +- if (bFindMatchPeer){ +- if((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)) +- return; +- +- if (pWapiSta->wapiUsk.keyId <= 1){ +- if(pWapiSta->wapiUskUpdate.bTxEnable) +- pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId; +- else +- pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId; +- +- pWapiExt->Reserved = 0; +- bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2); +- _rtw_memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16); +- +- } +- } +- } +- +- } +- +-} +- +-bool rtw_wapi_drop_for_key_absent(_adapter *padapter,u8 *pRA) +-{ +- PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; +- bool bFindMatchPeer = false; +- bool bDrop = false; +- PRT_WAPI_STA_INFO pWapiSta = NULL; +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- +- WAPI_DATA(WAPI_RX,"rtw_wapi_drop_for_key_absent: ra ",pRA,6); +- +- if(psecuritypriv->dot11PrivacyAlgrthm == _SMS4_) +- { +- if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) +- return true; +- +- if(IS_MCAST(pRA)){ +- if(!pWapiInfo->wapiTxMsk.bTxEnable){ +- bDrop = true; +- WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: multicast key is absent \n"); +- return bDrop; +- } +- } +- else{ +- if(!list_empty(&pWapiInfo->wapiSTAUsedList)){ +- list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ +- WAPI_DATA(WAPI_RX,"rtw_wapi_drop_for_key_absent: pWapiSta->PeerMacAddr ",pWapiSta->PeerMacAddr,6); +- if (_rtw_memcmp(pRA, pWapiSta->PeerMacAddr, 6) == _TRUE){ +- bFindMatchPeer = true; +- break; +- } +- } +- if (bFindMatchPeer) { +- if (!pWapiSta->wapiUsk.bTxEnable){ +- bDrop = true; +- WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: unicast key is absent \n"); +- return bDrop; +- } +- } +- else{ +- bDrop = true; +- WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: no peer find \n"); +- return bDrop; +- } +- +- } +- else{ +- bDrop = true; +- WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: no sta exist \n"); +- return bDrop; +- } +- } +- } +- else +- { +- return bDrop; +- } +- +- return bDrop; +-} +- +-#endif ++#ifdef CONFIG_WAPI_SUPPORT ++ ++#include ++#include ++#include ++#include ++ ++ ++u32 wapi_debug_component = ++// WAPI_INIT | ++// WAPI_API | ++// WAPI_TX | ++// WAPI_RX | ++ WAPI_ERR ; //always open err flags on ++ ++void WapiFreeAllStaInfo(_adapter *padapter) ++{ ++ PRT_WAPI_T pWapiInfo; ++ PRT_WAPI_STA_INFO pWapiStaInfo; ++ PRT_WAPI_BKID pWapiBkid; ++ ++ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); ++ pWapiInfo = &padapter->wapiInfo; ++ ++ //Pust to Idle List ++ rtw_wapi_return_all_sta_info(padapter); ++ ++ //Sta Info List ++ while(!list_empty(&(pWapiInfo->wapiSTAIdleList))) ++ { ++ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list); ++ list_del_init(&pWapiStaInfo->list); ++ } ++ ++ //BKID List ++ while(!list_empty(&(pWapiInfo->wapiBKIDIdleList))) ++ { ++ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list); ++ list_del_init(&pWapiBkid->list); ++ } ++ WAPI_TRACE(WAPI_INIT, "<=========== %s\n", __FUNCTION__); ++ return; ++} ++ ++void WapiSetIE(_adapter *padapter) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ //PRT_WAPI_BKID pWapiBkid; ++ u16 protocolVer = 1; ++ u16 akmCnt = 1; ++ u16 suiteCnt = 1; ++ u16 capability = 0; ++ u8 OUI[3]; ++ ++ OUI[0] = 0x00; ++ OUI[1] = 0x14; ++ OUI[2] = 0x72; ++ ++ pWapiInfo->wapiIELength = 0; ++//protocol version ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &protocolVer, 2); ++ pWapiInfo->wapiIELength +=2; ++//akm ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &akmCnt, 2); ++ pWapiInfo->wapiIELength +=2; ++ ++ if(pWapiInfo->bWapiPSK){ ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); ++ pWapiInfo->wapiIELength +=3; ++ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x2; ++ pWapiInfo->wapiIELength +=1; ++ }else{ ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); ++ pWapiInfo->wapiIELength +=3; ++ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; ++ pWapiInfo->wapiIELength +=1; ++ } ++ ++//usk ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &suiteCnt, 2); ++ pWapiInfo->wapiIELength +=2; ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); ++ pWapiInfo->wapiIELength +=3; ++ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; ++ pWapiInfo->wapiIELength +=1; ++ ++//msk ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3); ++ pWapiInfo->wapiIELength +=3; ++ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; ++ pWapiInfo->wapiIELength +=1; ++ ++//Capbility ++ memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &capability, 2); ++ pWapiInfo->wapiIELength +=2; ++} ++ ++ ++/* PN1 > PN2, return 1, ++ * else return 0. ++ */ ++u32 WapiComparePN(u8 *PN1, u8 *PN2) ++{ ++ char i; ++ ++ if ((NULL == PN1) || (NULL == PN2)) ++ return 1; ++ ++ // overflow case ++ if ((PN2[15] - PN1[15]) & 0x80) ++ return 1; ++ ++ for (i=16; i>0; i--) ++ { ++ if(PN1[i-1] == PN2[i-1]) ++ continue; ++ else if(PN1[i-1] > PN2[i-1]) ++ return 1; ++ else ++ return 0; ++ } ++ ++ return 0; ++} ++ ++u8 ++WapiGetEntryForCamWrite(_adapter *padapter,u8 *pMacAddr,u8 KID,BOOLEAN IsMsk) ++{ ++ PRT_WAPI_T pWapiInfo=NULL; ++ //PRT_WAPI_CAM_ENTRY pEntry=NULL; ++ u8 i=0; ++ u8 ret = 0xff; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ pWapiInfo = &padapter->wapiInfo; ++ ++ //exist? ++ for(i=0;iwapiCamEntry[i].IsUsed ++ && (_rtw_memcmp(pMacAddr, pWapiInfo->wapiCamEntry[i].PeerMacAddr, ETH_ALEN) == _TRUE) ++ && pWapiInfo->wapiCamEntry[i].keyidx == KID ++ && pWapiInfo->wapiCamEntry[i].type == IsMsk) ++ { ++ ret = pWapiInfo->wapiCamEntry[i].entry_idx; //cover it ++ break; ++ } ++ } ++ ++ if(i == WAPI_CAM_ENTRY_NUM) //not found ++ { ++ for(i=0;iwapiCamEntry[i].IsUsed == 0) ++ { ++ pWapiInfo->wapiCamEntry[i].IsUsed = 1; ++ pWapiInfo->wapiCamEntry[i].type = IsMsk; ++ pWapiInfo->wapiCamEntry[i].keyidx = KID; ++ _rtw_memcpy(pWapiInfo->wapiCamEntry[i].PeerMacAddr, pMacAddr,ETH_ALEN); ++ ret = pWapiInfo->wapiCamEntry[i].entry_idx; ++ break; ++ } ++ } ++ } ++ ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++ return ret; ++ ++/* ++ if(RTIsListEmpty(&pWapiInfo->wapiCamIdleList)){ ++ RT_TRACE(COMP_SEC,DBG_LOUD,("No Entry for wapi!!!\n")); ++ return 0; ++ } ++ ++ pEntry = (PRT_WAPI_CAM_ENTRY)RTRemoveHeadList(&pWapiInfo->wapiCamIdleList); ++ RTInsertTailList(&pWapiInfo->wapiCamUsedList, &pEntry->list); ++ ++ RT_TRACE(COMP_SEC,DBG_LOUD,("<====WapiGetCamEntry(),Get Entry Idx:%d.but we just return 4 for test\n",pEntry->entry_idx)); ++ ++ return pEntry->entry_idx;*/ ++} ++ ++u8 WapiGetEntryForCamClear(_adapter *padapter,u8 *pPeerMac,u8 keyid,u8 IsMsk) ++{ ++ PRT_WAPI_T pWapiInfo=NULL; ++ u8 i=0; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ pWapiInfo = &padapter->wapiInfo; ++ ++ for(i=0;iwapiCamEntry[i].IsUsed ++ && (_rtw_memcmp(pPeerMac, pWapiInfo->wapiCamEntry[i].PeerMacAddr, ETH_ALEN) == _TRUE) ++ && pWapiInfo->wapiCamEntry[i].keyidx == keyid ++ && pWapiInfo->wapiCamEntry[i].type == IsMsk) ++ { ++ pWapiInfo->wapiCamEntry[i].IsUsed = 0; ++ pWapiInfo->wapiCamEntry[i].keyidx = 2; ++ _rtw_memset(pWapiInfo->wapiCamEntry[i].PeerMacAddr,0,ETH_ALEN); ++ ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++ return pWapiInfo->wapiCamEntry[i].entry_idx; ++ } ++ } ++ ++ WAPI_TRACE(WAPI_API,"<====WapiGetReturnCamEntry(), No this cam entry.\n"); ++ return 0xff; ++/* ++ if(RTIsListEmpty(&pWapiInfo->wapiCamUsedList)){ ++ RT_TRACE(COMP_SEC,DBG_LOUD,("No Entry for wapi!!!\n")); ++ return FALSE; ++ } ++ ++ pList = &pWapiInfo->wapiCamUsedList; ++ while(pList->Flink != &pWapiInfo->wapiCamUsedList) ++ { ++ pEntry = (PRT_WAPI_CAM_ENTRY)pList->Flink; ++ if(PlatformCompareMemory(pPeerMac,pEntry->PeerMacAddr, ETHER_ADDRLEN)== 0 ++ && keyid == pEntry->keyidx) ++ { ++ RTRemoveEntryList(pList); ++ RTInsertHeadList(&pWapiInfo->wapiCamIdleList, pList); ++ return pEntry->entry_idx; ++ } ++ pList = pList->Flink; ++ } ++ ++ return 0; ++*/ ++} ++ ++void ++WapiResetAllCamEntry(_adapter *padapter) ++{ ++ PRT_WAPI_T pWapiInfo; ++ int i; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ pWapiInfo = &padapter->wapiInfo; ++ ++ for (i=0;iwapiCamEntry[i].PeerMacAddr, 0, ETH_ALEN); ++ pWapiInfo->wapiCamEntry[i].IsUsed = 0; ++ pWapiInfo->wapiCamEntry[i].keyidx = 2; //invalid ++ pWapiInfo->wapiCamEntry[i].entry_idx = 4+i*2; ++ } ++ ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++ ++ return; ++} ++ ++u8 WapiWriteOneCamEntry( ++ _adapter *padapter, ++ u8 *pMacAddr, ++ u8 KeyId, ++ u8 EntryId, ++ u8 EncAlg, ++ u8 bGroupKey, ++ u8 *pKey ++) ++{ ++ u8 retVal = 0; ++ u16 usConfig = 0; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ if(EntryId >= 32) ++ { ++ WAPI_TRACE(WAPI_ERR, "<=== CamAddOneEntry(): ulKeyId exceed!\n"); ++ return retVal; ++ } ++ ++ usConfig=usConfig|(0x01<<15)|((u16)(EncAlg)<<2)|(KeyId); ++ ++ if(EncAlg == _SMS4_ ) ++ { ++ if(bGroupKey == 1) ++ usConfig |= (0x01<<6); ++ if((EntryId % 2)==1) // ==0 sec key; == 1mic key ++ usConfig |= (0x01<<5); ++ } ++ ++ write_cam(padapter, EntryId, usConfig, pMacAddr, pKey); ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ return 1; ++} ++ ++void rtw_wapi_init(_adapter *padapter) ++{ ++ PRT_WAPI_T pWapiInfo; ++ int i; ++ ++ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); ++ RT_ASSERT_RET(padapter); ++ ++ if (!padapter->WapiSupport) ++ { ++ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ pWapiInfo = &padapter->wapiInfo; ++ pWapiInfo->bWapiEnable = false; ++ ++ //Init BKID List ++ INIT_LIST_HEAD(&pWapiInfo->wapiBKIDIdleList); ++ INIT_LIST_HEAD(&pWapiInfo->wapiBKIDStoreList); ++ for(i=0;iwapiBKID[i].list, &pWapiInfo->wapiBKIDIdleList); ++ } ++ ++ //Init STA List ++ INIT_LIST_HEAD(&pWapiInfo->wapiSTAIdleList); ++ INIT_LIST_HEAD(&pWapiInfo->wapiSTAUsedList); ++ for(i=0;iwapiSta[i].list, &pWapiInfo->wapiSTAIdleList); ++ } ++ ++ for (i=0;iwapiCamEntry[i].IsUsed = 0; ++ pWapiInfo->wapiCamEntry[i].keyidx = 2; //invalid ++ pWapiInfo->wapiCamEntry[i].entry_idx = 4+i*2; ++ } ++ ++ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_free(_adapter *padapter) ++{ ++ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); ++ RT_ASSERT_RET(padapter); ++ ++ if (!padapter->WapiSupport) ++ { ++ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ WapiFreeAllStaInfo(padapter); ++ ++ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_disable_tx(_adapter *padapter) ++{ ++ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); ++ RT_ASSERT_RET(padapter); ++ ++ if (!padapter->WapiSupport) ++ { ++ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ padapter->wapiInfo.wapiTxMsk.bTxEnable = false; ++ padapter->wapiInfo.wapiTxMsk.bSet = false; ++ ++ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); ++} ++ ++u8 rtw_wapi_is_wai_packet(_adapter* padapter,u8 *pkt_data) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ u8 WaiPkt = 0, *pTaddr, bFind = false; ++ u8 Offset_TypeWAI = 0 ; // (mac header len + llc length) ++ ++ WAPI_TRACE(WAPI_TX|WAPI_RX, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return 0; ++ } ++ ++ Offset_TypeWAI = 24 + 6 ; ++ ++ //YJ,add,091103. Data frame may also have skb->data[30]=0x88 and skb->data[31]=0xb4. ++ if ((pkt_data[1]&0x40) !=0) ++ { ++ //DBG_871X("data is privacy \n"); ++ return 0; ++ } ++ ++ pTaddr = GetAddr2Ptr(pkt_data); ++ if(list_empty(&pWapiInfo->wapiSTAUsedList)){ ++ bFind = false; ++ }else{ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ ++ if (_rtw_memcmp(pTaddr, pWapiSta->PeerMacAddr, 6) == _TRUE) { ++ bFind = true; ++ break; ++ } ++ } ++ } ++ ++ WAPI_TRACE(WAPI_TX|WAPI_RX, "%s: bFind=%d pTaddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(pTaddr)); ++ ++ if (pkt_data[0] == WIFI_QOS_DATA_TYPE) ++ { ++ Offset_TypeWAI += 2; ++ } ++ ++ // 88b4? ++ if( (pkt_data[Offset_TypeWAI]==0x88) && (pkt_data[Offset_TypeWAI+1]==0xb4) ){ ++ WaiPkt = pkt_data[Offset_TypeWAI+5]; ++ ++ psecuritypriv->hw_decrypted = _TRUE; ++ }else{ ++ WAPI_TRACE(WAPI_TX|WAPI_RX, "%s(): non wai packet\n",__FUNCTION__); ++ } ++ ++ WAPI_TRACE(WAPI_TX|WAPI_RX, "%s(): Recvd WAI frame. IsWAIPkt(%d)\n",__FUNCTION__, WaiPkt); ++ ++ return WaiPkt; ++} ++ ++ ++void rtw_wapi_update_info(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ struct recv_frame_hdr *precv_hdr; ++ u8 *ptr; ++ u8 *pTA; ++ u8 *pRecvPN; ++ ++ ++ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ precv_hdr = &precv_frame->u.hdr; ++ ptr = precv_hdr->rx_data; ++ ++ if (precv_hdr->attrib.qos == 1) ++ { ++ precv_hdr->UserPriority = GetTid(ptr); ++ } ++ else ++ { ++ precv_hdr->UserPriority = 0; ++ } ++ ++ pTA = GetAddr2Ptr(ptr); ++ _rtw_memcpy((u8 *)precv_hdr->WapiSrcAddr, pTA, 6); ++ pRecvPN = ptr + precv_hdr->attrib.hdrlen + 2; ++ _rtw_memcpy((u8 *)precv_hdr->WapiTempPN, pRecvPN, 16); ++ ++ WAPI_TRACE(WAPI_RX, "<========== %s\n", __FUNCTION__); ++} ++ ++/**************************************************************************** ++TRUE-----------------Drop ++FALSE---------------- handle ++add to support WAPI to N-mode ++*****************************************************************************/ ++u8 rtw_wapi_check_for_drop( ++ _adapter *padapter, ++ union recv_frame *precv_frame ++) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ u8 *pLastRecvPN = NULL; ++ u8 bFind = false; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ u8 bDrop = false; ++ struct recv_frame_hdr *precv_hdr = &precv_frame->u.hdr; ++ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ int i; ++ ++ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return false; ++ } ++ ++ if(precv_hdr->bIsWaiPacket !=0) ++ { ++ if(precv_hdr->bIsWaiPacket== 0x8) ++ { ++ ++ DBG_871X("rtw_wapi_check_for_drop: dump packet \n"); ++ for(i=0;i<50;i++) ++ { ++ DBG_871X("%02X ",ptr[i]); ++ if((i+1) %8 ==0) ++ DBG_871X("\n"); ++ } ++ DBG_871X("\n rtw_wapi_check_for_drop: dump packet \n"); ++ ++ for(i=0;i<16;i++) ++ { ++ if(ptr[i+27] !=0) ++ break; ++ } ++ ++ if(i== 16) ++ { ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: drop with zero BKID \n"); ++ return true; ++ } ++ else ++ { ++ return false; ++ } ++ } ++ else ++ return false; ++ } ++ ++ if(list_empty(&pWapiInfo->wapiSTAUsedList)){ ++ bFind = false; ++ }else{ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if (_rtw_memcmp(precv_hdr->WapiSrcAddr, pWapiSta->PeerMacAddr, ETH_ALEN) == _TRUE) { ++ bFind = true; ++ break; ++ } ++ } ++ } ++ WAPI_TRACE(WAPI_RX, "%s: bFind=%d prxb->WapiSrcAddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(precv_hdr->WapiSrcAddr)); ++ ++ if(bFind) ++ { ++ if(IS_MCAST(precv_hdr->attrib.ra)) ++ { ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: multicast case \n"); ++ pLastRecvPN = pWapiSta->lastRxMulticastPN; ++ } ++ else ++ { ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_check_for_drop: unicast case \n"); ++ switch(precv_hdr->UserPriority) ++ { ++ case 0: ++ case 3: ++ pLastRecvPN = pWapiSta->lastRxUnicastPNBEQueue; ++ break; ++ case 1: ++ case 2: ++ pLastRecvPN = pWapiSta->lastRxUnicastPNBKQueue; ++ break; ++ case 4: ++ case 5: ++ pLastRecvPN = pWapiSta->lastRxUnicastPNVIQueue; ++ break; ++ case 6: ++ case 7: ++ pLastRecvPN = pWapiSta->lastRxUnicastPNVOQueue; ++ break; ++ default: ++ WAPI_TRACE(WAPI_ERR,"%s: Unknown TID \n",__FUNCTION__); ++ break; ++ } ++ } ++ ++ if(!WapiComparePN(precv_hdr->WapiTempPN,pLastRecvPN)) ++ { ++ WAPI_TRACE(WAPI_RX,"%s: Equal PN!!\n",__FUNCTION__); ++ if(IS_MCAST(precv_hdr->attrib.ra)) ++ _rtw_memcpy(pLastRecvPN,WapiAEMultiCastPNInitialValueSrc,16); ++ else ++ _rtw_memcpy(pLastRecvPN,WapiAEPNInitialValueSrc,16); ++ bDrop = true; ++ } ++ else ++ { ++ _rtw_memcpy(pLastRecvPN,precv_hdr->WapiTempPN,16); ++ } ++ } ++ ++ WAPI_TRACE(WAPI_RX, "<========== %s\n", __FUNCTION__); ++ return bDrop; ++} ++ ++void rtw_build_probe_resp_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ u8 WapiIELength = 0; ++ ++ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ WapiSetIE(padapter); ++ WapiIELength = pWapiInfo->wapiIELength; ++ pframe[0] = _WAPI_IE_; ++ pframe[1] = WapiIELength; ++ _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); ++ pframe += WapiIELength+2; ++ pattrib->pktlen += WapiIELength+2; ++ ++ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_build_beacon_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ u8 WapiIELength = 0; ++ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ WapiSetIE(padapter); ++ WapiIELength = pWapiInfo->wapiIELength; ++ pframe[0] = _WAPI_IE_; ++ pframe[1] = WapiIELength; ++ _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); ++ pframe += WapiIELength+2; ++ pattrib->pktlen += WapiIELength+2; ++ ++ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_build_assoc_req_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) ++{ ++ PRT_WAPI_BKID pWapiBKID; ++ u16 bkidNum; ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ u8 WapiIELength = 0; ++ ++ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); ++ return; ++ } ++ ++ WapiSetIE(padapter); ++ WapiIELength = pWapiInfo->wapiIELength; ++ bkidNum = 0; ++ if(!list_empty(&(pWapiInfo->wapiBKIDStoreList))){ ++ list_for_each_entry(pWapiBKID, &pWapiInfo->wapiBKIDStoreList, list) { ++ bkidNum ++; ++ _rtw_memcpy(pWapiInfo->wapiIE+WapiIELength+2, pWapiBKID->bkid,16); ++ WapiIELength += 16; ++ } ++ } ++ _rtw_memcpy(pWapiInfo->wapiIE+WapiIELength, &bkidNum, 2); ++ WapiIELength += 2; ++ ++ pframe[0] = _WAPI_IE_; ++ pframe[1] = WapiIELength; ++ _rtw_memcpy(pframe+2, pWapiInfo->wapiIE, WapiIELength); ++ pframe += WapiIELength+2; ++ pattrib->pktlen += WapiIELength+2; ++ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_on_assoc_ok(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); ++ PRT_WAPI_STA_INFO pWapiSta; ++ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ //u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ ++ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ pWapiSta =(PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list); ++ list_del_init(&pWapiSta->list); ++ list_add_tail(&pWapiSta->list, &pWapiInfo->wapiSTAUsedList); ++ _rtw_memcpy(pWapiSta->PeerMacAddr,padapter->mlmeextpriv.mlmext_info.network.MacAddress,6); ++ _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPN, WapiAEPNInitialValueSrc, 16); ++ ++ //For chenk PN error with Qos Data after s3: add by ylb 20111114 ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16); ++ ++ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); ++} ++ ++ ++void rtw_wapi_return_one_sta_info(_adapter *padapter, u8 *MacAddr) ++{ ++ PRT_WAPI_T pWapiInfo; ++ PRT_WAPI_STA_INFO pWapiStaInfo = NULL; ++ PRT_WAPI_BKID pWapiBkid = NULL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ pWapiInfo = &padapter->wapiInfo; ++ ++ WAPI_TRACE(WAPI_API, "==========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)) ++ { ++ while(!list_empty(&(pWapiInfo->wapiBKIDStoreList))) ++ { ++ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list); ++ list_del_init(&pWapiBkid->list); ++ _rtw_memset(pWapiBkid->bkid,0,16); ++ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList); ++ } ++ } ++ ++ ++ WAPI_TRACE(WAPI_API, " %s: after clear bkid \n", __FUNCTION__); ++ ++ ++ //Remove STA info ++ if(list_empty(&(pWapiInfo->wapiSTAUsedList))){ ++ WAPI_TRACE(WAPI_API, " %s: wapiSTAUsedList is null \n", __FUNCTION__); ++ return; ++ }else{ ++ ++ WAPI_TRACE(WAPI_API, " %s: wapiSTAUsedList is not null \n", __FUNCTION__); ++#if 0 ++ pWapiStaInfo=(PRT_WAPI_STA_INFO)list_entry((pWapiInfo->wapiSTAUsedList.next),RT_WAPI_STA_INFO,list); ++ ++ list_for_each_entry(pWapiStaInfo, &(pWapiInfo->wapiSTAUsedList), list) { ++ ++ DBG_871X("MAC Addr %02x-%02x-%02x-%02x-%02x-%02x \n",MacAddr[0],MacAddr[1],MacAddr[2],MacAddr[3],MacAddr[4],MacAddr[5]); ++ ++ ++ DBG_871X("peer Addr %02x-%02x-%02x-%02x-%02x-%02x \n",pWapiStaInfo->PeerMacAddr[0],pWapiStaInfo->PeerMacAddr[1],pWapiStaInfo->PeerMacAddr[2],pWapiStaInfo->PeerMacAddr[3],pWapiStaInfo->PeerMacAddr[4],pWapiStaInfo->PeerMacAddr[5]); ++ ++ if(pWapiStaInfo == NULL) ++ { ++ WAPI_TRACE(WAPI_API, " %s: pWapiStaInfo == NULL Case \n", __FUNCTION__); ++ return; ++ } ++ ++ if(pWapiStaInfo->PeerMacAddr == NULL) ++ { ++ WAPI_TRACE(WAPI_API, " %s: pWapiStaInfo->PeerMacAddr == NULL Case \n", __FUNCTION__); ++ return; ++ } ++ ++ if(MacAddr == NULL) ++ { ++ WAPI_TRACE(WAPI_API, " %s: MacAddr == NULL Case \n", __FUNCTION__); ++ return; ++ } ++ ++ if (_rtw_memcmp(pWapiStaInfo->PeerMacAddr, MacAddr, ETH_ALEN) == _TRUE) { ++ pWapiStaInfo->bAuthenticateInProgress = false; ++ pWapiStaInfo->bSetkeyOk = false; ++ _rtw_memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); ++ list_del_init(&pWapiStaInfo->list); ++ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); ++ break; ++ } ++ ++ } ++#endif ++ ++ while(!list_empty(&(pWapiInfo->wapiSTAUsedList))) ++ { ++ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAUsedList.next, RT_WAPI_STA_INFO, list); ++ ++ DBG_871X("peer Addr %02x-%02x-%02x-%02x-%02x-%02x \n",pWapiStaInfo->PeerMacAddr[0],pWapiStaInfo->PeerMacAddr[1],pWapiStaInfo->PeerMacAddr[2],pWapiStaInfo->PeerMacAddr[3],pWapiStaInfo->PeerMacAddr[4],pWapiStaInfo->PeerMacAddr[5]); ++ ++ list_del_init(&pWapiStaInfo->list); ++ memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); ++ pWapiStaInfo->bSetkeyOk = 0; ++ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); ++ } ++ ++ } ++ ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++ return; ++} ++ ++void rtw_wapi_return_all_sta_info(_adapter *padapter) ++{ ++ PRT_WAPI_T pWapiInfo; ++ PRT_WAPI_STA_INFO pWapiStaInfo; ++ PRT_WAPI_BKID pWapiBkid; ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ pWapiInfo = &padapter->wapiInfo; ++ ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ //Sta Info List ++ while(!list_empty(&(pWapiInfo->wapiSTAUsedList))) ++ { ++ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAUsedList.next, RT_WAPI_STA_INFO, list); ++ list_del_init(&pWapiStaInfo->list); ++ memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN); ++ pWapiStaInfo->bSetkeyOk = 0; ++ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); ++ } ++ ++ //BKID List ++ while(!list_empty(&(pWapiInfo->wapiBKIDStoreList))) ++ { ++ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list); ++ list_del_init(&pWapiBkid->list); ++ memset(pWapiBkid->bkid,0,16); ++ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList); ++ } ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_clear_cam_entry(_adapter *padapter, u8 *pMacAddr) ++{ ++ u8 UcIndex = 0; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 0, 0); ++ if(UcIndex != 0xff){ ++ //CAM_mark_invalid(Adapter, UcIndex); ++ CAM_empty_entry(padapter, UcIndex); ++ } ++ ++ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 1, 0); ++ if(UcIndex != 0xff){ ++ //CAM_mark_invalid(Adapter, UcIndex); ++ CAM_empty_entry(padapter, UcIndex); ++ } ++ ++ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 0, 1); ++ if(UcIndex != 0xff){ ++ //CAM_mark_invalid(Adapter, UcIndex); ++ CAM_empty_entry(padapter, UcIndex); ++ } ++ ++ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 1, 1); ++ if(UcIndex != 0xff){ ++ //CAM_mark_invalid(padapter, UcIndex); ++ CAM_empty_entry(padapter, UcIndex); ++ } ++ ++ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_clear_all_cam_entry(_adapter *padapter) ++{ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ invalidate_cam_all(padapter); // is this ok? ++ WapiResetAllCamEntry(padapter); ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++} ++ ++void rtw_wapi_set_key(_adapter *padapter, RT_WAPI_KEY *pWapiKey, RT_WAPI_STA_INFO *pWapiSta, u8 bGroupKey, u8 bUseDefaultKey) ++{ ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ u8 *pMacAddr = pWapiSta->PeerMacAddr; ++ u32 EntryId = 0; ++ BOOLEAN IsPairWise = false ; ++ u8 EncAlgo; ++ ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_API, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); ++ return; ++ } ++ ++ EncAlgo = _SMS4_; ++ ++ //For Tx bc/mc pkt,use defualt key entry ++ if(bUseDefaultKey) ++ { ++ // when WAPI update key, keyid will be 0 or 1 by turns. ++ if (pWapiKey->keyId == 0) ++ EntryId = 0; ++ else ++ EntryId = 2; ++ } ++ else ++ { ++ // tx/rx unicast pkt, or rx broadcast, find the key entry by peer's MacAddr ++ EntryId = WapiGetEntryForCamWrite(padapter,pMacAddr,pWapiKey->keyId,bGroupKey); ++ } ++ ++ if(EntryId == 0xff){ ++ WAPI_TRACE(WAPI_API, "===>No entry for WAPI setkey! !!\n"); ++ return; ++ } ++ ++ //EntryId is also used to diff Sec key and Mic key ++ //Sec Key ++ WapiWriteOneCamEntry(padapter, ++ pMacAddr, ++ pWapiKey->keyId, //keyid ++ EntryId, //entry ++ EncAlgo, //type ++ bGroupKey, //pairwise or group key ++ pWapiKey->dataKey); ++ //MIC key ++ WapiWriteOneCamEntry(padapter, ++ pMacAddr, ++ pWapiKey->keyId, //keyid ++ EntryId+1, //entry ++ EncAlgo, //type ++ bGroupKey, //pairwise or group key ++ pWapiKey->micKey); ++ ++ WAPI_TRACE(WAPI_API, "Set Wapi Key :KeyId:%d,EntryId:%d,PairwiseKey:%d.\n",pWapiKey->keyId,EntryId,!bGroupKey); ++ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); ++ ++} ++ ++#if 0 ++//YJ,test,091013 ++void wapi_test_set_key(struct _adapter *padapter, u8* buf) ++{ /*Data: keyType(1) + bTxEnable(1) + bAuthenticator(1) + bUpdate(1) + PeerAddr(6) + DataKey(16) + MicKey(16) + KeyId(1)*/ ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ PRT_WAPI_BKID pWapiBkid; ++ PRT_WAPI_STA_INFO pWapiSta; ++ u8 data[43]; ++ bool bTxEnable; ++ bool bUpdate; ++ bool bAuthenticator; ++ u8 PeerAddr[6]; ++ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ ++ WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__); ++ ++ if (!padapter->WapiSupport){ ++ return; ++ } ++ ++ copy_from_user(data, buf, 43); ++ bTxEnable = data[1]; ++ bAuthenticator = data[2]; ++ bUpdate = data[3]; ++ memcpy(PeerAddr,data+4,6); ++ ++ if(data[0] == 0x3){ ++ if(!list_empty(&(pWapiInfo->wapiBKIDIdleList))){ ++ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list); ++ list_del_init(&pWapiBkid->list); ++ memcpy(pWapiBkid->bkid, data+10, 16); ++ WAPI_DATA(WAPI_INIT, "SetKey - BKID", pWapiBkid->bkid, 16); ++ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDStoreList); ++ } ++ }else{ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if(!memcmp(pWapiSta->PeerMacAddr,PeerAddr,6)){ ++ pWapiSta->bAuthenticatorInUpdata = false; ++ switch(data[0]){ ++ case 1: //usk ++ if(bAuthenticator){ //authenticator ++ memcpy(pWapiSta->lastTxUnicastPN,WapiAEPNInitialValueSrc,16); ++ if(!bUpdate) { //first ++ WAPI_TRACE(WAPI_INIT,"AE fisrt set usk \n"); ++ pWapiSta->wapiUsk.bSet = true; ++ memcpy(pWapiSta->wapiUsk.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiUsk.micKey,data+26,16); ++ pWapiSta->wapiUsk.keyId = *(data+42); ++ pWapiSta->wapiUsk.bTxEnable = true; ++ WAPI_DATA(WAPI_INIT, "SetKey - AE USK Data Key", pWapiSta->wapiUsk.dataKey, 16); ++ WAPI_DATA(WAPI_INIT, "SetKey - AE USK Mic Key", pWapiSta->wapiUsk.micKey, 16); ++ } ++ else //update ++ { ++ WAPI_TRACE(WAPI_INIT, "AE update usk \n"); ++ pWapiSta->wapiUskUpdate.bSet = true; ++ pWapiSta->bAuthenticatorInUpdata = true; ++ memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16); ++ memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16); ++ pWapiSta->wapiUskUpdate.keyId = *(data+42); ++ pWapiSta->wapiUskUpdate.bTxEnable = true; ++ } ++ } ++ else{ ++ if(!bUpdate){ ++ WAPI_TRACE(WAPI_INIT,"ASUE fisrt set usk \n"); ++ if(bTxEnable){ ++ pWapiSta->wapiUsk.bTxEnable = true; ++ memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); ++ }else{ ++ pWapiSta->wapiUsk.bSet = true; ++ memcpy(pWapiSta->wapiUsk.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiUsk.micKey,data+26,16); ++ pWapiSta->wapiUsk.keyId = *(data+42); ++ pWapiSta->wapiUsk.bTxEnable = false; ++ } ++ }else{ ++ WAPI_TRACE(WAPI_INIT,"ASUE update usk \n"); ++ if(bTxEnable){ ++ pWapiSta->wapiUskUpdate.bTxEnable = true; ++ if(pWapiSta->wapiUskUpdate.bSet){ ++ memcpy(pWapiSta->wapiUsk.dataKey,pWapiSta->wapiUskUpdate.dataKey,16); ++ memcpy(pWapiSta->wapiUsk.micKey,pWapiSta->wapiUskUpdate.micKey,16); ++ pWapiSta->wapiUsk.keyId=pWapiSta->wapiUskUpdate.keyId; ++ memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16); ++ memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16); ++ pWapiSta->wapiUskUpdate.bTxEnable = false; ++ pWapiSta->wapiUskUpdate.bSet = false; ++ } ++ memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); ++ }else{ ++ pWapiSta->wapiUskUpdate.bSet = true; ++ memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16); ++ pWapiSta->wapiUskUpdate.keyId = *(data+42); ++ pWapiSta->wapiUskUpdate.bTxEnable = false; ++ } ++ } ++ } ++ break; ++ case 2: //msk ++ if(bAuthenticator){ //authenticator ++ pWapiInfo->wapiTxMsk.bSet = true; ++ memcpy(pWapiInfo->wapiTxMsk.dataKey,data+10,16); ++ memcpy(pWapiInfo->wapiTxMsk.micKey,data+26,16); ++ pWapiInfo->wapiTxMsk.keyId = *(data+42); ++ pWapiInfo->wapiTxMsk.bTxEnable = true; ++ memcpy(pWapiInfo->lastTxMulticastPN,WapiAEMultiCastPNInitialValueSrc,16); ++ ++ if(!bUpdate){ //first ++ WAPI_TRACE(WAPI_INIT, "AE fisrt set msk \n"); ++ if(!pWapiSta->bSetkeyOk) ++ pWapiSta->bSetkeyOk = true; ++ pWapiInfo->bFirstAuthentiateInProgress= false; ++ }else{ //update ++ WAPI_TRACE(WAPI_INIT,"AE update msk \n"); ++ } ++ ++ WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Data Key", pWapiInfo->wapiTxMsk.dataKey, 16); ++ WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Mic Key", pWapiInfo->wapiTxMsk.micKey, 16); ++ } ++ else{ ++ if(!bUpdate){ ++ WAPI_TRACE(WAPI_INIT,"ASUE fisrt set msk \n"); ++ pWapiSta->wapiMsk.bSet = true; ++ memcpy(pWapiSta->wapiMsk.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiMsk.micKey,data+26,16); ++ pWapiSta->wapiMsk.keyId = *(data+42); ++ pWapiSta->wapiMsk.bTxEnable = false; ++ if(!pWapiSta->bSetkeyOk) ++ pWapiSta->bSetkeyOk = true; ++ pWapiInfo->bFirstAuthentiateInProgress= false; ++ WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Data Key", pWapiSta->wapiMsk.dataKey, 16); ++ WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Mic Key", pWapiSta->wapiMsk.micKey, 16); ++ }else{ ++ WAPI_TRACE(WAPI_INIT,"ASUE update msk \n"); ++ pWapiSta->wapiMskUpdate.bSet = true; ++ memcpy(pWapiSta->wapiMskUpdate.dataKey,data+10,16); ++ memcpy(pWapiSta->wapiMskUpdate.micKey,data+26,16); ++ pWapiSta->wapiMskUpdate.keyId = *(data+42); ++ pWapiSta->wapiMskUpdate.bTxEnable = false; ++ } ++ } ++ break; ++ default: ++ WAPI_TRACE(WAPI_ERR,"Unknown Flag \n"); ++ break; ++ } ++ } ++ } ++ } ++ WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__); ++} ++ ++ ++void wapi_test_init(struct _adapter *padapter) ++{ ++ u8 keybuf[100]; ++ u8 mac_addr[6]={0x00,0xe0,0x4c,0x72,0x04,0x70}; ++ u8 UskDataKey[16]={0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f}; ++ u8 UskMicKey[16]={0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f}; ++ u8 UskId = 0; ++ u8 MskDataKey[16]={0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f}; ++ u8 MskMicKey[16]={0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f}; ++ u8 MskId = 0; ++ ++ WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__); ++ ++ //Enable Wapi ++ WAPI_TRACE(WAPI_INIT, "%s: Enable wapi!!!!\n", __FUNCTION__); ++ padapter->wapiInfo.bWapiEnable = true; ++ padapter->pairwise_key_type = KEY_TYPE_SMS4; ++ ieee->group_key_type = KEY_TYPE_SMS4; ++ padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; ++ padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; ++ ++ //set usk ++ WAPI_TRACE(WAPI_INIT, "%s: Set USK!!!!\n", __FUNCTION__); ++ memset(keybuf,0,100); ++ keybuf[0] = 1; //set usk ++ keybuf[1] = 1; //enable tx ++ keybuf[2] = 1; //AE ++ keybuf[3] = 0; //not update ++ ++ memcpy(keybuf+4,mac_addr,6); ++ memcpy(keybuf+10,UskDataKey,16); ++ memcpy(keybuf+26,UskMicKey,16); ++ keybuf[42]=UskId; ++ wapi_test_set_key(padapter, keybuf); ++ ++ memset(keybuf,0,100); ++ keybuf[0] = 1; //set usk ++ keybuf[1] = 1; //enable tx ++ keybuf[2] = 0; //AE ++ keybuf[3] = 0; //not update ++ ++ memcpy(keybuf+4,mac_addr,6); ++ memcpy(keybuf+10,UskDataKey,16); ++ memcpy(keybuf+26,UskMicKey,16); ++ keybuf[42]=UskId; ++ wapi_test_set_key(padapter, keybuf); ++ ++ //set msk ++ WAPI_TRACE(WAPI_INIT, "%s: Set MSK!!!!\n", __FUNCTION__); ++ memset(keybuf,0,100); ++ keybuf[0] = 2; //set msk ++ keybuf[1] = 1; //Enable TX ++ keybuf[2] = 1; //AE ++ keybuf[3] = 0; //not update ++ memcpy(keybuf+4,mac_addr,6); ++ memcpy(keybuf+10,MskDataKey,16); ++ memcpy(keybuf+26,MskMicKey,16); ++ keybuf[42] = MskId; ++ wapi_test_set_key(padapter, keybuf); ++ ++ memset(keybuf,0,100); ++ keybuf[0] = 2; //set msk ++ keybuf[1] = 1; //Enable TX ++ keybuf[2] = 0; //AE ++ keybuf[3] = 0; //not update ++ memcpy(keybuf+4,mac_addr,6); ++ memcpy(keybuf+10,MskDataKey,16); ++ memcpy(keybuf+26,MskMicKey,16); ++ keybuf[42] = MskId; ++ wapi_test_set_key(padapter, keybuf); ++ WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__); ++} ++#endif ++ ++void rtw_wapi_get_iv(_adapter *padapter,u8 *pRA, u8*IV) ++{ ++ PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL; ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ bool bPNOverflow = false; ++ bool bFindMatchPeer = false; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ ++ pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)IV; ++ ++ WAPI_DATA(WAPI_RX,"wapi_get_iv: pra",pRA,6); ++ ++ if(IS_MCAST(pRA)){ ++ if(!pWapiInfo->wapiTxMsk.bTxEnable){ ++ WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); ++ return; ++ } ++ ++ if(pWapiInfo->wapiTxMsk.keyId <= 1){ ++ pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId; ++ pWapiExt->Reserved = 0; ++ bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1); ++ memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16); ++ } ++ } ++ else ++ { ++ if(list_empty(&pWapiInfo->wapiSTAUsedList)){ ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_get_iv: list is empty \n"); ++ _rtw_memset(IV,10,18); ++ return; ++ } ++ else{ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ ++ WAPI_DATA(WAPI_RX,"rtw_wapi_get_iv: peermacaddr ",pWapiSta->PeerMacAddr,6); ++ if (_rtw_memcmp((u8*)pWapiSta->PeerMacAddr, pRA, 6) == _TRUE) { ++ bFindMatchPeer = true; ++ break; ++ } ++ } ++ ++ WAPI_TRACE(WAPI_RX,"bFindMatchPeer: %d \n",bFindMatchPeer); ++ WAPI_DATA(WAPI_RX,"Addr",pRA,6); ++ ++ if (bFindMatchPeer){ ++ if((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)) ++ return; ++ ++ if (pWapiSta->wapiUsk.keyId <= 1){ ++ if(pWapiSta->wapiUskUpdate.bTxEnable) ++ pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId; ++ else ++ pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId; ++ ++ pWapiExt->Reserved = 0; ++ bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2); ++ _rtw_memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16); ++ ++ } ++ } ++ } ++ ++ } ++ ++} ++ ++bool rtw_wapi_drop_for_key_absent(_adapter *padapter,u8 *pRA) ++{ ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ bool bFindMatchPeer = false; ++ bool bDrop = false; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ WAPI_DATA(WAPI_RX,"rtw_wapi_drop_for_key_absent: ra ",pRA,6); ++ ++ if(psecuritypriv->dot11PrivacyAlgrthm == _SMS4_) ++ { ++ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) ++ return true; ++ ++ if(IS_MCAST(pRA)){ ++ if(!pWapiInfo->wapiTxMsk.bTxEnable){ ++ bDrop = true; ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: multicast key is absent \n"); ++ return bDrop; ++ } ++ } ++ else{ ++ if(!list_empty(&pWapiInfo->wapiSTAUsedList)){ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){ ++ WAPI_DATA(WAPI_RX,"rtw_wapi_drop_for_key_absent: pWapiSta->PeerMacAddr ",pWapiSta->PeerMacAddr,6); ++ if (_rtw_memcmp(pRA, pWapiSta->PeerMacAddr, 6) == _TRUE){ ++ bFindMatchPeer = true; ++ break; ++ } ++ } ++ if (bFindMatchPeer) { ++ if (!pWapiSta->wapiUsk.bTxEnable){ ++ bDrop = true; ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: unicast key is absent \n"); ++ return bDrop; ++ } ++ } ++ else{ ++ bDrop = true; ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: no peer find \n"); ++ return bDrop; ++ } ++ ++ } ++ else{ ++ bDrop = true; ++ WAPI_TRACE(WAPI_RX,"rtw_wapi_drop_for_key_absent: no sta exist \n"); ++ return bDrop; ++ } ++ } ++ } ++ else ++ { ++ return bDrop; ++ } ++ ++ return bDrop; ++} ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wapi_sms4.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wapi_sms4.c +old mode 100755 +new mode 100644 +index 6126ed9..aa64193 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wapi_sms4.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wapi_sms4.c +@@ -1,923 +1,923 @@ +-#ifdef CONFIG_WAPI_SUPPORT +- +-#include +-#include +-#include +-#include +- +- +-#ifdef CONFIG_WAPI_SW_SMS4 +- +-#define WAPI_LITTLE_ENDIAN +-//#define BIG_ENDIAN +-#define ENCRYPT 0 +-#define DECRYPT 1 +- +- +-/********************************************************** +- **********************************************************/ +-const u8 Sbox[256] = { +-0xd6,0x90,0xe9,0xfe,0xcc,0xe1,0x3d,0xb7,0x16,0xb6,0x14,0xc2,0x28,0xfb,0x2c,0x05, +-0x2b,0x67,0x9a,0x76,0x2a,0xbe,0x04,0xc3,0xaa,0x44,0x13,0x26,0x49,0x86,0x06,0x99, +-0x9c,0x42,0x50,0xf4,0x91,0xef,0x98,0x7a,0x33,0x54,0x0b,0x43,0xed,0xcf,0xac,0x62, +-0xe4,0xb3,0x1c,0xa9,0xc9,0x08,0xe8,0x95,0x80,0xdf,0x94,0xfa,0x75,0x8f,0x3f,0xa6, +-0x47,0x07,0xa7,0xfc,0xf3,0x73,0x17,0xba,0x83,0x59,0x3c,0x19,0xe6,0x85,0x4f,0xa8, +-0x68,0x6b,0x81,0xb2,0x71,0x64,0xda,0x8b,0xf8,0xeb,0x0f,0x4b,0x70,0x56,0x9d,0x35, +-0x1e,0x24,0x0e,0x5e,0x63,0x58,0xd1,0xa2,0x25,0x22,0x7c,0x3b,0x01,0x21,0x78,0x87, +-0xd4,0x00,0x46,0x57,0x9f,0xd3,0x27,0x52,0x4c,0x36,0x02,0xe7,0xa0,0xc4,0xc8,0x9e, +-0xea,0xbf,0x8a,0xd2,0x40,0xc7,0x38,0xb5,0xa3,0xf7,0xf2,0xce,0xf9,0x61,0x15,0xa1, +-0xe0,0xae,0x5d,0xa4,0x9b,0x34,0x1a,0x55,0xad,0x93,0x32,0x30,0xf5,0x8c,0xb1,0xe3, +-0x1d,0xf6,0xe2,0x2e,0x82,0x66,0xca,0x60,0xc0,0x29,0x23,0xab,0x0d,0x53,0x4e,0x6f, +-0xd5,0xdb,0x37,0x45,0xde,0xfd,0x8e,0x2f,0x03,0xff,0x6a,0x72,0x6d,0x6c,0x5b,0x51, +-0x8d,0x1b,0xaf,0x92,0xbb,0xdd,0xbc,0x7f,0x11,0xd9,0x5c,0x41,0x1f,0x10,0x5a,0xd8, +-0x0a,0xc1,0x31,0x88,0xa5,0xcd,0x7b,0xbd,0x2d,0x74,0xd0,0x12,0xb8,0xe5,0xb4,0xb0, +-0x89,0x69,0x97,0x4a,0x0c,0x96,0x77,0x7e,0x65,0xb9,0xf1,0x09,0xc5,0x6e,0xc6,0x84, +-0x18,0xf0,0x7d,0xec,0x3a,0xdc,0x4d,0x20,0x79,0xee,0x5f,0x3e,0xd7,0xcb,0x39,0x48 +-}; +- +-const u32 CK[32] = { +- 0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269, +- 0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9, +- 0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249, +- 0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9, +- 0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229, +- 0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299, +- 0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209, +- 0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279 }; +- +-#define Rotl(_x, _y) (((_x) << (_y)) | ((_x) >> (32 - (_y)))) +- +-#define ByteSub(_A) (Sbox[(_A) >> 24 & 0xFF] << 24 | \ +- Sbox[(_A) >> 16 & 0xFF] << 16 | \ +- Sbox[(_A) >> 8 & 0xFF] << 8 | \ +- Sbox[(_A) & 0xFF]) +- +-#define L1(_B) ((_B) ^ Rotl(_B, 2) ^ Rotl(_B, 10) ^ Rotl(_B, 18) ^ Rotl(_B, 24)) +-#define L2(_B) ((_B) ^ Rotl(_B, 13) ^ Rotl(_B, 23)) +- +-static void +-xor_block(void *dst, void *src1, void *src2) +-/* 128-bit xor: *dst = *src1 xor *src2. Pointers must be 32-bit aligned */ +-{ +- ((u32 *)dst)[0] = ((u32 *)src1)[0] ^ ((u32 *)src2)[0]; +- ((u32 *)dst)[1] = ((u32 *)src1)[1] ^ ((u32 *)src2)[1]; +- ((u32 *)dst)[2] = ((u32 *)src1)[2] ^ ((u32 *)src2)[2]; +- ((u32 *)dst)[3] = ((u32 *)src1)[3] ^ ((u32 *)src2)[3]; +-} +- +- +-void SMS4Crypt(u8 *Input, u8 *Output, u32 *rk) +-{ +- u32 r, mid, x0, x1, x2, x3, *p; +- p = (u32 *)Input; +- x0 = p[0]; +- x1 = p[1]; +- x2 = p[2]; +- x3 = p[3]; +-#ifdef WAPI_LITTLE_ENDIAN +- x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); +- x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); +- x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); +- x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); +-#endif +- for (r = 0; r < 32; r += 4) +- { +- mid = x1 ^ x2 ^ x3 ^ rk[r + 0]; +- mid = ByteSub(mid); +- x0 ^= L1(mid); +- mid = x2 ^ x3 ^ x0 ^ rk[r + 1]; +- mid = ByteSub(mid); +- x1 ^= L1(mid); +- mid = x3 ^ x0 ^ x1 ^ rk[r + 2]; +- mid = ByteSub(mid); +- x2 ^= L1(mid); +- mid = x0 ^ x1 ^ x2 ^ rk[r + 3]; +- mid = ByteSub(mid); +- x3 ^= L1(mid); +- } +-#ifdef WAPI_LITTLE_ENDIAN +- x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); +- x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); +- x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); +- x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); +-#endif +- p = (u32 *)Output; +- p[0] = x3; +- p[1] = x2; +- p[2] = x1; +- p[3] = x0; +-} +- +- +- +-void SMS4KeyExt(u8 *Key, u32 *rk, u32 CryptFlag) +-{ +- u32 r, mid, x0, x1, x2, x3, *p; +- +- p = (u32 *)Key; +- x0 = p[0]; +- x1 = p[1]; +- x2 = p[2]; +- x3 = p[3]; +-#ifdef WAPI_LITTLE_ENDIAN +- x0 = Rotl(x0, 16); x0 = ((x0 & 0xFF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); +- x1 = Rotl(x1, 16); x1 = ((x1 & 0xFF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); +- x2 = Rotl(x2, 16); x2 = ((x2 & 0xFF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); +- x3 = Rotl(x3, 16); x3 = ((x3 & 0xFF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); +-#endif +- +- x0 ^= 0xa3b1bac6; +- x1 ^= 0x56aa3350; +- x2 ^= 0x677d9197; +- x3 ^= 0xb27022dc; +- for (r = 0; r < 32; r += 4) +- { +- mid = x1 ^ x2 ^ x3 ^ CK[r + 0]; +- mid = ByteSub(mid); +- rk[r + 0] = x0 ^= L2(mid); +- mid = x2 ^ x3 ^ x0 ^ CK[r + 1]; +- mid = ByteSub(mid); +- rk[r + 1] = x1 ^= L2(mid); +- mid = x3 ^ x0 ^ x1 ^ CK[r + 2]; +- mid = ByteSub(mid); +- rk[r + 2] = x2 ^= L2(mid); +- mid = x0 ^ x1 ^ x2 ^ CK[r + 3]; +- mid = ByteSub(mid); +- rk[r + 3] = x3 ^= L2(mid); +- } +- if (CryptFlag == DECRYPT) +- { +- for (r = 0; r < 16; r++) +- mid = rk[r], rk[r] = rk[31 - r], rk[31 - r] = mid; +- } +-} +- +- +-void WapiSMS4Cryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength, +- u8 *Output, u16 *OutputLength, u32 CryptFlag) +-{ +- u32 blockNum,i,j, rk[32]; +- u16 remainder; +- u8 blockIn[16],blockOut[16], tempIV[16], k; +- +- *OutputLength = 0; +- remainder = InputLength & 0x0F; +- blockNum = InputLength >> 4; +- if(remainder !=0) +- blockNum++; +- else +- remainder = 16; +- +- for(k=0;k<16;k++) +- tempIV[k] = IV[15-k]; +- +- memcpy(blockIn, tempIV, 16); +- +- SMS4KeyExt((u8 *)Key, rk,CryptFlag); +- +- for(i=0; i> 4; +- +- for(k=0;k<16;k++) +- tempIV[k] = IV[15-k]; +- +- memcpy(BlockIn, tempIV, 16); +- +- SMS4KeyExt((u8 *)Key, rk, ENCRYPT); +- +- SMS4Crypt((u8 *)BlockIn, BlockOut, rk); +- +- for(i=0; i> 4; +- +- for(i=0; i%s\n", __FUNCTION__); +- +- header = (struct ieee80211_hdr_3addr_qos *)pHeader; +- memset(TempBuf, 0, 34); +- memcpy(TempBuf, pHeader, 2); //FrameCtrl +- pTemp = (u16*)TempBuf; +- *pTemp &= 0xc78f; //bit4,5,6,11,12,13 +- +- memcpy((TempBuf+2), (pHeader+4), 12); //Addr1, Addr2 +- memcpy((TempBuf+14), (pHeader+22), 2); // SeqCtrl +- pTemp = (u16*)(TempBuf + 14); +- *pTemp &= 0x000f; +- +- memcpy((TempBuf+16), (pHeader+16), 6); //Addr3 +- +- fc = le16_to_cpu(header->frame_ctl); +- +- +- +- if (GetFrDs((u16*)&fc) && GetToDs((u16 *)&fc)) +- { +- memcpy((TempBuf+22), (pHeader+24), 6); +- QosOffset = 30; +- }else{ +- memset((TempBuf+22), 0, 6); +- QosOffset = 24; +- } +- +- if((fc & 0x0088) == 0x0088){ +- memcpy((TempBuf+28), (pHeader+QosOffset), 2); +- TempLen += 2; +- //IV = pHeader + QosOffset + 2 + SNAP_SIZE + sizeof(u16) + 2; +- IV = pHeader + QosOffset + 2 + 2; +- }else{ +- IV = pHeader + QosOffset + 2; +- //IV = pHeader + QosOffset + SNAP_SIZE + sizeof(u16) + 2; +- } +- +- TempBuf[TempLen-1] = (u8)(DataLen & 0xff); +- TempBuf[TempLen-2] = (u8)((DataLen & 0xff00)>>8); +- TempBuf[TempLen-4] = KeyIdx; +- +- WAPI_DATA(WAPI_TX, "CalculateMic - KEY", MicKey, 16); +- WAPI_DATA(WAPI_TX, "CalculateMic - IV", IV, 16); +- WAPI_DATA(WAPI_TX, "CalculateMic - TempBuf", TempBuf, TempLen); +- WAPI_DATA(WAPI_TX, "CalculateMic - pData", pData, DataLen); +- +- WapiSMS4CalculateMic(MicKey, IV, TempBuf, TempLen, +- pData, DataLen, MicBuffer, &MicLen); +- +- if (MicLen != 16) +- WAPI_TRACE(WAPI_ERR,"%s: MIC Length Error!!\n",__FUNCTION__); +- +- WAPI_TRACE(WAPI_TX|WAPI_RX, "<=========%s\n", __FUNCTION__); +-#endif +-} +- +-/* AddCount: 1 or 2. +- * If overflow, return 1, +- * else return 0. +- */ +-u8 WapiIncreasePN(u8 *PN, u8 AddCount) +-{ +- u8 i; +- +- if (NULL == PN) +- return 1; +- //YJ,test,091102 +- /* +- if(AddCount == 2){ +- DBG_8192C("############################%s(): PN[0]=0x%x\n", __FUNCTION__, PN[0]); +- if(PN[0] == 0x48){ +- PN[0] += AddCount; +- return 1; +- }else{ +- PN[0] += AddCount; +- return 0; +- } +- } +- */ +- //YJ,test,091102,end +- +- for (i=0; i<16; i++) +- { +- if (PN[i] + AddCount <= 0xff) +- { +- PN[i] += AddCount; +- return 0; +- } +- else +- { +- PN[i] += AddCount; +- AddCount = 1; +- } +- } +- return 1; +-} +- +- +-void WapiGetLastRxUnicastPNForQoSData( +- u8 UserPriority, +- PRT_WAPI_STA_INFO pWapiStaInfo, +- u8 *PNOut +-) +-{ +- WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); +- switch(UserPriority) +- { +- case 0: +- case 3: +- memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBEQueue,16); +- break; +- case 1: +- case 2: +- memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBKQueue,16); +- break; +- case 4: +- case 5: +- memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVIQueue,16); +- break; +- case 6: +- case 7: +- memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVOQueue,16); +- break; +- default: +- WAPI_TRACE(WAPI_ERR, "%s: Unknown TID \n", __FUNCTION__); +- break; +- } +- WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__); +-} +- +- +-void WapiSetLastRxUnicastPNForQoSData( +- u8 UserPriority, +- u8 *PNIn, +- PRT_WAPI_STA_INFO pWapiStaInfo +-) +-{ +- WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); +- switch(UserPriority) +- { +- case 0: +- case 3: +- memcpy(pWapiStaInfo->lastRxUnicastPNBEQueue,PNIn,16); +- break; +- case 1: +- case 2: +- memcpy(pWapiStaInfo->lastRxUnicastPNBKQueue,PNIn,16); +- break; +- case 4: +- case 5: +- memcpy(pWapiStaInfo->lastRxUnicastPNVIQueue,PNIn,16); +- break; +- case 6: +- case 7: +- memcpy(pWapiStaInfo->lastRxUnicastPNVOQueue,PNIn,16); +- break; +- default: +- WAPI_TRACE(WAPI_ERR, "%s: Unknown TID \n", __FUNCTION__); +- break; +- } +- WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__); +-} +- +- +-/**************************************************************************** +- FALSE not RX-Reorder +- TRUE do RX Reorder +-add to support WAPI to N-mode +-*****************************************************************************/ +-u8 WapiCheckPnInSwDecrypt( +- _adapter *padapter, +- struct sk_buff *pskb +-) +-{ +- u8 ret = false; +- +-#if 0 +- struct ieee80211_hdr_3addr_qos *header; +- u16 fc; +- u8 *pDaddr, *pTaddr, *pRaddr; +- +- header = (struct ieee80211_hdr_3addr_qos *)pskb->data; +- pTaddr = header->addr2; +- pRaddr = header->addr1; +- fc = le16_to_cpu(header->frame_ctl); +- +- if(GetToDs(&fc)) +- pDaddr = header->addr3; +- else +- pDaddr = header->addr1; +- +- if ((_rtw_memcmp(pRaddr, padapter->pnetdev->dev_addr, ETH_ALEN) == 0) +- && ! (pDaddr) +- && (GetFrameType(&fc) == WIFI_QOS_DATA_TYPE)) +- //&& ieee->pHTInfo->bCurrentHTSupport && +- //ieee->pHTInfo->bCurRxReorderEnable) +- ret = false; +- else +- ret = true; +-#endif +- WAPI_TRACE(WAPI_RX, "%s: return %d\n", __FUNCTION__, ret); +- return ret; +-} +- +-int SecSMS4HeaderFillIV(_adapter *padapter, u8 *pxmitframe) +-{ +- struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib; +- u8 * frame = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET; +- u8 *pSecHeader = NULL, *pos = NULL, *pRA = NULL; +- u8 bPNOverflow = false, bFindMatchPeer = false, hdr_len = 0; +- PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL; +- PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; +- PRT_WAPI_STA_INFO pWapiSta = NULL; +- int ret = 0; +- +- WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); +- +- return ret; +-#if 0 +- hdr_len = sMacHdrLng; +- if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE) +- { +- hdr_len += 2; +- } +- //hdr_len += SNAP_SIZE + sizeof(u16); +- +- pos = skb_push(pskb, padapter->wapiInfo.extra_prefix_len); +- memmove(pos, pos+padapter->wapiInfo.extra_prefix_len, hdr_len); +- +- pSecHeader = pskb->data + hdr_len; +- pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)pSecHeader; +- pRA = pskb->data + 4; +- +- WAPI_DATA(WAPI_TX, "FillIV - Before Fill IV", pskb->data, pskb->len); +- +- //Address 1 is always receiver's address +- if( IS_MCAST(pRA) ){ +- if(!pWapiInfo->wapiTxMsk.bTxEnable){ +- WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); +- return -2; +- } +- if(pWapiInfo->wapiTxMsk.keyId <= 1){ +- pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId; +- pWapiExt->Reserved = 0; +- bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1); +- memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16); +- if (bPNOverflow){ +- // Update MSK Notification. +- WAPI_TRACE(WAPI_ERR,"===============>%s():multicast PN overflow\n",__FUNCTION__); +- rtw_wapi_app_event_handler(padapter,NULL,0,pRA, false, false, true, 0, false); +- } +- }else{ +- WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Multicast KeyIdx!!\n",__FUNCTION__); +- ret = -3; +- } +- } +- else{ +- list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { +- if(!memcmp(pWapiSta->PeerMacAddr,pRA,6)){ +- bFindMatchPeer = true; +- break; +- } +- } +- if (bFindMatchPeer){ +- if((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)){ +- WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); +- return -4; +- } +- if (pWapiSta->wapiUsk.keyId <= 1){ +- if(pWapiSta->wapiUskUpdate.bTxEnable) +- pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId; +- else +- pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId; +- +- pWapiExt->Reserved = 0; +- bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2); +- memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16); +- if (bPNOverflow){ +- // Update USK Notification. +- WAPI_TRACE(WAPI_ERR,"===============>%s():unicast PN overflow\n",__FUNCTION__); +- rtw_wapi_app_event_handler(padapter,NULL,0,pWapiSta->PeerMacAddr, false, true, false, 0, false); +- } +- }else{ +- WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Unicast KeyIdx!!\n",__FUNCTION__); +- ret = -5; +- } +- } +- else{ +- WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta "MAC_FMT"!!\n",__FUNCTION__, MAC_ARG(pRA)); +- ret = -6; +- } +- } +- +- WAPI_DATA(WAPI_TX, "FillIV - After Fill IV", pskb->data, pskb->len); +- WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); +- return ret; +-#endif +-} +- +-// WAPI SW Enc: must have done Coalesce! +-void SecSWSMS4Encryption( +- _adapter *padapter, +- u8 * pxmitframe +- ) +-{ +- PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; +- PRT_WAPI_STA_INFO pWapiSta = NULL; +- u8 *pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE; +- struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib; +- +- u8 *SecPtr = NULL, *pRA, *pMicKey = NULL, *pDataKey = NULL, *pIV = NULL; +- u8 IVOffset, DataOffset, bFindMatchPeer = false, KeyIdx = 0, MicBuffer[16]; +- u16 OutputLength; +- +- WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); +- +- WAPI_TRACE(WAPI_TX,"hdrlen: %d \n",pattrib->hdrlen); +- +- return; +- +- DataOffset = pattrib->hdrlen + pattrib->iv_len; +- +- pRA = pframe + 4; +- +- +- if( IS_MCAST(pRA) ){ +- KeyIdx = pWapiInfo->wapiTxMsk.keyId; +- pIV = pWapiInfo->lastTxMulticastPN; +- pMicKey = pWapiInfo->wapiTxMsk.micKey; +- pDataKey = pWapiInfo->wapiTxMsk.dataKey; +- }else{ +- if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){ +- list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { +- if (0 == memcmp(pWapiSta->PeerMacAddr, pRA, 6)){ +- bFindMatchPeer = true; +- break; +- } +- } +- +- if (bFindMatchPeer){ +- if (pWapiSta->wapiUskUpdate.bTxEnable){ +- KeyIdx = pWapiSta->wapiUskUpdate.keyId; +- WAPI_TRACE(WAPI_TX, "%s(): Use update USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx); +- pIV = pWapiSta->lastTxUnicastPN; +- pMicKey = pWapiSta->wapiUskUpdate.micKey; +- pDataKey = pWapiSta->wapiUskUpdate.dataKey; +- }else{ +- KeyIdx = pWapiSta->wapiUsk.keyId; +- WAPI_TRACE(WAPI_TX, "%s(): Use USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx); +- pIV = pWapiSta->lastTxUnicastPN; +- pMicKey = pWapiSta->wapiUsk.micKey; +- pDataKey = pWapiSta->wapiUsk.dataKey; +- } +- }else{ +- WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta!!\n",__FUNCTION__); +- return; +- } +- }else{ +- WAPI_TRACE(WAPI_ERR,"%s: wapiSTAUsedList is empty!!\n",__FUNCTION__); +- return; +- } +- } +- +- SecPtr = pframe; +- SecCalculateMicSMS4(KeyIdx, pMicKey, SecPtr, (SecPtr+DataOffset), pattrib->pktlen, MicBuffer); +- +- WAPI_DATA(WAPI_TX, "Encryption - MIC", MicBuffer, padapter->wapiInfo.extra_postfix_len); +- +- memcpy(pframe+pattrib->hdrlen+pattrib->iv_len+pattrib->pktlen-pattrib->icv_len, +- (u8 *)MicBuffer, +- padapter->wapiInfo.extra_postfix_len +- ); +- +- +- WapiSMS4Encryption(pDataKey, pIV, (SecPtr+DataOffset),pattrib->pktlen+pattrib->icv_len, (SecPtr+DataOffset), &OutputLength); +- +- WAPI_DATA(WAPI_TX, "Encryption - After SMS4 encryption",pframe,pattrib->hdrlen+pattrib->iv_len+pattrib->pktlen); +- +- WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); +-} +- +-u8 SecSWSMS4Decryption( +- _adapter *padapter, +- u8 *precv_frame, +- struct recv_priv *precv_priv +- ) +-{ +- PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; +- struct recv_frame_hdr *precv_hdr; +- PRT_WAPI_STA_INFO pWapiSta = NULL; +- u8 IVOffset, DataOffset, bFindMatchPeer = false, bUseUpdatedKey = false; +- u8 KeyIdx, MicBuffer[16], lastRxPNforQoS[16]; +- u8 *pRA, *pTA, *pMicKey, *pDataKey, *pLastRxPN, *pRecvPN, *pSecData, *pRecvMic, *pos; +- u8 TID = 0; +- u16 OutputLength, DataLen; +- u8 bQosData; +- struct sk_buff * pskb; +- +- WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__); +- +- return 0; +- +- precv_hdr = &((union recv_frame*)precv_frame)->u.hdr; +- pskb = (struct sk_buff *)(precv_hdr->rx_data); +- precv_hdr->bWapiCheckPNInDecrypt = WapiCheckPnInSwDecrypt(padapter, pskb); +- WAPI_TRACE(WAPI_RX, "=========>%s: check PN %d\n", __FUNCTION__,precv_hdr->bWapiCheckPNInDecrypt); +- WAPI_DATA(WAPI_RX, "Decryption - Before decryption", pskb->data, pskb->len); +- +- IVOffset = sMacHdrLng; +- bQosData = GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE; +- if (bQosData){ +- IVOffset += 2; +- } +- +- //if(GetHTC()) +- // IVOffset += 4; +- +- //IVOffset += SNAP_SIZE + sizeof(u16); +- +- DataOffset = IVOffset + padapter->wapiInfo.extra_prefix_len; +- +- pRA = pskb->data + 4; +- pTA = pskb->data + 10; +- KeyIdx = *(pskb->data + IVOffset); +- pRecvPN = pskb->data + IVOffset + 2; +- pSecData = pskb->data + DataOffset; +- DataLen = pskb->len - DataOffset; +- pRecvMic = pskb->data + pskb->len - padapter->wapiInfo.extra_postfix_len; +- TID = GetTid(pskb->data); +- +- if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){ +- list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { +- if (0 == memcmp(pWapiSta->PeerMacAddr, pTA, 6)){ +- bFindMatchPeer = true; +- break; +- } +- } +- } +- +- if (!bFindMatchPeer){ +- WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT" for Key Info!!!\n", __FUNCTION__, MAC_ARG(pTA)); +- return false; +- } +- +- if( IS_MCAST(pRA) ){ +- WAPI_TRACE(WAPI_RX, "%s: Multicast decryption !!!\n", __FUNCTION__); +- if (pWapiSta->wapiMsk.keyId == KeyIdx && pWapiSta->wapiMsk.bSet){ +- pLastRxPN = pWapiSta->lastRxMulticastPN; +- if (!WapiComparePN(pRecvPN, pLastRxPN)){ +- WAPI_TRACE(WAPI_ERR, "%s: MSK PN is not larger than last, Dropped!!!\n", __FUNCTION__); +- WAPI_DATA(WAPI_ERR, "pRecvPN:", pRecvPN, 16); +- WAPI_DATA(WAPI_ERR, "pLastRxPN:", pLastRxPN, 16); +- return false; +- } +- +- memcpy(pLastRxPN, pRecvPN, 16); +- pMicKey = pWapiSta->wapiMsk.micKey; +- pDataKey = pWapiSta->wapiMsk.dataKey; +- }else if (pWapiSta->wapiMskUpdate.keyId == KeyIdx && pWapiSta->wapiMskUpdate.bSet){ +- WAPI_TRACE(WAPI_RX, "%s: Use Updated MSK for Decryption !!!\n", __FUNCTION__); +- bUseUpdatedKey = true; +- memcpy(pWapiSta->lastRxMulticastPN, pRecvPN, 16); +- pMicKey = pWapiSta->wapiMskUpdate.micKey; +- pDataKey = pWapiSta->wapiMskUpdate.dataKey; +- }else{ +- WAPI_TRACE(WAPI_ERR, "%s: Can not find MSK with matched KeyIdx(%d), Dropped !!!\n", __FUNCTION__,KeyIdx); +- return false; +- } +- } +- else{ +- WAPI_TRACE(WAPI_RX, "%s: Unicast decryption !!!\n", __FUNCTION__); +- if (pWapiSta->wapiUsk.keyId == KeyIdx && pWapiSta->wapiUsk.bSet){ +- WAPI_TRACE(WAPI_RX, "%s: Use USK for Decryption!!!\n", __FUNCTION__); +- if(precv_hdr->bWapiCheckPNInDecrypt){ +- if(GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE){ +- WapiGetLastRxUnicastPNForQoSData(TID, pWapiSta, lastRxPNforQoS); +- pLastRxPN = lastRxPNforQoS; +- }else{ +- pLastRxPN = pWapiSta->lastRxUnicastPN; +- } +- if (!WapiComparePN(pRecvPN, pLastRxPN)){ +- return false; +- } +- if(bQosData){ +- WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta); +- }else{ +- memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16); +- } +- }else{ +- memcpy(precv_hdr->WapiTempPN,pRecvPN,16); +- } +- +- if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE)) +- { +- if ((pRecvPN[0] & 0x1) == 0){ +- WAPI_TRACE(WAPI_ERR, "%s: Rx USK PN is not odd when Infra STA mode, Dropped !!!\n", __FUNCTION__); +- return false; +- } +- } +- +- pMicKey = pWapiSta->wapiUsk.micKey; +- pDataKey = pWapiSta->wapiUsk.dataKey; +- } +- else if (pWapiSta->wapiUskUpdate.keyId == KeyIdx && pWapiSta->wapiUskUpdate.bSet ){ +- WAPI_TRACE(WAPI_RX, "%s: Use Updated USK for Decryption!!!\n", __FUNCTION__); +- if(pWapiSta->bAuthenticatorInUpdata) +- bUseUpdatedKey = true; +- else +- bUseUpdatedKey = false; +- +- if(bQosData){ +- WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta); +- }else{ +- memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16); +- } +- pMicKey = pWapiSta->wapiUskUpdate.micKey; +- pDataKey = pWapiSta->wapiUskUpdate.dataKey; +- }else{ +- WAPI_TRACE(WAPI_ERR, "%s: No valid USK!!!KeyIdx=%d pWapiSta->wapiUsk.keyId=%d pWapiSta->wapiUskUpdate.keyId=%d\n", __FUNCTION__, KeyIdx, pWapiSta->wapiUsk.keyId, pWapiSta->wapiUskUpdate.keyId); +- //dump_buf(pskb->data,pskb->len); +- return false; +- } +- } +- +- WAPI_DATA(WAPI_RX, "Decryption - DataKey", pDataKey, 16); +- WAPI_DATA(WAPI_RX, "Decryption - IV", pRecvPN, 16); +- WapiSMS4Decryption(pDataKey, pRecvPN, pSecData, DataLen, pSecData, &OutputLength); +- +- if (OutputLength != DataLen) +- WAPI_TRACE(WAPI_ERR, "%s: Output Length Error!!!!\n", __FUNCTION__); +- +- WAPI_DATA(WAPI_RX, "Decryption - After decryption", pskb->data, pskb->len); +- +- DataLen -= padapter->wapiInfo.extra_postfix_len; +- +- SecCalculateMicSMS4(KeyIdx, pMicKey, pskb->data, pSecData, DataLen, MicBuffer); +- +- WAPI_DATA(WAPI_RX, "Decryption - MIC received", pRecvMic, SMS4_MIC_LEN); +- WAPI_DATA(WAPI_RX, "Decryption - MIC calculated", MicBuffer, SMS4_MIC_LEN); +- +- if (0 == memcmp(MicBuffer, pRecvMic, padapter->wapiInfo.extra_postfix_len)){ +- WAPI_TRACE(WAPI_RX, "%s: Check MIC OK!!\n", __FUNCTION__); +- if (bUseUpdatedKey){ +- // delete the old key +- if ( IS_MCAST(pRA) ){ +- WAPI_TRACE(WAPI_API, "%s(): AE use new update MSK!!\n", __FUNCTION__); +- pWapiSta->wapiMsk.keyId = pWapiSta->wapiMskUpdate.keyId; +- memcpy(pWapiSta->wapiMsk.dataKey, pWapiSta->wapiMskUpdate.dataKey, 16); +- memcpy(pWapiSta->wapiMsk.micKey, pWapiSta->wapiMskUpdate.micKey, 16); +- pWapiSta->wapiMskUpdate.bTxEnable = pWapiSta->wapiMskUpdate.bSet = false; +- }else{ +- WAPI_TRACE(WAPI_API, "%s(): AE use new update USK!!\n", __FUNCTION__); +- pWapiSta->wapiUsk.keyId = pWapiSta->wapiUskUpdate.keyId; +- memcpy(pWapiSta->wapiUsk.dataKey, pWapiSta->wapiUskUpdate.dataKey, 16); +- memcpy(pWapiSta->wapiUsk.micKey, pWapiSta->wapiUskUpdate.micKey, 16); +- pWapiSta->wapiUskUpdate.bTxEnable = pWapiSta->wapiUskUpdate.bSet = false; +- } +- } +- }else{ +- WAPI_TRACE(WAPI_ERR, "%s: Check MIC Error, Dropped !!!!\n", __FUNCTION__); +- return false; +- } +- +- pos = pskb->data; +- memmove(pos+padapter->wapiInfo.extra_prefix_len, pos, IVOffset); +- skb_pull(pskb, padapter->wapiInfo.extra_prefix_len); +- +- WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__); +- +- return true; +-} +- +-u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe) +-{ +- +- u8 *pframe; +- u32 res = _SUCCESS; +- +- WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) +- { +- WAPI_TRACE(WAPI_TX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__); +- return _FAIL; +- } +- +- if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) +- return _FAIL; +- +- pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET; +- +- SecSWSMS4Encryption(padapter, pxmitframe); +- +- WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); +- return res; +-} +- +-u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe) +-{ +- u8 *pframe; +- u32 res = _SUCCESS; +- +- WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__); +- +- if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) +- { +- WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__); +- return _FAIL; +- } +- +- +- //drop packet when hw decrypt fail +- //return tempraily +- return _FAIL; +- +- //pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; +- +- if (false == SecSWSMS4Decryption(padapter, precvframe, &padapter->recvpriv)) +- { +- WAPI_TRACE(WAPI_ERR, "%s():SMS4 decrypt frame error\n",__FUNCTION__); +- return _FAIL; +- } +- +- WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__); +- return res; +-} +- +-#else +- +-u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe) +-{ +- WAPI_TRACE(WAPI_TX, "=========>Dummy %s\n", __FUNCTION__); +- WAPI_TRACE(WAPI_TX, "<=========Dummy %s\n", __FUNCTION__); +- return _SUCCESS; +-} +- +-u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe) +-{ +- WAPI_TRACE(WAPI_RX, "=========>Dummy %s\n", __FUNCTION__); +- WAPI_TRACE(WAPI_RX, "<=========Dummy %s\n", __FUNCTION__); +- return _SUCCESS; +-} +- +-#endif +- +-#endif ++#ifdef CONFIG_WAPI_SUPPORT ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef CONFIG_WAPI_SW_SMS4 ++ ++#define WAPI_LITTLE_ENDIAN ++//#define BIG_ENDIAN ++#define ENCRYPT 0 ++#define DECRYPT 1 ++ ++ ++/********************************************************** ++ **********************************************************/ ++const u8 Sbox[256] = { ++0xd6,0x90,0xe9,0xfe,0xcc,0xe1,0x3d,0xb7,0x16,0xb6,0x14,0xc2,0x28,0xfb,0x2c,0x05, ++0x2b,0x67,0x9a,0x76,0x2a,0xbe,0x04,0xc3,0xaa,0x44,0x13,0x26,0x49,0x86,0x06,0x99, ++0x9c,0x42,0x50,0xf4,0x91,0xef,0x98,0x7a,0x33,0x54,0x0b,0x43,0xed,0xcf,0xac,0x62, ++0xe4,0xb3,0x1c,0xa9,0xc9,0x08,0xe8,0x95,0x80,0xdf,0x94,0xfa,0x75,0x8f,0x3f,0xa6, ++0x47,0x07,0xa7,0xfc,0xf3,0x73,0x17,0xba,0x83,0x59,0x3c,0x19,0xe6,0x85,0x4f,0xa8, ++0x68,0x6b,0x81,0xb2,0x71,0x64,0xda,0x8b,0xf8,0xeb,0x0f,0x4b,0x70,0x56,0x9d,0x35, ++0x1e,0x24,0x0e,0x5e,0x63,0x58,0xd1,0xa2,0x25,0x22,0x7c,0x3b,0x01,0x21,0x78,0x87, ++0xd4,0x00,0x46,0x57,0x9f,0xd3,0x27,0x52,0x4c,0x36,0x02,0xe7,0xa0,0xc4,0xc8,0x9e, ++0xea,0xbf,0x8a,0xd2,0x40,0xc7,0x38,0xb5,0xa3,0xf7,0xf2,0xce,0xf9,0x61,0x15,0xa1, ++0xe0,0xae,0x5d,0xa4,0x9b,0x34,0x1a,0x55,0xad,0x93,0x32,0x30,0xf5,0x8c,0xb1,0xe3, ++0x1d,0xf6,0xe2,0x2e,0x82,0x66,0xca,0x60,0xc0,0x29,0x23,0xab,0x0d,0x53,0x4e,0x6f, ++0xd5,0xdb,0x37,0x45,0xde,0xfd,0x8e,0x2f,0x03,0xff,0x6a,0x72,0x6d,0x6c,0x5b,0x51, ++0x8d,0x1b,0xaf,0x92,0xbb,0xdd,0xbc,0x7f,0x11,0xd9,0x5c,0x41,0x1f,0x10,0x5a,0xd8, ++0x0a,0xc1,0x31,0x88,0xa5,0xcd,0x7b,0xbd,0x2d,0x74,0xd0,0x12,0xb8,0xe5,0xb4,0xb0, ++0x89,0x69,0x97,0x4a,0x0c,0x96,0x77,0x7e,0x65,0xb9,0xf1,0x09,0xc5,0x6e,0xc6,0x84, ++0x18,0xf0,0x7d,0xec,0x3a,0xdc,0x4d,0x20,0x79,0xee,0x5f,0x3e,0xd7,0xcb,0x39,0x48 ++}; ++ ++const u32 CK[32] = { ++ 0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269, ++ 0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9, ++ 0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249, ++ 0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9, ++ 0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229, ++ 0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299, ++ 0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209, ++ 0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279 }; ++ ++#define Rotl(_x, _y) (((_x) << (_y)) | ((_x) >> (32 - (_y)))) ++ ++#define ByteSub(_A) (Sbox[(_A) >> 24 & 0xFF] << 24 | \ ++ Sbox[(_A) >> 16 & 0xFF] << 16 | \ ++ Sbox[(_A) >> 8 & 0xFF] << 8 | \ ++ Sbox[(_A) & 0xFF]) ++ ++#define L1(_B) ((_B) ^ Rotl(_B, 2) ^ Rotl(_B, 10) ^ Rotl(_B, 18) ^ Rotl(_B, 24)) ++#define L2(_B) ((_B) ^ Rotl(_B, 13) ^ Rotl(_B, 23)) ++ ++static void ++xor_block(void *dst, void *src1, void *src2) ++/* 128-bit xor: *dst = *src1 xor *src2. Pointers must be 32-bit aligned */ ++{ ++ ((u32 *)dst)[0] = ((u32 *)src1)[0] ^ ((u32 *)src2)[0]; ++ ((u32 *)dst)[1] = ((u32 *)src1)[1] ^ ((u32 *)src2)[1]; ++ ((u32 *)dst)[2] = ((u32 *)src1)[2] ^ ((u32 *)src2)[2]; ++ ((u32 *)dst)[3] = ((u32 *)src1)[3] ^ ((u32 *)src2)[3]; ++} ++ ++ ++void SMS4Crypt(u8 *Input, u8 *Output, u32 *rk) ++{ ++ u32 r, mid, x0, x1, x2, x3, *p; ++ p = (u32 *)Input; ++ x0 = p[0]; ++ x1 = p[1]; ++ x2 = p[2]; ++ x3 = p[3]; ++#ifdef WAPI_LITTLE_ENDIAN ++ x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); ++ x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); ++ x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); ++ x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); ++#endif ++ for (r = 0; r < 32; r += 4) ++ { ++ mid = x1 ^ x2 ^ x3 ^ rk[r + 0]; ++ mid = ByteSub(mid); ++ x0 ^= L1(mid); ++ mid = x2 ^ x3 ^ x0 ^ rk[r + 1]; ++ mid = ByteSub(mid); ++ x1 ^= L1(mid); ++ mid = x3 ^ x0 ^ x1 ^ rk[r + 2]; ++ mid = ByteSub(mid); ++ x2 ^= L1(mid); ++ mid = x0 ^ x1 ^ x2 ^ rk[r + 3]; ++ mid = ByteSub(mid); ++ x3 ^= L1(mid); ++ } ++#ifdef WAPI_LITTLE_ENDIAN ++ x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); ++ x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); ++ x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); ++ x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); ++#endif ++ p = (u32 *)Output; ++ p[0] = x3; ++ p[1] = x2; ++ p[2] = x1; ++ p[3] = x0; ++} ++ ++ ++ ++void SMS4KeyExt(u8 *Key, u32 *rk, u32 CryptFlag) ++{ ++ u32 r, mid, x0, x1, x2, x3, *p; ++ ++ p = (u32 *)Key; ++ x0 = p[0]; ++ x1 = p[1]; ++ x2 = p[2]; ++ x3 = p[3]; ++#ifdef WAPI_LITTLE_ENDIAN ++ x0 = Rotl(x0, 16); x0 = ((x0 & 0xFF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); ++ x1 = Rotl(x1, 16); x1 = ((x1 & 0xFF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); ++ x2 = Rotl(x2, 16); x2 = ((x2 & 0xFF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); ++ x3 = Rotl(x3, 16); x3 = ((x3 & 0xFF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); ++#endif ++ ++ x0 ^= 0xa3b1bac6; ++ x1 ^= 0x56aa3350; ++ x2 ^= 0x677d9197; ++ x3 ^= 0xb27022dc; ++ for (r = 0; r < 32; r += 4) ++ { ++ mid = x1 ^ x2 ^ x3 ^ CK[r + 0]; ++ mid = ByteSub(mid); ++ rk[r + 0] = x0 ^= L2(mid); ++ mid = x2 ^ x3 ^ x0 ^ CK[r + 1]; ++ mid = ByteSub(mid); ++ rk[r + 1] = x1 ^= L2(mid); ++ mid = x3 ^ x0 ^ x1 ^ CK[r + 2]; ++ mid = ByteSub(mid); ++ rk[r + 2] = x2 ^= L2(mid); ++ mid = x0 ^ x1 ^ x2 ^ CK[r + 3]; ++ mid = ByteSub(mid); ++ rk[r + 3] = x3 ^= L2(mid); ++ } ++ if (CryptFlag == DECRYPT) ++ { ++ for (r = 0; r < 16; r++) ++ mid = rk[r], rk[r] = rk[31 - r], rk[31 - r] = mid; ++ } ++} ++ ++ ++void WapiSMS4Cryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength, ++ u8 *Output, u16 *OutputLength, u32 CryptFlag) ++{ ++ u32 blockNum,i,j, rk[32]; ++ u16 remainder; ++ u8 blockIn[16],blockOut[16], tempIV[16], k; ++ ++ *OutputLength = 0; ++ remainder = InputLength & 0x0F; ++ blockNum = InputLength >> 4; ++ if(remainder !=0) ++ blockNum++; ++ else ++ remainder = 16; ++ ++ for(k=0;k<16;k++) ++ tempIV[k] = IV[15-k]; ++ ++ memcpy(blockIn, tempIV, 16); ++ ++ SMS4KeyExt((u8 *)Key, rk,CryptFlag); ++ ++ for(i=0; i> 4; ++ ++ for(k=0;k<16;k++) ++ tempIV[k] = IV[15-k]; ++ ++ memcpy(BlockIn, tempIV, 16); ++ ++ SMS4KeyExt((u8 *)Key, rk, ENCRYPT); ++ ++ SMS4Crypt((u8 *)BlockIn, BlockOut, rk); ++ ++ for(i=0; i> 4; ++ ++ for(i=0; i%s\n", __FUNCTION__); ++ ++ header = (struct ieee80211_hdr_3addr_qos *)pHeader; ++ memset(TempBuf, 0, 34); ++ memcpy(TempBuf, pHeader, 2); //FrameCtrl ++ pTemp = (u16*)TempBuf; ++ *pTemp &= 0xc78f; //bit4,5,6,11,12,13 ++ ++ memcpy((TempBuf+2), (pHeader+4), 12); //Addr1, Addr2 ++ memcpy((TempBuf+14), (pHeader+22), 2); // SeqCtrl ++ pTemp = (u16*)(TempBuf + 14); ++ *pTemp &= 0x000f; ++ ++ memcpy((TempBuf+16), (pHeader+16), 6); //Addr3 ++ ++ fc = le16_to_cpu(header->frame_ctl); ++ ++ ++ ++ if (GetFrDs((u16*)&fc) && GetToDs((u16 *)&fc)) ++ { ++ memcpy((TempBuf+22), (pHeader+24), 6); ++ QosOffset = 30; ++ }else{ ++ memset((TempBuf+22), 0, 6); ++ QosOffset = 24; ++ } ++ ++ if((fc & 0x0088) == 0x0088){ ++ memcpy((TempBuf+28), (pHeader+QosOffset), 2); ++ TempLen += 2; ++ //IV = pHeader + QosOffset + 2 + SNAP_SIZE + sizeof(u16) + 2; ++ IV = pHeader + QosOffset + 2 + 2; ++ }else{ ++ IV = pHeader + QosOffset + 2; ++ //IV = pHeader + QosOffset + SNAP_SIZE + sizeof(u16) + 2; ++ } ++ ++ TempBuf[TempLen-1] = (u8)(DataLen & 0xff); ++ TempBuf[TempLen-2] = (u8)((DataLen & 0xff00)>>8); ++ TempBuf[TempLen-4] = KeyIdx; ++ ++ WAPI_DATA(WAPI_TX, "CalculateMic - KEY", MicKey, 16); ++ WAPI_DATA(WAPI_TX, "CalculateMic - IV", IV, 16); ++ WAPI_DATA(WAPI_TX, "CalculateMic - TempBuf", TempBuf, TempLen); ++ WAPI_DATA(WAPI_TX, "CalculateMic - pData", pData, DataLen); ++ ++ WapiSMS4CalculateMic(MicKey, IV, TempBuf, TempLen, ++ pData, DataLen, MicBuffer, &MicLen); ++ ++ if (MicLen != 16) ++ WAPI_TRACE(WAPI_ERR,"%s: MIC Length Error!!\n",__FUNCTION__); ++ ++ WAPI_TRACE(WAPI_TX|WAPI_RX, "<=========%s\n", __FUNCTION__); ++#endif ++} ++ ++/* AddCount: 1 or 2. ++ * If overflow, return 1, ++ * else return 0. ++ */ ++u8 WapiIncreasePN(u8 *PN, u8 AddCount) ++{ ++ u8 i; ++ ++ if (NULL == PN) ++ return 1; ++ //YJ,test,091102 ++ /* ++ if(AddCount == 2){ ++ DBG_8192C("############################%s(): PN[0]=0x%x\n", __FUNCTION__, PN[0]); ++ if(PN[0] == 0x48){ ++ PN[0] += AddCount; ++ return 1; ++ }else{ ++ PN[0] += AddCount; ++ return 0; ++ } ++ } ++ */ ++ //YJ,test,091102,end ++ ++ for (i=0; i<16; i++) ++ { ++ if (PN[i] + AddCount <= 0xff) ++ { ++ PN[i] += AddCount; ++ return 0; ++ } ++ else ++ { ++ PN[i] += AddCount; ++ AddCount = 1; ++ } ++ } ++ return 1; ++} ++ ++ ++void WapiGetLastRxUnicastPNForQoSData( ++ u8 UserPriority, ++ PRT_WAPI_STA_INFO pWapiStaInfo, ++ u8 *PNOut ++) ++{ ++ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); ++ switch(UserPriority) ++ { ++ case 0: ++ case 3: ++ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBEQueue,16); ++ break; ++ case 1: ++ case 2: ++ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBKQueue,16); ++ break; ++ case 4: ++ case 5: ++ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVIQueue,16); ++ break; ++ case 6: ++ case 7: ++ memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVOQueue,16); ++ break; ++ default: ++ WAPI_TRACE(WAPI_ERR, "%s: Unknown TID \n", __FUNCTION__); ++ break; ++ } ++ WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__); ++} ++ ++ ++void WapiSetLastRxUnicastPNForQoSData( ++ u8 UserPriority, ++ u8 *PNIn, ++ PRT_WAPI_STA_INFO pWapiStaInfo ++) ++{ ++ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); ++ switch(UserPriority) ++ { ++ case 0: ++ case 3: ++ memcpy(pWapiStaInfo->lastRxUnicastPNBEQueue,PNIn,16); ++ break; ++ case 1: ++ case 2: ++ memcpy(pWapiStaInfo->lastRxUnicastPNBKQueue,PNIn,16); ++ break; ++ case 4: ++ case 5: ++ memcpy(pWapiStaInfo->lastRxUnicastPNVIQueue,PNIn,16); ++ break; ++ case 6: ++ case 7: ++ memcpy(pWapiStaInfo->lastRxUnicastPNVOQueue,PNIn,16); ++ break; ++ default: ++ WAPI_TRACE(WAPI_ERR, "%s: Unknown TID \n", __FUNCTION__); ++ break; ++ } ++ WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__); ++} ++ ++ ++/**************************************************************************** ++ FALSE not RX-Reorder ++ TRUE do RX Reorder ++add to support WAPI to N-mode ++*****************************************************************************/ ++u8 WapiCheckPnInSwDecrypt( ++ _adapter *padapter, ++ struct sk_buff *pskb ++) ++{ ++ u8 ret = false; ++ ++#if 0 ++ struct ieee80211_hdr_3addr_qos *header; ++ u16 fc; ++ u8 *pDaddr, *pTaddr, *pRaddr; ++ ++ header = (struct ieee80211_hdr_3addr_qos *)pskb->data; ++ pTaddr = header->addr2; ++ pRaddr = header->addr1; ++ fc = le16_to_cpu(header->frame_ctl); ++ ++ if(GetToDs(&fc)) ++ pDaddr = header->addr3; ++ else ++ pDaddr = header->addr1; ++ ++ if ((_rtw_memcmp(pRaddr, padapter->pnetdev->dev_addr, ETH_ALEN) == 0) ++ && ! (pDaddr) ++ && (GetFrameType(&fc) == WIFI_QOS_DATA_TYPE)) ++ //&& ieee->pHTInfo->bCurrentHTSupport && ++ //ieee->pHTInfo->bCurRxReorderEnable) ++ ret = false; ++ else ++ ret = true; ++#endif ++ WAPI_TRACE(WAPI_RX, "%s: return %d\n", __FUNCTION__, ret); ++ return ret; ++} ++ ++int SecSMS4HeaderFillIV(_adapter *padapter, u8 *pxmitframe) ++{ ++ struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib; ++ u8 * frame = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET; ++ u8 *pSecHeader = NULL, *pos = NULL, *pRA = NULL; ++ u8 bPNOverflow = false, bFindMatchPeer = false, hdr_len = 0; ++ PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL; ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ int ret = 0; ++ ++ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); ++ ++ return ret; ++#if 0 ++ hdr_len = sMacHdrLng; ++ if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE) ++ { ++ hdr_len += 2; ++ } ++ //hdr_len += SNAP_SIZE + sizeof(u16); ++ ++ pos = skb_push(pskb, padapter->wapiInfo.extra_prefix_len); ++ memmove(pos, pos+padapter->wapiInfo.extra_prefix_len, hdr_len); ++ ++ pSecHeader = pskb->data + hdr_len; ++ pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)pSecHeader; ++ pRA = pskb->data + 4; ++ ++ WAPI_DATA(WAPI_TX, "FillIV - Before Fill IV", pskb->data, pskb->len); ++ ++ //Address 1 is always receiver's address ++ if( IS_MCAST(pRA) ){ ++ if(!pWapiInfo->wapiTxMsk.bTxEnable){ ++ WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); ++ return -2; ++ } ++ if(pWapiInfo->wapiTxMsk.keyId <= 1){ ++ pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId; ++ pWapiExt->Reserved = 0; ++ bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1); ++ memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16); ++ if (bPNOverflow){ ++ // Update MSK Notification. ++ WAPI_TRACE(WAPI_ERR,"===============>%s():multicast PN overflow\n",__FUNCTION__); ++ rtw_wapi_app_event_handler(padapter,NULL,0,pRA, false, false, true, 0, false); ++ } ++ }else{ ++ WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Multicast KeyIdx!!\n",__FUNCTION__); ++ ret = -3; ++ } ++ } ++ else{ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if(!memcmp(pWapiSta->PeerMacAddr,pRA,6)){ ++ bFindMatchPeer = true; ++ break; ++ } ++ } ++ if (bFindMatchPeer){ ++ if((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)){ ++ WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__); ++ return -4; ++ } ++ if (pWapiSta->wapiUsk.keyId <= 1){ ++ if(pWapiSta->wapiUskUpdate.bTxEnable) ++ pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId; ++ else ++ pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId; ++ ++ pWapiExt->Reserved = 0; ++ bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2); ++ memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16); ++ if (bPNOverflow){ ++ // Update USK Notification. ++ WAPI_TRACE(WAPI_ERR,"===============>%s():unicast PN overflow\n",__FUNCTION__); ++ rtw_wapi_app_event_handler(padapter,NULL,0,pWapiSta->PeerMacAddr, false, true, false, 0, false); ++ } ++ }else{ ++ WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Unicast KeyIdx!!\n",__FUNCTION__); ++ ret = -5; ++ } ++ } ++ else{ ++ WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta "MAC_FMT"!!\n",__FUNCTION__, MAC_ARG(pRA)); ++ ret = -6; ++ } ++ } ++ ++ WAPI_DATA(WAPI_TX, "FillIV - After Fill IV", pskb->data, pskb->len); ++ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); ++ return ret; ++#endif ++} ++ ++// WAPI SW Enc: must have done Coalesce! ++void SecSWSMS4Encryption( ++ _adapter *padapter, ++ u8 * pxmitframe ++ ) ++{ ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ u8 *pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE; ++ struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib; ++ ++ u8 *SecPtr = NULL, *pRA, *pMicKey = NULL, *pDataKey = NULL, *pIV = NULL; ++ u8 IVOffset, DataOffset, bFindMatchPeer = false, KeyIdx = 0, MicBuffer[16]; ++ u16 OutputLength; ++ ++ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); ++ ++ WAPI_TRACE(WAPI_TX,"hdrlen: %d \n",pattrib->hdrlen); ++ ++ return; ++ ++ DataOffset = pattrib->hdrlen + pattrib->iv_len; ++ ++ pRA = pframe + 4; ++ ++ ++ if( IS_MCAST(pRA) ){ ++ KeyIdx = pWapiInfo->wapiTxMsk.keyId; ++ pIV = pWapiInfo->lastTxMulticastPN; ++ pMicKey = pWapiInfo->wapiTxMsk.micKey; ++ pDataKey = pWapiInfo->wapiTxMsk.dataKey; ++ }else{ ++ if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if (0 == memcmp(pWapiSta->PeerMacAddr, pRA, 6)){ ++ bFindMatchPeer = true; ++ break; ++ } ++ } ++ ++ if (bFindMatchPeer){ ++ if (pWapiSta->wapiUskUpdate.bTxEnable){ ++ KeyIdx = pWapiSta->wapiUskUpdate.keyId; ++ WAPI_TRACE(WAPI_TX, "%s(): Use update USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx); ++ pIV = pWapiSta->lastTxUnicastPN; ++ pMicKey = pWapiSta->wapiUskUpdate.micKey; ++ pDataKey = pWapiSta->wapiUskUpdate.dataKey; ++ }else{ ++ KeyIdx = pWapiSta->wapiUsk.keyId; ++ WAPI_TRACE(WAPI_TX, "%s(): Use USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx); ++ pIV = pWapiSta->lastTxUnicastPN; ++ pMicKey = pWapiSta->wapiUsk.micKey; ++ pDataKey = pWapiSta->wapiUsk.dataKey; ++ } ++ }else{ ++ WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta!!\n",__FUNCTION__); ++ return; ++ } ++ }else{ ++ WAPI_TRACE(WAPI_ERR,"%s: wapiSTAUsedList is empty!!\n",__FUNCTION__); ++ return; ++ } ++ } ++ ++ SecPtr = pframe; ++ SecCalculateMicSMS4(KeyIdx, pMicKey, SecPtr, (SecPtr+DataOffset), pattrib->pktlen, MicBuffer); ++ ++ WAPI_DATA(WAPI_TX, "Encryption - MIC", MicBuffer, padapter->wapiInfo.extra_postfix_len); ++ ++ memcpy(pframe+pattrib->hdrlen+pattrib->iv_len+pattrib->pktlen-pattrib->icv_len, ++ (u8 *)MicBuffer, ++ padapter->wapiInfo.extra_postfix_len ++ ); ++ ++ ++ WapiSMS4Encryption(pDataKey, pIV, (SecPtr+DataOffset),pattrib->pktlen+pattrib->icv_len, (SecPtr+DataOffset), &OutputLength); ++ ++ WAPI_DATA(WAPI_TX, "Encryption - After SMS4 encryption",pframe,pattrib->hdrlen+pattrib->iv_len+pattrib->pktlen); ++ ++ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); ++} ++ ++u8 SecSWSMS4Decryption( ++ _adapter *padapter, ++ u8 *precv_frame, ++ struct recv_priv *precv_priv ++ ) ++{ ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ struct recv_frame_hdr *precv_hdr; ++ PRT_WAPI_STA_INFO pWapiSta = NULL; ++ u8 IVOffset, DataOffset, bFindMatchPeer = false, bUseUpdatedKey = false; ++ u8 KeyIdx, MicBuffer[16], lastRxPNforQoS[16]; ++ u8 *pRA, *pTA, *pMicKey, *pDataKey, *pLastRxPN, *pRecvPN, *pSecData, *pRecvMic, *pos; ++ u8 TID = 0; ++ u16 OutputLength, DataLen; ++ u8 bQosData; ++ struct sk_buff * pskb; ++ ++ WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__); ++ ++ return 0; ++ ++ precv_hdr = &((union recv_frame*)precv_frame)->u.hdr; ++ pskb = (struct sk_buff *)(precv_hdr->rx_data); ++ precv_hdr->bWapiCheckPNInDecrypt = WapiCheckPnInSwDecrypt(padapter, pskb); ++ WAPI_TRACE(WAPI_RX, "=========>%s: check PN %d\n", __FUNCTION__,precv_hdr->bWapiCheckPNInDecrypt); ++ WAPI_DATA(WAPI_RX, "Decryption - Before decryption", pskb->data, pskb->len); ++ ++ IVOffset = sMacHdrLng; ++ bQosData = GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE; ++ if (bQosData){ ++ IVOffset += 2; ++ } ++ ++ //if(GetHTC()) ++ // IVOffset += 4; ++ ++ //IVOffset += SNAP_SIZE + sizeof(u16); ++ ++ DataOffset = IVOffset + padapter->wapiInfo.extra_prefix_len; ++ ++ pRA = pskb->data + 4; ++ pTA = pskb->data + 10; ++ KeyIdx = *(pskb->data + IVOffset); ++ pRecvPN = pskb->data + IVOffset + 2; ++ pSecData = pskb->data + DataOffset; ++ DataLen = pskb->len - DataOffset; ++ pRecvMic = pskb->data + pskb->len - padapter->wapiInfo.extra_postfix_len; ++ TID = GetTid(pskb->data); ++ ++ if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){ ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if (0 == memcmp(pWapiSta->PeerMacAddr, pTA, 6)){ ++ bFindMatchPeer = true; ++ break; ++ } ++ } ++ } ++ ++ if (!bFindMatchPeer){ ++ WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT" for Key Info!!!\n", __FUNCTION__, MAC_ARG(pTA)); ++ return false; ++ } ++ ++ if( IS_MCAST(pRA) ){ ++ WAPI_TRACE(WAPI_RX, "%s: Multicast decryption !!!\n", __FUNCTION__); ++ if (pWapiSta->wapiMsk.keyId == KeyIdx && pWapiSta->wapiMsk.bSet){ ++ pLastRxPN = pWapiSta->lastRxMulticastPN; ++ if (!WapiComparePN(pRecvPN, pLastRxPN)){ ++ WAPI_TRACE(WAPI_ERR, "%s: MSK PN is not larger than last, Dropped!!!\n", __FUNCTION__); ++ WAPI_DATA(WAPI_ERR, "pRecvPN:", pRecvPN, 16); ++ WAPI_DATA(WAPI_ERR, "pLastRxPN:", pLastRxPN, 16); ++ return false; ++ } ++ ++ memcpy(pLastRxPN, pRecvPN, 16); ++ pMicKey = pWapiSta->wapiMsk.micKey; ++ pDataKey = pWapiSta->wapiMsk.dataKey; ++ }else if (pWapiSta->wapiMskUpdate.keyId == KeyIdx && pWapiSta->wapiMskUpdate.bSet){ ++ WAPI_TRACE(WAPI_RX, "%s: Use Updated MSK for Decryption !!!\n", __FUNCTION__); ++ bUseUpdatedKey = true; ++ memcpy(pWapiSta->lastRxMulticastPN, pRecvPN, 16); ++ pMicKey = pWapiSta->wapiMskUpdate.micKey; ++ pDataKey = pWapiSta->wapiMskUpdate.dataKey; ++ }else{ ++ WAPI_TRACE(WAPI_ERR, "%s: Can not find MSK with matched KeyIdx(%d), Dropped !!!\n", __FUNCTION__,KeyIdx); ++ return false; ++ } ++ } ++ else{ ++ WAPI_TRACE(WAPI_RX, "%s: Unicast decryption !!!\n", __FUNCTION__); ++ if (pWapiSta->wapiUsk.keyId == KeyIdx && pWapiSta->wapiUsk.bSet){ ++ WAPI_TRACE(WAPI_RX, "%s: Use USK for Decryption!!!\n", __FUNCTION__); ++ if(precv_hdr->bWapiCheckPNInDecrypt){ ++ if(GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE){ ++ WapiGetLastRxUnicastPNForQoSData(TID, pWapiSta, lastRxPNforQoS); ++ pLastRxPN = lastRxPNforQoS; ++ }else{ ++ pLastRxPN = pWapiSta->lastRxUnicastPN; ++ } ++ if (!WapiComparePN(pRecvPN, pLastRxPN)){ ++ return false; ++ } ++ if(bQosData){ ++ WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta); ++ }else{ ++ memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16); ++ } ++ }else{ ++ memcpy(precv_hdr->WapiTempPN,pRecvPN,16); ++ } ++ ++ if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE)) ++ { ++ if ((pRecvPN[0] & 0x1) == 0){ ++ WAPI_TRACE(WAPI_ERR, "%s: Rx USK PN is not odd when Infra STA mode, Dropped !!!\n", __FUNCTION__); ++ return false; ++ } ++ } ++ ++ pMicKey = pWapiSta->wapiUsk.micKey; ++ pDataKey = pWapiSta->wapiUsk.dataKey; ++ } ++ else if (pWapiSta->wapiUskUpdate.keyId == KeyIdx && pWapiSta->wapiUskUpdate.bSet ){ ++ WAPI_TRACE(WAPI_RX, "%s: Use Updated USK for Decryption!!!\n", __FUNCTION__); ++ if(pWapiSta->bAuthenticatorInUpdata) ++ bUseUpdatedKey = true; ++ else ++ bUseUpdatedKey = false; ++ ++ if(bQosData){ ++ WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta); ++ }else{ ++ memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16); ++ } ++ pMicKey = pWapiSta->wapiUskUpdate.micKey; ++ pDataKey = pWapiSta->wapiUskUpdate.dataKey; ++ }else{ ++ WAPI_TRACE(WAPI_ERR, "%s: No valid USK!!!KeyIdx=%d pWapiSta->wapiUsk.keyId=%d pWapiSta->wapiUskUpdate.keyId=%d\n", __FUNCTION__, KeyIdx, pWapiSta->wapiUsk.keyId, pWapiSta->wapiUskUpdate.keyId); ++ //dump_buf(pskb->data,pskb->len); ++ return false; ++ } ++ } ++ ++ WAPI_DATA(WAPI_RX, "Decryption - DataKey", pDataKey, 16); ++ WAPI_DATA(WAPI_RX, "Decryption - IV", pRecvPN, 16); ++ WapiSMS4Decryption(pDataKey, pRecvPN, pSecData, DataLen, pSecData, &OutputLength); ++ ++ if (OutputLength != DataLen) ++ WAPI_TRACE(WAPI_ERR, "%s: Output Length Error!!!!\n", __FUNCTION__); ++ ++ WAPI_DATA(WAPI_RX, "Decryption - After decryption", pskb->data, pskb->len); ++ ++ DataLen -= padapter->wapiInfo.extra_postfix_len; ++ ++ SecCalculateMicSMS4(KeyIdx, pMicKey, pskb->data, pSecData, DataLen, MicBuffer); ++ ++ WAPI_DATA(WAPI_RX, "Decryption - MIC received", pRecvMic, SMS4_MIC_LEN); ++ WAPI_DATA(WAPI_RX, "Decryption - MIC calculated", MicBuffer, SMS4_MIC_LEN); ++ ++ if (0 == memcmp(MicBuffer, pRecvMic, padapter->wapiInfo.extra_postfix_len)){ ++ WAPI_TRACE(WAPI_RX, "%s: Check MIC OK!!\n", __FUNCTION__); ++ if (bUseUpdatedKey){ ++ // delete the old key ++ if ( IS_MCAST(pRA) ){ ++ WAPI_TRACE(WAPI_API, "%s(): AE use new update MSK!!\n", __FUNCTION__); ++ pWapiSta->wapiMsk.keyId = pWapiSta->wapiMskUpdate.keyId; ++ memcpy(pWapiSta->wapiMsk.dataKey, pWapiSta->wapiMskUpdate.dataKey, 16); ++ memcpy(pWapiSta->wapiMsk.micKey, pWapiSta->wapiMskUpdate.micKey, 16); ++ pWapiSta->wapiMskUpdate.bTxEnable = pWapiSta->wapiMskUpdate.bSet = false; ++ }else{ ++ WAPI_TRACE(WAPI_API, "%s(): AE use new update USK!!\n", __FUNCTION__); ++ pWapiSta->wapiUsk.keyId = pWapiSta->wapiUskUpdate.keyId; ++ memcpy(pWapiSta->wapiUsk.dataKey, pWapiSta->wapiUskUpdate.dataKey, 16); ++ memcpy(pWapiSta->wapiUsk.micKey, pWapiSta->wapiUskUpdate.micKey, 16); ++ pWapiSta->wapiUskUpdate.bTxEnable = pWapiSta->wapiUskUpdate.bSet = false; ++ } ++ } ++ }else{ ++ WAPI_TRACE(WAPI_ERR, "%s: Check MIC Error, Dropped !!!!\n", __FUNCTION__); ++ return false; ++ } ++ ++ pos = pskb->data; ++ memmove(pos+padapter->wapiInfo.extra_prefix_len, pos, IVOffset); ++ skb_pull(pskb, padapter->wapiInfo.extra_prefix_len); ++ ++ WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__); ++ ++ return true; ++} ++ ++u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe) ++{ ++ ++ u8 *pframe; ++ u32 res = _SUCCESS; ++ ++ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_TX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__); ++ return _FAIL; ++ } ++ ++ if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) ++ return _FAIL; ++ ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET; ++ ++ SecSWSMS4Encryption(padapter, pxmitframe); ++ ++ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); ++ return res; ++} ++ ++u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe) ++{ ++ u8 *pframe; ++ u32 res = _SUCCESS; ++ ++ WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__); ++ ++ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) ++ { ++ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__); ++ return _FAIL; ++ } ++ ++ ++ //drop packet when hw decrypt fail ++ //return tempraily ++ return _FAIL; ++ ++ //pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; ++ ++ if (false == SecSWSMS4Decryption(padapter, precvframe, &padapter->recvpriv)) ++ { ++ WAPI_TRACE(WAPI_ERR, "%s():SMS4 decrypt frame error\n",__FUNCTION__); ++ return _FAIL; ++ } ++ ++ WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__); ++ return res; ++} ++ ++#else ++ ++u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe) ++{ ++ WAPI_TRACE(WAPI_TX, "=========>Dummy %s\n", __FUNCTION__); ++ WAPI_TRACE(WAPI_TX, "<=========Dummy %s\n", __FUNCTION__); ++ return _SUCCESS; ++} ++ ++u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe) ++{ ++ WAPI_TRACE(WAPI_RX, "=========>Dummy %s\n", __FUNCTION__); ++ WAPI_TRACE(WAPI_RX, "<=========Dummy %s\n", __FUNCTION__); ++ return _SUCCESS; ++} ++ ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wlan_util.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wlan_util.c +old mode 100755 +new mode 100644 +index c2e4e48..4443de3 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wlan_util.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wlan_util.c +@@ -32,6 +32,7 @@ unsigned char BROADCOM_OUI1[] = {0x00, 0x10, 0x18}; + unsigned char BROADCOM_OUI2[] = {0x00, 0x0a, 0xf7}; + unsigned char BROADCOM_OUI3[] = {0x00, 0x05, 0xb5}; + ++ + unsigned char CISCO_OUI[] = {0x00, 0x40, 0x96}; + unsigned char MARVELL_OUI[] = {0x00, 0x50, 0x43}; + unsigned char RALINK_OUI[] = {0x00, 0x0c, 0x43}; +@@ -80,7 +81,7 @@ int cckrates_included(unsigned char *rate, int ratelen) + { + if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || + (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) +- return _TRUE; ++ return _TRUE; + } + + return _FALSE; +@@ -95,12 +96,89 @@ int cckratesonly_included(unsigned char *rate, int ratelen) + { + if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && + (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) +- return _FALSE; ++ return _FALSE; + } + + return _TRUE; + } + ++s8 rtw_get_tx_nss(_adapter *adapter, struct sta_info *psta) ++{ ++ u8 rf_type = RF_1T1R, custom_rf_type, vht_mcs[2]; ++ s8 nss = 1; ++ ++ custom_rf_type = adapter->registrypriv.rf_config; ++ rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ if (!psta) ++ return nss; ++ ++ /* rf_config is dependent on efuse or sw config */ ++ if (custom_rf_type != RF_MAX_TYPE) ++ rf_type = custom_rf_type; ++ ++#ifdef CONFIG_80211AC_VHT ++ if (psta->vhtpriv.vht_option) { ++ u8 vht_mcs[2]; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct vht_priv *pvhtpriv_ap = &pmlmepriv->vhtpriv; ++ ++ _rtw_memcpy(vht_mcs, psta->vhtpriv.vht_mcs_map, 2); ++ /* doesn't support 5~8 SS so far */ ++ vht_mcs[1] = 0xff; ++ switch (rf_type) { ++ case RF_1T1R: ++ case RF_1T2R: ++ vht_mcs[0] |= 0xfc; ++ break; ++ case RF_2T2R: ++ case RF_2T4R: ++ case RF_2T2R_GREEN: ++ case RF_2T3R: ++ vht_mcs[0] |= 0xf0; ++ break; ++ case RF_3T3R: ++ case RF_3T4R: ++ vht_mcs[0] |= 0xc0; ++ break; ++ default: ++ DBG_871X("%s,%d, unknown rf type\n", __func__, __LINE__); ++ break; ++ } ++ nss = rtw_vht_mcsmap_to_nss(vht_mcs); ++ } else ++#endif /* CONFIG_80211AC_VHT */ ++ if (psta->htpriv.ht_option) { ++ u8 supp_mcs_set[4]; ++ ++ _rtw_memcpy(supp_mcs_set, psta->htpriv.ht_cap.supp_mcs_set, 4); ++ ++ switch (rf_type) { ++ case RF_1T1R: ++ case RF_1T2R: ++ supp_mcs_set[1] = supp_mcs_set[2] = supp_mcs_set[3] = 0; ++ break; ++ case RF_2T2R: ++ case RF_2T4R: ++ case RF_2T2R_GREEN: ++ case RF_2T3R: ++ supp_mcs_set[2] = supp_mcs_set[3] = 0; ++ break; ++ case RF_3T3R: ++ case RF_3T4R: ++ supp_mcs_set[3] = 0; ++ break; ++ default: ++ DBG_871X("%s,%d, unknown rf type\n", __func__, __LINE__); ++ break; ++ } ++ nss = rtw_ht_mcsset_to_nss(supp_mcs_set); ++ } ++ ++ DBG_871X("%s: %d SS, rf_type=%d\n", __func__, nss, rf_type); ++ return nss; ++} ++ + u8 networktype_to_raid(_adapter *adapter,struct sta_info *psta) + { + unsigned char raid; +@@ -139,21 +217,10 @@ u8 networktype_to_raid(_adapter *adapter,struct sta_info *psta) + u8 networktype_to_raid_ex(_adapter *adapter, struct sta_info *psta) + { + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; +- u8 raid, cur_rf_type, rf_type= RF_1T1R; ++ u8 raid = RATEID_IDX_BGN_40M_1SS, cur_rf_type, rf_type, custom_rf_type; ++ s8 tx_nss; + +- rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&cur_rf_type)); +- +- if(cur_rf_type == RF_1T1R) { +- rf_type = RF_1T1R; +- } +- else if(IsSupportedVHT(psta->wireless_mode)) { +- if(psta->ra_mask & 0xffc00000) +- rf_type = RF_2T2R; +- } +- else if(IsSupportedHT(psta->wireless_mode)) { +- if(psta->ra_mask & 0xfff00000) +- rf_type = RF_2T2R; +- } ++ tx_nss = rtw_get_tx_nss(adapter, psta); + + switch(psta->wireless_mode) + { +@@ -171,54 +238,81 @@ u8 networktype_to_raid_ex(_adapter *adapter, struct sta_info *psta) + case WIRELESS_11_5N: + case WIRELESS_11A_5N: + case WIRELESS_11G_24N: +- if (rf_type == RF_2T2R) ++ if (tx_nss == 1) ++ raid = RATEID_IDX_GN_N1SS; ++ else if (tx_nss == 2) + raid = RATEID_IDX_GN_N2SS; ++ else if (tx_nss == 3) ++ raid = RATEID_IDX_BGN_3SS; + else +- raid = RATEID_IDX_GN_N1SS; ++ DBG_871X("tx_nss error!(tx_nss=%d)\n", tx_nss); + break; + case WIRELESS_11B_24N: + case WIRELESS_11BG_24N: + if (psta->bw_mode == CHANNEL_WIDTH_20) { +- if (rf_type == RF_2T2R) ++ if (tx_nss == 1) ++ raid = RATEID_IDX_BGN_20M_1SS_BN; ++ else if (tx_nss == 2) + raid = RATEID_IDX_BGN_20M_2SS_BN; ++ else if (tx_nss == 3) ++ raid = RATEID_IDX_BGN_3SS; + else +- raid = RATEID_IDX_BGN_20M_1SS_BN; ++ DBG_871X("tx_nss error!(tx_nss=%d)\n", tx_nss); + } else { +- if (rf_type == RF_2T2R) ++ if (tx_nss == 1) ++ raid = RATEID_IDX_BGN_40M_1SS; ++ else if (tx_nss == 2) + raid = RATEID_IDX_BGN_40M_2SS; ++ else if (tx_nss == 3) ++ raid = RATEID_IDX_BGN_3SS; + else +- raid = RATEID_IDX_BGN_40M_1SS; ++ DBG_871X("tx_nss error!(tx_nss=%d)\n", tx_nss); + } + break; + #ifdef CONFIG_80211AC_VHT + case WIRELESS_11_5AC: +- if (rf_type == RF_1T1R) ++ if (tx_nss == 1) + raid = RATEID_IDX_VHT_1SS; +- else ++ else if (tx_nss == 2) + raid = RATEID_IDX_VHT_2SS; ++ else if (tx_nss == 3) ++ raid = RATEID_IDX_VHT_3SS; ++ else ++ DBG_871X("tx_nss error!(tx_nss=%d)\n", tx_nss); + break; + case WIRELESS_11_24AC: + if (psta->bw_mode >= CHANNEL_WIDTH_80) + { +- if (rf_type == RF_1T1R) ++ if (tx_nss == 1) + raid = RATEID_IDX_VHT_1SS; +- else ++ else if (tx_nss == 2) + raid = RATEID_IDX_VHT_2SS; ++ else if (tx_nss == 3) ++ raid = RATEID_IDX_VHT_3SS; ++ else ++ DBG_871X("tx_nss error!(tx_nss=%d)\n", tx_nss); + } + else + { +- if (rf_type == RF_1T1R) +- raid = 11; ++ if (tx_nss == 1) ++ raid = RATEID_IDX_MIX1; ++ else if (tx_nss == 2) ++ raid = RATEID_IDX_MIX2; ++ else if (tx_nss == 3) ++ raid = RATEID_IDX_VHT_3SS; + else +- raid = 12; ++ DBG_871X("tx_nss error!(tx_nss=%d)\n", tx_nss); + } + break; + #endif + default: +- raid = RATEID_IDX_BGN_40M_2SS; ++ DBG_871X("unexpected wireless mode!(psta->wireless_mode=%x)\n", psta->wireless_mode); + break; + + } ++ ++ /* DBG_871X("psta->wireless_mode=%x, tx_nss=%d\n", psta->wireless_mode, tx_nss); */ ++ + return raid; + + } +@@ -453,27 +547,6 @@ void UpdateBrateTblForSoftAP(u8 *bssrateset, u32 bssratelen) + } + + } +- +-void Save_DM_Func_Flag(_adapter *padapter) +-{ +- u8 bSaveFlag = _TRUE; +- rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&bSaveFlag)); +-} +- +-void Restore_DM_Func_Flag(_adapter *padapter) +-{ +- u8 bSaveFlag = _FALSE; +- rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&bSaveFlag)); +-} +- +-void Switch_DM_Func(_adapter *padapter, u32 mode, u8 enable) +-{ +- if(enable == _TRUE) +- rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_SET, (u8 *)(&mode)); +- else +- rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_CLR, (u8 *)(&mode)); +-} +- + static void Set_NETYPE1_MSR(_adapter *padapter, u8 type) + { + rtw_hal_set_hwreg(padapter, HW_VAR_MEDIA_STATUS1, (u8 *)(&type)); +@@ -662,52 +735,93 @@ void SelectChannel(_adapter *padapter, unsigned char channel) + { + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- //saved channel info +- rtw_set_oper_ch(padapter, channel); +- dc_SelectChannel(padapter, channel); +-#else //CONFIG_DUALMAC_CONCURRENT +- + _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); +- ++ ++#ifdef CONFIG_DFS_MASTER ++{ ++ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); ++ bool ori_overlap_radar_detect_ch = rtw_rfctl_overlap_radar_detect_ch(rfctl); ++ bool new_overlap_radar_detect_ch = _rtw_rfctl_overlap_radar_detect_ch(rfctl, channel ++ , adapter_to_dvobj(padapter)->oper_bwmode, adapter_to_dvobj(padapter)->oper_ch_offset); ++ ++ if (!ori_overlap_radar_detect_ch && new_overlap_radar_detect_ch) ++ rtw_odm_radar_detect_enable(padapter); ++ ++ if (new_overlap_radar_detect_ch && IS_UNDER_CAC(rfctl)) { ++ u8 pause = 0xFF; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &pause); ++ } ++#endif /* CONFIG_DFS_MASTER */ ++ + //saved channel info + rtw_set_oper_ch(padapter, channel); + + rtw_hal_set_chan(padapter, channel); +- ++ ++#ifdef CONFIG_DFS_MASTER ++ if (ori_overlap_radar_detect_ch && !new_overlap_radar_detect_ch) { ++ u8 pause = 0x00; ++ ++ rtw_odm_radar_detect_disable(padapter); ++ rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &pause); ++ } ++} ++#endif /* CONFIG_DFS_MASTER */ ++ + _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); + +-#endif // CONFIG_DUALMAC_CONCURRENT + } + + void SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset) + { + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- //saved bw info +- rtw_set_oper_bw(padapter, bwmode); +- rtw_set_oper_choffset(padapter, channel_offset); +- dc_SetBWMode(padapter, bwmode, channel_offset); +-#else //CONFIG_DUALMAC_CONCURRENT +- + _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setbw_mutex), NULL); + ++#ifdef CONFIG_DFS_MASTER ++{ ++ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); ++ bool ori_overlap_radar_detect_ch = rtw_rfctl_overlap_radar_detect_ch(rfctl); ++ bool new_overlap_radar_detect_ch = _rtw_rfctl_overlap_radar_detect_ch(rfctl ++ , adapter_to_dvobj(padapter)->oper_channel, bwmode, channel_offset); ++ ++ if (!ori_overlap_radar_detect_ch && new_overlap_radar_detect_ch) ++ rtw_odm_radar_detect_enable(padapter); ++ ++ if (new_overlap_radar_detect_ch && IS_UNDER_CAC(rfctl)) { ++ u8 pause = 0xFF; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &pause); ++ } ++#endif /* CONFIG_DFS_MASTER */ ++ + //saved bw info + rtw_set_oper_bw(padapter, bwmode); + rtw_set_oper_choffset(padapter, channel_offset); + + rtw_hal_set_bwmode(padapter, (CHANNEL_WIDTH)bwmode, channel_offset); + +- _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setbw_mutex), NULL); ++#ifdef CONFIG_DFS_MASTER ++ if (ori_overlap_radar_detect_ch && !new_overlap_radar_detect_ch) { ++ u8 pause = 0x00; + +-#endif // CONFIG_DUALMAC_CONCURRENT ++ rtw_odm_radar_detect_disable(padapter); ++ rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &pause); ++ } ++} ++#endif /* CONFIG_DFS_MASTER */ ++ ++ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setbw_mutex), NULL); + } + + void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode) + { + u8 center_ch, chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++#if (defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)) || defined(CONFIG_MCC_MODE) ++ u8 iqk_info_backup = _FALSE; ++#endif + + if ( padapter->bNotifyChannelChange ) + { +@@ -725,29 +839,60 @@ void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char + else + chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + } ++ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); ++ ++#ifdef CONFIG_DFS_MASTER ++{ ++ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); ++ bool ori_overlap_radar_detect_ch = rtw_rfctl_overlap_radar_detect_ch(rfctl); ++ bool new_overlap_radar_detect_ch = _rtw_rfctl_overlap_radar_detect_ch(rfctl, channel, bwmode, channel_offset); ++ ++ if (!ori_overlap_radar_detect_ch && new_overlap_radar_detect_ch) ++ rtw_odm_radar_detect_enable(padapter); ++ ++ if (new_overlap_radar_detect_ch && IS_UNDER_CAC(rfctl)) { ++ u8 pause = 0xFF; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &pause); ++ } ++#endif /* CONFIG_DFS_MASTER */ + + //set Channel +-#ifdef CONFIG_DUALMAC_CONCURRENT + //saved channel/bw info + rtw_set_oper_ch(padapter, channel); + rtw_set_oper_bw(padapter, bwmode); + rtw_set_oper_choffset(padapter, channel_offset); +- SelectChannel(padapter, channel); +- SetBWMode(padapter, bwmode, channel_offset); +-#else //CONFIG_DUALMAC_CONCURRENT +- +- _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); + +- //saved channel/bw info +- rtw_set_oper_ch(padapter, channel); +- rtw_set_oper_bw(padapter, bwmode); +- rtw_set_oper_choffset(padapter, channel_offset); ++#if (defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)) || defined(CONFIG_MCC_MODE) ++ /* To check if we need to backup iqk info after switch chnl & bw */ ++ { ++ u8 take_care_iqk, do_iqk; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk); ++ rtw_hal_get_hwreg(padapter, HW_VAR_DO_IQK, &do_iqk); ++ if ((take_care_iqk == _TRUE) && (do_iqk == _TRUE)) ++ iqk_info_backup = _TRUE; ++ } ++#endif + + rtw_hal_set_chnl_bw(padapter, center_ch, bwmode, channel_offset, chnl_offset80); // set center channel + +- _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); ++#if (defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)) || defined(CONFIG_MCC_MODE) ++ if (iqk_info_backup == _TRUE) ++ rtw_hal_ch_sw_iqk_info_backup(padapter); ++#endif ++ ++#ifdef CONFIG_DFS_MASTER ++ if (ori_overlap_radar_detect_ch && !new_overlap_radar_detect_ch) { ++ u8 pause = 0x00; + +-#endif // CONFIG_DUALMAC_CONCURRENT ++ rtw_odm_radar_detect_disable(padapter); ++ rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &pause); ++ } ++} ++#endif /* CONFIG_DFS_MASTER */ ++ ++ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); + } + + int get_bsstype(unsigned short capability) +@@ -818,20 +963,21 @@ int is_client_associated_to_ibss(_adapter *padapter) + + int is_IBSS_empty(_adapter *padapter) + { +- unsigned int i; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) +- { +- if (pmlmeinfo->FW_sta_info[i].status == 1) +- { ++ int i; ++ struct macid_ctl_t *macid_ctl = &padapter->dvobj->macid_ctl; ++ ++ for (i = 0; i < macid_ctl->num; i++) { ++ if (!rtw_macid_is_used(macid_ctl, i)) ++ continue; ++ if (rtw_macid_get_if_g(macid_ctl, i) != padapter->iface_id) ++ continue; ++ if (!GET_H2CCMD_MSRRPT_PARM_OPMODE(&macid_ctl->h2c_msr[i])) ++ continue; ++ if (GET_H2CCMD_MSRRPT_PARM_ROLE(&macid_ctl->h2c_msr[i]) == H2C_MSR_ROLE_ADHOC) + return _FAIL; +- } + } +- ++ + return _TRUE; +- + } + + unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval) +@@ -868,103 +1014,17 @@ void invalidate_cam_all(_adapter *padapter) + rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, &val8); + + _enter_critical_bh(&cam_ctl->lock, &irqL); +- cam_ctl->bitmap = 0; +- _rtw_memset(dvobj->cam_cache, 0, sizeof(struct cam_entry_cache)*TOTAL_CAM_ENTRY); ++ rtw_sec_cam_map_clr_all(&cam_ctl->used); ++ _rtw_memset(dvobj->cam_cache, 0, sizeof(struct sec_cam_ent) * SEC_CAM_ENT_NUM_SW_LIMIT); + _exit_critical_bh(&cam_ctl->lock, &irqL); + } +-#if 1 +-static u32 _ReadCAM(_adapter *padapter ,u32 addr) +-{ +- u32 count = 0, cmd; +- cmd = CAM_POLLINIG |addr ; +- rtw_write32(padapter, RWCAM, cmd); +- +- do{ +- if(0 == (rtw_read32(padapter,REG_CAMCMD) & CAM_POLLINIG)){ +- break; +- } +- }while(count++ < 100); +- +- return rtw_read32(padapter,REG_CAMREAD); +-} +-void read_cam(_adapter *padapter ,u8 entry, u8 *get_key) +-{ +- u32 j,count = 0, addr, cmd; +- addr = entry << 3; +- +- //DBG_8192C("********* DUMP CAM Entry_#%02d***************\n",entry); +- for (j = 0; j < 6; j++) +- { +- cmd = _ReadCAM(padapter ,addr+j); +- //DBG_8192C("offset:0x%02x => 0x%08x \n",addr+j,cmd); +- if(j>1) //get key from cam +- _rtw_memcpy(get_key+(j-2)*4, &cmd, 4); +- } +- //DBG_8192C("*********************************\n"); +-} +- +-bool read_phy_cam_is_gtk(_adapter *padapter, u8 entry) +-{ +- bool res = _FALSE; +- u32 addr, cmd; +- +- addr = entry << 3; +- cmd = _ReadCAM(padapter, addr); +- +- res = (cmd & BIT6)? _TRUE:_FALSE; +- return res; +-} +- +-void dump_cam_table(_adapter *padapter) { +- u32 i, j, addr, cmd; +- DBG_871X("###########DUMP CAM TABLE##############\n"); +- for (i = 0; i < 8 ; i++) { +- addr = i << 3; +- DBG_871X("********* DUMP CAM Entry_#%02d**********\n",i); +- for (j = 0; j < 6; j++) { +- cmd = _ReadCAM(padapter ,addr+j); +- DBG_8192C("offset:0x%02x => 0x%08x \n",addr+j,cmd); +- } +- DBG_871X("*********************************\n"); +- } +-} +-#endif +- +-void _write_cam(_adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key) +-{ +- unsigned int i, val, addr; +- int j; +- u32 cam_val[2]; +- +- addr = entry << 3; +- +- for (j = 5; j >= 0; j--) { +- switch (j) { +- case 0: +- val = (ctrl | (mac[0] << 16) | (mac[1] << 24) ); +- break; +- case 1: +- val = (mac[2] | ( mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24)); +- break; +- default: +- i = (j - 2) << 2; +- val = (key[i] | (key[i+1] << 8) | (key[i+2] << 16) | (key[i+3] << 24)); +- break; +- } +- +- cam_val[0] = val; +- cam_val[1] = addr + (unsigned int)j; +- +- rtw_hal_set_hwreg(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val); +- } +-} + + void _clear_cam_entry(_adapter *padapter, u8 entry) + { + unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + unsigned char null_key[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00}; + +- _write_cam(padapter, entry, 0, null_sta, null_key); ++ rtw_sec_write_cam_ent(padapter, entry, 0, null_sta, null_key); + } + + inline void write_cam(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) +@@ -972,7 +1032,7 @@ inline void write_cam(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) + #ifdef CONFIG_WRITE_CACHE_ONLY + write_cam_cache(adapter, id ,ctrl, mac, key); + #else +- _write_cam(adapter, id, ctrl, mac, key); ++ rtw_sec_write_cam_ent(adapter, id, ctrl, mac, key); + write_cam_cache(adapter, id ,ctrl, mac, key); + #endif + } +@@ -988,13 +1048,13 @@ inline void write_cam_from_cache(_adapter *adapter, u8 id) + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + _irqL irqL; +- struct cam_entry_cache cache; ++ struct sec_cam_ent cache; + + _enter_critical_bh(&cam_ctl->lock, &irqL); +- _rtw_memcpy(&cache, &dvobj->cam_cache[id], sizeof(struct cam_entry_cache)); ++ _rtw_memcpy(&cache, &dvobj->cam_cache[id], sizeof(struct sec_cam_ent)); + _exit_critical_bh(&cam_ctl->lock, &irqL); + +- _write_cam(adapter, id, cache.ctrl, cache.mac, cache.key); ++ rtw_sec_write_cam_ent(adapter, id, cache.ctrl, cache.mac, cache.key); + } + + void write_cam_cache(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) +@@ -1020,7 +1080,7 @@ void clear_cam_cache(_adapter *adapter, u8 id) + + _enter_critical_bh(&cam_ctl->lock, &irqL); + +- _rtw_memset(&(dvobj->cam_cache[id]), 0, sizeof(struct cam_entry_cache)); ++ _rtw_memset(&(dvobj->cam_cache[id]), 0, sizeof(struct sec_cam_ent)); + + _exit_critical_bh(&cam_ctl->lock, &irqL); + } +@@ -1068,16 +1128,238 @@ exit: + return (s16)camid; + } + +-bool _rtw_camid_is_gk(_adapter *adapter, u8 cam_id) ++inline bool _rtw_camctl_chk_cap(_adapter *adapter, u8 cap) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; ++ ++ if (cam_ctl->sec_cap & cap) ++ return _TRUE; ++ return _FALSE; ++} ++ ++inline void _rtw_camctl_set_flags(_adapter *adapter, u32 flags) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; ++ ++ cam_ctl->flags |= flags; ++} ++ ++inline void rtw_camctl_set_flags(_adapter *adapter, u32 flags) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; ++ _irqL irqL; ++ ++ _enter_critical_bh(&cam_ctl->lock, &irqL); ++ _rtw_camctl_set_flags(adapter, flags); ++ _exit_critical_bh(&cam_ctl->lock, &irqL); ++} ++ ++inline void _rtw_camctl_clr_flags(_adapter *adapter, u32 flags) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; ++ ++ cam_ctl->flags &= ~flags; ++} ++ ++inline void rtw_camctl_clr_flags(_adapter *adapter, u32 flags) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; ++ _irqL irqL; ++ ++ _enter_critical_bh(&cam_ctl->lock, &irqL); ++ _rtw_camctl_clr_flags(adapter, flags); ++ _exit_critical_bh(&cam_ctl->lock, &irqL); ++} ++ ++inline bool _rtw_camctl_chk_flags(_adapter *adapter, u32 flags) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; ++ ++ if (cam_ctl->flags & flags) ++ return _TRUE; ++ return _FALSE; ++} ++ ++void dump_sec_cam_map(void *sel, struct sec_cam_bmp *map, u8 max_num) ++{ ++ DBG_871X_SEL_NL(sel, "0x%08x\n", map->m0); ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) ++ if (max_num && max_num > 32) ++ DBG_871X_SEL_NL(sel, "0x%08x\n", map->m1); ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) ++ if (max_num && max_num > 64) ++ DBG_871X_SEL_NL(sel, "0x%08x\n", map->m2); ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) ++ if (max_num && max_num > 96) ++ DBG_871X_SEL_NL(sel, "0x%08x\n", map->m3); ++#endif ++} ++ ++inline bool rtw_sec_camid_is_set(struct sec_cam_bmp *map, u8 id) ++{ ++ if (id < 32) ++ return (map->m0 & BIT(id)); ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) ++ else if (id < 64) ++ return (map->m1 & BIT(id - 32)); ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) ++ else if (id < 96) ++ return (map->m2 & BIT(id - 64)); ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) ++ else if (id < 128) ++ return (map->m3 & BIT(id - 96)); ++#endif ++ else ++ rtw_warn_on(1); ++ ++ return 0; ++} ++ ++inline void rtw_sec_cam_map_set(struct sec_cam_bmp *map, u8 id) ++{ ++ if (id < 32) ++ map->m0 |= BIT(id); ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) ++ else if (id < 64) ++ map->m1 |= BIT(id - 32); ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) ++ else if (id < 96) ++ map->m2 |= BIT(id - 64); ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) ++ else if (id < 128) ++ map->m3 |= BIT(id - 96); ++#endif ++ else ++ rtw_warn_on(1); ++} ++ ++inline void rtw_sec_cam_map_clr(struct sec_cam_bmp *map, u8 id) ++{ ++ if (id < 32) ++ map->m0 &= ~BIT(id); ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) ++ else if (id < 64) ++ map->m1 &= ~BIT(id-32); ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) ++ else if (id < 96) ++ map->m2 &= ~BIT(id-64); ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) ++ else if (id < 128) ++ map->m3 &= ~BIT(id-96); ++#endif ++ else ++ rtw_warn_on(1); ++} ++ ++inline void rtw_sec_cam_map_clr_all(struct sec_cam_bmp *map) ++{ ++ map->m0 = 0; ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) ++ map->m1 = 0; ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) ++ map->m2 = 0; ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) ++ map->m3 = 0; ++#endif ++} ++ ++inline bool rtw_sec_camid_is_drv_forbid(struct cam_ctl_t *cam_ctl, u8 id) ++{ ++ struct sec_cam_bmp forbid_map; ++ ++ forbid_map.m0 = 0x00000ff0; ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) ++ forbid_map.m1 = 0x00000000; ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) ++ forbid_map.m2 = 0x00000000; ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) ++ forbid_map.m3 = 0x00000000; ++#endif ++ ++ if (id < 32) ++ return (forbid_map.m0 & BIT(id)); ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) ++ else if (id < 64) ++ return (forbid_map.m1 & BIT(id - 32)); ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) ++ else if (id < 96) ++ return (forbid_map.m2 & BIT(id - 64)); ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) ++ else if (id < 128) ++ return (forbid_map.m3 & BIT(id - 96)); ++#endif ++ else ++ rtw_warn_on(1); ++ ++ return 1; ++} ++ ++bool _rtw_sec_camid_is_used(struct cam_ctl_t *cam_ctl, u8 id) ++{ ++ bool ret = _FALSE; ++ ++ if (id >= cam_ctl->num) { ++ rtw_warn_on(1); ++ goto exit; ++ } ++ ++ #if 0 /* for testing */ ++ if (rtw_sec_camid_is_drv_forbid(cam_ctl, id)) { ++ ret = _TRUE; ++ goto exit; ++ } ++ #endif ++ ++ ret = rtw_sec_camid_is_set(&cam_ctl->used, id); ++ ++exit: ++ return ret; ++} ++ ++inline bool rtw_sec_camid_is_used(struct cam_ctl_t *cam_ctl, u8 id) ++{ ++ _irqL irqL; ++ bool ret; ++ ++ _enter_critical_bh(&cam_ctl->lock, &irqL); ++ ret = _rtw_sec_camid_is_used(cam_ctl, id); ++ _exit_critical_bh(&cam_ctl->lock, &irqL); ++ ++ return ret; ++} ++ ++inline bool _rtw_camid_is_gk(_adapter *adapter, u8 cam_id) + { + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + bool ret = _FALSE; + +- if (cam_id >= TOTAL_CAM_ENTRY) ++ if (cam_id >= cam_ctl->num) { ++ rtw_warn_on(1); + goto exit; ++ } + +- if (!(cam_ctl->bitmap & BIT(cam_id))) ++ if (_rtw_sec_camid_is_used(cam_ctl, cam_id) == _FALSE) + goto exit; + + ret = (dvobj->cam_cache[cam_id].ctrl&BIT6)?_TRUE:_FALSE; +@@ -1086,7 +1368,7 @@ exit: + return ret; + } + +-bool rtw_camid_is_gk(_adapter *adapter, u8 cam_id) ++inline bool rtw_camid_is_gk(_adapter *adapter, u8 cam_id) + { + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; +@@ -1100,36 +1382,51 @@ bool rtw_camid_is_gk(_adapter *adapter, u8 cam_id) + return ret; + } + +-s16 _rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid) ++bool cam_cache_chk(_adapter *adapter, u8 id, u8 *addr, s16 kid, s8 gk) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ bool ret = _FALSE; ++ ++ if (addr && _rtw_memcmp(dvobj->cam_cache[id].mac, addr, ETH_ALEN) == _FALSE) ++ goto exit; ++ if (kid >= 0 && kid != (dvobj->cam_cache[id].ctrl&0x03)) ++ goto exit; ++ if (gk != -1 && (gk?_TRUE:_FALSE) != _rtw_camid_is_gk(adapter, id)) ++ goto exit; ++ ++ ret = _TRUE; ++ ++exit: ++ return ret; ++} ++ ++s16 _rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid, s8 gk) + { + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + int i; + s16 cam_id = -1; + +- for (i=0;icam_cache[i].mac, addr, ETH_ALEN) == _FALSE) +- continue; +- if (kid >= 0 && kid != (dvobj->cam_cache[i].ctrl&0x03)) +- continue; +- +- cam_id = i; +- break; ++ for (i = 0; i < cam_ctl->num; i++) { ++ if (cam_cache_chk(adapter, i, addr, kid, gk)) { ++ cam_id = i; ++ break; ++ } + } + + if (0) { + if (addr) +- DBG_871X(FUNC_ADPT_FMT" addr:"MAC_FMT" kid:%d, return cam_id:%d\n" +- , FUNC_ADPT_ARG(adapter), MAC_ARG(addr), kid, cam_id); ++ DBG_871X(FUNC_ADPT_FMT" addr:"MAC_FMT" kid:%d, gk:%d, return cam_id:%d\n" ++ , FUNC_ADPT_ARG(adapter), MAC_ARG(addr), kid, gk, cam_id); + else +- DBG_871X(FUNC_ADPT_FMT" addr:%p kid:%d, return cam_id:%d\n" +- , FUNC_ADPT_ARG(adapter), addr, kid, cam_id); ++ DBG_871X(FUNC_ADPT_FMT" addr:%p kid:%d, gk:%d, return cam_id:%d\n" ++ , FUNC_ADPT_ARG(adapter), addr, kid, gk, cam_id); + } + + return cam_id; + } + +-s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid) ++s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid, s8 gk) + { + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; +@@ -1137,19 +1434,21 @@ s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid) + s16 cam_id = -1; + + _enter_critical_bh(&cam_ctl->lock, &irqL); +- cam_id = _rtw_camid_search(adapter, addr, kid); ++ cam_id = _rtw_camid_search(adapter, addr, kid, gk); + _exit_critical_bh(&cam_ctl->lock, &irqL); + + return cam_id; + } + +-s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid) ++s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid, bool *used) + { + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + _irqL irqL; + s16 cam_id = -1; + ++ *used = _FALSE; ++ + _enter_critical_bh(&cam_ctl->lock, &irqL); + + #ifdef DYNAMIC_CAMID_ALLOC +@@ -1165,12 +1464,16 @@ s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid) + rtw_warn_on(1); + goto bitmap_handle; + } +- + cam_id = kid; + } + else { + int i; + u8 *addr = sta?sta->hwaddr:NULL; ++ #if 0 /* for testing */ ++ static u8 start_id = 0; ++ #else ++ u8 start_id = 0; ++ #endif + + if(!sta) { + if (!(mlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) { +@@ -1181,32 +1484,39 @@ s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid) + addr = get_bssid(&adapter->mlmepriv); + } + +- if ((i = _rtw_camid_search(adapter, addr, kid)) >= 0) { +- /* Fix issue that pairwise and group key have same key id. Pairwise key first, group key can overwirte group only(ex: rekey) */ +- if (sta || _rtw_camid_is_gk(adapter, i) == _TRUE) +- cam_id = i; +- else +- DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" group key id:%u the same key id as pairwise key\n" +- , FUNC_ADPT_ARG(adapter), kid); ++ /* find cam entry which has the same addr, kid (, gk bit) */ ++ if (_rtw_camctl_chk_cap(adapter, SEC_CAP_CHK_BMC) == _TRUE) ++ i = _rtw_camid_search(adapter, addr, kid, sta?_FALSE:_TRUE); ++ else ++ i = _rtw_camid_search(adapter, addr, kid, -1); ++ ++ if (i >= 0) { ++ cam_id = i; + goto bitmap_handle; + } + +- for (i=4;ibitmap & BIT(i))) ++ for (i = 0; i < cam_ctl->num; i++) { ++ /* bypass default key which is allocated statically */ ++ if (((i + start_id) % cam_ctl->num) < 4) ++ continue; ++ ++ if (_rtw_sec_camid_is_used(cam_ctl, ((i + start_id) % cam_ctl->num)) == _FALSE) + break; ++ } + +- if (i == TOTAL_CAM_ENTRY) { ++ if (i == cam_ctl->num) { + if (sta) + DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" pairwise key with "MAC_FMT" id:%u no room\n" +- , FUNC_ADPT_ARG(adapter), MAC_ARG(sta->hwaddr), kid); ++ , FUNC_ADPT_ARG(adapter), MAC_ARG(addr), kid); + else +- DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" group key id:%u no room\n" +- , FUNC_ADPT_ARG(adapter), kid); ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" group key with "MAC_FMT" id:%u no room\n" ++ , FUNC_ADPT_ARG(adapter), MAC_ARG(addr), kid); + rtw_warn_on(1); + goto bitmap_handle; + } + +- cam_id = i; ++ cam_id = ((i + start_id) % cam_ctl->num); ++ start_id = ((i + start_id + 1) % cam_ctl->num); + } + } + #else +@@ -1214,8 +1524,10 @@ s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid) + #endif /* DYNAMIC_CAMID_ALLOC */ + + bitmap_handle: +- if (cam_id >= 0) +- cam_ctl->bitmap |= BIT(cam_id); ++ if (cam_id >= 0) { ++ *used = _rtw_sec_camid_is_used(cam_ctl, cam_id); ++ rtw_sec_cam_map_set(&cam_ctl->used, cam_id); ++ } + + _exit_critical_bh(&cam_ctl->lock, &irqL); + +@@ -1230,31 +1542,12 @@ void rtw_camid_free(_adapter *adapter, u8 cam_id) + + _enter_critical_bh(&cam_ctl->lock, &irqL); + +- if (cam_id < TOTAL_CAM_ENTRY) +- cam_ctl->bitmap &= ~(BIT(cam_id)); ++ if (cam_id < cam_ctl->num) ++ rtw_sec_cam_map_clr(&cam_ctl->used, cam_id); + + _exit_critical_bh(&cam_ctl->lock, &irqL); + } + +-int allocate_fw_sta_entry(_adapter *padapter) +-{ +- unsigned int mac_id; +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- for (mac_id = IBSS_START_MAC_ID; mac_id < NUM_STA; mac_id++) +- { +- if (pmlmeinfo->FW_sta_info[mac_id].status == 0) +- { +- pmlmeinfo->FW_sta_info[mac_id].status = 1; +- pmlmeinfo->FW_sta_info[mac_id].retry = 0; +- break; +- } +- } +- +- return mac_id; +-} +- + void flush_all_cam_entry(_adapter *padapter) + { + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +@@ -1285,7 +1578,7 @@ void flush_all_cam_entry(_adapter *padapter) + u8 null_addr[ETH_ALEN]= {0,0,0,0,0,0}; + + for (i=0;i<4;i++) { +- cam_id = rtw_camid_search(padapter, null_addr, i); ++ cam_id = rtw_camid_search(padapter, null_addr, i, -1); + if (cam_id >= 0) { + clear_cam_entry(padapter, cam_id); + rtw_camid_free(padapter, cam_id); +@@ -1309,46 +1602,42 @@ void flush_all_cam_entry(_adapter *padapter) + rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8*)_FALSE); + #endif + } +- +- _rtw_memset((u8 *)(pmlmeinfo->FW_sta_info), 0, sizeof(pmlmeinfo->FW_sta_info)); +- + } + + #if defined(CONFIG_P2P) && defined(CONFIG_WFD) +-int WFD_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++void rtw_process_wfd_ie(_adapter *adapter, u8 *wfd_ie, u8 wfd_ielen, const char *tag) + { +- struct registry_priv *pregpriv = &padapter->registrypriv; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct wifidirect_info *pwdinfo; +- u8 wfd_ie[ 128 ] = { 0x00 }; +- u32 wfd_ielen = 0; ++ struct wifidirect_info *wdinfo = &adapter->wdinfo; + ++ u8 *attr_content; ++ u32 attr_contentlen = 0; + +- pwdinfo = &padapter->wdinfo; +- if ( rtw_get_wfd_ie( ( u8* ) pIE, pIE->Length, wfd_ie, &wfd_ielen ) ) +- { +- u8 attr_content[ 10 ] = { 0x00 }; +- u32 attr_contentlen = 0; +- +- DBG_871X( "[%s] Found WFD IE\n", __FUNCTION__ ); +- rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); +- if ( attr_contentlen ) +- { +- pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); +- DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); +- return( _TRUE ); +- } ++ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) ++ return; ++ ++ DBG_871X("[%s] Found WFD IE\n", tag); ++ attr_content = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &attr_contentlen); ++ if (attr_content && attr_contentlen) { ++ wdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16(attr_content + 2); ++ DBG_871X("[%s] Peer PORT NUM = %d\n", tag, wdinfo->wfd_info->peer_rtsp_ctrlport); + } +- else +- { +- DBG_871X( "[%s] NO WFD IE\n", __FUNCTION__ ); ++} ++ ++void rtw_process_wfd_ies(_adapter *adapter, u8 *ies, u8 ies_len, const char *tag) ++{ ++ u8 *wfd_ie; ++ u32 wfd_ielen; ++ ++ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) ++ return; + ++ wfd_ie = rtw_get_wfd_ie(ies, ies_len, NULL, &wfd_ielen); ++ while (wfd_ie) { ++ rtw_process_wfd_ie(adapter, wfd_ie, wfd_ielen, tag); ++ wfd_ie = rtw_get_wfd_ie(wfd_ie + wfd_ielen, (ies + ies_len) - (wfd_ie + wfd_ielen), NULL, &wfd_ielen); + } +- return( _FAIL ); + } +-#endif ++#endif /* defined(CONFIG_P2P) && defined(CONFIG_WFD) */ + + int WMM_param_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) + { +@@ -1569,12 +1858,14 @@ static void bwmode_update_check(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pI + + pHT_info = (struct HT_info_element *)pIE->data; + +- if (pmlmeext->cur_channel > 14) { +- if ((pregistrypriv->bw_mode & 0xf0) > 0) +- cbw40_enable = 1; +- } else { +- if ((pregistrypriv->bw_mode & 0x0f) > 0) +- cbw40_enable = 1; ++ if (hal_chk_bw_cap(padapter, BW_CAP_40M)) { ++ if (pmlmeext->cur_channel > 14) { ++ if (REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) ++ cbw40_enable = 1; ++ } else { ++ if (REGSTY_IS_BW_2G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) ++ cbw40_enable = 1; ++ } + } + + if((pHT_info->infos[0] & BIT(2)) && cbw40_enable) +@@ -1604,8 +1895,9 @@ static void bwmode_update_check(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pI + } + + +- if((new_bwmode!= pmlmeext->cur_bwmode) || (new_ch_offset!=pmlmeext->cur_ch_offset)) +- { ++ if ((new_bwmode != pmlmeext->cur_bwmode || new_ch_offset != pmlmeext->cur_ch_offset) ++ && new_bwmode < pmlmeext->cur_bwmode ++ ) { + pmlmeinfo->bwmode_updated = _TRUE; + + pmlmeext->cur_bwmode = new_bwmode; +@@ -1659,7 +1951,7 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) + { + #ifdef CONFIG_80211N_HT + unsigned int i; +- u8 rf_type; ++ u8 rf_type = RF_1T1R; + u8 max_AMPDU_len, min_MPDU_spacing; + u8 cur_ldpc_cap=0, cur_stbc_cap=0, cur_beamform_cap=0; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +@@ -1730,9 +2022,8 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) + case RF_1T2R: + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R); + break; +- case RF_2T2R: +- default: +-#ifdef CONFIG_DISABLE_MCS13TO15 ++ case RF_2T2R: ++ #ifdef CONFIG_DISABLE_MCS13TO15 + if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1 ) + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R_13TO15_OFF); + else +@@ -1740,6 +2031,12 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) + #else //CONFIG_DISABLE_MCS13TO15 + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); + #endif //CONFIG_DISABLE_MCS13TO15 ++ break; ++ case RF_3T3R: ++ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_3R); ++ break; ++ default: ++ DBG_871X("[warning] rf_type %d is not expected\n", rf_type); + } + + if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { +@@ -1757,19 +2054,24 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) + GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pIE->data)) + { + SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); ++ /* Shift to BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP*/ ++ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pIE->data) << 6); + } + + if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && + GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pIE->data)) + { + SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); ++ /* Shift to BEAMFORMING_HT_BEAMFORMER_STEER_NUM*/ ++ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pIE->data) << 4); + } + phtpriv->beamform_cap = cur_beamform_cap; + if (cur_beamform_cap) { + DBG_871X("AP HT Beamforming Cap = 0x%02X\n", cur_beamform_cap); + } +-#endif //CONFIG_BEAMFORMING ++#endif /*CONFIG_BEAMFORMING*/ + } else { ++ /*WIFI_STATION_STATEorI_ADHOC_STATE or WIFI_ADHOC_MASTER_STATE*/ + // Config LDPC Coding Capability + if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX) && GET_HT_CAP_ELE_LDPC_CAP(pIE->data)) + { +@@ -1792,18 +2094,22 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) + GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pIE->data)) + { + SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); ++ /* Shift to BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP*/ ++ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pIE->data) << 6); + } + + if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && + GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pIE->data)) + { + SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); ++ /* Shift to BEAMFORMING_HT_BEAMFORMER_STEER_NUM*/ ++ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pIE->data) << 4); + } + phtpriv->beamform_cap = cur_beamform_cap; + if (cur_beamform_cap) { + DBG_871X("Client HT Beamforming Cap = 0x%02X\n", cur_beamform_cap); + } +-#endif //CONFIG_BEAMFORMING ++#endif /*CONFIG_BEAMFORMING*/ + } + + #endif //CONFIG_80211N_HT +@@ -1932,6 +2238,7 @@ void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) + void VCS_update(_adapter *padapter, struct sta_info *psta) + { + struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + +@@ -1957,21 +2264,17 @@ void VCS_update(_adapter *padapter, struct sta_info *psta) + + case 2: //auto + default: +- if ((pmlmeinfo->ERP_enable) && (pmlmeinfo->ERP_IE & BIT(1))) +- { +- if (pregpriv->vcs_type == 1) +- { ++ if (((pmlmeinfo->ERP_enable) && (pmlmeinfo->ERP_IE & BIT(1))) ++ /*||(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)*/ ++ ) { ++ if (pregpriv->vcs_type == 1) { + psta->rtsen = 1; + psta->cts2self = 0; +- } +- else +- { ++ } else { + psta->rtsen = 0; + psta->cts2self = 1; + } +- } +- else +- { ++ } else { + psta->rtsen = 0; + psta->cts2self = 0; + } +@@ -2007,23 +2310,6 @@ void update_ldpc_stbc_cap(struct sta_info *psta) + #endif //CONFIG_80211N_HT + } + +-#ifdef CONFIG_TDLS +-int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len) +-{ +- u8 tdls_prohibited_bit = 0x40; //bit(38); TDLS_prohibited +- +- if(pkt_len < 5) +- { +- return _FALSE; +- } +- +- pframe += 4; +- if( (*pframe) & tdls_prohibited_bit ) +- return _TRUE; +- +- return _FALSE; +-} +-#endif //CONFIG_TDLS + + /* + * rtw_get_bcn_keys: get beacon keys from recv frame +@@ -2495,6 +2781,8 @@ void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta + case _EXT_CAP_IE_: + if( check_ap_tdls_prohibited(pIE->data, pIE->Length) == _TRUE ) + ptdlsinfo->ap_prohibited = _TRUE; ++ if (check_ap_tdls_ch_switching_prohibited(pIE->data, pIE->Length) == _TRUE) ++ ptdlsinfo->ch_switch_prohibited = _TRUE; + break; + #endif //CONFIG_TDLS + default: +@@ -2608,7 +2896,7 @@ unsigned int should_forbid_n_rate(_adapter * padapter) + case _RSN_IE_2_: + if ((_rtw_memcmp((pIE->data + 8), RSN_CIPHER_SUITE_CCMP, 4)) || + (_rtw_memcmp((pIE->data + 12), RSN_CIPHER_SUITE_CCMP, 4))) +- return _FALSE; ++ return _FALSE; + + default: + break; +@@ -2825,7 +3113,7 @@ unsigned char get_highest_mcs_rate(struct HT_caps_element *pHT_caps) + + void Update_RA_Entry(_adapter *padapter, struct sta_info *psta) + { +- rtw_hal_update_ra_mask(psta, 0); ++ rtw_hal_update_ra_mask(psta, psta->rssi_level); + } + + void enable_rate_adaptive(_adapter *padapter, struct sta_info *psta); +@@ -2898,9 +3186,9 @@ unsigned char check_assoc_AP(u8 *pframe, uint len) + DBG_871X("link to Artheros AP\n"); + return HT_IOT_PEER_ATHEROS; + } +- else if ((_rtw_memcmp(pIE->data, BROADCOM_OUI1, 3)) +- || (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3)) +- || (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3))) ++ else if ( (_rtw_memcmp(pIE->data, BROADCOM_OUI1, 3)) ++ || (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3)) ++ || (_rtw_memcmp(pIE->data, BROADCOM_OUI3, 3))) + { + DBG_871X("link to Broadcom AP\n"); + return HT_IOT_PEER_BROADCOM; +@@ -2977,38 +3265,6 @@ unsigned char check_assoc_AP(u8 *pframe, uint len) + return HT_IOT_PEER_UNKNOWN; + } + +-void update_IOT_info(_adapter *padapter) +-{ +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- switch (pmlmeinfo->assoc_AP_vendor) +- { +- case HT_IOT_PEER_MARVELL: +- pmlmeinfo->turboMode_cts2self = 1; +- pmlmeinfo->turboMode_rtsen = 0; +- break; +- +- case HT_IOT_PEER_RALINK: +- pmlmeinfo->turboMode_cts2self = 0; +- pmlmeinfo->turboMode_rtsen = 1; +- //disable high power +- Switch_DM_Func(padapter, (~DYNAMIC_BB_DYNAMIC_TXPWR), _FALSE); +- break; +- case HT_IOT_PEER_REALTEK: +- //rtw_write16(padapter, 0x4cc, 0xffff); +- //rtw_write16(padapter, 0x546, 0x01c0); +- //disable high power +- Switch_DM_Func(padapter, (~DYNAMIC_BB_DYNAMIC_TXPWR), _FALSE); +- break; +- default: +- pmlmeinfo->turboMode_cts2self = 0; +- pmlmeinfo->turboMode_rtsen = 1; +- break; +- } +- +-} +- + void update_capinfo(PADAPTER Adapter, u16 updateCap) + { + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; +@@ -3073,6 +3329,12 @@ void update_capinfo(PADAPTER Adapter, u16 updateCap) + + } + ++/* ++* set adapter.mlmeextpriv.mlmext_info.HT_enable ++* set adapter.mlmeextpriv.cur_wireless_mode ++* set SIFS register ++* set mgmt tx rate ++*/ + void update_wireless_mode(_adapter *padapter) + { + int ratelen, network_type = 0; +@@ -3123,6 +3385,7 @@ void update_wireless_mode(_adapter *padapter) + } + + pmlmeext->cur_wireless_mode = network_type & padapter->registrypriv.wireless_mode; ++ /* DBG_871X("network_type=%02x, padapter->registrypriv.wireless_mode=%02x\n", network_type, padapter->registrypriv.wireless_mode); */ + /* + if((pmlmeext->cur_wireless_mode==WIRELESS_11G) || + (pmlmeext->cur_wireless_mode==WIRELESS_11BG))//WIRELESS_MODE_G) +@@ -3134,22 +3397,17 @@ void update_wireless_mode(_adapter *padapter) + SIFS_Timer = 0x0a0a0808; //0x0808 -> for CCK, 0x0a0a -> for OFDM + //change this value if having IOT issues. + +- padapter->HalFunc.SetHwRegHandler( padapter, HW_VAR_RESP_SIFS, (u8 *)&SIFS_Timer); ++ rtw_hal_set_hwreg( padapter, HW_VAR_RESP_SIFS, (u8 *)&SIFS_Timer); + +- padapter->HalFunc.SetHwRegHandler( padapter, HW_VAR_WIRELESS_MODE, (u8 *)&(pmlmeext->cur_wireless_mode)); ++ rtw_hal_set_hwreg( padapter, HW_VAR_WIRELESS_MODE, (u8 *)&(pmlmeext->cur_wireless_mode)); + ++ if ((pmlmeext->cur_wireless_mode & WIRELESS_11B) + #ifdef CONFIG_P2P +- // Added by Thomas 20130822 +- // In P2P enable, do not set tx rate. +- // workaround for Actiontec GO case. +- // The Actiontec will use 1M to tx the beacon in 1.1.0 firmware. +- if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) +- return; +-#endif //CONFIG_P2P +- +- if (pmlmeext->cur_wireless_mode & WIRELESS_11B) ++ && rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) ++#endif /* CONFIG_P2P */ ++ ) + update_mgnt_tx_rate(padapter, IEEE80211_CCK_RATE_1MB); +- else ++ else + update_mgnt_tx_rate(padapter, IEEE80211_OFDM_RATE_6MB); + } + +@@ -3196,67 +3454,73 @@ void update_sta_basic_rate(struct sta_info *psta, u8 wireless_mode) + } + } + +-int update_sta_support_rate(_adapter *padapter, u8* pvar_ie, uint var_ie_len, int cam_idx) ++int rtw_ies_get_supported_rate(u8 *ies, uint ies_len, u8 *rate_set, u8 *rate_num) + { +- unsigned int ie_len; +- PNDIS_802_11_VARIABLE_IEs pIE; +- int supportRateNum = 0; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- pIE = (PNDIS_802_11_VARIABLE_IEs)rtw_get_ie(pvar_ie, _SUPPORTEDRATES_IE_, &ie_len, var_ie_len); +- if (pIE == NULL) +- { +- return _FAIL; ++ u8 *ie; ++ unsigned int ie_len; ++ ++ if (!rate_set || !rate_num) ++ return _FALSE; ++ ++ *rate_num = 0; ++ ++ ie = rtw_get_ie(ies, _SUPPORTEDRATES_IE_, &ie_len, ies_len); ++ if (ie == NULL) ++ goto ext_rate; ++ ++ _rtw_memcpy(rate_set, ie + 2, ie_len); ++ *rate_num = ie_len; ++ ++ext_rate: ++ ie = rtw_get_ie(ies, _EXT_SUPPORTEDRATES_IE_, &ie_len, ies_len); ++ if (ie) { ++ _rtw_memcpy(rate_set + *rate_num, ie + 2, ie_len); ++ *rate_num += ie_len; + } +- +- _rtw_memcpy(pmlmeinfo->FW_sta_info[cam_idx].SupportedRates, pIE->data, ie_len); +- supportRateNum = ie_len; +- +- pIE = (PNDIS_802_11_VARIABLE_IEs)rtw_get_ie(pvar_ie, _EXT_SUPPORTEDRATES_IE_, &ie_len, var_ie_len); +- if (pIE) +- { +- _rtw_memcpy((pmlmeinfo->FW_sta_info[cam_idx].SupportedRates + supportRateNum), pIE->data, ie_len); ++ ++ if (*rate_num == 0) ++ return _FAIL; ++ ++ if (0) { ++ int i; ++ ++ for (i = 0; i < *rate_num; i++) ++ DBG_871X("rate:0x%02x\n", *(rate_set + i)); + } + + return _SUCCESS; +- + } + + void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr) + { + struct sta_info *psta; + u16 tid, start_seq, param; +- struct recv_reorder_ctrl *preorder_ctrl; + struct sta_priv *pstapriv = &padapter->stapriv; + struct ADDBA_request *preq = (struct ADDBA_request*)paddba_req; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 size, accept = _FALSE; + + psta = rtw_get_stainfo(pstapriv, addr); ++ if (!psta) ++ goto exit; + +- if(psta) +- { +- start_seq = le16_to_cpu(preq->BA_starting_seqctrl) >> 4; +- +- param = le16_to_cpu(preq->BA_para_set); +- tid = (param>>2)&0x0f; +- +- preorder_ctrl = &psta->recvreorder_ctrl[tid]; ++ start_seq = le16_to_cpu(preq->BA_starting_seqctrl) >> 4; ++ ++ param = le16_to_cpu(preq->BA_para_set); ++ tid = (param>>2)&0x0f; + +- #ifdef CONFIG_UPDATE_INDICATE_SEQ_WHILE_PROCESS_ADDBA_REQ +- preorder_ctrl->indicate_seq = start_seq; +- #ifdef DBG_RX_SEQ +- DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, start_seq: %d\n", __FUNCTION__, __LINE__, +- preorder_ctrl->indicate_seq, start_seq); +- #endif +- #else +- preorder_ctrl->indicate_seq = 0xffff; +- #endif +- +- preorder_ctrl->enable =(pmlmeinfo->bAcceptAddbaReq == _TRUE)? _TRUE :_FALSE; +- } + ++ accept = rtw_rx_ampdu_is_accept(padapter); ++ size = rtw_rx_ampdu_size(padapter); ++ ++ if (accept == _TRUE) ++ rtw_addbarsp_cmd(padapter, addr, tid, 0, size, start_seq); ++ else ++ rtw_addbarsp_cmd(padapter, addr, tid, 37, size, start_seq); /* reject ADDBA Req */ ++ ++exit: ++ return; + } + + void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len) +@@ -3511,7 +3775,7 @@ void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta) + //static u8 last_id = 0; /* for testing */ + u8 last_id = 0; + +- if (_rtw_memcmp(psta->hwaddr, myid(&padapter->eeprompriv), ETH_ALEN)) { ++ if (_rtw_memcmp(psta->hwaddr, adapter_mac_addr(padapter), ETH_ALEN)) { + psta->mac_id = macid_ctl->num; + return; + } +@@ -3524,6 +3788,7 @@ void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta) + rtw_macid_map_set(&macid_ctl->bmc, 1); + for (i=0;iif_g[padapter->iface_id], 1); ++ macid_ctl->sta[1] = psta; + /* TODO ch_g? */ + _exit_critical_bh(&macid_ctl->lock, &irqL); + i = 1; +@@ -3550,6 +3815,7 @@ void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta) + rtw_macid_map_set(&macid_ctl->bmc, i); + + rtw_macid_map_set(&macid_ctl->if_g[padapter->iface_id], i); ++ macid_ctl->sta[i] = psta; + + /* TODO ch_g? */ + +@@ -3585,7 +3851,7 @@ void rtw_release_macid(_adapter *padapter, struct sta_info *psta) + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); + +- if(_rtw_memcmp(psta->hwaddr, myid(&padapter->eeprompriv), ETH_ALEN)) ++ if (_rtw_memcmp(psta->hwaddr, adapter_mac_addr(padapter), ETH_ALEN)) + return; + + #ifdef CONFIG_SHARED_BMC_MACID +@@ -3617,6 +3883,7 @@ void rtw_release_macid(_adapter *padapter, struct sta_info *psta) + rtw_macid_map_clr(&macid_ctl->if_g[i], psta->mac_id); + for (i=0;i<2;i++) + rtw_macid_map_clr(&macid_ctl->ch_g[i], psta->mac_id); ++ macid_ctl->sta[psta->mac_id] = NULL; + } + + _exit_critical_bh(&macid_ctl->lock, &irqL); +@@ -3633,9 +3900,11 @@ u8 rtw_search_max_mac_id(_adapter *padapter) + int i; + _irqL irqL; + ++ /* TODO: Only search for connected macid? */ ++ + _enter_critical_bh(&macid_ctl->lock, &irqL); + for(i=(macid_ctl->num-1); i>0 ; i--) { +- if (!rtw_macid_is_used(macid_ctl, i)) ++ if (rtw_macid_is_used(macid_ctl, i)) + break; + } + _exit_critical_bh(&macid_ctl->lock, &irqL); +@@ -3644,6 +3913,18 @@ u8 rtw_search_max_mac_id(_adapter *padapter) + return max_mac_id; + } + ++inline void rtw_macid_ctl_set_h2c_msr(struct macid_ctl_t *macid_ctl, u8 id, u8 h2c_msr) ++{ ++ if (id >= macid_ctl->num) { ++ rtw_warn_on(1); ++ return; ++ } ++ ++ macid_ctl->h2c_msr[id] = h2c_msr; ++ if (0) ++ DBG_871X("macid:%u, h2c_msr:"H2C_MSR_FMT"\n", id, H2C_MSR_ARG(&macid_ctl->h2c_msr[id])); ++} ++ + inline void rtw_macid_ctl_init(struct macid_ctl_t *macid_ctl) + { + _rtw_spinlock_init(&macid_ctl->lock); +@@ -3679,7 +3960,7 @@ unsigned int setup_beacon_frame(_adapter *padapter, unsigned char *beacon_frame) + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); + + SetFrameSubType(pframe, WIFI_BEACON); +@@ -3756,59 +4037,6 @@ unsigned int setup_beacon_frame(_adapter *padapter, unsigned char *beacon_frame) + } + #endif + +-static _adapter *pbuddy_padapter = NULL; +- +-int rtw_handle_dualmac(_adapter *adapter, bool init) +-{ +- int status = _SUCCESS; +- struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); +- +- if(adapter->chip_type != RTL8192D) +- goto exit; +- +- if (init) { +- #if 0 +- /* For SMSP on 92DU-VC, driver do not probe another Interface. */ +- if(dvobj->NumInterfaces == 2 && dvobj->InterfaceNumber != 0 && +- adapter->registrypriv.mac_phy_mode == 1) { +- DBG_871X("%s(): Do not init another USB Interface because SMSP\n",__FUNCTION__); +- status = _FAIL; +- goto exit; +- } +- #endif +- +- if (pbuddy_padapter == NULL) { +- pbuddy_padapter = adapter; +- DBG_871X("%s(): pbuddy_padapter == NULL, Set pbuddy_padapter\n",__FUNCTION__); +- } else { +- adapter->pbuddy_adapter = pbuddy_padapter; +- pbuddy_padapter->pbuddy_adapter = adapter; +- // clear global value +- pbuddy_padapter = NULL; +- DBG_871X("%s(): pbuddy_padapter exist, Exchange Information\n",__FUNCTION__); +- } +-#ifdef CONFIG_DUALMAC_CONCURRENT +- if (dvobj->InterfaceNumber == 0) { +- //set adapter_type/iface type +- adapter->isprimary = _TRUE; +- adapter->adapter_type = PRIMARY_ADAPTER; +- adapter->iface_type = IFACE_PORT0; +- DBG_871X("%s(): PRIMARY_ADAPTER\n",__FUNCTION__); +- } else { +- //set adapter_type/iface type +- adapter->isprimary = _FALSE; +- adapter->adapter_type = SECONDARY_ADAPTER; +- adapter->iface_type = IFACE_PORT1; +- DBG_871X("%s(): SECONDARY_ADAPTER\n",__FUNCTION__); +- } +-#endif +- }else { +- pbuddy_padapter = NULL; +- } +-exit: +- return status; +-} +- + _adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj) + { + _adapter *port0_iface = NULL; +@@ -3826,51 +4054,6 @@ _adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj) + return port0_iface; + } + +-/* +- * Description: +- * rtw_check_invalid_mac_address: +- * This is only used for checking mac address valid or not. +- * +- * Input: +- * adapter: mac_address pointer. +- * +- * Output: +- * _TRUE: The mac address is invalid. +- * _FALSE: The mac address is valid. +- * +- * Auther: Isaac.Li +- */ +-u8 rtw_check_invalid_mac_address(u8 *mac_addr) { +- u8 null_mac_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; +- u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; +- u8 res = _FALSE; +- +- if (_rtw_memcmp(mac_addr, null_mac_addr, ETH_ALEN)) { +- res = _TRUE; +- goto func_exit; +- } +- +- if (_rtw_memcmp(mac_addr, multi_mac_addr, ETH_ALEN)) { +- res = _TRUE; +- goto func_exit; +- } +- +- if (mac_addr[0] & BIT0) { +- res = _TRUE; +- goto func_exit; +- } +- +- if (mac_addr[0] & BIT1) { +- res = _TRUE; +- goto func_exit; +- } +- +-func_exit: +- return res; +-} +- +- +- + #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) + void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip) + { +@@ -3897,6 +4080,272 @@ void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip) + } + #endif + #ifdef CONFIG_WOWLAN ++bool rtw_check_pattern_valid(u8 *input, u8 len) ++{ ++ int i = 0; ++ bool res = _FALSE; ++ ++ if (len != 2) ++ goto exit; ++ ++ for (i = 0 ; i < len ; i++) ++ if (IsHexDigit(input[i]) == _FALSE) ++ goto exit; ++ ++ res = _SUCCESS; ++ ++exit: ++ return res; ++} ++ ++bool rtw_read_from_frame_mask(_adapter *adapter, u8 idx) ++{ ++ u32 data_l = 0, data_h = 0, rx_dma_buff_sz = 0, page_sz = 0; ++ u16 offset, rx_buf_ptr = 0; ++ u16 cam_start_offset = 0; ++ u16 ctrl_l = 0, ctrl_h = 0; ++ u8 count = 0, tmp = 0; ++ int i = 0; ++ bool res = _TRUE; ++ ++ if (idx > MAX_WKFM_NUM) { ++ DBG_871X("[Error]: %s, pattern index is out of range\n", ++ __func__); ++ return _FALSE; ++ } ++ ++ rtw_hal_get_def_var(adapter, HAL_DEF_RX_DMA_SZ_WOW, ++ (u8 *)&rx_dma_buff_sz); ++ ++ if (rx_dma_buff_sz == 0) { ++ DBG_871X("[Error]: %s, rx_dma_buff_sz is 0!!\n", __func__); ++ return _FALSE; ++ } ++ ++ rtw_hal_get_def_var(adapter, HAL_DEF_RX_PAGE_SIZE, (u8 *)&page_sz); ++ ++ if (page_sz == 0) { ++ DBG_871X("[Error]: %s, page_sz is 0!!\n", __func__); ++ return _FALSE; ++ } ++ ++ offset = (u16)PageNum(rx_dma_buff_sz, page_sz); ++ cam_start_offset = offset * page_sz; ++ ++ ctrl_l = 0x0; ++ ctrl_h = 0x0; ++ ++ /* Enable RX packet buffer access */ ++ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, RXPKT_BUF_SELECT); ++ ++ /* Read the WKFM CAM */ ++ for (i = 0; i < (WKFMCAM_ADDR_NUM / 2); i++) { ++ /* ++ * Set Rx packet buffer offset. ++ * RxBufer pointer increases 1, we can access 8 bytes in Rx packet buffer. ++ * CAM start offset (unit: 1 byte) = Index*WKFMCAM_SIZE ++ * RxBufer pointer addr = (CAM start offset + per entry offset of a WKFMCAM)/8 ++ * * Index: The index of the wake up frame mask ++ * * WKFMCAM_SIZE: the total size of one WKFM CAM ++ * * per entry offset of a WKFM CAM: Addr i * 4 bytes ++ */ ++ rx_buf_ptr = ++ (cam_start_offset + idx*WKFMCAM_SIZE + i*8) >> 3; ++ rtw_write16(adapter, REG_PKTBUF_DBG_CTRL, rx_buf_ptr); ++ ++ rtw_write16(adapter, REG_RXPKTBUF_CTRL, ctrl_l); ++ data_l = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L); ++ data_h = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H); ++ ++ DBG_871X("[%d]: %08x %08x\n", i, data_h, data_l); ++ ++ count = 0; ++ ++ do { ++ tmp = rtw_read8(adapter, REG_RXPKTBUF_CTRL); ++ rtw_udelay_os(2); ++ count++; ++ } while (!tmp && count < 100); ++ ++ if (count >= 100) { ++ DBG_871X("%s count:%d\n", __func__, count); ++ res = _FALSE; ++ } ++ } ++ ++ /* Disable RX packet buffer access */ ++ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, ++ DISABLE_TRXPKT_BUF_ACCESS); ++ return res; ++} ++ ++bool rtw_write_to_frame_mask(_adapter *adapter, u8 idx, ++ struct rtl_wow_pattern *context) ++{ ++ u32 data = 0, rx_dma_buff_sz = 0, page_sz = 0; ++ u16 offset, rx_buf_ptr = 0; ++ u16 cam_start_offset = 0; ++ u16 ctrl_l = 0, ctrl_h = 0; ++ u8 count = 0, tmp = 0; ++ int res = 0, i = 0; ++ ++ if (idx > MAX_WKFM_NUM) { ++ DBG_871X("[Error]: %s, pattern index is out of range\n", ++ __func__); ++ return _FALSE; ++ } ++ ++ rtw_hal_get_def_var(adapter, HAL_DEF_RX_DMA_SZ_WOW, ++ (u8 *)&rx_dma_buff_sz); ++ ++ if (rx_dma_buff_sz == 0) { ++ DBG_871X("[Error]: %s, rx_dma_buff_sz is 0!!\n", __func__); ++ return _FALSE; ++ } ++ ++ rtw_hal_get_def_var(adapter, HAL_DEF_RX_PAGE_SIZE, (u8 *)&page_sz); ++ ++ if (page_sz == 0) { ++ DBG_871X("[Error]: %s, page_sz is 0!!\n", __func__); ++ return _FALSE; ++ } ++ ++ offset = (u16)PageNum(rx_dma_buff_sz, page_sz); ++ ++ cam_start_offset = offset * page_sz; ++ ++ if (IS_HARDWARE_TYPE_8188E(adapter)) { ++ ctrl_l = 0x0001; ++ ctrl_h = 0x0001; ++ } else { ++ ctrl_l = 0x0f01; ++ ctrl_h = 0xf001; ++ } ++ ++ /* Enable RX packet buffer access */ ++ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, RXPKT_BUF_SELECT); ++ ++ /* Write the WKFM CAM */ ++ for (i = 0; i < WKFMCAM_ADDR_NUM; i++) { ++ /* ++ * Set Rx packet buffer offset. ++ * RxBufer pointer increases 1, we can access 8 bytes in Rx packet buffer. ++ * CAM start offset (unit: 1 byte) = Index*WKFMCAM_SIZE ++ * RxBufer pointer addr = (CAM start offset + per entry offset of a WKFMCAM)/8 ++ * * Index: The index of the wake up frame mask ++ * * WKFMCAM_SIZE: the total size of one WKFM CAM ++ * * per entry offset of a WKFM CAM: Addr i * 4 bytes ++ */ ++ rx_buf_ptr = ++ (cam_start_offset + idx*WKFMCAM_SIZE + i*4) >> 3; ++ rtw_write16(adapter, REG_PKTBUF_DBG_CTRL, rx_buf_ptr); ++ ++ if (i == 0) { ++ if (context->type == PATTERN_VALID) ++ data = BIT(31); ++ else if (context->type == PATTERN_BROADCAST) ++ data = BIT(31) | BIT(26); ++ else if (context->type == PATTERN_MULTICAST) ++ data = BIT(31) | BIT(25); ++ else if (context->type == PATTERN_UNICAST) ++ data = BIT(31) | BIT(24); ++ ++ if (context->crc != 0) ++ data |= context->crc; ++ ++ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_L, data); ++ rtw_write16(adapter, REG_RXPKTBUF_CTRL, ctrl_l); ++ } else if (i == 1) { ++ data = 0; ++ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_H, data); ++ rtw_write16(adapter, REG_RXPKTBUF_CTRL, ctrl_h); ++ } else if (i == 2 || i == 4) { ++ data = context->mask[i - 2]; ++ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_L, data); ++ /* write to RX packet buffer*/ ++ rtw_write16(adapter, REG_RXPKTBUF_CTRL, ctrl_l); ++ } else if (i == 3 || i == 5) { ++ data = context->mask[i - 2]; ++ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_H, data); ++ /* write to RX packet buffer*/ ++ rtw_write16(adapter, REG_RXPKTBUF_CTRL, ctrl_h); ++ } ++ ++ count = 0; ++ do { ++ tmp = rtw_read8(adapter, REG_RXPKTBUF_CTRL); ++ rtw_udelay_os(2); ++ count++; ++ } while (tmp && count < 100); ++ ++ if (count >= 100) ++ res = _FALSE; ++ else ++ res = _TRUE; ++ } ++ ++ /* Disable RX packet buffer access */ ++ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, ++ DISABLE_TRXPKT_BUF_ACCESS); ++ ++ return res; ++} ++ ++ ++void rtw_dump_priv_pattern(_adapter *adapter, u8 idx) ++{ ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); ++ char str_1[128]; ++ char *p_str; ++ u8 val8 = 0; ++ int i = 0, j = 0, len = 0, max_len = 0; ++ ++ DBG_871X("=========[%d]========\n", idx); ++ ++ DBG_871X(">>>priv_pattern_content:\n"); ++ p_str = str_1; ++ max_len = sizeof(str_1); ++ for (i = 0 ; i < MAX_WKFM_PATTERN_SIZE/8 ; i++) { ++ _rtw_memset(p_str, 0, max_len); ++ len = 0; ++ for (j = 0 ; j < 8 ; j++) { ++ val8 = pwrctl->patterns[idx].content[i*8 + j]; ++ len += snprintf(p_str + len, max_len - len, ++ "%02x ", val8); ++ } ++ DBG_871X("%s\n", p_str); ++ } ++ ++ DBG_871X(">>>priv_pattern_mask:\n"); ++ for (i = 0 ; i < MAX_WKFM_SIZE/8 ; i++) { ++ _rtw_memset(p_str, 0, max_len); ++ len = 0; ++ for (j = 0 ; j < 8 ; j++) { ++ val8 = pwrctl->patterns[idx].mask[i*8 + j]; ++ len += snprintf(p_str + len, max_len - len, ++ "%02x ", val8); ++ } ++ DBG_871X("%s\n", p_str); ++ } ++} ++ ++void rtw_clean_pattern(_adapter *adapter) ++{ ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); ++ struct rtl_wow_pattern zero_pattern; ++ int i = 0; ++ ++ _rtw_memset(&zero_pattern, 0, sizeof(struct rtl_wow_pattern)); ++ ++ zero_pattern.type = PATTERN_INVALID; ++ ++ for (i = 0; i < MAX_WKFM_NUM; i++) ++ rtw_write_to_frame_mask(adapter, i, &zero_pattern); ++ ++ pwrctl->wowlan_pattern_idx = 0; ++ rtw_write8(adapter, REG_WKFMCAM_NUM, pwrctl->wowlan_pattern_idx); ++} ++ + void rtw_get_sec_iv(PADAPTER padapter, u8*pcur_dot11txpn, u8 *StaAddr) + { + struct sta_info *psta; +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_xmit.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_xmit.c +old mode 100755 +new mode 100644 +index 5811139..04dedd3 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_xmit.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_xmit.c +@@ -658,6 +658,19 @@ static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattri + // pattrib->ampdu_en = _TRUE; + //} + ++#ifdef CONFIG_TDLS ++ if (pattrib->direct_link==_TRUE) { ++ psta = pattrib->ptdls_sta; ++ ++ pattrib->raid = psta->raid; ++#ifdef CONFIG_80211N_HT ++ pattrib->bwmode = psta->bw_mode; ++ pattrib->ht_en = psta->htpriv.ht_option; ++ pattrib->ch_offset = psta->htpriv.ch_offset; ++ pattrib->sgi= query_ra_short_GI(psta); ++#endif /* CONFIG_80211N_HT */ ++ } ++#endif /* CONFIG_TDLS */ + + pattrib->retry_ctrl = _FALSE; + +@@ -727,6 +740,13 @@ static s32 update_attrib_sec_info(_adapter *padapter, struct pkt_attrib *pattrib + pattrib->encrypt=_NO_PRIVACY_; + + } ++ ++#ifdef CONFIG_TDLS ++ if (pattrib->direct_link == _TRUE) { ++ if (pattrib->encrypt > 0) ++ pattrib->encrypt = _AES_; ++ } ++#endif + + switch (pattrib->encrypt) + { +@@ -810,25 +830,16 @@ static s32 update_attrib_sec_info(_adapter *padapter, struct pkt_attrib *pattrib + pattrib->bswenc = _TRUE;//force using sw enc. + } + #endif ++#ifdef DYNAMIC_CAMID_ALLOC ++ if (pattrib->encrypt && bmcast && _rtw_camctl_chk_flags(padapter, SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH)) ++ pattrib->bswenc = _TRUE; ++#endif + + #ifdef CONFIG_WAPI_SUPPORT + if(pattrib->encrypt == _SMS4_) + pattrib->bswenc = _FALSE; + #endif + +-#ifdef CONFIG_TDLS +- if(pattrib->direct_link == _TRUE) +- { +- pattrib->mac_id = pattrib->ptdls_sta->mac_id; +- if(pattrib->encrypt>0) +- { +- pattrib->encrypt= _AES_; +- pattrib->iv_len=8; +- pattrib->icv_len=8; +- pattrib->bswenc = _FALSE; +- } +- } +-#endif //CONFIG_TDLS + exit: + + return res; +@@ -896,20 +907,37 @@ static void set_qos(struct pkt_file *ppktfile, struct pkt_attrib *pattrib) + } + + #ifdef CONFIG_TDLS +-void rtw_check_tdls_established(_adapter *padapter, struct pkt_attrib *pattrib) ++u8 rtw_check_tdls_established(_adapter *padapter, struct pkt_attrib *pattrib) + { + pattrib->ptdls_sta = NULL; + + pattrib->direct_link = _FALSE; +- if((padapter->tdlsinfo.link_established == _TRUE)){ ++ if (padapter->tdlsinfo.link_established == _TRUE) { + pattrib->ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); ++#if 1 + if((pattrib->ptdls_sta!=NULL)&& + (pattrib->ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)&& + (pattrib->ether_type!=0x0806)){ + pattrib->direct_link = _TRUE; + //DBG_871X("send ptk to "MAC_FMT" using direct link\n", MAC_ARG(pattrib->dst)); + } ++#else ++ if (pattrib->ptdls_sta != NULL && ++ pattrib->ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { ++ pattrib->direct_link = _TRUE; ++ #if 0 ++ DBG_871X("send ptk to "MAC_FMT" using direct link\n", MAC_ARG(pattrib->dst)); ++ #endif ++ } ++ ++ /* ARP frame may be helped by AP*/ ++ if (pattrib->ether_type != 0x0806) { ++ pattrib->direct_link = _FALSE; ++ } ++#endif + } ++ ++ return pattrib->direct_link; + } + + s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib) +@@ -933,7 +961,7 @@ s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib) + pattrib->psta = psta; + pattrib->ack_policy = 0; + // get ether_hdr_len +- pattrib->pkt_hdrlen = ETH_HLEN;//(pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; //vlan tag ++ pattrib->pkt_hdrlen = ETH_HLEN; + + // [TDLS] TODO: setup req/rsp should be AC_BK + if (pqospriv->qos_option && psta->qos_option) { +@@ -1007,12 +1035,17 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr + if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || + (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { + _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); +- _rtw_memcpy(pattrib->ta, myid(&padapter->eeprompriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, adapter_mac_addr(padapter), ETH_ALEN); + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_adhoc); + } + else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { ++#ifdef CONFIG_TDLS ++ if (rtw_check_tdls_established(padapter, pattrib) == _TRUE) ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); /* For TDLS direct link Tx, set ra to be same to dst */ ++ else ++#endif + _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); +- _rtw_memcpy(pattrib->ta, myid(&padapter->eeprompriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, adapter_mac_addr(padapter), ETH_ALEN); + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_sta); + } + else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { +@@ -1023,65 +1056,116 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr + else + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_unknown); + +-#ifdef CONFIG_TDLS +- rtw_check_tdls_established(padapter, pattrib); +-#endif //CONFIG_TDLS ++ bmcast = IS_MCAST(pattrib->ra); ++ if (bmcast) { ++ psta = rtw_get_bcmc_stainfo(padapter); ++ if (psta == NULL) { /* if we cannot get psta => drop the pkt */ ++ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_sta); ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT "\n", MAC_ARG(pattrib->ra))); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __func__, MAC_ARG(pattrib->ra)); ++ #endif ++ res = _FAIL; ++ goto exit; ++ } ++ } else { ++ psta = rtw_get_stainfo(pstapriv, pattrib->ra); ++ if (psta == NULL) { /* if we cannot get psta => drop the pkt */ ++ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_ucast_sta); ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT"\n", MAC_ARG(pattrib->ra))); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __func__, MAC_ARG(pattrib->ra)); ++ #endif ++ res = _FAIL; ++ goto exit; ++ } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE && !(psta->state & _FW_LINKED)) { ++ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_ucast_ap_link); ++ res = _FAIL; ++ goto exit; ++ } ++ } ++ ++ if (!(psta->state & _FW_LINKED)) { ++ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_link); ++ DBG_871X("%s, psta("MAC_FMT")->state(0x%x) != _FW_LINKED\n", __func__, MAC_ARG(psta->hwaddr), psta->state); ++ res = _FAIL; ++ goto exit; ++ } + + pattrib->pktlen = pktfile.pkt_len; + +- if (ETH_P_IP == pattrib->ether_type) +- { +- // The following is for DHCP and ARP packet, we use cck1M to tx these packets and let LPS awake some time +- // to prevent DHCP protocol fail ++ /* TODO: 802.1Q VLAN header */ ++ /* TODO: IPV6 */ + +- u8 tmp[24]; +- +- _rtw_pktfile_read(&pktfile, &tmp[0], 24); ++ if (ETH_P_IP == pattrib->ether_type) { ++ u8 ip[20]; + ++ _rtw_pktfile_read(&pktfile, ip, 20); ++ ++ if (GET_IPV4_IHL(ip) * 4 > 20) ++ _rtw_pktfile_read(&pktfile, NULL, GET_IPV4_IHL(ip) - 20); ++ ++ pattrib->icmp_pkt = 0; + pattrib->dhcp_pkt = 0; +- if (pktfile.pkt_len > 282) {//MINIMUM_DHCP_PACKET_SIZE) { +- if (ETH_P_IP == pattrib->ether_type) {// IP header +- if (((tmp[21] == 68) && (tmp[23] == 67)) || +- ((tmp[21] == 67) && (tmp[23] == 68))) { +- // 68 : UDP BOOTP client +- // 67 : UDP BOOTP server +- RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("======================update_attrib: get DHCP Packet \n")); +- // Use low rate to send DHCP packet. +- //if(pMgntInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) +- //{ +- // tcb_desc->DataRate = MgntQuery_TxRateExcludeCCKRates(ieee);//0xc;//ofdm 6m +- // tcb_desc->bTxDisableRateFallBack = false; +- //} +- //else +- // pTcb->DataRate = Adapter->MgntInfo.LowestBasicRate; +- //RTPRINT(FDM, WA_IOT, ("DHCP TranslateHeader(), pTcb->DataRate = 0x%x\n", pTcb->DataRate)); ++ ++ if (GET_IPV4_PROTOCOL(ip) == 0x01) { /* ICMP */ ++ pattrib->icmp_pkt = 1; ++ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_icmp); ++ ++ } else if (GET_IPV4_PROTOCOL(ip) == 0x11) { /* UDP */ ++ u8 udp[8]; ++ ++ _rtw_pktfile_read(&pktfile, udp, 8); ++ ++ if ((GET_UDP_SRC(udp) == 68 && GET_UDP_DST(udp) == 67) ++ || (GET_UDP_SRC(udp) == 67 && GET_UDP_DST(udp) == 68) ++ ) { ++ /* 67 : UDP BOOTP server, 68 : UDP BOOTP client */ ++ if (pattrib->pktlen > 282) { /* MINIMUM_DHCP_PACKET_SIZE */ + pattrib->dhcp_pkt = 1; + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_dhcp); ++ if (0) ++ DBG_871X("send DHCP packet\n"); + } + } +- } + +- //for parsing ICMP pakcets +- { +- struct iphdr *piphdr = (struct iphdr *)tmp; +- +- pattrib->icmp_pkt = 0; +- if(piphdr->protocol == 0x1) // protocol type in ip header 0x1 is ICMP +- { +- pattrib->icmp_pkt = 1; +- DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_icmp); ++ } else if (GET_IPV4_PROTOCOL(ip) == 0x06 /* TCP */ ++ && rtw_st_ctl_chk_reg_s_proto(&psta->st_ctl, 0x06) == _TRUE ++ ) { ++ u8 tcp[20]; ++ ++ _rtw_pktfile_read(&pktfile, tcp, 20); ++ ++ if (rtw_st_ctl_chk_reg_rule(&psta->st_ctl, padapter, IPV4_SRC(ip), TCP_SRC(tcp), IPV4_DST(ip), TCP_DST(tcp)) == _TRUE) { ++ if (GET_TCP_SYN(tcp) && GET_TCP_ACK(tcp)) { ++ session_tracker_add_cmd(padapter, psta ++ , IPV4_SRC(ip), TCP_SRC(tcp) ++ , IPV4_SRC(ip), TCP_DST(tcp)); ++ if (DBG_SESSION_TRACKER) ++ DBG_871X(FUNC_ADPT_FMT" local:"IP_FMT":"PORT_FMT", remote:"IP_FMT":"PORT_FMT" SYN-ACK\n" ++ , FUNC_ADPT_ARG(padapter) ++ , IP_ARG(IPV4_SRC(ip)), PORT_ARG(TCP_SRC(tcp)) ++ , IP_ARG(IPV4_DST(ip)), PORT_ARG(TCP_DST(tcp))); ++ } ++ if (GET_TCP_FIN(tcp)) { ++ session_tracker_del_cmd(padapter, psta ++ , IPV4_SRC(ip), TCP_SRC(tcp) ++ , IPV4_SRC(ip), TCP_DST(tcp)); ++ if (DBG_SESSION_TRACKER) ++ DBG_871X(FUNC_ADPT_FMT" local:"IP_FMT":"PORT_FMT", remote:"IP_FMT":"PORT_FMT" FIN\n" ++ , FUNC_ADPT_ARG(padapter) ++ , IP_ARG(IPV4_SRC(ip)), PORT_ARG(TCP_SRC(tcp)) ++ , IP_ARG(IPV4_DST(ip)), PORT_ARG(TCP_DST(tcp))); ++ } + } +- } ++ } + +- + } else if (0x888e == pattrib->ether_type) { + DBG_871X_LEVEL(_drv_always_, "send eapol packet\n"); + } + +- if ( (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) +- { ++ if ((pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1)) + rtw_set_scan_deny(padapter, 3000); +- } + + #ifdef CONFIG_LPS + // If EAPOL , ARP , OR DHCP packet, driver must be in active mode. +@@ -1105,49 +1189,9 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr + } + #endif //CONFIG_LPS + +- bmcast = IS_MCAST(pattrib->ra); +- +- // get sta_info +- if (bmcast) { +- psta = rtw_get_bcmc_stainfo(padapter); +- } else { +- psta = rtw_get_stainfo(pstapriv, pattrib->ra); +- if (psta == NULL) { // if we cannot get psta => drop the pkt +- DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_ucast_sta); +- RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT"\n", MAC_ARG(pattrib->ra))); +- #ifdef DBG_TX_DROP_FRAME +- DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra)); +- #endif +- res =_FAIL; +- goto exit; +- } +- else if((check_fwstate(pmlmepriv, WIFI_AP_STATE)==_TRUE)&&(!(psta->state & _FW_LINKED))) +- { +- DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_ucast_ap_link); +- res =_FAIL; +- goto exit; +- } +- } +- +- if(psta == NULL) +- { // if we cannot get psta => drop the pkt +- DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_sta); +- RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT "\n", MAC_ARG(pattrib->ra))); +- #ifdef DBG_TX_DROP_FRAME +- DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra)); +- #endif +- res = _FAIL; +- goto exit; +- } +- +- if(!(psta->state &_FW_LINKED)) +- { +- DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_link); +- DBG_871X("%s, psta("MAC_FMT")->state(0x%x) != _FW_LINKED\n", __func__, MAC_ARG(psta->hwaddr), psta->state); +- return _FAIL; +- } +- +- ++#ifdef CONFIG_BEAMFORMING ++ update_attrib_txbf_info(padapter, pattrib, psta); ++#endif + + //TODO:_lock + if(update_attrib_sec_info(padapter, pattrib, psta) == _FAIL) +@@ -1181,13 +1225,18 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr + } + else + { +- if(pqospriv->qos_option) ++#ifdef CONFIG_TDLS ++ if (pattrib->direct_link == _TRUE) { ++ if (pattrib->qos_en) ++ set_qos(&pktfile, pattrib); ++ } else ++#endif + { +- set_qos(&pktfile, pattrib); ++ if (pqospriv->qos_option) { ++ set_qos(&pktfile, pattrib); + +- if(pmlmepriv->acm_mask != 0) +- { +- pattrib->priority = qos_acm(pmlmepriv->acm_mask, pattrib->priority); ++ if (pmlmepriv->acm_mask != 0) ++ pattrib->priority = qos_acm(pmlmepriv->acm_mask, pattrib->priority); + } + } + } +@@ -1404,11 +1453,6 @@ s32 rtw_make_wlanhdr (_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib) + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct qos_priv *pqospriv = &pmlmepriv->qospriv; + u8 qos_option = _FALSE; +-#ifdef CONFIG_TDLS +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- struct sta_priv *pstapriv = &padapter->stapriv; +-#endif //CONFIG_TDLS +- + sint res = _SUCCESS; + u16 *fctrl = &pwlanhdr->frame_ctl; + +@@ -1452,6 +1496,9 @@ _func_enter_; + _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); ++ ++ if (pattrib->qos_en) ++ qos_option = _TRUE; + } + else + #endif //CONFIG_TDLS +@@ -1463,11 +1510,10 @@ _func_enter_; + _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, pattrib->ta, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); +- } +- +- if (pqospriv->qos_option) +- qos_option = _TRUE; + ++ if (pqospriv->qos_option) ++ qos_option = _TRUE; ++ } + } + else if ((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ) { + //to_ds = 0, fr_ds = 1; +@@ -1539,25 +1585,6 @@ _func_enter_; + + if(psta) + { +-#ifdef CONFIG_TDLS +- if(pattrib->direct_link==_TRUE) +- { +- psta = pattrib->ptdls_sta; +- +- //qos_en, ht_en, init rate, ,bw, ch_offset, sgi +- //pattrib->qos_en = ptdls_sta->qos_option; +- +- pattrib->raid = psta->raid; +-#ifdef CONFIG_80211N_HT +- pattrib->bwmode = psta->bw_mode; +- pattrib->ht_en = psta->htpriv.ht_option; +- pattrib->ch_offset = psta->htpriv.ch_offset; +- pattrib->sgi= query_ra_short_GI(psta); +-#endif //CONFIG_80211N_HT +- } +-#endif //CONFIG_TDLS +- +- + psta->sta_xmitpriv.txseq_tid[pattrib->priority]++; + psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; + pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority]; +@@ -1709,16 +1736,18 @@ int rtw_build_tdls_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 * + rtw_build_tdls_dis_req_ies(padapter, pxmitframe, pframe, ptxmgmt); + break; + case TDLS_PEER_TRAFFIC_INDICATION: +- rtw_build_tdls_peer_traffic_indication_ies(padapter, pxmitframe, pframe); ++ rtw_build_tdls_peer_traffic_indication_ies(padapter, pxmitframe, pframe, ptxmgmt); + break; ++#ifdef CONFIG_TDLS_CH_SW + case TDLS_CHANNEL_SWITCH_REQUEST: +- rtw_build_tdls_ch_switch_req_ies(padapter, pxmitframe, pframe); ++ rtw_build_tdls_ch_switch_req_ies(padapter, pxmitframe, pframe, ptxmgmt); + break; + case TDLS_CHANNEL_SWITCH_RESPONSE: +- rtw_build_tdls_ch_switch_rsp_ies(padapter, pxmitframe, pframe); ++ rtw_build_tdls_ch_switch_rsp_ies(padapter, pxmitframe, pframe, ptxmgmt); + break; ++#endif + case TDLS_PEER_TRAFFIC_RESPONSE: +- rtw_build_tdls_peer_traffic_rsp_ies(padapter, pxmitframe, pframe); ++ rtw_build_tdls_peer_traffic_rsp_ies(padapter, pxmitframe, pframe, ptxmgmt); + break; + #ifdef CONFIG_WFD + case TUNNELED_PROBE_REQ: +@@ -1760,7 +1789,7 @@ _func_enter_; + case TDLS_SETUP_RESPONSE: + case TDLS_SETUP_CONFIRM: + case TDLS_PEER_TRAFFIC_INDICATION: +- case TDLS_PEER_PSM_REQUEST: //directly to peer STA or via AP ++ case TDLS_PEER_PSM_REQUEST: + case TUNNELED_PROBE_REQ: + case TUNNELED_PROBE_RSP: + case TDLS_DISCOVERY_REQUEST: +@@ -1876,11 +1905,15 @@ _func_enter_; + } + } + +- if(psta==NULL) +- return _FAIL; ++ if (psta==NULL) { ++ res = _FAIL; ++ goto exit; ++ } + +- if (pxmitframe->buf_addr == NULL) +- return _FAIL; ++ if (pxmitframe->buf_addr == NULL) { ++ res = _FAIL; ++ goto exit; ++ } + + pbuf_start = pxmitframe->buf_addr; + mem_start = pbuf_start + TXDESC_OFFSET; +@@ -1944,6 +1977,7 @@ _func_enter_; + + if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) + { ++ res = _FAIL; + goto exit; + } + +@@ -2238,9 +2272,6 @@ _func_enter_; + + _enter_critical_bh(&padapter->security_key_mutex, &irqL); + +- //only support station mode +- if(!check_fwstate(pmlmepriv, WIFI_STATION_STATE) || !check_fwstate(pmlmepriv, _FW_LINKED)) +- goto xmitframe_coalesce_success; + + //IGTK key is not install, it may not support 802.11w + if(padapter->securitypriv.binstallBIPkey != _TRUE) +@@ -2337,9 +2368,8 @@ _func_enter_; + goto xmitframe_coalesce_fail; + } + +- if(!(psta->state & _FW_LINKED) || pxmitframe->buf_addr==NULL) +- { +- DBG_871X("%s, not _FW_LINKED or addr null\n", __func__); ++ if (pxmitframe->buf_addr == NULL) { ++ DBG_871X("%s, pxmitframe->buf_addr\n", __func__); + goto xmitframe_coalesce_fail; + } + +@@ -2362,6 +2392,13 @@ _func_enter_; + }*/ + if(pattrib->encrypt>0) + _rtw_memcpy(pattrib->dot118021x_UncstKey.skey, psta->dot118021x_UncstKey.skey, 16); ++ ++ /* To use wrong key */ ++ if (pattrib->key_type == IEEE80211W_WRONG_KEY) { ++ DBG_871X("use wrong key\n"); ++ pattrib->dot118021x_UncstKey.skey[0] = 0xff; ++ } ++ + //bakeup original management packet + _rtw_memcpy(tmp_buf, pframe, pattrib->pktlen); + //move to data portion +@@ -3096,7 +3133,7 @@ static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv, str + { + pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); + +- xmitframe_plist = get_next(xmitframe_plist); ++ /* xmitframe_plist = get_next(xmitframe_plist); */ + + /*#ifdef RTK_DMP_PLATFORM + #ifdef CONFIG_USB_TX_AGGREGATION +@@ -3738,6 +3775,147 @@ static void do_queue_select(_adapter *padapter, struct pkt_attrib *pattrib) + * 0 success, hardware will handle this xmit frame(packet) + * <0 fail + */ ++s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev) ++{ ++ int ret = 0; ++ int rtap_len; ++ int qos_len = 0; ++ int dot11_hdr_len = 24; ++ int snap_len = 6; ++ unsigned char *pdata; ++ u16 frame_ctl; ++ unsigned char src_mac_addr[6]; ++ unsigned char dst_mac_addr[6]; ++ struct rtw_ieee80211_hdr *dot11_hdr; ++ struct ieee80211_radiotap_header *rtap_hdr; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ if (skb) ++ rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); ++ ++ if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) ++ goto fail; ++ ++ rtap_hdr = (struct ieee80211_radiotap_header *)skb->data; ++ if (unlikely(rtap_hdr->it_version)) ++ goto fail; ++ ++ rtap_len = ieee80211_get_radiotap_len(skb->data); ++ if (unlikely(skb->len < rtap_len)) ++ goto fail; ++ ++ if (rtap_len != 12) { ++ DBG_8192C("radiotap len (should be 14): %d\n", rtap_len); ++ goto fail; ++ } ++ ++ /* Skip the ratio tap header */ ++ skb_pull(skb, rtap_len); ++ ++ dot11_hdr = (struct rtw_ieee80211_hdr *)skb->data; ++ frame_ctl = le16_to_cpu(dot11_hdr->frame_ctl); ++ /* Check if the QoS bit is set */ ++ ++ if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) { ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 *buf = skb->data; ++ u32 len = skb->len; ++ u8 category, action; ++ int type = -1; ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ if (pmgntframe == NULL) { ++ rtw_udelay_os(500); ++ goto fail; ++ } ++ pattrib = &pmgntframe->attrib; ++ ++ update_monitor_frame_attrib(padapter, pattrib); ++ ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ _rtw_memcpy(pframe, (void *)buf, len); ++ ++ pattrib->pktlen = len; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ if (is_broadcast_mac_addr(pwlanhdr->addr3) || is_broadcast_mac_addr(pwlanhdr->addr1)) ++ pattrib->rate = MGN_24M; ++ ++ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ pmlmeext->mgnt_seq++; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ } else { ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 *buf = skb->data; ++ u32 len = skb->len; ++ u8 category, action; ++ int type = -1; ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ if (pmgntframe == NULL) ++ goto fail; ++ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ _rtw_memcpy(pframe, (void *)buf, len); ++ ++ pattrib->pktlen = len; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ pmlmeext->mgnt_seq++; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ } ++ ++fail: ++ ++ rtw_skb_free(skb); ++ ++ return 0; ++} ++ ++/* ++ * The main transmit(tx) entry ++ * ++ * Return ++ * 1 enqueue ++ * 0 success, hardware will handle this xmit frame(packet) ++ * <0 fail ++ */ + s32 rtw_xmit(_adapter *padapter, _pkt **ppkt) + { + static u32 start = 0; +@@ -3900,13 +4078,11 @@ sint xmitframe_enqueue_for_tdls_sleeping_sta(_adapter *padapter, struct xmit_fra + break; + } + ++ /* Transmit TDLS PTI via AP */ + if(ptdls_sta->sleepq_len==1) +- { +- //transmit TDLS PTI via AP +- rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_SD_PTI); +- } +- ret = _TRUE; ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_ISSUE_PTI); + ++ ret = _TRUE; + } + + _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); +@@ -3927,9 +4103,11 @@ inline bool xmitframe_hiq_filter(struct xmit_frame *xmitframe) + _adapter *adapter = xmitframe->padapter; + struct registry_priv *registry = &adapter->registrypriv; + +-if (adapter->interface_type != RTW_PCIE) { ++if (rtw_get_intf_type(adapter) != RTW_PCIE) { + +- if (registry->hiq_filter == RTW_HIQ_FILTER_ALLOW_SPECIAL) { ++ if (adapter->registrypriv.wifi_spec == 1) { ++ allow = _TRUE; ++ } else if (registry->hiq_filter == RTW_HIQ_FILTER_ALLOW_SPECIAL) { + + struct pkt_attrib *attrib = &xmitframe->attrib; + +@@ -3941,8 +4119,8 @@ if (adapter->interface_type != RTW_PCIE) { + || attrib->dhcp_pkt + ) { + if (0) +- DBG_871X(FUNC_ADPT_FMT" ether_type:0x%04x%s\n", FUNC_ADPT_ARG(xmitframe->padapter) +- , attrib->ether_type, attrib->dhcp_pkt?" DHCP":""); ++ DBG_871X(FUNC_ADPT_FMT" ether_type:0x%04x%s\n", FUNC_ADPT_ARG(xmitframe->padapter) ++ , attrib->ether_type, attrib->dhcp_pkt?" DHCP":""); + allow = _TRUE; + } + } +@@ -4052,14 +4230,21 @@ sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *p + pstapriv->sta_dz_bitmap |= BIT(0); + + //DBG_871X("enqueue, sq_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap); +- +- if (update_tim == _TRUE) { +- if (is_broadcast_mac_addr(pattrib->ra)) +- _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "buffer BC"); +- else +- _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "buffer MC"); ++ if (padapter->registrypriv.wifi_spec == 1) { ++ /* ++ *if (update_tim == _TRUE) ++ * rtw_chk_hi_queue_cmd(padapter); ++ */ + } else { +- chk_bmc_sleepq_cmd(padapter); ++ ++ if (update_tim == _TRUE) { ++ if (is_broadcast_mac_addr(pattrib->ra)) ++ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "buffer BC"); ++ else ++ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "buffer MC"); ++ } else { ++ chk_bmc_sleepq_cmd(padapter); ++ } + } + + //_exit_critical_bh(&psta->sleep_q.lock, &irqL); +@@ -4236,10 +4421,7 @@ void stop_sta_xmit(_adapter *padapter, struct sta_info *psta) + rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending)); + + #ifdef CONFIG_TDLS +- if( !(psta->tdls_sta_state & TDLS_LINKED_STATE) ) +- { +- if( psta_bmc != NULL ) +- { ++ if (!(psta->tdls_sta_state & TDLS_LINKED_STATE) && (psta_bmc != NULL)) { + #endif //CONFIG_TDLS + + +@@ -4251,7 +4433,6 @@ void stop_sta_xmit(_adapter *padapter, struct sta_info *psta) + + #ifdef CONFIG_TDLS + } +- } + #endif //CONFIG_TDLS + _exit_critical_bh(&pxmitpriv->lock, &irqL0); + +@@ -4539,7 +4720,7 @@ exit: + return; + } + +-#endif ++#endif /* defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) */ + + #ifdef CONFIG_XMIT_THREAD_MODE + void enqueue_pending_xmitbuf( +@@ -4711,6 +4892,39 @@ thread_return rtw_xmit_thread(thread_context context) + } + #endif + ++bool rtw_xmit_ac_blocked(_adapter *adapter) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ _adapter *iface; ++ struct mlme_ext_priv *mlmeext; ++ struct mlme_ext_info *mlmeextinfo; ++ bool blocked = _FALSE; ++ int i; ++ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ iface = dvobj->padapters[i]; ++ mlmeext = &iface->mlmeextpriv; ++ ++ /* check scan state */ ++ if (mlmeext_scan_state(mlmeext) != SCAN_DISABLE ++ && mlmeext_scan_state(mlmeext) != SCAN_BACK_OP ++ ) { ++ blocked = _TRUE; ++ goto exit; ++ } ++ ++ if (mlmeext_scan_state(mlmeext) == SCAN_BACK_OP ++ && !mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_TX_RESUME) ++ ) { ++ blocked = _TRUE; ++ goto exit; ++ } ++ } ++ ++exit: ++ return blocked; ++} ++ + void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms) + { + sctx->timeout_ms = timeout_ms; +@@ -4807,11 +5021,11 @@ int rtw_ack_tx_polling(struct xmit_priv *pxmitpriv, u32 timeout_ms) + if (pack_tx_ops->status != RTW_SCTX_SUBMITTED) + break; + +- if (adapter->bDriverStopped) { ++ if (rtw_is_drv_stopped(adapter)) { + pack_tx_ops->status = RTW_SCTX_DONE_DRV_STOP; + break; + } +- if (adapter->bSurpriseRemoved) { ++ if (rtw_is_surprise_removed(adapter)) { + pack_tx_ops->status = RTW_SCTX_DONE_DEV_REMOVE; + break; + } +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/HalPwrSeqCmd.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/HalPwrSeqCmd.c +old mode 100755 +new mode 100644 +index 972a3d8..6d063aa +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/HalPwrSeqCmd.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/HalPwrSeqCmd.c +@@ -1,183 +1,183 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-/*++ +-Copyright (c) Realtek Semiconductor Corp. All rights reserved. +- +-Module Name: +- HalPwrSeqCmd.c +- +-Abstract: +- Implement HW Power sequence configuration CMD handling routine for Realtek devices. +- +-Major Change History: +- When Who What +- ---------- --------------- ------------------------------- +- 2011-10-26 Lucas Modify to be compatible with SD4-CE driver. +- 2011-07-07 Roger Create. +- +---*/ +-#include +- +- +-// +-// Description: +-// This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC. +-// +-// Assumption: +-// We should follow specific format which was released from HW SD. +-// +-// 2011.07.07, added by Roger. +-// +-u8 HalPwrSeqCmdParsing( +- PADAPTER padapter, +- u8 CutVersion, +- u8 FabVersion, +- u8 InterfaceType, +- WLAN_PWR_CFG PwrSeqCmd[]) +-{ +- WLAN_PWR_CFG PwrCfgCmd = {0}; +- u8 bPollingBit = _FALSE; +- u32 AryIdx = 0; +- u8 value = 0; +- u32 offset = 0; +- u32 pollingCount = 0; // polling autoload done. +- u32 maxPollingCnt = 5000; +- +- do { +- PwrCfgCmd = PwrSeqCmd[AryIdx]; +- +- RT_TRACE(_module_hal_init_c_ , _drv_info_, +- ("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n", +- GET_PWR_CFG_OFFSET(PwrCfgCmd), +- GET_PWR_CFG_CUT_MASK(PwrCfgCmd), +- GET_PWR_CFG_FAB_MASK(PwrCfgCmd), +- GET_PWR_CFG_INTF_MASK(PwrCfgCmd), +- GET_PWR_CFG_BASE(PwrCfgCmd), +- GET_PWR_CFG_CMD(PwrCfgCmd), +- GET_PWR_CFG_MASK(PwrCfgCmd), +- GET_PWR_CFG_VALUE(PwrCfgCmd))); +- +- //2 Only Handle the command whose FAB, CUT, and Interface are matched +- if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) && +- (GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) && +- (GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) +- { +- switch (GET_PWR_CFG_CMD(PwrCfgCmd)) +- { +- case PWR_CMD_READ: +- RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n")); +- break; +- +- case PWR_CMD_WRITE: +- RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n")); +- offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); +- +-#ifdef CONFIG_SDIO_HCI +- // +- // We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface +- // 2011.07.07. +- // +- if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) +- { +- // Read Back SDIO Local value +- value = SdioLocalCmd52Read1Byte(padapter, offset); +- +- value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd)); +- value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)); +- +- // Write Back SDIO Local value +- SdioLocalCmd52Write1Byte(padapter, offset, value); +- } +- else +-#endif +- { +-#ifdef CONFIG_GSPI_HCI +- if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) +- offset = SPI_LOCAL_OFFSET | offset; +-#endif +- // Read the value from system register +- value = rtw_read8(padapter, offset); +- +- value=value&(~(GET_PWR_CFG_MASK(PwrCfgCmd))); +- value=value|(GET_PWR_CFG_VALUE(PwrCfgCmd)&GET_PWR_CFG_MASK(PwrCfgCmd)); +- +- // Write the value back to sytem register +- rtw_write8(padapter, offset, value); +- } +- break; +- +- case PWR_CMD_POLLING: +- RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n")); +- +- bPollingBit = _FALSE; +- offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); +-#ifdef CONFIG_GSPI_HCI +- if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) +- offset = SPI_LOCAL_OFFSET | offset; +-#endif +- do { +-#ifdef CONFIG_SDIO_HCI +- if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) +- value = SdioLocalCmd52Read1Byte(padapter, offset); +- else +-#endif +- value = rtw_read8(padapter, offset); +- +- value=value&GET_PWR_CFG_MASK(PwrCfgCmd); +- if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd))) +- bPollingBit = _TRUE; +- else +- rtw_udelay_os(10); +- +- if (pollingCount++ > maxPollingCnt) { +- DBG_871X_LEVEL(_drv_always_, "HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value); +- return _FALSE; +- } +- } while (!bPollingBit); +- +- break; +- +- case PWR_CMD_DELAY: +- RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n")); +- if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US) +- rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)); +- else +- rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000); +- break; +- +- case PWR_CMD_END: +- // When this command is parsed, end the process +- RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n")); +- return _TRUE; +- break; +- +- default: +- RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n")); +- break; +- } +- } +- +- AryIdx++;//Add Array Index +- }while(1); +- +- return _TRUE; +-} +- +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/*++ ++Copyright (c) Realtek Semiconductor Corp. All rights reserved. ++ ++Module Name: ++ HalPwrSeqCmd.c ++ ++Abstract: ++ Implement HW Power sequence configuration CMD handling routine for Realtek devices. ++ ++Major Change History: ++ When Who What ++ ---------- --------------- ------------------------------- ++ 2011-10-26 Lucas Modify to be compatible with SD4-CE driver. ++ 2011-07-07 Roger Create. ++ ++--*/ ++#include ++ ++ ++// ++// Description: ++// This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC. ++// ++// Assumption: ++// We should follow specific format which was released from HW SD. ++// ++// 2011.07.07, added by Roger. ++// ++u8 HalPwrSeqCmdParsing( ++ PADAPTER padapter, ++ u8 CutVersion, ++ u8 FabVersion, ++ u8 InterfaceType, ++ WLAN_PWR_CFG PwrSeqCmd[]) ++{ ++ WLAN_PWR_CFG PwrCfgCmd = {0}; ++ u8 bPollingBit = _FALSE; ++ u32 AryIdx = 0; ++ u8 value = 0; ++ u32 offset = 0; ++ u32 pollingCount = 0; // polling autoload done. ++ u32 maxPollingCnt = 5000; ++ ++ do { ++ PwrCfgCmd = PwrSeqCmd[AryIdx]; ++ ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ++ ("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n", ++ GET_PWR_CFG_OFFSET(PwrCfgCmd), ++ GET_PWR_CFG_CUT_MASK(PwrCfgCmd), ++ GET_PWR_CFG_FAB_MASK(PwrCfgCmd), ++ GET_PWR_CFG_INTF_MASK(PwrCfgCmd), ++ GET_PWR_CFG_BASE(PwrCfgCmd), ++ GET_PWR_CFG_CMD(PwrCfgCmd), ++ GET_PWR_CFG_MASK(PwrCfgCmd), ++ GET_PWR_CFG_VALUE(PwrCfgCmd))); ++ ++ //2 Only Handle the command whose FAB, CUT, and Interface are matched ++ if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) && ++ (GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) && ++ (GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) ++ { ++ switch (GET_PWR_CFG_CMD(PwrCfgCmd)) ++ { ++ case PWR_CMD_READ: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n")); ++ break; ++ ++ case PWR_CMD_WRITE: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n")); ++ offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); ++ ++#ifdef CONFIG_SDIO_HCI ++ // ++ // We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface ++ // 2011.07.07. ++ // ++ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) ++ { ++ // Read Back SDIO Local value ++ value = SdioLocalCmd52Read1Byte(padapter, offset); ++ ++ value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd)); ++ value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)); ++ ++ // Write Back SDIO Local value ++ SdioLocalCmd52Write1Byte(padapter, offset, value); ++ } ++ else ++#endif ++ { ++#ifdef CONFIG_GSPI_HCI ++ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) ++ offset = SPI_LOCAL_OFFSET | offset; ++#endif ++ // Read the value from system register ++ value = rtw_read8(padapter, offset); ++ ++ value=value&(~(GET_PWR_CFG_MASK(PwrCfgCmd))); ++ value=value|(GET_PWR_CFG_VALUE(PwrCfgCmd)&GET_PWR_CFG_MASK(PwrCfgCmd)); ++ ++ // Write the value back to sytem register ++ rtw_write8(padapter, offset, value); ++ } ++ break; ++ ++ case PWR_CMD_POLLING: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n")); ++ ++ bPollingBit = _FALSE; ++ offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); ++#ifdef CONFIG_GSPI_HCI ++ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) ++ offset = SPI_LOCAL_OFFSET | offset; ++#endif ++ do { ++#ifdef CONFIG_SDIO_HCI ++ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) ++ value = SdioLocalCmd52Read1Byte(padapter, offset); ++ else ++#endif ++ value = rtw_read8(padapter, offset); ++ ++ value=value&GET_PWR_CFG_MASK(PwrCfgCmd); ++ if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd))) ++ bPollingBit = _TRUE; ++ else ++ rtw_udelay_os(10); ++ ++ if (pollingCount++ > maxPollingCnt) { ++ DBG_871X_LEVEL(_drv_err_, "HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value); ++ return _FALSE; ++ } ++ } while (!bPollingBit); ++ ++ break; ++ ++ case PWR_CMD_DELAY: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n")); ++ if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US) ++ rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)); ++ else ++ rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000); ++ break; ++ ++ case PWR_CMD_END: ++ // When this command is parsed, end the process ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n")); ++ return _TRUE; ++ break; ++ ++ default: ++ RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n")); ++ break; ++ } ++ } ++ ++ AryIdx++;//Add Array Index ++ }while(1); ++ ++ return _TRUE; ++} ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8188c2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8188c2Ant.c +new file mode 100644 +index 0000000..59c2d4c +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8188c2Ant.c +@@ -0,0 +1,1987 @@ ++//============================================================ ++// Description: ++// ++// This file is for 92CE/92CU BT 1 Antenna Co-exist mechanism ++// ++// By cosa 02/11/2011 ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8188c2Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8188C_2ANT GLCoexDm8188c2Ant; ++static PCOEX_DM_8188C_2ANT pCoexDm=&GLCoexDm8188c2Ant; ++static COEX_STA_8188C_2ANT GLCoexSta8188c2Ant; ++static PCOEX_STA_8188C_2ANT pCoexSta=&GLCoexSta8188c2Ant; ++ ++//============================================================ ++// local function start with btdm_ ++//============================================================ ++u1Byte ++halbtc8188c2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++u1Byte ++halbtc8188c2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ u1Byte algorithm=BT_8188C_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ if(!pStackInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pStackInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(pStackInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO algorithm\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(numOfDiffProfile == 1) ++ { ++ if(pStackInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_HID; ++ } ++ else if(pStackInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pStackInfo->bPanExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN only\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_PAN; ++ } ++ } ++ else ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_HID_PAN; ++ } ++ else if( pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN + A2DP\n")); ++ algorithm = BT_8188C_2ANT_COEX_ALGO_PAN_A2DP; ++ } ++ } ++ } ++ return algorithm; ++} ++ ++VOID ++halbtc8188c2ant_SetFwBalance( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBalanceOn, ++ IN u1Byte ms0, ++ IN u1Byte ms1 ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ ++ if(bBalanceOn) ++ { ++ H2C_Parameter[2] = 1; ++ H2C_Parameter[1] = ms1; ++ H2C_Parameter[0] = ms0; ++ } ++ else ++ { ++ H2C_Parameter[2] = 0; ++ H2C_Parameter[1] = 0; ++ H2C_Parameter[0] = 0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Balance=[%s:%dms:%dms], write 0xc=0x%x\n", ++ bBalanceOn?"ON":"OFF", ms0, ms1, ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0xc, 3, H2C_Parameter); ++} ++ ++VOID ++halbtc8188c2ant_Balance( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bBalanceOn, ++ IN u1Byte ms0, ++ IN u1Byte ms1 ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Balance %s\n", ++ (bForceExec? "force to":""), (bBalanceOn? "ON":"OFF"))); ++ pCoexDm->bCurBalanceOn = bBalanceOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBalanceOn == pCoexDm->bCurBalanceOn) ++ return; ++ } ++ halbtc8188c2ant_SetFwBalance(pBtCoexist, bBalanceOn, ms0, ms1); ++ ++ pCoexDm->bPreBalanceOn = pCoexDm->bCurBalanceOn; ++} ++ ++VOID ++halbtc8188c2ant_SetFwDiminishWifi( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bDacOn, ++ IN BOOLEAN bInterruptOn, ++ IN u1Byte fwDacSwingLvl, ++ IN BOOLEAN bNavOn ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ ++ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (fwDacSwingLvl == 0x20)) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], DiminishWiFi 0x20 original, but set 0x18 for Low RSSI!\n")); ++ fwDacSwingLvl = 0x18; ++ } ++ ++ H2C_Parameter[2] = 0; ++ H2C_Parameter[1] = fwDacSwingLvl; ++ H2C_Parameter[0] = 0; ++ if(bDacOn) ++ { ++ H2C_Parameter[2] |= 0x01; //BIT0 ++ if(bInterruptOn) ++ { ++ H2C_Parameter[2] |= 0x02; //BIT1 ++ } ++ } ++ if(bNavOn) ++ { ++ H2C_Parameter[2] |= 0x08; //BIT3 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bDacOn=%s, bInterruptOn=%s, bNavOn=%s, write 0xe=0x%x\n", ++ (bDacOn?"ON":"OFF"), (bInterruptOn?"ON":"OFF"), (bNavOn?"ON":"OFF"), ++ (H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]))); ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0xe, 3, H2C_Parameter); ++} ++ ++VOID ++halbtc8188c2ant_DiminishWifi( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacOn, ++ IN BOOLEAN bInterruptOn, ++ IN u1Byte fwDacSwingLvl, ++ IN BOOLEAN bNavOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set Diminish Wifi, bDacOn=%s, bInterruptOn=%s, fwDacSwingLvl=%d, bNavOn=%s\n", ++ (bForceExec? "force to":""), (bDacOn? "ON":"OFF"), (bInterruptOn? "ON":"OFF"), fwDacSwingLvl, (bNavOn? "ON":"OFF"))); ++ ++ pCoexDm->bCurDacOn = bDacOn; ++ pCoexDm->bCurInterruptOn = bInterruptOn; ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ pCoexDm->bCurNavOn = bNavOn; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacOn==pCoexDm->bCurDacOn) && ++ (pCoexDm->bPreInterruptOn==pCoexDm->bCurInterruptOn) && ++ (pCoexDm->preFwDacSwingLvl==pCoexDm->curFwDacSwingLvl) && ++ (pCoexDm->bPreNavOn==pCoexDm->bCurNavOn) ) ++ return; ++ } ++ halbtc8188c2ant_SetFwDiminishWifi(pBtCoexist, bDacOn, bInterruptOn, fwDacSwingLvl, bNavOn); ++ ++ pCoexDm->bPreDacOn = pCoexDm->bCurDacOn; ++ pCoexDm->bPreInterruptOn = pCoexDm->bCurInterruptOn; ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++ pCoexDm->bPreNavOn = pCoexDm->bCurNavOn; ++} ++ ++VOID ++halbtc8188c2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xf0, 0xf); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xf0, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8188c2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8188c2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8188c2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte tmpU1; ++ ++ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); ++ if(bLowPenaltyRa) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); ++ tmpU1 &= ~BIT2; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); ++ tmpU1 |= BIT2; ++ } ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); ++} ++ ++VOID ++halbtc8188c2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8188c2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8188c2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ u4Byte dacSwingLvl; ++ ++ if(bSwDacSwingOn) ++ { ++ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (swDacSwingLvl == 0x20)) ++ { ++ dacSwingLvl = 0x18; ++ } ++ else ++ { ++ dacSwingLvl = swDacSwingLvl; ++ } ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, dacSwingLvl); ++ } ++ else ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, 0x30); ++ } ++} ++ ++VOID ++halbtc8188c2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8188c2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8188c2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611); ++ } ++} ++ ++VOID ++halbtc8188c2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8188c2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8188c2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4e1c0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4d1d0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4c1e0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4b1f0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4a200001); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x90000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x51000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x12000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x00255); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x641c0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x631d0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x621e0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x611f0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x60200001); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x32000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x71000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xb0000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xfc000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x10255); ++ } ++ ++ // set rssiAdjustVal for wifi module. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++ ++VOID ++halbtc8188c2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8188c2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8188c2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u4Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8188c2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u4Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8188c2ant_SetCoexTable(pBtCoexist, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8188c2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++VOID ++halbtc8188c2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++ ++VOID ++halbtc8188c2ant_MonitorBtState( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN stateChange=FALSE; ++ u4Byte BT_Polling, Ratio_Act, Ratio_STA; ++ u4Byte BT_Active, BT_State; ++ u4Byte regBTActive=0, regBTState=0, regBTPolling=0; ++ u4Byte btBusyThresh=0; ++ u4Byte fwVer=0; ++ static BOOLEAN bBtBusyTraffic=FALSE; ++ BOOLEAN bRejApAggPkt=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FirmwareVersion = 0x%x(%d)\n", fwVer, fwVer)); ++ if(fwVer < 62) ++ { ++ regBTActive = 0x488; ++ regBTState = 0x48c; ++ regBTPolling = 0x490; ++ } ++ else ++ { ++ regBTActive = 0x444; ++ regBTState = 0x448; ++ if(fwVer >= 74) ++ regBTPolling = 0x44c; ++ else ++ regBTPolling = 0x700; ++ } ++ btBusyThresh = 60; ++ ++ BT_Active = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTActive); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Active(0x%x)=0x%x\n", regBTActive, BT_Active)); ++ BT_Active = BT_Active & 0x00ffffff; ++ ++ BT_State = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTState); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_State(0x%x)=0x%x\n", regBTState, BT_State)); ++ BT_State = BT_State & 0x00ffffff; ++ ++ BT_Polling = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTPolling); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Polling(0x%x)=0x%x\n", regBTPolling, BT_Polling)); ++ ++ if(BT_Active==0xffffffff && BT_State==0xffffffff && BT_Polling==0xffffffff ) ++ return; ++ ++ // 2011/05/04 MH For Slim combo test meet a problem. Surprise remove and WLAN is running ++ // DHCP process. At the same time, the register read value might be zero. And cause BSOD 0x7f ++ // EXCEPTION_DIVIDED_BY_ZERO. In This case, the stack content may always be wrong due to ++ // HW divide trap. ++ if (BT_Polling==0) ++ return; ++ ++ Ratio_Act = BT_Active*1000/BT_Polling; ++ Ratio_STA = BT_State*1000/BT_Polling; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_Act=%d\n", Ratio_Act)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_STA=%d\n", Ratio_STA)); ++ ++ if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_STA < 60) // BT PAN idle ++ { ++ } ++ else ++ { ++ // Check if BT PAN (under BT 2.1) is uplink or downlink ++ if((Ratio_Act/Ratio_STA) < 2) ++ { // BT PAN Uplink ++ pCoexSta->bBtUplink = TRUE; ++ } ++ else ++ { // BT PAN downlink ++ pCoexSta->bBtUplink = FALSE; ++ } ++ } ++ } ++ ++ // Check BT is idle or not ++ if(!pBtCoexist->stackInfo.bBtLinkExist) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_Act<20) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bBtBusy = TRUE; ++ } ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_STA < btBusyThresh) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bBtBusy = TRUE; ++ } ++ ++ if( (Ratio_STA < btBusyThresh) || ++ (Ratio_Act<180 && Ratio_STA<130) ) ++ { ++ pCoexSta->bA2dpBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bA2dpBusy = TRUE; ++ } ++ } ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &pCoexSta->bBtBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &pCoexSta->bBtBusy); ++ ++ if(bBtBusyTraffic != pCoexSta->bBtBusy) ++ { // BT idle or BT non-idle ++ bBtBusyTraffic = pCoexSta->bBtBusy; ++ stateChange = TRUE; ++ } ++ ++ if(stateChange) ++ { ++ if(!pCoexSta->bBtBusy) ++ { ++ halbtc8188c2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ } ++ else ++ { ++ halbtc8188c2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ } ++ ++ if(stateChange) ++ { ++ bRejApAggPkt = pCoexSta->bBtBusy; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejApAggPkt); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionA2dpBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ ++ if(pCoexSta->bBtBusy) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionA2dpBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ BOOLEAN bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ if(pCoexSta->bA2dpBusy && bWifiBusy) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x18); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ } ++ else if(pCoexSta->bA2dpBusy) ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionA2dpBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionA2dpBc8(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionPanBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ if(bBtHsOn) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ else ++ { ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ } ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++ ++VOID ++halbtc8188c2ant_ActionPanBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ s4Byte wifiRssi; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(bBtHsOn) ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ else ++ { ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 3, 25, 50); ++ ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ } ++ else if( (wifiRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_MEDIUM) ) ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); ++ else ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ if(pCoexSta->bBtUplink) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); ++ } ++ else ++ { ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ } ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else if(pCoexSta->bBtBusy && !bWifiBusy && (wifiRssi < 30)) ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x0a, 0x20); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionPan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionPanBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionPanBc8(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte wifiBw, wifiTrafficDir; ++ BOOLEAN bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_BW_LEGACY == wifiBw) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(!bWifiBusy) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++ ++ ++VOID ++halbtc8188c2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionHidA2dpBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ ++ if(pCoexSta->bBtBusy) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x7, 0x20); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x7, 0x20); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++} ++VOID ++halbtc8188c2ant_ActionHidA2dpBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ if(pCoexSta->bBtBusy) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionHidA2dpBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionHidA2dpBc8(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionHidPanBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(bBtHsOn) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_BW_LEGACY == wifiBw) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(!bWifiBusy) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ } ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++VOID ++halbtc8188c2ant_ActionHidPanBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!bBtHsOn) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); ++ if((pCoexSta->bBtBusy && bWifiBusy)) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); ++ } ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ if(BTC_INTF_USB == pBtCoexist->chipInterface) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ } ++ else ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionHidPan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionHidPanBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionHidPanBc8(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionPanA2dpBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ if(bBtHsOn) ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++} ++VOID ++halbtc8188c2ant_ActionPanA2dpBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!bBtHsOn) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ wifiRssiState = halbtc8188c2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); ++ if((pCoexSta->bBtBusy && bWifiBusy)) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); ++ } ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8188c2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8188c2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8188c2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8188c2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++} ++ ++VOID ++halbtc8188c2ant_ActionPanA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionPanA2dpBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8188c2ant_ActionPanA2dpBc8(pBtCoexist); ++ } ++} ++ ++//============================================================ ++// extern function start with EXhalbtc8188c2ant_ ++//============================================================ ++VOID ++EXhalbtc8188c2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8188c2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xf0); ++ ++ if( (BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) || ++ (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ) ++ { ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd) & BIT0; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, u1Tmp); ++ ++ halbtc8188c2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0xaaaa9aaa, 0xffbd0040, 0x40000010); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8188c2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8188c2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pStackInfo->bProfileNotified) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8188c2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ //halbtc8188c2ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ halbtc8188c2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ halbtc8188c2ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++ ++} ++ ++VOID ++EXhalbtc8188c2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8188c2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8188c2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ EXhalbtc8188c2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8188c2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte algorithm; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Periodical!!\n")); ++ ++ // NOTE: ++ // sw mechanism must be done after fw mechanism ++ // ++ ++ if((BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) || ++ (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_GET_BT_RSSI, NULL); ++ ++ halbtc8188c2ant_MonitorBtState(pBtCoexist); ++ algorithm = halbtc8188c2ant_ActionAlgorithm(pBtCoexist); ++ pCoexDm->curAlgorithm = algorithm; ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8188C_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO\n")); ++ halbtc8188c2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID\n")); ++ halbtc8188c2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP\n")); ++ halbtc8188c2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_PAN: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN\n")); ++ halbtc8188c2ant_ActionPan(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n")); ++ halbtc8188c2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_HID_PAN: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+HID\n")); ++ halbtc8188c2ant_ActionHidPan(pBtCoexist); ++ break; ++ case BT_8188C_2ANT_COEX_ALGO_PAN_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n")); ++ halbtc8188c2ant_ActionPanA2dp(pBtCoexist); ++ break; ++ default: ++ break; ++ } ++ } ++} ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8188c2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8188c2Ant.h +new file mode 100644 +index 0000000..e4aa715 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8188c2Ant.h +@@ -0,0 +1,149 @@ ++//=========================================== ++// The following is for 8188C 2Ant BT Co-exist definition ++//=========================================== ++#define BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT 6 ++ ++typedef enum _BT_INFO_SRC_8188C_2ANT{ ++ BT_INFO_SRC_8188C_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8188C_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8188C_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8188C_2ANT_MAX ++}BT_INFO_SRC_8188C_2ANT,*PBT_INFO_SRC_8188C_2ANT; ++ ++typedef enum _BT_8188C_2ANT_BT_STATUS{ ++ BT_8188C_2ANT_BT_STATUS_IDLE = 0x0, ++ BT_8188C_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8188C_2ANT_BT_STATUS_NON_IDLE = 0x2, ++ BT_8188C_2ANT_BT_STATUS_MAX ++}BT_8188C_2ANT_BT_STATUS,*PBT_8188C_2ANT_BT_STATUS; ++ ++typedef enum _BT_8188C_2ANT_COEX_ALGO{ ++ BT_8188C_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8188C_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8188C_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8188C_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8188C_2ANT_COEX_ALGO_PAN = 0x4, ++ BT_8188C_2ANT_COEX_ALGO_HID_A2DP = 0x5, ++ BT_8188C_2ANT_COEX_ALGO_HID_PAN = 0x6, ++ BT_8188C_2ANT_COEX_ALGO_PAN_A2DP = 0x7, ++ BT_8188C_2ANT_COEX_ALGO_MAX ++}BT_8188C_2ANT_COEX_ALGO,*PBT_8188C_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8188C_2ANT{ ++ // fw mechanism ++ BOOLEAN bPreBalanceOn; ++ BOOLEAN bCurBalanceOn; ++ ++ // diminishWifi ++ BOOLEAN bPreDacOn; ++ BOOLEAN bCurDacOn; ++ BOOLEAN bPreInterruptOn; ++ BOOLEAN bCurInterruptOn; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bPreNavOn; ++ BOOLEAN bCurNavOn; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ //u4Byte preVal0x6c0; ++ //u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u4Byte preVal0x6cc; ++ u4Byte curVal0x6cc; ++ //BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ //u1Byte btStatus; ++ //u1Byte wifiChnlInfo[3]; ++} COEX_DM_8188C_2ANT, *PCOEX_DM_8188C_2ANT; ++ ++typedef struct _COEX_STA_8188C_2ANT{ ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bBtBusy; ++ BOOLEAN bBtUplink; ++ BOOLEAN bBtDownLink; ++ BOOLEAN bA2dpBusy; ++}COEX_STA_8188C_2ANT, *PCOEX_STA_8188C_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8188c2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8188c2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8188c2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8188c2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8188c2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8188c2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8188c2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8188c2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192d2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192d2Ant.c +new file mode 100644 +index 0000000..0cb38ee +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192d2Ant.c +@@ -0,0 +1,1992 @@ ++//============================================================ ++// Description: ++// ++// This file is for 92D BT 2 Antenna Co-exist mechanism ++// ++// By cosa 02/11/2011 ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8192d2Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8192D_2ANT GLCoexDm8192d2Ant; ++static PCOEX_DM_8192D_2ANT pCoexDm=&GLCoexDm8192d2Ant; ++static COEX_STA_8192D_2ANT GLCoexSta8192d2Ant; ++static PCOEX_STA_8192D_2ANT pCoexSta=&GLCoexSta8192d2Ant; ++ ++//============================================================ ++// local function start with btdm_ ++//============================================================ ++u1Byte ++halbtc8192d2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++u1Byte ++halbtc8192d2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8192D_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pStackInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pStackInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(pStackInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO algorithm\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(numOfDiffProfile == 1) ++ { ++ if(pStackInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_HID; ++ } ++ else if(pStackInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pStackInfo->bPanExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN only\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_PAN; ++ } ++ } ++ else ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_HID_PAN; ++ } ++ else if( pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN + A2DP\n")); ++ algorithm = BT_8192D_2ANT_COEX_ALGO_PAN_A2DP; ++ } ++ } ++ } ++ return algorithm; ++} ++ ++VOID ++halbtc8192d2ant_SetFwBalance( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBalanceOn, ++ IN u1Byte ms0, ++ IN u1Byte ms1 ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ ++ if(bBalanceOn) ++ { ++ H2C_Parameter[2] = 1; ++ H2C_Parameter[1] = ms1; ++ H2C_Parameter[0] = ms0; ++ } ++ else ++ { ++ H2C_Parameter[2] = 0; ++ H2C_Parameter[1] = 0; ++ H2C_Parameter[0] = 0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Balance=[%s:%dms:%dms], write 0xc=0x%x\n", ++ bBalanceOn?"ON":"OFF", ms0, ms1, ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0xc, 3, H2C_Parameter); ++} ++ ++VOID ++halbtc8192d2ant_Balance( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bBalanceOn, ++ IN u1Byte ms0, ++ IN u1Byte ms1 ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Balance %s\n", ++ (bForceExec? "force to":""), (bBalanceOn? "ON":"OFF"))); ++ pCoexDm->bCurBalanceOn = bBalanceOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBalanceOn == pCoexDm->bCurBalanceOn) ++ return; ++ } ++ halbtc8192d2ant_SetFwBalance(pBtCoexist, bBalanceOn, ms0, ms1); ++ ++ pCoexDm->bPreBalanceOn = pCoexDm->bCurBalanceOn; ++} ++ ++VOID ++halbtc8192d2ant_SetFwDiminishWifi( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bDacOn, ++ IN BOOLEAN bInterruptOn, ++ IN u1Byte fwDacSwingLvl, ++ IN BOOLEAN bNavOn ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ ++ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (fwDacSwingLvl == 0x20)) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], DiminishWiFi 0x20 original, but set 0x18 for Low RSSI!\n")); ++ fwDacSwingLvl = 0x18; ++ } ++ ++ H2C_Parameter[2] = 0; ++ H2C_Parameter[1] = fwDacSwingLvl; ++ H2C_Parameter[0] = 0; ++ if(bDacOn) ++ { ++ H2C_Parameter[2] |= 0x01; //BIT0 ++ if(bInterruptOn) ++ { ++ H2C_Parameter[2] |= 0x02; //BIT1 ++ } ++ } ++ if(bNavOn) ++ { ++ H2C_Parameter[2] |= 0x08; //BIT3 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bDacOn=%s, bInterruptOn=%s, bNavOn=%s, write 0x12=0x%x\n", ++ (bDacOn?"ON":"OFF"), (bInterruptOn?"ON":"OFF"), (bNavOn?"ON":"OFF"), ++ (H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]))); ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x12, 3, H2C_Parameter); ++} ++ ++ ++VOID ++halbtc8192d2ant_DiminishWifi( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacOn, ++ IN BOOLEAN bInterruptOn, ++ IN u1Byte fwDacSwingLvl, ++ IN BOOLEAN bNavOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set Diminish Wifi, bDacOn=%s, bInterruptOn=%s, fwDacSwingLvl=%d, bNavOn=%s\n", ++ (bForceExec? "force to":""), (bDacOn? "ON":"OFF"), (bInterruptOn? "ON":"OFF"), fwDacSwingLvl, (bNavOn? "ON":"OFF"))); ++ ++ pCoexDm->bCurDacOn = bDacOn; ++ pCoexDm->bCurInterruptOn = bInterruptOn; ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ pCoexDm->bCurNavOn = bNavOn; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacOn==pCoexDm->bCurDacOn) && ++ (pCoexDm->bPreInterruptOn==pCoexDm->bCurInterruptOn) && ++ (pCoexDm->preFwDacSwingLvl==pCoexDm->curFwDacSwingLvl) && ++ (pCoexDm->bPreNavOn==pCoexDm->bCurNavOn) ) ++ return; ++ } ++ halbtc8192d2ant_SetFwDiminishWifi(pBtCoexist, bDacOn, bInterruptOn, fwDacSwingLvl, bNavOn); ++ ++ pCoexDm->bPreDacOn = pCoexDm->bCurDacOn; ++ pCoexDm->bPreInterruptOn = pCoexDm->bCurInterruptOn; ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++ pCoexDm->bPreNavOn = pCoexDm->bCurNavOn; ++} ++ ++VOID ++halbtc8192d2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf2ff7); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++ ++VOID ++halbtc8192d2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8192d2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8192d2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte tmpU1; ++ ++ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); ++ if(bLowPenaltyRa) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); ++ tmpU1 &= ~BIT2; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); ++ tmpU1 |= BIT2; ++ } ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); ++} ++ ++VOID ++halbtc8192d2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8192d2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8192d2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ u4Byte dacSwingLvl; ++ ++ if(bSwDacSwingOn) ++ { ++ if((pBtCoexist->stackInfo.minBtRssi <= -5) && (swDacSwingLvl == 0x20)) ++ { ++ dacSwingLvl = 0x18; ++ } ++ else ++ { ++ dacSwingLvl = swDacSwingLvl; ++ } ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, dacSwingLvl); ++ } ++ else ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, 0x30); ++ } ++} ++ ++VOID ++halbtc8192d2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8192d2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8192d2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611); ++ } ++} ++ ++VOID ++halbtc8192d2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8192d2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8192d2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0xa99); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xd4000); ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b000001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b010001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b020001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b030001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b040001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b050001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b060001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b070001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b080001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b090001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7a0C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x790D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x780E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x76100001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x75110001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x74120001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x73130001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x72140001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71150001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70160001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6f170001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e180001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d190001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4f1E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4e1F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4d200001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4c210001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4b220001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4a230001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49240001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48250001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47260001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46270001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45280001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44290001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x432A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x422B0001); ++ ++ rssiAdjustVal = 12; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x30a99); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000); ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B000001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B010001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B020001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B030001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B040001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B050001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B060001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7A070001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x79080001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x78090001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x760B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x750C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x740D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x730E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x720F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71100001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70110001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6F120001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6E130001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6D140001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6C150001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6B160001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6A170001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x69180001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68190001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x671A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x661B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x651C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x641D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x631E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x621F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x61200001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x60210001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49220001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48230001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47240001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46250001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45260001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44270001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x43280001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x42290001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x412A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x402B0001); ++ } ++ ++ // set rssiAdjustVal for wifi module. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++ ++ ++VOID ++halbtc8192d2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8192d2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8192d2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u4Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8192d2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u4Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8192d2ant_SetCoexTable(pBtCoexist, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8192d2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw mechanism ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++VOID ++halbtc8192d2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++halbtc8192d2ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte btActive ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtDisabled=FALSE, bForceToRoam=FALSE; ++ u4Byte u4Tmp=0; ++ ++ // This function check if bt is disabled ++ if(btActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ ++ bForceToRoam = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_FORCE_TO_ROAM, &bForceToRoam); ++ ++ bPreBtDisabled = bBtDisabled; ++ } ++} ++ ++VOID ++halbtc8192d2ant_MonitorBtState( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN stateChange=FALSE; ++ u4Byte BT_Polling, Ratio_Act, Ratio_STA; ++ u4Byte BT_Active, BT_State; ++ u4Byte regBTActive=0, regBTState=0, regBTPolling=0; ++ u4Byte btBusyThresh=0; ++ u4Byte fwVer=0; ++ static BOOLEAN bBtBusyTraffic=FALSE; ++ BOOLEAN bRejApAggPkt=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FirmwareVersion = 0x%x(%d)\n", fwVer, fwVer)); ++ ++ regBTActive = 0x444; ++ regBTState = 0x448; ++ regBTPolling = 0x44c; ++ ++ btBusyThresh = 40; ++ ++ BT_Active = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTActive); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Active(0x%x)=0x%x\n", regBTActive, BT_Active)); ++ BT_Active = BT_Active & 0x00ffffff; ++ ++ BT_State = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTState); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_State(0x%x)=0x%x\n", regBTState, BT_State)); ++ BT_State = BT_State & 0x00ffffff; ++ ++ BT_Polling = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTPolling); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Polling(0x%x)=0x%x\n", regBTPolling, BT_Polling)); ++ ++ if(BT_Active==0xffffffff && BT_State==0xffffffff && BT_Polling==0xffffffff ) ++ return; ++ ++ // 2011/05/04 MH For Slim combo test meet a problem. Surprise remove and WLAN is running ++ // DHCP process. At the same time, the register read value might be zero. And cause BSOD 0x7f ++ // EXCEPTION_DIVIDED_BY_ZERO. In This case, the stack content may always be wrong due to ++ // HW divide trap. ++ if (BT_Polling==0) ++ return; ++ ++ halbtc8192d2ant_MonitorBtEnableDisable(pBtCoexist, BT_Active); ++ ++ Ratio_Act = BT_Active*1000/BT_Polling; ++ Ratio_STA = BT_State*1000/BT_Polling; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_Act=%d\n", Ratio_Act)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_STA=%d\n", Ratio_STA)); ++ ++ if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_STA < 60) // BT PAN idle ++ { ++ } ++ else ++ { ++ // Check if BT PAN (under BT 2.1) is uplink or downlink ++ if((Ratio_Act/Ratio_STA) < 2) ++ { // BT PAN Uplink ++ pCoexSta->bBtUplink = TRUE; ++ } ++ else ++ { // BT PAN downlink ++ pCoexSta->bBtUplink = FALSE; ++ } ++ } ++ } ++ ++ // Check BT is idle or not ++ if(!pBtCoexist->stackInfo.bBtLinkExist) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_Act<20) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bBtBusy = TRUE; ++ } ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ if(Ratio_STA < btBusyThresh) ++ { ++ pCoexSta->bBtBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bBtBusy = TRUE; ++ } ++ ++ if( (Ratio_STA < btBusyThresh) || ++ (Ratio_Act<180 && Ratio_STA<130) ) ++ { ++ pCoexSta->bA2dpBusy = FALSE; ++ } ++ else ++ { ++ pCoexSta->bA2dpBusy = TRUE; ++ } ++ } ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &pCoexSta->bBtBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &pCoexSta->bBtBusy); ++ ++ if(bBtBusyTraffic != pCoexSta->bBtBusy) ++ { // BT idle or BT non-idle ++ bBtBusyTraffic = pCoexSta->bBtBusy; ++ stateChange = TRUE; ++ } ++ ++ if(stateChange) ++ { ++ if(!pCoexSta->bBtBusy) ++ { ++ halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ } ++ else ++ { ++ halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ } ++ ++ if(stateChange) ++ { ++ bRejApAggPkt = pCoexSta->bBtBusy; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejApAggPkt); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiBw, wifiTrafficDir; ++ BOOLEAN bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ if(pCoexSta->bA2dpBusy && bWifiBusy) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ } ++ else ++ { ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 40, 0); ++ } ++ } ++ ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x18); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ } ++ else if(pCoexSta->bA2dpBusy) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionPan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState, wifiRssiState1; ++ u4Byte wifiBw, wifiTrafficDir; ++ s4Byte wifiRssi; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(bBtHsOn) ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ else ++ { ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 3, 25, 50); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ } ++ else ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0); ++ } ++ ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ } ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ } ++ else if( (wifiRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_MEDIUM) ) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); ++ else ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20); ++ ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ if(pCoexSta->bBtUplink) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON); ++ } ++ else ++ { ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ } ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else if(pCoexSta->bBtBusy && ++ !bWifiBusy && ++ (wifiRssi < 30)) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x0a, 0x20); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++} ++ ++ ++VOID ++halbtc8192d2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ u4Byte wifiTrafficDir; ++ BOOLEAN bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 45, 0); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 20, 0); ++ } ++ ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ // fw mechanism first ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x15); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x30, FALSE); ++ } ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++ ++ ++VOID ++halbtc8192d2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1; ++ u4Byte wifiBw; ++ ++ if(pCoexSta->bBtBusy) ++ { ++ wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 35, 0); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ // fw mechanism first ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ // fw mechanism ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else ++ { ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++} ++ ++ ++VOID ++halbtc8192d2ant_ActionHidPanBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(bBtHsOn) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_BW_LEGACY == wifiBw) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else if(!bWifiBusy) ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ } ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++} ++VOID ++halbtc8192d2ant_ActionHidPanBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ u4Byte wifiBw, wifiTrafficDir; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!bBtHsOn) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); ++ if((pCoexSta->bBtBusy && bWifiBusy)) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); ++ } ++ else ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); ++ } ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ if(BTC_INTF_USB == pBtCoexist->chipInterface) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ ++ halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir) ++ { ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ } ++ } ++ else ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionHidPan( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8192d2ant_ActionHidPanBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8192d2ant_ActionHidPanBc8(pBtCoexist); ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionPanA2dpBc4( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0); ++ if(bBtHsOn) ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ if(pCoexSta->bBtBusy && bWifiBusy) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ } ++ else ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE); ++ } ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++} ++VOID ++halbtc8192d2ant_ActionPanA2dpBc8( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!bBtHsOn) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); ++ if((pCoexSta->bBtBusy && bWifiBusy)) ++ { ++ // fw mechanism first ++ if(pCoexSta->bBtUplink) ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20); ++ } ++ else ++ { ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20); ++ } ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE); ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++ else ++ { ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ } ++ else ++ { ++ if(pCoexSta->bBtBusy) ++ { ++ // fw mechanism ++ halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0); ++ halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE); ++ ++ // sw mechanism ++ halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20); ++ } ++ else ++ { ++ halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30); ++ } ++ } ++} ++ ++VOID ++halbtc8192d2ant_ActionPanA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8192d2ant_ActionPanA2dpBc4(pBtCoexist); ++ } ++ else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ halbtc8192d2ant_ActionPanA2dpBc8(pBtCoexist); ++ } ++} ++ ++BOOLEAN ++halbtc8192d2ant_IsBtCoexistEnter( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte macPhyMode; ++ BOOLEAN bRet=TRUE; ++ BOOLEAN bWifiUnder5G=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_MAC_PHY_MODE, &macPhyMode); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); ++ ++ if(BTC_SMSP != macPhyMode) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Only support single mac single phy!!\n")); ++ bRet = FALSE; ++ } ++ ++ if(bWifiUnder5G) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under 5G or A band\n")); ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ bRet = FALSE; ++ } ++ ++ return bRet; ++} ++ ++//============================================================ ++// extern function start with EXhalbtc8192d2ant_ ++//============================================================ ++VOID ++EXhalbtc8192d2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8192d2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ if( (BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) || ++ (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ) ++ { ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd) & BIT0; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, u1Tmp); ++ ++ halbtc8192d2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0xaaaa9aaa, 0xffbd0040, 0x40000010); ++ ++ // switch control, here we set pathA to control ++ // 0x878[13] = 1, 0:pathB, 1:pathA(default) ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x878, BIT13, 0x1); ++ ++ // antsel control, here we use phy0 and enable antsel. ++ // 0x87c[16:15] = b'11, enable antsel, antsel output pin ++ // 0x87c[30] = 0, 0: phy0, 1:phy 1 ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x87c, bMaskDWord, 0x1fff8); ++ ++ // antsel to Bt or Wifi, it depends Bt on/off. ++ // 0x860[9:8] = 'b10, b10:Bt On, WL2G off(default), b01:Bt off, WL2G on. ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x860, BIT9|BIT8, 0x2); ++ ++ // sw/hw control switch, here we set sw control ++ // 0x870[9:8] = 'b11 sw control, 'b00 hw control ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x870, BIT9|BIT8, 0x3); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8192d2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8192d2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pStackInfo->bProfileNotified) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8192d2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ //halbtc8192d2ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ halbtc8192d2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ halbtc8192d2ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8192d2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8192d2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ EXhalbtc8192d2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8192d2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte algorithm; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Periodical!!\n")); ++ ++ // NOTE: ++ // sw mechanism must be done after fw mechanism ++ // ++ if(!halbtc8192d2ant_IsBtCoexistEnter(pBtCoexist)) ++ return; ++ ++ if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_GET_BT_RSSI, NULL); ++ ++ halbtc8192d2ant_MonitorBtState(pBtCoexist); ++ algorithm = halbtc8192d2ant_ActionAlgorithm(pBtCoexist); ++ pCoexDm->curAlgorithm = algorithm; ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8192D_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO\n")); ++ halbtc8192d2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID\n")); ++ halbtc8192d2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP\n")); ++ halbtc8192d2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_PAN: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN\n")); ++ halbtc8192d2ant_ActionPan(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n")); ++ halbtc8192d2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_HID_PAN: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+HID\n")); ++ halbtc8192d2ant_ActionHidPan(pBtCoexist); ++ break; ++ case BT_8192D_2ANT_COEX_ALGO_PAN_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n")); ++ halbtc8192d2ant_ActionPanA2dp(pBtCoexist); ++ break; ++ default: ++ break; ++ } ++ } ++} ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192d2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192d2Ant.h +new file mode 100644 +index 0000000..f3862b3 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192d2Ant.h +@@ -0,0 +1,170 @@ ++//=========================================== ++// The following is for 8192D 2Ant BT Co-exist definition ++//=========================================== ++#define BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT 6 ++ ++typedef enum _BT_INFO_SRC_8192D_2ANT{ ++ BT_INFO_SRC_8192D_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8192D_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8192D_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8192D_2ANT_MAX ++}BT_INFO_SRC_8192D_2ANT,*PBT_INFO_SRC_8192D_2ANT; ++ ++typedef enum _BT_8192D_2ANT_BT_STATUS{ ++ BT_8192D_2ANT_BT_STATUS_IDLE = 0x0, ++ BT_8192D_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8192D_2ANT_BT_STATUS_NON_IDLE = 0x2, ++ BT_8192D_2ANT_BT_STATUS_MAX ++}BT_8192D_2ANT_BT_STATUS,*PBT_8192D_2ANT_BT_STATUS; ++ ++typedef enum _BT_8192D_2ANT_COEX_ALGO{ ++ BT_8192D_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8192D_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8192D_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8192D_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8192D_2ANT_COEX_ALGO_PAN = 0x4, ++ BT_8192D_2ANT_COEX_ALGO_HID_A2DP = 0x5, ++ BT_8192D_2ANT_COEX_ALGO_HID_PAN = 0x6, ++ BT_8192D_2ANT_COEX_ALGO_PAN_A2DP = 0x7, ++ BT_8192D_2ANT_COEX_ALGO_MAX ++}BT_8192D_2ANT_COEX_ALGO,*PBT_8192D_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8192D_2ANT{ ++ // fw mechanism ++ BOOLEAN bPreBalanceOn; ++ BOOLEAN bCurBalanceOn; ++ ++ // diminishWifi ++ BOOLEAN bPreDacOn; ++ BOOLEAN bCurDacOn; ++ BOOLEAN bPreInterruptOn; ++ BOOLEAN bCurInterruptOn; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bPreNavOn; ++ BOOLEAN bCurNavOn; ++ ++ ++ ++ ++ ++ //BOOLEAN bPreDecBtPwr; ++ //BOOLEAN bCurDecBtPwr; ++ ++ //u1Byte preFwDacSwingLvl; ++ //u1Byte curFwDacSwingLvl; ++ //BOOLEAN bCurIgnoreWlanAct; ++ //BOOLEAN bPreIgnoreWlanAct; ++ //u1Byte prePsTdma; ++ //u1Byte curPsTdma; ++ //u1Byte psTdmaPara[5]; ++ //u1Byte psTdmaDuAdjType; ++ //BOOLEAN bResetTdmaAdjust; ++ //BOOLEAN bPrePsTdmaOn; ++ //BOOLEAN bCurPsTdmaOn; ++ //BOOLEAN bPreBtAutoReport; ++ //BOOLEAN bCurBtAutoReport; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ //u4Byte preVal0x6c0; ++ //u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u4Byte preVal0x6cc; ++ u4Byte curVal0x6cc; ++ //BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ //u1Byte btStatus; ++ //u1Byte wifiChnlInfo[3]; ++} COEX_DM_8192D_2ANT, *PCOEX_DM_8192D_2ANT; ++ ++typedef struct _COEX_STA_8192D_2ANT{ ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bBtBusy; ++ BOOLEAN bBtUplink; ++ BOOLEAN bBtDownLink; ++ BOOLEAN bA2dpBusy; ++}COEX_STA_8192D_2ANT, *PCOEX_STA_8192D_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8192d2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192d2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8192d2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192d2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8192d2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192d2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8192d2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8192d2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e1Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e1Ant.c +new file mode 100644 +index 0000000..8a4d977 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e1Ant.c +@@ -0,0 +1,3417 @@ ++/* ************************************************************ ++ * Description: ++ * ++ * This file is for RTL8192E Co-exist mechanism ++ * ++ * History ++ * 2012/11/15 Cosa first check in. ++ * ++ * ************************************************************ */ ++ ++/* ************************************************************ ++ * include files ++ * ************************************************************ */ ++#include "Mp_Precomp.h" ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8192E_SUPPORT == 1) ++/* ************************************************************ ++ * Global variables, these are static variables ++ * ************************************************************ */ ++static u8 *trace_buf = &gl_btc_trace_buf[0]; ++static struct coex_dm_8192e_1ant glcoex_dm_8192e_1ant; ++static struct coex_dm_8192e_1ant *coex_dm = &glcoex_dm_8192e_1ant; ++static struct coex_sta_8192e_1ant glcoex_sta_8192e_1ant; ++static struct coex_sta_8192e_1ant *coex_sta = &glcoex_sta_8192e_1ant; ++ ++const char *const glbt_info_src_8192e_1ant[] = { ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u32 glcoex_ver_date_8192e_1ant = 20140527; ++u32 glcoex_ver_8192e_1ant = 0x4f; ++ ++/* ************************************************************ ++ * local function proto type if needed ++ * ************************************************************ ++ * ************************************************************ ++ * local function start with halbtc8192e1ant_ ++ * ************************************************************ */ ++u8 halbtc8192e1ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1) ++{ ++ s32 bt_rssi = 0; ++ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; ++ ++ bt_rssi = coex_sta->bt_rssi; ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Rssi thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_bt_rssi_state; ++ } ++ ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (bt_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (bt_rssi < rssi_thresh1) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_bt_rssi_state = bt_rssi_state; ++ ++ return bt_rssi_state; ++} ++ ++u8 halbtc8192e1ant_wifi_rssi_state(IN struct btc_coexist *btcoexist, ++ IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1) ++{ ++ s32 wifi_rssi = 0; ++ u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi RSSI thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_wifi_rssi_state[index]; ++ } ++ ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (wifi_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (wifi_rssi < rssi_thresh1) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; ++ ++ return wifi_rssi_state; ++} ++ ++void halbtc8192e1ant_update_ra_mask(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 dis_rate_mask) ++{ ++ coex_dm->cur_ra_mask = dis_rate_mask; ++ ++ if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, ++ &coex_dm->cur_ra_mask); ++ coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; ++} ++ ++void halbtc8192e1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ boolean wifi_under_b_mode = false; ++ ++ coex_dm->cur_arfr_type = type; ++ ++ if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { ++ switch (coex_dm->cur_arfr_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_4byte(btcoexist, 0x430, ++ coex_dm->backup_arfr_cnt1); ++ btcoexist->btc_write_4byte(btcoexist, 0x434, ++ coex_dm->backup_arfr_cnt2); ++ break; ++ case 1: ++ btcoexist->btc_get(btcoexist, ++ BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x01010101); ++ } else { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; ++} ++ ++void halbtc8192e1ant_retry_limit(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_retry_limit_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_retry_limit_type != ++ coex_dm->cur_retry_limit_type)) { ++ switch (coex_dm->cur_retry_limit_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ coex_dm->backup_retry_limit); ++ break; ++ case 1: /* retry limit=8 */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; ++} ++ ++void halbtc8192e1ant_ampdu_max_time(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_ampdu_time_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) { ++ switch (coex_dm->cur_ampdu_time_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ coex_dm->backup_ampdu_max_time); ++ break; ++ case 1: /* AMPDU timw = 0x38 * 32us */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; ++} ++ ++void halbtc8192e1ant_limited_tx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type, ++ IN u8 retry_limit_type, IN u8 ampdu_time_type) ++{ ++ switch (ra_mask_type) { ++ case 0: /* normal mode */ ++ halbtc8192e1ant_update_ra_mask(btcoexist, force_exec, ++ 0x0); ++ break; ++ case 1: /* disable cck 1/2 */ ++ halbtc8192e1ant_update_ra_mask(btcoexist, force_exec, ++ 0x00000003); ++ break; ++ case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ ++ halbtc8192e1ant_update_ra_mask(btcoexist, force_exec, ++ 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8192e1ant_auto_rate_fallback_retry(btcoexist, force_exec, ++ arfr_type); ++ halbtc8192e1ant_retry_limit(btcoexist, force_exec, retry_limit_type); ++ halbtc8192e1ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type); ++} ++ ++void halbtc8192e1ant_limited_rx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rej_ap_agg_pkt, ++ IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size) ++{ ++ boolean reject_rx_agg = rej_ap_agg_pkt; ++ boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; ++ u8 rx_agg_size = agg_buf_size; ++ ++ /* ============================================ */ ++ /* Rx Aggregation related setting */ ++ /* ============================================ */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ &reject_rx_agg); ++ /* decide BT control aggregation buf size or not */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ &bt_ctrl_rx_agg_size); ++ /* aggregation buf size, only work when BT control Rx aggregation size. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); ++ /* real update aggregation setting */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++void halbtc8192e1ant_query_bt_info(IN struct btc_coexist *btcoexist) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ coex_sta->c2h_bt_info_req_sent = true; ++ ++ h2c_parameter[0] |= BIT(0); /* trigger */ ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); ++} ++ ++void halbtc8192e1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist) ++{ ++ u32 reg_hp_txrx, reg_lp_txrx, u32tmp; ++ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; ++ static u8 num_of_bt_counter_chk = 0; ++ ++ /* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */ ++ /* if (! (btcoexist->btc_read_1byte(btcoexist, 0x76e) & 0x8) ) */ ++ ++ if (coex_sta->under_ips) { ++ coex_sta->high_priority_tx = 65535; ++ coex_sta->high_priority_rx = 65535; ++ coex_sta->low_priority_tx = 65535; ++ coex_sta->low_priority_rx = 65535; ++ return; ++ } ++ ++ reg_hp_txrx = 0x770; ++ reg_lp_txrx = 0x774; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); ++ reg_hp_tx = u32tmp & MASKLWORD; ++ reg_hp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); ++ reg_lp_tx = u32tmp & MASKLWORD; ++ reg_lp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ coex_sta->high_priority_tx = reg_hp_tx; ++ coex_sta->high_priority_rx = reg_hp_rx; ++ coex_sta->low_priority_tx = reg_lp_tx; ++ coex_sta->low_priority_rx = reg_lp_rx; ++ ++ if ((coex_sta->low_priority_tx >= 1050) && ++ (!coex_sta->c2h_bt_inquiry_page)) ++ coex_sta->pop_event_cnt++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", ++ reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx); ++ BTC_TRACE(trace_buf); ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); ++ ++ if ((reg_hp_tx == 0) && (reg_hp_rx == 0) && (reg_lp_tx == 0) && ++ (reg_lp_rx == 0)) { ++ num_of_bt_counter_chk++; ++ if (num_of_bt_counter_chk >= 3) { ++ halbtc8192e1ant_query_bt_info(btcoexist); ++ num_of_bt_counter_chk = 0; ++ } ++ } ++} ++ ++ ++void halbtc8192e1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist) ++{ ++ s32 wifi_rssi = 0; ++ boolean wifi_busy = false, wifi_under_b_mode = false; ++ static u8 cck_lock_counter = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ ++ if (coex_sta->under_ips) { ++ coex_sta->crc_ok_cck = 0; ++ coex_sta->crc_ok_11g = 0; ++ coex_sta->crc_ok_11n = 0; ++ coex_sta->crc_ok_11n_agg = 0; ++ ++ coex_sta->crc_err_cck = 0; ++ coex_sta->crc_err_11g = 0; ++ coex_sta->crc_err_11n = 0; ++ coex_sta->crc_err_11n_agg = 0; ++ } else { ++ coex_sta->crc_ok_cck = btcoexist->btc_read_4byte(btcoexist, ++ 0xf88); ++ coex_sta->crc_ok_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf94); ++ coex_sta->crc_ok_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf90); ++ coex_sta->crc_ok_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xfb8); ++ ++ coex_sta->crc_err_cck = btcoexist->btc_read_4byte(btcoexist, ++ 0xf84); ++ coex_sta->crc_err_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf96); ++ coex_sta->crc_err_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf92); ++ coex_sta->crc_err_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xfba); ++ } ++ ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x1); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x0); ++ ++ if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) { ++ if ((coex_dm->bt_status == BT_8192E_1ANT_BT_STATUS_ACL_BUSY) || ++ (coex_dm->bt_status == ++ BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY) || ++ (coex_dm->bt_status == ++ BT_8192E_1ANT_BT_STATUS_SCO_BUSY)) { ++ if (coex_sta->crc_ok_cck > (coex_sta->crc_ok_11g + ++ coex_sta->crc_ok_11n + ++ coex_sta->crc_ok_11n_agg)) { ++ if (cck_lock_counter < 5) ++ cck_lock_counter++; ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ ++ if (!coex_sta->pre_ccklock) { ++ ++ if (cck_lock_counter >= 5) ++ coex_sta->cck_lock = true; ++ else ++ coex_sta->cck_lock = false; ++ } else { ++ if (cck_lock_counter == 0) ++ coex_sta->cck_lock = false; ++ else ++ coex_sta->cck_lock = true; ++ } ++ ++ coex_sta->pre_ccklock = coex_sta->cck_lock; ++ ++ ++} ++ ++boolean halbtc8192e1ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist) ++{ ++ static boolean pre_wifi_busy = false, pre_under_4way = false, ++ pre_bt_hs_on = false; ++ boolean wifi_busy = false, under_4way = false, bt_hs_on = false; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ ++ if (wifi_connected) { ++ if (wifi_busy != pre_wifi_busy) { ++ pre_wifi_busy = wifi_busy; ++ return true; ++ } ++ if (under_4way != pre_under_4way) { ++ pre_under_4way = under_4way; ++ return true; ++ } ++ if (bt_hs_on != pre_bt_hs_on) { ++ pre_bt_hs_on = bt_hs_on; ++ return true; ++ } ++ } ++ ++ return false; ++} ++ ++void halbtc8192e1ant_update_bt_link_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ bt_link_info->bt_link_exist = coex_sta->bt_link_exist; ++ bt_link_info->sco_exist = coex_sta->sco_exist; ++ bt_link_info->a2dp_exist = coex_sta->a2dp_exist; ++ bt_link_info->pan_exist = coex_sta->pan_exist; ++ bt_link_info->hid_exist = coex_sta->hid_exist; ++ ++ /* work around for HS mode. */ ++ if (bt_hs_on) { ++ bt_link_info->pan_exist = true; ++ bt_link_info->bt_link_exist = true; ++ } ++ ++ /* check if Sco only */ ++ if (bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->sco_only = true; ++ else ++ bt_link_info->sco_only = false; ++ ++ /* check if A2dp only */ ++ if (!bt_link_info->sco_exist && ++ bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->a2dp_only = true; ++ else ++ bt_link_info->a2dp_only = false; ++ ++ /* check if Pan only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->pan_only = true; ++ else ++ bt_link_info->pan_only = false; ++ ++ /* check if Hid only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ bt_link_info->hid_exist) ++ bt_link_info->hid_only = true; ++ else ++ bt_link_info->hid_only = false; ++} ++ ++u8 halbtc8192e1ant_action_algorithm(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ u8 algorithm = BT_8192E_1ANT_COEX_ALGO_UNDEFINED; ++ u8 num_of_diff_profile = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ if (!bt_link_info->bt_link_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], No BT link exists!!!\n"); ++ BTC_TRACE(trace_buf); ++ return algorithm; ++ } ++ ++ if (bt_link_info->sco_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->hid_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->pan_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->a2dp_exist) ++ num_of_diff_profile++; ++ ++ if (num_of_diff_profile == 1) { ++ if (bt_link_info->sco_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; ++ } else { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_A2DP; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = PAN(HS) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = PAN(EDR) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 2) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile >= 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++void halbtc8192e1ant_set_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean enable_auto_report) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = 0; ++ ++ if (enable_auto_report) ++ h2c_parameter[0] |= BIT(0); ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); ++} ++ ++void halbtc8192e1ant_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable_auto_report) ++{ ++ coex_dm->cur_bt_auto_report = enable_auto_report; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) ++ return; ++ } ++ halbtc8192e1ant_set_bt_auto_report(btcoexist, ++ coex_dm->cur_bt_auto_report); ++ ++ coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; ++} ++ ++void halbtc8192e1ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist ++ *btcoexist, IN boolean low_penalty_ra) ++{ ++ u8 h2c_parameter[6] = {0}; ++ ++ h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */ ++ ++ if (low_penalty_ra) { ++ h2c_parameter[1] |= BIT(0); ++ h2c_parameter[2] = ++ 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */ ++ h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */ ++ h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */ ++ h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter); ++} ++ ++void halbtc8192e1ant_low_penalty_ra(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean low_penalty_ra) ++{ ++ coex_dm->cur_low_penalty_ra = low_penalty_ra; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) ++ return; ++ } ++ halbtc8192e1ant_set_sw_penalty_tx_rate_adaptive(btcoexist, ++ coex_dm->cur_low_penalty_ra); ++ ++ coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; ++} ++ ++void halbtc8192e1ant_set_coex_table(IN struct btc_coexist *btcoexist, ++ IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); ++} ++ ++void halbtc8192e1ant_coex_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4, ++ IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ coex_dm->cur_val0x6c0 = val0x6c0; ++ coex_dm->cur_val0x6c4 = val0x6c4; ++ coex_dm->cur_val0x6c8 = val0x6c8; ++ coex_dm->cur_val0x6cc = val0x6cc; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && ++ (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && ++ (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && ++ (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) ++ return; ++ } ++ halbtc8192e1ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, ++ val0x6cc); ++ ++ coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; ++ coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; ++ coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; ++ coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; ++} ++ ++void halbtc8192e1ant_coex_table_with_type(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** CoexTable(%d) **********\n", type); ++ BTC_TRACE(trace_buf); ++ ++ coex_sta->coex_table_type = type; ++ ++ switch (type) { ++ case 0: ++ halbtc8192e1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8192e1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8192e1ant_coex_table(btcoexist, force_exec, ++ 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8192e1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8192e1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8192e1ant_coex_table(btcoexist, force_exec, ++ 0x5a5a5a5a, 0xaa5a5a5a, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8192e1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8192e1ant_coex_table(btcoexist, force_exec, ++ 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8192e1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean enable) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ if (enable) { ++ h2c_parameter[0] |= BIT(0); /* function enable */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); ++} ++ ++void halbtc8192e1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable) ++{ ++ coex_dm->cur_ignore_wlan_act = enable; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_ignore_wlan_act == ++ coex_dm->cur_ignore_wlan_act) ++ return; ++ } ++ halbtc8192e1ant_set_fw_ignore_wlan_act(btcoexist, enable); ++ ++ coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; ++} ++ ++void halbtc8192e1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN u8 lps_val, IN u8 rpwm_val) ++{ ++ u8 lps = lps_val; ++ u8 rpwm = rpwm_val; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps); ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++void halbtc8192e1ant_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ coex_dm->cur_lps = lps_val; ++ coex_dm->cur_rpwm = rpwm_val; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_lps == coex_dm->cur_lps) && ++ (coex_dm->pre_rpwm == coex_dm->cur_rpwm)) ++ return; ++ } ++ halbtc8192e1ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val); ++ ++ coex_dm->pre_lps = coex_dm->cur_lps; ++ coex_dm->pre_rpwm = coex_dm->cur_rpwm; ++} ++ ++void halbtc8192e1ant_sw_mechanism(IN struct btc_coexist *btcoexist, ++ IN boolean low_penalty_ra) ++{ ++ halbtc8192e1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); ++} ++ ++void halbtc8192e1ant_set_ant_path(IN struct btc_coexist *btcoexist, ++ IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off) ++{ ++ u32 u32tmp = 0; ++ ++ if (init_hwcfg) { ++ btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24); ++ btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700); ++ if (btcoexist->chip_interface == BTC_INTF_USB) ++ btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004); ++ else ++ btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004); ++ ++ /* 0x4c[27][24]='00', Set Antenna to BB */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp &= ~BIT(24); ++ u32tmp &= ~BIT(27); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ } else if (wifi_off) { ++ if (btcoexist->chip_interface == BTC_INTF_USB) ++ btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004); ++ else ++ btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004); ++ ++ /* 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1 */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp |= BIT(24); ++ u32tmp |= BIT(27); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ } ++ ++ /* ext switch setting */ ++ switch (ant_pos_type) { ++ case BTC_ANT_PATH_WIFI: ++ btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4); ++ break; ++ case BTC_ANT_PATH_BT: ++ btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4); ++ break; ++ } ++} ++ ++void halbtc8192e1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist, ++ IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5) ++{ ++ u8 h2c_parameter[5] = {0}; ++ u8 real_byte1 = byte1, real_byte5 = byte5; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ if (ap_enable) { ++ if (byte1 & BIT(4) && !(byte1 & BIT(5))) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], FW for 1Ant AP mode\n"); ++ BTC_TRACE(trace_buf); ++ real_byte1 &= ~BIT(4); ++ real_byte1 |= BIT(5); ++ ++ real_byte5 |= BIT(5); ++ real_byte5 &= ~BIT(6); ++ } ++ } ++ ++ h2c_parameter[0] = real_byte1; ++ h2c_parameter[1] = byte2; ++ h2c_parameter[2] = byte3; ++ h2c_parameter[3] = byte4; ++ h2c_parameter[4] = real_byte5; ++ ++ coex_dm->ps_tdma_para[0] = real_byte1; ++ coex_dm->ps_tdma_para[1] = byte2; ++ coex_dm->ps_tdma_para[2] = byte3; ++ coex_dm->ps_tdma_para[3] = byte4; ++ coex_dm->ps_tdma_para[4] = real_byte5; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); ++} ++ ++ ++void halbtc8192e1ant_ps_tdma(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean turn_on, IN u8 type) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_busy = false; ++ u8 rssi_adjust_val = 0; ++ u8 ps_tdma_byte4_val = 0x50, ps_tdma_byte0_val = 0x51, ++ ps_tdma_byte3_val = 0x10; ++ s8 wifi_duration_adjust = 0x0; ++ ++ coex_dm->cur_ps_tdma_on = turn_on; ++ coex_dm->cur_ps_tdma = type; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (coex_dm->cur_ps_tdma_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** TDMA(on, %d) **********\n", ++ coex_dm->cur_ps_tdma); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** TDMA(off, %d) **********\n", ++ coex_dm->cur_ps_tdma); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && ++ (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) ++ return; ++ } ++ ++ if (coex_sta->scan_ap_num <= 5) ++ wifi_duration_adjust = 5; ++ else if (coex_sta->scan_ap_num >= 40) ++ wifi_duration_adjust = -15; ++ else if (coex_sta->scan_ap_num >= 20) ++ wifi_duration_adjust = -10; ++ ++ if (!coex_sta->force_lps_on) { /* only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 */ ++ ps_tdma_byte0_val = 0x61; /* no null-pkt */ ++ ps_tdma_byte3_val = 0x11; /* no tx-pause at BT-slot */ ++ ps_tdma_byte4_val = 0x10; /* 0x778 = d/1 toggle */ ++ } ++ ++ if ((type == 3) || (type == 13) || (type == 14)) ++ ps_tdma_byte4_val = ps_tdma_byte4_val & ++ 0xbf; /* no dynamic slot for multi-profile */ ++ ++ if (bt_link_info->slave_role == true) ++ ps_tdma_byte4_val = ps_tdma_byte4_val | ++ 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */ ++ ++ if (turn_on) { ++ switch (type) { ++ default: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x1a, 0x1a, 0x0, ps_tdma_byte4_val); ++ break; ++ case 1: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3a + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 2: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x2d + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 3: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x1d, 0x1d, 0x0, ps_tdma_byte4_val); ++ break; ++ case 4: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x15, 0x3, 0x14, 0x0); ++ break; ++ case 5: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x15, 0x3, 0x11, 0x11); ++ break; ++ case 6: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x20, 0x3, 0x11, 0x11); ++ break; ++ case 7: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xc, 0x5, 0x0, 0x0); ++ break; ++ case 8: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 9: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 10: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 12: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x0a, 0x0a, 0x0, 0x50); ++ break; ++ case 13: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x12, 0x12, 0x0, ps_tdma_byte4_val); ++ break; ++ case 14: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x21, 0x3, 0x10, ps_tdma_byte4_val); ++ break; ++ case 15: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xa, 0x3, 0x8, 0x0); ++ break; ++ case 16: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x15, 0x3, 0x10, 0x0); ++ break; ++ case 18: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 20: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x3f, 0x03, 0x11, 0x10); ++ break; ++ case 21: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x25, 0x03, 0x11, 0x11); ++ break; ++ case 22: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x25, 0x03, 0x11, 0x10); ++ break; ++ case 23: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x3, 0x31, 0x18); ++ break; ++ case 24: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x15, 0x3, 0x31, 0x18); ++ break; ++ case 25: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 26: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 27: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x3, 0x31, 0x98); ++ break; ++ case 28: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x69, ++ 0x25, 0x3, 0x31, 0x0); ++ break; ++ case 29: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0xab, ++ 0x1a, 0x1a, 0x1, 0x10); ++ break; ++ case 30: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x30, 0x3, 0x10, 0x10); ++ break; ++ case 31: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x1a, 0x1a, 0, 0x58); ++ break; ++ case 32: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x35, 0x3, 0x11, 0x11); ++ break; ++ case 33: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0xa3, ++ 0x25, 0x3, 0x30, 0x90); ++ break; ++ case 34: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x53, ++ 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 35: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x63, ++ 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 36: ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x12, 0x3, 0x14, 0x50); ++ break; ++ case 40: /* SoftAP only with no sta associated,BT disable ,TDMA mode for power saving */ ++ /* here softap mode screen off will cost 70-80mA for phone */ ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x23, ++ 0x18, 0x00, 0x10, 0x24); ++ break; ++ } ++ } else { ++ ++ /* disable PS tdma */ ++ switch (type) { ++ case 8: /* PTA Control */ ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x8, ++ 0x0, 0x0, 0x0, 0x0); ++ halbtc8192e1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_PTA, false, false); ++ break; ++ case 0: ++ default: /* Software control, Antenna at BT side */ ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x0, 0x0); ++ halbtc8192e1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_BT, false, false); ++ break; ++ case 9: /* Software control, Antenna at WiFi side */ ++ halbtc8192e1ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x0, 0x0); ++ halbtc8192e1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_WIFI, false, false); ++ break; ++ } ++ } ++ rssi_adjust_val = 0; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssi_adjust_val); ++ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", ++ btcoexist->btc_read_4byte(btcoexist, 0x948), ++ btcoexist->btc_read_1byte(btcoexist, 0x765), ++ btcoexist->btc_read_1byte(btcoexist, 0x67)); ++ BTC_TRACE(trace_buf); ++ /* update pre state */ ++ coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; ++ coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; ++} ++ ++void halbtc8192e1ant_coex_all_off(IN struct btc_coexist *btcoexist) ++{ ++ /* sw all off */ ++ halbtc8192e1ant_sw_mechanism(btcoexist, false); ++ ++ /* hw all off */ ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++boolean halbtc8192e1ant_is_common_action(IN struct btc_coexist *btcoexist) ++{ ++ boolean common = false, wifi_connected = false, wifi_busy = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (!wifi_connected && ++ BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (wifi_connected && ++ (BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (!wifi_connected && ++ (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (wifi_connected && ++ (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (!wifi_connected && ++ (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE != coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else { ++ if (wifi_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Busy + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ common = false; ++ } ++ ++ return common; ++} ++ ++ ++void halbtc8192e1ant_tdma_duration_adjust_for_acl(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ static s32 up, dn, m, n, wait_count; ++ s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */ ++ u8 retry_count = 0, bt_info_ext; ++ boolean wifi_busy = false; ++ /*static boolean pre_wifi_busy = false;*/ ++ ++ if (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifi_status) ++ wifi_busy = true; ++ else ++ wifi_busy = false; ++ ++ if ((BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == ++ wifi_status) || ++ (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifi_status) || ++ (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT == ++ wifi_status)) { ++ if (coex_dm->cur_ps_tdma != 1 && ++ coex_dm->cur_ps_tdma != 2 && ++ coex_dm->cur_ps_tdma != 3 && ++ coex_dm->cur_ps_tdma != 9) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } ++ return; ++ } ++ ++ if (!coex_dm->auto_tdma_adjust) { ++ coex_dm->auto_tdma_adjust = true; ++ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ /* ============ */ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } else { ++ /* accquire the BT TRx retry count from BT_Info byte2 */ ++ retry_count = coex_sta->bt_retry_cnt; ++ bt_info_ext = coex_sta->bt_info_ext; ++ ++ if ((coex_sta->low_priority_tx) > 1050 || ++ (coex_sta->low_priority_rx) > 1250) ++ retry_count++; ++ ++ result = 0; ++ wait_count++; ++ ++ if (retry_count == ++ 0) { /* no retry in the last 2-second duration */ ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */ ++ wait_count = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ } ++ } else if (retry_count <= ++ 3) { /* <=3 retry in the last 2-second duration */ ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) { /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */ ++ if (wait_count <= 2) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */ ++ if (wait_count == 1) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ ++ if (result == -1) { ++ if ((BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(bt_info_ext)) && ++ ((coex_dm->cur_ps_tdma == 1) || ++ (coex_dm->cur_ps_tdma == 2))) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } ++ } else if (result == 1) { ++ if ((BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(bt_info_ext)) && ++ ((coex_dm->cur_ps_tdma == 1) || ++ (coex_dm->cur_ps_tdma == 2))) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = 1; ++ } ++ } else { /* no change */ ++ /* Bryant Modify ++ if(wifi_busy != pre_wifi_busy) ++ { ++ pre_wifi_busy = wifi_busy; ++ halbtc8192e1ant_ps_tdma(btcoexist, FORCE_EXEC, true, coex_dm->cur_ps_tdma); ++ } ++ */ ++ } ++ ++ if (coex_dm->cur_ps_tdma != 1 && ++ coex_dm->cur_ps_tdma != 2 && ++ coex_dm->cur_ps_tdma != 9 && ++ coex_dm->cur_ps_tdma != 11) { ++ /* recover to previous adjust type */ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ coex_dm->ps_tdma_du_adj_type); ++ } ++ } ++} ++ ++void halbtc8192e1ant_ps_tdma_check_for_power_save_state( ++ IN struct btc_coexist *btcoexist, IN boolean new_ps_state) ++{ ++ u8 lps_mode = 0x0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode); ++ ++ if (lps_mode) { /* already under LPS state */ ++ if (new_ps_state) { ++ /* keep state under LPS, do nothing. */ ++ } else { ++ /* will leave LPS state, turn off psTdma first */ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ } ++ } else { /* NO PS state */ ++ if (new_ps_state) { ++ /* will enter LPS state, turn off psTdma first */ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ } else { ++ /* keep state under NO PS state, do nothing. */ ++ } ++ } ++} ++ ++void halbtc8192e1ant_power_save_state(IN struct btc_coexist *btcoexist, ++ IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ boolean low_pwr_disable = false; ++ ++ switch (ps_type) { ++ case BTC_PS_WIFI_NATIVE: ++ /* recover to original 32k low power setting */ ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ coex_sta->force_lps_on = false; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8192e1ant_ps_tdma_check_for_power_save_state( ++ btcoexist, true); ++ halbtc8192e1ant_lps_rpwm(btcoexist, NORMAL_EXEC, ++ lps_val, rpwm_val); ++ /* when coex force to enter LPS, do not enter 32k low power. */ ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ /* power save must executed before psTdma. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, ++ NULL); ++ coex_sta->force_lps_on = true; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8192e1ant_ps_tdma_check_for_power_save_state( ++ btcoexist, false); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ coex_sta->force_lps_on = false; ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8192e1ant_action_wifi_only(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 9); ++} ++ ++void halbtc8192e1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist) ++{ ++ static u32 bt_disable_cnt = 0; ++ boolean bt_active = true, bt_disabled = false; ++ ++ /* This function check if bt is disabled */ ++ ++ if (coex_sta->high_priority_tx == 0 && ++ coex_sta->high_priority_rx == 0 && ++ coex_sta->low_priority_tx == 0 && ++ coex_sta->low_priority_rx == 0) ++ bt_active = false; ++ if (coex_sta->high_priority_tx == 0xffff && ++ coex_sta->high_priority_rx == 0xffff && ++ coex_sta->low_priority_tx == 0xffff && ++ coex_sta->low_priority_rx == 0xffff) ++ bt_active = false; ++ if (bt_active) { ++ bt_disable_cnt = 0; ++ bt_disabled = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is enabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ bt_disable_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], bt all counters=0, %d times!!\n", ++ bt_disable_cnt); ++ BTC_TRACE(trace_buf); ++ if (bt_disable_cnt >= 2) { ++ bt_disabled = true; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is disabled !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e1ant_action_wifi_only(btcoexist); ++ } ++ } ++ if (coex_sta->bt_disabled != bt_disabled) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is from %s to %s!!\n", ++ (coex_sta->bt_disabled ? "disabled" : "enabled"), ++ (bt_disabled ? "disabled" : "enabled")); ++ BTC_TRACE(trace_buf); ++ coex_sta->bt_disabled = bt_disabled; ++ if (!bt_disabled) { ++ } else { ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ } ++ } ++} ++ ++/* ********************************************* ++ * ++ * Software Coex Mechanism start ++ * ++ * ********************************************* */ ++ ++/* SCO only or SCO+PAN(HS) */ ++ ++/* ++void halbtc8192e1ant_action_sco(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8192e1ant_sw_mechanism(btcoexist, true); ++} ++ ++ ++void halbtc8192e1ant_action_hid(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8192e1ant_sw_mechanism(btcoexist, true); ++} ++ ++ ++void halbtc8192e1ant_action_a2dp(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8192e1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8192e1ant_action_a2dp_pan_hs(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8192e1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8192e1ant_action_pan_edr(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8192e1ant_sw_mechanism(btcoexist, false); ++} ++ ++ ++void halbtc8192e1ant_action_pan_hs(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8192e1ant_sw_mechanism(btcoexist, false); ++} ++ ++ ++void halbtc8192e1ant_action_pan_edr_a2dp(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8192e1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8192e1ant_action_pan_edr_hid(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8192e1ant_sw_mechanism(btcoexist, true); ++} ++ ++ ++void halbtc8192e1ant_action_hid_a2dp_pan_edr(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8192e1ant_sw_mechanism(btcoexist, true); ++} ++ ++void halbtc8192e1ant_action_hid_a2dp(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8192e1ant_sw_mechanism(btcoexist, true); ++} ++ ++*/ ++ ++/* ********************************************* ++ * ++ * Non-Software Coex Mechanism start ++ * ++ * ********************************************* */ ++void halbtc8192e1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++} ++ ++void halbtc8192e1ant_action_hs(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++} ++ ++void halbtc8192e1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false, ap_enable = false, wifi_busy = false, ++ bt_busy = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ if ((!wifi_connected) && (!coex_sta->wifi_is_high_pri_task)) { ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ } else if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ /* SCO/HID/A2DP busy */ ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else if ((bt_link_info->pan_exist) || (wifi_busy)) { ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ } ++} ++ ++void halbtc8192e1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ /* tdma and coex table */ ++ ++ if (bt_link_info->sco_exist) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ } else { /* HID */ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ } ++} ++ ++void halbtc8192e1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ u8 bt_rssi_state; ++ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ bt_rssi_state = halbtc8192e1ant_bt_rssi_state(2, 28, 0); ++ ++ if ((coex_sta->low_priority_rx >= 1000) && ++ (coex_sta->low_priority_rx != 65535)) ++ bt_link_info->slave_role = true; ++ else ++ bt_link_info->slave_role = false; ++ ++ if (bt_link_info->hid_only) { /* HID */ ++ halbtc8192e1ant_action_bt_sco_hid_only_busy(btcoexist, ++ wifi_status); ++ coex_dm->auto_tdma_adjust = false; ++ return; ++ } else if (bt_link_info->a2dp_only) { /* A2DP */ ++ if (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ halbtc8192e1ant_tdma_duration_adjust_for_acl(btcoexist, ++ wifi_status); ++#if 0 ++ if (coex_sta->cck_lock) ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 3); ++ else ++#endif ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = true; ++ } ++ } else if (((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) || ++ (bt_link_info->hid_exist && bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { /* HID+A2DP */ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); ++ coex_dm->auto_tdma_adjust = false; ++ ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ } else if ((bt_link_info->pan_only) || (bt_link_info->hid_exist && ++ bt_link_info->pan_exist)) { /* PAN(OPP,FTP), HID+PAN(OPP,FTP) */ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ /* BT no-profile busy (0x9) */ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } ++} ++ ++void halbtc8192e1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist) ++{ ++ /* power save state */ ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ halbtc8192e1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8192e1ant_action_wifi_not_connected_scan(IN struct btc_coexist ++ *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if (BT_8192E_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ if (bt_link_info->a2dp_exist) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else if (bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 22); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 20); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } ++ } else if ((BT_8192E_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8192e1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } else { ++ /* Bryant Add */ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8192e1ant_action_wifi_not_connected_asso_auth( ++ IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else if (bt_link_info->pan_exist) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8192e1ant_action_wifi_connected_scan(IN struct btc_coexist ++ *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if (BT_8192E_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ if (bt_link_info->a2dp_exist) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else if (bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 22); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 20); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } ++ } else if ((BT_8192E_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8192e1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } else { ++ /* Bryant Add */ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8192e1ant_action_wifi_connected_specific_packet( ++ IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else if (bt_link_info->pan_exist) { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8192e1ant_action_wifi_connected(IN struct btc_coexist *btcoexist) ++{ ++ boolean wifi_busy = false; ++ boolean scan = false, link = false, roam = false; ++ boolean under_4way = false, ap_enable = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ if (under_4way) { ++ halbtc8192e1ant_action_wifi_connected_specific_packet(btcoexist); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ if (scan || link || roam) { ++ if (scan) ++ halbtc8192e1ant_action_wifi_connected_scan(btcoexist); ++ else ++ halbtc8192e1ant_action_wifi_connected_specific_packet( ++ btcoexist); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ /* power save state */ ++ if (!ap_enable && ++ BT_8192E_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status && ++ !btcoexist->bt_link_info.hid_only) { ++ if (btcoexist->bt_link_info.a2dp_only) { /* A2DP */ ++ if (!wifi_busy) ++ halbtc8192e1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else { /* busy */ ++ if (coex_sta->scan_ap_num >= ++ BT_8192E_1ANT_WIFI_NOISY_THRESH) /* no force LPS, no PS-TDMA, use pure TDMA */ ++ halbtc8192e1ant_power_save_state( ++ btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ else ++ halbtc8192e1ant_power_save_state( ++ btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ } else if ((coex_sta->pan_exist == false) && ++ (coex_sta->a2dp_exist == false) && ++ (coex_sta->hid_exist == false)) ++ halbtc8192e1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8192e1ant_power_save_state(btcoexist, ++ BTC_PS_LPS_ON, 0x50, 0x4); ++ } else ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ /* tdma and coex table */ ++ if (!wifi_busy) { ++ if (BT_8192E_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ halbtc8192e1ant_action_wifi_connected_bt_acl_busy( ++ btcoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } else if ((BT_8192E_1ANT_BT_STATUS_SCO_BUSY == ++ coex_dm->bt_status) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8192e1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } else { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ ++ if ((coex_sta->high_priority_tx) + ++ (coex_sta->high_priority_rx) <= 60) ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 2); ++ else ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 7); ++ } ++ } else { ++ if (BT_8192E_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ halbtc8192e1ant_action_wifi_connected_bt_acl_busy( ++ btcoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } else if ((BT_8192E_1ANT_BT_STATUS_SCO_BUSY == ++ coex_dm->bt_status) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8192e1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } else { ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ ++ if ((coex_sta->high_priority_tx) + ++ (coex_sta->high_priority_rx) <= 60) ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 2); ++ else ++ halbtc8192e1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 7); ++ } ++ } ++} ++ ++void halbtc8192e1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ u8 algorithm = 0; ++ ++ algorithm = halbtc8192e1ant_action_algorithm(btcoexist); ++ coex_dm->cur_algorithm = algorithm; ++ ++ if (halbtc8192e1ant_is_common_action(btcoexist)) { ++ ++ } else { ++ switch (coex_dm->cur_algorithm) { ++ case BT_8192E_1ANT_COEX_ALGO_SCO: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = SCO.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_action_sco(btcoexist); */ ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_action_hid(btcoexist); */ ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_action_a2dp(btcoexist); */ ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = A2DP+PAN(HS).\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_action_a2dp_pan_hs(btcoexist); */ ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN(EDR).\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_action_pan_edr(btcoexist); */ ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HS mode.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_action_pan_hs(btcoexist); */ ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_action_pan_edr_a2dp(btcoexist); */ ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_PANEDR_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN(EDR)+HID.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_action_pan_edr_hid(btcoexist); */ ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID+A2DP+PAN.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_action_hid_a2dp_pan_edr(btcoexist); */ ++ break; ++ case BT_8192E_1ANT_COEX_ALGO_HID_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_action_hid_a2dp(btcoexist); */ ++ break; ++ default: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = coexist All Off!!\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8192e1ant_coex_all_off(btcoexist); */ ++ break; ++ } ++ coex_dm->pre_algorithm = coex_dm->cur_algorithm; ++ } ++} ++ ++void halbtc8192e1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false, bt_hs_on = false; ++ boolean increase_scan_dev_num = false; ++ boolean bt_ctrl_agg_buf_size = false; ++ boolean miracast_plus_bt = false; ++ u8 agg_buf_size = 5; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->under_ips) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is under IPS !!!\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if ((BT_8192E_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) ++ increase_scan_dev_num = true; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, ++ &increase_scan_dev_num); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ ++ if ((num_of_wifi_link >= 2) || ++ (wifi_link_status & WIFI_P2P_GO_CONNECTED)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n", ++ num_of_wifi_link, wifi_link_status); ++ BTC_TRACE(trace_buf); ++ ++ if (bt_link_info->bt_link_exist) { ++ halbtc8192e1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, ++ 0, 1); ++ miracast_plus_bt = true; ++ } else { ++ halbtc8192e1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, ++ 0, 0); ++ miracast_plus_bt = false; ++ } ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ halbtc8192e1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ ++ if ((bt_link_info->a2dp_exist) && ++ (coex_sta->c2h_bt_inquiry_page)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], BT Is Inquirying\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e1ant_action_bt_inquiry(btcoexist); ++ } else ++ halbtc8192e1ant_action_wifi_multi_port(btcoexist); ++ ++ return; ++ } else { ++ miracast_plus_bt = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ } ++ ++ if ((bt_link_info->bt_link_exist) && (wifi_connected)) { ++ halbtc8192e1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ ++ if (bt_link_info->sco_exist) ++ halbtc8192e1ant_limited_rx(btcoexist, NORMAL_EXEC, ++ false, true, 0x5); ++ else ++ halbtc8192e1ant_limited_rx(btcoexist, NORMAL_EXEC, ++ false, true, 0x8); ++ ++ halbtc8192e1ant_sw_mechanism(btcoexist, true); ++ halbtc8192e1ant_run_sw_coexist_mechanism( ++ btcoexist); /* just print debug message */ ++ } else { ++ halbtc8192e1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ halbtc8192e1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x5); ++ ++ halbtc8192e1ant_sw_mechanism(btcoexist, false); ++ halbtc8192e1ant_run_sw_coexist_mechanism( ++ btcoexist); /* just print debug message */ ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], BT Is Inquirying\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8192e1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ ++ if (!wifi_connected) { ++ boolean scan = false, link = false, roam = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is non connected-idle !!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (scan || link || roam) { ++ if (scan) ++ halbtc8192e1ant_action_wifi_not_connected_scan( ++ btcoexist); ++ else ++ halbtc8192e1ant_action_wifi_not_connected_asso_auth( ++ btcoexist); ++ } else ++ halbtc8192e1ant_action_wifi_not_connected(btcoexist); ++ } else /* wifi LPS/Busy */ ++ halbtc8192e1ant_action_wifi_connected(btcoexist); ++} ++ ++void halbtc8192e1ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ /* force to reset coex mechanism */ ++ ++ /* sw all off */ ++ halbtc8192e1ant_sw_mechanism(btcoexist, false); ++ ++ /* halbtc8192e1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); */ ++ halbtc8192e1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ ++ coex_sta->pop_event_cnt = 0; ++} ++ ++void halbtc8192e1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only) ++{ ++ u16 u16tmp = 0; ++ u8 u8tmp = 0; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 1Ant Init HW Config!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* antenna sw ctrl to bt */ ++ halbtc8192e1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, true, false); ++ ++ halbtc8192e1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ ++ /* antenna switch control parameter */ ++ btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555); ++ ++ /* coex parameters */ ++ btcoexist->btc_write_1byte(btcoexist, 0x778, 0x1); ++ /* 0x790[5:0]=0x5 */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); ++ u8tmp &= 0xc0; ++ u8tmp |= 0x5; ++ btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp); ++ ++ /* enable counter statistics */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); ++ ++ /* enable PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20); ++ /* enable mailbox interface */ ++ u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40); ++ u16tmp |= BIT(9); ++ btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp); ++ ++ /* enable PTA I2C mailbox */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101); ++ u8tmp |= BIT(4); ++ btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp); ++ ++ /* enable bt clock when wifi is disabled. */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93); ++ u8tmp |= BIT(0); ++ btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp); ++ /* enable bt clock when suspend. */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7); ++ u8tmp |= BIT(0); ++ btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp); ++} ++ ++ ++/* ++void halbtc8192e1ant_wifi_off_hw_cfg(IN struct btc_coexist* btcoexist) ++{ ++ ++ ++} ++*/ ++ ++/* ************************************************************ ++ * work around function start with wa_halbtc8192e1ant_ ++ * ************************************************************ ++ * ************************************************************ ++ * extern function start with ex_halbtc8192e1ant_ ++ * ************************************************************ */ ++void ex_halbtc8192e1ant_power_on_setting(IN struct btc_coexist *btcoexist) ++{ ++#if 0 ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ u8 u8tmp = 0x0; ++ u16 u16tmp = 0x0; ++ ++ btcoexist->stop_coex_dm = true; ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x67, 0x20); ++ ++ /* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */ ++ u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2); ++ btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1)); ++ ++ /* set GRAN_BT = 1 */ ++ btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18); ++ /* set WLAN_ACT = 0 */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); ++ ++ /* */ ++ /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */ ++ /* Local setting bit define */ ++ /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */ ++ /* BIT1: "0" for internal switch; "1" for external switch */ ++ /* BIT2: "0" for one antenna; "1" for two antenna */ ++ /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */ ++ if (btcoexist->chip_interface == BTC_INTF_USB) { ++ /* fixed at S0 for USB interface */ ++ btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0); ++ ++ u8tmp |= 0x1; /* antenna inverse */ ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp); ++ ++ board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT; ++ } else { ++ /* for PCIE and SDIO interface, we check efuse 0xc3[6] */ ++ if (board_info->single_ant_path == 0) { ++ /* set to S1 */ ++ btcoexist->btc_write_4byte(btcoexist, 0x948, 0x280); ++ board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; ++ } else if (board_info->single_ant_path == 1) { ++ /* set to S0 */ ++ btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0); ++ u8tmp |= 0x1; /* antenna inverse */ ++ board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ ++ if (btcoexist->chip_interface == BTC_INTF_PCI) ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0x384, ++ u8tmp); ++ else if (btcoexist->chip_interface == BTC_INTF_SDIO) ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60, ++ u8tmp); ++ } ++#endif ++} ++ ++void ex_halbtc8192e1ant_pre_load_firmware(IN struct btc_coexist *btcoexist) ++{ ++} ++ ++void ex_halbtc8192e1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only) ++{ ++ halbtc8192e1ant_init_hw_config(btcoexist, wifi_only); ++ btcoexist->stop_coex_dm = false; ++} ++ ++void ex_halbtc8192e1ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Coex Mechanism Init!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->stop_coex_dm = false; ++ ++ halbtc8192e1ant_init_coex_dm(btcoexist); ++ ++ halbtc8192e1ant_query_bt_info(btcoexist); ++} ++ ++void ex_halbtc8192e1ant_display_coex_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ u8 *cli_buf = btcoexist->cli_buf; ++ u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; ++ u32 u32tmp[4]; ++ u32 fw_ver = 0, bt_patch_ver = 0; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cli_buf); ++ ++ if (btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ if (btcoexist->stop_coex_dm) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Coex is STOPPED]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "Ant PG number/ Ant mechanism:", ++ board_info->pg_ant_num, board_info->btdm_ant_num); ++ CL_PRINTF(cli_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", ++ "CoexVer/ FwVer/ PatchVer", ++ glcoex_ver_date_8192e_1ant, glcoex_ver_8192e_1ant, fw_ver, ++ bt_patch_ver, bt_patch_ver); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", ++ "Wifi channel informed to BT", ++ coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1], ++ coex_dm->wifi_chnl_info[2]); ++ CL_PRINTF(cli_buf); ++ ++ /* wifi status */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Wifi Status]============"); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[BT Status]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", ++ "BT [status/ rssi/ retryCnt]", ++ ((coex_sta->bt_disabled) ? ("disabled") : (( ++ coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") ++ : ((BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) ? "non-connected idle" : ++ ((BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status) ++ ? "connected-idle" : "busy")))), ++ coex_sta->bt_rssi, coex_sta->bt_retry_cnt); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", ++ "SCO/HID/PAN/A2DP", ++ bt_link_info->sco_exist, bt_link_info->hid_exist, ++ bt_link_info->pan_exist, bt_link_info->a2dp_exist); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Info A2DP rate", ++ (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate"); ++ CL_PRINTF(cli_buf); ++ ++ for (i = 0; i < BT_INFO_SRC_8192E_1ANT_MAX; i++) { ++ if (coex_sta->bt_info_c2h_cnt[i]) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", ++ glbt_info_src_8192e_1ant[i], ++ coex_sta->bt_info_c2h[i][0], ++ coex_sta->bt_info_c2h[i][1], ++ coex_sta->bt_info_c2h[i][2], ++ coex_sta->bt_info_c2h[i][3], ++ coex_sta->bt_info_c2h[i][4], ++ coex_sta->bt_info_c2h[i][5], ++ coex_sta->bt_info_c2h[i][6], ++ coex_sta->bt_info_c2h_cnt[i]); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ if (!btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[mechanisms]============"); ++ CL_PRINTF(cli_buf); ++ ++ ps_tdma_case = coex_dm->cur_ps_tdma; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", ++ "PS TDMA", ++ coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1], ++ coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3], ++ coex_dm->ps_tdma_para[4], ps_tdma_case, ++ coex_dm->auto_tdma_adjust); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", ++ "Latest error condition(should be 0)", ++ coex_dm->error_condition); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", ++ "IgnWlanAct", ++ coex_dm->cur_ignore_wlan_act); ++ CL_PRINTF(cli_buf); ++ } ++ ++ /* Hw setting */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Hw setting]============"); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0xc04/ 0xd04/ 0x90c", ++ u32tmp[0], u32tmp[1], u32tmp[2]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778", ++ u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x92c/ 0x930", ++ (u8tmp[0]), u32tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x40/ 0x4f", ++ u8tmp[0], u8tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x550(bcn ctrl)/0x522", ++ u32tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", ++ u32tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", ++ "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", ++ u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x770(hp rx[31:16]/tx[15:0])", ++ coex_sta->high_priority_rx, coex_sta->high_priority_tx); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x774(lp rx[31:16]/tx[15:0])", ++ coex_sta->low_priority_rx, coex_sta->low_priority_tx); ++ CL_PRINTF(cli_buf); ++#if (BT_AUTO_REPORT_ONLY_8192E_1ANT == 1) ++ halbtc8192e1ant_monitor_bt_ctr(btcoexist); ++#endif ++ ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++void ex_halbtc8192e1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (btcoexist->manual_control || btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_IPS_ENTER == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS ENTER notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = true; ++ ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ halbtc8192e1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, ++ true); ++ } else if (BTC_IPS_LEAVE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS LEAVE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = false; ++ ++ halbtc8192e1ant_init_hw_config(btcoexist, false); ++ halbtc8192e1ant_init_coex_dm(btcoexist); ++ halbtc8192e1ant_query_bt_info(btcoexist); ++ } ++} ++ ++void ex_halbtc8192e1ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (btcoexist->manual_control || btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_LPS_ENABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS ENABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = true; ++ } else if (BTC_LPS_DISABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS DISABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = false; ++ } ++} ++ ++void ex_halbtc8192e1ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean wifi_connected = false, bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ ++ u8 u8tmpa, u8tmpb; ++ u32 u32tmp; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_SCAN_START == type) { ++ coex_sta->wifi_is_high_pri_task = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN START notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8192e1ant_ps_tdma(btcoexist, FORCE_EXEC, false, ++ 8); /* Force antenna setup for no scan result issue */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765); ++ u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x67); ++ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", ++ u32tmp, u8tmpa, u8tmpb); ++ BTC_TRACE(trace_buf); ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, ++ &coex_sta->scan_ap_num); ++ } ++ ++ if (coex_sta->bt_disabled) ++ return; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ halbtc8192e1ant_query_bt_info(btcoexist); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8192e1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8192e1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8192e1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8192e1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8192e1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_SCAN_START == type) { ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8192e1ant_action_wifi_not_connected_scan( ++ btcoexist); ++ else /* wifi is connected */ ++ halbtc8192e1ant_action_wifi_connected_scan(btcoexist); ++ } else if (BTC_SCAN_FINISH == type) { ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8192e1ant_action_wifi_not_connected(btcoexist); ++ else ++ halbtc8192e1ant_action_wifi_connected(btcoexist); ++ } ++} ++ ++void ex_halbtc8192e1ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean wifi_connected = false, bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_ASSOCIATE_START == type) { ++ coex_sta->wifi_is_high_pri_task = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT START notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->arp_cnt = 0; ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ /* coex_dm->arp_cnt = 0; */ ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8192e1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8192e1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8192e1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8192e1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8192e1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_ASSOCIATE_START == type) ++ halbtc8192e1ant_action_wifi_not_connected_asso_auth(btcoexist); ++ else if (BTC_ASSOCIATE_FINISH == type) { ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8192e1ant_action_wifi_not_connected(btcoexist); ++ else ++ halbtc8192e1ant_action_wifi_connected(btcoexist); ++ } ++} ++ ++void ex_halbtc8192e1ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u8 h2c_parameter[3] = {0}; ++ u32 wifi_bw; ++ u8 wifi_central_chnl; ++ boolean wifi_under_b_mode = false; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_MEDIA_CONNECT == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA connect notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ ++ /* Set CCK Tx/Rx high Pri except 11b mode */ ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, ++ 0x00); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, ++ 0x00); /* CCK Rx */ ++ } else { ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, ++ 0x10); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, ++ 0x10); /* CCK Rx */ ++ } ++ ++ coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, ++ 0x430); ++ coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, ++ 0x434); ++ coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( ++ btcoexist, 0x42a); ++ coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte( ++ btcoexist, 0x456); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA disconnect notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->arp_cnt = 0; ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x0); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */ ++ } ++ ++ /* only 2.4G we need to inform bt the chnl mask */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ &wifi_central_chnl); ++ if ((BTC_MEDIA_CONNECT == type) && ++ (wifi_central_chnl <= 14)) { ++ /* h2c_parameter[0] = 0x1; */ ++ h2c_parameter[0] = 0x0; ++ h2c_parameter[1] = wifi_central_chnl; ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ h2c_parameter[2] = 0x30; ++ else ++ h2c_parameter[2] = 0x20; ++ } ++ ++ coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; ++ coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; ++ coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); ++} ++ ++void ex_halbtc8192e1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type) { ++ if (BTC_PACKET_ARP == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet ARP notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ coex_dm->arp_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ARP Packet Count = %d\n", ++ coex_dm->arp_cnt); ++ BTC_TRACE(trace_buf); ++ ++ if (coex_dm->arp_cnt >= ++ 10) /* if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecificPacket(btcoexist) */ ++ coex_sta->wifi_is_high_pri_task = false; ++ else ++ coex_sta->wifi_is_high_pri_task = true; ++ } else { ++ coex_sta->wifi_is_high_pri_task = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet DHCP or EAPOL notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet [Type = %d] notify\n", type); ++ BTC_TRACE(trace_buf); ++ } ++ ++ coex_sta->specific_pkt_period_cnt = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8192e1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8192e1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8192e1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8192e1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8192e1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ ((BTC_PACKET_ARP == type) && (coex_sta->wifi_is_high_pri_task))) ++ halbtc8192e1ant_action_wifi_connected_specific_packet(btcoexist); ++} ++ ++void ex_halbtc8192e1ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length) ++{ ++ u8 bt_info = 0; ++ u8 i, rsp_source = 0; ++ boolean wifi_connected = false; ++ boolean bt_busy = false; ++ ++ coex_sta->c2h_bt_info_req_sent = false; ++ ++ rsp_source = tmp_buf[0] & 0xf; ++ if (rsp_source >= BT_INFO_SRC_8192E_1ANT_MAX) ++ rsp_source = BT_INFO_SRC_8192E_1ANT_WIFI_FW; ++ coex_sta->bt_info_c2h_cnt[rsp_source]++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source, ++ length); ++ BTC_TRACE(trace_buf); ++ for (i = 0; i < length; i++) { ++ coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; ++ if (i == 1) ++ bt_info = tmp_buf[i]; ++ if (i == length - 1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ ++ if (BT_INFO_SRC_8192E_1ANT_WIFI_FW != rsp_source) { ++ coex_sta->bt_retry_cnt = /* [3:0] */ ++ coex_sta->bt_info_c2h[rsp_source][2] & 0xf; ++ ++ if (coex_sta->bt_retry_cnt >= 1) ++ coex_sta->pop_event_cnt++; ++ ++ if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ++ coex_sta->c2h_bt_page = true; ++ else ++ coex_sta->c2h_bt_page = false; ++ ++ coex_sta->bt_rssi = ++ coex_sta->bt_info_c2h[rsp_source][3] * 2 - 90; ++ /* coex_sta->bt_info_c2h[rsp_source][3]*2+10; */ ++ ++ coex_sta->bt_info_ext = ++ coex_sta->bt_info_c2h[rsp_source][4]; ++ ++ coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2] ++ & 0x40); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK, ++ &coex_sta->bt_tx_rx_mask); ++ if (!coex_sta->bt_tx_rx_mask) { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, ++ 0x3c, 0x15); ++ } ++ ++ /* Here we need to resend some wifi info to BT */ ++ /* because bt is reset and loss of the info. */ ++ if (coex_sta->bt_info_ext & BIT(1)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (wifi_connected) ++ ex_halbtc8192e1ant_media_status_notify( ++ btcoexist, BTC_MEDIA_CONNECT); ++ else ++ ex_halbtc8192e1ant_media_status_notify( ++ btcoexist, BTC_MEDIA_DISCONNECT); ++ } ++ ++ if (coex_sta->bt_info_ext & BIT(3)) { ++ if (!btcoexist->manual_control && ++ !btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e1ant_ignore_wlan_act(btcoexist, ++ FORCE_EXEC, false); ++ } ++ } else { ++ /* BT already NOT ignore Wlan active, do nothing here. */ ++ } ++#if (BT_AUTO_REPORT_ONLY_8192E_1ANT == 0) ++ if ((coex_sta->bt_info_ext & BIT(4))) { ++ /* BT auto report already enabled, do nothing */ ++ } else ++ halbtc8192e1ant_bt_auto_report(btcoexist, FORCE_EXEC, ++ true); ++#endif ++ } ++ ++ /* check BIT2 first ==> check if bt is under inquiry or page scan */ ++ if (bt_info & BT_INFO_8192E_1ANT_B_INQ_PAGE) ++ coex_sta->c2h_bt_inquiry_page = true; ++ else ++ coex_sta->c2h_bt_inquiry_page = false; ++ ++ /* set link exist status */ ++ if (!(bt_info & BT_INFO_8192E_1ANT_B_CONNECTION)) { ++ coex_sta->bt_link_exist = false; ++ coex_sta->pan_exist = false; ++ coex_sta->a2dp_exist = false; ++ coex_sta->hid_exist = false; ++ coex_sta->sco_exist = false; ++ } else { /* connection exists */ ++ coex_sta->bt_link_exist = true; ++ if (bt_info & BT_INFO_8192E_1ANT_B_FTP) ++ coex_sta->pan_exist = true; ++ else ++ coex_sta->pan_exist = false; ++ if (bt_info & BT_INFO_8192E_1ANT_B_A2DP) ++ coex_sta->a2dp_exist = true; ++ else ++ coex_sta->a2dp_exist = false; ++ if (bt_info & BT_INFO_8192E_1ANT_B_HID) ++ coex_sta->hid_exist = true; ++ else ++ coex_sta->hid_exist = false; ++ if (bt_info & BT_INFO_8192E_1ANT_B_SCO_ESCO) ++ coex_sta->sco_exist = true; ++ else ++ coex_sta->sco_exist = false; ++ } ++ ++ halbtc8192e1ant_update_bt_link_info(btcoexist); ++ ++ bt_info = bt_info & ++ 0x1f; /* mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) */ ++ ++ if (!(bt_info & BT_INFO_8192E_1ANT_B_CONNECTION)) { ++ coex_dm->bt_status = BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info == ++ BT_INFO_8192E_1ANT_B_CONNECTION) { /* connection exists but no busy */ ++ coex_dm->bt_status = BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if ((bt_info & BT_INFO_8192E_1ANT_B_SCO_ESCO) || ++ (bt_info & BT_INFO_8192E_1ANT_B_SCO_BUSY)) { ++ coex_dm->bt_status = BT_8192E_1ANT_BT_STATUS_SCO_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info & BT_INFO_8192E_1ANT_B_ACL_BUSY) { ++ if (BT_8192E_1ANT_BT_STATUS_ACL_BUSY != coex_dm->bt_status) ++ coex_dm->auto_tdma_adjust = false; ++ coex_dm->bt_status = BT_8192E_1ANT_BT_STATUS_ACL_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ coex_dm->bt_status = BT_8192E_1ANT_BT_STATUS_MAX; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if ((BT_8192E_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) ++ bt_busy = true; ++ else ++ bt_busy = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ halbtc8192e1ant_run_coexist_mechanism(btcoexist); ++} ++ ++void ex_halbtc8192e1ant_rf_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u32 u32tmp; ++ u8 u8tmpa, u8tmpb, u8tmpc; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], RF Status notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_RF_ON == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RF is turned ON!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->stop_coex_dm = false; ++ } else if (BTC_RF_OFF == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RF is turned OFF!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8192e1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); ++ halbtc8192e1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, ++ true); ++ ++ halbtc8192e1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ btcoexist->stop_coex_dm = true; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765); ++ u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x67); ++ u8tmpc = btcoexist->btc_read_1byte(btcoexist, 0x76e); ++ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x, 0x76e=0x%x\n", ++ u32tmp, u8tmpa, u8tmpb, u8tmpc); ++ BTC_TRACE(trace_buf); ++ ++ } ++} ++ ++void ex_halbtc8192e1ant_halt_notify(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8192e1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); ++ halbtc8192e1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true); ++ ++ halbtc8192e1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ++ ex_halbtc8192e1ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); ++ ++ btcoexist->stop_coex_dm = true; ++} ++ ++void ex_halbtc8192e1ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_WIFI_PNP_SLEEP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to SLEEP\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8192e1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ halbtc8192e1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ halbtc8192e1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, ++ true); ++ ++ /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */ ++ /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */ ++ /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */ ++ coex_sta->under_ips = false; ++ coex_sta->under_lps = false; ++ btcoexist->stop_coex_dm = true; ++ } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to WAKE UP\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->stop_coex_dm = false; ++ halbtc8192e1ant_init_hw_config(btcoexist, false); ++ halbtc8192e1ant_init_coex_dm(btcoexist); ++ halbtc8192e1ant_query_bt_info(btcoexist); ++ } ++} ++ ++void ex_halbtc8192e1ant_coex_dm_reset(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], *****************Coex DM Reset*****************\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8192e1ant_init_hw_config(btcoexist, false); ++ /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */ ++ /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x2, 0xfffff, 0x0); */ ++ halbtc8192e1ant_init_coex_dm(btcoexist); ++} ++ ++void ex_halbtc8192e1ant_periodical(IN struct btc_coexist *btcoexist) ++{ ++#if (BT_AUTO_REPORT_ONLY_8192E_1ANT == 0) ++ halbtc8192e1ant_query_bt_info(btcoexist); ++ halbtc8192e1ant_monitor_bt_enable_disable(btcoexist); ++#else ++ halbtc8192e1ant_monitor_bt_ctr(btcoexist); ++ halbtc8192e1ant_monitor_wifi_ctr(btcoexist); ++ ++ if (halbtc8192e1ant_is_wifi_status_changed(btcoexist) || ++ coex_dm->auto_tdma_adjust) ++ ++ halbtc8192e1ant_run_coexist_mechanism(btcoexist); ++ ++ coex_sta->specific_pkt_period_cnt++; ++#endif ++} ++ ++ ++void ex_halbtc8192e1ant_dbg_control(IN struct btc_coexist *btcoexist, ++ IN u8 op_code, IN u8 op_len, IN u8 *pdata) ++{ ++ switch (op_code) { ++ case BTC_DBG_SET_COEX_NORMAL: ++ btcoexist->manual_control = false; ++ halbtc8192e1ant_init_coex_dm(btcoexist); ++ break; ++ case BTC_DBG_SET_COEX_WIFI_ONLY: ++ btcoexist->manual_control = true; ++ halbtc8192e1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8192e1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 9); ++ break; ++ case BTC_DBG_SET_COEX_BT_ONLY: ++ /* todo */ ++ break; ++ default: ++ break; ++ } ++} ++ ++#endif /* #if (RTL8192E_SUPPORT == 1) */ ++ ++#endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */ +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e1Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e1Ant.h +new file mode 100644 +index 0000000..e75127c +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e1Ant.h +@@ -0,0 +1,226 @@ ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8192E_SUPPORT == 1) ++ ++/* ******************************************* ++ * The following is for 8192E 1ANT BT Co-exist definition ++ * ******************************************* */ ++#define BT_AUTO_REPORT_ONLY_8192E_1ANT 1 ++ ++#define BT_INFO_8192E_1ANT_B_FTP BIT(7) ++#define BT_INFO_8192E_1ANT_B_A2DP BIT(6) ++#define BT_INFO_8192E_1ANT_B_HID BIT(5) ++#define BT_INFO_8192E_1ANT_B_SCO_BUSY BIT(4) ++#define BT_INFO_8192E_1ANT_B_ACL_BUSY BIT(3) ++#define BT_INFO_8192E_1ANT_B_INQ_PAGE BIT(2) ++#define BT_INFO_8192E_1ANT_B_SCO_ESCO BIT(1) ++#define BT_INFO_8192E_1ANT_B_CONNECTION BIT(0) ++ ++#define BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT(0))) ? true : false) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT 2 ++ ++#define BT_8192E_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */ ++ ++enum bt_info_src_8192e_1ant { ++ BT_INFO_SRC_8192E_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8192E_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8192E_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8192E_1ANT_MAX ++}; ++ ++enum bt_8192e_1ant_bt_status { ++ BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8192E_1ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8192E_1ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8192E_1ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8192E_1ANT_BT_STATUS_MAX ++}; ++ ++enum bt_8192e_1ant_wifi_status { ++ BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, ++ BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, ++ BT_8192E_1ANT_WIFI_STATUS_MAX ++}; ++ ++enum bt_8192e_1ant_coex_algo { ++ BT_8192E_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8192E_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8192E_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8192E_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8192E_1ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8192E_1ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8192E_1ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8192E_1ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8192E_1ANT_COEX_ALGO_MAX = 0xb, ++}; ++ ++struct coex_dm_8192e_1ant { ++ /* fw mechanism */ ++ boolean cur_ignore_wlan_act; ++ boolean pre_ignore_wlan_act; ++ u8 pre_ps_tdma; ++ u8 cur_ps_tdma; ++ u8 ps_tdma_para[5]; ++ u8 ps_tdma_du_adj_type; ++ boolean auto_tdma_adjust; ++ boolean pre_ps_tdma_on; ++ boolean cur_ps_tdma_on; ++ boolean pre_bt_auto_report; ++ boolean cur_bt_auto_report; ++ u8 pre_lps; ++ u8 cur_lps; ++ u8 pre_rpwm; ++ u8 cur_rpwm; ++ ++ /* sw mechanism */ ++ boolean pre_low_penalty_ra; ++ boolean cur_low_penalty_ra; ++ u32 pre_val0x6c0; ++ u32 cur_val0x6c0; ++ u32 pre_val0x6c4; ++ u32 cur_val0x6c4; ++ u32 pre_val0x6c8; ++ u32 cur_val0x6c8; ++ u8 pre_val0x6cc; ++ u8 cur_val0x6cc; ++ boolean limited_dig; ++ ++ u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */ ++ u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */ ++ u16 backup_retry_limit; ++ u8 backup_ampdu_max_time; ++ ++ /* algorithm related */ ++ u8 pre_algorithm; ++ u8 cur_algorithm; ++ u8 bt_status; ++ u8 wifi_chnl_info[3]; ++ ++ u32 pre_ra_mask; ++ u32 cur_ra_mask; ++ u8 pre_arfr_type; ++ u8 cur_arfr_type; ++ u8 pre_retry_limit_type; ++ u8 cur_retry_limit_type; ++ u8 pre_ampdu_time_type; ++ u8 cur_ampdu_time_type; ++ u32 arp_cnt; ++ ++ u8 error_condition; ++}; ++ ++struct coex_sta_8192e_1ant { ++ boolean bt_disabled; ++ boolean bt_link_exist; ++ boolean sco_exist; ++ boolean a2dp_exist; ++ boolean hid_exist; ++ boolean pan_exist; ++ ++ boolean under_lps; ++ boolean under_ips; ++ u32 specific_pkt_period_cnt; ++ u32 high_priority_tx; ++ u32 high_priority_rx; ++ u32 low_priority_tx; ++ u32 low_priority_rx; ++ s8 bt_rssi; ++ boolean bt_tx_rx_mask; ++ u8 pre_bt_rssi_state; ++ u8 pre_wifi_rssi_state[4]; ++ boolean c2h_bt_info_req_sent; ++ u8 bt_info_c2h[BT_INFO_SRC_8192E_1ANT_MAX][10]; ++ u32 bt_info_c2h_cnt[BT_INFO_SRC_8192E_1ANT_MAX]; ++ boolean c2h_bt_inquiry_page; ++ boolean c2h_bt_page; /* Add for win8.1 page out issue */ ++ boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */ ++ u8 bt_retry_cnt; ++ u8 bt_info_ext; ++ u32 pop_event_cnt; ++ u8 scan_ap_num; ++ ++ u32 crc_ok_cck; ++ u32 crc_ok_11g; ++ u32 crc_ok_11n; ++ u32 crc_ok_11n_agg; ++ ++ u32 crc_err_cck; ++ u32 crc_err_11g; ++ u32 crc_err_11n; ++ u32 crc_err_11n_agg; ++ ++ boolean cck_lock; ++ boolean pre_ccklock; ++ u8 coex_table_type; ++ ++ boolean force_lps_on; ++}; ++ ++/* ******************************************* ++ * The following is interface which will notify coex module. ++ * ******************************************* */ ++void ex_halbtc8192e1ant_power_on_setting(IN struct btc_coexist *btcoexist); ++void ex_halbtc8192e1ant_pre_load_firmware(IN struct btc_coexist *btcoexist); ++void ex_halbtc8192e1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only); ++void ex_halbtc8192e1ant_init_coex_dm(IN struct btc_coexist *btcoexist); ++void ex_halbtc8192e1ant_ips_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e1ant_lps_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e1ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e1ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e1ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e1ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length); ++void ex_halbtc8192e1ant_rf_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e1ant_halt_notify(IN struct btc_coexist *btcoexist); ++void ex_halbtc8192e1ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state); ++void ex_halbtc8192e1ant_coex_dm_reset(IN struct btc_coexist *btcoexist); ++void ex_halbtc8192e1ant_periodical(IN struct btc_coexist *btcoexist); ++void ex_halbtc8192e1ant_display_coex_info(IN struct btc_coexist *btcoexist); ++void ex_halbtc8192e1ant_dbg_control(IN struct btc_coexist *btcoexist, ++ IN u8 op_code, IN u8 op_len, IN u8 *pdata); ++ ++#else /* #if (RTL8192E_SUPPORT == 1) */ ++#define ex_halbtc8192e1ant_power_on_setting(btcoexist) ++#define ex_halbtc8192e1ant_pre_load_firmware(btcoexist) ++#define ex_halbtc8192e1ant_init_hw_config(btcoexist, wifi_only) ++#define ex_halbtc8192e1ant_init_coex_dm(btcoexist) ++#define ex_halbtc8192e1ant_ips_notify(btcoexist, type) ++#define ex_halbtc8192e1ant_lps_notify(btcoexist, type) ++#define ex_halbtc8192e1ant_scan_notify(btcoexist, type) ++#define ex_halbtc8192e1ant_connect_notify(btcoexist, type) ++#define ex_halbtc8192e1ant_media_status_notify(btcoexist, type) ++#define ex_halbtc8192e1ant_specific_packet_notify(btcoexist, type) ++#define ex_halbtc8192e1ant_bt_info_notify(btcoexist, tmp_buf, length) ++#define ex_halbtc8192e1ant_rf_status_notify(btcoexist, type) ++#define ex_halbtc8192e1ant_halt_notify(btcoexist) ++#define ex_halbtc8192e1ant_pnp_notify(btcoexist, pnp_state) ++#define ex_halbtc8192e1ant_coex_dm_reset(btcoexist) ++#define ex_halbtc8192e1ant_periodical(btcoexist) ++#define ex_halbtc8192e1ant_display_coex_info(btcoexist) ++#define ex_halbtc8192e1ant_dbg_control(btcoexist, op_code, op_len, pdata) ++ ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e2Ant.c +new file mode 100644 +index 0000000..76e0e93 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e2Ant.c +@@ -0,0 +1,3949 @@ ++/* ************************************************************ ++ * Description: ++ * ++ * This file is for RTL8192E Co-exist mechanism ++ * ++ * History ++ * 2012/11/15 Cosa first check in. ++ * ++ * ************************************************************ */ ++ ++/* ************************************************************ ++ * include files ++ * ************************************************************ */ ++#include "Mp_Precomp.h" ++ ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8192E_SUPPORT == 1) ++/* ************************************************************ ++ * Global variables, these are static variables ++ * ************************************************************ */ ++static u8 *trace_buf = &gl_btc_trace_buf[0]; ++static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant; ++static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant; ++static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant; ++static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant; ++ ++const char *const glbt_info_src_8192e_2ant[] = { ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u32 glcoex_ver_date_8192e_2ant = 20130912; ++u32 glcoex_ver_8192e_2ant = 0x35; ++ ++/* ************************************************************ ++ * local function proto type if needed ++ * ************************************************************ ++ * ************************************************************ ++ * local function start with halbtc8192e2ant_ ++ * ************************************************************ */ ++u8 halbtc8192e2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1) ++{ ++ s32 bt_rssi = 0; ++ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; ++ ++ bt_rssi = coex_sta->bt_rssi; ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Rssi thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_bt_rssi_state; ++ } ++ ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (bt_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (bt_rssi < rssi_thresh1) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_bt_rssi_state = bt_rssi_state; ++ ++ return bt_rssi_state; ++} ++ ++u8 halbtc8192e2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist, ++ IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1) ++{ ++ s32 wifi_rssi = 0; ++ u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi RSSI thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_wifi_rssi_state[index]; ++ } ++ ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (wifi_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (wifi_rssi < rssi_thresh1) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; ++ ++ return wifi_rssi_state; ++} ++ ++void halbtc8192e2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist) ++{ ++ static u32 bt_disable_cnt = 0; ++ boolean bt_active = true, bt_disabled = false; ++ ++ /* This function check if bt is disabled */ ++ ++ if (coex_sta->high_priority_tx == 0 && ++ coex_sta->high_priority_rx == 0 && ++ coex_sta->low_priority_tx == 0 && ++ coex_sta->low_priority_rx == 0) ++ bt_active = false; ++ if (coex_sta->high_priority_tx == 0xffff && ++ coex_sta->high_priority_rx == 0xffff && ++ coex_sta->low_priority_tx == 0xffff && ++ coex_sta->low_priority_rx == 0xffff) ++ bt_active = false; ++ if (bt_active) { ++ bt_disable_cnt = 0; ++ bt_disabled = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is enabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ bt_disable_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], bt all counters=0, %d times!!\n", ++ bt_disable_cnt); ++ BTC_TRACE(trace_buf); ++ if (bt_disable_cnt >= 2) { ++ bt_disabled = true; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is disabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ if (coex_sta->bt_disabled != bt_disabled) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is from %s to %s!!\n", ++ (coex_sta->bt_disabled ? "disabled" : "enabled"), ++ (bt_disabled ? "disabled" : "enabled")); ++ BTC_TRACE(trace_buf); ++ coex_sta->bt_disabled = bt_disabled; ++ if (!bt_disabled) { ++ } else { ++ } ++ } ++} ++ ++u32 halbtc8192e2ant_decide_ra_mask(IN struct btc_coexist *btcoexist, ++ IN u8 ss_type, IN u32 ra_mask_type) ++{ ++ u32 dis_ra_mask = 0x0; ++ ++ switch (ra_mask_type) { ++ case 0: /* normal mode */ ++ if (ss_type == 2) ++ dis_ra_mask = 0x0; /* enable 2ss */ ++ else ++ dis_ra_mask = 0xfff00000; /* disable 2ss */ ++ break; ++ case 1: /* disable cck 1/2 */ ++ if (ss_type == 2) ++ dis_ra_mask = 0x00000003; /* enable 2ss */ ++ else ++ dis_ra_mask = 0xfff00003; /* disable 2ss */ ++ break; ++ case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ ++ if (ss_type == 2) ++ dis_ra_mask = 0x0001f1f7; /* enable 2ss */ ++ else ++ dis_ra_mask = 0xfff1f1f7; /* disable 2ss */ ++ break; ++ default: ++ break; ++ } ++ ++ return dis_ra_mask; ++} ++ ++void halbtc8192e2ant_update_ra_mask(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 dis_rate_mask) ++{ ++ coex_dm->cur_ra_mask = dis_rate_mask; ++ ++ if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, ++ &coex_dm->cur_ra_mask); ++ coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; ++} ++ ++void halbtc8192e2ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ boolean wifi_under_b_mode = false; ++ ++ coex_dm->cur_arfr_type = type; ++ ++ if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { ++ switch (coex_dm->cur_arfr_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_4byte(btcoexist, 0x430, ++ coex_dm->backup_arfr_cnt1); ++ btcoexist->btc_write_4byte(btcoexist, 0x434, ++ coex_dm->backup_arfr_cnt2); ++ break; ++ case 1: ++ btcoexist->btc_get(btcoexist, ++ BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x01010101); ++ } else { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; ++} ++ ++void halbtc8192e2ant_retry_limit(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_retry_limit_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_retry_limit_type != ++ coex_dm->cur_retry_limit_type)) { ++ switch (coex_dm->cur_retry_limit_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ coex_dm->backup_retry_limit); ++ break; ++ case 1: /* retry limit=8 */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; ++} ++ ++void halbtc8192e2ant_ampdu_max_time(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_ampdu_time_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) { ++ switch (coex_dm->cur_ampdu_time_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ coex_dm->backup_ampdu_max_time); ++ break; ++ case 1: /* AMPDU timw = 0x38 * 32us */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; ++} ++ ++void halbtc8192e2ant_limited_tx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type, ++ IN u8 retry_limit_type, IN u8 ampdu_time_type) ++{ ++ u32 dis_ra_mask = 0x0; ++ ++ coex_dm->cur_ra_mask_type = ra_mask_type; ++ dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist, ++ coex_dm->cur_ss_type, ra_mask_type); ++ halbtc8192e2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask); ++ ++ halbtc8192e2ant_auto_rate_fallback_retry(btcoexist, force_exec, ++ arfr_type); ++ halbtc8192e2ant_retry_limit(btcoexist, force_exec, retry_limit_type); ++ halbtc8192e2ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type); ++} ++ ++void halbtc8192e2ant_limited_rx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rej_ap_agg_pkt, ++ IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size) ++{ ++ boolean reject_rx_agg = rej_ap_agg_pkt; ++ boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; ++ u8 rx_agg_size = agg_buf_size; ++ ++ /* ============================================ */ ++ /* Rx Aggregation related setting */ ++ /* ============================================ */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ &reject_rx_agg); ++ /* decide BT control aggregation buf size or not */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ &bt_ctrl_rx_agg_size); ++ /* aggregation buf size, only work when BT control Rx aggregation size. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); ++ /* real update aggregation setting */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++void halbtc8192e2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist) ++{ ++ u32 reg_hp_txrx, reg_lp_txrx, u32tmp; ++ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; ++ ++ reg_hp_txrx = 0x770; ++ reg_lp_txrx = 0x774; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); ++ reg_hp_tx = u32tmp & MASKLWORD; ++ reg_hp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); ++ reg_lp_tx = u32tmp & MASKLWORD; ++ reg_lp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ coex_sta->high_priority_tx = reg_hp_tx; ++ coex_sta->high_priority_rx = reg_hp_rx; ++ coex_sta->low_priority_tx = reg_lp_tx; ++ coex_sta->low_priority_rx = reg_lp_rx; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx); ++ BTC_TRACE(trace_buf); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx); ++ BTC_TRACE(trace_buf); ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); ++} ++ ++void halbtc8192e2ant_query_bt_info(IN struct btc_coexist *btcoexist) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ coex_sta->c2h_bt_info_req_sent = true; ++ ++ h2c_parameter[0] |= BIT(0); /* trigger */ ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); ++} ++ ++boolean halbtc8192e2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist) ++{ ++ static boolean pre_wifi_busy = false, pre_under_4way = false, ++ pre_bt_hs_on = false; ++ boolean wifi_busy = false, under_4way = false, bt_hs_on = false; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ ++ if (wifi_connected) { ++ if (wifi_busy != pre_wifi_busy) { ++ pre_wifi_busy = wifi_busy; ++ return true; ++ } ++ if (under_4way != pre_under_4way) { ++ pre_under_4way = under_4way; ++ return true; ++ } ++ if (bt_hs_on != pre_bt_hs_on) { ++ pre_bt_hs_on = bt_hs_on; ++ return true; ++ } ++ } ++ ++ return false; ++} ++ ++void halbtc8192e2ant_update_bt_link_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ bt_link_info->bt_link_exist = coex_sta->bt_link_exist; ++ bt_link_info->sco_exist = coex_sta->sco_exist; ++ bt_link_info->a2dp_exist = coex_sta->a2dp_exist; ++ bt_link_info->pan_exist = coex_sta->pan_exist; ++ bt_link_info->hid_exist = coex_sta->hid_exist; ++ ++ /* work around for HS mode. */ ++ if (bt_hs_on) { ++ bt_link_info->pan_exist = true; ++ bt_link_info->bt_link_exist = true; ++ } ++ ++ /* check if Sco only */ ++ if (bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->sco_only = true; ++ else ++ bt_link_info->sco_only = false; ++ ++ /* check if A2dp only */ ++ if (!bt_link_info->sco_exist && ++ bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->a2dp_only = true; ++ else ++ bt_link_info->a2dp_only = false; ++ ++ /* check if Pan only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->pan_only = true; ++ else ++ bt_link_info->pan_only = false; ++ ++ /* check if Hid only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ bt_link_info->hid_exist) ++ bt_link_info->hid_only = true; ++ else ++ bt_link_info->hid_only = false; ++} ++ ++u8 halbtc8192e2ant_action_algorithm(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ struct btc_stack_info *stack_info = &btcoexist->stack_info; ++ boolean bt_hs_on = false; ++ u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED; ++ u8 num_of_diff_profile = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ if (!bt_link_info->bt_link_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], No BT link exists!!!\n"); ++ BTC_TRACE(trace_buf); ++ return algorithm; ++ } ++ ++ if (bt_link_info->sco_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->hid_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->pan_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->a2dp_exist) ++ num_of_diff_profile++; ++ ++ if (num_of_diff_profile == 1) { ++ if (bt_link_info->sco_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; ++ } else { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PAN(HS) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PAN(EDR) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 2) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_SCO_PAN; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ if (stack_info->num_of_hid >= 2) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID*2 + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_HID; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + A2DP ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_SCO_PAN; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile >= 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++void halbtc8192e2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist, ++ IN u8 dac_swing_lvl) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ /* There are several type of dacswing */ ++ /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */ ++ h2c_parameter[0] = dac_swing_lvl; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter); ++} ++ ++void halbtc8192e2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist, ++ IN u8 dec_bt_pwr_lvl) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = dec_bt_pwr_lvl; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter); ++} ++ ++void halbtc8192e2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 dec_bt_pwr_lvl) ++{ ++ coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl; ++ ++ if (!force_exec) { ++#if 0 /* work around, avoid h2c command fail. */ ++ if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl) ++ return; ++#endif ++ } ++ halbtc8192e2ant_set_fw_dec_bt_pwr(btcoexist, ++ coex_dm->cur_bt_dec_pwr_lvl); ++ ++ coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl; ++} ++ ++void halbtc8192e2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean enable_auto_report) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = 0; ++ ++ if (enable_auto_report) ++ h2c_parameter[0] |= BIT(0); ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); ++} ++ ++void halbtc8192e2ant_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable_auto_report) ++{ ++ coex_dm->cur_bt_auto_report = enable_auto_report; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) ++ return; ++ } ++ halbtc8192e2ant_set_bt_auto_report(btcoexist, ++ coex_dm->cur_bt_auto_report); ++ ++ coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; ++} ++ ++void halbtc8192e2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 fw_dac_swing_lvl) ++{ ++ coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_fw_dac_swing_lvl == ++ coex_dm->cur_fw_dac_swing_lvl) ++ return; ++ } ++ ++ halbtc8192e2ant_set_fw_dac_swing_level(btcoexist, ++ coex_dm->cur_fw_dac_swing_lvl); ++ ++ coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl; ++} ++ ++void halbtc8192e2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist, ++ IN boolean rx_rf_shrink_on) ++{ ++ if (rx_rf_shrink_on) { ++ /* Shrink RF Rx LPF corner */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Shrink RF Rx LPF corner!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff, ++ 0xffffc); ++ } else { ++ /* Resume RF Rx LPF corner */ ++ /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */ ++ if (btcoexist->initilized) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Resume RF Rx LPF corner!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, ++ 0xfffff, coex_dm->bt_rf_0x1e_backup); ++ } ++ } ++} ++ ++void halbtc8192e2ant_rf_shrink(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rx_rf_shrink_on) ++{ ++ coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_rf_rx_lpf_shrink == ++ coex_dm->cur_rf_rx_lpf_shrink) ++ return; ++ } ++ halbtc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist, ++ coex_dm->cur_rf_rx_lpf_shrink); ++ ++ coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink; ++} ++ ++void halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist ++ *btcoexist, IN boolean low_penalty_ra) ++{ ++ u8 h2c_parameter[6] = {0}; ++ ++ h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */ ++ ++ if (low_penalty_ra) { ++ h2c_parameter[1] |= BIT(0); ++ h2c_parameter[2] = ++ 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */ ++ h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */ ++ h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */ ++ h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter); ++} ++ ++void halbtc8192e2ant_low_penalty_ra(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean low_penalty_ra) ++{ ++ coex_dm->cur_low_penalty_ra = low_penalty_ra; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) ++ return; ++ } ++ halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(btcoexist, ++ coex_dm->cur_low_penalty_ra); ++ ++ coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; ++} ++ ++void halbtc8192e2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist, ++ IN u32 level) ++{ ++ u8 val = (u8)level; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Write SwDacSwing = 0x%x\n", level); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val); ++} ++ ++void halbtc8192e2ant_set_sw_full_time_dac_swing(IN struct btc_coexist ++ *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl) ++{ ++ if (sw_dac_swing_on) ++ halbtc8192e2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl); ++ else ++ halbtc8192e2ant_set_dac_swing_reg(btcoexist, 0x18); ++} ++ ++ ++void halbtc8192e2ant_dac_swing(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl) ++{ ++ coex_dm->cur_dac_swing_on = dac_swing_on; ++ coex_dm->cur_dac_swing_lvl = dac_swing_lvl; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) && ++ (coex_dm->pre_dac_swing_lvl == ++ coex_dm->cur_dac_swing_lvl)) ++ return; ++ } ++ delay_ms(30); ++ halbtc8192e2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on, ++ dac_swing_lvl); ++ ++ coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on; ++ coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl; ++} ++ ++void halbtc8192e2ant_set_adc_back_off(IN struct btc_coexist *btcoexist, ++ IN boolean adc_back_off) ++{ ++ if (adc_back_off) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB BackOff Level On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB BackOff Level Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1); ++ } ++} ++ ++void halbtc8192e2ant_adc_back_off(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean adc_back_off) ++{ ++ coex_dm->cur_adc_back_off = adc_back_off; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off) ++ return; ++ } ++ halbtc8192e2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off); ++ ++ coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off; ++} ++ ++void halbtc8192e2ant_set_agc_table(IN struct btc_coexist *btcoexist, ++ IN boolean agc_table_en) ++{ ++ /* =================BB AGC Gain Table */ ++ if (agc_table_en) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB Agc Table On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB Agc Table Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001); ++ } ++} ++ ++void halbtc8192e2ant_agc_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean agc_table_en) ++{ ++ coex_dm->cur_agc_table_en = agc_table_en; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en) ++ return; ++ } ++ halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en); ++ ++ coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en; ++} ++ ++void halbtc8192e2ant_set_coex_table(IN struct btc_coexist *btcoexist, ++ IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); ++} ++ ++void halbtc8192e2ant_coex_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4, ++ IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ coex_dm->cur_val0x6c0 = val0x6c0; ++ coex_dm->cur_val0x6c4 = val0x6c4; ++ coex_dm->cur_val0x6c8 = val0x6c8; ++ coex_dm->cur_val0x6cc = val0x6cc; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && ++ (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && ++ (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && ++ (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) ++ return; ++ } ++ halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, ++ val0x6cc); ++ ++ coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; ++ coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; ++ coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; ++ coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; ++} ++ ++void halbtc8192e2ant_coex_table_with_type(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ switch (type) { ++ case 0: ++ halbtc8192e2ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8192e2ant_coex_table(btcoexist, force_exec, ++ 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8192e2ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5ffb5ffb, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8192e2ant_coex_table(btcoexist, force_exec, ++ 0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8192e2ant_coex_table(btcoexist, force_exec, ++ 0xdfffdfff, 0x5ffb5ffb, 0xffffff, 0x3); ++ break; ++ ++ default: ++ break; ++ } ++} ++ ++void halbtc8192e2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean enable) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ if (enable) { ++ h2c_parameter[0] |= BIT(0); /* function enable */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); ++} ++ ++void halbtc8192e2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable) ++{ ++ coex_dm->cur_ignore_wlan_act = enable; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_ignore_wlan_act == ++ coex_dm->cur_ignore_wlan_act) ++ return; ++ } ++ halbtc8192e2ant_set_fw_ignore_wlan_act(btcoexist, enable); ++ ++ coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; ++} ++ ++void halbtc8192e2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist, ++ IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5) ++{ ++ u8 h2c_parameter[5] = {0}; ++ ++ h2c_parameter[0] = byte1; ++ h2c_parameter[1] = byte2; ++ h2c_parameter[2] = byte3; ++ h2c_parameter[3] = byte4; ++ h2c_parameter[4] = byte5; ++ ++ coex_dm->ps_tdma_para[0] = byte1; ++ coex_dm->ps_tdma_para[1] = byte2; ++ coex_dm->ps_tdma_para[2] = byte3; ++ coex_dm->ps_tdma_para[3] = byte4; ++ coex_dm->ps_tdma_para[4] = byte5; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); ++} ++ ++void halbtc8192e2ant_sw_mechanism1(IN struct btc_coexist *btcoexist, ++ IN boolean shrink_rx_lpf, IN boolean low_penalty_ra, ++ IN boolean limited_dig, IN boolean bt_lna_constrain) ++{ ++ /* ++ u32 wifi_bw; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if(BTC_WIFI_BW_HT40 != wifi_bw) ++ { ++ if (shrink_rx_lpf) ++ shrink_rx_lpf = false; ++ } ++ */ ++ ++ halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); ++ /* halbtc8192e2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); */ ++} ++ ++void halbtc8192e2ant_sw_mechanism2(IN struct btc_coexist *btcoexist, ++ IN boolean agc_table_shift, IN boolean adc_back_off, ++ IN boolean sw_dac_swing, IN u32 dac_swing_lvl) ++{ ++ halbtc8192e2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); ++ /* halbtc8192e2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */ ++ halbtc8192e2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, ++ dac_swing_lvl); ++} ++ ++void halbtc8192e2ant_set_ant_path(IN struct btc_coexist *btcoexist, ++ IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off) ++{ ++ u32 u32tmp = 0; ++ ++ if (init_hwcfg) { ++ btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24); ++ btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700); ++ if (btcoexist->chip_interface == BTC_INTF_USB) ++ btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004); ++ else ++ btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004); ++ ++ /* 0x4c[27][24]='00', Set Antenna to BB */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp &= ~BIT(24); ++ u32tmp &= ~BIT(27); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ } else if (wifi_off) { ++ if (btcoexist->chip_interface == BTC_INTF_USB) ++ btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004); ++ else ++ btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004); ++ ++ /* 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1 */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp |= BIT(24); ++ u32tmp |= BIT(27); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ } ++ ++ /* ext switch setting */ ++ switch (ant_pos_type) { ++ case BTC_ANT_PATH_WIFI: ++ btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4); ++ break; ++ case BTC_ANT_PATH_BT: ++ btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4); ++ break; ++ } ++} ++ ++void halbtc8192e2ant_ps_tdma(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean turn_on, IN u8 type) ++{ ++ coex_dm->cur_ps_tdma_on = turn_on; ++ coex_dm->cur_ps_tdma = type; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && ++ (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) ++ return; ++ } ++ if (turn_on) { ++ switch (type) { ++ case 1: ++ default: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1a, 0x1a, 0xe1, 0x90); ++ break; ++ case 2: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x12, 0x12, 0xe1, 0x90); ++ break; ++ case 3: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0xf1, 0x90); ++ break; ++ case 4: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x3, 0xf1, 0x90); ++ break; ++ case 5: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1a, 0x1a, 0x60, 0x90); ++ break; ++ case 6: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x12, 0x12, 0x60, 0x90); ++ break; ++ case 7: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0x70, 0x90); ++ break; ++ case 8: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xa3, ++ 0x10, 0x3, 0x70, 0x90); ++ break; ++ case 9: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1a, 0x1a, 0xe1, 0x10); ++ break; ++ case 10: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x12, 0x12, 0xe1, 0x10); ++ break; ++ case 11: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0xf1, 0x10); ++ break; ++ case 12: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x3, 0xf1, 0x10); ++ break; ++ case 13: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1a, 0x1a, 0xe0, 0x10); ++ break; ++ case 14: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x12, 0x12, 0xe0, 0x10); ++ break; ++ case 15: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0xf0, 0x10); ++ break; ++ case 16: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x12, 0x3, 0xf0, 0x10); ++ break; ++ case 17: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x20, 0x03, 0x10, 0x10); ++ break; ++ case 18: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 71: ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1a, 0x1a, 0xe1, 0x90); ++ break; ++ } ++ } else { ++ /* disable PS tdma */ ++ switch (type) { ++ default: ++ case 0: /* ANT2PTA, 0x778=1 */ ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x8, ++ 0x0, 0x0, 0x0, 0x0); ++ halbtc8192e2ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_PTA, false, false); ++ break; ++ case 1: /* ANT2BT, 0x778=3 */ ++ halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x8, 0x0); ++ delay_ms(5); ++ halbtc8192e2ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_BT, false, false); ++ break; ++ ++ } ++ } ++ ++ /* update pre state */ ++ coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; ++ coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; ++} ++ ++void halbtc8192e2ant_set_switch_ss_type(IN struct btc_coexist *btcoexist, ++ IN u8 ss_type) ++{ ++ u8 mimo_ps = BTC_MIMO_PS_DYNAMIC; ++ u32 dis_ra_mask = 0x0; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], REAL set SS Type = %d\n", ss_type); ++ BTC_TRACE(trace_buf); ++ ++ dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist, ss_type, ++ coex_dm->cur_ra_mask_type); ++ halbtc8192e2ant_update_ra_mask(btcoexist, FORCE_EXEC, dis_ra_mask); ++ ++ if (ss_type == 1) { ++ halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); ++ /* switch ofdm path */ ++ btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11); ++ btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1); ++ btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111); ++ /* switch cck patch */ ++ /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1); */ ++ /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81); */ ++ mimo_ps = BTC_MIMO_PS_STATIC; ++ } else if (ss_type == 2) { ++ halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); ++ btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33); ++ btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3); ++ btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313); ++ /* remove, if 0xe77[2]=0x0 then CCK will fail, advised by Jenyu */ ++ /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0); */ ++ /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41); */ ++ mimo_ps = BTC_MIMO_PS_DYNAMIC; ++ } ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, ++ &mimo_ps); /* set rx 1ss or 2ss */ ++} ++ ++void halbtc8192e2ant_switch_ss_type(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 new_ss_type) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], %s Switch SS Type = %d\n", ++ (force_exec ? "force to" : ""), new_ss_type); ++ BTC_TRACE(trace_buf); ++ coex_dm->cur_ss_type = new_ss_type; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_ss_type == coex_dm->cur_ss_type) ++ return; ++ } ++ halbtc8192e2ant_set_switch_ss_type(btcoexist, coex_dm->cur_ss_type); ++ ++ coex_dm->pre_ss_type = coex_dm->cur_ss_type; ++} ++ ++void halbtc8192e2ant_coex_all_off(IN struct btc_coexist *btcoexist) ++{ ++ /* fw all off */ ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ /* sw all off */ ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ /* hw all off */ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ /* force to reset coex mechanism */ ++ ++ halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ halbtc8192e2ant_switch_ss_type(btcoexist, FORCE_EXEC, 2); ++ ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++} ++ ++void halbtc8192e2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist) ++{ ++ boolean low_pwr_disable = true; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++} ++ ++boolean halbtc8192e2ant_is_common_action(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean common = false, wifi_connected = false, wifi_busy = false; ++ boolean bt_hs_on = false, low_pwr_disable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (bt_link_info->sco_exist || bt_link_info->hid_exist) ++ halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0); ++ else ++ halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ if (!wifi_connected) { ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non-connected idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) || ++ (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == ++ coex_dm->bt_status)) { ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, ++ 2); ++ halbtc8192e2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 1); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ } else { ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, ++ 1); ++ halbtc8192e2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 0); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 1); ++ } ++ ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ ++ common = true; ++ } else { ++ if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, ++ 2); ++ halbtc8192e2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 1); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 6); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ ++ common = true; ++ } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ if (bt_hs_on) ++ return false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, ++ 2); ++ halbtc8192e2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 1); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 6); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ ++ common = true; ++ } else { ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ if (wifi_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Busy + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ common = false; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, ++ NORMAL_EXEC, 1); ++ halbtc8192e2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 2); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 21); ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, ++ NORMAL_EXEC, 6); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, ++ NORMAL_EXEC, 0); ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, ++ false, false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ common = true; ++ } ++ } ++ } ++ ++ return common; ++} ++void halbtc8192e2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist, ++ IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval) ++{ ++ static s32 up, dn, m, n, wait_count; ++ s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */ ++ u8 retry_count = 0; ++ ++ ++ if (!coex_dm->auto_tdma_adjust) { ++ coex_dm->auto_tdma_adjust = true; ++ { ++ if (sco_hid) { ++ if (tx_pause) { ++ if (max_interval == 1) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 13); ++ coex_dm->ps_tdma_du_adj_type = ++ 13; ++ } else if (max_interval == 2) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (max_interval == 3) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } ++ } else { ++ if (max_interval == 1) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = ++ 9; ++ } else if (max_interval == 2) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (max_interval == 3) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } ++ } ++ } else { ++ if (tx_pause) { ++ if (max_interval == 1) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 5); ++ coex_dm->ps_tdma_du_adj_type = ++ 5; ++ } else if (max_interval == 2) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (max_interval == 3) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } ++ } else { ++ if (max_interval == 1) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (max_interval == 2) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (max_interval == 3) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } ++ } ++ } ++ } ++ /* ============ */ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } else { ++ /* accquire the BT TRx retry count from BT_Info byte2 */ ++ retry_count = coex_sta->bt_retry_cnt; ++ result = 0; ++ wait_count++; ++ ++ if (retry_count == ++ 0) { /* no retry in the last 2-second duration */ ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */ ++ wait_count = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ } ++ } else if (retry_count <= ++ 3) { /* <=3 retry in the last 2-second duration */ ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) { /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */ ++ if (wait_count <= 2) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */ ++ if (wait_count == 1) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ ++ if (max_interval == 1) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 71) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 5); ++ coex_dm->ps_tdma_du_adj_type = 5; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 5); ++ coex_dm->ps_tdma_du_adj_type = 5; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 13); ++ coex_dm->ps_tdma_du_adj_type = 13; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 5); ++ coex_dm->ps_tdma_du_adj_type = ++ 5; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 13); ++ coex_dm->ps_tdma_du_adj_type = ++ 13; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 71); ++ coex_dm->ps_tdma_du_adj_type = 71; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 71) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 71); ++ coex_dm->ps_tdma_du_adj_type = ++ 71; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = ++ 9; ++ } ++ } ++ } ++ } else if (max_interval == 2) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } ++ } ++ } ++ } else if (max_interval == 3) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8192e2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8192e2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } ++ } ++ } ++ } ++ } ++ ++ /* if current PsTdma not match with the recorded one (when scan, dhcp...), */ ++ /* then we have to adjust it back to the previous record one. */ ++ if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) { ++ boolean scan = false, link = false, roam = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n", ++ coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (!scan && !link && !roam) ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ coex_dm->ps_tdma_du_adj_type); ++ else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } ++} ++ ++/* SCO only or SCO+PAN(HS) */ ++void halbtc8192e2ant_action_sco(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ ++ bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x6); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x6); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x6); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x6); ++ } ++ } ++} ++ ++void halbtc8192e2ant_action_sco_pan(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ ++ bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x6); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x6); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x6); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x6); ++ } ++ } ++} ++ ++void halbtc8192e2ant_action_hid(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ } ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */ ++void halbtc8192e2ant_action_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ boolean long_dist = false; ++ ++ wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW || ++ bt_rssi_state == BTC_RSSI_STATE_STAY_LOW) && ++ (wifi_rssi_state == BTC_RSSI_STATE_LOW || ++ wifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n"); ++ BTC_TRACE(trace_buf); ++ long_dist = true; ++ } ++ if (long_dist) { ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, ++ 0x4); ++ } else { ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ } ++ ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (long_dist) ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ else ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ ++ ++ if (long_dist) { ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17); ++ coex_dm->auto_tdma_adjust = false; ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ } else { ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, ++ true, 1); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, ++ false, 1); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, ++ false, 1); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ } ++ } ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8192e2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false, ++ 2); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false, ++ 2); ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ } ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x6); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ true, 0x6); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x6); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ true, 0x6); ++ } ++ } ++} ++ ++void halbtc8192e2ant_action_pan_edr(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1); ++ } ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* PAN(HS) only */ ++void halbtc8192e2ant_action_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* PAN(EDR)+A2DP */ ++void halbtc8192e2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false, ++ 3); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false, ++ 3); ++ } ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8192e2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); ++ } ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* HID+A2DP+PAN(EDR) */ ++void halbtc8192e2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3); ++ } ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8192e2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42); ++ ++ halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); ++ halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2); ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2); ++ } ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8192e2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8192e2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ u8 algorithm = 0; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->under_ips) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is under IPS !!!\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ algorithm = halbtc8192e2ant_action_algorithm(btcoexist); ++ if (coex_sta->c2h_bt_inquiry_page && ++ (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is under inquiry/page scan !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_bt_inquiry(btcoexist); ++ return; ++ } ++ ++ coex_dm->cur_algorithm = algorithm; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n", ++ coex_dm->cur_algorithm); ++ BTC_TRACE(trace_buf); ++ ++ if (halbtc8192e2ant_is_common_action(btcoexist)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant common.\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n", ++ coex_dm->pre_algorithm, coex_dm->cur_algorithm); ++ BTC_TRACE(trace_buf); ++ coex_dm->auto_tdma_adjust = false; ++ } ++ switch (coex_dm->cur_algorithm) { ++ case BT_8192E_2ANT_COEX_ALGO_SCO: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = SCO.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_sco(btcoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_SCO_PAN: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = SCO+PAN(EDR).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_sco_pan(btcoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_hid(btcoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_a2dp(btcoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_a2dp_pan_hs(btcoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_pan_edr(btcoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HS mode.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_pan_hs(btcoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_pan_edr_a2dp(btcoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_pan_edr_hid(btcoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_hid_a2dp_pan_edr( ++ btcoexist); ++ break; ++ case BT_8192E_2ANT_COEX_ALGO_HID_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_action_hid_a2dp(btcoexist); ++ break; ++ default: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = unknown!!\n"); ++ BTC_TRACE(trace_buf); ++ break; ++ } ++ coex_dm->pre_algorithm = coex_dm->cur_algorithm; ++ } ++} ++ ++void halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean back_up) ++{ ++ u16 u16tmp = 0; ++ u8 u8tmp = 0; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 2Ant Init HW Config!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (back_up) { ++ /* backup rf 0x1e value */ ++ coex_dm->bt_rf_0x1e_backup = ++ btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e, ++ 0xfffff); ++ ++ coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, ++ 0x430); ++ coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, ++ 0x434); ++ coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( ++ btcoexist, 0x42a); ++ coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte( ++ btcoexist, 0x456); ++ } ++ ++ /* antenna sw ctrl to bt */ ++ halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, true, false); ++ ++ halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ ++ /* antenna switch control parameter */ ++ btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555); ++ ++ /* coex parameters */ ++ btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3); ++ /* 0x790[5:0]=0x5 */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); ++ u8tmp &= 0xc0; ++ u8tmp |= 0x5; ++ btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp); ++ ++ /* enable counter statistics */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); ++ ++ /* enable PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20); ++ /* enable mailbox interface */ ++ u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40); ++ u16tmp |= BIT(9); ++ btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp); ++ ++ /* enable PTA I2C mailbox */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101); ++ u8tmp |= BIT(4); ++ btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp); ++ ++ /* enable bt clock when wifi is disabled. */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93); ++ u8tmp |= BIT(0); ++ btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp); ++ /* enable bt clock when suspend. */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7); ++ u8tmp |= BIT(0); ++ btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp); ++} ++ ++/* ************************************************************ ++ * work around function start with wa_halbtc8192e2ant_ ++ * ************************************************************ ++ * ************************************************************ ++ * extern function start with ex_halbtc8192e2ant_ ++ * ************************************************************ */ ++void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist) ++{ ++} ++ ++void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only) ++{ ++ halbtc8192e2ant_init_hw_config(btcoexist, true); ++} ++ ++void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Coex Mechanism Init!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8192e2ant_init_coex_dm(btcoexist); ++} ++ ++void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ struct btc_stack_info *stack_info = &btcoexist->stack_info; ++ u8 *cli_buf = btcoexist->cli_buf; ++ u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; ++ u16 u16tmp[4]; ++ u32 u32tmp[4]; ++ u32 fw_ver = 0, bt_patch_ver = 0; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cli_buf); ++ ++ if (btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "Ant PG number/ Ant mechanism:", ++ board_info->pg_ant_num, board_info->btdm_ant_num); ++ CL_PRINTF(cli_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", ++ "CoexVer/ FwVer/ PatchVer", ++ glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant, fw_ver, ++ bt_patch_ver, bt_patch_ver); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", ++ "Wifi channel informed to BT", ++ coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1], ++ coex_dm->wifi_chnl_info[2]); ++ CL_PRINTF(cli_buf); ++ ++ /* wifi status */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Wifi Status]============"); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[BT Status]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", ++ "BT [status/ rssi/ retryCnt]", ++ ((coex_sta->bt_disabled) ? ("disabled") : (( ++ coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") ++ : ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) ? "non-connected idle" : ++ ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status) ++ ? "connected-idle" : "busy")))), ++ coex_sta->bt_rssi, coex_sta->bt_retry_cnt); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", ++ "SCO/HID/PAN/A2DP", ++ stack_info->sco_exist, stack_info->hid_exist, ++ stack_info->pan_exist, stack_info->a2dp_exist); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Info A2DP rate", ++ (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate"); ++ CL_PRINTF(cli_buf); ++ ++ for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) { ++ if (coex_sta->bt_info_c2h_cnt[i]) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", ++ glbt_info_src_8192e_2ant[i], ++ coex_sta->bt_info_c2h[i][0], ++ coex_sta->bt_info_c2h[i][1], ++ coex_sta->bt_info_c2h[i][2], ++ coex_sta->bt_info_c2h[i][3], ++ coex_sta->bt_info_c2h[i][4], ++ coex_sta->bt_info_c2h[i][5], ++ coex_sta->bt_info_c2h[i][6], ++ coex_sta->bt_info_c2h_cnt[i]); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type", ++ coex_dm->cur_ss_type); ++ CL_PRINTF(cli_buf); ++ ++ /* Sw mechanism */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Sw mechanism]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", ++ "SM1[ShRf/ LpRA/ LimDig]", ++ coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra, ++ coex_dm->limited_dig); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", ++ "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", ++ coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off, ++ coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl); ++ CL_PRINTF(cli_buf); ++ ++ /* Fw mechanism */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Fw mechanism]============"); ++ CL_PRINTF(cli_buf); ++ ++ ps_tdma_case = coex_dm->cur_ps_tdma; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", ++ "PS TDMA", ++ coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1], ++ coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3], ++ coex_dm->ps_tdma_para[4], ps_tdma_case, ++ coex_dm->auto_tdma_adjust); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "DecBtPwr/ IgnWlanAct", ++ coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act); ++ CL_PRINTF(cli_buf); ++ ++ /* Hw setting */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Hw setting]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", ++ "RF-A, 0x1e initVal", ++ coex_dm->bt_rf_0x1e_backup); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", ++ "backup ARFR1/ARFR2/RL/AMaxTime", ++ coex_dm->backup_arfr_cnt1, coex_dm->backup_arfr_cnt2, ++ coex_dm->backup_retry_limit, ++ coex_dm->backup_ampdu_max_time); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434); ++ u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", ++ "0x430/0x434/0x42a/0x456", ++ u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0xc04/ 0xd04/ 0x90c", ++ u32tmp[0], u32tmp[1], u32tmp[2]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778", ++ u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x92c/ 0x930", ++ (u8tmp[0]), u32tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x40/ 0x4f", ++ u8tmp[0], u8tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x550(bcn ctrl)/0x522", ++ u32tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", ++ u32tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", ++ "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", ++ u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x770(hp rx[31:16]/tx[15:0])", ++ coex_sta->high_priority_rx, coex_sta->high_priority_tx); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x774(lp rx[31:16]/tx[15:0])", ++ coex_sta->low_priority_rx, coex_sta->low_priority_tx); ++ CL_PRINTF(cli_buf); ++#if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1) ++ halbtc8192e2ant_monitor_bt_ctr(btcoexist); ++#endif ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (BTC_IPS_ENTER == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS ENTER notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = true; ++ halbtc8192e2ant_coex_all_off(btcoexist); ++ halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, ++ true); ++ } else if (BTC_IPS_LEAVE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS LEAVE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = false; ++ } ++} ++ ++void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (BTC_LPS_ENABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS ENABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = true; ++ } else if (BTC_LPS_DISABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS DISABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = false; ++ } ++} ++ ++void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (BTC_SCAN_START == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN START notify\n"); ++ BTC_TRACE(trace_buf); ++ } else if (BTC_SCAN_FINISH == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (BTC_ASSOCIATE_START == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT START notify\n"); ++ BTC_TRACE(trace_buf); ++ } else if (BTC_ASSOCIATE_FINISH == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u8 h2c_parameter[3] = {0}; ++ u32 wifi_bw; ++ u8 wifi_central_chnl; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_MEDIA_CONNECT == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA connect notify\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA disconnect notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ /* only 2.4G we need to inform bt the chnl mask */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ &wifi_central_chnl); ++ if ((BTC_MEDIA_CONNECT == type) && ++ (wifi_central_chnl <= 14)) { ++ h2c_parameter[0] = 0x1; ++ h2c_parameter[1] = wifi_central_chnl; ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ h2c_parameter[2] = 0x30; ++ else ++ h2c_parameter[2] = 0x20; ++ } ++ ++ coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; ++ coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; ++ coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); ++} ++ ++void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (type == BTC_PACKET_DHCP) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], DHCP Packet notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length) ++{ ++ u8 bt_info = 0; ++ u8 i, rsp_source = 0; ++ boolean bt_busy = false, limited_dig = false; ++ boolean wifi_connected = false; ++ ++ coex_sta->c2h_bt_info_req_sent = false; ++ ++ rsp_source = tmp_buf[0] & 0xf; ++ if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX) ++ rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW; ++ coex_sta->bt_info_c2h_cnt[rsp_source]++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source, ++ length); ++ BTC_TRACE(trace_buf); ++ for (i = 0; i < length; i++) { ++ coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; ++ if (i == 1) ++ bt_info = tmp_buf[i]; ++ if (i == length - 1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ ++ if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) { ++ coex_sta->bt_retry_cnt = /* [3:0] */ ++ coex_sta->bt_info_c2h[rsp_source][2] & 0xf; ++ ++ coex_sta->bt_rssi = ++ coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10; ++ ++ coex_sta->bt_info_ext = ++ coex_sta->bt_info_c2h[rsp_source][4]; ++ ++ /* Here we need to resend some wifi info to BT */ ++ /* because bt is reset and loss of the info. */ ++ if ((coex_sta->bt_info_ext & BIT(1))) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (wifi_connected) ++ ex_halbtc8192e2ant_media_status_notify( ++ btcoexist, BTC_MEDIA_CONNECT); ++ else ++ ex_halbtc8192e2ant_media_status_notify( ++ btcoexist, BTC_MEDIA_DISCONNECT); ++ } ++ ++ if ((coex_sta->bt_info_ext & BIT(3))) { ++ if (!btcoexist->manual_control && ++ !btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8192e2ant_ignore_wlan_act(btcoexist, ++ FORCE_EXEC, false); ++ } ++ } else { ++ /* BT already NOT ignore Wlan active, do nothing here. */ ++ } ++ ++#if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0) ++ if ((coex_sta->bt_info_ext & BIT(4))) { ++ /* BT auto report already enabled, do nothing */ ++ } else ++ halbtc8192e2ant_bt_auto_report(btcoexist, FORCE_EXEC, ++ true); ++#endif ++ } ++ ++ /* check BIT2 first ==> check if bt is under inquiry or page scan */ ++ if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE) ++ coex_sta->c2h_bt_inquiry_page = true; ++ else ++ coex_sta->c2h_bt_inquiry_page = false; ++ ++ /* set link exist status */ ++ if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) { ++ coex_sta->bt_link_exist = false; ++ coex_sta->pan_exist = false; ++ coex_sta->a2dp_exist = false; ++ coex_sta->hid_exist = false; ++ coex_sta->sco_exist = false; ++ } else { /* connection exists */ ++ coex_sta->bt_link_exist = true; ++ if (bt_info & BT_INFO_8192E_2ANT_B_FTP) ++ coex_sta->pan_exist = true; ++ else ++ coex_sta->pan_exist = false; ++ if (bt_info & BT_INFO_8192E_2ANT_B_A2DP) ++ coex_sta->a2dp_exist = true; ++ else ++ coex_sta->a2dp_exist = false; ++ if (bt_info & BT_INFO_8192E_2ANT_B_HID) ++ coex_sta->hid_exist = true; ++ else ++ coex_sta->hid_exist = false; ++ if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) ++ coex_sta->sco_exist = true; ++ else ++ coex_sta->sco_exist = false; ++ } ++ ++ halbtc8192e2ant_update_bt_link_info(btcoexist); ++ ++ if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) { ++ coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info == ++ BT_INFO_8192E_2ANT_B_CONNECTION) { /* connection exists but no busy */ ++ coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if ((bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) || ++ (bt_info & BT_INFO_8192E_2ANT_B_SCO_BUSY)) { ++ coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info & BT_INFO_8192E_2ANT_B_ACL_BUSY) { ++ coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) { ++ bt_busy = true; ++ limited_dig = true; ++ } else { ++ bt_busy = false; ++ limited_dig = false; ++ } ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ coex_dm->limited_dig = limited_dig; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig); ++ ++ halbtc8192e2ant_run_coexist_mechanism(btcoexist); ++} ++ ++void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true); ++ halbtc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist) ++{ ++#if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0) ++ halbtc8192e2ant_query_bt_info(btcoexist); ++ halbtc8192e2ant_monitor_bt_ctr(btcoexist); ++ halbtc8192e2ant_monitor_bt_enable_disable(btcoexist); ++#else ++ if (halbtc8192e2ant_is_wifi_status_changed(btcoexist) || ++ coex_dm->auto_tdma_adjust) ++ halbtc8192e2ant_run_coexist_mechanism(btcoexist); ++#endif ++} ++ ++#endif ++ ++#endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e2Ant.h +new file mode 100644 +index 0000000..5a4786a +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e2Ant.h +@@ -0,0 +1,190 @@ ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8192E_SUPPORT == 1) ++/* ******************************************* ++ * The following is for 8192E 2Ant BT Co-exist definition ++ * ******************************************* */ ++#define BT_AUTO_REPORT_ONLY_8192E_2ANT 0 ++ ++#define BT_INFO_8192E_2ANT_B_FTP BIT(7) ++#define BT_INFO_8192E_2ANT_B_A2DP BIT(6) ++#define BT_INFO_8192E_2ANT_B_HID BIT(5) ++#define BT_INFO_8192E_2ANT_B_SCO_BUSY BIT(4) ++#define BT_INFO_8192E_2ANT_B_ACL_BUSY BIT(3) ++#define BT_INFO_8192E_2ANT_B_INQ_PAGE BIT(2) ++#define BT_INFO_8192E_2ANT_B_SCO_ESCO BIT(1) ++#define BT_INFO_8192E_2ANT_B_CONNECTION BIT(0) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT 2 ++ ++enum bt_info_src_8192e_2ant { ++ BT_INFO_SRC_8192E_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8192E_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8192E_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8192E_2ANT_MAX ++}; ++ ++enum bt_8192e_2ant_bt_status { ++ BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8192E_2ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8192E_2ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8192E_2ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8192E_2ANT_BT_STATUS_MAX ++}; ++ ++enum bt_8192e_2ant_coex_algo { ++ BT_8192E_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8192E_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8192E_2ANT_COEX_ALGO_SCO_PAN = 0x2, ++ BT_8192E_2ANT_COEX_ALGO_HID = 0x3, ++ BT_8192E_2ANT_COEX_ALGO_A2DP = 0x4, ++ BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS = 0x5, ++ BT_8192E_2ANT_COEX_ALGO_PANEDR = 0x6, ++ BT_8192E_2ANT_COEX_ALGO_PANHS = 0x7, ++ BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8, ++ BT_8192E_2ANT_COEX_ALGO_PANEDR_HID = 0x9, ++ BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa, ++ BT_8192E_2ANT_COEX_ALGO_HID_A2DP = 0xb, ++ BT_8192E_2ANT_COEX_ALGO_MAX = 0xc ++}; ++ ++struct coex_dm_8192e_2ant { ++ /* fw mechanism */ ++ u8 pre_bt_dec_pwr_lvl; ++ u8 cur_bt_dec_pwr_lvl; ++ u8 pre_fw_dac_swing_lvl; ++ u8 cur_fw_dac_swing_lvl; ++ boolean cur_ignore_wlan_act; ++ boolean pre_ignore_wlan_act; ++ u8 pre_ps_tdma; ++ u8 cur_ps_tdma; ++ u8 ps_tdma_para[5]; ++ u8 ps_tdma_du_adj_type; ++ boolean reset_tdma_adjust; ++ boolean auto_tdma_adjust; ++ boolean pre_ps_tdma_on; ++ boolean cur_ps_tdma_on; ++ boolean pre_bt_auto_report; ++ boolean cur_bt_auto_report; ++ ++ /* sw mechanism */ ++ boolean pre_rf_rx_lpf_shrink; ++ boolean cur_rf_rx_lpf_shrink; ++ u32 bt_rf_0x1e_backup; ++ boolean pre_low_penalty_ra; ++ boolean cur_low_penalty_ra; ++ boolean pre_dac_swing_on; ++ u32 pre_dac_swing_lvl; ++ boolean cur_dac_swing_on; ++ u32 cur_dac_swing_lvl; ++ boolean pre_adc_back_off; ++ boolean cur_adc_back_off; ++ boolean pre_agc_table_en; ++ boolean cur_agc_table_en; ++ u32 pre_val0x6c0; ++ u32 cur_val0x6c0; ++ u32 pre_val0x6c4; ++ u32 cur_val0x6c4; ++ u32 pre_val0x6c8; ++ u32 cur_val0x6c8; ++ u8 pre_val0x6cc; ++ u8 cur_val0x6cc; ++ boolean limited_dig; ++ ++ u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */ ++ u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */ ++ u16 backup_retry_limit; ++ u8 backup_ampdu_max_time; ++ ++ /* algorithm related */ ++ u8 pre_algorithm; ++ u8 cur_algorithm; ++ u8 bt_status; ++ u8 wifi_chnl_info[3]; ++ ++ u8 pre_ss_type; ++ u8 cur_ss_type; ++ ++ u32 pre_ra_mask; ++ u32 cur_ra_mask; ++ u8 cur_ra_mask_type; ++ u8 pre_arfr_type; ++ u8 cur_arfr_type; ++ u8 pre_retry_limit_type; ++ u8 cur_retry_limit_type; ++ u8 pre_ampdu_time_type; ++ u8 cur_ampdu_time_type; ++}; ++ ++struct coex_sta_8192e_2ant { ++ boolean bt_disabled; ++ boolean bt_link_exist; ++ boolean sco_exist; ++ boolean a2dp_exist; ++ boolean hid_exist; ++ boolean pan_exist; ++ ++ boolean under_lps; ++ boolean under_ips; ++ u32 high_priority_tx; ++ u32 high_priority_rx; ++ u32 low_priority_tx; ++ u32 low_priority_rx; ++ u8 bt_rssi; ++ u8 pre_bt_rssi_state; ++ u8 pre_wifi_rssi_state[4]; ++ boolean c2h_bt_info_req_sent; ++ u8 bt_info_c2h[BT_INFO_SRC_8192E_2ANT_MAX][10]; ++ u32 bt_info_c2h_cnt[BT_INFO_SRC_8192E_2ANT_MAX]; ++ boolean c2h_bt_inquiry_page; ++ u8 bt_retry_cnt; ++ u8 bt_info_ext; ++}; ++ ++/* ******************************************* ++ * The following is interface which will notify coex module. ++ * ******************************************* */ ++void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist); ++void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only); ++void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist); ++void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length); ++void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist); ++void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist); ++void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist); ++ ++#else /* #if (RTL8192E_SUPPORT == 1) */ ++#define ex_halbtc8192e2ant_power_on_setting(btcoexist) ++#define ex_halbtc8192e2ant_init_hw_config(btcoexist, wifi_only) ++#define ex_halbtc8192e2ant_init_coex_dm(btcoexist) ++#define ex_halbtc8192e2ant_ips_notify(btcoexist, type) ++#define ex_halbtc8192e2ant_lps_notify(btcoexist, type) ++#define ex_halbtc8192e2ant_scan_notify(btcoexist, type) ++#define ex_halbtc8192e2ant_connect_notify(btcoexist, type) ++#define ex_halbtc8192e2ant_media_status_notify(btcoexist, type) ++#define ex_halbtc8192e2ant_specific_packet_notify(btcoexist, type) ++#define ex_halbtc8192e2ant_bt_info_notify(btcoexist, tmp_buf, length) ++#define ex_halbtc8192e2ant_halt_notify(btcoexist) ++#define ex_halbtc8192e2ant_periodical(btcoexist) ++#define ex_halbtc8192e2ant_display_coex_info(btcoexist) ++ ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b1Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b1Ant.c +new file mode 100644 +index 0000000..9d610e3 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b1Ant.c +@@ -0,0 +1,4874 @@ ++/* ************************************************************ ++ * Description: ++ * ++ * This file is for RTL8703B Co-exist mechanism ++ * ++ * History ++ * 2012/11/15 Cosa first check in. ++ * ++ * ************************************************************ */ ++ ++/* ************************************************************ ++ * include files ++ * ************************************************************ */ ++#include "Mp_Precomp.h" ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8703B_SUPPORT == 1) ++/* ************************************************************ ++ * Global variables, these are static variables ++ * ************************************************************ */ ++static u8 *trace_buf = &gl_btc_trace_buf[0]; ++static struct coex_dm_8703b_1ant glcoex_dm_8703b_1ant; ++static struct coex_dm_8703b_1ant *coex_dm = &glcoex_dm_8703b_1ant; ++static struct coex_sta_8703b_1ant glcoex_sta_8703b_1ant; ++static struct coex_sta_8703b_1ant *coex_sta = &glcoex_sta_8703b_1ant; ++static struct psdscan_sta_8703b_1ant gl_psd_scan_8703b_1ant; ++static struct psdscan_sta_8703b_1ant *psd_scan = &gl_psd_scan_8703b_1ant; ++ ++ ++const char *const glbt_info_src_8703b_1ant[] = { ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u32 glcoex_ver_date_8703b_1ant = 20151106; ++u32 glcoex_ver_8703b_1ant = 0x05; ++ ++/* ************************************************************ ++ * local function proto type if needed ++ * ************************************************************ ++ * ************************************************************ ++ * local function start with halbtc8703b1ant_ ++ * ************************************************************ */ ++u8 halbtc8703b1ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1) ++{ ++ s32 bt_rssi = 0; ++ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; ++ ++ bt_rssi = coex_sta->bt_rssi; ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Rssi thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_bt_rssi_state; ++ } ++ ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (bt_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (bt_rssi < rssi_thresh1) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_bt_rssi_state = bt_rssi_state; ++ ++ return bt_rssi_state; ++} ++ ++u8 halbtc8703b1ant_wifi_rssi_state(IN struct btc_coexist *btcoexist, ++ IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1) ++{ ++ s32 wifi_rssi = 0; ++ u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi RSSI thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_wifi_rssi_state[index]; ++ } ++ ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (wifi_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (wifi_rssi < rssi_thresh1) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; ++ ++ return wifi_rssi_state; ++} ++ ++void halbtc8703b1ant_update_ra_mask(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 dis_rate_mask) ++{ ++ coex_dm->cur_ra_mask = dis_rate_mask; ++ ++ if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, ++ &coex_dm->cur_ra_mask); ++ coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; ++} ++ ++void halbtc8703b1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ boolean wifi_under_b_mode = false; ++ ++ coex_dm->cur_arfr_type = type; ++ ++ if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { ++ switch (coex_dm->cur_arfr_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_4byte(btcoexist, 0x430, ++ coex_dm->backup_arfr_cnt1); ++ btcoexist->btc_write_4byte(btcoexist, 0x434, ++ coex_dm->backup_arfr_cnt2); ++ break; ++ case 1: ++ btcoexist->btc_get(btcoexist, ++ BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x01010101); ++ } else { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; ++} ++ ++void halbtc8703b1ant_retry_limit(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_retry_limit_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_retry_limit_type != ++ coex_dm->cur_retry_limit_type)) { ++ switch (coex_dm->cur_retry_limit_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ coex_dm->backup_retry_limit); ++ break; ++ case 1: /* retry limit=8 */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; ++} ++ ++void halbtc8703b1ant_ampdu_max_time(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_ampdu_time_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) { ++ switch (coex_dm->cur_ampdu_time_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ coex_dm->backup_ampdu_max_time); ++ break; ++ case 1: /* AMPDU timw = 0x38 * 32us */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; ++} ++ ++void halbtc8703b1ant_limited_tx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type, ++ IN u8 retry_limit_type, IN u8 ampdu_time_type) ++{ ++ switch (ra_mask_type) { ++ case 0: /* normal mode */ ++ halbtc8703b1ant_update_ra_mask(btcoexist, force_exec, ++ 0x0); ++ break; ++ case 1: /* disable cck 1/2 */ ++ halbtc8703b1ant_update_ra_mask(btcoexist, force_exec, ++ 0x00000003); ++ break; ++ case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ ++ halbtc8703b1ant_update_ra_mask(btcoexist, force_exec, ++ 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8703b1ant_auto_rate_fallback_retry(btcoexist, force_exec, ++ arfr_type); ++ halbtc8703b1ant_retry_limit(btcoexist, force_exec, retry_limit_type); ++ halbtc8703b1ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type); ++} ++ ++void halbtc8703b1ant_limited_rx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rej_ap_agg_pkt, ++ IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size) ++{ ++ boolean reject_rx_agg = rej_ap_agg_pkt; ++ boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; ++ u8 rx_agg_size = agg_buf_size; ++ ++ /* ============================================ */ ++ /* Rx Aggregation related setting */ ++ /* ============================================ */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ &reject_rx_agg); ++ /* decide BT control aggregation buf size or not */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ &bt_ctrl_rx_agg_size); ++ /* aggregation buf size, only work when BT control Rx aggregation size. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); ++ /* real update aggregation setting */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++void halbtc8703b1ant_query_bt_info(IN struct btc_coexist *btcoexist) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ coex_sta->c2h_bt_info_req_sent = true; ++ ++ h2c_parameter[0] |= BIT(0); /* trigger */ ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); ++} ++ ++void halbtc8703b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist) ++{ ++ u32 reg_hp_txrx, reg_lp_txrx, u32tmp; ++ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; ++ static u8 num_of_bt_counter_chk = 0; ++ ++ /* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */ ++ /* if (! (btcoexist->btc_read_1byte(btcoexist, 0x76e) & 0x8) ) */ ++ ++ if (coex_sta->under_ips) { ++ /* coex_sta->high_priority_tx = 65535; */ ++ /* coex_sta->high_priority_rx = 65535; */ ++ /* coex_sta->low_priority_tx = 65535; */ ++ /* coex_sta->low_priority_rx = 65535; */ ++ /* return; */ ++ } ++ ++ reg_hp_txrx = 0x770; ++ reg_lp_txrx = 0x774; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); ++ reg_hp_tx = u32tmp & MASKLWORD; ++ reg_hp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); ++ reg_lp_tx = u32tmp & MASKLWORD; ++ reg_lp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ coex_sta->high_priority_tx = reg_hp_tx; ++ coex_sta->high_priority_rx = reg_hp_rx; ++ coex_sta->low_priority_tx = reg_lp_tx; ++ coex_sta->low_priority_rx = reg_lp_rx; ++ ++ if ((coex_sta->low_priority_tx > 1150) && ++ (!coex_sta->c2h_bt_inquiry_page)) ++ coex_sta->pop_event_cnt++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", ++ reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx); ++ BTC_TRACE(trace_buf); ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); ++ ++ if ((reg_hp_tx == 0) && (reg_hp_rx == 0) && (reg_lp_tx == 0) && ++ (reg_lp_rx == 0)) { ++ num_of_bt_counter_chk++; ++ if (num_of_bt_counter_chk >= 3) { ++ halbtc8703b1ant_query_bt_info(btcoexist); ++ num_of_bt_counter_chk = 0; ++ } ++ } ++} ++ ++ ++void halbtc8703b1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist) ++{ ++ s32 wifi_rssi = 0; ++ boolean wifi_busy = false, wifi_under_b_mode = false; ++ static u8 cck_lock_counter = 0; ++ u32 total_cnt; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ ++ if (coex_sta->under_ips) { ++ coex_sta->crc_ok_cck = 0; ++ coex_sta->crc_ok_11g = 0; ++ coex_sta->crc_ok_11n = 0; ++ coex_sta->crc_ok_11n_agg = 0; ++ ++ coex_sta->crc_err_cck = 0; ++ coex_sta->crc_err_11g = 0; ++ coex_sta->crc_err_11n = 0; ++ coex_sta->crc_err_11n_agg = 0; ++ } else { ++ coex_sta->crc_ok_cck = btcoexist->btc_read_4byte(btcoexist, ++ 0xf88); ++ coex_sta->crc_ok_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf94); ++ coex_sta->crc_ok_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf90); ++ coex_sta->crc_ok_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xfb8); ++ ++ coex_sta->crc_err_cck = btcoexist->btc_read_4byte(btcoexist, ++ 0xf84); ++ coex_sta->crc_err_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf96); ++ coex_sta->crc_err_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf92); ++ coex_sta->crc_err_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xfba); ++ } ++ ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x1); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x0); ++ ++ if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) { ++ total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g + ++ coex_sta->crc_ok_11n + ++ coex_sta->crc_ok_11n_agg; ++ ++ if ((coex_dm->bt_status == BT_8703B_1ANT_BT_STATUS_ACL_BUSY) || ++ (coex_dm->bt_status == ++ BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY) || ++ (coex_dm->bt_status == ++ BT_8703B_1ANT_BT_STATUS_SCO_BUSY)) { ++ if (coex_sta->crc_ok_cck > (total_cnt - ++ coex_sta->crc_ok_cck)) { ++ if (cck_lock_counter < 3) ++ cck_lock_counter++; ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ ++ if (!coex_sta->pre_ccklock) { ++ ++ if (cck_lock_counter >= 3) ++ coex_sta->cck_lock = true; ++ else ++ coex_sta->cck_lock = false; ++ } else { ++ if (cck_lock_counter == 0) ++ coex_sta->cck_lock = false; ++ else ++ coex_sta->cck_lock = true; ++ } ++ ++ if (coex_sta->cck_lock) ++ coex_sta->cck_ever_lock = true; ++ ++ coex_sta->pre_ccklock = coex_sta->cck_lock; ++ ++ ++} ++ ++boolean halbtc8703b1ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist) ++{ ++ static boolean pre_wifi_busy = false, pre_under_4way = false, ++ pre_bt_hs_on = false; ++ boolean wifi_busy = false, under_4way = false, bt_hs_on = false; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ ++ if (wifi_connected) { ++ if (wifi_busy != pre_wifi_busy) { ++ pre_wifi_busy = wifi_busy; ++ return true; ++ } ++ if (under_4way != pre_under_4way) { ++ pre_under_4way = under_4way; ++ return true; ++ } ++ if (bt_hs_on != pre_bt_hs_on) { ++ pre_bt_hs_on = bt_hs_on; ++ return true; ++ } ++ } ++ ++ return false; ++} ++ ++void halbtc8703b1ant_update_bt_link_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ bt_link_info->bt_link_exist = coex_sta->bt_link_exist; ++ bt_link_info->sco_exist = coex_sta->sco_exist; ++ bt_link_info->a2dp_exist = coex_sta->a2dp_exist; ++ bt_link_info->pan_exist = coex_sta->pan_exist; ++ bt_link_info->hid_exist = coex_sta->hid_exist; ++ bt_link_info->bt_hi_pri_link_exist = coex_sta->bt_hi_pri_link_exist; ++ ++ /* work around for HS mode. */ ++ if (bt_hs_on) { ++ bt_link_info->pan_exist = true; ++ bt_link_info->bt_link_exist = true; ++ } ++ ++ /* check if Sco only */ ++ if (bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->sco_only = true; ++ else ++ bt_link_info->sco_only = false; ++ ++ /* check if A2dp only */ ++ if (!bt_link_info->sco_exist && ++ bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->a2dp_only = true; ++ else ++ bt_link_info->a2dp_only = false; ++ ++ /* check if Pan only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->pan_only = true; ++ else ++ bt_link_info->pan_only = false; ++ ++ /* check if Hid only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ bt_link_info->hid_exist) ++ bt_link_info->hid_only = true; ++ else ++ bt_link_info->hid_only = false; ++} ++ ++void halbtc8703b1ant_UpdateWifiChannelInfo(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u8 h2c_parameter[3] = {0}; ++ u32 wifi_bw; ++ u8 wifi_central_chnl; ++ ++ /* only 2.4G we need to inform bt the chnl mask */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ &wifi_central_chnl); ++ if ((BTC_MEDIA_CONNECT == type) && ++ (wifi_central_chnl <= 14)) { ++ h2c_parameter[0] = ++ 0x1; /* enable BT AFH skip WL channel for 8703b because BT Rx LO interference */ ++ /* h2c_parameter[0] = 0x0; */ ++ h2c_parameter[1] = wifi_central_chnl; ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ h2c_parameter[2] = 0x30; ++ else ++ h2c_parameter[2] = 0x20; ++ } ++ ++ coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; ++ coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; ++ coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); ++ ++} ++ ++u8 halbtc8703b1ant_action_algorithm(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ u8 algorithm = BT_8703B_1ANT_COEX_ALGO_UNDEFINED; ++ u8 num_of_diff_profile = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ if (!bt_link_info->bt_link_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], No BT link exists!!!\n"); ++ BTC_TRACE(trace_buf); ++ return algorithm; ++ } ++ ++ if (bt_link_info->sco_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->hid_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->pan_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->a2dp_exist) ++ num_of_diff_profile++; ++ ++ if (num_of_diff_profile == 1) { ++ if (bt_link_info->sco_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; ++ } else { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_A2DP; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = PAN(HS) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = PAN(EDR) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 2) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile >= 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++void halbtc8703b1ant_set_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean enable_auto_report) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = 0; ++ ++ if (enable_auto_report) ++ h2c_parameter[0] |= BIT(0); ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); ++} ++ ++void halbtc8703b1ant_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable_auto_report) ++{ ++ coex_dm->cur_bt_auto_report = enable_auto_report; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) ++ return; ++ } ++ halbtc8703b1ant_set_bt_auto_report(btcoexist, ++ coex_dm->cur_bt_auto_report); ++ ++ coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; ++} ++ ++void halbtc8703b1ant_WriteScoreBoard( ++ IN struct btc_coexist *btcoexist, ++ IN u16 scoreboardval ++) ++{ ++ u16 val; ++ ++ val = (scoreboardval & 0x7fff) | 0x8000; ++ ++ btcoexist->btc_write_2byte(btcoexist, 0xaa, val); ++ ++#if 0 ++ u8 h2c_parameter[3] = {0, 0, 0}; ++ ++ ++ /* write "Set Status" */ ++ h2c_parameter[0] = 0x2; ++ ++ /* write score board 15-bit value to H2C parameter */ ++ h2c_parameter[1] = scoreboardval & 0xff; ++ h2c_parameter[2] = (scoreboardval & 0x7f00) >> 8; ++ ++ /* Set Interrupt to BT */ ++ h2c_parameter[2] = h2c_parameter[2] | 0x80; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x71, 3, h2c_parameter); ++ ++#endif ++} ++ ++void halbtc8703b1ant_ReadScoreBoard( ++ IN struct btc_coexist *btcoexist, ++ IN u16 *score_board_val ++) ++{ ++ ++ *score_board_val = (btcoexist->btc_read_2byte(btcoexist, ++ 0xaa)) & 0x7fff; ++ ++ ++ ++#if 0 ++ u8 h2c_parameter[3] = {0, 0, 0}; ++ ++ /* write "Get Status" */ ++ h2c_parameter[0] = 0x1; ++ ++ ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x71, 3, h2c_parameter); ++ ++ /* the BT Scoreboard will be returned by C2H from ex_halbtc8703b1ant_ScoreBoardStatusNotify() */ ++#endif ++} ++ ++void halbtc8703b1ant_PostActiveStateToBT( ++ IN struct btc_coexist *btcoexist, ++ IN boolean wifi_active ++) ++{ ++ ++ if (wifi_active) ++ halbtc8703b1ant_WriteScoreBoard(btcoexist, 0x0001); ++ else ++ halbtc8703b1ant_WriteScoreBoard(btcoexist, 0x0000); ++ ++ /* The BT should set "No Shunt-down" mode if WL = Active for BT Synthesizer on/off interference WL Lo issue at 8703b b-cut. */ ++ ++} ++ ++void halbtc8703b1ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist ++ *btcoexist, IN boolean low_penalty_ra) ++{ ++ u8 h2c_parameter[6] = {0}; ++ ++ h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */ ++ ++ if (low_penalty_ra) { ++ h2c_parameter[1] |= BIT(0); ++ h2c_parameter[2] = ++ 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */ ++ h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */ ++ h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */ ++ h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter); ++} ++ ++void halbtc8703b1ant_low_penalty_ra(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean low_penalty_ra) ++{ ++ coex_dm->cur_low_penalty_ra = low_penalty_ra; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) ++ return; ++ } ++ halbtc8703b1ant_set_sw_penalty_tx_rate_adaptive(btcoexist, ++ coex_dm->cur_low_penalty_ra); ++ ++ coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; ++} ++ ++u32 halbtc8703b1ant_LTECoex_InDirectReadReg(IN struct btc_coexist *btcoexist, ++ IN u16 reg_addr) ++{ ++ u32 j = 0; ++ ++ ++ /* wait for ready bit before access 0x7c0 */ ++ btcoexist->btc_write_4byte(btcoexist, 0x7c0, 0x800F0000 | reg_addr); ++ ++ do { ++ j++; ++ } while (((btcoexist->btc_read_1byte(btcoexist, ++ 0x7c3) & BIT(5)) == 0) && ++ (j < BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT)); ++ ++ ++ return btcoexist->btc_read_4byte(btcoexist, ++ 0x7c8); /* get read data */ ++ ++} ++ ++void halbtc8703b1ant_LTECoex_InDirectWriteReg(IN struct btc_coexist *btcoexist, ++ IN u16 reg_addr, IN u32 bit_mask, IN u32 reg_value) ++{ ++ u32 val, i = 0, j = 0, bitpos = 0; ++ ++ ++ if (bit_mask == 0x0) ++ return; ++ if (bit_mask == 0xffffffff) { ++ btcoexist->btc_write_4byte(btcoexist, 0x7c4, ++ reg_value); /* put write data */ ++ ++ /* wait for ready bit before access 0x7c0 */ ++ do { ++ j++; ++ } while (((btcoexist->btc_read_1byte(btcoexist, ++ 0x7c3) & BIT(5)) == 0) && ++ (j < BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT)); ++ ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x7c0, ++ 0xc00F0000 | reg_addr); ++ } else { ++ for (i = 0; i <= 31; i++) { ++ if (((bit_mask >> i) & 0x1) == 0x1) { ++ bitpos = i; ++ break; ++ } ++ } ++ ++ /* read back register value before write */ ++ val = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, ++ reg_addr); ++ val = (val & (~bit_mask)) | (reg_value << bitpos); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x7c4, ++ val); /* put write data */ ++ ++ /* wait for ready bit before access 0x7c0 */ ++ do { ++ j++; ++ } while (((btcoexist->btc_read_1byte(btcoexist, ++ 0x7c3) & BIT(5)) == 0) && ++ (j < BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT)); ++ ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x7c0, ++ 0xc00F0000 | reg_addr); ++ ++ } ++ ++} ++ ++void halbtc8703b1ant_LTECoex_Enable(IN struct btc_coexist *btcoexist, ++ IN boolean enable) ++{ ++ u8 val; ++ ++ val = (enable) ? 1 : 0; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(btcoexist, 0x38, 0x80, ++ val); /* 0x38[7] */ ++ ++} ++ ++void halbtc8703b1ant_LTECoex_PathControlOwner(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_control) ++{ ++ u8 val; ++ ++ val = (wifi_control) ? 1 : 0; ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x4, ++ val); /* 0x70[26] */ ++ ++} ++ ++void halbtc8703b1ant_LTECoex_set_GNT_BT(IN struct btc_coexist *btcoexist, ++ IN u8 control_block, IN boolean sw_control, IN u8 state) ++{ ++ u32 val = 0, bit_mask; ++ ++ state = state & 0x1; ++ val = (sw_control) ? ((state << 1) | 0x1) : 0; ++ ++ switch (control_block) { ++ case BT_8703B_1ANT_GNT_BLOCK_RFC_BB: ++ default: ++ bit_mask = 0xc000; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(btcoexist, ++ 0x38, bit_mask, val); /* 0x38[15:14] */ ++ bit_mask = 0x0c00; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(btcoexist, ++ 0x38, bit_mask, val); /* 0x38[11:10] */ ++ break; ++ case BT_8703B_1ANT_GNT_BLOCK_RFC: ++ bit_mask = 0xc000; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(btcoexist, ++ 0x38, bit_mask, val); /* 0x38[15:14] */ ++ break; ++ case BT_8703B_1ANT_GNT_BLOCK_BB: ++ bit_mask = 0x0c00; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(btcoexist, ++ 0x38, bit_mask, val); /* 0x38[11:10] */ ++ break; ++ ++ } ++ ++} ++ ++void halbtc8703b1ant_LTECoex_set_GNT_WL(IN struct btc_coexist *btcoexist, ++ IN u8 control_block, IN boolean sw_control, IN u8 state) ++{ ++ u32 val = 0, bit_mask; ++ ++ state = state & 0x1; ++ val = (sw_control) ? ((state << 1) | 0x1) : 0; ++ ++ switch (control_block) { ++ case BT_8703B_1ANT_GNT_BLOCK_RFC_BB: ++ default: ++ bit_mask = 0x3000; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(btcoexist, ++ 0x38, bit_mask, val); /* 0x38[13:12] */ ++ bit_mask = 0x0300; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(btcoexist, ++ 0x38, bit_mask, val); /* 0x38[9:8] */ ++ break; ++ case BT_8703B_1ANT_GNT_BLOCK_RFC: ++ bit_mask = 0x3000; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(btcoexist, ++ 0x38, bit_mask, val); /* 0x38[13:12] */ ++ break; ++ case BT_8703B_1ANT_GNT_BLOCK_BB: ++ bit_mask = 0x0300; ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(btcoexist, ++ 0x38, bit_mask, val); /* 0x38[9:8] */ ++ break; ++ ++ } ++ ++} ++ ++void halbtc8703b1ant_LTECoex_set_coex_table(IN struct btc_coexist *btcoexist, ++ IN u8 table_type, IN u16 table_content) ++{ ++ u16 reg_addr = 0x0000; ++ ++ switch (table_type) { ++ case BT_8703B_1ANT_CTT_WL_VS_LTE: ++ reg_addr = 0xa0; ++ break; ++ case BT_8703B_1ANT_CTT_BT_VS_LTE: ++ reg_addr = 0xa4; ++ break; ++ } ++ ++ if (reg_addr != 0x0000) ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(btcoexist, reg_addr, ++ 0xffff, table_content); /* 0xa0[15:0] or 0xa4[15:0] */ ++ ++ ++} ++ ++ ++void halbtc8703b1ant_LTECoex_set_BreakTable(IN struct btc_coexist *btcoexist, ++ IN u8 table_type, IN u8 table_content) ++{ ++ u16 reg_addr = 0x0000; ++ ++ switch (table_type) { ++ case BT_8703B_1ANT_LBTT_WL_BREAK_LTE: ++ reg_addr = 0xa8; ++ break; ++ case BT_8703B_1ANT_LBTT_BT_BREAK_LTE: ++ reg_addr = 0xac; ++ break; ++ case BT_8703B_1ANT_LBTT_LTE_BREAK_WL: ++ reg_addr = 0xb0; ++ break; ++ case BT_8703B_1ANT_LBTT_LTE_BREAK_BT: ++ reg_addr = 0xb4; ++ break; ++ } ++ ++ if (reg_addr != 0x0000) ++ halbtc8703b1ant_LTECoex_InDirectWriteReg(btcoexist, reg_addr, ++ 0xff, table_content); /* 0xa8[15:0] or 0xb4[15:0] */ ++ ++ ++} ++ ++void halbtc8703b1ant_set_coex_table(IN struct btc_coexist *btcoexist, ++ IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); ++} ++ ++void halbtc8703b1ant_coex_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4, ++ IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ coex_dm->cur_val0x6c0 = val0x6c0; ++ coex_dm->cur_val0x6c4 = val0x6c4; ++ coex_dm->cur_val0x6c8 = val0x6c8; ++ coex_dm->cur_val0x6cc = val0x6cc; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && ++ (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && ++ (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && ++ (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) ++ return; ++ } ++ halbtc8703b1ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, ++ val0x6cc); ++ ++ coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; ++ coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; ++ coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; ++ coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; ++} ++ ++void halbtc8703b1ant_coex_table_with_type(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ u32 break_table; ++ u8 select_table; ++ ++ coex_sta->coex_table_type = type; ++ ++ if (coex_sta->concurrent_rx_mode_on == true) { ++ break_table = 0xf0ffffff; /* set WL hi-pri can break BT */ ++ select_table = ++ 0xb; /* set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) */ ++ } else { ++ break_table = 0xffffff; ++ select_table = 0x3; ++ } ++ ++ switch (type) { ++ case 0: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x55555555, break_table, ++ select_table); ++ break; ++ case 1: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5a5a5a5a, break_table, ++ select_table); ++ break; ++ case 2: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0xaa5a5a5a, 0xaa5a5a5a, break_table, ++ select_table); ++ break; ++ case 3: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0xaa555555, 0xaa5a5a5a, break_table, ++ select_table); ++ break; ++ case 4: ++ /* if ( (coex_sta->cck_ever_lock) && (coex_sta->scan_ap_num <= 5) ) */ ++ /* halbtc8703b1ant_coex_table(btcoexist, force_exec, 0xaa555555, 0xaaaa5a5a, break_table, select_table); */ ++ /* else */ ++ halbtc8703b1ant_coex_table(btcoexist, ++ force_exec, 0xaa555555, 0xaa5a5a5a, ++ break_table, select_table); ++ break; ++ case 5: ++ /* if ( (coex_sta->cck_ever_lock) && (coex_sta->scan_ap_num <= 5) ) */ ++ /* halbtc8703b1ant_coex_table(btcoexist, force_exec, 0xaa555555, 0xaaaa5a5a, break_table, select_table); */ ++ /* else */ ++ halbtc8703b1ant_coex_table(btcoexist, ++ force_exec, 0x5a5a5a5a, 0x5a5a5a5a, ++ break_table, select_table); ++ break; ++ case 6: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0xaaaaaaaa, break_table, ++ select_table); ++ break; ++ case 7: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0xaaaaaaaa, 0xaaaaaaaa, break_table, ++ select_table); ++ break; ++ case 8: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, break_table, ++ select_table); ++ break; ++ case 9: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, break_table, ++ select_table); ++ break; ++ case 10: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, break_table, ++ select_table); ++ break; ++ case 11: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, break_table, ++ select_table); ++ break; ++ case 12: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, break_table, ++ select_table); ++ break; ++ case 13: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0x5fff5fff, 0xaaaaaaaa, break_table, ++ select_table); ++ break; ++ case 14: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0x5fff5fff, 0x5ada5ada, break_table, ++ select_table); ++ break; ++ case 15: ++ halbtc8703b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0xaaaaaaaa, break_table, ++ select_table); ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8703b1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean enable) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ if (enable) { ++ h2c_parameter[0] |= BIT(0); /* function enable */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); ++} ++ ++void halbtc8703b1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable) ++{ ++ coex_dm->cur_ignore_wlan_act = enable; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_ignore_wlan_act == ++ coex_dm->cur_ignore_wlan_act) ++ return; ++ } ++ halbtc8703b1ant_set_fw_ignore_wlan_act(btcoexist, enable); ++ ++ coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; ++} ++ ++void halbtc8703b1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN u8 lps_val, IN u8 rpwm_val) ++{ ++ u8 lps = lps_val; ++ u8 rpwm = rpwm_val; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps); ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++void halbtc8703b1ant_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ coex_dm->cur_lps = lps_val; ++ coex_dm->cur_rpwm = rpwm_val; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_lps == coex_dm->cur_lps) && ++ (coex_dm->pre_rpwm == coex_dm->cur_rpwm)) ++ return; ++ } ++ halbtc8703b1ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val); ++ ++ coex_dm->pre_lps = coex_dm->cur_lps; ++ coex_dm->pre_rpwm = coex_dm->cur_rpwm; ++} ++ ++void halbtc8703b1ant_sw_mechanism(IN struct btc_coexist *btcoexist, ++ IN boolean low_penalty_ra) ++{ ++ halbtc8703b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); ++} ++ ++void halbtc8703b1ant_set_ant_path(IN struct btc_coexist *btcoexist, ++ IN u8 ant_pos_type, IN boolean force_exec, IN boolean init_hwcfg, ++ IN boolean wifi_off) ++{ ++ u32 cnt_bt_cal_chk = 0; ++ boolean is_in_mp_mode = false; ++ u8 u8tmp = 0; ++ u32 u32tmp1 = 0, u32tmp2 = 0; ++ ++ coex_dm->cur_ant_pos_type = ant_pos_type; ++ ++#if 1 ++ u32tmp1 = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, ++ 0x38); ++ u32tmp2 = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, ++ 0x54); ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x73); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** (Before Ant Setup) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", ++ u8tmp, u32tmp1, u32tmp2); ++ BTC_TRACE(trace_buf); ++#endif ++ ++ if (init_hwcfg) { ++ /* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */ ++ halbtc8703b1ant_LTECoex_Enable(btcoexist, 0x0); ++ ++ /* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */ ++ halbtc8703b1ant_LTECoex_set_coex_table(btcoexist, ++ BT_8703B_1ANT_CTT_WL_VS_LTE, 0xffff); ++ ++ /* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */ ++ halbtc8703b1ant_LTECoex_set_coex_table(btcoexist, ++ BT_8703B_1ANT_CTT_BT_VS_LTE, 0xffff); ++ ++ /* Wait If BT IQK running, because Path control owner is at BT during BT IQK (setup by WiFi firmware) */ ++ while (cnt_bt_cal_chk <= 20) { ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, ++ 0x49d); ++ cnt_bt_cal_chk++; ++ if (u8tmp & BIT(0)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n", ++ cnt_bt_cal_chk); ++ BTC_TRACE(trace_buf); ++ delay_ms(50); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n", ++ cnt_bt_cal_chk); ++ BTC_TRACE(trace_buf); ++ break; ++ } ++ } ++ ++ /* set Path control owner to WL at initial step */ ++ halbtc8703b1ant_LTECoex_PathControlOwner(btcoexist, ++ BT_8703B_1ANT_PCO_WLSIDE); ++ ++ /* set GNT_BT to SW high */ ++ halbtc8703b1ant_LTECoex_set_GNT_BT(btcoexist, ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, ++ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); ++ /* Set GNT_WL to SW low */ ++ halbtc8703b1ant_LTECoex_set_GNT_WL(btcoexist, ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, ++ BT_8703B_1ANT_SIG_STA_SET_TO_LOW); ++ ++ } else if (wifi_off) { ++ /* Disable LTE Coex Function in WiFi side */ ++ halbtc8703b1ant_LTECoex_Enable(btcoexist, 0x0); ++ ++ /* set Path control owner to BT */ ++ halbtc8703b1ant_LTECoex_PathControlOwner(btcoexist, ++ BT_8703B_1ANT_PCO_BTSIDE); ++ } else { ++ ++ halbtc8703b1ant_LTECoex_PathControlOwner(btcoexist, ++ BT_8703B_1ANT_PCO_WLSIDE); ++ ++ ++ if (force_exec || ++ (coex_dm->cur_ant_pos_type != coex_dm->pre_ant_pos_type) || ++ init_hwcfg || wifi_off) { ++ /* internal switch setting */ ++ switch (ant_pos_type) { ++ case BTC_ANT_PATH_WIFI: ++ /* set GNT_BT to low */ ++ halbtc8703b1ant_LTECoex_set_GNT_BT(btcoexist, ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, ++ BT_8703B_1ANT_SIG_STA_SET_TO_LOW); ++ /* Set GNT_WL to high */ ++ halbtc8703b1ant_LTECoex_set_GNT_WL(btcoexist, ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, ++ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); ++ break; ++ case BTC_ANT_PATH_BT: ++ /*halbtc8703b1ant_LTECoex_PathControlOwner( ++ btcoexist, BT_8703B_1ANT_PCO_BTSIDE);*/ ++ /* set GNT_BT to high */ ++ halbtc8703b1ant_LTECoex_set_GNT_BT(btcoexist, ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, ++ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); ++ /* Set GNT_WL to low */ ++ halbtc8703b1ant_LTECoex_set_GNT_WL(btcoexist, ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, ++ BT_8703B_1ANT_SIG_STA_SET_TO_LOW); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ /* set GNT_BT to PTA */ ++ halbtc8703b1ant_LTECoex_set_GNT_BT(btcoexist, ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA, ++ BT_8703B_1ANT_SIG_STA_SET_BY_HW); ++ /* Set GNT_WL to PTA */ ++ halbtc8703b1ant_LTECoex_set_GNT_WL(btcoexist, ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA, ++ BT_8703B_1ANT_SIG_STA_SET_BY_HW); ++ break; ++ } ++ } ++ } ++ ++#if 1 ++ u32tmp1 = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, 0x38); ++ u32tmp2 = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, 0x54); ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x73); ++ ++ if (init_hwcfg) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** (After Ant-Setup Init) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", ++ u8tmp, u32tmp1, u32tmp2); ++ BTC_TRACE(trace_buf); ++ } else if (wifi_off) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** (After Ant-Setup WiFi off) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", ++ u8tmp, u32tmp1, u32tmp2); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** (After Ant-Setup Run time) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", ++ u8tmp, u32tmp1, u32tmp2); ++ BTC_TRACE(trace_buf); ++ } ++#endif ++ ++ coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type; ++} ++ ++ ++void halbtc8703b1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist, ++ IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5) ++{ ++ u8 h2c_parameter[5] = {0}; ++ u8 real_byte1 = byte1, real_byte5 = byte5; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ if (ap_enable) { ++ if (byte1 & BIT(4) && !(byte1 & BIT(5))) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], FW for 1Ant AP mode\n"); ++ BTC_TRACE(trace_buf); ++ real_byte1 &= ~BIT(4); ++ real_byte1 |= BIT(5); ++ ++ real_byte5 |= BIT(5); ++ real_byte5 &= ~BIT(6); ++ } ++ } ++ ++ h2c_parameter[0] = real_byte1; ++ h2c_parameter[1] = byte2; ++ h2c_parameter[2] = byte3; ++ h2c_parameter[3] = byte4; ++ h2c_parameter[4] = real_byte5; ++ ++ coex_dm->ps_tdma_para[0] = real_byte1; ++ coex_dm->ps_tdma_para[1] = byte2; ++ coex_dm->ps_tdma_para[2] = byte3; ++ coex_dm->ps_tdma_para[3] = byte4; ++ coex_dm->ps_tdma_para[4] = real_byte5; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); ++} ++ ++ ++void halbtc8703b1ant_ps_tdma(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean turn_on, IN u8 type) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_busy = false; ++ u8 rssi_adjust_val = 0; ++ u8 ps_tdma_byte4_val = 0x50, ps_tdma_byte0_val = 0x51, ++ ps_tdma_byte3_val = 0x10; ++ s8 wifi_duration_adjust = 0x0; ++ static boolean pre_wifi_busy = false; ++ ++ coex_dm->cur_ps_tdma_on = turn_on; ++ coex_dm->cur_ps_tdma = type; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (wifi_busy != pre_wifi_busy) { ++ force_exec = true; ++ pre_wifi_busy = wifi_busy; ++ } ++ ++ if (coex_dm->cur_ps_tdma_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** TDMA(on, %d) **********\n", ++ coex_dm->cur_ps_tdma); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** TDMA(off, %d) **********\n", ++ coex_dm->cur_ps_tdma); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && ++ (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) ++ return; ++ } ++ ++ /* Adjust WiFi slot by AP number */ ++ if (coex_sta->scan_ap_num <= 5) ++ wifi_duration_adjust = 5; ++ else if (coex_sta->scan_ap_num >= 40) ++ wifi_duration_adjust = -15; ++ else if (coex_sta->scan_ap_num >= 20) ++ wifi_duration_adjust = -10; ++ ++ /* for A2DP only case, PS-TDMA/ TDMA */ ++ if ((type == 1) || (type == 2) || (type == 9) || (type == 11) || ++ (type == 101) ++ || (type == 102) || (type == 109) || (type == 101) || ++ (type == 7)) { ++ if (!coex_sta->force_lps_on) { /* Native power save TDMA, only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 */ ++ ps_tdma_byte0_val = 0x61; /* no null-pkt (TDMA) */ ++ ps_tdma_byte3_val = 0x11; /* no tx-pause at BT-slot */ ++ ++ if (type == 7) ++ ps_tdma_byte4_val = 0x14; /* BT-Auto-Slot */ ++ else ++ ps_tdma_byte4_val = ++ 0x10; /* 0x778 = d/1 toggle, no dynamic slot */ ++ } else { ++ ps_tdma_byte0_val = 0x51; /* null-pkt (PS-TDMA) */ ++ ps_tdma_byte3_val = 0x10; /* tx-pause at BT-slot */ ++ ++ if (type == 7) ++ ps_tdma_byte4_val = 0x14; /* BT-Auto-Slot */ ++ else ++ ps_tdma_byte4_val = ++ 0x50; /* 0x778 = d/1 toggle, dynamic slot */ ++ } ++ } else if ((type == 3) || (type == 4) || (type == 13) || (type == 14) || ++ (type == 103) || (type == 113) || (type == 114)) { ++ ps_tdma_byte0_val = 0x51; /* null-pkt (PS-TDMA) */ ++ ps_tdma_byte3_val = 0x10; /* tx-pause at BT-slot */ ++ ps_tdma_byte4_val = ++ 0x10; /* 0x778 = d/1 toggle, no dynamic slot */ ++ } else { /* native power save case */ ++ ps_tdma_byte0_val = 0x61; /* no null-pkt (TDMA) */ ++ ps_tdma_byte3_val = 0x11; /* no tx-pause at BT-slot */ ++ ps_tdma_byte4_val = ++ 0x11; /* 0x778 = d/1 toggle, no dynamic slot */ ++ /* psTdmaByte4Va is not defne for 0x778 = d/1, 1/1 case */ ++ } ++ ++ /* for A2DP slave */ ++ if ((bt_link_info->slave_role == true) && (bt_link_info->a2dp_exist)) ++ ps_tdma_byte4_val = ps_tdma_byte4_val | ++ 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */ ++ ++ /* (for Antenna Detection Mechanism) */ ++ if (type > 100) { ++ ps_tdma_byte0_val = ps_tdma_byte0_val | ++ 0x82; /* set antenna control by SW */ ++ ps_tdma_byte3_val = ps_tdma_byte3_val | ++ 0x60; /* set antenna no toggle, control by antenna diversity */ ++ } ++ ++ ++ if (turn_on) { ++ switch (type) { ++ default: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x1a, 0x1a, 0x0, ps_tdma_byte4_val); ++ break; ++ case 1: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3a + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 2: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x2d + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 3: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3a, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 4: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 5: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x15, 0x3, ++ ps_tdma_byte3_val, 0x11); ++ break; ++ case 6: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x20, 0x3, ++ ps_tdma_byte3_val, 0x11); ++ break; ++ case 7: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x1e, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 8: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x1e, 0x3, 0x10, 0x14); ++ break; ++ case 9: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 10: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 12: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x0a, 0x0a, 0x0, 0x50); ++ break; ++ case 13: ++ if (coex_sta->scan_ap_num <= ++ 3) /* for Lenovo CPT test A2DP + OPP */ ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3a, 0x3, ++ ps_tdma_byte3_val, ++ ps_tdma_byte4_val); ++ else ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ++ ps_tdma_byte4_val); ++ break; ++ case 14: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 15: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xa, 0x3, 0x8, 0x0); ++ break; ++ case 16: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x15, 0x3, 0x10, 0x0); ++ break; ++ case 18: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 20: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3f, 0x03, ++ ps_tdma_byte3_val, 0x10); ++ break; ++ case 21: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x25, 0x03, 0x11, 0x11); ++ break; ++ case 22: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x25, 0x03, ++ ps_tdma_byte3_val, 0x10); ++ break; ++ case 23: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x3, 0x31, 0x18); ++ break; ++ case 24: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x15, 0x3, 0x31, 0x18); ++ break; ++ case 25: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 26: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 27: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x3, 0x31, 0x98); ++ break; ++ case 28: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x69, ++ 0x25, 0x3, 0x31, 0x0); ++ break; ++ case 29: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0xab, ++ 0x1a, 0x1a, 0x1, 0x10); ++ break; ++ case 30: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x30, 0x3, 0x10, 0x10); ++ break; ++ case 31: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x1a, 0x1a, 0, 0x58); ++ break; ++ case 32: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x35, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 33: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x35, 0x3, ++ ps_tdma_byte3_val, 0x10); ++ break; ++ case 34: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x53, ++ 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 35: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x63, ++ 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 36: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x12, 0x3, 0x14, 0x50); ++ break; ++ case 40: /* SoftAP only with no sta associated,BT disable ,TDMA mode for power saving */ ++ /* here softap mode screen off will cost 70-80mA for phone */ ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x23, ++ 0x18, 0x00, 0x10, 0x24); ++ break; ++ ++ /* 1-Ant translate to 2-Ant (for Antenna Detection Mechanism) */ ++ case 101: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3a + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 102: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x2d + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 103: ++ /* halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x51, 0x1d, 0x1d, 0x0, ps_tdma_byte4_val); */ ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3a, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 105: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x15, 0x3, ++ ps_tdma_byte3_val, 0x11); ++ break; ++ case 106: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x20, 0x3, ++ ps_tdma_byte3_val, 0x11); ++ break; ++ case 109: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 111: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 113: ++ /* halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x51, 0x12, 0x12, 0x0, ps_tdma_byte4_val); */ ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 114: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 120: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3f, 0x03, ++ ps_tdma_byte3_val, 0x10); ++ break; ++ case 122: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x25, 0x03, ++ ps_tdma_byte3_val, 0x10); ++ break; ++ case 132: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x25, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 133: ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x25, 0x03, ++ ps_tdma_byte3_val, 0x11); ++ break; ++ ++ } ++ } else { ++ ++ /* disable PS tdma */ ++ switch (type) { ++ case 8: /* PTA Control */ ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x8, ++ 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 0: ++ default: /* Software control, Antenna at BT side */ ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 1: /* 2-Ant, 0x778=3, antenna control by antenna diversity */ ++ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x48, 0x0); ++ break; ++ } ++ } ++ ++ /* update pre state */ ++ coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; ++ coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; ++} ++ ++boolean halbtc8703b1ant_is_common_action(IN struct btc_coexist *btcoexist) ++{ ++ boolean common = false, wifi_connected = false, wifi_busy = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (!wifi_connected && ++ BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* halbtc8703b1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (wifi_connected && ++ (BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* halbtc8703b1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (!wifi_connected && ++ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* halbtc8703b1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (wifi_connected && ++ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* halbtc8703b1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (!wifi_connected && ++ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE != coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* halbtc8703b1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else { ++ if (wifi_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Busy + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ common = false; ++ } ++ ++ return common; ++} ++ ++ ++void halbtc8703b1ant_tdma_duration_adjust_for_acl(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ static s32 up, dn, m, n, wait_count; ++ s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */ ++ u8 retry_count = 0, bt_info_ext; ++ boolean wifi_busy = false; ++ ++ if (BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifi_status) ++ wifi_busy = true; ++ else ++ wifi_busy = false; ++ ++ if ((BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == ++ wifi_status) || ++ (BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifi_status) || ++ (BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT == ++ wifi_status)) { ++ if (coex_dm->cur_ps_tdma != 1 && ++ coex_dm->cur_ps_tdma != 2 && ++ coex_dm->cur_ps_tdma != 3 && ++ coex_dm->cur_ps_tdma != 9) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } ++ return; ++ } ++ ++ if (!coex_dm->auto_tdma_adjust) { ++ coex_dm->auto_tdma_adjust = true; ++ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ /* ============ */ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } else { ++ /* accquire the BT TRx retry count from BT_Info byte2 */ ++ retry_count = coex_sta->bt_retry_cnt; ++ bt_info_ext = coex_sta->bt_info_ext; ++ ++ if ((coex_sta->low_priority_tx) > 1050 || ++ (coex_sta->low_priority_rx) > 1250) ++ retry_count++; ++ ++ result = 0; ++ wait_count++; ++ ++ if (retry_count == ++ 0) { /* no retry in the last 2-second duration */ ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */ ++ wait_count = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ } ++ } else if (retry_count <= ++ 3) { /* <=3 retry in the last 2-second duration */ ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) { /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */ ++ if (wait_count <= 2) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */ ++ if (wait_count == 1) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ ++ if (result == -1) { ++ /* if( (BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(bt_info_ext)) && ++ ((coex_dm->cur_ps_tdma == 1) ||(coex_dm->cur_ps_tdma == 2)) ) ++ { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } ++ else */ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } ++ } else if (result == 1) { ++ /* if( (BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(bt_info_ext)) && ++ ((coex_dm->cur_ps_tdma == 1) ||(coex_dm->cur_ps_tdma == 2)) ) ++ { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } ++ else */ if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = 1; ++ } ++ } else { /* no change */ ++ /* Bryant Modify ++ if(wifi_busy != pre_wifi_busy) ++ { ++ pre_wifi_busy = wifi_busy; ++ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, true, coex_dm->cur_ps_tdma); ++ } ++ */ ++ ++ } ++ ++ if (coex_dm->cur_ps_tdma != 1 && ++ coex_dm->cur_ps_tdma != 2 && ++ coex_dm->cur_ps_tdma != 9 && ++ coex_dm->cur_ps_tdma != 11) { ++ /* recover to previous adjust type */ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ coex_dm->ps_tdma_du_adj_type); ++ } ++ } ++} ++ ++void halbtc8703b1ant_ps_tdma_check_for_power_save_state( ++ IN struct btc_coexist *btcoexist, IN boolean new_ps_state) ++{ ++ u8 lps_mode = 0x0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode); ++ ++ if (lps_mode) { /* already under LPS state */ ++ if (new_ps_state) { ++ /* keep state under LPS, do nothing. */ ++ } else { ++ /* will leave LPS state, turn off psTdma first */ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ } ++ } else { /* NO PS state */ ++ if (new_ps_state) { ++ /* will enter LPS state, turn off psTdma first */ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ } else { ++ /* keep state under NO PS state, do nothing. */ ++ } ++ } ++} ++ ++void halbtc8703b1ant_power_save_state(IN struct btc_coexist *btcoexist, ++ IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ boolean low_pwr_disable = false; ++ ++ switch (ps_type) { ++ case BTC_PS_WIFI_NATIVE: ++ /* recover to original 32k low power setting */ ++ coex_sta->force_lps_on = false; ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ ++ break; ++ case BTC_PS_LPS_ON: ++ coex_sta->force_lps_on = true; ++ halbtc8703b1ant_ps_tdma_check_for_power_save_state( ++ btcoexist, true); ++ halbtc8703b1ant_lps_rpwm(btcoexist, NORMAL_EXEC, ++ lps_val, rpwm_val); ++ /* when coex force to enter LPS, do not enter 32k low power. */ ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ /* power save must executed before psTdma. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, ++ NULL); ++ ++ break; ++ case BTC_PS_LPS_OFF: ++ coex_sta->force_lps_on = false; ++ halbtc8703b1ant_ps_tdma_check_for_power_save_state( ++ btcoexist, false); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8703b1ant_action_wifi_only(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, ++ false, false); ++} ++ ++void halbtc8703b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist) ++{ ++ static u32 bt_disable_cnt = 0; ++ boolean bt_active = true, bt_disabled = false; ++ ++ /* This function check if bt is disabled */ ++ ++ if (coex_sta->high_priority_tx == 0 && ++ coex_sta->high_priority_rx == 0 && ++ coex_sta->low_priority_tx == 0 && ++ coex_sta->low_priority_rx == 0) ++ bt_active = false; ++ if (coex_sta->high_priority_tx == 0xffff && ++ coex_sta->high_priority_rx == 0xffff && ++ coex_sta->low_priority_tx == 0xffff && ++ coex_sta->low_priority_rx == 0xffff) ++ bt_active = false; ++ if (bt_active) { ++ bt_disable_cnt = 0; ++ bt_disabled = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is enabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ bt_disable_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], bt all counters=0, %d times!!\n", ++ bt_disable_cnt); ++ BTC_TRACE(trace_buf); ++ if (bt_disable_cnt >= 2) { ++ bt_disabled = true; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is disabled !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_action_wifi_only(btcoexist); ++ } ++ } ++ if (coex_sta->bt_disabled != bt_disabled) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is from %s to %s!!\n", ++ (coex_sta->bt_disabled ? "disabled" : "enabled"), ++ (bt_disabled ? "disabled" : "enabled")); ++ BTC_TRACE(trace_buf); ++ coex_sta->bt_disabled = bt_disabled; ++ if (!bt_disabled) { ++ } else { ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ } ++ } ++} ++ ++/* ********************************************* ++ * ++ * Software Coex Mechanism start ++ * ++ * ********************************************* */ ++ ++/* SCO only or SCO+PAN(HS) */ ++ ++/* ++void halbtc8703b1ant_action_sco(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8703b1ant_sw_mechanism(btcoexist, true); ++} ++ ++ ++void halbtc8703b1ant_action_hid(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8703b1ant_sw_mechanism(btcoexist, true); ++} ++ ++ ++void halbtc8703b1ant_action_a2dp(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8703b1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8703b1ant_action_a2dp_pan_hs(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8703b1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8703b1ant_action_pan_edr(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8703b1ant_sw_mechanism(btcoexist, false); ++} ++ ++ ++void halbtc8703b1ant_action_pan_hs(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8703b1ant_sw_mechanism(btcoexist, false); ++} ++ ++ ++void halbtc8703b1ant_action_pan_edr_a2dp(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8703b1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8703b1ant_action_pan_edr_hid(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8703b1ant_sw_mechanism(btcoexist, true); ++} ++ ++ ++void halbtc8703b1ant_action_hid_a2dp_pan_edr(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8703b1ant_sw_mechanism(btcoexist, true); ++} ++ ++void halbtc8703b1ant_action_hid_a2dp(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8703b1ant_sw_mechanism(btcoexist, true); ++} ++ ++*/ ++ ++/* ********************************************* ++ * ++ * Non-Software Coex Mechanism start ++ * ++ * ********************************************* */ ++void halbtc8703b1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, ++ false, false); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8703b1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, ++ false, false); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++} ++ ++void halbtc8703b1ant_action_hs(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++} ++ ++void halbtc8703b1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false, ap_enable = false, wifi_busy = false, ++ bt_busy = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ if ((!wifi_connected) && (!coex_sta->wifi_is_high_pri_task)) { ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ } else if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ /* SCO/HID/A2DP busy */ ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else if ((bt_link_info->pan_exist) || (wifi_busy)) { ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ /* for BT inquiry/page fail after S4 resume */ ++ /* halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); */ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ ++ ++ /* halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); */ ++ /* halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); */ ++ } ++} ++ ++void halbtc8703b1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ /* tdma and coex table */ ++ ++ if (bt_link_info->sco_exist) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ } else { /* HID */ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ } ++} ++ ++void halbtc8703b1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ u8 bt_rssi_state; ++ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ bt_rssi_state = halbtc8703b1ant_bt_rssi_state(2, 28, 0); ++ ++ if ((coex_sta->low_priority_rx >= 950) && (!coex_sta->under_ips) ++ && (coex_sta->low_priority_rx >= ++ coex_sta->low_priority_tx) && ++ (!coex_sta->c2h_bt_inquiry_page)) ++ bt_link_info->slave_role = true; ++ else ++ bt_link_info->slave_role = false; ++ ++ if (bt_link_info->hid_only) { /* HID */ ++ halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist, ++ wifi_status); ++ coex_dm->auto_tdma_adjust = false; ++ return; ++ } else if (bt_link_info->a2dp_only) { /* A2DP */ ++ if (BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 7); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = true; ++ } ++ } else if (((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) || ++ (bt_link_info->hid_exist && bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); ++ coex_dm->auto_tdma_adjust = false; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { /* HID+A2DP */ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8); ++ coex_dm->auto_tdma_adjust = false; ++ ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); ++ } else if ((bt_link_info->pan_only) || (bt_link_info->hid_exist && ++ bt_link_info->pan_exist)) { /* PAN(OPP,FTP), HID+PAN(OPP,FTP) */ ++ if (BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 4); ++ else ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); ++ ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ /* BT no-profile busy (0x9) */ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } ++} ++ ++void halbtc8703b1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist) ++{ ++ /* power save state */ ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, ++ false, false); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8703b1ant_action_wifi_not_connected_scan(IN struct btc_coexist ++ *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ if (bt_link_info->a2dp_exist) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else if (bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 22); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } ++ } else if ((BT_8703B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } else { ++ /* Bryant Add */ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8703b1ant_action_wifi_not_connected_asso_auth( ++ IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4); ++ } else if (bt_link_info->pan_exist) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4); ++ } else { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 2); ++ } ++} ++ ++void halbtc8703b1ant_action_wifi_connected_scan(IN struct btc_coexist ++ *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ if (bt_link_info->a2dp_exist) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else if (bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 22); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } ++ } else if ((BT_8703B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } else { ++ /* Bryant Add */ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8703b1ant_action_wifi_connected_specific_packet( ++ IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_busy = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ /* no specific packet process for both WiFi and BT very busy */ ++ if ((wifi_busy) && ((bt_link_info->pan_exist) || ++ (coex_sta->num_of_profile >= 2))) ++ return; ++ ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ } else if (bt_link_info->a2dp_exist) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else if (bt_link_info->pan_exist) { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8703b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist) ++{ ++ boolean wifi_busy = false; ++ boolean scan = false, link = false, roam = false; ++ boolean under_4way = false, ap_enable = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ if (under_4way) { ++ halbtc8703b1ant_action_wifi_connected_specific_packet(btcoexist); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ if (scan || link || roam) { ++ if (scan) ++ halbtc8703b1ant_action_wifi_connected_scan(btcoexist); ++ else ++ halbtc8703b1ant_action_wifi_connected_specific_packet( ++ btcoexist); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ /* power save state */ ++ if (!ap_enable && ++ BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status && ++ !btcoexist->bt_link_info.hid_only) { ++ if (btcoexist->bt_link_info.a2dp_only) { /* A2DP */ ++ if (!wifi_busy) ++ halbtc8703b1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else { /* busy */ ++ if (coex_sta->scan_ap_num >= ++ BT_8703B_1ANT_WIFI_NOISY_THRESH) /* no force LPS, no PS-TDMA, use pure TDMA */ ++ halbtc8703b1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8703b1ant_power_save_state( ++ btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ } else if ((coex_sta->pan_exist == false) && ++ (coex_sta->a2dp_exist == false) && ++ (coex_sta->hid_exist == false)) ++ halbtc8703b1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8703b1ant_power_save_state(btcoexist, ++ BTC_PS_LPS_ON, 0x50, 0x4); ++ } else ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ /* tdma and coex table */ ++ if (!wifi_busy) { ++ if (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ halbtc8703b1ant_action_wifi_connected_bt_acl_busy( ++ btcoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } else if ((BT_8703B_1ANT_BT_STATUS_SCO_BUSY == ++ coex_dm->bt_status) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } else { ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ halbtc8703b1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_PTA, NORMAL_EXEC, false, false); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 2); ++ } ++ } else { ++ if (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ halbtc8703b1ant_action_wifi_connected_bt_acl_busy( ++ btcoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } else if ((BT_8703B_1ANT_BT_STATUS_SCO_BUSY == ++ coex_dm->bt_status) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } else { ++ /* halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); */ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8703b1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_PTA, NORMAL_EXEC, false, false); ++ /* halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); */ ++ halbtc8703b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } ++ } ++} ++ ++void halbtc8703b1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ u8 algorithm = 0; ++ ++ algorithm = halbtc8703b1ant_action_algorithm(btcoexist); ++ coex_dm->cur_algorithm = algorithm; ++ ++ if (halbtc8703b1ant_is_common_action(btcoexist)) { ++ ++ } else { ++ switch (coex_dm->cur_algorithm) { ++ case BT_8703B_1ANT_COEX_ALGO_SCO: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = SCO.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8703b1ant_action_sco(btcoexist); */ ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8703b1ant_action_hid(btcoexist); */ ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8703b1ant_action_a2dp(btcoexist); */ ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = A2DP+PAN(HS).\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8703b1ant_action_a2dp_pan_hs(btcoexist); */ ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN(EDR).\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8703b1ant_action_pan_edr(btcoexist); */ ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HS mode.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8703b1ant_action_pan_hs(btcoexist); */ ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8703b1ant_action_pan_edr_a2dp(btcoexist); */ ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_PANEDR_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN(EDR)+HID.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8703b1ant_action_pan_edr_hid(btcoexist); */ ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID+A2DP+PAN.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8703b1ant_action_hid_a2dp_pan_edr(btcoexist); */ ++ break; ++ case BT_8703B_1ANT_COEX_ALGO_HID_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8703b1ant_action_hid_a2dp(btcoexist); */ ++ break; ++ default: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = coexist All Off!!\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8703b1ant_coex_all_off(btcoexist); */ ++ break; ++ } ++ coex_dm->pre_algorithm = coex_dm->cur_algorithm; ++ } ++} ++ ++void halbtc8703b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false, bt_hs_on = false; ++ boolean increase_scan_dev_num = false; ++ boolean bt_ctrl_agg_buf_size = false; ++ boolean miracast_plus_bt = false; ++ u8 agg_buf_size = 5; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0, wifi_bw; ++ u8 iot_peer = BTC_IOT_PEER_UNKNOWN; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->under_ips) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is under IPS !!!\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->bt_whck_test) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is under WHCK TEST!!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_action_bt_whck_test(btcoexist); ++ return; ++ } ++ ++ if ((BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) ++ increase_scan_dev_num = true; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, ++ &increase_scan_dev_num); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ ++ if ((num_of_wifi_link >= 2) || ++ (wifi_link_status & WIFI_P2P_GO_CONNECTED)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n", ++ num_of_wifi_link, wifi_link_status); ++ BTC_TRACE(trace_buf); ++ ++ if (bt_link_info->bt_link_exist) { ++ halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, ++ 0, 1); ++ miracast_plus_bt = true; ++ } else { ++ halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ miracast_plus_bt = false; ++ } ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ ++ if ((bt_link_info->a2dp_exist) && ++ (coex_sta->c2h_bt_inquiry_page)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], BT Is Inquirying\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_action_bt_inquiry(btcoexist); ++ } else ++ halbtc8703b1ant_action_wifi_multi_port(btcoexist); ++ ++ return; ++ } else { ++ miracast_plus_bt = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if ((bt_link_info->bt_link_exist) && (wifi_connected)) { ++ halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer); ++ ++ if (BTC_IOT_PEER_CISCO != iot_peer) { ++ if (bt_link_info->sco_exist) /* if (bt_link_info->bt_hi_pri_link_exist) */ ++ halbtc8703b1ant_limited_rx(btcoexist, ++ NORMAL_EXEC, true, false, 0x5); ++ else ++ halbtc8703b1ant_limited_rx(btcoexist, ++ NORMAL_EXEC, false, false, 0x5); ++ } else { ++ if (bt_link_info->sco_exist) ++ halbtc8703b1ant_limited_rx(btcoexist, ++ NORMAL_EXEC, true, false, 0x5); ++ else { ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ halbtc8703b1ant_limited_rx(btcoexist, ++ NORMAL_EXEC, false, true, 0x10); ++ else ++ halbtc8703b1ant_limited_rx(btcoexist, ++ NORMAL_EXEC, false, true, 0x8); ++ } ++ } ++ ++ halbtc8703b1ant_sw_mechanism(btcoexist, true); ++ halbtc8703b1ant_run_sw_coexist_mechanism( ++ btcoexist); /* just print debug message */ ++ } else { ++ halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x5); ++ ++ halbtc8703b1ant_sw_mechanism(btcoexist, false); ++ halbtc8703b1ant_run_sw_coexist_mechanism( ++ btcoexist); /* just print debug message */ ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], BT Is Inquirying\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8703b1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ ++ if (!wifi_connected) { ++ boolean scan = false, link = false, roam = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is non connected-idle !!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (scan || link || roam) { ++ if (scan) ++ halbtc8703b1ant_action_wifi_not_connected_scan( ++ btcoexist); ++ else ++ halbtc8703b1ant_action_wifi_not_connected_asso_auth( ++ btcoexist); ++ } else ++ halbtc8703b1ant_action_wifi_not_connected(btcoexist); ++ } else /* wifi LPS/Busy */ ++ halbtc8703b1ant_action_wifi_connected(btcoexist); ++} ++ ++u32 halbtc8703b1ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val) ++{ ++ u8 j; ++ u32 tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0; ++ u32 result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200, ++ 174, 151, 132, 115, 100, 86, 74, 62, 51, 42, ++ 32, 23, 15, 7, 0 ++ }; ++ ++ if (val == 0) ++ return 0; ++ ++ tmp = val; ++ ++ while (1) { ++ if (tmp == 1) ++ break; ++ else { ++ tmp = (tmp >> 1); ++ shiftcount++; ++ } ++ } ++ ++ ++ val_integerd_b = shiftcount + 1; ++ ++ tmp2 = 1; ++ for (j = 1; j <= val_integerd_b; j++) ++ tmp2 = tmp2 * 2; ++ ++ tmp = (val * 100) / tmp2; ++ tindex = tmp / 5; ++ ++ if (tindex > 20) ++ tindex = 20; ++ ++ val_fractiond_b = table_fraction[tindex]; ++ ++ result = val_integerd_b * 100 - val_fractiond_b; ++ ++ return result; ++ ++ ++} ++ ++void halbtc8703b1ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist, ++ IN boolean isenable) ++{ ++ ++#if (BT_8703B_1ANT_ENABLE_GNTBT_TO_GPIO14 == 1) ++ if (isenable) ++ { ++ /* enable GNT_WL/GNT_BT debug signal to GPIO14/15 */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x1); ++ ++ /* enable GNT_BT debug to GPIO */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x0); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1, 0x0); ++ } ++ else ++ { ++ /* enable GNT_WL/GNT_BT debug signal to GPIO14/15 */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x0); ++ ++ /* Disable GNT_BT debug to GPIO, and enable chip_wakeup_host */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x1); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1, 0x1); ++ } ++#endif ++} ++ ++void halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ /* force to reset coex mechanism */ ++ ++ /* sw all off */ ++ halbtc8703b1ant_sw_mechanism(btcoexist, false); ++ ++ /* halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); */ ++ /* halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); */ ++ ++ coex_sta->pop_event_cnt = 0; ++} ++ ++void halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean back_up, IN boolean wifi_only) ++{ ++ u32 u32tmp0 = 0, u32tmp1 = 0, u32tmp2 = 0; ++ ++ u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70), ++ u32tmp1 = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, 0x38); ++ u32tmp2 = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, 0x54); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "\n [BTCoex], ********** 0x70/ 0x38/ 0x54 (Before Init HW config) = 0x%x/ 0x%x/ 0x%x**********\n", ++ u32tmp0, ++ u32tmp1, u32tmp2); ++ BTC_TRACE(trace_buf); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 1Ant Init HW Config!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8, ++ 0x1); /* enable TBTT nterrupt */ ++ ++ /* BT report packet sample rate */ ++ btcoexist->btc_write_1byte(btcoexist, 0x790, 0x5); ++ ++ /* Enable BT counter statistics */ ++ btcoexist->btc_write_1byte(btcoexist, 0x778, 0x1); ++ ++ /* Enable PTA (3-wire function form BT side) */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x41, 0x02, 0x1); ++ ++ /* Enable PTA (tx/rx signal form WiFi side) */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4c6, 0x10, 0x1); ++ ++ halbtc8703b1ant_enable_gnt_to_gpio(btcoexist, FALSE); ++ ++ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); ++ ++ /* Antenna config */ ++ if (wifi_only) { ++ coex_sta->concurrent_rx_mode_on = false; ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_WIFI, ++ FORCE_EXEC, true, false); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_WIFI, ++ FORCE_EXEC, false, false); ++ } else { ++ coex_sta->concurrent_rx_mode_on = true; ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x2, 0x1); ++ /* RF 0x1[0] = 0 -> Set GNT_WL_RF_Rx always = 1 for con-current Rx */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0x1, 0x0); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, true, false); ++ } ++ ++ /* PTA parameter */ ++ halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ ++ u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70), ++ u32tmp1 = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, 0x38); ++ u32tmp2 = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, 0x54); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** 0x70/ 0x38/ 0x54 (After Init HW config) = 0x%x/ 0x%x/ 0x%x**********\n", ++ u32tmp0, ++ u32tmp1, u32tmp2); ++ BTC_TRACE(trace_buf); ++ ++} ++ ++ ++ ++void halbtc8703b1ant_psd_showdata(IN struct btc_coexist *btcoexist) ++{ ++ u8 *cli_buf = btcoexist->cli_buf; ++ u32 delta_freq_per_point; ++ u32 freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n\n============[PSD info] (%d)============\n", ++ psd_scan->psd_gen_count); ++ CL_PRINTF(cli_buf); ++ ++ if (psd_scan->psd_gen_count == 0) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n"); ++ CL_PRINTF(cli_buf); ++ return; ++ } ++ ++ if (psd_scan->psd_point == 0) ++ delta_freq_per_point = 0; ++ else ++ delta_freq_per_point = psd_scan->psd_band_width / ++ psd_scan->psd_point; ++ ++ /* if (psd_scan->is_psd_show_max_only) */ ++ if (0) { ++ psd_rep1 = psd_scan->psd_max_value / 100; ++ psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100; ++ ++ freq = ((psd_scan->real_cent_freq - 20) * 1000000 + ++ psd_scan->psd_max_value_point * delta_freq_per_point); ++ freq1 = freq / 1000000; ++ freq2 = freq / 1000 - freq1 * 1000; ++ ++ if (freq2 < 100) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n Freq = %d.0%d MHz", ++ freq1, freq2); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n Freq = %d.%d MHz", ++ freq1, freq2); ++ ++ if (psd_rep2 < 10) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ ", Value = %d.0%d dB, (%d)\n", ++ psd_rep1, psd_rep2, psd_scan->psd_max_value); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ ", Value = %d.%d dB, (%d)\n", ++ psd_rep1, psd_rep2, psd_scan->psd_max_value); ++ ++ CL_PRINTF(cli_buf); ++ } else { ++ m = psd_scan->psd_start_point; ++ n = psd_scan->psd_start_point; ++ i = 1; ++ j = 1; ++ ++ while (1) { ++ do { ++ freq = ((psd_scan->real_cent_freq - 20) * 1000000 + m * ++ delta_freq_per_point); ++ freq1 = freq / 1000000; ++ freq2 = freq / 1000 - freq1 * 1000; ++ ++ if (i == 1) { ++ if (freq2 == 0) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n Freq%6d.000", freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n Freq%6d.0%2d", freq1, ++ freq2); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n Freq%6d.%3d", freq1, ++ freq2); ++ } else if ((i % 8 == 0) || ++ (m == psd_scan->psd_stop_point)) { ++ if (freq2 == 0) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "%6d.000\n", freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "%6d.0%2d\n", freq1, freq2); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "%6d.%3d\n", freq1, freq2); ++ } else { ++ if (freq2 == 0) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "%6d.000", freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "%6d.0%2d", freq1, freq2); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "%6d.%3d", freq1, freq2); ++ } ++ ++ i++; ++ m++; ++ CL_PRINTF(cli_buf); ++ ++ } while ((i <= 8) && (m <= psd_scan->psd_stop_point)); ++ ++ ++ do { ++ psd_rep1 = psd_scan->psd_report_max_hold[n] / 100; ++ psd_rep2 = psd_scan->psd_report_max_hold[n] - psd_rep1 * ++ 100; ++ ++ if (j == 1) { ++ if (psd_rep2 < 10) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n Val %7d.0%d", psd_rep1, ++ psd_rep2); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n Val %7d.%d", psd_rep1, ++ psd_rep2); ++ } else if ((j % 8 == 0) || ++ (n == psd_scan->psd_stop_point)) { ++ if (psd_rep2 < 10) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "%7d.0%d\n", psd_rep1, ++ psd_rep2); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "%7d.%d\n", psd_rep1, psd_rep2); ++ } else { ++ if (psd_rep2 < 10) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "%7d.0%d", psd_rep1, psd_rep2); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "%7d.%d", psd_rep1, psd_rep2); ++ } ++ ++ j++; ++ n++; ++ CL_PRINTF(cli_buf); ++ ++ } while ((j <= 8) && (n <= psd_scan->psd_stop_point)); ++ ++ if ((m > psd_scan->psd_stop_point) || ++ (n > psd_scan->psd_stop_point)) ++ break; ++ else { ++ i = 1; ++ j = 1; ++ } ++ ++ } ++ } ++ ++ ++} ++ ++void halbtc8703b1ant_psd_max_holddata(IN struct btc_coexist *btcoexist, ++ IN u32 gen_count) ++{ ++ u32 i = 0, i_max = 0, val_max = 0; ++ ++ if (gen_count == 1) { ++ memcpy(psd_scan->psd_report_max_hold, ++ psd_scan->psd_report, ++ BT_8703B_1ANT_ANTDET_PSD_POINTS * sizeof(u32)); ++ ++ for (i = psd_scan->psd_start_point; ++ i <= psd_scan->psd_stop_point; i++) { ++ ++ } ++ ++ psd_scan->psd_max_value_point = 0; ++ psd_scan->psd_max_value = 0; ++ ++ } else { ++ for (i = psd_scan->psd_start_point; ++ i <= psd_scan->psd_stop_point; i++) { ++ if (psd_scan->psd_report[i] > ++ psd_scan->psd_report_max_hold[i]) ++ psd_scan->psd_report_max_hold[i] = ++ psd_scan->psd_report[i]; ++ ++ /* search Max Value */ ++ if (i == psd_scan->psd_start_point) { ++ i_max = i; ++ val_max = psd_scan->psd_report_max_hold[i]; ++ } else { ++ if (psd_scan->psd_report_max_hold[i] > ++ val_max) { ++ i_max = i; ++ val_max = psd_scan->psd_report_max_hold[i]; ++ } ++ } ++ ++ ++ } ++ ++ psd_scan->psd_max_value_point = i_max; ++ psd_scan->psd_max_value = val_max; ++ ++ } ++ ++ ++} ++ ++u32 halbtc8703b1ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point) ++{ ++ /* reg 0x808[9:0]: FFT data x */ ++ /* reg 0x808[22]: 0-->1 to get 1 FFT data y */ ++ /* reg 0x8b4[15:0]: FFT data y report */ ++ ++ u32 val = 0, psd_report = 0; ++ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x808); ++ ++ val &= 0xffbffc00; ++ val |= point; ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x808, val); ++ ++ val |= 0x00400000; ++ btcoexist->btc_write_4byte(btcoexist, 0x808, val); ++ ++ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x8b4); ++ ++ psd_report = val & 0x0000ffff; ++ ++ return psd_report; ++} ++ ++ ++void halbtc8703b1ant_psd_sweep_point(IN struct btc_coexist *btcoexist, ++ IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points, ++ IN u32 avgnum) ++{ ++ u32 i, val, n, k = 0; ++ u32 points1 = 0, psd_report = 0; ++ u32 start_p = 0, stop_p = 0, delta_freq_per_point = 156250; ++ u32 psd_center_freq = 20 * 10 ^ 6, freq, freq1, freq2; ++ boolean outloop = false; ++ u8 flag = 0; ++ u32 tmp, psd_rep1, psd_rep2; ++ u32 wifi_original_channel = 1; ++ ++ psd_scan->is_psd_running = true; ++ ++ do { ++ switch (flag) { ++ case 0: /* Get PSD parameters */ ++ default: ++ ++ psd_scan->psd_band_width = 40 * 1000000; ++ psd_scan->psd_point = points; ++ psd_scan->psd_start_base = points / 2; ++ psd_scan->psd_avg_num = avgnum; ++ psd_scan->real_cent_freq = cent_freq; ++ psd_scan->real_offset = offset; ++ psd_scan->real_span = span; ++ ++ ++ points1 = psd_scan->psd_point; ++ delta_freq_per_point = psd_scan->psd_band_width / ++ psd_scan->psd_point; ++ ++ /* PSD point setup */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x808); ++ val &= 0xffff0fff; ++ ++ switch (psd_scan->psd_point) { ++ case 128: ++ val |= 0x0; ++ break; ++ case 256: ++ default: ++ val |= 0x00004000; ++ break; ++ case 512: ++ val |= 0x00008000; ++ break; ++ case 1024: ++ val |= 0x0000c000; ++ break; ++ } ++ ++ switch (psd_scan->psd_avg_num) { ++ case 1: ++ val |= 0x0; ++ break; ++ case 8: ++ val |= 0x00001000; ++ break; ++ case 16: ++ val |= 0x00002000; ++ break; ++ case 32: ++ default: ++ val |= 0x00003000; ++ break; ++ } ++ btcoexist->btc_write_4byte(btcoexist, 0x808, val); ++ ++ flag = 1; ++ break; ++ case 1: /* calculate the PSD point index from freq/offset/span */ ++ psd_center_freq = psd_scan->psd_band_width / 2 + ++ offset * (1000000); ++ ++ start_p = psd_scan->psd_start_base + (psd_center_freq - ++ span * (1000000) / 2) / delta_freq_per_point; ++ psd_scan->psd_start_point = start_p - ++ psd_scan->psd_start_base; ++ ++ stop_p = psd_scan->psd_start_base + (psd_center_freq + ++ span * (1000000) / 2) / delta_freq_per_point; ++ psd_scan->psd_stop_point = stop_p - ++ psd_scan->psd_start_base - 1; ++ ++ flag = 2; ++ break; ++ case 2: /* set RF channel/BW/Mode */ ++ ++ /* set 3-wire off */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x88c); ++ val |= 0x00300000; ++ btcoexist->btc_write_4byte(btcoexist, 0x88c, val); ++ ++ /* CCK off */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x800); ++ val &= 0xfeffffff; ++ btcoexist->btc_write_4byte(btcoexist, 0x800, val); ++ ++ /* store WiFi original channel */ ++ wifi_original_channel = btcoexist->btc_get_rf_reg( ++ btcoexist, BTC_RF_A, 0x18, 0x3ff); ++ ++ /* Set RF channel */ ++ if (cent_freq == 2484) ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, ++ 0x18, 0x3ff, 0xe); ++ else ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, ++ 0x18, 0x3ff, (cent_freq - 2412) / 5 + ++ 1); /* WiFi TRx Mask on */ ++ ++ /* Set RF mode = Rx, RF Gain = 0x8a0 */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0, ++ 0xfffff, 0x308a0); ++ ++ /* Set RF Rx filter corner */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, ++ 0xfffff, 0x3e4); ++ ++ /* Set TRx mask off */ ++ /* un-lock TRx Mask setup */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd, ++ 0x80, 0x1); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf, ++ 0x1, 0x1); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x0); ++ ++ flag = 3; ++ break; ++ case 3: ++ memset(psd_scan->psd_report, 0, ++ psd_scan->psd_point * sizeof(u32)); ++ start_p = psd_scan->psd_start_point + ++ psd_scan->psd_start_base; ++ stop_p = psd_scan->psd_stop_point + ++ psd_scan->psd_start_base + 1; ++ ++ i = start_p; ++ ++ while (i < stop_p) { ++ if (i >= points1) ++ psd_report = ++ halbtc8703b1ant_psd_getdata( ++ btcoexist, i - points1); ++ else ++ psd_report = ++ halbtc8703b1ant_psd_getdata( ++ btcoexist, i); ++ ++ if (psd_report == 0) ++ tmp = 0; ++ else ++ /* tmp = 20*log10((double)psd_report); */ ++ /* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */ ++ tmp = 6 * halbtc8703b1ant_psd_log2base( ++ btcoexist, psd_report); ++ ++ n = i - psd_scan->psd_start_base; ++ psd_scan->psd_report[n] = tmp; ++ psd_rep1 = psd_scan->psd_report[n] / 100; ++ psd_rep2 = psd_scan->psd_report[n] - psd_rep1 * ++ 100; ++ ++ freq = ((cent_freq - 20) * 1000000 + n * ++ delta_freq_per_point); ++ freq1 = freq / 1000000; ++ freq2 = freq / 1000 - freq1 * 1000; ++ ++ i++; ++ ++ k = 0; ++ ++ /* Add Delay between PSD point */ ++ while (1) { ++ if (k++ > 20000) ++ break; ++ } ++ ++ } ++ ++ flag = 100; ++ break; ++ case 99: /* error */ ++ ++ outloop = true; ++ break; ++ case 100: /* recovery */ ++ ++ /* set 3-wire on */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x88c); ++ val &= 0xffcfffff; ++ btcoexist->btc_write_4byte(btcoexist, 0x88c, val); ++ ++ /* CCK on */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x800); ++ val |= 0x01000000; ++ btcoexist->btc_write_4byte(btcoexist, 0x800, val); ++ ++ /* PSD off */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x808); ++ val &= 0xffbfffff; ++ btcoexist->btc_write_4byte(btcoexist, 0x808, val); ++ ++ /* TRx Mask on */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x780); ++ ++ /* lock TRx Mask setup */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd, ++ 0x80, 0x0); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf, ++ 0x1, 0x0); ++ ++ /* Set RF Rx filter corner */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, ++ 0xfffff, 0x0); ++ ++ /* restore WiFi original channel */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18, ++ 0x3ff, wifi_original_channel); ++ ++ outloop = true; ++ break; ++ ++ } ++ ++ } while (!outloop); ++ ++ ++ ++ psd_scan->is_psd_running = false; ++ ++ ++} ++ ++/* ************************************************************ ++ * work around function start with wa_halbtc8703b1ant_ ++ * ************************************************************ ++ * ************************************************************ ++ * extern function start with ex_halbtc8703b1ant_ ++ * ************************************************************ */ ++void ex_halbtc8703b1ant_power_on_setting(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ u8 u8tmp = 0x0; ++ u16 u16tmp = 0x0; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx Execute 8703b 1-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "Ant Det Finish = %s, Ant Det Number = %d\n", ++ (board_info->btdm_ant_det_finish ? "Yes" : "No"), ++ board_info->btdm_ant_num_by_ant_det); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->stop_coex_dm = true; ++ ++ /* enable BB, REG_SYS_FUNC_EN such that we can write BB/MAC reg correctly. */ ++ u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2); ++ btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1)); ++ ++ /* set Path control owner to WiFi */ ++ halbtc8703b1ant_LTECoex_PathControlOwner(btcoexist, ++ BT_8703B_1ANT_PCO_WLSIDE); ++ ++ /* set GNT_BT to high */ ++ halbtc8703b1ant_LTECoex_set_GNT_BT(btcoexist, ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, ++ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); ++ /* Set GNT_WL to low */ ++ halbtc8703b1ant_LTECoex_set_GNT_WL(btcoexist, ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, ++ BT_8703B_1ANT_SIG_STA_SET_TO_LOW); ++ ++ /* set WLAN_ACT = 0 */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); ++ ++ halbtc8703b1ant_enable_gnt_to_gpio(btcoexist, FALSE); ++ ++ /* */ ++ /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */ ++ /* Local setting bit define */ ++ /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */ ++ /* BIT1: "0" for internal switch; "1" for external switch */ ++ /* BIT2: "0" for one antenna; "1" for two antenna */ ++ /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */ ++ ++ u8tmp = 0; ++ board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; ++ ++ if (btcoexist->chip_interface == BTC_INTF_USB) ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp); ++ else if (btcoexist->chip_interface == BTC_INTF_SDIO) ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60, u8tmp); ++ ++ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** 0x70(MAC)/0x38/0x54 (Power-On) =0x%x/ 0x%x/ 0x%x**********\n", ++ btcoexist->btc_read_4byte(btcoexist, 0x70), ++ halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, 0x38), ++ halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, 0x54)); ++ BTC_TRACE(trace_buf); ++ ++ ++} ++ ++void ex_halbtc8703b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist) ++{ ++} ++ ++void ex_halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only) ++{ ++ halbtc8703b1ant_init_hw_config(btcoexist, true, wifi_only); ++ btcoexist->stop_coex_dm = false; ++} ++ ++void ex_halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Coex Mechanism Init!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->stop_coex_dm = false; ++ ++ halbtc8703b1ant_init_coex_dm(btcoexist); ++ ++ halbtc8703b1ant_query_bt_info(btcoexist); ++} ++ ++void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ struct btc_stack_info *stack_info = &btcoexist->stack_info; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ u8 *cli_buf = btcoexist->cli_buf; ++ u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; ++ u16 u16tmp[4]; ++ u32 u32tmp[4]; ++ u32 fa_of_dm, fa_cck; ++ u32 fw_ver = 0, bt_patch_ver = 0; ++ static u8 pop_report_in_10s = 0; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cli_buf); ++ ++ if (btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ if (btcoexist->stop_coex_dm) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Coex is STOPPED]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ ++ if (psd_scan->ant_det_try_count == 0) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", ++ "Ant PG Num/ Mech/ Pos", ++ board_info->pg_ant_num, board_info->btdm_ant_num, ++ board_info->btdm_ant_pos); ++ CL_PRINTF(cli_buf); ++ } else { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d/ %d/ %d (%d/%d/%d)", ++ "Ant PG Num/ Mech(Ant_Det)/ Pos", ++ board_info->pg_ant_num, board_info->btdm_ant_num_by_ant_det, ++ board_info->btdm_ant_pos, ++ psd_scan->ant_det_try_count, psd_scan->ant_det_fail_count, ++ psd_scan->ant_det_result); ++ CL_PRINTF(cli_buf); ++ ++ if (board_info->btdm_ant_det_finish) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "Ant Det PSD Value", ++ psd_scan->ant_det_peak_val); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", ++ "BT stack/ hci ext ver", ++ ((stack_info->profile_notified) ? "Yes" : "No"), ++ stack_info->hci_version); ++ CL_PRINTF(cli_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", ++ "CoexVer/ FwVer/ PatchVer", ++ glcoex_ver_date_8703b_1ant, glcoex_ver_8703b_1ant, fw_ver, ++ bt_patch_ver, bt_patch_ver); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", ++ "Wifi channel informed to BT", ++ coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1], ++ coex_dm->wifi_chnl_info[2]); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s", ++ "WifibHiPri/ Ccklock/ CckEverLock", ++ (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"), ++ (coex_sta->cck_lock ? "Yes" : "No"), ++ (coex_sta->cck_ever_lock ? "Yes" : "No")); ++ CL_PRINTF(cli_buf); ++ ++ /* wifi status */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Wifi Status]============"); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[BT Status]============"); ++ CL_PRINTF(cli_buf); ++ ++ pop_report_in_10s++; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ", ++ "BT [status/ rssi/ retryCnt/ popCnt]", ++ ((coex_sta->bt_disabled) ? ("disabled") : (( ++ coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") ++ : ((BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) ? "non-connected idle" : ++ ((BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status) ++ ? "connected-idle" : "busy")))), ++ coex_sta->bt_rssi, coex_sta->bt_retry_cnt, ++ coex_sta->pop_event_cnt); ++ CL_PRINTF(cli_buf); ++ ++ if (pop_report_in_10s >= 5) { ++ coex_sta->pop_event_cnt = 0; ++ pop_report_in_10s = 0; ++ } ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d / %d / %d / %d / %d", ++ "SCO/HID/PAN/A2DP/Hi-Pri", ++ bt_link_info->sco_exist, bt_link_info->hid_exist, ++ bt_link_info->pan_exist, bt_link_info->a2dp_exist, ++ bt_link_info->bt_hi_pri_link_exist); ++ CL_PRINTF(cli_buf); ++ ++ if (stack_info->profile_notified) ++ btcoexist->btc_disp_dbg_msg(btcoexist, ++ BTC_DBG_DISP_BT_LINK_INFO); ++ else { ++ bt_info_ext = coex_sta->bt_info_ext; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s", ++ "BT Role/A2DP rate", ++ (bt_link_info->slave_role) ? "Slave" : "Master", ++ (bt_info_ext & BIT(0)) ? "BR" : "EDR"); ++ CL_PRINTF(cli_buf); ++ } ++ ++ ++ for (i = 0; i < BT_INFO_SRC_8703B_1ANT_MAX; i++) { ++ if (coex_sta->bt_info_c2h_cnt[i]) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", ++ glbt_info_src_8703b_1ant[i], ++ coex_sta->bt_info_c2h[i][0], ++ coex_sta->bt_info_c2h[i][1], ++ coex_sta->bt_info_c2h[i][2], ++ coex_sta->bt_info_c2h[i][3], ++ coex_sta->bt_info_c2h[i][4], ++ coex_sta->bt_info_c2h[i][5], ++ coex_sta->bt_info_c2h[i][6], ++ coex_sta->bt_info_c2h_cnt[i]); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ if (btcoexist->manual_control) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[mechanisms] (before Manual)============"); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[mechanisms]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", ++ "SM[LowPenaltyRA]", ++ coex_dm->cur_low_penalty_ra); ++ CL_PRINTF(cli_buf); ++ ++ ps_tdma_case = coex_dm->cur_ps_tdma; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", ++ "PS TDMA", ++ coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1], ++ coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3], ++ coex_dm->ps_tdma_para[4], ps_tdma_case, ++ (coex_dm->cur_ps_tdma_on ? "On" : "Off"), ++ (coex_dm->auto_tdma_adjust ? "Adj" : "Fix")); ++ ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", ++ "WL/BT Coex Table Type", ++ coex_sta->coex_table_type); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x6c0/0x6c4/0x6c8(coexTable)", ++ u32tmp[0], u32tmp[1], u32tmp[2]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6cc); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x778/0x6cc/IgnWlanAct", ++ u8tmp[0], u32tmp[0], coex_dm->cur_ignore_wlan_act); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, ++ 0xa0); ++ u32tmp[1] = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, ++ 0xa4); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "LTE Coex Table W_L/B_L", ++ u32tmp[0] & 0xffff, u32tmp[1] & 0xffff); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, ++ 0xa8); ++ u32tmp[1] = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, ++ 0xac); ++ u32tmp[2] = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, ++ 0xb0); ++ u32tmp[3] = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, ++ 0xb4); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", ++ "LTE Break Table W_L/B_L/L_W/L_B", ++ u32tmp[0] & 0xffff, u32tmp[1] & 0xffff, ++ u32tmp[2] & 0xffff, u32tmp[3] & 0xffff); ++ CL_PRINTF(cli_buf); ++ ++ /* Hw setting */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Hw setting]============"); ++ CL_PRINTF(cli_buf); ++ ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434); ++ u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", ++ "0x430/0x434/0x42a/0x456", ++ u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ ++ u32tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, 0x38); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x73); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %s", ++ "LTE CoexOn/Path Ctrl Owner", ++ (int)((u32tmp[0]&BIT(7)) >> 7), ((u8tmp[0]&BIT(2)) ? "WL" : "BT")); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", ++ "LTE 3Wire/OPMode/UART/UARTMode", ++ (int)((u32tmp[0]&BIT(6)) >> 6), (int)((u32tmp[0] & (BIT(5) | BIT(4))) >> 4), ++ (int)((u32tmp[0]&BIT(3)) >> 3), ++ (int)(u32tmp[0] & (BIT(2) | BIT(1) | BIT(0)))); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s", ++ "GNT_WL_SWCtrl/GNT_BT_SWCtrl/Dbg", ++ (int)((u32tmp[0]&BIT(12)) >> 12), (int)((u32tmp[0]&BIT(14)) >> 14), ++ ((u8tmp[0]&BIT(3)) ? "On" : "Off")); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = halbtc8703b1ant_LTECoex_InDirectReadReg(btcoexist, 0x54); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", ++ "GNT_WL/GNT_BT/LTE_Busy/UART_Busy", ++ (int)((u32tmp[0]&BIT(2)) >> 2), (int)((u32tmp[0]&BIT(3)) >> 3), ++ (int)((u32tmp[0]&BIT(1)) >> 1), (int)(u32tmp[0]&BIT(0))); ++ CL_PRINTF(cli_buf); ++ ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x4c6); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x4c6[4]/0x40[5] (WL/BT PTA)", ++ (int)((u8tmp[0] & BIT(4)) >> 4), (int)((u8tmp[1] & BIT(5)) >> 5)); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x953); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ %s", ++ "0x550(bcn ctrl)/0x522/4-RxAGC", ++ u32tmp[0], u8tmp[0], (u8tmp[1] & 0x2) ? "On" : "Off"); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xda0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xda4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0xda8); ++ u32tmp[3] = btcoexist->btc_read_4byte(btcoexist, 0xcf0); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c); ++ ++ fa_of_dm = ((u32tmp[0] & 0xffff0000) >> 16) + ((u32tmp[1] & 0xffff0000) ++ >> 16) + (u32tmp[1] & 0xffff) + (u32tmp[2] & 0xffff) + ++ ((u32tmp[3] & 0xffff0000) >> 16) + (u32tmp[3] & ++ 0xffff) ; ++ fa_cck = (u8tmp[0] << 8) + u8tmp[1]; ++ ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xc50); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", ++ "0xc50/OFDM-CCA/OFDM-FA/CCK-FA", ++ u32tmp[1] & 0xff, u32tmp[0] & 0xffff, fa_of_dm, fa_cck); ++ CL_PRINTF(cli_buf); ++ ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", ++ "CRC_OK CCK/11g/11n/11n-Agg", ++ coex_sta->crc_ok_cck, coex_sta->crc_ok_11g, ++ coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_agg); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", ++ "CRC_Err CCK/11g/11n/11n-Agg", ++ coex_sta->crc_err_cck, coex_sta->crc_err_11g, ++ coex_sta->crc_err_11n, coex_sta->crc_err_11n_agg); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x770(high-pri rx/tx)", ++ coex_sta->high_priority_rx, coex_sta->high_priority_tx); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x774(low-pri rx/tx)", ++ coex_sta->low_priority_rx, coex_sta->low_priority_tx); ++ CL_PRINTF(cli_buf); ++ ++ halbtc8703b1ant_ReadScoreBoard(btcoexist, &u16tmp[0]); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %04x", ++ "ScoreBoard[14:0] (from BT)", u16tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++#if (BT_AUTO_REPORT_ONLY_8703B_1ANT == 1) ++ /* halbtc8703b1ant_monitor_bt_ctr(btcoexist); */ ++#endif ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++void ex_halbtc8703b1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (btcoexist->manual_control || btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_IPS_ENTER == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS ENTER notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = true; ++ coex_sta->under_lps = false; ++ ++ /* Write WL "Active" in Score-board for LPS off */ ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, false); ++ ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, false, true); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ } else if (BTC_IPS_LEAVE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS LEAVE notify\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, true); ++ ++ halbtc8703b1ant_init_hw_config(btcoexist, false, false); ++ halbtc8703b1ant_init_coex_dm(btcoexist); ++ halbtc8703b1ant_query_bt_info(btcoexist); ++ ++ coex_sta->under_ips = false; ++ } ++} ++ ++void ex_halbtc8703b1ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (btcoexist->manual_control || btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_LPS_ENABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS ENABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = true; ++ coex_sta->under_ips = false; ++ ++ if (coex_sta->force_lps_on == true) { /* LPS No-32K */ ++ /* Write WL "Active" in Score-board for PS-TDMA */ ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, true); ++ ++ } else { /* LPS-32K, need check if this h2c 0x71 can work?? (2015/08/28) */ ++ /* Write WL "Non-Active" in Score-board for Native-PS */ ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, false); ++ ++ } ++ } else if (BTC_LPS_DISABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS DISABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = false; ++ ++ ++ /* Write WL "Active" in Score-board for LPS off */ ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, true); ++ ++ } ++} ++ ++void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean wifi_connected = false, bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_SCAN_START == type) { ++ coex_sta->wifi_is_high_pri_task = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN START notify\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, true); ++ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, ++ 8); /* Force antenna setup for no scan result issue */ ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ FORCE_EXEC, false, false); ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, ++ &coex_sta->scan_ap_num); ++ } ++ ++ if (coex_sta->bt_disabled) ++ return; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ halbtc8703b1ant_query_bt_info(btcoexist); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8703b1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8703b1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8703b1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_SCAN_START == type) { ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8703b1ant_action_wifi_not_connected_scan( ++ btcoexist); ++ else /* wifi is connected */ ++ halbtc8703b1ant_action_wifi_connected_scan(btcoexist); ++ } else if (BTC_SCAN_FINISH == type) { ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8703b1ant_action_wifi_not_connected(btcoexist); ++ else ++ halbtc8703b1ant_action_wifi_connected(btcoexist); ++ } ++} ++ ++void ex_halbtc8703b1ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean wifi_connected = false, bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_ASSOCIATE_START == type) { ++ coex_sta->wifi_is_high_pri_task = true; ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, true); ++ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, ++ 8); /* Force antenna setup for no scan result issue */ ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ FORCE_EXEC, false, false); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT START notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->arp_cnt = 0; ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ /* coex_dm->arp_cnt = 0; */ ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8703b1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8703b1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8703b1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_ASSOCIATE_START == type) ++ halbtc8703b1ant_action_wifi_not_connected_asso_auth(btcoexist); ++ else if (BTC_ASSOCIATE_FINISH == type) { ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8703b1ant_action_wifi_not_connected(btcoexist); ++ else ++ halbtc8703b1ant_action_wifi_connected(btcoexist); ++ } ++} ++ ++void ex_halbtc8703b1ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean wifi_under_b_mode = false; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_MEDIA_CONNECT == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA connect notify\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, true); ++ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, ++ 8); /* Force antenna setup for no scan result issue */ ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ FORCE_EXEC, false, false); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ ++ /* Set CCK Tx/Rx high Pri except 11b mode */ ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, ++ 0x00); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, ++ 0x00); /* CCK Rx */ ++ } else { ++ /* btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x10); //CCK Tx */ ++ /* btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x10); //CCK Rx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, ++ 0x00); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, ++ 0x10); /* CCK Rx */ ++ } ++ ++ coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, ++ 0x430); ++ coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, ++ 0x434); ++ coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( ++ btcoexist, 0x42a); ++ coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte( ++ btcoexist, 0x456); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA disconnect notify\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, false); ++ coex_dm->arp_cnt = 0; ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x0); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */ ++ ++ coex_sta->cck_ever_lock = false; ++ } ++ ++ halbtc8703b1ant_UpdateWifiChannelInfo(btcoexist, type); ++ ++} ++ ++void ex_halbtc8703b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false, under_4way = false; ++ u8 agg_buf_size = 5; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type) { ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, true); ++ ++ if (BTC_PACKET_ARP == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet ARP notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ coex_dm->arp_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ARP Packet Count = %d\n", ++ coex_dm->arp_cnt); ++ BTC_TRACE(trace_buf); ++ ++ if ((coex_dm->arp_cnt >= 10) && ++ (!under_4way)) /* if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecificPacket(btcoexist) */ ++ coex_sta->wifi_is_high_pri_task = false; ++ else ++ coex_sta->wifi_is_high_pri_task = true; ++ } else { ++ coex_sta->wifi_is_high_pri_task = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet DHCP or EAPOL notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet [Type = %d] notify\n", type); ++ BTC_TRACE(trace_buf); ++ } ++ ++ coex_sta->specific_pkt_period_cnt = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8703b1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8703b1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8703b1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ ((BTC_PACKET_ARP == type) && (coex_sta->wifi_is_high_pri_task))) ++ halbtc8703b1ant_action_wifi_connected_specific_packet(btcoexist); ++} ++ ++void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length) ++{ ++ u8 bt_info = 0; ++ u8 i, rsp_source = 0; ++ boolean wifi_connected = false; ++ boolean bt_busy = false; ++ ++ coex_sta->c2h_bt_info_req_sent = false; ++ ++ rsp_source = tmp_buf[0] & 0xf; ++ if (rsp_source >= BT_INFO_SRC_8703B_1ANT_MAX) ++ rsp_source = BT_INFO_SRC_8703B_1ANT_WIFI_FW; ++ coex_sta->bt_info_c2h_cnt[rsp_source]++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source, ++ length); ++ BTC_TRACE(trace_buf); ++ for (i = 0; i < length; i++) { ++ coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; ++ if (i == 1) ++ bt_info = tmp_buf[i]; ++ if (i == length - 1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ ++ /* if 0xff, it means BT is under WHCK test */ ++ if (bt_info == 0xff) ++ coex_sta->bt_whck_test = true; ++ else ++ coex_sta->bt_whck_test = false; ++ ++ if (BT_INFO_SRC_8703B_1ANT_WIFI_FW != rsp_source) { ++ coex_sta->bt_retry_cnt = /* [3:0] */ ++ coex_sta->bt_info_c2h[rsp_source][2] & 0xf; ++ ++ if (coex_sta->bt_retry_cnt >= 1) ++ coex_sta->pop_event_cnt++; ++ ++ if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ++ coex_sta->c2h_bt_page = true; ++ else ++ coex_sta->c2h_bt_page = false; ++ ++ coex_sta->bt_rssi = ++ coex_sta->bt_info_c2h[rsp_source][3] * 2 - 90; ++ /* coex_sta->bt_info_c2h[rsp_source][3]*2+10; */ ++ ++ coex_sta->bt_info_ext = ++ coex_sta->bt_info_c2h[rsp_source][4]; ++ ++ coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2] ++ & 0x40); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK, ++ &coex_sta->bt_tx_rx_mask); ++ ++ ++ /* Here we need to resend some wifi info to BT */ ++ /* because bt is reset and loss of the info. */ ++ if (coex_sta->bt_info_ext & BIT(1)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (wifi_connected) ++ halbtc8703b1ant_UpdateWifiChannelInfo(btcoexist, ++ BTC_MEDIA_CONNECT); ++ else ++ halbtc8703b1ant_UpdateWifiChannelInfo(btcoexist, ++ BTC_MEDIA_DISCONNECT); ++ } ++ ++ if (coex_sta->bt_info_ext & BIT(3)) { ++ if (!btcoexist->manual_control && ++ !btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_ignore_wlan_act(btcoexist, ++ FORCE_EXEC, false); ++ } ++ } else { ++ /* BT already NOT ignore Wlan active, do nothing here. */ ++ } ++#if (BT_AUTO_REPORT_ONLY_8703B_1ANT == 0) ++ if ((coex_sta->bt_info_ext & BIT(4))) { ++ /* BT auto report already enabled, do nothing */ ++ } else ++ halbtc8703b1ant_bt_auto_report(btcoexist, FORCE_EXEC, ++ true); ++#endif ++ } ++ ++ /* check BIT2 first ==> check if bt is under inquiry or page scan */ ++ if (bt_info & BT_INFO_8703B_1ANT_B_INQ_PAGE) ++ coex_sta->c2h_bt_inquiry_page = true; ++ else ++ coex_sta->c2h_bt_inquiry_page = false; ++ ++ coex_sta->num_of_profile = 0; ++ ++ /* set link exist status */ ++ if (!(bt_info & BT_INFO_8703B_1ANT_B_CONNECTION)) { ++ coex_sta->bt_link_exist = false; ++ coex_sta->pan_exist = false; ++ coex_sta->a2dp_exist = false; ++ coex_sta->hid_exist = false; ++ coex_sta->sco_exist = false; ++ ++ coex_sta->bt_hi_pri_link_exist = false; ++ } else { /* connection exists */ ++ coex_sta->bt_link_exist = true; ++ if (bt_info & BT_INFO_8703B_1ANT_B_FTP) { ++ coex_sta->pan_exist = true; ++ coex_sta->num_of_profile++; ++ } else ++ coex_sta->pan_exist = false; ++ if (bt_info & BT_INFO_8703B_1ANT_B_A2DP) { ++ coex_sta->a2dp_exist = true; ++ coex_sta->num_of_profile++; ++ } else ++ coex_sta->a2dp_exist = false; ++ if (bt_info & BT_INFO_8703B_1ANT_B_HID) { ++ coex_sta->hid_exist = true; ++ coex_sta->num_of_profile++; ++ } else ++ coex_sta->hid_exist = false; ++ if (bt_info & BT_INFO_8703B_1ANT_B_SCO_ESCO) { ++ coex_sta->sco_exist = true; ++ coex_sta->num_of_profile++; ++ } else ++ coex_sta->sco_exist = false; ++ ++ if ((coex_sta->hid_exist == false) && ++ (coex_sta->c2h_bt_inquiry_page == false) && ++ (coex_sta->sco_exist == false)) { ++ if (coex_sta->high_priority_tx + ++ coex_sta->high_priority_rx >= 160) { ++ coex_sta->hid_exist = true; ++ coex_sta->wrong_profile_notification++; ++ coex_sta->num_of_profile++; ++ bt_info = bt_info | 0x28; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT HID = true (Hi-Pri > 160)!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ ++ /* Add Hi-Pri Tx/Rx counter to avoid false detection */ ++ if (((coex_sta->hid_exist) || (coex_sta->sco_exist)) && ++ (coex_sta->high_priority_tx + coex_sta->high_priority_rx ++ >= 160) ++ && (!coex_sta->c2h_bt_inquiry_page)) ++ coex_sta->bt_hi_pri_link_exist = true; ++ else ++ coex_sta->bt_hi_pri_link_exist = false; ++ ++ if ((bt_info & BT_INFO_8703B_1ANT_B_ACL_BUSY) && ++ (coex_sta->num_of_profile == 0)) { ++ if (coex_sta->low_priority_tx + ++ coex_sta->low_priority_rx >= 160) { ++ coex_sta->pan_exist = true; ++ coex_sta->num_of_profile++; ++ coex_sta->wrong_profile_notification++; ++ bt_info = bt_info | 0x88; ++ } ++ } ++ } ++ ++ halbtc8703b1ant_update_bt_link_info(btcoexist); ++ ++ bt_info = bt_info & ++ 0x1f; /* mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) */ ++ ++ if (!(bt_info & BT_INFO_8703B_1ANT_B_CONNECTION)) { ++ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info == ++ BT_INFO_8703B_1ANT_B_CONNECTION) { /* connection exists but no busy */ ++ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if ((bt_info & BT_INFO_8703B_1ANT_B_SCO_ESCO) || ++ (bt_info & BT_INFO_8703B_1ANT_B_SCO_BUSY)) { ++ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_SCO_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info & BT_INFO_8703B_1ANT_B_ACL_BUSY) { ++ if (BT_8703B_1ANT_BT_STATUS_ACL_BUSY != coex_dm->bt_status) ++ coex_dm->auto_tdma_adjust = false; ++ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_ACL_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_MAX; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if ((BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) ++ bt_busy = true; ++ else ++ bt_busy = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ halbtc8703b1ant_run_coexist_mechanism(btcoexist); ++} ++ ++void ex_halbtc8703b1ant_rf_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], RF Status notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_RF_ON == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RF is turned ON!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, true); ++ halbtc8703b1ant_init_hw_config(btcoexist, false, false); ++ btcoexist->stop_coex_dm = false; ++ } else if (BTC_RF_OFF == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RF is turned OFF!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, false); ++ ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, false, true); ++ halbtc8703b1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ btcoexist->stop_coex_dm = true; ++ ++ } ++} ++ ++void ex_halbtc8703b1ant_halt_notify(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, false); ++ ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, FORCE_EXEC, ++ false, true); ++ ++ halbtc8703b1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ++ ex_halbtc8703b1ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); ++ ++ halbtc8703b1ant_enable_gnt_to_gpio(btcoexist, FALSE); ++ ++ btcoexist->stop_coex_dm = true; ++} ++ ++void ex_halbtc8703b1ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_WIFI_PNP_SLEEP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to SLEEP\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, false); ++ ++ halbtc8703b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, false, true); ++ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ ++ btcoexist->stop_coex_dm = true; ++ } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to WAKE UP\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8703b1ant_PostActiveStateToBT(btcoexist, true); ++ ++ btcoexist->stop_coex_dm = false; ++ halbtc8703b1ant_init_hw_config(btcoexist, false, false); ++ halbtc8703b1ant_init_coex_dm(btcoexist); ++ halbtc8703b1ant_query_bt_info(btcoexist); ++ } ++} ++ ++ ++void ex_halbtc8703b1ant_ScoreBoardStatusNotify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length) ++{ ++ /* */ ++ ++ ++} ++ ++void ex_halbtc8703b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], *****************Coex DM Reset*****************\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8703b1ant_init_hw_config(btcoexist, false, false); ++ /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */ ++ /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x2, 0xfffff, 0x0); */ ++ halbtc8703b1ant_init_coex_dm(btcoexist); ++} ++ ++void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist) ++{ ++ ++#if (BT_AUTO_REPORT_ONLY_8703B_1ANT == 0) ++ halbtc8703b1ant_query_bt_info(btcoexist); ++ halbtc8703b1ant_monitor_bt_enable_disable(btcoexist); ++#else ++ halbtc8703b1ant_monitor_bt_ctr(btcoexist); ++ halbtc8703b1ant_monitor_wifi_ctr(btcoexist); ++#if BT_8703B_1ANT_ANTDET_ENABLE ++ halbtc8703b1ant_monitor_bt_enable_disable(btcoexist); ++#endif ++ ++ if (halbtc8703b1ant_is_wifi_status_changed(btcoexist) || ++ coex_dm->auto_tdma_adjust) ++ ++ halbtc8703b1ant_run_coexist_mechanism(btcoexist); ++ ++ coex_sta->specific_pkt_period_cnt++; ++ ++#endif ++} ++ ++void ex_halbtc8703b1ant_antenna_detection(IN struct btc_coexist *btcoexist, ++ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds) ++{ ++ /* No Antenna Detection required because 8730b is only 1-Ant */ ++} ++ ++void ex_halbtc8703b1ant_antenna_isolation(IN struct btc_coexist *btcoexist, ++ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds) ++{ ++ ++ ++} ++ ++void ex_halbtc8703b1ant_psd_scan(IN struct btc_coexist *btcoexist, ++ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds) ++{ ++ ++ ++} ++ ++void ex_halbtc8703b1ant_display_ant_detection(IN struct btc_coexist *btcoexist) ++{ ++ ++} ++ ++#endif ++ ++#endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */ +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b1Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b1Ant.h +new file mode 100644 +index 0000000..28fcfca +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b1Ant.h +@@ -0,0 +1,343 @@ ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8703B_SUPPORT == 1) ++/* ******************************************* ++ * The following is for 8703B 1ANT BT Co-exist definition ++ * ******************************************* */ ++#define BT_AUTO_REPORT_ONLY_8703B_1ANT 1 ++#define BT_8703B_1ANT_ENABLE_GNTBT_TO_GPIO14 0 ++ ++#define BT_INFO_8703B_1ANT_B_FTP BIT(7) ++#define BT_INFO_8703B_1ANT_B_A2DP BIT(6) ++#define BT_INFO_8703B_1ANT_B_HID BIT(5) ++#define BT_INFO_8703B_1ANT_B_SCO_BUSY BIT(4) ++#define BT_INFO_8703B_1ANT_B_ACL_BUSY BIT(3) ++#define BT_INFO_8703B_1ANT_B_INQ_PAGE BIT(2) ++#define BT_INFO_8703B_1ANT_B_SCO_ESCO BIT(1) ++#define BT_INFO_8703B_1ANT_B_CONNECTION BIT(0) ++ ++#define BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT(0))) ? true : false) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT 2 ++ ++#define BT_8703B_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */ ++ ++/* for Antenna detection */ ++#define BT_8703B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50 ++#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70 ++#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55 ++#define BT_8703B_1ANT_ANTDET_PSDTHRES_1ANT 35 ++#define BT_8703B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */ ++#define BT_8703B_1ANT_ANTDET_ENABLE 0 ++#define BT_8703B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0 ++ ++#define BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000 ++ ++enum bt_8703b_1ant_signal_state { ++ BT_8703B_1ANT_SIG_STA_SET_TO_LOW = 0x0, ++ BT_8703B_1ANT_SIG_STA_SET_BY_HW = 0x0, ++ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH = 0x1, ++ BT_8703B_1ANT_SIG_STA_MAX ++}; ++ ++enum bt_8703b_1ant_path_ctrl_owner { ++ BT_8703B_1ANT_PCO_BTSIDE = 0x0, ++ BT_8703B_1ANT_PCO_WLSIDE = 0x1, ++ BT_8703B_1ANT_PCO_MAX ++}; ++ ++enum bt_8703b_1ant_gnt_ctrl_type { ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0, ++ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1, ++ BT_8703B_1ANT_GNT_TYPE_MAX ++}; ++ ++enum bt_8703b_1ant_gnt_ctrl_block { ++ BT_8703B_1ANT_GNT_BLOCK_RFC_BB = 0x0, ++ BT_8703B_1ANT_GNT_BLOCK_RFC = 0x1, ++ BT_8703B_1ANT_GNT_BLOCK_BB = 0x2, ++ BT_8703B_1ANT_GNT_BLOCK_MAX ++}; ++ ++enum bt_8703b_1ant_lte_coex_table_type { ++ BT_8703B_1ANT_CTT_WL_VS_LTE = 0x0, ++ BT_8703B_1ANT_CTT_BT_VS_LTE = 0x1, ++ BT_8703B_1ANT_CTT_MAX ++}; ++ ++enum bt_8703b_1ant_lte_break_table_type { ++ BT_8703B_1ANT_LBTT_WL_BREAK_LTE = 0x0, ++ BT_8703B_1ANT_LBTT_BT_BREAK_LTE = 0x1, ++ BT_8703B_1ANT_LBTT_LTE_BREAK_WL = 0x2, ++ BT_8703B_1ANT_LBTT_LTE_BREAK_BT = 0x3, ++ BT_8703B_1ANT_LBTT_MAX ++}; ++ ++enum bt_info_src_8703b_1ant { ++ BT_INFO_SRC_8703B_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8703B_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8703B_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8703B_1ANT_MAX ++}; ++ ++enum bt_8703b_1ant_bt_status { ++ BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8703B_1ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8703B_1ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8703B_1ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8703B_1ANT_BT_STATUS_MAX ++}; ++ ++enum bt_8703b_1ant_wifi_status { ++ BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, ++ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, ++ BT_8703B_1ANT_WIFI_STATUS_MAX ++}; ++ ++enum bt_8703b_1ant_coex_algo { ++ BT_8703B_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8703B_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8703B_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8703B_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8703B_1ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8703B_1ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8703B_1ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8703B_1ANT_COEX_ALGO_MAX = 0xb, ++}; ++ ++struct coex_dm_8703b_1ant { ++ /* hw setting */ ++ u8 pre_ant_pos_type; ++ u8 cur_ant_pos_type; ++ /* fw mechanism */ ++ boolean cur_ignore_wlan_act; ++ boolean pre_ignore_wlan_act; ++ u8 pre_ps_tdma; ++ u8 cur_ps_tdma; ++ u8 ps_tdma_para[5]; ++ u8 ps_tdma_du_adj_type; ++ boolean auto_tdma_adjust; ++ boolean pre_ps_tdma_on; ++ boolean cur_ps_tdma_on; ++ boolean pre_bt_auto_report; ++ boolean cur_bt_auto_report; ++ u8 pre_lps; ++ u8 cur_lps; ++ u8 pre_rpwm; ++ u8 cur_rpwm; ++ ++ /* sw mechanism */ ++ boolean pre_low_penalty_ra; ++ boolean cur_low_penalty_ra; ++ u32 pre_val0x6c0; ++ u32 cur_val0x6c0; ++ u32 pre_val0x6c4; ++ u32 cur_val0x6c4; ++ u32 pre_val0x6c8; ++ u32 cur_val0x6c8; ++ u8 pre_val0x6cc; ++ u8 cur_val0x6cc; ++ boolean limited_dig; ++ ++ u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */ ++ u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */ ++ u16 backup_retry_limit; ++ u8 backup_ampdu_max_time; ++ ++ /* algorithm related */ ++ u8 pre_algorithm; ++ u8 cur_algorithm; ++ u8 bt_status; ++ u8 wifi_chnl_info[3]; ++ ++ u32 pre_ra_mask; ++ u32 cur_ra_mask; ++ u8 pre_arfr_type; ++ u8 cur_arfr_type; ++ u8 pre_retry_limit_type; ++ u8 cur_retry_limit_type; ++ u8 pre_ampdu_time_type; ++ u8 cur_ampdu_time_type; ++ u32 arp_cnt; ++ ++ u8 error_condition; ++}; ++ ++struct coex_sta_8703b_1ant { ++ boolean bt_disabled; ++ boolean bt_link_exist; ++ boolean sco_exist; ++ boolean a2dp_exist; ++ boolean hid_exist; ++ boolean pan_exist; ++ boolean bt_hi_pri_link_exist; ++ u8 num_of_profile; ++ ++ boolean under_lps; ++ boolean under_ips; ++ u32 specific_pkt_period_cnt; ++ u32 high_priority_tx; ++ u32 high_priority_rx; ++ u32 low_priority_tx; ++ u32 low_priority_rx; ++ s8 bt_rssi; ++ boolean bt_tx_rx_mask; ++ u8 pre_bt_rssi_state; ++ u8 pre_wifi_rssi_state[4]; ++ boolean c2h_bt_info_req_sent; ++ u8 bt_info_c2h[BT_INFO_SRC_8703B_1ANT_MAX][10]; ++ u32 bt_info_c2h_cnt[BT_INFO_SRC_8703B_1ANT_MAX]; ++ boolean bt_whck_test; ++ boolean c2h_bt_inquiry_page; ++ boolean c2h_bt_page; /* Add for win8.1 page out issue */ ++ boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */ ++ u8 bt_retry_cnt; ++ u8 bt_info_ext; ++ u32 pop_event_cnt; ++ u8 scan_ap_num; ++ ++ u32 crc_ok_cck; ++ u32 crc_ok_11g; ++ u32 crc_ok_11n; ++ u32 crc_ok_11n_agg; ++ ++ u32 crc_err_cck; ++ u32 crc_err_11g; ++ u32 crc_err_11n; ++ u32 crc_err_11n_agg; ++ ++ boolean cck_lock; ++ boolean pre_ccklock; ++ boolean cck_ever_lock; ++ u8 coex_table_type; ++ ++ boolean force_lps_on; ++ u32 wrong_profile_notification; ++ ++ boolean concurrent_rx_mode_on; ++ ++ u16 score_board; ++}; ++ ++#define BT_8703B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */ ++#define BT_8703B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */ ++#define BT_8703B_1ANT_ANTDET_BUF_LEN 16 ++ ++struct psdscan_sta_8703b_1ant { ++ ++ u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */ ++ u32 ant_det_bt_tx_time; ++ u32 ant_det_pre_psdscan_peak_val; ++ boolean ant_det_is_ant_det_available; ++ u32 ant_det_psd_scan_peak_val; ++ boolean ant_det_is_btreply_available; ++ u32 ant_det_psd_scan_peak_freq; ++ ++ u8 ant_det_result; ++ u8 ant_det_peak_val[BT_8703B_1ANT_ANTDET_BUF_LEN]; ++ u8 ant_det_peak_freq[BT_8703B_1ANT_ANTDET_BUF_LEN]; ++ u32 ant_det_try_count; ++ u32 ant_det_fail_count; ++ u32 ant_det_inteval_count; ++ u32 ant_det_thres_offset; ++ ++ u32 real_cent_freq; ++ s32 real_offset; ++ u32 real_span; ++ ++ u32 psd_band_width; /* unit: Hz */ ++ u32 psd_point; /* 128/256/512/1024 */ ++ u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */ ++ u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */ ++ u32 psd_start_point; ++ u32 psd_stop_point; ++ u32 psd_max_value_point; ++ u32 psd_max_value; ++ u32 psd_start_base; ++ u32 psd_avg_num; /* 1/8/16/32 */ ++ u32 psd_gen_count; ++ boolean is_psd_running; ++ boolean is_psd_show_max_only; ++}; ++ ++/* ******************************************* ++ * The following is interface which will notify coex module. ++ * ******************************************* */ ++void ex_halbtc8703b1ant_power_on_setting(IN struct btc_coexist *btcoexist); ++void ex_halbtc8703b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist); ++void ex_halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only); ++void ex_halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist); ++void ex_halbtc8703b1ant_ips_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8703b1ant_lps_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8703b1ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8703b1ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8703b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length); ++void ex_halbtc8703b1ant_rf_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8703b1ant_halt_notify(IN struct btc_coexist *btcoexist); ++void ex_halbtc8703b1ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state); ++void ex_halbtc8703b1ant_ScoreBoardStatusNotify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length); ++void ex_halbtc8703b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist); ++void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist); ++void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist); ++void ex_halbtc8703b1ant_antenna_detection(IN struct btc_coexist *btcoexist, ++ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds); ++void ex_halbtc8703b1ant_antenna_isolation(IN struct btc_coexist *btcoexist, ++ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds); ++ ++void ex_halbtc8703b1ant_psd_scan(IN struct btc_coexist *btcoexist, ++ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds); ++void ex_halbtc8703b1ant_display_ant_detection(IN struct btc_coexist *btcoexist); ++ ++#else ++#define ex_halbtc8703b1ant_power_on_setting(btcoexist) ++#define ex_halbtc8703b1ant_pre_load_firmware(btcoexist) ++#define ex_halbtc8703b1ant_init_hw_config(btcoexist, wifi_only) ++#define ex_halbtc8703b1ant_init_coex_dm(btcoexist) ++#define ex_halbtc8703b1ant_ips_notify(btcoexist, type) ++#define ex_halbtc8703b1ant_lps_notify(btcoexist, type) ++#define ex_halbtc8703b1ant_scan_notify(btcoexist, type) ++#define ex_halbtc8703b1ant_connect_notify(btcoexist, type) ++#define ex_halbtc8703b1ant_media_status_notify(btcoexist, type) ++#define ex_halbtc8703b1ant_specific_packet_notify(btcoexist, type) ++#define ex_halbtc8703b1ant_bt_info_notify(btcoexist, tmp_buf, length) ++#define ex_halbtc8703b1ant_rf_status_notify(btcoexist, type) ++#define ex_halbtc8703b1ant_halt_notify(btcoexist) ++#define ex_halbtc8703b1ant_pnp_notify(btcoexist, pnp_state) ++#define ex_halbtc8703b1ant_ScoreBoardStatusNotify(btcoexist, tmp_buf, length) ++#define ex_halbtc8703b1ant_coex_dm_reset(btcoexist) ++#define ex_halbtc8703b1ant_periodical(btcoexist) ++#define ex_halbtc8703b1ant_display_coex_info(btcoexist) ++#define ex_halbtc8703b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds) ++#define ex_halbtc8703b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds) ++#define ex_halbtc8703b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds) ++#define ex_halbtc8703b1ant_display_ant_detection(btcoexist) ++ ++#endif ++ ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b2Ant.c +new file mode 100644 +index 0000000..81e6b9c +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b2Ant.c +@@ -0,0 +1,4864 @@ ++//============================================================ ++// Description: ++// ++// This file is for RTL8703B Co-exist mechanism ++// ++// History ++// 2012/11/15 Cosa first check in. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8703b2Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8703B_2ANT GLCoexDm8703b2Ant; ++static PCOEX_DM_8703B_2ANT pCoexDm=&GLCoexDm8703b2Ant; ++static COEX_STA_8703B_2ANT GLCoexSta8703b2Ant; ++static PCOEX_STA_8703B_2ANT pCoexSta=&GLCoexSta8703b2Ant; ++ ++const char *const GLBtInfoSrc8703b2Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u4Byte GLCoexVerDate8703b2Ant=20140903; ++u4Byte GLCoexVer8703b2Ant=0x43; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8703b2ant_ ++//============================================================ ++u1Byte ++halbtc8703b2ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8703b2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8703b2ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ } ++ else ++ { ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_LimitedRx( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRejApAggPkt, ++ IN BOOLEAN bBtCtrlAggBufSize, ++ IN u1Byte aggBufSize ++ ) ++{ ++ BOOLEAN bRejectRxAgg=bRejApAggPkt; ++ BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; ++ u1Byte rxAggSize=aggBufSize; ++ ++ //============================================ ++ // Rx Aggregation related setting ++ //============================================ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); ++ // decide BT control aggregation buf size or not ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); ++ // aggregation buf size, only work when BT control Rx aggregation size. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); ++ // real update aggregation setting ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++} ++ ++VOID ++halbtc8703b2ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp; ++ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ if ( (pCoexSta->lowPriorityRx >= 950) && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bUnderIps) ) ++ { ++ pBtLinkInfo->bSlaveRole = TRUE; ++ } ++ else ++ { ++ pBtLinkInfo->bSlaveRole = FALSE; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++} ++ ++VOID ++halbtc8703b2ant_MonitorWiFiCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ u2Byte u2Tmp[3]; ++ s4Byte wifiRssi=0; ++ BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; ++ static u1Byte nCCKLockCounter = 0; ++ ++ ++ if (pCoexSta->bUnderIps) ++ { ++ pCoexSta->nCRCOK_CCK = 0; ++ pCoexSta->nCRCOK_11g = 0; ++ pCoexSta->nCRCOK_11n = 0; ++ pCoexSta->nCRCOK_11nAgg = 0; ++ ++ pCoexSta->nCRCErr_CCK = 0; ++ pCoexSta->nCRCErr_11g = 0; ++ pCoexSta->nCRCErr_11n = 0; ++ pCoexSta->nCRCErr_11nAgg = 0; ++ } ++ else ++ { ++ pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); ++ pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); ++ pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); ++ pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); ++ ++ pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); ++ pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); ++ pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); ++ pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); ++ } ++ ++ //reset counter ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); ++} ++ ++VOID ++halbtc8703b2ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); ++} ++ ++BOOLEAN ++halbtc8703b2ant_IsWifiStatusChanged( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; ++ BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; ++ ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); ++ ++ if(bWifiConnected) ++ { ++ if(bWifiBusy != bPreWifiBusy) ++ { ++ bPreWifiBusy = bWifiBusy; ++ return TRUE; ++ } ++ if(bUnder4way != bPreUnder4way) ++ { ++ bPreUnder4way = bUnder4way; ++ return TRUE; ++ } ++ if(bBtHsOn != bPreBtHsOn) ++ { ++ bPreBtHsOn = bBtHsOn; ++ return TRUE; ++ } ++ ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist,3, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ ++ if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState )) ++ { ++ return TRUE; ++ } ++ ++ } ++ ++ return FALSE; ++} ++ ++VOID ++halbtc8703b2ant_UpdateBtLinkInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ ++#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 1) // profile from bt patch ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pCoexSta->bScoExist; ++ pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; ++ pBtLinkInfo->bPanExist = pCoexSta->bPanExist; ++ pBtLinkInfo->bHidExist = pCoexSta->bHidExist; ++ ++ // work around for HS mode. ++ if(bBtHsOn) ++ { ++ pBtLinkInfo->bPanExist = TRUE; ++ pBtLinkInfo->bBtLinkExist = TRUE; ++ } ++#else // profile from bt stack ++ pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist; ++ pBtLinkInfo->bScoExist = pStackInfo->bScoExist; ++ pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist; ++ pBtLinkInfo->bPanExist = pStackInfo->bPanExist; ++ pBtLinkInfo->bHidExist = pStackInfo->bHidExist; ++ ++ //for win-8 stack HID report error ++ if(!pStackInfo->bHidExist) ++ pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack ++ // when stack HID report error, here we use the info from bt fw. ++ if(!pStackInfo->bBtLinkExist) ++ pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; ++#endif ++ // check if Sco only ++ if( pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bScoOnly = TRUE; ++ else ++ pBtLinkInfo->bScoOnly = FALSE; ++ ++ // check if A2dp only ++ if( !pBtLinkInfo->bScoExist && ++ pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bA2dpOnly = TRUE; ++ else ++ pBtLinkInfo->bA2dpOnly = FALSE; ++ ++ // check if Pan only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ pBtLinkInfo->bPanExist && ++ !pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bPanOnly = TRUE; ++ else ++ pBtLinkInfo->bPanOnly = FALSE; ++ ++ // check if Hid only ++ if( !pBtLinkInfo->bScoExist && ++ !pBtLinkInfo->bA2dpExist && ++ !pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bHidExist ) ++ pBtLinkInfo->bHidOnly = TRUE; ++ else ++ pBtLinkInfo->bHidOnly = FALSE; ++} ++ ++u1Byte ++halbtc8703b2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bBtHsOn=FALSE; ++ u1Byte algorithm=BT_8703B_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ if(!pBtLinkInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pBtLinkInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pBtLinkInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if(pBtLinkInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if(pBtLinkInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if(pBtLinkInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++#if 0 ++ if(pStackInfo->numOfHid >= 2) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ else ++#endif ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_A2DP_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pBtLinkInfo->bScoExist) ++ { ++ if( pBtLinkInfo->bHidExist && ++ pBtLinkInfo->bPanExist && ++ pBtLinkInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++VOID ++halbtc8703b2ant_SetFwDacSwingLevel( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte dacSwingLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ // There are several type of dacswing ++ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 ++ H2C_Parameter[0] = dacSwingLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_SetFwDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = decBtPwrLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n", ++ decBtPwrLvl, H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_DecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte decBtPwrLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n", ++ (bForceExec? "force to":""), decBtPwrLvl)); ++ pCoexDm->curBtDecPwrLvl = decBtPwrLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) ++ return; ++ } ++ halbtc8703b2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); ++ ++ pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; ++} ++ ++VOID ++halbtc8703b2ant_SetBtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bEnableAutoReport) ++ { ++ H2C_Parameter[0] |= BIT0; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", ++ (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_BtAutoReport( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnableAutoReport ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n", ++ (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); ++ pCoexDm->bCurBtAutoReport = bEnableAutoReport; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) ++ return; ++ } ++ halbtc8703b2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); ++ ++ pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; ++} ++ ++VOID ++halbtc8703b2ant_FwDacSwingLvl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte fwDacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", ++ (bForceExec? "force to":""), fwDacSwingLvl)); ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) ++ return; ++ } ++ ++ halbtc8703b2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); ++ ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++} ++ ++VOID ++halbtc8703b2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8703b2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8703b2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty ++ ++ if(bLowPenaltyRa) ++ { ++ H2C_Parameter[1] |= BIT0; ++ H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 ++ H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 ++ H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 ++ H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s", ++ (bLowPenaltyRa? "ON!!":"OFF!!")) ); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ //return; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8703b2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8703b2ant_SetDacSwingReg( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte level ++ ) ++{ ++ u1Byte val=(u1Byte)level; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val); ++} ++ ++VOID ++halbtc8703b2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ if(bSwDacSwingOn) ++ { ++ halbtc8703b2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); ++ } ++ else ++ { ++ halbtc8703b2ant_SetDacSwingReg(pBtCoexist, 0x18); ++ } ++} ++ ++ ++VOID ++halbtc8703b2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8703b2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8703b2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x3); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x1); ++ } ++} ++ ++VOID ++halbtc8703b2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8703b2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8703b2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ //=================BB AGC Gain Table ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001); ++ } ++ ++ ++ //=================RF Gain ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1); ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6); ++ } ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0); ++ ++ // set rssiAdjustVal for wifi module. ++ if(bAgcTableEn) ++ { ++ rssiAdjustVal = 8; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++VOID ++halbtc8703b2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8703b2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8703b2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8703b2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c4, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c4 = val0x6c4; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8703b2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8703b2ant_CoexTableWithType( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte type ++ ) ++{ ++ pCoexSta->nCoexTableType = type; ++ ++ switch(type) ++ { ++ case 0: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 8: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 9: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 10: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 11: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 12: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 13: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 14: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 15: ++ halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++VOID ++halbtc8703b2ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_SetLpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ u1Byte lps=lpsVal; ++ u1Byte rpwm=rpwmVal; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++VOID ++halbtc8703b2ant_LpsRpwm( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bForceExecPwrCmd=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", ++ (bForceExec? "force to":""), lpsVal, rpwmVal)); ++ pCoexDm->curLps = lpsVal; ++ pCoexDm->curRpwm = rpwmVal; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preLps == pCoexDm->curLps) && ++ (pCoexDm->preRpwm == pCoexDm->curRpwm) ) ++ { ++ return; ++ } ++ } ++ halbtc8703b2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); ++ ++ pCoexDm->preLps = pCoexDm->curLps; ++ pCoexDm->preRpwm = pCoexDm->curRpwm; ++} ++ ++VOID ++halbtc8703b2ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8703b2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8703b2ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ ++ ++ if ( (pCoexSta->bA2dpExist) && (pCoexSta->bHidExist) ) ++ { ++ byte5 = byte5 | 0x1; ++ } ++ ++ H2C_Parameter[0] = byte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = byte5; ++ ++ pCoexDm->psTdmaPara[0] = byte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = byte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); ++} ++ ++VOID ++halbtc8703b2ant_SwMechanism1( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bShrinkRxLPF, ++ IN BOOLEAN bLowPenaltyRA, ++ IN BOOLEAN bLimitedDIG, ++ IN BOOLEAN bBTLNAConstrain ++ ) ++{ ++ /* ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 ++ { ++ if (bShrinkRxLPF) ++ bShrinkRxLPF = FALSE; ++ } ++ */ ++ ++ //halbtc8703b2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); ++ halbtc8703b2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); ++} ++ ++VOID ++halbtc8703b2ant_SwMechanism2( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAGCTableShift, ++ IN BOOLEAN bADCBackOff, ++ IN BOOLEAN bSWDACSwing, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ //halbtc8703b2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); ++ //halbtc8703b2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); ++ //halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); ++} ++ ++VOID ++halbtc8703b2ant_SetAntPath( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte antPosType, ++ IN BOOLEAN bInitHwCfg, ++ IN BOOLEAN bWifiOff ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte fwVer=0, u4Tmp=0; ++ BOOLEAN bPgExtSwitch=FALSE; ++ BOOLEAN bUseExtSwitch=FALSE; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver ++ ++ if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch) ++ bUseExtSwitch = TRUE; ++ ++ if(bInitHwCfg) ++ { ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); ++ ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to High to avoid A2DP click */ ++ H2C_Parameter[0] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); ++ } ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); //WiFi TRx Mask off ++ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. ++ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); //BT TRx Mask off ++ ++ if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) ++ { ++ //tell firmware "no antenna inverse" ++ H2C_Parameter[0] = 0; ++ } ++ else ++ { ++ //tell firmware "antenna inverse" ++ H2C_Parameter[0] = 1; ++ } ++ ++ if (bUseExtSwitch) ++ { ++ //ext switch type ++ H2C_Parameter[1] = 1; ++ } ++ else ++ { ++ //int switch type ++ H2C_Parameter[1] = 0; ++ } ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); ++ } ++ else ++ { ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to "Control by PTA"*/ ++ H2C_Parameter[0] = 0; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0); ++ } ++ } ++ ++ // ext switch setting ++ if(bUseExtSwitch) ++ { ++ if (bInitHwCfg) ++ { ++ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp &=~BIT23; ++ u4Tmp |= BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ } ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT ++ switch(antPosType) ++ { ++ case BTC_ANT_WIFI_AT_MAIN: ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); // ext switch main at wifi ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); // ext switch aux at wifi ++ break; ++ } ++ } ++ else // internal switch ++ { ++ if (bInitHwCfg) ++ { ++ // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u4Tmp |= BIT23; ++ u4Tmp &=~BIT24; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); ++ } ++ ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //fixed external switch S1->Main, S0->Aux ++ switch(antPosType) ++ { ++ case BTC_ANT_WIFI_AT_MAIN: ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); // fixed internal switch S0->WiFi, S1->BT ++ break; ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bTurnOnByCnt=FALSE; ++ u1Byte psTdmaTypeByCnt=0; ++ u1Byte wifiRssiState1, btRssiState; ++ ++ ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ if (!(BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) && bTurnOn) ++ { ++ type = type +100; //for WiFi RSSI low or BT RSSI low ++ pCoexDm->bIsSwitchTo1dot5Ant = TRUE; ++ } ++ else ++ { ++ pCoexDm->bIsSwitchTo1dot5Ant = FALSE; ++ } ++ ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ if(bTurnOn) ++ { ++ switch(type) ++ { ++ case 1: ++ default: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 2: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90); ++ break; ++ case 3: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); ++ break; ++ case 4: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90); ++ break; ++ case 5: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90); ++ break; ++ case 6: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90); ++ break; ++ case 7: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); ++ break; ++ case 8: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90); ++ break; ++ case 9: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 10: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90); ++ break; ++ case 11: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); ++ break; ++ case 12: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x90); ++ break; ++ case 13: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90); ++ break; ++ case 14: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90); ++ break; ++ case 15: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); ++ break; ++ case 16: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90); ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0x70, 0x90); ++ break; ++ case 17: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90); ++ break; ++ case 18: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 71: ++ //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 101: ++ case 105: ++ case 171: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3a, 0x03, 0x70, 0x50); ++ break; ++ case 102: ++ case 106: ++ case 110: ++ case 114: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x2d, 0x03, 0x70, 0x50); ++ break; ++ case 103: ++ case 107: ++ case 111: ++ case 115: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x50); ++ break; ++ case 104: ++ case 108: ++ case 112: ++ case 116: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x10, 0x03, 0x70, 0x50); ++ break; ++ case 109: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 113: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x70, 0x90); ++ break; ++ case 121: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 22: ++ case 122: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x35, 0x03, 0x71, 0x11); ++ break; ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(type) ++ { ++ case 0: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); ++ break; ++ case 1: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); ++ break; ++ default: ++ halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); ++ break; ++ } ++ } ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++VOID ++halbtc8703b2ant_PsTdmaCheckForPowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bNewPsState ++ ) ++{ ++ u1Byte lpsMode=0x0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); ++ ++ if(lpsMode) // already under LPS state ++ { ++ if(bNewPsState) ++ { ++ // keep state under LPS, do nothing. ++ } ++ else ++ { ++ // will leave LPS state, turn off psTdma first ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ } ++ else // NO PS state ++ { ++ if(bNewPsState) ++ { ++ // will enter LPS state, turn off psTdma first ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ else ++ { ++ // keep state under NO PS state, do nothing. ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_PowerSaveState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte psType, ++ IN u1Byte lpsVal, ++ IN u1Byte rpwmVal ++ ) ++{ ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ switch(psType) ++ { ++ case BTC_PS_WIFI_NATIVE: ++ // recover to original 32k low power setting ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8703b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); ++ halbtc8703b2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); ++ // when coex force to enter LPS, do not enter 32k low power. ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ // power save must executed before psTdma. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ pCoexSta->bForceLpsOn = TRUE; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8703b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); ++ pCoexSta->bForceLpsOn = FALSE; ++ break; ++ default: ++ break; ++ } ++} ++ ++ ++VOID ++halbtc8703b2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw all off ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ // hw all off ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8703b2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++} ++ ++VOID ++halbtc8703b2ant_ActionBtInquiry( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ BOOLEAN bWifiConnected=FALSE; ++ BOOLEAN bLowPwrDisable=TRUE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ if(bScan || bLink || bRoam) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi link process + BT Inq/Page!!\n")); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ } ++ else if(bWifiConnected) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT Inq/Page!!\n")); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi no-link + BT Inq/Page!!\n")); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ } ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++/* ++ pCoexDm->bNeedRecover0x948 = TRUE; ++ pCoexDm->backup0x948 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ ++ halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_AUX, FALSE, FALSE); ++*/ ++} ++ ++ ++VOID ++halbtc8703b2ant_ActionWiFiLinkProcess( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte u4Tmp; ++ u1Byte u1Tmpa, u1Tmpb; ++ ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb)); ++} ++ ++BOOLEAN ++halbtc8703b2ant_ActionWifiIdleProcess( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ //wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-20, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ ++ // define the office environment ++ if(BTC_RSSI_HIGH(wifiRssiState1) && ++ (pCoexSta->bHidExist == TRUE) && (pCoexSta->bA2dpExist == TRUE)) ++ { ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n")); ++ ++ halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ return TRUE; ++ } ++ else ++ { ++ halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18); ++ return FALSE; ++ } ++ ++ ++} ++ ++ ++ ++BOOLEAN ++halbtc8703b2ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte btRssiState=BTC_RSSI_STATE_HIGH; ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; ++ BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE; ++ BOOLEAN bAsus8703b=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(!bWifiConnected) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n")); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ if(BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else if(BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bBtHsOn) ++ return FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ if(bWifiBusy) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n")); ++#if 0 ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_IS_ASUS_8703B, &bAsus8703b); ++ if(!bAsus8703b) ++ bCommon = FALSE; ++ else ++ bCommon = halbtc8703b2ant_ActionWifiIdleProcess(pBtCoexist); ++#else ++ bCommon = FALSE; ++#endif ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n")); ++ //bCommon = FALSE; ++ bCommon = halbtc8703b2ant_ActionWifiIdleProcess(pBtCoexist); ++ } ++ } ++ } ++ ++ return bCommon; ++} ++VOID ++halbtc8703b2ant_TdmaDurationAdjust( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bScoHid, ++ IN BOOLEAN bTxPause, ++ IN u1Byte maxInterval ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); ++ ++ if(!pCoexDm->bAutoTdmaAdjust) ++ { ++ pCoexDm->bAutoTdmaAdjust = TRUE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ { ++ if(bScoHid) ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ else ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ } ++ } ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", ++ up, dn, m, n, WaitCount)); ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); ++ if(maxInterval == 1) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ ++ if(pCoexDm->curPsTdma == 71) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); ++ pCoexDm->psTdmaDuAdjType = 71; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 71) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); ++ pCoexDm->psTdmaDuAdjType = 71; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 2) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 3) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ } ++ } ++ ++ // if current PsTdma not match with the recorded one (when scan, dhcp...), ++ // then we have to adjust it back to the previous record one. ++ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", ++ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if( !bScan && !bLink && !bRoam) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); ++ } ++ } ++} ++ ++// SCO only or SCO+PAN(HS) ++VOID ++halbtc8703b2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ else //for SCO quality & wifi performance balance at 11n mode ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8); ++ } ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4); ++ } ++ } ++} ++ ++ ++VOID ++halbtc8703b2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ } ++ else //for HID quality & wifi performance balance at 11n mode ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 9); ++ } ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8703b2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ ++ // define the office environment ++ if( (apNum >= 10) && BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ //DbgPrint(" AP#>10(%d)\n", apNum); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18); ++ } ++ return; ++ ++ } ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ } ++ else ++ { ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ } ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_ActionA2dpPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState,wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ } ++ else ++ { ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ } ++ ++ // sw mechanism ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++ ++//PAN(HS) only ++VOID ++halbtc8703b2ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8703b2ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12); ++ ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ else ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13); ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3); ++ //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); ++ } ++ else ++ { ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ } ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); ++ } ++ else ++ { ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8703b2ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState,wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ else ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btRssiState; ++ u4Byte wifiBw; ++ u1Byte apNum=0; ++ ++ wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); ++ //btRssiState = halbtc8703b2ant_BtRssiState(2, 29, 0); ++ wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ btRssiState = halbtc8703b2ant_BtRssiState(3, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 37); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5); ++ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_LEGACY == wifiBw) ++ { ++ if(BTC_RSSI_HIGH(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ else ++ { // only 802.11N mode we have to dec bt power to 4 degree ++ if(BTC_RSSI_HIGH(btRssiState)) ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ // need to check ap Number of Not ++ if(apNum < 10) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ } ++ else if(BTC_RSSI_MEDIUM(btRssiState)) ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ } ++ ++ if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ } ++ else ++ { ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14); ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); ++ } ++ ++ if( (btRssiState == BTC_RSSI_STATE_HIGH) || ++ (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ ++ // sw mechanism ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++ else ++ { ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); ++ } ++ else ++ { ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ } ++ } ++} ++ ++VOID ++halbtc8703b2ant_ActionBtWhckTest( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++} ++ ++VOID ++halbtc8703b2ant_ActionWifiMultiPort( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); ++ halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); ++ ++ // sw all off ++ halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); ++ halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); ++ ++ // hw all off ++ //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); ++ ++ halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); ++} ++ ++VOID ++halbtc8703b2ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE; ++ u1Byte btInfoOriginal=0, btRetryCnt=0; ++ u1Byte algorithm=0; ++ u4Byte numOfWifiLink=0; ++ u4Byte wifiLinkStatus=0; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ BOOLEAN bMiracastPlusBt=FALSE; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n")); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); ++ return; ++ } ++ ++ if(pCoexSta->bUnderIps) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n")); ++ return; ++ } ++ ++ if(pCoexSta->bBtWhckTest) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n")); ++ halbtc8703b2ant_ActionBtWhckTest(pBtCoexist); ++ return; ++ } ++ ++ algorithm = halbtc8703b2ant_ActionAlgorithm(pBtCoexist); ++ if(pCoexSta->bC2hBtInquiryPage && (BT_8703B_2ANT_COEX_ALGO_PANHS!=algorithm)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n")); ++ halbtc8703b2ant_ActionBtInquiry(pBtCoexist); ++ return; ++ } ++ else ++ { ++ /* ++ if(pCoexDm->bNeedRecover0x948) ++ { ++ pCoexDm->bNeedRecover0x948 = FALSE; ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, pCoexDm->backup0x948); ++ } ++ */ ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if(bScan || bLink || bRoam) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], WiFi is under Link Process !!\n")); ++ halbtc8703b2ant_ActionWiFiLinkProcess(pBtCoexist); ++ return; ++ } ++ ++ //for P2P ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); ++ numOfWifiLink = wifiLinkStatus>>16; ++ ++ if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); ++ ++ if(pBtLinkInfo->bBtLinkExist) ++ { ++ bMiracastPlusBt = TRUE; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ halbtc8703b2ant_ActionWifiMultiPort(pBtCoexist); ++ ++ return; ++ } ++ else ++ { ++ bMiracastPlusBt = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); ++ } ++ ++ pCoexDm->curAlgorithm = algorithm; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); ++ ++ if(halbtc8703b2ant_IsCommonAction(pBtCoexist)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ else ++ { ++ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", ++ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); ++ pCoexDm->bAutoTdmaAdjust = FALSE; ++ } ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8703B_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); ++ halbtc8703b2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); ++ halbtc8703b2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); ++ halbtc8703b2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_A2DP_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); ++ halbtc8703b2ant_ActionA2dpPanHs(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); ++ halbtc8703b2ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); ++ halbtc8703b2ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); ++ halbtc8703b2ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); ++ halbtc8703b2ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); ++ halbtc8703b2ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8703B_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); ++ halbtc8703b2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); ++ halbtc8703b2ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++} ++ ++VOID ++halbtc8703b2ant_WifiOffHwCfg( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bIsInMpMode = FALSE; ++ u1Byte H2C_Parameter[2] ={0}; ++ u4Byte fwVer=0; ++ ++ // set wlan_act to low ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1 ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ if(fwVer >= 0x180000) ++ { ++ /* Use H2C to set GNT_BT to HIGH */ ++ H2C_Parameter[0] = 1; ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); ++ } ++ else ++ { ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode); ++ if(!bIsInMpMode) ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT ++ else ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi ++} ++ ++VOID ++halbtc8703b2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bBackUp ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u4Byte u4Tmp=0, fwVer; ++ u2Byte u2Tmp=0; ++ u1Byte u1Tmp=0; ++ u1Byte H2C_Parameter[2] ={0}; ++ ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ // 0x790[5:0]=0x5 ++ u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); ++ u1Tmp &= 0xc0; ++ u1Tmp |= 0x5; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); ++ ++ //Antenna config ++ halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE); ++ pCoexSta->disVerInfoCnt = 0; ++ ++ // PTA parameter ++ halbtc8703b2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); ++ ++ // Enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); //0x76e[3] =1, WLAN_Act control by PTA ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); ++ pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8703b2ant_ ++//============================================================ ++//============================================================ ++// extern function start with EXhalbtc8703b2ant_ ++//============================================================ ++VOID ++EXhalbtc8703b2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u2Byte u2Tmp=0x0; ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20); ++ ++ // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. ++ u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); ++ ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); ++ ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ { ++ // fixed at S0 for USB interface ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ else ++ { ++ // for PCIE and SDIO interface, we check efuse 0xc3[6] ++ if(pBoardInfo->singleAntPath == 0) ++ { ++ // set to S1 ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; ++ } ++ else if(pBoardInfo->singleAntPath == 1) ++ { ++ // set to S0 ++ pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */ ++ ++ // ++ // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) ++ // Local setting bit define ++ // BIT0: "0" for no antenna inverse; "1" for antenna inverse ++ // BIT1: "0" for internal switch; "1" for external switch ++ // BIT2: "0" for one antenna; "1" for two antenna ++ // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 ++ if(pBtCoexist->chipInterface == BTC_INTF_USB) ++ { ++ // fixed at S0 for USB interface ++ u1Tmp |= 0x1; // antenna inverse ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); ++ } ++ else ++ { ++ // for PCIE and SDIO interface, we check efuse 0xc3[6] ++ if(pBoardInfo->singleAntPath == 0) ++ { ++ } ++ else if(pBoardInfo->singleAntPath == 1) ++ { ++ // set to S0 ++ u1Tmp |= 0x1; // antenna inverse ++ } ++ ++ if(pBtCoexist->chipInterface == BTC_INTF_PCI) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); ++ } ++ else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) ++ { ++ pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ halbtc8703b2ant_InitHwConfig(pBtCoexist, TRUE); ++} ++ ++VOID ++EXhalbtc8703b2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8703b2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8703b2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ u4Byte faOfdm, faCck; ++ u4Byte fwVer=0, btPatchVer=0; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ ++ GLCoexVerDate8703b2Ant, GLCoexVer8703b2Ant, fwVer, btPatchVer, btPatchVer); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %ddBm/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ++ ( (BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), ++ pCoexSta->btRssi-100, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ if (pStackInfo->bProfileNotified) ++ { ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \ ++ (pBtLinkInfo->bSlaveRole )? "Slave":"Master"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8703b2Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ // Sw mechanism ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism] (before Manual)============"); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ ++ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism] (before Manual) ============"); ++ } ++ else ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ } ++ ++ psTdmaCase = pCoexDm->curPsTdma; ++ ++ if (pCoexDm->bIsSwitchTo1dot5Ant) ++ psTdmaCase = psTdmaCase + 100; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase, ++ (pCoexDm->bCurPsTdmaOn? "On":"Off"), ++ (pCoexDm->bAutoTdmaAdjust? "Adj":"Fix") ); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \ ++ pCoexSta->nCoexTableType); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ ++ pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]", \ ++ u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25); ++ CL_PRINTF(cliBuf); ++ ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x765", \ ++ u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), u1Tmp[1]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \ ++ u4Tmp[0]&0x3, u4Tmp[1]&0xff, u4Tmp[2]&0x3); ++ CL_PRINTF(cliBuf); ++ ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); ++ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \ ++ ((u1Tmp[0] & 0x8)>>3), u1Tmp[1], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[2]&0x1); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \ ++ u4Tmp[0]&0xff, u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); ++ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); ++ ++ faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \ ++ ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ; ++ faCck = (u1Tmp[0] << 8) + u1Tmp[1]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \ ++ u4Tmp[0]&0xffff, faOfdm, faCck); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ ++ pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 1) ++ //halbtc8703b2ant_MonitorBtCtr(pBtCoexist); ++#endif ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8703b2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ pCoexSta->bUnderIps = TRUE; ++ halbtc8703b2ant_WifiOffHwCfg(pBtCoexist); ++ halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ halbtc8703b2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ pCoexSta->bUnderIps = FALSE; ++ halbtc8703b2ant_InitHwConfig(pBtCoexist, FALSE); ++ halbtc8703b2ant_InitCoexDm(pBtCoexist); ++ halbtc8703b2ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ pCoexSta->bUnderLps = TRUE; ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ pCoexSta->bUnderLps = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u4Byte u4Tmp; ++ u1Byte u1Tmpa, u1Tmpb; ++ ++ ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); ++ u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); ++ u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); ++ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", ++ u4Tmp, u1Tmpa, u1Tmpb)); ++} ++ ++VOID ++EXhalbtc8703b2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ u1Byte apNum=0; ++ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ H2C_Parameter[0] = 0x1; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum); ++ if(apNum < 10) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); ++} ++ ++VOID ++EXhalbtc8703b2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; ++ BOOLEAN bWifiConnected=FALSE; ++ static BOOLEAN bPreScoExist=FALSE; ++ u4Byte raMask=0x0; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = tmpBuf[0]&0xf; ++ if(rspSource >= BT_INFO_SRC_8703B_2ANT_MAX) ++ rspSource = BT_INFO_SRC_8703B_2ANT_WIFI_FW; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 1) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n")); ++ return; ++ } ++ ++ // if 0xff, it means BT is under WHCK test ++ if (btInfo == 0xff) ++ pCoexSta->bBtWhckTest = TRUE; ++ else ++ pCoexSta->bBtWhckTest = FALSE; ++ ++ if(BT_INFO_SRC_8703B_2ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = // [3:0] ++ pCoexSta->btInfoC2h[rspSource][2]&0xf; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][3]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][4]; ++ ++ pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); ++ if (pCoexSta->bBtTxRxMask) ++ { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n")); ++ pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); ++ } ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ if( (pCoexSta->btInfoExt & BIT1) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(bWifiConnected) ++ { ++ EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ } ++ ++ if( (pCoexSta->btInfoExt & BIT3) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); ++ halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ } ++ else ++ { ++ // BT already NOT ignore Wlan active, do nothing here. ++ } ++#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 0) ++ if( (pCoexSta->btInfoExt & BIT4) ) ++ { ++ // BT auto report already enabled, do nothing ++ } ++ else ++ { ++ halbtc8703b2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); ++ } ++#endif ++ } ++ ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8703B_2ANT_B_INQ_PAGE) ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ else ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ ++ // set link exist status ++ if(!(btInfo&BT_INFO_8703B_2ANT_B_CONNECTION)) ++ { ++ pCoexSta->bBtLinkExist = FALSE; ++ pCoexSta->bPanExist = FALSE; ++ pCoexSta->bA2dpExist = FALSE; ++ pCoexSta->bHidExist = FALSE; ++ pCoexSta->bScoExist = FALSE; ++ } ++ else // connection exists ++ { ++ pCoexSta->bBtLinkExist = TRUE; ++ if(btInfo & BT_INFO_8703B_2ANT_B_FTP) ++ pCoexSta->bPanExist = TRUE; ++ else ++ pCoexSta->bPanExist = FALSE; ++ if(btInfo & BT_INFO_8703B_2ANT_B_A2DP) ++ pCoexSta->bA2dpExist = TRUE; ++ else ++ pCoexSta->bA2dpExist = FALSE; ++ if(btInfo & BT_INFO_8703B_2ANT_B_HID) ++ pCoexSta->bHidExist = TRUE; ++ else ++ pCoexSta->bHidExist = FALSE; ++ if(btInfo & BT_INFO_8703B_2ANT_B_SCO_ESCO) ++ pCoexSta->bScoExist = TRUE; ++ else ++ pCoexSta->bScoExist = FALSE; ++ ++ if ( (pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) && (pCoexSta->bScoExist == FALSE)) ++ { ++ if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160) ++ { ++ pCoexSta->bHidExist = TRUE; ++ btInfo = btInfo | 0x20; ++ } ++ } ++ } ++ ++ halbtc8703b2ant_UpdateBtLinkInfo(pBtCoexist); ++ ++ if(!(btInfo&BT_INFO_8703B_2ANT_B_CONNECTION)) ++ { ++ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n")); ++ } ++ else if(btInfo == BT_INFO_8703B_2ANT_B_CONNECTION) // connection exists but no busy ++ { ++ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n")); ++ } ++ else if((btInfo&BT_INFO_8703B_2ANT_B_SCO_ESCO) || ++ (btInfo&BT_INFO_8703B_2ANT_B_SCO_BUSY)) ++ { ++ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_SCO_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n")); ++ } ++ else if(btInfo&BT_INFO_8703B_2ANT_B_ACL_BUSY) ++ { ++ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_ACL_BUSY; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n")); ++ } ++ else ++ { ++ pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_MAX; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n")); ++ } ++ ++ if( (BT_8703B_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || ++ (BT_8703B_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) ++ { ++ bBtBusy = TRUE; ++ bLimitedDig = TRUE; ++ } ++ else ++ { ++ bBtBusy = FALSE; ++ bLimitedDig = FALSE; ++ } ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ ++ pCoexDm->bLimitedDig = bLimitedDig; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); ++ ++ halbtc8703b2ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8703b2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8703b2ant_WifiOffHwCfg(pBtCoexist); ++ //remove due to interrupt is disabled that polling c2h will fail and delay 100ms. ++ //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 ++ halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ ++ EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8703b2ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n")); ++ ++ if(BTC_WIFI_PNP_SLEEP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n")); ++ } ++ else if(BTC_WIFI_PNP_WAKE_UP == pnpState) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n")); ++ halbtc8703b2ant_InitHwConfig(pBtCoexist, FALSE); ++ halbtc8703b2ant_InitCoexDm(pBtCoexist); ++ halbtc8703b2ant_QueryBtInfo(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8703b2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ //static u1Byte disVerInfoCnt=0; ++ u4Byte fwVer=0, btPatchVer=0; ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n")); ++ ++ if(pCoexSta->disVerInfoCnt <= 5) ++ { ++ pCoexSta->disVerInfoCnt += 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", ++ GLCoexVerDate8703b2Ant, GLCoexVer8703b2Ant, fwVer, btPatchVer, btPatchVer)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n")); ++ ++ if (pCoexSta->disVerInfoCnt == 3) ++ { ++ //Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set GNT_BT control by PTA\n")); ++ halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE); ++ } ++ } ++ ++#if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 0) ++ halbtc8703b2ant_QueryBtInfo(pBtCoexist); ++ halbtc8703b2ant_MonitorBtEnableDisable(pBtCoexist); ++#else ++ halbtc8703b2ant_MonitorBtCtr(pBtCoexist); ++ halbtc8703b2ant_MonitorWiFiCtr(pBtCoexist); ++ ++ if( halbtc8703b2ant_IsWifiStatusChanged(pBtCoexist) || ++ pCoexDm->bAutoTdmaAdjust) ++ { ++ halbtc8703b2ant_RunCoexistMechanism(pBtCoexist); ++ } ++#endif ++} ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b2Ant.h +new file mode 100644 +index 0000000..ab94497 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8703b2Ant.h +@@ -0,0 +1,228 @@ ++//=========================================== ++// The following is for 8703B 2Ant BT Co-exist definition ++//=========================================== ++#define BT_AUTO_REPORT_ONLY_8703B_2ANT 1 ++ ++ ++#define BT_INFO_8703B_2ANT_B_FTP BIT7 ++#define BT_INFO_8703B_2ANT_B_A2DP BIT6 ++#define BT_INFO_8703B_2ANT_B_HID BIT5 ++#define BT_INFO_8703B_2ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8703B_2ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8703B_2ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8703B_2ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8703B_2ANT_B_CONNECTION BIT0 ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT 2 ++ ++ ++#define BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 //WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation ++#define BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES 46 //BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation ++ ++typedef enum _BT_INFO_SRC_8703B_2ANT{ ++ BT_INFO_SRC_8703B_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8703B_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8703B_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8703B_2ANT_MAX ++}BT_INFO_SRC_8703B_2ANT,*PBT_INFO_SRC_8703B_2ANT; ++ ++typedef enum _BT_8703B_2ANT_BT_STATUS{ ++ BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8703B_2ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8703B_2ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8703B_2ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8703B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8703B_2ANT_BT_STATUS_MAX ++}BT_8703B_2ANT_BT_STATUS,*PBT_8703B_2ANT_BT_STATUS; ++ ++typedef enum _BT_8703B_2ANT_COEX_ALGO{ ++ BT_8703B_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8703B_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8703B_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8703B_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8703B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8703B_2ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8703B_2ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8703B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8703B_2ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8703B_2ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8703B_2ANT_COEX_ALGO_MAX = 0xb, ++}BT_8703B_2ANT_COEX_ALGO,*PBT_8703B_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8703B_2ANT{ ++ // fw mechanism ++ u1Byte preBtDecPwrLvl; ++ u1Byte curBtDecPwrLvl; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bResetTdmaAdjust; ++ BOOLEAN bAutoTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ BOOLEAN bPreBtAutoReport; ++ BOOLEAN bCurBtAutoReport; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c4; ++ u4Byte curVal0x6c4; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++ ++ BOOLEAN bNeedRecover0x948; ++ u4Byte backup0x948; ++ ++ u1Byte preLps; ++ u1Byte curLps; ++ u1Byte preRpwm; ++ u1Byte curRpwm; ++ ++ BOOLEAN bIsSwitchTo1dot5Ant; ++} COEX_DM_8703B_2ANT, *PCOEX_DM_8703B_2ANT; ++ ++typedef struct _COEX_STA_8703B_2ANT{ ++ BOOLEAN bBtLinkExist; ++ BOOLEAN bScoExist; ++ BOOLEAN bA2dpExist; ++ BOOLEAN bHidExist; ++ BOOLEAN bPanExist; ++ ++ BOOLEAN bUnderLps; ++ BOOLEAN bUnderIps; ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ BOOLEAN bBtTxRxMask; ++ u1Byte preBtRssiState; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8703B_2ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8703B_2ANT_MAX]; ++ BOOLEAN bBtWhckTest; ++ BOOLEAN bC2hBtInquiryPage; ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ ++ u4Byte nCRCOK_CCK; ++ u4Byte nCRCOK_11g; ++ u4Byte nCRCOK_11n; ++ u4Byte nCRCOK_11nAgg; ++ ++ u4Byte nCRCErr_CCK; ++ u4Byte nCRCErr_11g; ++ u4Byte nCRCErr_11n; ++ u4Byte nCRCErr_11nAgg; ++ ++ u1Byte nCoexTableType; ++ BOOLEAN bForceLpsOn; ++ ++ u1Byte disVerInfoCnt; ++}COEX_STA_8703B_2ANT, *PCOEX_STA_8703B_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8703b2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b2ant_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8703b2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8703b2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8703b2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b2ant_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtc8703b2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8703b2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a1Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a1Ant.c +new file mode 100644 +index 0000000..5883a37 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a1Ant.c +@@ -0,0 +1,1544 @@ ++//============================================================ ++// Description: ++// ++// This file is for RTL8723A Co-exist mechanism ++// ++// History ++// 2012/08/22 Cosa first check in. ++// 2012/11/14 Cosa Revise for 8723A 1Ant out sourcing. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8723a1Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8723A_1ANT GLCoexDm8723a1Ant; ++static PCOEX_DM_8723A_1ANT pCoexDm=&GLCoexDm8723a1Ant; ++static COEX_STA_8723A_1ANT GLCoexSta8723a1Ant; ++static PCOEX_STA_8723A_1ANT pCoexSta=&GLCoexSta8723a1Ant; ++ ++const char *const GLBtInfoSrc8723a1Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8723a1ant_ ++//============================================================ ++VOID ++halbtc8723a1ant_Reg0x550Bit3( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSet ++ ) ++{ ++ u1Byte u1tmp=0; ++ ++ u1tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x550); ++ if(bSet) ++ { ++ u1tmp |= BIT3; ++ } ++ else ++ { ++ u1tmp &= ~BIT3; ++ } ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x550, u1tmp); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set 0x550[3]=%d\n", (bSet? 1:0))); ++} ++ ++VOID ++halbtc8723a1ant_NotifyFwScan( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte scanType ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(BTC_SCAN_START == scanType) ++ H2C_Parameter[0] = 0x1; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Notify FW for wifi scan, write 0x3b=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x3b, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a1ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x38=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x38, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a1ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf0ff7); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8723a1ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8723a1ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8723a1ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte tmpU1; ++ ++ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); ++ tmpU1 |= BIT0; ++ if(bLowPenaltyRa) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); ++ tmpU1 &= ~BIT2; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); ++ tmpU1 |= BIT2; ++ } ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); ++} ++ ++VOID ++halbtc8723a1ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ return; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8723a1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8723a1ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8723a1ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8723a1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8723a1ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x25=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x25, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a1ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8723a1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8723a1ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ u1Byte realByte1=byte1, realByte5=byte5; ++ BOOLEAN bApEnable=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); ++ ++ // byte1[1:0] != 0 means enable pstdma ++ // for 2Ant bt coexist, if byte1 != 0 means enable pstdma ++ if(byte1) ++ { ++ if(bApEnable) ++ { ++ if(type != 5 && type != 12) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW for 1Ant AP mode\n")); ++ realByte1 &= ~BIT4; ++ realByte1 |= BIT5; ++ ++ realByte5 |= BIT5; ++ realByte5 &= ~BIT6; ++ } ++ } ++ } ++ H2C_Parameter[0] = realByte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = realByte5; ++ ++ pCoexDm->psTdmaPara[0] = realByte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = realByte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x3a(5bytes)=0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x3a, 5, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a1ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ if(pCoexDm->bCurPsTdmaOn) ++ { ++ switch(pCoexDm->curPsTdma) ++ { ++ case 1: ++ default: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x1a, 0x1a, 0x0, 0x40); ++ break; ++ case 2: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x12, 0x12, 0x0, 0x40); ++ break; ++ case 3: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x3f, 0x3, 0x10, 0x40); ++ break; ++ case 4: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x15, 0x3, 0x10, 0x0); ++ break; ++ case 5: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0xa9, 0x15, 0x3, 0x35, 0xc0); ++ break; ++ ++ case 8: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 9: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 10: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x0, 0x40); ++ break; ++ case 12: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0xa9, 0xa, 0x3, 0x15, 0xc0); ++ break; ++ ++ case 18: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ ++ case 20: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x2a, 0x2a, 0x0, 0x0); ++ break; ++ case 21: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x20, 0x3, 0x10, 0x40); ++ break; ++ case 22: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x1a, 0x1a, 0x2, 0x40); ++ break; ++ case 23: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x12, 0x12, 0x2, 0x40); ++ break; ++ case 24: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0xa, 0xa, 0x2, 0x40); ++ break; ++ case 25: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x2, 0x40); ++ break; ++ case 26: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x93, 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 27: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x13, 0x5, 0x5, 0x2, 0x40); ++ break; ++ case 28: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x3, 0x2f, 0x2f, 0x0, 0x0); ++ break; ++ ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(pCoexDm->curPsTdma) ++ { ++ case 8: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x8, 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 0: ++ default: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x0, 0x0, 0x0, 0x0, 0x0); ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x860, 0x210); ++ break; ++ case 9: ++ halbtc8723a1ant_SetFwPstdma(pBtCoexist, type, 0x0, 0x0, 0x0, 0x0, 0x0); ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x860, 0x110); ++ break; ++ ++ } ++ } ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++ ++VOID ++halbtc8723a1ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw all off ++ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ // sw all off ++ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ // hw all off ++ halbtc8723a1ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++} ++ ++VOID ++halbtc8723a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++} ++ ++VOID ++halbtc8723a1ant_BtEnableAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++} ++ ++VOID ++halbtc8723a1ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++} ++ ++VOID ++halbtc8723a1ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ halbtc8723a1ant_BtEnableAction(pBtCoexist); ++ } ++ else ++ { ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ } ++ } ++} ++ ++VOID ++halbtc8723a1ant_TdmaDurationAdjust( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0; ++ u1Byte btState; ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ u4Byte wifiBw; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ btState = pCoexDm->btStatus; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], TdmaDurationAdjust()\n")); ++ if(pCoexDm->psTdmaGlobalCnt != pCoexDm->psTdmaMonitorCnt) ++ { ++ pCoexDm->psTdmaMonitorCnt = 0; ++ pCoexDm->psTdmaGlobalCnt = 0; ++ } ++ if(pCoexDm->psTdmaMonitorCnt == 0) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], first run BT A2DP + WiFi busy state!!\n")); ++ if(btState == BT_STATE_8723A_1ANT_ACL_ONLY_BUSY) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ pCoexDm->psTdmaDuAdjType = 22; ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], retryCount = %d\n", retryCount)); ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT TxRx counter H+L <= 1200\n")); ++ if(btState != BT_STATE_8723A_1ANT_ACL_ONLY_BUSY) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], NOT ACL only busy!\n")); ++ if(BTC_WIFI_BW_HT40 != wifiBw) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 20MHz\n")); ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 22) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ pCoexDm->psTdmaDuAdjType = 23; ++ } ++ else if(pCoexDm->curPsTdma == 23) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); ++ pCoexDm->psTdmaDuAdjType = 24; ++ } ++ else if(pCoexDm->curPsTdma == 24) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 25); ++ pCoexDm->psTdmaDuAdjType = 25; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 25) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); ++ pCoexDm->psTdmaDuAdjType = 24; ++ } ++ else if(pCoexDm->curPsTdma == 24) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ pCoexDm->psTdmaDuAdjType = 23; ++ } ++ else if(pCoexDm->curPsTdma == 23) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); ++ pCoexDm->psTdmaDuAdjType = 22; ++ } ++ } ++ // error handle, if not in the following state, ++ // set psTdma again. ++ if( (pCoexDm->psTdmaDuAdjType != 22) && ++ (pCoexDm->psTdmaDuAdjType != 23) && ++ (pCoexDm->psTdmaDuAdjType != 24) && ++ (pCoexDm->psTdmaDuAdjType != 25) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], duration case out of handle!!\n")); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ pCoexDm->psTdmaDuAdjType = 23; ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 40MHz\n")); ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 23) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); ++ pCoexDm->psTdmaDuAdjType = 24; ++ } ++ else if(pCoexDm->curPsTdma == 24) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 25); ++ pCoexDm->psTdmaDuAdjType = 25; ++ } ++ else if(pCoexDm->curPsTdma == 25) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 27); ++ pCoexDm->psTdmaDuAdjType = 27; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 27) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 25); ++ pCoexDm->psTdmaDuAdjType = 25; ++ } ++ else if(pCoexDm->curPsTdma == 25) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); ++ pCoexDm->psTdmaDuAdjType = 24; ++ } ++ else if(pCoexDm->curPsTdma == 24) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); ++ pCoexDm->psTdmaDuAdjType = 23; ++ } ++ } ++ // error handle, if not in the following state, ++ // set psTdma again. ++ if( (pCoexDm->psTdmaDuAdjType != 23) && ++ (pCoexDm->psTdmaDuAdjType != 24) && ++ (pCoexDm->psTdmaDuAdjType != 25) && ++ (pCoexDm->psTdmaDuAdjType != 27) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], duration case out of handle!!\n")); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 24); ++ pCoexDm->psTdmaDuAdjType = 24; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ACL only busy\n")); ++ if (result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ } ++ ++ // error handle, if not in the following state, ++ // set psTdma again. ++ if( (pCoexDm->psTdmaDuAdjType != 1) && ++ (pCoexDm->psTdmaDuAdjType != 2) && ++ (pCoexDm->psTdmaDuAdjType != 9) && ++ (pCoexDm->psTdmaDuAdjType != 11) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], duration case out of handle!!\n")); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ } ++ } ++ } ++ ++ // if current PsTdma not match with the recorded one (when scan, dhcp...), ++ // then we have to adjust it back to the previous record one. ++ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", ++ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if( !bScan && !bLink && !bRoam) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); ++ } ++ } ++ pCoexDm->psTdmaMonitorCnt++; ++} ++ ++ ++VOID ++halbtc8723a1ant_CoexForWifiConnect( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bWifiBusy=FALSE; ++ u1Byte btState, btInfoOriginal=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ btState = pCoexDm->btStatus; ++ btInfoOriginal = pCoexSta->btInfoC2h[BT_INFO_SRC_8723A_1ANT_BT_RSP][0]; ++ ++ if(bWifiConnected) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi connected!!\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if( !bWifiBusy && ++ ((BT_STATE_8723A_1ANT_NO_CONNECTION == btState) || ++ (BT_STATE_8723A_1ANT_CONNECT_IDLE == btState)) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], [Wifi is idle] or [Bt is non connected idle or Bt is connected idle]!!\n")); ++ ++ if(BT_STATE_8723A_1ANT_NO_CONNECTION == btState) ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ else if(BT_STATE_8723A_1ANT_CONNECT_IDLE == btState) ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0xc0); ++ } ++ else ++ { ++ if( (BT_STATE_8723A_1ANT_SCO_ONLY_BUSY == btState) || ++ (BT_STATE_8723A_1ANT_ACL_SCO_BUSY == btState) || ++ (BT_STATE_8723A_1ANT_HID_BUSY == btState) || ++ (BT_STATE_8723A_1ANT_HID_SCO_BUSY == btState) ) ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0x60); ++ } ++ else ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0xc0); ++ } ++ switch(btState) ++ { ++ case BT_STATE_8723A_1ANT_NO_CONNECTION: ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ break; ++ case BT_STATE_8723A_1ANT_CONNECT_IDLE: ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ break; ++ case BT_STATE_8723A_1ANT_INQ_OR_PAG: ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ break; ++ case BT_STATE_8723A_1ANT_SCO_ONLY_BUSY: ++ case BT_STATE_8723A_1ANT_ACL_SCO_BUSY: ++ case BT_STATE_8723A_1ANT_HID_BUSY: ++ case BT_STATE_8723A_1ANT_HID_SCO_BUSY: ++ halbtc8723a1ant_TdmaDurationAdjust(pBtCoexist); ++ break; ++ case BT_STATE_8723A_1ANT_ACL_ONLY_BUSY: ++ if (btInfoOriginal&BT_INFO_8723A_1ANT_B_A2DP) ++ { ++ halbtc8723a1ant_TdmaDurationAdjust(pBtCoexist); ++ } ++ else if(btInfoOriginal&BT_INFO_8723A_1ANT_B_FTP) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ } ++ else if( (btInfoOriginal&BT_INFO_8723A_1ANT_B_A2DP) && ++ (btInfoOriginal&BT_INFO_8723A_1ANT_B_FTP) ) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ } ++ else ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ } ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], error!!!, undefined case in halbtc8723a1ant_CoexForWifiConnect()!!\n")); ++ break; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is disconnected!!\n")); ++ } ++ ++ pCoexDm->psTdmaGlobalCnt++; ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8723a1ant_ ++//============================================================ ++VOID ++wa_halbtc8723a1ant_MonitorC2h( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte tmp1b=0x0; ++ u4Byte curC2hTotalCnt=0x0; ++ static u4Byte preC2hTotalCnt=0x0, sameCntPollingTime=0x0; ++ ++ curC2hTotalCnt+=pCoexSta->btInfoC2hCnt[BT_INFO_SRC_8723A_1ANT_BT_RSP]; ++ ++ if(curC2hTotalCnt == preC2hTotalCnt) ++ { ++ sameCntPollingTime++; ++ } ++ else ++ { ++ preC2hTotalCnt = curC2hTotalCnt; ++ sameCntPollingTime = 0; ++ } ++ ++ if(sameCntPollingTime >= 2) ++ { ++ tmp1b = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x1af); ++ if(tmp1b != 0x0) ++ { ++ pCoexSta->c2hHangDetectCnt++; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x1af, 0x0); ++ } ++ } ++} ++ ++//============================================================ ++// extern function start with EXhalbtc8723a1ant_ ++//============================================================ ++VOID ++EXhalbtc8723a1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Init HW Config!!\n")); ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); ++ ++ // enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ ++ // coex table ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, 0x0); // 1-Ant coex ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, 0xffff); // wifi break table ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, 0x55555555); //coex table ++ ++ // antenna switch control parameter ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x858, 0xaaaaaaaa); ++ ++ pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x860, 0x210); //set antenna at wifi side if ANTSW is software control ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x870, 0x300); //SPDT(connected with TRSW) control by hardware PTA ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x874, 0x22804000); //ANTSW keep by GNT_BT ++ ++ // coexistence parameters ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x1); // enable RTK mode PTA ++} ++ ++VOID ++EXhalbtc8723a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8723a1ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8723a1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723A_1ANT_BT_STATUS_IDLE == pCoexDm->btStatus)? "idle":( (BT_8723A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy"))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ if(pStackInfo->bProfileNotified) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723a1Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "write 0x1af=0x0 num", \ ++ pCoexSta->c2hHangDetectCnt); ++ CL_PRINTF(cliBuf); ++ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "SM1[ShRf/ LpRA/ LimDig]", \ ++ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(!pBtCoexist->bManualControl) ++ { ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IgnWlanAct", \ ++ pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ } ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x783); ++ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x796); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/ 0x783/ 0x796", \ ++ u1Tmp[0], u1Tmp[1], u1Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x880", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x484); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x484(rate adaptive)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); ++ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xdac); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xda0/0xda4/0xda8/0xdac(FA cnt)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u4Tmp[3]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770 (hp rx[31:16]/tx[15:0])", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8723a1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ halbtc8723a1ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ //halbtc8723a1ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE; ++ ++ halbtc8723a1ant_NotifyFwScan(pBtCoexist, type); ++ ++ if(pBtCoexist->btInfo.bBtDisabled) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ } ++ else ++ { ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ //set 0x550[3]=1 before PsTdma ++ halbtc8723a1ant_Reg0x550Bit3(pBtCoexist, TRUE); ++ } ++ ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++ halbtc8723a1ant_CoexForWifiConnect(pBtCoexist); ++ } ++ } ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE; ++ ++ if(pBtCoexist->btInfo.bBtDisabled) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ } ++ else ++ { ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ //set 0x550[3]=1 before PsTdma ++ halbtc8723a1ant_Reg0x550Bit3(pBtCoexist, TRUE); ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); // extend wifi slot ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(!bWifiConnected) // non-connected scan ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++ halbtc8723a1ant_CoexForWifiConnect(pBtCoexist); ++ } ++ } ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ if(pBtCoexist->btInfo.bBtDisabled) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ } ++ else ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 18); ++ } ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bBtHsOn=FALSE, bBtBusy=FALSE, bForceLps=FALSE; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = BT_INFO_SRC_8723A_1ANT_BT_RSP; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 0) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(BT_INFO_SRC_8723A_1ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = ++ pCoexSta->btInfoC2h[rspSource][1]; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][2]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][3]; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8723A_1ANT_B_INQ_PAGE) ++ { ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ } ++ else ++ { ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ } ++ btInfo &= ~BIT2; ++ if(!(btInfo & BIT0)) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_NO_CONNECTION; ++ bForceLps = FALSE; ++ } ++ else ++ { ++ bForceLps = TRUE; ++ if(btInfo == 0x1) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_CONNECT_IDLE; ++ } ++ else if(btInfo == 0x9) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_ACL_ONLY_BUSY; ++ bBtBusy = TRUE; ++ } ++ else if(btInfo == 0x13) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_SCO_ONLY_BUSY; ++ bBtBusy = TRUE; ++ } ++ else if(btInfo == 0x1b) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_ACL_SCO_BUSY; ++ bBtBusy = TRUE; ++ } ++ else if(btInfo == 0x29) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_HID_BUSY; ++ bBtBusy = TRUE; ++ } ++ else if(btInfo == 0x3b) ++ { ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_HID_SCO_BUSY; ++ bBtBusy = TRUE; ++ } ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bBtBusy); ++ if(bForceLps) ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); ++ else ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); ++ ++ if( (BT_STATE_8723A_1ANT_NO_CONNECTION == pCoexDm->btStatus) || ++ (BT_STATE_8723A_1ANT_CONNECT_IDLE == pCoexDm->btStatus) ) ++ { ++ if(pCoexSta->bC2hBtInquiryPage) ++ pCoexDm->btStatus = BT_STATE_8723A_1ANT_INQ_OR_PAG; ++ } ++} ++ ++VOID ++EXhalbtc8723a1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ halbtc8723a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ ++ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a1ant_RfShrink(pBtCoexist, FORCE_EXEC, FALSE); ++ ++ halbtc8723a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ EXhalbtc8723a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8723a1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE, bWifiConnected=FALSE; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 1Ant Periodical!!\n")); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ // work around for c2h hang ++ wa_halbtc8723a1ant_MonitorC2h(pBtCoexist); ++ ++ halbtc8723a1ant_QueryBtInfo(pBtCoexist); ++ halbtc8723a1ant_MonitorBtCtr(pBtCoexist); ++ halbtc8723a1ant_MonitorBtEnableDisable(pBtCoexist); ++ ++ ++ if(bScan) ++ return; ++ if(bLink) ++ return; ++ ++ if(bWifiConnected) ++ { ++ if(pBtCoexist->btInfo.bBtDisabled) ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); ++ ++ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ else ++ { ++ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a1ant_CoexForWifiConnect(pBtCoexist); ++ } ++ } ++ else ++ { ++ halbtc8723a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ halbtc8723a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a1ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++} ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a1Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a1Ant.h +new file mode 100644 +index 0000000..6d4e1b4 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a1Ant.h +@@ -0,0 +1,171 @@ ++//=========================================== ++// The following is for 8723A 1Ant BT Co-exist definition ++//=========================================== ++#define BT_INFO_8723A_1ANT_B_FTP BIT7 ++#define BT_INFO_8723A_1ANT_B_A2DP BIT6 ++#define BT_INFO_8723A_1ANT_B_HID BIT5 ++#define BT_INFO_8723A_1ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8723A_1ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8723A_1ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8723A_1ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8723A_1ANT_B_CONNECTION BIT0 ++ ++typedef enum _BT_STATE_8723A_1ANT{ ++ BT_STATE_8723A_1ANT_DISABLED = 0, ++ BT_STATE_8723A_1ANT_NO_CONNECTION = 1, ++ BT_STATE_8723A_1ANT_CONNECT_IDLE = 2, ++ BT_STATE_8723A_1ANT_INQ_OR_PAG = 3, ++ BT_STATE_8723A_1ANT_ACL_ONLY_BUSY = 4, ++ BT_STATE_8723A_1ANT_SCO_ONLY_BUSY = 5, ++ BT_STATE_8723A_1ANT_ACL_SCO_BUSY = 6, ++ BT_STATE_8723A_1ANT_HID_BUSY = 7, ++ BT_STATE_8723A_1ANT_HID_SCO_BUSY = 8, ++ BT_STATE_8723A_1ANT_MAX ++}BT_STATE_8723A_1ANT, *PBT_STATE_8723A_1ANT; ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8723A_1ANT 2 ++ ++typedef enum _BT_INFO_SRC_8723A_1ANT{ ++ BT_INFO_SRC_8723A_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8723A_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8723A_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8723A_1ANT_MAX ++}BT_INFO_SRC_8723A_1ANT,*PBT_INFO_SRC_8723A_1ANT; ++ ++typedef enum _BT_8723A_1ANT_BT_STATUS{ ++ BT_8723A_1ANT_BT_STATUS_IDLE = 0x0, ++ BT_8723A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8723A_1ANT_BT_STATUS_NON_IDLE = 0x2, ++ BT_8723A_1ANT_BT_STATUS_MAX ++}BT_8723A_1ANT_BT_STATUS,*PBT_8723A_1ANT_BT_STATUS; ++ ++typedef enum _BT_8723A_1ANT_COEX_ALGO{ ++ BT_8723A_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8723A_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8723A_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8723A_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8723A_1ANT_COEX_ALGO_PANEDR = 0x4, ++ BT_8723A_1ANT_COEX_ALGO_PANHS = 0x5, ++ BT_8723A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x6, ++ BT_8723A_1ANT_COEX_ALGO_PANEDR_HID = 0x7, ++ BT_8723A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x8, ++ BT_8723A_1ANT_COEX_ALGO_HID_A2DP = 0x9, ++ BT_8723A_1ANT_COEX_ALGO_MAX ++}BT_8723A_1ANT_COEX_ALGO,*PBT_8723A_1ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8723A_1ANT{ ++ // fw mechanism ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ u4Byte psTdmaMonitorCnt; ++ u4Byte psTdmaGlobalCnt; ++ BOOLEAN bResetTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++} COEX_DM_8723A_1ANT, *PCOEX_DM_8723A_1ANT; ++ ++typedef struct _COEX_STA_8723A_1ANT{ ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ u1Byte preBtRssiState; ++ u1Byte preBtRssiState1; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8723A_1ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8723A_1ANT_MAX]; ++ BOOLEAN bC2hBtInquiryPage; ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ //BOOLEAN bHoldForStackOperation; ++ //u1Byte bHoldPeriodCnt; ++ // this is for c2h hang work-around ++ u4Byte c2hHangDetectCnt; ++}COEX_STA_8723A_1ANT, *PCOEX_STA_8723A_1ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8723a1ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a1ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a1ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a1ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8723a1ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a1ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a1ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a2Ant.c +new file mode 100644 +index 0000000..1becd5c +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a2Ant.c +@@ -0,0 +1,3746 @@ ++//============================================================ ++// Description: ++// ++// This file is for RTL8723A Co-exist mechanism ++// ++// History ++// 2012/08/22 Cosa first check in. ++// 2012/11/14 Cosa Revise for 8723A 2Ant out sourcing. ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "Mp_Precomp.h" ++ ++#if WPP_SOFTWARE_TRACE ++#include "HalBtc8723a2Ant.tmh" ++#endif ++ ++#if(BT_30_SUPPORT == 1) ++//============================================================ ++// Global variables, these are static variables ++//============================================================ ++static COEX_DM_8723A_2ANT GLCoexDm8723a2Ant; ++static PCOEX_DM_8723A_2ANT pCoexDm=&GLCoexDm8723a2Ant; ++static COEX_STA_8723A_2ANT GLCoexSta8723a2Ant; ++static PCOEX_STA_8723A_2ANT pCoexSta=&GLCoexSta8723a2Ant; ++ ++const char *const GLBtInfoSrc8723a2Ant[]={ ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++//============================================================ ++// local function proto type if needed ++//============================================================ ++//============================================================ ++// local function start with halbtc8723a2ant_ ++//============================================================ ++BOOLEAN ++halbtc8723a2ant_IsWifiIdle( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if(bWifiConnected) ++ return FALSE; ++ if(bScan) ++ return FALSE; ++ if(bLink) ++ return FALSE; ++ if(bRoam) ++ return FALSE; ++ ++ return TRUE; ++} ++ ++BOOLEAN ++halbtc8723a2ant_IsWifiConnectedIdle( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE, bScan=FALSE, bLink=FALSE, bRoam=FALSE, bWifiBusy=FALSE; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ ++ if(bScan) ++ return FALSE; ++ if(bLink) ++ return FALSE; ++ if(bRoam) ++ return FALSE; ++ if(bWifiConnected && !bWifiBusy) ++ return TRUE; ++ else ++ return FALSE; ++} ++ ++u1Byte ++halbtc8723a2ant_BtRssiState( ++ u1Byte levelNum, ++ u1Byte rssiThresh, ++ u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte btRssi=0; ++ u1Byte btRssiState=pCoexSta->preBtRssiState; ++ ++ btRssi = pCoexSta->btRssi; ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n")); ++ return pCoexSta->preBtRssiState; ++ } ++ ++ if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ btRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(btRssi < rssiThresh) ++ { ++ btRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(btRssi < rssiThresh1) ++ { ++ btRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ btRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preBtRssiState = btRssiState; ++ ++ return btRssiState; ++} ++ ++u1Byte ++halbtc8723a2ant_WifiRssiState( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte index, ++ IN u1Byte levelNum, ++ IN u1Byte rssiThresh, ++ IN u1Byte rssiThresh1 ++ ) ++{ ++ s4Byte wifiRssi=0; ++ u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ ++ if(levelNum == 2) ++ { ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ else if(levelNum == 3) ++ { ++ if(rssiThresh > rssiThresh1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n")); ++ return pCoexSta->preWifiRssiState[index]; ++ } ++ ++ if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) ++ { ++ if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_LOW; ++ } ++ } ++ else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || ++ (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) ++ { ++ if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT)) ++ { ++ wifiRssiState = BTC_RSSI_STATE_HIGH; ++ } ++ else if(wifiRssi < rssiThresh) ++ { ++ wifiRssiState = BTC_RSSI_STATE_LOW; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; ++ } ++ } ++ else ++ { ++ if(wifiRssi < rssiThresh1) ++ { ++ wifiRssiState = BTC_RSSI_STATE_MEDIUM; ++ } ++ else ++ { ++ wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ } ++ ++ pCoexSta->preWifiRssiState[index] = wifiRssiState; ++ ++ return wifiRssiState; ++} ++ ++VOID ++halbtc8723a2ant_IndicateWifiChnlBwInfo( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ u1Byte H2C_Parameter[3] ={0}; ++ u4Byte wifiBw; ++ u1Byte wifiCentralChnl; ++ ++ // only 2.4G we need to inform bt the chnl mask ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); ++ if( (BTC_MEDIA_CONNECT == type) && ++ (wifiCentralChnl <= 14) ) ++ { ++ H2C_Parameter[0] = 0x1; ++ H2C_Parameter[1] = wifiCentralChnl; ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ H2C_Parameter[2] = 0x30; ++ else ++ H2C_Parameter[2] = 0x20; ++ } ++ ++ pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; ++ pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; ++ pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x19=0x%x\n", ++ H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x19, 3, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a2ant_QueryBtInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ pCoexSta->bC2hBtInfoReqSent = TRUE; ++ ++ H2C_Parameter[0] |= BIT0; // trigger ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x38=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x38, 1, H2C_Parameter); ++} ++u1Byte ++halbtc8723a2ant_ActionAlgorithm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ BOOLEAN bBtHsOn=FALSE, bBtBusy=FALSE, bLimitedDig=FALSE; ++ u1Byte algorithm=BT_8723A_2ANT_COEX_ALGO_UNDEFINED; ++ u1Byte numOfDiffProfile=0; ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ ++ //====================== ++ // here we get BT status first ++ //====================== ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_IDLE; ++ ++ if((pStackInfo->bScoExist) ||(bBtHsOn) ||(pStackInfo->bHidExist)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO or HID or HS exists, set BT non-idle !!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; ++ } ++ else ++ { ++ // A2dp profile ++ if( (pBtCoexist->stackInfo.numOfLink == 1) && ++ (pStackInfo->bA2dpExist) ) ++ { ++ if( (pCoexSta->lowPriorityTx+ pCoexSta->lowPriorityRx) < 100) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP, low priority tx+rx < 100, set BT connected-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP, low priority tx+rx >= 100, set BT non-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; ++ } ++ } ++ // Pan profile ++ if( (pBtCoexist->stackInfo.numOfLink == 1) && ++ (pStackInfo->bPanExist) ) ++ { ++ if((pCoexSta->lowPriorityTx+ pCoexSta->lowPriorityRx) < 600) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN, low priority tx+rx < 600, set BT connected-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } ++ else ++ { ++ if(pCoexSta->lowPriorityTx) ++ { ++ if((pCoexSta->lowPriorityRx /pCoexSta->lowPriorityTx)>9 ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN, low priority rx/tx > 9, set BT connected-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } ++ } ++ } ++ if(BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN, set BT non-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; ++ } ++ } ++ // Pan+A2dp profile ++ if( (pBtCoexist->stackInfo.numOfLink == 2) && ++ (pStackInfo->bA2dpExist) && ++ (pStackInfo->bPanExist) ) ++ { ++ if((pCoexSta->lowPriorityTx+ pCoexSta->lowPriorityRx) < 600) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN+A2DP, low priority tx+rx < 600, set BT connected-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } ++ else ++ { ++ if(pCoexSta->lowPriorityTx) ++ { ++ if((pCoexSta->lowPriorityRx /pCoexSta->lowPriorityTx)>9 ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN+A2DP, low priority rx/tx > 9, set BT connected-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } ++ } ++ } ++ if(BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN+A2DP, set BT non-idle!!!\n")); ++ pCoexDm->btStatus = BT_8723A_2ANT_BT_STATUS_NON_IDLE; ++ } ++ } ++ } ++ if(BT_8723A_2ANT_BT_STATUS_IDLE != pCoexDm->btStatus) ++ { ++ bBtBusy = TRUE; ++ bLimitedDig = TRUE; ++ } ++ else ++ { ++ bBtBusy = FALSE; ++ bLimitedDig = FALSE; ++ } ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); ++ //====================== ++ ++ if(!pStackInfo->bBtLinkExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n")); ++ return algorithm; ++ } ++ ++ if(pStackInfo->bScoExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bHidExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bPanExist) ++ numOfDiffProfile++; ++ if(pStackInfo->bA2dpExist) ++ numOfDiffProfile++; ++ ++ if(numOfDiffProfile == 1) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ if(pStackInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID; ++ } ++ else if(pStackInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_A2DP; ++ } ++ else if(pStackInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANHS; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 2) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ if(pStackInfo->bHidExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID; ++ } ++ else if(pStackInfo->bA2dpExist) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; ++ } ++ else if(pStackInfo->bPanExist) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile == 3) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bA2dpExist ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID; ++ } ++ else if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ else if( pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_SCO; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ else ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } ++ else if(numOfDiffProfile >= 3) ++ { ++ if(pStackInfo->bScoExist) ++ { ++ if( pStackInfo->bHidExist && ++ pStackInfo->bPanExist && ++ pStackInfo->bA2dpExist ) ++ { ++ if(bBtHsOn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); ++ algorithm = BT_8723A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++BOOLEAN ++halbtc8723a2ant_NeedToDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bRet=FALSE; ++ BOOLEAN bBtHsOn=FALSE, bWifiConnected=FALSE; ++ s4Byte btHsRssi=0; ++ u1Byte btRssiState=BTC_RSSI_STATE_HIGH; ++ ++ btRssiState = halbtc8723a2ant_BtRssiState(2, 42, 0); ++ ++ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn)) ++ return FALSE; ++ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected)) ++ return FALSE; ++ if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi)) ++ return FALSE; ++ if(BTC_RSSI_LOW(btRssiState)) ++ return FALSE; ++ ++ if(bWifiConnected) ++ { ++ if(bBtHsOn) ++ { ++ if(btHsRssi > 37) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for HS mode!!\n")); ++ bRet = TRUE; ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for Wifi is connected!!\n")); ++ bRet = TRUE; ++ } ++ } ++ ++ return bRet; ++} ++ ++VOID ++halbtc8723a2ant_SetFwDacSwingLevel( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte dacSwingLvl ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ // There are several type of dacswing ++ // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 ++ H2C_Parameter[0] = dacSwingLvl; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x29=0x%x\n", H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x29, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a2ant_SetFwDecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bDecBtPwr ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ H2C_Parameter[0] = 0; ++ ++ if(bDecBtPwr) ++ { ++ H2C_Parameter[0] |= BIT1; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power : %s, FW write 0x21=0x%x\n", ++ (bDecBtPwr? "Yes!!":"No!!"), H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x21, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a2ant_DecBtPwr( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDecBtPwr ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power = %s\n", ++ (bForceExec? "force to":""), ((bDecBtPwr)? "ON":"OFF"))); ++ pCoexDm->bCurDecBtPwr = bDecBtPwr; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreDecBtPwr == pCoexDm->bCurDecBtPwr) ++ return; ++ } ++ halbtc8723a2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->bCurDecBtPwr); ++ ++ pCoexDm->bPreDecBtPwr = pCoexDm->bCurDecBtPwr; ++} ++ ++VOID ++halbtc8723a2ant_FwDacSwingLvl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u1Byte fwDacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n", ++ (bForceExec? "force to":""), fwDacSwingLvl)); ++ pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) ++ return; ++ } ++ ++ halbtc8723a2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); ++ ++ pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; ++} ++ ++VOID ++halbtc8723a2ant_SetSwRfRxLpfCorner( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ if(bRxRfShrinkOn) ++ { ++ //Shrink RF Rx LPF corner ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf0ff7); ++ } ++ else ++ { ++ //Resume RF Rx LPF corner ++ // After initialized, we can use pCoexDm->btRf0x1eBackup ++ if(pBtCoexist->bInitilized) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n")); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); ++ } ++ } ++} ++ ++VOID ++halbtc8723a2ant_RfShrink( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bRxRfShrinkOn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n", ++ (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); ++ pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) ++ return; ++ } ++ halbtc8723a2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); ++ ++ pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; ++} ++ ++VOID ++halbtc8723a2ant_SetSwPenaltyTxRateAdaptive( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ u1Byte tmpU1; ++ ++ tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd); ++ tmpU1 |= BIT0; ++ if(bLowPenaltyRa) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); ++ tmpU1 &= ~BIT2; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n")); ++ tmpU1 |= BIT2; ++ } ++ ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1); ++} ++ ++VOID ++halbtc8723a2ant_LowPenaltyRa( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bLowPenaltyRa ++ ) ++{ ++ return; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n", ++ (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); ++ pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) ++ return; ++ } ++ halbtc8723a2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); ++ ++ pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; ++} ++ ++VOID ++halbtc8723a2ant_SetSwFullTimeDacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bSwDacSwingOn, ++ IN u4Byte swDacSwingLvl ++ ) ++{ ++ if(bSwDacSwingOn) ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, swDacSwingLvl); ++ } ++ else ++ { ++ pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xff000000, 0xc0); ++ } ++} ++ ++ ++VOID ++halbtc8723a2ant_DacSwing( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bDacSwingOn, ++ IN u4Byte dacSwingLvl ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", ++ (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); ++ pCoexDm->bCurDacSwingOn = bDacSwingOn; ++ pCoexDm->curDacSwingLvl = dacSwingLvl; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && ++ (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) ++ return; ++ } ++ delay_ms(30); ++ halbtc8723a2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); ++ ++ pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; ++ pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; ++} ++ ++VOID ++halbtc8723a2ant_SetAdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ if(bAdcBackOff) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611); ++ } ++} ++ ++VOID ++halbtc8723a2ant_AdcBackOff( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAdcBackOff ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n", ++ (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); ++ pCoexDm->bCurAdcBackOff = bAdcBackOff; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) ++ return; ++ } ++ halbtc8723a2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); ++ ++ pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; ++} ++ ++VOID ++halbtc8723a2ant_SetAgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ u1Byte rssiAdjustVal=0; ++ ++ if(bAgcTableEn) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4e1c0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4d1d0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4c1e0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4b1f0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x4a200001); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x90000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x51000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x12000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x00355); ++ ++ rssiAdjustVal = 6; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n")); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x641c0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x631d0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x621e0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x611f0001); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78,0x60200001); ++ ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x32000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0x71000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xb0000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xfc000); ++ pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x30355); ++ } ++ ++ // set rssiAdjustVal for wifi module. ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); ++} ++ ++ ++VOID ++halbtc8723a2ant_AgcTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bAgcTableEn ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n", ++ (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); ++ pCoexDm->bCurAgcTableEn = bAgcTableEn; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) ++ return; ++ } ++ halbtc8723a2ant_SetAgcTable(pBtCoexist, bAgcTableEn); ++ ++ pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; ++} ++ ++VOID ++halbtc8723a2ant_SetCoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); ++ pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); ++} ++ ++VOID ++halbtc8723a2ant_CoexTable( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN u4Byte val0x6c0, ++ IN u4Byte val0x6c8, ++ IN u1Byte val0x6cc ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", ++ (bForceExec? "force to":""), val0x6c0, val0x6c8, val0x6cc)); ++ pCoexDm->curVal0x6c0 = val0x6c0; ++ pCoexDm->curVal0x6c8 = val0x6c8; ++ pCoexDm->curVal0x6cc = val0x6cc; ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && ++ (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && ++ (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) ++ return; ++ } ++ halbtc8723a2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c8, val0x6cc); ++ ++ pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; ++ pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; ++ pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; ++} ++ ++VOID ++halbtc8723a2ant_SetFwIgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bEnable ++ ) ++{ ++ u1Byte H2C_Parameter[1] ={0}; ++ ++ if(bEnable) ++ { ++ H2C_Parameter[0] |= BIT0; // function enable ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x25=0x%x\n", ++ H2C_Parameter[0])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x25, 1, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a2ant_IgnoreWlanAct( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bEnable ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n", ++ (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); ++ pCoexDm->bCurIgnoreWlanAct = bEnable; ++ ++ if(!bForceExec) ++ { ++ if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) ++ return; ++ } ++ halbtc8723a2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); ++ ++ pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; ++} ++ ++VOID ++halbtc8723a2ant_SetFwPstdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3, ++ IN u1Byte byte4, ++ IN u1Byte byte5 ++ ) ++{ ++ u1Byte H2C_Parameter[5] ={0}; ++ ++ H2C_Parameter[0] = byte1; ++ H2C_Parameter[1] = byte2; ++ H2C_Parameter[2] = byte3; ++ H2C_Parameter[3] = byte4; ++ H2C_Parameter[4] = byte5; ++ ++ pCoexDm->psTdmaPara[0] = byte1; ++ pCoexDm->psTdmaPara[1] = byte2; ++ pCoexDm->psTdmaPara[2] = byte3; ++ pCoexDm->psTdmaPara[3] = byte4; ++ pCoexDm->psTdmaPara[4] = byte5; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x3a(5bytes)=0x%x%08x\n", ++ H2C_Parameter[0], ++ H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); ++ ++ pBtCoexist->fBtcFillH2c(pBtCoexist, 0x3a, 5, H2C_Parameter); ++} ++ ++VOID ++halbtc8723a2ant_PsTdma( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bForceExec, ++ IN BOOLEAN bTurnOn, ++ IN u1Byte type ++ ) ++{ ++ u4Byte btTxRxCnt=0; ++ ++ btTxRxCnt = pCoexSta->highPriorityTx+pCoexSta->highPriorityRx+ ++ pCoexSta->lowPriorityTx+pCoexSta->lowPriorityRx; ++ ++ if(btTxRxCnt > 3000) ++ { ++ pCoexDm->bCurPsTdmaOn = TRUE; ++ pCoexDm->curPsTdma = 8; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], turn ON PS TDMA, type=%d for BT tx/rx counters=%d(>3000)\n", ++ pCoexDm->curPsTdma, btTxRxCnt)); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); ++ pCoexDm->bCurPsTdmaOn = bTurnOn; ++ pCoexDm->curPsTdma = type; ++ } ++ ++ if(!bForceExec) ++ { ++ if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && ++ (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) ++ return; ++ } ++ if(pCoexDm->bCurPsTdmaOn) ++ { ++ switch(pCoexDm->curPsTdma) ++ { ++ case 1: ++ default: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x98); ++ break; ++ case 2: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x98); ++ break; ++ case 3: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x98); ++ break; ++ case 4: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x5, 0x5, 0xe1, 0x80); ++ break; ++ case 5: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x98); ++ break; ++ case 6: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x98); ++ break; ++ case 7: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x98); ++ break; ++ case 8: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x5, 0x5, 0x60, 0x80); ++ break; ++ case 9: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x98); ++ break; ++ case 10: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x98); ++ break; ++ case 11: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x98); ++ break; ++ case 12: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x98); ++ break; ++ case 13: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x98); ++ break; ++ case 14: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x98); ++ break; ++ case 15: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x98); ++ break; ++ case 16: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x98); ++ break; ++ case 17: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x80); ++ break; ++ case 18: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x98); ++ break; ++ case 19: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x98); ++ break; ++ case 20: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x98); ++ break; ++ } ++ } ++ else ++ { ++ // disable PS tdma ++ switch(pCoexDm->curPsTdma) ++ { ++ case 0: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); ++ break; ++ case 1: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); ++ break; ++ default: ++ halbtc8723a2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); ++ break; ++ } ++ } ++ ++ // update pre state ++ pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; ++ pCoexDm->prePsTdma = pCoexDm->curPsTdma; ++} ++ ++ ++VOID ++halbtc8723a2ant_CoexAllOff( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // fw all off ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ // sw all off ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ // hw all off ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++} ++ ++VOID ++halbtc8723a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ // force to reset coex mechanism ++ halbtc8723a2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0x55555555, 0xffff, 0x3); ++ halbtc8723a2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, FORCE_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, FORCE_EXEC, FALSE, 0xc0); ++} ++ ++VOID ++halbtc8723a2ant_BtInquiryPage( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bLowPwrDisable=TRUE; ++ ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++} ++ ++VOID ++halbtc8723a2ant_BtEnableAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ BOOLEAN bWifiConnected=FALSE; ++ ++ // Here we need to resend some wifi info to BT ++ // because bt is reset and loss of the info. ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ if(bWifiConnected) ++ { ++ halbtc8723a2ant_IndicateWifiChnlBwInfo(pBtCoexist, BTC_MEDIA_CONNECT); ++ } ++ else ++ { ++ halbtc8723a2ant_IndicateWifiChnlBwInfo(pBtCoexist, BTC_MEDIA_DISCONNECT); ++ } ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); ++} ++ ++VOID ++halbtc8723a2ant_MonitorBtCtr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u4Byte regHPTxRx, regLPTxRx, u4Tmp; ++ u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; ++ u1Byte u1Tmp; ++ ++ regHPTxRx = 0x770; ++ regLPTxRx = 0x774; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); ++ regHPTx = u4Tmp & bMaskLWord; ++ regHPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); ++ regLPTx = u4Tmp & bMaskLWord; ++ regLPRx = (u4Tmp & bMaskHWord)>>16; ++ ++ pCoexSta->highPriorityTx = regHPTx; ++ pCoexSta->highPriorityRx = regHPRx; ++ pCoexSta->lowPriorityTx = regLPTx; ++ pCoexSta->lowPriorityRx = regLPRx; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); ++ ++ // reset counter ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); ++} ++ ++VOID ++halbtc8723a2ant_MonitorBtEnableDisable( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ static BOOLEAN bPreBtDisabled=FALSE; ++ static u4Byte btDisableCnt=0; ++ BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; ++ ++ // This function check if bt is disabled ++ ++ if( pCoexSta->highPriorityTx == 0 && ++ pCoexSta->highPriorityRx == 0 && ++ pCoexSta->lowPriorityTx == 0 && ++ pCoexSta->lowPriorityRx == 0) ++ { ++ bBtActive = FALSE; ++ } ++ if( pCoexSta->highPriorityTx == 0xffff && ++ pCoexSta->highPriorityRx == 0xffff && ++ pCoexSta->lowPriorityTx == 0xffff && ++ pCoexSta->lowPriorityRx == 0xffff) ++ { ++ bBtActive = FALSE; ++ } ++ if(bBtActive) ++ { ++ btDisableCnt = 0; ++ bBtDisabled = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n")); ++ } ++ else ++ { ++ btDisableCnt++; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", ++ btDisableCnt)); ++ if(btDisableCnt >= 2) ++ { ++ bBtDisabled = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n")); ++ } ++ } ++ if(bPreBtDisabled != bBtDisabled) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", ++ (bPreBtDisabled ? "disabled":"enabled"), ++ (bBtDisabled ? "disabled":"enabled"))); ++ bPreBtDisabled = bBtDisabled; ++ if(!bBtDisabled) ++ { ++ halbtc8723a2ant_BtEnableAction(pBtCoexist); ++ } ++ } ++} ++ ++BOOLEAN ++halbtc8723a2ant_IsCommonAction( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ BOOLEAN bCommon=FALSE, bWifiConnected=FALSE; ++ BOOLEAN bLowPwrDisable=FALSE; ++ ++ if(!pStackInfo->bBtLinkExist) ++ { ++ bLowPwrDisable = FALSE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ } ++ else ++ { ++ bLowPwrDisable = TRUE; ++ pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); ++ ++ if(halbtc8723a2ant_IsWifiIdle(pBtCoexist) && ++ BT_8723A_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle + Bt idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else if(!halbtc8723a2ant_IsWifiIdle(pBtCoexist) && ++ (BT_8723A_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-idle + BT idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else if(halbtc8723a2ant_IsWifiIdle(pBtCoexist) && ++ (BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle + Bt connected idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else if(!halbtc8723a2ant_IsWifiIdle(pBtCoexist) && ++ (BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-idle + Bt connected idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else if(halbtc8723a2ant_IsWifiIdle(pBtCoexist) && ++ (BT_8723A_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle + BT non-idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else if(halbtc8723a2ant_IsWifiConnectedIdle(pBtCoexist) && ++ (BT_8723A_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) ) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected-idle + BT non-idle!!\n")); ++ ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ ++ bCommon = TRUE; ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-idle + BT non-idle!!\n")); ++ halbtc8723a2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x20); ++ ++ bCommon = FALSE; ++ } ++ ++ return bCommon; ++} ++VOID ++halbtc8723a2ant_TdmaDurationAdjust( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bScoHid, ++ IN BOOLEAN bTxPause, ++ IN u1Byte maxInterval ++ ) ++{ ++ static s4Byte up,dn,m,n,WaitCount; ++ s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration ++ u1Byte retryCount=0; ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n")); ++ ++ if(pCoexDm->bResetTdmaAdjust) ++ { ++ pCoexDm->bResetTdmaAdjust = FALSE; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); ++ { ++ if(bScoHid) ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ else ++ { ++ if(bTxPause) ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ } ++ else ++ { ++ if(maxInterval == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(maxInterval == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(maxInterval == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ } ++ } ++ } ++ //============ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n= 3; ++ result = 0; ++ WaitCount = 0; ++ } ++ else ++ { ++ //accquire the BT TRx retry count from BT_Info byte2 ++ retryCount = pCoexSta->btRetryCnt; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount)); ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", ++ up, dn, m, n, WaitCount)); ++ result = 0; ++ WaitCount++; ++ ++ if(retryCount == 0) // no retry in the last 2-second duration ++ { ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration ++ { ++ WaitCount = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n")); ++ } ++ } ++ else if (retryCount <= 3) // <=3 retry in the last 2-second duration ++ { ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount <= 2) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); ++ } ++ } ++ else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration ++ { ++ if (WaitCount == 1) ++ m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ ++ else ++ m = 1; ++ ++ if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. ++ m = 20; ++ ++ n = 3*m; ++ up = 0; ++ dn = 0; ++ WaitCount = 0; ++ result = -1; ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval)); ++ if(maxInterval == 1) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); ++ pCoexDm->psTdmaDuAdjType = 5; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ pCoexDm->psTdmaDuAdjType = 13; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); ++ pCoexDm->psTdmaDuAdjType = 1; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ pCoexDm->psTdmaDuAdjType = 9; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 2) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ pCoexDm->psTdmaDuAdjType = 6; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ pCoexDm->psTdmaDuAdjType = 14; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ pCoexDm->psTdmaDuAdjType = 2; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ pCoexDm->psTdmaDuAdjType = 10; ++ } ++ } ++ } ++ } ++ else if(maxInterval == 3) ++ { ++ if(bTxPause) ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n")); ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ pCoexDm->psTdmaDuAdjType = 8; ++ } ++ else if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ pCoexDm->psTdmaDuAdjType = 16; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); ++ pCoexDm->psTdmaDuAdjType = 7; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ pCoexDm->psTdmaDuAdjType = 15; ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n")); ++ if(pCoexDm->curPsTdma == 5) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 6) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 7) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 8) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ if(pCoexDm->curPsTdma == 13) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 14) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 15) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 16) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ if(result == -1) ++ { ++ if(pCoexDm->curPsTdma == 1) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ pCoexDm->psTdmaDuAdjType = 4; ++ } ++ else if(pCoexDm->curPsTdma == 9) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ pCoexDm->psTdmaDuAdjType = 12; ++ } ++ } ++ else if (result == 1) ++ { ++ if(pCoexDm->curPsTdma == 4) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 3) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 2) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); ++ pCoexDm->psTdmaDuAdjType = 3; ++ } ++ else if(pCoexDm->curPsTdma == 12) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 11) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ else if(pCoexDm->curPsTdma == 10) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ pCoexDm->psTdmaDuAdjType = 11; ++ } ++ } ++ } ++ } ++ } ++ ++ // if current PsTdma not match with the recorded one (when scan, dhcp...), ++ // then we have to adjust it back to the previous record one. ++ if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) ++ { ++ BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", ++ pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ ++ if( !bScan && !bLink && !bRoam) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); ++ } ++ } ++} ++ ++// SCO only or SCO+PAN(HS) ++VOID ++halbtc8723a2ant_ActionSco( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1; ++ u4Byte wifiBw; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++ ++VOID ++halbtc8723a2ant_ActionHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1; ++ u4Byte wifiBw; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) ++VOID ++halbtc8723a2ant_ActionA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ else ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ } ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); ++ } ++ else ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp rate, 1:basic /0:edr ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); ++ } ++ else ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++VOID ++halbtc8723a2ant_ActionPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++ ++//PAN(HS) only ++VOID ++halbtc8723a2ant_ActionPanHs( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState; ++ u4Byte wifiBw; ++ ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ } ++ else ++ { ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ } ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ else ++ { ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++//PAN(EDR)+A2DP ++VOID ++halbtc8723a2ant_ActionPanEdrA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ } ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++VOID ++halbtc8723a2ant_ActionPanEdrHid( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1; ++ u4Byte wifiBw; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ } ++ else ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++// HID+A2DP+PAN(EDR) ++VOID ++halbtc8723a2ant_ActionHidA2dpPanEdr( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ } ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++VOID ++halbtc8723a2ant_ActionHidA2dp( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte wifiRssiState, wifiRssiState1, btInfoExt; ++ u4Byte wifiBw; ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ ++ if(halbtc8723a2ant_NeedToDecBtPwr(pBtCoexist)) ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); ++ else ++ halbtc8723a2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0xffff, 0x3); ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ if(BTC_WIFI_BW_HT40 == wifiBw) ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 37, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 1); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 1); ++ } ++ } ++ ++ // sw mechanism ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ wifiRssiState = halbtc8723a2ant_WifiRssiState(pBtCoexist, 0, 2, 27, 0); ++ wifiRssiState1 = halbtc8723a2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0); ++ ++ // fw mechanism ++ if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 1); ++ } ++ } ++ else ++ { ++ if(btInfoExt&BIT0) //a2dp basic rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); ++ } ++ else //a2dp edr rate ++ { ++ halbtc8723a2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 1); ++ } ++ } ++ ++ // sw mechanism ++ if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) || ++ (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ else ++ { ++ halbtc8723a2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE); ++ halbtc8723a2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0xc0); ++ } ++ } ++} ++ ++VOID ++halbtc8723a2ant_RunCoexistMechanism( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ u1Byte btInfoOriginal=0, btRetryCnt=0; ++ u1Byte algorithm=0; ++ ++ if(pBtCoexist->bManualControl) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Manual control!!!\n")); ++ return; ++ } ++ ++ if(pStackInfo->bProfileNotified) ++ { ++ if(pCoexSta->bHoldForStackOperation) ++ { ++ // if bt inquiry/page/pair, do not execute. ++ return; ++ } ++ ++ algorithm = halbtc8723a2ant_ActionAlgorithm(pBtCoexist); ++ if(pCoexSta->bHoldPeriodCnt && (BT_8723A_2ANT_COEX_ALGO_PANHS!=algorithm)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex],Hold BT inquiry/page scan setting (cnt = %d)!!\n", ++ pCoexSta->bHoldPeriodCnt)); ++ if(pCoexSta->bHoldPeriodCnt >= 6) ++ { ++ pCoexSta->bHoldPeriodCnt = 0; ++ // next time the coexist parameters should be reset again. ++ } ++ else ++ pCoexSta->bHoldPeriodCnt++; ++ return; ++ } ++ ++ pCoexDm->curAlgorithm = algorithm; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); ++ if(halbtc8723a2ant_IsCommonAction(pBtCoexist)) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n")); ++ pCoexDm->bResetTdmaAdjust = TRUE; ++ } ++ else ++ { ++ if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", ++ pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); ++ pCoexDm->bResetTdmaAdjust = TRUE; ++ } ++ switch(pCoexDm->curAlgorithm) ++ { ++ case BT_8723A_2ANT_COEX_ALGO_SCO: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); ++ halbtc8723a2ant_ActionSco(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); ++ halbtc8723a2ant_ActionHid(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); ++ halbtc8723a2ant_ActionA2dp(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); ++ halbtc8723a2ant_ActionPanEdr(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_PANHS: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); ++ halbtc8723a2ant_ActionPanHs(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_PANEDR_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); ++ halbtc8723a2ant_ActionPanEdrA2dp(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_PANEDR_HID: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); ++ halbtc8723a2ant_ActionPanEdrHid(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); ++ halbtc8723a2ant_ActionHidA2dpPanEdr(pBtCoexist); ++ break; ++ case BT_8723A_2ANT_COEX_ALGO_HID_A2DP: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); ++ halbtc8723a2ant_ActionHidA2dp(pBtCoexist); ++ break; ++ default: ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); ++ halbtc8723a2ant_CoexAllOff(pBtCoexist); ++ break; ++ } ++ pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; ++ } ++ } ++} ++ ++//============================================================ ++// work around function start with wa_halbtc8723a2ant_ ++//============================================================ ++VOID ++wa_halbtc8723a2ant_MonitorC2h( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ u1Byte tmp1b=0x0; ++ u4Byte curC2hTotalCnt=0x0; ++ static u4Byte preC2hTotalCnt=0x0, sameCntPollingTime=0x0; ++ ++ curC2hTotalCnt+=pCoexSta->btInfoC2hCnt[BT_INFO_SRC_8723A_2ANT_BT_RSP]; ++ ++ if(curC2hTotalCnt == preC2hTotalCnt) ++ { ++ sameCntPollingTime++; ++ } ++ else ++ { ++ preC2hTotalCnt = curC2hTotalCnt; ++ sameCntPollingTime = 0; ++ } ++ ++ if(sameCntPollingTime >= 2) ++ { ++ tmp1b = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x1af); ++ if(tmp1b != 0x0) ++ { ++ pCoexSta->c2hHangDetectCnt++; ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x1af, 0x0); ++ } ++ } ++} ++ ++//============================================================ ++// extern function start with EXhalbtc8723a2ant_ ++//============================================================ ++VOID ++EXhalbtc8723a2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++} ++ ++VOID ++EXhalbtc8723a2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ) ++{ ++ u4Byte u4Tmp=0; ++ u1Byte u1Tmp=0; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n")); ++ ++ // backup rf 0x1e value ++ pCoexDm->btRf0x1eBackup = ++ pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ // Enable counter statistics ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); ++ pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); ++} ++ ++VOID ++EXhalbtc8723a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n")); ++ ++ halbtc8723a2ant_InitCoexDm(pBtCoexist); ++} ++ ++VOID ++EXhalbtc8723a2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; ++ PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; ++ pu1Byte cliBuf=pBtCoexist->cliBuf; ++ u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; ++ u4Byte u4Tmp[4]; ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ ++ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); ++ CL_PRINTF(cliBuf); ++ ++ if(pBtCoexist->bManualControl) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); ++ CL_PRINTF(cliBuf); ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ ++ ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \ ++ pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], ++ pCoexDm->wifiChnlInfo[2]); ++ CL_PRINTF(cliBuf); ++ ++ // wifi status ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============"); ++ CL_PRINTF(cliBuf); ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ ++ ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723A_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus)? "idle":( (BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy"))), ++ pCoexSta->btRssi, pCoexSta->btRetryCnt); ++ CL_PRINTF(cliBuf); ++ ++ if(pStackInfo->bProfileNotified) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ ++ pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ ++ btInfoExt = pCoexSta->btInfoExt; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ ++ (btInfoExt&BIT0)? "Basic rate":"EDR rate"); ++ CL_PRINTF(cliBuf); ++ ++ for(i=0; ibtInfoC2hCnt[i]) ++ { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723a2Ant[i], \ ++ pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], ++ pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], ++ pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], ++ pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); ++ CL_PRINTF(cliBuf); ++ } ++ } ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "write 0x1af=0x0 num", \ ++ pCoexSta->c2hHangDetectCnt); ++ CL_PRINTF(cliBuf); ++ ++ // Sw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "SM1[ShRf/ LpRA/ LimDig]", \ ++ pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ ++ pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); ++ CL_PRINTF(cliBuf); ++ ++ // Fw mechanism ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); ++ CL_PRINTF(cliBuf); ++ ++ if(!pBtCoexist->bManualControl) ++ { ++ psTdmaCase = pCoexDm->curPsTdma; ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \ ++ pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], ++ pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], ++ pCoexDm->psTdmaPara[4], psTdmaCase); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ ++ pCoexDm->bCurDecBtPwr, pCoexDm->bCurIgnoreWlanAct); ++ CL_PRINTF(cliBuf); ++ } ++ ++ // Hw setting ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ ++ pCoexDm->btRf0x1eBackup); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); ++ u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x783); ++ u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x796); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/ 0x783/ 0x796", \ ++ u1Tmp[0], u1Tmp[1], u1Tmp[2]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x880", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \ ++ u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ ++ u4Tmp[0], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x484); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x484(rate adaptive)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ ++ u4Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8); ++ u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xdac); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xda0/0xda4/0xda8/0xdac(FA cnt)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u4Tmp[3]); ++ CL_PRINTF(cliBuf); ++ ++ u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); ++ u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); ++ u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); ++ u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ ++ u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770 (hp rx[31:16]/tx[15:0])", \ ++ pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); ++ CL_PRINTF(cliBuf); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ ++ pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); ++ CL_PRINTF(cliBuf); ++ ++ pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++VOID ++EXhalbtc8723a2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_IPS_ENTER == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n")); ++ halbtc8723a2ant_CoexAllOff(pBtCoexist); ++ } ++ else if(BTC_IPS_LEAVE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n")); ++ //halbtc8723a2ant_InitCoexDm(pBtCoexist); ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_LPS_ENABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n")); ++ } ++ else if(BTC_LPS_DISABLE == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_SCAN_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n")); ++ } ++ else if(BTC_SCAN_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_ASSOCIATE_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n")); ++ } ++ else if(BTC_ASSOCIATE_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_MEDIA_CONNECT == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n")); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n")); ++ } ++ ++ halbtc8723a2ant_IndicateWifiChnlBwInfo(pBtCoexist, type); ++} ++ ++VOID ++EXhalbtc8723a2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(type == BTC_PACKET_DHCP) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n")); ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ) ++{ ++ u1Byte btInfo=0; ++ u1Byte i, rspSource=0; ++ BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; ++ BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; ++ ++ pCoexSta->bC2hBtInfoReqSent = FALSE; ++ ++ rspSource = BT_INFO_SRC_8723A_2ANT_BT_RSP; ++ pCoexSta->btInfoC2hCnt[rspSource]++; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); ++ for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; ++ if(i == 0) ++ btInfo = tmpBuf[i]; ++ if(i == length-1) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i])); ++ } ++ else ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i])); ++ } ++ } ++ ++ if(BT_INFO_SRC_8723A_2ANT_WIFI_FW != rspSource) ++ { ++ pCoexSta->btRetryCnt = ++ pCoexSta->btInfoC2h[rspSource][1]; ++ ++ pCoexSta->btRssi = ++ pCoexSta->btInfoC2h[rspSource][2]*2+10; ++ ++ pCoexSta->btInfoExt = ++ pCoexSta->btInfoC2h[rspSource][3]; ++ } ++ ++ pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ // check BIT2 first ==> check if bt is under inquiry or page scan ++ if(btInfo & BT_INFO_8723A_2ANT_B_INQ_PAGE) ++ { ++ pCoexSta->bC2hBtInquiryPage = TRUE; ++ } ++ else ++ { ++ pCoexSta->bC2hBtInquiryPage = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_StackOperationNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ) ++{ ++ if(BTC_STACK_OP_INQ_PAGE_PAIR_START == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], StackOP Inquiry/page/pair start notify\n")); ++ pCoexSta->bHoldForStackOperation = TRUE; ++ pCoexSta->bHoldPeriodCnt = 1; ++ halbtc8723a2ant_BtInquiryPage(pBtCoexist); ++ } ++ else if(BTC_STACK_OP_INQ_PAGE_PAIR_FINISH == type) ++ { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], StackOP Inquiry/page/pair finish notify\n")); ++ pCoexSta->bHoldForStackOperation = FALSE; ++ } ++} ++ ++VOID ++EXhalbtc8723a2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n")); ++ ++ halbtc8723a2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); ++ EXhalbtc8723a2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++VOID ++EXhalbtc8723a2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ) ++{ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Periodical!!\n")); ++ ++ // work around for c2h hang ++ wa_halbtc8723a2ant_MonitorC2h(pBtCoexist); ++ ++ halbtc8723a2ant_QueryBtInfo(pBtCoexist); ++ halbtc8723a2ant_MonitorBtCtr(pBtCoexist); ++ halbtc8723a2ant_MonitorBtEnableDisable(pBtCoexist); ++ ++ halbtc8723a2ant_RunCoexistMechanism(pBtCoexist); ++} ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a2Ant.h +new file mode 100644 +index 0000000..d5d5488 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723a2Ant.h +@@ -0,0 +1,184 @@ ++//=========================================== ++// The following is for 8723A 2Ant BT Co-exist definition ++//=========================================== ++#define BT_INFO_8723A_2ANT_B_FTP BIT7 ++#define BT_INFO_8723A_2ANT_B_A2DP BIT6 ++#define BT_INFO_8723A_2ANT_B_HID BIT5 ++#define BT_INFO_8723A_2ANT_B_SCO_BUSY BIT4 ++#define BT_INFO_8723A_2ANT_B_ACL_BUSY BIT3 ++#define BT_INFO_8723A_2ANT_B_INQ_PAGE BIT2 ++#define BT_INFO_8723A_2ANT_B_SCO_ESCO BIT1 ++#define BT_INFO_8723A_2ANT_B_CONNECTION BIT0 ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT 2 ++ ++typedef enum _BT_INFO_SRC_8723A_2ANT{ ++ BT_INFO_SRC_8723A_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8723A_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8723A_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8723A_2ANT_MAX ++}BT_INFO_SRC_8723A_2ANT,*PBT_INFO_SRC_8723A_2ANT; ++ ++typedef enum _BT_8723A_2ANT_BT_STATUS{ ++ BT_8723A_2ANT_BT_STATUS_IDLE = 0x0, ++ BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8723A_2ANT_BT_STATUS_NON_IDLE = 0x2, ++ BT_8723A_2ANT_BT_STATUS_MAX ++}BT_8723A_2ANT_BT_STATUS,*PBT_8723A_2ANT_BT_STATUS; ++ ++typedef enum _BT_8723A_2ANT_COEX_ALGO{ ++ BT_8723A_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8723A_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8723A_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8723A_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8723A_2ANT_COEX_ALGO_PANEDR = 0x4, ++ BT_8723A_2ANT_COEX_ALGO_PANHS = 0x5, ++ BT_8723A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x6, ++ BT_8723A_2ANT_COEX_ALGO_PANEDR_HID = 0x7, ++ BT_8723A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x8, ++ BT_8723A_2ANT_COEX_ALGO_HID_A2DP = 0x9, ++ BT_8723A_2ANT_COEX_ALGO_MAX ++}BT_8723A_2ANT_COEX_ALGO,*PBT_8723A_2ANT_COEX_ALGO; ++ ++typedef struct _COEX_DM_8723A_2ANT{ ++ // fw mechanism ++ BOOLEAN bPreDecBtPwr; ++ BOOLEAN bCurDecBtPwr; ++ //BOOLEAN bPreBtLnaConstrain; ++ //BOOLEAN bCurBtLnaConstrain; ++ //u1Byte bPreBtPsdMode; ++ //u1Byte bCurBtPsdMode; ++ u1Byte preFwDacSwingLvl; ++ u1Byte curFwDacSwingLvl; ++ BOOLEAN bCurIgnoreWlanAct; ++ BOOLEAN bPreIgnoreWlanAct; ++ u1Byte prePsTdma; ++ u1Byte curPsTdma; ++ u1Byte psTdmaPara[5]; ++ u1Byte psTdmaDuAdjType; ++ BOOLEAN bResetTdmaAdjust; ++ BOOLEAN bPrePsTdmaOn; ++ BOOLEAN bCurPsTdmaOn; ++ //BOOLEAN bPreBtAutoReport; ++ //BOOLEAN bCurBtAutoReport; ++ ++ // sw mechanism ++ BOOLEAN bPreRfRxLpfShrink; ++ BOOLEAN bCurRfRxLpfShrink; ++ u4Byte btRf0x1eBackup; ++ BOOLEAN bPreLowPenaltyRa; ++ BOOLEAN bCurLowPenaltyRa; ++ BOOLEAN bPreDacSwingOn; ++ u4Byte preDacSwingLvl; ++ BOOLEAN bCurDacSwingOn; ++ u4Byte curDacSwingLvl; ++ BOOLEAN bPreAdcBackOff; ++ BOOLEAN bCurAdcBackOff; ++ BOOLEAN bPreAgcTableEn; ++ BOOLEAN bCurAgcTableEn; ++ u4Byte preVal0x6c0; ++ u4Byte curVal0x6c0; ++ u4Byte preVal0x6c8; ++ u4Byte curVal0x6c8; ++ u1Byte preVal0x6cc; ++ u1Byte curVal0x6cc; ++ BOOLEAN bLimitedDig; ++ ++ // algorithm related ++ u1Byte preAlgorithm; ++ u1Byte curAlgorithm; ++ u1Byte btStatus; ++ u1Byte wifiChnlInfo[3]; ++} COEX_DM_8723A_2ANT, *PCOEX_DM_8723A_2ANT; ++ ++typedef struct _COEX_STA_8723A_2ANT{ ++ u4Byte highPriorityTx; ++ u4Byte highPriorityRx; ++ u4Byte lowPriorityTx; ++ u4Byte lowPriorityRx; ++ u1Byte btRssi; ++ u1Byte preBtRssiState; ++ u1Byte preBtRssiState1; ++ u1Byte preWifiRssiState[4]; ++ BOOLEAN bC2hBtInfoReqSent; ++ u1Byte btInfoC2h[BT_INFO_SRC_8723A_2ANT_MAX][10]; ++ u4Byte btInfoC2hCnt[BT_INFO_SRC_8723A_2ANT_MAX]; ++ BOOLEAN bC2hBtInquiryPage; ++ u1Byte btRetryCnt; ++ u1Byte btInfoExt; ++ BOOLEAN bHoldForStackOperation; ++ u1Byte bHoldPeriodCnt; ++ // this is for c2h hang work-around ++ u4Byte c2hHangDetectCnt; ++}COEX_STA_8723A_2ANT, *PCOEX_STA_8723A_2ANT; ++ ++//=========================================== ++// The following is interface which will notify coex module. ++//=========================================== ++VOID ++EXhalbtc8723a2ant_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a2ant_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtc8723a2ant_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a2ant_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_SpecialPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a2ant_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtc8723a2ant_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtc8723a2ant_StackOperationNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtc8723a2ant_DisplayCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b1Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b1Ant.c +new file mode 100644 +index 0000000..4ff4699 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b1Ant.c +@@ -0,0 +1,5008 @@ ++/* ************************************************************ ++ * Description: ++ * ++ * This file is for RTL8723B Co-exist mechanism ++ * ++ * History ++ * 2012/11/15 Cosa first check in. ++ * ++ * ************************************************************ */ ++ ++/* ************************************************************ ++ * include files ++ * ************************************************************ */ ++#include "Mp_Precomp.h" ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8723B_SUPPORT == 1) ++/* ************************************************************ ++ * Global variables, these are static variables ++ * ************************************************************ */ ++static u8 *trace_buf = &gl_btc_trace_buf[0]; ++static struct coex_dm_8723b_1ant glcoex_dm_8723b_1ant; ++static struct coex_dm_8723b_1ant *coex_dm = &glcoex_dm_8723b_1ant; ++static struct coex_sta_8723b_1ant glcoex_sta_8723b_1ant; ++static struct coex_sta_8723b_1ant *coex_sta = &glcoex_sta_8723b_1ant; ++static struct psdscan_sta_8723b_1ant gl_psd_scan_8723b_1ant; ++static struct psdscan_sta_8723b_1ant *psd_scan = &gl_psd_scan_8723b_1ant; ++ ++ ++const char *const glbt_info_src_8723b_1ant[] = { ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u32 glcoex_ver_date_8723b_1ant = 20151127; ++u32 glcoex_ver_8723b_1ant = 0x65; ++ ++/* ************************************************************ ++ * local function proto type if needed ++ * ************************************************************ ++ * ************************************************************ ++ * local function start with halbtc8723b1ant_ ++ * ************************************************************ */ ++ ++void halbtc8723b1ant_update_ra_mask(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 dis_rate_mask) ++{ ++ coex_dm->cur_ra_mask = dis_rate_mask; ++ ++ if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, ++ &coex_dm->cur_ra_mask); ++ coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; ++} ++ ++void halbtc8723b1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ boolean wifi_under_b_mode = false; ++ ++ coex_dm->cur_arfr_type = type; ++ ++ if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { ++ switch (coex_dm->cur_arfr_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_4byte(btcoexist, 0x430, ++ coex_dm->backup_arfr_cnt1); ++ btcoexist->btc_write_4byte(btcoexist, 0x434, ++ coex_dm->backup_arfr_cnt2); ++ break; ++ case 1: ++ btcoexist->btc_get(btcoexist, ++ BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x01010101); ++ } else { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; ++} ++ ++void halbtc8723b1ant_retry_limit(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_retry_limit_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_retry_limit_type != ++ coex_dm->cur_retry_limit_type)) { ++ switch (coex_dm->cur_retry_limit_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ coex_dm->backup_retry_limit); ++ break; ++ case 1: /* retry limit=8 */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; ++} ++ ++void halbtc8723b1ant_ampdu_max_time(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_ampdu_time_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) { ++ switch (coex_dm->cur_ampdu_time_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ coex_dm->backup_ampdu_max_time); ++ break; ++ case 1: /* AMPDU timw = 0x38 * 32us */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; ++} ++ ++void halbtc8723b1ant_limited_tx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type, ++ IN u8 retry_limit_type, IN u8 ampdu_time_type) ++{ ++ switch (ra_mask_type) { ++ case 0: /* normal mode */ ++ halbtc8723b1ant_update_ra_mask(btcoexist, force_exec, ++ 0x0); ++ break; ++ case 1: /* disable cck 1/2 */ ++ halbtc8723b1ant_update_ra_mask(btcoexist, force_exec, ++ 0x00000003); ++ break; ++ case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ ++ halbtc8723b1ant_update_ra_mask(btcoexist, force_exec, ++ 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8723b1ant_auto_rate_fallback_retry(btcoexist, force_exec, ++ arfr_type); ++ halbtc8723b1ant_retry_limit(btcoexist, force_exec, retry_limit_type); ++ halbtc8723b1ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type); ++} ++ ++void halbtc8723b1ant_limited_rx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rej_ap_agg_pkt, ++ IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size) ++{ ++ boolean reject_rx_agg = rej_ap_agg_pkt; ++ boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; ++ u8 rx_agg_size = agg_buf_size; ++ ++ /* ============================================ */ ++ /* Rx Aggregation related setting */ ++ /* ============================================ */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ &reject_rx_agg); ++ /* decide BT control aggregation buf size or not */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ &bt_ctrl_rx_agg_size); ++ /* aggregation buf size, only work when BT control Rx aggregation size. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); ++ /* real update aggregation setting */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++void halbtc8723b1ant_query_bt_info(IN struct btc_coexist *btcoexist) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ coex_sta->c2h_bt_info_req_sent = true; ++ ++ h2c_parameter[0] |= BIT(0); /* trigger */ ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); ++} ++ ++void halbtc8723b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist) ++{ ++ u32 reg_hp_txrx, reg_lp_txrx, u32tmp; ++ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; ++ static u32 num_of_bt_counter_chk = 0; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ /* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */ ++ /* if (! (btcoexist->btc_read_1byte(btcoexist, 0x76e) & 0x8) ) */ ++ ++ reg_hp_txrx = 0x770; ++ reg_lp_txrx = 0x774; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); ++ reg_hp_tx = u32tmp & MASKLWORD; ++ reg_hp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); ++ reg_lp_tx = u32tmp & MASKLWORD; ++ reg_lp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ coex_sta->high_priority_tx = reg_hp_tx; ++ coex_sta->high_priority_rx = reg_hp_rx; ++ coex_sta->low_priority_tx = reg_lp_tx; ++ coex_sta->low_priority_rx = reg_lp_rx; ++ ++ if ((coex_sta->high_priority_tx + coex_sta->high_priority_rx < 50) && ++ (bt_link_info->hid_exist == true)) ++ bt_link_info->hid_exist = false; ++ ++ if ((coex_sta->low_priority_tx > 1050) && ++ (!coex_sta->c2h_bt_inquiry_page)) ++ coex_sta->pop_event_cnt++; ++ ++ if ((coex_sta->low_priority_rx >= 950) && (!coex_sta->under_ips) ++ && (coex_sta->low_priority_rx >= ++ coex_sta->low_priority_tx) && ++ (!coex_sta->c2h_bt_inquiry_page)) ++ bt_link_info->slave_role = true; ++ else ++ bt_link_info->slave_role = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", ++ reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx); ++ BTC_TRACE(trace_buf); ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); ++ ++ /* This part is for wifi FW and driver to update BT's status as disabled. */ ++ /* The flow is as the following */ ++ /* 1. disable BT */ ++ /* 2. if all BT Tx/Rx counter=0, after 6 sec we query bt info */ ++ /* 3. Because BT will not rsp from mailbox, so wifi fw will know BT is disabled */ ++ /* 4. FW will rsp c2h for BT that driver will know BT is disabled. */ ++ if ((reg_hp_tx == 0) && (reg_hp_rx == 0) && (reg_lp_tx == 0) && ++ (reg_lp_rx == 0)) { ++ num_of_bt_counter_chk++; ++ if (num_of_bt_counter_chk >= 3) { ++ halbtc8723b1ant_query_bt_info(btcoexist); ++ num_of_bt_counter_chk = 0; ++ } ++ } ++ ++} ++ ++ ++void halbtc8723b1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist) ++{ ++ s32 wifi_rssi = 0; ++ boolean wifi_busy = false, wifi_under_b_mode = false; ++ static u8 cck_lock_counter = 0; ++ u32 total_cnt; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ ++ if (coex_sta->under_ips) { ++ coex_sta->crc_ok_cck = 0; ++ coex_sta->crc_ok_11g = 0; ++ coex_sta->crc_ok_11n = 0; ++ coex_sta->crc_ok_11n_agg = 0; ++ ++ coex_sta->crc_err_cck = 0; ++ coex_sta->crc_err_11g = 0; ++ coex_sta->crc_err_11n = 0; ++ coex_sta->crc_err_11n_agg = 0; ++ } else { ++ coex_sta->crc_ok_cck = btcoexist->btc_read_4byte(btcoexist, ++ 0xf88); ++ coex_sta->crc_ok_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf94); ++ coex_sta->crc_ok_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf90); ++ coex_sta->crc_ok_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xfb8); ++ ++ coex_sta->crc_err_cck = btcoexist->btc_read_4byte(btcoexist, ++ 0xf84); ++ coex_sta->crc_err_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf96); ++ coex_sta->crc_err_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf92); ++ coex_sta->crc_err_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xfba); ++ } ++ ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x1); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x0); ++ ++ if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) { ++ total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g + ++ coex_sta->crc_ok_11n + ++ coex_sta->crc_ok_11n_agg; ++ ++ if ((coex_dm->bt_status == BT_8723B_1ANT_BT_STATUS_ACL_BUSY) || ++ (coex_dm->bt_status == ++ BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY) || ++ (coex_dm->bt_status == ++ BT_8723B_1ANT_BT_STATUS_SCO_BUSY)) { ++ if (coex_sta->crc_ok_cck > (total_cnt - ++ coex_sta->crc_ok_cck)) { ++ if (cck_lock_counter < 3) ++ cck_lock_counter++; ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ ++ if (!coex_sta->pre_ccklock) { ++ ++ if (cck_lock_counter >= 3) ++ coex_sta->cck_lock = true; ++ else ++ coex_sta->cck_lock = false; ++ } else { ++ if (cck_lock_counter == 0) ++ coex_sta->cck_lock = false; ++ else ++ coex_sta->cck_lock = true; ++ } ++ ++ if (coex_sta->cck_lock) ++ coex_sta->cck_ever_lock = true; ++ ++ coex_sta->pre_ccklock = coex_sta->cck_lock; ++ ++ ++} ++ ++boolean halbtc8723b1ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist) ++{ ++ static boolean pre_wifi_busy = false, pre_under_4way = false, ++ pre_bt_hs_on = false; ++ boolean wifi_busy = false, under_4way = false, bt_hs_on = false; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ ++ if (wifi_connected) { ++ if (wifi_busy != pre_wifi_busy) { ++ pre_wifi_busy = wifi_busy; ++ return true; ++ } ++ if (under_4way != pre_under_4way) { ++ pre_under_4way = under_4way; ++ return true; ++ } ++ if (bt_hs_on != pre_bt_hs_on) { ++ pre_bt_hs_on = bt_hs_on; ++ return true; ++ } ++ ++ ++ } ++ ++ return false; ++} ++ ++void halbtc8723b1ant_update_bt_link_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ bt_link_info->bt_link_exist = coex_sta->bt_link_exist; ++ bt_link_info->sco_exist = coex_sta->sco_exist; ++ bt_link_info->a2dp_exist = coex_sta->a2dp_exist; ++ bt_link_info->pan_exist = coex_sta->pan_exist; ++ bt_link_info->hid_exist = coex_sta->hid_exist; ++ bt_link_info->bt_hi_pri_link_exist = coex_sta->bt_hi_pri_link_exist; ++ ++ /* work around for HS mode. */ ++ if (bt_hs_on) { ++ bt_link_info->pan_exist = true; ++ bt_link_info->bt_link_exist = true; ++ } ++ ++ /* check if Sco only */ ++ if (bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->sco_only = true; ++ else ++ bt_link_info->sco_only = false; ++ ++ /* check if A2dp only */ ++ if (!bt_link_info->sco_exist && ++ bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->a2dp_only = true; ++ else ++ bt_link_info->a2dp_only = false; ++ ++ /* check if Pan only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->pan_only = true; ++ else ++ bt_link_info->pan_only = false; ++ ++ /* check if Hid only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ bt_link_info->hid_exist) ++ bt_link_info->hid_only = true; ++ else ++ bt_link_info->hid_only = false; ++} ++ ++void halbtc8723b1ant_set_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean enable_auto_report) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = 0; ++ ++ if (enable_auto_report) ++ h2c_parameter[0] |= BIT(0); ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); ++} ++ ++void halbtc8723b1ant_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable_auto_report) ++{ ++ coex_dm->cur_bt_auto_report = enable_auto_report; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) ++ return; ++ } ++ halbtc8723b1ant_set_bt_auto_report(btcoexist, ++ coex_dm->cur_bt_auto_report); ++ ++ coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; ++} ++ ++void halbtc8723b1ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist ++ *btcoexist, IN boolean low_penalty_ra) ++{ ++ u8 h2c_parameter[6] = {0}; ++ ++ h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */ ++ ++ if (low_penalty_ra) { ++ h2c_parameter[1] |= BIT(0); ++ h2c_parameter[2] = ++ 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */ ++ h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */ ++ h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */ ++ h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter); ++} ++ ++void halbtc8723b1ant_low_penalty_ra(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean low_penalty_ra) ++{ ++ coex_dm->cur_low_penalty_ra = low_penalty_ra; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) ++ return; ++ } ++ halbtc8723b1ant_set_sw_penalty_tx_rate_adaptive(btcoexist, ++ coex_dm->cur_low_penalty_ra); ++ ++ coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; ++} ++ ++void halbtc8723b1ant_set_coex_table(IN struct btc_coexist *btcoexist, ++ IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); ++} ++ ++void halbtc8723b1ant_coex_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4, ++ IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ coex_dm->cur_val0x6c0 = val0x6c0; ++ coex_dm->cur_val0x6c4 = val0x6c4; ++ coex_dm->cur_val0x6c8 = val0x6c8; ++ coex_dm->cur_val0x6cc = val0x6cc; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && ++ (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && ++ (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && ++ (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) ++ return; ++ } ++ halbtc8723b1ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, ++ val0x6cc); ++ ++ coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; ++ coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; ++ coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; ++ coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; ++} ++ ++void halbtc8723b1ant_coex_table_with_type(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE ++ if (board_info->btdm_ant_num_by_ant_det == 2) { ++ if (type == 3) ++ type = 14; ++ else if (type == 4) ++ type = 13; ++ else if (type == 5) ++ type = 8; ++ } ++#endif ++#endif ++ ++ coex_sta->coex_table_type = type; ++ ++ switch (type) { ++ case 0: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 4: ++ if ((coex_sta->cck_ever_lock) && ++ (coex_sta->scan_ap_num <= 5)) ++ halbtc8723b1ant_coex_table(btcoexist, ++ force_exec, 0x55555555, 0xaaaa5a5a, ++ 0xffffff, 0x3); ++ else ++ halbtc8723b1ant_coex_table(btcoexist, ++ force_exec, 0x55555555, 0x5a5a5a5a, ++ 0xffffff, 0x3); ++ break; ++ case 5: ++ if ((coex_sta->cck_ever_lock) && ++ (coex_sta->scan_ap_num <= 5)) ++ halbtc8723b1ant_coex_table(btcoexist, ++ force_exec, 0x5a5a5a5a, 0x5aaa5a5a, ++ 0xffffff, 0x3); ++ else ++ halbtc8723b1ant_coex_table(btcoexist, ++ force_exec, 0x5a5a5a5a, 0x5aaa5a5a, ++ 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 8: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 9: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 10: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 11: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 12: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 13: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 14: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 15: ++ halbtc8723b1ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8723b1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean enable) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ if (enable) { ++ h2c_parameter[0] |= BIT(0); /* function enable */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); ++} ++ ++void halbtc8723b1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable) ++{ ++ coex_dm->cur_ignore_wlan_act = enable; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_ignore_wlan_act == ++ coex_dm->cur_ignore_wlan_act) ++ return; ++ } ++ halbtc8723b1ant_set_fw_ignore_wlan_act(btcoexist, enable); ++ ++ coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; ++} ++ ++void halbtc8723b1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN u8 lps_val, IN u8 rpwm_val) ++{ ++ u8 lps = lps_val; ++ u8 rpwm = rpwm_val; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps); ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++void halbtc8723b1ant_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ coex_dm->cur_lps = lps_val; ++ coex_dm->cur_rpwm = rpwm_val; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_lps == coex_dm->cur_lps) && ++ (coex_dm->pre_rpwm == coex_dm->cur_rpwm)) ++ return; ++ } ++ halbtc8723b1ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val); ++ ++ coex_dm->pre_lps = coex_dm->cur_lps; ++ coex_dm->pre_rpwm = coex_dm->cur_rpwm; ++} ++ ++void halbtc8723b1ant_sw_mechanism(IN struct btc_coexist *btcoexist, ++ IN boolean low_penalty_ra) ++{ ++ halbtc8723b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); ++} ++ ++void halbtc8723b1ant_set_ant_path(IN struct btc_coexist *btcoexist, ++ IN u8 ant_pos_type, IN boolean force_exec, IN boolean init_hwcfg, ++ IN boolean wifi_off) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ PADAPTER padapter = btcoexist->Adapter; ++ u32 fw_ver = 0, u32tmp = 0, cnt_bt_cal_chk = 0; ++ boolean pg_ext_switch = false; ++ boolean use_ext_switch = false; ++ boolean is_in_mp_mode = false; ++ u8 h2c_parameter[2] = {0}, u8tmp = 0; ++ u32 u32tmp_1[4]; ++ ++ coex_dm->cur_ant_pos_type = ant_pos_type; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_EXT_SWITCH, &pg_ext_switch); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, ++ &fw_ver); /* [31:16]=fw ver, [15:0]=fw sub ver */ ++ ++ if ((fw_ver > 0 && fw_ver < 0xc0000) || pg_ext_switch) ++ use_ext_switch = true; ++ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE ++ if (ant_pos_type == BTC_ANT_PATH_PTA) { ++ if ((board_info->btdm_ant_det_finish) && ++ (board_info->btdm_ant_num_by_ant_det == 2)) { ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) ++ ant_pos_type = BTC_ANT_PATH_WIFI; ++ else ++ ant_pos_type = BTC_ANT_PATH_BT; ++ } ++ } ++#endif ++#endif ++ ++ if (init_hwcfg) { ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x780); /* WiFi TRx Mask on */ ++ /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */ ++ /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x15); */ /*BT TRx Mask on */ ++ ++ if (fw_ver >= 0x180000) { ++ /* Use H2C to set GNT_BT to HIGH */ ++ h2c_parameter[0] = 1; ++ btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, ++ h2c_parameter); ++ ++ cnt_bt_cal_chk = 0; ++ while (1) { ++ if (padapter->bFWReady == false) { ++ BTC_SPRINTF(trace_buf , BT_TMP_BUF_SIZE, ++ ("halbtc8723b1ant_set_ant_path(): we don't need to wait for H2C command completion because of Fw download fail!!!\n")); ++ BTC_TRACE(trace_buf); ++ break; ++ } ++ ++ if (btcoexist->btc_read_1byte(btcoexist, ++ 0x765) == 0x18) ++ break; ++ ++ cnt_bt_cal_chk++; ++ if (cnt_bt_cal_chk > 20) ++ break; ++ } ++ } else { ++ /* set grant_bt to high */ ++ btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18); ++ } ++ /* set wlan_act control by PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); ++ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, ++ 0x0); /* BT select s0/s1 is controlled by BT */ ++ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x39, 0x8, 0x1); ++ btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x944, 0x3, 0x3); ++ btcoexist->btc_write_1byte(btcoexist, 0x930, 0x77); ++ } else if (wifi_off) { ++ if (fw_ver >= 0x180000) { ++ /* Use H2C to set GNT_BT to HIGH */ ++ h2c_parameter[0] = 1; ++ btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, ++ h2c_parameter); ++ ++ cnt_bt_cal_chk = 0; ++ while (1) { ++ if (padapter->bFWReady == false) { ++ BTC_SPRINTF(trace_buf , BT_TMP_BUF_SIZE, ++ ("halbtc8723b1ant_set_ant_path(): we don't need to wait for H2C command completion because of Fw download fail!!!\n")); ++ BTC_TRACE(trace_buf); ++ break; ++ } ++ ++ if (btcoexist->btc_read_1byte(btcoexist, ++ 0x765) == 0x18) ++ break; ++ ++ cnt_bt_cal_chk++; ++ if (cnt_bt_cal_chk > 20) ++ break; ++ } ++ } else { ++ /* set grant_bt to high */ ++ btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18); ++ } ++ /* set wlan_act to always low */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, ++ &is_in_mp_mode); ++ if (!is_in_mp_mode) ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, ++ 0x20, 0x0); /* BT select s0/s1 is controlled by BT */ ++ else ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, ++ 0x20, 0x1); /* BT select s0/s1 is controlled by WiFi */ ++ ++ /* 0x4c[24:23]=00, Set Antenna control by BT_RFE_CTRL BT Vendor 0xac=0xf002 */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp &= ~BIT(23); ++ u32tmp &= ~BIT(24); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ } else { ++ /* Use H2C to set GNT_BT to LOW */ ++ if (fw_ver >= 0x180000) { ++ if (btcoexist->btc_read_1byte(btcoexist, 0x765) != 0) { ++ h2c_parameter[0] = 0; ++ btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, ++ h2c_parameter); ++ ++ cnt_bt_cal_chk = 0; ++ while (1) { ++ if (padapter->bFWReady == false) { ++ BTC_SPRINTF(trace_buf , BT_TMP_BUF_SIZE, ++ ("halbtc8723b1ant_set_ant_path(): we don't need to wait for H2C command completion because of Fw download fail!!!\n")); ++ BTC_TRACE(trace_buf); ++ break; ++ } ++ ++ if (btcoexist->btc_read_1byte(btcoexist, ++ 0x765) == 0x0) ++ break; ++ ++ cnt_bt_cal_chk++; ++ if (cnt_bt_cal_chk > 20) ++ break; ++ } ++ } ++ } else { ++ /* BT calibration check */ ++ while (cnt_bt_cal_chk <= 20) { ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, ++ 0x49d); ++ cnt_bt_cal_chk++; ++ if (u8tmp & BIT(0)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n", ++ cnt_bt_cal_chk); ++ BTC_TRACE(trace_buf); ++ delay_ms(50); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n", ++ cnt_bt_cal_chk); ++ BTC_TRACE(trace_buf); ++ break; ++ } ++ } ++ ++ /* set grant_bt to PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x765, 0x0); ++ } ++ ++ if (btcoexist->btc_read_1byte(btcoexist, 0x76e) != 0xc) { ++ /* set wlan_act control by PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); ++ } ++ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, ++ 0x1); /* BT select s0/s1 is controlled by WiFi */ ++ } ++ ++ if (use_ext_switch) { ++ if (init_hwcfg) { ++ /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp &= ~BIT(23); ++ u32tmp |= BIT(24); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ ++ ++ u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, ++ 0x948); ++ if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240)) ++ btcoexist->btc_write_4byte(btcoexist, 0x948, ++ u32tmp_1[0]); ++ else ++ btcoexist->btc_write_4byte(btcoexist, 0x948, ++ 0x0); ++ ++ ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) { ++ /* tell firmware "no antenna inverse" */ ++ h2c_parameter[0] = 0; ++ h2c_parameter[1] = 1; /* ext switch type */ ++ btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, ++ h2c_parameter); ++ } else { ++ /* tell firmware "antenna inverse" */ ++ h2c_parameter[0] = 1; ++ h2c_parameter[1] = 1; /* ext switch type */ ++ btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, ++ h2c_parameter); ++ } ++ } ++ ++ if (force_exec || ++ (coex_dm->cur_ant_pos_type != ++ coex_dm->pre_ant_pos_type)) { ++ /* ext switch setting */ ++ switch (ant_pos_type) { ++ case BTC_ANT_PATH_WIFI: ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) ++ btcoexist->btc_write_1byte_bitmask( ++ btcoexist, 0x92c, 0x3, ++ 0x1); ++ else ++ btcoexist->btc_write_1byte_bitmask( ++ btcoexist, 0x92c, 0x3, ++ 0x2); ++ break; ++ case BTC_ANT_PATH_BT: ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) ++ btcoexist->btc_write_1byte_bitmask( ++ btcoexist, 0x92c, 0x3, ++ 0x2); ++ else ++ btcoexist->btc_write_1byte_bitmask( ++ btcoexist, 0x92c, 0x3, ++ 0x1); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) ++ btcoexist->btc_write_1byte_bitmask( ++ btcoexist, 0x92c, 0x3, ++ 0x1); ++ else ++ btcoexist->btc_write_1byte_bitmask( ++ btcoexist, 0x92c, 0x3, ++ 0x2); ++ break; ++ } ++ } ++ } else { ++ if (init_hwcfg) { ++ /* 0x4c[23]=1, 0x4c[24]=0 Antenna control by 0x64 */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp |= BIT(23); ++ u32tmp &= ~BIT(24); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ ++ /* Fix Ext switch Main->S1, Aux->S0 */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1, ++ 0x0); ++ ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) { ++ ++ /* tell firmware "no antenna inverse" */ ++ h2c_parameter[0] = 0; ++ h2c_parameter[1] = ++ 0; /* internal switch type */ ++ btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, ++ h2c_parameter); ++ } else { ++ ++ /* tell firmware "antenna inverse" */ ++ h2c_parameter[0] = 1; ++ h2c_parameter[1] = ++ 0; /* internal switch type */ ++ btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, ++ h2c_parameter); ++ } ++ } ++ ++ if (force_exec || ++ (coex_dm->cur_ant_pos_type != ++ coex_dm->pre_ant_pos_type)) { ++ /* internal switch setting */ ++ switch (ant_pos_type) { ++ case BTC_ANT_PATH_WIFI: ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) { ++ u32tmp_1[0] = btcoexist->btc_read_4byte( ++ btcoexist, 0x948); ++ if ((u32tmp_1[0] == 0x40) || ++ (u32tmp_1[0] == 0x240)) ++ btcoexist->btc_write_4byte( ++ btcoexist, 0x948, ++ u32tmp_1[0]); ++ else ++ btcoexist->btc_write_4byte( ++ btcoexist, 0x948, 0x0); ++ } else { ++ u32tmp_1[0] = btcoexist->btc_read_4byte( ++ btcoexist, 0x948); ++ if ((u32tmp_1[0] == 0x40) || ++ (u32tmp_1[0] == 0x240)) ++ btcoexist->btc_write_4byte( ++ btcoexist, 0x948, ++ u32tmp_1[0]); ++ else ++ btcoexist->btc_write_4byte( ++ btcoexist, 0x948, ++ 0x280); ++ } ++ break; ++ case BTC_ANT_PATH_BT: ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) { ++ u32tmp_1[0] = btcoexist->btc_read_4byte( ++ btcoexist, 0x948); ++ if ((u32tmp_1[0] == 0x40) || ++ (u32tmp_1[0] == 0x240)) ++ btcoexist->btc_write_4byte( ++ btcoexist, 0x948, ++ u32tmp_1[0]); ++ else ++ btcoexist->btc_write_4byte( ++ btcoexist, 0x948, ++ 0x280); ++ } else { ++ u32tmp_1[0] = btcoexist->btc_read_4byte( ++ btcoexist, 0x948); ++ if ((u32tmp_1[0] == 0x40) || ++ (u32tmp_1[0] == 0x240)) ++ btcoexist->btc_write_4byte( ++ btcoexist, 0x948, ++ u32tmp_1[0]); ++ else ++ btcoexist->btc_write_4byte( ++ btcoexist, 0x948, 0x0); ++ } ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) ++ btcoexist->btc_write_4byte( ++ btcoexist, 0x948, ++ 0x200); ++ else ++ btcoexist->btc_write_4byte( ++ btcoexist, 0x948, 0x80); ++ break; ++ } ++ } ++ } ++ ++ coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type; ++} ++ ++void halbtc8723b1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist, ++ IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5) ++{ ++ u8 h2c_parameter[5] = {0}; ++ u8 real_byte1 = byte1, real_byte5 = byte5; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ if (ap_enable) { ++ if (byte1 & BIT(4) && !(byte1 & BIT(5))) { ++ real_byte1 &= ~BIT(4); ++ real_byte1 |= BIT(5); ++ ++ real_byte5 |= BIT(5); ++ real_byte5 &= ~BIT(6); ++ } ++ } ++ ++ h2c_parameter[0] = real_byte1; ++ h2c_parameter[1] = byte2; ++ h2c_parameter[2] = byte3; ++ h2c_parameter[3] = byte4; ++ h2c_parameter[4] = real_byte5; ++ ++ coex_dm->ps_tdma_para[0] = real_byte1; ++ coex_dm->ps_tdma_para[1] = byte2; ++ coex_dm->ps_tdma_para[2] = byte3; ++ coex_dm->ps_tdma_para[3] = byte4; ++ coex_dm->ps_tdma_para[4] = real_byte5; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); ++} ++ ++ ++void halbtc8723b1ant_ps_tdma(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean turn_on, IN u8 type) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_busy = false; ++ u8 rssi_adjust_val = 0; ++ u8 ps_tdma_byte4_val = 0x50, ps_tdma_byte0_val = 0x51, ++ ps_tdma_byte3_val = 0x10; ++ s8 wifi_duration_adjust = 0x0; ++ static boolean pre_wifi_busy = false; ++ ++ coex_dm->cur_ps_tdma_on = turn_on; ++ coex_dm->cur_ps_tdma = type; ++ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE ++ if (board_info->btdm_ant_num_by_ant_det == 2) { ++ if (turn_on) ++ type = type + ++ 100; /* for WiFi RSSI low or BT RSSI low */ ++ else ++ type = 1; /* always translate to TDMA(off,1) for TDMA-off case */ ++ } ++ ++#endif ++#endif ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (wifi_busy != pre_wifi_busy) { ++ force_exec = true; ++ pre_wifi_busy = wifi_busy; ++ } ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && ++ (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) ++ return; ++ } ++ ++ if (coex_sta->scan_ap_num <= 5) { ++ wifi_duration_adjust = 5; ++ ++ if (coex_sta->a2dp_bit_pool >= 35) ++ wifi_duration_adjust = -10; ++ else if (coex_sta->a2dp_bit_pool >= 45) ++ wifi_duration_adjust = -15; ++ } else if (coex_sta->scan_ap_num >= 40) { ++ wifi_duration_adjust = -15; ++ ++ if (coex_sta->a2dp_bit_pool < 35) ++ wifi_duration_adjust = -5; ++ else if (coex_sta->a2dp_bit_pool < 45) ++ wifi_duration_adjust = -10; ++ } else if (coex_sta->scan_ap_num >= 20) { ++ wifi_duration_adjust = -10; ++ ++ if (coex_sta->a2dp_bit_pool >= 45) ++ wifi_duration_adjust = -15; ++ } else { ++ wifi_duration_adjust = 0; ++ ++ if (coex_sta->a2dp_bit_pool >= 35) ++ wifi_duration_adjust = -10; ++ else if (coex_sta->a2dp_bit_pool >= 45) ++ wifi_duration_adjust = -15; ++ } ++ ++ if ((type == 1) || (type == 2) || (type == 9) || (type == 11) || ++ (type == 101) ++ || (type == 102) || (type == 109) || (type == 101)) { ++ if (!coex_sta->force_lps_on) { /* Native power save TDMA, only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 */ ++ ps_tdma_byte0_val = 0x61; /* no null-pkt */ ++ ps_tdma_byte3_val = 0x11; /* no tx-pause at BT-slot */ ++ ps_tdma_byte4_val = ++ 0x10; /* 0x778 = d/1 toggle, no dynamic slot */ ++ } else { ++ ps_tdma_byte0_val = 0x51; /* null-pkt */ ++ ps_tdma_byte3_val = 0x10; /* tx-pause at BT-slot */ ++ ps_tdma_byte4_val = ++ 0x50; /* 0x778 = d/1 toggle, dynamic slot */ ++ } ++ } else if ((type == 3) || (type == 13) || (type == 14) || ++ (type == 103) || (type == 113) || (type == 114)) { ++ ps_tdma_byte0_val = 0x51; /* null-pkt */ ++ ps_tdma_byte3_val = 0x10; /* tx-pause at BT-slot */ ++ ps_tdma_byte4_val = ++ 0x10; /* 0x778 = d/1 toggle, no dynamic slot */ ++#if 0 ++ if (!wifi_busy) ++ ps_tdma_byte4_val = ps_tdma_byte4_val | ++ 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */ ++#endif ++ } else { /* native power save case */ ++ ps_tdma_byte0_val = 0x61; /* no null-pkt */ ++ ps_tdma_byte3_val = 0x11; /* no tx-pause at BT-slot */ ++ ps_tdma_byte4_val = ++ 0x11; /* 0x778 = d/1 toggle, no dynamic slot */ ++ /* psTdmaByte4Va is not defne for 0x778 = d/1, 1/1 case */ ++ } ++ ++ /* if (bt_link_info->slave_role == true) */ ++ if ((bt_link_info->slave_role == true) && (bt_link_info->a2dp_exist)) ++ ps_tdma_byte4_val = ps_tdma_byte4_val | ++ 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */ ++ ++ if (type > 100) { ++ ps_tdma_byte0_val = ps_tdma_byte0_val | ++ 0x82; /* set antenna control by SW */ ++ ps_tdma_byte3_val = ps_tdma_byte3_val | ++ 0x60; /* set antenna no toggle, control by antenna diversity */ ++ } ++ ++ ++ if (turn_on) { ++ switch (type) { ++ default: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x1a, 0x1a, 0x0, ps_tdma_byte4_val); ++ break; ++ case 1: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3a + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 2: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x2d + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 3: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x30, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 4: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x15, 0x3, 0x14, 0x0); ++ break; ++ case 5: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x1f, 0x3, ++ ps_tdma_byte3_val, 0x11); ++ break; ++ case 6: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x20, 0x3, ++ ps_tdma_byte3_val, 0x11); ++ break; ++ case 7: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xc, 0x5, 0x0, 0x0); ++ break; ++ case 8: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 9: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 10: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 12: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x0a, 0x0a, 0x0, 0x50); ++ break; ++ case 13: ++ if (coex_sta->scan_ap_num <= 3) ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x40, 0x3, ++ ps_tdma_byte3_val, ++ ps_tdma_byte4_val); ++ else ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ++ ps_tdma_byte4_val); ++ break; ++ case 14: ++ if (coex_sta->scan_ap_num <= 3) ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ 0x51, 0x30, 0x3, 0x10, 0x50); ++ else ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ++ ps_tdma_byte4_val); ++ break; ++ case 15: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xa, 0x3, 0x8, 0x0); ++ break; ++ case 16: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x15, 0x3, 0x10, 0x0); ++ break; ++ case 18: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 20: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3f, 0x03, ++ ps_tdma_byte3_val, 0x10); ++ break; ++ case 21: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x25, 0x03, 0x11, 0x11); ++ break; ++ case 22: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x25, 0x03, ++ ps_tdma_byte3_val, 0x10); ++ break; ++ case 23: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x3, 0x31, 0x18); ++ break; ++ case 24: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x15, 0x3, 0x31, 0x18); ++ break; ++ case 25: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 26: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 27: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x3, 0x31, 0x98); ++ break; ++ case 28: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x69, ++ 0x25, 0x3, 0x31, 0x0); ++ break; ++ case 29: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xab, ++ 0x1a, 0x1a, 0x1, 0x10); ++ break; ++ case 30: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x30, 0x3, 0x10, 0x10); ++ break; ++ case 31: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x1a, 0x1a, 0, 0x58); ++ break; ++ case 32: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x35, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 33: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x35, 0x3, ++ ps_tdma_byte3_val, 0x10); ++ break; ++ case 34: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x53, ++ 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 35: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x63, ++ 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 36: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x12, 0x3, 0x14, 0x50); ++ break; ++ case 40: /* SoftAP only with no sta associated,BT disable ,TDMA mode for power saving */ ++ /* here softap mode screen off will cost 70-80mA for phone */ ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x23, ++ 0x18, 0x00, 0x10, 0x24); ++ break; ++ ++ /* for 1-Ant translate to 2-Ant */ ++ case 101: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3a + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 102: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x2d + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 103: ++ /* halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x51, 0x1d, 0x1d, 0x0, ps_tdma_byte4_val); */ ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3a, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 105: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x15, 0x3, ++ ps_tdma_byte3_val, 0x11); ++ break; ++ case 106: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x20, 0x3, ++ ps_tdma_byte3_val, 0x11); ++ break; ++ case 109: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 111: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 113: ++ /* halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x51, 0x12, 0x12, 0x0, ps_tdma_byte4_val); */ ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 114: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 120: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3f, 0x03, ++ ps_tdma_byte3_val, 0x10); ++ break; ++ case 122: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x25, 0x03, ++ ps_tdma_byte3_val, 0x10); ++ break; ++ case 132: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x25, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 133: ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x25, 0x03, ++ ps_tdma_byte3_val, 0x11); ++ break; ++ ++ } ++ } else { ++ ++ /* disable PS tdma */ ++ switch (type) { ++ case 8: /* PTA Control */ ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x8, ++ 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 0: ++ default: /* Software control, Antenna at BT side */ ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 1: /* 2-Ant, 0x778=3, antenna control by antenna diversity */ ++ halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x48, 0x0); ++ break; ++ } ++ } ++ rssi_adjust_val = 0; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssi_adjust_val); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", ++ btcoexist->btc_read_4byte(btcoexist, 0x948), ++ btcoexist->btc_read_1byte(btcoexist, 0x765), ++ btcoexist->btc_read_1byte(btcoexist, 0x67)); ++ BTC_TRACE(trace_buf); ++ ++ /* update pre state */ ++ coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; ++ coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; ++} ++ ++void halbtc8723b1ant_tdma_duration_adjust_for_acl(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ static s32 up, dn, m, n, wait_count; ++ s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */ ++ u8 retry_count = 0, bt_info_ext; ++ boolean wifi_busy = false; ++ ++ if (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifi_status) ++ wifi_busy = true; ++ else ++ wifi_busy = false; ++ ++ if ((BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == ++ wifi_status) || ++ (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifi_status) || ++ (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT == ++ wifi_status)) { ++ if (coex_dm->cur_ps_tdma != 1 && ++ coex_dm->cur_ps_tdma != 2 && ++ coex_dm->cur_ps_tdma != 3 && ++ coex_dm->cur_ps_tdma != 9) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } ++ return; ++ } ++ ++ if (!coex_dm->auto_tdma_adjust) { ++ coex_dm->auto_tdma_adjust = true; ++ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ /* ============ */ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } else { ++ /* accquire the BT TRx retry count from BT_Info byte2 */ ++ retry_count = coex_sta->bt_retry_cnt; ++ bt_info_ext = coex_sta->bt_info_ext; ++ ++ if ((coex_sta->low_priority_tx) > 1050 || ++ (coex_sta->low_priority_rx) > 1250) ++ retry_count++; ++ ++ result = 0; ++ wait_count++; ++ ++ if (retry_count == ++ 0) { /* no retry in the last 2-second duration */ ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */ ++ wait_count = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ } ++ } else if (retry_count <= ++ 3) { /* <=3 retry in the last 2-second duration */ ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) { /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */ ++ if (wait_count <= 2) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */ ++ if (wait_count == 1) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ ++ if (result == -1) { ++ /* if( (BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(bt_info_ext)) && ++ ((coex_dm->cur_ps_tdma == 1) ||(coex_dm->cur_ps_tdma == 2)) ) ++ { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } ++ else */ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } ++ } else if (result == 1) { ++ /* if( (BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(bt_info_ext)) && ++ ((coex_dm->cur_ps_tdma == 1) ||(coex_dm->cur_ps_tdma == 2)) ) ++ { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } ++ else */ if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = 1; ++ } ++ } else { /* no change */ ++ /* Bryant Modify ++ if(wifi_busy != pre_wifi_busy) ++ { ++ pre_wifi_busy = wifi_busy; ++ halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, true, coex_dm->cur_ps_tdma); ++ } ++ */ ++ ++ } ++ ++ if (coex_dm->cur_ps_tdma != 1 && ++ coex_dm->cur_ps_tdma != 2 && ++ coex_dm->cur_ps_tdma != 9 && ++ coex_dm->cur_ps_tdma != 11) { ++ /* recover to previous adjust type */ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ coex_dm->ps_tdma_du_adj_type); ++ } ++ } ++} ++ ++void halbtc8723b1ant_ps_tdma_check_for_power_save_state( ++ IN struct btc_coexist *btcoexist, IN boolean new_ps_state) ++{ ++ u8 lps_mode = 0x0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode); ++ ++ if (lps_mode) { /* already under LPS state */ ++ if (new_ps_state) { ++ /* keep state under LPS, do nothing. */ ++ } else { ++ /* will leave LPS state, turn off psTdma first */ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ } ++ } else { /* NO PS state */ ++ if (new_ps_state) { ++ /* will enter LPS state, turn off psTdma first */ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ } else { ++ /* keep state under NO PS state, do nothing. */ ++ } ++ } ++} ++ ++void halbtc8723b1ant_power_save_state(IN struct btc_coexist *btcoexist, ++ IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ boolean low_pwr_disable = false; ++ ++ switch (ps_type) { ++ case BTC_PS_WIFI_NATIVE: ++ /* recover to original 32k low power setting */ ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ coex_sta->force_lps_on = false; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8723b1ant_ps_tdma_check_for_power_save_state( ++ btcoexist, true); ++ halbtc8723b1ant_lps_rpwm(btcoexist, NORMAL_EXEC, ++ lps_val, rpwm_val); ++ /* when coex force to enter LPS, do not enter 32k low power. */ ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ /* power save must executed before psTdma. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, ++ NULL); ++ coex_sta->force_lps_on = true; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8723b1ant_ps_tdma_check_for_power_save_state( ++ btcoexist, false); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ coex_sta->force_lps_on = false; ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8723b1ant_action_wifi_only(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, ++ false, false); ++} ++ ++void halbtc8723b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist) ++{ ++ static u32 bt_disable_cnt = 0; ++ boolean bt_active = true, bt_disabled = false; ++ ++ /* This function check if bt is disabled */ ++ ++ if (coex_sta->high_priority_tx == 0 && ++ coex_sta->high_priority_rx == 0 && ++ coex_sta->low_priority_tx == 0 && ++ coex_sta->low_priority_rx == 0) ++ bt_active = false; ++ if (coex_sta->high_priority_tx == 0xffff && ++ coex_sta->high_priority_rx == 0xffff && ++ coex_sta->low_priority_tx == 0xffff && ++ coex_sta->low_priority_rx == 0xffff) ++ bt_active = false; ++ if (bt_active) { ++ bt_disable_cnt = 0; ++ bt_disabled = false; ++ } else { ++ bt_disable_cnt++; ++ if (bt_disable_cnt >= 2) ++ bt_disabled = true; ++ } ++ if (coex_sta->bt_disabled != bt_disabled) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is from %s to %s!!\n", ++ (coex_sta->bt_disabled ? "disabled" : "enabled"), ++ (bt_disabled ? "disabled" : "enabled")); ++ BTC_TRACE(trace_buf); ++ ++ coex_sta->bt_disabled = bt_disabled; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ if (bt_disabled) { ++ halbtc8723b1ant_action_wifi_only(btcoexist); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ } ++ } ++} ++ ++/* ********************************************* ++ * ++ * Non-Software Coex Mechanism start ++ * ++ * ********************************************* */ ++void halbtc8723b1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, ++ false, false); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8723b1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, ++ false, false); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++} ++ ++void halbtc8723b1ant_action_hs(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++} ++ ++void halbtc8723b1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false, ap_enable = false, wifi_busy = false, ++ bt_busy = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ if (coex_sta->bt_abnormal_scan) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 33); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ } else if ((!wifi_connected) && (!coex_sta->wifi_is_high_pri_task)) { ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ } else if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ /* SCO/HID/A2DP busy */ ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ if (coex_sta->c2h_bt_remote_name_req) ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 33); ++ else ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else if ((bt_link_info->pan_exist) || (wifi_busy)) { ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ if (coex_sta->c2h_bt_remote_name_req) ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 33); ++ else ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ ++ } ++} ++ ++void halbtc8723b1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ /* tdma and coex table */ ++ ++ if (bt_link_info->sco_exist) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ } else { /* HID */ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ } ++} ++ ++void halbtc8723b1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ if ((coex_sta->low_priority_rx >= 950) && (!coex_sta->under_ips)) ++ bt_link_info->slave_role = true; ++ else ++ bt_link_info->slave_role = false; ++ ++ if (bt_link_info->hid_only) { /* HID */ ++ halbtc8723b1ant_action_bt_sco_hid_only_busy(btcoexist, ++ wifi_status); ++ coex_dm->auto_tdma_adjust = false; ++ return; ++ } else if (bt_link_info->a2dp_only) { /* A2DP */ ++ if (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ halbtc8723b1ant_tdma_duration_adjust_for_acl(btcoexist, ++ wifi_status); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = true; ++ } ++ } else if (((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) || ++ (bt_link_info->hid_exist && bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { /* HID+A2DP */ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); ++ coex_dm->auto_tdma_adjust = false; ++ ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else if ((bt_link_info->pan_only) || (bt_link_info->hid_exist && ++ bt_link_info->pan_exist)) { /* PAN(OPP,FTP), HID+PAN(OPP,FTP) */ ++ ++ if (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ else ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); ++ ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ /* BT no-profile busy (0x9) */ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } ++} ++ ++void halbtc8723b1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist) ++{ ++ /* power save state */ ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, ++ false, false); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8723b1ant_action_wifi_not_connected_scan(IN struct btc_coexist ++ *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ if (bt_link_info->a2dp_exist) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else if (bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 22); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 20); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } ++ } else if ((BT_8723B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8723b1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } else { ++ /* Bryant Add */ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8723b1ant_action_wifi_not_connected_asso_auth( ++ IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4); ++ } else if (bt_link_info->pan_exist) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4); ++ } else { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 2); ++ } ++} ++ ++void halbtc8723b1ant_action_wifi_connected_scan(IN struct btc_coexist ++ *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ if (bt_link_info->a2dp_exist) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else if (bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 22); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 20); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } ++ } else if ((BT_8723B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8723b1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } else { ++ /* Bryant Add */ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8723b1ant_action_wifi_connected_specific_packet( ++ IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_busy = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ /* no specific packet process for both WiFi and BT very busy */ ++ if ((wifi_busy) && ((bt_link_info->pan_exist) || ++ (coex_sta->num_of_profile >= 2))) ++ return; ++ ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ } else if (bt_link_info->a2dp_exist) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else if (bt_link_info->pan_exist) { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8723b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist) ++{ ++ boolean wifi_busy = false; ++ boolean scan = false, link = false, roam = false; ++ boolean under_4way = false, ap_enable = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ if (under_4way) { ++ halbtc8723b1ant_action_wifi_connected_specific_packet( ++ btcoexist); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ if (scan || link || roam) { ++ if (scan) ++ halbtc8723b1ant_action_wifi_connected_scan(btcoexist); ++ else ++ halbtc8723b1ant_action_wifi_connected_specific_packet( ++ btcoexist); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ /* power save state */ ++ if (!ap_enable && ++ BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status && ++ !btcoexist->bt_link_info.hid_only) { ++ if (btcoexist->bt_link_info.a2dp_only) { /* A2DP */ ++ if (!wifi_busy) ++ halbtc8723b1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else { /* busy */ ++ if (coex_sta->scan_ap_num >= ++ BT_8723B_1ANT_WIFI_NOISY_THRESH) /* no force LPS, no PS-TDMA, use pure TDMA */ ++ halbtc8723b1ant_power_save_state( ++ btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ else ++ halbtc8723b1ant_power_save_state( ++ btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ } else if ((coex_sta->pan_exist == false) && ++ (coex_sta->a2dp_exist == false) && ++ (coex_sta->hid_exist == false)) ++ halbtc8723b1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8723b1ant_power_save_state(btcoexist, ++ BTC_PS_LPS_ON, 0x50, 0x4); ++ } else ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ /* tdma and coex table */ ++ if (!wifi_busy) { ++ if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ halbtc8723b1ant_action_wifi_connected_bt_acl_busy( ++ btcoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } else if ((BT_8723B_1ANT_BT_STATUS_SCO_BUSY == ++ coex_dm->bt_status) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8723b1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } else { ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_PTA, NORMAL_EXEC, false, false); ++ /* if ((coex_sta->high_priority_tx) + ++ (coex_sta->high_priority_rx) <= 60) */ ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 2); ++ /* else ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 7); */ ++ } ++ } else { ++ if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ halbtc8723b1ant_action_wifi_connected_bt_acl_busy( ++ btcoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } else if ((BT_8723B_1ANT_BT_STATUS_SCO_BUSY == ++ coex_dm->bt_status) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8723b1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } else { ++ /* halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ halbtc8723b1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_PTA, NORMAL_EXEC, false, false); ++ if ((coex_sta->high_priority_tx) + ++ (coex_sta->high_priority_rx) <= 60) ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 2); ++ else ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 7); */ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8723b1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_PTA, NORMAL_EXEC, false, false); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ ++ } ++ } ++} ++ ++void halbtc8723b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false, bt_hs_on = false, wifi_busy = false; ++ boolean increase_scan_dev_num = false; ++ boolean bt_ctrl_agg_buf_size = false; ++ boolean miracast_plus_bt = false; ++ u8 agg_buf_size = 5; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0, wifi_bw; ++ u8 iot_peer = BTC_IOT_PEER_UNKNOWN; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->under_ips) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is under IPS !!!\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->bt_whck_test) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is under WHCK TEST!!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b1ant_action_bt_whck_test(btcoexist); ++ return; ++ } ++ ++ if ((BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) ++ increase_scan_dev_num = true; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, ++ &increase_scan_dev_num); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ ++ if ((num_of_wifi_link >= 2) || ++ (wifi_link_status & WIFI_P2P_GO_CONNECTED)) { ++ if (bt_link_info->bt_link_exist) { ++ halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, ++ 0, 1); ++ miracast_plus_bt = true; ++ } else { ++ halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, ++ 0, 0); ++ miracast_plus_bt = false; ++ } ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ ++ if (((bt_link_info->a2dp_exist) || (wifi_busy)) && ++ (coex_sta->c2h_bt_inquiry_page)) ++ halbtc8723b1ant_action_bt_inquiry(btcoexist); ++ else ++ halbtc8723b1ant_action_wifi_multi_port(btcoexist); ++ ++ return; ++ } else { ++ miracast_plus_bt = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if ((bt_link_info->bt_link_exist) && (wifi_connected)) { ++ halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer); ++ ++ /* if(BTC_IOT_PEER_CISCO != iot_peer) */ ++ if ((BTC_IOT_PEER_CISCO != iot_peer) && ++ (BTC_IOT_PEER_BROADCOM != iot_peer)) { ++ if (bt_link_info->sco_exist) /* if (bt_link_info->bt_hi_pri_link_exist) */ ++ /* halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, true, false, 0x5); */ ++ halbtc8723b1ant_limited_rx(btcoexist, ++ NORMAL_EXEC, true, false, 0x5); ++ else ++ halbtc8723b1ant_limited_rx(btcoexist, ++ NORMAL_EXEC, false, false, 0x5); ++ /* halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x8); */ ++ } else { ++ if (bt_link_info->sco_exist) ++ halbtc8723b1ant_limited_rx(btcoexist, ++ NORMAL_EXEC, true, false, 0x5); ++ else { ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ halbtc8723b1ant_limited_rx(btcoexist, ++ NORMAL_EXEC, false, true, 0x10); ++ else ++ halbtc8723b1ant_limited_rx(btcoexist, ++ NORMAL_EXEC, false, true, 0x8); ++ } ++ } ++ ++ halbtc8723b1ant_sw_mechanism(btcoexist, true); ++ } else { ++ halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x5); ++ ++ halbtc8723b1ant_sw_mechanism(btcoexist, false); ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8723b1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8723b1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ ++ if (!wifi_connected) { ++ boolean scan = false, link = false, roam = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is non connected-idle !!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (scan || link || roam) { ++ if (scan) ++ halbtc8723b1ant_action_wifi_not_connected_scan( ++ btcoexist); ++ else ++ halbtc8723b1ant_action_wifi_not_connected_asso_auth( ++ btcoexist); ++ } else ++ halbtc8723b1ant_action_wifi_not_connected(btcoexist); ++ } else /* wifi LPS/Busy */ ++ halbtc8723b1ant_action_wifi_connected(btcoexist); ++} ++ ++void halbtc8723b1ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ /* force to reset coex mechanism */ ++ ++ /* sw all off */ ++ halbtc8723b1ant_sw_mechanism(btcoexist, false); ++ ++ /* halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); */ ++ /* halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); */ ++ ++ coex_sta->pop_event_cnt = 0; ++} ++ ++void halbtc8723b1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean back_up, IN boolean wifi_only) ++{ ++ u32 u32tmp = 0; /* , fw_ver; */ ++ u8 u8tmpa = 0, u8tmpb = 0; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 1Ant Init HW Config!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ psd_scan->ant_det_is_ant_det_available = false; ++ ++ /* 0xf0[15:12] --> Chip Cut information */ ++ coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist, ++ 0xf1) & 0xf0) >> 4; ++ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8, ++ 0x1); /* enable TBTT nterrupt */ ++ ++ /* 0x790[5:0]=0x5 */ ++ btcoexist->btc_write_1byte(btcoexist, 0x790, 0x5); ++ ++ /* Enable counter statistics */ ++ /* btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); */ /*0x76e[3] =1, WLAN_Act control by PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x778, 0x1); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1); ++ ++ ++ /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x1); */ /*BT select s0/s1 is controlled by WiFi */ ++ ++ halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); ++ ++ /* Antenna config */ ++ if (wifi_only) ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_WIFI, ++ FORCE_EXEC, true, false); ++ else ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, true, false); ++ ++ /* PTA parameter */ ++ halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765); ++ u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x67); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", ++ u32tmp, u8tmpa, u8tmpb); ++ BTC_TRACE(trace_buf); ++} ++ ++void halbtc8723b1ant_mechanism_switch(IN struct btc_coexist *btcoexist, ++ IN boolean bSwitchTo2Antenna) ++{ ++ ++ if (bSwitchTo2Antenna) { /* 1-Ant -> 2-Ant */ ++ /* un-lock TRx Mask setup for 8723b f-cut */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd, 0x80, 0x1); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf, 0x1, 0x1); ++ /* WiFi TRx Mask on */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x0); ++ ++ /* BT TRx Mask un-lock 0x2c[0], 0x30[0] = 1 */ ++ btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x2c, ++ 0x7c45); ++ btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x30, ++ 0x7c45); ++ ++ /* BT TRx Mask on */ ++ btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x1); ++ ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, false, false); ++ } else { ++ /* WiFi TRx Mask on */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x780); ++ ++ /* lock TRx Mask setup for 8723b f-cut */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd, 0x80, 0x0); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf, 0x1, 0x0); ++ ++ /* BT TRx Mask on */ ++ btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x15); ++ ++ /* BT TRx Mask ock 0x2c[0], 0x30[0] = 0 */ ++ btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x2c, ++ 0x7c44); ++ btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x30, ++ 0x7c44); ++ ++ ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ FORCE_EXEC, false, false); ++ } ++ ++} ++ ++u32 halbtc8723b1ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val) ++{ ++ u8 j; ++ u32 tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0; ++ u32 result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200, ++ 174, 151, 132, 115, 100, 86, 74, 62, 51, 42, ++ 32, 23, 15, 7, 0 ++ }; ++ ++ if (val == 0) ++ return 0; ++ ++ tmp = val; ++ ++ while (1) { ++ if (tmp == 1) ++ break; ++ else { ++ tmp = (tmp >> 1); ++ shiftcount++; ++ } ++ } ++ ++ ++ val_integerd_b = shiftcount + 1; ++ ++ tmp2 = 1; ++ for (j = 1; j <= val_integerd_b; j++) ++ tmp2 = tmp2 * 2; ++ ++ tmp = (val * 100) / tmp2; ++ tindex = tmp / 5; ++ ++ if (tindex > 20) ++ tindex = 20; ++ ++ val_fractiond_b = table_fraction[tindex]; ++ ++ result = val_integerd_b * 100 - val_fractiond_b; ++ ++ return result; ++ ++ ++} ++ ++void halbtc8723b1ant_psd_show_antenna_detect_result(IN struct btc_coexist ++ *btcoexist) ++{ ++ u8 *cli_buf = btcoexist->cli_buf; ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n============[Antenna Detection info] ============\n"); ++ CL_PRINTF(cli_buf); ++ ++ if (psd_scan->ant_det_result == 1) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (>%d)", ++ "Ant Det Result", "2-Antenna (Bad-Isolation)", ++ BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION); ++ else if (psd_scan->ant_det_result == 2) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)", ++ "Ant Det Result", "2-Antenna (Good-Isolation)", ++ BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION ++ + psd_scan->ant_det_thres_offset, ++ BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)", ++ "Ant Det Result", "1-Antenna", ++ BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT, ++ BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION ++ + psd_scan->ant_det_thres_offset); ++ ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s ", ++ "Antenna Detection Finish", ++ (board_info->btdm_ant_det_finish ++ ? "Yes" : "No")); ++ CL_PRINTF(cli_buf); ++ ++ switch (psd_scan->ant_det_result) { ++ case 0: ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "(BT is not available)"); ++ break; ++ case 1: /* 2-Ant bad-isolation */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "(BT is available)"); ++ break; ++ case 2: /* 2-Ant good-isolation */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "(BT is available)"); ++ break; ++ case 3: /* 1-Ant */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "(BT is available)"); ++ break; ++ case 4: ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "(Uncertainty result)"); ++ break; ++ case 5: ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "(Pre-Scan fai)"); ++ break; ++ case 6: ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "(WiFi is Scanning)"); ++ break; ++ case 7: ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "(BT is not idle)"); ++ break; ++ case 8: ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "(Abort by WiFi Scanning)"); ++ break; ++ case 9: ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "(Antenna Init is not ready)"); ++ break; ++ case 10: ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "(BT is Inquiry or page)"); ++ break; ++ case 11: ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "(BT is Disabled)"); ++ break; ++ } ++ CL_PRINTF(cli_buf); ++ ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", ++ "Ant Detect Total Count", psd_scan->ant_det_try_count); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", ++ "Ant Detect Fail Count", psd_scan->ant_det_fail_count); ++ CL_PRINTF(cli_buf); ++ ++ if ((!board_info->btdm_ant_det_finish) && ++ (psd_scan->ant_det_result != 5)) ++ return; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Response", ++ (psd_scan->ant_det_result ? "ok" : "fail")); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ms", "BT Tx Time", ++ psd_scan->ant_det_bt_tx_time); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "BT Tx Ch", ++ psd_scan->ant_det_bt_le_channel); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", ++ "WiFi PSD Cent-Ch/Offset/Span", ++ psd_scan->real_cent_freq, psd_scan->real_offset, ++ psd_scan->real_span); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB", ++ "PSD Pre-Scan Peak Value", ++ psd_scan->ant_det_pre_psdscan_peak_val / 100); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (<= %d)", ++ "PSD Pre-Scan result", ++ (psd_scan->ant_det_result != 5 ? "ok" : "fail"), ++ BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND ++ + psd_scan->ant_det_thres_offset); ++ CL_PRINTF(cli_buf); ++ ++ if (psd_scan->ant_det_result == 5) ++ return; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s dB", ++ "PSD Scan Peak Value", psd_scan->ant_det_peak_val); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s MHz", ++ "PSD Scan Peak Freq", psd_scan->ant_det_peak_freq); ++ CL_PRINTF(cli_buf); ++ ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "TFBGA Package", ++ (board_info->tfbga_package) ? "Yes" : "No"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", ++ "PSD Threshold Offset", psd_scan->ant_det_thres_offset); ++ CL_PRINTF(cli_buf); ++ ++} ++ ++void halbtc8723b1ant_psd_showdata(IN struct btc_coexist *btcoexist) ++{ ++ u8 *cli_buf = btcoexist->cli_buf; ++ u32 delta_freq_per_point; ++ u32 freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n\n============[PSD info] (%d)============\n", ++ psd_scan->psd_gen_count); ++ CL_PRINTF(cli_buf); ++ ++ if (psd_scan->psd_gen_count == 0) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n"); ++ CL_PRINTF(cli_buf); ++ return; ++ } ++ ++ if (psd_scan->psd_point == 0) ++ delta_freq_per_point = 0; ++ else ++ delta_freq_per_point = psd_scan->psd_band_width / ++ psd_scan->psd_point; ++ ++ /* if (psd_scan->is_psd_show_max_only) */ ++ if (0) { ++ psd_rep1 = psd_scan->psd_max_value / 100; ++ psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100; ++ ++ freq = ((psd_scan->real_cent_freq - 20) * 1000000 + ++ psd_scan->psd_max_value_point * delta_freq_per_point); ++ freq1 = freq / 1000000; ++ freq2 = freq / 1000 - freq1 * 1000; ++ ++ if (freq2 < 100) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n Freq = %d.0%d MHz", ++ freq1, freq2); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n Freq = %d.%d MHz", ++ freq1, freq2); ++ ++ if (psd_rep2 < 10) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ ", Value = %d.0%d dB, (%d)\n", ++ psd_rep1, psd_rep2, psd_scan->psd_max_value); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ ", Value = %d.%d dB, (%d)\n", ++ psd_rep1, psd_rep2, psd_scan->psd_max_value); ++ ++ CL_PRINTF(cli_buf); ++ } else { ++ m = psd_scan->psd_start_point; ++ n = psd_scan->psd_start_point; ++ i = 1; ++ j = 1; ++ ++ while (1) { ++ do { ++ freq = ((psd_scan->real_cent_freq - 20) * ++ 1000000 + m * ++ delta_freq_per_point); ++ freq1 = freq / 1000000; ++ freq2 = freq / 1000 - freq1 * 1000; ++ ++ if (i == 1) { ++ if (freq2 == 0) ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "\r\n Freq%6d.000", ++ freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "\r\n Freq%6d.0%2d", ++ freq1, ++ freq2); ++ else ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "\r\n Freq%6d.%3d", ++ freq1, ++ freq2); ++ } else if ((i % 8 == 0) || ++ (m == psd_scan->psd_stop_point)) { ++ if (freq2 == 0) ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "%6d.000\n", freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "%6d.0%2d\n", freq1, ++ freq2); ++ else ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "%6d.%3d\n", freq1, ++ freq2); ++ } else { ++ if (freq2 == 0) ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "%6d.000", freq1); ++ else if (freq2 < 100) ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "%6d.0%2d", freq1, ++ freq2); ++ else ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "%6d.%3d", freq1, ++ freq2); ++ } ++ ++ i++; ++ m++; ++ CL_PRINTF(cli_buf); ++ ++ } while ((i <= 8) && (m <= psd_scan->psd_stop_point)); ++ ++ ++ do { ++ psd_rep1 = psd_scan->psd_report_max_hold[n] / ++ 100; ++ psd_rep2 = psd_scan->psd_report_max_hold[n] - ++ psd_rep1 * ++ 100; ++ ++ if (j == 1) { ++ if (psd_rep2 < 10) ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "\r\n Val %7d.0%d", ++ psd_rep1, ++ psd_rep2); ++ else ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "\r\n Val %7d.%d", ++ psd_rep1, ++ psd_rep2); ++ } else if ((j % 8 == 0) || ++ (n == psd_scan->psd_stop_point)) { ++ if (psd_rep2 < 10) ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "%7d.0%d\n", psd_rep1, ++ psd_rep2); ++ else ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "%7d.%d\n", psd_rep1, ++ psd_rep2); ++ } else { ++ if (psd_rep2 < 10) ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "%7d.0%d", psd_rep1, ++ psd_rep2); ++ else ++ CL_SPRINTF(cli_buf, ++ BT_TMP_BUF_SIZE, ++ "%7d.%d", psd_rep1, ++ psd_rep2); ++ } ++ ++ j++; ++ n++; ++ CL_PRINTF(cli_buf); ++ ++ } while ((j <= 8) && (n <= psd_scan->psd_stop_point)); ++ ++ if ((m > psd_scan->psd_stop_point) || ++ (n > psd_scan->psd_stop_point)) ++ break; ++ else { ++ i = 1; ++ j = 1; ++ } ++ ++ } ++ } ++ ++ ++} ++ ++void halbtc8723b1ant_psd_max_holddata(IN struct btc_coexist *btcoexist, ++ IN u32 gen_count) ++{ ++ u32 i = 0, i_max = 0, val_max = 0; ++ ++ if (gen_count == 1) { ++ memcpy(psd_scan->psd_report_max_hold, ++ psd_scan->psd_report, ++ BT_8723B_1ANT_ANTDET_PSD_POINTS * sizeof(u32)); ++ ++ psd_scan->psd_max_value_point = 0; ++ psd_scan->psd_max_value = 0; ++ ++ } else { ++ for (i = psd_scan->psd_start_point; ++ i <= psd_scan->psd_stop_point; i++) { ++ if (psd_scan->psd_report[i] > ++ psd_scan->psd_report_max_hold[i]) ++ psd_scan->psd_report_max_hold[i] = ++ psd_scan->psd_report[i]; ++ ++ /* search Max Value */ ++ if (i == psd_scan->psd_start_point) { ++ i_max = i; ++ val_max = psd_scan->psd_report_max_hold[i]; ++ } else { ++ if (psd_scan->psd_report_max_hold[i] > ++ val_max) { ++ i_max = i; ++ val_max = psd_scan->psd_report_max_hold[i]; ++ } ++ } ++ ++ } ++ ++ psd_scan->psd_max_value_point = i_max; ++ psd_scan->psd_max_value = val_max; ++ ++ } ++ ++ ++} ++ ++u32 halbtc8723b1ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point) ++{ ++ /* reg 0x808[9:0]: FFT data x */ ++ /* reg 0x808[22]: 0-->1 to get 1 FFT data y */ ++ /* reg 0x8b4[15:0]: FFT data y report */ ++ ++ u32 val = 0, psd_report = 0; ++ int k = 0; ++ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x808); ++ ++ val &= 0xffbffc00; ++ val |= point; ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x808, val); ++ ++ val |= 0x00400000; ++ btcoexist->btc_write_4byte(btcoexist, 0x808, val); ++ ++ while (1) { ++ if (k++ > BT_8723B_1ANT_ANTDET_SWEEPPOINT_DELAY) ++ break; ++ } ++ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x8b4); ++ ++ psd_report = val & 0x0000ffff; ++ ++ return psd_report; ++} ++ ++ ++boolean halbtc8723b1ant_psd_sweep_point(IN struct btc_coexist *btcoexist, ++ IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points, ++ IN u32 avgnum, IN u32 loopcnt) ++{ ++ u32 i, val, n, k = 0, j, point_index = 0; ++ u32 points1 = 0, psd_report = 0; ++ u32 start_p = 0, stop_p = 0, delta_freq_per_point = 156250; ++ u32 psd_center_freq = 20 * 10 ^ 6; ++ boolean outloop = false, scan , roam, is_sweep_ok = true; ++ u8 flag = 0; ++ u32 tmp; ++ u32 wifi_original_channel = 1; ++ ++ psd_scan->is_psd_running = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx PSD Sweep Start!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ do { ++ switch (flag) { ++ case 0: /* Get PSD parameters */ ++ default: ++ ++ psd_scan->psd_band_width = 40 * 1000000; ++ psd_scan->psd_point = points; ++ psd_scan->psd_start_base = points / 2; ++ psd_scan->psd_avg_num = avgnum; ++ psd_scan->real_cent_freq = cent_freq; ++ psd_scan->real_offset = offset; ++ psd_scan->real_span = span; ++ ++ ++ points1 = psd_scan->psd_point; ++ delta_freq_per_point = psd_scan->psd_band_width / ++ psd_scan->psd_point; ++ ++ /* PSD point setup */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x808); ++ val &= 0xffff0fff; ++ ++ switch (psd_scan->psd_point) { ++ case 128: ++ val |= 0x0; ++ break; ++ case 256: ++ default: ++ val |= 0x00004000; ++ break; ++ case 512: ++ val |= 0x00008000; ++ break; ++ case 1024: ++ val |= 0x0000c000; ++ break; ++ } ++ ++ switch (psd_scan->psd_avg_num) { ++ case 1: ++ val |= 0x0; ++ break; ++ case 8: ++ val |= 0x00001000; ++ break; ++ case 16: ++ val |= 0x00002000; ++ break; ++ case 32: ++ default: ++ val |= 0x00003000; ++ break; ++ } ++ btcoexist->btc_write_4byte(btcoexist, 0x808, val); ++ ++ flag = 1; ++ break; ++ case 1: /* calculate the PSD point index from freq/offset/span */ ++ psd_center_freq = psd_scan->psd_band_width / 2 + ++ offset * (1000000); ++ ++ start_p = psd_scan->psd_start_base + (psd_center_freq - ++ span * (1000000) / 2) / delta_freq_per_point; ++ psd_scan->psd_start_point = start_p - ++ psd_scan->psd_start_base; ++ ++ stop_p = psd_scan->psd_start_base + (psd_center_freq + ++ span * (1000000) / 2) / delta_freq_per_point; ++ psd_scan->psd_stop_point = stop_p - ++ psd_scan->psd_start_base - 1; ++ ++ flag = 2; ++ break; ++ case 2: /* set RF channel/BW/Mode */ ++ ++ /* set 3-wire off */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x88c); ++ val |= 0x00300000; ++ btcoexist->btc_write_4byte(btcoexist, 0x88c, val); ++ ++ /* CCK off */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x800); ++ val &= 0xfeffffff; ++ btcoexist->btc_write_4byte(btcoexist, 0x800, val); ++ ++ /* store WiFi original channel */ ++ wifi_original_channel = btcoexist->btc_get_rf_reg( ++ btcoexist, BTC_RF_A, 0x18, 0x3ff); ++ ++ /* Set RF channel */ ++ if (cent_freq == 2484) ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, ++ 0x18, 0x3ff, 0xe); ++ else ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, ++ 0x18, 0x3ff, (cent_freq - 2412) / 5 + ++ 1); /* WiFi TRx Mask on */ ++ ++ ++ /* Set RF Rx filter corner */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, ++ 0xfffff, 0x3e4); ++ ++ /* Set TRx mask off */ ++ /* un-lock TRx Mask setup */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd, ++ 0x80, 0x1); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf, ++ 0x1, 0x1); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x0); ++ ++ /* Set RF mode = Rx, RF Gain = 0x8a0 */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0, ++ 0xfffff, 0x308a0); ++ ++ while (1) { ++ if (k++ > BT_8723B_1ANT_ANTDET_SWEEPPOINT_DELAY) ++ break; ++ } ++ flag = 3; ++ break; ++ case 3: ++ psd_scan->psd_gen_count = 0; ++ for (j = 1; j <= loopcnt; j++) { ++ ++ btcoexist->btc_get(btcoexist, ++ BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, ++ BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (scan || roam) { ++ is_sweep_ok = false; ++ break; ++ } ++ memset(psd_scan->psd_report, 0, ++ psd_scan->psd_point * sizeof(u32)); ++ start_p = psd_scan->psd_start_point + ++ psd_scan->psd_start_base; ++ stop_p = psd_scan->psd_stop_point + ++ psd_scan->psd_start_base + 1; ++ ++ i = start_p; ++ point_index = 0; ++ ++ while (i < stop_p) { ++ if (i >= points1) ++ psd_report = ++ halbtc8723b1ant_psd_getdata( ++ btcoexist, i - points1); ++ else ++ psd_report = ++ halbtc8723b1ant_psd_getdata( ++ btcoexist, i); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "Point=%d, psd_raw_data = 0x%08x\n", ++ i, psd_report); ++ BTC_TRACE(trace_buf); ++ if (psd_report == 0) ++ tmp = 0; ++ else ++ /* tmp = 20*log10((double)psd_report); */ ++ /* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */ ++ tmp = 6 * halbtc8723b1ant_psd_log2base( ++ btcoexist, psd_report); ++ ++ n = i - psd_scan->psd_start_base; ++ psd_scan->psd_report[n] = tmp; ++ ++ ++ halbtc8723b1ant_psd_max_holddata( ++ btcoexist, j); ++ ++ i++; ++ ++ } ++ ++ psd_scan->psd_gen_count = j; ++ } ++ ++ flag = 100; ++ break; ++ case 99: /* error */ ++ ++ outloop = true; ++ break; ++ case 100: /* recovery */ ++ ++ /* set 3-wire on */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x88c); ++ val &= 0xffcfffff; ++ btcoexist->btc_write_4byte(btcoexist, 0x88c, val); ++ ++ /* CCK on */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x800); ++ val |= 0x01000000; ++ btcoexist->btc_write_4byte(btcoexist, 0x800, val); ++ ++ /* PSD off */ ++ val = btcoexist->btc_read_4byte(btcoexist, 0x808); ++ val &= 0xffbfffff; ++ btcoexist->btc_write_4byte(btcoexist, 0x808, val); ++ ++ /* TRx Mask on */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x780); ++ ++ /* lock TRx Mask setup */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd, ++ 0x80, 0x0); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf, ++ 0x1, 0x0); ++ ++ /* Set RF Rx filter corner */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, ++ 0xfffff, 0x0); ++ ++ /* restore WiFi original channel */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18, ++ 0x3ff, wifi_original_channel); ++ ++ outloop = true; ++ break; ++ ++ } ++ ++ } while (!outloop); ++ ++ ++ ++ psd_scan->is_psd_running = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx PSD Sweep Stop!!\n"); ++ BTC_TRACE(trace_buf); ++ return is_sweep_ok; ++ ++} ++ ++void halbtc8723b1ant_psd_antenna_detection(IN struct btc_coexist *btcoexist, ++ IN u32 bt_tx_time, IN u32 bt_le_channel) ++{ ++ u32 i = 0; ++ u32 wlpsd_cent_freq = 2484, wlpsd_span = 2, wlpsd_sweep_count = 50; ++ s32 wlpsd_offset = -4; ++ u8 bt_le_ch[13] = {3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 33}; ++ ++ u8 h2c_parameter[3] = {0}, u8tmpa, u8tmpb; ++ ++ u8 state = 0; ++ boolean outloop = false, bt_resp = false; ++ u32 freq, freq1, freq2, psd_rep1, psd_rep2, delta_freq_per_point, ++ u32tmp; ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ ++ board_info->btdm_ant_det_finish = false; ++ memset(psd_scan->ant_det_peak_val, 0, 16 * sizeof(u8)); ++ memset(psd_scan->ant_det_peak_freq, 0, 16 * sizeof(u8)); ++ ++ if (board_info->tfbga_package) /* for TFBGA */ ++ psd_scan->ant_det_thres_offset = 5; ++ else ++ psd_scan->ant_det_thres_offset = 0; ++ ++ do { ++ switch (state) { ++ case 0: ++ if (bt_le_channel == 39) ++ wlpsd_cent_freq = 2484; ++ else { ++ for (i = 1; i <= 13; i++) { ++ if (bt_le_ch[i - 1] == ++ bt_le_channel) { ++ wlpsd_cent_freq = 2412 ++ + (i - 1) * 5; ++ break; ++ } ++ } ++ ++ if (i == 14) { ++ ++ BTC_SPRINTF(trace_buf, ++ BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Abort!!, Invalid LE channel = %d\n ", ++ bt_le_channel); ++ BTC_TRACE(trace_buf); ++ outloop = true; ++ break; ++ } ++ } ++ ++ wlpsd_sweep_count = bt_tx_time * 238 / ++ 100; /* bt_tx_time/0.42 */ ++ wlpsd_sweep_count = wlpsd_sweep_count / 5; ++ ++ if (wlpsd_sweep_count % 5 != 0) ++ wlpsd_sweep_count = (wlpsd_sweep_count / ++ 5 + 1) * 5; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), BT_LETxTime=%d, BT_LECh = %d\n", ++ bt_tx_time, bt_le_channel); ++ BTC_TRACE(trace_buf); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), wlpsd_cent_freq=%d, wlpsd_offset = %d, wlpsd_span = %d, wlpsd_sweep_count = %d\n", ++ wlpsd_cent_freq, ++ wlpsd_offset, ++ wlpsd_span, ++ wlpsd_sweep_count); ++ BTC_TRACE(trace_buf); ++ ++ state = 1; ++ break; ++ case 1: /* stop coex DM & set antenna path */ ++ /* Stop Coex DM */ ++ btcoexist->stop_coex_dm = true; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* set native power save */ ++ halbtc8723b1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ ++ /* Set TDMA off, */ ++ halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, ++ false, 0); ++ ++ /* Set coex table */ ++ halbtc8723b1ant_coex_table_with_type(btcoexist, ++ FORCE_EXEC, 0); ++ ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Main Port\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Aux Port\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ /* Set Antenna path, switch WiFi to un-certain antenna port */ ++ halbtc8723b1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_BT, FORCE_EXEC, false, ++ false); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to BT!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* Set AFH mask on at WiFi channel 2472MHz +/- 10MHz */ ++ h2c_parameter[0] = 0x1; ++ h2c_parameter[1] = 0xd; ++ h2c_parameter[2] = 0x14; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n", ++ h2c_parameter[1], ++ h2c_parameter[2]); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, ++ h2c_parameter); ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, ++ 0x948); ++ u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765); ++ u8tmpb = btcoexist->btc_read_1byte(btcoexist, ++ 0x778); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x778=0x%x\n", ++ u32tmp, u8tmpa, u8tmpb); ++ BTC_TRACE(trace_buf); ++ ++ state = 2; ++ break; ++ case 2: /* Pre-sweep background psd */ ++ if (!halbtc8723b1ant_psd_sweep_point(btcoexist, ++ wlpsd_cent_freq, wlpsd_offset, wlpsd_span, ++ BT_8723B_1ANT_ANTDET_PSD_POINTS, ++ BT_8723B_1ANT_ANTDET_PSD_AVGNUM, 3)) { ++ board_info->btdm_ant_det_finish = false; ++ board_info->btdm_ant_num_by_ant_det = 1; ++ psd_scan->ant_det_result = 8; ++ state = 99; ++ break; ++ } ++ ++ psd_scan->ant_det_pre_psdscan_peak_val = ++ psd_scan->psd_max_value; ++ ++ if (psd_scan->psd_max_value > ++ (BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND ++ + psd_scan->ant_det_thres_offset) * 100) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Abort Antenna Detection!! becaus background = %d > thres (%d)\n", ++ psd_scan->psd_max_value / 100, ++ BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND ++ + psd_scan->ant_det_thres_offset); ++ BTC_TRACE(trace_buf); ++ board_info->btdm_ant_det_finish = false; ++ board_info->btdm_ant_num_by_ant_det = 1; ++ psd_scan->ant_det_result = 5; ++ state = 99; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Start Antenna Detection!! becaus background = %d <= thres (%d)\n", ++ psd_scan->psd_max_value / 100, ++ BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND ++ + psd_scan->ant_det_thres_offset); ++ BTC_TRACE(trace_buf); ++ state = 3; ++ } ++ break; ++ case 3: ++ bt_resp = btcoexist->btc_set_bt_ant_detection( ++ btcoexist, (u8)(bt_tx_time & 0xff), ++ (u8)(bt_le_channel & 0xff)); ++ ++ if (!halbtc8723b1ant_psd_sweep_point(btcoexist, ++ wlpsd_cent_freq, wlpsd_offset, ++ wlpsd_span, ++ BT_8723B_1ANT_ANTDET_PSD_POINTS, ++ BT_8723B_1ANT_ANTDET_PSD_AVGNUM, ++ wlpsd_sweep_count)) { ++ board_info->btdm_ant_det_finish ++ = false; ++ board_info->btdm_ant_num_by_ant_det ++ = 1; ++ psd_scan->ant_det_result = 8; ++ state = 99; ++ break; ++ } ++ ++ psd_scan->ant_det_psd_scan_peak_val = ++ psd_scan->psd_max_value; ++ psd_scan->ant_det_psd_scan_peak_freq = ++ psd_scan->psd_max_value_point; ++ state = 4; ++ break; ++ case 4: ++ ++ if (psd_scan->psd_point == 0) ++ delta_freq_per_point = 0; ++ else ++ delta_freq_per_point = ++ psd_scan->psd_band_width / ++ psd_scan->psd_point; ++ ++ psd_rep1 = psd_scan->psd_max_value / 100; ++ psd_rep2 = psd_scan->psd_max_value - psd_rep1 * ++ 100; ++ ++ freq = ((psd_scan->real_cent_freq - 20) * ++ 1000000 + psd_scan->psd_max_value_point ++ * delta_freq_per_point); ++ freq1 = freq / 1000000; ++ freq2 = freq / 1000 - freq1 * 1000; ++ ++ if (freq2 < 100) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.0%d MHz", ++ freq1, freq2); ++ BTC_TRACE(trace_buf); ++ CL_SPRINTF(psd_scan->ant_det_peak_freq, ++ BT_8723B_1ANT_ANTDET_BUF_LEN, ++ "%d.0%d", freq1, freq2); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.%d MHz", ++ freq1, freq2); ++ BTC_TRACE(trace_buf); ++ CL_SPRINTF(psd_scan->ant_det_peak_freq, ++ BT_8723B_1ANT_ANTDET_BUF_LEN, ++ "%d.%d", freq1, freq2); ++ } ++ ++ if (psd_rep2 < 10) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ ", Value = %d.0%d dB\n", ++ psd_rep1, psd_rep2); ++ BTC_TRACE(trace_buf); ++ CL_SPRINTF(psd_scan->ant_det_peak_val, ++ BT_8723B_1ANT_ANTDET_BUF_LEN, ++ "%d.0%d", psd_rep1, psd_rep2); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ ", Value = %d.%d dB\n", ++ psd_rep1, psd_rep2); ++ BTC_TRACE(trace_buf); ++ CL_SPRINTF(psd_scan->ant_det_peak_val, ++ BT_8723B_1ANT_ANTDET_BUF_LEN, ++ "%d.%d", psd_rep1, psd_rep2); ++ } ++ ++ psd_scan->ant_det_is_btreply_available = true; ++ ++ if (bt_resp == false) { ++ psd_scan->ant_det_is_btreply_available = ++ false; ++ psd_scan->ant_det_result = 0; ++ board_info->btdm_ant_det_finish = false; ++ board_info->btdm_ant_num_by_ant_det = 1; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), BT Response = Fail\n "); ++ BTC_TRACE(trace_buf); ++ } else if (psd_scan->psd_max_value > ++ (BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION) ++ * 100) { ++ psd_scan->ant_det_result = 1; ++ board_info->btdm_ant_det_finish = true; ++ board_info->btdm_ant_det_already_init_phydm = ++ true; ++ board_info->btdm_ant_num_by_ant_det = 2; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Bad-Isolation!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (psd_scan->psd_max_value > ++ (BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION ++ + psd_scan->ant_det_thres_offset) * 100) { ++ psd_scan->ant_det_result = 2; ++ board_info->btdm_ant_det_finish = true; ++ board_info->btdm_ant_det_already_init_phydm = ++ true; ++ board_info->btdm_ant_num_by_ant_det = 2; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Good-Isolation!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (psd_scan->psd_max_value > ++ (BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT) * ++ 100) { ++ psd_scan->ant_det_result = 3; ++ board_info->btdm_ant_det_finish = true; ++ board_info->btdm_ant_det_already_init_phydm = ++ true; ++ board_info->btdm_ant_num_by_ant_det = 1; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ psd_scan->ant_det_result = 4; ++ board_info->btdm_ant_det_finish = false; ++ board_info->btdm_ant_num_by_ant_det = 1; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant, un-certainity!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ state = 99; ++ break; ++ case 99: /* restore setup */ ++ ++ /* Set AFH mask off at WiFi channel 2472MHz +/- 10MHz */ ++ h2c_parameter[0] = 0x0; ++ h2c_parameter[1] = 0x0; ++ h2c_parameter[2] = 0x0; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n", ++ h2c_parameter[1], h2c_parameter[2]); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, ++ h2c_parameter); ++ ++ /* Set Antenna Path */ ++ halbtc8723b1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_PTA, FORCE_EXEC, false, ++ false); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to PTA\n!!"); ++ BTC_TRACE(trace_buf); ++ ++ /* Resume Coex DM */ ++ btcoexist->stop_coex_dm = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!"); ++ BTC_TRACE(trace_buf); ++ ++ /* stimulate coex running */ ++ halbtc8723b1ant_run_coexist_mechanism( ++ btcoexist); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!"); ++ BTC_TRACE(trace_buf); ++ ++ outloop = true; ++ break; ++ } ++ ++ } while (!outloop); ++ ++ ++ ++} ++ ++void halbtc8723b1ant_psd_antenna_detection_check(IN struct btc_coexist ++ *btcoexist) ++{ ++ static u32 ant_det_count = 0, ant_det_fail_count = 0; ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ ++ boolean scan, roam; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ ++ /* psd_scan->ant_det_bt_tx_time = 20; */ ++ psd_scan->ant_det_bt_tx_time = ++ BT_8723B_1ANT_ANTDET_BTTXTIME; /* 0.42ms*50 = 20ms (0.42ms = 1 PSD sweep) */ ++ psd_scan->ant_det_bt_le_channel = BT_8723B_1ANT_ANTDET_BTTXCHANNEL; ++ ++ ant_det_count++; ++ ++ psd_scan->ant_det_try_count = ant_det_count; ++ ++ if (scan || roam) { ++ board_info->btdm_ant_det_finish = false; ++ psd_scan->ant_det_result = 6; ++ } else if (coex_sta->bt_disabled) { ++ board_info->btdm_ant_det_finish = false; ++ psd_scan->ant_det_result = 11; ++ } else if (coex_sta->num_of_profile >= 1) { ++ board_info->btdm_ant_det_finish = false; ++ psd_scan->ant_det_result = 7; ++ } else if ( ++ !psd_scan->ant_det_is_ant_det_available) { /* Antenna initial setup is not ready */ ++ board_info->btdm_ant_det_finish = false; ++ psd_scan->ant_det_result = 9; ++ } else if (coex_sta->c2h_bt_inquiry_page) { ++ board_info->btdm_ant_det_finish = false; ++ psd_scan->ant_det_result = 10; ++ } else ++ halbtc8723b1ant_psd_antenna_detection(btcoexist, ++ psd_scan->ant_det_bt_tx_time, ++ psd_scan->ant_det_bt_le_channel); ++ ++ if (!board_info->btdm_ant_det_finish) ++ ant_det_fail_count++; ++ ++ psd_scan->ant_det_fail_count = ant_det_fail_count; ++ ++} ++ ++ ++/* ************************************************************ ++ * work around function start with wa_halbtc8723b1ant_ ++ * ************************************************************ ++ * ************************************************************ ++ * extern function start with ex_halbtc8723b1ant_ ++ * ************************************************************ */ ++void ex_halbtc8723b1ant_power_on_setting(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ u8 u8tmp = 0x0; ++ u16 u16tmp = 0x0; ++ u32 value; ++ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx Execute 8723b 1-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "Ant Det Finish = %s, Ant Det Number = %d\n", ++ (board_info->btdm_ant_det_finish ? "Yes" : "No"), ++ board_info->btdm_ant_num_by_ant_det); ++ BTC_TRACE(trace_buf); ++ ++ ++ btcoexist->stop_coex_dm = true; ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x67, 0x20); ++ ++ /* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */ ++ u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2); ++ btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1)); ++ ++ /* set GRAN_BT = 1 */ ++ btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18); ++ /* set WLAN_ACT = 0 */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); ++ ++ /* */ ++ /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */ ++ /* Local setting bit define */ ++ /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */ ++ /* BIT1: "0" for internal switch; "1" for external switch */ ++ /* BIT2: "0" for one antenna; "1" for two antenna */ ++ /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */ ++ if (btcoexist->chip_interface == BTC_INTF_USB) { ++ /* fixed at S0 for USB interface */ ++ btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0); ++ ++ u8tmp |= 0x1; /* antenna inverse */ ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp); ++ ++ board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT; ++ } else { ++ /* for PCIE and SDIO interface, we check efuse 0xc3[6] */ ++ if (board_info->single_ant_path == 0) { ++ /* set to S1 */ ++ btcoexist->btc_write_4byte(btcoexist, 0x948, 0x280); ++ board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; ++ value = 1; ++ } else if (board_info->single_ant_path == 1) { ++ /* set to S0 */ ++ btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0); ++ u8tmp |= 0x1; /* antenna inverse */ ++ board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT; ++ value = 0; ++ } ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_ANTPOSREGRISTRY_CTRL, ++ &value); ++ ++ if (btcoexist->chip_interface == BTC_INTF_PCI) ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0x384, ++ u8tmp); ++ else if (btcoexist->chip_interface == BTC_INTF_SDIO) ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60, ++ u8tmp); ++ } ++} ++ ++void ex_halbtc8723b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist) ++{ ++} ++ ++void ex_halbtc8723b1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only) ++{ ++ halbtc8723b1ant_init_hw_config(btcoexist, true, wifi_only); ++ btcoexist->stop_coex_dm = false; ++} ++ ++void ex_halbtc8723b1ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Coex Mechanism Init!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->stop_coex_dm = false; ++ ++ halbtc8723b1ant_init_coex_dm(btcoexist); ++ ++ halbtc8723b1ant_query_bt_info(btcoexist); ++} ++ ++void ex_halbtc8723b1ant_display_coex_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ u8 *cli_buf = btcoexist->cli_buf; ++ u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; ++ u16 u16tmp[4]; ++ u32 u32tmp[4]; ++ u32 fa_ofdm, fa_cck; ++ u32 fw_ver = 0, bt_patch_ver = 0; ++ static u8 pop_report_in_10s = 0; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cli_buf); ++ ++ if (btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ if (btcoexist->stop_coex_dm) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Coex is STOPPED]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ ++ if (psd_scan->ant_det_try_count == 0) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", ++ "Ant PG Num/ Mech/ Pos", ++ board_info->pg_ant_num, board_info->btdm_ant_num, ++ board_info->btdm_ant_pos); ++ CL_PRINTF(cli_buf); ++ } else { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d/ %d/ %d (%d/%d/%d)", ++ "Ant PG Num/ Mech(Ant_Det)/ Pos", ++ board_info->pg_ant_num, ++ board_info->btdm_ant_num_by_ant_det, ++ board_info->btdm_ant_pos, ++ psd_scan->ant_det_try_count, ++ psd_scan->ant_det_fail_count, ++ psd_scan->ant_det_result); ++ CL_PRINTF(cli_buf); ++ ++ if (board_info->btdm_ant_det_finish) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "Ant Det PSD Value", ++ psd_scan->ant_det_peak_val); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)/ %c", ++ "Version Coex/ Fw/ Patch/ Cut", ++ glcoex_ver_date_8723b_1ant, glcoex_ver_8723b_1ant, fw_ver, ++ bt_patch_ver, bt_patch_ver, coex_sta->cut_version + 65); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", ++ "Wifi channel informed to BT", ++ coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1], ++ coex_dm->wifi_chnl_info[2]); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s", ++ "WifibHiPri/ Ccklock/ CckEverLock", ++ (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"), ++ (coex_sta->cck_lock ? "Yes" : "No"), ++ (coex_sta->cck_ever_lock ? "Yes" : "No")); ++ CL_PRINTF(cli_buf); ++ ++ /* wifi status */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Wifi Status]============"); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[BT Status]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Abnormal scan", ++ (coex_sta->bt_abnormal_scan) ? "Yes" : "No"); ++ CL_PRINTF(cli_buf); ++ ++ pop_report_in_10s++; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ", ++ "BT [status/ rssi/ retryCnt/ popCnt]", ++ ((coex_sta->bt_disabled) ? ("disabled") : (( ++ coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") ++ : ((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) ? "non-connected idle" : ++ ((BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status) ++ ? "connected-idle" : "busy")))), ++ coex_sta->bt_rssi, coex_sta->bt_retry_cnt, ++ coex_sta->pop_event_cnt); ++ CL_PRINTF(cli_buf); ++ ++ if (pop_report_in_10s >= 5) { ++ coex_sta->pop_event_cnt = 0; ++ pop_report_in_10s = 0; ++ } ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d / %d / %d / %d / %d / %d", ++ "SCO/HID/PAN/A2DP/NameReq/WHQL", ++ bt_link_info->sco_exist, bt_link_info->hid_exist, ++ bt_link_info->pan_exist, bt_link_info->a2dp_exist, ++ coex_sta->c2h_bt_remote_name_req, ++ coex_sta->bt_whck_test); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Role", ++ (bt_link_info->slave_role) ? "Slave" : "Master"); ++ CL_PRINTF(cli_buf); ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d", ++ "A2DP Rate/Bitpool", ++ (bt_info_ext & BIT(0)) ? "BR" : "EDR", coex_sta->a2dp_bit_pool); ++ CL_PRINTF(cli_buf); ++ ++ for (i = 0; i < BT_INFO_SRC_8723B_1ANT_MAX; i++) { ++ if (coex_sta->bt_info_c2h_cnt[i]) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", ++ glbt_info_src_8723b_1ant[i], ++ coex_sta->bt_info_c2h[i][0], ++ coex_sta->bt_info_c2h[i][1], ++ coex_sta->bt_info_c2h[i][2], ++ coex_sta->bt_info_c2h[i][3], ++ coex_sta->bt_info_c2h[i][4], ++ coex_sta->bt_info_c2h[i][5], ++ coex_sta->bt_info_c2h[i][6], ++ coex_sta->bt_info_c2h_cnt[i]); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ ++ if (btcoexist->manual_control) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[mechanisms] (before Manual)============"); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[mechanisms]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", ++ "SM[LowPenaltyRA]", ++ coex_dm->cur_low_penalty_ra); ++ CL_PRINTF(cli_buf); ++ ++ ps_tdma_case = coex_dm->cur_ps_tdma; ++ if (board_info->btdm_ant_num_by_ant_det == 2) { ++ if (coex_dm->cur_ps_tdma_on) ++ ps_tdma_case = ps_tdma_case + ++ 100; /* for WiFi RSSI low or BT RSSI low */ ++ else ++ ps_tdma_case = ++ 1; /* always translate to TDMA(off,1) for TDMA-off case */ ++ } ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", ++ "PS TDMA", ++ coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1], ++ coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3], ++ coex_dm->ps_tdma_para[4], ps_tdma_case, ++ (coex_dm->cur_ps_tdma_on ? "On" : "Off"), ++ (coex_dm->auto_tdma_adjust ? "Adj" : "Fix")); ++ ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", ++ "Coex Table Type", ++ coex_sta->coex_table_type); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", ++ "IgnWlanAct", ++ coex_dm->cur_ignore_wlan_act); ++ CL_PRINTF(cli_buf); ++ ++ /* ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", ++ coex_dm->error_condition); ++ CL_PRINTF(cli_buf); ++ */ ++ ++ /* Hw setting */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Hw setting]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", ++ "backup ARFR1/ARFR2/RL/AMaxTime", ++ coex_dm->backup_arfr_cnt1, coex_dm->backup_arfr_cnt2, ++ coex_dm->backup_retry_limit, ++ coex_dm->backup_ampdu_max_time); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434); ++ u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", ++ "0x430/0x434/0x42a/0x456", ++ u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6cc); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x880); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x778/0x6cc/0x880[29:25]", ++ u8tmp[0], u32tmp[0], (u32tmp[1] & 0x3e000000) >> 25); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x67); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x764); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x76e); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", ++ "0x948/ 0x67[5] / 0x764 / 0x76e", ++ u32tmp[0], ((u8tmp[0] & 0x20) >> 5), (u32tmp[1] & 0xffff), ++ u8tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x92c); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x930); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x944); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", ++ u32tmp[0] & 0x3, u32tmp[1] & 0xff, u32tmp[2] & 0x3); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x39); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x64); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", ++ "0x38[11]/0x40/0x4c[24:23]/0x64[0]", ++ ((u8tmp[0] & 0x8) >> 3), u8tmp[1], ++ ((u32tmp[0] & 0x01800000) >> 23), u8tmp[2] & 0x1); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x550(bcn ctrl)/0x522", ++ u32tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x49c); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0xc50(dig)/0x49c(null-drop)", ++ u32tmp[0] & 0xff, u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xda0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xda4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0xda8); ++ u32tmp[3] = btcoexist->btc_read_4byte(btcoexist, 0xcf0); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c); ++ ++ fa_ofdm = ((u32tmp[0] & 0xffff0000) >> 16) + ((u32tmp[1] & 0xffff0000) ++ >> 16) + (u32tmp[1] & 0xffff) + (u32tmp[2] & 0xffff) + ++ ((u32tmp[3] & 0xffff0000) >> 16) + (u32tmp[3] & ++ 0xffff) ; ++ fa_cck = (u8tmp[0] << 8) + u8tmp[1]; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "OFDM-CCA/OFDM-FA/CCK-FA", ++ u32tmp[0] & 0xffff, fa_ofdm, fa_cck); ++ CL_PRINTF(cli_buf); ++ ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", ++ "CRC_OK CCK/11g/11n/11n-Agg", ++ coex_sta->crc_ok_cck, coex_sta->crc_ok_11g, ++ coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_agg); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", ++ "CRC_Err CCK/11g/11n/11n-Agg", ++ coex_sta->crc_err_cck, coex_sta->crc_err_11g, ++ coex_sta->crc_err_11n, coex_sta->crc_err_11n_agg); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x6c0/0x6c4/0x6c8(coexTable)", ++ u32tmp[0], u32tmp[1], u32tmp[2]); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x770(high-pri rx/tx)", ++ coex_sta->high_priority_rx, coex_sta->high_priority_tx); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x774(low-pri rx/tx)", ++ coex_sta->low_priority_rx, coex_sta->low_priority_tx); ++ CL_PRINTF(cli_buf); ++#if (BT_AUTO_REPORT_ONLY_8723B_1ANT == 1) ++ /* halbtc8723b1ant_monitor_bt_ctr(btcoexist); */ ++#endif ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++void ex_halbtc8723b1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (btcoexist->manual_control || btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_IPS_ENTER == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS ENTER notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = true; ++ ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, false, true); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ } else if (BTC_IPS_LEAVE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS LEAVE notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8723b1ant_init_hw_config(btcoexist, false, false); ++ halbtc8723b1ant_init_coex_dm(btcoexist); ++ halbtc8723b1ant_query_bt_info(btcoexist); ++ ++ coex_sta->under_ips = false; ++ } ++} ++ ++void ex_halbtc8723b1ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (btcoexist->manual_control || btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_LPS_ENABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS ENABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = true; ++ } else if (BTC_LPS_DISABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS DISABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = false; ++ } ++} ++ ++void ex_halbtc8723b1ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean wifi_connected = false, bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ ++ u8 u8tmpa, u8tmpb; ++ u32 u32tmp; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_SCAN_START == type) { ++ coex_sta->wifi_is_high_pri_task = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN START notify\n"); ++ BTC_TRACE(trace_buf); ++ psd_scan->ant_det_is_ant_det_available = true; ++ halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, ++ 8); /* Force antenna setup for no scan result issue */ ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ FORCE_EXEC, false, false); ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765); ++ u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x67); ++ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", ++ u32tmp, u8tmpa, u8tmpb); ++ BTC_TRACE(trace_buf); ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, ++ &coex_sta->scan_ap_num); ++ } ++ ++ if (coex_sta->bt_disabled) ++ return; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ halbtc8723b1ant_query_bt_info(btcoexist); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8723b1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8723b1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8723b1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_SCAN_START == type) { ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8723b1ant_action_wifi_not_connected_scan( ++ btcoexist); ++ else /* wifi is connected */ ++ halbtc8723b1ant_action_wifi_connected_scan(btcoexist); ++ } else if (BTC_SCAN_FINISH == type) { ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8723b1ant_action_wifi_not_connected(btcoexist); ++ else ++ halbtc8723b1ant_action_wifi_connected(btcoexist); ++ } ++} ++ ++void ex_halbtc8723b1ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean wifi_connected = false, bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_ASSOCIATE_START == type) { ++ coex_sta->wifi_is_high_pri_task = true; ++ psd_scan->ant_det_is_ant_det_available = true; ++ halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, ++ 8); /* Force antenna setup for no scan result issue */ ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ FORCE_EXEC, false, false); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT START notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->arp_cnt = 0; ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ /* coex_dm->arp_cnt = 0; */ ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8723b1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8723b1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8723b1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_ASSOCIATE_START == type) ++ halbtc8723b1ant_action_wifi_not_connected_asso_auth(btcoexist); ++ else if (BTC_ASSOCIATE_FINISH == type) { ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8723b1ant_action_wifi_not_connected(btcoexist); ++ else ++ halbtc8723b1ant_action_wifi_connected(btcoexist); ++ } ++} ++ ++void ex_halbtc8723b1ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u8 h2c_parameter[3] = {0}; ++ u32 wifi_bw; ++ u8 wifi_central_chnl; ++ boolean wifi_under_b_mode = false; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_MEDIA_CONNECT == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA connect notify\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, ++ 8); /* Force antenna setup for no scan result issue */ ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ FORCE_EXEC, false, false); ++ psd_scan->ant_det_is_ant_det_available = true; ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ ++ /* Set CCK Tx/Rx high Pri except 11b mode */ ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, ++ 0x00); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, ++ 0x00); /* CCK Rx */ ++ } else { ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, ++ 0x00); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, ++ 0x10); /* CCK Rx */ ++ } ++ ++ coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, ++ 0x430); ++ coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, ++ 0x434); ++ coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( ++ btcoexist, 0x42a); ++ coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte( ++ btcoexist, 0x456); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA disconnect notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->arp_cnt = 0; ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x0); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */ ++ ++ coex_sta->cck_ever_lock = false; ++ } ++ ++ /* only 2.4G we need to inform bt the chnl mask */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ &wifi_central_chnl); ++ if ((BTC_MEDIA_CONNECT == type) && ++ (wifi_central_chnl <= 14)) { ++ /* h2c_parameter[0] = 0x1; */ ++ h2c_parameter[0] = 0x0; ++ h2c_parameter[1] = wifi_central_chnl; ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ h2c_parameter[2] = 0x30; ++ else ++ h2c_parameter[2] = 0x20; ++ } ++ ++ coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; ++ coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; ++ coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); ++} ++ ++void ex_halbtc8723b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false, under_4way = false; ++ u8 agg_buf_size = 5; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type) { ++ if (BTC_PACKET_ARP == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet ARP notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ coex_dm->arp_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ARP Packet Count = %d\n", ++ coex_dm->arp_cnt); ++ BTC_TRACE(trace_buf); ++ ++ if ((coex_dm->arp_cnt >= 10) && ++ (!under_4way)) /* if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecificPacket(btcoexist) */ ++ coex_sta->wifi_is_high_pri_task = false; ++ else ++ coex_sta->wifi_is_high_pri_task = true; ++ } else { ++ coex_sta->wifi_is_high_pri_task = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet DHCP or EAPOL notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet [Type = %d] notify\n", type); ++ BTC_TRACE(trace_buf); ++ } ++ ++ coex_sta->specific_pkt_period_cnt = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8723b1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8723b1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8723b1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ ((BTC_PACKET_ARP == type) && (coex_sta->wifi_is_high_pri_task))) ++ halbtc8723b1ant_action_wifi_connected_specific_packet( ++ btcoexist); ++} ++ ++void ex_halbtc8723b1ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length) ++{ ++ u8 bt_info = 0; ++ u8 i, rsp_source = 0; ++ boolean wifi_connected = false; ++ boolean bt_busy = false; ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ ++ coex_sta->c2h_bt_info_req_sent = false; ++ ++ rsp_source = tmp_buf[0] & 0xf; ++ if (rsp_source >= BT_INFO_SRC_8723B_1ANT_MAX) ++ rsp_source = BT_INFO_SRC_8723B_1ANT_WIFI_FW; ++ coex_sta->bt_info_c2h_cnt[rsp_source]++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source, ++ length); ++ BTC_TRACE(trace_buf); ++ for (i = 0; i < length; i++) { ++ coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; ++ if (i == 1) ++ bt_info = tmp_buf[i]; ++ if (i == length - 1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ ++ /* if 0xff, it means BT is under WHCK test */ ++ if (bt_info == 0xff) ++ coex_sta->bt_whck_test = true; ++ else ++ coex_sta->bt_whck_test = false; ++ ++ if (BT_INFO_SRC_8723B_1ANT_WIFI_FW != rsp_source) { ++ coex_sta->bt_retry_cnt = /* [3:0] */ ++ coex_sta->bt_info_c2h[rsp_source][2] & 0xf; ++ ++ if (coex_sta->bt_retry_cnt >= 1) ++ coex_sta->pop_event_cnt++; ++ ++ if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ++ coex_sta->c2h_bt_remote_name_req = true; ++ else ++ coex_sta->c2h_bt_remote_name_req = false; ++ ++ coex_sta->bt_rssi = ++ coex_sta->bt_info_c2h[rsp_source][3] * 2 - 90; ++ /* coex_sta->bt_info_c2h[rsp_source][3]*2+10; */ ++ ++ coex_sta->bt_info_ext = ++ coex_sta->bt_info_c2h[rsp_source][4]; ++ ++ if (coex_sta->bt_info_c2h[rsp_source][1] == 0x49) { ++ coex_sta->a2dp_bit_pool = ++ coex_sta->bt_info_c2h[rsp_source][6]; ++ } else ++ coex_sta->a2dp_bit_pool = 0; ++ ++ coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2] ++ & 0x40); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK, ++ &coex_sta->bt_tx_rx_mask); ++ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++#if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE ++ if ((board_info->btdm_ant_det_finish) && ++ (board_info->btdm_ant_num_by_ant_det == 2)) { ++ if (coex_sta->bt_tx_rx_mask) { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x1\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* BT TRx Mask un-lock 0x2c[0], 0x30[0] = 1 */ ++ btcoexist->btc_set_bt_reg(btcoexist, ++ BTC_BT_REG_RF, 0x2c, 0x7c45); ++ btcoexist->btc_set_bt_reg(btcoexist, ++ BTC_BT_REG_RF, 0x30, 0x7c45); ++ ++ btcoexist->btc_set_bt_reg(btcoexist, ++ BTC_BT_REG_RF, 0x3c, 0x1); ++ } ++ } else ++#endif ++#endif ++ ++ { ++ if (!coex_sta->bt_tx_rx_mask) { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_bt_reg(btcoexist, ++ BTC_BT_REG_RF, ++ 0x3c, 0x15); ++ ++ /* BT TRx Mask lock 0x2c[0], 0x30[0] = 0 */ ++ btcoexist->btc_set_bt_reg(btcoexist, ++ BTC_BT_REG_RF, ++ 0x2c, 0x7c44); ++ btcoexist->btc_set_bt_reg(btcoexist, ++ BTC_BT_REG_RF, ++ 0x30, 0x7c44); ++ } ++ } ++ ++ /* Here we need to resend some wifi info to BT */ ++ /* because bt is reset and loss of the info. */ ++ if (coex_sta->bt_info_ext & BIT(1)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (wifi_connected) ++ ex_halbtc8723b1ant_media_status_notify( ++ btcoexist, BTC_MEDIA_CONNECT); ++ else ++ ex_halbtc8723b1ant_media_status_notify( ++ btcoexist, BTC_MEDIA_DISCONNECT); ++ } ++ ++ if (coex_sta->bt_info_ext & BIT(3)) { ++ if (!btcoexist->manual_control && ++ !btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b1ant_ignore_wlan_act(btcoexist, ++ FORCE_EXEC, false); ++ } ++ } else { ++ /* BT already NOT ignore Wlan active, do nothing here. */ ++ } ++#if (BT_AUTO_REPORT_ONLY_8723B_1ANT == 0) ++ if ((coex_sta->bt_info_ext & BIT(4))) { ++ /* BT auto report already enabled, do nothing */ ++ } else ++ halbtc8723b1ant_bt_auto_report(btcoexist, FORCE_EXEC, ++ true); ++#endif ++ } ++ ++ /* check BIT2 first ==> check if bt is under inquiry or page scan */ ++ if (bt_info & BT_INFO_8723B_1ANT_B_INQ_PAGE) ++ coex_sta->c2h_bt_inquiry_page = true; ++ else ++ coex_sta->c2h_bt_inquiry_page = false; ++ ++ coex_sta->num_of_profile = 0; ++ ++ /* set link exist status */ ++ if (!(bt_info & BT_INFO_8723B_1ANT_B_CONNECTION)) { ++ coex_sta->bt_link_exist = false; ++ coex_sta->pan_exist = false; ++ coex_sta->a2dp_exist = false; ++ coex_sta->hid_exist = false; ++ coex_sta->sco_exist = false; ++ ++ coex_sta->bt_hi_pri_link_exist = false; ++ } else { /* connection exists */ ++ coex_sta->bt_link_exist = true; ++ if (bt_info & BT_INFO_8723B_1ANT_B_FTP) { ++ coex_sta->pan_exist = true; ++ coex_sta->num_of_profile++; ++ } else ++ coex_sta->pan_exist = false; ++ if (bt_info & BT_INFO_8723B_1ANT_B_A2DP) { ++ coex_sta->a2dp_exist = true; ++ coex_sta->num_of_profile++; ++ } else ++ coex_sta->a2dp_exist = false; ++ if (bt_info & BT_INFO_8723B_1ANT_B_HID) { ++ coex_sta->hid_exist = true; ++ coex_sta->num_of_profile++; ++ } else ++ coex_sta->hid_exist = false; ++ if (bt_info & BT_INFO_8723B_1ANT_B_SCO_ESCO) { ++ coex_sta->sco_exist = true; ++ coex_sta->num_of_profile++; ++ } else ++ coex_sta->sco_exist = false; ++ ++ if ((coex_sta->hid_exist == false) && ++ (coex_sta->c2h_bt_inquiry_page == false) && ++ (coex_sta->sco_exist == false)) { ++ if (coex_sta->high_priority_tx + ++ coex_sta->high_priority_rx >= 160) { ++ coex_sta->hid_exist = true; ++ coex_sta->wrong_profile_notification++; ++ coex_sta->num_of_profile++; ++ bt_info = bt_info | 0x28; ++ } ++ } ++ ++ /* Add Hi-Pri Tx/Rx counter to avoid false detection */ ++ if (((coex_sta->hid_exist) || (coex_sta->sco_exist)) && ++ (coex_sta->high_priority_tx + ++ coex_sta->high_priority_rx >= 160) ++ && (!coex_sta->c2h_bt_inquiry_page)) ++ coex_sta->bt_hi_pri_link_exist = true; ++ ++ if ((bt_info & BT_INFO_8723B_1ANT_B_ACL_BUSY) && ++ (coex_sta->num_of_profile == 0)) { ++ if (coex_sta->low_priority_tx + ++ coex_sta->low_priority_rx >= 160) { ++ coex_sta->pan_exist = true; ++ coex_sta->num_of_profile++; ++ coex_sta->wrong_profile_notification++; ++ bt_info = bt_info | 0x88; ++ } ++ } ++ } ++ ++ halbtc8723b1ant_update_bt_link_info(btcoexist); ++ ++ bt_info = bt_info & ++ 0x1f; /* mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) */ ++ ++ if (!(bt_info & BT_INFO_8723B_1ANT_B_CONNECTION)) ++ coex_dm->bt_status = BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ else if (bt_info == ++ BT_INFO_8723B_1ANT_B_CONNECTION) /* connection exists but no busy */ ++ coex_dm->bt_status = BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE; ++ else if ((bt_info & BT_INFO_8723B_1ANT_B_SCO_ESCO) || ++ (bt_info & BT_INFO_8723B_1ANT_B_SCO_BUSY)) ++ coex_dm->bt_status = BT_8723B_1ANT_BT_STATUS_SCO_BUSY; ++ else if (bt_info & BT_INFO_8723B_1ANT_B_ACL_BUSY) { ++ if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY != coex_dm->bt_status) ++ coex_dm->auto_tdma_adjust = false; ++ coex_dm->bt_status = BT_8723B_1ANT_BT_STATUS_ACL_BUSY; ++ } else ++ coex_dm->bt_status = BT_8723B_1ANT_BT_STATUS_MAX; ++ ++ if ((BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) ++ bt_busy = true; ++ else ++ bt_busy = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ halbtc8723b1ant_run_coexist_mechanism(btcoexist); ++} ++ ++void ex_halbtc8723b1ant_rf_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u32 u32tmp; ++ u8 u8tmpa, u8tmpb, u8tmpc; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], RF Status notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_RF_ON == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RF is turned ON!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->stop_coex_dm = false; ++ } else if (BTC_RF_OFF == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RF is turned OFF!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, false, true); ++ ++ halbtc8723b1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ btcoexist->stop_coex_dm = true; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765); ++ u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x67); ++ u8tmpc = btcoexist->btc_read_1byte(btcoexist, 0x76e); ++ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x, 0x76e=0x%x\n", ++ u32tmp, u8tmpa, u8tmpb, u8tmpc); ++ BTC_TRACE(trace_buf); ++ ++ } ++} ++ ++void ex_halbtc8723b1ant_halt_notify(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, FORCE_EXEC, ++ false, true); ++ ++ halbtc8723b1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ++ ex_halbtc8723b1ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); ++ ++ btcoexist->stop_coex_dm = true; ++} ++ ++void ex_halbtc8723b1ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state) ++{ ++ if (BTC_WIFI_PNP_SLEEP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to SLEEP\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, false, true); ++ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ ++ /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */ ++ /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */ ++ /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */ ++ coex_sta->under_ips = false; ++ coex_sta->under_lps = false; ++ btcoexist->stop_coex_dm = true; ++ } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to WAKE UP\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->stop_coex_dm = false; ++ halbtc8723b1ant_init_hw_config(btcoexist, false, false); ++ halbtc8723b1ant_init_coex_dm(btcoexist); ++ halbtc8723b1ant_query_bt_info(btcoexist); ++ } ++} ++ ++void ex_halbtc8723b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist) ++{ ++ ++ halbtc8723b1ant_init_hw_config(btcoexist, false, false); ++ /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */ ++ /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x2, 0xfffff, 0x0); */ ++ halbtc8723b1ant_init_coex_dm(btcoexist); ++} ++ ++void ex_halbtc8723b1ant_periodical(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ==========================Periodical===========================\n"); ++ BTC_TRACE(trace_buf); ++ ++#if (BT_AUTO_REPORT_ONLY_8723B_1ANT == 0) ++ halbtc8723b1ant_query_bt_info(btcoexist); ++#endif ++ halbtc8723b1ant_monitor_bt_ctr(btcoexist); ++ halbtc8723b1ant_monitor_wifi_ctr(btcoexist); ++ ++ halbtc8723b1ant_monitor_bt_enable_disable(btcoexist); ++ ++ ++ if (halbtc8723b1ant_is_wifi_status_changed(btcoexist) || ++ coex_dm->auto_tdma_adjust) ++ halbtc8723b1ant_run_coexist_mechanism(btcoexist); ++ ++ coex_sta->specific_pkt_period_cnt++; ++ ++ /* sample to set bt to execute Ant detection */ ++ /* btcoexist->btc_set_bt_ant_detection(btcoexist, 20, 14); ++ * ++ if (psd_scan->is_ant_det_enable) ++ { ++ if (psd_scan->psd_gen_count > psd_scan->realseconds) ++ psd_scan->psd_gen_count = 0; ++ ++ halbtc8723b1ant_antenna_detection(btcoexist, psd_scan->realcent_freq, psd_scan->realoffset, psd_scan->realspan, psd_scan->realseconds); ++ psd_scan->psd_gen_total_count +=2; ++ psd_scan->psd_gen_count += 2; ++ } ++ */ ++} ++ ++void ex_halbtc8723b1ant_antenna_detection(IN struct btc_coexist *btcoexist, ++ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds) ++{ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++ static u32 ant_det_count = 0, ant_det_fail_count = 0; ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ /*boolean scan, roam;*/ ++ ++ if (seconds == 0) { ++ psd_scan->ant_det_try_count = 0; ++ psd_scan->ant_det_fail_count = 0; ++ ant_det_count = 0; ++ ant_det_fail_count = 0; ++ board_info->btdm_ant_det_finish = false; ++ board_info->btdm_ant_num_by_ant_det = 1; ++ return; ++ } ++ ++ if (!board_info->btdm_ant_det_finish) { ++ psd_scan->ant_det_inteval_count = ++ psd_scan->ant_det_inteval_count + 2; ++ ++ if (psd_scan->ant_det_inteval_count >= ++ BT_8723B_1ANT_ANTDET_RETRY_INTERVAL) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b1ant_psd_antenna_detection_check(btcoexist); ++ ++ if (board_info->btdm_ant_det_finish) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n"); ++ BTC_TRACE(trace_buf); ++#if 1 ++ if (board_info->btdm_ant_num_by_ant_det == 2) ++ halbtc8723b1ant_mechanism_switch( ++ btcoexist, true); ++ else ++ halbtc8723b1ant_mechanism_switch( ++ btcoexist, false); ++#endif ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ psd_scan->ant_det_inteval_count = 0; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n", ++ psd_scan->ant_det_inteval_count); ++ BTC_TRACE(trace_buf); ++ } ++ ++ } ++#endif ++ ++ ++ /* ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ ++ psd_scan->ant_det_bt_tx_time = seconds; ++ psd_scan->ant_det_bt_le_channel = cent_freq; ++ ++ if (seconds == 0) ++ { ++ psd_scan->ant_det_try_count = 0; ++ psd_scan->ant_det_fail_count = 0; ++ ant_det_count = 0; ++ ant_det_fail_count = 0; ++ board_info->btdm_ant_det_finish = false; ++ board_info->btdm_ant_num_by_ant_det = 1; ++ return; ++ } ++ else ++ { ++ ant_det_count++; ++ ++ psd_scan->ant_det_try_count = ant_det_count; ++ ++ if (scan ||roam) ++ { ++ board_info->btdm_ant_det_finish = false; ++ psd_scan->ant_det_result = 6; ++ } ++ else if (coex_sta->num_of_profile >= 1) ++ { ++ board_info->btdm_ant_det_finish = false; ++ psd_scan->ant_det_result = 7; ++ } ++ else if (!psd_scan->ant_det_is_ant_det_available) ++ { ++ board_info->btdm_ant_det_finish = false; ++ psd_scan->ant_det_result = 9; ++ } ++ else if (coex_sta->c2h_bt_inquiry_page) ++ { ++ board_info->btdm_ant_det_finish = false; ++ psd_scan->ant_det_result = 10; ++ } ++ else ++ { ++ ++ } ++ ++ if (!board_info->btdm_ant_det_finish) ++ ant_det_fail_count++; ++ ++ psd_scan->ant_det_fail_count = ant_det_fail_count; ++ } ++ */ ++} ++ ++ ++void ex_halbtc8723b1ant_display_ant_detection(IN struct btc_coexist *btcoexist) ++{ ++#if BT_8723B_1ANT_ANTDET_ENABLE ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ ++ if (psd_scan->ant_det_try_count != 0) { ++ halbtc8723b1ant_psd_show_antenna_detect_result(btcoexist); ++ ++ if (board_info->btdm_ant_det_finish) ++ halbtc8723b1ant_psd_showdata(btcoexist); ++ return; ++ } ++#endif ++ ++ /* halbtc8723b1ant_show_psd_data(btcoexist); */ ++} ++ ++#endif ++ ++#endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */ ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b1Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b1Ant.h +new file mode 100644 +index 0000000..8da295c +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b1Ant.h +@@ -0,0 +1,288 @@ ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8723B_SUPPORT == 1) ++/* ******************************************* ++ * The following is for 8723B 1ANT BT Co-exist definition ++ * ******************************************* */ ++#define BT_AUTO_REPORT_ONLY_8723B_1ANT 1 ++ ++#define BT_INFO_8723B_1ANT_B_FTP BIT(7) ++#define BT_INFO_8723B_1ANT_B_A2DP BIT(6) ++#define BT_INFO_8723B_1ANT_B_HID BIT(5) ++#define BT_INFO_8723B_1ANT_B_SCO_BUSY BIT(4) ++#define BT_INFO_8723B_1ANT_B_ACL_BUSY BIT(3) ++#define BT_INFO_8723B_1ANT_B_INQ_PAGE BIT(2) ++#define BT_INFO_8723B_1ANT_B_SCO_ESCO BIT(1) ++#define BT_INFO_8723B_1ANT_B_CONNECTION BIT(0) ++ ++#define BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT(0))) ? true : false) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT 2 ++ ++#define BT_8723B_1ANT_WIFI_NOISY_THRESH 50 /* 30 //max: 255 */ ++ ++/* for Antenna detection */ ++#define BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50 ++#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70 ++#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 48 ++#define BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT 32 ++#define BT_8723B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */ ++#define BT_8723B_1ANT_ANTDET_SWEEPPOINT_DELAY 40000 ++#define BT_8723B_1ANT_ANTDET_ENABLE 1 ++#define BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 1 ++#define BT_8723B_1ANT_ANTDET_BTTXTIME 100 ++#define BT_8723B_1ANT_ANTDET_BTTXCHANNEL 39 ++ ++enum bt_info_src_8723b_1ant { ++ BT_INFO_SRC_8723B_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8723B_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8723B_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8723B_1ANT_MAX ++}; ++ ++enum bt_8723b_1ant_bt_status { ++ BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8723B_1ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8723B_1ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8723B_1ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8723B_1ANT_BT_STATUS_MAX ++}; ++ ++enum bt_8723b_1ant_wifi_status { ++ BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, ++ BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, ++ BT_8723B_1ANT_WIFI_STATUS_MAX ++}; ++ ++enum bt_8723b_1ant_coex_algo { ++ BT_8723B_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8723B_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8723B_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8723B_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8723B_1ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8723B_1ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8723B_1ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8723B_1ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8723B_1ANT_COEX_ALGO_MAX = 0xb, ++}; ++ ++struct coex_dm_8723b_1ant { ++ /* hw setting */ ++ u8 pre_ant_pos_type; ++ u8 cur_ant_pos_type; ++ /* fw mechanism */ ++ boolean cur_ignore_wlan_act; ++ boolean pre_ignore_wlan_act; ++ u8 pre_ps_tdma; ++ u8 cur_ps_tdma; ++ u8 ps_tdma_para[5]; ++ u8 ps_tdma_du_adj_type; ++ boolean auto_tdma_adjust; ++ boolean pre_ps_tdma_on; ++ boolean cur_ps_tdma_on; ++ boolean pre_bt_auto_report; ++ boolean cur_bt_auto_report; ++ u8 pre_lps; ++ u8 cur_lps; ++ u8 pre_rpwm; ++ u8 cur_rpwm; ++ ++ /* sw mechanism */ ++ boolean pre_low_penalty_ra; ++ boolean cur_low_penalty_ra; ++ u32 pre_val0x6c0; ++ u32 cur_val0x6c0; ++ u32 pre_val0x6c4; ++ u32 cur_val0x6c4; ++ u32 pre_val0x6c8; ++ u32 cur_val0x6c8; ++ u8 pre_val0x6cc; ++ u8 cur_val0x6cc; ++ ++ u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */ ++ u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */ ++ u16 backup_retry_limit; ++ u8 backup_ampdu_max_time; ++ ++ /* algorithm related */ ++ u8 bt_status; ++ u8 wifi_chnl_info[3]; ++ ++ u32 pre_ra_mask; ++ u32 cur_ra_mask; ++ u8 pre_arfr_type; ++ u8 cur_arfr_type; ++ u8 pre_retry_limit_type; ++ u8 cur_retry_limit_type; ++ u8 pre_ampdu_time_type; ++ u8 cur_ampdu_time_type; ++ u32 arp_cnt; ++ ++ u8 error_condition; ++}; ++ ++struct coex_sta_8723b_1ant { ++ boolean bt_disabled; ++ boolean bt_link_exist; ++ boolean sco_exist; ++ boolean a2dp_exist; ++ boolean hid_exist; ++ boolean pan_exist; ++ boolean bt_hi_pri_link_exist; ++ u8 num_of_profile; ++ boolean bt_abnormal_scan; ++ ++ boolean under_lps; ++ boolean under_ips; ++ u32 specific_pkt_period_cnt; ++ u32 high_priority_tx; ++ u32 high_priority_rx; ++ u32 low_priority_tx; ++ u32 low_priority_rx; ++ s8 bt_rssi; ++ boolean bt_tx_rx_mask; ++ boolean c2h_bt_info_req_sent; ++ u8 bt_info_c2h[BT_INFO_SRC_8723B_1ANT_MAX][10]; ++ u32 bt_info_c2h_cnt[BT_INFO_SRC_8723B_1ANT_MAX]; ++ boolean bt_whck_test; ++ boolean c2h_bt_inquiry_page; ++ boolean c2h_bt_remote_name_req; ++ boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */ ++ u8 bt_retry_cnt; ++ u8 bt_info_ext; ++ u32 pop_event_cnt; ++ u8 scan_ap_num; ++ ++ u32 crc_ok_cck; ++ u32 crc_ok_11g; ++ u32 crc_ok_11n; ++ u32 crc_ok_11n_agg; ++ ++ u32 crc_err_cck; ++ u32 crc_err_11g; ++ u32 crc_err_11n; ++ u32 crc_err_11n_agg; ++ ++ boolean cck_lock; ++ boolean pre_ccklock; ++ boolean cck_ever_lock; ++ u8 coex_table_type; ++ ++ boolean force_lps_on; ++ u32 wrong_profile_notification; ++ ++ u8 a2dp_bit_pool; ++ u8 cut_version; ++}; ++ ++#define BT_8723B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */ ++#define BT_8723B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */ ++#define BT_8723B_1ANT_ANTDET_BUF_LEN 16 ++ ++struct psdscan_sta_8723b_1ant { ++ ++ u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */ ++ u32 ant_det_bt_tx_time; ++ u32 ant_det_pre_psdscan_peak_val; ++ boolean ant_det_is_ant_det_available; ++ u32 ant_det_psd_scan_peak_val; ++ boolean ant_det_is_btreply_available; ++ u32 ant_det_psd_scan_peak_freq; ++ ++ u8 ant_det_result; ++ u8 ant_det_peak_val[BT_8723B_1ANT_ANTDET_BUF_LEN]; ++ u8 ant_det_peak_freq[BT_8723B_1ANT_ANTDET_BUF_LEN]; ++ u32 ant_det_try_count; ++ u32 ant_det_fail_count; ++ u32 ant_det_inteval_count; ++ u32 ant_det_thres_offset; ++ ++ u32 real_cent_freq; ++ s32 real_offset; ++ u32 real_span; ++ ++ u32 psd_band_width; /* unit: Hz */ ++ u32 psd_point; /* 128/256/512/1024 */ ++ u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */ ++ u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */ ++ u32 psd_start_point; ++ u32 psd_stop_point; ++ u32 psd_max_value_point; ++ u32 psd_max_value; ++ u32 psd_start_base; ++ u32 psd_avg_num; /* 1/8/16/32 */ ++ u32 psd_gen_count; ++ boolean is_psd_running; ++ boolean is_psd_show_max_only; ++}; ++ ++/* ******************************************* ++ * The following is interface which will notify coex module. ++ * ******************************************* */ ++void ex_halbtc8723b1ant_power_on_setting(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only); ++void ex_halbtc8723b1ant_init_coex_dm(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b1ant_ips_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b1ant_lps_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b1ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b1ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b1ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b1ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length); ++void ex_halbtc8723b1ant_rf_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b1ant_halt_notify(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b1ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state); ++void ex_halbtc8723b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b1ant_periodical(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b1ant_display_coex_info(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b1ant_antenna_detection(IN struct btc_coexist *btcoexist, ++ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds); ++ ++void ex_halbtc8723b1ant_display_ant_detection(IN struct btc_coexist *btcoexist); ++ ++#else ++#define ex_halbtc8723b1ant_power_on_setting(btcoexist) ++#define ex_halbtc8723b1ant_pre_load_firmware(btcoexist) ++#define ex_halbtc8723b1ant_init_hw_config(btcoexist, wifi_only) ++#define ex_halbtc8723b1ant_init_coex_dm(btcoexist) ++#define ex_halbtc8723b1ant_ips_notify(btcoexist, type) ++#define ex_halbtc8723b1ant_lps_notify(btcoexist, type) ++#define ex_halbtc8723b1ant_scan_notify(btcoexist, type) ++#define ex_halbtc8723b1ant_connect_notify(btcoexist, type) ++#define ex_halbtc8723b1ant_media_status_notify(btcoexist, type) ++#define ex_halbtc8723b1ant_specific_packet_notify(btcoexist, type) ++#define ex_halbtc8723b1ant_bt_info_notify(btcoexist, tmp_buf, length) ++#define ex_halbtc8723b1ant_rf_status_notify(btcoexist, type) ++#define ex_halbtc8723b1ant_halt_notify(btcoexist) ++#define ex_halbtc8723b1ant_pnp_notify(btcoexist, pnp_state) ++#define ex_halbtc8723b1ant_coex_dm_reset(btcoexist) ++#define ex_halbtc8723b1ant_periodical(btcoexist) ++#define ex_halbtc8723b1ant_display_coex_info(btcoexist) ++#define ex_halbtc8723b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds) ++#define ex_halbtc8723b1ant_display_ant_detection(btcoexist) ++ ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b2Ant.c +new file mode 100644 +index 0000000..80c1de0 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b2Ant.c +@@ -0,0 +1,4920 @@ ++/* ************************************************************ ++ * Description: ++ * ++ * This file is for RTL8723B Co-exist mechanism ++ * ++ * History ++ * 2012/11/15 Cosa first check in. ++ * ++ * ************************************************************ */ ++ ++/* ************************************************************ ++ * include files ++ * ************************************************************ */ ++#include "Mp_Precomp.h" ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8723B_SUPPORT == 1) ++/* ************************************************************ ++ * Global variables, these are static variables ++ * ************************************************************ */ ++static u8 *trace_buf = &gl_btc_trace_buf[0]; ++static struct coex_dm_8723b_2ant glcoex_dm_8723b_2ant; ++static struct coex_dm_8723b_2ant *coex_dm = &glcoex_dm_8723b_2ant; ++static struct coex_sta_8723b_2ant glcoex_sta_8723b_2ant; ++static struct coex_sta_8723b_2ant *coex_sta = &glcoex_sta_8723b_2ant; ++ ++const char *const glbt_info_src_8723b_2ant[] = { ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u32 glcoex_ver_date_8723b_2ant = 20151223; ++u32 glcoex_ver_8723b_2ant = 0x4a; ++ ++/* ************************************************************ ++ * local function proto type if needed ++ * ************************************************************ ++ * ************************************************************ ++ * local function start with halbtc8723b2ant_ ++ * ************************************************************ */ ++u8 halbtc8723b2ant_bt_rssi_state(u8 *ppre_bt_rssi_state, u8 level_num, ++ u8 rssi_thresh, u8 rssi_thresh1) ++{ ++ s32 bt_rssi = 0; ++ u8 bt_rssi_state = *ppre_bt_rssi_state; ++ ++ bt_rssi = coex_sta->bt_rssi; ++ ++ if (level_num == 2) { ++ if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Rssi thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return *ppre_bt_rssi_state; ++ } ++ ++ if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (bt_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (bt_rssi < rssi_thresh1) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ *ppre_bt_rssi_state = bt_rssi_state; ++ ++ return bt_rssi_state; ++} ++ ++u8 halbtc8723b2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist, ++ IN u8 *pprewifi_rssi_state, IN u8 level_num, IN u8 rssi_thresh, ++ IN u8 rssi_thresh1) ++{ ++ s32 wifi_rssi = 0; ++ u8 wifi_rssi_state = *pprewifi_rssi_state; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ ++ if (level_num == 2) { ++ if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) || ++ (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi RSSI thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return *pprewifi_rssi_state; ++ } ++ ++ if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) || ++ (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((*pprewifi_rssi_state == BTC_RSSI_STATE_MEDIUM) || ++ (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (wifi_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (wifi_rssi < rssi_thresh1) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ *pprewifi_rssi_state = wifi_rssi_state; ++ ++ return wifi_rssi_state; ++} ++ ++void halbtc8723b2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist) ++{ ++ static u32 bt_disable_cnt = 0; ++ boolean bt_active = true, bt_disabled = false; ++ ++ /* This function check if bt is disabled */ ++ ++ if (coex_sta->high_priority_tx == 0 && ++ coex_sta->high_priority_rx == 0 && ++ coex_sta->low_priority_tx == 0 && ++ coex_sta->low_priority_rx == 0) ++ bt_active = false; ++ if (coex_sta->high_priority_tx == 0xffff && ++ coex_sta->high_priority_rx == 0xffff && ++ coex_sta->low_priority_tx == 0xffff && ++ coex_sta->low_priority_rx == 0xffff) ++ bt_active = false; ++ if (bt_active) { ++ bt_disable_cnt = 0; ++ bt_disabled = false; ++ } else { ++ bt_disable_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], bt all counters=0, %d times!!\n", ++ bt_disable_cnt); ++ BTC_TRACE(trace_buf); ++ if (bt_disable_cnt >= 2) ++ bt_disabled = true; ++ } ++ if (coex_sta->bt_disabled != bt_disabled) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is from %s to %s!!\n", ++ (coex_sta->bt_disabled ? "disabled" : "enabled"), ++ (bt_disabled ? "disabled" : "enabled")); ++ BTC_TRACE(trace_buf); ++ ++ coex_sta->bt_disabled = bt_disabled; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ if (bt_disabled) { ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ } ++ } ++} ++ ++ ++void halbtc8723b2ant_limited_rx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rej_ap_agg_pkt, ++ IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size) ++{ ++ boolean reject_rx_agg = rej_ap_agg_pkt; ++ boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; ++ u8 rx_agg_size = agg_buf_size; ++ ++ /* ============================================ */ ++ /* Rx Aggregation related setting */ ++ /* ============================================ */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ &reject_rx_agg); ++ /* decide BT control aggregation buf size or not */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ &bt_ctrl_rx_agg_size); ++ /* aggregation buf size, only work when BT control Rx aggregation size. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); ++ /* real update aggregation setting */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++} ++ ++void halbtc8723b2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist) ++{ ++ u32 reg_hp_txrx, reg_lp_txrx, u32tmp; ++ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; ++ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ reg_hp_txrx = 0x770; ++ reg_lp_txrx = 0x774; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); ++ reg_hp_tx = u32tmp & MASKLWORD; ++ reg_hp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); ++ reg_lp_tx = u32tmp & MASKLWORD; ++ reg_lp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ coex_sta->high_priority_tx = reg_hp_tx; ++ coex_sta->high_priority_rx = reg_hp_rx; ++ coex_sta->low_priority_tx = reg_lp_tx; ++ coex_sta->low_priority_rx = reg_lp_rx; ++ ++ if ((coex_sta->low_priority_tx > 1050) && ++ (!coex_sta->c2h_bt_inquiry_page)) ++ coex_sta->pop_event_cnt++; ++ ++ if ((coex_sta->low_priority_rx >= 950) && ++ (coex_sta->low_priority_rx >= coex_sta->low_priority_tx) && ++ (!coex_sta->under_ips)) ++ bt_link_info->slave_role = true; ++ else ++ bt_link_info->slave_role = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx); ++ BTC_TRACE(trace_buf); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx); ++ BTC_TRACE(trace_buf); ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); ++} ++ ++void halbtc8723b2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist) ++{ ++ ++ ++ if (coex_sta->under_ips) { ++ coex_sta->crc_ok_cck = 0; ++ coex_sta->crc_ok_11g = 0; ++ coex_sta->crc_ok_11n = 0; ++ coex_sta->crc_ok_11n_agg = 0; ++ ++ coex_sta->crc_err_cck = 0; ++ coex_sta->crc_err_11g = 0; ++ coex_sta->crc_err_11n = 0; ++ coex_sta->crc_err_11n_agg = 0; ++ } else { ++ coex_sta->crc_ok_cck = btcoexist->btc_read_4byte(btcoexist, ++ 0xf88); ++ coex_sta->crc_ok_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf94); ++ coex_sta->crc_ok_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf90); ++ coex_sta->crc_ok_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xfb8); ++ ++ coex_sta->crc_err_cck = btcoexist->btc_read_4byte(btcoexist, ++ 0xf84); ++ coex_sta->crc_err_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf96); ++ coex_sta->crc_err_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf92); ++ coex_sta->crc_err_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xfba); ++ } ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x1); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x0); ++} ++ ++void halbtc8723b2ant_query_bt_info(IN struct btc_coexist *btcoexist) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ coex_sta->c2h_bt_info_req_sent = true; ++ ++ h2c_parameter[0] |= BIT(0); /* trigger */ ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); ++} ++ ++boolean halbtc8723b2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist) ++{ ++ static boolean pre_wifi_busy = false, pre_under_4way = false, ++ pre_bt_hs_on = false; ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW; ++ boolean wifi_busy = false, under_4way = false, bt_hs_on = false; ++ boolean wifi_connected = false; ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ ++ if (wifi_connected) { ++ if (wifi_busy != pre_wifi_busy) { ++ pre_wifi_busy = wifi_busy; ++ return true; ++ } ++ if (under_4way != pre_under_4way) { ++ pre_under_4way = under_4way; ++ return true; ++ } ++ if (bt_hs_on != pre_bt_hs_on) { ++ pre_bt_hs_on = bt_hs_on; ++ return true; ++ } ++ ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, ++ BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ if ((BTC_RSSI_STATE_HIGH == wifi_rssi_state) || ++ (BTC_RSSI_STATE_LOW == wifi_rssi_state)) ++ return true; ++ ++ } ++ ++ return false; ++} ++ ++void halbtc8723b2ant_update_bt_link_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ bt_link_info->bt_link_exist = coex_sta->bt_link_exist; ++ bt_link_info->sco_exist = coex_sta->sco_exist; ++ bt_link_info->a2dp_exist = coex_sta->a2dp_exist; ++ bt_link_info->pan_exist = coex_sta->pan_exist; ++ bt_link_info->hid_exist = coex_sta->hid_exist; ++ ++ /* work around for HS mode. */ ++ if (bt_hs_on) { ++ bt_link_info->pan_exist = true; ++ bt_link_info->bt_link_exist = true; ++ } ++ ++ /* check if Sco only */ ++ if (bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->sco_only = true; ++ else ++ bt_link_info->sco_only = false; ++ ++ /* check if A2dp only */ ++ if (!bt_link_info->sco_exist && ++ bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->a2dp_only = true; ++ else ++ bt_link_info->a2dp_only = false; ++ ++ /* check if Pan only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->pan_only = true; ++ else ++ bt_link_info->pan_only = false; ++ ++ /* check if Hid only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ bt_link_info->hid_exist) ++ bt_link_info->hid_only = true; ++ else ++ bt_link_info->hid_only = false; ++} ++ ++u8 halbtc8723b2ant_action_algorithm(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ u8 algorithm = BT_8723B_2ANT_COEX_ALGO_UNDEFINED; ++ u8 num_of_diff_profile = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ if (!bt_link_info->bt_link_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], No BT link exists!!!\n"); ++ BTC_TRACE(trace_buf); ++ return algorithm; ++ } ++ ++ if (bt_link_info->sco_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->hid_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->pan_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->a2dp_exist) ++ num_of_diff_profile++; ++ ++ if (num_of_diff_profile == 1) { ++ if (bt_link_info->sco_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_SCO; ++ } else { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PAN(HS) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PAN(EDR) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 2) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_HID; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + A2DP ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile >= 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++void halbtc8723b2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist, ++ IN u8 dac_swing_lvl) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ /* There are several type of dacswing */ ++ /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */ ++ h2c_parameter[0] = dac_swing_lvl; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter); ++} ++ ++void halbtc8723b2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist, ++ IN u8 dec_bt_pwr_lvl) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = dec_bt_pwr_lvl; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter); ++} ++ ++void halbtc8723b2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 dec_bt_pwr_lvl) ++{ ++ coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl) ++ return; ++ } ++ halbtc8723b2ant_set_fw_dec_bt_pwr(btcoexist, ++ coex_dm->cur_bt_dec_pwr_lvl); ++ ++ coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl; ++} ++ ++void halbtc8723b2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean enable_auto_report) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = 0; ++ ++ if (enable_auto_report) ++ h2c_parameter[0] |= BIT(0); ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); ++} ++ ++void halbtc8723b2ant_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable_auto_report) ++{ ++ coex_dm->cur_bt_auto_report = enable_auto_report; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) ++ return; ++ } ++ halbtc8723b2ant_set_bt_auto_report(btcoexist, ++ coex_dm->cur_bt_auto_report); ++ ++ coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; ++} ++ ++void halbtc8723b2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 fw_dac_swing_lvl) ++{ ++ coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_fw_dac_swing_lvl == ++ coex_dm->cur_fw_dac_swing_lvl) ++ return; ++ } ++ ++ halbtc8723b2ant_set_fw_dac_swing_level(btcoexist, ++ coex_dm->cur_fw_dac_swing_lvl); ++ ++ coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl; ++} ++ ++void halbtc8723b2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist, ++ IN boolean rx_rf_shrink_on) ++{ ++ if (rx_rf_shrink_on) { ++ /* Shrink RF Rx LPF corner */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Shrink RF Rx LPF corner!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff, ++ 0xffffc); ++ } else { ++ /* Resume RF Rx LPF corner */ ++ /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */ ++ if (btcoexist->initilized) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Resume RF Rx LPF corner!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, ++ 0xfffff, coex_dm->bt_rf_0x1e_backup); ++ } ++ } ++} ++ ++void halbtc8723b2ant_rf_shrink(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rx_rf_shrink_on) ++{ ++ coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_rf_rx_lpf_shrink == ++ coex_dm->cur_rf_rx_lpf_shrink) ++ return; ++ } ++ halbtc8723b2ant_set_sw_rf_rx_lpf_corner(btcoexist, ++ coex_dm->cur_rf_rx_lpf_shrink); ++ ++ coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink; ++} ++ ++void halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist ++ *btcoexist, IN boolean low_penalty_ra) ++{ ++ u8 h2c_parameter[6] = {0}; ++ ++ h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */ ++ ++ if (low_penalty_ra) { ++ h2c_parameter[1] |= BIT(0); ++ h2c_parameter[2] = ++ 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */ ++ h2c_parameter[3] = 0xf4; /* MCS7 or OFDM54 */ ++ h2c_parameter[4] = 0xf5; /* MCS6 or OFDM48 */ ++ h2c_parameter[5] = 0xf6; /* MCS5 or OFDM36 */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter); ++} ++ ++void halbtc8723b2ant_low_penalty_ra(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean low_penalty_ra) ++{ ++ coex_dm->cur_low_penalty_ra = low_penalty_ra; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) ++ return; ++ } ++ halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(btcoexist, ++ coex_dm->cur_low_penalty_ra); ++ ++ coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; ++} ++ ++void halbtc8723b2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist, ++ IN u32 level) ++{ ++ u8 val = (u8)level; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Write SwDacSwing = 0x%x\n", level); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val); ++} ++ ++void halbtc8723b2ant_set_sw_full_time_dac_swing(IN struct btc_coexist ++ *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl) ++{ ++ if (sw_dac_swing_on) ++ halbtc8723b2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl); ++ else ++ halbtc8723b2ant_set_dac_swing_reg(btcoexist, 0x18); ++} ++ ++ ++void halbtc8723b2ant_dac_swing(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl) ++{ ++ coex_dm->cur_dac_swing_on = dac_swing_on; ++ coex_dm->cur_dac_swing_lvl = dac_swing_lvl; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) && ++ (coex_dm->pre_dac_swing_lvl == ++ coex_dm->cur_dac_swing_lvl)) ++ return; ++ } ++ delay_ms(30); ++ halbtc8723b2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on, ++ dac_swing_lvl); ++ ++ coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on; ++ coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl; ++} ++ ++void halbtc8723b2ant_set_adc_back_off(IN struct btc_coexist *btcoexist, ++ IN boolean adc_back_off) ++{ ++ if (adc_back_off) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB BackOff Level On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB BackOff Level Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1); ++ } ++} ++ ++void halbtc8723b2ant_adc_back_off(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean adc_back_off) ++{ ++ coex_dm->cur_adc_back_off = adc_back_off; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off) ++ return; ++ } ++ halbtc8723b2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off); ++ ++ coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off; ++} ++ ++void halbtc8723b2ant_set_agc_table(IN struct btc_coexist *btcoexist, ++ IN boolean agc_table_en) ++{ ++ u8 rssi_adjust_val = 0; ++ ++ /* =================BB AGC Gain Table */ ++ if (agc_table_en) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB Agc Table On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6e1A0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6d1B0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6c1C0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6b1D0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6a1E0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x691F0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x68200001); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB Agc Table Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa4200001); ++ } ++ ++ ++ /* =================RF Gain */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); ++ if (agc_table_en) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x38fff); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x38ffe); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x380c3); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x28ce6); ++ } ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x1); ++ if (agc_table_en) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff, ++ 0x38fff); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff, ++ 0x38ffe); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff, ++ 0x380c3); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff, ++ 0x28ce6); ++ } ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x0); ++ ++ /* set rssi_adjust_val for wifi module. */ ++ if (agc_table_en) ++ rssi_adjust_val = 8; ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, ++ &rssi_adjust_val); ++} ++ ++void halbtc8723b2ant_agc_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean agc_table_en) ++{ ++ coex_dm->cur_agc_table_en = agc_table_en; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en) ++ return; ++ } ++ halbtc8723b2ant_set_agc_table(btcoexist, agc_table_en); ++ ++ coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en; ++} ++ ++void halbtc8723b2ant_set_coex_table(IN struct btc_coexist *btcoexist, ++ IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); ++} ++ ++void halbtc8723b2ant_coex_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4, ++ IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ coex_dm->cur_val0x6c0 = val0x6c0; ++ coex_dm->cur_val0x6c4 = val0x6c4; ++ coex_dm->cur_val0x6c8 = val0x6c8; ++ coex_dm->cur_val0x6cc = val0x6cc; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && ++ (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && ++ (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && ++ (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) ++ return; ++ } ++ halbtc8723b2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, ++ val0x6cc); ++ ++ coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; ++ coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; ++ coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; ++ coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; ++} ++ ++void halbtc8723b2ant_coex_table_with_type(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_sta->coex_table_type = type; ++ ++ switch (type) { ++ case 0: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5afa5afa, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0xffffffff, 0xffffffff, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 8: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 9: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 10: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 11: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 12: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 13: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 14: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 15: ++ halbtc8723b2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8723b2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean enable) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ if (enable) { ++ h2c_parameter[0] |= BIT(0); /* function enable */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); ++} ++ ++void halbtc8723b2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN u8 lps_val, IN u8 rpwm_val) ++{ ++ u8 lps = lps_val; ++ u8 rpwm = rpwm_val; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps); ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++void halbtc8723b2ant_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ coex_dm->cur_lps = lps_val; ++ coex_dm->cur_rpwm = rpwm_val; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_lps == coex_dm->cur_lps) && ++ (coex_dm->pre_rpwm == coex_dm->cur_rpwm)) ++ return; ++ } ++ halbtc8723b2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val); ++ ++ coex_dm->pre_lps = coex_dm->cur_lps; ++ coex_dm->pre_rpwm = coex_dm->cur_rpwm; ++} ++ ++void halbtc8723b2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable) ++{ ++ coex_dm->cur_ignore_wlan_act = enable; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_ignore_wlan_act == ++ coex_dm->cur_ignore_wlan_act) ++ return; ++ } ++ halbtc8723b2ant_set_fw_ignore_wlan_act(btcoexist, enable); ++ ++ coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; ++} ++ ++void halbtc8723b2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist, ++ IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5) ++{ ++ u8 h2c_parameter[5] = {0}; ++ ++ ++ if ((coex_sta->a2dp_exist) && (coex_sta->hid_exist)) ++ byte5 = byte5 | 0x1; ++ ++ h2c_parameter[0] = byte1; ++ h2c_parameter[1] = byte2; ++ h2c_parameter[2] = byte3; ++ h2c_parameter[3] = byte4; ++ h2c_parameter[4] = byte5; ++ ++ coex_dm->ps_tdma_para[0] = byte1; ++ coex_dm->ps_tdma_para[1] = byte2; ++ coex_dm->ps_tdma_para[2] = byte3; ++ coex_dm->ps_tdma_para[3] = byte4; ++ coex_dm->ps_tdma_para[4] = byte5; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); ++} ++ ++void halbtc8723b2ant_sw_mechanism1(IN struct btc_coexist *btcoexist, ++ IN boolean shrink_rx_lpf, IN boolean low_penalty_ra, ++ IN boolean limited_dig, IN boolean bt_lna_constrain) ++{ ++ /* ++ u32 wifi_bw; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if(BTC_WIFI_BW_HT40 != wifi_bw) ++ { ++ if (shrink_rx_lpf) ++ shrink_rx_lpf = false; ++ } ++ */ ++ ++ /* halbtc8723b2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); */ ++ halbtc8723b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); ++} ++ ++void halbtc8723b2ant_sw_mechanism2(IN struct btc_coexist *btcoexist, ++ IN boolean agc_table_shift, IN boolean adc_back_off, ++ IN boolean sw_dac_swing, IN u32 dac_swing_lvl) ++{ ++ /* halbtc8723b2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */ ++ /* halbtc8723b2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */ ++ /* halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, dac_swing_lvl); */ ++} ++ ++void halbtc8723b2ant_set_ant_path(IN struct btc_coexist *btcoexist, ++ IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ PADAPTER pAdapter = btcoexist->Adapter; ++ u32 fw_ver = 0, u32tmp = 0, cnt_bt_cal_chk = 0; ++ boolean pg_ext_switch = false; ++ boolean use_ext_switch = false; ++ u8 h2c_parameter[2] = {0}; ++ u32 u32tmp_1[4]; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_EXT_SWITCH, &pg_ext_switch); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, ++ &fw_ver); /* [31:16]=fw ver, [15:0]=fw sub ver */ ++ ++ if ((fw_ver > 0 && fw_ver < 0xc0000) || pg_ext_switch) ++ use_ext_switch = true; ++ ++ if (init_hwcfg) { ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x39, 0x8, 0x1); ++ btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x944, 0x3, 0x3); ++ btcoexist->btc_write_1byte(btcoexist, 0x930, 0x77); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x1); ++ ++ if (fw_ver >= 0x180000) { ++ /* Use H2C to set GNT_BT to High to avoid A2DP click */ ++ h2c_parameter[0] = 1; ++ btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, ++ h2c_parameter); ++ ++ cnt_bt_cal_chk = 0; ++ while(1) ++ { ++ if( pAdapter->bFWReady == FALSE ) ++ { ++ //RT_TRACE(COMP_INIT , DBG_LOUD, ("halbtc8723b2ant_SetAntPath(): we don't need to wait for H2C command completion because of Fw download fail!!!\n")); ++ break; ++ } ++ ++ if( btcoexist->btc_read_1byte(btcoexist, 0x765) == 0x18 ) ++ break; ++ ++ cnt_bt_cal_chk++; ++ if( cnt_bt_cal_chk > 20 ) ++ break; ++ } ++ } else ++ btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18); ++ u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240)) ++ btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]); ++ else ++ btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x0); /* WiFi TRx Mask off */ ++ /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */ ++ /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x01); //BT TRx Mask off */ ++ ++ if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) { ++ /* tell firmware "no antenna inverse" */ ++ h2c_parameter[0] = 0; ++ } else { ++ /* tell firmware "antenna inverse" */ ++ h2c_parameter[0] = 1; ++ } ++ ++ if (use_ext_switch) { ++ /* ext switch type */ ++ h2c_parameter[1] = 1; ++ } else { ++ /* int switch type */ ++ h2c_parameter[1] = 0; ++ } ++ btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, h2c_parameter); ++ } else { ++ if (fw_ver >= 0x180000) { ++ /* Use H2C to set GNT_BT to "Control by PTA"*/ ++ h2c_parameter[0] = 0; ++ btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, ++ h2c_parameter); ++ ++ cnt_bt_cal_chk = 0; ++ while(1) ++ { ++ if( pAdapter->bFWReady == FALSE ) ++ { ++ //RT_TRACE(COMP_INIT , DBG_LOUD, ("halbtc8723b2ant_SetAntPath(): we don't need to wait for H2C command completion because of Fw download fail!!!\n")); ++ break; ++ } ++ ++ if( btcoexist->btc_read_1byte(btcoexist, 0x765) == 0x0 ) ++ break; ++ ++ cnt_bt_cal_chk++; ++ if( cnt_bt_cal_chk > 20 ) ++ break; ++ } ++ } else ++ btcoexist->btc_write_1byte(btcoexist, 0x765, 0x0); ++ } ++ ++ /* ext switch setting */ ++ if (use_ext_switch) { ++ if (init_hwcfg) { ++ /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp &= ~BIT(23); ++ u32tmp |= BIT(24); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ } ++ u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240)) ++ btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]); ++ else ++ btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0); ++ ++ switch (ant_pos_type) { ++ case BTC_ANT_WIFI_AT_MAIN: ++ btcoexist->btc_write_1byte_bitmask(btcoexist, ++ 0x92c, 0x3, ++ 0x1); /* ext switch main at wifi */ ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ btcoexist->btc_write_1byte_bitmask(btcoexist, ++ 0x92c, 0x3, ++ 0x2); /* ext switch aux at wifi */ ++ break; ++ } ++ } else { /* internal switch */ ++ if (init_hwcfg) { ++ /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp |= BIT(23); ++ u32tmp &= ~BIT(24); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ } ++ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1, ++ 0x0); /* fixed external switch S1->Main, S0->Aux */ ++ switch (ant_pos_type) { ++ case BTC_ANT_WIFI_AT_MAIN: ++ u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240)) ++ btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]); ++ else ++ btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0); ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240)) ++ btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]); ++ else ++ btcoexist->btc_write_4byte(btcoexist, 0x948, 0x280); ++ break; ++ } ++ } ++} ++#if 0 ++boolean halbtc8723b2ant_CoexSwitchThresCheck(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state1, bt_rssi_state; ++ u32 vendor; ++ u8 offset = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor); ++ ++ /* if (vendor == BTC_VENDOR_LENOVO) */ ++ /* offset = 20; */ ++ ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES ++ - coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ if (BTC_RSSI_LOW(wifi_rssi_state1) || BTC_RSSI_LOW(bt_rssi_state)) ++ return true; ++ ++ return false; ++} ++#endif ++ ++void halbtc8723b2ant_ps_tdma(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean turn_on, IN u8 type) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state1, bt_rssi_state; ++ s8 wifi_duration_adjust = 0x0; ++ u8 psTdmaByte4Modify = 0x0; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES ++ - coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], %s turn %s PS TDMA, type=%d\n", ++ (force_exec ? "force to" : ""), (turn_on ? "ON" : "OFF"), type); ++ BTC_TRACE(trace_buf); ++ coex_dm->cur_ps_tdma_on = turn_on; ++ coex_dm->cur_ps_tdma = type; ++ ++ if (!(BTC_RSSI_HIGH(wifi_rssi_state1) && ++ BTC_RSSI_HIGH(bt_rssi_state)) && turn_on) ++ /* if (halbtc8723b2ant_CoexSwitchThresCheck(btcoexist) && turn_on) */ ++ { ++ type = type + 100; /* for WiFi RSSI low or BT RSSI low */ ++ coex_dm->is_switch_to_1dot5_ant = true; ++ } else ++ coex_dm->is_switch_to_1dot5_ant = false; ++ ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && ++ (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) ++ return; ++ } ++ ++ if (coex_sta->scan_ap_num <= 5) { ++ if (coex_sta->a2dp_bit_pool >= 45) ++ wifi_duration_adjust = -15; ++ else if (coex_sta->a2dp_bit_pool >= 35) ++ wifi_duration_adjust = -10; ++ else ++ wifi_duration_adjust = 5; ++ } else if (coex_sta->scan_ap_num <= 20) { ++ if (coex_sta->a2dp_bit_pool >= 45) ++ wifi_duration_adjust = -15; ++ else if (coex_sta->a2dp_bit_pool >= 35) ++ wifi_duration_adjust = -10; ++ else ++ wifi_duration_adjust = 0; ++ } else if (coex_sta->scan_ap_num <= 40) { ++ if (coex_sta->a2dp_bit_pool >= 45) ++ wifi_duration_adjust = -15; ++ else if (coex_sta->a2dp_bit_pool >= 35) ++ wifi_duration_adjust = -10; ++ else ++ wifi_duration_adjust = -5; ++ } else { ++ if (coex_sta->a2dp_bit_pool >= 45) ++ wifi_duration_adjust = -15; ++ else if (coex_sta->a2dp_bit_pool >= 35) ++ wifi_duration_adjust = -10; ++ else ++ wifi_duration_adjust = -10; ++ } ++ ++ if ((bt_link_info->slave_role == true) && (bt_link_info->a2dp_exist)) ++ psTdmaByte4Modify = ++ 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */ ++ ++ ++ if (turn_on) { ++ switch (type) { ++ case 1: ++ default: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c + wifi_duration_adjust, 0x03, 0xf1, ++ 0x90 | psTdmaByte4Modify); ++ break; ++ case 2: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x2d + wifi_duration_adjust, 0x03, 0xf1, ++ 0x90 | psTdmaByte4Modify); ++ break; ++ case 3: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0xf1, 0x90 | ++ psTdmaByte4Modify); ++ break; ++ case 4: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x03, 0xf1, 0x90 | ++ psTdmaByte4Modify); ++ break; ++ case 5: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c + wifi_duration_adjust, 0x3, 0x70, ++ 0x90 | psTdmaByte4Modify); ++ break; ++ case 6: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x2d + wifi_duration_adjust, 0x3, 0x70, ++ 0x90 | psTdmaByte4Modify); ++ break; ++ case 7: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0x70, 0x90 | ++ psTdmaByte4Modify); ++ break; ++ case 8: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xa3, ++ 0x10, 0x3, 0x70, 0x90 | ++ psTdmaByte4Modify); ++ break; ++ case 9: ++ /* ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c + wifi_duration_adjust, 0x03, 0xf1, ++ 0x90 | psTdmaByte4Modify); ++ */ ++ /* Bryant Modify for BT no-profile busy case */ ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c + wifi_duration_adjust, 0x03, 0xf1, ++ 0x91); ++ ++ break; ++ case 10: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x2d + wifi_duration_adjust, 0x03, 0xf1, ++ 0x90 | psTdmaByte4Modify); ++ break; ++ case 11: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0xf1, 0x90 | ++ psTdmaByte4Modify); ++ break; ++ case 12: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x3, 0xf1, 0x90 | ++ psTdmaByte4Modify); ++ break; ++ case 13: ++ /* ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c + wifi_duration_adjust, 0x3, 0x70, ++ 0x90 | psTdmaByte4Modify); ++ */ ++ /* Bryant Modify for BT no-profile busy case */ ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c + wifi_duration_adjust, 0x3, 0x70, ++ 0x91); ++ break; ++ case 14: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x2d + wifi_duration_adjust, 0x3, 0x70, ++ 0x90 | psTdmaByte4Modify); ++ break; ++ case 15: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0x70, 0x90 | ++ psTdmaByte4Modify); ++ break; ++ case 16: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x3, 0x70, 0x90 | ++ psTdmaByte4Modify); ++ break; ++ case 17: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xa3, ++ 0x2f, 0x2f, 0x60, 0x90); ++ break; ++ case 18: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 22: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x35, 0x03, 0xf1, 0x90); ++ break; ++ case 23: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x35, 0x03, 0x71, 0x10); ++ break; ++ ++ case 33: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0xf1, 0x91); ++ ++ break; ++ case 71: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c + wifi_duration_adjust, 0x03, 0xf1, ++ 0x90); ++ break; ++ case 101: ++ case 105: ++ case 113: ++ case 171: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x3a + wifi_duration_adjust, 0x03, 0x70, ++ 0x50 | psTdmaByte4Modify); ++ break; ++ case 102: ++ case 106: ++ case 110: ++ case 114: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x2d + wifi_duration_adjust, 0x03, 0x70, ++ 0x50 | psTdmaByte4Modify); ++ break; ++ case 103: ++ case 107: ++ case 111: ++ case 115: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x1c, 0x03, 0x70, 0x50 | ++ psTdmaByte4Modify); ++ break; ++ case 104: ++ case 108: ++ case 112: ++ case 116: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x10, 0x03, 0x70, 0x50 | ++ psTdmaByte4Modify); ++ break; ++ case 109: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c, 0x03, 0xf1, 0x90 | ++ psTdmaByte4Modify); ++ break; ++ /* case 113: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c, 0x03, 0x70, 0x90 | ++ psTdmaByte4Modify); ++ break; */ ++ case 121: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x15, 0x03, 0x70, 0x90 | ++ psTdmaByte4Modify); ++ break; ++ case 122: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x35, 0x03, 0x71, 0x11); ++ break; ++ case 123: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x35, 0x03, 0x71, 0x10); ++ break; ++ case 133: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x1c, 0x3, 0x70, 0x51); ++ ++ break; ++ } ++ } else { ++ /* disable PS tdma */ ++ switch (type) { ++ case 0: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x40, 0x0); ++ break; ++ case 1: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x48, 0x0); ++ break; ++ default: ++ halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x40, 0x0); ++ break; ++ } ++ } ++ ++ /* update pre state */ ++ coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; ++ coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; ++} ++ ++void halbtc8723b2ant_ps_tdma_check_for_power_save_state( ++ IN struct btc_coexist *btcoexist, IN boolean new_ps_state) ++{ ++ u8 lps_mode = 0x0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode); ++ ++ if (lps_mode) { /* already under LPS state */ ++ if (new_ps_state) { ++ /* keep state under LPS, do nothing. */ ++ } else { ++ /* will leave LPS state, turn off psTdma first */ ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 1); ++ } ++ } else { /* NO PS state */ ++ if (new_ps_state) { ++ /* will enter LPS state, turn off psTdma first */ ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 1); ++ } else { ++ /* keep state under NO PS state, do nothing. */ ++ } ++ } ++} ++ ++void halbtc8723b2ant_power_save_state(IN struct btc_coexist *btcoexist, ++ IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ boolean low_pwr_disable = false; ++ ++ switch (ps_type) { ++ case BTC_PS_WIFI_NATIVE: ++ /* recover to original 32k low power setting */ ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ coex_sta->force_lps_on = false; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8723b2ant_ps_tdma_check_for_power_save_state( ++ btcoexist, true); ++ halbtc8723b2ant_lps_rpwm(btcoexist, NORMAL_EXEC, ++ lps_val, rpwm_val); ++ /* when coex force to enter LPS, do not enter 32k low power. */ ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ /* power save must executed before psTdma. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, ++ NULL); ++ coex_sta->force_lps_on = true; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8723b2ant_ps_tdma_check_for_power_save_state( ++ btcoexist, false); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ coex_sta->force_lps_on = false; ++ break; ++ default: ++ break; ++ } ++} ++ ++ ++void halbtc8723b2ant_coex_all_off(IN struct btc_coexist *btcoexist) ++{ ++ /* fw all off */ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ /* sw all off */ ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ /* hw all off */ ++ /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ /* force to reset coex mechanism */ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8723b2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6); ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0); ++ ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ coex_sta->pop_event_cnt = 0; ++ ++} ++ ++void halbtc8723b2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW, ++ prewifi_rssi_state1 = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ boolean wifi_connected = false; ++ boolean low_pwr_disable = true; ++ boolean scan = false, link = false, roam = false; ++ boolean wifi_busy = false; ++ ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state1, 2, ++ BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ if (coex_sta->bt_abnormal_scan) { ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 23); ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ } else if (scan || link || roam) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi link process + BT Inq/Page!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 7); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); ++ } else if (wifi_connected) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT Inq/Page!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 7); ++ ++ if (wifi_busy) ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); ++ else ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi no-link + BT Inq/Page!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ } ++ ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6); ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ /* ++ coex_dm->need_recover0x948 = true; ++ coex_dm->backup0x948 = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ ++ halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_AUX, false, false); ++ */ ++} ++ ++ ++void halbtc8723b2ant_action_wifi_link_process(IN struct btc_coexist *btcoexist) ++{ ++ u32 u32tmp; ++ u8 u8tmpa, u8tmpb; ++ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 15); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22); ++ ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765); ++ u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", ++ u32tmp, u8tmpa, u8tmpb); ++ BTC_TRACE(trace_buf); ++} ++ ++boolean halbtc8723b2ant_action_wifi_idle_process(IN struct btc_coexist ++ *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW, ++ prewifi_rssi_state1 = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u8 ap_num = 0; ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ /* wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-coex_dm->switch_thres_offset-coex_dm->switch_thres_offset, 0); */ ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state1, 2, ++ BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset - coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset - coex_dm->switch_thres_offset, 0); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num); ++ ++ /* define the office environment */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && ++ (coex_sta->hid_exist == true) && ++ (coex_sta->a2dp_exist == true)) { ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x6); ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ /* sw all off */ ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ ++ return true; ++ } else { ++ halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x18); ++ return false; ++ } ++ ++ ++} ++ ++ ++ ++boolean halbtc8723b2ant_is_common_action(IN struct btc_coexist *btcoexist) ++{ ++ boolean common = false, wifi_connected = false, wifi_busy = false; ++ boolean bt_hs_on = false, low_pwr_disable = false; ++ boolean asus_8723b = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (!wifi_connected) { ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non-connected idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x0); ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ ++ common = true; ++ } else { ++ if (BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, ++ false, false, 0x8); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x0); ++ halbtc8723b2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 1); ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 0xb); ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ ++ common = true; ++ } else if (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ if (bt_hs_on) ++ return false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, ++ false, false, 0x8); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x0); ++ halbtc8723b2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 1); ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 0xb); ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ ++ common = true; ++ } else { ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ if (wifi_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Busy + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ /* btcoexist->btc_get(btcoexist, ++ BTC_GET_BL_IS_ASUS_8723B, &asus_8723b); ++ if (!asus_8723b) ++ common = false; ++ else ++ common = halbtc8723b2ant_action_wifi_idle_process( ++ btcoexist); */ ++ common = false; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ /* common = false; */ ++ common = halbtc8723b2ant_action_wifi_idle_process( ++ btcoexist); ++ } ++ } ++ } ++ ++ return common; ++} ++void halbtc8723b2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist, ++ IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval) ++{ ++ static s32 up, dn, m, n, wait_count; ++ s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */ ++ u8 retry_count = 0; ++ ++ if (!coex_dm->auto_tdma_adjust) { ++ coex_dm->auto_tdma_adjust = true; ++ { ++ if (sco_hid) { ++ if (tx_pause) { ++ if (max_interval == 1) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 13); ++ coex_dm->ps_tdma_du_adj_type = ++ 13; ++ } else if (max_interval == 2) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (max_interval == 3) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } ++ } else { ++ if (max_interval == 1) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = ++ 9; ++ } else if (max_interval == 2) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (max_interval == 3) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } ++ } ++ } else { ++ if (tx_pause) { ++ if (max_interval == 1) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 5); ++ coex_dm->ps_tdma_du_adj_type = ++ 5; ++ } else if (max_interval == 2) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (max_interval == 3) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } ++ } else { ++ if (max_interval == 1) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (max_interval == 2) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (max_interval == 3) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } ++ } ++ } ++ } ++ /* ============ */ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } else { ++ /* accquire the BT TRx retry count from BT_Info byte2 */ ++ retry_count = coex_sta->bt_retry_cnt; ++ ++ if ((coex_sta->low_priority_tx) > 1050 || ++ (coex_sta->low_priority_rx) > 1250) ++ retry_count++; ++ ++ result = 0; ++ wait_count++; ++ ++ if (retry_count == ++ 0) { /* no retry in the last 2-second duration */ ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */ ++ wait_count = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ } ++ } else if (retry_count <= ++ 3) { /* <=3 retry in the last 2-second duration */ ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) {/* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */ ++ if (wait_count <= 2) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */ ++ if (wait_count == 1) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ ++ if (max_interval == 1) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 71) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 5); ++ coex_dm->ps_tdma_du_adj_type = 5; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 5); ++ coex_dm->ps_tdma_du_adj_type = 5; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 13); ++ coex_dm->ps_tdma_du_adj_type = 13; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 5); ++ coex_dm->ps_tdma_du_adj_type = ++ 5; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 13); ++ coex_dm->ps_tdma_du_adj_type = ++ 13; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 71); ++ coex_dm->ps_tdma_du_adj_type = 71; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 71) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 71); ++ coex_dm->ps_tdma_du_adj_type = ++ 71; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = ++ 9; ++ } ++ } ++ } ++ } else if (max_interval == 2) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } ++ } ++ } ++ } else if (max_interval == 3) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8723b2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8723b2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } ++ } ++ } ++ } ++ } ++ ++ /* if current PsTdma not match with the recorded one (when scan, dhcp...), */ ++ /* then we have to adjust it back to the previous record one. */ ++ if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) { ++ boolean scan = false, link = false, roam = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n", ++ coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (!scan && !link && !roam) ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ coex_dm->ps_tdma_du_adj_type); ++ else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } ++} ++ ++/* SCO only or SCO+PAN(HS) */ ++void halbtc8723b2ant_action_sco(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for SCO quality at 11b/g mode */ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ else /* for SCO quality & wifi performance balance at 11n mode */ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); /* for voice quality */ ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x4); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ true, 0x4); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x4); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ true, 0x4); ++ } ++ } ++} ++ ++ ++void halbtc8723b2ant_action_hid(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ else /* for HID quality & wifi performance balance at 11n mode */ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 9); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ else ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */ ++void halbtc8723b2ant_action_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW, ++ prewifi_rssi_state1 = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ u8 ap_num = 0; ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state1, 2, ++ BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num); ++ ++ /* define the office environment */ ++ if ((ap_num >= 10) && BTC_RSSI_HIGH(wifi_rssi_state1) && ++ BTC_RSSI_HIGH(bt_rssi_state)) { ++ /* dbg_print(" AP#>10(%d)\n", ap_num); */ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x0); ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x18); ++ } ++ return; ++ ++ } ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 13); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, false, ++ 1); ++ else ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 1); ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8723b2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW, ++ prewifi_rssi_state1 = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state1, 2, ++ BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 13); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 2); ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8723b2ant_action_pan_edr(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW, ++ prewifi_rssi_state1 = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state1, 2, ++ BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 10); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 13); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1); ++ else ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++ ++/* PAN(HS) only */ ++void halbtc8723b2ant_action_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW, ++ prewifi_rssi_state1 = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state1, 2, ++ BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* PAN(EDR)+A2DP */ ++void halbtc8723b2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW, ++ prewifi_rssi_state1 = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u8 ap_num = 0; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state1, 2, ++ BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ else ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, ++ &ap_num); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 12); ++ ++ if(ap_num < 10) ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 1); ++ else ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 3); ++ ++ } else { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 13); ++ if(ap_num < 10) ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 1); ++ else ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3); ++ } ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8723b2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW, ++ prewifi_rssi_state1 = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state1, 2, ++ BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 14); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 3); ++ /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11); */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x780); ++ } else { ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 6); ++ /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x0); ++ } ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 2); ++ } else { ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14); */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x0); ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 2); ++ } ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* HID+A2DP+PAN(EDR) */ ++void halbtc8723b2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW, ++ prewifi_rssi_state1 = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state1, 2, ++ BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 14); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, ++ true, 3); ++ else ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, ++ false, 3); ++ } else ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3); ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8723b2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW, ++ prewifi_rssi_state1 = BTC_RSSI_STATE_LOW; ++ static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW; ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ u8 ap_num = 0; ++ ++ wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state, 2, 15, 0); ++ /* bt_rssi_state = halbtc8723b2ant_bt_rssi_state(2, 29, 0); */ ++ wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, ++ &prewifi_rssi_state1, 2, ++ BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 0); ++ bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 3, ++ BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES - ++ coex_dm->switch_thres_offset, 37); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, ++ &ap_num); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x5); ++ ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) { ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ } else { ++ /* only 802.11N mode we have to dec bt power to 4 degree */ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) { ++ /* need to check ap Number of Not */ ++ if (ap_num < 10) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, ++ NORMAL_EXEC, 4); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, ++ NORMAL_EXEC, 2); ++ } else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ } ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 14); ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ if(BTC_RSSI_HIGH(bt_rssi_state)) { ++ if(ap_num < 10) ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 1); ++ else ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 3); ++ } else { ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 18); ++ btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38); ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808); ++ btcoexist->btc_write_4byte(btcoexist, 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, 0x434, 0x01010000); ++ ++ if(ap_num < 10) ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 1); ++ else ++ halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3); ++ } ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8723b2ant_action_bt_whck_test(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ /* sw all off */ ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8723b2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ /* sw all off */ ++ halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ /* hw all off */ ++ /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++} ++ ++void halbtc8723b2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ u8 algorithm = 0; ++ u32 num_of_wifi_link = 0; ++ u32 wifi_link_status = 0; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean miracast_plus_bt = false; ++ boolean scan = false, link = false, roam = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->under_ips) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is under IPS !!!\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->bt_whck_test) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is under WHCK TEST!!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_bt_whck_test(btcoexist); ++ return; ++ } ++ ++ algorithm = halbtc8723b2ant_action_algorithm(btcoexist); ++ if (coex_sta->c2h_bt_inquiry_page && ++ (BT_8723B_2ANT_COEX_ALGO_PANHS != algorithm)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is under inquiry/page scan !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_bt_inquiry(btcoexist); ++ return; ++ } else { ++ /* ++ if(coex_dm->need_recover0x948) ++ { ++ coex_dm->need_recover0x948 = false; ++ btcoexist->btc_write_4byte(btcoexist, 0x948, coex_dm->backup0x948); ++ } ++ */ ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (scan || link || roam) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], WiFi is under Link Process !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_wifi_link_process(btcoexist); ++ return; ++ } ++ ++ /* for P2P */ ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ ++ if ((num_of_wifi_link >= 2) || ++ (wifi_link_status & WIFI_P2P_GO_CONNECTED)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n", ++ num_of_wifi_link, wifi_link_status); ++ BTC_TRACE(trace_buf); ++ ++ if (bt_link_info->bt_link_exist) ++ miracast_plus_bt = true; ++ else ++ miracast_plus_bt = false; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ halbtc8723b2ant_action_wifi_multi_port(btcoexist); ++ ++ return; ++ } else { ++ miracast_plus_bt = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ } ++ ++ coex_dm->cur_algorithm = algorithm; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n", ++ coex_dm->cur_algorithm); ++ BTC_TRACE(trace_buf); ++ ++ if (halbtc8723b2ant_is_common_action(btcoexist)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant common.\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n", ++ coex_dm->pre_algorithm, coex_dm->cur_algorithm); ++ BTC_TRACE(trace_buf); ++ coex_dm->auto_tdma_adjust = false; ++ } ++ switch (coex_dm->cur_algorithm) { ++ case BT_8723B_2ANT_COEX_ALGO_SCO: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = SCO.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_sco(btcoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_hid(btcoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_a2dp(btcoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_a2dp_pan_hs(btcoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_pan_edr(btcoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HS mode.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_pan_hs(btcoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_pan_edr_a2dp(btcoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_pan_edr_hid(btcoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_hid_a2dp_pan_edr( ++ btcoexist); ++ break; ++ case BT_8723B_2ANT_COEX_ALGO_HID_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_action_hid_a2dp(btcoexist); ++ break; ++ default: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_coex_all_off(btcoexist); ++ break; ++ } ++ coex_dm->pre_algorithm = coex_dm->cur_algorithm; ++ } ++} ++ ++void halbtc8723b2ant_wifi_off_hw_cfg(IN struct btc_coexist *btcoexist) ++{ ++ boolean is_in_mp_mode = false; ++ u8 h2c_parameter[2] = {0}; ++ u32 fw_ver = 0; ++ ++ /* set wlan_act to low */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x780); /* WiFi goto standby while GNT_BT 0-->1 */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ if (fw_ver >= 0x180000) { ++ /* Use H2C to set GNT_BT to HIGH */ ++ h2c_parameter[0] = 1; ++ btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, h2c_parameter); ++ } else ++ btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, ++ &is_in_mp_mode); ++ if (!is_in_mp_mode) ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, ++ 0x0); /* BT select s0/s1 is controlled by BT */ ++ else ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, ++ 0x1); /* BT select s0/s1 is controlled by WiFi */ ++} ++ ++void halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean back_up) ++{ ++ u8 u8tmp = 0; ++ u32 vendor; ++ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 2Ant Init HW Config!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor); ++ if (vendor == BTC_VENDOR_LENOVO) ++ coex_dm->switch_thres_offset = 0; ++ else if (vendor == BTC_VENDOR_ASUS) ++ coex_dm->switch_thres_offset = 0; ++ else ++ coex_dm->switch_thres_offset = 20; ++ ++ /* 0xf0[15:12] --> Chip Cut information */ ++ coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist, ++ 0xf1) & 0xf0) >> 4; ++ ++ /* backup rf 0x1e value */ ++ coex_dm->bt_rf_0x1e_backup = ++ btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ /* 0x790[5:0]=0x5 */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); ++ u8tmp &= 0xc0; ++ u8tmp |= 0x5; ++ btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp); ++ ++ /* Antenna config */ ++ halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, true, ++ false); ++ coex_sta->dis_ver_info_cnt = 0; ++ ++ /* PTA parameter */ ++ halbtc8723b2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ ++ /* Enable counter statistics */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, ++ 0x4); /* 0x76e[3] =1, WLAN_Act control by PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1); ++} ++ ++/* ************************************************************ ++ * work around function start with wa_halbtc8723b2ant_ ++ * ************************************************************ ++ * ************************************************************ ++ * extern function start with ex_halbtc8723b2ant_ ++ * ************************************************************ */ ++void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ u16 u16tmp = 0x0; ++ u32 value = 0; ++ u32 u32tmp_1[4]; ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x67, 0x20); ++ ++ /* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */ ++ u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2); ++ btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1)); ++ DbgPrint("--- TEST 5 ---\n"); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0); ++ ++ if (btcoexist->chip_interface == BTC_INTF_USB) { ++ /* fixed at S0 for USB interface */ ++ board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT; ++ } else { ++ /* for PCIE and SDIO interface, we check efuse 0xc3[6] */ ++ if (board_info->single_ant_path == 0) { ++ /* set to S1 */ ++ board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; ++ } else if (board_info->single_ant_path == 1) { ++ /* set to S0 */ ++ board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT; ++ } ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_ANTPOSREGRISTRY_CTRL, ++ &value); ++ } ++} ++ ++void ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ u8 u8tmp = 0x4; /* Set BIT2 by default since it's 2ant case */ ++ ++ /* */ ++ /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */ ++ /* Local setting bit define */ ++ /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */ ++ /* BIT1: "0" for internal switch; "1" for external switch */ ++ /* BIT2: "0" for one antenna; "1" for two antenna */ ++ /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */ ++ if (btcoexist->chip_interface == BTC_INTF_USB) { ++ /* fixed at S0 for USB interface */ ++ u8tmp |= 0x1; /* antenna inverse */ ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp); ++ } else { ++ /* for PCIE and SDIO interface, we check efuse 0xc3[6] */ ++ if (board_info->single_ant_path == 0) { ++ } else if (board_info->single_ant_path == 1) { ++ /* set to S0 */ ++ u8tmp |= 0x1; /* antenna inverse */ ++ } ++ ++ if (btcoexist->chip_interface == BTC_INTF_PCI) ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0x384, ++ u8tmp); ++ else if (btcoexist->chip_interface == BTC_INTF_SDIO) ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60, ++ u8tmp); ++ } ++} ++ ++void ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only) ++{ ++ halbtc8723b2ant_init_hw_config(btcoexist, true); ++} ++ ++void ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Coex Mechanism Init!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8723b2ant_init_coex_dm(btcoexist); ++} ++ ++void ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ u8 *cli_buf = btcoexist->cli_buf; ++ u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; ++ u32 u32tmp[4]; ++ u32 fa_of_dm, fa_cck; ++ u32 fw_ver = 0, bt_patch_ver = 0; ++ static u8 pop_report_in_10s = 0; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cli_buf); ++ ++ if (btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "Ant PG number/ Ant mechanism:", ++ board_info->pg_ant_num, board_info->btdm_ant_num); ++ CL_PRINTF(cli_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)/ %c", ++ "Version Coex/ Fw/ Patch/ Cut", ++ glcoex_ver_date_8723b_2ant, glcoex_ver_8723b_2ant, fw_ver, ++ bt_patch_ver, bt_patch_ver, coex_sta->cut_version + 65); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", ++ "Wifi channel informed to BT", ++ coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1], ++ coex_dm->wifi_chnl_info[2]); ++ CL_PRINTF(cli_buf); ++ ++ /* wifi status */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Wifi Status]============"); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[BT Status]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Abnormal scan", ++ (coex_sta->bt_abnormal_scan) ? "Yes" : "No"); ++ CL_PRINTF(cli_buf); ++ ++ pop_report_in_10s++; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ", ++ "BT [status/ rssi/ retryCnt/ popCnt]", ++ ((coex_sta->bt_disabled) ? ("disabled") : (( ++ coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") ++ : ((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) ? "non-connected idle" : ++ ((BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status) ++ ? "connected-idle" : "busy")))), ++ coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt, ++ coex_sta->pop_event_cnt); ++ CL_PRINTF(cli_buf); ++ ++ if (pop_report_in_10s >= 5) { ++ coex_sta->pop_event_cnt = 0; ++ pop_report_in_10s = 0; ++ } ++ ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d / %d / %d / %d / %d / %d", ++ "SCO/HID/PAN/A2DP/NameReq/WHQL", ++ bt_link_info->sco_exist, bt_link_info->hid_exist, ++ bt_link_info->pan_exist, bt_link_info->a2dp_exist, ++ coex_sta->c2h_bt_remote_name_req, ++ coex_sta->bt_whck_test); ++ CL_PRINTF(cli_buf); ++ ++ { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Role", ++ (bt_link_info->slave_role) ? "Slave" : "Master"); ++ CL_PRINTF(cli_buf); ++ } ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", ++ "A2DP Rate/Bitpool", ++ (bt_info_ext & BIT(0)) ? "BR" : "EDR", coex_sta->a2dp_bit_pool); ++ CL_PRINTF(cli_buf); ++ ++ for (i = 0; i < BT_INFO_SRC_8723B_2ANT_MAX; i++) { ++ if (coex_sta->bt_info_c2h_cnt[i]) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", ++ glbt_info_src_8723b_2ant[i], ++ coex_sta->bt_info_c2h[i][0], ++ coex_sta->bt_info_c2h[i][1], ++ coex_sta->bt_info_c2h[i][2], ++ coex_sta->bt_info_c2h[i][3], ++ coex_sta->bt_info_c2h[i][4], ++ coex_sta->bt_info_c2h[i][5], ++ coex_sta->bt_info_c2h[i][6], ++ coex_sta->bt_info_c2h_cnt[i]); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ /* Sw mechanism */ ++ if (btcoexist->manual_control) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Sw mechanism] (before Manual)============"); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Sw mechanism]============"); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", ++ "SM1[ShRf/ LpRA/ LimDig]", ++ coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra, ++ coex_dm->limited_dig); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", ++ "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", ++ coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off, ++ coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl); ++ CL_PRINTF(cli_buf); ++ ++ /* Fw mechanism */ ++ if (btcoexist->manual_control) ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Fw mechanism] (before Manual) ============"); ++ else ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Fw mechanism]============"); ++ ++ ps_tdma_case = coex_dm->cur_ps_tdma; ++ ++ if (coex_dm->is_switch_to_1dot5_ant) ++ ps_tdma_case = ps_tdma_case + 100; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", ++ "PS TDMA", ++ coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1], ++ coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3], ++ coex_dm->ps_tdma_para[4], ps_tdma_case, ++ (coex_dm->cur_ps_tdma_on ? "On" : "Off"), ++ (coex_dm->auto_tdma_adjust ? "Adj" : "Fix")); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", ++ "Coex Table Type", ++ coex_sta->coex_table_type); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "DecBtPwr/ IgnWlanAct", ++ coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act); ++ CL_PRINTF(cli_buf); ++ ++ /* Hw setting */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Hw setting]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", ++ "RF-A, 0x1e initVal", ++ coex_dm->bt_rf_0x1e_backup); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x880); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x778/0x880[29:25]", ++ u8tmp[0], (u32tmp[0] & 0x3e000000) >> 25); ++ CL_PRINTF(cli_buf); ++ ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x67); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x765); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x948/ 0x67[5] / 0x765", ++ u32tmp[0], ((u8tmp[0] & 0x20) >> 5), u8tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x92c); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x930); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x944); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", ++ u32tmp[0] & 0x3, u32tmp[1] & 0xff, u32tmp[2] & 0x3); ++ CL_PRINTF(cli_buf); ++ ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x39); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x64); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", ++ "0x38[11]/0x40/0x4c[24:23]/0x64[0]", ++ ((u8tmp[0] & 0x8) >> 3), u8tmp[1], ++ ((u32tmp[0] & 0x01800000) >> 23), u8tmp[2] & 0x1); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x550(bcn ctrl)/0x522", ++ u32tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x49c); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0xc50(dig)/0x49c(null-drop)", ++ u32tmp[0] & 0xff, u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xda0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xda4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0xda8); ++ u32tmp[3] = btcoexist->btc_read_4byte(btcoexist, 0xcf0); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c); ++ ++ fa_of_dm = ((u32tmp[0] & 0xffff0000) >> 16) + ((u32tmp[1] & 0xffff0000) ++ >> 16) + (u32tmp[1] & 0xffff) + (u32tmp[2] & 0xffff) + \ ++ ((u32tmp[3] & 0xffff0000) >> 16) + (u32tmp[3] & ++ 0xffff) ; ++ fa_cck = (u8tmp[0] << 8) + u8tmp[1]; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "OFDM-CCA/OFDM-FA/CCK-FA", ++ u32tmp[0] & 0xffff, fa_of_dm, fa_cck); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", ++ "CRC_OK CCK/11g/11n/11n-Agg", ++ coex_sta->crc_ok_cck, coex_sta->crc_ok_11g, ++ coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_agg); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", ++ "CRC_Err CCK/11g/11n/11n-Agg", ++ coex_sta->crc_err_cck, coex_sta->crc_err_11g, ++ coex_sta->crc_err_11n, coex_sta->crc_err_11n_agg); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", ++ "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", ++ u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x770(high-pri rx/tx)", ++ coex_sta->high_priority_rx, coex_sta->high_priority_tx); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x774(low-pri rx/tx)", ++ coex_sta->low_priority_rx, coex_sta->low_priority_tx); ++ CL_PRINTF(cli_buf); ++#if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 1) ++ /* halbtc8723b2ant_monitor_bt_ctr(btcoexist); */ ++#endif ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++void ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (BTC_IPS_ENTER == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS ENTER notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = true; ++ halbtc8723b2ant_wifi_off_hw_cfg(btcoexist); ++ halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ halbtc8723b2ant_coex_all_off(btcoexist); ++ } else if (BTC_IPS_LEAVE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS LEAVE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = false; ++ halbtc8723b2ant_init_hw_config(btcoexist, false); ++ halbtc8723b2ant_init_coex_dm(btcoexist); ++ halbtc8723b2ant_query_bt_info(btcoexist); ++ } ++} ++ ++void ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (BTC_LPS_ENABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS ENABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = true; ++ } else if (BTC_LPS_DISABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS DISABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = false; ++ } ++} ++ ++void ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u32 u32tmp; ++ u8 u8tmpa, u8tmpb; ++ ++ ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948); ++ u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765); ++ u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e); ++ ++ if (BTC_SCAN_START == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN START notify\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE); ++ } else if (BTC_SCAN_FINISH == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, ++ &coex_sta->scan_ap_num); ++ } ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n", ++ u32tmp, u8tmpa, u8tmpb); ++ BTC_TRACE(trace_buf); ++} ++ ++void ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (BTC_ASSOCIATE_START == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT START notify\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE); ++ } else if (BTC_ASSOCIATE_FINISH == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u8 h2c_parameter[3] = {0}; ++ u32 wifi_bw; ++ u8 wifi_central_chnl; ++ u8 ap_num = 0; ++ ++ if (BTC_MEDIA_CONNECT == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA connect notify\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA disconnect notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ /* only 2.4G we need to inform bt the chnl mask */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ &wifi_central_chnl); ++ if ((BTC_MEDIA_CONNECT == type) && ++ (wifi_central_chnl <= 14)) { ++ h2c_parameter[0] = 0x1; ++ h2c_parameter[1] = wifi_central_chnl; ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ h2c_parameter[2] = 0x30; ++ else { ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, ++ &ap_num); ++ if (ap_num < 10) ++ h2c_parameter[2] = 0x30; ++ else ++ h2c_parameter[2] = 0x20; ++ } ++ } ++ ++ coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; ++ coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; ++ coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); ++} ++ ++void ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (type == BTC_PACKET_DHCP) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], DHCP Packet notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length) ++{ ++ u8 bt_info = 0; ++ u8 i, rsp_source = 0; ++ boolean bt_busy = false, limited_dig = false; ++ boolean wifi_connected = false; ++ ++ coex_sta->c2h_bt_info_req_sent = false; ++ ++ rsp_source = tmp_buf[0] & 0xf; ++ if (rsp_source >= BT_INFO_SRC_8723B_2ANT_MAX) ++ rsp_source = BT_INFO_SRC_8723B_2ANT_WIFI_FW; ++ coex_sta->bt_info_c2h_cnt[rsp_source]++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source, ++ length); ++ BTC_TRACE(trace_buf); ++ for (i = 0; i < length; i++) { ++ coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; ++ if (i == 1) ++ bt_info = tmp_buf[i]; ++ if (i == length - 1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ /* if 0xff, it means BT is under WHCK test */ ++ if (bt_info == 0xff) ++ coex_sta->bt_whck_test = true; ++ else ++ coex_sta->bt_whck_test = false; ++ ++ if (BT_INFO_SRC_8723B_2ANT_WIFI_FW != rsp_source) { ++ coex_sta->bt_retry_cnt = /* [3:0] */ ++ coex_sta->bt_info_c2h[rsp_source][2] & 0xf; ++ ++ if (coex_sta->bt_retry_cnt >= 1) ++ coex_sta->pop_event_cnt++; ++ ++ coex_sta->bt_rssi = ++ coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10; ++ ++ coex_sta->bt_info_ext = ++ coex_sta->bt_info_c2h[rsp_source][4]; ++ ++ if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ++ coex_sta->c2h_bt_remote_name_req = true; ++ else ++ coex_sta->c2h_bt_remote_name_req = false; ++ ++ if (coex_sta->bt_info_c2h[rsp_source][1] == 0x49) { ++ coex_sta->a2dp_bit_pool = ++ coex_sta->bt_info_c2h[rsp_source][6]; ++ } else ++ coex_sta->a2dp_bit_pool = 0; ++ ++ coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2] ++ & 0x40); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK, ++ &coex_sta->bt_tx_rx_mask); ++ if (coex_sta->bt_tx_rx_mask) { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, ++ 0x3c, 0x01); ++ } ++ ++ /* Here we need to resend some wifi info to BT */ ++ /* because bt is reset and loss of the info. */ ++ if ((coex_sta->bt_info_ext & BIT(1))) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (wifi_connected) ++ ex_halbtc8723b2ant_media_status_notify( ++ btcoexist, BTC_MEDIA_CONNECT); ++ else ++ ex_halbtc8723b2ant_media_status_notify( ++ btcoexist, BTC_MEDIA_DISCONNECT); ++ } ++ ++ if ((coex_sta->bt_info_ext & BIT(3))) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, ++ false); ++ } else { ++ /* BT already NOT ignore Wlan active, do nothing here. */ ++ } ++#if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0) ++ if ((coex_sta->bt_info_ext & BIT(4))) { ++ /* BT auto report already enabled, do nothing */ ++ } else ++ halbtc8723b2ant_bt_auto_report(btcoexist, FORCE_EXEC, ++ true); ++#endif ++ } ++ ++ /* check BIT2 first ==> check if bt is under inquiry or page scan */ ++ if (bt_info & BT_INFO_8723B_2ANT_B_INQ_PAGE) ++ coex_sta->c2h_bt_inquiry_page = true; ++ else ++ coex_sta->c2h_bt_inquiry_page = false; ++ ++ /* set link exist status */ ++ if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) { ++ coex_sta->bt_link_exist = false; ++ coex_sta->pan_exist = false; ++ coex_sta->a2dp_exist = false; ++ coex_sta->hid_exist = false; ++ coex_sta->sco_exist = false; ++ } else { /* connection exists */ ++ coex_sta->bt_link_exist = true; ++ if (bt_info & BT_INFO_8723B_2ANT_B_FTP) ++ coex_sta->pan_exist = true; ++ else ++ coex_sta->pan_exist = false; ++ if (bt_info & BT_INFO_8723B_2ANT_B_A2DP) ++ coex_sta->a2dp_exist = true; ++ else ++ coex_sta->a2dp_exist = false; ++ if (bt_info & BT_INFO_8723B_2ANT_B_HID) ++ coex_sta->hid_exist = true; ++ else ++ coex_sta->hid_exist = false; ++ if (bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO) ++ coex_sta->sco_exist = true; ++ else ++ coex_sta->sco_exist = false; ++ ++ if ((coex_sta->hid_exist == false) && ++ (coex_sta->c2h_bt_inquiry_page == false) && ++ (coex_sta->sco_exist == false)) { ++ if (coex_sta->high_priority_tx + ++ coex_sta->high_priority_rx >= 160) { ++ coex_sta->hid_exist = true; ++ bt_info = bt_info | 0x28; ++ } ++ } ++ } ++ ++ halbtc8723b2ant_update_bt_link_info(btcoexist); ++ ++ if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) { ++ coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info == ++ BT_INFO_8723B_2ANT_B_CONNECTION) { /* connection exists but no busy */ ++ coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if ((bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO) || ++ (bt_info & BT_INFO_8723B_2ANT_B_SCO_BUSY)) { ++ coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_SCO_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info & BT_INFO_8723B_2ANT_B_ACL_BUSY) { ++ coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_ACL_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_MAX; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if ((BT_8723B_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) { ++ bt_busy = true; ++ limited_dig = true; ++ } else { ++ bt_busy = false; ++ limited_dig = false; ++ } ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ coex_dm->limited_dig = limited_dig; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig); ++ ++ halbtc8723b2ant_run_coexist_mechanism(btcoexist); ++} ++ ++void ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8723b2ant_wifi_off_hw_cfg(btcoexist); ++ /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */ ++ /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 */ ++ halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ++ ex_halbtc8723b2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_WIFI_PNP_SLEEP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to SLEEP\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */ ++ /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */ ++ /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */ ++ coex_sta->under_ips = false; ++ coex_sta->under_lps = false; ++ } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to WAKE UP\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_init_hw_config(btcoexist, false); ++ halbtc8723b2ant_init_coex_dm(btcoexist); ++ halbtc8723b2ant_query_bt_info(btcoexist); ++ } ++} ++ ++void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ==========================Periodical===========================\n"); ++ BTC_TRACE(trace_buf); ++ if (coex_sta->dis_ver_info_cnt <= 5) { ++ coex_sta->dis_ver_info_cnt += 1; ++ if (coex_sta->dis_ver_info_cnt == 3) { ++ /* Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set GNT_BT control by PTA\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8723b2ant_set_ant_path(btcoexist, ++ BTC_ANT_WIFI_AT_MAIN, false, false); ++ } ++ } ++ ++#if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0) ++ halbtc8723b2ant_query_bt_info(btcoexist); ++ halbtc8723b2ant_monitor_bt_enable_disable(btcoexist); ++#else ++ halbtc8723b2ant_monitor_bt_ctr(btcoexist); ++ halbtc8723b2ant_monitor_wifi_ctr(btcoexist); ++ ++ /* for some BT speaker that Hi-Pri pkt appear begore start play, this will cause HID exist */ ++ if ((coex_sta->high_priority_tx + coex_sta->high_priority_rx < 50) && ++ (bt_link_info->hid_exist == true)) ++ bt_link_info->hid_exist = false; ++ ++ if (halbtc8723b2ant_is_wifi_status_changed(btcoexist) || ++ coex_dm->auto_tdma_adjust) ++ halbtc8723b2ant_run_coexist_mechanism(btcoexist); ++#endif ++} ++ ++#endif ++ ++#endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b2Ant.h +new file mode 100644 +index 0000000..4fe39b2 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8723b2Ant.h +@@ -0,0 +1,214 @@ ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8723B_SUPPORT == 1) ++/* ******************************************* ++ * The following is for 8723B 2Ant BT Co-exist definition ++ * ******************************************* */ ++#define BT_AUTO_REPORT_ONLY_8723B_2ANT 1 ++ ++ ++#define BT_INFO_8723B_2ANT_B_FTP BIT(7) ++#define BT_INFO_8723B_2ANT_B_A2DP BIT(6) ++#define BT_INFO_8723B_2ANT_B_HID BIT(5) ++#define BT_INFO_8723B_2ANT_B_SCO_BUSY BIT(4) ++#define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT(3) ++#define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT(2) ++#define BT_INFO_8723B_2ANT_B_SCO_ESCO BIT(1) ++#define BT_INFO_8723B_2ANT_B_CONNECTION BIT(0) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT 2 ++ ++ ++#define BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */ ++#define BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES 46 /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */ ++ ++enum bt_info_src_8723b_2ant { ++ BT_INFO_SRC_8723B_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8723B_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8723B_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8723B_2ANT_MAX ++}; ++ ++enum bt_8723b_2ant_bt_status { ++ BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8723B_2ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8723B_2ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8723B_2ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8723B_2ANT_BT_STATUS_MAX ++}; ++ ++enum bt_8723b_2ant_coex_algo { ++ BT_8723B_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8723B_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8723B_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8723B_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8723B_2ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8723B_2ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8723B_2ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8723B_2ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8723B_2ANT_COEX_ALGO_MAX = 0xb, ++}; ++ ++struct coex_dm_8723b_2ant { ++ /* fw mechanism */ ++ u8 pre_bt_dec_pwr_lvl; ++ u8 cur_bt_dec_pwr_lvl; ++ u8 pre_fw_dac_swing_lvl; ++ u8 cur_fw_dac_swing_lvl; ++ boolean cur_ignore_wlan_act; ++ boolean pre_ignore_wlan_act; ++ u8 pre_ps_tdma; ++ u8 cur_ps_tdma; ++ u8 ps_tdma_para[5]; ++ u8 ps_tdma_du_adj_type; ++ boolean reset_tdma_adjust; ++ boolean auto_tdma_adjust; ++ boolean pre_ps_tdma_on; ++ boolean cur_ps_tdma_on; ++ boolean pre_bt_auto_report; ++ boolean cur_bt_auto_report; ++ ++ /* sw mechanism */ ++ boolean pre_rf_rx_lpf_shrink; ++ boolean cur_rf_rx_lpf_shrink; ++ u32 bt_rf_0x1e_backup; ++ boolean pre_low_penalty_ra; ++ boolean cur_low_penalty_ra; ++ boolean pre_dac_swing_on; ++ u32 pre_dac_swing_lvl; ++ boolean cur_dac_swing_on; ++ u32 cur_dac_swing_lvl; ++ boolean pre_adc_back_off; ++ boolean cur_adc_back_off; ++ boolean pre_agc_table_en; ++ boolean cur_agc_table_en; ++ u32 pre_val0x6c0; ++ u32 cur_val0x6c0; ++ u32 pre_val0x6c4; ++ u32 cur_val0x6c4; ++ u32 pre_val0x6c8; ++ u32 cur_val0x6c8; ++ u8 pre_val0x6cc; ++ u8 cur_val0x6cc; ++ boolean limited_dig; ++ ++ /* algorithm related */ ++ u8 pre_algorithm; ++ u8 cur_algorithm; ++ u8 bt_status; ++ u8 wifi_chnl_info[3]; ++ ++ boolean need_recover0x948; ++ u32 backup0x948; ++ ++ u8 pre_lps; ++ u8 cur_lps; ++ u8 pre_rpwm; ++ u8 cur_rpwm; ++ ++ boolean is_switch_to_1dot5_ant; ++ u8 switch_thres_offset; ++}; ++ ++struct coex_sta_8723b_2ant { ++ boolean bt_disabled; ++ boolean bt_link_exist; ++ boolean sco_exist; ++ boolean a2dp_exist; ++ boolean hid_exist; ++ boolean pan_exist; ++ boolean bt_abnormal_scan; ++ boolean under_lps; ++ boolean under_ips; ++ u32 high_priority_tx; ++ u32 high_priority_rx; ++ u32 low_priority_tx; ++ u32 low_priority_rx; ++ u8 bt_rssi; ++ boolean bt_tx_rx_mask; ++ u8 pre_bt_rssi_state; ++ u8 pre_wifi_rssi_state[4]; ++ boolean c2h_bt_info_req_sent; ++ u8 bt_info_c2h[BT_INFO_SRC_8723B_2ANT_MAX][10]; ++ u32 bt_info_c2h_cnt[BT_INFO_SRC_8723B_2ANT_MAX]; ++ boolean bt_whck_test; ++ boolean c2h_bt_inquiry_page; ++ boolean c2h_bt_remote_name_req; ++ u8 bt_retry_cnt; ++ u8 bt_info_ext; ++ u32 pop_event_cnt; ++ u8 scan_ap_num; ++ ++ u32 crc_ok_cck; ++ u32 crc_ok_11g; ++ u32 crc_ok_11n; ++ u32 crc_ok_11n_agg; ++ ++ u32 crc_err_cck; ++ u32 crc_err_11g; ++ u32 crc_err_11n; ++ u32 crc_err_11n_agg; ++ ++ u8 coex_table_type; ++ boolean force_lps_on; ++ ++ u8 dis_ver_info_cnt; ++ ++ u8 a2dp_bit_pool; ++ u8 cut_version; ++}; ++ ++/* ******************************************* ++ * The following is interface which will notify coex module. ++ * ******************************************* */ ++void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only); ++void ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length); ++void ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state); ++void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist); ++void ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist *btcoexist); ++ ++#else ++#define ex_halbtc8723b2ant_power_on_setting(btcoexist) ++#define ex_halbtc8723b2ant_pre_load_firmware(btcoexist) ++#define ex_halbtc8723b2ant_init_hw_config(btcoexist, wifi_only) ++#define ex_halbtc8723b2ant_init_coex_dm(btcoexist) ++#define ex_halbtc8723b2ant_ips_notify(btcoexist, type) ++#define ex_halbtc8723b2ant_lps_notify(btcoexist, type) ++#define ex_halbtc8723b2ant_scan_notify(btcoexist, type) ++#define ex_halbtc8723b2ant_connect_notify(btcoexist, type) ++#define ex_halbtc8723b2ant_media_status_notify(btcoexist, type) ++#define ex_halbtc8723b2ant_specific_packet_notify(btcoexist, type) ++#define ex_halbtc8723b2ant_bt_info_notify(btcoexist, tmp_buf, length) ++#define ex_halbtc8723b2ant_halt_notify(btcoexist) ++#define ex_halbtc8723b2ant_pnp_notify(btcoexist, pnp_state) ++#define ex_halbtc8723b2ant_periodical(btcoexist) ++#define ex_halbtc8723b2ant_display_coex_info(btcoexist) ++ ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a1Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a1Ant.c +new file mode 100644 +index 0000000..e094caa +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a1Ant.c +@@ -0,0 +1,3457 @@ ++/* ************************************************************ ++ * Description: ++ * ++ * This file is for RTL8812A Co-exist mechanism ++ * ++ * History ++ * 2012/11/15 Cosa first check in. ++ * ++ * ************************************************************ */ ++ ++/* ************************************************************ ++ * include files ++ * ************************************************************ */ ++#include "Mp_Precomp.h" ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8812A_SUPPORT == 1) ++/* ************************************************************ ++ * Global variables, these are static variables ++ * ************************************************************ */ ++static u8 *trace_buf = &gl_btc_trace_buf[0]; ++static struct coex_dm_8812a_1ant glcoex_dm_8812a_1ant; ++static struct coex_dm_8812a_1ant *coex_dm = &glcoex_dm_8812a_1ant; ++static struct coex_sta_8812a_1ant glcoex_sta_8812a_1ant; ++static struct coex_sta_8812a_1ant *coex_sta = &glcoex_sta_8812a_1ant; ++ ++const char *const glbt_info_src_8812a_1ant[] = { ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u32 glcoex_ver_date_8812a_1ant = 20140708; ++u32 glcoex_ver_8812a_1ant = 0x52; ++ ++/* ************************************************************ ++ * local function proto type if needed ++ * ************************************************************ ++ * ************************************************************ ++ * local function start with halbtc8812a1ant_ ++ * ************************************************************ */ ++u8 halbtc8812a1ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1) ++{ ++ s32 bt_rssi = 0; ++ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; ++ ++ bt_rssi = coex_sta->bt_rssi; ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Rssi thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_bt_rssi_state; ++ } ++ ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (bt_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (bt_rssi < rssi_thresh1) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_bt_rssi_state = bt_rssi_state; ++ ++ return bt_rssi_state; ++} ++ ++u8 halbtc8812a1ant_wifi_rssi_state(IN struct btc_coexist *btcoexist, ++ IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1) ++{ ++ s32 wifi_rssi = 0; ++ u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi RSSI thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_wifi_rssi_state[index]; ++ } ++ ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (wifi_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (wifi_rssi < rssi_thresh1) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; ++ ++ return wifi_rssi_state; ++} ++ ++void halbtc8812a1ant_update_ra_mask(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 dis_rate_mask) ++{ ++ coex_dm->cur_ra_mask = dis_rate_mask; ++ ++ if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, ++ &coex_dm->cur_ra_mask); ++ coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; ++} ++ ++/* to check 0x430/0x434 is correct?? */ ++void halbtc8812a1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ boolean wifi_under_b_mode = false; ++ ++ coex_dm->cur_arfr_type = type; ++ ++ if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { ++ switch (coex_dm->cur_arfr_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_4byte(btcoexist, 0x430, ++ coex_dm->backup_arfr_cnt1); ++ btcoexist->btc_write_4byte(btcoexist, 0x434, ++ coex_dm->backup_arfr_cnt2); ++ break; ++ case 1: ++ btcoexist->btc_get(btcoexist, ++ BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x01010101); ++ } else { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; ++} ++ ++/* to check 0x42a ?? */ ++void halbtc8812a1ant_retry_limit(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_retry_limit_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_retry_limit_type != ++ coex_dm->cur_retry_limit_type)) { ++ switch (coex_dm->cur_retry_limit_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ coex_dm->backup_retry_limit); ++ break; ++ case 1: /* retry limit=8 */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; ++} ++ ++/* to check 0x456?? */ ++void halbtc8812a1ant_ampdu_max_time(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_ampdu_time_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) { ++ switch (coex_dm->cur_ampdu_time_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ coex_dm->backup_ampdu_max_time); ++ break; ++ case 1: /* AMPDU timw = 0x38 * 32us */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; ++} ++ ++void halbtc8812a1ant_limited_tx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type, ++ IN u8 retry_limit_type, IN u8 ampdu_time_type) ++{ ++ switch (ra_mask_type) { ++ case 0: /* normal mode */ ++ halbtc8812a1ant_update_ra_mask(btcoexist, force_exec, ++ 0x0); ++ break; ++ case 1: /* disable cck 1/2 */ ++ halbtc8812a1ant_update_ra_mask(btcoexist, force_exec, ++ 0x00000003); ++ break; ++ case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ ++ halbtc8812a1ant_update_ra_mask(btcoexist, force_exec, ++ 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8812a1ant_auto_rate_fallback_retry(btcoexist, force_exec, ++ arfr_type); ++ halbtc8812a1ant_retry_limit(btcoexist, force_exec, retry_limit_type); ++ halbtc8812a1ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type); ++} ++ ++void halbtc8812a1ant_limited_rx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rej_ap_agg_pkt, ++ IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size) ++{ ++ boolean reject_rx_agg = rej_ap_agg_pkt; ++ boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; ++ u8 rx_agg_size = agg_buf_size; ++ ++ /* ============================================ */ ++ /* Rx Aggregation related setting */ ++ /* ============================================ */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ &reject_rx_agg); ++ /* decide BT control aggregation buf size or not */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ &bt_ctrl_rx_agg_size); ++ /* aggregation buf size, only work when BT control Rx aggregation size. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); ++ /* real update aggregation setting */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++void halbtc8812a1ant_query_bt_info(IN struct btc_coexist *btcoexist) ++{ ++ u8 data_len = 3; ++ u8 buf[5] = {0}; ++ ++ if (!coex_sta->bt_disabled) { ++ if (!coex_sta->bt_info_query_cnt || ++ (coex_sta->bt_info_c2h_cnt[BT_INFO_SRC_8812A_1ANT_BT_RSP] ++ - coex_sta->bt_info_query_cnt) > 2) { ++ buf[0] = data_len; ++ buf[1] = 0x1; /* polling enable, 1=enable, 0=disable */ ++ buf[2] = 0x2; /* polling time in seconds */ ++ buf[3] = 0x1; /* auto report enable, 1=enable, 0=disable */ ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_CTRL_BT_INFO, ++ (void *)&buf[0]); ++ } ++ } ++ coex_sta->bt_info_query_cnt++; ++} ++ ++void halbtc8812a1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist) ++{ ++ u32 reg_hp_txrx, reg_lp_txrx, u32tmp; ++ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; ++ static u8 num_of_bt_counter_chk = 0; ++ ++ reg_hp_txrx = 0x770; ++ reg_lp_txrx = 0x774; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); ++ reg_hp_tx = u32tmp & MASKLWORD; ++ reg_hp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); ++ reg_lp_tx = u32tmp & MASKLWORD; ++ reg_lp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ coex_sta->high_priority_tx = reg_hp_tx; ++ coex_sta->high_priority_rx = reg_hp_rx; ++ coex_sta->low_priority_tx = reg_lp_tx; ++ coex_sta->low_priority_rx = reg_lp_rx; ++ ++ if ((coex_sta->low_priority_tx > 1150) && ++ (!coex_sta->c2h_bt_inquiry_page)) ++ coex_sta->pop_event_cnt++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", ++ reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx); ++ BTC_TRACE(trace_buf); ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); ++ ++ if ((reg_hp_tx == 0) && (reg_hp_rx == 0) && (reg_lp_tx == 0) && ++ (reg_lp_rx == 0)) { ++ num_of_bt_counter_chk++; ++ if (num_of_bt_counter_chk >= 3) { ++ halbtc8812a1ant_query_bt_info(btcoexist); ++ num_of_bt_counter_chk = 0; ++ } ++ } ++} ++ ++/* to check registers */ ++void halbtc8812a1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist) ++{ ++ s32 wifi_rssi = 0; ++ boolean wifi_busy = false, wifi_under_b_mode = false; ++ static u8 cck_lock_counter = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ ++ if (coex_sta->under_ips) { ++ coex_sta->crc_ok_cck = 0; ++ coex_sta->crc_ok_11g = 0; ++ coex_sta->crc_ok_11n = 0; ++ coex_sta->crc_ok_11n_agg = 0; ++ ++ coex_sta->crc_err_cck = 0; ++ coex_sta->crc_err_11g = 0; ++ coex_sta->crc_err_11n = 0; ++ coex_sta->crc_err_11n_agg = 0; ++ } else { ++ coex_sta->crc_ok_cck = btcoexist->btc_read_2byte(btcoexist, ++ 0xf04); ++ coex_sta->crc_ok_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf14); ++ coex_sta->crc_ok_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf10); ++ coex_sta->crc_ok_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xf40); ++ ++ coex_sta->crc_err_cck = btcoexist->btc_read_2byte(btcoexist, ++ 0xf06); ++ coex_sta->crc_err_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf16); ++ coex_sta->crc_err_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf12); ++ coex_sta->crc_err_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xf42); ++ } ++ ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xb58, 0x1, 0x1); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xb58, 0x1, 0x0); ++ ++ if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) { ++ if ((coex_dm->bt_status == BT_8812A_1ANT_BT_STATUS_ACL_BUSY) || ++ (coex_dm->bt_status == ++ BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY) || ++ (coex_dm->bt_status == ++ BT_8812A_1ANT_BT_STATUS_SCO_BUSY)) { ++ if (coex_sta->crc_ok_cck > (coex_sta->crc_ok_11g + ++ coex_sta->crc_ok_11n + ++ coex_sta->crc_ok_11n_agg)) { ++ if (cck_lock_counter < 5) ++ cck_lock_counter++; ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ } else { ++ if (cck_lock_counter > 0) ++ cck_lock_counter--; ++ } ++ ++ if (!coex_sta->pre_ccklock) { ++ ++ if (cck_lock_counter >= 5) ++ coex_sta->cck_lock = true; ++ else ++ coex_sta->cck_lock = false; ++ } else { ++ if (cck_lock_counter == 0) ++ coex_sta->cck_lock = false; ++ else ++ coex_sta->cck_lock = true; ++ } ++ ++ coex_sta->pre_ccklock = coex_sta->cck_lock; ++ ++ ++} ++ ++boolean halbtc8812a1ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist) ++{ ++ static boolean pre_wifi_busy = false, pre_under_4way = false, ++ pre_bt_hs_on = false; ++ boolean wifi_busy = false, under_4way = false, bt_hs_on = false; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ ++ if (wifi_connected) { ++ if (wifi_busy != pre_wifi_busy) { ++ pre_wifi_busy = wifi_busy; ++ return true; ++ } ++ if (under_4way != pre_under_4way) { ++ pre_under_4way = under_4way; ++ return true; ++ } ++ if (bt_hs_on != pre_bt_hs_on) { ++ pre_bt_hs_on = bt_hs_on; ++ return true; ++ } ++ } ++ ++ return false; ++} ++ ++void halbtc8812a1ant_update_bt_link_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ bt_link_info->bt_link_exist = coex_sta->bt_link_exist; ++ bt_link_info->sco_exist = coex_sta->sco_exist; ++ bt_link_info->a2dp_exist = coex_sta->a2dp_exist; ++ bt_link_info->pan_exist = coex_sta->pan_exist; ++ bt_link_info->hid_exist = coex_sta->hid_exist; ++ ++ /* work around for HS mode. */ ++ if (bt_hs_on) { ++ bt_link_info->pan_exist = true; ++ bt_link_info->bt_link_exist = true; ++ } ++ ++ /* check if Sco only */ ++ if (bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->sco_only = true; ++ else ++ bt_link_info->sco_only = false; ++ ++ /* check if A2dp only */ ++ if (!bt_link_info->sco_exist && ++ bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->a2dp_only = true; ++ else ++ bt_link_info->a2dp_only = false; ++ ++ /* check if Pan only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->pan_only = true; ++ else ++ bt_link_info->pan_only = false; ++ ++ /* check if Hid only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ bt_link_info->hid_exist) ++ bt_link_info->hid_only = true; ++ else ++ bt_link_info->hid_only = false; ++} ++ ++u8 halbtc8812a1ant_action_algorithm(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ u8 algorithm = BT_8812A_1ANT_COEX_ALGO_UNDEFINED; ++ u8 num_of_diff_profile = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ if (!bt_link_info->bt_link_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], No BT link exists!!!\n"); ++ BTC_TRACE(trace_buf); ++ return algorithm; ++ } ++ ++ if (bt_link_info->sco_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->hid_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->pan_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->a2dp_exist) ++ num_of_diff_profile++; ++ ++ if (num_of_diff_profile == 1) { ++ if (bt_link_info->sco_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; ++ } else { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_A2DP; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = PAN(HS) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = PAN(EDR) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 2) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID_A2DP; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_1ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile >= 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++void halbtc8812a1ant_set_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean enable_auto_report) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = 0; ++ ++ if (enable_auto_report) ++ h2c_parameter[0] |= BIT(0); ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); ++} ++ ++void halbtc8812a1ant_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable_auto_report) ++{ ++ coex_dm->cur_bt_auto_report = enable_auto_report; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) ++ return; ++ } ++ halbtc8812a1ant_set_bt_auto_report(btcoexist, ++ coex_dm->cur_bt_auto_report); ++ ++ coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; ++} ++ ++/* to check */ ++void halbtc8812a1ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist ++ *btcoexist, IN boolean low_penalty_ra) ++{ ++ u8 tmp_u1; ++ ++ tmp_u1 = btcoexist->btc_read_1byte(btcoexist, 0x4fd); ++ tmp_u1 |= BIT(0); ++ if (low_penalty_ra) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Tx rate adaptive, set low penalty!!\n"); ++ BTC_TRACE(trace_buf); ++ tmp_u1 &= ~BIT(2); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Tx rate adaptive, set normal!!\n"); ++ BTC_TRACE(trace_buf); ++ tmp_u1 |= BIT(2); ++ } ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x4fd, tmp_u1); ++} ++ ++void halbtc8812a1ant_low_penalty_ra(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean low_penalty_ra) ++{ ++ coex_dm->cur_low_penalty_ra = low_penalty_ra; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) ++ return; ++ } ++ halbtc8812a1ant_set_sw_penalty_tx_rate_adaptive(btcoexist, ++ coex_dm->cur_low_penalty_ra); ++ ++ coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; ++} ++ ++void halbtc8812a1ant_set_coex_table(IN struct btc_coexist *btcoexist, ++ IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); ++} ++ ++void halbtc8812a1ant_coex_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4, ++ IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ coex_dm->cur_val0x6c0 = val0x6c0; ++ coex_dm->cur_val0x6c4 = val0x6c4; ++ coex_dm->cur_val0x6c8 = val0x6c8; ++ coex_dm->cur_val0x6cc = val0x6cc; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && ++ (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && ++ (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && ++ (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) ++ return; ++ } ++ halbtc8812a1ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, ++ val0x6cc); ++ ++ coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; ++ coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; ++ coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; ++ coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; ++} ++ ++void halbtc8812a1ant_coex_table_with_type(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** CoexTable(%d) **********\n", type); ++ BTC_TRACE(trace_buf); ++ ++ coex_sta->coex_table_type = type; ++ ++ switch (type) { ++ case 0: ++ halbtc8812a1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8812a1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8812a1ant_coex_table(btcoexist, force_exec, ++ 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8812a1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8812a1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8812a1ant_coex_table(btcoexist, force_exec, ++ 0x5a5a5a5a, 0xaa5a5a5a, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8812a1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8812a1ant_coex_table(btcoexist, force_exec, ++ 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8812a1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean enable) ++{ ++ u8 data_len = 3; ++ u8 buf[5] = {0}; ++ ++ buf[0] = data_len; ++ buf[1] = 0x1; /* OP_Code */ ++ buf[2] = 0x1; /* OP_Code_Length */ ++ if (enable) ++ buf[3] = 0x1; /* OP_Code_Content */ ++ else ++ buf[3] = 0x0; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_CTRL_BT_COEX, ++ (void *)&buf[0]); ++} ++ ++void halbtc8812a1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable) ++{ ++ coex_dm->cur_ignore_wlan_act = enable; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_ignore_wlan_act == ++ coex_dm->cur_ignore_wlan_act) ++ return; ++ } ++ halbtc8812a1ant_set_fw_ignore_wlan_act(btcoexist, enable); ++ ++ coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; ++} ++ ++void halbtc8812a1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN u8 lps_val, IN u8 rpwm_val) ++{ ++ u8 lps = lps_val; ++ u8 rpwm = rpwm_val; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps); ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++void halbtc8812a1ant_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ coex_dm->cur_lps = lps_val; ++ coex_dm->cur_rpwm = rpwm_val; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_lps == coex_dm->cur_lps) && ++ (coex_dm->pre_rpwm == coex_dm->cur_rpwm)) ++ return; ++ } ++ halbtc8812a1ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val); ++ ++ coex_dm->pre_lps = coex_dm->cur_lps; ++ coex_dm->pre_rpwm = coex_dm->cur_rpwm; ++} ++ ++void halbtc8812a1ant_sw_mechanism(IN struct btc_coexist *btcoexist, ++ IN boolean low_penalty_ra) ++{ ++ halbtc8812a1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); ++} ++ ++/* to check force_exec */ ++void halbtc8812a1ant_set_ant_path(IN struct btc_coexist *btcoexist, ++ IN u8 ant_pos_type, IN boolean force_exec, IN boolean init_hwcfg, ++ IN boolean wifi_off) ++{ ++ u8 u8tmp = 0; ++ ++ coex_dm->cur_ant_pos_type = ant_pos_type; ++ ++ if (init_hwcfg) { ++ btcoexist->btc_write_1byte(btcoexist, 0xcb3, 0x77); ++ btcoexist->btc_write_4byte(btcoexist, 0x900, 0x00000400); ++ btcoexist->btc_write_1byte(btcoexist, 0x76d, 0x1); ++ } else if (wifi_off) { ++ btcoexist->btc_write_1byte(btcoexist, 0xcb3, 0x77); ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0xcb7); ++ u8tmp &= ~BIT(3); ++ u8tmp |= BIT(2); ++ btcoexist->btc_write_1byte(btcoexist, 0xcb7, u8tmp); ++ } ++ ++ if (force_exec || ++ (coex_dm->cur_ant_pos_type != coex_dm->pre_ant_pos_type)) { ++ /* ext switch setting */ ++ switch (ant_pos_type) { ++ case BTC_ANT_PATH_WIFI: ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, ++ 0xcb7); ++ u8tmp |= BIT(3); ++ u8tmp &= ~BIT(2); ++ btcoexist->btc_write_1byte(btcoexist, 0xcb7, ++ u8tmp); ++ break; ++ case BTC_ANT_PATH_BT: ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, ++ 0xcb7); ++ u8tmp &= ~BIT(3); ++ u8tmp |= BIT(2); ++ btcoexist->btc_write_1byte(btcoexist, 0xcb7, ++ u8tmp); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, ++ 0xcb7); ++ u8tmp |= BIT(3); ++ u8tmp &= ~BIT(2); ++ btcoexist->btc_write_1byte(btcoexist, 0xcb7, ++ u8tmp); ++ break; ++ } ++ } ++ ++ coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type; ++} ++ ++void halbtc8812a1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist, ++ IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5) ++{ ++ u8 h2c_parameter[5] = {0}; ++ u8 real_byte1 = byte1, real_byte5 = byte5; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ if (ap_enable) { ++ if (byte1 & BIT(4) && !(byte1 & BIT(5))) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], FW for 1Ant AP mode\n"); ++ BTC_TRACE(trace_buf); ++ real_byte1 &= ~BIT(4); ++ real_byte1 |= BIT(5); ++ ++ real_byte5 |= BIT(5); ++ real_byte5 &= ~BIT(6); ++ } ++ } ++ ++ h2c_parameter[0] = real_byte1; ++ h2c_parameter[1] = byte2; ++ h2c_parameter[2] = byte3; ++ h2c_parameter[3] = byte4; ++ h2c_parameter[4] = real_byte5; ++ ++ coex_dm->ps_tdma_para[0] = real_byte1; ++ coex_dm->ps_tdma_para[1] = byte2; ++ coex_dm->ps_tdma_para[2] = byte3; ++ coex_dm->ps_tdma_para[3] = byte4; ++ coex_dm->ps_tdma_para[4] = real_byte5; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); ++} ++ ++ ++void halbtc8812a1ant_ps_tdma(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean turn_on, IN u8 type) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_busy = false; ++ u8 rssi_adjust_val = 0; ++ u8 ps_tdma_byte4_val = 0x50, ps_tdma_byte0_val = 0x51, ++ ps_tdma_byte3_val = 0x10; ++ s8 wifi_duration_adjust = 0x0; ++ static boolean pre_wifi_busy = false; ++ ++ coex_dm->cur_ps_tdma_on = turn_on; ++ coex_dm->cur_ps_tdma = type; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (wifi_busy != pre_wifi_busy) { ++ force_exec = true; ++ pre_wifi_busy = wifi_busy; ++ } ++ ++ if (coex_dm->cur_ps_tdma_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** TDMA(on, %d) **********\n", ++ coex_dm->cur_ps_tdma); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** TDMA(off, %d) **********\n", ++ coex_dm->cur_ps_tdma); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && ++ (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) ++ return; ++ } ++ ++ if (coex_sta->scan_ap_num <= 5) ++ wifi_duration_adjust = 2; ++ else if (coex_sta->scan_ap_num >= 40) ++ wifi_duration_adjust = -15; ++ else if (coex_sta->scan_ap_num >= 20) ++ wifi_duration_adjust = -10; ++ ++ if (!coex_sta->force_lps_on) { /* only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 */ ++ ps_tdma_byte0_val = 0x61; /* no null-pkt */ ++ ps_tdma_byte3_val = 0x11; /* no tx-pause at BT-slot */ ++ ps_tdma_byte4_val = 0x10; /* 0x778 = d/1 toggle */ ++ } ++ ++ if ((type == 3) || (type == 13) || (type == 14)) { ++ ps_tdma_byte4_val = ps_tdma_byte4_val & ++ 0xbf; /* no dynamic slot for multi-profile */ ++ ++ if (!wifi_busy) ++ ps_tdma_byte4_val = ps_tdma_byte4_val | ++ 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */ ++ } ++ ++ if (bt_link_info->slave_role == true) ++ ps_tdma_byte4_val = ps_tdma_byte4_val | ++ 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */ ++ ++ if (turn_on) { ++ switch (type) { ++ default: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x1a, 0x1a, 0x0, ps_tdma_byte4_val); ++ break; ++ case 1: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x3a + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 2: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x2d + ++ wifi_duration_adjust, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 3: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x1d, 0x1d, 0x0, ps_tdma_byte4_val); ++ break; ++ case 4: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x15, 0x3, 0x14, 0x0); ++ break; ++ case 5: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x15, 0x3, 0x11, 0x11); ++ break; ++ case 6: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x20, 0x3, 0x11, 0x11); ++ break; ++ case 7: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xc, 0x5, 0x0, 0x0); ++ break; ++ case 8: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 9: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x3, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 10: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, ++ ps_tdma_byte0_val, 0x21, 0x03, ++ ps_tdma_byte3_val, ps_tdma_byte4_val); ++ break; ++ case 12: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x0a, 0x0a, 0x0, 0x50); ++ break; ++ case 13: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x12, 0x12, 0x0, ps_tdma_byte4_val); ++ break; ++ case 14: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x21, 0x3, 0x10, ps_tdma_byte4_val); ++ break; ++ case 15: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xa, 0x3, 0x8, 0x0); ++ break; ++ case 16: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x15, 0x3, 0x10, 0x0); ++ break; ++ case 18: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 20: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x3f, 0x03, 0x11, 0x10); ++ break; ++ case 21: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x25, 0x03, 0x11, 0x11); ++ break; ++ case 22: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x25, 0x03, 0x11, 0x10); ++ break; ++ case 23: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x3, 0x31, 0x18); ++ break; ++ case 24: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x15, 0x3, 0x31, 0x18); ++ break; ++ case 25: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 26: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0xa, 0x3, 0x31, 0x18); ++ break; ++ case 27: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x3, 0x31, 0x98); ++ break; ++ case 28: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x69, ++ 0x25, 0x3, 0x31, 0x0); ++ break; ++ case 29: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0xab, ++ 0x1a, 0x1a, 0x1, 0x10); ++ break; ++ case 30: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x30, 0x3, 0x10, 0x10); ++ break; ++ case 31: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x1a, 0x1a, 0, 0x58); ++ break; ++ case 32: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x35, 0x3, 0x11, 0x11); ++ break; ++ case 33: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0xa3, ++ 0x25, 0x3, 0x30, 0x90); ++ break; ++ case 34: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x53, ++ 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 35: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x63, ++ 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 36: ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x12, 0x3, 0x14, 0x50); ++ break; ++ case 40: /* SoftAP only with no sta associated,BT disable ,TDMA mode for power saving */ ++ /* here softap mode screen off will cost 70-80mA for phone */ ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x23, ++ 0x18, 0x00, 0x10, 0x24); ++ break; ++ } ++ } else { ++ ++ /* disable PS tdma */ ++ switch (type) { ++ case 8: /* PTA Control */ ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x8, ++ 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 0: ++ default: /* Software control, Antenna at BT side */ ++ halbtc8812a1ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x0, 0x0); ++ break; ++ } ++ } ++ rssi_adjust_val = 0; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssi_adjust_val); ++ ++ ++ /* update pre state */ ++ coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; ++ coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; ++} ++ ++boolean halbtc8812a1ant_is_common_action(IN struct btc_coexist *btcoexist) ++{ ++ boolean common = false, wifi_connected = false, wifi_busy = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (!wifi_connected && ++ BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* halbtc8812a1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (wifi_connected && ++ (BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* halbtc8812a1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (!wifi_connected && ++ (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* halbtc8812a1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (wifi_connected && ++ (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* halbtc8812a1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else if (!wifi_connected && ++ (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE != coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* halbtc8812a1ant_sw_mechanism(btcoexist, false); */ ++ ++ common = true; ++ } else { ++ if (wifi_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Busy + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ common = false; ++ } ++ ++ return common; ++} ++ ++ ++void halbtc8812a1ant_tdma_duration_adjust_for_acl(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ static s32 up, dn, m, n, wait_count; ++ s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */ ++ u8 retry_count = 0, bt_info_ext; ++ boolean wifi_busy = false; ++ ++ if (BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifi_status) ++ wifi_busy = true; ++ else ++ wifi_busy = false; ++ ++ if ((BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == ++ wifi_status) || ++ (BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifi_status) || ++ (BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT == ++ wifi_status)) { ++ if (coex_dm->cur_ps_tdma != 1 && ++ coex_dm->cur_ps_tdma != 2 && ++ coex_dm->cur_ps_tdma != 3 && ++ coex_dm->cur_ps_tdma != 9) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } ++ return; ++ } ++ ++ if (!coex_dm->auto_tdma_adjust) { ++ coex_dm->auto_tdma_adjust = true; ++ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ /* ============ */ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } else { ++ /* accquire the BT TRx retry count from BT_Info byte2 */ ++ retry_count = coex_sta->bt_retry_cnt; ++ bt_info_ext = coex_sta->bt_info_ext; ++ ++ if ((coex_sta->low_priority_tx) > 1150 || ++ (coex_sta->low_priority_rx) > 1250) ++ retry_count++; ++ ++ result = 0; ++ wait_count++; ++ ++ if (retry_count == ++ 0) { /* no retry in the last 2-second duration */ ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */ ++ wait_count = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ } ++ } else if (retry_count <= ++ 3) { /* <=3 retry in the last 2-second duration */ ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) { /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */ ++ if (wait_count <= 2) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */ ++ if (wait_count == 1) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ ++ if (result == -1) { ++ if ((BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(bt_info_ext)) && ++ ((coex_dm->cur_ps_tdma == 1) || ++ (coex_dm->cur_ps_tdma == 2))) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } ++ } else if (result == 1) { ++ if ((BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(bt_info_ext)) && ++ ((coex_dm->cur_ps_tdma == 1) || ++ (coex_dm->cur_ps_tdma == 2))) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = 1; ++ } ++ } else { /* no change */ ++ /* Bryant Modify ++ if(wifi_busy != pre_wifi_busy) ++ { ++ pre_wifi_busy = wifi_busy; ++ halbtc8812a1ant_ps_tdma(btcoexist, FORCE_EXEC, true, coex_dm->cur_ps_tdma); ++ } ++ */ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** TDMA(on, %d) **********\n", ++ coex_dm->cur_ps_tdma); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if (coex_dm->cur_ps_tdma != 1 && ++ coex_dm->cur_ps_tdma != 2 && ++ coex_dm->cur_ps_tdma != 9 && ++ coex_dm->cur_ps_tdma != 11) { ++ /* recover to previous adjust type */ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ coex_dm->ps_tdma_du_adj_type); ++ } ++ } ++} ++ ++void halbtc8812a1ant_ps_tdma_check_for_power_save_state( ++ IN struct btc_coexist *btcoexist, IN boolean new_ps_state) ++{ ++ u8 lps_mode = 0x0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode); ++ ++ if (lps_mode) { /* already under LPS state */ ++ if (new_ps_state) { ++ /* keep state under LPS, do nothing. */ ++ } else { ++ /* will leave LPS state, turn off psTdma first */ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ } ++ } else { /* NO PS state */ ++ if (new_ps_state) { ++ /* will enter LPS state, turn off psTdma first */ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ } else { ++ /* keep state under NO PS state, do nothing. */ ++ } ++ } ++} ++ ++void halbtc8812a1ant_power_save_state(IN struct btc_coexist *btcoexist, ++ IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ boolean low_pwr_disable = false; ++ ++ switch (ps_type) { ++ case BTC_PS_WIFI_NATIVE: ++ /* recover to original 32k low power setting */ ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ coex_sta->force_lps_on = false; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8812a1ant_ps_tdma_check_for_power_save_state( ++ btcoexist, true); ++ halbtc8812a1ant_lps_rpwm(btcoexist, NORMAL_EXEC, ++ lps_val, rpwm_val); ++ /* when coex force to enter LPS, do not enter 32k low power. */ ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ /* power save must executed before psTdma. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, ++ NULL); ++ coex_sta->force_lps_on = true; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8812a1ant_ps_tdma_check_for_power_save_state( ++ btcoexist, false); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ coex_sta->force_lps_on = false; ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8812a1ant_action_wifi_only(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8812a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ halbtc8812a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, FORCE_EXEC, ++ false, false); ++} ++ ++void halbtc8812a1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist) ++{ ++ static u32 bt_disable_cnt = 0; ++ boolean bt_active = true, bt_disabled = false; ++ ++ /* This function check if bt is disabled */ ++ ++ if (coex_sta->high_priority_tx == 0 && ++ coex_sta->high_priority_rx == 0 && ++ coex_sta->low_priority_tx == 0 && ++ coex_sta->low_priority_rx == 0) ++ bt_active = false; ++ if (coex_sta->high_priority_tx == 0xffff && ++ coex_sta->high_priority_rx == 0xffff && ++ coex_sta->low_priority_tx == 0xffff && ++ coex_sta->low_priority_rx == 0xffff) ++ bt_active = false; ++ if (bt_active) { ++ bt_disable_cnt = 0; ++ bt_disabled = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is enabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ bt_disable_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], bt all counters=0, %d times!!\n", ++ bt_disable_cnt); ++ BTC_TRACE(trace_buf); ++ if (bt_disable_cnt >= 2) { ++ bt_disabled = true; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is disabled !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a1ant_action_wifi_only(btcoexist); ++ } ++ } ++ if (coex_sta->bt_disabled != bt_disabled) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is from %s to %s!!\n", ++ (coex_sta->bt_disabled ? "disabled" : "enabled"), ++ (bt_disabled ? "disabled" : "enabled")); ++ BTC_TRACE(trace_buf); ++ coex_sta->bt_disabled = bt_disabled; ++ if (!bt_disabled) { ++ } else { ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ } ++ } ++} ++ ++/* ********************************************* ++ * ++ * Software Coex Mechanism start ++ * ++ * ********************************************* */ ++ ++/* SCO only or SCO+PAN(HS) */ ++ ++/* ++void halbtc8812a1ant_action_sco(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8812a1ant_sw_mechanism(btcoexist, true); ++} ++ ++ ++void halbtc8812a1ant_action_hid(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8812a1ant_sw_mechanism(btcoexist, true); ++} ++ ++ ++void halbtc8812a1ant_action_a2dp(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8812a1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8812a1ant_action_a2dp_pan_hs(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8812a1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8812a1ant_action_pan_edr(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8812a1ant_sw_mechanism(btcoexist, false); ++} ++ ++ ++void halbtc8812a1ant_action_pan_hs(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8812a1ant_sw_mechanism(btcoexist, false); ++} ++ ++ ++void halbtc8812a1ant_action_pan_edr_a2dp(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8812a1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8812a1ant_action_pan_edr_hid(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8812a1ant_sw_mechanism(btcoexist, true); ++} ++ ++ ++void halbtc8812a1ant_action_hid_a2dp_pan_edr(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8812a1ant_sw_mechanism(btcoexist, true); ++} ++ ++void halbtc8812a1ant_action_hid_a2dp(IN struct btc_coexist* btcoexist) ++{ ++ halbtc8812a1ant_sw_mechanism(btcoexist, true); ++} ++ ++*/ ++ ++/* ********************************************* ++ * ++ * Non-Software Coex Mechanism start ++ * ++ * ********************************************* */ ++void halbtc8812a1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, ++ false, false); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++} ++ ++void halbtc8812a1ant_action_hs(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++} ++ ++void halbtc8812a1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false, ap_enable = false, wifi_busy = false, ++ bt_busy = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ if ((!wifi_connected) && (!coex_sta->wifi_is_high_pri_task)) { ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ } else if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ /* SCO/HID/A2DP busy */ ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else if ((bt_link_info->pan_exist) || (wifi_busy)) { ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ } ++} ++ ++void halbtc8812a1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ /* tdma and coex table */ ++ ++ if (bt_link_info->sco_exist) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ } else { /* HID */ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ } ++} ++ ++void halbtc8812a1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ u8 bt_rssi_state; ++ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ bt_rssi_state = halbtc8812a1ant_bt_rssi_state(2, 28, 0); ++ ++ if ((coex_sta->low_priority_rx >= 950) && (!coex_sta->under_ips)) ++ bt_link_info->slave_role = true; ++ else ++ bt_link_info->slave_role = false; ++ ++ if (bt_link_info->hid_only) { /* HID */ ++ halbtc8812a1ant_action_bt_sco_hid_only_busy(btcoexist, ++ wifi_status); ++ coex_dm->auto_tdma_adjust = false; ++ return; ++ } else if (bt_link_info->a2dp_only) { /* A2DP */ ++ if (BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ halbtc8812a1ant_tdma_duration_adjust_for_acl(btcoexist, ++ wifi_status); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = true; ++ } ++ } else if (((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) || ++ (bt_link_info->hid_exist && bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { /* HID+A2DP */ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); ++ coex_dm->auto_tdma_adjust = false; ++ ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ } else if ((bt_link_info->pan_only) || (bt_link_info->hid_exist && ++ bt_link_info->pan_exist)) { /* PAN(OPP,FTP), HID+PAN(OPP,FTP) */ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ /* BT no-profile busy (0x9) */ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ coex_dm->auto_tdma_adjust = false; ++ } ++} ++ ++void halbtc8812a1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist) ++{ ++ /* power save state */ ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ halbtc8812a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, ++ false, false); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8812a1ant_action_wifi_not_connected_scan(IN struct btc_coexist ++ *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if (BT_8812A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ if (bt_link_info->a2dp_exist) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else if (bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 22); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 20); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } ++ } else if ((BT_8812A_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8812a1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } else { ++ /* Bryant Add */ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8812a1ant_action_wifi_not_connected_asso_auth( ++ IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4); ++ } else if (bt_link_info->pan_exist) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4); ++ } else { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 2); ++ } ++} ++ ++void halbtc8812a1ant_action_wifi_connected_scan(IN struct btc_coexist ++ *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if (BT_8812A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ if (bt_link_info->a2dp_exist) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else if (bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 22); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 20); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } ++ } else if ((BT_8812A_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8812a1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } else { ++ /* Bryant Add */ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8812a1ant_action_wifi_connected_specific_packet( ++ IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else if (bt_link_info->pan_exist) { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ NORMAL_EXEC, false, false); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8812a1ant_action_wifi_connected(IN struct btc_coexist *btcoexist) ++{ ++ boolean wifi_busy = false; ++ boolean scan = false, link = false, roam = false; ++ boolean under_4way = false, ap_enable = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ if (under_4way) { ++ halbtc8812a1ant_action_wifi_connected_specific_packet(btcoexist); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ if (scan || link || roam) { ++ if (scan) ++ halbtc8812a1ant_action_wifi_connected_scan(btcoexist); ++ else ++ halbtc8812a1ant_action_wifi_connected_specific_packet( ++ btcoexist); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ /* power save state */ ++ if (!ap_enable && ++ BT_8812A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status && ++ !btcoexist->bt_link_info.hid_only) { ++ if (btcoexist->bt_link_info.a2dp_only) { /* A2DP */ ++ if (!wifi_busy) ++ halbtc8812a1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else { /* busy */ ++ if (coex_sta->scan_ap_num >= ++ BT_8812A_1ANT_WIFI_NOISY_THRESH) /* no force LPS, no PS-TDMA, use pure TDMA */ ++ halbtc8812a1ant_power_save_state( ++ btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ else ++ halbtc8812a1ant_power_save_state( ++ btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ } else if ((coex_sta->pan_exist == false) && ++ (coex_sta->a2dp_exist == false) && ++ (coex_sta->hid_exist == false)) ++ halbtc8812a1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8812a1ant_power_save_state(btcoexist, ++ BTC_PS_LPS_ON, 0x50, 0x4); ++ } else ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ /* tdma and coex table */ ++ if (!wifi_busy) { ++ if (BT_8812A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ halbtc8812a1ant_action_wifi_connected_bt_acl_busy( ++ btcoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } else if ((BT_8812A_1ANT_BT_STATUS_SCO_BUSY == ++ coex_dm->bt_status) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8812a1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } else { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ halbtc8812a1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_PTA, NORMAL_EXEC, false, false); ++ if ((coex_sta->high_priority_tx) + ++ (coex_sta->high_priority_rx) <= 60) ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 2); ++ else ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 7); ++ } ++ } else { ++ if (BT_8812A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ halbtc8812a1ant_action_wifi_connected_bt_acl_busy( ++ btcoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } else if ((BT_8812A_1ANT_BT_STATUS_SCO_BUSY == ++ coex_dm->bt_status) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8812a1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } else { ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ halbtc8812a1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_PTA, NORMAL_EXEC, false, false); ++ if ((coex_sta->high_priority_tx) + ++ (coex_sta->high_priority_rx) <= 60) ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 2); ++ else ++ halbtc8812a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 7); ++ } ++ } ++} ++ ++void halbtc8812a1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ u8 algorithm = 0; ++ ++ algorithm = halbtc8812a1ant_action_algorithm(btcoexist); ++ coex_dm->cur_algorithm = algorithm; ++ ++ if (halbtc8812a1ant_is_common_action(btcoexist)) { ++ ++ } else { ++ switch (coex_dm->cur_algorithm) { ++ case BT_8812A_1ANT_COEX_ALGO_SCO: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = SCO.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8812a1ant_action_sco(btcoexist); */ ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8812a1ant_action_hid(btcoexist); */ ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8812a1ant_action_a2dp(btcoexist); */ ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = A2DP+PAN(HS).\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8812a1ant_action_a2dp_pan_hs(btcoexist); */ ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN(EDR).\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8812a1ant_action_pan_edr(btcoexist); */ ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HS mode.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8812a1ant_action_pan_hs(btcoexist); */ ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8812a1ant_action_pan_edr_a2dp(btcoexist); */ ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_PANEDR_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN(EDR)+HID.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8812a1ant_action_pan_edr_hid(btcoexist); */ ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID+A2DP+PAN.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8812a1ant_action_hid_a2dp_pan_edr(btcoexist); */ ++ break; ++ case BT_8812A_1ANT_COEX_ALGO_HID_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8812a1ant_action_hid_a2dp(btcoexist); */ ++ break; ++ default: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = coexist All Off!!\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8812a1ant_coex_all_off(btcoexist); */ ++ break; ++ } ++ coex_dm->pre_algorithm = coex_dm->cur_algorithm; ++ } ++} ++ ++void halbtc8812a1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false, bt_hs_on = false; ++ boolean increase_scan_dev_num = false; ++ boolean bt_ctrl_agg_buf_size = false; ++ boolean miracast_plus_bt = false; ++ u8 agg_buf_size = 5; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0, wifi_bw; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->under_ips) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is under IPS !!!\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if ((BT_8812A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) ++ increase_scan_dev_num = true; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, ++ &increase_scan_dev_num); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ ++ if ((num_of_wifi_link >= 2) || ++ (wifi_link_status & WIFI_P2P_GO_CONNECTED)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n", ++ num_of_wifi_link, wifi_link_status); ++ BTC_TRACE(trace_buf); ++ ++ if (bt_link_info->bt_link_exist) { ++ halbtc8812a1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, ++ 0, 1); ++ miracast_plus_bt = true; ++ } else { ++ halbtc8812a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, ++ 0, 0); ++ miracast_plus_bt = false; ++ } ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ halbtc8812a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ ++ if ((bt_link_info->a2dp_exist) && ++ (coex_sta->c2h_bt_inquiry_page)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], BT Is Inquirying\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a1ant_action_bt_inquiry(btcoexist); ++ } else ++ halbtc8812a1ant_action_wifi_multi_port(btcoexist); ++ ++ return; ++ } else { ++ miracast_plus_bt = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if ((bt_link_info->bt_link_exist) && (wifi_connected)) { ++ halbtc8812a1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, 0, 1); ++ ++ if (bt_link_info->sco_exist) ++ halbtc8812a1ant_limited_rx(btcoexist, NORMAL_EXEC, true, ++ false, 0x5); ++ else { ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ halbtc8812a1ant_limited_rx(btcoexist, NORMAL_EXEC, ++ false, true, 0x10); ++ else ++ halbtc8812a1ant_limited_rx(btcoexist, NORMAL_EXEC, ++ false, true, 0x8); ++ } ++ ++ halbtc8812a1ant_sw_mechanism(btcoexist, true); ++ halbtc8812a1ant_run_sw_coexist_mechanism( ++ btcoexist); /* just print debug message */ ++ } else { ++ halbtc8812a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ halbtc8812a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x5); ++ ++ halbtc8812a1ant_sw_mechanism(btcoexist, false); ++ halbtc8812a1ant_run_sw_coexist_mechanism( ++ btcoexist); /* //just print debug message */ ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], BT Is Inquirying\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8812a1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ ++ if (!wifi_connected) { ++ boolean scan = false, link = false, roam = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is non connected-idle !!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (scan || link || roam) { ++ if (scan) ++ halbtc8812a1ant_action_wifi_not_connected_scan( ++ btcoexist); ++ else ++ halbtc8812a1ant_action_wifi_not_connected_asso_auth( ++ btcoexist); ++ } else ++ halbtc8812a1ant_action_wifi_not_connected(btcoexist); ++ } else /* wifi LPS/Busy */ ++ halbtc8812a1ant_action_wifi_connected(btcoexist); ++} ++ ++void halbtc8812a1ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ /* force to reset coex mechanism */ ++ ++ /* sw all off */ ++ halbtc8812a1ant_sw_mechanism(btcoexist, false); ++ ++ /* halbtc8812a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); */ ++ /* halbtc8812a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); */ ++ ++ coex_sta->pop_event_cnt = 0; ++} ++ ++void halbtc8812a1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean back_up, IN boolean wifi_only) ++{ ++ u8 u8tmp = 0; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 1Ant Init HW Config!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* ant sw control to BT */ ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, FORCE_EXEC, ++ true, false); ++ ++ /* 0x790[5:0]=0x5 */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); ++ u8tmp &= 0xc0; ++ u8tmp |= 0x5; ++ btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp); ++ ++ /* PTA parameter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, 0xffff); ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, 0x55555555); ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, 0x55555555); ++ ++ /* coex parameters */ ++ btcoexist->btc_write_1byte(btcoexist, 0x778, 0x1); ++ ++ /* enable counter statistics */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); ++ ++ /* enable PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20); ++ ++ /* bt clock related */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x4); ++ u8tmp |= BIT(7); ++ btcoexist->btc_write_1byte(btcoexist, 0x4, u8tmp); ++ ++ /* bt clock related */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7); ++ u8tmp |= BIT(1); ++ btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp); ++} ++ ++/* ************************************************************ ++ * work around function start with wa_halbtc8812a1ant_ ++ * ************************************************************ ++ * ************************************************************ ++ * extern function start with ex_halbtc8812a1ant_ ++ * ************************************************************ */ ++void ex_halbtc8812a1ant_power_on_setting(IN struct btc_coexist *btcoexist) ++{ ++} ++ ++void ex_halbtc8812a1ant_pre_load_firmware(IN struct btc_coexist *btcoexist) ++{ ++} ++ ++void ex_halbtc8812a1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only) ++{ ++ halbtc8812a1ant_init_hw_config(btcoexist, true, wifi_only); ++ btcoexist->stop_coex_dm = false; ++} ++ ++void ex_halbtc8812a1ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Coex Mechanism Init!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->stop_coex_dm = false; ++ ++ halbtc8812a1ant_init_coex_dm(btcoexist); ++ ++ halbtc8812a1ant_query_bt_info(btcoexist); ++} ++ ++void ex_halbtc8812a1ant_display_coex_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ u8 *cli_buf = btcoexist->cli_buf; ++ u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; ++ u32 u32tmp[4]; ++ u32 fw_ver = 0, bt_patch_ver = 0; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cli_buf); ++ ++ if (btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ if (btcoexist->stop_coex_dm) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Coex is STOPPED]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "Ant PG number/ Ant mechanism:", ++ board_info->pg_ant_num, board_info->btdm_ant_num); ++ CL_PRINTF(cli_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", ++ "CoexVer/ FwVer/ PatchVer", ++ glcoex_ver_date_8812a_1ant, glcoex_ver_8812a_1ant, fw_ver, ++ bt_patch_ver, bt_patch_ver); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", ++ "Wifi channel informed to BT", ++ coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1], ++ coex_dm->wifi_chnl_info[2]); ++ CL_PRINTF(cli_buf); ++ ++ /* wifi status */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Wifi Status]============"); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[BT Status]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", ++ "BT [status/ rssi/ retryCnt]", ++ ((coex_sta->bt_disabled) ? ("disabled") : (( ++ coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") ++ : ((BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) ? "non-connected idle" : ++ ((BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status) ++ ? "connected-idle" : "busy")))), ++ coex_sta->bt_rssi, coex_sta->bt_retry_cnt); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", ++ "SCO/HID/PAN/A2DP", ++ bt_link_info->sco_exist, bt_link_info->hid_exist, ++ bt_link_info->pan_exist, bt_link_info->a2dp_exist); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Info A2DP rate", ++ (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate"); ++ CL_PRINTF(cli_buf); ++ ++ for (i = 0; i < BT_INFO_SRC_8812A_1ANT_MAX; i++) { ++ if (coex_sta->bt_info_c2h_cnt[i]) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", ++ glbt_info_src_8812a_1ant[i], ++ coex_sta->bt_info_c2h[i][0], ++ coex_sta->bt_info_c2h[i][1], ++ coex_sta->bt_info_c2h[i][2], ++ coex_sta->bt_info_c2h[i][3], ++ coex_sta->bt_info_c2h[i][4], ++ coex_sta->bt_info_c2h[i][5], ++ coex_sta->bt_info_c2h[i][6], ++ coex_sta->bt_info_c2h_cnt[i]); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ if (!btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[mechanisms]============"); ++ CL_PRINTF(cli_buf); ++ ++ ps_tdma_case = coex_dm->cur_ps_tdma; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", ++ "PS TDMA", ++ coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1], ++ coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3], ++ coex_dm->ps_tdma_para[4], ps_tdma_case); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", ++ "Latest error condition(should be 0)", ++ coex_dm->error_condition); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", ++ "IgnWlanAct", ++ coex_dm->cur_ignore_wlan_act); ++ CL_PRINTF(cli_buf); ++ } ++ ++ /* Hw setting */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Hw setting]============"); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778", ++ u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xcb3); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xcb7); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x900); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0xcb3/0xcb7/0x900", ++ u8tmp[0], u8tmp[1], u32tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", ++ u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x550(bcn ctrl)/0x522", ++ u32tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", ++ u32tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", ++ "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", ++ u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x770(hp rx[31:16]/tx[15:0])", ++ coex_sta->high_priority_rx, coex_sta->high_priority_tx); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x774(lp rx[31:16]/tx[15:0])", ++ coex_sta->low_priority_rx, coex_sta->low_priority_tx); ++ CL_PRINTF(cli_buf); ++ ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++ ++void ex_halbtc8812a1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (btcoexist->manual_control || btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_IPS_ENTER == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS ENTER notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = true; ++ ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, false, true); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ } else if (BTC_IPS_LEAVE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS LEAVE notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8812a1ant_init_hw_config(btcoexist, false, false); ++ halbtc8812a1ant_init_coex_dm(btcoexist); ++ halbtc8812a1ant_query_bt_info(btcoexist); ++ ++ coex_sta->under_ips = false; ++ } ++} ++ ++void ex_halbtc8812a1ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (btcoexist->manual_control || btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_LPS_ENABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS ENABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = true; ++ } else if (BTC_LPS_DISABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS DISABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = false; ++ } ++} ++ ++void ex_halbtc8812a1ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean wifi_connected = false, bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_SCAN_START == type) { ++ coex_sta->wifi_is_high_pri_task = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN START notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8812a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, ++ 8); /* Force antenna setup for no scan result issue */ ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ FORCE_EXEC, false, false); ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, ++ &coex_sta->scan_ap_num); ++ } ++ ++ if (coex_sta->bt_disabled) ++ return; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ halbtc8812a1ant_query_bt_info(btcoexist); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8812a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8812a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8812a1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8812a1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8812a1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_SCAN_START == type) { ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8812a1ant_action_wifi_not_connected_scan( ++ btcoexist); ++ else /* wifi is connected */ ++ halbtc8812a1ant_action_wifi_connected_scan(btcoexist); ++ } else if (BTC_SCAN_FINISH == type) { ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8812a1ant_action_wifi_not_connected(btcoexist); ++ else ++ halbtc8812a1ant_action_wifi_connected(btcoexist); ++ } ++} ++ ++void ex_halbtc8812a1ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean wifi_connected = false, bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_ASSOCIATE_START == type) { ++ coex_sta->wifi_is_high_pri_task = true; ++ halbtc8812a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, ++ 8); /* Force antenna setup for no scan result issue */ ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ FORCE_EXEC, false, false); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT START notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->arp_cnt = 0; ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ /* coex_dm->arp_cnt = 0; */ ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8812a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8812a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8812a1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8812a1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8812a1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_ASSOCIATE_START == type) ++ halbtc8812a1ant_action_wifi_not_connected_asso_auth(btcoexist); ++ else if (BTC_ASSOCIATE_FINISH == type) { ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8812a1ant_action_wifi_not_connected(btcoexist); ++ else ++ halbtc8812a1ant_action_wifi_connected(btcoexist); ++ } ++} ++ ++/* to check registers... */ ++void ex_halbtc8812a1ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u8 data_len = 5; ++ u8 buf[6] = {0}; ++ u8 h2c_parameter[3] = {0}; ++ u32 wifi_bw; ++ u8 wifi_central_chnl; ++ boolean wifi_under_b_mode = false; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_MEDIA_CONNECT == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA connect notify\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, ++ 8); /* Force antenna setup for no scan result issue */ ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, ++ FORCE_EXEC, false, false); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++#if 0 ++ /* Set CCK Tx/Rx high Pri except 11b mode */ ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, ++ 0x00); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, ++ 0x00); /* CCK Rx */ ++ } else { ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, ++ 0x10); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, ++ 0x10); /* CCK Rx */ ++ } ++#endif ++ coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, ++ 0x430); ++ coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, ++ 0x434); ++ coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( ++ btcoexist, 0x42a); ++ coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte( ++ btcoexist, 0x456); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA disconnect notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->arp_cnt = 0; ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x0); /* CCK Tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */ ++ } ++ ++ /* only 2.4G we need to inform bt the chnl mask */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ &wifi_central_chnl); ++ if ((BTC_MEDIA_CONNECT == type) && ++ (wifi_central_chnl <= 14)) { ++ /* h2c_parameter[0] = 0x1; */ ++ h2c_parameter[0] = 0x0; ++ h2c_parameter[1] = wifi_central_chnl; ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ h2c_parameter[2] = 0x30; ++ else ++ h2c_parameter[2] = 0x20; ++ } ++ ++ coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; ++ coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; ++ coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; ++ ++ buf[0] = data_len; ++ buf[1] = 0x5; /* OP_Code */ ++ buf[2] = 0x3; /* OP_Code_Length */ ++ buf[3] = h2c_parameter[0]; /* OP_Code_Content */ ++ buf[4] = h2c_parameter[1]; ++ buf[5] = h2c_parameter[2]; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_CTRL_BT_COEX, ++ (void *)&buf[0]); ++} ++ ++void ex_halbtc8812a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type) { ++ if (BTC_PACKET_ARP == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet ARP notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ coex_dm->arp_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ARP Packet Count = %d\n", ++ coex_dm->arp_cnt); ++ BTC_TRACE(trace_buf); ++ ++ if (coex_dm->arp_cnt >= ++ 10) /* if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecificPacket(btcoexist) */ ++ coex_sta->wifi_is_high_pri_task = false; ++ else ++ coex_sta->wifi_is_high_pri_task = true; ++ } else { ++ coex_sta->wifi_is_high_pri_task = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet DHCP or EAPOL notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet [Type = %d] notify\n", type); ++ BTC_TRACE(trace_buf); ++ } ++ ++ coex_sta->specific_pkt_period_cnt = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8812a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8812a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8812a1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8812a1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8812a1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ ((BTC_PACKET_ARP == type) && (coex_sta->wifi_is_high_pri_task))) ++ halbtc8812a1ant_action_wifi_connected_specific_packet(btcoexist); ++} ++ ++void ex_halbtc8812a1ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length) ++{ ++ u8 bt_info = 0; ++ u8 i, rsp_source = 0; ++ boolean wifi_connected = false; ++ boolean bt_busy = false; ++ ++ coex_sta->c2h_bt_info_req_sent = false; ++ ++ rsp_source = tmp_buf[0] & 0xf; ++ if (rsp_source >= BT_INFO_SRC_8812A_1ANT_MAX) ++ rsp_source = BT_INFO_SRC_8812A_1ANT_WIFI_FW; ++ coex_sta->bt_info_c2h_cnt[rsp_source]++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source, ++ length); ++ BTC_TRACE(trace_buf); ++ for (i = 0; i < length; i++) { ++ coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; ++ if (i == 1) ++ bt_info = tmp_buf[i]; ++ if (i == length - 1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ ++ if (BT_INFO_SRC_8812A_1ANT_WIFI_FW != rsp_source) { ++ coex_sta->bt_retry_cnt = /* [3:0] */ ++ coex_sta->bt_info_c2h[rsp_source][2] & 0xf; ++ ++ if (coex_sta->bt_retry_cnt >= 1) ++ coex_sta->pop_event_cnt++; ++ ++ if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ++ coex_sta->c2h_bt_page = true; ++ else ++ coex_sta->c2h_bt_page = false; ++ ++ coex_sta->bt_rssi = ++ coex_sta->bt_info_c2h[rsp_source][3] * 2 - 90; ++ /* coex_sta->bt_info_c2h[rsp_source][3]*2+10; */ ++ ++ coex_sta->bt_info_ext = ++ coex_sta->bt_info_c2h[rsp_source][4]; ++ ++ coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2] ++ & 0x40); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK, ++ &coex_sta->bt_tx_rx_mask); ++ if (!coex_sta->bt_tx_rx_mask) { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, ++ 0x3c, 0x15); ++ } ++ ++ /* Here we need to resend some wifi info to BT */ ++ /* because bt is reset and loss of the info. */ ++ if (coex_sta->bt_info_ext & BIT(1)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (wifi_connected) ++ ex_halbtc8812a1ant_media_status_notify( ++ btcoexist, BTC_MEDIA_CONNECT); ++ else ++ ex_halbtc8812a1ant_media_status_notify( ++ btcoexist, BTC_MEDIA_DISCONNECT); ++ } ++ ++ if (coex_sta->bt_info_ext & BIT(3)) { ++ if (!btcoexist->manual_control && ++ !btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a1ant_ignore_wlan_act(btcoexist, ++ FORCE_EXEC, false); ++ } ++ } else { ++ /* BT already NOT ignore Wlan active, do nothing here. */ ++ } ++#if (BT_AUTO_REPORT_ONLY_8812A_1ANT == 0) ++ if ((coex_sta->bt_info_ext & BIT(4))) { ++ /* BT auto report already enabled, do nothing */ ++ } else ++ halbtc8812a1ant_bt_auto_report(btcoexist, FORCE_EXEC, ++ true); ++#endif ++ } ++ ++ /* check BIT2 first ==> check if bt is under inquiry or page scan */ ++ if (bt_info & BT_INFO_8812A_1ANT_B_INQ_PAGE) ++ coex_sta->c2h_bt_inquiry_page = true; ++ else ++ coex_sta->c2h_bt_inquiry_page = false; ++ ++ /* set link exist status */ ++ if (!(bt_info & BT_INFO_8812A_1ANT_B_CONNECTION)) { ++ coex_sta->bt_link_exist = false; ++ coex_sta->pan_exist = false; ++ coex_sta->a2dp_exist = false; ++ coex_sta->hid_exist = false; ++ coex_sta->sco_exist = false; ++ } else { /* connection exists */ ++ coex_sta->bt_link_exist = true; ++ if (bt_info & BT_INFO_8812A_1ANT_B_FTP) ++ coex_sta->pan_exist = true; ++ else ++ coex_sta->pan_exist = false; ++ if (bt_info & BT_INFO_8812A_1ANT_B_A2DP) ++ coex_sta->a2dp_exist = true; ++ else ++ coex_sta->a2dp_exist = false; ++ if (bt_info & BT_INFO_8812A_1ANT_B_HID) ++ coex_sta->hid_exist = true; ++ else ++ coex_sta->hid_exist = false; ++ if (bt_info & BT_INFO_8812A_1ANT_B_SCO_ESCO) ++ coex_sta->sco_exist = true; ++ else ++ coex_sta->sco_exist = false; ++ } ++ ++ halbtc8812a1ant_update_bt_link_info(btcoexist); ++ ++ bt_info = bt_info & ++ 0x1f; /* mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) */ ++ ++ if (!(bt_info & BT_INFO_8812A_1ANT_B_CONNECTION)) { ++ coex_dm->bt_status = BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info == ++ BT_INFO_8812A_1ANT_B_CONNECTION) { /* connection exists but no busy */ ++ coex_dm->bt_status = BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if ((bt_info & BT_INFO_8812A_1ANT_B_SCO_ESCO) || ++ (bt_info & BT_INFO_8812A_1ANT_B_SCO_BUSY)) { ++ coex_dm->bt_status = BT_8812A_1ANT_BT_STATUS_SCO_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info & BT_INFO_8812A_1ANT_B_ACL_BUSY) { ++ if (BT_8812A_1ANT_BT_STATUS_ACL_BUSY != coex_dm->bt_status) ++ coex_dm->auto_tdma_adjust = false; ++ coex_dm->bt_status = BT_8812A_1ANT_BT_STATUS_ACL_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ coex_dm->bt_status = BT_8812A_1ANT_BT_STATUS_MAX; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if ((BT_8812A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8812A_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) ++ bt_busy = true; ++ else ++ bt_busy = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ halbtc8812a1ant_run_coexist_mechanism(btcoexist); ++} ++ ++void ex_halbtc8812a1ant_rf_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], RF Status notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_RF_ON == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RF is turned ON!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->stop_coex_dm = false; ++ } else if (BTC_RF_OFF == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RF is turned OFF!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8812a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, false, true); ++ ++ halbtc8812a1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ btcoexist->stop_coex_dm = true; ++ } ++} ++ ++void ex_halbtc8812a1ant_halt_notify(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8812a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, FORCE_EXEC, ++ false, true); ++ ++ halbtc8812a1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ++ ex_halbtc8812a1ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); ++ ++ btcoexist->stop_coex_dm = true; ++} ++ ++void ex_halbtc8812a1ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_WIFI_PNP_SLEEP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to SLEEP\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8812a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ halbtc8812a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, ++ FORCE_EXEC, false, true); ++ halbtc8812a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ ++ /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */ ++ /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */ ++ /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */ ++ coex_sta->under_ips = false; ++ coex_sta->under_lps = false; ++ btcoexist->stop_coex_dm = true; ++ } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to WAKE UP\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->stop_coex_dm = false; ++ halbtc8812a1ant_init_hw_config(btcoexist, false, false); ++ halbtc8812a1ant_init_coex_dm(btcoexist); ++ halbtc8812a1ant_query_bt_info(btcoexist); ++ } ++} ++ ++void ex_halbtc8812a1ant_coex_dm_reset(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], *****************Coex DM Reset*****************\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8812a1ant_init_hw_config(btcoexist, false, false); ++ halbtc8812a1ant_init_coex_dm(btcoexist); ++} ++ ++void ex_halbtc8812a1ant_periodical(IN struct btc_coexist *btcoexist) ++{ ++#if (BT_AUTO_REPORT_ONLY_8812A_1ANT == 0) ++ halbtc8812a1ant_query_bt_info(btcoexist); ++ halbtc8812a1ant_monitor_bt_enable_disable(btcoexist); ++#else ++ halbtc8812a1ant_monitor_bt_ctr(btcoexist); ++ halbtc8812a1ant_monitor_wifi_ctr(btcoexist); ++ ++ if (halbtc8812a1ant_is_wifi_status_changed(btcoexist) || ++ coex_dm->auto_tdma_adjust) ++ halbtc8812a1ant_run_coexist_mechanism(btcoexist); ++ ++ coex_sta->specific_pkt_period_cnt++; ++#endif ++} ++ ++void ex_halbtc8812a1ant_dbg_control(IN struct btc_coexist *btcoexist, ++ IN u8 op_code, IN u8 op_len, IN u8 *pdata) ++{ ++ switch (op_code) { ++ case BTC_DBG_SET_COEX_NORMAL: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set CoexMode to Normal\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->manual_control = false; ++ halbtc8812a1ant_init_coex_dm(btcoexist); ++ break; ++ case BTC_DBG_SET_COEX_WIFI_ONLY: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set CoexMode to Wifi Only\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->manual_control = true; ++ halbtc8812a1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 9); ++ break; ++ case BTC_DBG_SET_COEX_BT_ONLY: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set CoexMode to BT only\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->manual_control = true; ++ halbtc8812a1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8812a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ break; ++ case BTC_DBG_SET_COEX_DEC_BT_PWR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set Dec BT power\n"); ++ BTC_TRACE(trace_buf); ++ { ++ u8 data_len = 4; ++ u8 buf[6] = {0}; ++ u8 dec_bt_pwr = 0, pwr_level = 0; ++ if (op_len == 2) { ++ dec_bt_pwr = pdata[0]; ++ pwr_level = pdata[1]; ++ ++ buf[0] = data_len; ++ buf[1] = 0x3; /* OP_Code */ ++ buf[2] = 0x2; /* OP_Code_Length */ ++ ++ buf[3] = dec_bt_pwr; /* OP_Code_Content */ ++ buf[4] = pwr_level; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set Dec BT power=%d, pwr_level=%d\n", ++ dec_bt_pwr, pwr_level); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_CTRL_BT_COEX, ++ (void *)&buf[0]); ++ } ++ } ++ break; ++ ++ case BTC_DBG_SET_COEX_BT_AFH_MAP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set BT AFH Map\n"); ++ BTC_TRACE(trace_buf); ++ { ++ u8 data_len = 5; ++ u8 buf[6] = {0}; ++ if (op_len == 3) { ++ buf[0] = data_len; ++ buf[1] = 0x5; /* OP_Code */ ++ buf[2] = 0x3; /* OP_Code_Length */ ++ ++ buf[3] = pdata[0]; /* OP_Code_Content */ ++ buf[4] = pdata[1]; ++ buf[5] = pdata[2]; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set BT AFH Map = %02x %02x %02x\n", ++ pdata[0], pdata[1], pdata[2]); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_CTRL_BT_COEX, ++ (void *)&buf[0]); ++ } ++ } ++ break; ++ ++ case BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set BT Ignore Wlan Active\n"); ++ BTC_TRACE(trace_buf); ++ { ++ u8 data_len = 3; ++ u8 buf[6] = {0}; ++ if (op_len == 1) { ++ buf[0] = data_len; ++ buf[1] = 0x1; /* OP_Code */ ++ buf[2] = 0x1; /* OP_Code_Length */ ++ ++ buf[3] = pdata[0]; /* OP_Code_Content */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set BT Ignore Wlan Active = 0x%x\n", ++ pdata[0]); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_CTRL_BT_COEX, ++ (void *)&buf[0]); ++ } ++ } ++ break; ++ default: ++ break; ++ } ++} ++ ++#endif ++ ++#endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */ +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a1Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a1Ant.h +new file mode 100644 +index 0000000..e786d37 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a1Ant.h +@@ -0,0 +1,230 @@ ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8812A_SUPPORT == 1) ++ ++/* ******************************************* ++ * The following is for 8812A 1ANT BT Co-exist definition ++ * ******************************************* */ ++#define BT_AUTO_REPORT_ONLY_8812A_1ANT 1 ++ ++#define BT_INFO_8812A_1ANT_B_FTP BIT(7) ++#define BT_INFO_8812A_1ANT_B_A2DP BIT(6) ++#define BT_INFO_8812A_1ANT_B_HID BIT(5) ++#define BT_INFO_8812A_1ANT_B_SCO_BUSY BIT(4) ++#define BT_INFO_8812A_1ANT_B_ACL_BUSY BIT(3) ++#define BT_INFO_8812A_1ANT_B_INQ_PAGE BIT(2) ++#define BT_INFO_8812A_1ANT_B_SCO_ESCO BIT(1) ++#define BT_INFO_8812A_1ANT_B_CONNECTION BIT(0) ++ ++#define BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT(0))) ? true : false) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT 2 ++ ++#define BT_8812A_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */ ++ ++enum bt_info_src_8812a_1ant { ++ BT_INFO_SRC_8812A_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8812A_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8812A_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8812A_1ANT_MAX ++}; ++ ++enum bt_8812a_1ant_bt_status { ++ BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8812A_1ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8812A_1ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8812A_1ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8812A_1ANT_BT_STATUS_MAX ++}; ++ ++enum bt_8812a_1ant_wifi_status { ++ BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, ++ BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, ++ BT_8812A_1ANT_WIFI_STATUS_MAX ++}; ++ ++enum bt_8812a_1ant_coex_algo { ++ BT_8812A_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8812A_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8812A_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8812A_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8812A_1ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8812A_1ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8812A_1ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8812A_1ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8812A_1ANT_COEX_ALGO_MAX = 0xb, ++}; ++ ++struct coex_dm_8812a_1ant { ++ /* hw setting */ ++ u8 pre_ant_pos_type; ++ u8 cur_ant_pos_type; ++ /* fw mechanism */ ++ boolean cur_ignore_wlan_act; ++ boolean pre_ignore_wlan_act; ++ u8 pre_ps_tdma; ++ u8 cur_ps_tdma; ++ u8 ps_tdma_para[5]; ++ u8 ps_tdma_du_adj_type; ++ boolean auto_tdma_adjust; ++ boolean pre_ps_tdma_on; ++ boolean cur_ps_tdma_on; ++ boolean pre_bt_auto_report; ++ boolean cur_bt_auto_report; ++ u8 pre_lps; ++ u8 cur_lps; ++ u8 pre_rpwm; ++ u8 cur_rpwm; ++ ++ /* sw mechanism */ ++ boolean pre_low_penalty_ra; ++ boolean cur_low_penalty_ra; ++ u32 pre_val0x6c0; ++ u32 cur_val0x6c0; ++ u32 pre_val0x6c4; ++ u32 cur_val0x6c4; ++ u32 pre_val0x6c8; ++ u32 cur_val0x6c8; ++ u8 pre_val0x6cc; ++ u8 cur_val0x6cc; ++ boolean limited_dig; ++ ++ u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */ ++ u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */ ++ u16 backup_retry_limit; ++ u8 backup_ampdu_max_time; ++ ++ /* algorithm related */ ++ u8 pre_algorithm; ++ u8 cur_algorithm; ++ u8 bt_status; ++ u8 wifi_chnl_info[3]; ++ ++ u32 pre_ra_mask; ++ u32 cur_ra_mask; ++ u8 pre_arfr_type; ++ u8 cur_arfr_type; ++ u8 pre_retry_limit_type; ++ u8 cur_retry_limit_type; ++ u8 pre_ampdu_time_type; ++ u8 cur_ampdu_time_type; ++ u32 arp_cnt; ++ ++ u8 error_condition; ++}; ++ ++struct coex_sta_8812a_1ant { ++ boolean bt_disabled; ++ boolean bt_link_exist; ++ boolean sco_exist; ++ boolean a2dp_exist; ++ boolean hid_exist; ++ boolean pan_exist; ++ ++ boolean under_lps; ++ boolean under_ips; ++ u32 specific_pkt_period_cnt; ++ u32 high_priority_tx; ++ u32 high_priority_rx; ++ u32 low_priority_tx; ++ u32 low_priority_rx; ++ s8 bt_rssi; ++ boolean bt_tx_rx_mask; ++ u8 pre_bt_rssi_state; ++ u8 pre_wifi_rssi_state[4]; ++ boolean c2h_bt_info_req_sent; ++ u8 bt_info_c2h[BT_INFO_SRC_8812A_1ANT_MAX][10]; ++ u32 bt_info_c2h_cnt[BT_INFO_SRC_8812A_1ANT_MAX]; ++ u32 bt_info_query_cnt; ++ boolean c2h_bt_inquiry_page; ++ boolean c2h_bt_page; /* Add for win8.1 page out issue */ ++ boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */ ++ u8 bt_retry_cnt; ++ u8 bt_info_ext; ++ u32 pop_event_cnt; ++ u8 scan_ap_num; ++ ++ u32 crc_ok_cck; ++ u32 crc_ok_11g; ++ u32 crc_ok_11n; ++ u32 crc_ok_11n_agg; ++ ++ u32 crc_err_cck; ++ u32 crc_err_11g; ++ u32 crc_err_11n; ++ u32 crc_err_11n_agg; ++ ++ boolean cck_lock; ++ boolean pre_ccklock; ++ u8 coex_table_type; ++ ++ boolean force_lps_on; ++}; ++ ++/* ******************************************* ++ * The following is interface which will notify coex module. ++ * ******************************************* */ ++void ex_halbtc8812a1ant_power_on_setting(IN struct btc_coexist *btcoexist); ++void ex_halbtc8812a1ant_pre_load_firmware(IN struct btc_coexist *btcoexist); ++void ex_halbtc8812a1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only); ++void ex_halbtc8812a1ant_init_coex_dm(IN struct btc_coexist *btcoexist); ++void ex_halbtc8812a1ant_ips_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a1ant_lps_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a1ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a1ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a1ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a1ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length); ++void ex_halbtc8812a1ant_rf_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a1ant_halt_notify(IN struct btc_coexist *btcoexist); ++void ex_halbtc8812a1ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state); ++void ex_halbtc8812a1ant_coex_dm_reset(IN struct btc_coexist *btcoexist); ++void ex_halbtc8812a1ant_periodical(IN struct btc_coexist *btcoexist); ++void ex_halbtc8812a1ant_dbg_control(IN struct btc_coexist *btcoexist, ++ IN u8 op_code, IN u8 op_len, IN u8 *pdata); ++void ex_halbtc8812a1ant_display_coex_info(IN struct btc_coexist *btcoexist); ++ ++#else ++#define ex_halbtc8812a1ant_power_on_setting(btcoexist) ++#define ex_halbtc8812a1ant_pre_load_firmware(btcoexist) ++#define ex_halbtc8812a1ant_init_hw_config(btcoexist, wifi_only) ++#define ex_halbtc8812a1ant_init_coex_dm(btcoexist) ++#define ex_halbtc8812a1ant_ips_notify(btcoexist, type) ++#define ex_halbtc8812a1ant_lps_notify(btcoexist, type) ++#define ex_halbtc8812a1ant_scan_notify(btcoexist, type) ++#define ex_halbtc8812a1ant_connect_notify(btcoexist, type) ++#define ex_halbtc8812a1ant_media_status_notify(btcoexist, type) ++#define ex_halbtc8812a1ant_specific_packet_notify(btcoexist, type) ++#define ex_halbtc8812a1ant_bt_info_notify(btcoexist, tmp_buf, length) ++#define ex_halbtc8812a1ant_rf_status_notify(btcoexist, type) ++#define ex_halbtc8812a1ant_halt_notify(btcoexist) ++#define ex_halbtc8812a1ant_pnp_notify(btcoexist, pnp_state) ++#define ex_halbtc8812a1ant_coex_dm_reset(btcoexist) ++#define ex_halbtc8812a1ant_periodical(btcoexist) ++#define ex_halbtc8812a1ant_dbg_control(btcoexist, op_code, op_len, pdata) ++#define ex_halbtc8812a1ant_display_coex_info(btcoexist) ++ ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a2Ant.c +new file mode 100644 +index 0000000..cd8a547 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a2Ant.c +@@ -0,0 +1,4782 @@ ++/* ************************************************************ ++ * Description: ++ * ++ * This file is for RTL8812A Co-exist mechanism ++ * ++ * History ++ * 2012/08/22 Cosa first check in. ++ * 2012/11/14 Cosa Revise for 8812A 2Ant out sourcing. ++ * ++ * ************************************************************ */ ++ ++/* ************************************************************ ++ * include files ++ * ************************************************************ */ ++#include "Mp_Precomp.h" ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8812A_SUPPORT == 1) ++/* ************************************************************ ++ * Global variables, these are static variables ++ * ************************************************************ */ ++static u8 *trace_buf = &gl_btc_trace_buf[0]; ++static struct coex_dm_8812a_2ant glcoex_dm_8812a_2ant; ++static struct coex_dm_8812a_2ant *coex_dm = &glcoex_dm_8812a_2ant; ++static struct coex_sta_8812a_2ant glcoex_sta_8812a_2ant; ++static struct coex_sta_8812a_2ant *coex_sta = &glcoex_sta_8812a_2ant; ++ ++const char *const glbt_info_src_8812a_2ant[] = { ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u32 glcoex_ver_date_8812a_2ant = 20150724; ++u32 glcoex_ver_8812a_2ant = 0x37; ++ ++/* ************************************************************ ++ * local function proto type if needed ++ * ************************************************************ ++ * ************************************************************ ++ * local function start with halbtc8812a2ant_ ++ * ************************************************************ */ ++u8 halbtc8812a2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1) ++{ ++ s32 bt_rssi = 0; ++ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; ++ ++ bt_rssi = coex_sta->bt_rssi; ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Rssi thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_bt_rssi_state; ++ } ++ ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (bt_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (bt_rssi < rssi_thresh1) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_bt_rssi_state = bt_rssi_state; ++ ++ return bt_rssi_state; ++} ++ ++u8 halbtc8812a2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist, ++ IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1) ++{ ++ s32 wifi_rssi = 0; ++ u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi RSSI thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_wifi_rssi_state[index]; ++ } ++ ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (wifi_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (wifi_rssi < rssi_thresh1) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; ++ ++ return wifi_rssi_state; ++} ++ ++void halbtc8812a2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_stack_info *stack_info = &btcoexist->stack_info; ++ static u32 bt_disable_cnt = 0; ++ boolean bt_active = true, bt_disabled = false; ++ ++ /* This function check if bt is disabled */ ++ ++ /* only 8812a need to consider if core stack is installed. */ ++ if (!stack_info->hci_version) ++ bt_active = false; ++ ++ if (coex_sta->high_priority_tx == 0 && ++ coex_sta->high_priority_rx == 0 && ++ coex_sta->low_priority_tx == 0 && ++ coex_sta->low_priority_rx == 0) ++ bt_active = false; ++ if (coex_sta->high_priority_tx == 0xffff && ++ coex_sta->high_priority_rx == 0xffff && ++ coex_sta->low_priority_tx == 0xffff && ++ coex_sta->low_priority_rx == 0xffff) ++ bt_active = false; ++ if (bt_active) { ++ bt_disable_cnt = 0; ++ bt_disabled = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is enabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ bt_disable_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], bt is detected as disabled %d times!!\n", ++ bt_disable_cnt); ++ BTC_TRACE(trace_buf); ++ if (bt_disable_cnt >= 2) { ++ bt_disabled = true; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is disabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ if (coex_sta->bt_disabled != bt_disabled) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is from %s to %s!!\n", ++ (coex_sta->bt_disabled ? "disabled" : "enabled"), ++ (bt_disabled ? "disabled" : "enabled")); ++ BTC_TRACE(trace_buf); ++ coex_sta->bt_disabled = bt_disabled; ++ if (!bt_disabled) { ++ } else { ++ } ++ } ++} ++ ++u32 halbtc8812a2ant_decide_ra_mask(IN struct btc_coexist *btcoexist, ++ IN u32 ra_mask_type) ++{ ++ u32 dis_ra_mask = 0x0; ++ ++ switch (ra_mask_type) { ++ case 0: /* normal mode */ ++ dis_ra_mask = 0x0; ++ break; ++ case 1: /* disable cck 1/2 */ ++ dis_ra_mask = 0x00000003; ++ break; ++ case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ ++ dis_ra_mask = 0x0001f1f7; ++ break; ++ default: ++ break; ++ } ++ ++ return dis_ra_mask; ++} ++ ++void halbtc8812a2ant_update_ra_mask(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 dis_rate_mask) ++{ ++ coex_dm->cur_ra_mask = dis_rate_mask; ++ ++ if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, ++ &coex_dm->cur_ra_mask); ++ coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; ++} ++ ++void halbtc8812a2ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ boolean wifi_under_b_mode = false; ++ ++ coex_dm->cur_arfr_type = type; ++ ++ if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { ++ switch (coex_dm->cur_arfr_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_4byte(btcoexist, 0x430, ++ coex_dm->backup_arfr_cnt1); ++ btcoexist->btc_write_4byte(btcoexist, 0x434, ++ coex_dm->backup_arfr_cnt2); ++ break; ++ case 1: ++ btcoexist->btc_get(btcoexist, ++ BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x01010101); ++ } else { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; ++} ++ ++void halbtc8812a2ant_retry_limit(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_retry_limit_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_retry_limit_type != ++ coex_dm->cur_retry_limit_type)) { ++ switch (coex_dm->cur_retry_limit_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ coex_dm->backup_retry_limit); ++ break; ++ case 1: /* retry limit=8 */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; ++} ++ ++void halbtc8812a2ant_ampdu_max_time(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_ampdu_time_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) { ++ switch (coex_dm->cur_ampdu_time_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ coex_dm->backup_ampdu_max_time); ++ break; ++ case 1: /* AMPDU timw = 0x38 * 32us */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; ++} ++ ++void halbtc8812a2ant_limited_tx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type, ++ IN u8 retry_limit_type, IN u8 ampdu_time_type) ++{ ++ u32 dis_ra_mask = 0x0; ++ ++ coex_dm->cur_ra_mask_type = ra_mask_type; ++ dis_ra_mask = halbtc8812a2ant_decide_ra_mask(btcoexist, ra_mask_type); ++ halbtc8812a2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask); ++ ++ halbtc8812a2ant_auto_rate_fallback_retry(btcoexist, force_exec, ++ arfr_type); ++ halbtc8812a2ant_retry_limit(btcoexist, force_exec, retry_limit_type); ++ halbtc8812a2ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type); ++} ++ ++void halbtc8812a2ant_limited_rx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rej_ap_agg_pkt, ++ IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size) ++{ ++ boolean reject_rx_agg = rej_ap_agg_pkt; ++ boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; ++ u8 rx_agg_size = agg_buf_size; ++ ++ /* ============================================ */ ++ /* Rx Aggregation related setting */ ++ /* ============================================ */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ &reject_rx_agg); ++ /* decide BT control aggregation buf size or not */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ &bt_ctrl_rx_agg_size); ++ /* aggregation buf size, only work when BT control Rx aggregation size. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); ++ /* real update aggregation setting */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++void halbtc8812a2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist) ++{ ++ u32 reg_hp_txrx, reg_lp_txrx, u32tmp; ++ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; ++ ++ reg_hp_txrx = 0x770; ++ reg_lp_txrx = 0x774; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); ++ reg_hp_tx = u32tmp & MASKLWORD; ++ reg_hp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); ++ reg_lp_tx = u32tmp & MASKLWORD; ++ reg_lp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ coex_sta->high_priority_tx = reg_hp_tx; ++ coex_sta->high_priority_rx = reg_hp_rx; ++ coex_sta->low_priority_tx = reg_lp_tx; ++ coex_sta->low_priority_rx = reg_lp_rx; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx); ++ BTC_TRACE(trace_buf); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx); ++ BTC_TRACE(trace_buf); ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); ++} ++ ++void halbtc8812a2ant_query_bt_info(IN struct btc_coexist *btcoexist) ++{ ++ u8 data_len = 3; ++ u8 buf[5] = {0}; ++ ++ if (!coex_sta->bt_disabled) { ++ if (!coex_sta->bt_info_query_cnt || ++ (coex_sta->bt_info_c2h_cnt[BT_INFO_SRC_8812A_2ANT_BT_RSP] ++ - coex_sta->bt_info_query_cnt) > 2) { ++ buf[0] = data_len; ++ buf[1] = 0x1; /* polling enable, 1=enable, 0=disable */ ++ buf[2] = 0x2; /* polling time in seconds */ ++ buf[3] = 0x1; /* auto report enable, 1=enable, 0=disable */ ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_CTRL_BT_INFO, ++ (void *)&buf[0]); ++ } ++ } ++ coex_sta->bt_info_query_cnt++; ++} ++ ++boolean halbtc8812a2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist) ++{ ++ static boolean pre_wifi_busy = false, pre_under_4way = false, ++ pre_bt_hs_on = false; ++ boolean wifi_busy = false, under_4way = false, bt_hs_on = false; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ ++ if (wifi_connected) { ++ if (wifi_busy != pre_wifi_busy) { ++ pre_wifi_busy = wifi_busy; ++ return true; ++ } ++ if (under_4way != pre_under_4way) { ++ pre_under_4way = under_4way; ++ return true; ++ } ++ if (bt_hs_on != pre_bt_hs_on) { ++ pre_bt_hs_on = bt_hs_on; ++ return true; ++ } ++ } ++ ++ return false; ++} ++ ++void halbtc8812a2ant_update_bt_link_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ bt_link_info->bt_link_exist = coex_sta->bt_link_exist; ++ bt_link_info->sco_exist = coex_sta->sco_exist; ++ bt_link_info->a2dp_exist = coex_sta->a2dp_exist; ++ bt_link_info->pan_exist = coex_sta->pan_exist; ++ bt_link_info->hid_exist = coex_sta->hid_exist; ++ bt_link_info->acl_busy = coex_sta->acl_busy; ++ ++ /* work around for HS mode. */ ++ if (bt_hs_on) { ++ bt_link_info->pan_exist = true; ++ bt_link_info->bt_link_exist = true; ++ } ++ ++ /* check if Sco only */ ++ if (bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->sco_only = true; ++ else ++ bt_link_info->sco_only = false; ++ ++ /* check if A2dp only */ ++ if (!bt_link_info->sco_exist && ++ bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->a2dp_only = true; ++ else ++ bt_link_info->a2dp_only = false; ++ ++ /* check if Pan only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->pan_only = true; ++ else ++ bt_link_info->pan_only = false; ++ ++ /* check if Hid only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ bt_link_info->hid_exist) ++ bt_link_info->hid_only = true; ++ else ++ bt_link_info->hid_only = false; ++} ++ ++u8 halbtc8812a2ant_action_algorithm(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ struct btc_stack_info *stack_info = &btcoexist->stack_info; ++ boolean bt_hs_on = false; ++ u8 algorithm = BT_8812A_2ANT_COEX_ALGO_UNDEFINED; ++ u8 num_of_diff_profile = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ if (!bt_link_info->bt_link_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], No BT link exists!!!\n"); ++ BTC_TRACE(trace_buf); ++ return algorithm; ++ } ++ ++ if (bt_link_info->sco_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->hid_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->pan_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->a2dp_exist) ++ num_of_diff_profile++; ++ ++ if (num_of_diff_profile == 0) { ++ if (bt_link_info->acl_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ACL Busy only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR; ++ } ++ } else if (num_of_diff_profile == 1) { ++ if (bt_link_info->sco_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; ++ } else { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_A2DP; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PAN(HS) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PAN(EDR) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 2) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ if (stack_info->num_of_hid >= 2) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID*2 + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_HID; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + A2DP ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_SCO_HID; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_SCO_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8812A_2ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile >= 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8812A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++void halbtc8812a2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist, ++ IN u8 dac_swing_lvl) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ /* There are several type of dacswing */ ++ /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */ ++ h2c_parameter[0] = dac_swing_lvl; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter); ++} ++ ++void halbtc8812a2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist, ++ IN u8 dec_bt_pwr_lvl) ++{ ++ u8 data_len = 4; ++ u8 buf[6] = {0}; ++ ++ buf[0] = data_len; ++ buf[1] = 0x3; /* OP_Code */ ++ buf[2] = 0x2; /* OP_Code_Length */ ++ if (dec_bt_pwr_lvl) ++ buf[3] = 0x1; /* OP_Code_Content */ ++ else ++ buf[3] = 0x0; ++ buf[4] = dec_bt_pwr_lvl;/* pwr_level */ ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_CTRL_BT_COEX, ++ (void *)&buf[0]); ++} ++ ++void halbtc8812a2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 dec_bt_pwr_lvl) ++{ ++ coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl) ++ return; ++ } ++ halbtc8812a2ant_set_fw_dec_bt_pwr(btcoexist, ++ coex_dm->cur_bt_dec_pwr_lvl); ++ ++ coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl; ++} ++ ++void halbtc8812a2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 fw_dac_swing_lvl) ++{ ++ coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_fw_dac_swing_lvl == ++ coex_dm->cur_fw_dac_swing_lvl) ++ return; ++ } ++ ++ halbtc8812a2ant_set_fw_dac_swing_level(btcoexist, ++ coex_dm->cur_fw_dac_swing_lvl); ++ ++ coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl; ++} ++ ++void halbtc8812a2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist, ++ IN boolean rx_rf_shrink_on) ++{ ++ if (rx_rf_shrink_on) { ++ /* Shrink RF Rx LPF corner */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Shrink RF Rx LPF corner!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff, ++ 0xffffc); ++ } else { ++ /* Resume RF Rx LPF corner */ ++ /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */ ++ if (btcoexist->initilized) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Resume RF Rx LPF corner!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, ++ 0xfffff, coex_dm->bt_rf_0x1e_backup); ++ } ++ } ++} ++ ++void halbtc8812a2ant_rf_shrink(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rx_rf_shrink_on) ++{ ++ coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_rf_rx_lpf_shrink == ++ coex_dm->cur_rf_rx_lpf_shrink) ++ return; ++ } ++ halbtc8812a2ant_set_sw_rf_rx_lpf_corner(btcoexist, ++ coex_dm->cur_rf_rx_lpf_shrink); ++ ++ coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink; ++} ++ ++void halbtc8812a2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist ++ *btcoexist, IN boolean low_penalty_ra) ++{ ++ u8 tmp_u1; ++ ++ tmp_u1 = btcoexist->btc_read_1byte(btcoexist, 0x4fd); ++ tmp_u1 |= BIT(0); ++ if (low_penalty_ra) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Tx rate adaptive, set low penalty!!\n"); ++ BTC_TRACE(trace_buf); ++ tmp_u1 &= ~BIT(2); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Tx rate adaptive, set normal!!\n"); ++ BTC_TRACE(trace_buf); ++ tmp_u1 |= BIT(2); ++ } ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x4fd, tmp_u1); ++} ++ ++void halbtc8812a2ant_low_penalty_ra(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean low_penalty_ra) ++{ ++ return; ++ coex_dm->cur_low_penalty_ra = low_penalty_ra; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) ++ return; ++ } ++ halbtc8812a2ant_set_sw_penalty_tx_rate_adaptive(btcoexist, ++ coex_dm->cur_low_penalty_ra); ++ ++ coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; ++} ++ ++void halbtc8812a2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist, ++ IN u32 level) ++{ ++ u8 val = (u8)level; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Write SwDacSwing = 0x%x\n", level); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc5b, 0x3e, val); ++} ++ ++void halbtc8812a2ant_set_sw_full_time_dac_swing(IN struct btc_coexist ++ *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl) ++{ ++ if (sw_dac_swing_on) ++ halbtc8812a2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl); ++ else ++ halbtc8812a2ant_set_dac_swing_reg(btcoexist, 0x18); ++} ++ ++ ++void halbtc8812a2ant_dac_swing(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl) ++{ ++ coex_dm->cur_dac_swing_on = dac_swing_on; ++ coex_dm->cur_dac_swing_lvl = dac_swing_lvl; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) && ++ (coex_dm->pre_dac_swing_lvl == ++ coex_dm->cur_dac_swing_lvl)) ++ return; ++ } ++ delay_ms(30); ++ halbtc8812a2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on, ++ dac_swing_lvl); ++ ++ coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on; ++ coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl; ++} ++ ++void halbtc8812a2ant_set_adc_back_off(IN struct btc_coexist *btcoexist, ++ IN boolean adc_back_off) ++{ ++ if (adc_back_off) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB BackOff Level On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x3); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB BackOff Level Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x1); ++ } ++} ++ ++void halbtc8812a2ant_adc_back_off(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean adc_back_off) ++{ ++ coex_dm->cur_adc_back_off = adc_back_off; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off) ++ return; ++ } ++ halbtc8812a2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off); ++ ++ coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off; ++} ++ ++void halbtc8812a2ant_set_agc_table(IN struct btc_coexist *btcoexist, ++ IN boolean agc_table_en) ++{ ++ u8 rssi_adjust_val = 0; ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); ++ if (agc_table_en) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x28F4B); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x10AB2); ++ rssi_adjust_val = 8; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x2884B); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x104B2); ++ } ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); ++ ++ /* set rssi_adjust_val for wifi module. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, ++ &rssi_adjust_val); ++} ++ ++void halbtc8812a2ant_agc_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean agc_table_en) ++{ ++ coex_dm->cur_agc_table_en = agc_table_en; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en) ++ return; ++ } ++ halbtc8812a2ant_set_agc_table(btcoexist, agc_table_en); ++ ++ coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en; ++} ++ ++void halbtc8812a2ant_set_coex_table(IN struct btc_coexist *btcoexist, ++ IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); ++} ++ ++void halbtc8812a2ant_coex_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4, ++ IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ coex_dm->cur_val0x6c0 = val0x6c0; ++ coex_dm->cur_val0x6c4 = val0x6c4; ++ coex_dm->cur_val0x6c8 = val0x6c8; ++ coex_dm->cur_val0x6cc = val0x6cc; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && ++ (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && ++ (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && ++ (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) ++ return; ++ } ++ halbtc8812a2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, ++ val0x6cc); ++ ++ coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; ++ coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; ++ coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; ++ coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; ++} ++ ++void halbtc8812a2ant_coex_table_with_type(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ switch (type) { ++ case 0: ++ halbtc8812a2ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8812a2ant_coex_table(btcoexist, force_exec, ++ 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8812a2ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5ffb5ffb, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8812a2ant_coex_table(btcoexist, force_exec, ++ 0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8812a2ant_coex_table(btcoexist, force_exec, ++ 0xdfffdfff, 0x5fdb5fdb, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8812a2ant_coex_table(btcoexist, force_exec, ++ 0x5ddd5ddd, 0x5fdb5fdb, 0xffffff, 0x3); ++ break; ++ ++ default: ++ break; ++ } ++} ++ ++void halbtc8812a2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean enable) ++{ ++ u8 data_len = 3; ++ u8 buf[5] = {0}; ++ ++ buf[0] = data_len; ++ buf[1] = 0x1; /* OP_Code */ ++ buf[2] = 0x1; /* OP_Code_Length */ ++ if (enable) ++ buf[3] = 0x1; /* OP_Code_Content */ ++ else ++ buf[3] = 0x0; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_CTRL_BT_COEX, ++ (void *)&buf[0]); ++} ++ ++void halbtc8812a2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable) ++{ ++ coex_dm->cur_ignore_wlan_act = enable; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_ignore_wlan_act == ++ coex_dm->cur_ignore_wlan_act) ++ return; ++ } ++ halbtc8812a2ant_set_fw_ignore_wlan_act(btcoexist, enable); ++ ++ coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; ++} ++ ++void halbtc8812a2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist, ++ IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5) ++{ ++ u8 h2c_parameter[5] = {0}; ++ u8 real_byte1 = byte1, real_byte5 = byte5; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ if (ap_enable) { ++ if (byte1 & BIT(4) && !(byte1 & BIT(5))) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], FW for 1Ant AP mode\n"); ++ BTC_TRACE(trace_buf); ++ real_byte1 &= ~BIT(4); ++ real_byte1 |= BIT(5); ++ ++ real_byte5 |= BIT(5); ++ real_byte5 &= ~BIT(6); ++ } ++ } ++ ++ h2c_parameter[0] = real_byte1; ++ h2c_parameter[1] = byte2; ++ h2c_parameter[2] = byte3; ++ h2c_parameter[3] = byte4; ++ h2c_parameter[4] = real_byte5; ++ ++ ++ coex_dm->ps_tdma_para[0] = real_byte1; ++ coex_dm->ps_tdma_para[1] = byte2; ++ coex_dm->ps_tdma_para[2] = byte3; ++ coex_dm->ps_tdma_para[3] = byte4; ++ coex_dm->ps_tdma_para[4] = real_byte5; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); ++} ++ ++void halbtc8812a2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN u8 lps_val, IN u8 rpwm_val) ++{ ++ u8 lps = lps_val; ++ u8 rpwm = rpwm_val; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps); ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++void halbtc8812a2ant_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ coex_dm->cur_lps = lps_val; ++ coex_dm->cur_rpwm = rpwm_val; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_lps == coex_dm->cur_lps) && ++ (coex_dm->pre_rpwm == coex_dm->cur_rpwm)) ++ return; ++ } ++ halbtc8812a2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val); ++ ++ coex_dm->pre_lps = coex_dm->cur_lps; ++ coex_dm->pre_rpwm = coex_dm->cur_rpwm; ++} ++ ++void halbtc8812a2ant_sw_mechanism1(IN struct btc_coexist *btcoexist, ++ IN boolean shrink_rx_lpf, IN boolean low_penalty_ra, ++ IN boolean limited_dig, IN boolean bt_lna_constrain) ++{ ++ /* ++ u32 wifi_bw; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if(BTC_WIFI_BW_HT40 != wifi_bw) ++ { ++ if (shrink_rx_lpf) ++ shrink_rx_lpf = false; ++ } ++ */ ++ ++ halbtc8812a2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); ++ /* halbtc8812a2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); */ ++} ++ ++void halbtc8812a2ant_sw_mechanism2(IN struct btc_coexist *btcoexist, ++ IN boolean agc_table_shift, IN boolean adc_back_off, ++ IN boolean sw_dac_swing, IN u32 dac_swing_lvl) ++{ ++ /* halbtc8812a2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */ ++ halbtc8812a2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); ++ halbtc8812a2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, ++ dac_swing_lvl); ++} ++ ++void halbtc8812a2ant_set_ant_path(IN struct btc_coexist *btcoexist, ++ IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off) ++{ ++ u8 u8tmp = 0; ++ ++ if (init_hwcfg) { ++ btcoexist->btc_write_4byte(btcoexist, 0x900, 0x00000400); ++ btcoexist->btc_write_1byte(btcoexist, 0x76d, 0x1); ++ } else if (wifi_off) { ++ ++ } ++ ++ /* ext switch setting */ ++ switch (ant_pos_type) { ++ case BTC_ANT_WIFI_AT_CPL_MAIN: ++ break; ++ case BTC_ANT_WIFI_AT_CPL_AUX: ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0xcb7); ++ u8tmp &= ~BIT(3); ++ u8tmp |= BIT(2); ++ btcoexist->btc_write_1byte(btcoexist, 0xcb7, u8tmp); ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8812a2ant_ps_tdma(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean turn_on, IN u8 type) ++{ ++ coex_dm->cur_ps_tdma_on = turn_on; ++ coex_dm->cur_ps_tdma = type; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && ++ (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) ++ return; ++ } ++ if (turn_on) { ++ switch (type) { ++ case 1: ++ default: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1a, 0x1a, 0xa1, 0x90); ++ break; ++ case 2: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x12, 0x12, 0xa1, 0x90); ++ break; ++ case 3: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0xb1, 0x90); ++ break; ++ case 4: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x3, 0xb1, 0x90); ++ break; ++ case 5: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1a, 0x1a, 0x21, 0x10); ++ break; ++ case 6: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x12, 0x12, 0x21, 0x10); ++ break; ++ case 7: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0x21, 0x10); ++ break; ++ case 8: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x3, 0x21, 0x10); ++ break; ++ case 9: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1a, 0x1a, 0xa1, 0x10); ++ break; ++ case 10: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x12, 0x12, 0xa1, 0x10); ++ break; ++ case 11: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0xb1, 0x10); ++ break; ++ case 12: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x3, 0xb1, 0x10); ++ break; ++ case 13: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1a, 0x1a, 0x21, 0x10); ++ break; ++ case 14: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x12, 0x12, 0x21, 0x10); ++ break; ++ case 15: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0x21, 0x10); ++ break; ++ case 16: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x3, 0x21, 0x10); ++ break; ++ case 17: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x35, 0x3, 0xb1, 0x11); ++ break; ++ case 18: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x15, 0x3, 0x70, 0x90); ++ break; ++ case 22: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x1a, 0x1a, 0x21, 0x10); ++ break; ++ case 23: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x03, 0x31, 0x10); ++ break; ++ ++ case 71: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1a, 0x1a, 0xe1, 0x90); ++ break; ++ ++ /* following cases is for wifi rssi low, started from 81 */ ++ case 81: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x3a, 0x3, 0x90, 0x50); ++ break; ++ case 82: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x2b, 0x3, 0x90, 0x50); ++ break; ++ case 83: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x21, 0x3, 0x90, 0x50); ++ break; ++ case 84: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x15, 0x3, 0x90, 0x50); ++ break; ++ case 85: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x1d, 0x1d, 0x80, 0x50); ++ break; ++ case 86: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x15, 0x15, 0x80, 0x50); ++ break; ++ } ++ } else { ++ /* disable PS tdma */ ++ switch (type) { ++ case 0: /* ANT2PTA, 0x778=0x1 */ ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0x8, ++ 0x0, 0x0, 0x0, 0x0); ++ break; ++ case 1: /* ANT2BT, 0x778=3 */ ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x8, 0x0); ++ delay_ms(5); ++ halbtc8812a2ant_set_ant_path(btcoexist, ++ BTC_ANT_WIFI_AT_CPL_AUX, false, false); ++ break; ++ default: ++ halbtc8812a2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x0, 0x0); ++ break; ++ } ++ } ++ ++ /* update pre state */ ++ coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; ++ coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; ++} ++ ++void halbtc8812a2ant_coex_all_off(IN struct btc_coexist *btcoexist) ++{ ++ /* fw all off */ ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ /* sw all off */ ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ /* hw all off */ ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8812a2ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ /* force to reset coex mechanism */ ++ ++ halbtc8812a2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6); ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0); ++ ++ halbtc8812a2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++} ++ ++void halbtc8812a2ant_ps_tdma_check_for_power_save_state( ++ IN struct btc_coexist *btcoexist, IN boolean new_ps_state) ++{ ++ u8 lps_mode = 0x0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode); ++ ++ if (lps_mode) { /* already under LPS state */ ++ if (new_ps_state) { ++ /* keep state under LPS, do nothing. */ ++ } else { ++ /* will leave LPS state, turn off psTdma first */ ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ } ++ } else { /* NO PS state */ ++ if (new_ps_state) { ++ /* will enter LPS state, turn off psTdma first */ ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ } else { ++ /* keep state under NO PS state, do nothing. */ ++ } ++ } ++} ++ ++void halbtc8812a2ant_power_save_state(IN struct btc_coexist *btcoexist, ++ IN u8 ps_type, IN boolean low_pwr_disable, IN u8 lps_val, ++ IN u8 rpwm_val) ++{ ++ switch (ps_type) { ++ case BTC_PS_WIFI_NATIVE: ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8812a2ant_ps_tdma_check_for_power_save_state( ++ btcoexist, true); ++ halbtc8812a2ant_lps_rpwm(btcoexist, NORMAL_EXEC, ++ lps_val, rpwm_val); ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ /* power save must executed before psTdma. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, ++ NULL); ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8812a2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, true, ++ 0x0, 0x0); ++ ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++} ++ ++boolean halbtc8812a2ant_is_common_action(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean common = false, wifi_connected = false, wifi_busy = false; ++ boolean bt_hs_on = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ ++ if (coex_sta->c2h_bt_inquiry_page) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is under inquiry/page scan !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_bt_inquiry(btcoexist); ++ return true; ++ } ++ ++ if (bt_link_info->sco_exist || bt_link_info->hid_exist) ++ halbtc8812a2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0); ++ else ++ halbtc8812a2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ if (!wifi_connected) { ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ false, 0x0, 0x0); ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non-connected idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ if ((BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) || ++ (BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE == ++ coex_dm->bt_status)) { ++ halbtc8812a2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 1); ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ } else { ++ halbtc8812a2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 0); ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 1); ++ } ++ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ ++ common = true; ++ } else { ++ if (BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, false, 0x0, 0x0); ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, ++ false, false, 0x8); ++ ++ halbtc8812a2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 0); ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 6); ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ ++ common = true; ++ } else if (BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ if (bt_hs_on) ++ return false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, true, 0x0, 0x0); ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, ++ false, false, 0x8); ++ ++ halbtc8812a2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 0); ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 6); ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ ++ common = true; ++ } else { ++ if (wifi_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Busy + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ common = false; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8812a2ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, true, 0x0, 0x0); ++ ++ halbtc8812a2ant_limited_rx(btcoexist, ++ NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8812a2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 0); ++ ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 17); ++ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, ++ NORMAL_EXEC, 6); ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, ++ NORMAL_EXEC, 0); ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, ++ false, false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ common = true; ++ } ++ } ++ } ++ ++ return common; ++} ++ ++void halbtc8812a2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist, ++ IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval) ++{ ++ static s32 up, dn, m, n, wait_count; ++ s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */ ++ u8 retry_count = 0; ++ ++ coex_dm->auto_tdma_adjust_low_rssi = false; ++ ++ if (!coex_dm->auto_tdma_adjust) { ++ coex_dm->auto_tdma_adjust = true; ++ { ++ if (sco_hid) { ++ if (tx_pause) { ++ if (max_interval == 1) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 13); ++ coex_dm->ps_tdma_du_adj_type = ++ 13; ++ } else if (max_interval == 2) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (max_interval == 3) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } ++ } else { ++ if (max_interval == 1) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = ++ 9; ++ } else if (max_interval == 2) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (max_interval == 3) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } ++ } ++ } else { ++ if (tx_pause) { ++ if (max_interval == 1) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 5); ++ coex_dm->ps_tdma_du_adj_type = ++ 5; ++ } else if (max_interval == 2) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (max_interval == 3) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } ++ } else { ++ if (max_interval == 1) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (max_interval == 2) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (max_interval == 3) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } ++ } ++ } ++ } ++ /* ============ */ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } else { ++ /* accquire the BT TRx retry count from BT_Info byte2 */ ++ retry_count = coex_sta->bt_retry_cnt; ++ result = 0; ++ wait_count++; ++ ++ if (retry_count == ++ 0) { /* no retry in the last 2-second duration */ ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if (up >= n) { /* if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration */ ++ wait_count = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ } ++ } else if (retry_count <= ++ 3) { /* <=3 retry in the last 2-second duration */ ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) { /* if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration */ ++ if (wait_count <= 2) ++ m++; /* ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ } else { /* retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration */ ++ if (wait_count == 1) ++ m++; /* ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ ++ if (max_interval == 1) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 71) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 5); ++ coex_dm->ps_tdma_du_adj_type = 5; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 5); ++ coex_dm->ps_tdma_du_adj_type = 5; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 13); ++ coex_dm->ps_tdma_du_adj_type = 13; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 5); ++ coex_dm->ps_tdma_du_adj_type = ++ 5; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 13); ++ coex_dm->ps_tdma_du_adj_type = ++ 13; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 71); ++ coex_dm->ps_tdma_du_adj_type = 71; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 71) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 71); ++ coex_dm->ps_tdma_du_adj_type = ++ 71; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = ++ 9; ++ } ++ } ++ } ++ } else if (max_interval == 2) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } ++ } ++ } ++ } else if (max_interval == 3) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8812a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8812a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } ++ } ++ } ++ } ++ } ++ ++ /* if current PsTdma not match with the recorded one (when scan, dhcp...), */ ++ /* then we have to adjust it back to the previous record one. */ ++ if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) { ++ boolean scan = false, link = false, roam = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n", ++ coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (!scan && !link && !roam) ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ coex_dm->ps_tdma_du_adj_type); ++ else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } ++} ++ ++/* ****************** ++ * pstdma for wifi rssi low ++ * ****************** */ ++void halbtc8812a2ant_tdma_duration_adjust_for_wifi_rssi_low( ++ IN struct btc_coexist *btcoexist/* , */ /* IN u8 wifi_status */) ++{ ++ static s32 up, dn, m, n, wait_count; ++ s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */ ++ u8 retry_count = 0, bt_info_ext; ++ ++ coex_dm->auto_tdma_adjust = false; ++ ++ retry_count = coex_sta->bt_retry_cnt; ++ bt_info_ext = coex_sta->bt_info_ext; ++ ++ if (!coex_dm->auto_tdma_adjust_low_rssi) { ++ coex_dm->auto_tdma_adjust_low_rssi = true; ++ ++ if (BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(bt_info_ext)) { ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 83); ++ coex_dm->ps_tdma_du_adj_type = 83; ++ } else { ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 82); ++ coex_dm->ps_tdma_du_adj_type = 82; ++ } ++ /* ============ */ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } else { ++ /* accquire the BT TRx retry count from BT_Info byte2 ++ * retry_count = coex_sta->bt_retry_cnt; ++ * bt_info_ext = coex_sta->bt_info_ext; */ ++ result = 0; ++ wait_count++; ++ ++ if ((coex_sta->low_priority_tx) > 1150 || ++ (coex_sta->low_priority_rx) > 1250) ++ retry_count++; ++ ++ if (retry_count == ++ 0) { /* no retry in the last 2-second duration */ ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */ ++ wait_count = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ } ++ } else if (retry_count <= ++ 3) { /* <=3 retry in the last 2-second duration */ ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) { /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */ ++ if (wait_count <= 2) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */ ++ if (wait_count == 1) ++ m++; /* to avoid loop between the two levels */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ ++ if (result == -1) { ++ if ((BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(bt_info_ext)) && ++ ((coex_dm->cur_ps_tdma == 81) || ++ (coex_dm->cur_ps_tdma == 82))) { ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 84); ++ coex_dm->ps_tdma_du_adj_type = 84; ++ } else if (coex_dm->cur_ps_tdma == 81) { ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 82); ++ coex_dm->ps_tdma_du_adj_type = 82; ++ } else if (coex_dm->cur_ps_tdma == 82) { ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 83); ++ coex_dm->ps_tdma_du_adj_type = 83; ++ } else if (coex_dm->cur_ps_tdma == 83) { ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 84); ++ coex_dm->ps_tdma_du_adj_type = 84; ++ } ++ } else if (result == 1) { ++ if ((BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(bt_info_ext)) && ++ ((coex_dm->cur_ps_tdma == 81) || ++ (coex_dm->cur_ps_tdma == 82))) { ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 83); ++ coex_dm->ps_tdma_du_adj_type = 83; ++ } else if (coex_dm->cur_ps_tdma == 84) { ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 83); ++ coex_dm->ps_tdma_du_adj_type = 83; ++ } else if (coex_dm->cur_ps_tdma == 83) { ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 82); ++ coex_dm->ps_tdma_du_adj_type = 82; ++ } else if (coex_dm->cur_ps_tdma == 82) { ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ true, 81); ++ coex_dm->ps_tdma_du_adj_type = 81; ++ } ++ } ++ ++ if (coex_dm->cur_ps_tdma != 81 && ++ coex_dm->cur_ps_tdma != 82 && ++ coex_dm->cur_ps_tdma != 83 && ++ coex_dm->cur_ps_tdma != 84) { ++ /* recover to previous adjust type */ ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ coex_dm->ps_tdma_du_adj_type); ++ } ++ } ++} ++ ++void halbtc8812a2ant_get_bt_rssi_threshold(IN struct btc_coexist *btcoexist, ++ IN u8 *pThres0, IN u8 *pThres1) ++{ ++ u8 ant_type; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_ANT_TYPE, &ant_type); ++ ++ switch (ant_type) { ++ case BTC_ANT_TYPE_0: ++ *pThres0 = 100; ++ *pThres1 = 100; ++ break; ++ case BTC_ANT_TYPE_1: ++ *pThres0 = 34; ++ *pThres1 = 42; ++ break; ++ case BTC_ANT_TYPE_2: ++ *pThres0 = 34; ++ *pThres1 = 42; ++ break; ++ case BTC_ANT_TYPE_3: ++ *pThres0 = 34; ++ *pThres1 = 42; ++ break; ++ case BTC_ANT_TYPE_4: ++ *pThres0 = 34; ++ *pThres1 = 42; ++ break; ++ default: ++ break; ++ } ++} ++ ++ ++ ++void halbtc8812a2ant_action_sco(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ u8 bt_thresh0 = 0, bt_thresh1 = 0; ++ ++ ++ halbtc8812a2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0, ++ &bt_thresh1); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, bt_thresh0, ++ bt_thresh1); ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ /* bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); */ ++ ++ /* power save state */ ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, true, ++ 0x0, 0x0); ++ ++ /* coex table */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ else ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ ++ /* pstdma */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); ++ else ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x6); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ true, 0x6); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x6); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ true, 0x6); ++ } ++ } ++} ++ ++void halbtc8812a2ant_action_sco_hid(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ u8 bt_thresh0 = 0, bt_thresh1 = 0; ++ ++ halbtc8812a2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0, ++ &bt_thresh1); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, bt_thresh0, ++ bt_thresh1); ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ /* bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); */ ++ ++ /* power save state */ ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, true, ++ 0x0, 0x0); ++ ++ /* coex table */ ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ ++ /* pstdma */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); ++ else ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x8); ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x6); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x6); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x6); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x6); ++ } ++ } ++} ++ ++void halbtc8812a2ant_action_hid(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ u8 bt_thresh0 = 0, bt_thresh1 = 0; ++ ++ halbtc8812a2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0, ++ &bt_thresh1); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, bt_thresh0, ++ bt_thresh1); ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ /* bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); */ ++ ++ /* power save state */ ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, true, ++ 0x0, 0x0); ++ ++ /* coex table */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ else ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ /* pstdma */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); ++ else ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22); ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ else ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, ++ 0x8); ++ ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */ ++void halbtc8812a2ant_action_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ u8 bt_thresh0 = 0, bt_thresh1 = 0; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ halbtc8812a2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0, ++ &bt_thresh1); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, bt_thresh0, ++ bt_thresh1); ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ /* bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); */ ++ ++ /* power save state */ ++ if ((ap_enable == true) || (BTC_RSSI_HIGH(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state)))) ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ true, 0x0, 0x0); ++ else ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, true, ++ 0x50, 0x4); ++ ++ /* coex table */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ /* pstdma */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, false, false, ++ 1); ++ else ++ halbtc8812a2ant_tdma_duration_adjust_for_wifi_rssi_low( ++ btcoexist); ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8812a2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ u8 bt_thresh0 = 0, bt_thresh1 = 0; ++ ++ halbtc8812a2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0, ++ &bt_thresh1); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, bt_thresh0, ++ bt_thresh1); ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ /* bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); */ ++ ++ /* power save state */ ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, true, ++ 0x0, 0x0); ++ ++ /* coex table */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ ++ /* pstdma */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, false, false, ++ 2); ++ else ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, false, true, 2); ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x6); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ true, 0x6); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x6); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ true, 0x6); ++ } ++ } ++} ++ ++void halbtc8812a2ant_action_pan_edr(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ u8 bt_thresh0 = 0, bt_thresh1 = 0; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ ++ halbtc8812a2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0, ++ &bt_thresh1); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, bt_thresh0, ++ bt_thresh1); ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ /* bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); */ ++ ++ /* power save state */ ++ if ((ap_enable == true) || (BTC_RSSI_HIGH(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state)))) ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ true, 0x0, 0x0); ++ else ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, true, ++ 0x50, 0x4); ++ ++ /* coex table */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ /* pstdma */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1); ++ else ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 85); ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* PAN(HS) only */ ++void halbtc8812a2ant_action_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); ++ ++ /* power save state */ ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, true, ++ 0x0, 0x0); ++ ++ /* coex table */ ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ ++ /* pstdma */ ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* PAN(EDR)+A2DP */ ++void halbtc8812a2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ u8 bt_thresh0 = 0, bt_thresh1 = 0; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ halbtc8812a2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0, ++ &bt_thresh1); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, bt_thresh0, ++ bt_thresh1); ++ ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ /* bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); */ ++ ++ /* power save state */ ++ if ((ap_enable == true) || (BTC_RSSI_HIGH(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state)))) ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ true, 0x0, 0x0); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ true, 0x0, 0x0); ++ else ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, true, ++ 0x50, 0x4); ++ ++ /* coex table */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ else ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ /* pstdma */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, false, false, ++ 3); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, false, true, 3); ++ else { ++ coex_dm->auto_tdma_adjust = false; ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86); ++ } ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8812a2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ u8 bt_thresh0 = 0, bt_thresh1 = 0; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ halbtc8812a2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0, ++ &bt_thresh1); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, bt_thresh0, ++ bt_thresh1); ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ /* bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); */ ++ ++ /* power save state */ ++ if ((ap_enable == true) || (BTC_RSSI_HIGH(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state)))) ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ true, 0x0, 0x0); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ true, 0x0, 0x0); ++ else ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, true, ++ 0x50, 0x4); ++ ++ /* coex table */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ else ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ /* pstdma */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); ++ else ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 85); ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ else ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, ++ 0x8); ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* HID+A2DP+PAN(EDR) */ ++void halbtc8812a2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ u8 bt_thresh0 = 0, bt_thresh1 = 0; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ halbtc8812a2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0, ++ &bt_thresh1); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, bt_thresh0, ++ bt_thresh1); ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ /* bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); */ ++ ++ /* power save state */ ++ if ((ap_enable == true) || (BTC_RSSI_HIGH(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state)))) ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ true, 0x0, 0x0); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ true, 0x0, 0x0); ++ else ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, true, ++ 0x50, 0x4); ++ ++ /* coex table */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ else ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ /* pstdma */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, true, false, 3); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, true, true, 3); ++ else { ++ coex_dm->auto_tdma_adjust = false; ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86); ++ } ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ else ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, ++ 0x8); ++ ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8812a2ant_action_hid_a2dp_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ u8 bt_thresh0 = 0, bt_thresh1 = 0; ++ ++ halbtc8812a2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0, ++ &bt_thresh1); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, bt_thresh0, ++ bt_thresh1); ++ ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ /* bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); */ ++ ++ /* power save state */ ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, true, ++ 0x0, 0x0); ++ ++ /* coex table */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ else ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ /* pstdma */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, true, false, 2); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, true, true, 2); ++ else ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, true, true, 2); ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ else ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, ++ 0x8); ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8812a2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH, ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_bw; ++ u8 bt_thresh0 = 0, bt_thresh1 = 0; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ halbtc8812a2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0, ++ &bt_thresh1); ++ bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, bt_thresh0, ++ bt_thresh1); ++ ++ wifi_rssi_state = halbtc8812a2ant_wifi_rssi_state(btcoexist, 0, 2, 34, ++ 0); ++ /* bt_rssi_state = halbtc8812a2ant_bt_rssi_state(3, 34, 42); */ ++ ++ /* power save state */ ++ if ((ap_enable == true) || (BTC_RSSI_HIGH(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state)))) ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ true, 0x0, 0x0); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ true, 0x0, 0x0); ++ else ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, true, ++ 0x50, 0x4); ++ ++ /* coex table */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); ++ else ++ halbtc8812a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ /* pstdma */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, true, false, 2); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_tdma_duration_adjust(btcoexist, true, true, 2); ++ else { ++ coex_dm->auto_tdma_adjust = false; ++ halbtc8812a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 82); ++ } ++ ++ /* decrease BT power */ ++ if (BTC_RSSI_LOW(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8812a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); ++ ++ /* limited Rx */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ else if (BTC_RSSI_LOW(wifi_rssi_state) && ++ (!BTC_RSSI_LOW(bt_rssi_state))) ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ else ++ halbtc8812a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, ++ 0x8); ++ ++ /* fw dac swing level */ ++ halbtc8812a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if (BTC_RSSI_HIGH(wifi_rssi_state)) { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8812a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8812a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++ ++void halbtc8812a2ant_coex_under_5g(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8812a2ant_coex_all_off(btcoexist); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Under 5G, force set BT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_ignore_wlan_act(btcoexist, NORMAL_EXEC, true); ++} ++/* **************************************************** */ ++void halbtc8812a2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ boolean wifi_under_5g = false; ++ u8 algorithm = 0; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->under_ips) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is under IPS !!!\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ if (wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_coex_under_5g(btcoexist); ++ return; ++ } ++ ++ ++ algorithm = halbtc8812a2ant_action_algorithm(btcoexist); ++ if (coex_sta->c2h_bt_inquiry_page && ++ (BT_8812A_2ANT_COEX_ALGO_PANHS != algorithm)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is under inquiry/page scan !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_bt_inquiry(btcoexist); ++ return; ++ } ++ ++ coex_dm->cur_algorithm = algorithm; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n", ++ coex_dm->cur_algorithm); ++ BTC_TRACE(trace_buf); ++ ++ if (halbtc8812a2ant_is_common_action(btcoexist)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant common.\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->auto_tdma_adjust = false; ++ coex_dm->auto_tdma_adjust_low_rssi = false; ++ } else { ++ if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n", ++ coex_dm->pre_algorithm, coex_dm->cur_algorithm); ++ BTC_TRACE(trace_buf); ++ coex_dm->auto_tdma_adjust = false; ++ coex_dm->auto_tdma_adjust_low_rssi = false; ++ } ++ switch (coex_dm->cur_algorithm) { ++ case BT_8812A_2ANT_COEX_ALGO_SCO: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = SCO.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_sco(btcoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_SCO_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = SCO+HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_sco_hid(btcoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_hid(btcoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_a2dp(btcoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_a2dp_pan_hs(btcoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_pan_edr(btcoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HS mode.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_pan_hs(btcoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_pan_edr_a2dp(btcoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_PANEDR_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_pan_edr_hid(btcoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_hid_a2dp_pan_edr( ++ btcoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN(HS).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_hid_a2dp_pan_hs( ++ btcoexist); ++ break; ++ case BT_8812A_2ANT_COEX_ALGO_HID_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_action_hid_a2dp(btcoexist); ++ break; ++ default: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_coex_all_off(btcoexist); ++ break; ++ } ++ coex_dm->pre_algorithm = coex_dm->cur_algorithm; ++ } ++ ++} ++ ++void halbtc8812a2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean back_up) ++{ ++ u8 u8tmp = 0; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 2Ant Init HW Config!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (back_up) { ++ /* backup rf 0x1e value */ ++ coex_dm->bt_rf_0x1e_backup = ++ btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e, ++ 0xfffff); ++ ++ coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, ++ 0x430); ++ coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, ++ 0x434); ++ coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( ++ btcoexist, 0x42a); ++ coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte( ++ btcoexist, 0x456); ++ } ++ ++ /* ant sw control to BT */ ++ halbtc8812a2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_CPL_AUX, true, ++ false); ++ ++ /* 0x790[5:0]=0x5 */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); ++ u8tmp &= 0xc0; ++ u8tmp |= 0x5; ++ btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp); ++ ++ /* PTA parameter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, 0xffff); ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, 0x55555555); ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, 0x55555555); ++ ++ /* coex parameters */ ++ btcoexist->btc_write_1byte(btcoexist, 0x778, 0x1); ++ ++ /* enable counter statistics */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); ++ ++ /* enable PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20); ++ ++ /* bt clock related */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x4); ++ u8tmp |= BIT(7); ++ btcoexist->btc_write_1byte(btcoexist, 0x4, u8tmp); ++ ++ /* bt clock related */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7); ++ u8tmp |= BIT(1); ++ btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp); ++} ++ ++/* ************************************************************ ++ * work around function start with wa_halbtc8812a2ant_ ++ * ************************************************************ ++ * ************************************************************ ++ * extern function start with ex_halbtc8812a2ant_ ++ * ************************************************************ */ ++void ex_halbtc8812a2ant_power_on_setting(IN struct btc_coexist *btcoexist) ++{ ++} ++ ++void ex_halbtc8812a2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only) ++{ ++ halbtc8812a2ant_init_hw_config(btcoexist, true); ++ btcoexist->stop_coex_dm = false; ++} ++ ++void ex_halbtc8812a2ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Coex Mechanism Init!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->stop_coex_dm = false; ++ halbtc8812a2ant_init_coex_dm(btcoexist); ++} ++ ++void ex_halbtc8812a2ant_display_coex_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ u8 *cli_buf = btcoexist->cli_buf; ++ u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; ++ u16 u16tmp[4]; ++ u32 u32tmp[4]; ++ u32 fw_ver = 0, bt_patch_ver = 0; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cli_buf); ++ ++ if (btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ ++ if (btcoexist->stop_coex_dm) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Coex is STOPPED]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "Ant PG number/ Ant mechanism:", ++ board_info->pg_ant_num, board_info->btdm_ant_num); ++ CL_PRINTF(cli_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", ++ "CoexVer/ FwVer/ PatchVer", ++ glcoex_ver_date_8812a_2ant, glcoex_ver_8812a_2ant, fw_ver, ++ bt_patch_ver, bt_patch_ver); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", ++ "Wifi channel informed to BT", ++ coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1], ++ coex_dm->wifi_chnl_info[2]); ++ CL_PRINTF(cli_buf); ++ ++ /* wifi status */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Wifi Status]============"); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[BT Status]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", ++ "BT [status/ rssi/ retryCnt]", ++ ((coex_sta->bt_disabled) ? ("disabled") : (( ++ coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") ++ : ((BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) ? "non-connected idle" : ++ ((BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status) ++ ? "connected-idle" : "busy")))), ++ coex_sta->bt_rssi, coex_sta->bt_retry_cnt); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", ++ "SCO/HID/PAN/A2DP", ++ bt_link_info->sco_exist, bt_link_info->hid_exist, ++ bt_link_info->pan_exist, bt_link_info->a2dp_exist); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Info A2DP rate", ++ (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate"); ++ CL_PRINTF(cli_buf); ++ ++ for (i = 0; i < BT_INFO_SRC_8812A_2ANT_MAX; i++) { ++ if (coex_sta->bt_info_c2h_cnt[i]) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", ++ glbt_info_src_8812a_2ant[i], ++ coex_sta->bt_info_c2h[i][0], ++ coex_sta->bt_info_c2h[i][1], ++ coex_sta->bt_info_c2h[i][2], ++ coex_sta->bt_info_c2h[i][3], ++ coex_sta->bt_info_c2h[i][4], ++ coex_sta->bt_info_c2h[i][5], ++ coex_sta->bt_info_c2h[i][6], ++ coex_sta->bt_info_c2h_cnt[i]); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ /* Sw mechanism */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Sw mechanism]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", ++ "SM1[ShRf/ LpRA/ LimDig]", ++ coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra, ++ coex_dm->limited_dig); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", ++ "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", ++ coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off, ++ coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl); ++ CL_PRINTF(cli_buf); ++ ++ /* Fw mechanism */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Fw mechanism]============"); ++ CL_PRINTF(cli_buf); ++ ++ ps_tdma_case = coex_dm->cur_ps_tdma; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d/%d)", ++ "PS TDMA", ++ coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1], ++ coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3], ++ coex_dm->ps_tdma_para[4], ++ ps_tdma_case, coex_dm->auto_tdma_adjust, ++ coex_dm->auto_tdma_adjust_low_rssi); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "DecBtPwr/ IgnWlanAct", ++ coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act); ++ CL_PRINTF(cli_buf); ++ ++ /* Hw setting */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Hw setting]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", ++ "RF-A, 0x1e initVal", ++ coex_dm->bt_rf_0x1e_backup); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", ++ "backup ARFR1/ARFR2/RL/AMaxTime", ++ coex_dm->backup_arfr_cnt1, coex_dm->backup_arfr_cnt2, ++ coex_dm->backup_retry_limit, ++ coex_dm->backup_ampdu_max_time); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434); ++ u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", ++ "0x430/0x434/0x42a/0x456", ++ u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x ", ++ "0x778 (W_Act)/ 0x6cc (CoTab Sel)", ++ u8tmp[0], u8tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x8db); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xc5b); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x8db(ADC)/0xc5b[29:25](DAC)", ++ ((u8tmp[0] & 0x60) >> 5), ((u8tmp[1] & 0x3e) >> 1)); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xcb3); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xcb7); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0xcb3/ 0xcb7", ++ u8tmp[0], u8tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x974); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x40/ 0x4c[24:23]/ 0x974", ++ u8tmp[0], ((u32tmp[0] & 0x01800000) >> 23), u32tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x550(bcn ctrl)/0x522", ++ u32tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa0a); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0xc50(DIG)/0xa0a(CCK-TH)", ++ u32tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xf48); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0xf48/ 0xa5b (FA cnt-- OFDM : CCK)", ++ u32tmp[0], (u8tmp[0] << 8) + u8tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", ++ "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", ++ u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x770(high-pri rx/tx)", ++ coex_sta->high_priority_rx, coex_sta->high_priority_tx); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x774(low-pri rx/tx)", ++ coex_sta->low_priority_rx, coex_sta->low_priority_tx); ++ CL_PRINTF(cli_buf); ++#if (BT_AUTO_REPORT_ONLY_8812A_2ANT == 1) ++ halbtc8812a2ant_monitor_bt_ctr(btcoexist); ++#endif ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++void ex_halbtc8812a2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ boolean wifi_under_5g = false; ++ ++ if (btcoexist->manual_control || btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_IPS_ENTER == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS ENTER notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = true; ++ halbtc8812a2ant_coex_all_off(btcoexist); ++ halbtc8812a2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_CPL_AUX, ++ false, true); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS notify, force set BT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ex_halbtc8812a2ant_media_status_notify(btcoexist, ++ BTC_MEDIA_DISCONNECT); ++ } else if (BTC_IPS_LEAVE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS LEAVE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, ++ &wifi_under_5g); ++ if (!wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS notify, force set BT NOT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, ++ false); ++ } ++ } ++} ++ ++void ex_halbtc8812a2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ ++ if (btcoexist->manual_control || btcoexist->stop_coex_dm) ++ return; ++ ++ if (BTC_LPS_ENABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS ENABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = true; ++ } else if (BTC_LPS_DISABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS DISABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = false; ++ } ++} ++ ++void ex_halbtc8812a2ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (BTC_SCAN_START == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN START notify\n"); ++ BTC_TRACE(trace_buf); ++ } else if (BTC_SCAN_FINISH == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8812a2ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (BTC_ASSOCIATE_START == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT START notify\n"); ++ BTC_TRACE(trace_buf); ++ } else if (BTC_ASSOCIATE_FINISH == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8812a2ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u8 data_len = 5; ++ u8 buf[6] = {0}; ++ u8 h2c_parameter[3] = {0}; ++ u32 wifi_bw; ++ u8 wifi_central_chnl; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ ++ if (BTC_MEDIA_CONNECT == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA connect notify\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA disconnect notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ /* only 2.4G we need to inform bt the chnl mask */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ &wifi_central_chnl); ++ if ((BTC_MEDIA_CONNECT == type) && ++ (wifi_central_chnl <= 14)) { ++ h2c_parameter[0] = 0x1; ++ h2c_parameter[1] = wifi_central_chnl; ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ h2c_parameter[2] = 0x30; ++ else ++ h2c_parameter[2] = 0x20; ++ } ++ ++ coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; ++ coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; ++ coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; ++ ++ buf[0] = data_len; ++ buf[1] = 0x5; /* OP_Code */ ++ buf[2] = 0x3; /* OP_Code_Length */ ++ buf[3] = h2c_parameter[0]; /* OP_Code_Content */ ++ buf[4] = h2c_parameter[1]; ++ buf[5] = h2c_parameter[2]; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_CTRL_BT_COEX, ++ (void *)&buf[0]); ++} ++ ++void ex_halbtc8812a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (type == BTC_PACKET_DHCP) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], DHCP Packet notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++} ++ ++void ex_halbtc8812a2ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length) ++{ ++ u8 bt_info = 0; ++ u8 i, rsp_source = 0; ++ boolean bt_busy = false, limited_dig = false; ++ boolean wifi_connected = false, wifi_under_5g = false; ++ ++ coex_sta->c2h_bt_info_req_sent = false; ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ ++ rsp_source = tmp_buf[0] & 0xf; ++ if (rsp_source >= BT_INFO_SRC_8812A_2ANT_MAX) ++ rsp_source = BT_INFO_SRC_8812A_2ANT_WIFI_FW; ++ coex_sta->bt_info_c2h_cnt[rsp_source]++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source, ++ length); ++ BTC_TRACE(trace_buf); ++ for (i = 0; i < length; i++) { ++ coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; ++ if (i == 1) ++ bt_info = tmp_buf[i]; ++ if (i == length - 1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ ++ if (BT_INFO_SRC_8812A_2ANT_WIFI_FW != rsp_source) { ++ coex_sta->bt_retry_cnt = /* [3:0] */ ++ coex_sta->bt_info_c2h[rsp_source][2] & 0xf; ++ ++ coex_sta->bt_rssi = ++ coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10; ++ ++ coex_sta->bt_info_ext = ++ coex_sta->bt_info_c2h[rsp_source][4]; ++ ++ /* Here we need to resend some wifi info to BT */ ++ /* because bt is reset and loss of the info. */ ++ if ((coex_sta->bt_info_ext & BIT(1))) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (wifi_connected) ++ ex_halbtc8812a2ant_media_status_notify( ++ btcoexist, BTC_MEDIA_CONNECT); ++ else ++ ex_halbtc8812a2ant_media_status_notify( ++ btcoexist, BTC_MEDIA_DISCONNECT); ++ } ++ ++ if ((coex_sta->bt_info_ext & BIT(3)) && !wifi_under_5g) { ++ /* BT already ignored WlanAct */ ++ if (!btcoexist->manual_control && ++ !btcoexist->stop_coex_dm) { ++ if (!coex_sta->under_ips) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_ignore_wlan_act( ++ btcoexist, FORCE_EXEC, false); ++ } ++ } ++ } else { ++ /* BT already NOT ignore Wlan active, do nothing here. */ ++ ++ if (coex_sta->under_ips) { ++ /* work around for 8812a combo hw bug => when IPS, wlanAct is always high. */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is under IPS, set BT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_ignore_wlan_act(btcoexist, ++ FORCE_EXEC, true); ++ } ++ } ++ } ++ ++ /* check BIT2 first ==> check if bt is under inquiry or page scan */ ++ if (bt_info & BT_INFO_8812A_2ANT_B_INQ_PAGE) ++ coex_sta->c2h_bt_inquiry_page = true; ++ else ++ coex_sta->c2h_bt_inquiry_page = false; ++ ++ /* set link exist status */ ++ if (!(bt_info & BT_INFO_8812A_2ANT_B_CONNECTION)) { ++ coex_sta->bt_link_exist = false; ++ coex_sta->pan_exist = false; ++ coex_sta->a2dp_exist = false; ++ coex_sta->hid_exist = false; ++ coex_sta->sco_exist = false; ++ coex_sta->acl_busy = false; ++ } else { /* connection exists */ ++ coex_sta->bt_link_exist = true; ++ if (bt_info & BT_INFO_8812A_2ANT_B_FTP) ++ coex_sta->pan_exist = true; ++ else ++ coex_sta->pan_exist = false; ++ if (bt_info & BT_INFO_8812A_2ANT_B_A2DP) ++ coex_sta->a2dp_exist = true; ++ else ++ coex_sta->a2dp_exist = false; ++ if (bt_info & BT_INFO_8812A_2ANT_B_HID) ++ coex_sta->hid_exist = true; ++ else ++ coex_sta->hid_exist = false; ++ if (bt_info & BT_INFO_8812A_2ANT_B_SCO_ESCO) ++ coex_sta->sco_exist = true; ++ else ++ coex_sta->sco_exist = false; ++ if (bt_info & BT_INFO_8812A_2ANT_B_ACL_BUSY) ++ coex_sta->acl_busy = true; ++ else ++ coex_sta->acl_busy = false; ++ ++ } ++ ++ halbtc8812a2ant_update_bt_link_info(btcoexist); ++ ++ if (!(bt_info & BT_INFO_8812A_2ANT_B_CONNECTION)) { ++ coex_dm->bt_status = BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info == ++ BT_INFO_8812A_2ANT_B_CONNECTION) { /* connection exists but no busy */ ++ coex_dm->bt_status = BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if ((bt_info & BT_INFO_8812A_2ANT_B_SCO_ESCO) || ++ (bt_info & BT_INFO_8812A_2ANT_B_SCO_BUSY)) { ++ coex_dm->bt_status = BT_8812A_2ANT_BT_STATUS_SCO_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info & BT_INFO_8812A_2ANT_B_ACL_BUSY) { ++ coex_dm->bt_status = BT_8812A_2ANT_BT_STATUS_ACL_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ coex_dm->bt_status = BT_8812A_2ANT_BT_STATUS_MAX; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if ((BT_8812A_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8812A_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8812A_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) { ++ bt_busy = true; ++ if (!wifi_under_5g) ++ limited_dig = true; ++ } else { ++ bt_busy = false; ++ limited_dig = false; ++ } ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ coex_dm->limited_dig = limited_dig; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig); ++ ++ halbtc8812a2ant_run_coexist_mechanism(btcoexist); ++} ++ ++void ex_halbtc8812a2ant_rf_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], RF Status notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_RF_ON == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RF is turned ON!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->stop_coex_dm = false; ++ } ++ if (BTC_RF_OFF == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RF is turned OFF!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8812a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ true, 0x0, 0x0); ++ halbtc8812a2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); ++ /* halbtc8812a2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, FORCE_EXEC, false, true); */ ++ halbtc8812a2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ btcoexist->stop_coex_dm = true; ++ ++ } ++} ++ ++ ++void ex_halbtc8812a2ant_halt_notify(IN struct btc_coexist *btcoexist) ++{ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8812a2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_CPL_AUX, false, ++ true); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Halt notify, force set BT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8812a2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ex_halbtc8812a2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); ++ ++ /* 0x522=0xff, pause tx */ ++ btcoexist->btc_write_1byte(btcoexist, 0x522, 0xff); ++ /* 0x40[7:6]=2'b01, modify BT mode. */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0xc0, 0x2); ++ btcoexist->stop_coex_dm = true; ++} ++ ++void ex_halbtc8812a2ant_periodical(IN struct btc_coexist *btcoexist) ++{ ++#if (BT_AUTO_REPORT_ONLY_8812A_2ANT == 0) ++ halbtc8812a2ant_query_bt_info(btcoexist); ++ halbtc8812a2ant_monitor_bt_ctr(btcoexist); ++ halbtc8812a2ant_monitor_bt_enable_disable(btcoexist); ++#else ++ if (halbtc8812a2ant_is_wifi_status_changed(btcoexist) || ++ coex_dm->auto_tdma_adjust || ++ coex_dm->auto_tdma_adjust_low_rssi) ++ halbtc8812a2ant_run_coexist_mechanism(btcoexist); ++#endif ++} ++ ++void ex_halbtc8812a2ant_dbg_control(IN struct btc_coexist *btcoexist, ++ IN u8 op_code, IN u8 op_len, IN u8 *pdata) ++{ ++ switch (op_code) { ++ case BTC_DBG_SET_COEX_DEC_BT_PWR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set Dec BT power\n"); ++ BTC_TRACE(trace_buf); ++ { ++ u8 data_len = 4; ++ u8 buf[6] = {0}; ++ u8 dec_bt_pwr = 0, pwr_level = 0; ++ if (op_len == 2) { ++ dec_bt_pwr = pdata[0]; ++ pwr_level = pdata[1]; ++ ++ buf[0] = data_len; ++ buf[1] = 0x3; /* OP_Code */ ++ buf[2] = 0x2; /* OP_Code_Length */ ++ ++ buf[3] = dec_bt_pwr; /* OP_Code_Content */ ++ buf[4] = pwr_level; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set Dec BT power=%d, pwr_level=%d\n", ++ dec_bt_pwr, pwr_level); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_CTRL_BT_COEX, ++ (void *)&buf[0]); ++ } ++ } ++ break; ++ ++ case BTC_DBG_SET_COEX_BT_AFH_MAP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set BT AFH Map\n"); ++ BTC_TRACE(trace_buf); ++ { ++ u8 data_len = 5; ++ u8 buf[6] = {0}; ++ if (op_len == 3) { ++ buf[0] = data_len; ++ buf[1] = 0x5; /* OP_Code */ ++ buf[2] = 0x3; /* OP_Code_Length */ ++ ++ buf[3] = pdata[0]; /* OP_Code_Content */ ++ buf[4] = pdata[1]; ++ buf[5] = pdata[2]; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set BT AFH Map = %02x %02x %02x\n", ++ pdata[0], pdata[1], pdata[2]); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_CTRL_BT_COEX, ++ (void *)&buf[0]); ++ } ++ } ++ break; ++ ++ case BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set BT Ignore Wlan Active\n"); ++ BTC_TRACE(trace_buf); ++ { ++ u8 data_len = 3; ++ u8 buf[6] = {0}; ++ if (op_len == 1) { ++ buf[0] = data_len; ++ buf[1] = 0x1; /* OP_Code */ ++ buf[2] = 0x1; /* OP_Code_Length */ ++ ++ buf[3] = pdata[0]; /* OP_Code_Content */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set BT Ignore Wlan Active = 0x%x\n", ++ pdata[0]); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_CTRL_BT_COEX, ++ (void *)&buf[0]); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++} ++ ++#endif ++ ++#endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */ +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a2Ant.h +new file mode 100644 +index 0000000..be08dd3 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8812a2Ant.h +@@ -0,0 +1,202 @@ ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8812A_SUPPORT == 1) ++ ++/* ******************************************* ++ * The following is for 8812A 2Ant BT Co-exist definition ++ * ******************************************* */ ++#define BT_AUTO_REPORT_ONLY_8812A_2ANT 0 ++ ++#define BT_INFO_8812A_2ANT_B_FTP BIT(7) ++#define BT_INFO_8812A_2ANT_B_A2DP BIT(6) ++#define BT_INFO_8812A_2ANT_B_HID BIT(5) ++#define BT_INFO_8812A_2ANT_B_SCO_BUSY BIT(4) ++#define BT_INFO_8812A_2ANT_B_ACL_BUSY BIT(3) ++#define BT_INFO_8812A_2ANT_B_INQ_PAGE BIT(2) ++#define BT_INFO_8812A_2ANT_B_SCO_ESCO BIT(1) ++#define BT_INFO_8812A_2ANT_B_CONNECTION BIT(0) ++ ++#define BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT(0))) ? true : false) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT 2 ++ ++enum bt_info_src_8812a_2ant { ++ BT_INFO_SRC_8812A_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8812A_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8812A_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8812A_2ANT_MAX ++}; ++ ++enum bt_8812a_2ant_bt_status { ++ BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8812A_2ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8812A_2ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8812A_2ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8812A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8812A_2ANT_BT_STATUS_MAX ++}; ++ ++enum bt_8812a_2ant_coex_algo { ++ BT_8812A_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8812A_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8812A_2ANT_COEX_ALGO_SCO_HID = 0x2, ++ BT_8812A_2ANT_COEX_ALGO_HID = 0x3, ++ BT_8812A_2ANT_COEX_ALGO_A2DP = 0x4, ++ BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS = 0x5, ++ BT_8812A_2ANT_COEX_ALGO_PANEDR = 0x6, ++ BT_8812A_2ANT_COEX_ALGO_PANHS = 0x7, ++ BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8, ++ BT_8812A_2ANT_COEX_ALGO_PANEDR_HID = 0x9, ++ BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa, ++ BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS = 0xb, ++ BT_8812A_2ANT_COEX_ALGO_HID_A2DP = 0xc, ++ BT_8812A_2ANT_COEX_ALGO_MAX = 0xd ++}; ++ ++struct coex_dm_8812a_2ant { ++ /* fw mechanism */ ++ u8 pre_bt_dec_pwr_lvl; ++ u8 cur_bt_dec_pwr_lvl; ++ u8 pre_fw_dac_swing_lvl; ++ u8 cur_fw_dac_swing_lvl; ++ boolean cur_ignore_wlan_act; ++ boolean pre_ignore_wlan_act; ++ u8 pre_ps_tdma; ++ u8 cur_ps_tdma; ++ u8 ps_tdma_para[5]; ++ u8 ps_tdma_du_adj_type; ++ boolean auto_tdma_adjust; ++ boolean auto_tdma_adjust_low_rssi; ++ boolean pre_ps_tdma_on; ++ boolean cur_ps_tdma_on; ++ boolean pre_bt_auto_report; ++ boolean cur_bt_auto_report; ++ u8 pre_lps; ++ u8 cur_lps; ++ u8 pre_rpwm; ++ u8 cur_rpwm; ++ ++ /* sw mechanism */ ++ boolean pre_rf_rx_lpf_shrink; ++ boolean cur_rf_rx_lpf_shrink; ++ u32 bt_rf_0x1e_backup; ++ boolean pre_low_penalty_ra; ++ boolean cur_low_penalty_ra; ++ boolean pre_dac_swing_on; ++ u32 pre_dac_swing_lvl; ++ boolean cur_dac_swing_on; ++ u32 cur_dac_swing_lvl; ++ boolean pre_adc_back_off; ++ boolean cur_adc_back_off; ++ boolean pre_agc_table_en; ++ boolean cur_agc_table_en; ++ u32 pre_val0x6c0; ++ u32 cur_val0x6c0; ++ u32 pre_val0x6c4; ++ u32 cur_val0x6c4; ++ u32 pre_val0x6c8; ++ u32 cur_val0x6c8; ++ u8 pre_val0x6cc; ++ u8 cur_val0x6cc; ++ boolean limited_dig; ++ u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */ ++ u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */ ++ u16 backup_retry_limit; ++ u8 backup_ampdu_max_time; ++ ++ /* algorithm related */ ++ u8 pre_algorithm; ++ u8 cur_algorithm; ++ u8 bt_status; ++ u8 wifi_chnl_info[3]; ++ ++ u32 pre_ra_mask; ++ u32 cur_ra_mask; ++ u8 cur_ra_mask_type; ++ u8 pre_arfr_type; ++ u8 cur_arfr_type; ++ u8 pre_retry_limit_type; ++ u8 cur_retry_limit_type; ++ u8 pre_ampdu_time_type; ++ u8 cur_ampdu_time_type; ++}; ++ ++struct coex_sta_8812a_2ant { ++ boolean bt_disabled; ++ boolean bt_link_exist; ++ boolean sco_exist; ++ boolean a2dp_exist; ++ boolean hid_exist; ++ boolean pan_exist; ++ boolean acl_busy; ++ ++ boolean under_lps; ++ boolean under_ips; ++ u32 high_priority_tx; ++ u32 high_priority_rx; ++ u32 low_priority_tx; ++ u32 low_priority_rx; ++ u8 bt_rssi; ++ u8 pre_bt_rssi_state; ++ u8 pre_wifi_rssi_state[4]; ++ boolean c2h_bt_info_req_sent; ++ u8 bt_info_c2h[BT_INFO_SRC_8812A_2ANT_MAX][10]; ++ u32 bt_info_c2h_cnt[BT_INFO_SRC_8812A_2ANT_MAX]; ++ u32 bt_info_query_cnt; ++ boolean c2h_bt_inquiry_page; ++ u8 bt_retry_cnt; ++ u8 bt_info_ext; ++}; ++ ++/* ******************************************* ++ * The following is interface which will notify coex module. ++ * ******************************************* */ ++void ex_halbtc8812a2ant_power_on_setting(IN struct btc_coexist *btcoexist); ++void ex_halbtc8812a2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only); ++void ex_halbtc8812a2ant_init_coex_dm(IN struct btc_coexist *btcoexist); ++void ex_halbtc8812a2ant_ips_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a2ant_lps_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a2ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a2ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a2ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8812a2ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length); ++void ex_halbtc8812a2ant_rf_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++ ++void ex_halbtc8812a2ant_halt_notify(IN struct btc_coexist *btcoexist); ++void ex_halbtc8812a2ant_periodical(IN struct btc_coexist *btcoexist); ++void ex_halbtc8812a2ant_display_coex_info(IN struct btc_coexist *btcoexist); ++void ex_halbtc8812a2ant_dbg_control(IN struct btc_coexist *btcoexist, ++ IN u8 op_code, IN u8 op_len, IN u8 *pdata); ++ ++#else ++#define ex_halbtc8812a2ant_power_on_setting(btcoexist) ++#define ex_halbtc8812a2ant_init_hw_config(btcoexist, wifi_only) ++#define ex_halbtc8812a2ant_init_coex_dm(btcoexist) ++#define ex_halbtc8812a2ant_ips_notify(btcoexist, type) ++#define ex_halbtc8812a2ant_lps_notify(btcoexist, type) ++#define ex_halbtc8812a2ant_scan_notify(btcoexist, type) ++#define ex_halbtc8812a2ant_connect_notify(btcoexist, type) ++#define ex_halbtc8812a2ant_media_status_notify(btcoexist, type) ++#define ex_halbtc8812a2ant_specific_packet_notify(btcoexist, type) ++#define ex_halbtc8812a2ant_bt_info_notify(btcoexist, tmp_buf, length) ++#define ex_halbtc8812a2ant_rf_status_notify(btcoexist, type) ++#define ex_halbtc8812a2ant_halt_notify(btcoexist) ++#define ex_halbtc8812a2ant_periodical(btcoexist) ++#define ex_halbtc8812a2ant_display_coex_info(btcoexist) ++#define ex_halbtc8812a2ant_dbg_control(btcoexist, op_code, op_len, pdata) ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a1Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a1Ant.c +new file mode 100644 +index 0000000..81ddf03 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a1Ant.c +@@ -0,0 +1,3100 @@ ++/* ************************************************************ ++ * Description: ++ * ++ * This file is for 8821A_1ANT Co-exist mechanism ++ * ++ * History ++ * 2012/11/15 Cosa first check in. ++ * ++ * ************************************************************ ++ * SY modify 2015/04/27 ++ * ************************************************************ ++ * include files ++ * ************************************************************ */ ++#include "Mp_Precomp.h" ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8821A_SUPPORT == 1) ++/* ************************************************************ ++ * Global variables, these are static variables ++ * ************************************************************ */ ++static u8 *trace_buf = &gl_btc_trace_buf[0]; ++static struct coex_dm_8821a_1ant glcoex_dm_8821a_1ant; ++static struct coex_dm_8821a_1ant *coex_dm = &glcoex_dm_8821a_1ant; ++static struct coex_sta_8821a_1ant glcoex_sta_8821a_1ant; ++static struct coex_sta_8821a_1ant *coex_sta = &glcoex_sta_8821a_1ant; ++ ++const char *const glbt_info_src_8821a_1ant[] = { ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u32 glcoex_ver_date_8821a_1ant = 20150615; ++u32 glcoex_ver_8821a_1ant = 0x61; ++ ++/* ************************************************************ ++ * local function proto type if needed ++ * ************************************************************ ++ * ************************************************************ ++ * local function start with halbtc8821a1ant_ ++ * ************************************************************ */ ++u8 halbtc8821a1ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1) ++{ ++ s32 bt_rssi = 0; ++ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; ++ ++ bt_rssi = coex_sta->bt_rssi; ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Rssi thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_bt_rssi_state; ++ } ++ ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (bt_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (bt_rssi < rssi_thresh1) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_bt_rssi_state = bt_rssi_state; ++ ++ return bt_rssi_state; ++} ++ ++u8 halbtc8821a1ant_wifi_rssi_state(IN struct btc_coexist *btcoexist, ++ IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1) ++{ ++ s32 wifi_rssi = 0; ++ u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi RSSI thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_wifi_rssi_state[index]; ++ } ++ ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (wifi_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (wifi_rssi < rssi_thresh1) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; ++ ++ return wifi_rssi_state; ++} ++ ++void halbtc8821a1ant_update_ra_mask(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 dis_rate_mask) ++{ ++ coex_dm->cur_ra_mask = dis_rate_mask; ++ ++ if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, ++ &coex_dm->cur_ra_mask); ++ coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; ++} ++ ++void halbtc8821a1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ boolean wifi_under_b_mode = false; ++ ++ coex_dm->cur_arfr_type = type; ++ ++ if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { ++ switch (coex_dm->cur_arfr_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_4byte(btcoexist, 0x430, ++ coex_dm->backup_arfr_cnt1); ++ btcoexist->btc_write_4byte(btcoexist, 0x434, ++ coex_dm->backup_arfr_cnt2); ++ break; ++ case 1: ++ btcoexist->btc_get(btcoexist, ++ BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x01010101); ++ } else { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; ++} ++ ++void halbtc8821a1ant_retry_limit(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_retry_limit_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_retry_limit_type != ++ coex_dm->cur_retry_limit_type)) { ++ switch (coex_dm->cur_retry_limit_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ coex_dm->backup_retry_limit); ++ break; ++ case 1: /* retry limit=8 */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; ++} ++ ++void halbtc8821a1ant_ampdu_max_time(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_ampdu_time_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) { ++ switch (coex_dm->cur_ampdu_time_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ coex_dm->backup_ampdu_max_time); ++ break; ++ case 1: /* AMPDU timw = 0x38 * 32us */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ 0x38); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; ++} ++ ++void halbtc8821a1ant_limited_tx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type, ++ IN u8 retry_limit_type, IN u8 ampdu_time_type) ++{ ++ switch (ra_mask_type) { ++ case 0: /* normal mode */ ++ halbtc8821a1ant_update_ra_mask(btcoexist, force_exec, ++ 0x0); ++ break; ++ case 1: /* disable cck 1/2 */ ++ halbtc8821a1ant_update_ra_mask(btcoexist, force_exec, ++ 0x00000003); ++ break; ++ case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ ++ halbtc8821a1ant_update_ra_mask(btcoexist, force_exec, ++ 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8821a1ant_auto_rate_fallback_retry(btcoexist, force_exec, ++ arfr_type); ++ halbtc8821a1ant_retry_limit(btcoexist, force_exec, retry_limit_type); ++ halbtc8821a1ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type); ++} ++ ++ ++/* ture/xxxx/x:1 ++ * false/false/x: 64 ++ * false/ture/x:x */ ++void halbtc8821a1ant_limited_rx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rej_ap_agg_pkt, ++ IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size) ++{ ++ boolean reject_rx_agg = rej_ap_agg_pkt; ++ boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; ++ u8 rx_agg_size = agg_buf_size; ++ ++ /* ============================================ */ ++ /* Rx Aggregation related setting */ ++ /* ============================================ */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ &reject_rx_agg); ++ /* decide BT control aggregation buf size or not */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ &bt_ctrl_rx_agg_size); ++ /* aggregation buf size, only work when BT control Rx aggregation size. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); ++ /* real update aggregation setting */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++ ++ ++} ++ ++void halbtc8821a1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist) ++{ ++ u32 reg_hp_txrx, reg_lp_txrx, u32tmp; ++ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; ++#if 0 ++ /* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */ ++ if (!(btcoexist->btc_read_1byte(btcoexist, 0x76e) & 0x8)) { ++ coex_sta->high_priority_tx = 65535; ++ coex_sta->high_priority_rx = 65535; ++ coex_sta->low_priority_tx = 65535; ++ coex_sta->low_priority_rx = 65535; ++ return; ++ } ++#endif ++ reg_hp_txrx = 0x770; ++ reg_lp_txrx = 0x774; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); ++ reg_hp_tx = u32tmp & MASKLWORD; ++ reg_hp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); ++ reg_lp_tx = u32tmp & MASKLWORD; ++ reg_lp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ coex_sta->high_priority_tx = reg_hp_tx; ++ coex_sta->high_priority_rx = reg_hp_rx; ++ coex_sta->low_priority_tx = reg_lp_tx; ++ coex_sta->low_priority_rx = reg_lp_rx; ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); ++} ++ ++void halbtc8821a1ant_query_bt_info(IN struct btc_coexist *btcoexist) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ coex_sta->c2h_bt_info_req_sent = true; ++ ++ h2c_parameter[0] |= BIT(0); /* trigger */ ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); ++} ++ ++boolean halbtc8821a1ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist) ++{ ++ static boolean pre_wifi_busy = false, pre_under_4way = false, ++ pre_bt_hs_on = false; ++ boolean wifi_busy = false, under_4way = false, bt_hs_on = false; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ ++ if (wifi_connected) { ++ if (wifi_busy != pre_wifi_busy) { ++ pre_wifi_busy = wifi_busy; ++ return true; ++ } ++ if (under_4way != pre_under_4way) { ++ pre_under_4way = under_4way; ++ return true; ++ } ++ if (bt_hs_on != pre_bt_hs_on) { ++ pre_bt_hs_on = bt_hs_on; ++ return true; ++ } ++ } ++ ++ return false; ++} ++ ++void halbtc8821a1ant_update_bt_link_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ bt_link_info->bt_link_exist = coex_sta->bt_link_exist; ++ bt_link_info->sco_exist = coex_sta->sco_exist; ++ bt_link_info->a2dp_exist = coex_sta->a2dp_exist; ++ bt_link_info->pan_exist = coex_sta->pan_exist; ++ bt_link_info->hid_exist = coex_sta->hid_exist; ++ ++ /* work around for HS mode. */ ++ if (bt_hs_on) { ++ bt_link_info->pan_exist = true; ++ bt_link_info->bt_link_exist = true; ++ } ++ ++ /* check if Sco only */ ++ if (bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->sco_only = true; ++ else ++ bt_link_info->sco_only = false; ++ ++ /* check if A2dp only */ ++ if (!bt_link_info->sco_exist && ++ bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->a2dp_only = true; ++ else ++ bt_link_info->a2dp_only = false; ++ ++ /* check if Pan only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->pan_only = true; ++ else ++ bt_link_info->pan_only = false; ++ ++ /* check if Hid only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ bt_link_info->hid_exist) ++ bt_link_info->hid_only = true; ++ else ++ bt_link_info->hid_only = false; ++} ++ ++u8 halbtc8821a1ant_action_algorithm(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ u8 algorithm = BT_8821A_1ANT_COEX_ALGO_UNDEFINED; ++ u8 num_of_diff_profile = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ if (!bt_link_info->bt_link_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], No BT link exists!!!\n"); ++ BTC_TRACE(trace_buf); ++ return algorithm; ++ } ++ ++ if (bt_link_info->sco_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->hid_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->pan_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->a2dp_exist) ++ num_of_diff_profile++; ++ ++ if (num_of_diff_profile == 1) { ++ if (bt_link_info->sco_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; ++ } else { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_A2DP; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = PAN(HS) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = PAN(EDR) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 2) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID_A2DP; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_1ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile >= 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_1ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++void halbtc8821a1ant_set_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean enable_auto_report) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = 0; ++ ++ if (enable_auto_report) ++ h2c_parameter[0] |= BIT(0); ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); ++} ++ ++void halbtc8821a1ant_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable_auto_report) ++{ ++ coex_dm->cur_bt_auto_report = enable_auto_report; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) ++ return; ++ } ++ halbtc8821a1ant_set_bt_auto_report(btcoexist, ++ coex_dm->cur_bt_auto_report); ++ ++ coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; ++} ++ ++void halbtc8821a1ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist ++ *btcoexist, IN boolean low_penalty_ra) ++{ ++ u8 h2c_parameter[6] = {0}; ++ ++ h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */ ++ ++ if (low_penalty_ra) { ++ h2c_parameter[1] |= BIT(0); ++ h2c_parameter[2] = ++ 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */ ++ h2c_parameter[3] = 0xf5; /* MCS7 or OFDM54 */ ++ h2c_parameter[4] = 0xa0; /* MCS6 or OFDM48// */ ++ h2c_parameter[5] = 0xa0; /* MCS5 or OFDM36 // */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter); ++} ++ ++void halbtc8821a1ant_low_penalty_ra(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean low_penalty_ra) ++{ ++ coex_dm->cur_low_penalty_ra = low_penalty_ra; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) ++ return; ++ } ++ halbtc8821a1ant_set_sw_penalty_tx_rate_adaptive(btcoexist, ++ coex_dm->cur_low_penalty_ra); ++ ++ coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; ++} ++ ++void halbtc8821a1ant_set_coex_table(IN struct btc_coexist *btcoexist, ++ IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); ++} ++ ++void halbtc8821a1ant_coex_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4, ++ IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ coex_dm->cur_val0x6c0 = val0x6c0; ++ coex_dm->cur_val0x6c4 = val0x6c4; ++ coex_dm->cur_val0x6c8 = val0x6c8; ++ coex_dm->cur_val0x6cc = val0x6cc; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && ++ (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && ++ (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && ++ (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) ++ return; ++ } ++ halbtc8821a1ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, ++ val0x6cc); ++ ++ coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; ++ coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; ++ coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; ++ coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; ++} ++ ++void halbtc8821a1ant_coex_table_with_type(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** CoexTable(%d) **********\n", type); ++ BTC_TRACE(trace_buf); ++ ++ switch (type) { ++ case 0: ++ halbtc8821a1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8821a1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8821a1ant_coex_table(btcoexist, force_exec, ++ 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8821a1ant_coex_table(btcoexist, force_exec, ++ 0x5a5a5a5a, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8821a1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8821a1ant_coex_table(btcoexist, force_exec, ++ 0x5a5a5a5a, 0xaaaa5a5a, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8821a1ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8821a1ant_coex_table(btcoexist, force_exec, ++ 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8821a1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean enable) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ if (enable) { ++ h2c_parameter[0] |= BIT(0); /* function enable */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); ++} ++ ++void halbtc8821a1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable) ++{ ++ coex_dm->cur_ignore_wlan_act = enable; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_ignore_wlan_act == ++ coex_dm->cur_ignore_wlan_act) ++ return; ++ } ++ halbtc8821a1ant_set_fw_ignore_wlan_act(btcoexist, enable); ++ ++ coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; ++} ++ ++void halbtc8821a1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist, ++ IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5) ++{ ++ u8 h2c_parameter[5] = {0}; ++ u8 real_byte1 = byte1, real_byte5 = byte5; ++ boolean ap_enable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ ++ if (ap_enable) { ++ if (byte1 & BIT(4) && !(byte1 & BIT(5))) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], FW for 1Ant AP mode\n"); ++ BTC_TRACE(trace_buf); ++ real_byte1 &= ~BIT(4); ++ real_byte1 |= BIT(5); ++ ++ real_byte5 |= BIT(5); ++ real_byte5 &= ~BIT(6); ++ } ++ } ++ ++ h2c_parameter[0] = real_byte1; ++ h2c_parameter[1] = byte2; ++ h2c_parameter[2] = byte3; ++ h2c_parameter[3] = byte4; ++ h2c_parameter[4] = real_byte5; ++ ++ coex_dm->ps_tdma_para[0] = real_byte1; ++ coex_dm->ps_tdma_para[1] = byte2; ++ coex_dm->ps_tdma_para[2] = byte3; ++ coex_dm->ps_tdma_para[3] = byte4; ++ coex_dm->ps_tdma_para[4] = real_byte5; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); ++} ++ ++void halbtc8821a1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN u8 lps_val, IN u8 rpwm_val) ++{ ++ u8 lps = lps_val; ++ u8 rpwm = rpwm_val; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps); ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++void halbtc8821a1ant_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ coex_dm->cur_lps = lps_val; ++ coex_dm->cur_rpwm = rpwm_val; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_lps == coex_dm->cur_lps) && ++ (coex_dm->pre_rpwm == coex_dm->cur_rpwm)) ++ return; ++ } ++ halbtc8821a1ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val); ++ ++ coex_dm->pre_lps = coex_dm->cur_lps; ++ coex_dm->pre_rpwm = coex_dm->cur_rpwm; ++} ++ ++void halbtc8821a1ant_sw_mechanism(IN struct btc_coexist *btcoexist, ++ IN boolean low_penalty_ra) ++{ ++ halbtc8821a1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); ++} ++ ++void halbtc8821a1ant_set_ant_path(IN struct btc_coexist *btcoexist, ++ IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ u32 u32tmp = 0; ++ u8 h2c_parameter[2] = {0}; ++ ++ if (init_hwcfg) { ++ /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp &= ~BIT(23); ++ u32tmp |= BIT(24); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ ++ /* 0x765 = 0x18 */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x765, 0x18, 0x3); ++ ++ if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) { ++ /* tell firmware "antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix */ ++ h2c_parameter[0] = 1; ++ h2c_parameter[1] = 1; ++ btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, ++ h2c_parameter); ++ ++ /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1, 0x1); //Main Ant to BT for IPS case 0x4c[23]=1 */ ++ } else { ++ /* tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix */ ++ h2c_parameter[0] = 0; ++ h2c_parameter[1] = 1; ++ btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, ++ h2c_parameter); ++ ++ /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1, 0x0); //Aux Ant to BT for IPS case 0x4c[23]=1 */ ++ } ++ } else if (wifi_off) { ++ /* 0x4c[24:23]=00, Set Antenna control by BT_RFE_CTRL BT Vendor 0xac=0xf002 */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp &= ~BIT(23); ++ u32tmp &= ~BIT(24); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ ++ /* 0x765 = 0x18 */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x765, 0x18, 0x3); ++ } else { ++ /* 0x765 = 0x0 */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x765, 0x18, 0x0); ++ } ++ ++ /* ext switch setting */ ++ switch (ant_pos_type) { ++ case BTC_ANT_PATH_WIFI: ++ btcoexist->btc_write_1byte(btcoexist, 0xcb4, 0x77); ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) ++ btcoexist->btc_write_1byte_bitmask(btcoexist, ++ 0xcb7, 0x30, 0x1); ++ else ++ btcoexist->btc_write_1byte_bitmask(btcoexist, ++ 0xcb7, 0x30, 0x2); ++ break; ++ case BTC_ANT_PATH_BT: ++ btcoexist->btc_write_1byte(btcoexist, 0xcb4, 0x77); ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) ++ btcoexist->btc_write_1byte_bitmask(btcoexist, ++ 0xcb7, 0x30, 0x2); ++ else ++ btcoexist->btc_write_1byte_bitmask(btcoexist, ++ 0xcb7, 0x30, 0x1); ++ break; ++ default: ++ case BTC_ANT_PATH_PTA: ++ btcoexist->btc_write_1byte(btcoexist, 0xcb4, 0x66); ++ if (board_info->btdm_ant_pos == ++ BTC_ANTENNA_AT_MAIN_PORT) ++ btcoexist->btc_write_1byte_bitmask(btcoexist, ++ 0xcb7, 0x30, 0x1); ++ else ++ btcoexist->btc_write_1byte_bitmask(btcoexist, ++ 0xcb7, 0x30, 0x2); ++ break; ++ } ++} ++ ++void halbtc8821a1ant_ps_tdma(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean turn_on, IN u8 type) ++{ ++ u8 rssi_adjust_val = 0; ++ /* u32 fw_ver=0; */ ++ ++ coex_dm->cur_ps_tdma_on = turn_on; ++ coex_dm->cur_ps_tdma = type; ++ ++ if (coex_dm->cur_ps_tdma_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** TDMA(on, %d) **********\n", ++ coex_dm->cur_ps_tdma); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ********** TDMA(off, %d) **********\n", ++ coex_dm->cur_ps_tdma); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && ++ (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) ++ return; ++ } ++ if (turn_on) { ++ switch (type) { ++ default: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x1a, 0x1a, 0x0, 0x50); ++ break; ++ case 1: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x3a, 0x03, 0x10, 0x50); ++ rssi_adjust_val = 11; ++ break; ++ case 2: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x2b, 0x03, 0x10, 0x50); ++ rssi_adjust_val = 14; ++ break; ++ case 3: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x1d, 0x1d, 0x0, 0x52); ++ break; ++ case 4: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x15, 0x3, 0x14, 0x0); ++ rssi_adjust_val = 17; ++ break; ++ case 5: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x15, 0x3, 0x11, 0x10); ++ break; ++ case 6: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x20, 0x3, 0x11, 0x13); ++ break; ++ case 7: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xc, 0x5, 0x0, 0x0); ++ break; ++ case 8: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x25, 0x3, 0x10, 0x0); ++ break; ++ case 9: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x21, 0x3, 0x10, 0x50); ++ rssi_adjust_val = 18; ++ break; ++ case 10: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xa, 0xa, 0x0, 0x40); ++ break; ++ case 11: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x15, 0x03, 0x10, 0x50); ++ rssi_adjust_val = 20; ++ break; ++ case 12: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x0a, 0x0a, 0x0, 0x50); ++ break; ++ case 13: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x12, 0x12, 0x0, 0x50); ++ break; ++ case 14: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x1e, 0x3, 0x10, 0x14); ++ break; ++ case 15: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x13, ++ 0xa, 0x3, 0x8, 0x0); ++ break; ++ case 16: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x15, 0x3, 0x10, 0x0); ++ rssi_adjust_val = 18; ++ break; ++ case 18: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x93, ++ 0x25, 0x3, 0x10, 0x0); ++ rssi_adjust_val = 14; ++ break; ++ case 20: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x35, 0x03, 0x11, 0x10); ++ break; ++ case 21: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x25, 0x03, 0x11, 0x11); ++ break; ++ case 22: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x25, 0x03, 0x11, 0x10); ++ break; ++ case 23: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x3, 0x31, 0x18); ++ rssi_adjust_val = 22; ++ break; ++ case 24: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x15, 0x3, 0x31, 0x18); ++ rssi_adjust_val = 22; ++ break; ++ case 25: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0xa, 0x3, 0x31, 0x18); ++ rssi_adjust_val = 22; ++ break; ++ case 26: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0xa, 0x3, 0x31, 0x18); ++ rssi_adjust_val = 22; ++ break; ++ case 27: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x3, 0x31, 0x98); ++ rssi_adjust_val = 22; ++ break; ++ case 28: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x69, ++ 0x25, 0x3, 0x31, 0x0); ++ break; ++ case 29: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xab, ++ 0x1a, 0x1a, 0x1, 0x10); ++ break; ++ case 30: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x30, 0x3, 0x10, 0x10); ++ break; ++ case 31: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x1a, 0x1a, 0, 0x58); ++ break; ++ case 32: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x61, ++ 0x35, 0x3, 0x11, 0x11); ++ break; ++ case 33: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xa3, ++ 0x25, 0x3, 0x30, 0x90); ++ break; ++ case 34: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x53, ++ 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 35: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x63, ++ 0x1a, 0x1a, 0x0, 0x10); ++ break; ++ case 36: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x12, 0x3, 0x14, 0x50); ++ break; ++ case 40: /* SoftAP only with no sta associated,BT disable ,TDMA mode for power saving */ ++ /* here softap mode screen off will cost 70-80mA for phone */ ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x23, ++ 0x18, 0x00, 0x10, 0x24); ++ break; ++ case 41: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x15, 0x3, 0x11, 0x11); ++ break; ++ case 42: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x20, 0x3, 0x11, 0x11); ++ break; ++ case 43: ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, ++ 0x30, 0x3, 0x10, 0x11); ++ break; ++ } ++ } else { ++ /* disable PS tdma */ ++ switch (type) { ++ case 8: /* PTA Control */ ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x8, ++ 0x0, 0x0, 0x0, 0x0); ++ halbtc8821a1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_PTA, false, false); ++ break; ++ case 0: ++ default: /* Software control, Antenna at BT side */ ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x0, 0x0); ++ halbtc8821a1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_BT, false, false); ++ break; ++ case 9: /* Software control, Antenna at WiFi side */ ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x0, 0x0); ++ halbtc8821a1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_WIFI, false, false); ++ break; ++ case 10: /* under 5G */ ++ halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x8, 0x0); ++ halbtc8821a1ant_set_ant_path(btcoexist, ++ BTC_ANT_PATH_BT, false, false); ++ break; ++ } ++ } ++ rssi_adjust_val = 0; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssi_adjust_val); ++ ++ /* update pre state */ ++ coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; ++ coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; ++} ++ ++void halbtc8821a1ant_coex_all_off(IN struct btc_coexist *btcoexist) ++{ ++ /* sw all off */ ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++ ++ /* hw all off */ ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++boolean halbtc8821a1ant_is_common_action(IN struct btc_coexist *btcoexist) ++{ ++ boolean common = false, wifi_connected = false, wifi_busy = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (!wifi_connected && ++ BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++ ++ common = true; ++ } else if (wifi_connected && ++ (BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++ ++ common = true; ++ } else if (!wifi_connected && ++ (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++ ++ common = true; ++ } else if (wifi_connected && ++ (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++ ++ common = true; ++ } else if (!wifi_connected && ++ (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE != coex_dm->bt_status)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non connected-idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++ ++ common = true; ++ } else { ++ if (wifi_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Busy + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ common = false; ++ } ++ ++ return common; ++} ++ ++void halbtc8821a1ant_ps_tdma_check_for_power_save_state( ++ IN struct btc_coexist *btcoexist, IN boolean new_ps_state) ++{ ++ u8 lps_mode = 0x0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode); ++ ++ if (lps_mode) { /* already under LPS state */ ++ if (new_ps_state) { ++ /* keep state under LPS, do nothing. */ ++ } else { ++ /* will leave LPS state, turn off psTdma first */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 1); ++ } ++ } else { /* NO PS state */ ++ if (new_ps_state) { ++ /* will enter LPS state, turn off psTdma first */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); ++ } else { ++ /* keep state under NO PS state, do nothing. */ ++ } ++ } ++} ++ ++void halbtc8821a1ant_power_save_state(IN struct btc_coexist *btcoexist, ++ IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ boolean low_pwr_disable = false; ++ ++ switch (ps_type) { ++ case BTC_PS_WIFI_NATIVE: ++ /* recover to original 32k low power setting */ ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8821a1ant_ps_tdma_check_for_power_save_state( ++ btcoexist, true); ++ halbtc8821a1ant_lps_rpwm(btcoexist, NORMAL_EXEC, ++ lps_val, rpwm_val); ++ /* when coex force to enter LPS, do not enter 32k low power. */ ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ /* power save must executed before psTdma. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, ++ NULL); ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8821a1ant_ps_tdma_check_for_power_save_state( ++ btcoexist, false); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8821a1ant_coex_under_5g(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8821a1ant_ignore_wlan_act(btcoexist, NORMAL_EXEC, true); ++ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 10); ++ ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ ++ halbtc8821a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 5); ++} ++ ++void halbtc8821a1ant_action_wifi_only(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 9); ++} ++ ++void halbtc8821a1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist) ++{ ++ static u32 bt_disable_cnt = 0; ++ boolean bt_active = true, bt_disabled = false; ++ ++ /* This function check if bt is disabled */ ++ ++ if (coex_sta->high_priority_tx == 0 && ++ coex_sta->high_priority_rx == 0 && ++ coex_sta->low_priority_tx == 0 && ++ coex_sta->low_priority_rx == 0) ++ bt_active = false; ++ if (coex_sta->high_priority_tx == 0xffff && ++ coex_sta->high_priority_rx == 0xffff && ++ coex_sta->low_priority_tx == 0xffff && ++ coex_sta->low_priority_rx == 0xffff) ++ bt_active = false; ++ if (bt_active) { ++ bt_disable_cnt = 0; ++ bt_disabled = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is enabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ bt_disable_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], bt all counters=0, %d times!!\n", ++ bt_disable_cnt); ++ BTC_TRACE(trace_buf); ++ if (bt_disable_cnt >= 2) { ++ bt_disabled = true; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is disabled !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_wifi_only(btcoexist); ++ } ++ } ++ if (coex_sta->bt_disabled != bt_disabled) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is from %s to %s!!\n", ++ (coex_sta->bt_disabled ? "disabled" : "enabled"), ++ (bt_disabled ? "disabled" : "enabled")); ++ BTC_TRACE(trace_buf); ++ coex_sta->bt_disabled = bt_disabled; ++ if (!bt_disabled) { ++ } else { ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ } ++ } ++} ++ ++/* ********************************************* ++ * ++ * Software Coex Mechanism start ++ * ++ * ********************************************* */ ++ ++void halbtc8821a1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ /* halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC, false, false); */ ++ halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, false, false); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++/* SCO only or SCO+PAN(HS) */ ++void halbtc8821a1ant_action_sco(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_sw_mechanism(btcoexist, true); ++} ++ ++void halbtc8821a1ant_action_hid(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_sw_mechanism(btcoexist, true); ++} ++ ++/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */ ++void halbtc8821a1ant_action_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8821a1ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8821a1ant_action_pan_edr(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++} ++ ++/* PAN(HS) only */ ++void halbtc8821a1ant_action_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++} ++ ++/* PAN(EDR)+A2DP */ ++void halbtc8821a1ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++} ++ ++void halbtc8821a1ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_sw_mechanism(btcoexist, true); ++} ++ ++/* HID+A2DP+PAN(EDR) */ ++void halbtc8821a1ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_sw_mechanism(btcoexist, true); ++} ++ ++void halbtc8821a1ant_action_hid_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_sw_mechanism(btcoexist, true); ++} ++ ++/* ********************************************* ++ * ++ * Non-Software Coex Mechanism start ++ * ++ * ********************************************* */ ++void halbtc8821a1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++} ++ ++void halbtc8821a1ant_action_hs(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++} ++ ++void halbtc8821a1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false, ap_enable = false, wifi_busy = false, ++ bt_busy = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ if ((!wifi_connected) && (!coex_sta->wifi_is_high_pri_task)) { ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ } ++ ++ /* sy modify */ ++ else if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ /* SCO/HID/A2DP busy */ ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } ++ ++ /* sy modify */ ++ ++ else if ((bt_link_info->a2dp_exist) && ++ (bt_link_info->hid_exist)) { ++ /* A2DP+HID busy */ ++ halbtc8821a1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 14); ++ ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 1); ++ } ++ ++ ++ else if ((bt_link_info->pan_exist) || (wifi_busy)) { ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ } ++} ++ ++void halbtc8821a1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ /* tdma and coex table */ ++ ++ if (bt_link_info->sco_exist) { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 41); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } else { /* HID */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 42); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8821a1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist ++ *btcoexist, IN u8 wifi_status) ++{ ++ u8 bt_rssi_state; ++ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ bt_rssi_state = halbtc8821a1ant_bt_rssi_state(2, 28, 0); ++ ++ if (bt_link_info->hid_only) { /* HID */ ++ halbtc8821a1ant_action_bt_sco_hid_only_busy(btcoexist, ++ wifi_status); ++ coex_dm->auto_tdma_adjust = false; ++ return; ++ } else if (bt_link_info->a2dp_only) { /* A2DP */ ++ if (BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) { ++ /* halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); */ ++ /* halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 32); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 1); ++ coex_dm->auto_tdma_adjust = false; ++ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ /* halbtc8821a1ant_tdma_duration_adjust_for_acl(btcoexist, wifi_status); */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 14); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 1); ++ } else { /* for low BT RSSI */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 14); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 1); ++ coex_dm->auto_tdma_adjust = false; ++ } ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { /* HID+A2DP */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 14); ++ coex_dm->auto_tdma_adjust = false; ++ } else { /* for low BT RSSI */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 14); ++ coex_dm->auto_tdma_adjust = false; ++ } ++ ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); ++ } else if ((bt_link_info->pan_only) || (bt_link_info->hid_exist && ++ bt_link_info->pan_exist)) { /* PAN(OPP,FTP), HID+PAN(OPP,FTP) */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6); ++ coex_dm->auto_tdma_adjust = false; ++ } else if (((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) || ++ (bt_link_info->hid_exist && bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 43); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); ++ coex_dm->auto_tdma_adjust = false; ++ } ++} ++ ++void halbtc8821a1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist) ++{ ++ /* power save state */ ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ halbtc8821a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8821a1ant_action_wifi_not_connected_scan(IN struct btc_coexist ++ *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ if (bt_link_info->a2dp_exist) { ++ /* sy modify */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 14); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 1); ++ } else if (bt_link_info->a2dp_exist && bt_link_info->pan_exist) { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 22); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 20); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } ++ } else if ((BT_8821A_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8821a1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } else { ++ /* halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); */ ++ /* halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); */ ++ ++ /* Bryant Add */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8821a1ant_action_wifi_not_connected_asso_auth( ++ IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) { ++ /* sy modify */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); ++ } else if ((bt_link_info->a2dp_exist) || (bt_link_info->pan_exist)) { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8821a1ant_action_wifi_connected_scan(IN struct btc_coexist ++ *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ if (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ if (bt_link_info->a2dp_exist) { ++ /* sy modify */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 14); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 1); ++ } else if (bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist) { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 22); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } else { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 20); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 4); ++ } ++ } else if ((BT_8821A_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8821a1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN); ++ } else { ++ /* halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); */ ++ /* halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); */ ++ ++ /* Bryant Add */ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8821a1ant_action_wifi_connected_specific_packet( ++ IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ /* tdma and coex table */ ++ /* sy modify */ ++ if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) || ++ (bt_link_info->a2dp_exist)) { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } ++ ++ if ((bt_link_info->hid_exist) && (bt_link_info->a2dp_exist)) { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 14); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 1); ++ } ++ ++ ++ else if (bt_link_info->pan_exist) { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); ++ } else { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ } ++} ++ ++void halbtc8821a1ant_action_wifi_connected(IN struct btc_coexist *btcoexist) ++{ ++ boolean wifi_busy = false; ++ boolean scan = false, link = false, roam = false; ++ boolean under_4way = false, ap_enable = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ if (under_4way) { ++ halbtc8821a1ant_action_wifi_connected_specific_packet(btcoexist); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ if (scan || link || roam) { ++ if (scan) ++ halbtc8821a1ant_action_wifi_connected_scan(btcoexist); ++ else ++ halbtc8821a1ant_action_wifi_connected_specific_packet( ++ btcoexist); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ &ap_enable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ /* power save state */ ++ if (!ap_enable && ++ BT_8821A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status && ++ !btcoexist->bt_link_info.hid_only) { ++ if (!wifi_busy && btcoexist->bt_link_info.a2dp_only) /* A2DP */ ++ halbtc8821a1ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ else ++ halbtc8821a1ant_power_save_state(btcoexist, ++ BTC_PS_LPS_ON, 0x50, 0x4); ++ } else ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ /* tdma and coex table */ ++ if (!wifi_busy) { ++ if (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ halbtc8821a1ant_action_wifi_connected_bt_acl_busy( ++ btcoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } else if ((BT_8821A_1ANT_BT_STATUS_SCO_BUSY == ++ coex_dm->bt_status) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8821a1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE); ++ } else { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 2); ++ } ++ } else { ++ if (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) { ++ halbtc8821a1ant_action_wifi_connected_bt_acl_busy( ++ btcoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } else if ((BT_8821A_1ANT_BT_STATUS_SCO_BUSY == ++ coex_dm->bt_status) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == ++ coex_dm->bt_status)) { ++ halbtc8821a1ant_action_bt_sco_hid_only_busy(btcoexist, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY); ++ } else { ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 8); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 2); ++ } ++ } ++} ++ ++void halbtc8821a1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ u8 algorithm = 0; ++ ++ algorithm = halbtc8821a1ant_action_algorithm(btcoexist); ++ coex_dm->cur_algorithm = algorithm; ++ ++ if (halbtc8821a1ant_is_common_action(btcoexist)) { ++ ++ } else { ++ switch (coex_dm->cur_algorithm) { ++ case BT_8821A_1ANT_COEX_ALGO_SCO: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = SCO.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_sco(btcoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_hid(btcoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_a2dp(btcoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = A2DP+PAN(HS).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_a2dp_pan_hs(btcoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN(EDR).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_pan_edr(btcoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HS mode.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_pan_hs(btcoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_pan_edr_a2dp(btcoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_PANEDR_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = PAN(EDR)+HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_pan_edr_hid(btcoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID+A2DP+PAN.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_hid_a2dp_pan_edr( ++ btcoexist); ++ break; ++ case BT_8821A_1ANT_COEX_ALGO_HID_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = HID+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_hid_a2dp(btcoexist); ++ break; ++ default: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action algorithm = coexist All Off!!\n"); ++ BTC_TRACE(trace_buf); ++ /* halbtc8821a1ant_coex_all_off(btcoexist); */ ++ break; ++ } ++ coex_dm->pre_algorithm = coex_dm->cur_algorithm; ++ } ++} ++ ++void halbtc8821a1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean wifi_connected = false, bt_hs_on = false; ++ boolean increase_scan_dev_num = false; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean wifi_under_5g = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->under_ips) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is under IPS !!!\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ if (wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for 5G <===\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_coex_under_5g(btcoexist); ++ return; ++ } ++ if (coex_sta->bt_whck_test) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is under WHCK TEST!!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_action_bt_whck_test(btcoexist); ++ return; ++ } ++ ++ if ((BT_8821A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) ++ increase_scan_dev_num = true; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, ++ &increase_scan_dev_num); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if ((num_of_wifi_link >= 2) || ++ (wifi_link_status & WIFI_P2P_GO_CONNECTED)) { ++ halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8821a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8821a1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ if (!bt_link_info->sco_exist && !bt_link_info->hid_exist) ++ halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ else { ++ if (wifi_connected) { ++ wifi_rssi_state = halbtc8821a1ant_wifi_rssi_state( ++ btcoexist, 1, 2, 30, 0); ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ /* halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, 1, 1); */ ++ halbtc8821a1ant_limited_tx(btcoexist, ++ NORMAL_EXEC, 1, 1, 0, 1); ++ } else { ++ /* halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, 1, 1); */ ++ halbtc8821a1ant_limited_tx(btcoexist, ++ NORMAL_EXEC, 1, 1, 0, 1); ++ } ++ } else ++ halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, ++ 0, 0); ++ ++ } ++ ++ if (bt_link_info->sco_exist) { ++ bt_ctrl_agg_buf_size = true; ++ agg_buf_size = 0x3; ++ } else if (bt_link_info->hid_exist) { ++ bt_ctrl_agg_buf_size = true; ++ agg_buf_size = 0x5; ++ } else if (bt_link_info->a2dp_exist || bt_link_info->pan_exist) { ++ bt_ctrl_agg_buf_size = true; ++ agg_buf_size = 0x8; ++ } ++ halbtc8821a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ ++ halbtc8821a1ant_run_sw_coexist_mechanism(btcoexist); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8821a1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8821a1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ ++ if (!wifi_connected) { ++ boolean scan = false, link = false, roam = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is non connected-idle !!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (scan || link || roam) { ++ if (scan) ++ halbtc8821a1ant_action_wifi_not_connected_scan( ++ btcoexist); ++ else ++ halbtc8821a1ant_action_wifi_not_connected_asso_auth( ++ btcoexist); ++ } else ++ halbtc8821a1ant_action_wifi_not_connected(btcoexist); ++ } else /* wifi LPS/Busy */ ++ halbtc8821a1ant_action_wifi_connected(btcoexist); ++} ++ ++void halbtc8821a1ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ /* force to reset coex mechanism */ ++ /* sw all off */ ++ halbtc8821a1ant_sw_mechanism(btcoexist, false); ++ ++ /* halbtc8821a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); */ ++ halbtc8821a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++} ++ ++void halbtc8821a1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean back_up, IN boolean wifi_only) ++{ ++ u8 u8tmp = 0; ++ boolean wifi_under_5g = false; ++ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 1Ant Init HW Config!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (wifi_only) ++ return; ++ ++ if (back_up) { ++ coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, ++ 0x430); ++ coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, ++ 0x434); ++ coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( ++ btcoexist, 0x42a); ++ coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte( ++ btcoexist, 0x456); ++ } ++ ++ /* 0x790[5:0]=0x5 */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); ++ u8tmp &= 0xc0; ++ u8tmp |= 0x5; ++ btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ ++ /* Antenna config */ ++ if (wifi_under_5g) ++ halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, true, ++ false); ++ else ++ halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, true, ++ false); ++ ++ /* PTA parameter */ ++ halbtc8821a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ ++ /* Enable counter statistics */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, ++ 0xc); /* 0x76e[3] =1, WLAN_Act control by PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1); ++} ++ ++/* ************************************************************ ++ * work around function start with wa_halbtc8821a1ant_ ++ * ************************************************************ ++ * ************************************************************ ++ * extern function start with ex_halbtc8821a1ant_ ++ * ************************************************************ */ ++void ex_halbtc8821a1ant_power_on_setting(IN struct btc_coexist *btcoexist) ++{ ++} ++ ++void ex_halbtc8821a1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only) ++{ ++ halbtc8821a1ant_init_hw_config(btcoexist, true, wifi_only); ++} ++ ++void ex_halbtc8821a1ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Coex Mechanism Init!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->stop_coex_dm = false; ++ ++ halbtc8821a1ant_init_coex_dm(btcoexist); ++ ++ halbtc8821a1ant_query_bt_info(btcoexist); ++} ++ ++void ex_halbtc8821a1ant_display_coex_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ u8 *cli_buf = btcoexist->cli_buf; ++ u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; ++ u16 u16tmp[4]; ++ u32 u32tmp[4]; ++ u32 fw_ver = 0, bt_patch_ver = 0; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cli_buf); ++ ++ if (btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ if (btcoexist->stop_coex_dm) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Coex is STOPPED]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", ++ "Ant PG Num/ Ant Mech/ Ant Pos:", ++ board_info->pg_ant_num, board_info->btdm_ant_num, ++ board_info->btdm_ant_pos); ++ CL_PRINTF(cli_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", ++ "CoexVer/ FwVer/ PatchVer", ++ glcoex_ver_date_8821a_1ant, glcoex_ver_8821a_1ant, fw_ver, ++ bt_patch_ver, bt_patch_ver); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", ++ "Wifi channel informed to BT", ++ coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1], ++ coex_dm->wifi_chnl_info[2]); ++ CL_PRINTF(cli_buf); ++ ++ /* wifi status */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Wifi Status]============"); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[BT Status]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", ++ "BT [status/ rssi/ retryCnt]", ++ ((coex_sta->bt_disabled) ? ("disabled") : (( ++ coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") ++ : ((BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) ? "non-connected idle" : ++ ((BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status) ++ ? "connected-idle" : "busy")))), ++ coex_sta->bt_rssi, coex_sta->bt_retry_cnt); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", ++ "SCO/HID/PAN/A2DP", ++ bt_link_info->sco_exist, bt_link_info->hid_exist, ++ bt_link_info->pan_exist, bt_link_info->a2dp_exist); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO); ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Info A2DP rate", ++ (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate"); ++ CL_PRINTF(cli_buf); ++ ++ for (i = 0; i < BT_INFO_SRC_8821A_1ANT_MAX; i++) { ++ if (coex_sta->bt_info_c2h_cnt[i]) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", ++ glbt_info_src_8821a_1ant[i], ++ coex_sta->bt_info_c2h[i][0], ++ coex_sta->bt_info_c2h[i][1], ++ coex_sta->bt_info_c2h[i][2], ++ coex_sta->bt_info_c2h[i][3], ++ coex_sta->bt_info_c2h[i][4], ++ coex_sta->bt_info_c2h[i][5], ++ coex_sta->bt_info_c2h[i][6], ++ coex_sta->bt_info_c2h_cnt[i]); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ if (!btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", ++ "SM[LowPenaltyRA]", ++ coex_dm->cur_low_penalty_ra); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[mechanisms]============"); ++ CL_PRINTF(cli_buf); ++ ++ ps_tdma_case = coex_dm->cur_ps_tdma; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", ++ "PS TDMA", ++ coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1], ++ coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3], ++ coex_dm->ps_tdma_para[4], ps_tdma_case, ++ coex_dm->auto_tdma_adjust); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", ++ "IgnWlanAct", ++ coex_dm->cur_ignore_wlan_act); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", ++ "Latest error condition(should be 0)", ++ coex_dm->error_condition); ++ CL_PRINTF(cli_buf); ++ } ++ ++ /* Hw setting */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Hw setting]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", ++ "backup ARFR1/ARFR2/RL/AMaxTime", ++ coex_dm->backup_arfr_cnt1, coex_dm->backup_arfr_cnt2, ++ coex_dm->backup_retry_limit, ++ coex_dm->backup_ampdu_max_time); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434); ++ u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", ++ "0x430/0x434/0x42a/0x456", ++ u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc58); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x778/ 0xc58[29:25]", ++ u8tmp[0], (u32tmp[0] & 0x3e000000) >> 25); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x8db); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8db[6:5]", ++ ((u8tmp[0] & 0x60) >> 5)); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x975); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xcb4); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0xcb4[29:28]/0xcb4[7:0]/0x974[9:8]", ++ (u32tmp[0] & 0x30000000) >> 28, u32tmp[0] & 0xff, ++ u8tmp[0] & 0x3); ++ CL_PRINTF(cli_buf); ++ ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x64); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x40/0x4c[24:23]/0x64[0]", ++ u8tmp[0], ((u32tmp[0] & 0x01800000) >> 23), u8tmp[1] & 0x1); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x550(bcn ctrl)/0x522", ++ u32tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", ++ u32tmp[0] & 0xff); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xf48); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5d); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "OFDM-FA/ CCK-FA", ++ u32tmp[0], (u8tmp[0] << 8) + u8tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x6c0/0x6c4/0x6c8(coexTable)", ++ u32tmp[0], u32tmp[1], u32tmp[2]); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x770(high-pri rx/tx)", ++ coex_sta->high_priority_rx, coex_sta->high_priority_tx); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x774(low-pri rx/tx)", ++ coex_sta->low_priority_rx, coex_sta->low_priority_tx); ++ CL_PRINTF(cli_buf); ++#if (BT_AUTO_REPORT_ONLY_8821A_1ANT == 1) ++ halbtc8821a1ant_monitor_bt_ctr(btcoexist); ++#endif ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++void ex_halbtc8821a1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ boolean wifi_under_5g = false; ++ ++ if (btcoexist->manual_control || btcoexist->stop_coex_dm) ++ return; ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, ++ &wifi_under_5g); ++ if (wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for 5G <===\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_coex_under_5g(btcoexist); ++ return; ++ } ++ ++ if (BTC_IPS_ENTER == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS ENTER notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = true; ++ ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, ++ true); ++ /* halbtc8821a1ant_set_ant_path_d_cut(btcoexist, false, false, false, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); */ ++ } else if (BTC_IPS_LEAVE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS LEAVE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = false; ++ ++ halbtc8821a1ant_init_hw_config(btcoexist, false, false); ++ halbtc8821a1ant_init_coex_dm(btcoexist); ++ halbtc8821a1ant_query_bt_info(btcoexist); ++ } ++} ++ ++void ex_halbtc8821a1ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ ++ ++ if (BTC_LPS_ENABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS ENABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = true; ++ } else if (BTC_LPS_DISABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS DISABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = false; ++ } ++} ++ ++void ex_halbtc8821a1ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean wifi_connected = false, bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ boolean wifi_under_5g = false; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm) ++ return; ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ if (wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for 5G <===\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_coex_under_5g(btcoexist); ++ return; ++ } ++ ++ if (BTC_SCAN_START == type) { ++ coex_sta->wifi_is_high_pri_task = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN START notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8821a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, ++ 8); /* Force antenna setup for no scan result issue */ ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if (coex_sta->bt_disabled) ++ return; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ halbtc8821a1ant_query_bt_info(btcoexist); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8821a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8821a1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8821a1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8821a1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_SCAN_START == type) { ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8821a1ant_action_wifi_not_connected_scan( ++ btcoexist); ++ else /* wifi is connected */ ++ halbtc8821a1ant_action_wifi_connected_scan(btcoexist); ++ } else if (BTC_SCAN_FINISH == type) { ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8821a1ant_action_wifi_not_connected(btcoexist); ++ else ++ halbtc8821a1ant_action_wifi_connected(btcoexist); ++ } ++} ++ ++void ex_halbtc8821a1ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean wifi_connected = false, bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ boolean wifi_under_5g = false; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ if (wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for 5G <===\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_coex_under_5g(btcoexist); ++ return; ++ } ++ ++ if (BTC_ASSOCIATE_START == type) { ++ coex_sta->wifi_is_high_pri_task = true; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT START notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->arp_cnt = 0; ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->arp_cnt = 0; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8821a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8821a1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8821a1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8821a1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_ASSOCIATE_START == type) ++ halbtc8821a1ant_action_wifi_not_connected_asso_auth(btcoexist); ++ else if (BTC_ASSOCIATE_FINISH == type) { ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (!wifi_connected) /* non-connected scan */ ++ halbtc8821a1ant_action_wifi_not_connected(btcoexist); ++ else ++ halbtc8821a1ant_action_wifi_connected(btcoexist); ++ } ++} ++ ++void ex_halbtc8821a1ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u8 h2c_parameter[3] = {0}; ++ u32 wifi_bw; ++ u8 wifi_central_chnl; ++ boolean wifi_under_5g = false; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ if (wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for 5G <===\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_coex_under_5g(btcoexist); ++ return; ++ } ++ ++ if (BTC_MEDIA_CONNECT == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA connect notify\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA disconnect notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->arp_cnt = 0; ++ } ++ ++ /* only 2.4G we need to inform bt the chnl mask */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ &wifi_central_chnl); ++ if ((BTC_MEDIA_CONNECT == type) && ++ (wifi_central_chnl <= 14)) { ++ /* h2c_parameter[0] = 0x1; */ ++ h2c_parameter[0] = 0x0; ++ h2c_parameter[1] = wifi_central_chnl; ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ h2c_parameter[2] = 0x30; ++ else ++ h2c_parameter[2] = 0x20; ++ } ++ ++ coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; ++ coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; ++ coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); ++} ++ ++void ex_halbtc8821a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ boolean bt_hs_on = false; ++ u32 wifi_link_status = 0; ++ u32 num_of_wifi_link = 0; ++ boolean bt_ctrl_agg_buf_size = false; ++ u8 agg_buf_size = 5; ++ boolean wifi_under_5g = false; ++ ++ if (btcoexist->manual_control || ++ btcoexist->stop_coex_dm || ++ coex_sta->bt_disabled) ++ return; ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ if (wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for 5G <===\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_coex_under_5g(btcoexist); ++ return; ++ } ++ ++ if (BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type) { ++ coex_sta->wifi_is_high_pri_task = true; ++ ++ if (BTC_PACKET_ARP == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet ARP notify\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet DHCP or EAPOL notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } else { ++ coex_sta->wifi_is_high_pri_task = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], specific Packet [Type = %d] notify\n", type); ++ BTC_TRACE(trace_buf); ++ } ++ ++ coex_sta->specific_pkt_period_cnt = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ if (num_of_wifi_link >= 2) { ++ halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); ++ halbtc8821a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ bt_ctrl_agg_buf_size, agg_buf_size); ++ halbtc8821a1ant_action_wifi_multi_port(btcoexist); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ if (coex_sta->c2h_bt_inquiry_page) { ++ halbtc8821a1ant_action_bt_inquiry(btcoexist); ++ return; ++ } else if (bt_hs_on) { ++ halbtc8821a1ant_action_hs(btcoexist); ++ return; ++ } ++ ++ if (BTC_PACKET_DHCP == type || ++ BTC_PACKET_EAPOL == type || ++ BTC_PACKET_ARP == type) { ++ if (BTC_PACKET_ARP == type) { ++ coex_dm->arp_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ARP Packet Count = %d\n", ++ coex_dm->arp_cnt); ++ BTC_TRACE(trace_buf); ++ if (coex_dm->arp_cnt >= ++ 10) /* if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecificPacket(btcoexist) */ ++ return; ++ } ++ ++ halbtc8821a1ant_action_wifi_connected_specific_packet(btcoexist); ++ } ++} ++ ++void ex_halbtc8821a1ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length) ++{ ++ u8 bt_info = 0; ++ u8 i, rsp_source = 0; ++ boolean wifi_connected = false; ++ boolean bt_busy = false; ++ boolean wifi_under_5g = false; ++ ++ ++ coex_sta->c2h_bt_info_req_sent = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ ++ rsp_source = tmp_buf[0] & 0xf; ++ if (rsp_source >= BT_INFO_SRC_8821A_1ANT_MAX) ++ rsp_source = BT_INFO_SRC_8821A_1ANT_WIFI_FW; ++ coex_sta->bt_info_c2h_cnt[rsp_source]++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source, ++ length); ++ BTC_TRACE(trace_buf); ++ for (i = 0; i < length; i++) { ++ coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; ++ if (i == 1) ++ bt_info = tmp_buf[i]; ++ if (i == length - 1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ /* if 0xff, it means BT is under WHCK test */ ++ if (bt_info == 0xff) ++ coex_sta->bt_whck_test = true; ++ else ++ coex_sta->bt_whck_test = false; ++ ++ if (BT_INFO_SRC_8821A_1ANT_WIFI_FW != rsp_source) { ++ coex_sta->bt_retry_cnt = /* [3:0] */ ++ coex_sta->bt_info_c2h[rsp_source][2] & 0xf; ++ ++ if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ++ coex_sta->c2h_bt_page = true; ++ else ++ coex_sta->c2h_bt_page = false; ++ ++ coex_sta->bt_rssi = ++ coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10; ++ ++ coex_sta->bt_info_ext = ++ coex_sta->bt_info_c2h[rsp_source][4]; ++ ++ coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2] ++ & 0x40); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK, ++ &coex_sta->bt_tx_rx_mask); ++ if (!coex_sta->bt_tx_rx_mask) { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, ++ 0x3c, 0x15); ++ } ++ ++ /* Here we need to resend some wifi info to BT */ ++ /* because bt is reset and loss of the info. */ ++ if (coex_sta->bt_info_ext & BIT(1)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (wifi_connected) ++ ex_halbtc8821a1ant_media_status_notify( ++ btcoexist, BTC_MEDIA_CONNECT); ++ else ++ ex_halbtc8821a1ant_media_status_notify( ++ btcoexist, BTC_MEDIA_DISCONNECT); ++ } ++ ++ if ((coex_sta->bt_info_ext & BIT(3)) && !wifi_under_5g) { ++ if (!btcoexist->manual_control && ++ !btcoexist->stop_coex_dm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_ignore_wlan_act(btcoexist, ++ FORCE_EXEC, false); ++ } ++ } else { ++ /* BT already NOT ignore Wlan active, do nothing here. */ ++ } ++#if (BT_AUTO_REPORT_ONLY_8821A_1ANT == 0) ++ if ((coex_sta->bt_info_ext & BIT(4))) { ++ /* BT auto report already enabled, do nothing */ ++ } else ++ halbtc8821a1ant_bt_auto_report(btcoexist, FORCE_EXEC, ++ true); ++#endif ++ } ++ ++ /* check BIT2 first ==> check if bt is under inquiry or page scan */ ++ if (bt_info & BT_INFO_8821A_1ANT_B_INQ_PAGE) ++ coex_sta->c2h_bt_inquiry_page = true; ++ else ++ coex_sta->c2h_bt_inquiry_page = false; ++ ++ /* set link exist status */ ++ if (!(bt_info & BT_INFO_8821A_1ANT_B_CONNECTION)) { ++ coex_sta->bt_link_exist = false; ++ coex_sta->pan_exist = false; ++ coex_sta->a2dp_exist = false; ++ coex_sta->hid_exist = false; ++ coex_sta->sco_exist = false; ++ } else { /* connection exists */ ++ coex_sta->bt_link_exist = true; ++ if (bt_info & BT_INFO_8821A_1ANT_B_FTP) ++ coex_sta->pan_exist = true; ++ else ++ coex_sta->pan_exist = false; ++ if (bt_info & BT_INFO_8821A_1ANT_B_A2DP) ++ coex_sta->a2dp_exist = true; ++ else ++ coex_sta->a2dp_exist = false; ++ if (bt_info & BT_INFO_8821A_1ANT_B_HID) ++ coex_sta->hid_exist = true; ++ else ++ coex_sta->hid_exist = false; ++ if (bt_info & BT_INFO_8821A_1ANT_B_SCO_ESCO) ++ coex_sta->sco_exist = true; ++ else ++ coex_sta->sco_exist = false; ++ } ++ ++ halbtc8821a1ant_update_bt_link_info(btcoexist); ++ ++ bt_info = bt_info & ++ 0x1f; /* mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) */ ++ ++ if (!(bt_info & BT_INFO_8821A_1ANT_B_CONNECTION)) { ++ coex_dm->bt_status = BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info == ++ BT_INFO_8821A_1ANT_B_CONNECTION) { /* connection exists but no busy */ ++ coex_dm->bt_status = BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if ((bt_info & BT_INFO_8821A_1ANT_B_SCO_ESCO) || ++ (bt_info & BT_INFO_8821A_1ANT_B_SCO_BUSY)) { ++ coex_dm->bt_status = BT_8821A_1ANT_BT_STATUS_SCO_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info & BT_INFO_8821A_1ANT_B_ACL_BUSY) { ++ if (BT_8821A_1ANT_BT_STATUS_ACL_BUSY != coex_dm->bt_status) ++ coex_dm->auto_tdma_adjust = false; ++ coex_dm->bt_status = BT_8821A_1ANT_BT_STATUS_ACL_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ coex_dm->bt_status = BT_8821A_1ANT_BT_STATUS_MAX; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if ((BT_8821A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) ++ bt_busy = true; ++ else ++ bt_busy = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ halbtc8821a1ant_run_coexist_mechanism(btcoexist); ++} ++ ++void ex_halbtc8821a1ant_halt_notify(IN struct btc_coexist *btcoexist) ++{ ++ boolean wifi_under_5g = false; ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ if (wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for 5G <===\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_coex_under_5g(btcoexist); ++ return; ++ } ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8821a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); ++ halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true); ++ /* halbtc8821a1ant_set_ant_path_d_cut(btcoexist, false, false, false, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); */ ++ ++ halbtc8821a1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ++ ex_halbtc8821a1ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); ++ ++ btcoexist->stop_coex_dm = true; ++} ++ ++void ex_halbtc8821a1ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state) ++{ ++ boolean wifi_under_5g = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ if (wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for 5G <===\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a1ant_coex_under_5g(btcoexist); ++ return; ++ } ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_WIFI_PNP_SLEEP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to SLEEP\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, ++ true); ++ /* halbtc8821a1ant_set_ant_path_d_cut(btcoexist, false, false, false, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); */ ++ ++ /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */ ++ /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */ ++ /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */ ++ coex_sta->under_ips = false; ++ coex_sta->under_lps = false; ++ btcoexist->stop_coex_dm = true; ++ } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to WAKE UP\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->stop_coex_dm = false; ++ halbtc8821a1ant_init_hw_config(btcoexist, false, false); ++ halbtc8821a1ant_init_coex_dm(btcoexist); ++ halbtc8821a1ant_query_bt_info(btcoexist); ++ } ++} ++ ++void ex_halbtc8821a1ant_periodical(IN struct btc_coexist *btcoexist) ++{ ++#if (BT_AUTO_REPORT_ONLY_8821A_1ANT == 0) ++ halbtc8821a1ant_query_bt_info(btcoexist); ++ halbtc8821a1ant_monitor_bt_ctr(btcoexist); ++ halbtc8821a1ant_monitor_bt_enable_disable(btcoexist); ++#else ++ if (halbtc8821a1ant_is_wifi_status_changed(btcoexist) || ++ coex_dm->auto_tdma_adjust) { ++ /* if(coex_sta->specific_pkt_period_cnt > 2) */ ++ /* { */ ++ halbtc8821a1ant_run_coexist_mechanism(btcoexist); ++ /* } */ ++ } ++ ++ coex_sta->specific_pkt_period_cnt++; ++#endif ++} ++ ++#endif ++ ++#endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a1Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a1Ant.h +new file mode 100644 +index 0000000..6c9c327 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a1Ant.h +@@ -0,0 +1,197 @@ ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8821A_SUPPORT == 1) ++ ++/* ******************************************* ++ * The following is for 8821A 1ANT BT Co-exist definition ++ * ******************************************* */ ++#define BT_AUTO_REPORT_ONLY_8821A_1ANT 1 ++ ++#define BT_INFO_8821A_1ANT_B_FTP BIT(7) ++#define BT_INFO_8821A_1ANT_B_A2DP BIT(6) ++#define BT_INFO_8821A_1ANT_B_HID BIT(5) ++#define BT_INFO_8821A_1ANT_B_SCO_BUSY BIT(4) ++#define BT_INFO_8821A_1ANT_B_ACL_BUSY BIT(3) ++#define BT_INFO_8821A_1ANT_B_INQ_PAGE BIT(2) ++#define BT_INFO_8821A_1ANT_B_SCO_ESCO BIT(1) ++#define BT_INFO_8821A_1ANT_B_CONNECTION BIT(0) ++ ++#define BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ ++ (((_BT_INFO_EXT_&BIT(0))) ? true : false) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT 2 ++ ++enum bt_info_src_8821a_1ant { ++ BT_INFO_SRC_8821A_1ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8821A_1ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8821A_1ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8821A_1ANT_MAX ++}; ++ ++enum bt_8821a_1ant_bt_status { ++ BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8821A_1ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8821A_1ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8821A_1ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8821A_1ANT_BT_STATUS_MAX ++}; ++ ++enum bt_8821a_1ant_wifi_status { ++ BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, ++ BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, ++ BT_8821A_1ANT_WIFI_STATUS_MAX ++}; ++ ++enum bt_8821a_1ant_coex_algo { ++ BT_8821A_1ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8821A_1ANT_COEX_ALGO_SCO = 0x1, ++ BT_8821A_1ANT_COEX_ALGO_HID = 0x2, ++ BT_8821A_1ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8821A_1ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8821A_1ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8821A_1ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8821A_1ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8821A_1ANT_COEX_ALGO_MAX = 0xb, ++}; ++ ++struct coex_dm_8821a_1ant { ++ /* fw mechanism */ ++ boolean cur_ignore_wlan_act; ++ boolean pre_ignore_wlan_act; ++ u8 pre_ps_tdma; ++ u8 cur_ps_tdma; ++ u8 ps_tdma_para[5]; ++ u8 ps_tdma_du_adj_type; ++ boolean auto_tdma_adjust; ++ boolean pre_ps_tdma_on; ++ boolean cur_ps_tdma_on; ++ boolean pre_bt_auto_report; ++ boolean cur_bt_auto_report; ++ u8 pre_lps; ++ u8 cur_lps; ++ u8 pre_rpwm; ++ u8 cur_rpwm; ++ ++ /* sw mechanism */ ++ boolean pre_low_penalty_ra; ++ boolean cur_low_penalty_ra; ++ u32 pre_val0x6c0; ++ u32 cur_val0x6c0; ++ u32 pre_val0x6c4; ++ u32 cur_val0x6c4; ++ u32 pre_val0x6c8; ++ u32 cur_val0x6c8; ++ u8 pre_val0x6cc; ++ u8 cur_val0x6cc; ++ ++ u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */ ++ u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */ ++ u16 backup_retry_limit; ++ u8 backup_ampdu_max_time; ++ ++ /* algorithm related */ ++ u8 pre_algorithm; ++ u8 cur_algorithm; ++ u8 bt_status; ++ u8 wifi_chnl_info[3]; ++ ++ u32 pre_ra_mask; ++ u32 cur_ra_mask; ++ u8 pre_arfr_type; ++ u8 cur_arfr_type; ++ u8 pre_retry_limit_type; ++ u8 cur_retry_limit_type; ++ u8 pre_ampdu_time_type; ++ u8 cur_ampdu_time_type; ++ u32 arp_cnt; ++ ++ u8 error_condition; ++}; ++ ++struct coex_sta_8821a_1ant { ++ boolean bt_disabled; ++ boolean bt_link_exist; ++ boolean sco_exist; ++ boolean a2dp_exist; ++ boolean hid_exist; ++ boolean pan_exist; ++ ++ boolean under_lps; ++ boolean under_ips; ++ u32 specific_pkt_period_cnt; ++ u32 high_priority_tx; ++ u32 high_priority_rx; ++ u32 low_priority_tx; ++ u32 low_priority_rx; ++ u8 bt_rssi; ++ boolean bt_tx_rx_mask; ++ u8 pre_bt_rssi_state; ++ u8 pre_wifi_rssi_state[4]; ++ boolean c2h_bt_info_req_sent; ++ u8 bt_info_c2h[BT_INFO_SRC_8821A_1ANT_MAX][10]; ++ u32 bt_info_c2h_cnt[BT_INFO_SRC_8821A_1ANT_MAX]; ++ boolean c2h_bt_inquiry_page; ++ boolean c2h_bt_page; /* Add for win8.1 page out issue */ ++ boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */ ++ u8 bt_retry_cnt; ++ u8 bt_info_ext; ++ boolean ++ bt_whck_test; /* Add for ASUS WHQL TEST that enable wifi test bt */ ++}; ++ ++/* ******************************************* ++ * The following is interface which will notify coex module. ++ * ******************************************* */ ++void ex_halbtc8821a1ant_power_on_setting(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821a1ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only); ++void ex_halbtc8821a1ant_init_coex_dm(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821a1ant_ips_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a1ant_lps_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a1ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a1ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a1ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a1ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length); ++void ex_halbtc8821a1ant_halt_notify(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821a1ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state); ++void ex_halbtc8821a1ant_periodical(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821a1ant_display_coex_info(IN struct btc_coexist *btcoexist); ++ ++#else ++#define ex_halbtc8821a1ant_power_on_setting(btcoexist) ++#define ex_halbtc8821a1ant_init_hw_config(btcoexist, wifi_only) ++#define ex_halbtc8821a1ant_init_coex_dm(btcoexist) ++#define ex_halbtc8821a1ant_ips_notify(btcoexist, type) ++#define ex_halbtc8821a1ant_lps_notify(btcoexist, type) ++#define ex_halbtc8821a1ant_scan_notify(btcoexist, type) ++#define ex_halbtc8821a1ant_connect_notify(btcoexist, type) ++#define ex_halbtc8821a1ant_media_status_notify(btcoexist, type) ++#define ex_halbtc8821a1ant_specific_packet_notify(btcoexist, type) ++#define ex_halbtc8821a1ant_bt_info_notify(btcoexist, tmp_buf, length) ++#define ex_halbtc8821a1ant_halt_notify(btcoexist) ++#define ex_halbtc8821a1ant_pnp_notify(btcoexist, pnp_state) ++#define ex_halbtc8821a1ant_periodical(btcoexist) ++#define ex_halbtc8821a1ant_display_coex_info(btcoexist) ++ ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a2Ant.c +new file mode 100644 +index 0000000..010a422 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a2Ant.c +@@ -0,0 +1,4560 @@ ++/* ************************************************************ ++ * Description: ++ * ++ * This file is for RTL8821A Co-exist mechanism ++ * ++ * History ++ * 2012/11/15 Cosa first check in. ++ * ++ * ************************************************************ */ ++ ++/* ************************************************************ ++ * include files ++ * ************************************************************ */ ++#include "Mp_Precomp.h" ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8821A_SUPPORT == 1) ++/* ************************************************************ ++ * Global variables, these are static variables ++ * ************************************************************ */ ++static u8 *trace_buf = &gl_btc_trace_buf[0]; ++static struct coex_dm_8821a_2ant glcoex_dm_8821a_2ant; ++static struct coex_dm_8821a_2ant *coex_dm = &glcoex_dm_8821a_2ant; ++static struct coex_sta_8821a_2ant glcoex_sta_8821a_2ant; ++static struct coex_sta_8821a_2ant *coex_sta = &glcoex_sta_8821a_2ant; ++ ++const char *const glbt_info_src_8821a_2ant[] = { ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u32 glcoex_ver_date_8821a_2ant = 20150921; ++u32 glcoex_ver_8821a_2ant = 0x58; ++/* modify 20140903v43 a2dpandhid tdmaonoff a2dp glitch _ tdma off 778=3(case1)->778=1(case0) ++ * and to improve tp while a2dphid case23->case25 , case123->case125 for asus spec ++ * and modify for asus bt WHQL test _ tdma off_ 778=3->1_ ++ * ************************************************************ ++ * local function proto type if needed ++ * ************************************************************ ++ * ************************************************************ ++ * local function start with halbtc8821a2ant_ ++ * ************************************************************ */ ++u8 halbtc8821a2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1) ++{ ++ s32 bt_rssi = 0; ++ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; ++ ++ bt_rssi = coex_sta->bt_rssi; ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Rssi thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_bt_rssi_state; ++ } ++ ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (bt_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (bt_rssi < rssi_thresh1) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_bt_rssi_state = bt_rssi_state; ++ ++ return bt_rssi_state; ++} ++ ++u8 halbtc8821a2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist, ++ IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1) ++{ ++ s32 wifi_rssi = 0; ++ u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi RSSI thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_wifi_rssi_state[index]; ++ } ++ ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (wifi_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (wifi_rssi < rssi_thresh1) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; ++ ++ return wifi_rssi_state; ++} ++ ++void halbtc8821a2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist) ++{ ++ static u32 bt_disable_cnt = 0; ++ boolean bt_active = true, bt_disabled = false; ++ ++ /* This function check if bt is disabled */ ++ ++ if (coex_sta->high_priority_tx == 0 && ++ coex_sta->high_priority_rx == 0 && ++ coex_sta->low_priority_tx == 0 && ++ coex_sta->low_priority_rx == 0) ++ bt_active = false; ++ if (coex_sta->high_priority_tx == 0xffff && ++ coex_sta->high_priority_rx == 0xffff && ++ coex_sta->low_priority_tx == 0xffff && ++ coex_sta->low_priority_rx == 0xffff) ++ bt_active = false; ++ if (bt_active) { ++ bt_disable_cnt = 0; ++ bt_disabled = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is enabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ bt_disable_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], bt all counters=0, %d times!!\n", ++ bt_disable_cnt); ++ BTC_TRACE(trace_buf); ++ if (bt_disable_cnt >= 2) { ++ bt_disabled = true; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is disabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ if (coex_sta->bt_disabled != bt_disabled) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is from %s to %s!!\n", ++ (coex_sta->bt_disabled ? "disabled" : "enabled"), ++ (bt_disabled ? "disabled" : "enabled")); ++ BTC_TRACE(trace_buf); ++ coex_sta->bt_disabled = bt_disabled; ++ if (!bt_disabled) { ++ } else { ++ } ++ } ++} ++ ++void halbtc8821a2ant_limited_rx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rej_ap_agg_pkt, ++ IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size) ++{ ++ boolean reject_rx_agg = rej_ap_agg_pkt; ++ boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; ++ u8 rx_agg_size = agg_buf_size; ++ ++ /* ============================================ */ ++ /* Rx Aggregation related setting */ ++ /* ============================================ */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ &reject_rx_agg); ++ /* decide BT control aggregation buf size or not */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ &bt_ctrl_rx_agg_size); ++ /* aggregation buf size, only work when BT control Rx aggregation size. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); ++ /* real update aggregation setting */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++} ++ ++void halbtc8821a2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist) ++{ ++ u32 reg_hp_txrx, reg_lp_txrx, u32tmp; ++ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; ++ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ ++ reg_hp_txrx = 0x770; ++ reg_lp_txrx = 0x774; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); ++ reg_hp_tx = u32tmp & MASKLWORD; ++ reg_hp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); ++ reg_lp_tx = u32tmp & MASKLWORD; ++ reg_lp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ coex_sta->high_priority_tx = reg_hp_tx; ++ coex_sta->high_priority_rx = reg_hp_rx; ++ coex_sta->low_priority_tx = reg_lp_tx; ++ coex_sta->low_priority_rx = reg_lp_rx; ++ ++ if ((coex_sta->low_priority_rx >= 950) && ++ (coex_sta->low_priority_rx >= coex_sta->low_priority_tx) && ++ (!coex_sta->under_ips)) ++ bt_link_info->slave_role = true; ++ else ++ bt_link_info->slave_role = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx); ++ BTC_TRACE(trace_buf); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx); ++ BTC_TRACE(trace_buf); ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); ++} ++ ++void halbtc8821a2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist) ++{ ++ if (coex_sta->under_ips) { ++ coex_sta->crc_ok_cck = 0; ++ coex_sta->crc_ok_11g = 0; ++ coex_sta->crc_ok_11n = 0; ++ coex_sta->crc_ok_11n_agg = 0; ++ ++ coex_sta->crc_err_cck = 0; ++ coex_sta->crc_err_11g = 0; ++ coex_sta->crc_err_11n = 0; ++ coex_sta->crc_err_11n_agg = 0; ++ } else { ++ coex_sta->crc_ok_cck = btcoexist->btc_read_4byte(btcoexist, ++ 0xf88); ++ coex_sta->crc_ok_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf94); ++ coex_sta->crc_ok_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf90); ++ coex_sta->crc_ok_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xfb8); ++ ++ coex_sta->crc_err_cck = btcoexist->btc_read_4byte(btcoexist, ++ 0xf84); ++ coex_sta->crc_err_11g = btcoexist->btc_read_2byte(btcoexist, ++ 0xf96); ++ coex_sta->crc_err_11n = btcoexist->btc_read_2byte(btcoexist, ++ 0xf92); ++ coex_sta->crc_err_11n_agg = btcoexist->btc_read_2byte(btcoexist, ++ 0xfba); ++ } ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x1); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x0); ++} ++ ++void halbtc8821a2ant_query_bt_info(IN struct btc_coexist *btcoexist) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ coex_sta->c2h_bt_info_req_sent = true; ++ ++ h2c_parameter[0] |= BIT(0); /* trigger */ ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); ++} ++ ++boolean halbtc8821a2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist) ++{ ++ static boolean pre_wifi_busy = false, pre_under_4way = false, ++ pre_bt_hs_on = false; ++ boolean wifi_busy = false, under_4way = false, bt_hs_on = false; ++ boolean wifi_connected = false; ++ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ &under_4way); ++ ++ if (wifi_connected) { ++ if (wifi_busy != pre_wifi_busy) { ++ pre_wifi_busy = wifi_busy; ++ return true; ++ } ++ if (under_4way != pre_under_4way) { ++ pre_under_4way = under_4way; ++ return true; ++ } ++ if (bt_hs_on != pre_bt_hs_on) { ++ pre_bt_hs_on = bt_hs_on; ++ return true; ++ } ++ ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 3, ++ 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ ++ if ((BTC_RSSI_STATE_HIGH == wifi_rssi_state) || ++ (BTC_RSSI_STATE_LOW == wifi_rssi_state)) ++ return true; ++ ++ } ++ ++ return false; ++} ++ ++void halbtc8821a2ant_update_bt_link_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ bt_link_info->bt_link_exist = coex_sta->bt_link_exist; ++ bt_link_info->sco_exist = coex_sta->sco_exist; ++ bt_link_info->a2dp_exist = coex_sta->a2dp_exist; ++ bt_link_info->pan_exist = coex_sta->pan_exist; ++ bt_link_info->hid_exist = coex_sta->hid_exist; ++ ++ /* work around for HS mode. */ ++ if (bt_hs_on) { ++ bt_link_info->pan_exist = true; ++ bt_link_info->bt_link_exist = true; ++ } ++ ++ /* check if Sco only */ ++ if (bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->sco_only = true; ++ else ++ bt_link_info->sco_only = false; ++ ++ /* check if A2dp only */ ++ if (!bt_link_info->sco_exist && ++ bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->a2dp_only = true; ++ else ++ bt_link_info->a2dp_only = false; ++ ++ /* check if Pan only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ bt_link_info->pan_exist && ++ !bt_link_info->hid_exist) ++ bt_link_info->pan_only = true; ++ else ++ bt_link_info->pan_only = false; ++ ++ /* check if Hid only */ ++ if (!bt_link_info->sco_exist && ++ !bt_link_info->a2dp_exist && ++ !bt_link_info->pan_exist && ++ bt_link_info->hid_exist) ++ bt_link_info->hid_only = true; ++ else ++ bt_link_info->hid_only = false; ++} ++ ++u8 halbtc8821a2ant_action_algorithm(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean bt_hs_on = false; ++ u8 algorithm = BT_8821A_2ANT_COEX_ALGO_UNDEFINED; ++ u8 num_of_diff_profile = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ if (!bt_link_info->bt_link_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], No BT link exists!!!\n"); ++ BTC_TRACE(trace_buf); ++ return algorithm; ++ } ++ ++ if (bt_link_info->sco_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->hid_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->pan_exist) ++ num_of_diff_profile++; ++ if (bt_link_info->a2dp_exist) ++ num_of_diff_profile++; ++ ++ if (num_of_diff_profile == 1) { ++ if (bt_link_info->sco_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } else { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_HID; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_A2DP; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PAN(HS) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_2ANT_COEX_ALGO_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PAN(EDR) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 2) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } else if (bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } else if (bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_HID; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + A2DP ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } else if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + PAN(HS) ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + PAN(EDR) ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ } else if (bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ } ++ } else { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_2ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile >= 3) { ++ if (bt_link_info->sco_exist) { ++ if (bt_link_info->hid_exist && ++ bt_link_info->pan_exist && ++ bt_link_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++void halbtc8821a2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist, ++ IN u8 dac_swing_lvl) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ /* There are several type of dacswing */ ++ /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */ ++ h2c_parameter[0] = dac_swing_lvl; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter); ++} ++ ++void halbtc8821a2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist, ++ IN u8 dec_bt_pwr_lvl) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = dec_bt_pwr_lvl; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter); ++} ++ ++void halbtc8821a2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 dec_bt_pwr_lvl) ++{ ++ coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl) ++ return; ++ } ++ halbtc8821a2ant_set_fw_dec_bt_pwr(btcoexist, ++ coex_dm->cur_bt_dec_pwr_lvl); ++ ++ coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl; ++} ++ ++void halbtc8821a2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean enable_auto_report) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = 0; ++ ++ if (enable_auto_report) ++ h2c_parameter[0] |= BIT(0); ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); ++} ++ ++void halbtc8821a2ant_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable_auto_report) ++{ ++ coex_dm->cur_bt_auto_report = enable_auto_report; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) ++ return; ++ } ++ halbtc8821a2ant_set_bt_auto_report(btcoexist, ++ coex_dm->cur_bt_auto_report); ++ ++ coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; ++} ++ ++void halbtc8821a2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 fw_dac_swing_lvl) ++{ ++ coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_fw_dac_swing_lvl == ++ coex_dm->cur_fw_dac_swing_lvl) ++ return; ++ } ++ ++ halbtc8821a2ant_set_fw_dac_swing_level(btcoexist, ++ coex_dm->cur_fw_dac_swing_lvl); ++ ++ coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl; ++} ++ ++void halbtc8821a2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist, ++ IN boolean rx_rf_shrink_on) ++{ ++ if (rx_rf_shrink_on) { ++ /* Shrink RF Rx LPF corner */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Shrink RF Rx LPF corner!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff, ++ 0xffffc); ++ } else { ++ /* Resume RF Rx LPF corner */ ++ /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */ ++ if (btcoexist->initilized) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Resume RF Rx LPF corner!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, ++ 0xfffff, coex_dm->bt_rf_0x1e_backup); ++ } ++ } ++} ++ ++void halbtc8821a2ant_rf_shrink(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rx_rf_shrink_on) ++{ ++ coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_rf_rx_lpf_shrink == ++ coex_dm->cur_rf_rx_lpf_shrink) ++ return; ++ } ++ halbtc8821a2ant_set_sw_rf_rx_lpf_corner(btcoexist, ++ coex_dm->cur_rf_rx_lpf_shrink); ++ ++ coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink; ++} ++ ++void halbtc8821a2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist ++ *btcoexist, IN boolean low_penalty_ra) ++{ ++ u8 h2c_parameter[6] = {0}; ++ ++ h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */ ++ ++ if (low_penalty_ra) { ++ h2c_parameter[1] |= BIT(0); ++ h2c_parameter[2] = ++ 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */ ++ h2c_parameter[3] = 0xf5; /* MCS7 or OFDM54 */ ++ h2c_parameter[4] = 0xa0; /* MCS6 or OFDM48 */ ++ h2c_parameter[5] = 0xa0; /* MCS5 or OFDM36 */ ++ /* h2c_parameter[3] = 0xf7; //MCS7 or OFDM54 */ ++ /* h2c_parameter[4] = 0xf8; //MCS6 or OFDM48 */ ++ /* h2c_parameter[5] = 0xf9; //MCS5 or OFDM36 */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter); ++} ++ ++void halbtc8821a2ant_low_penalty_ra(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean low_penalty_ra) ++{ ++ coex_dm->cur_low_penalty_ra = low_penalty_ra; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) ++ return; ++ } ++ halbtc8821a2ant_set_sw_penalty_tx_rate_adaptive(btcoexist, ++ coex_dm->cur_low_penalty_ra); ++ ++ coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; ++} ++ ++void halbtc8821a2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist, ++ IN u32 level) ++{ ++ u8 val = (u8)level; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Write SwDacSwing = 0x%x\n", level); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc5b, 0x3e, val); ++} ++ ++void halbtc8821a2ant_set_sw_full_time_dac_swing(IN struct btc_coexist ++ *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl) ++{ ++ if (sw_dac_swing_on) ++ halbtc8821a2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl); ++ else ++ halbtc8821a2ant_set_dac_swing_reg(btcoexist, 0x18); ++} ++ ++ ++void halbtc8821a2ant_dac_swing(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl) ++{ ++ coex_dm->cur_dac_swing_on = dac_swing_on; ++ coex_dm->cur_dac_swing_lvl = dac_swing_lvl; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) && ++ (coex_dm->pre_dac_swing_lvl == ++ coex_dm->cur_dac_swing_lvl)) ++ return; ++ } ++ delay_ms(30); ++ halbtc8821a2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on, ++ dac_swing_lvl); ++ ++ coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on; ++ coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl; ++} ++ ++void halbtc8821a2ant_set_adc_back_off(IN struct btc_coexist *btcoexist, ++ IN boolean adc_back_off) ++{ ++ if (adc_back_off) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB BackOff Level On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x3); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB BackOff Level Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x1); ++ } ++} ++ ++void halbtc8821a2ant_adc_back_off(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean adc_back_off) ++{ ++ coex_dm->cur_adc_back_off = adc_back_off; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off) ++ return; ++ } ++ halbtc8821a2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off); ++ ++ coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off; ++} ++ ++void halbtc8821a2ant_set_agc_table(IN struct btc_coexist *btcoexist, ++ IN boolean agc_table_en) ++{ ++ u8 rssi_adjust_val = 0; ++ ++ /* =================BB AGC Gain Table */ ++ if (agc_table_en) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB Agc Table On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6e1A0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6d1B0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6c1C0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6b1D0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6a1E0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x691F0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x68200001); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB Agc Table Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001); ++ btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa4200001); ++ } ++ ++ ++ /* =================RF Gain */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); ++ if (agc_table_en) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x38fff); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x38ffe); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x380c3); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x28ce6); ++ } ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x1); ++ if (agc_table_en) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff, ++ 0x38fff); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff, ++ 0x38ffe); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff, ++ 0x380c3); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff, ++ 0x28ce6); ++ } ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x0); ++ ++ /* set rssi_adjust_val for wifi module. */ ++ if (agc_table_en) ++ rssi_adjust_val = 8; ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, ++ &rssi_adjust_val); ++} ++ ++void halbtc8821a2ant_agc_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean agc_table_en) ++{ ++ coex_dm->cur_agc_table_en = agc_table_en; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en) ++ return; ++ } ++ halbtc8821a2ant_set_agc_table(btcoexist, agc_table_en); ++ ++ coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en; ++} ++ ++void halbtc8821a2ant_set_coex_table(IN struct btc_coexist *btcoexist, ++ IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); ++} ++ ++void halbtc8821a2ant_coex_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4, ++ IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ coex_dm->cur_val0x6c0 = val0x6c0; ++ coex_dm->cur_val0x6c4 = val0x6c4; ++ coex_dm->cur_val0x6c8 = val0x6c8; ++ coex_dm->cur_val0x6cc = val0x6cc; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && ++ (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && ++ (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && ++ (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) ++ return; ++ } ++ halbtc8821a2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, ++ val0x6cc); ++ ++ coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; ++ coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; ++ coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; ++ coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; ++} ++ ++void halbtc8821a2ant_coex_table_with_type(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_sta->coex_table_type = type; ++ ++ switch (type) { ++ case 0: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x55555555, 0xffffff, 0x3); ++ break; ++ case 1: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x55555555, 0x5afa5afa, 0xffffff, 0x3); ++ break; ++ case 2: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 3: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 4: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0xffffffff, 0xffffffff, 0xffffff, 0x3); ++ break; ++ case 5: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3); ++ break; ++ case 6: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3); ++ break; ++ case 7: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 8: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 9: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 10: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 11: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 12: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 13: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 14: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3); ++ break; ++ case 15: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3); ++ break; ++ case 16: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3); ++ break; ++ case 17: ++ halbtc8821a2ant_coex_table(btcoexist, force_exec, ++ 0xfafafafa, 0xfafafafa, 0xffffff, 0x3); ++ break; ++ default: ++ break; ++ } ++} ++ ++void halbtc8821a2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean enable) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ if (enable) { ++ h2c_parameter[0] |= BIT(0); /* function enable */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); ++} ++ ++void halbtc8821a2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN u8 lps_val, IN u8 rpwm_val) ++{ ++ u8 lps = lps_val; ++ u8 rpwm = rpwm_val; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps); ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm); ++} ++ ++void halbtc8821a2ant_lps_rpwm(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ coex_dm->cur_lps = lps_val; ++ coex_dm->cur_rpwm = rpwm_val; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_lps == coex_dm->cur_lps) && ++ (coex_dm->pre_rpwm == coex_dm->cur_rpwm)) ++ return; ++ } ++ halbtc8821a2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val); ++ ++ coex_dm->pre_lps = coex_dm->cur_lps; ++ coex_dm->pre_rpwm = coex_dm->cur_rpwm; ++} ++ ++void halbtc8821a2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable) ++{ ++ coex_dm->cur_ignore_wlan_act = enable; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_ignore_wlan_act == ++ coex_dm->cur_ignore_wlan_act) ++ return; ++ } ++ halbtc8821a2ant_set_fw_ignore_wlan_act(btcoexist, enable); ++ ++ coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; ++} ++ ++void halbtc8821a2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist, ++ IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5) ++{ ++ u8 h2c_parameter[5] = {0}; ++ ++ h2c_parameter[0] = byte1; ++ h2c_parameter[1] = byte2; ++ h2c_parameter[2] = byte3; ++ h2c_parameter[3] = byte4; ++ h2c_parameter[4] = byte5; ++ ++ coex_dm->ps_tdma_para[0] = byte1; ++ coex_dm->ps_tdma_para[1] = byte2; ++ coex_dm->ps_tdma_para[2] = byte3; ++ coex_dm->ps_tdma_para[3] = byte4; ++ coex_dm->ps_tdma_para[4] = byte5; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); ++} ++ ++void halbtc8821a2ant_sw_mechanism1(IN struct btc_coexist *btcoexist, ++ IN boolean shrink_rx_lpf, IN boolean low_penalty_ra, ++ IN boolean limited_dig, IN boolean bt_lna_constrain) ++{ ++ /* ++ u32 wifi_bw; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if(BTC_WIFI_BW_HT40 != wifi_bw) ++ { ++ if (shrink_rx_lpf) ++ shrink_rx_lpf = false; ++ } ++ */ ++ ++ /* halbtc8821a2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); */ ++ halbtc8821a2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); ++} ++ ++void halbtc8821a2ant_sw_mechanism2(IN struct btc_coexist *btcoexist, ++ IN boolean agc_table_shift, IN boolean adc_back_off, ++ IN boolean sw_dac_swing, IN u32 dac_swing_lvl) ++{ ++ /* halbtc8821a2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */ ++ /* halbtc8821a2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */ ++ halbtc8821a2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, ++ dac_swing_lvl); ++} ++ ++void halbtc8821a2ant_set_ant_path(IN struct btc_coexist *btcoexist, ++ IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ u32 u32tmp = 0; ++ u8 h2c_parameter[2] = {0}; ++ ++ if (init_hwcfg) { ++ /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp &= ~BIT(23); ++ u32tmp |= BIT(24); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x974, 0x3ff); ++ /* btcoexist->btc_write_1byte(btcoexist, 0xcb4, 0x77); */ ++ ++ if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) { ++ /* tell firmware "antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix */ ++ h2c_parameter[0] = 1; ++ h2c_parameter[1] = 1; ++ btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, ++ h2c_parameter); ++ } else { ++ /* tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix */ ++ h2c_parameter[0] = 0; ++ h2c_parameter[1] = 1; ++ btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, ++ h2c_parameter); ++ } ++ } ++ ++ /* ext switch setting */ ++ switch (ant_pos_type) { ++ case BTC_ANT_WIFI_AT_MAIN: ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7, ++ 0x30, 0x1); ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7, ++ 0x30, 0x2); ++ break; ++ } ++} ++ ++void halbtc8821a2ant_ps_tdma(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean turn_on, IN u8 type) ++{ ++ u8 wifi_rssi_state1, bt_rssi_state; ++ ++ ++ wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, ++ BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ if (!(BTC_RSSI_HIGH(wifi_rssi_state1) && ++ BTC_RSSI_HIGH(bt_rssi_state)) && turn_on) { ++ type = type + 100; /* for WiFi RSSI low or BT RSSI low */ ++ } ++ ++ coex_dm->cur_ps_tdma_on = turn_on; ++ coex_dm->cur_ps_tdma = type; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && ++ (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) ++ return; ++ } ++ if (turn_on) { ++ switch (type) { ++ case 1: ++ default: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 2: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x2d, 0x03, 0xf1, 0x90); ++ break; ++ case 3: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0xf1, 0x90); ++ break; ++ case 4: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x03, 0xf1, 0x90); ++ break; ++ case 5: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c, 0x3, 0x70, 0x90); ++ break; ++ case 6: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x2d, 0x3, 0x70, 0x90); ++ break; ++ case 7: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0x70, 0x90); ++ break; ++ case 8: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xa3, ++ 0x10, 0x3, 0x70, 0x90); ++ break; ++ case 9: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 10: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x2d, 0x03, 0xf1, 0x90); ++ break; ++ case 11: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0xf1, 0x90); ++ break; ++ case 12: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x3, 0xf1, 0x90); ++ break; ++ case 13: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c, 0x3, 0x70, 0x90); ++ break; ++ case 14: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x2d, 0x3, 0x70, 0x90); ++ break; ++ case 15: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0xa, 0xa, 0x60, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1c, 0x3, 0x70, 0x90); ++ break; ++ case 16: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5, 0x5, 0x60, 0x90); */ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x10, 0x3, 0x70, 0x90); ++ break; ++ case 17: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xa3, ++ 0x2f, 0x2f, 0x60, 0x90); ++ break; ++ case 18: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 23: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x1e, 0x03, 0xf0, 0x14); ++ break; ++ case 24: ++ case 124: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x3c, 0x03, 0x70, 0x50); ++ break; ++ /* case25/case125 : for lenovo bt pan tp degrade<30% while wifi downlink */ ++ case 25: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x14, 0x03, 0xf1, 0x90); ++ break; ++ case 26: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x30, 0x03, 0xf1, 0x90); ++ break; ++ case 71: ++ /* halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); */ ++ ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 101: ++ case 105: ++ case 171: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x3a, 0x03, 0x70, 0x50); ++ break; ++ case 102: ++ case 106: ++ case 110: ++ case 114: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x2d, 0x03, 0x70, 0x50); ++ break; ++ case 103: ++ case 107: ++ case 111: ++ case 115: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x1c, 0x03, 0x70, 0x50); ++ break; ++ case 104: ++ case 108: ++ case 112: ++ case 116: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x10, 0x03, 0x70, 0x50); ++ break; ++ case 109: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c, 0x03, 0xf1, 0x90); ++ break; ++ case 113: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x3c, 0x03, 0x70, 0x90); ++ break; ++ case 121: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 22: ++ case 122: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, ++ 0x35, 0x03, 0x71, 0x11); ++ break; ++ case 123: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x1c, 0x03, 0x70, 0x54); ++ break; ++ /* case25/case125 : for lenovo bt pan tp degrade<30% while wifi downlink */ ++ case 125: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x14, 0x03, 0x70, 0x50); ++ break; ++ case 126: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xd3, ++ 0x30, 0x03, 0x70, 0x50); ++ break; ++ } ++ } else { ++ /* disable PS tdma */ ++ switch (type) { ++ case 0: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x40, 0x0); ++ break; ++ case 1: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x48, 0x0); ++ break; ++ default: ++ halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x40, 0x0); ++ break; ++ } ++ } ++ ++ /* update pre state */ ++ coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; ++ coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; ++} ++ ++void halbtc8821a2ant_ps_tdma_check_for_power_save_state( ++ IN struct btc_coexist *btcoexist, IN boolean new_ps_state) ++{ ++ u8 lps_mode = 0x0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode); ++ ++ if (lps_mode) { /* already under LPS state */ ++ if (new_ps_state) { ++ /* keep state under LPS, do nothing. */ ++ } else { ++ /* will leave LPS state, turn off psTdma first */ ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 1); ++ } ++ } else { /* NO PS state */ ++ if (new_ps_state) { ++ /* will enter LPS state, turn off psTdma first */ ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 1); ++ } else { ++ /* keep state under NO PS state, do nothing. */ ++ } ++ } ++} ++ ++void halbtc8821a2ant_power_save_state(IN struct btc_coexist *btcoexist, ++ IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val) ++{ ++ boolean low_pwr_disable = false; ++ ++ switch (ps_type) { ++ case BTC_PS_WIFI_NATIVE: ++ /* recover to original 32k low power setting */ ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, ++ NULL); ++ coex_sta->force_lps_on = false; ++ break; ++ case BTC_PS_LPS_ON: ++ halbtc8821a2ant_ps_tdma_check_for_power_save_state( ++ btcoexist, true); ++ halbtc8821a2ant_lps_rpwm(btcoexist, NORMAL_EXEC, ++ lps_val, rpwm_val); ++ /* when coex force to enter LPS, do not enter 32k low power. */ ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ /* power save must executed before psTdma. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, ++ NULL); ++ coex_sta->force_lps_on = true; ++ break; ++ case BTC_PS_LPS_OFF: ++ halbtc8821a2ant_ps_tdma_check_for_power_save_state( ++ btcoexist, false); ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, ++ NULL); ++ coex_sta->force_lps_on = false; ++ break; ++ default: ++ break; ++ } ++} ++ ++ ++void halbtc8821a2ant_coex_all_off(IN struct btc_coexist *btcoexist) ++{ ++ /* fw all off */ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ /* sw all off */ ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ /* hw all off */ ++ /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8821a2ant_coex_under_5g(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a2ant_coex_all_off(btcoexist); ++ ++ halbtc8821a2ant_ignore_wlan_act(btcoexist, NORMAL_EXEC, true); ++} ++ ++void halbtc8821a2ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ /* force to reset coex mechanism */ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8821a2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6); ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0); ++ ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++} ++ ++void halbtc8821a2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ boolean wifi_connected = false; ++ boolean low_pwr_disable = true; ++ boolean scan = false, link = false, roam = false; ++ ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, ++ BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ if (scan || link || roam) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi link process + BT Inq/Page!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 15); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22); ++ } else if (wifi_connected) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT Inq/Page!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 15); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi no-link + BT Inq/Page!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ } ++ ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6); ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++} ++ ++ ++void halbtc8821a2ant_action_wifi_link_process(IN struct btc_coexist *btcoexist) ++{ ++ u8 u8tmpa, u8tmpb; ++ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 15); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22); ++ ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ ++ ++ u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765); ++ u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], 0x765=0x%x, 0x76e=0x%x\n", u8tmpa, ++ u8tmpb); ++ BTC_TRACE(trace_buf); ++} ++ ++boolean halbtc8821a2ant_action_wifi_idle_process(IN struct btc_coexist ++ *btcoexist) ++{ ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u8 ap_num = 0; ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ /* wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); */ ++ wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, ++ BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES - 20, 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num); ++ ++ /* define the office environment */ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && ++ (coex_sta->hid_exist == true) && ++ (coex_sta->a2dp_exist == true)) { ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8821a2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x6); ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ /* sw all off */ ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ ++ return true; ++ } ++ ++ /* */ ++ else if (coex_sta->pan_exist == true) { ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi idle process for BT PAN exist!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8821a2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x6); ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ /* sw all off */ ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ ++ return true; ++ } ++ ++ else { ++ halbtc8821a2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x18); ++ return false; ++ } ++ ++ ++} ++ ++ ++ ++boolean halbtc8821a2ant_is_common_action(IN struct btc_coexist *btcoexist) ++{ ++ boolean common = false, wifi_connected = false, wifi_busy = false; ++ boolean bt_hs_on = false, low_pwr_disable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (!wifi_connected) { ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi non-connected idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x0); ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ ++ common = true; ++ } else { ++ if (BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, ++ false, false, 0x8); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT non connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x0); ++ halbtc8821a2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 1); ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 0xb); ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ ++ common = true; ++ } else if (BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE == ++ coex_dm->bt_status) { ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ if (bt_hs_on) ++ return false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi connected + BT connected-idle!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, ++ false, false, 0x8); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x0); ++ halbtc8821a2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_power_save_state(btcoexist, ++ BTC_PS_WIFI_NATIVE, 0x0, 0x0); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 1); ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 0xb); ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ ++ common = true; ++ } else { ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ if (wifi_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Busy + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ common = false; ++ /* common = halbtc8821a2ant_action_wifi_idle_process(btcoexist); */ ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Connected-Idle + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ /* common = false; */ ++ common = halbtc8821a2ant_action_wifi_idle_process( ++ btcoexist); ++ } ++ } ++ } ++ ++ return common; ++} ++void halbtc8821a2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist, ++ IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval) ++{ ++ static s32 up, dn, m, n, wait_count; ++ s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */ ++ u8 retry_count = 0; ++ ++ if (!coex_dm->auto_tdma_adjust) { ++ coex_dm->auto_tdma_adjust = true; ++ { ++ if (sco_hid) { ++ if (tx_pause) { ++ if (max_interval == 1) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 13); ++ coex_dm->ps_tdma_du_adj_type = ++ 13; ++ } else if (max_interval == 2) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (max_interval == 3) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } ++ } else { ++ if (max_interval == 1) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = ++ 9; ++ } else if (max_interval == 2) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (max_interval == 3) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } ++ } ++ } else { ++ if (tx_pause) { ++ if (max_interval == 1) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 5); ++ coex_dm->ps_tdma_du_adj_type = ++ 5; ++ } else if (max_interval == 2) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (max_interval == 3) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } ++ } else { ++ if (max_interval == 1) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (max_interval == 2) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (max_interval == 3) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } ++ } ++ } ++ } ++ /* ============ */ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } else { ++ /* accquire the BT TRx retry count from BT_Info byte2 */ ++ retry_count = coex_sta->bt_retry_cnt; ++ result = 0; ++ wait_count++; ++ ++ if (retry_count == ++ 0) { /* no retry in the last 2-second duration */ ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if (up >= n) { /* if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration */ ++ wait_count = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ } ++ } else if (retry_count <= ++ 3) { /* <=3 retry in the last 2-second duration */ ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) { /* if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration */ ++ if (wait_count <= 2) ++ m++; /* ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ } else { /* retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration */ ++ if (wait_count == 1) ++ m++; /* ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ ++ if (max_interval == 1) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 71) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 5); ++ coex_dm->ps_tdma_du_adj_type = 5; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 5); ++ coex_dm->ps_tdma_du_adj_type = 5; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 13); ++ coex_dm->ps_tdma_du_adj_type = 13; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 5); ++ coex_dm->ps_tdma_du_adj_type = ++ 5; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 13); ++ coex_dm->ps_tdma_du_adj_type = ++ 13; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 71); ++ coex_dm->ps_tdma_du_adj_type = 71; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 71) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 71); ++ coex_dm->ps_tdma_du_adj_type = ++ 71; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = ++ 9; ++ } ++ } ++ } ++ } else if (max_interval == 2) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } ++ } ++ } ++ } else if (max_interval == 3) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821a2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821a2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } ++ } ++ } ++ } ++ } ++ ++ /* if current PsTdma not match with the recorded one (when scan, dhcp...), */ ++ /* then we have to adjust it back to the previous record one. */ ++ if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) { ++ boolean scan = false, link = false, roam = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n", ++ coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (!scan && !link && !roam) ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ coex_dm->ps_tdma_du_adj_type); ++ else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } ++} ++ ++/* SCO only or SCO+PAN(HS) */ ++void halbtc8821a2ant_action_sco(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ u8 wifi_rssi_state, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for SCO quality at 11b/g mode */ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ else { /* for SCO quality & wifi performance balance at 11n mode */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ halbtc8821a2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 8); ++ else { ++ if (bt_link_info->sco_only) ++ halbtc8821a2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 17); ++ else ++ halbtc8821a2ant_coex_table_with_type(btcoexist, ++ NORMAL_EXEC, 12); ++ } ++ } ++ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, ++ 0); /* for voice quality */ ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ true, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ true, 0x18); ++ } ++ } ++} ++ ++ ++void halbtc8821a2ant_action_hid(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ else /* for HID quality & wifi performance balance at 11n mode */ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); ++ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 24); ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */ ++void halbtc8821a2ant_action_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ u8 ap_num = 0; ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, ++ BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num); ++ ++ /* define the office environment */ ++ if ((ap_num >= 10) && BTC_RSSI_HIGH(wifi_rssi_state1) && ++ BTC_RSSI_HIGH(bt_rssi_state)) { ++ /* dbg_print(" AP#>10(%d)\n", ap_num); */ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x0); ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, ++ 0x8); ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ /* halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); */ ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23); ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x6); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ true, 0x6); ++ } ++ return; ++ ++ } ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 13); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ /* halbtc8821a2ant_tdma_duration_adjust(btcoexist, false, false, 1); */ ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23); ++ } else { ++ /* halbtc8821a2ant_tdma_duration_adjust(btcoexist, false, true, 1); */ ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23); ++ } ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8821a2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, ++ BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 13); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ halbtc8821a2ant_tdma_duration_adjust(btcoexist, false, true, 2); ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8821a2ant_action_pan_edr(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, ++ BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 10); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 13); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 26); ++ else ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 26); ++ ++ /* sw mechanism */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++ ++/* PAN(HS) only */ ++void halbtc8821a2ant_action_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, ++ BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* PAN(EDR)+A2DP */ ++void halbtc8821a2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, ++ BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ else ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 12); ++ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ halbtc8821a2ant_tdma_duration_adjust(btcoexist, false, ++ true, 3); ++ else ++ halbtc8821a2ant_tdma_duration_adjust(btcoexist, false, ++ false, 3); ++ } else { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 13); ++ halbtc8821a2ant_tdma_duration_adjust(btcoexist, false, true, 3); ++ } ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8821a2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, ++ BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 14); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 3); ++ /* halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11); */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x780); ++ } else { ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 6); ++ /* halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, ++ 0xfffff, 0x0); ++ } ++ halbtc8821a2ant_tdma_duration_adjust(btcoexist, true, false, 2); ++ } else { ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ /* halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14); */ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x0); ++ halbtc8821a2ant_tdma_duration_adjust(btcoexist, true, true, 2); ++ } ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++/* HID+A2DP+PAN(EDR) */ ++void halbtc8821a2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, ++ BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 0); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); ++ ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 14); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ halbtc8821a2ant_tdma_duration_adjust(btcoexist, true, ++ true, 3); ++ else ++ halbtc8821a2ant_tdma_duration_adjust(btcoexist, true, ++ false, 3); ++ } else ++ halbtc8821a2ant_tdma_duration_adjust(btcoexist, true, true, 3); ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8821a2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state; ++ u32 wifi_bw; ++ u8 ap_num = 0; ++ ++ wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, ++ 0); ++ /* bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 29, 0); */ ++ wifi_rssi_state1 = halbtc8821a2ant_wifi_rssi_state(btcoexist, 1, 2, ++ BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0); ++ bt_rssi_state = halbtc8821a2ant_bt_rssi_state(3, ++ BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES, 37); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); ++ ++ halbtc8821a2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x5); ++ ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) { ++ if (BTC_RSSI_HIGH(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ } else { ++ /* only 802.11N mode we have to dec bt power to 4 degree */ ++ if (BTC_RSSI_HIGH(bt_rssi_state)) { ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, ++ &ap_num); ++ /* need to check ap Number of Not */ ++ if (ap_num < 10) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, ++ NORMAL_EXEC, 4); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, ++ NORMAL_EXEC, 2); ++ } else if (BTC_RSSI_MEDIUM(bt_rssi_state)) ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); ++ else ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ } ++ ++ if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, ++ 0x0, 0x0); ++ } else { ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, ++ 14); ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, ++ 0x4); ++ } ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ /* halbtc8821a2ant_tdma_duration_adjust(btcoexist, true, false, 3); */ ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23); ++ } else { ++ /* halbtc8821a2ant_tdma_duration_adjust(btcoexist, true, true, 3); */ ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23); ++ } ++ ++ /* sw mechanism */ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } else { ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, true, false, ++ false, 0x18); ++ } else { ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, true, ++ false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, ++ false, 0x18); ++ } ++ } ++} ++ ++void halbtc8821a2ant_action_bt_whck_test(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ /* sw all off */ ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++} ++ ++void halbtc8821a2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); ++ ++ /* sw all off */ ++ halbtc8821a2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8821a2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ /* hw all off */ ++ /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); ++ ++ halbtc8821a2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, ++ 0x0); ++ halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++} ++ ++void halbtc8821a2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ boolean wifi_under_5g = false; ++ u8 algorithm = 0; ++ u32 num_of_wifi_link = 0; ++ u32 wifi_link_status = 0; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ boolean miracast_plus_bt = false; ++ boolean scan = false, link = false, roam = false; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism()===>\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ if (wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_coex_under_5g(btcoexist); ++ return; ++ } ++ ++ if (coex_sta->under_ips) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi is under IPS !!!\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ if (coex_sta->bt_whck_test) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is under WHCK TEST!!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_bt_whck_test(btcoexist); ++ return; ++ } ++ ++ algorithm = halbtc8821a2ant_action_algorithm(btcoexist); ++ if (coex_sta->c2h_bt_inquiry_page && ++ (BT_8821A_2ANT_COEX_ALGO_PANHS != algorithm)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is under inquiry/page scan !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_bt_inquiry(btcoexist); ++ return; ++ } else { ++ ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (scan || link || roam) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], WiFi is under Link Process !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_wifi_link_process(btcoexist); ++ return; ++ } ++ ++ /* for P2P */ ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, ++ &wifi_link_status); ++ num_of_wifi_link = wifi_link_status >> 16; ++ ++ if ((num_of_wifi_link >= 2) || ++ (wifi_link_status & WIFI_P2P_GO_CONNECTED)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n", ++ num_of_wifi_link, wifi_link_status); ++ BTC_TRACE(trace_buf); ++ ++ if (bt_link_info->bt_link_exist) ++ miracast_plus_bt = true; ++ else ++ miracast_plus_bt = false; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ halbtc8821a2ant_action_wifi_multi_port(btcoexist); ++ ++ return; ++ } else { ++ miracast_plus_bt = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, ++ &miracast_plus_bt); ++ } ++ ++ coex_dm->cur_algorithm = algorithm; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n", ++ coex_dm->cur_algorithm); ++ BTC_TRACE(trace_buf); ++ ++ if (halbtc8821a2ant_is_common_action(btcoexist)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant common.\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->auto_tdma_adjust = false; ++ } else { ++ if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n", ++ coex_dm->pre_algorithm, coex_dm->cur_algorithm); ++ BTC_TRACE(trace_buf); ++ coex_dm->auto_tdma_adjust = false; ++ } ++ switch (coex_dm->cur_algorithm) { ++ case BT_8821A_2ANT_COEX_ALGO_SCO: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = SCO.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_sco(btcoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_hid(btcoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_a2dp(btcoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_a2dp_pan_hs(btcoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_pan_edr(btcoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HS mode.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_pan_hs(btcoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_pan_edr_a2dp(btcoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_PANEDR_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_pan_edr_hid(btcoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_hid_a2dp_pan_edr( ++ btcoexist); ++ break; ++ case BT_8821A_2ANT_COEX_ALGO_HID_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_action_hid_a2dp(btcoexist); ++ break; ++ default: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_coex_all_off(btcoexist); ++ break; ++ } ++ coex_dm->pre_algorithm = coex_dm->cur_algorithm; ++ } ++} ++ ++void halbtc8821a2ant_wifi_off_hw_cfg(IN struct btc_coexist *btcoexist) ++{ ++ u8 h2c_parameter[2] = {0}; ++ u32 fw_ver = 0; ++ ++ /* set wlan_act to low */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, ++ 0x780); /* WiFi goto standby while GNT_BT 0-->1 */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ if (fw_ver >= 0x180000) { ++ /* Use H2C to set GNT_BT to HIGH */ ++ h2c_parameter[0] = 1; ++ btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, h2c_parameter); ++ } else ++ btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18); ++} ++ ++void halbtc8821a2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean back_up) ++{ ++ u8 u8tmp = 0; ++ ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 2Ant Init HW Config!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* backup rf 0x1e value */ ++ coex_dm->bt_rf_0x1e_backup = ++ btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff); ++ ++ /* 0x790[5:0]=0x5 */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); ++ u8tmp &= 0xc0; ++ u8tmp |= 0x5; ++ btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp); ++ ++ /* Antenna config */ ++ halbtc8821a2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, true, ++ false); ++ coex_sta->dis_ver_info_cnt = 0; ++ ++ /* PTA parameter */ ++ halbtc8821a2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); ++ ++ /* Enable counter statistics */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, ++ 0x4); /* 0x76e[3] =1, WLAN_Act control by PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1); ++} ++ ++/* ************************************************************ ++ * work around function start with wa_halbtc8821a2ant_ ++ * ************************************************************ ++ * ************************************************************ ++ * extern function start with ex_halbtc8821a2ant_ ++ * ************************************************************ */ ++void ex_halbtc8821a2ant_power_on_setting(IN struct btc_coexist *btcoexist) ++{ ++ ++} ++ ++void ex_halbtc8821a2ant_pre_load_firmware(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ u8 u8tmp = 0x4; /* Set BIT2 by default since it's 2ant case */ ++ ++ /* */ ++ /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */ ++ /* Local setting bit define */ ++ /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */ ++ /* BIT1: "0" for internal switch; "1" for external switch */ ++ /* BIT2: "0" for one antenna; "1" for two antenna */ ++ /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */ ++ if (btcoexist->chip_interface == BTC_INTF_USB) { ++ /* fixed at S0 for USB interface */ ++ u8tmp |= 0x1; /* antenna inverse */ ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp); ++ } else { ++ /* for PCIE and SDIO interface, we check efuse 0xc3[6] */ ++ if (board_info->single_ant_path == 0) { ++ } else if (board_info->single_ant_path == 1) { ++ /* set to S0 */ ++ u8tmp |= 0x1; /* antenna inverse */ ++ } ++ ++ if (btcoexist->chip_interface == BTC_INTF_PCI) ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0x384, ++ u8tmp); ++ else if (btcoexist->chip_interface == BTC_INTF_SDIO) ++ btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60, ++ u8tmp); ++ } ++} ++ ++void ex_halbtc8821a2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only) ++{ ++ halbtc8821a2ant_init_hw_config(btcoexist, true); ++} ++ ++void ex_halbtc8821a2ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Coex Mechanism Init!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8821a2ant_init_coex_dm(btcoexist); ++} ++ ++void ex_halbtc8821a2ant_display_coex_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; ++ u8 *cli_buf = btcoexist->cli_buf; ++ u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; ++ u32 u32tmp[4]; ++ u32 fa_of_dm, fa_cck; ++ u32 fw_ver = 0, bt_patch_ver = 0; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cli_buf); ++ ++ if (btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[Under Manual Control]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n =========================================="); ++ CL_PRINTF(cli_buf); ++ } ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "Ant PG number/ Ant mechanism:", ++ board_info->pg_ant_num, board_info->btdm_ant_num); ++ CL_PRINTF(cli_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", ++ "CoexVer/ FwVer/ PatchVer", ++ glcoex_ver_date_8821a_2ant, glcoex_ver_8821a_2ant, fw_ver, ++ bt_patch_ver, bt_patch_ver); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", ++ "Wifi channel informed to BT", ++ coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1], ++ coex_dm->wifi_chnl_info[2]); ++ CL_PRINTF(cli_buf); ++ ++ /* wifi status */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Wifi Status]============"); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[BT Status]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %ddBm/ %d] ", ++ "BT [status/ rssi/ retryCnt]", ++ ((coex_sta->bt_disabled) ? ("disabled") : (( ++ coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") ++ : ((BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == ++ coex_dm->bt_status) ? "non-connected idle" : ++ ((BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status) ++ ? "connected-idle" : "busy")))), ++ coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", ++ "SCO/HID/PAN/A2DP", ++ bt_link_info->sco_exist, bt_link_info->hid_exist, ++ bt_link_info->pan_exist, bt_link_info->a2dp_exist); ++ CL_PRINTF(cli_buf); ++ ++ { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Role", ++ (bt_link_info->slave_role) ? "Slave" : "Master"); ++ CL_PRINTF(cli_buf); ++ } ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Info A2DP rate", ++ (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate"); ++ CL_PRINTF(cli_buf); ++ ++ for (i = 0; i < BT_INFO_SRC_8821A_2ANT_MAX; i++) { ++ if (coex_sta->bt_info_c2h_cnt[i]) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", ++ glbt_info_src_8821a_2ant[i], ++ coex_sta->bt_info_c2h[i][0], ++ coex_sta->bt_info_c2h[i][1], ++ coex_sta->bt_info_c2h[i][2], ++ coex_sta->bt_info_c2h[i][3], ++ coex_sta->bt_info_c2h[i][4], ++ coex_sta->bt_info_c2h[i][5], ++ coex_sta->bt_info_c2h[i][6], ++ coex_sta->bt_info_c2h_cnt[i]); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ /* Sw mechanism */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Sw mechanism]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", ++ "SM1[ShRf/ LpRA/ LimDig]", ++ coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra, ++ coex_dm->limited_dig); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", ++ "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", ++ coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off, ++ coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl); ++ CL_PRINTF(cli_buf); ++ ++ /* Fw mechanism */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Fw mechanism]============"); ++ CL_PRINTF(cli_buf); ++ ++ ps_tdma_case = coex_dm->cur_ps_tdma; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", ++ "PS TDMA", ++ coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1], ++ coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3], ++ coex_dm->ps_tdma_para[4], ps_tdma_case, ++ coex_dm->auto_tdma_adjust); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", ++ "Coex Table Type", ++ coex_sta->coex_table_type); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "DecBtPwr/ IgnWlanAct", ++ coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act); ++ CL_PRINTF(cli_buf); ++ ++ /* Hw setting */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Hw setting]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", ++ "RF-A, 0x1e initVal", ++ coex_dm->bt_rf_0x1e_backup); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xc5b); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x880); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x778/0x880[29:25]/0xc58[29:25]", ++ u8tmp[0], (u32tmp[0] & 0x3e000000) >> 25, ++ ((u8tmp[1] & 0x3e) >> 1)); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x764); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x76e); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x764/ 0x765/ 0x76e", ++ (u32tmp[0] & 0xff), (u32tmp[0] & 0xff00) >> 8, u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xcb4); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0xcb4[7:0](ctrl)/ 0xcb4[29:28](val)", ++ u32tmp[0] & 0xff, ((u32tmp[0] & 0x30000000) >> 28)); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x974); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x40/ 0x4c[24:23]/ 0x974", ++ u8tmp[0], ((u32tmp[0] & 0x01800000) >> 23), u32tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x550(bcn ctrl)/0x522", ++ u32tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x49c); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0xc50(dig)/0x49c(null-drop)", ++ u32tmp[0] & 0xff, u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xda0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xda4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0xda8); ++ u32tmp[3] = btcoexist->btc_read_4byte(btcoexist, 0xcf0); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c); ++ ++ fa_of_dm = ((u32tmp[0] & 0xffff0000) >> 16) + ((u32tmp[1] & 0xffff0000) ++ >> 16) + (u32tmp[1] & 0xffff) + (u32tmp[2] & 0xffff) + \ ++ ((u32tmp[3] & 0xffff0000) >> 16) + (u32tmp[3] & ++ 0xffff) ; ++ fa_cck = (u8tmp[0] << 8) + u8tmp[1]; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "OFDM-CCA/OFDM-FA/CCK-FA", ++ u32tmp[0] & 0xffff, fa_of_dm, fa_cck); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", ++ "CRC_OK CCK/11g/11n/11n-Agg", ++ coex_sta->crc_ok_cck, coex_sta->crc_ok_11g, ++ coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_agg); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", ++ "CRC_Err CCK/11g/11n/11n-Agg", ++ coex_sta->crc_err_cck, coex_sta->crc_err_11g, ++ coex_sta->crc_err_11n, coex_sta->crc_err_11n_agg); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", ++ "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", ++ u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x770(high-pri rx/tx)", ++ coex_sta->high_priority_rx, coex_sta->high_priority_tx); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x774(low-pri rx/tx)", ++ coex_sta->low_priority_rx, coex_sta->low_priority_tx); ++ CL_PRINTF(cli_buf); ++#if (BT_AUTO_REPORT_ONLY_8821A_2ANT == 1) ++ /* halbtc8821a2ant_monitor_bt_ctr(btcoexist); */ ++#endif ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++void ex_halbtc8821a2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (BTC_IPS_ENTER == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS ENTER notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = true; ++ halbtc8821a2ant_wifi_off_hw_cfg(btcoexist); ++ halbtc8821a2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ halbtc8821a2ant_coex_all_off(btcoexist); ++ } else if (BTC_IPS_LEAVE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS LEAVE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = false; ++ halbtc8821a2ant_init_hw_config(btcoexist, false); ++ halbtc8821a2ant_init_coex_dm(btcoexist); ++ halbtc8821a2ant_query_bt_info(btcoexist); ++ } ++} ++ ++void ex_halbtc8821a2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type) ++{ ++ if (BTC_LPS_ENABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS ENABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = true; ++ } else if (BTC_LPS_DISABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS DISABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = false; ++ } ++} ++ ++void ex_halbtc8821a2ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u8 u8tmpa, u8tmpb; ++ ++ u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765); ++ u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e); ++ ++ if (BTC_SCAN_START == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN START notify\n"); ++ BTC_TRACE(trace_buf); ++ } else if (BTC_SCAN_FINISH == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "############# [BTCoex], 0x765=0x%x, 0x76e=0x%x\n", u8tmpa, ++ u8tmpb); ++ BTC_TRACE(trace_buf); ++} ++ ++void ex_halbtc8821a2ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (BTC_ASSOCIATE_START == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT START notify\n"); ++ BTC_TRACE(trace_buf); ++ } else if (BTC_ASSOCIATE_FINISH == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8821a2ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u8 h2c_parameter[3] = {0}; ++ u32 wifi_bw; ++ u8 wifi_central_chnl; ++ u8 ap_num = 0; ++ ++ if (BTC_MEDIA_CONNECT == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA connect notify\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA disconnect notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ /* only 2.4G we need to inform bt the chnl mask */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ &wifi_central_chnl); ++ if ((BTC_MEDIA_CONNECT == type) && ++ (wifi_central_chnl <= 14)) { ++ h2c_parameter[0] = 0x1; ++ h2c_parameter[1] = wifi_central_chnl; ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ h2c_parameter[2] = 0x30; ++ else { ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, ++ &ap_num); ++ if (ap_num < 10) ++ h2c_parameter[2] = 0x30; ++ else ++ h2c_parameter[2] = 0x20; ++ } ++ } ++ ++ coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; ++ coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; ++ coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); ++} ++ ++void ex_halbtc8821a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (type == BTC_PACKET_DHCP) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], DHCP Packet notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8821a2ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length) ++{ ++ u8 bt_info = 0; ++ u8 i, rsp_source = 0; ++ boolean bt_busy = false, limited_dig = false; ++ boolean wifi_connected = false, wifi_under_5g = false; ++ ++ coex_sta->c2h_bt_info_req_sent = false; ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ ++ rsp_source = tmp_buf[0] & 0xf; ++ if (rsp_source >= BT_INFO_SRC_8821A_2ANT_MAX) ++ rsp_source = BT_INFO_SRC_8821A_2ANT_WIFI_FW; ++ coex_sta->bt_info_c2h_cnt[rsp_source]++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source, ++ length); ++ BTC_TRACE(trace_buf); ++ for (i = 0; i < length; i++) { ++ coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; ++ if (i == 1) ++ bt_info = tmp_buf[i]; ++ if (i == length - 1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ /* if 0xff, it means BT is under WHCK test */ ++ if (bt_info == 0xff) ++ coex_sta->bt_whck_test = true; ++ else ++ coex_sta->bt_whck_test = false; ++ ++ if (BT_INFO_SRC_8821A_2ANT_WIFI_FW != rsp_source) { ++ coex_sta->bt_retry_cnt = /* [3:0] */ ++ coex_sta->bt_info_c2h[rsp_source][2] & 0xf; ++ ++ coex_sta->bt_rssi = ++ coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10; ++ ++ coex_sta->bt_info_ext = ++ coex_sta->bt_info_c2h[rsp_source][4]; ++ ++ coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2] ++ & 0x40); ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK, ++ &coex_sta->bt_tx_rx_mask); ++ if (coex_sta->bt_tx_rx_mask) { ++ /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, ++ 0x3c, 0x01); ++ } ++ ++ /* Here we need to resend some wifi info to BT */ ++ /* because bt is reset and loss of the info. */ ++ if ((coex_sta->bt_info_ext & BIT(1))) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"); ++ BTC_TRACE(trace_buf); ++ if (wifi_connected) ++ ex_halbtc8821a2ant_media_status_notify( ++ btcoexist, BTC_MEDIA_CONNECT); ++ else ++ ex_halbtc8821a2ant_media_status_notify( ++ btcoexist, BTC_MEDIA_DISCONNECT); ++ } ++ ++ ++ if (!btcoexist->manual_control && !wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info = 0x%x!!\n", ++ coex_sta->bt_info_ext); ++ BTC_TRACE(trace_buf); ++ if ((coex_sta->bt_info_ext & BIT(3))) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3=1, wifi_connected=%d\n", ++ wifi_connected); ++ BTC_TRACE(trace_buf); ++ if (wifi_connected) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_ignore_wlan_act( ++ btcoexist, FORCE_EXEC, false); ++ } ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3=0, wifi_connected=%d\n", ++ wifi_connected); ++ BTC_TRACE(trace_buf); ++ /* BT already NOT ignore Wlan active, do nothing here. */ ++ if (!wifi_connected) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT ext info bit3 check, set BT to ignore Wlan active!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_ignore_wlan_act( ++ btcoexist, FORCE_EXEC, true); ++ } ++ } ++ } ++ ++#if (BT_AUTO_REPORT_ONLY_8821A_2ANT == 0) ++ if ((coex_sta->bt_info_ext & BIT(4))) { ++ /* BT auto report already enabled, do nothing */ ++ } else ++ halbtc8821a2ant_bt_auto_report(btcoexist, FORCE_EXEC, ++ true); ++#endif ++ } ++ ++ /* check BIT2 first ==> check if bt is under inquiry or page scan */ ++ if (bt_info & BT_INFO_8821A_2ANT_B_INQ_PAGE) ++ coex_sta->c2h_bt_inquiry_page = true; ++ else ++ coex_sta->c2h_bt_inquiry_page = false; ++ ++ /* set link exist status */ ++ if (!(bt_info & BT_INFO_8821A_2ANT_B_CONNECTION)) { ++ coex_sta->bt_link_exist = false; ++ coex_sta->pan_exist = false; ++ coex_sta->a2dp_exist = false; ++ coex_sta->hid_exist = false; ++ coex_sta->sco_exist = false; ++ } else { /* connection exists */ ++ coex_sta->bt_link_exist = true; ++ if (bt_info & BT_INFO_8821A_2ANT_B_FTP) ++ coex_sta->pan_exist = true; ++ else ++ coex_sta->pan_exist = false; ++ if (bt_info & BT_INFO_8821A_2ANT_B_A2DP) ++ coex_sta->a2dp_exist = true; ++ else ++ coex_sta->a2dp_exist = false; ++ if (bt_info & BT_INFO_8821A_2ANT_B_HID) ++ coex_sta->hid_exist = true; ++ else ++ coex_sta->hid_exist = false; ++ if (bt_info & BT_INFO_8821A_2ANT_B_SCO_ESCO) ++ coex_sta->sco_exist = true; ++ else ++ coex_sta->sco_exist = false; ++ ++ if ((coex_sta->hid_exist == false) && ++ (coex_sta->c2h_bt_inquiry_page == false) && ++ (coex_sta->sco_exist == false)) { ++ if (coex_sta->high_priority_tx + ++ coex_sta->high_priority_rx >= 160) ++ coex_sta->hid_exist = true; ++ } ++ } ++ ++ halbtc8821a2ant_update_bt_link_info(btcoexist); ++ ++ if (!(bt_info & BT_INFO_8821A_2ANT_B_CONNECTION)) { ++ coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info == ++ BT_INFO_8821A_2ANT_B_CONNECTION) { /* connection exists but no busy */ ++ coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if ((bt_info & BT_INFO_8821A_2ANT_B_SCO_ESCO) || ++ (bt_info & BT_INFO_8821A_2ANT_B_SCO_BUSY)) { ++ coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_SCO_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else if (bt_info & BT_INFO_8821A_2ANT_B_ACL_BUSY) { ++ coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_ACL_BUSY; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_MAX; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ if ((BT_8821A_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || ++ (BT_8821A_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || ++ (BT_8821A_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) { ++ bt_busy = true; ++ limited_dig = true; ++ } else { ++ bt_busy = false; ++ limited_dig = false; ++ } ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ coex_dm->limited_dig = limited_dig; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig); ++ ++ halbtc8821a2ant_run_coexist_mechanism(btcoexist); ++} ++ ++void ex_halbtc8821a2ant_halt_notify(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8821a2ant_wifi_off_hw_cfg(btcoexist); ++ /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */ ++ /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 */ ++ halbtc8821a2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ++ ex_halbtc8821a2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); ++} ++ ++void ex_halbtc8821a2ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_WIFI_PNP_SLEEP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to SLEEP\n"); ++ BTC_TRACE(trace_buf); ++ } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to WAKE UP\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_init_hw_config(btcoexist, false); ++ halbtc8821a2ant_init_coex_dm(btcoexist); ++ halbtc8821a2ant_query_bt_info(btcoexist); ++ } ++} ++ ++void ex_halbtc8821a2ant_periodical(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], ==========================Periodical===========================\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (coex_sta->dis_ver_info_cnt <= 5) { ++ coex_sta->dis_ver_info_cnt += 1; ++ if (coex_sta->dis_ver_info_cnt == 3) { ++ /* Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Set GNT_BT control by PTA\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821a2ant_set_ant_path(btcoexist, ++ BTC_ANT_WIFI_AT_MAIN, false, false); ++ } ++ } ++ ++#if (BT_AUTO_REPORT_ONLY_8821A_2ANT == 0) ++ halbtc8821a2ant_query_bt_info(btcoexist); ++ halbtc8821a2ant_monitor_bt_enable_disable(btcoexist); ++#else ++ halbtc8821a2ant_monitor_bt_ctr(btcoexist); ++ halbtc8821a2ant_monitor_wifi_ctr(btcoexist); ++ ++ if (halbtc8821a2ant_is_wifi_status_changed(btcoexist) || ++ coex_dm->auto_tdma_adjust) ++ halbtc8821a2ant_run_coexist_mechanism(btcoexist); ++#endif ++} ++ ++#endif ++ ++#endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */ +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a2Ant.h +new file mode 100644 +index 0000000..73252dd +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821a2Ant.h +@@ -0,0 +1,205 @@ ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8821A_SUPPORT == 1) ++ ++/* ******************************************* ++ * The following is for 8821A 2Ant BT Co-exist definition ++ * ******************************************* */ ++#define BT_AUTO_REPORT_ONLY_8821A_2ANT 1 ++ ++ ++#define BT_INFO_8821A_2ANT_B_FTP BIT(7) ++#define BT_INFO_8821A_2ANT_B_A2DP BIT(6) ++#define BT_INFO_8821A_2ANT_B_HID BIT(5) ++#define BT_INFO_8821A_2ANT_B_SCO_BUSY BIT(4) ++#define BT_INFO_8821A_2ANT_B_ACL_BUSY BIT(3) ++#define BT_INFO_8821A_2ANT_B_INQ_PAGE BIT(2) ++#define BT_INFO_8821A_2ANT_B_SCO_ESCO BIT(1) ++#define BT_INFO_8821A_2ANT_B_CONNECTION BIT(0) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT 2 ++ ++ ++#define BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */ ++#define BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES 46 /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */ ++ ++enum bt_info_src_8821a_2ant { ++ BT_INFO_SRC_8821A_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8821A_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8821A_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8821A_2ANT_MAX ++}; ++ ++enum bt_8821a_2ant_bt_status { ++ BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, ++ BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8821A_2ANT_BT_STATUS_INQ_PAGE = 0x2, ++ BT_8821A_2ANT_BT_STATUS_ACL_BUSY = 0x3, ++ BT_8821A_2ANT_BT_STATUS_SCO_BUSY = 0x4, ++ BT_8821A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, ++ BT_8821A_2ANT_BT_STATUS_MAX ++}; ++ ++enum bt_8821a_2ant_coex_algo { ++ BT_8821A_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8821A_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8821A_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8821A_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8821A_2ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8821A_2ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8821A_2ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8821A_2ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8821A_2ANT_COEX_ALGO_MAX = 0xb, ++}; ++ ++struct coex_dm_8821a_2ant { ++ /* fw mechanism */ ++ u8 pre_bt_dec_pwr_lvl; ++ u8 cur_bt_dec_pwr_lvl; ++ u8 pre_fw_dac_swing_lvl; ++ u8 cur_fw_dac_swing_lvl; ++ boolean cur_ignore_wlan_act; ++ boolean pre_ignore_wlan_act; ++ u8 pre_ps_tdma; ++ u8 cur_ps_tdma; ++ u8 ps_tdma_para[5]; ++ u8 ps_tdma_du_adj_type; ++ boolean reset_tdma_adjust; ++ boolean auto_tdma_adjust; ++ boolean pre_ps_tdma_on; ++ boolean cur_ps_tdma_on; ++ boolean pre_bt_auto_report; ++ boolean cur_bt_auto_report; ++ ++ /* sw mechanism */ ++ boolean pre_rf_rx_lpf_shrink; ++ boolean cur_rf_rx_lpf_shrink; ++ u32 bt_rf_0x1e_backup; ++ boolean pre_low_penalty_ra; ++ boolean cur_low_penalty_ra; ++ boolean pre_dac_swing_on; ++ u32 pre_dac_swing_lvl; ++ boolean cur_dac_swing_on; ++ u32 cur_dac_swing_lvl; ++ boolean pre_adc_back_off; ++ boolean cur_adc_back_off; ++ boolean pre_agc_table_en; ++ boolean cur_agc_table_en; ++ u32 pre_val0x6c0; ++ u32 cur_val0x6c0; ++ u32 pre_val0x6c4; ++ u32 cur_val0x6c4; ++ u32 pre_val0x6c8; ++ u32 cur_val0x6c8; ++ u8 pre_val0x6cc; ++ u8 cur_val0x6cc; ++ boolean limited_dig; ++ ++ /* algorithm related */ ++ u8 pre_algorithm; ++ u8 cur_algorithm; ++ u8 bt_status; ++ u8 wifi_chnl_info[3]; ++ ++ boolean need_recover0x948; ++ u32 backup0x948; ++ ++ u8 pre_lps; ++ u8 cur_lps; ++ u8 pre_rpwm; ++ u8 cur_rpwm; ++}; ++ ++struct coex_sta_8821a_2ant { ++ boolean bt_disabled; ++ boolean bt_link_exist; ++ boolean sco_exist; ++ boolean a2dp_exist; ++ boolean hid_exist; ++ boolean pan_exist; ++ ++ boolean under_lps; ++ boolean under_ips; ++ u32 high_priority_tx; ++ u32 high_priority_rx; ++ u32 low_priority_tx; ++ u32 low_priority_rx; ++ u8 bt_rssi; ++ boolean bt_tx_rx_mask; ++ u8 pre_bt_rssi_state; ++ u8 pre_wifi_rssi_state[4]; ++ boolean c2h_bt_info_req_sent; ++ u8 bt_info_c2h[BT_INFO_SRC_8821A_2ANT_MAX][10]; ++ u32 bt_info_c2h_cnt[BT_INFO_SRC_8821A_2ANT_MAX]; ++ boolean bt_whck_test; ++ boolean c2h_bt_inquiry_page; ++ u8 bt_retry_cnt; ++ u8 bt_info_ext; ++ ++ u32 crc_ok_cck; ++ u32 crc_ok_11g; ++ u32 crc_ok_11n; ++ u32 crc_ok_11n_agg; ++ ++ u32 crc_err_cck; ++ u32 crc_err_11g; ++ u32 crc_err_11n; ++ u32 crc_err_11n_agg; ++ ++ u8 coex_table_type; ++ boolean force_lps_on; ++ ++ u8 dis_ver_info_cnt; ++}; ++ ++/* ******************************************* ++ * The following is interface which will notify coex module. ++ * ******************************************* */ ++void ex_halbtc8821a2ant_power_on_setting(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821a2ant_pre_load_firmware(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821a2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only); ++void ex_halbtc8821a2ant_init_coex_dm(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821a2ant_ips_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a2ant_lps_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a2ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a2ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a2ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821a2ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length); ++void ex_halbtc8821a2ant_halt_notify(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821a2ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state); ++void ex_halbtc8821a2ant_periodical(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821a2ant_display_coex_info(IN struct btc_coexist *btcoexist); ++ ++#else ++#define ex_halbtc8821a2ant_power_on_setting(btcoexist) ++#define ex_halbtc8821a2ant_pre_load_firmware(btcoexist) ++#define ex_halbtc8821a2ant_init_hw_config(btcoexist, wifi_only) ++#define ex_halbtc8821a2ant_init_coex_dm(btcoexist) ++#define ex_halbtc8821a2ant_ips_notify(btcoexist, type) ++#define ex_halbtc8821a2ant_lps_notify(btcoexist, type) ++#define ex_halbtc8821a2ant_scan_notify(btcoexist, type) ++#define ex_halbtc8821a2ant_connect_notify(btcoexist, type) ++#define ex_halbtc8821a2ant_media_status_notify(btcoexist, type) ++#define ex_halbtc8821a2ant_specific_packet_notify(btcoexist, type) ++#define ex_halbtc8821a2ant_bt_info_notify(btcoexist, tmp_buf, length) ++#define ex_halbtc8821a2ant_halt_notify(btcoexist) ++#define ex_halbtc8821a2ant_pnp_notify(btcoexist, pnp_state) ++#define ex_halbtc8821a2ant_periodical(btcoexist) ++#define ex_halbtc8821a2ant_display_coex_info(btcoexist) ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821aCsr2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821aCsr2Ant.c +new file mode 100644 +index 0000000..b69d156 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821aCsr2Ant.c +@@ -0,0 +1,3997 @@ ++/* ************************************************************ ++ * Description: ++ * ++ * This file is for RTL8821A_CSR_CSR Co-exist mechanism ++ * ++ * History ++ * 2012/08/22 Cosa first check in. ++ * 2012/11/14 Cosa Revise for 8821A_CSR 2Ant out sourcing. ++ * ++ * ************************************************************ */ ++ ++/* ************************************************************ ++ * include files ++ * ************************************************************ */ ++#include "Mp_Precomp.h" ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8821A_SUPPORT == 1) ++ ++#define _BTCOEX_CSR 1 ++ ++#ifndef rtw_warn_on_8821acsr2ant ++#define rtw_warn_on_8821acsr2ant(condition) do {} while (0) ++#endif ++/* ************************************************************ ++ * Global variables, these are static variables ++ * ************************************************************ */ ++static u8 *trace_buf = &gl_btc_trace_buf[0]; ++static struct coex_dm_8821a_csr_2ant glcoex_dm_8821a_csr_2ant; ++static struct coex_dm_8821a_csr_2ant *coex_dm = &glcoex_dm_8821a_csr_2ant; ++static struct coex_sta_8821a_csr_2ant glcoex_sta_8821a_csr_2ant; ++static struct coex_sta_8821a_csr_2ant *coex_sta = &glcoex_sta_8821a_csr_2ant; ++ ++const char *const glbt_info_src_8821a_csr_2ant[] = { ++ "BT Info[wifi fw]", ++ "BT Info[bt rsp]", ++ "BT Info[bt auto report]", ++}; ++ ++u32 glcoex_ver_date_8821a_csr_2ant = 20140901; ++u32 glcoex_ver_8821a_csr_2ant = 0x51; ++ ++/* ************************************************************ ++ * local function proto type if needed ++ * ************************************************************ ++ * ************************************************************ ++ * local function start with halbtc8821aCsr2ant_ ++ * ************************************************************ */ ++u8 halbtc8821aCsr2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, ++ u8 rssi_thresh1) ++{ ++ s32 bt_rssi = 0; ++ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; ++ ++ bt_rssi = coex_sta->bt_rssi; ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT Rssi thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_bt_rssi_state; ++ } ++ ++ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (bt_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_bt_rssi_state == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (bt_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ bt_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (bt_rssi < rssi_thresh) ++ bt_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (bt_rssi < rssi_thresh1) ++ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_bt_rssi_state = bt_rssi_state; ++ ++ return bt_rssi_state; ++} ++ ++u8 halbtc8821aCsr2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist, ++ IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1) ++{ ++ s32 wifi_rssi = 0; ++ u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); ++ ++ if (level_num == 2) { ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else { ++ if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } else if (level_num == 3) { ++ if (rssi_thresh > rssi_thresh1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], wifi RSSI thresh error!!\n"); ++ BTC_TRACE(trace_buf); ++ return coex_sta->pre_wifi_rssi_state[index]; ++ } ++ ++ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) ++ || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_LOW)) { ++ if (wifi_rssi >= (rssi_thresh + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; ++ } else if ((coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_MEDIUM) || ++ (coex_sta->pre_wifi_rssi_state[index] == ++ BTC_RSSI_STATE_STAY_MEDIUM)) { ++ if (wifi_rssi >= (rssi_thresh1 + ++ BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) ++ wifi_rssi_state = BTC_RSSI_STATE_HIGH; ++ else if (wifi_rssi < rssi_thresh) ++ wifi_rssi_state = BTC_RSSI_STATE_LOW; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; ++ } else { ++ if (wifi_rssi < rssi_thresh1) ++ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; ++ else ++ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; ++ } ++ } ++ ++ coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; ++ ++ return wifi_rssi_state; ++} ++ ++void halbtc8821aCsr2ant_monitor_bt_enable_disable(IN struct btc_coexist ++ *btcoexist) ++{ ++ static u32 bt_disable_cnt = 0; ++ boolean bt_active = true, bt_disabled = false; ++ ++ /* This function check if bt is disabled */ ++ ++ if (coex_sta->high_priority_tx == 0 && ++ coex_sta->high_priority_rx == 0 && ++ coex_sta->low_priority_tx == 0 && ++ coex_sta->low_priority_rx == 0) ++ bt_active = false; ++ if (coex_sta->high_priority_tx == 0xffff && ++ coex_sta->high_priority_rx == 0xffff && ++ coex_sta->low_priority_tx == 0xffff && ++ coex_sta->low_priority_rx == 0xffff) ++ bt_active = false; ++ if (bt_active) { ++ bt_disable_cnt = 0; ++ bt_disabled = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is enabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ bt_disable_cnt++; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], bt all counters=0, %d times!!\n", ++ bt_disable_cnt); ++ BTC_TRACE(trace_buf); ++ if (bt_disable_cnt >= 2) { ++ bt_disabled = true; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, ++ &bt_disabled); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is disabled !!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ if (coex_sta->bt_disabled != bt_disabled) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is from %s to %s!!\n", ++ (coex_sta->bt_disabled ? "disabled" : "enabled"), ++ (bt_disabled ? "disabled" : "enabled")); ++ BTC_TRACE(trace_buf); ++ coex_sta->bt_disabled = bt_disabled; ++ if (!bt_disabled) { ++ } else { ++ } ++ } ++} ++ ++void halbtc8821aCsr2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist) ++{ ++ u32 reg_hp_txrx, reg_lp_txrx, u32tmp; ++ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; ++ ++ reg_hp_txrx = 0x770; ++ reg_lp_txrx = 0x774; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); ++ reg_hp_tx = u32tmp & MASKLWORD; ++ reg_hp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); ++ reg_lp_tx = u32tmp & MASKLWORD; ++ reg_lp_rx = (u32tmp & MASKHWORD) >> 16; ++ ++ coex_sta->high_priority_tx = reg_hp_tx; ++ coex_sta->high_priority_rx = reg_hp_rx; ++ coex_sta->low_priority_tx = reg_lp_tx; ++ coex_sta->low_priority_rx = reg_lp_rx; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx); ++ BTC_TRACE(trace_buf); ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", ++ reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx); ++ BTC_TRACE(trace_buf); ++ ++ /* reset counter */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x5d); ++} ++ ++void halbtc8821aCsr2ant_update_ra_mask(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 dis_rate_mask) ++{ ++ coex_dm->cur_ra_mask = dis_rate_mask; ++ ++ if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, ++ &coex_dm->cur_ra_mask); ++ coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; ++} ++ ++void halbtc8821aCsr2ant_auto_rate_fallback_retry(IN struct btc_coexist ++ *btcoexist, IN boolean force_exec, IN u8 type) ++{ ++ boolean wifi_under_b_mode = false; ++ ++ coex_dm->cur_arfr_type = type; ++ ++ if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { ++ switch (coex_dm->cur_arfr_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_4byte(btcoexist, 0x430, ++ coex_dm->backup_arfr_cnt1); ++ btcoexist->btc_write_4byte(btcoexist, 0x434, ++ coex_dm->backup_arfr_cnt2); ++ break; ++ case 1: ++ btcoexist->btc_get(btcoexist, ++ BTC_GET_BL_WIFI_UNDER_B_MODE, ++ &wifi_under_b_mode); ++ if (wifi_under_b_mode) { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x01010101); ++ } else { ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x430, 0x0); ++ btcoexist->btc_write_4byte(btcoexist, ++ 0x434, 0x04030201); ++ } ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; ++} ++ ++void halbtc8821aCsr2ant_retry_limit(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_retry_limit_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_retry_limit_type != ++ coex_dm->cur_retry_limit_type)) { ++ switch (coex_dm->cur_retry_limit_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ coex_dm->backup_retry_limit); ++ break; ++ case 1: /* retry limit=8 */ ++ btcoexist->btc_write_2byte(btcoexist, 0x42a, ++ 0x0808); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; ++} ++ ++void halbtc8821aCsr2ant_ampdu_max_time(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_ampdu_time_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) { ++ switch (coex_dm->cur_ampdu_time_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ coex_dm->backup_ampdu_max_time); ++ break; ++ case 1: /* AMPDU timw = 0x38 * 32us */ ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ 0x38); ++ break; ++ case 2: ++ btcoexist->btc_write_1byte(btcoexist, 0x456, ++ 0x17); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; ++} ++ ++void halbtc8821aCsr2Ant_AmpduMaxNum(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 type) ++{ ++ coex_dm->cur_ampdu_num_type = type; ++ ++ if (force_exec || ++ (coex_dm->pre_ampdu_num_type != coex_dm->cur_ampdu_num_type)) { ++ switch (coex_dm->cur_ampdu_num_type) { ++ case 0: /* normal mode */ ++ btcoexist->btc_write_2byte(btcoexist, 0x4ca, ++ coex_dm->backup_ampdu_max_num); ++ break; ++ case 1: ++ btcoexist->btc_write_2byte(btcoexist, 0x4ca, ++ 0x0808); ++ break; ++ case 2: ++ btcoexist->btc_write_2byte(btcoexist, 0x4ca, ++ 0x1f1f); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ coex_dm->pre_ampdu_num_type = coex_dm->cur_ampdu_num_type; ++ ++} ++ ++void halbtc8821aCsr2ant_limited_tx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type, ++ IN u8 retry_limit_type, IN u8 ampdu_time_type, IN u8 ampdu_num_type) ++{ ++ switch (ra_mask_type) { ++ case 0: /* normal mode */ ++ halbtc8821aCsr2ant_update_ra_mask(btcoexist, force_exec, ++ 0x0); ++ break; ++ case 1: /* disable cck 1/2 */ ++ halbtc8821aCsr2ant_update_ra_mask(btcoexist, force_exec, ++ 0x00000003); ++ break; ++ case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ ++ halbtc8821aCsr2ant_update_ra_mask(btcoexist, force_exec, ++ 0x0001f1f7); ++ break; ++ default: ++ break; ++ } ++ ++ halbtc8821aCsr2ant_auto_rate_fallback_retry(btcoexist, force_exec, ++ arfr_type); ++ halbtc8821aCsr2ant_retry_limit(btcoexist, force_exec, retry_limit_type); ++ halbtc8821aCsr2ant_ampdu_max_time(btcoexist, force_exec, ++ ampdu_time_type); ++ halbtc8821aCsr2Ant_AmpduMaxNum(btcoexist, force_exec, ampdu_num_type); ++} ++ ++ ++ ++void halbtc8821aCsr2ant_limited_rx(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rej_ap_agg_pkt, ++ IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size) ++{ ++ boolean reject_rx_agg = rej_ap_agg_pkt; ++ boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; ++ u8 rx_agg_size = agg_buf_size; ++ ++ /* ============================================ */ ++ /* Rx Aggregation related setting */ ++ /* ============================================ */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ &reject_rx_agg); ++ /* decide BT control aggregation buf size or not */ ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ &bt_ctrl_rx_agg_size); ++ /* aggregation buf size, only work when BT control Rx aggregation size. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); ++ /* real update aggregation setting */ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); ++} ++ ++void halbtc8821aCsr2ant_query_bt_info(IN struct btc_coexist *btcoexist) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ coex_sta->c2h_bt_info_req_sent = true; ++ ++ h2c_parameter[0] |= BIT(0); /* trigger */ ++ ++ rtw_warn_on_8821acsr2ant(_BTCOEX_CSR); ++ btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); ++} ++ ++u8 halbtc8821aCsr2ant_action_algorithm(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_stack_info *stack_info = &btcoexist->stack_info; ++ boolean bt_hs_on = false; ++ u8 algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED; ++ u8 num_of_diff_profile = 0; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ /* sync StackInfo with BT firmware and stack */ ++ stack_info->hid_exist = coex_sta->hid_exist; ++ stack_info->bt_link_exist = coex_sta->bt_link_exist; ++ stack_info->sco_exist = coex_sta->sco_exist; ++ stack_info->pan_exist = coex_sta->pan_exist; ++ stack_info->a2dp_exist = coex_sta->a2dp_exist; ++ ++ if (!stack_info->bt_link_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], No profile exists!!!\n"); ++ BTC_TRACE(trace_buf); ++ return algorithm; ++ } ++ ++ if (stack_info->sco_exist) ++ num_of_diff_profile++; ++ if (stack_info->hid_exist) ++ num_of_diff_profile++; ++ if (stack_info->pan_exist) ++ num_of_diff_profile++; ++ if (stack_info->a2dp_exist) ++ num_of_diff_profile++; ++ ++ if (num_of_diff_profile == 1) { ++ if (stack_info->sco_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_SCO; ++ } else { ++ if (stack_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID; ++ } else if (stack_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_A2DP; ++ } else if (stack_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PAN(HS) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PAN(EDR) only\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 2) { ++ if (stack_info->sco_exist) { ++ if (stack_info->hid_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } else if (stack_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP ==> SCO\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } else if (stack_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_SCO; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (stack_info->hid_exist && ++ stack_info->a2dp_exist) { ++ if (stack_info->num_of_hid >= 2) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID*2 + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP; ++ } ++ } else if (stack_info->hid_exist && ++ stack_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_HID; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (stack_info->pan_exist && ++ stack_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP; ++ } ++ } ++ } ++ } else if (num_of_diff_profile == 3) { ++ if (stack_info->sco_exist) { ++ if (stack_info->hid_exist && ++ stack_info->a2dp_exist) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + A2DP ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } else if (stack_info->hid_exist && ++ stack_info->pan_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } else if (stack_info->pan_exist && ++ stack_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } else { ++ if (stack_info->hid_exist && ++ stack_info->pan_exist && ++ stack_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], HID + A2DP + PAN(EDR)\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR; ++ } ++ } ++ } ++ } else if (num_of_diff_profile >= 3) { ++ if (stack_info->sco_exist) { ++ if (stack_info->hid_exist && ++ stack_info->pan_exist && ++ stack_info->a2dp_exist) { ++ if (bt_hs_on) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"); ++ BTC_TRACE(trace_buf); ++ ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"); ++ BTC_TRACE(trace_buf); ++ algorithm = ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; ++ } ++ } ++ } ++ } ++ ++ return algorithm; ++} ++ ++boolean halbtc8821aCsr2ant_need_to_dec_bt_pwr(IN struct btc_coexist *btcoexist) ++{ ++ boolean ret = false; ++ boolean bt_hs_on = false, wifi_connected = false; ++ s32 bt_hs_rssi = 0; ++ u8 bt_rssi_state; ++ ++ if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on)) ++ return false; ++ if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected)) ++ return false; ++ if (!btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi)) ++ return false; ++ ++ bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0); ++ ++ if (wifi_connected) { ++ if (bt_hs_on) { ++ if (bt_hs_rssi > 37) ++ ret = true; ++ } else { ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ ret = true; ++ } ++ } ++ ++ return ret; ++} ++ ++void halbtc8821aCsr2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist, ++ IN u8 dac_swing_lvl) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ /* There are several type of dacswing */ ++ /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */ ++ h2c_parameter[0] = dac_swing_lvl; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter); ++} ++ ++void halbtc8821aCsr2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist, ++ IN boolean dec_bt_pwr) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = 0; ++ ++ if (dec_bt_pwr) ++ h2c_parameter[0] |= BIT(1); ++ ++ rtw_warn_on_8821acsr2ant(_BTCOEX_CSR); ++ btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter); ++} ++ ++void halbtc8821aCsr2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean dec_bt_pwr) ++{ ++ coex_dm->cur_dec_bt_pwr = dec_bt_pwr; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_dec_bt_pwr == coex_dm->cur_dec_bt_pwr) ++ return; ++ } ++ ++ /* TODO: may CSR consider to decrease BT power? */ ++ /* halbtc8821aCsr2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr); */ ++ ++ coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr; ++} ++ ++void halbtc8821aCsr2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean enable_auto_report) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ h2c_parameter[0] = 0; ++ ++ if (enable_auto_report) ++ h2c_parameter[0] |= BIT(0); ++ ++ rtw_warn_on_8821acsr2ant(_BTCOEX_CSR); ++ btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); ++} ++ ++void halbtc8821aCsr2ant_bt_auto_report(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable_auto_report) ++{ ++ coex_dm->cur_bt_auto_report = enable_auto_report; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) ++ return; ++ } ++ /* halbtc8821aCsr2ant_set_bt_auto_report(btcoexist, coex_dm->cur_bt_auto_report); */ ++ ++ coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; ++} ++ ++void halbtc8821aCsr2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u8 fw_dac_swing_lvl) ++{ ++ coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_fw_dac_swing_lvl == ++ coex_dm->cur_fw_dac_swing_lvl) ++ return; ++ } ++ ++ halbtc8821aCsr2ant_set_fw_dac_swing_level(btcoexist, ++ coex_dm->cur_fw_dac_swing_lvl); ++ ++ coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl; ++} ++ ++void halbtc8821aCsr2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist ++ *btcoexist, IN boolean rx_rf_shrink_on) ++{ ++ if (rx_rf_shrink_on) { ++ /* Shrink RF Rx LPF corner */ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Shrink RF Rx LPF corner!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff, ++ 0xffffc); ++ } else { ++ /* Resume RF Rx LPF corner */ ++ /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */ ++ if (btcoexist->initilized) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Resume RF Rx LPF corner!!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, ++ 0xfffff, coex_dm->bt_rf_0x1e_backup); ++ } ++ } ++} ++ ++void halbtc8821aCsr2ant_rf_shrink(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean rx_rf_shrink_on) ++{ ++ coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_rf_rx_lpf_shrink == ++ coex_dm->cur_rf_rx_lpf_shrink) ++ return; ++ } ++ halbtc8821aCsr2ant_set_sw_rf_rx_lpf_corner(btcoexist, ++ coex_dm->cur_rf_rx_lpf_shrink); ++ ++ coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink; ++} ++ ++void halbtc8821aCsr2ant_set_sw_penalty_tx_rate_adaptive( ++ IN struct btc_coexist *btcoexist, IN boolean low_penalty_ra) ++{ ++ u8 h2c_parameter[6] = {0}; ++ ++ h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */ ++ ++ if (low_penalty_ra) { ++ h2c_parameter[1] |= BIT(0); ++ h2c_parameter[2] = ++ 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */ ++ h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */ ++ h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */ ++ h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */ ++ } ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter); ++} ++ ++void halbtc8821aCsr2ant_low_penalty_ra(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean low_penalty_ra) ++{ ++ coex_dm->cur_low_penalty_ra = low_penalty_ra; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) ++ return; ++ } ++ halbtc8821aCsr2ant_set_sw_penalty_tx_rate_adaptive(btcoexist, ++ coex_dm->cur_low_penalty_ra); ++ ++ coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; ++} ++ ++void halbtc8821aCsr2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist, ++ IN u32 level) ++{ ++ u8 val = (u8)level; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Write SwDacSwing = 0x%x\n", level); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc5b, 0x3e, val); ++} ++ ++void halbtc8821aCsr2ant_set_sw_full_time_dac_swing(IN struct btc_coexist ++ *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl) ++{ ++ if (sw_dac_swing_on) ++ halbtc8821aCsr2ant_set_dac_swing_reg(btcoexist, ++ sw_dac_swing_lvl); ++ else ++ halbtc8821aCsr2ant_set_dac_swing_reg(btcoexist, 0x18); ++} ++ ++ ++void halbtc8821aCsr2ant_dac_swing(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl) ++{ ++ coex_dm->cur_dac_swing_on = dac_swing_on; ++ coex_dm->cur_dac_swing_lvl = dac_swing_lvl; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) && ++ (coex_dm->pre_dac_swing_lvl == ++ coex_dm->cur_dac_swing_lvl)) ++ return; ++ } ++ delay_ms(30); ++ halbtc8821aCsr2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on, ++ dac_swing_lvl); ++ ++ coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on; ++ coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl; ++} ++ ++void halbtc8821aCsr2ant_set_adc_back_off(IN struct btc_coexist *btcoexist, ++ IN boolean adc_back_off) ++{ ++ if (adc_back_off) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB BackOff Level On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x3); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BB BackOff Level Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x1); ++ } ++} ++ ++void halbtc8821aCsr2ant_adc_back_off(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean adc_back_off) ++{ ++ coex_dm->cur_adc_back_off = adc_back_off; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off) ++ return; ++ } ++ halbtc8821aCsr2ant_set_adc_back_off(btcoexist, ++ coex_dm->cur_adc_back_off); ++ ++ coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off; ++} ++ ++void halbtc8821aCsr2ant_set_agc_table(IN struct btc_coexist *btcoexist, ++ IN boolean agc_table_en) ++{ ++ u8 rssi_adjust_val = 0; ++ ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); ++ if (agc_table_en) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table On!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x28F4B); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x10AB2); ++ rssi_adjust_val = 8; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Agc Table Off!\n"); ++ BTC_TRACE(trace_buf); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x2884B); ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff, ++ 0x104B2); ++ } ++ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); ++ ++ /* set rssi_adjust_val for wifi module. */ ++ btcoexist->btc_set(btcoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, ++ &rssi_adjust_val); ++} ++ ++void halbtc8821aCsr2ant_agc_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean agc_table_en) ++{ ++ coex_dm->cur_agc_table_en = agc_table_en; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en) ++ return; ++ } ++ halbtc8821aCsr2ant_set_agc_table(btcoexist, agc_table_en); ++ ++ coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en; ++} ++ ++void halbtc8821aCsr2ant_set_coex_table(IN struct btc_coexist *btcoexist, ++ IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); ++ ++ btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); ++} ++ ++void halbtc8821aCsr2ant_coex_table(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4, ++ IN u32 val0x6c8, IN u8 val0x6cc) ++{ ++ coex_dm->cur_val0x6c0 = val0x6c0; ++ coex_dm->cur_val0x6c4 = val0x6c4; ++ coex_dm->cur_val0x6c8 = val0x6c8; ++ coex_dm->cur_val0x6cc = val0x6cc; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && ++ (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && ++ (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && ++ (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) ++ return; ++ } ++ halbtc8821aCsr2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, ++ val0x6c8, val0x6cc); ++ ++ coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; ++ coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; ++ coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; ++ coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; ++} ++ ++void halbtc8821aCsr2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean enable) ++{ ++ u8 h2c_parameter[1] = {0}; ++ ++ if (enable) { ++ h2c_parameter[0] |= BIT(0); /* function enable */ ++ } ++ ++ rtw_warn_on_8821acsr2ant(_BTCOEX_CSR); ++ btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); ++} ++ ++void halbtc8821aCsr2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean enable) ++{ ++ coex_dm->cur_ignore_wlan_act = enable; ++ ++ if (!force_exec) { ++ if (coex_dm->pre_ignore_wlan_act == ++ coex_dm->cur_ignore_wlan_act) ++ return; ++ } ++ /* halbtc8821aCsr2ant_set_fw_ignore_wlan_act(btcoexist, enable); */ ++ ++ coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; ++} ++ ++void halbtc8821aCsr2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist, ++ IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5) ++{ ++ u8 h2c_parameter[6] = {0}; ++ ++ h2c_parameter[0] = byte1; ++ h2c_parameter[1] = byte2; ++ h2c_parameter[2] = byte3; ++ h2c_parameter[3] = byte4; ++ h2c_parameter[4] = byte5; ++ h2c_parameter[5] = 0x01; ++ ++ coex_dm->ps_tdma_para[0] = byte1; ++ coex_dm->ps_tdma_para[1] = byte2; ++ coex_dm->ps_tdma_para[2] = byte3; ++ coex_dm->ps_tdma_para[3] = byte4; ++ coex_dm->ps_tdma_para[4] = byte5; ++ coex_dm->ps_tdma_para[5] = 0x01; ++ ++ btcoexist->btc_fill_h2c(btcoexist, 0x60, 6, h2c_parameter); ++} ++ ++void halbtc8821aCsr2ant_sw_mechanism1(IN struct btc_coexist *btcoexist, ++ IN boolean shrink_rx_lpf, IN boolean low_penalty_ra, ++ IN boolean limited_dig, IN boolean bt_lna_constrain) ++{ ++ u32 wifi_bw; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_HT40 != wifi_bw) { /* only shrink RF Rx LPF for HT40 */ ++ if (shrink_rx_lpf) ++ shrink_rx_lpf = false; ++ } ++ ++ halbtc8821aCsr2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); ++ halbtc8821aCsr2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, ++ low_penalty_ra); ++ ++ /* no limited DIG */ ++ /* halbtc8821aCsr2ant_setBtLnaConstrain(btcoexist, NORMAL_EXEC, bt_lna_constrain); */ ++} ++ ++void halbtc8821aCsr2ant_sw_mechanism2(IN struct btc_coexist *btcoexist, ++ IN boolean agc_table_shift, IN boolean adc_back_off, ++ IN boolean sw_dac_swing, IN u32 dac_swing_lvl) ++{ ++ /* halbtc8821aCsr2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */ ++ halbtc8821aCsr2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); ++ halbtc8821aCsr2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, ++ dac_swing_lvl); ++} ++ ++void halbtc8821aCsr2ant_set_ant_path(IN struct btc_coexist *btcoexist, ++ IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ u32 u32tmp = 0; ++ u8 h2c_parameter[2] = {0}; ++ ++ if (init_hwcfg) { ++ /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */ ++ u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp &= ~BIT(23); ++ u32tmp |= BIT(24); ++ btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp); ++ ++ btcoexist->btc_write_4byte(btcoexist, 0x974, 0x3ff); ++ btcoexist->btc_write_1byte(btcoexist, 0xcb4, 0x77); ++ ++ if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) { ++ /* tell firmware "antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix */ ++ h2c_parameter[0] = 1; ++ h2c_parameter[1] = 1; ++ btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, ++ h2c_parameter); ++ } else { ++ /* tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix */ ++ h2c_parameter[0] = 0; ++ h2c_parameter[1] = 1; ++ btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, ++ h2c_parameter); ++ } ++ } ++ ++ /* ext switch setting */ ++ switch (ant_pos_type) { ++ case BTC_ANT_WIFI_AT_MAIN: ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7, ++ 0x30, 0x1); ++ break; ++ case BTC_ANT_WIFI_AT_AUX: ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7, ++ 0x30, 0x2); ++ break; ++ } ++} ++ ++void halbtc8821aCsr2ant_ps_tdma(IN struct btc_coexist *btcoexist, ++ IN boolean force_exec, IN boolean turn_on, IN u8 type) ++{ ++ coex_dm->cur_ps_tdma_on = turn_on; ++ coex_dm->cur_ps_tdma = type; ++ ++ if (!force_exec) { ++ if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && ++ (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) ++ return; ++ } ++ if (turn_on) { ++ switch (type) { ++ case 1: ++ default: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ break; ++ case 2: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x12, 0x12, 0xe1, 0x90); ++ break; ++ case 3: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x1c, 0x3, 0xf1, 0x90); ++ break; ++ case 4: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x10, 0x03, 0xf1, 0x90); ++ break; ++ case 5: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x1a, 0x1a, 0x60, 0x90); ++ break; ++ case 6: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x12, 0x12, 0x60, 0x90); ++ break; ++ case 7: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x1c, 0x3, 0x70, 0x90); ++ break; ++ case 8: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xa3, 0x10, 0x3, 0x70, 0x90); ++ break; ++ case 9: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ break; ++ case 10: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x12, 0x12, 0xe1, 0x90); ++ break; ++ case 11: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0xa, 0xa, 0xe1, 0x90); ++ break; ++ case 12: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 13: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x1a, 0x1a, 0x60, 0x90); ++ break; ++ case 14: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x12, 0x12, 0x60, 0x90); ++ break; ++ case 15: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0xa, 0xa, 0x60, 0x90); ++ break; ++ case 16: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x5, 0x5, 0x60, 0x90); ++ break; ++ case 17: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xa3, 0x2f, 0x2f, 0x60, 0x90); ++ break; ++ case 18: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x5, 0x5, 0xe1, 0x90); ++ break; ++ case 19: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x25, 0x25, 0xe1, 0x90); ++ break; ++ case 20: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x25, 0x25, 0x60, 0x90); ++ break; ++ case 21: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x15, 0x03, 0x70, 0x90); ++ break; ++ case 22: /* ad2dp master */ ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xeb, 0x11, 0x11, 0x21, 0x10); ++ break; ++ case 23: /* a2dp slave */ ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xeb, 0x12, 0x12, 0x20, 0x10); ++ break; ++ case 71: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, ++ 0xe3, 0x1a, 0x1a, 0xe1, 0x90); ++ break; ++ } ++ } else { ++ /* disable PS tdma */ ++ switch (type) { ++ case 0: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x40, 0x0); ++ break; ++ case 1: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x48, 0x0); ++ break; ++ default: ++ halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, 0x0, ++ 0x0, 0x0, 0x40, 0x0); ++ break; ++ } ++ } ++ ++ /* update pre state */ ++ coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; ++ coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; ++} ++ ++void halbtc8821aCsr2ant_coex_all_off(IN struct btc_coexist *btcoexist) ++{ ++ /* fw all off */ ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ /* sw all off */ ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++ ++ /* hw all off */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55555555, ++ 0x55555555, 0xffff, 0x3); ++} ++ ++void halbtc8821aCsr2ant_coex_under_5g(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821aCsr2ant_coex_all_off(btcoexist); ++ ++ halbtc8821aCsr2ant_ignore_wlan_act(btcoexist, NORMAL_EXEC, true); ++} ++ ++void halbtc8821aCsr2ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ /* force to reset coex mechanism */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, FORCE_EXEC, 0x55555555, ++ 0x55555555, 0xffff, 0x3); ++ ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6); ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, false); ++ ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); ++} ++ ++void halbtc8821aCsr2ant_bt_inquiry_page(IN struct btc_coexist *btcoexist) ++{ ++ boolean low_pwr_disable = true; ++ ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, ++ 0x5afa5afa, 0xffff, 0x3); ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); ++} ++boolean halbtc8821aCsr2ant_is_common_action(IN struct btc_coexist *btcoexist) ++{ ++ boolean common = false, wifi_connected = false, wifi_busy = false; ++ boolean low_pwr_disable = false; ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); ++ ++ if (!wifi_connected && ++ BT_8821A_CSR_2ANT_BT_STATUS_IDLE == coex_dm->bt_status) { ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi IPS + BT IPS!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, ++ 0, 0); ++ halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, 0, 0, 0); ++ ++ common = true; ++ } else if (wifi_connected && ++ (BT_8821A_CSR_2ANT_BT_STATUS_IDLE == ++ coex_dm->bt_status)) { ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ if (wifi_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Busy + BT IPS!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ false, 1); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi LPS + BT IPS!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ false, 1); ++ } ++ ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, ++ 0, 0); ++ halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, 0, 0, 0); ++ ++ common = true; ++ } else if (!wifi_connected && ++ (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == ++ coex_dm->bt_status)) { ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi IPS + BT LPS!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, ++ 0, 0); ++ halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, 0, 0, 0); ++ ++ common = true; ++ } else if (wifi_connected && ++ (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == ++ coex_dm->bt_status)) { ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ if (wifi_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Busy + BT LPS!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ false, 1); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi LPS + BT LPS!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ false, 1); ++ } ++ ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, true, ++ true); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, ++ 0, 0); ++ halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, 0, 0, 0); ++ ++ common = true; ++ } else if (!wifi_connected && ++ (BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == ++ coex_dm->bt_status)) { ++ low_pwr_disable = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi IPS + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ /* halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); */ ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false, ++ false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false, ++ 0x18); ++ halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, ++ 0, 0); ++ halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, 0, 0, 0); ++ ++ common = true; ++ } else { ++ low_pwr_disable = true; ++ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, ++ &low_pwr_disable); ++ ++ if (wifi_busy) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi Busy + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ common = false; ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Wifi LPS + BT Busy!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 21); ++ ++ if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, ++ NORMAL_EXEC, true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, ++ NORMAL_EXEC, false); ++ ++ common = true; ++ } ++ ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, true, ++ true); ++ } ++ ++ if (common == true) ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); ++ ++ return common; ++} ++void halbtc8821aCsr2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist, ++ IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval) ++{ ++ static s32 up, dn, m, n, wait_count; ++ s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */ ++ u8 retry_count = 0; ++ ++ if (coex_dm->reset_tdma_adjust) { ++ coex_dm->reset_tdma_adjust = false; ++ { ++ if (sco_hid) { ++ if (tx_pause) { ++ if (max_interval == 1) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 13); ++ coex_dm->ps_tdma_du_adj_type = ++ 13; ++ } else if (max_interval == 2) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (max_interval == 3) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } ++ } else { ++ if (max_interval == 1) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = ++ 9; ++ } else if (max_interval == 2) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (max_interval == 3) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } ++ } ++ } else { ++ if (tx_pause) { ++ if (max_interval == 1) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 5); ++ coex_dm->ps_tdma_du_adj_type = ++ 5; ++ } else if (max_interval == 2) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (max_interval == 3) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } ++ } else { ++ if (max_interval == 1) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (max_interval == 2) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (max_interval == 3) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } ++ } ++ } ++ } ++ /* ============ */ ++ up = 0; ++ dn = 0; ++ m = 1; ++ n = 3; ++ result = 0; ++ wait_count = 0; ++ } else { ++ /* accquire the BT TRx retry count from BT_Info byte2 */ ++ retry_count = coex_sta->bt_retry_cnt; ++ result = 0; ++ wait_count++; ++ ++ if (retry_count == ++ 0) { /* no retry in the last 2-second duration */ ++ up++; ++ dn--; ++ ++ if (dn <= 0) ++ dn = 0; ++ ++ if (up >= n) { /* if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration */ ++ wait_count = 0; ++ n = 3; ++ up = 0; ++ dn = 0; ++ result = 1; ++ } ++ } else if (retry_count <= ++ 3) { /* <=3 retry in the last 2-second duration */ ++ up--; ++ dn++; ++ ++ if (up <= 0) ++ up = 0; ++ ++ if (dn == 2) { /* if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration */ ++ if (wait_count <= 2) ++ m++; /* ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ } else { /* retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration */ ++ if (wait_count == 1) ++ m++; /* ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ */ ++ else ++ m = 1; ++ ++ if (m >= 20) /* m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. */ ++ m = 20; ++ ++ n = 3 * m; ++ up = 0; ++ dn = 0; ++ wait_count = 0; ++ result = -1; ++ } ++ ++ if (max_interval == 1) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 71) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 5); ++ coex_dm->ps_tdma_du_adj_type = 5; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 5); ++ coex_dm->ps_tdma_du_adj_type = 5; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 13); ++ coex_dm->ps_tdma_du_adj_type = 13; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 5); ++ coex_dm->ps_tdma_du_adj_type = ++ 5; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 13); ++ coex_dm->ps_tdma_du_adj_type = ++ 13; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 71); ++ coex_dm->ps_tdma_du_adj_type = 71; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 9); ++ coex_dm->ps_tdma_du_adj_type = 9; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 71) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 1); ++ coex_dm->ps_tdma_du_adj_type = ++ 1; ++ } else if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 71); ++ coex_dm->ps_tdma_du_adj_type = ++ 71; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 9); ++ coex_dm->ps_tdma_du_adj_type = ++ 9; ++ } ++ } ++ } ++ } else if (max_interval == 2) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 6); ++ coex_dm->ps_tdma_du_adj_type = 6; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 14); ++ coex_dm->ps_tdma_du_adj_type = 14; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 6); ++ coex_dm->ps_tdma_du_adj_type = ++ 6; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 14); ++ coex_dm->ps_tdma_du_adj_type = ++ 14; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 2); ++ coex_dm->ps_tdma_du_adj_type = 2; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 10); ++ coex_dm->ps_tdma_du_adj_type = 10; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 2); ++ coex_dm->ps_tdma_du_adj_type = ++ 2; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 10); ++ coex_dm->ps_tdma_du_adj_type = ++ 10; ++ } ++ } ++ } ++ } else if (max_interval == 3) { ++ if (tx_pause) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 7); ++ coex_dm->ps_tdma_du_adj_type = 7; ++ } else if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 8); ++ coex_dm->ps_tdma_du_adj_type = 8; ++ } ++ if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 15); ++ coex_dm->ps_tdma_du_adj_type = 15; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 16); ++ coex_dm->ps_tdma_du_adj_type = 16; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 8); ++ coex_dm->ps_tdma_du_adj_type = ++ 8; ++ } else if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 16); ++ coex_dm->ps_tdma_du_adj_type = ++ 16; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 7); ++ coex_dm->ps_tdma_du_adj_type = ++ 7; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 15); ++ coex_dm->ps_tdma_du_adj_type = ++ 15; ++ } ++ } ++ } else { ++ if (coex_dm->cur_ps_tdma == 5) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 6) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 7) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 3); ++ coex_dm->ps_tdma_du_adj_type = 3; ++ } else if (coex_dm->cur_ps_tdma == 8) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 4); ++ coex_dm->ps_tdma_du_adj_type = 4; ++ } ++ if (coex_dm->cur_ps_tdma == 13) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 14) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 15) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 11); ++ coex_dm->ps_tdma_du_adj_type = 11; ++ } else if (coex_dm->cur_ps_tdma == 16) { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, ++ NORMAL_EXEC, true, 12); ++ coex_dm->ps_tdma_du_adj_type = 12; ++ } ++ if (result == -1) { ++ if (coex_dm->cur_ps_tdma == 1) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 4); ++ coex_dm->ps_tdma_du_adj_type = ++ 4; ++ } else if (coex_dm->cur_ps_tdma == 9) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 12); ++ coex_dm->ps_tdma_du_adj_type = ++ 12; ++ } ++ } else if (result == 1) { ++ if (coex_dm->cur_ps_tdma == 4) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 3) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 2) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 3); ++ coex_dm->ps_tdma_du_adj_type = ++ 3; ++ } else if (coex_dm->cur_ps_tdma == 12) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 11) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } else if (coex_dm->cur_ps_tdma == 10) { ++ halbtc8821aCsr2ant_ps_tdma( ++ btcoexist, NORMAL_EXEC, ++ true, 11); ++ coex_dm->ps_tdma_du_adj_type = ++ 11; ++ } ++ } ++ } ++ } ++ } ++ ++ /* if current PsTdma not match with the recorded one (when scan, dhcp...), */ ++ /* then we have to adjust it back to the previous record one. */ ++ if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) { ++ boolean scan = false, link = false, roam = false; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n", ++ coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type); ++ BTC_TRACE(trace_buf); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); ++ ++ if (!scan && !link && !roam) ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ coex_dm->ps_tdma_du_adj_type); ++ else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ ++ /* when halbtc8821aCsr2ant_tdma_duration_adjust() is called, fw dac swing is included in the function. */ ++ /* if(coex_dm->ps_tdma_du_adj_type == 71) */ ++ /* halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc); //Skip because A2DP get worse at HT40 */ ++ /* else */ ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, ++ 0x6); ++} ++ ++/* SCO only or SCO+PAN(HS) */ ++void halbtc8821aCsr2ant_action_sco(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55555555, ++ 0x55555555, 0xffffff, 0x3); ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ ++ halbtc8821aCsr2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, true); ++ ++ halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 1, 0, 2, 0); ++ ++ if (coex_sta->slave == false) ++ halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ true, 0x4); ++ else ++ halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, false, ++ true, 0x2); ++ ++ /* ++ wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); ++ bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0); ++ ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4); ++ ++ if(halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) ++ { ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3); ++ } ++ ++ if(BTC_WIFI_BW_HT40 == wifi_bw) ++ { ++ ++ ++ ++ ++ if( (bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ } ++ ++ ++ if( (wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist,true,true,false,false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist,true,false,false,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist,true,true,false,false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist,false,false,false,0x18); ++ } ++ } ++ else ++ { ++ ++ ++ ++ if( (bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); ++ } ++ ++ ++ if( (wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist,false,true,false,false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist,true,false,false,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist,false,true,false,false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist,false,false,false,0x18); ++ } ++ } ++ */ ++} ++ ++ ++void halbtc8821aCsr2ant_action_hid(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, ++ 15, 0); ++ bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0); ++ ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); ++ else /* for HID quality & wifi performance balance at 11n mode */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5aea5aea, 0xffff, 0x3); ++ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 9); ++ else ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 13); ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } else { ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 9); ++ else ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 13); ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ true, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ true, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } ++} ++ ++/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */ ++void halbtc8821aCsr2ant_action_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x8); ++ ++ if (coex_sta->slave == false) { ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3); ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22); ++ halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, ++ 0, 1); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, true, ++ 0x0c); ++ } else { ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3); ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23); ++ halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, ++ 0, 2); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, true, ++ 0x18); ++ } ++ ++ /* ++ wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); ++ bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0); ++ ++ ++ ++ ++ ++ if(halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if(BTC_WIFI_BW_HT40 == wifi_bw) ++ { ++ ++ if( (bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, false, false, 1); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, false, true, 1); ++ } ++ ++ ++ if( (wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist,true,false,false,false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist,true,false,false,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist,true,false,false,false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist,false,false,false,0x18); ++ } ++ } ++ else ++ { ++ ++ if( (bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, false, false, 1); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, false, true, 1); ++ } ++ ++ ++ if( (wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH) ) ++ { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist,false,false,false,false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist,true,false,false,0x18); ++ } ++ else ++ { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist,false,false,false,false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist,false,false,false,0x18); ++ } ++ } ++ */ ++} ++ ++void halbtc8821aCsr2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state, bt_info_ext; ++ u32 wifi_bw; ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, ++ 15, 0); ++ bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0); ++ ++ /* fw dac swing is called in halbtc8821aCsr2ant_tdma_duration_adjust() */ ++ /* halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); */ ++ ++ ++ if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ /* fw mechanism */ ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, ++ false, true, 2); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, ++ false, true, 1); ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } else { ++ /* fw mechanism */ ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, ++ false, true, 2); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, ++ false, true, 1); ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } ++} ++ ++void halbtc8821aCsr2ant_action_pan_edr(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, ++ 15, 0); ++ bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0); ++ ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3); ++ else /* for HID quality & wifi performance balance at 11n mode */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3); ++ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 1); ++ else ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 5); ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } else { ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 1); ++ else ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 5); ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } ++} ++ ++ ++/* PAN(HS) only */ ++void halbtc8821aCsr2ant_action_pan_hs(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, ++ 15, 0); ++ bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0); ++ ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ /* fw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, ++ true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, ++ false); ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } else { ++ /* fw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, ++ true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, ++ false); ++ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ false, 1); ++ else ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, ++ false, 1); ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } ++} ++ ++/* PAN(EDR)+A2DP */ ++void halbtc8821aCsr2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state, bt_info_ext; ++ u32 wifi_bw; ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, ++ 15, 0); ++ bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0); ++ ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); ++ else /* for HID quality & wifi performance balance at 11n mode */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); ++ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, false, false, 3); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, false, false, 3); ++ } else { ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, false, true, 3); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, false, true, 3); ++ } ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ }; ++ } else { ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, false, false, 3); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, false, false, 3); ++ } else { ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, false, true, 3); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, false, true, 3); ++ } ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ false, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } ++} ++ ++void halbtc8821aCsr2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state; ++ u32 wifi_bw; ++ ++ wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, ++ 15, 0); ++ bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0); ++ ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3); ++ else /* for HID quality & wifi performance balance at 11n mode */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3); ++ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 3); ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 10); ++ else ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 14); ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } else { ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 10); ++ else ++ halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, ++ 14); ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ true, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ true, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } ++} ++ ++/* HID+A2DP+PAN(EDR) */ ++void halbtc8821aCsr2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist ++ *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state, bt_info_ext; ++ u32 wifi_bw; ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, ++ 15, 0); ++ bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0); ++ ++ halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); ++ ++ if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); ++ else /* for HID quality & wifi performance balance at 11n mode */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); ++ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 3); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 3); ++ } else { ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 3); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 3); ++ } ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } else { ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, false, 3); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, false, 3); ++ } else { ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 3); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 3); ++ } ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ true, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ true, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } ++} ++ ++void halbtc8821aCsr2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist) ++{ ++ u8 wifi_rssi_state, bt_rssi_state, bt_info_ext; ++ u32 wifi_bw; ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, ++ 15, 0); ++ bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0); ++ ++ if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist)) ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); ++ else ++ halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ ++ if (BTC_WIFI_BW_LEGACY == wifi_bw) { /* for HID at 11b/g mode */ ++ /* Allen halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3); ++ } else { /* for HID quality & wifi performance balance at 11n mode */ ++ /* Allen halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, ++ 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3); ++ ++ } ++ ++ if (BTC_WIFI_BW_HT40 == wifi_bw) { ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 2); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 2); ++ } else { ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 2); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 2); ++ } ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, ++ false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } else { ++ /* fw mechanism */ ++ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ if (bt_info_ext & BIT(0)) { /* a2dp basic rate */ ++ /* halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, true, false, 2); */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 2); ++ ++ } else { /* a2dp edr rate */ ++ /* Allen halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, true, false, 2); */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 2); ++ } ++ } else { ++ if (bt_info_ext & BIT(0)) /* a2dp basic rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 2); ++ else /* a2dp edr rate */ ++ halbtc8821aCsr2ant_tdma_duration_adjust( ++ btcoexist, true, true, 2); ++ } ++ ++ /* sw mechanism */ ++ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || ++ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ true, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true, ++ false, false, 0x18); ++ } else { ++ halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, ++ true, false, false); ++ halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, ++ false, false, 0x18); ++ } ++ } ++} ++ ++void halbtc8821aCsr2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist) ++{ ++ boolean wifi_under_5g = false; ++ u8 algorithm = 0; ++ ++ if (btcoexist->manual_control) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Manual control!!!\n"); ++ BTC_TRACE(trace_buf); ++ return; ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ ++ if (wifi_under_5g) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_coex_under_5g(btcoexist); ++ return; ++ } ++ ++ { ++ algorithm = halbtc8821aCsr2ant_action_algorithm(btcoexist); ++ if (coex_sta->c2h_bt_inquiry_page && ++ (BT_8821A_CSR_2ANT_COEX_ALGO_PANHS != algorithm)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], BT is under inquiry/page scan !!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_bt_inquiry_page(btcoexist); ++ return; ++ } ++ ++ coex_dm->cur_algorithm = algorithm; ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm); ++ BTC_TRACE(trace_buf); ++ ++ if (halbtc8821aCsr2ant_is_common_action(btcoexist)) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant common.\n"); ++ BTC_TRACE(trace_buf); ++ coex_dm->reset_tdma_adjust = true; ++ } else { ++ if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n", ++ coex_dm->pre_algorithm, ++ coex_dm->cur_algorithm); ++ BTC_TRACE(trace_buf); ++ coex_dm->reset_tdma_adjust = true; ++ } ++ switch (coex_dm->cur_algorithm) { ++ case BT_8821A_CSR_2ANT_COEX_ALGO_SCO: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = SCO.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_action_sco( ++ btcoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_action_hid( ++ btcoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_action_a2dp( ++ btcoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_action_a2dp_pan_hs( ++ btcoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_action_pan_edr( ++ btcoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_PANHS: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HS mode.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_action_pan_hs( ++ btcoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_action_pan_edr_a2dp( ++ btcoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_action_pan_edr_hid( ++ btcoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR ++ : ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_action_hid_a2dp_pan_edr( ++ btcoexist); ++ break; ++ case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_action_hid_a2dp( ++ btcoexist); ++ break; ++ default: ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_coex_all_off( ++ btcoexist); ++ break; ++ } ++ coex_dm->pre_algorithm = coex_dm->cur_algorithm; ++ } ++ } ++} ++ ++ ++ ++/* ************************************************************ ++ * work around function start with wa_halbtc8821aCsr2ant_ ++ * ************************************************************ ++ * ************************************************************ ++ * extern function start with ex_halbtc8821aCsr2ant_ ++ * ************************************************************ */ ++void ex_halbtc8821aCsr2ant_power_on_setting(IN struct btc_coexist *btcoexist) ++{ ++} ++ ++void ex_halbtc8821aCsr2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], 2Ant Init HW Config!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (wifi_only) ++ return; ++ ++ /* if(back_up) */ ++ { ++ /* backup rf 0x1e value */ ++ coex_dm->bt_rf_0x1e_backup = btcoexist->btc_get_rf_reg( ++ btcoexist, BTC_RF_A, 0x1e, 0xfffff); ++ coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, ++ 0x430); ++ coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, ++ 0x434); ++ coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( ++ btcoexist, 0x42a); ++ coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte( ++ btcoexist, 0x456); ++ coex_dm->backup_ampdu_max_num = btcoexist->btc_read_2byte( ++ btcoexist, 0x4ca); ++ } ++ ++#if 0 /* REMOVE */ ++ /* 0x790[5:0]=0x5 */ ++ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); ++ u8tmp &= 0xc0; ++ u8tmp |= 0x5; ++ btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp); ++#endif ++ ++ /* Antenna config */ ++ halbtc8821aCsr2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, true, ++ false); ++ ++ /* PTA parameter */ ++ halbtc8821aCsr2ant_coex_table(btcoexist, FORCE_EXEC, 0x55555555, ++ 0x55555555, 0xffff, 0x3); ++ ++ /* Enable counter statistics */ ++ btcoexist->btc_write_1byte(btcoexist, 0x76e, ++ 0xc); /* 0x76e[3] =1, WLAN_Act control by PTA */ ++ btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3); ++ ++#if 0 /* REMOVE */ ++ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1); ++#endif ++} ++ ++void ex_halbtc8821aCsr2ant_init_coex_dm(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Coex Mechanism Init!!\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8821aCsr2ant_init_coex_dm(btcoexist); ++} ++ ++void ex_halbtc8821aCsr2ant_display_coex_info(IN struct btc_coexist *btcoexist) ++{ ++ struct btc_board_info *board_info = &btcoexist->board_info; ++ struct btc_stack_info *stack_info = &btcoexist->stack_info; ++ u8 *cli_buf = btcoexist->cli_buf; ++ u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; ++ u32 u32tmp[4]; ++ u32 fw_ver = 0, bt_patch_ver = 0; ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n ============[BT Coexist info]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "Ant PG number/ Ant mechanism:", ++ board_info->pg_ant_num, board_info->btdm_ant_num); ++ CL_PRINTF(cli_buf); ++ ++ if (btcoexist->manual_control) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "[Action Manual control]!!"); ++ CL_PRINTF(cli_buf); ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", ++ "CoexVer/ FwVer/ PatchVer", ++ glcoex_ver_date_8821a_csr_2ant, glcoex_ver_8821a_csr_2ant, ++ fw_ver, bt_patch_ver, bt_patch_ver); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", ++ "Wifi channel informed to BT", ++ coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1], ++ coex_dm->wifi_chnl_info[2]); ++ CL_PRINTF(cli_buf); ++ ++ /* wifi status */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Wifi Status]============"); ++ CL_PRINTF(cli_buf); ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[BT Status]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", ++ "BT [status/ rssi/ retryCnt]", ++ ((coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") : (( ++ BT_8821A_CSR_2ANT_BT_STATUS_IDLE == coex_dm->bt_status) ++ ? "idle" : ((BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE ++ == coex_dm->bt_status) ? "connected-idle" : "busy"))), ++ coex_sta->bt_rssi, coex_sta->bt_retry_cnt); ++ CL_PRINTF(cli_buf); ++ ++ if (stack_info->profile_notified) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", ++ stack_info->sco_exist, stack_info->hid_exist, ++ stack_info->pan_exist, stack_info->a2dp_exist); ++ CL_PRINTF(cli_buf); ++ ++ btcoexist->btc_disp_dbg_msg(btcoexist, ++ BTC_DBG_DISP_BT_LINK_INFO); ++ } ++ ++ bt_info_ext = coex_sta->bt_info_ext; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", ++ "BT Info A2DP rate", ++ (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate"); ++ CL_PRINTF(cli_buf); ++ ++ for (i = 0; i < BT_INFO_SRC_8821A_CSR_2ANT_MAX; i++) { ++ if (coex_sta->bt_info_c2h_cnt[i]) { ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", ++ glbt_info_src_8821a_csr_2ant[i], ++ coex_sta->bt_info_c2h[i][0], ++ coex_sta->bt_info_c2h[i][1], ++ coex_sta->bt_info_c2h[i][2], ++ coex_sta->bt_info_c2h[i][3], ++ coex_sta->bt_info_c2h[i][4], ++ coex_sta->bt_info_c2h[i][5], ++ coex_sta->bt_info_c2h[i][6], ++ coex_sta->bt_info_c2h_cnt[i]); ++ CL_PRINTF(cli_buf); ++ } ++ } ++ ++ /* Sw mechanism */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Sw mechanism]============"); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", ++ "SM1[ShRf/ LpRA/ LimDig]", ++ coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra, ++ coex_dm->limited_dig); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", ++ "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", ++ coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off, ++ coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl); ++ CL_PRINTF(cli_buf); ++ ++ /* Fw mechanism */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Fw mechanism]============"); ++ CL_PRINTF(cli_buf); ++ ++ if (!btcoexist->manual_control) { ++ ps_tdma_case = coex_dm->cur_ps_tdma; ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, ++ "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", ++ "PS TDMA", ++ coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1], ++ coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3], ++ coex_dm->ps_tdma_para[4], ps_tdma_case); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", ++ "DecBtPwr/ IgnWlanAct", ++ coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act); ++ CL_PRINTF(cli_buf); ++ } ++ ++ /* Hw setting */ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", ++ "============[Hw setting]============"); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", ++ "RF-A, 0x1e initVal", ++ coex_dm->bt_rf_0x1e_backup); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x ", ++ "0x778 (W_Act)/ 0x6cc (CoTab Sel)", ++ u8tmp[0], u8tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x8db); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xc5b); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x8db(ADC)/0xc5b[29:25](DAC)", ++ ((u8tmp[0] & 0x60) >> 5), ((u8tmp[1] & 0x3e) >> 1)); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xcb4); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0xcb4[7:0](ctrl)/ 0xcb4[29:28](val)", ++ u32tmp[0] & 0xff, ((u32tmp[0] & 0x30000000) >> 28)); ++ CL_PRINTF(cli_buf); ++ ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40); ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x974); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x40/ 0x4c[24:23]/ 0x974", ++ u8tmp[0], ((u32tmp[0] & 0x01800000) >> 23), u32tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0x550(bcn ctrl)/0x522", ++ u32tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa0a); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "0xc50(DIG)/0xa0a(CCK-TH)", ++ u32tmp[0], u8tmp[0]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xf48); ++ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b); ++ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", ++ "OFDM-FA/ CCK-FA", ++ u32tmp[0], (u8tmp[0] << 8) + u8tmp[1]); ++ CL_PRINTF(cli_buf); ++ ++ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); ++ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); ++ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", ++ "0x6c0/0x6c4/0x6c8", ++ u32tmp[0], u32tmp[1], u32tmp[2]); ++ CL_PRINTF(cli_buf); ++ ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x770 (hi-pri Rx/Tx)", ++ coex_sta->high_priority_rx, coex_sta->high_priority_tx); ++ CL_PRINTF(cli_buf); ++ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", ++ "0x774(low-pri Rx/Tx)", ++ coex_sta->low_priority_rx, coex_sta->low_priority_tx); ++ CL_PRINTF(cli_buf); ++ ++ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); ++} ++ ++ ++void ex_halbtc8821aCsr2ant_ips_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (BTC_IPS_ENTER == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS ENTER notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = true; ++ halbtc8821aCsr2ant_coex_all_off(btcoexist); ++ } else if (BTC_IPS_LEAVE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], IPS LEAVE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_ips = false; ++ /* halbtc8821aCsr2ant_init_coex_dm(btcoexist); */ ++ } ++} ++ ++void ex_halbtc8821aCsr2ant_lps_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (BTC_LPS_ENABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS ENABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = true; ++ } else if (BTC_LPS_DISABLE == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], LPS DISABLE notify\n"); ++ BTC_TRACE(trace_buf); ++ coex_sta->under_lps = false; ++ } ++} ++ ++void ex_halbtc8821aCsr2ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (BTC_SCAN_START == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN START notify\n"); ++ BTC_TRACE(trace_buf); ++ } else if (BTC_SCAN_FINISH == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], SCAN FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8821aCsr2ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ if (BTC_ASSOCIATE_START == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT START notify\n"); ++ BTC_TRACE(trace_buf); ++ } else if (BTC_ASSOCIATE_FINISH == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], CONNECT FINISH notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8821aCsr2ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type) ++{ ++ u8 h2c_parameter[3] = {0}; ++ u32 wifi_bw; ++ u8 wifi_central_chnl; ++ ++ if (BTC_MEDIA_CONNECT == type) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA connect notify\n"); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], MEDIA disconnect notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++ ++ /* only 2.4G we need to inform bt the chnl mask */ ++ btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ &wifi_central_chnl); ++ if ((BTC_MEDIA_CONNECT == type) && ++ (wifi_central_chnl <= 14)) { ++ h2c_parameter[0] = 0x1; ++ h2c_parameter[1] = wifi_central_chnl; ++ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); ++ if (BTC_WIFI_BW_HT40 == wifi_bw) ++ h2c_parameter[2] = 0x30; ++ else ++ h2c_parameter[2] = 0x20; ++ } ++ ++} ++ ++void ex_halbtc8821aCsr2ant_specific_packet_notify(IN struct btc_coexist ++ *btcoexist, IN u8 type) ++{ ++ if (type == BTC_PACKET_DHCP) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], DHCP Packet notify\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8821aCsr2ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length) ++{ ++ u8 bt_info = 0; ++ u8 i, rsp_source = 0; ++ boolean bt_busy = false, limited_dig = false; ++ boolean wifi_connected = false, bt_hs_on = false, ++ wifi_under_5g = false; ++ ++ coex_sta->c2h_bt_info_req_sent = false; ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); ++ ++ rsp_source = tmp_buf[0] & 0xf; ++ if (rsp_source >= BT_INFO_SRC_8821A_CSR_2ANT_MAX) ++ rsp_source = BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW; ++ coex_sta->bt_info_c2h_cnt[rsp_source]++; ++ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source, ++ length); ++ BTC_TRACE(trace_buf); ++ for (i = 0; i < length; i++) { ++ coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; ++ if (i == 1) ++ bt_info = tmp_buf[i]; ++ if (i == length - 1) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } else { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ", ++ tmp_buf[i]); ++ BTC_TRACE(trace_buf); ++ } ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, ++ &wifi_connected); ++ if (BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW != rsp_source) { ++ coex_sta->bt_retry_cnt = /* [3:0] */ ++ coex_sta->bt_info_c2h[rsp_source][2] & 0xf; ++ ++ coex_sta->bt_rssi = ++ coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10; ++ ++ coex_sta->bt_info_ext = ++ coex_sta->bt_info_c2h[rsp_source][4]; ++ ++#if 0 /* REMOVE */ ++ /* Here we need to resend some wifi info to BT */ ++ /* because bt is reset and loss of the info. */ ++ if ((coex_sta->bt_info_ext & BIT(1))) { ++ ++ if (wifi_connected) ++ ex_halbtc8821aCsr2ant_media_status_notify( ++ btcoexist, BTC_MEDIA_CONNECT); ++ else ++ ex_halbtc8821aCsr2ant_media_status_notify( ++ btcoexist, BTC_MEDIA_DISCONNECT); ++ } ++#endif ++ ++ } ++ ++ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); ++ ++ if (bt_info == ++ BT_INFO_8821A_CSR_2ANT_B_CONNECTION) { /* connection exists but no busy */ ++ coex_sta->bt_link_exist = true; ++ coex_dm->bt_status = ++ BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE; ++ } else if (bt_info & ++ BT_INFO_8821A_CSR_2ANT_B_CONNECTION) { /* connection exists and some link is busy */ ++ coex_sta->bt_link_exist = true; ++ ++ if (bt_info & BT_INFO_8821A_CSR_2ANT_B_FTP) ++ coex_sta->pan_exist = true; ++ else ++ coex_sta->pan_exist = false; ++ ++ if (bt_info & BT_INFO_8821A_CSR_2ANT_B_A2DP) ++ coex_sta->a2dp_exist = true; ++ else ++ coex_sta->a2dp_exist = false; ++ ++ if (bt_info & BT_INFO_8821A_CSR_2ANT_B_HID) ++ coex_sta->hid_exist = true; ++ else ++ coex_sta->hid_exist = false; ++ ++ if (bt_info & BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO) ++ coex_sta->sco_exist = true; ++ else ++ coex_sta->sco_exist = false; ++ ++ if (coex_sta->bt_info_ext & 0x80) ++ coex_sta->slave = true; /* Slave */ ++ else ++ coex_sta->slave = false; /* Master */ ++ ++ coex_dm->bt_status = ++ BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; ++ } else { ++ coex_sta->bt_link_exist = false; ++ coex_sta->pan_exist = false; ++ coex_sta->a2dp_exist = false; ++ coex_sta->slave = false; ++ coex_sta->hid_exist = false; ++ coex_sta->sco_exist = false; ++ coex_dm->bt_status = BT_8821A_CSR_2ANT_BT_STATUS_IDLE; ++ } ++ ++ if (bt_hs_on) ++ coex_dm->bt_status = ++ BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; ++ ++ if (bt_info & BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE) { ++ coex_sta->c2h_bt_inquiry_page = true; ++ coex_dm->bt_status = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; ++ } else ++ coex_sta->c2h_bt_inquiry_page = false; ++ ++ ++ if (BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == coex_dm->bt_status) ++ bt_busy = true; ++ else ++ bt_busy = false; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); ++ ++ if (BT_8821A_CSR_2ANT_BT_STATUS_IDLE != coex_dm->bt_status) ++ limited_dig = true; ++ else ++ limited_dig = false; ++ coex_dm->limited_dig = limited_dig; ++ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig); ++ ++ halbtc8821aCsr2ant_run_coexist_mechanism(btcoexist); ++} ++ ++void ex_halbtc8821aCsr2ant_halt_notify(IN struct btc_coexist *btcoexist) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ halbtc8821aCsr2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ex_halbtc8821aCsr2ant_media_status_notify(btcoexist, ++ BTC_MEDIA_DISCONNECT); ++} ++ ++void ex_halbtc8821aCsr2ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state) ++{ ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n"); ++ BTC_TRACE(trace_buf); ++ ++ if (BTC_WIFI_PNP_SLEEP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to SLEEP\n"); ++ BTC_TRACE(trace_buf); ++ halbtc8821aCsr2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); ++ ++ /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */ ++ /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */ ++ /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */ ++ coex_sta->under_ips = false; ++ coex_sta->under_lps = false; ++ } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) { ++ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, ++ "[BTCoex], Pnp notify to WAKE UP\n"); ++ BTC_TRACE(trace_buf); ++ } ++} ++ ++void ex_halbtc8821aCsr2ant_periodical(IN struct btc_coexist *btcoexist) ++{ ++ halbtc8821aCsr2ant_monitor_bt_ctr(btcoexist); ++ halbtc8821aCsr2ant_monitor_bt_enable_disable(btcoexist); ++} ++ ++#endif ++ ++#endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */ +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821aCsr2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821aCsr2Ant.h +new file mode 100644 +index 0000000..8d228fb +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8821aCsr2Ant.h +@@ -0,0 +1,188 @@ ++ ++#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) ++ ++#if (RTL8821A_SUPPORT == 1) ++ ++/* ******************************************* ++ * The following is for 8821A_CSR 2Ant BT Co-exist definition ++ * ******************************************* */ ++#define BT_INFO_8821A_CSR_2ANT_B_FTP BIT(7) ++#define BT_INFO_8821A_CSR_2ANT_B_A2DP BIT(6) ++#define BT_INFO_8821A_CSR_2ANT_B_HID BIT(5) ++#define BT_INFO_8821A_CSR_2ANT_B_SCO_BUSY BIT(4) ++#define BT_INFO_8821A_CSR_2ANT_B_ACL_BUSY BIT(3) ++#define BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE BIT(2) ++#define BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO BIT(1) ++#define BT_INFO_8821A_CSR_2ANT_B_CONNECTION BIT(0) ++ ++#define BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT 2 ++ ++enum bt_info_src_8821a_csr_2ant { ++ BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW = 0x0, ++ BT_INFO_SRC_8821A_CSR_2ANT_BT_RSP = 0x1, ++ BT_INFO_SRC_8821A_CSR_2ANT_BT_ACTIVE_SEND = 0x2, ++ BT_INFO_SRC_8821A_CSR_2ANT_MAX ++}; ++ ++enum bt_8821a_csr_2ant_bt_status { ++ BT_8821A_CSR_2ANT_BT_STATUS_IDLE = 0x0, ++ BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, ++ BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE = 0x2, ++ BT_8821A_CSR_2ANT_BT_STATUS_MAX ++}; ++ ++enum bt_8821a_csr_2ant_coex_algo { ++ BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED = 0x0, ++ BT_8821A_CSR_2ANT_COEX_ALGO_SCO = 0x1, ++ BT_8821A_CSR_2ANT_COEX_ALGO_HID = 0x2, ++ BT_8821A_CSR_2ANT_COEX_ALGO_A2DP = 0x3, ++ BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR = 0x5, ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANHS = 0x6, ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, ++ BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID = 0x8, ++ BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, ++ BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP = 0xa, ++ BT_8821A_CSR_2ANT_COEX_ALGO_MAX = 0xb, ++}; ++ ++struct coex_dm_8821a_csr_2ant { ++ /* fw mechanism */ ++ boolean pre_dec_bt_pwr; ++ boolean cur_dec_bt_pwr; ++ u8 pre_fw_dac_swing_lvl; ++ u8 cur_fw_dac_swing_lvl; ++ boolean cur_ignore_wlan_act; ++ boolean pre_ignore_wlan_act; ++ u8 pre_ps_tdma; ++ u8 cur_ps_tdma; ++ u8 ps_tdma_para[6]; ++ u8 ps_tdma_du_adj_type; ++ boolean reset_tdma_adjust; ++ boolean pre_ps_tdma_on; ++ boolean cur_ps_tdma_on; ++ boolean pre_bt_auto_report; ++ boolean cur_bt_auto_report; ++ ++ /* sw mechanism */ ++ boolean pre_rf_rx_lpf_shrink; ++ boolean cur_rf_rx_lpf_shrink; ++ u32 bt_rf_0x1e_backup; ++ boolean pre_low_penalty_ra; ++ boolean cur_low_penalty_ra; ++ boolean pre_dac_swing_on; ++ u32 pre_dac_swing_lvl; ++ boolean cur_dac_swing_on; ++ u32 cur_dac_swing_lvl; ++ boolean pre_adc_back_off; ++ boolean cur_adc_back_off; ++ boolean pre_agc_table_en; ++ boolean cur_agc_table_en; ++ u32 pre_val0x6c0; ++ u32 cur_val0x6c0; ++ u32 pre_val0x6c4; ++ u32 cur_val0x6c4; ++ u32 pre_val0x6c8; ++ u32 cur_val0x6c8; ++ u8 pre_val0x6cc; ++ u8 cur_val0x6cc; ++ boolean limited_dig; ++ ++ u32 pre_ra_mask; ++ u32 cur_ra_mask; ++ ++ u8 cur_ampdu_num_type; ++ u8 pre_ampdu_num_type; ++ u16 backup_ampdu_max_num; ++ ++ u8 cur_ampdu_time_type; ++ u8 pre_ampdu_time_type; ++ u8 backup_ampdu_max_time; ++ ++ u8 cur_arfr_type; ++ u8 pre_arfr_type; ++ u32 backup_arfr_cnt1; ++ u32 backup_arfr_cnt2; ++ ++ u8 cur_retry_limit_type; ++ u8 pre_retry_limit_type; ++ u16 backup_retry_limit; ++ ++ /* algorithm related */ ++ u8 pre_algorithm; ++ u8 cur_algorithm; ++ u8 bt_status; ++ u8 wifi_chnl_info[3]; ++}; ++ ++struct coex_sta_8821a_csr_2ant { ++ boolean bt_disabled; ++ boolean bt_link_exist; ++ boolean sco_exist; ++ boolean a2dp_exist; ++ boolean slave; ++ boolean hid_exist; ++ boolean pan_exist; ++ ++ boolean under_lps; ++ boolean under_ips; ++ u32 high_priority_tx; ++ u32 high_priority_rx; ++ u32 low_priority_tx; ++ u32 low_priority_rx; ++ u8 bt_rssi; ++ u8 pre_bt_rssi_state; ++ u8 pre_wifi_rssi_state[4]; ++ boolean c2h_bt_info_req_sent; ++ u8 bt_info_c2h[BT_INFO_SRC_8821A_CSR_2ANT_MAX][10]; ++ u32 bt_info_c2h_cnt[BT_INFO_SRC_8821A_CSR_2ANT_MAX]; ++ boolean c2h_bt_inquiry_page; ++ u8 bt_retry_cnt; ++ u8 bt_info_ext; ++}; ++ ++/* ******************************************* ++ * The following is interface which will notify coex module. ++ * ******************************************* */ ++void ex_halbtc8821aCsr2ant_power_on_setting(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821aCsr2ant_init_hw_config(IN struct btc_coexist *btcoexist, ++ IN boolean wifi_only); ++void ex_halbtc8821aCsr2ant_init_coex_dm(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821aCsr2ant_ips_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821aCsr2ant_lps_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821aCsr2ant_scan_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821aCsr2ant_connect_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821aCsr2ant_media_status_notify(IN struct btc_coexist *btcoexist, ++ IN u8 type); ++void ex_halbtc8821aCsr2ant_specific_packet_notify(IN struct btc_coexist ++ *btcoexist, IN u8 type); ++void ex_halbtc8821aCsr2ant_bt_info_notify(IN struct btc_coexist *btcoexist, ++ IN u8 *tmp_buf, IN u8 length); ++void ex_halbtc8821aCsr2ant_halt_notify(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821aCsr2ant_pnp_notify(IN struct btc_coexist *btcoexist, ++ IN u8 pnp_state); ++void ex_halbtc8821aCsr2ant_periodical(IN struct btc_coexist *btcoexist); ++void ex_halbtc8821aCsr2ant_display_coex_info(IN struct btc_coexist *btcoexist); ++ ++#else ++#define ex_halbtc8821aCsr2ant_power_on_setting(btcoexist) ++#define ex_halbtc8821aCsr2ant_init_hw_config(btcoexist, wifi_only) ++#define ex_halbtc8821aCsr2ant_init_coex_dm(btcoexist) ++#define ex_halbtc8821aCsr2ant_ips_notify(btcoexist, type) ++#define ex_halbtc8821aCsr2ant_lps_notify(btcoexist, type) ++#define ex_halbtc8821aCsr2ant_scan_notify(btcoexist, type) ++#define ex_halbtc8821aCsr2ant_connect_notify(btcoexist, type) ++#define ex_halbtc8821aCsr2ant_media_status_notify(btcoexist, type) ++#define ex_halbtc8821aCsr2ant_specific_packet_notify(btcoexist, type) ++#define ex_halbtc8821aCsr2ant_bt_info_notify(btcoexist, tmp_buf, length) ++#define ex_halbtc8821aCsr2ant_halt_notify(btcoexist) ++#define ex_halbtc8821aCsr2ant_pnp_notify(btcoexist, pnp_state) ++#define ex_halbtc8821aCsr2ant_periodical(btcoexist) ++#define ex_halbtc8821aCsr2ant_display_coex_info(btcoexist) ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtcOutSrc.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtcOutSrc.h +new file mode 100644 +index 0000000..3ceabfa +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtcOutSrc.h +@@ -0,0 +1,901 @@ ++#ifndef __HALBTC_OUT_SRC_H__ ++#define __HALBTC_OUT_SRC_H__ ++ ++ ++#define BTC_COEX_OFFLOAD 0 ++#define BTC_TMP_BUF_SHORT 20 ++ ++extern u1Byte gl_btc_trace_buf[]; ++#define BTC_SPRINTF rsprintf ++#define BTC_TRACE(_MSG_) RT_TRACE(COMP_COEX, DBG_LOUD, (_MSG_)) ++#define BT_PrintData(adapter, _MSG_, len, data) RT_PRINT_DATA(COMP_COEX, DBG_LOUD, (_MSG_), data, len) ++ ++ ++#define NORMAL_EXEC FALSE ++#define FORCE_EXEC TRUE ++ ++#define BTC_RF_OFF 0x0 ++#define BTC_RF_ON 0x1 ++ ++#define BTC_RF_A 0x0 ++#define BTC_RF_B 0x1 ++#define BTC_RF_C 0x2 ++#define BTC_RF_D 0x3 ++ ++#define BTC_SMSP SINGLEMAC_SINGLEPHY ++#define BTC_DMDP DUALMAC_DUALPHY ++#define BTC_DMSP DUALMAC_SINGLEPHY ++#define BTC_MP_UNKNOWN 0xff ++ ++#define BT_COEX_ANT_TYPE_PG 0 ++#define BT_COEX_ANT_TYPE_ANTDIV 1 ++#define BT_COEX_ANT_TYPE_DETECTED 2 ++ ++#define BTC_MIMO_PS_STATIC 0 // 1ss ++#define BTC_MIMO_PS_DYNAMIC 1 // 2ss ++ ++#define BTC_RATE_DISABLE 0 ++#define BTC_RATE_ENABLE 1 ++ ++// single Antenna definition ++#define BTC_ANT_PATH_WIFI 0 ++#define BTC_ANT_PATH_BT 1 ++#define BTC_ANT_PATH_PTA 2 ++// dual Antenna definition ++#define BTC_ANT_WIFI_AT_MAIN 0 ++#define BTC_ANT_WIFI_AT_AUX 1 ++// coupler Antenna definition ++#define BTC_ANT_WIFI_AT_CPL_MAIN 0 ++#define BTC_ANT_WIFI_AT_CPL_AUX 1 ++ ++typedef enum _BTC_POWERSAVE_TYPE{ ++ BTC_PS_WIFI_NATIVE = 0, // wifi original power save behavior ++ BTC_PS_LPS_ON = 1, ++ BTC_PS_LPS_OFF = 2, ++ BTC_PS_MAX ++} BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE; ++ ++typedef enum _BTC_BT_REG_TYPE{ ++ BTC_BT_REG_RF = 0, ++ BTC_BT_REG_MODEM = 1, ++ BTC_BT_REG_BLUEWIZE = 2, ++ BTC_BT_REG_VENDOR = 3, ++ BTC_BT_REG_LE = 4, ++ BTC_BT_REG_MAX ++} BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE; ++ ++typedef enum _BTC_CHIP_INTERFACE{ ++ BTC_INTF_UNKNOWN = 0, ++ BTC_INTF_PCI = 1, ++ BTC_INTF_USB = 2, ++ BTC_INTF_SDIO = 3, ++ BTC_INTF_MAX ++} BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE; ++ ++typedef enum _BTC_CHIP_TYPE{ ++ BTC_CHIP_UNDEF = 0, ++ BTC_CHIP_CSR_BC4 = 1, ++ BTC_CHIP_CSR_BC8 = 2, ++ BTC_CHIP_RTL8723A = 3, ++ BTC_CHIP_RTL8821 = 4, ++ BTC_CHIP_RTL8723B = 5, ++ BTC_CHIP_MAX ++} BTC_CHIP_TYPE, *PBTC_CHIP_TYPE; ++ ++// following is for wifi link status ++#define WIFI_STA_CONNECTED BIT0 ++#define WIFI_AP_CONNECTED BIT1 ++#define WIFI_HS_CONNECTED BIT2 ++#define WIFI_P2P_GO_CONNECTED BIT3 ++#define WIFI_P2P_GC_CONNECTED BIT4 ++ ++// following is for command line utility ++#define CL_SPRINTF rsprintf ++#define CL_PRINTF DCMD_Printf ++ ++struct btc_board_info{ ++ /* The following is some board information */ ++ u8 bt_chip_type; ++ u8 pg_ant_num; /* pg ant number */ ++ u8 btdm_ant_num; /* ant number for btdm */ ++ u8 btdm_ant_num_by_ant_det; /* ant number for btdm after antenna detection */ ++ u8 btdm_ant_pos; /* Bryant Add to indicate Antenna Position for (pg_ant_num = 2) && (btdm_ant_num =1) (DPDT+1Ant case) */ ++ u8 single_ant_path; /* current used for 8723b only, 1=>s0, 0=>s1 */ ++ boolean tfbga_package; /* for Antenna detect threshold */ ++ boolean btdm_ant_det_finish; ++ boolean btdm_ant_det_already_init_phydm; ++}; ++ ++typedef enum _BTC_DBG_OPCODE{ ++ BTC_DBG_SET_COEX_NORMAL = 0x0, ++ BTC_DBG_SET_COEX_WIFI_ONLY = 0x1, ++ BTC_DBG_SET_COEX_BT_ONLY = 0x2, ++ BTC_DBG_SET_COEX_DEC_BT_PWR = 0x3, ++ BTC_DBG_SET_COEX_BT_AFH_MAP = 0x4, ++ BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT = 0x5, ++ BTC_DBG_SET_COEX_MANUAL_CTRL = 0x6, ++ BTC_DBG_MAX ++}BTC_DBG_OPCODE,*PBTC_DBG_OPCODE; ++ ++typedef enum _BTC_RSSI_STATE{ ++ BTC_RSSI_STATE_HIGH = 0x0, ++ BTC_RSSI_STATE_MEDIUM = 0x1, ++ BTC_RSSI_STATE_LOW = 0x2, ++ BTC_RSSI_STATE_STAY_HIGH = 0x3, ++ BTC_RSSI_STATE_STAY_MEDIUM = 0x4, ++ BTC_RSSI_STATE_STAY_LOW = 0x5, ++ BTC_RSSI_MAX ++}BTC_RSSI_STATE,*PBTC_RSSI_STATE; ++#define BTC_RSSI_HIGH(_rssi_) ((_rssi_==BTC_RSSI_STATE_HIGH||_rssi_==BTC_RSSI_STATE_STAY_HIGH)? TRUE:FALSE) ++#define BTC_RSSI_MEDIUM(_rssi_) ((_rssi_==BTC_RSSI_STATE_MEDIUM||_rssi_==BTC_RSSI_STATE_STAY_MEDIUM)? TRUE:FALSE) ++#define BTC_RSSI_LOW(_rssi_) ((_rssi_==BTC_RSSI_STATE_LOW||_rssi_==BTC_RSSI_STATE_STAY_LOW)? TRUE:FALSE) ++ ++typedef enum _BTC_WIFI_ROLE{ ++ BTC_ROLE_STATION = 0x0, ++ BTC_ROLE_AP = 0x1, ++ BTC_ROLE_IBSS = 0x2, ++ BTC_ROLE_HS_MODE = 0x3, ++ BTC_ROLE_MAX ++}BTC_WIFI_ROLE,*PBTC_WIFI_ROLE; ++ ++typedef enum _BTC_WIRELESS_FREQ{ ++ BTC_FREQ_2_4G = 0x0, ++ BTC_FREQ_5G = 0x1, ++ BTC_FREQ_MAX ++}BTC_WIRELESS_FREQ,*PBTC_WIRELESS_FREQ; ++ ++typedef enum _BTC_WIFI_BW_MODE{ ++ BTC_WIFI_BW_LEGACY = 0x0, ++ BTC_WIFI_BW_HT20 = 0x1, ++ BTC_WIFI_BW_HT40 = 0x2, ++ BTC_WIFI_BW_HT80 = 0x3, ++ BTC_WIFI_BW_HT160 = 0x4, ++ BTC_WIFI_BW_MAX ++}BTC_WIFI_BW_MODE,*PBTC_WIFI_BW_MODE; ++ ++typedef enum _BTC_WIFI_TRAFFIC_DIR{ ++ BTC_WIFI_TRAFFIC_TX = 0x0, ++ BTC_WIFI_TRAFFIC_RX = 0x1, ++ BTC_WIFI_TRAFFIC_MAX ++}BTC_WIFI_TRAFFIC_DIR,*PBTC_WIFI_TRAFFIC_DIR; ++ ++typedef enum _BTC_WIFI_PNP{ ++ BTC_WIFI_PNP_WAKE_UP = 0x0, ++ BTC_WIFI_PNP_SLEEP = 0x1, ++ BTC_WIFI_PNP_MAX ++}BTC_WIFI_PNP,*PBTC_WIFI_PNP; ++ ++typedef enum _BTC_IOT_PEER ++{ ++ BTC_IOT_PEER_UNKNOWN = 0, ++ BTC_IOT_PEER_REALTEK = 1, ++ BTC_IOT_PEER_REALTEK_92SE = 2, ++ BTC_IOT_PEER_BROADCOM = 3, ++ BTC_IOT_PEER_RALINK = 4, ++ BTC_IOT_PEER_ATHEROS = 5, ++ BTC_IOT_PEER_CISCO = 6, ++ BTC_IOT_PEER_MERU = 7, ++ BTC_IOT_PEER_MARVELL = 8, ++ BTC_IOT_PEER_REALTEK_SOFTAP = 9,// peer is RealTek SOFT_AP, by Bohn, 2009.12.17 ++ BTC_IOT_PEER_SELF_SOFTAP = 10, // Self is SoftAP ++ BTC_IOT_PEER_AIRGO = 11, ++ BTC_IOT_PEER_INTEL = 12, ++ BTC_IOT_PEER_RTK_APCLIENT = 13, ++ BTC_IOT_PEER_REALTEK_81XX = 14, ++ BTC_IOT_PEER_REALTEK_WOW = 15, ++ BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16, ++ BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17, ++ BTC_IOT_PEER_MAX, ++}BTC_IOT_PEER, *PBTC_IOT_PEER; ++ ++//for 8723b-d cut large current issue ++typedef enum _BTC_WIFI_COEX_STATE{ ++ BTC_WIFI_STAT_INIT, ++ BTC_WIFI_STAT_IQK, ++ BTC_WIFI_STAT_NORMAL_OFF, ++ BTC_WIFI_STAT_MP_OFF, ++ BTC_WIFI_STAT_NORMAL, ++ BTC_WIFI_STAT_ANT_DIV, ++ BTC_WIFI_STAT_MAX ++}BTC_WIFI_COEX_STATE,*PBTC_WIFI_COEX_STATE; ++ ++typedef enum _BTC_ANT_TYPE{ ++ BTC_ANT_TYPE_0, ++ BTC_ANT_TYPE_1, ++ BTC_ANT_TYPE_2, ++ BTC_ANT_TYPE_3, ++ BTC_ANT_TYPE_4, ++ BTC_ANT_TYPE_MAX ++}BTC_ANT_TYPE,*PBTC_ANT_TYPE; ++ ++typedef enum _BTC_VENDOR{ ++ BTC_VENDOR_LENOVO, ++ BTC_VENDOR_ASUS, ++ BTC_VENDOR_OTHER ++}BTC_VENDOR,*PBTC_VENDOR; ++ ++ ++// defined for BFP_BTC_GET ++typedef enum _BTC_GET_TYPE{ ++ // type BOOLEAN ++ BTC_GET_BL_HS_OPERATION, ++ BTC_GET_BL_HS_CONNECTING, ++ BTC_GET_BL_WIFI_CONNECTED, ++ BTC_GET_BL_WIFI_BUSY, ++ BTC_GET_BL_WIFI_SCAN, ++ BTC_GET_BL_WIFI_LINK, ++ BTC_GET_BL_WIFI_ROAM, ++ BTC_GET_BL_WIFI_4_WAY_PROGRESS, ++ BTC_GET_BL_WIFI_UNDER_5G, ++ BTC_GET_BL_WIFI_AP_MODE_ENABLE, ++ BTC_GET_BL_WIFI_ENABLE_ENCRYPTION, ++ BTC_GET_BL_WIFI_UNDER_B_MODE, ++ BTC_GET_BL_EXT_SWITCH, ++ BTC_GET_BL_WIFI_IS_IN_MP_MODE, ++ BTC_GET_BL_IS_ASUS_8723B, ++ BTC_GET_BL_FW_READY, ++ ++ // type s4Byte ++ BTC_GET_S4_WIFI_RSSI, ++ BTC_GET_S4_HS_RSSI, ++ ++ // type u4Byte ++ BTC_GET_U4_WIFI_BW, ++ BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, ++ BTC_GET_U4_WIFI_FW_VER, ++ BTC_GET_U4_WIFI_LINK_STATUS, ++ BTC_GET_U4_BT_PATCH_VER, ++ BTC_GET_U4_VENDOR, ++ ++ // type u1Byte ++ BTC_GET_U1_WIFI_DOT11_CHNL, ++ BTC_GET_U1_WIFI_CENTRAL_CHNL, ++ BTC_GET_U1_WIFI_HS_CHNL, ++ BTC_GET_U1_MAC_PHY_MODE, ++ BTC_GET_U1_AP_NUM, ++ BTC_GET_U1_ANT_TYPE, ++ BTC_GET_U1_IOT_PEER, ++ ++ //===== for 1Ant ====== ++ BTC_GET_U1_LPS_MODE, ++ ++ BTC_GET_MAX ++}BTC_GET_TYPE,*PBTC_GET_TYPE; ++ ++// defined for BFP_BTC_SET ++typedef enum _BTC_SET_TYPE{ ++ // type BOOLEAN ++ BTC_SET_BL_BT_DISABLE, ++ BTC_SET_BL_BT_TRAFFIC_BUSY, ++ BTC_SET_BL_BT_LIMITED_DIG, ++ BTC_SET_BL_FORCE_TO_ROAM, ++ BTC_SET_BL_TO_REJ_AP_AGG_PKT, ++ BTC_SET_BL_BT_CTRL_AGG_SIZE, ++ BTC_SET_BL_INC_SCAN_DEV_NUM, ++ BTC_SET_BL_BT_TX_RX_MASK, ++ BTC_SET_BL_MIRACAST_PLUS_BT, ++ ++ // type u1Byte ++ BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, ++ BTC_SET_U1_AGG_BUF_SIZE, ++ ++ // type trigger some action ++ BTC_SET_ACT_GET_BT_RSSI, ++ BTC_SET_ACT_AGGREGATE_CTRL, ++ BTC_SET_ACT_ANTPOSREGRISTRY_CTRL, ++ //===== for 1Ant ====== ++ // type BOOLEAN ++ ++ // type u1Byte ++ BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, ++ BTC_SET_U1_LPS_VAL, ++ BTC_SET_U1_RPWM_VAL, ++ // type trigger some action ++ BTC_SET_ACT_LEAVE_LPS, ++ BTC_SET_ACT_ENTER_LPS, ++ BTC_SET_ACT_NORMAL_LPS, ++ BTC_SET_ACT_DISABLE_LOW_POWER, ++ BTC_SET_ACT_UPDATE_RAMASK, ++ BTC_SET_ACT_SEND_MIMO_PS, ++ // BT Coex related ++ BTC_SET_ACT_CTRL_BT_INFO, ++ BTC_SET_ACT_CTRL_BT_COEX, ++ BTC_SET_ACT_CTRL_8723B_ANT, ++ //================= ++ BTC_SET_MAX ++}BTC_SET_TYPE,*PBTC_SET_TYPE; ++ ++typedef enum _BTC_DBG_DISP_TYPE{ ++ BTC_DBG_DISP_COEX_STATISTICS = 0x0, ++ BTC_DBG_DISP_BT_LINK_INFO = 0x1, ++ BTC_DBG_DISP_WIFI_STATUS = 0x2, ++ BTC_DBG_DISP_MAX ++}BTC_DBG_DISP_TYPE,*PBTC_DBG_DISP_TYPE; ++ ++typedef enum _BTC_NOTIFY_TYPE_IPS{ ++ BTC_IPS_LEAVE = 0x0, ++ BTC_IPS_ENTER = 0x1, ++ BTC_IPS_MAX ++}BTC_NOTIFY_TYPE_IPS,*PBTC_NOTIFY_TYPE_IPS; ++typedef enum _BTC_NOTIFY_TYPE_LPS{ ++ BTC_LPS_DISABLE = 0x0, ++ BTC_LPS_ENABLE = 0x1, ++ BTC_LPS_MAX ++}BTC_NOTIFY_TYPE_LPS,*PBTC_NOTIFY_TYPE_LPS; ++typedef enum _BTC_NOTIFY_TYPE_SCAN{ ++ BTC_SCAN_FINISH = 0x0, ++ BTC_SCAN_START = 0x1, ++ BTC_SCAN_MAX ++}BTC_NOTIFY_TYPE_SCAN,*PBTC_NOTIFY_TYPE_SCAN; ++typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE{ ++ BTC_ASSOCIATE_FINISH = 0x0, ++ BTC_ASSOCIATE_START = 0x1, ++ BTC_ASSOCIATE_MAX ++}BTC_NOTIFY_TYPE_ASSOCIATE,*PBTC_NOTIFY_TYPE_ASSOCIATE; ++typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS{ ++ BTC_MEDIA_DISCONNECT = 0x0, ++ BTC_MEDIA_CONNECT = 0x1, ++ BTC_MEDIA_MAX ++}BTC_NOTIFY_TYPE_MEDIA_STATUS,*PBTC_NOTIFY_TYPE_MEDIA_STATUS; ++typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET{ ++ BTC_PACKET_UNKNOWN = 0x0, ++ BTC_PACKET_DHCP = 0x1, ++ BTC_PACKET_ARP = 0x2, ++ BTC_PACKET_EAPOL = 0x3, ++ BTC_PACKET_MAX ++}BTC_NOTIFY_TYPE_SPECIFIC_PACKET,*PBTC_NOTIFY_TYPE_SPECIFIC_PACKET; ++typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION{ ++ BTC_STACK_OP_NONE = 0x0, ++ BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1, ++ BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2, ++ BTC_STACK_OP_MAX ++}BTC_NOTIFY_TYPE_STACK_OPERATION,*PBTC_NOTIFY_TYPE_STACK_OPERATION; ++ ++//Bryant Add ++typedef enum _BTC_ANTENNA_POS{ ++ BTC_ANTENNA_AT_MAIN_PORT = 0x1, ++ BTC_ANTENNA_AT_AUX_PORT = 0x2, ++}BTC_ANTENNA_POS,*PBTC_ANTENNA_POS; ++ ++//Bryant Add ++typedef enum _BTC_BT_OFFON{ ++ BTC_BT_OFF = 0x0, ++ BTC_BT_ON = 0x1, ++}BTC_BTOFFON,*PBTC_BT_OFFON; ++ ++//================================================== ++// For following block is for coex offload ++//================================================== ++typedef struct _COL_H2C{ ++ u1Byte opcode; ++ u1Byte opcode_ver:4; ++ u1Byte req_num:4; ++ u1Byte buf[1]; ++}COL_H2C, *PCOL_H2C; ++ ++#define COL_C2H_ACK_HDR_LEN 3 ++typedef struct _COL_C2H_ACK{ ++ u1Byte status; ++ u1Byte opcode_ver:4; ++ u1Byte req_num:4; ++ u1Byte ret_len; ++ u1Byte buf[1]; ++}COL_C2H_ACK, *PCOL_C2H_ACK; ++ ++#define COL_C2H_IND_HDR_LEN 3 ++typedef struct _COL_C2H_IND{ ++ u1Byte type; ++ u1Byte version; ++ u1Byte length; ++ u1Byte data[1]; ++}COL_C2H_IND, *PCOL_C2H_IND; ++ ++//============================================ ++// NOTE: for debug message, the following define should match ++// the strings in coexH2cResultString. ++//============================================ ++typedef enum _COL_H2C_STATUS{ ++ // c2h status ++ COL_STATUS_C2H_OK = 0x00, // Wifi received H2C request and check content ok. ++ COL_STATUS_C2H_UNKNOWN = 0x01, // Not handled routine ++ COL_STATUS_C2H_UNKNOWN_OPCODE = 0x02, // Invalid OP code, It means that wifi firmware received an undefiend OP code. ++ COL_STATUS_C2H_OPCODE_VER_MISMATCH = 0x03, // Wifi firmware and wifi driver mismatch, need to update wifi driver or wifi or. ++ COL_STATUS_C2H_PARAMETER_ERROR = 0x04, // Error paraneter.(ex: parameters = NULL but it should have values) ++ COL_STATUS_C2H_PARAMETER_OUT_OF_RANGE = 0x05, // Wifi firmware needs to check the parameters from H2C request and return the status.(ex: ch = 500, it's wrong) ++ // other COL status start from here ++ COL_STATUS_C2H_REQ_NUM_MISMATCH , // c2h req_num mismatch, means this c2h is not we expected. ++ COL_STATUS_H2C_HALMAC_FAIL , // HALMAC return fail. ++ COL_STATUS_H2C_TIMTOUT , // not received the c2h response from fw ++ COL_STATUS_INVALID_C2H_LEN , // invalid coex offload c2h ack length, must >= 3 ++ COL_STATUS_COEX_DATA_OVERFLOW , // coex returned length over the c2h ack length. ++ COL_STATUS_MAX ++}COL_H2C_STATUS,*PCOL_H2C_STATUS; ++ ++#define COL_MAX_H2C_REQ_NUM 16 ++ ++#define COL_H2C_BUF_LEN 20 ++typedef enum _COL_OPCODE{ ++ COL_OP_WIFI_STATUS_NOTIFY = 0x0, ++ COL_OP_WIFI_PROGRESS_NOTIFY = 0x1, ++ COL_OP_WIFI_INFO_NOTIFY = 0x2, ++ COL_OP_WIFI_POWER_STATE_NOTIFY = 0x3, ++ COL_OP_SET_CONTROL = 0x4, ++ COL_OP_GET_CONTROL = 0x5, ++ COL_OP_WIFI_OPCODE_MAX ++}COL_OPCODE,*PCOL_OPCODE; ++ ++typedef enum _COL_IND_TYPE{ ++ COL_IND_BT_INFO = 0x0, ++ COL_IND_PSTDMA = 0x1, ++ COL_IND_LIMITED_TX_RX = 0x2, ++ COL_IND_COEX_TABLE = 0x3, ++ COL_IND_REQ = 0x4, ++ COL_IND_MAX ++}COL_IND_TYPE,*PCOL_IND_TYPE; ++ ++typedef struct _COL_SINGLE_H2C_RECORD{ ++ u1Byte h2c_buf[COL_H2C_BUF_LEN]; // the latest sent h2c buffer ++ u4Byte h2c_len; ++ u1Byte c2h_ack_buf[COL_H2C_BUF_LEN]; // the latest received c2h buffer ++ u4Byte c2h_ack_len; ++ u4Byte count; // the total number of the sent h2c command ++ u4Byte status[COL_STATUS_MAX]; // the c2h status for the sent h2c command ++} COL_SINGLE_H2C_RECORD, *PCOL_SINGLE_H2C_RECORD; ++ ++typedef struct _COL_SINGLE_C2H_IND_RECORD{ ++ u1Byte ind_buf[COL_H2C_BUF_LEN]; // the latest received c2h indication buffer ++ u4Byte ind_len; ++ u4Byte count; // the total number of the rcvd c2h indication ++ u4Byte status[COL_STATUS_MAX]; // the c2h indication verified status ++} COL_SINGLE_C2H_IND_RECORD, *PCOL_SINGLE_C2H_IND_RECORD; ++ ++typedef struct _BTC_OFFLOAD{ ++ // H2C command related ++ u1Byte h2c_req_num; ++ u4Byte cnt_h2c_sent; ++ COL_SINGLE_H2C_RECORD h2c_record[COL_OP_WIFI_OPCODE_MAX]; ++ ++ // C2H Ack related ++ u4Byte cnt_c2h_ack; ++ u4Byte status[COL_STATUS_MAX]; ++ struct completion c2h_event[COL_MAX_H2C_REQ_NUM]; // for req_num = 1~COL_MAX_H2C_REQ_NUM ++ u1Byte c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN]; ++ u1Byte c2h_ack_len[COL_MAX_H2C_REQ_NUM]; ++ ++ // C2H Indication related ++ u4Byte cnt_c2h_ind; ++ COL_SINGLE_C2H_IND_RECORD c2h_ind_record[COL_IND_MAX]; ++ u4Byte c2h_ind_status[COL_STATUS_MAX]; ++ u1Byte c2h_ind_buf[COL_H2C_BUF_LEN]; ++ u1Byte c2h_ind_len; ++} BTC_OFFLOAD, *PBTC_OFFLOAD; ++extern BTC_OFFLOAD gl_coex_offload; ++//================================================== ++ ++typedef u1Byte ++(*BFP_BTC_R1)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr ++ ); ++typedef u2Byte ++(*BFP_BTC_R2)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr ++ ); ++typedef u4Byte ++(*BFP_BTC_R4)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr ++ ); ++typedef VOID ++(*BFP_BTC_W1)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u1Byte Data ++ ); ++typedef VOID ++(*BFP_BTC_W1_BIT_MASK)( ++ IN PVOID pBtcContext, ++ IN u4Byte regAddr, ++ IN u1Byte bitMask, ++ IN u1Byte data1b ++ ); ++typedef VOID ++(*BFP_BTC_W2)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u2Byte Data ++ ); ++typedef VOID ++(*BFP_BTC_W4)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u4Byte Data ++ ); ++typedef VOID ++(*BFP_BTC_LOCAL_REG_W1)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u1Byte Data ++ ); ++typedef VOID ++(*BFP_BTC_SET_BB_REG)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ); ++typedef u4Byte ++(*BFP_BTC_GET_BB_REG)( ++ IN PVOID pBtcContext, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ); ++typedef VOID ++(*BFP_BTC_SET_RF_REG)( ++ IN PVOID pBtcContext, ++ IN u1Byte eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ); ++typedef u4Byte ++(*BFP_BTC_GET_RF_REG)( ++ IN PVOID pBtcContext, ++ IN u1Byte eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ); ++typedef VOID ++(*BFP_BTC_FILL_H2C)( ++ IN PVOID pBtcContext, ++ IN u1Byte elementId, ++ IN u4Byte cmdLen, ++ IN pu1Byte pCmdBuffer ++ ); ++ ++typedef BOOLEAN ++(*BFP_BTC_GET)( ++ IN PVOID pBtCoexist, ++ IN u1Byte getType, ++ OUT PVOID pOutBuf ++ ); ++ ++typedef BOOLEAN ++(*BFP_BTC_SET)( ++ IN PVOID pBtCoexist, ++ IN u1Byte setType, ++ OUT PVOID pInBuf ++ ); ++typedef u2Byte ++(*BFP_BTC_SET_BT_REG)( ++ IN PVOID pBtcContext, ++ IN u1Byte regType, ++ IN u4Byte offset, ++ IN u4Byte value ++ ); ++typedef BOOLEAN ++(*BFP_BTC_SET_BT_ANT_DETECTION)( ++ IN PVOID pBtcContext, ++ IN u1Byte txTime, ++ IN u1Byte btChnl ++ ); ++typedef u2Byte ++(*BFP_BTC_GET_BT_REG)( ++ IN PVOID pBtcContext, ++ IN u1Byte regType, ++ IN u4Byte offset, ++ IN pu4Byte data ++ ); ++typedef VOID ++(*BFP_BTC_DISP_DBG_MSG)( ++ IN PVOID pBtCoexist, ++ IN u1Byte dispType ++ ); ++ ++typedef COL_H2C_STATUS ++(*BFP_BTC_COEX_H2C_PROCESS)( ++ IN PVOID pBtCoexist, ++ IN u1Byte opcode, ++ IN u1Byte opcode_ver, ++ IN pu1Byte ph2c_par, ++ IN u1Byte h2c_par_len ++ ); ++ ++typedef struct _BTC_BT_INFO{ ++ BOOLEAN bBtDisabled; ++ u1Byte rssiAdjustForAgcTableOn; ++ u1Byte rssiAdjustFor1AntCoexType; ++ BOOLEAN bPreBtCtrlAggBufSize; ++ BOOLEAN bBtCtrlAggBufSize; ++ BOOLEAN bPreRejectAggPkt; ++ BOOLEAN bRejectAggPkt; ++ BOOLEAN bIncreaseScanDevNum; ++ BOOLEAN bBtTxRxMask; ++ u1Byte preAggBufSize; ++ u1Byte aggBufSize; ++ BOOLEAN bBtBusy; ++ BOOLEAN bLimitedDig; ++ u2Byte btHciVer; ++ u2Byte btRealFwVer; ++ u1Byte btFwVer; ++ u4Byte getBtFwVerCnt; ++ BOOLEAN bMiracastPlusBt; ++ ++ BOOLEAN bBtDisableLowPwr; ++ ++ BOOLEAN bBtCtrlLps; ++ BOOLEAN bBtLpsOn; ++ BOOLEAN bForceToRoam; // for 1Ant solution ++ u1Byte lpsVal; ++ u1Byte rpwmVal; ++ u4Byte raMask; ++} BTC_BT_INFO, *PBTC_BT_INFO; ++ ++struct btc_stack_info { ++ boolean profile_notified; ++ u16 hci_version; /* stack hci version */ ++ u8 num_of_link; ++ boolean bt_link_exist; ++ boolean sco_exist; ++ boolean acl_exist; ++ boolean a2dp_exist; ++ boolean hid_exist; ++ u8 num_of_hid; ++ boolean pan_exist; ++ boolean unknown_acl_exist; ++ s8 min_bt_rssi; ++}; ++ ++struct btc_bt_link_info { ++ boolean bt_link_exist; ++ boolean bt_hi_pri_link_exist; ++ boolean sco_exist; ++ boolean sco_only; ++ boolean a2dp_exist; ++ boolean a2dp_only; ++ boolean hid_exist; ++ boolean hid_only; ++ boolean pan_exist; ++ boolean pan_only; ++ boolean slave_role; ++ boolean acl_busy; ++}; ++ ++typedef struct _BTC_STATISTICS{ ++ u4Byte cntBind; ++ u4Byte cntPowerOn; ++ u4Byte cntPreLoadFirmware; ++ u4Byte cntInitHwConfig; ++ u4Byte cntInitCoexDm; ++ u4Byte cntIpsNotify; ++ u4Byte cntLpsNotify; ++ u4Byte cntScanNotify; ++ u4Byte cntConnectNotify; ++ u4Byte cntMediaStatusNotify; ++ u4Byte cntSpecificPacketNotify; ++ u4Byte cntBtInfoNotify; ++ u4Byte cntRfStatusNotify; ++ u4Byte cntPeriodical; ++ u4Byte cntCoexDmSwitch; ++ u4Byte cntStackOperationNotify; ++ u4Byte cntDbgCtrl; ++} BTC_STATISTICS, *PBTC_STATISTICS; ++ ++struct btc_coexist{ ++ BOOLEAN bBinded; // make sure only one adapter can bind the data context ++ PVOID Adapter; // default adapter ++ struct btc_board_info board_info; ++ BTC_BT_INFO btInfo; // some bt info referenced by non-bt module ++ struct btc_stack_info stack_info; ++ struct btc_bt_link_info bt_link_info; ++ BTC_CHIP_INTERFACE chip_interface; ++ ++ BOOLEAN initilized; ++ BOOLEAN stop_coex_dm; ++ BOOLEAN manual_control; ++ pu1Byte cli_buf; ++ BTC_STATISTICS statistics; ++ u1Byte pwrModeVal[10]; ++ ++ // function pointers ++ // io related ++ BFP_BTC_R1 btc_read_1byte; ++ BFP_BTC_W1 btc_write_1byte; ++ BFP_BTC_W1_BIT_MASK btc_write_1byte_bitmask; ++ BFP_BTC_R2 btc_read_2byte; ++ BFP_BTC_W2 btc_write_2byte; ++ BFP_BTC_R4 btc_read_4byte; ++ BFP_BTC_W4 btc_write_4byte; ++ BFP_BTC_LOCAL_REG_W1 btc_write_local_reg_1byte; ++ // read/write bb related ++ BFP_BTC_SET_BB_REG btc_set_bb_reg; ++ BFP_BTC_GET_BB_REG btc_get_bb_reg; ++ ++ // read/write rf related ++ BFP_BTC_SET_RF_REG btc_set_rf_reg; ++ BFP_BTC_GET_RF_REG btc_get_rf_reg; ++ ++ // fill h2c related ++ BFP_BTC_FILL_H2C btc_fill_h2c; ++ // other ++ BFP_BTC_DISP_DBG_MSG btc_disp_dbg_msg; ++ // normal get/set related ++ BFP_BTC_GET btc_get; ++ BFP_BTC_SET btc_set; ++ ++ BFP_BTC_GET_BT_REG btc_get_bt_reg; ++ BFP_BTC_SET_BT_REG btc_set_bt_reg; ++ ++ BFP_BTC_SET_BT_ANT_DETECTION btc_set_bt_ant_detection; ++ ++ BFP_BTC_COEX_H2C_PROCESS btc_coex_h2c_process; ++}; ++typedef struct btc_coexist *PBTC_COEXIST; ++ ++extern struct btc_coexist GLBtCoexist; ++ ++BOOLEAN ++EXhalbtcoutsrc_InitlizeVariables( ++ IN PVOID Adapter ++ ); ++VOID ++EXhalbtcoutsrc_PowerOnSetting( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_PreLoadFirmware( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_InitHwConfig( ++ IN PBTC_COEXIST pBtCoexist, ++ IN BOOLEAN bWifiOnly ++ ); ++VOID ++EXhalbtcoutsrc_InitCoexDm( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_IpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtcoutsrc_LpsNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtcoutsrc_ScanNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtcoutsrc_ConnectNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte action ++ ); ++VOID ++EXhalbtcoutsrc_MediaStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN RT_MEDIA_STATUS mediaStatus ++ ); ++VOID ++EXhalbtcoutsrc_SpecificPacketNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pktType ++ ); ++VOID ++EXhalbtcoutsrc_BtInfoNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtcoutsrc_RfStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtcoutsrc_StackOperationNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte type ++ ); ++VOID ++EXhalbtcoutsrc_HaltNotify( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_PnpNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte pnpState ++ ); ++VOID ++EXhalbtcoutsrc_ScoreBoardStatusNotify( ++ IN PBTC_COEXIST pBtCoexist, ++ IN pu1Byte tmpBuf, ++ IN u1Byte length ++ ); ++VOID ++EXhalbtcoutsrc_CoexDmSwitch( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_Periodical( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_DbgControl( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u1Byte opCode, ++ IN u1Byte opLen, ++ IN pu1Byte pData ++ ); ++VOID ++EXhalbtcoutsrc_AntennaDetection( ++ IN PBTC_COEXIST pBtCoexist, ++ IN u4Byte centFreq, ++ IN u4Byte offset, ++ IN u4Byte span, ++ IN u4Byte seconds ++ ); ++VOID ++EXhalbtcoutsrc_StackUpdateProfileInfo( ++ VOID ++ ); ++VOID ++EXhalbtcoutsrc_SetHciVersion( ++ IN u2Byte hciVersion ++ ); ++VOID ++EXhalbtcoutsrc_SetBtPatchVersion( ++ IN u2Byte btHciVersion, ++ IN u2Byte btPatchVersion ++ ); ++VOID ++EXhalbtcoutsrc_UpdateMinBtRssi( ++ IN s1Byte btRssi ++ ); ++#if 0 ++VOID ++EXhalbtcoutsrc_SetBtExist( ++ IN BOOLEAN bBtExist ++ ); ++#endif ++VOID ++EXhalbtcoutsrc_SetChipType( ++ IN u1Byte chipType ++ ); ++VOID ++EXhalbtcoutsrc_SetAntNum( ++ IN u1Byte type, ++ IN u1Byte antNum ++ ); ++VOID ++EXhalbtcoutsrc_SetSingleAntPath( ++ IN u1Byte singleAntPath ++ ); ++VOID ++EXhalbtcoutsrc_DisplayBtCoexInfo( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++VOID ++EXhalbtcoutsrc_DisplayAntDetection( ++ IN PBTC_COEXIST pBtCoexist ++ ); ++ ++ ++#define MASKBYTE0 0xff ++#define MASKBYTE1 0xff00 ++#define MASKBYTE2 0xff0000 ++#define MASKBYTE3 0xff000000 ++#define MASKHWORD 0xffff0000 ++#define MASKLWORD 0x0000ffff ++#define MASKDWORD 0xffffffff ++#define MASK12BITS 0xfff ++#define MASKH4BITS 0xf0000000 ++#define MASKOFDM_D 0xffc00000 ++#define MASKCCK 0x3f3f3f3f ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/Mp_Precomp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/Mp_Precomp.h +new file mode 100644 +index 0000000..e9716f7 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/Mp_Precomp.h +@@ -0,0 +1,102 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __MP_PRECOMP_H__ ++#define __MP_PRECOMP_H__ ++ ++#include ++#include ++ ++#define BT_TMP_BUF_SIZE 100 ++ ++#ifdef PLATFORM_LINUX ++#define rsprintf snprintf ++#elif defined(PLATFORM_WINDOWS) ++#define rsprintf sprintf_s ++#endif ++ ++#define DCMD_Printf DBG_BT_INFO ++ ++#define delay_ms(ms) rtw_mdelay_os(ms) ++ ++#ifdef bEnable ++#undef bEnable ++#endif ++ ++#define WPP_SOFTWARE_TRACE 0 ++ ++typedef enum _BTC_MSG_COMP_TYPE{ ++ COMP_COEX = 0, ++ COMP_MAX ++}BTC_MSG_COMP_TYPE; ++extern u4Byte GLBtcDbgType[]; ++ ++#define DBG_OFF 0 ++#define DBG_SEC 1 ++#define DBG_SERIOUS 2 ++#define DBG_WARNING 3 ++#define DBG_LOUD 4 ++#define DBG_TRACE 5 ++ ++#if DBG ++#ifdef RT_TRACE ++#undef RT_TRACE ++#define RT_TRACE(dbgtype, dbgflag, printstr)\ ++do {\ ++ if (GLBtcDbgType[dbgtype] & BIT(dbgflag))\ ++ {\ ++ DbgPrint printstr;\ ++ }\ ++} while (0) ++#endif ++#else ++#ifdef RT_TRACE ++#undef RT_TRACE ++#endif ++#define RT_TRACE(dbgtype, dbgflag, printstr) ++#endif ++ ++#ifdef CONFIG_BT_COEXIST ++#define BT_SUPPORT 1 ++#define COEX_SUPPORT 1 ++#define HS_SUPPORT 1 ++#else ++#define BT_SUPPORT 0 ++#define COEX_SUPPORT 0 ++#define HS_SUPPORT 0 ++#endif ++ ++#include "HalBtcOutSrc.h" ++#include "HalBtc8188c2Ant.h" ++#include "HalBtc8192d2Ant.h" ++#include "HalBtc8192e1Ant.h" ++#include "HalBtc8192e2Ant.h" ++#include "HalBtc8723a1Ant.h" ++#include "HalBtc8723a2Ant.h" ++#include "HalBtc8723b1Ant.h" ++#include "HalBtc8723b2Ant.h" ++#include "HalBtc8812a1Ant.h" ++#include "HalBtc8812a2Ant.h" ++#include "HalBtc8821a1Ant.h" ++#include "HalBtc8821a2Ant.h" ++#include "HalBtc8821aCsr2Ant.h" ++#include "HalBtc8703b1Ant.h" ++#include "HalBtc8703b2Ant.h" ++ ++#endif // __MP_PRECOMP_H__ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/efuse_mask.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/efuse_mask.h +new file mode 100644 +index 0000000..86041d4 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/efuse_mask.h +@@ -0,0 +1,80 @@ ++ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ ++ #if defined(CONFIG_RTL8188E) ++ #include "rtl8188e/HalEfuseMask8188E_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8812A) ++ #include "rtl8812a/HalEfuseMask8812A_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8821A) ++ #include "rtl8812a/HalEfuseMask8821A_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8192E) ++ #include "rtl8192e/HalEfuseMask8192E_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8723B) ++ #include "rtl8723b/HalEfuseMask8723B_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8814A) ++ #include "rtl8814a/HalEfuseMask8814A_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8703B) ++ #include "rtl8703b/HalEfuseMask8703B_USB.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8188F) ++ #include "rtl8188f/HalEfuseMask8188F_USB.h" ++ #endif ++ ++#elif DEV_BUS_TYPE == RT_PCI_INTERFACE ++ ++ #if defined(CONFIG_RTL8188E) ++ #include "rtl8188e/HalEfuseMask8188E_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8812A) ++ #include "rtl8812a/HalEfuseMask8812A_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8821A) ++ #include "rtl8812a/HalEfuseMask8821A_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8192E) ++ #include "rtl8192e/HalEfuseMask8192E_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8723B) ++ #include "rtl8723b/HalEfuseMask8723B_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8814A) ++ #include "rtl8814a/HalEfuseMask8814A_PCIE.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8703B) ++ #include "rtl8703b/HalEfuseMask8703B_PCIE.h" ++ #endif ++ ++#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE ++ ++ #if defined(CONFIG_RTL8188E) ++ #include "rtl8188e/HalEfuseMask8188E_SDIO.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8703B) ++ #include "rtl8703b/HalEfuseMask8703B_SDIO.h" ++ #endif ++ ++ #if defined(CONFIG_RTL8188F) ++ #include "rtl8188f/HalEfuseMask8188F_SDIO.h" ++ #endif ++ ++#endif +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_PCIE.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_PCIE.c +new file mode 100644 +index 0000000..4d5656c +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_PCIE.c +@@ -0,0 +1,101 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++//#include "Mp_Precomp.h" ++//#include "../odm_precomp.h" ++#include ++ ++#include "HalEfuseMask8723B_PCIE.h" ++ ++ ++/****************************************************************************** ++* MPCIE.TXT ++******************************************************************************/ ++ ++u1Byte Array_MP_8723B_MPCIE[] = { ++ 0xFF, ++ 0xF3, ++ 0x00, ++ 0x0E, ++ 0x70, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x07, ++ 0xF3, ++ 0xFF, ++ 0xFF, ++ 0xFF, ++ 0xFF, ++ 0xFF, ++ 0xF1, ++ 0x00, ++ 0x80, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ ++}; ++ ++u2Byte ++EFUSE_GetArrayLen_MP_8723B_MPCIE(VOID) ++{ ++ return sizeof(Array_MP_8723B_MPCIE)/sizeof(u1Byte); ++} ++ ++VOID ++EFUSE_GetMaskArray_MP_8723B_MPCIE( ++ IN OUT pu1Byte Array ++ ) ++{ ++ u2Byte len = EFUSE_GetArrayLen_MP_8723B_MPCIE(), i = 0; ++ ++ for (i = 0; i < len; ++i) ++ Array[i] = Array_MP_8723B_MPCIE[i]; ++} ++BOOLEAN ++EFUSE_IsAddressMasked_MP_8723B_MPCIE( ++ IN u2Byte Offset ++ ) ++{ ++ int r = Offset/16; ++ int c = (Offset%16) / 2; ++ int result = 0; ++ ++ if (c < 4) // Upper double word ++ result = (Array_MP_8723B_MPCIE[r] & (0x10 << c)); ++ else ++ result = (Array_MP_8723B_MPCIE[r] & (0x01 << (c-4))); ++ ++ return (result > 0) ? 0 : 1; ++} ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_PCIE.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_PCIE.h +new file mode 100644 +index 0000000..41d3338 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_PCIE.h +@@ -0,0 +1,40 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++ ++/****************************************************************************** ++* MPCIE.TXT ++******************************************************************************/ ++ ++ ++u2Byte ++EFUSE_GetArrayLen_MP_8723B_MPCIE(VOID); ++ ++VOID ++EFUSE_GetMaskArray_MP_8723B_MPCIE( ++ IN OUT pu1Byte Array ++); ++ ++BOOLEAN ++EFUSE_IsAddressMasked_MP_8723B_MPCIE( // TC: Test Chip, MP: MP Chip ++ IN u2Byte Offset ++); ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_USB.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_USB.c +new file mode 100644 +index 0000000..8aa7079 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_USB.c +@@ -0,0 +1,100 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++//#include "Mp_Precomp.h" ++//#include "../odm_precomp.h" ++ ++#include ++ ++#include "HalEfuseMask8723B_USB.h" ++/****************************************************************************** ++* MUSB.TXT ++******************************************************************************/ ++ ++u1Byte Array_MP_8723B_MUSB[] = { ++ 0xFF, ++ 0xF3, ++ 0x00, ++ 0x0E, ++ 0x70, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x07, ++ 0xF1, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0xFF, ++ 0xFF, ++ 0xFF, ++ 0xFF, ++ 0xB0, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ 0x00, ++ ++}; ++ ++u2Byte ++EFUSE_GetArrayLen_MP_8723B_MUSB(VOID) ++{ ++ return sizeof(Array_MP_8723B_MUSB)/sizeof(u1Byte); ++} ++ ++VOID ++EFUSE_GetMaskArray_MP_8723B_MUSB( ++ IN OUT pu1Byte Array ++ ) ++{ ++ u2Byte len = EFUSE_GetArrayLen_MP_8723B_MUSB(), i = 0; ++ ++ for (i = 0; i < len; ++i) ++ Array[i] = Array_MP_8723B_MUSB[i]; ++} ++BOOLEAN ++EFUSE_IsAddressMasked_MP_8723B_MUSB( ++ IN u2Byte Offset ++ ) ++{ ++ int r = Offset/16; ++ int c = (Offset%16) / 2; ++ int result = 0; ++ ++ if (c < 4) // Upper double word ++ result = (Array_MP_8723B_MUSB[r] & (0x10 << c)); ++ else ++ result = (Array_MP_8723B_MUSB[r] & (0x01 << (c-4))); ++ ++ return (result > 0) ? 0 : 1; ++} ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_USB.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_USB.h +new file mode 100644 +index 0000000..c7d78ea +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/efuse/rtl8723b/HalEfuseMask8723B_USB.h +@@ -0,0 +1,42 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++ ++ ++/****************************************************************************** ++* MUSB.TXT ++******************************************************************************/ ++ ++ ++u2Byte ++EFUSE_GetArrayLen_MP_8723B_MUSB(VOID); ++ ++VOID ++EFUSE_GetMaskArray_MP_8723B_MUSB( ++ IN OUT pu1Byte Array ++); ++ ++BOOLEAN ++EFUSE_IsAddressMasked_MP_8723B_MUSB( // TC: Test Chip, MP: MP Chip ++ IN u2Byte Offset ++); ++ ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_btcoex.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_btcoex.c +old mode 100755 +new mode 100644 +index 119aaf7..8d02ea5 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_btcoex.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_btcoex.c +@@ -90,17 +90,114 @@ const char *const GLBtcWifiFreqString[]={ + "5G" + }; + ++const char *const GLBtcIotPeerString[] = { ++ "UNKNOWN", ++ "REALTEK", ++ "REALTEK_92SE", ++ "BROADCOM", ++ "RALINK", ++ "ATHEROS", ++ "CISCO", ++ "MERU", ++ "MARVELL", ++ "REALTEK_SOFTAP", /* peer is RealTek SOFT_AP, by Bohn, 2009.12.17 */ ++ "SELF_SOFTAP", /* Self is SoftAP */ ++ "AIRGO", ++ "INTEL", ++ "RTK_APCLIENT", ++ "REALTEK_81XX", ++ "REALTEK_WOW", ++ "REALTEK_JAGUAR_BCUTAP", ++ "REALTEK_JAGUAR_CCUTAP" ++}; ++ ++const char *const coexOpcodeString[] = { ++ "Wifi status notify", ++ "Wifi progress", ++ "Wifi info", ++ "Power state", ++ "Set Control", ++ "Get Control" ++}; ++ ++const char *const coexIndTypeString[] = { ++ "bt info", ++ "pstdma", ++ "limited tx/rx", ++ "coex table", ++ "request" ++}; ++ ++const char *const coexH2cResultString[] = { ++ "ok", ++ "unknown", ++ "un opcode", ++ "opVer MM", ++ "par Err", ++ "par OoR", ++ "reqNum MM", ++ "halMac Fail", ++ "h2c TimeOut", ++ "Invalid c2h Len", ++ "data overflow" ++}; ++ + #define HALBTCOUTSRC_AGG_CHK_WINDOW_IN_MS 8000 + +-BTC_COEXIST GLBtCoexist; ++struct btc_coexist GLBtCoexist; ++BTC_OFFLOAD gl_coex_offload; + u8 GLBtcWiFiInScanState; + u8 GLBtcWiFiInIQKState; + u8 GLBtcWiFiInIPS; + u8 GLBtcWiFiInLPS; + u8 GLBtcBtCoexAliveRegistered; + +-u32 GLBtcDbgType[BTC_MSG_MAX]; ++/* ++ * BT control H2C/C2H ++ */ ++/* EXT_EID */ ++typedef enum _bt_ext_eid { ++ C2H_WIFI_FW_ACTIVE_RSP = 0, ++ C2H_TRIG_BY_BT_FW ++} BT_EXT_EID; ++ ++/* C2H_STATUS */ ++typedef enum _bt_c2h_status { ++ BT_STATUS_OK = 0, ++ BT_STATUS_VERSION_MISMATCH, ++ BT_STATUS_UNKNOWN_OPCODE, ++ BT_STATUS_ERROR_PARAMETER ++} BT_C2H_STATUS; ++ ++/* C2H BT OP CODES */ ++typedef enum _bt_op_code { ++ BT_OP_GET_BT_VERSION = 0, ++ BT_OP_WRITE_REG_ADDR = 12, ++ BT_OP_WRITE_REG_VALUE, ++ BT_OP_READ_REG = 17 ++} BT_OP_CODE; ++ ++#define BTC_MPOPER_TIMEOUT 50 /* unit: ms */ ++ ++#define C2H_MAX_SIZE 16 ++u8 GLBtcBtMpOperSeq; ++_mutex GLBtcBtMpOperLock; ++_timer GLBtcBtMpOperTimer; ++_sema GLBtcBtMpRptSema; ++u8 GLBtcBtMpRptSeq; ++u8 GLBtcBtMpRptStatus; ++u8 GLBtcBtMpRptRsp[C2H_MAX_SIZE]; ++u8 GLBtcBtMpRptRspSize; ++u8 GLBtcBtMpRptWait; ++u8 GLBtcBtMpRptWiFiOK; ++u8 GLBtcBtMpRptBTOK; ++ ++/* ++ * Debug ++ */ ++u32 GLBtcDbgType[COMP_MAX]; + u8 GLBtcDbgBuf[BT_TMP_BUF_SIZE]; ++u1Byte gl_btc_trace_buf[BT_TMP_BUF_SIZE]; + + typedef struct _btcoexdbginfo + { +@@ -163,32 +260,14 @@ static void halbtcoutsrc_DbgInit(void) + { + u8 i; + +- for (i=0; iboardInfo.btChipType == BTC_CHIP_CSR_BC4 +- || pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC8 ++ if (pBtCoexist->board_info.bt_chip_type == BTC_CHIP_CSR_BC4 ++ || pBtCoexist->board_info.bt_chip_type == BTC_CHIP_CSR_BC8 + ){ + return _TRUE; + } +@@ -197,8 +276,8 @@ static u8 halbtcoutsrc_IsCsrBtCoex(PBTC_COEXIST pBtCoexist) + + static u8 halbtcoutsrc_IsHwMailboxExist(PBTC_COEXIST pBtCoexist) + { +- if (pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC4 +- || pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC8 ++ if (pBtCoexist->board_info.bt_chip_type == BTC_CHIP_CSR_BC4 ++ || pBtCoexist->board_info.bt_chip_type == BTC_CHIP_CSR_BC8 + ){ + return _FALSE; + } +@@ -241,7 +320,7 @@ void halbtcoutsrc_NormalLps(PBTC_COEXIST pBtCoexist) + PADAPTER padapter; + + +- BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Normal LPS behavior!!!\n")); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Normal LPS behavior!!!\n")); + + padapter = pBtCoexist->Adapter; + +@@ -362,7 +441,7 @@ void halbtcoutsrc_AggregationCheck(PBTC_COEXIST pBtCoexist) + + if (pBtCoexist->btInfo.bRejectAggPkt) + { +- rtw_btcoex_RejectApAggregatedPacket(padapter, _TRUE); ++ bNeedToAct = _TRUE; + pBtCoexist->btInfo.bPreRejectAggPkt = pBtCoexist->btInfo.bRejectAggPkt; + } + else +@@ -389,13 +468,10 @@ void halbtcoutsrc_AggregationCheck(PBTC_COEXIST pBtCoexist) + } + pBtCoexist->btInfo.preAggBufSize = pBtCoexist->btInfo.aggBufSize; + } +- +- if (bNeedToAct) +- { +- rtw_btcoex_RejectApAggregatedPacket(padapter, _TRUE); +- rtw_btcoex_RejectApAggregatedPacket(padapter, _FALSE); +- } + } ++ ++ if (bNeedToAct) ++ rtw_btcoex_rx_ampdu_apply(padapter); + } + + u8 halbtcoutsrc_IsWifiBusy(PADAPTER padapter) +@@ -413,7 +489,7 @@ u8 halbtcoutsrc_IsWifiBusy(PADAPTER padapter) + return _TRUE; + } + +-#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT) ++#if defined(CONFIG_CONCURRENT_MODE) + pmlmepriv = &padapter->pbuddy_adapter->mlmepriv; + + if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) +@@ -507,39 +583,147 @@ u32 halbtcoutsrc_GetWifiLinkStatus(PBTC_COEXIST pBtCoexist) + return retVal; + } + ++static u8 _is_btfwver_valid(PBTC_COEXIST pBtCoexist, u16 btfwver) ++{ ++ if (!btfwver) ++ return _FALSE; ++ ++ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) ++ if (btfwver == 0x8723) ++ return _FALSE; ++ ++ return _TRUE; ++} ++ ++static void _btmpoper_timer_hdl(void *p) ++{ ++ if (GLBtcBtMpRptWait) { ++ GLBtcBtMpRptWait = 0; ++ _rtw_up_sema(&GLBtcBtMpRptSema); ++ } ++} ++ ++/* ++ * !IMPORTANT! ++ * Before call this function, caller should acquire "GLBtcBtMpOperLock"! ++ * Othrewise there will be racing problem and something may go wrong. ++ */ ++static u8 _btmpoper_cmd(PBTC_COEXIST pBtCoexist, u8 opcode, u8 opcodever, u8 *cmd, u8 size) ++{ ++ PADAPTER padapter; ++ u8 buf[H2C_BTMP_OPER_LEN] = {0}; ++ u8 buflen; ++ u8 seq; ++ u8 timer_cancelled; ++ s32 ret; ++ ++ ++ if (!cmd && size) ++ size = 0; ++ if ((size + 2) > H2C_BTMP_OPER_LEN) ++ return BT_STATUS_H2C_LENGTH_EXCEEDED; ++ buflen = size + 2; ++ ++ seq = GLBtcBtMpOperSeq & 0xF; ++ GLBtcBtMpOperSeq++; ++ ++ buf[0] = (opcodever & 0xF) | (seq << 4); ++ buf[1] = opcode; ++ if (cmd && size) ++ _rtw_memcpy(buf+2, cmd, size); ++ ++ GLBtcBtMpRptWait = 1; ++ GLBtcBtMpRptWiFiOK = 0; ++ GLBtcBtMpRptBTOK = 0; ++ GLBtcBtMpRptStatus = 0; ++ padapter = pBtCoexist->Adapter; ++ _set_timer(&GLBtcBtMpOperTimer, BTC_MPOPER_TIMEOUT); ++ if (rtw_hal_fill_h2c_cmd(padapter, H2C_BT_MP_OPER, buflen, buf) == _FAIL) { ++ _cancel_timer(&GLBtcBtMpOperTimer, &timer_cancelled); ++ ret = BT_STATUS_H2C_FAIL; ++ goto exit; ++ } ++ ++ _rtw_down_sema(&GLBtcBtMpRptSema); ++ /* GLBtcBtMpRptWait should be 0 here*/ ++ ++ if (!GLBtcBtMpRptWiFiOK) { ++ DBG_871X("%s: Didn't get H2C Rsp Event!\n", __FUNCTION__); ++ ret = BT_STATUS_H2C_TIMTOUT; ++ goto exit; ++ } ++ if (!GLBtcBtMpRptBTOK) { ++ DBG_871X("%s: Didn't get BT response!\n", __FUNCTION__); ++ ret = BT_STATUS_H2C_BT_NO_RSP; ++ goto exit; ++ } ++ if (seq != GLBtcBtMpRptSeq) { ++ DBG_871X("%s: Sequence number not match!(%d!=%d)!\n", ++ __FUNCTION__, seq, GLBtcBtMpRptSeq); ++ ret = BT_STATUS_C2H_REQNUM_MISMATCH; ++ goto exit; ++ } ++ ++ switch (GLBtcBtMpRptStatus) { ++ /* Examine the status reported from C2H */ ++ case BT_STATUS_OK: ++ ret = BT_STATUS_BT_OP_SUCCESS; ++ DBG_871X("%s: C2H status = BT_STATUS_BT_OP_SUCCESS\n", __FUNCTION__); ++ break; ++ case BT_STATUS_VERSION_MISMATCH: ++ ret = BT_STATUS_OPCODE_L_VERSION_MISMATCH; ++ DBG_871X("%s: C2H status = BT_STATUS_OPCODE_L_VERSION_MISMATCH\n", __FUNCTION__); ++ break; ++ case BT_STATUS_UNKNOWN_OPCODE: ++ ret = BT_STATUS_UNKNOWN_OPCODE_L; ++ DBG_871X("%s: C2H status = MP_BT_STATUS_UNKNOWN_OPCODE_L\n", __FUNCTION__); ++ break; ++ case BT_STATUS_ERROR_PARAMETER: ++ ret = BT_STATUS_PARAMETER_FORMAT_ERROR_L; ++ DBG_871X("%s: C2H status = MP_BT_STATUS_PARAMETER_FORMAT_ERROR_L\n", __FUNCTION__); ++ break; ++ default: ++ ret = BT_STATUS_UNKNOWN_STATUS_L; ++ DBG_871X("%s: C2H status = MP_BT_STATUS_UNKNOWN_STATUS_L\n", __FUNCTION__); ++ break; ++ } ++ ++exit: ++ return ret; ++} ++ + u32 halbtcoutsrc_GetBtPatchVer(PBTC_COEXIST pBtCoexist) + { +- u16 btRealFwVer = 0x0; +- u8 btFwVer = 0x0; +- u8 cnt = 0; ++ if (_is_btfwver_valid(pBtCoexist, pBtCoexist->btInfo.btRealFwVer) == _TRUE) ++ goto exit; + +-#if 0 +- if (!pBtCoexist->btInfo.btRealFwVer && cnt<=5) +- { +- if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist)) +- { // mailbox exists, through mailbox +- if (NDBG_GetBtFwVersion(pBtCoexist->Adapter, &btRealFwVer, &btFwVer)) +- { +- pBtCoexist->btInfo.btRealFwVer = btRealFwVer; +- pBtCoexist->btInfo.btFwVer = btFwVer; +- } +- else +- { +- pBtCoexist->btInfo.btRealFwVer = 0x0; +- pBtCoexist->btInfo.btFwVer = 0x0; +- } +- } +- else // no mailbox, query bt patch version through stack. +- { +- u1Byte dataLen=2; +- u1Byte buf[4] = {0}; +- buf[0] = 0x0; // OP_Code +- buf[1] = 0x0; // OP_Code_Length +- BT_SendEventExtBtCoexControl(pBtCoexist->Adapter, _FALSE, dataLen, &buf[0]); ++ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { ++ _irqL irqL; ++ u8 ret; ++ ++ ++ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); ++ ++ ret = _btmpoper_cmd(pBtCoexist, BT_OP_GET_BT_VERSION, 0, NULL, 0); ++ if (BT_STATUS_BT_OP_SUCCESS == ret) { ++ pBtCoexist->btInfo.btRealFwVer = le16_to_cpu(*(u16 *)GLBtcBtMpRptRsp); ++ pBtCoexist->btInfo.btFwVer = *(GLBtcBtMpRptRsp+2); + } +- cnt++; ++ pBtCoexist->btInfo.getBtFwVerCnt++; ++ ++ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); ++ } else { ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ u1Byte dataLen = 2; ++ u1Byte buf[4] = {0}; ++ ++ buf[0] = 0x0; /* OP_Code */ ++ buf[1] = 0x0; /* OP_Code_Length */ ++ BT_SendEventExtBtCoexControl(pBtCoexist->Adapter, _FALSE, dataLen, &buf[0]); ++#endif /* !CONFIG_BT_COEXIST_SOCKET_TRX */ + } +-#endif ++ ++exit: + return pBtCoexist->btInfo.btRealFwVer; + } + +@@ -548,10 +732,9 @@ s32 halbtcoutsrc_GetWifiRssi(PADAPTER padapter) + PHAL_DATA_TYPE pHalData; + s32 UndecoratedSmoothedPWDB = 0; + +- + pHalData = GET_HAL_DATA(padapter); + +- UndecoratedSmoothedPWDB = pHalData->dmpriv.EntryMinUndecoratedSmoothedPWDB; ++ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; + + return UndecoratedSmoothedPWDB; + } +@@ -714,6 +897,9 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) + /* Always return FALSE in linux driver since this case is added only for windows driver */ + *pu8 = _FALSE; + break; ++ case BTC_GET_BL_FW_READY: ++ *pu8 = padapter->bFWReady; ++ break; + + case BTC_GET_S4_WIFI_RSSI: + *pS4Tmp = halbtcoutsrc_GetWifiRssi(padapter); +@@ -760,6 +946,10 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) + *pU4Tmp = halbtcoutsrc_GetBtPatchVer(pBtCoexist); + break; + ++ case BTC_GET_U4_VENDOR: ++ *pU4Tmp = BTC_VENDOR_OTHER; ++ break; ++ + case BTC_GET_U1_WIFI_DOT11_CHNL: + *pU1Tmp = padapter->mlmeextpriv.cur_channel; + break; +@@ -774,7 +964,7 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) + break; + + case BTC_GET_U1_MAC_PHY_MODE: +- *pU1Tmp = BTC_SMSP; ++// *pU1Tmp = BTC_SMSP; + // *pU1Tmp = BTC_DMSP; + // *pU1Tmp = BTC_DMDP; + // *pU1Tmp = BTC_MP_UNKNOWN; +@@ -784,7 +974,32 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) + *pU1Tmp = halbtcoutsrc_GetWifiScanAPNum(padapter); + break; + case BTC_GET_U1_ANT_TYPE: +- *pU1Tmp = (u1Byte)BTC_ANT_TYPE_0; ++ switch(pHalData->bt_coexist.btAntisolation) ++ { ++ case 0: ++ *pU1Tmp = (u1Byte)BTC_ANT_TYPE_0; ++ //pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_0; ++ break; ++ case 1: ++ *pU1Tmp = (u1Byte)BTC_ANT_TYPE_1; ++ //pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_1; ++ break; ++ case 2: ++ *pU1Tmp = (u1Byte)BTC_ANT_TYPE_2; ++ //pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_2; ++ break; ++ case 3: ++ *pU1Tmp = (u1Byte)BTC_ANT_TYPE_3; ++ //pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_3; ++ break; ++ case 4: ++ *pU1Tmp = (u1Byte)BTC_ANT_TYPE_4; ++ //pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_4; ++ break; ++ } ++ break; ++ case BTC_GET_U1_IOT_PEER: ++ *pU1Tmp = mlmeext->mlmext_info.assoc_AP_vendor; + break; + + //=======1Ant=========== +@@ -930,61 +1145,60 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf) + + case BTC_SET_ACT_SEND_MIMO_PS: + { +- u8 newMimoPsMode = 3; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- // *pU1Tmp = 0 use SM_PS static type +- // *pU1Tmp = 1 disable SM_PS +- if(*pU1Tmp==0) +- newMimoPsMode = WLAN_HT_CAP_SM_PS_STATIC; +- else if(*pU1Tmp==1) +- newMimoPsMode = WLAN_HT_CAP_SM_PS_DISABLED; +- +- if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE) +- { +- //issue_action_SM_PS(padapter, get_my_bssid(&(pmlmeinfo->network)), newMimoPsMode); +- issue_action_SM_PS_wait_ack(padapter, get_my_bssid(&(pmlmeinfo->network)), newMimoPsMode, 3, 1); ++ u8 newMimoPsMode = 3; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ /* *pU1Tmp = 0 use SM_PS static type */ ++ /* *pU1Tmp = 1 disable SM_PS */ ++ if (*pU1Tmp == 0) ++ newMimoPsMode = WLAN_HT_CAP_SM_PS_STATIC; ++ else if (*pU1Tmp == 1) ++ newMimoPsMode = WLAN_HT_CAP_SM_PS_DISABLED; ++ ++ if (check_fwstate(&padapter->mlmepriv , WIFI_ASOC_STATE) == _TRUE) { ++ /* issue_action_SM_PS(padapter, get_my_bssid(&(pmlmeinfo->network)), newMimoPsMode); */ ++ issue_action_SM_PS_wait_ack(padapter , get_my_bssid(&(pmlmeinfo->network)) , newMimoPsMode, 3 , 1); + } + } + break; + + case BTC_SET_ACT_CTRL_BT_INFO: +-#if 0 ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX + { + u8 dataLen = *pU1Tmp; +- u8 tmpBuf[20]; ++ u8 tmpBuf[BTC_TMP_BUF_SHORT]; + if (dataLen) + { + _rtw_memcpy(tmpBuf, pU1Tmp+1, dataLen); + } +-// BT_SendEventExtBtInfoControl(padapter, dataLen, &tmpBuf[0]); ++ BT_SendEventExtBtInfoControl(padapter, dataLen, &tmpBuf[0]); + } +-#else ++#else //!CONFIG_BT_COEXIST_SOCKET_TRX + ret = _FALSE; +-#endif ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX + break; + + case BTC_SET_ACT_CTRL_BT_COEX: +-#if 0 ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX + { + u8 dataLen = *pU1Tmp; +- u8 tmpBuf[20]; ++ u8 tmpBuf[BTC_TMP_BUF_SHORT]; + if (dataLen) + { + _rtw_memcpy(tmpBuf, pU1Tmp+1, dataLen); + } +-// BT_SendEventExtBtCoexControl(padapter, _FALSE, dataLen, &tmpBuf[0]); ++ BT_SendEventExtBtCoexControl(padapter, _FALSE, dataLen, &tmpBuf[0]); + } +-#else ++#else //!CONFIG_BT_COEXIST_SOCKET_TRX + ret = _FALSE; +-#endif ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX + break; + case BTC_SET_ACT_CTRL_8723B_ANT: + #if 0 + { + u1Byte dataLen=*pU1Tmp; +- u1Byte tmpBuf[20]; ++ u1Byte tmpBuf[BTC_TMP_BUF_SHORT]; + if(dataLen) + { + PlatformMoveMemory(&tmpBuf[0], pU1Tmp+1, dataLen); +@@ -1053,7 +1267,96 @@ void halbtcoutsrc_DisplayCoexStatistics(PBTC_COEXIST pBtCoexist) + PBT_MGNT pBtMgnt = &padapter->MgntInfo.BtInfo.BtMgnt; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 *cliBuf = pBtCoexist->cliBuf; +- u8 i; ++ u1Byte i, j; ++ u1Byte tmpbuf[BTC_TMP_BUF_SHORT]; ++ ++ ++ if (gl_coex_offload.cnt_h2c_sent) { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Coex h2c notify]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = H2c(%d)/Ack(%d)", "Coex h2c/c2h overall statistics", ++ gl_coex_offload.cnt_h2c_sent, gl_coex_offload.cnt_c2h_ack); ++ for (j = 0; j < COL_STATUS_MAX; j++) { ++ if (gl_coex_offload.status[j]) { ++ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.status[j]); ++ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT); ++ } ++ } ++ CL_PRINTF(cliBuf); ++ } ++ for (i = 0; i < COL_OP_WIFI_OPCODE_MAX; i++) { ++ if (gl_coex_offload.h2c_record[i].count) { ++ /*==========================================*/ ++ /* H2C result statistics*/ ++ /*==========================================*/ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = total:%d", coexOpcodeString[i], gl_coex_offload.h2c_record[i].count); ++ for (j = 0; j < COL_STATUS_MAX; j++) { ++ if (gl_coex_offload.h2c_record[i].status[j]) { ++ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.h2c_record[i].status[j]); ++ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT); ++ } ++ } ++ CL_PRINTF(cliBuf); ++ /*==========================================*/ ++ /* H2C/C2H content*/ ++ /*==========================================*/ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = ", "H2C / C2H content"); ++ for (j = 0; j < gl_coex_offload.h2c_record[i].h2c_len; j++) { ++ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, "%02x ", gl_coex_offload.h2c_record[i].h2c_buf[j]); ++ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, 3); ++ } ++ if (gl_coex_offload.h2c_record[i].c2h_ack_len) { ++ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, "/ ", 2); ++ for (j = 0; j < gl_coex_offload.h2c_record[i].c2h_ack_len; j++) { ++ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, "%02x ", gl_coex_offload.h2c_record[i].c2h_ack_buf[j]); ++ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, 3); ++ } ++ } ++ CL_PRINTF(cliBuf); ++ /*==========================================*/ ++ } ++ } ++ ++ if (gl_coex_offload.cnt_c2h_ind) { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Coex c2h indication]============"); ++ CL_PRINTF(cliBuf); ++ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = Ind(%d)", "C2H indication statistics", ++ gl_coex_offload.cnt_c2h_ind); ++ for (j = 0; j < COL_STATUS_MAX; j++) { ++ if (gl_coex_offload.c2h_ind_status[j]) { ++ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.c2h_ind_status[j]); ++ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT); ++ } ++ } ++ CL_PRINTF(cliBuf); ++ } ++ for (i = 0; i < COL_IND_MAX; i++) { ++ if (gl_coex_offload.c2h_ind_record[i].count) { ++ /*==========================================*/ ++ /* H2C result statistics*/ ++ /*==========================================*/ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = total:%d", coexIndTypeString[i], gl_coex_offload.c2h_ind_record[i].count); ++ for (j = 0; j < COL_STATUS_MAX; j++) { ++ if (gl_coex_offload.c2h_ind_record[i].status[j]) { ++ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.c2h_ind_record[i].status[j]); ++ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT); ++ } ++ } ++ CL_PRINTF(cliBuf); ++ /*==========================================*/ ++ /* content*/ ++ /*==========================================*/ ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = ", "C2H indication content"); ++ for (j = 0; j < gl_coex_offload.c2h_ind_record[i].ind_len; j++) { ++ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, "%02x ", gl_coex_offload.c2h_ind_record[i].ind_buf[j]); ++ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, 3); ++ } ++ CL_PRINTF(cliBuf); ++ /*==========================================*/ ++ } ++ } + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Statistics]============"); + CL_PRINTF(cliBuf); +@@ -1108,8 +1411,9 @@ void halbtcoutsrc_DisplayCoexStatistics(PBTC_COEXIST pBtCoexist) + pBtCoexist->statistics.cntScanNotify, pBtCoexist->statistics.cntConnectNotify, + pBtCoexist->statistics.cntMediaStatusNotify); + CL_PRINTF(cliBuf); +- CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Special pkt/Bt info", \ +- pBtCoexist->statistics.cntSpecialPacketNotify, pBtCoexist->statistics.cntBtInfoNotify); ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "Special pkt/Bt info/ bind", ++ pBtCoexist->statistics.cntSpecialPacketNotify, pBtCoexist->statistics.cntBtInfoNotify, ++ pBtCoexist->statistics.cntBind); + CL_PRINTF(cliBuf); + #endif + } +@@ -1123,7 +1427,7 @@ void halbtcoutsrc_DisplayBtLinkInfo(PBTC_COEXIST pBtCoexist) + u8 i; + + +- if (pBtCoexist->stackInfo.bProfileNotified) ++ if (pBtCoexist->stack_info.profile_notified) + { + for (i=0; iExtConfig.NumberOfACL; i++) + { +@@ -1150,7 +1454,7 @@ void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist) + { + PADAPTER padapter = pBtCoexist->Adapter; + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); +- u8* cliBuf=pBtCoexist->cliBuf; ++ u8 *cliBuf = pBtCoexist->cli_buf; + s32 wifiRssi=0, btHsRssi=0; + BOOLEAN bScan=_FALSE, bLink=_FALSE, bRoam=_FALSE, bWifiBusy=_FALSE, bWifiUnderBMode=_FALSE; + u32 wifiBw=BTC_WIFI_BW_HT20, wifiTrafficDir=BTC_WIFI_TRAFFIC_TX, wifiFreq=BTC_FREQ_2_4G; +@@ -1165,32 +1469,37 @@ void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist) + ((wifiLinkStatus&WIFI_P2P_GC_CONNECTED)? 1:0) ); + CL_PRINTF(cliBuf); + +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiChnl); +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(High Speed)", \ ++ if (wifiLinkStatus&WIFI_STA_CONNECTED) { ++ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "IOT Peer", GLBtcIotPeerString[padapter->mlmeextpriv.mlmext_info.assoc_AP_vendor]); ++ CL_PRINTF(cliBuf); ++ } ++ ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiChnl); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(High Speed)", + wifiChnl, wifiHsChnl, bBtHsOn); + CL_PRINTF(cliBuf); + +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \ + wifiRssi-100, btHsRssi-100); + CL_PRINTF(cliBuf); + + +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \ + bLink, bRoam, bScan); + CL_PRINTF(cliBuf); + +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifiFreq); +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); +- pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &nScanAPNum); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifiFreq); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); ++ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_AP_NUM, &nScanAPNum); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s/ AP=%d ", "Wifi freq/ bw/ traffic", \ + GLBtcWifiFreqString[wifiFreq], ((bWifiUnderBMode)? "11b": GLBtcWifiBwString[wifiBw]), + ((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")), +@@ -1345,14 +1654,10 @@ void halbtcoutsrc_WriteLocalReg1Byte(void *pBtcContext, u32 RegAddr, u8 Data) + PBTC_COEXIST pBtCoexist=(PBTC_COEXIST)pBtcContext; + PADAPTER Adapter=pBtCoexist->Adapter; + +- if(BTC_INTF_SDIO == pBtCoexist->chipInterface) +- { ++ if (BTC_INTF_SDIO == pBtCoexist->chip_interface) + rtw_write8(Adapter, SDIO_LOCAL_BASE | RegAddr, Data); +- } + else +- { + rtw_write8(Adapter, RegAddr, Data); +- } + } + + void halbtcoutsrc_SetBbReg(void *pBtcContext, u32 RegAddr, u32 BitMask, u32 Data) +@@ -1404,43 +1709,92 @@ u32 halbtcoutsrc_GetRfReg(void *pBtcContext, u8 eRFPath, u32 RegAddr, u32 BitMas + return PHY_QueryRFReg(padapter, eRFPath, RegAddr, BitMask); + } + +-void halbtcoutsrc_SetBtReg(void *pBtcContext, u8 RegType, u32 RegAddr, u32 Data) ++u16 halbtcoutsrc_SetBtReg(void *pBtcContext, u8 RegType, u32 RegAddr, u32 Data) + { + PBTC_COEXIST pBtCoexist; +- PADAPTER padapter; +- u8 CmdBuffer1[4] = {0}; +- u8 CmdBuffer2[4] = {0}; +- u8* AddrToSet = (u8*)&RegAddr; +- u8* ValueToSet = (u8*)&Data; +- u8 OperVer = 0; +- u8 ReqNum = 0; ++ u16 ret = BT_STATUS_BT_OP_SUCCESS; + + pBtCoexist = (PBTC_COEXIST)pBtcContext; +- padapter = pBtCoexist->Adapter; + +- if (IS_HARDWARE_TYPE_8723B(padapter)) +- { +- CmdBuffer1[0] |= (OperVer & 0x0f); /* Set OperVer */ +- CmdBuffer1[0] |= ((ReqNum << 4) & 0xf0); /* Set ReqNum */ +- CmdBuffer1[1] = 0x0d; /* Set OpCode to BT_LO_OP_WRITE_REG_VALUE */ +- CmdBuffer1[2] = ValueToSet[0]; /* Set WriteRegValue */ +- rtw_hal_fill_h2c_cmd(padapter, 0x67, 4, &(CmdBuffer1[0])); ++ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { ++ u8 buf[3] = {0}; ++ _irqL irqL; ++ u8 op_code; ++ u8 status; ++ ++ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); ++ ++ Data = cpu_to_le32(Data); ++ op_code = BT_OP_WRITE_REG_VALUE; ++ status = _btmpoper_cmd(pBtCoexist, op_code, 0, (u8 *)&Data, 3); ++ if (status != BT_STATUS_BT_OP_SUCCESS) ++ ret = SET_BT_MP_OPER_RET(op_code, status); ++ else { ++ buf[0] = RegType; ++ *(u16 *)(buf+1) = cpu_to_le16((u16)RegAddr); ++ op_code = BT_OP_WRITE_REG_ADDR; ++ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 3); ++ if (status != BT_STATUS_BT_OP_SUCCESS) ++ ret = SET_BT_MP_OPER_RET(op_code, status); ++ } + +- rtw_msleep_os(200); +- ReqNum++; ++ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); ++ } else ++ ret = BT_STATUS_NOT_IMPLEMENT; + +- CmdBuffer2[0] |= (OperVer & 0x0f); /* Set OperVer */ +- CmdBuffer2[0] |= ((ReqNum << 4) & 0xf0); /* Set ReqNum */ +- CmdBuffer2[1] = 0x0c; /* Set OpCode of BT_LO_OP_WRITE_REG_ADDR */ +- CmdBuffer2[3] = AddrToSet[0]; /* Set WriteRegAddr */ +- rtw_hal_fill_h2c_cmd(padapter, 0x67, 4, &(CmdBuffer2[0])); +- } ++ return ret; + } + +-u32 halbtcoutsrc_GetBtReg(void *pBtcContext, u8 RegType, u32 RegAddr) ++u8 halbtcoutsrc_SetBtAntDetection(void *pBtcContext, u8 txTime, u8 btChnl) + { +- /* To be implemented. Always return 0 temporarily */ +- return 0; ++/* Always return _FALSE since we don't implement this yet */ ++#if 0 ++ PBTC_COEXIST pBtCoexist = (PBTC_COEXIST)pBtcContext; ++ PADAPTER Adapter = pBtCoexist->Adapter; ++ u1Byte btCanTx = 0; ++ BOOLEAN bStatus = FALSE; ++ ++ bStatus = NDBG_SetBtAntDetection(Adapter, txTime, btChnl, &btCanTx); ++ if (bStatus && btCanTx) ++ return _TRUE; ++ else ++ return _FALSE; ++#else ++ return _FALSE; ++#endif ++} ++ ++u16 halbtcoutsrc_GetBtReg(void *pBtcContext, u8 RegType, u32 RegAddr, u32 *data) ++{ ++ PBTC_COEXIST pBtCoexist; ++ u16 ret = BT_STATUS_BT_OP_SUCCESS; ++ ++ pBtCoexist = (PBTC_COEXIST)pBtcContext; ++ ++ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { ++ u8 buf[3] = {0}; ++ _irqL irqL; ++ u8 op_code; ++ u8 status; ++ ++ buf[0] = RegType; ++ *(u16 *)(buf+1) = cpu_to_le16((u16)RegAddr); ++ ++ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); ++ ++ op_code = BT_OP_READ_REG; ++ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 3); ++ if (status == BT_STATUS_BT_OP_SUCCESS) ++ *data = le16_to_cpu(*(u16 *)GLBtcBtMpRptRsp); ++ else ++ ret = SET_BT_MP_OPER_RET(op_code, status); ++ ++ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); ++ ++ } else ++ ret = BT_STATUS_NOT_IMPLEMENT; ++ ++ return ret; + } + + void halbtcoutsrc_FillH2cCmd(void *pBtcContext, u8 elementId, u32 cmdLen, u8 *pCmdBuffer) +@@ -1455,9 +1809,279 @@ void halbtcoutsrc_FillH2cCmd(void *pBtcContext, u8 elementId, u32 cmdLen, u8 *pC + rtw_hal_fill_h2c_cmd(padapter, elementId, cmdLen, pCmdBuffer); + } + ++static void halbtcoutsrc_coex_offload_init(void) ++{ ++ u1Byte i; ++ ++ gl_coex_offload.h2c_req_num = 0; ++ gl_coex_offload.cnt_h2c_sent = 0; ++ gl_coex_offload.cnt_c2h_ack = 0; ++ gl_coex_offload.cnt_c2h_ind = 0; ++ ++ for (i = 0; i < COL_MAX_H2C_REQ_NUM; i++) ++ init_completion(&gl_coex_offload.c2h_event[i]); ++} ++ ++static COL_H2C_STATUS halbtcoutsrc_send_h2c(PADAPTER Adapter, PCOL_H2C pcol_h2c, u16 h2c_cmd_len) ++{ ++ COL_H2C_STATUS h2c_status = COL_STATUS_C2H_OK; ++ u8 i; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0)) ++ reinit_completion(&gl_coex_offload.c2h_event[pcol_h2c->req_num]); /* set event to un signaled state */ ++#else ++ INIT_COMPLETION(gl_coex_offload.c2h_event[pcol_h2c->req_num]); ++#endif ++ ++ if (TRUE) { ++#if 0 /*(USE_HAL_MAC_API==1) */ ++ if (RT_STATUS_SUCCESS == HAL_MAC_Send_BT_COEX(&GET_HAL_MAC_INFO(Adapter), (pu1Byte)(pcol_h2c), (u4Byte)h2c_cmd_len, 1)) { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("HAL_MAC_Send_BT_COEX successfully.\n")); ++ if (wait_for_completion_timeout(&gl_coex_offload.c2h_event[pcol_h2c->req_num], 20)) { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], received H2C rsp event!!\n")); ++ } else { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], H2C timeout!!\n")); ++ h2c_status = COL_STATUS_H2C_TIMTOUT; ++ } ++ } else { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("HAL_MAC_Send_BT_COEX fail.\n")); ++ h2c_status = COL_STATUS_H2C_HALMAC_FAIL; ++ } ++#endif ++ } ++ ++ return h2c_status; ++} ++ ++static COL_H2C_STATUS halbtcoutsrc_check_c2h_ack(PADAPTER Adapter, PCOL_SINGLE_H2C_RECORD pH2cRecord) ++{ ++ COL_H2C_STATUS c2h_status = COL_STATUS_C2H_OK; ++ PCOL_H2C p_h2c_cmd = (PCOL_H2C)&pH2cRecord->h2c_buf[0]; ++ u8 req_num = p_h2c_cmd->req_num; ++ PCOL_C2H_ACK p_c2h_ack = (PCOL_C2H_ACK)&gl_coex_offload.c2h_ack_buf[req_num]; ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], c2h ack len=%d, coex return len=%d!!!\n", ++ gl_coex_offload.c2h_ack_len[req_num], p_c2h_ack->ret_len)); ++ ++ if ((COL_C2H_ACK_HDR_LEN+p_c2h_ack->ret_len) > gl_coex_offload.c2h_ack_len[req_num]) { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], coex data overflow!!!\n")); ++ c2h_status = COL_STATUS_COEX_DATA_OVERFLOW; ++ return c2h_status; ++ } ++ /* else */ ++ { ++ _rtw_memmove(&pH2cRecord->c2h_ack_buf[0], &gl_coex_offload.c2h_ack_buf[req_num], gl_coex_offload.c2h_ack_len[req_num]); ++ pH2cRecord->c2h_ack_len = gl_coex_offload.c2h_ack_len[req_num]; ++ } ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], c2h ack: status=0x%x, opcode_ver=0x%x, req_num=%d, ret_len=%d\n", ++ p_c2h_ack->status, p_c2h_ack->opcode_ver, p_c2h_ack->req_num, p_c2h_ack->ret_len)); ++ ++ if (p_c2h_ack->req_num != p_h2c_cmd->req_num) { ++ c2h_status = COL_STATUS_C2H_REQ_NUM_MISMATCH; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], Error!! C2H req_num Mismatch!!\n")); ++ } else if (p_c2h_ack->opcode_ver != p_h2c_cmd->opcode_ver) { ++ c2h_status = COL_STATUS_C2H_OPCODE_VER_MISMATCH; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], Error!! OPCode version mismatch!!\n")); ++ } else { ++ c2h_status = p_c2h_ack->status; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], status from fw = %d!!\n", c2h_status)); ++ } ++ ++ return c2h_status; ++} ++ ++COL_H2C_STATUS halbtcoutsrc_CoexH2cProcess(void *pBtCoexist, ++ u8 opcode, u8 opcode_ver, u8 *ph2c_par, u8 h2c_par_len) ++{ ++ PADAPTER Adapter = ((struct btc_coexist *)pBtCoexist)->Adapter; ++ u8 H2C_Parameter[BTC_TMP_BUF_SHORT] = {0}; ++ PCOL_H2C pcol_h2c = (PCOL_H2C)&H2C_Parameter[0]; ++ u16 paraLen = 0; ++ COL_H2C_STATUS h2c_status = COL_STATUS_C2H_OK, c2h_status = COL_STATUS_C2H_OK; ++ COL_H2C_STATUS ret_status = COL_STATUS_C2H_OK; ++ u16 i, col_h2c_len = 0; ++ ++ pcol_h2c->opcode = opcode; ++ pcol_h2c->opcode_ver = opcode_ver; ++ pcol_h2c->req_num = gl_coex_offload.h2c_req_num; ++ gl_coex_offload.h2c_req_num++; ++ gl_coex_offload.h2c_req_num %= 16; ++ ++ _rtw_memmove(&pcol_h2c->buf[0], ph2c_par, h2c_par_len); ++ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], H2C opcode/ opcode_ver/ req_num/ h2c_par_len=%d/ %d/ %d/ %d\n", ++ pcol_h2c->opcode, pcol_h2c->opcode_ver, pcol_h2c->req_num, h2c_par_len)); ++ ++ col_h2c_len = h2c_par_len+2; /* 2=sizeof(OPCode, OPCode_version and Request number) */ ++ BT_PrintData(Adapter, "[COL], H2C cmd: ", col_h2c_len, H2C_Parameter); ++ ++ gl_coex_offload.cnt_h2c_sent++; ++ ++ gl_coex_offload.h2c_record[opcode].count++; ++ gl_coex_offload.h2c_record[opcode].h2c_len = col_h2c_len; ++ _rtw_memmove((PVOID)&gl_coex_offload.h2c_record[opcode].h2c_buf[0], (PVOID)pcol_h2c, col_h2c_len); ++ ++ h2c_status = halbtcoutsrc_send_h2c(Adapter, pcol_h2c, col_h2c_len); ++ ++ gl_coex_offload.h2c_record[opcode].c2h_ack_len = 0; ++ ++ if (COL_STATUS_C2H_OK == h2c_status) { ++ /* if reach here, it means H2C get the correct c2h response, */ ++ c2h_status = halbtcoutsrc_check_c2h_ack(Adapter, &gl_coex_offload.h2c_record[opcode]); ++ ret_status = c2h_status; ++ } else { ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], H2C failed for opCode=%d\n", opcode)); ++ /* check h2c status error, return error status code to upper layer. */ ++ ret_status = h2c_status; ++ } ++ gl_coex_offload.h2c_record[opcode].status[ret_status]++; ++ gl_coex_offload.status[ret_status]++; ++ ++ return ret_status; ++} ++ ++#if 0 ++static void BT_CoexOffloadRecordErrC2hAck(PADAPTER Adapter) ++{ ++ PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); ++ ++ if (pDefaultAdapter != Adapter) ++ return; ++ ++ if (!hal_btcoex_IsBtExist(Adapter)) ++ return; ++ ++ gl_coex_offload.cnt_c2h_ack++; ++ ++ gl_coex_offload.status[COL_STATUS_INVALID_C2H_LEN]++; ++} ++ ++static void BT_CoexOffloadC2hAckCheck(PADAPTER Adapter, u8 *tmpBuf, u8 length) ++{ ++ PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); ++ PCOL_C2H_ACK p_c2h_ack = NULL; ++ u8 req_num = 0xff; ++ ++ if (pDefaultAdapter != Adapter) ++ return; ++ ++ if (!hal_btcoex_IsBtExist(Adapter)) ++ return; ++ ++ gl_coex_offload.cnt_c2h_ack++; ++ ++ if (length < COL_C2H_ACK_HDR_LEN) { /* c2h ack length must >= 3 (status, opcode_ver, req_num and ret_len) */ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], invalid c2h ack length (%d)!!!\n", length)); ++ gl_coex_offload.status[COL_STATUS_INVALID_C2H_LEN]++; ++ } else { ++ BT_PrintData(Adapter, "[COL], c2h ack:", length, tmpBuf); ++ ++ p_c2h_ack = (PCOL_C2H_ACK)tmpBuf; ++ req_num = p_c2h_ack->req_num; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], req_num = %d!!!\n", req_num)); ++ ++ _rtw_memmove(&gl_coex_offload.c2h_ack_buf[req_num][0], tmpBuf, length); ++ gl_coex_offload.c2h_ack_len[req_num] = length; ++ ++ complete(&gl_coex_offload.c2h_event[req_num]); ++ } ++} ++ ++static void BT_CoexOffloadC2hIndCheck(PADAPTER Adapter, u8 *tmpBuf, u8 length) ++{ ++ PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); ++ PCOL_C2H_IND p_c2h_ind = NULL; ++ u8 ind_type = 0, ind_version = 0, ind_length = 0; ++ ++ if (pDefaultAdapter != Adapter) ++ return; ++ ++ if (!hal_btcoex_IsBtExist(Adapter)) ++ return; ++ ++ gl_coex_offload.cnt_c2h_ind++; ++ ++ if (length < COL_C2H_IND_HDR_LEN) { /* c2h indication length must >= 3 (type, version and length) */ ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], invalid c2h indication length (%d)!!!\n", length)); ++ gl_coex_offload.c2h_ind_status[COL_STATUS_INVALID_C2H_LEN]++; ++ } else { ++ BT_PrintData(Adapter, "[COL], c2h indication:", length, tmpBuf); ++ ++ p_c2h_ind = (PCOL_C2H_IND)tmpBuf; ++ ind_type = p_c2h_ind->type; ++ ind_version = p_c2h_ind->version; ++ ind_length = p_c2h_ind->length; ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], type/ version/ length = %d/ %d/ %d!!!\n", ++ ind_type, ind_version, ind_length)); ++ ++ _rtw_memmove(&gl_coex_offload.c2h_ind_buf[0], tmpBuf, length); ++ gl_coex_offload.c2h_ind_len = length; ++ ++ /* log */ ++ gl_coex_offload.c2h_ind_record[ind_type].count++; ++ gl_coex_offload.c2h_ind_record[ind_type].status[COL_STATUS_C2H_OK]++; ++ _rtw_memmove(&gl_coex_offload.c2h_ind_record[ind_type].ind_buf[0], tmpBuf, length); ++ gl_coex_offload.c2h_ind_record[ind_type].ind_len = length; ++ ++ gl_coex_offload.c2h_ind_status[COL_STATUS_C2H_OK]++; ++ /*TODO: need to check c2h indication length*/ ++ /* TODO: Notification */ ++ } ++} ++ ++void BT_CoexOffloadC2hCheck(PADAPTER Adapter, u8 *Buffer, u8 Length) ++{ ++#if 0 /*(USE_HAL_MAC_API==1)*/ ++ u8 c2hSubCmdId = 0, c2hAckLen = 0, h2cCmdId = 0, h2cSubCmdId = 0, c2hIndLen = 0; ++ ++ BT_PrintData(Adapter, "[COL], c2h packet:", Length-2, Buffer+2); ++ c2hSubCmdId = (u1Byte)C2H_HDR_GET_C2H_SUB_CMD_ID(Buffer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], c2hSubCmdId = 0x%x\n", c2hSubCmdId)); ++ ++ if (c2hSubCmdId == C2H_SUB_CMD_ID_H2C_ACK_HDR || ++ c2hSubCmdId == C2H_SUB_CMD_ID_BT_COEX_INFO) { ++ if (c2hSubCmdId == C2H_SUB_CMD_ID_H2C_ACK_HDR) { ++ /* coex c2h ack */ ++ h2cCmdId = (u1Byte)H2C_ACK_HDR_GET_H2C_CMD_ID(Buffer); ++ h2cSubCmdId = (u1Byte)H2C_ACK_HDR_GET_H2C_SUB_CMD_ID(Buffer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], h2cCmdId/ h2cSubCmdId = 0x%x/ 0x%x\n", h2cCmdId, h2cSubCmdId)); ++ if (h2cCmdId == 0xff && h2cSubCmdId == 0x60) { ++ c2hAckLen = (u1Byte)C2H_HDR_GET_LEN(Buffer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], c2hAckLen = 0x%x\n", c2hAckLen)); ++ if (c2hAckLen >= 8) ++ BT_CoexOffloadC2hAckCheck(Adapter, &Buffer[12], (u1Byte)(c2hAckLen-8)); ++ else ++ BT_CoexOffloadRecordErrC2hAck(Adapter); ++ } ++ } else if (c2hSubCmdId == C2H_SUB_CMD_ID_BT_COEX_INFO) { ++ /* coex c2h indication */ ++ c2hIndLen = (u1Byte)C2H_HDR_GET_LEN(Buffer); ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[COL], c2hAckLen = 0x%x\n", c2hIndLen)); ++ BT_CoexOffloadC2hIndCheck(Adapter, &Buffer[4], (u1Byte)c2hIndLen); ++ } ++ } ++#endif ++} ++#endif ++ + //==================================== + // Extern functions called by other module + //==================================== ++u8 EXhalbtcoutsrc_IsTfbgaPackageType(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++#ifdef CONFIG_RTL8723B ++ if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA80) ++ || (pHalData->PackageType == PACKAGE_TFBGA90)) { ++ return _TRUE; ++ } ++#endif ++ ++ return _FALSE; ++} ++ + u8 EXhalbtcoutsrc_BindBtCoexWithAdapter(void *padapter) + { + PBTC_COEXIST pBtCoexist=&GLBtCoexist; +@@ -1472,7 +2096,7 @@ u8 EXhalbtcoutsrc_BindBtCoexWithAdapter(void *padapter) + + pBtCoexist->Adapter = padapter; + +- pBtCoexist->stackInfo.bProfileNotified = _FALSE; ++ pBtCoexist->stack_info.profile_notified = _FALSE; + + pBtCoexist->btInfo.bBtCtrlAggBufSize = _FALSE; + pBtCoexist->btInfo.aggBufSize = 5; +@@ -1487,7 +2111,17 @@ u8 EXhalbtcoutsrc_BindBtCoexWithAdapter(void *padapter) + EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_PG, antNum); + #endif + // set default antenna position to main port +- pBtCoexist->boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; ++ pBtCoexist->board_info.btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; ++ ++ pBtCoexist->board_info.btdm_ant_det_finish = _FALSE; ++ pBtCoexist->board_info.btdm_ant_num_by_ant_det = 1; ++ ++ pBtCoexist->board_info.tfbga_package = EXhalbtcoutsrc_IsTfbgaPackageType((PADAPTER)padapter); ++ ++ if (pBtCoexist->board_info.tfbga_package) ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Package Type = TFBGA\n")); ++ else ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Package Type = Non-TFBGA\n")); + + return _TRUE; + } +@@ -1500,44 +2134,48 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) + + halbtcoutsrc_DbgInit(); + ++ halbtcoutsrc_coex_offload_init(); ++ + #ifdef CONFIG_PCI_HCI +- pBtCoexist->chipInterface = BTC_INTF_PCI; ++ pBtCoexist->chip_interface = BTC_INTF_PCI; + #elif defined(CONFIG_USB_HCI) +- pBtCoexist->chipInterface = BTC_INTF_USB; ++ pBtCoexist->chip_interface = BTC_INTF_USB; + #elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +- pBtCoexist->chipInterface = BTC_INTF_SDIO; ++ pBtCoexist->chip_interface = BTC_INTF_SDIO; + #else +- pBtCoexist->chipInterface = BTC_INTF_UNKNOWN; ++ pBtCoexist->chip_interface = BTC_INTF_UNKNOWN; + #endif + + EXhalbtcoutsrc_BindBtCoexWithAdapter(padapter); + +- pBtCoexist->fBtcRead1Byte = halbtcoutsrc_Read1Byte; +- pBtCoexist->fBtcWrite1Byte = halbtcoutsrc_Write1Byte; +- pBtCoexist->fBtcWrite1ByteBitMask = halbtcoutsrc_BitMaskWrite1Byte; +- pBtCoexist->fBtcRead2Byte = halbtcoutsrc_Read2Byte; +- pBtCoexist->fBtcWrite2Byte = halbtcoutsrc_Write2Byte; +- pBtCoexist->fBtcRead4Byte = halbtcoutsrc_Read4Byte; +- pBtCoexist->fBtcWrite4Byte = halbtcoutsrc_Write4Byte; +- pBtCoexist->fBtcWriteLocalReg1Byte = halbtcoutsrc_WriteLocalReg1Byte; ++ pBtCoexist->btc_read_1byte = halbtcoutsrc_Read1Byte; ++ pBtCoexist->btc_write_1byte = halbtcoutsrc_Write1Byte; ++ pBtCoexist->btc_write_1byte_bitmask = halbtcoutsrc_BitMaskWrite1Byte; ++ pBtCoexist->btc_read_2byte = halbtcoutsrc_Read2Byte; ++ pBtCoexist->btc_write_2byte = halbtcoutsrc_Write2Byte; ++ pBtCoexist->btc_read_4byte = halbtcoutsrc_Read4Byte; ++ pBtCoexist->btc_write_4byte = halbtcoutsrc_Write4Byte; ++ pBtCoexist->btc_write_local_reg_1byte = halbtcoutsrc_WriteLocalReg1Byte; + +- pBtCoexist->fBtcSetBbReg = halbtcoutsrc_SetBbReg; +- pBtCoexist->fBtcGetBbReg = halbtcoutsrc_GetBbReg; ++ pBtCoexist->btc_set_bb_reg = halbtcoutsrc_SetBbReg; ++ pBtCoexist->btc_get_bb_reg = halbtcoutsrc_GetBbReg; + +- pBtCoexist->fBtcSetRfReg = halbtcoutsrc_SetRfReg; +- pBtCoexist->fBtcGetRfReg = halbtcoutsrc_GetRfReg; ++ pBtCoexist->btc_set_rf_reg = halbtcoutsrc_SetRfReg; ++ pBtCoexist->btc_get_rf_reg = halbtcoutsrc_GetRfReg; + +- pBtCoexist->fBtcFillH2c = halbtcoutsrc_FillH2cCmd; +- pBtCoexist->fBtcDispDbgMsg = halbtcoutsrc_DisplayDbgMsg; ++ pBtCoexist->btc_fill_h2c = halbtcoutsrc_FillH2cCmd; ++ pBtCoexist->btc_disp_dbg_msg = halbtcoutsrc_DisplayDbgMsg; + +- pBtCoexist->fBtcGet = halbtcoutsrc_Get; +- pBtCoexist->fBtcSet = halbtcoutsrc_Set; +- pBtCoexist->fBtcGetBtReg = halbtcoutsrc_GetBtReg; +- pBtCoexist->fBtcSetBtReg = halbtcoutsrc_SetBtReg; ++ pBtCoexist->btc_get = halbtcoutsrc_Get; ++ pBtCoexist->btc_set = halbtcoutsrc_Set; ++ pBtCoexist->btc_get_bt_reg = halbtcoutsrc_GetBtReg; ++ pBtCoexist->btc_set_bt_reg = halbtcoutsrc_SetBtReg; ++ pBtCoexist->btc_set_bt_ant_detection = halbtcoutsrc_SetBtAntDetection; ++ pBtCoexist->btc_coex_h2c_process = halbtcoutsrc_CoexH2cProcess; + +- pBtCoexist->cliBuf = &GLBtcDbgBuf[0]; ++ pBtCoexist->cli_buf = &GLBtcDbgBuf[0]; + +- pBtCoexist->boardInfo.singleAntPath = 0; ++ pBtCoexist->board_info.single_ant_path = 0; + + GLBtcWiFiInScanState = _FALSE; + +@@ -1549,6 +2187,19 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) + + GLBtcBtCoexAliveRegistered = _FALSE; + ++ /* BT Control H2C/C2H*/ ++ GLBtcBtMpOperSeq = 0; ++ _rtw_mutex_init(&GLBtcBtMpOperLock); ++ _init_timer(&GLBtcBtMpOperTimer, ((PADAPTER)padapter)->pnetdev, _btmpoper_timer_hdl, pBtCoexist); ++ _rtw_init_sema(&GLBtcBtMpRptSema, 0); ++ GLBtcBtMpRptSeq = 0; ++ GLBtcBtMpRptStatus = 0; ++ _rtw_memset(GLBtcBtMpRptRsp, 0, C2H_MAX_SIZE); ++ GLBtcBtMpRptRspSize = 0; ++ GLBtcBtMpRptWait = 0; ++ GLBtcBtMpRptWiFiOK = 0; ++ GLBtcBtMpRptBTOK = 0; ++ + return _TRUE; + } + +@@ -1560,10 +2211,10 @@ void EXhalbtcoutsrc_PowerOnSetting(PBTC_COEXIST pBtCoexist) + /* Power on setting function is only added in 8723B currently */ + if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_PowerOnSetting(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_PowerOnSetting(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_power_on_setting(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_power_on_setting(pBtCoexist); + } + } + +@@ -1576,14 +2227,14 @@ void EXhalbtcoutsrc_PreLoadFirmware(PBTC_COEXIST pBtCoexist) + + if(IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if(pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_PreLoadFirmware(pBtCoexist); +- else if(pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_PreLoadFirmware(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_pre_load_firmware(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_pre_load_firmware(pBtCoexist); + } + } + +-void EXhalbtcoutsrc_InitHwConfig(PBTC_COEXIST pBtCoexist, u8 bWifiOnly) ++void EXhalbtcoutsrc_init_hw_config(PBTC_COEXIST pBtCoexist, u8 bWifiOnly) + { + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; +@@ -1593,51 +2244,41 @@ void EXhalbtcoutsrc_InitHwConfig(PBTC_COEXIST pBtCoexist, u8 bWifiOnly) + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_InitHwConfig(pBtCoexist, bWifiOnly); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_InitHwConfig(pBtCoexist, bWifiOnly); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_InitHwConfig(pBtCoexist, bWifiOnly); ++ ex_halbtc8821aCsr2ant_init_hw_config(pBtCoexist, bWifiOnly); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_init_hw_config(pBtCoexist, bWifiOnly); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_init_hw_config(pBtCoexist, bWifiOnly); + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_InitHwConfig(pBtCoexist, bWifiOnly); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_InitHwConfig(pBtCoexist, bWifiOnly); +- } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_InitHwConfig(pBtCoexist, bWifiOnly); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_init_hw_config(pBtCoexist, bWifiOnly); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_init_hw_config(pBtCoexist, bWifiOnly); + } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_InitHwConfig(pBtCoexist, bWifiOnly); +- } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_InitHwConfig(pBtCoexist, bWifiOnly); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_init_hw_config(pBtCoexist, bWifiOnly); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_InitHwConfig(pBtCoexist, bWifiOnly); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_InitHwConfig(pBtCoexist, bWifiOnly); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_init_hw_config(pBtCoexist, bWifiOnly); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_init_hw_config(pBtCoexist, bWifiOnly); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_InitHwConfig(pBtCoexist, bWifiOnly); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_InitHwConfig(pBtCoexist, bWifiOnly); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_init_hw_config(pBtCoexist, bWifiOnly); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_init_hw_config(pBtCoexist, bWifiOnly); + } + } + +-void EXhalbtcoutsrc_InitCoexDm(PBTC_COEXIST pBtCoexist) ++void EXhalbtcoutsrc_init_coex_dm(PBTC_COEXIST pBtCoexist) + { + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; +@@ -1647,53 +2288,43 @@ void EXhalbtcoutsrc_InitCoexDm(PBTC_COEXIST pBtCoexist) + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_InitCoexDm(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_InitCoexDm(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_InitCoexDm(pBtCoexist); ++ ex_halbtc8821aCsr2ant_init_coex_dm(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_init_coex_dm(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_init_coex_dm(pBtCoexist); + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_InitCoexDm(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_InitCoexDm(pBtCoexist); +- } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_InitCoexDm(pBtCoexist); +- } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_InitCoexDm(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_init_coex_dm(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_init_coex_dm(pBtCoexist); + } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_InitCoexDm(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_init_coex_dm(pBtCoexist); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_InitCoexDm(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_InitCoexDm(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_init_coex_dm(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_init_coex_dm(pBtCoexist); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_InitCoexDm(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_InitCoexDm(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_init_coex_dm(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_init_coex_dm(pBtCoexist); + } + +- pBtCoexist->bInitilized = _TRUE; ++ pBtCoexist->initilized = _TRUE; + } + +-void EXhalbtcoutsrc_IpsNotify(PBTC_COEXIST pBtCoexist, u8 type) ++void EXhalbtcoutsrc_ips_notify(PBTC_COEXIST pBtCoexist, u8 type) + { + u8 ipsType; + +@@ -1701,7 +2332,7 @@ void EXhalbtcoutsrc_IpsNotify(PBTC_COEXIST pBtCoexist, u8 type) + return; + + pBtCoexist->statistics.cntIpsNotify++; +- if (pBtCoexist->bManualControl) ++ if (pBtCoexist->manual_control) + return; + + if (IPS_NONE == type) +@@ -1721,53 +2352,43 @@ void EXhalbtcoutsrc_IpsNotify(PBTC_COEXIST pBtCoexist, u8 type) + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_IpsNotify(pBtCoexist, ipsType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_IpsNotify(pBtCoexist, ipsType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_IpsNotify(pBtCoexist, ipsType); ++ ex_halbtc8821aCsr2ant_ips_notify(pBtCoexist, ipsType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_ips_notify(pBtCoexist, ipsType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_ips_notify(pBtCoexist, ipsType); + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_IpsNotify(pBtCoexist, ipsType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_IpsNotify(pBtCoexist, ipsType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_ips_notify(pBtCoexist, ipsType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_ips_notify(pBtCoexist, ipsType); + } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_IpsNotify(pBtCoexist, ipsType); +- } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_IpsNotify(pBtCoexist, ipsType); +- } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_IpsNotify(pBtCoexist, ipsType); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_ips_notify(pBtCoexist, ipsType); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_IpsNotify(pBtCoexist, ipsType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_IpsNotify(pBtCoexist, ipsType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_ips_notify(pBtCoexist, ipsType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_ips_notify(pBtCoexist, ipsType); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_IpsNotify(pBtCoexist, ipsType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_IpsNotify(pBtCoexist, ipsType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_ips_notify(pBtCoexist, ipsType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_ips_notify(pBtCoexist, ipsType); + } + + // halbtcoutsrc_NormalLowPower(pBtCoexist); + } + +-void EXhalbtcoutsrc_LpsNotify(PBTC_COEXIST pBtCoexist, u8 type) ++void EXhalbtcoutsrc_lps_notify(PBTC_COEXIST pBtCoexist, u8 type) + { + u8 lpsType; + +@@ -1776,7 +2397,7 @@ void EXhalbtcoutsrc_LpsNotify(PBTC_COEXIST pBtCoexist, u8 type) + return; + + pBtCoexist->statistics.cntLpsNotify++; +- if (pBtCoexist->bManualControl) ++ if (pBtCoexist->manual_control) + return; + + if (PS_MODE_ACTIVE == type) +@@ -1793,58 +2414,48 @@ void EXhalbtcoutsrc_LpsNotify(PBTC_COEXIST pBtCoexist, u8 type) + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_LpsNotify(pBtCoexist, lpsType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_LpsNotify(pBtCoexist, lpsType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_LpsNotify(pBtCoexist, lpsType); ++ ex_halbtc8821aCsr2ant_lps_notify(pBtCoexist, lpsType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_lps_notify(pBtCoexist, lpsType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_lps_notify(pBtCoexist, lpsType); + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_LpsNotify(pBtCoexist, lpsType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_LpsNotify(pBtCoexist, lpsType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_lps_notify(pBtCoexist, lpsType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_lps_notify(pBtCoexist, lpsType); + } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_LpsNotify(pBtCoexist, lpsType); +- } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_LpsNotify(pBtCoexist, lpsType); +- } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_LpsNotify(pBtCoexist, lpsType); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_lps_notify(pBtCoexist, lpsType); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_LpsNotify(pBtCoexist, lpsType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_LpsNotify(pBtCoexist, lpsType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_lps_notify(pBtCoexist, lpsType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_lps_notify(pBtCoexist, lpsType); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_LpsNotify(pBtCoexist, lpsType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_LpsNotify(pBtCoexist, lpsType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_lps_notify(pBtCoexist, lpsType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_lps_notify(pBtCoexist, lpsType); + } + } + +-void EXhalbtcoutsrc_ScanNotify(PBTC_COEXIST pBtCoexist, u8 type) ++void EXhalbtcoutsrc_scan_notify(PBTC_COEXIST pBtCoexist, u8 type) + { + u8 scanType; + + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; + pBtCoexist->statistics.cntScanNotify++; +- if (pBtCoexist->bManualControl) ++ if (pBtCoexist->manual_control) + return; + + if (type) +@@ -1864,60 +2475,50 @@ void EXhalbtcoutsrc_ScanNotify(PBTC_COEXIST pBtCoexist, u8 type) + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_ScanNotify(pBtCoexist, scanType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_ScanNotify(pBtCoexist, scanType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_ScanNotify(pBtCoexist, scanType); ++ ex_halbtc8821aCsr2ant_scan_notify(pBtCoexist, scanType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_scan_notify(pBtCoexist, scanType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_scan_notify(pBtCoexist, scanType); + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_ScanNotify(pBtCoexist, scanType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_ScanNotify(pBtCoexist, scanType); +- } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_ScanNotify(pBtCoexist, scanType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_scan_notify(pBtCoexist, scanType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_scan_notify(pBtCoexist, scanType); + } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_ScanNotify(pBtCoexist, scanType); +- } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_ScanNotify(pBtCoexist, scanType); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_scan_notify(pBtCoexist, scanType); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_ScanNotify(pBtCoexist, scanType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_ScanNotify(pBtCoexist, scanType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_scan_notify(pBtCoexist, scanType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_scan_notify(pBtCoexist, scanType); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_ScanNotify(pBtCoexist, scanType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_ScanNotify(pBtCoexist, scanType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_scan_notify(pBtCoexist, scanType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_scan_notify(pBtCoexist, scanType); + } + + // halbtcoutsrc_NormalLowPower(pBtCoexist); + } + +-void EXhalbtcoutsrc_ConnectNotify(PBTC_COEXIST pBtCoexist, u8 action) ++void EXhalbtcoutsrc_connect_notify(PBTC_COEXIST pBtCoexist, u8 action) + { + u8 assoType; + + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; + pBtCoexist->statistics.cntConnectNotify++; +- if (pBtCoexist->bManualControl) ++ if (pBtCoexist->manual_control) + return; + + if (action) +@@ -1931,53 +2532,43 @@ void EXhalbtcoutsrc_ConnectNotify(PBTC_COEXIST pBtCoexist, u8 action) + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_ConnectNotify(pBtCoexist, assoType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_ConnectNotify(pBtCoexist, assoType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_ConnectNotify(pBtCoexist, assoType); ++ ex_halbtc8821aCsr2ant_connect_notify(pBtCoexist, assoType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_connect_notify(pBtCoexist, assoType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_connect_notify(pBtCoexist, assoType); + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_ConnectNotify(pBtCoexist, assoType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_ConnectNotify(pBtCoexist, assoType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_connect_notify(pBtCoexist, assoType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_connect_notify(pBtCoexist, assoType); + } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_ConnectNotify(pBtCoexist, assoType); +- } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_ConnectNotify(pBtCoexist, assoType); +- } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_ConnectNotify(pBtCoexist, assoType); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_connect_notify(pBtCoexist, assoType); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_ConnectNotify(pBtCoexist, assoType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_ConnectNotify(pBtCoexist, assoType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_connect_notify(pBtCoexist, assoType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_connect_notify(pBtCoexist, assoType); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_ConnectNotify(pBtCoexist, assoType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_ConnectNotify(pBtCoexist, assoType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_connect_notify(pBtCoexist, assoType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_connect_notify(pBtCoexist, assoType); + } + + // halbtcoutsrc_NormalLowPower(pBtCoexist); + } + +-void EXhalbtcoutsrc_MediaStatusNotify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS mediaStatus) ++void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS mediaStatus) + { + u8 mStatus; + +@@ -1985,7 +2576,7 @@ void EXhalbtcoutsrc_MediaStatusNotify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS m + return; + + pBtCoexist->statistics.cntMediaStatusNotify++; +- if (pBtCoexist->bManualControl) ++ if (pBtCoexist->manual_control) + return; + + if (RT_MEDIA_CONNECT == mediaStatus) +@@ -1999,60 +2590,50 @@ void EXhalbtcoutsrc_MediaStatusNotify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS m + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, mStatus); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_MediaStatusNotify(pBtCoexist, mStatus); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_MediaStatusNotify(pBtCoexist, mStatus); ++ ex_halbtc8821aCsr2ant_media_status_notify(pBtCoexist, mStatus); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_media_status_notify(pBtCoexist, mStatus); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_media_status_notify(pBtCoexist, mStatus); + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, mStatus); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_MediaStatusNotify(pBtCoexist, mStatus); +- } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_MediaStatusNotify(pBtCoexist, mStatus); +- } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_MediaStatusNotify(pBtCoexist, mStatus); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_media_status_notify(pBtCoexist, mStatus); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_media_status_notify(pBtCoexist, mStatus); + } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_MediaStatusNotify(pBtCoexist, mStatus); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_media_status_notify(pBtCoexist, mStatus); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_MediaStatusNotify(pBtCoexist, mStatus); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_MediaStatusNotify(pBtCoexist, mStatus); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_media_status_notify(pBtCoexist, mStatus); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_media_status_notify(pBtCoexist, mStatus); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_MediaStatusNotify(pBtCoexist, mStatus); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_MediaStatusNotify(pBtCoexist, mStatus); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_media_status_notify(pBtCoexist, mStatus); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_media_status_notify(pBtCoexist, mStatus); + } + + // halbtcoutsrc_NormalLowPower(pBtCoexist); + } + +-void EXhalbtcoutsrc_SpecialPacketNotify(PBTC_COEXIST pBtCoexist, u8 pktType) ++void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType) + { + u8 packetType; + + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; +- pBtCoexist->statistics.cntSpecialPacketNotify++; +- if (pBtCoexist->bManualControl) ++ pBtCoexist->statistics.cntSpecificPacketNotify++; ++ if (pBtCoexist->manual_control) + return; + + if (PACKET_DHCP == pktType) +@@ -2073,53 +2654,43 @@ void EXhalbtcoutsrc_SpecialPacketNotify(PBTC_COEXIST pBtCoexist, u8 pktType) + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_SpecialPacketNotify(pBtCoexist, packetType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_SpecialPacketNotify(pBtCoexist, packetType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_SpecialPacketNotify(pBtCoexist, packetType); ++ ex_halbtc8821aCsr2ant_specific_packet_notify(pBtCoexist, packetType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_specific_packet_notify(pBtCoexist, packetType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_specific_packet_notify(pBtCoexist, packetType); + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_SpecialPacketNotify(pBtCoexist, packetType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_SpecialPacketNotify(pBtCoexist, packetType); +- } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_SpecialPacketNotify(pBtCoexist, packetType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_specific_packet_notify(pBtCoexist, packetType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_specific_packet_notify(pBtCoexist, packetType); + } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_SpecialPacketNotify(pBtCoexist, packetType); +- } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_SpecialPacketNotify(pBtCoexist, packetType); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_specific_packet_notify(pBtCoexist, packetType); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_SpecialPacketNotify(pBtCoexist, packetType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_SpecialPacketNotify(pBtCoexist, packetType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_specific_packet_notify(pBtCoexist, packetType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_specific_packet_notify(pBtCoexist, packetType); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_SpecialPacketNotify(pBtCoexist, packetType); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_SpecialPacketNotify(pBtCoexist, packetType); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_specific_packet_notify(pBtCoexist, packetType); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_specific_packet_notify(pBtCoexist, packetType); + } + + // halbtcoutsrc_NormalLowPower(pBtCoexist); + } + +-void EXhalbtcoutsrc_BtInfoNotify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 length) ++void EXhalbtcoutsrc_bt_info_notify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 length) + { + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; +@@ -2132,47 +2703,37 @@ void EXhalbtcoutsrc_BtInfoNotify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 length) + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_BtInfoNotify(pBtCoexist, tmpBuf, length); ++ ex_halbtc8821aCsr2ant_bt_info_notify(pBtCoexist, tmpBuf, length); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_bt_info_notify(pBtCoexist, tmpBuf, length); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_bt_info_notify(pBtCoexist, tmpBuf, length); + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_BtInfoNotify(pBtCoexist, tmpBuf, length); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_bt_info_notify(pBtCoexist, tmpBuf, length); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_bt_info_notify(pBtCoexist, tmpBuf, length); + } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); +- } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); +- } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_bt_info_notify(pBtCoexist, tmpBuf, length); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_BtInfoNotify(pBtCoexist, tmpBuf, length); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_bt_info_notify(pBtCoexist, tmpBuf, length); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_bt_info_notify(pBtCoexist, tmpBuf, length); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_BtInfoNotify(pBtCoexist, tmpBuf, length); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_bt_info_notify(pBtCoexist, tmpBuf, length); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_bt_info_notify(pBtCoexist, tmpBuf, length); + } + + // halbtcoutsrc_NormalLowPower(pBtCoexist); +@@ -2193,8 +2754,13 @@ EXhalbtcoutsrc_RfStatusNotify( + } + else if(IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if(pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_RfStatusNotify(pBtCoexist, type); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_rf_status_notify(pBtCoexist, type); ++ } ++ else if(IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) ++ { ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_rf_status_notify(pBtCoexist, type); + } + else if(IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +@@ -2212,7 +2778,7 @@ void EXhalbtcoutsrc_StackOperationNotify(PBTC_COEXIST pBtCoexist, u8 type) + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; + pBtCoexist->statistics.cntStackOperationNotify++; +- if (pBtCoexist->bManualControl) ++ if (pBtCoexist->manual_control) + return; + + if ((HCI_BT_OP_INQUIRY_START == type) || +@@ -2233,15 +2799,10 @@ void EXhalbtcoutsrc_StackOperationNotify(PBTC_COEXIST pBtCoexist, u8 type) + stackOpType = BTC_STACK_OP_NONE; + } + +- if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_StackOperationNotify(pBtCoexist, stackOpType); +- } + #endif + } + +-void EXhalbtcoutsrc_HaltNotify(PBTC_COEXIST pBtCoexist) ++void EXhalbtcoutsrc_halt_notify(PBTC_COEXIST pBtCoexist) + { + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; +@@ -2249,49 +2810,37 @@ void EXhalbtcoutsrc_HaltNotify(PBTC_COEXIST pBtCoexist) + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_HaltNotify(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_HaltNotify(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_HaltNotify(pBtCoexist); ++ ex_halbtc8821aCsr2ant_halt_notify(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_halt_notify(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_halt_notify(pBtCoexist); + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_HaltNotify(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_HaltNotify(pBtCoexist); +- } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_HaltNotify(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723a1ant_HaltNotify(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_halt_notify(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_halt_notify(pBtCoexist); + } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_HaltNotify(pBtCoexist); +- } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_HaltNotify(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_halt_notify(pBtCoexist); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_HaltNotify(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_HaltNotify(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_halt_notify(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_halt_notify(pBtCoexist); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_HaltNotify(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_HaltNotify(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_halt_notify(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_halt_notify(pBtCoexist); + } + + pBtCoexist->bBinded = FALSE; +@@ -2301,18 +2850,15 @@ void EXhalbtcoutsrc_SwitchBtTRxMask(PBTC_COEXIST pBtCoexist) + { + if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- { ++ if (pBtCoexist->board_info.btdm_ant_num == 2) { + halbtcoutsrc_SetBtReg(pBtCoexist, 0, 0x3c, 0x01); //BT goto standby while GNT_BT 1-->0 +- } +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- { ++ } else if (pBtCoexist->board_info.btdm_ant_num == 1) { + halbtcoutsrc_SetBtReg(pBtCoexist, 0, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 + } + } + } + +-void EXhalbtcoutsrc_PnpNotify(PBTC_COEXIST pBtCoexist, u8 pnpState) ++void EXhalbtcoutsrc_pnp_notify(PBTC_COEXIST pBtCoexist, u8 pnpState) + { + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; +@@ -2324,29 +2870,42 @@ void EXhalbtcoutsrc_PnpNotify(PBTC_COEXIST pBtCoexist, u8 pnpState) + + if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_PnpNotify(pBtCoexist,pnpState); +- else if(pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_PnpNotify(pBtCoexist,pnpState); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_pnp_notify(pBtCoexist, pnpState); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_pnp_notify(pBtCoexist, pnpState); ++ } ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) ++ { ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_pnp_notify(pBtCoexist, pnpState); + } + else if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_PnpNotify(pBtCoexist, pnpState); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_PnpNotify(pBtCoexist,pnpState); +- else if(pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_PnpNotify(pBtCoexist,pnpState); ++ ex_halbtc8821aCsr2ant_pnp_notify(pBtCoexist, pnpState); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_pnp_notify(pBtCoexist, pnpState); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_pnp_notify(pBtCoexist, pnpState); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_PnpNotify(pBtCoexist, pnpState); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_pnp_notify(pBtCoexist, pnpState); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_PnpNotify(pBtCoexist, pnpState); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_pnp_notify(pBtCoexist, pnpState); ++ } ++} ++ ++void EXhalbtcoutsrc_ScoreBoardStatusNotify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 length) ++{ ++ if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_ScoreBoardStatusNotify(pBtCoexist, tmpBuf, length); + } + } + +@@ -2360,21 +2919,21 @@ void EXhalbtcoutsrc_CoexDmSwitch(PBTC_COEXIST pBtCoexist) + + if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 1) ++ if (pBtCoexist->board_info.btdm_ant_num == 1) + { +- pBtCoexist->bStopCoexDm = TRUE; +- EXhalbtc8723b1ant_CoexDmReset(pBtCoexist); ++ pBtCoexist->stop_coex_dm = TRUE; ++ ex_halbtc8723b1ant_coex_dm_reset(pBtCoexist); + EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_DETECTED, 2); +- EXhalbtc8723b2ant_InitHwConfig(pBtCoexist, FALSE); +- EXhalbtc8723b2ant_InitCoexDm(pBtCoexist); +- pBtCoexist->bStopCoexDm = FALSE; ++ ex_halbtc8723b2ant_init_hw_config(pBtCoexist, FALSE); ++ ex_halbtc8723b2ant_init_coex_dm(pBtCoexist); ++ pBtCoexist->stop_coex_dm = FALSE; + } + } + + halbtcoutsrc_NormalLowPower(pBtCoexist); + } + +-void EXhalbtcoutsrc_Periodical(PBTC_COEXIST pBtCoexist) ++void EXhalbtcoutsrc_periodical(PBTC_COEXIST pBtCoexist) + { + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; +@@ -2387,63 +2946,48 @@ void EXhalbtcoutsrc_Periodical(PBTC_COEXIST pBtCoexist) + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_Periodical(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_Periodical(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) ++ ex_halbtc8821aCsr2ant_periodical(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_periodical(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) + { + if (!halbtcoutsrc_UnderIps(pBtCoexist)) + { +- EXhalbtc8821a1ant_Periodical(pBtCoexist); ++ ex_halbtc8821a1ant_periodical(pBtCoexist); + } + } + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_Periodical(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_Periodical(pBtCoexist); +- } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_Periodical(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- { +- if (!halbtcoutsrc_UnderIps(pBtCoexist)) +- EXhalbtc8723a1ant_Periodical(pBtCoexist); +- } +- } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_Periodical(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_periodical(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_periodical(pBtCoexist); + } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_Periodical(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_periodical(pBtCoexist); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_Periodical(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_Periodical(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_periodical(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_periodical(pBtCoexist); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_Periodical(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_Periodical(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_periodical(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_periodical(pBtCoexist); + } + + // halbtcoutsrc_NormalLowPower(pBtCoexist); + } + +-void EXhalbtcoutsrc_DbgControl(PBTC_COEXIST pBtCoexist, u8 opCode, u8 opLen, u8 *pData) ++void EXhalbtcoutsrc_dbg_control(PBTC_COEXIST pBtCoexist, u8 opCode, u8 opLen, u8 *pData) + { + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; +@@ -2456,15 +3000,15 @@ void EXhalbtcoutsrc_DbgControl(PBTC_COEXIST pBtCoexist, u8 opCode, u8 opLen, u8 + + if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_DbgControl(pBtCoexist, opCode, opLen, pData); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_dbg_control(pBtCoexist, opCode, opLen, pData); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_DbgControl(pBtCoexist, opCode, opLen, pData); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_DbgControl(pBtCoexist, opCode, opLen, pData); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_dbg_control(pBtCoexist, opCode, opLen, pData); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_dbg_control(pBtCoexist, opCode, opLen, pData); + } + + // halbtcoutsrc_NormalLowPower(pBtCoexist); +@@ -2491,8 +3035,8 @@ EXhalbtcoutsrc_AntennaDetection( + + if(IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if(pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_AntennaDetection(pBtCoexist, centFreq, offset, span, seconds); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_AntennaDetection(pBtCoexist, centFreq, offset, span, seconds); + } + + //IPSReturn(pBtCoexist->Adapter, 0xff); +@@ -2501,62 +3045,62 @@ EXhalbtcoutsrc_AntennaDetection( + + void EXhalbtcoutsrc_StackUpdateProfileInfo(void) + { +-#if 0 ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX + PBTC_COEXIST pBtCoexist = &GLBtCoexist; +- PADAPTER padapter = (PADAPTER)GLBtCoexist.padapter; +- PBT_MGNT pBtMgnt = &padapter->MgntInfo.BtInfo.BtMgnt; ++ PADAPTER padapter = (PADAPTER)GLBtCoexist.Adapter; ++ PBT_MGNT pBtMgnt = &padapter->coex_info.BtMgnt; + u8 i; + + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; + +- pBtCoexist->stackInfo.bProfileNotified = _TRUE; ++ pBtCoexist->stack_info.profile_notified = _TRUE; + +- pBtCoexist->stackInfo.numOfLink = ++ pBtCoexist->stack_info.num_of_link = + pBtMgnt->ExtConfig.NumberOfACL+pBtMgnt->ExtConfig.NumberOfSCO; + + // reset first +- pBtCoexist->stackInfo.bBtLinkExist = _FALSE; +- pBtCoexist->stackInfo.bScoExist = _FALSE; +- pBtCoexist->stackInfo.bAclExist = _FALSE; +- pBtCoexist->stackInfo.bA2dpExist = _FALSE; +- pBtCoexist->stackInfo.bHidExist = _FALSE; +- pBtCoexist->stackInfo.numOfHid = 0; +- pBtCoexist->stackInfo.bPanExist = _FALSE; ++ pBtCoexist->stack_info.bt_link_exist = _FALSE; ++ pBtCoexist->stack_info.sco_exist = _FALSE; ++ pBtCoexist->stack_info.acl_exist = _FALSE; ++ pBtCoexist->stack_info.a2dp_exist = _FALSE; ++ pBtCoexist->stack_info.hid_exist = _FALSE; ++ pBtCoexist->stack_info.num_of_hid = 0; ++ pBtCoexist->stack_info.pan_exist = _FALSE; + + if (!pBtMgnt->ExtConfig.NumberOfACL) +- pBtCoexist->stackInfo.minBtRssi = 0; ++ pBtCoexist->stack_info.min_bt_rssi = 0; + +- if (pBtCoexist->stackInfo.numOfLink) ++ if (pBtCoexist->stack_info.num_of_link) + { +- pBtCoexist->stackInfo.bBtLinkExist = _TRUE; ++ pBtCoexist->stack_info.bt_link_exist = _TRUE; + if (pBtMgnt->ExtConfig.NumberOfSCO) +- pBtCoexist->stackInfo.bScoExist = _TRUE; ++ pBtCoexist->stack_info.sco_exist = _TRUE; + if (pBtMgnt->ExtConfig.NumberOfACL) +- pBtCoexist->stackInfo.bAclExist = _TRUE; ++ pBtCoexist->stack_info.acl_exist = _TRUE; + } + + for (i=0; iExtConfig.NumberOfACL; i++) + { + if (BT_PROFILE_A2DP == pBtMgnt->ExtConfig.aclLink[i].BTProfile) + { +- pBtCoexist->stackInfo.bA2dpExist = _TRUE; ++ pBtCoexist->stack_info.a2dp_exist = _TRUE; + } + else if (BT_PROFILE_PAN == pBtMgnt->ExtConfig.aclLink[i].BTProfile) + { +- pBtCoexist->stackInfo.bPanExist = _TRUE; ++ pBtCoexist->stack_info.pan_exist = _TRUE; + } + else if (BT_PROFILE_HID == pBtMgnt->ExtConfig.aclLink[i].BTProfile) + { +- pBtCoexist->stackInfo.bHidExist = _TRUE; +- pBtCoexist->stackInfo.numOfHid++; ++ pBtCoexist->stack_info.hid_exist = _TRUE; ++ pBtCoexist->stack_info.num_of_hid++; + } + else + { +- pBtCoexist->stackInfo.bUnknownAclExist = _TRUE; ++ pBtCoexist->stack_info.unknown_acl_exist = _TRUE; + } + } +-#endif ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX + } + + void EXhalbtcoutsrc_UpdateMinBtRssi(s8 btRssi) +@@ -2566,7 +3110,7 @@ void EXhalbtcoutsrc_UpdateMinBtRssi(s8 btRssi) + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; + +- pBtCoexist->stackInfo.minBtRssi = btRssi; ++ pBtCoexist->stack_info.min_bt_rssi = btRssi; + } + + void EXhalbtcoutsrc_SetHciVersion(u16 hciVersion) +@@ -2576,7 +3120,7 @@ void EXhalbtcoutsrc_SetHciVersion(u16 hciVersion) + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; + +- pBtCoexist->stackInfo.hciVersion = hciVersion; ++ pBtCoexist->stack_info.hci_version = hciVersion; + } + + void EXhalbtcoutsrc_SetBtPatchVersion(u16 btHciVersion, u16 btPatchVersion) +@@ -2605,22 +3149,22 @@ void EXhalbtcoutsrc_SetChipType(u8 chipType) + case BT_ISSC_3WIRE: + case BT_ACCEL: + case BT_RTL8756: +- GLBtCoexist.boardInfo.btChipType = BTC_CHIP_UNDEF; ++ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_UNDEF; + break; + case BT_CSR_BC4: +- GLBtCoexist.boardInfo.btChipType = BTC_CHIP_CSR_BC4; ++ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_CSR_BC4; + break; + case BT_CSR_BC8: +- GLBtCoexist.boardInfo.btChipType = BTC_CHIP_CSR_BC8; ++ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_CSR_BC8; + break; + case BT_RTL8723A: +- GLBtCoexist.boardInfo.btChipType = BTC_CHIP_RTL8723A; ++ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_RTL8723A; + break; + case BT_RTL8821: +- GLBtCoexist.boardInfo.btChipType = BTC_CHIP_RTL8821; ++ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_RTL8821; + break; + case BT_RTL8723B: +- GLBtCoexist.boardInfo.btChipType = BTC_CHIP_RTL8723B; ++ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_RTL8723B; + break; + } + } +@@ -2629,26 +3173,26 @@ void EXhalbtcoutsrc_SetAntNum(u8 type, u8 antNum) + { + if (BT_COEX_ANT_TYPE_PG == type) + { +- GLBtCoexist.boardInfo.pgAntNum = antNum; +- GLBtCoexist.boardInfo.btdmAntNum = antNum; ++ GLBtCoexist.board_info.pg_ant_num = antNum; ++ GLBtCoexist.board_info.btdm_ant_num = antNum; + #if 0 + //The antenna position: Main (default) or Aux for pgAntNum=2 && btdmAntNum =1 + //The antenna position should be determined by auto-detect mechanism + // The following is assumed to main, and those must be modified if y auto-detect mechanism is ready +- if ((GLBtCoexist.boardInfo.pgAntNum == 2) && (GLBtCoexist.boardInfo.btdmAntNum == 1) ) +- GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; ++ if ((GLBtCoexist.board_info.pg_ant_num == 2) && (GLBtCoexist.board_info.btdm_ant_num == 1)) ++ GLBtCoexist.board_info.btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; + else +- GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; ++ GLBtCoexist.board_info.btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; + #endif + } + else if (BT_COEX_ANT_TYPE_ANTDIV == type) + { +- GLBtCoexist.boardInfo.btdmAntNum = antNum; ++ GLBtCoexist.board_info.btdm_ant_num = antNum; + //GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; + } + else if (BT_COEX_ANT_TYPE_DETECTED == type) + { +- GLBtCoexist.boardInfo.btdmAntNum = antNum; ++ GLBtCoexist.board_info.btdm_ant_num = antNum; + //GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; + } + } +@@ -2658,7 +3202,7 @@ void EXhalbtcoutsrc_SetAntNum(u8 type, u8 antNum) + // + void EXhalbtcoutsrc_SetSingleAntPath(u8 singleAntPath) + { +- GLBtCoexist.boardInfo.singleAntPath = singleAntPath; ++ GLBtCoexist.board_info.single_ant_path = singleAntPath; + } + + void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist) +@@ -2671,58 +3215,43 @@ void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist) + if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) +- EXhalbtc8821aCsr2ant_DisplayCoexInfo(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8821a2ant_DisplayCoexInfo(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8821a1ant_DisplayCoexInfo(pBtCoexist); ++ ex_halbtc8821aCsr2ant_display_coex_info(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8821a2ant_display_coex_info(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8821a1ant_display_coex_info(pBtCoexist); + } + else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723b2ant_DisplayCoexInfo(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_DisplayCoexInfo(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8723b2ant_display_coex_info(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_display_coex_info(pBtCoexist); + } +- else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) ++ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8723a2ant_DisplayCoexInfo(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723a1ant_DisplayCoexInfo(pBtCoexist); +- } +- else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8188c2ant_DisplayCoexInfo(pBtCoexist); +- } +- else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) +- { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192d2ant_DisplayCoexInfo(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8703b1ant_display_coex_info(pBtCoexist); + } + else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8192e2ant_DisplayCoexInfo(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8192e1ant_DisplayCoexInfo(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8192e2ant_display_coex_info(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8192e1ant_display_coex_info(pBtCoexist); + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { +- if (pBtCoexist->boardInfo.btdmAntNum == 2) +- EXhalbtc8812a2ant_DisplayCoexInfo(pBtCoexist); +- else if (pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8812a1ant_DisplayCoexInfo(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_display_coex_info(pBtCoexist); ++ else if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8812a1ant_display_coex_info(pBtCoexist); + } + + halbtcoutsrc_NormalLowPower(pBtCoexist); + } + +-VOID +-EXhalbtcoutsrc_DisplayAntIsolation( +- IN PBTC_COEXIST pBtCoexist +- ) ++void EXhalbtcoutsrc_DisplayAntDetection(PBTC_COEXIST pBtCoexist) + { + if(!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; +@@ -2731,14 +3260,24 @@ EXhalbtcoutsrc_DisplayAntIsolation( + + if(IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { +- if(pBtCoexist->boardInfo.btdmAntNum == 1) +- EXhalbtc8723b1ant_DisplayAntIsolation(pBtCoexist); ++ if (pBtCoexist->board_info.btdm_ant_num == 1) ++ ex_halbtc8723b1ant_display_ant_detection(pBtCoexist); + } + + halbtcoutsrc_NormalLowPower(pBtCoexist); + } + +-static void halbt_InitHwConfig92C(PADAPTER padapter) ++void EXhalbtcoutsrc_BTOffOnNotify(PBTC_COEXIST pBtCoexist, u8 bBTON) ++{ ++#if 0 /* Jenyu Need commit to windows' SVN */ ++ if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { ++ if (pBtCoexist->board_info.btdm_ant_num == 2) ++ ex_halbtc8812a2ant_bt_off_on_notify(pBtCoexist, (bBTON == _TRUE)?BTC_BT_ON:BTC_BT_OFF); ++ } ++#endif ++} ++ ++static void halbt_init_hw_config92C(PADAPTER padapter) + { + PHAL_DATA_TYPE pHalData; + u8 u1Tmp; +@@ -2764,7 +3303,7 @@ static void halbt_InitHwConfig92C(PADAPTER padapter) + } + } + +-static void halbt_InitHwConfig92D(PADAPTER padapter) ++static void halbt_init_hw_config92D(PADAPTER padapter) + { + PHAL_DATA_TYPE pHalData; + u8 u1Tmp; +@@ -2907,47 +3446,38 @@ void hal_btcoex_InitHwConfig(PADAPTER padapter, u8 bWifiOnly) + if (!hal_btcoex_IsBtExist(padapter)) + return; + +- if (IS_HARDWARE_TYPE_8192C(padapter)) +- { +- halbt_InitHwConfig92C(padapter); +- } +- else if(IS_HARDWARE_TYPE_8192D(padapter)) +- { +- halbt_InitHwConfig92D(padapter); +- } +- +- EXhalbtcoutsrc_InitHwConfig(&GLBtCoexist, bWifiOnly); +- EXhalbtcoutsrc_InitCoexDm(&GLBtCoexist); ++ EXhalbtcoutsrc_init_hw_config(&GLBtCoexist, bWifiOnly); ++ EXhalbtcoutsrc_init_coex_dm(&GLBtCoexist); + } + + void hal_btcoex_IpsNotify(PADAPTER padapter, u8 type) + { +- EXhalbtcoutsrc_IpsNotify(&GLBtCoexist, type); ++ EXhalbtcoutsrc_ips_notify(&GLBtCoexist, type); + } + + void hal_btcoex_LpsNotify(PADAPTER padapter, u8 type) + { +- EXhalbtcoutsrc_LpsNotify(&GLBtCoexist, type); ++ EXhalbtcoutsrc_lps_notify(&GLBtCoexist, type); + } + + void hal_btcoex_ScanNotify(PADAPTER padapter, u8 type) + { +- EXhalbtcoutsrc_ScanNotify(&GLBtCoexist, type); ++ EXhalbtcoutsrc_scan_notify(&GLBtCoexist, type); + } + + void hal_btcoex_ConnectNotify(PADAPTER padapter, u8 action) + { +- EXhalbtcoutsrc_ConnectNotify(&GLBtCoexist, action); ++ EXhalbtcoutsrc_connect_notify(&GLBtCoexist, action); + } + + void hal_btcoex_MediaStatusNotify(PADAPTER padapter, u8 mediaStatus) + { +- EXhalbtcoutsrc_MediaStatusNotify(&GLBtCoexist, mediaStatus); ++ EXhalbtcoutsrc_media_status_notify(&GLBtCoexist, mediaStatus); + } + + void hal_btcoex_SpecialPacketNotify(PADAPTER padapter, u8 pktType) + { +- EXhalbtcoutsrc_SpecialPacketNotify(&GLBtCoexist, pktType); ++ EXhalbtcoutsrc_specific_packet_notify(&GLBtCoexist, pktType); + } + + void hal_btcoex_IQKNotify(PADAPTER padapter, u8 state) +@@ -2960,7 +3490,46 @@ void hal_btcoex_BtInfoNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) + if (GLBtcWiFiInIQKState == _TRUE) + return; + +- EXhalbtcoutsrc_BtInfoNotify(&GLBtCoexist, tmpBuf, length); ++ EXhalbtcoutsrc_bt_info_notify(&GLBtCoexist, tmpBuf, length); ++} ++ ++void hal_btcoex_BtMpRptNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) ++{ ++ u8 extid, status, len, seq; ++ ++ ++ if (!GLBtcBtMpRptWait) ++ return; ++ ++ if ((length < 3) || (!tmpBuf)) ++ return; ++ ++ extid = tmpBuf[0]; ++ /* not response from BT FW then exit*/ ++ switch (extid) { ++ case C2H_WIFI_FW_ACTIVE_RSP: ++ GLBtcBtMpRptWiFiOK = 1; ++ return; ++ ++ case C2H_TRIG_BY_BT_FW: ++ _cancel_timer_ex(&GLBtcBtMpOperTimer); ++ GLBtcBtMpRptWait = 0; ++ GLBtcBtMpRptBTOK = 1; ++ break; ++ ++ default: ++ return; ++ } ++ ++ status = tmpBuf[1] & 0xF; ++ len = tmpBuf[1] >> 4; ++ seq = tmpBuf[2] >> 4; ++ ++ GLBtcBtMpRptSeq = seq; ++ GLBtcBtMpRptStatus = status; ++ _rtw_memcpy(GLBtcBtMpRptRsp, tmpBuf+3, len); ++ GLBtcBtMpRptRspSize = len; ++ _rtw_up_sema(&GLBtcBtMpRptSema); + } + + void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state) +@@ -2970,12 +3539,17 @@ void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state) + else + state = BTC_WIFI_PNP_WAKE_UP; + +- EXhalbtcoutsrc_PnpNotify(&GLBtCoexist, state); ++ EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, state); + } + + void hal_btcoex_HaltNotify(PADAPTER padapter) + { +- EXhalbtcoutsrc_HaltNotify(&GLBtCoexist); ++ EXhalbtcoutsrc_halt_notify(&GLBtCoexist); ++} ++ ++void hal_btcoex_ScoreBoardStatusNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) ++{ ++ EXhalbtcoutsrc_ScoreBoardStatusNotify(&GLBtCoexist, tmpBuf, length); + } + + void hal_btcoex_SwitchBtTRxMask(PADAPTER padapter) +@@ -2985,7 +3559,12 @@ void hal_btcoex_SwitchBtTRxMask(PADAPTER padapter) + + void hal_btcoex_Hanlder(PADAPTER padapter) + { +- EXhalbtcoutsrc_Periodical(&GLBtCoexist); ++ EXhalbtcoutsrc_periodical(&GLBtCoexist); ++} ++ ++s32 hal_btcoex_IsBTCoexRejectAMPDU(PADAPTER padapter) ++{ ++ return (s32)GLBtCoexist.btInfo.bRejectAggPkt; + } + + s32 hal_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER padapter) +@@ -3000,7 +3579,7 @@ u32 hal_btcoex_GetAMPDUSize(PADAPTER padapter) + + void hal_btcoex_SetManualControl(PADAPTER padapter, u8 bmanual) + { +- GLBtCoexist.bManualControl = bmanual; ++ GLBtCoexist.manual_control = bmanual; + } + + u8 hal_btcoex_1Ant(PADAPTER padapter) +@@ -3008,7 +3587,7 @@ u8 hal_btcoex_1Ant(PADAPTER padapter) + if (hal_btcoex_IsBtExist(padapter) == _FALSE) + return _FALSE; + +- if (GLBtCoexist.boardInfo.btdmAntNum == 1) ++ if (GLBtCoexist.board_info.btdm_ant_num == 1) + return _TRUE; + + return _FALSE; +@@ -3055,22 +3634,23 @@ u8 hal_btcoex_LpsVal(PADAPTER padapter) + u32 hal_btcoex_GetRaMask(PADAPTER padapter) + { + if (!hal_btcoex_IsBtExist(padapter)) +- return 0; ++ return 0; + + if (GLBtCoexist.btInfo.bBtDisabled) +- return 0; ++ return 0; + +- // Modify by YiWei , suggest by Cosa and Jenyu +- // Remove the limit antenna number , because 2 antenna case (ex: 8192eu)also want to get BT coex report rate mask. +- //if (GLBtCoexist.boardInfo.btdmAntNum != 1) +- // return 0; ++ /* Modify by YiWei , suggest by Cosa and Jenyu ++ * Remove the limit antenna number , because 2 antenna case (ex: 8192eu)also want to get BT coex report rate mask. ++ */ ++ /*if (GLBtCoexist.board_info.btdm_ant_num != 1) ++ return 0;*/ + + return GLBtCoexist.btInfo.raMask; + } + + void hal_btcoex_RecordPwrMode(PADAPTER padapter, u8 *pCmdBuf, u8 cmdLen) + { +- BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write pwrModeCmd=0x%04x%08x\n", ++ RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FW write pwrModeCmd=0x%04x%08x\n", + pCmdBuf[0]<<8|pCmdBuf[1], + pCmdBuf[2]<<24|pCmdBuf[3]<<16|pCmdBuf[4]<<8|pCmdBuf[5])); + +@@ -3096,7 +3676,7 @@ void hal_btcoex_SetDBG(PADAPTER padapter, u32 *pDbgModule) + if (NULL == pDbgModule) + return; + +- for (i=0; i= leftSize)) + goto exit; + pstr += count; + leftSize -= count; + ++#if 0 + count = rtw_sprintf(pstr, leftSize, "INTERFACE Debug Setting Definition:\n"); + if ((count < 0) || (count >= leftSize)) + goto exit; +@@ -3219,6 +3799,7 @@ u32 hal_btcoex_GetDBG(PADAPTER padapter, u8 *pStrBuf, u32 bufSize) + goto exit; + pstr += count; + leftSize -= count; ++#endif + + exit: + count = pstr - pStrBuf; +@@ -3240,33 +3821,72 @@ u8 hal_btcoex_IncreaseScanDeviceNum(PADAPTER padapter) + + u8 hal_btcoex_IsBtLinkExist(PADAPTER padapter) + { +- if (GLBtCoexist.btLinkInfo.bBtLinkExist) ++ if (GLBtCoexist.bt_link_info.bt_link_exist) + return _TRUE; + + return _FALSE; + } + ++void hal_btcoex_SetBtPatchVersion(PADAPTER padapter,u16 btHciVer,u16 btPatchVer) ++{ ++ EXhalbtcoutsrc_SetBtPatchVersion(btHciVer,btPatchVer); ++} ++ ++void hal_btcoex_SetHciVersion(PADAPTER padapter, u16 hciVersion) ++{ ++ EXhalbtcoutsrc_SetHciVersion(hciVersion); ++} ++ ++void hal_btcoex_StackUpdateProfileInfo(void) ++{ ++ EXhalbtcoutsrc_StackUpdateProfileInfo(); ++} ++ ++void hal_btcoex_BTOffOnNotify(PADAPTER padapter, u8 bBTON) ++{ ++ EXhalbtcoutsrc_BTOffOnNotify(&GLBtCoexist, bBTON); ++} ++ + /* +- * Description: ++ * Description: + * Setting BT coex antenna isolation type . +- * coex mechanisn/ spital stream/ best throughput +- * anttype = 0 , PSTDMA / 2SS / 0.5T , bad isolation (<20dB) for 2,3 antenna +- * anttype = 1 , PSTDMA / 1SS / 0.5T , normal isolaiton (>20dB) for 2 antenna +- * anttype = 2 , TDMA / 2SS / T , normal isolaiton (>20dB) for 3 antenna +- * anttype = 3 , no TDMA / 1SS / 0.5T , good isolation (>40dB) for 2 antenna +- * anttype = 4 , no TDMA / 2SS / T , good isolation (>40dB) for 3 antenna +- * wifi only throughput ~ T +- * wifi/BT share one antenna with SPDT ++ * coex mechanisn/ spital stream/ best throughput ++ * anttype = 0 , PSTDMA / 2SS / 0.5T , bad isolation , WiFi/BT ANT Distance<15cm , (<20dB) for 2,3 antenna ++ * anttype = 1 , PSTDMA / 1SS / 0.5T , normal isolaiton , 50cm>WiFi/BT ANT Distance>15cm , (>20dB) for 2 antenna ++ * anttype = 2 , TDMA / 2SS / T , normal isolaiton , 50cm>WiFi/BT ANT Distance>15cm , (>20dB) for 3 antenna ++ * anttype = 3 , no TDMA / 1SS / 0.5T , good isolation , WiFi/BT ANT Distance >50cm , (>40dB) for 2 antenna ++ * anttype = 4 , no TDMA / 2SS / T , good isolation , WiFi/BT ANT Distance >50cm , (>40dB) for 3 antenna ++ * wifi only throughput ~ T ++ * wifi/BT share one antenna with SPDT + */ + void hal_btcoex_SetAntIsolationType(PADAPTER padapter, u8 anttype) + { +- PHAL_DATA_TYPE pHalData; ++ PHAL_DATA_TYPE pHalData; ++ PBTC_COEXIST pBtCoexist = &GLBtCoexist; + +- //DBG_871X("####%s , anttype = %d , %d \n", __FUNCTION__,anttype,__LINE__); +- pHalData = GET_HAL_DATA(padapter); ++ /*DBG_871X("####%s , anttype = %d , %d\n" , __func__ , anttype , __LINE__); */ ++ pHalData = GET_HAL_DATA(padapter); + + +- pHalData->bt_coexist.btAntisolation= anttype; ++ pHalData->bt_coexist.btAntisolation = anttype; ++ ++ switch (pHalData->bt_coexist.btAntisolation) { ++ case 0: ++ //pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_0; ++ break; ++ case 1: ++ //pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_1; ++ break; ++ case 2: ++ //pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_2; ++ break; ++ case 3: ++ //pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_3; ++ break; ++ case 4: ++ //pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_4; ++ break; ++ } + + } + +@@ -3277,108 +3897,89 @@ hal_btcoex_ParseAntIsolationConfigFile( + char* buffer + ) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- u32 i = 0 , j=0; +- char *szLine, *ptmp; +- int rtStatus = _SUCCESS; +- char param_value_string[10]; +- u8 param_value; +- u8 anttype = 4; +- +- u8 ant_num=3, ant_distance=50; +- +- typedef struct ant_isolation +- { +- char *param_name; // antenna isolation config parameter name +- u8 *value; // antenna isolation config parameter value +- }ANT_ISOLATION; +- +- ANT_ISOLATION ant_isolation_param[]= { +- {"ANT_NUMBER",&ant_num}, +- {"ANT_DISTANCE",&ant_distance}, +- {NULL,0} +- }; +- +- +- +- //DBG_871X("===>Hal_ParseAntIsolationConfigFile()\n" ); +- ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 i = 0 , j = 0; ++ char *szLine , *ptmp; ++ int rtStatus = _SUCCESS; ++ char param_value_string[10]; ++ u8 param_value; ++ u8 anttype = 4; ++ ++ u8 ant_num = 3 , ant_distance = 50 , rfe_type = 1; ++ ++ typedef struct ant_isolation { ++ char *param_name; /* antenna isolation config parameter name */ ++ u8 *value; /* antenna isolation config parameter value */ ++ } ANT_ISOLATION; ++ ++ ANT_ISOLATION ant_isolation_param[] = { ++ {"ANT_NUMBER" , &ant_num}, ++ {"ANT_DISTANCE" , &ant_distance}, ++ {"RFE_TYPE" , &rfe_type}, ++ {NULL , 0} ++ }; ++ ++ ++ ++ /* DBG_871X("===>Hal_ParseAntIsolationConfigFile()\n" ); */ ++ + ptmp = buffer; +- for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) +- { +- // skip comment +- if ( IsCommentString( szLine ) ) { +- continue; +- } +- +- //DBG_871X("%s : szLine = %s , strlen(szLine) = %d \n", __FUNCTION__,szLine,strlen(szLine)); +- for ( j=0 ;ant_isolation_param[j].param_name != NULL ; j++ ) +- { +- if ( strstr(szLine,ant_isolation_param[j].param_name)!= NULL ) +- { +- i=0; +- while ( i < strlen(szLine) ) +- { +- if (szLine[i] != '"') +- ++i; +- else +- { +- // skip only has one " +- if( strpbrk(szLine, "\"") == strrchr(szLine, '"')) +- { +- DBG_871X("Fail to parse parameters , format error!\n"); +- break; +- } +- _rtw_memset( ( PVOID ) param_value_string, 0, 10 ); +- if ( ! ParseQualifiedString( szLine, &i, param_value_string, '"' , '"' ) ) { +- DBG_871X("Fail to parse parameters \n"); +- return _FAIL; +- } +- else +- { +- GetU1ByteIntegerFromStringInDecimal( param_value_string, ant_isolation_param[j].value ); +- } +- break; +- } +- } +- } +- } +- } +- +- // YiWei 20140716 , for BT coex antenna isolation control +- if ( ant_num==3 && ant_distance>=50) +- { +- pHalData->EEPROMBluetoothCoexist = 0; +- anttype = 4; +- } +- else if ( ant_num==2 && ant_distance>=50 ) +- { +- anttype = 3; +- } +- else if ( ant_num==3 && ant_distance>=15 && ant_distance<50 ) +- { +- anttype = 2; +- } +- else if ( ant_num==2 && ant_distance>=15 && ant_distance<50 ) +- { +- anttype = 1; +- } +- else if ( (ant_num==2 && ant_distance<15) || (ant_num==3 && ant_distance<15)) +- { +- anttype = 0; +- } +- else +- { +- pHalData->EEPROMBluetoothCoexist = 1; +- anttype = 1; +- } +- +- hal_btcoex_SetAntIsolationType(Adapter, anttype); +- +- DBG_871X("%s : ant_num = %d \n", __FUNCTION__,ant_num); +- DBG_871X("%s : ant_distance = %d \n", __FUNCTION__,ant_distance); +- //DBG_871X("<===Hal_ParseAntIsolationConfigFile()\n"); +- return rtStatus; ++ for (szLine = GetLineFromBuffer(ptmp) ; szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { ++ /* skip comment */ ++ if (IsCommentString(szLine)) ++ continue; ++ ++ /* DBG_871X("%s : szLine = %s , strlen(szLine) = %d\n" , __func__ , szLine , strlen(szLine));*/ ++ for (j = 0 ; ant_isolation_param[j].param_name != NULL ; j++) { ++ if (strstr(szLine , ant_isolation_param[j].param_name) != NULL) { ++ i = 0; ++ while (i < strlen(szLine)) { ++ if (szLine[i] != '"') ++ ++i; ++ else { ++ /* skip only has one " */ ++ if (strpbrk(szLine , "\"") == strrchr(szLine , '"')) { ++ DBG_871X("Fail to parse parameters , format error!\n"); ++ break; ++ } ++ _rtw_memset((PVOID)param_value_string , 0 , 10); ++ if (!ParseQualifiedString(szLine , &i , param_value_string , '"' , '"')) { ++ DBG_871X("Fail to parse parameters\n"); ++ return _FAIL; ++ } else if (!GetU1ByteIntegerFromStringInDecimal(param_value_string , ant_isolation_param[j].value)) ++ DBG_871X("Fail to GetU1ByteIntegerFromStringInDecimal\n"); ++ ++ break; ++ } ++ } ++ } ++ } ++ } ++ ++ /* YiWei 20140716 , for BT coex antenna isolation control */ ++ /* rfe_type = 0 was SPDT , rfe_type = 1 was coupler */ ++ if (ant_num == 3 && ant_distance >= 50) ++ anttype = 3; ++ else if (ant_num == 2 && ant_distance >= 50 && rfe_type == 1) ++ anttype = 2; ++ else if (ant_num == 3 && ant_distance >= 15 && ant_distance < 50) ++ anttype = 2; ++ else if (ant_num == 2 && ant_distance >= 15 && ant_distance < 50 && rfe_type == 1) ++ anttype = 2; ++ else if ((ant_num == 2 && ant_distance < 15 && rfe_type == 1) || (ant_num == 3 && ant_distance < 15)) ++ anttype = 1; ++ else if (ant_num == 2 && rfe_type == 0) ++ anttype = 0; ++ else ++ anttype = 0; ++ ++ hal_btcoex_SetAntIsolationType(Adapter, anttype); ++ ++ DBG_871X("%s : ant_num = %d\n" , __func__ , ant_num); ++ DBG_871X("%s : ant_distance = %d\n" , __func__ , ant_distance); ++ DBG_871X("%s : rfe_type = %d\n" , __func__ , rfe_type); ++ /* DBG_871X("<===Hal_ParseAntIsolationConfigFile()\n"); */ ++ return rtStatus; + } + + +@@ -3388,21 +3989,17 @@ hal_btcoex_AntIsolationConfig_ParaFile( + IN char* pFileName + ) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- int rlen = 0, rtStatus = _FAIL; +- //char file_path[1024]; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int rlen = 0 , rtStatus = _FAIL; + +- //if(!(Adapter->registrypriv.load_phy_file & LOAD_RF_TXPWR_LMT_PARA_FILE)) +- // return rtStatus; ++ _rtw_memset(pHalData->para_file_buf , 0 , MAX_PARA_FILE_BUF_LEN); + +- _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); + ++ rtw_merge_string(rtw_phy_para_file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); + +- rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); +- +- if (rtw_is_file_readable(file_path) == _TRUE) ++ if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) + { +- rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); ++ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); + if (rlen > 0) + { + rtStatus = _SUCCESS; +@@ -3410,18 +4007,41 @@ hal_btcoex_AntIsolationConfig_ParaFile( + } + + +- if(rtStatus == _SUCCESS) +- { +- //DBG_871X("%s(): read %s ok\n", __FUNCTION__, pFileName); +- rtStatus = hal_btcoex_ParseAntIsolationConfigFile( Adapter, pHalData->para_file_buf ); +- } +- else +- { +- DBG_871X("%s(): No File %s, Load from *** Array!\n", __FUNCTION__, pFileName); ++ if (rtStatus == _SUCCESS) { ++ /*DBG_871X("%s(): read %s ok\n", __func__ , pFileName);*/ ++ rtStatus = hal_btcoex_ParseAntIsolationConfigFile(Adapter , pHalData->para_file_buf); ++ } else { ++ DBG_871X("%s(): No File %s, Load from *** Array!\n" , __func__ , pFileName); + } + + return rtStatus; + } + #endif // CONFIG_LOAD_PHY_PARA_FROM_FILE ++ ++u16 hal_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data) ++{ ++ u16 ret = 0; ++ ++ halbtcoutsrc_LeaveLowPower(&GLBtCoexist); ++ ++ ret = halbtcoutsrc_GetBtReg(&GLBtCoexist, type, addr, data); ++ ++ halbtcoutsrc_NormalLowPower(&GLBtCoexist); ++ ++ return ret; ++} ++ ++u16 hal_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val) ++{ ++ u16 ret = 0; ++ ++ halbtcoutsrc_LeaveLowPower(&GLBtCoexist); ++ ++ ret = halbtcoutsrc_SetBtReg(&GLBtCoexist, type, addr, val); ++ ++ halbtcoutsrc_NormalLowPower(&GLBtCoexist); ++ ++ return ret; ++} + #endif // CONFIG_BT_COEXIST + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com.c +old mode 100755 +new mode 100644 +index bf5256f..ae98886 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com.c +@@ -27,68 +27,32 @@ + //#define CONFIG_GTK_OL_DBG + + #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +-char file_path[PATH_LENGTH_MAX]; ++char rtw_phy_para_file_path[PATH_LENGTH_MAX]; + #endif + +-u8 rtw_hal_data_init(_adapter *padapter) +-{ +- if(is_primary_adapter(padapter)) +- { +- padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); +- padapter->HalData = rtw_zvmalloc(padapter->hal_data_sz); +- if(padapter->HalData == NULL){ +- DBG_8192C("cant not alloc memory for HAL DATA \n"); +- return _FAIL; +- } +- } +- return _SUCCESS; +-} +- +-void rtw_hal_data_deinit(_adapter *padapter) +-{ +- if(is_primary_adapter(padapter)) +- { +- if (padapter->HalData) +- { +- #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +- phy_free_filebuf(padapter); +- #endif +- rtw_vmfree(padapter->HalData, padapter->hal_data_sz); +- padapter->HalData = NULL; +- padapter->hal_data_sz = 0; +- } +- } +-} +- + void dump_chip_info(HAL_VERSION ChipVersion) + { + int cnt = 0; +- u8 buf[128]; ++ u8 buf[128]={0}; + +- if(IS_81XXC(ChipVersion)){ +- cnt += sprintf((buf+cnt), "Chip Version Info: %s_", IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C"); +- } +- else if(IS_92D(ChipVersion)){ +- cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192D_"); +- } +- else if(IS_8723_SERIES(ChipVersion)){ +- cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723A_"); +- } +- else if(IS_8188E(ChipVersion)){ ++ if (IS_8188E(ChipVersion)) + cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8188E_"); +- } +- else if(IS_8812_SERIES(ChipVersion)){ ++ else if (IS_8188F(ChipVersion)) ++ cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8188F_"); ++ else if (IS_8812_SERIES(ChipVersion)) + cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8812_"); +- } +- else if(IS_8192E(ChipVersion)){ ++ else if (IS_8192E(ChipVersion)) + cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192E_"); +- } +- else if(IS_8821_SERIES(ChipVersion)){ ++ else if (IS_8821_SERIES(ChipVersion)) + cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8821_"); +- } +- else if(IS_8723B_SERIES(ChipVersion)){ ++ else if (IS_8723B_SERIES(ChipVersion)) + cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723B_"); +- } ++ else if (IS_8703B_SERIES(ChipVersion)) ++ cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8703B_"); ++ else if (IS_8814A_SERIES(ChipVersion)) ++ cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8814A_"); ++ else ++ cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_UNKNOWN_"); + + cnt += sprintf((buf+cnt), "%s_", IS_NORMAL_CHIP(ChipVersion)?"Normal_Chip":"Test_Chip"); + if(IS_CHIP_VENDOR_TSMC(ChipVersion)) +@@ -98,26 +62,70 @@ void dump_chip_info(HAL_VERSION ChipVersion) + else if(IS_CHIP_VENDOR_SMIC(ChipVersion)) + cnt += sprintf((buf+cnt), "%s_","SMIC"); + +- if(IS_A_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "A_CUT_"); +- else if(IS_B_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "B_CUT_"); +- else if(IS_C_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "C_CUT_"); +- else if(IS_D_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "D_CUT_"); +- else if(IS_E_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "E_CUT_"); +- else if(IS_I_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "I_CUT_"); +- else if(IS_J_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "J_CUT_"); +- else if(IS_K_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "K_CUT_"); +- else cnt += sprintf((buf+cnt), "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion); ++ if (IS_A_CUT(ChipVersion)) ++ cnt += sprintf((buf+cnt), "A_CUT_"); ++ else if (IS_B_CUT(ChipVersion)) ++ cnt += sprintf((buf+cnt), "B_CUT_"); ++ else if (IS_C_CUT(ChipVersion)) ++ cnt += sprintf((buf+cnt), "C_CUT_"); ++ else if (IS_D_CUT(ChipVersion)) ++ cnt += sprintf((buf+cnt), "D_CUT_"); ++ else if (IS_E_CUT(ChipVersion)) ++ cnt += sprintf((buf+cnt), "E_CUT_"); ++ else if (IS_F_CUT(ChipVersion)) ++ cnt += sprintf((buf+cnt), "F_CUT_"); ++ else if (IS_I_CUT(ChipVersion)) ++ cnt += sprintf((buf+cnt), "I_CUT_"); ++ else if (IS_J_CUT(ChipVersion)) ++ cnt += sprintf((buf+cnt), "J_CUT_"); ++ else if (IS_K_CUT(ChipVersion)) ++ cnt += sprintf((buf+cnt), "K_CUT_"); ++ else ++ cnt += sprintf((buf+cnt), "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion); + + if(IS_1T1R(ChipVersion)) cnt += sprintf((buf+cnt), "1T1R_"); + else if(IS_1T2R(ChipVersion)) cnt += sprintf((buf+cnt), "1T2R_"); + else if(IS_2T2R(ChipVersion)) cnt += sprintf((buf+cnt), "2T2R_"); ++ else if(IS_3T3R(ChipVersion)) cnt += sprintf((buf+cnt), "3T3R_"); ++ else if(IS_3T4R(ChipVersion)) cnt += sprintf((buf+cnt), "3T4R_"); ++ else if(IS_4T4R(ChipVersion)) cnt += sprintf((buf+cnt), "4T4R_"); + else cnt += sprintf((buf+cnt), "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType); + + cnt += sprintf((buf+cnt), "RomVer(%d)\n", ChipVersion.ROMVer); + + DBG_871X("%s", buf); + } +- ++void rtw_hal_config_rftype(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (IS_1T1R(pHalData->VersionID)) { ++ pHalData->rf_type = RF_1T1R; ++ pHalData->NumTotalRFPath = 1; ++ } ++ else if (IS_2T2R(pHalData->VersionID)) { ++ pHalData->rf_type = RF_2T2R; ++ pHalData->NumTotalRFPath = 2; ++ } ++ else if (IS_1T2R(pHalData->VersionID)) { ++ pHalData->rf_type = RF_1T2R; ++ pHalData->NumTotalRFPath = 2; ++ } ++ else if(IS_3T3R(pHalData->VersionID)) { ++ pHalData->rf_type = RF_3T3R; ++ pHalData->NumTotalRFPath = 3; ++ } ++ else if(IS_4T4R(pHalData->VersionID)) { ++ pHalData->rf_type = RF_4T4R; ++ pHalData->NumTotalRFPath = 4; ++ } ++ else { ++ pHalData->rf_type = RF_1T1R; ++ pHalData->NumTotalRFPath = 1; ++ } ++ ++ DBG_871X("%s RF_Type is %d TotalTxPath is %d \n", __FUNCTION__, pHalData->rf_type, pHalData->NumTotalRFPath); ++} + + #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 + +@@ -128,61 +136,106 @@ void dump_chip_info(HAL_VERSION ChipVersion) + * + * Parameters: + * padapter pointer of adapter +- * hw_channel_plan channel plan from HW (efuse/eeprom) ++ * hw_alpha2 country code from HW (efuse/eeprom/mapfile) ++ * hw_chplan channel plan from HW (efuse/eeprom/mapfile) + * BIT[7] software configure mode; 0:Enable, 1:disable + * BIT[6:0] Channel Plan +- * sw_channel_plan channel plan from SW (registry/module param) +- * def_channel_plan channel plan used when HW/SW both invalid ++ * sw_alpha2 country code from HW (registry/module param) ++ * sw_chplan channel plan from SW (registry/module param) ++ * def_chplan channel plan used when HW/SW both invalid + * AutoLoadFail efuse autoload fail or not + * + * Return: + * Final channel plan decision + * + */ +-u8 +-hal_com_config_channel_plan( +- IN PADAPTER padapter, +- IN u8 hw_channel_plan, +- IN u8 sw_channel_plan, +- IN u8 def_channel_plan, +- IN BOOLEAN AutoLoadFail ++u8 hal_com_config_channel_plan( ++ IN PADAPTER padapter, ++ IN char *hw_alpha2, ++ IN u8 hw_chplan, ++ IN char *sw_alpha2, ++ IN u8 sw_chplan, ++ IN u8 def_chplan, ++ IN BOOLEAN AutoLoadFail + ) + { + PHAL_DATA_TYPE pHalData; +- u8 hwConfig; +- u8 chnlPlan; +- ++ u8 force_hw_chplan = _FALSE; ++ int chplan = -1; ++ const struct country_chplan *country_ent = NULL, *ent; + + pHalData = GET_HAL_DATA(padapter); +- pHalData->bDisableSWChannelPlan = _FALSE; +- chnlPlan = def_channel_plan; +- +- if (0xFF == hw_channel_plan) +- AutoLoadFail = _TRUE; +- +- if (_FALSE == AutoLoadFail) +- { +- u8 hw_chnlPlan; +- +- hw_chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK); +- if (rtw_is_channel_plan_valid(hw_chnlPlan)) +- { +-#ifndef CONFIG_SW_CHANNEL_PLAN +- if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) +- pHalData->bDisableSWChannelPlan = _TRUE; +-#endif // !CONFIG_SW_CHANNEL_PLAN +- +- chnlPlan = hw_chnlPlan; +- } +- } +- +- if ((_FALSE == pHalData->bDisableSWChannelPlan) +- && rtw_is_channel_plan_valid(sw_channel_plan)) +- { +- chnlPlan = sw_channel_plan; +- } + +- return chnlPlan; ++ /* treat 0xFF as invalid value, bypass hw_chplan & force_hw_chplan parsing */ ++ if (hw_chplan == 0xFF) ++ goto chk_hw_country_code; ++ ++ if (AutoLoadFail == _TRUE) ++ goto chk_sw_config; ++ ++ #ifndef CONFIG_FORCE_SW_CHANNEL_PLAN ++ if (hw_chplan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ++ force_hw_chplan = _TRUE; ++ #endif ++ ++ hw_chplan &= (~EEPROM_CHANNEL_PLAN_BY_HW_MASK); ++ ++chk_hw_country_code: ++ if (hw_alpha2 && !IS_ALPHA2_NO_SPECIFIED(hw_alpha2)) { ++ ent = rtw_get_chplan_from_country(hw_alpha2); ++ if (ent) { ++ /* get chplan from hw country code, by pass hw chplan setting */ ++ country_ent = ent; ++ chplan = ent->chplan; ++ goto chk_sw_config; ++ } else ++ DBG_871X_LEVEL(_drv_always_, "%s unsupported hw_alpha2:\"%c%c\"\n", __func__, hw_alpha2[0], hw_alpha2[1]); ++ } ++ ++ if (rtw_is_channel_plan_valid(hw_chplan)) ++ chplan = hw_chplan; ++ else if (force_hw_chplan == _TRUE) { ++ DBG_871X_LEVEL(_drv_always_, "%s unsupported hw_chplan:0x%02X\n", __func__, hw_chplan); ++ /* hw infomaton invalid, refer to sw information */ ++ force_hw_chplan = _FALSE; ++ } ++ ++chk_sw_config: ++ if (force_hw_chplan == _TRUE) ++ goto done; ++ ++ if (sw_alpha2 && !IS_ALPHA2_NO_SPECIFIED(sw_alpha2)) { ++ ent = rtw_get_chplan_from_country(sw_alpha2); ++ if (ent) { ++ /* get chplan from sw country code, by pass sw chplan setting */ ++ country_ent = ent; ++ chplan = ent->chplan; ++ goto done; ++ } else ++ DBG_871X_LEVEL(_drv_always_, "%s unsupported sw_alpha2:\"%c%c\"\n", __func__, sw_alpha2[0], sw_alpha2[1]); ++ } ++ ++ if (rtw_is_channel_plan_valid(sw_chplan)) { ++ /* cancel hw_alpha2 because chplan is specified by sw_chplan*/ ++ country_ent = NULL; ++ chplan = sw_chplan; ++ } else if (sw_chplan != RTW_CHPLAN_MAX) ++ DBG_871X_LEVEL(_drv_always_, "%s unsupported sw_chplan:0x%02X\n", __func__, sw_chplan); ++ ++done: ++ if (chplan == -1) { ++ DBG_871X_LEVEL(_drv_always_, "%s use def_chplan:0x%02X\n", __func__, def_chplan); ++ chplan = def_chplan; ++ } else if (country_ent) { ++ DBG_871X_LEVEL(_drv_always_, "%s country code:\"%c%c\" with chplan:0x%02X\n", __func__ ++ , country_ent->alpha2[0], country_ent->alpha2[1], country_ent->chplan); ++ } else ++ DBG_871X_LEVEL(_drv_always_, "%s chplan:0x%02X\n", __func__, chplan); ++ ++ padapter->mlmepriv.country_ent = country_ent; ++ pHalData->bDisableSWChannelPlan = force_hw_chplan; ++ ++ return chplan; + } + + BOOLEAN +@@ -627,10 +680,10 @@ Hal_MappingOutPipe( + + void hal_init_macaddr(_adapter *adapter) + { +- rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr); ++ rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(adapter)); + #ifdef CONFIG_CONCURRENT_MODE + if (adapter->pbuddy_adapter) +- rtw_hal_set_hwreg(adapter->pbuddy_adapter, HW_VAR_MAC_ADDR, adapter->pbuddy_adapter->eeprompriv.mac_addr); ++ rtw_hal_set_hwreg(adapter->pbuddy_adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(adapter->pbuddy_adapter)); + #endif + } + +@@ -662,7 +715,7 @@ s32 c2h_evt_read(_adapter *adapter, u8 *buf) + if (buf == NULL) + goto exit; + +-#if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) || defined(CONFIG_RTL8723A) || defined (CONFIG_RTL8188E) ++#if defined (CONFIG_RTL8188E) + + trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR); + +@@ -689,7 +742,7 @@ s32 c2h_evt_read(_adapter *adapter, u8 *buf) + + /* Read the content */ + for (i = 0; i < c2h_evt->plen; i++) +- c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + sizeof(*c2h_evt) + i); ++ c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i); + + RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n", + c2h_evt->payload, c2h_evt->plen); +@@ -722,7 +775,7 @@ s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf) + if (buf == NULL) + goto exit; + +-#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8723B) ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) + + trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR); + +@@ -768,6 +821,158 @@ exit: + return ret; + } + ++#define GET_C2H_MAC_HIDDEN_RPT_UUID_X(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 0, 0, 8) ++#define GET_C2H_MAC_HIDDEN_RPT_UUID_Y(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 1, 0, 8) ++#define GET_C2H_MAC_HIDDEN_RPT_UUID_Z(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 2, 0, 5) ++#define GET_C2H_MAC_HIDDEN_RPT_UUID_CRC(_data) LE_BITS_TO_2BYTE(((u8 *)(_data)) + 2, 5, 11) ++#define GET_C2H_MAC_HIDDEN_RPT_HCI_TYPE(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 4, 0, 4) ++#define GET_C2H_MAC_HIDDEN_RPT_PACKAGE_TYPE(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 4, 4, 4) ++#define GET_C2H_MAC_HIDDEN_RPT_WL_FUNC(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 5, 0, 4) ++#define GET_C2H_MAC_HIDDEN_RPT_HW_STYPE(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 5, 4, 4) ++#define GET_C2H_MAC_HIDDEN_RPT_BW(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 0, 3) ++#define GET_C2H_MAC_HIDDEN_RPT_ANT_NUM(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 5, 3) ++#define GET_C2H_MAC_HIDDEN_RPT_80211_PROTOCOL(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 2, 2) ++#define GET_C2H_MAC_HIDDEN_RPT_NIC_ROUTER(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 6, 2) ++ ++#ifndef DBG_C2H_MAC_HIDDEN_RPT_HANDLE ++#define DBG_C2H_MAC_HIDDEN_RPT_HANDLE 0 ++#endif ++ ++int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); ++ int ret = _FAIL; ++ ++ u32 uuid; ++ u8 uuid_x; ++ u8 uuid_y; ++ u8 uuid_z; ++ u16 uuid_crc; ++ ++ u8 hci_type; ++ u8 package_type; ++ u8 wl_func; ++ u8 hw_stype; ++ u8 bw; ++ u8 ant_num; ++ u8 protocol; ++ u8 nic; ++ ++ int i; ++ ++ if (len < MAC_HIDDEN_RPT_LEN) { ++ DBG_871X_LEVEL(_drv_warning_, "%s len(%u) < %d\n", __func__, len, MAC_HIDDEN_RPT_LEN); ++ goto exit; ++ } ++ ++ uuid_x = GET_C2H_MAC_HIDDEN_RPT_UUID_X(data); ++ uuid_y = GET_C2H_MAC_HIDDEN_RPT_UUID_Y(data); ++ uuid_z = GET_C2H_MAC_HIDDEN_RPT_UUID_Z(data); ++ uuid_crc = GET_C2H_MAC_HIDDEN_RPT_UUID_CRC(data); ++ ++ hci_type = GET_C2H_MAC_HIDDEN_RPT_HCI_TYPE(data); ++ package_type = GET_C2H_MAC_HIDDEN_RPT_PACKAGE_TYPE(data); ++ ++ wl_func = GET_C2H_MAC_HIDDEN_RPT_WL_FUNC(data); ++ hw_stype = GET_C2H_MAC_HIDDEN_RPT_HW_STYPE(data); ++ ++ bw = GET_C2H_MAC_HIDDEN_RPT_BW(data); ++ ant_num = GET_C2H_MAC_HIDDEN_RPT_ANT_NUM(data); ++ ++ protocol = GET_C2H_MAC_HIDDEN_RPT_80211_PROTOCOL(data); ++ nic = GET_C2H_MAC_HIDDEN_RPT_NIC_ROUTER(data); ++ ++ if (DBG_C2H_MAC_HIDDEN_RPT_HANDLE) { ++ for (i = 0; i < len; i++) ++ DBG_871X("%s: 0x%02X\n", __func__, *(data + i)); ++ ++ DBG_871X("uuid x:0x%02x y:0x%02x z:0x%x crc:0x%x\n", uuid_x, uuid_y, uuid_z, uuid_crc); ++ DBG_871X("hci_type:0x%x\n", hci_type); ++ DBG_871X("package_type:0x%x\n", package_type); ++ DBG_871X("wl_func:0x%x\n", wl_func); ++ DBG_871X("hw_stype:0x%x\n", hw_stype); ++ DBG_871X("bw:0x%x\n", bw); ++ DBG_871X("ant_num:0x%x\n", ant_num); ++ DBG_871X("protocol:0x%x\n", protocol); ++ DBG_871X("nic:0x%x\n", nic); ++ } ++ ++ hal_data->PackageType = package_type; ++ hal_spec->wl_func &= mac_hidden_wl_func_to_hal_wl_func(wl_func); ++ hal_spec->bw_cap &= mac_hidden_max_bw_to_hal_bw_cap(bw); ++ hal_spec->nss_num = rtw_min(hal_spec->nss_num, ant_num); ++ hal_spec->proto_cap &= mac_hidden_proto_to_hal_proto_cap(protocol); ++ ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++int hal_read_mac_hidden_rpt(_adapter *adapter) ++{ ++ int ret = _FAIL; ++ int ret_fwdl; ++ u8 mac_hidden_rpt[MAC_HIDDEN_RPT_LEN] = {0}; ++ u32 start = rtw_get_current_time(); ++ u32 cnt = 0; ++ u32 timeout_ms = 800; ++ u32 min_cnt = 10; ++ u8 id = C2H_MAC_HIDDEN_RPT + 1; ++ int i; ++ ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) ++ u8 hci_type = rtw_get_intf_type(adapter); ++ ++ if ((hci_type == RTW_USB || hci_type == RTW_PCIE) ++ && !rtw_is_hw_init_completed(adapter)) ++ rtw_hal_power_on(adapter); ++#endif ++ ++ /* clear data ready */ ++ rtw_write8(adapter, REG_C2HEVT_MSG_NORMAL, id); ++ ++ /* download FW */ ++ ret_fwdl = rtw_hal_fw_dl(adapter, _FALSE); ++ if (ret_fwdl != _SUCCESS) ++ goto mac_hidden_rpt_hdl; ++ ++ /* polling for data ready */ ++ start = rtw_get_current_time(); ++ do { ++ cnt++; ++ id = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL); ++ if (id == C2H_MAC_HIDDEN_RPT || RTW_CANNOT_IO(adapter)) ++ break; ++ rtw_msleep_os(10); ++ } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); ++ ++ if (id == C2H_MAC_HIDDEN_RPT) { ++ /* read data */ ++ for (i = 0; i < MAC_HIDDEN_RPT_LEN; i++) ++ mac_hidden_rpt[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i); ++ } ++ ++mac_hidden_rpt_hdl: ++ c2h_mac_hidden_rpt_hdl(adapter, mac_hidden_rpt, MAC_HIDDEN_RPT_LEN); ++ ++ if (ret_fwdl == _SUCCESS && id == C2H_MAC_HIDDEN_RPT) ++ ret = _SUCCESS; ++ ++exit: ++ ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) ++ if ((hci_type == RTW_USB || hci_type == RTW_PCIE) ++ && !rtw_is_hw_init_completed(adapter)) ++ rtw_hal_power_off(adapter); ++#endif ++ ++ DBG_871X("%s %s! (%u, %dms), fwdl:%d, id:0x%02x\n", __func__ ++ , (ret == _SUCCESS)?"OK":"Fail", cnt, rtw_get_passing_time_ms(start), ret_fwdl, id); ++ ++ return ret; ++} + + u8 rtw_hal_networktype_to_raid(_adapter *adapter, struct sta_info *psta) + { +@@ -798,7 +1003,7 @@ u8 rtw_get_mgntframe_raid(_adapter *adapter,unsigned char network_type) + void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta) + { + u8 i, rf_type, limit; +- u32 tx_ra_bitmap; ++ u64 tx_ra_bitmap; + + if(psta == NULL) + { +@@ -825,14 +1030,27 @@ void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta) + #endif //CONFIG_80211AC_VHT + { + //n mode ra_bitmap +- if(psta->htpriv.ht_option) ++ if(psta->htpriv.ht_option) + { ++ rf_type = RF_1T1R; + rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); + if(rf_type == RF_2T2R) + limit=16;// 2R ++ else if(rf_type == RF_3T3R) ++ limit=24;// 3R + else + limit=8;// 1R + ++ ++ /* Handling SMPS mode for AP MODE only*/ ++ if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) { ++ /*0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/ ++ if (psta->htpriv.smps_cap == 0 || psta->htpriv.smps_cap == 1) { ++ /*operate with only one active receive chain // 11n-MCS rate <= MSC7*/ ++ limit = 8;/* 1R*/ ++ } ++ } ++ + for (i=0; ihtpriv.ht_cap.supp_mcs_set[i/8] & BIT(i%8)) + tx_ra_bitmap |= BIT(i+12); +@@ -840,11 +1058,202 @@ void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta) + } + } + #endif //CONFIG_80211N_HT +- ++ DBG_871X("supp_mcs_set = %02x, %02x, %02x, rf_type=%d, tx_ra_bitmap=%016llx\n" ++ , psta->htpriv.ht_cap.supp_mcs_set[0], psta->htpriv.ht_cap.supp_mcs_set[1], psta->htpriv.ht_cap.supp_mcs_set[2], rf_type, tx_ra_bitmap); + psta->ra_mask = tx_ra_bitmap; + psta->init_rate = get_highest_rate_idx(tx_ra_bitmap)&0x3f; + } + ++#ifndef SEC_CAM_ACCESS_TIMEOUT_MS ++ #define SEC_CAM_ACCESS_TIMEOUT_MS 200 ++#endif ++ ++#ifndef DBG_SEC_CAM_ACCESS ++ #define DBG_SEC_CAM_ACCESS 0 ++#endif ++ ++u32 rtw_sec_read_cam(_adapter *adapter, u8 addr) ++{ ++ _mutex *mutex = &adapter_to_dvobj(adapter)->cam_ctl.sec_cam_access_mutex; ++ u32 rdata; ++ u32 cnt = 0; ++ u32 start = 0, end = 0; ++ u8 timeout = 0; ++ u8 sr = 0; ++ ++ _enter_critical_mutex(mutex, NULL); ++ ++ rtw_write32(adapter, REG_CAMCMD, CAM_POLLINIG | addr); ++ ++ start = rtw_get_current_time(); ++ while (1) { ++ if (rtw_is_surprise_removed(adapter)) { ++ sr = 1; ++ break; ++ } ++ ++ cnt++; ++ if (0 == (rtw_read32(adapter, REG_CAMCMD) & CAM_POLLINIG)) ++ break; ++ ++ if (rtw_get_passing_time_ms(start) > SEC_CAM_ACCESS_TIMEOUT_MS) { ++ timeout = 1; ++ break; ++ } ++ } ++ end = rtw_get_current_time(); ++ ++ rdata = rtw_read32(adapter, REG_CAMREAD); ++ ++ _exit_critical_mutex(mutex, NULL); ++ ++ if (DBG_SEC_CAM_ACCESS || timeout) { ++ DBG_871X(FUNC_ADPT_FMT" addr:0x%02x, rdata:0x%08x, to:%u, polling:%u, %d ms\n" ++ , FUNC_ADPT_ARG(adapter), addr, rdata, timeout, cnt, rtw_get_time_interval_ms(start, end)); ++ } ++ ++ return rdata; ++} ++ ++void rtw_sec_write_cam(_adapter *adapter, u8 addr, u32 wdata) ++{ ++ _mutex *mutex = &adapter_to_dvobj(adapter)->cam_ctl.sec_cam_access_mutex; ++ u32 cnt = 0; ++ u32 start = 0, end = 0; ++ u8 timeout = 0; ++ u8 sr = 0; ++ ++ _enter_critical_mutex(mutex, NULL); ++ ++ rtw_write32(adapter, REG_CAMWRITE, wdata); ++ rtw_write32(adapter, REG_CAMCMD, CAM_POLLINIG | CAM_WRITE | addr); ++ ++ start = rtw_get_current_time(); ++ while (1) { ++ if (rtw_is_surprise_removed(adapter)) { ++ sr = 1; ++ break; ++ } ++ ++ cnt++; ++ if (0 == (rtw_read32(adapter, REG_CAMCMD) & CAM_POLLINIG)) ++ break; ++ ++ if (rtw_get_passing_time_ms(start) > SEC_CAM_ACCESS_TIMEOUT_MS) { ++ timeout = 1; ++ break; ++ } ++ } ++ end = rtw_get_current_time(); ++ ++ _exit_critical_mutex(mutex, NULL); ++ ++ if (DBG_SEC_CAM_ACCESS || timeout) { ++ DBG_871X(FUNC_ADPT_FMT" addr:0x%02x, wdata:0x%08x, to:%u, polling:%u, %d ms\n" ++ , FUNC_ADPT_ARG(adapter), addr, wdata, timeout, cnt, rtw_get_time_interval_ms(start, end)); ++ } ++} ++ ++void rtw_sec_read_cam_ent(_adapter *adapter, u8 id, u8 *ctrl, u8 *mac, u8 *key) ++{ ++ unsigned int val, addr; ++ u8 i; ++ u32 rdata; ++ u8 begin = 0; ++ u8 end = 5; /* TODO: consider other key length accordingly */ ++ ++ if (!ctrl && !mac && !key) { ++ rtw_warn_on(1); ++ goto exit; ++ } ++ ++ /* TODO: check id range */ ++ ++ if (!ctrl && !mac) ++ begin = 2; /* read from key */ ++ ++ if (!key && !mac) ++ end = 0; /* read to ctrl */ ++ else if (!key) ++ end = 2; /* read to mac */ ++ ++ for (i = begin; i <= end; i++) { ++ rdata = rtw_sec_read_cam(adapter, (id << 3) | i); ++ ++ switch (i) { ++ case 0: ++ if (ctrl) ++ _rtw_memcpy(ctrl, (u8 *)(&rdata), 2); ++ if (mac) ++ _rtw_memcpy(mac, ((u8 *)(&rdata)) + 2, 2); ++ break; ++ case 1: ++ if (mac) ++ _rtw_memcpy(mac + 2, (u8 *)(&rdata), 4); ++ break; ++ default: ++ if (key) ++ _rtw_memcpy(key + (i - 2) * 4, (u8 *)(&rdata), 4); ++ break; ++ } ++ } ++ ++exit: ++ return; ++} ++ ++ ++void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) ++{ ++ unsigned int i; ++ int j; ++ u8 addr; ++ u32 wdata; ++ ++ /* TODO: consider other key length accordingly */ ++#if 0 ++ switch ((ctrl & 0x1c) >> 2) { ++ case _WEP40_: ++ case _TKIP_ ++ case _AES_ ++ case _WEP104_ ++ ++ } ++#else ++ j = 5; ++#endif ++ ++ for (; j >= 0; j--) { ++ switch (j) { ++ case 0: ++ wdata = (ctrl | (mac[0] << 16) | (mac[1] << 24)); ++ break; ++ case 1: ++ wdata = (mac[2] | (mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24)); ++ break; ++ default: ++ i = (j - 2) << 2; ++ wdata = (key[i] | (key[i + 1] << 8) | (key[i + 2] << 16) | (key[i + 3] << 24)); ++ break; ++ } ++ ++ addr = (id << 3) + j; ++ ++ rtw_sec_write_cam(adapter, addr, wdata); ++ } ++} ++ ++bool rtw_sec_read_cam_is_gk(_adapter *adapter, u8 id) ++{ ++ bool res; ++ u16 ctrl; ++ ++ rtw_sec_read_cam_ent(adapter, id, (u8 *)&ctrl, NULL, NULL); ++ ++ res = (ctrl & BIT6) ? _TRUE : _FALSE; ++ return res; ++} ++ + void hw_var_port_switch(_adapter *adapter) + { + #ifdef CONFIG_CONCURRENT_MODE +@@ -964,7 +1373,7 @@ void hw_var_port_switch(_adapter *adapter) + + /* write bcn ctl */ + #ifdef CONFIG_BT_COEXIST +-#if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) ++#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) + // always enable port0 beacon function for PSTDMA + bcn_ctrl_1 |= EN_BCN_FUNCTION; + // always disable port1 beacon function for PSTDMA +@@ -1044,6 +1453,103 @@ void hw_var_port_switch(_adapter *adapter) + #endif /* CONFIG_CONCURRENT_MODE */ + } + ++const char * const _h2c_msr_role_str[] = { ++ "RSVD", ++ "STA", ++ "AP", ++ "GC", ++ "GO", ++ "TDLS", ++ "ADHOC", ++ "INVALID", ++}; ++ ++/* ++* rtw_hal_set_FwMediaStatusRpt_cmd - ++* ++* @adapter: ++* @opmode: 0:disconnect, 1:connect ++* @miracast: 0:it's not in miracast scenario. 1:it's in miracast scenario ++* @miracast_sink: 0:source. 1:sink ++* @role: The role of this macid. 0:rsvd. 1:STA. 2:AP. 3:GC. 4:GO. 5:TDLS ++* @macid: ++* @macid_ind: 0:update Media Status to macid. 1:update Media Status from macid to macid_end ++* @macid_end: ++*/ ++s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, bool macid_ind, u8 macid_end) ++{ ++ struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; ++ u8 parm[H2C_MEDIA_STATUS_RPT_LEN] = {0}; ++ int i; ++ s32 ret; ++ ++ SET_H2CCMD_MSRRPT_PARM_OPMODE(parm, opmode); ++ SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, macid_ind); ++ SET_H2CCMD_MSRRPT_PARM_MIRACAST(parm, miracast); ++ SET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK(parm, miracast_sink); ++ SET_H2CCMD_MSRRPT_PARM_ROLE(parm, role); ++ SET_H2CCMD_MSRRPT_PARM_MACID(parm, macid); ++ SET_H2CCMD_MSRRPT_PARM_MACID_END(parm, macid_end); ++ ++ RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "MediaStatusRpt parm:", parm, H2C_MEDIA_STATUS_RPT_LEN); ++ ++ ret = rtw_hal_fill_h2c_cmd(adapter, H2C_MEDIA_STATUS_RPT, H2C_MEDIA_STATUS_RPT_LEN, parm); ++ if (ret != _SUCCESS) ++ goto exit; ++ ++#if defined(CONFIG_RTL8188E) ++ if (rtw_get_chip_type(adapter) == RTL8188E) { ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ ++ /* 8188E FW doesn't set macid no link, driver does it by self */ ++ if (opmode) ++ rtw_hal_set_hwreg(adapter, HW_VAR_MACID_LINK, &macid); ++ else ++ rtw_hal_set_hwreg(adapter, HW_VAR_MACID_NOLINK, &macid); ++ ++ /* for 8188E RA */ ++ #if (RATE_ADAPTIVE_SUPPORT == 1) ++ if (hal_data->fw_ractrl == _FALSE) { ++ u8 max_macid; ++ ++ max_macid = rtw_search_max_mac_id(adapter); ++ rtw_hal_set_hwreg(adapter, HW_VAR_TX_RPT_MAX_MACID, &max_macid); ++ } ++ #endif ++ } ++#endif ++ ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++ /* TODO: this should move to IOT issue area */ ++ if (rtw_get_chip_type(adapter) == RTL8812 ++ || rtw_get_chip_type(adapter) == RTL8821 ++ ) { ++ if (MLME_IS_STA(adapter)) ++ Hal_PatchwithJaguar_8812(adapter, opmode); ++ } ++#endif ++ ++ SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, 0); ++ if (macid_ind == 0) ++ macid_end = macid; ++ ++ for (i = macid; macid <= macid_end; macid++) ++ rtw_macid_ctl_set_h2c_msr(macid_ctl, macid, parm[0]); ++ ++exit: ++ return ret; ++} ++ ++inline s32 rtw_hal_set_FwMediaStatusRpt_single_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid) ++{ ++ return rtw_hal_set_FwMediaStatusRpt_cmd(adapter, opmode, miracast, miracast_sink, role, macid, 0, 0); ++} ++ ++inline s32 rtw_hal_set_FwMediaStatusRpt_range_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, u8 macid_end) ++{ ++ return rtw_hal_set_FwMediaStatusRpt_cmd(adapter, opmode, miracast, miracast_sink, role, macid, 1, macid_end); ++} ++ + void rtw_hal_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) + { + struct hal_ops *pHalFunc = &padapter->HalFunc; +@@ -1061,23 +1567,28 @@ void rtw_hal_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) + SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocQosNull); + SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocBTQosNull); + +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(padapter, ++ ret = rtw_hal_fill_h2c_cmd(padapter, + H2C_RSVD_PAGE, + H2C_RSVDPAGE_LOC_LEN, + u1H2CRsvdPageParm); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } ++ + } + + #ifdef CONFIG_GPIO_WAKEUP +-static void rtw_hal_set_output_gpio(_adapter* padapter, u8 index, u8 outputval) ++void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable) + { +- u8 val8; +- ++ /* ++ * Switch GPIO_13, GPIO_14 to wlan control, or pull GPIO_13,14 MUST fail. ++ * It happended at 8723B/8192E/8821A. New IC will check multi function GPIO, ++ * and implement HAL function. ++ * TODO: GPIO_8 multi function? ++ */ ++ if (index == 13 || index == 14) ++ rtw_hal_set_hwreg(padapter, HW_SET_GPIO_WL_CTRL, (u8 *)(&enable)); ++} + ++void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval) ++{ + if ( index <= 7 ) { + /* config GPIO mode */ + rtw_write8(padapter, REG_GPIO_PIN_CTRL + 3, +@@ -1097,23 +1608,11 @@ static void rtw_hal_set_output_gpio(_adapter* padapter, u8 index, u8 outputval) + rtw_write8(padapter, REG_GPIO_PIN_CTRL + 1, + rtw_read8(padapter, REG_GPIO_PIN_CTRL + 1) & ~BIT(index)); + } +- } else if (index <= 15) { ++ } else if (index <= 15){ + /* 88C Series: */ + /* index: 11~8 transform to 3~0 */ + /* 8723 Series: */ + /* index: 12~8 transform to 4~0 */ +-#ifdef CONFIG_RTL8723B +- if ((index == 13) || (index == 14)) { +- // Set BIT_GPIO13_14_WL_CTRL_EN to 0 +- val8 = rtw_read8(padapter, 0x4e); +- if (val8 & BIT(6)) { +- val8 &= ~BIT(6); +- rtw_write8(padapter, 0x4e, val8); +- DBG_871X("%s: set GPIO%d to WL control, 0x4E=0x%02X\n", +- __FUNCTION__, index, rtw_read8(padapter, 0x4e)); +- } +- } +-#endif // CONFIG_RTL8723B + + index -= 8; + +@@ -1136,26 +1635,10 @@ static void rtw_hal_set_output_gpio(_adapter* padapter, u8 index, u8 outputval) + rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 1) & ~BIT(index)); + } + } else { +- DBG_871X("%s: invalid GPIO%d=%d\n", __FUNCTION__, index, outputval); ++ DBG_871X("%s: invalid GPIO%d=%d\n", ++ __FUNCTION__, index, outputval); + } + } +- +-/* +- * Set GPIO high/low under init and +- * fw will trigger Low/High Pulse when need to wake up host +- */ +-void rtw_clear_hostwakeupgpio(PADAPTER padapter) +-{ +- u8 high = 0; +- +- +-#ifdef CONFIG_GPIO_WAKEUP_LOW_ACTIVE +- high = 1; +-#endif // CONFIG_GPIO_WAKEUP_LOW_ACTIVE +- DBG_871X("%s: Set GPIO%d to %s for wake\n", +- __FUNCTION__, WAKEUP_GPIO_IDX, high?"high":"low"); +- rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, high); +-} + #endif + + void rtw_hal_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) +@@ -1182,15 +1665,10 @@ void rtw_hal_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc + #ifdef CONFIG_GTK_OL + SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKEXTMEM); + #endif // CONFIG_GTK_OL +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(padapter, ++ ret = rtw_hal_fill_h2c_cmd(padapter, + H2C_AOAC_RSVD_PAGE, + H2C_AOAC_RSVDPAGE_LOC_LEN, + u1H2CAoacRsvdPageParm); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } + } + #ifdef CONFIG_PNO_SUPPORT + else +@@ -1202,256 +1680,57 @@ void rtw_hal_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc + sizeof(u1H2CAoacRsvdPageParm)); + SET_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(u1H2CAoacRsvdPageParm, + rsvdpageloc->LocPNOInfo); +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(padapter, ++ ret = rtw_hal_fill_h2c_cmd(padapter, + H2C_AOAC_RSVDPAGE3, + H2C_AOAC_RSVDPAGE_LOC_LEN, + u1H2CAoacRsvdPageParm); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } + } + } + #endif //CONFIG_PNO_SUPPORT + #endif // CONFIG_WOWLAN + } + +-#ifdef CONFIG_WOWLAN +-// rtw_hal_check_wow_ctrl +-// chk_type: _TRUE means to check enable, if 0x690 & bit1, WOW enable successful +-// _FALSE means to check disable, if 0x690 & bit1, WOW disable fail +-static u8 rtw_hal_check_wow_ctrl(_adapter* adapter, u8 chk_type) ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++static void rtw_hal_force_enable_rxdma(_adapter *adapter) + { +- u8 mstatus = 0; +- u8 trycnt = 25; +- u8 res = _FALSE; ++ DBG_871X("%s: Set 0x690=0x00\n", __func__); ++ rtw_write8(adapter, REG_WOW_CTRL, ++ (rtw_read8(adapter, REG_WOW_CTRL)&0xf0)); ++ DBG_871X_LEVEL(_drv_always_, "%s: Release RXDMA\n", __func__); ++ rtw_write32(adapter, REG_RXPKT_NUM, ++ (rtw_read32(adapter,REG_RXPKT_NUM)&(~RW_RELEASE_EN))); ++} + +- mstatus = rtw_read8(adapter, REG_WOW_CTRL); +- DBG_871X_LEVEL(_drv_info_, "%s mstatus:0x%02x\n", __func__, mstatus); +- +- if (chk_type) { +- while(!(mstatus&BIT1) && trycnt>1) { +- mstatus = rtw_read8(adapter, REG_WOW_CTRL); +- DBG_871X_LEVEL(_drv_always_, +- "Loop index: %d :0x%02x\n", +- trycnt, mstatus); +- trycnt --; +- rtw_msleep_os(2); +- } +- if (mstatus & BIT1) +- res = _TRUE; +- else +- res = _FALSE; +- } else { +- while (mstatus&BIT1 && trycnt>1) { +- mstatus = rtw_read8(adapter, REG_WOW_CTRL); +- DBG_871X_LEVEL(_drv_always_, +- "Loop index: %d :0x%02x\n", +- trycnt, mstatus); +- trycnt --; +- rtw_msleep_os(2); +- } +- +- if (mstatus & BIT1) +- res = _FALSE; +- else +- res = _TRUE; +- } +- DBG_871X_LEVEL(_drv_always_, "%s check_type: %d res: %d trycnt: %d\n", +- __func__, chk_type, res, (25 - trycnt)); +- return res; +-} +- +-#ifdef CONFIG_PNO_SUPPORT +-static u8 rtw_hal_check_pno_enabled(_adapter* adapter) +-{ +- struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); +- u8 res = 0, count = 0; +- u8 ret = _FALSE; +- if (ppwrpriv->wowlan_pno_enable && ppwrpriv->pno_in_resume == _FALSE) { +- res = rtw_read8(adapter, REG_PNO_STATUS); +- while(!(res&BIT(7)) && count < 25) { +- DBG_871X("[%d] cmd: 0x81 REG_PNO_STATUS: 0x%02x\n", +- count, res); +- res = rtw_read8(adapter, REG_PNO_STATUS); +- count++; +- rtw_msleep_os(2); +- } +- if (res & BIT(7)) +- ret = _TRUE; +- else +- ret = _FALSE; +- DBG_871X("cmd: 0x81 REG_PNO_STATUS: ret(%d)\n", ret); +- } +- return ret; +-} +-#endif +- +-static void rtw_hal_force_enable_rxdma(_adapter* adapter) +-{ +- DBG_871X("%s: Set 0x690=0x00\n", __func__); +- rtw_write8(adapter, REG_WOW_CTRL, +- (rtw_read8(adapter, REG_WOW_CTRL)&0xf0)); +- DBG_871X_LEVEL(_drv_always_, "%s: Release RXDMA\n", __func__); +- rtw_write32(adapter, REG_RXPKT_NUM, +- (rtw_read32(adapter,REG_RXPKT_NUM)&(~RW_RELEASE_EN))); +-} +- +-static void rtw_hal_disable_tx_report(_adapter* adapter) ++static void rtw_hal_disable_tx_report(_adapter *adapter) + { + rtw_write8(adapter, REG_TX_RPT_CTRL, + ((rtw_read8(adapter, REG_TX_RPT_CTRL)&~BIT(1)))&~BIT(5)); + DBG_871X("disable TXRPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL)); + } + +-static void rtw_hal_enable_tx_report(_adapter* adapter) ++static void rtw_hal_enable_tx_report(_adapter *adapter) + { + rtw_write8(adapter, REG_TX_RPT_CTRL, + ((rtw_read8(adapter, REG_TX_RPT_CTRL)|BIT(1)))|BIT(5)); + DBG_871X("enable TX_RPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL)); + } + +-void rtw_hal_fill_fake_txdesc(_adapter* padapter, u8* pDesc, u32 BufferLen, +- u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame) ++static void rtw_hal_release_rx_dma(_adapter *adapter) + { ++ u32 val32 = 0; + +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct hal_ops *pHalFunc = &padapter->HalFunc; +- struct tx_desc *ptxdesc; +- +- // Clear all status +- _rtw_memset(pDesc, 0, TXDESC_SIZE); +- +- if (TXDESC_SIZE == 32) { +- ptxdesc = (struct tx_desc*)pDesc; +- //offset 0 +- //own, bFirstSeg, bLastSeg; +- ptxdesc->txdw0 |= +- cpu_to_le32( BIT(31) | BIT(27)| BIT(26)); +- +- //32 bytes for TX Desc +- ptxdesc->txdw0 |= +- cpu_to_le32(((TXDESC_SIZE + 0) << 16)&0x00ff0000); +- +- // Buffer size + command header +- ptxdesc->txdw0 |= +- cpu_to_le32(BufferLen&0x0000ffff); +- +- //offset 4 +- // Fixed queue of Mgnt queue +- ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<< 8)&0x00001f00); +- +- //Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. +- if (IsPsPoll) { +- ptxdesc->txdw1 |= cpu_to_le32(BIT(20)); +- } else { +- // Hw set sequence number +- ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); +- //set bit3 to 1. Suugested by TimChen. 2009.12.29. +- ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); +- } +- +- if (_TRUE == IsBTQosNull) { +- ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); // BT NULL +- } +- +- //offset 16 +- //driver uses rate +- ptxdesc->txdw4 |= cpu_to_le32(BIT(8)); +- +- } else if (TXDESC_SIZE == 40) { +- SET_TX_DESC_FIRST_SEG(pDesc, 1); //bFirstSeg; +- SET_TX_DESC_LAST_SEG(pDesc, 1); //bLastSeg; +- +- SET_TX_DESC_OFFSET(pDesc, TXDESC_SIZE); +- +- SET_TX_DESC_PKT_SIZE(pDesc, BufferLen); // Buffer size + command header +- +- if (pmlmeext->cur_wireless_mode & WIRELESS_11B) { +- SET_TX_DESC_RATE_ID(pDesc, RATR_INX_WIRELESS_B); +- } else { +- SET_TX_DESC_RATE_ID(pDesc, RATR_INX_WIRELESS_G); +- } +- +- SET_TX_DESC_QUEUE_SEL(pDesc, QSLT_MGNT); // Fixed queue of Mgnt queue +- +- // Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. +- if (_TRUE == IsPsPoll) { +- SET_TX_DESC_NAV_USE_HDR(pDesc, 1); +- } else { +- SET_TX_DESC_HWSEQ_EN(pDesc, 1); // Hw set sequence number +- SET_TX_DESC_HWSEQ_SEL(pDesc, 0); +- } +- +- if (_TRUE ==IsBTQosNull) { +- SET_TX_DESC_BT_INT(pDesc, 1); +- } +- +- SET_TX_DESC_USE_RATE(pDesc, 1); // use data rate which is set by Sw +- SET_TX_DESC_OWN((pu1Byte)pDesc, 1); +- +- SET_TX_DESC_TX_RATE(pDesc, MRateToHwRate(pmlmeext->tx_rate)); +- +- } +- +- // +- // Encrypt the data frame if under security mode excepct null data. +- // Suggested by CCW. +- // +- if (_TRUE ==bDataFrame) +- { +- u32 EncAlg; +- +- EncAlg = padapter->securitypriv.dot11PrivacyAlgrthm; +- switch (EncAlg) +- { +- case _NO_PRIVACY_: +- SET_TX_DESC_SEC_TYPE(pDesc, 0x0); +- break; +- case _WEP40_: +- case _WEP104_: +- case _TKIP_: +- SET_TX_DESC_SEC_TYPE(pDesc, 0x1); +- break; +- case _SMS4_: +- SET_TX_DESC_SEC_TYPE(pDesc, 0x2); +- break; +- case _AES_: +- SET_TX_DESC_SEC_TYPE(pDesc, 0x3); +- break; +- default: +- SET_TX_DESC_SEC_TYPE(pDesc, 0x0); +- break; +- } +- } ++ val32 = rtw_read32(adapter, REG_RXPKT_NUM); + +-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +- // USB interface drop packet if the checksum of descriptor isn't correct. +- // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). +- if(pHalFunc->hal_cal_txdesc_chksum != NULL) +-#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8723A) ||defined(CONFIG_RTL8723B) +- pHalFunc->hal_cal_txdesc_chksum((struct tx_desc*)pDesc); +-#else +- pHalFunc->hal_cal_txdesc_chksum(pDesc); +-#endif //CONFIG_RTL8188E || CONFIG_RTL8723B +-#endif +-} ++ rtw_write32(adapter, REG_RXPKT_NUM, (val32 & (~RW_RELEASE_EN))); + +-static void rtw_hal_backup_rate(_adapter* adapter) +-{ +- DBG_871X("%s\n", __func__); +- //backup data rate to register 0x8b for wowlan FW +- rtw_write8(adapter, 0x8d, 1); +- rtw_write8(adapter, 0x8c, 0); +- rtw_write8(adapter, 0x8f, 0x40); +- rtw_write8(adapter, 0x8b, rtw_read8(adapter, 0x2f0)); ++ DBG_871X("%s, [0x%04x]: 0x%08x\n", ++ __func__, REG_RXPKT_NUM, (val32 & (~RW_RELEASE_EN))); + } + +-static u8 rtw_hal_pause_rx_dma(_adapter* adapter) ++static u8 rtw_hal_pause_rx_dma(_adapter *adapter) + { + u8 ret = 0; +- u8 trycnt = 100; ++ s8 trycnt = 100; + u16 len = 0; + u32 tmp = 0; + int res = 0; +@@ -1478,13 +1757,38 @@ static u8 rtw_hal_pause_rx_dma(_adapter* adapter) + else + DBG_871X_LEVEL(_drv_always_, "read length fail %d\n", len); + +- DBG_871X_LEVEL(_drv_always_, "RecvOnePkt Result: %d\n", res); ++ DBG_871X_LEVEL(_drv_always_, ++ "RecvOnePkt Result: %d\n", res); + } + #endif //CONFIG_SDIO_HCI || CONFIG_GSPI_HCI ++#ifdef CONFIG_USB_HCI ++ else { ++ if (adapter->intf_start) ++ adapter->intf_start(adapter); ++ tmp = rtw_read32(adapter, REG_RXPKT_NUM) & RXDMA_IDLE; ++ if (tmp) { ++ if (adapter->intf_stop) ++ adapter->intf_stop(adapter); ++ RTW_ENABLE_FUNC(adapter, DF_RX_BIT); ++ RTW_ENABLE_FUNC(adapter, DF_TX_BIT); ++ } ++ } ++#endif + }while(trycnt--); + +- if(trycnt ==0) { +- DBG_871X_LEVEL(_drv_always_, "Stop RX DMA failed...... \n"); ++ if (trycnt < 0) { ++ tmp = rtw_read16(adapter, REG_RXPKT_NUM + 3); ++ ++ DBG_871X_LEVEL(_drv_always_, "Stop RX DMA failed......\n"); ++ DBG_871X_LEVEL(_drv_always_, "%s, RXPKT_NUM: 0x%04x\n", ++ __func__, tmp); ++ tmp = rtw_read16(adapter, REG_RXPKT_NUM + 2); ++ if (tmp & BIT(3)) ++ DBG_871X_LEVEL(_drv_always_, "%s, RX DMA has req\n", ++ __func__); ++ else ++ DBG_871X_LEVEL(_drv_always_, "%s, RX DMA no req\n", ++ __func__); + ret = _FAIL; + } + +@@ -1521,10 +1825,95 @@ static u8 rtw_hal_enable_cpwm2(_adapter* adapter) + + return ret; + } +-#endif //CONFIG_SDIO_HCI, CONFIG_GSPI_HCI ++#endif /* CONFIG_SDIO_HCI, CONFIG_GSPI_HCI */ ++#endif /* CONFIG_WOWLAN || CONFIG_AP_WOWLAN */ ++ ++#ifdef CONFIG_WOWLAN ++/* ++ * rtw_hal_check_wow_ctrl ++ * chk_type: _TRUE means to check enable, if 0x690 & bit1, WOW enable successful ++ * _FALSE means to check disable, if 0x690 & bit1, WOW disable fail ++ */ ++static u8 rtw_hal_check_wow_ctrl(_adapter *adapter, u8 chk_type) ++{ ++ u8 mstatus = 0; ++ u8 trycnt = 25; ++ u8 res = _FALSE; ++ ++ mstatus = rtw_read8(adapter, REG_WOW_CTRL); ++ DBG_871X_LEVEL(_drv_info_, "%s mstatus:0x%02x\n", __func__, mstatus); ++ ++ if (chk_type) { ++ while (!(mstatus&BIT1) && trycnt > 1) { ++ mstatus = rtw_read8(adapter, REG_WOW_CTRL); ++ DBG_871X_LEVEL(_drv_always_, ++ "Loop index: %d :0x%02x\n", ++ trycnt, mstatus); ++ trycnt--; ++ rtw_msleep_os(20); ++ } ++ if (mstatus & BIT1) ++ res = _TRUE; ++ else ++ res = _FALSE; ++ } else { ++ while (mstatus&BIT1 && trycnt > 1) { ++ mstatus = rtw_read8(adapter, REG_WOW_CTRL); ++ DBG_871X_LEVEL(_drv_always_, ++ "Loop index: %d :0x%02x\n", ++ trycnt, mstatus); ++ trycnt--; ++ rtw_msleep_os(20); ++ } ++ ++ if (mstatus & BIT1) ++ res = _FALSE; ++ else ++ res = _TRUE; ++ } ++ DBG_871X_LEVEL(_drv_always_, "%s check_type: %d res: %d trycnt: %d\n", ++ __func__, chk_type, res, (25 - trycnt)); ++ return res; ++} ++ ++#ifdef CONFIG_PNO_SUPPORT ++static u8 rtw_hal_check_pno_enabled(_adapter *adapter) ++{ ++ struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); ++ u8 res = 0, count = 0; ++ u8 ret = _FALSE; ++ ++ if (ppwrpriv->wowlan_pno_enable && ppwrpriv->pno_in_resume == _FALSE) { ++ res = rtw_read8(adapter, REG_PNO_STATUS); ++ while (!(res&BIT(7)) && count < 25) { ++ DBG_871X("[%d] cmd: 0x81 REG_PNO_STATUS: 0x%02x\n", ++ count, res); ++ res = rtw_read8(adapter, REG_PNO_STATUS); ++ count++; ++ rtw_msleep_os(2); ++ } ++ if (res & BIT(7)) ++ ret = _TRUE; ++ else ++ ret = _FALSE; ++ DBG_871X("cmd: 0x81 REG_PNO_STATUS: ret(%d)\n", ret); ++ } ++ return ret; ++} ++#endif ++ ++static void rtw_hal_backup_rate(_adapter *adapter) ++{ ++ DBG_871X("%s\n", __func__); ++ /* backup data rate to register 0x8b for wowlan FW */ ++ rtw_write8(adapter, 0x8d, 1); ++ rtw_write8(adapter, 0x8c, 0); ++ rtw_write8(adapter, 0x8f, 0x40); ++ rtw_write8(adapter, 0x8b, rtw_read8(adapter, 0x2f0)); ++} + + #ifdef CONFIG_GTK_OL +-static void rtw_hal_fw_sync_cam_id(_adapter* adapter) ++static void rtw_hal_fw_sync_cam_id(_adapter *adapter) + { + struct security_priv *psecuritypriv = &adapter->securitypriv; + u8 null_addr[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; +@@ -1543,7 +1932,7 @@ static void rtw_hal_fw_sync_cam_id(_adapter* adapter) + } + + do{ +- cam_id = rtw_camid_search(adapter, addr, index); ++ cam_id = rtw_camid_search(adapter, addr, index, -1); + if (cam_id == -1) { + DBG_871X("%s: cam_id: %d, key_id:%d\n", + __func__, cam_id, index); +@@ -1551,7 +1940,7 @@ static void rtw_hal_fw_sync_cam_id(_adapter* adapter) + DBG_871X("%s: cam_id: %d key_id(%d) is not GK\n", + __func__, cam_id, index); + } else { +- read_cam(adapter ,cam_id, get_key); ++ rtw_sec_read_cam_ent(adapter, cam_id, NULL, NULL, get_key); + algorithm = psecuritypriv->dot11PrivacyAlgrthm; + ctrl = BIT(15) | BIT6 |(algorithm << 2) | index; + write_cam(adapter, index, ctrl, addr, get_key); +@@ -1559,21 +1948,21 @@ static void rtw_hal_fw_sync_cam_id(_adapter* adapter) + write_cam(adapter, cam_id, ctrl, null_addr, get_key); + } + index++; +- }while(cam_id != -1); ++ }while(index < 4); + + rtw_write8(adapter, REG_SECCFG, 0xcc); + } + +-static void rtw_hal_update_gtk_offload_info(_adapter* adapter) ++static void rtw_hal_update_gtk_offload_info(_adapter *adapter) + { + struct security_priv *psecuritypriv = &adapter->securitypriv; +- int cam_id; ++ u8 default_cam_id = 0; ++ u8 cam_id=5; + u8 *addr; + u8 null_addr[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; + u8 gtk_keyindex=0; + u8 get_key[16]; +- u8 null_key[16]; +- u8 index = 0; ++ u8 index = 1; + u16 ctrl = 0; + u32 algorithm = 0; + +@@ -1584,38 +1973,28 @@ static void rtw_hal_update_gtk_offload_info(_adapter* adapter) + return; + } + +- _rtw_memset(null_key, 0, sizeof(null_key)); ++ _rtw_memset(get_key, 0, sizeof(get_key)); + + algorithm = psecuritypriv->dot11PrivacyAlgrthm; + + if(psecuritypriv->binstallKCK_KEK == _TRUE) { ++ + //read gtk key index + gtk_keyindex = rtw_read8(adapter, 0x48c); +- + do{ +- cam_id = rtw_camid_search(adapter, addr, index); +- if (cam_id == -1) { +- DBG_871X("%s: cam_id: %d, key_id:%d\n", +- __func__, cam_id, index); +- } else if (read_phy_cam_is_gtk(adapter, cam_id) == +- _FALSE){ +- DBG_871X("%s: cam_id: %d, key_id:%d is not GK\n", +- __func__, cam_id, index); +- } else if (cam_id >= 4) { +- DBG_871X("%s: cam_id(%d) is not in default key\n", +- __func__, cam_id); +- } else { +- read_cam(adapter ,cam_id, get_key); ++ /* chech if GK */ ++ if (rtw_sec_read_cam_is_gk(adapter, default_cam_id) == _TRUE) { ++ rtw_sec_read_cam_ent(adapter, default_cam_id, NULL, NULL, get_key); + algorithm = psecuritypriv->dot11PrivacyAlgrthm; +- ctrl = BIT(15) | BIT6 |(algorithm << 2) | index; +- write_cam(adapter, cam_id+4, ctrl, +- addr, get_key); ++ /* in default cam entry, cam id = key id */ ++ ctrl = BIT(15) | BIT6 | (algorithm << 2) | default_cam_id; ++ write_cam(adapter, cam_id, ctrl, addr, get_key); ++ cam_id++; + ctrl = 0; +- write_cam(adapter, cam_id, ctrl, +- null_addr, get_key); ++ write_cam(adapter, default_cam_id, ctrl, null_addr, get_key); + } + +- if (gtk_keyindex < 4 &&(index == gtk_keyindex)) { ++ if (gtk_keyindex < 4 && (default_cam_id == gtk_keyindex)) { + psecuritypriv->dot118021XGrpKeyid = gtk_keyindex; + _rtw_memcpy(psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, + get_key, 16); +@@ -1627,19 +2006,19 @@ static void rtw_hal_update_gtk_offload_info(_adapter* adapter) + psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].lkey[2], + psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].lkey[3]); + } +- index++; +- }while(index < 4); ++ default_cam_id++; ++ } while (default_cam_id < 4); + + rtw_write8(adapter, REG_SECCFG, 0x0c); + #ifdef CONFIG_GTK_OL_DBG + //if (gtk_keyindex != 5) +- dump_cam_table(adapter); ++ dump_sec_cam(RTW_DBGDUMP, adapter); + #endif + } + } + #endif + +-static void rtw_hal_update_tx_iv(_adapter* adapter) ++static void rtw_hal_update_tx_iv(_adapter *adapter) + { + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); + u64 iv_low = 0, iv_high = 0; +@@ -1671,15 +2050,10 @@ static u8 rtw_hal_set_keep_alive_cmd(_adapter *adapter, u8 enable, u8 pkt_type) + SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(u1H2CKeepAliveParm, pkt_type); + SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(u1H2CKeepAliveParm, check_period); + +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(adapter, ++ ret = rtw_hal_fill_h2c_cmd(adapter, + H2C_KEEP_ALIVE, + H2C_KEEP_ALIVE_CTRL_LEN, + u1H2CKeepAliveParm); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } + + return ret; + } +@@ -1697,149 +2071,99 @@ static u8 rtw_hal_set_disconnect_decision_cmd(_adapter *adapter, u8 enable) + SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(u1H2CDisconDecisionParm, check_period); + SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(u1H2CDisconDecisionParm, trypkt_num); + +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(adapter, ++ ret = rtw_hal_fill_h2c_cmd(adapter, + H2C_DISCON_DECISION, + H2C_DISCON_DECISION_LEN, + u1H2CDisconDecisionParm); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } +- + return ret; + } + +-static u8 rtw_hal_set_ap_offload_ctrl_cmd(_adapter *adapter, u8 enable) ++static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_unit) + { ++ struct security_priv *psecpriv = &adapter->securitypriv; ++ struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); + struct hal_ops *pHalFunc = &adapter->HalFunc; +- u8 u1H2CAPOffloadCtrlParm[H2C_WOWLAN_LEN]={0}; +- u8 ret = _FAIL; + +- DBG_871X("%s(): bFuncEn=%d\n", __func__, enable); ++ u8 u1H2CWoWlanCtrlParm[H2C_WOWLAN_LEN]={0}; ++ u8 discont_wake = 1, gpionum = 0, gpio_dur = 0; ++ u8 hw_unicast = 0, gpio_pulse_cnt = 0, gpio_pulse_en = 0; ++ u8 sdio_wakeup_enable = 1; ++ u8 gpio_high_active = 0; ++ u8 pattern_en = 0; ++ u8 magic_pkt = 0; ++ u8 gpio_unit = 0; /*0: 64ns, 1: 8ms*/ ++ u8 ret = _FAIL; + +- SET_H2CCMD_AP_WOWLAN_EN(u1H2CAPOffloadCtrlParm, enable); ++#ifdef CONFIG_GPIO_WAKEUP ++ gpio_high_active = ppwrpriv->is_high_active; ++ gpionum = WAKEUP_GPIO_IDX; ++ sdio_wakeup_enable = 0; ++#endif //CONFIG_GPIO_WAKEUP + +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(adapter, +- H2C_AP_OFFLOAD, +- H2C_AP_OFFLOAD_LEN, +- u1H2CAPOffloadCtrlParm); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } +- return ret; +-} ++ if (!ppwrpriv->wowlan_pno_enable) ++ magic_pkt = enable; + +-static u8 rtw_hal_set_ap_rsvdpage_loc_cmd(_adapter *adapter, +- PRSVDPAGE_LOC rsvdpageloc) +-{ +- struct hal_ops *pHalFunc = &adapter->HalFunc; +- u8 rsvdparm[H2C_AOAC_RSVDPAGE_LOC_LEN]={0}; +- u8 ret = _FAIL, header = 0; ++ if (psecpriv->dot11PrivacyAlgrthm == _WEP40_ || psecpriv->dot11PrivacyAlgrthm == _WEP104_) ++ hw_unicast = 1; ++ else ++ hw_unicast = 0; + +- if (pHalFunc->fill_h2c_cmd == NULL) { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- return ret; ++ if (ppwrpriv->wowlan_pattern) { ++ if (enable) ++ pattern_en = 1; ++ else ++ pattern_en = 0; + } + +- header = rtw_read8(adapter, REG_BCNQ_BDNY); ++ DBG_871X("%s(): enable=%d change_unit=%d\n", __func__, ++ enable, change_unit); + +- DBG_871X("%s: beacon: %d, probeRsp: %d, header:0x%02x\n", __func__, +- rsvdpageloc->LocApOffloadBCN, +- rsvdpageloc->LocProbeRsp, +- header); ++ /* time = (gpio_dur/2) * gpio_unit, default:256 ms */ ++ if (enable && change_unit) { ++ gpio_dur = 0x40; ++ gpio_unit = 1; ++ gpio_pulse_en = 1; ++ } + +- SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_BCN(rsvdparm, +- rsvdpageloc->LocApOffloadBCN + header); +- +- ret = pHalFunc->fill_h2c_cmd(adapter, H2C_BCN_RSVDPAGE, +- H2C_BCN_RSVDPAGE_LEN, rsvdparm); +- +- if (ret == _FAIL) +- DBG_871X("%s: H2C_BCN_RSVDPAGE cmd fail\n", __func__); +- +- _rtw_memset(&rsvdparm, 0, sizeof(rsvdparm)); +- +- SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_ProbeRsp(rsvdparm, +- rsvdpageloc->LocProbeRsp + header); +- +- ret = pHalFunc->fill_h2c_cmd(adapter, H2C_PROBERSP_RSVDPAGE, +- H2C_PROBERSP_RSVDPAGE_LEN, rsvdparm); +- +- if (ret == _FAIL) +- DBG_871X("%s: H2C_PROBERSP_RSVDPAGE cmd fail\n", __func__); +- +- return ret; +-} +- +-u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable) +-{ +- struct security_priv *psecpriv = &adapter->securitypriv; +- struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); +- struct hal_ops *pHalFunc = &adapter->HalFunc; +- +- u8 u1H2CWoWlanCtrlParm[H2C_WOWLAN_LEN]={0}; +- u8 discont_wake = 1, gpionum = 0, gpio_dur = 0; +- u8 hw_unicast = 0, gpio_pulse_cnt = 0; +- u8 sdio_wakeup_enable = 1; +- u8 gpio_high_active = 0; //0: low active, 1: high active +- u8 magic_pkt = 0; +- u8 ret = _FAIL; +- +-#ifdef CONFIG_GPIO_WAKEUP +- gpionum = WAKEUP_GPIO_IDX; +- sdio_wakeup_enable = 0; +- gpio_dur = 32; // 32*32us = 1024us +-#ifdef CONFIG_GPIO_WAKEUP_LOW_ACTIVE +- gpio_high_active = 0; +-#else // !CONFIG_GPIO_WAKEUP_LOW_ACTIVE +- gpio_high_active = 1; +-#endif // !CONFIG_GPIO_WAKEUP_LOW_ACTIVE +-#endif //CONFIG_GPIO_WAKEUP +- +- if (!ppwrpriv->wowlan_pno_enable) +- magic_pkt = enable; +- +- if (psecpriv->dot11PrivacyAlgrthm == _WEP40_ || psecpriv->dot11PrivacyAlgrthm == _WEP104_) +- hw_unicast = 1; +- else if (IS_HARDWARE_TYPE_8192E(adapter)) +- hw_unicast = 1; +- else +- hw_unicast = 0; +- +- DBG_871X("%s: enable=%d GPIO=%d\n", __FUNCTION__, enable, gpionum); ++#ifdef CONFIG_PLATFORM_ARM_RK3188 ++ if (enable) { ++ gpio_pulse_en = 1; ++ gpio_pulse_cnt = 0x04; ++ } ++#endif + + SET_H2CCMD_WOWLAN_FUNC_ENABLE(u1H2CWoWlanCtrlParm, enable); +- SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(u1H2CWoWlanCtrlParm, 0); ++ SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(u1H2CWoWlanCtrlParm, pattern_en); + SET_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(u1H2CWoWlanCtrlParm, magic_pkt); + SET_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(u1H2CWoWlanCtrlParm, hw_unicast); + SET_H2CCMD_WOWLAN_ALL_PKT_DROP(u1H2CWoWlanCtrlParm, 0); + SET_H2CCMD_WOWLAN_GPIO_ACTIVE(u1H2CWoWlanCtrlParm, gpio_high_active); +-#ifndef CONFIG_GTK_OL ++ ++#ifdef CONFIG_GTK_OL ++ if (enable == _TRUE) { ++ /* GTK rekey only for AES, if GTK rekey is TKIP, then wake up*/ ++ if (psecpriv->dot118021XGrpPrivacy == _AES_) ++ SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, 0); ++ else if (psecpriv->dot118021XGrpPrivacy == _TKIP_) ++ SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, 1); ++ } ++#else + SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, enable); + #endif + SET_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(u1H2CWoWlanCtrlParm, discont_wake); + SET_H2CCMD_WOWLAN_GPIONUM(u1H2CWoWlanCtrlParm, gpionum); + SET_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(u1H2CWoWlanCtrlParm, sdio_wakeup_enable); +- SET_H2CCMD_WOWLAN_GPIO_DURATION(u1H2CWoWlanCtrlParm, gpio_dur); // (real)unit: 32us +- SET_H2CCMD_WOWLAN_GPIO_PULSE_EN(u1H2CWoWlanCtrlParm, 1); +-#ifdef CONFIG_PLATFORM_ARM_RK3188 +- SET_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(u1H2CWoWlanCtrlParm, 4); +-#else ++ ++ SET_H2CCMD_WOWLAN_GPIO_DURATION(u1H2CWoWlanCtrlParm, gpio_dur); ++ SET_H2CCMD_WOWLAN_CHANGE_UNIT(u1H2CWoWlanCtrlParm, gpio_unit); ++ ++ SET_H2CCMD_WOWLAN_GPIO_PULSE_EN(u1H2CWoWlanCtrlParm, gpio_pulse_en); + SET_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(u1H2CWoWlanCtrlParm, gpio_pulse_cnt); +-#endif + +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(adapter, ++ ret = rtw_hal_fill_h2c_cmd(adapter, + H2C_WOWLAN, + H2C_WOWLAN_LEN, + u1H2CWoWlanCtrlParm); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } + return ret; + } + +@@ -1871,7 +2195,17 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable) + #endif //CONFIG_GTK_OL + + SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN( +- u1H2CRemoteWakeCtrlParm, 1); ++ u1H2CRemoteWakeCtrlParm, ++ !ppwrpriv->wowlan_pattern); ++ ++ /* ++ * filter NetBios name service pkt to avoid being waked-up ++ * by this kind of unicast pkt this exceptional modification ++ * is used for match competitor's behavior ++ */ ++ SET_H2CCMD_REMOTE_WAKE_CTRL_NBNS_FILTER_EN( ++ u1H2CRemoteWakeCtrlParm, !ppwrpriv->wowlan_pattern); ++ + if ((psecuritypriv->dot11PrivacyAlgrthm == _AES_) || + (psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_)) { + SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION( +@@ -1880,6 +2214,9 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable) + SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION( + u1H2CRemoteWakeCtrlParm, 1); + } ++ ++ SET_H2CCMD_REMOTE_WAKE_CTRL_FW_PARSING_UNTIL_WAKEUP( ++ u1H2CRemoteWakeCtrlParm, 1); + } + #ifdef CONFIG_PNO_SUPPORT + else { +@@ -1904,15 +2241,10 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable) + #endif //CONFIG_P2P_WOWLAN + + +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(adapter, ++ ret = rtw_hal_fill_h2c_cmd(adapter, + H2C_REMOTE_WAKE_CTRL, + H2C_REMOTE_WAKE_CTRL_LEN, + u1H2CRemoteWakeCtrlParm); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } + return ret; + } + +@@ -1929,15 +2261,10 @@ static u8 rtw_hal_set_global_info_cmd(_adapter* adapter, u8 group_alg, u8 pairwi + SET_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(u1H2CAOACGlobalInfoParm, + group_alg); + +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(adapter, ++ ret = rtw_hal_fill_h2c_cmd(adapter, + H2C_AOAC_GLOBAL_INFO, + H2C_AOAC_GLOBAL_INFO_LEN, + u1H2CAOACGlobalInfoParm); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } + + return ret; + } +@@ -1957,6 +2284,7 @@ static u8 rtw_hal_set_scan_offload_info_cmd(_adapter* adapter, + rsvdpageloc->LocScanInfo, rsvdpageloc->LocSSIDInfo); + + SET_H2CCMD_AOAC_NLO_FUN_EN(u1H2CScanOffloadInfoParm, enable); ++ SET_H2CCMD_AOAC_NLO_IPS_EN(u1H2CScanOffloadInfoParm, enable); + SET_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(u1H2CScanOffloadInfoParm, + rsvdpageloc->LocScanInfo); + SET_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(u1H2CScanOffloadInfoParm, +@@ -1964,15 +2292,10 @@ static u8 rtw_hal_set_scan_offload_info_cmd(_adapter* adapter, + SET_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(u1H2CScanOffloadInfoParm, + rsvdpageloc->LocSSIDInfo); + +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(adapter, ++ ret = rtw_hal_fill_h2c_cmd(adapter, + H2C_D0_SCAN_OFFLOAD_INFO, + H2C_SCAN_OFFLOAD_CTRL_LEN, + u1H2CScanOffloadInfoParm); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } + return ret; + } + #endif //CONFIG_PNO_SUPPORT +@@ -1990,7 +2313,7 @@ void rtw_hal_set_fw_wow_related_cmd(_adapter* padapter, u8 enable) + DBG_871X_LEVEL(_drv_always_, "+%s()+: enable=%d\n", __func__, enable); + _func_enter_; + +- rtw_hal_set_wowlan_ctrl_cmd(padapter, enable); ++ rtw_hal_set_wowlan_ctrl_cmd(padapter, enable, _FALSE); + + if (enable) { + rtw_hal_set_global_info_cmd(padapter, +@@ -2018,19 +2341,271 @@ _func_enter_; + #if 0 + { + u32 PageSize = 0; +- rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize); ++ rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize); + dump_TX_FIFO(padapter, 4, PageSize); + } + #endif + + rtw_hal_set_remote_wake_ctrl_cmd(padapter, enable); +- rtw_hal_set_wowlan_ctrl_cmd(padapter, enable); + } + _func_exit_; + DBG_871X_LEVEL(_drv_always_, "-%s()-\n", __func__); + } + #endif //CONFIG_WOWLAN + ++#ifdef CONFIG_AP_WOWLAN ++static u8 rtw_hal_set_ap_wowlan_ctrl_cmd(_adapter *adapter, u8 enable) ++{ ++ struct security_priv *psecpriv = &adapter->securitypriv; ++ struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); ++ struct hal_ops *pHalFunc = &adapter->HalFunc; ++ ++ u8 u1H2CAPWoWlanCtrlParm[H2C_AP_WOW_GPIO_CTRL_LEN] = {0}; ++ u8 gpionum = 0, gpio_dur = 0; ++ u8 gpio_pulse = enable; ++ u8 sdio_wakeup_enable = 1; ++ u8 gpio_high_active = 0; ++ u8 ret = _FAIL; ++ ++#ifdef CONFIG_GPIO_WAKEUP ++ gpio_high_active = ppwrpriv->is_high_active; ++ gpionum = WAKEUP_GPIO_IDX; ++ sdio_wakeup_enable = 0; ++#endif /*CONFIG_GPIO_WAKEUP*/ ++ ++ DBG_871X("%s(): enable=%d\n", __func__, enable); ++ ++ SET_H2CCMD_AP_WOW_GPIO_CTRL_INDEX(u1H2CAPWoWlanCtrlParm, ++ gpionum); ++ SET_H2CCMD_AP_WOW_GPIO_CTRL_PLUS(u1H2CAPWoWlanCtrlParm, ++ gpio_pulse); ++ SET_H2CCMD_AP_WOW_GPIO_CTRL_HIGH_ACTIVE(u1H2CAPWoWlanCtrlParm, ++ gpio_high_active); ++ SET_H2CCMD_AP_WOW_GPIO_CTRL_EN(u1H2CAPWoWlanCtrlParm, ++ enable); ++ SET_H2CCMD_AP_WOW_GPIO_CTRL_DURATION(u1H2CAPWoWlanCtrlParm, ++ gpio_dur); ++ ++ ret = rtw_hal_fill_h2c_cmd(adapter, ++ H2C_AP_WOW_GPIO_CTRL, ++ H2C_AP_WOW_GPIO_CTRL_LEN, ++ u1H2CAPWoWlanCtrlParm); ++ ++ return ret; ++} ++ ++static u8 rtw_hal_set_ap_offload_ctrl_cmd(_adapter *adapter, u8 enable) ++{ ++ struct hal_ops *pHalFunc = &adapter->HalFunc; ++ u8 u1H2CAPOffloadCtrlParm[H2C_WOWLAN_LEN] = {0}; ++ u8 ret = _FAIL; ++ ++ DBG_871X("%s(): bFuncEn=%d\n", __func__, enable); ++ ++ SET_H2CCMD_AP_WOWLAN_EN(u1H2CAPOffloadCtrlParm, enable); ++ ++ ret = rtw_hal_fill_h2c_cmd(adapter, ++ H2C_AP_OFFLOAD, ++ H2C_AP_OFFLOAD_LEN, ++ u1H2CAPOffloadCtrlParm); ++ ++ return ret; ++} ++ ++static u8 rtw_hal_set_ap_ps_cmd(_adapter *adapter, u8 enable) ++{ ++ struct hal_ops *pHalFunc = &adapter->HalFunc; ++ u8 ap_ps_parm[H2C_AP_PS_LEN] = {0}; ++ u8 ret = _FAIL; ++ ++ DBG_871X("%s(): enable=%d\n" , __func__ , enable); ++ ++ SET_H2CCMD_AP_WOW_PS_EN(ap_ps_parm, enable); ++#ifndef CONFIG_USB_HCI ++ SET_H2CCMD_AP_WOW_PS_32K_EN(ap_ps_parm, enable); ++#endif /*CONFIG_USB_HCI*/ ++ SET_H2CCMD_AP_WOW_PS_RF(ap_ps_parm, enable); ++ ++ if (enable) ++ SET_H2CCMD_AP_WOW_PS_DURATION(ap_ps_parm, 0x32); ++ else ++ SET_H2CCMD_AP_WOW_PS_DURATION(ap_ps_parm, 0x0); ++ ++ ret = rtw_hal_fill_h2c_cmd(adapter, H2C_SAP_PS_, ++ H2C_AP_PS_LEN, ap_ps_parm); ++ ++ return ret; ++} ++ ++static void rtw_hal_set_ap_rsvdpage_loc_cmd(PADAPTER padapter, ++ PRSVDPAGE_LOC rsvdpageloc) ++{ ++ struct hal_ops *pHalFunc = &padapter->HalFunc; ++ u8 rsvdparm[H2C_AOAC_RSVDPAGE_LOC_LEN] = {0}; ++ u8 ret = _FAIL, header = 0; ++ ++ if (pHalFunc->fill_h2c_cmd == NULL) { ++ DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); ++ return; ++ } ++ ++ header = rtw_read8(padapter, REG_BCNQ_BDNY); ++ ++ DBG_871X("%s: beacon: %d, probeRsp: %d, header:0x%02x\n", __func__, ++ rsvdpageloc->LocApOffloadBCN, ++ rsvdpageloc->LocProbeRsp, ++ header); ++ ++ SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_BCN(rsvdparm, ++ rsvdpageloc->LocApOffloadBCN + header); ++ ++ ret = rtw_hal_fill_h2c_cmd(padapter, H2C_BCN_RSVDPAGE, ++ H2C_BCN_RSVDPAGE_LEN, rsvdparm); ++ ++ if (ret == _FAIL) ++ DBG_871X("%s: H2C_BCN_RSVDPAGE cmd fail\n", __func__); ++ ++ rtw_msleep_os(10); ++ ++ _rtw_memset(&rsvdparm, 0, sizeof(rsvdparm)); ++ ++ SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_ProbeRsp(rsvdparm, ++ rsvdpageloc->LocProbeRsp + header); ++ ++ ret = rtw_hal_fill_h2c_cmd(padapter, H2C_PROBERSP_RSVDPAGE, ++ H2C_PROBERSP_RSVDPAGE_LEN, rsvdparm); ++ ++ if (ret == _FAIL) ++ DBG_871X("%s: H2C_PROBERSP_RSVDPAGE cmd fail\n", __func__); ++ ++ rtw_msleep_os(10); ++} ++ ++static void rtw_hal_set_fw_ap_wow_related_cmd(_adapter *padapter, u8 enable) ++{ ++ rtw_hal_set_ap_offload_ctrl_cmd(padapter, enable); ++ rtw_hal_set_ap_wowlan_ctrl_cmd(padapter, enable); ++ rtw_hal_set_ap_ps_cmd(padapter, enable); ++} ++ ++static void rtw_hal_ap_wow_enable(_adapter *padapter) ++{ ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct hal_ops *pHalFunc = &padapter->HalFunc; ++ struct sta_info *psta = NULL; ++#ifdef DBG_CHECK_FW_PS_STATE ++ struct dvobj_priv *psdpriv = padapter->dvobj; ++ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; ++#endif /*DBG_CHECK_FW_PS_STATE*/ ++ int res; ++ u16 media_status_rpt; ++ ++ DBG_871X("%s, WOWLAN_AP_ENABLE\n", __func__); ++#ifdef DBG_CHECK_FW_PS_STATE ++ if (rtw_fw_ps_state(padapter) == _FAIL) { ++ pdbgpriv->dbg_enwow_dload_fw_fail_cnt++; ++ DBG_871X_LEVEL(_drv_always_, "wowlan enable no leave 32k\n"); ++ } ++#endif /*DBG_CHECK_FW_PS_STATE*/ ++ ++ /* 1. Download WOWLAN FW*/ ++ rtw_hal_fw_dl(padapter, _TRUE); ++ ++ media_status_rpt = RT_MEDIA_CONNECT; ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, ++ (u8 *)&media_status_rpt); ++ ++ issue_beacon(padapter, 0); ++ ++ rtw_msleep_os(2); ++ ++ if (IS_HARDWARE_TYPE_8188E(padapter)) ++ rtw_hal_disable_tx_report(padapter); ++ ++ /* RX DMA stop */ ++ res = rtw_hal_pause_rx_dma(padapter); ++ if (res == _FAIL) ++ DBG_871X_LEVEL(_drv_always_, "[WARNING] pause RX DMA fail\n"); ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ /* Enable CPWM2 only. */ ++ res = rtw_hal_enable_cpwm2(padapter); ++ if (res == _FAIL) ++ DBG_871X_LEVEL(_drv_always_, "[WARNING] enable cpwm2 fail\n"); ++#endif ++ ++#ifdef CONFIG_GPIO_WAKEUP ++ rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _TRUE); ++#endif ++ /* 5. Set Enable WOWLAN H2C command. */ ++ DBG_871X_LEVEL(_drv_always_, "Set Enable AP WOWLan cmd\n"); ++ rtw_hal_set_fw_ap_wow_related_cmd(padapter, 1); ++ ++ rtw_write8(padapter, REG_MCUTST_WOWLAN, 0); ++#ifdef CONFIG_USB_HCI ++ if (padapter->intf_stop) ++ padapter->intf_stop(padapter); ++#ifdef CONFIG_CONCURRENT_MODE ++ if (rtw_buddy_adapter_up(padapter))/*free buddy adapter's resource*/ ++ padapter->pbuddy_adapter->intf_stop(padapter->pbuddy_adapter); ++#endif /*CONFIG_CONCURRENT_MODE*/ ++ /* Invoid SE0 reset signal during suspending*/ ++ rtw_write8(padapter, REG_RSV_CTRL, 0x20); ++ rtw_write8(padapter, REG_RSV_CTRL, 0x60); ++#endif /*CONFIG_USB_HCI*/ ++} ++ ++static void rtw_hal_ap_wow_disable(_adapter *padapter) ++{ ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); ++ struct hal_ops *pHalFunc = &padapter->HalFunc; ++#ifdef DBG_CHECK_FW_PS_STATE ++ struct dvobj_priv *psdpriv = padapter->dvobj; ++ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; ++#endif /*DBG_CHECK_FW_PS_STATE*/ ++ u16 media_status_rpt; ++ u8 val8; ++ ++ DBG_871X("%s, WOWLAN_AP_DISABLE\n", __func__); ++ /* 1. Read wakeup reason*/ ++ pwrctl->wowlan_wake_reason = rtw_read8(padapter, REG_MCUTST_WOWLAN); ++ ++ DBG_871X_LEVEL(_drv_always_, "wakeup_reason: 0x%02x\n", ++ pwrctl->wowlan_wake_reason); ++ ++ rtw_hal_set_fw_ap_wow_related_cmd(padapter, 0); ++ ++ rtw_msleep_os(2); ++#ifdef DBG_CHECK_FW_PS_STATE ++ if (rtw_fw_ps_state(padapter) == _FAIL) { ++ pdbgpriv->dbg_diswow_dload_fw_fail_cnt++; ++ DBG_871X_LEVEL(_drv_always_, "wowlan enable no leave 32k\n"); ++ } ++#endif /*DBG_CHECK_FW_PS_STATE*/ ++ ++ if (IS_HARDWARE_TYPE_8188E(padapter)) ++ rtw_hal_enable_tx_report(padapter); ++ ++ rtw_hal_force_enable_rxdma(padapter); ++ ++ rtw_hal_fw_dl(padapter, _FALSE); ++ ++#ifdef CONFIG_GPIO_WAKEUP ++ val8 = (pwrctl->is_high_active == 0) ? 1 : 0; ++ DBG_871X_LEVEL(_drv_always_, "Set Wake GPIO to default(%d).\n", val8); ++ rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, val8); ++#endif ++ media_status_rpt = RT_MEDIA_CONNECT; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, ++ (u8 *)&media_status_rpt); ++ ++ issue_beacon(padapter, 0); ++} ++#endif /*CONFIG_AP_WOWLAN*/ ++ + #ifdef CONFIG_P2P_WOWLAN + static int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode) + { +@@ -2109,7 +2684,7 @@ static void rtw_hal_construct_P2PBeacon(_adapter *padapter, u8 *pframe, u32 *pLe + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); +@@ -2271,27 +2846,13 @@ static void rtw_hal_construct_P2PBeacon(_adapter *padapter, u8 *pframe, u32 *pLe + + pframe += len; + pktlen += len; +-#ifdef CONFIG_WFD +-#ifdef CONFIG_IOCTL_CFG80211 +- if(_TRUE == pwdinfo->wfd_info->wfd_enable) +-#endif //CONFIG_IOCTL_CFG80211 +- { +- len = build_beacon_wfd_ie( pwdinfo, pframe ); +- } +-#ifdef CONFIG_IOCTL_CFG80211 +- else +- { +- len = 0; +- if(pmlmepriv->wfd_beacon_ie && pmlmepriv->wfd_beacon_ie_len>0) +- { +- len = pmlmepriv->wfd_beacon_ie_len; +- _rtw_memcpy(pframe, pmlmepriv->wfd_beacon_ie, len); +- } +- } +-#endif //CONFIG_IOCTL_CFG80211 ++ ++ #ifdef CONFIG_WFD ++ len = rtw_append_beacon_wfd_ie(padapter, pframe); + pframe += len; + pktlen += len; +-#endif //CONFIG_WFD ++ #endif ++ + } + #endif //CONFIG_P2P + +@@ -2407,7 +2968,7 @@ static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *p + u32 pktlen; + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + #ifdef CONFIG_INTEL_WIDI + u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 }; + #endif //CONFIG_INTEL_WIDI +@@ -2419,7 +2980,7 @@ static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *p + DBG_871X("%s\n", __FUNCTION__); + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + +- mac = myid(&(padapter->eeprompriv)); ++ mac = adapter_mac_addr(padapter); + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; +@@ -2579,7 +3140,7 @@ static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *p + // Value: + if (pwdinfo->external_uuid == 0) { + _rtw_memset( wpsie + wpsielen, 0x0, 16 ); +- _rtw_memcpy( wpsie + wpsielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(wpsie + wpsielen, mac, ETH_ALEN); + } else { + _rtw_memcpy( wpsie + wpsielen, pwdinfo->uuid, 0x10 ); + } +@@ -2694,24 +3255,10 @@ static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *p + } + + #ifdef CONFIG_WFD +-#ifdef CONFIG_IOCTL_CFG80211 +- if ( _TRUE == pwdinfo->wfd_info->wfd_enable ) +-#endif //CONFIG_IOCTL_CFG80211 +- { +- wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe, 0); +- pframe += wfdielen; +- pktlen += wfdielen; +- } +-#ifdef CONFIG_IOCTL_CFG80211 +- else if (pmlmepriv->wfd_probe_resp_ie != NULL && pmlmepriv->wfd_probe_resp_ie_len>0) +- { +- //WFD IE +- _rtw_memcpy(pframe, pmlmepriv->wfd_probe_resp_ie, pmlmepriv->wfd_probe_resp_ie_len); +- pktlen += pmlmepriv->wfd_probe_resp_ie_len; +- pframe += pmlmepriv->wfd_probe_resp_ie_len; +- } +-#endif //CONFIG_IOCTL_CFG80211 +-#endif //CONFIG_WFD ++ wfdielen = rtw_append_probe_resp_wfd_ie(padapter, pframe); ++ pframe += wfdielen; ++ pktlen += wfdielen; ++#endif + + *pLength = pktlen; + +@@ -2756,7 +3303,7 @@ static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pL + + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + + //for debug + u8 *dbgbuf = pframe; +@@ -2770,8 +3317,8 @@ static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pL + + //RA, filled by FW + _rtw_memset(pwlanhdr->addr1, 0, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0); + SetFrameSubType(pframe, WIFI_ACTION); +@@ -2983,7 +3530,7 @@ static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pL + p2pielen += 2; + + // Value: +- _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); + p2pielen += ETH_ALEN; + + // Channel List +@@ -3101,7 +3648,7 @@ static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pL + + // Value: + // P2P Device Address +- _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); + p2pielen += ETH_ALEN; + + // Config Method +@@ -3167,7 +3714,7 @@ static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pL + wfdielen = build_nego_resp_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pktlen += wfdielen; +-#endif //CONFIG_WFD ++#endif + + *pLength = pktlen; + #if 0 +@@ -3203,7 +3750,7 @@ static void rtw_hal_construct_P2PInviteRsp(_adapter * padapter, u8 * pframe, u32 + #endif + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + + //struct xmit_frame *pmgntframe; + //struct pkt_attrib *pattrib; +@@ -3228,7 +3775,7 @@ static void rtw_hal_construct_P2PInviteRsp(_adapter * padapter, u8 * pframe, u32 + + //RA fill by FW + _rtw_memset(pwlanhdr->addr1, 0, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + + //BSSID fill by FW + _rtw_memset(pwlanhdr->addr3, 0, ETH_ALEN); +@@ -3332,7 +3879,7 @@ static void rtw_hal_construct_P2PInviteRsp(_adapter * padapter, u8 * pframe, u32 + + // Value: + // P2P Device Address for GO +- _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); + p2pielen += ETH_ALEN; + + } +@@ -3447,7 +3994,7 @@ static void rtw_hal_construct_P2PInviteRsp(_adapter * padapter, u8 * pframe, u32 + wfdielen = build_invitation_resp_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pktlen += wfdielen; +-#endif //CONFIG_WFD ++#endif + + *pLength = pktlen; + +@@ -3477,7 +4024,7 @@ static void rtw_hal_construct_P2PProvisionDisRsp(_adapter * padapter, u8 * pfram + u32 pktlen; + #ifdef CONFIG_WFD + u32 wfdielen = 0; +-#endif //CONFIG_WFD ++#endif + + //struct xmit_frame *pmgntframe; + //struct pkt_attrib *pattrib; +@@ -3502,8 +4049,8 @@ static void rtw_hal_construct_P2PProvisionDisRsp(_adapter * padapter, u8 * pfram + + //RA filled by FW + _rtw_memset(pwlanhdr->addr1, 0, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + + SetSeqNum(pwlanhdr,0); + SetFrameSubType(pframe, WIFI_ACTION); +@@ -3560,7 +4107,7 @@ static void rtw_hal_construct_P2PProvisionDisRsp(_adapter * padapter, u8 * pfram + wfdielen = build_provdisc_resp_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pktlen += wfdielen; +-#endif //CONFIG_WFD ++#endif + + *pLength = pktlen; + +@@ -3595,15 +4142,10 @@ u8 rtw_hal_set_FwP2PRsvdPage_cmd(_adapter* adapter, PRSVDPAGE_LOC rsvdpageloc) + SET_H2CCMD_RSVDPAGE_LOC_P2P_PD_RSP(u1H2CP2PRsvdPageParm, rsvdpageloc->LocBTQosNull); + + //FillH2CCmd8723B(padapter, H2C_8723B_P2P_OFFLOAD_RSVD_PAGE, H2C_P2PRSVDPAGE_LOC_LEN, u1H2CP2PRsvdPageParm); +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(adapter, ++ ret = rtw_hal_fill_h2c_cmd(adapter, + H2C_P2P_OFFLOAD_RSVD_PAGE, + H2C_P2PRSVDPAGE_LOC_LEN, + u1H2CP2PRsvdPageParm); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } + + return ret; + } +@@ -3642,16 +4184,10 @@ u8 rtw_hal_set_p2p_wowlan_offload_cmd(_adapter* adapter) + offload_cmd = (u8*)p2p_wowlan_offload; + DBG_871X("p2p_wowlan_offload: %x:%x:%x\n",offload_cmd[0],offload_cmd[1],offload_cmd[2]); + +- if (pHalFunc->fill_h2c_cmd != NULL) { +- ret = pHalFunc->fill_h2c_cmd(adapter, ++ ret = rtw_hal_fill_h2c_cmd(adapter, + H2C_P2P_OFFLOAD, + H2C_P2P_OFFLOAD_LEN, + offload_cmd); +- } else { +- DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__); +- ret = _FAIL; +- } +- + return ret; + + //FillH2CCmd8723B(adapter, H2C_8723B_P2P_OFFLOAD, sizeof(struct P2P_WoWlan_Offload_t), (u8 *)p2p_wowlan_offload); +@@ -3678,7 +4214,7 @@ static void rtw_hal_construct_beacon(_adapter *padapter, + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); +@@ -3787,7 +4323,7 @@ static void rtw_hal_construct_PSPoll(_adapter *padapter, + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + // TA. +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + + *pLength = 16; + } +@@ -3827,19 +4363,19 @@ static void rtw_hal_construct_NullFunctionData( + case Ndis802_11Infrastructure: + SetToDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); + break; + case Ndis802_11APMode: + SetFrDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + break; + case Ndis802_11IBSS: + default: + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + break; + } +@@ -3865,17 +4401,57 @@ static void rtw_hal_construct_NullFunctionData( + *pLength = pktlen; + } + +-#ifdef CONFIG_WOWLAN +-// +-// Description: +-// Construct the ARP response packet to support ARP offload. +-// +-static void rtw_hal_construct_ARPRsp( +- PADAPTER padapter, +- u8 *pframe, +- u32 *pLength, +- u8 *pIPAddress +- ) ++void rtw_hal_construct_ProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, ++ u8 *StaAddr, BOOLEAN bHideSSID) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u8 *mac, *bssid; ++ u32 pktlen; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ ++ /*DBG_871X("%s\n", __FUNCTION__);*/ ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = adapter_mac_addr(padapter); ++ bssid = cur_network->MacAddress; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, 0); ++ SetFrameSubType(fctrl, WIFI_PROBERSP); ++ ++ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ pframe += pktlen; ++ ++ if (cur_network->IELength > MAX_IE_SZ) ++ return; ++ ++ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); ++ pframe += cur_network->IELength; ++ pktlen += cur_network->IELength; ++ ++ *pLength = pktlen; ++} ++ ++#ifdef CONFIG_WOWLAN ++// ++// Description: ++// Construct the ARP response packet to support ARP offload. ++// ++static void rtw_hal_construct_ARPRsp( ++ PADAPTER padapter, ++ u8 *pframe, ++ u32 *pLength, ++ u8 *pIPAddress ++ ) + { + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; +@@ -3904,7 +4480,7 @@ static void rtw_hal_construct_ARPRsp( + //SetFrameSubType(fctrl, 0); + SetToDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0); +@@ -3966,13 +4542,13 @@ static void rtw_hal_construct_ARPRsp( + SET_ARP_PKT_HW_ADDR_LEN(pARPRspPkt, 6); + SET_ARP_PKT_PROTOCOL_ADDR_LEN(pARPRspPkt, 4); + SET_ARP_PKT_OPERATION(pARPRspPkt, 0x0200); // ARP response +- SET_ARP_PKT_SENDER_MAC_ADDR(pARPRspPkt, myid(&(padapter->eeprompriv))); ++ SET_ARP_PKT_SENDER_MAC_ADDR(pARPRspPkt, adapter_mac_addr(padapter)); + SET_ARP_PKT_SENDER_IP_ADDR(pARPRspPkt, pIPAddress); + #ifdef CONFIG_ARP_KEEP_ALIVE +- if (rtw_gw_addr_query(padapter)==0) { ++ if (!is_zero_mac_addr(pmlmepriv->gw_mac_addr)) { + SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, pmlmepriv->gw_mac_addr); + SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pmlmepriv->gw_ip); +- } ++ } + else + #endif + { +@@ -4046,7 +4622,7 @@ static void rtw_hal_construct_ProbeReq(_adapter *padapter, u8 *pframe, + u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; +- mac = myid(&(padapter->eeprompriv)); ++ mac = adapter_mac_addr(padapter); + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; +@@ -4245,7 +4821,7 @@ static void rtw_hal_construct_GTKRsp( + get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + _rtw_memcpy(pwlanhdr->addr2, +- myid(&(padapter->eeprompriv)), ETH_ALEN); ++ adapter_mac_addr(padapter), ETH_ALEN); + + _rtw_memcpy(pwlanhdr->addr3, + get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +@@ -4312,47 +4888,21 @@ static void rtw_hal_construct_GTKRsp( + } + #endif //CONFIG_GTK_OL + +- +-// +-// Description: Fill the reserved packets that FW will use to RSVD page. +-// Now we just send 4 types packet to rsvd page. +-// (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. +-// Input: +-// finished - FALSE:At the first time we will send all the packets as a large packet to Hw, +-// so we need to set the packet length to total lengh. +-// TRUE: At the second time, we should send the first packet (default:beacon) +-// to Hw again and set the lengh in descriptor to the real beacon lengh. +-// 2009.10.15 by tynli. +-// +-//Page Size = 128: 8188e, 8723a/b, 8192c/d, +-//Page Size = 256: 8192e, 8821a +-//Page Size = 512: 8812a +-void rtw_hal_set_fw_rsvd_page(_adapter* adapter, bool finished) ++void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, ++ u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len, ++ RSVDPAGE_LOC *rsvd_page_loc) + { +- PHAL_DATA_TYPE pHalData; +- struct xmit_frame *pcmdframe; +- struct pkt_attrib *pattrib; +- struct xmit_priv *pxmitpriv; ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); + struct mlme_ext_priv *pmlmeext; + struct mlme_ext_info *pmlmeinfo; +- struct pwrctrl_priv *pwrctl; +- struct mlme_priv *pmlmepriv = &adapter->mlmepriv; +- struct hal_ops *pHalFunc = &adapter->HalFunc; +- u32 BeaconLength = 0, ProbeRspLength = 0, PSPollLength = 0; +- u32 NullDataLength = 0, QosNullLength = 0, BTQosNullLength = 0; +- u32 ProbeReqLength = 0, NullFunctionDataLength = 0; +- u8 TxDescLen = TXDESC_SIZE, TxDescOffset = TXDESC_OFFSET; +- u8 TotalPageNum=0, CurtPktPageNum=0, RsvdPageNum=0; +- u8 *ReservedPagePacket; +- u16 BufIndex = 0; +- u32 TotalPacketLen = 0, MaxRsvdPageBufSize = 0, PageSize = 0; +- RSVDPAGE_LOC RsvdPageLoc; +-#ifdef CONFIG_WOWLAN + u32 ARPLegnth = 0, GTKLegnth = 0, PNOLength = 0, ScanInfoLength = 0; +- u32 SSIDLegnth = 0; +- struct security_priv *psecuritypriv = &adapter->securitypriv; //added by xx ++ u32 SSIDLegnth = 0, ProbeReqLength = 0; ++ u8 CurtPktPageNum = 0; + u8 currentip[4]; + u8 cur_dot11txpn[8]; ++ + #ifdef CONFIG_GTK_OL + struct sta_priv *pstapriv = &adapter->stapriv; + struct sta_info * psta; +@@ -4360,177 +4910,51 @@ void rtw_hal_set_fw_rsvd_page(_adapter* adapter, bool finished) + u8 kck[RTW_KCK_LEN]; + #endif //CONFIG_GTK_OL + #ifdef CONFIG_PNO_SUPPORT +- int index; ++ int pno_index; + u8 ssid_num; + #endif //CONFIG_PNO_SUPPORT +-#endif +-#ifdef DBG_CONFIG_ERROR_DETECT +- struct sreset_priv *psrtpriv; +-#endif // DBG_CONFIG_ERROR_DETECT +- +-#ifdef CONFIG_P2P_WOWLAN +- u32 P2PNegoRspLength = 0, P2PInviteRspLength = 0, P2PPDRspLength = 0, P2PProbeRspLength = 0, P2PBCNLength = 0; +-#endif + +- pHalData = GET_HAL_DATA(adapter); +-#ifdef DBG_CONFIG_ERROR_DETECT +- psrtpriv = &pHalData->srestpriv; +-#endif +- pxmitpriv = &adapter->xmitpriv; + pmlmeext = &adapter->mlmeextpriv; + pmlmeinfo = &pmlmeext->mlmext_info; +- pwrctl = adapter_to_pwrctl(adapter); +- +- rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize); +- DBG_871X("%s PAGE_SIZE: %d\n", __func__, PageSize); +- if (pHalFunc->hal_get_tx_buff_rsvd_page_num != NULL) { +- RsvdPageNum = +- pHalFunc->hal_get_tx_buff_rsvd_page_num(adapter, _TRUE); +- DBG_871X("%s RsvdPageNUm: %d\n", __func__, RsvdPageNum); +- } else { +- DBG_871X("[Error]: %s, missing tx_buff_rsvd_page_num func!!\n", +- __func__); +- } +- +- MaxRsvdPageBufSize = RsvdPageNum*PageSize; +- +- pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv); +- if (pcmdframe == NULL) { +- DBG_871X("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); +- return; +- } +- +- ReservedPagePacket = pcmdframe->buf_addr; +- _rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC)); +- +- //beacon * 2 pages +- BufIndex = TxDescOffset; +- rtw_hal_construct_beacon(adapter, +- &ReservedPagePacket[BufIndex], &BeaconLength); +- +- // When we count the first page size, we need to reserve description size for the RSVD +- // packet, it will be filled in front of the packet in TXPKTBUF. +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + BeaconLength); +- //If we don't add 1 more page, the WOWLAN function has a problem. Baron thinks it's a bug of firmware +- if (CurtPktPageNum == 1) +- CurtPktPageNum += 1; +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +- //ps-poll * 1 page +- RsvdPageLoc.LocPsPoll = TotalPageNum; +- DBG_871X("LocPsPoll: %d\n", RsvdPageLoc.LocPsPoll); +- rtw_hal_construct_PSPoll(adapter, +- &ReservedPagePacket[BufIndex], &PSPollLength); +- rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- PSPollLength, _TRUE, _FALSE, _FALSE); +- +- CurtPktPageNum = (u8)PageNum((TxDescLen + PSPollLength), PageSize); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +-#ifdef CONFIG_BT_COEXIST +- //BT Qos null data * 1 page +- RsvdPageLoc.LocBTQosNull = TotalPageNum; +- DBG_871X("LocBTQosNull: %d\n", RsvdPageLoc.LocBTQosNull); +- rtw_hal_construct_NullFunctionData( +- adapter, +- &ReservedPagePacket[BufIndex], +- &BTQosNullLength, +- get_my_bssid(&pmlmeinfo->network), +- _TRUE, 0, 0, _FALSE); +- rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- BTQosNullLength, _FALSE, _TRUE, _FALSE); +- +- CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength, PageSize); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +-#endif //CONFIG_BT_COEXIT +- +- //null data * 1 page +- RsvdPageLoc.LocNullData = TotalPageNum; +- DBG_871X("LocNullData: %d\n", RsvdPageLoc.LocNullData); +- rtw_hal_construct_NullFunctionData( +- adapter, +- &ReservedPagePacket[BufIndex], +- &NullDataLength, +- get_my_bssid(&pmlmeinfo->network), +- _FALSE, 0, 0, _FALSE); +- rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- NullDataLength, _FALSE, _FALSE, _FALSE); +- +- CurtPktPageNum = (u8)PageNum(TxDescLen + NullDataLength, PageSize); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +- //Qos null data * 1 page +- RsvdPageLoc.LocQosNull = TotalPageNum; +- DBG_871X("LocQosNull: %d\n", RsvdPageLoc.LocQosNull); +- rtw_hal_construct_NullFunctionData( +- adapter, +- &ReservedPagePacket[BufIndex], +- &QosNullLength, +- get_my_bssid(&pmlmeinfo->network), +- _TRUE, 0, 0, _FALSE); +- rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- QosNullLength, _FALSE, _FALSE, _FALSE); +- +- CurtPktPageNum = (u8)PageNum(TxDescLen + QosNullLength, PageSize); +- +- TotalPageNum += CurtPktPageNum; + +- BufIndex += (CurtPktPageNum*PageSize); +- +-#ifdef CONFIG_WOWLAN +- if (pwrctl->wowlan_mode == _TRUE && +- check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ if (pwrctl->wowlan_pno_enable == _FALSE) { + //ARP RSP * 1 page + rtw_get_current_ip_address(adapter, currentip); + +- RsvdPageLoc.LocArpRsp= TotalPageNum; ++ rsvd_page_loc->LocArpRsp = *page_num; + +- rtw_hal_construct_ARPRsp( +- adapter, +- &ReservedPagePacket[BufIndex], +- &ARPLegnth, +- currentip); ++ DBG_871X("LocArpRsp: %d\n", rsvd_page_loc->LocArpRsp); ++ ++ rtw_hal_construct_ARPRsp( adapter, &pframe[index], ++ &ARPLegnth, currentip); + + rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], ++ &pframe[index-tx_desc], + ARPLegnth, _FALSE, _FALSE, _TRUE); + +- CurtPktPageNum = (u8)PageNum(TxDescLen + ARPLegnth, PageSize); ++ CurtPktPageNum = (u8)PageNum(tx_desc + ARPLegnth, page_size); + +- TotalPageNum += CurtPktPageNum; ++ *page_num += CurtPktPageNum; + +- BufIndex += (CurtPktPageNum*PageSize); ++ index += (CurtPktPageNum * page_size); + + //3 SEC IV * 1 page + rtw_get_sec_iv(adapter, cur_dot11txpn, + get_my_bssid(&pmlmeinfo->network)); + +- RsvdPageLoc.LocRemoteCtrlInfo = TotalPageNum; ++ rsvd_page_loc->LocRemoteCtrlInfo = *page_num; + +- _rtw_memcpy(ReservedPagePacket+BufIndex-TxDescLen, +- cur_dot11txpn, _AES_IV_LEN_); ++ DBG_871X("LocRemoteCtrlInfo: %d\n", rsvd_page_loc->LocRemoteCtrlInfo); + +- CurtPktPageNum = (u8)PageNum(_AES_IV_LEN_, PageSize); ++ _rtw_memcpy(pframe+index-tx_desc, cur_dot11txpn, _AES_IV_LEN_); + +- TotalPageNum += CurtPktPageNum; ++ CurtPktPageNum = (u8)PageNum(_AES_IV_LEN_, page_size); ++ ++ *page_num += CurtPktPageNum; ++ ++ *total_pkt_len = index + _AES_IV_LEN_; + #ifdef CONFIG_GTK_OL +- BufIndex += (CurtPktPageNum*PageSize); ++ index += (CurtPktPageNum * page_size); + + //if the ap staion info. exists, get the kek, kck from staion info. + psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); +@@ -4545,11 +4969,30 @@ void rtw_hal_set_fw_rsvd_page(_adapter* adapter, bool finished) + } + + //3 KEK, KCK +- RsvdPageLoc.LocGTKInfo = TotalPageNum; +- _rtw_memcpy(ReservedPagePacket+BufIndex-TxDescLen, +- kck, RTW_KCK_LEN); +- _rtw_memcpy(ReservedPagePacket+BufIndex-TxDescLen+RTW_KCK_LEN, +- kek, RTW_KEK_LEN); ++ rsvd_page_loc->LocGTKInfo = *page_num; ++ DBG_871X("LocGTKInfo: %d\n", rsvd_page_loc->LocGTKInfo); ++ ++ if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_8812(adapter)) { ++ struct security_priv *psecpriv = NULL; ++ ++ psecpriv = &adapter->securitypriv; ++ _rtw_memcpy(pframe+index-tx_desc, ++ &psecpriv->dot11PrivacyAlgrthm, 1); ++ _rtw_memcpy(pframe+index-tx_desc+1, ++ &psecpriv->dot118021XGrpPrivacy, 1); ++ _rtw_memcpy(pframe+index-tx_desc+2, ++ kck, RTW_KCK_LEN); ++ _rtw_memcpy(pframe+index-tx_desc+2+RTW_KCK_LEN, ++ kek, RTW_KEK_LEN); ++ CurtPktPageNum = (u8)PageNum(tx_desc + 2 + RTW_KCK_LEN + RTW_KEK_LEN, page_size); ++ } else { ++ _rtw_memcpy(pframe+index-tx_desc, kck, RTW_KCK_LEN); ++ _rtw_memcpy(pframe+index-tx_desc+RTW_KCK_LEN, kek, RTW_KEK_LEN); ++ CurtPktPageNum = (u8)PageNum(tx_desc + RTW_KCK_LEN + RTW_KEK_LEN, page_size); ++ } ++ ++ ++ + #if 0 + { + int i; +@@ -4561,2037 +5004,3373 @@ void rtw_hal_set_fw_rsvd_page(_adapter* adapter, bool finished) + printk(" %02x ", kek[i]); + printk("\n"); + } +-#endif +- +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: KEK KCK %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], +- // (TxDescLen + RTW_KCK_LEN + RTW_KEK_LEN)); + +- CurtPktPageNum = (u8)PageNum(TxDescLen + RTW_KCK_LEN + RTW_KEK_LEN, PageSize); ++ DBG_871X("%s(): HW_VAR_SET_TX_CMD: KEK KCK %p %d\n", ++ __FUNCTION__, &pframe[index-tx_desc], ++ (tx_desc + RTW_KCK_LEN + RTW_KEK_LEN)); ++#endif + +- TotalPageNum += CurtPktPageNum; ++ *page_num += CurtPktPageNum; + +- BufIndex += (CurtPktPageNum*PageSize); ++ index += (CurtPktPageNum * page_size); + + //3 GTK Response +- RsvdPageLoc.LocGTKRsp= TotalPageNum; +- rtw_hal_construct_GTKRsp( +- adapter, +- &ReservedPagePacket[BufIndex], +- >KLegnth); ++ rsvd_page_loc->LocGTKRsp= *page_num; ++ DBG_871X("LocGTKRsp: %d\n", rsvd_page_loc->LocGTKRsp); ++ rtw_hal_construct_GTKRsp(adapter, &pframe[index], >KLegnth); + +- rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], ++ rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc], + GTKLegnth, _FALSE, _FALSE, _TRUE); + #if 0 + { + int gj; + printk("123GTK pkt=> \n"); +- for(gj=0; gj < GTKLegnth+TxDescLen; gj++) { +- printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen+gj]); ++ for(gj=0; gj < GTKLegnth+tx_desc; gj++) { ++ printk(" %02x ", pframe[index-tx_desc+gj]); + if ((gj + 1)%16==0) + printk("\n"); + } + printk(" <=end\n"); + } +-#endif + +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: GTK RSP %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], +- // (TxDescLen + GTKLegnth)); ++ DBG_871X("%s(): HW_VAR_SET_TX_CMD: GTK RSP %p %d\n", ++ __FUNCTION__, &pframe[index-tx_desc], ++ (tx_desc + GTKLegnth)); ++#endif + +- CurtPktPageNum = (u8)PageNum(TxDescLen + GTKLegnth, PageSize); ++ CurtPktPageNum = (u8)PageNum(tx_desc + GTKLegnth, page_size); + +- TotalPageNum += CurtPktPageNum; ++ *page_num += CurtPktPageNum; + +- BufIndex += (CurtPktPageNum*PageSize); ++ index += (CurtPktPageNum * page_size); + + //below page is empty for GTK extension memory + //3(11) GTK EXT MEM +- RsvdPageLoc.LocGTKEXTMEM= TotalPageNum; ++ rsvd_page_loc->LocGTKEXTMEM = *page_num; + + CurtPktPageNum = 2; + +- TotalPageNum += CurtPktPageNum; ++ if (page_size >= 256) ++ CurtPktPageNum = 1; ++ ++ *page_num += CurtPktPageNum; + //extension memory for FW +- TotalPacketLen = BufIndex-TxDescLen + (PageSize*CurtPktPageNum); +-#else //CONFIG_GTK_OL +- TotalPacketLen = BufIndex + _AES_IV_LEN_; ++ *total_pkt_len = index + (page_size * CurtPktPageNum); ++ + #endif //CONFIG_GTK_OL +- } else if (pwrctl->wowlan_pno_enable == _TRUE) { ++ } else { + #ifdef CONFIG_PNO_SUPPORT + if (pwrctl->pno_in_resume == _FALSE && + pwrctl->pno_inited == _TRUE) { + + //Broadcast Probe Request +- RsvdPageLoc.LocProbePacket = TotalPageNum; ++ rsvd_page_loc->LocProbePacket = *page_num; + + DBG_871X("loc_probe_req: %d\n", +- RsvdPageLoc.LocProbePacket); ++ rsvd_page_loc->LocProbePacket); + + rtw_hal_construct_ProbeReq( + adapter, +- &ReservedPagePacket[BufIndex], ++ &pframe[index], + &ProbeReqLength, + NULL); + + rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], ++ &pframe[index-tx_desc], + ProbeReqLength, _FALSE, _FALSE, _FALSE); + +-#ifdef CONFIG_PNO_SET_DEBUG +- { +- int gj; +- printk("probe req pkt=> \n"); +- for(gj=0; gj < ProbeReqLength + TxDescLen; gj++) { +- printk(" %02x ",ReservedPagePacket[BufIndex- TxDescLen + gj]); +- if ((gj + 1)%8==0) +- printk("\n"); +- } +- printk(" <=end\n"); +- } +-#endif + CurtPktPageNum = +- (u8)PageNum(TxDescLen + ProbeReqLength, PageSize); ++ (u8)PageNum(tx_desc + ProbeReqLength, page_size); + +- TotalPageNum += CurtPktPageNum; ++ *page_num += CurtPktPageNum; + +- BufIndex += (CurtPktPageNum*PageSize); ++ index += (CurtPktPageNum * page_size); + + //Hidden SSID Probe Request + ssid_num = pwrctl->pnlo_info->hidden_ssid_num; + +- for (index = 0 ; index < ssid_num ; index++) { +- pwrctl->pnlo_info->loc_probe_req[index] = +- TotalPageNum; ++ for (pno_index = 0 ; pno_index < ssid_num ; pno_index++) { ++ pwrctl->pnlo_info->loc_probe_req[pno_index] = ++ *page_num; + + rtw_hal_construct_ProbeReq( + adapter, +- &ReservedPagePacket[BufIndex], ++ &pframe[index], + &ProbeReqLength, +- &pwrctl->pno_ssid_list->node[index]); ++ &pwrctl->pno_ssid_list->node[pno_index]); + + rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], ++ &pframe[index - tx_desc], + ProbeReqLength, _FALSE, _FALSE, _FALSE); + +-#ifdef CONFIG_PNO_SET_DEBUG +- { +- int gj; +- printk("probe req pkt=> \n"); +- for(gj=0; gj < ProbeReqLength + TxDescLen; gj++) { +- printk(" %02x ", ReservedPagePacket[BufIndex- TxDescLen + gj]); +- if ((gj + 1)%8==0) +- printk("\n"); +- } +- printk(" <=end\n"); +- } +-#endif + CurtPktPageNum = +- (u8)PageNum(TxDescLen + ProbeReqLength, PageSize); ++ (u8)PageNum(tx_desc + ProbeReqLength, page_size); + +- TotalPageNum += CurtPktPageNum; ++ *page_num += CurtPktPageNum; + +- BufIndex += (CurtPktPageNum*PageSize); ++ index += (CurtPktPageNum * page_size); + } + + //PNO INFO Page +- RsvdPageLoc.LocPNOInfo = TotalPageNum; ++ rsvd_page_loc->LocPNOInfo = *page_num; ++ DBG_871X("LocPNOInfo: %d\n", rsvd_page_loc->LocPNOInfo); + rtw_hal_construct_PNO_info(adapter, +- &ReservedPagePacket[BufIndex -TxDescLen], ++ &pframe[index - tx_desc], + &PNOLength); +-#ifdef CONFIG_PNO_SET_DEBUG +- { +- int gj; +- printk("PNO pkt=> \n"); +- for(gj=0; gj < PNOLength; gj++) { +- printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen +gj]); +- if ((gj + 1)%8==0) +- printk("\n"); +- } +- printk(" <=end\n"); +- } +-#endif + +- CurtPktPageNum = (u8)PageNum_128(PNOLength); +- TotalPageNum += CurtPktPageNum; +- BufIndex += (CurtPktPageNum*PageSize); ++ CurtPktPageNum = (u8)PageNum(PNOLength, page_size); ++ *page_num += CurtPktPageNum; ++ index += (CurtPktPageNum * page_size); + + //SSID List Page +- RsvdPageLoc.LocSSIDInfo = TotalPageNum; ++ rsvd_page_loc->LocSSIDInfo = *page_num; ++ DBG_871X("LocSSIDInfo: %d\n", rsvd_page_loc->LocSSIDInfo); + rtw_hal_construct_ssid_list(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], ++ &pframe[index - tx_desc], + &SSIDLegnth); +-#ifdef CONFIG_PNO_SET_DEBUG +- { +- int gj; +- printk("SSID list pkt=> \n"); +- for(gj=0; gj < SSIDLegnth; gj++) { +- printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen+gj]); +- if ((gj + 1)%8==0) +- printk("\n"); +- } +- printk(" <=end\n"); +- } +-#endif +- CurtPktPageNum = (u8)PageNum_128(SSIDLegnth); +- TotalPageNum += CurtPktPageNum; +- BufIndex += (CurtPktPageNum*PageSize); ++ ++ CurtPktPageNum = (u8)PageNum(SSIDLegnth, page_size); ++ *page_num += CurtPktPageNum; ++ index += (CurtPktPageNum * page_size); + + //Scan Info Page +- RsvdPageLoc.LocScanInfo = TotalPageNum; ++ rsvd_page_loc->LocScanInfo = *page_num; ++ DBG_871X("LocScanInfo: %d\n", rsvd_page_loc->LocScanInfo); + rtw_hal_construct_scan_info(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], ++ &pframe[index - tx_desc], + &ScanInfoLength); +-#ifdef CONFIG_PNO_SET_DEBUG +- { +- int gj; +- printk("Scan info pkt=> \n"); +- for(gj=0; gj < ScanInfoLength; gj++) { +- printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen+gj]); +- if ((gj + 1)%8==0) +- printk("\n"); +- } +- printk(" <=end\n"); +- } +-#endif +- CurtPktPageNum = (u8)PageNum(ScanInfoLength, PageSize); +- TotalPageNum += CurtPktPageNum; +- BufIndex += (CurtPktPageNum*PageSize); +- TotalPacketLen = BufIndex + ScanInfoLength; +- } else { +- TotalPacketLen = BufIndex + QosNullLength; ++ ++ CurtPktPageNum = (u8)PageNum(ScanInfoLength, page_size); ++ *page_num += CurtPktPageNum; ++ *total_pkt_len = index + ScanInfoLength; ++ index += (CurtPktPageNum * page_size); ++ + } + #endif //CONFIG_PNO_SUPPORT +- } else { +- TotalPacketLen = BufIndex + QosNullLength; + } +-#else //CONFIG_WOWLAN +- TotalPacketLen = BufIndex + QosNullLength; +-#endif //CONFIG_WOWLAN ++} + +-#ifdef CONFIG_P2P_WOWLAN +- if(_TRUE == pwrctl->wowlan_p2p_mode) +- { ++static void rtw_hal_gate_bb(_adapter *adapter, bool stop) ++{ ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); ++ u8 val8 = 0; ++ u16 val16 = 0; ++ ++ if (stop) { ++ /* Pause TX*/ ++ pwrpriv->wowlan_txpause_status = rtw_read8(adapter, REG_TXPAUSE); ++ rtw_write8(adapter, REG_TXPAUSE, 0xff); ++ val8 = rtw_read8(adapter, REG_SYS_FUNC_EN); ++ val8 &= ~BIT(0); ++ rtw_write8(adapter, REG_SYS_FUNC_EN, val8); ++ DBG_871X("%s: BB gated: 0x%02x, store TXPAUSE: %02x\n", ++ __func__, ++ rtw_read8(adapter, REG_SYS_FUNC_EN), ++ pwrpriv->wowlan_txpause_status); ++ } else { ++ val8 = rtw_read8(adapter, REG_SYS_FUNC_EN); ++ val8 |= BIT(0); ++ rtw_write8(adapter, REG_SYS_FUNC_EN, val8); ++ DBG_871X("%s: BB release: 0x%02x, recover TXPAUSE:%02x\n", ++ __func__, rtw_read8(adapter, REG_SYS_FUNC_EN), ++ pwrpriv->wowlan_txpause_status); ++ /* release TX*/ ++ rtw_write8(adapter, REG_TXPAUSE, pwrpriv->wowlan_txpause_status); ++ } ++} + +- // P2P Beacon +- RsvdPageLoc.LocP2PBeacon= TotalPageNum; +- rtw_hal_construct_P2PBeacon( +- adapter, +- &ReservedPagePacket[BufIndex], +- &P2PBCNLength); +- rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- P2PBCNLength, _FALSE, _FALSE, _FALSE); ++static void rtw_hal_reset_mac_rx(_adapter *adapter) ++{ ++ u8 val8 = 0; ++ /* Set REG_CR bit1, bit3, bit7 to 0*/ ++ val8 = rtw_read8(adapter, REG_CR); ++ val8 &= 0x75; ++ rtw_write8(adapter, REG_CR, val8); ++ val8 = rtw_read8(adapter, REG_CR); ++ /* Set REG_CR bit1, bit3, bit7 to 1*/ ++ val8 |= 0x8a; ++ rtw_write8(adapter, REG_CR, val8); ++ DBG_871X("0x%04x: %02x\n", REG_CR, rtw_read8(adapter, REG_CR)); ++} + +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (P2PBCNLength+TxDescLen)); ++static void rtw_hal_set_wow_rxff_boundary(_adapter *adapter, bool wow_mode) ++{ ++ u8 val8 = 0; ++ u16 rxff_bndy = 0; ++ u32 rx_dma_buff_sz = 0; ++ ++ val8 = rtw_read8(adapter, REG_FIFOPAGE + 3); ++ if (val8 != 0) ++ DBG_871X("%s:[%04x]some PKTs in TXPKTBUF\n", ++ __func__, (REG_FIFOPAGE + 3)); ++ ++ rtw_hal_reset_mac_rx(adapter); ++ ++ if (wow_mode) { ++ rtw_hal_get_def_var(adapter, HAL_DEF_RX_DMA_SZ_WOW, ++ (u8 *)&rx_dma_buff_sz); ++ rxff_bndy = rx_dma_buff_sz - 1; ++ ++ rtw_write16(adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); ++ DBG_871X("%s: wow mode, 0x%04x: 0x%04x\n", __func__, ++ REG_TRXFF_BNDY + 2, ++ rtw_read16(adapter, (REG_TRXFF_BNDY+2))); ++ } else { ++ rtw_hal_get_def_var(adapter, HAL_DEF_RX_DMA_SZ, ++ (u8 *)&rx_dma_buff_sz); ++ rxff_bndy = rx_dma_buff_sz - 1; ++ rtw_write16(adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); ++ DBG_871X("%s: normal mode, 0x%04x: 0x%04x\n", __func__, ++ REG_TRXFF_BNDY + 2, ++ rtw_read16(adapter, (REG_TRXFF_BNDY+2))); ++ } ++} + +- CurtPktPageNum = (u8)PageNum(TxDescLen + P2PBCNLength, PageSize); ++static int rtw_hal_set_pattern(_adapter *adapter, u8 *pattern, ++ u8 len, u8 *mask) ++{ ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); ++ struct mlme_ext_priv *pmlmeext = NULL; ++ struct mlme_ext_info *pmlmeinfo = NULL; ++ struct rtl_wow_pattern wow_pattern; ++ u8 mask_hw[MAX_WKFM_SIZE] = {0}; ++ u8 content[MAX_WKFM_PATTERN_SIZE] = {0}; ++ u8 broadcast_addr[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ u8 multicast_addr1[2] = {0x33, 0x33}; ++ u8 multicast_addr2[3] = {0x01, 0x00, 0x5e}; ++ u8 res = _FALSE, index = 0, mask_len = 0; ++ u8 mac_addr[ETH_ALEN] = {0}; ++ u16 count = 0; ++ int i, j; ++ ++ if (pwrctl->wowlan_pattern_idx > MAX_WKFM_NUM) { ++ DBG_871X("%s pattern_idx is more than MAX_FMC_NUM: %d\n", ++ __func__, MAX_WKFM_NUM); ++ return _FALSE; ++ } + +- TotalPageNum += CurtPktPageNum; ++ pmlmeext = &adapter->mlmeextpriv; ++ pmlmeinfo = &pmlmeext->mlmext_info; ++ _rtw_memcpy(mac_addr, adapter_mac_addr(adapter), ETH_ALEN); ++ _rtw_memset(&wow_pattern, 0, sizeof(struct rtl_wow_pattern)); ++ ++ mask_len = DIV_ROUND_UP(len, 8); ++ ++ /* 1. setup A1 table */ ++ if (memcmp(pattern, broadcast_addr, ETH_ALEN) == 0) ++ wow_pattern.type = PATTERN_BROADCAST; ++ else if (memcmp(pattern, multicast_addr1, 2) == 0) ++ wow_pattern.type = PATTERN_MULTICAST; ++ else if (memcmp(pattern, multicast_addr2, 3) == 0) ++ wow_pattern.type = PATTERN_MULTICAST; ++ else if (memcmp(pattern, mac_addr, ETH_ALEN) == 0) ++ wow_pattern.type = PATTERN_UNICAST; ++ else ++ wow_pattern.type = PATTERN_INVALID; + +- BufIndex += (CurtPktPageNum*PageSize); ++ /* translate mask from os to mask for hw */ + +- // P2P Probe rsp +- RsvdPageLoc.LocP2PProbeRsp = TotalPageNum; +- rtw_hal_construct_P2PProbeRsp( +- adapter, +- &ReservedPagePacket[BufIndex], +- &P2PProbeRspLength); +- rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- P2PProbeRspLength, _FALSE, _FALSE, _FALSE); ++/****************************************************************************** ++ * pattern from OS uses 'ethenet frame', like this: + +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (P2PProbeRspLength+TxDescLen)); ++ | 6 | 6 | 2 | 20 | Variable | 4 | ++ |--------+--------+------+-----------+------------+-----| ++ | 802.3 Mac Header | IP Header | TCP Packet | FCS | ++ | DA | SA | Type | + +- CurtPktPageNum = (u8)PageNum(TxDescLen + P2PProbeRspLength, PageSize); ++ * BUT, packet catched by our HW is in '802.11 frame', begin from LLC, + +- TotalPageNum += CurtPktPageNum; ++ | 24 or 30 | 6 | 2 | 20 | Variable | 4 | ++ |-------------------+--------+------+-----------+------------+-----| ++ | 802.11 MAC Header | LLC | IP Header | TCP Packet | FCS | ++ | Others | Tpye | + +- BufIndex += (CurtPktPageNum*PageSize); ++ * Therefore, we need translate mask_from_OS to mask_to_hw. ++ * We should left-shift mask by 6 bits, then set the new bit[0~5] = 0, ++ * because new mask[0~5] means 'SA', but our HW packet begins from LLC, ++ * bit[0~5] corresponds to first 6 Bytes in LLC, they just don't match. ++ ******************************************************************************/ ++ /* Shift 6 bits */ ++ for (i = 0; i < mask_len - 1; i++) { ++ mask_hw[i] = mask[i] >> 6; ++ mask_hw[i] |= (mask[i + 1] & 0x3F) << 2; ++ } + +- //P2P nego rsp +- RsvdPageLoc.LocNegoRsp = TotalPageNum; +- rtw_hal_construct_P2PNegoRsp( +- adapter, +- &ReservedPagePacket[BufIndex], +- &P2PNegoRspLength); +- rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- P2PNegoRspLength, _FALSE, _FALSE, _FALSE); ++ mask_hw[i] = (mask[i] >> 6) & 0x3F; ++ /* Set bit 0-5 to zero */ ++ mask_hw[0] &= 0xC0; ++ ++ for (i = 0; i < (MAX_WKFM_SIZE/4); i++) { ++ wow_pattern.mask[i] = mask_hw[i * 4]; ++ wow_pattern.mask[i] |= (mask_hw[i * 4 + 1] << 8); ++ wow_pattern.mask[i] |= (mask_hw[i * 4 + 2] << 16); ++ wow_pattern.mask[i] |= (mask_hw[i * 4 + 3] << 24); ++ } ++ ++ /* To get the wake up pattern from the mask. ++ * We do not count first 12 bits which means ++ * DA[6] and SA[6] in the pattern to match HW design. */ ++ count = 0; ++ for (i = 12; i < len; i++) { ++ if ((mask[i / 8] >> (i % 8)) & 0x01) { ++ content[count] = pattern[i]; ++ count++; ++ } ++ } + +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (NegoRspLength+TxDescLen)); ++ wow_pattern.crc = rtw_calc_crc(content, count); + +- CurtPktPageNum = (u8)PageNum(TxDescLen + P2PNegoRspLength, PageSize); ++ if (wow_pattern.crc != 0) { ++ if (wow_pattern.type == PATTERN_INVALID) ++ wow_pattern.type = PATTERN_VALID; ++ } + +- TotalPageNum += CurtPktPageNum; ++ index = rtw_read8(adapter, REG_WKFMCAM_NUM); + +- BufIndex += (CurtPktPageNum*PageSize); +- +- //P2P invite rsp +- RsvdPageLoc.LocInviteRsp = TotalPageNum; +- rtw_hal_construct_P2PInviteRsp( +- adapter, +- &ReservedPagePacket[BufIndex], +- &P2PInviteRspLength); +- rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- P2PInviteRspLength, _FALSE, _FALSE, _FALSE); ++ if (!pwrctl->bInSuspend) ++ index += 2; + +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (InviteRspLength+TxDescLen)); ++ /* write pattern */ ++ res = rtw_write_to_frame_mask(adapter, index, &wow_pattern); + +- CurtPktPageNum = (u8)PageNum(TxDescLen + P2PInviteRspLength, PageSize); ++ if (res == _TRUE) { ++ pwrctl->wowlan_pattern_idx++; ++ rtw_write8(adapter, ++ REG_WKFMCAM_NUM, ++ pwrctl->wowlan_pattern_idx); ++ } else { ++ DBG_871X("%s: ERROR write_to_frame_mask_cam fail\n", __func__); ++ } + +- TotalPageNum += CurtPktPageNum; ++ return res; ++} + +- BufIndex += (CurtPktPageNum*PageSize); ++static void rtw_hal_dl_pattern(_adapter *adapter, u8 clean_all) ++{ ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); ++ int i = 0, total = 0; ++ ++ total = pwrpriv->wowlan_pattern_idx; ++ ++ rtw_clean_pattern(adapter); ++ ++ if (!clean_all) { ++ for (i = 0 ; i < total ; i++) { ++ rtw_hal_set_pattern(adapter, ++ pwrpriv->patterns[i].content, ++ pwrpriv->patterns[i].len, ++ pwrpriv->patterns[i].mask); ++ } ++ DBG_871X("pattern downloaded\n"); ++ } else { ++ for (i = 0 ; i < MAX_WKFM_NUM ; i++) { ++ _rtw_memset(pwrpriv->patterns[i].content, '\0', ++ sizeof(pwrpriv->patterns[i].content)); ++ _rtw_memset(pwrpriv->patterns[i].mask, '\0', ++ sizeof(pwrpriv->patterns[i].mask)); ++ pwrpriv->patterns[i].len = 0; ++ } ++ DBG_871X("clean all pattern\n"); ++ } ++} ++ ++static void rtw_hal_wow_enable(_adapter *adapter) ++{ ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct hal_ops *pHalFunc = &adapter->HalFunc; ++ struct sta_info *psta = NULL; ++ int res; ++ u16 media_status_rpt; + +- //P2P provision discovery rsp +- RsvdPageLoc.LocPDRsp = TotalPageNum; +- rtw_hal_construct_P2PProvisionDisRsp( +- adapter, +- &ReservedPagePacket[BufIndex], +- &P2PPDRspLength); +- rtw_hal_fill_fake_txdesc(adapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- P2PPDRspLength, _FALSE, _FALSE, _FALSE); + +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (PDRspLength+TxDescLen)); ++ DBG_871X_LEVEL(_drv_always_, "%s, WOWLAN_ENABLE\n", __func__); ++ rtw_hal_gate_bb(adapter, _TRUE); ++#ifdef CONFIG_GTK_OL ++ if (psecuritypriv->dot11PrivacyAlgrthm == _AES_) ++ rtw_hal_fw_sync_cam_id(adapter); ++#endif ++ if (IS_HARDWARE_TYPE_8723B(adapter)) ++ rtw_hal_backup_rate(adapter); + +- CurtPktPageNum = (u8)PageNum(TxDescLen + P2PPDRspLength, PageSize); ++ /* RX DMA stop */ ++ if (IS_HARDWARE_TYPE_8188E(adapter)) ++ rtw_hal_disable_tx_report(adapter); + +- TotalPageNum += CurtPktPageNum; ++ res = rtw_hal_pause_rx_dma(adapter); ++ if (res == _FAIL) ++ DBG_871X_LEVEL(_drv_always_, "[WARNING] pause RX DMA fail\n"); + +- BufIndex += (CurtPktPageNum*PageSize); ++ /* Reconfig RX_FF Boundary */ ++ rtw_hal_set_wow_rxff_boundary(adapter, _TRUE); + +- TotalPacketLen = BufIndex + P2PPDRspLength; +- } +-#endif //CONFIG_P2P_WOWLAN ++ /* redownload pattern match */ ++ if (pwrctl->wowlan_pattern) ++ rtw_hal_dl_pattern(adapter, _FALSE); + +- if(TotalPacketLen > MaxRsvdPageBufSize) { +- DBG_871X("%s(ERROR): rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n", +- __FUNCTION__, TotalPacketLen,MaxRsvdPageBufSize); +- goto error; +- } else { +- // update attribute +- pattrib = &pcmdframe->attrib; +- update_mgntframe_attrib(adapter, pattrib); +- pattrib->qsel = 0x10; +- pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescOffset; +-#ifdef CONFIG_PCI_HCI +- dump_mgntframe(adapter, pcmdframe); +-#else +- dump_mgntframe_and_wait(adapter, pcmdframe, 100); +-#endif ++ rtw_hal_fw_dl(adapter, _TRUE); ++ media_status_rpt = RT_MEDIA_CONNECT; ++ rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT, ++ (u8 *)&media_status_rpt); ++ ++ if (!pwrctl->wowlan_pno_enable) { ++ psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv)); ++ if (psta != NULL) ++ rtw_sta_media_status_rpt(adapter, psta, 1); + } ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ /* Enable CPWM2 only. */ ++ res = rtw_hal_enable_cpwm2(adapter); ++ if (res == _FAIL) ++ DBG_871X_LEVEL(_drv_always_, "[WARNING] enable cpwm2 fail\n"); ++#endif ++#ifdef CONFIG_GPIO_WAKEUP ++ rtw_hal_switch_gpio_wl_ctrl(adapter, WAKEUP_GPIO_IDX, _TRUE); ++#endif ++ /* Set WOWLAN H2C command. */ ++ DBG_871X_LEVEL(_drv_always_, "Set WOWLan cmd\n"); ++ rtw_hal_set_fw_wow_related_cmd(adapter, 1); ++ ++ res = rtw_hal_check_wow_ctrl(adapter, _TRUE); + +- DBG_871X("%s: Set RSVD page location to Fw ,TotalPacketLen(%d), TotalPageNum(%d)\n", +- __func__,TotalPacketLen,TotalPageNum); ++ if (res == _FALSE) ++ DBG_871X("[Error]%s: set wowlan CMD fail!!\n", __func__); + +- if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { +- rtw_hal_set_FwRsvdPage_cmd(adapter, &RsvdPageLoc); +- if (pwrctl->wowlan_mode == _TRUE) +- rtw_hal_set_FwAoacRsvdPage_cmd(adapter, &RsvdPageLoc); +- } else if (pwrctl->wowlan_pno_enable) { +-#ifdef CONFIG_PNO_SUPPORT +- rtw_hal_set_FwAoacRsvdPage_cmd(adapter, &RsvdPageLoc); +- if(pwrctl->pno_in_resume) +- rtw_hal_set_scan_offload_info_cmd(adapter, +- &RsvdPageLoc, 0); +- else +- rtw_hal_set_scan_offload_info_cmd(adapter, +- &RsvdPageLoc, 1); +-#endif //CONFIG_PNO_SUPPORT +- } +-#ifdef CONFIG_P2P_WOWLAN +- if(_TRUE == pwrctl->wowlan_p2p_mode) +- rtw_hal_set_FwP2PRsvdPage_cmd(adapter, &RsvdPageLoc); +- +-#endif //CONFIG_P2P_WOWLAN +- return; +-error: +- rtw_free_xmitframe(pxmitpriv, pcmdframe); ++ pwrctl->wowlan_wake_reason = ++ rtw_read8(adapter, REG_WOWLAN_WAKE_REASON); ++ ++ DBG_871X_LEVEL(_drv_always_, "wowlan_wake_reason: 0x%02x\n", ++ pwrctl->wowlan_wake_reason); ++#ifdef CONFIG_GTK_OL_DBG ++ dump_sec_cam(RTW_DBGDUMP, adapter); ++#endif ++#ifdef CONFIG_USB_HCI ++ if (adapter->intf_stop) /* free adapter's resource */ ++ adapter->intf_stop(adapter); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (rtw_buddy_adapter_up(adapter)) /*free buddy adapter's resource*/ ++ adapter->pbuddy_adapter->intf_stop(adapter->pbuddy_adapter); ++#endif /*CONFIG_CONCURRENT_MODE*/ ++ /* Invoid SE0 reset signal during suspending*/ ++ rtw_write8(adapter, REG_RSV_CTRL, 0x20); ++ rtw_write8(adapter, REG_RSV_CTRL, 0x60); ++#endif /*CONFIG_USB_HCI*/ ++ ++ rtw_hal_gate_bb(adapter, _FALSE); + } + +-static void rtw_hal_download_rsvd_page(_adapter* adapter, u8 mstatus) ++static void rtw_hal_wow_disable(_adapter *adapter) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); +- struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); +- BOOLEAN bcn_valid = _FALSE; +- u8 DLBcnCount=0; +- u32 poll = 0; ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct hal_ops *pHalFunc = &adapter->HalFunc; ++ struct sta_info *psta = NULL; ++ int res; ++ u16 media_status_rpt; + u8 val8; + +-_func_enter_; ++ DBG_871X_LEVEL(_drv_always_, "%s, WOWLAN_DISABLE\n", __func__); + +- DBG_8192C("+" FUNC_ADPT_FMT ": iface_type=%d mstatus(%x)\n", +- FUNC_ADPT_ARG(adapter), get_iface_type(adapter), mstatus); +- +- if(mstatus == RT_MEDIA_CONNECT) { +- BOOLEAN bRecover = _FALSE; +- u8 v8; +- +- // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. +- // Suggested by filen. Added by tynli. +- rtw_write16(adapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); +- +- // set REG_CR bit 8 +- v8 = rtw_read8(adapter, REG_CR+1); +- v8 |= BIT(0); // ENSWBCN +- rtw_write8(adapter, REG_CR+1, v8); +- +- // Disable Hw protection for a time which revserd for Hw sending beacon. +- // Fix download reserved page packet fail that access collision with the protection time. +- // 2010.05.11. Added by tynli. +- val8 = rtw_read8(adapter, REG_BCN_CTRL); +- val8 &= ~EN_BCN_FUNCTION; +- val8 |= DIS_TSF_UDT; +- rtw_write8(adapter, REG_BCN_CTRL, val8); +- +- // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. +- if (pHalData->RegFwHwTxQCtrl & BIT(6)) +- bRecover = _TRUE; +- +- // To tell Hw the packet is not a real beacon frame. +- rtw_write8(adapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl & ~BIT(6)); +- pHalData->RegFwHwTxQCtrl &= ~BIT(6); +- +- // Clear beacon valid check bit. +- rtw_hal_set_hwreg(adapter, HW_VAR_BCN_VALID, NULL); +- rtw_hal_set_hwreg(adapter, HW_VAR_DL_BCN_SEL, NULL); +- +- DLBcnCount = 0; +- poll = 0; +- do { +- // download rsvd page. +- rtw_hal_set_fw_rsvd_page(adapter, 0); +- +- DLBcnCount++; +- do { +- rtw_yield_os(); +- //rtw_mdelay_os(10); +- // check rsvd page download OK. +- rtw_hal_get_hwreg(adapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); +- poll++; +- } while(!bcn_valid && (poll%10)!=0 && !adapter->bSurpriseRemoved && !adapter->bDriverStopped); +- }while(!bcn_valid && DLBcnCount<=100 && !adapter->bSurpriseRemoved && !adapter->bDriverStopped); +- +- if(adapter->bSurpriseRemoved || adapter->bDriverStopped) { +- DBG_871X(ADPT_FMT": 0 bSurpriseRemoved:%d, bDriverStopped:%d\n", +- ADPT_ARG(adapter) ,adapter->bSurpriseRemoved, +- adapter->bDriverStopped); +- } else if(!bcn_valid) { +- DBG_871X(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n", +- ADPT_ARG(adapter) ,DLBcnCount, poll); +- } else { +- struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); +- pwrctl->fw_psmode_iface_id = adapter->iface_id; +- DBG_871X(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n", +- ADPT_ARG(adapter), DLBcnCount, poll); +- } ++ if (!pwrctl->wowlan_pno_enable) { ++ psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv)); ++ if (psta != NULL) ++ rtw_sta_media_status_rpt(adapter, psta, 0); ++ else ++ DBG_871X("%s: psta is null\n", __func__); ++ } ++ ++ if (0) { ++ DBG_871X("0x630:0x%02x\n", rtw_read8(adapter, 0x630)); ++ DBG_871X("0x631:0x%02x\n", rtw_read8(adapter, 0x631)); ++ } + +- // 2010.05.11. Added by tynli. +- val8 = rtw_read8(adapter, REG_BCN_CTRL); +- val8 |= EN_BCN_FUNCTION; +- val8 &= ~DIS_TSF_UDT; +- rtw_write8(adapter, REG_BCN_CTRL, val8); +- +- // To make sure that if there exists an adapter which would like to send beacon. +- // If exists, the origianl value of 0x422[6] will be 1, we should check this to +- // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause +- // the beacon cannot be sent by HW. +- // 2010.06.23. Added by tynli. +- if(bRecover) { +- rtw_write8(adapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl | BIT(6)); +- pHalData->RegFwHwTxQCtrl |= BIT(6); +- } ++ pwrctl->wowlan_wake_reason = rtw_read8(adapter, REG_WOWLAN_WAKE_REASON); + +- // Clear CR[8] or beacon packet will not be send to TxBuf anymore. +- v8 = rtw_read8(adapter, REG_CR+1); +- v8 &= ~BIT(0); // ~ENSWBCN +- rtw_write8(adapter, REG_CR+1, v8); +- } ++ DBG_871X_LEVEL(_drv_always_, "wakeup_reason: 0x%02x\n", ++ pwrctl->wowlan_wake_reason); + +-_func_exit_; +-} +-#endif //CONFIG_WOWLAN ++ rtw_hal_set_fw_wow_related_cmd(adapter, 0); + +-void SetHwReg(_adapter *adapter, u8 variable, u8 *val) +-{ +- HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); +- DM_ODM_T *odm = &(hal_data->odmpriv); ++ res = rtw_hal_check_wow_ctrl(adapter, _FALSE); + +-_func_enter_; ++ if (res == _FALSE) { ++ DBG_871X("[Error]%s: disable WOW cmd fail\n!!", __func__); ++ rtw_hal_force_enable_rxdma(adapter); ++ } + +- switch (variable) { +- case HW_VAR_INITIAL_GAIN: +- { +- u32 rx_gain = ((u32 *)(val))[0]; +- +- if(rx_gain == 0xff){//restore rx gain +- //ODM_Write_DIG(podmpriv,pDigTable->BackupIGValue); +- odm_PauseDIG(odm, ODM_RESUME_DIG,rx_gain); +- } +- else{ +- //pDigTable->BackupIGValue = pDigTable->CurIGValue; +- //ODM_Write_DIG(podmpriv,rx_gain); +- odm_PauseDIG(odm, ODM_PAUSE_DIG,rx_gain); +- } +- } +- break; +- case HW_VAR_PORT_SWITCH: +- hw_var_port_switch(adapter); +- break; +- case HW_VAR_INIT_RTS_RATE: +- { +- u16 brate_cfg = *((u16*)val); +- u8 rate_index = 0; +- HAL_VERSION *hal_ver = &hal_data->VersionID; ++ rtw_hal_gate_bb(adapter, _TRUE); + +- if (IS_81XXC(*hal_ver) ||IS_92D(*hal_ver) || IS_8723_SERIES(*hal_ver) || IS_8188E(*hal_ver)) { ++ res = rtw_hal_pause_rx_dma(adapter); ++ if (res == _FAIL) ++ DBG_871X_LEVEL(_drv_always_, "[WARNING] pause RX DMA fail\n"); + +- while (brate_cfg > 0x1) { +- brate_cfg = (brate_cfg >> 1); +- rate_index++; +- } +- rtw_write8(adapter, REG_INIRTS_RATE_SEL, rate_index); +- } else { +- rtw_warn_on(1); +- } +- } +- break; +- case HW_VAR_SEC_CFG: +- { +- #if defined(CONFIG_CONCURRENT_MODE) && !defined(DYNAMIC_CAMID_ALLOC) +- // enable tx enc and rx dec engine, and no key search for MC/BC +- rtw_write8(adapter, REG_SECCFG, SCR_NoSKMC|SCR_RxDecEnable|SCR_TxEncEnable); +- #elif defined(DYNAMIC_CAMID_ALLOC) +- u16 reg_scr; ++ /* clean pattern match */ ++ if (pwrctl->wowlan_pattern) ++ rtw_hal_dl_pattern(adapter, _TRUE); + +- reg_scr = rtw_read16(adapter, REG_SECCFG); +- rtw_write16(adapter, REG_SECCFG, reg_scr|SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable); +- #else +- rtw_write8(adapter, REG_SECCFG, *((u8*)val)); +- #endif +- } +- break; +- case HW_VAR_SEC_DK_CFG: +- { +- struct security_priv *sec = &adapter->securitypriv; +- u8 reg_scr = rtw_read8(adapter, REG_SECCFG); ++ /* config RXFF boundary to original */ ++ rtw_hal_set_wow_rxff_boundary(adapter, _FALSE); + +- if (val) /* Enable default key related setting */ +- { +- reg_scr |= SCR_TXBCUSEDK; +- if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X) +- reg_scr |= (SCR_RxUseDK|SCR_TxUseDK); +- } +- else /* Disable default key related setting */ +- { +- reg_scr &= ~(SCR_RXBCUSEDK|SCR_TXBCUSEDK|SCR_RxUseDK|SCR_TxUseDK); +- } ++ rtw_hal_release_rx_dma(adapter); + +- rtw_write8(adapter, REG_SECCFG, reg_scr); +- } +- break; +- case HW_VAR_DM_FLAG: +- odm->SupportAbility = *((u32*)val); +- break; +- case HW_VAR_DM_FUNC_OP: +- if (*((u8*)val) == _TRUE) { +- /* save dm flag */ +- odm->BK_SupportAbility = odm->SupportAbility; +- } else { +- /* restore dm flag */ +- odm->SupportAbility = odm->BK_SupportAbility; +- } +- break; +- case HW_VAR_DM_FUNC_SET: +- if(*((u32*)val) == DYNAMIC_ALL_FUNC_ENABLE){ +- struct dm_priv *dm = &hal_data->dmpriv; +- dm->DMFlag = dm->InitDMFlag; +- odm->SupportAbility = dm->InitODMFlag; +- } else { +- odm->SupportAbility |= *((u32 *)val); +- } +- break; +- case HW_VAR_DM_FUNC_CLR: +- /* +- * input is already a mask to clear function +- * don't invert it again! George,Lucas@20130513 +- */ +- odm->SupportAbility &= *((u32 *)val); +- break; +- case HW_VAR_ASIX_IOT: +- // enable ASIX IOT function +- if (*((u8*)val) == _TRUE) { +- // 0xa2e[0]=0 (disable rake receiver) +- rtw_write8(adapter, rCCK0_FalseAlarmReport+2, +- rtw_read8(adapter, rCCK0_FalseAlarmReport+2) & ~(BIT0)); +- // 0xa1c=0xa0 (reset channel estimation if signal quality is bad) +- rtw_write8(adapter, rCCK0_DSPParameter2, 0xa0); +- } else { +- // restore reg:0xa2e, reg:0xa1c +- rtw_write8(adapter, rCCK0_FalseAlarmReport+2, +- rtw_read8(adapter, rCCK0_FalseAlarmReport+2)|(BIT0)); +- rtw_write8(adapter, rCCK0_DSPParameter2, 0x00); +- } +- break; +-#ifdef CONFIG_WOWLAN +- case HW_VAR_WOWLAN: +- { +- struct wowlan_ioctl_param *poidparam; +- struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); +- struct security_priv *psecuritypriv = &adapter->securitypriv; +- struct mlme_priv *pmlmepriv = &adapter->mlmepriv; +- struct hal_ops *pHalFunc = &adapter->HalFunc; +- struct sta_info *psta = NULL; +- int res; +- u16 media_status_rpt; +- u8 val8; +- +- poidparam = (struct wowlan_ioctl_param *)val; +- switch (poidparam->subcode) { +- case WOWLAN_ENABLE: +- DBG_871X_LEVEL(_drv_always_, "WOWLAN_ENABLE\n"); ++ if (IS_HARDWARE_TYPE_8188E(adapter)) ++ rtw_hal_enable_tx_report(adapter); ++ ++ rtw_hal_update_tx_iv(adapter); + + #ifdef CONFIG_GTK_OL +- if (psecuritypriv->dot11PrivacyAlgrthm == _AES_) +- rtw_hal_fw_sync_cam_id(adapter); ++ if (psecuritypriv->dot11PrivacyAlgrthm == _AES_) ++ rtw_hal_update_gtk_offload_info(adapter); ++#endif /*CONFIG_GTK_OL*/ ++ ++ rtw_hal_fw_dl(adapter, _FALSE); ++ ++#ifdef CONFIG_GPIO_WAKEUP ++ val8 = (pwrctl->is_high_active == 0) ? 1 : 0; ++ DBG_871X_LEVEL(_drv_always_, "Set Wake GPIO to default(%d).\n", val8); ++ rtw_hal_set_output_gpio(adapter, WAKEUP_GPIO_IDX, val8); + #endif +- if (IS_HARDWARE_TYPE_8723B(adapter)) +- rtw_hal_backup_rate(adapter); + +- if (pHalFunc->hal_set_wowlan_fw != NULL) +- pHalFunc->hal_set_wowlan_fw(adapter, _TRUE); +- else +- DBG_871X("hal_set_wowlan_fw is null\n"); +- +- rtw_hal_download_rsvd_page(adapter, RT_MEDIA_CONNECT); +- +- if (!pwrctl->wowlan_pno_enable) { +- psta = rtw_get_stainfo(&adapter->stapriv, +- get_bssid(pmlmepriv)); +- media_status_rpt = +- (u16)((psta->mac_id<<8)|RT_MEDIA_CONNECT); +- if (psta != NULL) { +- rtw_hal_set_hwreg(adapter, +- HW_VAR_H2C_MEDIA_STATUS_RPT, +- (u8 *)&media_status_rpt); +- } +- } ++ if ((pwrctl->wowlan_wake_reason != FWDecisionDisconnect) && ++ (pwrctl->wowlan_wake_reason != Rx_Pairwisekey) && ++ (pwrctl->wowlan_wake_reason != Rx_DisAssoc) && ++ (pwrctl->wowlan_wake_reason != Rx_DeAuth)) { + +- rtw_msleep_os(2); ++ media_status_rpt = RT_MEDIA_CONNECT; ++ rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT, ++ (u8 *)&media_status_rpt); + +- if (IS_HARDWARE_TYPE_8188E(adapter)) +- rtw_hal_disable_tx_report(adapter); ++ if (psta != NULL) ++ rtw_sta_media_status_rpt(adapter, psta, 1); ++ } ++ rtw_hal_gate_bb(adapter, _FALSE); ++} ++#endif /*CONFIG_WOWLAN*/ + +- //RX DMA stop +- res = rtw_hal_pause_rx_dma(adapter); +- if (res == _FAIL) +- DBG_871X_LEVEL(_drv_always_, "[WARNING] pause RX DMA fail\n"); ++#ifdef CONFIG_P2P_WOWLAN ++void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter* adapter, u8 *pframe, u16 index, ++ u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len, ++ RSVDPAGE_LOC* rsvd_page_loc) ++{ ++ u32 P2PNegoRspLength = 0, P2PInviteRspLength = 0; ++ u32 P2PPDRspLength = 0, P2PProbeRspLength = 0, P2PBCNLength = 0; ++ u8 CurtPktPageNum = 0; ++ ++ /* P2P Beacon */ ++ rsvd_page_loc->LocP2PBeacon = *page_num; ++ rtw_hal_construct_P2PBeacon(adapter, &pframe[index], &P2PBCNLength); ++ rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc], ++ P2PBCNLength, _FALSE, _FALSE, _FALSE); + +-#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +- //Enable CPWM2 only. +- res = rtw_hal_enable_cpwm2(adapter); +- if (res == _FAIL) +- DBG_871X_LEVEL(_drv_always_, "[WARNING] enable cpwm2 fail\n"); ++#if 0 ++ DBG_871X("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n", ++ __FUNCTION__, &pframe[index-tx_desc], (P2PBCNLength+tx_desc)); + #endif + +- //Set WOWLAN H2C command. +- DBG_871X_LEVEL(_drv_always_, "Set WOWLan cmd\n"); +- rtw_hal_set_fw_wow_related_cmd(adapter, 1); ++ CurtPktPageNum = (u8)PageNum(tx_desc + P2PBCNLength, page_size); + +- res = rtw_hal_check_wow_ctrl(adapter, _TRUE); +- if (res == _FALSE) +- DBG_871X("[Error]%s: set wowlan CMD fail!!\n", __func__); ++ *page_num += CurtPktPageNum; + +- pwrctl->wowlan_wake_reason = +- rtw_read8(adapter, REG_WOWLAN_WAKE_REASON); ++ index += (CurtPktPageNum * page_size); + +- DBG_871X_LEVEL(_drv_always_, +- "wowlan_wake_reason: 0x%02x\n", +- pwrctl->wowlan_wake_reason); +-#ifdef CONFIG_GTK_OL_DBG +- dump_cam_table(adapter); +-#endif +-#ifdef CONFIG_USB_HCI +- if (adapter->intf_stop) +- adapter->intf_stop(adapter); ++ // P2P Probe rsp ++ rsvd_page_loc->LocP2PProbeRsp = *page_num; ++ rtw_hal_construct_P2PProbeRsp(adapter, &pframe[index], ++ &P2PProbeRspLength); ++ rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc], ++ P2PProbeRspLength, _FALSE, _FALSE, _FALSE); + +- /* Invoid SE0 reset signal during suspending*/ +- rtw_write8(adapter, REG_RSV_CTRL, 0x20); +- rtw_write8(adapter, REG_RSV_CTRL, 0x60); +-#endif //CONFIG_USB_HCI +- break; +- case WOWLAN_DISABLE: +- DBG_871X_LEVEL(_drv_always_, "WOWLAN_DISABLE\n"); +- +- if (!pwrctl->wowlan_pno_enable) { +- psta = rtw_get_stainfo(&adapter->stapriv, +- get_bssid(pmlmepriv)); +- +- if (psta != NULL) { +- media_status_rpt = +- (u16)((psta->mac_id<<8)|RT_MEDIA_DISCONNECT); +- rtw_hal_set_hwreg(adapter, +- HW_VAR_H2C_MEDIA_STATUS_RPT, +- (u8 *)&media_status_rpt); +- } else { +- DBG_871X("%s: psta is null\n", __func__); +- } +- } ++ //DBG_871X("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n", ++ // __FUNCTION__, &pframe[index-tx_desc], (P2PProbeRspLength+tx_desc)); + +- if (0) { +- DBG_871X("0x630:0x%02x\n", +- rtw_read8(adapter, 0x630)); +- DBG_871X("0x631:0x%02x\n", +- rtw_read8(adapter, 0x631)); +- } ++ CurtPktPageNum = (u8)PageNum(tx_desc + P2PProbeRspLength, page_size); + +- pwrctl->wowlan_wake_reason = rtw_read8(adapter, +- REG_WOWLAN_WAKE_REASON); ++ *page_num += CurtPktPageNum; + +- DBG_871X_LEVEL(_drv_always_, "wakeup_reason: 0x%02x\n", +- pwrctl->wowlan_wake_reason); ++ index += (CurtPktPageNum * page_size); + +- rtw_hal_set_fw_wow_related_cmd(adapter, 0); ++ //P2P nego rsp ++ rsvd_page_loc->LocNegoRsp = *page_num; ++ rtw_hal_construct_P2PNegoRsp(adapter, &pframe[index], ++ &P2PNegoRspLength); ++ rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc], ++ P2PNegoRspLength, _FALSE, _FALSE, _FALSE); + +- res = rtw_hal_check_wow_ctrl(adapter, _FALSE); +- if (res == _FALSE) { +- DBG_871X("[Error]%s: disable WOW cmd fail\n!!", __func__); +- rtw_hal_force_enable_rxdma(adapter); +- } ++ //DBG_871X("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", ++ // __FUNCTION__, &pframe[index-tx_desc], (NegoRspLength+tx_desc)); + +- if (IS_HARDWARE_TYPE_8188E(adapter)) +- rtw_hal_enable_tx_report(adapter); ++ CurtPktPageNum = (u8)PageNum(tx_desc + P2PNegoRspLength, page_size); + +- rtw_hal_update_tx_iv(adapter); ++ *page_num += CurtPktPageNum; + +-#ifdef CONFIG_GTK_OL +- if (psecuritypriv->dot11PrivacyAlgrthm == _AES_) +- rtw_hal_update_gtk_offload_info(adapter); +-#endif //CONFIG_GTK_OL ++ index += (CurtPktPageNum * page_size); ++ ++ //P2P invite rsp ++ rsvd_page_loc->LocInviteRsp = *page_num; ++ rtw_hal_construct_P2PInviteRsp(adapter, &pframe[index], ++ &P2PInviteRspLength); ++ rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc], ++ P2PInviteRspLength, _FALSE, _FALSE, _FALSE); + +- if (pHalFunc->hal_set_wowlan_fw != NULL) +- pHalFunc->hal_set_wowlan_fw(adapter, _FALSE); +- else +- DBG_871X("hal_set_wowlan_fw is null\n"); +-#ifdef CONFIG_GPIO_WAKEUP +- rtw_clear_hostwakeupgpio(adapter); +-#endif +- if((pwrctl->wowlan_wake_reason != FWDecisionDisconnect) && +- (pwrctl->wowlan_wake_reason != Rx_Pairwisekey) && +- (pwrctl->wowlan_wake_reason != Rx_DisAssoc) && +- (pwrctl->wowlan_wake_reason != Rx_DeAuth)) { +- +- rtw_hal_download_rsvd_page(adapter, RT_MEDIA_CONNECT); +- if (psta != NULL) { +- media_status_rpt = +- (u16)((psta->mac_id<<8)|RT_MEDIA_CONNECT); +- rtw_hal_set_hwreg(adapter, +- HW_VAR_H2C_MEDIA_STATUS_RPT, +- (u8 *)&media_status_rpt); +- } +- } +- break; +- default: +- break; +- } +- } +- break; +-#endif //CONFIG_WOWLAN +- default: +- if (0) +- DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" variable(%d) not defined!\n", +- FUNC_ADPT_ARG(adapter), variable); +- break; +- } ++ //DBG_871X("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", ++ //__FUNCTION__, &pframe[index-tx_desc], (InviteRspLength+tx_desc)); + +-_func_exit_; +-} ++ CurtPktPageNum = (u8)PageNum(tx_desc + P2PInviteRspLength, page_size); + +-void GetHwReg(_adapter *adapter, u8 variable, u8 *val) +-{ +- HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); +- DM_ODM_T *odm = &(hal_data->odmpriv); ++ *page_num += CurtPktPageNum; + +-_func_enter_; ++ index += (CurtPktPageNum * page_size); ++ ++ //P2P provision discovery rsp ++ rsvd_page_loc->LocPDRsp = *page_num; ++ rtw_hal_construct_P2PProvisionDisRsp( adapter, ++ &pframe[index], &P2PPDRspLength); + +- switch (variable) { +- case HW_VAR_BASIC_RATE: +- *((u16*)val) = hal_data->BasicRateSet; +- break; +- case HW_VAR_DM_FLAG: +- *((u32*)val) = odm->SupportAbility; +- break; +- case HW_VAR_RF_TYPE: +- *((u8*)val) = hal_data->rf_type; +- break; +- default: +- if (0) +- DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" variable(%d) not defined!\n", +- FUNC_ADPT_ARG(adapter), variable); +- break; +- } ++ rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc], ++ P2PPDRspLength, _FALSE, _FALSE, _FALSE); + +-_func_exit_; +-} ++ //DBG_871X("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", ++ // __FUNCTION__, &pframe[index-tx_desc], (PDRspLength+tx_desc)); + ++ CurtPktPageNum = (u8)PageNum(tx_desc + P2PPDRspLength, page_size); + ++ *page_num += CurtPktPageNum; + ++ *total_pkt_len = index + P2PPDRspLength; + +-u8 +-SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value) +-{ +- HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); +- DM_ODM_T *odm = &(hal_data->odmpriv); +- u8 bResult = _SUCCESS; ++ index += (CurtPktPageNum * page_size); + +- switch(variable) { +- case HW_DEF_FA_CNT_DUMP: +- //ODM_COMP_COMMON +- if(*((u8*)value)) +- odm->DebugComponents |= (ODM_COMP_DIG |ODM_COMP_FA_CNT); +- else +- odm->DebugComponents &= ~(ODM_COMP_DIG |ODM_COMP_FA_CNT); +- break; +- case HAL_DEF_DBG_RX_INFO_DUMP: +- { +- PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( odm , PHYDM_FALSEALMCNT); +- pDIG_T pDM_DigTable = &odm->DM_DigTable; + +- DBG_871X("============ Rx Info dump ===================\n"); +- DBG_871X("bLinked = %d, RSSI_Min = %d(%%), CurrentIGI = 0x%x \n", +- odm->bLinked, odm->RSSI_Min, pDM_DigTable->CurIGValue); +- DBG_871X("Cnt_Cck_fail = %d, Cnt_Ofdm_fail = %d, Total False Alarm = %d\n", +- FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_all); ++} ++#endif //CONFIG_P2P_WOWLAN + +- if(odm->bLinked){ +- DBG_871X("RxRate = %s, RSSI_A = %d(%%), RSSI_B = %d(%%)\n", +- HDATA_RATE(odm->RxRate), odm->RSSI_A, odm->RSSI_B); ++/* ++ * Description: Fill the reserved packets that FW will use to RSVD page. ++ * Now we just send 4 types packet to rsvd page. ++ * (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. ++ * Input: ++ * finished - FALSE:At the first time we will send all the packets as a large packet to Hw, ++ * so we need to set the packet length to total lengh. ++ * TRUE: At the second time, we should send the first packet (default:beacon) ++ * to Hw again and set the lengh in descriptor to the real beacon lengh. ++ * 2009.10.15 by tynli. ++ * ++ * Page Size = 128: 8188e, 8723a/b, 8192c/d, ++ * Page Size = 256: 8192e, 8821a ++ * Page Size = 512: 8812a ++ */ + +- #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA +- rtw_dump_raw_rssi_info(adapter); +- #endif +- } +- } +- break; +- case HW_DEF_ODM_DBG_FLAG: +- ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_COMP, *((u8Byte*)value)); +- break; +- case HW_DEF_ODM_DBG_LEVEL: +- ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_LEVEL, *((u4Byte*)value)); +- break; +- case HAL_DEF_DBG_DM_FUNC: +- { +- u8 dm_func = *((u8*)value); +- struct dm_priv *dm = &hal_data->dmpriv; +- +- if(dm_func == 0){ //disable all dynamic func +- pDIG_T pDM_DigTable = &odm->DM_DigTable; +- odm->SupportAbility = DYNAMIC_FUNC_DISABLE; +- pDM_DigTable->bStopDIG = _TRUE; +- DBG_8192C("==> Disable all dynamic function...\n"); +- } +- else if(dm_func == 1){//disable DIG +- pDIG_T pDM_DigTable = &odm->DM_DigTable; +- odm->SupportAbility &= (~DYNAMIC_BB_DIG); +- pDM_DigTable->bStopDIG = _TRUE; +- DBG_8192C("==> Disable DIG...\n"); +- } +- else if(dm_func == 2){//disable High power +- odm->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR); +- } +- else if(dm_func == 3){//disable tx power tracking +- odm->SupportAbility &= (~DYNAMIC_RF_CALIBRATION); +- DBG_8192C("==> Disable tx power tracking...\n"); +- } +- else if(dm_func == 4){//disable BT coexistence +- dm->DMFlag &= (~DYNAMIC_FUNC_BT); +- } +- else if(dm_func == 5){//disable antenna diversity +- odm->SupportAbility &= (~DYNAMIC_BB_ANT_DIV); +- } +- else if(dm_func == 6){//turn on all dynamic func +- if(!(odm->SupportAbility & DYNAMIC_BB_DIG)) { +- DIG_T *pDigTable = &odm->DM_DigTable; +- pDigTable->CurIGValue= rtw_read8(adapter, 0xc50); +- pDigTable->bStopDIG = _FALSE; +- } +- dm->DMFlag |= DYNAMIC_FUNC_BT; +- odm->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE; ++void rtw_hal_set_fw_rsvd_page(_adapter* adapter, bool finished) ++{ ++ PHAL_DATA_TYPE pHalData; ++ struct xmit_frame *pcmdframe; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv; ++ struct mlme_ext_priv *pmlmeext; ++ struct mlme_ext_info *pmlmeinfo; ++ struct pwrctrl_priv *pwrctl; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct hal_ops *pHalFunc = &adapter->HalFunc; ++ u32 BeaconLength = 0, ProbeRspLength = 0, PSPollLength = 0; ++ u32 NullDataLength = 0, QosNullLength = 0, BTQosNullLength = 0; ++ u32 ProbeReqLength = 0, NullFunctionDataLength = 0; ++ u8 TxDescLen = TXDESC_SIZE, TxDescOffset = TXDESC_OFFSET; ++ u8 TotalPageNum = 0 , CurtPktPageNum = 0 , RsvdPageNum = 0; ++ u8 *ReservedPagePacket; ++ u16 BufIndex = 0; ++ u32 TotalPacketLen = 0, MaxRsvdPageBufSize = 0, PageSize = 0; ++ RSVDPAGE_LOC RsvdPageLoc; + +- DBG_8192C("==> Turn on all dynamic function...\n"); +- } ++#ifdef DBG_CONFIG_ERROR_DETECT ++ struct sreset_priv *psrtpriv; ++#endif /* DBG_CONFIG_ERROR_DETECT */ ++ ++ ++ pHalData = GET_HAL_DATA(adapter); ++#ifdef DBG_CONFIG_ERROR_DETECT ++ psrtpriv = &pHalData->srestpriv; ++#endif ++ pxmitpriv = &adapter->xmitpriv; ++ pmlmeext = &adapter->mlmeextpriv; ++ pmlmeinfo = &pmlmeext->mlmext_info; ++ pwrctl = adapter_to_pwrctl(adapter); ++ ++ rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize); ++ ++ if (PageSize == 0) { ++ DBG_871X("[Error]: %s, PageSize is zero!!\n", __func__); ++ return; + } +- break; +- case HAL_DEF_DBG_DUMP_RXPKT: +- hal_data->bDumpRxPkt = *((u8*)value); +- break; +- case HAL_DEF_DBG_DUMP_TXPKT: +- hal_data->bDumpTxPkt = *((u8*)value); +- break; +- case HAL_DEF_ANT_DETECT: +- hal_data->AntDetection = *((u8 *)value); +- break; +- case HAL_DEF_DBG_DIS_PWT: +- hal_data->bDisableTXPowerTraining = *((u8*)value); +- break; +- default: +- DBG_871X_LEVEL(_drv_always_, "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable); +- bResult = _FAIL; +- break; ++ ++ if (pwrctl->wowlan_mode == _TRUE || pwrctl->wowlan_ap_mode == _TRUE) ++ RsvdPageNum = rtw_hal_get_txbuff_rsvd_page_num(adapter, _TRUE); ++ else ++ RsvdPageNum = rtw_hal_get_txbuff_rsvd_page_num(adapter, _FALSE); ++ ++ DBG_871X("%s PageSize: %d, RsvdPageNUm: %d\n",__func__, PageSize, RsvdPageNum); ++ ++ MaxRsvdPageBufSize = RsvdPageNum*PageSize; ++ ++ if (MaxRsvdPageBufSize > MAX_CMDBUF_SZ) { ++ DBG_871X("%s MaxRsvdPageBufSize(%d) is larger than MAX_CMDBUF_SZ(%d)", ++ __func__, MaxRsvdPageBufSize, MAX_CMDBUF_SZ); ++ rtw_warn_on(1); ++ return; ++ } ++ ++ pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv); ++ ++ if (pcmdframe == NULL) { ++ DBG_871X("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); ++ return; + } + +- return bResult; +-} ++ ReservedPagePacket = pcmdframe->buf_addr; ++ _rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC)); + +-u8 +-GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value) +-{ +- HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); +- DM_ODM_T *odm = &(hal_data->odmpriv); +- u8 bResult = _SUCCESS; ++ /* beacon * 2 pages */ ++ BufIndex = TxDescOffset; ++ rtw_hal_construct_beacon(adapter, ++ &ReservedPagePacket[BufIndex], &BeaconLength); + +- switch(variable) { +- case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: +- { +- struct mlme_priv *pmlmepriv; +- struct sta_priv *pstapriv; +- struct sta_info *psta; ++ /* ++ * When we count the first page size, we need to reserve description size for the RSVD ++ * packet, it will be filled in front of the packet in TXPKTBUF. ++ */ ++ CurtPktPageNum = (u8)PageNum((TxDescLen + BeaconLength), PageSize); ++ /* If we don't add 1 more page, ARP offload function will fail at 8723bs.*/ ++ if (CurtPktPageNum == 1) ++ CurtPktPageNum += 1; + +- pmlmepriv = &adapter->mlmepriv; +- pstapriv = &adapter->stapriv; +- psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress); +- if (psta) +- { +- *((int*)value) = psta->rssi_stat.UndecoratedSmoothedPWDB; +- } +- } +- break; +- case HW_DEF_ODM_DBG_FLAG: +- *((u8Byte*)value) = odm->DebugComponents; +- break; +- case HW_DEF_ODM_DBG_LEVEL: +- *((u4Byte*)value) = odm->DebugLevel; +- break; +- case HAL_DEF_DBG_DM_FUNC: +- *(( u32*)value) =hal_data->odmpriv.SupportAbility; +- break; +- case HAL_DEF_DBG_DUMP_RXPKT: +- *((u8*)value) = hal_data->bDumpRxPkt; +- break; +- case HAL_DEF_DBG_DUMP_TXPKT: +- *((u8*)value) = hal_data->bDumpTxPkt; +- break; +- case HAL_DEF_ANT_DETECT: +- *((u8 *)value) = hal_data->AntDetection; +- break; +- case HAL_DEF_MACID_SLEEP: +- *(u8*)value = _FALSE; +- break; +- case HAL_DEF_TX_PAGE_SIZE: +- *(( u32*)value) = PAGE_SIZE_128; +- break; +- case HAL_DEF_DBG_DIS_PWT: +- *(u8*)value = hal_data->bDisableTXPowerTraining; +- break; +- default: +- DBG_871X_LEVEL(_drv_always_, "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable); +- bResult = _FAIL; +- break; +- } ++ TotalPageNum += CurtPktPageNum; + +- return bResult; +-} ++ BufIndex += (CurtPktPageNum*PageSize); + +-void GetHalODMVar( +- PADAPTER Adapter, +- HAL_ODM_VARIABLE eVariable, +- PVOID pValue1, +- PVOID pValue2) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- PDM_ODM_T podmpriv = &pHalData->odmpriv; +- switch(eVariable){ +-#if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) +- case HAL_ODM_NOISE_MONITOR: +- { +- u8 chan = *(u8*)pValue1; +- *(s16 *)pValue2 = pHalData->noise[chan]; +- #ifdef DBG_NOISE_MONITOR +- DBG_8192C("### Noise monitor chan(%d)-noise:%d (dBm) ###\n", +- chan,pHalData->noise[chan]); +- #endif +- +- } +- break; +-#endif//#ifdef CONFIG_BACKGROUND_NOISE_MONITOR +- default: +- break; +- } +-} ++ if (pwrctl->wowlan_ap_mode == _TRUE) { ++ /* (4) probe response*/ ++ RsvdPageLoc.LocProbeRsp = TotalPageNum; ++ rtw_hal_construct_ProbeRsp( ++ adapter, &ReservedPagePacket[BufIndex], ++ &ProbeRspLength, ++ get_my_bssid(&pmlmeinfo->network), _FALSE); ++ rtw_hal_fill_fake_txdesc(adapter, ++ &ReservedPagePacket[BufIndex-TxDescLen], ++ ProbeRspLength, _FALSE, _FALSE, _FALSE); + +-void SetHalODMVar( +- PADAPTER Adapter, +- HAL_ODM_VARIABLE eVariable, +- PVOID pValue1, +- BOOLEAN bSet) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- PDM_ODM_T podmpriv = &pHalData->odmpriv; +- //_irqL irqL; +- switch(eVariable){ +- case HAL_ODM_STA_INFO: +- { +- struct sta_info *psta = (struct sta_info *)pValue1; +- if(bSet){ +- DBG_8192C("### Set STA_(%d) info ###\n",psta->mac_id); +- ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,psta); +- } +- else{ +- DBG_8192C("### Clean STA_(%d) info ###\n",psta->mac_id); +- //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); +- ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL); +- +- //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); +- } +- } +- break; +- case HAL_ODM_P2P_STATE: +- ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DIRECT,bSet); +- break; +- case HAL_ODM_WIFI_DISPLAY_STATE: +- ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DISPLAY,bSet); +- break; +- case HAL_ODM_REGULATION: +- ODM_CmnInfoInit(podmpriv, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G); +- ODM_CmnInfoInit(podmpriv, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G); +- break; +- #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) +- case HAL_ODM_NOISE_MONITOR: +- { +- struct noise_info *pinfo = (struct noise_info *)pValue1; ++ CurtPktPageNum = (u8)PageNum(TxDescLen + ProbeRspLength, PageSize); ++ TotalPageNum += CurtPktPageNum; ++ TotalPacketLen = BufIndex + ProbeRspLength; ++ BufIndex += (CurtPktPageNum*PageSize); ++ goto download_page; ++ } + +- #ifdef DBG_NOISE_MONITOR +- DBG_8192C("### Noise monitor chan(%d)-bPauseDIG:%d,IGIValue:0x%02x,max_time:%d (ms) ###\n", +- pinfo->chan,pinfo->bPauseDIG,pinfo->IGIValue,pinfo->max_time); +- #endif +- +- pHalData->noise[pinfo->chan] = ODM_InbandNoise_Monitor(podmpriv,pinfo->bPauseDIG,pinfo->IGIValue,pinfo->max_time); +- DBG_871X("chan_%d, noise = %d (dBm)\n",pinfo->chan,pHalData->noise[pinfo->chan]); +- #ifdef DBG_NOISE_MONITOR +- DBG_871X("noise_a = %d, noise_b = %d noise_all:%d \n", +- podmpriv->noise_level.noise[ODM_RF_PATH_A], +- podmpriv->noise_level.noise[ODM_RF_PATH_B], +- podmpriv->noise_level.noise_all); +- #endif ++ /* ps-poll * 1 page */ ++ RsvdPageLoc.LocPsPoll = TotalPageNum; ++ DBG_871X("LocPsPoll: %d\n", RsvdPageLoc.LocPsPoll); ++ rtw_hal_construct_PSPoll(adapter, ++ &ReservedPagePacket[BufIndex], &PSPollLength); ++ rtw_hal_fill_fake_txdesc(adapter, ++ &ReservedPagePacket[BufIndex-TxDescLen], ++ PSPollLength, _TRUE, _FALSE, _FALSE); ++ ++ CurtPktPageNum = (u8)PageNum((TxDescLen + PSPollLength), PageSize); ++ ++ TotalPageNum += CurtPktPageNum; ++ ++ BufIndex += (CurtPktPageNum*PageSize); ++ ++#ifdef CONFIG_BT_COEXIST ++ /* BT Qos null data * 1 page */ ++ RsvdPageLoc.LocBTQosNull = TotalPageNum; ++ DBG_871X("LocBTQosNull: %d\n", RsvdPageLoc.LocBTQosNull); ++ rtw_hal_construct_NullFunctionData( ++ adapter, ++ &ReservedPagePacket[BufIndex], ++ &BTQosNullLength, ++ get_my_bssid(&pmlmeinfo->network), ++ _TRUE, 0, 0, _FALSE); ++ rtw_hal_fill_fake_txdesc(adapter, ++ &ReservedPagePacket[BufIndex-TxDescLen], ++ BTQosNullLength, _FALSE, _TRUE, _FALSE); ++ ++ CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength, PageSize); ++ ++ TotalPageNum += CurtPktPageNum; ++ ++ BufIndex += (CurtPktPageNum*PageSize); ++#endif /* CONFIG_BT_COEXIT */ ++ ++ /* null data * 1 page */ ++ RsvdPageLoc.LocNullData = TotalPageNum; ++ DBG_871X("LocNullData: %d\n", RsvdPageLoc.LocNullData); ++ rtw_hal_construct_NullFunctionData( ++ adapter, ++ &ReservedPagePacket[BufIndex], ++ &NullDataLength, ++ get_my_bssid(&pmlmeinfo->network), ++ _FALSE, 0, 0, _FALSE); ++ rtw_hal_fill_fake_txdesc(adapter, ++ &ReservedPagePacket[BufIndex-TxDescLen], ++ NullDataLength, _FALSE, _FALSE, _FALSE); ++ ++ CurtPktPageNum = (u8)PageNum(TxDescLen + NullDataLength, PageSize); ++ ++ TotalPageNum += CurtPktPageNum; ++ ++ BufIndex += (CurtPktPageNum*PageSize); ++ ++ //Qos null data * 1 page ++ RsvdPageLoc.LocQosNull = TotalPageNum; ++ DBG_871X("LocQosNull: %d\n", RsvdPageLoc.LocQosNull); ++ rtw_hal_construct_NullFunctionData( ++ adapter, ++ &ReservedPagePacket[BufIndex], ++ &QosNullLength, ++ get_my_bssid(&pmlmeinfo->network), ++ _TRUE, 0, 0, _FALSE); ++ rtw_hal_fill_fake_txdesc(adapter, ++ &ReservedPagePacket[BufIndex-TxDescLen], ++ QosNullLength, _FALSE, _FALSE, _FALSE); ++ ++ CurtPktPageNum = (u8)PageNum(TxDescLen + QosNullLength, PageSize); ++ ++ TotalPageNum += CurtPktPageNum; ++ ++ TotalPacketLen = BufIndex + QosNullLength; ++ ++ BufIndex += (CurtPktPageNum*PageSize); ++ ++#ifdef CONFIG_WOWLAN ++ if (pwrctl->wowlan_mode == _TRUE && ++ check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ rtw_hal_set_wow_fw_rsvd_page(adapter, ReservedPagePacket, ++ BufIndex, TxDescLen, PageSize, ++ &TotalPageNum, &TotalPacketLen, &RsvdPageLoc); ++ } ++#endif /* CONFIG_WOWLAN */ ++ ++#ifdef CONFIG_P2P_WOWLAN ++ if(_TRUE == pwrctl->wowlan_p2p_mode) { ++ rtw_hal_set_p2p_wow_fw_rsvd_page(adapter, ReservedPagePacket, ++ BufIndex, TxDescLen, PageSize, ++ &TotalPageNum, &TotalPacketLen, &RsvdPageLoc); ++ } ++#endif /* CONFIG_P2P_WOWLAN */ ++ ++download_page: ++ /* DBG_871X("%s BufIndex(%d), TxDescLen(%d), PageSize(%d)\n",__func__, BufIndex, TxDescLen, PageSize);*/ ++ DBG_871X("%s PageNum(%d), pktlen(%d)\n", ++ __func__, TotalPageNum, TotalPacketLen); ++ ++ if (TotalPacketLen > MaxRsvdPageBufSize) { ++ DBG_871X("%s(ERROR): rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n", ++ __FUNCTION__, TotalPacketLen,MaxRsvdPageBufSize); ++ rtw_warn_on(1); ++ goto error; ++ } else { ++ /* update attribute */ ++ pattrib = &pcmdframe->attrib; ++ update_mgntframe_attrib(adapter, pattrib); ++ pattrib->qsel = QSLT_BEACON; ++ pattrib->pktlen = TotalPacketLen - TxDescOffset; ++ pattrib->last_txcmdsz = TotalPacketLen - TxDescOffset; ++#ifdef CONFIG_PCI_HCI ++ dump_mgntframe(adapter, pcmdframe); ++#else ++ dump_mgntframe_and_wait(adapter, pcmdframe, 100); ++#endif ++ } ++ ++ DBG_871X("%s: Set RSVD page location to Fw ,TotalPacketLen(%d), TotalPageNum(%d)\n", ++ __func__,TotalPacketLen,TotalPageNum); ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ rtw_hal_set_FwRsvdPage_cmd(adapter, &RsvdPageLoc); ++ if (pwrctl->wowlan_mode == _TRUE) ++ rtw_hal_set_FwAoacRsvdPage_cmd(adapter, &RsvdPageLoc); ++#ifdef CONFIG_AP_WOWLAN ++ if (pwrctl->wowlan_ap_mode == _TRUE) ++ rtw_hal_set_ap_rsvdpage_loc_cmd(adapter, &RsvdPageLoc); ++#endif /* CONFIG_AP_WOWLAN */ ++ } else if (pwrctl->wowlan_pno_enable) { ++#ifdef CONFIG_PNO_SUPPORT ++ rtw_hal_set_FwAoacRsvdPage_cmd(adapter, &RsvdPageLoc); ++ if(pwrctl->pno_in_resume) ++ rtw_hal_set_scan_offload_info_cmd(adapter, ++ &RsvdPageLoc, 0); ++ else ++ rtw_hal_set_scan_offload_info_cmd(adapter, ++ &RsvdPageLoc, 1); ++#endif /* CONFIG_PNO_SUPPORT */ ++ } ++#ifdef CONFIG_P2P_WOWLAN ++ if(_TRUE == pwrctl->wowlan_p2p_mode) ++ rtw_hal_set_FwP2PRsvdPage_cmd(adapter, &RsvdPageLoc); ++#endif /* CONFIG_P2P_WOWLAN */ ++ return; ++error: ++ rtw_free_xmitframe(pxmitpriv, pcmdframe); ++} ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset, u16 bwmode) ++{ ++ u8 ch_sw_h2c_buf[4] = {0x00, 0x00, 0x00, 0x00}; ++ ++ ch_sw_h2c_buf[0] = channel; ++ ch_sw_h2c_buf[2] = 1; ++ ++ switch (bwmode) { ++ case CHANNEL_WIDTH_40: ++ ch_sw_h2c_buf[1] |= 0x01; ++ break; ++ case CHANNEL_WIDTH_80: ++ ch_sw_h2c_buf[1] |= 0x02; ++ break; ++ case CHANNEL_WIDTH_20: ++ default: ++ break; ++ } ++ ++ switch (channel_offset) { ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ if (bwmode == CHANNEL_WIDTH_40) ++ ch_sw_h2c_buf[1] |= 0x04; ++ else if (bwmode == CHANNEL_WIDTH_80) ++ ch_sw_h2c_buf[1] |= 0x20; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ if (bwmode == CHANNEL_WIDTH_40) ++ ch_sw_h2c_buf[1] |= 0x08; ++ else if (bwmode == CHANNEL_WIDTH_80) ++ ch_sw_h2c_buf[1] |= 0x40; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: ++ default: ++ break; ++ } ++ ++ return rtw_hal_fill_h2c_cmd(padapter, H2C_CHNL_SWITCH_OPER_OFFLOAD, sizeof(ch_sw_h2c_buf), ch_sw_h2c_buf); ++} ++#endif ++#endif ++ ++void SetHwReg(_adapter *adapter, u8 variable, u8 *val) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++_func_enter_; ++ ++ switch (variable) { ++ case HW_VAR_PORT_SWITCH: ++ hw_var_port_switch(adapter); ++ break; ++ case HW_VAR_INIT_RTS_RATE: ++ { ++ u16 brate_cfg = *((u16*)val); ++ u8 rate_index = 0; ++ HAL_VERSION *hal_ver = &hal_data->VersionID; ++ ++ if (IS_8188E(*hal_ver)) { ++ ++ while (brate_cfg > 0x1) { ++ brate_cfg = (brate_cfg >> 1); ++ rate_index++; ++ } ++ rtw_write8(adapter, REG_INIRTS_RATE_SEL, rate_index); ++ } else { ++ rtw_warn_on(1); ++ } ++ } ++ break; ++ case HW_VAR_SEC_CFG: ++ { ++ #if defined(CONFIG_CONCURRENT_MODE) && !defined(DYNAMIC_CAMID_ALLOC) ++ // enable tx enc and rx dec engine, and no key search for MC/BC ++ rtw_write8(adapter, REG_SECCFG, SCR_NoSKMC|SCR_RxDecEnable|SCR_TxEncEnable); ++ #elif defined(DYNAMIC_CAMID_ALLOC) ++ u16 reg_scr_ori; ++ u16 reg_scr; ++ ++ reg_scr = reg_scr_ori = rtw_read16(adapter, REG_SECCFG); ++ reg_scr |= (SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable); ++ ++ if (_rtw_camctl_chk_cap(adapter, SEC_CAP_CHK_BMC)) ++ reg_scr |= SCR_CHK_BMC; ++ ++ if (_rtw_camctl_chk_flags(adapter, SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH)) ++ reg_scr |= SCR_NoSKMC; ++ ++ if (reg_scr != reg_scr_ori) ++ rtw_write16(adapter, REG_SECCFG, reg_scr); ++ #else ++ rtw_write8(adapter, REG_SECCFG, *((u8*)val)); ++ #endif ++ } ++ break; ++ case HW_VAR_SEC_DK_CFG: ++ { ++ struct security_priv *sec = &adapter->securitypriv; ++ u8 reg_scr = rtw_read8(adapter, REG_SECCFG); ++ ++ if (val) /* Enable default key related setting */ ++ { ++ reg_scr |= SCR_TXBCUSEDK; ++ if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X) ++ reg_scr |= (SCR_RxUseDK|SCR_TxUseDK); ++ } ++ else /* Disable default key related setting */ ++ { ++ reg_scr &= ~(SCR_RXBCUSEDK|SCR_TXBCUSEDK|SCR_RxUseDK|SCR_TxUseDK); + } ++ ++ rtw_write8(adapter, REG_SECCFG, reg_scr); ++ } + break; +- #endif//#ifdef CONFIG_BACKGROUND_NOISE_MONITOR + ++ case HW_VAR_ASIX_IOT: ++ // enable ASIX IOT function ++ if (*((u8*)val) == _TRUE) { ++ // 0xa2e[0]=0 (disable rake receiver) ++ rtw_write8(adapter, rCCK0_FalseAlarmReport+2, ++ rtw_read8(adapter, rCCK0_FalseAlarmReport+2) & ~(BIT0)); ++ // 0xa1c=0xa0 (reset channel estimation if signal quality is bad) ++ rtw_write8(adapter, rCCK0_DSPParameter2, 0xa0); ++ } else { ++ // restore reg:0xa2e, reg:0xa1c ++ rtw_write8(adapter, rCCK0_FalseAlarmReport+2, ++ rtw_read8(adapter, rCCK0_FalseAlarmReport+2)|(BIT0)); ++ rtw_write8(adapter, rCCK0_DSPParameter2, 0x00); ++ } ++ break; ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++ case HW_VAR_WOWLAN: ++ { ++ struct wowlan_ioctl_param *poidparam; ++ ++ poidparam = (struct wowlan_ioctl_param *)val; ++ switch (poidparam->subcode) { ++#ifdef CONFIG_WOWLAN ++ case WOWLAN_PATTERN_CLEAN: ++ rtw_hal_dl_pattern(adapter, _TRUE); ++ break; ++ case WOWLAN_ENABLE: ++ rtw_hal_wow_enable(adapter); ++ break; ++ case WOWLAN_DISABLE: ++ rtw_hal_wow_disable(adapter); ++ break; ++#endif /*CONFIG_WOWLAN*/ ++#ifdef CONFIG_AP_WOWLAN ++ case WOWLAN_AP_ENABLE: ++ rtw_hal_ap_wow_enable(adapter); ++ break; ++ case WOWLAN_AP_DISABLE: ++ rtw_hal_ap_wow_disable(adapter); ++ break; ++#endif /*CONFIG_AP_WOWLAN*/ ++ default: ++ break; ++ } ++ } ++ break; ++#endif /*defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)*/ + default: ++ if (0) ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" variable(%d) not defined!\n", ++ FUNC_ADPT_ARG(adapter), variable); + break; + } +-} + +- +-BOOLEAN +-eqNByte( +- u8* str1, +- u8* str2, +- u32 num +- ) +-{ +- if(num==0) +- return _FALSE; +- while(num>0) +- { +- num--; +- if(str1[num]!=str2[num]) ++_func_exit_; ++} ++ ++void GetHwReg(_adapter *adapter, u8 variable, u8 *val) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ ++_func_enter_; ++ ++ switch (variable) { ++ case HW_VAR_BASIC_RATE: ++ *((u16*)val) = hal_data->BasicRateSet; ++ break; ++ case HW_VAR_RF_TYPE: ++ *((u8*)val) = hal_data->rf_type; ++ break; ++ case HW_VAR_DO_IQK: ++ *val = hal_data->bNeedIQK; ++ break; ++ case HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO: ++ if (hal_is_band_support(adapter, BAND_ON_5G)) ++ *val = _TRUE; ++ else ++ *val = _FALSE; ++ ++ break; ++ default: ++ if (0) ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" variable(%d) not defined!\n", ++ FUNC_ADPT_ARG(adapter), variable); ++ break; ++ } ++ ++_func_exit_; ++} ++ ++u8 ++SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ u8 bResult = _SUCCESS; ++ ++ switch(variable) { ++ ++ case HAL_DEF_DBG_DUMP_RXPKT: ++ hal_data->bDumpRxPkt = *((u8*)value); ++ break; ++ case HAL_DEF_DBG_DUMP_TXPKT: ++ hal_data->bDumpTxPkt = *((u8*)value); ++ break; ++ case HAL_DEF_ANT_DETECT: ++ hal_data->AntDetection = *((u8 *)value); ++ break; ++ case HAL_DEF_DBG_DIS_PWT: ++ hal_data->bDisableTXPowerTraining = *((u8*)value); ++ break; ++ default: ++ DBG_871X_LEVEL(_drv_always_, "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable); ++ bResult = _FAIL; ++ break; ++ } ++ ++ return bResult; ++} ++ ++#ifdef CONFIG_BEAMFORMING ++u8 rtw_hal_query_txbfer_rf_num(_adapter *adapter) ++{ ++ struct registry_priv *pregistrypriv = &adapter->registrypriv; ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ ++ if ((pregistrypriv->beamformer_rf_num) && (IS_HARDWARE_TYPE_8814AE(adapter) || IS_HARDWARE_TYPE_8814AU(adapter) || IS_HARDWARE_TYPE_8822BU(adapter))) ++ return pregistrypriv->beamformer_rf_num; ++ else if (IS_HARDWARE_TYPE_8814AE(adapter) ++/* ++#if defined(CONFIG_USB_HCI) ++ || (IS_HARDWARE_TYPE_8814AU(adapter) && (pUsbModeMech->CurUsbMode == 2 || pUsbModeMech->HubUsbMode == 2)) //for USB3.0 ++#endif ++*/ ++ ) { ++ /*BF cap provided by Yu Chen, Sean, 2015, 01 */ ++ if (hal_data->rf_type == RF_3T3R) ++ return 2; ++ else if (hal_data->rf_type == RF_4T4R) ++ return 3; ++ else ++ return 1; ++ } else ++ return 1; ++ ++} ++u8 rtw_hal_query_txbfee_rf_num(_adapter *adapter) ++{ ++ struct registry_priv *pregistrypriv = &adapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ ++ if ((pregistrypriv->beamformee_rf_num) && (IS_HARDWARE_TYPE_8814AE(adapter) || IS_HARDWARE_TYPE_8814AU(adapter) || IS_HARDWARE_TYPE_8822BU(adapter))) ++ return pregistrypriv->beamformee_rf_num; ++ else if (IS_HARDWARE_TYPE_8814AE(adapter) || IS_HARDWARE_TYPE_8814AU(adapter)) { ++ if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) ++ return 2; ++ else ++ return 2;/*TODO: May be 3 in the future, by ChenYu. */ ++ } else ++ return 1; ++ ++} ++#endif ++ ++u8 ++GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ u8 bResult = _SUCCESS; ++ ++ switch(variable) { ++ case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: ++ { ++ struct mlme_priv *pmlmepriv; ++ struct sta_priv *pstapriv; ++ struct sta_info *psta; ++ ++ pmlmepriv = &adapter->mlmepriv; ++ pstapriv = &adapter->stapriv; ++ psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress); ++ if (psta) ++ { ++ *((int*)value) = psta->rssi_stat.UndecoratedSmoothedPWDB; ++ } ++ } ++ break; ++ case HAL_DEF_DBG_DUMP_RXPKT: ++ *((u8*)value) = hal_data->bDumpRxPkt; ++ break; ++ case HAL_DEF_DBG_DUMP_TXPKT: ++ *((u8*)value) = hal_data->bDumpTxPkt; ++ break; ++ case HAL_DEF_ANT_DETECT: ++ *((u8 *)value) = hal_data->AntDetection; ++ break; ++ case HAL_DEF_MACID_SLEEP: ++ *(u8*)value = _FALSE; ++ break; ++ case HAL_DEF_TX_PAGE_SIZE: ++ *(( u32*)value) = PAGE_SIZE_128; ++ break; ++ case HAL_DEF_DBG_DIS_PWT: ++ *(u8*)value = hal_data->bDisableTXPowerTraining; ++ break; ++#ifdef CONFIG_BEAMFORMING ++ case HAL_DEF_BEAMFORMER_CAP: ++ *(u8 *)value = rtw_hal_query_txbfer_rf_num(adapter); ++ break; ++ case HAL_DEF_BEAMFORMEE_CAP: ++ *(u8 *)value = rtw_hal_query_txbfee_rf_num(adapter); ++ break; ++#endif ++ default: ++ DBG_871X_LEVEL(_drv_always_, "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable); ++ bResult = _FAIL; ++ break; ++ } ++ ++ return bResult; ++} ++ ++void SetHalODMVar( ++ PADAPTER Adapter, ++ HAL_ODM_VARIABLE eVariable, ++ PVOID pValue1, ++ BOOLEAN bSet) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T podmpriv = &pHalData->odmpriv; ++ //_irqL irqL; ++ switch(eVariable){ ++ case HAL_ODM_STA_INFO: ++ { ++ struct sta_info *psta = (struct sta_info *)pValue1; ++ if(bSet){ ++ DBG_8192C("### Set STA_(%d) info ###\n",psta->mac_id); ++ ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,psta); ++ } ++ else{ ++ DBG_8192C("### Clean STA_(%d) info ###\n",psta->mac_id); ++ //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); ++ ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL); ++ ++ //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); ++ } ++ } ++ break; ++ case HAL_ODM_P2P_STATE: ++ ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DIRECT,bSet); ++ break; ++ case HAL_ODM_WIFI_DISPLAY_STATE: ++ ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DISPLAY,bSet); ++ break; ++ case HAL_ODM_REGULATION: ++ ODM_CmnInfoInit(podmpriv, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G); ++ ODM_CmnInfoInit(podmpriv, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G); ++ break; ++#if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) ++ case HAL_ODM_NOISE_MONITOR: ++ { ++ struct noise_info *pinfo = (struct noise_info *)pValue1; ++ ++ #ifdef DBG_NOISE_MONITOR ++ DBG_8192C("### Noise monitor chan(%d)-bPauseDIG:%d,IGIValue:0x%02x,max_time:%d (ms) ###\n", ++ pinfo->chan,pinfo->bPauseDIG,pinfo->IGIValue,pinfo->max_time); ++ #endif ++ ++ pHalData->noise[pinfo->chan] = ODM_InbandNoise_Monitor(podmpriv,pinfo->bPauseDIG,pinfo->IGIValue,pinfo->max_time); ++ DBG_871X("chan_%d, noise = %d (dBm)\n",pinfo->chan,pHalData->noise[pinfo->chan]); ++ #ifdef DBG_NOISE_MONITOR ++ DBG_871X("noise_a = %d, noise_b = %d noise_all:%d \n", ++ podmpriv->noise_level.noise[ODM_RF_PATH_A], ++ podmpriv->noise_level.noise[ODM_RF_PATH_B], ++ podmpriv->noise_level.noise_all); ++ #endif ++ } ++ break; ++#endif/*#ifdef CONFIG_BACKGROUND_NOISE_MONITOR*/ ++ ++ case HAL_ODM_INITIAL_GAIN: ++ { ++ u8 rx_gain = *((u8 *)(pValue1)); ++ /*printk("rx_gain:%x\n",rx_gain);*/ ++ if (rx_gain == 0xff) {/*restore rx gain*/ ++ /*ODM_Write_DIG(podmpriv,pDigTable->BackupIGValue);*/ ++ odm_PauseDIG(podmpriv, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_0, rx_gain); ++ } else { ++ /*pDigTable->BackupIGValue = pDigTable->CurIGValue;*/ ++ /*ODM_Write_DIG(podmpriv,rx_gain);*/ ++ odm_PauseDIG(podmpriv, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_0, rx_gain); ++ } ++ } ++ break; ++ case HAL_ODM_FA_CNT_DUMP: ++ if (*((u8 *)pValue1)) ++ podmpriv->DebugComponents |= (ODM_COMP_DIG | ODM_COMP_FA_CNT); ++ else ++ podmpriv->DebugComponents &= ~(ODM_COMP_DIG | ODM_COMP_FA_CNT); ++ break; ++ case HAL_ODM_DBG_FLAG: ++ ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_DBG_COMP, *((u8Byte *)pValue1)); ++ break; ++ case HAL_ODM_DBG_LEVEL: ++ ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_DBG_LEVEL, *((u4Byte *)pValue1)); ++ break; ++ case HAL_ODM_RX_INFO_DUMP: ++ { ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure(podmpriv , PHYDM_FALSEALMCNT); ++ pDIG_T pDM_DigTable = &podmpriv->DM_DigTable; ++ void *sel; ++ ++ sel = pValue1; ++ ++ DBG_871X_SEL(sel , "============ Rx Info dump ===================\n"); ++ DBG_871X_SEL(sel , "bLinked = %d, RSSI_Min = %d(%%), CurrentIGI = 0x%x\n", podmpriv->bLinked, podmpriv->RSSI_Min, pDM_DigTable->CurIGValue); ++ DBG_871X_SEL(sel , "Cnt_Cck_fail = %d, Cnt_Ofdm_fail = %d, Total False Alarm = %d\n", FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_all); ++ ++ if (podmpriv->bLinked) { ++ DBG_871X_SEL(sel , "RxRate = %s", HDATA_RATE(podmpriv->RxRate)); ++ DBG_871X_SEL(sel , " RSSI_A = %d(%%), RSSI_B = %d(%%)\n", podmpriv->RSSI_A, podmpriv->RSSI_B); ++ #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA ++ rtw_dump_raw_rssi_info(Adapter, sel); ++ #endif ++ } ++ } ++ break; ++ ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ case HAL_ODM_AUTO_CHNL_SEL: ++ { ++ ACS_OP acs_op = *(ACS_OP *)pValue1; ++ ++ rtw_phydm_func_set(Adapter, ODM_BB_NHM_CNT); ++ ++ if (ACS_INIT == acs_op) { ++ #ifdef DBG_AUTO_CHNL_SEL_NHM ++ DBG_871X("[ACS-"ADPT_FMT"] HAL_ODM_AUTO_CHNL_SEL: ACS_INIT\n", ADPT_ARG(Adapter)); ++ #endif ++ odm_AutoChannelSelectInit(podmpriv); ++ } else if (ACS_RESET == acs_op) { ++ /* Reset statistics for auto channel selection mechanism.*/ ++ #ifdef DBG_AUTO_CHNL_SEL_NHM ++ DBG_871X("[ACS-"ADPT_FMT"] HAL_ODM_AUTO_CHNL_SEL: ACS_RESET\n", ADPT_ARG(Adapter)); ++ #endif ++ odm_AutoChannelSelectReset(podmpriv); ++ ++ } else if (ACS_SELECT == acs_op) { ++ /* Collect NHM measurement result after current channel */ ++ #ifdef DBG_AUTO_CHNL_SEL_NHM ++ DBG_871X("[ACS-"ADPT_FMT"] HAL_ODM_AUTO_CHNL_SEL: ACS_SELECT, CH(%d)\n", ADPT_ARG(Adapter), rtw_get_acs_channel(Adapter)); ++ #endif ++ odm_AutoChannelSelect(podmpriv, rtw_get_acs_channel(Adapter)); ++ } else ++ DBG_871X("[ACS-"ADPT_FMT"] HAL_ODM_AUTO_CHNL_SEL: Unexpected OP\n", ADPT_ARG(Adapter)); ++ ++ } ++ break; ++#endif ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ case HAL_ODM_ANTDIV_SELECT: ++ { ++ u8 antenna = (*(u8 *)pValue1); ++ ++ /*switch antenna*/ ++ ODM_UpdateRxIdleAnt(&pHalData->odmpriv, antenna); ++ /*DBG_871X("==> HAL_ODM_ANTDIV_SELECT, Ant_(%s)\n", (antenna == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");*/ ++ ++ } ++ break; ++#endif ++ ++ default: ++ break; ++ } ++} ++ ++void GetHalODMVar( ++ PADAPTER Adapter, ++ HAL_ODM_VARIABLE eVariable, ++ PVOID pValue1, ++ PVOID pValue2) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T podmpriv = &pHalData->odmpriv; ++ ++ switch (eVariable) { ++#if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) ++ case HAL_ODM_NOISE_MONITOR: ++ { ++ u8 chan = *(u8 *)pValue1; ++ *(s16 *)pValue2 = pHalData->noise[chan]; ++ #ifdef DBG_NOISE_MONITOR ++ DBG_8192C("### Noise monitor chan(%d)-noise:%d (dBm) ###\n", ++ chan, pHalData->noise[chan]); ++ #endif ++ } ++ break; ++#endif/*#ifdef CONFIG_BACKGROUND_NOISE_MONITOR*/ ++ case HAL_ODM_DBG_FLAG: ++ *((u8Byte *)pValue1) = podmpriv->DebugComponents; ++ break; ++ case HAL_ODM_DBG_LEVEL: ++ *((u4Byte *)pValue1) = podmpriv->DebugLevel; ++ break; ++ ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ case HAL_ODM_AUTO_CHNL_SEL: ++ { ++ #ifdef DBG_AUTO_CHNL_SEL_NHM ++ DBG_871X("[ACS-"ADPT_FMT"] HAL_ODM_AUTO_CHNL_SEL: GET_BEST_CHAN\n", ADPT_ARG(Adapter)); ++ #endif ++ /* Retrieve better channel from NHM mechanism */ ++ if (IsSupported24G(Adapter->registrypriv.wireless_mode)) ++ *((u8 *)(pValue1)) = ODM_GetAutoChannelSelectResult(podmpriv, BAND_ON_2_4G); ++ if (IsSupported5G(Adapter->registrypriv.wireless_mode)) ++ *((u8 *)(pValue2)) = ODM_GetAutoChannelSelectResult(podmpriv, BAND_ON_5G); ++ } ++ break; ++#endif ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ case HAL_ODM_ANTDIV_SELECT: ++ { ++ pFAT_T pDM_FatTable = &podmpriv->DM_FatTable; ++ *((u8 *)pValue1) = pDM_FatTable->RxIdleAnt; ++ } ++ break; ++#endif ++ case HAL_ODM_INITIAL_GAIN: ++ { ++ pDIG_T pDM_DigTable = &podmpriv->DM_DigTable; ++ *((u8 *)pValue1) = pDM_DigTable->CurIGValue; ++ } ++ break; ++ default: ++ break; ++ } ++} ++ ++ ++u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); ++ PDM_ODM_T podmpriv = &pHalData->odmpriv; ++ u32 result = 0; ++ ++ switch (ops) { ++ case HAL_PHYDM_DIS_ALL_FUNC: ++ podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE; ++ break; ++ case HAL_PHYDM_FUNC_SET: ++ podmpriv->SupportAbility |= ability; ++ break; ++ case HAL_PHYDM_FUNC_CLR: ++ podmpriv->SupportAbility &= ~(ability); ++ break; ++ case HAL_PHYDM_ABILITY_BK: ++ /* dm flag backup*/ ++ podmpriv->BK_SupportAbility = podmpriv->SupportAbility; ++ break; ++ case HAL_PHYDM_ABILITY_RESTORE: ++ /* restore dm flag */ ++ podmpriv->SupportAbility = podmpriv->BK_SupportAbility; ++ break; ++ case HAL_PHYDM_ABILITY_SET: ++ podmpriv->SupportAbility = ability; ++ break; ++ case HAL_PHYDM_ABILITY_GET: ++ result = podmpriv->SupportAbility; ++ break; ++ } ++ return result; ++} ++ ++ ++BOOLEAN ++eqNByte( ++ u8* str1, ++ u8* str2, ++ u32 num ++ ) ++{ ++ if(num==0) ++ return _FALSE; ++ while(num>0) ++ { ++ num--; ++ if(str1[num]!=str2[num]) ++ return _FALSE; ++ } ++ return _TRUE; ++} ++ ++// ++// Description: ++// Translate a character to hex digit. ++// ++u32 ++MapCharToHexDigit( ++ IN char chTmp ++) ++{ ++ if(chTmp >= '0' && chTmp <= '9') ++ return (chTmp - '0'); ++ else if(chTmp >= 'a' && chTmp <= 'f') ++ return (10 + (chTmp - 'a')); ++ else if(chTmp >= 'A' && chTmp <= 'F') ++ return (10 + (chTmp - 'A')); ++ else ++ return 0; ++} ++ ++ ++ ++// ++// Description: ++// Parse hex number from the string pucStr. ++// ++BOOLEAN ++GetHexValueFromString( ++ IN char* szStr, ++ IN OUT u32* pu4bVal, ++ IN OUT u32* pu4bMove ++) ++{ ++ char* szScan = szStr; ++ ++ // Check input parameter. ++ if(szStr == NULL || pu4bVal == NULL || pu4bMove == NULL) ++ { ++ DBG_871X("GetHexValueFromString(): Invalid inpur argumetns! szStr: %p, pu4bVal: %p, pu4bMove: %p\n", szStr, pu4bVal, pu4bMove); ++ return _FALSE; ++ } ++ ++ // Initialize output. ++ *pu4bMove = 0; ++ *pu4bVal = 0; ++ ++ // Skip leading space. ++ while( *szScan != '\0' && ++ (*szScan == ' ' || *szScan == '\t') ) ++ { ++ szScan++; ++ (*pu4bMove)++; ++ } ++ ++ // Skip leading '0x' or '0X'. ++ if(*szScan == '0' && (*(szScan+1) == 'x' || *(szScan+1) == 'X')) ++ { ++ szScan += 2; ++ (*pu4bMove) += 2; ++ } ++ ++ // Check if szScan is now pointer to a character for hex digit, ++ // if not, it means this is not a valid hex number. ++ if(!IsHexDigit(*szScan)) ++ { ++ return _FALSE; ++ } ++ ++ // Parse each digit. ++ do ++ { ++ (*pu4bVal) <<= 4; ++ *pu4bVal += MapCharToHexDigit(*szScan); ++ ++ szScan++; ++ (*pu4bMove)++; ++ } while(IsHexDigit(*szScan)); ++ ++ return _TRUE; ++} ++ ++BOOLEAN ++GetFractionValueFromString( ++ IN char* szStr, ++ IN OUT u8* pInteger, ++ IN OUT u8* pFraction, ++ IN OUT u32* pu4bMove ++) ++{ ++ char *szScan = szStr; ++ ++ // Initialize output. ++ *pu4bMove = 0; ++ *pInteger = 0; ++ *pFraction = 0; ++ ++ // Skip leading space. ++ while ( *szScan != '\0' && (*szScan == ' ' || *szScan == '\t') ) { ++ ++szScan; ++ ++(*pu4bMove); ++ } ++ ++ // Parse each digit. ++ do { ++ (*pInteger) *= 10; ++ *pInteger += ( *szScan - '0' ); ++ ++ ++szScan; ++ ++(*pu4bMove); ++ ++ if ( *szScan == '.' ) ++ { ++ ++szScan; ++ ++(*pu4bMove); ++ ++ if ( *szScan < '0' || *szScan > '9' ) ++ return _FALSE; ++ else { ++ *pFraction = *szScan - '0'; ++ ++szScan; ++ ++(*pu4bMove); ++ return _TRUE; ++ } ++ } ++ } while(*szScan >= '0' && *szScan <= '9'); ++ ++ return _TRUE; ++} ++ ++// ++// Description: ++// Return TRUE if szStr is comment out with leading "//". ++// ++BOOLEAN ++IsCommentString( ++ IN char *szStr ++) ++{ ++ if(*szStr == '/' && *(szStr+1) == '/') ++ { ++ return _TRUE; ++ } ++ else ++ { ++ return _FALSE; ++ } ++} ++ ++BOOLEAN ++GetU1ByteIntegerFromStringInDecimal( ++ IN char* Str, ++ IN OUT u8* pInt ++ ) ++{ ++ u16 i = 0; ++ *pInt = 0; ++ ++ while ( Str[i] != '\0' ) ++ { ++ if ( Str[i] >= '0' && Str[i] <= '9' ) ++ { ++ *pInt *= 10; ++ *pInt += ( Str[i] - '0' ); ++ } ++ else ++ { ++ return _FALSE; ++ } ++ ++i; ++ } ++ ++ return _TRUE; ++} ++ ++// <20121004, Kordan> For example, ++// ParseQualifiedString(inString, 0, outString, '[', ']') gets "Kordan" from a string "Hello [Kordan]". ++// If RightQualifier does not exist, it will hang on in the while loop ++BOOLEAN ++ParseQualifiedString( ++ IN char* In, ++ IN OUT u32* Start, ++ OUT char* Out, ++ IN char LeftQualifier, ++ IN char RightQualifier ++ ) ++{ ++ u32 i = 0, j = 0; ++ char c = In[(*Start)++]; ++ ++ if (c != LeftQualifier) ++ return _FALSE; ++ ++ i = (*Start); ++ while ((c = In[(*Start)++]) != RightQualifier) ++ ; // find ']' ++ j = (*Start) - 2; ++ strncpy((char *)Out, (const char*)(In+i), j-i+1); ++ ++ return _TRUE; ++} ++ ++BOOLEAN ++isAllSpaceOrTab( ++ u8* data, ++ u8 size ++ ) ++{ ++ u8 cnt = 0, NumOfSpaceAndTab = 0; ++ ++ while( size > cnt ) ++ { ++ if ( data[cnt] == ' ' || data[cnt] == '\t' || data[cnt] == '\0' ) ++ ++NumOfSpaceAndTab; ++ ++ ++cnt; ++ } ++ ++ return size == NumOfSpaceAndTab; ++} ++ ++ ++void rtw_hal_check_rxfifo_full(_adapter *adapter) ++{ ++ struct dvobj_priv *psdpriv = adapter->dvobj; ++ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); ++ int save_cnt=_FALSE; ++ ++ //switch counter to RX fifo ++ if (IS_8188E(pHalData->VersionID) || IS_8188F(pHalData->VersionID) ++ || IS_8812_SERIES(pHalData->VersionID) || IS_8821_SERIES(pHalData->VersionID) ++ || IS_8723B_SERIES(pHalData->VersionID) || IS_8192E(pHalData->VersionID) || IS_8703B_SERIES(pHalData->VersionID)) ++ { ++ rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0); ++ save_cnt = _TRUE; ++ } ++ else ++ { ++ //todo: other chips ++ } ++ ++ ++ if (save_cnt) { ++ pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow; ++ pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT); ++ pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow; ++ } else { ++ /* special value to indicate no implementation */ ++ pdbgpriv->dbg_rx_fifo_last_overflow = 1; ++ pdbgpriv->dbg_rx_fifo_curr_overflow = 1; ++ pdbgpriv->dbg_rx_fifo_diff_overflow = 1; ++ } ++} ++ ++void linked_info_dump(_adapter *padapter,u8 benable) ++{ ++ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); ++ ++ if(padapter->bLinkInfoDump == benable) ++ return; ++ ++ DBG_871X("%s %s \n",__FUNCTION__,(benable)?"enable":"disable"); ++ ++ if(benable){ ++ #ifdef CONFIG_LPS ++ pwrctrlpriv->org_power_mgnt = pwrctrlpriv->power_mgnt;//keep org value ++ rtw_pm_set_lps(padapter,PS_MODE_ACTIVE); ++ #endif ++ ++ #ifdef CONFIG_IPS ++ pwrctrlpriv->ips_org_mode = pwrctrlpriv->ips_mode;//keep org value ++ rtw_pm_set_ips(padapter,IPS_NONE); ++ #endif ++ } ++ else{ ++ #ifdef CONFIG_IPS ++ rtw_pm_set_ips(padapter, pwrctrlpriv->ips_org_mode); ++ #endif // CONFIG_IPS ++ ++ #ifdef CONFIG_LPS ++ rtw_pm_set_lps(padapter, pwrctrlpriv->org_power_mgnt ); ++ #endif // CONFIG_LPS ++ } ++ padapter->bLinkInfoDump = benable ; ++} ++ ++#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA ++void rtw_get_raw_rssi_info(void *sel, _adapter *padapter) ++{ ++ u8 isCCKrate,rf_path; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; ++ ++ DBG_871X_SEL_NL(sel,"RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n", ++ HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all); ++ isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M)?TRUE :FALSE; ++ ++ if(isCCKrate) ++ psample_pkt_rssi->mimo_signal_strength[0] = psample_pkt_rssi->pwdball; ++ ++ for(rf_path = 0;rf_pathNumTotalRFPath;rf_path++) ++ { ++ DBG_871X_SEL_NL(sel, "RF_PATH_%d=>signal_strength:%d(%%),signal_quality:%d(%%)\n" ++ , rf_path, psample_pkt_rssi->mimo_signal_strength[rf_path], psample_pkt_rssi->mimo_signal_quality[rf_path]); ++ ++ if(!isCCKrate){ ++ DBG_871X_SEL_NL(sel,"\trx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n", ++ psample_pkt_rssi->ofdm_pwr[rf_path],psample_pkt_rssi->ofdm_snr[rf_path]); ++ } ++ } ++} ++ ++void rtw_dump_raw_rssi_info(_adapter *padapter, void *sel) ++{ ++ u8 isCCKrate,rf_path; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; ++ DBG_871X_SEL(sel, "============ RAW Rx Info dump ===================\n"); ++ DBG_871X_SEL(sel, "RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n", HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all); ++ ++ isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M)?TRUE :FALSE; ++ ++ if(isCCKrate) ++ psample_pkt_rssi->mimo_signal_strength[0] = psample_pkt_rssi->pwdball; ++ ++ for(rf_path = 0;rf_pathNumTotalRFPath;rf_path++) ++ { ++ DBG_871X_SEL(sel , "RF_PATH_%d=>signal_strength:%d(%%),signal_quality:%d(%%)" ++ , rf_path, psample_pkt_rssi->mimo_signal_strength[rf_path], psample_pkt_rssi->mimo_signal_quality[rf_path]); ++ ++ if (!isCCKrate) ++ DBG_871X_SEL(sel , ",rx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n", psample_pkt_rssi->ofdm_pwr[rf_path], psample_pkt_rssi->ofdm_snr[rf_path]); ++ else ++ DBG_871X_SEL(sel , "\n"); ++ ++ } ++} ++ ++void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe) ++{ ++ u8 isCCKrate,rf_path; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++ ++ PODM_PHY_INFO_T pPhyInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info); ++ struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; ++ ++ psample_pkt_rssi->data_rate = pattrib->data_rate; ++ isCCKrate = (pattrib->data_rate <= DESC_RATE11M)?TRUE :FALSE; ++ ++ psample_pkt_rssi->pwdball = pPhyInfo->RxPWDBAll; ++ psample_pkt_rssi->pwr_all = pPhyInfo->RecvSignalPower; ++ ++ for(rf_path = 0;rf_pathNumTotalRFPath;rf_path++) ++ { ++ psample_pkt_rssi->mimo_signal_strength[rf_path] = pPhyInfo->RxMIMOSignalStrength[rf_path]; ++ psample_pkt_rssi->mimo_signal_quality[rf_path] = pPhyInfo->RxMIMOSignalQuality[rf_path]; ++ if(!isCCKrate){ ++ psample_pkt_rssi->ofdm_pwr[rf_path] = pPhyInfo->RxPwr[rf_path]; ++ psample_pkt_rssi->ofdm_snr[rf_path] = pPhyInfo->RxSNR[rf_path]; ++ } ++ } ++} ++#endif ++ ++int check_phy_efuse_tx_power_info_valid(PADAPTER padapter) { ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ u8* pContent = pHalData->efuse_eeprom_data; ++ int index = 0; ++ u16 tx_index_offset = 0x0000; ++ ++ switch (rtw_get_chip_type(padapter)) { ++ case RTL8723B: ++ tx_index_offset = EEPROM_TX_PWR_INX_8723B; ++ break; ++ case RTL8703B: ++ tx_index_offset = EEPROM_TX_PWR_INX_8703B; ++ break; ++ case RTL8188E: ++ tx_index_offset = EEPROM_TX_PWR_INX_88E; ++ break; ++ case RTL8188F: ++ tx_index_offset = EEPROM_TX_PWR_INX_8188F; ++ break; ++ case RTL8192E: ++ tx_index_offset = EEPROM_TX_PWR_INX_8192E; ++ break; ++ case RTL8821: ++ tx_index_offset = EEPROM_TX_PWR_INX_8821; ++ break; ++ case RTL8812: ++ tx_index_offset = EEPROM_TX_PWR_INX_8812; ++ break; ++ case RTL8814A: ++ tx_index_offset = EEPROM_TX_PWR_INX_8814; ++ break; ++ default: ++ tx_index_offset = 0x0010; ++ break; ++ } ++ ++ /* TODO: chacking length by ICs */ ++ for (index = 0 ; index < 11 ; index++) { ++ if (pContent[tx_index_offset + index] == 0xFF) + return _FALSE; + } + return _TRUE; + } + +-// +-// Description: +-// Return TRUE if chTmp is represent for hex digit and +-// FALSE otherwise. +-// +-// +-BOOLEAN +-IsHexDigit( +- IN char chTmp +-) ++int hal_efuse_macaddr_offset(_adapter *adapter) + { +- if( (chTmp >= '0' && chTmp <= '9') || +- (chTmp >= 'a' && chTmp <= 'f') || +- (chTmp >= 'A' && chTmp <= 'F') ) +- { +- return _TRUE; ++ u8 interface_type = 0; ++ int addr_offset = -1; ++ ++ interface_type = rtw_get_intf_type(adapter); ++ ++ switch (rtw_get_chip_type(adapter)) { ++#ifdef CONFIG_RTL8723B ++ case RTL8723B: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8723BU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8723BS; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_8723BE; ++ break; ++#endif ++#ifdef CONFIG_RTL8703B ++ case RTL8703B: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8703BU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8703BS; ++ break; ++#endif ++#ifdef CONFIG_RTL8188E ++ case RTL8188E: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_88EU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_88ES; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_88EE; ++ break; ++#endif ++#ifdef CONFIG_RTL8188F ++ case RTL8188F: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8188FU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8188FS; ++ break; ++#endif ++#ifdef CONFIG_RTL8812A ++ case RTL8812: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8812AU; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_8812AE; ++ break; ++#endif ++#ifdef CONFIG_RTL8821A ++ case RTL8821: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8821AU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8821AS; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_8821AE; ++ break; ++#endif ++#ifdef CONFIG_RTL8192E ++ case RTL8192E: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8192EU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8192ES; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_8192EE; ++ break; ++#endif ++#ifdef CONFIG_RTL8814A ++ case RTL8814A: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8814AU; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_8814AE; ++ break; ++#endif + } +- else +- { +- return _FALSE; ++ ++ if (addr_offset == -1) { ++ DBG_871X_LEVEL(_drv_err_, "%s: unknown combination - chip_type:%u, interface:%u\n" ++ , __func__, rtw_get_chip_type(adapter), rtw_get_intf_type(adapter)); + } +-} + ++ return addr_offset; ++} + +-// +-// Description: +-// Translate a character to hex digit. +-// +-u32 +-MapCharToHexDigit( +- IN char chTmp +-) ++int Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8 *mac_addr) + { +- if(chTmp >= '0' && chTmp <= '9') +- return (chTmp - '0'); +- else if(chTmp >= 'a' && chTmp <= 'f') +- return (10 + (chTmp - 'a')); +- else if(chTmp >= 'A' && chTmp <= 'F') +- return (10 + (chTmp - 'A')); +- else +- return 0; ++ int ret = _FAIL; ++ int addr_offset; ++ ++ addr_offset = hal_efuse_macaddr_offset(padapter); ++ if (addr_offset == -1) ++ goto exit; ++ ++ ret = rtw_efuse_map_read(padapter, addr_offset, ETH_ALEN, mac_addr); ++ ++exit: ++ return ret; + } + ++#ifdef CONFIG_EFUSE_CONFIG_FILE ++u32 Hal_readPGDataFromConfigFile(PADAPTER padapter) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); ++ u32 ret; + ++ ret = rtw_read_efuse_from_file(EFUSE_MAP_PATH, hal_data->efuse_eeprom_data); ++ hal_data->efuse_file_status = ((ret == _FAIL) ? EFUSE_FILE_FAILED : EFUSE_FILE_LOADED); + +-// +-// Description: +-// Parse hex number from the string pucStr. +-// +-BOOLEAN +-GetHexValueFromString( +- IN char* szStr, +- IN OUT u32* pu4bVal, +- IN OUT u32* pu4bMove +-) ++ return ret; ++} ++ ++u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr) + { +- char* szScan = szStr; ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); ++ u32 ret = _FAIL; + +- // Check input parameter. +- if(szStr == NULL || pu4bVal == NULL || pu4bMove == NULL) +- { +- DBG_871X("GetHexValueFromString(): Invalid inpur argumetns! szStr: %p, pu4bVal: %p, pu4bMove: %p\n", szStr, pu4bVal, pu4bMove); +- return _FALSE; ++ if (rtw_read_macaddr_from_file(WIFIMAC_PATH, mac_addr) == _SUCCESS ++ && rtw_check_invalid_mac_address(mac_addr, _TRUE) == _FALSE ++ ) { ++ hal_data->macaddr_file_status = MACADDR_FILE_LOADED; ++ ret = _SUCCESS; ++ } else { ++ hal_data->macaddr_file_status = MACADDR_FILE_FAILED; + } + +- // Initialize output. +- *pu4bMove = 0; +- *pu4bVal = 0; ++ return ret; ++} ++#endif /* CONFIG_EFUSE_CONFIG_FILE */ + +- // Skip leading space. +- while( *szScan != '\0' && +- (*szScan == ' ' || *szScan == '\t') ) +- { +- szScan++; +- (*pu4bMove)++; +- } ++int hal_config_macaddr(_adapter *adapter, bool autoload_fail) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ u8 addr[ETH_ALEN]; ++ int addr_offset = hal_efuse_macaddr_offset(adapter); ++ u8 *hw_addr = NULL; ++ int ret = _SUCCESS; + +- // Skip leading '0x' or '0X'. +- if(*szScan == '0' && (*(szScan+1) == 'x' || *(szScan+1) == 'X')) +- { +- szScan += 2; +- (*pu4bMove) += 2; +- } ++ if (autoload_fail) ++ goto bypass_hw_pg; + +- // Check if szScan is now pointer to a character for hex digit, +- // if not, it means this is not a valid hex number. +- if(!IsHexDigit(*szScan)) +- { +- return _FALSE; ++ if (addr_offset != -1) ++ hw_addr = &hal_data->efuse_eeprom_data[addr_offset]; ++ ++#ifdef CONFIG_EFUSE_CONFIG_FILE ++ /* if the hw_addr is written by efuse file, set to NULL */ ++ if (hal_data->efuse_file_status == EFUSE_FILE_LOADED) ++ hw_addr = NULL; ++#endif ++ ++ if (!hw_addr) { ++ /* try getting hw pg data */ ++ if (Hal_GetPhyEfuseMACAddr(adapter, addr) == _SUCCESS) ++ hw_addr = addr; + } + +- // Parse each digit. +- do +- { +- (*pu4bVal) <<= 4; +- *pu4bVal += MapCharToHexDigit(*szScan); ++ /* check hw pg data */ ++ if (hw_addr && rtw_check_invalid_mac_address(hw_addr, _TRUE) == _FALSE) { ++ _rtw_memcpy(hal_data->EEPROMMACAddr, hw_addr, ETH_ALEN); ++ goto exit; ++ } ++ ++bypass_hw_pg: + +- szScan++; +- (*pu4bMove)++; +- } while(IsHexDigit(*szScan)); ++#ifdef CONFIG_EFUSE_CONFIG_FILE ++ /* check wifi mac file */ ++ if (Hal_ReadMACAddrFromFile(adapter, addr) == _SUCCESS) { ++ _rtw_memcpy(hal_data->EEPROMMACAddr, addr, ETH_ALEN); ++ goto exit; ++ } ++#endif + +- return _TRUE; ++ _rtw_memset(hal_data->EEPROMMACAddr, 0, ETH_ALEN); ++ ret = _FAIL; ++ ++exit: ++ return ret; + } + +-BOOLEAN +-GetFractionValueFromString( +- IN char* szStr, +- IN OUT u8* pInteger, +- IN OUT u8* pFraction, +- IN OUT u32* pu4bMove +-) +-{ +- char *szScan = szStr; ++#ifdef CONFIG_RF_GAIN_OFFSET ++u32 Array_kfreemap[] = { ++0x08,0xe, ++0x06,0xc, ++0x04,0xa, ++0x02,0x8, ++0x00,0x6, ++0x03,0x4, ++0x05,0x2, ++0x07,0x0, ++0x09,0x0, ++0x0c,0x0, ++}; + +- // Initialize output. +- *pu4bMove = 0; +- *pInteger = 0; +- *pFraction = 0; ++void rtw_bb_rf_gain_offset(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct registry_priv *registry_par = &padapter->registrypriv; ++ struct kfree_data_t *kfree_data = &pHalData->kfree_data; ++ u8 value = pHalData->EEPROMRFGainOffset; ++ u8 tmp = 0x3e; ++ u32 res, i = 0; ++ u4Byte ArrayLen = sizeof(Array_kfreemap)/sizeof(u32); ++ pu4Byte Array = Array_kfreemap; ++ u4Byte v1 = 0, v2 = 0, GainValue = 0, target = 0; + +- // Skip leading space. +- while ( *szScan != '\0' && (*szScan == ' ' || *szScan == '\t') ) { +- ++szScan; +- ++(*pu4bMove); ++ if (registry_par->RegRfKFreeEnable == 2) { ++ DBG_871X("Registry kfree default force disable.\n"); ++ return; + } + +- // Parse each digit. +- do { +- (*pInteger) *= 10; +- *pInteger += ( *szScan - '0' ); ++#if defined(CONFIG_RTL8723B) ++ if (value & BIT4 || (registry_par->RegRfKFreeEnable == 1)) { ++ DBG_871X("Offset RF Gain.\n"); ++ DBG_871X("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x\n",pHalData->EEPROMRFGainVal); ++ ++ if(pHalData->EEPROMRFGainVal != 0xff){ + +- ++szScan; +- ++(*pu4bMove); ++ if(pHalData->ant_path == ODM_RF_PATH_A) { ++ GainValue=(pHalData->EEPROMRFGainVal & 0x0f); ++ ++ } else { ++ GainValue=(pHalData->EEPROMRFGainVal & 0xf0)>>4; ++ } ++ DBG_871X("Ant PATH_%d GainValue Offset = 0x%x\n",(pHalData->ant_path == ODM_RF_PATH_A) ? (ODM_RF_PATH_A) : (ODM_RF_PATH_B),GainValue); ++ ++ for (i = 0; i < ArrayLen; i += 2 ) ++ { ++ //DBG_871X("ArrayLen in =%d ,Array 1 =0x%x ,Array2 =0x%x \n",i,Array[i],Array[i]+1); ++ v1 = Array[i]; ++ v2 = Array[i+1]; ++ if ( v1 == GainValue ) { ++ DBG_871X("Offset RF Gain. got v1 =0x%x ,v2 =0x%x \n",v1,v2); ++ target=v2; ++ break; ++ } ++ } ++ DBG_871X("pHalData->EEPROMRFGainVal=0x%x ,Gain offset Target Value=0x%x\n",pHalData->EEPROMRFGainVal,target); + +- if ( *szScan == '.' ) +- { +- ++szScan; +- ++(*pu4bMove); ++ res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); ++ DBG_871X("Offset RF Gain. before reg 0x7f=0x%08x\n",res); ++ PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target); ++ res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); ++ ++ DBG_871X("Offset RF Gain. After reg 0x7f=0x%08x\n",res); + +- if ( *szScan < '0' || *szScan > '9' ) +- return _FALSE; +- else { +- *pFraction = *szScan - '0'; +- ++szScan; +- ++(*pu4bMove); +- return _TRUE; +- } ++ }else { ++ ++ DBG_871X("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n",pHalData->EEPROMRFGainVal); + } +- } while(*szScan >= '0' && *szScan <= '9'); ++ } else { ++ DBG_871X("Using the default RF gain.\n"); ++ } ++ ++#elif defined(CONFIG_RTL8188E) ++ if (value & BIT4 || (registry_par->RegRfKFreeEnable == 1)) { ++ DBG_871X("8188ES Offset RF Gain.\n"); ++ DBG_871X("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n", ++ pHalData->EEPROMRFGainVal); ++ ++ if (pHalData->EEPROMRFGainVal != 0xff) { ++ res = rtw_hal_read_rfreg(padapter, RF_PATH_A, ++ REG_RF_BB_GAIN_OFFSET, 0xffffffff); ++ ++ DBG_871X("Offset RF Gain. reg 0x55=0x%x\n",res); ++ res &= 0xfff87fff; ++ ++ res |= (pHalData->EEPROMRFGainVal & 0x0f) << 15; ++ DBG_871X("Offset RF Gain. res=0x%x\n",res); ++ ++ rtw_hal_write_rfreg(padapter, RF_PATH_A, ++ REG_RF_BB_GAIN_OFFSET, ++ RF_GAIN_OFFSET_MASK, res); ++ } else { ++ DBG_871X("Offset RF Gain. EEPROMRFGainVal=0x%x == 0xff, didn't run Kfree\n", ++ pHalData->EEPROMRFGainVal); ++ } ++ } else { ++ DBG_871X("Using the default RF gain.\n"); ++ } ++#else ++ /* TODO: call this when channel switch */ ++ if (kfree_data->flag & KFREE_FLAG_ON) ++ rtw_rf_apply_tx_gain_offset(padapter, 6); /* input ch6 to select BB_GAIN_2G */ ++#endif ++ ++} ++#endif //CONFIG_RF_GAIN_OFFSET ++ ++bool kfree_data_is_bb_gain_empty(struct kfree_data_t *data) ++{ ++#ifdef CONFIG_RF_GAIN_OFFSET ++ int i, j; + +- return _TRUE; ++ for (i = 0; i < BB_GAIN_NUM; i++) ++ for (j = 0; j < RF_PATH_MAX; j++) ++ if (data->bb_gain[i][j] != 0) ++ return 0; ++#endif ++ return 1; + } + +-// +-// Description: +-// Return TRUE if szStr is comment out with leading "//". +-// +-BOOLEAN +-IsCommentString( +- IN char *szStr +-) ++#ifdef CONFIG_USB_RX_AGGREGATION ++void rtw_set_usb_agg_by_mode_normal(_adapter *padapter, u8 cur_wireless_mode) + { +- if(*szStr == '/' && *(szStr+1) == '/') ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ if(cur_wireless_mode < WIRELESS_11_24N ++ && cur_wireless_mode > 0) //ABG mode + { +- return _TRUE; ++#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER ++ u32 remainder = 0; ++ u8 quotient = 0; ++ ++ remainder = MAX_RECVBUF_SZ % (4*1024); ++ quotient = (u8)(MAX_RECVBUF_SZ >> 12); ++ ++ if (quotient > 5) { ++ pHalData->RegAcUsbDmaSize = 0x6; ++ pHalData->RegAcUsbDmaTime = 0x10; ++ } else { ++ if (remainder >= 2048) { ++ pHalData->RegAcUsbDmaSize = quotient; ++ pHalData->RegAcUsbDmaTime = 0x10; ++ } else { ++ pHalData->RegAcUsbDmaSize = (quotient-1); ++ pHalData->RegAcUsbDmaTime = 0x10; ++ } ++ } ++#else /* !CONFIG_PREALLOC_RX_SKB_BUFFER */ ++ if(0x6 != pHalData->RegAcUsbDmaSize || 0x10 !=pHalData->RegAcUsbDmaTime) ++ { ++ pHalData->RegAcUsbDmaSize = 0x6; ++ pHalData->RegAcUsbDmaTime = 0x10; ++ rtw_write16(padapter, REG_RXDMA_AGG_PG_TH, ++ pHalData->RegAcUsbDmaSize | (pHalData->RegAcUsbDmaTime<<8)); ++ } ++#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ ++ ++ } ++ else if(cur_wireless_mode >= WIRELESS_11_24N ++ && cur_wireless_mode <= WIRELESS_MODE_MAX)//N AC mode ++ { ++#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER ++ u32 remainder = 0; ++ u8 quotient = 0; ++ ++ remainder = MAX_RECVBUF_SZ % (4*1024); ++ quotient = (u8)(MAX_RECVBUF_SZ >> 12); ++ ++ if (quotient > 5) { ++ pHalData->RegAcUsbDmaSize = 0x5; ++ pHalData->RegAcUsbDmaTime = 0x20; ++ } else { ++ if (remainder >= 2048) { ++ pHalData->RegAcUsbDmaSize = quotient; ++ pHalData->RegAcUsbDmaTime = 0x10; ++ } else { ++ pHalData->RegAcUsbDmaSize = (quotient-1); ++ pHalData->RegAcUsbDmaTime = 0x10; ++ } ++ } ++#else /* !CONFIG_PREALLOC_RX_SKB_BUFFER */ ++ if(0x5 != pHalData->RegAcUsbDmaSize || 0x20 !=pHalData->RegAcUsbDmaTime) ++ { ++ pHalData->RegAcUsbDmaSize = 0x5; ++ pHalData->RegAcUsbDmaTime = 0x20; ++ rtw_write16(padapter, REG_RXDMA_AGG_PG_TH, ++ pHalData->RegAcUsbDmaSize | (pHalData->RegAcUsbDmaTime<<8)); ++ } ++#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ ++ + } + else + { +- return _FALSE; ++ /* DBG_871X("%s: Unknow wireless mode(0x%x)\n",__func__,padapter->mlmeextpriv.cur_wireless_mode); */ + } + } + +-BOOLEAN +-GetU1ByteIntegerFromStringInDecimal( +- IN char* Str, +- IN OUT u8* pInt +- ) ++void rtw_set_usb_agg_by_mode_customer(_adapter *padapter, u8 cur_wireless_mode, u8 UsbDmaSize, u8 Legacy_UsbDmaSize) + { +- u16 i = 0; +- *pInt = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + +- while ( Str[i] != '\0' ) +- { +- if ( Str[i] >= '0' && Str[i] <= '9' ) +- { +- *pInt *= 10; +- *pInt += ( Str[i] - '0' ); ++ if (cur_wireless_mode < WIRELESS_11_24N ++ && cur_wireless_mode > 0) { /* ABG mode */ ++ if (Legacy_UsbDmaSize != pHalData->RegAcUsbDmaSize ++ || 0x10 != pHalData->RegAcUsbDmaTime) { ++ pHalData->RegAcUsbDmaSize = Legacy_UsbDmaSize; ++ pHalData->RegAcUsbDmaTime = 0x10; ++ rtw_write16(padapter, REG_RXDMA_AGG_PG_TH, ++ pHalData->RegAcUsbDmaSize | (pHalData->RegAcUsbDmaTime<<8)); + } +- else +- { +- return _FALSE; ++ } else if (cur_wireless_mode >= WIRELESS_11_24N ++ && cur_wireless_mode <= WIRELESS_MODE_MAX) { /* N AC mode */ ++ if (UsbDmaSize != pHalData->RegAcUsbDmaSize ++ || 0x20 != pHalData->RegAcUsbDmaTime) { ++ pHalData->RegAcUsbDmaSize = UsbDmaSize; ++ pHalData->RegAcUsbDmaTime = 0x20; ++ rtw_write16(padapter, REG_RXDMA_AGG_PG_TH, ++ pHalData->RegAcUsbDmaSize | (pHalData->RegAcUsbDmaTime<<8)); + } +- ++i; ++ } else { ++ /* DBG_871X("%s: Unknown wireless mode(0x%x)\n",__func__,padapter->mlmeextpriv.cur_wireless_mode); */ + } +- +- return _TRUE; + } + +-// <20121004, Kordan> For example, +-// ParseQualifiedString(inString, 0, outString, '[', ']') gets "Kordan" from a string "Hello [Kordan]". +-// If RightQualifier does not exist, it will hang on in the while loop +-BOOLEAN +-ParseQualifiedString( +- IN char* In, +- IN OUT u32* Start, +- OUT char* Out, +- IN char LeftQualifier, +- IN char RightQualifier +- ) ++void rtw_set_usb_agg_by_mode(_adapter *padapter, u8 cur_wireless_mode) + { +- u32 i = 0, j = 0; +- char c = In[(*Start)++]; +- +- if (c != LeftQualifier) +- return _FALSE; +- +- i = (*Start); +- while ((c = In[(*Start)++]) != RightQualifier) +- ; // find ']' +- j = (*Start) - 2; +- strncpy((char *)Out, (const char*)(In+i), j-i+1); ++#ifdef CONFIG_PLATFORM_NOVATEK_NT72668 ++ rtw_set_usb_agg_by_mode_customer(padapter, cur_wireless_mode, 0x3, 0x3); ++ return; ++#endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */ + +- return _TRUE; ++ rtw_set_usb_agg_by_mode_normal(padapter, cur_wireless_mode); + } ++#endif //CONFIG_USB_RX_AGGREGATION + +-BOOLEAN +-isAllSpaceOrTab( +- u8* data, +- u8 size +- ) ++//To avoid RX affect TX throughput ++void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer) + { +- u8 cnt = 0, NumOfSpaceAndTab = 0; ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeextpriv = &(padapter->mlmeextpriv); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 cur_wireless_mode = pmlmeextpriv->cur_wireless_mode; ++#ifdef CONFIG_CONCURRENT_MODE ++ struct mlme_ext_priv *pbuddymlmeextpriv = &(padapter->pbuddy_adapter->mlmeextpriv); ++#endif //CONFIG_CONCURRENT_MODE + +- while( size > cnt ) ++#ifdef CONFIG_USB_RX_AGGREGATION ++ if(IS_HARDWARE_TYPE_8821U(padapter) )//|| IS_HARDWARE_TYPE_8192EU(padapter)) + { +- if ( data[cnt] == ' ' || data[cnt] == '\t' || data[cnt] == '\0' ) +- ++NumOfSpaceAndTab; +- +- ++cnt; ++ //This AGG_PH_TH only for UsbRxAggMode == USB_RX_AGG_USB ++ if((pHalData->UsbRxAggMode == USB_RX_AGG_USB) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ { ++ if(pdvobjpriv->traffic_stat.cur_tx_tp > 2 && pdvobjpriv->traffic_stat.cur_rx_tp < 30) ++ rtw_write16(padapter , REG_RXDMA_AGG_PG_TH , 0x1010); ++ else if (pdvobjpriv->traffic_stat.last_tx_bytes > 220000 && pdvobjpriv->traffic_stat.cur_rx_tp < 30) ++ rtw_write16(padapter , REG_RXDMA_AGG_PG_TH , 0x1006); ++ else ++ rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,0x2005); //dmc agg th 20K ++ ++ //DBG_871X("TX_TP=%u, RX_TP=%u \n", pdvobjpriv->traffic_stat.cur_tx_tp, pdvobjpriv->traffic_stat.cur_rx_tp); ++ } + } ++ else if(IS_HARDWARE_TYPE_8812(padapter)) ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_linked_check(padapter) == _TRUE && rtw_linked_check(padapter->pbuddy_adapter) == _TRUE) ++ { ++ if(pbuddymlmeextpriv->cur_wireless_mode >= pmlmeextpriv->cur_wireless_mode) ++ cur_wireless_mode = pbuddymlmeextpriv->cur_wireless_mode; ++ else ++ cur_wireless_mode = pmlmeextpriv->cur_wireless_mode; + +- return size == NumOfSpaceAndTab; ++ rtw_set_usb_agg_by_mode(padapter,cur_wireless_mode); ++ } ++ else if (rtw_linked_check(padapter) == _TRUE && rtw_linked_check(padapter->pbuddy_adapter) == _FALSE) ++ { ++ rtw_set_usb_agg_by_mode(padapter,cur_wireless_mode); ++ } ++#else //!CONFIG_CONCURRENT_MODE ++ rtw_set_usb_agg_by_mode(padapter,cur_wireless_mode); ++#endif //CONFIG_CONCURRENT_MODE ++#ifdef CONFIG_PLATFORM_NOVATEK_NT72668 ++ } else { ++ rtw_set_usb_agg_by_mode(padapter, cur_wireless_mode); ++#endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */ ++ } ++#endif + } + +- +-void rtw_hal_check_rxfifo_full(_adapter *adapter) ++//bus-agg check for SoftAP mode ++inline u8 rtw_hal_busagg_qsel_check(_adapter *padapter,u8 pre_qsel,u8 next_qsel) + { +- struct dvobj_priv *psdpriv = adapter->dvobj; +- struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); +- int save_cnt=_FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 chk_rst = _SUCCESS; + +- //switch counter to RX fifo +- if(IS_81XXC(pHalData->VersionID) || IS_92D(pHalData->VersionID) +- || IS_8188E(pHalData->VersionID) || IS_8723_SERIES(pHalData->VersionID) +- || IS_8812_SERIES(pHalData->VersionID) || IS_8821_SERIES(pHalData->VersionID) +- || IS_8723B_SERIES(pHalData->VersionID) || IS_8192E(pHalData->VersionID)) +- { +- rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0); +- save_cnt = _TRUE; +- } +- else +- { +- //todo: other chips +- } ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return chk_rst; ++ ++ //if((pre_qsel == 0xFF)||(next_qsel== 0xFF)) ++ // return chk_rst; + +- +- if(save_cnt) +- { +- //rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0); +- pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow; +- pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT); +- pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow; +- } ++ if( ((pre_qsel == QSLT_HIGH)||((next_qsel== QSLT_HIGH))) ++ && (pre_qsel != next_qsel )){ ++ //DBG_871X("### bus-agg break cause of qsel misatch, pre_qsel=0x%02x,next_qsel=0x%02x ###\n", ++ // pre_qsel,next_qsel); ++ chk_rst = _FAIL; ++ } ++ return chk_rst; + } + +-void linked_info_dump(_adapter *padapter,u8 benable) +-{ +- struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); ++/* ++ * Description: ++ * dump_TX_FIFO: This is only used to dump TX_FIFO for debug WoW mode offload ++ * contant. ++ * ++ * Input: ++ * adapter: adapter pointer. ++ * page_num: The max. page number that user want to dump. ++ * page_size: page size of each page. eg. 128 bytes, 256 bytes, 512byte. ++ */ ++void dump_TX_FIFO(_adapter* padapter, u8 page_num, u16 page_size){ + +- if(padapter->bLinkInfoDump == benable) ++ int i; ++ u8 val = 0; ++ u8 base = 0; ++ u32 addr = 0; ++ u32 count = (page_size / 8); ++ ++ if (page_num <= 0) { ++ DBG_871X("!!%s: incorrect input page_num paramter!\n", __func__); + return; +- +- DBG_871X("%s %s \n",__FUNCTION__,(benable)?"enable":"disable"); +- +- if(benable){ +- #ifdef CONFIG_LPS +- pwrctrlpriv->org_power_mgnt = pwrctrlpriv->power_mgnt;//keep org value +- rtw_pm_set_lps(padapter,PS_MODE_ACTIVE); +- #endif +- +- #ifdef CONFIG_IPS +- pwrctrlpriv->ips_org_mode = pwrctrlpriv->ips_mode;//keep org value +- rtw_pm_set_ips(padapter,IPS_NONE); +- #endif + } +- else{ +- #ifdef CONFIG_IPS +- rtw_pm_set_ips(padapter, pwrctrlpriv->ips_org_mode); +- #endif // CONFIG_IPS + +- #ifdef CONFIG_LPS +- rtw_pm_set_lps(padapter, pwrctrlpriv->org_power_mgnt ); +- #endif // CONFIG_LPS ++ if (page_size < 128 || page_size > 512) { ++ DBG_871X("!!%s: incorrect input page_size paramter!\n", __func__); ++ return; + } +- padapter->bLinkInfoDump = benable ; +-} + +-#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA +-void rtw_get_raw_rssi_info(void *sel, _adapter *padapter) +-{ +- u8 isCCKrate,rf_path; +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +- struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; +- +- DBG_871X_SEL_NL(sel,"RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n", +- HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all); +- isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M)?TRUE :FALSE; ++ DBG_871X("+%s+\n", __func__); ++ val = rtw_read8(padapter, 0x106); ++ rtw_write8(padapter, 0x106, 0x69); ++ DBG_871X("0x106: 0x%02x\n", val); ++ base = rtw_read8(padapter, 0x209); ++ DBG_871X("0x209: 0x%02x\n", base); + +- if(isCCKrate) +- psample_pkt_rssi->mimo_singal_strength[0] = psample_pkt_rssi->pwdball; +- +- for(rf_path = 0;rf_pathNumTotalRFPath;rf_path++) +- { +- DBG_871X_SEL_NL(sel,"RF_PATH_%d=>singal_strength:%d(%%),singal_quality:%d(%%)\n" +- ,rf_path,psample_pkt_rssi->mimo_singal_strength[rf_path],psample_pkt_rssi->mimo_singal_quality[rf_path]); +- +- if(!isCCKrate){ +- DBG_871X_SEL_NL(sel,"\trx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n", +- psample_pkt_rssi->ofdm_pwr[rf_path],psample_pkt_rssi->ofdm_snr[rf_path]); +- } +- } ++ addr = ((base) * page_size)/8; ++ for (i = 0 ; i < page_num * count ; i+=2) { ++ rtw_write32(padapter, 0x140, addr + i); ++ printk(" %08x %08x ", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148)); ++ rtw_write32(padapter, 0x140, addr + i + 1); ++ printk(" %08x %08x \n", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148)); ++ } + } + +-void rtw_dump_raw_rssi_info(_adapter *padapter) ++#ifdef CONFIG_GPIO_API ++u8 rtw_hal_get_gpio(_adapter* adapter, u8 gpio_num) + { +- u8 isCCKrate,rf_path; +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +- struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; +- DBG_871X("============ RAW Rx Info dump ===================\n"); +- DBG_871X("RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n", +- HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all); ++ u8 value = 0; ++ u8 direction = 0; ++ u32 gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL + 2; ++ u8 gpio_num_to_set = gpio_num; ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); + +- isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M)?TRUE :FALSE; ++ if (rtw_hal_gpio_func_check(adapter, gpio_num) == _FAIL) ++ return value; ++ ++ rtw_ps_deny(adapter, PS_DENY_IOCTL); ++ ++ DBG_871X("rf_pwrstate=0x%02x\n", pwrpriv->rf_pwrstate); ++ LeaveAllPowerSaveModeDirect(adapter); ++ ++ if (gpio_num > 7) { ++ gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL_2 + 2; ++ gpio_num_to_set = gpio_num - 8; ++ } ++ ++ /* Read GPIO Direction */ ++ direction = (rtw_read8(adapter, gpio_ctrl_reg_to_set) & BIT(gpio_num_to_set)) >> gpio_num; ++ ++ /* According the direction to read register value */ ++ if( direction ) ++ value = (rtw_read8(adapter, gpio_ctrl_reg_to_set)& BIT(gpio_num_to_set)) >> gpio_num; ++ else ++ value = (rtw_read8(adapter, gpio_ctrl_reg_to_set)& BIT(gpio_num_to_set)) >> gpio_num; ++ ++ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); ++ DBG_871X("%s direction=%d value=%d\n",__FUNCTION__,direction,value); + +- if(isCCKrate) +- psample_pkt_rssi->mimo_singal_strength[0] = psample_pkt_rssi->pwdball; +- +- for(rf_path = 0;rf_pathNumTotalRFPath;rf_path++) +- { +- DBG_871X("RF_PATH_%d=>singal_strength:%d(%%),singal_quality:%d(%%)" +- ,rf_path,psample_pkt_rssi->mimo_singal_strength[rf_path],psample_pkt_rssi->mimo_singal_quality[rf_path]); +- +- if(!isCCKrate){ +- printk(",rx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n", +- psample_pkt_rssi->ofdm_pwr[rf_path],psample_pkt_rssi->ofdm_snr[rf_path]); +- }else{ +- printk("\n"); +- } +- } ++ return value; + } + +-void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe) ++int rtw_hal_set_gpio_output_value(_adapter* adapter, u8 gpio_num, bool isHigh) + { +- u8 isCCKrate,rf_path; +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +- struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++ u8 direction = 0; ++ u8 res = -1; ++ u32 gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL + 2; ++ u8 gpio_num_to_set = gpio_num; + +- PODM_PHY_INFO_T pPhyInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info); +- struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; ++ if (rtw_hal_gpio_func_check(adapter, gpio_num) == _FAIL) ++ return -1; + +- psample_pkt_rssi->data_rate = pattrib->data_rate; +- isCCKrate = (pattrib->data_rate <= DESC_RATE11M)?TRUE :FALSE; +- +- psample_pkt_rssi->pwdball = pPhyInfo->RxPWDBAll; +- psample_pkt_rssi->pwr_all = pPhyInfo->RecvSignalPower; ++ rtw_ps_deny(adapter, PS_DENY_IOCTL); + +- for(rf_path = 0;rf_pathNumTotalRFPath;rf_path++) +- { +- psample_pkt_rssi->mimo_singal_strength[rf_path] = pPhyInfo->RxMIMOSignalStrength[rf_path]; +- psample_pkt_rssi->mimo_singal_quality[rf_path] = pPhyInfo->RxMIMOSignalQuality[rf_path]; +- if(!isCCKrate){ +- psample_pkt_rssi->ofdm_pwr[rf_path] = pPhyInfo->RxPwr[rf_path]; +- psample_pkt_rssi->ofdm_snr[rf_path] = pPhyInfo->RxSNR[rf_path]; +- } ++ LeaveAllPowerSaveModeDirect(adapter); ++ ++ if (gpio_num > 7) { ++ gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL_2 + 2; ++ gpio_num_to_set = gpio_num - 8; + } +-} +-#endif + +-#ifdef CONFIG_EFUSE_CONFIG_FILE +-int check_phy_efuse_tx_power_info_valid(PADAPTER padapter) { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- u8* pContent = pEEPROM->efuse_eeprom_data; +- int index = 0; +- u16 tx_index_offset = 0x0000; ++ /* Read GPIO direction */ ++ direction = (rtw_read8(adapter,REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num; + +- switch(padapter->chip_type) { +- case RTL8723B: +- tx_index_offset = EEPROM_TX_PWR_INX_8723B; +- break; +- case RTL8188E: +- tx_index_offset = EEPROM_TX_PWR_INX_88E; +- break; +- case RTL8192E: +- tx_index_offset = EEPROM_TX_PWR_INX_8192E; +- break; +- default: +- tx_index_offset = 0x0010; +- break; +- } +- for (index = 0 ; index < 12 ; index++) { +- if (pContent[tx_index_offset + index] == 0xFF) { +- return _FALSE; +- } else { +- DBG_871X("0x%02x ,", pContent[EEPROM_TX_PWR_INX_88E+index]); +- } ++ /* If GPIO is output direction, setting value. */ ++ if( direction ) { ++ if(isHigh) ++ rtw_write8(adapter, gpio_ctrl_reg_to_set, rtw_read8(adapter, gpio_ctrl_reg_to_set) | BIT(gpio_num_to_set)); ++ else ++ rtw_write8(adapter, gpio_ctrl_reg_to_set, rtw_read8(adapter, gpio_ctrl_reg_to_set) & ~BIT(gpio_num_to_set)); ++ ++ DBG_871X("%s Set gpio %x[%d]=%d\n",__FUNCTION__,REG_GPIO_PIN_CTRL+1,gpio_num,isHigh ); ++ res = 0; ++ } else { ++ DBG_871X("%s The gpio is input,not be set!\n",__FUNCTION__); ++ res = -1; + } +- DBG_871X("\n"); +- return _TRUE; ++ ++ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); ++ return res; + } + +-int check_phy_efuse_macaddr_info_valid(PADAPTER padapter) { ++int rtw_hal_config_gpio(_adapter* adapter, u8 gpio_num, bool isOutput) ++{ ++ u32 gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL + 2; ++ u8 gpio_num_to_set = gpio_num; + +- u8 val = 0; +- u16 addr_offset = 0x0000; ++ if (rtw_hal_gpio_func_check(adapter, gpio_num) == _FAIL) ++ return -1; + +- switch(padapter->chip_type) { +- case RTL8723B: +- if (padapter->interface_type == RTW_USB) { +- addr_offset = EEPROM_MAC_ADDR_8723BU; +- DBG_871X("%s: interface is USB\n", __func__); +- } else if (padapter->interface_type == RTW_SDIO) { +- addr_offset = EEPROM_MAC_ADDR_8723BS; +- DBG_871X("%s: interface is SDIO\n", __func__); +- } else if (padapter->interface_type == RTW_PCIE) { +- addr_offset = EEPROM_MAC_ADDR_8723BE; +- DBG_871X("%s: interface is PCIE\n", __func__); +- } else if (padapter->interface_type == RTW_GSPI) { +- //addr_offset = EEPROM_MAC_ADDR_8723BS; +- DBG_871X("%s: interface is GSPI\n", __func__); +- } +- break; +- case RTL8188E: +- if (padapter->interface_type == RTW_USB) { +- addr_offset = EEPROM_MAC_ADDR_88EU; +- DBG_871X("%s: interface is USB\n", __func__); +- } else if (padapter->interface_type == RTW_SDIO) { +- addr_offset = EEPROM_MAC_ADDR_88ES; +- DBG_871X("%s: interface is SDIO\n", __func__); +- } else if (padapter->interface_type == RTW_PCIE) { +- addr_offset = EEPROM_MAC_ADDR_88EE; +- DBG_871X("%s: interface is PCIE\n", __func__); +- } else if (padapter->interface_type == RTW_GSPI) { +- //addr_offset = EEPROM_MAC_ADDR_8723BS; +- DBG_871X("%s: interface is GSPI\n", __func__); +- } +- break; +- } ++ DBG_871X("%s gpio_num =%d direction=%d\n",__FUNCTION__,gpio_num,isOutput); + +- if (addr_offset == 0x0000) { +- DBG_871X("phy efuse MAC addr offset is 0!!\n"); +- return _FALSE; +- } else { +- rtw_efuse_map_read(padapter, addr_offset, 1, &val); +- } ++ rtw_ps_deny(adapter, PS_DENY_IOCTL); + +- if (val == 0xFF) { +- return _FALSE; +- } else { +- DBG_871X("phy efuse with valid MAC addr\n"); +- return _TRUE; ++ LeaveAllPowerSaveModeDirect(adapter); ++ ++ rtw_hal_gpio_multi_func_reset(adapter, gpio_num); ++ ++ if (gpio_num > 7) { ++ gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL_2 + 2; ++ gpio_num_to_set = gpio_num - 8; + } ++ ++ if( isOutput ) ++ rtw_write8(adapter, gpio_ctrl_reg_to_set, rtw_read8(adapter, gpio_ctrl_reg_to_set) | BIT(gpio_num_to_set)); ++ else ++ rtw_write8(adapter, gpio_ctrl_reg_to_set, rtw_read8(adapter, gpio_ctrl_reg_to_set) & ~BIT(gpio_num_to_set)); ++ ++ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); ++ ++ return 0; + } ++int rtw_hal_register_gpio_interrupt(_adapter* adapter, int gpio_num, void(*callback)(u8 level)) ++{ ++ u8 value; ++ u8 direction; ++ PHAL_DATA_TYPE phal = GET_HAL_DATA(adapter); + +-u32 Hal_readPGDataFromConfigFile( +- PADAPTER padapter, +- struct file *fp) +-{ +- u32 i; +- mm_segment_t fs; +- u8 temp[3]; +- loff_t pos = 0; +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- u8 *PROMContent = pEEPROM->efuse_eeprom_data; +- +- temp[2] = 0; // add end of string '\0' +- +- fs = get_fs(); +- set_fs(KERNEL_DS); +- +- for (i = 0 ; i < HWSET_MAX_SIZE ; i++) { +- vfs_read(fp, temp, 2, &pos); +- PROMContent[i] = simple_strtoul(temp, NULL, 16); +- if ((i % EFUSE_FILE_COLUMN_NUM) == (EFUSE_FILE_COLUMN_NUM - 1)) { +- //Filter the lates space char. +- vfs_read(fp, temp, 1, &pos); +- if (strchr(temp, ' ') == NULL) { +- pos--; +- vfs_read(fp, temp, 2, &pos); +- } +- } else { +- pos += 1; // Filter the space character ++ if (IS_HARDWARE_TYPE_8188E(adapter)){ ++ if(gpio_num > 7 || gpio_num < 4) { ++ DBG_871X_LEVEL(_drv_always_, "%s The gpio number does not included 4~7.\n",__FUNCTION__); ++ return -1; + } + } + +- set_fs(fs); +- pEEPROM->bloadfile_fail_flag = _FALSE; ++ rtw_ps_deny(adapter, PS_DENY_IOCTL); + +-#ifdef CONFIG_DEBUG +- DBG_871X("Efuse configure file:\n"); +- for (i=0; i> gpio_num; ++ if(direction){ ++ DBG_871X_LEVEL(_drv_always_, "%s Can't register output gpio as interrupt.\n",__FUNCTION__); ++ return -1; + } +- printk("\n"); +-#endif + +- return _SUCCESS; +-} ++ /* Config GPIO Mode */ ++ rtw_write8(adapter, REG_GPIO_PIN_CTRL + 3, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 3) | BIT(gpio_num)); + +-void Hal_ReadMACAddrFromFile( +- PADAPTER padapter, +- struct file *fp) +-{ +- u32 i; +- mm_segment_t fs; +- u8 source_addr[18]; +- loff_t pos = 0; +- u32 curtime = rtw_get_current_time(); +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- u8 *head, *end; ++ /* Register GPIO interrupt handler*/ ++ adapter->gpiointpriv.callback[gpio_num] = callback; ++ ++ /* Set GPIO interrupt mode, 0:positive edge, 1:negative edge */ ++ value = rtw_read8(adapter, REG_GPIO_PIN_CTRL) & BIT(gpio_num); ++ adapter->gpiointpriv.interrupt_mode = rtw_read8(adapter, REG_HSIMR + 2)^value; ++ rtw_write8(adapter, REG_GPIO_INTM, adapter->gpiointpriv.interrupt_mode); ++ ++ /* Enable GPIO interrupt */ ++ adapter->gpiointpriv.interrupt_enable_mask = rtw_read8(adapter, REG_HSIMR + 2) | BIT(gpio_num); ++ rtw_write8(adapter, REG_HSIMR + 2, adapter->gpiointpriv.interrupt_enable_mask); + +- _rtw_memset(source_addr, 0, 18); +- _rtw_memset(pEEPROM->mac_addr, 0, ETH_ALEN); ++ rtw_hal_update_hisr_hsisr_ind(adapter, 1); ++ ++ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); ++ ++ return 0; ++} ++int rtw_hal_disable_gpio_interrupt(_adapter* adapter, int gpio_num) ++{ ++ u8 value; ++ u8 direction; ++ PHAL_DATA_TYPE phal = GET_HAL_DATA(adapter); + +- fs = get_fs(); +- set_fs(KERNEL_DS); ++ if (IS_HARDWARE_TYPE_8188E(adapter)){ ++ if(gpio_num > 7 || gpio_num < 4) { ++ DBG_871X("%s The gpio number does not included 4~7.\n",__FUNCTION__); ++ return -1; ++ } ++ } + +- DBG_871X("wifi mac address:\n"); +- vfs_read(fp, source_addr, 18, &pos); +- source_addr[17] = ':'; ++ rtw_ps_deny(adapter, PS_DENY_IOCTL); + +- head = end = source_addr; +- for (i=0; imac_addr[i] = simple_strtoul(head, NULL, 16 ); ++ /* Unregister GPIO interrupt handler*/ ++ adapter->gpiointpriv.callback[gpio_num] = NULL; + +- if (end) { +- end++; +- head = end; +- } +- } ++ /* Reset GPIO interrupt mode, 0:positive edge, 1:negative edge */ ++ adapter->gpiointpriv.interrupt_mode = rtw_read8(adapter, REG_GPIO_INTM) &~ BIT(gpio_num); ++ rtw_write8(adapter, REG_GPIO_INTM, 0x00); ++ ++ /* Disable GPIO interrupt */ ++ adapter->gpiointpriv.interrupt_enable_mask = rtw_read8(adapter, REG_HSIMR + 2) &~ BIT(gpio_num); ++ rtw_write8(adapter, REG_HSIMR + 2, adapter->gpiointpriv.interrupt_enable_mask); + +- set_fs(fs); +- pEEPROM->bloadmac_fail_flag = _FALSE; ++ if(!adapter->gpiointpriv.interrupt_enable_mask) ++ rtw_hal_update_hisr_hsisr_ind(adapter, 0); ++ ++ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); + +- if (rtw_check_invalid_mac_address(pEEPROM->mac_addr) == _TRUE) { +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)) +- get_random_bytes(pEEPROM->mac_addr, ETH_ALEN); +- pEEPROM->mac_addr[0] = 0x00; +- pEEPROM->mac_addr[1] = 0xe0; +- pEEPROM->mac_addr[2] = 0x4c; +-#else +- pEEPROM->mac_addr[0] = 0x00; +- pEEPROM->mac_addr[1] = 0xe0; +- pEEPROM->mac_addr[2] = 0x4c; +- pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ; +- pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ; +- pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ; ++ return 0; ++} + #endif +- DBG_871X("MAC Address from wifimac error is invalid, assign random MAC !!!\n"); ++ ++s8 rtw_hal_ch_sw_iqk_info_search(_adapter *padapter, u8 central_chnl, u8 bw_mode) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 i; ++ ++ for (i = 0; i < MAX_IQK_INFO_BACKUP_CHNL_NUM; i++) { ++ if ((pHalData->iqk_reg_backup[i].central_chnl != 0)) { ++ if ((pHalData->iqk_reg_backup[i].central_chnl == central_chnl) ++ && (pHalData->iqk_reg_backup[i].bw_mode == bw_mode)) { ++ return i; ++ } ++ } + } + +- DBG_871X("%s: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", +- __func__, pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], +- pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], +- pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); ++ return -1; + } + +-void Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8* mac_addr) { +- int i = 0; +- u16 addr_offset = 0x0000; ++void rtw_hal_ch_sw_iqk_info_backup(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ s8 res; ++ u8 i; ++ ++ /* If it's an existed record, overwrite it */ ++ res = rtw_hal_ch_sw_iqk_info_search(padapter, pHalData->CurrentChannel, pHalData->CurrentChannelBW); ++ if ((res >= 0) && (res < MAX_IQK_INFO_BACKUP_CHNL_NUM)) { ++ rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_BACKUP, (u8 *)&(pHalData->iqk_reg_backup[res])); ++ return; ++ } + +- switch(padapter->chip_type) { +- case RTL8723B: +- if (padapter->interface_type == RTW_USB) { +- addr_offset = EEPROM_MAC_ADDR_8723BU; +- DBG_871X("%s: interface is USB\n", __func__); +- } else if (padapter->interface_type == RTW_SDIO) { +- addr_offset = EEPROM_MAC_ADDR_8723BS; +- DBG_871X("%s: interface is SDIO\n", __func__); +- } else if (padapter->interface_type == RTW_PCIE) { +- addr_offset = EEPROM_MAC_ADDR_8723BE; +- DBG_871X("%s: interface is PCIE\n", __func__); +- } else if (padapter->interface_type == RTW_GSPI){ +- //addr_offset = EEPROM_MAC_ADDR_8723BS; +- DBG_871X("%s: interface is GSPI\n", __func__); +- } +- break; +- case RTL8188E: +- if (padapter->interface_type == RTW_USB) { +- addr_offset = EEPROM_MAC_ADDR_88EU; +- DBG_871X("%s: interface is USB\n", __func__); +- } else if (padapter->interface_type == RTW_SDIO) { +- addr_offset = EEPROM_MAC_ADDR_88ES; +- DBG_871X("%s: interface is SDIO\n", __func__); +- } else if (padapter->interface_type == RTW_PCIE) { +- addr_offset = EEPROM_MAC_ADDR_88EE; +- DBG_871X("%s: interface is PCIE\n", __func__); +- } else if (padapter->interface_type == RTW_GSPI){ +- //addr_offset = EEPROM_MAC_ADDR_8723BS; +- DBG_871X("%s: interface is GSPI\n", __func__); +- } +- break; ++ /* Search for the empty record to use */ ++ for (i = 0; i < MAX_IQK_INFO_BACKUP_CHNL_NUM; i++) { ++ if (pHalData->iqk_reg_backup[i].central_chnl == 0) { ++ rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_BACKUP, (u8 *)&(pHalData->iqk_reg_backup[i])); ++ return; ++ } + } + +- rtw_efuse_map_read(padapter, addr_offset, ETH_ALEN, mac_addr); ++ /* Else, overwrite the oldest record */ ++ for (i = 1; i < MAX_IQK_INFO_BACKUP_CHNL_NUM; i++) ++ _rtw_memcpy(&(pHalData->iqk_reg_backup[i - 1]), &(pHalData->iqk_reg_backup[i]), sizeof(struct hal_iqk_reg_backup)); + +- if (rtw_check_invalid_mac_address(mac_addr) == _TRUE) { +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)) +- get_random_bytes(mac_addr, ETH_ALEN); +- mac_addr[0] = 0x00; +- mac_addr[1] = 0xe0; +- mac_addr[2] = 0x4c; +-#else +- mac_addr[0] = 0x00; +- mac_addr[1] = 0xe0; +- mac_addr[2] = 0x4c; +- mac_addr[3] = (u8)(curtime & 0xff) ; +- mac_addr[4] = (u8)((curtime>>8) & 0xff) ; +- mac_addr[5] = (u8)((curtime>>16) & 0xff) ; +-#endif +- DBG_871X("MAC Address from phy efuse error, assign random MAC !!!\n"); +- } ++ rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_BACKUP, (u8 *)&(pHalData->iqk_reg_backup[MAX_IQK_INFO_BACKUP_CHNL_NUM - 1])); ++} + +- DBG_871X("%s: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", +- __func__, mac_addr[0], mac_addr[1], mac_addr[2], +- mac_addr[3], mac_addr[4], mac_addr[5]); ++void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case) ++{ ++ rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_RESTORE, &ch_sw_use_case); + } +-#endif //CONFIG_EFUSE_CONFIG_FILE + +-#ifdef CONFIG_RF_GAIN_OFFSET +-u32 Array_kfreemap[] = { +-0x08,0xe, +-0x06,0xc, +-0x04,0xa, +-0x02,0x8, +-0x00,0x6, +-0x03,0x4, +-0x05,0x2, +-0x07,0x0, +-0x09,0x0, +-0x0c,0x0, +-}; ++void rtw_dump_mac_rx_counters(_adapter* padapter,struct dbg_rx_counter *rx_counter) ++{ ++ u32 mac_cck_ok=0, mac_ofdm_ok=0, mac_ht_ok=0, mac_vht_ok=0; ++ u32 mac_cck_err=0, mac_ofdm_err=0, mac_ht_err=0, mac_vht_err=0; ++ u32 mac_cck_fa=0, mac_ofdm_fa=0, mac_ht_fa=0; ++ u32 DropPacket=0; ++ ++ if(!rx_counter){ ++ rtw_warn_on(1); ++ return; ++ } + +-void rtw_bb_rf_gain_offset(_adapter *padapter) ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x3); ++ mac_cck_ok = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0] ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x0); ++ mac_ofdm_ok = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0] ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x6); ++ mac_ht_ok = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0] ++ mac_vht_ok = 0; ++ if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) { ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x0); ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT26, 0x1); ++ mac_vht_ok = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0] ++ } ++ ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x4); ++ mac_cck_err = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0] ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x1); ++ mac_ofdm_err = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0] ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x7); ++ mac_ht_err = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0] ++ mac_vht_err = 0; ++ if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) { ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x1); ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT26, 0x1); ++ mac_vht_err = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0] ++ } ++ ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x5); ++ mac_cck_fa = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0] ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x2); ++ mac_ofdm_fa = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0] ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x9); ++ mac_ht_fa = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0] ++ ++ //Mac_DropPacket ++ rtw_write32(padapter, REG_RXERR_RPT, (rtw_read32(padapter, REG_RXERR_RPT)& 0x0FFFFFFF)| Mac_DropPacket); ++ DropPacket = rtw_read32(padapter, REG_RXERR_RPT)& 0x0000FFFF; ++ ++ rx_counter->rx_pkt_ok = mac_cck_ok+mac_ofdm_ok+mac_ht_ok+mac_vht_ok; ++ rx_counter->rx_pkt_crc_error = mac_cck_err+mac_ofdm_err+mac_ht_err+mac_vht_err; ++ rx_counter->rx_cck_fa = mac_cck_fa; ++ rx_counter->rx_ofdm_fa = mac_ofdm_fa; ++ rx_counter->rx_ht_fa = mac_ht_fa; ++ rx_counter->rx_pkt_drop = DropPacket; ++} ++void rtw_reset_mac_rx_counters(_adapter* padapter) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- u8 value = padapter->eeprompriv.EEPROMRFGainOffset; +- u8 tmp = 0x3e; +- u32 res,i=0; +- u4Byte ArrayLen = sizeof(Array_kfreemap)/sizeof(u32); +- pu4Byte Array = Array_kfreemap; +- u4Byte v1=0,v2=0,GainValue,target=0; +- //DBG_871X("+%s value: 0x%02x+\n", __func__, value); +-#if defined(CONFIG_RTL8723A) +- if (value & BIT0) { +- DBG_871X("Offset RF Gain.\n"); +- DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal); +- if(padapter->eeprompriv.EEPROMRFGainVal != 0xff){ +- res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0xd, 0xffffffff); +- DBG_871X("Offset RF Gain. reg 0xd=0x%x\n",res); +- res &= 0xfff87fff; + +- res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f)<< 15; +- DBG_871X("Offset RF Gain. reg 0xd=0x%x\n",res); ++ if (IS_HARDWARE_TYPE_8703B(padapter) || IS_HARDWARE_TYPE_8188F(padapter)) ++ PHY_SetMacReg(padapter, 0x608, BIT19, 0x1); /* If no packet rx, MaxRx clock be gating ,BIT_DISGCLK bit19 set 1 for fix*/ + +- rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET_CCK, RF_GAIN_OFFSET_MASK, res); ++ //reset mac counter ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT27, 0x1); ++ PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT27, 0x0); ++} ++ ++void rtw_dump_phy_rx_counters(_adapter* padapter,struct dbg_rx_counter *rx_counter) ++{ ++ u32 cckok=0,cckcrc=0,ofdmok=0,ofdmcrc=0,htok=0,htcrc=0,OFDM_FA=0,CCK_FA=0,vht_ok=0,vht_err=0; ++ if(!rx_counter){ ++ rtw_warn_on(1); ++ return; ++ } ++ if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)){ ++ cckok = PHY_QueryBBReg(padapter, 0xF04, 0x3FFF); // [13:0] ++ ofdmok = PHY_QueryBBReg(padapter, 0xF14, 0x3FFF); // [13:0] ++ htok = PHY_QueryBBReg(padapter, 0xF10, 0x3FFF); // [13:0] ++ vht_ok = PHY_QueryBBReg(padapter, 0xF0C, 0x3FFF); // [13:0] ++ cckcrc = PHY_QueryBBReg(padapter, 0xF04, 0x3FFF0000); // [29:16] ++ ofdmcrc = PHY_QueryBBReg(padapter, 0xF14, 0x3FFF0000); // [29:16] ++ htcrc = PHY_QueryBBReg(padapter, 0xF10, 0x3FFF0000); // [29:16] ++ vht_err = PHY_QueryBBReg(padapter, 0xF0C, 0x3FFF0000); // [29:16] ++ CCK_FA = PHY_QueryBBReg(padapter, 0xA5C, bMaskLWord); ++ OFDM_FA = PHY_QueryBBReg(padapter, 0xF48, bMaskLWord); ++ } ++ else ++ { ++ cckok = PHY_QueryBBReg(padapter, 0xF88, bMaskDWord); ++ ofdmok = PHY_QueryBBReg(padapter, 0xF94, bMaskLWord); ++ htok = PHY_QueryBBReg(padapter, 0xF90, bMaskLWord); ++ vht_ok = 0; ++ cckcrc = PHY_QueryBBReg(padapter, 0xF84, bMaskDWord); ++ ofdmcrc = PHY_QueryBBReg(padapter, 0xF94, bMaskHWord); ++ htcrc = PHY_QueryBBReg(padapter, 0xF90, bMaskHWord); ++ vht_err = 0; ++ OFDM_FA = PHY_QueryBBReg(padapter, 0xCF0, bMaskLWord) + PHY_QueryBBReg(padapter, 0xCF2, bMaskLWord) + ++ PHY_QueryBBReg(padapter, 0xDA2, bMaskLWord) + PHY_QueryBBReg(padapter, 0xDA4, bMaskLWord) + ++ PHY_QueryBBReg(padapter, 0xDA6, bMaskLWord) + PHY_QueryBBReg(padapter, 0xDA8, bMaskLWord); ++ ++ CCK_FA=(rtw_read8(padapter, 0xA5B )<<8 ) | (rtw_read8(padapter, 0xA5C)); ++ } ++ ++ rx_counter->rx_pkt_ok = cckok+ofdmok+htok+vht_ok; ++ rx_counter->rx_pkt_crc_error = cckcrc+ofdmcrc+htcrc+vht_err; ++ rx_counter->rx_ofdm_fa = OFDM_FA; ++ rx_counter->rx_cck_fa = CCK_FA; ++ ++} + +- res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0xe, 0xffffffff); +- DBG_871X("Offset RF Gain. reg 0xe=0x%x\n",res); +- res &= 0xfffffff0; ++void rtw_reset_phy_rx_counters(_adapter* padapter) ++{ ++ //reset phy counter ++ if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) ++ { ++ PHY_SetBBReg(padapter, 0xB58, BIT0, 0x1); ++ PHY_SetBBReg(padapter, 0xB58, BIT0, 0x0); + +- res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f); +- DBG_871X("Offset RF Gain. reg 0xe=0x%x\n",res); ++ PHY_SetBBReg(padapter, 0x9A4, BIT17, 0x1);//reset OFDA FA counter ++ PHY_SetBBReg(padapter, 0x9A4, BIT17, 0x0); ++ ++ PHY_SetBBReg(padapter, 0xA2C, BIT15, 0x0);//reset CCK FA counter ++ PHY_SetBBReg(padapter, 0xA2C, BIT15, 0x1); ++ } ++ else ++ { ++ PHY_SetBBReg(padapter, 0xF14, BIT16, 0x1); ++ rtw_msleep_os(10); ++ PHY_SetBBReg(padapter, 0xF14, BIT16, 0x0); ++ ++ PHY_SetBBReg(padapter, 0xD00, BIT27, 0x1);//reset OFDA FA counter ++ PHY_SetBBReg(padapter, 0xC0C, BIT31, 0x1);//reset OFDA FA counter ++ PHY_SetBBReg(padapter, 0xD00, BIT27, 0x0); ++ PHY_SetBBReg(padapter, 0xC0C, BIT31, 0x0); ++ ++ PHY_SetBBReg(padapter, 0xA2C, BIT15, 0x0);//reset CCK FA counter ++ PHY_SetBBReg(padapter, 0xA2C, BIT15, 0x1); ++ } ++} ++#ifdef DBG_RX_COUNTER_DUMP ++void rtw_dump_drv_rx_counters(_adapter* padapter,struct dbg_rx_counter *rx_counter) ++{ ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ if(!rx_counter){ ++ rtw_warn_on(1); ++ return; ++ } ++ rx_counter->rx_pkt_ok = padapter->drv_rx_cnt_ok; ++ rx_counter->rx_pkt_crc_error = padapter->drv_rx_cnt_crcerror; ++ rx_counter->rx_pkt_drop = precvpriv->rx_drop - padapter->drv_rx_cnt_drop; ++} ++void rtw_reset_drv_rx_counters(_adapter* padapter) ++{ ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ padapter->drv_rx_cnt_ok = 0; ++ padapter->drv_rx_cnt_crcerror = 0; ++ padapter->drv_rx_cnt_drop = precvpriv->rx_drop; ++} ++void rtw_dump_phy_rxcnts_preprocess(_adapter* padapter,u8 rx_cnt_mode) ++{ ++ u8 initialgain; ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); ++ ++ if((!(padapter->dump_rx_cnt_mode& DUMP_PHY_RX_COUNTER)) && (rx_cnt_mode & DUMP_PHY_RX_COUNTER)) ++ { ++ /*initialgain = pDigTable->CurIGValue;*/ ++ rtw_hal_get_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, NULL); ++ DBG_871X("%s CurIGValue:0x%02x\n",__FUNCTION__,initialgain); ++ rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE); ++ /*disable dynamic functions, such as high power, DIG*/ ++ rtw_phydm_ability_backup(padapter); ++ rtw_phydm_func_clr(padapter, (ODM_BB_DIG|ODM_BB_FA_CNT)); ++ } ++ else if((padapter->dump_rx_cnt_mode& DUMP_PHY_RX_COUNTER) &&(!(rx_cnt_mode & DUMP_PHY_RX_COUNTER ))) ++ { ++ //turn on phy-dynamic functions ++ rtw_phydm_ability_restore(padapter); ++ initialgain = 0xff; //restore RX GAIN ++ rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE); ++ ++ } ++} ++ ++void rtw_dump_rx_counters(_adapter* padapter) ++{ ++ struct dbg_rx_counter rx_counter; + +- rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET_OFDM, RF_GAIN_OFFSET_MASK, res); +- } +- else +- { +- DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n",padapter->eeprompriv.EEPROMRFGainVal); +- } +- } else { +- DBG_871X("Using the default RF gain.\n"); ++ if( padapter->dump_rx_cnt_mode & DUMP_DRV_RX_COUNTER ){ ++ _rtw_memset(&rx_counter,0,sizeof(struct dbg_rx_counter)); ++ rtw_dump_drv_rx_counters(padapter,&rx_counter); ++ DBG_871X( "Drv Received packet OK:%d CRC error:%d Drop Packets: %d\n", ++ rx_counter.rx_pkt_ok,rx_counter.rx_pkt_crc_error,rx_counter.rx_pkt_drop); ++ rtw_reset_drv_rx_counters(padapter); + } +-#elif defined(CONFIG_RTL8723B) +- if (value & BIT4) { +- DBG_871X("Offset RF Gain.\n"); +- DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal); + +- if(padapter->eeprompriv.EEPROMRFGainVal != 0xff){ ++ if( padapter->dump_rx_cnt_mode & DUMP_MAC_RX_COUNTER ){ ++ _rtw_memset(&rx_counter,0,sizeof(struct dbg_rx_counter)); ++ rtw_dump_mac_rx_counters(padapter,&rx_counter); ++ DBG_871X( "Mac Received packet OK:%d CRC error:%d FA Counter: %d Drop Packets: %d\n", ++ rx_counter.rx_pkt_ok,rx_counter.rx_pkt_crc_error, ++ rx_counter.rx_cck_fa+rx_counter.rx_ofdm_fa+rx_counter.rx_ht_fa, ++ rx_counter.rx_pkt_drop); ++ rtw_reset_mac_rx_counters(padapter); ++ } ++ ++ if(padapter->dump_rx_cnt_mode & DUMP_PHY_RX_COUNTER ){ ++ _rtw_memset(&rx_counter,0,sizeof(struct dbg_rx_counter)); ++ rtw_dump_phy_rx_counters(padapter,&rx_counter); ++ //DBG_871X("%s: OFDM_FA =%d\n", __FUNCTION__, rx_counter.rx_ofdm_fa); ++ //DBG_871X("%s: CCK_FA =%d\n", __FUNCTION__, rx_counter.rx_cck_fa); ++ DBG_871X("Phy Received packet OK:%d CRC error:%d FA Counter: %d\n",rx_counter.rx_pkt_ok,rx_counter.rx_pkt_crc_error, ++ rx_counter.rx_ofdm_fa+rx_counter.rx_cck_fa); ++ rtw_reset_phy_rx_counters(padapter); ++ } ++} ++#endif ++void rtw_get_noise(_adapter* padapter) ++{ ++#if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct noise_info info; ++ if(rtw_linked_check(padapter)){ ++ info.bPauseDIG = _TRUE; ++ info.IGIValue = 0x1e; ++ info.max_time = 100;//ms ++ info.chan = pmlmeext->cur_channel ;//rtw_get_oper_ch(padapter); ++ rtw_ps_deny(padapter, PS_DENY_IOCTL); ++ LeaveAllPowerSaveModeDirect(padapter); ++ ++ rtw_hal_set_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&info, _FALSE); ++ //ODM_InbandNoise_Monitor(podmpriv,_TRUE,0x20,100); ++ rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); ++ rtw_hal_get_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&(info.chan), &(padapter->recvpriv.noise)); ++ #ifdef DBG_NOISE_MONITOR ++ DBG_871X("chan:%d,noise_level:%d\n",info.chan,padapter->recvpriv.noise); ++ #endif ++ } ++#endif + +- if(pHalData->ant_path == ODM_RF_PATH_A) { +- GainValue=(padapter->eeprompriv.EEPROMRFGainVal & 0x0f); +- +- } else { +- GainValue=(padapter->eeprompriv.EEPROMRFGainVal & 0xf0)>>4; +- } +- DBG_871X("Ant PATH_%d GainValue Offset = 0x%x\n",(pHalData->ant_path == ODM_RF_PATH_A) ? (ODM_RF_PATH_A) : (ODM_RF_PATH_B),GainValue); +- +- for (i = 0; i < ArrayLen; i += 2 ) +- { +- //DBG_871X("ArrayLen in =%d ,Array 1 =0x%x ,Array2 =0x%x \n",i,Array[i],Array[i]+1); +- v1 = Array[i]; +- v2 = Array[i+1]; +- if ( v1 == GainValue ) { +- DBG_871X("Offset RF Gain. got v1 =0x%x ,v2 =0x%x \n",v1,v2); +- target=v2; +- break; +- } +- } +- DBG_871X("padapter->eeprompriv.EEPROMRFGainVal=0x%x ,Gain offset Target Value=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal,target); ++} ++ ++u8 rtw_get_current_tx_rate(_adapter *padapter, u8 macid) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u8 rate_id = 0; ++ ++#if (RATE_ADAPTIVE_SUPPORT == 1) ++ rate_id = ODM_RA_GetDecisionRate_8188E(pDM_Odm, macid); ++#else ++ rate_id = (pRA_Table->link_tx_rate[macid]) & 0x7f; ++#endif + +- res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); +- DBG_871X("Offset RF Gain. before reg 0x7f=0x%08x\n",res); +- PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target); +- res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); ++ return rate_id; + +- DBG_871X("Offset RF Gain. After reg 0x7f=0x%08x\n",res); +- +- }else { ++} + +- DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n",padapter->eeprompriv.EEPROMRFGainVal); +- } +- } else { +- DBG_871X("Using the default RF gain.\n"); +- } ++#ifdef CONFIG_FW_C2H_DEBUG ++ ++/* C2H RX package original is 128. ++if enable CONFIG_FW_C2H_DEBUG, it should increase to 256. ++ C2H FW debug message: ++ without aggregate: ++ {C2H_CmdID,Seq,SubID,Len,Content[0~n]} ++ Content[0~n]={'a','b','c',...,'z','\n'} ++ with aggregate: ++ {C2H_CmdID,Seq,SubID,Len,Content[0~n]} ++ Content[0~n]={'a','b','c',...,'z','\n',Extend C2H pkt 2...} ++ Extend C2H pkt 2={C2H CmdID,Seq,SubID,Len,Content = {'a','b','c',...,'z','\n'}} ++ Author: Isaac */ ++ ++void Debug_FwC2H(PADAPTER padapter, u8 *pdata, u8 len) ++{ ++ int i = 0; ++ int cnt = 0, total_length = 0; ++ u8 buf[128] = {0}; ++ u8 more_data = _FALSE; ++ u8 *nextdata = NULL; ++ u8 test = 0; + +-#elif defined(CONFIG_RTL8188E) +- if (value & BIT4) { +- DBG_871X("8188ES Offset RF Gain.\n"); +- DBG_871X("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n", +- padapter->eeprompriv.EEPROMRFGainVal); ++ u8 data_len; ++ u8 seq_no; + +- if (padapter->eeprompriv.EEPROMRFGainVal != 0xff) { +- res = rtw_hal_read_rfreg(padapter, RF_PATH_A, +- REG_RF_BB_GAIN_OFFSET, 0xffffffff); ++ nextdata = pdata; ++ do { ++ data_len = *(nextdata + 1); ++ seq_no = *(nextdata + 2); + +- DBG_871X("Offset RF Gain. reg 0x55=0x%x\n",res); +- res &= 0xfff87fff; ++ for (i = 0 ; i < data_len - 2 ; i++) { ++ cnt += sprintf((buf+cnt), "%c", nextdata[3 + i]); + +- res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f) << 15; +- DBG_871X("Offset RF Gain. res=0x%x\n",res); ++ if (nextdata[3 + i] == 0x0a && nextdata[4 + i] == 0xff) ++ more_data = _TRUE; ++ else if (nextdata[3 + i] == 0x0a && nextdata[4 + i] != 0xff) ++ more_data = _FALSE; ++ } + +- rtw_hal_write_rfreg(padapter, RF_PATH_A, +- REG_RF_BB_GAIN_OFFSET, +- RF_GAIN_OFFSET_MASK, res); +- } else { +- DBG_871X("Offset RF Gain. EEPROMRFGainVal=0x%x == 0xff, didn't run Kfree\n", +- padapter->eeprompriv.EEPROMRFGainVal); ++ DBG_871X("[RTKFW, SEQ=%d]: %s", seq_no, buf); ++ data_len += 3; ++ total_length += data_len; ++ ++ if (more_data == _TRUE) { ++ _rtw_memset(buf, '\0', 128); ++ cnt = 0; ++ nextdata = (pdata + total_length); + } +- } else { +- DBG_871X("Using the default RF gain.\n"); +- } +-#else +- if (!(value & 0x01)) { +- //DBG_871X("Offset RF Gain.\n"); +- res = rtw_hal_read_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, 0xffffffff); +- value &= tmp; +- res = value << 14; +- rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, RF_GAIN_OFFSET_MASK, res); +- } else { +- DBG_871X("Using the default RF gain.\n"); +- } +-#endif +- ++ } while (more_data == _TRUE); + } +-#endif //CONFIG_RF_GAIN_OFFSET +- +-//To avoid RX affect TX throughput +-void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer) ++#endif /*CONFIG_FW_C2H_DEBUG*/ ++void update_IOT_info(_adapter *padapter) + { +- struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +-#ifdef CONFIG_USB_RX_AGGREGATION +- if(IS_HARDWARE_TYPE_8821U(padapter) )//|| IS_HARDWARE_TYPE_8192EU(padapter)) ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ switch (pmlmeinfo->assoc_AP_vendor) + { +- //This AGG_PH_TH only for UsbRxAggMode == USB_RX_AGG_USB +- if((pHalData->UsbRxAggMode == USB_RX_AGG_USB) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) +- { +- if(pdvobjpriv->traffic_stat.cur_tx_tp > 2 && pdvobjpriv->traffic_stat.cur_rx_tp < 30) +- rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,0x1003); +- else +- rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,0x2005); //dmc agg th 20K ++ case HT_IOT_PEER_MARVELL: ++ pmlmeinfo->turboMode_cts2self = 1; ++ pmlmeinfo->turboMode_rtsen = 0; ++ break; ++ ++ case HT_IOT_PEER_RALINK: ++ pmlmeinfo->turboMode_cts2self = 0; ++ pmlmeinfo->turboMode_rtsen = 1; ++ //disable high power ++ rtw_phydm_func_clr(padapter, ODM_BB_DYNAMIC_TXPWR); ++ break; ++ case HT_IOT_PEER_REALTEK: ++ //rtw_write16(padapter, 0x4cc, 0xffff); ++ //rtw_write16(padapter, 0x546, 0x01c0); ++ //disable high power ++ rtw_phydm_func_clr(padapter, ODM_BB_DYNAMIC_TXPWR); ++ break; ++ default: ++ pmlmeinfo->turboMode_cts2self = 0; ++ pmlmeinfo->turboMode_rtsen = 1; ++ break; ++ } ++ ++} ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++void rtw_acs_start(_adapter *padapter, bool bStart) ++{ ++ if (_TRUE == bStart) { ++ ACS_OP acs_op = ACS_INIT; ++ ++ rtw_hal_set_odm_var(padapter, HAL_ODM_AUTO_CHNL_SEL, &acs_op, _TRUE); ++ rtw_set_acs_channel(padapter, 0); ++ SET_ACS_STATE(padapter, ACS_ENABLE); ++ } else { ++ SET_ACS_STATE(padapter, ACS_DISABLE); ++ #ifdef DBG_AUTO_CHNL_SEL_NHM ++ if (1) { ++ u8 best_24g_ch = 0; ++ u8 best_5g_ch = 0; + +- //DBG_871X("TX_TP=%u, RX_TP=%u \n", pdvobjpriv->traffic_stat.cur_tx_tp, pdvobjpriv->traffic_stat.cur_rx_tp); ++ rtw_hal_get_odm_var(padapter, HAL_ODM_AUTO_CHNL_SEL, &(best_24g_ch), &(best_5g_ch)); ++ DBG_871X("[ACS-"ADPT_FMT"] Best 2.4G CH:%u\n", ADPT_ARG(padapter), best_24g_ch); ++ DBG_871X("[ACS-"ADPT_FMT"] Best 5G CH:%u\n", ADPT_ARG(padapter), best_5g_ch); + } ++ #endif + } ++} ++#endif ++ ++/* TODO: merge with phydm, see odm_SetCrystalCap() */ ++void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap) ++{ ++ crystal_cap = crystal_cap & 0x3F; ++ ++ switch (rtw_get_chip_type(adapter)) { ++#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) ++ case RTL8188E: ++ case RTL8188F: ++ /* write 0x24[16:11] = 0x24[22:17] = CrystalCap */ ++ PHY_SetBBReg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6))); ++ break; ++#endif ++#if defined(CONFIG_RTL8812A) ++ case RTL8812: ++ /* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */ ++ PHY_SetBBReg(adapter, REG_MAC_PHY_CTRL, 0x7FF80000, (crystal_cap | (crystal_cap << 6))); ++ break; ++#endif ++#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8192E) ++ case RTL8723B: ++ case RTL8703B: ++ case RTL8821: ++ case RTL8192E: ++ /* write 0x2C[23:18] = 0x2C[17:12] = CrystalCap */ ++ PHY_SetBBReg(adapter, REG_MAC_PHY_CTRL, 0x00FFF000, (crystal_cap | (crystal_cap << 6))); ++ break; ++#endif ++#if defined(CONFIG_RTL8814A) ++ case RTL8814A: ++ /* write 0x2C[26:21] = 0x2C[20:15] = CrystalCap*/ ++ PHY_SetBBReg(adapter, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6))); ++ break; ++#endif ++#if defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) ++ case RTL8821B: ++ case RTL8822B: ++ /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */ ++ crystal_cap = crystal_cap & 0x3F; ++ PHY_SetBBReg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap); ++ PHY_SetBBReg(adapter, REG_AFE_PLL_CTRL, 0x7E, crystal_cap); ++ break; + #endif ++ default: ++ rtw_warn_on(1); ++ } + } + +-//bus-agg check for SoftAP mode +-inline u8 rtw_hal_busagg_qsel_check(_adapter *padapter,u8 pre_qsel,u8 next_qsel) ++int hal_spec_init(_adapter *adapter) + { +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- u8 chk_rst = _SUCCESS; +- +- if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) +- return chk_rst; ++ u8 interface_type = 0; ++ int ret = _SUCCESS; + +- //if((pre_qsel == 0xFF)||(next_qsel== 0xFF)) +- // return chk_rst; +- +- if( ((pre_qsel == QSLT_HIGH)||((next_qsel== QSLT_HIGH))) +- && (pre_qsel != next_qsel )){ +- //DBG_871X("### bus-agg break cause of qsel misatch, pre_qsel=0x%02x,next_qsel=0x%02x ###\n", +- // pre_qsel,next_qsel); +- chk_rst = _FAIL; +- } +- return chk_rst; ++ interface_type = rtw_get_intf_type(adapter); ++ ++ switch (rtw_get_chip_type(adapter)) { ++#ifdef CONFIG_RTL8723B ++ case RTL8723B: ++ init_hal_spec_8723b(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8703B ++ case RTL8703B: ++ init_hal_spec_8703b(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8188E ++ case RTL8188E: ++ init_hal_spec_8188e(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8188F ++ case RTL8188F: ++ init_hal_spec_8188f(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8812A ++ case RTL8812: ++ init_hal_spec_8812a(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8821A ++ case RTL8821: ++ init_hal_spec_8821a(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8192E ++ case RTL8192E: ++ init_hal_spec_8192e(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8814A ++ case RTL8814A: ++ init_hal_spec_8814a(adapter); ++ break; ++#endif ++ default: ++ DBG_871X_LEVEL(_drv_err_, "%s: unknown chip_type:%u\n" ++ , __func__, rtw_get_chip_type(adapter)); ++ ret = _FAIL; ++ break; ++ } ++ ++ return ret; + } + +-/* +- * Description: +- * dump_TX_FIFO: This is only used to dump TX_FIFO for debug WoW mode offload +- * contant. +- * +- * Input: +- * adapter: adapter pointer. +- * page_num: The max. page number that user want to dump. +- * page_size: page size of each page. eg. 128 bytes, 256 bytes. +- */ +-void dump_TX_FIFO(_adapter* padapter, u8 page_num, u16 page_size){ ++static const char * const _band_cap_str[] = { ++ /* BIT0 */"2G", ++ /* BIT1 */"5G", ++}; ++ ++static const char * const _bw_cap_str[] = { ++ /* BIT0 */"5M", ++ /* BIT1 */"10M", ++ /* BIT2 */"20M", ++ /* BIT3 */"40M", ++ /* BIT4 */"80M", ++ /* BIT5 */"160M", ++ /* BIT6 */"80_80M", ++}; ++ ++static const char * const _proto_cap_str[] = { ++ /* BIT0 */"b", ++ /* BIT1 */"g", ++ /* BIT2 */"n", ++ /* BIT3 */"ac", ++}; ++ ++static const char * const _wl_func_str[] = { ++ /* BIT0 */"P2P", ++ /* BIT1 */"MIRACAST", ++ /* BIT2 */"TDLS", ++ /* BIT3 */"FTM", ++}; + ++void dump_hal_spec(void *sel, _adapter *adapter) ++{ ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); + int i; +- u8 val = 0; +- u8 base = 0; +- u32 addr = 0; +- u32 count = (page_size / 8); + +- if (page_num <= 0) { +- DBG_871X("!!%s: incorrect input page_num paramter!\n", __func__); +- return; ++ DBG_871X_SEL_NL(sel, "macid_num:%u\n", hal_spec->macid_num); ++ DBG_871X_SEL_NL(sel, "sec_cap:0x%02x\n", hal_spec->sec_cap); ++ DBG_871X_SEL_NL(sel, "sec_cam_ent_num:%u\n", hal_spec->sec_cam_ent_num); ++ DBG_871X_SEL_NL(sel, "nss_num:%u\n", hal_spec->nss_num); ++ ++ DBG_871X_SEL_NL(sel, "band_cap:"); ++ for (i = 0; i < BAND_CAP_BIT_NUM; i++) { ++ if (((hal_spec->band_cap) >> i) & BIT0 && _band_cap_str[i]) ++ DBG_871X_SEL(sel, "%s ", _band_cap_str[i]); + } ++ DBG_871X_SEL(sel, "\n"); + +- if (page_size < 128 || page_size > 256) { +- DBG_871X("!!%s: incorrect input page_size paramter!\n", __func__); +- return; ++ DBG_871X_SEL_NL(sel, "bw_cap:"); ++ for (i = 0; i < BW_CAP_BIT_NUM; i++) { ++ if (((hal_spec->bw_cap) >> i) & BIT0 && _bw_cap_str[i]) ++ DBG_871X_SEL(sel, "%s ", _bw_cap_str[i]); + } ++ DBG_871X_SEL(sel, "\n"); + +- DBG_871X("+%s+\n", __func__); +- val = rtw_read8(padapter, 0x106); +- rtw_write8(padapter, 0x106, 0x69); +- DBG_871X("0x106: 0x%02x\n", val); +- base = rtw_read8(padapter, 0x209); +- DBG_871X("0x209: 0x%02x\n", base); ++ DBG_871X_SEL_NL(sel, "proto_cap:"); ++ for (i = 0; i < PROTO_CAP_BIT_NUM; i++) { ++ if (((hal_spec->proto_cap) >> i) & BIT0 && _proto_cap_str[i]) ++ DBG_871X_SEL(sel, "%s ", _proto_cap_str[i]); ++ } ++ DBG_871X_SEL(sel, "\n"); + +- addr = ((base) * page_size)/8; +- for (i = 0 ; i < page_num * count ; i+=2) { +- rtw_write32(padapter, 0x140, addr + i); +- printk(" %08x %08x ", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148)); +- rtw_write32(padapter, 0x140, addr + i + 1); +- printk(" %08x %08x \n", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148)); ++ DBG_871X_SEL_NL(sel, "wl_func:"); ++ for (i = 0; i < WL_FUNC_BIT_NUM; i++) { ++ if (((hal_spec->wl_func) >> i) & BIT0 && _wl_func_str[i]) ++ DBG_871X_SEL(sel, "%s ", _wl_func_str[i]); + } ++ DBG_871X_SEL(sel, "\n"); + } + +-#ifdef CONFIG_GPIO_API +-u8 rtw_hal_get_gpio(_adapter* adapter, u8 gpio_num) ++inline bool hal_chk_band_cap(_adapter *adapter, u8 cap) + { +- u8 value; +- u8 direction; +- struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); +- +- rtw_ps_deny(adapter, PS_DENY_IOCTL); ++ return (GET_HAL_SPEC(adapter)->band_cap & cap); ++} + +- DBG_871X("rf_pwrstate=0x%02x\n", pwrpriv->rf_pwrstate); +- LeaveAllPowerSaveModeDirect(adapter); ++inline bool hal_chk_bw_cap(_adapter *adapter, u8 cap) ++{ ++ return (GET_HAL_SPEC(adapter)->bw_cap & cap); ++} + +- /* Read GPIO Direction */ +- direction = (rtw_read8(adapter,REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num; ++inline bool hal_chk_proto_cap(_adapter *adapter, u8 cap) ++{ ++ return (GET_HAL_SPEC(adapter)->proto_cap & cap); ++} + +- /* According the direction to read register value */ +- if( direction ) +- value = (rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1)& BIT(gpio_num)) >> gpio_num; +- else +- value = (rtw_read8(adapter, REG_GPIO_PIN_CTRL)& BIT(gpio_num)) >> gpio_num; ++inline bool hal_chk_wl_func(_adapter *adapter, u8 func) ++{ ++ return (GET_HAL_SPEC(adapter)->wl_func & func); ++} + +- rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); +- DBG_871X("%s direction=%d value=%d\n",__FUNCTION__,direction,value); ++inline bool hal_is_band_support(_adapter *adapter, u8 band) ++{ ++ return (GET_HAL_SPEC(adapter)->band_cap & band_to_band_cap(band)); ++} + +- return value; ++inline bool hal_is_bw_support(_adapter *adapter, u8 bw) ++{ ++ return (GET_HAL_SPEC(adapter)->bw_cap & ch_width_to_bw_cap(bw)); + } + +-int rtw_hal_set_gpio_output_value(_adapter* adapter, u8 gpio_num, BOOLEAN isHigh) ++inline bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode) + { +- u8 direction = 0; +- u8 res = -1; +- if (IS_HARDWARE_TYPE_8188E(adapter)){ +- /* Check GPIO is 4~7 */ +- if( gpio_num > 7 || gpio_num < 4) +- { +- DBG_871X("%s The gpio number does not included 4~7.\n",__FUNCTION__); +- return -1; +- } +- } +- +- rtw_ps_deny(adapter, PS_DENY_IOCTL); ++ u8 proto_cap = GET_HAL_SPEC(adapter)->proto_cap; + +- LeaveAllPowerSaveModeDirect(adapter); ++ if (mode == WIRELESS_11B) ++ if ((proto_cap & PROTO_CAP_11B) && hal_chk_band_cap(adapter, BAND_CAP_2G)) ++ return 1; + +- /* Read GPIO direction */ +- direction = (rtw_read8(adapter,REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num; ++ if (mode == WIRELESS_11G) ++ if ((proto_cap & PROTO_CAP_11G) && hal_chk_band_cap(adapter, BAND_CAP_2G)) ++ return 1; + +- /* If GPIO is output direction, setting value. */ +- if( direction ) +- { +- if(isHigh) +- rtw_write8(adapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1) | BIT(gpio_num)); +- else +- rtw_write8(adapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1) & ~BIT(gpio_num)); ++ if (mode == WIRELESS_11A) ++ if ((proto_cap & PROTO_CAP_11G) && hal_chk_band_cap(adapter, BAND_CAP_5G)) ++ return 1; + +- DBG_871X("%s Set gpio %x[%d]=%d\n",__FUNCTION__,REG_GPIO_PIN_CTRL+1,gpio_num,isHigh ); +- res = 0; +- } +- else +- { +- DBG_871X("%s The gpio is input,not be set!\n",__FUNCTION__); +- res = -1; +- } ++ if (mode == WIRELESS_11_24N) ++ if ((proto_cap & PROTO_CAP_11N) && hal_chk_band_cap(adapter, BAND_CAP_2G)) ++ return 1; + +- rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); +- return res; ++ if (mode == WIRELESS_11_5N) ++ if ((proto_cap & PROTO_CAP_11N) && hal_chk_band_cap(adapter, BAND_CAP_5G)) ++ return 1; ++ ++ if (mode == WIRELESS_11AC) ++ if ((proto_cap & PROTO_CAP_11AC) && hal_chk_band_cap(adapter, BAND_CAP_5G)) ++ return 1; ++ ++ return 0; + } + +-int rtw_hal_config_gpio(_adapter* adapter, u8 gpio_num, BOOLEAN isOutput) ++/* ++* hal_largest_bw - starting from in_bw, get largest bw supported by HAL ++* @adapter: ++* @in_bw: starting bw, value of CHANNEL_WIDTH ++* ++* Returns: value of CHANNEL_WIDTH ++*/ ++u8 hal_largest_bw(_adapter *adapter, u8 in_bw) + { +- if (IS_HARDWARE_TYPE_8188E(adapter)){ +- if( gpio_num > 7 || gpio_num < 4) +- { +- DBG_871X("%s The gpio number does not included 4~7.\n",__FUNCTION__); +- return -1; +- } +- } ++ for (; in_bw > CHANNEL_WIDTH_20; in_bw--) { ++ if (hal_is_bw_support(adapter, in_bw)) ++ break; ++ } + +- DBG_871X("%s gpio_num =%d direction=%d\n",__FUNCTION__,gpio_num,isOutput); ++ if (!hal_is_bw_support(adapter, in_bw)) ++ rtw_warn_on(1); + +- rtw_ps_deny(adapter, PS_DENY_IOCTL); ++ return in_bw; ++} + +- LeaveAllPowerSaveModeDirect(adapter); ++#ifdef CONFIG_ANTENNA_DIVERSITY ++u8 rtw_hal_antdiv_before_linked(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 cur_ant, change_ant; + +- if( isOutput ) +- { +- rtw_write8(adapter, REG_GPIO_PIN_CTRL + 2, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 2) | BIT(gpio_num)); +- } +- else +- { +- rtw_write8(adapter, REG_GPIO_PIN_CTRL + 2, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 2) & ~BIT(gpio_num)); +- } ++ if (!pHalData->AntDivCfg) ++ return _FALSE; + +- rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); ++ if (pHalData->sw_antdiv_bl_state == 0) { ++ pHalData->sw_antdiv_bl_state = 1; + +- return 0; ++ rtw_hal_get_odm_var(padapter, HAL_ODM_ANTDIV_SELECT, &cur_ant, NULL); ++ change_ant = (cur_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT; ++ ++ return rtw_antenna_select_cmd(padapter, change_ant, _FALSE); ++ } ++ ++ pHalData->sw_antdiv_bl_state = 0; ++ return _FALSE; + } + ++void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (pHalData->AntDivCfg) { ++ /*DBG_871X("update_network=> org-RSSI(%d), new-RSSI(%d)\n", dst->Rssi, src->Rssi);*/ ++ /*select optimum_antenna for before linked =>For antenna diversity*/ ++ if (dst->Rssi >= src->Rssi) {/*keep org parameter*/ ++ src->Rssi = dst->Rssi; ++ src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; ++ } ++ } ++} + #endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com_c2h.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com_c2h.h +new file mode 100644 +index 0000000..b8138b8 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com_c2h.h +@@ -0,0 +1,51 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __COMMON_C2H_H__ ++#define __COMMON_C2H_H__ ++ ++typedef enum _C2H_EVT { ++ C2H_DBG = 0x00, ++ C2H_LB = 0x01, ++ C2H_TXBF = 0x02, ++ C2H_CCX_TX_RPT = 0x03, ++ C2H_BT_INFO = 0x09, ++ C2H_BT_MP_INFO = 0x0B, ++ C2H_RA_RPT = 0x0C, ++ C2H_RA_PARA_RPT = 0x0E, ++ C2H_FW_CHNL_SWITCH_COMPLETE = 0x10, ++ C2H_IQK_FINISH = 0x11, ++ C2H_MAILBOX_STATUS = 0x15, ++ C2H_P2P_RPORT = 0x16, ++ C2H_MAC_HIDDEN_RPT = 0x19, ++ C2H_BCN_EARLY_RPT = 0x1E, ++ C2H_BT_SCOREBOARD_STATUS = 0x20, ++ C2H_EXTEND = 0xff, ++} C2H_EVT; ++ ++typedef enum _EXTEND_C2H_EVT { ++ EXTEND_C2H_DBG_PRINT = 0 ++} EXTEND_C2H_EVT; ++ ++#define MAC_HIDDEN_RPT_LEN 8 ++int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len); ++int hal_read_mac_hidden_rpt(_adapter *adapter); ++ ++#endif /* __COMMON_C2H_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com_phycfg.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com_phycfg.c +old mode 100755 +new mode 100644 +index 4866324..46dd27a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com_phycfg.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com_phycfg.c +@@ -22,50 +22,96 @@ + #include + #include + +- +-// +-// Description: +-// Map Tx power index into dBm according to +-// current HW model, for example, RF and PA, and +-// current wireless mode. +-// By Bruce, 2008-01-29. +-// +-s32 +-phy_TxPwrIdxToDbm( ++/* ++* rtw_regsty_get_target_tx_power - ++* ++* Return dBm or -1 for undefined ++*/ ++s8 rtw_regsty_get_target_tx_power( + IN PADAPTER Adapter, +- IN WIRELESS_MODE WirelessMode, +- IN u8 TxPwrIdx ++ IN u8 Band, ++ IN u8 RfPath, ++ IN RATE_SECTION RateSection + ) + { +- s32 Offset = 0; +- s32 PwrOutDbm = 0; +- +- // +- // Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. +- // Note: +- // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. +- // By Bruce, 2008-01-29. +- // +- switch(WirelessMode) +- { +- case WIRELESS_MODE_B: +- Offset = -7; +- break; ++ struct registry_priv *regsty = adapter_to_regsty(Adapter); ++ s8 value = 0; ++ ++ if (RfPath > RF_PATH_D) { ++ DBG_871X_LEVEL(_drv_always_, "%s invalid RfPath:%d\n", __func__, RfPath); ++ return -1; ++ } ++ ++ if (Band != BAND_ON_2_4G ++ #ifdef CONFIG_IEEE80211_BAND_5GHZ ++ && Band != BAND_ON_5G ++ #endif ++ ) { ++ DBG_871X_LEVEL(_drv_always_, "%s invalid Band:%d\n", __func__, Band); ++ return -1; ++ } ++ ++ if (RateSection >= RATE_SECTION_NUM ++ #ifdef CONFIG_IEEE80211_BAND_5GHZ ++ || (Band == BAND_ON_5G && RateSection == CCK) ++ #endif ++ ) { ++ DBG_871X_LEVEL(_drv_always_, "%s invalid RateSection:%d in %sG, RfPath:%d\n", __func__ ++ , RateSection, (Band == BAND_ON_2_4G) ? "2.4" : "5", RfPath); ++ return -1; ++ } ++ ++ if (Band == BAND_ON_2_4G) ++ value = regsty->target_tx_pwr_2g[RfPath][RateSection]; ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++ else /* BAND_ON_5G */ ++ value = regsty->target_tx_pwr_5g[RfPath][RateSection - 1]; ++#endif + +- case WIRELESS_MODE_G: +- case WIRELESS_MODE_N_24G: +- Offset = -8; +- break; +- +- default: //for MacOSX compiler warning +- break; +- } ++ return value; ++} ++ ++bool rtw_regsty_chk_target_tx_power_valid(_adapter *adapter) ++{ ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ int path, tx_num, band, rs; ++ s8 target; ++ ++ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { ++ if (!hal_is_band_support(adapter, band)) ++ continue; ++ ++ for (path = 0; path < RF_PATH_MAX; path++) { ++ if (path >= hal_data->NumTotalRFPath) ++ break; ++ ++ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { ++ tx_num = rate_section_to_tx_num(rs); ++ if (tx_num >= hal_spec->nss_num) ++ continue; ++ ++ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) ++ continue; ++ ++ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) ++ continue; + +- PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part. ++ target = rtw_regsty_get_target_tx_power(adapter, band, path, rs); ++ if (target == -1) ++ return _FALSE; ++ } ++ } ++ } + +- return PwrOutDbm; ++ return _TRUE; + } + ++/* ++* PHY_GetTxPowerByRateBase - ++* ++* Return 2 times of dBm ++*/ + u8 + PHY_GetTxPowerByRateBase( + IN PADAPTER Adapter, +@@ -75,96 +121,32 @@ PHY_GetTxPowerByRateBase( + IN RATE_SECTION RateSection + ) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- u8 value = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 value = 0; + +- if ( RfPath > ODM_RF_PATH_D ) +- { +- DBG_871X("Invalid Rf Path %d in PHY_GetTxPowerByRateBase()\n", RfPath ); ++ if (RfPath > RF_PATH_D) { ++ DBG_871X_LEVEL(_drv_always_, "%s invalid RfPath:%d\n", __func__, RfPath); + return 0; + } +- +- if ( Band == BAND_ON_2_4G ) +- { +- switch ( RateSection ) { +- case CCK: +- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0]; +- break; +- case OFDM: +- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1]; +- break; +- case HT_MCS0_MCS7: +- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2]; +- break; +- case HT_MCS8_MCS15: +- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3]; +- break; +- case HT_MCS16_MCS23: +- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4]; +- break; +- case HT_MCS24_MCS31: +- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5]; +- break; +- case VHT_1SSMCS0_1SSMCS9: +- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][6]; +- break; +- case VHT_2SSMCS0_2SSMCS9: +- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][7]; +- break; +- case VHT_3SSMCS0_3SSMCS9: +- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][8]; +- break; +- case VHT_4SSMCS0_4SSMCS9: +- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][9]; +- break; +- default: +- DBG_871X("Invalid RateSection %d in Band 2.4G, Rf Path %d, %dTx in PHY_GetTxPowerByRateBase()\n", +- RateSection, RfPath, TxNum ); +- break; +- +- }; +- } +- else if ( Band == BAND_ON_5G ) +- { +- switch ( RateSection ) { +- case OFDM: +- value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][0]; +- break; +- case HT_MCS0_MCS7: +- value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][1]; +- break; +- case HT_MCS8_MCS15: +- value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][2]; +- break; +- case HT_MCS16_MCS23: +- value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][3]; +- break; +- case HT_MCS24_MCS31: +- value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][4]; +- break; +- case VHT_1SSMCS0_1SSMCS9: +- value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][5]; +- break; +- case VHT_2SSMCS0_2SSMCS9: +- value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][6]; +- break; +- case VHT_3SSMCS0_3SSMCS9: +- value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][7]; +- break; +- case VHT_4SSMCS0_4SSMCS9: +- value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][8]; +- break; +- default: +- DBG_871X("Invalid RateSection %d in Band 5G, Rf Path %d, %dTx in PHY_GetTxPowerByRateBase()\n", +- RateSection, RfPath, TxNum ); +- break; +- }; ++ ++ if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) { ++ DBG_871X_LEVEL(_drv_always_, "%s invalid Band:%d\n", __func__, Band); ++ return 0; + } +- else +- { +- DBG_871X("Invalid Band %d in PHY_GetTxPowerByRateBase()\n", Band ); ++ ++ if (RateSection >= RATE_SECTION_NUM ++ || (Band == BAND_ON_5G && RateSection == CCK) ++ ) { ++ DBG_871X_LEVEL(_drv_always_, "%s invalid RateSection:%d in %sG, RfPath:%d, TxNum:%d\n", __func__ ++ , RateSection, (Band == BAND_ON_2_4G) ? "2.4" : "5", RfPath, TxNum); ++ return 0; + } + ++ if (Band == BAND_ON_2_4G) ++ value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][RateSection]; ++ else /* BAND_ON_5G */ ++ value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][RateSection - 1]; ++ + return value; + } + +@@ -178,95 +160,56 @@ phy_SetTxPowerByRateBase( + IN u8 Value + ) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + +- if ( RfPath > ODM_RF_PATH_D ) +- { +- DBG_871X("Invalid Rf Path %d in phy_SetTxPowerByRatBase()\n", RfPath ); ++ if (RfPath > RF_PATH_D) { ++ DBG_871X_LEVEL(_drv_always_, "%s invalid RfPath:%d\n", __func__, RfPath); + return; + } +- +- if ( Band == BAND_ON_2_4G ) +- { +- switch ( RateSection ) { +- case CCK: +- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0] = Value; +- break; +- case OFDM: +- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1] = Value; +- break; +- case HT_MCS0_MCS7: +- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2] = Value; +- break; +- case HT_MCS8_MCS15: +- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3] = Value; +- break; +- case HT_MCS16_MCS23: +- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4] = Value; +- break; +- case HT_MCS24_MCS31: +- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5] = Value; +- break; +- case VHT_1SSMCS0_1SSMCS9: +- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][6] = Value; +- break; +- case VHT_2SSMCS0_2SSMCS9: +- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][7] = Value; +- break; +- case VHT_3SSMCS0_3SSMCS9: +- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][8] = Value; +- break; +- case VHT_4SSMCS0_4SSMCS9: +- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][9] = Value; +- break; +- default: +- DBG_871X("Invalid RateSection %d in Band 2.4G, Rf Path %d, %dTx in phy_SetTxPowerByRateBase()\n", +- RateSection, RfPath, TxNum ); +- break; +- }; ++ ++ if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) { ++ DBG_871X_LEVEL(_drv_always_, "%s invalid Band:%d\n", __func__, Band); ++ return; + } +- else if ( Band == BAND_ON_5G ) +- { +- switch ( RateSection ) { +- case OFDM: +- pHalData->TxPwrByRateBase5G[RfPath][TxNum][0] = Value; +- break; +- case HT_MCS0_MCS7: +- pHalData->TxPwrByRateBase5G[RfPath][TxNum][1] = Value; +- break; +- case HT_MCS8_MCS15: +- pHalData->TxPwrByRateBase5G[RfPath][TxNum][2] = Value; +- break; +- case HT_MCS16_MCS23: +- pHalData->TxPwrByRateBase5G[RfPath][TxNum][3] = Value; +- break; +- case HT_MCS24_MCS31: +- pHalData->TxPwrByRateBase5G[RfPath][TxNum][4] = Value; +- break; +- case VHT_1SSMCS0_1SSMCS9: +- pHalData->TxPwrByRateBase5G[RfPath][TxNum][5] = Value; +- break; +- case VHT_2SSMCS0_2SSMCS9: +- pHalData->TxPwrByRateBase5G[RfPath][TxNum][6] = Value; +- break; +- case VHT_3SSMCS0_3SSMCS9: +- pHalData->TxPwrByRateBase5G[RfPath][TxNum][7] = Value; +- break; +- case VHT_4SSMCS0_4SSMCS9: +- pHalData->TxPwrByRateBase5G[RfPath][TxNum][8] = Value; +- break; +- default: +- DBG_871X("Invalid RateSection %d in Band 5G, Rf Path %d, %dTx in phy_SetTxPowerByRateBase()\n", +- RateSection, RfPath, TxNum ); +- break; +- }; ++ ++ if (RateSection >= RATE_SECTION_NUM ++ || (Band == BAND_ON_5G && RateSection == CCK) ++ ) { ++ DBG_871X_LEVEL(_drv_always_, "%s invalid RateSection:%d in %sG, RfPath:%d, TxNum:%d\n", __func__ ++ , RateSection, (Band == BAND_ON_2_4G) ? "2.4" : "5", RfPath, TxNum); ++ return; + } ++ ++ if (Band == BAND_ON_2_4G) ++ pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][RateSection] = Value; ++ else /* BAND_ON_5G */ ++ pHalData->TxPwrByRateBase5G[RfPath][TxNum][RateSection - 1] = Value; ++} ++ ++/* ++* phy_get_target_tx_power - ++* ++* Return 2 times of dBm ++*/ ++u8 phy_get_target_tx_power( ++ IN PADAPTER Adapter, ++ IN u8 Band, ++ IN u8 RfPath, ++ IN RATE_SECTION RateSection ++ ) ++{ ++ struct registry_priv *regsty = adapter_to_regsty(Adapter); ++ s16 target_power; ++ ++ if (phy_is_tx_power_by_rate_needed(Adapter) == _FALSE && regsty->target_tx_pwr_valid == _TRUE) ++ target_power = 2 * rtw_regsty_get_target_tx_power(Adapter, Band, RfPath, RateSection); + else +- { +- DBG_871X("Invalid Band %d in phy_SetTxPowerByRateBase()\n", Band ); +- } ++ target_power = PHY_GetTxPowerByRateBase(Adapter, Band, RfPath, rate_section_to_tx_num(RateSection), RateSection); ++ ++ return target_power; + } + ++#ifdef TX_POWER_BY_RATE_OLD + VOID + phy_StoreTxPowerByRateBaseOld( + IN PADAPTER pAdapter +@@ -309,82 +252,54 @@ phy_StoreTxPowerByRateBaseOld( + base = ( rawValue >> 4 ) * 10 + ( rawValue & 0xF ); + phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_B, HT_MCS8_MCS15, RF_2TX, base ); + } ++#endif /* TX_POWER_BY_RATE_OLD */ + + VOID + phy_StoreTxPowerByRateBase( + IN PADAPTER pAdapter + ) + { +- u8 path = 0, base = 0, index = 0; +- +- //DBG_871X( "===>%s\n", __FUNCTION__ ); +- +- for ( path = ODM_RF_PATH_A; path <= ODM_RF_PATH_B; ++path ) +- { +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_1TX, MGN_11M ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, CCK, RF_1TX, base ); +- //DBG_871X("Power index base of 2.4G path %d 1Tx CCK = > 0x%x\n", path, base ); +- +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_1TX, MGN_54M ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, OFDM, RF_1TX, base ); +- //DBG_871X("Power index base of 2.4G path %d 1Tx OFDM = > 0x%x\n", path, base ); +- +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_1TX, MGN_MCS7 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, HT_MCS0_MCS7, RF_1TX, base ); +- //DBG_871X("Power index base of 2.4G path %d 1Tx MCS0-7 = > 0x%x\n", path, base ); +- +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_2TX, MGN_MCS15 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, HT_MCS8_MCS15, RF_2TX, base ); +- //DBG_871X("Power index base of 2.4G path %d 2Tx MCS8-15 = > 0x%x\n", path, base ); +- +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_3TX, MGN_MCS23 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, HT_MCS16_MCS23, RF_3TX, base ); +- //DBG_871X("Power index base of 2.4G path %d 3Tx MCS16-23 = > 0x%x\n", path, base ); +- +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_1TX, MGN_VHT1SS_MCS7 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, VHT_1SSMCS0_1SSMCS9, RF_1TX, base ); +- //DBG_871X("Power index base of 2.4G path %d 1Tx VHT1SS = > 0x%x\n", path, base ); +- +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_2TX, MGN_VHT2SS_MCS7 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, VHT_2SSMCS0_2SSMCS9, RF_2TX, base ); +- //DBG_871X("Power index base of 2.4G path %d 2Tx VHT2SS = > 0x%x\n", path, base ); +- +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_3TX, MGN_VHT3SS_MCS7 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, VHT_3SSMCS0_3SSMCS9, RF_3TX, base ); +- //DBG_871X("Power index base of 2.4G path %d 3Tx VHT3SS = > 0x%x\n", path, base ); +- +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_1TX, MGN_54M ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, OFDM, RF_1TX, base ); +- //DBG_871X("Power index base of 5G path %d 1Tx OFDM = > 0x%x\n", path, base ); ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter); ++ ++ u8 rate_sec_base[RATE_SECTION_NUM] = { ++ MGN_11M, ++ MGN_54M, ++ MGN_MCS7, ++ MGN_MCS15, ++ MGN_MCS23, ++ MGN_MCS31, ++ MGN_VHT1SS_MCS7, ++ MGN_VHT2SS_MCS7, ++ MGN_VHT3SS_MCS7, ++ MGN_VHT4SS_MCS7, ++ }; + +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_1TX, MGN_MCS7 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, HT_MCS0_MCS7, RF_1TX, base ); +- //DBG_871X("Power index base of 5G path %d 1Tx MCS0~7 = > 0x%x\n", path, base ); ++ u8 band, path, rs, tx_num, base, index; + +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_2TX, MGN_MCS15 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, HT_MCS8_MCS15, RF_2TX, base ); +- //DBG_871X("Power index base of 5G path %d 2Tx MCS8~15 = > 0x%x\n", path, base ); ++ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { + +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_3TX, MGN_MCS23 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, HT_MCS16_MCS23, RF_3TX, base ); +- //DBG_871X("Power index base of 5G path %d 3Tx MCS16~23 = > 0x%x\n", path, base ); ++ for (path = RF_PATH_A; path < RF_PATH_MAX; path++) { ++ /* TODO: 8814A's NumTotalRFPath differs at probe(3) and up(4), need fixed ++ if (path >= hal_data->NumTotalRFPath) ++ break; ++ */ + +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_1TX, MGN_VHT1SS_MCS7 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, VHT_1SSMCS0_1SSMCS9, RF_1TX, base ); +- //DBG_871X("Power index base of 5G path %d 1Tx VHT1SS = > 0x%x\n", path, base ); ++ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { ++ tx_num = rate_section_to_tx_num(rs); ++ if (tx_num >= hal_spec->nss_num) ++ continue; + +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_2TX, MGN_VHT2SS_MCS7 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, VHT_2SSMCS0_2SSMCS9, RF_2TX, base ); +- //DBG_871X("Power index base of 5G path %d 2Tx VHT2SS = > 0x%x\n", path, base ); ++ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) ++ continue; + +- base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_3TX, MGN_VHT2SS_MCS7 ); +- phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, VHT_3SSMCS0_3SSMCS9, RF_3TX, base ); +- //DBG_871X("Power index base of 5G path %d 3Tx VHT3SS = > 0x%x\n", path, base ); ++ base = _PHY_GetTxPowerByRate(pAdapter, band, path, tx_num, rate_sec_base[rs]); ++ phy_SetTxPowerByRateBase(pAdapter, band, path, rs, tx_num, base); ++ } ++ } + } +- +- //DBG_871X("<===%s\n", __FUNCTION__ ); + } + ++#ifdef TX_POWER_BY_RATE_OLD + u8 + PHY_GetRateSectionIndexOfTxPowerByRate( + IN PADAPTER pAdapter, +@@ -429,16 +344,17 @@ PHY_GetRateSectionIndexOfTxPowerByRate( + + return index; + } ++#endif /* TX_POWER_BY_RATE_OLD */ + + VOID + PHY_GetRateValuesOfTxPowerByRate( +- IN PADAPTER pAdapter, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Value, +- OUT u8* RateIndex, +- OUT s8* PwrByRateVal, +- OUT u8* RateNum ++ IN PADAPTER pAdapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Value, ++ OUT u8 *Rate, ++ OUT s8 *PwrByRateVal, ++ OUT u8 *RateNum + ) + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA( pAdapter ); +@@ -449,10 +365,10 @@ PHY_GetRateValuesOfTxPowerByRate( + { + case rTxAGC_A_Rate18_06: + case rTxAGC_B_Rate18_06: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_6M ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_9M ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_12M ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_18M ); ++ Rate[0] = MGN_6M; ++ Rate[1] = MGN_9M; ++ Rate[2] = MGN_12M; ++ Rate[3] = MGN_18M; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -463,10 +379,10 @@ PHY_GetRateValuesOfTxPowerByRate( + + case rTxAGC_A_Rate54_24: + case rTxAGC_B_Rate54_24: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_24M ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_36M ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_48M ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_54M ); ++ Rate[0] = MGN_24M; ++ Rate[1] = MGN_36M; ++ Rate[2] = MGN_48M; ++ Rate[3] = MGN_54M; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -476,7 +392,7 @@ PHY_GetRateValuesOfTxPowerByRate( + break; + + case rTxAGC_A_CCK1_Mcs32: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_1M ); ++ Rate[0] = MGN_1M; + PwrByRateVal[0] = ( s8 ) ( ( ( ( Value >> (8 + 4) ) & 0xF ) ) * 10 + + ( ( Value >> 8 ) & 0xF ) ); + *RateNum = 1; +@@ -485,9 +401,9 @@ PHY_GetRateValuesOfTxPowerByRate( + case rTxAGC_B_CCK11_A_CCK2_11: + if ( BitMask == 0xffffff00 ) + { +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_2M ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_5_5M ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_11M ); ++ Rate[0] = MGN_2M; ++ Rate[1] = MGN_5_5M; ++ Rate[2] = MGN_11M; + for ( i = 1; i < 4; ++ i ) + { + PwrByRateVal[i - 1] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -497,7 +413,7 @@ PHY_GetRateValuesOfTxPowerByRate( + } + else if ( BitMask == 0x000000ff ) + { +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_11M ); ++ Rate[0] = MGN_11M; + PwrByRateVal[0] = ( s8 ) ( ( ( ( Value >> 4 ) & 0xF ) ) * 10 + + ( Value & 0xF ) ); + *RateNum = 1; +@@ -506,10 +422,10 @@ PHY_GetRateValuesOfTxPowerByRate( + + case rTxAGC_A_Mcs03_Mcs00: + case rTxAGC_B_Mcs03_Mcs00: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS0 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS1 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS2 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS3 ); ++ Rate[0] = MGN_MCS0; ++ Rate[1] = MGN_MCS1; ++ Rate[2] = MGN_MCS2; ++ Rate[3] = MGN_MCS3; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -520,10 +436,10 @@ PHY_GetRateValuesOfTxPowerByRate( + + case rTxAGC_A_Mcs07_Mcs04: + case rTxAGC_B_Mcs07_Mcs04: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS4 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS5 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS6 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS7 ); ++ Rate[0] = MGN_MCS4; ++ Rate[1] = MGN_MCS5; ++ Rate[2] = MGN_MCS6; ++ Rate[3] = MGN_MCS7; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -534,10 +450,10 @@ PHY_GetRateValuesOfTxPowerByRate( + + case rTxAGC_A_Mcs11_Mcs08: + case rTxAGC_B_Mcs11_Mcs08: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS8 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS9 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS10 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS11 ); ++ Rate[0] = MGN_MCS8; ++ Rate[1] = MGN_MCS9; ++ Rate[2] = MGN_MCS10; ++ Rate[3] = MGN_MCS11; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -548,10 +464,10 @@ PHY_GetRateValuesOfTxPowerByRate( + + case rTxAGC_A_Mcs15_Mcs12: + case rTxAGC_B_Mcs15_Mcs12: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS12 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS13 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS14 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS15 ); ++ Rate[0] = MGN_MCS12; ++ Rate[1] = MGN_MCS13; ++ Rate[2] = MGN_MCS14; ++ Rate[3] = MGN_MCS15; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -562,9 +478,9 @@ PHY_GetRateValuesOfTxPowerByRate( + break; + + case rTxAGC_B_CCK1_55_Mcs32: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_1M ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_2M ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_5_5M ); ++ Rate[0] = MGN_1M; ++ Rate[1] = MGN_2M; ++ Rate[2] = MGN_5_5M; + for ( i = 1; i < 4; ++ i ) + { + PwrByRateVal[i - 1] = ( s8 ) ( ( ( ( Value >> ( i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -577,10 +493,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE20: + case 0x1820: + case 0x1a20: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_1M ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_2M ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_5_5M ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_11M ); ++ Rate[0] = MGN_1M; ++ Rate[1] = MGN_2M; ++ Rate[2] = MGN_5_5M; ++ Rate[3] = MGN_11M; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -593,10 +509,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE24: + case 0x1824: + case 0x1a24: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_6M ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_9M ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_12M ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_18M ); ++ Rate[0] = MGN_6M; ++ Rate[1] = MGN_9M; ++ Rate[2] = MGN_12M; ++ Rate[3] = MGN_18M; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -609,10 +525,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE28: + case 0x1828: + case 0x1a28: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_24M ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_36M ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_48M ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_54M ); ++ Rate[0] = MGN_24M; ++ Rate[1] = MGN_36M; ++ Rate[2] = MGN_48M; ++ Rate[3] = MGN_54M; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -625,10 +541,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE2C: + case 0x182C: + case 0x1a2C: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS0 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS1 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS2 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS3 ); ++ Rate[0] = MGN_MCS0; ++ Rate[1] = MGN_MCS1; ++ Rate[2] = MGN_MCS2; ++ Rate[3] = MGN_MCS3; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -641,10 +557,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE30: + case 0x1830: + case 0x1a30: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS4 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS5 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS6 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS7 ); ++ Rate[0] = MGN_MCS4; ++ Rate[1] = MGN_MCS5; ++ Rate[2] = MGN_MCS6; ++ Rate[3] = MGN_MCS7; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -657,10 +573,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE34: + case 0x1834: + case 0x1a34: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS8 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS9 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS10 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS11 ); ++ Rate[0] = MGN_MCS8; ++ Rate[1] = MGN_MCS9; ++ Rate[2] = MGN_MCS10; ++ Rate[3] = MGN_MCS11; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -673,10 +589,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE38: + case 0x1838: + case 0x1a38: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS12 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS13 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS14 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS15 ); ++ Rate[0] = MGN_MCS12; ++ Rate[1] = MGN_MCS13; ++ Rate[2] = MGN_MCS14; ++ Rate[3] = MGN_MCS15; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -689,10 +605,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE3C: + case 0x183C: + case 0x1a3C: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS0 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS1 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS2 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS3 ); ++ Rate[0] = MGN_VHT1SS_MCS0; ++ Rate[1] = MGN_VHT1SS_MCS1; ++ Rate[2] = MGN_VHT1SS_MCS2; ++ Rate[3] = MGN_VHT1SS_MCS3; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -705,10 +621,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE40: + case 0x1840: + case 0x1a40: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS4 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS5 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS6 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS7 ); ++ Rate[0] = MGN_VHT1SS_MCS4; ++ Rate[1] = MGN_VHT1SS_MCS5; ++ Rate[2] = MGN_VHT1SS_MCS6; ++ Rate[3] = MGN_VHT1SS_MCS7; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -721,10 +637,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE44: + case 0x1844: + case 0x1a44: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS8 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS9 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS0 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS1 ); ++ Rate[0] = MGN_VHT1SS_MCS8; ++ Rate[1] = MGN_VHT1SS_MCS9; ++ Rate[2] = MGN_VHT2SS_MCS0; ++ Rate[3] = MGN_VHT2SS_MCS1; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -737,10 +653,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE48: + case 0x1848: + case 0x1a48: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS2 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS3 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS4 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS5 ); ++ Rate[0] = MGN_VHT2SS_MCS2; ++ Rate[1] = MGN_VHT2SS_MCS3; ++ Rate[2] = MGN_VHT2SS_MCS4; ++ Rate[3] = MGN_VHT2SS_MCS5; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -753,10 +669,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xE4C: + case 0x184C: + case 0x1a4C: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS6 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS7 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS8 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS9 ); ++ Rate[0] = MGN_VHT2SS_MCS6; ++ Rate[1] = MGN_VHT2SS_MCS7; ++ Rate[2] = MGN_VHT2SS_MCS8; ++ Rate[3] = MGN_VHT2SS_MCS9; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -769,10 +685,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xED8: + case 0x18D8: + case 0x1aD8: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS16 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS17 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS18 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS19 ); ++ Rate[0] = MGN_MCS16; ++ Rate[1] = MGN_MCS17; ++ Rate[2] = MGN_MCS18; ++ Rate[3] = MGN_MCS19; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -785,10 +701,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xEDC: + case 0x18DC: + case 0x1aDC: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS20 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS21 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS22 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS23 ); ++ Rate[0] = MGN_MCS20; ++ Rate[1] = MGN_MCS21; ++ Rate[2] = MGN_MCS22; ++ Rate[3] = MGN_MCS23; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -801,10 +717,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xEE0: + case 0x18E0: + case 0x1aE0: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS0 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS1 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS2 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS3 ); ++ Rate[0] = MGN_VHT3SS_MCS0; ++ Rate[1] = MGN_VHT3SS_MCS1; ++ Rate[2] = MGN_VHT3SS_MCS2; ++ Rate[3] = MGN_VHT3SS_MCS3; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -817,10 +733,10 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xEE4: + case 0x18E4: + case 0x1aE4: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS4 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS5 ); +- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS6 ); +- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS7 ); ++ Rate[0] = MGN_VHT3SS_MCS4; ++ Rate[1] = MGN_VHT3SS_MCS5; ++ Rate[2] = MGN_VHT3SS_MCS6; ++ Rate[3] = MGN_VHT3SS_MCS7; + for ( i = 0; i < 4; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + +@@ -833,18 +749,18 @@ PHY_GetRateValuesOfTxPowerByRate( + case 0xEE8: + case 0x18E8: + case 0x1aE8: +- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS8 ); +- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS9 ); ++ Rate[0] = MGN_VHT3SS_MCS8; ++ Rate[1] = MGN_VHT3SS_MCS9; + for ( i = 0; i < 2; ++ i ) + { + PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + + ( ( Value >> (i * 8) ) & 0xF ) ); + } +- *RateNum = 4; ++ *RateNum = 2; + break; + + default: +- DBG_871X("Invalid RegAddr 0x%x in %s()\n", RegAddr, __FUNCTION__); ++ DBG_871X_LEVEL(_drv_always_, "Invalid RegAddr 0x%x in %s()\n", RegAddr, __func__); + break; + }; + } +@@ -860,42 +776,44 @@ PHY_StoreTxPowerByRateNew( + IN u32 Data + ) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +- u8 i = 0, rateIndex[4] = {0}, rateNum = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 i = 0, rates[4] = {0}, rateNum = 0; + s8 PwrByRateVal[4] = {0}; + +- PHY_GetRateValuesOfTxPowerByRate( pAdapter, RegAddr, BitMask, Data, rateIndex, PwrByRateVal, &rateNum ); ++ PHY_GetRateValuesOfTxPowerByRate(pAdapter, RegAddr, BitMask, Data, rates, PwrByRateVal, &rateNum); + +- if ( Band != BAND_ON_2_4G && Band != BAND_ON_5G ) +- { +- DBG_871X("Invalid Band %d\n", Band ); ++ if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) { ++ DBG_871X_LEVEL(_drv_always_, "Invalid Band %d\n", Band); + return; + } + +- if ( RfPath > ODM_RF_PATH_D ) +- { +- DBG_871X("Invalid RfPath %d\n", RfPath ); ++ if (RfPath > ODM_RF_PATH_D) { ++ DBG_871X_LEVEL(_drv_always_, "Invalid RfPath %d\n", RfPath); + return; + } + +- if ( TxNum > ODM_RF_PATH_D ) +- { +- DBG_871X("Invalid TxNum %d\n", TxNum ); ++ if (TxNum > ODM_RF_PATH_D) { ++ DBG_871X_LEVEL(_drv_always_, "Invalid TxNum %d\n", TxNum); + return; + } + +- for ( i = 0; i < rateNum; ++i ) +- { +- if ( rateIndex[i] == PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS0) || +- rateIndex[i] == PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS1) ) +- { +- TxNum = RF_2TX; +- } +- +- pHalData->TxPwrByRateOffset[Band][RfPath][TxNum][rateIndex[i]] = PwrByRateVal[i]; ++ for (i = 0; i < rateNum; ++i) { ++ u8 rate_idx = PHY_GetRateIndexOfTxPowerByRate(rates[i]); ++ ++ if (IS_1T_RATE(rates[i])) ++ pHalData->TxPwrByRateOffset[Band][RfPath][RF_1TX][rate_idx] = PwrByRateVal[i]; ++ else if (IS_2T_RATE(rates[i])) ++ pHalData->TxPwrByRateOffset[Band][RfPath][RF_2TX][rate_idx] = PwrByRateVal[i]; ++ else if (IS_3T_RATE(rates[i])) ++ pHalData->TxPwrByRateOffset[Band][RfPath][RF_3TX][rate_idx] = PwrByRateVal[i]; ++ else if (IS_4T_RATE(rates[i])) ++ pHalData->TxPwrByRateOffset[Band][RfPath][RF_4TX][rate_idx] = PwrByRateVal[i]; ++ else ++ rtw_warn_on(1); + } + } + ++#ifdef TX_POWER_BY_RATE_OLD + void + PHY_StoreTxPowerByRateOld( + IN PADAPTER pAdapter, +@@ -911,6 +829,7 @@ PHY_StoreTxPowerByRateOld( + //DBG_871X("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0]); + } ++#endif /* TX_POWER_BY_RATE_OLD */ + + VOID + PHY_InitTxPowerByRate( +@@ -920,7 +839,7 @@ PHY_InitTxPowerByRate( + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u8 band = 0, rfPath = 0, TxNum = 0, rate = 0, i = 0, j = 0; + +- if ( IS_HARDWARE_TYPE_8188E( pAdapter ) || IS_HARDWARE_TYPE_8723A( pAdapter ) ) ++ if ( IS_HARDWARE_TYPE_8188E( pAdapter ) ) + { + for ( i = 0; i < MAX_PG_GROUP; ++i ) + for ( j = 0; j < 16; ++j ) +@@ -954,6 +873,7 @@ PHY_StoreTxPowerByRate( + { + PHY_StoreTxPowerByRateNew( pAdapter, Band, RfPath, TxNum, RegAddr, BitMask, Data ); + } ++#ifdef TX_POWER_BY_RATE_OLD + else if ( pDM_Odm->PhyRegPgVersion == 0 ) + { + PHY_StoreTxPowerByRateOld( pAdapter, RegAddr, BitMask, Data ); +@@ -963,11 +883,13 @@ PHY_StoreTxPowerByRate( + else if ( RegAddr == rTxAGC_B_Mcs15_Mcs12 && pHalData->rf_type != RF_1T1R ) + pHalData->pwrGroupCnt++; + } ++#endif + else + DBG_871X("Invalid PHY_REG_PG.txt version %d\n", pDM_Odm->PhyRegPgVersion ); + + } + ++#ifdef TX_POWER_BY_RATE_OLD + VOID + phy_ConvertTxPowerByRateByBase( + IN u32* pData, +@@ -1072,6 +994,7 @@ PHY_ConvertTxPowerByRateInDbmToRelativeValuesOld( + + //DBG_871X("<===PHY_ConvertTxPowerByRateInDbmToRelativeValuesOld()\n" ); + } ++#endif /* TX_POWER_BY_RATE_OLD */ + + VOID + phy_ConvertTxPowerByRateInDbmToRelativeValues( +@@ -1284,25 +1207,17 @@ phy_GetChnlIndex( + OUT u8* ChannelIdx + ) + { +- u8 channel5G[CHANNEL_MAX_NUMBER_5G] = +- {36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112, +- 114,116,118,120,122,124,126,128,130,132,134,136,138,140,142,144,149,151, +- 153,155,157,159,161,163,165,167,168,169,171,173,175,177}; + u8 i = 0; + BOOLEAN bIn24G=_TRUE; + +- if(Channel <= 14) +- { +- bIn24G=_TRUE; +- *ChannelIdx = Channel -1; +- } +- else +- { ++ if (Channel <= 14) { ++ bIn24G = _TRUE; ++ *ChannelIdx = Channel - 1; ++ } else { + bIn24G = _FALSE; + +- for (i = 0; i < sizeof(channel5G)/sizeof(u8); ++i) +- { +- if ( channel5G[i] == Channel) { ++ for (i = 0; i < CENTER_CH_5G_ALL_NUM; ++i) { ++ if (center_ch_5g_all[i] == Channel) { + *ChannelIdx = i; + return bIn24G; + } +@@ -1468,9 +1383,8 @@ PHY_GetTxPowerIndexBase( + else if (BandWidth== CHANNEL_WIDTH_80) + { + // <20121220, Kordan> Get the index of array "Index5G_BW80_Base". +- u8 channel5G_80M[CHANNEL_MAX_NUMBER_5G_80M] = {42, 58, 106, 122, 138, 155, 171}; +- for (i = 0; i < sizeof(channel5G_80M)/sizeof(u8); ++i) +- if ( channel5G_80M[i] == Channel) ++ for (i = 0; i < CENTER_CH_5G_80M_NUM; ++i) ++ if (center_ch_5g_80m[i] == Channel) + chnlIdx = i; + + txPower = pHalData->Index5G_BW80_Base[RFPath][chnlIdx]; +@@ -1509,13 +1423,13 @@ PHY_GetTxPowerTrackingOffset( + + if ((Rate == MGN_1M) ||(Rate == MGN_2M)||(Rate == MGN_5_5M)||(Rate == MGN_11M)) + { +- offset = pDM_Odm->Remnant_CCKSwingIdx; +- //DBG_871X("+Remnant_CCKSwingIdx = 0x%x\n", RFPath, Rate, pDM_Odm->Remnant_CCKSwingIdx); ++ offset = pDM_Odm->RFCalibrateInfo.Remnant_CCKSwingIdx; ++ /*DBG_871X("+Remnant_CCKSwingIdx = 0x%x\n", RFPath, Rate, pRFCalibrateInfo->Remnant_CCKSwingIdx);*/ + } + else + { +- offset = pDM_Odm->Remnant_OFDMSwingIdx[RFPath]; +- //DBG_871X("+Remanant_OFDMSwingIdx[RFPath %u][Rate 0x%x] = 0x%x\n", RFPath, Rate, pDM_Odm->Remnant_OFDMSwingIdx[RFPath]); ++ offset = pDM_Odm->RFCalibrateInfo.Remnant_OFDMSwingIdx[RFPath]; ++ /*DBG_871X("+Remanant_OFDMSwingIdx[RFPath %u][Rate 0x%x] = 0x%x\n", RFPath, Rate, pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath]); */ + + } + +@@ -1623,7 +1537,7 @@ PHY_GetRateIndexOfTxPowerByRate( + } + + s8 +-PHY_GetTxPowerByRate( ++_PHY_GetTxPowerByRate( + IN PADAPTER pAdapter, + IN u8 Band, + IN u8 RFPath, +@@ -1631,39 +1545,47 @@ PHY_GetTxPowerByRate( + IN u8 Rate + ) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA( pAdapter ); +- s8 value = 0, limit = 0; +- u8 rateIndex = PHY_GetRateIndexOfTxPowerByRate( Rate ); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ s8 value = 0; ++ u8 rateIndex = PHY_GetRateIndexOfTxPowerByRate(Rate); + +- if ( ( pAdapter->registrypriv.RegEnableTxPowerByRate == 2 && pHalData->EEPROMRegulatory == 2 ) || +- pAdapter->registrypriv.RegEnableTxPowerByRate == 0 ) +- return 0; +- +- if ( Band != BAND_ON_2_4G && Band != BAND_ON_5G ) +- { +- DBG_871X("Invalid band %d in %s\n", Band, __FUNCTION__ ); +- return value; ++ if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) { ++ DBG_871X("Invalid band %d in %s\n", Band, __func__); ++ goto exit; + } +- if ( RFPath > ODM_RF_PATH_D ) +- { +- DBG_871X("Invalid RfPath %d in %s\n", RFPath, __FUNCTION__ ); +- return value; ++ if (RFPath > ODM_RF_PATH_D) { ++ DBG_871X("Invalid RfPath %d in %s\n", RFPath, __func__); ++ goto exit; + } +- if ( TxNum >= RF_MAX_TX_NUM ) +- { +- DBG_871X("Invalid TxNum %d in %s\n", TxNum, __FUNCTION__ ); +- return value; ++ if (TxNum >= RF_MAX_TX_NUM) { ++ DBG_871X("Invalid TxNum %d in %s\n", TxNum, __func__); ++ goto exit; + } +- if ( rateIndex >= TX_PWR_BY_RATE_NUM_RATE ) +- { +- DBG_871X("Invalid RateIndex %d in %s\n", rateIndex, __FUNCTION__ ); +- return value; ++ if (rateIndex >= TX_PWR_BY_RATE_NUM_RATE) { ++ DBG_871X("Invalid RateIndex %d in %s\n", rateIndex, __func__); ++ goto exit; + } + + value = pHalData->TxPwrByRateOffset[Band][RFPath][TxNum][rateIndex]; + ++exit: + return value; ++} ++ + ++s8 ++PHY_GetTxPowerByRate( ++ IN PADAPTER pAdapter, ++ IN u8 Band, ++ IN u8 RFPath, ++ IN u8 TxNum, ++ IN u8 Rate ++ ) ++{ ++ if (!phy_is_tx_power_by_rate_needed(pAdapter)) ++ return 0; ++ ++ return _PHY_GetTxPowerByRate(pAdapter, Band, RFPath, TxNum, Rate); + } + + VOID +@@ -1721,17 +1643,17 @@ PHY_SetTxPowerLevelByPath( + PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, OFDM ); + PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, HT_MCS0_MCS7 ); + +- if ( IS_HARDWARE_TYPE_JAGUAR( Adapter ) || IS_HARDWARE_TYPE_8813A( Adapter ) ) +- PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, VHT_1SSMCS0_1SSMCS9 ); ++ if (IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter)) ++ PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, VHT_1SSMCS0_1SSMCS9); + +- if ( pHalData->NumTotalRFPath >= 2 ) ++ if (pHalData->NumTotalRFPath >= 2) + { + PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, HT_MCS8_MCS15 ); + +- if ( IS_HARDWARE_TYPE_JAGUAR( Adapter ) || IS_HARDWARE_TYPE_8813A( Adapter ) ) +- PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, VHT_2SSMCS0_2SSMCS9 ); ++ if (IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter)) ++ PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, VHT_2SSMCS0_2SSMCS9); + +- if ( IS_HARDWARE_TYPE_8813A( Adapter ) ) ++ if (IS_HARDWARE_TYPE_8814A(Adapter)) + { + PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, HT_MCS16_MCS23 ); + PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, VHT_3SSMCS0_3SSMCS9 ); +@@ -1783,30 +1705,21 @@ phy_GetChannelIndexOfTxPowerLimit( + ) + { + s8 channelIndex = -1; +- u8 channel5G[CHANNEL_MAX_NUMBER_5G] = +- {36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112, +- 114,116,118,120,122,124,126,128,130,132,134,136,138,140,142,144,149,151, +- 153,155,157,159,161,163,165,167,168,169,171,173,175,177}; + u8 i = 0; +- if ( Band == BAND_ON_2_4G ) +- { ++ ++ if (Band == BAND_ON_2_4G) { + channelIndex = Channel - 1; +- } +- else if ( Band == BAND_ON_5G ) +- { +- for ( i = 0; i < sizeof(channel5G)/sizeof(u8); ++i ) +- { +- if ( channel5G[i] == Channel ) ++ } else if (Band == BAND_ON_5G) { ++ for (i = 0; i < CENTER_CH_5G_ALL_NUM; ++i) { ++ if (center_ch_5g_all[i] == Channel) + channelIndex = i; + } +- } +- else +- { +- DBG_871X("Invalid Band %d in %s", Band, __FUNCTION__ ); ++ } else { ++ DBG_871X_LEVEL(_drv_always_, "Invalid Band %d in %s\n", Band, __func__); + } + +- if ( channelIndex == -1 ) +- DBG_871X("Invalid Channel %d of Band %d in %s", Channel, Band, __FUNCTION__ ); ++ if (channelIndex == -1) ++ DBG_871X_LEVEL(_drv_always_, "Invalid Channel %d of Band %d in %s\n", Channel, Band, __func__); + + return channelIndex; + } +@@ -1831,28 +1744,24 @@ PHY_GetTxPowerLimit( + Adapter->registrypriv.RegEnableTxPowerLimit == 0 ) + return MAX_POWER_INDEX; + +- switch( Adapter->registrypriv.RegPwrTblSel ) +- { +- case 1: +- regulation = TXPWR_LMT_ETSI; +- break; +- case 2: +- regulation = TXPWR_LMT_MKK; +- break; +- case 3: +- regulation = TXPWR_LMT_FCC; +- break; +- +- case 4: +- regulation = TXPWR_LMT_WW; +- break; +- +- default: +- regulation = ( Band == BAND_ON_2_4G ) ? pHalData->Regulation2_4G +- : pHalData->Regulation5G; +- break; ++ switch (RegPwrTblSel) { ++ case 1: ++ regulation = TXPWR_LMT_ETSI; ++ break; ++ case 2: ++ regulation = TXPWR_LMT_MKK; ++ break; ++ case 3: ++ regulation = TXPWR_LMT_FCC; ++ break; ++ case 4: ++ regulation = TXPWR_LMT_WW; ++ break; ++ default: ++ regulation = (Band == BAND_ON_2_4G) ? pHalData->Regulation2_4G : pHalData->Regulation5G; ++ break; + } +- ++ + //DBG_871X("pMgntInfo->RegPwrTblSel %d, final regulation %d\n", Adapter->registrypriv.RegPwrTblSel, regulation ); + + +@@ -1967,6 +1876,8 @@ PHY_GetTxPowerLimit( + + if ( Band == BAND_ON_2_4G ) { + s8 limits[10] = {0}; u8 i = 0; ++ if (bandwidth >= MAX_2_4G_BANDWIDTH_NUM) ++ bandwidth = MAX_2_4G_BANDWIDTH_NUM - 1; + for (i = 0; i < MAX_REGULATION_NUM; ++i) + limits[i] = pHalData->TxPwrLimit_2_4G[i][bandwidth][rateSection][channel][RfPath]; + +@@ -2015,77 +1926,88 @@ phy_CrossReferenceHTAndVHTTxPowerLimit( + IN PADAPTER pAdapter + ) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +- u8 regulation, bw, channel, rateSection; +- s8 tempPwrLmt = 0; +- +- for ( regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation ) +- { +- for ( bw = 0; bw < MAX_5G_BANDWITH_NUM; ++bw ) +- { +- for ( channel = 0; channel < CHANNEL_MAX_NUMBER_5G; ++channel ) +- { +- for ( rateSection = 0; rateSection < MAX_RATE_SECTION_NUM; ++rateSection ) +- { +- tempPwrLmt = pHalData->TxPwrLimit_5G[regulation][bw][rateSection][channel][ODM_RF_PATH_A]; +- if ( tempPwrLmt == MAX_POWER_INDEX ) +- { +- u8 baseSection = 2, refSection = 6; +- if ( bw == 0 || bw == 1 ) { // 5G 20M 40M VHT and HT can cross reference +- //DBG_871X("No power limit table of the specified band %d, bandwidth %d, ratesection %d, channel %d, rf path %d\n", +- // 1, bw, rateSection, channel, ODM_RF_PATH_A ); +- if ( rateSection >= 2 && rateSection <= 9 ) { +- if ( rateSection == 2 ) +- { +- baseSection = 2; +- refSection = 6; +- } +- else if ( rateSection == 3 ) +- { +- baseSection = 3; +- refSection = 7; +- } +- else if ( rateSection == 4 ) +- { +- baseSection = 4; +- refSection = 8; +- } +- else if ( rateSection == 5 ) +- { +- baseSection = 5; +- refSection = 9; +- } +- else if ( rateSection == 6 ) +- { +- baseSection = 6; +- refSection = 2; +- } +- else if ( rateSection == 7 ) +- { +- baseSection = 7; +- refSection = 3; +- } +- else if ( rateSection == 8 ) +- { +- baseSection = 8; +- refSection = 4; +- } +- else if ( rateSection == 9 ) +- { +- baseSection = 9; +- refSection = 5; +- } +- pHalData->TxPwrLimit_5G[regulation][bw][baseSection][channel][ODM_RF_PATH_A] = +- pHalData->TxPwrLimit_5G[regulation][bw][refSection][channel][ODM_RF_PATH_A]; +- } ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 regulation, bw, channel, rs, ref_rs; ++ int ht_ref_vht_5g_20_40 = 0; ++ int vht_ref_ht_5g_20_40 = 0; ++ int ht_has_ref_5g_20_40 = 0; ++ int vht_has_ref_5g_20_40 = 0; ++ ++ pHalData->tx_pwr_lmt_5g_20_40_ref = 0; ++ ++ for (regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation) { ++ ++ for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; ++bw) { ++ ++ for (channel = 0; channel < CENTER_CH_5G_ALL_NUM; ++channel) { ++ ++ for (rs = 0; rs < MAX_RATE_SECTION_NUM; ++rs) { ++ ++ /* 5G 20M 40M VHT and HT can cross reference */ ++ if (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40) { ++ if (rs == HT_1SS) ++ ref_rs = VHT_1SS; ++ else if (rs == HT_2SS) ++ ref_rs = VHT_2SS; ++ else if (rs == HT_3SS) ++ ref_rs = VHT_3SS; ++ else if (rs == HT_4SS) ++ ref_rs = VHT_4SS; ++ else if (rs == VHT_1SS) ++ ref_rs = HT_1SS; ++ else if (rs == VHT_2SS) ++ ref_rs = HT_2SS; ++ else if (rs == VHT_3SS) ++ ref_rs = HT_3SS; ++ else if (rs == VHT_4SS) ++ ref_rs = HT_4SS; ++ else ++ continue; + +- //DBG_871X("use other value %d", tempPwrLmt ); +- } ++ if (pHalData->TxPwrLimit_5G[regulation][bw][ref_rs][channel][RF_PATH_A] == MAX_POWER_INDEX) ++ continue; ++ ++ if (IS_HT_RATE_SECTION(rs)) ++ ht_has_ref_5g_20_40++; ++ else if (IS_VHT_RATE_SECTION(rs)) ++ vht_has_ref_5g_20_40++; ++ else ++ continue; ++ ++ if (pHalData->TxPwrLimit_5G[regulation][bw][rs][channel][RF_PATH_A] != MAX_POWER_INDEX) ++ continue; ++ ++ if (IS_HT_RATE_SECTION(rs) && IS_VHT_RATE_SECTION(ref_rs)) ++ ht_ref_vht_5g_20_40++; ++ else if (IS_VHT_RATE_SECTION(rs) && IS_HT_RATE_SECTION(ref_rs)) ++ vht_ref_ht_5g_20_40++; ++ ++ if (0) ++ DBG_871X("reg:%u, bw:%u, ch:%u, %s ref %s\n" ++ , regulation, bw, channel ++ , rate_section_str(rs), rate_section_str(ref_rs)); ++ ++ pHalData->TxPwrLimit_5G[regulation][bw][rs][channel][RF_PATH_A] = ++ pHalData->TxPwrLimit_5G[regulation][bw][ref_rs][channel][RF_PATH_A]; + } ++ + } + } + } + } ++ ++ if (0) { ++ DBG_871X("ht_ref_vht_5g_20_40:%d, ht_has_ref_5g_20_40:%d\n", ht_ref_vht_5g_20_40, ht_has_ref_5g_20_40); ++ DBG_871X("vht_ref_hht_5g_20_40:%d, vht_has_ref_5g_20_40:%d\n", vht_ref_ht_5g_20_40, vht_has_ref_5g_20_40); ++ } ++ ++ /* 5G 20M&40M HT all come from VHT*/ ++ if (ht_ref_vht_5g_20_40 && ht_has_ref_5g_20_40 == ht_ref_vht_5g_20_40) ++ pHalData->tx_pwr_lmt_5g_20_40_ref |= TX_PWR_LMT_REF_HT_FROM_VHT; ++ ++ /* 5G 20M&40M VHT all come from HT*/ ++ if (vht_ref_ht_5g_20_40 && vht_has_ref_5g_20_40 == vht_ref_ht_5g_20_40) ++ pHalData->tx_pwr_lmt_5g_20_40_ref |= TX_PWR_LMT_REF_VHT_FROM_HT; + } + + VOID +@@ -2093,50 +2015,33 @@ PHY_ConvertTxPowerLimitToPowerIndex( + IN PADAPTER Adapter + ) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- u8 BW40PwrBasedBm2_4G = 0x2E, BW40PwrBasedBm5G = 0x2E; +- u8 regulation, bw, channel, rateSection; +- u8 baseIndex2_4G; +- u8 baseIndex5G; +- s8 tempValue = 0, tempPwrLmt = 0; +- u8 rfPath = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 base; ++ u8 regulation, bw, channel, rateSection; ++ s8 tempValue = 0, tempPwrLmt = 0; ++ u8 rfPath = 0; + +- //DBG_871X("=====> PHY_ConvertTxPowerLimitToPowerIndex()\n" ); ++ if (pHalData->odmpriv.PhyRegPgValueType != PHY_REG_PG_EXACT_VALUE) { ++ rtw_warn_on(1); ++ return; ++ } + +- phy_CrossReferenceHTAndVHTTxPowerLimit( Adapter ); ++ phy_CrossReferenceHTAndVHTTxPowerLimit(Adapter); + +- for ( regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation ) +- { +- for ( bw = 0; bw < MAX_2_4G_BANDWITH_NUM; ++bw ) +- { +- for ( channel = 0; channel < CHANNEL_MAX_NUMBER_2G; ++channel ) +- { +- for ( rateSection = 0; rateSection < MAX_RATE_SECTION_NUM; ++rateSection ) +- { +- tempPwrLmt = pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][ODM_RF_PATH_A]; ++ for (regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation) { + +- for ( rfPath = ODM_RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath ) +- { +- if ( pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE ) +- { +- if ( rateSection == 5 ) // HT 4T +- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_4TX, HT_MCS24_MCS31 ); +- else if ( rateSection == 4 ) // HT 3T +- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_3TX, HT_MCS16_MCS23 ); +- else if ( rateSection == 3 ) // HT 2T +- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_2TX, HT_MCS8_MCS15 ); +- else if ( rateSection == 2 ) // HT 1T +- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, HT_MCS0_MCS7 ); +- else if ( rateSection == 1 ) // OFDM +- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, OFDM ); +- else if ( rateSection == 0 ) // CCK +- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, CCK ); +- } +- else +- BW40PwrBasedBm2_4G = Adapter->registrypriv.RegPowerBase * 2; ++ for (bw = 0; bw < MAX_2_4G_BANDWIDTH_NUM; ++bw) { + +- if ( tempPwrLmt != MAX_POWER_INDEX ) { +- tempValue = tempPwrLmt - BW40PwrBasedBm2_4G; ++ for (channel = 0; channel < CENTER_CH_2G_NUM; ++channel) { ++ ++ for (rateSection = CCK; rateSection <= HT_4SS; ++rateSection) { ++ tempPwrLmt = pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][RF_PATH_A]; ++ ++ if (tempPwrLmt != MAX_POWER_INDEX) { ++ ++ for (rfPath = RF_PATH_A; rfPath < MAX_RF_PATH; ++rfPath) { ++ base = phy_get_target_tx_power(Adapter, BAND_ON_2_4G, rfPath, rateSection); ++ tempValue = tempPwrLmt - base; + pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][rfPath] = tempValue; + } + } +@@ -2145,91 +2050,64 @@ PHY_ConvertTxPowerLimitToPowerIndex( + } + } + +- if ( IS_HARDWARE_TYPE_JAGUAR( Adapter ) || IS_HARDWARE_TYPE_8813A( Adapter ) ) +- { +- for ( regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation ) +- { +- for ( bw = 0; bw < MAX_5G_BANDWITH_NUM; ++bw ) +- { +- for ( channel = 0; channel < CHANNEL_MAX_NUMBER_5G; ++channel ) +- { +- for ( rateSection = 0; rateSection < MAX_RATE_SECTION_NUM; ++rateSection ) +- { +- tempPwrLmt = pHalData->TxPwrLimit_5G[regulation][bw][rateSection][channel][ODM_RF_PATH_A]; +- +- for ( rfPath = ODM_RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath ) +- { +- if ( pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE ) +- { +- if ( rateSection == 9 ) // VHT 4SS +- BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_4TX, VHT_4SSMCS0_4SSMCS9); +- else if ( rateSection == 8 ) // VHT 3SS +- BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_3TX, VHT_3SSMCS0_3SSMCS9 ); +- else if ( rateSection == 7 ) // VHT 2SS +- BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_2TX, VHT_2SSMCS0_2SSMCS9 ); +- else if ( rateSection == 6 ) // VHT 1SS +- BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, VHT_1SSMCS0_1SSMCS9 ); +- else if ( rateSection == 5 ) // HT 4T +- BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_4TX, HT_MCS24_MCS31 ); +- else if ( rateSection == 4 ) // HT 3T +- BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_3TX, HT_MCS16_MCS23 ); +- else if ( rateSection == 3 ) // HT 2T +- BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_2TX, HT_MCS8_MCS15 ); +- else if ( rateSection == 2 ) // HT 1T +- BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, HT_MCS0_MCS7 ); +- else if ( rateSection == 1 ) // OFDM +- BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, OFDM ); +- } +- else +- BW40PwrBasedBm5G = Adapter->registrypriv.RegPowerBase * 2; ++ if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) { + +- if ( tempPwrLmt != MAX_POWER_INDEX ) { +- tempValue = tempPwrLmt - BW40PwrBasedBm5G; +- pHalData->TxPwrLimit_5G[regulation][bw][rateSection][channel][rfPath] = tempValue; +- } +- } +- } ++ for (regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation) { ++ ++ for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; ++bw) { ++ ++ for (channel = 0; channel < CENTER_CH_5G_ALL_NUM; ++channel) { ++ ++ for (rateSection = OFDM; rateSection <= VHT_4SS; ++rateSection) { ++ tempPwrLmt = pHalData->TxPwrLimit_5G[regulation][bw][rateSection][channel][RF_PATH_A]; ++ ++ if (tempPwrLmt != MAX_POWER_INDEX) { ++ ++ for (rfPath = RF_PATH_A; rfPath < MAX_RF_PATH; ++rfPath) { ++ base = phy_get_target_tx_power(Adapter, BAND_ON_5G, rfPath, rateSection); ++ tempValue = tempPwrLmt - base; ++ pHalData->TxPwrLimit_5G[regulation][bw][rateSection][channel][rfPath] = tempValue; ++ } ++ } ++ } + } + } + } + } +- //DBG_871X("<===== PHY_ConvertTxPowerLimitToPowerIndex()\n" ); + } + ++/* ++* PHY_InitTxPowerLimit - Set all hal_data.TxPwrLimit_2_4G, TxPwrLimit_5G array to MAX_POWER_INDEX ++*/ + VOID + PHY_InitTxPowerLimit( + IN PADAPTER Adapter + ) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- u8 i, j, k, l, m; +- +- //DBG_871X("=====> PHY_InitTxPowerLimit()!\n" ); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 i, j, k, l, m; + +- for ( i = 0; i < MAX_REGULATION_NUM; ++i ) +- { +- for ( j = 0; j < MAX_2_4G_BANDWITH_NUM; ++j ) +- for ( k = 0; k < MAX_RATE_SECTION_NUM; ++k ) +- for ( m = 0; m < CHANNEL_MAX_NUMBER_2G; ++m ) +- for ( l = 0; l < MAX_RF_PATH_NUM; ++l ) ++ for (i = 0; i < MAX_REGULATION_NUM; ++i) ++ for (j = 0; j < MAX_2_4G_BANDWIDTH_NUM; ++j) ++ for (k = 0; k < MAX_RATE_SECTION_NUM; ++k) ++ for (m = 0; m < CENTER_CH_2G_NUM; ++m) ++ for (l = 0; l < MAX_RF_PATH; ++l) + pHalData->TxPwrLimit_2_4G[i][j][k][m][l] = MAX_POWER_INDEX; +- } + +- for ( i = 0; i < MAX_REGULATION_NUM; ++i ) +- { +- for ( j = 0; j < MAX_5G_BANDWITH_NUM; ++j ) +- for ( k = 0; k < MAX_RATE_SECTION_NUM; ++k ) +- for ( m = 0; m < CHANNEL_MAX_NUMBER_5G; ++m ) +- for ( l = 0; l < MAX_RF_PATH_NUM; ++l ) ++ for (i = 0; i < MAX_REGULATION_NUM; ++i) ++ for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j) ++ for (k = 0; k < MAX_RATE_SECTION_NUM; ++k) ++ for (m = 0; m < CENTER_CH_5G_ALL_NUM; ++m) ++ for (l = 0; l < MAX_RF_PATH; ++l) + pHalData->TxPwrLimit_5G[i][j][k][m][l] = MAX_POWER_INDEX; +- } +- +- //DBG_871X("<===== PHY_InitTxPowerLimit()!\n" ); + } + ++/* ++* PHY_SetTxPowerLimit - Parsing TX power limit from phydm array, called by odm_ConfigBB_TXPWR_LMT_XXX in phydm ++*/ + VOID + PHY_SetTxPowerLimit( +- IN PADAPTER Adapter, ++ IN PDM_ODM_T pDM_Odm, + IN u8 *Regulation, + IN u8 *Band, + IN u8 *Bandwidth, +@@ -2239,92 +2117,121 @@ PHY_SetTxPowerLimit( + IN u8 *PowerLimit + ) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA( Adapter ); +- u8 regulation=0, bandwidth=0, rateSection=0, +- channel; +- s8 powerLimit = 0, prevPowerLimit, channelIndex; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 regulation = 0, bandwidth = 0, rateSection = 0, channel; ++ s8 powerLimit = 0, prevPowerLimit, channelIndex; + +- //DBG_871X( "Index of power limit table [band %s][regulation %s][bw %s][rate section %s][rf path %s][chnl %s][val %s]\n", +- // Band, Regulation, Bandwidth, RateSection, RfPath, Channel, PowerLimit ); ++ if (0) ++ DBG_871X("Index of power limit table [band %s][regulation %s][bw %s][rate section %s][rf path %s][chnl %s][val %s]\n" ++ , Band, Regulation, Bandwidth, RateSection, RfPath, Channel, PowerLimit); + +- if ( !GetU1ByteIntegerFromStringInDecimal( (s8 *)Channel, &channel ) || +- !GetU1ByteIntegerFromStringInDecimal( (s8 *)PowerLimit, &powerLimit ) ) +- { +- DBG_871X("Illegal index of power limit table [chnl %s][val %s]\n", Channel, PowerLimit ); ++ if (GetU1ByteIntegerFromStringInDecimal((s8 *)Channel, &channel) == _FALSE ++ || GetU1ByteIntegerFromStringInDecimal((s8 *)PowerLimit, &powerLimit) == _FALSE ++ ){ ++ DBG_871X_LEVEL(_drv_always_, "Illegal index of power limit table [ch %s][val %s]\n", Channel, PowerLimit); ++ return; + } + + powerLimit = powerLimit > MAX_POWER_INDEX ? MAX_POWER_INDEX : powerLimit; + +- if ( eqNByte( Regulation, (u8 *)("FCC"), 3 ) ) regulation = 0; +- else if ( eqNByte( Regulation, (u8 *)("MKK"), 3 ) ) regulation = 1; +- else if ( eqNByte( Regulation, (u8 *)("ETSI"), 4 ) ) regulation = 2; +- else if ( eqNByte( Regulation, (u8 *)("WW13"), 4 ) ) regulation = 3; +- +- if ( eqNByte( RateSection, (u8 *)("CCK"), 3 ) && eqNByte( RfPath, (u8 *)("1T"), 2 ) ) +- rateSection = 0; +- else if ( eqNByte( RateSection, (u8 *)("OFDM"), 4 ) && eqNByte( RfPath, (u8 *)("1T"), 2 ) ) +- rateSection = 1; +- else if ( eqNByte( RateSection, (u8 *)("HT"), 2 ) && eqNByte( RfPath, (u8 *)("1T"), 2 ) ) +- rateSection = 2; +- else if ( eqNByte( RateSection, (u8 *)("HT"), 2 ) && eqNByte( RfPath, (u8 *)("2T"), 2 ) ) +- rateSection = 3; +- else if ( eqNByte( RateSection, (u8 *)("HT"), 2 ) && eqNByte( RfPath, (u8 *)("3T"), 2 ) ) +- rateSection = 4; +- else if ( eqNByte( RateSection, (u8 *)("HT"), 2 ) && eqNByte( RfPath, (u8 *)("4T"), 2 ) ) +- rateSection = 5; +- else if ( eqNByte( RateSection, (u8 *)("VHT"), 3 ) && eqNByte( RfPath, (u8 *)("1T"), 2 ) ) +- rateSection = 6; +- else if ( eqNByte( RateSection, (u8 *)("VHT"), 3 ) && eqNByte( RfPath, (u8 *)("2T"), 2 ) ) +- rateSection = 7; +- else if ( eqNByte( RateSection, (u8 *)("VHT"), 3 ) && eqNByte( RfPath, (u8 *)("3T"), 2 ) ) +- rateSection = 8; +- else if ( eqNByte( RateSection, (u8 *)("VHT"), 3 ) && eqNByte( RfPath, (u8 *)("4T"), 2 ) ) +- rateSection = 9; +- else +- { +- DBG_871X("Wrong rate section!\n"); ++ if (eqNByte(Regulation, (u8 *)("FCC"), 3)) ++ regulation = TXPWR_LMT_FCC; ++ else if (eqNByte(Regulation, (u8 *)("MKK"), 3)) ++ regulation = TXPWR_LMT_MKK; ++ else if (eqNByte(Regulation, (u8 *)("ETSI"), 4)) ++ regulation = TXPWR_LMT_ETSI; ++ else if (eqNByte(Regulation, (u8 *)("WW13"), 4)) ++ regulation = TXPWR_LMT_WW; ++ else { ++ DBG_871X_LEVEL(_drv_always_, "unknown regulation:%s", Regulation); + return; + } +- + +- if ( eqNByte( Bandwidth, (u8 *)("20M"), 3 ) ) bandwidth = 0; +- else if ( eqNByte( Bandwidth, (u8 *)("40M"), 3 ) ) bandwidth = 1; +- else if ( eqNByte( Bandwidth, (u8 *)("80M"), 3 ) ) bandwidth = 2; +- else if ( eqNByte( Bandwidth, (u8 *)("160M"), 4 ) ) bandwidth = 3; ++ if (eqNByte(RateSection, (u8 *)("CCK"), 3) && eqNByte(RfPath, (u8 *)("1T"), 2)) ++ rateSection = CCK; ++ else if (eqNByte(RateSection, (u8 *)("OFDM"), 4) && eqNByte(RfPath, (u8 *)("1T"), 2)) ++ rateSection = OFDM; ++ else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("1T"), 2)) ++ rateSection = HT_1SS; ++ else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("2T"), 2)) ++ rateSection = HT_2SS; ++ else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("3T"), 2)) ++ rateSection = HT_3SS; ++ else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("4T"), 2)) ++ rateSection = HT_4SS; ++ else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("1T"), 2)) ++ rateSection = VHT_1SS; ++ else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("2T"), 2)) ++ rateSection = VHT_2SS; ++ else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("3T"), 2)) ++ rateSection = VHT_3SS; ++ else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("4T"), 2)) ++ rateSection = VHT_4SS; ++ else { ++ DBG_871X_LEVEL(_drv_always_, "Wrong rate section: (%s,%s)\n", RateSection, RfPath); ++ return; ++ } + +- if ( eqNByte( Band, (u8 *)("2.4G"), 4 ) ) +- { +- channelIndex = phy_GetChannelIndexOfTxPowerLimit( BAND_ON_2_4G, channel ); ++ if (eqNByte(Bandwidth, (u8 *)("20M"), 3)) ++ bandwidth = CHANNEL_WIDTH_20; ++ else if (eqNByte(Bandwidth, (u8 *)("40M"), 3)) ++ bandwidth = CHANNEL_WIDTH_40; ++ else if (eqNByte(Bandwidth, (u8 *)("80M"), 3)) ++ bandwidth = CHANNEL_WIDTH_80; ++ else { ++ DBG_871X_LEVEL(_drv_always_, "unknown bandwidth: %s\n", Bandwidth); ++ return; ++ } ++ ++ if (eqNByte(Band, (u8 *)("2.4G"), 4)) { ++ channelIndex = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_2_4G, channel); ++ ++ if (channelIndex == -1) { ++ DBG_871X_LEVEL(_drv_always_, "unsupported channel: %d at 2.4G\n", channel); ++ return; ++ } + +- if ( channelIndex == -1 ) ++ if (bandwidth >= MAX_2_4G_BANDWIDTH_NUM) { ++ DBG_871X_LEVEL(_drv_always_, "unsupported bandwidth: %s at 2.4G\n", Bandwidth); + return; ++ } + +- prevPowerLimit = pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A]; ++ prevPowerLimit = pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A]; + +- if ( powerLimit < prevPowerLimit ) +- pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A] = powerLimit; +- +- //DBG_871X( "2.4G Band value : [regulation %d][bw %d][rate_section %d][chnl %d][val %d]\n", +- // regulation, bandwidth, rateSection, channelIndex, pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A] ); +- } +- else if ( eqNByte( Band, (u8 *)("5G"), 2 ) ) +- { +- channelIndex = phy_GetChannelIndexOfTxPowerLimit( BAND_ON_5G, channel ); ++ if (prevPowerLimit != MAX_POWER_INDEX) ++ DBG_871X_LEVEL(_drv_always_, "duplicate tx power limit combination [band %s][regulation %s][bw %s][rate section %s][rf path %s][chnl %s]\n" ++ , Band, Regulation, Bandwidth, RateSection, RfPath, Channel); ++ ++ if (powerLimit < prevPowerLimit) ++ pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A] = powerLimit; + +- if ( channelIndex == -1 ) ++ if (0) ++ DBG_871X("2.4G Band value : [regulation %d][bw %d][rate_section %d][chnl %d][val %d]\n" ++ , regulation, bandwidth, rateSection, channelIndex, pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A]); ++ } else if (eqNByte(Band, (u8 *)("5G"), 2)) { ++ ++ channelIndex = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_5G, channel); ++ ++ if (channelIndex == -1) { ++ DBG_871X_LEVEL(_drv_always_, "unsupported channel: %d at 5G\n", channel); + return; ++ } + +- prevPowerLimit = pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A]; ++ prevPowerLimit = pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A]; + +- if ( powerLimit < prevPowerLimit ) +- pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A] = powerLimit; ++ if (prevPowerLimit != MAX_POWER_INDEX) ++ DBG_871X_LEVEL(_drv_always_, "duplicate tx power limit combination [band %s][regulation %s][bw %s][rate section %s][rf path %s][chnl %s]\n" ++ , Band, Regulation, Bandwidth, RateSection, RfPath, Channel); + +- //DBG_871X( "5G Band value : [regulation %d][bw %d][rate_section %d][chnl %d][val %d]\n", +- // regulation, bandwidth, rateSection, channel, pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A] ); +- } +- else +- { +- DBG_871X("Cannot recognize the band info in %s\n", Band ); ++ if (powerLimit < prevPowerLimit) ++ pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A] = powerLimit; ++ ++ if (0) ++ DBG_871X("5G Band value : [regulation %d][bw %d][rate_section %d][chnl %d][val %d]\n" ++ , regulation, bandwidth, rateSection, channel, pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A]); ++ } else { ++ DBG_871X_LEVEL(_drv_always_, "Cannot recognize the band info in %s\n", Band); + return; + } + } +@@ -2340,21 +2247,25 @@ PHY_GetTxPowerIndex( + { + u8 txPower = 0x3E; + +- if (IS_HARDWARE_TYPE_8813A(pAdapter)) { +-//#if (RTL8814A_SUPPORT==1) +-// txPower = PHY_GetTxPowerIndex_8813A( pAdapter, PowerIndex, RFPath, Rate ); +-//#endif +- } +- else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { +-#if ((RTL8812A_SUPPORT==1) || (RTL8821A_SUPPORT == 1)) ++ if (IS_HARDWARE_TYPE_8814A(pAdapter)) { ++#if (RTL8814A_SUPPORT == 1) ++ txPower = PHY_GetTxPowerIndex_8814A(pAdapter, RFPath, Rate, BandWidth, Channel); ++#endif ++ } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { ++#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) + txPower = PHY_GetTxPowerIndex_8812A(pAdapter, RFPath, Rate, BandWidth, Channel); + #endif + } + else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { +-#if (RTL8723B_SUPPORT==1) ++#if (RTL8723B_SUPPORT == 1) + txPower = PHY_GetTxPowerIndex_8723B(pAdapter, RFPath, Rate, BandWidth, Channel); + #endif + } ++ else if (IS_HARDWARE_TYPE_8703B(pAdapter)) { ++#if (RTL8703B_SUPPORT == 1) ++ txPower = PHY_GetTxPowerIndex_8703B(pAdapter, RFPath, Rate, BandWidth, Channel); ++#endif ++ } + else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { + #if (RTL8192E_SUPPORT==1) + txPower = PHY_GetTxPowerIndex_8192E(pAdapter, RFPath, Rate, BandWidth, Channel); +@@ -2364,6 +2275,10 @@ PHY_GetTxPowerIndex( + #if (RTL8188E_SUPPORT==1) + txPower = PHY_GetTxPowerIndex_8188E(pAdapter, RFPath, Rate, BandWidth, Channel); + #endif ++ } else if (IS_HARDWARE_TYPE_8188F(pAdapter)) { ++#if (RTL8188F_SUPPORT == 1) ++ txPower = PHY_GetTxPowerIndex_8188F(pAdapter, RFPath, Rate, BandWidth, Channel); ++#endif + } + + return txPower; +@@ -2377,10 +2292,10 @@ PHY_SetTxPowerIndex( + IN u8 Rate + ) + { +- if (IS_HARDWARE_TYPE_8813A(pAdapter)) { +-//#if (RTL8814A_SUPPORT==1) +-// PHY_SetTxPowerIndex_8813A( pAdapter, PowerIndex, RFPath, Rate ); +-//#endif ++ if (IS_HARDWARE_TYPE_8814A(pAdapter)) { ++#if (RTL8814A_SUPPORT == 1) ++ PHY_SetTxPowerIndex_8814A(pAdapter, PowerIndex, RFPath, Rate); ++#endif + } + else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { + #if ((RTL8812A_SUPPORT==1) || (RTL8821A_SUPPORT == 1)) +@@ -2392,6 +2307,11 @@ PHY_SetTxPowerIndex( + PHY_SetTxPowerIndex_8723B( pAdapter, PowerIndex, RFPath, Rate ); + #endif + } ++ else if (IS_HARDWARE_TYPE_8703B(pAdapter)) { ++#if (RTL8703B_SUPPORT==1) ++ PHY_SetTxPowerIndex_8703B( pAdapter, PowerIndex, RFPath, Rate ); ++#endif ++ } + else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { + #if (RTL8192E_SUPPORT==1) + PHY_SetTxPowerIndex_8192E( pAdapter, PowerIndex, RFPath, Rate ); +@@ -2401,181 +2321,610 @@ PHY_SetTxPowerIndex( + #if (RTL8188E_SUPPORT==1) + PHY_SetTxPowerIndex_8188E( pAdapter, PowerIndex, RFPath, Rate ); + #endif ++ } else if (IS_HARDWARE_TYPE_8188F(pAdapter)) { ++#if (RTL8188F_SUPPORT == 1) ++ PHY_SetTxPowerIndex_8188F(pAdapter, PowerIndex, RFPath, Rate); ++#endif + } + } + +-VOID +-Hal_ChannelPlanToRegulation( +- IN PADAPTER Adapter, +- IN u16 ChannelPlan +- ) ++bool phy_is_tx_power_limit_needed(_adapter *adapter) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- DM_ODM_T *odm = &pHalData->odmpriv; ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter)); + +- pHalData->Regulation2_4G = TXPWR_LMT_WW; +- pHalData->Regulation5G = TXPWR_LMT_WW; ++ if (regsty->RegEnableTxPowerLimit == 1 ++ || (regsty->RegEnableTxPowerLimit == 2 && hal_data->EEPROMRegulatory == 1)) ++ return _TRUE; ++ return _FALSE; ++} + +- switch(ChannelPlan) +- { +- case RT_CHANNEL_DOMAIN_WORLD_NULL: +- pHalData->Regulation2_4G = TXPWR_LMT_WW; +- break; +- case RT_CHANNEL_DOMAIN_ETSI1_NULL: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_FCC1_NULL: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_MKK1_NULL: +- pHalData->Regulation2_4G = TXPWR_LMT_MKK; +- break; +- case RT_CHANNEL_DOMAIN_ETSI2_NULL: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_FCC1_FCC1: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI1: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_MKK1_MKK1: +- pHalData->Regulation2_4G = TXPWR_LMT_MKK; +- pHalData->Regulation5G = TXPWR_LMT_MKK; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_KCC1: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_MKK; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_FCC2: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_FCC3: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_FCC4: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_FCC5: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_FCC6: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_FCC1_FCC7: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI2: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI3: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_MKK1_MKK2: +- pHalData->Regulation2_4G = TXPWR_LMT_MKK; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_MKK1_MKK3: +- pHalData->Regulation2_4G = TXPWR_LMT_MKK; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_FCC1_NCC1: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_FCC1_NCC2: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_GLOBAL_NULL: +- pHalData->Regulation2_4G = TXPWR_LMT_WW; +- pHalData->Regulation5G = TXPWR_LMT_WW; +- break; +- case RT_CHANNEL_DOMAIN_ETSI1_ETSI4: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- pHalData->Regulation5G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_FCC1_FCC2: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_FCC1_NCC3: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI5: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- pHalData->Regulation5G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_FCC1_FCC8: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI6: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- pHalData->Regulation5G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI7: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- pHalData->Regulation5G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI8: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- pHalData->Regulation5G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI9: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- pHalData->Regulation5G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI10: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- pHalData->Regulation5G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI11: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- pHalData->Regulation5G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_FCC1_NCC4: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI12: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- pHalData->Regulation5G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_FCC1_FCC9: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_WORLD_ETSI13: +- pHalData->Regulation2_4G = TXPWR_LMT_ETSI; +- pHalData->Regulation5G = TXPWR_LMT_ETSI; +- break; +- case RT_CHANNEL_DOMAIN_FCC1_FCC10: +- pHalData->Regulation2_4G = TXPWR_LMT_FCC; +- pHalData->Regulation5G = TXPWR_LMT_FCC; +- break; +- case RT_CHANNEL_DOMAIN_REALTEK_DEFINE: //Realtek Reserve +- pHalData->Regulation2_4G = TXPWR_LMT_WW; +- pHalData->Regulation5G = TXPWR_LMT_WW; +- break; +- default: +- break; ++bool phy_is_tx_power_by_rate_needed(_adapter *adapter) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter)); ++ ++ if (regsty->RegEnableTxPowerByRate == 1 ++ || (regsty->RegEnableTxPowerByRate == 2 && hal_data->EEPROMRegulatory != 2)) ++ return _TRUE; ++ return _FALSE; ++} ++ ++int phy_load_tx_power_by_rate(_adapter *adapter, const char *hal_file_name, u8 force) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter)); ++ int ret = _FAIL; ++ ++ if (!force ++ && !rtw_is_phy_file_readable(hal_file_name) ++ && hal_data->txpwr_by_rate_loaded == 1 ++ && hal_data->txpwr_by_rate_from_file == 0 ++ ) { ++ /* No file and already load default(compile-time) table */ ++ ret = _SUCCESS; ++ goto exit; + } + +- DBG_871X("%s ChannelPlan:0x%02x,Regulation(2_4G/5G):0x%02x,0x%02x\n", +- __FUNCTION__,ChannelPlan,pHalData->Regulation2_4G,pHalData->Regulation5G); ++ hal_data->txpwr_by_rate_loaded = 0; ++ PHY_InitTxPowerByRate(adapter); + ++ /* tx power limit is based on tx power by rate */ ++ hal_data->txpwr_limit_loaded = 0; ++ ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (rtw_is_phy_file_readable(hal_file_name) ++ && phy_ConfigBBWithPgParaFile(adapter, hal_file_name) == _SUCCESS ++ ) { ++ hal_data->txpwr_by_rate_from_file = 1; ++ goto post_hdl; ++ } ++#endif ++ ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if (HAL_STATUS_SUCCESS == ODM_ConfigBBWithHeaderFile(&hal_data->odmpriv, CONFIG_BB_PHY_REG_PG)) { ++ DBG_871X("default power by rate loaded\n"); ++ hal_data->txpwr_by_rate_from_file = 0; ++ goto post_hdl; ++ } ++#endif ++ ++ DBG_871X_LEVEL(_drv_err_, "%s():Read Tx power by rate fail\n", __func__); ++ goto exit; ++ ++post_hdl: ++ if (hal_data->odmpriv.PhyRegPgValueType != PHY_REG_PG_EXACT_VALUE) { ++ rtw_warn_on(1); ++ goto exit; ++ } ++ ++ PHY_TxPowerByRateConfiguration(adapter); ++ hal_data->txpwr_by_rate_loaded = 1; ++ ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++int phy_load_tx_power_limit(_adapter *adapter, const char *hal_file_name, u8 force) ++{ ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter)); ++ int ret = _FAIL; ++ ++ if (!force ++ && !rtw_is_phy_file_readable(hal_file_name) ++ && hal_data->txpwr_by_rate_loaded == 1 ++ && hal_data->txpwr_by_rate_from_file == 0 ++ ) { ++ /* No file and already load default(compile-time) table */ ++ ret = _SUCCESS; ++ goto exit; ++ } ++ ++ hal_data->txpwr_limit_loaded = 0; ++ PHY_InitTxPowerLimit(adapter); ++ ++ if (!hal_data->txpwr_by_rate_loaded && regsty->target_tx_pwr_valid != _TRUE) { ++ DBG_871X_LEVEL(_drv_err_, "%s():Read Tx power limit before target tx power is specify\n", __func__); ++ goto exit; ++ } ++ ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (rtw_is_phy_file_readable(hal_file_name) ++ && PHY_ConfigRFWithPowerLimitTableParaFile(adapter, hal_file_name) == _SUCCESS ++ ) { ++ hal_data->txpwr_limit_from_file = 1; ++ goto post_hdl; ++ } ++#endif ++ ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if (HAL_STATUS_SUCCESS == ODM_ConfigRFWithHeaderFile(&hal_data->odmpriv, CONFIG_RF_TXPWR_LMT, (ODM_RF_RADIO_PATH_E)0)) { ++ DBG_871X("default power limit loaded\n"); ++ hal_data->txpwr_limit_from_file = 0; ++ goto post_hdl; ++ } ++#endif ++ ++ DBG_871X_LEVEL(_drv_err_, "%s():Read Tx power limit fail\n", __func__); ++ goto exit; ++ ++post_hdl: ++ PHY_ConvertTxPowerLimitToPowerIndex(adapter); ++ hal_data->txpwr_limit_loaded = 1; ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++const char *hal_phy_reg_pg_str(_adapter *adapter) ++{ ++ u8 interface_type = 0; ++ const char *str = NULL; ++ ++ interface_type = rtw_get_intf_type(adapter); ++ ++ switch (rtw_get_chip_type(adapter)) { ++#ifdef CONFIG_RTL8723B ++ case RTL8723B: ++ str = RTL8723B_PHY_REG_PG; ++ break; ++#endif ++#ifdef CONFIG_RTL8703B ++ case RTL8703B: ++ str = RTL8703B_PHY_REG_PG; ++ break; ++#endif ++#ifdef CONFIG_RTL8188E ++ case RTL8188E: ++ str = RTL8188E_PHY_REG_PG; ++ break; ++#endif ++#ifdef CONFIG_RTL8188F ++ case RTL8188F: ++ str = RTL8188F_PHY_REG_PG; ++ break; ++#endif ++#ifdef CONFIG_RTL8812A ++ case RTL8812: ++ str = RTL8812_PHY_REG_PG; ++ break; ++#endif ++#ifdef CONFIG_RTL8821A ++ case RTL8821: ++ str = RTL8821_PHY_REG_PG; ++ break; ++#endif ++#ifdef CONFIG_RTL8192E ++ case RTL8192E: ++ str = RTL8192E_PHY_REG_PG; ++ break; ++#endif ++#ifdef CONFIG_RTL8814A ++ case RTL8814A: ++ str = RTL8814A_PHY_REG_PG; ++ break; ++#endif ++ } ++ ++ if (str == NULL) { ++ DBG_871X_LEVEL(_drv_err_, "%s: unknown chip_type:%u\n" ++ , __func__, rtw_get_chip_type(adapter)); ++ } ++ ++ return str; ++} ++ ++const char *hal_txpwr_lmt_str(_adapter *adapter) ++{ ++ u8 interface_type = 0; ++ const char *str = NULL; ++ ++ interface_type = rtw_get_intf_type(adapter); ++ ++ switch (rtw_get_chip_type(adapter)) { ++#ifdef CONFIG_RTL8723B ++ case RTL8723B: ++ str = RTL8723B_TXPWR_LMT; ++ break; ++#endif ++#ifdef CONFIG_RTL8703B ++ case RTL8703B: ++ str = RTL8703B_TXPWR_LMT; ++ break; ++#endif ++#ifdef CONFIG_RTL8188E ++ case RTL8188E: ++ str = RTL8188E_TXPWR_LMT; ++ break; ++#endif ++#ifdef CONFIG_RTL8188F ++ case RTL8188F: ++ str = RTL8188F_TXPWR_LMT; ++ break; ++#endif ++#ifdef CONFIG_RTL8812A ++ case RTL8812: ++ str = RTL8812_TXPWR_LMT; ++ break; ++#endif ++#ifdef CONFIG_RTL8821A ++ case RTL8821: ++ str = RTL8821_TXPWR_LMT; ++ break; ++#endif ++#ifdef CONFIG_RTL8192E ++ case RTL8192E: ++ str = RTL8192E_TXPWR_LMT; ++ break; ++#endif ++#ifdef CONFIG_RTL8814A ++ case RTL8814A: ++ str = RTL8814A_TXPWR_LMT; ++ break; ++#endif ++ } ++ ++ if (str == NULL) { ++ DBG_871X_LEVEL(_drv_err_, "%s: unknown chip_type:%u\n" ++ , __func__, rtw_get_chip_type(adapter)); ++ } ++ ++ return str; ++} ++ ++void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file, u8 force) ++{ ++ struct registry_priv *regsty = adapter_to_regsty(adapter); ++ const char *str = NULL; ++ ++ /* check registy target tx power */ ++ regsty->target_tx_pwr_valid = rtw_regsty_chk_target_tx_power_valid(adapter); ++ ++ /* power by rate and limit */ ++ if (phy_is_tx_power_by_rate_needed(adapter) ++ || (phy_is_tx_power_limit_needed(adapter) && regsty->target_tx_pwr_valid != _TRUE) ++ ) { ++ str = chk_file ? hal_phy_reg_pg_str(adapter) : NULL; ++ phy_load_tx_power_by_rate(adapter, str, force); ++ } ++ ++ if (phy_is_tx_power_limit_needed(adapter)) { ++ str = chk_file ? hal_txpwr_lmt_str(adapter) : NULL; ++ phy_load_tx_power_limit(adapter, str, force); ++ } ++} ++ ++inline void phy_reload_tx_power_ext_info(_adapter *adapter) ++{ ++ phy_load_tx_power_ext_info(adapter, 1, 1); ++} ++ ++inline void phy_reload_default_tx_power_ext_info(_adapter *adapter) ++{ ++ phy_load_tx_power_ext_info(adapter, 0, 1); ++} ++ ++void dump_tx_power_ext_info(void *sel, _adapter *adapter) ++{ ++ struct registry_priv *regsty = adapter_to_regsty(adapter); ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ ++ if (phy_is_tx_power_by_rate_needed(adapter) ++ || (phy_is_tx_power_limit_needed(adapter) && regsty->target_tx_pwr_valid != _TRUE)) ++ DBG_871X_SEL_NL(sel, "target_tx_power: from powr by rate\n"); ++ else if (regsty->target_tx_pwr_valid == _TRUE) ++ DBG_871X_SEL_NL(sel, "target_tx_power: from registry\n"); ++ else ++ DBG_871X_SEL_NL(sel, "target_tx_power: unavailable\n"); ++ ++ ++ DBG_871X_SEL_NL(sel, "tx_power_by_rate: %s, %s, %s\n" ++ , phy_is_tx_power_by_rate_needed(adapter) ? "enabled" : "disabled" ++ , hal_data->txpwr_by_rate_loaded ? "loaded" : "unloaded" ++ , hal_data->txpwr_by_rate_from_file ? "file" : "default" ++ ); ++ ++ DBG_871X_SEL_NL(sel, "tx_power_limit: %s, %s, %s\n" ++ , phy_is_tx_power_limit_needed(adapter) ? "enabled" : "disabled" ++ , hal_data->txpwr_limit_loaded ? "loaded" : "unloaded" ++ , hal_data->txpwr_limit_from_file ? "file" : "default" ++ ); ++} ++ ++void dump_target_tx_power(void *sel, _adapter *adapter) ++{ ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ struct registry_priv *regsty = adapter_to_regsty(adapter); ++ int path, tx_num, band, rs; ++ u8 target; ++ ++ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { ++ if (!hal_is_band_support(adapter, band)) ++ continue; ++ ++ for (path = 0; path < RF_PATH_MAX; path++) { ++ if (path >= hal_data->NumTotalRFPath) ++ break; ++ ++ DBG_871X_SEL_NL(sel, "[%s][%c]\n", band_str(band), rf_path_char(path)); ++ ++ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { ++ tx_num = rate_section_to_tx_num(rs); ++ if (tx_num >= hal_spec->nss_num) ++ continue; ++ ++ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) ++ continue; ++ ++ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) ++ continue; ++ ++ target = phy_get_target_tx_power(adapter, band, path, rs); ++ ++ if (target % 2) ++ DBG_871X_SEL(sel, "%7s: %2d.5\n", rate_section_str(rs), target / 2); ++ else ++ DBG_871X_SEL(sel, "%7s: %4d\n", rate_section_str(rs), target / 2); ++ } ++ } ++ } ++ ++exit: ++ return; ++} ++ ++void dump_tx_power_by_rate(void *sel, _adapter *adapter) ++{ ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ int path, tx_num, band, n, rs; ++ u8 rate_num, max_rate_num, base; ++ s8 by_rate_offset; ++ ++ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { ++ if (!hal_is_band_support(adapter, band)) ++ continue; ++ ++ for (path = 0; path < RF_PATH_MAX; path++) { ++ if (path >= hal_data->NumTotalRFPath) ++ break; ++ ++ DBG_871X_SEL_NL(sel, "[%s][%c]\n", band_str(band), rf_path_char(path)); ++ ++ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { ++ tx_num = rate_section_to_tx_num(rs); ++ if (tx_num >= hal_spec->nss_num) ++ continue; ++ ++ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) ++ continue; ++ ++ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) ++ continue; ++ ++ if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) ++ max_rate_num = 10; ++ else ++ max_rate_num = 8; ++ rate_num = rate_section_rate_num(rs); ++ base = PHY_GetTxPowerByRateBase(adapter, band, path, tx_num, rs); ++ ++ DBG_871X_SEL_NL(sel, "%7s: ", rate_section_str(rs)); ++ ++ /* dump power by rate in db */ ++ for (n = rate_num - 1; n >= 0; n--) { ++ by_rate_offset = PHY_GetTxPowerByRate(adapter, band, path, tx_num, rates_by_sections[rs].rates[n]); ++ ++ if ((base + by_rate_offset) % 2) ++ DBG_871X_SEL(sel, "%2d.5 ", (base + by_rate_offset) / 2); ++ else ++ DBG_871X_SEL(sel, "%4d ", (base + by_rate_offset) / 2); ++ } ++ for (n = 0; n < max_rate_num - rate_num; n++) ++ DBG_871X_SEL(sel, "%4s ", ""); ++ ++ DBG_871X_SEL(sel, "|"); ++ ++ /* dump power by rate in offset */ ++ for (n = rate_num - 1; n >= 0; n--) { ++ by_rate_offset = PHY_GetTxPowerByRate(adapter, band, path, tx_num, rates_by_sections[rs].rates[n]); ++ DBG_871X_SEL(sel, "%3d ", by_rate_offset); ++ } ++ DBG_871X_SEL_NL(sel, "\n"); ++ ++ } ++ } ++ } ++} ++ ++void dump_tx_power_limit(void *sel, _adapter *adapter) ++{ ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter)); ++ ++ int bw, band, ch_num, rs, i, path; ++ u8 ch, n, rd; ++ ++ if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) ++ DBG_871X_SEL_NL(sel, "tx_pwr_lmt_5g_20_40_ref:0x%02x\n", hal_data->tx_pwr_lmt_5g_20_40_ref); ++ ++ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { ++ if (!hal_is_band_support(adapter, band)) ++ continue; ++ ++ rd = (band == BAND_ON_2_4G ? hal_data->Regulation2_4G : hal_data->Regulation5G); ++ ++ for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; bw++) { ++ ++ if (bw >= CHANNEL_WIDTH_160) ++ break; ++ if (band == BAND_ON_2_4G && bw >= CHANNEL_WIDTH_80) ++ break; ++ ++ if (band == BAND_ON_2_4G) ++ ch_num = CENTER_CH_2G_NUM; ++ else ++ ch_num = center_chs_5g_num(bw); ++ ++ if (ch_num == 0) { ++ rtw_warn_on(1); ++ break; ++ } ++ ++ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { ++ if (band == BAND_ON_2_4G && IS_VHT_RATE_SECTION(rs)) ++ continue; ++ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) ++ continue; ++ if (bw > CHANNEL_WIDTH_20 && (IS_CCK_RATE_SECTION(rs) || IS_OFDM_RATE_SECTION(rs))) ++ continue; ++ if (bw > CHANNEL_WIDTH_40 && IS_HT_RATE_SECTION(rs)) ++ continue; ++ ++ if (rate_section_to_tx_num(rs) >= hal_spec->nss_num) ++ continue; ++ ++ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) ++ continue; ++ ++ /* by pass 5G 20M, 40M pure reference */ ++ if (band == BAND_ON_5G && (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40)) { ++ if (hal_data->tx_pwr_lmt_5g_20_40_ref == TX_PWR_LMT_REF_HT_FROM_VHT) { ++ if (IS_HT_RATE_SECTION(rs)) ++ continue; ++ } else if (hal_data->tx_pwr_lmt_5g_20_40_ref == TX_PWR_LMT_REF_VHT_FROM_HT) { ++ if (IS_VHT_RATE_SECTION(rs) && bw <= CHANNEL_WIDTH_40) ++ continue; ++ } ++ } ++ ++ DBG_871X_SEL_NL(sel, "[%s][%s][%s]\n" ++ , band_str(band) ++ , ch_width_str(bw) ++ , rate_section_str(rs) ++ ); ++ ++ /* header for limit in db */ ++ DBG_871X_SEL_NL(sel, "%3s %5s %5s %5s %5s " ++ , "ch" ++ , (rd == TXPWR_LMT_FCC ? "*FCC" : "FCC") ++ , (rd == TXPWR_LMT_ETSI ? "*ETSI" : "ETSI") ++ , (rd == TXPWR_LMT_MKK ? "*MKK" : "MKK") ++ , (rd == TXPWR_LMT_WW ? "*WW" : "WW") ++ ); ++ ++ /* header for limit offset */ ++ for (path = 0; path < RF_PATH_MAX; path++) { ++ if (path >= hal_data->NumTotalRFPath) ++ break; ++ DBG_871X_SEL(sel, "|%3c %3c %3c %3c " ++ , (rd == TXPWR_LMT_FCC ? rf_path_char(path) : ' ') ++ , (rd == TXPWR_LMT_ETSI ? rf_path_char(path) : ' ') ++ , (rd == TXPWR_LMT_MKK ? rf_path_char(path) : ' ') ++ , (rd == TXPWR_LMT_WW ? rf_path_char(path) : ' ') ++ ); ++ } ++ DBG_871X_SEL(sel, "\n"); ++ ++ for (n = 0; n < ch_num; n++) { ++ s8 limit_idx[RF_PATH_MAX][MAX_REGULATION_NUM]; ++ s8 limit_offset[MAX_REGULATION_NUM]; ++ u8 base; ++ ++ if (band == BAND_ON_2_4G) ++ ch = n + 1; ++ else ++ ch = center_chs_5g(bw, n); ++ ++ if (ch == 0) { ++ rtw_warn_on(1); ++ break; ++ } ++ ++ /* dump limit in db (calculate from path A) */ ++ limit_offset[0] = PHY_GetTxPowerLimit(adapter, 3, band, bw, RF_PATH_A, rates_by_sections[rs].rates[0], ch); /* FCC */ ++ limit_offset[1] = PHY_GetTxPowerLimit(adapter, 1, band, bw, RF_PATH_A, rates_by_sections[rs].rates[0], ch); /* ETSI */ ++ limit_offset[2] = PHY_GetTxPowerLimit(adapter, 2, band, bw, RF_PATH_A, rates_by_sections[rs].rates[0], ch); /* MKK */ ++ limit_offset[3] = PHY_GetTxPowerLimit(adapter, 4, band, bw, RF_PATH_A, rates_by_sections[rs].rates[0], ch); /* WW */ ++ ++ base = phy_get_target_tx_power(adapter, band, RF_PATH_A, rs); ++ ++ DBG_871X_SEL_NL(sel, "%3u ", ch); ++ for (i = 0; i < MAX_REGULATION_NUM; i++) { ++ if (limit_offset[i] == MAX_POWER_INDEX) { ++ limit_idx[0][i] = MAX_POWER_INDEX; ++ DBG_871X_SEL(sel, "%5s ", "NA"); ++ } else { ++ limit_idx[0][i] = limit_offset[i] + base; ++ if ((limit_offset[i] + base) % 2) ++ DBG_871X_SEL(sel, "%3d.5 ", (limit_offset[i] + base) / 2); ++ else ++ DBG_871X_SEL(sel, "%5d ", (limit_offset[i] + base) / 2); ++ } ++ } ++ ++ /* dump limit offset of each path */ ++ for (path = 0; path < RF_PATH_MAX; path++) { ++ if (path >= hal_data->NumTotalRFPath) ++ break; ++ limit_offset[0] = PHY_GetTxPowerLimit(adapter, 3, band, bw, path, rates_by_sections[rs].rates[0], ch); /* FCC */ ++ limit_offset[1] = PHY_GetTxPowerLimit(adapter, 1, band, bw, path, rates_by_sections[rs].rates[0], ch); /* ETSI */ ++ limit_offset[2] = PHY_GetTxPowerLimit(adapter, 2, band, bw, path, rates_by_sections[rs].rates[0], ch); /* MKK */ ++ limit_offset[3] = PHY_GetTxPowerLimit(adapter, 4, band, bw, path, rates_by_sections[rs].rates[0], ch); /* WW */ ++ ++ base = phy_get_target_tx_power(adapter, band, path, rs); ++ ++ DBG_871X_SEL(sel, "|"); ++ for (i = 0; i < MAX_REGULATION_NUM; i++) { ++ if (limit_offset[i] == MAX_POWER_INDEX) { ++ limit_idx[path][i] = MAX_POWER_INDEX; ++ DBG_871X_SEL(sel, "%3s ", "NA"); ++ } else { ++ limit_idx[path][i] = limit_offset[i] + base; ++ DBG_871X_SEL(sel, "%3d ", limit_offset[i]); ++ } ++ } ++ } ++ ++ /* compare limit_idx of each path, print 'x' when mismatch */ ++ if (hal_data->NumTotalRFPath > 1) { ++ for (i = 0; i < MAX_REGULATION_NUM; i++) { ++ for (path = 0; path < RF_PATH_MAX; path++) { ++ if (path >= hal_data->NumTotalRFPath) ++ break; ++ if (limit_idx[path][i] != limit_idx[(path + 1) % hal_data->NumTotalRFPath][i]) ++ break; ++ } ++ if (path >= hal_data->NumTotalRFPath) ++ DBG_871X_SEL(sel, " "); ++ else ++ DBG_871X_SEL(sel, "x"); ++ } ++ } ++ DBG_871X_SEL(sel, "\n"); ++ ++ } ++ DBG_871X_SEL_NL(sel, "\n"); ++ } ++ } ++ } ++} ++ ++int rtw_is_phy_file_readable(const char *hal_file_name) ++{ ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (hal_file_name) { ++ rtw_merge_string(rtw_phy_para_file_path, PATH_LENGTH_MAX, rtw_phy_file_path, hal_file_name); ++ return rtw_is_file_readable(rtw_phy_para_file_path); ++ } ++#endif ++ return _FALSE; + } + + #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +@@ -2597,11 +2946,11 @@ phy_ConfigMACWithParaFile( + + if ((pHalData->mac_reg_len == 0) && (pHalData->mac_reg == NULL)) + { +- rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); ++ rtw_merge_string(rtw_phy_para_file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); + +- if (rtw_is_file_readable(file_path) == _TRUE) ++ if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) + { +- rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); ++ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); + if (rlen > 0) + { + rtStatus = _SUCCESS; +@@ -2696,11 +3045,11 @@ phy_ConfigBBWithParaFile( + + if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) + { +- rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); ++ rtw_merge_string(rtw_phy_para_file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); + +- if (rtw_is_file_readable(file_path) == _TRUE) ++ if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) + { +- rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); ++ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); + if (rlen > 0) + { + rtStatus = _SUCCESS; +@@ -2727,7 +3076,7 @@ phy_ConfigBBWithParaFile( + } + else + { +- if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) { ++ if ((pBufLen != NULL) && (*pBufLen != 0) && (pBuf != NULL)) { + _rtw_memcpy(pHalData->para_file_buf, pBuf, *pBufLen); + rtStatus = _SUCCESS; + } +@@ -2867,11 +3216,11 @@ phy_ParseBBPgParaFile( + ptmp = buffer; + for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) + { ++ if (isAllSpaceOrTab(szLine, sizeof(*szLine))) ++ continue; ++ + if(!IsCommentString(szLine)) + { +- if( isAllSpaceOrTab( szLine, sizeof( *szLine ) ) ) +- continue; +- + // Get header info (relative value or exact value) + if ( firstLine ) + { +@@ -3040,7 +3389,7 @@ phy_ParseBBPgParaFile( + tx_num = RF_4TX; + else + { +- DBG_871X("Invalid row in PHY_REG_PG.txt %c\n", szLine[1] ); ++ DBG_871X("Invalid row in PHY_REG_PG.txt '%c'(%d)\n", szLine[1], szLine[1]); + return _FAIL; + } + +@@ -3137,7 +3486,7 @@ phy_ParseBBPgParaFile( + int + phy_ConfigBBWithPgParaFile( + IN PADAPTER Adapter, +- IN char* pFileName) ++ IN const char *pFileName) + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rlen = 0, rtStatus = _FAIL; +@@ -3147,13 +3496,12 @@ phy_ConfigBBWithPgParaFile( + + _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); + +- if ((pHalData->bb_phy_reg_pg_len == 0) && (pHalData->bb_phy_reg_pg == NULL)) +- { +- rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); ++ if (pHalData->bb_phy_reg_pg == NULL) { ++ rtw_merge_string(rtw_phy_para_file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); + +- if (rtw_is_file_readable(file_path) == _TRUE) ++ if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) + { +- rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); ++ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); + if (rlen > 0) + { + rtStatus = _SUCCESS; +@@ -3167,9 +3515,7 @@ phy_ConfigBBWithPgParaFile( + } + } + } +- } +- else +- { ++ } else { + if ((pHalData->bb_phy_reg_pg_len != 0) && (pHalData->bb_phy_reg_pg != NULL)) { + _rtw_memcpy(pHalData->para_file_buf, pHalData->bb_phy_reg_pg, pHalData->bb_phy_reg_pg_len); + rtStatus = _SUCCESS; +@@ -3212,11 +3558,11 @@ phy_ConfigBBWithMpParaFile( + + if ((pHalData->bb_phy_reg_mp_len == 0) && (pHalData->bb_phy_reg_mp == NULL)) + { +- rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); ++ rtw_merge_string(rtw_phy_para_file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); + +- if (rtw_is_file_readable(file_path) == _TRUE) ++ if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) + { +- rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); ++ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); + if (rlen > 0) + { + rtStatus = _SUCCESS; +@@ -3348,11 +3694,11 @@ PHY_ConfigRFWithParaFile( + + if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) + { +- rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); ++ rtw_merge_string(rtw_phy_para_file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); + +- if (rtw_is_file_readable(file_path) == _TRUE) ++ if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) + { +- rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); ++ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); + if (rlen > 0) + { + rtStatus = _SUCCESS; +@@ -3379,7 +3725,7 @@ PHY_ConfigRFWithParaFile( + } + else + { +- if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) { ++ if ((pBufLen != NULL) && (*pBufLen != 0) && (pBuf != NULL)) { + _rtw_memcpy(pHalData->para_file_buf, pBuf, *pBufLen); + rtStatus = _SUCCESS; + } +@@ -3626,11 +3972,11 @@ PHY_ConfigRFWithTxPwrTrackParaFile( + + if ((pHalData->rf_tx_pwr_track_len == 0) && (pHalData->rf_tx_pwr_track == NULL)) + { +- rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); ++ rtw_merge_string(rtw_phy_para_file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); + +- if (rtw_is_file_readable(file_path) == _TRUE) ++ if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) + { +- rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); ++ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); + if (rlen > 0) + { + rtStatus = _SUCCESS; +@@ -3728,6 +4074,7 @@ phy_ParsePowerLimitTableFile( + ) + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + u32 i = 0, forCnt = 0; + u8 loadingStage = 0, limitValue = 0, fraction = 0; + char *szLine, *ptmp; +@@ -3744,6 +4091,9 @@ phy_ParsePowerLimitTableFile( + ptmp = buffer; + for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) + { ++ if (isAllSpaceOrTab(szLine, sizeof(*szLine))) ++ continue; ++ + // skip comment + if ( IsCommentString( szLine ) ) { + continue; +@@ -3873,7 +4223,7 @@ phy_ParsePowerLimitTableFile( + + if ( ( szLine[0] != 'c' && szLine[0] != 'C' ) || + ( szLine[1] != 'h' && szLine[1] != 'H' ) ) { +- DBG_871X("Meet wrong channel => power limt pair\n"); ++ DBG_871X("Meet wrong channel => power limt pair '%c','%c'(%d,%d)\n", szLine[0], szLine[1], szLine[0], szLine[1]); + continue; + } + i = 2;// move to the location behind 'h' +@@ -3962,7 +4312,7 @@ phy_ParsePowerLimitTableFile( + //DBG_871X("ch%s => %s\n", channel, powerLimit); + + // store the power limit value +- PHY_SetTxPowerLimit( Adapter, (u8 *)regulation[forCnt], (u8 *)band, ++ PHY_SetTxPowerLimit(pDM_Odm, (u8 *)regulation[forCnt], (u8 *)band, + (u8 *)bandwidth, (u8 *)rateSection, (u8 *)rfPath, (u8 *)channel, (u8 *)powerLimit ); + + } +@@ -3982,7 +4332,7 @@ phy_ParsePowerLimitTableFile( + int + PHY_ConfigRFWithPowerLimitTableParaFile( + IN PADAPTER Adapter, +- IN char* pFileName ++ IN const char *pFileName + ) + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +@@ -3993,13 +4343,12 @@ PHY_ConfigRFWithPowerLimitTableParaFile( + + _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); + +- if ((pHalData->rf_tx_pwr_lmt_len == 0) && (pHalData->rf_tx_pwr_lmt == NULL)) +- { +- rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); ++ if (pHalData->rf_tx_pwr_lmt == NULL) { ++ rtw_merge_string(rtw_phy_para_file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); + +- if (rtw_is_file_readable(file_path) == _TRUE) ++ if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) + { +- rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); ++ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); + if (rlen > 0) + { + rtStatus = _SUCCESS; +@@ -4013,9 +4362,7 @@ PHY_ConfigRFWithPowerLimitTableParaFile( + } + } + } +- } +- else +- { ++ } else { + if ((pHalData->rf_tx_pwr_lmt_len != 0) && (pHalData->rf_tx_pwr_lmt != NULL)) { + _rtw_memcpy(pHalData->para_file_buf, pHalData->rf_tx_pwr_lmt, pHalData->rf_tx_pwr_lmt_len); + rtStatus = _SUCCESS; +@@ -4038,29 +4385,56 @@ PHY_ConfigRFWithPowerLimitTableParaFile( + return rtStatus; + } + +-void phy_free_filebuf(_adapter *padapter) ++void phy_free_filebuf_mask(_adapter *padapter, u8 mask) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- +- if(pHalData->mac_reg) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (pHalData->mac_reg && (mask & LOAD_MAC_PARA_FILE)) { + rtw_vmfree(pHalData->mac_reg, pHalData->mac_reg_len); +- if(pHalData->bb_phy_reg) +- rtw_vmfree(pHalData->bb_phy_reg, pHalData->bb_phy_reg_len); +- if(pHalData->bb_agc_tab) +- rtw_vmfree(pHalData->bb_agc_tab, pHalData->bb_agc_tab_len); +- if(pHalData->bb_phy_reg_pg) ++ pHalData->mac_reg = NULL; ++ } ++ if (mask & LOAD_BB_PARA_FILE) { ++ if (pHalData->bb_phy_reg) { ++ rtw_vmfree(pHalData->bb_phy_reg, pHalData->bb_phy_reg_len); ++ pHalData->bb_phy_reg = NULL; ++ } ++ if (pHalData->bb_agc_tab) { ++ rtw_vmfree(pHalData->bb_agc_tab, pHalData->bb_agc_tab_len); ++ pHalData->bb_agc_tab = NULL; ++ } ++ } ++ if (pHalData->bb_phy_reg_pg && (mask & LOAD_BB_PG_PARA_FILE)) { + rtw_vmfree(pHalData->bb_phy_reg_pg, pHalData->bb_phy_reg_pg_len); +- if(pHalData->bb_phy_reg_mp) ++ pHalData->bb_phy_reg_pg = NULL; ++ } ++ if (pHalData->bb_phy_reg_mp && (mask & LOAD_BB_MP_PARA_FILE)) { + rtw_vmfree(pHalData->bb_phy_reg_mp, pHalData->bb_phy_reg_mp_len); +- if(pHalData->rf_radio_a) +- rtw_vmfree(pHalData->rf_radio_a, pHalData->rf_radio_a_len); +- if(pHalData->rf_radio_b) +- rtw_vmfree(pHalData->rf_radio_b, pHalData->rf_radio_b_len); +- if(pHalData->rf_tx_pwr_track) ++ pHalData->bb_phy_reg_mp = NULL; ++ } ++ if (mask & LOAD_RF_PARA_FILE) { ++ if (pHalData->rf_radio_a) { ++ rtw_vmfree(pHalData->rf_radio_a, pHalData->rf_radio_a_len); ++ pHalData->rf_radio_a = NULL; ++ } ++ if (pHalData->rf_radio_b) { ++ rtw_vmfree(pHalData->rf_radio_b, pHalData->rf_radio_b_len); ++ pHalData->rf_radio_b = NULL; ++ } ++ } ++ if (pHalData->rf_tx_pwr_track && (mask & LOAD_RF_TXPWR_TRACK_PARA_FILE)) { + rtw_vmfree(pHalData->rf_tx_pwr_track, pHalData->rf_tx_pwr_track_len); +- if(pHalData->rf_tx_pwr_lmt) +- rtw_vmfree(pHalData->rf_tx_pwr_lmt, pHalData->rf_tx_pwr_lmt_len); +- ++ pHalData->rf_tx_pwr_track = NULL; ++ } ++ if (pHalData->rf_tx_pwr_lmt && (mask & LOAD_RF_TXPWR_LMT_PARA_FILE)) { ++ rtw_vmfree(pHalData->rf_tx_pwr_lmt, pHalData->rf_tx_pwr_lmt_len); ++ pHalData->rf_tx_pwr_lmt = NULL; ++ } ++} ++ ++inline void phy_free_filebuf(_adapter *padapter) ++{ ++ phy_free_filebuf_mask(padapter, 0xFF); + } + + #endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_dm.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_dm.c +old mode 100755 +new mode 100644 +index 46dab54..83736c6 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_dm.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_dm.c +@@ -1,196 +1,197 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2014 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +- +-#include +-#include +- +-// A mapping from HalData to ODM. +-ODM_BOARD_TYPE_E boardType(u8 InterfaceSel) +-{ +- ODM_BOARD_TYPE_E board = ODM_BOARD_DEFAULT; +- +-#ifdef CONFIG_PCI_HCI +- INTERFACE_SELECT_PCIE pcie = (INTERFACE_SELECT_PCIE)InterfaceSel; +- switch (pcie) +- { +- case INTF_SEL0_SOLO_MINICARD: +- board |= ODM_BOARD_MINICARD; +- break; +- case INTF_SEL1_BT_COMBO_MINICARD: +- board |= ODM_BOARD_BT; +- board |= ODM_BOARD_MINICARD; +- break; +- default: +- board = ODM_BOARD_DEFAULT; +- break; +- } +- +-#elif defined(CONFIG_USB_HCI) +- INTERFACE_SELECT_USB usb = (INTERFACE_SELECT_USB)InterfaceSel; +- switch (usb) +- { +- case INTF_SEL1_USB_High_Power: +- board |= ODM_BOARD_EXT_LNA; +- board |= ODM_BOARD_EXT_PA; +- break; +- case INTF_SEL2_MINICARD: +- board |= ODM_BOARD_MINICARD; +- break; +- case INTF_SEL4_USB_Combo: +- board |= ODM_BOARD_BT; +- break; +- case INTF_SEL5_USB_Combo_MF: +- board |= ODM_BOARD_BT; +- break; +- case INTF_SEL0_USB: +- case INTF_SEL3_USB_Solo: +- default: +- board = ODM_BOARD_DEFAULT; +- break; +- } +- +-#endif +- //DBG_871X("===> boardType(): (pHalData->InterfaceSel, pDM_Odm->BoardType) = (%d, %d)\n", InterfaceSel, board); +- +- return board; +-} +- +-void Init_ODM_ComInfo(_adapter *adapter) +-{ +- struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(adapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +- PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); +- struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; +- struct mlme_priv *pmlmepriv = &adapter->mlmepriv; +- struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); +- int i; +- +- _rtw_memset(pDM_Odm,0,sizeof(*pDM_Odm)); +- +- pDM_Odm->Adapter = adapter; +- +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE); +- +- if (adapter->interface_type == RTW_GSPI) +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO); +- else +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, adapter->interface_type); +- +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->VersionID)); +- +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PATCH_ID, pEEPROM->CustomerID); +- +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, adapter->registrypriv.wifi_spec); +- +- if (pHalData->rf_type == RF_1T1R) { +- ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R); +- } +- else if (pHalData->rf_type == RF_2T2R){ +- ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R); +- } +- else if (pHalData->rf_type == RF_1T2R){ +- ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R); +- } +- +-{ +- //1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE ======= +- u8 odm_board_type = ODM_BOARD_DEFAULT; +- +- if (!IS_HARDWARE_TYPE_OLDER_THAN_8723A(adapter)) +- { +- if (pHalData->ExternalLNA_2G != 0) { +- odm_board_type |= ODM_BOARD_EXT_LNA; +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1); +- } +- if (pHalData->ExternalLNA_5G != 0) { +- odm_board_type |= ODM_BOARD_EXT_LNA_5G; +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_LNA, 1); +- } +- if (pHalData->ExternalPA_2G != 0) { +- odm_board_type |= ODM_BOARD_EXT_PA; +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, 1); +- } +- if (pHalData->ExternalPA_5G != 0) { +- odm_board_type |= ODM_BOARD_EXT_PA_5G; +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_PA, 1); +- } +- if (pHalData->EEPROMBluetoothCoexist) +- odm_board_type |= ODM_BOARD_BT; +- +- } else { +- #ifdef CONFIG_USB_HCI +- if (pHalData->InterfaceSel == INTF_SEL1_USB_High_Power +- || pHalData->BoardType == BOARD_USB_High_PA /* This is legacy code for hal_data.BoardType */ +- ) { +- ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_LNA, 1); +- ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_PA, 1); +- } else +- #endif +- { +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, pHalData->ExternalPA_2G); +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, pHalData->ExternalLNA_2G); +- } +- +- odm_board_type = boardType(pHalData->InterfaceSel); +- } +- +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, odm_board_type); +- //1 ============== End of BoardType ============== +-} +- +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G); +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G); +- +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA); +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_APA, pHalData->TypeAPA); +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GLNA, pHalData->TypeGLNA); +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA); +- +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->RFEType); +- +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0); +- +- /* Pointer reference */ +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_UNI, &(dvobj->traffic_stat.tx_bytes)); +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_UNI, &(dvobj->traffic_stat.rx_bytes)); +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode)); +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BAND, &(pHalData->CurrentBandType)); +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_RATE, &(pHalData->ForcedDataRate)); +- +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(pHalData->nCur40MhzPrimeSC)); +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_MODE, &(adapter->securitypriv.dot11PrivacyAlgrthm)); +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BW, &(pHalData->CurrentChannelBW)); +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_CHNL, &( pHalData->CurrentChannel)); +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_NET_CLOSED, &(adapter->net_closed)); +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb)); +- +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess)); +- ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_POWER_SAVING, &(pwrctl->bpower_saving)); +- +- for(i=0; i ++#include ++ ++// A mapping from HalData to ODM. ++ODM_BOARD_TYPE_E boardType(u8 InterfaceSel) ++{ ++ ODM_BOARD_TYPE_E board = ODM_BOARD_DEFAULT; ++ ++#ifdef CONFIG_PCI_HCI ++ INTERFACE_SELECT_PCIE pcie = (INTERFACE_SELECT_PCIE)InterfaceSel; ++ switch (pcie) ++ { ++ case INTF_SEL0_SOLO_MINICARD: ++ board |= ODM_BOARD_MINICARD; ++ break; ++ case INTF_SEL1_BT_COMBO_MINICARD: ++ board |= ODM_BOARD_BT; ++ board |= ODM_BOARD_MINICARD; ++ break; ++ default: ++ board = ODM_BOARD_DEFAULT; ++ break; ++ } ++ ++#elif defined(CONFIG_USB_HCI) ++ INTERFACE_SELECT_USB usb = (INTERFACE_SELECT_USB)InterfaceSel; ++ switch (usb) ++ { ++ case INTF_SEL1_USB_High_Power: ++ board |= ODM_BOARD_EXT_LNA; ++ board |= ODM_BOARD_EXT_PA; ++ break; ++ case INTF_SEL2_MINICARD: ++ board |= ODM_BOARD_MINICARD; ++ break; ++ case INTF_SEL4_USB_Combo: ++ board |= ODM_BOARD_BT; ++ break; ++ case INTF_SEL5_USB_Combo_MF: ++ board |= ODM_BOARD_BT; ++ break; ++ case INTF_SEL0_USB: ++ case INTF_SEL3_USB_Solo: ++ default: ++ board = ODM_BOARD_DEFAULT; ++ break; ++ } ++ ++#endif ++ //DBG_871X("===> boardType(): (pHalData->InterfaceSel, pDM_Odm->BoardType) = (%d, %d)\n", InterfaceSel, board); ++ ++ return board; ++} ++ ++void Init_ODM_ComInfo(_adapter *adapter) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); ++ int i; ++ ++ _rtw_memset(pDM_Odm,0,sizeof(*pDM_Odm)); ++ ++ pDM_Odm->Adapter = adapter; ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE); ++ ++ rtw_odm_init_ic_type(adapter); ++ ++ if (rtw_get_intf_type(adapter) == RTW_GSPI) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO); ++ else ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, rtw_get_intf_type(adapter)); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->VersionID)); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, adapter->registrypriv.wifi_spec); ++ ++ ++ if (pHalData->rf_type == RF_1T1R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R); ++ else if (pHalData->rf_type == RF_1T2R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R); ++ else if (pHalData->rf_type == RF_2T2R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R); ++ else if (pHalData->rf_type == RF_2T2R_GREEN) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R_GREEN); ++ else if (pHalData->rf_type == RF_2T3R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T3R); ++ else if (pHalData->rf_type == RF_2T4R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T4R); ++ else if (pHalData->rf_type == RF_3T3R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T3R); ++ else if (pHalData->rf_type == RF_3T4R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T4R); ++ else if (pHalData->rf_type == RF_4T4R) ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_4T4R); ++ else ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_XTXR); ++ ++ ++{ ++ //1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE ======= ++ u8 odm_board_type = ODM_BOARD_DEFAULT; ++ ++ if (pHalData->ExternalLNA_2G != 0) { ++ odm_board_type |= ODM_BOARD_EXT_LNA; ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1); ++ } ++ if (pHalData->ExternalLNA_5G != 0) { ++ odm_board_type |= ODM_BOARD_EXT_LNA_5G; ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_LNA, 1); ++ } ++ if (pHalData->ExternalPA_2G != 0) { ++ odm_board_type |= ODM_BOARD_EXT_PA; ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, 1); ++ } ++ if (pHalData->ExternalPA_5G != 0) { ++ odm_board_type |= ODM_BOARD_EXT_PA_5G; ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_PA, 1); ++ } ++ if (pHalData->EEPROMBluetoothCoexist) ++ odm_board_type |= ODM_BOARD_BT; ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, odm_board_type); ++ //1 ============== End of BoardType ============== ++} ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G); ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA); ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_APA, pHalData->TypeAPA); ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GLNA, pHalData->TypeGLNA); ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->RFEType); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType); ++ ++ /* Pointer reference */ ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_UNI, &(dvobj->traffic_stat.tx_bytes)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_UNI, &(dvobj->traffic_stat.rx_bytes)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BAND, &(pHalData->CurrentBandType)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_RATE, &(pHalData->ForcedDataRate)); ++ ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(pHalData->nCur40MhzPrimeSC)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_MODE, &(adapter->securitypriv.dot11PrivacyAlgrthm)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BW, &(pHalData->CurrentChannelBW)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_CHNL, &( pHalData->CurrentChannel)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_NET_CLOSED, &(adapter->net_closed)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb)); ++ ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_POWER_SAVING, &(pwrctl->bpower_saving)); ++ /*Add by Yuchen for phydm beamforming*/ ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_TP, &(dvobj->traffic_stat.cur_tx_tp)); ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_TP, &(dvobj->traffic_stat.cur_rx_tp)); ++#ifdef CONFIG_USB_HCI ++ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_HUBUSBMODE, &(dvobj->usb_speed)); ++#endif ++ for(i=0; i + #include + ++const u32 _chip_type_to_odm_ic_type[] = { ++ 0, ++ ODM_RTL8188E, ++ ODM_RTL8192E, ++ ODM_RTL8812, ++ ODM_RTL8821, ++ ODM_RTL8723B, ++ ODM_RTL8814A, ++ ODM_RTL8703B, ++ ODM_RTL8188F, ++ 0, ++}; ++ + void rtw_hal_chip_configure(_adapter *padapter) + { +- if(padapter->HalFunc.intf_chip_configure) +- padapter->HalFunc.intf_chip_configure(padapter); ++ padapter->HalFunc.intf_chip_configure(padapter); + } + + void rtw_hal_read_chip_info(_adapter *padapter) + { +- if(padapter->HalFunc.read_adapter_info) +- padapter->HalFunc.read_adapter_info(padapter); ++ u8 hci_type = rtw_get_intf_type(padapter); ++ u32 start = rtw_get_current_time(); ++ ++ /* before access eFuse, make sure card enable has been called */ ++ if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI) ++ && !rtw_is_hw_init_completed(padapter)) ++ rtw_hal_power_on(padapter); ++ ++ padapter->HalFunc.read_adapter_info(padapter); ++ ++ if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI) ++ && !rtw_is_hw_init_completed(padapter)) ++ rtw_hal_power_off(padapter); ++ ++ DBG_871X("%s in %d ms\n", __func__, rtw_get_passing_time_ms(start)); + } + + void rtw_hal_read_chip_version(_adapter *padapter) + { +- if(padapter->HalFunc.read_chip_version) +- padapter->HalFunc.read_chip_version(padapter); ++ padapter->HalFunc.read_chip_version(padapter); ++ rtw_odm_init_ic_type(padapter); + } + + void rtw_hal_def_value_init(_adapter *padapter) + { + if (is_primary_adapter(padapter)) { +- if(padapter->HalFunc.init_default_value) +- padapter->HalFunc.init_default_value(padapter); ++ padapter->HalFunc.init_default_value(padapter); + + rtw_init_hal_com_default_value(padapter); + + { + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); +- HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); ++ ++ /* hal_spec is ready here */ ++ dvobj->macid_ctl.num = rtw_min(hal_spec->macid_num, MACID_NUM_SW_LIMIT); ++ ++ dvobj->cam_ctl.sec_cap = hal_spec->sec_cap; ++ dvobj->cam_ctl.num = rtw_min(hal_spec->sec_cam_ent_num, SEC_CAM_ENT_NUM_SW_LIMIT); ++ } ++ } ++} + +- /* hal_data..macid_num is ready here */ +- dvobj->macid_ctl.num = rtw_min(hal_data->macid_num, MACID_NUM_SW_LIMIT); ++u8 rtw_hal_data_init(_adapter *padapter) ++{ ++ if (is_primary_adapter(padapter)) { ++ padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); ++ padapter->HalData = rtw_zvmalloc(padapter->hal_data_sz); ++ if(padapter->HalData == NULL){ ++ DBG_8192C("cant not alloc memory for HAL DATA \n"); ++ return _FAIL; + } + } ++ return _SUCCESS; + } ++ ++void rtw_hal_data_deinit(_adapter *padapter) ++{ ++ if (is_primary_adapter(padapter)) { ++ if (padapter->HalData) ++ { ++ #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ phy_free_filebuf(padapter); ++ #endif ++ rtw_vmfree(padapter->HalData, padapter->hal_data_sz); ++ padapter->HalData = NULL; ++ padapter->hal_data_sz = 0; ++ } ++ } ++} ++ + void rtw_hal_free_data(_adapter *padapter) + { + //free HAL Data +- rtw_hal_data_deinit(padapter); +- +- if (is_primary_adapter(padapter)) +- if(padapter->HalFunc.free_hal_data) +- padapter->HalFunc.free_hal_data(padapter); ++ rtw_hal_data_deinit(padapter); + } + void rtw_hal_dm_init(_adapter *padapter) + { + if (is_primary_adapter(padapter)) { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ padapter->HalFunc.dm_init(padapter); + +- if(padapter->HalFunc.dm_init) +- padapter->HalFunc.dm_init(padapter); ++ _rtw_spinlock_init(&pHalData->IQKSpinLock); + +- _rtw_spinlock_init(&pdmpriv->IQKSpinLock); ++ phy_load_tx_power_ext_info(padapter, 1, 1); + } + } + void rtw_hal_dm_deinit(_adapter *padapter) + { + if (is_primary_adapter(padapter)) { +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + +- if(padapter->HalFunc.dm_deinit) +- padapter->HalFunc.dm_deinit(padapter); ++ padapter->HalFunc.dm_deinit(padapter); + +- _rtw_spinlock_free(&pdmpriv->IQKSpinLock); ++ _rtw_spinlock_free(&pHalData->IQKSpinLock); + } + } + void rtw_hal_sw_led_init(_adapter *padapter) +@@ -104,17 +154,19 @@ void rtw_hal_sw_led_deinit(_adapter *padapter) + } + + u32 rtw_hal_power_on(_adapter *padapter) +-{ +- if(padapter->HalFunc.hal_power_on) +- return padapter->HalFunc.hal_power_on(padapter); +- return _FAIL; ++{ ++ return padapter->HalFunc.hal_power_on(padapter); + } + void rtw_hal_power_off(_adapter *padapter) + { +- if(padapter->HalFunc.hal_power_off) +- padapter->HalFunc.hal_power_off(padapter); ++ struct macid_ctl_t *macid_ctl = &padapter->dvobj->macid_ctl; ++ ++ _rtw_memset(macid_ctl->h2c_msr, 0, MACID_NUM_SW_LIMIT); ++ ++ padapter->HalFunc.hal_power_off(padapter); + } + ++ + void rtw_hal_init_opmode(_adapter *padapter) + { + NDIS_802_11_NETWORK_INFRASTRUCTURE networkType = Ndis802_11InfrastructureMax; +@@ -139,51 +191,17 @@ uint rtw_hal_init(_adapter *padapter) + { + uint status = _SUCCESS; + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + int i; + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- if(padapter->hw_init_completed == _TRUE) +- { +- DBG_871X("rtw_hal_init: hw_init_completed == _TRUE\n"); +- return status; +- } +- +- // before init mac0, driver must init mac1 first to avoid usb rx error. +- if((padapter->pbuddy_adapter != NULL) && (padapter->DualMacConcurrent == _TRUE) +- && (padapter->adapter_type == PRIMARY_ADAPTER)) +- { +- if(padapter->pbuddy_adapter->hw_init_completed == _TRUE) +- { +- DBG_871X("rtw_hal_init: pbuddy_adapter hw_init_completed == _TRUE\n"); +- } +- else +- { +- status = padapter->HalFunc.hal_init(padapter->pbuddy_adapter); +- if(status == _SUCCESS){ +- padapter->pbuddy_adapter->hw_init_completed = _TRUE; +- } +- else{ +- padapter->pbuddy_adapter->hw_init_completed = _FALSE; +- RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail(pbuddy_adapter)\n")); +- DBG_871X("rtw_hal_init: hal__init fail(pbuddy_adapter)\n"); +- return status; +- } +- } +- } +-#endif +- + status = padapter->HalFunc.hal_init(padapter); +- +- if(status == _SUCCESS){ +- +- for (i = 0; iiface_nums; i++) +- dvobj->padapters[i]->hw_init_completed = _TRUE; ++ ++ if (status == _SUCCESS) { ++ pHalData->hw_init_completed = _TRUE; + + if (padapter->registrypriv.notch_filter == 1) + rtw_hal_notch_filter(padapter, 1); + +- rtw_hal_reset_security_engine(padapter); +- + for (i = 0; iiface_nums; i++) + rtw_sec_restore_wep_key(dvobj->padapters[i]); + +@@ -197,10 +215,8 @@ uint rtw_hal_init(_adapter *padapter) + rtw_bb_rf_gain_offset(padapter); + #endif //CONFIG_RF_GAIN_OFFSET + +- } +- else{ +- for (i = 0; iiface_nums; i++) +- dvobj->padapters[i]->hw_init_completed = _FALSE; ++ } else { ++ pHalData->hw_init_completed = _FALSE; + DBG_871X("rtw_hal_init: hal__init fail\n"); + } + +@@ -214,6 +230,7 @@ uint rtw_hal_deinit(_adapter *padapter) + { + uint status = _SUCCESS; + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + int i; + _func_enter_; + +@@ -221,10 +238,7 @@ _func_enter_; + + if(status == _SUCCESS){ + rtw_led_control(padapter, LED_CTL_POWER_OFF); +- for (i = 0; iiface_nums; i++) { +- padapter = dvobj->padapters[i]; +- padapter->hw_init_completed = _FALSE; +- } ++ pHalData->hw_init_completed = _FALSE; + } + else + { +@@ -238,14 +252,12 @@ _func_exit_; + + void rtw_hal_set_hwreg(_adapter *padapter, u8 variable, u8 *val) + { +- if (padapter->HalFunc.SetHwRegHandler) +- padapter->HalFunc.SetHwRegHandler(padapter, variable, val); ++ padapter->HalFunc.SetHwRegHandler(padapter, variable, val); + } + + void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val) + { +- if (padapter->HalFunc.GetHwRegHandler) +- padapter->HalFunc.GetHwRegHandler(padapter, variable, val); ++ padapter->HalFunc.GetHwRegHandler(padapter, variable, val); + } + + #ifdef CONFIG_C2H_PACKET_EN +@@ -258,45 +270,39 @@ void rtw_hal_set_hwreg_with_buf(_adapter *padapter, u8 variable, u8 *pbuf, int l + + u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue) + { +- if(padapter->HalFunc.SetHalDefVarHandler) +- return padapter->HalFunc.SetHalDefVarHandler(padapter,eVariable,pValue); +- return _FAIL; ++ return padapter->HalFunc.SetHalDefVarHandler(padapter,eVariable,pValue); + } + u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue) + { +- if(padapter->HalFunc.GetHalDefVarHandler) +- return padapter->HalFunc.GetHalDefVarHandler(padapter,eVariable,pValue); +- return _FAIL; ++ return padapter->HalFunc.GetHalDefVarHandler(padapter,eVariable,pValue); + } + + void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet) + { +- if(padapter->HalFunc.SetHalODMVarHandler) +- padapter->HalFunc.SetHalODMVarHandler(padapter,eVariable,pValue1,bSet); ++ padapter->HalFunc.SetHalODMVarHandler(padapter,eVariable,pValue1,bSet); + } + void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,PVOID pValue2) + { +- if(padapter->HalFunc.GetHalODMVarHandler) +- padapter->HalFunc.GetHalODMVarHandler(padapter,eVariable,pValue1,pValue2); ++ padapter->HalFunc.GetHalODMVarHandler(padapter,eVariable,pValue1,pValue2); + } + ++/* FOR SDIO & PCIE */ + void rtw_hal_enable_interrupt(_adapter *padapter) + { +- if (padapter->HalFunc.enable_interrupt) +- padapter->HalFunc.enable_interrupt(padapter); +- else +- DBG_871X("%s: HalFunc.enable_interrupt is NULL!\n", __FUNCTION__); +- ++#if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) ++ padapter->HalFunc.enable_interrupt(padapter); ++#endif //#if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) + } ++ ++/* FOR SDIO & PCIE */ + void rtw_hal_disable_interrupt(_adapter *padapter) + { +- if (padapter->HalFunc.disable_interrupt) +- padapter->HalFunc.disable_interrupt(padapter); +- else +- DBG_871X("%s: HalFunc.disable_interrupt is NULL!\n", __FUNCTION__); +- ++#if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) ++ padapter->HalFunc.disable_interrupt(padapter); ++#endif //#if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) + } + ++ + u8 rtw_hal_check_ips_status(_adapter *padapter) + { + u8 val = _FALSE; +@@ -308,45 +314,45 @@ u8 rtw_hal_check_ips_status(_adapter *padapter) + return val; + } + +-#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) +-void rtw_hal_clear_interrupt(_adapter *padapter) ++s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan) + { +- if (padapter->HalFunc.clear_interrupt) +- padapter->HalFunc.clear_interrupt(padapter); +- else +- DBG_871X("%s: HalFunc.clear_interrupt is NULL!\n", __FUNCTION__); ++ return padapter->HalFunc.fw_dl(padapter, wowlan); ++} + ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++void rtw_hal_clear_interrupt(_adapter *padapter) ++{ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ padapter->HalFunc.clear_interrupt(padapter); ++#endif + } + #endif + ++#if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) + u32 rtw_hal_inirp_init(_adapter *padapter) + { +- u32 rst = _FAIL; +- if(padapter->HalFunc.inirp_init) +- rst = padapter->HalFunc.inirp_init(padapter); +- else +- DBG_871X(" %s HalFunc.inirp_init is NULL!!!\n",__FUNCTION__); +- return rst; ++ if (is_primary_adapter(padapter)) ++ return padapter->HalFunc.inirp_init(padapter); ++ return _SUCCESS; + } +- + u32 rtw_hal_inirp_deinit(_adapter *padapter) + { +- +- if(padapter->HalFunc.inirp_deinit) ++ ++ if (is_primary_adapter(padapter)) + return padapter->HalFunc.inirp_deinit(padapter); + +- return _FAIL; +- ++ return _SUCCESS; + } ++#endif //#if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) + ++#if defined(CONFIG_PCI_HCI) + void rtw_hal_irp_reset(_adapter *padapter) + { +- if(padapter->HalFunc.irp_reset) +- padapter->HalFunc.irp_reset(padapter); +- else +- DBG_871X("%s: HalFunc.rtw_hal_irp_reset is NULL!\n", __FUNCTION__); ++ padapter->HalFunc.irp_reset(padapter); + } ++#endif //#if defined(CONFIG_PCI_HCI) + ++/* for USB Auto-suspend */ + u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val) + { + if(padapter->HalFunc.interface_ps_func) +@@ -356,18 +362,12 @@ u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val) + + s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) + { +- if(padapter->HalFunc.hal_xmitframe_enqueue) +- return padapter->HalFunc.hal_xmitframe_enqueue(padapter, pxmitframe); +- +- return _FALSE; ++ return padapter->HalFunc.hal_xmitframe_enqueue(padapter, pxmitframe); + } + + s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) + { +- if(padapter->HalFunc.hal_xmit) +- return padapter->HalFunc.hal_xmit(padapter, pxmitframe); +- +- return _FALSE; ++ return padapter->HalFunc.hal_xmit(padapter, pxmitframe); + } + + /* +@@ -376,59 +376,60 @@ s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) + s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) + { + s32 ret = _FAIL; +- unsigned char *pframe; ++ u8 *pframe, subtype; + struct rtw_ieee80211_hdr *pwlanhdr; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ + update_mgntframe_attrib_addr(padapter, pmgntframe); +- //pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ subtype = GetFrameSubType(pframe); /* bit(7)~bit(2) */ ++ + //pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + //_rtw_memcpy(pmgntframe->attrib.ra, pwlanhdr->addr1, ETH_ALEN); + + #ifdef CONFIG_IEEE80211W +- if(padapter->securitypriv.binstallBIPkey == _TRUE) ++ if (padapter->securitypriv.binstallBIPkey == _TRUE && (subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC || ++ subtype == WIFI_ACTION)) + { +- if(IS_MCAST(pmgntframe->attrib.ra)) +- { ++ if (IS_MCAST(pmgntframe->attrib.ra) && pmgntframe->attrib.key_type != IEEE80211W_NO_KEY) { + pmgntframe->attrib.encrypt = _BIP_; +- //pmgntframe->attrib.bswenc = _TRUE; +- } +- else +- { +- pmgntframe->attrib.encrypt = _AES_; +- pmgntframe->attrib.bswenc = _TRUE; ++ /* pmgntframe->attrib.bswenc = _TRUE; */ ++ } else if (pmgntframe->attrib.key_type != IEEE80211W_NO_KEY) { ++ psta = rtw_get_stainfo(pstapriv, pmgntframe->attrib.ra); ++ if (psta && psta->bpairwise_key_installed == _TRUE) { ++ pmgntframe->attrib.encrypt = _AES_; ++ pmgntframe->attrib.bswenc = _TRUE; ++ } else { ++ DBG_871X("%s, %d, bpairwise_key_installed is FALSE\n", __func__, __LINE__); ++ goto no_mgmt_coalesce; ++ } + } ++ DBG_871X("encrypt=%d, bswenc=%d\n", pmgntframe->attrib.encrypt, pmgntframe->attrib.bswenc); + rtw_mgmt_xmitframe_coalesce(padapter, pmgntframe->pkt, pmgntframe); + } + #endif //CONFIG_IEEE80211W +- +- if(padapter->HalFunc.mgnt_xmit) +- ret = padapter->HalFunc.mgnt_xmit(padapter, pmgntframe); ++no_mgmt_coalesce: ++ ret = padapter->HalFunc.mgnt_xmit(padapter, pmgntframe); + return ret; + } + + s32 rtw_hal_init_xmit_priv(_adapter *padapter) + { +- if(padapter->HalFunc.init_xmit_priv != NULL) +- return padapter->HalFunc.init_xmit_priv(padapter); +- return _FAIL; ++ return padapter->HalFunc.init_xmit_priv(padapter); + } + void rtw_hal_free_xmit_priv(_adapter *padapter) + { +- if(padapter->HalFunc.free_xmit_priv != NULL) +- padapter->HalFunc.free_xmit_priv(padapter); ++ padapter->HalFunc.free_xmit_priv(padapter); + } + + s32 rtw_hal_init_recv_priv(_adapter *padapter) + { +- if(padapter->HalFunc.init_recv_priv) +- return padapter->HalFunc.init_recv_priv(padapter); +- +- return _FAIL; ++ return padapter->HalFunc.init_recv_priv(padapter); + } + void rtw_hal_free_recv_priv(_adapter *padapter) + { +- +- if(padapter->HalFunc.free_recv_priv) +- padapter->HalFunc.free_recv_priv(padapter); ++ padapter->HalFunc.free_recv_priv(padapter); + } + + void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level) +@@ -449,28 +450,34 @@ void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level) + } + else + { +- if(padapter->HalFunc.UpdateRAMaskHandler) +- padapter->HalFunc.UpdateRAMaskHandler(padapter, psta->mac_id, rssi_level); ++ padapter->HalFunc.UpdateRAMaskHandler(padapter, psta->mac_id, rssi_level); + } + } + +-void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8* arg, u8 rssi_level) ++void rtw_hal_add_ra_tid(_adapter *padapter, u64 bitmap, u8 *arg, u8 rssi_level) + { +- if(padapter->HalFunc.Add_RateATid) +- padapter->HalFunc.Add_RateATid(padapter, bitmap, arg, rssi_level); ++ padapter->HalFunc.Add_RateATid(padapter, bitmap, arg, rssi_level); + } + + /* Start specifical interface thread */ + void rtw_hal_start_thread(_adapter *padapter) + { +- if(padapter->HalFunc.run_thread) +- padapter->HalFunc.run_thread(padapter); ++#if defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) ++#ifndef CONFIG_SDIO_TX_TASKLET ++ padapter->HalFunc.run_thread(padapter); ++#endif ++#endif + } + /* Start specifical interface thread */ + void rtw_hal_stop_thread(_adapter *padapter) + { +- if(padapter->HalFunc.cancel_thread) +- padapter->HalFunc.cancel_thread(padapter); ++#if defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) ++#ifndef CONFIG_SDIO_TX_TASKLET ++ ++ padapter->HalFunc.cancel_thread(padapter); ++ ++#endif ++#endif + } + + u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask) +@@ -486,39 +493,66 @@ void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data) + padapter->HalFunc.write_bbreg(padapter, RegAddr, BitMask, Data); + } + +-u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask) ++u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask) + { + u32 data = 0; +- if( padapter->HalFunc.read_rfreg) ++ ++ if (padapter->HalFunc.read_rfreg) { + data = padapter->HalFunc.read_rfreg(padapter, eRFPath, RegAddr, BitMask); ++ ++ if (match_rf_read_sniff_ranges(eRFPath, RegAddr, BitMask)) { ++ DBG_871X("DBG_IO rtw_hal_read_rfreg(%u, 0x%04x, 0x%08x) read:0x%08x(0x%08x)\n" ++ , eRFPath, RegAddr, BitMask, (data << PHY_CalculateBitShift(BitMask)), data); ++ } ++ } ++ + return data; + } +-void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data) ++ ++void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data) + { +- if(padapter->HalFunc.write_rfreg) +- padapter->HalFunc.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data); ++ if (padapter->HalFunc.write_rfreg) { ++ ++ if (match_rf_write_sniff_ranges(eRFPath, RegAddr, BitMask)) { ++ DBG_871X("DBG_IO rtw_hal_write_rfreg(%u, 0x%04x, 0x%08x) write:0x%08x(0x%08x)\n" ++ , eRFPath, RegAddr, BitMask, (Data << PHY_CalculateBitShift(BitMask)), Data); ++ } ++ ++ padapter->HalFunc.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data); ++ ++#ifdef CONFIG_PCI_HCI ++ if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(padapter)) /*For N-Series IC, suggest by Jenyu*/ ++ rtw_udelay_os(2); ++#endif ++ } + } + ++#if defined(CONFIG_PCI_HCI) + s32 rtw_hal_interrupt_handler(_adapter *padapter) + { +- if(padapter->HalFunc.interrupt_handler) +- return padapter->HalFunc.interrupt_handler(padapter); +- return _FAIL; ++ s32 ret = _FAIL; ++ ret = padapter->HalFunc.interrupt_handler(padapter); ++ return ret; + } ++#endif ++#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) ++void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf) ++{ ++ padapter->HalFunc.interrupt_handler(padapter, pkt_len, pbuf); ++} ++#endif + + void rtw_hal_set_bwmode(_adapter *padapter, CHANNEL_WIDTH Bandwidth, u8 Offset) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + +- if(padapter->HalFunc.set_bwmode_handler) +- { +- ODM_AcquireSpinLock( pDM_Odm, RT_IQK_SPINLOCK); +- if(pDM_Odm->RFCalibrateInfo.bIQKInProgress == _TRUE) +- DBG_871X_LEVEL(_drv_err_, "%s, %d, IQK may race condition\n", __func__,__LINE__); +- ODM_ReleaseSpinLock( pDM_Odm, RT_IQK_SPINLOCK); +- padapter->HalFunc.set_bwmode_handler(padapter, Bandwidth, Offset); +- } ++ ODM_AcquireSpinLock( pDM_Odm, RT_IQK_SPINLOCK); ++ if(pDM_Odm->RFCalibrateInfo.bIQKInProgress == _TRUE) ++ DBG_871X_LEVEL(_drv_err_, "%s, %d, IQK may race condition\n", __func__,__LINE__); ++ ODM_ReleaseSpinLock( pDM_Odm, RT_IQK_SPINLOCK); ++ padapter->HalFunc.set_bwmode_handler(padapter, Bandwidth, Offset); ++ + } + + void rtw_hal_set_chan(_adapter *padapter, u8 channel) +@@ -526,14 +560,11 @@ void rtw_hal_set_chan(_adapter *padapter, u8 channel) + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + +- if(padapter->HalFunc.set_channel_handler) +- { +- ODM_AcquireSpinLock( pDM_Odm, RT_IQK_SPINLOCK); +- if(pDM_Odm->RFCalibrateInfo.bIQKInProgress == _TRUE) +- DBG_871X_LEVEL(_drv_err_, "%s, %d, IQK may race condition\n", __func__,__LINE__); +- ODM_ReleaseSpinLock( pDM_Odm, RT_IQK_SPINLOCK); +- padapter->HalFunc.set_channel_handler(padapter, channel); +- } ++ ODM_AcquireSpinLock( pDM_Odm, RT_IQK_SPINLOCK); ++ if(pDM_Odm->RFCalibrateInfo.bIQKInProgress == _TRUE) ++ DBG_871X_LEVEL(_drv_err_, "%s, %d, IQK may race condition\n", __func__,__LINE__); ++ ODM_ReleaseSpinLock( pDM_Odm, RT_IQK_SPINLOCK); ++ padapter->HalFunc.set_channel_handler(padapter, channel); + } + + void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, CHANNEL_WIDTH Bandwidth, u8 Offset40, u8 Offset80) +@@ -541,14 +572,11 @@ void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, CHANNEL_WIDTH Bandwidth + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + +- if(padapter->HalFunc.set_chnl_bw_handler) +- { +- ODM_AcquireSpinLock( pDM_Odm, RT_IQK_SPINLOCK); +- if(pDM_Odm->RFCalibrateInfo.bIQKInProgress == _TRUE) +- DBG_871X_LEVEL(_drv_err_, "%s, %d, IQK may race condition\n", __func__,__LINE__); +- ODM_ReleaseSpinLock( pDM_Odm, RT_IQK_SPINLOCK); +- padapter->HalFunc.set_chnl_bw_handler(padapter, channel, Bandwidth, Offset40, Offset80); +- } ++ ODM_AcquireSpinLock( pDM_Odm, RT_IQK_SPINLOCK); ++ if(pDM_Odm->RFCalibrateInfo.bIQKInProgress == _TRUE) ++ DBG_871X_LEVEL(_drv_err_, "%s, %d, IQK may race condition\n", __func__,__LINE__); ++ ODM_ReleaseSpinLock( pDM_Odm, RT_IQK_SPINLOCK); ++ padapter->HalFunc.set_chnl_bw_handler(padapter, channel, Bandwidth, Offset40, Offset80); + } + + void rtw_hal_set_tx_power_level(_adapter *padapter, u8 channel) +@@ -565,16 +593,14 @@ void rtw_hal_get_tx_power_level(_adapter *padapter, s32 *powerlevel) + + void rtw_hal_dm_watchdog(_adapter *padapter) + { +-#if defined(CONFIG_CONCURRENT_MODE) +- if (padapter->adapter_type != PRIMARY_ADAPTER) ++ if (!is_primary_adapter(padapter)) + return; +-#endif + +- if(padapter->HalFunc.hal_dm_watchdog) +- padapter->HalFunc.hal_dm_watchdog(padapter); ++ padapter->HalFunc.hal_dm_watchdog(padapter); + + } + ++#ifdef CONFIG_LPS_LCLK_WD_TIMER + void rtw_hal_dm_watchdog_in_lps(_adapter *padapter) + { + #if defined(CONFIG_CONCURRENT_MODE) +@@ -582,35 +608,16 @@ void rtw_hal_dm_watchdog_in_lps(_adapter *padapter) + return; + #endif + +- if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode ==_TRUE ) +- { +- if(padapter->HalFunc.hal_dm_watchdog_in_lps) +- { +- padapter->HalFunc.hal_dm_watchdog_in_lps(padapter);//this fuction caller is in interrupt context +- } ++ if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode ==_TRUE ) { ++ padapter->HalFunc.hal_dm_watchdog_in_lps(padapter);//this fuction caller is in interrupt context + } + } ++#endif + + void rtw_hal_bcn_related_reg_setting(_adapter *padapter) +-{ +- if(padapter->HalFunc.SetBeaconRelatedRegistersHandler) +- padapter->HalFunc.SetBeaconRelatedRegistersHandler(padapter); +-} +- +- +-#ifdef CONFIG_ANTENNA_DIVERSITY +-u8 rtw_hal_antdiv_before_linked(_adapter *padapter) + { +- if(padapter->HalFunc.AntDivBeforeLinkHandler) +- return padapter->HalFunc.AntDivBeforeLinkHandler(padapter); +- return _FALSE; +-} +-void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) +-{ +- if(padapter->HalFunc.AntDivCompareHandler) +- padapter->HalFunc.AntDivCompareHandler(padapter, dst, src); ++ padapter->HalFunc.SetBeaconRelatedRegistersHandler(padapter); + } +-#endif + + #ifdef CONFIG_HOSTAPD_MLME + s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) +@@ -624,21 +631,17 @@ s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) + #ifdef DBG_CONFIG_ERROR_DETECT + void rtw_hal_sreset_init(_adapter *padapter) + { +- if(padapter->HalFunc.sreset_init_value) +- padapter->HalFunc.sreset_init_value(padapter); ++ padapter->HalFunc.sreset_init_value(padapter); + } + void rtw_hal_sreset_reset(_adapter *padapter) + { + padapter = GET_PRIMARY_ADAPTER(padapter); +- +- if(padapter->HalFunc.silentreset) +- padapter->HalFunc.silentreset(padapter); ++ padapter->HalFunc.silentreset(padapter); + } + + void rtw_hal_sreset_reset_value(_adapter *padapter) + { +- if(padapter->HalFunc.sreset_reset_value) +- padapter->HalFunc.sreset_reset_value(padapter); ++ padapter->HalFunc.sreset_reset_value(padapter); + } + + void rtw_hal_sreset_xmit_status_check(_adapter *padapter) +@@ -646,34 +649,23 @@ void rtw_hal_sreset_xmit_status_check(_adapter *padapter) + if (!is_primary_adapter(padapter)) + return; + +- if(padapter->HalFunc.sreset_xmit_status_check) +- padapter->HalFunc.sreset_xmit_status_check(padapter); ++ padapter->HalFunc.sreset_xmit_status_check(padapter); + } + void rtw_hal_sreset_linked_status_check(_adapter *padapter) + { + if (!is_primary_adapter(padapter)) + return; +- +- if(padapter->HalFunc.sreset_linked_status_check) +- padapter->HalFunc.sreset_linked_status_check(padapter); ++ padapter->HalFunc.sreset_linked_status_check(padapter); + } + u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter) +-{ +- u8 status = 0; +- if(padapter->HalFunc.sreset_get_wifi_status) +- status = padapter->HalFunc.sreset_get_wifi_status(padapter); +- return status; ++{ ++ return padapter->HalFunc.sreset_get_wifi_status(padapter); + } + + bool rtw_hal_sreset_inprogress(_adapter *padapter) + { +- bool inprogress = _FALSE; +- + padapter = GET_PRIMARY_ADAPTER(padapter); +- +- if(padapter->HalFunc.sreset_inprogress) +- inprogress = padapter->HalFunc.sreset_inprogress(padapter); +- return inprogress; ++ return padapter->HalFunc.sreset_inprogress(padapter); + } + #endif //DBG_CONFIG_ERROR_DETECT + +@@ -688,10 +680,8 @@ int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wat + + #ifdef CONFIG_XMIT_THREAD_MODE + s32 rtw_hal_xmit_thread_handler(_adapter *padapter) +-{ +- if(padapter->HalFunc.xmit_thread_handler) +- return padapter->HalFunc.xmit_thread_handler(padapter); +- return _FAIL; ++{ ++ return padapter->HalFunc.xmit_thread_handler(padapter); + } + #endif + +@@ -701,19 +691,13 @@ void rtw_hal_notch_filter(_adapter *adapter, bool enable) + adapter->HalFunc.hal_notch_filter(adapter,enable); + } + +-void rtw_hal_reset_security_engine(_adapter * adapter) +-{ +- if(adapter->HalFunc.hal_reset_security_engine) +- adapter->HalFunc.hal_reset_security_engine(adapter); +-} +- + bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf) + { + HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter); + HAL_VERSION *hal_ver = &HalData->VersionID; + bool ret = _FAIL; + +- if (IS_81XXC(*hal_ver) || IS_8723_SERIES(*hal_ver) ||IS_92D(*hal_ver) ||IS_8188E(*hal_ver)) { ++ if (IS_8188E(*hal_ver)) { + ret = c2h_evt_valid((struct c2h_evt_hdr *)buf); + } else if(IS_8192E(*hal_ver) || IS_8812_SERIES(*hal_ver) || IS_8821_SERIES(*hal_ver) || IS_8723B_SERIES(*hal_ver)) { + ret = c2h_evt_valid((struct c2h_evt_hdr_88xx*)buf); +@@ -730,7 +714,7 @@ s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf) + HAL_VERSION *hal_ver = &HalData->VersionID; + s32 ret = _FAIL; + +- if (IS_81XXC(*hal_ver) || IS_8723_SERIES(*hal_ver) ||IS_92D(*hal_ver) ||IS_8188E(*hal_ver)) { ++ if (IS_8188E(*hal_ver)) { + ret = c2h_evt_read(adapter, buf); + } else if(IS_8192E(*hal_ver) || IS_8812_SERIES(*hal_ver) || IS_8821_SERIES(*hal_ver) || IS_8723B_SERIES(*hal_ver)) { + ret = c2h_evt_read_88xx(adapter, buf); +@@ -805,16 +789,332 @@ s32 rtw_hal_macid_wakeup(PADAPTER padapter, u8 macid) + + s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) + { +- s32 ret = _FAIL; ++ _adapter *pri_adapter = GET_PRIMARY_ADAPTER(padapter); + +- if (padapter->HalFunc.fill_h2c_cmd) +- ret = padapter->HalFunc.fill_h2c_cmd(padapter, ElementID, CmdLen, pCmdBuffer); +- else +- { +- DBG_871X("%s: func[fill_h2c_cmd] not defined!\n", __FUNCTION__); +- rtw_warn_on(1); +- } ++ if (pri_adapter->bFWReady == _TRUE) ++ return padapter->HalFunc.fill_h2c_cmd(padapter, ElementID, CmdLen, pCmdBuffer); ++ else if (padapter->registrypriv.mp_mode == 0) ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" FW doesn't exit when no MP mode, by pass H2C id:0x%02x\n" ++ , FUNC_ADPT_ARG(padapter), ElementID); ++ return _FAIL; ++} ++ ++void rtw_hal_fill_fake_txdesc(_adapter* padapter, u8* pDesc, u32 BufferLen, ++ u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame) ++{ ++ padapter->HalFunc.fill_fake_txdesc(padapter, pDesc, BufferLen,IsPsPoll, IsBTQosNull, bDataFrame); ++ ++} ++u8 rtw_hal_get_txbuff_rsvd_page_num(_adapter *adapter, bool wowlan) ++{ ++ return adapter->HalFunc.hal_get_tx_buff_rsvd_page_num(adapter, wowlan); ++} ++ ++#ifdef CONFIG_GPIO_API ++void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag) ++{ ++ if (padapter->HalFunc.update_hisr_hsisr_ind) ++ padapter->HalFunc.update_hisr_hsisr_ind(padapter, flag); ++} ++ ++int rtw_hal_gpio_func_check(_adapter *padapter, u8 gpio_num) ++{ ++ int ret = _SUCCESS; ++ ++ if (padapter->HalFunc.hal_gpio_func_check) ++ ret= padapter->HalFunc.hal_gpio_func_check(padapter, gpio_num); + + return ret; + } + ++void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num) ++{ ++ if (padapter->HalFunc.hal_gpio_multi_func_reset) ++ padapter->HalFunc.hal_gpio_multi_func_reset(padapter, gpio_num); ++} ++#endif ++ ++void rtw_hal_fw_correct_bcn(_adapter *padapter) ++{ ++ if (padapter->HalFunc.fw_correct_bcn) ++ padapter->HalFunc.fw_correct_bcn(padapter); ++} ++ ++#define rtw_hal_error_msg(ops_fun) \ ++ DBG_871X_LEVEL(_drv_always_, "### %s - Error : Please hook HalFunc.%s ###\n",__FUNCTION__,ops_fun) ++ ++u8 rtw_hal_ops_check(_adapter *padapter) ++{ ++ u8 ret = _SUCCESS; ++#if 1 ++ /*** initialize section ***/ ++ if (NULL == padapter->HalFunc.read_chip_version) { ++ rtw_hal_error_msg("read_chip_version"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.init_default_value) { ++ rtw_hal_error_msg("init_default_value"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.intf_chip_configure) { ++ rtw_hal_error_msg("intf_chip_configure"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.read_adapter_info) { ++ rtw_hal_error_msg("read_adapter_info"); ++ ret = _FAIL; ++ } ++ ++ if (NULL == padapter->HalFunc.hal_power_on) { ++ rtw_hal_error_msg("hal_power_on"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.hal_power_off) { ++ rtw_hal_error_msg("hal_power_off"); ++ ret = _FAIL; ++ } ++ ++ if (NULL == padapter->HalFunc.hal_init) { ++ rtw_hal_error_msg("hal_init"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.hal_deinit) { ++ rtw_hal_error_msg("hal_deinit"); ++ ret = _FAIL; ++ } ++ ++ /*** xmit section ***/ ++ if (NULL == padapter->HalFunc.init_xmit_priv) { ++ rtw_hal_error_msg("init_xmit_priv"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.free_xmit_priv) { ++ rtw_hal_error_msg("free_xmit_priv"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.hal_xmit) { ++ rtw_hal_error_msg("hal_xmit"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.mgnt_xmit) { ++ rtw_hal_error_msg("mgnt_xmit"); ++ ret = _FAIL; ++ } ++ #ifdef CONFIG_XMIT_THREAD_MODE ++ if (NULL == padapter->HalFunc.xmit_thread_handler) { ++ rtw_hal_error_msg("xmit_thread_handler"); ++ ret = _FAIL; ++ } ++ #endif ++ if (NULL == padapter->HalFunc.hal_xmitframe_enqueue) { ++ rtw_hal_error_msg("hal_xmitframe_enqueue"); ++ ret = _FAIL; ++ } ++ #if defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) ++ #ifndef CONFIG_SDIO_TX_TASKLET ++ if (NULL == padapter->HalFunc.run_thread) { ++ rtw_hal_error_msg("run_thread"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.cancel_thread) { ++ rtw_hal_error_msg("cancel_thread"); ++ ret = _FAIL; ++ } ++ #endif ++ #endif ++ ++ /*** recv section ***/ ++ if (NULL == padapter->HalFunc.init_recv_priv) { ++ rtw_hal_error_msg("init_recv_priv"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.free_recv_priv) { ++ rtw_hal_error_msg("free_recv_priv"); ++ ret = _FAIL; ++ } ++ #if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) ++ if (NULL == padapter->HalFunc.inirp_init) { ++ rtw_hal_error_msg("inirp_init"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.inirp_deinit) { ++ rtw_hal_error_msg("inirp_deinit"); ++ ret = _FAIL; ++ } ++ #endif //#if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) ++ ++ ++ /*** interrupt hdl section ***/ ++ #if defined(CONFIG_PCI_HCI) ++ if (NULL == padapter->HalFunc.irp_reset) { ++ rtw_hal_error_msg("irp_reset"); ++ ret = _FAIL; ++ } ++ #endif/*#if defined(CONFIG_PCI_HCI)*/ ++ #if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)) ++ if (NULL == padapter->HalFunc.interrupt_handler) { ++ rtw_hal_error_msg("interrupt_handler"); ++ ret = _FAIL; ++ } ++ #endif /*#if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT))*/ ++ ++ #if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) ++ if (NULL == padapter->HalFunc.enable_interrupt) { ++ rtw_hal_error_msg("enable_interrupt"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.disable_interrupt) { ++ rtw_hal_error_msg("disable_interrupt"); ++ ret = _FAIL; ++ } ++ #endif //defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) ++ ++ ++ /*** DM section ***/ ++ if (NULL == padapter->HalFunc.dm_init) { ++ rtw_hal_error_msg("dm_init"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.dm_deinit) { ++ rtw_hal_error_msg("dm_deinit"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.hal_dm_watchdog) { ++ rtw_hal_error_msg("hal_dm_watchdog"); ++ ret = _FAIL; ++ } ++ #ifdef CONFIG_LPS_LCLK_WD_TIMER ++ if (NULL == padapter->HalFunc.hal_dm_watchdog_in_lps) { ++ rtw_hal_error_msg("hal_dm_watchdog_in_lps"); ++ ret = _FAIL; ++ } ++ #endif ++ ++ /*** xxx section ***/ ++ if (NULL == padapter->HalFunc.set_bwmode_handler) { ++ rtw_hal_error_msg("set_bwmode_handler"); ++ ret = _FAIL; ++ } ++ ++ if (NULL == padapter->HalFunc.set_channel_handler) { ++ rtw_hal_error_msg("set_channel_handler"); ++ ret = _FAIL; ++ } ++ ++ if (NULL == padapter->HalFunc.set_chnl_bw_handler) { ++ rtw_hal_error_msg("set_chnl_bw_handler"); ++ ret = _FAIL; ++ } ++ ++ if (NULL == padapter->HalFunc.SetHwRegHandler) { ++ rtw_hal_error_msg("SetHwRegHandler"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.GetHwRegHandler) { ++ rtw_hal_error_msg("GetHwRegHandler"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.GetHalDefVarHandler) { ++ rtw_hal_error_msg("GetHalDefVarHandler"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.SetHalDefVarHandler) { ++ rtw_hal_error_msg("SetHalDefVarHandler"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.GetHalODMVarHandler) { ++ rtw_hal_error_msg("GetHalODMVarHandler"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.SetHalODMVarHandler) { ++ rtw_hal_error_msg("SetHalODMVarHandler"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.UpdateRAMaskHandler) { ++ rtw_hal_error_msg("UpdateRAMaskHandler"); ++ ret = _FAIL; ++ } ++ ++ if (NULL == padapter->HalFunc.SetBeaconRelatedRegistersHandler) { ++ rtw_hal_error_msg("SetBeaconRelatedRegistersHandler"); ++ ret = _FAIL; ++ } ++ ++ if (NULL == padapter->HalFunc.Add_RateATid) { ++ rtw_hal_error_msg("Add_RateATid"); ++ ret = _FAIL; ++ } ++ ++ if (NULL == padapter->HalFunc.fill_h2c_cmd) { ++ rtw_hal_error_msg("fill_h2c_cmd"); ++ ret = _FAIL; ++ } ++ #if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++ if (NULL == padapter->HalFunc.fill_fake_txdesc) { ++ rtw_hal_error_msg("fill_fake_txdesc"); ++ ret = _FAIL; ++ } ++ #endif ++ if (NULL == padapter->HalFunc.hal_get_tx_buff_rsvd_page_num) { ++ rtw_hal_error_msg("hal_get_tx_buff_rsvd_page_num"); ++ ret = _FAIL; ++ } ++ ++ #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++ #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ if (NULL == padapter->HalFunc.clear_interrupt) { ++ rtw_hal_error_msg("clear_interrupt"); ++ ret = _FAIL; ++ } ++ #endif ++ #endif /* CONFIG_WOWLAN */ ++ ++ if (NULL == padapter->HalFunc.fw_dl) { ++ rtw_hal_error_msg("fw_dl"); ++ ret = _FAIL; ++ } ++ ++ if ((IS_HARDWARE_TYPE_8814A(padapter) ++ || IS_HARDWARE_TYPE_8822BU(padapter) || IS_HARDWARE_TYPE_8822BS(padapter)) ++ && NULL == padapter->HalFunc.fw_correct_bcn) { ++ rtw_hal_error_msg("fw_correct_bcn"); ++ ret = _FAIL; ++ } ++ ++ ++ /*** SReset section ***/ ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ if (NULL == padapter->HalFunc.sreset_init_value) { ++ rtw_hal_error_msg("sreset_init_value"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.sreset_reset_value) { ++ rtw_hal_error_msg("sreset_reset_value"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.silentreset) { ++ rtw_hal_error_msg("silentreset"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.sreset_xmit_status_check) { ++ rtw_hal_error_msg("sreset_xmit_status_check"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.sreset_linked_status_check) { ++ rtw_hal_error_msg("sreset_linked_status_check"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.sreset_get_wifi_status) { ++ rtw_hal_error_msg("sreset_get_wifi_status"); ++ ret = _FAIL; ++ } ++ if (NULL == padapter->HalFunc.sreset_inprogress) { ++ rtw_hal_error_msg("sreset_inprogress"); ++ ret = _FAIL; ++ } ++ #endif //#ifdef DBG_CONFIG_ERROR_DETECT ++ ++#endif ++ return ret; ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_mp.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_mp.c +new file mode 100644 +index 0000000..03b505a +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_mp.c +@@ -0,0 +1,2155 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _HAL_MP_C_ ++#ifdef CONFIG_MP_INCLUDED ++ ++#ifdef CONFIG_RTL8188E ++#include ++#endif ++#ifdef CONFIG_RTL8723B ++#include ++#endif ++#ifdef CONFIG_RTL8192E ++#include ++#endif ++#ifdef CONFIG_RTL8814A ++#include ++#endif ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++#include ++#endif ++#ifdef CONFIG_RTL8703B ++#include ++#endif ++#ifdef CONFIG_RTL8188F ++#include ++#endif ++ ++ ++u8 MgntQuery_NssTxRate(u16 Rate) ++{ ++ u8 NssNum = RF_TX_NUM_NONIMPLEMENT; ++ ++ if ((Rate >= MGN_MCS8 && Rate <= MGN_MCS15) || ++ (Rate >= MGN_VHT2SS_MCS0 && Rate <= MGN_VHT2SS_MCS9)) ++ NssNum = RF_2TX; ++ else if ((Rate >= MGN_MCS16 && Rate <= MGN_MCS23) || ++ (Rate >= MGN_VHT3SS_MCS0 && Rate <= MGN_VHT3SS_MCS9)) ++ NssNum = RF_3TX; ++ else if ((Rate >= MGN_MCS24 && Rate <= MGN_MCS31) || ++ (Rate >= MGN_VHT4SS_MCS0 && Rate <= MGN_VHT4SS_MCS9)) ++ NssNum = RF_4TX; ++ else ++ NssNum = RF_1TX; ++ ++ return NssNum; ++} ++ ++void hal_mpt_SwitchRfSetting(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u8 ChannelToSw = pMptCtx->MptChannelToSw; ++ ULONG ulRateIdx = pMptCtx->MptRateIndex; ++ ULONG ulbandwidth = pMptCtx->MptBandWidth; ++ ++ /* <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis.*/ ++ if (IS_HARDWARE_TYPE_8188ES(pAdapter) && (1 <= ChannelToSw && ChannelToSw <= 11) && ++ (ulRateIdx == MPT_RATE_MCS0 || ulRateIdx == MPT_RATE_1M || ulRateIdx == MPT_RATE_6M)) { ++ pMptCtx->backup0x52_RF_A = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0); ++ pMptCtx->backup0x52_RF_B = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0); ++ ++ if ((PlatformEFIORead4Byte(pAdapter, 0xF4)&BIT29) == BIT29) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0xB); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0xB); ++ } else { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0xD); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0xD); ++ } ++ } else if (IS_HARDWARE_TYPE_8188EE(pAdapter)) { /* <20140903, VincentL> Asked by RF Eason and Edlu*/ ++ ++ if (ChannelToSw == 3 && ulbandwidth == MPT_BW_40MHZ) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ ++ } else { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ ++ } ++ ++ } else if (IS_HARDWARE_TYPE_8188E(pAdapter)) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_A); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_B); ++ } ++} ++ ++s32 hal_mpt_SetPowerTracking(PADAPTER padapter, u8 enable) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ ++ ++ if (!netif_running(padapter->pnetdev)) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: interface not opened!\n")); ++ return _FAIL; ++ } ++ ++ if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: not in MP mode!\n")); ++ return _FAIL; ++ } ++ if (enable) ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; ++ else ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE; ++ ++ return _SUCCESS; ++} ++ ++void hal_mpt_GetPowerTracking(PADAPTER padapter, u8 *enable) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ ++ ++ *enable = pDM_Odm->RFCalibrateInfo.TxPowerTrackControl; ++} ++ ++ ++void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) ++{ ++ u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; ++ u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; ++ u8 i; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); ++ u1Byte u1Channel = pHalData->CurrentChannel; ++ ULONG ulRateIdx = pMptCtx->MptRateIndex; ++ u1Byte DataRate = 0xFF; ++ ++ DataRate = MptToMgntRate(ulRateIdx); ++ ++ if (u1Channel == 14 && IS_CCK_RATE(DataRate)) ++ pHalData->bCCKinCH14 = TRUE; ++ else ++ pHalData->bCCKinCH14 = FALSE; ++ ++ if (IS_HARDWARE_TYPE_8703B(Adapter)) { ++ if ((u1Channel == 14) && IS_CCK_RATE(DataRate)) { ++ /* Channel 14 in CCK, need to set 0xA26~0xA29 to 0 for 8703B */ ++ PHY_SetBBReg(Adapter, rCCK0_TxFilter2, bMaskHWord, 0); ++ PHY_SetBBReg(Adapter, rCCK0_DebugPort, bMaskLWord, 0); ++ ++ RT_TRACE(_module_mp_, DBG_LOUD, ("MPT_CCKTxPowerAdjust 8703B CCK in Channel %u\n", u1Channel)); ++ } else { ++ /* Normal setting for 8703B, just recover to the default setting. */ ++ /* This hardcore values reference from the parameter which BB team gave. */ ++ for (i = 0 ; i < 2 ; ++i) ++ PHY_SetBBReg(Adapter, pHalData->RegForRecover[i].offset, bMaskDWord, pHalData->RegForRecover[i].value); ++ ++ RT_TRACE(_module_mp_, DBG_LOUD, ("MPT_CCKTxPowerAdjust 8703B in Channel %u restore to default setting\n", u1Channel)); ++ } ++ } else if (IS_HARDWARE_TYPE_8188F(Adapter)) { ++ /* No difference between CCK in CH14 and others, no need to change TX filter */ ++ } else { ++ ++ /* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/ ++ CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); ++ ++ if (!pHalData->bCCKinCH14) { ++ /* Readback the current bb cck swing value and compare with the table to */ ++ /* get the current swing index */ ++ for (i = 0; i < CCK_TABLE_SIZE; i++) { ++ if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) && ++ (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) { ++ CCKSwingIndex = i; ++ RT_TRACE(_module_mp_, DBG_LOUD, ("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", ++ (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); ++ break; ++ } ++ } ++ ++ /*Write 0xa22 0xa23*/ ++ TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8); ++ ++ ++ /*Write 0xa24 ~ 0xa27*/ ++ TempVal2 = 0; ++ TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16) + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24); ++ ++ /*Write 0xa28 0xa29*/ ++ TempVal3 = 0; ++ TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8); ++ } else { ++ for (i = 0; i < CCK_TABLE_SIZE; i++) { ++ if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) && ++ (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1])) { ++ CCKSwingIndex = i; ++ RT_TRACE(_module_mp_, DBG_LOUD, ("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", ++ (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); ++ break; ++ } ++ } ++ ++ /*Write 0xa22 0xa23*/ ++ TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][1]<<8); ++ ++ /*Write 0xa24 ~ 0xa27*/ ++ TempVal2 = 0; ++ TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) + ++ (CCKSwingTable_Ch14[CCKSwingIndex][4]<<16) + ++ (CCKSwingTable_Ch14[CCKSwingIndex][5]<<24); ++ ++ /*Write 0xa28 0xa29*/ ++ TempVal3 = 0; ++ TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][7]<<8); ++ } ++ ++ write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal); ++ write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2); ++ write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3); ++ ++ } ++ ++} ++ ++void hal_mpt_SetChannel(PADAPTER pAdapter) ++{ ++ u8 eRFPath; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ u8 channel = pmp->channel; ++ u8 bandwidth = pmp->bandwidth; ++ ++ hal_mpt_SwitchRfSetting(pAdapter); ++ ++ SelectChannel(pAdapter, channel); ++ ++ pHalData->bSwChnl = _TRUE; ++ pHalData->bSetChnlBW = _TRUE; ++ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0); ++ ++ hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14); ++ ++} ++ ++/* ++ * Notice ++ * Switch bandwitdth may change center frequency(channel) ++ */ ++void hal_mpt_SetBandwidth(PADAPTER pAdapter) ++{ ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ u8 channel = pmp->channel; ++ u8 bandwidth = pmp->bandwidth; ++ ++ SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset); ++ pHalData->bSwChnl = _TRUE; ++ pHalData->bSetChnlBW = _TRUE; ++ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0); ++ ++ hal_mpt_SwitchRfSetting(pAdapter); ++} ++ ++void mpt_SetTxPower_Old(PADAPTER pAdapter, MPT_TXPWR_DEF Rate, u8 *pTxPower) ++{ ++ RT_TRACE(_module_mp_, DBG_LOUD, ("===>mpt_SetTxPower_Old(): Case = %d\n", Rate)); ++ switch (Rate) { ++ case MPT_CCK: ++ { ++ u4Byte TxAGC = 0, pwr = 0; ++ u1Byte rf; ++ ++ pwr = pTxPower[ODM_RF_PATH_A]; ++ if (pwr < 0x3f) { ++ TxAGC = (pwr<<16)|(pwr<<8)|(pwr); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pTxPower[ODM_RF_PATH_A]); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); ++ } ++ pwr = pTxPower[ODM_RF_PATH_B]; ++ if (pwr < 0x3f) { ++ TxAGC = (pwr<<16)|(pwr<<8)|(pwr); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, pTxPower[ODM_RF_PATH_B]); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, TxAGC); ++ } ++ ++ } break; ++ ++ case MPT_OFDM_AND_HT: ++ { ++ u4Byte TxAGC = 0; ++ u1Byte pwr = 0, rf; ++ ++ pwr = pTxPower[0]; ++ if (pwr < 0x3f) { ++ TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); ++ DBG_871X("HT Tx-rf(A) Power = 0x%x\n", TxAGC); ++ ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ } ++ TxAGC = 0; ++ pwr = pTxPower[1]; ++ if (pwr < 0x3f) { ++ TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); ++ DBG_871X("HT Tx-rf(B) Power = 0x%x\n", TxAGC); ++ ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ } ++ } break; ++ ++ default: ++ break; ++ } ++ DBG_871X("<===mpt_SetTxPower_Old()\n"); ++} ++ ++ ++ ++void ++mpt_SetTxPower( ++ PADAPTER pAdapter, ++ MPT_TXPWR_DEF Rate, ++ pu1Byte pTxPower ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ u1Byte path = 0 , i = 0, MaxRate = MGN_6M; ++ u1Byte StartPath = ODM_RF_PATH_A, EndPath = ODM_RF_PATH_B; ++ ++ if (IS_HARDWARE_TYPE_8814A(pAdapter)) ++ EndPath = ODM_RF_PATH_D; ++ ++ switch (Rate) { ++ case MPT_CCK: ++ { ++ u1Byte rate[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}; ++ ++ for (path = StartPath; path <= EndPath; path++) ++ for (i = 0; i < sizeof(rate); ++i) ++ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); ++ } ++ break; ++ ++ case MPT_OFDM: ++ { ++ u1Byte rate[] = { ++ MGN_6M, MGN_9M, MGN_12M, MGN_18M, ++ MGN_24M, MGN_36M, MGN_48M, MGN_54M, ++ }; ++ ++ for (path = StartPath; path <= EndPath; path++) ++ for (i = 0; i < sizeof(rate); ++i) ++ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); ++ } break; ++ ++ case MPT_HT: ++ { ++ u1Byte rate[] = { ++ MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, ++ MGN_MCS5, MGN_MCS6, MGN_MCS7, MGN_MCS8, MGN_MCS9, ++ MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, ++ MGN_MCS15, MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, ++ MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23, MGN_MCS24, ++ MGN_MCS25, MGN_MCS26, MGN_MCS27, MGN_MCS28, MGN_MCS29, ++ MGN_MCS30, MGN_MCS31, ++ }; ++ if (pHalData->rf_type == RF_3T3R) ++ MaxRate = MGN_MCS23; ++ else if (pHalData->rf_type == RF_2T2R) ++ MaxRate = MGN_MCS15; ++ else ++ MaxRate = MGN_MCS7; ++ ++ for (path = StartPath; path <= EndPath; path++) { ++ for (i = 0; i < sizeof(rate); ++i) { ++ if (rate[i] > MaxRate) ++ break; ++ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); ++ } ++ } ++ } break; ++ ++ case MPT_VHT: ++ { ++ u1Byte rate[] = { ++ MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4, ++ MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9, ++ MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, ++ MGN_VHT2SS_MCS5, MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9, ++ MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3, MGN_VHT3SS_MCS4, ++ MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7, MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9, ++ MGN_VHT4SS_MCS0, MGN_VHT4SS_MCS1, MGN_VHT4SS_MCS2, MGN_VHT4SS_MCS3, MGN_VHT4SS_MCS4, ++ MGN_VHT4SS_MCS5, MGN_VHT4SS_MCS6, MGN_VHT4SS_MCS7, MGN_VHT4SS_MCS8, MGN_VHT4SS_MCS9, ++ }; ++ ++ if (pHalData->rf_type == RF_3T3R) ++ MaxRate = MGN_VHT3SS_MCS9; ++ else if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_2T4R) ++ MaxRate = MGN_VHT2SS_MCS9; ++ else ++ MaxRate = MGN_VHT1SS_MCS9; ++ ++ for (path = StartPath; path <= EndPath; path++) { ++ for (i = 0; i < sizeof(rate); ++i) { ++ if (rate[i] > MaxRate) ++ break; ++ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); ++ } ++ } ++ } break; ++ ++ default: ++ DBG_871X("<===mpt_SetTxPower: Illegal channel!!\n"); ++ break; ++ } ++ ++} ++ ++ ++void hal_mpt_SetTxPower(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ ++ if (pHalData->rf_chip < RF_TYPE_MAX) { ++ if (IS_HARDWARE_TYPE_8188E(pAdapter) || ++ IS_HARDWARE_TYPE_8723B(pAdapter) || ++ IS_HARDWARE_TYPE_8192E(pAdapter) || ++ IS_HARDWARE_TYPE_8703B(pAdapter) || ++ IS_HARDWARE_TYPE_8188F(pAdapter)) { ++ u8 path = (pHalData->AntennaTxPath == ANTENNA_A) ? (ODM_RF_PATH_A) : (ODM_RF_PATH_B); ++ ++ DBG_8192C("===> MPT_ProSetTxPower: Old\n"); ++ ++ RT_TRACE(_module_mp_, DBG_LOUD, ("===> MPT_ProSetTxPower[Old]:\n")); ++ mpt_SetTxPower_Old(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel); ++ mpt_SetTxPower_Old(pAdapter, MPT_OFDM_AND_HT, pMptCtx->TxPwrLevel); ++ ++ } else { ++ DBG_871X("===> MPT_ProSetTxPower: Jaguar\n"); ++ mpt_SetTxPower(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel); ++ mpt_SetTxPower(pAdapter, MPT_OFDM, pMptCtx->TxPwrLevel); ++ mpt_SetTxPower(pAdapter, MPT_HT, pMptCtx->TxPwrLevel); ++ mpt_SetTxPower(pAdapter, MPT_VHT, pMptCtx->TxPwrLevel); ++ ++ } ++ } else ++ DBG_8192C("RFChipID < RF_TYPE_MAX, the RF chip is not supported - %d\n", pHalData->rf_chip); ++ ++ ODM_ClearTxPowerTrackingState(pDM_Odm); ++ ++} ++ ++ ++void hal_mpt_SetDataRate(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u32 DataRate; ++ ++ DataRate = MptToMgntRate(pMptCtx->MptRateIndex); ++ ++ hal_mpt_SwitchRfSetting(pAdapter); ++ ++ hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14); ++#ifdef CONFIG_RTL8723B ++ if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) { ++ if (IS_CCK_RATE(DataRate)) { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0x6); ++ else ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0x6); ++ } else { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0xE); ++ else ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0xE); ++ } ++ } ++ ++ if ((IS_HARDWARE_TYPE_8723BS(pAdapter) && ++ ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)))) { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0xE); ++ else ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0xE); ++ } ++#endif ++} ++ ++ ++#define RF_PATH_AB 22 ++ ++#ifdef CONFIG_RTL8814A ++VOID mpt_ToggleIG_8814A(PADAPTER pAdapter) ++{ ++ u1Byte Path = 0; ++ u4Byte IGReg = rA_IGI_Jaguar, IGvalue = 0; ++ ++ for (Path; Path <= ODM_RF_PATH_D; Path++) { ++ switch (Path) { ++ case ODM_RF_PATH_B: ++ IGReg = rB_IGI_Jaguar; ++ break; ++ case ODM_RF_PATH_C: ++ IGReg = rC_IGI_Jaguar2; ++ break; ++ case ODM_RF_PATH_D: ++ IGReg = rD_IGI_Jaguar2; ++ break; ++ default: ++ IGReg = rA_IGI_Jaguar; ++ break; ++ } ++ ++ IGvalue = PHY_QueryBBReg(pAdapter, IGReg, bMaskByte0); ++ PHY_SetBBReg(pAdapter, IGReg, bMaskByte0, IGvalue+2); ++ PHY_SetBBReg(pAdapter, IGReg, bMaskByte0, IGvalue); ++ } ++} ++ ++VOID mpt_SetRFPath_8814A(PADAPTER pAdapter) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ ++ R_ANTENNA_SELECT_CCK *p_cck_txrx; ++ u8 ForcedDataRate = MptToMgntRate(pMptCtx->MptRateIndex); ++ u8 HtStbcCap = pAdapter->registrypriv.stbc_cap; ++ /*/PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo);*/ ++ /*/PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pMgntInfo);*/ ++ ++ u32 ulAntennaTx = pHalData->AntennaTxPath; ++ u32 ulAntennaRx = pHalData->AntennaRxPath; ++ u8 NssforRate = MgntQuery_NssTxRate(ForcedDataRate); ++ ++ if ((NssforRate == RF_2TX) || ((NssforRate == RF_1TX) && IS_HT_RATE(ForcedDataRate)) || ((NssforRate == RF_1TX) && IS_VHT_RATE(ForcedDataRate))) { ++ DBG_871X("===> SetAntenna 2T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); ++ ++ switch (ulAntennaTx) { ++ case ANTENNA_BC: ++ pMptCtx->MptRfPath = ODM_RF_PATH_BC; ++ /*pHalData->ValidTxPath = 0x06; linux no use */ ++ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x106); /*/ 0x940[15:4]=12'b0000_0100_0011*/ ++ break; ++ ++ case ANTENNA_CD: ++ pMptCtx->MptRfPath = ODM_RF_PATH_CD; ++ /*pHalData->ValidTxPath = 0x0C;*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x40c); /*/ 0x940[15:4]=12'b0000_0100_0011*/ ++ break; ++ case ANTENNA_AB: default: ++ pMptCtx->MptRfPath = ODM_RF_PATH_AB; ++ /*pHalData->ValidTxPath = 0x03;*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x043); /*/ 0x940[15:4]=12'b0000_0100_0011*/ ++ break; ++ } ++ ++ } else if (NssforRate == RF_3TX) { ++ DBG_871X("===> SetAntenna 3T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); ++ ++ switch (ulAntennaTx) { ++ case ANTENNA_BCD: ++ pMptCtx->MptRfPath = ODM_RF_PATH_BCD; ++ /*pHalData->ValidTxPath = 0x0e;*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x90e); /*/ 0x940[27:16]=12'b0010_0100_0111*/ ++ break; ++ ++ case ANTENNA_ABC: default: ++ pMptCtx->MptRfPath = ODM_RF_PATH_ABC; ++ /*pHalData->ValidTxPath = 0x0d;*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x247); /*/ 0x940[27:16]=12'b0010_0100_0111*/ ++ break; ++ } ++ ++ } else { /*/if(NssforRate == RF_1TX)*/ ++ DBG_871X("===> SetAntenna 1T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); ++ switch (ulAntennaTx) { ++ case ANTENNA_BCD: ++ pMptCtx->MptRfPath = ODM_RF_PATH_BCD; ++ /*pHalData->ValidTxPath = 0x0e;*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x7); ++ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0x000f00000, 0xe); ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0xe); ++ break; ++ ++ case ANTENNA_BC: ++ pMptCtx->MptRfPath = ODM_RF_PATH_BC; ++ /*pHalData->ValidTxPath = 0x06;*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x6); ++ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0x000f00000, 0x6); ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x6); ++ break; ++ case ANTENNA_B: ++ pMptCtx->MptRfPath = ODM_RF_PATH_B; ++ /*pHalData->ValidTxPath = 0x02;*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x4); /*/ 0xa07[7:4] = 4'b0100*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x002); /*/ 0x93C[31:20]=12'b0000_0000_0010*/ ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x2); /* 0x80C[7:4] = 4'b0010*/ ++ break; ++ ++ case ANTENNA_C: ++ pMptCtx->MptRfPath = ODM_RF_PATH_C; ++ /*pHalData->ValidTxPath = 0x04;*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x2); /*/ 0xa07[7:4] = 4'b0010*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x004); /*/ 0x93C[31:20]=12'b0000_0000_0100*/ ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x4); /*/ 0x80C[7:4] = 4'b0100*/ ++ break; ++ ++ case ANTENNA_D: ++ pMptCtx->MptRfPath = ODM_RF_PATH_D; ++ /*pHalData->ValidTxPath = 0x08;*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x1); /*/ 0xa07[7:4] = 4'b0001*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x008); /*/ 0x93C[31:20]=12'b0000_0000_1000*/ ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x8); /*/ 0x80C[7:4] = 4'b1000*/ ++ break; ++ ++ case ANTENNA_A: default: ++ pMptCtx->MptRfPath = ODM_RF_PATH_A; ++ /*pHalData->ValidTxPath = 0x01;*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x8); /*/ 0xa07[7:4] = 4'b1000*/ ++ PHY_SetBBReg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x001); /*/ 0x93C[31:20]=12'b0000_0000_0001*/ ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, 0xf0, 0x1); /*/ 0x80C[7:4] = 4'b0001*/ ++ break; ++ } ++ } ++ ++ switch (ulAntennaRx) { ++ case ANTENNA_A: ++ /*pHalData->ValidRxPath = 0x01;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x0); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_B: ++ /*pHalData->ValidRxPath = 0x02;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x1); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_C: ++ /*pHalData->ValidRxPath = 0x04;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x44); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x2); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_D: ++ /*pHalData->ValidRxPath = 0x08;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x88); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x3); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_BC: ++ /*pHalData->ValidRxPath = 0x06;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x66); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_CD: ++ /*pHalData->ValidRxPath = 0x0C;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xcc); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0xB); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); ++ break; ++ ++ case ANTENNA_BCD: ++ /*pHalData->ValidRxPath = 0x0e;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xee); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, Rx mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); ++ break; ++ ++ case ANTENNA_ABCD: ++ /*pHalData->ValidRxPath = 0x0f;*/ ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x2); ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xff); ++ PHY_SetBBReg(pAdapter, 0x1000, bMaskByte2, 0x3); ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x1); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ ++ /*/ CCA related PD_delay_th*/ ++ PHY_SetBBReg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); ++ PHY_SetBBReg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); ++ break; ++ ++ default: ++ RT_TRACE(_module_mp_, _drv_warning_, ("Unknown Rx antenna.\n")); ++ break; ++ } ++ ++ PHY_Set_SecCCATH_by_RXANT_8814A(pAdapter, ulAntennaRx); ++ ++ mpt_ToggleIG_8814A(pAdapter); ++ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); ++} ++ ++VOID ++mpt_SetSingleTone_8814A( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bSingleTone, ++ IN BOOLEAN bEnPMacTx) ++{ ++ ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u1Byte StartPath = ODM_RF_PATH_A, EndPath = ODM_RF_PATH_A; ++ static u4Byte regIG0 = 0, regIG1 = 0, regIG2 = 0, regIG3 = 0; ++ ++ if (bSingleTone) { ++ regIG0 = PHY_QueryBBReg(pAdapter, rA_TxScale_Jaguar, bMaskDWord); /*/ 0xC1C[31:21]*/ ++ regIG1 = PHY_QueryBBReg(pAdapter, rB_TxScale_Jaguar, bMaskDWord); /*/ 0xE1C[31:21]*/ ++ regIG2 = PHY_QueryBBReg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord); /*/ 0x181C[31:21]*/ ++ regIG3 = PHY_QueryBBReg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord); /*/ 0x1A1C[31:21]*/ ++ ++ switch (pMptCtx->MptRfPath) { ++ case ODM_RF_PATH_A: case ODM_RF_PATH_B: ++ case ODM_RF_PATH_C: case ODM_RF_PATH_D: ++ StartPath = pMptCtx->MptRfPath; ++ EndPath = pMptCtx->MptRfPath; ++ break; ++ case ODM_RF_PATH_AB: ++ EndPath = ODM_RF_PATH_B; ++ break; ++ case ODM_RF_PATH_BC: ++ StartPath = ODM_RF_PATH_B; ++ EndPath = ODM_RF_PATH_C; ++ break; ++ case ODM_RF_PATH_ABC: ++ EndPath = ODM_RF_PATH_C; ++ break; ++ case ODM_RF_PATH_BCD: ++ StartPath = ODM_RF_PATH_B; ++ EndPath = ODM_RF_PATH_D; ++ break; ++ case ODM_RF_PATH_ABCD: ++ EndPath = ODM_RF_PATH_D; ++ break; ++ } ++ ++ if (bEnPMacTx == FALSE) { ++ hal_mpt_SetOFDMContinuousTx(pAdapter, _TRUE); ++ issue_nulldata(pAdapter, NULL, 1, 3, 500); ++ } ++ ++ PHY_SetBBReg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); /*/ Disable CCA*/ ++ ++ for (StartPath; StartPath <= EndPath; StartPath++) { ++ PHY_SetRFReg(pAdapter, StartPath, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ ++ PHY_SetRFReg(pAdapter, StartPath, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ ++ ++ PHY_SetRFReg(pAdapter, StartPath, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ ++ } ++ ++ PHY_SetBBReg(pAdapter, rA_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xC1C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rB_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xE1C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rC_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x181C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rD_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x1A1C[31:21]*/ ++ ++ } else { ++ ++ switch (pMptCtx->MptRfPath) { ++ case ODM_RF_PATH_A: case ODM_RF_PATH_B: ++ case ODM_RF_PATH_C: case ODM_RF_PATH_D: ++ StartPath = pMptCtx->MptRfPath; ++ EndPath = pMptCtx->MptRfPath; ++ break; ++ case ODM_RF_PATH_AB: ++ EndPath = ODM_RF_PATH_B; ++ break; ++ case ODM_RF_PATH_BC: ++ StartPath = ODM_RF_PATH_B; ++ EndPath = ODM_RF_PATH_C; ++ break; ++ case ODM_RF_PATH_ABC: ++ EndPath = ODM_RF_PATH_C; ++ break; ++ case ODM_RF_PATH_BCD: ++ StartPath = ODM_RF_PATH_B; ++ EndPath = ODM_RF_PATH_D; ++ break; ++ case ODM_RF_PATH_ABCD: ++ EndPath = ODM_RF_PATH_D; ++ break; ++ } ++ ++ for (StartPath; StartPath <= EndPath; StartPath++) ++ PHY_SetRFReg(pAdapter, StartPath, LNA_Low_Gain_3, BIT1, 0x0); /*// RF LO disabled*/ ++ ++ ++ PHY_SetBBReg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); /* Enable CCA*/ ++ ++ if (bEnPMacTx == FALSE) ++ hal_mpt_SetOFDMContinuousTx(pAdapter, _FALSE); ++ ++ PHY_SetBBReg(pAdapter, rA_TxScale_Jaguar, bMaskDWord, regIG0); /* 0xC1C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rB_TxScale_Jaguar, bMaskDWord, regIG1); /* 0xE1C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord, regIG2); /* 0x181C[31:21]*/ ++ PHY_SetBBReg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord, regIG3); /* 0x1A1C[31:21]*/ ++ } ++} ++ ++#endif ++ ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++void mpt_SetRFPath_8812A(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ u32 ulAntennaTx, ulAntennaRx; ++ ++ ulAntennaTx = pHalData->AntennaTxPath; ++ ulAntennaRx = pHalData->AntennaRxPath; ++ ++ switch (ulAntennaTx) { ++ case ANTENNA_A: ++ pMptCtx->MptRfPath = ODM_RF_PATH_A; ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x1111); ++ if (pHalData->RFEType == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) ++ PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); ++ break; ++ case ANTENNA_B: ++ pMptCtx->MptRfPath = ODM_RF_PATH_B; ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x2222); ++ if (pHalData->RFEType == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) ++ PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x1); ++ break; ++ case ANTENNA_AB: ++ pMptCtx->MptRfPath = ODM_RF_PATH_AB; ++ PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x3333); ++ if (pHalData->RFEType == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) ++ PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); ++ break; ++ default: ++ pMptCtx->MptRfPath = ODM_RF_PATH_AB; ++ DBG_871X("Unknown Tx antenna.\n"); ++ break; ++ } ++ ++ switch (ulAntennaRx) { ++ u32 reg0xC50 = 0; ++ case ANTENNA_A: ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, BIT19|BIT18|BIT17|BIT16, 0x3); ++ ++ /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ ++ reg0xC50 = PHY_QueryBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0); ++ PHY_SetBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50+2); ++ PHY_SetBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50); ++ break; ++ case ANTENNA_B: ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1);/*/ RF_A_0x0[19:16] = 1, Standby mode */ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x1); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, BIT19|BIT18|BIT17|BIT16, 0x3); ++ ++ /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ ++ reg0xC50 = PHY_QueryBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0); ++ PHY_SetBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50+2); ++ PHY_SetBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50); ++ break; ++ case ANTENNA_AB: ++ PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x33); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, Rx mode*/ ++ PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); ++ break; ++ default: ++ DBG_871X("Unknown Rx antenna.\n"); ++ break; ++ } ++ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); ++} ++#endif ++ ++ ++#ifdef CONFIG_RTL8723B ++void mpt_SetRFPath_8723B(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u32 ulAntennaTx, ulAntennaRx; ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ulAntennaTx = pHalData->AntennaTxPath; ++ ulAntennaRx = pHalData->AntennaRxPath; ++ ++ if (pHalData->rf_chip >= RF_TYPE_MAX) { ++ DBG_8192C("This RF chip ID is not supported\n"); ++ return; ++ } ++ ++ switch (pAdapter->mppriv.antenna_tx) { ++ u8 p = 0, i = 0; ++ case ANTENNA_A: /*/ Actually path S1 (Wi-Fi)*/ ++ { ++ pMptCtx->MptRfPath = ODM_RF_PATH_A; ++ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x0); ++ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ ++ ++ /*/<20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten.*/ ++ if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)) ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E); ++ else ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); ++ ++ ++ for (i = 0; i < 3; ++i) { ++ u4Byte offset = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_A][i][0]; ++ u4Byte data = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_A][i][1]; ++ ++ if (offset != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_8192C("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ ++ } ++ for (i = 0; i < 2; ++i) { ++ u4Byte offset = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_A][i][0]; ++ u4Byte data = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_A][i][1]; ++ ++ if (offset != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_8192C("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ } ++ break; ++ case ANTENNA_B: /*/ Actually path S0 (BT)*/ ++ { ++ u4Byte offset; ++ u4Byte data; ++ ++ pMptCtx->MptRfPath = ODM_RF_PATH_B; ++ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x5); ++ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x1); /*/ AGC Table Sel.*/ ++ ++ /* <20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten.*/ ++ if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)) ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E); ++ else ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); ++ ++ for (i = 0; i < 3; ++i) { ++ /*/ <20130603, Kordan> Because BB suppors only 1T1R, we restore IQC to S1 instead of S0.*/ ++ offset = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_A][i][0]; ++ data = pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_B][i][1]; ++ if (pRFCalibrateInfo->TxIQC_8723B[ODM_RF_PATH_B][i][0] != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_8192C("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ /*/ <20130603, Kordan> Because BB suppors only 1T1R, we restore IQC to S1 instead of S0.*/ ++ for (i = 0; i < 2; ++i) { ++ offset = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_A][i][0]; ++ data = pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_B][i][1]; ++ ++ if (pRFCalibrateInfo->RxIQC_8723B[ODM_RF_PATH_B][i][0] != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_8192C("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ } ++ break; ++ default: ++ pMptCtx->MptRfPath = RF_PATH_AB; ++ RT_TRACE(_module_mp_, _drv_notice_, ("Unknown Tx antenna.\n")); ++ break; ++ } ++ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); ++} ++#endif ++ ++#ifdef CONFIG_RTL8703B ++void mpt_SetRFPath_8703B(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u4Byte ulAntennaTx, ulAntennaRx; ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ulAntennaTx = pHalData->AntennaTxPath; ++ ulAntennaRx = pHalData->AntennaRxPath; ++ ++ if (pHalData->rf_chip >= RF_TYPE_MAX) { ++ DBG_871X("This RF chip ID is not supported\n"); ++ return; ++ } ++ ++ switch (pAdapter->mppriv.antenna_tx) { ++ u1Byte p = 0, i = 0; ++ ++ case ANTENNA_A: /* Actually path S1 (Wi-Fi) */ ++ { ++ pMptCtx->MptRfPath = ODM_RF_PATH_A; ++ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x0); ++ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ ++ ++ for (i = 0; i < 3; ++i) { ++ u4Byte offset = pRFCalibrateInfo->TxIQC_8703B[i][0]; ++ u4Byte data = pRFCalibrateInfo->TxIQC_8703B[i][1]; ++ ++ if (offset != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_871X("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ ++ } ++ for (i = 0; i < 2; ++i) { ++ u4Byte offset = pRFCalibrateInfo->RxIQC_8703B[i][0]; ++ u4Byte data = pRFCalibrateInfo->RxIQC_8703B[i][1]; ++ ++ if (offset != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_871X("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ } ++ break; ++ case ANTENNA_B: /* Actually path S0 (BT)*/ ++ { ++ pMptCtx->MptRfPath = ODM_RF_PATH_B; ++ PHY_SetBBReg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7, 0x5); ++ PHY_SetBBReg(pAdapter, 0xB2C, BIT31, 0x1); /* AGC Table Sel */ ++ ++ for (i = 0; i < 3; ++i) { ++ u4Byte offset = pRFCalibrateInfo->TxIQC_8703B[i][0]; ++ u4Byte data = pRFCalibrateInfo->TxIQC_8703B[i][1]; ++ ++ if (pRFCalibrateInfo->TxIQC_8703B[i][0] != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_871X("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ for (i = 0; i < 2; ++i) { ++ u4Byte offset = pRFCalibrateInfo->RxIQC_8703B[i][0]; ++ u4Byte data = pRFCalibrateInfo->RxIQC_8703B[i][1]; ++ ++ if (pRFCalibrateInfo->RxIQC_8703B[i][0] != 0) { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, data); ++ DBG_871X("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); ++ } ++ } ++ } ++ break; ++ default: ++ pMptCtx->MptRfPath = RF_PATH_AB; ++ RT_TRACE(_module_mp_, _drv_notice_, ("Unknown Tx antenna.\n")); ++ break; ++ } ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); ++} ++#endif ++ ++ ++VOID mpt_SetRFPath_819X(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u4Byte ulAntennaTx, ulAntennaRx; ++ R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ ++ R_ANTENNA_SELECT_CCK *p_cck_txrx; ++ u1Byte r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; ++ u1Byte chgTx = 0, chgRx = 0; ++ u4Byte r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; ++ ++ ulAntennaTx = pHalData->AntennaTxPath; ++ ulAntennaRx = pHalData->AntennaRxPath; ++ ++ p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val; ++ p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val; ++ ++ p_ofdm_tx->r_ant_ht1 = 0x1; ++ p_ofdm_tx->r_ant_ht2 = 0x2;/*Second TX RF path is A*/ ++ p_ofdm_tx->r_ant_non_ht = 0x3;/*/ 0x1+0x2=0x3 */ ++ ++ switch (ulAntennaTx) { ++ case ANTENNA_A: ++ p_ofdm_tx->r_tx_antenna = 0x1; ++ r_ofdm_tx_en_val = 0x1; ++ p_ofdm_tx->r_ant_l = 0x1; ++ p_ofdm_tx->r_ant_ht_s1 = 0x1; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x1; ++ p_cck_txrx->r_ccktx_enable = 0x8; ++ chgTx = 1; ++ /*/ From SD3 Willis suggestion !!! Set RF A=TX and B as standby*/ ++ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); ++ r_ofdm_tx_en_val = 0x3; ++ /*/ Power save*/ ++ /*/cosa r_ant_select_ofdm_val = 0x11111111;*/ ++ /*/ We need to close RFB by SW control*/ ++ if (pHalData->rf_type == RF_2T2R) { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0); ++ } ++ } ++ pMptCtx->MptRfPath = ODM_RF_PATH_A; ++ break; ++ case ANTENNA_B: ++ p_ofdm_tx->r_tx_antenna = 0x2; ++ r_ofdm_tx_en_val = 0x2; ++ p_ofdm_tx->r_ant_l = 0x2; ++ p_ofdm_tx->r_ant_ht_s1 = 0x2; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x2; ++ p_cck_txrx->r_ccktx_enable = 0x4; ++ chgTx = 1; ++ /*/ From SD3 Willis suggestion !!! Set RF A as standby*/ ++ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); ++ ++ /*/ 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table.*/ ++ /*/ 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control*/ ++ if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); ++ /*/PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); ++ } ++ } ++ pMptCtx->MptRfPath = ODM_RF_PATH_B; ++ break; ++ case ANTENNA_AB:/*/ For 8192S*/ ++ p_ofdm_tx->r_tx_antenna = 0x3; ++ r_ofdm_tx_en_val = 0x3; ++ p_ofdm_tx->r_ant_l = 0x3; ++ p_ofdm_tx->r_ant_ht_s1 = 0x3; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x3; ++ p_cck_txrx->r_ccktx_enable = 0xC; ++ chgTx = 1; ++ /*/ From SD3Willis suggestion !!! Set RF B as standby*/ ++ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); ++ /* Disable Power save*/ ++ /*cosa r_ant_select_ofdm_val = 0x3321333;*/ ++ /* 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control*/ ++ if (pHalData->rf_type == RF_2T2R) { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); ++ /*/PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); ++ } ++ } ++ pMptCtx->MptRfPath = ODM_RF_PATH_AB; ++ break; ++ default: ++ break; ++ } ++ ++ ++ ++/*// r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D ++// r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D ++// r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D */ ++ switch (ulAntennaRx) { ++ case ANTENNA_A: ++ r_rx_antenna_ofdm = 0x1; /* A*/ ++ p_cck_txrx->r_cckrx_enable = 0x0; /* default: A*/ ++ p_cck_txrx->r_cckrx_enable_2 = 0x0; /* option: A*/ ++ chgRx = 1; ++ break; ++ case ANTENNA_B: ++ r_rx_antenna_ofdm = 0x2; /*/ B*/ ++ p_cck_txrx->r_cckrx_enable = 0x1; /*/ default: B*/ ++ p_cck_txrx->r_cckrx_enable_2 = 0x1; /*/ option: B*/ ++ chgRx = 1; ++ break; ++ case ANTENNA_AB:/*/ For 8192S and 8192E/U...*/ ++ r_rx_antenna_ofdm = 0x3;/*/ AB*/ ++ p_cck_txrx->r_cckrx_enable = 0x0;/*/ default:A*/ ++ p_cck_txrx->r_cckrx_enable_2 = 0x1;/*/ option:B*/ ++ chgRx = 1; ++ break; ++ default: ++ break; ++ } ++ ++ ++ if (chgTx && chgRx) { ++ switch (pHalData->rf_chip) { ++ case RF_8225: ++ case RF_8256: ++ case RF_6052: ++ /*/r_ant_sel_cck_val = r_ant_select_cck_val;*/ ++ PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); /*/OFDM Tx*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); /*/OFDM Tx*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ ++ PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ ++ if (IS_HARDWARE_TYPE_8192E(pAdapter)) { ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ ++ PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ ++ } ++ PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);/*/r_ant_sel_cck_val); /CCK TxRx*/ ++ break; ++ ++ default: ++ DBG_871X("Unsupported RFChipID for switching antenna.\n"); ++ break; ++ } ++ } ++} /* MPT_ProSetRFPath */ ++ ++ ++void hal_mpt_SetAntenna(PADAPTER pAdapter) ++ ++{ ++ DBG_871X("Do %s\n", __func__); ++#ifdef CONFIG_RTL8814A ++ if (IS_HARDWARE_TYPE_8814A(pAdapter)) { ++ mpt_SetRFPath_8814A(pAdapter); ++ return; ++ } ++#endif ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { ++ mpt_SetRFPath_8812A(pAdapter); ++ return; ++ } ++#endif ++#ifdef CONFIG_RTL8723B ++ if (IS_HARDWARE_TYPE_8723B(pAdapter)) { ++ mpt_SetRFPath_8723B(pAdapter); ++ return; ++ } ++#endif ++#ifdef CONFIG_RTL8703B ++ if (IS_HARDWARE_TYPE_8703B(pAdapter)) { ++ mpt_SetRFPath_8703B(pAdapter); ++ return; ++ } ++#endif ++ ++/* else if (IS_HARDWARE_TYPE_8821B(pAdapter)) ++ mpt_SetRFPath_8821B(pAdapter); ++ Prepare for 8822B ++ else if (IS_HARDWARE_TYPE_8822B(Context)) ++ mpt_SetRFPath_8822B(Context); ++*/ ++ mpt_SetRFPath_819X(pAdapter); ++ DBG_871X("mpt_SetRFPath_819X Do %s\n", __func__); ++ ++} ++ ++ ++s32 hal_mpt_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ if (!netif_running(pAdapter->pnetdev)) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n")); ++ return _FAIL; ++ } ++ ++ ++ if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n")); ++ return _FAIL; ++ } ++ ++ ++ target_ther &= 0xff; ++ if (target_ther < 0x07) ++ target_ther = 0x07; ++ else if (target_ther > 0x1d) ++ target_ther = 0x1d; ++ ++ pHalData->EEPROMThermalMeter = target_ther; ++ ++ return _SUCCESS; ++} ++ ++ ++void hal_mpt_TriggerRFThermalMeter(PADAPTER pAdapter) ++{ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x42, BIT17 | BIT16, 0x03); ++ ++} ++ ++ ++u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter) ++ ++{ ++ u32 ThermalValue = 0; ++ ++ ThermalValue = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, 0x42, 0xfc00); /*0x42: RF Reg[15:10]*/ ++ return (u8)ThermalValue; ++ ++} ++ ++ ++void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 *value) ++{ ++#if 0 ++ fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER); ++ rtw_msleep_os(1000); ++ fw_cmd_data(pAdapter, value, 1); ++ *value &= 0xFF; ++#else ++ hal_mpt_TriggerRFThermalMeter(pAdapter); ++ rtw_msleep_os(1000); ++ *value = hal_mpt_ReadRFThermalMeter(pAdapter); ++#endif ++ ++} ++ ++ ++void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ pAdapter->mppriv.MptCtx.bSingleCarrier = bStart; ++ ++ if (bStart) {/*/ Start Single Carrier.*/ ++ RT_TRACE(_module_mp_, _drv_alert_, ("SetSingleCarrierTx: test start\n")); ++ /*/ Start Single Carrier.*/ ++ /*/ 1. if OFDM block on?*/ ++ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 1); /*set OFDM block on*/ ++ ++ /*/ 2. set CCK test mode off, set to CCK normal mode*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0); ++ ++ /*/ 3. turn on scramble setting*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 1); ++ ++ /*/ 4. Turn On Continue Tx and turn off the other test modes.*/ ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) ++ PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_SingleCarrier); ++ else ++#endif ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_SingleCarrier); ++ ++ } else { ++ /*/ Stop Single Carrier.*/ ++ /*/ Stop Single Carrier.*/ ++ /*/ Turn off all test modes.*/ ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) ++ PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_ALL_OFF); ++ else ++#endif ++ ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ ++ rtw_msleep_os(10); ++ /*/BB Reset*/ ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++} ++ ++ ++void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u4Byte ulAntennaTx = pHalData->AntennaTxPath; ++ static u4Byte regRF = 0, regBB0 = 0, regBB1 = 0, regBB2 = 0, regBB3 = 0; ++ u8 rfPath; ++ ++ switch (ulAntennaTx) { ++ case ANTENNA_B: ++ rfPath = ODM_RF_PATH_B; ++ break; ++ case ANTENNA_C: ++ rfPath = ODM_RF_PATH_C; ++ break; ++ case ANTENNA_D: ++ rfPath = ODM_RF_PATH_D; ++ break; ++ case ANTENNA_A: ++ default: ++ rfPath = ODM_RF_PATH_A; ++ break; ++ } ++ ++ pAdapter->mppriv.MptCtx.bSingleTone = bStart; ++ if (bStart) { ++ /*/ Start Single Tone.*/ ++ /*/ <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu)*/ ++ if (IS_HARDWARE_TYPE_8188E(pAdapter)) { ++ regRF = PHY_QueryRFReg(pAdapter, rfPath, LNA_Low_Gain_3, bRFRegOffsetMask); ++ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); ++ } else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { /*/ USB need to do RF LO disable first, PCIE isn't required to follow this order.*/ ++ /*/Set MAC REG 88C: Prevent SingleTone Fail*/ ++ PHY_SetMacReg(pAdapter, 0x88C, 0xF00000, 0xF); ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO disabled*/ ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ ++ } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x56, 0xF, 0x1); /*/ RF LO enabled*/ ++ } else { ++ /*/ S0/S1 both use PATH A to configure*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x76, 0xF, 0x1); /*/ RF LO enabled*/ ++ } ++ } else if (IS_HARDWARE_TYPE_8703B(pAdapter)) { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x2); /* Tx mode */ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x53, 0xF000, 0x1); /* RF LO enabled */ ++ } ++ } else if (IS_HARDWARE_TYPE_8188F(pAdapter)) { ++ /*Set BB REG 88C: Prevent SingleTone Fail*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xF); ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x1); ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x2); ++ ++ } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++ u1Byte p = ODM_RF_PATH_A; ++ ++ regRF = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, bRFRegOffsetMask); ++ regBB0 = PHY_QueryBBReg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord); ++ regBB1 = PHY_QueryBBReg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord); ++ regBB2 = PHY_QueryBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, bMaskDWord); ++ regBB3 = PHY_QueryBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, bMaskDWord); ++ ++ PHY_SetBBReg(pAdapter, rOFDMCCKEN_Jaguar, BIT29|BIT28, 0x0); /*/ Disable CCK and OFDM*/ ++ ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_AB) { ++ for (p = ODM_RF_PATH_A; p <= ODM_RF_PATH_B; ++p) { ++ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ ++ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ ++ PHY_SetRFReg(pAdapter, p, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ ++ } ++ } else { ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x1); /*/ RF LO enabled*/ ++ } ++ ++ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x77007*/ ++ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x77007*/ ++ ++ if (pHalData->ExternalPA_5G) { ++ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x12); /*/ 0xCB4[23:16] = 0x12*/ ++ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x12); /*/ 0xEB4[23:16] = 0x12*/ ++ } else if (pHalData->ExternalPA_2G) { ++ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x11); /*/ 0xCB4[23:16] = 0x11*/ ++ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x11); /*/ 0xEB4[23:16] = 0x11*/ ++ } ++#endif ++ } ++#ifdef CONFIG_RTL8814A ++ else if (IS_HARDWARE_TYPE_8814A(pAdapter)) ++ mpt_SetSingleTone_8814A(pAdapter, TRUE, FALSE); ++#endif ++ else /*/ Turn On SingleTone and turn off the other test modes.*/ ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_SingleTone); ++ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ } else {/*/ Stop Single Ton e.*/ ++ ++ if (IS_HARDWARE_TYPE_8188E(pAdapter)) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, regRF); ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); ++ } else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x3);/*/ Tx mode*/ ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x0);/*/ RF LO disabled */ ++ /*/ RESTORE MAC REG 88C: Enable RF Functions*/ ++ PHY_SetMacReg(pAdapter, 0x88C, 0xF00000, 0x0); ++ } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { ++ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x56, 0xF, 0x0); /*/ RF LO disabled*/ ++ } else { ++ /*/ S0/S1 both use PATH A to configure*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x76, 0xF, 0x0); /*/ RF LO disabled*/ ++ } ++ } else if (IS_HARDWARE_TYPE_8703B(pAdapter)) { ++ ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_A) { ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, 0xF0000, 0x3); /* Rx mode */ ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x53, 0xF000, 0x0); /* RF LO disabled */ ++ } ++ } else if (IS_HARDWARE_TYPE_8188F(pAdapter)) { ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC, 0xF0000, 0x3); /*Tx mode*/ ++ PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x0); /*RF LO disabled*/ ++ /*Set BB REG 88C: Prevent SingleTone Fail*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xc); ++ } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++ u1Byte p = ODM_RF_PATH_A; ++ ++ PHY_SetBBReg(pAdapter, rOFDMCCKEN_Jaguar, BIT29|BIT28, 0x3); /*/ Disable CCK and OFDM*/ ++ ++ if (pMptCtx->MptRfPath == ODM_RF_PATH_AB) { ++ for (p = ODM_RF_PATH_A; p <= ODM_RF_PATH_B; ++p) { ++ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, bRFRegOffsetMask, regRF); ++ PHY_SetRFReg(pAdapter, p, LNA_Low_Gain_3, BIT1, 0x0); /*/ RF LO disabled*/ ++ } ++ } else { ++ PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, bRFRegOffsetMask, regRF); ++ PHY_SetRFReg(pAdapter, p, LNA_Low_Gain_3, BIT1, 0x0); /*/ RF LO disabled*/ ++ } ++ ++ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, regBB0); ++ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, regBB1); ++ PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, bMaskDWord, regBB2); ++ PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, bMaskDWord, regBB3); ++#endif ++ } ++#ifdef CONFIG_RTL8814A ++ else if (IS_HARDWARE_TYPE_8814A(pAdapter)) ++ mpt_SetSingleTone_8814A(pAdapter, FALSE, FALSE); ++ ++ else/*/ Turn off all test modes.*/ ++ PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_ALL_OFF); ++#endif ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++ ++ } ++} ++ ++ ++void hal_mpt_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) ++{ ++ u8 Rate; ++ pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart; ++ ++ Rate = HwRateToMPTRate(pAdapter->mppriv.rateidx); ++ if (bStart) {/* Start Carrier Suppression.*/ ++ RT_TRACE(_module_mp_, _drv_alert_, ("SetCarrierSuppressionTx: test start\n")); ++ if (Rate <= MPT_RATE_11M) { ++ /*/ 1. if CCK block on?*/ ++ if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/*set CCK block on*/ ++ ++ /*/Turn Off All Test Mode*/ ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF);/* rSingleTone_ContTx_Jaguar*/ ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*/transmit mode*/ ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); /*/turn off scramble setting*/ ++ ++ /*/Set CCK Tx Test Rate*/ ++ write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); /*/Set FTxRate to 1Mbps*/ ++ } ++ ++ /*Set for dynamic set Power index*/ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ } else {/* Stop Carrier Suppression.*/ ++ RT_TRACE(_module_mp_, _drv_alert_, ("SetCarrierSuppressionTx: test stop\n")); ++ ++ if (Rate <= MPT_RATE_11M) { ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ ++ ++ /*BB Reset*/ ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++ /*Stop for dynamic set Power index*/ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++ } ++ DBG_871X("\n MPT_ProSetCarrierSupp() is finished.\n"); ++} ++ ++void hal_mpt_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ u32 cckrate; ++ ++ if (bStart) { ++ RT_TRACE(_module_mp_, _drv_alert_, ++ ("SetCCKContinuousTx: test start\n")); ++ ++ /*/ 1. if CCK block on?*/ ++ if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/*set CCK block on*/ ++ ++ /*/Turn Off All Test Mode*/ ++ if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF);/*rSingleTone_ContTx_Jaguar*/ ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ ++ /*/Set CCK Tx Test Rate*/ ++ ++ cckrate = pAdapter->mppriv.rateidx; ++ ++ write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*/transmit mode*/ ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /*/turn on scramble setting*/ ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* rCCK0_RxHP 0xa15[1:0] = 11 force cck rxiq = 0*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /*/ 0xc08[16] = 1 force ofdm rxiq = ofdm txiq*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 1); ++ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 1); ++ } ++ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ } else { ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("SetCCKContinuousTx: test stop\n")); ++ ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*/normal mode*/ ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /*/turn on scramble setting*/ ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_8814A(pAdapter) /* && !IS_HARDWARE_TYPE_8822B(pAdapter) */) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0);/* rCCK0_RxHP 0xa15[1:0] = 2b00*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /*/ 0xc08[16] = 0*/ ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 0); ++ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 0); ++ } ++ ++ /*/BB Reset*/ ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++ } ++ ++ pAdapter->mppriv.MptCtx.bCckContTx = bStart; ++ pAdapter->mppriv.MptCtx.bOfdmContTx = _FALSE; ++} ++ ++void hal_mpt_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ if (bStart) { ++ RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n"));/*/ 1. if OFDM block on?*/ ++ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 1);/*/set OFDM block on*/ ++ ++ /*/ 2. set CCK test mode off, set to CCK normal mode*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0); ++ ++ /*/ 3. turn on scramble setting*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 1); ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_8814A(pAdapter) /*&& !IS_HARDWARE_TYPE_8822B(pAdapter)*/) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* rCCK0_RxHP 0xa15[1:0] = 2b'11*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1*/ ++ } ++ ++ /*/ 4. Turn On Continue Tx and turn off the other test modes.*/ ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ContinuousTx);/*rSingleTone_ContTx_Jaguar*/ ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ContinuousTx); ++ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ } else { ++ RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test stop\n")); ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8814A(pAdapter) /*|| IS_HARDWARE_TYPE_8822B(pAdapter)*/) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF); ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ /*/Delay 10 ms*/ ++ rtw_msleep_os(10); ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_8814A(pAdapter) /*&&! IS_HARDWARE_TYPE_8822B(pAdapter)*/) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0);/*/ 0xa15[1:0] = 0*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0);/*/ 0xc08[16] = 0*/ ++ } ++ ++ /*/BB Reset*/ ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++ } ++ ++ pAdapter->mppriv.MptCtx.bCckContTx = _FALSE; ++ pAdapter->mppriv.MptCtx.bOfdmContTx = bStart; ++} ++ ++void hal_mpt_SetContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ u8 Rate; ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx)); ++ ++ Rate = HwRateToMPTRate(pAdapter->mppriv.rateidx); ++ pAdapter->mppriv.MptCtx.bStartContTx = bStart; ++ ++ if (Rate <= MPT_RATE_11M) ++ hal_mpt_SetCCKContinuousTx(pAdapter, bStart); ++ else if (Rate >= MPT_RATE_6M) ++ hal_mpt_SetOFDMContinuousTx(pAdapter, bStart); ++} ++ ++#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) ++/* for HW TX mode */ ++static VOID mpt_StopCckContTx( ++ PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u1Byte u1bReg; ++ ++ pMptCtx->bCckContTx = FALSE; ++ pMptCtx->bOfdmContTx = FALSE; ++ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 2b00*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 0); ++ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 0); ++ } ++ ++ /*BB Reset*/ ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++ ++} /* mpt_StopCckContTx */ ++ ++ ++static VOID mpt_StopOfdmContTx( ++ PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u1Byte u1bReg; ++ u4Byte data; ++ ++ pMptCtx->bCckContTx = FALSE; ++ pMptCtx->bOfdmContTx = FALSE; ++ ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF); ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ ++ rtw_mdelay_os(10); ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 0*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ ++ } ++ ++ /*BB Reset*/ ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); ++} /* mpt_StopOfdmContTx */ ++ ++ ++static VOID mpt_StartCckContTx( ++ PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ u4Byte cckrate; ++ ++ /* 1. if CCK block on */ ++ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn)) ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 1);/*set CCK block on*/ ++ ++ /*Turn Off All Test Mode*/ ++ if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ALL_OFF); ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); ++ ++ cckrate = pAdapter->mppriv.rateidx; ++ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); ++ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*transmit mode*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 11 force cck rxiq = 0*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1 force ofdm rxiq = ofdm txiq*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 1); ++ PHY_SetBBReg(pAdapter, 0x0B34, BIT14, 1); ++ } ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ pMptCtx->bCckContTx = TRUE; ++ pMptCtx->bOfdmContTx = FALSE; ++ ++} /* mpt_StartCckContTx */ ++ ++ ++static VOID mpt_StartOfdmContTx( ++ PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ ++ /* 1. if OFDM block on?*/ ++ if (!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 1);/*set OFDM block on*/ ++ ++ /* 2. set CCK test mode off, set to CCK normal mode*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0); ++ ++ /* 3. turn on scramble setting*/ ++ PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 1); ++ ++ if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) { ++ PHY_SetBBReg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 2b'11*/ ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1*/ ++ } ++ ++ /* 4. Turn On Continue Tx and turn off the other test modes.*/ ++ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) ++ PHY_SetBBReg(pAdapter, 0x914, BIT18|BIT17|BIT16, OFDM_ContinuousTx); ++ else ++ PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ContinuousTx); ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); ++ ++ pMptCtx->bCckContTx = FALSE; ++ pMptCtx->bOfdmContTx = TRUE; ++} /* mpt_StartOfdmContTx */ ++ ++ ++void mpt_ProSetPMacTx(PADAPTER Adapter) ++{ ++ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); ++ RT_PMAC_TX_INFO PMacTxInfo = pMptCtx->PMacTxInfo; ++ u32 u4bTmp; ++ ++ DbgPrint("SGI %d bSPreamble %d bSTBC %d bLDPC %d NDP_sound %d\n", PMacTxInfo.bSGI, PMacTxInfo.bSPreamble, PMacTxInfo.bSTBC, PMacTxInfo.bLDPC, PMacTxInfo.NDP_sound); ++ DbgPrint("TXSC %d BandWidth %d PacketPeriod %d PacketCount %d PacketLength %d PacketPattern %d\n", PMacTxInfo.TX_SC, PMacTxInfo.BandWidth, PMacTxInfo.PacketPeriod, PMacTxInfo.PacketCount, PMacTxInfo.PacketLength, PMacTxInfo.PacketPattern); ++#if 0 ++ PRINT_DATA("LSIG ", PMacTxInfo.LSIG, 3); ++ PRINT_DATA("HT_SIG", PMacTxInfo.HT_SIG, 6); ++ PRINT_DATA("VHT_SIG_A", PMacTxInfo.VHT_SIG_A, 6); ++ PRINT_DATA("VHT_SIG_B", PMacTxInfo.VHT_SIG_B, 4); ++ DbgPrint("VHT_SIG_B_CRC %x\n", PMacTxInfo.VHT_SIG_B_CRC); ++ PRINT_DATA("VHT_Delimiter", PMacTxInfo.VHT_Delimiter, 4); ++ ++ PRINT_DATA("Src Address", Adapter->mac_addr, 6); ++ PRINT_DATA("Dest Address", PMacTxInfo.MacAddress, 6); ++#endif ++ ++ if (PMacTxInfo.bEnPMacTx == FALSE) { ++ if (PMacTxInfo.Mode == CONTINUOUS_TX) { ++ PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) ++ mpt_StopCckContTx(Adapter); ++ else ++ mpt_StopOfdmContTx(Adapter); ++ } else if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { ++ u4bTmp = PHY_QueryBBReg(Adapter, 0xf50, bMaskLWord); ++ PHY_SetBBReg(Adapter, 0xb1c, bMaskLWord, u4bTmp+50); ++ PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); /*TX Stop*/ ++ } else ++ PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ ++ ++ if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) { ++ /* Stop HW TX -> Stop Continuous TX -> Stop RF Setting*/ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) ++ mpt_StopCckContTx(Adapter); ++ else ++ mpt_StopOfdmContTx(Adapter); ++ ++ mpt_SetSingleTone_8814A(Adapter, FALSE, TRUE); ++ } ++ ++ return; ++ } ++ ++ if (PMacTxInfo.Mode == CONTINUOUS_TX) { ++ PMacTxInfo.PacketCount = 1; ++ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) ++ mpt_StartCckContTx(Adapter); ++ else ++ mpt_StartOfdmContTx(Adapter); ++ } else if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) { ++ /* Continuous TX -> HW TX -> RF Setting */ ++ PMacTxInfo.PacketCount = 1; ++ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) ++ mpt_StartCckContTx(Adapter); ++ else ++ mpt_StartOfdmContTx(Adapter); ++ } else if (PMacTxInfo.Mode == PACKETS_TX) { ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE) && PMacTxInfo.PacketCount == 0) ++ PMacTxInfo.PacketCount = 0xffff; ++ } ++ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { ++ /* 0xb1c[0:15] TX packet count 0xb1C[31:16] SFD*/ ++ u4bTmp = PMacTxInfo.PacketCount|(PMacTxInfo.SFD << 16); ++ PHY_SetBBReg(Adapter, 0xb1c, bMaskDWord, u4bTmp); ++ /* 0xb40 7:0 SIGNAL 15:8 SERVICE 31:16 LENGTH*/ ++ u4bTmp = PMacTxInfo.SignalField|(PMacTxInfo.ServiceField << 8)|(PMacTxInfo.LENGTH << 16); ++ PHY_SetBBReg(Adapter, 0xb40, bMaskDWord, u4bTmp); ++ u4bTmp = PMacTxInfo.CRC16[0] | (PMacTxInfo.CRC16[1] << 8); ++ PHY_SetBBReg(Adapter, 0xb44, bMaskLWord, u4bTmp); ++ ++ if (PMacTxInfo.bSPreamble) ++ PHY_SetBBReg(Adapter, 0xb0c, BIT27, 0); ++ else ++ PHY_SetBBReg(Adapter, 0xb0c, BIT27, 1); ++ } else { ++ PHY_SetBBReg(Adapter, 0xb18, 0xfffff, PMacTxInfo.PacketCount); ++ ++ u4bTmp = PMacTxInfo.LSIG[0]|((PMacTxInfo.LSIG[1]) << 8)|((PMacTxInfo.LSIG[2]) << 16)|((PMacTxInfo.PacketPattern) << 24); ++ PHY_SetBBReg(Adapter, 0xb08, bMaskDWord, u4bTmp); /* Set 0xb08[23:0] = LSIG, 0xb08[31:24] = Data init octet*/ ++ ++ if (PMacTxInfo.PacketPattern == 0x12) ++ u4bTmp = 0x3000000; ++ else ++ u4bTmp = 0; ++ } ++ ++ if (IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) { ++ u4bTmp |= PMacTxInfo.HT_SIG[0]|((PMacTxInfo.HT_SIG[1]) << 8)|((PMacTxInfo.HT_SIG[2]) << 16); ++ PHY_SetBBReg(Adapter, 0xb0c, bMaskDWord, u4bTmp); ++ u4bTmp = PMacTxInfo.HT_SIG[3]|((PMacTxInfo.HT_SIG[4]) << 8)|((PMacTxInfo.HT_SIG[5]) << 16); ++ PHY_SetBBReg(Adapter, 0xb10, 0xffffff, u4bTmp); ++ } else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) { ++ u4bTmp |= PMacTxInfo.VHT_SIG_A[0]|((PMacTxInfo.VHT_SIG_A[1]) << 8)|((PMacTxInfo.VHT_SIG_A[2]) << 16); ++ PHY_SetBBReg(Adapter, 0xb0c, bMaskDWord, u4bTmp); ++ u4bTmp = PMacTxInfo.VHT_SIG_A[3]|((PMacTxInfo.VHT_SIG_A[4]) << 8)|((PMacTxInfo.VHT_SIG_A[5]) << 16); ++ PHY_SetBBReg(Adapter, 0xb10, 0xffffff, u4bTmp); ++ ++ _rtw_memcpy(&u4bTmp, PMacTxInfo.VHT_SIG_B, 4); ++ PHY_SetBBReg(Adapter, 0xb14, bMaskDWord, u4bTmp); ++ } ++ ++ if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) { ++ u4bTmp = (PMacTxInfo.VHT_SIG_B_CRC << 24)|PMacTxInfo.PacketPeriod; /* for TX interval */ ++ PHY_SetBBReg(Adapter, 0xb20, bMaskDWord, u4bTmp); ++ ++ _rtw_memcpy(&u4bTmp, PMacTxInfo.VHT_Delimiter, 4); ++ PHY_SetBBReg(Adapter, 0xb24, bMaskDWord, u4bTmp); ++ ++ /* 0xb28 - 0xb34 24 byte Probe Request MAC Header*/ ++ /*& Duration & Frame control*/ ++ PHY_SetBBReg(Adapter, 0xb28, bMaskDWord, 0x00000040); ++ ++ /* Address1 [0:3]*/ ++ u4bTmp = PMacTxInfo.MacAddress[0]|(PMacTxInfo.MacAddress[1] << 8)|(PMacTxInfo.MacAddress[2] << 16)|(PMacTxInfo.MacAddress[3] << 24); ++ PHY_SetBBReg(Adapter, 0xb2C, bMaskDWord, u4bTmp); ++ ++ /* Address3 [3:0]*/ ++ PHY_SetBBReg(Adapter, 0xb38, bMaskDWord, u4bTmp); ++ ++ /* Address2[0:1] & Address1 [5:4]*/ ++ u4bTmp = PMacTxInfo.MacAddress[4]|(PMacTxInfo.MacAddress[5] << 8)|(Adapter->mac_addr[0] << 16)|(Adapter->mac_addr[1] << 24); ++ PHY_SetBBReg(Adapter, 0xb30, bMaskDWord, u4bTmp); ++ ++ /* Address2 [5:2]*/ ++ u4bTmp = Adapter->mac_addr[2]|(Adapter->mac_addr[3] << 8)|(Adapter->mac_addr[4] << 16)|(Adapter->mac_addr[5] << 24); ++ PHY_SetBBReg(Adapter, 0xb34, bMaskDWord, u4bTmp); ++ ++ /* Sequence Control & Address3 [5:4]*/ ++ /*u4bTmp = PMacTxInfo.MacAddress[4]|(PMacTxInfo.MacAddress[5] << 8) ;*/ ++ /*PHY_SetBBReg(Adapter, 0xb38, bMaskDWord, u4bTmp);*/ ++ } else { ++ PHY_SetBBReg(Adapter, 0xb20, bMaskDWord, PMacTxInfo.PacketPeriod); /* for TX interval*/ ++ /* & Duration & Frame control */ ++ PHY_SetBBReg(Adapter, 0xb24, bMaskDWord, 0x00000040); ++ ++ /* 0xb24 - 0xb38 24 byte Probe Request MAC Header*/ ++ /* Address1 [0:3]*/ ++ u4bTmp = PMacTxInfo.MacAddress[0]|(PMacTxInfo.MacAddress[1] << 8)|(PMacTxInfo.MacAddress[2] << 16)|(PMacTxInfo.MacAddress[3] << 24); ++ PHY_SetBBReg(Adapter, 0xb28, bMaskDWord, u4bTmp); ++ ++ /* Address3 [3:0]*/ ++ PHY_SetBBReg(Adapter, 0xb34, bMaskDWord, u4bTmp); ++ ++ /* Address2[0:1] & Address1 [5:4]*/ ++ u4bTmp = PMacTxInfo.MacAddress[4]|(PMacTxInfo.MacAddress[5] << 8)|(Adapter->mac_addr[0] << 16)|(Adapter->mac_addr[1] << 24); ++ PHY_SetBBReg(Adapter, 0xb2c, bMaskDWord, u4bTmp); ++ ++ /* Address2 [5:2] */ ++ u4bTmp = Adapter->mac_addr[2]|(Adapter->mac_addr[3] << 8)|(Adapter->mac_addr[4] << 16)|(Adapter->mac_addr[5] << 24); ++ PHY_SetBBReg(Adapter, 0xb30, bMaskDWord, u4bTmp); ++ ++ /* Sequence Control & Address3 [5:4]*/ ++ u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8); ++ PHY_SetBBReg(Adapter, 0xb38, bMaskDWord, u4bTmp); ++ } ++ ++ PHY_SetBBReg(Adapter, 0xb48, bMaskByte3, PMacTxInfo.TX_RATE_HEX); ++ ++ /* 0xb4c 3:0 TXSC 5:4 BW 7:6 m_STBC 8 NDP_Sound*/ ++ u4bTmp = (PMacTxInfo.TX_SC)|((PMacTxInfo.BandWidth) << 4)|((PMacTxInfo.m_STBC - 1) << 6)|((PMacTxInfo.NDP_sound) << 8); ++ PHY_SetBBReg(Adapter, 0xb4c, 0x1ff, u4bTmp); ++ ++ if (IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8822B(Adapter)) { ++ u4Byte offset = 0xb44; ++ ++ if (IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE)) ++ PHY_SetBBReg(Adapter, offset, 0xc0000000, 0); ++ else if (IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) ++ PHY_SetBBReg(Adapter, offset, 0xc0000000, 1); ++ else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) ++ PHY_SetBBReg(Adapter, offset, 0xc0000000, 2); ++ } ++ ++ PHY_SetBBReg(Adapter, 0xb00, BIT8, 1); /* Turn on PMAC*/ ++/* //PHY_SetBBReg(Adapter, 0xb04, 0xf, 2); //TX Stop*/ ++ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { ++ PHY_SetBBReg(Adapter, 0xb04, 0xf, 8); /*TX CCK ON*/ ++ PHY_SetBBReg(Adapter, 0xA84, BIT31, 0); ++ } else ++ PHY_SetBBReg(Adapter, 0xb04, 0xf, 4); /* TX Ofdm ON */ ++ ++ if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) ++ mpt_SetSingleTone_8814A(Adapter, TRUE, TRUE); ++ ++} ++#endif ++ ++#endif /* CONFIG_MP_INCLUDE*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_phy.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_phy.c +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/led/hal_sdio_led.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/led/hal_sdio_led.c +old mode 100755 +new mode 100644 +index 4d572a1..a292570 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/led/hal_sdio_led.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/led/hal_sdio_led.c +@@ -1,2410 +1,2418 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +- +-#include +- +-// +-// Description: +-// Implementation of LED blinking behavior. +-// It toggle off LED and schedule corresponding timer if necessary. +-// +-void +-SwLedBlink( +- PLED_SDIO pLed +- ) +-{ +- _adapter *padapter = pLed->padapter; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- u8 bStopBlinking = _FALSE; +- +- // Change LED according to BlinkingLedState specified. +- if( pLed->BlinkingLedState == RTW_LED_ON ) +- { +- SwLedOn(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); +- } +- else +- { +- SwLedOff(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes)); +- } +- +- // Determine if we shall change LED state again. +- pLed->BlinkTimes--; +- switch(pLed->CurrLedState) +- { +- +- case LED_BLINK_NORMAL: +- if(pLed->BlinkTimes == 0) +- { +- bStopBlinking = _TRUE; +- } +- break; +- +- case LED_BLINK_StartToBlink: +- if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) +- { +- bStopBlinking = _TRUE; +- } +- if( check_fwstate(pmlmepriv, _FW_LINKED) && +- (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ) +- { +- bStopBlinking = _TRUE; +- } +- else if(pLed->BlinkTimes == 0) +- { +- bStopBlinking = _TRUE; +- } +- break; +- +- case LED_BLINK_WPS: +- if( pLed->BlinkTimes == 0 ) +- { +- bStopBlinking = _TRUE; +- } +- break; +- +- +- default: +- bStopBlinking = _TRUE; +- break; +- +- } +- +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE)) +- { +- SwLedOn(padapter, pLed); +- } +- else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) && pLed->bLedOn == _TRUE) +- { +- SwLedOff(padapter, pLed); +- } +- +- pLed->BlinkTimes = 0; +- pLed->bLedBlinkInProgress = _FALSE; +- } +- else +- { +- // Assign LED state to toggle. +- if( pLed->BlinkingLedState == RTW_LED_ON ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- +- // Schedule a timer to toggle LED state. +- switch( pLed->CurrLedState ) +- { +- case LED_BLINK_NORMAL: +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); +- break; +- +- case LED_BLINK_SLOWLY: +- case LED_BLINK_StartToBlink: +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); +- break; +- +- case LED_BLINK_WPS: +- { +- if( pLed->BlinkingLedState == RTW_LED_ON ) +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); +- else +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); +- } +- break; +- +- default: +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); +- break; +- } +- } +-} +- +-void +-SwLedBlink1( +- PLED_SDIO pLed +- ) +-{ +- _adapter *padapter = pLed->padapter; +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- struct led_priv *ledpriv = &(padapter->ledpriv); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- PLED_SDIO pLed1 = &(ledpriv->SwLed1); +- u8 bStopBlinking = _FALSE; +- +- if(pEEPROM->CustomerID == RT_CID_819x_CAMEO) +- pLed = &(ledpriv->SwLed1); +- +- // Change LED according to BlinkingLedState specified. +- if( pLed->BlinkingLedState == RTW_LED_ON ) +- { +- SwLedOn(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes)); +- } +- else +- { +- SwLedOff(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); +- } +- +- +- if(pEEPROM->CustomerID == RT_CID_DEFAULT) +- { +- if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) +- { +- if(!pLed1->bSWLedCtrl) +- { +- SwLedOn(padapter, pLed1); +- pLed1->bSWLedCtrl = _TRUE; +- } +- else if(!pLed1->bLedOn) +- SwLedOn(padapter, pLed1); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n")); +- } +- else +- { +- if(!pLed1->bSWLedCtrl) +- { +- SwLedOff(padapter, pLed1); +- pLed1->bSWLedCtrl = _TRUE; +- } +- else if(pLed1->bLedOn) +- SwLedOff(padapter, pLed1); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n")); +- } +- } +- +- switch(pLed->CurrLedState) +- { +- case LED_BLINK_SLOWLY: +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- break; +- +- case LED_BLINK_NORMAL: +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); +- break; +- +- case LED_BLINK_SCAN: +- pLed->BlinkTimes--; +- if( pLed->BlinkTimes == 0 ) +- { +- bStopBlinking = _TRUE; +- } +- +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) +- { +- pLed->bLedLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_NORMAL; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) +- { +- pLed->bLedNoLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SLOWLY; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- } +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- else +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- } +- } +- break; +- +- case LED_BLINK_TXRX: +- pLed->BlinkTimes--; +- if( pLed->BlinkTimes == 0 ) +- { +- bStopBlinking = _TRUE; +- } +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) +- { +- pLed->bLedLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_NORMAL; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) +- { +- pLed->bLedNoLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SLOWLY; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- } +- pLed->BlinkTimes = 0; +- pLed->bLedBlinkInProgress = _FALSE; +- } +- else +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- } +- break; +- +- case LED_BLINK_WPS: +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- break; +- +- case LED_BLINK_WPS_STOP: //WPS success +- if(pLed->BlinkingLedState == RTW_LED_ON) +- { +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); +- bStopBlinking = _FALSE; +- } +- else +- { +- bStopBlinking = _TRUE; +- } +- +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- pLed->bLedLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_NORMAL; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- } +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- break; +- +- default: +- break; +- } +- +-} +- +-void +-SwLedBlink2( +- PLED_SDIO pLed +- ) +-{ +- _adapter *padapter = pLed->padapter; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- u8 bStopBlinking = _FALSE; +- +- // Change LED according to BlinkingLedState specified. +- if( pLed->BlinkingLedState == RTW_LED_ON) +- { +- SwLedOn(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); +- } +- else +- { +- SwLedOff(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); +- } +- +- switch(pLed->CurrLedState) +- { +- case LED_BLINK_SCAN: +- pLed->BlinkTimes--; +- if( pLed->BlinkTimes == 0 ) +- { +- bStopBlinking = _TRUE; +- } +- +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) +- { +- pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- SwLedOn(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); +- +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) +- { +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- SwLedOff(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); +- } +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- else +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- } +- } +- break; +- +- case LED_BLINK_TXRX: +- pLed->BlinkTimes--; +- if( pLed->BlinkTimes == 0 ) +- { +- bStopBlinking = _TRUE; +- } +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) +- { +- pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- SwLedOn(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); +- +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) +- { +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- SwLedOff(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); +- } +- pLed->bLedBlinkInProgress = _FALSE; +- } +- else +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- } +- break; +- +- default: +- break; +- } +- +-} +- +-void +-SwLedBlink3( +- PLED_SDIO pLed +- ) +-{ +- _adapter *padapter = pLed->padapter; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- u8 bStopBlinking = _FALSE; +- +- // Change LED according to BlinkingLedState specified. +- if( pLed->BlinkingLedState == RTW_LED_ON ) +- { +- SwLedOn(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); +- } +- else +- { +- if(pLed->CurrLedState != LED_BLINK_WPS_STOP) +- SwLedOff(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); +- } +- +- switch(pLed->CurrLedState) +- { +- case LED_BLINK_SCAN: +- pLed->BlinkTimes--; +- if( pLed->BlinkTimes == 0 ) +- { +- bStopBlinking = _TRUE; +- } +- +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) +- { +- pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- if( !pLed->bLedOn ) +- SwLedOn(padapter, pLed); +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) +- { +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- if( pLed->bLedOn ) +- SwLedOff(padapter, pLed); +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- } +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- else +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- } +- } +- break; +- +- case LED_BLINK_TXRX: +- pLed->BlinkTimes--; +- if( pLed->BlinkTimes == 0 ) +- { +- bStopBlinking = _TRUE; +- } +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) +- { +- pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- +- if( !pLed->bLedOn ) +- SwLedOn(padapter, pLed); +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- } +- else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) +- { +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- +- if( pLed->bLedOn ) +- SwLedOff(padapter, pLed); +- +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- } +- pLed->bLedBlinkInProgress = _FALSE; +- } +- else +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- } +- break; +- +- case LED_BLINK_WPS: +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- break; +- +- case LED_BLINK_WPS_STOP: //WPS success +- if(pLed->BlinkingLedState == RTW_LED_ON) +- { +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); +- bStopBlinking = _FALSE; +- } +- else +- { +- bStopBlinking = _TRUE; +- } +- +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- SwLedOn(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- } +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- break; +- +- +- default: +- break; +- } +- +-} +- +- +-void +-SwLedBlink4( +- PLED_SDIO pLed +- ) +-{ +- _adapter *padapter = pLed->padapter; +- struct led_priv *ledpriv = &(padapter->ledpriv); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- PLED_SDIO pLed1 = &(ledpriv->SwLed1); +- u8 bStopBlinking = _FALSE; +- +- // Change LED according to BlinkingLedState specified. +- if( pLed->BlinkingLedState == RTW_LED_ON ) +- { +- SwLedOn(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); +- } +- else +- { +- SwLedOff(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); +- } +- +- if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN) +- { +- pLed1->BlinkingLedState = RTW_LED_OFF; +- pLed1->CurrLedState = RTW_LED_OFF; +- SwLedOff(padapter, pLed1); +- } +- +- switch(pLed->CurrLedState) +- { +- case LED_BLINK_SLOWLY: +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- break; +- +- case LED_BLINK_StartToBlink: +- if( pLed->bLedOn ) +- { +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); +- } +- else +- { +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); +- } +- break; +- +- case LED_BLINK_SCAN: +- pLed->BlinkTimes--; +- if( pLed->BlinkTimes == 0 ) +- { +- bStopBlinking = _FALSE; +- } +- +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- pLed->CurrLedState = LED_BLINK_SLOWLY; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- } +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- else +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- } +- } +- break; +- +- case LED_BLINK_TXRX: +- pLed->BlinkTimes--; +- if( pLed->BlinkTimes == 0 ) +- { +- bStopBlinking = _TRUE; +- } +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- pLed->bLedNoLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SLOWLY; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- } +- pLed->bLedBlinkInProgress = _FALSE; +- } +- else +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- } +- break; +- +- case LED_BLINK_WPS: +- if( pLed->bLedOn ) +- { +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); +- } +- else +- { +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); +- } +- break; +- +- case LED_BLINK_WPS_STOP: //WPS authentication fail +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); +- break; +- +- case LED_BLINK_WPS_STOP_OVERLAP: //WPS session overlap +- pLed->BlinkTimes--; +- if(pLed->BlinkTimes == 0) +- { +- if(pLed->bLedOn) +- { +- pLed->BlinkTimes = 1; +- } +- else +- { +- bStopBlinking = _TRUE; +- } +- } +- +- if(bStopBlinking) +- { +- pLed->BlinkTimes = 10; +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); +- } +- else +- { +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); +- } +- break; +- +- default: +- break; +- } +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState)); +- +- +-} +- +-void +-SwLedBlink5( +- PLED_SDIO pLed +- ) +-{ +- _adapter *padapter = pLed->padapter; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- u8 bStopBlinking = _FALSE; +- +- // Change LED according to BlinkingLedState specified. +- if( pLed->BlinkingLedState == RTW_LED_ON ) +- { +- SwLedOn(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); +- } +- else +- { +- SwLedOff(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); +- } +- +- switch(pLed->CurrLedState) +- { +- case LED_BLINK_SCAN: +- pLed->BlinkTimes--; +- if( pLed->BlinkTimes == 0 ) +- { +- bStopBlinking = _TRUE; +- } +- +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) +- { +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- if(pLed->bLedOn) +- SwLedOff(padapter, pLed); +- } +- else +- { pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- if(!pLed->bLedOn) +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- else +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- } +- } +- break; +- +- +- case LED_BLINK_TXRX: +- pLed->BlinkTimes--; +- if( pLed->BlinkTimes == 0 ) +- { +- bStopBlinking = _TRUE; +- } +- +- if(bStopBlinking) +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) +- { +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- if(pLed->bLedOn) +- SwLedOff(padapter, pLed); +- } +- else +- { +- pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- if(!pLed->bLedOn) +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- +- pLed->bLedBlinkInProgress = _FALSE; +- } +- else +- { +- if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) +- { +- SwLedOff(padapter, pLed); +- } +- else +- { +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- } +- break; +- +- default: +- break; +- } +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState)); +- +- +-} +- +-void +-SwLedBlink6( +- PLED_SDIO pLed +- ) +-{ +- _adapter *padapter = pLed->padapter; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- u8 bStopBlinking = _FALSE; +- +- // Change LED according to BlinkingLedState specified. +- if( pLed->BlinkingLedState == RTW_LED_ON ) +- { +- SwLedOn(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); +- } +- else +- { +- SwLedOff(padapter, pLed); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); +- } +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink6\n")); +-} +- +-// +-// Description: +-// Handler function of LED Blinking. +-// We dispatch acture LED blink action according to LedStrategy. +-// +-void BlinkHandler(PLED_SDIO pLed) +-{ +- _adapter *padapter = pLed->padapter; +- struct led_priv *ledpriv = &(padapter->ledpriv); +- +- //DBG_871X("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); +- +- if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) +- { +- //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); +- return; +- } +- +- switch(ledpriv->LedStrategy) +- { +- case SW_LED_MODE0: +- SwLedBlink(pLed); +- break; +- +- case SW_LED_MODE1: +- SwLedBlink1(pLed); +- break; +- +- case SW_LED_MODE2: +- SwLedBlink2(pLed); +- break; +- +- case SW_LED_MODE3: +- SwLedBlink3(pLed); +- break; +- +- case SW_LED_MODE4: +- SwLedBlink4(pLed); +- break; +- +- case SW_LED_MODE5: +- SwLedBlink5(pLed); +- break; +- +- case SW_LED_MODE6: +- SwLedBlink6(pLed); +- break; +- +- default: +- //RT_TRACE(COMP_LED, DBG_LOUD, ("BlinkWorkItemCallback 0x%x \n", pHalData->LedStrategy)); +- //SwLedBlink(pLed); +- break; +- } +-} +- +-// +-// Description: +-// Callback function of LED BlinkTimer, +-// it just schedules to corresponding BlinkWorkItem/led_blink_hdl +-// +-void BlinkTimerCallback(void *data) +-{ +- PLED_SDIO pLed = (PLED_SDIO)data; +- _adapter *padapter = pLed->padapter; +- +- //DBG_871X("%s\n", __FUNCTION__); +- +- if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) +- { +- //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); +- return; +- } +- +- #ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD +- rtw_led_blink_cmd(padapter, pLed); +- #else +- _set_workitem(&(pLed->BlinkWorkItem)); +- #endif +-} +- +-// +-// Description: +-// Callback function of LED BlinkWorkItem. +-// We dispatch acture LED blink action according to LedStrategy. +-// +-void BlinkWorkItemCallback(_workitem *work) +-{ +- PLED_SDIO pLed = container_of(work, LED_SDIO, BlinkWorkItem); +- BlinkHandler(pLed); +-} +- +-static void +-SwLedControlMode0( +- _adapter *padapter, +- LED_CTL_MODE LedAction +-) +-{ +- struct led_priv *ledpriv = &(padapter->ledpriv); +- PLED_SDIO pLed = &(ledpriv->SwLed1); +- +- // Decide led state +- switch(LedAction) +- { +- case LED_CTL_TX: +- case LED_CTL_RX: +- if( pLed->bLedBlinkInProgress == _FALSE ) +- { +- pLed->bLedBlinkInProgress = _TRUE; +- +- pLed->CurrLedState = LED_BLINK_NORMAL; +- pLed->BlinkTimes = 2; +- +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); +- } +- break; +- +- case LED_CTL_START_TO_LINK: +- if( pLed->bLedBlinkInProgress == _FALSE ) +- { +- pLed->bLedBlinkInProgress = _TRUE; +- +- pLed->CurrLedState = LED_BLINK_StartToBlink; +- pLed->BlinkTimes = 24; +- +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); +- } +- else +- { +- pLed->CurrLedState = LED_BLINK_StartToBlink; +- } +- break; +- +- case LED_CTL_LINK: +- pLed->CurrLedState = RTW_LED_ON; +- if( pLed->bLedBlinkInProgress == _FALSE ) +- { +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), 0); +- } +- break; +- +- case LED_CTL_NO_LINK: +- pLed->CurrLedState = RTW_LED_OFF; +- if( pLed->bLedBlinkInProgress == _FALSE ) +- { +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), 0); +- } +- break; +- +- case LED_CTL_POWER_OFF: +- pLed->CurrLedState = RTW_LED_OFF; +- if(pLed->bLedBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- SwLedOff(padapter, pLed); +- break; +- +- case LED_CTL_START_WPS: +- if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == RTW_LED_ON) +- { +- pLed->bLedBlinkInProgress = _TRUE; +- +- pLed->CurrLedState = LED_BLINK_WPS; +- pLed->BlinkTimes = 20; +- +- if( pLed->bLedOn ) +- { +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); +- } +- else +- { +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); +- } +- } +- break; +- +- case LED_CTL_STOP_WPS: +- if(pLed->bLedBlinkInProgress) +- { +- pLed->CurrLedState = RTW_LED_OFF; +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- break; +- +- +- default: +- break; +- } +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); +- +-} +- +- //ALPHA, added by chiyoko, 20090106 +-static void +-SwLedControlMode1( +- _adapter *padapter, +- LED_CTL_MODE LedAction +-) +-{ +- struct led_priv *ledpriv = &(padapter->ledpriv); +- PLED_SDIO pLed = &(ledpriv->SwLed0); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- +- if(pEEPROM->CustomerID == RT_CID_819x_CAMEO) +- pLed = &(ledpriv->SwLed1); +- +- switch(LedAction) +- { +- case LED_CTL_POWER_ON: +- case LED_CTL_START_TO_LINK: +- case LED_CTL_NO_LINK: +- if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) +- { +- if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) +- { +- return; +- } +- if( pLed->bLedLinkBlinkInProgress == _TRUE ) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedLinkBlinkInProgress = _FALSE; +- } +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- +- pLed->bLedNoLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SLOWLY; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_LINK: +- if( pLed->bLedLinkBlinkInProgress == _FALSE ) +- { +- if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) +- { +- return; +- } +- if(pLed->bLedNoLinkBlinkInProgress == _TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- } +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- pLed->bLedLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_NORMAL; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_SITE_SURVEY: +- if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) +- ; +- else if(pLed->bLedScanBlinkInProgress ==_FALSE) +- { +- if(IS_LED_WPS_BLINKING(pLed)) +- return; +- +- if(pLed->bLedNoLinkBlinkInProgress == _TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- } +- if( pLed->bLedLinkBlinkInProgress == _TRUE ) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedLinkBlinkInProgress = _FALSE; +- } +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- pLed->bLedScanBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SCAN; +- pLed->BlinkTimes = 24; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- +- } +- break; +- +- case LED_CTL_TX: +- case LED_CTL_RX: +- if(pLed->bLedBlinkInProgress ==_FALSE) +- { +- if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) +- { +- return; +- } +- if(pLed->bLedNoLinkBlinkInProgress == _TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- } +- if( pLed->bLedLinkBlinkInProgress == _TRUE ) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedLinkBlinkInProgress = _FALSE; +- } +- pLed->bLedBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_TXRX; +- pLed->BlinkTimes = 2; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_START_WPS: //wait until xinpin finish +- case LED_CTL_START_WPS_BOTTON: +- if(pLed->bLedWPSBlinkInProgress ==_FALSE) +- { +- if(pLed->bLedNoLinkBlinkInProgress == _TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- } +- if( pLed->bLedLinkBlinkInProgress == _TRUE ) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedLinkBlinkInProgress = _FALSE; +- } +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if(pLed->bLedScanBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- pLed->bLedWPSBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_WPS; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- } +- break; +- +- +- case LED_CTL_STOP_WPS: +- if(pLed->bLedNoLinkBlinkInProgress == _TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- } +- if( pLed->bLedLinkBlinkInProgress == _TRUE ) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedLinkBlinkInProgress = _FALSE; +- } +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if(pLed->bLedScanBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- if(pLed->bLedWPSBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- } +- else +- { +- pLed->bLedWPSBlinkInProgress = _TRUE; +- } +- +- pLed->CurrLedState = LED_BLINK_WPS_STOP; +- if(pLed->bLedOn) +- { +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); +- } +- else +- { +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), 0); +- } +- break; +- +- case LED_CTL_STOP_WPS_FAIL: +- if(pLed->bLedWPSBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- +- pLed->bLedNoLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SLOWLY; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- break; +- +- case LED_CTL_POWER_OFF: +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- if( pLed->bLedNoLinkBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- } +- if( pLed->bLedLinkBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedLinkBlinkInProgress = _FALSE; +- } +- if( pLed->bLedBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if( pLed->bLedWPSBlinkInProgress ) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- if( pLed->bLedScanBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- +- SwLedOff(padapter, pLed); +- break; +- +- default: +- break; +- +- } +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); +-} +- +- //Arcadyan/Sitecom , added by chiyoko, 20090216 +-static void +-SwLedControlMode2( +- _adapter *padapter, +- LED_CTL_MODE LedAction +-) +-{ +- struct led_priv *ledpriv = &(padapter->ledpriv); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- PLED_SDIO pLed = &(ledpriv->SwLed0); +- +- switch(LedAction) +- { +- case LED_CTL_SITE_SURVEY: +- if(pmlmepriv->LinkDetectInfo.bBusyTraffic) +- ; +- else if(pLed->bLedScanBlinkInProgress ==_FALSE) +- { +- if(IS_LED_WPS_BLINKING(pLed)) +- return; +- +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- pLed->bLedScanBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SCAN; +- pLed->BlinkTimes = 24; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_TX: +- case LED_CTL_RX: +- if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) +- { +- if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) +- { +- return; +- } +- +- pLed->bLedBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_TXRX; +- pLed->BlinkTimes = 2; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_LINK: +- pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- if( pLed->bLedBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if( pLed->bLedScanBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- +- _set_timer(&(pLed->BlinkTimer), 0); +- break; +- +- case LED_CTL_START_WPS: //wait until xinpin finish +- case LED_CTL_START_WPS_BOTTON: +- if(pLed->bLedWPSBlinkInProgress ==_FALSE) +- { +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if(pLed->bLedScanBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- pLed->bLedWPSBlinkInProgress = _TRUE; +- pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), 0); +- } +- break; +- +- case LED_CTL_STOP_WPS: +- pLed->bLedWPSBlinkInProgress = _FALSE; +- if(adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) +- { +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), 0); +- } +- else +- { +- pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), 0); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- } +- break; +- +- case LED_CTL_STOP_WPS_FAIL: +- pLed->bLedWPSBlinkInProgress = _FALSE; +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), 0); +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +- break; +- +- case LED_CTL_START_TO_LINK: +- case LED_CTL_NO_LINK: +- if(!IS_LED_BLINKING(pLed)) +- { +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), 0); +- } +- break; +- +- case LED_CTL_POWER_OFF: +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- if( pLed->bLedBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if( pLed->bLedScanBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- if( pLed->bLedWPSBlinkInProgress ) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- +- SwLedOff(padapter, pLed); +- break; +- +- default: +- break; +- +- } +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +-} +- +- //COREGA, added by chiyoko, 20090316 +- static void +- SwLedControlMode3( +- _adapter *padapter, +- LED_CTL_MODE LedAction +-) +-{ +- struct led_priv *ledpriv = &(padapter->ledpriv); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- PLED_SDIO pLed = &(ledpriv->SwLed0); +- +- switch(LedAction) +- { +- case LED_CTL_SITE_SURVEY: +- if(pmlmepriv->LinkDetectInfo.bBusyTraffic) +- ; +- else if(pLed->bLedScanBlinkInProgress ==_FALSE) +- { +- if(IS_LED_WPS_BLINKING(pLed)) +- return; +- +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- pLed->bLedScanBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SCAN; +- pLed->BlinkTimes = 24; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_TX: +- case LED_CTL_RX: +- if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) +- { +- if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) +- { +- return; +- } +- +- pLed->bLedBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_TXRX; +- pLed->BlinkTimes = 2; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_LINK: +- if(IS_LED_WPS_BLINKING(pLed)) +- return; +- +- pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- if( pLed->bLedBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if( pLed->bLedScanBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- +- _set_timer(&(pLed->BlinkTimer), 0); +- break; +- +- case LED_CTL_START_WPS: //wait until xinpin finish +- case LED_CTL_START_WPS_BOTTON: +- if(pLed->bLedWPSBlinkInProgress ==_FALSE) +- { +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if(pLed->bLedScanBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- pLed->bLedWPSBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_WPS; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_STOP_WPS: +- if(pLed->bLedWPSBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- else +- { +- pLed->bLedWPSBlinkInProgress = _TRUE; +- } +- +- pLed->CurrLedState = LED_BLINK_WPS_STOP; +- if(pLed->bLedOn) +- { +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); +- } +- else +- { +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), 0); +- } +- +- break; +- +- case LED_CTL_STOP_WPS_FAIL: +- if(pLed->bLedWPSBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), 0); +- break; +- +- case LED_CTL_START_TO_LINK: +- case LED_CTL_NO_LINK: +- if(!IS_LED_BLINKING(pLed)) +- { +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), 0); +- } +- break; +- +- case LED_CTL_POWER_OFF: +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- if( pLed->bLedBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if( pLed->bLedScanBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- if( pLed->bLedWPSBlinkInProgress ) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- +- SwLedOff(padapter, pLed); +- break; +- +- default: +- break; +- +- } +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +-} +- +- +- //Edimax-Belkin, added by chiyoko, 20090413 +-static void +-SwLedControlMode4( +- _adapter *padapter, +- LED_CTL_MODE LedAction +-) +-{ +- struct led_priv *ledpriv = &(padapter->ledpriv); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- PLED_SDIO pLed = &(ledpriv->SwLed0); +- PLED_SDIO pLed1 = &(ledpriv->SwLed1); +- +- switch(LedAction) +- { +- case LED_CTL_START_TO_LINK: +- if(pLed1->bLedWPSBlinkInProgress) +- { +- pLed1->bLedWPSBlinkInProgress = _FALSE; +- _cancel_timer_ex(&(pLed1->BlinkTimer)); +- +- pLed1->BlinkingLedState = RTW_LED_OFF; +- pLed1->CurrLedState = RTW_LED_OFF; +- +- if(pLed1->bLedOn) +- _set_timer(&(pLed->BlinkTimer), 0); +- } +- +- if( pLed->bLedStartToLinkBlinkInProgress == _FALSE ) +- { +- if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) +- { +- return; +- } +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if(pLed->bLedNoLinkBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- } +- +- pLed->bLedStartToLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_StartToBlink; +- if( pLed->bLedOn ) +- { +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); +- } +- else +- { +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); +- } +- } +- break; +- +- case LED_CTL_LINK: +- case LED_CTL_NO_LINK: +- //LED1 settings +- if(LedAction == LED_CTL_LINK) +- { +- if(pLed1->bLedWPSBlinkInProgress) +- { +- pLed1->bLedWPSBlinkInProgress = _FALSE; +- _cancel_timer_ex(&(pLed1->BlinkTimer)); +- +- pLed1->BlinkingLedState = RTW_LED_OFF; +- pLed1->CurrLedState = RTW_LED_OFF; +- +- if(pLed1->bLedOn) +- _set_timer(&(pLed->BlinkTimer), 0); +- } +- } +- +- if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) +- { +- if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) +- { +- return; +- } +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- +- pLed->bLedNoLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SLOWLY; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_SITE_SURVEY: +- if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) +- ; +- else if(pLed->bLedScanBlinkInProgress ==_FALSE) +- { +- if(IS_LED_WPS_BLINKING(pLed)) +- return; +- +- if(pLed->bLedNoLinkBlinkInProgress == _TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- } +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- pLed->bLedScanBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SCAN; +- pLed->BlinkTimes = 24; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_TX: +- case LED_CTL_RX: +- if(pLed->bLedBlinkInProgress ==_FALSE) +- { +- if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) +- { +- return; +- } +- if(pLed->bLedNoLinkBlinkInProgress == _TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- } +- pLed->bLedBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_TXRX; +- pLed->BlinkTimes = 2; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_START_WPS: //wait until xinpin finish +- case LED_CTL_START_WPS_BOTTON: +- if(pLed1->bLedWPSBlinkInProgress) +- { +- pLed1->bLedWPSBlinkInProgress = _FALSE; +- _cancel_timer_ex(&(pLed1->BlinkTimer)); +- +- pLed1->BlinkingLedState = RTW_LED_OFF; +- pLed1->CurrLedState = RTW_LED_OFF; +- +- if(pLed1->bLedOn) +- _set_timer(&(pLed->BlinkTimer), 0); +- } +- +- if(pLed->bLedWPSBlinkInProgress ==_FALSE) +- { +- if(pLed->bLedNoLinkBlinkInProgress == _TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- } +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if(pLed->bLedScanBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- pLed->bLedWPSBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_WPS; +- if( pLed->bLedOn ) +- { +- pLed->BlinkingLedState = RTW_LED_OFF; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); +- } +- else +- { +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); +- } +- } +- break; +- +- case LED_CTL_STOP_WPS: //WPS connect success +- if(pLed->bLedWPSBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- +- pLed->bLedNoLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SLOWLY; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- +- break; +- +- case LED_CTL_STOP_WPS_FAIL: //WPS authentication fail +- if(pLed->bLedWPSBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- +- pLed->bLedNoLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SLOWLY; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- +- //LED1 settings +- if(pLed1->bLedWPSBlinkInProgress) +- _cancel_timer_ex(&(pLed1->BlinkTimer)); +- else +- pLed1->bLedWPSBlinkInProgress = _TRUE; +- +- pLed1->CurrLedState = LED_BLINK_WPS_STOP; +- if( pLed1->bLedOn ) +- pLed1->BlinkingLedState = RTW_LED_OFF; +- else +- pLed1->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); +- +- break; +- +- case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap +- if(pLed->bLedWPSBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- +- pLed->bLedNoLinkBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SLOWLY; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); +- +- //LED1 settings +- if(pLed1->bLedWPSBlinkInProgress) +- _cancel_timer_ex(&(pLed1->BlinkTimer)); +- else +- pLed1->bLedWPSBlinkInProgress = _TRUE; +- +- pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; +- pLed1->BlinkTimes = 10; +- if( pLed1->bLedOn ) +- pLed1->BlinkingLedState = RTW_LED_OFF; +- else +- pLed1->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); +- +- break; +- +- case LED_CTL_POWER_OFF: +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- +- if( pLed->bLedNoLinkBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- } +- if( pLed->bLedLinkBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedLinkBlinkInProgress = _FALSE; +- } +- if( pLed->bLedBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- if( pLed->bLedWPSBlinkInProgress ) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedWPSBlinkInProgress = _FALSE; +- } +- if( pLed->bLedScanBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedScanBlinkInProgress = _FALSE; +- } +- if( pLed->bLedStartToLinkBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedStartToLinkBlinkInProgress = _FALSE; +- } +- +- if( pLed1->bLedWPSBlinkInProgress ) +- { +- _cancel_timer_ex(&(pLed1->BlinkTimer)); +- pLed1->bLedWPSBlinkInProgress = _FALSE; +- } +- +- pLed1->BlinkingLedState = LED_UNKNOWN; +- SwLedOff(padapter, pLed); +- SwLedOff(padapter, pLed1); +- break; +- +- default: +- break; +- +- } +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); +-} +- +- +- +- //Sercomm-Belkin, added by chiyoko, 20090415 +-static void +-SwLedControlMode5( +- _adapter *padapter, +- LED_CTL_MODE LedAction +-) +-{ +- struct led_priv *ledpriv = &(padapter->ledpriv); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- PLED_SDIO pLed = &(ledpriv->SwLed0); +- +- if(pEEPROM->CustomerID == RT_CID_819x_CAMEO) +- pLed = &(ledpriv->SwLed1); +- +- switch(LedAction) +- { +- case LED_CTL_POWER_ON: +- case LED_CTL_NO_LINK: +- case LED_CTL_LINK: //solid blue +- pLed->CurrLedState = RTW_LED_ON; +- pLed->BlinkingLedState = RTW_LED_ON; +- +- _set_timer(&(pLed->BlinkTimer), 0); +- break; +- +- case LED_CTL_SITE_SURVEY: +- if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) +- ; +- else if(pLed->bLedScanBlinkInProgress ==_FALSE) +- { +- if(pLed->bLedBlinkInProgress ==_TRUE) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- pLed->bLedScanBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_SCAN; +- pLed->BlinkTimes = 24; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_TX: +- case LED_CTL_RX: +- if(pLed->bLedBlinkInProgress ==_FALSE) +- { +- if(pLed->CurrLedState == LED_BLINK_SCAN) +- { +- return; +- } +- pLed->bLedBlinkInProgress = _TRUE; +- pLed->CurrLedState = LED_BLINK_TXRX; +- pLed->BlinkTimes = 2; +- if( pLed->bLedOn ) +- pLed->BlinkingLedState = RTW_LED_OFF; +- else +- pLed->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); +- } +- break; +- +- case LED_CTL_POWER_OFF: +- pLed->CurrLedState = RTW_LED_OFF; +- pLed->BlinkingLedState = RTW_LED_OFF; +- +- if( pLed->bLedBlinkInProgress) +- { +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- pLed->bLedBlinkInProgress = _FALSE; +- } +- +- SwLedOff(padapter, pLed); +- break; +- +- default: +- break; +- +- } +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); +-} +- +- //WNC-Corega, added by chiyoko, 20090902 +-static void +-SwLedControlMode6( +- _adapter *padapter, +- LED_CTL_MODE LedAction +-) +-{ +- struct led_priv *ledpriv = &(padapter->ledpriv); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- PLED_SDIO pLed0 = &(ledpriv->SwLed0); +- +- switch(LedAction) +- { +- case LED_CTL_POWER_ON: +- case LED_CTL_LINK: +- case LED_CTL_NO_LINK: +- _cancel_timer_ex(&(pLed0->BlinkTimer)); +- pLed0->CurrLedState = RTW_LED_ON; +- pLed0->BlinkingLedState = RTW_LED_ON; +- _set_timer(&(pLed0->BlinkTimer), 0); +- break; +- +- case LED_CTL_POWER_OFF: +- SwLedOff(padapter, pLed0); +- break; +- +- default: +- break; +- } +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("ledcontrol 6 Led %d\n", pLed0->CurrLedState)); +-} +- +-void +-LedControlSDIO( +- _adapter *padapter, +- LED_CTL_MODE LedAction +- ) +-{ +- struct led_priv *ledpriv = &(padapter->ledpriv); +- +- #if(MP_DRIVER == 1) +- if (padapter->registrypriv.mp_mode == 1) +- return; +-#endif +- +- if( (padapter->bSurpriseRemoved == _TRUE) ||(padapter->hw_init_completed == _FALSE) ) +- { +- return; +- } +- +- if( ledpriv->bRegUseLed == _FALSE) +- return; +- +- //if(priv->bInHctTest) +- // return; +- +-#ifdef CONFIG_CONCURRENT_MODE +- // Only do led action for PRIMARY_ADAPTER +- if (padapter->adapter_type != PRIMARY_ADAPTER) +- return; +-#endif +- +- if( (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && +- adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) && +- (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || +- LedAction == LED_CTL_SITE_SURVEY || +- LedAction == LED_CTL_LINK || +- LedAction == LED_CTL_NO_LINK || +- LedAction == LED_CTL_POWER_ON) ) +- { +- return; +- } +- +- switch(ledpriv->LedStrategy) +- { +- case SW_LED_MODE0: +- SwLedControlMode0(padapter, LedAction); +- break; +- +- case SW_LED_MODE1: +- SwLedControlMode1(padapter, LedAction); +- break; +- case SW_LED_MODE2: +- SwLedControlMode2(padapter, LedAction); +- break; +- +- case SW_LED_MODE3: +- SwLedControlMode3(padapter, LedAction); +- break; +- +- case SW_LED_MODE4: +- SwLedControlMode4(padapter, LedAction); +- break; +- +- case SW_LED_MODE5: +- SwLedControlMode5(padapter, LedAction); +- break; +- +- case SW_LED_MODE6: +- SwLedControlMode6(padapter, LedAction); +- break; +- +- default: +- break; +- } +- +- RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction)); +-} +- +-// +-// Description: +-// Reset status of LED_871x object. +-// +-void ResetLedStatus(PLED_SDIO pLed) { +- +- pLed->CurrLedState = RTW_LED_OFF; // Current LED state. +- pLed->bLedOn = _FALSE; // true if LED is ON, false if LED is OFF. +- +- pLed->bLedBlinkInProgress = _FALSE; // true if it is blinking, false o.w.. +- pLed->bLedWPSBlinkInProgress = _FALSE; +- +- pLed->BlinkTimes = 0; // Number of times to toggle led state for blinking. +- pLed->BlinkingLedState = LED_UNKNOWN; // Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. +- +- pLed->bLedNoLinkBlinkInProgress = _FALSE; +- pLed->bLedLinkBlinkInProgress = _FALSE; +- pLed->bLedStartToLinkBlinkInProgress = _FALSE; +- pLed->bLedScanBlinkInProgress = _FALSE; +-} +- +- // +-// Description: +-// Initialize an LED_871x object. +-// +-void +-InitLed( +- _adapter *padapter, +- PLED_SDIO pLed, +- LED_PIN LedPin +- ) +-{ +- pLed->padapter = padapter; +- pLed->LedPin = LedPin; +- +- ResetLedStatus(pLed); +- +- _init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed); +- +- _init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed); +-} +- +- +-// +-// Description: +-// DeInitialize an LED_871x object. +-// +-void +-DeInitLed( +- PLED_SDIO pLed +- ) +-{ +- _cancel_workitem_sync(&(pLed->BlinkWorkItem)); +- _cancel_timer_ex(&(pLed->BlinkTimer)); +- ResetLedStatus(pLed); +-} +- +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include ++#include ++ ++// ++// Description: ++// Implementation of LED blinking behavior. ++// It toggle off LED and schedule corresponding timer if necessary. ++// ++void ++SwLedBlink( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ // Determine if we shall change LED state again. ++ pLed->BlinkTimes--; ++ switch(pLed->CurrLedState) ++ { ++ ++ case LED_BLINK_NORMAL: ++ if(pLed->BlinkTimes == 0) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ case LED_BLINK_StartToBlink: ++ if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if( check_fwstate(pmlmepriv, _FW_LINKED) && ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ else if(pLed->BlinkTimes == 0) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ ++ default: ++ bStopBlinking = _TRUE; ++ break; ++ ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE)) ++ { ++ SwLedOn(padapter, pLed); ++ } ++ else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) && pLed->bLedOn == _TRUE) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ ++ pLed->BlinkTimes = 0; ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ // Assign LED state to toggle. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ // Schedule a timer to toggle LED state. ++ switch( pLed->CurrLedState ) ++ { ++ case LED_BLINK_NORMAL: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ break; ++ ++ case LED_BLINK_SLOWLY: ++ case LED_BLINK_StartToBlink: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ break; ++ ++ case LED_BLINK_WPS: ++ { ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ else ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ break; ++ ++ default: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ break; ++ } ++ } ++} ++ ++void ++SwLedBlink1( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ PLED_SDIO pLed1 = &(ledpriv->SwLed1); ++ u8 bStopBlinking = _FALSE; ++ ++ if(pHalData->CustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ ++ if(pHalData->CustomerID == RT_CID_DEFAULT) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ if(!pLed1->bSWLedCtrl) ++ { ++ SwLedOn(padapter, pLed1); ++ pLed1->bSWLedCtrl = _TRUE; ++ } ++ else if(!pLed1->bLedOn) ++ SwLedOn(padapter, pLed1); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n")); ++ } ++ else ++ { ++ if(!pLed1->bSWLedCtrl) ++ { ++ SwLedOff(padapter, pLed1); ++ pLed1->bSWLedCtrl = _TRUE; ++ } ++ else if(pLed1->bLedOn) ++ SwLedOff(padapter, pLed1); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n")); ++ } ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SLOWLY: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_NORMAL: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_SCAN: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_TXRX: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->BlinkTimes = 0; ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS success ++ if(pLed->BlinkingLedState == RTW_LED_ON) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ bStopBlinking = _FALSE; ++ } ++ else ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++void ++SwLedBlink2( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SCAN: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_TXRX: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++void ++SwLedBlink3( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ if(pLed->CurrLedState != LED_BLINK_WPS_STOP) ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SCAN: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if( !pLed->bLedOn ) ++ SwLedOn(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedOn ) ++ SwLedOff(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_TXRX: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ if( !pLed->bLedOn ) ++ SwLedOn(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ ++ if( pLed->bLedOn ) ++ SwLedOff(padapter, pLed); ++ ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS success ++ if(pLed->BlinkingLedState == RTW_LED_ON) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ bStopBlinking = _FALSE; ++ } ++ else ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ break; ++ ++ ++ default: ++ break; ++ } ++ ++} ++ ++ ++void ++SwLedBlink4( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ PLED_SDIO pLed1 = &(ledpriv->SwLed1); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN) ++ { ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ SwLedOff(padapter, pLed1); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SLOWLY: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_StartToBlink: ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_BLINK_SCAN: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _FALSE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_TXRX: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS authentication fail ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ break; ++ ++ case LED_BLINK_WPS_STOP_OVERLAP: //WPS session overlap ++ pLed->BlinkTimes--; ++ if(pLed->BlinkTimes == 0) ++ { ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkTimes = 1; ++ } ++ else ++ { ++ bStopBlinking = _TRUE; ++ } ++ } ++ ++ if(bStopBlinking) ++ { ++ pLed->BlinkTimes = 10; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState)); ++ ++ ++} ++ ++void ++SwLedBlink5( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SCAN: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if(pLed->bLedOn) ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if(!pLed->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ ++ case LED_BLINK_TXRX: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if(pLed->bLedOn) ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if(!pLed->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState)); ++ ++ ++} ++ ++void ++SwLedBlink6( ++ PLED_SDIO pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink6\n")); ++} ++ ++// ++// Description: ++// Handler function of LED Blinking. ++// We dispatch acture LED blink action according to LedStrategy. ++// ++void BlinkHandler(PLED_SDIO pLed) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ ++ //DBG_871X("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); ++ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { ++ DBG_871X("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" ++ , __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False"); ++ ++ return; ++ } ++ ++ switch(ledpriv->LedStrategy) ++ { ++ case SW_LED_MODE0: ++ SwLedBlink(pLed); ++ break; ++ ++ case SW_LED_MODE1: ++ SwLedBlink1(pLed); ++ break; ++ ++ case SW_LED_MODE2: ++ SwLedBlink2(pLed); ++ break; ++ ++ case SW_LED_MODE3: ++ SwLedBlink3(pLed); ++ break; ++ ++ case SW_LED_MODE4: ++ SwLedBlink4(pLed); ++ break; ++ ++ case SW_LED_MODE5: ++ SwLedBlink5(pLed); ++ break; ++ ++ case SW_LED_MODE6: ++ SwLedBlink6(pLed); ++ break; ++ ++ default: ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("BlinkWorkItemCallback 0x%x \n", pHalData->LedStrategy)); ++ //SwLedBlink(pLed); ++ break; ++ } ++} ++ ++// ++// Description: ++// Callback function of LED BlinkTimer, ++// it just schedules to corresponding BlinkWorkItem/led_blink_hdl ++// ++void BlinkTimerCallback(void *data) ++{ ++ PLED_SDIO pLed = (PLED_SDIO)data; ++ _adapter *padapter = pLed->padapter; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { ++ /*DBG_871X("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" ++ , __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False" );*/ ++ return; ++ } ++ ++ #ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD ++ rtw_led_blink_cmd(padapter, pLed); ++ #else ++ _set_workitem(&(pLed->BlinkWorkItem)); ++ #endif ++} ++ ++// ++// Description: ++// Callback function of LED BlinkWorkItem. ++// We dispatch acture LED blink action according to LedStrategy. ++// ++void BlinkWorkItemCallback(_workitem *work) ++{ ++ PLED_SDIO pLed = container_of(work, LED_SDIO, BlinkWorkItem); ++ BlinkHandler(pLed); ++} ++ ++static void ++SwLedControlMode0( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ PLED_SDIO pLed = &(ledpriv->SwLed1); ++ ++ // Decide led state ++ switch(LedAction) ++ { ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ pLed->BlinkTimes = 2; ++ ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ pLed->BlinkTimes = 24; ++ ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ pLed->CurrLedState = RTW_LED_ON; ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_NO_LINK: ++ pLed->CurrLedState = RTW_LED_OFF; ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ if(pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ SwLedOff(padapter, pLed); ++ break; ++ ++ case LED_CTL_START_WPS: ++ if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == RTW_LED_ON) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_WPS; ++ pLed->BlinkTimes = 20; ++ ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedBlinkInProgress) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ break; ++ ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++ ++} ++ ++ //ALPHA, added by chiyoko, 20090106 ++static void ++SwLedControlMode1( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ PLED_SDIO pLed = &(ledpriv->SwLed0); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ ++ if(pHalData->CustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ if( pLed->bLedLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SCAN; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_TXRX; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ } ++ else ++ { ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ } ++ ++ pLed->CurrLedState = LED_BLINK_WPS_STOP; ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedNoLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ //Arcadyan/Sitecom , added by chiyoko, 20090216 ++static void ++SwLedControlMode2( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_SDIO pLed = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_SITE_SURVEY: ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SCAN; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_TXRX; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ if(adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ else ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if(!IS_LED_BLINKING(pLed)) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++} ++ ++ //COREGA, added by chiyoko, 20090316 ++ static void ++ SwLedControlMode3( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_SDIO pLed = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_SITE_SURVEY: ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SCAN; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_TXRX; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ } ++ ++ pLed->CurrLedState = LED_BLINK_WPS_STOP; ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if(!IS_LED_BLINKING(pLed)) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++} ++ ++ ++ //Edimax-Belkin, added by chiyoko, 20090413 ++static void ++SwLedControlMode4( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_SDIO pLed = &(ledpriv->SwLed0); ++ PLED_SDIO pLed1 = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_START_TO_LINK: ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ if( pLed->bLedStartToLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedStartToLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ case LED_CTL_NO_LINK: ++ //LED1 settings ++ if(LedAction == LED_CTL_LINK) ++ { ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ } ++ ++ if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SCAN; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_TXRX; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: //WPS connect success ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: //WPS authentication fail ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ //LED1 settings ++ if(pLed1->bLedWPSBlinkInProgress) ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ else ++ pLed1->bLedWPSBlinkInProgress = _TRUE; ++ ++ pLed1->CurrLedState = LED_BLINK_WPS_STOP; ++ if( pLed1->bLedOn ) ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed1->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ //LED1 settings ++ if(pLed1->bLedWPSBlinkInProgress) ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ else ++ pLed1->bLedWPSBlinkInProgress = _TRUE; ++ ++ pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; ++ pLed1->BlinkTimes = 10; ++ if( pLed1->bLedOn ) ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed1->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ ++ if( pLed->bLedNoLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedStartToLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedStartToLinkBlinkInProgress = _FALSE; ++ } ++ ++ if( pLed1->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed1->BlinkingLedState = LED_UNKNOWN; ++ SwLedOff(padapter, pLed); ++ SwLedOff(padapter, pLed1); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ ++ ++ //Sercomm-Belkin, added by chiyoko, 20090415 ++static void ++SwLedControlMode5( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ PLED_SDIO pLed = &(ledpriv->SwLed0); ++ ++ if(pHalData->CustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_NO_LINK: ++ case LED_CTL_LINK: //solid blue ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SCAN; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_BLINK_SCAN) ++ { ++ return; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_TXRX; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ //WNC-Corega, added by chiyoko, 20090902 ++static void ++SwLedControlMode6( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_SDIO pLed0 = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_LINK: ++ case LED_CTL_NO_LINK: ++ _cancel_timer_ex(&(pLed0->BlinkTimer)); ++ pLed0->CurrLedState = RTW_LED_ON; ++ pLed0->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed0->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ SwLedOff(padapter, pLed0); ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("ledcontrol 6 Led %d\n", pLed0->CurrLedState)); ++} ++ ++void ++LedControlSDIO( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++ ) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ ++ #if(MP_DRIVER == 1) ++ if (padapter->registrypriv.mp_mode == 1) ++ return; ++#endif ++ ++ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { ++ /*DBG_871X("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" ++ , __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False");*/ ++ return; ++ } ++ ++ if( ledpriv->bRegUseLed == _FALSE) ++ return; ++ ++ //if(priv->bInHctTest) ++ // return; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ // Only do led action for PRIMARY_ADAPTER ++ if (padapter->adapter_type != PRIMARY_ADAPTER) ++ return; ++#endif ++ ++ if( (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && ++ adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) && ++ (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || ++ LedAction == LED_CTL_SITE_SURVEY || ++ LedAction == LED_CTL_LINK || ++ LedAction == LED_CTL_NO_LINK || ++ LedAction == LED_CTL_POWER_ON) ) ++ { ++ return; ++ } ++ ++ switch(ledpriv->LedStrategy) ++ { ++ case SW_LED_MODE0: ++ SwLedControlMode0(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE1: ++ SwLedControlMode1(padapter, LedAction); ++ break; ++ case SW_LED_MODE2: ++ SwLedControlMode2(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE3: ++ SwLedControlMode3(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE4: ++ SwLedControlMode4(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE5: ++ SwLedControlMode5(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE6: ++ SwLedControlMode6(padapter, LedAction); ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction)); ++} ++ ++// ++// Description: ++// Reset status of LED_871x object. ++// ++void ResetLedStatus(PLED_SDIO pLed) { ++ ++ pLed->CurrLedState = RTW_LED_OFF; // Current LED state. ++ pLed->bLedOn = _FALSE; // true if LED is ON, false if LED is OFF. ++ ++ pLed->bLedBlinkInProgress = _FALSE; // true if it is blinking, false o.w.. ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ ++ pLed->BlinkTimes = 0; // Number of times to toggle led state for blinking. ++ pLed->BlinkingLedState = LED_UNKNOWN; // Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. ++ ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ pLed->bLedStartToLinkBlinkInProgress = _FALSE; ++ pLed->bLedScanBlinkInProgress = _FALSE; ++} ++ ++ // ++// Description: ++// Initialize an LED_871x object. ++// ++void ++InitLed( ++ _adapter *padapter, ++ PLED_SDIO pLed, ++ LED_PIN LedPin ++ ) ++{ ++ pLed->padapter = padapter; ++ pLed->LedPin = LedPin; ++ ++ ResetLedStatus(pLed); ++ ++ _init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed); ++ ++ _init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed); ++} ++ ++ ++// ++// Description: ++// DeInitialize an LED_871x object. ++// ++void ++DeInitLed( ++ PLED_SDIO pLed ++ ) ++{ ++ _cancel_workitem_sync(&(pLed->BlinkWorkItem)); ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ ResetLedStatus(pLed); ++} ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halhwimg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halhwimg.h +new file mode 100644 +index 0000000..4c5c881 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halhwimg.h +@@ -0,0 +1,123 @@ ++#pragma once ++#ifndef __INC_HW_IMG_H ++#define __INC_HW_IMG_H ++ ++// ++// 2011/03/15 MH Add for different IC HW image file selection. code size consideration. ++// ++#if RT_PLATFORM == PLATFORM_LINUX ++ ++ #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++ // For 92C ++ #define RTL8192CE_HWIMG_SUPPORT 1 ++ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192CU_HWIMG_SUPPORT 0 ++ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 ++ ++ // For 92D ++ #define RTL8192DE_HWIMG_SUPPORT 1 ++ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192DU_HWIMG_SUPPORT 0 ++ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 ++ ++ // For 8723 ++ #define RTL8723E_HWIMG_SUPPORT 1 ++ #define RTL8723U_HWIMG_SUPPORT 0 ++ #define RTL8723S_HWIMG_SUPPORT 0 ++ ++ //For 88E ++ #define RTL8188EE_HWIMG_SUPPORT 0 ++ #define RTL8188EU_HWIMG_SUPPORT 0 ++ #define RTL8188ES_HWIMG_SUPPORT 0 ++ ++ #elif (DEV_BUS_TYPE == RT_USB_INTERFACE) ++ // For 92C ++ #define RTL8192CE_HWIMG_SUPPORT 0 ++ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192CU_HWIMG_SUPPORT 1 ++ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 ++ ++ //For 92D ++ #define RTL8192DE_HWIMG_SUPPORT 0 ++ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192DU_HWIMG_SUPPORT 1 ++ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 ++ ++ // For 8723 ++ #define RTL8723E_HWIMG_SUPPORT 0 ++ #define RTL8723U_HWIMG_SUPPORT 1 ++ #define RTL8723S_HWIMG_SUPPORT 0 ++ ++ //For 88E ++ #define RTL8188EE_HWIMG_SUPPORT 0 ++ #define RTL8188EU_HWIMG_SUPPORT 0 ++ #define RTL8188ES_HWIMG_SUPPORT 0 ++ ++ #elif (DEV_BUS_TYPE == RT_SDIO_INTERFACE) ++ // For 92C ++ #define RTL8192CE_HWIMG_SUPPORT 0 ++ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192CU_HWIMG_SUPPORT 1 ++ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 ++ ++ //For 92D ++ #define RTL8192DE_HWIMG_SUPPORT 0 ++ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 ++ #define RTL8192DU_HWIMG_SUPPORT 1 ++ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 ++ ++ // For 8723 ++ #define RTL8723E_HWIMG_SUPPORT 0 ++ #define RTL8723U_HWIMG_SUPPORT 0 ++ #define RTL8723S_HWIMG_SUPPORT 1 ++ ++ //For 88E ++ #define RTL8188EE_HWIMG_SUPPORT 0 ++ #define RTL8188EU_HWIMG_SUPPORT 0 ++ #define RTL8188ES_HWIMG_SUPPORT 0 ++ #endif ++ ++#else // PLATFORM_WINDOWS & MacOSX ++ ++//For 92C ++#define RTL8192CE_HWIMG_SUPPORT 1 ++#define RTL8192CE_TEST_HWIMG_SUPPORT 1 ++#define RTL8192CU_HWIMG_SUPPORT 1 ++#define RTL8192CU_TEST_HWIMG_SUPPORT 1 ++ ++// For 92D ++#define RTL8192DE_HWIMG_SUPPORT 1 ++#define RTL8192DE_TEST_HWIMG_SUPPORT 1 ++#define RTL8192DU_HWIMG_SUPPORT 1 ++#define RTL8192DU_TEST_HWIMG_SUPPORT 1 ++ ++ #if defined(UNDER_CE) ++ // For 8723 ++ #define RTL8723E_HWIMG_SUPPORT 0 ++ #define RTL8723U_HWIMG_SUPPORT 0 ++ #define RTL8723S_HWIMG_SUPPORT 1 ++ ++ // For 88E ++ #define RTL8188EE_HWIMG_SUPPORT 0 ++ #define RTL8188EU_HWIMG_SUPPORT 0 ++ #define RTL8188ES_HWIMG_SUPPORT 0 ++ ++ #else ++ ++ // For 8723 ++ #define RTL8723E_HWIMG_SUPPORT 1 ++ //#define RTL_8723E_TEST_HWIMG_SUPPORT 1 ++ #define RTL8723U_HWIMG_SUPPORT 1 ++ //#define RTL_8723U_TEST_HWIMG_SUPPORT 1 ++ #define RTL8723S_HWIMG_SUPPORT 1 ++ //#define RTL_8723S_TEST_HWIMG_SUPPORT 1 ++ ++ //For 88E ++ #define RTL8188EE_HWIMG_SUPPORT 1 ++ #define RTL8188EU_HWIMG_SUPPORT 1 ++ #define RTL8188ES_HWIMG_SUPPORT 1 ++ #endif ++ ++#endif ++ ++#endif //__INC_HW_IMG_H +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ap.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ap.c +new file mode 100644 +index 0000000..142fef1 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ap.c +@@ -0,0 +1,2504 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ #include "mp_precomp.h" ++ #include "phydm_precomp.h" ++ ++#ifndef index_mapping_NUM_88E ++ #define index_mapping_NUM_88E 15 ++#endif ++ ++//#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ ++ do {\ ++ for(_offset = 0; _offset < _size; _offset++)\ ++ {\ ++ if(_deltaThermal < thermalThreshold[_direction][_offset])\ ++ {\ ++ if(_offset != 0)\ ++ _offset--;\ ++ break;\ ++ }\ ++ } \ ++ if(_offset >= _size)\ ++ _offset = _size-1;\ ++ } while(0) ++ ++ ++void ConfigureTxpowerTrack( ++ IN PVOID pDM_VOID, ++ OUT PTXPWRTRACK_CFG pConfig ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if RTL8812A_SUPPORT ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ //if (IS_HARDWARE_TYPE_8812(pDM_Odm->Adapter)) ++ if(pDM_Odm->SupportICType==ODM_RTL8812) ++ ConfigureTxpowerTrack_8812A(pConfig); ++ //else ++#endif ++#endif ++ ++#if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType== ODM_RTL8814A) ++ ConfigureTxpowerTrack_8814A(pConfig); ++#endif ++ ++ ++#if RTL8188E_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ ConfigureTxpowerTrack_8188E(pConfig); ++#endif ++} ++ ++#if (RTL8192E_SUPPORT==1) ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_92E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte ThermalValue = 0, delta, delta_IQK, delta_LCK, channel, is_decrease, rf_mimo_mode; ++ u1Byte ThermalValue_AVG_count = 0; ++ u1Byte OFDM_min_index = 10; //OFDM BB Swing should be less than +2.5dB, which is required by Arthur ++ s1Byte OFDM_index[2], index ; ++ u4Byte ThermalValue_AVG = 0, Reg0x18; ++ u4Byte i = 0, j = 0, rf; ++ s4Byte value32, CCK_index = 0, ele_A, ele_D, ele_C, X, Y; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++ rf_mimo_mode = pDM_Odm->RFType; ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("%s:%d rf_mimo_mode:%d\n", __FUNCTION__, __LINE__, rf_mimo_mode)); ++ ++#ifdef MP_TEST ++ if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) { ++ channel = priv->pshare->working_channel; ++ if (priv->pshare->mp_txpwr_tracking == FALSE) ++ return; ++ } else ++#endif ++ { ++ channel = (priv->pmib->dot11RFEntry.dot11channel); ++ } ++ ++ ThermalValue = (unsigned char)ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_RF_T_METER_92E, 0xfc00); //0x42: RF Reg[15:10] 88E ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ ++ ++ switch (rf_mimo_mode) { ++ case MIMO_1T1R: ++ rf = 1; ++ break; ++ case MIMO_2T2R: ++ rf = 2; ++ break; ++ default: ++ rf = 2; ++ break; ++ } ++ ++ //Query OFDM path A default setting Bit[31:21] ++ ele_D = PHY_QueryBBReg(priv, rOFDM0_XATxIQImbalance, bMaskOFDM_D); ++ for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) { ++ if (ele_D == (OFDMSwingTable_92E[i] >> 22)) { ++ OFDM_index[0] = (unsigned char)i; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("PathA 0xC80[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[0])); ++ break; ++ } ++ } ++ ++ //Query OFDM path B default setting ++ if (rf_mimo_mode == MIMO_2T2R) { ++ ele_D = PHY_QueryBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskOFDM_D); ++ for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) { ++ if (ele_D == (OFDMSwingTable_92E[i] >> 22)) { ++ OFDM_index[1] = (unsigned char)i; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("PathB 0xC88[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[1])); ++ break; ++ } ++ } ++ } ++ ++ /* calculate average thermal meter */ ++ { ++ priv->pshare->ThermalValue_AVG_88XX[priv->pshare->ThermalValue_AVG_index_88XX] = ThermalValue; ++ priv->pshare->ThermalValue_AVG_index_88XX++; ++ if (priv->pshare->ThermalValue_AVG_index_88XX == AVG_THERMAL_NUM_88XX) ++ priv->pshare->ThermalValue_AVG_index_88XX = 0; ++ ++ for (i = 0; i < AVG_THERMAL_NUM_88XX; i++) { ++ if (priv->pshare->ThermalValue_AVG_88XX[i]) { ++ ThermalValue_AVG += priv->pshare->ThermalValue_AVG_88XX[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if (ThermalValue_AVG_count) { ++ ThermalValue = (unsigned char)(ThermalValue_AVG / ThermalValue_AVG_count); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("AVG Thermal Meter = 0x%x \n", ThermalValue)); ++ } ++ } ++ ++ /* Initialize */ ++ if (!priv->pshare->ThermalValue) { ++ priv->pshare->ThermalValue = priv->pmib->dot11RFEntry.ther; ++ priv->pshare->ThermalValue_IQK = ThermalValue; ++ priv->pshare->ThermalValue_LCK = ThermalValue; ++ } ++ ++ if (ThermalValue != priv->pshare->ThermalValue) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** START POWER TRACKING ********\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ ++ delta = RTL_ABS(ThermalValue, priv->pmib->dot11RFEntry.ther); ++ delta_IQK = RTL_ABS(ThermalValue, priv->pshare->ThermalValue_IQK); ++ delta_LCK = RTL_ABS(ThermalValue, priv->pshare->ThermalValue_LCK); ++ is_decrease = ((ThermalValue < priv->pmib->dot11RFEntry.ther) ? 1 : 0); ++ ++#ifdef _TRACKING_TABLE_FILE ++ if (priv->pshare->rf_ft_var.pwr_track_file) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Diff: (%s)%d ==> get index from table : %d)\n", (is_decrease?"-":"+"), delta, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0))); ++ ++ if (is_decrease) { ++ for (i = 0; i < rf; i++) { ++ OFDM_index[i] = priv->pshare->OFDM_index0[i] + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0); ++ OFDM_index[i] = ((OFDM_index[i] > (OFDM_TABLE_SIZE_92E- 1)) ? (OFDM_TABLE_SIZE_92E - 1) : OFDM_index[i]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0))); ++ CCK_index = priv->pshare->CCK_index0 + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1); ++ CCK_index = ((CCK_index > (CCK_TABLE_SIZE_92E - 1)) ? (CCK_TABLE_SIZE_92E - 1) : CCK_index); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> Decrese power ---> new CCK_INDEX:%d (%d + %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1))); ++ } ++ } else { ++ for (i = 0; i < rf; i++) { ++ OFDM_index[i] = priv->pshare->OFDM_index0[i] - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0); ++ OFDM_index[i] = ((OFDM_index[i] < OFDM_min_index) ? OFDM_min_index : OFDM_index[i]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> Increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0))); ++ CCK_index = priv->pshare->CCK_index0 - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1); ++ CCK_index = ((CCK_index < 0 )? 0 : CCK_index); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> Increse power ---> new CCK_INDEX:%d (%d - %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1))); ++ } ++ } ++ } ++#endif //CFG_TRACKING_TABLE_FILE ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDMSwingTable_92E[(unsigned int)OFDM_index[0]] = %x \n",OFDMSwingTable_92E[(unsigned int)OFDM_index[0]])); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDMSwingTable_92E[(unsigned int)OFDM_index[1]] = %x \n",OFDMSwingTable_92E[(unsigned int)OFDM_index[1]])); ++ ++ //Adujst OFDM Ant_A according to IQK result ++ ele_D = (OFDMSwingTable_92E[(unsigned int)OFDM_index[0]] & 0xFFC00000) >> 22; ++ X = priv->pshare->RegE94; ++ Y = priv->pshare->RegE9C; ++ ++ if (X != 0) { ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ ele_A = ((X * ele_D) >> 8) & 0x000003FF; ++ ++ //new element C = element D x Y ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ele_C = ((Y * ele_D) >> 8) & 0x000003FF; ++ ++ //wirte new elements A, C, D to regC80 and regC94, element B is always 0 ++ value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; ++ PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((X * ele_D)>>7)&0x01; ++ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), value32); ++ } else { ++ PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index[0]]); ++ PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); ++ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), 0x00); ++ } ++ ++ set_CCK_swing_index(priv, CCK_index); ++ ++ if (rf == 2) { ++ ele_D = (OFDMSwingTable_92E[(unsigned int)OFDM_index[1]] & 0xFFC00000) >> 22; ++ X = priv->pshare->RegEB4; ++ Y = priv->pshare->RegEBC; ++ ++ if (X != 0) { ++ if ((X & 0x00000200) != 0) //consider minus ++ X = X | 0xFFFFFC00; ++ ele_A = ((X * ele_D) >> 8) & 0x000003FF; ++ ++ //new element C = element D x Y ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ele_C = ((Y * ele_D) >> 8) & 0x00003FF; ++ ++ //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 ++ value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; ++ PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C & 0x000003C0) >> 6; ++ PHY_SetBBReg(priv, rOFDM0_XDTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((X * ele_D) >> 7) & 0x01; ++ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(28), value32); ++ } else { ++ PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index[1]]); ++ PHY_SetBBReg(priv, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); ++ PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(28), 0x00); ++ } ++ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc80 = 0x%x \n", PHY_QueryBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc88 = 0x%x \n", PHY_QueryBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord))); ++ ++ if (delta_IQK > 3) { ++ priv->pshare->ThermalValue_IQK = ThermalValue; ++#ifdef MP_TEST ++ if (!(priv->pshare->rf_ft_var.mp_specific && (OPMODE & (WIFI_MP_CTX_BACKGROUND | WIFI_MP_CTX_PACKET)))) ++#endif ++ PHY_IQCalibrate_8192E(pDM_Odm,false); ++ } ++ ++ if (delta_LCK > 8) { ++ RTL_W8(0x522, 0xff); ++ Reg0x18 = PHY_QueryRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, 1); ++ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 1); ++ PHY_SetRFReg(priv, RF_PATH_A, 0x18, BIT(15), 1); ++ delay_ms(1); ++ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 0); ++ PHY_SetRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, Reg0x18); ++ RTL_W8(0x522, 0x0); ++ priv->pshare->ThermalValue_LCK = ThermalValue; ++ } ++ } ++ ++ //update thermal meter value ++ priv->pshare->ThermalValue = ThermalValue; ++ for (i = 0 ; i < rf ; i++) ++ priv->pshare->OFDM_index[i] = OFDM_index[i]; ++ priv->pshare->CCK_index = CCK_index; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__)); ++} ++#endif ++ ++#if (RTL8814A_SUPPORT ==1) ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries2( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, channel, is_increase; ++ u1Byte ThermalValue_AVG_count = 0, p = 0, i = 0; ++ u4Byte ThermalValue_AVG = 0, Reg0x18; ++ u4Byte BBSwingReg[4] = {rA_TxScale_Jaguar,rB_TxScale_Jaguar,rC_TxScale_Jaguar2,rD_TxScale_Jaguar2}; ++ s4Byte ele_D; ++ u4Byte BBswingIdx; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ TXPWRTRACK_CFG c; ++ BOOLEAN bTSSIenable = FALSE; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. ++ pu1Byte deltaSwingTableIdx_TUP_A = NULL, deltaSwingTableIdx_TDOWN_A = NULL; ++ pu1Byte deltaSwingTableIdx_TUP_B = NULL, deltaSwingTableIdx_TDOWN_B = NULL; ++ //for 8814 add by Yu Chen ++ pu1Byte deltaSwingTableIdx_TUP_C = NULL, deltaSwingTableIdx_TDOWN_C = NULL; ++ pu1Byte deltaSwingTableIdx_TUP_D = NULL, deltaSwingTableIdx_TDOWN_D = NULL; ++ ++#ifdef MP_TEST ++ if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) { ++ channel = priv->pshare->working_channel; ++ if (priv->pshare->mp_txpwr_tracking == FALSE) ++ return; ++ } else ++#endif ++ { ++ channel = (priv->pmib->dot11RFEntry.dot11channel); ++ } ++ ++ ConfigureTxpowerTrack(pDM_Odm, &c); ++ pRFCalibrateInfo->DefaultOfdmIndex = priv->pshare->OFDM_index0[ODM_RF_PATH_A]; ++ ++ (*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_A, (pu1Byte*)&deltaSwingTableIdx_TDOWN_A, ++ (pu1Byte*)&deltaSwingTableIdx_TUP_B, (pu1Byte*)&deltaSwingTableIdx_TDOWN_B); ++ ++ if(pDM_Odm->SupportICType & ODM_RTL8814A) // for 8814 path C & D ++ (*c.GetDeltaSwingTable8814only)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_C, (pu1Byte*)&deltaSwingTableIdx_TDOWN_C, ++ (pu1Byte*)&deltaSwingTableIdx_TUP_D, (pu1Byte*)&deltaSwingTableIdx_TDOWN_D); ++ ++ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\nReadback Thermal Meter = 0x%x, pre thermal meter 0x%x, EEPROMthermalmeter 0x%x\n", ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ ++ /* Initialize */ ++ if (!pDM_Odm->RFCalibrateInfo.ThermalValue) { ++ pDM_Odm->RFCalibrateInfo.ThermalValue = priv->pmib->dot11RFEntry.ther; ++ } ++ ++ if (!pDM_Odm->RFCalibrateInfo.ThermalValue_LCK) { ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = priv->pmib->dot11RFEntry.ther; ++ } ++ ++ if (!pDM_Odm->RFCalibrateInfo.ThermalValue_IQK) { ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = priv->pmib->dot11RFEntry.ther; ++ } ++ ++ bTSSIenable = (BOOLEAN)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, rRF_TxGainOffset, BIT7); // check TSSI enable ++ ++ //4 Query OFDM BB swing default setting Bit[31:21] ++ for(p = ODM_RF_PATH_A ; p < c.RfPathCount ; p++) ++ { ++ ele_D = ODM_GetBBReg(pDM_Odm, BBSwingReg[p], 0xffe00000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("0x%x:0x%x ([31:21] = 0x%x)\n", BBSwingReg[p], ODM_GetBBReg(pDM_Odm, BBSwingReg[p], bMaskDWord), ele_D)); ++ ++ for (BBswingIdx = 0; BBswingIdx < TXSCALE_TABLE_SIZE; BBswingIdx++) {//4 ++ if (ele_D == TxScalingTable_Jaguar[BBswingIdx]) { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = (u1Byte)BBswingIdx; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("OFDM_index[%d]=%d\n",p, pDM_Odm->RFCalibrateInfo.OFDM_index[p])); ++ break; ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("KfreeOffset[%d]=%d\n",p, pRFCalibrateInfo->KfreeOffset[p])); ++ ++ } ++ ++ /* calculate average thermal meter */ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == c.AverageThermalNum) //Average times = c.AverageThermalNum ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; ++ ++ for(i = 0; i < c.AverageThermalNum; i++) ++ { ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) ++ { ++ ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times ++ { ++ ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("AVG Thermal Meter = 0x%X, EEPROMthermalmeter = 0x%X\n", ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ } ++ ++ //4 Calculate delta, delta_LCK, delta_IQK. ++ delta = RTL_ABS(ThermalValue, priv->pmib->dot11RFEntry.ther); ++ delta_LCK = RTL_ABS(ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue_LCK); ++ delta_IQK = RTL_ABS(ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue_IQK); ++ is_increase = ((ThermalValue < priv->pmib->dot11RFEntry.ther) ? 0 : 1); ++ ++ //4 if necessary, do LCK. ++ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { ++ if (delta_LCK > c.Threshold_IQK) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK)); ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; ++ if (c.PHY_LCCalibrate) ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ } ++ } ++ ++ if (delta_IQK > c.Threshold_IQK) ++ { ++ panic_printk("%s(%d)\n", __FUNCTION__, __LINE__); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= Threshold_IQK(%d)\n", delta_IQK, c.Threshold_IQK)); ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; ++ if(c.DoIQK) ++ (*c.DoIQK)(pDM_Odm, TRUE, 0, 0); ++ } ++ ++ if(!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/ ++ return; ++ ++ //4 Do Power Tracking ++ ++ if(bTSSIenable == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter PURE TSSI MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, TSSI_MODE, p, 0); ++ } ++ else if (ThermalValue != pDM_Odm->RFCalibrateInfo.ThermalValue) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\n******** START POWER TRACKING ********\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ ++#ifdef _TRACKING_TABLE_FILE ++ if (priv->pshare->rf_ft_var.pwr_track_file) ++ { ++ if (is_increase) // thermal is higher than base ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ switch(p) ++ { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_B[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_C[%d] = %d\n", delta, deltaSwingTableIdx_TUP_C[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_C[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_D[%d] = %d\n", delta, deltaSwingTableIdx_TUP_D[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_D[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_A[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ } ++ } ++ else // thermal is lower than base ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ switch(p) ++ { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_C[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_C[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_D[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_D[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta])); ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ } ++ } ++ ++ if (is_increase) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> increse power ---> \n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> decrese power --->\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); ++ } ++ } ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** END:%s() ********\n", __FUNCTION__)); ++ //update thermal meter value ++ pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; ++ ++ } ++} ++ ++#elif(ODM_IC_11AC_SERIES_SUPPORT) ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ unsigned char ThermalValue = 0, delta, delta_LCK, channel, is_decrease; ++ unsigned char ThermalValue_AVG_count = 0; ++ unsigned int ThermalValue_AVG = 0, Reg0x18; ++ unsigned int BBSwingReg[4]={0xc1c,0xe1c,0x181c,0x1a1c}; ++ int ele_D, value32; ++ char OFDM_index[2], index; ++ unsigned int i = 0, j = 0, rf_path, max_rf_path =2 ,rf; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ unsigned char OFDM_min_index = 7; //OFDM BB Swing should be less than +2.5dB, which is required by Arthur and Mimic ++ ++#ifdef MP_TEST ++ if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) { ++ channel = priv->pshare->working_channel; ++ if (priv->pshare->mp_txpwr_tracking == FALSE) ++ return; ++ } else ++#endif ++ { ++ channel = (priv->pmib->dot11RFEntry.dot11channel); ++ } ++ ++#if RTL8881A_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8881A) { ++ max_rf_path = 1; ++ if ((get_bonding_type_8881A() == BOND_8881AM ||get_bonding_type_8881A() == BOND_8881AN) ++ && priv->pshare->rf_ft_var.use_intpa8881A && (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G)) ++ OFDM_min_index = 6; // intPA - upper bond set to +3 dB (base: -2 dB)ot11RFEntry.phyBandSelect == PHY_BAND_2G)) ++ else ++ OFDM_min_index = 10; //OFDM BB Swing should be less than +1dB, which is required by Arthur and Mimic ++ } ++#endif ++ ++ ++ ThermalValue = (unsigned char)PHY_QueryRFReg(priv, RF_PATH_A, 0x42, 0xfc00, 1); //0x42: RF Reg[15:10] 88E ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ ++ ++ //4 Query OFDM BB swing default setting Bit[31:21] ++ for(rf_path = 0 ; rf_path < max_rf_path ; rf_path++){ ++ ele_D = PHY_QueryBBReg(priv, BBSwingReg[rf_path], 0xffe00000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("0x%x:0x%x ([31:21] = 0x%x)\n",BBSwingReg[rf_path], PHY_QueryBBReg(priv, BBSwingReg[rf_path], bMaskDWord),ele_D)); ++ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {//4 ++ if (ele_D == OFDMSwingTable_8812[i]) { ++ OFDM_index[rf_path] = (unsigned char)i; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDM_index[%d]=%d\n",rf_path, OFDM_index[rf_path])); ++ break; ++ } ++ } ++ } ++#if 0 ++ //Query OFDM path A default setting Bit[31:21] ++ ele_D = PHY_QueryBBReg(priv, 0xc1c, 0xffe00000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("0xc1c:0x%x ([31:21] = 0x%x)\n", PHY_QueryBBReg(priv, 0xc1c, bMaskDWord),ele_D)); ++ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {//4 ++ if (ele_D == OFDMSwingTable_8812[i]) { ++ OFDM_index[0] = (unsigned char)i; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDM_index[0]=%d\n", OFDM_index[0])); ++ break; ++ } ++ } ++ //Query OFDM path B default setting ++ if (rf == 2) { ++ ele_D = PHY_QueryBBReg(priv, 0xe1c, 0xffe00000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("0xe1c:0x%x ([32:21] = 0x%x)\n", PHY_QueryBBReg(priv, 0xe1c, bMaskDWord),ele_D)); ++ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) { ++ if (ele_D == OFDMSwingTable_8812[i]) { ++ OFDM_index[1] = (unsigned char)i; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("OFDM_index[1]=%d\n", OFDM_index[1])); ++ break; ++ } ++ } ++ } ++#endif ++ /* Initialize */ ++ if (!priv->pshare->ThermalValue) { ++ priv->pshare->ThermalValue = priv->pmib->dot11RFEntry.ther; ++ priv->pshare->ThermalValue_LCK = ThermalValue; ++ } ++ ++ /* calculate average thermal meter */ ++ { ++ priv->pshare->ThermalValue_AVG_8812[priv->pshare->ThermalValue_AVG_index_8812] = ThermalValue; ++ priv->pshare->ThermalValue_AVG_index_8812++; ++ if (priv->pshare->ThermalValue_AVG_index_8812 == AVG_THERMAL_NUM_8812) ++ priv->pshare->ThermalValue_AVG_index_8812 = 0; ++ ++ for (i = 0; i < AVG_THERMAL_NUM_8812; i++) { ++ if (priv->pshare->ThermalValue_AVG_8812[i]) { ++ ThermalValue_AVG += priv->pshare->ThermalValue_AVG_8812[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if (ThermalValue_AVG_count) { ++ ThermalValue = (unsigned char)(ThermalValue_AVG / ThermalValue_AVG_count); ++ //printk("AVG Thermal Meter = 0x%x \n", ThermalValue); ++ } ++ } ++ ++ ++ //4 If necessary, do power tracking ++ ++ if(!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/ ++ return; ++ ++ if (ThermalValue != priv->pshare->ThermalValue) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** START POWER TRACKING ********\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", ThermalValue, priv->pshare->ThermalValue, priv->pmib->dot11RFEntry.ther)); ++ delta = RTL_ABS(ThermalValue, priv->pmib->dot11RFEntry.ther); ++ delta_LCK = RTL_ABS(ThermalValue, priv->pshare->ThermalValue_LCK); ++ is_decrease = ((ThermalValue < priv->pmib->dot11RFEntry.ther) ? 1 : 0); ++ //if (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) ++ { ++#ifdef _TRACKING_TABLE_FILE ++ if (priv->pshare->rf_ft_var.pwr_track_file) { ++ for (rf_path = 0; rf_path < max_rf_path; rf_path++) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Diff: (%s)%d ==> get index from table : %d)\n", (is_decrease?"-":"+"), delta, get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0))); ++ if (is_decrease) { ++ OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] + get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0); ++ OFDM_index[rf_path] = ((OFDM_index[rf_path] > (OFDM_TABLE_SIZE_8812 - 1)) ? (OFDM_TABLE_SIZE_8812 - 1) : OFDM_index[rf_path]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0))); ++#if 0// RTL8881A_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8881A){ ++ if(priv->pshare->rf_ft_var.pwrtrk_TxAGC_enable){ ++ if(priv->pshare->AddTxAGC){//TxAGC has been added ++ AddTxPower88XX_AC(priv,0); ++ priv->pshare->AddTxAGC = 0; ++ priv->pshare->AddTxAGC_index = 0; ++ } ++ } ++ } ++#endif ++ } else { ++ ++ OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] - get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0); ++#if 0// RTL8881A_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8881A){ ++ if(priv->pshare->rf_ft_var.pwrtrk_TxAGC_enable){ ++ if(OFDM_index[i] < OFDM_min_index){ ++ priv->pshare->AddTxAGC_index = (OFDM_min_index - OFDM_index[i])/2; // Calculate Remnant TxAGC Value, 2 index for 1 TxAGC ++ AddTxPower88XX_AC(priv,priv->pshare->AddTxAGC_index); ++ priv->pshare->AddTxAGC = 1; //AddTxAGC Flag = 1 ++ OFDM_index[i] = OFDM_min_index; ++ } ++ else{ ++ if(priv->pshare->AddTxAGC){// TxAGC been added ++ priv->pshare->AddTxAGC = 0; ++ priv->pshare->AddTxAGC_index = 0; ++ AddTxPower88XX_AC(priv,0); //minus the added TPI ++ } ++ } ++ } ++ } ++#else ++ OFDM_index[rf_path] = ((OFDM_index[rf_path] < OFDM_min_index) ? OFDM_min_index : OFDM_index[rf_path]); ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,(">>> increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0))); ++ } ++ } ++ } ++#endif ++ //4 Set new BB swing index ++ for (rf_path = 0; rf_path < max_rf_path; rf_path++) { ++ PHY_SetBBReg(priv, BBSwingReg[rf_path], 0xffe00000, OFDMSwingTable_8812[(unsigned int)OFDM_index[rf_path]]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Readback 0x%x[31:21] = 0x%x, OFDM_index:%d\n",BBSwingReg[rf_path], PHY_QueryBBReg(priv, BBSwingReg[rf_path], 0xffe00000), OFDM_index[rf_path])); ++ } ++ ++ } ++ if (delta_LCK > 8) { ++ RTL_W8(0x522, 0xff); ++ Reg0x18 = PHY_QueryRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, 1); ++ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 1); ++ PHY_SetRFReg(priv, RF_PATH_A, 0x18, BIT(15), 1); ++ delay_ms(200); // frequency deviation ++ PHY_SetRFReg(priv, RF_PATH_A, 0xB4, BIT(14), 0); ++ PHY_SetRFReg(priv, RF_PATH_A, 0x18, bMask20Bits, Reg0x18); ++ #ifdef CONFIG_RTL_8812_SUPPORT ++ if (GET_CHIP_VER(priv)== VERSION_8812E) ++ UpdateBBRFVal8812(priv, priv->pmib->dot11RFEntry.dot11channel); ++ #endif ++ RTL_W8(0x522, 0x0); ++ priv->pshare->ThermalValue_LCK = ThermalValue; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("\n******** END:%s() ********\n", __FUNCTION__)); ++ ++ //update thermal meter value ++ priv->pshare->ThermalValue = ThermalValue; ++ for (rf_path = 0; rf_path < max_rf_path; rf_path++) ++ priv->pshare->OFDM_index[rf_path] = OFDM_index[rf_path]; ++ } ++} ++ ++#endif ++ ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++#if (RTL8814A_SUPPORT == 1) //use this function to do power tracking after 8814 by YuChen ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) { ++ ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries2(pDM_Odm); ++ return; ++ } ++#elif ODM_IC_11AC_SERIES_SUPPORT ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries(pDM_Odm); ++ return; ++ } ++#endif ++ ++#if (RTL8192E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType==ODM_RTL8192E) { ++ ODM_TXPowerTrackingCallback_ThermalMeter_92E(pDM_Odm); ++ return; ++ } ++#endif ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++#endif ++ ++ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; ++ u1Byte ThermalValue_AVG_count = 0; ++ u4Byte ThermalValue_AVG = 0; ++// s4Byte ele_A=0, ele_D, TempCCk, X, value32; ++// s4Byte Y, ele_C=0; ++// s1Byte OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index; ++// s1Byte deltaPowerIndex = 0; ++ u4Byte i = 0;//, j = 0; ++ BOOLEAN is2T = FALSE; ++// BOOLEAN bInteralPA = FALSE; ++ ++ u1Byte OFDM_max_index = 34, rf = (is2T) ? 2 : 1; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur ++ u1Byte Indexforchannel = 0;/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/ ++ enum _POWER_DEC_INC { POWER_DEC, POWER_INC }; ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++ ++ TXPWRTRACK_CFG c; ++ ++ ++ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. ++ s1Byte deltaSwingTableIdx[2][index_mapping_NUM_88E] = { ++ // {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} ++ {0,0,2,3,4,4,5,6,7,7,8,9,10,10,11}, {0,0,1,2,3,4,4,4,4,5,7,8,9,9,10} ++ }; ++ u1Byte thermalThreshold[2][index_mapping_NUM_88E]={ ++ // {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} ++ {0,2,4,6,8,10,12,14,16,18,20,22,24,26,27}, {0,2,4,6,8,10,12,14,16,18,20,22,25,25,25} ++ }; ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++#endif ++ ++ //4 2. Initilization ( 7 steps in total ) ++ ++ ConfigureTxpowerTrack(pDM_Odm, &c); ++ ++ pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug ++ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE; ++ ++#if (MP_DRIVER == 1) ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl; // We should keep updating the control variable according to HalData. ++ // RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. ++ pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && defined(MP_TEST) ++ if ((OPMODE & WIFI_MP_STATE) || pDM_Odm->priv->pshare->rf_ft_var.mp_specific) { ++ if(pDM_Odm->priv->pshare->mp_txpwr_tracking == FALSE) ++ return; ++ } ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>odm_TXPowerTrackingCallback_ThermalMeter_8188E, pDM_Odm->BbSwingIdxCckBase: %d, pDM_Odm->BbSwingIdxOfdmBase: %d \n", pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->BbSwingIdxOfdmBase)); ++/* ++ if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, c.ThermalRegAddr, BIT17 | BIT16, 0x3); ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; ++ return; ++ } ++*/ ++ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if( ! ThermalValue || ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) ++#else ++ if( ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) ++#endif ++ return; ++ ++ //4 3. Initialize ThermalValues of RFCalibrateInfo ++ ++ if( ! pDM_Odm->RFCalibrateInfo.ThermalValue) ++ { ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; ++ } ++ ++ if(pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); ++ } ++ ++ //4 4. Calculate average thermal meter ++ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == c.AverageThermalNum) ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; ++ ++ for(i = 0; i < c.AverageThermalNum; i++) ++ { ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) ++ { ++ ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if(ThermalValue_AVG_count) ++ { ++ // Give the new thermo value a weighting ++ ThermalValue_AVG += (ThermalValue*4); ++ ++ ThermalValue = (u1Byte)(ThermalValue_AVG / (ThermalValue_AVG_count+4)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("AVG Thermal Meter = 0x%x \n", ThermalValue)); ++ } ++ ++ //4 5. Calculate delta, delta_LCK, delta_IQK. ++ ++ delta = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue):(pDM_Odm->RFCalibrateInfo.ThermalValue - ThermalValue); ++ delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); ++ delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); ++ ++ //4 6. If necessary, do LCK. ++ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { ++ /*if((delta_LCK > pHalData->Delta_LCK) && (pHalData->Delta_LCK != 0))*/ ++ if (delta_LCK >= c.Threshold_IQK) { ++ /*Delta temperature is equal to or larger than 20 centigrade.*/ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ } ++ } ++ ++ //3 7. If necessary, move the index of swing table to adjust Tx power. ++ ++ if (delta > 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) ++ { ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); ++#else ++ delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); ++#endif ++ ++ ++ //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(ThermalValue > pHalData->EEPROMThermalMeter) { ++#else ++ if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { ++#endif ++ CALCULATE_SWINGTALBE_OFFSET(offset, POWER_INC, index_mapping_NUM_88E, delta); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex; ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = deltaSwingTableIdx[POWER_INC][offset]; ++ ++ } else { ++ ++ CALCULATE_SWINGTALBE_OFFSET(offset, POWER_DEC, index_mapping_NUM_88E, delta); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex; ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = (-1)*deltaSwingTableIdx[POWER_DEC][offset]; ++ } ++ ++ if (pDM_Odm->RFCalibrateInfo.DeltaPowerIndex == pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast) ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; ++ else ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast; ++ ++ for(i = 0; i < rf; i++) ++ pDM_Odm->RFCalibrateInfo.OFDM_index[i] = pRFCalibrateInfo->BbSwingIdxOfdmBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset; ++ pDM_Odm->RFCalibrateInfo.CCK_index = pRFCalibrateInfo->BbSwingIdxCckBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset; ++ ++ pRFCalibrateInfo->BbSwingIdxCck = pDM_Odm->RFCalibrateInfo.CCK_index; ++ pRFCalibrateInfo->BbSwingIdxOfdm[RF_PATH_A] = pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A]; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxCck, pRFCalibrateInfo->BbSwingIdxCckBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'OFDM' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxOfdm[RF_PATH_A], pRFCalibrateInfo->BbSwingIdxOfdmBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset)); ++ ++ //4 7.1 Handle boundary conditions of index. ++ ++ ++ for(i = 0; i < rf; i++) ++ { ++ if(pDM_Odm->RFCalibrateInfo.OFDM_index[i] > OFDM_max_index) ++ { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[i] = OFDM_max_index; ++ } ++ else if (pDM_Odm->RFCalibrateInfo.OFDM_index[i] < 0) ++ { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[i] = 0; ++ } ++ } ++ ++ if(pDM_Odm->RFCalibrateInfo.CCK_index > c.SwingTableSize_CCK-1) ++ pDM_Odm->RFCalibrateInfo.CCK_index = c.SwingTableSize_CCK-1; ++ else if (pDM_Odm->RFCalibrateInfo.CCK_index < 0) ++ pDM_Odm->RFCalibrateInfo.CCK_index = 0; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The thermal meter is unchanged or TxPowerTracking OFF: ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d)\n", ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", pDM_Odm->RFCalibrateInfo.CCK_index, pRFCalibrateInfo->BbSwingIdxCckBase)); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index: %d\n", pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A], pRFCalibrateInfo->BbSwingIdxOfdmBase)); ++ ++ if (pDM_Odm->RFCalibrateInfo.PowerIndexOffset != 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) ++ { ++ //4 7.2 Configure the Swing Table to adjust Tx Power. ++ ++ pDM_Odm->RFCalibrateInfo.bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. ++ // ++ // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital ++ // to increase TX power. Otherwise, EVM will be bad. ++ // ++ // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. ++ if (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue) ++ { ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ // ("Temperature Increasing: delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ // pDM_Odm->RFCalibrateInfo.PowerIndexOffset, delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ } ++ else if (ThermalValue < pDM_Odm->RFCalibrateInfo.ThermalValue)// Low temperature ++ { ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ // ("Temperature Decreasing: delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ // pDM_Odm->RFCalibrateInfo.PowerIndexOffset, delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if (ThermalValue > pHalData->EEPROMThermalMeter) ++#else ++ if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) ++#endif ++ { ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) hugher than PG value(%d), increases the power by TxAGC\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, TXAGC, 0, 0); ++ } ++ else ++ { ++ // ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) lower than PG value(%d), increases the power by TxAGC\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, RF_PATH_A, Indexforchannel); ++ if(is2T) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, RF_PATH_B, Indexforchannel); ++ } ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->BbSwingIdxCck; ++ pRFCalibrateInfo->BbSwingIdxOfdmBase = pRFCalibrateInfo->BbSwingIdxOfdm[RF_PATH_A]; ++ pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; ++ ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ // if((delta_IQK > pHalData->Delta_IQK) && (pHalData->Delta_IQK != 0)) ++ if ((delta_IQK >= 8)) // Delta temperature is equal to or larger than 20 centigrade. ++ (*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8); ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n")); ++ ++ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; ++} ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ ++VOID ++phy_PathAStandBy( ++ IN PADAPTER pAdapter ++ ) ++{ ++ RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n")); ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x0); ++ PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x808000); ++} ++ ++//1 7. IQK ++//#define MAX_TOLERANCE 5 ++//#define IQK_DELAY_TIME 1 //ms ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_IQK_8192C( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN configPathB ++ ) ++{ ++ ++ u4Byte regEAC, regE94, regE9C, regEA4; ++ u1Byte result = 0x00; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n")); ++ ++ //path-A IQK setting ++ RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n")); ++ if(pAdapter->interfaceIndex == 0) ++ { ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c22); ++ } ++ ++ PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102); ++ ++ PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 : ++ IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502); ++ ++ //path-B IQK setting ++ if(configPathB) ++ { ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102); ++ PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202); ++ } ++ ++ //LO calibration setting ++ RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1); ++ ++ //One shot, path A LOK & IQK ++ RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME)); ++ PlatformStallExecution(IQK_DELAY_TIME*1000); ++ ++ // Check failed ++ regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C)); ++ regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4)); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++ ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ RTPRINT(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); ++ ++ return result; ++ ++ ++} ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathB_IQK_8192C( ++ IN PADAPTER pAdapter ++ ) ++{ ++ u4Byte regEAC, regEB4, regEBC, regEC4, regECC; ++ u1Byte result = 0x00; ++ RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n")); ++ ++ //One shot, path B LOK & IQK ++ RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000); ++ ++ // delay x ms ++ RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME)); ++ PlatformStallExecution(IQK_DELAY_TIME*1000); ++ ++ // Check failed ++ regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); ++ regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4)); ++ regEBC= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC)); ++ regEC4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4)); ++ regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord); ++ RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC)); ++ ++ if(!(regEAC & BIT31) && ++ (((regEB4 & 0x03FF0000)>>16) != 0x142) && ++ (((regEBC & 0x03FF0000)>>16) != 0x42)) ++ result |= 0x01; ++ else ++ return result; ++ ++ if(!(regEAC & BIT30) && ++ (((regEC4 & 0x03FF0000)>>16) != 0x132) && ++ (((regECC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ RTPRINT(FINIT, INIT_IQK, ("Path B Rx IQK fail!!\n")); ++ ++ ++ return result; ++ ++} ++ ++VOID ++phy_PathAFillIQKMatrix( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly ++ ) ++{ ++ u4Byte Oldval_0, X, TX0_A, reg; ++ s4Byte Y, TX0_C; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ RTPRINT(FINIT, INIT_IQK, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][0]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX0_A = (X * Oldval_0) >> 8; ++ RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X * Oldval_0>>7) & 0x1)); ++ ++ Y = result[final_candidate][1]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ //path B IQK result + 3 ++ if(pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType == BAND_ON_5G) ++ Y += 3; ++ ++ TX0_C = (Y * Oldval_0) >> 8; ++ RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y * Oldval_0>>7) & 0x1)); ++ ++ if(bTxOnly) ++ { ++ RTPRINT(FINIT, INIT_IQK, ("phy_PathAFillIQKMatrix only Tx OK\n")); ++ return; ++ } ++ ++ reg = result[final_candidate][2]; ++ PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][3] & 0x3F; ++ PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][3] >> 6) & 0xF; ++ PHY_SetBBReg(pAdapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg); ++ } ++} ++ ++VOID ++phy_PathBFillIQKMatrix( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly //do Tx only ++ ) ++{ ++ u4Byte Oldval_1, X, TX1_A, reg; ++ s4Byte Y, TX1_C; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ RTPRINT(FINIT, INIT_IQK, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][4]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX1_A = (X * Oldval_1) >> 8; ++ RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X * Oldval_1>>7) & 0x1)); ++ ++ Y = result[final_candidate][5]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ if(pHalData->CurrentBandType == BAND_ON_5G) ++ Y += 3; //temp modify for preformance ++ TX1_C = (Y * Oldval_1) >> 8; ++ RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y * Oldval_1>>7) & 0x1)); ++ ++ if(bTxOnly) ++ return; ++ ++ reg = result[final_candidate][6]; ++ PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][7] & 0x3F; ++ PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][7] >> 6) & 0xF; ++ PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg); ++ } ++} ++ ++ ++BOOLEAN ++phy_SimularityCompare_92C( ++ IN PADAPTER pAdapter, ++ IN s4Byte result[][8], ++ IN u1Byte c1, ++ IN u1Byte c2 ++ ) ++{ ++ u4Byte i, j, diff, SimularityBitMap, bound = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B ++ BOOLEAN bResult = TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID); ++ ++ if(is2T) ++ bound = 8; ++ else ++ bound = 4; ++ ++ SimularityBitMap = 0; ++ ++ for( i = 0; i < bound; i++ ) ++ { ++ diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); ++ if (diff > MAX_TOLERANCE) ++ { ++ if((i == 2 || i == 6) && !SimularityBitMap) ++ { ++ if(result[c1][i]+result[c1][i+1] == 0) ++ final_candidate[(i/4)] = c2; ++ else if (result[c2][i]+result[c2][i+1] == 0) ++ final_candidate[(i/4)] = c1; ++ else ++ SimularityBitMap = SimularityBitMap|(1< do IQK again ++*/ ++BOOLEAN ++phy_SimularityCompare( ++ IN PADAPTER pAdapter, ++ IN s4Byte result[][8], ++ IN u1Byte c1, ++ IN u1Byte c2 ++ ) ++{ ++ return phy_SimularityCompare_92C(pAdapter, result, c1, c2); ++ ++} ++ ++VOID ++phy_IQCalibrate_8192C( ++ IN PADAPTER pAdapter, ++ IN s4Byte result[][8], ++ IN u1Byte t, ++ IN BOOLEAN is2T ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u4Byte i; ++ u1Byte PathAOK, PathBOK; ++ u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ //since 92C & 92D have the different define in IQK_BB_REG ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE, /*rFPGA0_RFMOD*/ rCCK0_AFESetting ++ }; ++ ++ u4Byte IQK_BB_REG_92D[IQK_BB_REG_NUM_92D] = { //for normal ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rOFDM0_TRxPathEnable, ++ /*rFPGA0_RFMOD*/ rCCK0_AFESetting, rFPGA0_AnalogParameter4, ++ rOFDM0_XAAGCCore1, rOFDM0_XBAGCCore1 ++ }; ++#if MP_DRIVER ++ const u4Byte retryCount = 9; ++#else ++ const u4Byte retryCount = 2; ++#endif ++ //Neil Chen--2011--05--19-- ++ //3 Path Div ++ u1Byte rfPathSwitch=0x0; ++ ++ // Note: IQ calibration must be performed after loading ++ // PHY_REG.txt , and radio_a, radio_b.txt ++ ++ u4Byte bbvalue; ++ ++ if(t==0) ++ { ++ //bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord); ++ // RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C()==>0x%08x\n",bbvalue)); ++ ++ RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ ++ // Save ADDA parameters, turn Path A ADDA on ++ phy_SaveADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); ++ phy_SaveMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); ++ phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); ++ } ++ ++ phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); ++ ++ if(t==0) ++ { ++ pHalData->bRfPiEnable = (u1Byte)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8)); ++ } ++ ++ if(!pHalData->bRfPiEnable){ ++ // Switch BB to PI mode to do IQ Calibration. ++ phy_PIModeSwitch(pAdapter, TRUE); ++ } ++ ++ //MAC settings ++ phy_MACSettingCalibration(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); ++ ++ //PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT24, 0x00); ++ PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskDWord, (0x0f000000 | (PHY_QueryBBReg(pAdapter, rCCK0_AFESetting, bMaskDWord))) ); ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); ++ } ++ ++ if(is2T) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); ++ } ++ ++ { ++ //Page B init ++ PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000); ++ ++ if(is2T) ++ { ++ PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000); ++ } ++ } ++ // IQ calibration setting ++ RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n")); ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x808000); ++ PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ for(i = 0 ; i < retryCount ; i++){ ++ PathAOK = phy_PathA_IQK_8192C(pAdapter, is2T); ++ if(PathAOK == 0x03){ ++ RTPRINT(FINIT, INIT_IQK, ("Path A IQK Success!!\n")); ++ result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK ++ { ++ RTPRINT(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); ++ ++ result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ } ++ } ++ ++ if(0x00 == PathAOK){ ++ RTPRINT(FINIT, INIT_IQK, ("Path A IQK failed!!\n")); ++ } ++ ++ if(is2T){ ++ phy_PathAStandBy(pAdapter); ++ ++ // Turn Path B ADDA on ++ phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); ++ ++ for(i = 0 ; i < retryCount ; i++){ ++ PathBOK = phy_PathB_IQK_8192C(pAdapter); ++ if(PathBOK == 0x03){ ++ RTPRINT(FINIT, INIT_IQK, ("Path B IQK Success!!\n")); ++ result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK ++ { ++ RTPRINT(FINIT, INIT_IQK, ("Path B Only Tx IQK Success!!\n")); ++ result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ } ++ } ++ ++ if(0x00 == PathBOK){ ++ RTPRINT(FINIT, INIT_IQK, ("Path B IQK failed!!\n")); ++ } ++ } ++ ++ //Back to BB mode, load original value ++ RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n")); ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); ++ ++ if(t!=0) ++ { ++ if(!pHalData->bRfPiEnable){ ++ // Switch back BB to SI mode after finish IQ Calibration. ++ phy_PIModeSwitch(pAdapter, FALSE); ++ } ++ ++ // Reload ADDA power saving parameters ++ phy_ReloadADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ phy_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); ++ ++ // Reload BB parameters ++ phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); ++ ++ /*Restore RX initial gain*/ ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); ++ if (is2T) ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); ++ //load 0xe30 IQC default value ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ++ } ++ RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C() <==\n")); ++ ++} ++ ++ ++VOID ++phy_LCCalibrate92C( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN is2T ++ ) ++{ ++ u1Byte tmpReg; ++ u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; ++// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ //Check continuous TX and Packet TX ++ tmpReg = PlatformEFIORead1Byte(pAdapter, 0xd03); ++ ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg&0x8F); //disable all continuous TX ++ else // Deal with Packet TX case ++ PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0xFF); // block all queues ++ ++ if((tmpReg&0x70) != 0) ++ { ++ //1. Read original RF mode ++ //Path-A ++ RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits); ++ ++ //2. Set RF mode = standby mode ++ //Path-A ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); ++ ++ //Path-B ++ if(is2T) ++ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); ++ } ++ ++ //3. Read RF reg18 ++ LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); ++ ++ //4. Set LC calibration begin bit15 ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); ++ ++ delay_ms(100); ++ ++ ++ //Restore original situation ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ { ++ //Path-A ++ PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); ++ ++ //Path-B ++ if(is2T) ++ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); ++ } ++ else // Deal with Packet TX case ++ { ++ PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0x00); ++ } ++} ++ ++ ++VOID ++phy_LCCalibrate( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN is2T ++ ) ++{ ++ phy_LCCalibrate92C(pAdapter, is2T); ++} ++ ++ ++ ++//Analog Pre-distortion calibration ++#define APK_BB_REG_NUM 8 ++#define APK_CURVE_REG_NUM 4 ++#define PATH_NUM 2 ++ ++VOID ++phy_APCalibrate_8192C( ++ IN PADAPTER pAdapter, ++ IN s1Byte delta, ++ IN BOOLEAN is2T ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ u4Byte regD[PATH_NUM]; ++ u4Byte tmpReg, index, offset, i, apkbound; ++ u1Byte path, pathbound = PATH_NUM; ++ u4Byte BB_backup[APK_BB_REG_NUM]; ++ u4Byte BB_REG[APK_BB_REG_NUM] = { ++ rFPGA1_TxBlock, rOFDM0_TRxPathEnable, ++ rFPGA0_RFMOD, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, ++ rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; ++ u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x00204000 }; ++ u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x22204000 }; ++ ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, ++ {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} ++ }; ++ ++ u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings ++ {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} ++ }; ++ ++ u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, ++ {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} ++ }; ++ ++ u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} ++ }; ++#if 0 ++ u4Byte APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80}, ++ {0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80} ++ }; ++#endif ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u4Byte APK_offset[PATH_NUM] = { ++ rConfig_AntA, rConfig_AntB}; ++ ++ u4Byte APK_normal_offset[PATH_NUM] = { ++ rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; ++ ++ u4Byte APK_value[PATH_NUM] = { ++ 0x92fc0000, 0x12fc0000}; ++ ++ u4Byte APK_normal_value[PATH_NUM] = { ++ 0x92680000, 0x12680000}; ++ ++ s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} ++ }; ++ ++ u4Byte APK_normal_setting_value_1[13] = { ++ 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, ++ 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, ++ 0x12680000, 0x00880000, 0x00880000 ++ }; ++ ++ u4Byte APK_normal_setting_value_2[16] = { ++ 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, ++ 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, ++ 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, ++ 0x00050006 ++ }; ++ ++ u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a ++// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; ++ ++ s4Byte BB_offset, delta_V, delta_offset; ++ ++#if MP_DRIVER == 1 ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ ++ pMptCtx->APK_bound[0] = 45; ++ pMptCtx->APK_bound[1] = 52; ++#endif ++ ++ RTPRINT(FINIT, INIT_IQK, ("==>phy_APCalibrate_8192C() delta %d\n", delta)); ++ RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ if(!is2T) ++ pathbound = 1; ++ ++ //2 FOR NORMAL CHIP SETTINGS ++ ++// Temporarily do not allow normal driver to do the following settings because these offset ++// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal ++// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the ++// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. ++#if MP_DRIVER != 1 ++ return; ++#endif ++ //settings adjust for normal chip ++ for(index = 0; index < PATH_NUM; index ++) ++ { ++ APK_offset[index] = APK_normal_offset[index]; ++ APK_value[index] = APK_normal_value[index]; ++ AFE_on_off[index] = 0x6fdb25a4; ++ } ++ ++ for(index = 0; index < APK_BB_REG_NUM; index ++) ++ { ++ for(path = 0; path < pathbound; path++) ++ { ++ APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; ++ APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; ++ } ++ BB_AP_MODE[index] = BB_normal_AP_MODE[index]; ++ } ++ ++ apkbound = 6; ++ ++ //save BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0) //skip ++ continue; ++ BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord); ++ } ++ ++ //save MAC default value ++ phy_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ phy_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ++ ++ if(path == RF_PATH_A) ++ { ++ //path A APK ++ //load APK setting ++ //path-A ++ offset = rPdp_AntA; ++ for(index = 0; index < 11; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ for(; index < 13; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ //path A ++ offset = rPdp_AntA; ++ for(index = 0; index < 16; index++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); ++ } ++ else if(path == RF_PATH_B) ++ { ++ //path B APK ++ //load APK setting ++ //path-B ++ offset = rPdp_AntB; ++ for(index = 0; index < 10; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); ++ ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ index = 11; ++ for(; index < 13; index ++) //offset 0xb68, 0xb6c ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ //path B ++ offset = 0xb60; ++ for(index = 0; index < 16; index++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); ++ } ++ ++ //save RF default value ++ regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask); ++ ++ //Path A AFE all on, path B AFE All off or vise versa ++ for(index = 0; index < IQK_ADDA_REG_NUM ; index++) ++ PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, rRx_Wait_CCA, bMaskDWord))); ++ ++ //BB to AP mode ++ if(path == 0) ++ { ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ else if (index < 5) ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); ++ else if (BB_REG[index] == 0x870) ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); ++ else ++ PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0); ++ } ++ ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ } ++ else //path B ++ { ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ++ } ++ ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord))); ++ ++ //MAC settings ++ phy_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); ++ ++ if(path == RF_PATH_A) //Path B to standby mode ++ { ++ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x10000); ++ } ++ else //Path A to standby mode ++ { ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x10000); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20103); ++ } ++ ++ delta_offset = ((delta+14)/2); ++ if(delta_offset < 0) ++ delta_offset = 0; ++ else if (delta_offset > 12) ++ delta_offset = 12; ++ ++ //AP calibration ++ for(index = 0; index < APK_BB_REG_NUM; index++) ++ { ++ if(index != 1) //only DO PA11+PAD01001, AP RF setting ++ continue; ++ ++ tmpReg = APK_RF_init_value[path][index]; ++#if 1 ++ if(!pHalData->bAPKThermalMeterIgnore) ++ { ++ BB_offset = (tmpReg & 0xF0000) >> 16; ++ ++ if(!(tmpReg & BIT15)) //sign bit 0 ++ { ++ BB_offset = -BB_offset; ++ } ++ ++ delta_V = APK_delta_mapping[index][delta_offset]; ++ ++ BB_offset += delta_V; ++ ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); ++ ++ if(BB_offset < 0) ++ { ++ tmpReg = tmpReg & (~BIT15); ++ BB_offset = -BB_offset; ++ } ++ else ++ { ++ tmpReg = tmpReg | BIT15; ++ } ++ tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); ++ } ++#endif ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) ++ PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x894ae); ++ else ++#endif ++ PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x8992e); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask))); ++ PHY_SetRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask, APK_RF_value_0[path][index]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask))); ++ PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, tmpReg); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask))); ++ ++ // PA11+PAD01111, one shot ++ i = 0; ++ do ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0x800000); ++ { ++ PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); ++ delay_ms(3); ++ PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); ++ ++ delay_ms(20); ++ } ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, 0xffffff00, 0); ++ ++ if(path == RF_PATH_A) ++ tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0x03E00000); ++ else ++ tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0xF8000000); ++ RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xbd8[25:21] %x\n", tmpReg)); ++ ++ ++ i++; ++ } ++ while(tmpReg > apkbound && i < 4); ++ ++ APK_result[path][index] = tmpReg; ++ } ++ } ++ ++ //reload MAC default value ++ phy_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); ++ ++ //reload BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]); ++ } ++ ++ //reload AFE default value ++ phy_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++ ++ //reload RF path default value ++ for(path = 0; path < pathbound; path++) ++ { ++ PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, regD[path]); ++ if(path == RF_PATH_B) ++ { ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20101); ++ } ++ ++ //note no index == 0 ++ if (APK_result[path][1] > 6) ++ APK_result[path][1] = 6; ++ RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); ++ } ++ ++ RTPRINT(FINIT, INIT_IQK, ("\n")); ++ ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G1_G4, bRFRegOffsetMask, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); ++ if(path == RF_PATH_A) ++ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); ++ else ++ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); ++ ++ PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G9_G11, bRFRegOffsetMask, ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); ++ } ++ ++ pHalData->bAPKdone = TRUE; ++ ++ RTPRINT(FINIT, INIT_IQK, ("<==phy_APCalibrate_8192C()\n")); ++} ++ ++ ++VOID ++PHY_IQCalibrate_8192C( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bReCovery ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ s4Byte result[4][8]; //last is final result ++ u1Byte i, final_candidate, Indexforchannel; ++ BOOLEAN bPathAOK, bPathBOK; ++ s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; ++ BOOLEAN is12simular, is13simular, is23simular; ++ BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, ++ rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, ++ rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, ++ rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, ++ rOFDM0_RxIQExtAnta}; ++ ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++ ++#if MP_DRIVER == 1 ++ bStartContTx = pAdapter->MptCtx.bStartContTx; ++ bSingleTone = pAdapter->MptCtx.bSingleTone; ++ bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; ++#endif ++ ++ //ignore IQK when continuous Tx ++ if(bStartContTx || bSingleTone || bCarrierSuppression) ++ return; ++ ++#ifdef DISABLE_BB_RF ++ return; ++#endif ++ if(pAdapter->bSlaveOfDMSP) ++ return; ++ ++ if (bReCovery) ++ { ++ phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); ++ return; ++ ++ } ++ ++ RTPRINT(FINIT, INIT_IQK, ("IQK:Start!!!\n")); ++ ++ for(i = 0; i < 8; i++) ++ { ++ result[0][i] = 0; ++ result[1][i] = 0; ++ result[2][i] = 0; ++ result[3][i] = 0; ++ } ++ final_candidate = 0xff; ++ bPathAOK = FALSE; ++ bPathBOK = FALSE; ++ is12simular = FALSE; ++ is23simular = FALSE; ++ is13simular = FALSE; ++ ++ AcquireCCKAndRWPageAControl(pAdapter); ++ /*RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate\n"));*/ ++ for (i=0; i<3; i++) ++ { ++ /*For 88C 1T1R*/ ++ phy_IQCalibrate_8192C(pAdapter, result, i, FALSE); ++ ++ if(i == 1) ++ { ++ is12simular = phy_SimularityCompare(pAdapter, result, 0, 1); ++ if(is12simular) ++ { ++ final_candidate = 0; ++ break; ++ } ++ } ++ ++ if(i == 2) ++ { ++ is13simular = phy_SimularityCompare(pAdapter, result, 0, 2); ++ if(is13simular) ++ { ++ final_candidate = 0; ++ break; ++ } ++ ++ is23simular = phy_SimularityCompare(pAdapter, result, 1, 2); ++ if(is23simular) ++ final_candidate = 1; ++ else ++ { ++ for(i = 0; i < 8; i++) ++ RegTmp += result[3][i]; ++ ++ if(RegTmp != 0) ++ final_candidate = 3; ++ else ++ final_candidate = 0xFF; ++ } ++ } ++ } ++// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); ++ ReleaseCCKAndRWPageAControl(pAdapter); ++ ++ for (i=0; i<4; i++) ++ { ++ RegE94 = result[i][0]; ++ RegE9C = result[i][1]; ++ RegEA4 = result[i][2]; ++ RegEAC = result[i][3]; ++ RegEB4 = result[i][4]; ++ RegEBC = result[i][5]; ++ RegEC4 = result[i][6]; ++ RegECC = result[i][7]; ++ RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ } ++ ++ if(final_candidate != 0xff) ++ { ++ pHalData->RegE94 = RegE94 = result[final_candidate][0]; ++ pHalData->RegE9C = RegE9C = result[final_candidate][1]; ++ RegEA4 = result[final_candidate][2]; ++ RegEAC = result[final_candidate][3]; ++ pHalData->RegEB4 = RegEB4 = result[final_candidate][4]; ++ pHalData->RegEBC = RegEBC = result[final_candidate][5]; ++ RegEC4 = result[final_candidate][6]; ++ RegECC = result[final_candidate][7]; ++ RTPRINT(FINIT, INIT_IQK, ("IQK: final_candidate is %x\n",final_candidate)); ++ RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ bPathAOK = bPathBOK = TRUE; ++ } ++ else ++ { ++ RegE94 = RegEB4 = pHalData->RegE94 = pHalData->RegEB4 = 0x100; //X default value ++ RegE9C = RegEBC = pHalData->RegE9C = pHalData->RegEBC = 0x0; //Y default value ++ } ++ ++ if((RegE94 != 0)/*&&(RegEA4 != 0)*/) ++ { ++ if(pHalData->CurrentBandType == BAND_ON_5G) ++ phy_PathAFillIQKMatrix_5G_Normal(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++ else ++ phy_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++ ++ } ++ ++ if (IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) ++ { ++ if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) ++ { ++ if(pHalData->CurrentBandType == BAND_ON_5G) ++ phy_PathBFillIQKMatrix_5G_Normal(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); ++ else ++ phy_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); ++ } ++ } ++ ++ phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); ++ ++} ++ ++ ++VOID ++PHY_LCCalibrate_8192C( ++ IN PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo; ++ PMGNT_INFO pMgntInfoBuddyAdapter; ++ u4Byte timeout = 2000, timecount = 0; ++ PADAPTER BuddyAdapter = pAdapter->BuddyAdapter; ++ ++#if MP_DRIVER == 1 ++ bStartContTx = pAdapter->MptCtx.bStartContTx; ++ bSingleTone = pAdapter->MptCtx.bSingleTone; ++ bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; ++#endif ++ ++#ifdef DISABLE_BB_RF ++ return; ++#endif ++ ++ //ignore LCK when continuous Tx ++ if(bStartContTx || bSingleTone || bCarrierSuppression) ++ return; ++ ++ if(BuddyAdapter != NULL && ++ ((pAdapter->interfaceIndex == 0 && pHalData->CurrentBandType == BAND_ON_2_4G) || ++ (pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType == BAND_ON_5G))) ++ { ++ pMgntInfoBuddyAdapter=&BuddyAdapter->MgntInfo; ++ while(pMgntInfoBuddyAdapter->bScanInProgress && timecount < timeout) ++ { ++ delay_ms(50); ++ timecount += 50; ++ } ++ } ++ ++ while(pMgntInfo->bScanInProgress && timecount < timeout) ++ { ++ delay_ms(50); ++ timecount += 50; ++ } ++ ++ pHalData->bLCKInProgress = TRUE; ++ ++ RTPRINT(FINIT, INIT_IQK, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pAdapter->interfaceIndex, pHalData->CurrentBandType, timecount)); ++ ++ //if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) ++ if(IS_2T2R(pHalData->VersionID)) ++ { ++ phy_LCCalibrate(pAdapter, TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ phy_LCCalibrate(pAdapter, FALSE); ++ } ++ ++ pHalData->bLCKInProgress = FALSE; ++ ++ RTPRINT(FINIT, INIT_IQK, ("LCK:Finish!!!interface %d\n", pAdapter->interfaceIndex)); ++ ++ ++} ++ ++VOID ++PHY_APCalibrate_8192C( ++ IN PADAPTER pAdapter, ++ IN s1Byte delta ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ //default disable APK, because Tx NG issue, suggest by Jenyu, 2011.11.25 ++ return; ++ ++#ifdef DISABLE_BB_RF ++ return; ++#endif ++ ++#if FOR_BRAZIL_PRETEST != 1 ++ if(pHalData->bAPKdone) ++#endif ++ return; ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ phy_APCalibrate_8192C(pAdapter, delta, TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ phy_APCalibrate_8192C(pAdapter, delta, FALSE); ++ } ++} ++ ++ ++#endif ++ ++ ++//3============================================================ ++//3 IQ Calibration ++//3============================================================ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PVOID pDM_VOID ++) ++{ ++ return; ++} ++#if 1//!(DM_ODM_SUPPORT_TYPE & ODM_AP) ++u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) ++{ ++ u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = ++ {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; ++ u1Byte place = chnl; ++ ++ ++ if(chnl > 14) ++ { ++ for(place = 14; placeAdapter; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (*pDM_Odm->pIsFcsModeEnable) ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if (!IS_HARDWARE_TYPE_JAGUAR(Adapter)) ++ return; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ else if (IS_HARDWARE_TYPE_8812AU(Adapter)) ++ return; ++#endif ++#endif ++ ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->bLinked) { ++ if ((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) { ++ pDM_Odm->preChannel = *pDM_Odm->pChannel; ++ pDM_Odm->LinkedInterval = 0; ++ } ++ ++ if (pDM_Odm->LinkedInterval < 3) ++ pDM_Odm->LinkedInterval++; ++ ++ if (pDM_Odm->LinkedInterval == 2) { ++ /*Mark out IQK flow to prevent tx stuck. by Maddest 20130306*/ ++ /*Open it verified by James 20130715*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PHY_IQCalibrate_8821A(pDM_Odm, FALSE); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHY_IQCalibrate(Adapter, FALSE); ++#else ++ PHY_IQCalibrate_8821A(Adapter, FALSE); ++#endif ++ } ++ } else ++ pDM_Odm->LinkedInterval = 0; ++#endif ++} ++ ++void phydm_rf_init(IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ odm_TXPowerTrackingInit(pDM_Odm); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_ClearTxPowerTrackingState(pDM_Odm); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ PHY_IQCalibrate_8814A_Init(pDM_Odm); ++#endif ++#endif ++ ++} ++ ++void phydm_rf_watchdog(IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_TXPowerTrackingCheck(pDM_Odm); ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ odm_IQCalibrate(pDM_Odm); ++#endif ++} +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ap.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ap.h +new file mode 100644 +index 0000000..4cacdb5 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ap.h +@@ -0,0 +1,162 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ #ifndef __HAL_PHY_RF_H__ ++ #define __HAL_PHY_RF_H__ ++ ++#include "phydm_powertracking_ap.h" ++#if (RTL8814A_SUPPORT == 1) ++#include "rtl8814a/phydm_iqk_8814a.h" ++#endif ++ ++#if (RTL8822B_SUPPORT == 1) ++#include "rtl8822b/phydm_iqk_8822b.h" ++#endif ++ ++ ++typedef enum _PWRTRACK_CONTROL_METHOD { ++ BBSWING, ++ TXAGC, ++ MIX_MODE, ++ TSSI_MODE ++} PWRTRACK_METHOD; ++ ++typedef VOID (*FuncSetPwr)(PVOID, PWRTRACK_METHOD, u1Byte, u1Byte); ++typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte); ++typedef VOID (*FuncLCK)(PVOID); ++ //refine by YuChen for 8814A ++typedef VOID (*FuncSwing)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++typedef VOID (*FuncSwing8814only)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++ ++typedef struct _TXPWRTRACK_CFG { ++ u1Byte SwingTableSize_CCK; ++ u1Byte SwingTableSize_OFDM; ++ u1Byte Threshold_IQK; ++ u1Byte Threshold_DPK; ++ u1Byte AverageThermalNum; ++ u1Byte RfPathCount; ++ u4Byte ThermalRegAddr; ++ FuncSetPwr ODM_TxPwrTrackSetPwr; ++ FuncIQK DoIQK; ++ FuncLCK PHY_LCCalibrate; ++ FuncSwing GetDeltaSwingTable; ++ FuncSwing8814only GetDeltaSwingTable8814only; ++} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG; ++ ++VOID ++ConfigureTxpowerTrack( ++ IN PVOID pDM_VOID, ++ OUT PTXPWRTRACK_CFG pConfig ++ ); ++ ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++ ++#if (RTL8192E_SUPPORT==1) ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_92E( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++#endif ++ ++#if (RTL8814A_SUPPORT == 1) ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries2( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++ ++#elif ODM_IC_11AC_SERIES_SUPPORT ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++#endif ++ ++#define IS_CCK_RATE(_rate) (ODM_MGN_1M == _rate || _rate == ODM_MGN_2M || _rate == ODM_MGN_5_5M || _rate == ODM_MGN_11M ) ++ ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#define MAX_TOLERANCE 5 ++#define IQK_DELAY_TIME 1 //ms ++ ++ // ++// BB/MAC/RF other monitor API ++// ++ ++void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, ++ IN BOOLEAN bEnableMonitorMode ); ++ ++// ++// IQ calibrate ++// ++void ++PHY_IQCalibrate_8192C( IN PADAPTER pAdapter, ++ IN BOOLEAN bReCovery); ++ ++// ++// LC calibrate ++// ++void ++PHY_LCCalibrate_8192C( IN PADAPTER pAdapter); ++ ++// ++// AP calibrate ++// ++void ++PHY_APCalibrate_8192C( IN PADAPTER pAdapter, ++ IN s1Byte delta); ++#endif ++ ++#define ODM_TARGET_CHNL_NUM_2G_5G 59 ++ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PVOID pDM_VOID ++); ++u1Byte ++ODM_GetRightChnlPlaceforIQK( ++ IN u1Byte chnl ++); ++ ++void phydm_rf_init(IN PVOID pDM_VOID); ++void phydm_rf_watchdog(IN PVOID pDM_VOID); ++ ++#endif // #ifndef __HAL_PHY_RF_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ce.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ce.c +new file mode 100644 +index 0000000..8afa897 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ce.c +@@ -0,0 +1,711 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++ ++#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ ++ do {\ ++ for(_offset = 0; _offset < _size; _offset++)\ ++ {\ ++ if(_deltaThermal < thermalThreshold[_direction][_offset])\ ++ {\ ++ if(_offset != 0)\ ++ _offset--;\ ++ break;\ ++ }\ ++ } \ ++ if(_offset >= _size)\ ++ _offset = _size-1;\ ++ } while(0) ++ ++void ConfigureTxpowerTrack( ++ IN PVOID pDM_VOID, ++ OUT PTXPWRTRACK_CFG pConfig ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++#if RTL8192E_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8192E) ++ ConfigureTxpowerTrack_8192E(pConfig); ++#endif ++#if RTL8821A_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8821) ++ ConfigureTxpowerTrack_8821A(pConfig); ++#endif ++#if RTL8812A_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8812) ++ ConfigureTxpowerTrack_8812A(pConfig); ++#endif ++#if RTL8188E_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ ConfigureTxpowerTrack_8188E(pConfig); ++#endif ++ ++#if RTL8723B_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8723B) ++ ConfigureTxpowerTrack_8723B(pConfig); ++#endif ++ ++#if RTL8814A_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ ConfigureTxpowerTrack_8814A(pConfig); ++#endif ++ ++#if RTL8703B_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8703B) ++ ConfigureTxpowerTrack_8703B(pConfig); ++#endif ++ ++#if RTL8188F_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ ConfigureTxpowerTrack_8188F(pConfig); ++#endif ++} ++ ++//====================================================================== ++// <20121113, Kordan> This function should be called when TxAGC changed. ++// Otherwise the previous compensation is gone, because we record the ++// delta of temperature between two TxPowerTracking watch dogs. ++// ++// NOTE: If Tx BB swing or Tx scaling is varified during run-time, still ++// need to call this function. ++//====================================================================== ++VOID ++ODM_ClearTxPowerTrackingState( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter); ++ u1Byte p = 0; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; ++ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->DefaultCckIndex; ++ pDM_Odm->RFCalibrateInfo.CCK_index = 0; ++ ++ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) ++ { ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = 0; /* Initial Mix mode power tracking*/ ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[p] = 0; ++ pRFCalibrateInfo->KfreeOffset[p] = 0; ++ } ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = FALSE; /*Initial at Modify Tx Scaling Mode*/ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathB = FALSE; /*Initial at Modify Tx Scaling Mode*/ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathC = FALSE; /*Initial at Modify Tx Scaling Mode*/ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathD = FALSE; /*Initial at Modify Tx Scaling Mode*/ ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = 0; ++ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; ++ ++ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //modify by Mingzhi.Guo ++ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //modify by Mingzhi.Guo ++} ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0; ++ s1Byte diff_DPK[4] = {0}; ++ u1Byte ThermalValue_AVG_count = 0; ++ u4Byte ThermalValue_AVG = 0; ++ ++ u1Byte OFDM_min_index = 0; // OFDM BB Swing should be less than +3.0dB, which is required by Arthur ++ u1Byte Indexforchannel = 0; // GetRightChnlPlaceforIQK(pHalData->CurrentChannel) ++ BOOLEAN bTSSIenable = FALSE; ++ ++ TXPWRTRACK_CFG c; ++ ++ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. ++ pu1Byte deltaSwingTableIdx_TUP_A; ++ pu1Byte deltaSwingTableIdx_TDOWN_A; ++ pu1Byte deltaSwingTableIdx_TUP_B; ++ pu1Byte deltaSwingTableIdx_TDOWN_B; ++ /*for 8814 add by Yu Chen*/ ++ pu1Byte deltaSwingTableIdx_TUP_C; ++ pu1Byte deltaSwingTableIdx_TDOWN_C; ++ pu1Byte deltaSwingTableIdx_TUP_D; ++ pu1Byte deltaSwingTableIdx_TDOWN_D; ++ ++ //4 2. Initilization ( 7 steps in total ) ++ ++ ConfigureTxpowerTrack(pDM_Odm, &c); ++ ++ (*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_A, (pu1Byte*)&deltaSwingTableIdx_TDOWN_A, ++ (pu1Byte*)&deltaSwingTableIdx_TUP_B, (pu1Byte*)&deltaSwingTableIdx_TDOWN_B); ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) /*for 8814 path C & D*/ ++ (*c.GetDeltaSwingTable8814only)(pDM_Odm, (pu1Byte *)&deltaSwingTableIdx_TUP_C, (pu1Byte *)&deltaSwingTableIdx_TDOWN_C, ++ (pu1Byte *)&deltaSwingTableIdx_TUP_D, (pu1Byte *)&deltaSwingTableIdx_TDOWN_D); ++ ++ ++ pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug ++ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE; ++ ++#if (MP_DRIVER == 1) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl; // We should keep updating the control variable according to HalData. ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (pDM_Odm->mp_mode == TRUE) ++#endif ++ // RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. ++ pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("===>ODM_TXPowerTrackingCallback_ThermalMeter Start\n pRFCalibrateInfo->BbSwingIdxCckBase: %d, pRFCalibrateInfo->BbSwingIdxOfdmBase[A]: %d, pRFCalibrateInfo->DefaultOfdmIndex: %d\n", ++ pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_A], pRFCalibrateInfo->DefaultOfdmIndex)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("pDM_Odm->RFCalibrateInfo.TxPowerTrackControl %d, pHalData->EEPROMThermalMeter %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl, pHalData->EEPROMThermalMeter)); ++ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E ++ if( ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl || pHalData->EEPROMThermalMeter == 0 || ++ pHalData->EEPROMThermalMeter == 0xFF) ++ return; ++ ++ ++ //4 3. Initialize ThermalValues of RFCalibrateInfo ++ ++ if(pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); ++ } ++ ++ //4 4. Calculate average thermal meter ++ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == c.AverageThermalNum) //Average times = c.AverageThermalNum ++ pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; ++ ++ for(i = 0; i < c.AverageThermalNum; i++) ++ { ++ if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) ++ { ++ ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times ++ { ++ ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ } ++ ++ //4 5. Calculate delta, delta_LCK, delta_IQK. ++ ++ //"delta" here is used to determine whether thermal value changes or not. ++ delta = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue):(pDM_Odm->RFCalibrateInfo.ThermalValue - ThermalValue); ++ delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); ++ delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); ++ ++ if (pDM_Odm->RFCalibrateInfo.ThermalValue_IQK == 0xff) { /*no PG, use thermal value for IQK*/ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; ++ delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, use ThermalValue for IQK\n")); ++ } ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ diff_DPK[p] = (s1Byte)ThermalValue - (s1Byte)pDM_Odm->RFCalibrateInfo.DpkThermal[p]; ++ ++ /*4 6. If necessary, do LCK.*/ ++ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { ++ ++ if (pDM_Odm->RFCalibrateInfo.ThermalValue_LCK == 0xff) { ++ /*no PG , do LCK at initial status*/ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, do LCK\n")); ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; ++ if (c.PHY_LCCalibrate) ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK)); ++ /*DBG_871X("(delta, delta_LCK, delta_IQK) = (%d, %d, %d), %d\n", delta, delta_LCK, delta_IQK, c.Threshold_IQK);*/ ++ ++ /* 4 6. If necessary, do LCK.*/ ++ ++ if (delta_LCK >= c.Threshold_IQK) { ++ /* Delta temperature is equal to or larger than 20 centigrade.*/ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK)); ++ pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; ++ if (c.PHY_LCCalibrate) ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ } ++ } ++ //3 7. If necessary, move the index of swing table to adjust Tx power. ++ ++ if (delta > 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) ++ { ++ //"delta" here is used to record the absolute value of differrence. ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); ++#else ++ delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); ++#endif ++ if (delta >= TXPWR_TRACK_TABLE_SIZE) ++ delta = TXPWR_TRACK_TABLE_SIZE - 1; ++ ++ //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(ThermalValue > pHalData->EEPROMThermalMeter) { ++#else ++ if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { ++#endif ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p]; /* recording power index offset */ ++ switch (p) { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta])); ++ ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_B[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_B[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A])); ++ ++ ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_C[%d] = %d\n", delta, deltaSwingTableIdx_TUP_C[delta])); ++ ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_C[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_C[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_D[%d] = %d\n", delta, deltaSwingTableIdx_TUP_D[delta])); ++ ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_D[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_D[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta])); ++ ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_A[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_A[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ } ++ } else { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p]; /* recording poer index offset */ ++ switch (p) { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta])); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_C[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_C[delta])); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_D[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_D[delta])); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta])); ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; /* Record delta swing for mix mode power tracking */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ } ++ } ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\n\n=========================== [Path-%d] Calculating PowerIndexOffset===========================\n", p)); ++ if (pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] == pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p]) /* If Thermal value changes but lookup table value still the same */ ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; ++ else ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p]; /* Power Index Diff between 2 times Power Tracking */ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("[Path-%d] PowerIndexOffset(%d) = DeltaPowerIndex(%d) - DeltaPowerIndexLast(%d)\n", p, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p], pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p], pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p])); ++ ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pRFCalibrateInfo->BbSwingIdxOfdmBase[p] + pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p]; ++ pDM_Odm->RFCalibrateInfo.CCK_index = pRFCalibrateInfo->BbSwingIdxCckBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p]; ++ ++ pRFCalibrateInfo->BbSwingIdxCck = pDM_Odm->RFCalibrateInfo.CCK_index; ++ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pDM_Odm->RFCalibrateInfo.OFDM_index[p]; ++ ++ ++ ++ /* *************Print BB Swing Base and Index Offset************* */ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxCck, pRFCalibrateInfo->BbSwingIdxCckBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p])); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The 'OFDM' final index(%d) = BaseIndex[%d](%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxOfdm[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p], pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p])); ++ ++ //4 7.1 Handle boundary conditions of index. ++ ++ if(pDM_Odm->RFCalibrateInfo.OFDM_index[p] > c.SwingTableSize_OFDM-1) ++ { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = c.SwingTableSize_OFDM-1; ++ } ++ else if (pDM_Odm->RFCalibrateInfo.OFDM_index[p] < OFDM_min_index) ++ { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = OFDM_min_index; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\n\n========================================================================================================\n")); ++ if(pDM_Odm->RFCalibrateInfo.CCK_index > c.SwingTableSize_CCK-1) ++ pDM_Odm->RFCalibrateInfo.CCK_index = c.SwingTableSize_CCK-1; ++ else if (pDM_Odm->RFCalibrateInfo.CCK_index <= 0) ++ pDM_Odm->RFCalibrateInfo.CCK_index = 0; ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The thermal meter is unchanged or TxPowerTracking OFF(%d): ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d\n", ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl, ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", ++ pDM_Odm->RFCalibrateInfo.CCK_index, pRFCalibrateInfo->BbSwingIdxCckBase)); /*Print Swing base & current*/ ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index[%d]: %d\n", ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p])); ++ } ++ ++ if ((pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_A] != 0 || ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_B] != 0 || ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_C] != 0 || ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_D] != 0) && ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl && (pHalData->EEPROMThermalMeter != 0xff)) ++ { ++ //4 7.2 Configure the Swing Table to adjust Tx Power. ++ ++ pDM_Odm->RFCalibrateInfo.bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. ++ // ++ // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital ++ // to increase TX power. Otherwise, EVM will be bad. ++ // ++ // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. ++ if (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue) ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature Increasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ p, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ } ++ } ++ else if (ThermalValue < pDM_Odm->RFCalibrateInfo.ThermalValue)// Low temperature ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature Decreasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ p, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); ++ } ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if (ThermalValue > pHalData->EEPROMThermalMeter) ++#else ++ if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) ++#endif ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature(%d) higher than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 || ++ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || ++ pDM_Odm->SupportICType == ODM_RTL8822B || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature(%d) lower than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 || ++ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || ++ pDM_Odm->SupportICType == ODM_RTL8822B || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, Indexforchannel); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); ++ } ++ ++ } ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->BbSwingIdxCck; /*Record last time Power Tracking result as base.*/ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->BbSwingIdxOfdm[p]; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("pDM_Odm->RFCalibrateInfo.ThermalValue = %d ThermalValue= %d\n", pDM_Odm->RFCalibrateInfo.ThermalValue, ThermalValue)); ++ ++ pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; /*Record last Power Tracking Thermal Value*/ ++ ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if (!IS_HARDWARE_TYPE_8723B(Adapter) && !IS_HARDWARE_TYPE_8192E(Adapter) && !IS_HARDWARE_TYPE_8703B(Adapter)) { ++ /* Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ ++ if (delta_IQK >= c.Threshold_IQK) { ++ if (!pDM_Odm->RFCalibrateInfo.bIQKInProgress) ++ (*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8); ++ } ++ } ++ if (!(pDM_Odm->SupportICType & ODM_RTL8814A)) { ++ if (pDM_Odm->RFCalibrateInfo.DpkThermal[ODM_RF_PATH_A] != 0) { ++ if (diff_DPK[ODM_RF_PATH_A] >= c.Threshold_DPK) { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK)); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else if ((diff_DPK[ODM_RF_PATH_A] <= -1 * c.Threshold_DPK)) { ++ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK); ++ ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, value); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } ++ } ++ if (pDM_Odm->RFCalibrateInfo.DpkThermal[ODM_RF_PATH_B] != 0) { ++ if (diff_DPK[ODM_RF_PATH_B] >= c.Threshold_DPK) { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK)); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else if ((diff_DPK[ODM_RF_PATH_B] <= -1 * c.Threshold_DPK)) { ++ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK); ++ ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, value); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } ++ } ++ } ++ ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("<===ODM_TXPowerTrackingCallback_ThermalMeter End\n")); ++ ++ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; ++} ++ ++ ++//3============================================================ ++//3 IQ Calibration ++//3============================================================ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PVOID pDM_VOID ++) ++{ ++ return; ++ ++} ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) ++{ ++ u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = ++ {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; ++ u1Byte place = chnl; ++ ++ ++ if(chnl > 14) ++ { ++ for(place = 14; placeAdapter; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (*pDM_Odm->pIsFcsModeEnable) ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if (!IS_HARDWARE_TYPE_JAGUAR(Adapter)) ++ return; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ else if (IS_HARDWARE_TYPE_8812AU(Adapter)) ++ return; ++#endif ++#endif ++ ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->bLinked) { ++ if ((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) { ++ pDM_Odm->preChannel = *pDM_Odm->pChannel; ++ pDM_Odm->LinkedInterval = 0; ++ } ++ ++ if (pDM_Odm->LinkedInterval < 3) ++ pDM_Odm->LinkedInterval++; ++ ++ if (pDM_Odm->LinkedInterval == 2) { ++ /*Mark out IQK flow to prevent tx stuck. by Maddest 20130306*/ ++ /*Open it verified by James 20130715*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ /*Change channel will do IQK , cancel duplicate doIQK by YiWei*/ ++ /*PHY_IQCalibrate_8821A(pDM_Odm, FALSE);*/ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHY_IQCalibrate(Adapter, FALSE); ++#else ++ PHY_IQCalibrate_8821A(Adapter, FALSE); ++#endif ++ } ++ } else ++ pDM_Odm->LinkedInterval = 0; ++#endif ++} ++ ++void phydm_rf_init(IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ odm_TXPowerTrackingInit(pDM_Odm); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_ClearTxPowerTrackingState(pDM_Odm); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ PHY_IQCalibrate_8814A_Init(pDM_Odm); ++#endif ++#endif ++ ++} ++ ++void phydm_rf_watchdog(IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_TXPowerTrackingCheck(pDM_Odm); ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ odm_IQCalibrate(pDM_Odm); ++#endif ++} +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ce.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ce.h +new file mode 100644 +index 0000000..2e5f223 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_ce.h +@@ -0,0 +1,106 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ #ifndef __HAL_PHY_RF_H__ ++ #define __HAL_PHY_RF_H__ ++ ++/*#include "phydm_kfree.h"*/ ++#if (RTL8814A_SUPPORT == 1) ++#include "rtl8814a/phydm_iqk_8814a.h" ++#endif ++ ++#if (RTL8822B_SUPPORT == 1) ++#include "rtl8822b/phydm_iqk_8822b.h" ++#endif ++#include "phydm_powertracking_ce.h" ++ ++ ++typedef enum _SPUR_CAL_METHOD { ++ PLL_RESET, ++ AFE_PHASE_SEL ++} SPUR_CAL_METHOD; ++ ++typedef enum _PWRTRACK_CONTROL_METHOD { ++ BBSWING, ++ TXAGC, ++ MIX_MODE, ++ TSSI_MODE ++} PWRTRACK_METHOD; ++ ++typedef VOID (*FuncSetPwr)(PVOID, PWRTRACK_METHOD, u1Byte, u1Byte); ++typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte); ++typedef VOID (*FuncLCK)(PVOID); ++typedef VOID (*FuncSwing)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++typedef VOID (*FuncSwing8814only)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++ ++typedef struct _TXPWRTRACK_CFG { ++ u1Byte SwingTableSize_CCK; ++ u1Byte SwingTableSize_OFDM; ++ u1Byte Threshold_IQK; ++ u1Byte Threshold_DPK; ++ u1Byte AverageThermalNum; ++ u1Byte RfPathCount; ++ u4Byte ThermalRegAddr; ++ FuncSetPwr ODM_TxPwrTrackSetPwr; ++ FuncIQK DoIQK; ++ FuncLCK PHY_LCCalibrate; ++ FuncSwing GetDeltaSwingTable; ++ FuncSwing8814only GetDeltaSwingTable8814only; ++} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG; ++ ++void ConfigureTxpowerTrack( ++ IN PVOID pDM_VOID, ++ OUT PTXPWRTRACK_CFG pConfig ++ ); ++ ++ ++VOID ++ODM_ClearTxPowerTrackingState( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PVOID pDM_VOID ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++ ++ ++ ++#define ODM_TARGET_CHNL_NUM_2G_5G 59 ++ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PVOID pDM_VOID ++); ++u1Byte ++ODM_GetRightChnlPlaceforIQK( ++ IN u1Byte chnl ++); ++ ++void phydm_rf_init( IN PVOID pDM_VOID); ++void phydm_rf_watchdog( IN PVOID pDM_VOID); ++ ++#endif // #ifndef __HAL_PHY_RF_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_win.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_win.c +new file mode 100644 +index 0000000..41087bf +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_win.c +@@ -0,0 +1,716 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ #include "mp_precomp.h" ++ #include "phydm_precomp.h" ++ ++//#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ ++ do {\ ++ for(_offset = 0; _offset < _size; _offset++)\ ++ {\ ++ if(_deltaThermal < thermalThreshold[_direction][_offset])\ ++ {\ ++ if(_offset != 0)\ ++ _offset--;\ ++ break;\ ++ }\ ++ } \ ++ if(_offset >= _size)\ ++ _offset = _size-1;\ ++ } while(0) ++ ++ ++void ConfigureTxpowerTrack( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PTXPWRTRACK_CFG pConfig ++ ) ++{ ++#if RTL8192E_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8192E) ++ ConfigureTxpowerTrack_8192E(pConfig); ++#endif ++#if RTL8821A_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8821) ++ ConfigureTxpowerTrack_8821A(pConfig); ++#endif ++#if RTL8812A_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8812) ++ ConfigureTxpowerTrack_8812A(pConfig); ++#endif ++#if RTL8188E_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ ConfigureTxpowerTrack_8188E(pConfig); ++#endif ++ ++#if RTL8188F_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8188F) ++ ConfigureTxpowerTrack_8188F(pConfig); ++#endif ++ ++#if RTL8723B_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8723B) ++ ConfigureTxpowerTrack_8723B(pConfig); ++#endif ++ ++#if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8814A) ++ ConfigureTxpowerTrack_8814A(pConfig); ++#endif ++ ++#if RTL8821B_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8821B) ++ ConfigureTxpowerTrack_8821B(pConfig); ++#endif ++ ++#if RTL8703B_SUPPORT ++ if(pDM_Odm->SupportICType==ODM_RTL8703B) ++ ConfigureTxpowerTrack_8703B(pConfig); ++#endif ++ ++} ++ ++//====================================================================== ++// <20121113, Kordan> This function should be called when TxAGC changed. ++// Otherwise the previous compensation is gone, because we record the ++// delta of temperature between two TxPowerTracking watch dogs. ++// ++// NOTE: If Tx BB swing or Tx scaling is varified during run-time, still ++// need to call this function. ++//====================================================================== ++VOID ++ODM_ClearTxPowerTrackingState( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter); ++ u1Byte p = 0; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; ++ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->DefaultCckIndex; ++ pRFCalibrateInfo->CCK_index = 0; ++ ++ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) ++ { ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; ++ ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = 0; // Initial Mix mode power tracking ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[p] = 0; ++ pRFCalibrateInfo->KfreeOffset[p] = 0; ++ } ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA= FALSE; //Initial at Modify Tx Scaling Mode ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathB= FALSE; //Initial at Modify Tx Scaling Mode ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathC= FALSE; //Initial at Modify Tx Scaling Mode ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathD= FALSE; //Initial at Modify Tx Scaling Mode ++ pRFCalibrateInfo->Remnant_CCKSwingIdx= 0; ++ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; ++ ++ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //modify by Mingzhi.Guo ++ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //modify by Mingzhi.Guo ++ ++} ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER Adapter ++#endif ++ ) ++{ ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0, pathName = 0; ++ s1Byte diff_DPK[4] = {0}; ++ u1Byte ThermalValue_AVG_count = 0; ++ u4Byte ThermalValue_AVG = 0; ++ ++ u1Byte OFDM_min_index = 0; // OFDM BB Swing should be less than +3.0dB, which is required by Arthur ++ u1Byte Indexforchannel = 0; // GetRightChnlPlaceforIQK(pHalData->CurrentChannel) ++ BOOLEAN bTSSIenable = FALSE; ++ ++ TXPWRTRACK_CFG c; ++ ++ //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. ++ pu1Byte deltaSwingTableIdx_TUP_A, deltaSwingTableIdx_TDOWN_A; ++ pu1Byte deltaSwingTableIdx_TUP_B, deltaSwingTableIdx_TDOWN_B; ++ //for 8814 add by Yu Chen ++ pu1Byte deltaSwingTableIdx_TUP_C = NULL, deltaSwingTableIdx_TDOWN_C = NULL; ++ pu1Byte deltaSwingTableIdx_TUP_D= NULL, deltaSwingTableIdx_TDOWN_D = NULL; ++ ++ //4 2. Initilization ( 7 steps in total ) ++ ++ ConfigureTxpowerTrack(pDM_Odm, &c); ++ ++ (*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_A, (pu1Byte*)&deltaSwingTableIdx_TDOWN_A, ++ (pu1Byte*)&deltaSwingTableIdx_TUP_B, (pu1Byte*)&deltaSwingTableIdx_TDOWN_B); ++ ++ if(pDM_Odm->SupportICType & ODM_RTL8814A) // for 8814 path C & D ++ (*c.GetDeltaSwingTable8814only)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_C, (pu1Byte*)&deltaSwingTableIdx_TDOWN_C, ++ (pu1Byte*)&deltaSwingTableIdx_TUP_D, (pu1Byte*)&deltaSwingTableIdx_TDOWN_D); ++ ++ ++ pRFCalibrateInfo->TXPowerTrackingCallbackCnt++; //cosa add for debug ++ pRFCalibrateInfo->bTXPowerTrackingInit = TRUE; ++ ++#if (MP_DRIVER == 1) ++ /*pRFCalibrateInfo->TxPowerTrackControl = pHalData->TxPowerTrackControl; ++ We should keep updating the control variable according to HalData. ++ RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. */ ++ pRFCalibrateInfo->RegA24 = 0x090e1317; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("===>ODM_TXPowerTrackingCallback_ThermalMeter, \ ++ \n pRFCalibrateInfo->BbSwingIdxCckBase: %d, pRFCalibrateInfo->BbSwingIdxOfdmBase[A]: %d, pRFCalibrateInfo->DefaultOfdmIndex: %d\n", ++ pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_A], pRFCalibrateInfo->DefaultOfdmIndex)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("pRFCalibrateInfo->TxPowerTrackControl %d, pHalData->EEPROMThermalMeter %d\n", pRFCalibrateInfo->TxPowerTrackControl, pHalData->EEPROMThermalMeter)); ++ ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E ++ ++ ++ if( ! pRFCalibrateInfo->TxPowerTrackControl ) ++ return; ++ ++ ++ //4 3. Initialize ThermalValues of RFCalibrateInfo ++ ++ if(pRFCalibrateInfo->bReloadtxpowerindex) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); ++ } ++ ++ //4 4. Calculate average thermal meter ++ ++ pRFCalibrateInfo->ThermalValue_AVG[pRFCalibrateInfo->ThermalValue_AVG_index] = ThermalValue; ++ pRFCalibrateInfo->ThermalValue_AVG_index++; ++ if(pRFCalibrateInfo->ThermalValue_AVG_index == c.AverageThermalNum) //Average times = c.AverageThermalNum ++ pRFCalibrateInfo->ThermalValue_AVG_index = 0; ++ ++ for(i = 0; i < c.AverageThermalNum; i++) ++ { ++ if(pRFCalibrateInfo->ThermalValue_AVG[i]) ++ { ++ ThermalValue_AVG += pRFCalibrateInfo->ThermalValue_AVG[i]; ++ ThermalValue_AVG_count++; ++ } ++ } ++ ++ if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times ++ { ++ ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ } ++ ++ //4 5. Calculate delta, delta_LCK, delta_IQK. ++ ++ //"delta" here is used to determine whether thermal value changes or not. ++ delta = (ThermalValue > pRFCalibrateInfo->ThermalValue)?(ThermalValue - pRFCalibrateInfo->ThermalValue):(pRFCalibrateInfo->ThermalValue - ThermalValue); ++ delta_LCK = (ThermalValue > pRFCalibrateInfo->ThermalValue_LCK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_LCK):(pRFCalibrateInfo->ThermalValue_LCK - ThermalValue); ++ delta_IQK = (ThermalValue > pRFCalibrateInfo->ThermalValue_IQK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_IQK):(pRFCalibrateInfo->ThermalValue_IQK - ThermalValue); ++ ++ if(pRFCalibrateInfo->ThermalValue_IQK == 0xff) //no PG, use thermal value for IQK ++ { ++ pRFCalibrateInfo->ThermalValue_IQK = ThermalValue; ++ delta_IQK = (ThermalValue > pRFCalibrateInfo->ThermalValue_IQK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_IQK):(pRFCalibrateInfo->ThermalValue_IQK - ThermalValue); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, use ThermalValue for IQK\n")); ++ } ++ ++ for(p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ diff_DPK[p] = (s1Byte)ThermalValue - (s1Byte)pRFCalibrateInfo->DpkThermal[p]; ++ } ++ ++ //4 6. If necessary, do LCK. ++ ++ if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { ++ /*no PG , do LCK at initial status*/ ++ if (pRFCalibrateInfo->ThermalValue_LCK == 0xff) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, do LCK\n")); ++ pRFCalibrateInfo->ThermalValue_LCK = ThermalValue; ++ if(c.PHY_LCCalibrate) ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ delta_LCK = (ThermalValue > pRFCalibrateInfo->ThermalValue_LCK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_LCK):(pRFCalibrateInfo->ThermalValue_LCK - ThermalValue); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK)); ++ ++ /* Delta temperature is equal to or larger than 20 centigrade.*/ ++ if (delta_LCK >= c.Threshold_IQK) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK)); ++ pRFCalibrateInfo->ThermalValue_LCK = ThermalValue; ++ if(c.PHY_LCCalibrate) ++ (*c.PHY_LCCalibrate)(pDM_Odm); ++ } ++ } ++ ++ //3 7. If necessary, move the index of swing table to adjust Tx power. ++ ++ if (delta > 0 && pRFCalibrateInfo->TxPowerTrackControl) ++ { ++ //"delta" here is used to record the absolute value of differrence. ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); ++#else ++ delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); ++#endif ++ if (delta >= TXPWR_TRACK_TABLE_SIZE) ++ delta = TXPWR_TRACK_TABLE_SIZE - 1; ++ ++ //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(ThermalValue > pHalData->EEPROMThermalMeter) { ++#else ++ if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { ++#endif ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = pRFCalibrateInfo->DeltaPowerIndex[p]; //recording poer index offset ++ switch(p) ++ { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta])); ++ ++ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_B[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_B[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_C[%d] = %d\n", delta, deltaSwingTableIdx_TUP_C[delta])); ++ ++ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_C[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_C[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_D[%d] = %d\n", delta, deltaSwingTableIdx_TUP_D[delta])); ++ ++ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_D[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_D[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta])); ++ ++ pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_A[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_A[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ ++ } ++ ++ } ++ else { ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = pRFCalibrateInfo->DeltaPowerIndex[p]; //recording poer index offset ++ switch(p) ++ { ++ case ODM_RF_PATH_B: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta])); ++ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_C: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_C[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_C[delta])); ++ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ case ODM_RF_PATH_D: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_D[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_D[delta])); ++ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta])); ++ pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; ++ pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; // Record delta swing for mix mode power tracking ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p])); ++ break; ++ } ++ ++ } ++ ++ } ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\n\n=========================== [Path-%d] Calculating PowerIndexOffset===========================\n", p)); ++ ++ if(pRFCalibrateInfo->DeltaPowerIndex[p] == pRFCalibrateInfo->DeltaPowerIndexLast[p]) // If Thermal value changes but lookup table value still the same ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ else ++ pRFCalibrateInfo->PowerIndexOffset[p] = pRFCalibrateInfo->DeltaPowerIndex[p] - pRFCalibrateInfo->DeltaPowerIndexLast[p]; // Power Index Diff between 2 times Power Tracking ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("[Path-%d] PowerIndexOffset(%d) = DeltaPowerIndex(%d) - DeltaPowerIndexLast(%d)\n", p, pRFCalibrateInfo->PowerIndexOffset[p], pRFCalibrateInfo->DeltaPowerIndex[p], pRFCalibrateInfo->DeltaPowerIndexLast[p])); ++ ++ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->BbSwingIdxOfdmBase[p] + pRFCalibrateInfo->PowerIndexOffset[p]; ++ pRFCalibrateInfo->CCK_index = pRFCalibrateInfo->BbSwingIdxCckBase + pRFCalibrateInfo->PowerIndexOffset[p]; ++ ++ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->CCK_index; ++ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->OFDM_index[p]; ++ ++ // *************Print BB Swing Base and Index Offset************* ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxCck, pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->PowerIndexOffset[p])); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The 'OFDM' final index(%d) = BaseIndex[%d](%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxOfdm[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p], pRFCalibrateInfo->PowerIndexOffset[p])); ++ ++ //4 7.1 Handle boundary conditions of index. ++ ++ if(pRFCalibrateInfo->OFDM_index[p] > c.SwingTableSize_OFDM-1) ++ { ++ pRFCalibrateInfo->OFDM_index[p] = c.SwingTableSize_OFDM-1; ++ } ++ else if (pRFCalibrateInfo->OFDM_index[p] <= OFDM_min_index) ++ { ++ pRFCalibrateInfo->OFDM_index[p] = OFDM_min_index; ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("\n\n========================================================================================================\n")); ++ if(pRFCalibrateInfo->CCK_index > c.SwingTableSize_CCK-1) ++ pRFCalibrateInfo->CCK_index = c.SwingTableSize_CCK-1; ++ else if (pRFCalibrateInfo->CCK_index <= 0) ++ pRFCalibrateInfo->CCK_index = 0; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("The thermal meter is unchanged or TxPowerTracking OFF(%d): ThermalValue: %d , pRFCalibrateInfo->ThermalValue: %d\n", ++ pRFCalibrateInfo->TxPowerTrackControl, ThermalValue, pRFCalibrateInfo->ThermalValue)); ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", ++ pRFCalibrateInfo->CCK_index, pRFCalibrateInfo->BbSwingIdxCckBase)); //Print Swing base & current ++ ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index[%d]: %d\n", ++ pRFCalibrateInfo->OFDM_index[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p])); ++ } ++ ++ if ((pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_A] != 0 || ++ pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_B] != 0 || ++ pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_C] != 0 || ++ pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_D] != 0) && ++ pRFCalibrateInfo->TxPowerTrackControl && (pHalData->EEPROMThermalMeter != 0xff)) ++ { ++ //4 7.2 Configure the Swing Table to adjust Tx Power. ++ ++ pRFCalibrateInfo->bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. ++ // ++ // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital ++ // to increase TX power. Otherwise, EVM will be bad. ++ // ++ // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. ++ if (ThermalValue > pRFCalibrateInfo->ThermalValue) ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature Increasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ p, pRFCalibrateInfo->PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pRFCalibrateInfo->ThermalValue)); ++ } ++ } ++ ++ else if (ThermalValue < pRFCalibrateInfo->ThermalValue)// Low temperature ++ { ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature Decreasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", ++ p, pRFCalibrateInfo->PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pRFCalibrateInfo->ThermalValue)); ++ } ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if (ThermalValue > pHalData->EEPROMThermalMeter) ++#else ++ if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) ++#endif ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature(%d) higher than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E ||pDM_Odm->SupportICType == ODM_RTL8821 || ++ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8188F) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking MIX_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking BBSWING_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("Temperature(%d) lower than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 || ++ pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8188F) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking MIX_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, Indexforchannel); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking BBSWING_MODE**********\n")); ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); ++ } ++ ++ } ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->BbSwingIdxCck; // Record last time Power Tracking result as base. ++ for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->BbSwingIdxOfdm[p]; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("pRFCalibrateInfo->ThermalValue = %d ThermalValue= %d\n", pRFCalibrateInfo->ThermalValue, ThermalValue)); ++ ++ pRFCalibrateInfo->ThermalValue = ThermalValue; //Record last Power Tracking Thermal Value ++ ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if(!IS_HARDWARE_TYPE_8723B(Adapter)) ++ { ++ // Delta temperature is equal to or larger than 20 centigrade (When threshold is 8). ++ if ((delta_IQK >= c.Threshold_IQK)) { ++ if ( ! pRFCalibrateInfo->bIQKInProgress) ++ (*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8); ++ } ++ } ++ if (pRFCalibrateInfo->DpkThermal[ODM_RF_PATH_A] != 0) { ++ if ((diff_DPK[ODM_RF_PATH_A] >= c.Threshold_DPK)) { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK)); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else if ((diff_DPK[ODM_RF_PATH_A] <= -1 * c.Threshold_DPK)) { ++ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, value); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } ++ } ++ if (pRFCalibrateInfo->DpkThermal[ODM_RF_PATH_B] != 0) { ++ if ((diff_DPK[ODM_RF_PATH_B] >= c.Threshold_DPK)) { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK)); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else if ((diff_DPK[ODM_RF_PATH_B] <= -1 * c.Threshold_DPK)) { ++ s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, value); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } else { ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ++ ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, 0); ++ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); ++ } ++ } ++ ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("<===ODM_TXPowerTrackingCallback_ThermalMeter\n")); ++ ++ pRFCalibrateInfo->TXPowercount = 0; ++} ++ ++ ++ ++//3============================================================ ++//3 IQ Calibration ++//3============================================================ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ return; ++} ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) ++{ ++ u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = ++ {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; ++ u1Byte place = chnl; ++ ++ ++ if(chnl > 14) ++ { ++ for(place = 14; placeAdapter; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (*pDM_Odm->pIsFcsModeEnable) ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if (!IS_HARDWARE_TYPE_JAGUAR(Adapter)) ++ return; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ else if (IS_HARDWARE_TYPE_8812AU(Adapter)) ++ return; ++#endif ++#endif ++ ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->bLinked) { ++ if ((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) { ++ pDM_Odm->preChannel = *pDM_Odm->pChannel; ++ pDM_Odm->LinkedInterval = 0; ++ } ++ ++ if (pDM_Odm->LinkedInterval < 3) ++ pDM_Odm->LinkedInterval++; ++ ++ if (pDM_Odm->LinkedInterval == 2) { ++ /*Mark out IQK flow to prevent tx stuck. by Maddest 20130306*/ ++ /*Open it verified by James 20130715*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PHY_IQCalibrate_8821A(pDM_Odm, FALSE); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHY_IQCalibrate(Adapter, FALSE); ++#else ++ PHY_IQCalibrate_8821A(Adapter, FALSE); ++#endif ++ } ++ } else ++ pDM_Odm->LinkedInterval = 0; ++#endif ++} ++ ++void phydm_rf_init(IN PDM_ODM_T pDM_Odm) ++{ ++ ++ odm_TXPowerTrackingInit(pDM_Odm); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_ClearTxPowerTrackingState(pDM_Odm); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ PHY_IQCalibrate_8814A_Init(pDM_Odm); ++#endif ++#endif ++ ++} ++ ++void phydm_rf_watchdog(IN PDM_ODM_T pDM_Odm) ++{ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ODM_TXPowerTrackingCheck(pDM_Odm); ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ odm_IQCalibrate(pDM_Odm); ++#endif ++} +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_win.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_win.h +new file mode 100644 +index 0000000..aa20db1 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halphyrf_win.h +@@ -0,0 +1,108 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ #ifndef __HAL_PHY_RF_H__ ++ #define __HAL_PHY_RF_H__ ++ ++#include "phydm_kfree.h" ++#if (RTL8814A_SUPPORT == 1) ++#include "rtl8814a/phydm_iqk_8814a.h" ++#endif ++ ++#if (RTL8822B_SUPPORT == 1) ++#include "rtl8822b/phydm_iqk_8822b.h" ++#endif ++#include "phydm_powertracking_win.h" ++ ++typedef enum _SPUR_CAL_METHOD { ++ PLL_RESET, ++ AFE_PHASE_SEL ++} SPUR_CAL_METHOD; ++ ++typedef enum _PWRTRACK_CONTROL_METHOD { ++ BBSWING, ++ TXAGC, ++ MIX_MODE, ++ TSSI_MODE ++} PWRTRACK_METHOD; ++ ++typedef VOID (*FuncSetPwr)(PDM_ODM_T, PWRTRACK_METHOD, u1Byte, u1Byte); ++typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte); ++typedef VOID (*FuncLCK)(PDM_ODM_T); ++ //refine by YuChen for 8814A ++typedef VOID (*FuncSwing)(PDM_ODM_T, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++typedef VOID (*FuncSwing8814only)(PDM_ODM_T, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*); ++ ++typedef struct _TXPWRTRACK_CFG { ++ u1Byte SwingTableSize_CCK; ++ u1Byte SwingTableSize_OFDM; ++ u1Byte Threshold_IQK; ++ u1Byte Threshold_DPK; ++ u1Byte AverageThermalNum; ++ u1Byte RfPathCount; ++ u4Byte ThermalRegAddr; ++ FuncSetPwr ODM_TxPwrTrackSetPwr; ++ FuncIQK DoIQK; ++ FuncLCK PHY_LCCalibrate; ++ FuncSwing GetDeltaSwingTable; ++ FuncSwing8814only GetDeltaSwingTable8814only; ++} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG; ++ ++VOID ++ConfigureTxpowerTrack( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PTXPWRTRACK_CFG pConfig ++ ); ++ ++ ++VOID ++ODM_ClearTxPowerTrackingState( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_TXPowerTrackingCallback_ThermalMeter( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER Adapter ++#endif ++ ); ++ ++ ++ ++#define ODM_TARGET_CHNL_NUM_2G_5G 59 ++ ++ ++VOID ++ODM_ResetIQKResult( ++ IN PDM_ODM_T pDM_Odm ++); ++u1Byte ++ODM_GetRightChnlPlaceforIQK( ++ IN u1Byte chnl ++); ++ ++VOID odm_IQCalibrate(IN PDM_ODM_T pDM_Odm); ++VOID phydm_rf_init( IN PDM_ODM_T pDM_Odm); ++VOID phydm_rf_watchdog( IN PDM_ODM_T pDM_Odm); ++ ++#endif // #ifndef __HAL_PHY_RF_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/mp_precomp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/mp_precomp.h +new file mode 100644 +index 0000000..2e950cb +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/mp_precomp.h +@@ -0,0 +1,20 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm.c +new file mode 100644 +index 0000000..b1bcec9 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm.c +@@ -0,0 +1,2162 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++const u2Byte dB_Invert_Table[12][8] = { ++ { 1, 1, 1, 2, 2, 2, 2, 3}, ++ { 3, 3, 4, 4, 4, 5, 6, 6}, ++ { 7, 8, 9, 10, 11, 13, 14, 16}, ++ { 18, 20, 22, 25, 28, 32, 35, 40}, ++ { 45, 50, 56, 63, 71, 79, 89, 100}, ++ { 112, 126, 141, 158, 178, 200, 224, 251}, ++ { 282, 316, 355, 398, 447, 501, 562, 631}, ++ { 708, 794, 891, 1000, 1122, 1259, 1413, 1585}, ++ { 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981}, ++ { 4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000}, ++ { 11220, 12589, 14125, 15849, 17783, 19953, 22387, 25119}, ++ { 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535} ++}; ++ ++ ++//============================================================ ++// Local Function predefine. ++//============================================================ ++ ++/* START------------COMMON INFO RELATED--------------- */ ++ ++VOID ++odm_GlobalAdapterCheck( ++ IN VOID ++ ); ++ ++//move to odm_PowerTacking.h by YuChen ++ ++ ++ ++VOID ++odm_UpdatePowerTrainingState( ++ IN PDM_ODM_T pDM_Odm ++); ++ ++//============================================================ ++//3 Export Interface ++//============================================================ ++ ++/*Y = 10*log(X)*/ ++s4Byte ++ODM_PWdB_Conversion( ++ IN s4Byte X, ++ IN u4Byte TotalBit, ++ IN u4Byte DecimalBit ++ ) ++{ ++ s4Byte Y, integer = 0, decimal = 0; ++ u4Byte i; ++ ++ if(X == 0) ++ X = 1; // log2(x), x can't be 0 ++ ++ for(i = (TotalBit-1); i > 0; i--) ++ { ++ if(X & BIT(i)) ++ { ++ integer = i; ++ if(i > 0) ++ decimal = (X & BIT(i-1))?2:0; //decimal is 0.5dB*3=1.5dB~=2dB ++ break; ++ } ++ } ++ ++ Y = 3*(integer-DecimalBit)+decimal; //10*log(x)=3*log2(x), ++ ++ return Y; ++} ++ ++s4Byte ++ODM_SignConversion( ++ IN s4Byte value, ++ IN u4Byte TotalBit ++ ) ++{ ++ if(value&BIT(TotalBit-1)) ++ value -= BIT(TotalBit); ++ return value; ++} ++ ++VOID ++ODM_InitMpDriverStatus( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ // Decide when compile time ++ #if(MP_DRIVER == 1) ++ pDM_Odm->mp_mode = TRUE; ++ #else ++ pDM_Odm->mp_mode = FALSE; ++ #endif ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ // Update information every period ++ pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode; ++ ++#else ++ ++ // MP mode is always false at AP side ++ pDM_Odm->mp_mode = FALSE; ++ ++#endif ++} ++ ++VOID ++ODM_UpdateMpDriverStatus( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ // Do nothing. ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ // Update information erery period ++ pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode; ++ ++#else ++ ++ // Do nothing. ++ ++#endif ++} ++ ++VOID ++PHYDM_InitTRXAntennaSetting( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if (RTL8814A_SUPPORT == 1) ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A)) { ++ u1Byte RxAnt = 0, TxAnt = 0; ++ ++ RxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH, pDM_Odm), ODM_BIT(BB_RX_PATH, pDM_Odm)); ++ TxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_TX_PATH, pDM_Odm), ODM_BIT(BB_TX_PATH, pDM_Odm)); ++ pDM_Odm->TXAntStatus = (TxAnt & 0xf); ++ pDM_Odm->RXAntStatus = (RxAnt & 0xf); ++ } ++#endif ++} ++ ++VOID ++phydm_Init_cck_setting( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte value_824,value_82c; ++ ++ pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, ODM_REG(CCK_RPT_FORMAT,pDM_Odm), ODM_BIT(CCK_RPT_FORMAT,pDM_Odm)); ++ ++ #if (RTL8192E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType & (ODM_RTL8192E)) ++ { ++ /* 0x824[9] = 0x82C[9] = 0xA80[7] these regiaters settinh should be equal or CCK RSSI report may inaccurate */ ++ value_824 = ODM_GetBBReg(pDM_Odm, 0x824, BIT9); ++ value_82c = ODM_GetBBReg(pDM_Odm, 0x82c, BIT9); ++ ++ if(value_824 != value_82c) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x82c , BIT9, value_824); ++ } ++ ODM_SetBBReg(pDM_Odm, 0xa80 , BIT7, value_824); ++ pDM_Odm->cck_agc_report_type = (BOOLEAN)value_824; ++ } ++ #endif ++ ++ #if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & (ODM_RTL8703B)) { ++ ++ pDM_Odm->cck_agc_report_type = ODM_GetBBReg(pDM_Odm, 0x950, BIT11) ? 1 : 0; /*1: 4bit LNA , 0: 3bit LNA */ ++ ++ if (pDM_Odm->cck_agc_report_type != 1) { ++ DbgPrint("[Warning] 8703B CCK should be 4bit LNA, ie. 0x950[11] = 1\n"); ++ /**/ ++ } ++ } ++ #endif ++ ++} ++ ++u1Byte DummyHubUsbMode = 1;/* USB 2.0 */ ++void phydm_hook_dummy_member( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ if (pDM_Odm->HubUsbMode == NULL) ++ pDM_Odm->HubUsbMode = &DummyHubUsbMode; ++} ++ ++ ++VOID ++odm_CommonInfoSelfInit( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ phydm_Init_cck_setting(pDM_Odm); ++ pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH,pDM_Odm), ODM_BIT(BB_RX_PATH,pDM_Odm)); ++#if (DM_ODM_SUPPORT_TYPE != ODM_CE) ++ pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp; ++#endif ++ ++ PHYDM_InitDebugSetting(pDM_Odm); ++ ODM_InitMpDriverStatus(pDM_Odm); ++ PHYDM_InitTRXAntennaSetting(pDM_Odm); ++ ++ pDM_Odm->TxRate = 0xFF; ++ ++ pDM_Odm->number_linked_client = 0; ++ pDM_Odm->pre_number_linked_client = 0; ++ pDM_Odm->number_active_client = 0; ++ pDM_Odm->pre_number_active_client = 0; ++ phydm_hook_dummy_member(pDM_Odm); ++ ++} ++ ++VOID ++odm_CommonInfoSelfUpdate( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ u1Byte EntryCnt = 0, num_active_client = 0; ++ u4Byte i, OneEntry_MACID = 0, ma_rx_tp = 0; ++ PSTA_INFO_T pEntry; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ pEntry = pDM_Odm->pODM_StaInfo[0]; ++ if(pMgntInfo->mAssoc) ++ { ++ pEntry->bUsed=TRUE; ++ for (i=0; i<6; i++) ++ pEntry->MacAddr[i] = pMgntInfo->Bssid[i]; ++ } ++ else ++ { ++ pEntry->bUsed=FALSE; ++ for (i=0; i<6; i++) ++ pEntry->MacAddr[i] = 0; ++ } ++ ++ //STA mode is linked to AP ++ if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0]) && !ACTING_AS_AP(Adapter)) ++ pDM_Odm->bsta_state = TRUE; ++ else ++ pDM_Odm->bsta_state = FALSE; ++#endif ++ ++/* THis variable cannot be used because it is wrong*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ { ++ if (*(pDM_Odm->pSecChOffset) == 1) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2; ++ else if (*(pDM_Odm->pSecChOffset) == 2) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2; ++ } else if (*(pDM_Odm->pBandWidth) == ODM_BW80M) { ++ if (*(pDM_Odm->pSecChOffset) == 1) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 6; ++ else if (*(pDM_Odm->pSecChOffset) == 2) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 6; ++ } else ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); ++#else ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) { ++ if (*(pDM_Odm->pSecChOffset) == 1) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2; ++ else if (*(pDM_Odm->pSecChOffset) == 2) ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2; ++ } else ++ pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); ++#endif ++ ++ for (i=0; ipODM_StaInfo[i]; ++ if(IS_STA_VALID(pEntry)) ++ { ++ EntryCnt++; ++ if(EntryCnt==1) ++ { ++ OneEntry_MACID=i; ++ } ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ma_rx_tp = (pEntry->rx_byte_cnt_LowMAW)<<3; /* low moving average RX TP ( bit /sec)*/ ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("ClientTP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp)); ++ ++ if (ma_rx_tp > ACTIVE_TP_THRESHOLD) ++ num_active_client++; ++ #endif ++ } ++ } ++ ++ if(EntryCnt == 1) ++ { ++ pDM_Odm->bOneEntryOnly = TRUE; ++ pDM_Odm->OneEntry_MACID=OneEntry_MACID; ++ } ++ else ++ pDM_Odm->bOneEntryOnly = FALSE; ++ ++ pDM_Odm->pre_number_linked_client = pDM_Odm->number_linked_client; ++ pDM_Odm->pre_number_active_client = pDM_Odm->number_active_client; ++ ++ pDM_Odm->number_linked_client = EntryCnt; ++ pDM_Odm->number_active_client = num_active_client; ++ ++ /* Update MP driver status*/ ++ ODM_UpdateMpDriverStatus(pDM_Odm); ++} ++ ++VOID ++odm_CommonInfoSelfReset( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt = 0; ++#endif ++} ++ ++PVOID ++PhyDM_Get_Structure( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte Structure_Type ++) ++ ++{ ++ PVOID pStruct = NULL; ++#if RTL8195A_SUPPORT ++ switch (Structure_Type){ ++ case PHYDM_FALSEALMCNT: ++ pStruct = &FalseAlmCnt; ++ break; ++ ++ case PHYDM_CFOTRACK: ++ pStruct = &DM_CfoTrack; ++ break; ++ ++ case PHYDM_ADAPTIVITY: ++ pStruct = &(pDM_Odm->Adaptivity); ++ break; ++ ++ default: ++ break; ++ } ++ ++#else ++ switch (Structure_Type){ ++ case PHYDM_FALSEALMCNT: ++ pStruct = &(pDM_Odm->FalseAlmCnt); ++ break; ++ ++ case PHYDM_CFOTRACK: ++ pStruct = &(pDM_Odm->DM_CfoTrack); ++ break; ++ ++ case PHYDM_ADAPTIVITY: ++ pStruct = &(pDM_Odm->Adaptivity); ++ break; ++ ++ default: ++ break; ++ } ++ ++#endif ++ return pStruct; ++} ++ ++VOID ++odm_HWSetting( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (RTL8821A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType & ODM_RTL8821) ++ odm_HWSetting_8821A(pDM_Odm); ++#endif ++ ++} ++ ++// ++// 2011/09/21 MH Add to describe different team necessary resource allocate?? ++// ++VOID ++ODM_DMInit( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ odm_CommonInfoSelfInit(pDM_Odm); ++ odm_DIGInit(pDM_Odm); ++ Phydm_NHMCounterStatisticsInit(pDM_Odm); ++ Phydm_AdaptivityInit(pDM_Odm); ++ phydm_ra_info_init(pDM_Odm); ++ odm_RateAdaptiveMaskInit(pDM_Odm); ++ odm_RA_ParaAdjust_init(pDM_Odm); ++ ODM_CfoTrackingInit(pDM_Odm); ++ ODM_EdcaTurboInit(pDM_Odm); ++ odm_RSSIMonitorInit(pDM_Odm); ++ phydm_rf_init(pDM_Odm); ++ odm_TXPowerTrackingInit(pDM_Odm); ++ odm_AntennaDiversityInit(pDM_Odm); ++ odm_AutoChannelSelectInit(pDM_Odm); ++ odm_PathDiversityInit(pDM_Odm); ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ phydm_Beamforming_Init(pDM_Odm); ++#endif ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ odm_DynamicBBPowerSavingInit(pDM_Odm); ++ odm_DynamicTxPowerInit(pDM_Odm); ++ ++#if (RTL8188E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ { ++ odm_PrimaryCCA_Init(pDM_Odm); ++ ODM_RAInfo_Init_all(pDM_Odm); ++ } ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ++ #if (RTL8723B_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ odm_SwAntDetectInit(pDM_Odm); ++ #endif ++ ++ #if (RTL8192E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType==ODM_RTL8192E) ++ odm_PrimaryCCA_Check_Init(pDM_Odm); ++ #endif ++ ++#endif ++ ++ } ++ ++} ++ ++VOID ++ODM_DMReset( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ ODM_AntDivReset(pDM_Odm); ++ phydm_setEDCCAThresholdAPI(pDM_Odm, pDM_DigTable->CurIGValue); ++} ++ ++ ++VOID ++phydm_support_ablity_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte pre_support_ability; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++ pre_support_ability = pDM_Odm->SupportAbility ; ++ PHYDM_SNPRINTF((output+used, out_len-used,"\n%s\n", "================================")); ++ if(dm_value[0] == 100) ++ { ++ PHYDM_SNPRINTF((output+used, out_len-used, "[Supportablity] PhyDM Selection\n")); ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================")); ++ PHYDM_SNPRINTF((output+used, out_len-used, "00. (( %s ))DIG \n", ((pDM_Odm->SupportAbility & ODM_BB_DIG)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "01. (( %s ))RA_MASK \n", ((pDM_Odm->SupportAbility & ODM_BB_RA_MASK)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "02. (( %s ))DYNAMIC_TXPWR \n", ((pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "03. (( %s ))FA_CNT \n", ((pDM_Odm->SupportAbility & ODM_BB_FA_CNT)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "04. (( %s ))RSSI_MONITOR \n", ((pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "05. (( %s ))CCK_PD \n", ((pDM_Odm->SupportAbility & ODM_BB_CCK_PD)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "06. (( %s ))ANT_DIV \n", ((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "07. (( %s ))PWR_SAVE \n", ((pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "08. (( %s ))PWR_TRAIN \n", ((pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "09. (( %s ))RATE_ADAPTIVE \n", ((pDM_Odm->SupportAbility & ODM_BB_RATE_ADAPTIVE)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "10. (( %s ))PATH_DIV \n", ((pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)?("V"):(".")))); ++ PHYDM_SNPRINTF((output+used, out_len-used, "11. (( %s ))PSD \n", ((pDM_Odm->SupportAbility & ODM_BB_PSD)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "12. (( %s ))RXHP \n", ((pDM_Odm->SupportAbility & ODM_BB_RXHP)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "13. (( %s ))ADAPTIVITY \n", ((pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "14. (( %s ))CFO_TRACKING \n", ((pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "15. (( %s ))NHM_CNT \n", ((pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "16. (( %s ))PRIMARY_CCA \n", ((pDM_Odm->SupportAbility & ODM_BB_PRIMARY_CCA)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "20. (( %s ))EDCA_TURBO \n", ((pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "21. (( %s ))EARLY_MODE \n", ((pDM_Odm->SupportAbility & ODM_MAC_EARLY_MODE)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "24. (( %s ))TX_PWR_TRACK \n", ((pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "25. (( %s ))RX_GAIN_TRACK \n", ((pDM_Odm->SupportAbility & ODM_RF_RX_GAIN_TRACK)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used, "26. (( %s ))RF_CALIBRATION \n", ((pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)?("V"):(".")) )); ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================")); ++ } ++ /* ++ else if(dm_value[0] == 101) ++ { ++ pDM_Odm->SupportAbility = 0 ; ++ DbgPrint("Disable all SupportAbility components \n"); ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "Disable all SupportAbility components")); ++ } ++ */ ++ else ++ { ++ ++ if(dm_value[1] == 1) //enable ++ { ++ pDM_Odm->SupportAbility |= BIT(dm_value[0]) ; ++ if(BIT(dm_value[0]) & ODM_BB_PATH_DIV) ++ { ++ odm_PathDiversityInit(pDM_Odm); ++ } ++ } ++ else if(dm_value[1] == 2) //disable ++ { ++ pDM_Odm->SupportAbility &= ~(BIT(dm_value[0])) ; ++ } ++ else ++ { ++ //DbgPrint("\n[Warning!!!] 1:enable, 2:disable \n\n"); ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "[Warning!!!] 1:enable, 2:disable")); ++ } ++ } ++ PHYDM_SNPRINTF((output+used, out_len-used,"pre-SupportAbility = 0x%x\n", pre_support_ability )); ++ PHYDM_SNPRINTF((output+used, out_len-used,"Curr-SupportAbility = 0x%x\n", pDM_Odm->SupportAbility )); ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================")); ++} ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++// ++//tmp modify for LC Only ++// ++VOID ++ODM_DMWatchdog_LPS( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ odm_CommonInfoSelfUpdate(pDM_Odm); ++ odm_FalseAlarmCounterStatistics(pDM_Odm); ++ odm_RSSIMonitorCheck(pDM_Odm); ++ odm_DIGbyRSSI_LPS(pDM_Odm); ++ odm_CCKPacketDetectionThresh(pDM_Odm); ++ odm_CommonInfoSelfReset(pDM_Odm); ++ ++ if(*(pDM_Odm->pbPowerSaving)==TRUE) ++ return; ++} ++#endif ++// ++// 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. ++// You can not add any dummy function here, be care, you can only use DM structure ++// to perform any new ODM_DM. ++// ++VOID ++ODM_DMWatchdog( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ odm_CommonInfoSelfUpdate(pDM_Odm); ++ phydm_BasicDbgMessage(pDM_Odm); ++ odm_HWSetting(pDM_Odm); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ { ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ if( (priv->auto_channel != 0) && (priv->auto_channel != 2) )//if ACS running, do not do FA/CCA counter read ++ return; ++ } ++#endif ++ odm_FalseAlarmCounterStatistics(pDM_Odm); ++ phydm_NoisyDetection(pDM_Odm); ++ ++ odm_RSSIMonitorCheck(pDM_Odm); ++ ++ if(*(pDM_Odm->pbPowerSaving) == TRUE) ++ { ++ odm_DIGbyRSSI_LPS(pDM_Odm); ++ { ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("DMWatchdog in power saving mode\n")); ++ return; ++ } ++ ++ Phydm_CheckAdaptivity(pDM_Odm); ++ odm_UpdatePowerTrainingState(pDM_Odm); ++ odm_DIG(pDM_Odm); ++ { ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue); ++ } ++ odm_CCKPacketDetectionThresh(pDM_Odm); ++ phydm_ra_dynamic_retry_limit(pDM_Odm); ++ phydm_ra_dynamic_retry_count(pDM_Odm); ++ odm_RefreshRateAdaptiveMask(pDM_Odm); ++ odm_RefreshBasicRateMask(pDM_Odm); ++ odm_DynamicBBPowerSaving(pDM_Odm); ++ odm_EdcaTurboCheck(pDM_Odm); ++ odm_PathDiversity(pDM_Odm); ++ ODM_CfoTracking(pDM_Odm); ++ odm_DynamicTxPower(pDM_Odm); ++ odm_AntennaDiversity(pDM_Odm); ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ phydm_Beamforming_Watchdog(pDM_Odm); ++#endif ++ ++ phydm_rf_watchdog(pDM_Odm); ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ ++#if (RTL8188E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ odm_DynamicPrimaryCCA(pDM_Odm); ++#endif ++ ++#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ++ #if (RTL8192E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType==ODM_RTL8192E) ++ odm_DynamicPrimaryCCA_Check(pDM_Odm); ++ #endif ++#endif ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ odm_dtc(pDM_Odm); ++#endif ++ ++ odm_CommonInfoSelfReset(pDM_Odm); ++ ++} ++ ++ ++// ++// Init /.. Fixed HW value. Only init time. ++// ++VOID ++ODM_CmnInfoInit( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN u4Byte Value ++ ) ++{ ++ // ++ // This section is used for init value ++ // ++ switch (CmnInfo) ++ { ++ // ++ // Fixed ODM value. ++ // ++ case ODM_CMNINFO_ABILITY: ++ pDM_Odm->SupportAbility = (u4Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_RF_TYPE: ++ pDM_Odm->RFType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_PLATFORM: ++ pDM_Odm->SupportPlatform = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_INTERFACE: ++ pDM_Odm->SupportInterface = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_MP_TEST_CHIP: ++ pDM_Odm->bIsMPChip= (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_IC_TYPE: ++ pDM_Odm->SupportICType = Value; ++ break; ++ ++ case ODM_CMNINFO_CUT_VER: ++ pDM_Odm->CutVersion = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_FAB_VER: ++ pDM_Odm->FabVersion = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_RFE_TYPE: ++ pDM_Odm->RFEType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_RF_ANTENNA_TYPE: ++ pDM_Odm->AntDivType= (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_BOARD_TYPE: ++ pDM_Odm->BoardType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_PACKAGE_TYPE: ++ pDM_Odm->PackageType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_EXT_LNA: ++ pDM_Odm->ExtLNA = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_5G_EXT_LNA: ++ pDM_Odm->ExtLNA5G = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_EXT_PA: ++ pDM_Odm->ExtPA = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_5G_EXT_PA: ++ pDM_Odm->ExtPA5G = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_GPA: ++ pDM_Odm->TypeGPA = (u2Byte)Value; ++ break; ++ case ODM_CMNINFO_APA: ++ pDM_Odm->TypeAPA = (u2Byte)Value; ++ break; ++ case ODM_CMNINFO_GLNA: ++ pDM_Odm->TypeGLNA = (u2Byte)Value; ++ break; ++ case ODM_CMNINFO_ALNA: ++ pDM_Odm->TypeALNA = (u2Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_EXT_TRSW: ++ pDM_Odm->ExtTRSW = (u1Byte)Value; ++ break; ++ case ODM_CMNINFO_EXT_LNA_GAIN: ++ pDM_Odm->ExtLNAGain = (u1Byte)Value; ++ break; ++ case ODM_CMNINFO_PATCH_ID: ++ pDM_Odm->PatchID = (u1Byte)Value; ++ break; ++ case ODM_CMNINFO_BINHCT_TEST: ++ pDM_Odm->bInHctTest = (BOOLEAN)Value; ++ break; ++ case ODM_CMNINFO_BWIFI_TEST: ++ pDM_Odm->bWIFITest = (BOOLEAN)Value; ++ break; ++ case ODM_CMNINFO_SMART_CONCURRENT: ++ pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value; ++ break; ++ case ODM_CMNINFO_DOMAIN_CODE_2G: ++ pDM_Odm->odm_Regulation2_4G = (u1Byte)Value; ++ break; ++ case ODM_CMNINFO_DOMAIN_CODE_5G: ++ pDM_Odm->odm_Regulation5G = (u1Byte)Value; ++ break; ++ case ODM_CMNINFO_CONFIG_BB_RF: ++ pDM_Odm->ConfigBBRF = (BOOLEAN)Value; ++ break; ++ case ODM_CMNINFO_IQKFWOFFLOAD: ++ pDM_Odm->IQKFWOffload = (u1Byte)Value; ++ break; ++ //To remove the compiler warning, must add an empty default statement to handle the other values. ++ default: ++ //do nothing ++ break; ++ ++ } ++ ++} ++ ++ ++VOID ++ODM_CmnInfoHook( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN PVOID pValue ++ ) ++{ ++ // ++ // Hook call by reference pointer. ++ // ++ switch (CmnInfo) ++ { ++ // ++ // Dynamic call by reference pointer. ++ // ++ case ODM_CMNINFO_MAC_PHY_MODE: ++ pDM_Odm->pMacPhyMode = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_TX_UNI: ++ pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_RX_UNI: ++ pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_WM_MODE: ++ pDM_Odm->pWirelessMode = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_BAND: ++ pDM_Odm->pBandType = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_SEC_CHNL_OFFSET: ++ pDM_Odm->pSecChOffset = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_SEC_MODE: ++ pDM_Odm->pSecurity = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_BW: ++ pDM_Odm->pBandWidth = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_CHNL: ++ pDM_Odm->pChannel = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_DMSP_GET_VALUE: ++ pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_BUDDY_ADAPTOR: ++ pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue; ++ break; ++ ++ case ODM_CMNINFO_DMSP_IS_MASTER: ++ pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_SCAN: ++ pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_POWER_SAVING: ++ pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_ONE_PATH_CCA: ++ pDM_Odm->pOnePathCCA = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_DRV_STOP: ++ pDM_Odm->pbDriverStopped = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_PNP_IN: ++ pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_INIT_ON: ++ pDM_Odm->pinit_adpt_in_progress = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_ANT_TEST: ++ pDM_Odm->pAntennaTest = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_NET_CLOSED: ++ pDM_Odm->pbNet_closed = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_FORCED_RATE: ++ pDM_Odm->pForcedDataRate = (pu2Byte)pValue; ++ break; ++ ++ case ODM_CMNINFO_FORCED_IGI_LB: ++ pDM_Odm->pu1ForcedIgiLb = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_P2P_LINK: ++ pDM_Odm->DM_DigTable.bP2PInProcess = (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_IS1ANTENNA: ++ pDM_Odm->pIs1Antenna = (BOOLEAN *)pValue; ++ break; ++ ++ case ODM_CMNINFO_RFDEFAULTPATH: ++ pDM_Odm->pRFDefaultPath= (u1Byte *)pValue; ++ break; ++ ++ case ODM_CMNINFO_FCS_MODE: ++ pDM_Odm->pIsFcsModeEnable = (BOOLEAN *)pValue; ++ break; ++ /*add by YuChen for beamforming PhyDM*/ ++ case ODM_CMNINFO_HUBUSBMODE: ++ pDM_Odm->HubUsbMode = (u1Byte *)pValue; ++ break; ++ case ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS: ++ pDM_Odm->pbFwDwRsvdPageInProgress = (BOOLEAN *)pValue; ++ break; ++ case ODM_CMNINFO_TX_TP: ++ pDM_Odm->pCurrentTxTP = (u4Byte *)pValue; ++ break; ++ case ODM_CMNINFO_RX_TP: ++ pDM_Odm->pCurrentRxTP = (u4Byte *)pValue; ++ break; ++ case ODM_CMNINFO_SOUNDING_SEQ: ++ pDM_Odm->pSoundingSeq = (u1Byte *)pValue; ++ break; ++ //case ODM_CMNINFO_RTSTA_AID: ++ // pDM_Odm->pAidMap = (u1Byte *)pValue; ++ // break; ++ ++ //case ODM_CMNINFO_BT_COEXIST: ++ // pDM_Odm->BTCoexist = (BOOLEAN *)pValue; ++ ++ //case ODM_CMNINFO_STA_STATUS: ++ //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue; ++ //break; ++ ++ //case ODM_CMNINFO_PHY_STATUS: ++ // pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue; ++ // break; ++ ++ //case ODM_CMNINFO_MAC_STATUS: ++ // pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue; ++ // break; ++ //To remove the compiler warning, must add an empty default statement to handle the other values. ++ default: ++ //do nothing ++ break; ++ ++ } ++ ++} ++ ++ ++VOID ++ODM_CmnInfoPtrArrayHook( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN u2Byte Index, ++ IN PVOID pValue ++ ) ++{ ++ // ++ // Hook call by reference pointer. ++ // ++ switch (CmnInfo) ++ { ++ // ++ // Dynamic call by reference pointer. ++ // ++ case ODM_CMNINFO_STA_STATUS: ++ pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue; ++ ++ if (IS_STA_VALID(pDM_Odm->pODM_StaInfo[Index])) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->AssociatedMacId] = Index; /*AssociatedMacId are unique bttween different Adapter*/ ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->aid] = Index; ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->mac_id] = Index; ++ #endif ++ ++ break; ++ //To remove the compiler warning, must add an empty default statement to handle the other values. ++ default: ++ //do nothing ++ break; ++ } ++ ++} ++ ++ ++// ++// Update Band/CHannel/.. The values are dynamic but non-per-packet. ++// ++VOID ++ODM_CmnInfoUpdate( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte CmnInfo, ++ IN u8Byte Value ++ ) ++{ ++ // ++ // This init variable may be changed in run time. ++ // ++ switch (CmnInfo) ++ { ++ case ODM_CMNINFO_LINK_IN_PROGRESS: ++ pDM_Odm->bLinkInProcess = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_ABILITY: ++ pDM_Odm->SupportAbility = (u4Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_RF_TYPE: ++ pDM_Odm->RFType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_WIFI_DIRECT: ++ pDM_Odm->bWIFI_Direct = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_WIFI_DISPLAY: ++ pDM_Odm->bWIFI_Display = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_LINK: ++ pDM_Odm->bLinked = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_STATION_STATE: ++ pDM_Odm->bsta_state = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_RSSI_MIN: ++ pDM_Odm->RSSI_Min= (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_DBG_COMP: ++ pDM_Odm->DebugComponents = Value; ++ break; ++ ++ case ODM_CMNINFO_DBG_LEVEL: ++ pDM_Odm->DebugLevel = (u4Byte)Value; ++ break; ++ case ODM_CMNINFO_RA_THRESHOLD_HIGH: ++ pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_RA_THRESHOLD_LOW: ++ pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value; ++ break; ++#if defined(BT_SUPPORT) && (BT_SUPPORT == 1) ++ // The following is for BT HS mode and BT coexist mechanism. ++ case ODM_CMNINFO_BT_ENABLED: ++ pDM_Odm->bBtEnabled = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_HS_CONNECT_PROCESS: ++ pDM_Odm->bBtConnectProcess = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_HS_RSSI: ++ pDM_Odm->btHsRssi = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_OPERATION: ++ pDM_Odm->bBtHsOperation = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_LIMITED_DIG: ++ pDM_Odm->bBtLimitedDig = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_DIG: ++ pDM_Odm->btHsDigVal = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_BUSY: ++ pDM_Odm->bBtBusy = (BOOLEAN)Value; ++ break; ++ ++ case ODM_CMNINFO_BT_DISABLE_EDCA: ++ pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value; ++ break; ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23 ++#ifdef UNIVERSAL_REPEATER ++ case ODM_CMNINFO_VXD_LINK: ++ pDM_Odm->VXD_bLinked= (BOOLEAN)Value; ++ break; ++#endif ++#endif ++ ++ case ODM_CMNINFO_AP_TOTAL_NUM: ++ pDM_Odm->APTotalNum = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_POWER_TRAINING: ++ pDM_Odm->bDisablePowerTraining = (BOOLEAN)Value; ++ break; ++ ++/* ++ case ODM_CMNINFO_OP_MODE: ++ pDM_Odm->OPMode = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_WM_MODE: ++ pDM_Odm->WirelessMode = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_BAND: ++ pDM_Odm->BandType = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_SEC_CHNL_OFFSET: ++ pDM_Odm->SecChOffset = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_SEC_MODE: ++ pDM_Odm->Security = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_BW: ++ pDM_Odm->BandWidth = (u1Byte)Value; ++ break; ++ ++ case ODM_CMNINFO_CHNL: ++ pDM_Odm->Channel = (u1Byte)Value; ++ break; ++*/ ++ default: ++ //do nothing ++ break; ++ } ++ ++ ++} ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ) ++{ ++ ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++#if USE_WORKITEM ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ODM_InitializeWorkItem( pDM_Odm, ++ &pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchWorkitem, ++ (RT_WORKITEM_CALL_BACK)ODM_SW_AntDiv_WorkitemCallback, ++ (PVOID)pAdapter, ++ "AntennaSwitchWorkitem"); ++ #endif ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ ODM_InitializeWorkItem(pDM_Odm, ++ &pDM_Odm->dm_sat_table.hl_smart_antenna_workitem, ++ (RT_WORKITEM_CALL_BACK)phydm_beam_switch_workitem_callback, ++ (PVOID)pAdapter, ++ "hl_smart_ant_workitem"); ++ ++ ODM_InitializeWorkItem(pDM_Odm, ++ &pDM_Odm->dm_sat_table.hl_smart_antenna_decision_workitem, ++ (RT_WORKITEM_CALL_BACK)phydm_beam_decision_workitem_callback, ++ (PVOID)pAdapter, ++ "hl_smart_ant_decision_workitem"); ++ #endif ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->PathDivSwitchWorkitem), ++ (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback, ++ (PVOID)pAdapter, ++ "SWAS_WorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->CCKPathDiversityWorkitem), ++ (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback, ++ (PVOID)pAdapter, ++ "CCKTXPathDiversityWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->MPT_DIGWorkitem), ++ (RT_WORKITEM_CALL_BACK)odm_MPT_DIGWorkItemCallback, ++ (PVOID)pAdapter, ++ "MPT_DIGWorkitem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->RaRptWorkitem), ++ (RT_WORKITEM_CALL_BACK)ODM_UpdateInitRateWorkItemCallback, ++ (PVOID)pAdapter, ++ "RaRptWorkitem"); ++ ++#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->FastAntTrainingWorkitem), ++ (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback, ++ (PVOID)pAdapter, ++ "FastAntTrainingWorkitem"); ++#endif ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem), ++ (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback, ++ (PVOID)pAdapter, ++ "PSDRXHP_WorkItem"); ++ ++#endif /*#if USE_WORKITEM*/ ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_EnterWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_EnterWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_LeaveWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_LeaveWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_FwNdpaWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_FwNdpaWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_ClkWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_ClkWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_RateWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_RateWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_StatusWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_StatusWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_ResetTxPathWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_ResetTxPathWorkItem"); ++ ++ ODM_InitializeWorkItem( ++ pDM_Odm, ++ &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem), ++ (RT_WORKITEM_CALL_BACK)halComTxbf_GetTxRateWorkItemCallback, ++ (PVOID)pAdapter, ++ "Txbf_GetTxRateWorkItem"); ++#endif ++} ++ ++VOID ++ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ) ++{ ++#if USE_WORKITEM ++ ++#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ODM_FreeWorkItem(&(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchWorkitem)); ++#endif ++ ++#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ ODM_FreeWorkItem(&(pDM_Odm->dm_sat_table.hl_smart_antenna_workitem)); ++ ODM_FreeWorkItem(&(pDM_Odm->dm_sat_table.hl_smart_antenna_decision_workitem)); ++#endif ++ ++ ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem)); ++ ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem)); ++#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) ++ ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem)); ++#endif ++ ODM_FreeWorkItem(&(pDM_Odm->MPT_DIGWorkitem)); ++ ODM_FreeWorkItem(&(pDM_Odm->RaRptWorkitem)); ++ ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem)); ++ /*ODM_FreeWorkItem((&pDM_Odm->sbdcnt_workitem));*/ ++#endif ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem)); ++ ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem)); ++#endif ++ ++} ++#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ ++ ++/* ++VOID ++odm_FindMinimumRSSI( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ u4Byte i; ++ u1Byte RSSI_Min = 0xFF; ++ ++ for(i=0; ipODM_StaInfo[i] != NULL) ++ if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) ) ++ { ++ if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min) ++ { ++ RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave; ++ } ++ } ++ } ++ ++ pDM_Odm->RSSI_Min = RSSI_Min; ++ ++} ++ ++VOID ++odm_IsLinked( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ u4Byte i; ++ BOOLEAN Linked = FALSE; ++ ++ for(i=0; ipODM_StaInfo[i]) ) ++ { ++ Linked = TRUE; ++ break; ++ } ++ ++ } ++ ++ pDM_Odm->bLinked = Linked; ++} ++*/ ++ ++VOID ++ODM_InitAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_AntDivTimers(pDM_Odm,INIT_ANTDIV_TIMMER); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++#ifdef MP_TEST ++ if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific) ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, ++ (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer"); ++#endif ++#elif(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, ++ (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer"); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer, ++ (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer"); ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer, ++ (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer"); ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, ++ (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer"); ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer, ++ (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer"); ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer, ++ (RT_TIMER_CALL_BACK)phydm_sbd_callback, NULL, "SbdTimer"); ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer, ++ (RT_TIMER_CALL_BACK)halComTxbf_FwNdpaTimerCallback, NULL, "Txbf_FwNdpaTimer"); ++#endif ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer, ++ (RT_TIMER_CALL_BACK)Beamforming_SWTimerCallback, NULL, "BeamformingTimer"); ++#endif ++#endif ++} ++ ++VOID ++ODM_CancelAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ // ++ // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in ++ // win7 platform. ++ // ++ HAL_ADAPTER_STS_CHK(pDM_Odm) ++#endif ++ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_AntDivTimers(pDM_Odm,CANCEL_ANTDIV_TIMMER); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++#ifdef MP_TEST ++ if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific) ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++#endif ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer); ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer); ++#endif ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer); ++#endif ++#endif ++ ++} ++ ++ ++VOID ++ODM_ReleaseAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_AntDivTimers(pDM_Odm,RELEASE_ANTDIV_TIMMER); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #ifdef MP_TEST ++ if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific) ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++ #endif ++#elif(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer); ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer); ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer); ++#endif ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++#if (BEAMFORMING_SUPPORT == 1) ++ ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer); ++#endif ++#endif ++} ++ ++ ++//3============================================================ ++//3 Tx Power Tracking ++//3============================================================ ++ ++ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++VOID ++ODM_InitAllThreads( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ #ifdef TPT_THREAD ++ kTPT_task_init(pDM_Odm->priv); ++ #endif ++} ++ ++VOID ++ODM_StopAllThreads( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ #ifdef TPT_THREAD ++ kTPT_task_stop(pDM_Odm->priv); ++ #endif ++} ++#endif ++ ++ ++#if( DM_ODM_SUPPORT_TYPE == ODM_WIN) ++// ++// 2011/07/26 MH Add an API for testing IQK fail case. ++// ++BOOLEAN ++ODM_CheckPowerStatus( ++ IN PADAPTER Adapter) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ RT_RF_POWER_STATE rtState; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ ++ // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. ++ if (pMgntInfo->init_adpt_in_progress == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter\n")); ++ return TRUE; ++ } ++ ++ // ++ // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. ++ // ++ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); ++ if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", ++ Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); ++ return FALSE; ++ } ++ return TRUE; ++} ++#elif( DM_ODM_SUPPORT_TYPE == ODM_AP) ++BOOLEAN ++ODM_CheckPowerStatus( ++ IN PADAPTER Adapter) ++{ ++ /* ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ RT_RF_POWER_STATE rtState; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ ++ // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. ++ if (pMgntInfo->init_adpt_in_progress == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); ++ return TRUE; ++ } ++ ++ // ++ // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. ++ // ++ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); ++ if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", ++ Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); ++ return FALSE; ++ } ++ */ ++ return TRUE; ++} ++#endif ++ ++// need to ODM CE Platform ++//move to here for ANT detection mechanism using ++ ++#if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) ++u4Byte ++GetPSDData( ++ IN PDM_ODM_T pDM_Odm, ++ unsigned int point, ++ u1Byte initial_gain_psd) ++{ ++ //unsigned int val, rfval; ++ //int psd_report; ++ u4Byte psd_report; ++ ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //Debug Message ++ //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord); ++ //DbgPrint("Reg908 = 0x%x\n",val); ++ //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord); ++ //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask); ++ //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval); ++ //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n", ++ //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval); ++ ++ //Set DCO frequency index, offset=(40MHz/SamplePts)*point ++ ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); ++ ++ //Start PSD calculation, Reg808[22]=0->1 ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); ++ //Need to wait for HW PSD report ++ ODM_StallExecution(1000); ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0); ++ //Read PSD report, Reg8B4[15:0] ++ psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF; ++ ++#if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX)) ++ psd_report = (u4Byte) (odm_ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c); ++#else ++ psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c); ++#endif ++ ++ return psd_report; ++ ++} ++#endif ++ ++u4Byte ++odm_ConvertTo_dB( ++ u4Byte Value) ++{ ++ u1Byte i; ++ u1Byte j; ++ u4Byte dB; ++ ++ Value = Value & 0xFFFF; ++ ++ for (i = 0; i < 12; i++) ++ { ++ if (Value <= dB_Invert_Table[i][7]) ++ { ++ break; ++ } ++ } ++ ++ if (i >= 12) ++ { ++ return (96); // maximum 96 dB ++ } ++ ++ for (j = 0; j < 8; j++) ++ { ++ if (Value <= dB_Invert_Table[i][j]) ++ { ++ break; ++ } ++ } ++ ++ dB = (i << 3) + j + 1; ++ ++ return (dB); ++} ++ ++u4Byte ++odm_ConvertTo_linear( ++ u4Byte Value) ++{ ++ u1Byte i; ++ u1Byte j; ++ u4Byte linear; ++ ++ /* 1dB~96dB */ ++ ++ Value = Value & 0xFF; ++ ++ i = (u1Byte)((Value - 1) >> 3); ++ j = (u1Byte)(Value - 1) - (i << 3); ++ ++ linear = dB_Invert_Table[i][j]; ++ ++ return (linear); ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++ODM_UpdateInitRateWorkItemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER Adapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ u1Byte p = 0; ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) //DOn't know how to include &c ++ { ++ ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0); ++ } ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) //DOn't know how to include &c ++ { ++ ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0); ++ } ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++ } ++} ++#endif ++ ++// ++// ODM multi-port consideration, added by Roger, 2013.10.01. ++// ++VOID ++ODM_AsocEntry_Init( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER pLoopAdapter = GetDefaultAdapter(pDM_Odm->Adapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pLoopAdapter); ++ PDM_ODM_T pDM_OutSrc = &pHalData->DM_OutSrc; ++ u1Byte TotalAssocEntryNum = 0; ++ u1Byte index = 0; ++ ++ ++ ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, 0, &pLoopAdapter->MgntInfo.DefaultPort[0]); ++ pLoopAdapter->MgntInfo.DefaultPort[0].MultiPortStationIdx = TotalAssocEntryNum; ++ ++ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); ++ TotalAssocEntryNum +=1; ++ ++ while(pLoopAdapter) ++ { ++ for (index = 0; index MgntInfo.AsocEntry[index]); ++ pLoopAdapter->MgntInfo.AsocEntry[index].MultiPortStationIdx = TotalAssocEntryNum+index; ++ } ++ ++ TotalAssocEntryNum+= index; ++ if(IS_HARDWARE_TYPE_8188E((pDM_Odm->Adapter))) ++ pLoopAdapter->RASupport = TRUE; ++ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); ++ } ++#endif ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++/* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */ ++void odm_dtc(PDM_ODM_T pDM_Odm) ++{ ++#ifdef CONFIG_DM_RESP_TXAGC ++ #define DTC_BASE 35 /* RSSI higher than this value, start to decade TX power */ ++ #define DTC_DWN_BASE (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */ ++ ++ /* RSSI vs TX power step mapping: decade TX power */ ++ static const u8 dtc_table_down[]={ ++ DTC_BASE, ++ (DTC_BASE+5), ++ (DTC_BASE+10), ++ (DTC_BASE+15), ++ (DTC_BASE+20), ++ (DTC_BASE+25) ++ }; ++ ++ /* RSSI vs TX power step mapping: increase TX power */ ++ static const u8 dtc_table_up[]={ ++ DTC_DWN_BASE, ++ (DTC_DWN_BASE-5), ++ (DTC_DWN_BASE-10), ++ (DTC_DWN_BASE-15), ++ (DTC_DWN_BASE-15), ++ (DTC_DWN_BASE-20), ++ (DTC_DWN_BASE-20), ++ (DTC_DWN_BASE-25), ++ (DTC_DWN_BASE-25), ++ (DTC_DWN_BASE-30), ++ (DTC_DWN_BASE-35) ++ }; ++ ++ u8 i; ++ u8 dtc_steps=0; ++ u8 sign; ++ u8 resp_txagc=0; ++ ++ #if 0 ++ /* As DIG is disabled, DTC is also disable */ ++ if(!(pDM_Odm->SupportAbility & ODM_XXXXXX)) ++ return; ++ #endif ++ ++ if (DTC_BASE < pDM_Odm->RSSI_Min) { ++ /* need to decade the CTS TX power */ ++ sign = 1; ++ for (i=0;i= pDM_Odm->RSSI_Min) || (dtc_steps >= 6)) ++ break; ++ else ++ dtc_steps++; ++ } ++ } ++#if 0 ++ else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min) ++ { ++ /* needs to increase the CTS TX power */ ++ sign = 0; ++ dtc_steps = 1; ++ for (i=0;iRSSI_Min) || (dtc_steps>=10)) ++ break; ++ else ++ dtc_steps++; ++ } ++ } ++#endif ++ else ++ { ++ sign = 0; ++ dtc_steps = 0; ++ } ++ ++ resp_txagc = dtc_steps | (sign << 4); ++ resp_txagc = resp_txagc | (resp_txagc << 5); ++ ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc); ++ ++ DBG_871X("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n", ++ __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps); ++#endif /* CONFIG_RESP_TXAGC_ADJUST */ ++} ++ ++#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ ++ ++VOID ++odm_UpdatePowerTrainingState( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PHYDM_FALSEALMCNT); ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ u4Byte score = 0; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN)) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState()============>\n")); ++ pDM_Odm->bChangeState = FALSE; ++ ++ // Debug command ++ if(pDM_Odm->ForcePowerTrainingState) ++ { ++ if(pDM_Odm->ForcePowerTrainingState == 1 && !pDM_Odm->bDisablePowerTraining) ++ { ++ pDM_Odm->bChangeState = TRUE; ++ pDM_Odm->bDisablePowerTraining = TRUE; ++ } ++ else if(pDM_Odm->ForcePowerTrainingState == 2 && pDM_Odm->bDisablePowerTraining) ++ { ++ pDM_Odm->bChangeState = TRUE; ++ pDM_Odm->bDisablePowerTraining = FALSE; ++ } ++ ++ pDM_Odm->PT_score = 0; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): ForcePowerTrainingState = %d\n", ++ pDM_Odm->ForcePowerTrainingState)); ++ return; ++ } ++ ++ if(!pDM_Odm->bLinked) ++ return; ++ ++ // First connect ++ if((pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE)) ++ { ++ pDM_Odm->PT_score = 0; ++ pDM_Odm->bChangeState = TRUE; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): First Connect\n")); ++ return; ++ } ++ ++ // Compute score ++ if(pDM_Odm->NHM_cnt_0 >= 215) ++ score = 2; ++ else if(pDM_Odm->NHM_cnt_0 >= 190) ++ score = 1; // unknow state ++ else ++ { ++ u4Byte RX_Pkt_Cnt; ++ ++ RX_Pkt_Cnt = (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM) + (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK); ++ ++ if((FalseAlmCnt->Cnt_CCA_all > 31 && RX_Pkt_Cnt > 31) && (FalseAlmCnt->Cnt_CCA_all >= RX_Pkt_Cnt)) ++ { ++ if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 1)) <= FalseAlmCnt->Cnt_CCA_all) ++ score = 0; ++ else if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 2)) <= FalseAlmCnt->Cnt_CCA_all) ++ score = 1; ++ else ++ score = 2; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): RX_Pkt_Cnt = %d, Cnt_CCA_all = %d\n", ++ RX_Pkt_Cnt, FalseAlmCnt->Cnt_CCA_all)); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NumQryPhyStatusOFDM = %d, NumQryPhyStatusCCK = %d\n", ++ (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM), (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NHM_cnt_0 = %d, score = %d\n", ++ pDM_Odm->NHM_cnt_0, score)); ++ ++ // smoothing ++ pDM_Odm->PT_score = (score << 4) + (pDM_Odm->PT_score>>1) + (pDM_Odm->PT_score>>2); ++ score = (pDM_Odm->PT_score + 32) >> 6; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): PT_score = %d, score after smoothing = %d\n", ++ pDM_Odm->PT_score, score)); ++ ++ // Mode decision ++ if(score == 2) ++ { ++ if(pDM_Odm->bDisablePowerTraining) ++ { ++ pDM_Odm->bChangeState = TRUE; ++ pDM_Odm->bDisablePowerTraining = FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n")); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Enable Power Training\n")); ++ } ++ else if(score == 0) ++ { ++ if(!pDM_Odm->bDisablePowerTraining) ++ { ++ pDM_Odm->bChangeState = TRUE; ++ pDM_Odm->bDisablePowerTraining = TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n")); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Disable Power Training\n")); ++ } ++ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; ++#endif ++} ++ ++ ++ ++/*===========================================================*/ ++/* The following is for compile only*/ ++/*===========================================================*/ ++/*#define TARGET_CHNL_NUM_2G_5G 59*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++u1Byte GetRightChnlPlaceforIQK(u1Byte chnl) ++{ ++ u1Byte channel_all[TARGET_CHNL_NUM_2G_5G] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, ++ 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165}; ++ u1Byte place = chnl; ++ ++ ++ if (chnl > 14) { ++ for (place = 14; place < sizeof(channel_all); place++) { ++ if (channel_all[place] == chnl) ++ return place-13; ++ } ++ } ++ ++ return 0; ++} ++ ++VOID ++FillH2CCmd92C( ++ IN PADAPTER Adapter, ++ IN u1Byte ElementID, ++ IN u4Byte CmdLen, ++ IN pu1Byte pCmdBuffer ++) ++{} ++VOID ++PHY_SetTxPowerLevel8192C( ++ IN PADAPTER Adapter, ++ IN u1Byte channel ++ ) ++{ ++} ++#endif ++/*===========================================================*/ ++ ++VOID ++phydm_NoisyDetection( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ u4Byte Total_FA_Cnt, Total_CCA_Cnt; ++ u4Byte Score = 0, i, Score_Smooth; ++ ++ Total_CCA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_CCA_all; ++ Total_FA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_all; ++ ++/* ++ if( Total_FA_Cnt*16>=Total_CCA_Cnt*14 ) // 87.5 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*12 ) // 75 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*10 ) // 56.25 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*8 ) // 50 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*7 ) // 43.75 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*6 ) // 37.5 ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*5 ) // 31.25% ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*4 ) // 25% ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*3 ) // 18.75% ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*2 ) // 12.5% ++ ++ else if( Total_FA_Cnt*16>=Total_CCA_Cnt*1 ) // 6.25% ++*/ ++ for(i=0;i<=16;i++) ++ { ++ if( Total_FA_Cnt*16>=Total_CCA_Cnt*(16-i) ) ++ { ++ Score = 16-i; ++ break; ++ } ++ } ++ ++ // NoisyDecision_Smooth = NoisyDecision_Smooth>>1 + (Score<<3)>>1; ++ pDM_Odm->NoisyDecision_Smooth = (pDM_Odm->NoisyDecision_Smooth>>1) + (Score<<2); ++ ++ // Round the NoisyDecision_Smooth: +"3" comes from (2^3)/2-1 ++ Score_Smooth = (Total_CCA_Cnt>=300)?((pDM_Odm->NoisyDecision_Smooth+3)>>3):0; ++ ++ pDM_Odm->NoisyDecision = (Score_Smooth>=3)?1:0; ++/* ++ switch(Score_Smooth) ++ { ++ case 0: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=0%%\n")); ++ break; ++ case 1: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=6.25%%\n")); ++ break; ++ case 2: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=12.5%%\n")); ++ break; ++ case 3: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=18.75%%\n")); ++ break; ++ case 4: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=25%%\n")); ++ break; ++ case 5: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=31.25%%\n")); ++ break; ++ case 6: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=37.5%%\n")); ++ break; ++ case 7: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=43.75%%\n")); ++ break; ++ case 8: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=50%%\n")); ++ break; ++ case 9: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=56.25%%\n")); ++ break; ++ case 10: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=62.5%%\n")); ++ break; ++ case 11: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=68.75%%\n")); ++ break; ++ case 12: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=75%%\n")); ++ break; ++ case 13: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=81.25%%\n")); ++ break; ++ case 14: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=87.5%%\n")); ++ break; ++ case 15: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=93.75%%\n")); ++ break; ++ case 16: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=100%%\n")); ++ break; ++ default: ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("[NoisyDetection] Unknown Value!! Need Check!!\n")); ++ } ++*/ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ++ ("[NoisyDetection] Total_CCA_Cnt=%d, Total_FA_Cnt=%d, NoisyDecision_Smooth=%d, Score=%d, Score_Smooth=%d, pDM_Odm->NoisyDecision=%d\n", ++ Total_CCA_Cnt, Total_FA_Cnt, pDM_Odm->NoisyDecision_Smooth, Score, Score_Smooth, pDM_Odm->NoisyDecision)); ++ ++} ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm.h +new file mode 100644 +index 0000000..0d13d8e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm.h +@@ -0,0 +1,1448 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __HALDMOUTSRC_H__ ++#define __HALDMOUTSRC_H__ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "phydm_pre_define.h" ++#include "phydm_dig.h" ++#include "phydm_edcaturbocheck.h" ++#include "phydm_pathdiv.h" ++#include "phydm_antdiv.h" ++#include "phydm_antdect.h" ++#include "phydm_dynamicbbpowersaving.h" ++#include "phydm_rainfo.h" ++#include "phydm_dynamictxpower.h" ++#include "phydm_cfotracking.h" ++#include "phydm_acs.h" ++#include "phydm_adaptivity.h" ++ ++ ++#if (RTL8814A_SUPPORT == 1) ++#include "rtl8814a/phydm_iqk_8814a.h" ++#endif ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#include "halphyrf_ap.h" ++#include "phydm_powertracking_ap.h" ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++#include "phydm_beamforming.h" ++#include "phydm_noisemonitor.h" ++#include "halphyrf_ce.h" ++#include "phydm_powertracking_ce.h" ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++#include "phydm_beamforming.h" ++#include "phydm_rxhp.h" ++#include "halphyrf_win.h" ++#include "phydm_powertracking_win.h" ++#endif ++ ++//============================================================ ++// Definition ++//============================================================ ++// ++// 2011/09/22 MH Define all team supprt ability. ++// ++ ++// ++// 2011/09/22 MH Define for all teams. Please Define the constan in your precomp header. ++// ++//#define DM_ODM_SUPPORT_AP 0 ++//#define DM_ODM_SUPPORT_ADSL 0 ++//#define DM_ODM_SUPPORT_CE 0 ++//#define DM_ODM_SUPPORT_MP 1 ++ ++// ++// 2011/09/28 MH Define ODM SW team support flag. ++// ++ ++//For SW AntDiv, PathDiv, 8192C AntDiv joint use ++#define TP_MODE 0 ++#define RSSI_MODE 1 ++ ++#define TRAFFIC_LOW 0 ++#define TRAFFIC_HIGH 1 ++#define TRAFFIC_ULTRA_LOW 2 ++#define TRAFFIC_MID 3 ++ ++ ++#define NONE 0 ++ ++ ++ ++ ++//8723A High Power IGI Setting ++#define DM_DIG_HIGH_PWR_IGI_LOWER_BOUND 0x22 ++#define DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND 0x28 ++#define DM_DIG_HIGH_PWR_THRESHOLD 0x3a ++#define DM_DIG_LOW_PWR_THRESHOLD 0x14 ++ ++ ++//============================================================ ++// structure and define ++//============================================================ ++ ++// ++// 2011/09/20 MH Add for AP/ADSLpseudo DM structuer requirement. ++// We need to remove to other position??? ++// ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++typedef struct rtl8192cd_priv { ++ u1Byte temp; ++ ++}rtl8192cd_priv, *prtl8192cd_priv; ++#endif ++ ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++typedef struct _ADAPTER{ ++ u1Byte temp; ++ #ifdef AP_BUILD_WORKAROUND ++ HAL_DATA_TYPE* temp2; ++ prtl8192cd_priv priv; ++ #endif ++}ADAPTER, *PADAPTER; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++typedef struct _WLAN_STA{ ++ u1Byte temp; ++} WLAN_STA, *PRT_WLAN_STA; ++ ++#endif ++ ++typedef struct _Dynamic_Primary_CCA{ ++ u1Byte PriCCA_flag; ++ u1Byte intf_flag; ++ u1Byte intf_type; ++ u1Byte DupRTS_flag; ++ u1Byte Monitor_flag; ++ u1Byte CH_offset; ++ u1Byte MF_state; ++}Pri_CCA_T, *pPri_CCA_T; ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ ++#ifdef ADSL_AP_BUILD_WORKAROUND ++#define MAX_TOLERANCE 5 ++#define IQK_DELAY_TIME 1 //ms ++#endif ++#if 0//defined in 8192cd.h ++// ++// Indicate different AP vendor for IOT issue. ++// ++typedef enum _HT_IOT_PEER ++{ ++ HT_IOT_PEER_UNKNOWN = 0, ++ HT_IOT_PEER_REALTEK = 1, ++ HT_IOT_PEER_REALTEK_92SE = 2, ++ HT_IOT_PEER_BROADCOM = 3, ++ HT_IOT_PEER_RALINK = 4, ++ HT_IOT_PEER_ATHEROS = 5, ++ HT_IOT_PEER_CISCO = 6, ++ HT_IOT_PEER_MERU = 7, ++ HT_IOT_PEER_MARVELL = 8, ++ HT_IOT_PEER_REALTEK_SOFTAP = 9,// peer is RealTek SOFT_AP, by Bohn, 2009.12.17 ++ HT_IOT_PEER_SELF_SOFTAP = 10, // Self is SoftAP ++ HT_IOT_PEER_AIRGO = 11, ++ HT_IOT_PEER_INTEL = 12, ++ HT_IOT_PEER_RTK_APCLIENT = 13, ++ HT_IOT_PEER_REALTEK_81XX = 14, ++ HT_IOT_PEER_REALTEK_WOW = 15, ++ HT_IOT_PEER_MAX = 16 ++}HT_IOT_PEER_E, *PHTIOT_PEER_E; ++#endif ++#endif//#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#define DM_Type_ByFW 0 ++#define DM_Type_ByDriver 1 ++ ++// ++// Declare for common info ++// ++ ++#define IQK_THRESHOLD 8 ++#define DPK_THRESHOLD 4 ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++__PACK typedef struct _ODM_Phy_Status_Info_ ++{ ++ u1Byte RxPWDBAll; ++ u1Byte SignalQuality; /* in 0-100 index. */ ++ u1Byte RxMIMOSignalStrength[4]; /* in 0~100 index */ ++ s1Byte RxMIMOSignalQuality[4]; /* EVM */ ++ s1Byte RxSNR[4]; /* per-path's SNR */ ++#if (RTL8822B_SUPPORT == 1) ++ u1Byte RxCount; /* RX path counter---*/ ++#endif ++ u1Byte BandWidth; ++ ++} __WLAN_ATTRIB_PACK__ ODM_PHY_INFO_T, *PODM_PHY_INFO_T; ++ ++typedef struct _ODM_Phy_Status_Info_Append_ ++{ ++ u1Byte MAC_CRC32; ++ ++}ODM_PHY_INFO_Append_T,*PODM_PHY_INFO_Append_T; ++ ++#else ++ ++typedef struct _ODM_Phy_Status_Info_ ++{ ++ // ++ // Be care, if you want to add any element please insert between ++ // RxPWDBAll & SignalStrength. ++ // ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ u4Byte RxPWDBAll; ++#else ++ u1Byte RxPWDBAll; ++#endif ++ u1Byte SignalQuality; /* in 0-100 index. */ ++ s1Byte RxMIMOSignalQuality[4]; /* per-path's EVM */ ++ u1Byte RxMIMOEVMdbm[4]; /* per-path's EVM dbm */ ++ u1Byte RxMIMOSignalStrength[4]; /* in 0~100 index */ ++ s2Byte Cfo_short[4]; /* per-path's Cfo_short */ ++ s2Byte Cfo_tail[4]; /* per-path's Cfo_tail */ ++ s1Byte RxPower; /* in dBm Translate from PWdB */ ++ s1Byte RecvSignalPower; /* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */ ++ u1Byte BTRxRSSIPercentage; ++ u1Byte SignalStrength; /* in 0-100 index. */ ++ s1Byte RxPwr[4]; /* per-path's pwdb */ ++ s1Byte RxSNR[4]; /* per-path's SNR */ ++#if (RTL8822B_SUPPORT == 1) ++ u1Byte RxCount:2; /* RX path counter---*/ ++ u1Byte BandWidth:2; ++ u1Byte rxsc:4; /* sub-channel---*/ ++#else ++ u1Byte BandWidth; ++#endif ++ u1Byte btCoexPwrAdjust; ++#if (RTL8822B_SUPPORT == 1) ++ u1Byte channel; /* channel number---*/ ++ BOOLEAN bMuPacket; /* is MU packet or not---*/ ++ BOOLEAN bBeamformed; /* BF packet---*/ ++#endif ++}ODM_PHY_INFO_T,*PODM_PHY_INFO_T; ++#endif ++ ++typedef struct _ODM_Per_Pkt_Info_ ++{ ++ //u1Byte Rate; ++ u1Byte DataRate; ++ u1Byte StationID; ++ BOOLEAN bPacketMatchBSSID; ++ BOOLEAN bPacketToSelf; ++ BOOLEAN bPacketBeacon; ++ BOOLEAN bToSelf; ++}ODM_PACKET_INFO_T,*PODM_PACKET_INFO_T; ++ ++ ++typedef struct _ODM_Phy_Dbg_Info_ ++{ ++ //ODM Write,debug info ++ s1Byte RxSNRdB[4]; ++ u4Byte NumQryPhyStatus; ++ u4Byte NumQryPhyStatusCCK; ++ u4Byte NumQryPhyStatusOFDM; ++#if (RTL8822B_SUPPORT == 1) ++ u4Byte NumQryMuPkt; ++ u4Byte NumQryBfPkt; ++#endif ++ u1Byte NumQryBeaconPkt; ++ //Others ++ s4Byte RxEVM[4]; ++ ++}ODM_PHY_DBG_INFO_T; ++ ++ ++typedef struct _ODM_Mac_Status_Info_ ++{ ++ u1Byte test; ++ ++}ODM_MAC_INFO; ++ ++// ++// 2011/20/20 MH For MP driver RT_WLAN_STA = STA_INFO_T ++// Please declare below ODM relative info in your STA info structure. ++// ++#if 1 ++typedef struct _ODM_STA_INFO{ ++ // Driver Write ++ BOOLEAN bUsed; // record the sta status link or not? ++ //u1Byte WirelessMode; // ++ u1Byte IOTPeer; // Enum value. HT_IOT_PEER_E ++ ++ // ODM Write ++ //1 PHY_STATUS_INFO ++ u1Byte RSSI_Path[4]; // ++ u1Byte RSSI_Ave; ++ u1Byte RXEVM[4]; ++ u1Byte RXSNR[4]; ++ ++ // ODM Write ++ //1 TX_INFO (may changed by IC) ++ //TX_INFO_T pTxInfo; // Define in IC folder. Move lower layer. ++#if 0 ++ u1Byte ANTSEL_A; //in Jagar: 4bit; others: 2bit ++ u1Byte ANTSEL_B; //in Jagar: 4bit; others: 2bit ++ u1Byte ANTSEL_C; //only in Jagar: 4bit ++ u1Byte ANTSEL_D; //only in Jagar: 4bit ++ u1Byte TX_ANTL; //not in Jagar: 2bit ++ u1Byte TX_ANT_HT; //not in Jagar: 2bit ++ u1Byte TX_ANT_CCK; //not in Jagar: 2bit ++ u1Byte TXAGC_A; //not in Jagar: 4bit ++ u1Byte TXAGC_B; //not in Jagar: 4bit ++ u1Byte TXPWR_OFFSET; //only in Jagar: 3bit ++ u1Byte TX_ANT; //only in Jagar: 4bit for TX_ANTL/TX_ANTHT/TX_ANT_CCK ++#endif ++ ++ // ++ // Please use compile flag to disabe the strcutrue for other IC except 88E. ++ // Move To lower layer. ++ // ++ // ODM Write Wilson will handle this part(said by Luke.Lee) ++ //TX_RPT_T pTxRpt; // Define in IC folder. Move lower layer. ++#if 0 ++ //1 For 88E RA (don't redefine the naming) ++ u1Byte rate_id; ++ u1Byte rate_SGI; ++ u1Byte rssi_sta_ra; ++ u1Byte SGI_enable; ++ u1Byte Decision_rate; ++ u1Byte Pre_rate; ++ u1Byte Active; ++ ++ // Driver write Wilson handle. ++ //1 TX_RPT (don't redefine the naming) ++ u2Byte RTY[4]; // ??? ++ u2Byte TOTAL; // ??? ++ u2Byte DROP; // ??? ++ // ++ // Please use compile flag to disabe the strcutrue for other IC except 88E. ++ // ++#endif ++ ++}ODM_STA_INFO_T, *PODM_STA_INFO_T; ++#endif ++ ++// ++// 2011/10/20 MH Define Common info enum for all team. ++// ++typedef enum _ODM_Common_Info_Definition ++{ ++//-------------REMOVED CASE-----------// ++ //ODM_CMNINFO_CCK_HP, ++ //ODM_CMNINFO_RFPATH_ENABLE, // Define as ODM write??? ++ //ODM_CMNINFO_BT_COEXIST, // ODM_BT_COEXIST_E ++ //ODM_CMNINFO_OP_MODE, // ODM_OPERATION_MODE_E ++//-------------REMOVED CASE-----------// ++ ++ // ++ // Fixed value: ++ // ++ ++ //-----------HOOK BEFORE REG INIT-----------// ++ ODM_CMNINFO_PLATFORM = 0, ++ ODM_CMNINFO_ABILITY, // ODM_ABILITY_E ++ ODM_CMNINFO_INTERFACE, // ODM_INTERFACE_E ++ ODM_CMNINFO_MP_TEST_CHIP, ++ ODM_CMNINFO_IC_TYPE, // ODM_IC_TYPE_E ++ ODM_CMNINFO_CUT_VER, // ODM_CUT_VERSION_E ++ ODM_CMNINFO_FAB_VER, // ODM_FAB_E ++ ODM_CMNINFO_RF_TYPE, // ODM_RF_PATH_E or ODM_RF_TYPE_E? ++ ODM_CMNINFO_RFE_TYPE, ++ ODM_CMNINFO_BOARD_TYPE, // ODM_BOARD_TYPE_E ++ ODM_CMNINFO_PACKAGE_TYPE, ++ ODM_CMNINFO_EXT_LNA, // TRUE ++ ODM_CMNINFO_5G_EXT_LNA, ++ ODM_CMNINFO_EXT_PA, ++ ODM_CMNINFO_5G_EXT_PA, ++ ODM_CMNINFO_GPA, ++ ODM_CMNINFO_APA, ++ ODM_CMNINFO_GLNA, ++ ODM_CMNINFO_ALNA, ++ ODM_CMNINFO_EXT_TRSW, ++ ODM_CMNINFO_EXT_LNA_GAIN, ++ ODM_CMNINFO_PATCH_ID, //CUSTOMER ID ++ ODM_CMNINFO_BINHCT_TEST, ++ ODM_CMNINFO_BWIFI_TEST, ++ ODM_CMNINFO_SMART_CONCURRENT, ++ ODM_CMNINFO_CONFIG_BB_RF, ++ ODM_CMNINFO_DOMAIN_CODE_2G, ++ ODM_CMNINFO_DOMAIN_CODE_5G, ++ ODM_CMNINFO_IQKFWOFFLOAD, ++ ODM_CMNINFO_HUBUSBMODE, ++ ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS, ++ ODM_CMNINFO_TX_TP, ++ ODM_CMNINFO_RX_TP, ++ ODM_CMNINFO_SOUNDING_SEQ, ++ //-----------HOOK BEFORE REG INIT-----------// ++ ++ ++ // ++ // Dynamic value: ++ // ++//--------- POINTER REFERENCE-----------// ++ ODM_CMNINFO_MAC_PHY_MODE, // ODM_MAC_PHY_MODE_E ++ ODM_CMNINFO_TX_UNI, ++ ODM_CMNINFO_RX_UNI, ++ ODM_CMNINFO_WM_MODE, // ODM_WIRELESS_MODE_E ++ ODM_CMNINFO_BAND, // ODM_BAND_TYPE_E ++ ODM_CMNINFO_SEC_CHNL_OFFSET, // ODM_SEC_CHNL_OFFSET_E ++ ODM_CMNINFO_SEC_MODE, // ODM_SECURITY_E ++ ODM_CMNINFO_BW, // ODM_BW_E ++ ODM_CMNINFO_CHNL, ++ ODM_CMNINFO_FORCED_RATE, ++ ++ ODM_CMNINFO_DMSP_GET_VALUE, ++ ODM_CMNINFO_BUDDY_ADAPTOR, ++ ODM_CMNINFO_DMSP_IS_MASTER, ++ ODM_CMNINFO_SCAN, ++ ODM_CMNINFO_POWER_SAVING, ++ ODM_CMNINFO_ONE_PATH_CCA, // ODM_CCA_PATH_E ++ ODM_CMNINFO_DRV_STOP, ++ ODM_CMNINFO_PNP_IN, ++ ODM_CMNINFO_INIT_ON, ++ ODM_CMNINFO_ANT_TEST, ++ ODM_CMNINFO_NET_CLOSED, ++ //ODM_CMNINFO_RTSTA_AID, // For win driver only? ++ ODM_CMNINFO_FORCED_IGI_LB, ++ ODM_CMNINFO_P2P_LINK, ++ ODM_CMNINFO_FCS_MODE, ++ ODM_CMNINFO_IS1ANTENNA, ++ ODM_CMNINFO_RFDEFAULTPATH, ++//--------- POINTER REFERENCE-----------// ++ ++//------------CALL BY VALUE-------------// ++ ODM_CMNINFO_WIFI_DIRECT, ++ ODM_CMNINFO_WIFI_DISPLAY, ++ ODM_CMNINFO_LINK_IN_PROGRESS, ++ ODM_CMNINFO_LINK, ++ ODM_CMNINFO_STATION_STATE, ++ ODM_CMNINFO_RSSI_MIN, ++ ODM_CMNINFO_DBG_COMP, // u8Byte ++ ODM_CMNINFO_DBG_LEVEL, // u4Byte ++ ODM_CMNINFO_RA_THRESHOLD_HIGH, // u1Byte ++ ODM_CMNINFO_RA_THRESHOLD_LOW, // u1Byte ++ ODM_CMNINFO_RF_ANTENNA_TYPE, // u1Byte ++ ODM_CMNINFO_BT_ENABLED, ++ ODM_CMNINFO_BT_HS_CONNECT_PROCESS, ++ ODM_CMNINFO_BT_HS_RSSI, ++ ODM_CMNINFO_BT_OPERATION, ++ ODM_CMNINFO_BT_LIMITED_DIG, //Need to Limited Dig or not ++ ODM_CMNINFO_BT_DIG, ++ ODM_CMNINFO_BT_BUSY, //Check Bt is using or not//neil ++ ODM_CMNINFO_BT_DISABLE_EDCA, ++#if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23 ++#ifdef UNIVERSAL_REPEATER ++ ODM_CMNINFO_VXD_LINK, ++#endif ++#endif ++ ODM_CMNINFO_AP_TOTAL_NUM, ++ ODM_CMNINFO_POWER_TRAINING, ++//------------CALL BY VALUE-------------// ++ ++ // ++ // Dynamic ptr array hook itms. ++ // ++ ODM_CMNINFO_STA_STATUS, ++ ODM_CMNINFO_PHY_STATUS, ++ ODM_CMNINFO_MAC_STATUS, ++ ++ ODM_CMNINFO_MAX, ++ ++ ++}ODM_CMNINFO_E; ++ ++// ++// 2011/10/20 MH Define ODM support ability. ODM_CMNINFO_ABILITY ++// ++typedef enum _ODM_Support_Ability_Definition ++{ ++ // ++ // BB ODM section BIT 0-19 ++ // ++ ODM_BB_DIG = BIT0, ++ ODM_BB_RA_MASK = BIT1, ++ ODM_BB_DYNAMIC_TXPWR = BIT2, ++ ODM_BB_FA_CNT = BIT3, ++ ODM_BB_RSSI_MONITOR = BIT4, ++ ODM_BB_CCK_PD = BIT5, ++ ODM_BB_ANT_DIV = BIT6, ++ ODM_BB_PWR_SAVE = BIT7, ++ ODM_BB_PWR_TRAIN = BIT8, ++ ODM_BB_RATE_ADAPTIVE = BIT9, ++ ODM_BB_PATH_DIV = BIT10, ++ ODM_BB_PSD = BIT11, ++ ODM_BB_RXHP = BIT12, ++ ODM_BB_ADAPTIVITY = BIT13, ++ ODM_BB_CFO_TRACKING = BIT14, ++ ODM_BB_NHM_CNT = BIT15, ++ ODM_BB_PRIMARY_CCA = BIT16, ++ ODM_BB_TXBF = BIT17, ++ ++ // ++ // MAC DM section BIT 20-23 ++ // ++ ODM_MAC_EDCA_TURBO = BIT20, ++ ODM_MAC_EARLY_MODE = BIT21, ++ ++ // ++ // RF ODM section BIT 24-31 ++ // ++ ODM_RF_TX_PWR_TRACK = BIT24, ++ ODM_RF_RX_GAIN_TRACK = BIT25, ++ ODM_RF_CALIBRATION = BIT26, ++ ++}ODM_ABILITY_E; ++ ++//Move some non-DM enum,define, struc. form phydm.h to phydm_types.h by Dino ++ ++// ODM_CMNINFO_ONE_PATH_CCA ++typedef enum tag_CCA_Path ++{ ++ ODM_CCA_2R = 0, ++ ODM_CCA_1R_A = 1, ++ ODM_CCA_1R_B = 2, ++}ODM_CCA_PATH_E; ++ ++//move RAInfo to Phydm_RaInfo.h ++ ++//Remove struct PATHDIV_PARA to odm_PathDiv.h ++ ++//Remove struct to odm_PowerTracking.h by YuChen ++// ++// ODM Dynamic common info value definition ++// ++//Move AntDiv form phydm.h to Phydm_AntDiv.h by Dino ++ ++//move PathDiv to Phydm_PathDiv.h ++ ++typedef enum _BASEBAND_CONFIG_PHY_REG_PG_VALUE_TYPE{ ++ PHY_REG_PG_RELATIVE_VALUE = 0, ++ PHY_REG_PG_EXACT_VALUE = 1 ++} PHY_REG_PG_TYPE; ++ ++// ++// 2011/09/22 MH Copy from SD4 defined structure. We use to support PHY DM integration. ++// ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (RT_PLATFORM != PLATFORM_LINUX) ++typedef ++#endif ++ ++struct DM_Out_Source_Dynamic_Mechanism_Structure ++#else// for AP,ADSL,CE Team ++typedef struct DM_Out_Source_Dynamic_Mechanism_Structure ++#endif ++{ ++ //RT_TIMER FastAntTrainingTimer; ++ // ++ // Add for different team use temporarily ++ // ++ PADAPTER Adapter; // For CE/NIC team ++ prtl8192cd_priv priv; // For AP/ADSL team ++ // WHen you use Adapter or priv pointer, you must make sure the pointer is ready. ++ BOOLEAN odm_ready; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ rtl8192cd_priv fake_priv; ++#endif ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ // ADSL_AP_BUILD_WORKAROUND ++ ADAPTER fake_adapter; ++#endif ++ ++ PHY_REG_PG_TYPE PhyRegPgValueType; ++ u1Byte PhyRegPgVersion; ++ ++ u8Byte DebugComponents; ++ u4Byte DebugLevel; ++ ++ u4Byte NumQryPhyStatusAll; //CCK + OFDM ++ u4Byte LastNumQryPhyStatusAll; ++ u4Byte RxPWDBAve; ++ BOOLEAN MPDIG_2G; //off MPDIG ++ u1Byte Times_2G; ++ ++//------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------// ++ BOOLEAN bCckHighPower; ++ u1Byte RFPathRxEnable; // ODM_CMNINFO_RFPATH_ENABLE ++ u1Byte ControlChannel; ++//------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------// ++ ++//--------REMOVED COMMON INFO----------// ++ //u1Byte PseudoMacPhyMode; ++ //BOOLEAN *BTCoexist; ++ //BOOLEAN PseudoBtCoexist; ++ //u1Byte OPMode; ++ //BOOLEAN bAPMode; ++ //BOOLEAN bClientMode; ++ //BOOLEAN bAdHocMode; ++ //BOOLEAN bSlaveOfDMSP; ++//--------REMOVED COMMON INFO----------// ++ ++ ++//1 COMMON INFORMATION ++ ++ // ++ // Init Value ++ // ++//-----------HOOK BEFORE REG INIT-----------// ++ // ODM Platform info AP/ADSL/CE/MP = 1/2/3/4 ++ u1Byte SupportPlatform; ++ // ODM Support Ability DIG/RATR/TX_PWR_TRACK/ ¡K¡K = 1/2/3/¡K ++ u4Byte SupportAbility; ++ // ODM PCIE/USB/SDIO = 1/2/3 ++ u1Byte SupportInterface; ++ // ODM composite or independent. Bit oriented/ 92C+92D+ .... or any other type = 1/2/3/... ++ u4Byte SupportICType; ++ // Cut Version TestChip/A-cut/B-cut... = 0/1/2/3/... ++ u1Byte CutVersion; ++ // Fab Version TSMC/UMC = 0/1 ++ u1Byte FabVersion; ++ // RF Type 4T4R/3T3R/2T2R/1T2R/1T1R/... ++ u1Byte RFType; ++ u1Byte RFEType; ++ // Board Type Normal/HighPower/MiniCard/SLIM/Combo/... = 0/1/2/3/4/... ++ u1Byte BoardType; ++ u1Byte PackageType; ++ u2Byte TypeGLNA; ++ u2Byte TypeGPA; ++ u2Byte TypeALNA; ++ u2Byte TypeAPA; ++ // with external LNA NO/Yes = 0/1 ++ u1Byte ExtLNA; // 2G ++ u1Byte ExtLNA5G; //5G ++ // with external PA NO/Yes = 0/1 ++ u1Byte ExtPA; // 2G ++ u1Byte ExtPA5G; //5G ++ // with external TRSW NO/Yes = 0/1 ++ u1Byte ExtTRSW; ++ u1Byte ExtLNAGain; // 2G ++ u1Byte PatchID; //Customer ID ++ BOOLEAN bInHctTest; ++ BOOLEAN bWIFITest; ++ ++ BOOLEAN bDualMacSmartConcurrent; ++ u4Byte BK_SupportAbility; ++ u1Byte AntDivType; ++ BOOLEAN ConfigBBRF; ++ u1Byte odm_Regulation2_4G; ++ u1Byte odm_Regulation5G; ++ u1Byte IQKFWOffload; ++//-----------HOOK BEFORE REG INIT-----------// ++ ++ // ++ // Dynamic Value ++ // ++//--------- POINTER REFERENCE-----------// ++ ++ u1Byte u1Byte_temp; ++ BOOLEAN BOOLEAN_temp; ++ PADAPTER PADAPTER_temp; ++ ++ // MAC PHY Mode SMSP/DMSP/DMDP = 0/1/2 ++ u1Byte *pMacPhyMode; ++ //TX Unicast byte count ++ u8Byte *pNumTxBytesUnicast; ++ //RX Unicast byte count ++ u8Byte *pNumRxBytesUnicast; ++ // Wireless mode B/G/A/N = BIT0/BIT1/BIT2/BIT3 ++ u1Byte *pWirelessMode; //ODM_WIRELESS_MODE_E ++ // Frequence band 2.4G/5G = 0/1 ++ u1Byte *pBandType; ++ // Secondary channel offset don't_care/below/above = 0/1/2 ++ u1Byte *pSecChOffset; ++ // Security mode Open/WEP/AES/TKIP = 0/1/2/3 ++ u1Byte *pSecurity; ++ // BW info 20M/40M/80M = 0/1/2 ++ u1Byte *pBandWidth; ++ // Central channel location Ch1/Ch2/.... ++ u1Byte *pChannel; //central channel number ++ BOOLEAN DPK_Done; ++ // Common info for 92D DMSP ++ ++ BOOLEAN *pbGetValueFromOtherMac; ++ PADAPTER *pBuddyAdapter; ++ BOOLEAN *pbMasterOfDMSP; //MAC0: master, MAC1: slave ++ // Common info for Status ++ BOOLEAN *pbScanInProcess; ++ BOOLEAN *pbPowerSaving; ++ // CCA Path 2-path/path-A/path-B = 0/1/2; using ODM_CCA_PATH_E. ++ u1Byte *pOnePathCCA; ++ //pMgntInfo->AntennaTest ++ u1Byte *pAntennaTest; ++ BOOLEAN *pbNet_closed; ++ //u1Byte *pAidMap; ++ u1Byte *pu1ForcedIgiLb; ++ BOOLEAN *pIsFcsModeEnable; ++/*--------- For 8723B IQK-----------*/ ++ BOOLEAN *pIs1Antenna; ++ u1Byte *pRFDefaultPath; ++ // 0:S1, 1:S0 ++ ++//--------- POINTER REFERENCE-----------// ++ pu2Byte pForcedDataRate; ++ pu1Byte HubUsbMode; ++ BOOLEAN *pbFwDwRsvdPageInProgress; ++ u4Byte *pCurrentTxTP; ++ u4Byte *pCurrentRxTP; ++ u1Byte *pSoundingSeq; ++//------------CALL BY VALUE-------------// ++ BOOLEAN bLinkInProcess; ++ BOOLEAN bWIFI_Direct; ++ BOOLEAN bWIFI_Display; ++ BOOLEAN bLinked; ++ BOOLEAN bsta_state; ++#if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23 ++#ifdef UNIVERSAL_REPEATER ++ BOOLEAN VXD_bLinked; ++#endif ++#endif // for repeater mode add by YuChen 2014.06.23 ++ u1Byte RSSI_Min; ++ u1Byte InterfaceIndex; /*Add for 92D dual MAC: 0--Mac0 1--Mac1*/ ++ BOOLEAN bIsMPChip; ++ BOOLEAN bOneEntryOnly; ++ BOOLEAN mp_mode; ++ u4Byte OneEntry_MACID; ++ u1Byte pre_number_linked_client; ++ u1Byte number_linked_client; ++ u1Byte pre_number_active_client; ++ u1Byte number_active_client; ++ // Common info for BTDM ++ BOOLEAN bBtEnabled; // BT is enabled ++ BOOLEAN bBtConnectProcess; // BT HS is under connection progress. ++ u1Byte btHsRssi; // BT HS mode wifi rssi value. ++ BOOLEAN bBtHsOperation; // BT HS mode is under progress ++ u1Byte btHsDigVal; // use BT rssi to decide the DIG value ++ BOOLEAN bBtDisableEdcaTurbo; // Under some condition, don't enable the EDCA Turbo ++ BOOLEAN bBtBusy; // BT is busy. ++ BOOLEAN bBtLimitedDig; // BT is busy. ++ BOOLEAN bDisablePhyApi; ++//------------CALL BY VALUE-------------// ++ u1Byte RSSI_A; ++ u1Byte RSSI_B; ++ u1Byte RSSI_C; ++ u1Byte RSSI_D; ++ u8Byte RSSI_TRSW; ++ u8Byte RSSI_TRSW_H; ++ u8Byte RSSI_TRSW_L; ++ u8Byte RSSI_TRSW_iso; ++ u1Byte TXAntStatus; ++ u1Byte RXAntStatus; ++ u1Byte cck_lna_idx; ++ u1Byte cck_vga_idx; ++ u1Byte ofdm_agc_idx[4]; ++ ++ u1Byte RxRate; ++ BOOLEAN bNoisyState; ++ u1Byte TxRate; ++ u1Byte LinkedInterval; ++ u1Byte preChannel; ++ u4Byte TxagcOffsetValueA; ++ BOOLEAN IsTxagcOffsetPositiveA; ++ u4Byte TxagcOffsetValueB; ++ BOOLEAN IsTxagcOffsetPositiveB; ++ u4Byte tx_tp; ++ u4Byte rx_tp; ++ u4Byte total_tp; ++ u8Byte curTxOkCnt; ++ u8Byte curRxOkCnt; ++ u8Byte lastTxOkCnt; ++ u8Byte lastRxOkCnt; ++ u4Byte BbSwingOffsetA; ++ BOOLEAN IsBbSwingOffsetPositiveA; ++ u4Byte BbSwingOffsetB; ++ BOOLEAN IsBbSwingOffsetPositiveB; ++ u1Byte antdiv_rssi; ++ u1Byte fat_comb_a; ++ u1Byte fat_comb_b; ++ u1Byte antdiv_intvl; ++ u1Byte AntType; ++ u1Byte pre_AntType; ++ u1Byte antdiv_period; ++ u1Byte antdiv_select; ++ u1Byte path_select; ++ u1Byte antdiv_evm_en; ++ u1Byte bdc_holdstate; ++ u1Byte NdpaPeriod; ++ BOOLEAN H2C_RARpt_connect; ++ BOOLEAN cck_agc_report_type; ++ ++ u1Byte dm_dig_max_TH; ++ u1Byte dm_dig_min_TH; ++ u1Byte print_agc; ++ u1Byte TrafficLoad; ++ u1Byte pre_TrafficLoad; ++ ++ ++ //For Adaptivtiy ++ u2Byte NHM_cnt_0; ++ u2Byte NHM_cnt_1; ++ s1Byte TH_L2H_default; ++ s1Byte TH_EDCCA_HL_diff_default; ++ s1Byte TH_L2H_ini; ++ s1Byte TH_EDCCA_HL_diff; ++ s1Byte TH_L2H_ini_mode2; ++ s1Byte TH_EDCCA_HL_diff_mode2; ++ BOOLEAN Carrier_Sense_enable; ++ u1Byte Adaptivity_IGI_upper; ++ BOOLEAN adaptivity_flag; ++ u1Byte DCbackoff; ++ BOOLEAN Adaptivity_enable; ++ u1Byte APTotalNum; ++ BOOLEAN EDCCA_enable; ++ ADAPTIVITY_STATISTICS Adaptivity; ++ //For Adaptivtiy ++ u1Byte LastUSBHub; ++ u1Byte TxBfDataRate; ++ ++ u1Byte c2h_cmd_start; ++ u1Byte fw_debug_trace[60]; ++ u1Byte pre_c2h_seq; ++ BOOLEAN fw_buff_is_enpty; ++ u4Byte data_frame_num; ++ ++ /*for noise detection*/ ++ BOOLEAN NoisyDecision; /*b_noisy*/ ++ BOOLEAN pre_b_noisy; ++ u4Byte NoisyDecision_Smooth; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ ODM_NOISE_MONITOR noise_level;//[ODM_MAX_CHANNEL_NUM]; ++#endif ++ // ++ //2 Define STA info. ++ // _ODM_STA_INFO ++ // 2012/01/12 MH For MP, we need to reduce one array pointer for default port.?? ++ PSTA_INFO_T pODM_StaInfo[ODM_ASSOCIATE_ENTRY_NUM]; ++ u2Byte platform2phydm_macid_table[ODM_ASSOCIATE_ENTRY_NUM]; /* platform_macid_table[platform_macid] = phydm_macid */ ++ ++#if (RATE_ADAPTIVE_SUPPORT == 1) ++ u2Byte CurrminRptTime; ++ ODM_RA_INFO_T RAInfo[ODM_ASSOCIATE_ENTRY_NUM]; //Use MacID as array index. STA MacID=0, VWiFi Client MacID={1, ODM_ASSOCIATE_ENTRY_NUM-1} //YJ,add,120119 ++#endif ++ // ++ // 2012/02/14 MH Add to share 88E ra with other SW team. ++ // We need to colelct all support abilit to a proper area. ++ // ++ BOOLEAN RaSupport88E; ++ ++ // Define ........... ++ ++ // Latest packet phy info (ODM write) ++ ODM_PHY_DBG_INFO_T PhyDbgInfo; ++ //PHY_INFO_88E PhyInfo; ++ ++ // Latest packet phy info (ODM write) ++ ODM_MAC_INFO *pMacInfo; ++ //MAC_INFO_88E MacInfo; ++ ++ // Different Team independt structure?? ++ ++ // ++ //TX_RTP_CMN TX_retrpo; ++ //TX_RTP_88E TX_retrpo; ++ //TX_RTP_8195 TX_retrpo; ++ ++ // ++ //ODM Structure ++ // ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ BDC_T DM_BdcTable; ++ #endif ++ ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ SAT_T dm_sat_table; ++ #endif ++ ++#endif ++ FAT_T DM_FatTable; ++ DIG_T DM_DigTable; ++ ++ PS_T DM_PSTable; ++ Pri_CCA_T DM_PriCCA; ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ RXHP_T DM_RXHP_Table; ++#endif ++ RA_T DM_RA_Table; ++ FALSE_ALARM_STATISTICS FalseAlmCnt; ++ FALSE_ALARM_STATISTICS FlaseAlmCntBuddyAdapter; ++ SWAT_T DM_SWAT_Table; ++ CFO_TRACKING DM_CfoTrack; ++ ACS DM_ACS; ++ ++ ++#if (RTL8814A_SUPPORT == 1) ++ IQK_INFO IQK_info; ++#endif /* (RTL8814A_SUPPORT==1) */ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ //Path Div Struct ++ PATHDIV_PARA pathIQK; ++#endif ++#if(defined(CONFIG_PATH_DIVERSITY)) ++ PATHDIV_T DM_PathDiv; ++#endif ++ ++ EDCA_T DM_EDCA_Table; ++ u4Byte WMMEDCA_BE; ++ ++ // Copy from SD4 structure ++ // ++ // ================================================== ++ // ++ ++ //common ++ //u1Byte DM_Type; ++ //u1Byte PSD_Report_RXHP[80]; // Add By Gary ++ //u1Byte PSD_func_flag; // Add By Gary ++ //for DIG ++ //u1Byte bDMInitialGainEnable; ++ //u1Byte binitialized; // for dm_initial_gain_Multi_STA use. ++ ++ BOOLEAN *pbDriverStopped; ++ BOOLEAN *pbDriverIsGoingToPnpSetPowerSleep; ++ BOOLEAN *pinit_adpt_in_progress; ++ ++ //PSD ++ BOOLEAN bUserAssignLevel; ++ RT_TIMER PSDTimer; ++ u1Byte RSSI_BT; //come from BT ++ BOOLEAN bPSDinProcess; ++ BOOLEAN bPSDactive; ++ BOOLEAN bDMInitialGainEnable; ++ ++ //MPT DIG ++ RT_TIMER MPT_DIGTimer; ++ ++ //for rate adaptive, in fact, 88c/92c fw will handle this ++ u1Byte bUseRAMask; ++ ++ ODM_RATE_ADAPTIVE RateAdaptive; ++//#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++#if(defined(CONFIG_ANT_DETECTION)) ++ ANT_DETECTED_INFO AntDetectedInfo; // Antenna detected information for RSSI tool ++#endif ++ ODM_RF_CAL_T RFCalibrateInfo; ++ ++ ++ // ++ // Dynamic ATC switch ++ // ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ // ++ // Power Training ++ // ++ u1Byte ForcePowerTrainingState; ++ BOOLEAN bChangeState; ++ u4Byte PT_score; ++ u8Byte OFDM_RX_Cnt; ++ u8Byte CCK_RX_Cnt; ++#endif ++ BOOLEAN bDisablePowerTraining; ++ ++ // ++ // ODM system resource. ++ // ++ ++ // ODM relative time. ++ RT_TIMER PathDivSwitchTimer; ++ //2011.09.27 add for Path Diversity ++ RT_TIMER CCKPathDiversityTimer; ++ RT_TIMER FastAntTrainingTimer; ++#ifdef ODM_EVM_ENHANCE_ANTDIV ++ RT_TIMER EVM_FastAntTrainingTimer; ++#endif ++ RT_TIMER sbdcnt_timer; ++ ++ // ODM relative workitem. ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#if USE_WORKITEM ++ RT_WORK_ITEM PathDivSwitchWorkitem; ++ RT_WORK_ITEM CCKPathDiversityWorkitem; ++ RT_WORK_ITEM FastAntTrainingWorkitem; ++ RT_WORK_ITEM MPT_DIGWorkitem; ++ RT_WORK_ITEM RaRptWorkitem; ++ RT_WORK_ITEM sbdcnt_workitem; ++#endif ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++#if (BEAMFORMING_SUPPORT == 1) ++ RT_BEAMFORMING_INFO BeamformingInfo; ++#endif ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++#if (RT_PLATFORM != PLATFORM_LINUX) ++} DM_ODM_T, *PDM_ODM_T; // DM_Dynamic_Mechanism_Structure ++#else ++}; ++#endif ++ ++#else// for AP,ADSL,CE Team ++} DM_ODM_T, *PDM_ODM_T; // DM_Dynamic_Mechanism_Structure ++#endif ++ ++ ++typedef enum _PHYDM_STRUCTURE_TYPE{ ++ PHYDM_FALSEALMCNT, ++ PHYDM_CFOTRACK, ++ PHYDM_ADAPTIVITY, ++ PHYDM_ROMINFO, ++ ++}PHYDM_STRUCTURE_TYPE; ++ ++ ++ ++ typedef enum _ODM_RF_CONTENT{ ++ odm_radioa_txt = 0x1000, ++ odm_radiob_txt = 0x1001, ++ odm_radioc_txt = 0x1002, ++ odm_radiod_txt = 0x1003 ++} ODM_RF_CONTENT; ++ ++typedef enum _ODM_BB_Config_Type{ ++ CONFIG_BB_PHY_REG, ++ CONFIG_BB_AGC_TAB, ++ CONFIG_BB_AGC_TAB_2G, ++ CONFIG_BB_AGC_TAB_5G, ++ CONFIG_BB_PHY_REG_PG, ++ CONFIG_BB_PHY_REG_MP, ++ CONFIG_BB_AGC_TAB_DIFF, ++} ODM_BB_Config_Type, *PODM_BB_Config_Type; ++ ++typedef enum _ODM_RF_Config_Type{ ++ CONFIG_RF_RADIO, ++ CONFIG_RF_TXPWR_LMT, ++} ODM_RF_Config_Type, *PODM_RF_Config_Type; ++ ++typedef enum _ODM_FW_Config_Type{ ++ CONFIG_FW_NIC, ++ CONFIG_FW_NIC_2, ++ CONFIG_FW_AP, ++ CONFIG_FW_AP_2, ++ CONFIG_FW_MP, ++ CONFIG_FW_WoWLAN, ++ CONFIG_FW_WoWLAN_2, ++ CONFIG_FW_AP_WoWLAN, ++ CONFIG_FW_BT, ++} ODM_FW_Config_Type; ++ ++// Status code ++#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) ++typedef enum _RT_STATUS{ ++ RT_STATUS_SUCCESS, ++ RT_STATUS_FAILURE, ++ RT_STATUS_PENDING, ++ RT_STATUS_RESOURCE, ++ RT_STATUS_INVALID_CONTEXT, ++ RT_STATUS_INVALID_PARAMETER, ++ RT_STATUS_NOT_SUPPORT, ++ RT_STATUS_OS_API_FAILED, ++}RT_STATUS,*PRT_STATUS; ++#endif // end of RT_STATUS definition ++ ++#ifdef REMOVE_PACK ++#pragma pack() ++#endif ++ ++//#include "odm_function.h" ++ ++//3=========================================================== ++//3 DIG ++//3=========================================================== ++ ++//Remove DIG by Yuchen ++ ++//3=========================================================== ++//3 AGC RX High Power Mode ++//3=========================================================== ++#define LNA_Low_Gain_1 0x64 ++#define LNA_Low_Gain_2 0x5A ++#define LNA_Low_Gain_3 0x58 ++ ++#define FA_RXHP_TH1 5000 ++#define FA_RXHP_TH2 1500 ++#define FA_RXHP_TH3 800 ++#define FA_RXHP_TH4 600 ++#define FA_RXHP_TH5 500 ++ ++//3=========================================================== ++//3 EDCA ++//3=========================================================== ++ ++//3=========================================================== ++//3 Dynamic Tx Power ++//3=========================================================== ++//Dynamic Tx Power Control Threshold ++ ++//Remove By YuChen ++ ++//3=========================================================== ++//3 Tx Power Tracking ++//3=========================================================== ++ ++ ++ ++//3=========================================================== ++//3 Rate Adaptive ++//3=========================================================== ++//Remove to odm_RaInfo.h by RS_James ++ ++//3=========================================================== ++//3 BB Power Save ++//3=========================================================== ++ ++typedef enum tag_1R_CCA_Type_Definition ++{ ++ CCA_1R =0, ++ CCA_2R = 1, ++ CCA_MAX = 2, ++}DM_1R_CCA_E; ++ ++typedef enum tag_RF_Type_Definition ++{ ++ RF_Save =0, ++ RF_Normal = 1, ++ RF_MAX = 2, ++}DM_RF_E; ++ ++ ++// ++// Extern Global Variables. ++// ++//PowerTracking move to odm_powerTrakcing.h by YuChen ++// ++// check Sta pointer valid or not ++// ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++#define IS_STA_VALID(pSta) (pSta && pSta->expire_to) ++#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#define IS_STA_VALID(pSta) (pSta && pSta->bUsed) ++#else ++#define IS_STA_VALID(pSta) (pSta) ++#endif ++ ++//Remove DIG by yuchen ++ ++//Remove BB power saving by Yuchen ++ ++//remove PT by yuchen ++ ++//ODM_RAStateCheck() Remove by RS_James ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_AP|ODM_ADSL)) ++//============================================================ ++// function prototype ++//============================================================ ++//#define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh ++//void ODM_ChangeDynamicInitGainThresh(IN PADAPTER pAdapter, ++// IN INT32 DM_Type, ++// IN INT32 DM_Value); ++ ++//Remove DIG by yuchen ++ ++ ++BOOLEAN ++ODM_CheckPowerStatus( ++ IN PADAPTER Adapter ++ ); ++ ++ ++//Remove ODM_RateAdaptiveStateApInit() by RS_James ++ ++//Remove Edca by YuChen ++ ++#endif ++ ++ ++ ++u4Byte odm_ConvertTo_dB(u4Byte Value); ++ ++u4Byte odm_ConvertTo_linear(u4Byte Value); ++ ++#if((DM_ODM_SUPPORT_TYPE==ODM_WIN)||(DM_ODM_SUPPORT_TYPE==ODM_CE)) ++ ++u4Byte ++GetPSDData( ++ PDM_ODM_T pDM_Odm, ++ unsigned int point, ++ u1Byte initial_gain_psd); ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++VOID ++ODM_DMWatchdog_LPS( ++ IN PDM_ODM_T pDM_Odm ++); ++#endif ++ ++ ++s4Byte ++ODM_PWdB_Conversion( ++ IN s4Byte X, ++ IN u4Byte TotalBit, ++ IN u4Byte DecimalBit ++ ); ++ ++s4Byte ++ODM_SignConversion( ++ IN s4Byte value, ++ IN u4Byte TotalBit ++ ); ++ ++VOID ++ODM_DMInit( ++ IN PDM_ODM_T pDM_Odm ++); ++ ++VOID ++ODM_DMReset( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++phydm_support_ablity_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ); ++ ++VOID ++ODM_DMWatchdog( ++ IN PDM_ODM_T pDM_Odm // For common use in the future ++ ); ++ ++VOID ++ODM_CmnInfoInit( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN u4Byte Value ++ ); ++ ++VOID ++ODM_CmnInfoHook( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN PVOID pValue ++ ); ++ ++VOID ++ODM_CmnInfoPtrArrayHook( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_CMNINFO_E CmnInfo, ++ IN u2Byte Index, ++ IN PVOID pValue ++ ); ++ ++VOID ++ODM_CmnInfoUpdate( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte CmnInfo, ++ IN u8Byte Value ++ ); ++ ++#if(DM_ODM_SUPPORT_TYPE==ODM_AP) ++VOID ++ODM_InitAllThreads( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_StopAllThreads( ++ IN PDM_ODM_T pDM_Odm ++ ); ++#endif ++ ++VOID ++ODM_InitAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_CancelAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_ReleaseAllTimers( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ); ++VOID ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ); ++ ++ ++ ++u8Byte ++PlatformDivision64( ++ IN u8Byte x, ++ IN u8Byte y ++); ++ ++//==================================================== ++//3 PathDiV End ++//==================================================== ++ ++ ++#define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh ++//void ODM_ChangeDynamicInitGainThresh(IN PADAPTER pAdapter, ++// IN INT32 DM_Type, ++// IN INT32 DM_Value); ++// ++// PathDiveristy Remove by RS_James ++ ++typedef enum tag_DIG_Connect_Definition ++{ ++ DIG_STA_DISCONNECT = 0, ++ DIG_STA_CONNECT = 1, ++ DIG_STA_BEFORE_CONNECT = 2, ++ DIG_MultiSTA_DISCONNECT = 3, ++ DIG_MultiSTA_CONNECT = 4, ++ DIG_CONNECT_MAX ++}DM_DIG_CONNECT_E; ++ ++ ++// ++// 2012/01/12 MH Check afapter status. Temp fix BSOD. ++// ++#define HAL_ADAPTER_STS_CHK(pDM_Odm)\ ++ if (pDM_Odm->Adapter == NULL)\ ++ {\ ++ return;\ ++ }\ ++ ++ ++// ++// For new definition in MP temporarily fro power tracking, ++// ++/* ++#define odm_TXPowerTrackingDirectCall(_Adapter) \ ++ IS_HARDWARE_TYPE_8192D(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92D(_Adapter) : \ ++ IS_HARDWARE_TYPE_8192C(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92C(_Adapter) : \ ++ IS_HARDWARE_TYPE_8723A(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_8723A(_Adapter) :\ ++ ODM_TXPowerTrackingCallback_ThermalMeter(_Adapter) ++*/ ++ ++ ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++ODM_AsocEntry_Init( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++//Remove ODM_DynamicARFBSelect() by RS_James ++ ++PVOID ++PhyDM_Get_Structure( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte Structure_Type ++); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ||(DM_ODM_SUPPORT_TYPE == ODM_CE) ++/*===========================================================*/ ++/* The following is for compile only*/ ++/*===========================================================*/ ++ ++#define IS_HARDWARE_TYPE_8723A(_Adapter) FALSE ++#define IS_HARDWARE_TYPE_8723AE(_Adapter) FALSE ++#define IS_HARDWARE_TYPE_8192C(_Adapter) FALSE ++#define IS_HARDWARE_TYPE_8192D(_Adapter) FALSE ++#define RF_T_METER_92D 0x42 ++ ++ ++#define SET_TX_DESC_ANTSEL_A_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 0, 1, __Value) ++#define SET_TX_DESC_TX_ANTL_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 4, 2, __Value) ++#define SET_TX_DESC_TX_ANT_HT_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 6, 2, __Value) ++#define SET_TX_DESC_TX_ANT_CCK_92C(__pTxDesc, __Value) SET_BITS_TO_LE_1BYTE(__pTxDesc+8+3, 2, 2, __Value) ++ ++#define GET_RX_STATUS_DESC_RX_MCS(__pRxStatusDesc) LE_BITS_TO_1BYTE( __pRxStatusDesc+12, 0, 6) ++ ++#define RX_HAL_IS_CCK_RATE_92C(pDesc)\ ++ (GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE1M ||\ ++ GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE2M ||\ ++ GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE5_5M ||\ ++ GET_RX_STATUS_DESC_RX_MCS(pDesc) == DESC_RATE11M) ++ ++#define H2C_92C_PSD_RESULT 16 ++ ++#define rConfig_ram64x16 0xb2c ++ ++#define TARGET_CHNL_NUM_2G_5G 59 ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++FillH2CCmd92C( ++ IN PADAPTER Adapter, ++ IN u1Byte ElementID, ++ IN u4Byte CmdLen, ++ IN pu1Byte pCmdBuffer ++); ++VOID ++PHY_SetTxPowerLevel8192C( ++ IN PADAPTER Adapter, ++ IN u1Byte channel ++ ); ++u1Byte GetRightChnlPlaceforIQK(u1Byte chnl); ++ ++#endif ++ ++//=========================================================== ++#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++void odm_dtc(PDM_ODM_T pDM_Odm); ++#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ ++ ++ ++VOID phydm_NoisyDetection(IN PDM_ODM_T pDM_Odm ); ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_acs.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_acs.c +new file mode 100644 +index 0000000..e18047e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_acs.c +@@ -0,0 +1,1306 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++ ++u1Byte ++ODM_GetAutoChannelSelectResult( ++ IN PVOID pDM_VOID, ++ IN u1Byte Band ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(Band == ODM_BAND_2_4G) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_2G(%d)\n", pACS->CleanChannel_2G)); ++ return (u1Byte)pACS->CleanChannel_2G; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_5G(%d)\n", pACS->CleanChannel_5G)); ++ return (u1Byte)pACS->CleanChannel_5G; ++ } ++#else ++ return (u1Byte)pACS->CleanChannel_2G; ++#endif ++ ++} ++ ++VOID ++odm_AutoChannelSelectSetting( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN IsEnable ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte period = 0x2710;// 40ms in default ++ u2Byte NHMType = 0x7; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectSetting()=========> \n")); ++ ++ if(IsEnable) ++ {//20 ms ++ period = 0x1388; ++ NHMType = 0x1; ++ } ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ { ++ //PHY parameters initialize for ac series ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, period); //0x990[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms ++ //ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8|BIT9|BIT10, NHMType); //0x994[9:8]=3 enable CCX ++ } ++ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ //PHY parameters initialize for n series ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, period); //0x894[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms ++ //ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, NHMType); //0x890[9:8]=3 enable CCX ++ } ++#endif ++} ++ ++VOID ++odm_AutoChannelSelectInit( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ u1Byte i; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) ++ return; ++ ++ if(pACS->bForceACSResult) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectInit()=========> \n")); ++ ++ pACS->CleanChannel_2G = 1; ++ pACS->CleanChannel_5G = 36; ++ ++ for (i = 0; i < ODM_MAX_CHANNEL_2G; ++i) ++ { ++ pACS->Channel_Info_2G[0][i] = 0; ++ pACS->Channel_Info_2G[1][i] = 0; ++ } ++ ++ if(pDM_Odm->SupportICType & (ODM_IC_11AC_SERIES|ODM_RTL8192D)) ++ { ++ for (i = 0; i < ODM_MAX_CHANNEL_5G; ++i) ++ { ++ pACS->Channel_Info_5G[0][i] = 0; ++ pACS->Channel_Info_5G[1][i] = 0; ++ } ++ } ++#endif ++} ++ ++VOID ++odm_AutoChannelSelectReset( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) ++ return; ++ ++ if(pACS->bForceACSResult) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectReset()=========> \n")); ++ ++ odm_AutoChannelSelectSetting(pDM_Odm,TRUE);// for 20ms measurement ++ Phydm_NHMCounterStatisticsReset(pDM_Odm); ++#endif ++} ++ ++VOID ++odm_AutoChannelSelect( ++ IN PVOID pDM_VOID, ++ IN u1Byte Channel ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ u1Byte ChannelIDX = 0, SearchIDX = 0; ++ u2Byte MaxScore=0; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Return: SupportAbility ODM_BB_NHM_CNT is disabled\n")); ++ return; ++ } ++ ++ if(pACS->bForceACSResult) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Force 2G clean channel = %d, 5G clean channel = %d\n", ++ pACS->CleanChannel_2G, pACS->CleanChannel_5G)); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel = %d=========> \n", Channel)); ++ ++ Phydm_GetNHMCounterStatistics(pDM_Odm); ++ odm_AutoChannelSelectSetting(pDM_Odm,FALSE); ++ ++ if(Channel >=1 && Channel <=14) ++ { ++ ChannelIDX = Channel - 1; ++ pACS->Channel_Info_2G[1][ChannelIDX]++; ++ ++ if(pACS->Channel_Info_2G[1][ChannelIDX] >= 2) ++ pACS->Channel_Info_2G[0][ChannelIDX] = (pACS->Channel_Info_2G[0][ChannelIDX] >> 1) + ++ (pACS->Channel_Info_2G[0][ChannelIDX] >> 2) + (pDM_Odm->NHM_cnt_0>>2); ++ else ++ pACS->Channel_Info_2G[0][ChannelIDX] = pDM_Odm->NHM_cnt_0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): NHM_cnt_0 = %d \n", pDM_Odm->NHM_cnt_0)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel_Info[0][%d] = %d, Channel_Info[1][%d] = %d\n", ChannelIDX, pACS->Channel_Info_2G[0][ChannelIDX], ChannelIDX, pACS->Channel_Info_2G[1][ChannelIDX])); ++ ++ for(SearchIDX = 0; SearchIDX < ODM_MAX_CHANNEL_2G; SearchIDX++) ++ { ++ if(pACS->Channel_Info_2G[1][SearchIDX] != 0) ++ { ++ if(pACS->Channel_Info_2G[0][SearchIDX] >= MaxScore) ++ { ++ MaxScore = pACS->Channel_Info_2G[0][SearchIDX]; ++ pACS->CleanChannel_2G = SearchIDX+1; ++ } ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("(1)odm_AutoChannelSelect(): 2G: CleanChannel_2G = %d, MaxScore = %d \n", ++ pACS->CleanChannel_2G, MaxScore)); ++ ++ } ++ else if(Channel >= 36) ++ { ++ // Need to do ++ pACS->CleanChannel_5G = Channel; ++ } ++#endif ++} ++ ++#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) ++ ++VOID ++phydm_AutoChannelSelectSettingAP( ++ IN PVOID pDM_VOID, ++ IN u4Byte setting, // 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING ++ IN u4Byte acs_step ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectSettingAP()=========> \n")); ++ ++ //3 Store Default Setting ++ if(setting == STORE_DEFAULT_NHM_SETTING) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("STORE_DEFAULT_NHM_SETTING\n")); ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) // store Reg0x990, Reg0x994, Reg0x998, Reg0x99C, Reg0x9a0 ++ { ++ pACS->Reg0x990 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC); // Reg0x990 ++ pACS->Reg0x994 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC); // Reg0x994 ++ pACS->Reg0x998 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC); // Reg0x998 ++ pACS->Reg0x99C = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC); // Reg0x99c ++ pACS->Reg0x9A0 = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_TH8_11AC); // Reg0x9a0, u1Byte ++ } ++ else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ pACS->Reg0x890 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N); // Reg0x890 ++ pACS->Reg0x894 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N); // Reg0x894 ++ pACS->Reg0x898 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N); // Reg0x898 ++ pACS->Reg0x89C = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N); // Reg0x89c ++ pACS->Reg0xE28 = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_TH8_11N); // Reg0xe28, u1Byte ++ } ++ } ++ ++ //3 Restore Default Setting ++ else if(setting == RESTORE_DEFAULT_NHM_SETTING) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("RESTORE_DEFAULT_NHM_SETTING\n")); ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) // store Reg0x990, Reg0x994, Reg0x998, Reg0x99C, Reg0x9a0 ++ { ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC, pACS->Reg0x990); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, pACS->Reg0x994); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, pACS->Reg0x998); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, pACS->Reg0x99C); ++ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11AC, pACS->Reg0x9A0); ++ } ++ else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, pACS->Reg0x890); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N, pACS->Reg0x894); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, pACS->Reg0x898); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, pACS->Reg0x89C); ++ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11N, pACS->Reg0xE28); ++ } ++ } ++ ++ //3 ACS Setting ++ else if(setting == ACS_NHM_SETTING) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("ACS_NHM_SETTING\n")); ++ u2Byte period; ++ period = 0x61a8; ++ pACS->ACS_Step = acs_step; ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ { ++ //4 Set NHM period, 0x990[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, period); ++ //4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC,BIT8|BIT9|BIT10, 3); ++ ++ if(pACS->ACS_Step == 0) ++ { ++ //4 Set IGI ++ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); ++ if (get_rf_mimo_mode(priv) != MIMO_1T1R) ++ ODM_SetBBReg(pDM_Odm,0xe50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); ++ ++ //4 Set ACS NHM threshold ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x82786e64); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff8c); ++ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11AC, 0xff); ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC+2, 0xffff); ++ ++ } ++ else if(pACS->ACS_Step == 1) ++ { ++ //4 Set IGI ++ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); ++ if (get_rf_mimo_mode(priv) != MIMO_1T1R) ++ ODM_SetBBReg(pDM_Odm,0xe50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); ++ ++ //4 Set ACS NHM threshold ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x5a50463c); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff64); ++ ++ } ++ ++ } ++ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ //4 Set NHM period, 0x894[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, period); ++ //4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N,BIT8|BIT9|BIT10, 3); ++ ++ if(pACS->ACS_Step == 0) ++ { ++ //4 Set IGI ++ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); ++ if (get_rf_mimo_mode(priv) != MIMO_1T1R) ++ ODM_SetBBReg(pDM_Odm,0xc58,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x3E); ++ ++ //4 Set ACS NHM threshold ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x82786e64); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff8c); ++ ODM_Write1Byte(pDM_Odm, ODM_REG_NHM_TH8_11N, 0xff); ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N+2, 0xffff); ++ ++ } ++ else if(pACS->ACS_Step == 1) ++ { ++ //4 Set IGI ++ ODM_SetBBReg(pDM_Odm,0xc50,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); ++ if (get_rf_mimo_mode(priv) != MIMO_1T1R) ++ ODM_SetBBReg(pDM_Odm,0xc58,BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6,0x2A); ++ ++ //4 Set ACS NHM threshold ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x5a50463c); ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff64); ++ ++ } ++ } ++ } ++ ++} ++ ++VOID ++phydm_GetNHMStatisticsAP( ++ IN PVOID pDM_VOID, ++ IN u4Byte idx, // @ 2G, Real channel number = idx+1 ++ IN u4Byte acs_step ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ u4Byte value32 = 0; ++ u1Byte i; ++ ++ pACS->ACS_Step = acs_step; ++ ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ //4 Check if NHM result is ready ++ for (i=0; i<20; i++) { ++ ++ ODM_delay_ms(1); ++ if ( ODM_GetBBReg(pDM_Odm,rFPGA0_PSDReport,BIT17) ) ++ break; ++ } ++ ++ //4 Get NHM Statistics ++ if ( pACS->ACS_Step==1 ) { ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT7_TO_CNT4_11N); ++ ++ pACS->NHM_Cnt[idx][9] = (value32 & bMaskByte1) >> 8; ++ pACS->NHM_Cnt[idx][8] = (value32 & bMaskByte0); ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11N); // ODM_REG_NHM_CNT3_TO_CNT0_11N ++ ++ pACS->NHM_Cnt[idx][7] = (value32 & bMaskByte3) >> 24; ++ pACS->NHM_Cnt[idx][6] = (value32 & bMaskByte2) >> 16; ++ pACS->NHM_Cnt[idx][5] = (value32 & bMaskByte1) >> 8; ++ ++ } else if (pACS->ACS_Step==2) { ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11N); // ODM_REG_NHM_CNT3_TO_CNT0_11N ++ ++ pACS->NHM_Cnt[idx][4] = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_CNT7_TO_CNT4_11N); ++ pACS->NHM_Cnt[idx][3] = (value32 & bMaskByte3) >> 24; ++ pACS->NHM_Cnt[idx][2] = (value32 & bMaskByte2) >> 16; ++ pACS->NHM_Cnt[idx][1] = (value32 & bMaskByte1) >> 8; ++ pACS->NHM_Cnt[idx][0] = (value32 & bMaskByte0); ++ } ++ } ++ else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ { ++ //4 Check if NHM result is ready ++ for (i=0; i<20; i++) { ++ ++ ODM_delay_ms(1); ++ if (ODM_GetBBReg(pDM_Odm,ODM_REG_NHM_DUR_READY_11AC,BIT17)) ++ break; ++ } ++ ++ if ( pACS->ACS_Step==1 ) { ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT7_TO_CNT4_11AC); ++ ++ pACS->NHM_Cnt[idx][9] = (value32 & bMaskByte1) >> 8; ++ pACS->NHM_Cnt[idx][8] = (value32 & bMaskByte0); ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11AC); // ODM_REG_NHM_CNT3_TO_CNT0_11AC ++ ++ pACS->NHM_Cnt[idx][7] = (value32 & bMaskByte3) >> 24; ++ pACS->NHM_Cnt[idx][6] = (value32 & bMaskByte2) >> 16; ++ pACS->NHM_Cnt[idx][5] = (value32 & bMaskByte1) >> 8; ++ ++ } else if (pACS->ACS_Step==2) { ++ ++ value32 = ODM_Read4Byte(pDM_Odm,ODM_REG_NHM_CNT_11AC); // ODM_REG_NHM_CNT3_TO_CNT0_11AC ++ ++ pACS->NHM_Cnt[idx][4] = ODM_Read1Byte(pDM_Odm, ODM_REG_NHM_CNT7_TO_CNT4_11AC); ++ pACS->NHM_Cnt[idx][3] = (value32 & bMaskByte3) >> 24; ++ pACS->NHM_Cnt[idx][2] = (value32 & bMaskByte2) >> 16; ++ pACS->NHM_Cnt[idx][1] = (value32 & bMaskByte1) >> 8; ++ pACS->NHM_Cnt[idx][0] = (value32 & bMaskByte0); ++ } ++ } ++ ++} ++ ++ ++//#define ACS_DEBUG_INFO //acs debug default off ++/* ++int phydm_AutoChannelSelectAP( ++ IN PVOID pDM_VOID, ++ IN u4Byte ACS_Type, // 0: RXCount_Type, 1:NHM_Type ++ IN u4Byte available_chnl_num // amount of all channels ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PACS pACS = &pDM_Odm->DM_ACS; ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++ static u4Byte score2G[MAX_2G_CHANNEL_NUM], score5G[MAX_5G_CHANNEL_NUM]; ++ u4Byte score[MAX_BSS_NUM], use_nhm = 0; ++ u4Byte minScore=0xffffffff; ++ u4Byte tmpScore, tmpIdx=0; ++ u4Byte traffic_check = 0; ++ u4Byte fa_count_weighting = 1; ++ int i, j, idx=0, idx_2G_end=-1, idx_5G_begin=-1, minChan=0; ++ struct bss_desc *pBss=NULL; ++ ++#ifdef _DEBUG_RTL8192CD_ ++ char tmpbuf[400]; ++ int len=0; ++#endif ++ ++ memset(score2G, '\0', sizeof(score2G)); ++ memset(score5G, '\0', sizeof(score5G)); ++ ++ for (i=0; iavailable_chnl_num; i++) { ++ if (priv->available_chnl[i] <= 14) ++ idx_2G_end = i; ++ else ++ break; ++ } ++ ++ for (i=0; iavailable_chnl_num; i++) { ++ if (priv->available_chnl[i] > 14) { ++ idx_5G_begin = i; ++ break; ++ } ++ } ++ ++// DELETE ++#ifndef CONFIG_RTL_NEW_AUTOCH ++ for (i=0; isite_survey->count; i++) { ++ pBss = &priv->site_survey->bss[i]; ++ for (idx=0; idxavailable_chnl_num; idx++) { ++ if (pBss->channel == priv->available_chnl[idx]) { ++ if (pBss->channel <= 14) ++ setChannelScore(idx, score2G, 0, MAX_2G_CHANNEL_NUM-1); ++ else ++ score5G[idx - idx_5G_begin] += 5; ++ break; ++ } ++ } ++ } ++#endif ++ ++ if (idx_2G_end >= 0) ++ for (i=0; i<=idx_2G_end; i++) ++ score[i] = score2G[i]; ++ if (idx_5G_begin >= 0) ++ for (i=idx_5G_begin; iavailable_chnl_num; i++) ++ score[i] = score5G[i - idx_5G_begin]; ++ ++#ifdef CONFIG_RTL_NEW_AUTOCH ++ { ++ u4Byte y, ch_begin=0, ch_end= priv->available_chnl_num; ++ ++ u4Byte do_ap_check = 1, ap_ratio = 0; ++ ++ if (idx_2G_end >= 0) ++ ch_end = idx_2G_end+1; ++ if (idx_5G_begin >= 0) ++ ch_begin = idx_5G_begin; ++ ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ for (y=ch_begin; yavailable_chnl[y], ++ priv->chnl_ss_mac_rx_count[y], ++ priv->chnl_ss_mac_rx_count_40M[y], ++ priv->chnl_ss_fa_count[y], ++ score[y]); ++ printk("\n"); ++#endif ++ ++#if defined(CONFIG_RTL_88E_SUPPORT) || defined(CONFIG_WLAN_HAL_8192EE) ++ if( pDM_Odm->SupportICType&(ODM_RTL8188E|ODM_RTL8192E)&& priv->pmib->dot11RFEntry.acs_type ) ++ { ++ u4Byte tmp_score[MAX_BSS_NUM]; ++ memcpy(tmp_score, score, sizeof(score)); ++ if (find_clean_channel(priv, ch_begin, ch_end, tmp_score)) { ++ //memcpy(score, tmp_score, sizeof(score)); ++#ifdef _DEBUG_RTL8192CD_ ++ printk("!! Found clean channel, select minimum FA channel\n"); ++#endif ++ goto USE_CLN_CH; ++ } ++#ifdef _DEBUG_RTL8192CD_ ++ printk("!! Not found clean channel, use NHM algorithm\n"); ++#endif ++ use_nhm = 1; ++USE_CLN_CH: ++ for (y=ch_begin; ynhm_cnt[y][i]; ++ for (j=0; jL, score: %d\n", ++ y+1, priv->nhm_cnt[y][9], priv->nhm_cnt[y][8], priv->nhm_cnt[y][7], ++ priv->nhm_cnt[y][6], priv->nhm_cnt[y][5], priv->nhm_cnt[y][4], ++ priv->nhm_cnt[y][3], priv->nhm_cnt[y][2], priv->nhm_cnt[y][1], ++ priv->nhm_cnt[y][0], score[y]); ++#endif ++ } ++ ++ if (!use_nhm) ++ memcpy(score, tmp_score, sizeof(score)); ++ ++ goto choose_ch; ++ } ++#endif ++ ++ // For each channel, weighting behind channels with MAC RX counter ++ //For each channel, weighting the channel with FA counter ++ ++ for (y=ch_begin; ychnl_ss_mac_rx_count[y]; ++ if (priv->chnl_ss_mac_rx_count[y] > 30) ++ do_ap_check = 0; ++ if( priv->chnl_ss_mac_rx_count[y] > MAC_RX_COUNT_THRESHOLD ) ++ traffic_check = 1; ++ ++#ifdef RTK_5G_SUPPORT ++ if (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G) ++#endif ++ { ++ if ((int)(y-4) >= (int)ch_begin) ++ score[y-4] += 2 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y-3) >= (int)ch_begin) ++ score[y-3] += 8 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y-2) >= (int)ch_begin) ++ score[y-2] += 8 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 10 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 10 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y+2) < (int)ch_end) ++ score[y+2] += 8 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y+3) < (int)ch_end) ++ score[y+3] += 8 * priv->chnl_ss_mac_rx_count[y]; ++ if ((int)(y+4) < (int)ch_end) ++ score[y+4] += 2 * priv->chnl_ss_mac_rx_count[y]; ++ } ++ ++ //this is for CH_LOAD caculation ++ if( priv->chnl_ss_cca_count[y] > priv->chnl_ss_fa_count[y]) ++ priv->chnl_ss_cca_count[y]-= priv->chnl_ss_fa_count[y]; ++ else ++ priv->chnl_ss_cca_count[y] = 0; ++ } ++ ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ for (y=ch_begin; yavailable_chnl[y], score[y]); ++ printk("\n"); ++#endif ++ ++ for (y=ch_begin; ychnl_ss_mac_rx_count_40M[y]) { ++ score[y] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if (priv->chnl_ss_mac_rx_count_40M[y] > 30) ++ do_ap_check = 0; ++ if( priv->chnl_ss_mac_rx_count_40M[y] > MAC_RX_COUNT_THRESHOLD ) ++ traffic_check = 1; ++ ++#ifdef RTK_5G_SUPPORT ++ if (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G) ++#endif ++ { ++ if ((int)(y-6) >= (int)ch_begin) ++ score[y-6] += 1 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y-5) >= (int)ch_begin) ++ score[y-5] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y-4) >= (int)ch_begin) ++ score[y-4] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y-3) >= (int)ch_begin) ++ score[y-3] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y-2) >= (int)ch_begin) ++ score[y-2] += (5 * priv->chnl_ss_mac_rx_count_40M[y])/2; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y+2) < (int)ch_end) ++ score[y+2] += (5 * priv->chnl_ss_mac_rx_count_40M[y])/2; ++ if ((int)(y+3) < (int)ch_end) ++ score[y+3] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y+4) < (int)ch_end) ++ score[y+4] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y+5) < (int)ch_end) ++ score[y+5] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; ++ if ((int)(y+6) < (int)ch_end) ++ score[y+6] += 1 * priv->chnl_ss_mac_rx_count_40M[y]; ++ } ++ } ++ } ++ ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ for (y=ch_begin; yavailable_chnl[y], score[y]); ++ printk("\n"); ++ printk("4. do_ap_check=%d traffic_check=%d\n", do_ap_check, traffic_check); ++ printk("\n"); ++#endif ++ ++ if( traffic_check == 0) ++ fa_count_weighting = 5; ++ else ++ fa_count_weighting = 1; ++ ++ for (y=ch_begin; ychnl_ss_fa_count[y]; ++ } ++ ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ for (y=ch_begin; yavailable_chnl[y], score[y]); ++ printk("\n"); ++#endif ++ ++ if (do_ap_check) { ++ for (i=0; isite_survey->count; i++) { ++ pBss = &priv->site_survey->bss[i]; ++ for (y=ch_begin; ychannel == priv->available_chnl[y]) { ++ if (pBss->channel <= 14) { ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ printk("chnl[%d] has ap rssi=%d bw[0x%02x]\n", ++ pBss->channel, pBss->rssi, pBss->t_stamp[1]); ++ printk("\n"); ++#endif ++ if (pBss->rssi > 60) ++ ap_ratio = 4; ++ else if (pBss->rssi > 35) ++ ap_ratio = 2; ++ else ++ ap_ratio = 1; ++ ++ if ((pBss->t_stamp[1] & 0x6) == 0) { ++ score[y] += 50 * ap_ratio; ++ if ((int)(y-4) >= (int)ch_begin) ++ score[y-4] += 10 * ap_ratio; ++ if ((int)(y-3) >= (int)ch_begin) ++ score[y-3] += 20 * ap_ratio; ++ if ((int)(y-2) >= (int)ch_begin) ++ score[y-2] += 30 * ap_ratio; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 40 * ap_ratio; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 40 * ap_ratio; ++ if ((int)(y+2) < (int)ch_end) ++ score[y+2] += 30 * ap_ratio; ++ if ((int)(y+3) < (int)ch_end) ++ score[y+3] += 20 * ap_ratio; ++ if ((int)(y+4) < (int)ch_end) ++ score[y+4] += 10 * ap_ratio; ++ } ++ else if ((pBss->t_stamp[1] & 0x4) == 0) { ++ score[y] += 50 * ap_ratio; ++ if ((int)(y-3) >= (int)ch_begin) ++ score[y-3] += 20 * ap_ratio; ++ if ((int)(y-2) >= (int)ch_begin) ++ score[y-2] += 30 * ap_ratio; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 40 * ap_ratio; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 50 * ap_ratio; ++ if ((int)(y+2) < (int)ch_end) ++ score[y+2] += 50 * ap_ratio; ++ if ((int)(y+3) < (int)ch_end) ++ score[y+3] += 50 * ap_ratio; ++ if ((int)(y+4) < (int)ch_end) ++ score[y+4] += 50 * ap_ratio; ++ if ((int)(y+5) < (int)ch_end) ++ score[y+5] += 40 * ap_ratio; ++ if ((int)(y+6) < (int)ch_end) ++ score[y+6] += 30 * ap_ratio; ++ if ((int)(y+7) < (int)ch_end) ++ score[y+7] += 20 * ap_ratio; ++ } ++ else { ++ score[y] += 50 * ap_ratio; ++ if ((int)(y-7) >= (int)ch_begin) ++ score[y-7] += 20 * ap_ratio; ++ if ((int)(y-6) >= (int)ch_begin) ++ score[y-6] += 30 * ap_ratio; ++ if ((int)(y-5) >= (int)ch_begin) ++ score[y-5] += 40 * ap_ratio; ++ if ((int)(y-4) >= (int)ch_begin) ++ score[y-4] += 50 * ap_ratio; ++ if ((int)(y-3) >= (int)ch_begin) ++ score[y-3] += 50 * ap_ratio; ++ if ((int)(y-2) >= (int)ch_begin) ++ score[y-2] += 50 * ap_ratio; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 50 * ap_ratio; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 40 * ap_ratio; ++ if ((int)(y+2) < (int)ch_end) ++ score[y+2] += 30 * ap_ratio; ++ if ((int)(y+3) < (int)ch_end) ++ score[y+3] += 20 * ap_ratio; ++ } ++ } ++ else { ++ if ((pBss->t_stamp[1] & 0x6) == 0) { ++ score[y] += 500; ++ } ++ else if ((pBss->t_stamp[1] & 0x4) == 0) { ++ score[y] += 500; ++ if ((int)(y+1) < (int)ch_end) ++ score[y+1] += 500; ++ } ++ else { ++ score[y] += 500; ++ if ((int)(y-1) >= (int)ch_begin) ++ score[y-1] += 500; ++ } ++ } ++ break; ++ } ++ } ++ } ++ } ++ ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("\n"); ++ for (y=ch_begin; yavailable_chnl[y],score[y]); ++ printk("\n"); ++#endif ++ ++#ifdef SS_CH_LOAD_PROC ++ ++ // caculate noise level -- suggested by wilson ++ for (y=ch_begin; ychnl_ss_fa_count[y]>1000) { ++ fa_lv = 100; ++ } else if (priv->chnl_ss_fa_count[y]>500) { ++ fa_lv = 34 * (priv->chnl_ss_fa_count[y]-500) / 500 + 66; ++ } else if (priv->chnl_ss_fa_count[y]>200) { ++ fa_lv = 33 * (priv->chnl_ss_fa_count[y] - 200) / 300 + 33; ++ } else if (priv->chnl_ss_fa_count[y]>100) { ++ fa_lv = 18 * (priv->chnl_ss_fa_count[y] - 100) / 100 + 15; ++ } else { ++ fa_lv = 15 * priv->chnl_ss_fa_count[y] / 100; ++ } ++ if (priv->chnl_ss_cca_count[y]>400) { ++ cca_lv = 100; ++ } else if (priv->chnl_ss_cca_count[y]>200) { ++ cca_lv = 34 * (priv->chnl_ss_cca_count[y] - 200) / 200 + 66; ++ } else if (priv->chnl_ss_cca_count[y]>80) { ++ cca_lv = 33 * (priv->chnl_ss_cca_count[y] - 80) / 120 + 33; ++ } else if (priv->chnl_ss_cca_count[y]>40) { ++ cca_lv = 18 * (priv->chnl_ss_cca_count[y] - 40) / 40 + 15; ++ } else { ++ cca_lv = 15 * priv->chnl_ss_cca_count[y] / 40; ++ } ++ ++ priv->chnl_ss_load[y] = (((fa_lv > cca_lv)? fa_lv : cca_lv)*75+((score[y]>100)?100:score[y])*25)/100; ++ ++ DEBUG_INFO("ch:%d f=%d (%d), c=%d (%d), fl=%d, cl=%d, sc=%d, cu=%d\n", ++ priv->available_chnl[y], ++ priv->chnl_ss_fa_count[y], fa_thd, ++ priv->chnl_ss_cca_count[y], cca_thd, ++ fa_lv, ++ cca_lv, ++ score[y], ++ priv->chnl_ss_load[y]); ++ ++ } ++#endif ++ } ++#endif ++ ++choose_ch: ++ ++#ifdef DFS ++ // heavy weighted DFS channel ++ if (idx_5G_begin >= 0){ ++ for (i=idx_5G_begin; iavailable_chnl_num; i++) { ++ if (!priv->pmib->dot11DFSEntry.disable_DFS && is_DFS_channel(priv->available_chnl[i]) ++ && (score[i]!= 0xffffffff)){ ++ score[i] += 1600; ++ } ++ } ++ } ++#endif ++ ++ ++//prevent Auto Channel selecting wrong channel in 40M mode----------------- ++ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) ++ && priv->pshare->is_40m_bw) { ++#if 0 ++ if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 1) { ++ //Upper Primary Channel, cannot select the two lowest channels ++ if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) { ++ score[0] = 0xffffffff; ++ score[1] = 0xffffffff; ++ score[2] = 0xffffffff; ++ score[3] = 0xffffffff; ++ score[4] = 0xffffffff; ++ ++ score[13] = 0xffffffff; ++ score[12] = 0xffffffff; ++ score[11] = 0xffffffff; ++ } ++ ++// if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { ++// score[idx_5G_begin] = 0xffffffff; ++// score[idx_5G_begin + 1] = 0xffffffff; ++// } ++ } ++ else if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 2) { ++ //Lower Primary Channel, cannot select the two highest channels ++ if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) { ++ score[0] = 0xffffffff; ++ score[1] = 0xffffffff; ++ score[2] = 0xffffffff; ++ ++ score[13] = 0xffffffff; ++ score[12] = 0xffffffff; ++ score[11] = 0xffffffff; ++ score[10] = 0xffffffff; ++ score[9] = 0xffffffff; ++ } ++ ++// if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { ++// score[priv->available_chnl_num - 2] = 0xffffffff; ++// score[priv->available_chnl_num - 1] = 0xffffffff; ++// } ++ } ++#endif ++ for (i=0; i<=idx_2G_end; ++i) ++ if (priv->available_chnl[i] == 14) ++ score[i] = 0xffffffff; // mask chan14 ++ ++#ifdef RTK_5G_SUPPORT ++ if (idx_5G_begin >= 0) { ++ for (i=idx_5G_begin; iavailable_chnl_num; i++) { ++ int ch = priv->available_chnl[i]; ++ if(priv->available_chnl[i] > 144) ++ --ch; ++ if((ch%4) || ch==140 || ch == 164 ) //mask ch 140, ch 165, ch 184... ++ score[i] = 0xffffffff; ++ } ++ } ++#endif ++ ++ ++ } ++ ++ if (priv->pmib->dot11RFEntry.disable_ch1213) { ++ for (i=0; i<=idx_2G_end; ++i) { ++ int ch = priv->available_chnl[i]; ++ if ((ch == 12) || (ch == 13)) ++ score[i] = 0xffffffff; ++ } ++ } ++ ++ if (((priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_GLOBAL) || ++ (priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_WORLD_WIDE)) && ++ (idx_2G_end >= 11) && (idx_2G_end < 14)) { ++ score[13] = 0xffffffff; // mask chan14 ++ score[12] = 0xffffffff; // mask chan13 ++ score[11] = 0xffffffff; // mask chan12 ++ } ++ ++//------------------------------------------------------------------ ++ ++#ifdef _DEBUG_RTL8192CD_ ++ for (i=0; iavailable_chnl_num; i++) { ++ len += sprintf(tmpbuf+len, "ch%d:%u ", priv->available_chnl[i], score[i]); ++ } ++ strcat(tmpbuf, "\n"); ++ panic_printk("%s", tmpbuf); ++ ++#endif ++ ++ if ( (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) ++ && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80)) ++ { ++ for (i=0; iavailable_chnl_num; i++) { ++ if (is80MChannel(priv->available_chnl, priv->available_chnl_num, priv->available_chnl[i])) { ++ tmpScore = 0; ++ for (j=0; j<4; j++) { ++ if ((tmpScore != 0xffffffff) && (score[i+j] != 0xffffffff)) ++ tmpScore += score[i+j]; ++ else ++ tmpScore = 0xffffffff; ++ } ++ tmpScore = tmpScore / 4; ++ if (minScore > tmpScore) { ++ minScore = tmpScore; ++ ++ tmpScore = 0xffffffff; ++ for (j=0; j<4; j++) { ++ if (score[i+j] < tmpScore) { ++ tmpScore = score[i+j]; ++ tmpIdx = i+j; ++ } ++ } ++ ++ idx = tmpIdx; ++ } ++ i += 3; ++ } ++ } ++ if (minScore == 0xffffffff) { ++ // there is no 80M channels ++ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; ++ for (i=0; iavailable_chnl_num; i++) { ++ if (score[i] < minScore) { ++ minScore = score[i]; ++ idx = i; ++ } ++ } ++ } ++ } ++ else if( (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) ++ && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40)) ++ { ++ for (i=0; iavailable_chnl_num; i++) { ++ if(is40MChannel(priv->available_chnl,priv->available_chnl_num,priv->available_chnl[i])) { ++ tmpScore = 0; ++ for(j=0;j<2;j++) { ++ if ((tmpScore != 0xffffffff) && (score[i+j] != 0xffffffff)) ++ tmpScore += score[i+j]; ++ else ++ tmpScore = 0xffffffff; ++ } ++ tmpScore = tmpScore / 2; ++ if(minScore > tmpScore) { ++ minScore = tmpScore; ++ ++ tmpScore = 0xffffffff; ++ for (j=0; j<2; j++) { ++ if (score[i+j] < tmpScore) { ++ tmpScore = score[i+j]; ++ tmpIdx = i+j; ++ } ++ } ++ ++ idx = tmpIdx; ++ } ++ i += 1; ++ } ++ } ++ if (minScore == 0xffffffff) { ++ // there is no 40M channels ++ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; ++ for (i=0; iavailable_chnl_num; i++) { ++ if (score[i] < minScore) { ++ minScore = score[i]; ++ idx = i; ++ } ++ } ++ } ++ } ++ else if( (priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_2G) ++ && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40) ++ && (priv->available_chnl_num >= 8) ) ++ { ++ u4Byte groupScore[14]; ++ ++ memset(groupScore, 0xff , sizeof(groupScore)); ++ for (i=0; iavailable_chnl_num-4; i++) { ++ if (score[i] != 0xffffffff && score[i+4] != 0xffffffff) { ++ groupScore[i] = score[i] + score[i+4]; ++ DEBUG_INFO("groupScore, ch %d,%d: %d\n", i+1, i+5, groupScore[i]); ++ if (groupScore[i] < minScore) { ++#ifdef AUTOCH_SS_SPEEDUP ++ if(priv->pmib->miscEntry.autoch_1611_enable) ++ { ++ if(priv->available_chnl[i]==1 || priv->available_chnl[i]==6 || priv->available_chnl[i]==11) ++ { ++ minScore = groupScore[i]; ++ idx = i; ++ } ++ } ++ else ++#endif ++ { ++ minScore = groupScore[i]; ++ idx = i; ++ } ++ } ++ } ++ } ++ ++ if (score[idx] < score[idx+4]) { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; ++ } else { ++ idx = idx + 4; ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; ++ } ++ } ++ else ++ { ++ for (i=0; iavailable_chnl_num; i++) { ++ if (score[i] < minScore) { ++#ifdef AUTOCH_SS_SPEEDUP ++ if(priv->pmib->miscEntry.autoch_1611_enable) ++ { ++ if(priv->available_chnl[i]==1 || priv->available_chnl[i]==6 || priv->available_chnl[i]==11) ++ { ++ minScore = score[i]; ++ idx = i; ++ } ++ } ++ else ++#endif ++ { ++ minScore = score[i]; ++ idx = i; ++ } ++ } ++ } ++ } ++ ++ if (IS_A_CUT_8881A(priv) && ++ (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80)) { ++ if ((priv->available_chnl[idx] == 36) || ++ (priv->available_chnl[idx] == 52) || ++ (priv->available_chnl[idx] == 100) || ++ (priv->available_chnl[idx] == 116) || ++ (priv->available_chnl[idx] == 132) || ++ (priv->available_chnl[idx] == 149) || ++ (priv->available_chnl[idx] == 165)) ++ idx++; ++ else if ((priv->available_chnl[idx] == 48) || ++ (priv->available_chnl[idx] == 64) || ++ (priv->available_chnl[idx] == 112) || ++ (priv->available_chnl[idx] == 128) || ++ (priv->available_chnl[idx] == 144) || ++ (priv->available_chnl[idx] == 161) || ++ (priv->available_chnl[idx] == 177)) ++ idx--; ++ } ++ ++ minChan = priv->available_chnl[idx]; ++ ++ // skip channel 14 if don't support ofdm ++ if ((priv->pmib->dot11RFEntry.disable_ch14_ofdm) && ++ (minChan == 14)) { ++ score[idx] = 0xffffffff; ++ ++ minScore = 0xffffffff; ++ for (i=0; iavailable_chnl_num; i++) { ++ if (score[i] < minScore) { ++ minScore = score[i]; ++ idx = i; ++ } ++ } ++ minChan = priv->available_chnl[idx]; ++ } ++ ++#if 0 ++ //Check if selected channel available for 80M/40M BW or NOT ? ++ if(priv->pmib->dot11RFEntry.phyBandSelect == PHY_BAND_5G) ++ { ++ if(priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80) ++ { ++ if(!is80MChannel(priv->available_chnl,priv->available_chnl_num,minChan)) ++ { ++ //printk("BW=80M, selected channel = %d is unavaliable! reduce to 40M\n", minChan); ++ //priv->pmib->dot11nConfigEntry.dot11nUse40M = HT_CHANNEL_WIDTH_20_40; ++ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20_40; ++ } ++ } ++ ++ if(priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40) ++ { ++ if(!is40MChannel(priv->available_chnl,priv->available_chnl_num,minChan)) ++ { ++ //printk("BW=40M, selected channel = %d is unavaliable! reduce to 20M\n", minChan); ++ //priv->pmib->dot11nConfigEntry.dot11nUse40M = HT_CHANNEL_WIDTH_20; ++ priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; ++ } ++ } ++ } ++#endif ++ ++#ifdef CONFIG_RTL_NEW_AUTOCH ++ RTL_W32(RXERR_RPT, RXERR_RPT_RST); ++#endif ++ ++// auto adjust contro-sideband ++ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) ++ && (priv->pshare->is_40m_bw ==1 || priv->pshare->is_40m_bw ==2)) { ++ ++#ifdef RTK_5G_SUPPORT ++ if (priv->pmib->dot11RFEntry.phyBandSelect & PHY_BAND_5G) { ++ if( (minChan>144) ? ((minChan-1)%8) : (minChan%8)) { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; ++ } else { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; ++ } ++ ++ } else ++#endif ++ { ++#if 0 ++#ifdef CONFIG_RTL_NEW_AUTOCH ++ unsigned int ch_max; ++ ++ if (priv->available_chnl[idx_2G_end] >= 13) ++ ch_max = 13; ++ else ++ ch_max = priv->available_chnl[idx_2G_end]; ++ ++ if ((minChan >= 5) && (minChan <= (ch_max-5))) { ++ if (score[minChan+4] > score[minChan-4]) { // what if some channels were cancelled? ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; ++ } else { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; ++ } ++ } else ++#endif ++ { ++ if (minChan < 5) { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; ++ } ++ else if (minChan > 7) { ++ GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; ++ priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; ++ } ++ } ++#endif ++ } ++ } ++//----------------------- ++ ++#if defined(__ECOS) && defined(CONFIG_SDIO_HCI) ++ panic_printk("Auto channel choose ch:%d\n", minChan); ++#else ++#ifdef _DEBUG_RTL8192CD_ ++ panic_printk("Auto channel choose ch:%d\n", minChan); ++#endif ++#endif ++#ifdef ACS_DEBUG_INFO//for debug ++ printk("7. minChan:%d 2nd_offset:%d\n", minChan, priv->pshare->offset_2nd_chan); ++#endif ++ ++ return minChan; ++} ++*/ ++ ++#endif ++ ++VOID ++phydm_CLMInit( ++ IN PVOID pDM_VOID, ++ IN u2Byte sampleNum /*unit : 4us*/ ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_TIME_PERIOD_11AC, bMaskLWord, sampleNum); /*4us sample 1 time*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT8, 0x1); /*Enable CCX for CLM*/ ++ } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_TIME_PERIOD_11N, bMaskLWord, sampleNum); /*4us sample 1 time*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT8, 0x1); /*Enable CCX for CLM*/ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[%s] : CLM sampleNum = %d\n", __func__, sampleNum)); ++ ++} ++ ++VOID ++phydm_CLMtrigger( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT0, 0x0); /*Trigger CLM*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT0, 0x1); ++ } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT0, 0x0); /*Trigger CLM*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT0, 0x1); ++ } ++} ++ ++BOOLEAN ++phydm_checkCLMready( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32 = 0; ++ BOOLEAN ret = FALSE; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11AC, bMaskDWord); /*make sure CLM calc is ready*/ ++ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_READY_11N, bMaskDWord); /*make sure CLM calc is ready*/ ++ ++ if (value32 & BIT16) ++ ret = TRUE; ++ else ++ ret = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[%s] : CLM ready = %d\n", __func__, ret)); ++ ++ return ret; ++} ++ ++u2Byte ++phydm_getCLMresult( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32 = 0; ++ u2Byte results = 0; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11AC, bMaskDWord); /*read CLM calc result*/ ++ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11N, bMaskDWord); /*read CLM calc result*/ ++ ++ results = (u2Byte)(value32 & bMaskLWord); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[%s] : CLM result = %d\n", __func__, results)); ++ ++ return results; ++/*results are number of CCA times in sampleNum*/ ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_acs.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_acs.h +new file mode 100644 +index 0000000..d7eabda +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_acs.h +@@ -0,0 +1,129 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMACS_H__ ++#define __PHYDMACS_H__ ++ ++#define ACS_VERSION "1.0" ++#define CLM_VERSION "1.0" ++ ++#define ODM_MAX_CHANNEL_2G 14 ++#define ODM_MAX_CHANNEL_5G 24 ++ ++// For phydm_AutoChannelSelectSettingAP() ++#define STORE_DEFAULT_NHM_SETTING 0 ++#define RESTORE_DEFAULT_NHM_SETTING 1 ++#define ACS_NHM_SETTING 2 ++ ++typedef struct _ACS_ ++{ ++ BOOLEAN bForceACSResult; ++ u1Byte CleanChannel_2G; ++ u1Byte CleanChannel_5G; ++ u2Byte Channel_Info_2G[2][ODM_MAX_CHANNEL_2G]; //Channel_Info[1]: Channel Score, Channel_Info[2]:Channel_Scan_Times ++ u2Byte Channel_Info_5G[2][ODM_MAX_CHANNEL_5G]; ++ ++#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) ++ u1Byte ACS_Step; ++ // NHM Count 0-11 ++ u1Byte NHM_Cnt[14][11]; ++ ++ // AC-Series, for storing previous setting ++ u4Byte Reg0x990; ++ u4Byte Reg0x994; ++ u4Byte Reg0x998; ++ u4Byte Reg0x99C; ++ u1Byte Reg0x9A0; // u1Byte ++ ++ // N-Series, for storing previous setting ++ u4Byte Reg0x890; ++ u4Byte Reg0x894; ++ u4Byte Reg0x898; ++ u4Byte Reg0x89C; ++ u1Byte Reg0xE28; // u1Byte ++#endif ++ ++}ACS, *PACS; ++ ++ ++VOID ++odm_AutoChannelSelectInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_AutoChannelSelectReset( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_AutoChannelSelect( ++ IN PVOID pDM_VOID, ++ IN u1Byte Channel ++); ++ ++u1Byte ++ODM_GetAutoChannelSelectResult( ++ IN PVOID pDM_VOID, ++ IN u1Byte Band ++); ++ ++#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) ++ ++VOID ++phydm_AutoChannelSelectSettingAP( ++ IN PVOID pDM_VOID, ++ IN u4Byte Setting, // 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING ++ IN u4Byte acs_step ++); ++ ++VOID ++phydm_GetNHMStatisticsAP( ++ IN PVOID pDM_VOID, ++ IN u4Byte idx, // @ 2G, Real channel number = idx+1 ++ IN u4Byte acs_step ++); ++ ++#endif //#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) ++ ++ ++VOID ++phydm_CLMInit( ++ IN PVOID pDM_VOID, ++ IN u2Byte sampleNum ++); ++ ++VOID ++phydm_CLMtrigger( ++ IN PVOID pDM_VOID ++); ++ ++BOOLEAN ++phydm_checkCLMready( ++ IN PVOID pDM_VOID ++); ++ ++u2Byte ++phydm_getCLMresult( ++ IN PVOID pDM_VOID ++); ++ ++ ++#endif //#ifndef __PHYDMACS_H__ +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_adaptivity.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_adaptivity.c +new file mode 100644 +index 0000000..44d02f7 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_adaptivity.c +@@ -0,0 +1,943 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if WPP_SOFTWARE_TRACE ++#include "PhyDM_Adaptivity.tmh" ++#endif ++#endif ++ ++ ++VOID ++Phydm_CheckAdaptivity( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); ++ ++ if (pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) { ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (pDM_Odm->APTotalNum > Adaptivity->APNumTH) { ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("AP total num > %d!!, disable adaptivity\n", Adaptivity->APNumTH)); ++ } else ++#endif ++ { ++ if (Adaptivity->DynamicLinkAdaptivity == TRUE) { ++ if (pDM_Odm->bLinked && Adaptivity->bCheck == FALSE) { ++ Phydm_NHMCounterStatistics(pDM_Odm); ++ Phydm_CheckEnvironment(pDM_Odm); ++ } else if (!pDM_Odm->bLinked) ++ Adaptivity->bCheck = FALSE; ++ } else { ++ pDM_Odm->Adaptivity_enable = TRUE; ++ ++ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) ++ pDM_Odm->adaptivity_flag = FALSE; ++ else ++ pDM_Odm->adaptivity_flag = TRUE; ++ } ++ } ++ } else { ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ } ++ ++ ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++BOOLEAN ++Phydm_CheckChannelPlan( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ++ ++ if (pMgntInfo->RegEnableAdaptivity == 2) { ++ if (pDM_Odm->Carrier_Sense_enable == FALSE) { /*check domain Code for Adaptivity or CarrierSense*/ ++ if ((*pDM_Odm->pBandType == ODM_BAND_5G) && ++ !(pDM_Odm->odm_Regulation5G == REGULATION_ETSI || pDM_Odm->odm_Regulation5G == REGULATION_WW)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity skip 5G domain code : %d\n", pDM_Odm->odm_Regulation5G)); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ } else if ((*pDM_Odm->pBandType == ODM_BAND_2_4G) && ++ !(pDM_Odm->odm_Regulation2_4G == REGULATION_ETSI || pDM_Odm->odm_Regulation2_4G == REGULATION_WW)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity skip 2.4G domain code : %d\n", pDM_Odm->odm_Regulation2_4G)); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ ++ } else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity neither 2G nor 5G band, return\n")); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ } ++ } else { ++ if ((*pDM_Odm->pBandType == ODM_BAND_5G) && ++ !(pDM_Odm->odm_Regulation5G == REGULATION_MKK || pDM_Odm->odm_Regulation5G == REGULATION_WW)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense skip 5G domain code : %d\n", pDM_Odm->odm_Regulation5G)); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ } ++ ++ else if ((*pDM_Odm->pBandType == ODM_BAND_2_4G) && ++ !(pDM_Odm->odm_Regulation2_4G == REGULATION_MKK || pDM_Odm->odm_Regulation2_4G == REGULATION_WW)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense skip 2.4G domain code : %d\n", pDM_Odm->odm_Regulation2_4G)); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ ++ } else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense neither 2G nor 5G band, return\n")); ++ pDM_Odm->Adaptivity_enable = FALSE; ++ pDM_Odm->adaptivity_flag = FALSE; ++ return TRUE; ++ } ++ } ++ } ++ ++ return FALSE; ++ ++} ++#endif ++ ++VOID ++Phydm_NHMCounterStatisticsInit( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ++ /*PHY parameters initialize for n series*/ ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N + 2, 0xC350); /*0x894[31:16]=0x0xC350 Time duration for NHM unit: us, 0xc350=200ms*/ ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N + 2, 0xffff); /*0x890[31:16]=0xffff th_9, th_10*/ ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff50); /*0x898=0xffffff52 th_3, th_2, th_1, th_0*/ ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffffff); /*0x89c=0xffffffff th_7, th_6, th_5, th_4*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); /*0xe28[7:0]=0xff th_8*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10 | BIT9 | BIT8, 0x1); /*0x890[10:8]=1 ignoreCCA ignore PHYTXON enable CCX*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT7, 0x1); /*0xc0c[7]=1 max power among all RX ants*/ ++ } ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ /*PHY parameters initialize for ac series*/ ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC + 2, 0xC350); /*0x990[31:16]=0xC350 Time duration for NHM unit: us, 0xc350=200ms*/ ++ ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC + 2, 0xffff); /*0x994[31:16]=0xffff th_9, th_10*/ ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0xffffff50); /*0x998=0xffffff52 th_3, th_2, th_1, th_0*/ ++ ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffffff); /*0x99c=0xffffffff th_7, th_6, th_5, th_4*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11AC, bMaskByte0, 0xff); /*0x9a0[7:0]=0xff th_8*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8 | BIT9 | BIT10, 0x1); /*0x994[10:8]=1 ignoreCCA ignore PHYTXON enable CCX*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_9E8_11AC, BIT0, 0x1); /*0x9e8[7]=1 max power among all RX ants*/ ++ ++ } ++#endif ++} ++ ++VOID ++Phydm_NHMCounterStatistics( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) ++ return; ++ ++ /*Get NHM report*/ ++ Phydm_GetNHMCounterStatistics(pDM_Odm); ++ ++ /*Reset NHM counter*/ ++ Phydm_NHMCounterStatisticsReset(pDM_Odm); ++} ++ ++VOID ++Phydm_GetNHMCounterStatistics( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32 = 0; ++#if (RTL8195A_SUPPORT == 0) ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11AC, bMaskDWord); ++ else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++#endif ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11N, bMaskDWord); ++ ++ pDM_Odm->NHM_cnt_0 = (u1Byte)(value32 & bMaskByte0); ++ pDM_Odm->NHM_cnt_1 = (u1Byte)((value32 & bMaskByte1) >> 8); ++ ++} ++ ++VOID ++Phydm_NHMCounterStatisticsReset( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1); ++ } ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 1); ++ } ++ ++#endif ++ ++} ++ ++VOID ++Phydm_SetEDCCAThreshold( ++ IN PVOID pDM_VOID, ++ IN s1Byte H2L, ++ IN s1Byte L2H ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskByte2|bMaskByte0, (u4Byte)((u1Byte)L2H|(u1Byte)H2L<<16)); ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, bMaskLWord, (u2Byte)((u1Byte)L2H|(u1Byte)H2L<<8)); ++#endif ++ ++} ++ ++VOID ++Phydm_SetLNA( ++ IN PVOID pDM_VOID, ++ IN PhyDM_set_LNA type ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8192E)) { ++ if (type == PhyDM_disable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0x37f82); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x0000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0x37f82); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); ++ } ++ } else if (type == PhyDM_enable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0x77f82); /*back to normal*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x0000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0x77f82); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); ++ } ++ } ++ } else if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ if (type == PhyDM_disable_LNA) { ++ /*S0*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0001f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xe6137); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ /*S1*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, 0xfffff, 0x3008d); /*select Rx mode and disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x0); ++ } else if (type == PhyDM_enable_LNA) { ++ /*S0*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0001f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xe6177); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ /*S1*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, 0xfffff, 0x300bd); /*select Rx mode and disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x00020, 0x0); ++ } ++ ++ } else if (pDM_Odm->SupportICType & ODM_RTL8812) { ++ if (type == PhyDM_disable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x3f7ff); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xc22bf); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x3f7ff); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0xc22bf); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); ++ } ++ } else if (type == PhyDM_enable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x3f7ff); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xc26bf); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x3f7ff); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0xc26bf); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); ++ } ++ } ++ } else if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8881A)) { ++ if (type == PhyDM_disable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0002f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xfb09b); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ } else if (type == PhyDM_enable_LNA) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0002f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xfb0bb); /*disable LNA*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); ++ } ++ } ++} ++ ++ ++ ++VOID ++Phydm_SetTRxMux( ++ IN PVOID pDM_VOID, ++ IN PhyDM_Trx_MUX_Type txMode, ++ IN PhyDM_Trx_MUX_Type rxMode ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT3 | BIT2 | BIT1, txMode); /*set TXmod to standby mode to remove outside noise affect*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT22 | BIT21 | BIT20, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT3 | BIT2 | BIT1, txMode); /*set TXmod to standby mode to remove outside noise affect*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT22 | BIT21 | BIT20, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ ++ } ++ } ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC, BIT11 | BIT10 | BIT9 | BIT8, txMode); /*set TXmod to standby mode to remove outside noise affect*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC, BIT7 | BIT6 | BIT5 | BIT4, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC_B, BIT11 | BIT10 | BIT9 | BIT8, txMode); /*set TXmod to standby mode to remove outside noise affect*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC_B, BIT7 | BIT6 | BIT5 | BIT4, rxMode); /*set RXmod to standby mode to remove outside noise affect*/ ++ } ++ } ++#endif ++ ++} ++ ++VOID ++Phydm_MACEDCCAState( ++ IN PVOID pDM_VOID, ++ IN PhyDM_MACEDCCA_Type State ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if (State == PhyDM_IGNORE_EDCCA) { ++ ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 1); /*ignore EDCCA reg520[15]=1*/ ++ ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 0); /*reg524[11]=0*/ ++ } else { /*don't set MAC ignore EDCCA signal*/ ++ ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 0); /*don't ignore EDCCA reg520[15]=0*/ ++ ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 1); /*reg524[11]=1 */ ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("EDCCA enable State = %d\n", State)); ++ ++} ++ ++BOOLEAN ++Phydm_CalNHMcnt( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte Base = 0; ++ ++ Base = pDM_Odm->NHM_cnt_0 + pDM_Odm->NHM_cnt_1; ++ ++ if (Base != 0) { ++ pDM_Odm->NHM_cnt_0 = ((pDM_Odm->NHM_cnt_0) << 8) / Base; ++ pDM_Odm->NHM_cnt_1 = ((pDM_Odm->NHM_cnt_1) << 8) / Base; ++ } ++ if ((pDM_Odm->NHM_cnt_0 - pDM_Odm->NHM_cnt_1) >= 100) ++ return TRUE; /*clean environment*/ ++ else ++ return FALSE; /*noisy environment*/ ++ ++} ++ ++ ++VOID ++Phydm_CheckEnvironment( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); ++ BOOLEAN isCleanEnvironment = FALSE; ++ ++ if (Adaptivity->bFirstLink == TRUE) { ++ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) ++ pDM_Odm->adaptivity_flag = FALSE; ++ else ++ pDM_Odm->adaptivity_flag = TRUE; ++ ++ Adaptivity->bFirstLink = FALSE; ++ return; ++ } else { ++ if (Adaptivity->NHMWait < 3) { /*Start enter NHM after 4 NHMWait*/ ++ Adaptivity->NHMWait++; ++ Phydm_NHMCounterStatistics(pDM_Odm); ++ return; ++ } else { ++ Phydm_NHMCounterStatistics(pDM_Odm); ++ isCleanEnvironment = Phydm_CalNHMcnt(pDM_Odm); ++ if (isCleanEnvironment == TRUE) { ++ pDM_Odm->TH_L2H_ini = Adaptivity->TH_L2H_ini_backup; /*adaptivity mode*/ ++ pDM_Odm->TH_EDCCA_HL_diff = Adaptivity->TH_EDCCA_HL_diff_backup; ++ ++ pDM_Odm->Adaptivity_enable = TRUE; ++ ++ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) ++ pDM_Odm->adaptivity_flag = FALSE; ++ else ++ pDM_Odm->adaptivity_flag = TRUE; ++ } else { ++ pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; /*mode2*/ ++ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2; ++ ++ pDM_Odm->adaptivity_flag = FALSE; ++ pDM_Odm->Adaptivity_enable = FALSE; ++ } ++ Adaptivity->NHMWait = 0; ++ Adaptivity->bFirstLink = TRUE; ++ Adaptivity->bCheck = TRUE; ++ } ++ ++ } ++ ++ ++} ++ ++VOID ++Phydm_SearchPwdBLowerBound( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); ++ u4Byte value32 = 0; ++ u1Byte cnt, IGI = 0x45; /*IGI = 0x50 for cal EDCCA lower bound*/ ++ u1Byte txEdcca1 = 0, txEdcca0 = 0; ++ BOOLEAN bAdjust = TRUE; ++ s1Byte TH_L2H_dmc, TH_H2L_dmc, IGI_target = 0x32; ++ s1Byte Diff; ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) ++ Phydm_SetLNA(pDM_Odm, PhyDM_disable_LNA); ++ else { ++ Phydm_SetTRxMux(pDM_Odm, PhyDM_STANDBY_MODE, PhyDM_STANDBY_MODE); ++ odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_0, 0x7e); ++ } ++ ++ Diff = IGI_target - (s1Byte)IGI; ++ TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; ++ if (TH_L2H_dmc > 10) ++ TH_L2H_dmc = 10; ++ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; ++ ++ Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); ++ ODM_delay_ms(5); ++ ++ while (bAdjust) { ++ for (cnt = 0; cnt < 20; cnt++) { ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11N, bMaskDWord); ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC, bMaskDWord); ++#endif ++ if (value32 & BIT30 && (pDM_Odm->SupportICType & (ODM_RTL8723A | ODM_RTL8723B | ODM_RTL8188E))) ++ txEdcca1 = txEdcca1 + 1; ++ else if (value32 & BIT29) ++ txEdcca1 = txEdcca1 + 1; ++ else ++ txEdcca0 = txEdcca0 + 1; ++ } ++ ++ if (txEdcca1 > 1) { ++ IGI = IGI - 1; ++ TH_L2H_dmc = TH_L2H_dmc + 1; ++ if (TH_L2H_dmc > 10) ++ TH_L2H_dmc = 10; ++ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; ++ ++ Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); ++ if (TH_L2H_dmc == 10) { ++ bAdjust = FALSE; ++ Adaptivity->H2L_lb = TH_H2L_dmc; ++ Adaptivity->L2H_lb = TH_L2H_dmc; ++ pDM_Odm->Adaptivity_IGI_upper = IGI; ++ } ++ ++ txEdcca1 = 0; ++ txEdcca0 = 0; ++ ++ } else { ++ bAdjust = FALSE; ++ Adaptivity->H2L_lb = TH_H2L_dmc; ++ Adaptivity->L2H_lb = TH_L2H_dmc; ++ pDM_Odm->Adaptivity_IGI_upper = IGI; ++ txEdcca1 = 0; ++ txEdcca0 = 0; ++ } ++ } ++ ++ pDM_Odm->Adaptivity_IGI_upper = pDM_Odm->Adaptivity_IGI_upper - pDM_Odm->DCbackoff; ++ Adaptivity->H2L_lb = Adaptivity->H2L_lb + pDM_Odm->DCbackoff; ++ Adaptivity->L2H_lb = Adaptivity->L2H_lb + pDM_Odm->DCbackoff; ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) ++ Phydm_SetLNA(pDM_Odm, PhyDM_enable_LNA); ++ else { ++ Phydm_SetTRxMux(pDM_Odm, PhyDM_TX_MODE, PhyDM_RX_MODE); ++ odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_0, NONE); ++ } ++ ++ Phydm_SetEDCCAThreshold(pDM_Odm, 0x7f, 0x7f); /*resume to no link state*/ ++} ++ ++VOID ++Phydm_AdaptivityInit( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); ++ s1Byte IGItarget = 0x32; ++ /*pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;*/ ++#if(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ++ pDM_Odm->Carrier_Sense_enable = (BOOLEAN)pMgntInfo->RegEnableCarrierSense; ++ pDM_Odm->DCbackoff = (u1Byte)pMgntInfo->RegDCbackoff; ++ Adaptivity->DynamicLinkAdaptivity = (BOOLEAN)pMgntInfo->RegDmLinkAdaptivity; ++ Adaptivity->APNumTH = (u1Byte)pMgntInfo->RegAPNumTH; ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pDM_Odm->Carrier_Sense_enable = (pDM_Odm->Adapter->registrypriv.adaptivity_mode != 0) ? TRUE : FALSE; ++ pDM_Odm->DCbackoff = pDM_Odm->Adapter->registrypriv.adaptivity_dc_backoff; ++ Adaptivity->DynamicLinkAdaptivity = (pDM_Odm->Adapter->registrypriv.adaptivity_dml != 0) ? TRUE : FALSE; ++#endif ++ ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ ++ if (pDM_Odm->Carrier_Sense_enable == FALSE) { ++#if(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (pMgntInfo->RegL2HForAdaptivity != 0) ++ pDM_Odm->TH_L2H_ini = pMgntInfo->RegL2HForAdaptivity; ++ else ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (pDM_Odm->Adapter->registrypriv.adaptivity_th_l2h_ini != 0) ++ pDM_Odm->TH_L2H_ini = pDM_Odm->Adapter->registrypriv.adaptivity_th_l2h_ini; ++ else ++#endif ++ pDM_Odm->TH_L2H_ini = 0xf5; ++ } else ++ pDM_Odm->TH_L2H_ini = 0xa; ++ ++#if(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (pMgntInfo->RegHLDiffForAdaptivity != 0) ++ pDM_Odm->TH_EDCCA_HL_diff = pMgntInfo->RegHLDiffForAdaptivity; ++ else ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (pDM_Odm->Adapter->registrypriv.adaptivity_th_edcca_hl_diff != 0) ++ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->Adapter->registrypriv.adaptivity_th_edcca_hl_diff; ++ else ++#endif ++ pDM_Odm->TH_EDCCA_HL_diff = 7; ++ ++ Adaptivity->TH_L2H_ini_backup = pDM_Odm->TH_L2H_ini; ++ Adaptivity->TH_EDCCA_HL_diff_backup = pDM_Odm->TH_EDCCA_HL_diff; ++ ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++ if (pDM_Odm->Carrier_Sense_enable) { ++ pDM_Odm->TH_L2H_ini = 0xa; ++ pDM_Odm->TH_EDCCA_HL_diff = 7; ++ } else { ++ Adaptivity->TH_L2H_ini_backup = pDM_Odm->TH_L2H_ini; /*set by mib*/ ++ pDM_Odm->TH_EDCCA_HL_diff = 7; ++ } ++ ++ Adaptivity->TH_EDCCA_HL_diff_backup = pDM_Odm->TH_EDCCA_HL_diff; ++ if (priv->pshare->rf_ft_var.adaptivity_enable == 2) ++ Adaptivity->DynamicLinkAdaptivity = TRUE; ++ else ++ Adaptivity->DynamicLinkAdaptivity = FALSE; ++ ++#endif ++ ++ pDM_Odm->Adaptivity_IGI_upper = 0; ++ pDM_Odm->Adaptivity_enable = FALSE; /*use this flag to decide enable or disable*/ ++ ++ pDM_Odm->EDCCA_enable = TRUE; /*even no adaptivity, we still enable EDCCA*/ ++ ++ pDM_Odm->TH_L2H_ini_mode2 = 20; ++ pDM_Odm->TH_EDCCA_HL_diff_mode2 = 8; ++ ++ Adaptivity->IGI_Base = 0x32; ++ Adaptivity->IGI_target = 0x1c; ++ Adaptivity->H2L_lb = 0; ++ Adaptivity->L2H_lb = 0; ++ Adaptivity->NHMWait = 0; ++ Adaptivity->bCheck = FALSE; ++ Adaptivity->bFirstLink = TRUE; ++ Adaptivity->AdajustIGILevel = 0; ++ ++ Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); ++ ++ /*Search pwdB lower bound*/ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11N, bMaskDWord, 0x208); ++#if (RTL8195A_SUPPORT == 0) ++ else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC, bMaskDWord, 0x209); ++#endif ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_GAIN_IDX_EDCCA) { ++ /*ODM_SetBBReg(pDM_Odm, ODM_REG_EDCCA_DOWN_OPT_11N, BIT12 | BIT11 | BIT10, 0x7);*/ /*interfernce need > 2^x us, and then EDCCA will be 1*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_EDCCA_DCNF_11N, BIT21 | BIT20, 0x1); /*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ ++ } ++#if (RTL8195A_SUPPORT == 0) ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_GAIN_IDX_EDCCA) { /*8814a no need to find pwdB lower bound, maybe*/ ++ /*ODM_SetBBReg(pDM_Odm, ODM_REG_EDCCA_DOWN_OPT, BIT30 | BIT29 | BIT28, 0x7);*/ /*interfernce need > 2^x us, and then EDCCA will be 1*/ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_ACBB_EDCCA_ENHANCE, BIT29 | BIT28, 0x1); /*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ ++ } ++ ++ if(!(pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA))) ++ Phydm_SearchPwdBLowerBound(pDM_Odm); ++#endif ++ ++/*we need to consider PwdB upper bound for 8814 later IC*/ ++ Adaptivity->AdajustIGILevel = (u1Byte)((pDM_Odm->TH_L2H_ini + IGItarget) - PwdBUpperBound + DFIRloss); /*IGI = L2H - PwdB - DFIRloss*/ ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("TH_L2H_ini = 0x%x, TH_EDCCA_HL_diff = 0x%x, Adaptivity->AdajustIGILevel = 0x%x\n", pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff, Adaptivity->AdajustIGILevel)); ++ ++ /*phydm_setEDCCAThresholdAPI(pDM_Odm, pDM_DigTable->CurIGValue);*/ ++ ++} ++ ++ ++VOID ++Phydm_Adaptivity( ++ IN PVOID pDM_VOID, ++ IN u1Byte IGI ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ s1Byte TH_L2H_dmc, TH_H2L_dmc; ++ s1Byte Diff = 0, IGI_target; ++ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ BOOLEAN bFwCurrentInPSMode = FALSE; ++ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ++ ++ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); ++ ++ /*Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14.*/ ++ if (bFwCurrentInPSMode) ++ return; ++#endif ++ ++ if ((pDM_Odm->EDCCA_enable == FALSE) || (pDM_Odm->bWIFITest == TRUE)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Disable EDCCA!!!\n")); ++ return; ++ } ++ ++ if (!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("adaptivity disable, enable EDCCA mode!!!\n")); ++ pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; ++ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2; ++ } ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ else{ ++ if (Phydm_CheckChannelPlan(pDM_Odm) || (pDM_Odm->APTotalNum > Adaptivity->APNumTH)) { ++ pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; ++ pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2; ++ } ++ } ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("odm_Adaptivity() =====>\n")); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d\n", ++ Adaptivity->IGI_Base, pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff)); ++#if (RTL8195A_SUPPORT == 0) ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ++ /*fix AC series when enable EDCCA hang issue*/ ++ ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 1); /*ADC_mask disable*/ ++ ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 0); /*ADC_mask enable*/ ++ } ++#endif ++ if (*pDM_Odm->pBandWidth == ODM_BW20M) /*CHANNEL_WIDTH_20*/ ++ IGI_target = Adaptivity->IGI_Base; ++ else if (*pDM_Odm->pBandWidth == ODM_BW40M) ++ IGI_target = Adaptivity->IGI_Base + 2; ++#if (RTL8195A_SUPPORT == 0) ++ else if (*pDM_Odm->pBandWidth == ODM_BW80M) ++ IGI_target = Adaptivity->IGI_Base + 2; ++#endif ++ else ++ IGI_target = Adaptivity->IGI_Base; ++ Adaptivity->IGI_target = (u1Byte) IGI_target; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("BandWidth=%s, IGI_target=0x%x, DynamicLinkAdaptivity = %d\n", ++ (*pDM_Odm->pBandWidth == ODM_BW80M) ? "80M" : ((*pDM_Odm->pBandWidth == ODM_BW40M) ? "40M" : "20M"), IGI_target, Adaptivity->DynamicLinkAdaptivity)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("RSSI_min = %d, Adaptivity->AdajustIGILevel= 0x%x, adaptivity_flag = %d, Adaptivity_enable = %d\n", ++ pDM_Odm->RSSI_Min, Adaptivity->AdajustIGILevel, pDM_Odm->adaptivity_flag, pDM_Odm->Adaptivity_enable)); ++ ++ if ((Adaptivity->DynamicLinkAdaptivity == TRUE) && (!pDM_Odm->bLinked) && (pDM_Odm->Adaptivity_enable == FALSE)) { ++ Phydm_SetEDCCAThreshold(pDM_Odm, 0x7f, 0x7f); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("In DynamicLink mode(noisy) and No link, Turn off EDCCA!!\n")); ++ return; ++ } ++ ++ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) { ++ if ((Adaptivity->AdajustIGILevel > IGI) && (pDM_Odm->Adaptivity_enable == TRUE)) ++ Diff = Adaptivity->AdajustIGILevel - IGI; ++ ++ TH_L2H_dmc = pDM_Odm->TH_L2H_ini - Diff + IGI_target; ++ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; ++ } ++#if (RTL8195A_SUPPORT == 0) ++ else { ++ Diff = IGI_target - (s1Byte)IGI; ++ TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; ++ if (TH_L2H_dmc > 10 && (pDM_Odm->Adaptivity_enable == TRUE)) ++ TH_L2H_dmc = 10; ++ ++ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; ++ ++ /*replace lower bound to prevent EDCCA always equal 1*/ ++ if (TH_H2L_dmc < Adaptivity->H2L_lb) ++ TH_H2L_dmc = Adaptivity->H2L_lb; ++ if (TH_L2H_dmc < Adaptivity->L2H_lb) ++ TH_L2H_dmc = Adaptivity->L2H_lb; ++ } ++#endif ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d\n", IGI, TH_L2H_dmc, TH_H2L_dmc)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity_IGI_upper=0x%x, H2L_lb = 0x%x, L2H_lb = 0x%x\n", pDM_Odm->Adaptivity_IGI_upper, Adaptivity->H2L_lb, Adaptivity->L2H_lb)); ++ ++ Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); ++ return; ++} ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++Phydm_AdaptivityBSOD( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ++ u1Byte count = 0; ++ u4Byte u4Value; ++ ++ /* ++ 1. turn off RF (TRX Mux in standby mode) ++ 2. H2C mac id drop ++ 3. ignore EDCCA ++ 4. wait for clear FIFO ++ 5. don't ignore EDCCA ++ 6. turn on RF (TRX Mux in TRx mdoe) ++ 7. H2C mac id resume ++ */ ++ ++ RT_TRACE(COMP_MLME, DBG_WARNING, ("MAC id drop packet!!!!!\n")); ++ ++ pAdapter->dropPktByMacIdCnt++; ++ pMgntInfo->bDropPktInProgress = TRUE; ++ ++ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_MAX_Q_PAGE_NUM, (pu1Byte)(&u4Value)); ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Queue Reserved Page Number = 0x%08x\n", u4Value)); ++ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_AVBL_Q_PAGE_NUM, (pu1Byte)(&u4Value)); ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Available Queue Page Number = 0x%08x\n", u4Value)); ++ ++#if 1 ++ ++ /*Standby mode*/ ++ Phydm_SetTRxMux(pDM_Odm, PhyDM_STANDBY_MODE, PhyDM_STANDBY_MODE); ++ ODM_Write_DIG(pDM_Odm, 0x20); ++ ++ /*H2C mac id drop*/ ++ MacIdIndicateDisconnect(pAdapter); ++ ++ /*Ignore EDCCA*/ ++ Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); ++ ++ delay_ms(50); ++ count = 5; ++ ++#else ++ ++ do { ++ ++ u8Byte diffTime, curTime, oldestTime; ++ u1Byte queueIdx ++ ++ //3 Standby mode ++ Phydm_SetTRxMux(pDM_Odm, PhyDM_STANDBY_MODE, PhyDM_STANDBY_MODE); ++ ODM_Write_DIG(pDM_Odm, 0x20); ++ ++ //3 H2C mac id drop ++ MacIdIndicateDisconnect(pAdapter); ++ ++ //3 Ignore EDCCA ++ Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); ++ ++ count++; ++ delay_ms(10); ++ ++ // Check latest packet ++ curTime = PlatformGetCurrentTime(); ++ oldestTime = 0xFFFFFFFFFFFFFFFF; ++ ++ for (queueIdx = 0; queueIdx < MAX_TX_QUEUE; queueIdx++) { ++ if (!IS_DATA_QUEUE(queueIdx)) ++ continue; ++ ++ if (!pAdapter->bTcbBusyQEmpty[queueIdx]) { ++ RT_TRACE(COMP_MLME, DBG_WARNING, ("oldestTime = %llu\n", oldestTime)); ++ RT_TRACE(COMP_MLME, DBG_WARNING, ("Q[%d] = %llu\n", queueIdx, pAdapter->firstTcbSysTime[queueIdx])); ++ if (pAdapter->firstTcbSysTime[queueIdx] < oldestTime) ++ oldestTime = pAdapter->firstTcbSysTime[queueIdx]; ++ } ++ } ++ ++ diffTime = curTime - oldestTime; ++ ++ RT_TRACE(COMP_MLME, DBG_WARNING, ("diff s = %llu\n", (diffTime / 1000000))); ++ ++ } while (((diffTime / 1000000) >= 4) && (oldestTime != 0xFFFFFFFFFFFFFFFF)); ++#endif ++ ++ /*Resume EDCCA*/ ++ Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); ++ ++ /*Turn on TRx mode*/ ++ Phydm_SetTRxMux(pDM_Odm, PhyDM_TX_MODE, PhyDM_RX_MODE); ++ ODM_Write_DIG(pDM_Odm, 0x20); ++ ++ /*Resume H2C macid*/ ++ MacIdRecoverMediaStatus(pAdapter); ++ ++ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_AVBL_Q_PAGE_NUM, (pu1Byte)(&u4Value)); ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Available Queue Page Number = 0x%08x\n", u4Value)); ++ ++ pMgntInfo->bDropPktInProgress = FALSE; ++ RT_TRACE(COMP_MLME, DBG_WARNING, ("End of MAC id drop packet, spent %dms\n", count * 10)); ++ ++} ++ ++#endif ++ ++VOID ++phydm_setEDCCAThresholdAPI( ++ IN PVOID pDM_VOID, ++ IN u1Byte IGI ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTIVITY_STATISTICS Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY); ++ s1Byte TH_L2H_dmc, TH_H2L_dmc; ++ s1Byte Diff = 0, IGI_target = 0x32; ++ ++ if (pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) { ++ ++ if (pDM_Odm->SupportICType & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) { ++ if (Adaptivity->AdajustIGILevel > IGI) ++ Diff = Adaptivity->AdajustIGILevel - IGI; ++ ++ TH_L2H_dmc = pDM_Odm->TH_L2H_ini - Diff + IGI_target; ++ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; ++ } ++#if (RTL8195A_SUPPORT == 0) ++ else { ++ Diff = IGI_target - (s1Byte)IGI; ++ TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; ++ if (TH_L2H_dmc > 10) ++ TH_L2H_dmc = 10; ++ ++ TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; ++ ++ /*replace lower bound to prevent EDCCA always equal 1*/ ++ if (TH_H2L_dmc < Adaptivity->H2L_lb) ++ TH_H2L_dmc = Adaptivity->H2L_lb; ++ if (TH_L2H_dmc < Adaptivity->L2H_lb) ++ TH_L2H_dmc = Adaptivity->L2H_lb; ++ } ++#endif ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("API :IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d\n", IGI, TH_L2H_dmc, TH_H2L_dmc)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("API :Adaptivity_IGI_upper=0x%x, H2L_lb = 0x%x, L2H_lb = 0x%x\n", pDM_Odm->Adaptivity_IGI_upper, Adaptivity->H2L_lb, Adaptivity->L2H_lb)); ++ ++ Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); ++ } ++ ++} +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_adaptivity.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_adaptivity.h +new file mode 100644 +index 0000000..819ea34 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_adaptivity.h +@@ -0,0 +1,172 @@ ++ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMADAPTIVITY_H__ ++#define __PHYDMADAPTIVITY_H__ ++ ++#define ADAPTIVITY_VERSION "9.0" ++ ++#define PwdBUpperBound 7 ++#define DFIRloss 5 ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++typedef enum _tag_PhyDM_REGULATION_Type { ++ REGULATION_FCC = 0, ++ REGULATION_MKK = 1, ++ REGULATION_ETSI = 2, ++ REGULATION_WW = 3, ++ ++ MAX_REGULATION_NUM = 4 ++} PhyDM_REGULATION_TYPE; ++#endif ++ ++typedef enum tag_PhyDM_set_LNA { ++ PhyDM_disable_LNA = 0, ++ PhyDM_enable_LNA = 1, ++} PhyDM_set_LNA; ++ ++ ++typedef enum tag_PhyDM_TRx_MUX_Type ++{ ++ PhyDM_SHUTDOWN = 0, ++ PhyDM_STANDBY_MODE = 1, ++ PhyDM_TX_MODE = 2, ++ PhyDM_RX_MODE = 3 ++}PhyDM_Trx_MUX_Type; ++ ++typedef enum tag_PhyDM_MACEDCCA_Type ++{ ++ PhyDM_IGNORE_EDCCA = 0, ++ PhyDM_DONT_IGNORE_EDCCA = 1 ++}PhyDM_MACEDCCA_Type; ++ ++typedef struct _ADAPTIVITY_STATISTICS { ++ s1Byte TH_L2H_ini_backup; ++ s1Byte TH_EDCCA_HL_diff_backup; ++ s1Byte IGI_Base; ++ u1Byte IGI_target; ++ u1Byte NHMWait; ++ s1Byte H2L_lb; ++ s1Byte L2H_lb; ++ BOOLEAN bFirstLink; ++ BOOLEAN bCheck; ++ BOOLEAN DynamicLinkAdaptivity; ++ u1Byte APNumTH; ++ u1Byte AdajustIGILevel; ++} ADAPTIVITY_STATISTICS, *PADAPTIVITY_STATISTICS; ++ ++VOID ++Phydm_CheckAdaptivity( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Phydm_CheckEnvironment( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Phydm_NHMCounterStatisticsInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Phydm_NHMCounterStatistics( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Phydm_NHMCounterStatisticsReset( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_GetNHMCounterStatistics( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_MACEDCCAState( ++ IN PVOID pDM_VOID, ++ IN PhyDM_MACEDCCA_Type State ++); ++ ++VOID ++Phydm_SetEDCCAThreshold( ++ IN PVOID pDM_VOID, ++ IN s1Byte H2L, ++ IN s1Byte L2H ++); ++ ++VOID ++Phydm_SetTRxMux( ++ IN PVOID pDM_VOID, ++ IN PhyDM_Trx_MUX_Type txMode, ++ IN PhyDM_Trx_MUX_Type rxMode ++); ++ ++BOOLEAN ++Phydm_CalNHMcnt( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_SearchPwdBLowerBound( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_AdaptivityInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Phydm_Adaptivity( ++ IN PVOID pDM_VOID, ++ IN u1Byte IGI ++ ); ++ ++VOID ++phydm_setEDCCAThresholdAPI( ++ IN PVOID pDM_VOID, ++ IN u1Byte IGI ++); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++Phydm_DisableEDCCA( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_DynamicEDCCA( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++Phydm_AdaptivityBSOD( ++ IN PVOID pDM_VOID ++); ++ ++#endif ++ ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdect.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdect.c +new file mode 100644 +index 0000000..afa478c +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdect.c +@@ -0,0 +1,964 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++//#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) ++#if(defined(CONFIG_ANT_DETECTION)) ++ ++//IS_ANT_DETECT_SUPPORT_SINGLE_TONE(Adapter) ++//IS_ANT_DETECT_SUPPORT_RSSI(Adapter) ++//IS_ANT_DETECT_SUPPORT_PSD(Adapter) ++ ++//1 [1. Single Tone Method] =================================================== ++ ++// ++// Description: ++// Set Single/Dual Antenna default setting for products that do not do detection in advance. ++// ++// Added by Joseph, 2012.03.22 ++// ++VOID ++ODM_SingleDualAntennaDefaultSetting( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ ++ u1Byte btAntNum=BT_GetPgAntNum(pAdapter); ++ // Set default antenna A and B status ++ if(btAntNum == 2) ++ { ++ pDM_SWAT_Table->ANTA_ON=TRUE; ++ pDM_SWAT_Table->ANTB_ON=TRUE; ++ ++ } ++ else if(btAntNum == 1) ++ {// Set antenna A as default ++ pDM_SWAT_Table->ANTA_ON=TRUE; ++ pDM_SWAT_Table->ANTB_ON=FALSE; ++ ++ } ++ else ++ { ++ RT_ASSERT(FALSE, ("Incorrect antenna number!!\n")); ++ } ++} ++ ++ ++//2 8723A ANT DETECT ++// ++// Description: ++// Implement IQK single tone for RF DPK loopback and BB PSD scanning. ++// This function is cooperated with BB team Neil. ++// ++// Added by Roger, 2011.12.15 ++// ++BOOLEAN ++ODM_SingleDualAntennaDetection( ++ IN PVOID pDM_VOID, ++ IN u1Byte mode ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ u4Byte CurrentChannel,RfLoopReg; ++ u1Byte n; ++ u4Byte Reg88c, Regc08, Reg874, Regc50, Reg948, Regb2c, Reg92c, Reg930, Reg064, AFE_rRx_Wait_CCA; ++ u1Byte initial_gain = 0x5a; ++ u4Byte PSD_report_tmp; ++ u4Byte AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0; ++ BOOLEAN bResult = TRUE; ++ u4Byte AFE_Backup[16]; ++ u4Byte AFE_REG_8723A[16] = { ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN, ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth}; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection()============>\n")); ++ ++ ++ if (!(pDM_Odm->SupportICType & ODM_RTL8723B)) ++ return bResult; ++ ++ // Retrieve antenna detection registry info, added by Roger, 2012.11.27. ++ if(!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(pAdapter)) ++ return bResult; ++ ++ //1 Backup Current RF/BB Settings ++ ++ CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); ++ RfLoopReg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask); ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ Reg92c = ODM_GetBBReg(pDM_Odm, rDPDT_control, bMaskDWord); ++ Reg930 = ODM_GetBBReg(pDM_Odm, rfe_ctrl_anta_src, bMaskDWord); ++ Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord); ++ Regb2c = ODM_GetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord); ++ Reg064 = ODM_GetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29); ++ ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x1); ++ ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77); ++ ODM_SetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29, 0x1); //dbg 7 ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0x3c0, 0x0);//dbg 8 ++ ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x0); ++ } ++ ++ ODM_StallExecution(10); ++ ++ //Store A Path Register 88c, c08, 874, c50 ++ Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord); ++ Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord); ++ Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord); ++ Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); ++ ++ // Store AFE Registers ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) ++ AFE_rRx_Wait_CCA = ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA,bMaskDWord); ++ ++ //Set PSD 128 pts ++ ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pts ++ ++ // To SET CH1 to do ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x7401); //Channel 1 ++ ++ // AFE all on step ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) ++ ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x01c00016); ++ ++ // 3 wire Disable ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0); ++ ++ //BB IQK Setting ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000); ++ ++ //IQK setting tone@ 4.34Mhz ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ++ //Page B init ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150016); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150016); ++ } ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7f, initial_gain); ++ ++ //IQK Single tone start ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ ODM_StallExecution(10000); ++ ++ // PSD report of antenna A ++ PSD_report_tmp=0x0; ++ for (n=0;n<2;n++) ++ { ++ PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); ++ if(PSD_report_tmp >AntA_report) ++ AntA_report=PSD_report_tmp; ++ } ++ ++ // change to Antenna B ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ //ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x2); ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, 0x280); ++ ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x1); ++ } ++ ++ ODM_StallExecution(10); ++ ++ // PSD report of antenna B ++ PSD_report_tmp=0x0; ++ for (n=0;n<2;n++) ++ { ++ PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); ++ if(PSD_report_tmp > AntB_report) ++ AntB_report=PSD_report_tmp; ++ } ++ ++ //Close IQK Single Tone function ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ //1 Return to antanna A ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ // external DPDT ++ ODM_SetBBReg(pDM_Odm, rDPDT_control, bMaskDWord, Reg92c); ++ ++ //internal S0/S1 ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948); ++ ODM_SetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord, Regb2c); ++ ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, bMaskDWord, Reg930); ++ ODM_SetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29, Reg064); ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,CurrentChannel); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask,RfLoopReg); ++ ++ //Reload AFE Registers ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) ++ ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, AFE_rRx_Wait_CCA); ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8723B) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d\n", 2416, AntA_report)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d\n", 2416, AntB_report)); ++ ++ //2 Test Ant B based on Ant A is ON ++ if((AntA_report >= 100) && (AntB_report >= 100) && (AntA_report <= 135) && (AntB_report <= 135)) ++ { ++ u1Byte TH1=2, TH2=6; ++ ++ if((AntA_report - AntB_report < TH1) || (AntB_report - AntA_report < TH1)) ++ { ++ pDM_SWAT_Table->ANTA_ON=TRUE; ++ pDM_SWAT_Table->ANTB_ON=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Dual Antenna\n")); ++ } ++ else if(((AntA_report - AntB_report >= TH1) && (AntA_report - AntB_report <= TH2)) || ++ ((AntB_report - AntA_report >= TH1) && (AntB_report - AntA_report <= TH2))) ++ { ++ pDM_SWAT_Table->ANTA_ON=FALSE; ++ pDM_SWAT_Table->ANTB_ON=FALSE; ++ bResult = FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); ++ } ++ else ++ { ++ pDM_SWAT_Table->ANTA_ON = TRUE; ++ pDM_SWAT_Table->ANTB_ON=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Single Antenna\n")); ++ } ++ pDM_Odm->AntDetectedInfo.bAntDetected= TRUE; ++ pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report; ++ pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report; ++ pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report; ++ ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n")); ++ bResult = FALSE; ++ } ++ } ++ return bResult; ++ ++} ++ ++ ++ ++//1 [2. Scan AP RSSI Method] ================================================== ++ ++ ++ ++ ++BOOLEAN ++ODM_SwAntDivCheckBeforeLink( ++ IN PVOID pDM_VOID ++ ) ++{ ++ ++#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) ++ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ s1Byte Score = 0; ++ PRT_WLAN_BSS pTmpBssDesc, pTestBssDesc; ++ u1Byte power_target_L = 9, power_target_H = 16; ++ u1Byte tmp_power_diff = 0,power_diff = 0,avg_power_diff = 0,max_power_diff = 0,min_power_diff = 0xff; ++ u2Byte index, counter = 0; ++ static u1Byte ScanChannel; ++ u4Byte tmp_SWAS_NoLink_BK_Reg948; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ANTA_ON = (( %d )) , ANTB_ON = (( %d ))\n", pDM_Odm->DM_SWAT_Table.ANTA_ON, pDM_Odm->DM_SWAT_Table.ANTB_ON)); ++ ++ //if(HP id) ++ { ++ if(pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult==TRUE && pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("8723B RSSI-based Antenna Detection is done\n")); ++ return FALSE; ++ } ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if(pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 == 0xff) ++ pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 = ODM_Read4Byte(pDM_Odm, rS0S1_PathSwitch ); ++ } ++ } ++ ++ if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 ++ { // The ODM structure is not initialized. ++ return FALSE; ++ } ++ ++ // Retrieve antenna detection registry info, added by Roger, 2012.11.27. ++ if(!IS_ANT_DETECT_SUPPORT_RSSI(Adapter)) ++ { ++ return FALSE; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Antenna Detection: RSSI Method\n")); ++ } ++ ++ // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. ++ PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) ++ { ++ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink(): RFChangeInProgress(%x), eRFPowerState(%x)\n", ++ pMgntInfo->RFChangeInProgress, pHalData->eRFPowerState)); ++ ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ ++ return FALSE; ++ } ++ else ++ { ++ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("pDM_SWAT_Table->SWAS_NoLink_State = %d\n", pDM_SWAT_Table->SWAS_NoLink_State)); ++ //1 Run AntDiv mechanism "Before Link" part. ++ if(pDM_SWAT_Table->SWAS_NoLink_State == 0) ++ { ++ //1 Prepare to do Scan again to check current antenna state. ++ ++ // Set check state to next step. ++ pDM_SWAT_Table->SWAS_NoLink_State = 1; ++ ++ // Copy Current Scan list. ++ pMgntInfo->tmpNumBssDesc = pMgntInfo->NumBssDesc; ++ PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); ++ ++ // Go back to scan function again. ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Scan one more time\n")); ++ pMgntInfo->ScanStep=0; ++ pMgntInfo->bScanAntDetect = TRUE; ++ ScanChannel = odm_SwAntDivSelectScanChnl(Adapter); ++ ++ ++ if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) ++ { ++ if(pDM_FatTable->RxIdleAnt == MAIN_ANT) ++ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); ++ else ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ if(ScanChannel == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink(): No AP List Avaiable, Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); ++ ++ if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) ++ { ++ pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ } ++ else ++ { ++ pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ } ++ return FALSE; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink: Change to %s for testing.\n", ((pDM_FatTable->RxIdleAnt == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"))); ++ } else if (pDM_Odm->SupportICType & (ODM_RTL8723B)) { ++ /*Switch Antenna to another one.*/ ++ ++ tmp_SWAS_NoLink_BK_Reg948 = ODM_Read4Byte(pDM_Odm, rS0S1_PathSwitch); ++ ++ if ((pDM_SWAT_Table->CurAntenna == MAIN_ANT) && (tmp_SWAS_NoLink_BK_Reg948 == 0x200)) { ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, 0x280); ++ ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x1); ++ pDM_SWAT_Table->CurAntenna = AUX_ANT; ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Reg[948]= (( %x )) was in wrong state\n", tmp_SWAS_NoLink_BK_Reg948)); ++ return FALSE; ++ } ++ ODM_StallExecution(10); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Change to (( %s-ant)) for testing.\n", (pDM_SWAT_Table->CurAntenna == MAIN_ANT)?"MAIN":"AUX")); ++ } ++ ++ odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); ++ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); ++ ++ return TRUE; ++ } ++ else //pDM_SWAT_Table->SWAS_NoLink_State == 1 ++ { ++ //1 ScanComple() is called after antenna swiched. ++ //1 Check scan result and determine which antenna is going ++ //1 to be used. ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,(" tmpNumBssDesc= (( %d )) \n",pMgntInfo->tmpNumBssDesc));// debug for Dino ++ ++ for(index = 0; index < pMgntInfo->tmpNumBssDesc; index++) ++ { ++ pTmpBssDesc = &(pMgntInfo->tmpbssDesc[index]); // Antenna 1 ++ pTestBssDesc = &(pMgntInfo->bssDesc[index]); // Antenna 2 ++ ++ if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): ERROR!! This shall not happen.\n")); ++ continue; ++ } ++ ++ if(pDM_Odm->SupportICType != ODM_RTL8723B) ++ { ++ if(pTmpBssDesc->ChannelNumber == ScanChannel) ++ { ++ if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score++\n")); ++ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ++ Score++; ++ PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); ++ } ++ else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score--\n")); ++ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ Score--; ++ } ++ else ++ { ++ if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp < 5000) ++ { ++ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("The 2nd Antenna didn't get this AP\n\n")); ++ } ++ } ++ } ++ } ++ else // 8723B ++ { ++ if(pTmpBssDesc->ChannelNumber == ScanChannel) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ChannelNumber == ScanChannel -> (( %d )) \n", pTmpBssDesc->ChannelNumber )); ++ ++ if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) // Pow(Ant1) > Pow(Ant2) ++ { ++ counter++; ++ tmp_power_diff=(u1Byte)(pTmpBssDesc->RecvSignalPower - pTestBssDesc->RecvSignalPower); ++ power_diff = power_diff + tmp_power_diff; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("tmp_power_diff: (( %d)),max_power_diff: (( %d)),min_power_diff: (( %d)) \n", tmp_power_diff,max_power_diff,min_power_diff)); ++ if(tmp_power_diff > max_power_diff) ++ max_power_diff=tmp_power_diff; ++ if(tmp_power_diff < min_power_diff) ++ min_power_diff=tmp_power_diff; ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("max_power_diff: (( %d)),min_power_diff: (( %d)) \n",max_power_diff,min_power_diff)); ++ ++ PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); ++ } ++ else if(pTestBssDesc->RecvSignalPower > pTmpBssDesc->RecvSignalPower) // Pow(Ant1) < Pow(Ant2) ++ { ++ counter++; ++ tmp_power_diff=(u1Byte)(pTestBssDesc->RecvSignalPower - pTmpBssDesc->RecvSignalPower); ++ power_diff = power_diff + tmp_power_diff; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); ++ if(tmp_power_diff > max_power_diff) ++ max_power_diff=tmp_power_diff; ++ if(tmp_power_diff < min_power_diff) ++ min_power_diff=tmp_power_diff; ++ } ++ else // Pow(Ant1) = Pow(Ant2) ++ { ++ if(pTestBssDesc->bdTstamp > pTmpBssDesc->bdTstamp) // Stamp(Ant1) < Stamp(Ant2) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000)); ++ if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp > 5000) ++ { ++ counter++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); ++ ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); ++ min_power_diff = 0; ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Error !!!]: Time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000)); ++ } ++ } ++ } ++ } ++ } ++ ++ if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) ++ { ++ if(pMgntInfo->NumBssDesc!=0 && Score<0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); ++ ++ if(pDM_FatTable->RxIdleAnt == MAIN_ANT) ++ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); ++ else ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ } ++ ++ if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) ++ { ++ pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ } ++ else ++ { ++ pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ } ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if(counter == 0) ++ { ++ if(pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec == FALSE) ++ { ++ pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = TRUE; ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Counter=(( 0 )) , [[ Cannot find any AP with Aux-ant ]] -> Scan Target-channel again \n")); ++ ++ //3 [ Scan again ] ++ odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); ++ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); ++ return TRUE; ++ } ++ else// Pre_Aux_FailDetec == TRUE ++ { ++ //2 [ Single Antenna ] ++ pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = FALSE; ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Counter=(( 0 )) , [[ Still cannot find any AP ]] \n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); ++ } ++ pDM_Odm->DM_SWAT_Table.Aux_FailDetec_Counter++; ++ } ++ else ++ { ++ pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = FALSE; ++ ++ if(counter==3) ++ { ++ avg_power_diff = ((power_diff-max_power_diff - min_power_diff)>>1)+ ((max_power_diff + min_power_diff)>>2); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d )) \n", counter, power_diff)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter==3 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d )) \n", avg_power_diff,max_power_diff, min_power_diff)); ++ } ++ else if(counter>=4) ++ { ++ avg_power_diff=(power_diff-max_power_diff - min_power_diff) / (counter - 2); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d )) \n", counter, power_diff)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter>=4 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d )) \n", avg_power_diff,max_power_diff, min_power_diff)); ++ ++ } ++ else//counter==1,2 ++ { ++ avg_power_diff=power_diff/counter; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("avg_power_diff: (( %d )) , counter: (( %d )) , power_diff: (( %d )) \n", avg_power_diff,counter, power_diff)); ++ } ++ ++ //2 [ Retry ] ++ if( (avg_power_diff >=power_target_L) && (avg_power_diff <=power_target_H) ) ++ { ++ pDM_Odm->DM_SWAT_Table.Retry_Counter++; ++ ++ if(pDM_Odm->DM_SWAT_Table.Retry_Counter<=3) ++ { ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Low confidence result ]] avg_power_diff= (( %d )) -> Scan Target-channel again ]] \n", avg_power_diff)); ++ ++ //3 [ Scan again ] ++ odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); ++ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); ++ return TRUE; ++ } ++ else ++ { ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Still Low confidence result ]] (( Retry_Counter > 3 )) \n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); ++ } ++ ++ } ++ //2 [ Dual Antenna ] ++ else if( (pMgntInfo->NumBssDesc != 0) && (avg_power_diff < power_target_L) ) ++ { ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; ++ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) ++ { ++ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; ++ pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n")); ++ pDM_Odm->DM_SWAT_Table.Dual_Ant_Counter++; ++ ++ // set bt coexDM from 1ant coexDM to 2ant coexDM ++ BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 2); ++ ++ //3 [ Init antenna diversity ] ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ ODM_AntDivInit(pDM_Odm); ++ } ++ //2 [ Single Antenna ] ++ else if(avg_power_diff > power_target_H) ++ { ++ pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; ++ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE) ++ { ++ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; ++ pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE; ++ //BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 1); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); ++ pDM_Odm->DM_SWAT_Table.Single_Ant_Counter++; ++ } ++ } ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("bResult=(( %d ))\n",pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Dual_Ant_Counter = (( %d )), Single_Ant_Counter = (( %d )) , Retry_Counter = (( %d )) , Aux_FailDetec_Counter = (( %d ))\n\n\n", ++ pDM_Odm->DM_SWAT_Table.Dual_Ant_Counter,pDM_Odm->DM_SWAT_Table.Single_Ant_Counter,pDM_Odm->DM_SWAT_Table.Retry_Counter,pDM_Odm->DM_SWAT_Table.Aux_FailDetec_Counter)); ++ ++ //2 recover the antenna setting ++ ++ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, (pDM_SWAT_Table->SWAS_NoLink_BK_Reg948)); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("bResult=(( %d )), Recover Reg[948]= (( %x )) \n\n",pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult, pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 )); ++ ++ ++ } ++ ++ // Check state reset to default and wait for next time. ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ pMgntInfo->bScanAntDetect = FALSE; ++ ++ return FALSE; ++ } ++ ++#else ++ return FALSE; ++#endif ++ ++return FALSE; ++} ++ ++ ++ ++ ++ ++ ++//1 [3. PSD Method] ========================================================== ++ ++ ++ ++ ++u4Byte ++odm_GetPSDData( ++ IN PVOID pDM_VOID, ++ IN u2Byte point, ++ IN u1Byte initial_gain) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte psd_report; ++ ++ ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); //Start PSD calculation, Reg808[22]=0->1 ++ ODM_StallExecution(150);//Wait for HW PSD report ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0);//Stop PSD calculation, Reg808[22]=1->0 ++ psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;//Read PSD report, Reg8B4[15:0] ++ ++ psd_report = (u4Byte) (odm_ConvertTo_dB(psd_report));//+(u4Byte)(initial_gain); ++ return psd_report; ++} ++ ++ ++ ++VOID ++ODM_SingleDualAntennaDetection_PSD( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte Channel_ori; ++ u1Byte initial_gain = 0x36; ++ u1Byte tone_idx; ++ u1Byte Tone_lenth_1=7, Tone_lenth_2=4; ++ u2Byte Tone_idx_1[7]={88, 104, 120, 8, 24, 40, 56}; ++ u2Byte Tone_idx_2[4]={8, 24, 40, 56}; ++ u4Byte PSD_report_Main[11]={0}, PSD_report_Aux[11]={0}; ++ //u1Byte Tone_lenth_1=4, Tone_lenth_2=2; ++ //u2Byte Tone_idx_1[4]={88, 120, 24, 56}; ++ //u2Byte Tone_idx_2[2]={ 24, 56}; ++ //u4Byte PSD_report_Main[6]={0}, PSD_report_Aux[6]={0}; ++ ++ u4Byte PSD_report_temp,MAX_PSD_report_Main=0,MAX_PSD_report_Aux=0; ++ u4Byte PSD_power_threshold; ++ u4Byte Main_psd_result=0, Aux_psd_result=0; ++ u4Byte Regc50, Reg948, Regb2c,Regc14,Reg908; ++ u4Byte i=0,test_num=8; ++ ++ ++ if(pDM_Odm->SupportICType != ODM_RTL8723B) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection_PSD()============> \n")); ++ ++ //2 [ Backup Current RF/BB Settings ] ++ ++ Channel_ori = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); ++ Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord); ++ Regb2c = ODM_GetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord); ++ Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); ++ Regc14 = ODM_GetBBReg(pDM_Odm, 0xc14, bMaskDWord); ++ Reg908 = ODM_GetBBReg(pDM_Odm, 0x908, bMaskDWord); ++ ++ //2 [ Setting for doing PSD function (CH4)] ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); //disable whole CCK block ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // Turn off TX -> Pause TX Queue ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); // [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] ++ ++ // PHYTXON while loop ++ ODM_SetBBReg(pDM_Odm, 0x908, bMaskDWord, 0x803); ++ while (ODM_GetBBReg(pDM_Odm, 0xdf4, BIT6)) ++ { ++ i++; ++ if (i > 1000000) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Wait in %s() more than %d times!\n", __FUNCTION__, i)); ++ break; ++ } ++ } ++ ++ ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, initial_gain); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); // Set RF to CH4 & 40M ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0xf); // 3 wire Disable 88c[23:20]=0xf ++ ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pt //Set PSD 128 ptss ++ ODM_StallExecution(3000); ++ ++ ++ //2 [ Doing PSD Function in (CH4)] ++ ++ //Antenna A ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH4)\n")); ++ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x200); ++ ODM_StallExecution(10); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dbg\n")); ++ for (i=0;iPSD_report_Main[tone_idx] ) ++ PSD_report_Main[tone_idx]+=PSD_report_temp; ++ } ++ } ++ //Antenna B ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH4)\n")); ++ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x280); ++ ODM_StallExecution(10); ++ for (i=0;iPSD_report_Aux[tone_idx] ) ++ PSD_report_Aux[tone_idx]+=PSD_report_temp; ++ } ++ } ++ //2 [ Doing PSD Function in (CH8)] ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0x0); // 3 wire enable 88c[23:20]=0x0 ++ ODM_StallExecution(3000); ++ ++ ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, initial_gain); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); // Set RF to CH8 & 40M ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0xf); // 3 wire Disable 88c[23:20]=0xf ++ ODM_StallExecution(3000); ++ ++ //Antenna A ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH8)\n")); ++ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x200); ++ ODM_StallExecution(10); ++ ++ for (i=0;iPSD_report_Main[tone_idx] ) ++ PSD_report_Main[Tone_lenth_1+tone_idx]+=PSD_report_temp; ++ } ++ } ++ ++ //Antenna B ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH8)\n")); ++ ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x280); ++ ODM_StallExecution(10); ++ ++ for (i=0;iPSD_report_Aux[tone_idx] ) ++ PSD_report_Aux[Tone_lenth_1+tone_idx]+=PSD_report_temp; ++ } ++ } ++ ++ //2 [ Calculate Result ] ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nMain PSD Result: (ALL) \n")); ++ for (tone_idx=0;tone_idx<(Tone_lenth_1+Tone_lenth_2);tone_idx++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d, \n",(tone_idx+1), PSD_report_Main[tone_idx] )); ++ Main_psd_result+= PSD_report_Main[tone_idx]; ++ if(PSD_report_Main[tone_idx]>MAX_PSD_report_Main) ++ MAX_PSD_report_Main=PSD_report_Main[tone_idx]; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Main= (( %d ))\n", Main_psd_result)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Main = (( %d ))\n", MAX_PSD_report_Main)); ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nAux PSD Result: (ALL) \n")); ++ for (tone_idx=0;tone_idx<(Tone_lenth_1+Tone_lenth_2);tone_idx++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d, \n",(tone_idx+1), PSD_report_Aux[tone_idx] )); ++ Aux_psd_result+= PSD_report_Aux[tone_idx]; ++ if(PSD_report_Aux[tone_idx]>MAX_PSD_report_Aux) ++ MAX_PSD_report_Aux=PSD_report_Aux[tone_idx]; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Aux= (( %d ))\n", Aux_psd_result)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Aux = (( %d ))\n\n", MAX_PSD_report_Aux)); ++ ++ //Main_psd_result=Main_psd_result-MAX_PSD_report_Main; ++ //Aux_psd_result=Aux_psd_result-MAX_PSD_report_Aux; ++ PSD_power_threshold=(Main_psd_result*7)>>3; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Main_result , Aux_result ] = [ %d , %d ], PSD_power_threshold=(( %d ))\n", Main_psd_result, Aux_psd_result,PSD_power_threshold)); ++ ++ //3 [ Dual Antenna ] ++ if(Aux_psd_result >= PSD_power_threshold ) ++ { ++ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) ++ { ++ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; ++ pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n")); ++ ++ // set bt coexDM from 1ant coexDM to 2ant coexDM ++ //BT_SetBtCoexAntNum(pAdapter, BT_COEX_ANT_TYPE_DETECTED, 2); ++ ++ // Init antenna diversity ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ ODM_AntDivInit(pDM_Odm); ++ } ++ //3 [ Single Antenna ] ++ else ++ { ++ if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE) ++ { ++ pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; ++ pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); ++ } ++ ++ //2 [ Recover all parameters ] ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,Channel_ori); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0x0); // 3 wire enable 88c[23:20]=0x0 ++ ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, Regc50); ++ ++ ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948); ++ ODM_SetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord, Regb2c); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); //enable whole CCK block ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x0); //Turn on TX // Resume TX Queue ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, Regc14); // [ Set IQK Matrix = 0 ] equivalent to [ Turn on CCA] ++ ODM_SetBBReg(pDM_Odm, 0x908, bMaskDWord, Reg908); ++ ++ return; ++ ++} ++ ++#endif ++void ++odm_SwAntDetectInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if(defined(CONFIG_ANT_DETECTION)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ ++ //pDM_SWAT_Table->PreAntenna = MAIN_ANT; ++ //pDM_SWAT_Table->CurAntenna = MAIN_ANT; ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ pDM_SWAT_Table->Pre_Aux_FailDetec = FALSE; ++ pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 = 0xff; ++#endif ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdect.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdect.h +new file mode 100644 +index 0000000..8cf60e8 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdect.h +@@ -0,0 +1,98 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMANTDECT_H__ ++#define __PHYDMANTDECT_H__ ++ ++#define ANTDECT_VERSION "2.1" /*2015.07.29 by YuChen*/ ++ ++#if(defined(CONFIG_ANT_DETECTION)) ++//#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) ++//ANT Test ++#define ANTTESTALL 0x00 /*Ant A or B will be Testing*/ ++#define ANTTESTA 0x01 /*Ant A will be Testing*/ ++#define ANTTESTB 0x02 /*Ant B will be testing*/ ++ ++#define MAX_ANTENNA_DETECTION_CNT 10 ++ ++ ++typedef struct _ANT_DETECTED_INFO{ ++ BOOLEAN bAntDetected; ++ u4Byte dBForAntA; ++ u4Byte dBForAntB; ++ u4Byte dBForAntO; ++}ANT_DETECTED_INFO, *PANT_DETECTED_INFO; ++ ++ ++typedef enum tag_SW_Antenna_Switch_Definition ++{ ++ Antenna_A = 1, ++ Antenna_B = 2, ++ Antenna_MAX = 3, ++}DM_SWAS_E; ++ ++ ++ ++//1 [1. Single Tone Method] =================================================== ++ ++ ++ ++VOID ++ODM_SingleDualAntennaDefaultSetting( ++ IN PVOID pDM_VOID ++ ); ++ ++BOOLEAN ++ODM_SingleDualAntennaDetection( ++ IN PVOID pDM_VOID, ++ IN u1Byte mode ++ ); ++ ++//1 [2. Scan AP RSSI Method] ================================================== ++ ++#define SwAntDivCheckBeforeLink ODM_SwAntDivCheckBeforeLink ++ ++BOOLEAN ++ODM_SwAntDivCheckBeforeLink( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++ ++ ++//1 [3. PSD Method] ========================================================== ++ ++ ++VOID ++ODM_SingleDualAntennaDetection_PSD( ++ IN PVOID pDM_VOID ++); ++ ++#endif ++ ++VOID ++odm_SwAntDetectInit( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++#endif ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdiv.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdiv.c +new file mode 100644 +index 0000000..afe8752 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdiv.c +@@ -0,0 +1,4787 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++//====================================================== ++// when antenna test utility is on or some testing need to disable antenna diversity ++// call this function to disable all ODM related mechanisms which will switch antenna. ++//====================================================== ++VOID ++ODM_StopAntennaSwitchDm( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ // disable ODM antenna diversity ++ pDM_Odm->SupportAbility &= ~ODM_BB_ANT_DIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("STOP Antenna Diversity \n")); ++} ++ ++VOID ++ODM_SetAntConfig( ++ IN PVOID pDM_VOID, ++ IN u1Byte antSetting // 0=A, 1=B, 2=C, .... ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if(antSetting == 0) // ant A ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); ++ else if(antSetting == 1) ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++ } ++} ++ ++//====================================================== ++ ++ ++VOID ++ODM_SwAntDivRestAfterLink( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u4Byte i; ++ ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { ++ ++ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; ++ pDM_SWAT_Table->RSSI_Trying = 0; ++ pDM_SWAT_Table->Double_chk_flag= 0; ++ ++ pDM_FatTable->RxIdleAnt=MAIN_ANT; ++ ++ for (i=0; iMainAnt_Sum[i] = 0; ++ pDM_FatTable->AuxAnt_Sum[i] = 0; ++ pDM_FatTable->MainAnt_Cnt[i] = 0; ++ pDM_FatTable->AuxAnt_Cnt[i] = 0; ++ } ++ ++ } ++} ++ ++ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++VOID ++odm_AntDiv_on_off( ++ IN PVOID pDM_VOID , ++ IN u1Byte swch ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if(pDM_FatTable->AntDiv_OnOff != swch) ++ { ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) ++ return; ++ ++ if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) N-Series HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, swch); //OFDM AntDiv function block enable ++ ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, swch); //CCK AntDiv function block enable ++ } ++ else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) AC-Series HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); ++ if (pDM_Odm->SupportICType == ODM_RTL8812) { ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, swch); //OFDM AntDiv function block enable ++ ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, swch); //CCK AntDiv function block enable ++ } else { ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, swch); //OFDM AntDiv function block enable ++ ++ if( (pDM_Odm->CutVersion >= ODM_CUT_C) && (pDM_Odm->SupportICType == ODM_RTL8821) && ( pDM_Odm->AntDivType != S0S1_SW_ANTDIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) CCK HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); ++ ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, swch); ++ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, swch); //CCK AntDiv function block enable ++ } ++ } ++ } ++ } ++ pDM_FatTable->AntDiv_OnOff =swch; ++ ++} ++ ++VOID ++phydm_FastTraining_enable( ++ IN PVOID pDM_VOID, ++ IN u1Byte swch ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte enable; ++ ++ if (swch == FAT_ON) ++ enable=1; ++ else ++ enable=0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Fast Ant Training_en = ((%d))\n", enable)); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) { ++ ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, enable); /*enable fast training*/ ++ /**/ ++ } else if (pDM_Odm->SupportICType == ODM_RTL8192E) { ++ ODM_SetBBReg(pDM_Odm, 0xB34 , BIT28, enable); /*enable fast training (path-A)*/ ++ /*ODM_SetBBReg(pDM_Odm, 0xB34 , BIT29, enable);*/ /*enable fast training (path-B)*/ ++ } else if (pDM_Odm->SupportICType == ODM_RTL8821) { ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT19, enable); /*enable fast training */ ++ /**/ ++ } ++} ++ ++VOID ++odm_Tx_By_TxDesc_or_Reg( ++ IN PVOID pDM_VOID, ++ IN u1Byte swch ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte enable; ++ ++ enable = (swch == TX_BY_DESC) ? 1 : 0; ++ ++ if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) ++ { ++ if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, enable); ++ } ++ else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, enable); ++ } ++ } ++} ++ ++VOID ++ODM_UpdateRxIdleAnt( ++ IN PVOID pDM_VOID, ++ IN u1Byte Ant ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u4Byte DefaultAnt, OptionalAnt,value32; ++ ++ if(pDM_FatTable->RxIdleAnt != Ant) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] RxIdleAnt =%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ++ if(!(pDM_Odm->SupportICType & ODM_RTL8723B)) ++ pDM_FatTable->RxIdleAnt = Ant; ++ ++ if(Ant == MAIN_ANT) ++ { ++ DefaultAnt = ANT1_2G; ++ OptionalAnt = ANT2_2G; ++ } ++ else ++ { ++ DefaultAnt = ANT2_2G; ++ OptionalAnt = ANT1_2G; ++ } ++ ++ if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) ++ { ++ if(pDM_Odm->SupportICType==ODM_RTL8192E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT5|BIT4|BIT3, DefaultAnt); //Default RX ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT8|BIT7|BIT6, OptionalAnt);//Optional RX ++ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt);//Default TX ++ } ++ #if (RTL8723B_SUPPORT == 1) ++ else if (pDM_Odm->SupportICType == ODM_RTL8723B) { ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0x948, 0xFFF); ++ ++ if(value32 !=0x280) ++ ODM_UpdateRxIdleAnt_8723B(pDM_Odm, Ant, DefaultAnt, OptionalAnt); ++ else { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to 0x948 = 0x280\n")); ++ /**/ ++ } ++ } ++ #endif ++ else { /*8188E & 8188F*/ ++ ++ #if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ phydm_update_rx_idle_antenna_8188F(pDM_Odm, DefaultAnt); ++ /**/ ++ } ++ #endif ++ ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, DefaultAnt); /*Default RX*/ ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, OptionalAnt); /*Optional RX*/ ++ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt); /*Default TX*/ ++ } ++ } ++ else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) ++ { ++ u2Byte value16 = ODM_Read2Byte(pDM_Odm, ODM_REG_TRMUX_11AC+2); ++ // ++ // 2014/01/14 MH/Luke.Lee Add direct write for register 0xc0a to prevnt ++ // incorrect 0xc08 bit0-15 .We still not know why it is changed. ++ // ++ value16 &= ~(BIT11|BIT10|BIT9|BIT8|BIT7|BIT6|BIT5|BIT4|BIT3); ++ value16 |= ((u2Byte)DefaultAnt <<3); ++ value16 |= ((u2Byte)OptionalAnt <<6); ++ value16 |= ((u2Byte)DefaultAnt <<9); ++ ODM_Write2Byte(pDM_Odm, ODM_REG_TRMUX_11AC+2, value16); ++ /* ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT21|BIT20|BIT19, DefaultAnt); //Default RX ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT24|BIT23|BIT22, OptionalAnt);//Optional RX ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT27|BIT26|BIT25, DefaultAnt); //Default TX ++ */ ++ } ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8188E) ++ { ++ ODM_SetMACReg(pDM_Odm, 0x6D8 , BIT7|BIT6, DefaultAnt); //PathA Resp Tx ++ } ++ else ++ { ++ ODM_SetMACReg(pDM_Odm, 0x6D8 , BIT10|BIT9|BIT8, DefaultAnt); //PathA Resp Tx ++ } ++ ++ } ++ else// pDM_FatTable->RxIdleAnt == Ant ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Stay in Ori-Ant ] RxIdleAnt =%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ pDM_FatTable->RxIdleAnt = Ant; ++ } ++} ++ ++VOID ++odm_UpdateTxAnt( ++ IN PVOID pDM_VOID, ++ IN u1Byte Ant, ++ IN u4Byte MacId ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u1Byte TxAnt; ++ ++ if (pDM_Odm->AntDivType==CG_TRX_SMART_ANTDIV) ++ { ++ TxAnt=Ant; ++ } ++ else ++ { ++ if(Ant == MAIN_ANT) ++ TxAnt = ANT1_2G; ++ else ++ TxAnt = ANT2_2G; ++ } ++ ++ pDM_FatTable->antsel_a[MacId] = TxAnt&BIT0; ++ pDM_FatTable->antsel_b[MacId] = (TxAnt&BIT1)>>1; ++ pDM_FatTable->antsel_c[MacId] = (TxAnt&BIT2)>>2; ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tx from TxInfo]: MacID:(( %d )), TxAnt = (( %s ))\n", MacId,(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=(( 3'b%d%d%d ))\n",pDM_FatTable->antsel_c[MacId] , pDM_FatTable->antsel_b[MacId] , pDM_FatTable->antsel_a[MacId] )); ++ ++} ++ ++#ifdef BEAMFORMING_SUPPORT ++#if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++VOID ++odm_BDC_Init( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pBDC_T pDM_BdcTable=&pDM_Odm->DM_BdcTable; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n[ BDC Initialization......] \n")); ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ pDM_BdcTable->BDC_Mode=BDC_MODE_NULL; ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDCcoexType_wBfer=0; ++ pDM_Odm->bdc_holdstate=0xff; ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xd7c , 0x0FFFFFFF, 0x1081008); ++ ODM_SetBBReg(pDM_Odm, 0xd80 , 0x0FFFFFFF, 0); ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x9b0 , 0x0FFFFFFF, 0x1081008); //0x9b0[30:0] = 01081008 ++ ODM_SetBBReg(pDM_Odm, 0x9b4 , 0x0FFFFFFF, 0); //0x9b4[31:0] = 00000000 ++ } ++ ++} ++ ++ ++VOID ++odm_CSI_on_off( ++ IN PVOID pDM_VOID, ++ IN u1Byte CSI_en ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(CSI_en==CSI_ON) ++ { ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ ODM_SetMACReg(pDM_Odm, 0xd84 , BIT11, 1); //0xd84[11]=1 ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ ODM_SetMACReg(pDM_Odm, 0x9b0 , BIT31, 1); //0x9b0[31]=1 ++ } ++ ++ } ++ else if(CSI_en==CSI_OFF) ++ { ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ ODM_SetMACReg(pDM_Odm, 0xd84 , BIT11, 0); //0xd84[11]=0 ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ ODM_SetMACReg(pDM_Odm, 0x9b0 , BIT31, 0); //0x9b0[31]=0 ++ } ++ } ++} ++ ++VOID ++odm_BDCcoexType_withBferClient( ++ IN PVOID pDM_VOID, ++ IN u1Byte swch ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; ++ u1Byte BDCcoexType_wBfer; ++ ++ if(swch==DIVON_CSIOFF) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[BDCcoexType: 1] {DIV,CSI} ={1,0} \n")); ++ BDCcoexType_wBfer=1; ++ ++ if(BDCcoexType_wBfer != pDM_BdcTable->BDCcoexType_wBfer) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ odm_CSI_on_off(pDM_Odm,CSI_OFF); ++ pDM_BdcTable->BDCcoexType_wBfer=1; ++ } ++ } ++ else if(swch==DIVOFF_CSION) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[BDCcoexType: 2] {DIV,CSI} ={0,1}\n")); ++ BDCcoexType_wBfer=2; ++ ++ if(BDCcoexType_wBfer != pDM_BdcTable->BDCcoexType_wBfer) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ odm_CSI_on_off(pDM_Odm,CSI_ON); ++ pDM_BdcTable->BDCcoexType_wBfer=2; ++ } ++ } ++} ++ ++VOID ++odm_BF_AntDiv_ModeArbitration( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; ++ u1Byte current_BDC_Mode; ++ ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n")); ++ ++ //2 Mode 1 ++ if((pDM_BdcTable->num_Txbfee_Client !=0) && (pDM_BdcTable->num_Txbfer_Client == 0)) ++ { ++ current_BDC_Mode=BDC_MODE_1; ++ ++ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) ++ { ++ pDM_BdcTable->BDC_Mode=BDC_MODE_1; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ pDM_BdcTable->BDC_RxIdleUpdate_counter=1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode1 ))\n")); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode1 ))\n")); ++ } ++ //2 Mode 2 ++ else if((pDM_BdcTable->num_Txbfee_Client ==0) && (pDM_BdcTable->num_Txbfer_Client != 0)) ++ { ++ current_BDC_Mode=BDC_MODE_2; ++ ++ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) ++ { ++ pDM_BdcTable->BDC_Mode=BDC_MODE_2; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ pDM_BdcTable->BDC_Try_flag=0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode2 ))\n")); ++ ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode2 ))\n")); ++ } ++ //2 Mode 3 ++ else if((pDM_BdcTable->num_Txbfee_Client !=0) && (pDM_BdcTable->num_Txbfer_Client != 0)) ++ { ++ current_BDC_Mode=BDC_MODE_3; ++ ++ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) ++ { ++ pDM_BdcTable->BDC_Mode=BDC_MODE_3; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_RxIdleUpdate_counter=1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode3 ))\n")); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode3 ))\n")); ++ } ++ //2 Mode 4 ++ else if((pDM_BdcTable->num_Txbfee_Client ==0) && (pDM_BdcTable->num_Txbfer_Client == 0)) ++ { ++ current_BDC_Mode=BDC_MODE_4; ++ ++ if(current_BDC_Mode != pDM_BdcTable->BDC_Mode) ++ { ++ pDM_BdcTable->BDC_Mode=BDC_MODE_4; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to (( Mode4 ))\n")); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Antdiv + BF coextance Mode] : (( Mode4 ))\n")); ++ } ++ #endif ++ ++} ++ ++VOID ++odm_DivTrainState_setting( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pBDC_T pDM_BdcTable=&pDM_Odm->DM_BdcTable; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n*****[S T A R T ]***** [2-0. DIV_TRAIN_STATE] \n")); ++ pDM_BdcTable->BDC_Try_counter =2; ++ pDM_BdcTable->BDC_Try_flag=1; ++ pDM_BdcTable->BDC_state=BDC_BFer_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++} ++ ++VOID ++odm_BDCcoex_BFeeRxDiv_Arbitration( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; ++ BOOLEAN StopBF_flag; ++ u1Byte BDC_active_Mode; ++ ++ ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***{ num_BFee, num_BFer , num_Client} = (( %d , %d , %d)) \n",pDM_BdcTable->num_Txbfee_Client,pDM_BdcTable->num_Txbfer_Client,pDM_BdcTable->num_Client)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***{ num_BF_tars, num_DIV_tars } = (( %d , %d )) \n",pDM_BdcTable->num_BfTar , pDM_BdcTable->num_DivTar )); ++ ++ //2 [ MIB control ] ++ if (pDM_Odm->bdc_holdstate==2) ++ { ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ pDM_BdcTable->BDC_state=BDC_BF_HOLD_STATE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Force in [ BF STATE] \n")); ++ return; ++ } ++ else if (pDM_Odm->bdc_holdstate==1) ++ { ++ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Force in [ DIV STATE] \n")); ++ return; ++ } ++ ++ //------------------------------------------------------------ ++ ++ ++ ++ //2 Mode 2 & 3 ++ if(pDM_BdcTable->BDC_Mode==BDC_MODE_2 ||pDM_BdcTable->BDC_Mode==BDC_MODE_3) ++ { ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n{ Try_flag , Try_counter } = { %d , %d } \n",pDM_BdcTable->BDC_Try_flag,pDM_BdcTable->BDC_Try_counter)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BDCcoexType = (( %d )) \n\n", pDM_BdcTable->BDCcoexType_wBfer)); ++ ++ // All Client have Bfer-Cap------------------------------- ++ if(pDM_BdcTable->num_Txbfer_Client == pDM_BdcTable->num_Client) //BFer STA Only?: yes ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BFer STA only? (( Yes ))\n")); ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ return; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BFer STA only? (( No ))\n")); ++ } ++ // ++ if(pDM_BdcTable->bAll_BFSta_Idle==FALSE && pDM_BdcTable->bAll_DivSta_Idle==TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("All DIV-STA are idle, but BF-STA not\n")); ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_BFer_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ return; ++ } ++ else if(pDM_BdcTable->bAll_BFSta_Idle==TRUE && pDM_BdcTable->bAll_DivSta_Idle==FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("All BF-STA are idle, but DIV-STA not\n")); ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ return; ++ } ++ ++ //Select active mode-------------------------------------- ++ if(pDM_BdcTable->num_BfTar ==0) // Selsect_1, Selsect_2 ++ { ++ if(pDM_BdcTable->num_DivTar ==0) // Selsect_3 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 1 )) \n")); ++ pDM_BdcTable->BDC_active_Mode=1; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 2 ))\n")); ++ pDM_BdcTable->BDC_active_Mode=2; ++ } ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ return; ++ } ++ else // num_BfTar > 0 ++ { ++ if(pDM_BdcTable->num_DivTar ==0) // Selsect_3 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 3 ))\n")); ++ pDM_BdcTable->BDC_active_Mode=3; ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_BFer_TRAIN_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ return; ++ } ++ else // Selsect_4 ++ { ++ BDC_active_Mode=4; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Select active mode (( 4 ))\n")); ++ ++ if(BDC_active_Mode!=pDM_BdcTable->BDC_active_Mode) ++ { ++ pDM_BdcTable->BDC_active_Mode=4; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Change to active mode (( 4 )) & return!!! \n")); ++ return; ++ } ++ } ++ } ++ ++#if 1 ++ if (pDM_Odm->bdc_holdstate==0xff) ++ { ++ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Force in [ DIV STATE] \n")); ++ return; ++ } ++#endif ++ ++ // Does Client number changed ? ------------------------------- ++ if(pDM_BdcTable->num_Client !=pDM_BdcTable->pre_num_Client) ++ { ++ pDM_BdcTable->BDC_Try_flag=0; ++ pDM_BdcTable->BDC_state=BDC_DIV_TRAIN_STATE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ The number of client has been changed !!!] return to (( BDC_DIV_TRAIN_STATE )) \n")); ++ } ++ pDM_BdcTable->pre_num_Client=pDM_BdcTable->num_Client; ++ ++ if( pDM_BdcTable->BDC_Try_flag==0) ++ { ++ //2 DIV_TRAIN_STATE (Mode 2-0) ++ if(pDM_BdcTable->BDC_state==BDC_DIV_TRAIN_STATE) ++ { ++ odm_DivTrainState_setting( pDM_Odm); ++ } ++ //2 BFer_TRAIN_STATE (Mode 2-1) ++ else if(pDM_BdcTable->BDC_state==BDC_BFer_TRAIN_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-1. BFer_TRAIN_STATE ]***** \n")); ++ ++ //if(pDM_BdcTable->num_BfTar==0) ++ //{ ++ // ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( No )), [ BDC_BFer_TRAIN_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); ++ // odm_DivTrainState_setting( pDM_Odm); ++ //} ++ //else //num_BfTar != 0 ++ //{ ++ pDM_BdcTable->BDC_Try_counter=2; ++ pDM_BdcTable->BDC_Try_flag=1; ++ pDM_BdcTable->BDC_state=BDC_DECISION_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( Yes )), [ BDC_BFer_TRAIN_STATE ] >> [BDC_DECISION_STATE] \n")); ++ //} ++ } ++ //2 DECISION_STATE (Mode 2-2) ++ else if(pDM_BdcTable->BDC_state==BDC_DECISION_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-2. DECISION_STATE]***** \n")); ++ //if(pDM_BdcTable->num_BfTar==0) ++ //{ ++ // ODM_AntDiv_Printk(("BF_tars exist? : (( No )), [ DECISION_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); ++ // odm_DivTrainState_setting( pDM_Odm); ++ //} ++ //else //num_BfTar != 0 ++ //{ ++ if(pDM_BdcTable->BF_pass==FALSE || pDM_BdcTable->DIV_pass == FALSE) ++ StopBF_flag=TRUE; ++ else ++ StopBF_flag=FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( Yes )), {BF_pass, DIV_pass, StopBF_flag } = { %d, %d, %d } \n" ,pDM_BdcTable->BF_pass,pDM_BdcTable->DIV_pass,StopBF_flag)); ++ ++ if(StopBF_flag==TRUE) //DIV_en ++ { ++ pDM_BdcTable->BDC_Hold_counter=10; //20 ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ StopBF_flag= ((TRUE)), BDC_DECISION_STATE ] >> [BDC_DIV_HOLD_STATE] \n")); ++ } ++ else //BF_en ++ { ++ pDM_BdcTable->BDC_Hold_counter=10; //20 ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ pDM_BdcTable->BDC_state=BDC_BF_HOLD_STATE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[StopBF_flag= ((FALSE)), BDC_DECISION_STATE ] >> [BDC_BF_HOLD_STATE] \n")); ++ } ++ //} ++ } ++ //2 BF-HOLD_STATE (Mode 2-3) ++ else if(pDM_BdcTable->BDC_state==BDC_BF_HOLD_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-3. BF_HOLD_STATE ]*****\n")); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BDC_Hold_counter = (( %d )) \n",pDM_BdcTable->BDC_Hold_counter )); ++ ++ if(pDM_BdcTable->BDC_Hold_counter==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); ++ odm_DivTrainState_setting( pDM_Odm); ++ } ++ else ++ { ++ pDM_BdcTable->BDC_Hold_counter--; ++ ++ //if(pDM_BdcTable->num_BfTar==0) ++ //{ ++ // ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( No )), [ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); ++ // odm_DivTrainState_setting( pDM_Odm); ++ //} ++ //else //num_BfTar != 0 ++ //{ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BF_tars exist? : (( Yes ))\n")); ++ pDM_BdcTable->BDC_state=BDC_BF_HOLD_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVOFF_CSION); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_BF_HOLD_STATE ] >> [BDC_BF_HOLD_STATE] \n")); ++ //} ++ } ++ ++ } ++ //2 DIV-HOLD_STATE (Mode 2-4) ++ else if(pDM_BdcTable->BDC_state==BDC_DIV_HOLD_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*****[2-4. DIV_HOLD_STATE ]*****\n")); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("BDC_Hold_counter = (( %d )) \n",pDM_BdcTable->BDC_Hold_counter )); ++ ++ if(pDM_BdcTable->BDC_Hold_counter==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE] \n")); ++ odm_DivTrainState_setting( pDM_Odm); ++ } ++ else ++ { ++ pDM_BdcTable->BDC_Hold_counter--; ++ pDM_BdcTable->BDC_state=BDC_DIV_HOLD_STATE; ++ odm_BDCcoexType_withBferClient( pDM_Odm, DIVON_CSIOFF); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_HOLD_STATE] \n")); ++ } ++ ++ } ++ ++ } ++ else if( pDM_BdcTable->BDC_Try_flag==1) ++ { ++ //2 Set Training Counter ++ if(pDM_BdcTable->BDC_Try_counter >1) ++ { ++ pDM_BdcTable->BDC_Try_counter--; ++ if(pDM_BdcTable->BDC_Try_counter ==1) ++ pDM_BdcTable->BDC_Try_flag=0; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training !!\n")); ++ //return ; ++ } ++ ++ } ++ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n[end]\n")); ++ ++ #endif //#if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ ++ ++ ++ ++ ++} ++ ++#endif ++#endif //#ifdef BEAMFORMING_SUPPORT ++ ++ ++#if (RTL8188E_SUPPORT == 1) ++ ++ ++VOID ++odm_RX_HWAntDiv_Init_88E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv ++ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); // 1:CG, 0:CS ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CGCS_RX_HW_ANTDIV]\n")); ++ ++ //MAC Setting ++ value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); ++ ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output ++ //Pin Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW ++ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 1); //Regb2c[22]=1'b0 //disable CS/CG switch ++ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only ++ //OFDM Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); ++ //CCK Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples ++ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , 0xFFFF, 0x0001); //antenna mapping table ++ ++ pDM_FatTable->enable_ctrl_frame_antdiv = 1; ++} ++ ++VOID ++odm_TRX_HWAntDiv_Init_88E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, 0); //Default RX (0/1) ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CG_TRX_HW_ANTDIV (SPDT)]\n")); ++ ++ //MAC Setting ++ value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); ++ ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output ++ //Pin Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW ++ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch ++ ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only ++ //OFDM Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); ++ //CCK Settings ++ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples ++ ++ //antenna mapping table ++ if(!pDM_Odm->bIsMPChip) //testchip ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 ++ } ++ else //MPchip ++ ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , bMaskDWord, 0x0201); /*Reg914=3'b010, Reg915=3'b001*/ ++ ++ pDM_FatTable->enable_ctrl_frame_antdiv = 1; ++} ++ ++ ++#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++VOID ++odm_Smart_HWAntDiv_Init_88E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte value32, i; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CG_TRX_SMART_ANTDIV]\n")); ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->AntDivType: %d\n", pDM_Odm->AntDivType)); ++ return; ++ } ++ ++ pDM_FatTable->TrainIdx = 0; ++ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; ++ ++ pDM_Odm->fat_comb_a=5; ++ pDM_Odm->antdiv_intvl = 0x64; // 100ms ++ ++ for(i=0; i<6; i++) ++ { ++ pDM_FatTable->Bssid[i] = 0; ++ } ++ for(i=0; i< (pDM_Odm->fat_comb_a) ; i++) ++ { ++ pDM_FatTable->antSumRSSI[i] = 0; ++ pDM_FatTable->antRSSIcnt[i] = 0; ++ pDM_FatTable->antAveRSSI[i] = 0; ++ } ++ ++ //MAC Setting ++ value32 = ODM_GetMACReg(pDM_Odm, 0x4c, bMaskDWord); ++ ODM_SetMACReg(pDM_Odm, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output ++ value32 = ODM_GetMACReg(pDM_Odm, 0x7B4, bMaskDWord); ++ ODM_SetMACReg(pDM_Odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); //Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match ++ //value32 = PlatformEFIORead4Byte(Adapter, 0x7B4); ++ //PlatformEFIOWrite4Byte(Adapter, 0x7b4, value32|BIT18); //append MACID in reponse packet ++ ++ //Match MAC ADDR ++ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, 0); ++ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, 0); ++ ++ ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW ++ ODM_SetBBReg(pDM_Odm, 0xb2c , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch ++ ODM_SetBBReg(pDM_Odm, 0xb2c , BIT31, 0); //Regb2c[31]=1'b1 //output at CS only ++ ODM_SetBBReg(pDM_Odm, 0xca4 , bMaskDWord, 0x000000a0); ++ ++ //antenna mapping table ++ if(pDM_Odm->fat_comb_a == 2) ++ { ++ if(!pDM_Odm->bIsMPChip) //testchip ++ { ++ ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 ++ ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 ++ } ++ else //MPchip ++ { ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 1); ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 2); ++ } ++ } ++ else ++ { ++ if(!pDM_Odm->bIsMPChip) //testchip ++ { ++ ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 0); //Reg858[10:8]=3'b000 ++ ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 1); //Reg858[13:11]=3'b001 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT16, 0); ++ ODM_SetBBReg(pDM_Odm, 0x858 , BIT15|BIT14, 2); //(Reg878[0],Reg858[14:15])=3'b010 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT19|BIT18|BIT17, 3);//Reg878[3:1]=3b'011 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT22|BIT21|BIT20, 4);//Reg878[6:4]=3b'100 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT25|BIT24|BIT23, 5);//Reg878[9:7]=3b'101 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT28|BIT27|BIT26, 6);//Reg878[12:10]=3b'110 ++ ODM_SetBBReg(pDM_Odm, 0x878 , BIT31|BIT30|BIT29, 7);//Reg878[15:13]=3b'111 ++ } ++ else //MPchip ++ { ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 4); // 0: 3b'000 ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 2); // 1: 3b'001 ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte2, 0); // 2: 3b'010 ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte3, 1); // 3: 3b'011 ++ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte0, 3); // 4: 3b'100 ++ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte1, 5); // 5: 3b'101 ++ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte2, 6); // 6: 3b'110 ++ ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte3, 255); // 7: 3b'111 ++ } ++ } ++ ++ //Default Ant Setting when no fast training ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, 0); //Default RX ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, 1); //Optional RX ++ ODM_SetBBReg(pDM_Odm, 0x860 , BIT14|BIT13|BIT12, 0);//Default TX ++ ++ //Enter Traing state ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT2|BIT1|BIT0, (pDM_Odm->fat_comb_a-1)); //Reg864[2:0]=3'd6 //ant combination=reg864[2:0]+1 ++ ++ //SW Control ++ //PHY_SetBBReg(Adapter, 0x864 , BIT10, 1); ++ //PHY_SetBBReg(Adapter, 0x870 , BIT9, 1); ++ //PHY_SetBBReg(Adapter, 0x870 , BIT8, 1); ++ //PHY_SetBBReg(Adapter, 0x864 , BIT11, 1); ++ //PHY_SetBBReg(Adapter, 0x860 , BIT9, 0); ++ //PHY_SetBBReg(Adapter, 0x860 , BIT8, 0); ++} ++#endif ++ ++#endif //#if (RTL8188E_SUPPORT == 1) ++ ++ ++#if (RTL8192E_SUPPORT == 1) ++VOID ++odm_RX_HWAntDiv_Init_92E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 0); //r_rxdiv_enable_anta Regc50[8]=1'b0 0: control by c50[9] ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT9, 1); // 1:CG, 0:CS ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8192E AntDiv_Init => AntDivType=[CGCS_RX_HW_ANTDIV]\n")); ++ ++ //Pin Settings ++ ODM_SetBBReg(pDM_Odm, 0x870 , BIT8, 0);//Reg870[8]=1'b0, // "antsel" is controled by HWs ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 1); //Regc50[8]=1'b1 //" CS/CG switching" is controled by HWs ++ ++ //Mapping table ++ ODM_SetBBReg(pDM_Odm, 0x914 , 0xFFFF, 0x0100); //antenna mapping table ++ ++ //OFDM Settings ++ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF000, 0x0); //bias ++ ++ //CCK Settings ++ ODM_SetBBReg(pDM_Odm, 0xa04 , 0xF000000, 0); //Select which path to receive for CCK_1 & CCK_2 ++ ODM_SetBBReg(pDM_Odm, 0xb34 , BIT30, 0); //(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 ++ ODM_SetBBReg(pDM_Odm, 0xa74 , BIT7, 1); //Fix CCK PHY status report issue ++ ODM_SetBBReg(pDM_Odm, 0xa0c , BIT4, 1); //CCK complete HW AntDiv within 64 samples ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ //EVM enhance AntDiv method init---------------------------------------------------------------------- ++ pDM_FatTable->EVM_method_enable=0; ++ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; ++ pDM_Odm->antdiv_intvl = 0x64; ++ ODM_SetBBReg(pDM_Odm, 0x910 , 0x3f, 0xf ); ++ pDM_Odm->antdiv_evm_en=1; ++ //pDM_Odm->antdiv_period=1; ++ ++ #endif ++ ++} ++ ++VOID ++odm_TRX_HWAntDiv_Init_92E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 0); //r_rxdiv_enable_anta Regc50[8]=1'b0 0: control by c50[9] ++ ODM_SetBBReg(pDM_Odm, 0xc50 , BIT9, 1); // 1:CG, 0:CS ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8192E AntDiv_Init => AntDivType=[ Only for DIR605, CG_TRX_HW_ANTDIV]\n")); ++ ++ //3 --RFE pin setting--------- ++ //[MAC] ++ ODM_SetMACReg(pDM_Odm, 0x38, BIT11, 1); //DBG PAD Driving control (GPIO 8) ++ ODM_SetMACReg(pDM_Odm, 0x4c, BIT23, 0); //path-A , RFE_CTRL_3 ++ ODM_SetMACReg(pDM_Odm, 0x4c, BIT29, 1); //path-A , RFE_CTRL_8 ++ //[BB] ++ ODM_SetBBReg(pDM_Odm, 0x944 , BIT3, 1); //RFE_buffer ++ ODM_SetBBReg(pDM_Odm, 0x944 , BIT8, 1); ++ ODM_SetBBReg(pDM_Odm, 0x940 , BIT7|BIT6, 0x0); // r_rfe_path_sel_ (RFE_CTRL_3) ++ ODM_SetBBReg(pDM_Odm, 0x940 , BIT17|BIT16, 0x0); // r_rfe_path_sel_ (RFE_CTRL_8) ++ ODM_SetBBReg(pDM_Odm, 0x944 , BIT31, 0); //RFE_buffer ++ ODM_SetBBReg(pDM_Odm, 0x92C , BIT3, 0); //rfe_inv (RFE_CTRL_3) ++ ODM_SetBBReg(pDM_Odm, 0x92C , BIT8, 1); //rfe_inv (RFE_CTRL_8) ++ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF000, 0x8); //path-A , RFE_CTRL_3 ++ ODM_SetBBReg(pDM_Odm, 0x934 , 0xF, 0x8); //path-A , RFE_CTRL_8 ++ //3 ------------------------- ++ ++ //Pin Settings ++ ODM_SetBBReg(pDM_Odm, 0xC50 , BIT8, 0); //path-A //disable CS/CG switch ++ ++/* Let it follows PHY_REG for bit9 setting ++ if(pDM_Odm->priv->pshare->rf_ft_var.use_ext_pa || pDM_Odm->priv->pshare->rf_ft_var.use_ext_lna) ++ ODM_SetBBReg(pDM_Odm, 0xC50 , BIT9, 1);//path-A //output at CS ++ else ++ ODM_SetBBReg(pDM_Odm, 0xC50 , BIT9, 0); //path-A //output at CG ->normal power ++*/ ++ ++ ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0); //path-A //antsel antselb by HW ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT10, 0); //path-A //antsel2 by HW ++ ++ //Mapping table ++ ODM_SetBBReg(pDM_Odm, 0x914 , 0xFFFF, 0x0100); //antenna mapping table ++ ++ //OFDM Settings ++ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF000, 0x0); //bias ++ ++ //CCK Settings ++ ODM_SetBBReg(pDM_Odm, 0xa04 , 0xF000000, 0); //Select which path to receive for CCK_1 & CCK_2 ++ ODM_SetBBReg(pDM_Odm, 0xb34 , BIT30, 0); //(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 ++ ODM_SetBBReg(pDM_Odm, 0xa74 , BIT7, 1); //Fix CCK PHY status report issue ++ ODM_SetBBReg(pDM_Odm, 0xa0c , BIT4, 1); //CCK complete HW AntDiv within 64 samples ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ //EVM enhance AntDiv method init---------------------------------------------------------------------- ++ pDM_FatTable->EVM_method_enable=0; ++ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; ++ pDM_Odm->antdiv_intvl = 0x64; ++ ODM_SetBBReg(pDM_Odm, 0x910 , 0x3f, 0xf ); ++ pDM_Odm->antdiv_evm_en=1; ++ //pDM_Odm->antdiv_period=1; ++ #endif ++} ++ ++#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++VOID ++odm_Smart_HWAntDiv_Init_92E( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8192E AntDiv_Init => AntDivType=[CG_TRX_SMART_ANTDIV]\n")); ++} ++#endif ++ ++#endif //#if (RTL8192E_SUPPORT == 1) ++ ++ ++#if (RTL8723B_SUPPORT == 1) ++VOID ++odm_TRX_HWAntDiv_Init_8723B( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8723B AntDiv_Init => AntDivType=[CG_TRX_HW_ANTDIV(DPDT)]\n")); ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); ++ ++ //OFDM HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , 0x7FF, 0xa0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , 0x7FF000, 0x00); //bias ++ ++ //CCK HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ++ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ++ ++ //BT Coexistence ++ ODM_SetBBReg(pDM_Odm, 0x864, BIT12, 0); //keep antsel_map when GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x874 , BIT23, 0); //Disable hw antsw & fast_train.antsw when GNT_BT=1 ++ ++ //Output Pin Settings ++ ODM_SetBBReg(pDM_Odm, 0x870 , BIT8, 0); // ++ ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0); //WL_BB_SEL_BTG_TRXG_anta, (1: HW CTRL 0: SW CTRL) ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT7, 0); ++ ++ ODM_SetMACReg(pDM_Odm, 0x40 , BIT3, 1); ++ ODM_SetMACReg(pDM_Odm, 0x38 , BIT11, 1); ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT24|BIT23, 2); //select DPDT_P and DPDT_N as output pin ++ ++ ODM_SetBBReg(pDM_Odm, 0x944 , BIT0|BIT1, 3); //in/out ++ ODM_SetBBReg(pDM_Odm, 0x944 , BIT31, 0); // ++ ++ ODM_SetBBReg(pDM_Odm, 0x92C , BIT1, 0); //DPDT_P non-inverse ++ ODM_SetBBReg(pDM_Odm, 0x92C , BIT0, 1); //DPDT_N inverse ++ ++ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF0, 8); // DPDT_P = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF, 8); // DPDT_N = ANTSEL[0] ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ++ //2 [--For HW Bug Setting] ++ if(pDM_Odm->AntType == ODM_AUTO_ANT) ++ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable ++ ++} ++ ++ ++ ++VOID ++odm_S0S1_SWAntDiv_Init_8723B( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8723B AntDiv_Init => AntDivType=[ S0S1_SW_AntDiv] \n")); ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); ++ ++ //Output Pin Settings ++ //ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0x1); ++ ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0); ++ ++ pDM_FatTable->bBecomeLinked =FALSE; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; ++ pDM_SWAT_Table->Double_chk_flag = 0; ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ++ //2 [--For HW Bug Setting] ++ ODM_SetBBReg(pDM_Odm, 0x80C , BIT21, 0); //TX Ant by Reg ++ ++} ++ ++VOID ++ODM_UpdateRxIdleAnt_8723B( ++ IN PVOID pDM_VOID, ++ IN u1Byte Ant, ++ IN u4Byte DefaultAnt, ++ IN u4Byte OptionalAnt ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u1Byte count=0; ++ u1Byte u1Temp; ++ u1Byte H2C_Parameter; ++ ++ if((!pDM_Odm->bLinked) && (pDM_Odm->AntType == ODM_AUTO_ANT)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to no link\n")); ++ return; ++ } ++ ++#if 0 ++ // Send H2C command to FW ++ // Enable wifi calibration ++ H2C_Parameter = TRUE; ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_WIFI_CALIBRATION, 1, &H2C_Parameter); ++ ++ // Check if H2C command sucess or not (0x1e6) ++ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e6); ++ while((u1Temp != 0x1) && (count < 100)) ++ { ++ ODM_delay_us(10); ++ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e6); ++ count++; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: H2C command status = %d, count = %d\n", u1Temp, count)); ++ ++ if(u1Temp == 0x1) ++ { ++ // Check if BT is doing IQK (0x1e7) ++ count = 0; ++ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e7); ++ while((!(u1Temp & BIT0)) && (count < 100)) ++ { ++ ODM_delay_us(50); ++ u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e7); ++ count++; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: BT IQK status = %d, count = %d\n", u1Temp, count)); ++ ++ if(u1Temp & BIT0) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0x1); ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT9, DefaultAnt); ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, DefaultAnt); //Default RX ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, OptionalAnt); //Optional RX ++ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt); //Default TX ++ pDM_FatTable->RxIdleAnt = Ant; ++ ++ // Set TX AGC by S0/S1 ++ // Need to consider Linux driver ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pAdapter->HalFunc.SetTxPowerLevelHandler(pAdapter, pHalData->CurrentChannel); ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ rtw_hal_set_tx_power_level(pAdapter, pHalData->CurrentChannel); ++#endif ++ ++ // Set IQC by S0/S1 ++ ODM_SetIQCbyRFpath(pDM_Odm,DefaultAnt); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Sucess to set RX antenna\n")); ++ } ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to BT IQK\n")); ++ } ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to H2C command fail\n")); ++ ++ // Send H2C command to FW ++ // Disable wifi calibration ++ H2C_Parameter = FALSE; ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_WIFI_CALIBRATION, 1, &H2C_Parameter); ++#else ++ ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0x1); ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT9, DefaultAnt); ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, DefaultAnt); /*Default RX*/ ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, OptionalAnt); /*Optional RX*/ ++ ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt); /*Default TX*/ ++ pDM_FatTable->RxIdleAnt = Ant; ++ ++ /* Set TX AGC by S0/S1 */ ++ /* Need to consider Linux driver */ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pAdapter->HalFunc.SetTxPowerLevelHandler(pAdapter, pHalData->CurrentChannel); ++ #elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ rtw_hal_set_tx_power_level(pAdapter, pHalData->CurrentChannel); ++ #endif ++ ++ /* Set IQC by S0/S1 */ ++ ODM_SetIQCbyRFpath(pDM_Odm, DefaultAnt); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Success to set RX antenna\n")); ++ ++#endif ++} ++ ++BOOLEAN ++phydm_IsBtEnable_8723b( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte bt_state; ++ /*u4Byte reg75;*/ ++ ++ /*reg75 = ODM_GetBBReg(pDM_Odm, 0x74 , BIT8);*/ ++ /*ODM_SetBBReg(pDM_Odm, 0x74 , BIT8, 0x0);*/ ++ ODM_SetBBReg(pDM_Odm, 0xa0 , BIT24|BIT25|BIT26, 0x5); ++ bt_state = ODM_GetBBReg(pDM_Odm, 0xa0 , (BIT3|BIT2|BIT1|BIT0)); ++ /*ODM_SetBBReg(pDM_Odm, 0x74 , BIT8, reg75);*/ ++ ++ if ((bt_state == 4) || (bt_state == 7) || (bt_state == 9) || (bt_state == 13)) ++ return TRUE; ++ else ++ return FALSE; ++} ++#endif //#if (RTL8723B_SUPPORT == 1) ++ ++#if (RTL8821A_SUPPORT == 1) ++#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++VOID ++phydm_hl_smart_ant_type1_init_8821a( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u4Byte value32; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8821A SmartAnt_Init => AntDivType=[Hong-Lin Smart Ant Type1]\n")); ++ ++ /*---------------------------------------- ++ GPIO 2-3 for Beam control ++ reg0x66[2]=0 ++ reg0x44[27:26] = 0 ++ reg0x44[23:16] //enable_output for P_GPIO[7:0] ++ reg0x44[15:8] //output_value for P_GPIO[7:0] ++ reg0x40[1:0] = 0 //GPIO function ++ ------------------------------------------*/ ++ ++ /*GPIO Setting*/ ++ ODM_SetMACReg(pDM_Odm, 0x64 , BIT18, 0); ++ ODM_SetMACReg(pDM_Odm, 0x44 , BIT27|BIT26, 0); ++ ODM_SetMACReg(pDM_Odm, 0x44 , BIT19|BIT18, 0x3); /*enable_output for P_GPIO[3:2]*/ ++ /*ODM_SetMACReg(pDM_Odm, 0x44 , BIT11|BIT10, 0);*/ /*output value*/ ++ ODM_SetMACReg(pDM_Odm, 0x40 , BIT1|BIT0, 0); /*GPIO function*/ ++ ++ /*Hong_lin smart antenna HW Setting*/ ++ pdm_sat_table->data_codeword_bit_num = 24;/*max=32*/ ++ pdm_sat_table->beam_patten_num_each_ant = 4; ++ ++ #if DEV_BUS_TYPE == RT_SDIO_INTERFACE ++ pdm_sat_table->latch_time = 100; /*mu sec*/ ++ #elif DEV_BUS_TYPE == RT_USB_INTERFACE ++ pdm_sat_table->latch_time = 100; /*mu sec*/ ++ #endif ++ pdm_sat_table->pkt_skip_statistic_en = 0; ++ ++ pdm_sat_table->ant_num = 2;/*max=8*/ ++ ++ pdm_sat_table->fix_beam_pattern_en = 0; ++ pdm_sat_table->decision_holding_period = 0; ++ ++ /*beam training setting*/ ++ pdm_sat_table->pkt_counter = 0; ++ pdm_sat_table->per_beam_training_pkt_num = 10; ++ ++ /*set default beam*/ ++ pdm_sat_table->fast_training_beam_num = 0; ++ pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num; ++ phydm_set_all_ant_same_beam_num(pDM_Odm); ++ ++ pDM_FatTable->FAT_State = FAT_BEFORE_LINK_STATE; ++ ++ /*[BB] FAT Setting*/ ++ ODM_SetBBReg(pDM_Odm, 0xc08 , BIT18|BIT17|BIT16, pdm_sat_table->ant_num); ++ ODM_SetBBReg(pDM_Odm, 0xc08 , BIT31, 0); /*increase ant num every FAT period 0:+1, 1+2*/ ++ ODM_SetBBReg(pDM_Odm, 0x8c4 , BIT2|BIT1, 1); /*change cca antenna timming threshold if no CCA occurred: 0:200ms / 1:100ms / 2:no use / 3: 300*/ ++ ODM_SetBBReg(pDM_Odm, 0x8c4 , BIT0, 1); /*FAT_watchdog_en*/ ++ ++ value32 = ODM_GetMACReg(pDM_Odm, 0x7B4, bMaskDWord); ++ ODM_SetMACReg(pDM_Odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); /*Reg7B4[16]=1 enable antenna training */ ++ /*Reg7B4[17]=1 enable match MAC Addr*/ ++ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, 0);/*Match MAC ADDR*/ ++ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, 0); ++ ++} ++#endif ++ ++VOID ++odm_TRX_HWAntDiv_Init_8821A( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8821A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (DPDT)] \n")); ++ ++ //Output Pin Settings ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); ++ ++ ODM_SetMACReg(pDM_Odm, 0x64 , BIT29, 1); //PAPE by WLAN control ++ ODM_SetMACReg(pDM_Odm, 0x64 , BIT28, 1); //LNAON by WLAN control ++ ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , bMaskDWord, 0x77775745); ++ ODM_SetBBReg(pDM_Odm, 0xCB8 , BIT16, 0); ++ ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT23, 0); //select DPDT_P and DPDT_N as output pin ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT24, 1); //by WLAN control ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF, 8); // DPDT_P = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF0, 8); // DPDT_N = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT29, 0); //DPDT_P non-inverse ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT28, 1); //DPDT_N inverse ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); ++ ++ //OFDM HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x10); //bias ++ ++ //CCK HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ++ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ++ ++ ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //ANTSEL_CCK sent to the smart_antenna circuit ++ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable ++ ++ //BT Coexistence ++ ODM_SetBBReg(pDM_Odm, 0xCAC , BIT9, 1); //keep antsel_map when GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x804 , BIT4, 1); //Disable hw antsw & fast_train.antsw when GNT_BT=1 ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns ++ ++ //response TX ant by RX ant ++ ODM_SetMACReg(pDM_Odm, 0x668 , BIT3, 1); ++ ++} ++ ++VOID ++odm_S0S1_SWAntDiv_Init_8821A( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8821A AntDiv_Init => AntDivType=[ S0S1_SW_AntDiv]\n")); ++ ++ //Output Pin Settings ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); ++ ++ ODM_SetMACReg(pDM_Odm, 0x64 , BIT29, 1); //PAPE by WLAN control ++ ODM_SetMACReg(pDM_Odm, 0x64 , BIT28, 1); //LNAON by WLAN control ++ ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , bMaskDWord, 0x77775745); ++ ODM_SetBBReg(pDM_Odm, 0xCB8 , BIT16, 0); ++ ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT23, 0); //select DPDT_P and DPDT_N as output pin ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT24, 1); //by WLAN control ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF, 8); // DPDT_P = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF0, 8); // DPDT_N = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT29, 0); //DPDT_P non-inverse ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT28, 1); //DPDT_N inverse ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); ++ ++ //OFDM HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x10); //bias ++ ++ //CCK HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ++ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ++ ++ ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //ANTSEL_CCK sent to the smart_antenna circuit ++ ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable ++ ++ //BT Coexistence ++ ODM_SetBBReg(pDM_Odm, 0xCAC , BIT9, 1); //keep antsel_map when GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x804 , BIT4, 1); //Disable hw antsw & fast_train.antsw when GNT_BT=1 ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns ++ ++ //response TX ant by RX ant ++ ODM_SetMACReg(pDM_Odm, 0x668 , BIT3, 1); ++ ++ ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); ++ ++ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; ++ pDM_SWAT_Table->Double_chk_flag = 0; ++ pDM_SWAT_Table->CurAntenna = MAIN_ANT; ++ pDM_SWAT_Table->PreAntenna = MAIN_ANT; ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ ++} ++#endif //#if (RTL8821A_SUPPORT == 1) ++ ++#if (RTL8881A_SUPPORT == 1) ++VOID ++odm_RX_HWAntDiv_Init_8881A( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8881A AntDiv_Init => AntDivType=[ CGCS_RX_HW_ANTDIV] \n")); ++ ++} ++ ++VOID ++odm_TRX_HWAntDiv_Init_8881A( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8881A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (SPDT)] \n")); ++ ++ //Output Pin Settings ++ // [SPDT related] ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); ++ ODM_SetMACReg(pDM_Odm, 0x4C , BIT26, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT31, 0); //delay buffer ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT22, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT24, 1); ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF00, 8); // DPDT_P = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF0000, 8); // DPDT_N = ANTSEL[0] ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); ++ ++ //OFDM HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x0); //bias ++ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns ++ ++ //CCK HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ++ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ++ //2 [--For HW Bug Setting] ++ ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); //TX Ant by Reg // A-cut bug ++} ++ ++#endif //#if (RTL8881A_SUPPORT == 1) ++ ++ ++#if (RTL8812A_SUPPORT == 1) ++VOID ++odm_TRX_HWAntDiv_Init_8812A( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8812A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (SPDT)] \n")); ++ ++ //3 //3 --RFE pin setting--------- ++ //[BB] ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT10|BIT9|BIT8, 0x0); //disable SW switch ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT17|BIT16, 0x0); ++ ODM_SetBBReg(pDM_Odm, 0x974 , BIT7|BIT6, 0x3); // in/out ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT31, 0); //delay buffer ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT26, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT27, 1); ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF000000, 8); // DPDT_P = ANTSEL[0] ++ ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF0000000, 8); // DPDT_N = ANTSEL[0] ++ //3 ------------------------- ++ ++ //Mapping Table ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); ++ ++ //OFDM HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ++ ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x0); //bias ++ ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns ++ ++ //CCK HW AntDiv Parameters ++ ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ++ ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ++ ++ //Timming issue ++ ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ++ ++ //2 [--For HW Bug Setting] ++ ++ ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); //TX Ant by Reg // A-cut bug ++ ++} ++ ++#endif //#if (RTL8812A_SUPPORT == 1) ++ ++#if (RTL8188F_SUPPORT == 1) ++VOID ++odm_S0S1_SWAntDiv_Init_8188F( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188F AntDiv_Init => AntDivType=[ S0S1_SW_AntDiv]\n")); ++ ++ ++ /*GPIO Setting*/ ++ /*ODM_SetMACReg(pDM_Odm, 0x64 , BIT18, 0); */ ++ /*ODM_SetMACReg(pDM_Odm, 0x44 , BIT28|BIT27, 0);*/ ++ ODM_SetMACReg(pDM_Odm, 0x44 , BIT20|BIT19, 0x3); /*enable_output for P_GPIO[4:3]*/ ++ /*ODM_SetMACReg(pDM_Odm, 0x44 , BIT12|BIT11, 0);*/ /*output value*/ ++ /*ODM_SetMACReg(pDM_Odm, 0x40 , BIT1|BIT0, 0);*/ /*GPIO function*/ ++ ++ pDM_FatTable->bBecomeLinked = FALSE; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; ++ pDM_SWAT_Table->Double_chk_flag = 0; ++} ++ ++VOID ++phydm_update_rx_idle_antenna_8188F( ++ IN PVOID pDM_VOID, ++ IN u4Byte default_ant ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte codeword; ++ ++ if (default_ant == ANT1_2G) ++ codeword = 1; /*2'b01*/ ++ else ++ codeword = 2;/*2'b10*/ ++ ++ ODM_SetMACReg(pDM_Odm, 0x44 , (BIT12|BIT11), codeword); /*GPIO[4:3] output value*/ ++} ++ ++#endif ++ ++ ++ ++#ifdef ODM_EVM_ENHANCE_ANTDIV ++ ++VOID ++odm_EVM_FastAnt_Reset( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ pDM_FatTable->EVM_method_enable=0; ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; ++ pDM_Odm->antdiv_period=0; ++ ODM_SetMACReg(pDM_Odm, 0x608, BIT8, 0); ++} ++ ++ ++VOID ++odm_EVM_Enhance_AntDiv( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte Main_RSSI, Aux_RSSI ; ++ u4Byte Main_CRC_utility=0,Aux_CRC_utility=0,utility_ratio=1; ++ u4Byte Main_EVM, Aux_EVM,Diff_RSSI=0,diff_EVM=0; ++ u1Byte score_EVM=0,score_CRC=0; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u4Byte value32, i; ++ BOOLEAN Main_above1=FALSE,Aux_above1=FALSE; ++ BOOLEAN Force_antenna=FALSE; ++ PSTA_INFO_T pEntry; ++ pDM_FatTable->TargetAnt_enhance=0xFF; ++ ++ ++ if((pDM_Odm->SupportICType & ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC)) ++ { ++ if(pDM_Odm->bOneEntryOnly) ++ { ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[One Client only] \n")); ++ i = pDM_Odm->OneEntry_MACID; ++ ++ Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; ++ Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; ++ ++ if((Main_RSSI==0 && Aux_RSSI !=0 && Aux_RSSI>=FORCE_RSSI_DIFF) || (Main_RSSI!=0 && Aux_RSSI==0 && Main_RSSI>=FORCE_RSSI_DIFF)) ++ { ++ Diff_RSSI=FORCE_RSSI_DIFF; ++ } ++ else if(Main_RSSI!=0 && Aux_RSSI !=0) ++ { ++ Diff_RSSI = (Main_RSSI>=Aux_RSSI)?(Main_RSSI-Aux_RSSI):(Aux_RSSI-Main_RSSI); ++ } ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Main_Cnt = (( %d )) , Main_RSSI= (( %d )) \n", pDM_FatTable->MainAnt_Cnt[i], Main_RSSI)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Aux_Cnt = (( %d )) , Aux_RSSI = (( %d )) \n" , pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI)); ++ ++ if( ((Main_RSSI>=Evm_RSSI_TH_High||Aux_RSSI>=Evm_RSSI_TH_High )|| (pDM_FatTable->EVM_method_enable==1) ) ++ //&& (Diff_RSSI <= FORCE_RSSI_DIFF + 1) ++ ) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[> TH_H || EVM_method_enable==1] && ")); ++ ++ if(((Main_RSSI>=Evm_RSSI_TH_Low)||(Aux_RSSI>=Evm_RSSI_TH_Low) )) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[> TH_L ] \n")); ++ ++ //2 [ Normal state Main] ++ if(pDM_FatTable->FAT_State == NORMAL_STATE_MIAN) ++ { ++ ++ pDM_FatTable->EVM_method_enable=1; ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ pDM_Odm->antdiv_period=3; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ start training: MIAN] \n")); ++ pDM_FatTable->MainAntEVM_Sum[i] = 0; ++ pDM_FatTable->AuxAntEVM_Sum[i] = 0; ++ pDM_FatTable->MainAntEVM_Cnt[i] = 0; ++ pDM_FatTable->AuxAntEVM_Cnt[i] = 0; ++ ++ pDM_FatTable->FAT_State = NORMAL_STATE_AUX; ++ ODM_SetMACReg(pDM_Odm, 0x608, BIT8, 1); //Accept CRC32 Error packets. ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ ++ pDM_FatTable->CRC32_Ok_Cnt=0; ++ pDM_FatTable->CRC32_Fail_Cnt=0; ++ ODM_SetTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer, pDM_Odm->antdiv_intvl ); //m ++ } ++ //2 [ Normal state Aux ] ++ else if(pDM_FatTable->FAT_State == NORMAL_STATE_AUX) ++ { ++ pDM_FatTable->MainCRC32_Ok_Cnt=pDM_FatTable->CRC32_Ok_Cnt; ++ pDM_FatTable->MainCRC32_Fail_Cnt=pDM_FatTable->CRC32_Fail_Cnt; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ start training: AUX] \n")); ++ pDM_FatTable->FAT_State = TRAINING_STATE; ++ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); ++ ++ pDM_FatTable->CRC32_Ok_Cnt=0; ++ pDM_FatTable->CRC32_Fail_Cnt=0; ++ ODM_SetTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer, pDM_Odm->antdiv_intvl ); //ms ++ } ++ else if(pDM_FatTable->FAT_State == TRAINING_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Training state ] \n")); ++ pDM_FatTable->FAT_State = NORMAL_STATE_MIAN; ++ ++ //3 [CRC32 statistic] ++ pDM_FatTable->AuxCRC32_Ok_Cnt=pDM_FatTable->CRC32_Ok_Cnt; ++ pDM_FatTable->AuxCRC32_Fail_Cnt=pDM_FatTable->CRC32_Fail_Cnt; ++ ++ if( (pDM_FatTable->MainCRC32_Ok_Cnt >= ((pDM_FatTable->AuxCRC32_Ok_Cnt)<<1)) || (Diff_RSSI>=18)) ++ { ++ pDM_FatTable->TargetAnt_CRC32=MAIN_ANT; ++ Force_antenna=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CRC32 Force Main \n")); ++ } ++ else if((pDM_FatTable->AuxCRC32_Ok_Cnt >= ((pDM_FatTable->MainCRC32_Ok_Cnt)<<1)) || (Diff_RSSI>=18)) ++ { ++ pDM_FatTable->TargetAnt_CRC32=AUX_ANT; ++ Force_antenna=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CRC32 Force Aux \n")); ++ } ++ else ++ { ++ if(pDM_FatTable->MainCRC32_Fail_Cnt<=5) ++ pDM_FatTable->MainCRC32_Fail_Cnt=5; ++ ++ if(pDM_FatTable->AuxCRC32_Fail_Cnt<=5) ++ pDM_FatTable->AuxCRC32_Fail_Cnt=5; ++ ++ if(pDM_FatTable->MainCRC32_Ok_Cnt >pDM_FatTable->MainCRC32_Fail_Cnt ) ++ Main_above1=TRUE; ++ ++ if(pDM_FatTable->AuxCRC32_Ok_Cnt >pDM_FatTable->AuxCRC32_Fail_Cnt ) ++ Aux_above1=TRUE; ++ ++ if(Main_above1==TRUE && Aux_above1==FALSE) ++ { ++ Force_antenna=TRUE; ++ pDM_FatTable->TargetAnt_CRC32=MAIN_ANT; ++ } ++ else if(Main_above1==FALSE && Aux_above1==TRUE) ++ { ++ Force_antenna=TRUE; ++ pDM_FatTable->TargetAnt_CRC32=AUX_ANT; ++ } ++ else if(Main_above1==TRUE && Aux_above1==TRUE) ++ { ++ Main_CRC_utility=((pDM_FatTable->MainCRC32_Ok_Cnt)<<7)/pDM_FatTable->MainCRC32_Fail_Cnt; ++ Aux_CRC_utility=((pDM_FatTable->AuxCRC32_Ok_Cnt)<<7)/pDM_FatTable->AuxCRC32_Fail_Cnt; ++ pDM_FatTable->TargetAnt_CRC32 = (Main_CRC_utility==Aux_CRC_utility)?(pDM_FatTable->pre_TargetAnt_enhance):((Main_CRC_utility>=Aux_CRC_utility)?MAIN_ANT:AUX_ANT); ++ ++ if(Main_CRC_utility!=0 && Aux_CRC_utility!=0) ++ { ++ if(Main_CRC_utility>=Aux_CRC_utility) ++ utility_ratio=(Main_CRC_utility<<1)/Aux_CRC_utility; ++ else ++ utility_ratio=(Aux_CRC_utility<<1)/Main_CRC_utility; ++ } ++ } ++ else if(Main_above1==FALSE && Aux_above1==FALSE) ++ { ++ if(pDM_FatTable->MainCRC32_Ok_Cnt==0) ++ pDM_FatTable->MainCRC32_Ok_Cnt=1; ++ if(pDM_FatTable->AuxCRC32_Ok_Cnt==0) ++ pDM_FatTable->AuxCRC32_Ok_Cnt=1; ++ ++ Main_CRC_utility=((pDM_FatTable->MainCRC32_Fail_Cnt)<<7)/pDM_FatTable->MainCRC32_Ok_Cnt; ++ Aux_CRC_utility=((pDM_FatTable->AuxCRC32_Fail_Cnt)<<7)/pDM_FatTable->AuxCRC32_Ok_Cnt; ++ pDM_FatTable->TargetAnt_CRC32 = (Main_CRC_utility==Aux_CRC_utility)?(pDM_FatTable->pre_TargetAnt_enhance):((Main_CRC_utility<=Aux_CRC_utility)?MAIN_ANT:AUX_ANT); ++ ++ if(Main_CRC_utility!=0 && Aux_CRC_utility!=0) ++ { ++ if(Main_CRC_utility>=Aux_CRC_utility) ++ utility_ratio=(Main_CRC_utility<<1)/(Aux_CRC_utility); ++ else ++ utility_ratio=(Aux_CRC_utility<<1)/(Main_CRC_utility); ++ } ++ } ++ } ++ ODM_SetMACReg(pDM_Odm, 0x608, BIT8, 0);//NOT Accept CRC32 Error packets. ++ ++ //3 [EVM statistic] ++ Main_EVM = (pDM_FatTable->MainAntEVM_Cnt[i]!=0)?(pDM_FatTable->MainAntEVM_Sum[i]/pDM_FatTable->MainAntEVM_Cnt[i]):0; ++ Aux_EVM = (pDM_FatTable->AuxAntEVM_Cnt[i]!=0)?(pDM_FatTable->AuxAntEVM_Sum[i]/pDM_FatTable->AuxAntEVM_Cnt[i]):0; ++ pDM_FatTable->TargetAnt_EVM = (Main_EVM==Aux_EVM)?(pDM_FatTable->pre_TargetAnt_enhance):((Main_EVM>=Aux_EVM)?MAIN_ANT:AUX_ANT); ++ ++ if((Main_EVM==0 || Aux_EVM==0)) ++ diff_EVM=0; ++ else if(Main_EVM>=Aux_EVM) ++ diff_EVM=Main_EVM-Aux_EVM; ++ else ++ diff_EVM=Aux_EVM-Main_EVM; ++ ++ //2 [ Decision state ] ++ if(pDM_FatTable->TargetAnt_EVM ==pDM_FatTable->TargetAnt_CRC32 ) ++ { ++ if( (utility_ratio<2 && Force_antenna==FALSE) && diff_EVM<=2) ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->pre_TargetAnt_enhance; ++ else ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_EVM; ++ } ++ else if(diff_EVM<=2 && (utility_ratio > 4 && Force_antenna==FALSE)) ++ { ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_CRC32; ++ } ++ else if(diff_EVM>=20) // ++ { ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_EVM; ++ } ++ else if(utility_ratio>=6 && Force_antenna==FALSE) // utility_ratio>3 ++ { ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_CRC32; ++ } ++ else ++ { ++ if(Force_antenna==TRUE) ++ score_CRC=3; ++ else if(utility_ratio>=4) //>2 ++ score_CRC=2; ++ else if(utility_ratio>=3) //>1.5 ++ score_CRC=1; ++ else ++ score_CRC=0; ++ ++ if(diff_EVM>=10) ++ score_EVM=2; ++ else if(diff_EVM>=5) ++ score_EVM=1; ++ else ++ score_EVM=0; ++ ++ if(score_CRC>score_EVM) ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->TargetAnt_CRC32; ++ else if(score_CRCTargetAnt_enhance=pDM_FatTable->TargetAnt_EVM; ++ else ++ pDM_FatTable->TargetAnt_enhance=pDM_FatTable->pre_TargetAnt_enhance; ++ } ++ pDM_FatTable->pre_TargetAnt_enhance=pDM_FatTable->TargetAnt_enhance; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : MainEVM_Cnt = (( %d )) , Main_EVM= (( %d )) \n",i, pDM_FatTable->MainAntEVM_Cnt[i], Main_EVM)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : AuxEVM_Cnt = (( %d )) , Aux_EVM = (( %d )) \n" ,i, pDM_FatTable->AuxAntEVM_Cnt[i] , Aux_EVM)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** TargetAnt_EVM = (( %s ))\n", ( pDM_FatTable->TargetAnt_EVM ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("M_CRC_Ok = (( %d )) , M_CRC_Fail = (( %d )), Main_CRC_utility = (( %d )) \n" , pDM_FatTable->MainCRC32_Ok_Cnt, pDM_FatTable->MainCRC32_Fail_Cnt,Main_CRC_utility)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("A_CRC_Ok = (( %d )) , A_CRC_Fail = (( %d )), Aux_CRC_utility = (( %d )) \n" , pDM_FatTable->AuxCRC32_Ok_Cnt, pDM_FatTable->AuxCRC32_Fail_Cnt,Aux_CRC_utility)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** TargetAnt_CRC32 = (( %s ))\n", ( pDM_FatTable->TargetAnt_CRC32 ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("****** TargetAnt_enhance = (( %s ))******\n", ( pDM_FatTable->TargetAnt_enhance ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ++ ++ } ++ } ++ else // RSSI< = Evm_RSSI_TH_Low ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ TH_L ] \n")); ++ odm_EVM_FastAnt_Reset(pDM_Odm); ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[escape from> TH_H || EVM_method_enable==1] \n")); ++ odm_EVM_FastAnt_Reset(pDM_Odm); ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[multi-Client] \n")); ++ odm_EVM_FastAnt_Reset(pDM_Odm); ++ } ++ } ++} ++ ++VOID ++odm_EVM_FastAntTrainingCallback( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("******odm_EVM_FastAntTrainingCallback****** \n")); ++ odm_HW_AntDiv(pDM_Odm); ++} ++#endif ++ ++VOID ++odm_HW_AntDiv( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte i,MinMaxRSSI=0xFF, AntDivMaxRSSI=0, MaxRSSI=0, LocalMaxRSSI; ++ u4Byte Main_RSSI, Aux_RSSI; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u1Byte RxIdleAnt = pDM_FatTable->RxIdleAnt, TargetAnt = 7; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ PSTA_INFO_T pEntry; ++ ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; ++ u4Byte TH1=500000; ++ u4Byte TH2=10000000; ++ u4Byte MA_rx_Temp, degrade_TP_temp, improve_TP_temp; ++ u1Byte Monitor_RSSI_threshold=30; ++ ++ pDM_BdcTable->BF_pass=TRUE; ++ pDM_BdcTable->DIV_pass=TRUE; ++ pDM_BdcTable->bAll_DivSta_Idle=TRUE; ++ pDM_BdcTable->bAll_BFSta_Idle=TRUE; ++ pDM_BdcTable->num_BfTar=0 ; ++ pDM_BdcTable->num_DivTar=0; ++ pDM_BdcTable->num_Client=0; ++ #endif ++ #endif ++ ++ if(!pDM_Odm->bLinked) //bLinked==False ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); ++ ++ if(pDM_FatTable->bBecomeLinked == TRUE) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); ++ pDM_Odm->antdiv_period=0; ++ ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ return; ++ } ++ else ++ { ++ if(pDM_FatTable->bBecomeLinked ==FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n")); ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm , TX_BY_DESC); ++ ++ //if(pDM_Odm->SupportICType == ODM_RTL8821 ) ++ //ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //CCK AntDiv function disable ++ ++ //#if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ //else if(pDM_Odm->SupportICType == ODM_RTL8881A) ++ // ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //CCK AntDiv function disable ++ //#endif ++ ++ //else if(pDM_Odm->SupportICType == ODM_RTL8723B ||pDM_Odm->SupportICType == ODM_RTL8812) ++ //ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function disable ++ ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8723B && pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF0, 8); // DPDT_P = ANTSEL[0] // for 8723B AntDiv function patch. BB Dino 130412 ++ ODM_SetBBReg(pDM_Odm, 0x930 , 0xF, 8); // DPDT_N = ANTSEL[0] ++ } ++ ++ //2 BDC Init ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ odm_BDC_Init(pDM_Odm); ++ #endif ++ #endif ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ odm_EVM_FastAnt_Reset(pDM_Odm); ++ #endif ++ } ++ } ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n AntDiv Start =>\n")); ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ if(pDM_Odm->antdiv_evm_en==1) ++ { ++ odm_EVM_Enhance_AntDiv(pDM_Odm); ++ if(pDM_FatTable->FAT_State !=NORMAL_STATE_MIAN) ++ return; ++ } ++ else ++ { ++ odm_EVM_FastAnt_Reset(pDM_Odm); ++ } ++ #endif ++ ++ //2 BDC Mode Arbitration ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_Odm->antdiv_evm_en == 0 ||pDM_FatTable->EVM_method_enable==0) ++ { ++ odm_BF_AntDiv_ModeArbitration(pDM_Odm); ++ } ++ #endif ++ #endif ++ ++ for (i=0; ipODM_StaInfo[i]; ++ if(IS_STA_VALID(pEntry)) ++ { ++ //2 Caculate RSSI per Antenna ++ Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; ++ Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; ++ TargetAnt = (Main_RSSI==Aux_RSSI)?pDM_FatTable->RxIdleAnt:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); ++ ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("*** SupportICType=[%d] \n",pDM_Odm->SupportICType)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : Main_Cnt = (( %d )) , Main_RSSI= (( %d )) \n",i, pDM_FatTable->MainAnt_Cnt[i], Main_RSSI)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : Aux_Cnt = (( %d )) , Aux_RSSI = (( %d )) \n" ,i, pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI)); ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** MAC ID:[ %d ] , TargetAnt = (( %s )) \n", i ,( TargetAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("*** Phy_AntSel_A=[ %d, %d, %d] \n",((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT2)>>2, ++ // ((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT1) >>1, ((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT0))); ++ ++ LocalMaxRSSI = (Main_RSSI>Aux_RSSI)?Main_RSSI:Aux_RSSI; ++ //2 Select MaxRSSI for DIG ++ if((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40)) ++ AntDivMaxRSSI = LocalMaxRSSI; ++ if(LocalMaxRSSI > MaxRSSI) ++ MaxRSSI = LocalMaxRSSI; ++ ++ //2 Select RX Idle Antenna ++ if ( (LocalMaxRSSI != 0) && (LocalMaxRSSI < MinMaxRSSI) ) ++ { ++ RxIdleAnt = TargetAnt; ++ MinMaxRSSI = LocalMaxRSSI; ++ } ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ if(pDM_Odm->antdiv_evm_en==1) ++ { ++ if(pDM_FatTable->TargetAnt_enhance!=0xFF) ++ { ++ TargetAnt=pDM_FatTable->TargetAnt_enhance; ++ RxIdleAnt = pDM_FatTable->TargetAnt_enhance; ++ } ++ } ++ #endif ++ ++ //2 Select TX Antenna ++ if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) ++ { ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_BdcTable->w_BFee_Client[i]==0) ++ #endif ++ #endif ++ { ++ odm_UpdateTxAnt(pDM_Odm, TargetAnt, i); ++ } ++ } ++ ++ //------------------------------------------------------------ ++ ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ pDM_BdcTable->num_Client++; ++ ++ if(pDM_BdcTable->BDC_Mode==BDC_MODE_2 ||pDM_BdcTable->BDC_Mode==BDC_MODE_3) ++ { ++ //2 Byte Counter ++ ++ MA_rx_Temp= (pEntry->rx_byte_cnt_LowMAW)<<3 ; // RX TP ( bit /sec) ++ ++ if(pDM_BdcTable->BDC_state==BDC_BFer_TRAIN_STATE) ++ { ++ pDM_BdcTable->MA_rx_TP_DIV[i]= MA_rx_Temp ; ++ } ++ else ++ { ++ pDM_BdcTable->MA_rx_TP[i] =MA_rx_Temp ; ++ } ++ ++ if( (MA_rx_Temp < TH2) && (MA_rx_Temp > TH1) && (LocalMaxRSSI<=Monitor_RSSI_threshold)) ++ { ++ if(pDM_BdcTable->w_BFer_Client[i]==1) // Bfer_Target ++ { ++ pDM_BdcTable->num_BfTar++; ++ ++ if(pDM_BdcTable->BDC_state==BDC_DECISION_STATE && pDM_BdcTable->BDC_Try_flag==0) ++ { ++ improve_TP_temp = (pDM_BdcTable->MA_rx_TP_DIV[i] * 9)>>3 ; //* 1.125 ++ pDM_BdcTable->BF_pass = (pDM_BdcTable->MA_rx_TP[i] > improve_TP_temp)?TRUE:FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : { MA_rx_TP,improve_TP_temp , MA_rx_TP_DIV, BF_pass}={ %d, %d, %d , %d } \n" ,i,pDM_BdcTable->MA_rx_TP[i],improve_TP_temp,pDM_BdcTable->MA_rx_TP_DIV[i], pDM_BdcTable->BF_pass )); ++ } ++ } ++ else// DIV_Target ++ { ++ pDM_BdcTable->num_DivTar++; ++ ++ if(pDM_BdcTable->BDC_state==BDC_DECISION_STATE && pDM_BdcTable->BDC_Try_flag==0) ++ { ++ degrade_TP_temp=(pDM_BdcTable->MA_rx_TP_DIV[i]*5)>>3;//* 0.625 ++ pDM_BdcTable->DIV_pass = (pDM_BdcTable->MA_rx_TP[i] >degrade_TP_temp)?TRUE:FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : { MA_rx_TP, degrade_TP_temp , MA_rx_TP_DIV, DIV_pass}=\n{ %d, %d, %d , %d } \n" ,i,pDM_BdcTable->MA_rx_TP[i],degrade_TP_temp,pDM_BdcTable->MA_rx_TP_DIV[i], pDM_BdcTable->DIV_pass )); ++ } ++ } ++ } ++ ++ if(MA_rx_Temp > TH1) ++ { ++ if(pDM_BdcTable->w_BFer_Client[i]==1) // Bfer_Target ++ { ++ pDM_BdcTable->bAll_BFSta_Idle=FALSE; ++ } ++ else// DIV_Target ++ { ++ pDM_BdcTable->bAll_DivSta_Idle=FALSE; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : { BFmeeCap , BFmerCap} = { %d , %d } \n" ,i, pDM_BdcTable->w_BFee_Client[i] , pDM_BdcTable->w_BFer_Client[i])); ++ ++ if(pDM_BdcTable->BDC_state==BDC_BFer_TRAIN_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : MA_rx_TP_DIV = (( %d )) \n",i,pDM_BdcTable->MA_rx_TP_DIV[i] )); ++ ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : MA_rx_TP = (( %d )) \n",i,pDM_BdcTable->MA_rx_TP[i] )); ++ } ++ ++ } ++ #endif ++ #endif ++ ++ } ++ ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_BdcTable->BDC_Try_flag==0) ++ #endif ++ #endif ++ { ++ pDM_FatTable->MainAnt_Sum[i] = 0; ++ pDM_FatTable->AuxAnt_Sum[i] = 0; ++ pDM_FatTable->MainAnt_Cnt[i] = 0; ++ pDM_FatTable->AuxAnt_Cnt[i] = 0; ++ } ++ } ++ ++ ++ ++ //2 Set RX Idle Antenna & TX Antenna(Because of HW Bug ) ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP ) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** RxIdleAnt = (( %s ))\n\n", ( RxIdleAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_BdcTable->BDC_Mode==BDC_MODE_1 ||pDM_BdcTable->BDC_Mode==BDC_MODE_3) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** BDC_RxIdleUpdate_counter = (( %d ))\n", pDM_BdcTable->BDC_RxIdleUpdate_counter)); ++ ++ if(pDM_BdcTable->BDC_RxIdleUpdate_counter==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***Update RxIdle Antenna!!! \n")); ++ pDM_BdcTable->BDC_RxIdleUpdate_counter=30; ++ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); ++ } ++ else ++ { ++ pDM_BdcTable->BDC_RxIdleUpdate_counter--; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***NOT update RxIdle Antenna because of BF ( need to fix TX-ant)\n")); ++ } ++ } ++ else ++ #endif ++ #endif ++ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); ++ #else ++ ++ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); ++ ++ #endif//#if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ ++ ++ //2 BDC Main Algorithm ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_Odm->antdiv_evm_en ==0 ||pDM_FatTable->EVM_method_enable==0) ++ { ++ odm_BDCcoex_BFeeRxDiv_Arbitration(pDM_Odm); ++ } ++ #endif ++ #endif ++ ++ if(AntDivMaxRSSI == 0) ++ pDM_DigTable->AntDiv_RSSI_max = pDM_Odm->RSSI_Min; ++ else ++ pDM_DigTable->AntDiv_RSSI_max = AntDivMaxRSSI; ++ ++ pDM_DigTable->RSSI_max = MaxRSSI; ++} ++ ++ ++ ++#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ++VOID ++odm_S0S1_SWAntDiv_Reset( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ pDM_FatTable->bBecomeLinked = FALSE; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_INIT; ++ pDM_SWAT_Table->Double_chk_flag = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_S0S1_SWAntDiv_Reset(): pDM_FatTable->bBecomeLinked = %d\n", pDM_FatTable->bBecomeLinked)); ++} ++ ++VOID ++odm_S0S1_SwAntDiv( ++ IN PVOID pDM_VOID, ++ IN u1Byte Step ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ u4Byte i, MinMaxRSSI = 0xFF, LocalMaxRSSI, LocalMinRSSI; ++ u4Byte Main_RSSI, Aux_RSSI; ++ u1Byte HighTraffic_TrainTime_U = 0x32, HighTraffic_TrainTime_L = 0, Train_time_temp; ++ u1Byte LowTraffic_TrainTime_U = 200, LowTraffic_TrainTime_L = 0; ++ u1Byte RxIdleAnt = pDM_SWAT_Table->PreAntenna, TargetAnt, nextAnt = 0; ++ PSTA_INFO_T pEntry = NULL; ++ u4Byte value32; ++ ++ ++ if(!pDM_Odm->bLinked) //bLinked==False ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); ++ if(pDM_FatTable->bBecomeLinked == TRUE) ++ { ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Set REG 948[9:6]=0x0\n")); ++ ODM_SetBBReg(pDM_Odm, 0x948 , (BIT9|BIT8|BIT7|BIT6), 0x0); ++ } ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ return; ++ } ++ else ++ { ++ if(pDM_FatTable->bBecomeLinked ==FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n")); ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ value32 = ODM_GetBBReg(pDM_Odm, 0x864, BIT5|BIT4|BIT3); ++ ++ #if (RTL8723B_SUPPORT == 1) ++ if (value32 == 0x0) ++ ODM_UpdateRxIdleAnt_8723B(pDM_Odm, MAIN_ANT, ANT1_2G, ANT2_2G); ++ else if (value32 == 0x1) ++ ODM_UpdateRxIdleAnt_8723B(pDM_Odm, AUX_ANT, ANT2_2G, ANT1_2G); ++ #endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("8723B: First link! Force antenna to %s\n",(value32 == 0x0?"MAIN":"AUX") )); ++ } ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[%d] { try_flag=(( %d )), Step=(( %d )), Double_chk_flag = (( %d )) }\n", ++ __LINE__,pDM_SWAT_Table->try_flag,Step,pDM_SWAT_Table->Double_chk_flag)); ++ ++ // Handling step mismatch condition. ++ // Peak step is not finished at last time. Recover the variable and check again. ++ if( Step != pDM_SWAT_Table->try_flag ) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Step != try_flag] Need to Reset After Link\n")); ++ ODM_SwAntDivRestAfterLink(pDM_Odm); ++ } ++ ++ if (pDM_SWAT_Table->try_flag == SWAW_STEP_INIT) { ++ ++ pDM_SWAT_Table->try_flag = SWAW_STEP_PEEK; ++ pDM_SWAT_Table->Train_time_flag=0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[set try_flag = 0] Prepare for peek!\n\n")); ++ return; ++ ++ } else { ++ ++ //1 Normal State (Begin Trying) ++ if (pDM_SWAT_Table->try_flag == SWAW_STEP_PEEK) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TxOkCnt=(( %llu )), RxOkCnt=(( %llu )), TrafficLoad = (%d))\n", pDM_Odm->curTxOkCnt, pDM_Odm->curRxOkCnt, pDM_Odm->TrafficLoad)); ++ ++ if (pDM_Odm->TrafficLoad == TRAFFIC_HIGH) ++ { ++ Train_time_temp = pDM_SWAT_Table->Train_time ; ++ ++ if(pDM_SWAT_Table->Train_time_flag==3) ++ { ++ HighTraffic_TrainTime_L=0xa; ++ ++ if(Train_time_temp<=16) ++ Train_time_temp=HighTraffic_TrainTime_L; ++ else ++ Train_time_temp-=16; ++ ++ } ++ else if(pDM_SWAT_Table->Train_time_flag==2) ++ { ++ Train_time_temp-=8; ++ HighTraffic_TrainTime_L=0xf; ++ } ++ else if(pDM_SWAT_Table->Train_time_flag==1) ++ { ++ Train_time_temp-=4; ++ HighTraffic_TrainTime_L=0x1e; ++ } ++ else if(pDM_SWAT_Table->Train_time_flag==0) ++ { ++ Train_time_temp+=8; ++ HighTraffic_TrainTime_L=0x28; ++ } ++ ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Train_time_temp = ((%d))\n",Train_time_temp)); ++ ++ //-- ++ if(Train_time_temp > HighTraffic_TrainTime_U) ++ Train_time_temp=HighTraffic_TrainTime_U; ++ ++ else if(Train_time_temp < HighTraffic_TrainTime_L) ++ Train_time_temp=HighTraffic_TrainTime_L; ++ ++ pDM_SWAT_Table->Train_time = Train_time_temp; /*10ms~200ms*/ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Train_time_flag=((%d)), Train_time=((%d))\n", pDM_SWAT_Table->Train_time_flag, pDM_SWAT_Table->Train_time)); ++ ++ } else if ((pDM_Odm->TrafficLoad == TRAFFIC_MID) || (pDM_Odm->TrafficLoad == TRAFFIC_LOW)) { ++ ++ Train_time_temp=pDM_SWAT_Table->Train_time ; ++ ++ if(pDM_SWAT_Table->Train_time_flag==3) ++ { ++ LowTraffic_TrainTime_L=10; ++ if(Train_time_temp<50) ++ Train_time_temp=LowTraffic_TrainTime_L; ++ else ++ Train_time_temp-=50; ++ } ++ else if(pDM_SWAT_Table->Train_time_flag==2) ++ { ++ Train_time_temp-=30; ++ LowTraffic_TrainTime_L=36; ++ } ++ else if(pDM_SWAT_Table->Train_time_flag==1) ++ { ++ Train_time_temp-=10; ++ LowTraffic_TrainTime_L=40; ++ } ++ else ++ Train_time_temp+=10; ++ ++ //-- ++ if(Train_time_temp >= LowTraffic_TrainTime_U) ++ Train_time_temp=LowTraffic_TrainTime_U; ++ ++ else if(Train_time_temp <= LowTraffic_TrainTime_L) ++ Train_time_temp=LowTraffic_TrainTime_L; ++ ++ pDM_SWAT_Table->Train_time = Train_time_temp; /*10ms~200ms*/ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Train_time_flag=((%d)) , Train_time=((%d))\n", pDM_SWAT_Table->Train_time_flag, pDM_SWAT_Table->Train_time)); ++ ++ } else { ++ pDM_SWAT_Table->Train_time = 0xc8; /*200ms*/ ++ ++ } ++ ++ //----------------- ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Current MinMaxRSSI is ((%d))\n", pDM_FatTable->MinMaxRSSI)); ++ ++ //---reset index--- ++ if (pDM_SWAT_Table->reset_idx >= RSSI_CHECK_RESET_PERIOD) { ++ ++ pDM_FatTable->MinMaxRSSI = 0; ++ pDM_SWAT_Table->reset_idx = 0; ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reset_idx = (( %d ))\n", pDM_SWAT_Table->reset_idx)); ++ ++ pDM_SWAT_Table->reset_idx++; ++ ++ //---double check flag--- ++ if ((pDM_FatTable->MinMaxRSSI > RSSI_CHECK_THRESHOLD) && (pDM_SWAT_Table->Double_chk_flag == 0)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" MinMaxRSSI is ((%d)), and > %d\n", ++ pDM_FatTable->MinMaxRSSI, RSSI_CHECK_THRESHOLD)); ++ ++ pDM_SWAT_Table->Double_chk_flag =1; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_DETERMINE; ++ pDM_SWAT_Table->RSSI_Trying = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Test the current Ant for (( %d )) ms again\n", pDM_SWAT_Table->Train_time)); ++ ODM_UpdateRxIdleAnt(pDM_Odm, pDM_FatTable->RxIdleAnt); ++ ODM_SetTimer(pDM_Odm, &(pDM_SWAT_Table->phydm_SwAntennaSwitchTimer), pDM_SWAT_Table->Train_time); /*ms*/ ++ return; ++ } ++ ++ nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; ++ ++ pDM_SWAT_Table->try_flag = SWAW_STEP_DETERMINE; ++ ++ if(pDM_SWAT_Table->reset_idx<=1) ++ pDM_SWAT_Table->RSSI_Trying = 2; ++ else ++ pDM_SWAT_Table->RSSI_Trying = 1; ++ ++ odm_S0S1_SwAntDivByCtrlFrame(pDM_Odm, SWAW_STEP_PEEK); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[set try_flag=1] Normal State: Begin Trying!!\n")); ++ ++ } else if ((pDM_SWAT_Table->try_flag == SWAW_STEP_DETERMINE) && (pDM_SWAT_Table->Double_chk_flag == 0)) { ++ ++ nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; ++ pDM_SWAT_Table->RSSI_Trying--; ++ } ++ ++ //1 Decision State ++ if ((pDM_SWAT_Table->try_flag == SWAW_STEP_DETERMINE) && (pDM_SWAT_Table->RSSI_Trying == 0)) { ++ ++ BOOLEAN bByCtrlFrame = FALSE; ++ u8Byte pkt_cnt_total = 0; ++ ++ for (i=0; ipODM_StaInfo[i]; ++ if(IS_STA_VALID(pEntry)) ++ { ++ //2 Caculate RSSI per Antenna ++ Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; ++ Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; ++ ++ if(pDM_FatTable->MainAnt_Cnt[i]<=1 && pDM_FatTable->CCK_counter_main>=1) ++ Main_RSSI=0; ++ ++ if(pDM_FatTable->AuxAnt_Cnt[i]<=1 && pDM_FatTable->CCK_counter_aux>=1) ++ Aux_RSSI=0; ++ ++ TargetAnt = (Main_RSSI==Aux_RSSI)?pDM_SWAT_Table->PreAntenna:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); ++ LocalMaxRSSI = (Main_RSSI>=Aux_RSSI) ? Main_RSSI : Aux_RSSI; ++ LocalMinRSSI = (Main_RSSI>=Aux_RSSI) ? Aux_RSSI : Main_RSSI; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** CCK_counter_main = (( %d )) , CCK_counter_aux= (( %d )) \n", pDM_FatTable->CCK_counter_main, pDM_FatTable->CCK_counter_aux)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** OFDM_counter_main = (( %d )) , OFDM_counter_aux= (( %d )) \n", pDM_FatTable->OFDM_counter_main, pDM_FatTable->OFDM_counter_aux)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Main_Cnt = (( %d )) , Main_RSSI= (( %d )) \n", pDM_FatTable->MainAnt_Cnt[i], Main_RSSI)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Aux_Cnt = (( %d )) , Aux_RSSI = (( %d )) \n", pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI )); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** MAC ID:[ %d ] , TargetAnt = (( %s )) \n", i ,( TargetAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ++ ++ //2 Select RX Idle Antenna ++ ++ if (LocalMaxRSSI != 0 && LocalMaxRSSI < MinMaxRSSI) ++ { ++ RxIdleAnt = TargetAnt; ++ MinMaxRSSI = LocalMaxRSSI; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** LocalMaxRSSI-LocalMinRSSI = ((%d))\n",(LocalMaxRSSI-LocalMinRSSI))); ++ ++ if((LocalMaxRSSI-LocalMinRSSI)>8) ++ { ++ if(LocalMinRSSI != 0) ++ pDM_SWAT_Table->Train_time_flag=3; ++ else ++ { ++ if (MinMaxRSSI > RSSI_CHECK_THRESHOLD) ++ pDM_SWAT_Table->Train_time_flag=0; ++ else ++ pDM_SWAT_Table->Train_time_flag=3; ++ } ++ } ++ else if((LocalMaxRSSI-LocalMinRSSI)>5) ++ pDM_SWAT_Table->Train_time_flag=2; ++ else if((LocalMaxRSSI-LocalMinRSSI)>2) ++ pDM_SWAT_Table->Train_time_flag=1; ++ else ++ pDM_SWAT_Table->Train_time_flag=0; ++ ++ } ++ ++ //2 Select TX Antenna ++ if(TargetAnt == MAIN_ANT) ++ pDM_FatTable->antsel_a[i] = ANT1_2G; ++ else ++ pDM_FatTable->antsel_a[i] = ANT2_2G; ++ ++ } ++ pDM_FatTable->MainAnt_Sum[i] = 0; ++ pDM_FatTable->AuxAnt_Sum[i] = 0; ++ pDM_FatTable->MainAnt_Cnt[i] = 0; ++ pDM_FatTable->AuxAnt_Cnt[i] = 0; ++ } ++ ++ if(pDM_SWAT_Table->bSWAntDivByCtrlFrame) ++ { ++ odm_S0S1_SwAntDivByCtrlFrame(pDM_Odm, SWAW_STEP_DETERMINE); ++ bByCtrlFrame = TRUE; ++ } ++ ++ pkt_cnt_total = pDM_FatTable->CCK_counter_main + pDM_FatTable->CCK_counter_aux + ++ pDM_FatTable->OFDM_counter_main + pDM_FatTable->OFDM_counter_aux; ++ pDM_FatTable->CCK_counter_main=0; ++ pDM_FatTable->CCK_counter_aux=0; ++ pDM_FatTable->OFDM_counter_main=0; ++ pDM_FatTable->OFDM_counter_aux=0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Control frame packet counter = %d, Data frame packet counter = %llu\n", ++ pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame, pkt_cnt_total)); ++ ++ if(MinMaxRSSI == 0xff || ((pkt_cnt_total < (pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame >> 1)) && pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 2)) ++ { ++ MinMaxRSSI = 0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Check RSSI of control frame because MinMaxRSSI == 0xff\n")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("bByCtrlFrame = %d\n", bByCtrlFrame)); ++ ++ if(bByCtrlFrame) ++ { ++ Main_RSSI = (pDM_FatTable->MainAnt_CtrlFrame_Cnt!=0)?(pDM_FatTable->MainAnt_CtrlFrame_Sum/pDM_FatTable->MainAnt_CtrlFrame_Cnt):0; ++ Aux_RSSI = (pDM_FatTable->AuxAnt_CtrlFrame_Cnt!=0)?(pDM_FatTable->AuxAnt_CtrlFrame_Sum/pDM_FatTable->AuxAnt_CtrlFrame_Cnt):0; ++ ++ if(pDM_FatTable->MainAnt_CtrlFrame_Cnt<=1 && pDM_FatTable->CCK_CtrlFrame_Cnt_main>=1) ++ Main_RSSI=0; ++ ++ if(pDM_FatTable->AuxAnt_CtrlFrame_Cnt<=1 && pDM_FatTable->CCK_CtrlFrame_Cnt_aux>=1) ++ Aux_RSSI=0; ++ ++ if (Main_RSSI != 0 || Aux_RSSI != 0) ++ { ++ RxIdleAnt = (Main_RSSI==Aux_RSSI)?pDM_SWAT_Table->PreAntenna:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); ++ LocalMaxRSSI = (Main_RSSI>=Aux_RSSI) ? Main_RSSI : Aux_RSSI; ++ LocalMinRSSI = (Main_RSSI>=Aux_RSSI) ? Aux_RSSI : Main_RSSI; ++ ++ if((LocalMaxRSSI-LocalMinRSSI)>8) ++ pDM_SWAT_Table->Train_time_flag=3; ++ else if((LocalMaxRSSI-LocalMinRSSI)>5) ++ pDM_SWAT_Table->Train_time_flag=2; ++ else if((LocalMaxRSSI-LocalMinRSSI)>2) ++ pDM_SWAT_Table->Train_time_flag=1; ++ else ++ pDM_SWAT_Table->Train_time_flag=0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Control frame: Main_RSSI = %d, Aux_RSSI = %d\n", Main_RSSI, Aux_RSSI)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("RxIdleAnt decided by control frame = %s\n", (RxIdleAnt == MAIN_ANT?"MAIN":"AUX"))); ++ } ++ } ++ } ++ ++ pDM_FatTable->MinMaxRSSI = MinMaxRSSI; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_PEEK; ++ ++ if( pDM_SWAT_Table->Double_chk_flag==1) ++ { ++ pDM_SWAT_Table->Double_chk_flag=0; ++ ++ if (pDM_FatTable->MinMaxRSSI > RSSI_CHECK_THRESHOLD) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [Double check] MinMaxRSSI ((%d)) > %d again!!\n", ++ pDM_FatTable->MinMaxRSSI, RSSI_CHECK_THRESHOLD)); ++ ++ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[reset try_flag = 0] Training accomplished !!!]\n\n\n")); ++ return; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [Double check] MinMaxRSSI ((%d)) <= %d !!\n", ++ pDM_FatTable->MinMaxRSSI, RSSI_CHECK_THRESHOLD)); ++ ++ nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; ++ pDM_SWAT_Table->try_flag = SWAW_STEP_PEEK; ++ pDM_SWAT_Table->reset_idx = RSSI_CHECK_RESET_PERIOD; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[set try_flag=0] Normal State: Need to tryg again!!\n\n\n")); ++ return; ++ } ++ } ++ else ++ { ++ if (pDM_FatTable->MinMaxRSSI < RSSI_CHECK_THRESHOLD) ++ pDM_SWAT_Table->reset_idx = RSSI_CHECK_RESET_PERIOD; ++ ++ pDM_SWAT_Table->PreAntenna =RxIdleAnt; ++ ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt ); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("[reset try_flag = 0] Training accomplished !!!] \n\n\n")); ++ return; ++ } ++ ++ } ++ ++ } ++ ++ //1 4.Change TRX antenna ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RSSI_Trying = (( %d )), Ant: (( %s )) >>> (( %s )) \n", ++ pDM_SWAT_Table->RSSI_Trying, (pDM_FatTable->RxIdleAnt == MAIN_ANT?"MAIN":"AUX"),(nextAnt == MAIN_ANT?"MAIN":"AUX"))); ++ ++ ODM_UpdateRxIdleAnt(pDM_Odm, nextAnt); ++ ++ //1 5.Reset Statistics ++ ++ pDM_FatTable->RxIdleAnt = nextAnt; ++ ++ //1 6.Set next timer (Trying State) ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Test ((%s)) Ant for (( %d )) ms\n", (nextAnt == MAIN_ANT?"MAIN":"AUX"), pDM_SWAT_Table->Train_time)); ++ ODM_SetTimer(pDM_Odm, &(pDM_SWAT_Table->phydm_SwAntennaSwitchTimer), pDM_SWAT_Table->Train_time); /*ms*/ ++} ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++ODM_SW_AntDiv_Callback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ pSWAT_T pDM_SWAT_Table = &pHalData->DM_OutSrc.DM_SWAT_Table; ++ ++ #if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ #if USE_WORKITEM ++ ODM_ScheduleWorkItem(&pDM_SWAT_Table->phydm_SwAntennaSwitchWorkitem); ++ #else ++ { ++ //DbgPrint("SW_antdiv_Callback"); ++ odm_S0S1_SwAntDiv(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); ++ } ++ #endif ++ #else ++ ODM_ScheduleWorkItem(&pDM_SWAT_Table->phydm_SwAntennaSwitchWorkitem); ++ #endif ++} ++VOID ++ODM_SW_AntDiv_WorkitemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ //DbgPrint("SW_antdiv_Workitem_Callback"); ++ odm_S0S1_SwAntDiv(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); ++} ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++VOID ++ODM_SW_AntDiv_WorkitemCallback( ++ IN PVOID pContext ++) ++{ ++ PADAPTER ++ pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE ++ *pHalData = GET_HAL_DATA(pAdapter); ++ ++ /*DbgPrint("SW_antdiv_Workitem_Callback");*/ ++ odm_S0S1_SwAntDiv(&pHalData->odmpriv, SWAW_STEP_DETERMINE); ++} ++ ++VOID ++ODM_SW_AntDiv_Callback(void *FunctionContext) ++{ ++ PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; ++ PADAPTER padapter = pDM_Odm->Adapter; ++ if(padapter->net_closed == _TRUE) ++ return; ++ ++ #if 0 /* Can't do I/O in timer callback*/ ++ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_DETERMINE); ++ #else ++ rtw_run_in_thread_cmd(padapter, ODM_SW_AntDiv_WorkitemCallback, padapter); ++ #endif ++} ++ ++ ++#endif ++ ++VOID ++odm_S0S1_SwAntDivByCtrlFrame( ++ IN PVOID pDM_VOID, ++ IN u1Byte Step ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ switch(Step) ++ { ++ case SWAW_STEP_PEEK: ++ pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame = 0; ++ pDM_SWAT_Table->bSWAntDivByCtrlFrame = TRUE; ++ pDM_FatTable->MainAnt_CtrlFrame_Cnt = 0; ++ pDM_FatTable->AuxAnt_CtrlFrame_Cnt = 0; ++ pDM_FatTable->MainAnt_CtrlFrame_Sum = 0; ++ pDM_FatTable->AuxAnt_CtrlFrame_Sum = 0; ++ pDM_FatTable->CCK_CtrlFrame_Cnt_main = 0; ++ pDM_FatTable->CCK_CtrlFrame_Cnt_aux = 0; ++ pDM_FatTable->OFDM_CtrlFrame_Cnt_main = 0; ++ pDM_FatTable->OFDM_CtrlFrame_Cnt_aux = 0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_S0S1_SwAntDivForAPMode(): Start peek and reset counter\n")); ++ break; ++ case SWAW_STEP_DETERMINE: ++ pDM_SWAT_Table->bSWAntDivByCtrlFrame = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_S0S1_SwAntDivForAPMode(): Stop peek\n")); ++ break; ++ default: ++ pDM_SWAT_Table->bSWAntDivByCtrlFrame = FALSE; ++ break; ++ } ++} ++ ++VOID ++odm_AntselStatisticsOfCtrlFrame( ++ IN PVOID pDM_VOID, ++ IN u1Byte antsel_tr_mux, ++ IN u4Byte RxPWDBAll ++ ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if(antsel_tr_mux == ANT1_2G) ++ { ++ pDM_FatTable->MainAnt_CtrlFrame_Sum+=RxPWDBAll; ++ pDM_FatTable->MainAnt_CtrlFrame_Cnt++; ++ } ++ else ++ { ++ pDM_FatTable->AuxAnt_CtrlFrame_Sum+=RxPWDBAll; ++ pDM_FatTable->AuxAnt_CtrlFrame_Cnt++; ++ } ++} ++ ++VOID ++odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI( ++ IN PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++ //IN PODM_PHY_INFO_T pPhyInfo, ++ //IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_PHY_INFO_T pPhyInfo=(PODM_PHY_INFO_T)p_phy_info_void; ++ PODM_PACKET_INFO_T pPktinfo=(PODM_PACKET_INFO_T)p_pkt_info_void; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ BOOLEAN isCCKrate; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) ++ return; ++ ++ if(pDM_Odm->AntDivType != S0S1_SW_ANTDIV) ++ return; ++ ++ // In try state ++ if(!pDM_SWAT_Table->bSWAntDivByCtrlFrame) ++ return; ++ ++ // No HW error and match receiver address ++ if(!pPktinfo->bToSelf) ++ return; ++ ++ pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame++; ++ isCCKrate = ((pPktinfo->DataRate >= DESC_RATE1M ) && (pPktinfo->DataRate <= DESC_RATE11M ))?TRUE :FALSE; ++ ++ if(isCCKrate) ++ { ++ pDM_FatTable->antsel_rx_keep_0 = (pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ANT1_2G : ANT2_2G; ++ ++ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) ++ pDM_FatTable->CCK_CtrlFrame_Cnt_main++; ++ else ++ pDM_FatTable->CCK_CtrlFrame_Cnt_aux++; ++ ++ odm_AntselStatisticsOfCtrlFrame(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]); ++ } ++ else ++ { ++ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) ++ pDM_FatTable->OFDM_CtrlFrame_Cnt_main++; ++ else ++ pDM_FatTable->OFDM_CtrlFrame_Cnt_aux++; ++ ++ odm_AntselStatisticsOfCtrlFrame(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPhyInfo->RxPWDBAll); ++ } ++} ++ ++#endif //#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) ++ ++ ++ ++ ++VOID ++odm_SetNextMACAddrTarget( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ PSTA_INFO_T pEntry; ++ u4Byte value32, i; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SetNextMACAddrTarget() ==>\n")); ++ ++ if (pDM_Odm->bLinked) ++ { ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ ++ if ((pDM_FatTable->TrainIdx+1) == ODM_ASSOCIATE_ENTRY_NUM) ++ pDM_FatTable->TrainIdx = 0; ++ else ++ pDM_FatTable->TrainIdx++; ++ ++ pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; ++ ++ if (IS_STA_VALID(pEntry)) { ++ ++ /*Match MAC ADDR*/ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE)) ++ value32 = (pEntry->hwaddr[5]<<8)|pEntry->hwaddr[4]; ++ #else ++ value32 = (pEntry->MacAddr[5]<<8)|pEntry->MacAddr[4]; ++ #endif ++ ++ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32);/*0x7b4~0x7b5*/ ++ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE)) ++ value32 = (pEntry->hwaddr[3]<<24)|(pEntry->hwaddr[2]<<16) |(pEntry->hwaddr[1]<<8) |pEntry->hwaddr[0]; ++ #else ++ value32 = (pEntry->MacAddr[3]<<24)|(pEntry->MacAddr[2]<<16) |(pEntry->MacAddr[1]<<8) |pEntry->MacAddr[0]; ++ #endif ++ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32);/*0x7b0~0x7b3*/ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->TrainIdx=%d\n", pDM_FatTable->TrainIdx)); ++ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE)) ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", ++ pEntry->hwaddr[5], pEntry->hwaddr[4], pEntry->hwaddr[3], pEntry->hwaddr[2], pEntry->hwaddr[1], pEntry->hwaddr[0])); ++ #else ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", ++ pEntry->MacAddr[5], pEntry->MacAddr[4], pEntry->MacAddr[3], pEntry->MacAddr[2], pEntry->MacAddr[1], pEntry->MacAddr[0])); ++ #endif ++ ++ break; ++ } ++ } ++ } ++ ++#if 0 ++ // ++ //2012.03.26 LukeLee: This should be removed later, the MAC address is changed according to MACID in turn ++ // ++ #if( DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ { ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ for (i=0; i<6; i++) ++ { ++ Bssid[i] = pMgntInfo->Bssid[i]; ++ //DbgPrint("Bssid[%d]=%x\n", i, Bssid[i]); ++ } ++ } ++ #endif ++ ++ //odm_SetNextMACAddrTarget(pDM_Odm); ++ ++ //1 Select MAC Address Filter ++ for (i=0; i<6; i++) ++ { ++ if(Bssid[i] != pDM_FatTable->Bssid[i]) ++ { ++ bMatchBSSID = FALSE; ++ break; ++ } ++ } ++ if(bMatchBSSID == FALSE) ++ { ++ //Match MAC ADDR ++ value32 = (Bssid[5]<<8)|Bssid[4]; ++ ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32); ++ value32 = (Bssid[3]<<24)|(Bssid[2]<<16) |(Bssid[1]<<8) |Bssid[0]; ++ ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32); ++ } ++ ++ return bMatchBSSID; ++#endif ++ ++} ++ ++#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) ++ ++VOID ++odm_FastAntTraining( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ u4Byte MaxRSSI_pathA=0, Pckcnt_pathA=0; ++ u1Byte i,TargetAnt_pathA=0; ++ BOOLEAN bPktFilterMacth_pathA = FALSE; ++ #if(RTL8192E_SUPPORT == 1) ++ u4Byte MaxRSSI_pathB=0, Pckcnt_pathB=0; ++ u1Byte TargetAnt_pathB=0; ++ BOOLEAN bPktFilterMacth_pathB = FALSE; ++ #endif ++ ++ ++ if(!pDM_Odm->bLinked) //bLinked==False ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); ++ ++ if(pDM_FatTable->bBecomeLinked == TRUE) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ return; ++ } ++ else ++ { ++ if(pDM_FatTable->bBecomeLinked ==FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked!!!]\n")); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm , TX_BY_DESC); ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ } ++ ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT2|BIT1|BIT0, ((pDM_Odm->fat_comb_a)-1)); ++ } ++ #if(RTL8192E_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT2|BIT1|BIT0, ((pDM_Odm->fat_comb_a)-1) ); //path-A // ant combination=regB38[2:0]+1 ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT18|BIT17|BIT16, ((pDM_Odm->fat_comb_b)-1) ); //path-B // ant combination=regB38[18:16]+1 ++ } ++ #endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("==>odm_FastAntTraining()\n")); ++ ++ //1 TRAINING STATE ++ if(pDM_FatTable->FAT_State == FAT_TRAINING_STATE) ++ { ++ //2 Caculate RSSI per Antenna ++ ++ //3 [path-A]--------------------------- ++ for (i=0; i<(pDM_Odm->fat_comb_a); i++) // i : antenna index ++ { ++ if(pDM_FatTable->antRSSIcnt[i] == 0) ++ pDM_FatTable->antAveRSSI[i] = 0; ++ else ++ { ++ pDM_FatTable->antAveRSSI[i] = pDM_FatTable->antSumRSSI[i] /pDM_FatTable->antRSSIcnt[i]; ++ bPktFilterMacth_pathA = TRUE; ++ } ++ ++ if(pDM_FatTable->antAveRSSI[i] > MaxRSSI_pathA) ++ { ++ MaxRSSI_pathA = pDM_FatTable->antAveRSSI[i]; ++ Pckcnt_pathA = pDM_FatTable ->antRSSIcnt[i]; ++ TargetAnt_pathA = i ; ++ } ++ else if(pDM_FatTable->antAveRSSI[i] == MaxRSSI_pathA) ++ { ++ if( (pDM_FatTable->antRSSIcnt[i] ) > Pckcnt_pathA) ++ { ++ MaxRSSI_pathA = pDM_FatTable->antAveRSSI[i]; ++ Pckcnt_pathA = pDM_FatTable ->antRSSIcnt[i]; ++ TargetAnt_pathA = i ; ++ } ++ } ++ ++ ODM_RT_TRACE("*** Ant-Index : [ %d ], Counter = (( %d )), Avg RSSI = (( %d )) \n", i, pDM_FatTable->antRSSIcnt[i], pDM_FatTable->antAveRSSI[i] ); ++ } ++ ++ ++ /* ++ #if(RTL8192E_SUPPORT == 1) ++ //3 [path-B]--------------------------- ++ for (i=0; i<(pDM_Odm->fat_comb_b); i++) ++ { ++ if(pDM_FatTable->antRSSIcnt_pathB[i] == 0) ++ pDM_FatTable->antAveRSSI_pathB[i] = 0; ++ else // (antRSSIcnt[i] != 0) ++ { ++ pDM_FatTable->antAveRSSI_pathB[i] = pDM_FatTable->antSumRSSI_pathB[i] /pDM_FatTable->antRSSIcnt_pathB[i]; ++ bPktFilterMacth_pathB = TRUE; ++ } ++ if(pDM_FatTable->antAveRSSI_pathB[i] > MaxRSSI_pathB) ++ { ++ MaxRSSI_pathB = pDM_FatTable->antAveRSSI_pathB[i]; ++ Pckcnt_pathB = pDM_FatTable ->antRSSIcnt_pathB[i]; ++ TargetAnt_pathB = (u1Byte) i; ++ } ++ if(pDM_FatTable->antAveRSSI_pathB[i] == MaxRSSI_pathB) ++ { ++ if(pDM_FatTable ->antRSSIcnt_pathB > Pckcnt_pathB) ++ { ++ MaxRSSI_pathB = pDM_FatTable->antAveRSSI_pathB[i]; ++ TargetAnt_pathB = (u1Byte) i; ++ } ++ } ++ if (pDM_Odm->fat_print_rssi==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***{Path-B}: Sum RSSI[%d] = (( %d )), cnt RSSI [%d] = (( %d )), Avg RSSI[%d] = (( %d )) \n", ++ i, pDM_FatTable->antSumRSSI_pathB[i], i, pDM_FatTable->antRSSIcnt_pathB[i], i, pDM_FatTable->antAveRSSI_pathB[i])); ++ } ++ } ++ #endif ++ */ ++ ++ //1 DECISION STATE ++ ++ //2 Select TRX Antenna ++ ++ phydm_FastTraining_enable(pDM_Odm, FAT_OFF); ++ ++ //3 [path-A]--------------------------- ++ if(bPktFilterMacth_pathA == FALSE) ++ { ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("{Path-A}: None Packet is matched\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("{Path-A}: None Packet is matched\n")); ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ } ++ else ++ { ++ ODM_RT_TRACE("TargetAnt_pathA = (( %d )) , MaxRSSI_pathA = (( %d )) \n",TargetAnt_pathA,MaxRSSI_pathA); ++ ++ //3 [ update RX-optional ant ] Default RX is Omni, Optional RX is the best decision by FAT ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, TargetAnt_pathA); ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT8|BIT7|BIT6, TargetAnt_pathA);//Optional RX [pth-A] ++ } ++ //3 [ update TX ant ] ++ odm_UpdateTxAnt(pDM_Odm, TargetAnt_pathA, (pDM_FatTable->TrainIdx)); ++ ++ if(TargetAnt_pathA == 0) ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ } ++ /* ++ #if(RTL8192E_SUPPORT == 1) ++ //3 [path-B]--------------------------- ++ if(bPktFilterMacth_pathB == FALSE) ++ { ++ if (pDM_Odm->fat_print_rssi==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***[%d]{Path-B}: None Packet is matched\n\n\n",__LINE__)); ++ } ++ } ++ else ++ { ++ if (pDM_Odm->fat_print_rssi==1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ++ (" ***TargetAnt_pathB = (( %d )) *** MaxRSSI = (( %d ))***\n\n\n",TargetAnt_pathB,MaxRSSI_pathB)); ++ } ++ ODM_SetBBReg(pDM_Odm, 0xB38 , BIT21|BIT20|BIT19, TargetAnt_pathB); //Default RX is Omni, Optional RX is the best decision by FAT ++ ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info ++ ++ pDM_FatTable->antsel_pathB[pDM_FatTable->TrainIdx] = TargetAnt_pathB; ++ } ++ #endif ++ */ ++ ++ //2 Reset Counter ++ for(i=0; i<(pDM_Odm->fat_comb_a); i++) ++ { ++ pDM_FatTable->antSumRSSI[i] = 0; ++ pDM_FatTable->antRSSIcnt[i] = 0; ++ } ++ /* ++ #if(RTL8192E_SUPPORT == 1) ++ for(i=0; i<=(pDM_Odm->fat_comb_b); i++) ++ { ++ pDM_FatTable->antSumRSSI_pathB[i] = 0; ++ pDM_FatTable->antRSSIcnt_pathB[i] = 0; ++ } ++ #endif ++ */ ++ ++ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; ++ return; ++ } ++ ++ //1 NORMAL STATE ++ if (pDM_FatTable->FAT_State == FAT_PREPARE_STATE) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Start Prepare State ]\n")); ++ ++ odm_SetNextMACAddrTarget(pDM_Odm); ++ ++ //2 Prepare Training ++ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; ++ phydm_FastTraining_enable(pDM_Odm , FAT_ON); ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); //enable HW AntDiv ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Start Training State]\n")); ++ ++ ODM_SetTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, pDM_Odm->antdiv_intvl ); //ms ++ } ++ ++} ++ ++VOID ++odm_FastAntTrainingCallback( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER padapter = pDM_Odm->Adapter; ++ if(padapter->net_closed == _TRUE) ++ return; ++ //if(*pDM_Odm->pbNet_closed == TRUE) ++ // return; ++#endif ++ ++#if USE_WORKITEM ++ ODM_ScheduleWorkItem(&pDM_Odm->FastAntTrainingWorkitem); ++#else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("******odm_FastAntTrainingCallback****** \n")); ++ odm_FastAntTraining(pDM_Odm); ++#endif ++} ++ ++VOID ++odm_FastAntTrainingWorkItemCallback( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("******odm_FastAntTrainingWorkItemCallback****** \n")); ++ odm_FastAntTraining(pDM_Odm); ++} ++ ++#endif ++ ++#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ ++u4Byte ++phydm_construct_hl_beam_codeword( ++ IN PVOID pDM_VOID, ++ IN u4Byte *beam_pattern_idx, ++ IN u4Byte ant_num ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte codeword = 0; ++ u4Byte data_tmp; ++ u1Byte i; ++ ++ if (ant_num < 8) { ++ for (i = 0; i < ant_num; i++) { ++ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("beam_pattern_num[%x] = %x\n",i,beam_pattern_num[i] ));*/ ++ if (beam_pattern_idx[i] == 0) { ++ data_tmp = 0x1; ++ /**/ ++ } else if (beam_pattern_idx[i] == 1) { ++ data_tmp = 0x2; ++ /**/ ++ } else if (beam_pattern_idx[i] == 2) { ++ data_tmp = 0x4; ++ /**/ ++ } else if (beam_pattern_idx[i] == 3) { ++ data_tmp = 0x8; ++ /**/ ++ } ++ codeword |= (data_tmp<<(i*4)); ++ } ++ } ++ ++ return codeword; ++} ++ ++VOID ++phydm_update_beam_pattern( ++ IN PVOID pDM_VOID, ++ IN u4Byte codeword, ++ IN u4Byte codeword_length ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ u1Byte i; ++ BOOLEAN beam_ctrl_signal; ++ u4Byte one = 0x1; ++ u4Byte reg44_tmp_p, reg44_tmp_n, reg44_ori; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Set Beam Pattern =0x%x\n", codeword)); ++ ++ reg44_ori = ODM_GetMACReg(pDM_Odm, 0x44, bMaskDWord); ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_ori =0x%x\n", reg44_ori));*/ ++ ++ for (i = 0; i <= (codeword_length-1); i++) { ++ beam_ctrl_signal = (BOOLEAN)((codeword&BIT(i)) >> i); ++ ++ if (pDM_Odm->DebugComponents & ODM_COMP_ANT_DIV) { ++ ++ if (i == (codeword_length-1)) { ++ DbgPrint("%d ]\n", beam_ctrl_signal); ++ /**/ ++ } else if (i == 0) { ++ DbgPrint("Send codeword[1:24] ---> [ %d ", beam_ctrl_signal); ++ /**/ ++ } else if ((i % 4) == 3) { ++ DbgPrint("%d | ", beam_ctrl_signal); ++ /**/ ++ } else { ++ DbgPrint("%d ", beam_ctrl_signal); ++ /**/ ++ } ++ } ++ ++ #if 1 ++ reg44_tmp_p = reg44_ori & (~(BIT11|BIT10)); /*clean bit 10 & 11*/ ++ reg44_tmp_p |= ((1<<11) | (beam_ctrl_signal<<10)); ++ reg44_tmp_n = reg44_ori & (~(BIT11|BIT10)); ++ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n));*/ ++ ODM_SetMACReg(pDM_Odm, 0x44 , bMaskDWord, reg44_tmp_p); ++ ODM_SetMACReg(pDM_Odm, 0x44 , bMaskDWord, reg44_tmp_n); ++ #else ++ ODM_SetMACReg(pDM_Odm, 0x44 , BIT11|BIT10, ((1<<1) | beam_ctrl_signal)); ++ ODM_SetMACReg(pDM_Odm, 0x44 , BIT11, 0); ++ #endif ++ ++ } ++} ++ ++VOID ++phydm_update_rx_idle_beam( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ u4Byte i; ++ ++ pdm_sat_table->update_beam_codeword = phydm_construct_hl_beam_codeword(pDM_Odm, &(pdm_sat_table->rx_idle_beam[0]), pdm_sat_table->ant_num); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Set target beam_pattern codeword = (( 0x%x ))\n", pdm_sat_table->update_beam_codeword)); ++ ++ for (i = 0; i < (pdm_sat_table->ant_num); i++) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Beam ] RxIdleBeam[%d] =%d\n", i, pdm_sat_table->rx_idle_beam[i])); ++ /**/ ++ } ++ ++ #if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); ++ #else ++ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_workitem); ++ /*ODM_StallExecution(1);*/ ++ #endif ++ ++ pdm_sat_table->pre_codeword = pdm_sat_table->update_beam_codeword; ++} ++ ++VOID ++phydm_hl_smart_ant_cmd( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ u4Byte one = 0x1; ++ u4Byte codeword_length = pdm_sat_table->data_codeword_bit_num; ++ u4Byte beam_ctrl_signal, i; ++ ++ if (dm_value[0] == 1) { /*fix beam pattern*/ ++ ++ pdm_sat_table->fix_beam_pattern_en = dm_value[1]; ++ ++ if (pdm_sat_table->fix_beam_pattern_en == 1) { ++ ++ pdm_sat_table->fix_beam_pattern_codeword = dm_value[2]; ++ ++ if (pdm_sat_table->fix_beam_pattern_codeword > (one<fix_beam_pattern_codeword, codeword_length)); ++ (pdm_sat_table->fix_beam_pattern_codeword) &= 0xffffff; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Auto modify to (0x%x)\n", pdm_sat_table->fix_beam_pattern_codeword)); ++ } ++ ++ pdm_sat_table->update_beam_codeword = pdm_sat_table->fix_beam_pattern_codeword; ++ ++ /*---------------------------------------------------------*/ ++ PHYDM_SNPRINTF((output+used, out_len-used, "Fix Beam Pattern\n")); ++ for (i = 0; i <= (codeword_length-1); i++) { ++ beam_ctrl_signal = (BOOLEAN)((pdm_sat_table->update_beam_codeword&BIT(i)) >> i); ++ ++ if (i == (codeword_length-1)) { ++ PHYDM_SNPRINTF((output+used, out_len-used, "%d]\n", beam_ctrl_signal)); ++ /**/ ++ } else if (i == 0) { ++ PHYDM_SNPRINTF((output+used, out_len-used, "Send Codeword[1:24] to RFU -> [%d", beam_ctrl_signal)); ++ /**/ ++ } else if ((i % 4) == 3) { ++ PHYDM_SNPRINTF((output+used, out_len-used, "%d|", beam_ctrl_signal)); ++ /**/ ++ } else { ++ PHYDM_SNPRINTF((output+used, out_len-used, "%d", beam_ctrl_signal)); ++ /**/ ++ } ++ } ++ /*---------------------------------------------------------*/ ++ ++ ++ #if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); ++ #else ++ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_workitem); ++ /*ODM_StallExecution(1);*/ ++ #endif ++ } else if (pdm_sat_table->fix_beam_pattern_en == 0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Smart Antenna: Enable\n")); ++ } ++ ++ } else if (dm_value[0] == 2) { /*set latch time*/ ++ ++ pdm_sat_table->latch_time = dm_value[1]; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] latch_time =0x%x\n", pdm_sat_table->latch_time)); ++ } else if (dm_value[0] == 3) { ++ ++ pdm_sat_table->fix_training_num_en = dm_value[1]; ++ ++ if (pdm_sat_table->fix_training_num_en == 1) { ++ pdm_sat_table->per_beam_training_pkt_num = dm_value[2]; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Fix per_beam_training_pkt_num = (( 0x%x ))\n", pdm_sat_table->per_beam_training_pkt_num)); ++ } else if (pdm_sat_table->fix_training_num_en == 0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] AUTO per_beam_training_pkt_num\n")); ++ /**/ ++ } ++ } ++ ++} ++ ++ ++void ++phydm_set_all_ant_same_beam_num( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ ++ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) { /*2Ant for 8821A*/ ++ ++ pdm_sat_table->rx_idle_beam[0] = pdm_sat_table->fast_training_beam_num; ++ pdm_sat_table->rx_idle_beam[1] = pdm_sat_table->fast_training_beam_num; ++ } ++ ++ pdm_sat_table->update_beam_codeword = phydm_construct_hl_beam_codeword(pDM_Odm, &(pdm_sat_table->rx_idle_beam[0]), pdm_sat_table->ant_num); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Set all ant beam_pattern: codeword = (( 0x%x ))\n", pdm_sat_table->update_beam_codeword)); ++ ++ #if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); ++ #else ++ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_workitem); ++ /*ODM_StallExecution(1);*/ ++ #endif ++} ++ ++VOID ++odm_FastAntTraining_hl_smart_antenna_type1( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ pFAT_T pDM_FatTable = &(pDM_Odm->DM_FatTable); ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ u4Byte codeword = 0, i, j; ++ u4Byte TargetAnt; ++ u4Byte avg_rssi_tmp; ++ u4Byte target_ant_beam_max_rssi[SUPPORT_RF_PATH_NUM] = {0}; ++ u4Byte max_beam_ant_rssi = 0; ++ u4Byte target_ant_beam[SUPPORT_RF_PATH_NUM] = {0}; ++ u4Byte beam_tmp; ++ ++ ++ if (!pDM_Odm->bLinked) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); ++ ++ if (pDM_FatTable->bBecomeLinked == TRUE) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Link -> no Link\n")); ++ pDM_FatTable->FAT_State = FAT_BEFORE_LINK_STATE; ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("change to (( %d )) FAT_state\n", pDM_FatTable->FAT_State)); ++ ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ return; ++ ++ } else { ++ if (pDM_FatTable->bBecomeLinked == FALSE) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n")); ++ ++ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("change to (( %d )) FAT_state\n", pDM_FatTable->FAT_State)); ++ ++ /*pdm_sat_table->fast_training_beam_num = 0;*/ ++ /*phydm_set_all_ant_same_beam_num(pDM_Odm);*/ ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_DESC); ++ ++ pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ } ++ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("HL Smart Ant Training: State (( %d ))\n", pDM_FatTable->FAT_State));*/ ++ ++ /* [DECISION STATE] */ ++ /*=======================================================================================*/ ++ if (pDM_FatTable->FAT_State == FAT_DECISION_STATE) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 3. In Decision State]\n")); ++ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); ++ ++ /*compute target beam in each antenna*/ ++ for (i = 0; i < (pdm_sat_table->ant_num); i++) { ++ for (j = 0; j < (pdm_sat_table->beam_patten_num_each_ant); j++) { ++ ++ if (pdm_sat_table->pkt_rssi_cnt[i][j] == 0) { ++ avg_rssi_tmp = pdm_sat_table->pkt_rssi_pre[i][j]; ++ /**/ ++ } else { ++ avg_rssi_tmp = (pdm_sat_table->pkt_rssi_sum[i][j]) / (pdm_sat_table->pkt_rssi_cnt[i][j]); ++ pdm_sat_table->pkt_rssi_pre[i][j] = avg_rssi_tmp; ++ /**/ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant[%d], Beam[%d]: pkt_num=(( %d )), avg_rssi=(( %d ))\n", i, j, pdm_sat_table->pkt_rssi_cnt[i][j], avg_rssi_tmp)); ++ ++ if (avg_rssi_tmp > target_ant_beam_max_rssi[i]) { ++ target_ant_beam[i] = j; ++ target_ant_beam_max_rssi[i] = avg_rssi_tmp; ++ } ++ ++ /*reset counter value*/ ++ pdm_sat_table->pkt_rssi_sum[i][j] = 0; ++ pdm_sat_table->pkt_rssi_cnt[i][j] = 0; ++ ++ } ++ pdm_sat_table->rx_idle_beam[i] = target_ant_beam[i]; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("---------> Target of Ant[%d]: Beam_num-(( %d )) RSSI= ((%d))\n", ++ i, target_ant_beam[i], target_ant_beam_max_rssi[i])); ++ ++ if (target_ant_beam_max_rssi[i] > max_beam_ant_rssi) { ++ TargetAnt = i; ++ max_beam_ant_rssi = target_ant_beam_max_rssi[i]; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Target of Ant = (( %d )) max_beam_ant_rssi = (( %d ))\n", ++ TargetAnt, max_beam_ant_rssi)); ++ } ++ } ++ ++ if (TargetAnt == 0) ++ TargetAnt = MAIN_ANT; ++ else if (TargetAnt == 1) ++ TargetAnt = AUX_ANT; ++ ++ /* [ update RX ant ]*/ ++ ODM_UpdateRxIdleAnt(pDM_Odm, (u1Byte)TargetAnt); ++ ++ /* [ update TX ant ]*/ ++ odm_UpdateTxAnt(pDM_Odm, (u1Byte)TargetAnt, (pDM_FatTable->TrainIdx)); ++ ++ /*set beam in each antenna*/ ++ phydm_update_rx_idle_beam(pDM_Odm); ++ ++ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ pDM_FatTable->FAT_State = FAT_PREPARE_STATE; ++ ++ } ++ /* [TRAINING STATE] */ ++ else if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2. In Training State]\n")); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("fat_beam_n = (( %d )), pre_fat_beam_n = (( %d ))\n", ++ pdm_sat_table->fast_training_beam_num, pdm_sat_table->pre_fast_training_beam_num)); ++ ++ if (pdm_sat_table->fast_training_beam_num > pdm_sat_table->pre_fast_training_beam_num) { ++ ++ pdm_sat_table->force_update_beam_en = 0; ++ ++ } else { ++ ++ pdm_sat_table->force_update_beam_en = 1; ++ ++ pdm_sat_table->pkt_counter = 0; ++ beam_tmp = pdm_sat_table->fast_training_beam_num; ++ if (pdm_sat_table->fast_training_beam_num >= (pdm_sat_table->beam_patten_num_each_ant-1)) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Timeout Update] Beam_num (( %d )) -> (( decision ))\n", pdm_sat_table->fast_training_beam_num)); ++ phydm_FastTraining_enable(pDM_Odm , FAT_OFF); ++ pDM_FatTable->FAT_State = FAT_DECISION_STATE; ++ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); ++ ++ } else { ++ pdm_sat_table->fast_training_beam_num++; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Timeout Update] Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num)); ++ phydm_set_all_ant_same_beam_num(pDM_Odm); ++ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; ++ ++ } ++ } ++ pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Update Pre_Beam =(( %d ))\n", pdm_sat_table->pre_fast_training_beam_num)); ++ } ++ /* [Prepare State] */ ++ /*=======================================================================================*/ ++ else if (pDM_FatTable->FAT_State == FAT_PREPARE_STATE) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n\n[ 1. In Prepare State]\n")); ++ ++ if (pDM_Odm->pre_TrafficLoad == (pDM_Odm->TrafficLoad)) { ++ if (pdm_sat_table->decision_holding_period != 0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Holding_period = (( %d )), return!!!\n", pdm_sat_table->decision_holding_period)); ++ pdm_sat_table->decision_holding_period--; ++ return; ++ } ++ } ++ ++ ++ /* Set training packet number*/ ++ if (pdm_sat_table->fix_training_num_en == 0) { ++ ++ switch (pDM_Odm->TrafficLoad) { ++ ++ case TRAFFIC_HIGH: ++ pdm_sat_table->per_beam_training_pkt_num = 20; ++ pdm_sat_table->decision_holding_period = 0; ++ break; ++ case TRAFFIC_MID: ++ pdm_sat_table->per_beam_training_pkt_num = 10; ++ pdm_sat_table->decision_holding_period = 1; ++ break; ++ case TRAFFIC_LOW: ++ pdm_sat_table->per_beam_training_pkt_num = 5; /*ping 60000*/ ++ pdm_sat_table->decision_holding_period = 3; ++ break; ++ case TRAFFIC_ULTRA_LOW: ++ pdm_sat_table->per_beam_training_pkt_num = 2; ++ pdm_sat_table->decision_holding_period = 5; ++ break; ++ default: ++ break; ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Fix_training_num = (( %d )), per_beam_training_pkt_num = (( %d ))\n", ++ pdm_sat_table->fix_training_num_en , pdm_sat_table->per_beam_training_pkt_num)); ++ ++ /* Set training MAC Addr. of target */ ++ odm_SetNextMACAddrTarget(pDM_Odm); ++ ++ phydm_FastTraining_enable(pDM_Odm , FAT_ON); ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ pdm_sat_table->pkt_counter = 0; ++ pdm_sat_table->fast_training_beam_num = 0; ++ phydm_set_all_ant_same_beam_num(pDM_Odm); ++ pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num; ++ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; ++ } ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++phydm_beam_switch_workitem_callback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ ++ #if DEV_BUS_TYPE != RT_PCI_INTERFACE ++ pdm_sat_table->pkt_skip_statistic_en = 1; ++ #endif ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en)); ++ ++ phydm_update_beam_pattern(pDM_Odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num); ++ ++ #if DEV_BUS_TYPE != RT_PCI_INTERFACE ++ /*ODM_StallExecution(pdm_sat_table->latch_time);*/ ++ pdm_sat_table->pkt_skip_statistic_en = 0; ++ #endif ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en, pdm_sat_table->latch_time)); ++} ++ ++VOID ++phydm_beam_decision_workitem_callback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Beam decision Workitem Callback\n")); ++ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); ++} ++#endif ++ ++#endif /*#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/ ++ ++VOID ++ODM_AntDivInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] Not Support Antenna Diversity Function\n")); ++ return; ++ } ++ //--- ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_2G) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[2G AntDiv Init]: Only Support 2G Antenna Diversity Function\n")); ++ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC)) ++ return; ++ } ++ else if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_5G) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[5G AntDiv Init]: Only Support 5G Antenna Diversity Function\n")); ++ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC)) ++ return; ++ } ++ else if(pDM_FatTable->AntDiv_2G_5G == (ODM_ANTDIV_2G|ODM_ANTDIV_5G)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[2G & 5G AntDiv Init]:Support Both 2G & 5G Antenna Diversity Function\n")); ++ } ++ ++#endif ++ //--- ++ ++ //2 [--General---] ++ pDM_Odm->antdiv_period=0; ++ ++ pDM_FatTable->bBecomeLinked =FALSE; ++ pDM_FatTable->AntDiv_OnOff =0xff; ++ ++ //3 - AP - ++ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ #ifdef BEAMFORMING_SUPPORT ++ #if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ odm_BDC_Init(pDM_Odm); ++ #endif ++ #endif ++ ++ //3 - WIN - ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_SWAT_Table->Ant5G = MAIN_ANT; ++ pDM_SWAT_Table->Ant2G = MAIN_ANT; ++ pDM_FatTable->CCK_counter_main=0; ++ pDM_FatTable->CCK_counter_aux=0; ++ pDM_FatTable->OFDM_counter_main=0; ++ pDM_FatTable->OFDM_counter_aux=0; ++ #endif ++ ++ //2 [---Set MAIN_ANT as default antenna if Auto-Ant enable---] ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ ++ pDM_Odm->AntType = ODM_AUTO_ANT; ++ ++ pDM_FatTable->RxIdleAnt = 0xff; /*to make RX-idle-antenna will be updated absolutly*/ ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ ++ //2 [---Set TX Antenna---] ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); ++ ++ ++ //2 [--88E---] ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ #if (RTL8188E_SUPPORT == 1) ++ //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ++ if( (pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_SMART_ANTDIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 88E Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ ++ if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ odm_RX_HWAntDiv_Init_88E(pDM_Odm); ++ else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_TRX_HWAntDiv_Init_88E(pDM_Odm); ++ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) ++ odm_Smart_HWAntDiv_Init_88E(pDM_Odm); ++ #endif ++ #endif ++ } ++ ++ //2 [--92E---] ++ #if (RTL8192E_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ++ if( (pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_SMART_ANTDIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8192E Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ ++ if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ odm_RX_HWAntDiv_Init_92E(pDM_Odm); ++ else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_TRX_HWAntDiv_Init_92E(pDM_Odm); ++ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) ++ odm_Smart_HWAntDiv_Init_92E(pDM_Odm); ++ #endif ++ ++ } ++ #endif ++ ++ //2 [--8723B---] ++ #if (RTL8723B_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ++ if(pDM_Odm->AntDivType != S0S1_SW_ANTDIV && pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8723B Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ ++ if( pDM_Odm->AntDivType==S0S1_SW_ANTDIV) ++ odm_S0S1_SWAntDiv_Init_8723B(pDM_Odm); ++ else if(pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV) ++ odm_TRX_HWAntDiv_Init_8723B(pDM_Odm); ++ } ++ #endif ++ ++ //2 [--8811A 8821A---] ++ #if (RTL8821A_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ pDM_Odm->AntDivType = HL_SW_SMART_ANT_TYPE1; ++ ++ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) { ++ ++ odm_TRX_HWAntDiv_Init_8821A(pDM_Odm); ++ phydm_hl_smart_ant_type1_init_8821a(pDM_Odm); ++ } else ++ #endif ++ { ++ /*pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV;*/ ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ++ if (pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV && pDM_Odm->AntDivType != S0S1_SW_ANTDIV) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Return!!!] 8821A & 8811A Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_TRX_HWAntDiv_Init_8821A(pDM_Odm); ++ else if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) ++ odm_S0S1_SWAntDiv_Init_8821A(pDM_Odm); ++ } ++ } ++ #endif ++ ++ //2 [--8881A---] ++ #if (RTL8881A_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8881A) ++ { ++ //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ++ if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV && pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8881A Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ odm_RX_HWAntDiv_Init_8881A(pDM_Odm); ++ else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_TRX_HWAntDiv_Init_8881A(pDM_Odm); ++ } ++ #endif ++ ++ //2 [--8812---] ++ #if (RTL8812A_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ++ if( pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8812A Not Supprrt This AntDiv Type\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ return; ++ } ++ odm_TRX_HWAntDiv_Init_8812A(pDM_Odm); ++ } ++ #endif ++ ++ /*[--8188F---]*/ ++ #if (RTL8188F_SUPPORT == 1) ++ else if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ odm_S0S1_SWAntDiv_Init_8188F(pDM_Odm); ++ } ++ #endif ++ /* ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** SupportICType=[%lu]\n",pDM_Odm->SupportICType)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** AntDiv SupportAbility=[%lu]\n",(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)>>6)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** AntDiv Type=[%d]\n",pDM_Odm->AntDivType)); ++ */ ++} ++ ++VOID ++ODM_AntDiv( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ #endif ++ ++ if(*pDM_Odm->pBandType == ODM_BAND_5G ) ++ { ++ if(pDM_FatTable->idx_AntDiv_counter_5G < pDM_Odm->antdiv_period ) ++ { ++ pDM_FatTable->idx_AntDiv_counter_5G++; ++ return; ++ } ++ else ++ pDM_FatTable->idx_AntDiv_counter_5G=0; ++ } ++ else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) ++ { ++ if(pDM_FatTable->idx_AntDiv_counter_2G < pDM_Odm->antdiv_period ) ++ { ++ pDM_FatTable->idx_AntDiv_counter_2G++; ++ return; ++ } ++ else ++ pDM_FatTable->idx_AntDiv_counter_2G=0; ++ } ++ ++ //---------- ++ if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] Not Support Antenna Diversity Function\n")); ++ return; ++ } ++ ++ //---------- ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ if (pDM_FatTable->enable_ctrl_frame_antdiv) { ++ ++ if ((pDM_Odm->data_frame_num <= 10) && (pDM_Odm->bLinked)) ++ pDM_FatTable->use_ctrl_frame_antdiv = 1; ++ else ++ pDM_FatTable->use_ctrl_frame_antdiv = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("use_ctrl_frame_antdiv = (( %d )), data_frame_num = (( %d ))\n", pDM_FatTable->use_ctrl_frame_antdiv, pDM_Odm->data_frame_num)); ++ pDM_Odm->data_frame_num = 0; ++ } ++ ++ if(pAdapter->MgntInfo.AntennaTest) ++ return; ++ ++ { ++ #if (BEAMFORMING_SUPPORT == 1) ++ BEAMFORMING_CAP BeamformCap = (pDM_Odm->BeamformingInfo.BeamformCap); ++ ++ if( BeamformCap & BEAMFORMEE_CAP ) // BFmee On && Div On -> Div Off ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ AntDiv : OFF ] BFmee ==1 \n")); ++ if(pDM_FatTable->fix_ant_bfee == 0) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ pDM_FatTable->fix_ant_bfee = 1; ++ } ++ return; ++ } ++ else // BFmee Off && Div Off -> Div On ++ { ++ if((pDM_FatTable->fix_ant_bfee == 1) && pDM_Odm->bLinked) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ AntDiv : ON ] BFmee ==0\n")); ++ if((pDM_Odm->AntDivType!=S0S1_SW_ANTDIV) ) ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ ++ pDM_FatTable->fix_ant_bfee = 0; ++ } ++ } ++ #endif ++ } ++#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ //----------just for fool proof ++ ++ if(pDM_Odm->antdiv_rssi) ++ pDM_Odm->DebugComponents |= ODM_COMP_ANT_DIV; ++ else ++ pDM_Odm->DebugComponents &= ~ODM_COMP_ANT_DIV; ++ ++ if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_2G) ++ { ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 2G AntDiv Running ]\n")); ++ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC)) ++ return; ++ } ++ else if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_5G) ++ { ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 5G AntDiv Running ]\n")); ++ if(!(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC)) ++ return; ++ } ++ //else if(pDM_FatTable->AntDiv_2G_5G == (ODM_ANTDIV_2G|ODM_ANTDIV_5G)) ++ //{ ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 2G & 5G AntDiv Running ]\n")); ++ //} ++#endif ++ ++ //---------- ++ ++ if (pDM_Odm->antdiv_select==1) ++ pDM_Odm->AntType = ODM_FIX_MAIN_ANT; ++ else if (pDM_Odm->antdiv_select==2) ++ pDM_Odm->AntType = ODM_FIX_AUX_ANT; ++ else //if (pDM_Odm->antdiv_select==0) ++ pDM_Odm->AntType = ODM_AUTO_ANT; ++ ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("AntType= (( %d )) , pre_AntType= (( %d )) \n",pDM_Odm->AntType,pDM_Odm->pre_AntType)); ++ ++ if(pDM_Odm->AntType != ODM_AUTO_ANT) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Fix Antenna at (( %s ))\n",(pDM_Odm->AntType == ODM_FIX_MAIN_ANT)?"MAIN":"AUX")); ++ ++ if(pDM_Odm->AntType != pDM_Odm->pre_AntType) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm, TX_BY_REG); ++ ++ if(pDM_Odm->AntType == ODM_FIX_MAIN_ANT) ++ ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); ++ else if(pDM_Odm->AntType == ODM_FIX_AUX_ANT) ++ ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); ++ } ++ pDM_Odm->pre_AntType=pDM_Odm->AntType; ++ return; ++ } ++ else ++ { ++ if(pDM_Odm->AntType != pDM_Odm->pre_AntType) ++ { ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ odm_Tx_By_TxDesc_or_Reg(pDM_Odm , TX_BY_DESC); ++ } ++ pDM_Odm->pre_AntType=pDM_Odm->AntType; ++ } ++ ++ ++ //3 ----------------------------------------------------------------------------------------------------------- ++ //2 [--88E---] ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ #if (RTL8188E_SUPPORT == 1) ++ if(pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV ||pDM_Odm->AntDivType==CGCS_RX_HW_ANTDIV) ++ odm_HW_AntDiv(pDM_Odm); ++ ++ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ else if (pDM_Odm->AntDivType==CG_TRX_SMART_ANTDIV) ++ odm_FastAntTraining(pDM_Odm); ++ #endif ++ ++ #endif ++ ++ } ++ //2 [--92E---] ++ #if (RTL8192E_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ if(pDM_Odm->AntDivType==CGCS_RX_HW_ANTDIV || pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV) ++ odm_HW_AntDiv(pDM_Odm); ++ ++ #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ else if (pDM_Odm->AntDivType==CG_TRX_SMART_ANTDIV) ++ odm_FastAntTraining(pDM_Odm); ++ #endif ++ ++ } ++ #endif ++ ++ #if (RTL8723B_SUPPORT == 1) ++ //2 [--8723B---] ++ else if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if (phydm_IsBtEnable_8723b(pDM_Odm)) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[BT is enable!!!] AntDiv: OFF\n")); ++ if (pDM_FatTable->bBecomeLinked == TRUE) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Set REG 948[9:6]=0x0\n")); ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) ++ ODM_SetBBReg(pDM_Odm, 0x948 , BIT9|BIT8|BIT7|BIT6, 0x0); ++ ++ pDM_FatTable->bBecomeLinked = FALSE; ++ } ++ } else { ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { ++ ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_PEEK); ++ #endif ++ } else if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_HW_AntDiv(pDM_Odm); ++ } ++ } ++ #endif ++ ++ //2 [--8821A---] ++ #if (RTL8821A_SUPPORT == 1) ++ else if (pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) { ++ ++ if (pdm_sat_table->fix_beam_pattern_en != 0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", pdm_sat_table->fix_beam_pattern_codeword)); ++ /*return;*/ ++ } else { ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] AntDivType = HL_SW_SMART_ANT_TYPE1\n"));*/ ++ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); ++ } ++ ++ } else ++ #endif ++ { ++ if (!pDM_Odm->bBtEnabled) /*BT disabled*/ ++ { ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { ++ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [S0S1_SW_ANTDIV] -> [CG_TRX_HW_ANTDIV]\n")); ++ /*ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, 1); */ ++ if (pDM_FatTable->bBecomeLinked == TRUE) ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); ++ } ++ ++ } else { /*BT enabled*/ ++ ++ if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [CG_TRX_HW_ANTDIV] -> [S0S1_SW_ANTDIV]\n")); ++ /*ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, 0);*/ ++ odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ++ } ++ } ++ ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { ++ ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_PEEK); ++ #endif ++ } else if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ++ odm_HW_AntDiv(pDM_Odm); ++ } ++ } ++ #endif ++ ++ //2 [--8881A---] ++ #if (RTL8881A_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8881A) ++ odm_HW_AntDiv(pDM_Odm); ++ #endif ++ ++ //2 [--8812A---] ++ #if (RTL8812A_SUPPORT == 1) ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) ++ odm_HW_AntDiv(pDM_Odm); ++ #endif ++ ++ #if (RTL8188F_SUPPORT == 1) ++ /* [--8188F---]*/ ++ else if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_PEEK); ++ #endif ++ } ++ #endif ++ ++} ++ ++ ++VOID ++odm_AntselStatistics( ++ IN PVOID pDM_VOID, ++ IN u1Byte antsel_tr_mux, ++ IN u4Byte MacId, ++ IN u4Byte utility, ++ IN u1Byte method ++ ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ if(method==RSSI_METHOD) ++ { ++ if(antsel_tr_mux == ANT1_2G) ++ { ++ pDM_FatTable->MainAnt_Sum[MacId]+=utility; ++ pDM_FatTable->MainAnt_Cnt[MacId]++; ++ } ++ else ++ { ++ pDM_FatTable->AuxAnt_Sum[MacId]+=utility; ++ pDM_FatTable->AuxAnt_Cnt[MacId]++; ++ } ++ } ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ else if(method==EVM_METHOD) ++ { ++ if(antsel_tr_mux == ANT1_2G) ++ { ++ pDM_FatTable->MainAntEVM_Sum[MacId]+=(utility<<5); ++ pDM_FatTable->MainAntEVM_Cnt[MacId]++; ++ } ++ else ++ { ++ pDM_FatTable->AuxAntEVM_Sum[MacId]+=(utility<<5); ++ pDM_FatTable->AuxAntEVM_Cnt[MacId]++; ++ } ++ } ++ else if(method==CRC32_METHOD) ++ { ++ if(utility==0) ++ pDM_FatTable->CRC32_Fail_Cnt++; ++ else ++ pDM_FatTable->CRC32_Ok_Cnt+=utility; ++ } ++ #endif ++} ++ ++ ++VOID ++ODM_Process_RSSIForAntDiv( ++ IN OUT PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++ //IN PODM_PHY_INFO_T pPhyInfo, ++ //IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_PHY_INFO_T pPhyInfo=(PODM_PHY_INFO_T)p_phy_info_void; ++ PODM_PACKET_INFO_T pPktinfo=(PODM_PACKET_INFO_T)p_pkt_info_void; ++ u1Byte isCCKrate=0,CCKMaxRate=ODM_RATE11M; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ pSAT_T pdm_sat_table = &(pDM_Odm->dm_sat_table); ++ u4Byte beam_tmp; ++ #endif ++ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ u4Byte RxPower_Ant0, RxPower_Ant1; ++ u4Byte RxEVM_Ant0, RxEVM_Ant1; ++ #else ++ u1Byte RxPower_Ant0, RxPower_Ant1; ++ u1Byte RxEVM_Ant0, RxEVM_Ant1; ++ #endif ++ ++ CCKMaxRate=ODM_RATE11M; ++ isCCKrate = (pPktinfo->DataRate <= CCKMaxRate)?TRUE:FALSE; ++ ++ if ((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8812)) && (pPktinfo->DataRate > CCKMaxRate)) ++ { ++ RxPower_Ant0 = pPhyInfo->RxMIMOSignalStrength[0]; ++ RxPower_Ant1= pPhyInfo->RxMIMOSignalStrength[1]; ++ ++ RxEVM_Ant0 =pPhyInfo->RxMIMOSignalQuality[0]; ++ RxEVM_Ant1 =pPhyInfo->RxMIMOSignalQuality[1]; ++ } ++ else ++ RxPower_Ant0=pPhyInfo->RxPWDBAll; ++ ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ if (pDM_Odm->AntDivType == HL_SW_SMART_ANT_TYPE1) ++ { ++ if ((pDM_Odm->SupportICType & ODM_HL_SMART_ANT_TYPE1_SUPPORT) && ++ (pPktinfo->bPacketToSelf) && ++ (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) ++ ) { ++ ++ if (pdm_sat_table->pkt_skip_statistic_en == 0) { ++ /* ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]: antsel_pathA = ((%d)), hw_antsw_occur = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", ++ pPktinfo->StationID, pDM_FatTable->antsel_rx_keep_0, pDM_FatTable->hw_antsw_occur, pdm_sat_table->fast_training_beam_num, RxPower_Ant0)); ++ */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]: antsel_pathA = ((%d)), bPacketToSelf = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", ++ pPktinfo->StationID, pDM_FatTable->antsel_rx_keep_0, pPktinfo->bPacketToSelf, pdm_sat_table->fast_training_beam_num, RxPower_Ant0)); ++ ++ ++ pdm_sat_table->pkt_rssi_sum[pDM_FatTable->antsel_rx_keep_0][pdm_sat_table->fast_training_beam_num] += RxPower_Ant0; ++ pdm_sat_table->pkt_rssi_cnt[pDM_FatTable->antsel_rx_keep_0][pdm_sat_table->fast_training_beam_num]++; ++ pdm_sat_table->pkt_counter++; ++ ++ /*swich beam every N pkt*/ ++ if ((pdm_sat_table->pkt_counter) >= (pdm_sat_table->per_beam_training_pkt_num)) { ++ ++ pdm_sat_table->pkt_counter = 0; ++ beam_tmp = pdm_sat_table->fast_training_beam_num; ++ ++ if (pdm_sat_table->fast_training_beam_num >= (pdm_sat_table->beam_patten_num_each_ant-1)) { ++ ++ pDM_FatTable->FAT_State = FAT_DECISION_STATE; ++ ++ #if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ odm_FastAntTraining_hl_smart_antenna_type1(pDM_Odm); ++ #else ++ ODM_ScheduleWorkItem(&pdm_sat_table->hl_smart_antenna_decision_workitem); ++ #endif ++ ++ ++ } else { ++ pdm_sat_table->fast_training_beam_num++; ++ phydm_set_all_ant_same_beam_num(pDM_Odm); ++ ++ pDM_FatTable->FAT_State = FAT_TRAINING_STATE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Update Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num)); ++ } ++ } ++ } ++ } ++ } else ++ #endif ++ if (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) { ++ if( (pDM_Odm->SupportICType & ODM_SMART_ANT_SUPPORT) && (pPktinfo->bPacketToSelf) && (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) )//(pPktinfo->bPacketMatchBSSID && (!pPktinfo->bPacketBeacon)) ++ { ++ u1Byte antsel_tr_mux; ++ antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |(pDM_FatTable->antsel_rx_keep_1 <<1) |pDM_FatTable->antsel_rx_keep_0; ++ pDM_FatTable->antSumRSSI[antsel_tr_mux] += RxPower_Ant0; ++ pDM_FatTable->antRSSIcnt[antsel_tr_mux]++; ++ } ++ } ++ else //AntDivType != CG_TRX_SMART_ANTDIV ++ { ++ if ((pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) && (pPktinfo->bPacketToSelf || pDM_FatTable->use_ctrl_frame_antdiv)) ++ { ++ if(pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID,RxPower_Ant0,RSSI_METHOD); ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ if(!isCCKrate) ++ { ++ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID,RxEVM_Ant0,EVM_METHOD); ++ } ++ #endif ++ } ++ else// SupportICType == ODM_RTL8821 and ODM_RTL8723B and ODM_RTL8812) ++ { ++ if(isCCKrate && (pDM_Odm->AntDivType == S0S1_SW_ANTDIV)) ++ { ++ pDM_FatTable->antsel_rx_keep_0 = (pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ANT1_2G : ANT2_2G; ++ ++ ++ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) ++ pDM_FatTable->CCK_counter_main++; ++ else// if(pDM_FatTable->antsel_rx_keep_0==ANT2_2G) ++ pDM_FatTable->CCK_counter_aux++; ++ ++ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID, RxPower_Ant0,RSSI_METHOD); ++ } ++ else ++ { ++ if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) ++ pDM_FatTable->OFDM_counter_main++; ++ else// if(pDM_FatTable->antsel_rx_keep_0==ANT2_2G) ++ pDM_FatTable->OFDM_counter_aux++; ++ odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID, RxPower_Ant0,RSSI_METHOD); ++ } ++ } ++ } ++ } ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("isCCKrate=%d, PWDB_ALL=%d\n",isCCKrate, pPhyInfo->RxPWDBAll)); ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n",pDM_FatTable->antsel_rx_keep_2, pDM_FatTable->antsel_rx_keep_1, pDM_FatTable->antsel_rx_keep_0)); ++} ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++VOID ++ODM_SetTxAntByTxInfo( ++ IN PVOID pDM_VOID, ++ IN pu1Byte pDesc, ++ IN u1Byte macId ++ ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) ++ return; ++ ++ if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ++ return; ++ ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) { ++#if (RTL8723B_SUPPORT == 1) ++ SET_TX_DESC_ANTSEL_A_8723B(pDesc, pDM_FatTable->antsel_a[macId]); ++ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8723B] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", ++ macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId]));*/ ++#endif ++ } else if (pDM_Odm->SupportICType == ODM_RTL8821) { ++#if (RTL8821A_SUPPORT == 1) ++ SET_TX_DESC_ANTSEL_A_8812(pDesc, pDM_FatTable->antsel_a[macId]); ++ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8821A] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", ++ macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId]));*/ ++#endif ++ } else if (pDM_Odm->SupportICType == ODM_RTL8188E) { ++#if (RTL8188E_SUPPORT == 1) ++ SET_TX_DESC_ANTSEL_A_88E(pDesc, pDM_FatTable->antsel_a[macId]); ++ SET_TX_DESC_ANTSEL_B_88E(pDesc, pDM_FatTable->antsel_b[macId]); ++ SET_TX_DESC_ANTSEL_C_88E(pDesc, pDM_FatTable->antsel_c[macId]); ++ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8188E] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", ++ macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId]));*/ ++#endif ++ } ++} ++#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++VOID ++ODM_SetTxAntByTxInfo( ++ struct rtl8192cd_priv *priv, ++ struct tx_desc *pdesc, ++ unsigned short aid ++) ++{ ++ pFAT_T pDM_FatTable = &priv->pshare->_dmODM.DM_FatTable; ++ u4Byte SupportICType = priv->pshare->_dmODM.SupportICType; ++ ++ if (SupportICType == ODM_RTL8881A) { ++ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__); */ ++ pdesc->Dword6 &= set_desc(~(BIT(18)|BIT(17)|BIT(16))); ++ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); ++ } else if (SupportICType == ODM_RTL8192E) { ++ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8192E******\n",__FUNCTION__,__LINE__); */ ++ pdesc->Dword6 &= set_desc(~(BIT(18)|BIT(17)|BIT(16))); ++ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); ++ } else if (SupportICType == ODM_RTL8188E) { ++ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8188E******\n",__FUNCTION__,__LINE__);*/ ++ pdesc->Dword2 &= set_desc(~BIT(24)); ++ pdesc->Dword2 &= set_desc(~BIT(25)); ++ pdesc->Dword7 &= set_desc(~BIT(29)); ++ ++ pdesc->Dword2 |= set_desc(pDM_FatTable->antsel_a[aid]<<24); ++ pdesc->Dword2 |= set_desc(pDM_FatTable->antsel_b[aid]<<25); ++ pdesc->Dword7 |= set_desc(pDM_FatTable->antsel_c[aid]<<29); ++ ++ ++ } else if (SupportICType == ODM_RTL8812) { ++ /*[path-A]*/ ++ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__);*/ ++ ++ pdesc->Dword6 &= set_desc(~BIT(16)); ++ pdesc->Dword6 &= set_desc(~BIT(17)); ++ pdesc->Dword6 &= set_desc(~BIT(18)); ++ ++ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); ++ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_b[aid]<<17); ++ pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_c[aid]<<18); ++ ++ } ++} ++#endif ++ ++ ++VOID ++ODM_AntDiv_Config( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("WIN Config Antenna Diversity\n")); ++ if(pDM_Odm->SupportICType==ODM_RTL8723B) ++ { ++ if((!pDM_Odm->DM_SWAT_Table.ANTA_ON || !pDM_Odm->DM_SWAT_Table.ANTB_ON)) ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ } ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CE Config Antenna Diversity\n")); ++ if(pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) ++ { ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ } ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8723B) ++ { ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ } ++ ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("AP Config Antenna Diversity\n")); ++ ++ //2 [ NOT_SUPPORT_ANTDIV ] ++ #if(defined(CONFIG_NOT_SUPPORT_ANTDIV)) ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Disable AntDiv function] : Not Support 2.4G & 5G Antenna Diversity\n")); ++ ++ //2 [ 2G&5G_SUPPORT_ANTDIV ] ++ #elif(defined(CONFIG_2G5G_SUPPORT_ANTDIV)) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : 2.4G & 5G Support Antenna Diversity Simultaneously \n")); ++ pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_2G|ODM_ANTDIV_5G); ++ ++ if(pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ if(*pDM_Odm->pBandType == ODM_BAND_5G ) ++ { ++ #if ( defined(CONFIG_5G_CGCS_RX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); ++ panic_printk("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"); ++ #elif( defined(CONFIG_5G_CG_TRX_DIVERSITY)||defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) ++ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); ++ panic_printk("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"); ++ #elif( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_SMART_ANTDIV\n")); ++ #elif( defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = S0S1_SW_ANTDIV\n")); ++ #endif ++ } ++ else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) ++ { ++ #if ( defined(CONFIG_2G_CGCS_RX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_CG_TRX_DIVERSITY) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) ++ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_SMART_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = S0S1_SW_ANTDIV\n")); ++ #endif ++ } ++ ++ //2 [ 5G_SUPPORT_ANTDIV ] ++ #elif(defined(CONFIG_5G_SUPPORT_ANTDIV)) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n")); ++ panic_printk("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n"); ++ pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_5G); ++ if(*pDM_Odm->pBandType == ODM_BAND_5G ) ++ { ++ if(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC) ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ #if ( defined(CONFIG_5G_CGCS_RX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); ++ panic_printk("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"); ++ #elif( defined(CONFIG_5G_CG_TRX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ panic_printk("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); ++ #elif( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_SMART_ANTDIV\n")); ++ #elif( defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = S0S1_SW_ANTDIV\n")); ++ #endif ++ } ++ else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Not Support 2G AntDivType\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ } ++ ++ //2 [ 2G_SUPPORT_ANTDIV ] ++ #elif(defined(CONFIG_2G_SUPPORT_ANTDIV)) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : Only 2.4G Support Antenna Diversity\n")); ++ pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_2G); ++ if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) ++ { ++ if(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC) ++ pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ++ #if ( defined(CONFIG_2G_CGCS_RX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_CG_TRX_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_SMART_ANTDIV\n")); ++ #elif( defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY) ) ++ pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = S0S1_SW_ANTDIV\n")); ++ #endif ++ } ++ else if(*pDM_Odm->pBandType == ODM_BAND_5G ) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Not Support 5G AntDivType\n")); ++ pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ++ } ++ #endif ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SupportAbility = (( %x ))\n", pDM_Odm->SupportAbility )); ++ ++} ++ ++ ++VOID ++ODM_AntDivTimers( ++ IN PVOID pDM_VOID, ++ IN u1Byte state ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(state==INIT_ANTDIV_TIMMER) ++ { ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ODM_InitializeTimer(pDM_Odm, &(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchTimer), ++ (RT_TIMER_CALL_BACK)ODM_SW_AntDiv_Callback, NULL, "phydm_SwAntennaSwitchTimer"); ++ #elif ( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ ODM_InitializeTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, ++ (RT_TIMER_CALL_BACK)odm_FastAntTrainingCallback, NULL, "FastAntTrainingTimer"); ++ #endif ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ ODM_InitializeTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer, ++ (RT_TIMER_CALL_BACK)odm_EVM_FastAntTrainingCallback, NULL, "EVM_FastAntTrainingTimer"); ++ #endif ++ } ++ else if(state==CANCEL_ANTDIV_TIMMER) ++ { ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ODM_CancelTimer(pDM_Odm, &(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchTimer)); ++ #elif ( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ ODM_CancelTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); ++ #endif ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ ODM_CancelTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer); ++ #endif ++ } ++ else if(state==RELEASE_ANTDIV_TIMMER) ++ { ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ODM_ReleaseTimer(pDM_Odm, &(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchTimer)); ++ #elif ( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++ ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); ++ #endif ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->EVM_FastAntTrainingTimer); ++ #endif ++ } ++ ++} ++ ++VOID ++phydm_antdiv_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ /*pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;*/ ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++ if (dm_value[0] == 1) { /*fixed or auto antenna*/ ++ ++ if (dm_value[1] == 0) { ++ pDM_Odm->antdiv_select = 0; ++ PHYDM_SNPRINTF((output+used, out_len-used, "AntDiv: Auto\n")); ++ } else if (dm_value[1] == 1) { ++ pDM_Odm->antdiv_select = 1; ++ PHYDM_SNPRINTF((output+used, out_len-used, "AntDiv: Fix MAin\n")); ++ } else if (dm_value[1] == 2) { ++ pDM_Odm->antdiv_select = 2; ++ PHYDM_SNPRINTF((output+used, out_len-used, "AntDiv: Fix Aux\n")); ++ } ++ } else if (dm_value[0] == 2) { /*dynamic period for AntDiv*/ ++ ++ pDM_Odm->antdiv_period = (u1Byte)dm_value[1]; ++ PHYDM_SNPRINTF((output+used, out_len-used, "AntDiv_period = ((%d))\n", pDM_Odm->antdiv_period)); ++ } ++} ++ ++#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/ ++ ++VOID ++ODM_AntDivReset( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->AntDivType == S0S1_SW_ANTDIV) ++ { ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ odm_S0S1_SWAntDiv_Reset(pDM_Odm); ++ #endif ++ } ++ ++} ++ ++VOID ++odm_AntennaDiversityInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(pDM_Odm->mp_mode == TRUE) ++ return; ++ ++ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_AntDiv_Config(pDM_Odm); ++ ODM_AntDivInit(pDM_Odm); ++ #endif ++} ++ ++VOID ++odm_AntennaDiversity( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(pDM_Odm->mp_mode == TRUE) ++ return; ++ ++ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_AntDiv(pDM_Odm); ++ #endif ++} ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdiv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdiv.h +new file mode 100644 +index 0000000..a1c1f37 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_antdiv.h +@@ -0,0 +1,576 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMANTDIV_H__ ++#define __PHYDMANTDIV_H__ ++ ++/*#define ANTDIV_VERSION "2.0" //2014.11.04*/ ++/*#define ANTDIV_VERSION "2.1" //2015.01.13 Dino*/ ++/*#define ANTDIV_VERSION "2.2" 2015.01.16 Dino*/ ++/*#define ANTDIV_VERSION "3.1" 2015.07.29 YuChen, remove 92c 92d 8723a*/ ++/*#define ANTDIV_VERSION "3.2" 2015.08.11 Stanley, disable antenna diversity when BT is enable for 8723B*/ ++/*#define ANTDIV_VERSION "3.3" 2015.08.12 Stanley. 8723B does not need to check the antenna is control by BT, ++ because antenna diversity only works when BT is disable or radio off*/ ++#define ANTDIV_VERSION "3.4" /*2015.08.28 Dino 1.Add 8821A Smart Antenna 2. Add 8188F SW S0S1 Antenna Diversity*/ ++ ++//1 ============================================================ ++//1 Definition ++//1 ============================================================ ++ ++#define MAIN_ANT 1 ++#define AUX_ANT 2 ++ ++#define ANT1_2G 0 // = ANT2_5G ++#define ANT2_2G 1 // = ANT1_5G ++/*smart antenna*/ ++#define SUPPORT_RF_PATH_NUM 4 ++#define SUPPORT_BEAM_PATTERN_NUM 4 ++ ++ ++//Antenna Diversty Control Type ++#define ODM_AUTO_ANT 0 ++#define ODM_FIX_MAIN_ANT 1 ++#define ODM_FIX_AUX_ANT 2 ++ ++#define ODM_N_ANTDIV_SUPPORT (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8188F) ++#define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812) ++#define ODM_ANTDIV_SUPPORT (ODM_N_ANTDIV_SUPPORT|ODM_AC_ANTDIV_SUPPORT) ++#define ODM_SMART_ANT_SUPPORT (ODM_RTL8188E|ODM_RTL8192E) ++#define ODM_HL_SMART_ANT_TYPE1_SUPPORT (ODM_RTL8821) ++ ++#define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8881A|ODM_RTL8188F) ++#define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812) ++ ++#define ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC (ODM_RTL8192E) ++ ++#define ODM_ANTDIV_2G BIT0 ++#define ODM_ANTDIV_5G BIT1 ++ ++#define ANTDIV_ON 1 ++#define ANTDIV_OFF 0 ++ ++#define FAT_ON 1 ++#define FAT_OFF 0 ++ ++#define TX_BY_DESC 1 ++#define TX_BY_REG 0 ++ ++#define RSSI_METHOD 0 ++#define EVM_METHOD 1 ++#define CRC32_METHOD 2 ++ ++#define INIT_ANTDIV_TIMMER 0 ++#define CANCEL_ANTDIV_TIMMER 1 ++#define RELEASE_ANTDIV_TIMMER 2 ++ ++#define CRC32_FAIL 1 ++#define CRC32_OK 0 ++ ++#define Evm_RSSI_TH_High 25 ++#define Evm_RSSI_TH_Low 20 ++ ++#define NORMAL_STATE_MIAN 1 ++#define NORMAL_STATE_AUX 2 ++#define TRAINING_STATE 3 ++ ++#define FORCE_RSSI_DIFF 10 ++ ++#define CSI_ON 1 ++#define CSI_OFF 0 ++ ++#define DIVON_CSIOFF 1 ++#define DIVOFF_CSION 2 ++ ++#define BDC_DIV_TRAIN_STATE 0 ++#define BDC_BFer_TRAIN_STATE 1 ++#define BDC_DECISION_STATE 2 ++#define BDC_BF_HOLD_STATE 3 ++#define BDC_DIV_HOLD_STATE 4 ++ ++#define BDC_MODE_1 1 ++#define BDC_MODE_2 2 ++#define BDC_MODE_3 3 ++#define BDC_MODE_4 4 ++#define BDC_MODE_NULL 0xff ++ ++/*SW S0S1 antenna diversity*/ ++#define SWAW_STEP_INIT 0xff ++#define SWAW_STEP_PEEK 0 ++#define SWAW_STEP_DETERMINE 1 ++ ++#define RSSI_CHECK_RESET_PERIOD 10 ++#define RSSI_CHECK_THRESHOLD 50 ++ ++/*Hong Lin Smart antenna*/ ++#define HL_SMTANT_2WIRE_DATA_LEN 24 ++ ++//1 ============================================================ ++//1 structure ++//1 ============================================================ ++ ++ ++typedef struct _SW_Antenna_Switch_ ++{ ++ u1Byte Double_chk_flag; /*If current antenna RSSI > "RSSI_CHECK_THRESHOLD", than check this antenna again*/ ++ u1Byte try_flag; ++ s4Byte PreRSSI; ++ u1Byte CurAntenna; ++ u1Byte PreAntenna; ++ u1Byte RSSI_Trying; ++ u1Byte reset_idx; ++ u1Byte Train_time; ++ u1Byte Train_time_flag; /*base on RSSI difference between two antennas*/ ++ RT_TIMER phydm_SwAntennaSwitchTimer; ++ u4Byte PktCnt_SWAntDivByCtrlFrame; ++ BOOLEAN bSWAntDivByCtrlFrame; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #if USE_WORKITEM ++ RT_WORK_ITEM phydm_SwAntennaSwitchWorkitem; ++ #endif ++ #endif ++ ++ /* AntDect (Before link Antenna Switch check) need to be moved*/ ++ u2Byte Single_Ant_Counter; ++ u2Byte Dual_Ant_Counter; ++ u2Byte Aux_FailDetec_Counter; ++ u2Byte Retry_Counter; ++ u1Byte SWAS_NoLink_State; ++ u4Byte SWAS_NoLink_BK_Reg948; ++ BOOLEAN ANTA_ON; /*To indicate Ant A is or not*/ ++ BOOLEAN ANTB_ON; /*To indicate Ant B is on or not*/ ++ BOOLEAN Pre_Aux_FailDetec; ++ BOOLEAN RSSI_AntDect_bResult; ++ u1Byte Ant5G; ++ u1Byte Ant2G; ++ ++ ++}SWAT_T, *pSWAT_T; ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++typedef struct _BF_DIV_COEX_ ++{ ++ BOOLEAN w_BFer_Client[ODM_ASSOCIATE_ENTRY_NUM]; ++ BOOLEAN w_BFee_Client[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte MA_rx_TP[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte MA_rx_TP_DIV[ODM_ASSOCIATE_ENTRY_NUM]; ++ ++ u1Byte BDCcoexType_wBfer; ++ u1Byte num_Txbfee_Client; ++ u1Byte num_Txbfer_Client; ++ u1Byte BDC_Try_counter; ++ u1Byte BDC_Hold_counter; ++ u1Byte BDC_Mode; ++ u1Byte BDC_active_Mode; ++ u1Byte BDC_state; ++ u1Byte BDC_RxIdleUpdate_counter; ++ u1Byte num_Client; ++ u1Byte pre_num_Client; ++ u1Byte num_BfTar; ++ u1Byte num_DivTar; ++ ++ BOOLEAN bAll_DivSta_Idle; ++ BOOLEAN bAll_BFSta_Idle; ++ BOOLEAN BDC_Try_flag; ++ BOOLEAN BF_pass; ++ BOOLEAN DIV_pass; ++}BDC_T,*pBDC_T; ++#endif ++#endif ++ ++#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++typedef struct _SMART_ANTENNA_TRAINNING_ { ++ u4Byte latch_time; ++ BOOLEAN pkt_skip_statistic_en; ++ u4Byte fix_beam_pattern_en; ++ u4Byte fix_training_num_en; ++ u4Byte fix_beam_pattern_codeword; ++ u4Byte update_beam_codeword; ++ u4Byte ant_num; /*number of smart beam antenna*/ ++ u4Byte beam_patten_num_each_ant;/*number of beam can be switched in each antenna*/ ++ u4Byte data_codeword_bit_num; ++ u4Byte per_beam_training_pkt_num; ++ u1Byte decision_holding_period; ++ u4Byte pkt_counter; ++ u4Byte fast_training_beam_num; ++ u4Byte pre_fast_training_beam_num; ++ u4Byte pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM]; ++ u4Byte pkt_rssi_sum[8][SUPPORT_BEAM_PATTERN_NUM]; ++ u4Byte pkt_rssi_cnt[8][SUPPORT_BEAM_PATTERN_NUM]; ++ u4Byte rx_idle_beam[SUPPORT_RF_PATH_NUM]; ++ u4Byte pre_codeword; ++ BOOLEAN force_update_beam_en; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_WORK_ITEM hl_smart_antenna_workitem; ++ RT_WORK_ITEM hl_smart_antenna_decision_workitem; ++ #endif ++ ++} SAT_T, *pSAT_T; ++#endif ++ ++typedef struct _FAST_ANTENNA_TRAINNING_ ++{ ++ u1Byte Bssid[6]; ++ u1Byte antsel_rx_keep_0; ++ u1Byte antsel_rx_keep_1; ++ u1Byte antsel_rx_keep_2; ++ u1Byte antsel_rx_keep_3; ++ u4Byte antSumRSSI[7]; ++ u4Byte antRSSIcnt[7]; ++ u4Byte antAveRSSI[7]; ++ u1Byte FAT_State; ++ u4Byte TrainIdx; ++ u1Byte antsel_a[ODM_ASSOCIATE_ENTRY_NUM]; ++ u1Byte antsel_b[ODM_ASSOCIATE_ENTRY_NUM]; ++ u1Byte antsel_c[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ u1Byte RxIdleAnt; ++ u1Byte AntDiv_OnOff; ++ BOOLEAN bBecomeLinked; ++ u4Byte MinMaxRSSI; ++ u1Byte idx_AntDiv_counter_2G; ++ u1Byte idx_AntDiv_counter_5G; ++ u1Byte AntDiv_2G_5G; ++ u4Byte CCK_counter_main; ++ u4Byte CCK_counter_aux; ++ u4Byte OFDM_counter_main; ++ u4Byte OFDM_counter_aux; ++ ++ #ifdef ODM_EVM_ENHANCE_ANTDIV ++ u4Byte MainAntEVM_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte AuxAntEVM_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte MainAntEVM_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte AuxAntEVM_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ BOOLEAN EVM_method_enable; ++ u1Byte TargetAnt_EVM; ++ u1Byte TargetAnt_CRC32; ++ u1Byte TargetAnt_enhance; ++ u1Byte pre_TargetAnt_enhance; ++ u2Byte Main_MPDU_OK_cnt; ++ u2Byte Aux_MPDU_OK_cnt; ++ ++ u4Byte CRC32_Ok_Cnt; ++ u4Byte CRC32_Fail_Cnt; ++ u4Byte MainCRC32_Ok_Cnt; ++ u4Byte AuxCRC32_Ok_Cnt; ++ u4Byte MainCRC32_Fail_Cnt; ++ u4Byte AuxCRC32_Fail_Cnt; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ u4Byte CCK_CtrlFrame_Cnt_main; ++ u4Byte CCK_CtrlFrame_Cnt_aux; ++ u4Byte OFDM_CtrlFrame_Cnt_main; ++ u4Byte OFDM_CtrlFrame_Cnt_aux; ++ u4Byte MainAnt_CtrlFrame_Sum; ++ u4Byte AuxAnt_CtrlFrame_Sum; ++ u4Byte MainAnt_CtrlFrame_Cnt; ++ u4Byte AuxAnt_CtrlFrame_Cnt; ++ #endif ++ BOOLEAN fix_ant_bfee; ++ BOOLEAN enable_ctrl_frame_antdiv; ++ BOOLEAN use_ctrl_frame_antdiv; ++ u1Byte hw_antsw_occur; ++}FAT_T,*pFAT_T; ++ ++ ++//1 ============================================================ ++//1 enumeration ++//1 ============================================================ ++ ++ ++ ++typedef enum _FAT_STATE /*Fast antenna training*/ ++{ ++ FAT_BEFORE_LINK_STATE = 0, ++ FAT_PREPARE_STATE = 1, ++ FAT_TRAINING_STATE = 2, ++ FAT_DECISION_STATE = 3 ++}FAT_STATE_E, *PFAT_STATE_E; ++ ++typedef enum _ANT_DIV_TYPE ++{ ++ CG_TRX_HW_ANTDIV = 0x01, ++ CGCS_RX_HW_ANTDIV = 0x02, ++ CG_TRX_SMART_ANTDIV = 0x03, ++ S0S1_SW_ANTDIV = 0x04, /*8723B intrnal switch S0 S1*/ ++ HL_SW_SMART_ANT_TYPE1 = 0x10 /*Hong-Lin Smart antenna use for 8821AE which is a 2 Ant. entitys, and each Ant. is equipped with 4 antenna patterns*/ ++}ANT_DIV_TYPE_E, *PANT_DIV_TYPE_E; ++ ++ ++//1 ============================================================ ++//1 function prototype ++//1 ============================================================ ++ ++ ++VOID ++ODM_StopAntennaSwitchDm( ++ IN PVOID pDM_VOID ++ ); ++VOID ++ODM_SetAntConfig( ++ IN PVOID pDM_VOID, ++ IN u1Byte antSetting // 0=A, 1=B, 2=C, .... ++ ); ++ ++ ++#define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink ++ ++VOID ODM_SwAntDivRestAfterLink( ++ IN PVOID pDM_VOID ++ ); ++ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ++VOID ++ODM_UpdateRxIdleAnt( ++ IN PVOID pDM_VOID, ++ IN u1Byte Ant ++); ++ ++#if (RTL8723B_SUPPORT == 1) ++VOID ++ODM_UpdateRxIdleAnt_8723B( ++ IN PVOID pDM_VOID, ++ IN u1Byte Ant, ++ IN u4Byte DefaultAnt, ++ IN u4Byte OptionalAnt ++); ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++VOID ++phydm_update_rx_idle_antenna_8188F( ++ IN PVOID pDM_VOID, ++ IN u4Byte default_ant ++); ++#endif ++ ++ ++#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++ODM_SW_AntDiv_Callback( ++ IN PRT_TIMER pTimer ++ ); ++ ++VOID ++ODM_SW_AntDiv_WorkitemCallback( ++ IN PVOID pContext ++ ); ++ ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++VOID ++ODM_SW_AntDiv_WorkitemCallback( ++ IN PVOID pContext ++); ++ ++VOID ++ODM_SW_AntDiv_Callback( ++ void *FunctionContext ++ ); ++ ++#endif ++ ++VOID ++odm_S0S1_SwAntDivByCtrlFrame( ++ IN PVOID pDM_VOID, ++ IN u1Byte Step ++); ++ ++VOID ++odm_AntselStatisticsOfCtrlFrame( ++ IN PVOID pDM_VOID, ++ IN u1Byte antsel_tr_mux, ++ IN u4Byte RxPWDBAll ++); ++ ++VOID ++odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI( ++ IN PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++); ++ ++#endif ++ ++#ifdef ODM_EVM_ENHANCE_ANTDIV ++VOID ++odm_EVM_FastAntTrainingCallback( ++ IN PVOID pDM_VOID ++); ++#endif ++ ++VOID ++odm_HW_AntDiv( ++ IN PVOID pDM_VOID ++); ++ ++#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) ++VOID ++odm_FastAntTraining( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_FastAntTrainingCallback( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_FastAntTrainingWorkItemCallback( ++ IN PVOID pDM_VOID ++); ++#endif ++ ++ ++#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++phydm_beam_switch_workitem_callback( ++ IN PVOID pContext ++ ); ++ ++VOID ++phydm_beam_decision_workitem_callback( ++ IN PVOID pContext ++ ); ++ ++#endif ++ ++VOID ++phydm_update_beam_pattern( ++ IN PVOID pDM_VOID, ++ IN u4Byte codeword, ++ IN u4Byte codeword_length ++ ); ++ ++void ++phydm_set_all_ant_same_beam_num( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++phydm_hl_smart_ant_cmd( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++); ++ ++#endif/*#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/ ++ ++VOID ++ODM_AntDivInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++ODM_AntDiv( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_AntselStatistics( ++ IN PVOID pDM_VOID, ++ IN u1Byte antsel_tr_mux, ++ IN u4Byte MacId, ++ IN u4Byte utility, ++ IN u1Byte method ++); ++ ++VOID ++ODM_Process_RSSIForAntDiv( ++ IN OUT PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++); ++ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++VOID ++ODM_SetTxAntByTxInfo( ++ IN PVOID pDM_VOID, ++ IN pu1Byte pDesc, ++ IN u1Byte macId ++); ++ ++#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++VOID ++ODM_SetTxAntByTxInfo( ++ struct rtl8192cd_priv *priv, ++ struct tx_desc *pdesc, ++ unsigned short aid ++); ++ ++#endif ++ ++ ++VOID ++ODM_AntDiv_Config( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++ODM_AntDivTimers( ++ IN PVOID pDM_VOID, ++ IN u1Byte state ++); ++ ++VOID ++phydm_antdiv_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++); ++ ++#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/ ++ ++VOID ++ODM_AntDivReset( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_AntennaDiversityInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_AntennaDiversity( ++ IN PVOID pDM_VOID ++); ++ ++ ++#endif /*#ifndef __ODMANTDIV_H__*/ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_beamforming.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_beamforming.c +new file mode 100644 +index 0000000..ae46786 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_beamforming.c +@@ -0,0 +1,1939 @@ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#if WPP_SOFTWARE_TRACE ++#include "phydm_beamforming.tmh" ++#endif ++#endif ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ ++PRT_BEAMFORM_STAINFO ++phydm_staInfoInit( ++ IN PDM_ODM_T pDM_Odm, ++ IN u2Byte staIdx ++ ) ++{ ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORM_STAINFO pEntry = &(pBeamInfo->BeamformSTAinfo); ++ PSTA_INFO_T pSTA = pDM_Odm->pODM_StaInfo[staIdx]; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo); ++ PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pMgntInfo); ++ ++ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, Adapter->CurrentAddress, 6); ++ ++ pEntry->HtBeamformCap = pHTInfo->HtBeamformCap; ++ pEntry->VhtBeamformCap = pVHTInfo->VhtBeamformCap; ++ ++ /*IBSS, AP mode*/ ++ if (staIdx != 0) { ++ pEntry->AID = pSTA->AID; ++ pEntry->RA = pSTA->MacAddr; ++ pEntry->MacID = pSTA->AssociatedMacId; ++ pEntry->WirelessMode = pSTA->WirelessMode; ++ pEntry->BW = pSTA->BandWidth; ++ pEntry->CurBeamform = pSTA->HTInfo.HtCurBeamform; ++ } else {/*client mode*/ ++ pEntry->AID = pMgntInfo->mAId; ++ pEntry->RA = pMgntInfo->Bssid; ++ pEntry->MacID = pMgntInfo->mMacId; ++ pEntry->WirelessMode = pMgntInfo->dot11CurrentWirelessMode; ++ pEntry->BW = pMgntInfo->dot11CurrentChannelBandWidth; ++ pEntry->CurBeamform = pHTInfo->HtCurBeamform; ++ } ++ ++ if ((pEntry->WirelessMode & WIRELESS_MODE_AC_5G) || (pEntry->WirelessMode & WIRELESS_MODE_AC_24G)) { ++ if (staIdx != 0) ++ pEntry->CurBeamformVHT = pSTA->VHTInfo.VhtCurBeamform; ++ else ++ pEntry->CurBeamformVHT = pVHTInfo->VhtCurBeamform; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("pSTA->wireless_mode = 0x%x, staidx = %d\n", pSTA->WirelessMode, staIdx)); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++ if (!IS_STA_VALID(pSTA)) { ++ rtw_warn_on(1); ++ DBG_871X("%s => sta_info(mac_id:%d) failed\n", __func__, staIdx); ++ return pEntry; ++ } ++ ++ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, adapter_mac_addr(pSTA->padapter), 6); ++ pEntry->HtBeamformCap = pSTA->htpriv.beamform_cap; ++ ++ pEntry->AID = pSTA->aid; ++ pEntry->RA = pSTA->hwaddr; ++ pEntry->MacID = pSTA->mac_id; ++ pEntry->WirelessMode = pSTA->wireless_mode; ++ pEntry->BW = pSTA->bw_mode; ++ ++ pEntry->CurBeamform = pSTA->htpriv.beamform_cap; ++#if ODM_IC_11AC_SERIES_SUPPORT ++ if ((pEntry->WirelessMode & WIRELESS_MODE_AC_5G) || (pEntry->WirelessMode & WIRELESS_MODE_AC_24G)) { ++ pEntry->CurBeamformVHT = pSTA->vhtpriv.beamform_cap; ++ pEntry->VhtBeamformCap = pSTA->vhtpriv.beamform_cap; ++ } ++#endif ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("pSTA->wireless_mode = 0x%x, staidx = %d\n", pSTA->wireless_mode, staIdx)); ++#endif ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("pEntry->CurBeamform = 0x%x, pEntry->CurBeamformVHT = 0x%x\n", pEntry->CurBeamform, pEntry->CurBeamformVHT)); ++ return pEntry; ++ ++} ++void phydm_staInfoUpdate( ++ IN PDM_ODM_T pDM_Odm, ++ IN u2Byte staIdx, ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry ++ ) ++{ ++ PSTA_INFO_T pSTA = pDM_Odm->pODM_StaInfo[staIdx]; ++ ++ if (!IS_STA_VALID(pSTA)) ++ return; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pSTA->txbf_paid = pBeamformEntry->P_AID; ++ pSTA->txbf_gid = pBeamformEntry->G_ID; ++#endif ++} ++ ++ ++u1Byte ++Beamforming_GetHTNDPTxRate( ++ IN PVOID pDM_VOID, ++ u1Byte CompSteeringNumofBFer ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Nr_index = 0; ++ u1Byte NDPTxRate; ++ /*Find Nr*/ ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), CompSteeringNumofBFer); ++ else ++ Nr_index = TxBF_Nr(1, CompSteeringNumofBFer); ++ ++ switch (Nr_index) { ++ case 1: ++ NDPTxRate = MGN_MCS8; ++ break; ++ ++ case 2: ++ NDPTxRate = MGN_MCS16; ++ break; ++ ++ case 3: ++ NDPTxRate = MGN_MCS24; ++ break; ++ ++ default: ++ NDPTxRate = MGN_MCS8; ++ break; ++ } ++ ++return NDPTxRate; ++ ++} ++ ++u1Byte ++Beamforming_GetVHTNDPTxRate( ++ IN PVOID pDM_VOID, ++ u1Byte CompSteeringNumofBFer ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Nr_index = 0; ++ u1Byte NDPTxRate; ++ /*Find Nr*/ ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), CompSteeringNumofBFer); ++ else ++ Nr_index = TxBF_Nr(1, CompSteeringNumofBFer); ++ ++ switch (Nr_index) { ++ case 1: ++ NDPTxRate = MGN_VHT2SS_MCS0; ++ break; ++ ++ case 2: ++ NDPTxRate = MGN_VHT3SS_MCS0; ++ break; ++ ++ case 3: ++ NDPTxRate = MGN_VHT4SS_MCS0; ++ break; ++ ++ default: ++ NDPTxRate = MGN_VHT2SS_MCS0; ++ break; ++ } ++ ++return NDPTxRate; ++ ++} ++ ++ ++PRT_BEAMFORMEE_ENTRY ++phydm_Beamforming_GetBFeeEntryByAddr( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformeeEntry[i].bUsed && (eqMacAddr(RA, pBeamInfo->BeamformeeEntry[i].MacAddr))) { ++ *Idx = i; ++ return &(pBeamInfo->BeamformeeEntry[i]); ++ } ++ } ++ ++ return NULL; ++} ++ ++PRT_BEAMFORMER_ENTRY ++phydm_Beamforming_GetBFerEntryByAddr( ++ IN PVOID pDM_VOID, ++ IN pu1Byte TA, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformerEntry[i].bUsed && (eqMacAddr(TA, pBeamInfo->BeamformerEntry[i].MacAddr))) { ++ *Idx = i; ++ return &(pBeamInfo->BeamformerEntry[i]); ++ } ++ } ++ ++ return NULL; ++} ++ ++ ++PRT_BEAMFORMEE_ENTRY ++phydm_Beamforming_GetEntryByMacId( ++ IN PVOID pDM_VOID, ++ IN u1Byte MacId, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformeeEntry[i].bUsed && (MacId == pBeamInfo->BeamformeeEntry[i].MacId)) { ++ *Idx = i; ++ return &(pBeamInfo->BeamformeeEntry[i]); ++ } ++ } ++ ++ return NULL; ++} ++ ++ ++BEAMFORMING_CAP ++phydm_Beamforming_GetEntryBeamCapByMacId( ++ IN PVOID pDM_VOID, ++ IN u1Byte MacId ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ BEAMFORMING_CAP BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformeeEntry[i].bUsed && (MacId == pBeamInfo->BeamformeeEntry[i].MacId)) { ++ BeamformEntryCap = pBeamInfo->BeamformeeEntry[i].BeamformEntryCap; ++ i = BEAMFORMEE_ENTRY_NUM; ++ } ++ } ++ ++ return BeamformEntryCap; ++} ++ ++ ++PRT_BEAMFORMEE_ENTRY ++phydm_Beamforming_GetFreeBFeeEntry( ++ IN PVOID pDM_VOID, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformeeEntry[i].bUsed == FALSE) { ++ *Idx = i; ++ return &(pBeamInfo->BeamformeeEntry[i]); ++ } ++ } ++ return NULL; ++} ++ ++PRT_BEAMFORMER_ENTRY ++phydm_Beamforming_GetFreeBFerEntry( ++ IN PVOID pDM_VOID, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s ===>\n", __func__)); ++ ++ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformerEntry[i].bUsed == FALSE) { ++ *Idx = i; ++ return &(pBeamInfo->BeamformerEntry[i]); ++ } ++ } ++ return NULL; ++} ++ ++/* ++// Description: Get the first entry index of MU Beamformee. ++// ++// Return Value: Index of the first MU sta. ++// ++// 2015.05.25. Created by tynli. ++// ++*/ ++u1Byte ++phydm_Beamforming_GetFirstMUBFeeEntryIdx( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte idx = 0xFF; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ BOOLEAN bFound = FALSE; ++ ++ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { ++ if (pBeamInfo->BeamformeeEntry[idx].bUsed && pBeamInfo->BeamformeeEntry[idx].is_mu_sta) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] idx=%d!\n", __func__, idx)); ++ bFound = TRUE; ++ break; ++ } ++ } ++ ++ if (!bFound) ++ idx = 0xFF; ++ ++ return idx; ++} ++ ++ ++/*Add SU BFee and MU BFee*/ ++PRT_BEAMFORMEE_ENTRY ++Beamforming_AddBFeeEntry( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORM_STAINFO pSTA, ++ IN BEAMFORMING_CAP BeamformCap, ++ IN u1Byte NumofSoundingDim, ++ IN u1Byte CompSteeringNumofBFer, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMEE_ENTRY pEntry = phydm_Beamforming_GetFreeBFeeEntry(pDM_Odm, Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pEntry != NULL) { ++ pEntry->bUsed = TRUE; ++ pEntry->AID = pSTA->AID; ++ pEntry->MacId = pSTA->MacID; ++ pEntry->SoundBW = pSTA->BW; ++ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, pSTA->MyMacAddr, 6); ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) { ++ /*BSSID[44:47] xor BSSID[40:43]*/ ++ u2Byte BSSID = ((pSTA->MyMacAddr[5] & 0xf0) >> 4) ^ (pSTA->MyMacAddr[5] & 0xf); ++ /*(dec(A) + dec(B)*32) mod 512*/ ++ pEntry->P_AID = (pSTA->AID + BSSID * 32) & 0x1ff; ++ pEntry->G_ID = 63; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID addressed to STA=%d\n", __func__, pEntry->P_AID)); ++ } else if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) { ++ /*ad hoc mode*/ ++ pEntry->P_AID = 0; ++ pEntry->G_ID = 63; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID as IBSS=%d\n", __func__, pEntry->P_AID)); ++ } else { ++ /*client mode*/ ++ pEntry->P_AID = pSTA->RA[5]; ++ /*BSSID[39:47]*/ ++ pEntry->P_AID = (pEntry->P_AID << 1) | (pSTA->RA[4] >> 7); ++ pEntry->G_ID = 0; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID addressed to AP=0x%X\n", __func__, pEntry->P_AID)); ++ } ++ cpMacAddr(pEntry->MacAddr, pSTA->RA); ++ pEntry->bTxBF = FALSE; ++ pEntry->bSound = FALSE; ++ pEntry->SoundPeriod = 400; ++ pEntry->BeamformEntryCap = BeamformCap; ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ ++/* pEntry->LogSeq = 0xff; Move to Beamforming_AddBFerEntry*/ ++/* pEntry->LogRetryCnt = 0; Move to Beamforming_AddBFerEntry*/ ++/* pEntry->LogSuccessCnt = 0; Move to Beamforming_AddBFerEntry*/ ++ ++ pEntry->LogStatusFailCnt = 0; ++ ++ pEntry->NumofSoundingDim = NumofSoundingDim; ++ pEntry->CompSteeringNumofBFer = CompSteeringNumofBFer; ++ ++ if (BeamformCap & BEAMFORMER_CAP_VHT_MU) { ++ pDM_Odm->BeamformingInfo.beamformee_mu_cnt += 1; ++ pEntry->is_mu_sta = TRUE; ++ pDM_Odm->BeamformingInfo.FirstMUBFeeIndex = phydm_Beamforming_GetFirstMUBFeeEntryIdx(pDM_Odm); ++ } else if (BeamformCap & BEAMFORMER_CAP_VHT_SU) { ++ pDM_Odm->BeamformingInfo.beamformee_su_cnt += 1; ++ pEntry->is_mu_sta = FALSE; ++ } ++ ++ return pEntry; ++ } ++ else ++ return NULL; ++} ++ ++/*Add SU BFee and MU BFer*/ ++PRT_BEAMFORMER_ENTRY ++Beamforming_AddBFerEntry( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORM_STAINFO pSTA, ++ IN BEAMFORMING_CAP BeamformCap, ++ IN u1Byte NumofSoundingDim, ++ OUT pu1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMER_ENTRY pEntry = phydm_Beamforming_GetFreeBFerEntry(pDM_Odm, Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pEntry != NULL) { ++ pEntry->bUsed = TRUE; ++ ODM_MoveMemory(pDM_Odm, pEntry->MyMacAddr, pSTA->MyMacAddr, 6); ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) { ++ /*BSSID[44:47] xor BSSID[40:43]*/ ++ u2Byte BSSID = ((pSTA->MyMacAddr[5] & 0xf0) >> 4) ^ (pSTA->MyMacAddr[5] & 0xf); ++ ++ pEntry->P_AID = (pSTA->AID + BSSID * 32) & 0x1ff; ++ pEntry->G_ID = 63; ++ /*(dec(A) + dec(B)*32) mod 512*/ ++ } else if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) { ++ pEntry->P_AID = 0; ++ pEntry->G_ID = 63; ++ } else { ++ pEntry->P_AID = pSTA->RA[5]; ++ /*BSSID[39:47]*/ ++ pEntry->P_AID = (pEntry->P_AID << 1) | (pSTA->RA[4] >> 7); ++ pEntry->G_ID = 0; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: P_AID addressed to AP=0x%X\n", __func__, pEntry->P_AID)); ++ } ++ ++ cpMacAddr(pEntry->MacAddr, pSTA->RA); ++ pEntry->BeamformEntryCap = BeamformCap; ++ ++ pEntry->PreLogSeq = 0; /*Modified by Jeffery @2015-04-13*/ ++ pEntry->LogSeq = 0; /*Modified by Jeffery @2014-10-29*/ ++ pEntry->LogRetryCnt = 0; /*Modified by Jeffery @2014-10-29*/ ++ pEntry->LogSuccess = 0; /*LogSuccess is NOT needed to be accumulated, so LogSuccessCnt->LogSuccess, 2015-04-13, Jeffery*/ ++ pEntry->ClockResetTimes = 0; /*Modified by Jeffery @2015-04-13*/ ++ ++ pEntry->NumofSoundingDim = NumofSoundingDim; ++ ++ if (BeamformCap & BEAMFORMEE_CAP_VHT_MU) { ++ pDM_Odm->BeamformingInfo.beamformer_mu_cnt += 1; ++ pEntry->is_mu_ap = TRUE; ++ pEntry->AID = pSTA->AID; ++ } else if (BeamformCap & BEAMFORMEE_CAP_VHT_SU) { ++ pDM_Odm->BeamformingInfo.beamformer_su_cnt += 1; ++ pEntry->is_mu_ap = FALSE; ++ } ++ ++ return pEntry; ++ } ++ else ++ return NULL; ++} ++ ++#if 0 ++BOOLEAN ++Beamforming_RemoveEntry( ++ IN PADAPTER Adapter, ++ IN pu1Byte RA, ++ OUT pu1Byte Idx ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ PRT_BEAMFORMER_ENTRY pBFerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, RA, Idx); ++ PRT_BEAMFORMEE_ENTRY pEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, Idx); ++ BOOLEAN ret = FALSE; ++ ++ RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s Start!\n", __func__)); ++ RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s, pBFerEntry=0x%x\n", __func__, pBFerEntry)); ++ RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s, pEntry=0x%x\n", __func__, pEntry)); ++ ++ if (pEntry != NULL) { ++ pEntry->bUsed = FALSE; ++ pEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ /*pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;*/ ++ pEntry->bBeamformingInProgress = FALSE; ++ ret = TRUE; ++ } ++ if (pBFerEntry != NULL) { ++ pBFerEntry->bUsed = FALSE; ++ pBFerEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ ret = TRUE; ++ } ++ return ret; ++ ++} ++#endif ++ ++/* Used for BeamformingStart_V1 */ ++VOID ++phydm_Beamforming_NDPARate( ++ IN PVOID pDM_VOID, ++ CHANNEL_WIDTH BW, ++ u1Byte Rate ++) ++{ ++ u2Byte NDPARate = Rate; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (NDPARate == 0) { ++ if(pDM_Odm->RSSI_Min > 30) // link RSSI > 30% ++ NDPARate = ODM_RATE24M; ++ else ++ NDPARate = ODM_RATE6M; ++ } ++ ++ if (NDPARate < ODM_RATEMCS0) ++ BW = (CHANNEL_WIDTH)ODM_BW20M; ++ ++ NDPARate = (NDPARate << 8) | BW; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_RATE, (pu1Byte)&NDPARate); ++ ++} ++ ++ ++/* Used for BeamformingStart_SW and BeamformingStart_FW */ ++VOID ++phydm_Beamforming_DymNDPARate( ++ IN PVOID pDM_VOID ++) ++{ ++ u2Byte NDPARate = ODM_RATE6M, BW; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pDM_Odm->RSSI_Min > 30) /*link RSSI > 30%*/ ++ NDPARate = ODM_RATE24M; ++ else ++ NDPARate = ODM_RATE6M; ++ ++ BW = ODM_BW20M; ++ NDPARate = NDPARate << 8 | BW; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_RATE, (pu1Byte)&NDPARate); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s End, NDPA Rate = 0x%X\n", __func__, NDPARate)); ++} ++ ++/* ++* SW Sounding : SW Timer unit 1ms ++* HW Timer unit (1/32000) s 32k is clock. ++* FW Sounding : FW Timer unit 10ms ++*/ ++VOID ++Beamforming_DymPeriod( ++ IN PVOID pDM_VOID, ++ IN u8 status ++) ++{ ++ u1Byte Idx; ++ BOOLEAN bChangePeriod = FALSE; ++ u2Byte SoundPeriod_SW, SoundPeriod_FW; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ ++ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ //3 TODO per-client throughput caculation. ++ ++ if ((*(pDM_Odm->pCurrentTxTP) + *(pDM_Odm->pCurrentRxTP) > 2) && ((pEntry->LogStatusFailCnt <= 20) || status)) { ++ SoundPeriod_SW = 40; /* 40ms */ ++ SoundPeriod_FW = 40; /* From H2C cmd, unit = 10ms */ ++ } else { ++ SoundPeriod_SW = 4000;/* 4s */ ++ SoundPeriod_FW = 400; ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]SoundPeriod_SW=%d, SoundPeriod_FW=%d\n", __func__, SoundPeriod_SW, SoundPeriod_FW)); ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ pBeamformEntry = pBeamInfo->BeamformeeEntry+Idx; ++ ++ if (pBeamformEntry->DefaultCSICnt > 20) { ++ /*Modified by David*/ ++ SoundPeriod_SW = 4000; ++ SoundPeriod_FW = 400; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Period = %d\n", __func__, SoundPeriod_SW)); ++ if (pBeamformEntry->BeamformEntryCap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) { ++ if (pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER) { ++ if (pBeamformEntry->SoundPeriod != SoundPeriod_FW) { ++ pBeamformEntry->SoundPeriod = SoundPeriod_FW; ++ bChangePeriod = TRUE; /*Only FW sounding need to send H2C packet to change sound period. */ ++ } ++ } else if (pBeamformEntry->SoundPeriod != SoundPeriod_SW) { ++ pBeamformEntry->SoundPeriod = SoundPeriod_SW; ++ } ++ } ++ } ++ ++ if (bChangePeriod) ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_FW_NDPA, (pu1Byte)&Idx); ++} ++ ++ ++ ++ ++BOOLEAN ++Beamforming_SendHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW, ++ IN u1Byte QIdx ++ ) ++{ ++ BOOLEAN ret = TRUE; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (QIdx == BEACON_QUEUE) ++ ret = SendFWHTNDPAPacket(pDM_Odm, RA, BW); ++ else ++ ret = SendSWHTNDPAPacket(pDM_Odm, RA, BW); ++ ++ return ret; ++} ++ ++ ++ ++BOOLEAN ++Beamforming_SendVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW, ++ IN u1Byte QIdx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ BOOLEAN ret = TRUE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_GET_TX_RATE, NULL); ++ ++ if ((pDM_Odm->TxBfDataRate >= ODM_RATEVHTSS3MCS7) && (pDM_Odm->TxBfDataRate <= ODM_RATEVHTSS3MCS9)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s: 3SS VHT 789 don't sounding\n", __func__)); ++ ++ } else { ++ if (QIdx == BEACON_QUEUE) /* Send to reserved page => FW NDPA */ ++ ret = SendFWVHTNDPAPacket(pDM_Odm, RA, AID, BW); ++ else { ++#ifdef SUPPORT_MU_BF ++ #if (SUPPORT_MU_BF == 1) ++ pBeamInfo->is_mu_sounding = TRUE; ++ ret = SendSWVHTMUNDPAPacket(pDM_Odm, BW); ++ #else ++ pBeamInfo->is_mu_sounding = FALSE; ++ ret = SendSWVHTNDPAPacket(pDM_Odm, RA, AID, BW); ++ #endif ++#else ++ pBeamInfo->is_mu_sounding = FALSE; ++ ret = SendSWVHTNDPAPacket(pDM_Odm, RA, AID, BW); ++#endif ++ } ++ } ++ return ret; ++} ++ ++ ++BEAMFORMING_NOTIFY_STATE ++phydm_beamfomring_bSounding( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo, ++ pu1Byte Idx ++ ) ++{ ++ BEAMFORMING_NOTIFY_STATE bSounding = BEAMFORMING_NOTIFY_NONE; ++ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ /*if(( Beamforming_GetBeamCap(pBeamInfo) & BEAMFORMER_CAP) == 0)*/ ++ /*bSounding = BEAMFORMING_NOTIFY_RESET;*/ ++ if (BeamOidInfo.SoundOidMode == SOUNDING_STOP_All_TIMER) ++ bSounding = BEAMFORMING_NOTIFY_RESET; ++ else { ++ u1Byte i; ++ ++ for (i = 0 ; i < BEAMFORMEE_ENTRY_NUM ; i++) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s: BFee Entry %d bUsed=%d, bSound=%d\n", __func__, i, pBeamInfo->BeamformeeEntry[i].bUsed, pBeamInfo->BeamformeeEntry[i].bSound)); ++ if (pBeamInfo->BeamformeeEntry[i].bUsed && (!pBeamInfo->BeamformeeEntry[i].bSound)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Add BFee entry %d\n", __func__, i)); ++ *Idx = i; ++ if (pBeamInfo->BeamformeeEntry[i].is_mu_sta) ++ bSounding = BEAMFORMEE_NOTIFY_ADD_MU; ++ else ++ bSounding = BEAMFORMEE_NOTIFY_ADD_SU; ++ } ++ ++ if ((!pBeamInfo->BeamformeeEntry[i].bUsed) && pBeamInfo->BeamformeeEntry[i].bSound) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Delete BFee entry %d\n", __func__, i)); ++ *Idx = i; ++ if (pBeamInfo->BeamformeeEntry[i].is_mu_sta) ++ bSounding = BEAMFORMEE_NOTIFY_DELETE_MU; ++ else ++ bSounding = BEAMFORMEE_NOTIFY_DELETE_SU; ++ } ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s End, bSounding = %d\n", __func__, bSounding)); ++ return bSounding; ++} ++ ++ ++//This function is unused ++u1Byte ++phydm_beamforming_SoundingIdx( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo ++ ) ++{ ++ u1Byte Idx = 0; ++ RT_BEAMFORMEE_ENTRY BeamEntry; ++ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (BeamOidInfo.SoundOidMode == SOUNDING_SW_HT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_SW_VHT_TIMER || ++ BeamOidInfo.SoundOidMode == SOUNDING_HW_HT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_HW_VHT_TIMER) ++ Idx = BeamOidInfo.SoundOidIdx; ++ else { ++ u1Byte i; ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ if (pBeamInfo->BeamformeeEntry[i].bUsed && (FALSE == pBeamInfo->BeamformeeEntry[i].bSound)) { ++ Idx = i; ++ break; ++ } ++ } ++ } ++ ++ return Idx; ++} ++ ++ ++SOUNDING_MODE ++phydm_beamforming_SoundingMode( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo, ++ u1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte SupportInterface = pDM_Odm->SupportInterface; ++ ++ RT_BEAMFORMEE_ENTRY BeamEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; ++ SOUNDING_MODE Mode = BeamOidInfo.SoundOidMode; ++ ++ if (BeamOidInfo.SoundOidMode == SOUNDING_SW_VHT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_HW_VHT_TIMER) { ++ if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ Mode = BeamOidInfo.SoundOidMode; ++ else ++ Mode = SOUNDING_STOP_All_TIMER; ++ } else if (BeamOidInfo.SoundOidMode == SOUNDING_SW_HT_TIMER || BeamOidInfo.SoundOidMode == SOUNDING_HW_HT_TIMER) { ++ if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT) ++ Mode = BeamOidInfo.SoundOidMode; ++ else ++ Mode = SOUNDING_STOP_All_TIMER; ++ } else if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) { ++ if ((SupportInterface == ODM_ITRF_USB) && !(pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B))) ++ Mode = SOUNDING_FW_VHT_TIMER; ++ else ++ Mode = SOUNDING_SW_VHT_TIMER; ++ } else if (BeamEntry.BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT) { ++ if ((SupportInterface == ODM_ITRF_USB) && !(pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B))) ++ Mode = SOUNDING_FW_HT_TIMER; ++ else ++ Mode = SOUNDING_SW_HT_TIMER; ++ } else ++ Mode = SOUNDING_STOP_All_TIMER; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SupportInterface=%d, Mode=%d\n", __func__, SupportInterface, Mode)); ++ ++ return Mode; ++} ++ ++ ++u2Byte ++phydm_beamforming_SoundingTime( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo, ++ SOUNDING_MODE Mode, ++ u1Byte Idx ++ ) ++{ ++ u2Byte SoundingTime = 0xffff; ++ RT_BEAMFORMEE_ENTRY BeamEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_HW_VHT_TIMER) ++ SoundingTime = BeamOidInfo.SoundOidPeriod * 32; ++ else if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_SW_VHT_TIMER) ++ /*Modified by David*/ ++ SoundingTime = BeamEntry.SoundPeriod; /*BeamOidInfo.SoundOidPeriod;*/ ++ else ++ SoundingTime = BeamEntry.SoundPeriod; ++ ++ return SoundingTime; ++} ++ ++ ++CHANNEL_WIDTH ++phydm_beamforming_SoundingBW( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo, ++ SOUNDING_MODE Mode, ++ u1Byte Idx ++ ) ++{ ++ CHANNEL_WIDTH SoundingBW = CHANNEL_WIDTH_20; ++ RT_BEAMFORMEE_ENTRY BeamEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ RT_BEAMFORMING_OID_INFO BeamOidInfo = pBeamInfo->BeamformingOidInfo; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_HW_VHT_TIMER) ++ SoundingBW = BeamOidInfo.SoundOidBW; ++ else if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_SW_VHT_TIMER) ++ /*Modified by David*/ ++ SoundingBW = BeamEntry.SoundBW; /*BeamOidInfo.SoundOidBW;*/ ++ else ++ SoundingBW = BeamEntry.SoundBW; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, SoundingBW=0x%X\n", __func__, SoundingBW)); ++ ++ return SoundingBW; ++} ++ ++ ++BOOLEAN ++phydm_Beamforming_SelectBeamEntry( ++ IN PVOID pDM_VOID, ++ PRT_BEAMFORMING_INFO pBeamInfo ++ ) ++{ ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ /*pEntry.bSound is different between first and latter NDPA, and should not be used as BFee entry selection*/ ++ /*BTW, latter modification should sync to the selection mechanism of AP/ADSL instead of the fixed SoundIdx.*/ ++ pSoundInfo->SoundIdx = phydm_beamforming_SoundingIdx(pDM_Odm, pBeamInfo); ++ /*pSoundInfo->SoundIdx = 0;*/ ++ ++ if (pSoundInfo->SoundIdx < BEAMFORMEE_ENTRY_NUM) ++ pSoundInfo->SoundMode = phydm_beamforming_SoundingMode(pDM_Odm, pBeamInfo, pSoundInfo->SoundIdx); ++ else ++ pSoundInfo->SoundMode = SOUNDING_STOP_All_TIMER; ++ ++ if (SOUNDING_STOP_All_TIMER == pSoundInfo->SoundMode) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Return because of SOUNDING_STOP_All_TIMER\n", __func__)); ++ return FALSE; ++ } else { ++ pSoundInfo->SoundBW = phydm_beamforming_SoundingBW(pDM_Odm, pBeamInfo, pSoundInfo->SoundMode, pSoundInfo->SoundIdx ); ++ pSoundInfo->SoundPeriod = phydm_beamforming_SoundingTime(pDM_Odm, pBeamInfo, pSoundInfo->SoundMode, pSoundInfo->SoundIdx ); ++ return TRUE; ++ } ++} ++ ++/*SU BFee Entry Only*/ ++BOOLEAN ++phydm_beamforming_StartPeriod( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ BOOLEAN Ret = TRUE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ ++ phydm_Beamforming_DymNDPARate(pDM_Odm); ++ ++ phydm_Beamforming_SelectBeamEntry(pDM_Odm, pBeamInfo); // Modified ++ ++ if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) ++ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, pSoundInfo->SoundPeriod); ++ else if (pSoundInfo->SoundMode == SOUNDING_HW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_HW_HT_TIMER || ++ pSoundInfo->SoundMode == SOUNDING_AUTO_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_AUTO_HT_TIMER) { ++ HAL_HW_TIMER_TYPE TimerType = HAL_TIMER_TXBF; ++ u4Byte val = (pSoundInfo->SoundPeriod | (TimerType<<16)); ++ ++ //HW timer stop: All IC has the same setting ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_STOP, (pu1Byte)(&TimerType)); ++ //ODM_Write1Byte(pDM_Odm, 0x15F, 0); ++ //HW timer init: All IC has the same setting, but 92E & 8812A only write 2 bytes ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_INIT, (pu1Byte)(&val)); ++ //ODM_Write1Byte(pDM_Odm, 0x164, 1); ++ //ODM_Write4Byte(pDM_Odm, 0x15C, val); ++ //HW timer start: All IC has the same setting ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_START, (pu1Byte)(&TimerType)); ++ //ODM_Write1Byte(pDM_Odm, 0x15F, 0x5); ++ } else if (pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER) ++ Ret = BeamformingStart_FW(pDM_Odm, pSoundInfo->SoundIdx); ++ else ++ Ret = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SoundIdx=%d, SoundMode=%d, SoundBW=%d, SoundPeriod=%d\n", __func__, ++ pSoundInfo->SoundIdx, pSoundInfo->SoundMode, pSoundInfo->SoundBW, pSoundInfo->SoundPeriod)); ++ ++ return Ret; ++} ++ ++// Used after Beamforming_Leave, and will clear the setting of the "already deleted" entry ++/*SU BFee Entry Only*/ ++VOID ++phydm_beamforming_EndPeriod_SW( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ ++ HAL_HW_TIMER_TYPE TimerType = HAL_TIMER_TXBF; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) ++ ODM_CancelTimer(pDM_Odm, &pBeamInfo->BeamformingTimer); ++ else if (pSoundInfo->SoundMode == SOUNDING_HW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_HW_HT_TIMER || ++ pSoundInfo->SoundMode == SOUNDING_AUTO_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_AUTO_HT_TIMER) ++ /*HW timer stop: All IC has the same setting*/ ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_STOP, (pu1Byte)(&TimerType)); ++ /*ODM_Write1Byte(pDM_Odm, 0x15F, 0);*/ ++} ++ ++VOID ++phydm_beamforming_EndPeriod_FW( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx = 0; ++ ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_FW_NDPA, (pu1Byte)&Idx); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]\n", __func__)); ++} ++ ++ ++/*SU BFee Entry Only*/ ++VOID ++phydm_beamforming_ClearEntry_SW( ++ IN PVOID pDM_VOID, ++ BOOLEAN IsDelete, ++ u1Byte DeleteIdx ++ ) ++{ ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ if (IsDelete) { ++ if (DeleteIdx < BEAMFORMEE_ENTRY_NUM) { ++ pBeamformEntry = pBeamInfo->BeamformeeEntry + DeleteIdx; ++ if (!((!pBeamformEntry->bUsed) && pBeamformEntry->bSound)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SW DeleteIdx is wrong!!!!!\n", __func__)); ++ return; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SW delete BFee entry %d\n", __func__, DeleteIdx)); ++ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) { ++ pBeamformEntry->bBeamformingInProgress = FALSE; ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ } else if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&DeleteIdx); ++ } ++ pBeamformEntry->bSound = FALSE; ++ } else { ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ pBeamformEntry = pBeamInfo->BeamformeeEntry+Idx; ++ ++ /*Used after bSounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/ ++ /*This function is mainly used in case "BeamOidInfo.SoundOidMode == SOUNDING_STOP_All_TIMER".*/ ++ /*However, setting oid doesn't delete entries (bUsed is still TRUE), new entries may fail to be added in.*/ ++ ++ if (pBeamformEntry->bSound) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] SW reset BFee entry %d\n", __func__, Idx)); ++ /* ++ * If End procedure is ++ * 1. Between (Send NDPA, C2H packet return), reset state to initialized. ++ * After C2H packet return , status bit will be set to zero. ++ * ++ * 2. After C2H packet, then reset state to initialized and clear status bit. ++ */ ++ ++ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ phydm_Beamforming_End_SW(pDM_Odm, 0); ++ else if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&Idx); ++ } ++ ++ pBeamformEntry->bSound = FALSE; ++ } ++ } ++ } ++} ++ ++VOID ++phydm_beamforming_ClearEntry_FW( ++ IN PVOID pDM_VOID, ++ BOOLEAN IsDelete, ++ u1Byte DeleteIdx ++ ) ++{ ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ if (IsDelete) { ++ if (DeleteIdx < BEAMFORMEE_ENTRY_NUM) { ++ pBeamformEntry = pBeamInfo->BeamformeeEntry + DeleteIdx; ++ ++ if (!((!pBeamformEntry->bUsed) && pBeamformEntry->bSound)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] FW DeleteIdx is wrong!!!!!\n", __func__)); ++ return; ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: FW delete BFee entry %d\n", __func__, DeleteIdx)); ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; ++ pBeamformEntry->bSound = FALSE; ++ } else { ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ pBeamformEntry = pBeamInfo->BeamformeeEntry+Idx; ++ ++ /*Used after bSounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/ ++ /*This function is mainly used in case "BeamOidInfo.SoundOidMode == SOUNDING_STOP_All_TIMER".*/ ++ /*However, setting oid doesn't delete entries (bUsed is still TRUE), new entries may fail to be added in.*/ ++ ++ if (pBeamformEntry->bSound) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]FW reset BFee entry %d\n", __func__, Idx)); ++ /* ++ * If End procedure is ++ * 1. Between (Send NDPA, C2H packet return), reset state to initialized. ++ * After C2H packet return , status bit will be set to zero. ++ * ++ * 2. After C2H packet, then reset state to initialized and clear status bit. ++ */ ++ ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ pBeamformEntry->bSound = FALSE; ++ } ++ } ++ } ++} ++ ++/* ++* Called : ++* 1. Add and delete entry : Beamforming_Enter/Beamforming_Leave ++* 2. FW trigger : Beamforming_SetTxBFen ++* 3. Set OID_RT_BEAMFORMING_PERIOD : BeamformingControl_V2 ++*/ ++VOID ++phydm_Beamforming_Notify( ++ IN PVOID pDM_VOID ++ ) ++{ ++ u1Byte Idx=BEAMFORMEE_ENTRY_NUM; ++ BEAMFORMING_NOTIFY_STATE bSounding = BEAMFORMING_NOTIFY_NONE; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ bSounding = phydm_beamfomring_bSounding(pDM_Odm, pBeamInfo, &Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, Before notify, bSounding=%d, Idx=%d\n", __func__, bSounding, Idx)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: pBeamInfo->beamformee_su_cnt = %d\n", __func__, pBeamInfo->beamformee_su_cnt)); ++ ++ ++ switch (bSounding) { ++ case BEAMFORMEE_NOTIFY_ADD_SU: ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_ADD_SU\n", __func__)); ++ phydm_beamforming_StartPeriod(pDM_Odm); ++ break; ++ ++ case BEAMFORMEE_NOTIFY_DELETE_SU: ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_DELETE_SU\n", __func__)); ++ if (pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER) { ++ phydm_beamforming_ClearEntry_FW(pDM_Odm, TRUE, Idx); ++ if (pBeamInfo->beamformee_su_cnt == 0) { /* For 2->1 entry, we should not cancel SW timer */ ++ phydm_beamforming_EndPeriod_FW(pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: No BFee left\n", __func__)); ++ } ++ } else { ++ phydm_beamforming_ClearEntry_SW(pDM_Odm, TRUE, Idx); ++ if (pBeamInfo->beamformee_su_cnt == 0) { /* For 2->1 entry, we should not cancel SW timer */ ++ phydm_beamforming_EndPeriod_SW(pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: No BFee left\n", __func__)); ++ } ++ } ++ break; ++ ++ case BEAMFORMEE_NOTIFY_ADD_MU: ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_ADD_MU\n", __func__)); ++ if (pBeamInfo->beamformee_mu_cnt == 2) { ++ /*if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) ++ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, pSoundInfo->SoundPeriod);*/ ++ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, 1000); /*Do MU sounding every 1sec*/ ++ } else ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Less or larger than 2 MU STAs, not to set timer\n", __func__)); ++ break; ++ ++ case BEAMFORMEE_NOTIFY_DELETE_MU: ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BEAMFORMEE_NOTIFY_DELETE_MU\n", __func__)); ++ if (pBeamInfo->beamformee_mu_cnt == 1) { ++ /*if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER)*/{ ++ ODM_CancelTimer(pDM_Odm, &pBeamInfo->BeamformingTimer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Less than 2 MU STAs, stop sounding\n", __func__)); ++ } ++ } ++ break; ++ ++ case BEAMFORMING_NOTIFY_RESET: ++ if (pSoundInfo->SoundMode == SOUNDING_FW_HT_TIMER || pSoundInfo->SoundMode == SOUNDING_FW_VHT_TIMER) { ++ phydm_beamforming_ClearEntry_FW(pDM_Odm, FALSE, Idx); ++ phydm_beamforming_EndPeriod_FW(pDM_Odm); ++ } else { ++ phydm_beamforming_ClearEntry_SW(pDM_Odm, FALSE, Idx); ++ phydm_beamforming_EndPeriod_SW(pDM_Odm); ++ } ++ ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++ ++ ++BOOLEAN ++Beamforming_InitEntry( ++ IN PVOID pDM_VOID, ++ IN u2Byte staIdx, ++ pu1Byte BFerBFeeIdx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; ++ PRT_BEAMFORMER_ENTRY pBeamformerEntry = NULL; ++ PRT_BEAMFORM_STAINFO pSTA = NULL; ++ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; ++ u1Byte BFerIdx=0xF, BFeeIdx=0xF; ++ u1Byte NumofSoundingDim = 0, CompSteeringNumofBFer = 0; ++ ++ pSTA = phydm_staInfoInit(pDM_Odm, staIdx); ++ ++ /*The current setting does not support Beaforming*/ ++ if (BEAMFORMING_CAP_NONE == pSTA->HtBeamformCap && BEAMFORMING_CAP_NONE == pSTA->VhtBeamformCap) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("The configuration disabled Beamforming! Skip...\n")); ++ return FALSE; ++ } ++ ++ if (pSTA->WirelessMode < WIRELESS_MODE_N_24G) ++ return FALSE; ++ else { /*HT*/ ++ /*We are Beamformee because the STA is Beamformer*/ ++ if (TEST_FLAG(pSTA->CurBeamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { ++ BeamformCap =(BEAMFORMING_CAP)(BeamformCap |BEAMFORMEE_CAP_HT_EXPLICIT); ++ NumofSoundingDim = (pSTA->CurBeamform&BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP)>>6; ++ } ++ /*We are Beamformer because the STA is Beamformee*/ ++ if (TEST_FLAG(pSTA->CurBeamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE) || ++ TEST_FLAG(pSTA->HtBeamformCap, BEAMFORMING_HT_BEAMFORMER_TEST)) { ++ BeamformCap =(BEAMFORMING_CAP)(BeamformCap | BEAMFORMER_CAP_HT_EXPLICIT); ++ CompSteeringNumofBFer = (pSTA->CurBeamform & BEAMFORMING_HT_BEAMFORMER_STEER_NUM)>>4; ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] HT CurBeamform=0x%X, BeamformCap=0x%X\n", __func__, pSTA->CurBeamform, BeamformCap)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] HT NumofSoundingDim=%d, CompSteeringNumofBFer=%d\n", __func__, NumofSoundingDim, CompSteeringNumofBFer)); ++#if (ODM_IC_11AC_SERIES_SUPPORT == 1) ++ if (pSTA->WirelessMode & WIRELESS_MODE_AC_5G || pSTA->WirelessMode & WIRELESS_MODE_AC_24G) { /*VHT*/ ++ ++ /* We are Beamformee because the STA is SU Beamformer*/ ++ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { ++ BeamformCap =(BEAMFORMING_CAP)(BeamformCap |BEAMFORMEE_CAP_VHT_SU); ++ NumofSoundingDim = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM)>>12; ++ } ++ /* We are Beamformer because the STA is SU Beamformee*/ ++ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) || ++ TEST_FLAG(pSTA->VhtBeamformCap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { ++ BeamformCap =(BEAMFORMING_CAP)(BeamformCap |BEAMFORMER_CAP_VHT_SU); ++ CompSteeringNumofBFer = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMER_STS_CAP)>>8; ++ } ++ /* We are Beamformee because the STA is MU Beamformer*/ ++ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) { ++ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMEE_CAP_VHT_MU); ++ NumofSoundingDim = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM)>>12; ++ } ++ /* We are Beamformer because the STA is MU Beamformee*/ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) { /* Only AP mode supports to act an MU beamformer */ ++ if (TEST_FLAG(pSTA->CurBeamformVHT, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE) || ++ TEST_FLAG(pSTA->VhtBeamformCap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { ++ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMER_CAP_VHT_MU); ++ CompSteeringNumofBFer = (pSTA->CurBeamformVHT & BEAMFORMING_VHT_BEAMFORMER_STS_CAP)>>8; ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]VHT CurBeamformVHT=0x%X, BeamformCap=0x%X\n", __func__, pSTA->CurBeamformVHT, BeamformCap)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]VHT NumofSoundingDim=0x%X, CompSteeringNumofBFer=0x%X\n", __func__, NumofSoundingDim, CompSteeringNumofBFer)); ++ ++ } ++#endif ++ } ++ ++ ++ if(BeamformCap == BEAMFORMING_CAP_NONE) ++ return FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Self BF Entry Cap = 0x%02X\n", __func__, BeamformCap)); ++ ++ /*We are BFee, so the entry is BFer*/ ++ if (BeamformCap & (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP_HT_EXPLICIT)) { ++ pBeamformerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, pSTA->RA, &BFerIdx); ++ ++ if (pBeamformerEntry == NULL) { ++ pBeamformerEntry = Beamforming_AddBFerEntry(pDM_Odm, pSTA, BeamformCap, NumofSoundingDim , &BFerIdx); ++ if (pBeamformerEntry == NULL) ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Not enough BFer entry!!!!!\n", __func__)); ++ } ++ } ++ ++ /*We are BFer, so the entry is BFee*/ ++ if (BeamformCap & (BEAMFORMER_CAP_VHT_MU | BEAMFORMER_CAP_VHT_SU | BEAMFORMER_CAP_HT_EXPLICIT)) { ++ pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, pSTA->RA, &BFeeIdx); ++ ++ /*¦pªGBFeeIdx = 0xF «h¥Nªí¥Ø«eentry·í¤¤¨S¦³¬Û¦PªºMACID¦b¤º*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Get BFee entry 0x%X by address\n", __func__, BFeeIdx)); ++ if (pBeamformEntry == NULL) { ++ pBeamformEntry = Beamforming_AddBFeeEntry(pDM_Odm, pSTA, BeamformCap, NumofSoundingDim, CompSteeringNumofBFer, &BFeeIdx); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: pSTA->AID=%d, pSTA->MacID=%d\n", __func__, pSTA->AID, pSTA->MacID)); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: Add BFee entry %d\n", __func__, BFeeIdx)); ++ ++ if (pBeamformEntry == NULL) ++ return FALSE; ++ else ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZEING; ++ } else { ++ /*Entry has been created. If entry is initialing or progressing then errors occur.*/ ++ if (pBeamformEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_INITIALIZED && ++ pBeamformEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ return FALSE; ++ } else ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZEING; ++ } ++ pBeamformEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ phydm_staInfoUpdate(pDM_Odm, staIdx, pBeamformEntry); ++ } ++ ++ *BFerBFeeIdx = (BFerIdx<<4) | BFeeIdx; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End: BFerIdx=0x%X, BFeeIdx=0x%X, BFerBFeeIdx=0x%X\n", __func__, BFerIdx, BFeeIdx, *BFerBFeeIdx)); ++ ++ return TRUE; ++} ++ ++ ++VOID ++Beamforming_DeInitEntry( ++ IN PVOID pDM_VOID, ++ pu1Byte RA ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx = 0; ++ ++ PRT_BEAMFORMER_ENTRY pBFerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, RA, &Idx); ++ PRT_BEAMFORMEE_ENTRY pBFeeEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ BOOLEAN ret = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pBFeeEntry != NULL) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, pBFeeEntry\n", __func__)); ++ pBFeeEntry->bUsed = FALSE; ++ pBFeeEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ pBFeeEntry->bBeamformingInProgress = FALSE; ++ if (pBFeeEntry->is_mu_sta) { ++ pDM_Odm->BeamformingInfo.beamformee_mu_cnt -= 1; ++ pDM_Odm->BeamformingInfo.FirstMUBFeeIndex = phydm_Beamforming_GetFirstMUBFeeEntryIdx(pDM_Odm); ++ } else { ++ pDM_Odm->BeamformingInfo.beamformee_su_cnt -= 1; ++ } ++ ret = TRUE; ++ } ++ ++ if (pBFerEntry != NULL) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, pBFerEntry\n", __func__)); ++ pBFerEntry->bUsed = FALSE; ++ pBFerEntry->BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ if (pBFerEntry->is_mu_ap) ++ pDM_Odm->BeamformingInfo.beamformer_mu_cnt -= 1; ++ else ++ pDM_Odm->BeamformingInfo.beamformer_su_cnt -= 1; ++ ret = TRUE; ++ } ++ ++ if (ret == TRUE) ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_LEAVE, (pu1Byte)&Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s End, Idx = 0x%X\n", __func__, Idx)); ++} ++ ++ ++VOID ++Beamforming_Reset( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx = 0; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &(pDM_Odm->BeamformingInfo); ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ if (pBeamformingInfo->BeamformeeEntry[Idx].bUsed == TRUE) { ++ pBeamformingInfo->BeamformeeEntry[Idx].bUsed = FALSE; ++ pBeamformingInfo->BeamformeeEntry[Idx].BeamformEntryCap = BEAMFORMING_CAP_NONE; ++ /*pBeamformingInfo->BeamformeeEntry[Idx].BeamformEntryState = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;*/ ++ /*Modified by David*/ ++ pBeamformingInfo->BeamformeeEntry[Idx].bBeamformingInProgress = FALSE; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_LEAVE, (pu1Byte)&Idx); ++ } ++ } ++ ++ for (Idx = 0; Idx < BEAMFORMER_ENTRY_NUM; Idx++) { ++ pBeamformingInfo->BeamformerEntry[Idx].bUsed = FALSE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Idx=%d, bUsed=%d\n", __func__, Idx, pBeamformingInfo->BeamformerEntry[Idx].bUsed)); ++ } ++ ++} ++ ++ ++BOOLEAN ++BeamformingStart_V1( ++ IN PVOID pDM_VOID, ++ pu1Byte RA, ++ BOOLEAN Mode, ++ CHANNEL_WIDTH BW, ++ u1Byte Rate ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ BOOLEAN ret = TRUE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ ++ pEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ if (pEntry->bUsed == FALSE) { ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } else { ++ if (pEntry->bBeamformingInProgress) ++ return FALSE; ++ ++ pEntry->bBeamformingInProgress = TRUE; ++ ++ if (Mode == 1) { ++ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT)) { ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } ++ } else if (Mode == 0) { ++ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)) { ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } ++ } ++ ++ if (pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_INITIALIZED && pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } else { ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSING; ++ pEntry->bSound = TRUE; ++ } ++ } ++ ++ pEntry->SoundBW = BW; ++ pBeamInfo->BeamformeeCurIdx = Idx; ++ phydm_Beamforming_NDPARate(pDM_Odm, BW, Rate); ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&Idx); ++ ++ if (Mode == 1) ++ ret = Beamforming_SendHTNDPAPacket(pDM_Odm, RA, BW, NORMAL_QUEUE); ++ else ++ ret = Beamforming_SendVHTNDPAPacket(pDM_Odm, RA, pEntry->AID, BW, NORMAL_QUEUE); ++ ++ if (ret == FALSE) { ++ Beamforming_Leave(pDM_Odm, RA); ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Idx %d\n", __func__, Idx)); ++ return TRUE; ++} ++ ++ ++BOOLEAN ++BeamformingStart_SW( ++ IN PVOID pDM_VOID, ++ u1Byte Idx, ++ u1Byte Mode, ++ CHANNEL_WIDTH BW ++ ) ++{ ++ pu1Byte RA = NULL; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ BOOLEAN ret = TRUE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ ++ pEntry = &(pBeamInfo->BeamformeeEntry[Idx]); ++ ++ if (pEntry->bUsed == FALSE) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Skip Beamforming, no entry for Idx =%d\n", Idx)); ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } else { ++ if (pEntry->bBeamformingInProgress) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("bBeamformingInProgress, skip...\n")); ++ return FALSE; ++ } ++ ++ pEntry->bBeamformingInProgress = TRUE; ++ RA = pEntry->MacAddr; ++ ++ if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_AUTO_HT_TIMER) { ++ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT)) { ++ pEntry->bBeamformingInProgress = FALSE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Return by not support BEAMFORMER_CAP_HT_EXPLICIT <==\n", __func__)); ++ return FALSE; ++ } ++ } else if (Mode == SOUNDING_SW_VHT_TIMER || Mode == SOUNDING_HW_VHT_TIMER || Mode == SOUNDING_AUTO_VHT_TIMER) { ++ if (!(pEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)) { ++ pEntry->bBeamformingInProgress = FALSE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Return by not support BEAMFORMER_CAP_VHT_SU <==\n", __func__)); ++ return FALSE; ++ } ++ } ++ if (pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_INITIALIZED && pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ pEntry->bBeamformingInProgress = FALSE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Return by incorrect BeamformEntryState(%d) <==\n", __func__, pEntry->BeamformEntryState)); ++ return FALSE; ++ } else { ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSING; ++ pEntry->bSound = TRUE; ++ } ++ } ++ ++ pBeamInfo->BeamformeeCurIdx = Idx; ++ /*2014.12.22 Luke: Need to be checked*/ ++ /*GET_TXBF_INFO(Adapter)->fTxbfSet(Adapter, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&Idx);*/ ++ ++ if (Mode == SOUNDING_SW_HT_TIMER || Mode == SOUNDING_HW_HT_TIMER || Mode == SOUNDING_AUTO_HT_TIMER) ++ ret = Beamforming_SendHTNDPAPacket(pDM_Odm, RA , BW, NORMAL_QUEUE); ++ else ++ ret = Beamforming_SendVHTNDPAPacket(pDM_Odm, RA , pEntry->AID, BW, NORMAL_QUEUE); ++ ++ if (ret == FALSE) { ++ Beamforming_Leave(pDM_Odm, RA); ++ pEntry->bBeamformingInProgress = FALSE; ++ return FALSE; ++ } ++ ++ ++ /*-------------------------- ++ // Send BF Report Poll for MU BF ++ --------------------------*/ ++#ifdef SUPPORT_MU_BF ++#if (SUPPORT_MU_BF == 1) ++{ ++ u1Byte idx, PollSTACnt = 0; ++ BOOLEAN bGetFirstBFee = FALSE; ++ ++ if (pBeamInfo->beamformee_mu_cnt > 1) { /* More than 1 MU STA*/ ++ ++ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { ++ pEntry = &(pBeamInfo->BeamformeeEntry[idx]); ++ if (pEntry->is_mu_sta) { ++ if (bGetFirstBFee) { ++ PollSTACnt++; ++ if (PollSTACnt == (pBeamInfo->beamformee_mu_cnt - 1))/* The last STA*/ ++ SendSWVHTBFReportPoll(pDM_Odm, pEntry->MacAddr, TRUE); ++ else ++ SendSWVHTBFReportPoll(pDM_Odm, pEntry->MacAddr, FALSE); ++ } else { ++ bGetFirstBFee = TRUE; ++ } ++ } ++ } ++ } ++} ++#endif ++#endif ++ return TRUE; ++} ++ ++ ++BOOLEAN ++BeamformingStart_FW( ++ IN PVOID pDM_VOID, ++ u1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pu1Byte RA = NULL; ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ BOOLEAN ret = TRUE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ ++ pEntry = &(pBeamInfo->BeamformeeEntry[Idx]); ++ if (pEntry->bUsed == FALSE) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Skip Beamforming, no entry for Idx =%d\n", Idx)); ++ return FALSE; ++ } ++ ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSING; ++ pEntry->bSound = TRUE; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_FW_NDPA, (pu1Byte)&Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End, Idx=0x%X\n", __func__, Idx)); ++ return TRUE; ++} ++ ++VOID ++Beamforming_CheckSoundingSuccess( ++ IN PVOID pDM_VOID, ++ BOOLEAN Status ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[David]@%s Start!\n", __func__)); ++ ++ if (Status == 1) { ++ if (pEntry->LogStatusFailCnt == 21) ++ Beamforming_DymPeriod(pDM_Odm, Status); ++ pEntry->LogStatusFailCnt = 0; ++ } else if (pEntry->LogStatusFailCnt <= 20) { ++ pEntry->LogStatusFailCnt++; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s LogStatusFailCnt %d\n", __func__, pEntry->LogStatusFailCnt)); ++ } ++ if (pEntry->LogStatusFailCnt > 20) { ++ pEntry->LogStatusFailCnt = 21; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s LogStatusFailCnt > 20, Stop SOUNDING\n", __func__)); ++ Beamforming_DymPeriod(pDM_Odm, Status); ++ } ++} ++ ++VOID ++phydm_Beamforming_End_SW( ++ IN PVOID pDM_VOID, ++ BOOLEAN Status ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ ++ if (pEntry->BeamformEntryState != BEAMFORMING_ENTRY_STATE_PROGRESSING) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BeamformStatus %d\n", __func__, pEntry->BeamformEntryState)); ++ return; ++ } ++ ++ if ((pDM_Odm->TxBfDataRate >= ODM_RATEVHTSS3MCS7) && (pDM_Odm->TxBfDataRate <= ODM_RATEVHTSS3MCS9)) { ++ ODM_RT_TRACE(pDM_Odm, BEAMFORMING_DEBUG, ODM_DBG_LOUD, ("[%s] VHT3SS 7,8,9, do not apply V matrix.\n", __func__)); ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&(pBeamInfo->BeamformeeCurIdx)); ++ } else if (Status == 1) { ++ pEntry->LogStatusFailCnt = 0; ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_STATUS, (pu1Byte)&(pBeamInfo->BeamformeeCurIdx)); ++ } else { ++ pEntry->LogStatusFailCnt++; ++ pEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_INITIALIZED; ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_TX_PATH_RESET, (pu1Byte)&(pBeamInfo->BeamformeeCurIdx)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] LogStatusFailCnt %d\n", __func__, pEntry->LogStatusFailCnt)); ++ } ++ ++ if (pEntry->LogStatusFailCnt > 30) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s LogStatusFailCnt > 50, Stop SOUNDING\n", __func__)); ++ pEntry->bSound = FALSE; ++ Beamforming_DeInitEntry(pDM_Odm, pEntry->MacAddr); ++ ++ /*Modified by David - Every action of deleting entry should follow by Notify*/ ++ phydm_Beamforming_Notify(pDM_Odm); ++ } ++ pEntry->bBeamformingInProgress = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: Status=%d\n", __func__, Status)); ++} ++ ++ ++VOID ++Beamforming_TimerCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PVOID pDM_VOID ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ IN PVOID pContext ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER Adapter = (PADAPTER)pContext; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++#endif ++ BOOLEAN ret = FALSE; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ PRT_SOUNDING_INFO pSoundInfo = &(pBeamInfo->SoundingInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ if (pEntry->bBeamformingInProgress) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("bBeamformingInProgress, reset it\n")); ++ phydm_Beamforming_End_SW(pDM_Odm, 0); ++ } ++ ++ ret = phydm_Beamforming_SelectBeamEntry(pDM_Odm, pBeamInfo); ++#if (SUPPORT_MU_BF == 1) ++ if (ret && pBeamInfo->beamformee_mu_cnt > 1) ++ ret = 1; ++ else ++ ret = 0; ++#endif ++ if (ret) ++ ret = BeamformingStart_SW(pDM_Odm, pSoundInfo->SoundIdx, pSoundInfo->SoundMode, pSoundInfo->SoundBW); ++ else ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s, Error value return from BeamformingStart_V2\n", __func__)); ++ ++ if ((pBeamInfo->beamformee_su_cnt != 0) || (pBeamInfo->beamformee_mu_cnt > 1)) { ++ if (pSoundInfo->SoundMode == SOUNDING_SW_VHT_TIMER || pSoundInfo->SoundMode == SOUNDING_SW_HT_TIMER) ++ ODM_SetTimer(pDM_Odm, &pBeamInfo->BeamformingTimer, pSoundInfo->SoundPeriod); ++ else { ++ u4Byte val = (pSoundInfo->SoundPeriod << 16) | HAL_TIMER_TXBF; ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_HW_REG_TIMER_RESTART, (pu1Byte)(&val)); ++ } ++ } ++} ++ ++ ++VOID ++Beamforming_SWTimerCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PRT_TIMER pTimer ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ void *FunctionContext ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ Beamforming_TimerCallback(pDM_Odm); ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)FunctionContext; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if (Adapter->net_closed == TRUE) ++ return; ++ rtw_run_in_thread_cmd(Adapter, Beamforming_TimerCallback, Adapter); ++#endif ++ ++} ++ ++ ++VOID ++phydm_Beamforming_Init( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PHAL_TXBF_INFO pTxbfInfo = &pBeamInfo->TxbfInfo; ++ PRT_BEAMFORMING_OID_INFO pBeamOidInfo = &(pBeamInfo->BeamformingOidInfo); ++ ++ pBeamOidInfo->SoundOidMode = SOUNDING_STOP_OID_TIMER; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Mode (%d)\n", __func__, pBeamOidInfo->SoundOidMode)); ++ ++ pBeamInfo->beamformee_su_cnt = 0; ++ pBeamInfo->beamformer_su_cnt = 0; ++ pBeamInfo->beamformee_mu_cnt = 0; ++ pBeamInfo->beamformer_mu_cnt = 0; ++ pBeamInfo->beamformee_mu_reg_maping = 0; ++ pBeamInfo->mu_ap_index = 0; ++ pBeamInfo->is_mu_sounding = FALSE; ++ pBeamInfo->FirstMUBFeeIndex = 0xFF; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pBeamInfo->SourceAdapter = pDM_Odm->Adapter; ++#endif ++ halComTxbf_beamformInit(pDM_Odm); ++} ++ ++ ++VOID ++Beamforming_Enter( ++ IN PVOID pDM_VOID, ++ IN u2Byte staIdx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte BFerBFeeIdx = 0xff; ++ ++ if (Beamforming_InitEntry(pDM_Odm, staIdx, &BFerBFeeIdx)) ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_ENTER, (pu1Byte)&BFerBFeeIdx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End!\n", __func__)); ++} ++ ++ ++VOID ++Beamforming_Leave( ++ IN PVOID pDM_VOID, ++ pu1Byte RA ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (RA == NULL) ++ Beamforming_Reset(pDM_Odm); ++ else ++ Beamforming_DeInitEntry(pDM_Odm, RA); ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End!!\n", __func__)); ++} ++ ++#if 0 ++//Nobody calls this function ++VOID ++phydm_Beamforming_SetTxBFen( ++ IN PVOID pDM_VOID, ++ u1Byte MacId, ++ BOOLEAN bTxBF ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ pEntry = phydm_Beamforming_GetEntryByMacId(pDM_Odm, MacId, &Idx); ++ ++ if(pEntry == NULL) ++ return; ++ else ++ pEntry->bTxBF = bTxBF; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s MacId %d TxBF %d\n", __func__, pEntry->MacId, pEntry->bTxBF)); ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++} ++#endif ++ ++BEAMFORMING_CAP ++phydm_Beamforming_GetBeamCap( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamInfo ++ ) ++{ ++ u1Byte i; ++ BOOLEAN bSelfBeamformer = FALSE; ++ BOOLEAN bSelfBeamformee = FALSE; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ BeamformeeEntry = pBeamInfo->BeamformeeEntry[i]; ++ ++ if (BeamformeeEntry.bUsed) { ++ bSelfBeamformer = TRUE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BFee entry %d bUsed=TRUE\n", __func__, i)); ++ break; ++ } ++ } ++ ++ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { ++ BeamformerEntry = pBeamInfo->BeamformerEntry[i]; ++ ++ if (BeamformerEntry.bUsed) { ++ bSelfBeamformee = TRUE; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: BFer entry %d bUsed=TRUE\n", __func__, i)); ++ break; ++ } ++ } ++ ++ if (bSelfBeamformer) ++ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMER_CAP); ++ if (bSelfBeamformee) ++ BeamformCap = (BEAMFORMING_CAP)(BeamformCap | BEAMFORMEE_CAP); ++ ++ return BeamformCap; ++} ++ ++ ++BOOLEAN ++BeamformingControl_V1( ++ IN PVOID pDM_VOID, ++ pu1Byte RA, ++ u1Byte AID, ++ u1Byte Mode, ++ CHANNEL_WIDTH BW, ++ u1Byte Rate ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ BOOLEAN ret = TRUE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("AID (%d), Mode (%d), BW (%d)\n", AID, Mode, BW)); ++ ++ switch (Mode) { ++ case 0: ++ ret = BeamformingStart_V1(pDM_Odm, RA, 0, BW, Rate); ++ break; ++ case 1: ++ ret = BeamformingStart_V1(pDM_Odm, RA, 1, BW, Rate); ++ break; ++ case 2: ++ phydm_Beamforming_NDPARate(pDM_Odm, BW, Rate); ++ ret = Beamforming_SendVHTNDPAPacket(pDM_Odm, RA, AID, BW, NORMAL_QUEUE); ++ break; ++ case 3: ++ phydm_Beamforming_NDPARate(pDM_Odm, BW, Rate); ++ ret = Beamforming_SendHTNDPAPacket(pDM_Odm, RA, BW, NORMAL_QUEUE); ++ break; ++ } ++ return ret; ++} ++ ++/*Only OID uses this function*/ ++BOOLEAN ++phydm_BeamformingControl_V2( ++ IN PVOID pDM_VOID, ++ u1Byte Idx, ++ u1Byte Mode, ++ CHANNEL_WIDTH BW, ++ u2Byte Period ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMING_OID_INFO pBeamOidInfo = &(pBeamInfo->BeamformingOidInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__)); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Idx (%d), Mode (%d), BW (%d), Period (%d)\n", Idx, Mode, BW, Period)); ++ ++ pBeamOidInfo->SoundOidIdx = Idx; ++ pBeamOidInfo->SoundOidMode = (SOUNDING_MODE) Mode; ++ pBeamOidInfo->SoundOidBW = BW; ++ pBeamOidInfo->SoundOidPeriod = Period; ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++ ++ return TRUE; ++} ++ ++ ++VOID ++phydm_Beamforming_Watchdog( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("%s Start!\n", __func__)); ++ ++ if (pBeamInfo->beamformee_su_cnt == 0) ++ return; ++ ++ Beamforming_DymPeriod(pDM_Odm,0); ++ phydm_Beamforming_DymNDPARate(pDM_Odm); ++ ++} ++ ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_beamforming.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_beamforming.h +new file mode 100644 +index 0000000..c01f081 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_beamforming.h +@@ -0,0 +1,365 @@ ++#ifndef __INC_BEAMFORMING_H ++#define __INC_BEAMFORMING_H ++ ++#ifndef BEAMFORMING_SUPPORT ++#define BEAMFORMING_SUPPORT 0 ++#endif ++ ++/*Beamforming Related*/ ++#include "txbf/halcomtxbf.h" ++#include "txbf/haltxbfjaguar.h" ++#include "txbf/haltxbf8192e.h" ++#include "txbf/haltxbf8814a.h" ++#include "txbf/haltxbf8821b.h" ++#include "txbf/haltxbf8822b.h" ++#include "txbf/haltxbfinterface.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ ++#define MAX_BEAMFORMEE_SU 2 ++#define MAX_BEAMFORMER_SU 2 ++#if (RTL8822B_SUPPORT == 1) ++#define MAX_BEAMFORMEE_MU 6 ++#define MAX_BEAMFORMER_MU 1 ++#else ++#define MAX_BEAMFORMEE_MU 0 ++#define MAX_BEAMFORMER_MU 0 ++#endif ++ ++#define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU) ++#define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU) ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++/*for different naming between WIN and CE*/ ++#define BEACON_QUEUE BCN_QUEUE_INX ++#define NORMAL_QUEUE MGT_QUEUE_INX ++#define RT_DISABLE_FUNC RTW_DISABLE_FUNC ++#define RT_ENABLE_FUNC RTW_ENABLE_FUNC ++#endif ++ ++typedef enum _BEAMFORMING_ENTRY_STATE { ++ BEAMFORMING_ENTRY_STATE_UNINITIALIZE, ++ BEAMFORMING_ENTRY_STATE_INITIALIZEING, ++ BEAMFORMING_ENTRY_STATE_INITIALIZED, ++ BEAMFORMING_ENTRY_STATE_PROGRESSING, ++ BEAMFORMING_ENTRY_STATE_PROGRESSED ++} BEAMFORMING_ENTRY_STATE, *PBEAMFORMING_ENTRY_STATE; ++ ++ ++typedef enum _BEAMFORMING_NOTIFY_STATE { ++ BEAMFORMING_NOTIFY_NONE, ++ BEAMFORMING_NOTIFY_ADD, ++ BEAMFORMING_NOTIFY_DELETE, ++ BEAMFORMEE_NOTIFY_ADD_SU, ++ BEAMFORMEE_NOTIFY_DELETE_SU, ++ BEAMFORMEE_NOTIFY_ADD_MU, ++ BEAMFORMEE_NOTIFY_DELETE_MU, ++ BEAMFORMING_NOTIFY_RESET ++} BEAMFORMING_NOTIFY_STATE, *PBEAMFORMING_NOTIFY_STATE; ++ ++typedef enum _BEAMFORMING_CAP { ++ BEAMFORMING_CAP_NONE = 0x0, ++ BEAMFORMER_CAP_HT_EXPLICIT = BIT1, ++ BEAMFORMEE_CAP_HT_EXPLICIT = BIT2, ++ BEAMFORMER_CAP_VHT_SU = BIT5, /* Self has er Cap, because Reg er & peer ee */ ++ BEAMFORMEE_CAP_VHT_SU = BIT6, /* Self has ee Cap, because Reg ee & peer er */ ++ BEAMFORMER_CAP_VHT_MU = BIT7, /* Self has er Cap, because Reg er & peer ee */ ++ BEAMFORMEE_CAP_VHT_MU = BIT8, /* Self has ee Cap, because Reg ee & peer er */ ++ BEAMFORMER_CAP = BIT9, ++ BEAMFORMEE_CAP = BIT10, ++}BEAMFORMING_CAP, *PBEAMFORMING_CAP; ++ ++ ++typedef enum _SOUNDING_MODE { ++ SOUNDING_SW_VHT_TIMER = 0x0, ++ SOUNDING_SW_HT_TIMER = 0x1, ++ SOUNDING_STOP_All_TIMER = 0x2, ++ SOUNDING_HW_VHT_TIMER = 0x3, ++ SOUNDING_HW_HT_TIMER = 0x4, ++ SOUNDING_STOP_OID_TIMER = 0x5, ++ SOUNDING_AUTO_VHT_TIMER = 0x6, ++ SOUNDING_AUTO_HT_TIMER = 0x7, ++ SOUNDING_FW_VHT_TIMER = 0x8, ++ SOUNDING_FW_HT_TIMER = 0x9, ++}SOUNDING_MODE, *PSOUNDING_MODE; ++ ++typedef struct _RT_BEAMFORM_STAINFO { ++ pu1Byte RA; ++ u2Byte AID; ++ u2Byte MacID; ++ u1Byte MyMacAddr[6]; ++ WIRELESS_MODE WirelessMode; ++ CHANNEL_WIDTH BW; ++ BEAMFORMING_CAP BeamformCap; ++ u1Byte HtBeamformCap; ++ u2Byte VhtBeamformCap; ++ u1Byte CurBeamform; ++ u2Byte CurBeamformVHT; ++} RT_BEAMFORM_STAINFO, *PRT_BEAMFORM_STAINFO; ++ ++ ++typedef struct _RT_BEAMFORMEE_ENTRY { ++ BOOLEAN bUsed; ++ BOOLEAN bTxBF; ++ BOOLEAN bSound; ++ u2Byte AID; /*Used to construct AID field of NDPA packet.*/ ++ u2Byte MacId; /*Used to Set Reg42C in IBSS mode. */ ++ u2Byte P_AID; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ ++ u2Byte G_ID; /*Used to fill Tx DESC*/ ++ u1Byte MyMacAddr[6]; ++ u1Byte MacAddr[6]; /*Used to fill Reg6E4 to fill Mac address of CSI report frame.*/ ++ CHANNEL_WIDTH SoundBW; /*Sounding BandWidth*/ ++ u2Byte SoundPeriod; ++ BEAMFORMING_CAP BeamformEntryCap; ++ BEAMFORMING_ENTRY_STATE BeamformEntryState; ++ BOOLEAN bBeamformingInProgress; ++ /*u1Byte LogSeq; // Move to _RT_BEAMFORMER_ENTRY*/ ++ /*u2Byte LogRetryCnt:3; // 0~4 // Move to _RT_BEAMFORMER_ENTRY*/ ++ /*u2Byte LogSuccessCnt:2; // 0~2 // Move to _RT_BEAMFORMER_ENTRY*/ ++ u2Byte LogStatusFailCnt:5; // 0~21 ++ u2Byte DefaultCSICnt:5; // 0~21 ++ u1Byte CSIMatrix[327]; ++ u2Byte CSIMatrixLen; ++ u1Byte NumofSoundingDim; ++ u1Byte CompSteeringNumofBFer; ++ u1Byte su_reg_index; ++ /*For MU-MIMO*/ ++ BOOLEAN is_mu_sta; ++ u1Byte mu_reg_index; ++ u1Byte gid_valid[8]; ++ u1Byte user_position[16]; ++} RT_BEAMFORMEE_ENTRY, *PRT_BEAMFORMEE_ENTRY; ++ ++typedef struct _RT_BEAMFORMER_ENTRY { ++ BOOLEAN bUsed; ++ /*P_AID of BFer entry is probably not used*/ ++ u2Byte P_AID; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ ++ u2Byte G_ID; ++ u1Byte MyMacAddr[6]; ++ u1Byte MacAddr[6]; ++ BEAMFORMING_CAP BeamformEntryCap; ++ u1Byte NumofSoundingDim; ++ u1Byte ClockResetTimes; /*Modified by Jeffery @2015-04-10*/ ++ u1Byte PreLogSeq; /*Modified by Jeffery @2015-03-30*/ ++ u1Byte LogSeq; /*Modified by Jeffery @2014-10-29*/ ++ u2Byte LogRetryCnt:3; /*Modified by Jeffery @2014-10-29*/ ++ u2Byte LogSuccess:2; /*Modified by Jeffery @2014-10-29*/ ++ u1Byte su_reg_index; ++ /*For MU-MIMO*/ ++ BOOLEAN is_mu_ap; ++ u1Byte gid_valid[8]; ++ u1Byte user_position[16]; ++ u2Byte AID; ++} RT_BEAMFORMER_ENTRY, *PRT_BEAMFORMER_ENTRY; ++ ++typedef struct _RT_SOUNDING_INFO { ++ u1Byte SoundIdx; ++ CHANNEL_WIDTH SoundBW; ++ SOUNDING_MODE SoundMode; ++ u2Byte SoundPeriod; ++} RT_SOUNDING_INFO, *PRT_SOUNDING_INFO; ++ ++ ++ ++typedef struct _RT_BEAMFORMING_OID_INFO { ++ u1Byte SoundOidIdx; ++ CHANNEL_WIDTH SoundOidBW; ++ SOUNDING_MODE SoundOidMode; ++ u2Byte SoundOidPeriod; ++} RT_BEAMFORMING_OID_INFO, *PRT_BEAMFORMING_OID_INFO; ++ ++ ++typedef struct _RT_BEAMFORMING_INFO { ++ BEAMFORMING_CAP BeamformCap; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry[BEAMFORMEE_ENTRY_NUM]; ++ RT_BEAMFORMER_ENTRY BeamformerEntry[BEAMFORMER_ENTRY_NUM]; ++ RT_BEAMFORM_STAINFO BeamformSTAinfo; ++ u1Byte BeamformeeCurIdx; ++ RT_TIMER BeamformingTimer; ++ RT_TIMER mu_timer; ++ RT_SOUNDING_INFO SoundingInfo; ++ RT_BEAMFORMING_OID_INFO BeamformingOidInfo; ++ HAL_TXBF_INFO TxbfInfo; ++ u1Byte SoundingSequence; ++ u1Byte beamformee_su_cnt; ++ u1Byte beamformer_su_cnt; ++ u4Byte beamformee_su_reg_maping; ++ u4Byte beamformer_su_reg_maping; ++ /*For MU-MINO*/ ++ u1Byte beamformee_mu_cnt; ++ u1Byte beamformer_mu_cnt; ++ u4Byte beamformee_mu_reg_maping; ++ u1Byte mu_ap_index; ++ BOOLEAN is_mu_sounding; ++ u1Byte FirstMUBFeeIndex; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER SourceAdapter; ++#endif ++ /* Control register */ ++ u4Byte RegMUTxCtrl; /* For USB/SDIO interfaces aync I/O */ ++} RT_BEAMFORMING_INFO, *PRT_BEAMFORMING_INFO; ++ ++ ++typedef struct _RT_NDPA_STA_INFO { ++ u2Byte AID:12; ++ u2Byte FeedbackType:1; ++ u2Byte NcIndex:3; ++} RT_NDPA_STA_INFO, *PRT_NDPA_STA_INFO; ++ ++ ++BEAMFORMING_CAP ++phydm_Beamforming_GetEntryBeamCapByMacId( ++ IN PVOID pDM_VOID, ++ IN u1Byte MacId ++ ); ++ ++PRT_BEAMFORMEE_ENTRY ++phydm_Beamforming_GetBFeeEntryByAddr( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ OUT pu1Byte Idx ++ ); ++ ++PRT_BEAMFORMER_ENTRY ++phydm_Beamforming_GetBFerEntryByAddr( ++ IN PVOID pDM_VOID, ++ IN pu1Byte TA, ++ OUT pu1Byte Idx ++ ); ++ ++u1Byte ++Beamforming_GetHTNDPTxRate( ++ IN PVOID pDM_VOID, ++ u1Byte CompSteeringNumofBFer ++); ++ ++u1Byte ++Beamforming_GetVHTNDPTxRate( ++ IN PVOID pDM_VOID, ++ u1Byte CompSteeringNumofBFer ++); ++ ++VOID ++phydm_Beamforming_Notify( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++Beamforming_Enter( ++ IN PVOID pDM_VOID, ++ IN u2Byte staIdx ++ ); ++ ++VOID ++Beamforming_Leave( ++ IN PVOID pDM_VOID, ++ pu1Byte RA ++ ); ++ ++BOOLEAN ++BeamformingStart_FW( ++ IN PVOID pDM_VOID, ++ u1Byte Idx ++ ); ++ ++VOID ++Beamforming_CheckSoundingSuccess( ++ IN PVOID pDM_VOID, ++ BOOLEAN Status ++); ++ ++VOID ++phydm_Beamforming_End_SW( ++ IN PVOID pDM_VOID, ++ BOOLEAN Status ++ ); ++ ++VOID ++Beamforming_TimerCallback( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++phydm_Beamforming_Init( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++ ++BEAMFORMING_CAP ++phydm_Beamforming_GetBeamCap( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamInfo ++ ); ++ ++ ++BOOLEAN ++BeamformingControl_V1( ++ IN PVOID pDM_VOID, ++ pu1Byte RA, ++ u1Byte AID, ++ u1Byte Mode, ++ CHANNEL_WIDTH BW, ++ u1Byte Rate ++ ); ++ ++ ++BOOLEAN ++phydm_BeamformingControl_V2( ++ IN PVOID pDM_VOID, ++ u1Byte Idx, ++ u1Byte Mode, ++ CHANNEL_WIDTH BW, ++ u2Byte Period ++ ); ++ ++VOID ++phydm_Beamforming_Watchdog( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++Beamforming_SWTimerCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PRT_TIMER pTimer ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ void *FunctionContext ++#endif ++ ); ++ ++BOOLEAN ++Beamforming_SendHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW, ++ IN u1Byte QIdx ++ ); ++ ++ ++BOOLEAN ++Beamforming_SendVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW, ++ IN u1Byte QIdx ++ ); ++ ++#else ++#define Beamforming_GidPAid(Adapter, pTcb) ++#define Beamforming_Enter(pDM_Odm, staIdx) ++#define Beamforming_Leave(pDM_Odm, RA) ++#define Beamforming_End_FW(pDMOdm) ++#define BeamformingControl_V1(pDM_Odm, RA, AID, Mode, BW, Rate) TRUE ++#define BeamformingControl_V2(pDM_Odm, Idx, Mode, BW, Period) TRUE ++#define phydm_Beamforming_End_SW(pDM_Odm, _Status) ++#define Beamforming_TimerCallback(pDM_Odm) ++#define phydm_Beamforming_Init(pDM_Odm) ++#define phydm_BeamformingControl_V2(pDM_Odm, _Idx, _Mode, _BW, _Period) FALSE ++#define Beamforming_Watchdog(pDM_Odm) ++#define phydm_Beamforming_Watchdog(pDM_Odm) ++ ++ ++#endif ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_cfotracking.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_cfotracking.c +new file mode 100644 +index 0000000..0aa78f1 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_cfotracking.c +@@ -0,0 +1,347 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++VOID ++odm_SetCrystalCap( ++ IN PVOID pDM_VOID, ++ IN u1Byte CrystalCap ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ BOOLEAN bEEPROMCheck; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ bEEPROMCheck = (pHalData->EEPROMVersion >= 0x01)?TRUE:FALSE; ++#else ++ bEEPROMCheck = TRUE; ++#endif ++ ++ if(pCfoTrack->CrystalCap == CrystalCap) ++ return; ++ ++ pCfoTrack->CrystalCap = CrystalCap; ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8188F)) { ++ /* write 0x24[22:17] = 0x24[16:11] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x007ff800, (CrystalCap|(CrystalCap << 6))); ++ } else if (pDM_Odm->SupportICType & ODM_RTL8812) { ++ /* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap|(CrystalCap << 6))); ++ } else if (((pDM_Odm->SupportICType & ODM_RTL8723A) && bEEPROMCheck) || ++ (pDM_Odm->SupportICType & (ODM_RTL8703B|ODM_RTL8723B|ODM_RTL8192E|ODM_RTL8821))) { ++ /* 0x2C[23:18] = 0x2C[17:12] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x00FFF000, (CrystalCap|(CrystalCap << 6))); ++ } else if (pDM_Odm->SupportICType & ODM_RTL8821B) { ++ /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x7E000000, CrystalCap); ++ ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0x7E, CrystalCap); ++ } else if (pDM_Odm->SupportICType & ODM_RTL8814A) { ++ /* write 0x2C[26:21] = 0x2C[20:15] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x07FF8000, (CrystalCap|(CrystalCap << 6))); ++ } else if (pDM_Odm->SupportICType & ODM_RTL8822B) { ++ /* write 0x24[30:25] = 0x28[6:1] = CrystalCap */ ++ CrystalCap = CrystalCap & 0x3F; ++ ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x7e000000, CrystalCap); ++ ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0x7e, CrystalCap); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): Use default setting.\n")); ++ ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap|(CrystalCap << 6))); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): CrystalCap = 0x%x\n", CrystalCap)); ++#endif ++} ++ ++u1Byte ++odm_GetDefaultCrytaltalCap( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte CrystalCap = 0x20; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ CrystalCap = pHalData->CrystalCap; ++#else ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++ if(priv->pmib->dot11RFEntry.xcap > 0) ++ CrystalCap = priv->pmib->dot11RFEntry.xcap; ++#endif ++ ++ CrystalCap = CrystalCap & 0x3f; ++ ++ return CrystalCap; ++} ++ ++VOID ++odm_SetATCStatus( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN ATCStatus ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ ++ if(pCfoTrack->bATCStatus == ATCStatus) ++ return; ++ ++ ODM_SetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm), ATCStatus); ++ pCfoTrack->bATCStatus = ATCStatus; ++} ++ ++BOOLEAN ++odm_GetATCStatus( ++ IN PVOID pDM_VOID ++) ++{ ++ BOOLEAN ATCStatus; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ATCStatus = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm)); ++ return ATCStatus; ++} ++ ++VOID ++ODM_CfoTrackingReset( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ ++ pCfoTrack->DefXCap = odm_GetDefaultCrytaltalCap(pDM_Odm); ++ pCfoTrack->bAdjust = TRUE; ++ ++ if(pCfoTrack->CrystalCap > pCfoTrack->DefXCap) ++ { ++ odm_SetCrystalCap(pDM_Odm, pCfoTrack->CrystalCap - 1); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ++ ("ODM_CfoTrackingReset(): approch default value (0x%x)\n", pCfoTrack->CrystalCap)); ++ } else if (pCfoTrack->CrystalCap < pCfoTrack->DefXCap) ++ { ++ odm_SetCrystalCap(pDM_Odm, pCfoTrack->CrystalCap + 1); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ++ ("ODM_CfoTrackingReset(): approch default value (0x%x)\n", pCfoTrack->CrystalCap)); ++ } ++ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ odm_SetATCStatus(pDM_Odm, TRUE); ++ #endif ++} ++ ++VOID ++ODM_CfoTrackingInit( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ ++ pCfoTrack->DefXCap = pCfoTrack->CrystalCap = odm_GetDefaultCrytaltalCap(pDM_Odm); ++ pCfoTrack->bATCStatus = odm_GetATCStatus(pDM_Odm); ++ pCfoTrack->bAdjust = TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init()=========> \n")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init(): bATCStatus = %d, CrystalCap = 0x%x \n",pCfoTrack->bATCStatus, pCfoTrack->DefXCap)); ++} ++ ++VOID ++ODM_CfoTracking( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ int CFO_kHz_A, CFO_kHz_B, CFO_ave = 0; ++ int CFO_ave_diff; ++ int CrystalCap = (int)pCfoTrack->CrystalCap; ++ u1Byte Adjust_Xtal = 1; ++ ++ //4 Support ability ++ if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Return: SupportAbility ODM_BB_CFO_TRACKING is disabled\n")); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking()=========> \n")); ++ ++ if(!pDM_Odm->bLinked || !pDM_Odm->bOneEntryOnly) ++ { ++ //4 No link or more than one entry ++ ODM_CfoTrackingReset(pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Reset: bLinked = %d, bOneEntryOnly = %d\n", ++ pDM_Odm->bLinked, pDM_Odm->bOneEntryOnly)); ++ } ++ else ++ { ++ //3 1. CFO Tracking ++ //4 1.1 No new packet ++ if(pCfoTrack->packetCount == pCfoTrack->packetCount_pre) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): packet counter doesn't change\n")); ++ return; ++ } ++ pCfoTrack->packetCount_pre = pCfoTrack->packetCount; ++ ++ //4 1.2 Calculate CFO ++ CFO_kHz_A = (int)((pCfoTrack->CFO_tail[0] * 3125) / 10)>>7; /* CFO_tail[1:0] is S(8,7), (num_subcarrier>>7) x 312.5K = CFO value(K Hz) */ ++ CFO_kHz_B = (int)((pCfoTrack->CFO_tail[1] * 3125) / 10)>>7; ++ ++ if(pDM_Odm->RFType < ODM_2T2R) ++ CFO_ave = CFO_kHz_A; ++ else ++ CFO_ave = (int)(CFO_kHz_A + CFO_kHz_B) >> 1; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): CFO_kHz_A = %dkHz, CFO_kHz_B = %dkHz, CFO_ave = %dkHz\n", ++ CFO_kHz_A, CFO_kHz_B, CFO_ave)); ++ ++ //4 1.3 Avoid abnormal large CFO ++ CFO_ave_diff = (pCfoTrack->CFO_ave_pre >= CFO_ave)?(pCfoTrack->CFO_ave_pre - CFO_ave):(CFO_ave - pCfoTrack->CFO_ave_pre); ++ if(CFO_ave_diff > 20 && pCfoTrack->largeCFOHit == 0 && !pCfoTrack->bAdjust) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): first large CFO hit\n")); ++ pCfoTrack->largeCFOHit = 1; ++ return; ++ } ++ else ++ pCfoTrack->largeCFOHit = 0; ++ pCfoTrack->CFO_ave_pre = CFO_ave; ++ ++ //4 1.4 Dynamic Xtal threshold ++ if(pCfoTrack->bAdjust == FALSE) ++ { ++ if(CFO_ave > CFO_TH_XTAL_HIGH || CFO_ave < (-CFO_TH_XTAL_HIGH)) ++ pCfoTrack->bAdjust = TRUE; ++ } ++ else ++ { ++ if(CFO_ave < CFO_TH_XTAL_LOW && CFO_ave > (-CFO_TH_XTAL_LOW)) ++ pCfoTrack->bAdjust = FALSE; ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ //4 1.5 BT case: Disable CFO tracking ++ if(pDM_Odm->bBtEnabled) ++ { ++ pCfoTrack->bAdjust = FALSE; ++ odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable CFO tracking for BT!!\n")); ++ } ++/* ++ //4 1.6 Big jump ++ if(pCfoTrack->bAdjust) ++ { ++ if(CFO_ave > CFO_TH_XTAL_LOW) ++ Adjust_Xtal = Adjust_Xtal + ((CFO_ave - CFO_TH_XTAL_LOW) >> 2); ++ else if(CFO_ave < (-CFO_TH_XTAL_LOW)) ++ Adjust_Xtal = Adjust_Xtal + ((CFO_TH_XTAL_LOW - CFO_ave) >> 2); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap offset = %d\n", Adjust_Xtal)); ++ } ++*/ ++#endif ++ ++ //4 1.7 Adjust Crystal Cap. ++ if(pCfoTrack->bAdjust) ++ { ++ if(CFO_ave > CFO_TH_XTAL_LOW) ++ CrystalCap = CrystalCap + Adjust_Xtal; ++ else if(CFO_ave < (-CFO_TH_XTAL_LOW)) ++ CrystalCap = CrystalCap - Adjust_Xtal; ++ ++ if(CrystalCap > 0x3f) ++ CrystalCap = 0x3f; ++ else if (CrystalCap < 0) ++ CrystalCap = 0; ++ ++ odm_SetCrystalCap(pDM_Odm, (u1Byte)CrystalCap); ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap = 0x%x, Default Crystal cap = 0x%x\n", ++ pCfoTrack->CrystalCap, pCfoTrack->DefXCap)); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ return; ++ ++ //3 2. Dynamic ATC switch ++ if(CFO_ave < CFO_TH_ATC && CFO_ave > -CFO_TH_ATC) ++ { ++ odm_SetATCStatus(pDM_Odm, FALSE); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable ATC!!\n")); ++ } ++ else ++ { ++ odm_SetATCStatus(pDM_Odm, TRUE); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Enable ATC!!\n")); ++ } ++#endif ++ } ++} ++ ++VOID ++ODM_ParsingCFO( ++ IN PVOID pDM_VOID, ++ IN PVOID pPktinfo_VOID, ++ IN s1Byte* pcfotail ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_PACKET_INFO_T pPktinfo = (PODM_PACKET_INFO_T)pPktinfo_VOID; ++ PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK); ++ u1Byte i; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)) ++ return; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(pPktinfo->bPacketMatchBSSID) ++#else ++ if(pPktinfo->StationID != 0) ++#endif ++ { ++ //3 Update CFO report for path-A & path-B ++ // Only paht-A and path-B have CFO tail and short CFO ++ for(i = ODM_RF_PATH_A; i <= ODM_RF_PATH_B; i++) ++ { ++ pCfoTrack->CFO_tail[i] = (int)pcfotail[i]; ++ } ++ ++ //3 Update packet counter ++ if(pCfoTrack->packetCount == 0xffffffff) ++ pCfoTrack->packetCount = 0; ++ else ++ pCfoTrack->packetCount++; ++ } ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_cfotracking.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_cfotracking.h +new file mode 100644 +index 0000000..7eca3f6 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_cfotracking.h +@@ -0,0 +1,68 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMCFOTRACK_H__ ++#define __PHYDMCFOTRACK_H__ ++ ++#define CFO_TRACKING_VERSION "1.2" /*2015.06.17*/ ++ ++#define CFO_TH_XTAL_HIGH 20 // kHz ++#define CFO_TH_XTAL_LOW 10 // kHz ++#define CFO_TH_ATC 80 // kHz ++ ++typedef struct _CFO_TRACKING_ ++{ ++ BOOLEAN bATCStatus; ++ BOOLEAN largeCFOHit; ++ BOOLEAN bAdjust; ++ u1Byte CrystalCap; ++ u1Byte DefXCap; ++ int CFO_tail[2]; ++ int CFO_ave_pre; ++ u4Byte packetCount; ++ u4Byte packetCount_pre; ++ ++ BOOLEAN bForceXtalCap; ++ BOOLEAN bReset; ++}CFO_TRACKING, *PCFO_TRACKING; ++ ++VOID ++ODM_CfoTrackingReset( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++ODM_CfoTrackingInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++ODM_CfoTracking( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++ODM_ParsingCFO( ++ IN PVOID pDM_VOID, ++ IN PVOID pPktinfo_VOID, ++ IN s1Byte* pcfotail ++); ++ ++#endif +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_debug.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_debug.c +new file mode 100644 +index 0000000..d5153b8 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_debug.c +@@ -0,0 +1,2027 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++ ++VOID ++PHYDM_InitDebugSetting( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ pDM_Odm->DebugLevel = ODM_DBG_TRACE; ++ ++ pDM_Odm->DebugComponents = ++ \ ++#if DBG ++//BB Functions ++// ODM_COMP_DIG | ++// ODM_COMP_RA_MASK | ++// ODM_COMP_DYNAMIC_TXPWR | ++// ODM_COMP_FA_CNT | ++// ODM_COMP_RSSI_MONITOR | ++// ODM_COMP_CCK_PD | ++/* ODM_COMP_ANT_DIV |*/ ++// ODM_COMP_PWR_SAVE | ++// ODM_COMP_PWR_TRAIN | ++// ODM_COMP_RATE_ADAPTIVE | ++// ODM_COMP_PATH_DIV | ++// ODM_COMP_DYNAMIC_PRICCA | ++// ODM_COMP_RXHP | ++// ODM_COMP_MP | ++// ODM_COMP_CFO_TRACKING | ++// ODM_COMP_ACS | ++// PHYDM_COMP_ADAPTIVITY | ++// PHYDM_COMP_RA_DBG | ++/* PHYDM_COMP_TXBF |*/ ++//MAC Functions ++// ODM_COMP_EDCA_TURBO | ++// ODM_COMP_EARLY_MODE | ++/* ODM_FW_DEBUG_TRACE |*/ ++//RF Functions ++// ODM_COMP_TX_PWR_TRACK | ++// ODM_COMP_RX_GAIN_TRACK | ++// ODM_COMP_CALIBRATION | ++//Common ++/* ODM_PHY_CONFIG |*/ ++// ODM_COMP_COMMON | ++// ODM_COMP_INIT | ++// ODM_COMP_PSD | ++/* ODM_COMP_NOISY_DETECT |*/ ++#endif ++ 0; ++ ++ pDM_Odm->fw_buff_is_enpty = TRUE; ++ pDM_Odm->pre_c2h_seq = 0; ++} ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++static u1Byte BbDbgBuf[BB_TMP_BUF_SIZE]; ++ ++VOID ++phydm_BB_RxHang_Info(IN PDM_ODM_T pDM_Odm) ++{ ++ u4Byte value32 = 0; ++ ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ return; ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF80 , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rptreg of sc/bw/ht/...", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ /* dbg_port = state machine */ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x007); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "state machine", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = CCA-related*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x204); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "CCA-related", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ ++ /* dbg_port = edcca/rxd*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x278); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "edcca/rxd", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = rx_state/mux_state/ADC_MASK_OFDM*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x290); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx_state/mux_state/ADC_MASK_OFDM", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = bf-related*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x2B2); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "bf-related", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = bf-related*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0x2B8); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "bf-related", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = txon/rxd*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xA03); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "txon/rxd", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = l_rate/l_length*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xA0B); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "l_rate/l_length", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = rxd/rxd_hit*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xA0D); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rxd/rxd_hit", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = dis_cca*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAA0); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "dis_cca", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ ++ /* dbg_port = tx*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAB0); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "tx", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ /* dbg_port = rx plcp*/ ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD0); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD1); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD2); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord, 0xAD3); ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_DBG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x8fc", value32); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11AC , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "rx plcp", (value32)); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++} ++ ++VOID ++phydm_BB_Debug_Info(IN PDM_ODM_T pDM_Odm) ++{ ++ ++ u1Byte RX_HT_BW, RX_VHT_BW, RXSC, RX_HT, RX_BW; ++ static u1Byte vRX_BW ; ++ u4Byte value32, value32_1, value32_2, value32_3; ++ s4Byte SFO_A, SFO_B, SFO_C, SFO_D; ++ s4Byte LFO_A, LFO_B, LFO_C, LFO_D; ++ static u1Byte MCSS, Tail, Parity, rsv, vrsv, idx, smooth, htsound, agg, stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, vNsts, vtxops, vrsv2, vbrsv, bf, vbcrc; ++ static u2Byte HLength, htcrc8, Length; ++ static u2Byte vpaid; ++ static u2Byte vLength, vhtcrc8, vMCSS, vTail, vbTail; ++ static u1Byte HMCSS, HRX_BW; ++ ++ ++ u1Byte pwDB; ++ s1Byte RXEVM_0, RXEVM_1, RXEVM_2 ; ++ u1Byte RF_gain_pathA, RF_gain_pathB, RF_gain_pathC, RF_gain_pathD; ++ u1Byte RX_SNR_pathA, RX_SNR_pathB, RX_SNR_pathC, RX_SNR_pathD; ++ s4Byte sig_power; ++ const char *RXHT_table[3] = {"legacy", "HT", "VHT"}; ++ const char *BW_table[3] = {"20M", "40M", "80M"}; ++ const char *RXSC_table[7] = {"duplicate/full bw", "usc20-1", "lsc20-1", "usc20-2", "lsc20-2", "usc40", "lsc40"}; ++ ++ const char *L_rate[8] = {"6M", "9M", "12M", "18M", "24M", "36M", "48M", "54M"}; ++ ++ ++ /* ++ const double evm_comp_20M = 0.579919469776867; //10*log10(64.0/56.0) ++ const double evm_comp_40M = 0.503051183113957; //10*log10(128.0/114.0) ++ const double evm_comp_80M = 0.244245993314183; //10*log10(256.0/242.0) ++ const double evm_comp_160M = 0.244245993314183; //10*log10(512.0/484.0) ++ */ ++ ++ if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ return; ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s\n", "BB Report Info"); ++ DCMD_Printf(BbDbgBuf); ++ ++ /*BW & Mode Detection*/ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf80 , bMaskDWord); ++ value32_2 = value32; ++ RX_HT_BW = (u1Byte)(value32 & 0x1); ++ RX_VHT_BW = (u1Byte)((value32 >> 1) & 0x3); ++ RXSC = (u1Byte)(value32 & 0x78); ++ value32_1 = (value32 & 0x180) >> 7; ++ RX_HT = (u1Byte)(value32_1); ++ /* ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "F80", value32_2); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_HT_BW", RX_HT_BW); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_VHT_BW", RX_VHT_BW); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_SC", RXSC); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_HT", RX_HT); ++ DCMD_Printf(BbDbgBuf); ++ */ ++ ++ /*rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n RX_HT:%s ", RXHT_table[RX_HT]);*/ ++ /*DCMD_Printf(BbDbgBuf);*/ ++ RX_BW = 0; ++ ++ if (RX_HT == 2) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: VHT Mode"); ++ DCMD_Printf(BbDbgBuf); ++ if (RX_VHT_BW == 0) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=20M"); ++ DCMD_Printf(BbDbgBuf); ++ } else if (RX_VHT_BW == 1) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=40M"); ++ DCMD_Printf(BbDbgBuf); ++ } else { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=80M"); ++ DCMD_Printf(BbDbgBuf); ++ } ++ RX_BW = RX_VHT_BW; ++ } else if (RX_HT == 1) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: HT Mode"); ++ DCMD_Printf(BbDbgBuf); ++ if (RX_HT_BW == 0) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=20M"); ++ DCMD_Printf(BbDbgBuf); ++ } else if (RX_HT_BW == 1) { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW=40M"); ++ DCMD_Printf(BbDbgBuf); ++ } ++ RX_BW = RX_HT_BW; ++ } else { ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: Legeacy Mode"); ++ DCMD_Printf(BbDbgBuf); ++ } ++ ++ if (RX_HT != 0) { ++ if (RXSC == 0) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n duplicate/full bw"); ++ else if (RXSC == 1) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc20-1"); ++ else if (RXSC == 2) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc20-1"); ++ else if (RXSC == 3) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc20-2"); ++ else if (RXSC == 4) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc20-2"); ++ else if (RXSC == 9) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc40"); ++ else if (RXSC == 10) ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc40"); ++ DCMD_Printf(BbDbgBuf); ++ } ++ /* ++ if(RX_HT == 2){ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW:%s", BW_table[RX_VHT_BW]); ++ RX_BW = RX_VHT_BW; ++ } ++ else if(RX_HT == 1){ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " BW:%s", BW_table[RX_HT_BW]); ++ RX_BW = RX_HT_BW; ++ } ++ else ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, ""); ++ ++ DCMD_Printf(BbDbgBuf); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, " RXSC:%s", RXSC_table[RXSC]); ++ DCMD_Printf(BbDbgBuf); ++ */ ++ ++ ++/* rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "dB Conversion: 10log(65)", ODM_PWdB_Conversion(65,10,0));*/ ++/* DCMD_Printf(BbDbgBuf);*/ ++ ++ /* RX signal power and AGC related info*/ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF90 , bMaskDWord); ++ pwDB = (u1Byte)((value32 & bMaskByte1) >> 8); ++ pwDB = pwDB >> 1; ++ sig_power = -110 + pwDB; ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd14 , bMaskDWord); ++ RX_SNR_pathA = (u1Byte)(value32 & 0xFF) >> 1; ++ RF_gain_pathA = (s1Byte)((value32 & bMaskByte1) >> 8); ++ RF_gain_pathA *= 2; ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd54 , bMaskDWord); ++ RX_SNR_pathB = (u1Byte)(value32 & 0xFF) >> 1; ++ RF_gain_pathB = (s1Byte)((value32 & bMaskByte1) >> 8); ++ RF_gain_pathB *= 2; ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd94 , bMaskDWord); ++ RX_SNR_pathC = (u1Byte)(value32 & 0xFF) >> 1; ++ RF_gain_pathC = (s1Byte)((value32 & bMaskByte1) >> 8); ++ RF_gain_pathC *= 2; ++ value32 = ODM_GetBBReg(pDM_Odm, 0xdd4 , bMaskDWord); ++ RX_SNR_pathD = (u1Byte)(value32 & 0xFF) >> 1; ++ RF_gain_pathD = (s1Byte)((value32 & bMaskByte1) >> 8); ++ RF_gain_pathD *= 2; ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", RF_gain_pathA, RF_gain_pathA, RF_gain_pathC, RF_gain_pathD); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++ /* RX Counter related info*/ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF08, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM CCA Counter", ((value32&0xFFFF0000)>>16)); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xFD0, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM SBD Fail Counter", value32&0xFFFF); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xFC4, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail Counter", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xFCC, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "CCK CCA Counter", value32&0xFFFF); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xFBC, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "LSIG (\"Parity Fail\"/\"Rate Illegal\") Counter", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32_1 = ODM_GetBBReg(pDM_Odm, 0xFC8, bMaskDWord); ++ value32_2 = ODM_GetBBReg(pDM_Odm, 0xFC0, bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT counter", ((value32_2&0xFFFF0000)>>16), value32_1&0xFFFF); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++ /* PostFFT related info*/ ++ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF8c , bMaskDWord); ++ RXEVM_0 = (s1Byte)((value32 & bMaskByte2) >> 16); ++ RXEVM_0 /= 2; ++ if (RXEVM_0 < -63) ++ RXEVM_0 = 0; ++ ++ DCMD_Printf(BbDbgBuf); ++ RXEVM_1 = (s1Byte)((value32 & bMaskByte3) >> 24); ++ RXEVM_1 /= 2; ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF88 , bMaskDWord); ++ RXEVM_2 = (s1Byte)((value32 & bMaskByte2) >> 16); ++ RXEVM_2 /= 2; ++ ++ if (RXEVM_1 < -63) ++ RXEVM_1 = 0; ++ if (RXEVM_2 < -63) ++ RXEVM_2 = 0; ++ ++ /* ++ if(RX_BW == 0){ ++ RXEVM_0 -= evm_comp_20M; ++ RXEVM_1 -= evm_comp_20M; ++ RXEVM_2 -= evm_comp_20M; ++ } ++ else if(RX_BW == 1){ ++ RXEVM_0 -= evm_comp_40M; ++ RXEVM_1 -= evm_comp_40M; ++ RXEVM_2 -= evm_comp_40M; ++ } ++ else if (RX_BW == 2){ ++ RXEVM_0 -= evm_comp_80M; ++ RXEVM_1 -= evm_comp_80M; ++ RXEVM_2 -= evm_comp_80M; ++ } ++ */ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", RXEVM_0, RXEVM_1, RXEVM_2); ++ DCMD_Printf(BbDbgBuf); ++ ++/* value32 = ODM_GetBBReg(pDM_Odm, 0xD14 ,bMaskDWord);*/ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", RX_SNR_pathA, RX_SNR_pathB, RX_SNR_pathC, RX_SNR_pathD); ++ DCMD_Printf(BbDbgBuf); ++/* rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "B_RXSNR", (value32&0xFF00)>>9);*/ ++/* DCMD_Printf(BbDbgBuf);*/ ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF8C , bMaskDWord); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++ //BW & Mode Detection ++ ++ //Reset Page F Counter ++ ODM_SetBBReg(pDM_Odm, 0xB58 , BIT0, 1); ++ ODM_SetBBReg(pDM_Odm, 0xB58 , BIT0, 0); ++ ++ //CFO Report Info ++ //Short CFO ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd0c , bMaskDWord); ++ value32_1 = ODM_GetBBReg(pDM_Odm, 0xd4c , bMaskDWord); ++ value32_2 = ODM_GetBBReg(pDM_Odm, 0xd8c , bMaskDWord); ++ value32_3 = ODM_GetBBReg(pDM_Odm, 0xdcc , bMaskDWord); ++ ++ SFO_A = (s4Byte)(value32 & bMask12Bits); ++ SFO_B = (s4Byte)(value32_1 & bMask12Bits); ++ SFO_C = (s4Byte)(value32_2 & bMask12Bits); ++ SFO_D = (s4Byte)(value32_3 & bMask12Bits); ++ ++ LFO_A = (s4Byte)(value32 >> 16); ++ LFO_B = (s4Byte)(value32_1 >> 16); ++ LFO_C = (s4Byte)(value32_2 >> 16); ++ LFO_D = (s4Byte)(value32_3 >> 16); ++ ++ //SFO 2's to dec ++ if (SFO_A > 2047) ++ SFO_A = SFO_A - 4096; ++ SFO_A = (SFO_A * 312500) / 2048; ++ ++ if (SFO_B > 2047) ++ SFO_B = SFO_B - 4096; ++ SFO_B = (SFO_B * 312500) / 2048; ++ if (SFO_C > 2047) ++ SFO_C = SFO_C - 4096; ++ SFO_C = (SFO_C * 312500) / 2048; ++ if (SFO_D > 2047) ++ SFO_D = SFO_D - 4096; ++ SFO_D = (SFO_D * 312500) / 2048; ++ ++ //LFO 2's to dec ++ ++ if (LFO_A > 4095) ++ LFO_A = LFO_A - 8192; ++ ++ if (LFO_B > 4095) ++ LFO_B = LFO_B - 8192; ++ ++ if (LFO_C > 4095) ++ LFO_C = LFO_C - 8192; ++ ++ if (LFO_D > 4095) ++ LFO_D = LFO_D - 8192; ++ LFO_A = LFO_A * 312500 / 4096; ++ LFO_B = LFO_B * 312500 / 4096; ++ LFO_C = LFO_C * 312500 / 4096; ++ LFO_D = LFO_D * 312500 / 4096; ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "CFO Report Info"); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Short CFO(Hz) ", SFO_A, SFO_B, SFO_C, SFO_D); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Long CFO(Hz) ", LFO_A, LFO_B, LFO_C, LFO_D); ++ DCMD_Printf(BbDbgBuf); ++ ++ //SCFO ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd10 , bMaskDWord); ++ value32_1 = ODM_GetBBReg(pDM_Odm, 0xd50 , bMaskDWord); ++ value32_2 = ODM_GetBBReg(pDM_Odm, 0xd90 , bMaskDWord); ++ value32_3 = ODM_GetBBReg(pDM_Odm, 0xdd0 , bMaskDWord); ++ ++ SFO_A = (s4Byte)(value32 & 0x7ff); ++ SFO_B = (s4Byte)(value32_1 & 0x7ff); ++ SFO_C = (s4Byte)(value32_2 & 0x7ff); ++ SFO_D = (s4Byte)(value32_3 & 0x7ff); ++ ++ if (SFO_A > 1023) ++ SFO_A = SFO_A - 2048; ++ ++ if (SFO_B > 2047) ++ SFO_B = SFO_B - 4096; ++ ++ if (SFO_C > 2047) ++ SFO_C = SFO_C - 4096; ++ ++ if (SFO_D > 2047) ++ SFO_D = SFO_D - 4096; ++ ++ SFO_A = SFO_A * 312500 / 1024; ++ SFO_B = SFO_B * 312500 / 1024; ++ SFO_C = SFO_C * 312500 / 1024; ++ SFO_D = SFO_D * 312500 / 1024; ++ ++ LFO_A = (s4Byte)(value32 >> 16); ++ LFO_B = (s4Byte)(value32_1 >> 16); ++ LFO_C = (s4Byte)(value32_2 >> 16); ++ LFO_D = (s4Byte)(value32_3 >> 16); ++ ++ if (LFO_A > 4095) ++ LFO_A = LFO_A - 8192; ++ ++ if (LFO_B > 4095) ++ LFO_B = LFO_B - 8192; ++ ++ if (LFO_C > 4095) ++ LFO_C = LFO_C - 8192; ++ ++ if (LFO_D > 4095) ++ LFO_D = LFO_D - 8192; ++ LFO_A = LFO_A * 312500 / 4096; ++ LFO_B = LFO_B * 312500 / 4096; ++ LFO_C = LFO_C * 312500 / 4096; ++ LFO_D = LFO_D * 312500 / 4096; ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Value SCFO(Hz) ", SFO_A, SFO_B, SFO_C, SFO_D); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " ACQ CFO(Hz) ", LFO_A, LFO_B, LFO_C, LFO_D); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xd14 , bMaskDWord); ++ value32_1 = ODM_GetBBReg(pDM_Odm, 0xd54 , bMaskDWord); ++ value32_2 = ODM_GetBBReg(pDM_Odm, 0xd94 , bMaskDWord); ++ value32_3 = ODM_GetBBReg(pDM_Odm, 0xdd4 , bMaskDWord); ++ ++ LFO_A = (s4Byte)(value32 >> 16); ++ LFO_B = (s4Byte)(value32_1 >> 16); ++ LFO_C = (s4Byte)(value32_2 >> 16); ++ LFO_D = (s4Byte)(value32_3 >> 16); ++ ++ if (LFO_A > 4095) ++ LFO_A = LFO_A - 8192; ++ ++ if (LFO_B > 4095) ++ LFO_B = LFO_B - 8192; ++ ++ if (LFO_C > 4095) ++ LFO_C = LFO_C - 8192; ++ ++ if (LFO_D > 4095) ++ LFO_D = LFO_D - 8192; ++ ++ LFO_A = LFO_A * 312500 / 4096; ++ LFO_B = LFO_B * 312500 / 4096; ++ LFO_C = LFO_C * 312500 / 4096; ++ LFO_D = LFO_D * 312500 / 4096; ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " End CFO(Hz) ", LFO_A, LFO_B, LFO_C, LFO_D); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf20 , bMaskDWord); /*L SIG*/ ++ ++ Tail = (u1Byte)((value32 & 0xfc0000) >> 16); ++ Parity = (u1Byte)((value32 & 0x20000) >> 16); ++ Length = (u2Byte)((value32 & 0x1ffe00) >> 8); ++ rsv = (u1Byte)(value32 & 0x10); ++ MCSS = (u1Byte)(value32 & 0x0f); ++ ++ switch (MCSS) { ++ case 0x0b: ++ idx = 0; ++ break; ++ case 0x0f: ++ idx = 1; ++ break; ++ case 0x0a: ++ idx = 2; ++ break; ++ case 0x0e: ++ idx = 3; ++ break; ++ case 0x09: ++ idx = 4; ++ break; ++ case 0x08: ++ idx = 5; ++ break; ++ case 0x0c: ++ idx = 6; ++ break; ++ default: ++ idx = 6; ++ break; ++ ++ } ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "L-SIG"); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Rate:%s", L_rate[idx]); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x/ %x /%x", " Rsv/Length/Parity", rsv, RX_BW, Length); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "HT-SIG1"); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf2c , bMaskDWord); /*HT SIG*/ ++ if (RX_HT == 1) { ++ ++ HMCSS = (u1Byte)(value32 & 0x7F); ++ HRX_BW = (u1Byte)(value32 & 0x80); ++ HLength = (u2Byte)((value32 >> 8) & 0xffff); ++ } ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x", " MCS/BW/Length", HMCSS, HRX_BW, HLength); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "HT-SIG2"); ++ DCMD_Printf(BbDbgBuf); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf30 , bMaskDWord); /*HT SIG*/ ++ ++ if (RX_HT == 1) { ++ smooth = (u1Byte)(value32 & 0x01); ++ htsound = (u1Byte)(value32 & 0x02); ++ rsv = (u1Byte)(value32 & 0x04); ++ agg = (u1Byte)(value32 & 0x08); ++ stbc = (u1Byte)(value32 & 0x30); ++ fec = (u1Byte)(value32 & 0x40); ++ sgi = (u1Byte)(value32 & 0x80); ++ htltf = (u1Byte)((value32 & 0x300) >> 8); ++ htcrc8 = (u2Byte)((value32 & 0x3fc00) >> 8); ++ Tail = (u1Byte)((value32 & 0xfc0000) >> 16); ++ ++ ++ } ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x", " Smooth/NoSound/Rsv/Aggregate/STBC/LDPC", smooth, htsound, rsv, agg, stbc, fec); ++ DCMD_Printf(BbDbgBuf); ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x", " SGI/E-HT-LTFs/CRC/Tail", sgi, htltf, htcrc8, Tail); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-A1"); ++ DCMD_Printf(BbDbgBuf); ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf2c , bMaskDWord); /*VHT SIG A1*/ ++ if (RX_HT == 2) { ++ /* value32 = ODM_GetBBReg(pDM_Odm, 0xf2c ,bMaskDWord);*/ ++ vRX_BW = (u1Byte)(value32 & 0x03); ++ vrsv = (u1Byte)(value32 & 0x04); ++ vstbc = (u1Byte)(value32 & 0x08); ++ vgid = (u1Byte)((value32 & 0x3f0) >> 4); ++ vNsts = (u1Byte)(((value32 & 0x1c00) >> 8) + 1); ++ vpaid = (u2Byte)(value32 & 0x3fe); ++ vtxops = (u1Byte)((value32 & 0x400000) >> 20); ++ vrsv2 = (u1Byte)((value32 & 0x800000) >> 20); ++ } ++ ++ /*rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F2C", value32);*/ ++ /*DCMD_Printf(BbDbgBuf);*/ ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x /%x /%x", " BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", vRX_BW, vrsv, vstbc, vgid, vNsts, vpaid, vtxops, vrsv2); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-A2"); ++ DCMD_Printf(BbDbgBuf); ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf30 , bMaskDWord); /*VHT SIG*/ ++ ++ ++ if (RX_HT == 2) { ++ /*value32 = ODM_GetBBReg(pDM_Odm, 0xf30 ,bMaskDWord); */ /*VHT SIG*/ ++ ++ //sgi=(u1Byte)(value32&0x01); ++ sgiext = (u1Byte)(value32 & 0x03); ++ //fec = (u1Byte)(value32&0x04); ++ fecext = (u1Byte)(value32 & 0x0C); ++ ++ vMCSS = (u1Byte)(value32 & 0xf0); ++ bf = (u1Byte)((value32 & 0x100) >> 8); ++ vrsv = (u1Byte)((value32 & 0x200) >> 8); ++ vhtcrc8 = (u2Byte)((value32 & 0x3fc00) >> 8); ++ vTail = (u1Byte)((value32 & 0xfc0000) >> 16); ++ } ++ /*rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F30", value32);*/ ++ /*DCMD_Printf(BbDbgBuf);*/ ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x/ %x", " SGI/FEC/MCS/BF/Rsv/CRC/Tail", sgiext, fecext, vMCSS, bf, vrsv, vhtcrc8, vTail); ++ DCMD_Printf(BbDbgBuf); ++ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-B"); ++ DCMD_Printf(BbDbgBuf); ++ value32 = ODM_GetBBReg(pDM_Odm, 0xf34 , bMaskDWord); /*VHT SIG*/ ++ { ++ vLength = (u2Byte)(value32 & 0x1fffff); ++ vbrsv = (u1Byte)((value32 & 0x600000) >> 20); ++ vbTail = (u2Byte)((value32 & 0x1f800000) >> 20); ++ vbcrc = (u1Byte)((value32 & 0x80000000) >> 28); ++ ++ } ++ /*rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F34", value32);*/ ++ /*DCMD_Printf(BbDbgBuf);*/ ++ rsprintf((char *)BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/", " Length/Rsv/Tail/CRC", vLength, vbrsv, vbTail, vbcrc); ++ DCMD_Printf(BbDbgBuf); ++ ++ ++} ++ ++void phydm_sbd_check( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ static u4Byte pkt_cnt = 0; ++ static BOOLEAN sbd_state = 0; ++ u4Byte sym_count, count, value32; ++ ++ if (sbd_state == 0) { ++ pkt_cnt++; ++ if (pkt_cnt % 5 == 0) { /*read SBD conter once every 5 packets*/ ++ ODM_SetTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer, 0); /*ms*/ ++ sbd_state = 1; ++ } ++ } else { /*read counter*/ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xF98, bMaskDWord); ++ sym_count = (value32 & 0x7C000000) >> 26; ++ count = (value32 & 0x3F00000) >> 20; ++ DbgPrint("#SBD# sym_count %d count %d\n", sym_count, count); ++ sbd_state = 0; ++ } ++} ++ ++void phydm_sbd_callback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++#if USE_WORKITEM ++ ODM_ScheduleWorkItem(&pDM_Odm->sbdcnt_workitem); ++#else ++ phydm_sbd_check(pDM_Odm); ++#endif ++} ++ ++void phydm_sbd_workitem_callback( ++ IN PVOID pContext ++) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ phydm_sbd_check(pDM_Odm); ++} ++#endif ++VOID ++phydm_BasicDbgMessage ++( ++ IN PVOID pDM_VOID ++) ++{ ++#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure(pDM_Odm , PHYDM_FALSEALMCNT); ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ u1Byte legacy_table[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54}; ++ u1Byte vht_en = ((pDM_Odm->RxRate) >= ODM_RATEVHTSS1MCS0) ? 1 : 0; ++ ++ if (pDM_Odm->RxRate <= ODM_RATE11M) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[CCK AGC Report] LNA_idx = 0x%x, VGA_idx = 0x%x\n", ++ pDM_Odm->cck_lna_idx, pDM_Odm->cck_vga_idx)); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[OFDM AGC Report] { 0x%x, 0x%x, 0x%x, 0x%x }\n", ++ pDM_Odm->ofdm_agc_idx[0], pDM_Odm->ofdm_agc_idx[1], pDM_Odm->ofdm_agc_idx[2], pDM_Odm->ofdm_agc_idx[3])); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI: { %d, %d, %d, %d }, RxRate: { %s%s%s%s%d%s}\n", ++ (pDM_Odm->RSSI_A == 0xff) ? 0 : pDM_Odm->RSSI_A , ++ (pDM_Odm->RSSI_B == 0xff) ? 0 : pDM_Odm->RSSI_B , ++ (pDM_Odm->RSSI_C == 0xff) ? 0 : pDM_Odm->RSSI_C, ++ (pDM_Odm->RSSI_D == 0xff) ? 0 : pDM_Odm->RSSI_D, ++ ((pDM_Odm->RxRate >= ODM_RATEVHTSS1MCS0) && (pDM_Odm->RxRate <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "", ++ ((pDM_Odm->RxRate >= ODM_RATEVHTSS2MCS0) && (pDM_Odm->RxRate <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "", ++ ((pDM_Odm->RxRate >= ODM_RATEVHTSS3MCS0) && (pDM_Odm->RxRate <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "", ++ (pDM_Odm->RxRate >= ODM_RATEMCS0) ? "MCS " : "", ++ (vht_en) ? ((pDM_Odm->RxRate - ODM_RATEVHTSS1MCS0)%10) : ((pDM_Odm->RxRate >= ODM_RATEMCS0) ? (pDM_Odm->RxRate - ODM_RATEMCS0) : ((pDM_Odm->RxRate <= ODM_RATE54M)?legacy_table[pDM_Odm->RxRate]:0)), ++ (pDM_Odm->RxRate >= ODM_RATEMCS0) ? "" : "M")); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", ++ FalseAlmCnt->Cnt_CCK_CCA, FalseAlmCnt->Cnt_OFDM_CCA, FalseAlmCnt->Cnt_CCA_all)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", ++ FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_all)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[OFDM FA Detail] Parity_Fail = (( %d )), Rate_Illegal = (( %d )), CRC8_fail = (( %d )), Mcs_fail = (( %d )), Fast_Fsync = (( %d )), SB_Search_fail = (( %d ))\n", ++ FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal, FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail, FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked = %d, RSSI_Min = %d, CurrentIGI = 0x%x, bNoisy=%d\n\n", ++ pDM_Odm->bLinked, pDM_Odm->RSSI_Min, pDM_DigTable->CurIGValue, pDM_Odm->NoisyDecision)); ++/* ++ temp_reg = ODM_GetBBReg(pDM_Odm, 0xDD0, bMaskByte0); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xDD0 = 0x%x\n",temp_reg)); ++ ++ temp_reg = ODM_GetBBReg(pDM_Odm, 0xDDc, bMaskByte1); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xDDD = 0x%x\n",temp_reg)); ++ ++ temp_reg = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskByte0); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xC50 = 0x%x\n",temp_reg)); ++ ++ temp_reg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0, 0x3fe0); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RF 0x0[13:5] = 0x%x\n\n",temp_reg)); ++*/ ++ ++#endif ++} ++ ++ ++VOID phydm_BasicProfile( ++ IN PVOID pDM_VOID, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ char *Cut = NULL; ++ char *ICType = NULL; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ u4Byte commit_ver = 0; ++ u4Byte date = 0; ++ char *commit_by = NULL; ++ u4Byte release_ver = 0; ++ ++ PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% Basic Profile %")); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8192C) ++ ICType = "RTL8192C"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8192D) ++ ICType = "RTL8192D"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8723A) ++ ICType = "RTL8723A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ ICType = "RTL8188E"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8812) ++ ICType = "RTL8812A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8821) ++ ICType = "RTL8821A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8192E) ++ ICType = "RTL8192E"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8723B) ++ ICType = "RTL8723B"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ ICType = "RTL8814A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8881A) ++ ICType = "RTL8881A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8821B) ++ ICType = "RTL8821B"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8822B) ++ ICType = "RTL8822B"; ++#if (RTL8703B_SUPPORT == 1) ++ else if (pDM_Odm->SupportICType == ODM_RTL8703B) { ++ ICType = "RTL8703B"; ++ date = RELEASE_DATE_8703B; ++ commit_by = COMMIT_BY_8703B; ++ release_ver = RELEASE_VERSION_8703B; ++ } ++#endif ++ else if (pDM_Odm->SupportICType == ODM_RTL8195A) ++ ICType = "RTL8195A"; ++ else if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ ICType = "RTL8188F"; ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s (MP Chip: %s)\n", "IC Type", ICType, pDM_Odm->bIsMPChip ? "Yes" : "No")); ++ ++ if (pDM_Odm->CutVersion == ODM_CUT_A) ++ Cut = "A"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_B) ++ Cut = "B"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_C) ++ Cut = "C"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_D) ++ Cut = "D"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_E) ++ Cut = "E"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_F) ++ Cut = "F"; ++ else if (pDM_Odm->CutVersion == ODM_CUT_I) ++ Cut = "I"; ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Cut Version", Cut)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d\n", "PHY Parameter Version", ODM_GetHWImgVersion(pDM_Odm))); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d\n", "PHY Parameter Commit date", date)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "PHY Parameter Commit by", commit_by)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d\n", "PHY Parameter Release Version", release_ver)); ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ { ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d (Subversion: %d)\n", "FW Version", Adapter->MgntInfo.FirmwareVersion, Adapter->MgntInfo.FirmwareSubVersion)); ++ } ++#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ { ++ struct rtl8192cd_priv *priv = pDM_Odm->priv; ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d (Subversion: %d)\n", "FW Version", priv->pshare->fw_version, priv->pshare->fw_sub_version)); ++ } ++#else ++ { ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %d (Subversion: %d)\n", "FW Version", pHalData->FirmwareVersion, pHalData->FirmwareSubVersion)); ++ } ++#endif ++ //1 PHY DM Version List ++ PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% PHYDM Version %")); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Adaptivity", ADAPTIVITY_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "DIG", DIG_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Dynamic BB PowerSaving", DYNAMIC_BBPWRSAV_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "CFO Tracking", CFO_TRACKING_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Antenna Diversity", ANTDIV_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Power Tracking", POWRTRACKING_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Dynamic TxPower", DYNAMIC_TXPWR_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "RA Info", RAINFO_VERSION)); ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Antenna Detection", ANTDECT_VERSION)); ++#endif ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Auto Channel Selection", ACS_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "EDCA Turbo", EDCATURBO_VERSION)); ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "Path Diversity", PATHDIV_VERSION)); ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "RxHP", RXHP_VERSION)); ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s: %s\n", "PHY config 8822B", PHY_CONFIG_VERSION_8822B)); ++ ++#endif ++ *_used = used; ++ *_out_len = out_len; ++ ++} ++ ++VOID ++phydm_fw_trace_en_h2c( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN enable, ++ IN u4Byte monitor_mode, ++ IN u4Byte macid ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte H2C_Parameter[3] = {0}; ++ ++ H2C_Parameter[0] = enable; ++ H2C_Parameter[1] = (u1Byte)monitor_mode; ++ H2C_Parameter[2] = (u1Byte)macid; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("---->\n")); ++ if (monitor_mode == 0){ ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[H2C] FW_debug_en: (( %d ))\n", enable)); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n", enable, monitor_mode, macid)); ++ } ++ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_FW_TRACE_EN, 3, H2C_Parameter); ++} ++ ++VOID ++phydm_get_per_path_txagc( ++ IN PVOID pDM_VOID, ++ IN u1Byte path, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte rate_idx; ++ u1Byte txagc; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++#if (RTL8822B_SUPPORT == 1) ++ if ((pDM_Odm->SupportICType & ODM_RTL8822B) && (path <= ODM_RF_PATH_B)) { ++ for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) { ++ if (rate_idx == ODM_RATE1M) ++ PHYDM_SNPRINTF((output + used, out_len - used, " %-35s\n", "CCK====>")); ++ else if (rate_idx == ODM_RATE6M) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "OFDM====>")); ++ else if (rate_idx == ODM_RATEMCS0) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 1ss====>")); ++ else if (rate_idx == ODM_RATEMCS8) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 2ss====>")); ++ else if (rate_idx == ODM_RATEMCS16) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 3ss====>")); ++ else if (rate_idx == ODM_RATEMCS24) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "HT 4ss====>")); ++ else if (rate_idx == ODM_RATEVHTSS1MCS0) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 1ss====>")); ++ else if (rate_idx == ODM_RATEVHTSS2MCS0) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 2ss====>")); ++ else if (rate_idx == ODM_RATEVHTSS3MCS0) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 3ss====>")); ++ else if (rate_idx == ODM_RATEVHTSS4MCS0) ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n %-35s\n", "VHT 4ss====>")); ++ ++ txagc = config_phydm_read_txagc_8822b(pDM_Odm, path, rate_idx); ++ if (config_phydm_read_txagc_check_8822b(txagc)) ++ PHYDM_SNPRINTF((output + used, out_len - used, " 0x%02x ", txagc)); ++ else ++ PHYDM_SNPRINTF((output + used, out_len - used, " 0x%s ", "xx")); ++ } ++ } ++#endif ++} ++ ++ ++VOID ++phydm_get_txagc( ++ IN PVOID pDM_VOID, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++ /* Path-A */ ++ PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "Path-A====================")); ++ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_A, _used, output, _out_len); ++ ++ /* Path-B */ ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "Path-B====================")); ++ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_B, _used, output, _out_len); ++ ++ /* Path-C */ ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "Path-C====================")); ++ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_C, _used, output, _out_len); ++ ++ /* Path-D */ ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "Path-D====================")); ++ phydm_get_per_path_txagc(pDM_Odm, ODM_RF_PATH_D, _used, output, _out_len); ++ ++} ++ ++VOID ++phydm_set_txagc( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) { ++ if (dm_value[0] <= 1) { ++ if (phydm_write_txagc_1byte_8822b(pDM_Odm, dm_value[2], dm_value[0], (u1Byte)dm_value[1])) ++ PHYDM_SNPRINTF((output + used, out_len - used, " %s%d %s%x%s%x\n", "Write path-", dm_value[0], "rate index-0x", dm_value[1], " = 0x", dm_value[2])); ++ else ++ PHYDM_SNPRINTF((output + used, out_len - used, " %s%d %s%x%s\n", "Write path-", (dm_value[0] & 0x1), "rate index-0x", (dm_value[1] & 0x7f), " fail")); ++ } else { ++ PHYDM_SNPRINTF((output + used, out_len - used, " %s%d %s%x%s\n", "Write path-", (dm_value[0] & 0x1), "rate index-0x", (dm_value[1] & 0x7f), " fail")); ++ } ++ } ++#endif ++} ++ ++VOID ++odm_debug_trace( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u8Byte pre_debug_components, one = 1; ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++ pre_debug_components = pDM_Odm->DebugComponents; ++ ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n%s\n", "================================")); ++ if (dm_value[0] == 100) { ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Debug Message] PhyDM Selection")); ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================")); ++ PHYDM_SNPRINTF((output + used, out_len - used, "00. (( %s ))DIG\n", ((pDM_Odm->DebugComponents & ODM_COMP_DIG) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "01. (( %s ))RA_MASK\n", ((pDM_Odm->DebugComponents & ODM_COMP_RA_MASK) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "02. (( %s ))DYNAMIC_TXPWR\n", ((pDM_Odm->DebugComponents & ODM_COMP_DYNAMIC_TXPWR) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "03. (( %s ))FA_CNT\n", ((pDM_Odm->DebugComponents & ODM_COMP_FA_CNT) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "04. (( %s ))RSSI_MONITOR\n", ((pDM_Odm->DebugComponents & ODM_COMP_RSSI_MONITOR) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "05. (( %s ))CCK_PD\n", ((pDM_Odm->DebugComponents & ODM_COMP_CCK_PD) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "06. (( %s ))ANT_DIV\n", ((pDM_Odm->DebugComponents & ODM_COMP_ANT_DIV) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "07. (( %s ))PWR_SAVE\n", ((pDM_Odm->DebugComponents & ODM_COMP_PWR_SAVE) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "08. (( %s ))PWR_TRAIN\n", ((pDM_Odm->DebugComponents & ODM_COMP_PWR_TRAIN) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "09. (( %s ))RATE_ADAPTIVE\n", ((pDM_Odm->DebugComponents & ODM_COMP_RATE_ADAPTIVE) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "10. (( %s ))PATH_DIV\n", ((pDM_Odm->DebugComponents & ODM_COMP_PATH_DIV) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "11. (( %s ))PSD\n", ((pDM_Odm->DebugComponents & ODM_COMP_PSD) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "12. (( %s ))DYNAMIC_PRICCA\n", ((pDM_Odm->DebugComponents & ODM_COMP_DYNAMIC_PRICCA) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "13. (( %s ))RXHP\n", ((pDM_Odm->DebugComponents & ODM_COMP_RXHP) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "14. (( %s ))MP\n", ((pDM_Odm->DebugComponents & ODM_COMP_MP) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "15. (( %s ))CFO_TRACKING\n", ((pDM_Odm->DebugComponents & ODM_COMP_CFO_TRACKING) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "16. (( %s ))ACS\n", ((pDM_Odm->DebugComponents & ODM_COMP_ACS) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "17. (( %s ))ADAPTIVITY\n", ((pDM_Odm->DebugComponents & PHYDM_COMP_ADAPTIVITY) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "18. (( %s ))RA_DBG\n", ((pDM_Odm->DebugComponents & PHYDM_COMP_RA_DBG) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "20. (( %s ))EDCA_TURBO\n", ((pDM_Odm->DebugComponents & ODM_COMP_EDCA_TURBO) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "21. (( %s ))EARLY_MODE\n", ((pDM_Odm->DebugComponents & ODM_COMP_EARLY_MODE) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "22. (( %s ))FW_DEBUG_TRACE\n", ((pDM_Odm->DebugComponents & ODM_FW_DEBUG_TRACE) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "24. (( %s ))TX_PWR_TRACK\n", ((pDM_Odm->DebugComponents & ODM_COMP_TX_PWR_TRACK) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "25. (( %s ))RX_GAIN_TRACK\n", ((pDM_Odm->DebugComponents & ODM_COMP_RX_GAIN_TRACK) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "26. (( %s ))CALIBRATION\n", ((pDM_Odm->DebugComponents & ODM_COMP_CALIBRATION) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "28. (( %s ))PHY_CONFIG\n", ((pDM_Odm->DebugComponents & ODM_PHY_CONFIG) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "29. (( %s ))BEAMFORMING_DEBUG\n", ((pDM_Odm->DebugComponents & BEAMFORMING_DEBUG) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "30. (( %s ))COMMON\n", ((pDM_Odm->DebugComponents & ODM_COMP_COMMON) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "31. (( %s ))INIT\n", ((pDM_Odm->DebugComponents & ODM_COMP_INIT) ? ("V") : (".")))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================")); ++ ++ } else if (dm_value[0] == 101) { ++ pDM_Odm->DebugComponents = 0; ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "Disable all debug components")); ++ } else { ++ if (dm_value[1] == 1) { /*enable*/ ++ pDM_Odm->DebugComponents |= (one << dm_value[0]); ++ ++ if (dm_value[0] == 22) { /*FW trace function*/ ++ phydm_fw_trace_en_h2c(pDM_Odm, 1, dm_value[2], dm_value[3]); /*H2C to enable C2H Msg*/ ++ } ++ } else if (dm_value[1] == 2) { /*disable*/ ++ pDM_Odm->DebugComponents &= ~(one << dm_value[0]); ++ ++ if (dm_value[0] == 22) { /*FW trace function*/ ++ phydm_fw_trace_en_h2c(pDM_Odm, 0, dm_value[2], dm_value[3]); /*H2C to disable C2H Msg*/ ++ } ++ } else ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Warning!!!] 1:enable, 2:disable")); ++ } ++ PHYDM_SNPRINTF((output + used, out_len - used, "pre-DbgComponents = 0x%x\n", (u4Byte)pre_debug_components)); ++ PHYDM_SNPRINTF((output + used, out_len - used, "Curr-DbgComponents = 0x%x\n", ((u4Byte)pDM_Odm->DebugComponents))); ++ PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================")); ++} ++ ++VOID ++phydm_DumpBbReg( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte Addr = 0; ++ ++ /* BB Reg */ ++ for (Addr = 0x800; Addr < 0xfff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8822B|ODM_RTL8814A)) { ++ ++ if (pDM_Odm->RFType > ODM_2T2R) { ++ for (Addr = 0x1800; Addr < 0x18ff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ } ++ ++ if (pDM_Odm->RFType > ODM_3T3R) { ++ for (Addr = 0x1a00; Addr < 0x1aff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ } ++ ++ for (Addr = 0x1900; Addr < 0x19ff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ ++ for (Addr = 0x1c00; Addr < 0x1cff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ ++ for (Addr = 0x1f00; Addr < 0x1fff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ } ++} ++ ++VOID ++phydm_DumpAllReg( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte Addr = 0; ++ ++ /* dump MAC register */ ++ DbgPrint("MAC==========\n"); ++ for (Addr = 0; Addr < 0x7ff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ ++ for (Addr = 1000; Addr < 0x17ff; Addr += 4) ++ DbgPrint("%04x %08x\n", Addr, ODM_GetBBReg(pDM_Odm, Addr, bMaskDWord)); ++ ++ /* dump BB register */ ++ DbgPrint("BB==========\n"); ++ phydm_DumpBbReg(pDM_Odm); ++ ++ /* dump RF register */ ++ DbgPrint("RF-A==========\n"); ++ for (Addr = 0; Addr < 0xFF; Addr++) ++ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, Addr, bRFRegOffsetMask)); ++ ++ if (pDM_Odm->RFType > ODM_1T1R) { ++ DbgPrint("RF-B==========\n"); ++ for (Addr = 0; Addr < 0xFF; Addr++) ++ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, Addr, bRFRegOffsetMask)); ++ } ++ ++ if (pDM_Odm->RFType > ODM_2T2R) { ++ DbgPrint("RF-C==========\n"); ++ for (Addr = 0; Addr < 0xFF; Addr++) ++ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_C, Addr, bRFRegOffsetMask)); ++ } ++ ++ if (pDM_Odm->RFType > ODM_3T3R) { ++ DbgPrint("RF-D==========\n"); ++ for (Addr = 0; Addr < 0xFF; Addr++) ++ DbgPrint("%02x %05x\n", Addr, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_D, Addr, bRFRegOffsetMask)); ++ } ++} ++ ++struct _PHYDM_COMMAND { ++ char name[16]; ++ u1Byte id; ++}; ++ ++enum PHYDM_CMD_ID { ++ PHYDM_DEMO, ++ PHYDM_RA, ++ PHYDM_PROFILE, ++ PHYDM_ANTDIV, ++ PHYDM_PATHDIV, ++ PHYDM_DEBUG, ++ PHYDM_SUPPORT_ABILITY, ++ PHYDM_GET_TXAGC, ++ PHYDM_SET_TXAGC, ++ PHYDM_SMART_ANT, ++ PHYDM_API, ++ PHYDM_TRX_PATH, ++ PHYDM_LA_MODE, ++ PHYDM_DUMP_REG ++}; ++ ++struct _PHYDM_COMMAND phy_dm_ary[] = { ++ {"demo", PHYDM_DEMO}, ++ {"ra", PHYDM_RA}, ++ {"profile", PHYDM_PROFILE}, ++ {"anthdiv", PHYDM_ANTDIV}, ++ {"pathdiv", PHYDM_PATHDIV}, ++ {"dbg", PHYDM_DEBUG}, ++ {"ability", PHYDM_SUPPORT_ABILITY}, ++ {"get_txagc", PHYDM_GET_TXAGC}, ++ {"set_txagc", PHYDM_SET_TXAGC}, ++ {"smtant", PHYDM_SMART_ANT}, ++ {"api", PHYDM_API}, ++ {"trxpath", PHYDM_TRX_PATH}, ++ {"lamode", PHYDM_LA_MODE}, ++ {"dumpreg", PHYDM_DUMP_REG} ++}; ++ ++VOID ++phydm_cmd_parser( ++ IN PDM_ODM_T pDM_Odm, ++ IN char input[][MAX_ARGV], ++ IN u4Byte input_num, ++ IN u1Byte flag, ++ OUT char *output, ++ IN u4Byte out_len ++) ++{ ++ u4Byte used = 0; ++ u1Byte id = 0; ++ int var1[5] = {0}; ++ int i, input_idx = 0; ++ ++ if (flag == 0) { ++ PHYDM_SNPRINTF((output + used, out_len - used, "GET, nothing to print\n")); ++ return; ++ } ++ ++ PHYDM_SNPRINTF((output + used, out_len - used, "\n")); ++ ++ //Parsing Cmd ID ++ if (input_num) { ++ int n, i; ++ ++ n = sizeof(phy_dm_ary) / sizeof(struct _PHYDM_COMMAND); ++ for (i = 0; i < n; i++) { ++ if (strcmp(phy_dm_ary[i].name, input[0]) == 0) { ++ id = phy_dm_ary[i].id; ++ break; ++ } ++ } ++ if (i == n) { ++ PHYDM_SNPRINTF((output + used, out_len - used, "SET, command not found!\n")); ++ return; ++ } ++ } ++ ++ switch (id) { ++ case PHYDM_DEMO: /*echo demo 10 0x3a z abcde >cmd*/ ++ { ++ u4Byte directory = 0; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++ char char_temp; ++#else ++ u4Byte char_temp = ' '; ++#endif ++ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory); ++ PHYDM_SNPRINTF((output + used, out_len - used, "Decimal Value = %d\n", directory)); ++ PHYDM_SSCANF(input[2], DCMD_HEX, &directory); ++ PHYDM_SNPRINTF((output + used, out_len - used, "Hex Value = 0x%x\n", directory)); ++ PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp); ++ PHYDM_SNPRINTF((output + used, out_len - used, "Char = %c\n", char_temp)); ++ PHYDM_SNPRINTF((output + used, out_len - used, "String = %s\n", input[4])); ++ } ++ break; ++ ++ case PHYDM_RA: ++ ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ ++ PHYDM_SNPRINTF((output + used, out_len - used, "new SET, RA_var[%d]= (( %d ))\n", i , var1[i])); ++ input_idx++; ++ } ++ } ++ ++ if (input_idx >= 1) { ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "odm_RA_debug\n"));*/ ++#if (defined(CONFIG_RA_DBG_CMD)) ++ odm_RA_debug((PVOID)pDM_Odm, var1); ++#endif ++ } ++ ++ ++ break; ++ ++ case PHYDM_ANTDIV: ++ ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); ++ ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, PATHDIV_var[%d]= (( %d ))\n", i , var1[i]));*/ ++ input_idx++; ++ } ++ } ++ ++ if (input_idx >= 1) { ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "odm_PATHDIV_debug\n"));*/ ++ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ phydm_antdiv_debug(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); ++ #endif ++ } ++ ++ break; ++ ++ case PHYDM_PATHDIV: ++ ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); ++ ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, PATHDIV_var[%d]= (( %d ))\n", i , var1[i]));*/ ++ input_idx++; ++ } ++ } ++ ++ if (input_idx >= 1) { ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "odm_PATHDIV_debug\n"));*/ ++#if (defined(CONFIG_PATH_DIVERSITY)) ++ odm_pathdiv_debug(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); ++#endif ++ } ++ ++ break; ++ ++ case PHYDM_DEBUG: ++ ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, Debug_var[%d]= (( %d ))\n", i , var1[i]));*/ ++ input_idx++; ++ } ++ } ++ ++ if (input_idx >= 1) { ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "odm_debug_comp\n"));*/ ++ odm_debug_trace(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); ++ } ++ ++ ++ break; ++ ++ case PHYDM_SUPPORT_ABILITY: ++ ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, support ablity_var[%d]= (( %d ))\n", i , var1[i]));*/ ++ input_idx++; ++ } ++ } ++ ++ if (input_idx >= 1) { ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "support ablity\n"));*/ ++ phydm_support_ablity_debug(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); ++ } ++ ++ break; ++ ++ case PHYDM_SMART_ANT: ++ ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); ++ input_idx++; ++ } ++ } ++ ++ if (input_idx >= 1) { ++ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 ++ phydm_hl_smart_ant_cmd(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); ++ #endif ++ #endif ++ } ++ ++ break; ++ ++ case PHYDM_API: ++#if (RTL8822B_SUPPORT == 1) ++ { ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) { ++ BOOLEAN bEnableDbgMode; ++ u1Byte central_ch, primary_ch_idx, bandwidth; ++ ++ for (i = 0; i < 4; i++) { ++ if (input[i + 1]) ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ } ++ ++ bEnableDbgMode = (BOOLEAN)var1[0]; ++ central_ch = (u1Byte) var1[1]; ++ primary_ch_idx = (u1Byte) var1[2]; ++ bandwidth = (ODM_BW_E) var1[3]; ++ ++ if (bEnableDbgMode) { ++ pDM_Odm->bDisablePhyApi = FALSE; ++ config_phydm_switch_channel_bw_8822b(pDM_Odm, central_ch, primary_ch_idx, bandwidth); ++ pDM_Odm->bDisablePhyApi = TRUE; ++ PHYDM_SNPRINTF((output+used, out_len-used, "central_ch = %d, primary_ch_idx = %d, bandwidth = %d\n", central_ch, primary_ch_idx, bandwidth)); ++ } else { ++ pDM_Odm->bDisablePhyApi = FALSE; ++ PHYDM_SNPRINTF((output+used, out_len-used, "Disable API debug mode\n")); ++ } ++ } else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); ++ } ++#else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); ++#endif ++ break; ++ ++ case PHYDM_PROFILE: /*echo profile, >cmd*/ ++ phydm_BasicProfile(pDM_Odm, &used, output, &out_len); ++ break; ++ ++ case PHYDM_GET_TXAGC: ++ phydm_get_txagc(pDM_Odm, &used, output, &out_len); ++ break; ++ ++ case PHYDM_SET_TXAGC: ++ for (i = 0; i < 5; i++) { ++ if (input[i + 1]) { ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ ++ /*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, support ablity_var[%d]= (( %d ))\n", i , var1[i]));*/ ++ input_idx++; ++ } ++ } ++ ++ phydm_set_txagc(pDM_Odm, (u4Byte *)var1, &used, output, &out_len); ++ break; ++ ++ case PHYDM_TRX_PATH: ++#if (RTL8822B_SUPPORT == 1) ++ { ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) { ++ u1Byte TxPath, RxPath; ++ BOOLEAN bEnableDbgMode, bTx2Path; ++ ++ for (i = 0; i < 4; i++) { ++ if (input[i + 1]) ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ } ++ ++ bEnableDbgMode = (BOOLEAN)var1[0]; ++ TxPath = (u1Byte) var1[1]; ++ RxPath = (u1Byte) var1[2]; ++ bTx2Path = (BOOLEAN) var1[3]; ++ ++ if (bEnableDbgMode) { ++ pDM_Odm->bDisablePhyApi = FALSE; ++ config_phydm_trx_mode_8822b(pDM_Odm, TxPath, RxPath, bTx2Path); ++ pDM_Odm->bDisablePhyApi = TRUE; ++ PHYDM_SNPRINTF((output+used, out_len-used, "TxPath = 0x%x, RxPath = 0x%x, bTx2Path = %d\n", TxPath, RxPath, bTx2Path)); ++ } else { ++ pDM_Odm->bDisablePhyApi = FALSE; ++ PHYDM_SNPRINTF((output+used, out_len-used, "Disable API debug mode\n")); ++ } ++ } else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); ++ } ++#else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support PHYDM API function\n")); ++#endif ++ break; ++ ++ case PHYDM_LA_MODE: ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if ((RTL8822B_SUPPORT == 1) || (RTL8814A_SUPPORT == 1)) ++ { ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B)) { ++ u2Byte PollingTime; ++ u1Byte TrigSel, TrigSigSel, DmaDataSigSel, TriggerTime; ++ BOOLEAN bEnableLaMode; ++ ++ for (i = 0; i < 6; i++) { ++ if (input[i + 1]) ++ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); ++ } ++ ++ bEnableLaMode = (BOOLEAN)var1[0]; ++ if (bEnableLaMode) { ++ TrigSel = (u1Byte)var1[1]; ++ TrigSigSel = (u1Byte)var1[2]; ++ DmaDataSigSel = (u1Byte)var1[3]; ++ TriggerTime = (u1Byte)var1[4]; ++ PollingTime = (((u1Byte)var1[5]) << 6); ++ ++ ADCSmp_Set(pDM_Odm->Adapter, TrigSel, TrigSigSel, DmaDataSigSel, TriggerTime, PollingTime); ++ PHYDM_SNPRINTF((output+used, out_len-used, "TrigSel = %d, TrigSigSel = %d, DmaDataSigSel = %d\n", TrigSel, TrigSigSel, DmaDataSigSel)); ++ PHYDM_SNPRINTF((output+used, out_len-used, "TriggerTime = %d, PollingTime = %d\n", TriggerTime, PollingTime)); ++ } else { ++ ADCSmp_Stop(pDM_Odm->Adapter); ++ PHYDM_SNPRINTF((output+used, out_len-used, "Disable LA mode\n")); ++ } ++ } else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support LA mode\n")); ++ } ++#else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support LA mode\n")); ++#endif ++#else ++ PHYDM_SNPRINTF((output+used, out_len-used, "This IC doesn't support LA mode\n")); ++#endif ++ break; ++ ++ case PHYDM_DUMP_REG: ++ { ++ u1Byte type = 0; ++ ++ if (input[1]) { ++ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); ++ type = (u1Byte)var1[0]; ++ } ++ ++ if (type == 0) ++ phydm_DumpBbReg(pDM_Odm); ++ else if (type == 1) ++ phydm_DumpAllReg(pDM_Odm); ++ } ++ break; ++ default: ++ PHYDM_SNPRINTF((output + used, out_len - used, "SET, unknown command!\n")); ++ break; ++ ++ } ++} ++ ++#ifdef __ECOS ++char *strsep(char **s, const char *ct) ++{ ++ char *sbegin = *s; ++ char *end; ++ ++ if (sbegin == NULL) ++ return NULL; ++ ++ end = strpbrk(sbegin, ct); ++ if (end) ++ *end++ = '\0'; ++ *s = end; ++ return sbegin; ++} ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++s4Byte ++phydm_cmd( ++ IN PDM_ODM_T pDM_Odm, ++ IN char *input, ++ IN u4Byte in_len, ++ IN u1Byte flag, ++ OUT char *output, ++ IN u4Byte out_len ++) ++{ ++ char *token; ++ u4Byte Argc = 0; ++ char Argv[MAX_ARGC][MAX_ARGV]; ++ ++ do { ++ token = strsep(&input, ", "); ++ if (token) { ++ strcpy(Argv[Argc], token); ++ Argc++; ++ } else ++ break; ++ } while (Argc < MAX_ARGC); ++ ++ if (Argc == 1) ++ Argv[0][strlen(Argv[0]) - 1] = '\0'; ++ ++ phydm_cmd_parser(pDM_Odm, Argv, Argc, flag, output, out_len); ++ ++ return 0; ++} ++#endif ++ ++ ++VOID ++phydm_fw_trace_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ /*u1Byte debug_trace_11byte[60];*/ ++ u1Byte freg_num, c2h_seq, buf_0 = 0; ++ ++ if (CmdLen > 12) ++ return; ++ ++ buf_0 = CmdBuf[0]; ++ freg_num = (buf_0 & 0xf); ++ c2h_seq = (buf_0 & 0xf0) >> 4; ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] freg_num = (( %d )), c2h_seq = (( %d ))\n", freg_num,c2h_seq ));*/ ++ ++ /*strncpy(debug_trace_11byte,&CmdBuf[1],(CmdLen-1));*/ ++ /*debug_trace_11byte[CmdLen-1] = '\0';*/ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] %s\n", debug_trace_11byte));*/ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] CmdLen = (( %d ))\n", CmdLen));*/ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW debug message] c2h_cmd_start = (( %d ))\n", pDM_Odm->c2h_cmd_start));*/ ++ ++ ++ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("pre_seq = (( %d )), current_seq = (( %d ))\n", pDM_Odm->pre_c2h_seq, c2h_seq));*/ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("fw_buff_is_enpty = (( %d ))\n", pDM_Odm->fw_buff_is_enpty));*/ ++ ++ if ((c2h_seq != pDM_Odm->pre_c2h_seq) && pDM_Odm->fw_buff_is_enpty == FALSE) { ++ pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start] = '\0'; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW Dbg Queue Overflow] %s\n", pDM_Odm->fw_debug_trace)); ++ pDM_Odm->c2h_cmd_start = 0; ++ } ++ ++ if ((CmdLen - 1) > (60 - pDM_Odm->c2h_cmd_start)) { ++ pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start] = '\0'; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW Dbg Queue error: wrong C2H length] %s\n", pDM_Odm->fw_debug_trace)); ++ pDM_Odm->c2h_cmd_start = 0; ++ return; ++ } ++ ++ strncpy((char *)&(pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start]), (char *)&CmdBuf[1], (CmdLen-1)); ++ pDM_Odm->c2h_cmd_start += (CmdLen - 1); ++ pDM_Odm->fw_buff_is_enpty = FALSE; ++ ++ if (freg_num == 0 || pDM_Odm->c2h_cmd_start >= 60) { ++ if (pDM_Odm->c2h_cmd_start < 60) ++ pDM_Odm->fw_debug_trace[pDM_Odm->c2h_cmd_start] = '\0'; ++ else ++ pDM_Odm->fw_debug_trace[59] = '\0'; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s\n", pDM_Odm->fw_debug_trace)); ++ /*DbgPrint("[FW DBG Msg] %s\n", pDM_Odm->fw_debug_trace);*/ ++ pDM_Odm->c2h_cmd_start = 0; ++ pDM_Odm->fw_buff_is_enpty = TRUE; ++ } ++ ++ pDM_Odm->pre_c2h_seq = c2h_seq; ++} ++ ++VOID ++phydm_fw_trace_handler_code( ++ IN PVOID pDM_VOID, ++ IN pu1Byte Buffer, ++ IN u1Byte CmdLen ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte function = Buffer[0]; ++ u1Byte dbg_num = Buffer[1]; ++ u2Byte content_0 = (((u2Byte)Buffer[3])<<8)|((u2Byte)Buffer[2]); ++ u2Byte content_1 = (((u2Byte)Buffer[5])<<8)|((u2Byte)Buffer[4]); ++ u2Byte content_2 = (((u2Byte)Buffer[7])<<8)|((u2Byte)Buffer[6]); ++ u2Byte content_3 = (((u2Byte)Buffer[9])<<8)|((u2Byte)Buffer[8]); ++ u2Byte content_4 = (((u2Byte)Buffer[11])<<8)|((u2Byte)Buffer[10]); ++ ++ if(CmdLen >12) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW Msg] Invalid cmd length (( %d )) >12 \n", CmdLen)); ++ } ++ ++ //ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW Msg] Func=((%d)), num=((%d)), ct_0=((%d)), ct_1=((%d)), ct_2=((%d)), ct_3=((%d)), ct_4=((%d))\n", ++ // function, dbg_num, content_0, content_1, content_2, content_3, content_4)); ++ ++ /*--------------------------------------------*/ ++ if(function == RATE_DECISION) { ++ if(dbg_num == 0) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] RA_CNT=((%d)) Max_device=((%d))--------------------------->\n", content_1, content_2)); ++ } else if(content_0 == 2) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)), try_bit=((0x%x))\n", content_1, content_2, content_3, content_4)); ++ } else if(content_0 == 3) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Check RA total=((%d)), drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n", content_1, content_2, content_3, content_4)); ++ } ++ } else if(dbg_num == 1) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] RTY[0,1,2,3]=[ %d, %d, %d, %d ] \n", content_1, content_2, content_3, content_4)); ++ } else if(content_0 == 2) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] RTY[4]=[ %d ], drop=((%d)), total=((%d)), current_rate=((0x%x))\n", content_1, content_2, content_3, content_4)); ++ } else if(content_0 == 3) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] penality_idx=((%d ))\n", content_1)); ++ } ++ } ++ ++ else if(dbg_num == 3) { ++ if (content_0 == 1) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( DOWN )) total=((%d)), total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4)); ++ else if (content_0 == 2) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( UP )) total_acc=((%d)), total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4)); ++ else if (content_0 == 3) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( UP )) ((Rate Down Hold)) RA_CNT=((%d))\n", content_1)); ++ else if (content_0 == 4) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( UP )) ((tota_accl<5 skip)) RA_CNT=((%d))\n", content_1)); ++ else if (content_0 == 8) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDecisoin] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n", content_1)); ++ } ++ ++ else if(dbg_num == 5) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] (( UP)) Nsc=((%d)), N_High=((%d))\n", content_1, content_2)); ++ } else if(content_0 == 2) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((DOWN)) Nsc=((%d)), N_Low=((%d))\n", content_1, content_2)); ++ } else if(content_0 == 3) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((HOLD)) Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n", content_1, content_2, content_3, content_4)); ++ } ++ } ++ else if(dbg_num == 0x60) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((AP RPT)) macid=((%d)), BUPDATE[macid]=((%d))\n", content_1, content_2)); ++ } else if(content_0 == 4) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((AP RPT)) pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n", content_1, content_2, content_3, content_4)); ++ } else if(content_0 == 5) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("[FW][RateDecisoin] ((AP RPT)) PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n", content_1, content_2, content_3, content_4)); ++ } ++ } ++ else if(dbg_num == 0xff) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE,ODM_DBG_LOUD,("\n\n")); ++ } ++ } ++ ++ } ++ /*--------------------------------------------*/ ++ else if (function == INIT_RA_TABLE){ ++ if(dbg_num == 3) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n", content_0)); ++ } ++ ++ } ++ /*--------------------------------------------*/ ++ else if (function == RATE_UP) { ++ if(dbg_num == 2) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateUp] ((Highest rate -> return)), macid=((%d)) Nsc=((%d))\n", content_1, content_2)); ++ } ++ } else if(dbg_num == 5) { ++ if (content_0 == 0) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateUp] ((Rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)), SGI=((%d))\n", content_1, content_2, content_3, content_4)); ++ else if (content_0 == 1) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateUp] ((Rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n", content_1, content_2, content_3, content_4)); ++ } ++ ++ } ++ /*--------------------------------------------*/ ++ else if (function == RATE_DOWN) { ++ if(dbg_num == 5) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][RateDownStep] ((Rate Down)), macid=((%d)), rate=((0x%x)), BW=((%d))\n", content_1, content_2, content_3)); ++ } ++ } ++ } else if (function == TRY_DONE) { ++ if (dbg_num == 1) { ++ if (content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][Try Done] ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n", content_1, content_2)); ++ /**/ ++ } ++ } else if (dbg_num == 2) { ++ if (content_0 == 1) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][Try Done] ((try fail )) macid=((%d)), Try_Done_cnt=((%d)), multi_try_rate=((%d))\n", content_1, content_2, content_3)); ++ } ++ } ++ /*--------------------------------------------*/ ++ else if (function == F_RATE_AP_RPT) { ++ if(dbg_num == 1) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] ((1)), SPE_STATIS=((0x%x))---------->\n", content_3)); ++ } ++ } else if(dbg_num == 2) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] RTY_all=((%d))\n", content_1)); ++ } ++ } else if(dbg_num == 3) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID1[%d], TOTAL=((%d)), RTY=((%d))\n", content_3, content_1, content_2)); ++ } ++ } else if(dbg_num == 4) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID2[%d], TOTAL=((%d)), RTY=((%d))\n", content_3, content_1, content_2)); ++ } ++ } else if(dbg_num == 5) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID1[%d], PASS=((%d)), DROP=((%d))\n", content_3, content_1, content_2)); ++ } ++ } else if(dbg_num == 6) { ++ if(content_0 == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][AP RPT] MACID2[%d],, PASS=((%d)), DROP=((%d))\n", content_3, content_1, content_2)); ++ } ++ } ++ } ++ /*--------------------------------------------*/ ++ ++ ++} ++ ++VOID ++phydm_fw_trace_handler_8051( ++ IN PVOID pDM_VOID, ++ IN pu1Byte Buffer, ++ IN u1Byte CmdLen ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if 0 ++ if (CmdLen >= 3) ++ CmdBuf[CmdLen - 1] = '\0'; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s\n", &(CmdBuf[3]))); ++#else ++ ++ int i = 0; ++ u1Byte Extend_c2hSubID = 0, Extend_c2hDbgLen = 0, Extend_c2hDbgSeq = 0; ++ u1Byte fw_debug_trace[128]; ++ pu1Byte Extend_c2hDbgContent = 0; ++ ++ if (CmdLen > 127) ++ return; ++ ++ Extend_c2hSubID = Buffer[0]; ++ Extend_c2hDbgLen = Buffer[1]; ++ Extend_c2hDbgContent = Buffer + 2; /*DbgSeq+DbgContent for show HEX*/ ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, Extend_c2hDbgLen=%d\n", ++ Extend_c2hSubID, Extend_c2hDbgLen)); ++ ++ RT_DISP_DATA(FC2H, C2H_Summary, "[Extend C2H packet], Content Hex:", Extend_c2hDbgContent, CmdLen-2); ++ #endif ++ ++GoBackforAggreDbgPkt: ++ i = 0; ++ Extend_c2hDbgSeq = Buffer[2]; ++ Extend_c2hDbgContent = Buffer + 3; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", Extend_c2hDbgSeq)); ++ #endif ++ ++ for (; ; i++) { ++ fw_debug_trace[i] = Extend_c2hDbgContent[i]; ++ if (Extend_c2hDbgContent[i + 1] == '\0') { ++ fw_debug_trace[i + 1] = '\0'; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s", &(fw_debug_trace[0]))); ++ break; ++ } else if (Extend_c2hDbgContent[i] == '\n') { ++ fw_debug_trace[i + 1] = '\0'; ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s", &(fw_debug_trace[0]))); ++ Buffer = Extend_c2hDbgContent + i + 3; ++ goto GoBackforAggreDbgPkt; ++ } ++ } ++ ++ ++#endif ++} ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_debug.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_debug.h +new file mode 100644 +index 0000000..60e84e4 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_debug.h +@@ -0,0 +1,330 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __ODM_DBG_H__ ++#define __ODM_DBG_H__ ++ ++#define DEBUG_VERSION "1.0" /*2015.01.13 Dino*/ ++//----------------------------------------------------------------------------- ++// Define the debug levels ++// ++// 1. DBG_TRACE and DBG_LOUD are used for normal cases. ++// So that, they can help SW engineer to develope or trace states changed ++// and also help HW enginner to trace every operation to and from HW, ++// e.g IO, Tx, Rx. ++// ++// 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, ++// which help us to debug SW or HW. ++// ++//----------------------------------------------------------------------------- ++// ++// Never used in a call to ODM_RT_TRACE()! ++// ++#define ODM_DBG_OFF 1 ++ ++// ++// Fatal bug. ++// For example, Tx/Rx/IO locked up, OS hangs, memory access violation, ++// resource allocation failed, unexpected HW behavior, HW BUG and so on. ++// ++#define ODM_DBG_SERIOUS 2 ++ ++// ++// Abnormal, rare, or unexpeted cases. ++// For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. ++// ++#define ODM_DBG_WARNING 3 ++ ++// ++// Normal case with useful information about current SW or HW state. ++// For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status, ++// SW protocol state change, dynamic mechanism state change and so on. ++// ++#define ODM_DBG_LOUD 4 ++ ++// ++// Normal case with detail execution flow or information. ++// ++#define ODM_DBG_TRACE 5 ++ ++/*FW DBG MSG*/ ++#define RATE_DECISION BIT0 ++#define INIT_RA_TABLE BIT1 ++#define RATE_UP BIT2 ++#define RATE_DOWN BIT3 ++#define TRY_DONE BIT4 ++#define F_RATE_AP_RPT BIT7 ++ ++//----------------------------------------------------------------------------- ++// Define the tracing components ++// ++//----------------------------------------------------------------------------- ++//BB Functions ++#define ODM_COMP_DIG BIT0 ++#define ODM_COMP_RA_MASK BIT1 ++#define ODM_COMP_DYNAMIC_TXPWR BIT2 ++#define ODM_COMP_FA_CNT BIT3 ++#define ODM_COMP_RSSI_MONITOR BIT4 ++#define ODM_COMP_CCK_PD BIT5 ++#define ODM_COMP_ANT_DIV BIT6 ++#define ODM_COMP_PWR_SAVE BIT7 ++#define ODM_COMP_PWR_TRAIN BIT8 ++#define ODM_COMP_RATE_ADAPTIVE BIT9 ++#define ODM_COMP_PATH_DIV BIT10 ++#define ODM_COMP_PSD BIT11 ++#define ODM_COMP_DYNAMIC_PRICCA BIT12 ++#define ODM_COMP_RXHP BIT13 ++#define ODM_COMP_MP BIT14 ++#define ODM_COMP_CFO_TRACKING BIT15 ++#define ODM_COMP_ACS BIT16 ++#define PHYDM_COMP_ADAPTIVITY BIT17 ++#define PHYDM_COMP_RA_DBG BIT18 ++#define PHYDM_COMP_TXBF BIT19 ++//MAC Functions ++#define ODM_COMP_EDCA_TURBO BIT20 ++#define ODM_COMP_EARLY_MODE BIT21 ++#define ODM_FW_DEBUG_TRACE BIT22 ++//RF Functions ++#define ODM_COMP_TX_PWR_TRACK BIT24 ++#define ODM_COMP_RX_GAIN_TRACK BIT25 ++#define ODM_COMP_CALIBRATION BIT26 ++//Common Functions ++#define ODM_PHY_CONFIG BIT28 ++#define BEAMFORMING_DEBUG BIT29 ++#define ODM_COMP_COMMON BIT30 ++#define ODM_COMP_INIT BIT31 ++#define ODM_COMP_NOISY_DETECT BIT32 ++ ++/*------------------------Export Marco Definition---------------------------*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #define RT_PRINTK DbgPrint ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #define DbgPrint printk ++ #define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args); ++ #define RT_DISP(dbgtype, dbgflag, printstr) ++#else ++ #define DbgPrint panic_printk ++ #define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args); ++#endif ++ ++#ifndef ASSERT ++ #define ASSERT(expr) ++#endif ++ ++#if DBG ++#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \ ++ do { \ ++ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel || level == ODM_DBG_SERIOUS)) \ ++ { \ ++ if(pDM_Odm->SupportICType == ODM_RTL8192C) \ ++ DbgPrint("[ODM-92C] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8192D) \ ++ DbgPrint("[ODM-92D] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8723A) \ ++ DbgPrint("[ODM-8723A] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8188E) \ ++ DbgPrint("[ODM-8188E] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8192E) \ ++ DbgPrint("[ODM-8192E] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8812) \ ++ DbgPrint("[ODM-8812] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8821) \ ++ DbgPrint("[ODM-8821] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8814A) \ ++ DbgPrint("[ODM-8814] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8703B) \ ++ DbgPrint("[ODM-8703B] "); \ ++ else if(pDM_Odm->SupportICType == ODM_RTL8822B) \ ++ DbgPrint("[ODM-8822] "); \ ++ else if (pDM_Odm->SupportICType == ODM_RTL8188F) \ ++ DbgPrint("[ODM-8188F] "); \ ++ RT_PRINTK fmt; \ ++ } \ ++ } while (0) ++ ++#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \ ++ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \ ++ { \ ++ RT_PRINTK fmt; \ ++ } ++ ++#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \ ++ if(!(expr)) { \ ++ DbgPrint( "Assertion failed! %s at ......\n", #expr); \ ++ DbgPrint( " ......%s,%s,line=%d\n",__FILE__,__FUNCTION__,__LINE__); \ ++ RT_PRINTK fmt; \ ++ ASSERT(FALSE); \ ++ } ++#define ODM_dbg_enter() { DbgPrint("==> %s\n", __FUNCTION__); } ++#define ODM_dbg_exit() { DbgPrint("<== %s\n", __FUNCTION__); } ++#define ODM_dbg_trace(str) { DbgPrint("%s:%s\n", __FUNCTION__, str); } ++ ++#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \ ++ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \ ++ { \ ++ int __i; \ ++ pu1Byte __ptr = (pu1Byte)ptr; \ ++ DbgPrint("[ODM] "); \ ++ DbgPrint(title_str); \ ++ DbgPrint(" "); \ ++ for( __i=0; __i<6; __i++ ) \ ++ DbgPrint("%02X%s", __ptr[__i], (__i==5)?"":"-"); \ ++ DbgPrint("\n"); \ ++ } ++#else ++#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) ++#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) ++#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) ++#define ODM_dbg_enter() ++#define ODM_dbg_exit() ++#define ODM_dbg_trace(str) ++#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) ++#endif ++ ++ ++VOID ++PHYDM_InitDebugSetting(IN PDM_ODM_T pDM_Odm); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID phydm_BB_RxHang_Info(IN PDM_ODM_T pDM_Odm); ++#endif ++ ++#define BB_TMP_BUF_SIZE 100 ++VOID phydm_BB_Debug_Info(IN PDM_ODM_T pDM_Odm); ++VOID phydm_BasicDbgMessage( IN PVOID pDM_VOID); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#define PHYDM_DBGPRINT 0 ++#define PHYDM_SSCANF(x, y, z) DCMD_Scanf(x, y, z) ++#if (PHYDM_DBGPRINT == 1) ++#define PHYDM_SNPRINTF(msg) \ ++ do {\ ++ rsprintf msg;\ ++ DbgPrint(output);\ ++ } while (0) ++#else ++#define PHYDM_SNPRINTF(msg) \ ++ do {\ ++ rsprintf msg;\ ++ DCMD_Printf(output);\ ++ } while (0) ++#endif ++#else ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#define PHYDM_DBGPRINT 0 ++#else ++#define PHYDM_DBGPRINT 1 ++#endif ++#define MAX_ARGC 20 ++#define MAX_ARGV 16 ++#define DCMD_DECIMAL "%d" ++#define DCMD_CHAR "%c" ++#define DCMD_HEX "%x" ++ ++#define PHYDM_SSCANF(x, y, z) sscanf(x, y, z) ++#if (PHYDM_DBGPRINT == 1) ++#define PHYDM_SNPRINTF(msg)\ ++ do {\ ++ snprintf msg;\ ++ DbgPrint(output);\ ++ } while (0) ++#else ++#define PHYDM_SNPRINTF(msg)\ ++ do {\ ++ if(out_len > used)\ ++ used+=snprintf msg;\ ++ } while (0) ++#endif ++#endif ++ ++ ++VOID phydm_BasicProfile( ++ IN PVOID pDM_VOID, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ); ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++s4Byte ++phydm_cmd( ++ IN PDM_ODM_T pDM_Odm, ++ IN char *input, ++ IN u4Byte in_len, ++ IN u1Byte flag, ++ OUT char *output, ++ IN u4Byte out_len ++); ++#endif ++VOID ++phydm_cmd_parser( ++ IN PDM_ODM_T pDM_Odm, ++ IN char input[][16], ++ IN u4Byte input_num, ++ IN u1Byte flag, ++ OUT char *output, ++ IN u4Byte out_len ++); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++void phydm_sbd_check( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++void phydm_sbd_callback( ++ PRT_TIMER pTimer ++ ); ++ ++void phydm_sbd_workitem_callback( ++ IN PVOID pContext ++ ); ++#endif ++ ++VOID ++phydm_fw_trace_en_h2c( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN enable, ++ IN u4Byte monitor_mode, ++ IN u4Byte macid ++); ++ ++VOID ++phydm_fw_trace_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++); ++ ++VOID ++phydm_fw_trace_handler_code( ++ IN PVOID pDM_VOID, ++ IN pu1Byte Buffer, ++ IN u1Byte CmdLen ++); ++ ++VOID ++phydm_fw_trace_handler_8051( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++); ++ ++#endif // __ODM_DBG_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dig.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dig.c +new file mode 100644 +index 0000000..fbca415 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dig.c +@@ -0,0 +1,2086 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++ ++VOID ++ODM_ChangeDynamicInitGainThresh( ++ IN PVOID pDM_VOID, ++ IN u4Byte DM_Type, ++ IN u4Byte DM_Value ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ if (DM_Type == DIG_TYPE_THRESH_HIGH) ++ { ++ pDM_DigTable->RssiHighThresh = DM_Value; ++ } ++ else if (DM_Type == DIG_TYPE_THRESH_LOW) ++ { ++ pDM_DigTable->RssiLowThresh = DM_Value; ++ } ++ else if (DM_Type == DIG_TYPE_ENABLE) ++ { ++ pDM_DigTable->Dig_Enable_Flag = TRUE; ++ } ++ else if (DM_Type == DIG_TYPE_DISABLE) ++ { ++ pDM_DigTable->Dig_Enable_Flag = FALSE; ++ } ++ else if (DM_Type == DIG_TYPE_BACKOFF) ++ { ++ if(DM_Value > 30) ++ DM_Value = 30; ++ pDM_DigTable->BackoffVal = (u1Byte)DM_Value; ++ } ++ else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) ++ { ++ if(DM_Value == 0) ++ DM_Value = 0x1; ++ pDM_DigTable->rx_gain_range_min = (u1Byte)DM_Value; ++ } ++ else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) ++ { ++ if(DM_Value > 0x50) ++ DM_Value = 0x50; ++ pDM_DigTable->rx_gain_range_max = (u1Byte)DM_Value; ++ } ++} // DM_ChangeDynamicInitGainThresh // ++ ++int ++getIGIForDiff(int value_IGI) ++{ ++ #define ONERCCA_LOW_TH 0x30 ++ #define ONERCCA_LOW_DIFF 8 ++ ++ if (value_IGI < ONERCCA_LOW_TH) { ++ if ((ONERCCA_LOW_TH - value_IGI) < ONERCCA_LOW_DIFF) ++ return ONERCCA_LOW_TH; ++ else ++ return value_IGI + ONERCCA_LOW_DIFF; ++ } else { ++ return value_IGI; ++ } ++} ++ ++VOID ++odm_FAThresholdCheck( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN bDFSBand, ++ IN BOOLEAN bPerformance, ++ IN u4Byte RxTp, ++ IN u4Byte TxTp, ++ OUT u4Byte* dm_FA_thres ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if(pDM_Odm->bLinked && (bPerformance||bDFSBand)) ++ { ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ // 8192D special case ++ dm_FA_thres[0] = DM_DIG_FA_TH0_92D; ++ dm_FA_thres[1] = DM_DIG_FA_TH1_92D; ++ dm_FA_thres[2] = DM_DIG_FA_TH2_92D; ++ } ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) ++ { ++ // For AP ++ if((RxTp>>2) > TxTp && RxTp < 10000 && RxTp > 500) // 10Mbps & 0.5Mbps ++ { ++ dm_FA_thres[0] = 0x080; ++ dm_FA_thres[1] = 0x100; ++ dm_FA_thres[2] = 0x200; ++ } ++ else ++ { ++ dm_FA_thres[0] = 0x100; ++ dm_FA_thres[1] = 0x200; ++ dm_FA_thres[2] = 0x300; ++ } ++ } ++#else ++ else if(pDM_Odm->SupportICType == ODM_RTL8723A && pDM_Odm->bBtLimitedDig) ++ { ++ // 8723A BT special case ++ dm_FA_thres[0] = DM_DIG_FA_TH0; ++ dm_FA_thres[1] = 0x250; ++ dm_FA_thres[2] = 0x300; ++ } ++#endif ++ else ++ { ++ // For NIC ++ dm_FA_thres[0] = DM_DIG_FA_TH0; ++ dm_FA_thres[1] = DM_DIG_FA_TH1; ++ dm_FA_thres[2] = DM_DIG_FA_TH2; ++ } ++ } ++ else ++ { ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ if(bDFSBand) ++ { ++ // For DFS band and no link ++ dm_FA_thres[0] = 250; ++ dm_FA_thres[1] = 1000; ++ dm_FA_thres[2] = 2000; ++ } ++ else ++#endif ++ { ++ dm_FA_thres[0] = 2000; ++ dm_FA_thres[1] = 4000; ++ dm_FA_thres[2] = 5000; ++ } ++ } ++ return; ++} ++ ++u1Byte ++odm_ForbiddenIGICheck( ++ IN PVOID pDM_VOID, ++ IN u1Byte DIG_Dynamic_MIN, ++ IN u1Byte CurrentIGI ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ u1Byte rx_gain_range_min = pDM_DigTable->rx_gain_range_min; ++ ++ if(pFalseAlmCnt->Cnt_all > 10000) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case. \n")); ++ ++ if(pDM_DigTable->LargeFAHit != 3) ++ pDM_DigTable->LargeFAHit++; ++ ++ if(pDM_DigTable->ForbiddenIGI < CurrentIGI)//if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue) ++ { ++ pDM_DigTable->ForbiddenIGI = CurrentIGI;//pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue; ++ pDM_DigTable->LargeFAHit = 1; ++ } ++ ++ if(pDM_DigTable->LargeFAHit >= 3) ++ { ++ if((pDM_DigTable->ForbiddenIGI + 2) > pDM_DigTable->rx_gain_range_max) ++ rx_gain_range_min = pDM_DigTable->rx_gain_range_max; ++ else ++ rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); ++ pDM_DigTable->Recover_cnt = 1800; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt)); ++ } ++ } ++ else ++ { ++ if(pDM_DigTable->Recover_cnt != 0) ++ { ++ pDM_DigTable->Recover_cnt --; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt)); ++ } ++ else ++ { ++ if(pDM_DigTable->LargeFAHit < 3) ++ { ++ if((pDM_DigTable->ForbiddenIGI - 2) < DIG_Dynamic_MIN) //DM_DIG_MIN) ++ { ++ pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN; ++ rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); ++ } ++ else ++ { ++ pDM_DigTable->ForbiddenIGI -= 2; ++ rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); ++ } ++ } ++ else ++ { ++ pDM_DigTable->LargeFAHit = 0; ++ } ++ } ++ } ++ ++ return rx_gain_range_min; ++ ++} ++ ++VOID ++odm_InbandNoiseCalculate ( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ u1Byte IGIBackup, TimeCnt = 0, ValidCnt = 0; ++ BOOLEAN bTimeout = TRUE; ++ s1Byte sNoise_A, sNoise_B; ++ s4Byte NoiseRpt_A = 0,NoiseRpt_B = 0; ++ u4Byte tmp = 0; ++ static u1Byte failCnt = 0; ++ ++ if(!(pDM_Odm->SupportICType & (ODM_RTL8192E))) ++ return; ++ ++ if(pDM_Odm->RFType == ODM_1T1R || *(pDM_Odm->pOnePathCCA) != ODM_CCA_2R) ++ return; ++ ++ if(!pDM_DigTable->bNoiseEst) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_InbandNoiseEstimate()========>\n")); ++ ++ //1 Set initial gain. ++ IGIBackup = pDM_DigTable->CurIGValue; ++ pDM_DigTable->IGIOffset_A = 0; ++ pDM_DigTable->IGIOffset_B = 0; ++ ODM_Write_DIG(pDM_Odm, 0x24); ++ ++ //1 Update idle time power report ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x0); ++ ++ delay_ms(2); ++ ++ //1 Get noise power level ++ while(1) ++ { ++ //2 Read Noise Floor Report ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ tmp = ODM_GetBBReg(pDM_Odm, 0x8f8, bMaskLWord); ++ ++ sNoise_A = (s1Byte)(tmp & 0xff); ++ sNoise_B = (s1Byte)((tmp & 0xff00)>>8); ++ ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B)); ++ ++ if((sNoise_A < 20 && sNoise_A >= -70) && (sNoise_B < 20 && sNoise_B >= -70)) ++ { ++ ValidCnt++; ++ NoiseRpt_A += sNoise_A; ++ NoiseRpt_B += sNoise_B; ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B)); ++ } ++ ++ TimeCnt++; ++ bTimeout = (TimeCnt >= 150)?TRUE:FALSE; ++ ++ if(ValidCnt == 20 || bTimeout) ++ break; ++ ++ delay_ms(2); ++ ++ } ++ ++ //1 Keep idle time power report ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x1); ++ ++ //1 Recover IGI ++ ODM_Write_DIG(pDM_Odm, IGIBackup); ++ ++ //1 Calculate Noise Floor ++ if(ValidCnt != 0) ++ { ++ NoiseRpt_A /= (ValidCnt<<1); ++ NoiseRpt_B /= (ValidCnt<<1); ++ } ++ ++ if(bTimeout) ++ { ++ NoiseRpt_A = 0; ++ NoiseRpt_B = 0; ++ ++ failCnt ++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Noise estimate fail time = %d\n", failCnt)); ++ ++ if(failCnt == 3) ++ { ++ failCnt = 0; ++ pDM_DigTable->bNoiseEst = FALSE; ++ } ++ } ++ else ++ { ++ NoiseRpt_A = -110 + 0x24 + NoiseRpt_A -6; ++ NoiseRpt_B = -110 + 0x24 + NoiseRpt_B -6; ++ pDM_DigTable->bNoiseEst = FALSE; ++ failCnt = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("NoiseRpt_A = %d, NoiseRpt_B = %d\n", NoiseRpt_A, NoiseRpt_B)); ++ } ++ ++ //1 Calculate IGI Offset ++ if(NoiseRpt_A > NoiseRpt_B) ++ { ++ pDM_DigTable->IGIOffset_A = NoiseRpt_A - NoiseRpt_B; ++ pDM_DigTable->IGIOffset_B = 0; ++ } ++ else ++ { ++ pDM_DigTable->IGIOffset_A = 0; ++ pDM_DigTable->IGIOffset_B = NoiseRpt_B - NoiseRpt_A; ++ } ++ ++#endif ++ return; ++} ++ ++VOID ++odm_DigForBtHsMode( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable=&pDM_Odm->DM_DigTable; ++ u1Byte digForBtHs=0; ++ u1Byte digUpBound=0x5a; ++ ++ if(pDM_Odm->bBtConnectProcess) ++ { ++ if(pDM_Odm->SupportICType&(ODM_RTL8723A)) ++ digForBtHs = 0x28; ++ else ++ digForBtHs = 0x22; ++ } ++ else ++ { ++ // ++ // Decide DIG value by BT HS RSSI. ++ // ++ digForBtHs = pDM_Odm->btHsRssi+4; ++ ++ //DIG Bound ++ if(pDM_Odm->SupportICType&(ODM_RTL8723A)) ++ digUpBound = 0x3e; ++ ++ if(digForBtHs > digUpBound) ++ digForBtHs = digUpBound; ++ if(digForBtHs < 0x1c) ++ digForBtHs = 0x1c; ++ ++ // update Current IGI ++ pDM_DigTable->BT30_CurIGI = digForBtHs; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DigForBtHsMode() : set DigValue=0x%x\n", digForBtHs)); ++#endif ++} ++ ++VOID ++ODM_Write_DIG( ++ IN PVOID pDM_VOID, ++ IN u1Byte CurrentIGI ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ if (pDM_DigTable->bStopDIG) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG(): Stop Writing IGI\n")); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x\n", ++ ODM_REG(IGI_A,pDM_Odm),ODM_BIT(IGI,pDM_Odm))); ++ ++ //1 Check initial gain by upper bound ++ if ((!pDM_DigTable->bPSDInProgress) && pDM_Odm->bLinked) ++ { ++ if (CurrentIGI > pDM_DigTable->rx_gain_range_max) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): CurrentIGI(0x%02x) is larger than upper bound !!\n", CurrentIGI)); ++ CurrentIGI = pDM_DigTable->rx_gain_range_max; ++ } ++ if (pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY && pDM_Odm->adaptivity_flag == TRUE) ++ { ++ if(CurrentIGI > pDM_Odm->Adaptivity_IGI_upper) ++ CurrentIGI = pDM_Odm->Adaptivity_IGI_upper; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG(): Adaptivity case: Force upper bound to 0x%x !!!!!!\n", CurrentIGI)); ++ } ++ } ++ ++ if(pDM_DigTable->CurIGValue != CurrentIGI) ++ { ++ ++ /*Add by YuChen for USB IO too slow issue*/ ++ if ((pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) && (CurrentIGI > pDM_DigTable->CurIGValue)) ++ Phydm_Adaptivity(pDM_Odm, CurrentIGI); ++ ++ //1 Set IGI value ++ if(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE)) ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ++ if(pDM_Odm->RFType > ODM_1T1R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ++ if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ } ++ } ++ else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) ++ { ++ switch(*(pDM_Odm->pOnePathCCA)) ++ { ++ case ODM_CCA_2R: ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ++ if(pDM_Odm->RFType > ODM_1T1R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ++ if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) ++ { ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ } ++ break; ++ case ODM_CCA_1R_A: ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ if(pDM_Odm->RFType != ODM_1T1R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); ++ break; ++ case ODM_CCA_1R_B: ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); ++ if(pDM_Odm->RFType != ODM_1T1R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ++ break; ++ } ++ } ++ pDM_DigTable->CurIGValue = CurrentIGI; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_Write_DIG(): CurrentIGI(0x%02x).\n", CurrentIGI)); ++ ++} ++ ++VOID ++odm_PauseDIG( ++ IN PVOID pDM_VOID, ++ IN PHYDM_PAUSE_TYPE PauseType, ++ IN PHYDM_PAUSE_LEVEL pause_level, ++ IN u1Byte IGIValue ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG()=========> level = %d\n", pause_level)); ++ ++ if ((pDM_DigTable->pause_dig_level == 0) && (!(pDM_Odm->SupportAbility & ODM_BB_DIG) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ++ ("odm_PauseDIG(): Return: SupportAbility DIG or FA is disabled !!\n")); ++ return; ++ } ++ ++ if (pause_level > DM_DIG_MAX_PAUSE_TYPE) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ++ ("odm_PauseDIG(): Return: Wrong pause level !!\n")); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_dig_level, IGIValue)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ pDM_DigTable->pause_dig_value[7], pDM_DigTable->pause_dig_value[6], pDM_DigTable->pause_dig_value[5], pDM_DigTable->pause_dig_value[4], ++ pDM_DigTable->pause_dig_value[3], pDM_DigTable->pause_dig_value[2], pDM_DigTable->pause_dig_value[1], pDM_DigTable->pause_dig_value[0])); ++ ++ switch (PauseType) { ++ /* Pause DIG */ ++ case PHYDM_PAUSE: ++ { ++ /* Disable DIG */ ++ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_DIG)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Pause DIG !!\n")); ++ ++ /* Backup IGI value */ ++ if (pDM_DigTable->pause_dig_level == 0) { ++ pDM_DigTable->IGIBackup = pDM_DigTable->CurIGValue; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Backup IGI = 0x%x, new IGI = 0x%x\n", pDM_DigTable->IGIBackup, IGIValue)); ++ } ++ ++ /* Record IGI value */ ++ pDM_DigTable->pause_dig_value[pause_level] = IGIValue; ++ ++ /* Update pause level */ ++ pDM_DigTable->pause_dig_level = (pDM_DigTable->pause_dig_level | BIT(pause_level)); ++ ++ /* Write new IGI value */ ++ if (BIT(pause_level + 1) > pDM_DigTable->pause_dig_level) { ++ ODM_Write_DIG(pDM_Odm, IGIValue); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): IGI of higher level = 0x%x\n", IGIValue)); ++ } ++ break; ++ } ++ /* Resume DIG */ ++ case PHYDM_RESUME: ++ { ++ /* check if the level is illegal or not */ ++ if ((pDM_DigTable->pause_dig_level & (BIT(pause_level))) != 0) { ++ pDM_DigTable->pause_dig_level = pDM_DigTable->pause_dig_level & (~(BIT(pause_level))); ++ pDM_DigTable->pause_dig_value[pause_level] = 0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Resume DIG !!\n")); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Wrong resume level !!\n")); ++ break; ++ } ++ ++ /* Resume DIG */ ++ if (pDM_DigTable->pause_dig_level == 0) { ++ /* Write backup IGI value */ ++ ODM_Write_DIG(pDM_Odm, pDM_DigTable->IGIBackup); ++ pDM_DigTable->bIgnoreDIG = TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write original IGI = 0x%x\n", pDM_DigTable->IGIBackup)); ++ ++ /* Enable DIG */ ++ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_DIG); ++ break; ++ } ++ ++ if (BIT(pause_level) > pDM_DigTable->pause_dig_level) { ++ u1Byte max_level; ++ ++ /* Calculate the maximum level now */ ++ for (max_level = (pause_level - 1); max_level >= 0; max_level--) { ++ if ((pDM_DigTable->pause_dig_level & BIT(max_level)) > 0) ++ break; ++ } ++ ++ /* write IGI of lower level */ ++ ODM_Write_DIG(pDM_Odm, pDM_DigTable->pause_dig_value[max_level]); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write IGI (0x%x) of level (%d)\n", ++ pDM_DigTable->pause_dig_value[max_level], max_level)); ++ break; ++ } ++ break; ++ } ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Wrong type !!\n")); ++ break; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_dig_level, IGIValue)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ pDM_DigTable->pause_dig_value[7], pDM_DigTable->pause_dig_value[6], pDM_DigTable->pause_dig_value[5], pDM_DigTable->pause_dig_value[4], ++ pDM_DigTable->pause_dig_value[3], pDM_DigTable->pause_dig_value[2], pDM_DigTable->pause_dig_value[1], pDM_DigTable->pause_dig_value[0])); ++ ++} ++ ++BOOLEAN ++odm_DigAbort( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++#endif ++ ++ //SupportAbility ++ if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_FA_CNT is disabled\n")); ++ return TRUE; ++ } ++ ++ //SupportAbility ++ if(!(pDM_Odm->SupportAbility & ODM_BB_DIG)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_DIG is disabled\n")); ++ return TRUE; ++ } ++ ++ //ScanInProcess ++ if(*(pDM_Odm->pbScanInProcess)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In Scan Progress \n")); ++ return TRUE; ++ } ++ ++ if(pDM_DigTable->bIgnoreDIG) ++ { ++ pDM_DigTable->bIgnoreDIG = FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Ignore DIG \n")); ++ return TRUE; ++ } ++ ++ //add by Neil Chen to avoid PSD is processing ++ if(pDM_Odm->bDMInitialGainEnable == FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: PSD is Processing \n")); ++ return TRUE; ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #if OS_WIN_FROM_WIN7(OS_VERSION) ++ if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Is AP mode or In HCT Test \n")); ++ return TRUE; ++ } ++ #endif ++ ++ if(pDM_Odm->bBtHsOperation) ++ { ++ odm_DigForBtHsMode(pDM_Odm); ++ } ++ ++ if(!(pDM_Odm->SupportICType &(ODM_RTL8723A|ODM_RTL8188E))) ++ { ++ if(pRX_HP_Table->RXHP_flag == 1) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In RXHP Operation \n")); ++ return TRUE; ++ } ++ } ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++ if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) ++ { ++ printk("pDM_Odm->RSSI_Min=%d \n",pDM_Odm->RSSI_Min); ++ ODM_Write_DIG(pDM_Odm,pDM_Odm->Adapter->registrypriv.force_igi); ++ return TRUE; ++ } ++ #endif ++#else ++ if (!(priv->up_time > 5)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Not In DIG Operation Period \n")); ++ return TRUE; ++ } ++#endif ++ ++ return FALSE; ++} ++ ++VOID ++odm_DIGInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++#endif ++ ++ pDM_DigTable->bStopDIG = FALSE; ++ pDM_DigTable->bIgnoreDIG = FALSE; ++ pDM_DigTable->bPSDInProgress = FALSE; ++ pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm)); ++ pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; ++ pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; ++ pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; ++ pDM_DigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; ++ pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; ++ pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; ++ pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; ++ pDM_DigTable->PreCCK_CCAThres = 0xFF; ++ pDM_DigTable->CurCCK_CCAThres = 0x83; ++ pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; ++ pDM_DigTable->LargeFAHit = 0; ++ pDM_DigTable->Recover_cnt = 0; ++ pDM_DigTable->bMediaConnect_0 = FALSE; ++ pDM_DigTable->bMediaConnect_1 = FALSE; ++ ++ //To Initialize pDM_Odm->bDMInitialGainEnable == FALSE to avoid DIG error ++ pDM_Odm->bDMInitialGainEnable = TRUE; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ pDM_DigTable->DIG_Dynamic_MIN_0 = 0x25; ++ pDM_DigTable->DIG_Dynamic_MIN_1 = 0x25; ++ ++ // For AP\ ADSL modified DIG ++ pDM_DigTable->bTpTarget = FALSE; ++ pDM_DigTable->bNoiseEst = TRUE; ++ pDM_DigTable->IGIOffset_A = 0; ++ pDM_DigTable->IGIOffset_B = 0; ++ pDM_DigTable->TpTrainTH_min = 0; ++ ++ // For RTL8881A ++ FalseAlmCnt->Cnt_Ofdm_fail_pre = 0; ++ ++ //Dyanmic EDCCA ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xC50, 0xFFFF0000, 0xfafd); ++ } ++#else ++ pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; ++ pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; ++ ++ //To Initi BT30 IGI ++ pDM_DigTable->BT30_CurIGI=0x32; ++ ++ ODM_Memory_Set(pDM_Odm, pDM_DigTable->pause_dig_value, 0, (DM_DIG_MAX_PAUSE_TYPE + 1)); ++ pDM_DigTable->pause_dig_level = 0; ++ ODM_Memory_Set(pDM_Odm, pDM_DigTable->pause_cckpd_value, 0, (DM_DIG_MAX_PAUSE_TYPE + 1)); ++ pDM_DigTable->pause_cckpd_level = 0; ++#endif ++ ++ if(pDM_Odm->BoardType & (ODM_BOARD_EXT_PA|ODM_BOARD_EXT_LNA)) ++ { ++ pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; ++ pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; ++ } ++ else ++ { ++ pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; ++ pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; ++ } ++ ++} ++ ++ ++VOID ++odm_DIG( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ PSTA_INFO_T pEntry; ++#endif ++ ++ // Common parameters ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ BOOLEAN FirstConnect,FirstDisConnect; ++ u1Byte DIG_MaxOfMin, DIG_Dynamic_MIN; ++ u1Byte dm_dig_max, dm_dig_min; ++ u1Byte CurrentIGI = pDM_DigTable->CurIGValue; ++ u1Byte offset; ++ u4Byte dm_FA_thres[3]; ++ u4Byte TxTp = 0, RxTp = 0; ++ BOOLEAN bDFSBand = FALSE; ++ BOOLEAN bPerformance = TRUE, bFirstTpTarget = FALSE, bFirstCoverage = FALSE; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ u4Byte TpTrainTH_MIN = DM_DIG_TP_Target_TH0; ++ static u1Byte TimeCnt = 0; ++ u1Byte i; ++#endif ++ ++ if(odm_DigAbort(pDM_Odm) == TRUE) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()===========================>\n\n")); ++ ++ ++ //1 Update status ++#if (RTL8192D_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) ++ { ++ if(*(pDM_Odm->pbMasterOfDMSP)) ++ { ++ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; ++ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); ++ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); ++ } ++ else ++ { ++ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; ++ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); ++ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); ++ } ++ } ++ else ++ { ++ if(*(pDM_Odm->pBandType) == ODM_BAND_5G) ++ { ++ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; ++ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); ++ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); ++ } ++ else ++ { ++ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; ++ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); ++ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); ++ } ++ } ++ } ++ else ++#endif ++ { ++ DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; ++ FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); ++ FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ //1 Noise Floor Estimate ++ //pDM_DigTable->bNoiseEst = (FirstConnect)?TRUE:pDM_DigTable->bNoiseEst; ++ //odm_InbandNoiseCalculate (pDM_Odm); ++ ++ //1 Mode decision ++ if(pDM_Odm->bLinked) ++ { ++ //2 Calculate total TP ++ for (i=0; ipODM_StaInfo[i]; ++ if(IS_STA_VALID(pEntry)) ++ { ++ RxTp += (u4Byte)(pEntry->rx_byte_cnt_LowMAW>>7); ++ TxTp += (u4Byte)(pEntry->tx_byte_cnt_LowMAW>>7); //Kbps ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TX TP = %dkbps, RX TP = %dkbps\n", TxTp, RxTp)); ++ } ++ ++ switch(pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable) ++ { ++ case 0: ++ { ++ bPerformance = TRUE; ++ break; ++ } ++ case 1: ++ { ++ bPerformance = FALSE; ++ break; ++ } ++ case 2: ++ { ++ if(pDM_Odm->bLinked) ++ { ++ if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH0) ++ TpTrainTH_MIN = pDM_DigTable->TpTrainTH_min; ++ ++ if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH1) ++ TpTrainTH_MIN = DM_DIG_TP_Target_TH1; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TP training mode lower bound = %dkbps\n", TpTrainTH_MIN)); ++ ++ //2 Decide DIG mode by total TP ++ if((TxTp + RxTp) > DM_DIG_TP_Target_TH1) // change to performance mode ++ { ++ bFirstTpTarget = (!pDM_DigTable->bTpTarget)?TRUE:FALSE; ++ pDM_DigTable->bTpTarget = TRUE; ++ bPerformance = TRUE; ++ } ++ else if((TxTp + RxTp) < TpTrainTH_MIN) // change to coverage mode ++ { ++ bFirstCoverage = (pDM_DigTable->bTpTarget)?TRUE:FALSE; ++ ++ if(TimeCnt < DM_DIG_TP_Training_Period) ++ { ++ pDM_DigTable->bTpTarget = FALSE; ++ bPerformance = FALSE; ++ TimeCnt++; ++ } ++ else ++ { ++ pDM_DigTable->bTpTarget = TRUE; ++ bPerformance = TRUE; ++ bFirstTpTarget = TRUE; ++ TimeCnt = 0; ++ } ++ } ++ else // remain previous mode ++ { ++ bPerformance = pDM_DigTable->bTpTarget; ++ ++ if(!bPerformance) ++ { ++ if(TimeCnt < DM_DIG_TP_Training_Period) ++ TimeCnt++; ++ else ++ { ++ pDM_DigTable->bTpTarget = TRUE; ++ bPerformance = TRUE; ++ bFirstTpTarget = TRUE; ++ TimeCnt = 0; ++ } ++ } ++ } ++ ++ if(!bPerformance) ++ pDM_DigTable->TpTrainTH_min = RxTp + TxTp; ++ ++ } ++ else ++ { ++ bPerformance = FALSE; ++ pDM_DigTable->TpTrainTH_min = 0; ++ } ++ break; ++ } ++ default: ++ bPerformance = TRUE; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== DIG mode = %d ======\n", pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== bPerformance = %d ======\n", bPerformance)); ++#endif ++ ++ //1 Boundary Decision ++#if (RTL8192C_SUPPORT==1) ++ if((pDM_Odm->SupportICType & ODM_RTL8192C) && (pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))) ++ { ++ //2 High power case ++ if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) ++ { ++ dm_dig_max = DM_DIG_MAX_AP_HP; ++ dm_dig_min = DM_DIG_MIN_AP_HP; ++ } ++ else ++ { ++ dm_dig_max = DM_DIG_MAX_NIC_HP; ++ dm_dig_min = DM_DIG_MIN_NIC_HP; ++ } ++ DIG_MaxOfMin = DM_DIG_MAX_AP_HP; ++ } ++ else ++#endif ++ { ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ //2 For AP\ADSL ++ if(!bPerformance) ++ { ++ dm_dig_max = DM_DIG_MAX_AP_COVERAGR; ++ dm_dig_min = DM_DIG_MIN_AP_COVERAGE; ++ DIG_MaxOfMin = DM_DIG_MAX_OF_MIN_COVERAGE; ++ } ++ else ++ { ++ dm_dig_max = DM_DIG_MAX_AP; ++ dm_dig_min = DM_DIG_MIN_AP; ++ DIG_MaxOfMin = DM_DIG_MAX_OF_MIN; ++ } ++ ++ //4 DFS band ++ if (((*pDM_Odm->pChannel>= 52) &&(*pDM_Odm->pChannel <= 64)) || ++ ((*pDM_Odm->pChannel >= 100) && (*pDM_Odm->pChannel <= 140))) ++ { ++ bDFSBand = TRUE; ++ if (*pDM_Odm->pBandWidth == ODM_BW20M){ ++ dm_dig_min = DM_DIG_MIN_AP_DFS+2; ++ } ++ else{ ++ dm_dig_min = DM_DIG_MIN_AP_DFS; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): ====== In DFS band ======\n")); ++ } ++ ++ //4 TX2path ++ if (priv->pmib->dot11RFEntry.tx2path && !bDFSBand && (*(pDM_Odm->pWirelessMode) == ODM_WM_B)) ++ dm_dig_max = 0x2A; ++ ++#if RTL8192E_SUPPORT ++#ifdef HIGH_POWER_EXT_LNA ++ if ((pDM_Odm->SupportICType & (ODM_RTL8192E)) && (pDM_Odm->ExtLNA)) ++ dm_dig_max = 0x42; ++#endif ++#endif ++ ++#else ++ //2 For WIN\CE ++ if(pDM_Odm->SupportICType >= ODM_RTL8188E) ++ dm_dig_max = 0x5A; ++ else ++ dm_dig_max = DM_DIG_MAX_NIC; ++ ++ if(pDM_Odm->SupportICType != ODM_RTL8821) ++ dm_dig_min = DM_DIG_MIN_NIC; ++ else ++ dm_dig_min = 0x1C; ++ ++ DIG_MaxOfMin = DM_DIG_MAX_AP; ++#endif ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Absolutly upper bound = 0x%x, lower bound = 0x%x\n",dm_dig_max, dm_dig_min)); ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ // for P2P case ++ if(0 < *pDM_Odm->pu1ForcedIgiLb) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): P2P case: Force IGI lb to: %u !!!!!!\n", *pDM_Odm->pu1ForcedIgiLb)); ++ dm_dig_min = *pDM_Odm->pu1ForcedIgiLb; ++ dm_dig_max = (dm_dig_min <= dm_dig_max) ? (dm_dig_max) : (dm_dig_min + 1); ++ } ++#endif ++ ++ //1 Adjust boundary by RSSI ++ if(pDM_Odm->bLinked && bPerformance) ++ { ++ //2 Modify DIG upper bound ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ offset = 15; ++#else ++ //4 Modify DIG upper bound for 92E, 8723A\B, 8821 & 8812 BT ++ if((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8812|ODM_RTL8821|ODM_RTL8723A)) && (pDM_Odm->bBtLimitedDig==1)) ++ { ++ offset = 10; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Coex. case: Force upper bound to RSSI + %d !!!!!!\n", offset)); ++ } ++ else ++ offset = 15; ++#endif ++ ++ if((pDM_Odm->RSSI_Min + offset) > dm_dig_max ) ++ pDM_DigTable->rx_gain_range_max = dm_dig_max; ++ else if((pDM_Odm->RSSI_Min + offset) < dm_dig_min ) ++ pDM_DigTable->rx_gain_range_max = dm_dig_min; ++ else ++ pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + offset; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ //2 Modify DIG lower bound ++ //if(pDM_Odm->bOneEntryOnly) ++ { ++ if(pDM_Odm->RSSI_Min < dm_dig_min) ++ DIG_Dynamic_MIN = dm_dig_min; ++ else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) ++ DIG_Dynamic_MIN = DIG_MaxOfMin; ++ else ++ DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; ++ } ++#else ++ { ++ //4 For AP ++#ifdef __ECOS ++ HAL_REORDER_BARRIER(); ++#else ++ rmb(); ++#endif ++ if (bDFSBand) ++ { ++ DIG_Dynamic_MIN = dm_dig_min; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force lower bound to 0x%x after link !!!!!!\n", dm_dig_min)); ++ } ++ else ++ { ++ if(pDM_Odm->RSSI_Min < dm_dig_min) ++ DIG_Dynamic_MIN = dm_dig_min; ++ else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) ++ DIG_Dynamic_MIN = DIG_MaxOfMin; ++ else ++ DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; ++ } ++ } ++#endif ++ } ++ else ++ { ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ if(bPerformance && bDFSBand) ++ { ++ pDM_DigTable->rx_gain_range_max = 0x28; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force upper bound to 0x%x before link !!!!!!\n", pDM_DigTable->rx_gain_range_max)); ++ } ++ else ++#endif ++ { ++ pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_OF_MIN; ++ } ++ DIG_Dynamic_MIN = dm_dig_min; ++ } ++ ++ //1 Force Lower Bound for AntDiv ++ if(pDM_Odm->bLinked && !pDM_Odm->bOneEntryOnly) ++ { ++ if((pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) && (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) ++ { ++ if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV || pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) { ++ if (pDM_DigTable->AntDiv_RSSI_max > DIG_MaxOfMin) ++ DIG_Dynamic_MIN = DIG_MaxOfMin; ++ else ++ DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: Force lower bound to 0x%x !!!!!!\n", DIG_Dynamic_MIN)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: RSSI_max = 0x%x !!!!!!\n", pDM_DigTable->AntDiv_RSSI_max)); ++ } ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust boundary by RSSI Upper bound = 0x%x, Lower bound = 0x%x\n", ++ pDM_DigTable->rx_gain_range_max, DIG_Dynamic_MIN)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Link status: bLinked = %d, RSSI = %d, bFirstConnect = %d, bFirsrDisConnect = %d\n\n", ++ pDM_Odm->bLinked, pDM_Odm->RSSI_Min, FirstConnect, FirstDisConnect)); ++ ++ //1 Modify DIG lower bound, deal with abnormal case ++ //2 Abnormal false alarm case ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ if(bDFSBand) ++ { ++ pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; ++ } ++ else ++#endif ++ { ++ if(!pDM_Odm->bLinked) ++ { ++ pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; ++ ++ if (FirstDisConnect) ++ pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; ++ } ++ else ++ pDM_DigTable->rx_gain_range_min = odm_ForbiddenIGICheck(pDM_Odm, DIG_Dynamic_MIN, CurrentIGI); ++ } ++ ++ //2 Abnormal # beacon case ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(pDM_Odm->bLinked && !FirstConnect) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("Beacon Num (%d)\n", pDM_Odm->PhyDbgInfo.NumQryBeaconPkt)); ++ if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pDM_Odm->bsta_state)) ++ { ++ pDM_DigTable->rx_gain_range_min = dm_dig_min; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal #beacon (%d) case in STA mode: Force lower bound to 0x%x !!!!!!\n\n", ++ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, pDM_DigTable->rx_gain_range_min)); ++ } ++ } ++#endif ++ ++ //2 Abnormal lower bound case ++ if(pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max) ++ { ++ pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal lower bound case: Force lower bound to 0x%x !!!!!!\n\n",pDM_DigTable->rx_gain_range_min)); ++ } ++ ++ ++ //1 False alarm threshold decision ++ odm_FAThresholdCheck(pDM_Odm, bDFSBand, bPerformance, RxTp, TxTp, dm_FA_thres); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): False alarm threshold = %d, %d, %d \n\n", dm_FA_thres[0], dm_FA_thres[1], dm_FA_thres[2])); ++ ++ //1 Adjust initial gain by false alarm ++ if(pDM_Odm->bLinked && bPerformance) ++ { ++ //2 After link ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI after link\n")); ++ ++ if(bFirstTpTarget || (FirstConnect && bPerformance)) ++ { ++ pDM_DigTable->LargeFAHit = 0; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ if(bDFSBand) ++ { ++ if(pDM_Odm->RSSI_Min > 0x28) ++ CurrentIGI = 0x28; ++ else ++ CurrentIGI = pDM_Odm->RSSI_Min; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: One-shot to 0x28 upmost!!!!!!\n")); ++ } ++ else ++#endif ++ { ++ if(pDM_Odm->RSSI_Min < DIG_MaxOfMin) ++ { ++ if(CurrentIGI < pDM_Odm->RSSI_Min) ++ CurrentIGI = pDM_Odm->RSSI_Min; ++ } ++ else ++ { ++ if(CurrentIGI < DIG_MaxOfMin) ++ CurrentIGI = DIG_MaxOfMin; ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++#if (RTL8812A_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ ODM_ConfigBBWithHeaderFile(pDM_Odm, CONFIG_BB_AGC_TAB_DIFF); ++#endif ++#endif ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First connect case: IGI does on-shot to 0x%x\n", CurrentIGI)); ++ ++ } ++ else ++ { ++ if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) ++ CurrentIGI = CurrentIGI + 4; ++ else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1]) ++ CurrentIGI = CurrentIGI + 2; ++ else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0]) ++ CurrentIGI = CurrentIGI - 2; ++ ++ //4 Abnormal # beacon case ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) && (pDM_Odm->bsta_state)) ++ { ++ CurrentIGI = pDM_DigTable->rx_gain_range_min; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormal #beacon (%d) case: IGI does one-shot to 0x%x\n", ++ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, CurrentIGI)); ++ } ++#endif ++ } ++ } ++ else ++ { ++ //2 Before link ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI before link\n")); ++ ++ if(FirstDisConnect || bFirstCoverage) ++ { ++ CurrentIGI = dm_dig_min; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First disconnect case: IGI does on-shot to lower bound\n")); ++ } ++ else ++ { ++ if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) ++ CurrentIGI = CurrentIGI + 4; ++ else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1]) ++ CurrentIGI = CurrentIGI + 2; ++ else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0]) ++ CurrentIGI = CurrentIGI - 2; ++ } ++ } ++ ++ //1 Check initial gain by upper/lower bound ++ if(CurrentIGI < pDM_DigTable->rx_gain_range_min) ++ CurrentIGI = pDM_DigTable->rx_gain_range_min; ++ ++ if(CurrentIGI > pDM_DigTable->rx_gain_range_max) ++ CurrentIGI = pDM_DigTable->rx_gain_range_max; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x, TotalFA = %d\n\n", CurrentIGI, pFalseAlmCnt->Cnt_all)); ++ ++ //1 High power RSSI threshold ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) ++ { ++ // High power IGI lower bound ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); ++ if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); ++ //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; ++ CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; ++ } ++ } ++ if((pDM_Odm->SupportICType & ODM_RTL8723A) && IS_WIRELESS_MODE_G(pAdapter)) ++ { ++ if(pHalData->UndecoratedSmoothedPWDB > 0x28) ++ { ++ if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) ++ { ++ //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; ++ CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; ++ } ++ } ++ } ++#endif ++ ++ //1 Update status ++#if (RTL8192D_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ //sherry delete DualMacSmartConncurrent 20110517 ++ if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) ++ { ++ ODM_Write_DIG_DMSP(pDM_Odm, CurrentIGI);//ODM_Write_DIG_DMSP(pDM_Odm, pDM_DigTable->CurIGValue); ++ if(*(pDM_Odm->pbMasterOfDMSP)) ++ { ++ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; ++ } ++ else ++ { ++ pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; ++ } ++ } ++ else ++ { ++ ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); ++ if(*(pDM_Odm->pBandType) == ODM_BAND_5G) ++ { ++ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; ++ } ++ else ++ { ++ pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; ++ } ++ } ++ } ++ else ++#endif ++ { ++#if ((DM_ODM_SUPPORT_TYPE & ODM_WIN) || ((DM_ODM_SUPPORT_TYPE & ODM_CE) && (ODM_CONFIG_BT_COEXIST == 1))) ++ if(pDM_Odm->bBtHsOperation) ++ { ++ if(pDM_Odm->bLinked) ++ { ++ if(pDM_DigTable->BT30_CurIGI > (CurrentIGI)) ++ ODM_Write_DIG(pDM_Odm, CurrentIGI); ++ else ++ ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI); ++ ++ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; ++ } ++ else ++ { ++ if(pDM_Odm->bLinkInProcess) ++ ODM_Write_DIG(pDM_Odm, 0x1c); ++ else if(pDM_Odm->bBtConnectProcess) ++ ODM_Write_DIG(pDM_Odm, 0x28); ++ else ++ ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); ++ } ++ } ++ else // BT is not using ++#endif ++ { ++ ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); ++ pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; ++ pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; ++ } ++ } ++} ++ ++VOID ++odm_DIGbyRSSI_LPS( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ ++ u1Byte RSSI_Lower=DM_DIG_MIN_NIC; //0x1E or 0x1C ++ u1Byte CurrentIGI=pDM_Odm->RSSI_Min; ++ ++ if(odm_DigAbort(pDM_Odm) == TRUE) ++ return; ++ ++ CurrentIGI=CurrentIGI+RSSI_OFFSET_DIG; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS()==>\n")); ++ ++ // Using FW PS mode to make IGI ++ //Adjust by FA in LPS MODE ++ if(pFalseAlmCnt->Cnt_all> DM_DIG_FA_TH2_LPS) ++ CurrentIGI = CurrentIGI+4; ++ else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_LPS) ++ CurrentIGI = CurrentIGI+2; ++ else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS) ++ CurrentIGI = CurrentIGI-2; ++ ++ ++ //Lower bound checking ++ ++ //RSSI Lower bound check ++ if((pDM_Odm->RSSI_Min-10) > DM_DIG_MIN_NIC) ++ RSSI_Lower =(pDM_Odm->RSSI_Min-10); ++ else ++ RSSI_Lower =DM_DIG_MIN_NIC; ++ ++ //Upper and Lower Bound checking ++ if(CurrentIGI > DM_DIG_MAX_NIC) ++ CurrentIGI=DM_DIG_MAX_NIC; ++ else if(CurrentIGI < RSSI_Lower) ++ CurrentIGI =RSSI_Lower; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pFalseAlmCnt->Cnt_all = %d\n",pFalseAlmCnt->Cnt_all)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pDM_Odm->RSSI_Min = %d\n",pDM_Odm->RSSI_Min)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): CurrentIGI = 0x%x\n",CurrentIGI)); ++ ++ ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); ++#endif ++} ++ ++//3============================================================ ++//3 FASLE ALARM CHECK ++//3============================================================ ++ ++VOID ++odm_FalseAlarmCounterStatistics( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ u4Byte ret_value; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++//Mark there, and check this in odm_DMWatchDog ++#if 0 //(DM_ODM_SUPPORT_TYPE == ODM_AP) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ if( (priv->auto_channel != 0) && (priv->auto_channel != 2) ) ++ return; ++#endif ++#endif ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics()======>\n")); ++ ++#if (ODM_IC_11N_SERIES_SUPPORT == 1) ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ { ++ ++ //hold ofdm counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); //hold page C counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); //hold page D counter ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); ++ ++ FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + ++ FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + ++ FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; ++ ++#if (RTL8188E_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); ++ } ++#endif ++ ++#if (RTL8192D_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ odm_GetCCKFalseAlarm_92D(pDM_Odm); ++ } ++ else ++#endif ++ { ++ //hold cck counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT12, 1); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT14, 1); ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); ++ FalseAlmCnt->Cnt_Cck_fail = ret_value; ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); ++ FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; ++ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); ++ FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) |((ret_value&0xFF00)>>8); ++ } ++ ++ FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Fast_Fsync + ++ FalseAlmCnt->Cnt_SB_Search_fail + ++ FalseAlmCnt->Cnt_Parity_Fail + ++ FalseAlmCnt->Cnt_Rate_Illegal + ++ FalseAlmCnt->Cnt_Crc8_fail + ++ FalseAlmCnt->Cnt_Mcs_fail + ++ FalseAlmCnt->Cnt_Cck_fail); ++ ++ FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; ++ ++#if (RTL8192C_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192C) ++ odm_ResetFACounter_92C(pDM_Odm); ++#endif ++ ++#if (RTL8192D_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ odm_ResetFACounter_92D(pDM_Odm); ++#endif ++ ++ if(pDM_Odm->SupportICType >=ODM_RTL8723A) ++ { ++ //reset false alarm counter registers ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 1); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 1); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 0); ++ ++ //update ofdm counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 0); //update page C counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 0); //update page D counter ++ ++ //reset CCK CCA counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 2); ++ //reset CCK FA counter ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 2); ++ } ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", ++ FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", ++ FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", ++ FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); ++ } ++#endif ++ ++#if (ODM_IC_11AC_SERIES_SUPPORT == 1) ++ if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ { ++ u4Byte CCKenable; ++ ++ /* read OFDM FA counter */ ++ FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord); ++ ++ ++ /* Read CCK FA counter */ ++ FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord); ++ ++ /* read CCK/OFDM CCA counter */ ++ ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11AC, bMaskDWord); ++ FalseAlmCnt->Cnt_OFDM_CCA = (ret_value & 0xffff0000) >> 16; ++ FalseAlmCnt->Cnt_CCK_CCA = ret_value & 0xffff; ++ ++#if (RTL8881A_SUPPORT==1) ++ /* For 8881A */ ++ if(pDM_Odm->SupportICType == ODM_RTL8881A) ++ { ++ u4Byte Cnt_Ofdm_fail_temp = 0; ++ ++ if(FalseAlmCnt->Cnt_Ofdm_fail >= FalseAlmCnt->Cnt_Ofdm_fail_pre) ++ { ++ Cnt_Ofdm_fail_temp = FalseAlmCnt->Cnt_Ofdm_fail_pre; ++ FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail; ++ FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Ofdm_fail - Cnt_Ofdm_fail_temp; ++ } ++ else ++ FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail_pre)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail_pre=%d\n", Cnt_Ofdm_fail_temp)); ++ ++ /* Reset FA counter by enable/disable OFDM */ ++ if(FalseAlmCnt->Cnt_Ofdm_fail_pre >= 0x7fff) ++ { ++ // reset OFDM ++ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,1); ++ FalseAlmCnt->Cnt_Ofdm_fail_pre = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Reset false alarm counter\n")); ++ } ++ } ++#endif ++ ++ /* reset OFDM FA coutner */ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 1); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 0); ++ ++ /* reset CCK FA counter */ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 0); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 1); ++ ++ /* reset CCA counter */ ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 1); ++ ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 0); ++ ++ CCKenable = ODM_GetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT28); ++ if(CCKenable)//if(*pDM_Odm->pBandType == ODM_BAND_2_4G) ++ { ++ FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail; ++ FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_CCK_CCA + FalseAlmCnt->Cnt_OFDM_CCA; ++ } ++ else ++ { ++ FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail; ++ FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA; ++ } ++ ++ } ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_OFDM_CCA=%d\n", FalseAlmCnt->Cnt_OFDM_CCA)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_CCK_CCA=%d\n", FalseAlmCnt->Cnt_CCK_CCA)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_CCA_all=%d\n", FalseAlmCnt->Cnt_CCA_all)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_FalseAlarmCounterStatistics(): Total False Alarm=%d\n\n", FalseAlmCnt->Cnt_all)); ++} ++ ++//3============================================================ ++//3 CCK Packet Detect Threshold ++//3============================================================ ++ ++VOID ++odm_PauseCCKPacketDetection( ++ IN PVOID pDM_VOID, ++ IN PHYDM_PAUSE_TYPE PauseType, ++ IN PHYDM_PAUSE_LEVEL pause_level, ++ IN u1Byte CCKPDThreshold ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection()=========> level = %d\n", pause_level)); ++ ++ if ((pDM_DigTable->pause_cckpd_level == 0) && (!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Return: SupportAbility ODM_BB_CCK_PD or ODM_BB_FA_CNT is disabled\n")); ++ return; ++ } ++ ++ if (pause_level > DM_DIG_MAX_PAUSE_TYPE) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ++ ("odm_PauseCCKPacketDetection(): Return: Wrong pause level !!\n")); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_cckpd_level, CCKPDThreshold)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ pDM_DigTable->pause_cckpd_value[7], pDM_DigTable->pause_cckpd_value[6], pDM_DigTable->pause_cckpd_value[5], pDM_DigTable->pause_cckpd_value[4], ++ pDM_DigTable->pause_cckpd_value[3], pDM_DigTable->pause_cckpd_value[2], pDM_DigTable->pause_cckpd_value[1], pDM_DigTable->pause_cckpd_value[0])); ++ ++ switch (PauseType) { ++ /* Pause CCK Packet Detection Threshold */ ++ case PHYDM_PAUSE: ++ { ++ /* Disable CCK PD */ ++ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_CCK_PD)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Pause CCK packet detection threshold !!\n")); ++ ++ /* Backup original CCK PD threshold decided by CCK PD mechanism */ ++ if (pDM_DigTable->pause_cckpd_level == 0) { ++ pDM_DigTable->CCKPDBackup = pDM_DigTable->CurCCK_CCAThres; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ++ ("odm_PauseCCKPacketDetection(): Backup CCKPD = 0x%x, new CCKPD = 0x%x\n", pDM_DigTable->CCKPDBackup, CCKPDThreshold)); ++ } ++ ++ /* Update pause level */ ++ pDM_DigTable->pause_cckpd_level = (pDM_DigTable->pause_cckpd_level | BIT(pause_level)); ++ ++ /* Record CCK PD threshold */ ++ pDM_DigTable->pause_cckpd_value[pause_level] = CCKPDThreshold; ++ ++ /* Write new CCK PD threshold */ ++ if (BIT(pause_level + 1) > pDM_DigTable->pause_cckpd_level) { ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, CCKPDThreshold); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): CCKPD of higher level = 0x%x\n", CCKPDThreshold)); ++ } ++ break; ++ } ++ /* Resume CCK Packet Detection Threshold */ ++ case PHYDM_RESUME: ++ { ++ /* check if the level is illegal or not */ ++ if ((pDM_DigTable->pause_cckpd_level & (BIT(pause_level))) != 0) { ++ pDM_DigTable->pause_cckpd_level = pDM_DigTable->pause_cckpd_level & (~(BIT(pause_level))); ++ pDM_DigTable->pause_cckpd_value[pause_level] = 0; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Resume CCK PD !!\n")); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Wrong resume level !!\n")); ++ break; ++ } ++ ++ /* Resume DIG */ ++ if (pDM_DigTable->pause_cckpd_level == 0) { ++ /* Write backup IGI value */ ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, pDM_DigTable->CCKPDBackup); ++ /* pDM_DigTable->bIgnoreDIG = TRUE; */ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Write original CCKPD = 0x%x\n", pDM_DigTable->CCKPDBackup)); ++ ++ /* Enable DIG */ ++ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_CCK_PD); ++ break; ++ } ++ ++ if (BIT(pause_level) > pDM_DigTable->pause_cckpd_level) { ++ u1Byte max_level; ++ ++ /* Calculate the maximum level now */ ++ for (max_level = (pause_level - 1); max_level >= 0; max_level--) { ++ if ((pDM_DigTable->pause_cckpd_level & BIT(max_level)) > 0) ++ break; ++ } ++ ++ /* write CCKPD of lower level */ ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, pDM_DigTable->pause_cckpd_value[max_level]); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Write CCKPD (0x%x) of level (%d)\n", ++ pDM_DigTable->pause_cckpd_value[max_level], max_level)); ++ break; ++ } ++ break; ++ } ++ default: ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): Wrong type !!\n")); ++ break; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause level = 0x%x, Current value = 0x%x\n", pDM_DigTable->pause_cckpd_level, CCKPDThreshold)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", ++ pDM_DigTable->pause_cckpd_value[7], pDM_DigTable->pause_cckpd_value[6], pDM_DigTable->pause_cckpd_value[5], pDM_DigTable->pause_cckpd_value[4], ++ pDM_DigTable->pause_cckpd_value[3], pDM_DigTable->pause_cckpd_value[2], pDM_DigTable->pause_cckpd_value[1], pDM_DigTable->pause_cckpd_value[0])); ++} ++ ++ ++VOID ++odm_CCKPacketDetectionThresh( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ u1Byte CurCCK_CCAThres, RSSI_thd = 55; ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++//modify by Guo.Mingzhi 2011-12-29 ++ if (pDM_Odm->bDualMacSmartConcurrent == TRUE) ++// if (pDM_Odm->bDualMacSmartConcurrent == FALSE) ++ return; ++ if(pDM_Odm->bBtHsOperation) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() write 0xcd for BT HS mode!!\n")); ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, 0xcd); ++ return; ++ } ++#endif ++ ++ if((!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD)) ||(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() return==========\n")); ++#ifdef MCR_WIRELESS_EXTEND ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, 0x43); ++#endif ++ return; ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ if(pDM_Odm->ExtLNA) ++ return; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() ==========>\n")); ++ ++ if (pDM_Odm->bLinked) ++ { ++ if (pDM_Odm->RSSI_Min > RSSI_thd) ++ CurCCK_CCAThres = 0xcd; ++ else if ((pDM_Odm->RSSI_Min <= RSSI_thd) && (pDM_Odm->RSSI_Min > 10)) ++ CurCCK_CCAThres = 0x83; ++ else ++ { ++ if(FalseAlmCnt->Cnt_Cck_fail > 1000) ++ CurCCK_CCAThres = 0x83; ++ else ++ CurCCK_CCAThres = 0x40; ++ } ++ } else { ++ if(FalseAlmCnt->Cnt_Cck_fail > 1000) ++ CurCCK_CCAThres = 0x83; ++ else ++ CurCCK_CCAThres = 0x40; ++ } ++ ++#if (RTL8192D_SUPPORT==1) ++ if((pDM_Odm->SupportICType == ODM_RTL8192D) && (*pDM_Odm->pBandType == ODM_BAND_2_4G)) ++ ODM_Write_CCK_CCA_Thres_92D(pDM_Odm, CurCCK_CCAThres); ++ else ++#endif ++ ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() CurCCK_CCAThres = 0x%x\n",CurCCK_CCAThres)); ++} ++ ++VOID ++ODM_Write_CCK_CCA_Thres( ++ IN PVOID pDM_VOID, ++ IN u1Byte CurCCK_CCAThres ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ if(pDM_DigTable->CurCCK_CCAThres!=CurCCK_CCAThres) //modify by Guo.Mingzhi 2012-01-03 ++ { ++ ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA,pDM_Odm), CurCCK_CCAThres); ++ } ++ pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; ++ pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++// <20130108, Kordan> E.g., With LNA used, we make the Rx power smaller to have a better EVM. (Asked by Willis) ++VOID ++odm_RFEControl( ++ IN PDM_ODM_T pDM_Odm, ++ IN u8Byte RSSIVal ++ ) ++{ ++ PADAPTER Adapter = (PADAPTER)pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ static u1Byte TRSW_HighPwr = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("===> odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X, pHalData->RFEType = %d\n", ++ RSSIVal, TRSW_HighPwr, pHalData->RFEType )); ++ ++ if (pHalData->RFEType == 3) { ++ ++ pDM_Odm->RSSI_TRSW = RSSIVal; ++ ++ if (pDM_Odm->RSSI_TRSW >= pDM_Odm->RSSI_TRSW_H) ++ { ++ TRSW_HighPwr = 1; // Switch to ++ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control ++ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x3); // Set ANTSW=1/ANTSWB=0 for SW control ++ ++ } ++ else if (pDM_Odm->RSSI_TRSW <= pDM_Odm->RSSI_TRSW_L) ++ { ++ TRSW_HighPwr = 0; // Switched back ++ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control ++ PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x0); // Set ANTSW=1/ANTSWB=0 for SW control ++ ++ } ++ } ++ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L) = (%d, %d)\n", pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(RSSIVal, RSSIVal, pDM_Odm->RSSI_TRSW_iso) = (%d, %d, %d)\n", ++ RSSIVal, pDM_Odm->RSSI_TRSW_iso, pDM_Odm->RSSI_TRSW)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("<=== odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X\n", RSSIVal, TRSW_HighPwr)); ++} ++ ++VOID ++odm_MPT_DIGWorkItemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER Adapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_MPT_DIG(pDM_Odm); ++} ++ ++VOID ++odm_MPT_DIGCallback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ++ #if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ #if USE_WORKITEM ++ PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); ++ #else ++ ODM_MPT_DIG(pDM_Odm); ++ #endif ++ #else ++ PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); ++ #endif ++ ++} ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++VOID ++odm_MPT_DIGCallback( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if USE_WORKITEM ++ PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); ++#else ++ ODM_MPT_DIG(pDM_Odm); ++#endif ++} ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE != ODM_CE) ++VOID ++odm_MPT_Write_DIG( ++ IN PVOID pDM_VOID, ++ IN u1Byte CurIGValue ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), CurIGValue); ++ ++ if(pDM_Odm->RFType > ODM_1T1R) ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), CurIGValue); ++ ++ if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) ++ { ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_C,pDM_Odm), CurIGValue); ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_D,pDM_Odm), CurIGValue); ++ } ++ ++ pDM_DigTable->CurIGValue = CurIGValue; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurIGValue = 0x%x\n", CurIGValue)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("pDM_Odm->RFType = 0x%x\n", pDM_Odm->RFType)); ++} ++ ++VOID ++ODM_MPT_DIG( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); ++ u1Byte CurrentIGI = pDM_DigTable->CurIGValue; ++ u1Byte DIG_Upper = 0x40, DIG_Lower = 0x20; ++ u4Byte RXOK_cal; ++ u4Byte RxPWDBAve_final; ++ u1Byte IGI_A = 0x20, IGI_B = 0x20; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ #if ODM_FIX_2G_DIG ++ IGI_A = 0x22; ++ IGI_B = 0x24; ++ #endif ++ ++#else ++ if (!(pDM_Odm->priv->pshare->rf_ft_var.mp_specific && pDM_Odm->priv->pshare->mp_dig_on)) ++ return; ++ ++ if (*pDM_Odm->pBandType == ODM_BAND_5G) ++ DIG_Lower = 0x22; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> ODM_MPT_DIG, pBandType = %d\n", *pDM_Odm->pBandType)); ++ ++#if (ODM_FIX_2G_DIG || (DM_ODM_SUPPORT_TYPE & ODM_AP)) ++ if (*pDM_Odm->pBandType == ODM_BAND_5G || (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B))) // for 5G or 8814 ++#else ++ if (1) // for both 2G/5G ++#endif ++ { ++ odm_FalseAlarmCounterStatistics(pDM_Odm); ++ ++ RXOK_cal = pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK + pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM; ++ RxPWDBAve_final = (RXOK_cal != 0)?pDM_Odm->RxPWDBAve/RXOK_cal:0; ++ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; ++ pDM_Odm->RxPWDBAve = 0; ++ pDM_Odm->MPDIG_2G = FALSE; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_Odm->Times_2G = 0; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RX OK = %d\n", RXOK_cal)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RSSI = %d\n", RxPWDBAve_final)); ++ ++ if (RXOK_cal >= 70 && RxPWDBAve_final <= 40) ++ { ++ if (CurrentIGI > 0x24) ++ odm_MPT_Write_DIG(pDM_Odm, 0x24); ++ } ++ else ++ { ++ if(pFalseAlmCnt->Cnt_all > 1000){ ++ CurrentIGI = CurrentIGI + 8; ++ } ++ else if(pFalseAlmCnt->Cnt_all > 200){ ++ CurrentIGI = CurrentIGI + 4; ++ } ++ else if (pFalseAlmCnt->Cnt_all > 50){ ++ CurrentIGI = CurrentIGI + 2; ++ } ++ else if (pFalseAlmCnt->Cnt_all < 2){ ++ CurrentIGI = CurrentIGI - 2; ++ } ++ ++ if (CurrentIGI < DIG_Lower ){ ++ CurrentIGI = DIG_Lower; ++ } ++ ++ if(CurrentIGI > DIG_Upper){ ++ CurrentIGI = DIG_Upper; ++ } ++ ++ odm_MPT_Write_DIG(pDM_Odm, CurrentIGI); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG = 0x%x, Cnt_all = %d, Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d\n", ++ CurrentIGI, pFalseAlmCnt->Cnt_all, pFalseAlmCnt->Cnt_Ofdm_fail, pFalseAlmCnt->Cnt_Cck_fail)); ++ } ++ } ++ else ++ { ++ if(pDM_Odm->MPDIG_2G == FALSE) ++ { ++ if((pDM_Odm->SupportPlatform & ODM_WIN) && !(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B))) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> Fix IGI\n")); ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), IGI_A); ++ ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), IGI_B); ++ pDM_DigTable->CurIGValue = IGI_B; ++ } ++ else ++ odm_MPT_Write_DIG(pDM_Odm, IGI_A); ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_Odm->Times_2G++; ++ ++ if (pDM_Odm->Times_2G == 3) ++#endif ++ { ++ pDM_Odm->MPDIG_2G = TRUE; ++ } ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) ++ odm_RFEControl(pDM_Odm, RxPWDBAve_final); ++#endif ++ ++ ODM_SetTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, 700); ++} ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dig.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dig.h +new file mode 100644 +index 0000000..e7c89ed +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dig.h +@@ -0,0 +1,327 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMDIG_H__ ++#define __PHYDMDIG_H__ ++ ++#define DIG_VERSION "1.8" /*2015.07.01*/ ++ ++/* Pause DIG & CCKPD */ ++#define DM_DIG_MAX_PAUSE_TYPE 0x7 ++ ++typedef struct _Dynamic_Initial_Gain_Threshold_ ++{ ++ BOOLEAN bStopDIG; // for debug ++ BOOLEAN bIgnoreDIG; ++ BOOLEAN bPSDInProgress; ++ ++ u1Byte Dig_Enable_Flag; ++ u1Byte Dig_Ext_Port_Stage; ++ ++ int RssiLowThresh; ++ int RssiHighThresh; ++ ++ u4Byte FALowThresh; ++ u4Byte FAHighThresh; ++ ++ u1Byte CurSTAConnectState; ++ u1Byte PreSTAConnectState; ++ u1Byte CurMultiSTAConnectState; ++ ++ u1Byte PreIGValue; ++ u1Byte CurIGValue; ++ u1Byte BackupIGValue; //MP DIG ++ u1Byte BT30_CurIGI; ++ u1Byte IGIBackup; ++ ++ s1Byte BackoffVal; ++ s1Byte BackoffVal_range_max; ++ s1Byte BackoffVal_range_min; ++ u1Byte rx_gain_range_max; ++ u1Byte rx_gain_range_min; ++ u1Byte Rssi_val_min; ++ ++ u1Byte PreCCK_CCAThres; ++ u1Byte CurCCK_CCAThres; ++ u1Byte PreCCKPDState; ++ u1Byte CurCCKPDState; ++ u1Byte CCKPDBackup; ++ u1Byte pause_cckpd_level; ++ u1Byte pause_cckpd_value[DM_DIG_MAX_PAUSE_TYPE + 1]; ++ ++ u1Byte LargeFAHit; ++ u1Byte ForbiddenIGI; ++ u4Byte Recover_cnt; ++ ++ u1Byte DIG_Dynamic_MIN_0; ++ u1Byte DIG_Dynamic_MIN_1; ++ BOOLEAN bMediaConnect_0; ++ BOOLEAN bMediaConnect_1; ++ ++ u4Byte AntDiv_RSSI_max; ++ u4Byte RSSI_max; ++ ++ u1Byte *bP2PInProcess; ++ ++ u1Byte pause_dig_level; ++ u1Byte pause_dig_value[DM_DIG_MAX_PAUSE_TYPE + 1]; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ BOOLEAN bTpTarget; ++ BOOLEAN bNoiseEst; ++ u4Byte TpTrainTH_min; ++ u1Byte IGIOffset_A; ++ u1Byte IGIOffset_B; ++#endif ++}DIG_T,*pDIG_T; ++ ++typedef struct _FALSE_ALARM_STATISTICS{ ++ u4Byte Cnt_Parity_Fail; ++ u4Byte Cnt_Rate_Illegal; ++ u4Byte Cnt_Crc8_fail; ++ u4Byte Cnt_Mcs_fail; ++ u4Byte Cnt_Ofdm_fail; ++ u4Byte Cnt_Ofdm_fail_pre; //For RTL8881A ++ u4Byte Cnt_Cck_fail; ++ u4Byte Cnt_all; ++ u4Byte Cnt_Fast_Fsync; ++ u4Byte Cnt_SB_Search_fail; ++ u4Byte Cnt_OFDM_CCA; ++ u4Byte Cnt_CCK_CCA; ++ u4Byte Cnt_CCA_all; ++ u4Byte Cnt_BW_USC; //Gary ++ u4Byte Cnt_BW_LSC; //Gary ++}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; ++ ++typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition ++{ ++ DIG_TYPE_THRESH_HIGH = 0, ++ DIG_TYPE_THRESH_LOW = 1, ++ DIG_TYPE_BACKOFF = 2, ++ DIG_TYPE_RX_GAIN_MIN = 3, ++ DIG_TYPE_RX_GAIN_MAX = 4, ++ DIG_TYPE_ENABLE = 5, ++ DIG_TYPE_DISABLE = 6, ++ DIG_OP_TYPE_MAX ++}DM_DIG_OP_E; ++ ++/* ++typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition ++{ ++ CCK_PD_STAGE_LowRssi = 0, ++ CCK_PD_STAGE_HighRssi = 1, ++ CCK_PD_STAGE_MAX = 3, ++}DM_CCK_PDTH_E; ++ ++typedef enum tag_DIG_EXT_PORT_ALGO_Definition ++{ ++ DIG_EXT_PORT_STAGE_0 = 0, ++ DIG_EXT_PORT_STAGE_1 = 1, ++ DIG_EXT_PORT_STAGE_2 = 2, ++ DIG_EXT_PORT_STAGE_3 = 3, ++ DIG_EXT_PORT_STAGE_MAX = 4, ++}DM_DIG_EXT_PORT_ALG_E; ++ ++typedef enum tag_DIG_Connect_Definition ++{ ++ DIG_STA_DISCONNECT = 0, ++ DIG_STA_CONNECT = 1, ++ DIG_STA_BEFORE_CONNECT = 2, ++ DIG_MultiSTA_DISCONNECT = 3, ++ DIG_MultiSTA_CONNECT = 4, ++ DIG_CONNECT_MAX ++}DM_DIG_CONNECT_E; ++ ++ ++#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} ++ ++#define DM_MultiSTA_InitGainChangeNotify_CONNECT(_ADAPTER) \ ++ DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_CONNECT) ++ ++#define DM_MultiSTA_InitGainChangeNotify_DISCONNECT(_ADAPTER) \ ++ DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_DISCONNECT) ++*/ ++ ++typedef enum tag_PHYDM_Pause_Type { ++ PHYDM_PAUSE = BIT0, ++ PHYDM_RESUME = BIT1 ++} PHYDM_PAUSE_TYPE; ++ ++typedef enum tag_PHYDM_Pause_Level { ++/* number of pause level can't exceed DM_DIG_MAX_PAUSE_TYPE */ ++ PHYDM_PAUSE_LEVEL_0 = 0, ++ PHYDM_PAUSE_LEVEL_1 = 1, ++ PHYDM_PAUSE_LEVEL_2 = 2, ++ PHYDM_PAUSE_LEVEL_3 = 3, ++ PHYDM_PAUSE_LEVEL_4 = 4, ++ PHYDM_PAUSE_LEVEL_5 = 5, ++ PHYDM_PAUSE_LEVEL_6 = 6, ++ PHYDM_PAUSE_LEVEL_7 = DM_DIG_MAX_PAUSE_TYPE /* maximum level */ ++} PHYDM_PAUSE_LEVEL; ++ ++ ++#define DM_DIG_THRESH_HIGH 40 ++#define DM_DIG_THRESH_LOW 35 ++ ++#define DM_FALSEALARM_THRESH_LOW 400 ++#define DM_FALSEALARM_THRESH_HIGH 1000 ++ ++#define DM_DIG_MAX_NIC 0x3e ++#define DM_DIG_MIN_NIC 0x1e //0x22//0x1c ++#define DM_DIG_MAX_OF_MIN_NIC 0x3e ++ ++#define DM_DIG_MAX_AP 0x3e ++#define DM_DIG_MIN_AP 0x1c ++#define DM_DIG_MAX_OF_MIN 0x2A //0x32 ++#define DM_DIG_MIN_AP_DFS 0x20 ++ ++#define DM_DIG_MAX_NIC_HP 0x46 ++#define DM_DIG_MIN_NIC_HP 0x2e ++ ++#define DM_DIG_MAX_AP_HP 0x42 ++#define DM_DIG_MIN_AP_HP 0x30 ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++#define DM_DIG_MAX_AP_COVERAGR 0x26 ++#define DM_DIG_MIN_AP_COVERAGE 0x1c ++#define DM_DIG_MAX_OF_MIN_COVERAGE 0x22 ++ ++#define DM_DIG_TP_Target_TH0 500 ++#define DM_DIG_TP_Target_TH1 1000 ++#define DM_DIG_TP_Training_Period 10 ++#endif ++ ++//vivi 92c&92d has different definition, 20110504 ++//this is for 92c ++#if (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++ #define DM_DIG_FA_TH0 0x80//0x20 ++ #else ++ #define DM_DIG_FA_TH0 0x200//0x20 ++ #endif ++#else ++ #define DM_DIG_FA_TH0 0x200//0x20 ++#endif ++ ++#define DM_DIG_FA_TH1 0x300 ++#define DM_DIG_FA_TH2 0x400 ++//this is for 92d ++#define DM_DIG_FA_TH0_92D 0x100 ++#define DM_DIG_FA_TH1_92D 0x400 ++#define DM_DIG_FA_TH2_92D 0x600 ++ ++#define DM_DIG_BACKOFF_MAX 12 ++#define DM_DIG_BACKOFF_MIN -4 ++#define DM_DIG_BACKOFF_DEFAULT 10 ++ ++#define DM_DIG_FA_TH0_LPS 4 //-> 4 in lps ++#define DM_DIG_FA_TH1_LPS 15 //-> 15 lps ++#define DM_DIG_FA_TH2_LPS 30 //-> 30 lps ++#define RSSI_OFFSET_DIG 0x05 ++ ++VOID ++ODM_ChangeDynamicInitGainThresh( ++ IN PVOID pDM_VOID, ++ IN u4Byte DM_Type, ++ IN u4Byte DM_Value ++ ); ++ ++VOID ++ODM_Write_DIG( ++ IN PVOID pDM_VOID, ++ IN u1Byte CurrentIGI ++ ); ++ ++VOID ++odm_PauseDIG( ++ IN PVOID pDM_VOID, ++ IN PHYDM_PAUSE_TYPE PauseType, ++ IN PHYDM_PAUSE_LEVEL pause_level, ++ IN u1Byte IGIValue ++ ); ++ ++VOID ++odm_DIGInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DIG( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DIGbyRSSI_LPS( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_FalseAlarmCounterStatistics( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_PauseCCKPacketDetection( ++ IN PVOID pDM_VOID, ++ IN PHYDM_PAUSE_TYPE PauseType, ++ IN PHYDM_PAUSE_LEVEL pause_level, ++ IN u1Byte CCKPDThreshold ++ ); ++ ++VOID ++odm_CCKPacketDetectionThresh( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++ODM_Write_CCK_CCA_Thres( ++ IN PVOID pDM_VOID, ++ IN u1Byte CurCCK_CCAThres ++ ); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++odm_MPT_DIGCallback( ++ PRT_TIMER pTimer ++); ++ ++VOID ++odm_MPT_DIGWorkItemCallback( ++ IN PVOID pContext ++ ); ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++VOID ++odm_MPT_DIGCallback( ++ IN PVOID pDM_VOID ++); ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE != ODM_CE) ++VOID ++ODM_MPT_DIG( ++ IN PVOID pDM_VOID ++); ++#endif ++ ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamicbbpowersaving.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamicbbpowersaving.c +new file mode 100644 +index 0000000..ab01c47 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamicbbpowersaving.c +@@ -0,0 +1,219 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++VOID ++odm_DynamicBBPowerSavingInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; ++ ++ pDM_PSTable->PreCCAState = CCA_MAX; ++ pDM_PSTable->CurCCAState = CCA_MAX; ++ pDM_PSTable->PreRFState = RF_MAX; ++ pDM_PSTable->CurRFState = RF_MAX; ++ pDM_PSTable->Rssi_val_min = 0; ++ pDM_PSTable->initialize = 0; ++} ++ ++ ++VOID ++odm_DynamicBBPowerSaving( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ++ if (pDM_Odm->SupportICType != ODM_RTL8723A) ++ return; ++ if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) ++ return; ++ if(!(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE))) ++ return; ++ ++ //1 2.Power Saving for 92C ++ if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) ++ { ++ odm_1R_CCA(pDM_Odm); ++ } ++ ++ // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. ++ // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns. ++ //1 3.Power Saving for 88C ++ else ++ { ++ ODM_RF_Saving(pDM_Odm, FALSE); ++ } ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++} ++ ++VOID ++odm_1R_CCA( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; ++ ++ if(pDM_Odm->RSSI_Min!= 0xFF) ++ { ++ ++ if(pDM_PSTable->PreCCAState == CCA_2R) ++ { ++ if(pDM_Odm->RSSI_Min >= 35) ++ pDM_PSTable->CurCCAState = CCA_1R; ++ else ++ pDM_PSTable->CurCCAState = CCA_2R; ++ ++ } ++ else{ ++ if(pDM_Odm->RSSI_Min <= 30) ++ pDM_PSTable->CurCCAState = CCA_2R; ++ else ++ pDM_PSTable->CurCCAState = CCA_1R; ++ } ++ } ++ else{ ++ pDM_PSTable->CurCCAState=CCA_MAX; ++ } ++ ++ if(pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState) ++ { ++ if(pDM_PSTable->CurCCAState == CCA_1R) ++ { ++ if( pDM_Odm->RFType ==ODM_2T2R ) ++ { ++ ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13); ++ //PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23); ++ //PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 ++ } ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33); ++ //PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); ++ } ++ pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState; ++ } ++} ++ ++void ++ODM_RF_Saving( ++ IN PVOID pDM_VOID, ++ IN u1Byte bForceInNormal ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; ++ u1Byte Rssi_Up_bound = 30 ; ++ u1Byte Rssi_Low_bound = 25; ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV ++ { ++ Rssi_Up_bound = 50 ; ++ Rssi_Low_bound = 45; ++ } ++#endif ++ if(pDM_PSTable->initialize == 0){ ++ ++ pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; ++ pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3; ++ pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24; ++ pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12; ++ //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); ++ pDM_PSTable->initialize = 1; ++ } ++ ++ if(!bForceInNormal) ++ { ++ if(pDM_Odm->RSSI_Min != 0xFF) ++ { ++ if(pDM_PSTable->PreRFState == RF_Normal) ++ { ++ if(pDM_Odm->RSSI_Min >= Rssi_Up_bound) ++ pDM_PSTable->CurRFState = RF_Save; ++ else ++ pDM_PSTable->CurRFState = RF_Normal; ++ } ++ else{ ++ if(pDM_Odm->RSSI_Min <= Rssi_Low_bound) ++ pDM_PSTable->CurRFState = RF_Normal; ++ else ++ pDM_PSTable->CurRFState = RF_Save; ++ } ++ } ++ else ++ pDM_PSTable->CurRFState=RF_MAX; ++ } ++ else ++ { ++ pDM_PSTable->CurRFState = RF_Normal; ++ } ++ ++ if(pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) ++ { ++ if(pDM_PSTable->CurRFState == RF_Save) ++ { ++ // 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode. ++ // Suggested by SD3 Yu-Nan. 2011.01.20. ++ if(pDM_Odm->SupportICType == ODM_RTL8723A) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); //Reg874[5]=1b'1 ++ } ++ ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 ++ ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); //RegC70[3]=1'b0 ++ ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 ++ ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); //Reg874[15:14]=2'b10 ++ ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874); ++ ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70); ++ ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); ++ ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74); ++ ODM_SetBBReg(pDM_Odm,0x818, BIT28, 0x0); ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8723A) ++ { ++ ODM_SetBBReg(pDM_Odm,0x874 , BIT5, 0x0); //Reg874[5]=1b'0 ++ } ++ } ++ pDM_PSTable->PreRFState =pDM_PSTable->CurRFState; ++ } ++#endif ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamicbbpowersaving.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamicbbpowersaving.h +new file mode 100644 +index 0000000..365c171 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamicbbpowersaving.h +@@ -0,0 +1,63 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMDYNAMICBBPOWERSAVING_H__ ++#define __PHYDMDYNAMICBBPOWERSAVING_H__ ++ ++#define DYNAMIC_BBPWRSAV_VERSION "1.0" ++ ++typedef struct _Dynamic_Power_Saving_ ++{ ++ u1Byte PreCCAState; ++ u1Byte CurCCAState; ++ ++ u1Byte PreRFState; ++ u1Byte CurRFState; ++ ++ int Rssi_val_min; ++ ++ u1Byte initialize; ++ u4Byte Reg874,RegC70,Reg85C,RegA74; ++ ++}PS_T,*pPS_T; ++ ++#define dm_RF_Saving ODM_RF_Saving ++ ++void ODM_RF_Saving( ++ IN PVOID pDM_VOID, ++ IN u1Byte bForceInNormal ++); ++ ++VOID ++odm_DynamicBBPowerSavingInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicBBPowerSaving( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_1R_CCA( ++ IN PVOID pDM_VOID ++ ); ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamictxpower.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamictxpower.c +new file mode 100644 +index 0000000..7a9d3ec +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamictxpower.c +@@ -0,0 +1,633 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++VOID ++odm_DynamicTxPowerInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ #if DEV_BUS_TYPE==RT_USB_INTERFACE ++ if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power) ++ { ++ odm_DynamicTxPowerSavePowerIndex(pDM_Odm); ++ pMgntInfo->bDynamicTxPowerEnable = TRUE; ++ } ++ else ++ #else ++ //so 92c pci do not need dynamic tx power? vivi check it later ++ if(IS_HARDWARE_TYPE_8192D(Adapter)) ++ pMgntInfo->bDynamicTxPowerEnable = TRUE; ++ else ++ pMgntInfo->bDynamicTxPowerEnable = FALSE; ++ #endif ++ ++ ++ pHalData->LastDTPLvl = TxHighPwrLevel_Normal; ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ++ ++#endif ++ ++} ++ ++VOID ++odm_DynamicTxPowerSavePowerIndex( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ u1Byte index; ++ u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ for(index = 0; index< 6; index++) ++ pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]); ++ ++ ++#endif ++#endif ++} ++ ++VOID ++odm_DynamicTxPowerRestorePowerIndex( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ u1Byte index; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ for(index = 0; index< 6; index++) ++ PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]); ++ ++ ++#endif ++#endif ++} ++ ++VOID ++odm_DynamicTxPowerWritePowerIndex( ++ IN PVOID pDM_VOID, ++ IN u1Byte Value) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte index; ++ u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++ ++ for(index = 0; index< 6; index++) ++ //PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value); ++ ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value); ++ ++} ++ ++ ++VOID ++odm_DynamicTxPower( ++ IN PVOID pDM_VOID ++ ) ++{ ++ // ++ // For AP/ADSL use prtl8192cd_priv ++ // For CE/NIC use PADAPTER ++ // ++ //PADAPTER pAdapter = pDM_Odm->Adapter; ++// prtl8192cd_priv priv = pDM_Odm->priv; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) ++ return; ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ switch (pDM_Odm->SupportPlatform) ++ { ++ case ODM_WIN: ++ case ODM_CE: ++ odm_DynamicTxPowerNIC(pDM_Odm); ++ break; ++ case ODM_AP: ++ odm_DynamicTxPowerAP(pDM_Odm); ++ break; ++ ++ case ODM_ADSL: ++ //odm_DIGAP(pDM_Odm); ++ break; ++ } ++ ++ ++} ++ ++ ++VOID ++odm_DynamicTxPowerNIC( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) ++ return; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8192C) ++ { ++ odm_DynamicTxPower_92C(pDM_Odm); ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ odm_DynamicTxPower_92D(pDM_Odm); ++ } ++ else if (pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); ++ ++ if (pMgntInfo->RegRspPwr == 1) ++ { ++ if(pDM_Odm->RSSI_Min > 60) ++ { ++ ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 1); // Resp TXAGC offset = -3dB ++ ++ } ++ else if(pDM_Odm->RSSI_Min < 55) ++ { ++ ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 0); // Resp TXAGC offset = 0dB ++ } ++ } ++#endif ++ } ++#endif ++} ++ ++VOID ++odm_DynamicTxPowerAP( ++ IN PVOID pDM_VOID ++ ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++//#if ((RTL8192C_SUPPORT==1) || (RTL8192D_SUPPORT==1) || (RTL8188E_SUPPORT==1) || (RTL8812E_SUPPORT==1)) ++ ++ ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ s4Byte i; ++ s2Byte pwr_thd = TX_POWER_NEAR_FIELD_THRESH_AP; ++ ++ if(!priv->pshare->rf_ft_var.tx_pwr_ctrl) ++ return; ++ ++#if ((RTL8812E_SUPPORT==1) || (RTL8881A_SUPPORT==1) || (RTL8814A_SUPPORT==1)) ++ if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A)) ++ pwr_thd = TX_POWER_NEAR_FIELD_THRESH_8812; ++#endif ++ ++#if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT) ++ if(CHIP_VER_92X_SERIES(priv)) ++ { ++#ifdef HIGH_POWER_EXT_PA ++ if(pDM_Odm->ExtPA) ++ tx_power_control(priv); ++#endif ++ } ++#endif ++ /* ++ * Check if station is near by to use lower tx power ++ */ ++ ++ if ((priv->up_time % 3) == 0 ) { ++ int disable_pwr_ctrl = ((pDM_Odm->FalseAlmCnt.Cnt_all > 1000 ) || ((pDM_Odm->FalseAlmCnt.Cnt_all > 300 ) && ((RTL_R8(0xc50) & 0x7f) >= 0x32))) ? 1 : 0; ++ ++ for(i=0; ipODM_StaInfo[i]; ++ if(IS_STA_VALID(pstat) ) { ++ if(disable_pwr_ctrl) ++ pstat->hp_level = 0; ++ else if ((pstat->hp_level == 0) && (pstat->rssi > pwr_thd)) ++ pstat->hp_level = 1; ++ else if ((pstat->hp_level == 1) && (pstat->rssi < (pwr_thd-8))) ++ pstat->hp_level = 0; ++ } ++ } ++ ++#if defined(CONFIG_WLAN_HAL_8192EE) ++ if (GET_CHIP_VER(priv) == VERSION_8192E) { ++ if( !disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff) ) { ++ if(pDM_Odm->RSSI_Min > pwr_thd) ++ RRSR_power_control_11n(priv, 1 ); ++ else if(pDM_Odm->RSSI_Min < (pwr_thd-8)) ++ RRSR_power_control_11n(priv, 0 ); ++ } else { ++ RRSR_power_control_11n(priv, 0 ); ++ } ++ } ++#endif ++ ++#ifdef CONFIG_WLAN_HAL_8814AE ++ if (GET_CHIP_VER(priv) == VERSION_8814A) { ++ if (!disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff)) { ++ if (pDM_Odm->RSSI_Min > pwr_thd) ++ RRSR_power_control_14(priv, 1); ++ else if (pDM_Odm->RSSI_Min < (pwr_thd-8)) ++ RRSR_power_control_14(priv, 0); ++ } else { ++ RRSR_power_control_14(priv, 0); ++ } ++ } ++#endif ++ ++ } ++//#endif ++ ++#endif ++} ++ ++ ++VOID ++odm_DynamicTxPower_92C( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ s4Byte UndecoratedSmoothedPWDB; ++ ++ // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. ++ if (pDM_Odm->ExtPA == FALSE) ++ return; ++ ++ // STA not connected and AP not connected ++ if((!pMgntInfo->bMediaConnect) && ++ (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n")); ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ++ //the LastDTPlvl should reset when disconnect, ++ //otherwise the tx power level wouldn't change when disconnect and connect again. ++ // Maddest 20091220. ++ pHalData->LastDTPLvl=TxHighPwrLevel_Normal; ++ return; ++ } ++ ++#if (INTEL_PROXIMITY_SUPPORT == 1) ++ // Intel set fixed tx power ++ if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0) ++ { ++ switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){ ++ case 1: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); ++ break; ++ case 2: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_70; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_70\n")); ++ break; ++ case 3: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_50; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_50\n")); ++ break; ++ case 4: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_35; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_35\n")); ++ break; ++ case 5: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_15; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_15\n")); ++ break; ++ default: ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); ++ break; ++ } ++ } ++ else ++#endif ++ { ++ if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || ++ pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ } ++ else ++ { ++ if(pMgntInfo->bMediaConnect) // Default port ++ { ++ if(ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter)) ++ { ++ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ else ++ { ++ UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ } ++ else // associated entry pwdb ++ { ++ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ ++ if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); ++ } ++ else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && ++ (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); ++ } ++ else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); ++ } ++ } ++ } ++ if( pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl ) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192C() Channel = %d \n" , pHalData->CurrentChannel)); ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ if( (pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) && ++ (pHalData->LastDTPLvl == TxHighPwrLevel_Level1 || pHalData->LastDTPLvl == TxHighPwrLevel_Level2)) //TxHighPwrLevel_Normal ++ odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); ++ else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) ++ odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); ++ else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) ++ odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); ++ } ++ pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; ++ ++ ++ ++ ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++} ++ ++ ++VOID ++odm_DynamicTxPower_92D( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (RTL8192D_SUPPORT==1) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ s4Byte UndecoratedSmoothedPWDB; ++ ++ PADAPTER BuddyAdapter = Adapter->BuddyAdapter; ++ BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter); ++ u1Byte HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; ++ ++ // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. ++ if (pDM_Odm->ExtPA == FALSE) ++ return; ++ ++ // If dynamic high power is disabled. ++ if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || ++ pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ return; ++ } ++ ++ // STA not connected and AP not connected ++ if((!pMgntInfo->bMediaConnect) && ++ (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n")); ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ++ //the LastDTPlvl should reset when disconnect, ++ //otherwise the tx power level wouldn't change when disconnect and connect again. ++ // Maddest 20091220. ++ pHalData->LastDTPLvl=TxHighPwrLevel_Normal; ++ return; ++ } ++ ++ if(pMgntInfo->bMediaConnect) // Default port ++ { ++ if(ACTING_AS_AP(Adapter) || pMgntInfo->mIbss) ++ { ++ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ else ++ { ++ UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ } ++ else // associated entry pwdb ++ { ++ UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ ++ if(IS_HARDWARE_TYPE_8192D(Adapter) && GET_HAL_DATA(Adapter)->CurrentBandType == 1){ ++ if(UndecoratedSmoothedPWDB >= 0x33) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); ++ } ++ else if((UndecoratedSmoothedPWDB <0x33) && ++ (UndecoratedSmoothedPWDB >= 0x2b) ) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); ++ } ++ else if(UndecoratedSmoothedPWDB < 0x2b) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); ++ } ++ ++ } ++ else ++ ++ { ++ if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); ++ } ++ else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && ++ (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); ++ } ++ else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) ++ { ++ pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); ++ } ++ ++ } ++ ++//sherry delete flag 20110517 ++ if(bGetValueFromBuddyAdapter) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); ++ if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() change value \n")); ++ HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; ++ pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; ++ Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = FALSE; ++ } ++ } ++ ++ if( (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) ) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); ++ if(Adapter->DualMacSmartConcurrent == TRUE) ++ { ++ if(BuddyAdapter == NULL) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); ++ if(!Adapter->bSlaveOfDMSP) ++ { ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ } ++ } ++ else ++ { ++ if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); ++ if(Adapter->bSlaveOfDMSP) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); ++ BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = TRUE; ++ BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() master case \n")); ++ if(!bGetValueFromBuddyAdapter) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ } ++ } ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ } ++ } ++ } ++ else ++ { ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ } ++ ++ } ++ pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; ++ ++ ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#endif ++} ++ ++VOID ++odm_DynamicTxPower_8821( ++ IN PVOID pDM_VOID, ++ IN pu1Byte pDesc, ++ IN u1Byte macId ++ ) ++{ ++#if (RTL8821A_SUPPORT == 1) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PSTA_INFO_T pEntry; ++ u1Byte reg0xc56_byte; ++ u1Byte reg0xe56_byte; ++ u1Byte txpwr_offset = 0; ++ ++ pEntry = pDM_Odm->pODM_StaInfo[macId]; ++ ++ reg0xc56_byte = ODM_Read1Byte(pDM_Odm, 0xc56); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("reg0xc56_byte=%d\n", reg0xc56_byte)); ++ ++ if (pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB > 85) { ++ ++ /* Avoid TXAGC error after TX power offset is applied. ++ For example: Reg0xc56=0x6, if txpwr_offset=3( reduce 11dB ) ++ Total power = 6-11= -5( overflow!! ), PA may be burned ! ++ so txpwr_offset should be adjusted by Reg0xc56*/ ++ ++ if (reg0xc56_byte < 7) ++ txpwr_offset = 1; ++ else if (reg0xc56_byte < 11) ++ txpwr_offset = 2; ++ else ++ txpwr_offset = 3; ++ ++ SET_TX_DESC_TX_POWER_OFFSET_8812(pDesc, txpwr_offset); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_DynamicTxPower_8821: RSSI=%d, txpwr_offset=%d\n", pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB, txpwr_offset)); ++ ++ } else{ ++ SET_TX_DESC_TX_POWER_OFFSET_8812(pDesc, txpwr_offset); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_DynamicTxPower_8821: RSSI=%d, txpwr_offset=%d\n", pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB, txpwr_offset)); ++ ++ } ++#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ ++#endif /*#if (RTL8821A_SUPPORT==1)*/ ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamictxpower.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamictxpower.h +new file mode 100644 +index 0000000..db61bf8 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_dynamictxpower.h +@@ -0,0 +1,98 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMDYNAMICTXPOWER_H__ ++#define __PHYDMDYNAMICTXPOWER_H__ ++ ++/*#define DYNAMIC_TXPWR_VERSION "1.0"*/ ++#define DYNAMIC_TXPWR_VERSION "1.1" /*2015.01.13*/ ++ ++#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 ++#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 ++#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F ++#define TX_POWER_NEAR_FIELD_THRESH_8812 60 ++ ++#define TxHighPwrLevel_Normal 0 ++#define TxHighPwrLevel_Level1 1 ++#define TxHighPwrLevel_Level2 2 ++#define TxHighPwrLevel_BT1 3 ++#define TxHighPwrLevel_BT2 4 ++#define TxHighPwrLevel_15 5 ++#define TxHighPwrLevel_35 6 ++#define TxHighPwrLevel_50 7 ++#define TxHighPwrLevel_70 8 ++#define TxHighPwrLevel_100 9 ++ ++VOID ++odm_DynamicTxPowerInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPowerRestorePowerIndex( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPowerNIC( ++ IN PVOID pDM_VOID ++ ); ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++VOID ++odm_DynamicTxPowerSavePowerIndex( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPowerWritePowerIndex( ++ IN PVOID pDM_VOID, ++ IN u1Byte Value); ++ ++VOID ++odm_DynamicTxPower_92C( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPower_92D( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPower_8821( ++ IN PVOID pDM_VOID, ++ IN pu1Byte pDesc, ++ IN u1Byte macId ++ ); ++ ++#endif ++ ++VOID ++odm_DynamicTxPower( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_DynamicTxPowerAP( ++ IN PVOID pDM_VOID ++ ); ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_edcaturbocheck.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_edcaturbocheck.c +new file mode 100644 +index 0000000..6d3dc6d +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_edcaturbocheck.c +@@ -0,0 +1,835 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++VOID ++ODM_EdcaTurboInit( ++ IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) ++ PADAPTER Adapter = NULL; ++ HAL_DATA_TYPE *pHalData = NULL; ++ ++ if(pDM_Odm->Adapter==NULL) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n")); ++ return; ++ } ++ ++ Adapter=pDM_Odm->Adapter; ++ pHalData=GET_HAL_DATA(Adapter); ++ ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; ++ pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; ++ pHalData->bIsAnyNonBEPkts = FALSE; ++ ++#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; ++ pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; ++ Adapter->recvpriv.bIsAnyNonBEPkts =FALSE; ++ ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM))); ++ ++ ++} // ODM_InitEdcaTurbo ++ ++VOID ++odm_EdcaTurboCheck( ++ IN PVOID pDM_VOID ++ ) ++{ ++ // ++ // For AP/ADSL use prtl8192cd_priv ++ // For CE/NIC use PADAPTER ++ // ++ ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n")); ++ ++ if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO )) ++ return; ++ ++ switch (pDM_Odm->SupportPlatform) ++ { ++ case ODM_WIN: ++ ++#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) ++ odm_EdcaTurboCheckMP(pDM_Odm); ++#endif ++ break; ++ ++ case ODM_CE: ++#if(DM_ODM_SUPPORT_TYPE==ODM_CE) ++ odm_EdcaTurboCheckCE(pDM_Odm); ++#endif ++ break; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n")); ++ ++} // odm_CheckEdcaTurbo ++ ++#if(DM_ODM_SUPPORT_TYPE==ODM_CE) ++ ++ ++VOID ++odm_EdcaTurboCheckCE( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ u32 EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; ++ u32 EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; ++ u32 ICType=pDM_Odm->SupportICType; ++ u32 IOTPeer=0; ++ u8 WirelessMode=0xFF; //invalid value ++ u32 trafficIndex; ++ u32 edca_param; ++ u64 cur_tx_bytes = 0; ++ u64 cur_rx_bytes = 0; ++ u8 bbtchange = _FALSE; ++ u8 bBiasOnRx = _FALSE; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct recv_priv *precvpriv = &(Adapter->recvpriv); ++ struct registry_priv *pregpriv = &Adapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(pDM_Odm->bLinked != _TRUE) ++ { ++ precvpriv->bIsAnyNonBEPkts = _FALSE; ++ return; ++ } ++ ++ if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0)) ++ { ++ precvpriv->bIsAnyNonBEPkts = _FALSE; ++ return; ++ } ++ ++ if(pDM_Odm->pWirelessMode!=NULL) ++ WirelessMode=*(pDM_Odm->pWirelessMode); ++ ++ IOTPeer = pmlmeinfo->assoc_AP_vendor; ++ ++ if (IOTPeer >= HT_IOT_PEER_MAX) ++ { ++ precvpriv->bIsAnyNonBEPkts = _FALSE; ++ return; ++ } ++ ++ if( (pDM_Odm->SupportICType == ODM_RTL8192C) || ++ (pDM_Odm->SupportICType == ODM_RTL8723A) || ++ (pDM_Odm->SupportICType == ODM_RTL8188E)) ++ { ++ if((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS)) ++ bBiasOnRx = _TRUE; ++ } ++ ++ // Check if the status needs to be changed. ++ if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) ++ { ++ cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes; ++ cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes; ++ ++ //traffic, TX or RX ++ if(bBiasOnRx) ++ { ++ if (cur_tx_bytes > (cur_rx_bytes << 2)) ++ { // Uplink TP is present. ++ trafficIndex = UP_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ } ++ else ++ { ++ if (cur_rx_bytes > (cur_tx_bytes << 2)) ++ { // Downlink TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = UP_LINK; ++ } ++ } ++ ++ //if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) ++ { ++ if (ICType == ODM_RTL8192D) { ++ // Single PHY ++ if (pDM_Odm->RFType == ODM_2T2R) { ++ EDCA_BE_UL = 0x60a42b; //0x5ea42b; ++ EDCA_BE_DL = 0x60a42b; //0x5ea42b; ++ } else { ++ EDCA_BE_UL = 0x6ea42b; ++ EDCA_BE_DL = 0x6ea42b; ++ } ++ } ++ else ++ { ++ if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) { ++ if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { ++ EDCA_BE_UL = 0x60a42b; ++ EDCA_BE_DL = 0x60a42b; ++ } else { ++ EDCA_BE_UL = 0x6ea42b; ++ EDCA_BE_DL = 0x6ea42b; ++ } ++ } ++ } ++ ++ //92D txop can't be set to 0x3e for cisco1250 ++ if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) ++ { ++ EDCA_BE_DL = edca_setting_DL[IOTPeer]; ++ EDCA_BE_UL = edca_setting_UL[IOTPeer]; ++ } ++ //merge from 92s_92c_merge temp brunch v2445 20120215 ++ else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) ++ { ++ EDCA_BE_DL = edca_setting_DL_GMode[IOTPeer]; ++ } ++ else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) ++ { ++ EDCA_BE_DL = 0xa630; ++ } ++ else if(IOTPeer == HT_IOT_PEER_MARVELL) ++ { ++ EDCA_BE_DL = edca_setting_DL[IOTPeer]; ++ EDCA_BE_UL = edca_setting_UL[IOTPeer]; ++ } ++ else if(IOTPeer == HT_IOT_PEER_ATHEROS) ++ { ++ // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. ++ EDCA_BE_DL = edca_setting_DL[IOTPeer]; ++ } ++ ++ if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8821)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE ++ { ++ EDCA_BE_UL = 0x5ea42b; ++ EDCA_BE_DL = 0x5ea42b; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x",EDCA_BE_UL,EDCA_BE_DL)); ++ } ++ ++ if (trafficIndex == DOWN_LINK) ++ edca_param = EDCA_BE_DL; ++ else ++ edca_param = EDCA_BE_UL; ++ ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); ++ ++ pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; ++ } ++ ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE; ++ } ++ else ++ { ++ // ++ // Turn Off EDCA turbo here. ++ // Restore original EDCA according to the declaration of AP. ++ // ++ if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) ++ { ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE; ++ } ++ } ++ ++} ++ ++ ++#elif(DM_ODM_SUPPORT_TYPE==ODM_WIN) ++VOID ++odm_EdcaTurboCheckMP( ++ IN PVOID pDM_VOID ++ ) ++{ ++ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); ++ PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos; ++ //[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn ++ u8Byte Ext_curTxOkCnt = 0; ++ u8Byte Ext_curRxOkCnt = 0; ++ //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. ++ u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; ++ ++ // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. ++ u8Byte curTxOkCnt = 0; ++ u8Byte curRxOkCnt = 0; ++ u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; ++ u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; ++ u4Byte EDCA_BE = 0x5ea42b; ++ u1Byte IOTPeer=0; ++ BOOLEAN *pbIsCurRDLState=NULL; ++ BOOLEAN bLastIsCurRDLState=FALSE; ++ BOOLEAN bBiasOnRx=FALSE; ++ BOOLEAN bEdcaTurboOn=FALSE; ++ u1Byte TxRate = 0xFF; ++ u8Byte value64; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); ++ ++////=============================== ++////list paramter for different platform ++////=============================== ++ bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState; ++ pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState); ++ ++ //2012/09/14 MH Add ++ if (pMgntInfo->NumNonBePkt > pMgntInfo->RegEdcaThresh && !Adapter->MgntInfo.bWiFiConfg) ++ pHalData->bIsAnyNonBEPkts = TRUE; ++ ++ pMgntInfo->NumNonBePkt = 0; ++ ++ // Caculate TX/RX TP: ++ //curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; ++ //curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; ++ curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pDM_Odm->lastTxOkCnt; ++ curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pDM_Odm->lastRxOkCnt; ++ pDM_Odm->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; ++ pDM_Odm->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; ++ ++ if(pExtAdapter == NULL) ++ pExtAdapter = pDefaultAdapter; ++ ++ Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt; ++ Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt; ++ GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); ++ //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. ++ if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) ++ { ++ curTxOkCnt = Ext_curTxOkCnt ; ++ curRxOkCnt = Ext_curRxOkCnt ; ++ } ++ // ++ IOTPeer=pMgntInfo->IOTPeer; ++ bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE; ++ bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts))?TRUE:FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx \n",pHalData->bIsAnyNonBEPkts)); ++ ++ ++////=============================== ++////check if edca turbo is disabled ++////=============================== ++ if(odm_IsEdcaTurboDisable(pDM_Odm)) ++ { ++ pHalData->bIsAnyNonBEPkts = FALSE; ++ pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; ++ pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; ++ pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast; ++ pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast; ++ ++ } ++ ++////=============================== ++////remove iot case out ++////=============================== ++ ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL); ++ ++ ++////=============================== ++////Check if the status needs to be changed. ++////=============================== ++ if(bEdcaTurboOn) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt)); ++ if(bBiasOnRx) ++ odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState); ++ else ++ odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState); ++ ++//modify by Guo.Mingzhi 2011-12-29 ++ EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; ++ if(IS_HARDWARE_TYPE_8821U(Adapter)) ++ { ++ if(pMgntInfo->RegTxDutyEnable) ++ { ++ //2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle) ++ if(!pMgntInfo->ForcedDataRate) //auto rate ++ { ++ if(pDM_Odm->TxRate != 0xFF) ++ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); ++ } ++ else //force rate ++ { ++ TxRate = (u1Byte) pMgntInfo->ForcedDataRate; ++ } ++ ++ value64 = (curRxOkCnt<<2); ++ if(curTxOkCnt < value64) //Downlink ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ else //Uplink ++ { ++ /*DbgPrint("pRFCalibrateInfo->ThermalValue = 0x%X\n", pRFCalibrateInfo->ThermalValue);*/ ++ /*if(pRFCalibrateInfo->ThermalValue < pHalData->EEPROMThermalMeter)*/ ++ if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ else ++ { ++ switch (TxRate) ++ { ++ case MGN_VHT1SS_MCS6: ++ case MGN_VHT1SS_MCS5: ++ case MGN_MCS6: ++ case MGN_MCS5: ++ case MGN_48M: ++ case MGN_54M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea42b); ++ break; ++ case MGN_VHT1SS_MCS4: ++ case MGN_MCS4: ++ case MGN_36M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa42b); ++ break; ++ case MGN_VHT1SS_MCS3: ++ case MGN_MCS3: ++ case MGN_24M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa47f); ++ break; ++ case MGN_VHT1SS_MCS2: ++ case MGN_MCS2: ++ case MGN_18M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa57f); ++ break; ++ case MGN_VHT1SS_MCS1: ++ case MGN_MCS1: ++ case MGN_9M: ++ case MGN_12M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa77f); ++ break; ++ case MGN_VHT1SS_MCS0: ++ case MGN_MCS0: ++ case MGN_6M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); ++ break; ++ default: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ break; ++ } ++ } ++ } ++ } ++ else ++ { ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ } ++ ++ } ++ else if (IS_HARDWARE_TYPE_8812AU(Adapter)){ ++ if(pMgntInfo->RegTxDutyEnable) ++ { ++ //2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle) ++ // it;s the same issue as 8811AU ++ if(!pMgntInfo->ForcedDataRate) //auto rate ++ { ++ if(pDM_Odm->TxRate != 0xFF) ++ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); ++ } ++ else //force rate ++ { ++ TxRate = (u1Byte) pMgntInfo->ForcedDataRate; ++ } ++ ++ value64 = (curRxOkCnt<<2); ++ if(curTxOkCnt < value64) //Downlink ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ else //Uplink ++ { ++ /*DbgPrint("pRFCalibrateInfo->ThermalValue = 0x%X\n", pRFCalibrateInfo->ThermalValue);*/ ++ /*if(pRFCalibrateInfo->ThermalValue < pHalData->EEPROMThermalMeter)*/ ++ if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ else ++ { ++ switch (TxRate) ++ { ++ case MGN_VHT2SS_MCS9: ++ case MGN_VHT1SS_MCS9: ++ case MGN_VHT1SS_MCS8: ++ case MGN_MCS15: ++ case MGN_MCS7: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea44f); ++ case MGN_VHT2SS_MCS8: ++ case MGN_VHT1SS_MCS7: ++ case MGN_MCS14: ++ case MGN_MCS6: ++ case MGN_54M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa44f); ++ case MGN_VHT2SS_MCS7: ++ case MGN_VHT2SS_MCS6: ++ case MGN_VHT1SS_MCS6: ++ case MGN_VHT1SS_MCS5: ++ case MGN_MCS13: ++ case MGN_MCS5: ++ case MGN_48M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa630); ++ break; ++ case MGN_VHT2SS_MCS5: ++ case MGN_VHT2SS_MCS4: ++ case MGN_VHT1SS_MCS4: ++ case MGN_VHT1SS_MCS3: ++ case MGN_MCS12: ++ case MGN_MCS4: ++ case MGN_MCS3: ++ case MGN_36M: ++ case MGN_24M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa730); ++ break; ++ case MGN_VHT2SS_MCS3: ++ case MGN_VHT2SS_MCS2: ++ case MGN_VHT2SS_MCS1: ++ case MGN_VHT1SS_MCS2: ++ case MGN_VHT1SS_MCS1: ++ case MGN_MCS11: ++ case MGN_MCS10: ++ case MGN_MCS9: ++ case MGN_MCS2: ++ case MGN_MCS1: ++ case MGN_18M: ++ case MGN_12M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa830); ++ break; ++ case MGN_VHT2SS_MCS0: ++ case MGN_VHT1SS_MCS0: ++ case MGN_MCS0: ++ case MGN_MCS8: ++ case MGN_9M: ++ case MGN_6M: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); ++ break; ++ default: ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ break; ++ } ++ } ++ } ++ } ++ else ++ { ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ } ++ } ++ else ++ ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE)); ++ ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE)); ++ ++ } ++ else ++ { ++ // Turn Off EDCA turbo here. ++ // Restore original EDCA according to the declaration of AP. ++ if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) ++ { ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) ); ++ ++ pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE)); ++ ++ } ++ } ++ ++} ++ ++ ++//check if edca turbo is disabled ++BOOLEAN ++odm_IsEdcaTurboDisable( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ u4Byte IOTPeer=pMgntInfo->IOTPeer; ++ ++ if(pDM_Odm->bBtDisableEdcaTurbo) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n")); ++ return TRUE; ++ } ++ ++ if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))|| ++ (pDM_Odm->bWIFITest)|| ++ (IOTPeer>= HT_IOT_PEER_MAX)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n")); ++ return TRUE; ++ } ++ ++ ++ // 1. We do not turn on EDCA turbo mode for some AP that has IOT issue ++ // 2. User may disable EDCA Turbo mode with OID settings. ++ if(pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO){ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n")); ++ return TRUE; ++ } ++ ++ return FALSE; ++ ++ ++} ++ ++//add iot case here: for MP/CE ++VOID ++ODM_EdcaParaSelByIot( ++ IN PVOID pDM_VOID, ++ OUT u4Byte *EDCA_BE_UL, ++ OUT u4Byte *EDCA_BE_DL ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u4Byte IOTPeer=0; ++ u4Byte ICType=pDM_Odm->SupportICType; ++ u1Byte WirelessMode=0xFF; //invalid value ++ u4Byte RFType=pDM_Odm->RFType; ++ u4Byte IOTPeerSubType = 0; ++ ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; ++ ++ if(pDM_Odm->pWirelessMode!=NULL) ++ WirelessMode=*(pDM_Odm->pWirelessMode); ++ ++/////////////////////////////////////////////////////////// ++////list paramter for different platform ++ ++ IOTPeer=pMgntInfo->IOTPeer; ++ IOTPeerSubType=pMgntInfo->IOTPeerSubtype; ++ GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); ++ ++ ++ if(ICType==ODM_RTL8192D) ++ { ++ // Single PHY ++ if(pDM_Odm->RFType==ODM_2T2R) ++ { ++ (*EDCA_BE_UL) = 0x60a42b; //0x5ea42b; ++ (*EDCA_BE_DL) = 0x60a42b; //0x5ea42b; ++ ++ } ++ else ++ { ++ (*EDCA_BE_UL) = 0x6ea42b; ++ (*EDCA_BE_DL) = 0x6ea42b; ++ } ++ ++ } ++////============================ ++/// IOT case for MP ++////============================ ++ ++ else ++ { ++ ++ if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ ++ if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { ++ (*EDCA_BE_UL) = 0x60a42b; ++ (*EDCA_BE_DL) = 0x60a42b; ++ } ++ else ++ { ++ (*EDCA_BE_UL) = 0x6ea42b; ++ (*EDCA_BE_DL) = 0x6ea42b; ++ } ++ } ++ } ++ ++ if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) ++ { ++ (*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer]; ++ (*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer]; ++ } ++ ++ #if (INTEL_PROXIMITY_SUPPORT == 1) ++ if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE) ++ { ++ (*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f; ++ } ++ else ++ #endif ++ { ++ if((pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE))) ++ {// To check whether we shall force turn on TXOP configuration. ++ if(!((*EDCA_BE_UL) & 0xffff0000)) ++ (*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL. ++ if(!((*EDCA_BE_DL) & 0xffff0000)) ++ (*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL. ++ } ++ ++ //92D txop can't be set to 0x3e for cisco1250 ++ if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) ++ { ++ (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; ++ (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; ++ } ++ //merge from 92s_92c_merge temp brunch v2445 20120215 ++ else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) ++ { ++ (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; ++ } ++ else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) ++ { ++ (*EDCA_BE_DL) = 0xa630; ++ } ++ ++ else if(IOTPeer == HT_IOT_PEER_MARVELL) ++ { ++ (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; ++ (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; ++ } ++ else if(IOTPeer == HT_IOT_PEER_ATHEROS && IOTPeerSubType != HT_IOT_PEER_TPLINK_AC1750) ++ { ++ // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. ++ if(WirelessMode==ODM_WM_G) ++ (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; ++ else ++ (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; ++ ++ if(ICType == ODM_RTL8821) ++ (*EDCA_BE_DL) = 0x5ea630; ++ ++ } ++ } ++ ++ if((ICType == ODM_RTL8192D)&&(IOTPeerSubType == HT_IOT_PEER_LINKSYS_E4200_V1)&&((WirelessMode==ODM_WM_N5G))) ++ { ++ (*EDCA_BE_DL) = 0x432b; ++ (*EDCA_BE_UL) = 0x432b; ++ } ++ ++ ++ ++ if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE ++ { ++ (*EDCA_BE_UL) = 0x5ea42b; ++ (*EDCA_BE_DL) = 0x5ea42b; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n",(*EDCA_BE_UL),(*EDCA_BE_DL))); ++ } ++ ++ if((ICType==ODM_RTL8814A) && (IOTPeer == HT_IOT_PEER_REALTEK)) /*8814AU and 8814AR*/ ++ { ++ (*EDCA_BE_UL) = 0x5ea42b; ++ (*EDCA_BE_DL) = 0xa42b; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8814A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n",(*EDCA_BE_UL),(*EDCA_BE_DL))); ++ } ++ ++ ++ ++ // Revised for Atheros DIR-655 IOT issue to improve down link TP, added by Roger, 2013.03.22. ++ if((ICType == ODM_RTL8723A) && (IOTPeerSubType== HT_IOT_PEER_ATHEROS_DIR655) && ++ (pMgntInfo->dot11CurrentChannelNumber == 6)) ++ { ++ (*EDCA_BE_DL) = 0xa92b; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx, IOTPeer = %d\n",(*EDCA_BE_UL),(*EDCA_BE_DL), IOTPeer)); ++ ++} ++ ++ ++VOID ++odm_EdcaChooseTrafficIdx( ++ IN PVOID pDM_VOID, ++ IN u8Byte cur_tx_bytes, ++ IN u8Byte cur_rx_bytes, ++ IN BOOLEAN bBiasOnRx, ++ OUT BOOLEAN *pbIsCurRDLState ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if(bBiasOnRx) ++ { ++ ++ if(cur_tx_bytes>(cur_rx_bytes*4)) ++ { ++ *pbIsCurRDLState=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n ")); ++ ++ } ++ else ++ { ++ *pbIsCurRDLState=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); ++ ++ } ++ } ++ else ++ { ++ if(cur_rx_bytes>(cur_tx_bytes*4)) ++ { ++ *pbIsCurRDLState=TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n")); ++ ++ } ++ else ++ { ++ *pbIsCurRDLState=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); ++ } ++ } ++ ++ return ; ++} ++ ++#endif ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_edcaturbocheck.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_edcaturbocheck.h +new file mode 100644 +index 0000000..d4cd8d8 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_edcaturbocheck.h +@@ -0,0 +1,100 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMEDCATURBOCHECK_H__ ++#define __PHYDMEDCATURBOCHECK_H__ ++ ++/*#define EDCATURBO_VERSION "2.1"*/ ++#define EDCATURBO_VERSION "2.2" /*2015.01.13*/ ++ ++typedef struct _EDCA_TURBO_ ++{ ++ BOOLEAN bCurrentTurboEDCA; ++ BOOLEAN bIsCurRDLState; ++ ++ #if(DM_ODM_SUPPORT_TYPE == ODM_CE ) ++ u4Byte prv_traffic_idx; // edca turbo ++ #endif ++ ++}EDCA_T,*pEDCA_T; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] = ++// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU MARVELL 92U_AP SELF_AP(DownLink/Tx) ++{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322}; ++ ++ ++static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] = ++// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP(UpLink/Rx) ++{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b}; ++ ++static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] = ++// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP ++{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b}; ++ ++#endif ++ ++ ++ ++VOID ++odm_EdcaTurboCheck( ++ IN PVOID pDM_VOID ++ ); ++VOID ++ODM_EdcaTurboInit( ++ IN PVOID pDM_VOID ++); ++ ++#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) ++VOID ++odm_EdcaTurboCheckMP( ++ IN PVOID pDM_VOID ++ ); ++ ++//check if edca turbo is disabled ++BOOLEAN ++odm_IsEdcaTurboDisable( ++ IN PVOID pDM_VOID ++); ++//choose edca paramter for special IOT case ++VOID ++ODM_EdcaParaSelByIot( ++ IN PVOID pDM_VOID, ++ OUT u4Byte *EDCA_BE_UL, ++ OUT u4Byte *EDCA_BE_DL ++ ); ++//check if it is UL or DL ++VOID ++odm_EdcaChooseTrafficIdx( ++ IN PVOID pDM_VOID, ++ IN u8Byte cur_tx_bytes, ++ IN u8Byte cur_rx_bytes, ++ IN BOOLEAN bBiasOnRx, ++ OUT BOOLEAN *pbIsCurRDLState ++ ); ++ ++#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) ++VOID ++odm_EdcaTurboCheckCE( ++ IN PVOID pDM_VOID ++ ); ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_features.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_features.h +new file mode 100644 +index 0000000..639668e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_features.h +@@ -0,0 +1,119 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDM_FEATURES_H__ ++#define __PHYDM_FEATURES ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ /*Antenna Diversity*/ ++ #define CONFIG_PHYDM_ANTENNA_DIVERSITY ++ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY ++ ++ #if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) ++ #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ #endif ++ ++ #if (RTL8821A_SUPPORT == 1) ++ /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ ++ #endif ++ #endif ++ ++ /*#define CONFIG_PATH_DIVERSITY*/ ++ /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ ++ #define CONFIG_ANT_DETECTION ++ #define CONFIG_RA_DBG_CMD ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ /* [ Configure RA Debug H2C CMD ]*/ ++ #define CONFIG_RA_DBG_CMD ++ ++ /*#define CONFIG_PATH_DIVERSITY*/ ++ /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ ++ #define CONFIG_RA_DYNAMIC_RATE_ID ++ ++ /* [ Configure Antenna Diversity ] */ ++ #if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH) ++ #define CONFIG_PHYDM_ANTENNA_DIVERSITY ++ #define ODM_EVM_ENHANCE_ANTDIV ++ ++ /*----------*/ ++ ++ #if (!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) && !defined(CONFIG_2G_CGCS_RX_DIVERSITY) && !defined(CONFIG_2G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) ++ #define CONFIG_NO_2G_DIVERSITY ++ #endif ++ ++ #ifdef CONFIG_NO_5G_DIVERSITY_8881A ++ #define CONFIG_NO_5G_DIVERSITY ++ #elif defined(CONFIG_5G_CGCS_RX_DIVERSITY_8881A) ++ #define CONFIG_5G_CGCS_RX_DIVERSITY ++ #elif defined(CONFIG_5G_CG_TRX_DIVERSITY_8881A) ++ #define CONFIG_5G_CG_TRX_DIVERSITY ++ #elif defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) ++ #define CONFIG_2G5G_CG_TRX_DIVERSITY ++ #endif ++ #if (!defined(CONFIG_NO_5G_DIVERSITY) && !defined(CONFIG_5G_CGCS_RX_DIVERSITY) && !defined(CONFIG_5G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY) && !defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ++ #define CONFIG_NO_5G_DIVERSITY ++ #endif ++ /*----------*/ ++ #if (defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY)) ++ #define CONFIG_NOT_SUPPORT_ANTDIV ++ #elif (!defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY)) ++ #define CONFIG_2G_SUPPORT_ANTDIV ++ #elif (defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY)) ++ #define CONFIG_5G_SUPPORT_ANTDIV ++ #elif ((!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY)) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY)) ++ #define CONFIG_2G5G_SUPPORT_ANTDIV ++ #endif ++ /*----------*/ ++ #endif ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++ /*Antenna Diversity*/ ++ #ifdef CONFIG_ANTENNA_DIVERSITY ++ #define CONFIG_PHYDM_ANTENNA_DIVERSITY ++ ++ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY ++ ++ #if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) ++ #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ #endif ++ ++ #if (RTL8821A_SUPPORT == 1) ++ /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ ++ #endif ++ #endif ++ #endif ++ ++ /*#define CONFIG_RA_DBG_CMD*/ ++ /*#define CONFIG_ANT_DETECTION*/ ++ /*#define CONFIG_PATH_DIVERSITY*/ ++ /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ ++ ++ #ifdef CONFIG_BT_COEXIST ++ #define BT_SUPPORT 1 ++ #endif ++ ++#endif ++ ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_hwconfig.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_hwconfig.c +new file mode 100644 +index 0000000..4db241e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_hwconfig.c +@@ -0,0 +1,3331 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm)) ++#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC_##ic##txt(pDM_Odm)) ++ ++ ++#if (PHYDM_TESTCHIP_SUPPORT == 1) ++#define READ_AND_CONFIG(ic, txt) do {\ ++ if (pDM_Odm->bIsMPChip)\ ++ READ_AND_CONFIG_MP(ic,txt);\ ++ else\ ++ READ_AND_CONFIG_TC(ic,txt);\ ++ } while(0) ++#else ++ #define READ_AND_CONFIG READ_AND_CONFIG_MP ++#endif ++ ++ ++#define READ_FIRMWARE_MP(ic, txt) (ODM_ReadFirmware_MP_##ic##txt(pDM_Odm, pFirmware, pSize)) ++#define READ_FIRMWARE_TC(ic, txt) (ODM_ReadFirmware_TC_##ic##txt(pDM_Odm, pFirmware, pSize)) ++ ++#if (PHYDM_TESTCHIP_SUPPORT == 1) ++#define READ_FIRMWARE(ic, txt) do {\ ++ if (pDM_Odm->bIsMPChip)\ ++ READ_FIRMWARE_MP(ic,txt);\ ++ else\ ++ READ_FIRMWARE_TC(ic,txt);\ ++ } while(0) ++#else ++#define READ_FIRMWARE READ_FIRMWARE_MP ++#endif ++ ++#define GET_VERSION_MP(ic, txt) (ODM_GetVersion_MP_##ic##txt()) ++#define GET_VERSION_TC(ic, txt) (ODM_GetVersion_TC_##ic##txt()) ++#define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic,txt):GET_VERSION_TC(ic,txt)) ++ ++u1Byte ++odm_QueryRxPwrPercentage( ++ IN s1Byte AntPower ++ ) ++{ ++ if ((AntPower <= -100) || (AntPower >= 20)) ++ { ++ return 0; ++ } ++ else if (AntPower >= 0) ++ { ++ return 100; ++ } ++ else ++ { ++ return (100+AntPower); ++ } ++ ++} ++ ++ ++// ++// 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. ++// IF other SW team do not support the feature, remove this section.?? ++// ++s4Byte ++odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo( ++ IN OUT PDM_ODM_T pDM_Odm, ++ s4Byte CurrSig ++) ++{ ++ s4Byte RetSig = 0; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ //if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ { ++ // Step 1. Scale mapping. ++ // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo. ++ // 20100426 Joseph: Modify Signal strength mapping. ++ // This modification makes the RSSI indication similar to Intel solution. ++ // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE. ++ if(CurrSig >= 54 && CurrSig <= 100) ++ { ++ RetSig = 100; ++ } ++ else if(CurrSig>=42 && CurrSig <= 53 ) ++ { ++ RetSig = 95; ++ } ++ else if(CurrSig>=36 && CurrSig <= 41 ) ++ { ++ RetSig = 74 + ((CurrSig - 36) *20)/6; ++ } ++ else if(CurrSig>=33 && CurrSig <= 35 ) ++ { ++ RetSig = 65 + ((CurrSig - 33) *8)/2; ++ } ++ else if(CurrSig>=18 && CurrSig <= 32 ) ++ { ++ RetSig = 62 + ((CurrSig - 18) *2)/15; ++ } ++ else if(CurrSig>=15 && CurrSig <= 17 ) ++ { ++ RetSig = 33 + ((CurrSig - 15) *28)/2; ++ } ++ else if(CurrSig>=10 && CurrSig <= 14 ) ++ { ++ RetSig = 39; ++ } ++ else if(CurrSig>=8 && CurrSig <= 9 ) ++ { ++ RetSig = 33; ++ } ++ else if(CurrSig <= 8 ) ++ { ++ RetSig = 19; ++ } ++ } ++#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ return RetSig; ++} ++ ++s4Byte ++odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore( ++ IN OUT PDM_ODM_T pDM_Odm, ++ s4Byte CurrSig ++) ++{ ++ s4Byte RetSig = 0; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ //if(pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ { ++ // Netcore request this modification because 2009.04.13 SU driver use it. ++ if(CurrSig >= 31 && CurrSig <= 100) ++ { ++ RetSig = 100; ++ } ++ else if(CurrSig >= 21 && CurrSig <= 30) ++ { ++ RetSig = 90 + ((CurrSig - 20) / 1); ++ } ++ else if(CurrSig >= 11 && CurrSig <= 20) ++ { ++ RetSig = 80 + ((CurrSig - 10) / 1); ++ } ++ else if(CurrSig >= 7 && CurrSig <= 10) ++ { ++ RetSig = 69 + (CurrSig - 7); ++ } ++ else if(CurrSig == 6) ++ { ++ RetSig = 54; ++ } ++ else if(CurrSig == 5) ++ { ++ RetSig = 45; ++ } ++ else if(CurrSig == 4) ++ { ++ RetSig = 36; ++ } ++ else if(CurrSig == 3) ++ { ++ RetSig = 27; ++ } ++ else if(CurrSig == 2) ++ { ++ RetSig = 18; ++ } ++ else if(CurrSig == 1) ++ { ++ RetSig = 9; ++ } ++ else ++ { ++ RetSig = CurrSig; ++ } ++ } ++#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ return RetSig; ++} ++ ++ ++s4Byte ++odm_SignalScaleMapping_92CSeries( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN s4Byte CurrSig ++) ++{ ++ s4Byte RetSig = 0; ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++ if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ { ++ // Step 1. Scale mapping. ++ if(CurrSig >= 61 && CurrSig <= 100) ++ { ++ RetSig = 90 + ((CurrSig - 60) / 4); ++ } ++ else if(CurrSig >= 41 && CurrSig <= 60) ++ { ++ RetSig = 78 + ((CurrSig - 40) / 2); ++ } ++ else if(CurrSig >= 31 && CurrSig <= 40) ++ { ++ RetSig = 66 + (CurrSig - 30); ++ } ++ else if(CurrSig >= 21 && CurrSig <= 30) ++ { ++ RetSig = 54 + (CurrSig - 20); ++ } ++ else if(CurrSig >= 5 && CurrSig <= 20) ++ { ++ RetSig = 42 + (((CurrSig - 5) * 2) / 3); ++ } ++ else if(CurrSig == 4) ++ { ++ RetSig = 36; ++ } ++ else if(CurrSig == 3) ++ { ++ RetSig = 27; ++ } ++ else if(CurrSig == 2) ++ { ++ RetSig = 18; ++ } ++ else if(CurrSig == 1) ++ { ++ RetSig = 9; ++ } ++ else ++ { ++ RetSig = CurrSig; ++ } ++ } ++#endif ++ ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ if((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)) ++ { ++ if(CurrSig >= 51 && CurrSig <= 100) ++ { ++ RetSig = 100; ++ } ++ else if(CurrSig >= 41 && CurrSig <= 50) ++ { ++ RetSig = 80 + ((CurrSig - 40)*2); ++ } ++ else if(CurrSig >= 31 && CurrSig <= 40) ++ { ++ RetSig = 66 + (CurrSig - 30); ++ } ++ else if(CurrSig >= 21 && CurrSig <= 30) ++ { ++ RetSig = 54 + (CurrSig - 20); ++ } ++ else if(CurrSig >= 10 && CurrSig <= 20) ++ { ++ RetSig = 42 + (((CurrSig - 10) * 2) / 3); ++ } ++ else if(CurrSig >= 5 && CurrSig <= 9) ++ { ++ RetSig = 22 + (((CurrSig - 5) * 3) / 2); ++ } ++ else if(CurrSig >= 1 && CurrSig <= 4) ++ { ++ RetSig = 6 + (((CurrSig - 1) * 3) / 2); ++ } ++ else ++ { ++ RetSig = CurrSig; ++ } ++ } ++ ++#endif ++ return RetSig; ++} ++s4Byte ++odm_SignalScaleMapping( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN s4Byte CurrSig ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if( (pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->SupportInterface != ODM_ITRF_PCIE) && //USB & SDIO ++ (pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore ++ { ++ return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig); ++ } ++ else if( (pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) && ++ (pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo) ++ { ++ return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig); ++ }else ++#endif ++ { ++ return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig); ++ } ++ ++} ++ ++ ++ ++static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte isCCKrate, ++ IN u1Byte PWDB_ALL, ++ IN u1Byte path, ++ IN u1Byte RSSI ++) ++{ ++ u1Byte SQ = 0; ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ if(isCCKrate){ ++ ++ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter)) ++ { ++ ++ // ++ // Expected signal strength and bars indication at Lenovo lab. 2013.04.11 ++ // 802.11n, 802.11b, 802.11g only at channel 6 ++ // ++ // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm) ++ // 50 5 -52 ++ // 55 5 -54 ++ // 60 5 -55 ++ // 65 5 -59 ++ // 70 5 -63 ++ // 75 5 -66 ++ // 80 4 -72 ++ // 85 3 -75 ++ // 90 3 -80 ++ // 95 2 -85 ++ // 100 1 -89 ++ // 102 1 -90 ++ // 104 1 -91 ++ // ++ RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_CID_819x_Lenovo\n")); ++ ++#if OS_WIN_FROM_WIN8(OS_VERSION) ++ if(PWDB_ALL >= 50) ++ SQ = 100; ++ else if(PWDB_ALL >= 23 && PWDB_ALL < 50) ++ SQ = 80; ++ else if(PWDB_ALL >= 18 && PWDB_ALL < 23) ++ SQ = 60; ++ else if(PWDB_ALL >= 8 && PWDB_ALL < 18) ++ SQ = 40; ++ else ++ SQ = 10; ++#else ++ if(PWDB_ALL >= 34) ++ SQ = 100; ++ else if(PWDB_ALL >= 23 && PWDB_ALL < 34) ++ SQ = 80; ++ else if(PWDB_ALL >= 18 && PWDB_ALL < 23) ++ SQ = 60; ++ else if(PWDB_ALL >= 8 && PWDB_ALL < 18) ++ SQ = 40; ++ else ++ SQ = 10; ++ ++ if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7 ++ SQ = 20; ++#endif ++ ++ } ++ else if(IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)){ ++ ++ // ++ // Expected signal strength and bars indication at Lenovo lab. 2013.04.11 ++ // 802.11n, 802.11b, 802.11g only at channel 6 ++ // ++ // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm) ++ // 50 5 -49 ++ // 55 5 -49 ++ // 60 5 -50 ++ // 65 5 -51 ++ // 70 5 -52 ++ // 75 5 -54 ++ // 80 5 -55 ++ // 85 4 -60 ++ // 90 3 -63 ++ // 95 3 -65 ++ // 100 2 -67 ++ // 102 2 -67 ++ // 104 1 -70 ++ // ++ ++ if(PWDB_ALL >= 50) ++ SQ = 100; ++ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) ++ SQ = 80; ++ else if(PWDB_ALL >= 31 && PWDB_ALL < 35) ++ SQ = 60; ++ else if(PWDB_ALL >= 22 && PWDB_ALL < 31) ++ SQ = 40; ++ else if(PWDB_ALL >= 18 && PWDB_ALL < 22) ++ SQ = 20; ++ else ++ SQ = 10; ++ } else { ++ if (PWDB_ALL >= 50) ++ SQ = 100; ++ else if (PWDB_ALL >= 35 && PWDB_ALL < 50) ++ SQ = 80; ++ else if (PWDB_ALL >= 22 && PWDB_ALL < 35) ++ SQ = 60; ++ else if (PWDB_ALL >= 18 && PWDB_ALL < 22) ++ SQ = 40; ++ else ++ SQ = 10; ++ } ++ ++ } ++ else ++ {//OFDM rate ++ ++ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) || ++ IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)) ++ { ++ if(RSSI >= 45) ++ SQ = 100; ++ else if(RSSI >= 22 && RSSI < 45) ++ SQ = 80; ++ else if(RSSI >= 18 && RSSI < 22) ++ SQ = 40; ++ else ++ SQ = 20; ++ } else { ++ if(RSSI >= 45) ++ SQ = 100; ++ else if(RSSI >= 22 && RSSI < 45) ++ SQ = 80; ++ else if(RSSI >= 18 && RSSI < 22) ++ SQ = 40; ++ else ++ SQ = 20; ++ } ++ } ++ ++ RT_TRACE(COMP_DBG, DBG_TRACE, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ)); ++ ++#endif ++ return SQ; ++} ++ ++static u1Byte odm_SQ_process_patch_RT_CID_819x_Acer( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte isCCKrate, ++ IN u1Byte PWDB_ALL, ++ IN u1Byte path, ++ IN u1Byte RSSI ++) ++{ ++ u1Byte SQ = 0; ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ if(isCCKrate){ ++ ++ RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n")); ++ ++#if OS_WIN_FROM_WIN8(OS_VERSION) ++ ++ if(PWDB_ALL >= 50) ++ SQ = 100; ++ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) ++ SQ = 80; ++ else if(PWDB_ALL >= 30 && PWDB_ALL < 35) ++ SQ = 60; ++ else if(PWDB_ALL >= 25 && PWDB_ALL < 30) ++ SQ = 40; ++ else if(PWDB_ALL >= 20 && PWDB_ALL < 25) ++ SQ = 20; ++ else ++ SQ = 10; ++#else ++ if(PWDB_ALL >= 50) ++ SQ = 100; ++ else if(PWDB_ALL >= 35 && PWDB_ALL < 50) ++ SQ = 80; ++ else if(PWDB_ALL >= 30 && PWDB_ALL < 35) ++ SQ = 60; ++ else if(PWDB_ALL >= 25 && PWDB_ALL < 30) ++ SQ = 40; ++ else if(PWDB_ALL >= 20 && PWDB_ALL < 25) ++ SQ = 20; ++ else ++ SQ = 10; ++ ++ if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7 ++ SQ = 20; ++#endif ++ ++ ++ ++ } ++ else ++ {//OFDM rate ++ ++ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) || ++ IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)) ++ { ++ if(RSSI >= 45) ++ SQ = 100; ++ else if(RSSI >= 22 && RSSI < 45) ++ SQ = 80; ++ else if(RSSI >= 18 && RSSI < 22) ++ SQ = 40; ++ else ++ SQ = 20; ++ } ++ else ++ { ++ if(RSSI >= 35) ++ SQ = 100; ++ else if(RSSI >= 30 && RSSI < 35) ++ SQ = 80; ++ else if(RSSI >= 25 && RSSI < 30) ++ SQ = 40; ++ else ++ SQ = 20; ++ } ++ } ++ ++ RT_TRACE(COMP_DBG, DBG_LOUD, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ)); ++ ++#endif ++ return SQ; ++} ++ ++static u1Byte ++odm_EVMdbToPercentage( ++ IN s1Byte Value ++ ) ++{ ++ // ++ // -33dB~0dB to 0%~99% ++ // ++ s1Byte ret_val; ++ ++ ret_val = Value; ++ ret_val /= 2; ++ ++ /*DbgPrint("Value=%d\n", Value);*/ ++ /*ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x\n", ret_val, ret_val));*/ ++#ifdef ODM_EVM_ENHANCE_ANTDIV ++ if (ret_val >= 0) ++ ret_val = 0; ++ ++ if (ret_val <= -40) ++ ret_val = -40; ++ ++ ret_val = 0 - ret_val; ++ ret_val *= 3; ++#else ++ if (ret_val >= 0) ++ ret_val = 0; ++ ++ if (ret_val <= -33) ++ ret_val = -33; ++ ++ ret_val = 0 - ret_val; ++ ret_val *= 3; ++ ++ if (ret_val == 99) ++ ret_val = 100; ++#endif ++ ++ return (u1Byte)ret_val; ++} ++ ++static u1Byte ++odm_EVMdbm_JaguarSeries( ++ IN s1Byte Value ++ ) ++{ ++ s1Byte ret_val = Value; ++ ++ // -33dB~0dB to 33dB ~ 0dB ++ if(ret_val == -128) ++ ret_val = 127; ++ else if (ret_val < 0) ++ ret_val = 0 - ret_val; ++ ++ ret_val = ret_val >> 1; ++ return (u1Byte)ret_val; ++} ++ ++static s2Byte ++odm_Cfo( ++ IN s1Byte Value ++) ++{ ++ s2Byte ret_val; ++ ++ if (Value < 0) ++ { ++ ret_val = 0 - Value; ++ ret_val = (ret_val << 1) + (ret_val >> 1) ; // *2.5~=312.5/2^7 ++ ret_val = ret_val | BIT12; // set bit12 as 1 for negative cfo ++ } ++ else ++ { ++ ret_val = Value; ++ ret_val = (ret_val << 1) + (ret_val>>1) ; // *2.5~=312.5/2^7 ++ } ++ return ret_val; ++} ++ ++#if(ODM_IC_11N_SERIES_SUPPORT == 1) ++ ++s1Byte ++odm_CCKRSSI_8703B( ++ IN u2Byte LNA_idx, ++ IN u1Byte VGA_idx ++ ) ++{ ++ s1Byte rx_pwr_all = 0x00; ++ ++ switch (LNA_idx) { ++ case 0xf: ++ rx_pwr_all = -48 - (2 * VGA_idx); ++ break; ++ case 0xb: ++ rx_pwr_all = -42 - (2 * VGA_idx); /*TBD*/ ++ break; ++ case 0xa: ++ rx_pwr_all = -36 - (2 * VGA_idx); ++ break; ++ case 8: ++ rx_pwr_all = -32 - (2 * VGA_idx); ++ break; ++ case 7: ++ rx_pwr_all = -28 - (2 * VGA_idx); /*TBD*/ ++ break; ++ case 4: ++ rx_pwr_all = -16 - (2 * VGA_idx); ++ break; ++ case 0: ++ rx_pwr_all = -2 - (2 * VGA_idx); ++ break; ++ default: ++ /*rx_pwr_all = -53+(2*(31-VGA_idx));*/ ++ /*DbgPrint("wrong LNA index\n");*/ ++ break; ++ ++ } ++ return rx_pwr_all; ++} ++ ++VOID ++odm_RxPhyStatus92CSeries_Parsing( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ u1Byte i, Max_spatial_stream; ++ s1Byte rx_pwr[4], rx_pwr_all=0; ++ u1Byte EVM, PWDB_ALL = 0, PWDB_ALL_BT; ++ u1Byte RSSI, total_rssi=0; ++ BOOLEAN isCCKrate=FALSE; ++ u1Byte rf_rx_num = 0; ++ u1Byte cck_highpwr = 0; ++ u1Byte LNA_idx = 0; ++ u1Byte VGA_idx = 0; ++ PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus; ++ ++ isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M) ? TRUE : FALSE; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; ++ ++ ++ if(isCCKrate) ++ { ++ u1Byte report; ++ u1Byte cck_agc_rpt; ++ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; ++ // ++ // (1)Hardware does not provide RSSI for CCK ++ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) ++ // ++ ++ //if(pHalData->eRFPowerState == eRfOn) ++ cck_highpwr = pDM_Odm->bCckHighPower; ++ //else ++ // cck_highpwr = FALSE; ++ ++ cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ; ++ ++ //2011.11.28 LukeLee: 88E use different LNA & VGA gain table ++ //The RSSI formula should be modified according to the gain table ++ //In 88E, cck_highpwr is always set to 1 ++ if (pDM_Odm->SupportICType & (ODM_RTL8703B)) { ++ ++ #if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->cck_agc_report_type == 1) { /*4 bit LNA*/ ++ ++ u1Byte cck_agc_rpt_b = (pPhyStaRpt->cck_rpt_b_ofdm_cfosho_b & BIT7) ? 1 : 0; ++ ++ LNA_idx = (cck_agc_rpt_b << 3) | ((cck_agc_rpt & 0xE0) >> 5); ++ VGA_idx = (cck_agc_rpt & 0x1F); ++ ++ rx_pwr_all = odm_CCKRSSI_8703B(LNA_idx, VGA_idx); ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ if (PWDB_ALL > 100) ++ PWDB_ALL = 100; ++ ++ } ++ #endif ++ } else if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8188F)) /*3 bit LNA*/ ++ { ++ LNA_idx = ((cck_agc_rpt & 0xE0) >>5); ++ VGA_idx = (cck_agc_rpt & 0x1F); ++ if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E)) ++ { ++ if(pDM_Odm->cck_agc_report_type == 0 && (pDM_Odm->SupportICType & ODM_RTL8192E) ) ++ { ++ switch(LNA_idx) ++ { ++ case 7: ++ rx_pwr_all = -45 - 2*(VGA_idx); ++ break; ++ case 6: ++ rx_pwr_all = -43 -2*(VGA_idx); ++ break; ++ case 5: ++ rx_pwr_all = -27 - 2*(VGA_idx); ++ break; ++ case 4: ++ rx_pwr_all = -21 - 2*(VGA_idx); ++ break; ++ case 3: ++ rx_pwr_all = -18 - 2*(VGA_idx); ++ break; ++ case 2: ++ rx_pwr_all = -6 - 2*(VGA_idx); ++ break; ++ case 1: ++ rx_pwr_all = 9 -2*(VGA_idx); ++ break; ++ case 0: ++ rx_pwr_all = 15 -2*(VGA_idx); ++ break; ++ default: ++ ++ break; ++ } ++ ++ if(pDM_Odm->BoardType & ODM_BOARD_EXT_LNA) ++ { ++ rx_pwr_all -= pDM_Odm->ExtLNAGain; ++ } ++ ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ } ++ else ++ { ++ switch(LNA_idx) ++ { ++ case 7: ++ if(VGA_idx <= 27) ++ rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2 ++ else ++ rx_pwr_all = -100; ++ break; ++ case 6: ++ rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0 ++ break; ++ case 5: ++ rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5 ++ break; ++ case 4: ++ rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4 ++ break; ++ case 3: ++ //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0 ++ rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0 ++ break; ++ case 2: ++ if(cck_highpwr) ++ rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0 ++ else ++ rx_pwr_all = -6+ 2*(5-VGA_idx); ++ break; ++ case 1: ++ rx_pwr_all = 8-2*VGA_idx; ++ break; ++ case 0: ++ rx_pwr_all = 14-2*VGA_idx; ++ break; ++ default: ++ //DbgPrint("CCK Exception default\n"); ++ break; ++ } ++ rx_pwr_all += 8; ++ ++ //2012.10.08 LukeLee: Modify for 92E CCK RSSI ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ rx_pwr_all += 8; ++ ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ if(cck_highpwr == FALSE) ++ { ++ if(PWDB_ALL >= 80) ++ PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80; ++ else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) ++ PWDB_ALL += 3; ++ if(PWDB_ALL>100) ++ PWDB_ALL = 100; ++ } ++ } ++ } ++ else if(pDM_Odm->SupportICType & (ODM_RTL8723B)) ++ { ++#if (RTL8723B_SUPPORT == 1) ++ rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx,VGA_idx); ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ if(PWDB_ALL>100) ++ PWDB_ALL = 100; ++#endif ++ } else if (pDM_Odm->SupportICType & (ODM_RTL8188F)) { ++#if (RTL8188F_SUPPORT == 1) ++ rx_pwr_all = odm_CCKRSSI_8188F(LNA_idx, VGA_idx); ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ if (PWDB_ALL > 100) ++ PWDB_ALL = 100; ++#endif ++ } ++ } ++ else ++ { ++ if(!cck_highpwr) ++ { ++ report =( cck_agc_rpt & 0xc0 )>>6; ++ switch(report) ++ { ++ // 03312009 modified by cosa ++ // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion ++ // Note: different RF with the different RNA gain. ++ case 0x3: ++ rx_pwr_all = -46 - (cck_agc_rpt & 0x3e); ++ break; ++ case 0x2: ++ rx_pwr_all = -26 - (cck_agc_rpt & 0x3e); ++ break; ++ case 0x1: ++ rx_pwr_all = -12 - (cck_agc_rpt & 0x3e); ++ break; ++ case 0x0: ++ rx_pwr_all = 16 - (cck_agc_rpt & 0x3e); ++ break; ++ } ++ } ++ else ++ { ++ //report = pDrvInfo->cfosho[0] & 0x60; ++ //report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60; ++ ++ report = (cck_agc_rpt & 0x60)>>5; ++ switch(report) ++ { ++ case 0x3: ++ rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ case 0x2: ++ rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1); ++ break; ++ case 0x1: ++ rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ case 0x0: ++ rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ } ++ } ++ ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ ++ //Modification for ext-LNA board ++ if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) ++ { ++ if((cck_agc_rpt>>7) == 0){ ++ PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6); ++ } ++ else ++ { ++ if(PWDB_ALL > 38) ++ PWDB_ALL -= 16; ++ else ++ PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12); ++ } ++ ++ //CCK modification ++ if(PWDB_ALL > 25 && PWDB_ALL <= 60) ++ PWDB_ALL += 6; ++ //else if (PWDB_ALL <= 25) ++ // PWDB_ALL += 8; ++ } ++ else//Modification for int-LNA board ++ { ++ if(PWDB_ALL > 99) ++ PWDB_ALL -= 8; ++ else if(PWDB_ALL > 50 && PWDB_ALL <= 68) ++ PWDB_ALL += 4; ++ } ++ } ++ ++ pDM_Odm->cck_lna_idx = LNA_idx; ++ pDM_Odm->cck_vga_idx = VGA_idx; ++ pPhyInfo->RxPWDBAll = PWDB_ALL; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; ++ pPhyInfo->RecvSignalPower = rx_pwr_all; ++#endif ++ // ++ // (3) Get Signal Quality (EVM) ++ // ++ //if(pPktinfo->bPacketMatchBSSID) ++ { ++ u1Byte SQ,SQ_rpt; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){ ++ SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0); ++ }else if((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID==RT_CID_819x_Acer)) ++ { ++ SQ = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,0); ++ }else ++#endif ++ if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){ ++ SQ = 100; ++ } ++ else{ ++ SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all; ++ ++ if(SQ_rpt > 64) ++ SQ = 0; ++ else if (SQ_rpt < 20) ++ SQ = 100; ++ else ++ SQ = ((64-SQ_rpt) * 100) / 44; ++ ++ } ++ ++ //DbgPrint("cck SQ = %d\n", SQ); ++ pPhyInfo->SignalQuality = SQ; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; ++ } ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) { ++ if (i == 0) ++ pPhyInfo->RxMIMOSignalStrength[0] = PWDB_ALL; ++ else ++ pPhyInfo->RxMIMOSignalStrength[1] = 0; ++ } ++ } ++ else //2 is OFDM rate ++ { ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; ++ ++ // ++ // (1)Get RSSI for HT rate ++ // ++ ++ for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) ++ { ++ // 2008/01/30 MH we will judge RF RX path now. ++ if (pDM_Odm->RFPathRxEnable & BIT(i)) ++ rf_rx_num++; ++ //else ++ //continue; ++ ++ rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110; ++ pDM_Odm->ofdm_agc_idx[i] = (pPhyStaRpt->path_agc[i].gain & 0x3F); ++ ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->RxPwr[i] = rx_pwr[i]; ++ #endif ++ ++ /* Translate DBM to percentage. */ ++ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); ++ total_rssi += RSSI; ++ //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI)); ++ ++ ++ if(pDM_Odm->SupportICType&ODM_RTL8192C) ++ { ++ //Modification for ext-LNA board ++ if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) ++ { ++ if((pPhyStaRpt->path_agc[i].trsw) == 1) ++ RSSI = (RSSI>94)?100:(RSSI +6); ++ else ++ RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16); ++ ++ if((RSSI <= 34) && (RSSI >=4)) ++ RSSI -= 4; ++ } ++ } ++ ++ pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI; ++ ++ #if (DM_ODM_SUPPORT_TYPE & (/*ODM_WIN|*/ODM_CE|ODM_AP)) ++ //Get Rx snr value in DB ++ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2); ++ #endif ++ ++ /* Record Signal Strength for next packet */ ++ //if(pPktinfo->bPacketMatchBSSID) ++ { ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID==RT_CID_819x_Lenovo)) ++ { ++ if(i==ODM_RF_PATH_A) ++ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI); ++ ++ } ++ else if((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID==RT_CID_819x_Acer)) ++ { ++ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,RSSI); ++ } ++#endif ++ } ++ } ++ ++ ++ // ++ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) ++ // ++ rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110; ++ ++ PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ ++ ++ pPhyInfo->RxPWDBAll = PWDB_ALL; ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll)); ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; ++ pPhyInfo->RxPower = rx_pwr_all; ++ pPhyInfo->RecvSignalPower = rx_pwr_all; ++ #endif ++ ++ if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){ ++ //do nothing ++ }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==25)){ ++ //do nothing ++ } ++ else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo ++ // ++ // (3)EVM of HT rate ++ // ++ if(pPktinfo->DataRate >=ODM_RATEMCS8 && pPktinfo->DataRate <=ODM_RATEMCS15) ++ Max_spatial_stream = 2; //both spatial stream make sense ++ else ++ Max_spatial_stream = 1; //only spatial stream 1 makes sense ++ ++ for(i=0; i>= 1" because the compilor of free build environment ++ // fill most significant bit to "zero" when doing shifting operation which may change a negative ++ // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. ++ EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] )); //dbm ++ ++ //GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM)); ++ ++ //if(pPktinfo->bPacketMatchBSSID) ++ { ++ if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only ++ { ++ pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff); ++ } ++ pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff); ++ } ++ } ++ } ++ ++ ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail); ++ ++ } ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ //UI BSS List signal strength(in percentage), make it good looking, from 0~100. ++ //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). ++ if(isCCKrate) ++ { ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ ++ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, PWDB_ALL, TRUE, TRUE); ++#else ++ #ifdef CONFIG_SIGNAL_SCALE_MAPPING ++ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/*PWDB_ALL;*/ ++ #else ++ pPhyInfo->SignalStrength = (u1Byte)PWDB_ALL; ++ #endif ++#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ ++ } ++ else ++ { ++ if (rf_rx_num != 0) ++ { ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ ++ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, (total_rssi /= rf_rx_num), TRUE, FALSE); ++ #else ++ #ifdef CONFIG_SIGNAL_SCALE_MAPPING ++ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi /= rf_rx_num)); ++ #else ++ total_rssi/=rf_rx_num; ++ pPhyInfo->SignalStrength = (u1Byte)total_rssi; ++ #endif ++ #endif ++ } ++ } ++#endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))*/ ++ ++ //DbgPrint("isCCKrate = %d, pPhyInfo->RxPWDBAll = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", ++ //isCCKrate, pPhyInfo->RxPWDBAll, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a); ++ ++ //For 92C/92D HW (Hybrid) Antenna Diversity ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ //For 88E HW Antenna Diversity ++ pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel; ++ pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b; ++ pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2; ++#endif ++} ++#endif ++ ++#if ODM_IC_11AC_SERIES_SUPPORT ++ ++VOID ++odm_RxPhyBWJaguarSeries_Parsing( ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ IN PPHY_STATUS_RPT_8812_T pPhyStaRpt ++) ++{ ++ ++ if(pPktinfo->DataRate <= ODM_RATE54M) { ++ switch (pPhyStaRpt->r_RFMOD) { ++ case 1: ++ if (pPhyStaRpt->sub_chnl == 0) ++ pPhyInfo->BandWidth = 1; ++ else ++ pPhyInfo->BandWidth = 0; ++ break; ++ ++ case 2: ++ if (pPhyStaRpt->sub_chnl == 0) ++ pPhyInfo->BandWidth = 2; ++ else if (pPhyStaRpt->sub_chnl == 9 || pPhyStaRpt->sub_chnl == 10) ++ pPhyInfo->BandWidth = 1; ++ else ++ pPhyInfo->BandWidth = 0; ++ break; ++ ++ default: ++ case 0: ++ pPhyInfo->BandWidth = 0; ++ break; ++ } ++ } ++ ++} ++ ++VOID ++odm_RxPhyStatusJaguarSeries_Parsing( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++) ++{ ++ u1Byte i, Max_spatial_stream; ++ s1Byte rx_pwr[4], rx_pwr_all = 0; ++ u1Byte EVM, EVMdbm, PWDB_ALL = 0, PWDB_ALL_BT; ++ u1Byte RSSI, avg_rssi = 0, best_rssi = 0, second_rssi = 0; ++ u1Byte isCCKrate = 0; ++ u1Byte rf_rx_num = 0; ++ u1Byte cck_highpwr = 0; ++ u1Byte LNA_idx, VGA_idx; ++ PPHY_STATUS_RPT_8812_T pPhyStaRpt = (PPHY_STATUS_RPT_8812_T)pPhyStatus; ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ ++ odm_RxPhyBWJaguarSeries_Parsing(pPhyInfo, pPktinfo, pPhyStaRpt); ++ ++ if (pPktinfo->DataRate <= ODM_RATE11M) ++ isCCKrate = TRUE; ++ else ++ isCCKrate = FALSE; ++ ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_C] = -1; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_D] = -1; ++ ++ if (isCCKrate) { ++ u1Byte cck_agc_rpt; ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; ++ ++ /*(1)Hardware does not provide RSSI for CCK*/ ++ /*(2)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/ ++ ++ /*if(pHalData->eRFPowerState == eRfOn)*/ ++ cck_highpwr = pDM_Odm->bCckHighPower; ++ /*else*/ ++ /*cck_highpwr = FALSE;*/ ++ ++ cck_agc_rpt = pPhyStaRpt->cfosho[0] ; ++ LNA_idx = ((cck_agc_rpt & 0xE0) >> 5); ++ VGA_idx = (cck_agc_rpt & 0x1F); ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8812) { ++ switch (LNA_idx) { ++ case 7: ++ if (VGA_idx <= 27) ++ rx_pwr_all = -100 + 2 * (27 - VGA_idx); /*VGA_idx = 27~2*/ ++ else ++ rx_pwr_all = -100; ++ break; ++ case 6: ++ rx_pwr_all = -48 + 2 * (2 - VGA_idx); /*VGA_idx = 2~0*/ ++ break; ++ case 5: ++ rx_pwr_all = -42 + 2 * (7 - VGA_idx); /*VGA_idx = 7~5*/ ++ break; ++ case 4: ++ rx_pwr_all = -36 + 2 * (7 - VGA_idx); /*VGA_idx = 7~4*/ ++ break; ++ case 3: ++ /*rx_pwr_all = -28 + 2*(7-VGA_idx); VGA_idx = 7~0*/ ++ rx_pwr_all = -24 + 2 * (7 - VGA_idx); /*VGA_idx = 7~0*/ ++ break; ++ case 2: ++ if (cck_highpwr) ++ rx_pwr_all = -12 + 2 * (5 - VGA_idx); /*VGA_idx = 5~0*/ ++ else ++ rx_pwr_all = -6 + 2 * (5 - VGA_idx); ++ break; ++ case 1: ++ rx_pwr_all = 8 - 2 * VGA_idx; ++ break; ++ case 0: ++ rx_pwr_all = 14 - 2 * VGA_idx; ++ break; ++ default: ++ /*DbgPrint("CCK Exception default\n");*/ ++ break; ++ } ++ rx_pwr_all += 6; ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ ++ if (cck_highpwr == FALSE) { ++ if (PWDB_ALL >= 80) ++ PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80; ++ else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) ++ PWDB_ALL += 3; ++ if (PWDB_ALL > 100) ++ PWDB_ALL = 100; ++ } ++ } else if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8881A)) { ++ s1Byte Pout = -6; ++ ++ switch (LNA_idx) { ++ case 5: ++ rx_pwr_all = Pout - 32 - (2 * VGA_idx); ++ break; ++ case 4: ++ rx_pwr_all = Pout - 24 - (2 * VGA_idx); ++ break; ++ case 2: ++ rx_pwr_all = Pout - 11 - (2 * VGA_idx); ++ break; ++ case 1: ++ rx_pwr_all = Pout + 5 - (2 * VGA_idx); ++ break; ++ case 0: ++ rx_pwr_all = Pout + 21 - (2 * VGA_idx); ++ break; ++ } ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ } else if (pDM_Odm->SupportICType == ODM_RTL8814A || pDM_Odm->SupportICType == ODM_RTL8822B) { ++ s1Byte Pout = -6; ++ ++ switch (LNA_idx) { ++ /*CCK only use LNA: 2, 3, 5, 7*/ ++ case 7: ++ rx_pwr_all = Pout - 32 - (2 * VGA_idx); ++ break; ++ case 5: ++ rx_pwr_all = Pout - 22 - (2 * VGA_idx); ++ break; ++ case 3: ++ rx_pwr_all = Pout - 2 - (2 * VGA_idx); ++ break; ++ case 2: ++ rx_pwr_all = Pout + 5 - (2 * VGA_idx); ++ break; ++ /*case 6:*/ ++ /*rx_pwr_all = Pout -26 - (2*VGA_idx);*/ ++ /*break;*/ ++ /*case 4:*/ ++ /*rx_pwr_all = Pout - 8 - (2*VGA_idx);*/ ++ /*break;*/ ++ /*case 1:*/ ++ /*rx_pwr_all = Pout + 21 - (2*VGA_idx);*/ ++ /*break;*/ ++ /*case 0:*/ ++ /*rx_pwr_all = Pout + 10 - (2*VGA_idx);*/ ++/* // break;*/ ++ default: ++/* //DbgPrint("CCK Exception default\n");*/ ++ break; ++ } ++ PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ } ++ ++ pPhyInfo->RxPWDBAll = PWDB_ALL; ++/* //if(pPktinfo->StationID == 0)*/ ++/* //{*/ ++/* // DbgPrint("CCK: LNA_idx = %d, VGA_idx = %d, pPhyInfo->RxPWDBAll = %d\n",*/ ++/* // LNA_idx, VGA_idx, pPhyInfo->RxPWDBAll);*/ ++/* //}*/ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; ++ pPhyInfo->RecvSignalPower = rx_pwr_all; ++#endif ++ /*(3) Get Signal Quality (EVM)*/ ++ if (pPktinfo->bPacketMatchBSSID) { ++ u1Byte SQ, SQ_rpt; ++ ++ if ((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) { ++ SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, 0, 0); ++ } else if (pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest) { ++ SQ = 100; ++ } else { ++ SQ_rpt = pPhyStaRpt->pwdb_all; ++ ++ if (SQ_rpt > 64) ++ SQ = 0; ++ else if (SQ_rpt < 20) ++ SQ = 100; ++ else ++ SQ = ((64 - SQ_rpt) * 100) / 44; ++ } ++ ++/* //DbgPrint("cck SQ = %d\n", SQ);*/ ++ pPhyInfo->SignalQuality = SQ; ++ pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ; ++ } ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { ++ if (i == 0) ++ pPhyInfo->RxMIMOSignalStrength[0] = PWDB_ALL; ++ else ++ pPhyInfo->RxMIMOSignalStrength[i] = 0; ++ } ++ } else { ++ /*is OFDM rate*/ ++ pDM_FatTable->hw_antsw_occur = pPhyStaRpt->hw_antsw_occur; ++ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; ++ ++ /*(1)Get RSSI for OFDM rate*/ ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { ++ /*2008/01/30 MH we will judge RF RX path now.*/ ++/* //DbgPrint("pDM_Odm->RFPathRxEnable = %x\n", pDM_Odm->RFPathRxEnable);*/ ++ if (pDM_Odm->RFPathRxEnable & BIT(i)) ++ rf_rx_num++; ++/* //else*/ ++/* //continue;*/ ++ /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/ ++/* //if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))*/ ++ if (i < ODM_RF_PATH_C) ++ rx_pwr[i] = (pPhyStaRpt->gain_trsw[i] & 0x7F) - 110; ++ else ++ rx_pwr[i] = (pPhyStaRpt->gain_trsw_cd[i - 2] & 0x7F) - 110; ++/* //else*/ ++ /*rx_pwr[i] = ((pPhyStaRpt->gain_trsw[i]& 0x3F)*2) - 110; OLD FORMULA*/ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->RxPwr[i] = rx_pwr[i]; ++#endif ++ ++ /* Translate DBM to percentage. */ ++ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); ++ ++ /*total_rssi += RSSI;*/ ++ /*Get the best two RSSI*/ ++ if (RSSI > best_rssi && RSSI > second_rssi) { ++ second_rssi = best_rssi; ++ best_rssi = RSSI; ++ } else if (RSSI > second_rssi && RSSI <= best_rssi) ++ second_rssi = RSSI; ++ ++ /*RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));*/ ++ ++ pPhyInfo->RxMIMOSignalStrength[i] = (u1Byte) RSSI; ++ ++ ++ /*Get Rx snr value in DB*/ ++ if (i < ODM_RF_PATH_C) ++ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->rxsnr[i] / 2; ++ else if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B)) ++ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->csi_current[i - 2] / 2; ++ ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ /*(2) CFO_short & CFO_tail*/ ++ if (i < ODM_RF_PATH_C) { ++ pPhyInfo->Cfo_short[i] = odm_Cfo((pPhyStaRpt->cfosho[i])); ++ pPhyInfo->Cfo_tail[i] = odm_Cfo((pPhyStaRpt->cfotail[i])); ++ } ++#endif ++ /* Record Signal Strength for next packet */ ++ if (pPktinfo->bPacketMatchBSSID) { ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if ((pDM_Odm->SupportPlatform == ODM_WIN) && ++ (pDM_Odm->PatchID == RT_CID_819x_Lenovo)) { ++ if (i == ODM_RF_PATH_A) ++ pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm, isCCKrate, PWDB_ALL, i, RSSI); ++ ++ } ++#endif ++ } ++ } ++ ++ /*(3)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/ ++ ++ /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/ ++ if ((pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) && (!pDM_Odm->bIsMPChip)) ++ rx_pwr_all = (pPhyStaRpt->pwdb_all & 0x7f) - 110; ++ else ++ rx_pwr_all = (((pPhyStaRpt->pwdb_all) >> 1) & 0x7f) - 110; /*OLD FORMULA*/ ++ ++ PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); ++ ++ pPhyInfo->RxPWDBAll = PWDB_ALL; ++ /*ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));*/ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; ++ pPhyInfo->RxPower = rx_pwr_all; ++ pPhyInfo->RecvSignalPower = rx_pwr_all; ++#endif ++ ++ if ((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID == 19)) { ++ /*do nothing*/ ++ } else { ++ /*pMgntInfo->CustomerID != RT_CID_819x_Lenovo*/ ++ ++ /*(4)EVM of OFDM rate*/ ++ ++ if ((pPktinfo->DataRate >= ODM_RATEMCS8) && ++ (pPktinfo->DataRate <= ODM_RATEMCS15)) ++ Max_spatial_stream = 2; ++ else if ((pPktinfo->DataRate >= ODM_RATEVHTSS2MCS0) && ++ (pPktinfo->DataRate <= ODM_RATEVHTSS2MCS9)) ++ Max_spatial_stream = 2; ++ else if ((pPktinfo->DataRate >= ODM_RATEMCS16) && ++ (pPktinfo->DataRate <= ODM_RATEMCS23)) ++ Max_spatial_stream = 3; ++ else if ((pPktinfo->DataRate >= ODM_RATEVHTSS3MCS0) && ++ (pPktinfo->DataRate <= ODM_RATEVHTSS3MCS9)) ++ Max_spatial_stream = 3; ++ else ++ Max_spatial_stream = 1; ++ ++ if (pPktinfo->bPacketMatchBSSID) { ++ /*DbgPrint("pPktinfo->DataRate = %d\n", pPktinfo->DataRate);*/ ++ ++ for (i = 0; i < Max_spatial_stream; i++) { ++ /*Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment*/ ++ /*fill most significant bit to "zero" when doing shifting operation which may change a negative*/ ++ /*value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.*/ ++ ++ if (pPktinfo->DataRate >= ODM_RATE6M && pPktinfo->DataRate <= ODM_RATE54M) { ++ if (i == ODM_RF_PATH_A) { ++ EVM = odm_EVMdbToPercentage((pPhyStaRpt->sigevm)); /*dbm*/ ++ EVM += 20; ++ if (EVM > 100) ++ EVM = 100; ++ } ++ } else { ++ if (i < ODM_RF_PATH_C) { ++ if (pPhyStaRpt->rxevm[i] == -128) ++ pPhyStaRpt->rxevm[i] = -25; ++ EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm[i])); /*dbm*/ ++ } else { ++ if (pPhyStaRpt->rxevm_cd[i - 2] == -128){ ++ pPhyStaRpt->rxevm_cd[i - 2] = -25; ++ } ++ EVM = odm_EVMdbToPercentage((pPhyStaRpt->rxevm_cd[i - 2])); /*dbm*/ ++ } ++ } ++ ++ if (i < ODM_RF_PATH_C) ++ EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm[i]); ++ else ++ EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm_cd[i - 2]); ++ /*RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",*/ ++ /*pPktinfo->DataRate, pPhyStaRpt->rxevm[i], "%", EVM));*/ ++ ++ { ++ if (i == ODM_RF_PATH_A) { ++ /*Fill value in RFD, Get the first spatial stream only*/ ++ pPhyInfo->SignalQuality = EVM; ++ } ++ pPhyInfo->RxMIMOSignalQuality[i] = EVM; ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ pPhyInfo->RxMIMOEVMdbm[i] = EVMdbm; ++#endif ++ } ++ } ++ } ++ } ++ ++ ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->cfotail); ++ ++ } ++/* //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num);*/ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ /*UI BSS List signal strength(in percentage), make it good looking, from 0~100.*/ ++ /*It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().*/ ++ if (isCCKrate) { ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ /*2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/ ++ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, PWDB_ALL, FALSE, TRUE); ++#else ++ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/*PWDB_ALL;*/ ++#endif ++ } else { ++ if (rf_rx_num != 0) { ++ /* 2015/01 Sean, use the best two RSSI only, suggested by Ynlin and ChenYu.*/ ++ if (rf_rx_num == 1) ++ avg_rssi = best_rssi; ++ else ++ avg_rssi = (best_rssi + second_rssi)/2; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ /* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/ ++ pPhyInfo->SignalStrength = SignalScaleProc(pDM_Odm->Adapter, avg_rssi, FALSE, FALSE); ++#else ++ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, avg_rssi)); ++#endif ++ } ++ } ++#endif ++ pDM_Odm->RxPWDBAve = pDM_Odm->RxPWDBAve + pPhyInfo->RxPWDBAll; ++ ++ pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->antidx_anta; ++ pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->antidx_antb; ++ pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antidx_antc; ++ pDM_Odm->DM_FatTable.antsel_rx_keep_3 = pPhyStaRpt->antidx_antd; ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]: antidx_anta = ((%d)), MatchBSSID = ((%d))\n", pPktinfo->StationID, pPhyStaRpt->antidx_anta, pPktinfo->bPacketMatchBSSID));*/ ++ ++ ++/* DbgPrint("pPhyStaRpt->antidx_anta = %d, pPhyStaRpt->antidx_antb = %d\n",*/ ++/* pPhyStaRpt->antidx_anta, pPhyStaRpt->antidx_antb);*/ ++/* DbgPrint("----------------------------\n");*/ ++/* DbgPrint("pPktinfo->StationID=%d, pPktinfo->DataRate=0x%x\n",pPktinfo->StationID, pPktinfo->DataRate);*/ ++/* DbgPrint("pPhyStaRpt->r_RFMOD = %d\n", pPhyStaRpt->r_RFMOD);*/ ++/* DbgPrint("pPhyStaRpt->gain_trsw[0]=0x%x, pPhyStaRpt->gain_trsw[1]=0x%x\n",*/ ++/* pPhyStaRpt->gain_trsw[0],pPhyStaRpt->gain_trsw[1]);*/ ++/* DbgPrint("pPhyStaRpt->gain_trsw[2]=0x%x, pPhyStaRpt->gain_trsw[3]=0x%x\n",*/ ++/* pPhyStaRpt->gain_trsw_cd[0],pPhyStaRpt->gain_trsw_cd[1]);*/ ++/* DbgPrint("pPhyStaRpt->pwdb_all = 0x%x, pPhyInfo->RxPWDBAll = %d\n", pPhyStaRpt->pwdb_all, pPhyInfo->RxPWDBAll);*/ ++/* DbgPrint("pPhyStaRpt->cfotail[i] = 0x%x, pPhyStaRpt->CFO_tail[i] = 0x%x\n", pPhyStaRpt->cfotail[0], pPhyStaRpt->cfotail[1]);*/ ++/* DbgPrint("pPhyStaRpt->rxevm[0] = %d, pPhyStaRpt->rxevm[1] = %d\n", pPhyStaRpt->rxevm[0], pPhyStaRpt->rxevm[1]);*/ ++/* DbgPrint("pPhyStaRpt->rxevm[2] = %d, pPhyStaRpt->rxevm[3] = %d\n", pPhyStaRpt->rxevm_cd[0], pPhyStaRpt->rxevm_cd[1]);*/ ++/* DbgPrint("pPhyInfo->RxMIMOSignalStrength[0]=%d, pPhyInfo->RxMIMOSignalStrength[1]=%d, RxPWDBAll=%d\n",*/ ++/* pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1], pPhyInfo->RxPWDBAll);*/ ++/* DbgPrint("pPhyInfo->RxMIMOSignalStrength[2]=%d, pPhyInfo->RxMIMOSignalStrength[3]=%d\n",*/ ++/* pPhyInfo->RxMIMOSignalStrength[2], pPhyInfo->RxMIMOSignalStrength[3]);*/ ++/* DbgPrint("ppPhyInfo->RxMIMOSignalQuality[0]=%d, pPhyInfo->RxMIMOSignalQuality[1]=%d\n",*/ ++/* pPhyInfo->RxMIMOSignalQuality[0], pPhyInfo->RxMIMOSignalQuality[1]);*/ ++/* DbgPrint("ppPhyInfo->RxMIMOSignalQuality[2]=%d, pPhyInfo->RxMIMOSignalQuality[3]=%d\n",*/ ++/* pPhyInfo->RxMIMOSignalQuality[2], pPhyInfo->RxMIMOSignalQuality[3]);*/ ++ ++} ++ ++#endif ++ ++VOID ++odm_Init_RSSIForDM( ++ IN OUT PDM_ODM_T pDM_Odm ++ ) ++{ ++ ++} ++ ++VOID ++odm_Process_RSSIForDM( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN PODM_PHY_INFO_T pPhyInfo, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ ++ s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave; ++ u1Byte i, isCCKrate=0; ++ u1Byte RSSI_max, RSSI_min; ++ u4Byte OFDM_pkt=0; ++ u4Byte Weighting=0; ++ PSTA_INFO_T pEntry; ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ #endif ++ ++ if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM) ++ return; ++ ++ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY ++ odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI(pDM_Odm, pPhyInfo, pPktinfo); ++ #endif ++ ++ // ++ // 2012/05/30 MH/Luke.Lee Add some description ++ // In windows driver: AP/IBSS mode STA ++ // ++ //if (pDM_Odm->SupportPlatform == ODM_WIN) ++ //{ ++ // pEntry = pDM_Odm->pODM_StaInfo[pDM_Odm->pAidMap[pPktinfo->StationID-1]]; ++ //} ++ //else ++ pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID]; ++ ++ if(!IS_STA_VALID(pEntry) ) ++ { ++ return; ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ if ((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) && ++ (pDM_FatTable->enable_ctrl_frame_antdiv) ++ ) ++ { ++ if (pPktinfo->bPacketMatchBSSID) ++ pDM_Odm->data_frame_num++; ++ ++ if ((pDM_FatTable->use_ctrl_frame_antdiv)) { ++ if (!pPktinfo->bToSelf)/*data frame + CTRL frame*/ ++ return; ++ } else { ++ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/ ++ return; ++ } ++ } else ++#endif ++ { ++ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/ ++ return; ++ } ++ ++ if(pPktinfo->bPacketBeacon) ++ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++; ++ ++ isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M )?TRUE :FALSE; ++ pDM_Odm->RxRate = pPktinfo->DataRate; ++ ++ //--------------Statistic for antenna/path diversity------------------ ++ if(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) ++ { ++ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ ODM_Process_RSSIForAntDiv(pDM_Odm,pPhyInfo,pPktinfo); ++ #endif ++ } ++ #if(defined(CONFIG_PATH_DIVERSITY)) ++ else if(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV) ++ { ++ phydm_process_rssi_for_path_div(pDM_Odm,pPhyInfo,pPktinfo); ++ } ++ #endif ++ //-----------------Smart Antenna Debug Message------------------// ++ ++ UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK; ++ UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM; ++ UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) ++ { ++ ++ if(!isCCKrate)//ofdm rate ++ { ++#if (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) { ++ u1Byte RX_count = 0; ++ u4Byte RSSI_linear = 0; ++ ++ if (pDM_Odm->RXAntStatus & ODM_RF_A) { ++ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ RX_count++; ++ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]); ++ } else ++ pDM_Odm->RSSI_A = 0; ++ ++ if (pDM_Odm->RXAntStatus & ODM_RF_B) { ++ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; ++ RX_count++; ++ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]); ++ } else ++ pDM_Odm->RSSI_B = 0; ++ ++ if (pDM_Odm->RXAntStatus & ODM_RF_C) { ++ pDM_Odm->RSSI_C = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C]; ++ RX_count++; ++ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C]); ++ } else ++ pDM_Odm->RSSI_C = 0; ++ ++ if (pDM_Odm->RXAntStatus & ODM_RF_D) { ++ pDM_Odm->RSSI_D = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D]; ++ RX_count++; ++ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D]); ++ } else ++ pDM_Odm->RSSI_D = 0; ++ ++ /* Calculate average RSSI */ ++ switch (RX_count) { ++ case 2: ++ RSSI_linear = (RSSI_linear >> 1); ++ break; ++ case 3: ++ RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5; /* RSSI_linear/3 ~ RSSI_linear*11/32 */ ++ break; ++ case 4: ++ RSSI_linear = (RSSI_linear >> 2); ++ break; ++ } ++ RSSI_Ave = odm_ConvertTo_dB(RSSI_linear); ++ } else ++#endif ++ { ++ if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) { ++ RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ pDM_Odm->RSSI_B = 0; ++ } else { ++ /*DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d\n",*/ ++ /*pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]);*/ ++ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; ++ ++ if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) { ++ RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; ++ } else { ++ RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; ++ RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ } ++ if ((RSSI_max - RSSI_min) < 3) ++ RSSI_Ave = RSSI_max; ++ else if ((RSSI_max - RSSI_min) < 6) ++ RSSI_Ave = RSSI_max - 1; ++ else if ((RSSI_max - RSSI_min) < 10) ++ RSSI_Ave = RSSI_max - 2; ++ else ++ RSSI_Ave = RSSI_max - 3; ++ } ++ } ++ ++ //1 Process OFDM RSSI ++ if(UndecoratedSmoothedOFDM <= 0) // initialize ++ { ++ UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll; ++ } ++ else ++ { ++ if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM) ++ { ++ UndecoratedSmoothedOFDM = ++ ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + ++ (RSSI_Ave)) /(Rx_Smooth_Factor); ++ UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1; ++ } ++ else ++ { ++ UndecoratedSmoothedOFDM = ++ ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + ++ (RSSI_Ave)) /(Rx_Smooth_Factor); ++ } ++ } ++ if (pEntry->rssi_stat.OFDM_pkt != 64) { ++ i = 63; ++ pEntry->rssi_stat.OFDM_pkt -= (u4Byte)(((pEntry->rssi_stat.PacketMap>>i)&BIT0)-1); ++ } ++ pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0; ++ ++ } ++ else ++ { ++ RSSI_Ave = pPhyInfo->RxPWDBAll; ++ pDM_Odm->RSSI_A = (u1Byte) pPhyInfo->RxPWDBAll; ++ pDM_Odm->RSSI_B = 0xFF; ++ pDM_Odm->RSSI_C = 0xFF; ++ pDM_Odm->RSSI_D = 0xFF; ++ ++ //1 Process CCK RSSI ++ if(UndecoratedSmoothedCCK <= 0) // initialize ++ { ++ UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll; ++ } ++ else ++ { ++ if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK) ++ { ++ UndecoratedSmoothedCCK = ++ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + ++ (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); ++ UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1; ++ } ++ else ++ { ++ UndecoratedSmoothedCCK = ++ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + ++ (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); ++ } ++ } ++ i = 63; ++ pEntry->rssi_stat.OFDM_pkt -= (u4Byte)((pEntry->rssi_stat.PacketMap>>i)&BIT0); ++ pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1; ++ } ++ ++ //if(pEntry) ++ { ++ //2011.07.28 LukeLee: modified to prevent unstable CCK RSSI ++ if (pEntry->rssi_stat.OFDM_pkt == 64) { /* speed up when all packets are OFDM*/ ++ UndecoratedSmoothedPWDB = UndecoratedSmoothedOFDM; ++ } else { ++ if (pEntry->rssi_stat.ValidBit < 64) ++ pEntry->rssi_stat.ValidBit++; ++ ++ if (pEntry->rssi_stat.ValidBit == 64) { ++ Weighting = ((pEntry->rssi_stat.OFDM_pkt<<4) > 64)?64:(pEntry->rssi_stat.OFDM_pkt<<4); ++ UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6; ++ } else { ++ if (pEntry->rssi_stat.ValidBit != 0) ++ UndecoratedSmoothedPWDB = (pEntry->rssi_stat.OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-pEntry->rssi_stat.OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit; ++ else ++ UndecoratedSmoothedPWDB = 0; ++ } ++ } ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == -1) ++ phydm_ra_rssi_rpt_wk(pDM_Odm); ++ #endif ++ pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; ++ pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM; ++ pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ ++ //DbgPrint("OFDM_pkt=%d, Weighting=%d\n", OFDM_pkt, Weighting); ++ //DbgPrint("UndecoratedSmoothedOFDM=%d, UndecoratedSmoothedPWDB=%d, UndecoratedSmoothedCCK=%d\n", ++ // UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK); ++ ++ } ++ ++ } ++} ++ ++ ++#if(ODM_IC_11N_SERIES_SUPPORT ==1) ++// ++// Endianness before calling this API ++// ++VOID ++ODM_PhyStatusQuery_92CSeries( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ odm_RxPhyStatus92CSeries_Parsing(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo); ++ odm_Process_RSSIForDM(pDM_Odm, pPhyInfo, pPktinfo); ++} ++#endif ++ ++ ++// ++// Endianness before calling this API ++// ++#if ODM_IC_11AC_SERIES_SUPPORT ++ ++VOID ++ODM_PhyStatusQuery_JaguarSeries( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ odm_RxPhyStatusJaguarSeries_Parsing( ++ pDM_Odm, ++ pPhyInfo, ++ pPhyStatus, ++ pPktinfo); ++ ++ odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ //phydm_sbd_check(pDM_Odm); ++#endif ++} ++#endif ++ ++VOID ++ODM_PhyStatusQuery( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) { ++ phydm_RxPhyStatusJaguarSeries2(pDM_Odm, pPhyStatus, pPktinfo, pPhyInfo); ++ return; ++ } ++#endif ++ ++#if ODM_IC_11AC_SERIES_SUPPORT ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ ODM_PhyStatusQuery_JaguarSeries(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo); ++#endif ++ ++#if ODM_IC_11N_SERIES_SUPPORT ++ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES ) ++ ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo); ++#endif ++} ++ ++// For future use. ++VOID ODM_MacStatusQuery( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN pu1Byte pMacStatus, ++ IN u1Byte MacID, ++ IN BOOLEAN bPacketMatchBSSID, ++ IN BOOLEAN bPacketToSelf, ++ IN BOOLEAN bPacketBeacon ++ ) ++{ ++ // 2011/10/19 Driver team will handle in the future. ++ ++} ++ ++ ++// ++// If you want to add a new IC, Please follow below template and generate a new one. ++// ++// ++ ++HAL_STATUS ++ODM_ConfigRFWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_Config_Type ConfigType, ++ IN ODM_RF_RADIO_PATH_E eRFPath ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", ++ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); ++ ++//1 AP doesn't use PHYDM power tracking table in these ICs ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++#if (RTL8723A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723A) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8723A,_RadioA); ++ } ++ } ++#endif ++#if (RTL8812A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A){ ++ READ_AND_CONFIG_MP(8812A,_RadioA); ++ } ++ else if(eRFPath == ODM_RF_PATH_B){ ++ READ_AND_CONFIG_MP(8812A,_RadioB); ++ } ++ } ++ else if(ConfigType == CONFIG_RF_TXPWR_LMT) { ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ if ((pHalData->EEPROMSVID == 0x17AA && pHalData->EEPROMSMID == 0xA811) || ++ (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0xA812) || ++ (pHalData->EEPROMSVID == 0x10EC && pHalData->EEPROMSMID == 0x8812)) ++ READ_AND_CONFIG_MP(8812A,_TXPWR_LMT_HM812A03); ++ else ++ #endif ++ READ_AND_CONFIG_MP(8812A,_TXPWR_LMT); ++ } ++ } ++#endif ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A){ ++ READ_AND_CONFIG_MP(8821A,_RadioA); ++ } ++ } ++ else if(ConfigType == CONFIG_RF_TXPWR_LMT) { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { ++ if (pDM_Odm->ExtPA5G || pDM_Odm->ExtLNA5G) ++ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_FEM); ++ else ++ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_IPA); ++ } ++ else { ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (pMgntInfo->CustomerID == RT_CID_8821AE_ASUS_MB) ++ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_8mm); ++ else if (pMgntInfo->CustomerID == RT_CID_ASUS_NB) ++ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A_SAR_5mm); ++ else ++ #endif ++ READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A); ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigRFWithHeaderFile\n")); ++ } ++#endif ++ ++#if (RTL8723B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) ++ READ_AND_CONFIG_MP(8723B,_RadioA); ++ else if(ConfigType == CONFIG_RF_TXPWR_LMT) ++ READ_AND_CONFIG_MP(8723B,_TXPWR_LMT); ++ } ++#endif ++ ++#if (RTL8192E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8192E,_RadioA); ++ else if(eRFPath == ODM_RF_PATH_B) ++ READ_AND_CONFIG_MP(8192E,_RadioB); ++ } else if (ConfigType == CONFIG_RF_TXPWR_LMT) { ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if ((pHalData->EEPROMSVID == 0x11AD && pHalData->EEPROMSMID == 0x8192) || ++ (pHalData->EEPROMSVID == 0x11AD && pHalData->EEPROMSMID == 0x8193)) ++ READ_AND_CONFIG_MP(8192E, _TXPWR_LMT_8192E_SAR_5mm); ++ else ++#endif ++ READ_AND_CONFIG_MP(8192E,_TXPWR_LMT); ++ } ++ } ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++//1 All platforms support ++#if (RTL8188E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8188E,_RadioA); ++ } ++ else if(ConfigType == CONFIG_RF_TXPWR_LMT) ++ READ_AND_CONFIG_MP(8188E,_TXPWR_LMT); ++ } ++#endif ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8814A,_RadioA); ++ else if(eRFPath == ODM_RF_PATH_B) ++ READ_AND_CONFIG_MP(8814A,_RadioB); ++ else if(eRFPath == ODM_RF_PATH_C) ++ READ_AND_CONFIG_MP(8814A,_RadioC); ++ else if(eRFPath == ODM_RF_PATH_D) ++ READ_AND_CONFIG_MP(8814A,_RadioD); ++ } ++ else if(ConfigType == CONFIG_RF_TXPWR_LMT) ++ READ_AND_CONFIG_MP(8814A,_TXPWR_LMT); ++ } ++#endif ++#if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) { ++ if (ConfigType == CONFIG_RF_RADIO) { ++ if (eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8703B, _RadioA); ++ } ++ } ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ if (ConfigType == CONFIG_RF_RADIO) { ++ if (eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8188F, _RadioA); ++ } else if (ConfigType == CONFIG_RF_TXPWR_LMT) ++ READ_AND_CONFIG_MP(8188F, _TXPWR_LMT); ++ } ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (RTL8821B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821B) ++ { ++ if (ConfigType == CONFIG_RF_RADIO) { ++ if (eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG(8821B, _RadioA); ++ } else if (ConfigType == CONFIG_RF_TXPWR_LMT) ++ READ_AND_CONFIG(8821B, _TXPWR_LMT); ++ } ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8822B) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_MP(8822B, _RadioA); ++ else if(eRFPath == ODM_RF_PATH_B) ++ READ_AND_CONFIG_MP(8822B, _RadioB); ++ } ++ } ++#endif ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ { ++ if(ConfigType == CONFIG_RF_RADIO) { ++ if(eRFPath == ODM_RF_PATH_A) ++ READ_AND_CONFIG_TC(8188F,_RadioA); ++ } ++ } ++#endif ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ return HAL_STATUS_SUCCESS; ++} ++ ++HAL_STATUS ++ODM_ConfigRFWithTxPwrTrackHeaderFile( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", ++ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); ++ ++ ++//1 AP doesn't use PHYDM power tracking table in these ICs ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++#if RTL8821A_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8821A,_TxPowerTrack_SDIO); ++ } ++#endif ++#if RTL8812A_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_PCIE); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { ++ if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) ++ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_RFE3); ++ else ++ READ_AND_CONFIG_MP(8812A,_TxPowerTrack_USB); ++ } ++ ++ } ++#endif ++#if RTL8192E_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_PCIE); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8192E,_TxPowerTrack_SDIO); ++ } ++#endif ++#if RTL8723B_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_PCIE); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8723B,_TxPowerTrack_SDIO); ++ } ++#endif ++#if RTL8188E_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ++ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8188E,_TxPowerTrack_SDIO); ++ } ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++//1 All platforms support ++#if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ if(pDM_Odm->RFEType == 0) ++ READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type0); ++ else if(pDM_Odm->RFEType == 2) ++ READ_AND_CONFIG_MP(8814A,_TxPowerTrack_Type2); ++ else if (pDM_Odm->RFEType == 5) ++ READ_AND_CONFIG_MP(8814A, _TxPowerTrack_Type5); ++ else ++ READ_AND_CONFIG_MP(8814A,_TxPowerTrack); ++ } ++#endif ++#if RTL8703B_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8703B, _TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8703B, _TxPowerTrack_SDIO); ++ } ++#endif ++ ++#if RTL8188F_SUPPORT ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ READ_AND_CONFIG_MP(8188F, _TxPowerTrack_USB); ++ else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ++ READ_AND_CONFIG_MP(8188F, _TxPowerTrack_SDIO); ++ } ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if RTL8821B_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8821B) ++ READ_AND_CONFIG(8821B,_TxPowerTrack); ++#endif ++#if RTL8822B_SUPPORT ++/* if(pDM_Odm->SupportICType == ODM_RTL8822B) ++ READ_AND_CONFIG_MP(8822B, _TxPowerTrack); */ ++#endif ++ ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if RTL8188F_SUPPORT ++ if(pDM_Odm->SupportICType == ODM_RTL8188F) ++ READ_AND_CONFIG_TC(8188F,_TxPowerTrack_PCIE); ++#endif ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ ++ return HAL_STATUS_SUCCESS; ++} ++ ++HAL_STATUS ++ODM_ConfigBBWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_BB_Config_Type ConfigType ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++#endif ++ ++//1 AP doesn't use PHYDM initialization in these ICs ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++#if (RTL8723A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8723A) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8723A,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8723A,_AGC_TAB); ++ } ++ } ++#endif ++#if (RTL8812A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8812A,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8812A,_AGC_TAB); ++ } ++ else if(ConfigType == CONFIG_BB_PHY_REG_PG) ++ { ++ if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) ++ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_ASUS); ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ else if (pMgntInfo->CustomerID == RT_CID_WNC_NEC && pDM_Odm->bIsMPChip) ++ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_NEC); ++ #endif ++ else ++ READ_AND_CONFIG_MP(8812A,_PHY_REG_PG); ++ } ++ else if(ConfigType == CONFIG_BB_PHY_REG_MP){ ++ READ_AND_CONFIG_MP(8812A,_PHY_REG_MP); ++ } ++ else if(ConfigType == CONFIG_BB_AGC_TAB_DIFF) ++ { ++ if ((36 <= *pDM_Odm->pChannel) && (*pDM_Odm->pChannel <= 64)) ++ AGC_DIFF_CONFIG_MP(8812A,LB); ++ else if (100 <= *pDM_Odm->pChannel) ++ AGC_DIFF_CONFIG_MP(8812A,HB); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8812AGCTABArray\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8812PHY_REGArray\n")); ++ } ++#endif ++#if (RTL8821A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8821A,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8821A,_AGC_TAB); ++ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ ++ READ_AND_CONFIG_MP(8821A,_PHY_REG_PG); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8821AGCTABArray\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8821PHY_REGArray\n")); ++ } ++#endif ++#if (RTL8723B_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8723B,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8723B,_AGC_TAB); ++ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ ++ READ_AND_CONFIG_MP(8723B,_PHY_REG_PG); ++ } ++ } ++#endif ++#if (RTL8192E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8192E,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8192E,_AGC_TAB); ++ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ ++ READ_AND_CONFIG_MP(8192E,_PHY_REG_PG); ++ } ++ } ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++ ++//1 All platforms support ++#if (RTL8188E_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG_MP(8188E,_PHY_REG); ++ else if(ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG_MP(8188E,_AGC_TAB); ++ else if(ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG_MP(8188E,_PHY_REG_PG); ++ } ++#endif ++#if (RTL8814A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG){ ++ READ_AND_CONFIG_MP(8814A,_PHY_REG); ++ }else if(ConfigType == CONFIG_BB_AGC_TAB){ ++ READ_AND_CONFIG_MP(8814A,_AGC_TAB); ++ }else if(ConfigType == CONFIG_BB_PHY_REG_PG){ ++ READ_AND_CONFIG_MP(8814A,_PHY_REG_PG); ++ }else if(ConfigType == CONFIG_BB_PHY_REG_MP){ ++ READ_AND_CONFIG_MP(8814A,_PHY_REG_MP); ++ } ++ } ++#endif ++#if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) { ++ if (ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG_MP(8703B, _PHY_REG); ++ else if (ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG_MP(8703B, _AGC_TAB); ++ else if (ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG_MP(8703B, _PHY_REG_PG); ++ } ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ if (ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG_MP(8188F, _PHY_REG); ++ else if (ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG_MP(8188F, _AGC_TAB); ++ else if (ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG_MP(8188F, _PHY_REG_PG); ++ } ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (RTL8821B_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8821B) ++ { ++ if (ConfigType == CONFIG_BB_PHY_REG) { ++ READ_AND_CONFIG(8821B,_PHY_REG); ++ } else if (ConfigType == CONFIG_BB_AGC_TAB) { ++ READ_AND_CONFIG(8821B,_AGC_TAB); ++ } else if (ConfigType == CONFIG_BB_PHY_REG_PG) { ++ READ_AND_CONFIG(8821B,_PHY_REG_PG); ++ } ++ } ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8822B) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG_MP(8822B, _PHY_REG); ++ else if(ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG_MP(8822B, _AGC_TAB); ++/* else if(ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG_MP(8822B, _PHY_REG_PG); ++ else if(ConfigType == CONFIG_BB_PHY_REG_MP) ++ READ_AND_CONFIG_MP(8822B, _PHY_REG_MP); */ ++ } ++#endif ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if (RTL8188F_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8188F) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG_TC(8188F,_PHY_REG); ++ else if(ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG_TC(8188F,_AGC_TAB); ++ else if(ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG_TC(8188F,_PHY_REG_PG); ++ } ++#endif ++#endif ++#if (RTL8195A_SUPPORT == 1) ++ if(pDM_Odm->SupportICType == ODM_RTL8195A) ++ { ++ if(ConfigType == CONFIG_BB_PHY_REG) ++ READ_AND_CONFIG(8195A,_PHY_REG); ++ else if(ConfigType == CONFIG_BB_AGC_TAB) ++ READ_AND_CONFIG(8195A,_AGC_TAB); ++ else if(ConfigType == CONFIG_BB_PHY_REG_PG) ++ READ_AND_CONFIG(8195A,_PHY_REG_PG); ++ } ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ return HAL_STATUS_SUCCESS; ++} ++ ++HAL_STATUS ++ODM_ConfigMACWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("===>ODM_ConfigMACWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ++ ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", ++ pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); ++ ++//1 AP doesn't use PHYDM initialization in these ICs ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++#if (RTL8723A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723A){ ++ READ_AND_CONFIG_MP(8723A,_MAC_REG); ++ } ++#endif ++#if (RTL8812A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8812){ ++ READ_AND_CONFIG_MP(8812A,_MAC_REG); ++ } ++#endif ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821){ ++ READ_AND_CONFIG_MP(8821A,_MAC_REG); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n")); ++ } ++#endif ++#if (RTL8723B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723B){ ++ READ_AND_CONFIG_MP(8723B,_MAC_REG); ++ } ++#endif ++#if (RTL8192E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8192E){ ++ READ_AND_CONFIG_MP(8192E,_MAC_REG); ++ } ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++//1 All platforms support ++#if (RTL8188E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E){ ++ READ_AND_CONFIG_MP(8188E,_MAC_REG); ++ } ++#endif ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8814A){ ++ READ_AND_CONFIG_MP(8814A,_MAC_REG); ++ } ++#endif ++#if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) ++ READ_AND_CONFIG_MP(8703B, _MAC_REG); ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ READ_AND_CONFIG_MP(8188F, _MAC_REG); ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (RTL8821B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821B){ ++ READ_AND_CONFIG(8821B,_MAC_REG); ++ } ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8822B) ++ READ_AND_CONFIG_MP(8822B, _MAC_REG); ++#endif ++ ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ READ_AND_CONFIG_TC(8188F,_MAC_REG); ++#endif ++#endif ++#if (RTL8195A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8195A) ++ READ_AND_CONFIG_MP(8195A,_MAC_REG); ++#endif ++#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/ ++ ++ return HAL_STATUS_SUCCESS; ++} ++ ++HAL_STATUS ++ODM_ConfigFWWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_FW_Config_Type ConfigType, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pSize ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++#if (RTL8188E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ #ifdef CONFIG_SFW_SUPPORTED ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8188E_T,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8188E_T,_FW_WoWLAN); ++ else if(ConfigType == CONFIG_FW_NIC_2) ++ READ_FIRMWARE_MP(8188E_S,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN_2) ++ READ_FIRMWARE_MP(8188E_S,_FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ if (ConfigType == CONFIG_FW_AP) ++ READ_FIRMWARE_MP(8188E_T,_FW_AP); ++ else if (ConfigType == CONFIG_FW_AP_2) ++ READ_FIRMWARE_MP(8188E_S,_FW_AP); ++ #endif //CONFIG_AP_WOWLAN ++ #else ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8188E_T,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8188E_T,_FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP) ++ READ_FIRMWARE_MP(8188E_T,_FW_AP); ++ #endif //CONFIG_AP_WOWLAN ++ #endif ++ } ++#endif ++#if (RTL8723B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8723B,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8723B,_FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE(8723B,_FW_AP_WoWLAN); ++ #endif ++ ++ } ++#endif //#if (RTL8723B_SUPPORT == 1) ++#if (RTL8812A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8812A,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8812A,_FW_WoWLAN); ++ else if (ConfigType == CONFIG_FW_BT) ++ READ_FIRMWARE_MP(8812A,_FW_NIC_BT); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE(8812A,_FW_AP); ++ #endif ++ } ++#endif ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821){ ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8821A,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8821A,_FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE_MP(8821A , _FW_AP); ++ #endif /*CONFIG_AP_WOWLAN*/ ++ else if (ConfigType == CONFIG_FW_BT) ++ READ_FIRMWARE_MP(8821A,_FW_NIC_BT); ++ } ++#endif ++#if (RTL8192E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8192E) ++ { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8192E,_FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8192E,_FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE_MP(8192E,_FW_AP); ++ #endif ++ } ++#endif ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8814A,_FW_NIC); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE_MP(8814A,_FW_AP); ++ #endif ++ } ++#endif ++#if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8703B, _FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8703B, _FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE(8703B, _FW_AP_WoWLAN); ++ #endif ++ } ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8188F, _FW_NIC); ++ else if (ConfigType == CONFIG_FW_WoWLAN) ++ READ_FIRMWARE_MP(8188F, _FW_WoWLAN); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP) ++ READ_FIRMWARE_MP(8188F,_FW_AP); ++ #endif ++ } ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#if (RTL8821B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821B) ++ { ++ } ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8822B) ++ { ++ /* ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8822B,_FW_NIC); ++ #ifdef CONFIG_AP_WOWLAN ++ else if (ConfigType == CONFIG_FW_AP_WoWLAN) ++ READ_FIRMWARE(8822B,_FW_AP); ++ #endif */ ++ } ++#endif ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ { ++ if (ConfigType == CONFIG_FW_NIC) ++ READ_FIRMWARE_MP(8188F,_FW_NIC); ++ } ++#endif ++#endif ++#endif//(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++#endif//(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ return HAL_STATUS_SUCCESS; ++} ++ ++u4Byte ++ODM_GetHWImgVersion( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ u4Byte Version=0; ++ ++//1 AP doesn't use PHYDM initialization in these ICs ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++#if (RTL8723A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723A) ++ Version = GET_VERSION_MP(8723A,_MAC_REG); ++#endif ++#if (RTL8723B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8723B) ++ Version = GET_VERSION_MP(8723B,_MAC_REG); ++#endif ++#if (RTL8821A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821) ++ Version = GET_VERSION_MP(8821A,_MAC_REG); ++#endif ++#if (RTL8192E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8192E) ++ Version = GET_VERSION_MP(8192E,_MAC_REG); ++#endif ++#if (RTL8812A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) ++ Version = GET_VERSION_MP(8812A,_MAC_REG); ++#endif ++#endif //(DM_ODM_SUPPORT_TYPE != ODM_AP) ++ ++/*1 All platforms support*/ ++#if (RTL8188E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ Version = GET_VERSION_MP(8188E,_MAC_REG); ++#endif ++#if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ Version = GET_VERSION_MP(8814A,_MAC_REG); ++#endif ++#if (RTL8703B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8703B) ++ Version = GET_VERSION_MP(8703B, _MAC_REG); ++#endif ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ Version = GET_VERSION_MP(8188F, _MAC_REG); ++#endif ++ ++//1 New ICs (WIN only) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#if (RTL8821B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8821B) ++ Version = GET_VERSION(8821B,_MAC_REG); ++#endif ++#if (RTL8822B_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8822B) ++ Version = GET_VERSION(8822B, _MAC_REG); ++#endif ++#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++#if (RTL8188F_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188F) ++ Version = GET_VERSION_TC(8188F, _MAC_REG); ++#endif ++#endif ++#endif //(DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ return Version; ++} ++ ++#if (RTL8822B_SUPPORT == 1) ++/* For 8822B only!! need to move to FW finally */ ++/*==============================================*/ ++ ++VOID ++phydm_ResetPhyInfo( ++ IN PDM_ODM_T pPhydm, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ pPhyInfo->RxPWDBAll = 0; ++ pPhyInfo->SignalQuality = 0; ++ pPhyInfo->BandWidth = 0; ++#if (RTL8822B_SUPPORT == 1) ++ pPhyInfo->RxCount = 0; ++#endif ++ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOSignalQuality, 0 , 4); ++ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOSignalStrength, 0, 4); ++ ODM_Memory_Set(pPhydm, pPhyInfo->RxSNR, 0, 4); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->RxPower = -110; ++ pPhyInfo->RecvSignalPower = -110; ++ pPhyInfo->BTRxRSSIPercentage = 0; ++ pPhyInfo->SignalStrength = 0; ++ pPhyInfo->btCoexPwrAdjust = 0; ++#if (RTL8822B_SUPPORT == 1) ++ pPhyInfo->channel = 0; ++ pPhyInfo->bMuPacket = 0; ++ pPhyInfo->bBeamformed = 0; ++ pPhyInfo->rxsc = 0; ++#endif ++ ODM_Memory_Set(pPhydm, pPhyInfo->RxPwr, -110, 4); ++ ODM_Memory_Set(pPhydm, pPhyInfo->RxMIMOEVMdbm, 0, 4); ++ ODM_Memory_Set(pPhydm, pPhyInfo->Cfo_short, 0, 8); ++ ODM_Memory_Set(pPhydm, pPhyInfo->Cfo_tail, 0, 8); ++#endif ++} ++ ++VOID ++phydm_SetPerPathPhyInfo( ++ IN u1Byte RxPath, ++ IN s1Byte RxPwr, ++ IN s1Byte RxEVM, ++ IN s1Byte Cfo_tail, ++ IN s1Byte RxSNR, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ u1Byte EVMdBm = 0; ++ u1Byte EVMPercentage = 0; ++ ++ /* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */ ++ ++ if (RxEVM < 0) { ++ /* Calculate EVM in dBm */ ++ EVMdBm = ((u1Byte)(0 - RxEVM) >> 1); ++ ++ /* Calculate EVM in percentage */ ++ if (EVMdBm >= 33) ++ EVMPercentage = 100; ++ else ++ EVMPercentage = (EVMdBm << 1) + (EVMdBm); ++ } ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->RxPwr[RxPath] = RxPwr; ++ pPhyInfo->RxMIMOEVMdbm[RxPath] = EVMdBm; ++ ++ /* CFO = CFO_tail * 312.5 / 2^7 ~= CFO tail * 39/512 (kHz)*/ ++ pPhyInfo->Cfo_tail[RxPath] = Cfo_tail; ++ pPhyInfo->Cfo_tail[RxPath] = ((pPhyInfo->Cfo_tail[RxPath] << 5) + (pPhyInfo->Cfo_tail[RxPath] << 2) + ++ (pPhyInfo->Cfo_tail[RxPath] << 1) + (pPhyInfo->Cfo_tail[RxPath])) >> 9; ++#endif ++ ++ pPhyInfo->RxMIMOSignalStrength[RxPath] = odm_QueryRxPwrPercentage(RxPwr); ++ pPhyInfo->RxMIMOSignalQuality[RxPath] = EVMPercentage; ++ pPhyInfo->RxSNR[RxPath] = RxSNR >> 1; ++ ++/* ++ //if (pPktinfo->bPacketMatchBSSID) ++ { ++ DbgPrint("Path (%d)--------\n", RxPath); ++ DbgPrint("RxPwr = %d, Signal strength = %d\n", pPhyInfo->RxPwr[RxPath], pPhyInfo->RxMIMOSignalStrength[RxPath]); ++ DbgPrint("EVMdBm = %d, Signal quality = %d\n", pPhyInfo->RxMIMOEVMdbm[RxPath], pPhyInfo->RxMIMOSignalQuality[RxPath]); ++ DbgPrint("CFO = %d, SNR = %d\n", pPhyInfo->Cfo_tail[RxPath], pPhyInfo->RxSNR[RxPath]); ++ } ++*/ ++} ++ ++VOID ++phydm_SetCommonPhyInfo( ++ IN s1Byte RxPower, ++ IN u1Byte channel, ++ IN BOOLEAN bBeamformed, ++ IN BOOLEAN bMuPacket, ++ IN u1Byte bandwidth, ++ IN u1Byte signalQuality, ++ IN u1Byte rxsc, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ pPhyInfo->RxPower = RxPower; /* RSSI in dB */ ++ pPhyInfo->RecvSignalPower = RxPower; /* RSSI in dB */ ++ pPhyInfo->channel = channel; /* channel number */ ++ pPhyInfo->bBeamformed = bBeamformed; /* apply BF */ ++ pPhyInfo->bMuPacket = bMuPacket; /* MU packet */ ++ pPhyInfo->rxsc = rxsc; ++#endif ++ pPhyInfo->RxPWDBAll = odm_QueryRxPwrPercentage(RxPower); /* RSSI in percentage */ ++ pPhyInfo->SignalQuality = signalQuality; /* signal quality */ ++ pPhyInfo->BandWidth = bandwidth; /* bandwidth */ ++ ++/* ++ //if (pPktinfo->bPacketMatchBSSID) ++ { ++ DbgPrint("RxPWDBAll = %d, RxPower = %d, RecvSignalPower = %d\n", pPhyInfo->RxPWDBAll, pPhyInfo->RxPower, pPhyInfo->RecvSignalPower); ++ DbgPrint("SignalQuality = %d\n", pPhyInfo->SignalQuality); ++ DbgPrint("bBeamformed = %d, bMuPacket = %d, RxCount = %d\n", pPhyInfo->bBeamformed, pPhyInfo->bMuPacket, pPhyInfo->RxCount + 1); ++ DbgPrint("channel = %d, rxsc = %d, BandWidth = %d\n", channel, rxsc, bandwidth); ++ } ++*/ ++} ++ ++VOID ++phydm_GetRxPhyStatusType0( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ /* Type 0 is used for cck packet */ ++ ++ PPHY_STATUS_RPT_JAGUAR2_TYPE0 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE0)pPhyStatus; ++ u1Byte i, SQ = 0; ++ ++ /* Calculate Signal Quality*/ ++ if (pPktinfo->bPacketMatchBSSID) { ++ if (pPhyStaRpt->signal_quality >= 64) ++ SQ = 0; ++ else if (pPhyStaRpt->signal_quality <= 20) ++ SQ = 100; ++ else { ++ /* mapping to 2~99% */ ++ SQ = 64 - pPhyStaRpt->signal_quality; ++ SQ = ((SQ << 3) + SQ) >> 2; ++ } ++ } ++ ++ /* Update CCK packet counter */ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; ++ ++ /* Update Common information */ ++ phydm_SetCommonPhyInfo((pPhyStaRpt->pwdb - 110), pPhyStaRpt->channel, FALSE, ++ FALSE, ODM_BW20M, SQ, pPhyStaRpt->rxsc, pPhyInfo); ++ ++ /* Update CCK pwdb */ ++ phydm_SetPerPathPhyInfo(ODM_RF_PATH_A, (pPhyStaRpt->pwdb - 110), 0, 0, 0, pPhyInfo); /* Update per-path information */ ++ ++/* ++ //if (pPktinfo->bPacketMatchBSSID) ++ { ++ DbgPrint("pwdb = 0x%x, MP gain index = 0x%x, TRSW = 0x%x\n", pPhyStaRpt->pwdb, pPhyStaRpt->gain, pPhyStaRpt->trsw); ++ DbgPrint("channel = %d, band = %d, rxsc = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->rxsc); ++ DbgPrint("agc_table = 0x%x, agc_rpt 0x%x, bb_power = 0x%x\n", pPhyStaRpt->agc_table, pPhyStaRpt->agc_rpt, pPhyStaRpt->bb_power); ++ DbgPrint("length = %d, SQ = %d\n", pPhyStaRpt->length, pPhyStaRpt->signal_quality); ++ DbgPrint("antidx a = 0x%x, b = 0x%x, c = 0x%x, d = 0x%x\n", pPhyStaRpt->antidx_a, pPhyStaRpt->antidx_b, pPhyStaRpt->antidx_c, pPhyStaRpt->antidx_d); ++ DbgPrint("rsvd_0 = 0x%x, rsvd_1 = 0x%x, rsvd_2 = 0x%x\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2); ++ DbgPrint("rsvd_3 = 0x%x, rsvd_4 = 0x%x, rsvd_5 = 0x%x\n", pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4, pPhyStaRpt->rsvd_5); ++ DbgPrint("rsvd_6 = 0x%x, rsvd_7 = 0x%x, rsvd_8 = 0x%x\n", pPhyStaRpt->rsvd_6, pPhyStaRpt->rsvd_7, pPhyStaRpt->rsvd_8); ++ } ++*/ ++} ++ ++VOID ++phydm_GetRxPhyStatusType1( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ /* Type 1 is used for ofdm packet */ ++ ++ PPHY_STATUS_RPT_JAGUAR2_TYPE1 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE1)pPhyStatus; ++ s1Byte rx_pwr_db = -120; ++ u1Byte i, rxsc, bw, RxCount = 0; ++ BOOLEAN bMU; ++ ++ /* Update OFDM packet counter */ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; ++ ++ /* Update per-path information */ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { ++ if (pDM_Odm->RXAntStatus & BIT(i)) { ++ s1Byte rx_path_pwr_db; ++ ++ /* RX path counter */ ++ RxCount++; ++ ++ /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */ ++ /* EVM report is reported by stream, not path */ ++ rx_path_pwr_db = pPhyStaRpt->pwdb[i] - 110; /* per-path pwdb in dB domain */ ++ phydm_SetPerPathPhyInfo(i, rx_path_pwr_db, pPhyStaRpt->rxevm[RxCount - 1], ++ pPhyStaRpt->cfo_tail[i], pPhyStaRpt->rxsnr[i], pPhyInfo); ++ ++ /* search maximum pwdb */ ++ if (rx_path_pwr_db > rx_pwr_db) ++ rx_pwr_db = rx_path_pwr_db; ++ } ++ } ++ ++ /* mapping RX counter from 1~4 to 0~3 */ ++ if (RxCount > 0) ++ pPhyInfo->RxCount = RxCount - 1; ++ ++ /* Check if MU packet or not */ ++ if ((pPhyStaRpt->gid != 0) && (pPhyStaRpt->gid != 63)) { ++ bMU = TRUE; ++ pDM_Odm->PhyDbgInfo.NumQryMuPkt++; ++ } else ++ bMU = FALSE; ++ ++ /* Count BF packet */ ++ pDM_Odm->PhyDbgInfo.NumQryBfPkt = pDM_Odm->PhyDbgInfo.NumQryBfPkt + pPhyStaRpt->beamformed; ++ ++ /* Check sub-channel */ ++ if ((pPktinfo->DataRate > ODM_RATE11M) && (pPktinfo->DataRate < ODM_RATEMCS0)) ++ rxsc = pPhyStaRpt->l_rxsc; ++ else ++ rxsc = pPhyStaRpt->ht_rxsc; ++ ++ /* Check RX bandwidth */ ++ if ((rxsc >= 1) && (rxsc <= 8)) ++ bw = ODM_BW20M; ++ else if ((rxsc >= 9) && (rxsc <= 12)) ++ bw = ODM_BW40M; ++ else if (rxsc >= 13) ++ bw = ODM_BW80M; ++ else ++ bw = pPhyStaRpt->rf_mode; ++ ++ /* Update packet information */ ++ phydm_SetCommonPhyInfo(rx_pwr_db, pPhyStaRpt->channel, (BOOLEAN)pPhyStaRpt->beamformed, ++ bMU, bw, odm_EVMdbToPercentage(pPhyStaRpt->rxevm[0]), rxsc, pPhyInfo); ++ ++/* ++ //if (pPktinfo->bPacketMatchBSSID) ++ { ++ DbgPrint("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d, rf_mode = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->l_rxsc, pPhyStaRpt->ht_rxsc, pPhyStaRpt->rf_mode); ++ DbgPrint("Antidx A = %d, B = %d, C = %d, D = %d\n", pPhyStaRpt->antidx_a, pPhyStaRpt->antidx_b, pPhyStaRpt->antidx_c, pPhyStaRpt->antidx_d); ++ DbgPrint("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->pwdb[0], pPhyStaRpt->pwdb[1], pPhyStaRpt->pwdb[2], pPhyStaRpt->pwdb[3]); ++ DbgPrint("EVM A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->rxevm[0], pPhyStaRpt->rxevm[1], pPhyStaRpt->rxevm[2], pPhyStaRpt->rxevm[3]); ++ DbgPrint("SNR A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->rxsnr[0], pPhyStaRpt->rxsnr[1], pPhyStaRpt->rxsnr[2], pPhyStaRpt->rxsnr[3]); ++ DbgPrint("CFO A: %d, B: %d, C: %d, D: %d\n", pPhyStaRpt->cfo_tail[0], pPhyStaRpt->cfo_tail[1], pPhyStaRpt->cfo_tail[2], pPhyStaRpt->cfo_tail[3]); ++ DbgPrint("paid = %d, gid = %d, length = %d\n", (pPhyStaRpt->paid + (pPhyStaRpt->paid_msb<<8)), pPhyStaRpt->gid, pPhyStaRpt->lsig_length); ++ DbgPrint("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", pPhyStaRpt->ldpc, pPhyStaRpt->stbc, pPhyStaRpt->beamformed, pPhyStaRpt->gnt_bt, pPhyStaRpt->hw_antsw_occu); ++ DbgPrint("NBI: %d, pos: %d\n", pPhyStaRpt->nb_intf_flag, (pPhyStaRpt->intf_pos + (pPhyStaRpt->intf_pos_msb<<8))); ++ DbgPrint("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2, pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4, pPhyStaRpt->rsvd_5); ++ } ++ DbgPrint("phydm_GetRxPhyStatusType1 pPktinfo->bPacketMatchBSSID = %d\n", pPktinfo->bPacketMatchBSSID); ++ DbgPrint("pPktinfo->DataRate = 0x%x\n", pPktinfo->DataRate); ++*/ ++} ++ ++VOID ++phydm_GetRxPhyStatusType2( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ PPHY_STATUS_RPT_JAGUAR2_TYPE2 pPhyStaRpt = (PPHY_STATUS_RPT_JAGUAR2_TYPE2)pPhyStatus; ++ s1Byte rx_pwr_db = -120; ++ u1Byte i, rxsc, bw, RxCount = 0; ++ ++ /* Update OFDM packet counter */ ++ pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; ++ ++ /* Update per-path information */ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { ++ if (pDM_Odm->RXAntStatus & BIT(i)) { ++ s1Byte rx_path_pwr_db; ++ ++ /* RX path counter */ ++ RxCount++; ++ ++ /* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */ ++ rx_path_pwr_db = pPhyStaRpt->pwdb[i] - 110; /* per-path pwdb in dB domain */ ++ phydm_SetPerPathPhyInfo(i, rx_path_pwr_db, 0, 0, 0, pPhyInfo); ++ ++ /* search maximum pwdb */ ++ if (rx_path_pwr_db > rx_pwr_db) ++ rx_pwr_db = rx_path_pwr_db; ++ } ++ } ++ ++ /* mapping RX counter from 1~4 to 0~3 */ ++ if (RxCount > 0) ++ pPhyInfo->RxCount = RxCount - 1; ++ ++ /* Check RX sub-channel */ ++ if ((pPktinfo->DataRate > ODM_RATE11M) && (pPktinfo->DataRate < ODM_RATEMCS0)) ++ rxsc = pPhyStaRpt->l_rxsc; ++ else ++ rxsc = pPhyStaRpt->ht_rxsc; ++ ++ /* Check RX bandwidth */ ++ /* the BW information of sc=0 is useless, because there is no information of RF mode*/ ++ if ((rxsc >= 1) && (rxsc <= 8)) ++ bw = ODM_BW20M; ++ else if ((rxsc >= 9) && (rxsc <= 12)) ++ bw = ODM_BW40M; ++ else if (rxsc >= 13) ++ bw = ODM_BW80M; ++ else ++ bw = ODM_BW20M; ++ ++ /* Update packet information */ ++ phydm_SetCommonPhyInfo(rx_pwr_db, pPhyStaRpt->channel, (BOOLEAN)pPhyStaRpt->beamformed, ++ FALSE, bw, 0, rxsc, pPhyInfo); ++ ++/* ++ //if (pPktinfo->bPacketMatchBSSID) ++ { ++ DbgPrint("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d\n", pPhyStaRpt->channel, pPhyStaRpt->band, pPhyStaRpt->l_rxsc, pPhyStaRpt->ht_rxsc); ++ DbgPrint("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->pwdb[0], pPhyStaRpt->pwdb[1], pPhyStaRpt->pwdb[2], pPhyStaRpt->pwdb[3]); ++ DbgPrint("Agc table A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->agc_table_a, pPhyStaRpt->agc_table_b, pPhyStaRpt->agc_table_c, pPhyStaRpt->agc_table_d); ++ DbgPrint("Gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->gain_a, pPhyStaRpt->gain_b, pPhyStaRpt->gain_c, pPhyStaRpt->gain_d); ++ DbgPrint("TRSW A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->trsw_a, pPhyStaRpt->trsw_b, pPhyStaRpt->trsw_c, pPhyStaRpt->trsw_d); ++ DbgPrint("AAGC step A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->aagc_step_a, pPhyStaRpt->aagc_step_b, pPhyStaRpt->aagc_step_c, pPhyStaRpt->aagc_step_d); ++ DbgPrint("HT AAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->ht_aagc_gain[0], pPhyStaRpt->ht_aagc_gain[1], pPhyStaRpt->ht_aagc_gain[2], pPhyStaRpt->ht_aagc_gain[3]); ++ DbgPrint("DAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", pPhyStaRpt->dagc_gain[0], pPhyStaRpt->dagc_gain[1], pPhyStaRpt->dagc_gain[2], pPhyStaRpt->dagc_gain[3]); ++ DbgPrint("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", pPhyStaRpt->ldpc, pPhyStaRpt->stbc, pPhyStaRpt->beamformed, pPhyStaRpt->gnt_bt, pPhyStaRpt->hw_antsw_occu); ++ DbgPrint("counter: %d, syn_count: %d\n", pPhyStaRpt->counter, pPhyStaRpt->syn_count); ++ DbgPrint("cnt_cca2agc_rdy: %d, cnt_pw2cca: %d, shift_l_map\n", pPhyStaRpt->cnt_cca2agc_rdy, pPhyStaRpt->cnt_pw2cca, pPhyStaRpt->shift_l_map); ++ DbgPrint("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", pPhyStaRpt->rsvd_0, pPhyStaRpt->rsvd_1, pPhyStaRpt->rsvd_2, pPhyStaRpt->rsvd_3, pPhyStaRpt->rsvd_4); ++ DbgPrint("rsvd_5 = %d, rsvd_6 = %d, rsvd_6 = %d\n", pPhyStaRpt->rsvd_5, pPhyStaRpt->rsvd_6, pPhyStaRpt->rsvd_7); ++ } ++*/ ++} ++ ++VOID ++phydm_GetRxPhyStatusType5( ++ IN pu1Byte pPhyStatus ++) ++{ ++/* ++ DbgPrint("DW0: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 3), *(pPhyStatus + 2), *(pPhyStatus + 1), *(pPhyStatus + 0)); ++ DbgPrint("DW1: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 7), *(pPhyStatus + 6), *(pPhyStatus + 5), *(pPhyStatus + 4)); ++ DbgPrint("DW2: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 11), *(pPhyStatus + 10), *(pPhyStatus + 9), *(pPhyStatus + 8)); ++ DbgPrint("DW3: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 15), *(pPhyStatus + 14), *(pPhyStatus + 13), *(pPhyStatus + 12)); ++ DbgPrint("DW4: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 19), *(pPhyStatus + 18), *(pPhyStatus + 17), *(pPhyStatus + 16)); ++ DbgPrint("DW5: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 23), *(pPhyStatus + 22), *(pPhyStatus + 21), *(pPhyStatus + 20)); ++ DbgPrint("DW6: 0x%02x%02x%02x%02x\n", *(pPhyStatus + 27), *(pPhyStatus + 26), *(pPhyStatus + 25), *(pPhyStatus + 24)); ++*/ ++} ++ ++VOID ++phydm_Process_RSSIForDM_Jaguar2( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN PODM_PHY_INFO_T pPhyInfo, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ) ++{ ++ u4Byte UndecoratedSmoothedPWDB, RSSI_Ave; ++ u1Byte i; ++ PSTA_INFO_T pEntry; ++ ++ if (pPktinfo->StationID >= ODM_ASSOCIATE_ENTRY_NUM) ++ return; ++ ++ pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID]; ++ ++ if (!IS_STA_VALID(pEntry)) ++ return; ++ ++ if ((!pPktinfo->bPacketMatchBSSID))/*data frame only*/ ++ return; ++ ++ if (pPktinfo->bPacketBeacon) ++ pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++; ++ ++ if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { ++ u4Byte RSSI_linear = 0; ++ ++ UndecoratedSmoothedPWDB = (u4Byte)pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; ++ pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; ++ pDM_Odm->RSSI_C = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_C]; ++ pDM_Odm->RSSI_D = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_D]; ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) { ++ if (pPhyInfo->RxMIMOSignalStrength[i] != 0) ++ RSSI_linear += odm_ConvertTo_linear(pPhyInfo->RxMIMOSignalStrength[i]); ++ } ++ ++ switch (pPhyInfo->RxCount + 1) { ++ case 2: ++ RSSI_linear = (RSSI_linear >> 1); ++ break; ++ case 3: ++ RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5; /* RSSI_linear/3 ~ RSSI_linear*11/32 */ ++ break; ++ case 4: ++ RSSI_linear = (RSSI_linear >> 2); ++ break; ++ } ++ RSSI_Ave = odm_ConvertTo_dB(RSSI_linear); ++ ++ if (UndecoratedSmoothedPWDB <= 0) ++ UndecoratedSmoothedPWDB = pPhyInfo->RxPWDBAll; ++ else ++ UndecoratedSmoothedPWDB = (RSSI_Ave + ((UndecoratedSmoothedPWDB<<4) - UndecoratedSmoothedPWDB))>>4; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == -1) ++ phydm_ra_rssi_rpt_wk(pDM_Odm); ++ #endif ++ ++ pEntry->rssi_stat.UndecoratedSmoothedPWDB = (s4Byte)UndecoratedSmoothedPWDB; ++ } ++} ++ ++VOID ++phydm_RxPhyStatusJaguarSeries2( ++ IN PDM_ODM_T pPhydm, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ OUT PODM_PHY_INFO_T pPhyInfo ++) ++{ ++ u1Byte phy_status_type = (*pPhyStatus & 0xf); ++ ++ /*DbgPrint("phydm_RxPhyStatusJaguarSeries2================> (page: %d)\n", phy_status_type);*/ ++ ++ /* Memory reset */ ++ phydm_ResetPhyInfo(pPhydm, pPhyInfo); ++ ++ /* Phy status parsing */ ++ switch (phy_status_type) { ++ case 0: ++ { ++ phydm_GetRxPhyStatusType0(pPhydm, pPhyStatus, pPktinfo, pPhyInfo); ++ break; ++ } ++ case 1: ++ { ++ phydm_GetRxPhyStatusType1(pPhydm, pPhyStatus, pPktinfo, pPhyInfo); ++ break; ++ } ++ case 2: ++ { ++ phydm_GetRxPhyStatusType2(pPhydm, pPhyStatus, pPktinfo, pPhyInfo); ++ break; ++ } ++ case 5: ++ { ++ phydm_GetRxPhyStatusType5(pPhyStatus); ++ return; ++ } ++ default: ++ return; ++ } ++ ++ /* Update signal strength to UI, and pPhyInfo->RxPWDBAll is the maximum RSSI of all path */ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pPhyInfo->SignalStrength = SignalScaleProc(pPhydm->Adapter, pPhyInfo->RxPWDBAll, FALSE, FALSE); ++#else ++ pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pPhydm, pPhyInfo->RxPWDBAll)); ++#endif ++ ++ /* Calculate average RSSI and smoothed RSSI */ ++ phydm_Process_RSSIForDM_Jaguar2(pPhydm, pPhyInfo, pPktinfo); ++ ++} ++/*==============================================*/ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_hwconfig.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_hwconfig.h +new file mode 100644 +index 0000000..2fb2640 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_hwconfig.h +@@ -0,0 +1,506 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __HALHWOUTSRC_H__ ++#define __HALHWOUTSRC_H__ ++ ++ ++/*--------------------------Define -------------------------------------------*/ ++ ++#define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \ ++ sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte))) ++#define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \ ++ sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte))) ++ ++#define AGC_DIFF_CONFIG(ic, band) do {\ ++ if (pDM_Odm->bIsMPChip)\ ++ AGC_DIFF_CONFIG_MP(ic,band);\ ++ else\ ++ AGC_DIFF_CONFIG_TC(ic,band);\ ++ } while(0) ++ ++ ++//============================================================ ++// structure and define ++//============================================================ ++ ++__PACK typedef struct _Phy_Rx_AGC_Info ++{ ++ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte gain:7,trsw:1; ++ #else ++ u1Byte trsw:1,gain:7; ++ #endif ++} __WLAN_ATTRIB_PACK__ PHY_RX_AGC_INFO_T, *pPHY_RX_AGC_INFO_T; ++ ++__PACK typedef struct _Phy_Status_Rpt_8192cd { ++ PHY_RX_AGC_INFO_T path_agc[2]; ++ u1Byte ch_corr[2]; ++ u1Byte cck_sig_qual_ofdm_pwdb_all; ++ u1Byte cck_agc_rpt_ofdm_cfosho_a; ++ u1Byte cck_rpt_b_ofdm_cfosho_b; ++ u1Byte rsvd_1;/*ch_corr_msb;*/ ++ u1Byte noise_power_db_msb; ++ s1Byte path_cfotail[2]; ++ u1Byte pcts_mask[2]; ++ s1Byte stream_rxevm[2]; ++ u1Byte path_rxsnr[2]; ++ u1Byte noise_power_db_lsb; ++ u1Byte rsvd_2[3]; ++ u1Byte stream_csi[2]; ++ u1Byte stream_target_csi[2]; ++ s1Byte sig_evm; ++ u1Byte rsvd_3; ++ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte antsel_rx_keep_2: 1; /*ex_intf_flg:1;*/ ++ u1Byte sgi_en: 1; ++ u1Byte rxsc: 2; ++ u1Byte idle_long: 1; ++ u1Byte r_ant_train_en: 1; ++ u1Byte ant_sel_b: 1; ++ u1Byte ant_sel: 1; ++#else /*_BIG_ENDIAN_ */ ++ u1Byte ant_sel: 1; ++ u1Byte ant_sel_b: 1; ++ u1Byte r_ant_train_en: 1; ++ u1Byte idle_long: 1; ++ u1Byte rxsc: 2; ++ u1Byte sgi_en: 1; ++ u1Byte antsel_rx_keep_2: 1;/*ex_intf_flg:1;*/ ++#endif ++} __WLAN_ATTRIB_PACK__ PHY_STATUS_RPT_8192CD_T, *PPHY_STATUS_RPT_8192CD_T; ++ ++ ++typedef struct _Phy_Status_Rpt_8812 { ++/* DWORD 0*/ ++ u1Byte gain_trsw[2]; /*path-A and path-B {TRSW, gain[6:0] }*/ ++ u1Byte chl_num_LSB; /*channel number[7:0]*/ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte chl_num_MSB: 2; /*channel number[9:8]*/ ++ u1Byte sub_chnl: 4; /*sub-channel location[3:0]*/ ++ u1Byte r_RFMOD: 2; /*RF mode[1:0]*/ ++#else /*_BIG_ENDIAN_ */ ++ u1Byte r_RFMOD: 2; ++ u1Byte sub_chnl: 4; ++ u1Byte chl_num_MSB: 2; ++#endif ++ ++/* DWORD 1*/ ++ u1Byte pwdb_all; /*CCK signal quality / OFDM pwdb all*/ ++ s1Byte cfosho[2]; /*DW1 byte 1 DW1 byte2 CCK AGC report and CCK_BB_Power / OFDM Path-A and Path-B short CFO*/ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ /*this should be checked again because the definition of 8812 and 8814 is different*/ ++/* u1Byte r_cck_rx_enable_pathc:2; cck rx enable pathc[1:0]*/ ++/* u1Byte cck_rx_path:4; cck rx path[3:0]*/ ++ u1Byte resvd_0: 6; ++ u1Byte bt_RF_ch_MSB: 2; /*8812A:2'b0 8814A: bt rf channel keep[7:6]*/ ++#else /*_BIG_ENDIAN_*/ ++ u1Byte bt_RF_ch_MSB: 2; ++ u1Byte resvd_0: 6; ++#endif ++ ++/* DWORD 2*/ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte ant_div_sw_a: 1; /*8812A: ant_div_sw_a 8814A: 1'b0*/ ++ u1Byte ant_div_sw_b: 1; /*8812A: ant_div_sw_b 8814A: 1'b0*/ ++ u1Byte bt_RF_ch_LSB: 6; /*8812A: 6'b0 8814A: bt rf channel keep[5:0]*/ ++#else /*_BIG_ENDIAN_ */ ++ u1Byte bt_RF_ch_LSB: 6; ++ u1Byte ant_div_sw_b: 1; ++ u1Byte ant_div_sw_a: 1; ++#endif ++ s1Byte cfotail[2]; /*DW2 byte 1 DW2 byte 2 path-A and path-B CFO tail*/ ++ u1Byte PCTS_MSK_RPT_0; /*PCTS mask report[7:0]*/ ++ u1Byte PCTS_MSK_RPT_1; /*PCTS mask report[15:8]*/ ++ ++/* DWORD 3*/ ++ s1Byte rxevm[2]; /*DW3 byte 1 DW3 byte 2 stream 1 and stream 2 RX EVM*/ ++ s1Byte rxsnr[2]; /*DW3 byte 3 DW4 byte 0 path-A and path-B RX SNR*/ ++ ++/* DWORD 4*/ ++ u1Byte PCTS_MSK_RPT_2; /*PCTS mask report[23:16]*/ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte PCTS_MSK_RPT_3: 6; /*PCTS mask report[29:24]*/ ++ u1Byte pcts_rpt_valid: 1; /*pcts_rpt_valid*/ ++ u1Byte resvd_1: 1; /*1'b0*/ ++#else /*_BIG_ENDIAN_*/ ++ u1Byte resvd_1: 1; ++ u1Byte pcts_rpt_valid: 1; ++ u1Byte PCTS_MSK_RPT_3: 6; ++#endif ++ s1Byte rxevm_cd[2]; /*DW 4 byte 3 DW5 byte 0 8812A: 16'b0 8814A: stream 3 and stream 4 RX EVM*/ ++ ++/* DWORD 5*/ ++ u1Byte csi_current[2]; /*DW5 byte 1 DW5 byte 2 8812A: stream 1 and 2 CSI 8814A: path-C and path-D RX SNR*/ ++ u1Byte gain_trsw_cd[2]; /*DW5 byte 3 DW6 byte 0 path-C and path-D {TRSW, gain[6:0] }*/ ++ ++/* DWORD 6*/ ++ s1Byte sigevm; /*signal field EVM*/ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte antidx_antc: 3; /*8812A: 3'b0 8814A: antidx_antc[2:0]*/ ++ u1Byte antidx_antd: 3; /*8812A: 3'b0 8814A: antidx_antd[2:0]*/ ++ u1Byte dpdt_ctrl_keep: 1; /*8812A: 1'b0 8814A: dpdt_ctrl_keep*/ ++ u1Byte GNT_BT_keep: 1; /*8812A: 1'b0 8814A: GNT_BT_keep*/ ++#else /*_BIG_ENDIAN_*/ ++ u1Byte GNT_BT_keep: 1; ++ u1Byte dpdt_ctrl_keep: 1; ++ u1Byte antidx_antd: 3; ++ u1Byte antidx_antc: 3; ++#endif ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte antidx_anta: 3; /*antidx_anta[2:0]*/ ++ u1Byte antidx_antb: 3; /*antidx_antb[2:0]*/ ++ u1Byte hw_antsw_occur: 2; /*1'b0*/ ++#else /*_BIG_ENDIAN_*/ ++ u1Byte hw_antsw_occur: 2; ++ u1Byte antidx_antb: 3; ++ u1Byte antidx_anta: 3; ++#endif ++} PHY_STATUS_RPT_8812_T, *PPHY_STATUS_RPT_8812_T; ++ ++VOID ++odm_Init_RSSIForDM( ++ IN OUT PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_PhyStatusQuery( ++ IN OUT PDM_ODM_T pDM_Odm, ++ OUT PODM_PHY_INFO_T pPhyInfo, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo ++ ); ++ ++VOID ++ODM_MacStatusQuery( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN pu1Byte pMacStatus, ++ IN u1Byte MacID, ++ IN BOOLEAN bPacketMatchBSSID, ++ IN BOOLEAN bPacketToSelf, ++ IN BOOLEAN bPacketBeacon ++ ); ++ ++HAL_STATUS ++ODM_ConfigRFWithTxPwrTrackHeaderFile( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++HAL_STATUS ++ODM_ConfigRFWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_Config_Type ConfigType, ++ IN ODM_RF_RADIO_PATH_E eRFPath ++ ); ++ ++HAL_STATUS ++ODM_ConfigBBWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_BB_Config_Type ConfigType ++ ); ++ ++HAL_STATUS ++ODM_ConfigMACWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++HAL_STATUS ++ODM_ConfigFWWithHeaderFile( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_FW_Config_Type ConfigType, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pSize ++ ); ++ ++u4Byte ++ODM_GetHWImgVersion( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++s4Byte ++odm_SignalScaleMapping( ++ IN OUT PDM_ODM_T pDM_Odm, ++ IN s4Byte CurrSig ++ ); ++ ++#if (RTL8822B_SUPPORT == 1) ++/*For 8822B only!! need to move to FW finally */ ++/*==============================================*/ ++VOID ++phydm_RxPhyStatusJaguarSeries2( ++ IN PDM_ODM_T pPhydm, ++ IN pu1Byte pPhyStatus, ++ IN PODM_PACKET_INFO_T pPktinfo, ++ OUT PODM_PHY_INFO_T pPhyInfo ++); ++ ++typedef struct _Phy_Status_Rpt_Jaguar2_Type0 { ++ /* DW0 */ ++ u1Byte page_num; ++ u1Byte pwdb; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte gain: 6; ++ u1Byte rsvd_0: 1; ++ u1Byte trsw: 1; ++#else ++ u1Byte trsw: 1; ++ u1Byte rsvd_0: 1; ++ u1Byte gain: 6; ++#endif ++ u1Byte rsvd_1; ++ ++ /* DW1 */ ++ u1Byte rsvd_2; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte rxsc: 4; ++ u1Byte agc_table: 4; ++#else ++ u1Byte agc_table: 4; ++ u1Byte rxsc: 4; ++#endif ++ u1Byte channel; ++ u1Byte band; ++ ++ /* DW2 */ ++ u2Byte length; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte antidx_a: 3; ++ u1Byte antidx_b: 3; ++ u1Byte rsvd_3: 2; ++ u1Byte antidx_c: 3; ++ u1Byte antidx_d: 3; ++ u1Byte rsvd_4:2; ++#else ++ u1Byte rsvd_3: 2; ++ u1Byte antidx_b: 3; ++ u1Byte antidx_a: 3; ++ u1Byte rsvd_4:2; ++ u1Byte antidx_d: 3; ++ u1Byte antidx_c: 3; ++#endif ++ ++ /* DW3 */ ++ u1Byte signal_quality; ++ u1Byte agc_rpt; ++ u1Byte bb_power; ++ u1Byte rsvd_5; ++ ++ /* DW4 */ ++ u4Byte rsvd_6; ++ ++ /* DW5 */ ++ u4Byte rsvd_7; ++ ++ /* DW6 */ ++ u4Byte rsvd_8; ++} PHY_STATUS_RPT_JAGUAR2_TYPE0, *PPHY_STATUS_RPT_JAGUAR2_TYPE0; ++ ++typedef struct _Phy_Status_Rpt_Jaguar2_Type1 { ++ /* DW0 and DW1 */ ++ u1Byte page_num; ++ u1Byte pwdb[4]; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte l_rxsc: 4; ++ u1Byte ht_rxsc: 4; ++#else ++ u1Byte ht_rxsc: 4; ++ u1Byte l_rxsc: 4; ++#endif ++ u1Byte channel; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte band: 2; ++ u1Byte rsvd_0: 1; ++ u1Byte hw_antsw_occu: 1; ++ u1Byte gnt_bt: 1; ++ u1Byte ldpc: 1; ++ u1Byte stbc: 1; ++ u1Byte beamformed: 1; ++#else ++ u1Byte beamformed: 1; ++ u1Byte stbc: 1; ++ u1Byte ldpc: 1; ++ u1Byte gnt_bt: 1; ++ u1Byte hw_antsw_occu: 1; ++ u1Byte rsvd_0: 1; ++ u1Byte band: 2; ++#endif ++ ++ /* DW2 */ ++ u2Byte lsig_length; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte antidx_a: 3; ++ u1Byte antidx_b: 3; ++ u1Byte rsvd_1: 2; ++ u1Byte antidx_c: 3; ++ u1Byte antidx_d: 3; ++ u1Byte rsvd_2: 2; ++#else ++ u1Byte rsvd_1: 2; ++ u1Byte antidx_b: 3; ++ u1Byte antidx_a: 3; ++ u1Byte rsvd_2: 2; ++ u1Byte antidx_d: 3; ++ u1Byte antidx_c: 3; ++#endif ++ ++ /* DW3 */ ++ u1Byte paid; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte paid_msb: 1; ++ u1Byte gid: 6; ++ u1Byte rsvd_3: 1; ++#else ++ u1Byte rsvd_3: 1; ++ u1Byte gid: 6; ++ u1Byte paid_msb: 1; ++#endif ++ u1Byte intf_pos; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte intf_pos_msb: 1; ++ u1Byte rsvd_4: 2; ++ u1Byte nb_intf_flag: 1; ++ u1Byte rf_mode: 2; ++ u1Byte rsvd_5: 2; ++#else ++ u1Byte rsvd_5: 2; ++ u1Byte rf_mode: 2; ++ u1Byte nb_intf_flag: 1; ++ u1Byte rsvd_4: 2; ++ u1Byte intf_pos_msb: 1; ++#endif ++ ++ /* DW4 */ ++ s1Byte rxevm[4]; /* s(8,1) */ ++ ++ /* DW5 */ ++ s1Byte cfo_tail[4]; /* s(8,7) */ ++ ++ /* DW6 */ ++ s1Byte rxsnr[4]; /* s(8,1) */ ++} PHY_STATUS_RPT_JAGUAR2_TYPE1, *PPHY_STATUS_RPT_JAGUAR2_TYPE1; ++ ++typedef struct _Phy_Status_Rpt_Jaguar2_Type2 { ++ /* DW0 ane DW1 */ ++ u1Byte page_num; ++ u1Byte pwdb[4]; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte l_rxsc: 4; ++ u1Byte ht_rxsc: 4; ++#else ++ u1Byte ht_rxsc: 4; ++ u1Byte l_rxsc: 4; ++#endif ++ u1Byte channel; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte band: 2; ++ u1Byte rsvd_0: 1; ++ u1Byte hw_antsw_occu: 1; ++ u1Byte gnt_bt: 1; ++ u1Byte ldpc: 1; ++ u1Byte stbc: 1; ++ u1Byte beamformed: 1; ++#else ++ u1Byte beamformed: 1; ++ u1Byte stbc: 1; ++ u1Byte ldpc: 1; ++ u1Byte gnt_bt: 1; ++ u1Byte hw_antsw_occu: 1; ++ u1Byte rsvd_0: 1; ++ u1Byte band: 2; ++#endif ++ ++ /* DW2 */ ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte shift_l_map: 6; ++ u1Byte rsvd_1: 2; ++#else ++ u1Byte rsvd_1: 2; ++ u1Byte shift_l_map: 6; ++#endif ++ u1Byte cnt_pw2cca; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte agc_table_a: 4; ++ u1Byte agc_table_b: 4; ++ u1Byte agc_table_c: 4; ++ u1Byte agc_table_d: 4; ++#else ++ u1Byte agc_table_b: 4; ++ u1Byte agc_table_a: 4; ++ u1Byte agc_table_d: 4; ++ u1Byte agc_table_c: 4; ++#endif ++ ++ /* DW3 ~ DW6*/ ++ u1Byte cnt_cca2agc_rdy; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte gain_a: 6; ++ u1Byte rsvd_2: 1; ++ u1Byte trsw_a: 1; ++ u1Byte gain_b: 6; ++ u1Byte rsvd_3: 1; ++ u1Byte trsw_b: 1; ++ u1Byte gain_c: 6; ++ u1Byte rsvd_4: 1; ++ u1Byte trsw_c: 1; ++ u1Byte gain_d: 6; ++ u1Byte rsvd_5: 1; ++ u1Byte trsw_d: 1; ++ u1Byte aagc_step_a: 2; ++ u1Byte aagc_step_b: 2; ++ u1Byte aagc_step_c: 2; ++ u1Byte aagc_step_d: 2; ++#else ++ u1Byte trsw_a: 1; ++ u1Byte rsvd_2: 1; ++ u1Byte gain_a: 6; ++ u1Byte trsw_b: 1; ++ u1Byte rsvd_3: 1; ++ u1Byte gain_b: 6; ++ u1Byte trsw_c: 1; ++ u1Byte rsvd_4: 1; ++ u1Byte gain_c: 6; ++ u1Byte trsw_d: 1; ++ u1Byte rsvd_5: 1; ++ u1Byte gain_d: 6; ++ u1Byte aagc_step_d: 2; ++ u1Byte aagc_step_c: 2; ++ u1Byte aagc_step_b: 2; ++ u1Byte aagc_step_a: 2; ++#endif ++ u1Byte ht_aagc_gain[4]; ++ u1Byte dagc_gain[4]; ++#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) ++ u1Byte counter: 6; ++ u1Byte rsvd_6: 2; ++ u1Byte syn_count: 5; ++ u1Byte rsvd_7:3; ++#else ++ u1Byte rsvd_6: 2; ++ u1Byte counter: 6; ++ u1Byte rsvd_7:3; ++ u1Byte syn_count: 5; ++#endif ++} PHY_STATUS_RPT_JAGUAR2_TYPE2, *PPHY_STATUS_RPT_JAGUAR2_TYPE2; ++/*==============================================*/ ++#endif ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_interface.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_interface.c +new file mode 100644 +index 0000000..7f50b3b +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_interface.c +@@ -0,0 +1,1014 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++// ++// ODM IO Relative API. ++// ++ ++u1Byte ++ODM_Read1Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ return RTL_R8(RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return rtw_read8(Adapter,RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return PlatformEFIORead1Byte(Adapter, RegAddr); ++#endif ++ ++} ++ ++ ++u2Byte ++ODM_Read2Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ return RTL_R16(RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return rtw_read16(Adapter,RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return PlatformEFIORead2Byte(Adapter, RegAddr); ++#endif ++ ++} ++ ++ ++u4Byte ++ODM_Read4Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ return RTL_R32(RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return rtw_read32(Adapter,RegAddr); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return PlatformEFIORead4Byte(Adapter, RegAddr); ++#endif ++ ++} ++ ++ ++VOID ++ODM_Write1Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u1Byte Data ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ RTL_W8(RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ rtw_write8(Adapter,RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformEFIOWrite1Byte(Adapter, RegAddr, Data); ++#endif ++ ++} ++ ++ ++VOID ++ODM_Write2Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u2Byte Data ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ RTL_W16(RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ rtw_write16(Adapter,RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformEFIOWrite2Byte(Adapter, RegAddr, Data); ++#endif ++ ++} ++ ++ ++VOID ++ODM_Write4Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte Data ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ RTL_W32(RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ rtw_write32(Adapter,RegAddr, Data); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformEFIOWrite4Byte(Adapter, RegAddr, Data); ++#endif ++ ++} ++ ++ ++VOID ++ODM_SetMACReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); ++#endif ++} ++ ++ ++u4Byte ++ODM_GetMACReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ return PHY_QueryMacReg(pDM_Odm->Adapter, RegAddr, BitMask); ++#endif ++} ++ ++ ++VOID ++ODM_SetBBReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); ++#endif ++} ++ ++ ++u4Byte ++ODM_GetBBReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return PHY_QueryBBReg(Adapter, RegAddr, BitMask); ++#endif ++} ++ ++ ++VOID ++ODM_SetRFReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_RADIO_PATH_E eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_SetRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, Data); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data); ++ ODM_delay_us(2); ++ ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PHY_SetRFReg(pDM_Odm->Adapter, eRFPath, RegAddr, BitMask, Data); ++#endif ++} ++ ++ ++u4Byte ++ODM_GetRFReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_RADIO_PATH_E eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1); ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ return PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask); ++#endif ++} ++ ++ ++ ++ ++// ++// ODM Memory relative API. ++// ++VOID ++ODM_AllocateMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID *pPtr, ++ IN u4Byte length ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ *pPtr = kmalloc(length, GFP_ATOMIC); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ *pPtr = rtw_zvmalloc(length); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformAllocateMemory(Adapter, pPtr, length); ++#endif ++} ++ ++// length could be ignored, used to detect memory leakage. ++VOID ++ODM_FreeMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID pPtr, ++ IN u4Byte length ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ kfree(pPtr); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ rtw_vmfree(pPtr, length); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ //PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformFreeMemory(pPtr, length); ++#endif ++} ++ ++VOID ++ODM_MoveMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID pDest, ++ IN PVOID pSrc, ++ IN u4Byte Length ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ memcpy(pDest, pSrc, Length); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ _rtw_memcpy(pDest, pSrc, Length); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformMoveMemory(pDest, pSrc, Length); ++#endif ++} ++ ++void ODM_Memory_Set( ++ IN PDM_ODM_T pDM_Odm, ++ IN PVOID pbuf, ++ IN s1Byte value, ++ IN u4Byte length ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ memset(pbuf, value, length); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ _rtw_memset(pbuf,value, length); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformFillMemory(pbuf,length,value); ++#endif ++} ++s4Byte ODM_CompareMemory( ++ IN PDM_ODM_T pDM_Odm, ++ IN PVOID pBuf1, ++ IN PVOID pBuf2, ++ IN u4Byte length ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return memcmp(pBuf1,pBuf2,length); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ return _rtw_memcmp(pBuf1,pBuf2,length); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ return PlatformCompareMemory(pBuf1,pBuf2,length); ++#endif ++} ++ ++ ++ ++// ++// ODM MISC relative API. ++// ++VOID ++ODM_AcquireSpinLock( ++ IN PDM_ODM_T pDM_Odm, ++ IN RT_SPINLOCK_TYPE type ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ rtw_odm_acquirespinlock(Adapter, type); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformAcquireSpinLock(Adapter, type); ++#endif ++} ++VOID ++ODM_ReleaseSpinLock( ++ IN PDM_ODM_T pDM_Odm, ++ IN RT_SPINLOCK_TYPE type ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ rtw_odm_releasespinlock(Adapter, type); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformReleaseSpinLock(Adapter, type); ++#endif ++} ++ ++// ++// Work item relative API. FOr MP driver only~! ++// ++VOID ++ODM_InitializeWorkItem( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_WORK_ITEM pRtWorkItem, ++ IN RT_WORKITEM_CALL_BACK RtWorkItemCallback, ++ IN PVOID pContext, ++ IN const char* szID ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformInitializeWorkItem(Adapter, pRtWorkItem, RtWorkItemCallback, pContext, szID); ++#endif ++} ++ ++ ++VOID ++ODM_StartWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformStartWorkItem(pRtWorkItem); ++#endif ++} ++ ++ ++VOID ++ODM_StopWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformStopWorkItem(pRtWorkItem); ++#endif ++} ++ ++ ++VOID ++ODM_FreeWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformFreeWorkItem(pRtWorkItem); ++#endif ++} ++ ++ ++VOID ++ODM_ScheduleWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformScheduleWorkItem(pRtWorkItem); ++#endif ++} ++ ++ ++VOID ++ODM_IsWorkItemScheduled( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformIsWorkItemScheduled(pRtWorkItem); ++#endif ++} ++ ++ ++ ++// ++// ODM Timer relative API. ++// ++VOID ++ODM_StallExecution( ++ IN u4Byte usDelay ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_udelay_os(usDelay); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformStallExecution(usDelay); ++#endif ++} ++ ++VOID ++ODM_delay_ms(IN u4Byte ms) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ delay_ms(ms); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_mdelay_os(ms); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ delay_ms(ms); ++#endif ++} ++ ++VOID ++ODM_delay_us(IN u4Byte us) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ delay_us(us); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_udelay_os(us); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PlatformStallExecution(us); ++#endif ++} ++ ++VOID ++ODM_sleep_ms(IN u4Byte ms) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_msleep_os(ms); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#endif ++} ++ ++VOID ++ODM_sleep_us(IN u4Byte us) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_usleep_os(us); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#endif ++} ++ ++VOID ++ODM_SetTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer, ++ IN u4Byte msDelay ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ mod_timer(pTimer, jiffies + RTL_MILISECONDS_TO_JIFFIES(msDelay)); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ _set_timer(pTimer,msDelay ); //ms ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformSetTimer(Adapter, pTimer, msDelay); ++#endif ++ ++} ++ ++VOID ++ODM_InitializeTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer, ++ IN RT_TIMER_CALL_BACK CallBackFunc, ++ IN PVOID pContext, ++ IN const char* szID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ init_timer(pTimer); ++ pTimer->function = CallBackFunc; ++ pTimer->data = (unsigned long)pDM_Odm; ++ mod_timer(pTimer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10)); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ _init_timer(pTimer,Adapter->pnetdev,CallBackFunc,pDM_Odm); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformInitializeTimer(Adapter, pTimer, CallBackFunc,pContext,szID); ++#endif ++} ++ ++ ++VOID ++ODM_CancelTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ del_timer(pTimer); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ _cancel_timer_ex(pTimer); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PlatformCancelTimer(Adapter, pTimer); ++#endif ++} ++ ++ ++VOID ++ODM_ReleaseTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ // <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm. ++ // Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail. ++ if (pTimer == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_SERIOUS, ("=====>ODM_ReleaseTimer(), The timer is NULL! Please check it!\n")); ++ return; ++ } ++ ++ PlatformReleaseTimer(Adapter, pTimer); ++#endif ++} ++ ++BOOLEAN ++phydm_actingDetermine( ++ IN PDM_ODM_T pDM_Odm, ++ IN PHYDM_ACTING_TYPE type ++ ) ++{ ++ BOOLEAN ret = FALSE; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->BeamformingInfo.SourceAdapter; ++#else ++ PADAPTER Adapter = pDM_Odm->Adapter; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (type == PhyDM_ACTING_AS_AP) ++ ret = ACTING_AS_AP(Adapter); ++ else if (type == PhyDM_ACTING_AS_IBSS) ++ ret = ACTING_AS_IBSS(Adapter); ++#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++ if (type == PhyDM_ACTING_AS_AP) ++ ret = check_fwstate(pmlmepriv, WIFI_AP_STATE); ++ else if (type == PhyDM_ACTING_AS_IBSS) ++ ret = check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); ++#endif ++ ++ return ret; ++ ++} ++ ++ ++u1Byte ++phydm_trans_h2c_id( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte phydm_h2c_id ++) ++{ ++ u1Byte platform_h2c_id=0xff; ++ ++ ++ switch(phydm_h2c_id) ++ { ++ //1 [0] ++ case ODM_H2C_RSSI_REPORT: ++ ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if(pDM_Odm->SupportICType == ODM_RTL8188E) ++ { ++ platform_h2c_id = H2C_88E_RSSI_REPORT; ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ platform_h2c_id =H2C_8814A_RSSI_REPORT; ++ } ++ else ++ { ++ platform_h2c_id = H2C_RSSI_REPORT; ++ } ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ platform_h2c_id = H2C_RSSI_SETTING; ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) ++ if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8814A || (pDM_Odm->SupportICType == ODM_RTL8822B)) ++ { ++ platform_h2c_id =H2C_88XX_RSSI_REPORT; ++ /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] H2C_88XX_RSSI_REPORT CMD_ID = (( %d ))\n", platform_h2c_id));*/ ++ } else ++ #endif ++ #if(RTL8812A_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ platform_h2c_id = H2C_8812_RSSI_REPORT; ++ } else ++ #endif ++ {} ++ #endif ++ ++ break; ++ ++ //1 [3] ++ case ODM_H2C_WIFI_CALIBRATION: ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ platform_h2c_id =H2C_WIFI_CALIBRATION; ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ #if(RTL8723B_SUPPORT==1) ++ platform_h2c_id = H2C_8723B_BT_WLAN_CALIBRATION; ++ #endif ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ ++ #endif ++ ++ break; ++ ++ ++ //1 [4] ++ case ODM_H2C_IQ_CALIBRATION: ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ platform_h2c_id =H2C_IQ_CALIBRATION; ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ #if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1)) ++ platform_h2c_id = H2C_8812_IQ_CALIBRATION; ++ #endif ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ ++ #endif ++ ++ break; ++ //1 [5] ++ case ODM_H2C_RA_PARA_ADJUST: ++ ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B)) ++ platform_h2c_id = H2C_8814A_RA_PARA_ADJUST; ++ else ++ platform_h2c_id = H2C_RA_PARA_ADJUST; ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ #if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1)) ++ platform_h2c_id = H2C_8812_RA_PARA_ADJUST; ++ #elif ((RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) ++ platform_h2c_id = H2C_RA_PARA_ADJUST; ++ #elif(RTL8192E_SUPPORT==1) ++ platform_h2c_id =H2C_8192E_RA_PARA_ADJUST; ++ #elif(RTL8723B_SUPPORT==1) ++ platform_h2c_id =H2C_8723B_RA_PARA_ADJUST; ++ #endif ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) ++ if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8814A || (pDM_Odm->SupportICType == ODM_RTL8822B)) { ++ platform_h2c_id =H2C_88XX_RA_PARA_ADJUST; ++ /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] H2C_88XX_RA_PARA_ADJUST CMD_ID = (( %d ))\n", platform_h2c_id));*/ ++ } else ++ #endif ++ #if(RTL8812A_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ platform_h2c_id = H2C_8812_RA_PARA_ADJUST; ++ } else ++ #endif ++ {} ++ #endif ++ ++ break; ++ ++ ++ //1 [6] ++ case PHYDM_H2C_DYNAMIC_TX_PATH: ++ ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if(pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ platform_h2c_id =H2C_8814A_DYNAMIC_TX_PATH; ++ } ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ #if (RTL8814A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ platform_h2c_id = H2C_DYNAMIC_TX_PATH; ++ #endif ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ #if(RTL8814A_SUPPORT==1) ++ if( pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ platform_h2c_id = H2C_88XX_DYNAMIC_TX_PATH; ++ } ++ #endif ++ ++ #endif ++ ++ break; ++ ++ /* [7]*/ ++ case PHYDM_H2C_FW_TRACE_EN: ++ ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) ++ platform_h2c_id = H2C_8814A_FW_TRACE_EN; ++ else ++ platform_h2c_id = H2C_FW_TRACE_EN; ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) ++ if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8814A || (pDM_Odm->SupportICType == ODM_RTL8822B)) ++ platform_h2c_id = H2C_88XX_FW_TRACE_EN; ++ else ++ #endif ++ #if (RTL8812A_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) { ++ platform_h2c_id = H2C_8812_FW_TRACE_EN; ++ } else ++ #endif ++ {} ++ ++ #endif ++ ++ break; ++ ++ case PHYDM_H2C_TXBF: ++#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1)) ++ platform_h2c_id = 0x41; /*H2C_TxBF*/ ++#endif ++ break; ++ ++ default: ++ platform_h2c_id=0xff; ++ break; ++ } ++ ++ return platform_h2c_id; ++ ++} ++ ++// ++// ODM FW relative API. ++// ++ ++VOID ++ODM_FillH2CCmd( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte phydm_h2c_id, ++ IN u4Byte CmdLen, ++ IN pu1Byte pCmdBuffer ++) ++{ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ u1Byte platform_h2c_id; ++ ++ platform_h2c_id=phydm_trans_h2c_id(pDM_Odm, phydm_h2c_id); ++ ++ if(platform_h2c_id==0xff) ++ { ++ ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Wrong H2C CMD-ID !! platform_h2c_id==0xff , PHYDM_ElementID=((%d )) \n",phydm_h2c_id)); ++ return; ++ } ++ ++ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ if (!pDM_Odm->RaSupport88E) ++ FillH2CCmd88E(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++ else if (pDM_Odm->SupportICType == ODM_RTL8192C) ++ FillH2CCmd92C(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++ else if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ FillH2CCmd8814A(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++ else if (pDM_Odm->SupportICType == ODM_RTL8822B) ++#if (RTL8822B_SUPPORT == 1) ++ FillH2CCmd8822B(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++#endif ++ else ++ FillH2CCmd(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ rtw_hal_fill_h2c_cmd(Adapter, platform_h2c_id, CmdLen, pCmdBuffer); ++ ++ #elif(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ #if((RTL8881A_SUPPORT==1)||(RTL8192E_SUPPORT==1)||(RTL8814A_SUPPORT==1)) ++ if(pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E|| pDM_Odm->SupportICType == ODM_RTL8814A) ++ { ++ GET_HAL_INTERFACE(pDM_Odm->priv)->FillH2CCmdHandler(pDM_Odm->priv, platform_h2c_id, CmdLen, pCmdBuffer); ++ //FillH2CCmd88XX(pDM_Odm->priv, platform_h2c_id, CmdLen, pCmdBuffer); ++ } else ++ #endif ++ #if(RTL8812A_SUPPORT==1) ++ if(pDM_Odm->SupportICType == ODM_RTL8812) ++ { ++ FillH2CCmd8812(pDM_Odm->priv, platform_h2c_id, CmdLen, pCmdBuffer); ++ } else ++ #endif ++ {} ++ #endif ++} ++ ++u1Byte ++phydm_c2H_content_parsing( ++ IN PVOID pDM_VOID, ++ IN u1Byte c2hCmdId, ++ IN u1Byte c2hCmdLen, ++ IN pu1Byte tmpBuf ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ #endif ++ u1Byte Extend_c2hSubID = 0; ++ u1Byte find_c2h_cmd = TRUE; ++ ++ switch (c2hCmdId) { ++ case PHYDM_C2H_DBG: ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) ++ phydm_fw_trace_handler(pDM_Odm, tmpBuf, c2hCmdLen); ++ ++ break; ++ ++ case PHYDM_C2H_RA_RPT: ++ phydm_c2h_ra_report_handler(pDM_Odm, tmpBuf, c2hCmdLen); ++ break; ++ ++ case PHYDM_C2H_RA_PARA_RPT: ++ ODM_C2HRaParaReportHandler(pDM_Odm, tmpBuf, c2hCmdLen); ++ break; ++ ++ case PHYDM_C2H_DYNAMIC_TX_PATH_RPT: ++ if (pDM_Odm->SupportICType & (ODM_RTL8814A)) ++ phydm_c2h_dtp_handler(pDM_Odm, tmpBuf, c2hCmdLen); ++ ++ break; ++ ++ case PHYDM_C2H_IQK_FINISH: ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821)) { ++ ++ RT_TRACE(COMP_MP, DBG_LOUD, ("== FW IQK Finish ==\n")); ++ PlatformAcquireSpinLock(Adapter, RT_IQK_SPINLOCK); ++ pDM_Odm->RFCalibrateInfo.bIQKInProgress = FALSE; ++ PlatformReleaseSpinLock(Adapter, RT_IQK_SPINLOCK); ++ pDM_Odm->RFCalibrateInfo.IQK_ProgressingTime = 0; ++ pDM_Odm->RFCalibrateInfo.IQK_ProgressingTime = ODM_GetProgressingTime(pDM_Odm, pDM_Odm->RFCalibrateInfo.IQK_StartTime); ++ } ++ ++ #endif ++ break; ++ ++ case PHYDM_C2H_DBG_CODE: ++ phydm_fw_trace_handler_code(pDM_Odm, tmpBuf, c2hCmdLen); ++ break; ++ ++ case PHYDM_C2H_EXTEND: ++ Extend_c2hSubID = tmpBuf[0]; ++ if (Extend_c2hSubID == PHYDM_EXTEND_C2H_DBG_PRINT) ++ phydm_fw_trace_handler_8051(pDM_Odm, tmpBuf, c2hCmdLen); ++ ++ break; ++ ++ default: ++ find_c2h_cmd = FALSE; ++ break; ++ } ++ ++ return find_c2h_cmd; ++ ++} ++ ++u8Byte ++ODM_GetCurrentTime( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return 0; ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ return (u8Byte)rtw_get_current_time(); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ return PlatformGetCurrentTime(); ++#endif ++} ++ ++u8Byte ++ODM_GetProgressingTime( ++ IN PDM_ODM_T pDM_Odm, ++ IN u8Byte Start_Time ++ ) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ return 0; ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ return rtw_get_passing_time_ms((u4Byte)Start_Time); ++#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ return ((PlatformGetCurrentTime() - Start_Time)>>10); ++#endif ++} ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_interface.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_interface.h +new file mode 100644 +index 0000000..342c493 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_interface.h +@@ -0,0 +1,442 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __ODM_INTERFACE_H__ ++#define __ODM_INTERFACE_H__ ++ ++#define INTERFACE_VERSION "1.0" /*2015.01.13 Dino*/ ++ ++// ++// =========== Constant/Structure/Enum/... Define ++// ++ ++ ++ ++// ++// =========== Macro Define ++// ++ ++#define _reg_all(_name) ODM_##_name ++#define _reg_ic(_name, _ic) ODM_##_name##_ic ++#define _bit_all(_name) BIT_##_name ++#define _bit_ic(_name, _ic) BIT_##_name##_ic ++ ++// _cat: implemented by Token-Pasting Operator. ++#if 0 ++#define _cat(_name, _ic_type, _func) \ ++ ( \ ++ _func##_all(_name) \ ++ ) ++#endif ++ ++/*=================================== ++ ++#define ODM_REG_DIG_11N 0xC50 ++#define ODM_REG_DIG_11AC 0xDDD ++ ++ODM_REG(DIG,_pDM_Odm) ++=====================================*/ ++ ++#define _reg_11N(_name) ODM_REG_##_name##_11N ++#define _reg_11AC(_name) ODM_REG_##_name##_11AC ++#define _bit_11N(_name) ODM_BIT_##_name##_11N ++#define _bit_11AC(_name) ODM_BIT_##_name##_11AC ++ ++#ifdef __ECOS ++#define _rtk_cat(_name, _ic_type, _func) \ ++ ( \ ++ ((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \ ++ _func##_11AC(_name) \ ++ ) ++#else ++ ++#define _cat(_name, _ic_type, _func) \ ++ ( \ ++ ((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \ ++ _func##_11AC(_name) \ ++ ) ++#endif ++/* ++// only sample code ++//#define _cat(_name, _ic_type, _func) \ ++// ( \ ++// ((_ic_type) & ODM_RTL8192C)? _func##_ic(_name, _8192C): \ ++// ((_ic_type) & ODM_RTL8192D)? _func##_ic(_name, _8192D): \ ++// ((_ic_type) & ODM_RTL8192S)? _func##_ic(_name, _8192S): \ ++// ((_ic_type) & ODM_RTL8723A)? _func##_ic(_name, _8723A): \ ++// ((_ic_type) & ODM_RTL8188E)? _func##_ic(_name, _8188E): \ ++// _func##_ic(_name, _8195) \ ++// ) ++*/ ++ ++// _name: name of register or bit. ++// Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)" ++// gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on SupportICType. ++#ifdef __ECOS ++#define ODM_REG(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _reg) ++#define ODM_BIT(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _bit) ++#else ++#define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg) ++#define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit) ++#endif ++typedef enum _PHYDM_H2C_CMD { ++ ODM_H2C_RSSI_REPORT = 0, ++ ODM_H2C_PSD_RESULT = 1, ++ ODM_H2C_PathDiv = 2, ++ ODM_H2C_WIFI_CALIBRATION = 3, ++ ODM_H2C_IQ_CALIBRATION = 4, ++ ODM_H2C_RA_PARA_ADJUST = 5, ++ PHYDM_H2C_DYNAMIC_TX_PATH = 6, ++ PHYDM_H2C_FW_TRACE_EN = 7, ++ PHYDM_H2C_TXBF = 8, ++ ODM_MAX_H2CCMD ++} PHYDM_H2C_CMD; ++ ++typedef enum _PHYDM_C2H_EVT { ++ PHYDM_C2H_DBG = 0, ++ PHYDM_C2H_LB = 1, ++ PHYDM_C2H_XBF = 2, ++ PHYDM_C2H_TX_REPORT = 3, ++ PHYDM_C2H_INFO = 9, ++ PHYDM_C2H_BT_MP = 11, ++ PHYDM_C2H_RA_RPT = 12, ++ PHYDM_C2H_RA_PARA_RPT = 14, ++ PHYDM_C2H_DYNAMIC_TX_PATH_RPT = 15, ++ PHYDM_C2H_IQK_FINISH = 17, /*0x11*/ ++ PHYDM_C2H_DBG_CODE = 0xFE, ++ PHYDM_C2H_EXTEND = 0xFF, ++} PHYDM_C2H_EVT; ++ ++typedef enum _PHYDM_EXTEND_C2H_EVT { ++ PHYDM_EXTEND_C2H_DBG_PRINT = 0 ++ ++} PHYDM_EXTEND_C2H_EVT; ++ ++typedef enum _PHYDM_ACTING_TYPE { ++ PhyDM_ACTING_AS_IBSS = 0, ++ PhyDM_ACTING_AS_AP = 1 ++} PHYDM_ACTING_TYPE; ++ ++ ++// ++// 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem. ++// Suggest HW team to use thread instead of workitem. Windows also support the feature. ++// ++#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) ++typedef void *PRT_WORK_ITEM ; ++typedef void RT_WORKITEM_HANDLE,*PRT_WORKITEM_HANDLE; ++typedef VOID (*RT_WORKITEM_CALL_BACK)(PVOID pContext); ++ ++#if 0 ++typedef struct tasklet_struct RT_WORKITEM_HANDLE, *PRT_WORKITEM_HANDLE; ++ ++typedef struct _RT_WORK_ITEM ++{ ++ ++ RT_WORKITEM_HANDLE Handle; // Platform-dependent handle for this workitem, e.g. Ndis Workitem object. ++ PVOID Adapter; // Pointer to Adapter object. ++ PVOID pContext; // Parameter to passed to CallBackFunc(). ++ RT_WORKITEM_CALL_BACK CallbackFunc; // Callback function of the workitem. ++ u1Byte RefCount; // 0: driver is going to unload, 1: No such workitem scheduled, 2: one workitem is schedueled. ++ PVOID pPlatformExt; // Pointer to platform-dependent extension. ++ BOOLEAN bFree; ++ char szID[36]; // An identity string of this workitem. ++}RT_WORK_ITEM, *PRT_WORK_ITEM; ++ ++#endif ++ ++ ++#endif ++ ++// ++// =========== Extern Variable ??? It should be forbidden. ++// ++ ++ ++// ++// =========== EXtern Function Prototype ++// ++ ++ ++u1Byte ++ODM_Read1Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ); ++ ++u2Byte ++ODM_Read2Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ); ++ ++u4Byte ++ODM_Read4Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr ++ ); ++ ++VOID ++ODM_Write1Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u1Byte Data ++ ); ++ ++VOID ++ODM_Write2Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u2Byte Data ++ ); ++ ++VOID ++ODM_Write4Byte( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte Data ++ ); ++ ++VOID ++ODM_SetMACReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ); ++ ++u4Byte ++ODM_GetMACReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ); ++ ++VOID ++ODM_SetBBReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ); ++ ++u4Byte ++ODM_GetBBReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ); ++ ++VOID ++ODM_SetRFReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_RADIO_PATH_E eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask, ++ IN u4Byte Data ++ ); ++ ++u4Byte ++ODM_GetRFReg( ++ IN PDM_ODM_T pDM_Odm, ++ IN ODM_RF_RADIO_PATH_E eRFPath, ++ IN u4Byte RegAddr, ++ IN u4Byte BitMask ++ ); ++ ++ ++// ++// Memory Relative Function. ++// ++VOID ++ODM_AllocateMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID *pPtr, ++ IN u4Byte length ++ ); ++VOID ++ODM_FreeMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID pPtr, ++ IN u4Byte length ++ ); ++ ++VOID ++ODM_MoveMemory( ++ IN PDM_ODM_T pDM_Odm, ++ OUT PVOID pDest, ++ IN PVOID pSrc, ++ IN u4Byte Length ++ ); ++ ++s4Byte ODM_CompareMemory( ++ IN PDM_ODM_T pDM_Odm, ++ IN PVOID pBuf1, ++ IN PVOID pBuf2, ++ IN u4Byte length ++ ); ++ ++void ODM_Memory_Set ++ (IN PDM_ODM_T pDM_Odm, ++ IN PVOID pbuf, ++ IN s1Byte value, ++ IN u4Byte length); ++ ++// ++// ODM MISC-spin lock relative API. ++// ++VOID ++ODM_AcquireSpinLock( ++ IN PDM_ODM_T pDM_Odm, ++ IN RT_SPINLOCK_TYPE type ++ ); ++ ++VOID ++ODM_ReleaseSpinLock( ++ IN PDM_ODM_T pDM_Odm, ++ IN RT_SPINLOCK_TYPE type ++ ); ++ ++ ++// ++// ODM MISC-workitem relative API. ++// ++VOID ++ODM_InitializeWorkItem( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_WORK_ITEM pRtWorkItem, ++ IN RT_WORKITEM_CALL_BACK RtWorkItemCallback, ++ IN PVOID pContext, ++ IN const char* szID ++ ); ++ ++VOID ++ODM_StartWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ); ++ ++VOID ++ODM_StopWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ); ++ ++VOID ++ODM_FreeWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ); ++ ++VOID ++ODM_ScheduleWorkItem( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ); ++ ++VOID ++ODM_IsWorkItemScheduled( ++ IN PRT_WORK_ITEM pRtWorkItem ++ ); ++ ++// ++// ODM Timer relative API. ++// ++VOID ++ODM_StallExecution( ++ IN u4Byte usDelay ++ ); ++ ++VOID ++ODM_delay_ms(IN u4Byte ms); ++ ++ ++ ++VOID ++ODM_delay_us(IN u4Byte us); ++ ++VOID ++ODM_sleep_ms(IN u4Byte ms); ++ ++VOID ++ODM_sleep_us(IN u4Byte us); ++ ++VOID ++ODM_SetTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer, ++ IN u4Byte msDelay ++ ); ++ ++VOID ++ODM_InitializeTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer, ++ IN RT_TIMER_CALL_BACK CallBackFunc, ++ IN PVOID pContext, ++ IN const char* szID ++ ); ++ ++VOID ++ODM_CancelTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer ++ ); ++ ++VOID ++ODM_ReleaseTimer( ++ IN PDM_ODM_T pDM_Odm, ++ IN PRT_TIMER pTimer ++ ); ++ ++BOOLEAN ++phydm_actingDetermine( ++ IN PDM_ODM_T pDM_Odm, ++ IN PHYDM_ACTING_TYPE type ++ ); ++ ++// ++// ODM FW relative API. ++// ++VOID ++ODM_FillH2CCmd( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte ElementID, ++ IN u4Byte CmdLen, ++ IN pu1Byte pCmdBuffer ++); ++ ++u1Byte ++phydm_c2H_content_parsing( ++ IN PVOID pDM_VOID, ++ IN u1Byte c2hCmdId, ++ IN u1Byte c2hCmdLen, ++ IN pu1Byte tmpBuf ++); ++ ++u8Byte ++ODM_GetCurrentTime( ++ IN PDM_ODM_T pDM_Odm ++ ); ++u8Byte ++ODM_GetProgressingTime( ++ IN PDM_ODM_T pDM_Odm, ++ IN u8Byte Start_Time ++ ); ++ ++#endif // __ODM_INTERFACE_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_noisemonitor.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_noisemonitor.c +new file mode 100644 +index 0000000..647709c +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_noisemonitor.c +@@ -0,0 +1,299 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++//#include "mp_precomp.h" ++#include "phydm_precomp.h" ++#include "phydm_noisemonitor.h" ++ ++//================================================= ++// This function is for inband noise test utility only ++// To obtain the inband noise level(dbm), do the following. ++// 1. disable DIG and Power Saving ++// 2. Set initial gain = 0x1a ++// 3. Stop updating idle time pwer report (for driver read) ++// - 0x80c[25] ++// ++//================================================= ++ ++#define Valid_Min -35 ++#define Valid_Max 10 ++#define ValidCnt 5 ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ ++s2Byte odm_InbandNoise_Monitor_NSeries(PDM_ODM_T pDM_Odm,u8 bPauseDIG,u8 IGIValue,u32 max_time) ++{ ++ u4Byte tmp4b; ++ u1Byte max_rf_path=0,rf_path; ++ u1Byte reg_c50, reg_c58,valid_done=0; ++ struct noise_level noise_data; ++ u32 start = 0, func_start=0, func_end = 0; ++ ++ func_start = ODM_GetCurrentTime(pDM_Odm); ++ pDM_Odm->noise_level.noise_all = 0; ++ ++ if((pDM_Odm->RFType == ODM_1T2R) ||(pDM_Odm->RFType == ODM_2T2R)) ++ max_rf_path = 2; ++ else ++ max_rf_path = 1; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() ==> \n")); ++ ++ ODM_Memory_Set(pDM_Odm,&noise_data,0,sizeof(struct noise_level)); ++ ++ // ++ // Step 1. Disable DIG && Set initial gain. ++ // ++ ++ if(bPauseDIG) ++ { ++ odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, IGIValue); ++ } ++ // ++ // Step 2. Disable all power save for read registers ++ // ++ //dcmd_DebugControlPowerSave(pAdapter, PSDisable); ++ ++ // ++ // Step 3. Get noise power level ++ // ++ start = ODM_GetCurrentTime(pDM_Odm); ++ while(1) ++ { ++ ++ //Stop updating idle time pwer report (for driver read) ++ ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 1); ++ ++ //Read Noise Floor Report ++ tmp4b = ODM_GetBBReg(pDM_Odm, 0x8f8,bMaskDWord ); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Noise Floor Report (0x8f8) = 0x%08x\n", tmp4b)); ++ ++ //ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, TestInitialGain); ++ //if(max_rf_path == 2) ++ // ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, TestInitialGain); ++ ++ //update idle time pwer report per 5us ++ ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 0); ++ ++ noise_data.value[ODM_RF_PATH_A] = (u1Byte)(tmp4b&0xff); ++ noise_data.value[ODM_RF_PATH_B] = (u1Byte)((tmp4b&0xff00)>>8); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("value_a = 0x%x(%d), value_b = 0x%x(%d)\n", ++ noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_B], noise_data.value[ODM_RF_PATH_B])); ++ ++ for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) ++ { ++ noise_data.sval[rf_path] = (s1Byte)noise_data.value[rf_path]; ++ noise_data.sval[rf_path] /= 2; ++ } ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("sval_a = %d, sval_b = %d\n", ++ noise_data.sval[ODM_RF_PATH_A], noise_data.sval[ODM_RF_PATH_B])); ++ //ODM_delay_ms(10); ++ //ODM_sleep_ms(10); ++ ++ for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) ++ { ++ if( (noise_data.valid_cnt[rf_path] < ValidCnt) && (noise_data.sval[rf_path] < Valid_Max && noise_data.sval[rf_path] >= Valid_Min)) ++ { ++ noise_data.valid_cnt[rf_path]++; ++ noise_data.sum[rf_path] += noise_data.sval[rf_path]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("RF_Path:%d Valid sval = %d\n", rf_path,noise_data.sval[rf_path])); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Sum of sval = %d, \n", noise_data.sum[rf_path])); ++ if(noise_data.valid_cnt[rf_path] == ValidCnt) ++ { ++ valid_done++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("After divided, RF_Path:%d ,sum = %d \n", rf_path,noise_data.sum[rf_path])); ++ } ++ ++ } ++ ++ } ++ ++ //printk("####### valid_done:%d #############\n",valid_done); ++ if ((valid_done==max_rf_path) || (ODM_GetProgressingTime(pDM_Odm,start) > max_time)) ++ { ++ for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) ++ { ++ //printk("%s PATH_%d - sum = %d, valid_cnt = %d \n",__FUNCTION__,rf_path,noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]); ++ if(noise_data.valid_cnt[rf_path]) ++ noise_data.sum[rf_path] /= noise_data.valid_cnt[rf_path]; ++ else ++ noise_data.sum[rf_path] = 0; ++ } ++ break; ++ } ++ } ++ reg_c50 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XAAGCCore1,bMaskByte0); ++ reg_c50 &= ~BIT7; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XAAGCCore1, reg_c50, reg_c50)); ++ pDM_Odm->noise_level.noise[ODM_RF_PATH_A] = -110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A]; ++ pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_A]; ++ ++ if(max_rf_path == 2){ ++ reg_c58 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XBAGCCore1,bMaskByte0); ++ reg_c58 &= ~BIT7; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XBAGCCore1, reg_c58, reg_c58)); ++ pDM_Odm->noise_level.noise[ODM_RF_PATH_B] = -110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B]; ++ pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_B]; ++ } ++ pDM_Odm->noise_level.noise_all /= max_rf_path; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("noise_a = %d, noise_b = %d\n", ++ pDM_Odm->noise_level.noise[ODM_RF_PATH_A], ++ pDM_Odm->noise_level.noise[ODM_RF_PATH_B])); ++ ++ // ++ // Step 4. Recover the Dig ++ // ++ if(bPauseDIG) ++ { ++ odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, IGIValue); ++ } ++ func_end = ODM_GetProgressingTime(pDM_Odm,func_start) ; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_DebugControlInbandNoise_Nseries() <==\n")); ++ return pDM_Odm->noise_level.noise_all; ++ ++} ++ ++s2Byte ++odm_InbandNoise_Monitor_ACSeries(PDM_ODM_T pDM_Odm, u8 bPauseDIG, u8 IGIValue, u32 max_time ++ ) ++{ ++ s4Byte rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/ ++ s4Byte value32, pwdb_A = 0, sval, noise, sum; ++ BOOLEAN pd_flag; ++ u1Byte i, valid_cnt; ++ u32 start = 0, func_start = 0, func_end = 0; ++ ++ ++ if (!(pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821))) ++ return 0; ++ ++ func_start = ODM_GetCurrentTime(pDM_Odm); ++ pDM_Odm->noise_level.noise_all = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_InbandNoise_Monitor_ACSeries() ==>\n")); ++ ++ /* Step 1. Disable DIG && Set initial gain. */ ++ if (bPauseDIG) ++ odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, IGIValue); ++ ++ /* Step 2. Disable all power save for read registers */ ++ /*dcmd_DebugControlPowerSave(pAdapter, PSDisable); */ ++ ++ /* Step 3. Get noise power level */ ++ start = ODM_GetCurrentTime(pDM_Odm); ++ ++ /* reset counters */ ++ sum = 0; ++ valid_cnt = 0; ++ ++ /* Step 3. Get noise power level */ ++ while (1) { ++ /*Set IGI=0x1C */ ++ ODM_Write_DIG(pDM_Odm, 0x1C); ++ /*stop CK320&CK88 */ ++ ODM_SetBBReg(pDM_Odm, 0x8B4, BIT6, 1); ++ /*Read Path-A */ ++ ODM_SetBBReg(pDM_Odm, 0x8FC, bMaskDWord, 0x200); /*set debug port*/ ++ value32 = ODM_GetBBReg(pDM_Odm, 0xFA0, bMaskDWord); /*read debug port*/ ++ ++ rxi_buf_anta = (value32 & 0xFFC00) >> 10; /*rxi_buf_anta=RegFA0[19:10]*/ ++ rxq_buf_anta = value32 & 0x3FF; /*rxq_buf_anta=RegFA0[19:10]*/ ++ ++ pd_flag = (BOOLEAN) ((value32 & BIT31) >> 31); ++ ++ /*Not in packet detection period or Tx state */ ++ if ((!pd_flag) || (rxi_buf_anta != 0x200)) { ++ /*sign conversion*/ ++ rxi_buf_anta = ODM_SignConversion(rxi_buf_anta, 10); ++ rxq_buf_anta = ODM_SignConversion(rxq_buf_anta, 10); ++ ++ pwdb_A = ODM_PWdB_Conversion(rxi_buf_anta * rxi_buf_anta + rxq_buf_anta * rxq_buf_anta, 20, 18); /*S(10,9)*S(10,9)=S(20,18)*/ ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n", pwdb_A, rxi_buf_anta & 0x3FF, rxq_buf_anta & 0x3FF)); ++ } ++ ++ /*BB Reset*/ ++ ODM_Write1Byte(pDM_Odm, 0x02, ODM_Read1Byte(pDM_Odm, 0x02) & (~BIT0)); ++ ODM_Write1Byte(pDM_Odm, 0x02, ODM_Read1Byte(pDM_Odm, 0x02) | BIT0); ++ ++ /*Start CK320&CK88*/ ++ ODM_SetBBReg(pDM_Odm, 0x8B4, BIT6, 0); ++ ++ sval = pwdb_A; ++ ++ if (sval < 0 && sval >= -27) { ++ if (valid_cnt < ValidCnt) { ++ valid_cnt++; ++ sum += sval; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Valid sval = %d\n", sval)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Sum of sval = %d,\n", sum)); ++ if ((valid_cnt >= ValidCnt) || (ODM_GetProgressingTime(pDM_Odm, start) > max_time)) { ++ sum /= valid_cnt; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("After divided, sum = %d\n", sum)); ++ break; ++ } ++ } ++ } ++ } ++ ++ /*ADC backoff is 12dB,*/ ++ /*Ptarget=0x1C-110=-82dBm*/ ++ noise = sum + 12 + 0x1C - 110; ++ ++ /*Offset*/ ++ noise = noise - 3; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("noise = %d\n", noise)); ++ pDM_Odm->noise_level.noise_all = (s2Byte)noise; ++ ++ /* Step 4. Recover the Dig*/ ++ if (bPauseDIG) ++ odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, IGIValue); ++ ++ func_end = ODM_GetProgressingTime(pDM_Odm, func_start); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_InbandNoise_Monitor_ACSeries() <==\n")); ++ ++ return pDM_Odm->noise_level.noise_all; ++} ++ ++ ++ ++s2Byte ++ODM_InbandNoise_Monitor(PVOID pDM_VOID, u8 bPauseDIG, u8 IGIValue, u32 max_time) ++{ ++ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ return odm_InbandNoise_Monitor_ACSeries(pDM_Odm, bPauseDIG, IGIValue, max_time); ++ else ++ return odm_InbandNoise_Monitor_NSeries(pDM_Odm, bPauseDIG, IGIValue, max_time); ++} ++ ++#endif ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_noisemonitor.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_noisemonitor.h +new file mode 100644 +index 0000000..022cefe +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_noisemonitor.h +@@ -0,0 +1,49 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ *****************************************************************************/ ++#ifndef __ODMNOISEMONITOR_H__ ++#define __ODMNOISEMONITOR_H__ ++ ++#define ODM_MAX_CHANNEL_NUM 38//14+24 ++struct noise_level ++{ ++ //u1Byte value_a, value_b; ++ u1Byte value[MAX_RF_PATH]; ++ //s1Byte sval_a, sval_b; ++ s1Byte sval[MAX_RF_PATH]; ++ ++ //s4Byte noise_a=0, noise_b=0,sum_a=0, sum_b=0; ++ //s4Byte noise[ODM_RF_PATH_MAX]; ++ s4Byte sum[MAX_RF_PATH]; ++ //u1Byte valid_cnt_a=0, valid_cnt_b=0, ++ u1Byte valid[MAX_RF_PATH]; ++ u1Byte valid_cnt[MAX_RF_PATH]; ++ ++}; ++ ++ ++typedef struct _ODM_NOISE_MONITOR_ ++{ ++ s1Byte noise[MAX_RF_PATH]; ++ s2Byte noise_all; ++}ODM_NOISE_MONITOR; ++ ++s2Byte ODM_InbandNoise_Monitor(PVOID pDM_VOID,u8 bPauseDIG,u8 IGIValue,u32 max_time); ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_pathdiv.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_pathdiv.c +new file mode 100644 +index 0000000..f1a8f11 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_pathdiv.c +@@ -0,0 +1,2311 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if(defined(CONFIG_PATH_DIVERSITY)) ++#if RTL8814A_SUPPORT ++ ++VOID ++phydm_dtp_fix_tx_path( ++ IN PVOID pDM_VOID, ++ IN u1Byte path ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; ++ u1Byte i,num_enable_path=0; ++ ++ if(path==pDM_PathDiv->pre_tx_path) ++ { ++ return; ++ } ++ else ++ { ++ pDM_PathDiv->pre_tx_path=path; ++ } ++ ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT18|BIT19, 3); ++ ++ for(i=0; i<4; i++) ++ { ++ if(path&BIT(i)) ++ num_enable_path++; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Number of trun-on path : (( %d ))\n", num_enable_path)); ++ ++ if(num_enable_path == 1) ++ { ++ ODM_SetBBReg( pDM_Odm, 0x93c, 0xf00000, path); ++ ++ if(path==PHYDM_A)//1-1 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A ))\n")); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ } ++ else if(path==PHYDM_B)//1-2 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B ))\n")); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); ++ } ++ else if(path==PHYDM_C)//1-3 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( C ))\n")); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 0); ++ ++ } ++ else if(path==PHYDM_D)//1-4 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( D ))\n")); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 0); ++ } ++ ++ } ++ else if(num_enable_path == 2) ++ { ++ ODM_SetBBReg( pDM_Odm, 0x93c, 0xf00000, path); ++ ODM_SetBBReg( pDM_Odm, 0x940, 0xf0, path); ++ ++ if(path==PHYDM_AB)//2-1 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A B ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 1); ++ } ++ else if(path==PHYDM_AC)//2-2 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A C ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); ++ } ++ else if(path==PHYDM_AD)//2-3 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A D ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 1); ++ } ++ else if(path==PHYDM_BC)//2-4 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B C ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); ++ } ++ else if(path==PHYDM_BD)//2-5 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B D ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 1); ++ } ++ else if(path==PHYDM_CD)//2-6 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( C D ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 1); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 1); ++ } ++ ++ } ++ else if(num_enable_path == 3) ++ { ++ ODM_SetBBReg( pDM_Odm, 0x93c, 0xf00000, path); ++ ODM_SetBBReg( pDM_Odm, 0x940, 0xf0, path); ++ ODM_SetBBReg( pDM_Odm, 0x940, 0xf0000, path); ++ ++ if(path==PHYDM_ABC)//3-1 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A B C))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 1); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 2); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 2); ++ //set for 3ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT21|BIT20, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT23|BIT22, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT25|BIT24, 2); ++ } ++ else if(path==PHYDM_ABD)//3-2 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A B D ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 1); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 2); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 2); ++ //set for 3ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT21|BIT20, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT23|BIT22, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT27|BIT26, 2); ++ ++ } ++ else if(path==PHYDM_ACD)//3-3 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( A C D ))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT25|BIT24, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 2); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 2); ++ //set for 3ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT21|BIT20, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT25|BIT24, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT27|BIT26, 2); ++ } ++ else if(path==PHYDM_BCD)//3-4 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path (( B C D))\n")); ++ //set for 1ss ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT27|BIT26, 0); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT29|BIT28, 1); ++ ODM_SetBBReg( pDM_Odm, 0x93c, BIT31|BIT30, 2); ++ //set for 2ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT11|BIT10, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT13|BIT12, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT15|BIT14, 2); ++ //set for 3ss ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT23|BIT22, 0); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT25|BIT24, 1); ++ ODM_SetBBReg( pDM_Odm, 0x940, BIT27|BIT26, 2); ++ } ++ } ++ else if(num_enable_path == 4) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" Trun on path ((A B C D))\n")); ++ } ++ ++} ++ ++VOID ++phydm_find_default_path( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; ++ u4Byte rssi_avg_a=0, rssi_avg_b=0, rssi_avg_c=0, rssi_avg_d=0, rssi_avg_bcd=0; ++ u4Byte rssi_total_a=0, rssi_total_b=0, rssi_total_c=0, rssi_total_d=0; ++ ++ //2 Default Path Selection By RSSI ++ ++ rssi_avg_a = (pDM_PathDiv->path_a_cnt_all > 0)? (pDM_PathDiv->path_a_sum_all / pDM_PathDiv->path_a_cnt_all) :0 ; ++ rssi_avg_b = (pDM_PathDiv->path_b_cnt_all > 0)? (pDM_PathDiv->path_b_sum_all / pDM_PathDiv->path_b_cnt_all) :0 ; ++ rssi_avg_c = (pDM_PathDiv->path_c_cnt_all > 0)? (pDM_PathDiv->path_c_sum_all / pDM_PathDiv->path_c_cnt_all) :0 ; ++ rssi_avg_d = (pDM_PathDiv->path_d_cnt_all > 0)? (pDM_PathDiv->path_d_sum_all / pDM_PathDiv->path_d_cnt_all) :0 ; ++ ++ ++ pDM_PathDiv->path_a_sum_all = 0; ++ pDM_PathDiv->path_a_cnt_all = 0; ++ pDM_PathDiv->path_b_sum_all = 0; ++ pDM_PathDiv->path_b_cnt_all = 0; ++ pDM_PathDiv->path_c_sum_all = 0; ++ pDM_PathDiv->path_c_cnt_all = 0; ++ pDM_PathDiv->path_d_sum_all = 0; ++ pDM_PathDiv->path_d_cnt_all = 0; ++ ++ if(pDM_PathDiv->use_path_a_as_default_ant == 1) ++ { ++ rssi_avg_bcd=(rssi_avg_b+rssi_avg_c+rssi_avg_d)/3; ++ ++ if( (rssi_avg_a + ANT_DECT_RSSI_TH) > rssi_avg_bcd ) ++ { ++ pDM_PathDiv->is_pathA_exist=TRUE; ++ pDM_PathDiv->default_path=PATH_A; ++ } ++ else ++ { ++ pDM_PathDiv->is_pathA_exist=FALSE; ++ } ++ } ++ else ++ { ++ if( (rssi_avg_a >=rssi_avg_b) && (rssi_avg_a >=rssi_avg_c)&&(rssi_avg_a >=rssi_avg_d)) ++ pDM_PathDiv->default_path=PATH_A; ++ else if( (rssi_avg_b >=rssi_avg_c)&&(rssi_avg_b >=rssi_avg_d)) ++ pDM_PathDiv->default_path=PATH_B; ++ else if( rssi_avg_c >=rssi_avg_d) ++ pDM_PathDiv->default_path=PATH_C; ++ else ++ pDM_PathDiv->default_path=PATH_D; ++ } ++ ++ ++} ++ ++ ++VOID ++phydm_candidate_dtp_update( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; ++ ++ pDM_PathDiv->num_candidate=3; ++ ++ if(pDM_PathDiv->use_path_a_as_default_ant == 1) ++ { ++ if(pDM_PathDiv->num_tx_path==3) ++ { ++ if(pDM_PathDiv->is_pathA_exist) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_ABD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_ACD; ++ } ++ else // use path BCD ++ { ++ pDM_PathDiv->num_candidate=1; ++ phydm_dtp_fix_tx_path(pDM_Odm, PHYDM_BCD); ++ return; ++ } ++ } ++ else if(pDM_PathDiv->num_tx_path==2) ++ { ++ if(pDM_PathDiv->is_pathA_exist) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_AB; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_AC; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_AD; ++ } ++ else ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_BC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_BD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_CD; ++ } ++ } ++ } ++ else ++ { ++ //2 3 TX Mode ++ if(pDM_PathDiv->num_tx_path==3)//choose 3 ant form 4 ++ { ++ if(pDM_PathDiv->default_path == PATH_A) //choose 2 ant form 3 ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_ABD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_ACD; ++ } ++ else if(pDM_PathDiv->default_path==PATH_B) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_ABD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_BCD; ++ } ++ else if(pDM_PathDiv->default_path == PATH_C) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_ABC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_ACD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_BCD; ++ } ++ else if(pDM_PathDiv->default_path == PATH_D) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_ABD; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_ACD; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_BCD; ++ } ++ } ++ ++ //2 2 TX Mode ++ else if(pDM_PathDiv->num_tx_path==2)//choose 2 ant form 4 ++ { ++ if(pDM_PathDiv->default_path == PATH_A) //choose 2 ant form 3 ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_AB; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_AC; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_AD; ++ } ++ else if(pDM_PathDiv->default_path==PATH_B) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_AB; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_BC; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_BD; ++ } ++ else if(pDM_PathDiv->default_path == PATH_C) ++ { ++ pDM_PathDiv->ant_candidate_1 = PHYDM_AC; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_BC; ++ pDM_PathDiv->ant_candidate_3 = PHYDM_CD; ++ } ++ else if(pDM_PathDiv->default_path == PATH_D) ++ { ++ pDM_PathDiv->ant_candidate_1= PHYDM_AD; ++ pDM_PathDiv->ant_candidate_2 = PHYDM_BD; ++ pDM_PathDiv->ant_candidate_3= PHYDM_CD; ++ } ++ } ++ } ++} ++ ++ ++VOID ++phydm_dynamic_tx_path( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; ++ ++ PSTA_INFO_T pEntry; ++ u4Byte i; ++ u1Byte num_client=0; ++ u1Byte H2C_Parameter[6] ={0}; ++ ++ ++ if(!pDM_Odm->bLinked) //bLinked==False ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("DTP_8814 [No Link!!!]\n")); ++ ++ if(pDM_PathDiv->bBecomeLinked == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" [Be disconnected]----->\n")); ++ pDM_PathDiv->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ return; ++ } ++ else ++ { ++ if(pDM_PathDiv->bBecomeLinked ==FALSE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, (" [Be Linked !!!]----->\n")); ++ pDM_PathDiv->bBecomeLinked = pDM_Odm->bLinked; ++ } ++ } ++ ++ //2 [Period CTRL] ++ if(pDM_PathDiv->dtp_period >=2) ++ { ++ pDM_PathDiv->dtp_period=0; ++ } ++ else ++ { ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("Phydm_Dynamic_Tx_Path_8814A() Stay = (( %d ))\n",pDM_PathDiv->dtp_period)); ++ pDM_PathDiv->dtp_period++; ++ return; ++ } ++ ++ ++ //2 [Fix Path] ++ if (pDM_Odm->path_select != PHYDM_AUTO_PATH) ++ { ++ return; ++ } ++ ++ //2 [Check Bfer] ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #if (BEAMFORMING_SUPPORT == 1) ++ { ++ BEAMFORMING_CAP BeamformCap = (pDM_Odm->BeamformingInfo.BeamformCap); ++ ++ if( BeamformCap & BEAMFORMER_CAP ) // BFmer On && Div On -> Div Off ++ { ++ if( pDM_PathDiv->fix_path_bfer == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("[ PathDiv : OFF ] BFmer ==1 \n")); ++ pDM_PathDiv->fix_path_bfer = 1 ; ++ } ++ return; ++ } ++ else // BFmer Off && Div Off -> Div On ++ { ++ if( pDM_PathDiv->fix_path_bfer == 1 ) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("[ PathDiv : ON ] BFmer ==0 \n")); ++ pDM_PathDiv->fix_path_bfer = 0; ++ } ++ } ++ } ++ #endif ++ #endif ++ ++ if(pDM_PathDiv->use_path_a_as_default_ant ==1) ++ { ++ phydm_find_default_path(pDM_Odm); ++ phydm_candidate_dtp_update(pDM_Odm); ++ } ++ else ++ { ++ if( pDM_PathDiv->dtp_state == PHYDM_DTP_INIT) ++ { ++ phydm_find_default_path(pDM_Odm); ++ phydm_candidate_dtp_update(pDM_Odm); ++ pDM_PathDiv->dtp_state = PHYDM_DTP_RUNNING_1; ++ } ++ ++ else if( pDM_PathDiv->dtp_state == PHYDM_DTP_RUNNING_1) ++ { ++ pDM_PathDiv->dtp_check_patha_counter++; ++ ++ if(pDM_PathDiv->dtp_check_patha_counter>=NUM_RESET_DTP_PERIOD) ++ { ++ pDM_PathDiv->dtp_check_patha_counter=0; ++ pDM_PathDiv->dtp_state = PHYDM_DTP_INIT; ++ } ++ //2 Search space update ++ else ++ { ++ // 1. find the worst candidate ++ ++ ++ // 2. repalce the worst candidate ++ } ++ } ++ } ++ ++ //2 Dynamic Path Selection H2C ++ ++ if(pDM_PathDiv->num_candidate == 1) ++ { ++ return; ++ } ++ else ++ { ++ H2C_Parameter[0] = pDM_PathDiv->num_candidate; ++ H2C_Parameter[1] = pDM_PathDiv->num_tx_path; ++ H2C_Parameter[2] = pDM_PathDiv->ant_candidate_1; ++ H2C_Parameter[3] = pDM_PathDiv->ant_candidate_2; ++ H2C_Parameter[4] = pDM_PathDiv->ant_candidate_3; ++ ++ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_DYNAMIC_TX_PATH, 6, H2C_Parameter); ++ } ++ ++} ++ ++ ++ ++VOID ++phydm_dynamic_tx_path_init( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ USB_MODE_MECH *pUsbModeMech = &pAdapter->UsbModeMechanism; ++ #endif ++ u1Byte search_space_2[NUM_CHOOSE2_FROM4]= {PHYDM_AB, PHYDM_AC, PHYDM_AD, PHYDM_BC, PHYDM_BD, PHYDM_CD }; ++ u1Byte search_space_3[NUM_CHOOSE3_FROM4]= {PHYDM_BCD, PHYDM_ACD, PHYDM_ABD, PHYDM_ABC}; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pDM_PathDiv->is_u3_mode = (pUsbModeMech->CurUsbMode==USB_MODE_U3)? 1 : 0 ; ++ #else ++ pDM_PathDiv->is_u3_mode = 1; ++ #endif ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("Dynamic TX Path Init 8814\n")); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("is_u3_mode = (( %d ))\n", pDM_PathDiv->is_u3_mode)); ++ ++ memcpy(&(pDM_PathDiv->search_space_2[0]), &(search_space_2[0]), NUM_CHOOSE2_FROM4); ++ memcpy(&(pDM_PathDiv->search_space_3[0]), &(search_space_3[0]), NUM_CHOOSE3_FROM4); ++ ++ pDM_PathDiv->use_path_a_as_default_ant= 1; ++ pDM_PathDiv->dtp_state = PHYDM_DTP_INIT; ++ pDM_Odm->path_select = PHYDM_AUTO_PATH; ++ pDM_PathDiv->path_div_type = PHYDM_4R_PATH_DIV; ++ ++ ++ if(pDM_PathDiv->is_u3_mode ) ++ { ++ pDM_PathDiv->num_tx_path=3; ++ phydm_dtp_fix_tx_path(pDM_Odm, PHYDM_BCD);/* 3TX Set Init TX Path*/ ++ ++ } ++ else ++ { ++ pDM_PathDiv->num_tx_path=2; ++ phydm_dtp_fix_tx_path(pDM_Odm, PHYDM_BC);/* 2TX // Set Init TX Path*/ ++ } ++ ++} ++ ++ ++VOID ++phydm_process_rssi_for_path_div( ++ IN OUT PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_PHY_INFO_T pPhyInfo=(PODM_PHY_INFO_T)p_phy_info_void; ++ PODM_PACKET_INFO_T pPktinfo=(PODM_PACKET_INFO_T)p_pkt_info_void; ++ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); ++ ++ if(pPktinfo->bPacketToSelf || pPktinfo->bPacketMatchBSSID) ++ { ++ if(pPktinfo->DataRate > ODM_RATE11M) ++ { ++ if(pDM_PathDiv->path_div_type == PHYDM_4R_PATH_DIV) ++ { ++ #if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType & ODM_RTL8814A) ++ { ++ pDM_PathDiv->path_a_sum_all+=pPhyInfo->RxMIMOSignalStrength[0]; ++ pDM_PathDiv->path_a_cnt_all++; ++ ++ pDM_PathDiv->path_b_sum_all+=pPhyInfo->RxMIMOSignalStrength[1]; ++ pDM_PathDiv->path_b_cnt_all++; ++ ++ pDM_PathDiv->path_c_sum_all+=pPhyInfo->RxMIMOSignalStrength[2]; ++ pDM_PathDiv->path_c_cnt_all++; ++ ++ pDM_PathDiv->path_d_sum_all+=pPhyInfo->RxMIMOSignalStrength[3]; ++ pDM_PathDiv->path_d_cnt_all++; ++ } ++ #endif ++ } ++ else ++ { ++ pDM_PathDiv->PathA_Sum[pPktinfo->StationID]+=pPhyInfo->RxMIMOSignalStrength[0]; ++ pDM_PathDiv->PathA_Cnt[pPktinfo->StationID]++; ++ ++ pDM_PathDiv->PathB_Sum[pPktinfo->StationID]+=pPhyInfo->RxMIMOSignalStrength[1]; ++ pDM_PathDiv->PathB_Cnt[pPktinfo->StationID]++; ++ } ++ } ++ } ++ ++ ++} ++ ++#endif //#if RTL8814A_SUPPORT ++ ++VOID ++odm_pathdiv_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); ++ u4Byte used = *_used; ++ u4Byte out_len = *_out_len; ++ ++ pDM_Odm->path_select = (dm_value[0] & 0xf); ++ PHYDM_SNPRINTF((output+used, out_len-used,"Path_select = (( 0x%x ))\n",pDM_Odm->path_select )); ++ ++ //2 [Fix Path] ++ if (pDM_Odm->path_select != PHYDM_AUTO_PATH) ++ { ++ PHYDM_SNPRINTF((output+used, out_len-used,"Trun on path [%s%s%s%s]\n", ++ ((pDM_Odm->path_select) & 0x1)?"A":"", ++ ((pDM_Odm->path_select) & 0x2)?"B":"", ++ ((pDM_Odm->path_select) & 0x4)?"C":"", ++ ((pDM_Odm->path_select) & 0x8)?"D":"" )); ++ ++ phydm_dtp_fix_tx_path( pDM_Odm, pDM_Odm->path_select ); ++ } ++ else ++ { ++ PHYDM_SNPRINTF((output+used, out_len-used,"%s\n","Auto Path")); ++ } ++} ++ ++#endif // #if(defined(CONFIG_PATH_DIVERSITY)) ++ ++VOID ++phydm_c2h_dtp_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++) ++{ ++#if(defined(CONFIG_PATH_DIVERSITY)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pPATHDIV_T pDM_PathDiv = &(pDM_Odm->DM_PathDiv); ++ ++ u1Byte macid = CmdBuf[0]; ++ u1Byte target = CmdBuf[1]; ++ u1Byte nsc_1 = CmdBuf[2]; ++ u1Byte nsc_2 = CmdBuf[3]; ++ u1Byte nsc_3 = CmdBuf[4]; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Target_candidate = (( %d ))\n", target)); ++ /* ++ if( (nsc_1 >= nsc_2) && (nsc_1 >= nsc_3)) ++ { ++ phydm_dtp_fix_tx_path(pDM_Odm, pDM_PathDiv->ant_candidate_1); ++ } ++ else if( nsc_2 >= nsc_3) ++ { ++ phydm_dtp_fix_tx_path(pDM_Odm, pDM_PathDiv->ant_candidate_2); ++ } ++ else ++ { ++ phydm_dtp_fix_tx_path(pDM_Odm, pDM_PathDiv->ant_candidate_3); ++ } ++ */ ++#endif ++} ++ ++VOID ++odm_PathDiversity( ++ IN PVOID pDM_VOID ++) ++{ ++#if(defined(CONFIG_PATH_DIVERSITY)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); ++ return; ++ } ++ ++ #if RTL8812A_SUPPORT ++ ++ if(pDM_Odm->SupportICType & ODM_RTL8812) ++ ODM_PathDiversity_8812A(pDM_Odm); ++ else ++ #endif ++ ++ #if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType & ODM_RTL8814A) ++ phydm_dynamic_tx_path(pDM_Odm); ++ else ++ #endif ++ {} ++#endif ++} ++ ++VOID ++odm_PathDiversityInit( ++ IN PVOID pDM_VOID ++) ++{ ++#if(defined(CONFIG_PATH_DIVERSITY)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ /*pDM_Odm->SupportAbility |= ODM_BB_PATH_DIV;*/ ++ ++ if(pDM_Odm->mp_mode == TRUE) ++ return; ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); ++ return; ++ } ++ ++#if RTL8812A_SUPPORT ++ if(pDM_Odm->SupportICType & ODM_RTL8812) ++ ODM_PathDiversityInit_8812A(pDM_Odm); ++ else ++ #endif ++ ++ #if RTL8814A_SUPPORT ++ if(pDM_Odm->SupportICType & ODM_RTL8814A) ++ phydm_dynamic_tx_path_init(pDM_Odm); ++ else ++ #endif ++ {} ++#endif ++} ++ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++// ++// 2011/12/02 MH Copy from MP oursrc for temporarily test. ++// ++#if RTL8192C_SUPPORT ++BOOLEAN ++odm_IsConnected_92C( ++ IN PADAPTER Adapter ++) ++{ ++ PRT_WLAN_STA pEntry; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u4Byte i; ++ BOOLEAN bConnected=FALSE; ++ ++ if(pMgntInfo->mAssoc) ++ { ++ bConnected = TRUE; ++ } ++ else ++ { ++ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) ++ { ++ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) ++ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); ++ else ++ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); ++ ++ if(pEntry!=NULL) ++ { ++ if(pEntry->bAssociated) ++ { ++ bConnected = TRUE; ++ break; ++ } ++ } ++ else ++ { ++ break; ++ } ++ } ++ } ++ return bConnected; ++} ++ ++BOOLEAN ++ODM_PathDiversityBeforeLink92C( ++ //IN PADAPTER Adapter ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE* pHalData = NULL; ++ PMGNT_INFO pMgntInfo = NULL; ++ //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; ++ pPD_T pDM_PDTable = NULL; ++ ++ s1Byte Score = 0; ++ PRT_WLAN_BSS pTmpBssDesc; ++ PRT_WLAN_BSS pTestBssDesc; ++ ++ u1Byte target_chnl = 0; ++ u2Byte index; ++ ++ if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 ++ { // The ODM structure is not initialized. ++ return FALSE; ++ } ++ pHalData = GET_HAL_DATA(Adapter); ++ pMgntInfo = &Adapter->MgntInfo; ++ pDM_PDTable = &Adapter->DM_PDTable; ++ ++ // Condition that does not need to use path diversity. ++ if((!(pHalData->CVID_Version==VERSION_1_BEFORE_8703B && IS_92C_SERIAL(pHalData->VersionID))) || (pHalData->PathDivCfg!=1) || pMgntInfo->AntennaTest ) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ++ ("ODM_PathDiversityBeforeLink92C(): No PathDiv Mechanism before link.\n")); ++ return FALSE; ++ } ++ ++ // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. ++ PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) ++ { ++ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ ++ RT_TRACE(COMP_INIT, DBG_LOUD, ++ ("ODM_PathDiversityBeforeLink92C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", ++ pMgntInfo->RFChangeInProgress, ++ pHalData->eRFPowerState)); ++ ++ //pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ pDM_PDTable->PathDiv_NoLink_State = 0; ++ ++ return FALSE; ++ } ++ else ++ { ++ PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ++ } ++ ++ //1 Run AntDiv mechanism "Before Link" part. ++ //if(pDM_SWAT_Table->SWAS_NoLink_State == 0) ++ if(pDM_PDTable->PathDiv_NoLink_State == 0) ++ { ++ //1 Prepare to do Scan again to check current antenna state. ++ ++ // Set check state to next step. ++ //pDM_SWAT_Table->SWAS_NoLink_State = 1; ++ pDM_PDTable->PathDiv_NoLink_State = 1; ++ ++ // Copy Current Scan list. ++ Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; ++ PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); ++ ++ // Switch Antenna to another one. ++ if(pDM_PDTable->DefaultRespPath == 0) ++ { ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // TRX path = PathB ++ odm_SetRespPath_92C(Adapter, 1); ++ pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; ++ pDM_PDTable->CCKTXPath = 0xFFFFFFFF; ++ } ++ else ++ { ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // TRX path = PathA ++ odm_SetRespPath_92C(Adapter, 0); ++ pDM_PDTable->OFDMTXPath = 0x0; ++ pDM_PDTable->CCKTXPath = 0x0; ++ } ++#if 0 ++ ++ pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; ++ pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; ++ ++ RT_TRACE(COMP_INIT, DBG_LOUD, ++ ("ODM_SwAntDivCheckBeforeLink: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B")); ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); ++ pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); ++ PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); ++#endif ++ ++ // Go back to scan function again. ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Scan one more time\n")); ++ pMgntInfo->ScanStep=0; ++ target_chnl = odm_SwAntDivSelectScanChnl(Adapter); ++ odm_SwAntDivConstructScanChnl(Adapter, target_chnl); ++ PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); ++ ++ return TRUE; ++ } ++ else ++ { ++ //1 ScanComple() is called after antenna swiched. ++ //1 Check scan result and determine which antenna is going ++ //1 to be used. ++ ++ for(index=0; indexMgntInfo.tmpNumBssDesc; index++) ++ { ++ pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); ++ pTestBssDesc = &(pMgntInfo->bssDesc[index]); ++ ++ if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): ERROR!! This shall not happen.\n")); ++ continue; ++ } ++ ++ if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score++\n")); ++ RT_PRINT_STR(COMP_INIT, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ ++ Score++; ++ PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); ++ } ++ else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score--\n")); ++ RT_PRINT_STR(COMP_INIT, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ++ Score--; ++ } ++ ++ } ++ ++ if(pMgntInfo->NumBssDesc!=0 && Score<=0) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ++ ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); ++ ++ //pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; ++ } ++ else ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ++ ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); ++ ++ if(pDM_PDTable->DefaultRespPath == 0) ++ { ++ pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; ++ pDM_PDTable->CCKTXPath = 0xFFFFFFFF; ++ odm_SetRespPath_92C(Adapter, 1); ++ } ++ else ++ { ++ pDM_PDTable->OFDMTXPath = 0x0; ++ pDM_PDTable->CCKTXPath = 0x0; ++ odm_SetRespPath_92C(Adapter, 0); ++ } ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); // RX path = PathAB ++ ++ //pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; ++ ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); ++ //pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); ++ } ++ ++ // Check state reset to default and wait for next time. ++ //pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ pDM_PDTable->PathDiv_NoLink_State = 0; ++ ++ return FALSE; ++ } ++#else ++ return FALSE; ++#endif ++ ++} ++ ++ ++ ++VOID ++odm_PathDiversityAfterLink_92C( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ u1Byte DefaultRespPath=0; ++ ++ if((!(pHalData->CVID_Version==VERSION_1_BEFORE_8703B && IS_92C_SERIAL(pHalData->VersionID))) || (pHalData->PathDivCfg != 1) || (pHalData->eRFPowerState == eRfOff)) ++ { ++ if(pHalData->PathDivCfg == 0) ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("No ODM_TXPathDiversity()\n")); ++ } ++ else ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("2T ODM_TXPathDiversity()\n")); ++ } ++ return; ++ } ++ if(!odm_IsConnected_92C(Adapter)) ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity(): No Connections\n")); ++ return; ++ } ++ ++ ++ if(pDM_PDTable->TrainingState == 0) ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() ==>\n")); ++ odm_OFDMTXPathDiversity_92C(Adapter); ++ ++ if((pDM_PDTable->CCKPathDivEnable == TRUE) && (pDM_PDTable->OFDM_Pkt_Cnt < 100)) ++ { ++ //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=0\n")); ++ ++ if(pDM_PDTable->CCK_Pkt_Cnt > 300) ++ pDM_PDTable->Timer = 20; ++ else if(pDM_PDTable->CCK_Pkt_Cnt > 100) ++ pDM_PDTable->Timer = 60; ++ else ++ pDM_PDTable->Timer = 250; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: timer=%d\n",pDM_PDTable->Timer)); ++ ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // RX path = PathA ++ pDM_PDTable->TrainingState = 1; ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms ++ } ++ else ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->OFDMTXPath; ++ DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Skip odm_CCKTXPathDiversity_92C, DefaultRespPath is OFDM\n")); ++ odm_SetRespPath_92C(Adapter, DefaultRespPath); ++ odm_ResetPathDiversity_92C(Adapter); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); ++ } ++ } ++ else if(pDM_PDTable->TrainingState == 1) ++ { ++ //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=1\n")); ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // RX path = PathB ++ pDM_PDTable->TrainingState = 2; ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms ++ } ++ else ++ { ++ //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=2\n")); ++ pDM_PDTable->TrainingState = 0; ++ odm_CCKTXPathDiversity_92C(Adapter); ++ if(pDM_PDTable->OFDM_Pkt_Cnt != 0) ++ { ++ DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is OFDM\n")); ++ } ++ else ++ { ++ DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is CCK\n")); ++ } ++ odm_SetRespPath_92C(Adapter, DefaultRespPath); ++ odm_ResetPathDiversity_92C(Adapter); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); ++ } ++ ++} ++ ++VOID ++odm_SetRespPath_92C( ++ IN PADAPTER Adapter, ++ IN u1Byte DefaultRespPath ++ ) ++{ ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Select Response Path=%d\n",DefaultRespPath)); ++ if(DefaultRespPath != pDM_PDTable->DefaultRespPath) ++ { ++ if(DefaultRespPath == 0) ++ { ++ PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x15); ++ } ++ else ++ { ++ PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x2A); ++ } ++ } ++ pDM_PDTable->DefaultRespPath = DefaultRespPath; ++} ++ ++VOID ++odm_OFDMTXPathDiversity_92C( ++ IN PADAPTER Adapter) ++{ ++// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ PRT_WLAN_STA pEntry; ++ u1Byte i, DefaultRespPath = 0; ++ s4Byte MinRSSI = 0xFF; ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ pDM_PDTable->OFDMTXPath = 0; ++ ++ //1 Default Port ++ if(pMgntInfo->mAssoc) ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port RSSI[0]=%d, RSSI[1]=%d\n", ++ Adapter->RxStats.RxRSSIPercentage[0], Adapter->RxStats.RxRSSIPercentage[1])); ++ if(Adapter->RxStats.RxRSSIPercentage[0] > Adapter->RxStats.RxRSSIPercentage[1]) ++ { ++ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & (~BIT0); ++ MinRSSI = Adapter->RxStats.RxRSSIPercentage[1]; ++ DefaultRespPath = 0; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-0\n")); ++ } ++ else ++ { ++ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT0; ++ MinRSSI = Adapter->RxStats.RxRSSIPercentage[0]; ++ DefaultRespPath = 1; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-1\n")); ++ } ++ //RT_TRACE( COMP_INIT, DBG_LOUD, ("pDM_PDTable->OFDMTXPath =0x%x\n",pDM_PDTable->OFDMTXPath)); ++ } ++ //1 Extension Port ++ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) ++ { ++ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) ++ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); ++ else ++ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); ++ ++ if(pEntry!=NULL) ++ { ++ if(pEntry->bAssociated) ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d, RSSI_0=%d, RSSI_1=%d\n", ++ pEntry->AssociatedMacId, pEntry->rssi_stat.RxRSSIPercentage[0], pEntry->rssi_stat.RxRSSIPercentage[1])); ++ ++ if(pEntry->rssi_stat.RxRSSIPercentage[0] > pEntry->rssi_stat.RxRSSIPercentage[1]) ++ { ++ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & ~(BIT(pEntry->AssociatedMacId)); ++ //pHalData->TXPath = pHalData->TXPath & ~(1<<(pEntry->AssociatedMacId)); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-0\n", pEntry->AssociatedMacId)); ++ if(pEntry->rssi_stat.RxRSSIPercentage[1] < MinRSSI) ++ { ++ MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[1]; ++ DefaultRespPath = 0; ++ } ++ } ++ else ++ { ++ pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT(pEntry->AssociatedMacId); ++ //pHalData->TXPath = pHalData->TXPath | (1 << (pEntry->AssociatedMacId)); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-1\n", pEntry->AssociatedMacId)); ++ if(pEntry->rssi_stat.RxRSSIPercentage[0] < MinRSSI) ++ { ++ MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[0]; ++ DefaultRespPath = 1; ++ } ++ } ++ } ++ } ++ else ++ { ++ break; ++ } ++ } ++ ++ pDM_PDTable->OFDMDefaultRespPath = DefaultRespPath; ++} ++ ++ ++VOID ++odm_CCKTXPathDiversity_92C( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ PRT_WLAN_STA pEntry; ++ s4Byte MinRSSI = 0xFF; ++ u1Byte i, DefaultRespPath = 0; ++// BOOLEAN bBModePathDiv = FALSE; ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ ++ //1 Default Port ++ if(pMgntInfo->mAssoc) ++ { ++ if(pHalData->OFDM_Pkt_Cnt == 0) ++ { ++ for(i=0; i<2; i++) ++ { ++ if(pDM_PDTable->RSSI_CCK_Path_cnt[i] > 1) //Because the first packet is discarded ++ pDM_PDTable->RSSI_CCK_Path[i] = pDM_PDTable->RSSI_CCK_Path[i] / (pDM_PDTable->RSSI_CCK_Path_cnt[i]-1); ++ else ++ pDM_PDTable->RSSI_CCK_Path[i] = 0; ++ } ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path[0]=%d, pDM_PDTable->RSSI_CCK_Path[1]=%d\n", ++ pDM_PDTable->RSSI_CCK_Path[0], pDM_PDTable->RSSI_CCK_Path[1])); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path_cnt[0]=%d, pDM_PDTable->RSSI_CCK_Path_cnt[1]=%d\n", ++ pDM_PDTable->RSSI_CCK_Path_cnt[0], pDM_PDTable->RSSI_CCK_Path_cnt[1])); ++ ++ if(pDM_PDTable->RSSI_CCK_Path[0] > pDM_PDTable->RSSI_CCK_Path[1]) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); ++ MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; ++ DefaultRespPath = 0; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); ++ } ++ else if(pDM_PDTable->RSSI_CCK_Path[0] < pDM_PDTable->RSSI_CCK_Path[1]) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT0; ++ MinRSSI = pDM_PDTable->RSSI_CCK_Path[0]; ++ DefaultRespPath = 1; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-1\n")); ++ } ++ else ++ { ++ if((pDM_PDTable->RSSI_CCK_Path[0] != 0) && (pDM_PDTable->RSSI_CCK_Path[0] < MinRSSI)) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); ++ MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; ++ DefaultRespPath = 0; ++ } ++ else ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port unchange CCK Path\n")); ++ } ++ } ++ } ++ else //Follow OFDM decision ++ { ++ pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~BIT0)) | (pDM_PDTable->OFDMTXPath &BIT0); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, Default port Select CCK Path-%d\n", ++ pDM_PDTable->CCKTXPath &BIT0)); ++ } ++ } ++ //1 Extension Port ++ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) ++ { ++ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) ++ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); ++ else ++ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); ++ ++ if(pEntry!=NULL) ++ { ++ if(pEntry->bAssociated) ++ { ++ if(pEntry->rssi_stat.OFDM_Pkt_Cnt == 0) ++ { ++ u1Byte j=0; ++ for(j=0; j<2; j++) ++ { ++ if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] > 1) ++ pEntry->rssi_stat.RSSI_CCK_Path[j] = pEntry->rssi_stat.RSSI_CCK_Path[j] / (pEntry->rssi_stat.RSSI_CCK_Path_cnt[j]-1); ++ else ++ pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; ++ } ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d, RSSI_CCK0=%d, RSSI_CCK1=%d\n", ++ pEntry->AssociatedMacId, pEntry->rssi_stat.RSSI_CCK_Path[0], pEntry->rssi_stat.RSSI_CCK_Path[1])); ++ ++ if(pEntry->rssi_stat.RSSI_CCK_Path[0] >pEntry->rssi_stat.RSSI_CCK_Path[1]) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); ++ if(pEntry->rssi_stat.RSSI_CCK_Path[1] < MinRSSI) ++ { ++ MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; ++ DefaultRespPath = 0; ++ } ++ } ++ else if(pEntry->rssi_stat.RSSI_CCK_Path[0] rssi_stat.RSSI_CCK_Path[1]) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT(pEntry->AssociatedMacId); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-1\n", pEntry->AssociatedMacId)); ++ if(pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI) ++ { ++ MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[0]; ++ DefaultRespPath = 1; ++ } ++ } ++ else ++ { ++ if((pEntry->rssi_stat.RSSI_CCK_Path[0] != 0) && (pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI)) ++ { ++ pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); ++ MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; ++ DefaultRespPath = 0; ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); ++ } ++ else ++ { ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d unchange CCK Path\n", pEntry->AssociatedMacId)); ++ } ++ } ++ } ++ else //Follow OFDM decision ++ { ++ pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~(BIT(pEntry->AssociatedMacId)))) | (pDM_PDTable->OFDMTXPath & BIT(pEntry->AssociatedMacId)); ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, MACID=%d Select CCK Path-%d\n", ++ pEntry->AssociatedMacId, (pDM_PDTable->CCKTXPath & BIT(pEntry->AssociatedMacId))>>(pEntry->AssociatedMacId))); ++ } ++ } ++ } ++ else ++ { ++ break; ++ } ++ } ++ ++ RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C:MinRSSI=%d\n",MinRSSI)); ++ ++ if(MinRSSI == 0xFF) ++ DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; ++ ++ pDM_PDTable->CCKDefaultRespPath = DefaultRespPath; ++} ++ ++ ++VOID ++odm_ResetPathDiversity_92C( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ PRT_WLAN_STA pEntry; ++ u4Byte i,j; ++ ++ pDM_PDTable->CCK_Pkt_Cnt = 0; ++ pDM_PDTable->OFDM_Pkt_Cnt = 0; ++ pHalData->CCK_Pkt_Cnt =0; ++ pHalData->OFDM_Pkt_Cnt =0; ++ ++ if(pDM_PDTable->CCKPathDivEnable == TRUE) ++ PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); //RX path = PathAB ++ ++ for(i=0; i<2; i++) ++ { ++ pDM_PDTable->RSSI_CCK_Path_cnt[i]=0; ++ pDM_PDTable->RSSI_CCK_Path[i] = 0; ++ } ++ for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) ++ { ++ if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) ++ pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); ++ else ++ pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); ++ ++ if(pEntry!=NULL) ++ { ++ pEntry->rssi_stat.CCK_Pkt_Cnt = 0; ++ pEntry->rssi_stat.OFDM_Pkt_Cnt = 0; ++ for(j=0; j<2; j++) ++ { ++ pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] = 0; ++ pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; ++ } ++ } ++ else ++ break; ++ } ++} ++ ++ ++ ++ ++ ++VOID ++odm_CCKTXPathDiversityCallback( ++ PRT_TIMER pTimer ++) ++{ ++#if USE_WORKITEM ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++#endif ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++#if USE_WORKITEM ++ PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); ++#else ++ odm_PathDiversityAfterLink_92C(Adapter); ++#endif ++#else ++ PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); ++#endif ++ ++} ++ ++ ++VOID ++odm_CCKTXPathDiversityWorkItemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER Adapter = (PADAPTER)pContext; ++ ++ odm_CCKTXPathDiversity_92C(Adapter); ++} ++ ++// ++// 20100514 Luke/Joseph: ++// Callback function for 500ms antenna test trying. ++// ++VOID ++odm_PathDivChkAntSwitchCallback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ ++#if USE_WORKITEM ++ PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); ++#else ++ odm_PathDivChkAntSwitch(pDM_Odm); ++#endif ++#else ++ PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); ++#endif ++ ++//odm_SwAntDivChkAntSwitch(Adapter, SWAW_STEP_DETERMINE); ++ ++} ++ ++ ++VOID ++odm_PathDivChkAntSwitchWorkitemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ odm_PathDivChkAntSwitch(pDM_Odm); ++} ++ ++ ++ //MAC0_ACCESS_PHY1 ++ ++// 2011-06-22 Neil Chen & Gary Hsin ++// Refer to Jr.Luke's SW ANT DIV ++// 92D Path Diversity Main function ++// refer to 88C software antenna diversity ++// ++VOID ++odm_PathDivChkAntSwitch( ++ PDM_ODM_T pDM_Odm ++ //PADAPTER Adapter, ++ //u1Byte Step ++) ++{ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ s4Byte curRSSI=100, RSSI_A, RSSI_B; ++ u1Byte nextAntenna=AUX_ANT; ++ static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; ++ u8Byte curTxOkCnt, curRxOkCnt; ++ static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; ++ u8Byte CurByteCnt=0, PreByteCnt=0; ++ static u1Byte TrafficLoad = TRAFFIC_LOW; ++ u1Byte Score_A=0, Score_B=0; ++ u1Byte i=0x0; ++ // Neil Chen ++ static u1Byte pathdiv_para=0x0; ++ static u1Byte switchfirsttime=0x00; ++ // u1Byte regB33 = (u1Byte) PHY_QueryBBReg(Adapter, 0xB30,BIT27); ++ u1Byte regB33 = (u1Byte)ODM_GetBBReg(pDM_Odm, PATHDIV_REG, BIT27); ++ ++ ++ //u1Byte reg637 =0x0; ++ static u1Byte fw_value=0x0; ++ //u8Byte curTxOkCnt_tmp, curRxOkCnt_tmp; ++ PADAPTER BuddyAdapter = Adapter->BuddyAdapter; // another adapter MAC ++ // Path Diversity //Neil Chen--2011--06--22 ++ ++ //u1Byte PathDiv_Trigger = (u1Byte) PHY_QueryBBReg(Adapter, 0xBA0,BIT31); ++ u1Byte PathDiv_Trigger = (u1Byte) ODM_GetBBReg(pDM_Odm, PATHDIV_TRI,BIT31); ++ u1Byte PathDiv_Enable = pHalData->bPathDiv_Enable; ++ ++ ++ //DbgPrint("Path Div PG Value:%x \n",PathDiv_Enable); ++ if((BuddyAdapter==NULL)||(!PathDiv_Enable)||(PathDiv_Trigger)||(pHalData->CurrentBandType == BAND_ON_2_4G)) ++ { ++ return; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD,("===================>odm_PathDivChkAntSwitch()\n")); ++ ++ // The first time to switch path excluding 2nd, 3rd, ....etc.... ++ if(switchfirsttime==0) ++ { ++ if(regB33==0) ++ { ++ pDM_SWAT_Table->CurAntenna = MAIN_ANT; // Default MAC0_5G-->Path A (current antenna) ++ } ++ } ++ ++ // Condition that does not need to use antenna diversity. ++ if(pDM_Odm->SupportICType != ODM_RTL8192D) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDiversityMechanims(): No PathDiv Mechanism.\n")); ++ return; ++ } ++ ++ // Radio off: Status reset to default and return. ++ if(pHalData->eRFPowerState==eRfOff) ++ { ++ //ODM_SwAntDivRestAfterLink(Adapter); ++ return; ++ } ++ ++ /* ++ // Handling step mismatch condition. ++ // Peak step is not finished at last time. Recover the variable and check again. ++ if( Step != pDM_SWAT_Table->try_flag ) ++ { ++ ODM_SwAntDivRestAfterLink(Adapter); ++ } */ ++ ++ if(pDM_SWAT_Table->try_flag == 0xff) ++ { ++ // Select RSSI checking target ++ if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) ++ { ++ // Target: Infrastructure mode AP. ++ pHalData->RSSI_target = NULL; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDivMechanism(): RSSI_target is DEF AP!\n")); ++ } ++ else ++ { ++ u1Byte index = 0; ++ PRT_WLAN_STA pEntry = NULL; ++ PADAPTER pTargetAdapter = NULL; ++ ++ if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) ++ { ++ // Target: AP/IBSS peer. ++ pTargetAdapter = Adapter; ++ } ++ else if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) ++ { ++ // Target: VWIFI peer. ++ pTargetAdapter = GetFirstExtAdapter(Adapter); ++ } ++ ++ if(pTargetAdapter != NULL) ++ { ++ for(index=0; indexbAssociated) ++ break; ++ } ++ } ++ } ++ ++ if(pEntry == NULL) ++ { ++ ODM_PathDivRestAfterLink(pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); ++ return; ++ } ++ else ++ { ++ pHalData->RSSI_target = pEntry; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); ++ } ++ } ++ ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_cnt_B = 0; ++ pDM_SWAT_Table->try_flag = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); ++ return; ++ } ++ else ++ { ++ // 1st step ++ curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; ++ curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; ++ lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; ++ lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; ++ ++ if(pDM_SWAT_Table->try_flag == 1) // Training State ++ { ++ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) ++ { ++ TXByteCnt_A += curTxOkCnt; ++ RXByteCnt_A += curRxOkCnt; ++ } ++ else ++ { ++ TXByteCnt_B += curTxOkCnt; ++ RXByteCnt_B += curRxOkCnt; ++ } ++ ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; ++ pDM_SWAT_Table->RSSI_Trying--; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); ++ if(pDM_SWAT_Table->RSSI_Trying == 0) ++ { ++ CurByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_A+RXByteCnt_A) : (TXByteCnt_B+RXByteCnt_B); ++ PreByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_B+RXByteCnt_B) : (TXByteCnt_A+RXByteCnt_A); ++ ++ if(TrafficLoad == TRAFFIC_HIGH) ++ { ++ //CurByteCnt = PlatformDivision64(CurByteCnt, 9); ++ PreByteCnt =PreByteCnt*9; ++ } ++ else if(TrafficLoad == TRAFFIC_LOW) ++ { ++ //CurByteCnt = PlatformDivision64(CurByteCnt, 2); ++ PreByteCnt =PreByteCnt*2; ++ } ++ if(pHalData->RSSI_cnt_A > 0) ++ RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; ++ else ++ RSSI_A = 0; ++ if(pHalData->RSSI_cnt_B > 0) ++ RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; ++ else ++ RSSI_B = 0; ++ curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; ++ pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_B : RSSI_A; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", ++ (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", ++ RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); ++ } ++ ++ } ++ else // try_flag=0 ++ { ++ ++ if(pHalData->RSSI_cnt_A > 0) ++ RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; ++ else ++ RSSI_A = 0; ++ if(pHalData->RSSI_cnt_B > 0) ++ RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; ++ else ++ RSSI_B = 0; ++ curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; ++ pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == MAIN_ANT)? RSSI_A : RSSI_B; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", ++ (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", ++ RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); ++ } ++ ++ //1 Trying State ++ if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) ++ { ++ ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = TP_MODE")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:CurByteCnt = %"i64fmt"d,", CurByteCnt)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:PreByteCnt = %"i64fmt"d\n",PreByteCnt)); ++ if(CurByteCnt < PreByteCnt) ++ { ++ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) ++ pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; ++ else ++ pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; ++ } ++ else ++ { ++ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) ++ pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; ++ else ++ pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; ++ } ++ for (i= 0; i<8; i++) ++ { ++ if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) ++ Score_A++; ++ else ++ Score_B++; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Score_A=%d, Score_B=%d\n", Score_A, Score_B)); ++ ++ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) ++ { ++ nextAntenna = (Score_A >= Score_B)?MAIN_ANT:AUX_ANT; ++ } ++ else ++ { ++ nextAntenna = (Score_B >= Score_A)?AUX_ANT:MAIN_ANT; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: nextAntenna=%s\n",(nextAntenna==MAIN_ANT)?"MAIN":"AUX")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: preAntenna= %s, curAntenna= %s \n", ++ (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); ++ ++ if(nextAntenna != pDM_SWAT_Table->CurAntenna) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Switch back to another antenna")); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: current anntena is good\n")); ++ } ++ } ++ ++ ++ if(pDM_SWAT_Table->TestMode == RSSI_MODE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = RSSI_MODE")); ++ pDM_SWAT_Table->SelectAntennaMap=0xAA; ++ if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna ++ { ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: Switch back to another antenna")); ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)?AUX_ANT : MAIN_ANT; ++ } ++ else // current anntena is good ++ { ++ nextAntenna =pDM_SWAT_Table->CurAntenna; ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: current anntena is good\n")); ++ } ++ } ++ ++ pDM_SWAT_Table->try_flag = 0; ++ pHalData->RSSI_sum_A = 0; ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_sum_B = 0; ++ pHalData->RSSI_cnt_B = 0; ++ TXByteCnt_A = 0; ++ TXByteCnt_B = 0; ++ RXByteCnt_A = 0; ++ RXByteCnt_B = 0; ++ ++ } ++ ++ //1 Normal State ++ else if(pDM_SWAT_Table->try_flag == 0) ++ { ++ if(TrafficLoad == TRAFFIC_HIGH) ++ { ++ if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) ++ TrafficLoad = TRAFFIC_HIGH; ++ else ++ TrafficLoad = TRAFFIC_LOW; ++ } ++ else if(TrafficLoad == TRAFFIC_LOW) ++ { ++ if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) ++ TrafficLoad = TRAFFIC_HIGH; ++ else ++ TrafficLoad = TRAFFIC_LOW; ++ } ++ if(TrafficLoad == TRAFFIC_HIGH) ++ pDM_SWAT_Table->bTriggerAntennaSwitch = 0; ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); ++ ++ //Prepare To Try Antenna ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; ++ pDM_SWAT_Table->try_flag = 1; ++ if((curRxOkCnt+curTxOkCnt) > 1000) ++ { ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ pDM_SWAT_Table->RSSI_Trying = 4; ++#else ++ pDM_SWAT_Table->RSSI_Trying = 2; ++#endif ++ pDM_SWAT_Table->TestMode = TP_MODE; ++ } ++ else ++ { ++ pDM_SWAT_Table->RSSI_Trying = 2; ++ pDM_SWAT_Table->TestMode = RSSI_MODE; ++ ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); ++ pHalData->RSSI_sum_A = 0; ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_sum_B = 0; ++ pHalData->RSSI_cnt_B = 0; ++ } // end of try_flag=0 ++ } ++ ++ //1 4.Change TRX antenna ++ if(nextAntenna != pDM_SWAT_Table->CurAntenna) ++ { ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Change TX Antenna!\n ")); ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); for 88C ++ if(nextAntenna==MAIN_ANT) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH A\n ")); ++ pathdiv_para = 0x02; //02 to switchback to RF path A ++ fw_value = 0x03; ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); ++#else ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); ++#endif ++ } ++ else if(nextAntenna==AUX_ANT) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH B\n ")); ++ if(switchfirsttime==0) // First Time To Enter Path Diversity ++ { ++ switchfirsttime=0x01; ++ pathdiv_para = 0x00; ++ fw_value=0x00; // to backup RF Path A Releated Registers ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); ++#else ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); ++ //for(u1Byte n=0; n<80,n++) ++ //{ ++ //delay_us(500); ++ ODM_delay_ms(500); ++ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); ++ ++ fw_value=0x01; // to backup RF Path A Releated Registers ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: FIRST TIME To DO PATH SWITCH!\n ")); ++ } ++ else ++ { ++ pathdiv_para = 0x01; ++ fw_value = 0x02; ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); ++#else ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); ++#endif ++ } ++ } ++ // odm_PathDiversity_8192D(Adapter, pathdiv_para); ++ } ++ ++ //1 5.Reset Statistics ++ pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; ++ pDM_SWAT_Table->CurAntenna = nextAntenna; ++ pDM_SWAT_Table->PreRSSI = curRSSI; ++ ++ //1 6.Set next timer ++ ++ if(pDM_SWAT_Table->RSSI_Trying == 0) ++ return; ++ ++ if(pDM_SWAT_Table->RSSI_Trying%2 == 0) ++ { ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ if(TrafficLoad == TRAFFIC_HIGH) ++ { ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 10 ); //ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 10 ms\n")); ++#else ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 20 ); //ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 20 ms\n")); ++#endif ++ } ++ else if(TrafficLoad == TRAFFIC_LOW) ++ { ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 50 ); //ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 50 ms\n")); ++ } ++ } ++ else // TestMode == RSSI_MODE ++ { ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 500 ms\n")); ++ } ++ } ++ else ++ { ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ if(TrafficLoad == TRAFFIC_HIGH) ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 90 ); //ms ++ //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 90 ms\n")); ++#else ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 180); //ms ++#endif ++ else if(TrafficLoad == TRAFFIC_LOW) ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 100 ); //ms ++ } ++ else ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms ++ } ++} ++ ++ ++ ++VOID ++ODM_CCKPathDiversityChkPerPktRssi( ++ PADAPTER Adapter, ++ BOOLEAN bIsDefPort, ++ BOOLEAN bMatchBSSID, ++ PRT_WLAN_STA pEntry, ++ PRT_RFD pRfd, ++ pu1Byte pDesc ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BOOLEAN bCount = FALSE; ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ //BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE_92C(pDesc); ++#if DEV_BUS_TYPE != RT_SDIO_INTERFACE ++ BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE(Adapter, pDesc); ++#else //below code would be removed if we have verified SDIO ++ BOOLEAN isCCKrate = IS_HARDWARE_TYPE_8188E(Adapter) ? RX_HAL_IS_CCK_RATE_88E(pDesc) : RX_HAL_IS_CCK_RATE_92C(pDesc); ++#endif ++ ++ if ((pHalData->PathDivCfg != 1)) ++ return; ++ ++ if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) ++ bCount = TRUE; ++ else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) ++ bCount = TRUE; ++ ++ if(bCount && isCCKrate) ++ { ++ if(pDM_PDTable->TrainingState == 1 ) ++ { ++ if(pEntry) ++ { ++ if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[0] != 0) ++ pEntry->rssi_stat.RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; ++ pEntry->rssi_stat.RSSI_CCK_Path_cnt[0]++; ++ } ++ else ++ { ++ if(pDM_PDTable->RSSI_CCK_Path_cnt[0] != 0) ++ pDM_PDTable->RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; ++ pDM_PDTable->RSSI_CCK_Path_cnt[0]++; ++ } ++ } ++ else if(pDM_PDTable->TrainingState == 2 ) ++ { ++ if(pEntry) ++ { ++ if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[1] != 0) ++ pEntry->rssi_stat.RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; ++ pEntry->rssi_stat.RSSI_CCK_Path_cnt[1]++; ++ } ++ else ++ { ++ if(pDM_PDTable->RSSI_CCK_Path_cnt[1] != 0) ++ pDM_PDTable->RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; ++ pDM_PDTable->RSSI_CCK_Path_cnt[1]++; ++ } ++ } ++ } ++} ++ ++ ++ ++ ++//Neil Chen---2011--06--22 ++//----92D Path Diversity----// ++//#ifdef PathDiv92D ++//================================== ++//3 Path Diversity ++//================================== ++// ++// 20100514 Luke/Joseph: ++// Add new function for antenna diversity after link. ++// This is the main function of antenna diversity after link. ++// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). ++// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. ++// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. ++// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just ++// listened on the air with the RSSI of original antenna. ++// It chooses the antenna with better RSSI. ++// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting ++// penalty to get next try. ++// ++// ++// 20100503 Joseph: ++// Add new function SwAntDivCheck8192C(). ++// This is the main function of Antenna diversity function before link. ++// Mainly, it just retains last scan result and scan again. ++// After that, it compares the scan result to see which one gets better RSSI. ++// It selects antenna with better receiving power and returns better scan result. ++// ++ ++ ++// ++// 20100514 Luke/Joseph: ++// This function is used to gather the RSSI information for antenna testing. ++// It selects the RSSI of the peer STA that we want to know. ++// ++VOID ++ODM_PathDivChkPerPktRssi( ++ PADAPTER Adapter, ++ BOOLEAN bIsDefPort, ++ BOOLEAN bMatchBSSID, ++ PRT_WLAN_STA pEntry, ++ PRT_RFD pRfd ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BOOLEAN bCount = FALSE; ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ ++ if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) ++ bCount = TRUE; ++ else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) ++ bCount = TRUE; ++ ++ if(bCount) ++ { ++ //1 RSSI for SW Antenna Switch ++ if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) ++ { ++ pHalData->RSSI_sum_A += pRfd->Status.RxPWDBAll; ++ pHalData->RSSI_cnt_A++; ++ } ++ else ++ { ++ pHalData->RSSI_sum_B += pRfd->Status.RxPWDBAll; ++ pHalData->RSSI_cnt_B++; ++ ++ } ++ } ++} ++ ++ ++// ++// 20100514 Luke/Joseph: ++// Add new function to reset antenna diversity state after link. ++// ++VOID ++ODM_PathDivRestAfterLink( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ PADAPTER Adapter=pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; ++ ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_cnt_B = 0; ++ pDM_SWAT_Table->try_flag = 0x0; // NOT 0xff ++ pDM_SWAT_Table->RSSI_Trying = 0; ++ pDM_SWAT_Table->SelectAntennaMap=0xAA; ++ pDM_SWAT_Table->CurAntenna = MAIN_ANT; ++} ++ ++ ++//================================================== ++//3 PathDiv End ++//================================================== ++ ++ ++VOID ++ODM_FillTXPathInTXDESC( ++ IN PADAPTER Adapter, ++ IN PRT_TCB pTcb, ++ IN pu1Byte pDesc ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u4Byte TXPath; ++ pPD_T pDM_PDTable = &Adapter->DM_PDTable; ++ ++ //2011.09.05 Add by Luke Lee for path diversity ++ if(pHalData->PathDivCfg == 1) ++ { ++ TXPath = (pDM_PDTable->OFDMTXPath >> pTcb->macId) & BIT0; ++ //RT_TRACE( COMP_INIT, DBG_LOUD, ("Fill TXDESC: macID=%d, TXPath=%d\n", pTcb->macId, TXPath)); ++ //SET_TX_DESC_TX_ANT_CCK(pDesc,TXPath); ++ if(TXPath == 0) ++ { ++ SET_TX_DESC_TX_ANTL_92C(pDesc,1); ++ SET_TX_DESC_TX_ANT_HT_92C(pDesc,1); ++ } ++ else ++ { ++ SET_TX_DESC_TX_ANTL_92C(pDesc,2); ++ SET_TX_DESC_TX_ANT_HT_92C(pDesc,2); ++ } ++ TXPath = (pDM_PDTable->CCKTXPath >> pTcb->macId) & BIT0; ++ if(TXPath == 0) ++ { ++ SET_TX_DESC_TX_ANT_CCK_92C(pDesc,1); ++ } ++ else ++ { ++ SET_TX_DESC_TX_ANT_CCK_92C(pDesc,2); ++ } ++ } ++} ++ ++//Only for MP //Neil Chen--2012--0502-- ++VOID ++odm_PathDivInit_92D( ++IN PDM_ODM_T pDM_Odm) ++{ ++ pPATHDIV_PARA pathIQK = &pDM_Odm->pathIQK; ++ ++ pathIQK->org_2g_RegC14=0x0; ++ pathIQK->org_2g_RegC4C=0x0; ++ pathIQK->org_2g_RegC80=0x0; ++ pathIQK->org_2g_RegC94=0x0; ++ pathIQK->org_2g_RegCA0=0x0; ++ pathIQK->org_5g_RegC14=0x0; ++ pathIQK->org_5g_RegCA0=0x0; ++ pathIQK->org_5g_RegE30=0x0; ++ pathIQK->swt_2g_RegC14=0x0; ++ pathIQK->swt_2g_RegC4C=0x0; ++ pathIQK->swt_2g_RegC80=0x0; ++ pathIQK->swt_2g_RegC94=0x0; ++ pathIQK->swt_2g_RegCA0=0x0; ++ pathIQK->swt_5g_RegC14=0x0; ++ pathIQK->swt_5g_RegCA0=0x0; ++ pathIQK->swt_5g_RegE30=0x0; ++ ++} ++ ++ ++u1Byte ++odm_SwAntDivSelectScanChnl( ++ IN PADAPTER Adapter ++ ) ++{ ++#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ u2Byte i; ++ u1Byte j, ScanChannel = 0, ChannelNum = 0; ++ PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); ++ u1Byte EachChannelSTAs[MAX_SCAN_CHANNEL_NUM] = {0}; ++ ++ if(pMgntInfo->tmpNumBssDesc == 0) ++ return 0; ++ ++ for(i = 0; i < pMgntInfo->tmpNumBssDesc; i++) ++ { ++ ChannelNum = pMgntInfo->tmpbssDesc[i].ChannelNumber; ++ for(j = 0; j < pChannelList->ChannelLen; j++) ++ { ++ if(pChannelList->ChnlListEntry[j].ChannelNum == ChannelNum) ++ { ++ EachChannelSTAs[j]++; ++ break; ++ } ++ } ++ } ++ ++ for(i = 0; i < MAX_SCAN_CHANNEL_NUM; i++) ++ { ++ if(EachChannelSTAs[i] > EachChannelSTAs[ScanChannel]) ++ ScanChannel = (u1Byte)i; ++ } ++ ++ if(EachChannelSTAs[ScanChannel] == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("odm_SwAntDivSelectScanChnl(): Scan List is empty.\n")); ++ return 0; ++ } ++ ++ ScanChannel = pChannelList->ChnlListEntry[ScanChannel].ChannelNum; ++ ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ++ ("odm_SwAntDivSelectScanChnl(): Channel (( %d )) is select as scan channel.\n", ScanChannel)); ++ ++ return ScanChannel; ++#else ++ return 0; ++#endif ++} ++ ++ ++VOID ++odm_SwAntDivConstructScanChnl( ++ IN PADAPTER Adapter, ++ IN u1Byte ScanChnl ++ ) ++{ ++ ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ if(ScanChnl == 0) ++ { ++ u1Byte i; ++ PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); ++ ++ // 20100519 Joseph: Original antenna scanned nothing. ++ // Test antenna shall scan all channel with half period in this condition. ++ ++ RT_TRACE_F(COMP_SCAN, DBG_TRACE, (" RT_CHNL_LIST_ACTION_CONSTRUCT chnl %d \n", ScanChnl)); ++ ++ RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, NULL, NULL); ++ for(i = 0; i < pChannelList->ChannelLen; i++) ++ pChannelList->ChnlListEntry[i].ScanPeriod /= 2; ++ } ++ else ++ { ++ // The using of this CustomizedScanRequest is a trick to rescan the two channels ++ // under the NORMAL scanning process. It will not affect MGNT_INFO.CustomizedScanRequest. ++ CUSTOMIZED_SCAN_REQUEST CustomScanReq; ++ ++ CustomScanReq.bEnabled = TRUE; ++ CustomScanReq.Channels[0] = ScanChnl; ++ CustomScanReq.Channels[1] = pMgntInfo->dot11CurrentChannelNumber; ++ CustomScanReq.nChannels = 2; ++ CustomScanReq.ScanType = SCAN_ACTIVE; ++ CustomScanReq.Duration = DEFAULT_PASSIVE_SCAN_PERIOD; ++ ++ RT_TRACE_F(COMP_SCAN, DBG_TRACE, (" RT_CHNL_LIST_ACTION_CONSTRUCT chnl %d \n", ScanChnl)); ++ ++ RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, &CustomScanReq, NULL); ++ } ++ ++} ++#else ++ ++VOID ++odm_PathDivChkAntSwitchCallback( ++ PRT_TIMER pTimer ++) ++{ ++} ++ ++VOID ++odm_PathDivChkAntSwitchWorkitemCallback( ++ IN PVOID pContext ++ ) ++{ ++} ++ ++VOID ++odm_CCKTXPathDiversityCallback( ++ PRT_TIMER pTimer ++) ++{ ++} ++ ++VOID ++odm_CCKTXPathDiversityWorkItemCallback( ++ IN PVOID pContext ++ ) ++{ ++} ++u1Byte ++odm_SwAntDivSelectScanChnl( ++ IN PADAPTER Adapter ++ ) ++{ ++ return 0; ++} ++VOID ++odm_SwAntDivConstructScanChnl( ++ IN PADAPTER Adapter, ++ IN u1Byte ScanChnl ++ ) ++{ ++} ++ ++ ++#endif ++ ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_pathdiv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_pathdiv.h +new file mode 100644 +index 0000000..020288e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_pathdiv.h +@@ -0,0 +1,324 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMPATHDIV_H__ ++#define __PHYDMPATHDIV_H__ ++/*#define PATHDIV_VERSION "2.0" //2014.11.04*/ ++#define PATHDIV_VERSION "3.0" /*2015.01.13 Dino*/ ++ ++#if(defined(CONFIG_PATH_DIVERSITY)) ++#define USE_PATH_A_AS_DEFAULT_ANT //for 8814 dynamic TX path selection ++ ++#define NUM_RESET_DTP_PERIOD 5 ++#define ANT_DECT_RSSI_TH 3 ++ ++#define PATH_A 1 ++#define PATH_B 2 ++#define PATH_C 3 ++#define PATH_D 4 ++ ++#define PHYDM_AUTO_PATH 0 ++#define PHYDM_FIX_PATH 1 ++ ++#define NUM_CHOOSE2_FROM4 6 ++#define NUM_CHOOSE3_FROM4 4 ++ ++ ++#define PHYDM_A BIT0 ++#define PHYDM_B BIT1 ++#define PHYDM_C BIT2 ++#define PHYDM_D BIT3 ++#define PHYDM_AB (BIT0 | BIT1) // 0 ++#define PHYDM_AC (BIT0 | BIT2) // 1 ++#define PHYDM_AD (BIT0 | BIT3) // 2 ++#define PHYDM_BC (BIT1 | BIT2) // 3 ++#define PHYDM_BD (BIT1 | BIT3) // 4 ++#define PHYDM_CD (BIT2 | BIT3) // 5 ++ ++#define PHYDM_ABC (BIT0 | BIT1 | BIT2) /* 0*/ ++#define PHYDM_ABD (BIT0 | BIT1 | BIT3) /* 1*/ ++#define PHYDM_ACD (BIT0 | BIT2 | BIT3) /* 2*/ ++#define PHYDM_BCD (BIT1 | BIT2 | BIT3) /* 3*/ ++ ++#define PHYDM_ABCD (BIT0 | BIT1 | BIT2 | BIT3) ++ ++ ++typedef enum dtp_state ++{ ++ PHYDM_DTP_INIT=1, ++ PHYDM_DTP_RUNNING_1 ++ ++}PHYDM_DTP_STATE; ++ ++typedef enum path_div_type ++{ ++ PHYDM_2R_PATH_DIV = 1, ++ PHYDM_4R_PATH_DIV = 2 ++}PHYDM_PATH_DIV_TYPE; ++ ++VOID ++phydm_process_rssi_for_path_div( ++ IN OUT PVOID pDM_VOID, ++ IN PVOID p_phy_info_void, ++ IN PVOID p_pkt_info_void ++ ); ++ ++typedef struct _ODM_PATH_DIVERSITY_ ++{ ++ u1Byte RespTxPath; ++ u1Byte PathSel[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte PathA_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u4Byte PathB_Sum[ODM_ASSOCIATE_ENTRY_NUM]; ++ u2Byte PathA_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ u2Byte PathB_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; ++ u1Byte path_div_type; ++ #if RTL8814A_SUPPORT ++ ++ u4Byte path_a_sum_all; ++ u4Byte path_b_sum_all; ++ u4Byte path_c_sum_all; ++ u4Byte path_d_sum_all; ++ ++ u4Byte path_a_cnt_all; ++ u4Byte path_b_cnt_all; ++ u4Byte path_c_cnt_all; ++ u4Byte path_d_cnt_all; ++ ++ u1Byte dtp_period; ++ BOOLEAN bBecomeLinked; ++ BOOLEAN is_u3_mode; ++ u1Byte num_tx_path; ++ u1Byte default_path; ++ u1Byte num_candidate; ++ u1Byte ant_candidate_1; ++ u1Byte ant_candidate_2; ++ u1Byte ant_candidate_3; ++ u1Byte dtp_state; ++ u1Byte dtp_check_patha_counter; ++ BOOLEAN fix_path_bfer; ++ u1Byte search_space_2[NUM_CHOOSE2_FROM4]; ++ u1Byte search_space_3[NUM_CHOOSE3_FROM4]; ++ ++ u1Byte pre_tx_path; ++ u1Byte use_path_a_as_default_ant; ++ BOOLEAN is_pathA_exist; ++ ++ #endif ++}PATHDIV_T, *pPATHDIV_T; ++ ++ ++#endif //#if(defined(CONFIG_PATH_DIVERSITY)) ++ ++VOID ++phydm_c2h_dtp_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++ ); ++ ++VOID ++odm_PathDiversityInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_PathDiversity( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_pathdiv_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value, ++ IN u4Byte *_used, ++ OUT char *output, ++ IN u4Byte *_out_len ++ ); ++ ++ ++ ++//1 [OLD IC]-------------------------------------------------------------------------------- ++ ++ ++ ++ ++ ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ++//#define PATHDIV_ENABLE 1 ++#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi ++#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C ++ ++ ++ ++ ++typedef struct _PathDiv_Parameter_define_ ++{ ++ u4Byte org_5g_RegE30; ++ u4Byte org_5g_RegC14; ++ u4Byte org_5g_RegCA0; ++ u4Byte swt_5g_RegE30; ++ u4Byte swt_5g_RegC14; ++ u4Byte swt_5g_RegCA0; ++ //for 2G IQK information ++ u4Byte org_2g_RegC80; ++ u4Byte org_2g_RegC4C; ++ u4Byte org_2g_RegC94; ++ u4Byte org_2g_RegC14; ++ u4Byte org_2g_RegCA0; ++ ++ u4Byte swt_2g_RegC80; ++ u4Byte swt_2g_RegC4C; ++ u4Byte swt_2g_RegC94; ++ u4Byte swt_2g_RegC14; ++ u4Byte swt_2g_RegCA0; ++}PATHDIV_PARA,*pPATHDIV_PARA; ++ ++VOID ++odm_PathDiversityInit_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_2TPathDiversityInit_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_1TPathDiversityInit_92C( ++ IN PADAPTER Adapter ++ ); ++ ++BOOLEAN ++odm_IsConnected_92C( ++ IN PADAPTER Adapter ++ ); ++ ++BOOLEAN ++ODM_PathDiversityBeforeLink92C( ++ //IN PADAPTER Adapter ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++odm_PathDiversityAfterLink_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_SetRespPath_92C( ++ IN PADAPTER Adapter, ++ IN u1Byte DefaultRespPath ++ ); ++ ++VOID ++odm_OFDMTXPathDiversity_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_CCKTXPathDiversity_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_ResetPathDiversity_92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_CCKTXPathDiversityCallback( ++ PRT_TIMER pTimer ++ ); ++ ++VOID ++odm_CCKTXPathDiversityWorkItemCallback( ++ IN PVOID pContext ++ ); ++ ++VOID ++odm_PathDivChkAntSwitchCallback( ++ PRT_TIMER pTimer ++ ); ++ ++VOID ++odm_PathDivChkAntSwitchWorkitemCallback( ++ IN PVOID pContext ++ ); ++ ++ ++VOID ++odm_PathDivChkAntSwitch( ++ PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_CCKPathDiversityChkPerPktRssi( ++ PADAPTER Adapter, ++ BOOLEAN bIsDefPort, ++ BOOLEAN bMatchBSSID, ++ PRT_WLAN_STA pEntry, ++ PRT_RFD pRfd, ++ pu1Byte pDesc ++ ); ++ ++VOID ++ODM_PathDivChkPerPktRssi( ++ PADAPTER Adapter, ++ BOOLEAN bIsDefPort, ++ BOOLEAN bMatchBSSID, ++ PRT_WLAN_STA pEntry, ++ PRT_RFD pRfd ++ ); ++ ++VOID ++ODM_PathDivRestAfterLink( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++VOID ++ODM_FillTXPathInTXDESC( ++ IN PADAPTER Adapter, ++ IN PRT_TCB pTcb, ++ IN pu1Byte pDesc ++ ); ++ ++VOID ++odm_PathDivInit_92D( ++ IN PDM_ODM_T pDM_Odm ++ ); ++ ++u1Byte ++odm_SwAntDivSelectScanChnl( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_SwAntDivConstructScanChnl( ++ IN PADAPTER Adapter, ++ IN u1Byte ScanChnl ++ ); ++ ++ #endif //#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ++ ++ #endif //#ifndef __ODMPATHDIV_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ap.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ap.c +new file mode 100644 +index 0000000..4f86239 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ap.c +@@ -0,0 +1,1050 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if !defined(_OUTSRC_COEXIST) ++//============================================================ ++// Global var ++//============================================================ ++ ++ ++u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE_92D] = { ++ 0x0b40002d, // 0, -15.0dB ++ 0x0c000030, // 1, -14.5dB ++ 0x0cc00033, // 2, -14.0dB ++ 0x0d800036, // 3, -13.5dB ++ 0x0e400039, // 4, -13.0dB ++ 0x0f00003c, // 5, -12.5dB ++ 0x10000040, // 6, -12.0dB ++ 0x11000044, // 7, -11.5dB ++ 0x12000048, // 8, -11.0dB ++ 0x1300004c, // 9, -10.5dB ++ 0x14400051, // 10, -10.0dB ++ 0x15800056, // 11, -9.5dB ++ 0x16c0005b, // 12, -9.0dB ++ 0x18000060, // 13, -8.5dB ++ 0x19800066, // 14, -8.0dB ++ 0x1b00006c, // 15, -7.5dB ++ 0x1c800072, // 16, -7.0dB ++ 0x1e400079, // 17, -6.5dB ++ 0x20000080, // 18, -6.0dB ++ 0x22000088, // 19, -5.5dB ++ 0x24000090, // 20, -5.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x288000a2, // 22, -4.0dB ++ 0x2ac000ab, // 23, -3.5dB ++ 0x2d4000b5, // 24, -3.0dB ++ 0x300000c0, // 25, -2.5dB ++ 0x32c000cb, // 26, -2.0dB ++ 0x35c000d7, // 27, -1.5dB ++ 0x390000e4, // 28, -1.0dB ++ 0x3c8000f2, // 29, -0.5dB ++ 0x40000100, // 30, +0dB ++ 0x43c0010f, // 31, +0.5dB ++ 0x47c0011f, // 32, +1.0dB ++ 0x4c000130, // 33, +1.5dB ++ 0x50800142, // 34, +2.0dB ++ 0x55400155, // 35, +2.5dB ++ 0x5a400169, // 36, +3.0dB ++ 0x5fc0017f, // 37, +3.5dB ++ 0x65400195, // 38, +4.0dB ++ 0x6b8001ae, // 39, +4.5dB ++ 0x71c001c7, // 40, +5.0dB ++ 0x788001e2, // 41, +5.5dB ++ 0x7f8001fe // 42, +6.0dB ++}; ++ ++u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = { ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB ++ {0x1c, 0x1a, 0x18, 0x12, 0x0e, 0x08, 0x04, 0x02}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= { ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB ++ {0x1c, 0x1a, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB ++}; ++ ++u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { ++ 0x0b40002d, // 0, -15.0dB ++ 0x0c000030, // 1, -14.5dB ++ 0x0cc00033, // 2, -14.0dB ++ 0x0d800036, // 3, -13.5dB ++ 0x0e400039, // 4, -13.0dB ++ 0x0f00003c, // 5, -12.5dB ++ 0x10000040, // 6, -12.0dB ++ 0x11000044, // 7, -11.5dB ++ 0x12000048, // 8, -11.0dB ++ 0x1300004c, // 9, -10.5dB ++ 0x14400051, // 10, -10.0dB ++ 0x15800056, // 11, -9.5dB ++ 0x16c0005b, // 12, -9.0dB ++ 0x18000060, // 13, -8.5dB ++ 0x19800066, // 14, -8.0dB ++ 0x1b00006c, // 15, -7.5dB ++ 0x1c800072, // 16, -7.0dB ++ 0x1e400079, // 17, -6.5dB ++ 0x20000080, // 18, -6.0dB ++ 0x22000088, // 19, -5.5dB ++ 0x24000090, // 20, -5.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x288000a2, // 22, -4.0dB ++ 0x2ac000ab, // 23, -3.5dB ++ 0x2d4000b5, // 24, -3.0dB ++ 0x300000c0, // 25, -2.5dB ++ 0x32c000cb, // 26, -2.0dB ++ 0x35c000d7, // 27, -1.5dB ++ 0x390000e4, // 28, -1.0dB ++ 0x3c8000f2, // 29, -0.5dB ++ 0x40000100, // 30, +0dB ++ 0x43c0010f, // 31, +0.5dB ++ 0x47c0011f, // 32, +1.0dB ++ 0x4c000130, // 33, +1.5dB ++ 0x50800142, // 34, +2.0dB ++ 0x55400155, // 35, +2.5dB ++ 0x5a400169, // 36, +3.0dB ++ 0x5fc0017f, // 37, +3.5dB ++ 0x65400195, // 38, +4.0dB ++ 0x6b8001ae, // 39, +4.5dB ++ 0x71c001c7, // 40, +5.0dB ++ 0x788001e2, // 41, +5.5dB ++ 0x7f8001fe // 42, +6.0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB ++ {0x1c, 0x1a, 0x18, 0x12, 0x0e, 0x08, 0x04, 0x02}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= { ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB ++ {0x1c, 0x1a, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB ++}; ++ ++u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16] = { ++{0x16, 0x15, 0x13, 0x10, 0xD, 0x9, 0x6, 0x3, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 0 -16dB */ ++{0x18, 0x17, 0x15, 0x12, 0xE, 0xA, 0x7, 0x4, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 1 -15.5dB */ ++{0x1B, 0x1A, 0x18, 0x14, 0x10, 0xB, 0x7, 0x4, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 2 -15dB */ ++{0x1F, 0x1E, 0x1B, 0x17, 0x12, 0xD, 0x8, 0x5, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 3 -14.5dB */ ++{0x22, 0x21, 0x1E, 0x19, 0x14, 0xE, 0x9, 0x5, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 4 -14dB */ ++{0x26, 0x25, 0x22, 0x1C, 0x16, 0x10, 0xA, 0x6, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 5 -13.5dB */ ++{0x2B, 0x2A, 0x26, 0x20, 0x19, 0x12, 0xC, 0x7, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 6 -13dB */ ++{0x30, 0x2F, 0x2A, 0x24, 0x1C, 0x14, 0xD, 0x8, 0x4, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 7 -12.5dB */ ++{0x36, 0x34, 0x2F, 0x28, 0x1F, 0x17, 0xF, 0x9, 0x4, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 8 -12dB */ ++{0x3D, 0x3B, 0x35, 0x2D, 0x23, 0x19, 0x11, 0xA, 0x5, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 9 -11.5dB */ ++{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0xB, 0x5, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 10 -11dB */ ++{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0xC, 0x6, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 11 -10.5dB */ ++{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0xE, 0x6, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 12 -10dB */ ++{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0xF, 0x7, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 13 -9.5dB */ ++{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x8, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 14 -9dB */ ++{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x9, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 15 -8.5dB */ ++{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0xA, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 16 -8dB */ ++{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0xB, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 17 -7.5dB */ ++{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0xD, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 18 -7dB */ ++{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0xE, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 19 -6.5dB */ ++{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0} /* 20 -6dB */ ++}; ++ ++ ++#if 0 ++u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E] = { ++ /* Index0 6 dB */ 0x7fc001ff, ++ /* Index1 5.7dB */ 0x7b4001ed, ++ /* Index2 5.4dB */ 0x774001dd, ++ /* Index3 5.1dB */ 0x734001cd, ++ /* Index4 4.8dB */ 0x6f4001bd, ++ /* Index5 4.5dB */ 0x6b8001ae, ++ /* Index6 4.2dB */ 0x67c0019f, ++ /* Index7 3.9dB */ 0x64400191, ++ /* Index8 3.6dB */ 0x60c00183, ++ /* Index9 3.3dB */ 0x5d800176, ++ /* Index10 3 dB */ 0x5a80016a, ++ /* Index11 2.7dB */ 0x5740015d, ++ /* Index12 2.4dB */ 0x54400151, ++ /* Index13 2.1dB */ 0x51800146, ++ /* Index14 1.8dB */ 0x4ec0013b, ++ /* Index15 1.5dB */ 0x4c000130, ++ /* Index16 1.2dB */ 0x49800126, ++ /* Index17 0.9dB */ 0x4700011c, ++ /* Index18 0.6dB */ 0x44800112, ++ /* Index19 0.3dB */ 0x42000108, ++ /* Index20 0 dB */ 0x40000100, // 20 This is OFDM base index ++ /* Index21 -0.3dB */ 0x3dc000f7, ++ /* Index22 -0.6dB */ 0x3bc000ef, ++ /* Index23 -0.9dB */ 0x39c000e7, ++ /* Index24 -1.2dB */ 0x37c000df, ++ /* Index25 -1.5dB */ 0x35c000d7, ++ /* Index26 -1.8dB */ 0x340000d0, ++ /* Index27 -2.1dB */ 0x324000c9, ++ /* Index28 -2.4dB */ 0x308000c2, ++ /* Index29 -2.7dB */ 0x2f0000bc, ++ /* Index30 -3 dB */ 0x2d4000b5, ++ /* Index31 -3.3dB */ 0x2bc000af, ++ /* Index32 -3.6dB */ 0x2a4000a9, ++ /* Index33 -3.9dB */ 0x28c000a3, ++ /* Index34 -4.2dB */ 0x2780009e, ++ /* Index35 -4.5dB */ 0x26000098, ++ /* Index36 -4.8dB */ 0x24c00093, ++ /* Index37 -5.1dB */ 0x2380008e, ++ /* Index38 -5.4dB */ 0x22400089, ++ /* Index39 -5.7dB */ 0x21400085, ++ /* Index40 -6 dB */ 0x20000080, ++ /* Index41 -6.3dB */ 0x1f00007c, ++ /* Index42 -6.6dB */ 0x1e000078, ++ /* Index43 -6.9dB */ 0x1d000074, ++ /* Index44 -7.2dB */ 0x1c000070, ++ /* Index45 -7.5dB */ 0x1b00006c, ++ /* Index46 -7.8dB */ 0x1a000068, ++ /* Index47 -8.1dB */ 0x19400065, ++ /* Index48 -8.4dB */ 0x18400061, ++ /* Index49 -8.7dB */ 0x1780005e, ++ /* Index50 -9 dB */ 0x16c0005b, ++ /* Index51 -9.3dB */ 0x16000058, ++ /* Index52 -9.6dB */ 0x15400055, ++ /* Index53 -9.9dB */ 0x14800052 ++}; ++u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8] = { ++ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x1C , 0x12 , 0x08 , 0x04}, ++ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x1B , 0x11 , 0x08 , 0x04}, ++ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x1A , 0x11 , 0x07 , 0x04}, ++ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x19 , 0x10 , 0x07 , 0x04}, ++ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x18 , 0x10 , 0x07 , 0x03}, ++ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x18 , 0x0F , 0x07 , 0x03}, ++ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x17 , 0x0F , 0x06 , 0x03}, ++ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x16 , 0x0E , 0x06 , 0x03}, ++ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x15 , 0x0E , 0x06 , 0x03}, ++ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x14 , 0x0D , 0x06 , 0x03}, ++ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x14 , 0x0D , 0x06 , 0x03}, ++ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x13 , 0x0C , 0x05 , 0x03}, ++ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x12 , 0x0C , 0x05 , 0x03}, ++ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x12 , 0x0B , 0x05 , 0x03}, ++ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, ++ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, ++ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x10 , 0x0A , 0x05 , 0x02}, ++ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x10 , 0x0A , 0x04 , 0x02}, ++ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x0F , 0x0A , 0x04 , 0x02}, ++ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x0E , 0x09 , 0x04 , 0x02}, ++ /* Index20 -6.0dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x0E , 0x09 , 0x04 , 0x02}, // 20 This is CCK base index ++ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x0E , 0x09 , 0x04 , 0x02}, ++ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x0D , 0x08 , 0x04 , 0x02}, ++ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x0D , 0x08 , 0x04 , 0x02}, ++ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x0C , 0x08 , 0x03 , 0x02}, ++ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x0C , 0x08 , 0x03 , 0x02}, ++ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x0A , 0x07 , 0x03 , 0x01}, ++ /* Index30 -9.0dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, // 30 This is hp CCK base index ++ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, ++ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x09 , 0x06 , 0x03 , 0x01}, ++ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x09 , 0x06 , 0x03 , 0x01}, ++ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x09 , 0x06 , 0x02 , 0x01}, ++ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, ++ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, ++ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x05 , 0x03 , 0x02 , 0x01}, ++ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x04 , 0x03 , 0x01 , 0x01} ++}; ++u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8] = { ++ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index20 -6 dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index30 -9 dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00} ++}; ++#endif ++ ++#ifdef AP_BUILD_WORKAROUND ++ ++unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { ++ /* +6.0dB */ 0x7f8001fe, ++ /* +5.5dB */ 0x788001e2, ++ /* +5.0dB */ 0x71c001c7, ++ /* +4.5dB */ 0x6b8001ae, ++ /* +4.0dB */ 0x65400195, ++ /* +3.5dB */ 0x5fc0017f, ++ /* +3.0dB */ 0x5a400169, ++ /* +2.5dB */ 0x55400155, ++ /* +2.0dB */ 0x50800142, ++ /* +1.5dB */ 0x4c000130, ++ /* +1.0dB */ 0x47c0011f, ++ /* +0.5dB */ 0x43c0010f, ++ /* 0.0dB */ 0x40000100, ++ /* -0.5dB */ 0x3c8000f2, ++ /* -1.0dB */ 0x390000e4, ++ /* -1.5dB */ 0x35c000d7, ++ /* -2.0dB */ 0x32c000cb, ++ /* -2.5dB */ 0x300000c0, ++ /* -3.0dB */ 0x2d4000b5, ++ /* -3.5dB */ 0x2ac000ab, ++ /* -4.0dB */ 0x288000a2, ++ /* -4.5dB */ 0x26000098, ++ /* -5.0dB */ 0x24000090, ++ /* -5.5dB */ 0x22000088, ++ /* -6.0dB */ 0x20000080, ++ /* -6.5dB */ 0x1a00006c, ++ /* -7.0dB */ 0x1c800072, ++ /* -7.5dB */ 0x18000060, ++ /* -8.0dB */ 0x19800066, ++ /* -8.5dB */ 0x15800056, ++ /* -9.0dB */ 0x26c0005b, ++ /* -9.5dB */ 0x14400051, ++ /* -10.0dB */ 0x24400051, ++ /* -10.5dB */ 0x1300004c, ++ /* -11.0dB */ 0x12000048, ++ /* -11.5dB */ 0x11000044, ++ /* -12.0dB */ 0x10000040 ++}; ++#endif ++ ++#endif ++ ++ ++u1Byte DeltaSwingTableIdx_2GA_P_DEFAULT[DELTA_SWINGIDX_SIZE] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3 ++, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; ++u1Byte DeltaSwingTableIdx_2GA_N_DEFAULT[DELTA_SWINGIDX_SIZE] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4 ++, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; ++ ++ ++#ifdef CONFIG_WLAN_HAL_8192EE ++u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E] = { ++ /* Index0 6 dB */ 0x7fc001ff, ++ /* Index1 5.7dB */ 0x7b4001ed, ++ /* Index2 5.4dB */ 0x774001dd, ++ /* Index3 5.1dB */ 0x734001cd, ++ /* Index4 4.8dB */ 0x6f4001bd, ++ /* Index5 4.5dB */ 0x6b8001ae, ++ /* Index6 4.2dB */ 0x67c0019f, ++ /* Index7 3.9dB */ 0x64400191, ++ /* Index8 3.6dB */ 0x60c00183, ++ /* Index9 3.3dB */ 0x5d800176, ++ /* Index10 3 dB */ 0x5a80016a, ++ /* Index11 2.7dB */ 0x5740015d, ++ /* Index12 2.4dB */ 0x54400151, ++ /* Index13 2.1dB */ 0x51800146, ++ /* Index14 1.8dB */ 0x4ec0013b, ++ /* Index15 1.5dB */ 0x4c000130, ++ /* Index16 1.2dB */ 0x49800126, ++ /* Index17 0.9dB */ 0x4700011c, ++ /* Index18 0.6dB */ 0x44800112, ++ /* Index19 0.3dB */ 0x42000108, ++ /* Index20 0 dB */ 0x40000100, // 20 This is OFDM base index ++ /* Index21 -0.3dB */ 0x3dc000f7, ++ /* Index22 -0.6dB */ 0x3bc000ef, ++ /* Index23 -0.9dB */ 0x39c000e7, ++ /* Index24 -1.2dB */ 0x37c000df, ++ /* Index25 -1.5dB */ 0x35c000d7, ++ /* Index26 -1.8dB */ 0x340000d0, ++ /* Index27 -2.1dB */ 0x324000c9, ++ /* Index28 -2.4dB */ 0x308000c2, ++ /* Index29 -2.7dB */ 0x2f0000bc, ++ /* Index30 -3 dB */ 0x2d4000b5, ++ /* Index31 -3.3dB */ 0x2bc000af, ++ /* Index32 -3.6dB */ 0x2a4000a9, ++ /* Index33 -3.9dB */ 0x28c000a3, ++ /* Index34 -4.2dB */ 0x2780009e, ++ /* Index35 -4.5dB */ 0x26000098, ++ /* Index36 -4.8dB */ 0x24c00093, ++ /* Index37 -5.1dB */ 0x2380008e, ++ /* Index38 -5.4dB */ 0x22400089, ++ /* Index39 -5.7dB */ 0x21400085, ++ /* Index40 -6 dB */ 0x20000080, ++ /* Index41 -6.3dB */ 0x1f00007c, ++ /* Index42 -6.6dB */ 0x1e000078, ++ /* Index43 -6.9dB */ 0x1d000074, ++ /* Index44 -7.2dB */ 0x1c000070, ++ /* Index45 -7.5dB */ 0x1b00006c, ++ /* Index46 -7.8dB */ 0x1a000068, ++ /* Index47 -8.1dB */ 0x19400065, ++ /* Index48 -8.4dB */ 0x18400061, ++ /* Index49 -8.7dB */ 0x1780005e, ++ /* Index50 -9 dB */ 0x16c0005b, ++ /* Index51 -9.3dB */ 0x16000058, ++ /* Index52 -9.6dB */ 0x15400055, ++ /* Index53 -9.9dB */ 0x14800052 ++}; ++u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8] = { ++ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x1C , 0x12 , 0x08 , 0x04}, ++ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x1B , 0x11 , 0x08 , 0x04}, ++ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x1A , 0x11 , 0x07 , 0x04}, ++ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x19 , 0x10 , 0x07 , 0x04}, ++ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x18 , 0x10 , 0x07 , 0x03}, ++ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x18 , 0x0F , 0x07 , 0x03}, ++ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x17 , 0x0F , 0x06 , 0x03}, ++ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x16 , 0x0E , 0x06 , 0x03}, ++ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x15 , 0x0E , 0x06 , 0x03}, ++ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x14 , 0x0D , 0x06 , 0x03}, ++ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x14 , 0x0D , 0x06 , 0x03}, ++ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x13 , 0x0C , 0x05 , 0x03}, ++ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x12 , 0x0C , 0x05 , 0x03}, ++ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x12 , 0x0B , 0x05 , 0x03}, ++ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, ++ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x11 , 0x0B , 0x05 , 0x02}, ++ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x10 , 0x0A , 0x05 , 0x02}, ++ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x10 , 0x0A , 0x04 , 0x02}, ++ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x0F , 0x0A , 0x04 , 0x02}, ++ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x0E , 0x09 , 0x04 , 0x02}, ++ /* Index20 -6.0dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x0E , 0x09 , 0x04 , 0x02}, // 20 This is CCK base index ++ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x0E , 0x09 , 0x04 , 0x02}, ++ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x0D , 0x08 , 0x04 , 0x02}, ++ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x0D , 0x08 , 0x04 , 0x02}, ++ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x0C , 0x08 , 0x03 , 0x02}, ++ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x0C , 0x08 , 0x03 , 0x02}, ++ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x0B , 0x07 , 0x03 , 0x02}, ++ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x0A , 0x07 , 0x03 , 0x01}, ++ /* Index30 -9.0dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, // 30 This is hp CCK base index ++ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x0A , 0x06 , 0x03 , 0x01}, ++ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x09 , 0x06 , 0x03 , 0x01}, ++ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x09 , 0x06 , 0x03 , 0x01}, ++ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x09 , 0x06 , 0x02 , 0x01}, ++ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x08 , 0x05 , 0x02 , 0x01}, ++ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x07 , 0x05 , 0x02 , 0x01}, ++ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, ++ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x07 , 0x04 , 0x02 , 0x01}, ++ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x06 , 0x04 , 0x02 , 0x01}, ++ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x05 , 0x03 , 0x02 , 0x01}, ++ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x05 , 0x03 , 0x01 , 0x01}, ++ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x04 , 0x03 , 0x01 , 0x01} ++}; ++u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8] = { ++ /* Index0 0 dB */ {0x36, 0x34 , 0x2E , 0x26 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index1 -0.3dB */ {0x34, 0x32 , 0x2C , 0x25 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index2 -0.6dB */ {0x32, 0x30 , 0x2B , 0x23 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index3 -0.9dB */ {0x31, 0x2F , 0x29 , 0x22 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index4 -1.2dB */ {0x2F, 0x2D , 0x28 , 0x21 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index5 -1.5dB */ {0x2D, 0x2C , 0x27 , 0x20 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index6 -1.8dB */ {0x2C, 0x2A , 0x25 , 0x1F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index7 -2.1dB */ {0x2A, 0x29 , 0x24 , 0x1E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index8 -2.4dB */ {0x29, 0x27 , 0x23 , 0x1D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index9 -2.7dB */ {0x27, 0x26 , 0x22 , 0x1C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index10 -3 dB */ {0x26, 0x25 , 0x20 , 0x1B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index11 -3.3dB */ {0x25, 0x23 , 0x1F , 0x1A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index12 -3.6dB */ {0x24, 0x22 , 0x1E , 0x19 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index13 -3.9dB */ {0x22, 0x21 , 0x1D , 0x18 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index14 -4.2dB */ {0x21, 0x20 , 0x1C , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index15 -4.5dB */ {0x20, 0x1F , 0x1B , 0x17 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index16 -4.8dB */ {0x1F, 0x1E , 0x1A , 0x16 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index17 -5.1dB */ {0x1E, 0x1D , 0x1A , 0x15 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index18 -5.4dB */ {0x1D, 0x1C , 0x19 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index19 -5.7dB */ {0x1C, 0x1B , 0x18 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index20 -6 dB */ {0x1B, 0x1A , 0x17 , 0x13 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index21 -6.3dB */ {0x1A, 0x19 , 0x16 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index22 -6.6dB */ {0x19, 0x18 , 0x15 , 0x12 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index23 -6.9dB */ {0x18, 0x17 , 0x15 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index24 -7.2dB */ {0x18, 0x17 , 0x14 , 0x11 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index25 -7.5dB */ {0x17, 0x16 , 0x13 , 0x10 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index26 -7.8dB */ {0x16, 0x15 , 0x13 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index27 -8.1dB */ {0x15, 0x14 , 0x12 , 0x0F , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index28 -8.4dB */ {0x14, 0x14 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index29 -8.7dB */ {0x14, 0x13 , 0x11 , 0x0E , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index30 -9 dB */ {0x13, 0x12 , 0x10 , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index31 -9.3dB */ {0x12, 0x12 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index32 -9.6dB */ {0x12, 0x11 , 0x0F , 0x0D , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index33 -9.9dB */ {0x11, 0x11 , 0x0F , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index34 -10.2dB */ {0x11, 0x11 , 0x0E , 0x0C , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index35 -10.5dB */ {0x10, 0x0F , 0x0E , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index36 -10.8dB */ {0x10, 0x0F , 0x0D , 0x0B , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index37 -11.1dB */ {0x0F, 0x0E , 0x0D , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index38 -11.4dB */ {0x0E, 0x0E , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index39 -11.7dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index40 -12 dB */ {0x0E, 0x0D , 0x0C , 0x0A , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index41 -12.3dB */ {0x0D, 0x0D , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index42 -12.6dB */ {0x0D, 0x0C , 0x0B , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index43 -12.9dB */ {0x0C, 0x0C , 0x0A , 0x09 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index44 -13.2dB */ {0x0C, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index45 -13.5dB */ {0x0B, 0x0B , 0x0A , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index46 -13.8dB */ {0x0B, 0x0B , 0x09 , 0x08 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index47 -14.1dB */ {0x0B, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index48 -14.4dB */ {0x0A, 0x0A , 0x09 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index49 -14.7dB */ {0x0A, 0x0A , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index50 -15 dB */ {0x0A, 0x09 , 0x08 , 0x07 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index51 -15.3dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index52 -15.6dB */ {0x09, 0x09 , 0x08 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00}, ++ /* Index53 -15.9dB */ {0x09, 0x08 , 0x07 , 0x06 , 0x00 , 0x00 , 0x00 , 0x00} ++}; ++#endif ++ ++#if(RTL8814A_SUPPORT == 1) ++u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] = ++{ ++ 0x081, // 0, -12.0dB ++ 0x088, // 1, -11.5dB ++ 0x090, // 2, -11.0dB ++ 0x099, // 3, -10.5dB ++ 0x0A2, // 4, -10.0dB ++ 0x0AC, // 5, -9.5dB ++ 0x0B6, // 6, -9.0dB ++ 0x0C0, // 7, -8.5dB ++ 0x0CC, // 8, -8.0dB ++ 0x0D8, // 9, -7.5dB ++ 0x0E5, // 10, -7.0dB ++ 0x0F2, // 11, -6.5dB ++ 0x101, // 12, -6.0dB ++ 0x110, // 13, -5.5dB ++ 0x120, // 14, -5.0dB ++ 0x131, // 15, -4.5dB ++ 0x143, // 16, -4.0dB ++ 0x156, // 17, -3.5dB ++ 0x16A, // 18, -3.0dB ++ 0x180, // 19, -2.5dB ++ 0x197, // 20, -2.0dB ++ 0x1AF, // 21, -1.5dB ++ 0x1C8, // 22, -1.0dB ++ 0x1E3, // 23, -0.5dB ++ 0x200, // 24, +0 dB ++ 0x21E, // 25, +0.5dB ++ 0x23E, // 26, +1.0dB ++ 0x261, // 27, +1.5dB ++ 0x285, // 28, +2.0dB ++ 0x2AB, // 29, +2.5dB ++ 0x2D3, // 30, +3.0dB ++ 0x2FE, // 31, +3.5dB ++ 0x32B, // 32, +4.0dB ++ 0x35C, // 33, +4.5dB ++ 0x38E, // 34, +5.0dB ++ 0x3C4, // 35, +5.5dB ++ 0x3FE // 36, +6.0dB ++}; ++#elif(ODM_IC_11AC_SERIES_SUPPORT) ++u4Byte OFDMSwingTable_8812[OFDM_TABLE_SIZE_8812] = { ++ 0x3FE, // 0, (6dB) ++ 0x3C4, // 1, (5.5dB) ++ 0x38E, // 2, (5dB) ++ 0x35C, // 3, (4.5dB) ++ 0x32B, // 4, (4dB) ++ 0x2FE, // 5, (3.5dB) ++ 0x2D3, // 6, (3dB) ++ 0x2AB, // 7, (2.5dB) ++ 0x285, // 8, (2dB) ++ 0x261, // 9, (1.5dB ++ 0x23E, // 10, (1dB) ++ 0x21E, // 11, (0.5dB) ++ 0x200, // 12, (0dB) 8814 int PA 2G default ++ 0x1E3, // 13, (-0.5dB) ++ 0x1C8, // 14, (-1dB) ++ 0x1AF, // 15, (-1.5dB) ++ 0x197, // 16, (-2dB) ++ 0x180, // 17, (-2.5dB) ++ 0x16A, // 18, (-3dB) 8812 / 8814 int PA 5G / 8814 ext PA 2G5G default ++ 0x156, // 19, (-3.5dB) ++ 0x143, // 20, (-4dB) 8812 HP default ++ 0x131, // 21, (-4.5dB) ++ 0x120, // 22, (-5dB) ++ 0x110, // 23, (-5.5dB) ++ 0x101, // 24, (-6dB) ++ 0x0F2, // 25, (-6.5dB) ++ 0x0E5, // 26, (-7dB) ++ 0x0D8, // 27, (-7.5dB) ++ 0x0CC, // 28, (-8dB) ++ 0x0C0, // 29, (-8.5dB) ++ 0x0B6, // 30, (-9dB) ++ 0x0AC, // 31, (-9.5dB) ++ 0x0A2, // 32, (-10dB) ++ 0x099, // 33, (-10.5dB) ++ 0x090, // 34, (-11dB) ++ 0x088, // 35, (-11.5dB) ++ 0x081, // 36, (-12dB) ++ 0x079, // 37, (-12.5dB) ++ 0x072, // 38, (-13dB) ++ 0x06c, // 39, (-13.5dB) ++ 0x066, // 40, (-14dB) ++ 0x060, // 41, (-14.5dB) ++ 0x05B // 42, (-15dB) ++}; ++#endif ++ ++//#endif ++//3============================================================ ++//3 Tx Power Tracking ++//3============================================================ ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES))) ++ return; ++#endif ++ ++ odm_TXPowerTrackingThermalMeterInit(pDM_Odm); ++} ++ ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ u1Byte p; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ pMgntInfo->bTXPowerTracking = TRUE; ++ pHalData->TXPowercount = 0; ++ pHalData->bTXPowerTrackingInit = FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pHalData->TxPowerTrackControl = TRUE; ++ ODM_RT_TRACE(pDM_Odm,COMP_POWER_TRACKING, DBG_LOUD, ("pMgntInfo->bTXPowerTracking = %d\n", pMgntInfo->bTXPowerTracking)); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #ifdef CONFIG_RTL8188E ++ { ++ pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; ++ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; ++ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; ++ ++ MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); ++ } ++ #else ++ { ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ //if(IS_HARDWARE_TYPE_8192C(pHalData)) ++ { ++ pdmpriv->bTXPowerTracking = _TRUE; ++ pdmpriv->TXPowercount = 0; ++ pdmpriv->bTXPowerTrackingInit = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) //for mp driver, turn off txpwrtracking as default ++ pdmpriv->TxPowerTrackControl = _TRUE; ++ ++ } ++ MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); ++ ++ } ++ #endif//endif (CONFIG_RTL8188E==1) ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ ++ #ifdef RTL8188E_SUPPORT ++ { ++ pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; ++ pDM_Odm->RFCalibrateInfo.TXPowercount = 0; ++ pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; ++ } ++ #endif ++#endif ++ ++ pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = 0; ++ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = 0; ++ pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; ++ pDM_Odm->RFCalibrateInfo.ThermalValue = 0; ++ pRFCalibrateInfo->DefaultOfdmIndex = 28; ++ ++ ++#if RTL8188E_SUPPORT ++ pRFCalibrateInfo->DefaultCckIndex = 20; // -6 dB ++#elif RTL8192E_SUPPORT ++ pRFCalibrateInfo->DefaultCckIndex = 8; // -12 dB ++#endif ++ pRFCalibrateInfo->BbSwingIdxOfdmBase = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; ++ pDM_Odm->RFCalibrateInfo.CCK_index = pRFCalibrateInfo->DefaultCckIndex; ++ for(p = 0; p < MAX_RF_PATH; p++) ++ { ++ pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->KfreeOffset[p] = 0; // for 8814 kfree ++ } ++ pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->DefaultCckIndex; ++ ++} ++ ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ) ++{ ++ // ++ // For AP/ADSL use prtl8192cd_priv ++ // For CE/NIC use PADAPTER ++ // ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ++ ++ if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ return; ++ ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ switch (pDM_Odm->SupportPlatform) ++ { ++ case ODM_WIN: ++ odm_TXPowerTrackingCheckMP(pDM_Odm); ++ break; ++ ++ case ODM_CE: ++ odm_TXPowerTrackingCheckCE(pDM_Odm); ++ break; ++ ++ case ODM_AP: ++ odm_TXPowerTrackingCheckAP(pDM_Odm); ++ break; ++ default: ++ break; ++ } ++ ++} ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ #if(RTL8188E_SUPPORT==1) ++ ++ //if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ { ++ return; ++ } ++ ++ if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec ++ { ++ //pHalData->TxPowerCheckCnt++; //cosa add for debug ++ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ //DBG_8192C("Trigger 92C Thermal Meter!!\n"); ++ ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; ++ return; ++ ++ } ++ else ++ { ++ //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); ++ odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; ++ } ++ #endif ++ ++#endif ++} ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if (ODM_CheckPowerStatus(Adapter) == FALSE) ++ return; ++ ++ if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) ++ odm_TXPowerTrackingThermalMeterCheck(Adapter); ++#endif ++ ++} ++ ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1)) ++ if (pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8812|ODM_RTL8881A|ODM_RTL8814A)) ++ ODM_TXPowerTrackingCallback_ThermalMeter(pDM_Odm); ++ else ++#endif ++ { ++ } ++#endif ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ) ++{ ++#ifndef AP_BUILD_WORKAROUND ++#if (HAL_CODE_BASE==RTL8192_C) ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ static u1Byte TM_Trigger = 0; ++ //u1Byte TxPowerCheckCnt = 5; //10 sec ++ ++ if(!pMgntInfo->bTXPowerTracking /*|| (!pHalData->TxPowerTrackControl && pHalData->bAPKdone)*/) ++ { ++ return; ++ } ++ ++ if(!TM_Trigger) //at least delay 1 sec ++ { ++ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_8812(Adapter)) ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); ++ else ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger 92C Thermal Meter!!\n")); ++ ++ TM_Trigger = 1; ++ return; ++ } ++ else ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); ++ odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. ++ TM_Trigger = 0; ++ } ++#endif ++#endif ++} ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ap.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ap.h +new file mode 100644 +index 0000000..8c7c286 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ap.h +@@ -0,0 +1,314 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMPOWERTRACKING_H__ ++#define __PHYDMPOWERTRACKING_H__ ++ ++#define POWRTRACKING_VERSION "1.1" ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++#ifdef RTK_AC_SUPPORT ++#define ODM_IC_11AC_SERIES_SUPPORT 1 ++#else ++#define ODM_IC_11AC_SERIES_SUPPORT 0 ++#endif ++#else ++#define ODM_IC_11AC_SERIES_SUPPORT 1 ++#endif ++ ++#define DPK_DELTA_MAPPING_NUM 13 ++#define index_mapping_HP_NUM 15 ++#define DELTA_SWINGIDX_SIZE 30 ++#define BAND_NUM 3 ++#define MAX_RF_PATH 4 ++#define TXSCALE_TABLE_SIZE 37 ++#define IQK_MAC_REG_NUM 4 ++#define IQK_ADDA_REG_NUM 16 ++#define IQK_BB_REG_NUM_MAX 10 ++ ++#define IQK_BB_REG_NUM 9 ++ ++#define HP_THERMAL_NUM 8 ++ ++#define AVG_THERMAL_NUM 8 ++#define IQK_Matrix_REG_NUM 8 ++//#define IQK_Matrix_Settings_NUM 1+24+21 ++#define IQK_Matrix_Settings_NUM (14+24+21) // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G ++ ++#if !defined(_OUTSRC_COEXIST) ++#define OFDM_TABLE_SIZE_92D 43 ++#define OFDM_TABLE_SIZE 37 ++#define CCK_TABLE_SIZE 33 ++#define CCK_TABLE_SIZE_88F 21 ++ ++ ++ ++//#define OFDM_TABLE_SIZE_92E 54 ++//#define CCK_TABLE_SIZE_92E 54 ++extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D]; ++extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; ++ ++ ++extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE_92D]; ++extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16]; ++ ++#endif ++ ++#define ODM_OFDM_TABLE_SIZE 37 ++#define ODM_CCK_TABLE_SIZE 33 ++// <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. ++extern u1Byte DeltaSwingTableIdx_2GA_P_DEFAULT[DELTA_SWINGIDX_SIZE]; ++extern u1Byte DeltaSwingTableIdx_2GA_N_DEFAULT[DELTA_SWINGIDX_SIZE]; ++ ++ ++//extern u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E]; ++//extern u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8]; ++//extern u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8]; ++ ++#ifdef CONFIG_WLAN_HAL_8192EE ++#define OFDM_TABLE_SIZE_92E 54 ++#define CCK_TABLE_SIZE_92E 54 ++extern u4Byte OFDMSwingTable_92E[OFDM_TABLE_SIZE_92E]; ++extern u1Byte CCKSwingTable_Ch1_Ch13_92E[CCK_TABLE_SIZE_92E][8]; ++extern u1Byte CCKSwingTable_Ch14_92E[CCK_TABLE_SIZE_92E][8]; ++#endif ++ ++#define OFDM_TABLE_SIZE_8812 43 ++#define AVG_THERMAL_NUM_8812 4 ++ ++#if(RTL8814A_SUPPORT == 1) ++extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; ++#elif(ODM_IC_11AC_SERIES_SUPPORT) ++extern unsigned int OFDMSwingTable_8812[OFDM_TABLE_SIZE_8812]; ++#endif ++ ++#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck ++ ++typedef struct _IQK_MATRIX_REGS_SETTING{ ++ BOOLEAN bIQKDone; ++ s4Byte Value[1][IQK_Matrix_REG_NUM]; ++}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; ++ ++typedef struct ODM_RF_Calibration_Structure ++{ ++ //for tx power tracking ++ ++ u4Byte RegA24; // for TempCCK ++ s4Byte RegE94; ++ s4Byte RegE9C; ++ s4Byte RegEB4; ++ s4Byte RegEBC; ++ ++ //u1Byte bTXPowerTracking; ++ u1Byte TXPowercount; ++ BOOLEAN bTXPowerTrackingInit; ++ BOOLEAN bTXPowerTracking; ++ u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default ++ u1Byte TM_Trigger; ++ u1Byte InternalPA5G[2]; //pathA / pathB ++ ++ u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 ++ u1Byte ThermalValue; ++ u1Byte ThermalValue_LCK; ++ u1Byte ThermalValue_IQK; ++ u1Byte ThermalValue_DPK; ++ u1Byte ThermalValue_AVG[AVG_THERMAL_NUM]; ++ u1Byte ThermalValue_AVG_index; ++ u1Byte ThermalValue_RxGain; ++ u1Byte ThermalValue_Crystal; ++ u1Byte ThermalValue_DPKstore; ++ u1Byte ThermalValue_DPKtrack; ++ BOOLEAN TxPowerTrackingInProgress; ++ BOOLEAN bDPKenable; ++ ++ BOOLEAN bReloadtxpowerindex; ++ u1Byte bRfPiEnable; ++ u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug ++ ++ u1Byte bCCKinCH14; ++ u1Byte CCK_index; ++ u1Byte OFDM_index[MAX_RF_PATH]; ++ s1Byte PowerIndexOffset; ++ s1Byte DeltaPowerIndex; ++ s1Byte DeltaPowerIndexLast; ++ BOOLEAN bTxPowerChanged; ++ ++ u1Byte ThermalValue_HP[HP_THERMAL_NUM]; ++ u1Byte ThermalValue_HP_index; ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; ++ BOOLEAN bNeedIQK; ++ u1Byte Delta_IQK; ++ u1Byte Delta_LCK; ++ u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE]; ++ ++ u1Byte BbSwingIdxOfdm[MAX_RF_PATH]; ++ u1Byte BbSwingIdxOfdmCurrent; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ u1Byte BbSwingIdxOfdmBase[MAX_RF_PATH]; ++#else ++ u1Byte BbSwingIdxOfdmBase; ++#endif ++ BOOLEAN BbSwingFlagOfdm; ++ u1Byte BbSwingIdxCck; ++ u1Byte BbSwingIdxCckCurrent; ++ u1Byte BbSwingIdxCckBase; ++ u1Byte DefaultOfdmIndex; ++ u1Byte DefaultCckIndex; ++ BOOLEAN BbSwingFlagCck; ++ ++ s1Byte Absolute_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_CCKSwingIdx; ++ s1Byte Modify_TxAGC_Value; /*Remnat compensate value at TxAGC */ ++ BOOLEAN Modify_TxAGC_Flag_PathA; ++ BOOLEAN Modify_TxAGC_Flag_PathB; ++ BOOLEAN Modify_TxAGC_Flag_PathC; ++ BOOLEAN Modify_TxAGC_Flag_PathD; ++ BOOLEAN Modify_TxAGC_Flag_PathA_CCK; ++ ++ s1Byte KfreeOffset[MAX_RF_PATH]; ++ ++ //--------------------------------------------------------------------// ++ ++ //for IQK ++ u4Byte RegC04; ++ u4Byte Reg874; ++ u4Byte RegC08; ++ u4Byte RegB68; ++ u4Byte RegB6C; ++ u4Byte Reg870; ++ u4Byte Reg860; ++ u4Byte Reg864; ++ ++ BOOLEAN bIQKInitialized; ++ BOOLEAN bLCKInProgress; ++ BOOLEAN bAntennaDetected; ++ u4Byte ADDA_backup[IQK_ADDA_REG_NUM]; ++ u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte IQK_BB_backup_recover[9]; ++ u4Byte IQK_BB_backup[IQK_BB_REG_NUM]; ++ ++ //for APK ++ u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a ++ u1Byte bAPKdone; ++ u1Byte bAPKThermalMeterIgnore; ++ u1Byte bDPdone; ++ u1Byte bDPPathAOK; ++ u1Byte bDPPathBOK; ++ ++ /*Add by Yuchen for Kfree Phydm*/ ++ u1Byte RegRfKFreeEnable; /*for registry*/ ++ u1Byte RfKFreeEnable; /*for efuse enable check*/ ++ ++}ODM_RF_CAL_T,*PODM_RF_CAL_T; ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ++VOID ++odm_TXPowerTrackingCallbackThermalMeter92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingCallbackRXGainThermalMeter92D( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingCallbackThermalMeter92D( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingDirectCall92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ); ++ ++#endif ++ ++ ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ce.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ce.c +new file mode 100644 +index 0000000..15f9f5e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ce.c +@@ -0,0 +1,675 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++/*============================================================ */ ++/* include files */ ++/*============================================================ */ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++//============================================================ ++// Global var ++//============================================================ ++ ++u4Byte OFDMSwingTable[OFDM_TABLE_SIZE] = { ++ 0x7f8001fe, // 0, +6.0dB ++ 0x788001e2, // 1, +5.5dB ++ 0x71c001c7, // 2, +5.0dB ++ 0x6b8001ae, // 3, +4.5dB ++ 0x65400195, // 4, +4.0dB ++ 0x5fc0017f, // 5, +3.5dB ++ 0x5a400169, // 6, +3.0dB ++ 0x55400155, // 7, +2.5dB ++ 0x50800142, // 8, +2.0dB ++ 0x4c000130, // 9, +1.5dB ++ 0x47c0011f, // 10, +1.0dB ++ 0x43c0010f, // 11, +0.5dB ++ 0x40000100, // 12, +0dB ++ 0x3c8000f2, // 13, -0.5dB ++ 0x390000e4, // 14, -1.0dB ++ 0x35c000d7, // 15, -1.5dB ++ 0x32c000cb, // 16, -2.0dB ++ 0x300000c0, // 17, -2.5dB ++ 0x2d4000b5, // 18, -3.0dB ++ 0x2ac000ab, // 19, -3.5dB ++ 0x288000a2, // 20, -4.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x24000090, // 22, -5.0dB ++ 0x22000088, // 23, -5.5dB ++ 0x20000080, // 24, -6.0dB ++ 0x1e400079, // 25, -6.5dB ++ 0x1c800072, // 26, -7.0dB ++ 0x1b00006c, // 27. -7.5dB ++ 0x19800066, // 28, -8.0dB ++ 0x18000060, // 29, -8.5dB ++ 0x16c0005b, // 30, -9.0dB ++ 0x15800056, // 31, -9.5dB ++ 0x14400051, // 32, -10.0dB ++ 0x1300004c, // 33, -10.5dB ++ 0x12000048, // 34, -11.0dB ++ 0x11000044, // 35, -11.5dB ++ 0x10000040, // 36, -12.0dB ++}; ++ ++u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB ++ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB <== default ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB ++ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB <== default ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB ++}; ++ ++ ++u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE] = { ++ 0x0b40002d, // 0, -15.0dB ++ 0x0c000030, // 1, -14.5dB ++ 0x0cc00033, // 2, -14.0dB ++ 0x0d800036, // 3, -13.5dB ++ 0x0e400039, // 4, -13.0dB ++ 0x0f00003c, // 5, -12.5dB ++ 0x10000040, // 6, -12.0dB ++ 0x11000044, // 7, -11.5dB ++ 0x12000048, // 8, -11.0dB ++ 0x1300004c, // 9, -10.5dB ++ 0x14400051, // 10, -10.0dB ++ 0x15800056, // 11, -9.5dB ++ 0x16c0005b, // 12, -9.0dB ++ 0x18000060, // 13, -8.5dB ++ 0x19800066, // 14, -8.0dB ++ 0x1b00006c, // 15, -7.5dB ++ 0x1c800072, // 16, -7.0dB ++ 0x1e400079, // 17, -6.5dB ++ 0x20000080, // 18, -6.0dB ++ 0x22000088, // 19, -5.5dB ++ 0x24000090, // 20, -5.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x288000a2, // 22, -4.0dB ++ 0x2ac000ab, // 23, -3.5dB ++ 0x2d4000b5, // 24, -3.0dB ++ 0x300000c0, // 25, -2.5dB ++ 0x32c000cb, // 26, -2.0dB ++ 0x35c000d7, // 27, -1.5dB ++ 0x390000e4, // 28, -1.0dB ++ 0x3c8000f2, // 29, -0.5dB ++ 0x40000100, // 30, +0dB ++ 0x43c0010f, // 31, +0.5dB ++ 0x47c0011f, // 32, +1.0dB ++ 0x4c000130, // 33, +1.5dB ++ 0x50800142, // 34, +2.0dB ++ 0x55400155, // 35, +2.5dB ++ 0x5a400169, // 36, +3.0dB ++ 0x5fc0017f, // 37, +3.5dB ++ 0x65400195, // 38, +4.0dB ++ 0x6b8001ae, // 39, +4.5dB ++ 0x71c001c7, // 40, +5.0dB ++ 0x788001e2, // 41, +5.5dB ++ 0x7f8001fe // 42, +6.0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16] = { ++{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ ++{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ ++{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ ++{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ ++{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ ++{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ ++{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ ++{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ ++{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ ++{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ ++{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ ++{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ ++{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ ++{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ ++{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ ++{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ ++{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ ++{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ ++{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ ++{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ ++{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ ++}; ++ ++ ++u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = { ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB ++ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= { ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB ++ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB ++}; ++ ++u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] = ++{ ++ 0x081, // 0, -12.0dB ++ 0x088, // 1, -11.5dB ++ 0x090, // 2, -11.0dB ++ 0x099, // 3, -10.5dB ++ 0x0A2, // 4, -10.0dB ++ 0x0AC, // 5, -9.5dB ++ 0x0B6, // 6, -9.0dB ++ 0x0C0, // 7, -8.5dB ++ 0x0CC, // 8, -8.0dB ++ 0x0D8, // 9, -7.5dB ++ 0x0E5, // 10, -7.0dB ++ 0x0F2, // 11, -6.5dB ++ 0x101, // 12, -6.0dB ++ 0x110, // 13, -5.5dB ++ 0x120, // 14, -5.0dB ++ 0x131, // 15, -4.5dB ++ 0x143, // 16, -4.0dB ++ 0x156, // 17, -3.5dB ++ 0x16A, // 18, -3.0dB ++ 0x180, // 19, -2.5dB ++ 0x197, // 20, -2.0dB ++ 0x1AF, // 21, -1.5dB ++ 0x1C8, // 22, -1.0dB ++ 0x1E3, // 23, -0.5dB ++ 0x200, // 24, +0 dB ++ 0x21E, // 25, +0.5dB ++ 0x23E, // 26, +1.0dB ++ 0x261, // 27, +1.5dB ++ 0x285, // 28, +2.0dB ++ 0x2AB, // 29, +2.5dB ++ 0x2D3, // 30, +3.0dB ++ 0x2FE, // 31, +3.5dB ++ 0x32B, // 32, +4.0dB ++ 0x35C, // 33, +4.5dB ++ 0x38E, // 34, +5.0dB ++ 0x3C4, // 35, +5.5dB ++ 0x3FE // 36, +6.0dB ++}; ++ ++#ifdef AP_BUILD_WORKAROUND ++ ++unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { ++ /* +6.0dB */ 0x7f8001fe, ++ /* +5.5dB */ 0x788001e2, ++ /* +5.0dB */ 0x71c001c7, ++ /* +4.5dB */ 0x6b8001ae, ++ /* +4.0dB */ 0x65400195, ++ /* +3.5dB */ 0x5fc0017f, ++ /* +3.0dB */ 0x5a400169, ++ /* +2.5dB */ 0x55400155, ++ /* +2.0dB */ 0x50800142, ++ /* +1.5dB */ 0x4c000130, ++ /* +1.0dB */ 0x47c0011f, ++ /* +0.5dB */ 0x43c0010f, ++ /* 0.0dB */ 0x40000100, ++ /* -0.5dB */ 0x3c8000f2, ++ /* -1.0dB */ 0x390000e4, ++ /* -1.5dB */ 0x35c000d7, ++ /* -2.0dB */ 0x32c000cb, ++ /* -2.5dB */ 0x300000c0, ++ /* -3.0dB */ 0x2d4000b5, ++ /* -3.5dB */ 0x2ac000ab, ++ /* -4.0dB */ 0x288000a2, ++ /* -4.5dB */ 0x26000098, ++ /* -5.0dB */ 0x24000090, ++ /* -5.5dB */ 0x22000088, ++ /* -6.0dB */ 0x20000080, ++ /* -6.5dB */ 0x1a00006c, ++ /* -7.0dB */ 0x1c800072, ++ /* -7.5dB */ 0x18000060, ++ /* -8.0dB */ 0x19800066, ++ /* -8.5dB */ 0x15800056, ++ /* -9.0dB */ 0x26c0005b, ++ /* -9.5dB */ 0x14400051, ++ /* -10.0dB */ 0x24400051, ++ /* -10.5dB */ 0x1300004c, ++ /* -11.0dB */ 0x12000048, ++ /* -11.5dB */ 0x11000044, ++ /* -12.0dB */ 0x10000040 ++}; ++#endif ++ ++ ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES))) ++ return; ++#endif ++ ++ odm_TXPowerTrackingThermalMeterInit(pDM_Odm); ++} ++ ++u1Byte ++getSwingIndex( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u1Byte i = 0; ++ u4Byte bbSwing; ++ u4Byte swingTableSize; ++ pu4Byte pSwingTable; ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B ++ || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B ++ ) { ++ bbSwing = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 0xFFC00000); ++ ++ pSwingTable = OFDMSwingTable_New; ++ swingTableSize = OFDM_TABLE_SIZE; ++ } else { ++#if ((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) ++ if (pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821) ++ { ++ bbSwing = PHY_GetTxBBSwing_8812A(Adapter, pHalData->CurrentBandType, ODM_RF_PATH_A); ++ pSwingTable = TxScalingTable_Jaguar; ++ swingTableSize = TXSCALE_TABLE_SIZE; ++ } ++ else ++#endif ++ { ++ bbSwing = 0; ++ pSwingTable = OFDMSwingTable; ++ swingTableSize = OFDM_TABLE_SIZE; ++ } ++ } ++ ++ for (i = 0; i < swingTableSize; ++i) { ++ u4Byte tableValue = pSwingTable[i]; ++ ++ if (tableValue >= 0x100000 ) ++ tableValue >>= 22; ++ if (bbSwing == tableValue) ++ break; ++ } ++ return i; ++} ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte defaultSwingIndex = getSwingIndex(pDM_Odm); ++ u1Byte p = 0; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pHalData->TxPowerTrackControl = TRUE; ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ pRFCalibrateInfo->bTXPowerTracking = _TRUE; ++ pRFCalibrateInfo->TXPowercount = 0; ++ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; ++ else ++ pRFCalibrateInfo->TxPowerTrackControl = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; ++ ++ ++ MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pRFCalibrateInfo->TxPowerTrackControl); ++ ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ #ifdef RTL8188E_SUPPORT ++ { ++ pRFCalibrateInfo->bTXPowerTracking = _TRUE; ++ pRFCalibrateInfo->TXPowercount = 0; ++ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; ++ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; ++ } ++ #endif ++#endif ++ ++ //pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; ++ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; ++ pRFCalibrateInfo->ThermalValue_IQK = pHalData->EEPROMThermalMeter; ++ pRFCalibrateInfo->ThermalValue_LCK = pHalData->EEPROMThermalMeter; ++ ++ // The index of "0 dB" in SwingTable. ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || ++ pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8703B) { ++ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= OFDM_TABLE_SIZE) ? 30 : defaultSwingIndex; ++ pRFCalibrateInfo->DefaultCckIndex = 20; ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ pRFCalibrateInfo->DefaultOfdmIndex =28; //OFDM: -1dB ++ pRFCalibrateInfo->DefaultCckIndex =20; //CCK:-6dB ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8188F) //add by Mingzhi.Guo 2015-03-23 ++ { ++ pRFCalibrateInfo->DefaultOfdmIndex =28; //OFDM: -1dB ++ pRFCalibrateInfo->DefaultCckIndex =20; //CCK:-6dB ++ } ++ else ++ { ++ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= TXSCALE_TABLE_SIZE) ? 24 : defaultSwingIndex; ++ pRFCalibrateInfo->DefaultCckIndex = 24; ++ } ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; ++ pRFCalibrateInfo->CCK_index = pRFCalibrateInfo->DefaultCckIndex; ++ ++ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) ++ { ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ } ++ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //add by Mingzhi.Guo ++ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //add by Mingzhi.Guo ++ ++} ++ ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ) ++{ ++ /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ at the same time. In the stage2/3, we need to prive universal interface and merge all ++ HW dynamic mechanism. */ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ switch (pDM_Odm->SupportPlatform) ++ { ++ case ODM_WIN: ++ odm_TXPowerTrackingCheckMP(pDM_Odm); ++ break; ++ ++ case ODM_CE: ++ odm_TXPowerTrackingCheckCE(pDM_Odm); ++ break; ++ ++ case ODM_AP: ++ odm_TXPowerTrackingCheckAP(pDM_Odm); ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ return; ++ ++ if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec ++ { ++ //pHalData->TxPowerCheckCnt++; //cosa add for debug ++ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) ++ || IS_HARDWARE_TYPE_8723B(Adapter) ++ || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter) ++ || IS_HARDWARE_TYPE_8703B(Adapter) ++ ) { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03); ++ } else { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_OLD, bRFRegOffsetMask, 0x60); ++ } ++ ++ //DBG_871X("Trigger Thermal Meter!!\n"); ++ ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; ++ return; ++ } ++ else ++ { ++ //DBG_871X("Schedule TxPowerTracking direct call!!\n"); ++ ODM_TXPowerTrackingCallback_ThermalMeter(Adapter); ++ pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; ++ } ++ ++#endif ++} ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if (ODM_CheckPowerStatus(Adapter) == FALSE) ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>ODM_CheckPowerStatus() return FALSE\n")); ++ return; ++ } ++ ++ if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) ++ odm_TXPowerTrackingThermalMeterCheck(Adapter); ++ else { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE\n")); ++ } ++#endif ++ ++} ++ ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++ return; ++ ++#endif ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ) ++{ ++#ifndef AP_BUILD_WORKAROUND ++ static u1Byte TM_Trigger = 0; ++ ++ if(!(GET_HAL_DATA(Adapter)->DM_OutSrc.SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ++ ("===>odm_TXPowerTrackingThermalMeterCheck(),pMgntInfo->bTXPowerTracking is FALSE, return!!\n")); ++ return; ++ } ++ ++ if(!TM_Trigger) //at least delay 1 sec ++ { ++ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) || ++ IS_HARDWARE_TYPE_8723B(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter) ++ || IS_HARDWARE_TYPE_8703B(Adapter)) ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); ++ else ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger Thermal Meter!!\n")); ++ ++ TM_Trigger = 1; ++ return; ++ } ++ else ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); ++ odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. ++ TM_Trigger = 0; ++ } ++#endif ++} ++#endif ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ce.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ce.h +new file mode 100644 +index 0000000..c068b74 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_ce.h +@@ -0,0 +1,296 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMPOWERTRACKING_H__ ++#define __PHYDMPOWERTRACKING_H__ ++ ++#define POWRTRACKING_VERSION "1.1" ++ ++#define DPK_DELTA_MAPPING_NUM 13 ++#define index_mapping_HP_NUM 15 ++#define OFDM_TABLE_SIZE 43 ++#define CCK_TABLE_SIZE 33 ++#define CCK_TABLE_SIZE_88F 21 ++#define TXSCALE_TABLE_SIZE 37 ++#define TXPWR_TRACK_TABLE_SIZE 30 ++#define DELTA_SWINGIDX_SIZE 30 ++#define BAND_NUM 4 ++ ++#define AVG_THERMAL_NUM 8 ++#define HP_THERMAL_NUM 8 ++#define IQK_MAC_REG_NUM 4 ++#define IQK_ADDA_REG_NUM 16 ++#define IQK_BB_REG_NUM_MAX 10 ++ ++#define IQK_BB_REG_NUM 9 ++ ++ ++ ++#define IQK_Matrix_REG_NUM 8 ++#define IQK_Matrix_Settings_NUM 14+24+21 // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G ++ ++extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE]; ++extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; ++ ++extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE]; ++extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16]; ++ ++ ++extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; ++ ++// <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. ++static u1Byte DeltaSwingTableIdx_2GA_P_8188E[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; ++static u1Byte DeltaSwingTableIdx_2GA_N_8188E[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; ++ ++#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck ++ ++typedef struct _IQK_MATRIX_REGS_SETTING{ ++ BOOLEAN bIQKDone; ++ s4Byte Value[3][IQK_Matrix_REG_NUM]; ++ BOOLEAN bBWIqkResultSaved[3]; ++}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; ++ ++typedef struct ODM_RF_Calibration_Structure ++{ ++ //for tx power tracking ++ ++ u4Byte RegA24; // for TempCCK ++ s4Byte RegE94; ++ s4Byte RegE9C; ++ s4Byte RegEB4; ++ s4Byte RegEBC; ++ ++ u1Byte TXPowercount; ++ BOOLEAN bTXPowerTrackingInit; ++ BOOLEAN bTXPowerTracking; ++ u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default ++ u1Byte TM_Trigger; ++ u1Byte InternalPA5G[2]; //pathA / pathB ++ ++ u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 ++ u1Byte ThermalValue; ++ u1Byte ThermalValue_LCK; ++ u1Byte ThermalValue_IQK; ++ u1Byte ThermalValue_DPK; ++ u1Byte ThermalValue_AVG[AVG_THERMAL_NUM]; ++ u1Byte ThermalValue_AVG_index; ++ u1Byte ThermalValue_RxGain; ++ u1Byte ThermalValue_Crystal; ++ u1Byte ThermalValue_DPKstore; ++ u1Byte ThermalValue_DPKtrack; ++ BOOLEAN TxPowerTrackingInProgress; ++ ++ BOOLEAN bReloadtxpowerindex; ++ u1Byte bRfPiEnable; ++ u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug ++ ++ ++ //------------------------- Tx power Tracking -------------------------// ++ u1Byte bCCKinCH14; ++ u1Byte CCK_index; ++ u1Byte OFDM_index[MAX_RF_PATH]; ++ s1Byte PowerIndexOffset[MAX_RF_PATH]; ++ s1Byte DeltaPowerIndex[MAX_RF_PATH]; ++ s1Byte DeltaPowerIndexLast[MAX_RF_PATH]; ++ BOOLEAN bTxPowerChanged; ++ ++ u1Byte ThermalValue_HP[HP_THERMAL_NUM]; ++ u1Byte ThermalValue_HP_index; ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; ++ u1Byte Delta_LCK; ++ s1Byte BBSwingDiff2G, BBSwingDiff5G; // Unit: dB ++ u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE]; ++ ++ u1Byte BbSwingIdxOfdm[MAX_RF_PATH]; ++ u1Byte BbSwingIdxOfdmCurrent; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ u1Byte BbSwingIdxOfdmBase[MAX_RF_PATH]; ++#else ++ u1Byte BbSwingIdxOfdmBase; ++#endif ++ BOOLEAN BbSwingFlagOfdm; ++ u1Byte BbSwingIdxCck; ++ u1Byte BbSwingIdxCckCurrent; ++ u1Byte BbSwingIdxCckBase; ++ u1Byte DefaultOfdmIndex; ++ u1Byte DefaultCckIndex; ++ BOOLEAN BbSwingFlagCck; ++ ++ s1Byte Absolute_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_CCKSwingIdx; ++ s1Byte Modify_TxAGC_Value; /*Remnat compensate value at TxAGC */ ++ BOOLEAN Modify_TxAGC_Flag_PathA; ++ BOOLEAN Modify_TxAGC_Flag_PathB; ++ BOOLEAN Modify_TxAGC_Flag_PathC; ++ BOOLEAN Modify_TxAGC_Flag_PathD; ++ BOOLEAN Modify_TxAGC_Flag_PathA_CCK; ++ ++ s1Byte KfreeOffset[MAX_RF_PATH]; ++ ++ //--------------------------------------------------------------------// ++ ++ //for IQK ++ u4Byte RegC04; ++ u4Byte Reg874; ++ u4Byte RegC08; ++ u4Byte RegB68; ++ u4Byte RegB6C; ++ u4Byte Reg870; ++ u4Byte Reg860; ++ u4Byte Reg864; ++ ++ BOOLEAN bIQKInitialized; ++ BOOLEAN bLCKInProgress; ++ BOOLEAN bAntennaDetected; ++ BOOLEAN bNeedIQK; ++ BOOLEAN bIQKInProgress; ++ u1Byte Delta_IQK; ++ u4Byte ADDA_backup[IQK_ADDA_REG_NUM]; ++ u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte IQK_BB_backup_recover[9]; ++ u4Byte IQK_BB_backup[IQK_BB_REG_NUM]; ++ u4Byte TxIQC_8723B[2][3][2]; // { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} ++ u4Byte RxIQC_8723B[2][2][2]; // { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} ++ u4Byte TxIQC_8703B[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ ++ u4Byte RxIQC_8703B[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ ++ ++ ++ ++ // IQK time measurement ++ u8Byte IQK_StartTime; ++ u8Byte IQK_ProgressingTime; ++ u4Byte LOK_Result; ++ ++ //for APK ++ u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a ++ u1Byte bAPKdone; ++ u1Byte bAPKThermalMeterIgnore; ++ ++ // DPK ++ BOOLEAN bDPKFail; ++ u1Byte bDPdone; ++ u1Byte bDPPathAOK; ++ u1Byte bDPPathBOK; ++ ++ u4Byte TxLOK[2]; ++ u4Byte DpkTxAGC; ++ s4Byte DpkGain; ++ u4Byte DpkThermal[4]; ++ s1Byte Modify_TxAGC_Value_OFDM; ++ s1Byte Modify_TxAGC_Value_CCK; ++}ODM_RF_CAL_T,*PODM_RF_CAL_T; ++ ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ); ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ++VOID ++odm_TXPowerTrackingCallbackThermalMeter92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingCallbackRXGainThermalMeter92D( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingCallbackThermalMeter92D( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingDirectCall92C( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ); ++ ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_win.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_win.c +new file mode 100644 +index 0000000..acf2147 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_win.c +@@ -0,0 +1,687 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++//============================================================ ++// Global var ++//============================================================ ++ ++u4Byte OFDMSwingTable[OFDM_TABLE_SIZE] = { ++ 0x7f8001fe, // 0, +6.0dB ++ 0x788001e2, // 1, +5.5dB ++ 0x71c001c7, // 2, +5.0dB ++ 0x6b8001ae, // 3, +4.5dB ++ 0x65400195, // 4, +4.0dB ++ 0x5fc0017f, // 5, +3.5dB ++ 0x5a400169, // 6, +3.0dB ++ 0x55400155, // 7, +2.5dB ++ 0x50800142, // 8, +2.0dB ++ 0x4c000130, // 9, +1.5dB ++ 0x47c0011f, // 10, +1.0dB ++ 0x43c0010f, // 11, +0.5dB ++ 0x40000100, // 12, +0dB ++ 0x3c8000f2, // 13, -0.5dB ++ 0x390000e4, // 14, -1.0dB ++ 0x35c000d7, // 15, -1.5dB ++ 0x32c000cb, // 16, -2.0dB ++ 0x300000c0, // 17, -2.5dB ++ 0x2d4000b5, // 18, -3.0dB ++ 0x2ac000ab, // 19, -3.5dB ++ 0x288000a2, // 20, -4.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x24000090, // 22, -5.0dB ++ 0x22000088, // 23, -5.5dB ++ 0x20000080, // 24, -6.0dB ++ 0x1e400079, // 25, -6.5dB ++ 0x1c800072, // 26, -7.0dB ++ 0x1b00006c, // 27. -7.5dB ++ 0x19800066, // 28, -8.0dB ++ 0x18000060, // 29, -8.5dB ++ 0x16c0005b, // 30, -9.0dB ++ 0x15800056, // 31, -9.5dB ++ 0x14400051, // 32, -10.0dB ++ 0x1300004c, // 33, -10.5dB ++ 0x12000048, // 34, -11.0dB ++ 0x11000044, // 35, -11.5dB ++ 0x10000040, // 36, -12.0dB ++}; ++ ++u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB ++ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB <== default ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB ++ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB <== default ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB ++}; ++ ++ ++u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE] = { ++ 0x0b40002d, // 0, -15.0dB ++ 0x0c000030, // 1, -14.5dB ++ 0x0cc00033, // 2, -14.0dB ++ 0x0d800036, // 3, -13.5dB ++ 0x0e400039, // 4, -13.0dB ++ 0x0f00003c, // 5, -12.5dB ++ 0x10000040, // 6, -12.0dB ++ 0x11000044, // 7, -11.5dB ++ 0x12000048, // 8, -11.0dB ++ 0x1300004c, // 9, -10.5dB ++ 0x14400051, // 10, -10.0dB ++ 0x15800056, // 11, -9.5dB ++ 0x16c0005b, // 12, -9.0dB ++ 0x18000060, // 13, -8.5dB ++ 0x19800066, // 14, -8.0dB ++ 0x1b00006c, // 15, -7.5dB ++ 0x1c800072, // 16, -7.0dB ++ 0x1e400079, // 17, -6.5dB ++ 0x20000080, // 18, -6.0dB ++ 0x22000088, // 19, -5.5dB ++ 0x24000090, // 20, -5.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x288000a2, // 22, -4.0dB ++ 0x2ac000ab, // 23, -3.5dB ++ 0x2d4000b5, // 24, -3.0dB ++ 0x300000c0, // 25, -2.5dB ++ 0x32c000cb, // 26, -2.0dB ++ 0x35c000d7, // 27, -1.5dB ++ 0x390000e4, // 28, -1.0dB ++ 0x3c8000f2, // 29, -0.5dB ++ 0x40000100, // 30, +0dB ++ 0x43c0010f, // 31, +0.5dB ++ 0x47c0011f, // 32, +1.0dB ++ 0x4c000130, // 33, +1.5dB ++ 0x50800142, // 34, +2.0dB ++ 0x55400155, // 35, +2.5dB ++ 0x5a400169, // 36, +3.0dB ++ 0x5fc0017f, // 37, +3.5dB ++ 0x65400195, // 38, +4.0dB ++ 0x6b8001ae, // 39, +4.5dB ++ 0x71c001c7, // 40, +5.0dB ++ 0x788001e2, // 41, +5.5dB ++ 0x7f8001fe // 42, +6.0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16] = { ++{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ ++{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ ++{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ ++{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ ++{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ ++{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ ++{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ ++{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ ++{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ ++{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ ++{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ ++{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ ++{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ ++{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ ++{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ ++{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ ++{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ ++{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ ++{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ ++{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ ++{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ ++}; ++ ++ ++u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = { ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB ++ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB ++}; ++ ++ ++u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= { ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB ++ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB ++}; ++ ++u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] = ++{ ++ 0x081, // 0, -12.0dB ++ 0x088, // 1, -11.5dB ++ 0x090, // 2, -11.0dB ++ 0x099, // 3, -10.5dB ++ 0x0A2, // 4, -10.0dB ++ 0x0AC, // 5, -9.5dB ++ 0x0B6, // 6, -9.0dB ++ 0x0C0, // 7, -8.5dB ++ 0x0CC, // 8, -8.0dB ++ 0x0D8, // 9, -7.5dB ++ 0x0E5, // 10, -7.0dB ++ 0x0F2, // 11, -6.5dB ++ 0x101, // 12, -6.0dB ++ 0x110, // 13, -5.5dB ++ 0x120, // 14, -5.0dB ++ 0x131, // 15, -4.5dB ++ 0x143, // 16, -4.0dB ++ 0x156, // 17, -3.5dB ++ 0x16A, // 18, -3.0dB ++ 0x180, // 19, -2.5dB ++ 0x197, // 20, -2.0dB ++ 0x1AF, // 21, -1.5dB ++ 0x1C8, // 22, -1.0dB ++ 0x1E3, // 23, -0.5dB ++ 0x200, // 24, +0 dB ++ 0x21E, // 25, +0.5dB ++ 0x23E, // 26, +1.0dB ++ 0x261, // 27, +1.5dB ++ 0x285, // 28, +2.0dB ++ 0x2AB, // 29, +2.5dB ++ 0x2D3, // 30, +3.0dB ++ 0x2FE, // 31, +3.5dB ++ 0x32B, // 32, +4.0dB ++ 0x35C, // 33, +4.5dB ++ 0x38E, // 34, +5.0dB ++ 0x3C4, // 35, +5.5dB ++ 0x3FE // 36, +6.0dB ++}; ++ ++#ifdef AP_BUILD_WORKAROUND ++ ++unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { ++ /* +6.0dB */ 0x7f8001fe, ++ /* +5.5dB */ 0x788001e2, ++ /* +5.0dB */ 0x71c001c7, ++ /* +4.5dB */ 0x6b8001ae, ++ /* +4.0dB */ 0x65400195, ++ /* +3.5dB */ 0x5fc0017f, ++ /* +3.0dB */ 0x5a400169, ++ /* +2.5dB */ 0x55400155, ++ /* +2.0dB */ 0x50800142, ++ /* +1.5dB */ 0x4c000130, ++ /* +1.0dB */ 0x47c0011f, ++ /* +0.5dB */ 0x43c0010f, ++ /* 0.0dB */ 0x40000100, ++ /* -0.5dB */ 0x3c8000f2, ++ /* -1.0dB */ 0x390000e4, ++ /* -1.5dB */ 0x35c000d7, ++ /* -2.0dB */ 0x32c000cb, ++ /* -2.5dB */ 0x300000c0, ++ /* -3.0dB */ 0x2d4000b5, ++ /* -3.5dB */ 0x2ac000ab, ++ /* -4.0dB */ 0x288000a2, ++ /* -4.5dB */ 0x26000098, ++ /* -5.0dB */ 0x24000090, ++ /* -5.5dB */ 0x22000088, ++ /* -6.0dB */ 0x20000080, ++ /* -6.5dB */ 0x1a00006c, ++ /* -7.0dB */ 0x1c800072, ++ /* -7.5dB */ 0x18000060, ++ /* -8.0dB */ 0x19800066, ++ /* -8.5dB */ 0x15800056, ++ /* -9.0dB */ 0x26c0005b, ++ /* -9.5dB */ 0x14400051, ++ /* -10.0dB */ 0x24400051, ++ /* -10.5dB */ 0x1300004c, ++ /* -11.0dB */ 0x12000048, ++ /* -11.5dB */ 0x11000044, ++ /* -12.0dB */ 0x10000040 ++}; ++ ++#endif ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES|ODM_RTL8822B))) ++ return; ++#endif ++ ++ odm_TXPowerTrackingThermalMeterInit(pDM_Odm); ++} ++ ++u1Byte ++getSwingIndex( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u1Byte i = 0; ++ u4Byte bbSwing; ++ u4Byte swingTableSize; ++ pu4Byte pSwingTable; ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || ++ pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8703B) ++ { ++ bbSwing = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 0xFFC00000); ++ ++ pSwingTable = OFDMSwingTable_New; ++ swingTableSize = OFDM_TABLE_SIZE; ++ } else { ++ bbSwing = PHY_GetTxBBSwing_8812A(Adapter, pHalData->CurrentBandType, ODM_RF_PATH_A); ++ pSwingTable = TxScalingTable_Jaguar; ++ swingTableSize = TXSCALE_TABLE_SIZE; ++ } ++ ++ for (i = 0; i < swingTableSize; ++i) { ++ u4Byte tableValue = pSwingTable[i]; ++ ++ if (tableValue >= 0x100000 ) ++ tableValue >>= 22; ++ if (bbSwing == tableValue) ++ break; ++ } ++ return i; ++} ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte defaultSwingIndex = getSwingIndex(pDM_Odm); ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u1Byte p = 0; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pRFCalibrateInfo->TxPowerTrackControl = TRUE; ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #ifdef CONFIG_RTL8188E ++ { ++ pRFCalibrateInfo->bTXPowerTracking = _TRUE; ++ pRFCalibrateInfo->TXPowercount = 0; ++ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; ++ ++ MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pRFCalibrateInfo->TxPowerTrackControl); ++ } ++ #else ++ { ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ pdmpriv->bTXPowerTracking = _TRUE; ++ pdmpriv->TXPowercount = 0; ++ pdmpriv->bTXPowerTrackingInit = _FALSE; ++ ++ if(pDM_Odm->mp_mode == FALSE) ++ pdmpriv->TxPowerTrackControl = _TRUE; ++ ++ MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); ++ ++ } ++ #endif//endif (CONFIG_RTL8188E==1) ++#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ #ifdef RTL8188E_SUPPORT ++ { ++ pRFCalibrateInfo->bTXPowerTracking = _TRUE; ++ pRFCalibrateInfo->TXPowercount = 0; ++ pRFCalibrateInfo->bTXPowerTrackingInit = _FALSE; ++ pRFCalibrateInfo->TxPowerTrackControl = _TRUE; ++ } ++ #endif ++#endif ++ ++ pRFCalibrateInfo->TxPowerTrackControl = TRUE; ++ pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter; ++ pRFCalibrateInfo->ThermalValue_IQK = pHalData->EEPROMThermalMeter; ++ pRFCalibrateInfo->ThermalValue_LCK = pHalData->EEPROMThermalMeter; ++ ++ // The index of "0 dB" in SwingTable. ++ if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || ++ pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8703B) ++ { ++ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= OFDM_TABLE_SIZE) ? 30 : defaultSwingIndex; ++ pRFCalibrateInfo->DefaultCckIndex = 20; ++ } ++ else if(pDM_Odm->SupportICType == ODM_RTL8188F) //add by Mingzhi.Guo 2015-03-23 ++ { ++ pRFCalibrateInfo->DefaultOfdmIndex =28; //OFDM: -1dB ++ pRFCalibrateInfo->DefaultCckIndex =20; //CCK:-6dB ++ } ++ else ++ { ++ pRFCalibrateInfo->DefaultOfdmIndex = (defaultSwingIndex >= TXSCALE_TABLE_SIZE) ? 24 : defaultSwingIndex; ++ pRFCalibrateInfo->DefaultCckIndex = 24; ++ } ++ ++ pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex; ++ pRFCalibrateInfo->CCK_index = pRFCalibrateInfo->DefaultCckIndex; ++ ++ for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) ++ { ++ pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex; ++ pRFCalibrateInfo->DeltaPowerIndex[p] = 0; ++ pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0; ++ pRFCalibrateInfo->PowerIndexOffset[p] = 0; ++ pRFCalibrateInfo->KfreeOffset[p] = 0; ++ } ++ pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //add by Mingzhi.Guo ++ pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //add by Mingzhi.Guo ++ ++} ++ ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ) ++{ ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ switch (pDM_Odm->SupportPlatform) ++ { ++ case ODM_WIN: ++ odm_TXPowerTrackingCheckMP(pDM_Odm); ++ break; ++ ++ case ODM_CE: ++ odm_TXPowerTrackingCheckCE(pDM_Odm); ++ break; ++ ++ case ODM_AP: ++ odm_TXPowerTrackingCheckAP(pDM_Odm); ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ #if ((RTL8188F_SUPPORT == 1)) ++ rtl8192c_odm_CheckTXPowerTracking(Adapter); ++ #endif ++ ++ #if(RTL8188E_SUPPORT==1) ++ ++ if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ { ++ return; ++ } ++ ++ if(!pRFCalibrateInfo->TM_Trigger) //at least delay 1 sec ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ //DBG_8192C("Trigger 92C Thermal Meter!!\n"); ++ ++ pRFCalibrateInfo->TM_Trigger = 1; ++ return; ++ ++ } ++ else ++ { ++ //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); ++ odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); ++ pRFCalibrateInfo->TM_Trigger = 0; ++ } ++ #endif ++#endif ++} ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if(*pDM_Odm->pIsFcsModeEnable) ++ return; ++ ++ if (ODM_CheckPowerStatus(Adapter) == FALSE) ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>ODM_CheckPowerStatus() return FALSE\n")); ++ return; ++ } ++ ++ if(IS_HARDWARE_TYPE_8821B(Adapter)) // TODO: Don't Do PowerTracking ++ return; ++ ++// #if(RTL8192D_SUPPORT==1) ++// if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) ++ if (IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter)) ++ odm_TXPowerTrackingThermalMeterCheck(Adapter); ++ else { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE\n")); ++ } ++// #endif ++#endif ++ ++} ++ ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ) ++{ ++return; ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++odm_TXPowerTrackingDirectCall( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_TXPowerTrackingCallback_ThermalMeter(Adapter); ++} ++ ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ) ++{ ++#ifndef AP_BUILD_WORKAROUND ++ static u1Byte TM_Trigger = 0; ++ ++ if(!(GET_HAL_DATA(Adapter)->DM_OutSrc.SupportAbility & ODM_RF_TX_PWR_TRACK)) ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ++ ("===>odm_TXPowerTrackingThermalMeterCheck(),pMgntInfo->bTXPowerTracking is FALSE, return!!\n")); ++ return; ++ } ++ ++ if(!TM_Trigger) //at least delay 1 sec ++ { ++ if (IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) || ++ IS_HARDWARE_TYPE_8723B(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8703B(Adapter)) ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); ++ else ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger Thermal Meter!!\n")); ++ ++ TM_Trigger = 1; ++ return; ++ } ++ else ++ { ++ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); ++ odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. ++ TM_Trigger = 0; ++ } ++#endif ++} ++ ++#endif //end #ifMP ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_win.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_win.h +new file mode 100644 +index 0000000..0ecb317 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_powertracking_win.h +@@ -0,0 +1,265 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMPOWERTRACKING_H__ ++#define __PHYDMPOWERTRACKING_H__ ++ ++#define POWRTRACKING_VERSION "1.1" ++ ++#define DPK_DELTA_MAPPING_NUM 13 ++#define index_mapping_HP_NUM 15 ++#define TXSCALE_TABLE_SIZE 37 ++#define TXPWR_TRACK_TABLE_SIZE 30 ++#define DELTA_SWINGIDX_SIZE 30 ++#define BAND_NUM 3 ++#define MAX_RF_PATH 4 ++#define CCK_TABLE_SIZE_88F 21 ++ ++ ++#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck ++ ++#define IQK_Matrix_Settings_NUM 14+24+21 // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G ++#define AVG_THERMAL_NUM 8 ++#define HP_THERMAL_NUM 8 ++#define IQK_Matrix_REG_NUM 8 ++#define IQK_MAC_REG_NUM 4 ++#define IQK_ADDA_REG_NUM 16 ++ ++#define IQK_BB_REG_NUM 9 ++ ++ ++extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE]; ++extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; ++ ++extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE]; ++extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8]; ++extern u1Byte CCKSwingTable_Ch1_Ch14_88F[CCK_TABLE_SIZE_88F][16]; ++ ++extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; ++ ++// <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. ++static u1Byte DeltaSwingTableIdx_2GA_P_8188E[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; ++static u1Byte DeltaSwingTableIdx_2GA_N_8188E[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; ++ ++VOID ++ODM_TXPowerTrackingCheck( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingCheckAP( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingThermalMeterInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++odm_TXPowerTrackingCheckMP( ++ IN PVOID pDM_VOID ++ ); ++ ++ ++VOID ++odm_TXPowerTrackingCheckCE( ++ IN PVOID pDM_VOID ++ ); ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ++ ++VOID ++odm_TXPowerTrackingThermalMeterCheck( ++ IN PADAPTER Adapter ++ ); ++ ++#endif ++ ++typedef struct _IQK_MATRIX_REGS_SETTING{ ++ BOOLEAN bIQKDone; ++ s4Byte Value[3][IQK_Matrix_REG_NUM]; ++ BOOLEAN bBWIqkResultSaved[3]; ++}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; ++ ++typedef struct ODM_RF_Calibration_Structure ++{ ++ //for tx power tracking ++ ++ u4Byte RegA24; // for TempCCK ++ s4Byte RegE94; ++ s4Byte RegE9C; ++ s4Byte RegEB4; ++ s4Byte RegEBC; ++ //u1Byte bTXPowerTracking; ++ u1Byte TXPowercount; ++ BOOLEAN bTXPowerTrackingInit; ++ BOOLEAN bTXPowerTracking; ++ u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default ++ u1Byte TM_Trigger; ++ u1Byte InternalPA5G[2]; //pathA / pathB ++ ++ u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 ++ u1Byte ThermalValue; ++ u1Byte ThermalValue_LCK; ++ u1Byte ThermalValue_IQK; ++ u1Byte ThermalValue_AVG[AVG_THERMAL_NUM]; ++ u1Byte ThermalValue_AVG_index; ++ u1Byte ThermalValue_RxGain; ++ ++ BOOLEAN bReloadtxpowerindex; ++ u1Byte bRfPiEnable; ++ u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug ++ ++ ++ //------------------------- Tx power Tracking -------------------------// ++ u1Byte bCCKinCH14; ++ u1Byte CCK_index; ++ u1Byte OFDM_index[MAX_RF_PATH]; ++ s1Byte PowerIndexOffset[MAX_RF_PATH]; ++ s1Byte DeltaPowerIndex[MAX_RF_PATH]; ++ s1Byte DeltaPowerIndexLast[MAX_RF_PATH]; ++ BOOLEAN bTxPowerChanged; ++ ++ u1Byte ThermalValue_HP[HP_THERMAL_NUM]; ++ u1Byte ThermalValue_HP_index; ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; ++ u1Byte Delta_LCK; ++ s1Byte BBSwingDiff2G, BBSwingDiff5G; // Unit: dB ++ u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GCCKD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GC_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_P[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GD_N[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GC_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_5GD_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE]; ++ u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE]; ++ ++ u1Byte BbSwingIdxOfdm[MAX_RF_PATH]; ++ u1Byte BbSwingIdxOfdmCurrent; ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ u1Byte BbSwingIdxOfdmBase[MAX_RF_PATH]; ++#else ++ u1Byte BbSwingIdxOfdmBase; ++#endif ++ BOOLEAN BbSwingFlagOfdm; ++ u1Byte BbSwingIdxCck; ++ u1Byte BbSwingIdxCckCurrent; ++ u1Byte BbSwingIdxCckBase; ++ u1Byte DefaultOfdmIndex; ++ u1Byte DefaultCckIndex; ++ BOOLEAN BbSwingFlagCck; ++ ++ s1Byte Absolute_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_OFDMSwingIdx[MAX_RF_PATH]; ++ s1Byte Remnant_CCKSwingIdx; ++ s1Byte Modify_TxAGC_Value; /*Remnat compensate value at TxAGC */ ++ BOOLEAN Modify_TxAGC_Flag_PathA; ++ BOOLEAN Modify_TxAGC_Flag_PathB; ++ BOOLEAN Modify_TxAGC_Flag_PathC; ++ BOOLEAN Modify_TxAGC_Flag_PathD; ++ BOOLEAN Modify_TxAGC_Flag_PathA_CCK; ++ ++ s1Byte KfreeOffset[MAX_RF_PATH]; ++ ++ //--------------------------------------------------------------------// ++ ++ //for IQK ++ u4Byte RegC04; ++ u4Byte Reg874; ++ u4Byte RegC08; ++ u4Byte RegB68; ++ u4Byte RegB6C; ++ u4Byte Reg870; ++ u4Byte Reg860; ++ u4Byte Reg864; ++ ++ BOOLEAN bIQKInitialized; ++ BOOLEAN bLCKInProgress; ++ BOOLEAN bAntennaDetected; ++ BOOLEAN bNeedIQK; ++ BOOLEAN bIQKInProgress; ++ u1Byte Delta_IQK; ++ u4Byte ADDA_backup[IQK_ADDA_REG_NUM]; ++ u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte IQK_BB_backup_recover[9]; ++ u4Byte IQK_BB_backup[IQK_BB_REG_NUM]; ++ u4Byte TxIQC_8723B[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ ++ u4Byte RxIQC_8723B[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ ++ u4Byte TxIQC_8703B[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ ++ u4Byte RxIQC_8703B[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ ++ ++ ++ ++ // IQK time measurement ++ u8Byte IQK_StartTime; ++ u8Byte IQK_ProgressingTime; ++ u4Byte LOK_Result; ++ ++ //for APK ++ u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a ++ u1Byte bAPKdone; ++ u1Byte bAPKThermalMeterIgnore; ++ ++ // DPK ++ BOOLEAN bDPKFail; ++ u1Byte bDPdone; ++ u1Byte bDPPathAOK; ++ u1Byte bDPPathBOK; ++ ++ u4Byte TxLOK[2]; ++ u4Byte DpkTxAGC; ++ s4Byte DpkGain; ++ u4Byte DpkThermal[4]; ++ ++ s1Byte Modify_TxAGC_Value_OFDM; ++ s1Byte Modify_TxAGC_Value_CCK; ++}ODM_RF_CAL_T,*PODM_RF_CAL_T; ++ ++ ++ ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_pre_define.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_pre_define.h +new file mode 100644 +index 0000000..c64e0d4 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_pre_define.h +@@ -0,0 +1,615 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __PHYDMPREDEFINE_H__ ++#define __PHYDMPREDEFINE_H__ ++ ++//1 ============================================================ ++//1 Definition ++//1 ============================================================ ++ ++//Max path of IC ++#define MAX_PATH_NUM_92CS 2 ++#define MAX_PATH_NUM_8188E 1 ++#define MAX_PATH_NUM_8192E 2 ++#define MAX_PATH_NUM_8723B 1 ++#define MAX_PATH_NUM_8812A 2 ++#define MAX_PATH_NUM_8821A 1 ++#define MAX_PATH_NUM_8814A 4 ++#define MAX_PATH_NUM_8822B 2 ++#define MAX_PATH_NUM_8821B 2 ++#define MAX_PATH_NUM_8703B 1 ++#define MAX_PATH_NUM_8188F 1 ++ ++//Max RF path ++#define ODM_RF_PATH_MAX 2 ++#define ODM_RF_PATH_MAX_JAGUAR 4 ++ ++//number of entry ++#if(DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ #define ASSOCIATE_ENTRY_NUM MACID_NUM_SW_LIMIT /* Max size of AsocEntry[].*/ ++ #define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM ++#elif(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ #define ASSOCIATE_ENTRY_NUM NUM_STAT ++ #define ODM_ASSOCIATE_ENTRY_NUM (ASSOCIATE_ENTRY_NUM+1) ++#else ++ #define ODM_ASSOCIATE_ENTRY_NUM ((ASSOCIATE_ENTRY_NUM*3)+1) ++#endif ++ ++/* -----MGN rate--------------------------------- */ ++ ++#define ODM_MGN_1M 0x02 ++#define ODM_MGN_2M 0x04 ++#define ODM_MGN_5_5M 0x0b ++#define ODM_MGN_11M 0x16 ++ ++#define ODM_MGN_6M 0x0c ++#define ODM_MGN_9M 0x12 ++#define ODM_MGN_12M 0x18 ++#define ODM_MGN_18M 0x24 ++#define ODM_MGN_24M 0x30 ++#define ODM_MGN_36M 0x48 ++#define ODM_MGN_48M 0x60 ++#define ODM_MGN_54M 0x6c ++ ++/*TxHT = 1*/ ++#define ODM_MGN_MCS0 0x80 ++#define ODM_MGN_MCS1 0x81 ++#define ODM_MGN_MCS2 0x82 ++#define ODM_MGN_MCS3 0x83 ++#define ODM_MGN_MCS4 0x84 ++#define ODM_MGN_MCS5 0x85 ++#define ODM_MGN_MCS6 0x86 ++#define ODM_MGN_MCS7 0x87 ++#define ODM_MGN_MCS8 0x88 ++#define ODM_MGN_MCS9 0x89 ++#define ODM_MGN_MCS10 0x8a ++#define ODM_MGN_MCS11 0x8b ++#define ODM_MGN_MCS12 0x8c ++#define ODM_MGN_MCS13 0x8d ++#define ODM_MGN_MCS14 0x8e ++#define ODM_MGN_MCS15 0x8f ++#define ODM_MGN_VHT1SS_MCS0 0x90 ++#define ODM_MGN_VHT1SS_MCS1 0x91 ++#define ODM_MGN_VHT1SS_MCS2 0x92 ++#define ODM_MGN_VHT1SS_MCS3 0x93 ++#define ODM_MGN_VHT1SS_MCS4 0x94 ++#define ODM_MGN_VHT1SS_MCS5 0x95 ++#define ODM_MGN_VHT1SS_MCS6 0x96 ++#define ODM_MGN_VHT1SS_MCS7 0x97 ++#define ODM_MGN_VHT1SS_MCS8 0x98 ++#define ODM_MGN_VHT1SS_MCS9 0x99 ++#define ODM_MGN_VHT2SS_MCS0 0x9a ++#define ODM_MGN_VHT2SS_MCS1 0x9b ++#define ODM_MGN_VHT2SS_MCS2 0x9c ++#define ODM_MGN_VHT2SS_MCS3 0x9d ++#define ODM_MGN_VHT2SS_MCS4 0x9e ++#define ODM_MGN_VHT2SS_MCS5 0x9f ++#define ODM_MGN_VHT2SS_MCS6 0xa0 ++#define ODM_MGN_VHT2SS_MCS7 0xa1 ++#define ODM_MGN_VHT2SS_MCS8 0xa2 ++#define ODM_MGN_VHT2SS_MCS9 0xa3 ++ ++#define ODM_MGN_MCS0_SG 0xc0 ++#define ODM_MGN_MCS1_SG 0xc1 ++#define ODM_MGN_MCS2_SG 0xc2 ++#define ODM_MGN_MCS3_SG 0xc3 ++#define ODM_MGN_MCS4_SG 0xc4 ++#define ODM_MGN_MCS5_SG 0xc5 ++#define ODM_MGN_MCS6_SG 0xc6 ++#define ODM_MGN_MCS7_SG 0xc7 ++#define ODM_MGN_MCS8_SG 0xc8 ++#define ODM_MGN_MCS9_SG 0xc9 ++#define ODM_MGN_MCS10_SG 0xca ++#define ODM_MGN_MCS11_SG 0xcb ++#define ODM_MGN_MCS12_SG 0xcc ++#define ODM_MGN_MCS13_SG 0xcd ++#define ODM_MGN_MCS14_SG 0xce ++#define ODM_MGN_MCS15_SG 0xcf ++ ++/* -----DESC rate--------------------------------- */ ++ ++#define ODM_RATEMCS15_SG 0x1c ++#define ODM_RATEMCS32 0x20 ++ ++ ++// CCK Rates, TxHT = 0 ++#define ODM_RATE1M 0x00 ++#define ODM_RATE2M 0x01 ++#define ODM_RATE5_5M 0x02 ++#define ODM_RATE11M 0x03 ++// OFDM Rates, TxHT = 0 ++#define ODM_RATE6M 0x04 ++#define ODM_RATE9M 0x05 ++#define ODM_RATE12M 0x06 ++#define ODM_RATE18M 0x07 ++#define ODM_RATE24M 0x08 ++#define ODM_RATE36M 0x09 ++#define ODM_RATE48M 0x0A ++#define ODM_RATE54M 0x0B ++// MCS Rates, TxHT = 1 ++#define ODM_RATEMCS0 0x0C ++#define ODM_RATEMCS1 0x0D ++#define ODM_RATEMCS2 0x0E ++#define ODM_RATEMCS3 0x0F ++#define ODM_RATEMCS4 0x10 ++#define ODM_RATEMCS5 0x11 ++#define ODM_RATEMCS6 0x12 ++#define ODM_RATEMCS7 0x13 ++#define ODM_RATEMCS8 0x14 ++#define ODM_RATEMCS9 0x15 ++#define ODM_RATEMCS10 0x16 ++#define ODM_RATEMCS11 0x17 ++#define ODM_RATEMCS12 0x18 ++#define ODM_RATEMCS13 0x19 ++#define ODM_RATEMCS14 0x1A ++#define ODM_RATEMCS15 0x1B ++#define ODM_RATEMCS16 0x1C ++#define ODM_RATEMCS17 0x1D ++#define ODM_RATEMCS18 0x1E ++#define ODM_RATEMCS19 0x1F ++#define ODM_RATEMCS20 0x20 ++#define ODM_RATEMCS21 0x21 ++#define ODM_RATEMCS22 0x22 ++#define ODM_RATEMCS23 0x23 ++#define ODM_RATEMCS24 0x24 ++#define ODM_RATEMCS25 0x25 ++#define ODM_RATEMCS26 0x26 ++#define ODM_RATEMCS27 0x27 ++#define ODM_RATEMCS28 0x28 ++#define ODM_RATEMCS29 0x29 ++#define ODM_RATEMCS30 0x2A ++#define ODM_RATEMCS31 0x2B ++#define ODM_RATEVHTSS1MCS0 0x2C ++#define ODM_RATEVHTSS1MCS1 0x2D ++#define ODM_RATEVHTSS1MCS2 0x2E ++#define ODM_RATEVHTSS1MCS3 0x2F ++#define ODM_RATEVHTSS1MCS4 0x30 ++#define ODM_RATEVHTSS1MCS5 0x31 ++#define ODM_RATEVHTSS1MCS6 0x32 ++#define ODM_RATEVHTSS1MCS7 0x33 ++#define ODM_RATEVHTSS1MCS8 0x34 ++#define ODM_RATEVHTSS1MCS9 0x35 ++#define ODM_RATEVHTSS2MCS0 0x36 ++#define ODM_RATEVHTSS2MCS1 0x37 ++#define ODM_RATEVHTSS2MCS2 0x38 ++#define ODM_RATEVHTSS2MCS3 0x39 ++#define ODM_RATEVHTSS2MCS4 0x3A ++#define ODM_RATEVHTSS2MCS5 0x3B ++#define ODM_RATEVHTSS2MCS6 0x3C ++#define ODM_RATEVHTSS2MCS7 0x3D ++#define ODM_RATEVHTSS2MCS8 0x3E ++#define ODM_RATEVHTSS2MCS9 0x3F ++#define ODM_RATEVHTSS3MCS0 0x40 ++#define ODM_RATEVHTSS3MCS1 0x41 ++#define ODM_RATEVHTSS3MCS2 0x42 ++#define ODM_RATEVHTSS3MCS3 0x43 ++#define ODM_RATEVHTSS3MCS4 0x44 ++#define ODM_RATEVHTSS3MCS5 0x45 ++#define ODM_RATEVHTSS3MCS6 0x46 ++#define ODM_RATEVHTSS3MCS7 0x47 ++#define ODM_RATEVHTSS3MCS8 0x48 ++#define ODM_RATEVHTSS3MCS9 0x49 ++#define ODM_RATEVHTSS4MCS0 0x4A ++#define ODM_RATEVHTSS4MCS1 0x4B ++#define ODM_RATEVHTSS4MCS2 0x4C ++#define ODM_RATEVHTSS4MCS3 0x4D ++#define ODM_RATEVHTSS4MCS4 0x4E ++#define ODM_RATEVHTSS4MCS5 0x4F ++#define ODM_RATEVHTSS4MCS6 0x50 ++#define ODM_RATEVHTSS4MCS7 0x51 ++#define ODM_RATEVHTSS4MCS8 0x52 ++#define ODM_RATEVHTSS4MCS9 0x53 ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9+1) ++#else ++ #if (RTL8192E_SUPPORT == 1) ++ #define ODM_NUM_RATE_IDX (ODM_RATEMCS15+1) ++ #elif (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) ++ #define ODM_NUM_RATE_IDX (ODM_RATEMCS7+1) ++ #elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) ++ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS1MCS9+1) ++ #elif (RTL8812A_SUPPORT == 1) ++ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS2MCS9+1) ++ #elif(RTL8814A_SUPPORT == 1) ++ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS3MCS9+1) ++ #else ++ #define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9+1) ++ #endif ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#define CONFIG_SFW_SUPPORTED ++#endif ++ ++//1 ============================================================ ++//1 enumeration ++//1 ============================================================ ++ ++ ++// ODM_CMNINFO_INTERFACE ++typedef enum tag_ODM_Support_Interface_Definition ++{ ++ ODM_ITRF_PCIE = 0x1, ++ ODM_ITRF_USB = 0x2, ++ ODM_ITRF_SDIO = 0x4, ++ ODM_ITRF_ALL = 0x7, ++}ODM_INTERFACE_E; ++ ++// ODM_CMNINFO_IC_TYPE ++typedef enum tag_ODM_Support_IC_Type_Definition ++{ ++ ODM_RTL8192S = BIT0, ++ ODM_RTL8192C = BIT1, ++ ODM_RTL8192D = BIT2, ++ ODM_RTL8723A = BIT3, ++ ODM_RTL8188E = BIT4, ++ ODM_RTL8812 = BIT5, ++ ODM_RTL8821 = BIT6, ++ ODM_RTL8192E = BIT7, ++ ODM_RTL8723B = BIT8, ++ ODM_RTL8814A = BIT9, ++ ODM_RTL8881A = BIT10, ++ ODM_RTL8821B = BIT11, ++ ODM_RTL8822B = BIT12, ++ ODM_RTL8703B = BIT13, ++ ODM_RTL8195A = BIT14, ++ ODM_RTL8188F = BIT15 ++}ODM_IC_TYPE_E; ++ ++ ++ ++ ++#define ODM_IC_11N_SERIES (ODM_RTL8192S|ODM_RTL8192C|ODM_RTL8192D|ODM_RTL8723A|ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8703B|ODM_RTL8188F) ++#define ODM_IC_11AC_SERIES (ODM_RTL8812|ODM_RTL8821|ODM_RTL8814A|ODM_RTL8881A|ODM_RTL8821B|ODM_RTL8822B) ++#define ODM_IC_TXBF_SUPPORT (ODM_RTL8192E|ODM_RTL8812|ODM_RTL8821|ODM_RTL8814A|ODM_RTL8881A|ODM_RTL8822B) ++#define ODM_IC_11N_GAIN_IDX_EDCCA (ODM_RTL8195A|ODM_RTL8703B|ODM_RTL8188F) ++#define ODM_IC_11AC_GAIN_IDX_EDCCA (ODM_RTL8814A|ODM_RTL8822B) ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++#ifdef RTK_AC_SUPPORT ++#define ODM_IC_11AC_SERIES_SUPPORT 1 ++#else ++#define ODM_IC_11AC_SERIES_SUPPORT 0 ++#endif ++ ++#define ODM_IC_11N_SERIES_SUPPORT 1 ++#define ODM_CONFIG_BT_COEXIST 0 ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++#define ODM_IC_11AC_SERIES_SUPPORT 1 ++#define ODM_IC_11N_SERIES_SUPPORT 1 ++#define ODM_CONFIG_BT_COEXIST 1 ++ ++#else ++ ++#if((RTL8192C_SUPPORT == 1) || (RTL8192D_SUPPORT == 1) || (RTL8723A_SUPPORT == 1) || (RTL8188E_SUPPORT == 1) ||\ ++(RTL8723B_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8195A_SUPPORT == 1) || (RTL8703B_SUPPORT == 1) || \ ++(RTL8188F_SUPPORT == 1)) ++#define ODM_IC_11N_SERIES_SUPPORT 1 ++#define ODM_IC_11AC_SERIES_SUPPORT 0 ++#else ++#define ODM_IC_11N_SERIES_SUPPORT 0 ++#define ODM_IC_11AC_SERIES_SUPPORT 1 ++#endif ++ ++#ifdef CONFIG_BT_COEXIST ++#define ODM_CONFIG_BT_COEXIST 1 ++#else ++#define ODM_CONFIG_BT_COEXIST 0 ++#endif ++ ++#endif ++ ++ ++//ODM_CMNINFO_CUT_VER ++typedef enum tag_ODM_Cut_Version_Definition ++{ ++ ODM_CUT_A = 0, ++ ODM_CUT_B = 1, ++ ODM_CUT_C = 2, ++ ODM_CUT_D = 3, ++ ODM_CUT_E = 4, ++ ODM_CUT_F = 5, ++ ++ ODM_CUT_I = 8, ++ ODM_CUT_J = 9, ++ ODM_CUT_K = 10, ++ ODM_CUT_TEST = 15, ++}ODM_CUT_VERSION_E; ++ ++// ODM_CMNINFO_FAB_VER ++typedef enum tag_ODM_Fab_Version_Definition ++{ ++ ODM_TSMC = 0, ++ ODM_UMC = 1, ++}ODM_FAB_E; ++ ++// ODM_CMNINFO_RF_TYPE ++// ++// For example 1T2R (A+AB = BIT0|BIT4|BIT5) ++// ++typedef enum tag_ODM_RF_Path_Bit_Definition ++{ ++ ODM_RF_A = BIT0, ++ ODM_RF_B = BIT1, ++ ODM_RF_C = BIT2, ++ ODM_RF_D = BIT3, ++}ODM_RF_PATH_E; ++ ++typedef enum tag_PHYDM_RF_TX_NUM { ++ ODM_1T = 1, ++ ODM_2T = 2, ++ ODM_3T = 3, ++ ODM_4T = 4, ++} ODM_RF_TX_NUM_E; ++ ++typedef enum tag_ODM_RF_Type_Definition { ++ ODM_1T1R, ++ ODM_1T2R, ++ ODM_2T2R, ++ ODM_2T2R_GREEN, ++ ODM_2T3R, ++ ODM_2T4R, ++ ODM_3T3R, ++ ODM_3T4R, ++ ODM_4T4R, ++ ODM_XTXR ++}ODM_RF_TYPE_E; ++ ++ ++typedef enum tag_ODM_MAC_PHY_Mode_Definition ++{ ++ ODM_SMSP = 0, ++ ODM_DMSP = 1, ++ ODM_DMDP = 2, ++}ODM_MAC_PHY_MODE_E; ++ ++ ++typedef enum tag_BT_Coexist_Definition ++{ ++ ODM_BT_BUSY = 1, ++ ODM_BT_ON = 2, ++ ODM_BT_OFF = 3, ++ ODM_BT_NONE = 4, ++}ODM_BT_COEXIST_E; ++ ++// ODM_CMNINFO_OP_MODE ++typedef enum tag_Operation_Mode_Definition ++{ ++ ODM_NO_LINK = BIT0, ++ ODM_LINK = BIT1, ++ ODM_SCAN = BIT2, ++ ODM_POWERSAVE = BIT3, ++ ODM_AP_MODE = BIT4, ++ ODM_CLIENT_MODE = BIT5, ++ ODM_AD_HOC = BIT6, ++ ODM_WIFI_DIRECT = BIT7, ++ ODM_WIFI_DISPLAY = BIT8, ++}ODM_OPERATION_MODE_E; ++ ++// ODM_CMNINFO_WM_MODE ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++typedef enum tag_Wireless_Mode_Definition ++{ ++ ODM_WM_UNKNOW = 0x0, ++ ODM_WM_B = BIT0, ++ ODM_WM_G = BIT1, ++ ODM_WM_A = BIT2, ++ ODM_WM_N24G = BIT3, ++ ODM_WM_N5G = BIT4, ++ ODM_WM_AUTO = BIT5, ++ ODM_WM_AC = BIT6, ++}ODM_WIRELESS_MODE_E; ++#else ++typedef enum tag_Wireless_Mode_Definition ++{ ++ ODM_WM_UNKNOWN = 0x00,/*0x0*/ ++ ODM_WM_A = BIT0, /* 0x1*/ ++ ODM_WM_B = BIT1, /* 0x2*/ ++ ODM_WM_G = BIT2,/* 0x4*/ ++ ODM_WM_AUTO = BIT3,/* 0x8*/ ++ ODM_WM_N24G = BIT4,/* 0x10*/ ++ ODM_WM_N5G = BIT5,/* 0x20*/ ++ ODM_WM_AC_5G = BIT6,/* 0x40*/ ++ ODM_WM_AC_24G = BIT7,/* 0x80*/ ++ ODM_WM_AC_ONLY = BIT8,/* 0x100*/ ++ ODM_WM_MAX = BIT11/* 0x800*/ ++ ++}ODM_WIRELESS_MODE_E; ++#endif ++ ++// ODM_CMNINFO_BAND ++typedef enum tag_Band_Type_Definition ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ ODM_BAND_2_4G = BIT0, ++ ODM_BAND_5G = BIT1, ++#else ++ ODM_BAND_2_4G = 0, ++ ODM_BAND_5G, ++ ODM_BAND_ON_BOTH, ++ ODM_BANDMAX ++#endif ++}ODM_BAND_TYPE_E; ++ ++ ++// ODM_CMNINFO_SEC_CHNL_OFFSET ++typedef enum tag_Secondary_Channel_Offset_Definition ++{ ++ ODM_DONT_CARE = 0, ++ ODM_BELOW = 1, ++ ODM_ABOVE = 2 ++}ODM_SEC_CHNL_OFFSET_E; ++ ++// ODM_CMNINFO_SEC_MODE ++typedef enum tag_Security_Definition ++{ ++ ODM_SEC_OPEN = 0, ++ ODM_SEC_WEP40 = 1, ++ ODM_SEC_TKIP = 2, ++ ODM_SEC_RESERVE = 3, ++ ODM_SEC_AESCCMP = 4, ++ ODM_SEC_WEP104 = 5, ++ ODM_WEP_WPA_MIXED = 6, // WEP + WPA ++ ODM_SEC_SMS4 = 7, ++}ODM_SECURITY_E; ++ ++// ODM_CMNINFO_BW ++typedef enum tag_Bandwidth_Definition ++{ ++ ODM_BW20M = 0, ++ ODM_BW40M = 1, ++ ODM_BW80M = 2, ++ ODM_BW160M = 3, ++ ODM_BW5M = 4, ++ ODM_BW10M = 5, ++ ODM_BW_MAX = 6 ++}ODM_BW_E; ++ ++// ODM_CMNINFO_CHNL ++ ++// ODM_CMNINFO_BOARD_TYPE ++typedef enum tag_Board_Definition ++{ ++ ODM_BOARD_DEFAULT = 0, // The DEFAULT case. ++ ODM_BOARD_MINICARD = BIT(0), // 0 = non-mini card, 1= mini card. ++ ODM_BOARD_SLIM = BIT(1), // 0 = non-slim card, 1 = slim card ++ ODM_BOARD_BT = BIT(2), // 0 = without BT card, 1 = with BT ++ ODM_BOARD_EXT_PA = BIT(3), // 0 = no 2G ext-PA, 1 = existing 2G ext-PA ++ ODM_BOARD_EXT_LNA = BIT(4), // 0 = no 2G ext-LNA, 1 = existing 2G ext-LNA ++ ODM_BOARD_EXT_TRSW = BIT(5), // 0 = no ext-TRSW, 1 = existing ext-TRSW ++ ODM_BOARD_EXT_PA_5G = BIT(6), // 0 = no 5G ext-PA, 1 = existing 5G ext-PA ++ ODM_BOARD_EXT_LNA_5G= BIT(7), // 0 = no 5G ext-LNA, 1 = existing 5G ext-LNA ++}ODM_BOARD_TYPE_E; ++ ++typedef enum tag_ODM_Package_Definition ++{ ++ ODM_PACKAGE_DEFAULT = 0, ++ ODM_PACKAGE_QFN68 = BIT(0), ++ ODM_PACKAGE_TFBGA90 = BIT(1), ++ ODM_PACKAGE_TFBGA79 = BIT(2), ++}ODM_Package_TYPE_E; ++ ++typedef enum tag_ODM_TYPE_GPA_Definition { ++ TYPE_GPA0 = 0x0000, ++ TYPE_GPA1 = 0x0055, ++ TYPE_GPA2 = 0x00AA, ++ TYPE_GPA3 = 0x00FF, ++ TYPE_GPA4 = 0x5500, ++ TYPE_GPA5 = 0x5555, ++ TYPE_GPA6 = 0x55AA, ++ TYPE_GPA7 = 0x55FF, ++ TYPE_GPA8 = 0xAA00, ++ TYPE_GPA9 = 0xAA55, ++ TYPE_GPA10 = 0xAAAA, ++ TYPE_GPA11 = 0xAAFF, ++ TYPE_GPA12 = 0xFF00, ++ TYPE_GPA13 = 0xFF55, ++ TYPE_GPA14 = 0xFFAA, ++ TYPE_GPA15 = 0xFFFF, ++}ODM_TYPE_GPA_E; ++ ++typedef enum tag_ODM_TYPE_APA_Definition { ++ TYPE_APA0 = 0x0000, ++ TYPE_APA1 = 0x0055, ++ TYPE_APA2 = 0x00AA, ++ TYPE_APA3 = 0x00FF, ++ TYPE_APA4 = 0x5500, ++ TYPE_APA5 = 0x5555, ++ TYPE_APA6 = 0x55AA, ++ TYPE_APA7 = 0x55FF, ++ TYPE_APA8 = 0xAA00, ++ TYPE_APA9 = 0xAA55, ++ TYPE_APA10 = 0xAAAA, ++ TYPE_APA11 = 0xAAFF, ++ TYPE_APA12 = 0xFF00, ++ TYPE_APA13 = 0xFF55, ++ TYPE_APA14 = 0xFFAA, ++ TYPE_APA15 = 0xFFFF, ++}ODM_TYPE_APA_E; ++ ++typedef enum tag_ODM_TYPE_GLNA_Definition { ++ TYPE_GLNA0 = 0x0000, ++ TYPE_GLNA1 = 0x0055, ++ TYPE_GLNA2 = 0x00AA, ++ TYPE_GLNA3 = 0x00FF, ++ TYPE_GLNA4 = 0x5500, ++ TYPE_GLNA5 = 0x5555, ++ TYPE_GLNA6 = 0x55AA, ++ TYPE_GLNA7 = 0x55FF, ++ TYPE_GLNA8 = 0xAA00, ++ TYPE_GLNA9 = 0xAA55, ++ TYPE_GLNA10 = 0xAAAA, ++ TYPE_GLNA11 = 0xAAFF, ++ TYPE_GLNA12 = 0xFF00, ++ TYPE_GLNA13 = 0xFF55, ++ TYPE_GLNA14 = 0xFFAA, ++ TYPE_GLNA15 = 0xFFFF, ++}ODM_TYPE_GLNA_E; ++ ++typedef enum tag_ODM_TYPE_ALNA_Definition { ++ TYPE_ALNA0 = 0x0000, ++ TYPE_ALNA1 = 0x0055, ++ TYPE_ALNA2 = 0x00AA, ++ TYPE_ALNA3 = 0x00FF, ++ TYPE_ALNA4 = 0x5500, ++ TYPE_ALNA5 = 0x5555, ++ TYPE_ALNA6 = 0x55AA, ++ TYPE_ALNA7 = 0x55FF, ++ TYPE_ALNA8 = 0xAA00, ++ TYPE_ALNA9 = 0xAA55, ++ TYPE_ALNA10 = 0xAAAA, ++ TYPE_ALNA11 = 0xAAFF, ++ TYPE_ALNA12 = 0xFF00, ++ TYPE_ALNA13 = 0xFF55, ++ TYPE_ALNA14 = 0xFFAA, ++ TYPE_ALNA15 = 0xFFFF, ++}ODM_TYPE_ALNA_E; ++ ++ ++typedef enum _ODM_RF_RADIO_PATH { ++ ODM_RF_PATH_A = 0, //Radio Path A ++ ODM_RF_PATH_B = 1, //Radio Path B ++ ODM_RF_PATH_C = 2, //Radio Path C ++ ODM_RF_PATH_D = 3, //Radio Path D ++ ODM_RF_PATH_AB, ++ ODM_RF_PATH_AC, ++ ODM_RF_PATH_AD, ++ ODM_RF_PATH_BC, ++ ODM_RF_PATH_BD, ++ ODM_RF_PATH_CD, ++ ODM_RF_PATH_ABC, ++ ODM_RF_PATH_ACD, ++ ODM_RF_PATH_BCD, ++ ODM_RF_PATH_ABCD, ++ // ODM_RF_PATH_MAX, //Max RF number 90 support ++} ODM_RF_RADIO_PATH_E, *PODM_RF_RADIO_PATH_E; ++ ++typedef enum _ODM_PARAMETER_INIT { ++ ODM_PRE_SETTING = 0, ++ ODM_POST_SETTING = 1, ++} ODM_PARAMETER_INIT_E; ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_precomp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_precomp.h +new file mode 100644 +index 0000000..99f96a7 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_precomp.h +@@ -0,0 +1,320 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __ODM_PRECOMP_H__ ++#define __ODM_PRECOMP_H__ ++ ++#include "phydm_types.h" ++#include "phydm_features.h" ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#include "Precomp.h" // We need to include mp_precomp.h due to batch file setting. ++#else ++#define TEST_FALG___ 1 ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE ==ODM_CE) ++#define RTL8192CE_SUPPORT 0 ++#define RTL8192CU_SUPPORT 0 ++#define RTL8192C_SUPPORT 0 ++ ++#define RTL8192DE_SUPPORT 0 ++#define RTL8192DU_SUPPORT 0 ++#define RTL8192D_SUPPORT 0 ++ ++#define RTL8723AU_SUPPORT 0 ++#define RTL8723AS_SUPPORT 0 ++#define RTL8723AE_SUPPORT 0 ++#define RTL8723A_SUPPORT 0 ++#define RTL8723_FPGA_VERIFICATION 0 ++#endif ++ ++//2 Config Flags and Structs - defined by each ODM Type ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #include "../8192cd_cfg.h" ++ #include "../odm_inc.h" ++ ++ #include "../8192cd.h" ++ #include "../8192cd_util.h" ++ #ifdef _BIG_ENDIAN_ ++ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG ++ #else ++ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE ++ #endif ++ ++ #ifdef AP_BUILD_WORKAROUND ++ #include "../8192cd_headers.h" ++ #include "../8192cd_debug.h" ++ #endif ++ ++#elif (DM_ODM_SUPPORT_TYPE ==ODM_CE) ++ #define __PACK ++ #define __WLAN_ATTRIB_PACK__ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "mp_precomp.h" ++ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE ++ #define __PACK ++ #define __WLAN_ATTRIB_PACK__ ++#endif ++ ++//2 OutSrc Header Files ++ ++#include "phydm.h" ++#include "phydm_hwconfig.h" ++#include "phydm_debug.h" ++#include "phydm_regdefine11ac.h" ++#include "phydm_regdefine11n.h" ++#include "phydm_interface.h" ++#include "phydm_reg.h" ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_CE) ++#define RTL8821B_SUPPORT 0 ++#define RTL8822B_SUPPORT 0 ++ ++VOID ++PHY_SetTxPowerLimit( ++ IN PDM_ODM_T pDM_Odm, ++ IN u8 *Regulation, ++ IN u8 *Band, ++ IN u8 *Bandwidth, ++ IN u8 *RateSection, ++ IN u8 *RfPath, ++ IN u8 *Channel, ++ IN u8 *PowerLimit ++); ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++#define RTL8821B_SUPPORT 0 ++#define RTL8822B_SUPPORT 0 ++#define RTL8703B_SUPPORT 0 ++#define RTL8188F_SUPPORT 0 ++#endif ++ ++#if RTL8188E_SUPPORT == 1 ++#define RTL8188E_T_SUPPORT 1 ++#ifdef CONFIG_SFW_SUPPORTED ++#define RTL8188E_S_SUPPORT 1 ++#else ++#define RTL8188E_S_SUPPORT 0 ++#endif ++#endif ++ ++#if (RTL8188E_SUPPORT==1) ++#include "rtl8188e/hal8188erateadaptive.h"//for RA,Power training ++#include "rtl8188e/halhwimg8188e_mac.h" ++#include "rtl8188e/halhwimg8188e_rf.h" ++#include "rtl8188e/halhwimg8188e_bb.h" ++#include "rtl8188e/halhwimg8188e_t_fw.h" ++#include "rtl8188e/halhwimg8188e_s_fw.h" ++#include "rtl8188e/phydm_regconfig8188e.h" ++#include "rtl8188e/phydm_rtl8188e.h" ++#include "rtl8188e/hal8188ereg.h" ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8188e_hal.h" ++ #include "rtl8188e/halphyrf_8188e_ce.h" ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8188e/halphyrf_8188e_win.h" ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #include "rtl8188e/halphyrf_8188e_ap.h" ++#endif ++#endif //88E END ++ ++#if (RTL8192E_SUPPORT==1) ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8192e/halphyrf_8192e_win.h" /*FOR_8192E_IQK*/ ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #include "rtl8192e/halphyrf_8192e_ap.h" /*FOR_8192E_IQK*/ ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8192e/halphyrf_8192e_ce.h" /*FOR_8192E_IQK*/ ++ #endif ++ ++#include "rtl8192e/phydm_rtl8192e.h" //FOR_8192E_IQK ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ #include "rtl8192e/halhwimg8192e_bb.h" ++ #include "rtl8192e/halhwimg8192e_mac.h" ++ #include "rtl8192e/halhwimg8192e_rf.h" ++ #include "rtl8192e/phydm_regconfig8192e.h" ++ #include "rtl8192e/halhwimg8192e_fw.h" ++ #include "rtl8192e/hal8192ereg.h" ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8192e_hal.h" ++#endif ++#endif //92E END ++ ++#if (RTL8812A_SUPPORT==1) ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8812a/halphyrf_8812a_win.h" ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #include "rtl8812a/halphyrf_8812a_ap.h" ++ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8812a/halphyrf_8812a_ce.h" ++ #endif ++ ++ //#include "rtl8812a/HalPhyRf_8812A.h" //FOR_8812_IQK ++ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ #include "rtl8812a/halhwimg8812a_bb.h" ++ #include "rtl8812a/halhwimg8812a_mac.h" ++ #include "rtl8812a/halhwimg8812a_rf.h" ++ #include "rtl8812a/phydm_regconfig8812a.h" ++ #include "rtl8812a/halhwimg8812a_fw.h" ++ #include "rtl8812a/phydm_rtl8812a.h" ++ #endif ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8812a_hal.h" ++ #endif ++ ++#endif //8812 END ++ ++#if (RTL8814A_SUPPORT==1) ++ ++#include "rtl8814a/halhwimg8814a_mac.h" ++#include "rtl8814a/halhwimg8814a_rf.h" ++#include "rtl8814a/halhwimg8814a_bb.h" ++#if (DM_ODM_SUPPORT_TYPE != ODM_AP) ++ #include "rtl8814a/halhwimg8814a_fw.h" ++ #include "rtl8814a/phydm_rtl8814a.h" ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8814a/halphyrf_8814a_win.h" ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8814a/halphyrf_8814a_ce.h" ++#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ #include "rtl8814a/halphyrf_8814a_ap.h" ++#endif ++ #include "rtl8814a/phydm_regconfig8814a.h" ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8814a_hal.h" ++ #include "rtl8814a/phydm_iqk_8814a.h" ++#endif ++#endif //8814 END ++ ++#if (RTL8881A_SUPPORT==1)//FOR_8881_IQK ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#include "rtl8821a/phydm_iqk_8821a_win.h" ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#include "rtl8821a/phydm_iqk_8821a_ce.h" ++#else ++#include "rtl8821a/phydm_iqk_8821a_ap.h" ++#endif ++//#include "rtl8881a/HalHWImg8881A_BB.h" ++//#include "rtl8881a/HalHWImg8881A_MAC.h" ++//#include "rtl8881a/HalHWImg8881A_RF.h" ++//#include "rtl8881a/odm_RegConfig8881A.h" ++#endif ++ ++#if (RTL8723B_SUPPORT==1) ++#include "rtl8723b/halhwimg8723b_mac.h" ++#include "rtl8723b/halhwimg8723b_rf.h" ++#include "rtl8723b/halhwimg8723b_bb.h" ++#include "rtl8723b/halhwimg8723b_fw.h" ++#include "rtl8723b/phydm_regconfig8723b.h" ++#include "rtl8723b/phydm_rtl8723b.h" ++#include "rtl8723b/hal8723breg.h" ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8723b/halphyrf_8723b_win.h" ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8723b/halphyrf_8723b_ce.h" ++ #include "rtl8723b/halhwimg8723b_mp.h" ++ #include "rtl8723b_hal.h" ++#endif ++#endif ++ ++#if (RTL8821A_SUPPORT==1) ++#include "rtl8821a/halhwimg8821a_mac.h" ++#include "rtl8821a/halhwimg8821a_rf.h" ++#include "rtl8821a/halhwimg8821a_bb.h" ++#include "rtl8821a/halhwimg8821a_fw.h" ++#include "rtl8821a/phydm_regconfig8821a.h" ++#include "rtl8821a/phydm_rtl8821a.h" ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #include "rtl8821a/halphyrf_8821a_win.h" ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include "rtl8821a/halphyrf_8821a_ce.h" ++ #include "rtl8821a/phydm_iqk_8821a_ce.h"/*for IQK*/ ++ #include "rtl8812a/halphyrf_8812a_ce.h"/*for IQK,LCK,Power-tracking*/ ++ #include "rtl8812a_hal.h" ++#else ++#endif ++#endif ++ ++#if (RTL8821B_SUPPORT==1) ++#include "rtl8821b/halhwimg8821b_mac.h" ++#include "rtl8821b/halhwimg8821b_rf.h" ++#include "rtl8821b/halhwimg8821b_bb.h" ++#include "rtl8821b/halhwimg8821b_fw.h" ++#include "rtl8821b/phydm_regconfig8821b.h" ++#include "rtl8821b/halhwimg8821b_testchip_mac.h" ++#include "rtl8821b/halhwimg8821b_testchip_rf.h" ++#include "rtl8821b/halhwimg8821b_testchip_bb.h" ++#include "rtl8821b/halhwimg8821b_testchip_fw.h" ++#include "rtl8821b/halphyrf_8821b.h" ++#endif ++ ++#if (RTL8822B_SUPPORT==1) ++#include "rtl8822b/halhwimg8822b_mac.h" ++#include "rtl8822b/halhwimg8822b_rf.h" ++#include "rtl8822b/halhwimg8822b_bb.h" ++/*#include "rtl8822b/halhwimg8822b_fw.h"*/ ++#include "rtl8822b/phydm_regconfig8822b.h" ++#include "rtl8822b/halphyrf_8822b.h" ++#include "rtl8822b/phydm_rtl8822b.h" ++#include "rtl8822b/phydm_hal_api8822b.h" ++#include "rtl8822b/version_rtl8822b.h" ++#endif ++ ++#if (RTL8703B_SUPPORT==1) ++#include "rtl8703b/phydm_regconfig8703b.h" ++#include "rtl8703b/halhwimg8703b_mac.h" ++#include "rtl8703b/halhwimg8703b_rf.h" ++#include "rtl8703b/halhwimg8703b_bb.h" ++#include "rtl8703b/halhwimg8703b_fw.h" ++#include "rtl8703b/halphyrf_8703b.h" ++#include "rtl8703b/version_rtl8703b.h" ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#include "rtl8703b_hal.h" ++#endif ++#endif ++ ++#if (RTL8188F_SUPPORT == 1) ++#include "rtl8188f/halhwimg8188f_mac.h" ++#include "rtl8188f/halhwimg8188f_rf.h" ++#include "rtl8188f/halhwimg8188f_bb.h" ++#include "rtl8188f/halhwimg8188f_fw.h" ++#include "rtl8188f/hal8188freg.h" ++#include "rtl8188f/phydm_rtl8188f.h" ++#include "rtl8188f/phydm_regconfig8188f.h" ++#include "rtl8188f/halphyrf_8188f.h" /* for IQK,LCK,Power-tracking */ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#include "rtl8188f_hal.h" ++#endif ++#endif ++ ++#endif // __ODM_PRECOMP_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rainfo.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rainfo.c +new file mode 100644 +index 0000000..5cd2308 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rainfo.c +@@ -0,0 +1,2574 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if (defined(CONFIG_RA_DBG_CMD)) ++VOID ++ODM_C2HRaParaReportHandler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ ++ u1Byte para_idx = CmdBuf[0]; //Retry Penalty, NH, NL ++ u1Byte RateTypeStart = CmdBuf[1]; ++ u1Byte RateTypeLength = CmdLen - 2; ++ u1Byte i; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[ From FW C2H RA Para ] CmdBuf[0]= (( %d ))\n", CmdBuf[0])); ++ ++ if (para_idx == RADBG_RTY_PENALTY) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |RTY Penality Index| \n")); ++ ++ for (i = 0 ; i < (RateTypeLength) ; i++) { ++ if (pRA_Table->is_ra_dbg_init) ++ pRA_Table->RTY_P_default[RateTypeStart + i] = CmdBuf[2 + i]; ++ ++ pRA_Table->RTY_P[RateTypeStart + i] = CmdBuf[2 + i]; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RTY_P[RateTypeStart + i])); ++ } ++ ++ } else if (para_idx == RADBG_N_HIGH) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-High| \n")); ++ ++ ++ } else if (para_idx == RADBG_N_LOW){ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-Low| \n")); ++ ++ } ++ else if (para_idx == RADBG_RATE_UP_RTY_RATIO) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Up RTY Ratio| \n")); ++ ++ for (i = 0 ; i < (RateTypeLength) ; i++) { ++ if (pRA_Table->is_ra_dbg_init) ++ pRA_Table->RATE_UP_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i]; ++ ++ pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i]; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i])); ++ } ++ } else if (para_idx == RADBG_RATE_DOWN_RTY_RATIO) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Down RTY Ratio| \n")); ++ ++ for (i = 0 ; i < (RateTypeLength) ; i++) { ++ if (pRA_Table->is_ra_dbg_init) ++ pRA_Table->RATE_DOWN_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i]; ++ ++ pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i]; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i])); ++ } ++ } else if (para_idx == RADBG_DEBUG_MONITOR1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); ++ if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) { ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RSSI =", CmdBuf[1])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "Rate =", CmdBuf[2] & 0x7f)); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "SGI =", (CmdBuf[2] & 0x80) >> 7)); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "BW =", CmdBuf[3])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "BW_max =", CmdBuf[4])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "multi_rate0 =", CmdBuf[5])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "multi_rate1 =", CmdBuf[6])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "DISRA =", CmdBuf[7])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "VHT_EN =", CmdBuf[8])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "SGI_support =", CmdBuf[9])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "try_ness =", CmdBuf[10])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "pre_rate =", CmdBuf[11])); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RSSI =", CmdBuf[1])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x \n", "BW =", CmdBuf[2])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "DISRA =", CmdBuf[3])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "VHT_EN =", CmdBuf[4])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "Hightest Rate =", CmdBuf[5])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "Lowest Rate =", CmdBuf[6])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "SGI_support =", CmdBuf[7])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "Rate_ID =", CmdBuf[8]));; ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); ++ } else if (para_idx == RADBG_DEBUG_MONITOR2) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); ++ if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RateID =", CmdBuf[1])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "highest_rate =", CmdBuf[2])); ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "lowest_rate =", CmdBuf[3])); ++ ++ for (i = 4 ; i <= 11 ; i++) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("RAMASK = 0x%x \n", CmdBuf[i])); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x%x %x%x %x%x %x%x \n", "RA Mask:", ++ CmdBuf[8], CmdBuf[7], CmdBuf[6], CmdBuf[5], CmdBuf[4], CmdBuf[3], CmdBuf[2], CmdBuf[1])); ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n")); ++ } else if (para_idx == RADBG_DEBUG_MONITOR3) { ++ ++ for (i = 0 ; i < (CmdLen - 1) ; i++) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("content[%d] = %d \n", i, CmdBuf[1 + i])); ++ } else if (para_idx == RADBG_DEBUG_MONITOR4) ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s {%d.%d} \n", "RA Version =", CmdBuf[1], CmdBuf[2])); ++ ++} ++ ++VOID ++odm_RA_ParaAdjust_Send_H2C( ++ IN PVOID pDM_VOID ++) ++{ ++ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte H2C_Parameter[6] = {0}; ++ ++ H2C_Parameter[0] = RA_FIRST_MACID; ++ ++ //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("RA_Para_feedback_req= (( %d )) \n",pRA_Table->RA_Para_feedback_req )); ++ if (pRA_Table->RA_Para_feedback_req) { //H2C_Parameter[5]=1 ; ask FW for all RA parameters ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Ask FW for RA parameter \n")); ++ H2C_Parameter[5] |= BIT1; //ask FW to report RA parameters ++ H2C_Parameter[1] = pRA_Table->para_idx; //pRA_Table->para_idx; ++ pRA_Table->RA_Para_feedback_req = 0; ++ } else { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Send H2C to FW for modifying RA parameter \n")); ++ ++ H2C_Parameter[1] = pRA_Table->para_idx; ++ H2C_Parameter[2] = pRA_Table->rate_idx; ++ //1 [8 bit] ++ if (pRA_Table->para_idx == RADBG_RTY_PENALTY || pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO || pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) { ++ H2C_Parameter[3] = pRA_Table->value; ++ H2C_Parameter[4] = 0; ++ } ++ //1 [16 bit] ++ else { //if ((pRA_Table->rate_idx==RADBG_N_HIGH)||(pRA_Table->rate_idx==RADBG_N_LOW)) ++ H2C_Parameter[3] = (u1Byte)(((pRA_Table->value_16) & 0xf0) >> 4); //byte1 ++ H2C_Parameter[4] = (u1Byte)((pRA_Table->value_16) & 0x0f); //byte0 ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[1] = 0x%x \n", H2C_Parameter[1])); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[2] = 0x%x \n", H2C_Parameter[2])); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[3] = 0x%x \n", H2C_Parameter[3])); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[4] = 0x%x \n", H2C_Parameter[4])); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[5] = 0x%x \n", H2C_Parameter[5])); ++ ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RA_PARA_ADJUST, 6, H2C_Parameter); ++ ++} ++ ++ ++VOID ++odm_RA_ParaAdjust( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte para_idx = pRA_Table->para_idx; ++ u1Byte rate_idx = pRA_Table->rate_idx; ++ u1Byte value = pRA_Table->value; ++ u1Byte Pre_value = 0xff; ++ ++ BOOLEAN sign = 0; ++ ++ if (pRA_Table->para_idx == RADBG_RTY_PENALTY) { ++ Pre_value = pRA_Table->RTY_P[rate_idx]; ++ pRA_Table->RTY_P[rate_idx] = value; ++ pRA_Table->RTY_P_modify_note[rate_idx] = 1; ++ } else if (pRA_Table->para_idx == RADBG_N_HIGH) { ++ ++ } else if (pRA_Table->para_idx == RADBG_N_LOW) { ++ ++ } else if (pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO) { ++ Pre_value = pRA_Table->RATE_UP_RTY_RATIO[rate_idx]; ++ pRA_Table->RATE_UP_RTY_RATIO[rate_idx] = value; ++ pRA_Table->RATE_UP_RTY_RATIO_modify_note[rate_idx] = 1; ++ } else if (pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) { ++ Pre_value = pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx]; ++ pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx] = value; ++ pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[rate_idx] = 1; ++ } ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" Change RA Papa[%d], Rate[ %d ], ((%d)) -> ((%d)) \n", pRA_Table->para_idx, rate_idx, Pre_value, value)); ++ odm_RA_ParaAdjust_Send_H2C(pDM_Odm); ++} ++ ++ ++VOID ++phydm_ra_print_msg( ++ IN PVOID pDM_VOID, ++ IN u1Byte *value, ++ IN u1Byte *value_default, ++ IN u1Byte *modify_note ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u4Byte i; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate index| |Current-value| |Default-value| |Modify?| \n")); ++ for (i = 0 ; i <= (pRA_Table->rate_length); i++) { ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %20d %25d %20s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . "))); ++#else ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %10d %14d %14s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . "))); ++#endif ++ } ++ ++} ++ ++VOID ++odm_RA_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ ++ pRA_Table->is_ra_dbg_init = FALSE; ++ ++ if (dm_value[0] == 100) { /*1 Print RA Parameters*/ ++ u1Byte default_pointer_value; ++ u1Byte *pvalue; ++ u1Byte *pvalue_default; ++ u1Byte *pmodify_note; ++ ++ pvalue = pvalue_default = pmodify_note = &default_pointer_value; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n")); ++ ++ if (dm_value[1] == RADBG_RTY_PENALTY) { /* [1]*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [1] RTY_PENALTY\n")); ++ pvalue = &(pRA_Table->RTY_P[0]); ++ pvalue_default = &(pRA_Table->RTY_P_default[0]); ++ pmodify_note = (u1Byte *)&(pRA_Table->RTY_P_modify_note[0]); ++ } else if (dm_value[1] == RADBG_N_HIGH) { /* [2]*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [2] N_HIGH\n")); ++ ++ } else if (dm_value[1] == RADBG_N_LOW) { /*[3]*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [3] N_LOW\n")); ++ ++ } else if (dm_value[1] == RADBG_RATE_UP_RTY_RATIO) { /* [8]*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [8] RATE_UP_RTY_RATIO\n")); ++ pvalue = &(pRA_Table->RATE_UP_RTY_RATIO[0]); ++ pvalue_default = &(pRA_Table->RATE_UP_RTY_RATIO_default[0]); ++ pmodify_note = (u1Byte *)&(pRA_Table->RATE_UP_RTY_RATIO_modify_note[0]); ++ } else if (dm_value[1] == RADBG_RATE_DOWN_RTY_RATIO) { /* [9]*/ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [9] RATE_DOWN_RTY_RATIO\n")); ++ pvalue = &(pRA_Table->RATE_DOWN_RTY_RATIO[0]); ++ pvalue_default = &(pRA_Table->RATE_DOWN_RTY_RATIO_default[0]); ++ pmodify_note = (u1Byte *)&(pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[0]); ++ } ++ ++ phydm_ra_print_msg(pDM_Odm, pvalue, pvalue_default, pmodify_note); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n\n")); ++ ++ } else if (dm_value[0] == 101) { ++ pRA_Table->para_idx = (u1Byte)dm_value[1]; ++ ++ pRA_Table->RA_Para_feedback_req = 1; ++ odm_RA_ParaAdjust_Send_H2C(pDM_Odm); ++ } else { ++ pRA_Table->para_idx = (u1Byte)dm_value[0]; ++ pRA_Table->rate_idx = (u1Byte)dm_value[1]; ++ pRA_Table->value = (u1Byte)dm_value[2]; ++ ++ odm_RA_ParaAdjust(pDM_Odm); ++ } ++ ++} ++ ++VOID ++odm_RA_ParaAdjust_init( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte i; ++ u1Byte ra_para_pool_u8[3] = { RADBG_RTY_PENALTY, RADBG_RATE_UP_RTY_RATIO, RADBG_RATE_DOWN_RTY_RATIO}; ++ /* ++ RTY_PENALTY = 1, //u8 ++ N_HIGH = 2, ++ N_LOW = 3, ++ RATE_UP_TABLE = 4, ++ RATE_DOWN_TABLE = 5, ++ TRYING_NECESSARY = 6, ++ DROPING_NECESSARY = 7, ++ RATE_UP_RTY_RATIO = 8, //u8 ++ RATE_DOWN_RTY_RATIO= 9, //u8 ++ ALL_PARA = 0xff ++ ++ */ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("odm_RA_ParaAdjust_init \n")); ++ ++ pRA_Table->is_ra_dbg_init = TRUE; ++ for (i = 0; i < 3; i++) { ++ pRA_Table->RA_Para_feedback_req = 1; ++ pRA_Table->para_idx = ra_para_pool_u8[i]; ++ odm_RA_ParaAdjust_Send_H2C(pDM_Odm); ++ } ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8192E) ++ pRA_Table->rate_length = ODM_RATEMCS15; ++ else if ((pDM_Odm->SupportICType == ODM_RTL8723B) || (pDM_Odm->SupportICType == ODM_RTL8188E)) ++ pRA_Table->rate_length = ODM_RATEMCS7; ++ else if ((pDM_Odm->SupportICType == ODM_RTL8821) || (pDM_Odm->SupportICType == ODM_RTL8881A)) ++ pRA_Table->rate_length = ODM_RATEVHTSS1MCS9; ++ else if (pDM_Odm->SupportICType == ODM_RTL8812) ++ pRA_Table->rate_length = ODM_RATEVHTSS2MCS9; ++ else if (pDM_Odm->SupportICType == ODM_RTL8814A) ++ pRA_Table->rate_length = ODM_RATEVHTSS3MCS9; ++ else ++ pRA_Table->rate_length = ODM_RATEVHTSS4MCS9; ++ ++} ++ ++#else ++ ++VOID ++ODM_C2HRaParaReportHandler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++) ++{ ++} ++ ++VOID ++odm_RA_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value ++) ++{ ++} ++ ++VOID ++odm_RA_ParaAdjust_init( ++ IN PVOID pDM_VOID ++) ++ ++{ ++} ++ ++#endif //#if (defined(CONFIG_RA_DBG_CMD)) ++ ++VOID ++phydm_ra_dynamic_retry_count( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ PSTA_INFO_T pEntry; ++ u1Byte i, retry_offset; ++ u4Byte ma_rx_tp; ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pDM_Odm->pre_b_noisy = %d\n", pDM_Odm->pre_b_noisy ));*/ ++ if (pDM_Odm->pre_b_noisy != pDM_Odm->NoisyDecision) { ++ ++ if (pDM_Odm->NoisyDecision) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Noisy Env. RA fallback value\n")); ++ ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x0); ++ ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x04030201); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Clean Env. RA fallback value\n")); ++ ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x02010000); ++ ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x06050403); ++ } ++ pDM_Odm->pre_b_noisy = pDM_Odm->NoisyDecision; ++ } ++} ++ ++#if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) ++ ++VOID ++phydm_retry_limit_table_bound( ++ IN PVOID pDM_VOID, ++ IN u1Byte *retry_limit, ++ IN u1Byte offset ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ ++ if (*retry_limit > offset) { ++ ++ *retry_limit -= offset; ++ ++ if (*retry_limit < pRA_Table->retrylimit_low) ++ *retry_limit = pRA_Table->retrylimit_low; ++ else if (*retry_limit > pRA_Table->retrylimit_high) ++ *retry_limit = pRA_Table->retrylimit_high; ++ } else ++ *retry_limit = pRA_Table->retrylimit_low; ++} ++ ++VOID ++phydm_reset_retry_limit_table( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte i; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*support all IC platform*/ ++ ++ #else ++ #if ((RTL8192E_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1)) ++ u1Byte per_rate_retrylimit_table_20M[ODM_RATEMCS15+1] = { ++ 1, 1, 2, 4, /*CCK*/ ++ 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ ++ 2, 4, 6, 8, 12, 18, 20, 22, /*20M HT-1SS*/ ++ 2, 4, 6, 8, 12, 18, 20, 22 /*20M HT-2SS*/ ++ }; ++ u1Byte per_rate_retrylimit_table_40M[ODM_RATEMCS15+1] = { ++ 1, 1, 2, 4, /*CCK*/ ++ 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ ++ 4, 8, 12, 16, 24, 32, 32, 32, /*40M HT-1SS*/ ++ 4, 8, 12, 16, 24, 32, 32, 32 /*40M HT-2SS*/ ++ }; ++ ++ #elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) ++ ++ #elif (RTL8812A_SUPPORT == 1) ++ ++ #elif(RTL8814A_SUPPORT == 1) ++ ++ #else ++ ++ #endif ++ #endif ++ ++ memcpy(&(pRA_Table->per_rate_retrylimit_20M[0]), &(per_rate_retrylimit_table_20M[0]), ODM_NUM_RATE_IDX); ++ memcpy(&(pRA_Table->per_rate_retrylimit_40M[0]), &(per_rate_retrylimit_table_40M[0]), ODM_NUM_RATE_IDX); ++ ++ for (i = 0; i < ODM_NUM_RATE_IDX; i++) { ++ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), 0); ++ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), 0); ++ } ++} ++ ++VOID ++phydm_ra_dynamic_retry_limit( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ PSTA_INFO_T pEntry; ++ u1Byte i, retry_offset; ++ u4Byte ma_rx_tp; ++ ++ ++ if (pDM_Odm->pre_number_active_client == pDM_Odm->number_active_client) { ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" pre_number_active_client == number_active_client\n")); ++ return; ++ ++ } else { ++ if (pDM_Odm->number_active_client == 1) { ++ phydm_reset_retry_limit_table(pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("one client only->reset to default value\n")); ++ } else { ++ ++ retry_offset = pDM_Odm->number_active_client * pRA_Table->retry_descend_num; ++ ++ for (i = 0; i < ODM_NUM_RATE_IDX; i++) { ++ ++ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), retry_offset); ++ phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), retry_offset); ++ } ++ } ++ } ++} ++ ++VOID ++phydm_ra_dynamic_retry_limit_init( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ ++ pRA_Table->retry_descend_num = RA_RETRY_DESCEND_NUM; ++ pRA_Table->retrylimit_low = RA_RETRY_LIMIT_LOW; ++ pRA_Table->retrylimit_high = RA_RETRY_LIMIT_HIGH; ++ ++ phydm_reset_retry_limit_table(pDM_Odm); ++ ++} ++#else ++VOID ++phydm_ra_dynamic_retry_limit( ++ IN PVOID pDM_VOID ++) ++{ ++} ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++VOID ++phydm_ra_dynamic_rate_id_on_assoc( ++ IN PVOID pDM_VOID, ++ IN u1Byte wireless_mode, ++ IN u1Byte init_rate_id ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n", pDM_Odm->RFType, wireless_mode, init_rate_id)); ++ ++ if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) { ++ ++ if ((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) && ++ (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) ++ ){ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set N-2SS ARFR5 table\n")); ++ ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ ++ ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ ++ } else if ((pDM_Odm->SupportICType & (ODM_RTL8812)) && ++ (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) ++ ){ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set AC-2SS ARFR0 table\n")); ++ ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/ ++ ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/ ++ } ++ } ++ ++} ++ ++VOID ++phydm_ra_dynamic_rate_id_init( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) { ++ ++ ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ ++ ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ ++ ++ ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/ ++ ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/ ++ } ++} ++ ++VOID ++phydm_update_rate_id( ++ IN PVOID pDM_VOID, ++ IN u1Byte rate, ++ IN u1Byte platform_macid ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte current_tx_ss; ++ u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/ ++ u1Byte wireless_mode; ++ u1Byte phydm_macid; ++ PSTA_INFO_T pEntry; ++ ++ if (rate_idx >= ODM_RATEVHTSS2MCS0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT2SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS2MCS0))); ++ /*dummy for SD4 check patch*/ ++ } else if (rate_idx >= ODM_RATEVHTSS1MCS0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT1SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS1MCS0))); ++ /*dummy for SD4 check patch*/ ++ } else if (rate_idx >= ODM_RATEMCS0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEMCS0))); ++ /*dummy for SD4 check patch*/ ++ } else { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, rate_idx)); ++ /*dummy for SD4 check patch*/ ++ } ++ ++ phydm_macid = pDM_Odm->platform2phydm_macid_table[platform_macid]; ++ pEntry = pDM_Odm->pODM_StaInfo[phydm_macid]; ++ ++ if (IS_STA_VALID(pEntry)) { ++ wireless_mode = pEntry->WirelessMode; ++ ++ if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) { ++ ++ pEntry->ratr_idx = pEntry->ratr_idx_init; ++ if (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) { /*N mode*/ ++ if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*2SS mode*/ ++ ++ pEntry->ratr_idx = ARFR_5_RATE_ID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_5\n")); ++ } ++ } else if (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) {/*AC mode*/ ++ if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*2SS mode*/ ++ ++ pEntry->ratr_idx = ARFR_0_RATE_ID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_0\n")); ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("UPdate_RateID[%d]: (( 0x%x ))\n", platform_macid, pEntry->ratr_idx)); ++ } ++ } ++ ++} ++#endif ++ ++VOID ++phydm_c2h_ra_report_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ u1Byte legacy_table[12] = {1,2,5,11,6,9,12,18,24,36,48,54}; ++ u1Byte macid = CmdBuf[1]; ++ ++ u1Byte rate = CmdBuf[0]; ++ u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/ ++ u1Byte vht_en=(rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0; ++ u1Byte b_sgi = (rate & 0x80)>>7; ++ ++ u1Byte pre_rate = pRA_Table->link_tx_rate[macid]; ++ u1Byte pre_rate_idx = pre_rate & 0x7f; /*remove bit7 SGI*/ ++ u1Byte pre_vht_en=(pre_rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0; ++ u1Byte pre_b_sgi = (pre_rate & 0x80)>>7; ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ GET_HAL_DATA(Adapter)->CurrentRARate = HwRateToMRate(rate_idx); ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ ODM_UpdateInitRate(pDM_Odm, rate_idx); ++ #endif ++ ++ /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,("RA: rate_idx=0x%x , sgi = %d\n", rate_idx, b_sgi));*/ ++ /*if (pDM_Odm->SupportICType & (ODM_RTL8703B))*/ ++ { ++ if (CmdLen >= 4) { ++ if (CmdBuf[3] == 0) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Init-Rate Update\n")); ++ /**/ ++ } else if (CmdBuf[3] == 0xff) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("FW Level: Fix rate\n")); ++ /**/ ++ } else if (CmdBuf[3] == 1) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Success\n")); ++ /**/ ++ } else if (CmdBuf[3] == 2) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Fail & Try Again\n")); ++ /**/ ++ } else if (CmdBuf[3] == 3) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Rate Back\n")); ++ /**/ ++ } else if (CmdBuf[3] == 4) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("start rate by RSSI\n")); ++ /**/ ++ } else if (CmdBuf[3] == 5) { ++ ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try rate\n")); ++ /**/ ++ } ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Tx Rate Update, MACID[%d] ( %s%s%s%s%d%s%s ) -> ( %s%s%s%s%d%s%s)\n", ++ macid, ++ ((pre_rate_idx >= ODM_RATEVHTSS1MCS0) && (pre_rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "", ++ ((pre_rate_idx >= ODM_RATEVHTSS2MCS0) && (pre_rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "", ++ ((pre_rate_idx >= ODM_RATEVHTSS3MCS0) && (pre_rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "", ++ (pre_rate_idx >= ODM_RATEMCS0) ? "MCS " : "", ++ (pre_vht_en) ? ((pre_rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((pre_rate_idx >= ODM_RATEMCS0)? (pre_rate_idx - ODM_RATEMCS0) : ((pre_rate_idx <= ODM_RATE54M)?legacy_table[pre_rate_idx]:0)), ++ (pre_b_sgi) ? "-S" : " ", ++ (pre_rate_idx >= ODM_RATEMCS0) ? "" : "M", ++ ((rate_idx >= ODM_RATEVHTSS1MCS0) && (rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "", ++ ((rate_idx >= ODM_RATEVHTSS2MCS0) && (rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "", ++ ((rate_idx >= ODM_RATEVHTSS3MCS0) && (rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "", ++ (rate_idx >= ODM_RATEMCS0) ? "MCS " : "", ++ (vht_en) ? ((rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((rate_idx >= ODM_RATEMCS0)? (rate_idx - ODM_RATEMCS0) : ((rate_idx <= ODM_RATE54M)?legacy_table[rate_idx]:0)), ++ (b_sgi) ? "-S" : " ", ++ (rate_idx >= ODM_RATEMCS0) ? "" : "M" )); ++ ++ pRA_Table->link_tx_rate[macid] = rate; ++ ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) ++ phydm_update_rate_id(pDM_Odm, rate, macid); ++ #endif ++ ++} ++ ++VOID ++odm_RSSIMonitorInit( ++ IN PVOID pDM_VOID ++) ++{ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ pRA_Table->firstconnect = FALSE; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++ pRA_Table->PT_collision_pre = TRUE; //used in ODM_DynamicARFBSelect(WIN only) ++#endif ++#endif ++} ++ ++VOID ++ODM_RAPostActionOnAssoc( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ pDM_Odm->H2C_RARpt_connect = 1; ++ odm_RSSIMonitorCheck(pDM_Odm); ++ pDM_Odm->H2C_RARpt_connect = 0; ++} ++ ++VOID ++odm_RSSIMonitorCheck( ++ IN PVOID pDM_VOID ++) ++{ ++ // ++ // For AP/ADSL use prtl8192cd_priv ++ // For CE/NIC use PADAPTER ++ // ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) ++ return; ++ ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ switch (pDM_Odm->SupportPlatform) { ++ case ODM_WIN: ++ odm_RSSIMonitorCheckMP(pDM_Odm); ++ break; ++ ++ case ODM_CE: ++ odm_RSSIMonitorCheckCE(pDM_Odm); ++ break; ++ ++ case ODM_AP: ++ odm_RSSIMonitorCheckAP(pDM_Odm); ++ break; ++ ++ case ODM_ADSL: ++ //odm_DIGAP(pDM_Odm); ++ break; ++ } ++ ++} // odm_RSSIMonitorCheck ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++s4Byte ++phydm_FindMinimumRSSI( ++IN PDM_ODM_T pDM_Odm, ++IN PADAPTER pAdapter, ++IN OUT BOOLEAN *pbLink_temp ++ ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ++ BOOLEAN act_as_ap = ACTING_AS_AP(pAdapter); ++ ++ /*DbgPrint("bMediaConnect = %d, ACTING_AS_AP = %d , EntryMinUndecoratedSmoothedPWDB = %d\n", ++ pMgntInfo->bMediaConnect,act_as_ap,pHalData->EntryMinUndecoratedSmoothedPWDB);*/ ++ ++ ++ /* 1.Determine the minimum RSSI */ ++ if ((!pMgntInfo->bMediaConnect) || ++ (act_as_ap && (pHalData->EntryMinUndecoratedSmoothedPWDB == 0))) {/* We should check AP mode and Entry info.into consideration, revised by Roger, 2013.10.18*/ ++ ++ pHalData->MinUndecoratedPWDBForDM = 0; ++ *pbLink_temp = FALSE; ++ ++ } else ++ *pbLink_temp = TRUE; ++ ++ ++ if (pMgntInfo->bMediaConnect) { /* Default port*/ ++ ++ if (act_as_ap || pMgntInfo->mIbss) { ++ pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ /**/ ++ } else { ++ pHalData->MinUndecoratedPWDBForDM = pHalData->UndecoratedSmoothedPWDB; ++ /**/ ++ } ++ } else { /* associated entry pwdb*/ ++ pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ /**/ ++ } ++ ++ return pHalData->MinUndecoratedPWDBForDM; ++} ++ ++#endif ++ ++VOID ++odm_RSSIMonitorCheckMP( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte H2C_Parameter[4] = {0}; ++ u4Byte i; ++ BOOLEAN bExtRAInfo = FALSE; ++ u1Byte cmdlen = 3; ++ u1Byte TxBF_EN = 0, stbc_en = 0; ++ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PRT_WLAN_STA pEntry = NULL; ++ s4Byte tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ PMGNT_INFO pDefaultMgntInfo = &Adapter->MgntInfo; ++ u8Byte curTxOkCnt = 0, curRxOkCnt = 0; ++ //BOOLEAN FirstConnect = 0; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ BEAMFORMING_CAP Beamform_cap = BEAMFORMING_CAP_NONE; ++#endif ++ ++ PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter); ++ ++ if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) { ++ bExtRAInfo = TRUE; ++ cmdlen = 4; ++ } ++ ++ //FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); ++ //pRA_Table->firstconnect = pHalData->bLinked; ++ ++ ++ /* ++ if(pDM_Odm->SupportICType == ODM_RTL8188E && (pDefaultMgntInfo->CustomerID==RT_CID_819x_HP)) ++ { ++ if(curRxOkCnt >(curTxOkCnt*6)) ++ PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0x8f015); ++ else ++ PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0xff015); ++ } ++ ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821 || ++ pDM_Odm->SupportICType == ODM_RTL8814A|| pDM_Odm->SupportICType == ODM_RTL8822B) ++ { ++ if(curRxOkCnt >(curTxOkCnt*6)) ++ H2C_Parameter[3]|=RAINFO_BE_RX_STATE; ++ } ++ */ ++ ++ while (pLoopAdapter) { ++ ++ if (pLoopAdapter != NULL) { ++ pMgntInfo = &pLoopAdapter->MgntInfo; ++ curTxOkCnt = pLoopAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; ++ curRxOkCnt = pLoopAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; ++ pMgntInfo->lastTxOkCnt = curTxOkCnt; ++ pMgntInfo->lastRxOkCnt = curRxOkCnt; ++ } ++ ++ for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) { ++ ++ if (IsAPModeExist(pLoopAdapter)) { ++ if (GetFirstExtAdapter(pLoopAdapter) != NULL && ++ GetFirstExtAdapter(pLoopAdapter) == pLoopAdapter) ++ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); ++ else if (GetFirstGOPort(pLoopAdapter) != NULL && ++ IsFirstGoAdapter(pLoopAdapter)) ++ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); ++ } else { ++ if (GetDefaultAdapter(pLoopAdapter) == pLoopAdapter) ++ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); ++ } ++ ++ if (pEntry != NULL) { ++ if (pEntry->bAssociated) { ++ ++ RT_DISP_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr); ++ RT_DISP(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n", ++ pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_stat.UndecoratedSmoothedPWDB)); ++ ++ //2 BF_en ++#if (BEAMFORMING_SUPPORT) ++ Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pEntry->AssociatedMacId); ++ if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) ++ TxBF_EN = 1; ++#endif ++ //2 STBC_en ++ if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pEntry->VHTInfo.STBC, STBC_VHT_ENABLE_TX)) || ++ TEST_FLAG(pEntry->HTInfo.STBC, STBC_HT_ENABLE_TX)) ++ stbc_en = 1; ++ ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) ++ tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) ++ tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ if (bExtRAInfo) { ++ if (curRxOkCnt > (curTxOkCnt * 6)) ++ H2C_Parameter[3] |= RAINFO_BE_RX_STATE; ++ ++ if (TxBF_EN) ++ H2C_Parameter[3] |= RAINFO_BF_STATE; ++ else { ++ if (stbc_en) ++ H2C_Parameter[3] |= RAINFO_STBC_STATE; ++ } ++ ++ if ( pDM_Odm->NoisyDecision ) ++ { ++ H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2 ++ } ++ else ++ H2C_Parameter[3] &= (~RAINFO_NOISY_STATE); ++ ++ if (pDM_Odm->H2C_RARpt_connect) ++ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; ++ } ++ ++ H2C_Parameter[2] = (u1Byte)(pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0xFF); ++ //H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 ++ H2C_Parameter[0] = (pEntry->AssociatedMacId); ++ ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); ++ } ++ } else ++ break; ++ } ++ ++ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); ++ } ++ ++ if (tmpEntryMaxPWDB != 0) { // If associated entry is found ++ pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; ++ RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", tmpEntryMaxPWDB, tmpEntryMaxPWDB)); ++ } else ++ pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; ++ ++ if (tmpEntryMinPWDB != 0xff) { // If associated entry is found ++ pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; ++ RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmpEntryMinPWDB, tmpEntryMinPWDB)); ++ ++ } else ++ pHalData->EntryMinUndecoratedSmoothedPWDB = 0; ++ ++ // Indicate Rx signal strength to FW. ++ if (pHalData->bUseRAMask) { ++ PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pDefaultMgntInfo); ++ PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pDefaultMgntInfo); ++ ++ //2 BF_en ++#if (BEAMFORMING_SUPPORT == 1) ++ Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pDefaultMgntInfo->mMacId); ++ ++ if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) ++ TxBF_EN = 1; ++#endif ++ ++ //2 STBC_en ++ if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pVHTInfo->VhtCurStbc, STBC_VHT_ENABLE_TX)) || ++ TEST_FLAG(pHTInfo->HtCurStbc, STBC_HT_ENABLE_TX)) ++ stbc_en = 1; ++ ++ if (bExtRAInfo) { ++ if (TxBF_EN) ++ H2C_Parameter[3] |= RAINFO_BF_STATE; ++ else { ++ if (stbc_en) ++ H2C_Parameter[3] |= RAINFO_STBC_STATE; ++ } ++ ++ if (pDM_Odm->H2C_RARpt_connect) ++ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; ++ ++ if ( pDM_Odm->NoisyDecision==1 ) ++ { ++ H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2 ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] Send H2C to FW\n")); ++ } ++ else ++ H2C_Parameter[3] &= (~RAINFO_NOISY_STATE); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] H2C_Parameter=%x\n", H2C_Parameter[3])); ++ } ++ ++ H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF); ++ //H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 ++ H2C_Parameter[0] = 0; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 ++ ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); ++ ++ // BT 3.0 HS mode Rssi ++ if (pDM_Odm->bBtHsOperation) { ++ H2C_Parameter[2] = pDM_Odm->btHsRssi; ++ //H2C_Parameter[1] = 0x0; ++ H2C_Parameter[0] = 2; ++ ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); ++ } ++ } else ++ PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB); ++ ++ if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8192E)) ++ odm_RSSIDumpToRegister(pDM_Odm); ++ ++ ++ { ++ PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter); ++ BOOLEAN default_pointer_value, *pbLink_temp = &default_pointer_value; ++ s4Byte GlobalRSSI_min = 0xFF, LocalRSSI_Min; ++ BOOLEAN bLink = FALSE; ++ ++ while (pLoopAdapter) { ++ LocalRSSI_Min = phydm_FindMinimumRSSI(pDM_Odm, pLoopAdapter, pbLink_temp); ++ //DbgPrint("pHalData->bLinked=%d, LocalRSSI_Min=%d\n", pHalData->bLinked, LocalRSSI_Min); ++ if ((LocalRSSI_Min < GlobalRSSI_min) && (LocalRSSI_Min != 0)) ++ GlobalRSSI_min = LocalRSSI_Min; ++ ++ if (*pbLink_temp) ++ bLink = TRUE; ++ ++ pLoopAdapter = GetNextExtAdapter(pLoopAdapter); ++ } ++ ++ pHalData->bLinked = bLink; ++ ODM_CmnInfoUpdate(&pHalData->DM_OutSrc , ODM_CMNINFO_LINK, (u8Byte)bLink); ++ ++ if (bLink) ++ ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, (u8Byte)GlobalRSSI_min); ++ else ++ ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, 0); ++ ++ } ++ ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++/*H2C_RSSI_REPORT*/ ++s8 phydm_rssi_report(PDM_ODM_T pDM_Odm, u8 mac_id) ++{ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 H2C_Parameter[4] = {0}; ++ u8 UL_DL_STATE = 0, STBC_TX = 0, TxBF_EN = 0; ++ u8 cmdlen = 4, first_connect = _FALSE; ++ u64 curTxOkCnt = 0, curRxOkCnt = 0; ++ PSTA_INFO_T pEntry = pDM_Odm->pODM_StaInfo[mac_id]; ++ ++ if (!IS_STA_VALID(pEntry)) ++ return _FAIL; ++ ++ if (mac_id != pEntry->mac_id) { ++ DBG_871X("%s mac_id:%u:%u invalid\n", __func__, mac_id, pEntry->mac_id); ++ rtw_warn_on(1); ++ return _FAIL; ++ } ++ ++ if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/ ++ return _FAIL; ++ ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1)) { ++ DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi == -1\n", __func__, pEntry->mac_id, MAC_ARG(pEntry->hwaddr)); ++ return _FAIL; ++ } ++ ++ curTxOkCnt = pdvobjpriv->traffic_stat.cur_tx_bytes; ++ curRxOkCnt = pdvobjpriv->traffic_stat.cur_rx_bytes; ++ if (curRxOkCnt > (curTxOkCnt * 6)) ++ UL_DL_STATE = 1; ++ else ++ UL_DL_STATE = 0; ++ ++ #ifdef CONFIG_BEAMFORMING ++ { ++ #if (BEAMFORMING_SUPPORT == 1) ++ BEAMFORMING_CAP Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pEntry->mac_id); ++ #else/*for drv beamforming*/ ++ BEAMFORMING_CAP Beamform_cap = beamforming_get_entry_beam_cap_by_mac_id(&Adapter->mlmepriv, pEntry->mac_id); ++ #endif ++ ++ if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) ++ TxBF_EN = 1; ++ else ++ TxBF_EN = 0; ++ } ++ #endif /*#ifdef CONFIG_BEAMFORMING*/ ++ ++ if (TxBF_EN) ++ STBC_TX = 0; ++ else { ++ #ifdef CONFIG_80211AC_VHT ++ if (IsSupportedVHT(pEntry->wireless_mode)) ++ STBC_TX = TEST_FLAG(pEntry->vhtpriv.stbc_cap, STBC_VHT_ENABLE_TX); ++ else ++ #endif ++ STBC_TX = TEST_FLAG(pEntry->htpriv.stbc_cap, STBC_HT_ENABLE_TX); ++ } ++ ++ H2C_Parameter[0] = (u8)(pEntry->mac_id & 0xFF); ++ H2C_Parameter[2] = pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F; ++ ++ if (UL_DL_STATE) ++ H2C_Parameter[3] |= RAINFO_BE_RX_STATE; ++ ++ if (TxBF_EN) ++ H2C_Parameter[3] |= RAINFO_BF_STATE; ++ if (STBC_TX) ++ H2C_Parameter[3] |= RAINFO_STBC_STATE; ++ if (pDM_Odm->NoisyDecision) ++ H2C_Parameter[3] |= RAINFO_NOISY_STATE; ++ ++ if (pEntry->ra_rpt_linked == _FALSE) { ++ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; ++ pEntry->ra_rpt_linked = _TRUE; ++ first_connect = _TRUE; ++ } ++ ++ #if 1 ++ if (first_connect) { ++ DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__, ++ pEntry->mac_id, MAC_ARG(pEntry->hwaddr), pEntry->rssi_stat.UndecoratedSmoothedPWDB); ++ ++ DBG_871X("%s RAINFO - TP:%s, TxBF:%s, STBC:%s, Noisy:%s, Firstcont:%s\n", __func__, ++ (UL_DL_STATE) ? "DL" : "UL", (TxBF_EN) ? "EN" : "DIS", (STBC_TX) ? "EN" : "DIS", ++ (pDM_Odm->NoisyDecision) ? "True" : "False", (first_connect) ? "True" : "False"); ++ } ++ #endif ++ ++ if (pHalData->fw_ractrl == _TRUE) { ++ #if (RTL8188E_SUPPORT == 1) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ cmdlen = 3; ++ #endif ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); ++ } else { ++ #if ((RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1)) ++ if (pDM_Odm->SupportICType == ODM_RTL8188E) ++ ODM_RA_SetRSSI_8188E(pDM_Odm, (u8)(pEntry->mac_id & 0xFF), pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F); ++ #endif ++ } ++ return _SUCCESS; ++} ++ ++void phydm_ra_rssi_rpt_wk_hdl(PVOID pContext) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext; ++ int i; ++ u8 mac_id = 0xFF; ++ PSTA_INFO_T pEntry = NULL; ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ pEntry = pDM_Odm->pODM_StaInfo[i]; ++ if (IS_STA_VALID(pEntry)) { ++ if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/ ++ continue; ++ if (pEntry->ra_rpt_linked == _FALSE) { ++ mac_id = i; ++ break; ++ } ++ } ++ } ++ if (mac_id != 0xFF) ++ phydm_rssi_report(pDM_Odm, mac_id); ++} ++void phydm_ra_rssi_rpt_wk(PVOID pContext) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext; ++ ++ rtw_run_in_thread_cmd(pDM_Odm->Adapter, phydm_ra_rssi_rpt_wk_hdl, pDM_Odm); ++} ++#endif ++ ++VOID ++odm_RSSIMonitorCheckCE( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PSTA_INFO_T pEntry; ++ int i; ++ int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; ++ u8 sta_cnt = 0; ++ ++ if (pDM_Odm->bLinked != _TRUE) ++ return; ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ pEntry = pDM_Odm->pODM_StaInfo[i]; ++ if (IS_STA_VALID(pEntry)) { ++ if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/ ++ continue; ++ ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1)) ++ continue; ++ ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) ++ tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) ++ tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ if (phydm_rssi_report(pDM_Odm, i)) ++ sta_cnt++; ++ } ++ } ++ /*DBG_871X("%s==> sta_cnt(%d)\n", __func__, sta_cnt);*/ ++ ++ if (tmpEntryMaxPWDB != 0) // If associated entry is found ++ pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; ++ else ++ pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; ++ ++ if (tmpEntryMinPWDB != 0xff) // If associated entry is found ++ pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; ++ else ++ pHalData->EntryMinUndecoratedSmoothedPWDB = 0; ++ ++ FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM ++ ++ pDM_Odm->RSSI_Min = pHalData->MinUndecoratedPWDBForDM; ++ //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); ++#endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++} ++ ++ ++VOID ++odm_RSSIMonitorCheckAP( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++#if (RTL8812A_SUPPORT||RTL8881A_SUPPORT||RTL8192E_SUPPORT||RTL8814A_SUPPORT) ++ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte H2C_Parameter[4] = {0}; ++ u4Byte i; ++ BOOLEAN bExtRAInfo = FALSE; ++ u1Byte cmdlen = 3 ; ++ u1Byte TxBF_EN = 0, stbc_en = 0; ++ ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ PSTA_INFO_T pstat; ++ BOOLEAN act_bfer = FALSE; ++ ++#ifdef BEAMFORMING_SUPPORT ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) ++ pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; ++ pDM_BdcTable->num_Txbfee_Client = 0; ++ pDM_BdcTable->num_Txbfer_Client = 0; ++#endif ++#endif ++ ++ if (pDM_Odm->H2C_RARpt_connect) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] First Connected\n")); ++ /**/ ++ } else if (priv->up_time % 2) ++ return; ++ ++ if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) { ++ bExtRAInfo = TRUE; ++ cmdlen = 4; ++ } ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ pstat = pDM_Odm->pODM_StaInfo[i]; ++ ++ if (IS_STA_VALID(pstat)) { ++ if (pstat->sta_in_firmware != 1) ++ continue; ++ ++ //2 BF_en ++#ifdef BEAMFORMING_SUPPORT ++ BEAMFORMING_CAP Beamform_cap = Beamforming_GetEntryBeamCapByMacId(priv, pstat->aid); ++ ++ if (Beamform_cap == BEAMFORMER_CAP_HT_EXPLICIT || Beamform_cap == BEAMFORMER_CAP_VHT_SU || ++ Beamform_cap == (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMEE_CAP_HT_EXPLICIT) || ++ Beamform_cap == (BEAMFORMER_CAP_VHT_SU | BEAMFORMEE_CAP_VHT_SU)) { ++ TxBF_EN = 1; ++ act_bfer = TRUE; ++ } ++ ++#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*BDC*/ ++ ++ if (act_bfer == TRUE) { ++ pDM_BdcTable->w_BFee_Client[i] = 1; //AP act as BFer ++ pDM_BdcTable->num_Txbfee_Client++; ++ } else { ++ pDM_BdcTable->w_BFee_Client[i] = 0; //AP act as BFer ++ } ++ ++ if ((Beamform_cap & BEAMFORMEE_CAP_HT_EXPLICIT) || (Beamform_cap & BEAMFORMEE_CAP_VHT_SU)) { ++ pDM_BdcTable->w_BFer_Client[i] = 1; //AP act as BFee ++ pDM_BdcTable->num_Txbfer_Client++; ++ } else { ++ pDM_BdcTable->w_BFer_Client[i] = 0; //AP act as BFer ++ } ++#endif ++#endif ++ ++ //2 STBC_en ++ if ((priv->pmib->dot11nConfigEntry.dot11nSTBC) && ++ ((pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_RX_STBC_CAP_)) ++#ifdef RTK_AC_SUPPORT ++ || (pstat->vht_cap_buf.vht_cap_info & cpu_to_le32(_VHTCAP_RX_STBC_CAP_)) ++#endif ++ )) ++ stbc_en = 1; ++ ++ //2 RAINFO ++ ++ if (bExtRAInfo) { ++ if ((pstat->rx_avarage) > ((pstat->tx_avarage) * 6)) ++ H2C_Parameter[3] |= RAINFO_BE_RX_STATE; ++ ++ if (TxBF_EN) ++ H2C_Parameter[3] |= RAINFO_BF_STATE; ++ else { ++ if (stbc_en) ++ H2C_Parameter[3] |= RAINFO_STBC_STATE; ++ } ++ ++ if ( pDM_Odm->NoisyDecision ) ++ { ++ H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2 ++ } ++ else ++ H2C_Parameter[3] &= (~RAINFO_NOISY_STATE); ++ ++ if (pDM_Odm->H2C_RARpt_connect) { ++ H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] set Init rate by RSSI\n")); ++ } ++ ++ /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RAINFO] H2C_Para[3] = %x\n",H2C_Parameter[3]));*/ ++ } ++ ++ H2C_Parameter[2] = (u1Byte)(pstat->rssi & 0xFF); ++ H2C_Parameter[0] = REMAP_AID(pstat); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ++ ("H2C_Parameter[3]=%d\n", H2C_Parameter[3])); ++ ++ //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RSSI] H2C_Para[2] = %x, \n",H2C_Parameter[2])); ++ //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[MACID] H2C_Para[0] = %x, \n",H2C_Parameter[0])); ++ ++ ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter); ++ ++ } ++ } ++ ++#endif ++#endif ++ ++} ++ ++ ++VOID ++odm_RateAdaptiveMaskInit( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); ++ ++ pMgntInfo->Ratr_State = DM_RATR_STA_INIT; ++ ++ if (pMgntInfo->DM_Type == DM_Type_ByDriver) ++ pHalData->bUseRAMask = TRUE; ++ else ++ pHalData->bUseRAMask = FALSE; ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pOdmRA->Type = DM_Type_ByDriver; ++ if (pOdmRA->Type == DM_Type_ByDriver) ++ pDM_Odm->bUseRAMask = _TRUE; ++ else ++ pDM_Odm->bUseRAMask = _FALSE; ++#endif ++ ++ pOdmRA->RATRState = DM_RATR_STA_INIT; ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ if (pDM_Odm->SupportICType == ODM_RTL8812) ++ pOdmRA->LdpcThres = 50; ++ else ++ pOdmRA->LdpcThres = 35; ++ ++ pOdmRA->RtsThres = 35; ++ ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ pOdmRA->LdpcThres = 35; ++ pOdmRA->bUseLdpc = FALSE; ++ ++#else ++ pOdmRA->UltraLowRSSIThresh = 9; ++ ++#endif ++ ++ pOdmRA->HighRSSIThresh = 50; ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \ ++ ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ pOdmRA->LowRSSIThresh = 23; ++#else ++ pOdmRA->LowRSSIThresh = 20; ++#endif ++} ++/*----------------------------------------------------------------------------- ++ * Function: odm_RefreshRateAdaptiveMask() ++ * ++ * Overview: Update rate table mask according to rssi ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 05/27/2009 hpfan Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++odm_RefreshRateAdaptiveMask( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask()---------->\n")); ++ if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask(): Return cos not supported\n")); ++ return; ++ } ++ // ++ // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate ++ // at the same time. In the stage2/3, we need to prive universal interface and merge all ++ // HW dynamic mechanism. ++ // ++ switch (pDM_Odm->SupportPlatform) { ++ case ODM_WIN: ++ odm_RefreshRateAdaptiveMaskMP(pDM_Odm); ++ break; ++ ++ case ODM_CE: ++ odm_RefreshRateAdaptiveMaskCE(pDM_Odm); ++ break; ++ ++ case ODM_AP: ++ case ODM_ADSL: ++ odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm); ++ break; ++ } ++ ++} ++ ++VOID ++odm_RefreshRateAdaptiveMaskMP( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ PADAPTER pTargetAdapter = NULL; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); ++ ++ if (pAdapter->bDriverStopped) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); ++ return; ++ } ++ ++ if (!pHalData->bUseRAMask) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); ++ return; ++ } ++ ++ // if default port is connected, update RA table for default port (infrastructure mode only) ++ if (pMgntInfo->mAssoc && (!ACTING_AS_AP(pAdapter))) { ++ odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pMgntInfo->mMacId, pMgntInfo->IOTPeer, pHalData->UndecoratedSmoothedPWDB); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("odm_RefreshRateAdaptiveMask(): Infrasture Mode\n")); ++ if (ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pMgntInfo->Ratr_State)) { ++ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pMgntInfo->Ratr_State)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); ++ } else if (pDM_Odm->bChangeState) { ++ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); ++ } ++ } ++ ++ // ++ // The following part configure AP/VWifi/IBSS rate adaptive mask. ++ // ++ ++ if (pMgntInfo->mIbss) // Target: AP/IBSS peer. ++ pTargetAdapter = GetDefaultAdapter(pAdapter); ++ else ++ pTargetAdapter = GetFirstAPAdapter(pAdapter); ++ ++ // if extension port (softap) is started, updaet RA table for more than one clients associate ++ if (pTargetAdapter != NULL) { ++ int i; ++ PRT_WLAN_STA pEntry; ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ pEntry = AsocEntry_EnumStation(pTargetAdapter, i); ++ if (NULL != pEntry) { ++ if (pEntry->bAssociated) { ++ odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pEntry->AssociatedMacId, pEntry->IOTPeer, pEntry->rssi_stat.UndecoratedSmoothedPWDB); ++ ++ if (ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntry->Ratr_State)) { ++ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->Ratr_State)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler(pTargetAdapter, pEntry->AssociatedMacId, pEntry, pEntry->Ratr_State); ++ } else if (pDM_Odm->bChangeState) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); ++ } ++ } ++ } ++ } ++ } ++ ++ if (pMgntInfo->bSetTXPowerTrainingByOid) ++ pMgntInfo->bSetTXPowerTrainingByOid = FALSE; ++#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++} ++ ++ ++VOID ++odm_RefreshRateAdaptiveMaskCE( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i; ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; ++ ++ if (RTW_CANNOT_RUN(pAdapter)) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); ++ return; ++ } ++ ++ if (!pDM_Odm->bUseRAMask) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); ++ return; ++ } ++ ++ //printk("==> %s \n",__FUNCTION__); ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ PSTA_INFO_T pstat = pDM_Odm->pODM_StaInfo[i]; ++ if (IS_STA_VALID(pstat)) { ++ if (IS_MCAST(pstat->hwaddr)) //if(psta->mac_id ==1) ++ continue; ++ ++#if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) ++ if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8821)) { ++ if (pstat->rssi_stat.UndecoratedSmoothedPWDB < pRA->LdpcThres) { ++ pRA->bUseLdpc = TRUE; ++ pRA->bLowerRtsRate = TRUE; ++ if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) ++ Set_RA_LDPC_8812(pstat, TRUE); ++ //DbgPrint("RSSI=%d, bUseLdpc = TRUE\n", pHalData->UndecoratedSmoothedPWDB); ++ } else if (pstat->rssi_stat.UndecoratedSmoothedPWDB > (pRA->LdpcThres - 5)) { ++ pRA->bUseLdpc = FALSE; ++ pRA->bLowerRtsRate = FALSE; ++ if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) ++ Set_RA_LDPC_8812(pstat, FALSE); ++ //DbgPrint("RSSI=%d, bUseLdpc = FALSE\n", pHalData->UndecoratedSmoothedPWDB); ++ } ++ } ++#endif ++ ++ if (TRUE == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pstat->rssi_level)) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); ++ //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level); ++ rtw_hal_update_ra_mask(pstat, pstat->rssi_level); ++ } else if (pDM_Odm->bChangeState) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); ++ rtw_hal_update_ra_mask(pstat, pstat->rssi_level); ++ } ++ ++ } ++ } ++ ++#endif ++} ++ ++VOID ++odm_RefreshRateAdaptiveMaskAPADSL( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ struct rtl8192cd_priv *priv = pDM_Odm->priv; ++ struct aid_obj *aidarray; ++ u4Byte i; ++ PSTA_INFO_T pstat; ++ ++ if (priv->up_time % 2) ++ return; ++ ++ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { ++ pstat = pDM_Odm->pODM_StaInfo[i]; ++ ++ if (IS_STA_VALID(pstat)) { ++#if defined(UNIVERSAL_REPEATER) || defined(MBSSID) ++ aidarray = container_of(pstat, struct aid_obj, station); ++ priv = aidarray->priv; ++#endif ++ ++ if (!priv->pmib->dot11StationConfigEntry.autoRate) ++ continue; ++ ++ if (ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level)) { ++ ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level)); ++ ++#ifdef CONFIG_WLAN_HAL ++ if (IS_HAL_CHIP(priv)) { ++#ifdef WDS ++// if(!(pstat->state & WIFI_WDS))//if WDS donot setting ++#endif ++ GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, pstat, pstat->rssi_level); ++ } else ++#endif ++#ifdef CONFIG_RTL_8812_SUPPORT ++ if (GET_CHIP_VER(priv) == VERSION_8812E) ++ UpdateHalRAMask8812(priv, pstat, 3); ++ else ++#endif ++#ifdef CONFIG_RTL_88E_SUPPORT ++ if (GET_CHIP_VER(priv) == VERSION_8188E) { ++#ifdef TXREPORT ++ add_RATid(priv, pstat); ++#endif ++ } else ++#endif ++ { ++#if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT) ++ add_update_RATid(priv, pstat); ++#endif ++ } ++ } ++ } ++ } ++#endif ++} ++ ++ ++// Return Value: BOOLEAN ++// - TRUE: RATRState is changed. ++BOOLEAN ++ODM_RAStateCheck( ++ IN PVOID pDM_VOID, ++ IN s4Byte RSSI, ++ IN BOOLEAN bForceUpdate, ++ OUT pu1Byte pRATRState ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; ++ const u1Byte GoUpGap = 5; ++ u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh; ++ u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh; ++ u1Byte RATRState; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI= (( %d )), Current_RSSI_level = (( %d ))\n", RSSI, *pRATRState)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Ori RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA)); ++ // Threshold Adjustment: ++ // when RSSI state trends to go up one or two levels, make sure RSSI is high enough. ++ // Here GoUpGap is added to solve the boundary's level alternation issue. ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ u1Byte UltraLowRSSIThreshForRA = pRA->UltraLowRSSIThresh; ++ if (pDM_Odm->SupportICType == ODM_RTL8881A) ++ LowRSSIThreshForRA = 30; // for LDPC / BCC switch ++#endif ++ ++ switch (*pRATRState) { ++ case DM_RATR_STA_INIT: ++ case DM_RATR_STA_HIGH: ++ break; ++ ++ case DM_RATR_STA_MIDDLE: ++ HighRSSIThreshForRA += GoUpGap; ++ break; ++ ++ case DM_RATR_STA_LOW: ++ HighRSSIThreshForRA += GoUpGap; ++ LowRSSIThreshForRA += GoUpGap; ++ break; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ case DM_RATR_STA_ULTRA_LOW: ++ HighRSSIThreshForRA += GoUpGap; ++ LowRSSIThreshForRA += GoUpGap; ++ UltraLowRSSIThreshForRA += GoUpGap; ++ break; ++#endif ++ ++ default: ++ ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState)); ++ break; ++ } ++ ++ // Decide RATRState by RSSI. ++ if (RSSI > HighRSSIThreshForRA) ++ RATRState = DM_RATR_STA_HIGH; ++ else if (RSSI > LowRSSIThreshForRA) ++ RATRState = DM_RATR_STA_MIDDLE; ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ++ else if (RSSI > UltraLowRSSIThreshForRA) ++ RATRState = DM_RATR_STA_LOW; ++ else ++ RATRState = DM_RATR_STA_ULTRA_LOW; ++#else ++ else ++ RATRState = DM_RATR_STA_LOW; ++#endif ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Mod RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA)); ++ /*printk("==>%s,RATRState:0x%02x ,RSSI:%d\n",__FUNCTION__,RATRState,RSSI);*/ ++ ++ if (*pRATRState != RATRState || bForceUpdate) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[RSSI Level Update] %d -> %d\n", *pRATRState, RATRState)); ++ *pRATRState = RATRState; ++ return TRUE; ++ } ++ ++ return FALSE; ++} ++ ++VOID ++odm_RefreshBasicRateMask( ++ IN PVOID pDM_VOID ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ static u1Byte Stage = 0; ++ u1Byte CurStage = 0; ++ OCTET_STRING osRateSet; ++ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); ++ u1Byte RateSet[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M}; ++ ++ if (pDM_Odm->SupportICType != ODM_RTL8812 && pDM_Odm->SupportICType != ODM_RTL8821) ++ return; ++ ++ if (pDM_Odm->bLinked == FALSE) // unlink Default port information ++ CurStage = 0; ++ else if (pDM_Odm->RSSI_Min < 40) // link RSSI < 40% ++ CurStage = 1; ++ else if (pDM_Odm->RSSI_Min > 45) // link RSSI > 45% ++ CurStage = 3; ++ else ++ CurStage = 2; // link 25% <= RSSI <= 30% ++ ++ if (CurStage != Stage) { ++ if (CurStage == 1) { ++ FillOctetString(osRateSet, RateSet, 5); ++ FilterSupportRate(pMgntInfo->mBrates, &osRateSet, FALSE); ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osRateSet); ++ } else if (CurStage == 3 && (Stage == 1 || Stage == 2)) ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates)); ++ } ++ ++ Stage = CurStage; ++#endif ++} ++ ++ ++VOID ++phydm_ra_info_init( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) ++ phydm_ra_dynamic_retry_limit_init(pDM_Odm); ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ phydm_ra_dynamic_rate_id_init(pDM_Odm); ++ #endif ++ ++ /*phydm_fw_trace_en_h2c(pDM_Odm, 1, 0, 0);*/ ++} ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++u1Byte ++odm_Find_RTS_Rate( ++ IN PVOID pDM_VOID, ++ IN u1Byte Tx_Rate, ++ IN BOOLEAN bErpProtect ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte RTS_Ini_Rate = ODM_RATE6M; ++ ++ if (bErpProtect) /* use CCK rate as RTS*/ ++ RTS_Ini_Rate = ODM_RATE1M; ++ else { ++ switch (Tx_Rate) { ++ case ODM_RATEVHTSS3MCS9: ++ case ODM_RATEVHTSS3MCS8: ++ case ODM_RATEVHTSS3MCS7: ++ case ODM_RATEVHTSS3MCS6: ++ case ODM_RATEVHTSS3MCS5: ++ case ODM_RATEVHTSS3MCS4: ++ case ODM_RATEVHTSS3MCS3: ++ case ODM_RATEVHTSS2MCS9: ++ case ODM_RATEVHTSS2MCS8: ++ case ODM_RATEVHTSS2MCS7: ++ case ODM_RATEVHTSS2MCS6: ++ case ODM_RATEVHTSS2MCS5: ++ case ODM_RATEVHTSS2MCS4: ++ case ODM_RATEVHTSS2MCS3: ++ case ODM_RATEVHTSS1MCS9: ++ case ODM_RATEVHTSS1MCS8: ++ case ODM_RATEVHTSS1MCS7: ++ case ODM_RATEVHTSS1MCS6: ++ case ODM_RATEVHTSS1MCS5: ++ case ODM_RATEVHTSS1MCS4: ++ case ODM_RATEVHTSS1MCS3: ++ case ODM_RATEMCS15: ++ case ODM_RATEMCS14: ++ case ODM_RATEMCS13: ++ case ODM_RATEMCS12: ++ case ODM_RATEMCS11: ++ case ODM_RATEMCS7: ++ case ODM_RATEMCS6: ++ case ODM_RATEMCS5: ++ case ODM_RATEMCS4: ++ case ODM_RATEMCS3: ++ case ODM_RATE54M: ++ case ODM_RATE48M: ++ case ODM_RATE36M: ++ case ODM_RATE24M: ++ RTS_Ini_Rate = ODM_RATE24M; ++ break; ++ case ODM_RATEVHTSS3MCS2: ++ case ODM_RATEVHTSS3MCS1: ++ case ODM_RATEVHTSS2MCS2: ++ case ODM_RATEVHTSS2MCS1: ++ case ODM_RATEVHTSS1MCS2: ++ case ODM_RATEVHTSS1MCS1: ++ case ODM_RATEMCS10: ++ case ODM_RATEMCS9: ++ case ODM_RATEMCS2: ++ case ODM_RATEMCS1: ++ case ODM_RATE18M: ++ case ODM_RATE12M: ++ RTS_Ini_Rate = ODM_RATE12M; ++ break; ++ case ODM_RATEVHTSS3MCS0: ++ case ODM_RATEVHTSS2MCS0: ++ case ODM_RATEVHTSS1MCS0: ++ case ODM_RATEMCS8: ++ case ODM_RATEMCS0: ++ case ODM_RATE9M: ++ case ODM_RATE6M: ++ RTS_Ini_Rate = ODM_RATE6M; ++ break; ++ case ODM_RATE11M: ++ case ODM_RATE5_5M: ++ case ODM_RATE2M: ++ case ODM_RATE1M: ++ RTS_Ini_Rate = ODM_RATE1M; ++ break; ++ default: ++ RTS_Ini_Rate = ODM_RATE6M; ++ break; ++ } ++ } ++ ++ if (*pDM_Odm->pBandType == 1) { ++ if (RTS_Ini_Rate < ODM_RATE6M) ++ RTS_Ini_Rate = ODM_RATE6M; ++ } ++ return RTS_Ini_Rate; ++ ++} ++ ++VOID ++odm_Set_RA_DM_ARFB_by_Noisy( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ /*DbgPrint("DM_ARFB ====>\n");*/ ++ if (pDM_Odm->bNoisyState) { ++ ODM_Write4Byte(pDM_Odm, 0x430, 0x00000000); ++ ODM_Write4Byte(pDM_Odm, 0x434, 0x05040200); ++ /*DbgPrint("DM_ARFB ====> Noisy State\n");*/ ++ } else { ++ ODM_Write4Byte(pDM_Odm, 0x430, 0x02010000); ++ ODM_Write4Byte(pDM_Odm, 0x434, 0x07050403); ++ /*DbgPrint("DM_ARFB ====> Clean State\n");*/ ++ } ++ ++} ++ ++VOID ++ODM_UpdateNoisyState( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN bNoisyStateFromC2H ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ /*DbgPrint("Get C2H Command! NoisyState=0x%x\n ", bNoisyStateFromC2H);*/ ++ if (pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 || ++ pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E) ++ pDM_Odm->bNoisyState = bNoisyStateFromC2H; ++ odm_Set_RA_DM_ARFB_by_Noisy(pDM_Odm); ++}; ++ ++u4Byte ++Set_RA_DM_Ratrbitmap_by_Noisy( ++ IN PVOID pDM_VOID, ++ IN WIRELESS_MODE WirelessMode, ++ IN u4Byte ratr_bitmap, ++ IN u1Byte rssi_level ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte ret_bitmap = ratr_bitmap; ++ ++ return ret_bitmap; ++ ++ switch (WirelessMode) { ++ case WIRELESS_MODE_AC_24G: ++ case WIRELESS_MODE_AC_5G: ++ case WIRELESS_MODE_AC_ONLY: ++ if (pDM_Odm->bNoisyState) { /*in Noisy State*/ ++ if (rssi_level == 1) ++ ret_bitmap &= 0xfc3e0c08; // Reserve MCS 5-9 ++ else if (rssi_level == 2) ++ ret_bitmap &= 0xfe3f8e08; // Reserve MCS 3-9 ++ else if (rssi_level == 3) ++ ret_bitmap &= 0xffffffff; ++ else ++ ret_bitmap &= 0xffffffff; ++ } else { /* in SNR State*/ ++ if (rssi_level == 1) ++ ret_bitmap &= 0xfe3f0e08; // Reserve MCS 4-9 ++ else if (rssi_level == 2) ++ ret_bitmap &= 0xff3fcf8c; // Reserve MCS 2-9 ++ else if (rssi_level == 3) ++ ret_bitmap &= 0xffffffff; ++ else ++ ret_bitmap &= 0xffffffff; ++ } ++ break; ++ case WIRELESS_MODE_B: ++ case WIRELESS_MODE_A: ++ case WIRELESS_MODE_G: ++ case WIRELESS_MODE_N_24G: ++ case WIRELESS_MODE_N_5G: ++ if (pDM_Odm->bNoisyState) { ++ if (rssi_level == 1) ++ ret_bitmap &= 0x0f0e0c08; // Reserve MCS 4-7; MCS12-15 ++ else if (rssi_level == 2) ++ ret_bitmap &= 0x0fcfce0c; // Reserve MCS 2-7; MCS10-15 ++ else if (rssi_level == 3) ++ ret_bitmap &= 0xffffffff; ++ else ++ ret_bitmap &= 0xffffffff; ++ } else { ++ if (rssi_level == 1) ++ ret_bitmap &= 0x0f8f8e08; // Reserve MCS 3-7; MCS11-15 ++ else if (rssi_level == 2) ++ ret_bitmap &= 0x0fefef8c; // Reserve MCS 1-7; MCS9-15 ++ else if (rssi_level == 3) ++ ret_bitmap &= 0xffffffff; ++ else ++ ret_bitmap &= 0xffffffff; ++ } ++ break; ++ default: ++ break; ++ } ++ /*DbgPrint("DM_RAMask ====> rssi_LV = %d, BITMAP = %x\n", rssi_level, ret_bitmap);*/ ++ return ret_bitmap; ++ ++} ++ ++VOID ++ODM_UpdateInitRate( ++ IN PVOID pDM_VOID, ++ IN u1Byte Rate ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte p = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Get C2H Command! Rate=0x%x\n", Rate)); ++ ++ pDM_Odm->TxRate = Rate; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#if DEV_BUS_TYPE == RT_PCI_INTERFACE ++#if USE_WORKITEM ++ PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem); ++#else ++ if (pDM_Odm->SupportICType == ODM_RTL8821) { ++#if (RTL8821A_SUPPORT == 1) ++ ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++#endif ++ } else if (pDM_Odm->SupportICType == ODM_RTL8812) { ++ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) { ++#if (RTL8812A_SUPPORT == 1) ++ ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0); ++#endif ++ } ++ } else if (pDM_Odm->SupportICType == ODM_RTL8723B) { ++#if (RTL8723B_SUPPORT == 1) ++ ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++#endif ++ } else if (pDM_Odm->SupportICType == ODM_RTL8192E) { ++ for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) { ++#if (RTL8192E_SUPPORT == 1) ++ ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0); ++#endif ++ } ++ } else if (pDM_Odm->SupportICType == ODM_RTL8188E) { ++#if (RTL8188E_SUPPORT == 1) ++ ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); ++#endif ++ } ++#endif ++#else ++ PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem); ++#endif ++#endif ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++odm_RSSIDumpToRegister( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ if (pDM_Odm->SupportICType == ODM_RTL8812) { ++ PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[0]); ++ PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[1]); ++ ++ /* Rx EVM*/ ++ PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[0]); ++ PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[1]); ++ ++ /* Rx SNR*/ ++ PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); ++ PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); ++ ++ /* Rx Cfo_Short*/ ++ PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[0]); ++ PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[1]); ++ ++ /* Rx Cfo_Tail*/ ++ PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[0]); ++ PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[1]); ++ } else if (pDM_Odm->SupportICType == ODM_RTL8192E) { ++ PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[0]); ++ PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[1]); ++ /* Rx EVM*/ ++ PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[0]); ++ PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[1]); ++ /* Rx SNR*/ ++ PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); ++ PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); ++ /* Rx Cfo_Short*/ ++ PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[0]); ++ PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[1]); ++ /* Rx Cfo_Tail*/ ++ PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[0]); ++ PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[1]); ++ } ++} ++ ++VOID ++odm_RefreshLdpcRtsMP( ++ IN PADAPTER pAdapter, ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte mMacId, ++ IN u1Byte IOTPeer, ++ IN s4Byte UndecoratedSmoothedPWDB ++) ++{ ++ BOOLEAN bCtlLdpc = FALSE; ++ PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); ++ PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; ++ ++ if (pDM_Odm->SupportICType != ODM_RTL8821 && pDM_Odm->SupportICType != ODM_RTL8812) ++ return; ++ ++ if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) ++ bCtlLdpc = TRUE; ++ else if (pDM_Odm->SupportICType == ODM_RTL8812 && ++ IOTPeer == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP) ++ bCtlLdpc = TRUE; ++ ++ if (bCtlLdpc) { ++ if (UndecoratedSmoothedPWDB < (pRA->LdpcThres - 5)) ++ MgntSet_TX_LDPC(pAdapter, mMacId, TRUE); ++ else if (UndecoratedSmoothedPWDB > pRA->LdpcThres) ++ MgntSet_TX_LDPC(pAdapter, mMacId, FALSE); ++ } ++ ++ if (UndecoratedSmoothedPWDB < (pRA->RtsThres - 5)) ++ pRA->bLowerRtsRate = TRUE; ++ else if (UndecoratedSmoothedPWDB > pRA->RtsThres) ++ pRA->bLowerRtsRate = FALSE; ++} ++ ++VOID ++ODM_DynamicARFBSelect( ++ IN PVOID pDM_VOID, ++ IN u1Byte rate, ++ IN BOOLEAN Collision_State ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; ++ ++ if (pDM_Odm->SupportICType != ODM_RTL8192E) ++ return; ++ ++ if (Collision_State == pRA_Table->PT_collision_pre) ++ return; ++ ++ if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS12) { ++ if (Collision_State == 1) { ++ if (rate == DESC_RATEMCS12) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060501); ++ } else if (rate == DESC_RATEMCS11) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07070605); ++ } else if (rate == DESC_RATEMCS10) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080706); ++ } else if (rate == DESC_RATEMCS9) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080707); ++ } else { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09090808); ++ } ++ } else { /* Collision_State == 0*/ ++ if (rate == DESC_RATEMCS12) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05010000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); ++ } else if (rate == DESC_RATEMCS11) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x06050000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080807); ++ } else if (rate == DESC_RATEMCS10) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07060000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090908); ++ } else if (rate == DESC_RATEMCS9) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07070000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090808); ++ } else { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x08080000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0b0a0909); ++ } ++ } ++ } else { /* MCS13~MCS15, 1SS, G-mode*/ ++ if (Collision_State == 1) { ++ if (rate == DESC_RATEMCS15) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x05040302); ++ } else if (rate == DESC_RATEMCS14) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050302); ++ } else if (rate == DESC_RATEMCS13) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060502); ++ } else { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050402); ++ } ++ } else { // Collision_State == 0 ++ if (rate == DESC_RATEMCS15) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060504); ++ } else if (rate == DESC_RATEMCS14) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); ++ } else if (rate == DESC_RATEMCS13) { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05020000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); ++ } else { ++ ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x04020000); ++ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); ++ } ++ ++ ++ } ++ ++ } ++ pRA_Table->PT_collision_pre = Collision_State; ++} ++ ++VOID ++ODM_RateAdaptiveStateApInit( ++ IN PVOID PADAPTER_VOID, ++ IN PRT_WLAN_STA pEntry ++) ++{ ++ PADAPTER Adapter = (PADAPTER)PADAPTER_VOID; ++ pEntry->Ratr_State = DM_RATR_STA_INIT; ++} ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ ++ ++static void ++FindMinimumRSSI( ++ IN PADAPTER pAdapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ ++ /*Determine the minimum RSSI*/ ++ ++ if ((pDM_Odm->bLinked != _TRUE) && ++ (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) { ++ pHalData->MinUndecoratedPWDBForDM = 0; ++ /*ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any\n"));*/ ++ } else ++ pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ ++ /*DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM);*/ ++ /*ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM));*/ ++} ++ ++u8Byte ++PhyDM_Get_Rate_Bitmap_Ex( ++ IN PVOID pDM_VOID, ++ IN u4Byte macid, ++ IN u8Byte ra_mask, ++ IN u1Byte rssi_level, ++ OUT u8Byte *dm_RA_Mask, ++ OUT u1Byte *dm_RteID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PSTA_INFO_T pEntry; ++ u8Byte rate_bitmap = 0; ++ u1Byte WirelessMode; ++ ++ pEntry = pDM_Odm->pODM_StaInfo[macid]; ++ if (!IS_STA_VALID(pEntry)) ++ return ra_mask; ++ WirelessMode = pEntry->wireless_mode; ++ switch (WirelessMode) { ++ case ODM_WM_B: ++ if (ra_mask & 0x000000000000000c) /* 11M or 5.5M enable */ ++ rate_bitmap = 0x000000000000000d; ++ else ++ rate_bitmap = 0x000000000000000f; ++ break; ++ ++ case (ODM_WM_G): ++ case (ODM_WM_A): ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x0000000000000f00; ++ else ++ rate_bitmap = 0x0000000000000ff0; ++ break; ++ ++ case (ODM_WM_B|ODM_WM_G): ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x0000000000000f00; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x0000000000000ff0; ++ else ++ rate_bitmap = 0x0000000000000ff5; ++ break; ++ ++ case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G): ++ case (ODM_WM_B|ODM_WM_N24G): ++ case (ODM_WM_G|ODM_WM_N24G): ++ case (ODM_WM_A|ODM_WM_N5G): { ++ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x00000000000f0000; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x00000000000ff000; ++ else { ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ rate_bitmap = 0x00000000000ff015; ++ else ++ rate_bitmap = 0x00000000000ff005; ++ } ++ } else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) { ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x000000000f8f0000; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x000000000f8ff000; ++ else { ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ rate_bitmap = 0x000000000f8ff015; ++ else ++ rate_bitmap = 0x000000000f8ff005; ++ } ++ } else { ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x0000000f0f0f0000; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x0000000fcfcfe000; ++ else { ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ rate_bitmap = 0x0000000ffffff015; ++ else ++ rate_bitmap = 0x0000000ffffff005; ++ } ++ } ++ } ++ break; ++ ++ case (ODM_WM_AC|ODM_WM_G): ++ if (rssi_level == 1) ++ rate_bitmap = 0x00000000fc3f0000; ++ else if (rssi_level == 2) ++ rate_bitmap = 0x00000000fffff000; ++ else ++ rate_bitmap = 0x00000000ffffffff; ++ break; ++ ++ case (ODM_WM_AC|ODM_WM_A): ++ ++ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { ++ if (rssi_level == 1) /* add by Gary for ac-series */ ++ rate_bitmap = 0x00000000003f8000; ++ else if (rssi_level == 2) ++ rate_bitmap = 0x00000000003fe000; ++ else ++ rate_bitmap = 0x00000000003ff010; ++ } else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) { ++ if (rssi_level == 1) /* add by Gary for ac-series */ ++ rate_bitmap = 0x00000000fe3f8000; /* VHT 2SS MCS3~9 */ ++ else if (rssi_level == 2) ++ rate_bitmap = 0x00000000fffff000; /* VHT 2SS MCS0~9 */ ++ else ++ rate_bitmap = 0x00000000fffff010; /* All */ ++ } else { ++ if (rssi_level == 1) /* add by Gary for ac-series */ ++ rate_bitmap = 0x000003f8fe3f8000ULL; /* VHT 3SS MCS3~9 */ ++ else if (rssi_level == 2) ++ rate_bitmap = 0x000003fffffff000ULL; /* VHT3SS MCS0~9 */ ++ else ++ rate_bitmap = 0x000003fffffff010ULL; /* All */ ++ } ++ break; ++ ++ default: ++ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) ++ rate_bitmap = 0x00000000000fffff; ++ else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) ++ rate_bitmap = 0x000000000fffffff; ++ else ++ rate_bitmap = 0x0000003fffffffffULL; ++ break; ++ ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%016llx\n", rssi_level, WirelessMode, rate_bitmap)); ++ ++ return (ra_mask & rate_bitmap); ++} ++ ++ ++u4Byte ++ODM_Get_Rate_Bitmap( ++ IN PVOID pDM_VOID, ++ IN u4Byte macid, ++ IN u4Byte ra_mask, ++ IN u1Byte rssi_level ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PSTA_INFO_T pEntry; ++ u4Byte rate_bitmap = 0; ++ u1Byte WirelessMode; ++ //u1Byte WirelessMode =*(pDM_Odm->pWirelessMode); ++ ++ ++ pEntry = pDM_Odm->pODM_StaInfo[macid]; ++ if (!IS_STA_VALID(pEntry)) ++ return ra_mask; ++ ++ WirelessMode = pEntry->wireless_mode; ++ ++ switch (WirelessMode) { ++ case ODM_WM_B: ++ if (ra_mask & 0x0000000c) //11M or 5.5M enable ++ rate_bitmap = 0x0000000d; ++ else ++ rate_bitmap = 0x0000000f; ++ break; ++ ++ case (ODM_WM_G): ++ case (ODM_WM_A): ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x00000f00; ++ else ++ rate_bitmap = 0x00000ff0; ++ break; ++ ++ case (ODM_WM_B|ODM_WM_G): ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x00000f00; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x00000ff0; ++ else ++ rate_bitmap = 0x00000ff5; ++ break; ++ ++ case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G) : ++ case (ODM_WM_B|ODM_WM_N24G) : ++ case (ODM_WM_G|ODM_WM_N24G) : ++ case (ODM_WM_A|ODM_WM_N5G) : { ++ if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x000f0000; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x000ff000; ++ else { ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ rate_bitmap = 0x000ff015; ++ else ++ rate_bitmap = 0x000ff005; ++ } ++ } else { ++ if (rssi_level == DM_RATR_STA_HIGH) ++ rate_bitmap = 0x0f8f0000; ++ else if (rssi_level == DM_RATR_STA_MIDDLE) ++ rate_bitmap = 0x0f8ff000; ++ else { ++ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) ++ rate_bitmap = 0x0f8ff015; ++ else ++ rate_bitmap = 0x0f8ff005; ++ } ++ } ++ } ++ break; ++ ++ case (ODM_WM_AC|ODM_WM_G): ++ if (rssi_level == 1) ++ rate_bitmap = 0xfc3f0000; ++ else if (rssi_level == 2) ++ rate_bitmap = 0xfffff000; ++ else ++ rate_bitmap = 0xffffffff; ++ break; ++ ++ case (ODM_WM_AC|ODM_WM_A): ++ ++ if (pDM_Odm->RFType == RF_1T1R) { ++ if (rssi_level == 1) // add by Gary for ac-series ++ rate_bitmap = 0x003f8000; ++ else if (rssi_level == 2) ++ rate_bitmap = 0x003ff000; ++ else ++ rate_bitmap = 0x003ff010; ++ } else { ++ if (rssi_level == 1) // add by Gary for ac-series ++ rate_bitmap = 0xfe3f8000; // VHT 2SS MCS3~9 ++ else if (rssi_level == 2) ++ rate_bitmap = 0xfffff000; // VHT 2SS MCS0~9 ++ else ++ rate_bitmap = 0xfffff010; // All ++ } ++ break; ++ ++ default: ++ if (pDM_Odm->RFType == RF_1T2R) ++ rate_bitmap = 0x000fffff; ++ else ++ rate_bitmap = 0x0fffffff; ++ break; ++ ++ } ++ ++ DBG_871X("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", __func__, rssi_level, WirelessMode, rate_bitmap); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", rssi_level, WirelessMode, rate_bitmap)); ++ ++ return (ra_mask & rate_bitmap); ++ ++} ++ ++#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++#endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rainfo.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rainfo.h +new file mode 100644 +index 0000000..da78695 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rainfo.h +@@ -0,0 +1,445 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __PHYDMRAINFO_H__ ++#define __PHYDMRAINFO_H__ ++ ++/*#define RAINFO_VERSION "2.0" //2014.11.04*/ ++/*#define RAINFO_VERSION "3.0" //2015.01.13 Dino*/ ++/*#define RAINFO_VERSION "3.1" //2015.01.14 Dino*/ ++#define RAINFO_VERSION "3.2" /*2015.01.14 Dino*/ ++ ++#define HIGH_RSSI_THRESH 50 ++#define LOW_RSSI_THRESH 20 ++ ++#define ACTIVE_TP_THRESHOLD 150 ++#define RA_RETRY_DESCEND_NUM 2 ++#define RA_RETRY_LIMIT_LOW 4 ++#define RA_RETRY_LIMIT_HIGH 32 ++ ++#define PHYDM_IC_8051_SERIES (ODM_RTL8881A|ODM_RTL8812|ODM_RTL8821|ODM_RTL8192S|ODM_RTL8192C|ODM_RTL8192D|ODM_RTL8723A|ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8703B|ODM_RTL8188F) ++#define PHYDM_IC_3081_SERIES (ODM_RTL8814A|ODM_RTL8821B|ODM_RTL8822B) ++ ++#define RAINFO_BE_RX_STATE BIT0 // 1:RX //ULDL ++#define RAINFO_STBC_STATE BIT1 ++//#define RAINFO_LDPC_STATE BIT2 ++#define RAINFO_NOISY_STATE BIT2 // set by Noisy_Detection ++#define RAINFO_SHURTCUT_STATE BIT3 ++#define RAINFO_SHURTCUT_FLAG BIT4 ++#define RAINFO_INIT_RSSI_RATE_STATE BIT5 ++#define RAINFO_BF_STATE BIT6 ++#define RAINFO_BE_TX_STATE BIT7 // 1:TX ++ ++#define RA_MASK_CCK 0xf ++#define RA_MASK_OFDM 0xff0 ++#define RA_MASK_HT1SS 0xff000 ++#define RA_MASK_HT2SS 0xff00000 ++/*#define RA_MASK_MCS3SS */ ++#define RA_MASK_HT4SS 0xff0 ++#define RA_MASK_VHT1SS 0x3ff000 ++#define RA_MASK_VHT2SS 0xffc00000 ++ ++#if(DM_ODM_SUPPORT_TYPE == ODM_AP) ++#define EXT_RA_INFO_SUPPORT_IC (ODM_RTL8881A |ODM_RTL8192E |ODM_RTL8812 |ODM_RTL8814A|ODM_RTL8822B) ++#define RA_FIRST_MACID 1 ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#define EXT_RA_INFO_SUPPORT_IC (ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8723B | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8703B) ++#define RA_FIRST_MACID 0 ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++/*#define EXT_RA_INFO_SUPPORT_IC (ODM_RTL8192E|ODM_RTL8812|ODM_RTL8821|ODM_RTL8723B|ODM_RTL8814A|ODM_RTL8822B|ODM_RTL8703B) */ ++#define RA_FIRST_MACID 0 ++#endif ++ ++ ++#define AP_InitRateAdaptiveState ODM_RateAdaptiveStateApInit ++ ++#define DM_RATR_STA_INIT 0 ++#define DM_RATR_STA_HIGH 1 ++#define DM_RATR_STA_MIDDLE 2 ++#define DM_RATR_STA_LOW 3 ++#if(DM_ODM_SUPPORT_TYPE & ODM_AP) ++#define DM_RATR_STA_ULTRA_LOW 4 ++#endif ++ ++#define DM_RA_RATE_UP 1 ++#define DM_RA_RATE_DOWN 2 ++ ++typedef enum _phydm_arfr_num { ++ ARFR_0_RATE_ID = 0x9, ++ ARFR_1_RATE_ID = 0xa, ++ ARFR_2_RATE_ID = 0xb, ++ ARFR_3_RATE_ID = 0xc, ++ ARFR_4_RATE_ID = 0xd, ++ ARFR_5_RATE_ID = 0xe ++} PHYDM_RA_ARFR_NUM_E; ++ ++typedef enum _Phydm_ra_dbg_para { ++ RADBG_RTY_PENALTY = 1, //u8 ++ RADBG_N_HIGH = 2, ++ RADBG_N_LOW = 3, ++ RADBG_TRATE_UP_TABLE = 4, ++ RADBG_TRATE_DOWN_TABLE = 5, ++ RADBG_TRYING_NECESSARY = 6, ++ RADBG_TDROPING_NECESSARY = 7, ++ RADBG_RATE_UP_RTY_RATIO = 8, //u8 ++ RADBG_RATE_DOWN_RTY_RATIO = 9, //u8 ++ ++ RADBG_DEBUG_MONITOR1 = 0xc, ++ RADBG_DEBUG_MONITOR2 = 0xd, ++ RADBG_DEBUG_MONITOR3 = 0xe, ++ RADBG_DEBUG_MONITOR4 = 0xf, ++ NUM_RA_PARA ++} PHYDM_RA_DBG_PARA_E; ++ ++ ++#if (RATE_ADAPTIVE_SUPPORT == 1)//88E RA ++typedef struct _ODM_RA_Info_ { ++ u1Byte RateID; ++ u4Byte RateMask; ++ u4Byte RAUseRate; ++ u1Byte RateSGI; ++ u1Byte RssiStaRA; ++ u1Byte PreRssiStaRA; ++ u1Byte SGIEnable; ++ u1Byte DecisionRate; ++ u1Byte PreRate; ++ u1Byte HighestRate; ++ u1Byte LowestRate; ++ u4Byte NscUp; ++ u4Byte NscDown; ++ u2Byte RTY[5]; ++ u4Byte TOTAL; ++ u2Byte DROP; ++ u1Byte Active; ++ u2Byte RptTime; ++ u1Byte RAWaitingCounter; ++ u1Byte RAPendingCounter; ++#if 1 //POWER_TRAINING_ACTIVE == 1 // For compile pass only~! ++ u1Byte PTActive; // on or off ++ u1Byte PTTryState; // 0 trying state, 1 for decision state ++ u1Byte PTStage; // 0~6 ++ u1Byte PTStopCount; //Stop PT counter ++ u1Byte PTPreRate; // if rate change do PT ++ u1Byte PTPreRssi; // if RSSI change 5% do PT ++ u1Byte PTModeSS; // decide whitch rate should do PT ++ u1Byte RAstage; // StageRA, decide how many times RA will be done between PT ++ u1Byte PTSmoothFactor; ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ u1Byte RateDownCounter; ++ u1Byte RateUpCounter; ++ u1Byte RateDirection; ++ u1Byte BoundingType; ++ u1Byte BoundingCounter; ++ u1Byte BoundingLearningTime; ++ u1Byte RateDownStartTime; ++#endif ++} ODM_RA_INFO_T, *PODM_RA_INFO_T; ++#endif ++ ++ ++typedef struct _Rate_Adaptive_Table_ { ++ u1Byte firstconnect; ++#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) ++ BOOLEAN PT_collision_pre; ++#endif ++ ++#if (defined(CONFIG_RA_DBG_CMD)) ++ BOOLEAN is_ra_dbg_init; ++ ++ u1Byte RTY_P[ODM_NUM_RATE_IDX]; ++ u1Byte RTY_P_default[ODM_NUM_RATE_IDX]; ++ BOOLEAN RTY_P_modify_note[ODM_NUM_RATE_IDX]; ++ ++ u1Byte RATE_UP_RTY_RATIO[ODM_NUM_RATE_IDX]; ++ u1Byte RATE_UP_RTY_RATIO_default[ODM_NUM_RATE_IDX]; ++ BOOLEAN RATE_UP_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX]; ++ ++ u1Byte RATE_DOWN_RTY_RATIO[ODM_NUM_RATE_IDX]; ++ u1Byte RATE_DOWN_RTY_RATIO_default[ODM_NUM_RATE_IDX]; ++ BOOLEAN RATE_DOWN_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX]; ++ ++ BOOLEAN RA_Para_feedback_req; ++ ++ u1Byte para_idx; ++ u1Byte rate_idx; ++ u1Byte value; ++ u2Byte value_16; ++ u1Byte rate_length; ++#endif ++ u1Byte link_tx_rate[ODM_ASSOCIATE_ENTRY_NUM]; ++ ++ #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT)) ++ u1Byte per_rate_retrylimit_20M[ODM_NUM_RATE_IDX]; ++ u1Byte per_rate_retrylimit_40M[ODM_NUM_RATE_IDX]; ++ u1Byte retry_descend_num; ++ u1Byte retrylimit_low; ++ u1Byte retrylimit_high; ++ #endif ++ ++ ++} RA_T, *pRA_T; ++ ++typedef struct _ODM_RATE_ADAPTIVE { ++ u1Byte Type; // DM_Type_ByFW/DM_Type_ByDriver ++ u1Byte HighRSSIThresh; // if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH ++ u1Byte LowRSSIThresh; // if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW ++ u1Byte RATRState; // Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW ++ ++#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ u1Byte LdpcThres; // if RSSI > LdpcThres => switch from LPDC to BCC ++ BOOLEAN bLowerRtsRate; ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ u1Byte RtsThres; ++#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) ++ BOOLEAN bUseLdpc; ++#else ++ u1Byte UltraLowRSSIThresh; ++ u4Byte LastRATR; // RATR Register Content ++#endif ++ ++} ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE; ++ ++VOID ++ODM_C2HRaParaReportHandler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++); ++ ++VOID ++odm_RA_ParaAdjust_Send_H2C( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RA_debug( ++ IN PVOID pDM_VOID, ++ IN u4Byte *const dm_value ++); ++ ++VOID ++odm_RA_ParaAdjust_init( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RA_ParaAdjust( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++phydm_ra_dynamic_retry_count( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++phydm_ra_dynamic_retry_limit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++phydm_ra_dynamic_rate_id_on_assoc( ++ IN PVOID pDM_VOID, ++ IN u1Byte wireless_mode, ++ IN u1Byte init_rate_id ++); ++ ++VOID ++phydm_c2h_ra_report_handler( ++ IN PVOID pDM_VOID, ++ IN pu1Byte CmdBuf, ++ IN u1Byte CmdLen ++); ++ ++VOID ++phydm_ra_info_init( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RSSIMonitorInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RSSIMonitorCheck( ++ IN PVOID pDM_VOID ++); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++s4Byte ++phydm_FindMinimumRSSI( ++IN PDM_ODM_T pDM_Odm, ++IN PADAPTER pAdapter, ++IN OUT BOOLEAN *pbLink_temp ++ ++ ); ++#endif ++ ++VOID ++odm_RSSIMonitorCheckMP( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RSSIMonitorCheckCE( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RSSIMonitorCheckAP( ++ IN PVOID pDM_VOID ++); ++ ++ ++VOID ++odm_RateAdaptiveMaskInit( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RefreshRateAdaptiveMask( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RefreshRateAdaptiveMaskMP( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RefreshRateAdaptiveMaskCE( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RefreshRateAdaptiveMaskAPADSL( ++ IN PVOID pDM_VOID ++); ++ ++BOOLEAN ++ODM_RAStateCheck( ++ IN PVOID pDM_VOID, ++ IN s4Byte RSSI, ++ IN BOOLEAN bForceUpdate, ++ OUT pu1Byte pRATRState ++); ++ ++VOID ++odm_RefreshBasicRateMask( ++ IN PVOID pDM_VOID ++); ++VOID ++ODM_RAPostActionOnAssoc( ++ IN PVOID pDM_Odm ++); ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ ++u1Byte ++odm_Find_RTS_Rate( ++ IN PVOID pDM_VOID, ++ IN u1Byte Tx_Rate, ++ IN BOOLEAN bErpProtect ++); ++ ++VOID ++ODM_UpdateNoisyState( ++ IN PVOID pDM_VOID, ++ IN BOOLEAN bNoisyStateFromC2H ++); ++ ++u4Byte ++Set_RA_DM_Ratrbitmap_by_Noisy( ++ IN PVOID pDM_VOID, ++ IN WIRELESS_MODE WirelessMode, ++ IN u4Byte ratr_bitmap, ++ IN u1Byte rssi_level ++); ++ ++VOID ++ODM_UpdateInitRate( ++ IN PVOID pDM_VOID, ++ IN u1Byte Rate ++); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++VOID ++odm_RSSIDumpToRegister( ++ IN PVOID pDM_VOID ++); ++ ++VOID ++odm_RefreshLdpcRtsMP( ++ IN PADAPTER pAdapter, ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte mMacId, ++ IN u1Byte IOTPeer, ++ IN s4Byte UndecoratedSmoothedPWDB ++); ++ ++VOID ++ODM_DynamicARFBSelect( ++ IN PVOID pDM_VOID, ++ IN u1Byte rate, ++ IN BOOLEAN Collision_State ++); ++ ++VOID ++ODM_RateAdaptiveStateApInit( ++ IN PVOID PADAPTER_VOID, ++ IN PRT_WLAN_STA pEntry ++); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++static void ++FindMinimumRSSI( ++ IN PADAPTER pAdapter ++); ++ ++u8Byte ++PhyDM_Get_Rate_Bitmap_Ex( ++ IN PVOID pDM_VOID, ++ IN u4Byte macid, ++ IN u8Byte ra_mask, ++ IN u1Byte rssi_level, ++ OUT u8Byte *dm_RA_Mask, ++ OUT u1Byte *dm_RteID ++); ++u4Byte ++ODM_Get_Rate_Bitmap( ++ IN PVOID pDM_VOID, ++ IN u4Byte macid, ++ IN u4Byte ra_mask, ++ IN u1Byte rssi_level ++); ++void phydm_ra_rssi_rpt_wk(PVOID pContext); ++ ++#endif/*#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)*/ ++ ++#endif/*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))*/ ++ ++#endif /*#ifndef __ODMRAINFO_H__*/ ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_reg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_reg.h +new file mode 100644 +index 0000000..e842413 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_reg.h +@@ -0,0 +1,208 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++//============================================================ ++// File Name: odm_reg.h ++// ++// Description: ++// ++// This file is for general register definition. ++// ++// ++//============================================================ ++#ifndef __HAL_ODM_REG_H__ ++#define __HAL_ODM_REG_H__ ++ ++// ++// Register Definition ++// ++ ++//MAC REG ++#define ODM_BB_RESET 0x002 ++#define ODM_DUMMY 0x4fe ++#define RF_T_METER_OLD 0x24 ++#define RF_T_METER_NEW 0x42 ++ ++#define ODM_EDCA_VO_PARAM 0x500 ++#define ODM_EDCA_VI_PARAM 0x504 ++#define ODM_EDCA_BE_PARAM 0x508 ++#define ODM_EDCA_BK_PARAM 0x50C ++#define ODM_TXPAUSE 0x522 ++ ++//BB REG ++#define ODM_FPGA_PHY0_PAGE8 0x800 ++#define ODM_PSD_SETTING 0x808 ++#define ODM_AFE_SETTING 0x818 ++#define ODM_TXAGC_B_6_18 0x830 ++#define ODM_TXAGC_B_24_54 0x834 ++#define ODM_TXAGC_B_MCS32_5 0x838 ++#define ODM_TXAGC_B_MCS0_MCS3 0x83c ++#define ODM_TXAGC_B_MCS4_MCS7 0x848 ++#define ODM_TXAGC_B_MCS8_MCS11 0x84c ++#define ODM_ANALOG_REGISTER 0x85c ++#define ODM_RF_INTERFACE_OUTPUT 0x860 ++#define ODM_TXAGC_B_MCS12_MCS15 0x868 ++#define ODM_TXAGC_B_11_A_2_11 0x86c ++#define ODM_AD_DA_LSB_MASK 0x874 ++#define ODM_ENABLE_3_WIRE 0x88c ++#define ODM_PSD_REPORT 0x8b4 ++#define ODM_R_ANT_SELECT 0x90c ++#define ODM_CCK_ANT_SELECT 0xa07 ++#define ODM_CCK_PD_THRESH 0xa0a ++#define ODM_CCK_RF_REG1 0xa11 ++#define ODM_CCK_MATCH_FILTER 0xa20 ++#define ODM_CCK_RAKE_MAC 0xa2e ++#define ODM_CCK_CNT_RESET 0xa2d ++#define ODM_CCK_TX_DIVERSITY 0xa2f ++#define ODM_CCK_FA_CNT_MSB 0xa5b ++#define ODM_CCK_FA_CNT_LSB 0xa5c ++#define ODM_CCK_NEW_FUNCTION 0xa75 ++#define ODM_OFDM_PHY0_PAGE_C 0xc00 ++#define ODM_OFDM_RX_ANT 0xc04 ++#define ODM_R_A_RXIQI 0xc14 ++#define ODM_R_A_AGC_CORE1 0xc50 ++#define ODM_R_A_AGC_CORE2 0xc54 ++#define ODM_R_B_AGC_CORE1 0xc58 ++#define ODM_R_AGC_PAR 0xc70 ++#define ODM_R_HTSTF_AGC_PAR 0xc7c ++#define ODM_TX_PWR_TRAINING_A 0xc90 ++#define ODM_TX_PWR_TRAINING_B 0xc98 ++#define ODM_OFDM_FA_CNT1 0xcf0 ++#define ODM_OFDM_PHY0_PAGE_D 0xd00 ++#define ODM_OFDM_FA_CNT2 0xda0 ++#define ODM_OFDM_FA_CNT3 0xda4 ++#define ODM_OFDM_FA_CNT4 0xda8 ++#define ODM_TXAGC_A_6_18 0xe00 ++#define ODM_TXAGC_A_24_54 0xe04 ++#define ODM_TXAGC_A_1_MCS32 0xe08 ++#define ODM_TXAGC_A_MCS0_MCS3 0xe10 ++#define ODM_TXAGC_A_MCS4_MCS7 0xe14 ++#define ODM_TXAGC_A_MCS8_MCS11 0xe18 ++#define ODM_TXAGC_A_MCS12_MCS15 0xe1c ++ ++//RF REG ++#define ODM_GAIN_SETTING 0x00 ++#define ODM_CHANNEL 0x18 ++#define ODM_RF_T_METER 0x24 ++#define ODM_RF_T_METER_92D 0x42 ++#define ODM_RF_T_METER_88E 0x42 ++#define ODM_RF_T_METER_92E 0x42 ++#define ODM_RF_T_METER_8812 0x42 ++ ++//Ant Detect Reg ++#define ODM_DPDT 0x300 ++ ++//PSD Init ++#define ODM_PSDREG 0x808 ++ ++//92D Path Div ++#define PATHDIV_REG 0xB30 ++#define PATHDIV_TRI 0xBA0 ++ ++ ++// ++// Bitmap Definition ++// ++#if(DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++// TX AGC ++#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 ++#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 ++#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 ++#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c ++#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 ++#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 ++#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 ++#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c ++#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 ++#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 ++#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 ++#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c ++#if defined(CONFIG_WLAN_HAL_8814AE) ++#define rTxAGC_A_MCS19_MCS16_JAguar 0xcd8 ++#define rTxAGC_A_MCS23_MCS20_JAguar 0xcdc ++#define rTxAGC_A_Nss3Index3_Nss3Index0_JAguar 0xce0 ++#define rTxAGC_A_Nss3Index7_Nss3Index4_JAguar 0xce4 ++#define rTxAGC_A_Nss3Index9_Nss3Index8_JAguar 0xce8 ++#endif ++#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 ++#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 ++#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 ++#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c ++#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 ++#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 ++#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 ++#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c ++#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 ++#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 ++#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 ++#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c ++#if defined(CONFIG_WLAN_HAL_8814AE) ++#define rTxAGC_B_MCS19_MCS16_JAguar 0xed8 ++#define rTxAGC_B_MCS23_MCS20_JAguar 0xedc ++#define rTxAGC_B_Nss3Index3_Nss3Index0_JAguar 0xee0 ++#define rTxAGC_B_Nss3Index7_Nss3Index4_JAguar 0xee4 ++#define rTxAGC_B_Nss3Index9_Nss3Index8_JAguar 0xee8 ++#define rTxAGC_C_CCK11_CCK1_JAguar 0x1820 ++#define rTxAGC_C_Ofdm18_Ofdm6_JAguar 0x1824 ++#define rTxAGC_C_Ofdm54_Ofdm24_JAguar 0x1828 ++#define rTxAGC_C_MCS3_MCS0_JAguar 0x182c ++#define rTxAGC_C_MCS7_MCS4_JAguar 0x1830 ++#define rTxAGC_C_MCS11_MCS8_JAguar 0x1834 ++#define rTxAGC_C_MCS15_MCS12_JAguar 0x1838 ++#define rTxAGC_C_Nss1Index3_Nss1Index0_JAguar 0x183c ++#define rTxAGC_C_Nss1Index7_Nss1Index4_JAguar 0x1840 ++#define rTxAGC_C_Nss2Index1_Nss1Index8_JAguar 0x1844 ++#define rTxAGC_C_Nss2Index5_Nss2Index2_JAguar 0x1848 ++#define rTxAGC_C_Nss2Index9_Nss2Index6_JAguar 0x184c ++#define rTxAGC_C_MCS19_MCS16_JAguar 0x18d8 ++#define rTxAGC_C_MCS23_MCS20_JAguar 0x18dc ++#define rTxAGC_C_Nss3Index3_Nss3Index0_JAguar 0x18e0 ++#define rTxAGC_C_Nss3Index7_Nss3Index4_JAguar 0x18e4 ++#define rTxAGC_C_Nss3Index9_Nss3Index8_JAguar 0x18e8 ++#define rTxAGC_D_CCK11_CCK1_JAguar 0x1a20 ++#define rTxAGC_D_Ofdm18_Ofdm6_JAguar 0x1a24 ++#define rTxAGC_D_Ofdm54_Ofdm24_JAguar 0x1a28 ++#define rTxAGC_D_MCS3_MCS0_JAguar 0x1a2c ++#define rTxAGC_D_MCS7_MCS4_JAguar 0x1a30 ++#define rTxAGC_D_MCS11_MCS8_JAguar 0x1a34 ++#define rTxAGC_D_MCS15_MCS12_JAguar 0x1a38 ++#define rTxAGC_D_Nss1Index3_Nss1Index0_JAguar 0x1a3c ++#define rTxAGC_D_Nss1Index7_Nss1Index4_JAguar 0x1a40 ++#define rTxAGC_D_Nss2Index1_Nss1Index8_JAguar 0x1a44 ++#define rTxAGC_D_Nss2Index5_Nss2Index2_JAguar 0x1a48 ++#define rTxAGC_D_Nss2Index9_Nss2Index6_JAguar 0x1a4c ++#define rTxAGC_D_MCS19_MCS16_JAguar 0x1ad8 ++#define rTxAGC_D_MCS23_MCS20_JAguar 0x1adc ++#define rTxAGC_D_Nss3Index3_Nss3Index0_JAguar 0x1ae0 ++#define rTxAGC_D_Nss3Index7_Nss3Index4_JAguar 0x1ae4 ++#define rTxAGC_D_Nss3Index9_Nss3Index8_JAguar 0x1ae8 ++#endif ++ ++#define bTxAGC_byte0_Jaguar 0xff ++#define bTxAGC_byte1_Jaguar 0xff00 ++#define bTxAGC_byte2_Jaguar 0xff0000 ++#define bTxAGC_byte3_Jaguar 0xff000000 ++#endif ++ ++#define BIT_FA_RESET BIT0 ++ ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_regdefine11ac.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_regdefine11ac.h +new file mode 100644 +index 0000000..c8a551d +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_regdefine11ac.h +@@ -0,0 +1,90 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __ODM_REGDEFINE11AC_H__ ++#define __ODM_REGDEFINE11AC_H__ ++ ++//2 RF REG LIST ++ ++ ++ ++//2 BB REG LIST ++//PAGE 8 ++#define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 ++#define ODM_REG_BB_RX_PATH_11AC 0x808 ++#define ODM_REG_BB_TX_PATH_11AC 0x80c ++#define ODM_REG_BB_ATC_11AC 0x860 ++#define ODM_REG_EDCCA_POWER_CAL 0x8dc ++#define ODM_REG_DBG_RPT_11AC 0x8fc ++//PAGE 9 ++#define ODM_REG_EDCCA_DOWN_OPT 0x900 ++#define ODM_REG_ACBB_EDCCA_ENHANCE 0x944 ++#define ODM_REG_OFDM_FA_RST_11AC 0x9A4 ++#define ODM_REG_NHM_TIMER_11AC 0x990 ++#define ODM_REG_CLM_TIME_PERIOD_11AC 0x990 ++#define ODM_REG_NHM_TH9_TH10_11AC 0x994 ++#define ODM_REG_CLM_11AC 0x994 ++#define ODM_REG_NHM_TH3_TO_TH0_11AC 0x998 ++#define ODM_REG_NHM_TH7_TO_TH4_11AC 0x99c ++#define ODM_REG_NHM_TH8_11AC 0x9a0 ++#define ODM_REG_NHM_9E8_11AC 0x9e8 ++#define ODM_REG_CSI_CONTENT_VALUE 0x9b4 ++//PAGE A ++#define ODM_REG_CCK_CCA_11AC 0xA0A ++#define ODM_REG_CCK_FA_RST_11AC 0xA2C ++#define ODM_REG_CCK_FA_11AC 0xA5C ++//PAGE B ++#define ODM_REG_RST_RPT_11AC 0xB58 ++//PAGE C ++#define ODM_REG_TRMUX_11AC 0xC08 ++#define ODM_REG_IGI_A_11AC 0xC50 ++//PAGE E ++#define ODM_REG_IGI_B_11AC 0xE50 ++#define ODM_REG_TRMUX_11AC_B 0xE08 ++//PAGE F ++#define ODM_REG_CCK_CCA_CNT_11AC 0xF08 ++#define ODM_REG_OFDM_FA_11AC 0xF48 ++#define ODM_REG_RPT_11AC 0xfa0 ++#define ODM_REG_CLM_RESULT_11AC 0xfa4 ++#define ODM_REG_NHM_CNT_11AC 0xfa8 ++#define ODM_REG_NHM_DUR_READY_11AC 0xfb4 ++ ++#define ODM_REG_NHM_CNT7_TO_CNT4_11AC 0xfac ++#define ODM_REG_NHM_CNT11_TO_CNT8_11AC 0xfb0 ++#define ODM_REG_OFDM_FA_TYPE2_11AC 0xFD0 ++//PAGE 18 ++#define ODM_REG_IGI_C_11AC 0x1850 ++//PAGE 1A ++#define ODM_REG_IGI_D_11AC 0x1A50 ++ ++//2 MAC REG LIST ++#define ODM_REG_RESP_TX_11AC 0x6D8 ++ ++ ++ ++//DIG Related ++#define ODM_BIT_IGI_11AC 0xFFFFFFFF ++#define ODM_BIT_CCK_RPT_FORMAT_11AC BIT16 ++#define ODM_BIT_BB_RX_PATH_11AC 0xF ++#define ODM_BIT_BB_TX_PATH_11AC 0xF ++#define ODM_BIT_BB_ATC_11AC BIT14 ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_regdefine11n.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_regdefine11n.h +new file mode 100644 +index 0000000..8826dfb +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_regdefine11n.h +@@ -0,0 +1,199 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __ODM_REGDEFINE11N_H__ ++#define __ODM_REGDEFINE11N_H__ ++ ++ ++//2 RF REG LIST ++#define ODM_REG_RF_MODE_11N 0x00 ++#define ODM_REG_RF_0B_11N 0x0B ++#define ODM_REG_CHNBW_11N 0x18 ++#define ODM_REG_T_METER_11N 0x24 ++#define ODM_REG_RF_25_11N 0x25 ++#define ODM_REG_RF_26_11N 0x26 ++#define ODM_REG_RF_27_11N 0x27 ++#define ODM_REG_RF_2B_11N 0x2B ++#define ODM_REG_RF_2C_11N 0x2C ++#define ODM_REG_RXRF_A3_11N 0x3C ++#define ODM_REG_T_METER_92D_11N 0x42 ++#define ODM_REG_T_METER_88E_11N 0x42 ++ ++ ++ ++//2 BB REG LIST ++//PAGE 8 ++#define ODM_REG_BB_CTRL_11N 0x800 ++#define ODM_REG_RF_PIN_11N 0x804 ++#define ODM_REG_PSD_CTRL_11N 0x808 ++#define ODM_REG_TX_ANT_CTRL_11N 0x80C ++#define ODM_REG_BB_PWR_SAV5_11N 0x818 ++#define ODM_REG_CCK_RPT_FORMAT_11N 0x824 ++#define ODM_REG_CCK_RPT_FORMAT_11N_B 0x82C ++#define ODM_REG_RX_DEFUALT_A_11N 0x858 ++#define ODM_REG_RX_DEFUALT_B_11N 0x85A ++#define ODM_REG_BB_PWR_SAV3_11N 0x85C ++#define ODM_REG_ANTSEL_CTRL_11N 0x860 ++#define ODM_REG_RX_ANT_CTRL_11N 0x864 ++#define ODM_REG_PIN_CTRL_11N 0x870 ++#define ODM_REG_BB_PWR_SAV1_11N 0x874 ++#define ODM_REG_ANTSEL_PATH_11N 0x878 ++#define ODM_REG_BB_3WIRE_11N 0x88C ++#define ODM_REG_SC_CNT_11N 0x8C4 ++#define ODM_REG_PSD_DATA_11N 0x8B4 ++#define ODM_REG_PSD_DATA_11N 0x8B4 ++#define ODM_REG_NHM_TIMER_11N 0x894 ++#define ODM_REG_CLM_TIME_PERIOD_11N 0x894 ++#define ODM_REG_NHM_TH9_TH10_11N 0x890 ++#define ODM_REG_CLM_11N 0x890 ++#define ODM_REG_NHM_TH3_TO_TH0_11N 0x898 ++#define ODM_REG_NHM_TH7_TO_TH4_11N 0x89c ++#define ODM_REG_NHM_TH8_11N 0xe28 ++#define ODM_REG_CLM_READY_11N 0x8b4 ++#define ODM_REG_CLM_RESULT_11N 0x8d0 ++#define ODM_REG_NHM_CNT_11N 0x8d8 ++ ++// For ACS, Jeffery, 2014-12-26 ++#define ODM_REG_NHM_CNT7_TO_CNT4_11N 0x8dc ++#define ODM_REG_NHM_CNT9_TO_CNT8_11N 0x8d0 ++#define ODM_REG_NHM_CNT10_11N 0x8d4 ++ ++ ++ ++//PAGE 9 ++#define ODM_REG_DBG_RPT_11N 0x908 ++#define ODM_REG_BB_TX_PATH_11N 0x90c ++#define ODM_REG_ANT_MAPPING1_11N 0x914 ++#define ODM_REG_ANT_MAPPING2_11N 0x918 ++#define ODM_REG_EDCCA_DOWN_OPT_11N 0x948 ++ ++//PAGE A ++#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00 ++#define ODM_REG_CCK_CCA_11N 0xA0A ++#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C ++#define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10 ++#define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14 ++#define ODM_REG_CCK_FILTER_PARA1_11N 0xA22 ++#define ODM_REG_CCK_FILTER_PARA2_11N 0xA23 ++#define ODM_REG_CCK_FILTER_PARA3_11N 0xA24 ++#define ODM_REG_CCK_FILTER_PARA4_11N 0xA25 ++#define ODM_REG_CCK_FILTER_PARA5_11N 0xA26 ++#define ODM_REG_CCK_FILTER_PARA6_11N 0xA27 ++#define ODM_REG_CCK_FILTER_PARA7_11N 0xA28 ++#define ODM_REG_CCK_FILTER_PARA8_11N 0xA29 ++#define ODM_REG_CCK_FA_RST_11N 0xA2C ++#define ODM_REG_CCK_FA_MSB_11N 0xA58 ++#define ODM_REG_CCK_FA_LSB_11N 0xA5C ++#define ODM_REG_CCK_CCA_CNT_11N 0xA60 ++#define ODM_REG_BB_PWR_SAV4_11N 0xA74 ++//PAGE B ++#define ODM_REG_LNA_SWITCH_11N 0xB2C ++#define ODM_REG_PATH_SWITCH_11N 0xB30 ++#define ODM_REG_RSSI_CTRL_11N 0xB38 ++#define ODM_REG_CONFIG_ANTA_11N 0xB68 ++#define ODM_REG_RSSI_BT_11N 0xB9C ++//PAGE C ++#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00 ++#define ODM_REG_BB_RX_PATH_11N 0xC04 ++#define ODM_REG_TRMUX_11N 0xC08 ++#define ODM_REG_OFDM_FA_RSTC_11N 0xC0C ++#define ODM_REG_RXIQI_MATRIX_11N 0xC14 ++#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C ++#define ODM_REG_IGI_A_11N 0xC50 ++#define ODM_REG_ANTDIV_PARA2_11N 0xC54 ++#define ODM_REG_IGI_B_11N 0xC58 ++#define ODM_REG_ANTDIV_PARA3_11N 0xC5C ++#define ODM_REG_L1SBD_PD_CH_11N 0XC6C ++#define ODM_REG_BB_PWR_SAV2_11N 0xC70 ++#define ODM_REG_RX_OFF_11N 0xC7C ++#define ODM_REG_TXIQK_MATRIXA_11N 0xC80 ++#define ODM_REG_TXIQK_MATRIXB_11N 0xC88 ++#define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94 ++#define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C ++#define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0 ++#define ODM_REG_ANTDIV_PARA1_11N 0xCA4 ++#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0 ++//PAGE D ++#define ODM_REG_OFDM_FA_RSTD_11N 0xD00 ++#define ODM_REG_BB_ATC_11N 0xD2C ++#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0 ++#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4 ++#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8 ++#define ODM_REG_RPT_11N 0xDF4 ++//PAGE E ++#define ODM_REG_TXAGC_A_6_18_11N 0xE00 ++#define ODM_REG_TXAGC_A_24_54_11N 0xE04 ++#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08 ++#define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10 ++#define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14 ++#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18 ++#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C ++#define ODM_REG_EDCCA_DCNF_11N 0xE24 ++#define ODM_REG_FPGA0_IQK_11N 0xE28 ++#define ODM_REG_TXIQK_TONE_A_11N 0xE30 ++#define ODM_REG_RXIQK_TONE_A_11N 0xE34 ++#define ODM_REG_TXIQK_PI_A_11N 0xE38 ++#define ODM_REG_RXIQK_PI_A_11N 0xE3C ++#define ODM_REG_TXIQK_11N 0xE40 ++#define ODM_REG_RXIQK_11N 0xE44 ++#define ODM_REG_IQK_AGC_PTS_11N 0xE48 ++#define ODM_REG_IQK_AGC_RSP_11N 0xE4C ++#define ODM_REG_BLUETOOTH_11N 0xE6C ++#define ODM_REG_RX_WAIT_CCA_11N 0xE70 ++#define ODM_REG_TX_CCK_RFON_11N 0xE74 ++#define ODM_REG_TX_CCK_BBON_11N 0xE78 ++#define ODM_REG_OFDM_RFON_11N 0xE7C ++#define ODM_REG_OFDM_BBON_11N 0xE80 ++#define ODM_REG_TX2RX_11N 0xE84 ++#define ODM_REG_TX2TX_11N 0xE88 ++#define ODM_REG_RX_CCK_11N 0xE8C ++#define ODM_REG_RX_OFDM_11N 0xED0 ++#define ODM_REG_RX_WAIT_RIFS_11N 0xED4 ++#define ODM_REG_RX2RX_11N 0xED8 ++#define ODM_REG_STANDBY_11N 0xEDC ++#define ODM_REG_SLEEP_11N 0xEE0 ++#define ODM_REG_PMPD_ANAEN_11N 0xEEC ++#define ODM_REG_IGI_C_11N 0xF84 ++#define ODM_REG_IGI_D_11N 0xF88 ++ ++//2 MAC REG LIST ++#define ODM_REG_BB_RST_11N 0x02 ++#define ODM_REG_ANTSEL_PIN_11N 0x4C ++#define ODM_REG_EARLY_MODE_11N 0x4D0 ++#define ODM_REG_RSSI_MONITOR_11N 0x4FE ++#define ODM_REG_EDCA_VO_11N 0x500 ++#define ODM_REG_EDCA_VI_11N 0x504 ++#define ODM_REG_EDCA_BE_11N 0x508 ++#define ODM_REG_EDCA_BK_11N 0x50C ++#define ODM_REG_TXPAUSE_11N 0x522 ++#define ODM_REG_RESP_TX_11N 0x6D8 ++#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0 ++#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4 ++ ++ ++//DIG Related ++#define ODM_BIT_IGI_11N 0x0000007F ++#define ODM_BIT_CCK_RPT_FORMAT_11N BIT9 ++#define ODM_BIT_BB_RX_PATH_11N 0xF ++#define ODM_BIT_BB_TX_PATH_11N 0xF ++#define ODM_BIT_BB_ATC_11N BIT11 ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rxhp.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rxhp.c +new file mode 100644 +index 0000000..9451d55 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rxhp.c +@@ -0,0 +1,1692 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "phydm_precomp.h" ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD ++#define MODE_40M 0 //0:20M, 1:40M ++#define PSD_TH2 3 ++#define PSD_CHMIN 20 // Minimum channel number for BT AFH ++#define SIR_STEP_SIZE 3 ++#define Smooth_Size_1 5 ++#define Smooth_TH_1 3 ++#define Smooth_Size_2 10 ++#define Smooth_TH_2 4 ++#define Smooth_Size_3 20 ++#define Smooth_TH_3 4 ++#define Smooth_Step_Size 5 ++#define Adaptive_SIR 1 ++#define SCAN_INTERVAL 1500 //ms ++#define SYN_Length 5 // for 92D ++ ++#define LNA_Low_Gain_1 0x64 ++#define LNA_Low_Gain_2 0x5A ++#define LNA_Low_Gain_3 0x58 ++ ++#define pw_th_10dB 0x0 ++#define pw_th_16dB 0x3 ++ ++#define FA_RXHP_TH1 5000 ++#define FA_RXHP_TH2 1500 ++#define FA_RXHP_TH3 800 ++#define FA_RXHP_TH4 600 ++#define FA_RXHP_TH5 500 ++ ++#define Idle_Mode 0 ++#define High_TP_Mode 1 ++#define Low_TP_Mode 2 ++ ++ ++VOID ++odm_PSDMonitorInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PSD Monitor Setting ++ //Which path in ADC/DAC is turnned on for PSD: both I/Q ++ ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT10|BIT11, 0x3); ++ //Ageraged number: 8 ++ ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT12|BIT13, 0x1); ++ pDM_Odm->bPSDinProcess = FALSE; ++ pDM_Odm->bUserAssignLevel = FALSE; ++ pDM_Odm->bPSDactive = FALSE; ++ //pDM_Odm->bDMInitialGainEnable=TRUE; //change the initialization to DIGinit ++ //Set Debug Port ++ //PHY_SetBBReg(Adapter, 0x908, bMaskDWord, 0x803); ++ //PHY_SetBBReg(Adapter, 0xB34, bMaskByte0, 0x00); // pause PSD ++ //PHY_SetBBReg(Adapter, 0xB38, bMaskByte0, 10); //rescan ++ //PHY_SetBBReg(Adapter, 0xB38, bMaskByte2|bMaskByte3, 100); //interval ++ ++ //PlatformSetTimer( Adapter, &pHalData->PSDTriggerTimer, 0); //ms ++#endif ++} ++ ++VOID ++PatchDCTone( ++ IN PVOID pDM_VOID, ++ pu4Byte PSD_report, ++ u1Byte initial_gain_psd ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PADAPTER pAdapter; ++ ++ u4Byte psd_report; ++ ++ //2 Switch to CH11 to patch CH9 and CH13 DC tone ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 11); ++ ++ if(pDM_Odm->SupportICType== ODM_RTL8192D) ++ { ++ if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 11); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x77C1A); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x41289); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01840); ++ } ++ else ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x77C1A); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x41289); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01840); ++ } ++ } ++ ++ //Ch9 DC tone patch ++ psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); ++ PSD_report[50] = psd_report; ++ //Ch13 DC tone patch ++ psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); ++ PSD_report[70] = psd_report; ++ ++ //2 Switch to CH3 to patch CH1 and CH5 DC tone ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 3); ++ ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8192D) ++ { ++ if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 3); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x07C1A); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x61289); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01C41); ++ } ++ else ++ { ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x07C1A); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x61289); ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01C41); ++ } ++ } ++ ++ //Ch1 DC tone patch ++ psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); ++ PSD_report[10] = psd_report; ++ //Ch5 DC tone patch ++ psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); ++ PSD_report[30] = psd_report; ++ ++} ++ ++ ++VOID ++GoodChannelDecision( ++ IN PVOID pDM_VOID, ++ pu4Byte PSD_report, ++ pu1Byte PSD_bitmap, ++ u1Byte RSSI_BT, ++ pu1Byte PSD_bitmap_memory) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ //s4Byte TH1 = SSBT-0x15; // modify TH by Neil Chen ++ s4Byte TH1= RSSI_BT+0x14; ++ s4Byte TH2 = RSSI_BT+85; ++ //u2Byte TH3; ++// s4Byte RegB34; ++ u1Byte bitmap, Smooth_size[3], Smooth_TH[3]; ++ //u1Byte psd_bit; ++ u4Byte i,n,j, byte_idx, bit_idx, good_cnt, good_cnt_smoothing, Smooth_Interval[3]; ++ int start_byte_idx,start_bit_idx,cur_byte_idx, cur_bit_idx,NOW_byte_idx ; ++ ++// RegB34 = PHY_QueryBBReg(Adapter,0xB34, bMaskDWord)&0xFF; ++ ++ if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8192D)) ++ { ++ TH1 = RSSI_BT + 0x14; ++ } ++ ++ Smooth_size[0]=Smooth_Size_1; ++ Smooth_size[1]=Smooth_Size_2; ++ Smooth_size[2]=Smooth_Size_3; ++ Smooth_TH[0]=Smooth_TH_1; ++ Smooth_TH[1]=Smooth_TH_2; ++ Smooth_TH[2]=Smooth_TH_3; ++ Smooth_Interval[0]=16; ++ Smooth_Interval[1]=15; ++ Smooth_Interval[2]=13; ++ good_cnt = 0; ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ //2 Threshold ++ ++ if(RSSI_BT >=41) ++ TH1 = 113; ++ else if(RSSI_BT >=38) // >= -15dBm ++ TH1 = 105; //0x69 ++ else if((RSSI_BT >=33)&(RSSI_BT <38)) ++ TH1 = 99+(RSSI_BT-33); //0x63 ++ else if((RSSI_BT >=26)&(RSSI_BT<33)) ++ TH1 = 99-(33-RSSI_BT)+2; //0x5e ++ else if((RSSI_BT >=24)&(RSSI_BT<26)) ++ TH1 = 88-((RSSI_BT-24)*3); //0x58 ++ else if((RSSI_BT >=18)&(RSSI_BT<24)) ++ TH1 = 77+((RSSI_BT-18)*2); ++ else if((RSSI_BT >=14)&(RSSI_BT<18)) ++ TH1 = 63+((RSSI_BT-14)*2); ++ else if((RSSI_BT >=8)&(RSSI_BT<14)) ++ TH1 = 58+((RSSI_BT-8)*2); ++ else if((RSSI_BT >=3)&(RSSI_BT<8)) ++ TH1 = 52+(RSSI_BT-3); ++ else ++ TH1 = 51; ++ } ++ ++ for (i = 0; i< 10; i++) ++ PSD_bitmap[i] = 0; ++ ++ ++ // Add By Gary ++ for (i=0; i<80; i++) ++ pRX_HP_Table->PSD_bitmap_RXHP[i] = 0; ++ // End ++ ++ ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ TH1 =TH1-SIR_STEP_SIZE; ++ } ++ while (good_cnt < PSD_CHMIN) ++ { ++ good_cnt = 0; ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ if(TH1 ==TH2) ++ break; ++ if((TH1+SIR_STEP_SIZE) < TH2) ++ TH1 += SIR_STEP_SIZE; ++ else ++ TH1 = TH2; ++ } ++ else ++ { ++ if(TH1==(RSSI_BT+0x1E)) ++ break; ++ if((TH1+2) < (RSSI_BT+0x1E)) ++ TH1+=3; ++ else ++ TH1 = RSSI_BT+0x1E; ++ ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: decision threshold is: %d", TH1)); ++ ++ for (i = 0; i< 80; i++) ++ { ++ if((s4Byte)(PSD_report[i]) < TH1) ++ { ++ byte_idx = i / 8; ++ bit_idx = i -8*byte_idx; ++ bitmap = PSD_bitmap[byte_idx]; ++ PSD_bitmap[byte_idx] = bitmap | (u1Byte) (1 << bit_idx); ++ } ++ } ++ ++#if DBG ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: before smoothing\n")); ++ for(n=0;n<10;n++) ++ { ++ //DbgPrint("PSD_bitmap[%u]=%x\n", n, PSD_bitmap[n]); ++ for (i = 0; i<8; i++) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); ++ } ++#endif ++ ++ //1 Start of smoothing function ++ ++ for (j=0;j<3;j++) ++ { ++ start_byte_idx=0; ++ start_bit_idx=0; ++ for(n=0; n 7 ) ++ { ++ start_byte_idx= start_byte_idx+start_bit_idx/8; ++ start_bit_idx = start_bit_idx%8; ++ } ++ } ++ ++ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: after %u smoothing", j+1)); ++ for(n=0;n<10;n++) ++ { ++ for (i = 0; i<8; i++) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); ++ ++ if ( ((PSD_bitmap[n]&BIT(i))>>i) ==1) //----- Add By Gary ++ { ++ pRX_HP_Table->PSD_bitmap_RXHP[8*n+i] = 1; ++ } // ------end by Gary ++ } ++ } ++ ++ } ++ ++ ++ good_cnt = 0; ++ for ( i = 0; i < 10; i++) ++ { ++ for (n = 0; n < 8; n++) ++ if((PSD_bitmap[i]& BIT(n)) != 0) ++ good_cnt++; ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, ODM_COMP_PSD,("PSD: good channel cnt = %u",good_cnt)); ++ } ++ ++ //RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT=%d, TH2=%d, TH1=%d",SSBT,TH2,TH1)); ++ for (i = 0; i <10; i++) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: PSD_bitmap[%u]=%x",i,PSD_bitmap[i])); ++/* ++ //Update bitmap memory ++ for(i = 0; i < 80; i++) ++ { ++ byte_idx = i / 8; ++ bit_idx = i -8*byte_idx; ++ psd_bit = (PSD_bitmap[byte_idx] & BIT(bit_idx)) >> bit_idx; ++ bitmap = PSD_bitmap_memory[i]; ++ PSD_bitmap_memory[i] = (bitmap << 1) |psd_bit; ++ } ++*/ ++} ++ ++ ++ ++VOID ++odm_PSD_Monitor( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ unsigned int pts, start_point, stop_point; ++ u1Byte initial_gain ; ++ static u1Byte PSD_bitmap_memory[80], init_memory = 0; ++ static u1Byte psd_cnt=0; ++ static u4Byte PSD_report[80], PSD_report_tmp; ++ static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; ++ u1Byte H2C_PSD_DATA[5]={0,0,0,0,0}; ++ static u1Byte H2C_PSD_DATA_last[5] ={0,0,0,0,0}; ++ u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, ++ 0,3,6,10,13,16,19,22,26,29}; ++ u1Byte n, i, channel, BBReset,tone_idx; ++ u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; ++ s4Byte PSD_skip_start, PSD_skip_stop; ++ u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; ++ u4Byte ReScan, Interval, Is40MHz; ++ u8Byte curTxOkCnt, curRxOkCnt; ++ int cur_byte_idx, cur_bit_idx; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ ++ if(*pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("pbDriverIsGoingToPnpSetPowerSleep!!!!!!!!!!!!!!!\n")); ++ return; ++ } ++ ++ ++ if( (*(pDM_Odm->pbScanInProcess)) || ++ pDM_Odm->bLinkInProcess) ++ { ++ if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) ++ { ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 1500); //ms ++ //psd_cnt=0; ++ } ++ return; ++ } ++ ++ if(pDM_Odm->bBtHsOperation) ++ { ++ ReScan = 1; ++ Interval = SCAN_INTERVAL; ++ } ++ else ++ { ++ ReScan = PSD_RESCAN; ++ Interval = SCAN_INTERVAL; ++ } ++ ++ //1 Initialization ++ if(init_memory == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Init memory\n")); ++ for(i = 0; i < 80; i++) ++ PSD_bitmap_memory[i] = 0xFF; // channel is always good ++ init_memory = 1; ++ } ++ if(psd_cnt == 0) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); ++ for(i = 0; i < 80; i++) ++ PSD_report[i] = 0; ++ } ++ ++ //1 Backup Current Settings ++ CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); ++/* ++ if(pDM_Odm->SupportICType==ODM_RTL8192D) ++ { ++ //2 Record Current synthesizer parameters based on current channel ++ if((*pDM_Odm->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(*pDM_Odm->MacPhyMode92D == DUALMAC_SINGLEPHY)) ++ { ++ SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x25, bMaskDWord); ++ SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x26, bMaskDWord); ++ SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x27, bMaskDWord); ++ SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, bMaskDWord); ++ SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, bMaskDWord); ++ } ++ else // DualMAC_DualPHY 2G ++ { ++ SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x25, bMaskDWord); ++ SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x26, bMaskDWord); ++ SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x27, bMaskDWord); ++ SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, bMaskDWord); ++ SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, bMaskDWord); ++ } ++ } ++*/ ++ //RXIQI = PHY_QueryBBReg(Adapter, 0xC14, bMaskDWord); ++ RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); ++ ++ //RxIdleLowPwr = (PHY_QueryBBReg(Adapter, 0x818, bMaskDWord)&BIT28)>>28; ++ RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; ++ ++ //2??? ++ if(CHNL_RUN_ABOVE_40MHZ(pMgntInfo)) ++ Is40MHz = TRUE; ++ else ++ Is40MHz = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); ++ //1 Turn off CCK ++ //PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT24, 0); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); ++ //1 Turn off TX ++ //Pause TX Queue ++ //PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF); ++ ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0xFF); ++ ++ //Force RX to stop TX immediately ++ //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); ++ //1 Turn off RX ++ //Rx AGC off RegC70[0]=0, RegC7C[20]=0 ++ //PHY_SetBBReg(Adapter, 0xC70, BIT0, 0); ++ //PHY_SetBBReg(Adapter, 0xC7C, BIT20, 0); ++ ++ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); ++ ++ ++ //Turn off CCA ++ //PHY_SetBBReg(Adapter, 0xC14, bMaskDWord, 0x0); ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); ++ ++ //BB Reset ++ //BBReset = PlatformEFIORead1Byte(Adapter, 0x02); ++ BBReset = ODM_Read1Byte(pDM_Odm, 0x02); ++ ++ //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset&(~BIT0)); ++ //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset|BIT0); ++ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess ++ ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); ++ ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); ++ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); ++ ++ //1 Leave RX idle low power ++ //PHY_SetBBReg(Adapter, 0x818, BIT28, 0x0); ++ ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); ++ //1 Fix initial gain ++ //if (IS_HARDWARE_TYPE_8723AE(Adapter)) ++ //RSSI_BT = pHalData->RSSI_BT; ++ //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary ++ // RSSI_BT = RSSI_BT_new; ++ ++ if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) ++ RSSI_BT=pDM_Odm->RSSI_BT; //need to check C2H to pDM_Odm RSSI BT ++ ++ if(RSSI_BT>=47) ++ RSSI_BT=47; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ //Neil add--2011--10--12 ++ //2 Initial Gain index ++ if(RSSI_BT >=35) // >= -15dBm ++ initial_gain_psd = RSSI_BT*2; ++ else if((RSSI_BT >=33)&(RSSI_BT<35)) ++ initial_gain_psd = RSSI_BT*2+6; ++ else if((RSSI_BT >=24)&(RSSI_BT<33)) ++ initial_gain_psd = 70-(33-RSSI_BT); ++ else if((RSSI_BT >=19)&(RSSI_BT<24)) ++ initial_gain_psd = 64-((24-RSSI_BT)*4); ++ else if((RSSI_BT >=14)&(RSSI_BT<19)) ++ initial_gain_psd = 44-((18-RSSI_BT)*2); ++ else if((RSSI_BT >=8)&(RSSI_BT<14)) ++ initial_gain_psd = 35-(14-RSSI_BT); ++ else ++ initial_gain_psd = 0x1B; ++ } ++ else ++ { ++ ++ //need to do ++ initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI ++ //} ++ } ++ //if(RSSI_BT<0x17) ++ // RSSI_BT +=3; ++ //DbgPrint("PSD: RSSI_BT= %d\n", RSSI_BT); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); ++ ++ //initialGainUpper = 0x5E; //Modify by neil chen ++ ++ if(pDM_Odm->bUserAssignLevel) ++ { ++ pDM_Odm->bUserAssignLevel = FALSE; ++ initialGainUpper = 0x7f; ++ } ++ else ++ { ++ initialGainUpper = 0x5E; ++ } ++ ++ /* ++ if (initial_gain_psd < 0x1a) ++ initial_gain_psd = 0x1a; ++ if (initial_gain_psd > initialGainUpper) ++ initial_gain_psd = initialGainUpper; ++ */ ++ ++ //if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ SSBT = RSSI_BT * 2 +0x3E; ++ ++ ++ //if(IS_HARDWARE_TYPE_8723AE(Adapter)) ++ // SSBT = RSSI_BT * 2 +0x3E; ++ //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary ++ //{ ++ // RSSI_BT = initial_gain_psd; ++ // SSBT = RSSI_BT; ++ //} ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); ++ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); ++ //DbgPrint("PSD: SSBT= %d", SSBT); ++ //need to do ++ pDM_Odm->bDMInitialGainEnable = FALSE; ++ initial_gain =(u1Byte) (ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F); ++ ++ // make sure the initial gain is under the correct range. ++ //initial_gain_psd &= 0x7f; ++ ODM_Write_DIG(pDM_Odm, initial_gain_psd); ++ //1 Turn off 3-wire ++ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); ++ ++ //pts value = 128, 256, 512, 1024 ++ pts = 128; ++ ++ if(pts == 128) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); ++ start_point = 64; ++ stop_point = 192; ++ } ++ else if(pts == 256) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); ++ start_point = 128; ++ stop_point = 384; ++ } ++ else if(pts == 512) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); ++ start_point = 256; ++ stop_point = 768; ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); ++ start_point = 512; ++ stop_point = 1536; ++ } ++ ++ ++//3 Skip WLAN channels if WLAN busy ++ ++ curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; ++ curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; ++ lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); ++ lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); ++ ++ PSD_skip_start=80; ++ PSD_skip_stop = 0; ++ wlan_channel = CurrentChannel & 0x0f; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ if(pDM_Odm->bBtHsOperation) ++ { ++ if(pDM_Odm->bLinked) ++ { ++ if(Is40MHz) ++ { ++ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask ++ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; ++ } ++ else ++ { ++ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask ++ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; ++ } ++ } ++ else ++ { ++ // mask for 40MHz ++ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask ++ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; ++ } ++ if(PSD_skip_start < 0) ++ PSD_skip_start = 0; ++ if(PSD_skip_stop >80) ++ PSD_skip_stop = 80; ++ } ++ else ++ { ++ if((curRxOkCnt+curTxOkCnt) > 5) ++ { ++ if(Is40MHz) ++ { ++ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask ++ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; ++ } ++ else ++ { ++ PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask ++ PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; ++ } ++ ++ if(PSD_skip_start < 0) ++ PSD_skip_start = 0; ++ if(PSD_skip_stop >80) ++ PSD_skip_stop = 80; ++ } ++ } ++ } ++#if 0 ++ else ++ { ++ if((curRxOkCnt+curTxOkCnt) > 1000) ++ { ++ PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; ++ PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; ++ } ++ } ++#endif //Reove RXHP Issue ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); ++ ++ for (n=0;n<80;n++) ++ { ++ if((n%20)==0) ++ { ++ channel = (n/20)*4 + 1; ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); ++ } ++ tone_idx = n%20; ++ if ((n>=PSD_skip_start) && (n PSD_report[n]) ++ PSD_report[n] = PSD_report_tmp; ++ ++ } ++ } ++ ++ PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); ++ ++ //----end ++ //1 Turn on RX ++ //Rx AGC on ++ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); ++ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); ++ //CCK on ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); ++ //1 Turn on TX ++ //Resume TX Queue ++ ++ ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0x00); ++ //Turn on 3-wire ++ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); ++ //1 Restore Current Settings ++ //Resume DIG ++ pDM_Odm->bDMInitialGainEnable = TRUE; ++ ++ ODM_Write_DIG(pDM_Odm, initial_gain); ++ ++ // restore originl center frequency ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); ++ ++ //Turn on CCA ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); ++ //Restore RX idle low power ++ if(RxIdleLowPwr == TRUE) ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); ++ ++ psd_cnt++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); ++ if (psd_cnt < ReScan) ++ ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, Interval); ++ else ++ { ++ psd_cnt = 0; ++ for(i=0;i<80;i++) ++ //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); ++ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); ++ ++ ++ GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); ++ ++ if(pDM_Odm->SupportICType==ODM_RTL8723A) ++ { ++ cur_byte_idx=0; ++ cur_bit_idx=0; ++ ++ //2 Restore H2C PSD Data to Last Data ++ H2C_PSD_DATA_last[0] = H2C_PSD_DATA[0]; ++ H2C_PSD_DATA_last[1] = H2C_PSD_DATA[1]; ++ H2C_PSD_DATA_last[2] = H2C_PSD_DATA[2]; ++ H2C_PSD_DATA_last[3] = H2C_PSD_DATA[3]; ++ H2C_PSD_DATA_last[4] = H2C_PSD_DATA[4]; ++ ++ ++ //2 Translate 80bit channel map to 40bit channel ++ for ( i=0;i<5;i++) ++ { ++ for(n=0;n<8;n++) ++ { ++ cur_byte_idx = i*2 + n/4; ++ cur_bit_idx = (n%4)*2; ++ if ( ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx)) != 0) && ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx+1)) != 0)) ++ H2C_PSD_DATA[i] = H2C_PSD_DATA[i] | (u1Byte) (1 << n); ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("H2C_PSD_DATA[%d]=0x%x\n" ,i, H2C_PSD_DATA[i])); ++ } ++ ++ //3 To Compare the difference ++ for ( i=0;i<5;i++) ++ { ++ if(H2C_PSD_DATA[i] !=H2C_PSD_DATA_last[i]) ++ { ++ FillH2CCmd92C(Adapter, H2C_92C_PSD_RESULT, 5, H2C_PSD_DATA); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("Need to Update the AFH Map \n")); ++ break; ++ } ++ else ++ { ++ if(i==5) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Not need to Update\n")); ++ } ++ } ++ if(pDM_Odm->bBtHsOperation) ++ { ++ ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 10000); ++ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); ++ } ++ else ++ { ++ ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 1500); ++ ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); ++ } ++ } ++ } ++} ++/* ++//Neil for Get BT RSSI ++// Be Triggered by BT C2H CMD ++VOID ++ODM_PSDGetRSSI( ++ IN u1Byte RSSI_BT) ++{ ++ ++ ++} ++ ++*/ ++ ++VOID ++ODM_PSDMonitor( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ //if(IS_HARDWARE_TYPE_8723AE(Adapter)) ++ ++ if(pDM_Odm->SupportICType == ODM_RTL8723A) //may need to add other IC type ++ { ++ if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) ++ { ++ if(!pDM_Odm->bBtEnabled) //need to check upper layer connection ++ { ++ pDM_Odm->bPSDactive=FALSE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor, return for BT is disabled!!!\n")); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor\n")); ++ //{ ++ pDM_Odm->bPSDinProcess = TRUE; ++ pDM_Odm->bPSDactive=TRUE; ++ odm_PSD_Monitor(pDM_Odm); ++ pDM_Odm->bPSDinProcess = FALSE; ++ } ++ } ++ ++} ++VOID ++odm_PSDMonitorCallback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PlatformScheduleWorkItem(&pHalData->PSDMonitorWorkitem); ++} ++ ++VOID ++odm_PSDMonitorWorkItemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER Adapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_PSDMonitor(pDM_Odm); ++} ++ ++ ++ //cosa debug tool need to modify ++ ++VOID ++ODM_PSDDbgControl( ++ IN PADAPTER Adapter, ++ IN u4Byte mode, ++ IN u4Byte btRssi ++ ) ++{ ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, (" Monitor mode=%d, btRssi=%d\n", mode, btRssi)); ++ if(mode) ++ { ++ pDM_Odm->RSSI_BT = (u1Byte)btRssi; ++ pDM_Odm->bUserAssignLevel = TRUE; ++ ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 0); //ms ++ } ++ else ++ { ++ ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); ++ } ++#endif ++} ++ ++ ++//#if(DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ ++void odm_RXHPInit( ++ IN PVOID pDM_VOID) ++{ ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ u1Byte index; ++ ++ pRX_HP_Table->RXHP_enable = TRUE; ++ pRX_HP_Table->RXHP_flag = 0; ++ pRX_HP_Table->PSD_func_trigger = 0; ++ pRX_HP_Table->Pre_IGI = 0x20; ++ pRX_HP_Table->Cur_IGI = 0x20; ++ pRX_HP_Table->Cur_pw_th = pw_th_10dB; ++ pRX_HP_Table->Pre_pw_th = pw_th_10dB; ++ for(index=0; index<80; index++) ++ pRX_HP_Table->PSD_bitmap_RXHP[index] = 1; ++ ++#if(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ pRX_HP_Table->TP_Mode = Idle_Mode; ++#endif ++#endif ++} ++ ++VOID ++odm_PSD_RXHP( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ unsigned int pts, start_point, stop_point, initial_gain ; ++ static u1Byte PSD_bitmap_memory[80], init_memory = 0; ++ static u1Byte psd_cnt=0; ++ static u4Byte PSD_report[80], PSD_report_tmp; ++ static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; ++ u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, ++ 0,3,6,10,13,16,19,22,26,29}; ++ u1Byte n, i, channel, BBReset,tone_idx; ++ u1Byte PSD_bitmap[10]/*, SSBT=0*/,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; ++ s4Byte PSD_skip_start, PSD_skip_stop; ++ u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; ++ u4Byte ReScan, Interval, Is40MHz; ++ u8Byte curTxOkCnt, curRxOkCnt; ++ //--------------2G band synthesizer for 92D switch RF channel using----------------- ++ u1Byte group_idx=0; ++ u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; ++ u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel ++ u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} ++ {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 ++ {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 ++ //--------------------- Add by Gary for Debug setting ---------------------- ++ u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); ++ u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); ++ //--------------------------------------------------------------------- ++ ++ if(pMgntInfo->bScanInProgress) ++ { ++ return; ++ } ++ ++ ReScan = PSD_RESCAN; ++ Interval = SCAN_INTERVAL; ++ ++ ++ //1 Initialization ++ if(init_memory == 0) ++ { ++ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("Init memory\n")); ++ for(i = 0; i < 80; i++) ++ PSD_bitmap_memory[i] = 0xFF; // channel is always good ++ init_memory = 1; ++ } ++ if(psd_cnt == 0) ++ { ++ RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); ++ for(i = 0; i < 80; i++) ++ PSD_report[i] = 0; ++ } ++ ++ //1 Backup Current Settings ++ CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ //2 Record Current synthesizer parameters based on current channel ++ if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) ++ { ++ SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord); ++ SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord); ++ SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord); ++ SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord); ++ SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord); ++ } ++ else // DualMAC_DualPHY 2G ++ { ++ SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord); ++ SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord); ++ SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord); ++ SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord); ++ SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord); ++ } ++ } ++ RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); ++ RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; ++ Is40MHz = *(pDM_Odm->pBandWidth); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); ++ //1 Turn off CCK ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); ++ //1 Turn off TX ++ //Pause TX Queue ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); ++ //Force RX to stop TX immediately ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); ++ //1 Turn off RX ++ //Rx AGC off RegC70[0]=0, RegC7C[20]=0 ++ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); ++ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); ++ //Turn off CCA ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); ++ //BB Reset ++ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess ++ BBReset = ODM_Read1Byte(pDM_Odm, 0x02); ++ ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); ++ ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); ++ ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); ++ //1 Leave RX idle low power ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); ++ //1 Fix initial gain ++ RSSI_BT = RSSI_BT_new; ++ RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); ++ ++ if(rssi_ctrl == 1) // just for debug!! ++ initial_gain_psd = RSSI_BT_new; ++ else ++ initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI ++ ++ RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); ++ ++ initialGainUpper = 0x54; ++ ++ RSSI_BT = initial_gain_psd; ++ //SSBT = RSSI_BT; ++ ++ //RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); ++ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); ++ ++ pDM_Odm->bDMInitialGainEnable = FALSE; ++ initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; ++ //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); ++ ODM_Write_DIG(pDM_Odm, initial_gain_psd); ++ //1 Turn off 3-wire ++ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); ++ ++ //pts value = 128, 256, 512, 1024 ++ pts = 128; ++ ++ if(pts == 128) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); ++ start_point = 64; ++ stop_point = 192; ++ } ++ else if(pts == 256) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); ++ start_point = 128; ++ stop_point = 384; ++ } ++ else if(pts == 512) ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); ++ start_point = 256; ++ stop_point = 768; ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); ++ start_point = 512; ++ stop_point = 1536; ++ } ++ ++ ++//3 Skip WLAN channels if WLAN busy ++ curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; ++ curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; ++ lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); ++ lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); ++ ++ PSD_skip_start=80; ++ PSD_skip_stop = 0; ++ wlan_channel = CurrentChannel & 0x0f; ++ ++ RT_TRACE(ODM_COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); ++ ++ if((curRxOkCnt+curTxOkCnt) > 1000) ++ { ++ PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; ++ PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; ++ } ++ ++ RT_TRACE(ODM_COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); ++ ++ for (n=0;n<80;n++) ++ { ++ if((n%20)==0) ++ { ++ channel = (n/20)*4 + 1; ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ switch(channel) ++ { ++ case 1: ++ case 9: ++ group_idx = 0; ++ break; ++ case 5: ++ group_idx = 2; ++ break; ++ case 13: ++ group_idx = 1; ++ break; ++ } ++ if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) ++ { ++ for(i = 0; i < SYN_Length; i++) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, channel); ++ } ++ else // DualMAC_DualPHY 2G ++ { ++ for(i = 0; i < SYN_Length; i++) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); ++ } ++ } ++ else ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); ++ } ++ tone_idx = n%20; ++ if ((n>=PSD_skip_start) && (n PSD_report[n]) ++ PSD_report[n] = PSD_report_tmp; ++ ++ } ++ } ++ ++ PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); ++ ++ //----end ++ //1 Turn on RX ++ //Rx AGC on ++ ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); ++ ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); ++ //CCK on ++ ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); ++ //1 Turn on TX ++ //Resume TX Queue ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); ++ //Turn on 3-wire ++ ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); ++ //1 Restore Current Settings ++ //Resume DIG ++ pDM_Odm->bDMInitialGainEnable= TRUE; ++ //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); ++ ODM_Write_DIG(pDM_Odm,(u1Byte) initial_gain); ++ // restore originl center frequency ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); ++ } ++ else // DualMAC_DualPHY ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); ++ } ++ } ++ //Turn on CCA ++ ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); ++ //Restore RX idle low power ++ if(RxIdleLowPwr == TRUE) ++ ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); ++ ++ psd_cnt++; ++ //gPrint("psd cnt=%d\n", psd_cnt); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); ++ if (psd_cnt < ReScan) ++ { ++ ODM_SetTimer(pDM_Odm, &pRX_HP_Table->PSDTimer, Interval); //ms ++ } ++ else ++ { ++ psd_cnt = 0; ++ for(i=0;i<80;i++) ++ RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); ++ //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); ++ ++ GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); ++ ++ } ++} ++ ++void odm_Write_RXHP( ++ IN PVOID pDM_VOID) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ u4Byte currentIGI; ++ ++ if(pRX_HP_Table->Cur_IGI != pRX_HP_Table->Pre_IGI) ++ { ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); ++ } ++ ++ if(pRX_HP_Table->Cur_pw_th != pRX_HP_Table->Pre_pw_th) ++{ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, BIT8|BIT9, pRX_HP_Table->Cur_pw_th); // RegC54[9:8]=2'b11: AGC Flow 3 ++ } ++ ++ if(pRX_HP_Table->RXHP_flag == 0) ++ { ++ pRX_HP_Table->Cur_IGI = 0x20; ++ } ++ else ++ { ++ currentIGI = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); ++ if(currentIGI<0x50) ++ { ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); ++ } ++ } ++ pRX_HP_Table->Pre_IGI = pRX_HP_Table->Cur_IGI; ++ pRX_HP_Table->Pre_pw_th = pRX_HP_Table->Cur_pw_th; ++ ++} ++ ++ ++void odm_RXHP( ++ IN PVOID pDM_VOID) ++{ ++#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_FALSEALMCNT); ++ ++ u1Byte i, j, sum; ++ u1Byte Is40MHz; ++ s1Byte Intf_diff_idx, MIN_Intf_diff_idx = 16; ++ s4Byte cur_channel; ++ u1Byte ch_map_intf_5M[17] = {0}; ++ static u4Byte FA_TH = 0; ++ static u1Byte psd_intf_flag = 0; ++ static s4Byte curRssi = 0; ++ static s4Byte preRssi = 0; ++ static u1Byte PSDTriggerCnt = 1; ++ ++ u1Byte RX_HP_enable = (u1Byte)(ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, bMaskDWord)>>31); // for debug!! ++ ++#if(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ static s8Byte lastTxOkCnt = 0, lastRxOkCnt = 0; ++ s8Byte curTxOkCnt, curRxOkCnt; ++ s8Byte curTPOkCnt; ++ s8Byte TP_Acc3, TP_Acc5; ++ static s8Byte TP_Buff[5] = {0}; ++ static u1Byte pre_state = 0, pre_state_flag = 0; ++ static u1Byte Intf_HighTP_flag = 0, De_counter = 16; ++ static u1Byte TP_Degrade_flag = 0; ++#endif ++ static u1Byte LatchCnt = 0; ++ ++ if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8188E)) ++ return; ++ //AGC RX High Power Mode is only applied on 2G band in 92D!!! ++ if(pDM_Odm->SupportICType == ODM_RTL8192D) ++ { ++ if(*(pDM_Odm->pBandType) != ODM_BAND_2_4G) ++ return; ++ } ++ ++ if(!(pDM_Odm->SupportAbility & ODM_BB_RXHP)) ++ return; ++ ++ ++ //RX HP ON/OFF ++ if(RX_HP_enable == 1) ++ pRX_HP_Table->RXHP_enable = FALSE; ++ else ++ pRX_HP_Table->RXHP_enable = TRUE; ++ ++ if(pRX_HP_Table->RXHP_enable == FALSE) ++ { ++ if(pRX_HP_Table->RXHP_flag == 1) ++ { ++ pRX_HP_Table->RXHP_flag = 0; ++ psd_intf_flag = 0; ++ } ++ return; ++ } ++ ++#if(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ //2 Record current TP for USB interface ++ curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; ++ curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; ++ lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); ++ lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); ++ ++ curTPOkCnt = curTxOkCnt+curRxOkCnt; ++ TP_Buff[0] = curTPOkCnt; // current TP ++ TP_Acc3 = PlatformDivision64((TP_Buff[1]+TP_Buff[2]+TP_Buff[3]), 3); ++ TP_Acc5 = PlatformDivision64((TP_Buff[0]+TP_Buff[1]+TP_Buff[2]+TP_Buff[3]+TP_Buff[4]), 5); ++ ++ if(TP_Acc5 < 1000) ++ pRX_HP_Table->TP_Mode = Idle_Mode; ++ else if((1000 < TP_Acc5)&&(TP_Acc5 < 3750000)) ++ pRX_HP_Table->TP_Mode = Low_TP_Mode; ++ else ++ pRX_HP_Table->TP_Mode = High_TP_Mode; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP TP Mode = %d\n", pRX_HP_Table->TP_Mode)); ++ // Since TP result would be sampled every 2 sec, it needs to delay 4sec to wait PSD processing. ++ // When LatchCnt = 0, we would Get PSD result. ++ if(TP_Degrade_flag == 1) ++ { ++ LatchCnt--; ++ if(LatchCnt == 0) ++ { ++ TP_Degrade_flag = 0; ++ } ++ } ++ // When PSD function triggered by TP degrade 20%, and Interference Flag = 1 ++ // Set a De_counter to wait IGI = upper bound. If time is UP, the Interference flag will be pull down. ++ if(Intf_HighTP_flag == 1) ++ { ++ De_counter--; ++ if(De_counter == 0) ++ { ++ Intf_HighTP_flag = 0; ++ psd_intf_flag = 0; ++ } ++ } ++#endif ++ ++ //2 AGC RX High Power Mode by PSD only applied to STA Mode ++ //3 NOT applied 1. Ad Hoc Mode. ++ //3 NOT applied 2. AP Mode ++ if ((pMgntInfo->mAssoc) && (!pMgntInfo->mIbss) && (!ACTING_AS_AP(Adapter))) ++ { ++ Is40MHz = *(pDM_Odm->pBandWidth); ++ curRssi = pDM_Odm->RSSI_Min; ++ cur_channel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x0fff) & 0x0f; ++ ++ /* check illegal channel and bandwidth */ ++ if (Is40MHz && ((cur_channel < 3) || (cur_channel > 12))) { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("illegal channel setting, 40MHz channel = %d\n", cur_channel)); ++ return; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP RX HP flag = %d\n", pRX_HP_Table->RXHP_flag)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP FA = %d\n", FalseAlmCnt->Cnt_all)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP cur RSSI = %d, pre RSSI=%d\n", curRssi, preRssi)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP current CH = %d\n", cur_channel)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP Is 40MHz = %d\n", Is40MHz)); ++ //2 PSD function would be triggered ++ //3 1. Every 4 sec for PCIE ++ //3 2. Before TP Mode (Idle TP<4kbps) for USB ++ //3 3. After TP Mode (High TP) for USB ++ if((curRssi > 68) && (pRX_HP_Table->RXHP_flag == 0)) // Only RSSI>TH and RX_HP_flag=0 will Do PSD process ++ { ++#if (DEV_BUS_TYPE == RT_USB_INTERFACE) ++ //2 Before TP Mode ==> PSD would be trigger every 4 sec ++ if(pRX_HP_Table->TP_Mode == Idle_Mode) //2.1 less wlan traffic <4kbps ++ { ++#endif ++ if(PSDTriggerCnt == 1) ++ { ++ odm_PSD_RXHP(pDM_Odm); ++ pRX_HP_Table->PSD_func_trigger = 1; ++ PSDTriggerCnt = 0; ++ } ++ else ++ { ++ PSDTriggerCnt++; ++ } ++#if(DEV_BUS_TYPE == RT_USB_INTERFACE) ++ } ++ //2 After TP Mode ==> Check if TP degrade larger than 20% would trigger PSD function ++ if(pRX_HP_Table->TP_Mode == High_TP_Mode) ++ { ++ if((pre_state_flag == 0)&&(LatchCnt == 0)) ++ { ++ // TP var < 5% ++ if((((curTPOkCnt-TP_Acc3)*20)<(TP_Acc3))&&(((curTPOkCnt-TP_Acc3)*20)>(-TP_Acc3))) ++ { ++ pre_state++; ++ if(pre_state == 3) // hit pre_state condition => consecutive 3 times ++ { ++ pre_state_flag = 1; ++ pre_state = 0; ++ } ++ ++ } ++ else ++ { ++ pre_state = 0; ++ } ++ } ++ //3 If pre_state_flag=1 ==> start to monitor TP degrade 20% ++ if(pre_state_flag == 1) ++ { ++ if(((TP_Acc3-curTPOkCnt)*5)>(TP_Acc3)) // degrade 20% ++ { ++ odm_PSD_RXHP(pDM_Odm); ++ pRX_HP_Table->PSD_func_trigger = 1; ++ TP_Degrade_flag = 1; ++ LatchCnt = 2; ++ pre_state_flag = 0; ++ } ++ else if(((TP_Buff[2]-curTPOkCnt)*5)>TP_Buff[2]) ++ { ++ odm_PSD_RXHP(pDM_Odm); ++ pRX_HP_Table->PSD_func_trigger = 1; ++ TP_Degrade_flag = 1; ++ LatchCnt = 2; ++ pre_state_flag = 0; ++ } ++ else if(((TP_Buff[3]-curTPOkCnt)*5)>TP_Buff[3]) ++ { ++ odm_PSD_RXHP(pDM_Odm); ++ pRX_HP_Table->PSD_func_trigger = 1; ++ TP_Degrade_flag = 1; ++ LatchCnt = 2; ++ pre_state_flag = 0; ++ } ++ } ++ } ++#endif ++} ++ ++#if (DEV_BUS_TYPE == RT_USB_INTERFACE) ++ for (i=0;i<4;i++) ++ { ++ TP_Buff[4-i] = TP_Buff[3-i]; ++ } ++#endif ++ //2 Update PSD bitmap according to PSD report ++ if((pRX_HP_Table->PSD_func_trigger == 1)&&(LatchCnt == 0)) ++ { ++ //2 Separate 80M bandwidth into 16 group with smaller 5M BW. ++ for (i = 0 ; i < 16 ; i++) ++ { ++ sum = 0; ++ for(j = 0; j < 5 ; j++) ++ sum += pRX_HP_Table->PSD_bitmap_RXHP[5*i + j]; ++ ++ if(sum < 5) ++ { ++ ch_map_intf_5M[i] = 1; // interference flag ++ } ++ } ++ //=============just for debug========================= ++ //for(i=0;i<16;i++) ++ //DbgPrint("RX HP: ch_map_intf_5M[%d] = %d\n", i, ch_map_intf_5M[i]); ++ //=============================================== ++ //2 Mask target channel 5M index ++ for(i = 0; i < (4+4*Is40MHz) ; i++) ++ { ++ ch_map_intf_5M[cur_channel - (1+2*Is40MHz) + i] = 0; ++ } ++ ++ psd_intf_flag = 0; ++ for(i = 0; i < 16; i++) ++ { ++ if(ch_map_intf_5M[i] == 1) ++ { ++ psd_intf_flag = 1; // interference is detected!!! ++ break; ++ } ++ } ++ ++#if (DEV_BUS_TYPE == RT_USB_INTERFACE) ++ if(pRX_HP_Table->TP_Mode!=Idle_Mode) ++ { ++ if(psd_intf_flag == 1) // to avoid psd_intf_flag always 1 ++ { ++ Intf_HighTP_flag = 1; ++ De_counter = 32; // 0x1E -> 0x3E needs 32 times by each IGI step =1 ++ } ++ } ++#endif ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP psd_intf_flag = %d\n", psd_intf_flag)); ++ //2 Distance between target channel and interference ++ for(i = 0; i < 16; i++) ++ { ++ if(ch_map_intf_5M[i] == 1) ++ { ++ Intf_diff_idx = ((cur_channel+Is40MHz-(i+1))>0) ? (s1Byte)(cur_channel-2*Is40MHz-(i-2)) : (s1Byte)((i+1)-(cur_channel+2*Is40MHz)); ++ if(Intf_diff_idx < MIN_Intf_diff_idx) ++ MIN_Intf_diff_idx = Intf_diff_idx; // the min difference index between interference and target ++ } ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP MIN_Intf_diff_idx = %d\n", MIN_Intf_diff_idx)); ++ //2 Choose False Alarm Threshold ++ switch (MIN_Intf_diff_idx){ ++ case 0: ++ case 1: ++ case 2: ++ case 3: ++ FA_TH = FA_RXHP_TH1; ++ break; ++ case 4: // CH5 ++ case 5: // CH6 ++ FA_TH = FA_RXHP_TH2; ++ break; ++ case 6: // CH7 ++ case 7: // CH8 ++ FA_TH = FA_RXHP_TH3; ++ break; ++ case 8: // CH9 ++ case 9: //CH10 ++ FA_TH = FA_RXHP_TH4; ++ break; ++ case 10: ++ case 11: ++ case 12: ++ case 13: ++ case 14: ++ case 15: ++ FA_TH = FA_RXHP_TH5; ++ break; ++ } ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP FA_TH = %d\n", FA_TH)); ++ pRX_HP_Table->PSD_func_trigger = 0; ++ } ++ //1 Monitor RSSI variation to choose the suitable IGI or Exit AGC RX High Power Mode ++ if(pRX_HP_Table->RXHP_flag == 1) ++ { ++ if ((curRssi > 80)&&(preRssi < 80)) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; ++ } ++ else if ((curRssi < 80)&&(preRssi > 80)) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; ++ } ++ else if ((curRssi > 72)&&(preRssi < 72)) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; ++ } ++ else if ((curRssi < 72)&&( preRssi > 72)) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; ++ } ++ else if (curRssi < 68) //RSSI is NOT large enough!!==> Exit AGC RX High Power Mode ++ { ++ pRX_HP_Table->Cur_pw_th = pw_th_10dB; ++ pRX_HP_Table->RXHP_flag = 0; // Back to Normal DIG Mode ++ psd_intf_flag = 0; ++ } ++ } ++ else // pRX_HP_Table->RXHP_flag == 0 ++ { ++ //1 Decide whether to enter AGC RX High Power Mode ++ if ((curRssi > 70) && (psd_intf_flag == 1) && (FalseAlmCnt->Cnt_all > FA_TH) && ++ (pDM_DigTable->CurIGValue == pDM_DigTable->rx_gain_range_max)) ++ { ++ if (curRssi > 80) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; ++ } ++ else if (curRssi > 72) ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; ++ } ++ else ++ { ++ pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; ++ } ++ pRX_HP_Table->Cur_pw_th = pw_th_16dB; //RegC54[9:8]=2'b11: to enter AGC Flow 3 ++ pRX_HP_Table->First_time_enter = TRUE; ++ pRX_HP_Table->RXHP_flag = 1; // RXHP_flag=1: AGC RX High Power Mode, RXHP_flag=0: Normal DIG Mode ++ } ++ } ++ preRssi = curRssi; ++ odm_Write_RXHP(pDM_Odm); ++ } ++#endif //#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ++#endif //#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) ++} ++ ++ ++VOID ++odm_PSD_RXHPCallback( ++ PRT_TIMER pTimer ++) ++{ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; ++ ++#if DEV_BUS_TYPE==RT_PCI_INTERFACE ++ #if USE_WORKITEM ++ ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); ++ #else ++ odm_PSD_RXHP(pDM_Odm); ++ #endif ++#else ++ ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); ++#endif ++ ++ } ++ ++VOID ++odm_PSD_RXHPWorkitemCallback( ++ IN PVOID pContext ++ ) ++{ ++ PADAPTER pAdapter = (PADAPTER)pContext; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ odm_PSD_RXHP(pDM_Odm); ++} ++ ++#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rxhp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rxhp.h +new file mode 100644 +index 0000000..98b3aa6 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_rxhp.h +@@ -0,0 +1,105 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __PHYDMRXHP_H__ ++#define __PHYDMRXHP_H__ ++ ++#define RXHP_VERSION "1.0" ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ ++#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD ++#define MODE_40M 0 //0:20M, 1:40M ++#define PSD_TH2 3 ++#define PSD_CHMIN 20 // Minimum channel number for BT AFH ++#define SIR_STEP_SIZE 3 ++#define Smooth_Size_1 5 ++#define Smooth_TH_1 3 ++#define Smooth_Size_2 10 ++#define Smooth_TH_2 4 ++#define Smooth_Size_3 20 ++#define Smooth_TH_3 4 ++#define Smooth_Step_Size 5 ++#define Adaptive_SIR 1 ++#define PSD_RESCAN 4 ++#define PSD_SCAN_INTERVAL 700 //ms ++ ++typedef struct _RX_High_Power_ ++{ ++ u1Byte RXHP_flag; ++ u1Byte PSD_func_trigger; ++ u1Byte PSD_bitmap_RXHP[80]; ++ u1Byte Pre_IGI; ++ u1Byte Cur_IGI; ++ u1Byte Pre_pw_th; ++ u1Byte Cur_pw_th; ++ BOOLEAN First_time_enter; ++ BOOLEAN RXHP_enable; ++ u1Byte TP_Mode; ++ RT_TIMER PSDTimer; ++ #if USE_WORKITEM ++ RT_WORK_ITEM PSDTimeWorkitem; ++ #endif ++}RXHP_T, *pRXHP_T; ++ ++#define dm_PSDMonitorCallback odm_PSDMonitorCallback ++VOID odm_PSDMonitorCallback(PRT_TIMER pTimer); ++ ++VOID ++odm_PSDMonitorInit( ++ IN PVOID pDM_VOID ++ ); ++ ++void odm_RXHPInit( ++ IN PVOID pDM_VOID); ++ ++void odm_RXHP( ++ IN PVOID pDM_VOID); ++ ++VOID ++odm_PSD_RXHPCallback( ++ PRT_TIMER pTimer ++); ++ ++ VOID ++ODM_PSDDbgControl( ++ IN PADAPTER Adapter, ++ IN u4Byte mode, ++ IN u4Byte btRssi ++ ); ++ ++ VOID ++odm_PSD_RXHPCallback( ++ PRT_TIMER pTimer ++); ++ ++VOID ++odm_PSD_RXHPWorkitemCallback( ++ IN PVOID pContext ++ ); ++ ++VOID ++odm_PSDMonitorWorkItemCallback( ++ IN PVOID pContext ++ ); ++ ++ #endif ++ ++ #endif ++ +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_types.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_types.h +new file mode 100644 +index 0000000..b282ecf +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_types.h +@@ -0,0 +1,258 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __ODM_TYPES_H__ ++#define __ODM_TYPES_H__ ++ ++ ++/*Define Different SW team support*/ ++#define ODM_AP 0x01 /*BIT0*/ ++#define ODM_ADSL 0x02 ++#define ODM_CE 0x04 /*BIT2*/ ++#define ODM_WIN 0x08 /*BIT3*/ ++ ++/*Deifne HW endian support*/ ++#define ODM_ENDIAN_BIG 0 ++#define ODM_ENDIAN_LITTLE 1 ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->DM_OutSrc))) ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->odmpriv))) ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) ++#define RT_PCI_INTERFACE 1 ++#define RT_USB_INTERFACE 2 ++#define RT_SDIO_INTERFACE 3 ++#endif ++ ++typedef enum _HAL_STATUS{ ++ HAL_STATUS_SUCCESS, ++ HAL_STATUS_FAILURE, ++ /*RT_STATUS_PENDING, ++ RT_STATUS_RESOURCE, ++ RT_STATUS_INVALID_CONTEXT, ++ RT_STATUS_INVALID_PARAMETER, ++ RT_STATUS_NOT_SUPPORT, ++ RT_STATUS_OS_API_FAILED,*/ ++}HAL_STATUS,*PHAL_STATUS; ++ ++#if( DM_ODM_SUPPORT_TYPE == ODM_AP) ++#define MP_DRIVER 0 ++#endif ++#if(DM_ODM_SUPPORT_TYPE != ODM_WIN) ++ ++#define VISTA_USB_RX_REVISE 0 ++ ++// ++// Declare for ODM spin lock defintion temporarily fro compile pass. ++// ++typedef enum _RT_SPINLOCK_TYPE{ ++ RT_TX_SPINLOCK = 1, ++ RT_RX_SPINLOCK = 2, ++ RT_RM_SPINLOCK = 3, ++ RT_CAM_SPINLOCK = 4, ++ RT_SCAN_SPINLOCK = 5, ++ RT_LOG_SPINLOCK = 7, ++ RT_BW_SPINLOCK = 8, ++ RT_CHNLOP_SPINLOCK = 9, ++ RT_RF_OPERATE_SPINLOCK = 10, ++ RT_INITIAL_SPINLOCK = 11, ++ RT_RF_STATE_SPINLOCK = 12, // For RF state. Added by Bruce, 2007-10-30. ++#if VISTA_USB_RX_REVISE ++ RT_USBRX_CONTEXT_SPINLOCK = 13, ++ RT_USBRX_POSTPROC_SPINLOCK = 14, // protect data of Adapter->IndicateW/ IndicateR ++#endif ++ //Shall we define Ndis 6.2 SpinLock Here ? ++ RT_PORT_SPINLOCK=16, ++ RT_VNIC_SPINLOCK=17, ++ RT_HVL_SPINLOCK=18, ++ RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09. ++ ++ RT_BTData_SPINLOCK=25, ++ ++ RT_WAPI_OPTION_SPINLOCK=26, ++ RT_WAPI_RX_SPINLOCK=27, ++ ++ // add for 92D CCK control issue ++ RT_CCK_PAGEA_SPINLOCK = 28, ++ RT_BUFFER_SPINLOCK = 29, ++ RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30, ++ RT_GEN_TEMP_BUF_SPINLOCK = 31, ++ RT_AWB_SPINLOCK = 32, ++ RT_FW_PS_SPINLOCK = 33, ++ RT_HW_TIMER_SPIN_LOCK = 34, ++ RT_MPT_WI_SPINLOCK = 35, ++ RT_P2P_SPIN_LOCK = 36, // Protect P2P context ++ RT_DBG_SPIN_LOCK = 37, ++ RT_IQK_SPINLOCK = 38, ++ RT_PENDED_OID_SPINLOCK = 39, ++ RT_CHNLLIST_SPINLOCK = 40, ++ RT_INDIC_SPINLOCK = 41, //protect indication ++ RT_RFD_SPINLOCK = 42, ++ RT_SYNC_IO_CNT_SPINLOCK = 43, ++ RT_LAST_SPINLOCK, ++}RT_SPINLOCK_TYPE; ++ ++#endif ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ #define STA_INFO_T RT_WLAN_STA ++ #define PSTA_INFO_T PRT_WLAN_STA ++ #define __func__ __FUNCTION__ ++ #define PHYDM_TESTCHIP_SUPPORT TESTCHIP_SUPPORT ++ #define bMaskH3Bytes 0xffffff00 ++ #define SUCCESS 0 ++ #define FAIL (-1) ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) ++ ++ // To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07. ++ #define ADSL_AP_BUILD_WORKAROUND ++ #define AP_BUILD_WORKAROUND ++ ++ #ifdef AP_BUILD_WORKAROUND ++ #include "../typedef.h" ++ #else ++ typedef void VOID,*PVOID; ++ typedef unsigned char BOOLEAN,*PBOOLEAN; ++ typedef unsigned char u1Byte,*pu1Byte; ++ typedef unsigned short u2Byte,*pu2Byte; ++ typedef unsigned int u4Byte,*pu4Byte; ++ typedef unsigned long long u8Byte,*pu8Byte; ++#if 1 ++/* In ARM platform, system would use the type -- "char" as "unsigned char" ++ * And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/ ++ typedef signed char s1Byte,*ps1Byte; ++#else ++ typedef char s1Byte,*ps1Byte; ++#endif ++ typedef short s2Byte,*ps2Byte; ++ typedef long s4Byte,*ps4Byte; ++ typedef long long s8Byte,*ps8Byte; ++ #endif ++ ++ typedef struct rtl8192cd_priv *prtl8192cd_priv; ++ typedef struct stat_info STA_INFO_T,*PSTA_INFO_T; ++ typedef struct timer_list RT_TIMER, *PRT_TIMER; ++ typedef void * RT_TIMER_CALL_BACK; ++ ++#ifdef CONFIG_PCI_HCI ++ #define DEV_BUS_TYPE RT_PCI_INTERFACE ++#endif ++ ++ #define _TRUE 1 ++ #define _FALSE 0 ++ ++ #if (defined(TESTCHIP_SUPPORT)) ++ #define PHYDM_TESTCHIP_SUPPORT 1 ++ #else ++ #define PHYDM_TESTCHIP_SUPPORT 0 ++ #endif ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ #include ++#if 0 ++ typedef u8 u1Byte, *pu1Byte; ++ typedef u16 u2Byte,*pu2Byte; ++ typedef u32 u4Byte,*pu4Byte; ++ typedef u64 u8Byte,*pu8Byte; ++ typedef s8 s1Byte,*ps1Byte; ++ typedef s16 s2Byte,*ps2Byte; ++ typedef s32 s4Byte,*ps4Byte; ++ typedef s64 s8Byte,*ps8Byte; ++#else ++ #define u1Byte u8 ++ #define pu1Byte u8* ++ ++ #define u2Byte u16 ++ #define pu2Byte u16* ++ ++ #define u4Byte u32 ++ #define pu4Byte u32* ++ ++ #define u8Byte u64 ++ #define pu8Byte u64* ++ ++ #define s1Byte s8 ++ #define ps1Byte s8* ++ ++ #define s2Byte s16 ++ #define ps2Byte s16* ++ ++ #define s4Byte s32 ++ #define ps4Byte s32* ++ ++ #define s8Byte s64 ++ #define ps8Byte s64* ++ ++#endif ++ #ifdef CONFIG_USB_HCI ++ #define DEV_BUS_TYPE RT_USB_INTERFACE ++ #elif defined(CONFIG_PCI_HCI) ++ #define DEV_BUS_TYPE RT_PCI_INTERFACE ++ #elif defined(CONFIG_SDIO_HCI) ++ #define DEV_BUS_TYPE RT_SDIO_INTERFACE ++ #elif defined(CONFIG_GSPI_HCI) ++ #define DEV_BUS_TYPE RT_SDIO_INTERFACE ++ #endif ++ ++ ++ #if defined(CONFIG_LITTLE_ENDIAN) ++ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE ++ #elif defined (CONFIG_BIG_ENDIAN) ++ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG ++ #endif ++ ++ typedef struct timer_list RT_TIMER, *PRT_TIMER; ++ typedef void * RT_TIMER_CALL_BACK; ++ #define STA_INFO_T struct sta_info ++ #define PSTA_INFO_T struct sta_info * ++ ++ ++ ++ #define TRUE _TRUE ++ #define FALSE _FALSE ++ ++ ++ #define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value) ++ #define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value) ++ #define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value) ++ ++ //define useless flag to avoid compile warning ++ #define USE_WORKITEM 0 ++ #define FOR_BRAZIL_PRETEST 0 ++ #define FPGA_TWO_MAC_VERIFICATION 0 ++ #define RTL8881A_SUPPORT 0 ++ ++ #if (defined(TESTCHIP_SUPPORT)) ++ #define PHYDM_TESTCHIP_SUPPORT 1 ++ #else ++ #define PHYDM_TESTCHIP_SUPPORT 0 ++ #endif ++#endif ++ ++#define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) ++#define COND_ELSE 2 ++#define COND_ENDIF 3 ++ ++#endif // __ODM_TYPES_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtchnlplan.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtchnlplan.c +new file mode 100644 +index 0000000..d2a762d +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtchnlplan.c +@@ -0,0 +1,480 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++/****************************************************************************** ++ ++ History: ++ Data Who Remark (Internal History) ++ ++ 05/14/2012 MH Collect RTK inernal infromation and generate channel plan draft. ++ ++******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++#include "mp_precomp.h" ++#include "rtchnlplan.h" ++ ++ ++ ++// ++// Channel Plan Domain Code ++// ++ ++/* ++ Channel Plan Contents ++ Domain Code EEPROM Countries in Specific Domain ++ 2G RD 5G RD Bit[6:0] 2G 5G ++ Case Old Define 00h~1Fh Old Define Old Define ++ 1 2G_WORLD 5G_NULL 20h Worldwird 13 NA ++ 2 2G_ETSI1 5G_NULL 21h Europe 2G NA ++ 3 2G_FCC1 5G_NULL 22h US 2G NA ++ 4 2G_MKK1 5G_NULL 23h Japan 2G NA ++ 5 2G_ETSI2 5G_NULL 24h France 2G NA ++ 6 2G_FCC1 5G_FCC1 25h US 2G US 5G ¤K¤j°ê»{ÃÒ ++ 7 2G_WORLD 5G_ETSI1 26h Worldwird 13 Europe ¤K¤j°ê»{ÃÒ ++ 8 2G_MKK1 5G_MKK1 27h Japan 2G Japan 5G ¤K¤j°ê»{ÃÒ ++ 9 2G_WORLD 5G_KCC1 28h Worldwird 13 Korea ¤K¤j°ê»{ÃÒ ++ 10 2G_WORLD 5G_FCC2 29h Worldwird 13 US o/w DFS Channels ++ 11 2G_WORLD 5G_FCC3 30h Worldwird 13 India, Mexico ++ 12 2G_WORLD 5G_FCC4 31h Worldwird 13 Venezuela ++ 13 2G_WORLD 5G_FCC5 32h Worldwird 13 China ++ 14 2G_WORLD 5G_FCC6 33h Worldwird 13 Israel ++ 15 2G_FCC1 5G_FCC7 34h US 2G US/Canada ¤K¤j°ê»{ÃÒ ++ 16 2G_WORLD 5G_ETSI2 35h Worldwird 13 Australia, New Zealand ¤K¤j°ê»{ÃÒ ++ 17 2G_WORLD 5G_ETSI3 36h Worldwird 13 Russia ++ 18 2G_MKK1 5G_MKK2 37h Japan 2G Japan (W52, W53) ++ 19 2G_MKK1 5G_MKK3 38h Japan 2G Japan (W56) ++ 20 2G_FCC1 5G_NCC1 39h US 2G Taiwan ¤K¤j°ê»{ÃÒ ++ ++ NA 2G_WORLD 5G_FCC1 7F FCC FCC DFS Channels Realtek Define ++ ++ ++ ++ ++ ++ 2.4G Regulatory Domains ++ Case 2G RD Regulation Channels Frequencyes Note Countries in Specific Domain ++ 1 2G_WORLD ETSI 1~13 2412~2472 Passive scan CH 12, 13 Worldwird 13 ++ 2 2G_ETSI1 ETSI 1~13 2412~2472 Europe ++ 3 2G_FCC1 FCC 1~11 2412~2462 US ++ 4 2G_MKK1 MKK 1~13, 14 2412~2472, 2484 Japan ++ 5 2G_ETSI2 ETSI 10~13 2457~2472 France ++ ++ ++ ++ ++ 5G Regulatory Domains ++ Case 5G RD Regulation Channels Frequencyes Note Countries in Specific Domain ++ 1 5G_NULL NA NA NA Do not support 5GHz ++ 2 5G_ETSI1 ETSI "36~48, 52~64, ++ 100~140" "5180~5240, 5260~5230 ++ 5500~5700" Band1, Ban2, Band3 Europe ++ 3 5G_ETSI2 ETSI "36~48, 52~64, ++ 100~140, 149~165" "5180~5240, 5260~5230 ++ 5500~5700, 5745~5825" Band1, Ban2, Band3, Band4 Australia, New Zealand ++ 4 5G_ETSI3 ETSI "36~48, 52~64, ++ 100~132, 149~165" ++ "5180~5240, 5260~5230 ++ 5500~5660, 5745~5825" Band1, Ban2, Band3(except CH 136, 140), Band4" Russia ++ 5 5G_FCC1 FCC "36~48, 52~64, ++ 100~140, 149~165" ++ "5180~5240, 5260~5230 ++ 5500~5700, 5745~5825" Band1(5150~5250MHz), ++ Band2(5250~5350MHz), ++ Band3(5470~5725MHz), ++ Band4(5725~5850MHz)" US ++ 6 5G_FCC2 FCC 36~48, 149~165 5180~5240, 5745~5825 Band1, Band4 FCC o/w DFS Channels ++ 7 5G_FCC3 FCC "36~48, 52~64, ++ 149~165" "5180~5240, 5260~5230 ++ 5745~5825" Band1, Ban2, Band4 India, Mexico ++ 8 5G_FCC4 FCC "36~48, 52~64, ++ 149~161" "5180~5240, 5260~5230 ++ 5745~5805" Band1, Ban2, ++ Band4(except CH 165)" Venezuela ++ 9 5G_FCC5 FCC 149~165 5745~5825 Band4 China ++ 10 5G_FCC6 FCC 36~48, 52~64 5180~5240, 5260~5230 Band1, Band2 Israel ++ 11 5G_FCC7 ++ 5G_IC1 FCC ++ IC" "36~48, 52~64, ++ 100~116, 136, 140, ++ 149~165" "5180~5240, 5260~5230 ++ 5500~5580, 5680, 5700, ++ 5745~5825" "Band1, Band2, ++ Band3(except 5600~5650MHz), ++ Band4" "US ++ Canada" ++ 12 5G_KCC1 KCC "36~48, 52~64, ++ 100~124, 149~165" "5180~5240, 5260~5230 ++ 5500~5620, 5745~5825" "Band1, Ban2, ++ Band3(5470~5650MHz), ++ Band4" Korea ++ 13 5G_MKK1 MKK "36~48, 52~64, ++ 100~140" "5180~5240, 5260~5230 ++ 5500~5700" W52, W53, W56 Japan ++ 14 5G_MKK2 MKK 36~48, 52~64 5180~5240, 5260~5230 W52, W53 Japan (W52, W53) ++ 15 5G_MKK3 MKK 100~140 5500~5700 W56 Japan (W56) ++ 16 5G_NCC1 NCC "56~64, ++ 100~116, 136, 140, ++ 149~165" "5260~5320 ++ 5500~5580, 5680, 5700, ++ 5745~5825" "Band2(except CH 52), ++ Band3(except 5600~5650MHz), ++ Band4" Taiwan ++ ++ ++*/ ++ ++// ++// 2.4G CHannel ++// ++/* ++ ++ 2.4G Band Regulatory Domains RTL8192D ++ Channel Number Channel Frequency US Canada Europe Spain France Japan Japan 20M 40M ++ (MHz) (FCC) (IC) (ETSI) (MPHPT) ++ 1 2412 v v v v v ++ 2 2417 v v v v v ++ 3 2422 v v v v v v ++ 4 2427 v v v v v v ++ 5 2432 v v v v v v ++ 6 2437 v v v v v v ++ 7 2442 v v v v v v ++ 8 2447 v v v v v v ++ 9 2452 v v v v v v ++ 10 2457 v v v v v v v v ++ 11 2462 v v v v v v v v ++ 12 2467 v v v v v ++ 13 2472 v v v v ++ 14 2484 v v ++ ++ ++*/ ++ ++ ++// ++// 5G Operating Channel ++// ++/* ++ ++ 5G Band RTL8192D RTL8195 (Jaguar) Jaguar 2 Regulatory Domains ++ Channel Number Channel Frequency Global Global Global "US ++(FCC 15.407)" "Canada ++(FCC, except 5.6~5.65GHz)" Argentina, Australia, New Zealand, Brazil, S. Africa (FCC/ETSI) "Europe ++(CE 301 893)" China India, Mexico, Singapore Israel, Turkey "Japan ++(MIC Item 19-3, 19-3-2)" Korea Russia, Ukraine "Taiwan ++(NCC)" Venezuela ++ (MHz) (20MHz) (20MHz) (40MHz) (80MHz) (160MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) (20MHz) ++"Band 1 ++5.15GHz ++~ ++5.25GHz" 36 5180 v v v v v Indoor Indoor v Indoor v Indoor Indoor v v v ++ 40 5200 v v v Indoor Indoor v Indoor v Indoor Indoor v v v ++ 44 5220 v v v v Indoor Indoor v Indoor v Indoor Indoor v v v ++ 48 5240 v v v Indoor Indoor v Indoor v Indoor Indoor v v v ++"Band 2 ++5.25GHz ++~ ++5.35GHz ++(DFS)" 52 5260 v v v v v v v v Indoor v Indoor Indoor v v v ++ 56 5280 v v v v v v Indoor v Indoor Indoor v v Indoor v ++ 60 5300 v v v v v v v Indoor v Indoor Indoor v v Indoor v ++ 64 5320 v v v v v v Indoor v Indoor Indoor v v Indoor v ++ ++"Band 3 ++5.47GHz ++~ ++5.725GHz ++(DFS)" 100 5500 v v v v v v v v v v v v v ++ 104 5520 v v v v v v v v v v v ++ 108 5540 v v v v v v v v v v v v ++ 112 5560 v v v v v v v v v v v ++ 116 5580 v v v v v v v v v v v v v ++ 120 5600 v v v Indoor v Indoor v v v ++ 124 5620 v v v v Indoor v Indoor v v v ++ 128 5640 v v v Indoor v Indoor v v ++ 132 5660 v v v E v Indoor v Indoor v v ++ 136 5680 v v v v v v v v v ++ 140 5700 v v E v v v v v v v ++ 144 5720 E E E ++"Band 4 ++5.725GHz ++~ ++5.85GHz ++(~5.9GHz)" 149 5745 v v v v v v v v v v v v v v ++ 153 5765 v v v v v v v v v v v v ++ 157 5785 v v v v v v v v v v v v v ++ 161 5805 v v v v v v v v v v v v ++ 165 5825 v v P P v v v v v v v v v ++ 169 5845 P P P ++ 173 5865 P P P P ++ 177 5885 P P P ++Channel Count 28 28 14 7 0 28 24 20 24 19 5 13 8 19 20 22 15 12 ++ E: FCC accepted the ask for CH144 from Accord. PS: 160MHz ¥Î 80MHz+80MHz¹ê²{¡H Argentina Belgium (¤ñ§Q®É) India Israel Russia ++ P: Customer's requirement from James. Australia The Netherlands (²üÄõ) Mexico Turkey Ukraine ++ New Zealand UK (­^°ê) Singapore ++ Brazil Switzerland (·ç¤h) ++ ++ ++*/ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++// define Maximum Power v.s each band for each region ++// ISRAEL ++// Format: ++// RT_CHANNEL_DOMAIN_Region ={{{Chnl_Start, Chnl_end, Pwr_dB_Max}, {Chn2_Start, Chn2_end, Pwr_dB_Max}, {Chn3_Start, Chn3_end, Pwr_dB_Max}, {Chn4_Start, Chn4_end, Pwr_dB_Max}, {Chn5_Start, Chn5_end, Pwr_dB_Max}}, Limit_Num} */ ++// RT_CHANNEL_DOMAIN_FCC ={{{01,11,30}, {36,48,17}, {52,64,24}, {100,140,24}, {149,165,30}}, 5} ++// "NR" is non-release channle. ++// Issue--- Israel--Russia--New Zealand ++// DOMAIN_01= (2G_WORLD, 5G_NULL) ++// DOMAIN_02= (2G_ETSI1, 5G_NULL) ++// DOMAIN_03= (2G_FCC1, 5G_NULL) ++// DOMAIN_04= (2G_MKK1, 5G_NULL) ++// DOMAIN_05= (2G_ETSI2, 5G_NULL) ++// DOMAIN_06= (2G_FCC1, 5G_FCC1) ++// DOMAIN_07= (2G_WORLD, 5G_ETSI1) ++// DOMAIN_08= (2G_MKK1, 5G_MKK1) ++// DOMAIN_09= (2G_WORLD, 5G_KCC1) ++// DOMAIN_10= (2G_WORLD, 5G_FCC2) ++// DOMAIN_11= (2G_WORLD, 5G_FCC3)----india ++// DOMAIN_12= (2G_WORLD, 5G_FCC4)----Venezuela ++// DOMAIN_13= (2G_WORLD, 5G_FCC5)----China ++// DOMAIN_14= (2G_WORLD, 5G_FCC6)----Israel ++// DOMAIN_15= (2G_FCC1, 5G_FCC7)-----Canada ++// DOMAIN_16= (2G_WORLD, 5G_ETSI2)---Australia ++// DOMAIN_17= (2G_WORLD, 5G_ETSI3)---Russia ++// DOMAIN_18= (2G_MKK1, 5G_MKK2)-----Japan ++// DOMAIN_19= (2G_MKK1, 5G_MKK3)-----Japan ++// DOMAIN_20= (2G_FCC1, 5G_NCC1)-----Taiwan ++// DOMAIN_21= (2G_FCC1, 5G_NCC1)-----Taiwan ++ ++ ++static RT_CHANNEL_PLAN_MAXPWR ChnlPlanPwrMax_2G[] = { ++ ++ // 2G_WORLD, ++ {{1, 13, 20}, 1}, ++ ++ // 2G_ETSI1 ++ {{1, 13, 20}, 1}, ++ ++ /* RT_CHANNEL_DOMAIN_ETSI */ ++ {{{1, 11, 17}, {40, 56, 17}, {60, 128, 17}, {0, 0, 0}, {149, 165, 17}}, 4}, ++ ++ // RT_CHANNEL_DOMAIN_MKK ++ {{{1, 11, 17}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}}, 1}, ++ ++ // Add new channel plan mex power table. ++ // ...... ++ }; ++ ++ ++/* ++//===========================================1:(2G_WORLD, 5G_NULL) ++ ++RT_CHANNEL_PLAN_MAXPWR RT_DOMAIN_01 ={{{01,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} ++ ++//===========================================2:(2G_ETSI1, 5G_NULL) ++ ++RT_DOMAIN_02 ={{{01,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} ++ ++//===========================================3:(2G_FCC1, 5G_NULL) ++ ++RT_DOMAIN_03 ={{{01,11,30}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} ++ ++//===========================================4:(2G_MKK1, 5G_NULL) ++ ++RT_DOMAIN_04 ={{{01,14,23}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} ++ ++//===========================================5:(2G_ETSI2, 5G_NULL) ++ ++RT_DOMAIN_05 ={{{10,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}}, 1} ++ ++//===========================================6:(2G_FCC1, 5G_FCC1) ++ ++RT_DOMAIN_06 ={{{01,13,30}, {36,48,17}, {52,64,24}, {100,140,24}, {149,165,30}}, 5} ++ ++//===========================================7:(2G_WORLD, 5G_ETSI1) ++ ++RT_DOMAIN_07 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,140,30}, {NR,NR,0}}, 4} ++ ++//===========================================8:(2G_MKK1, 5G_MKK1) ++ ++RT_DOMAIN_08 ={{{01,14,23}, {36,48,23}, {52,64,23}, {100,140,23}, {NR,NR,0}}, 4} ++ ++//===========================================9:(2G_WORLD, 5G_KCC1) ++ ++RT_DOMAIN_09 ={{{01,13,20}, {36,48,17}, {52,64,23}, {100,124,23}, {149,165,23}}, 5} ++ ++//===========================================10:(2G_WORLD, 5G_FCC2) ++ ++RT_DOMAIN_10 ={{{01,13,20}, {36,48,17}, {NR,NR,0}, {NR,NR,0}, {149,165,30}}, 3} ++ ++//===========================================11:(2G_WORLD, 5G_FCC3) ++RT_DOMAIN_11 ={{{01,13,20}, {36,48,23}, {52,64,23}, {NR,NR,0}, {149,165,23}}, 4} ++ ++//===========================================12:(2G_WORLD, 5G_FCC4) ++RT_DOMAIN_12 ={{{01,13,20}, {36,48,24}, {52,64,24}, {NR,NR,0}, {149,161,27}}, 4} ++ ++//===========================================13:(2G_WORLD, 5G_FCC5) ++RT_DOMAIN_13 ={{{01,13,20}, {NR,NR,0}, {NR,NR,0}, {NR,NR,0}, {149,165,27}}, 2} ++ ++//===========================================14:(2G_WORLD, 5G_FCC6) ++RT_DOMAIN_14 ={{{01,13,20}, {36,48,17}, {52,64,17}, {NR,NR,0}, {NR,NR,0}}, 3} ++ ++//===========================================15:(2G_FCC1, 5G_FCC7) ++RT_DOMAIN_15 ={{{01,11,30}, {36,48,23}, {52,64,24}, {100,140,24}, {149,165,30}}, 5} ++ ++//===========================================16:(2G_WORLD, 5G_ETSI2) ++RT_DOMAIN_16 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,140,30}, {149,165,30}}, 5} ++ ++//===========================================17:(2G_WORLD, 5G_ETSI3) ++RT_DOMAIN_17 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,132,30}, {149,165,20}}, 5} ++ ++//===========================================18:(2G_MKK1, 5G_MKK2) ++RT_DOMAIN_18 ={{{01,14,23}, {36,48,23}, {52,64,23}, {NR,NR,0}, {NR,NR,0}}, 3} ++ ++//===========================================19:(2G_MKK1, 5G_MKK3) ++RT_DOMAIN_19 ={{{01,14,23}, {NR,NR,0}, {NR,NR,0}, {100,140,23}, {NR,NR,0}}, 2} ++ ++//===========================================20:(2G_FCC1, 5G_NCC1) ++RT_DOMAIN_20 ={{{01,11,30}, {NR,NR,0}, {56,64,23}, {100,140,24}, {149,165,30}}, 4} ++ ++//===========================================21:(2G_FCC1, 5G_NCC2) ++RT_DOMAIN_21 ={{{01,11,30}, {NR,NR,0}, {56,64,23}, {NR,NR,0}, {149,165,30}}, 3} ++ ++//===========================================22:(2G_WORLD, 5G_FCC3) ++RT_DOMAIN_22 ={{{01,13,24}, {36,48,20}, {52,64,24}, {NR,NR,0}, {149,165,30}}, 4} ++ ++//===========================================23:(2G_WORLD, 5G_ETSI2) ++RT_DOMAIN_23 ={{{01,13,20}, {36,48,23}, {52,64,23}, {100,140,30}, {149,165,30}}, 5} ++ ++*/ ++ ++// ++// Counter & Realtek Channel plan transfer table. ++// ++RT_CHNL_CTRY_TBL RtCtryChnlTbl[] = ++{ ++ ++ { ++ RT_CTRY_AL, // "Albaniaªüº¸¤Ú¥§¨È" ++ "AL", ++ RT_2G_WORLD, ++ RT_5G_WORLD, ++ RT_CHANNEL_DOMAIN_UNDEFINED // 2G/5G world. ++ }, ++#if 0 ++ { ++ RT_CTRY_BB, // "Barbados¤Ú¤Ú¦h´µ" ++ "BB", ++ RT_2G_WORLD, ++ RT_5G_NULL, ++ RT_CHANNEL_DOMAIN_EFUSE_0x20 // 2G world. 5G_NULL ++ }, ++ ++ { ++ RT_CTRY_DE, // "Germany¼w°ê" ++ "DE", ++ RT_2G_WORLD, ++ RT_5G_ETSI1, ++ RT_CHANNEL_DOMAIN_EFUSE_0x26 ++ }, ++ ++ { ++ RT_CTRY_US, // "Germany¼w°ê" ++ "US", ++ RT_2G_FCC1, ++ RT_5G_FCC7, ++ RT_CHANNEL_DOMAIN_EFUSE_0x34 ++ }, ++ ++ { ++ RT_CTRY_JP, // "Germany¼w°ê" ++ "JP", ++ RT_2G_MKK1, ++ RT_5G_MKK1, ++ RT_CHANNEL_DOMAIN_EFUSE_0x34 ++ }, ++ ++ { ++ RT_CTRY_TW, // "Germany¼w°ê" ++ "TW", ++ RT_2G_FCC1, ++ RT_5G_NCC1, ++ RT_CHANNEL_DOMAIN_EFUSE_0x39 ++ }, ++#endif ++ ++}; // RtCtryChnlTbl ++ ++// ++// Realtek Defined Channel plan. ++// ++#if 0 ++ ++static RT_CHANNEL_PLAN_NEW RtChnlPlan[] = ++{ ++ // Channel Plan 0x20. ++ { ++ &RtCtryChnlTbl[1], // RT_CHNL_CTRY_TBL Country & channel plan transfer table. ++ RT_CHANNEL_DOMAIN_EFUSE_0x20, // RT_CHANNEL_DOMAIN RT Channel Plan Define ++ RT_2G_WORLD, // RT_REGULATION_2G ++ RT_5G_NULL, // RT_REGULATION_5G ++ RT_WORLD, // RT_REGULATION_CMN RT Regulatory domain definition. ++ RT_SREQ_NA, // RT Channel plan special & customerize requirement. ++ ++ CHNL_RT_2G_WORLD, ++ CHNL_RT_2G_WORLD_SCAN_TYPE, ++ &ChnlPlanPwrMax_2G[0], ++ ++ CHNL_RT_5G_NULL, ++ CHNL_RT_5G_NULL_SCAN_TYPE, ++ ++ ++ }, ++ ++ // Channel Plan 0x26. ++ { ++ &RtCtryChnlTbl[1], // RT_CHNL_CTRY_TBL Country & channel plan transfer table. ++ RT_CHANNEL_DOMAIN_EFUSE_0x26, // RT_CHANNEL_DOMAIN RT Channel Plan Define ++ RT_2G_WORLD, // RT_REGULATION_2G ++ RT_5G_ETSI1, // RT_REGULATION_5G ++ RT_WORLD, // RT_REGULATION_CMN RT Regulatory domain definition. ++ RT_SREQ_NA, // RT Channel plan special & customerize requirement. ++ ++ CHNL_RT_2G_WORLD, // 2G workd cannel ++ CHNL_RT_2G_WORLD_SCAN_TYPE, ++ &ChnlPlanPwrMax_2G[1], ++ ++ CHNL_RT_5G_ETSI1, ++ CHNL_RT_5G_ETSI1_SCAN_TYPE, ++ ++ } ++ ++ ++}; ++#endif ++ ++ ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtchnlplan.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtchnlplan.h +new file mode 100644 +index 0000000..78a31dc +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtchnlplan.h +@@ -0,0 +1,699 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __RT_CHANNELPLAN_H__ ++#define __RT_CHANNELPLAN_H__ ++ ++typedef enum _RT_CHANNEL_DOMAIN_NEW ++{ ++ ++ //===== Add new channel plan above this line ===============// ++ ++ // For new architecture we define different 2G/5G CH area for all country. ++ // 2.4 G only ++ RT_CHANNEL_DOMAIN_2G_WORLD_5G_NULL = 0x20, ++ RT_CHANNEL_DOMAIN_2G_ETSI1_5G_NULL = 0x21, ++ RT_CHANNEL_DOMAIN_2G_FCC1_5G_NULL = 0x22, ++ RT_CHANNEL_DOMAIN_2G_MKK1_5G_NULL = 0x23, ++ RT_CHANNEL_DOMAIN_2G_ETSI2_5G_NULL = 0x24, ++ // 2.4 G + 5G type 1 ++ RT_CHANNEL_DOMAIN_2G_FCC1_5G_FCC1 = 0x25, ++ RT_CHANNEL_DOMAIN_2G_WORLD_5G_ETSI1 = 0x26, ++ //RT_CHANNEL_DOMAIN_2G_WORLD_5G_ETSI1 = 0x27, ++ // ..... ++ ++ RT_CHANNEL_DOMAIN_MAX_NEW, ++ ++}RT_CHANNEL_DOMAIN_NEW, *PRT_CHANNEL_DOMAIN_NEW; ++ ++ ++#if 0 ++#define DOMAIN_CODE_2G_WORLD \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 ++#define DOMAIN_CODE_2G_ETSI1 \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 ++#define DOMAIN_CODE_2G_ETSI2 \ ++ {1,2,3,4,5,6,7,8,9,10,11}, 11 ++#define DOMAIN_CODE_2G_FCC1 \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13,14}, 14 ++#define DOMAIN_CODE_2G_MKK1 \ ++ {10,11,12,13}, 4 ++ ++#define DOMAIN_CODE_5G_ETSI1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 ++#define DOMAIN_CODE_5G_ETSI2 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 ++#define DOMAIN_CODE_5G_ETSI3 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165}, 22 ++#define DOMAIN_CODE_5G_FCC1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 ++#define DOMAIN_CODE_5G_FCC2 \ ++ {36,40,44,48,149,153,157,161,165}, 9 ++#define DOMAIN_CODE_5G_FCC3 \ ++ {36,40,44,48,52,56,60,64,149,153,157,161,165}, 13 ++#define DOMAIN_CODE_5G_FCC4 \ ++ {36,40,44,48,52,56,60,64,149,153,157,161}, 12 ++#define DOMAIN_CODE_5G_FCC5 \ ++ {149,153,157,161,165}, 5 ++#define DOMAIN_CODE_5G_FCC6 \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define DOMAIN_CODE_5G_FCC7 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define DOMAIN_CODE_5G_IC1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define DOMAIN_CODE_5G_KCC1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165}, 20 ++#define DOMAIN_CODE_5G_MKK1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 ++#define DOMAIN_CODE_5G_MKK2 \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define DOMAIN_CODE_5G_MKK3 \ ++ {100,104,108,112,116,120,124,128,132,136,140}, 11 ++#define DOMAIN_CODE_5G_NCC1 \ ++ {56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 24 ++#define DOMAIN_CODE_5G_NCC2 \ ++ {56,60,64,149,153,157,161,165}, 8 ++#define UNDEFINED \ ++ {0}, 0 ++#endif ++ ++// ++// ++// ++/* ++ ++Countries "Country Abbreviation" Domain Code SKU's Ch# of 20MHz ++ 2G 5G Ch# of 40MHz ++"Albaniaªüº¸¤Ú¥§¨È" AL Local Test ++ ++"Algeriaªüº¸¤Î§Q¨È" DZ CE TCF ++ ++"Antigua & Barbuda¦w´£¥Ê®q&¤Ú¥¬¹F" AG 2G_WORLD FCC TCF ++ ++"Argentinaªü®Ú§Ê" AR 2G_WORLD Local Test ++ ++"Armenia¨È¬ü¥§¨È" AM 2G_WORLD ETSI ++ ++"Arubaªü¾|¤Ú®q" AW 2G_WORLD FCC TCF ++ ++"Australia¿D¬w" AU 2G_WORLD 5G_ETSI2 ++ ++"Austria¶ø¦a§Q" AT 2G_WORLD 5G_ETSI1 CE ++ ++"Azerbaijanªü¶ë«ô¾Ê" AZ 2G_WORLD CE TCF ++ ++"Bahamas¤Ú«¢°¨" BS 2G_WORLD ++ ++"Barbados¤Ú¤Ú¦h´µ" BB 2G_WORLD FCC TCF ++ ++"Belgium¤ñ§Q®É" BE 2G_WORLD 5G_ETSI1 CE ++ ++"Bermuda¦Ê¼}¹F" BM 2G_WORLD FCC TCF ++ ++"Brazil¤Ú¦è" BR 2G_WORLD Local Test ++ ++"Bulgaria«O¥[§Q¨È" BG 2G_WORLD 5G_ETSI1 CE ++ ++"Canada¥[®³¤j" CA 2G_FCC1 5G_FCC7 IC / FCC IC / FCC ++ ++"Cayman Islands¶}°Ò¸s®q" KY 2G_WORLD 5G_ETSI1 CE ++ ++"Chile´¼§Q" CL 2G_WORLD FCC TCF ++ ++"China¤¤°ê" CN 2G_WORLD 5G_FCC5 «H³¡?¡i2002¡j353? ++ ++"Columbia­ô­Û¤ñ¨È" CO 2G_WORLD Voluntary ++ ++"Costa Rica­ô´µ¹F¾¤¥[" CR 2G_WORLD FCC TCF ++ ++"Cyprus¶ë®ú¸ô´µ" CY 2G_WORLD 5G_ETSI1 CE ++ ++"Czech ±¶§J" CZ 2G_WORLD 5G_ETSI1 CE ++ ++"Denmark¤¦³Á" DK 2G_WORLD 5G_ETSI1 CE ++ ++"Dominican Republic¦h©ú¥§¥[¦@©M°ê" DO 2G_WORLD FCC TCF ++ ++"Egypt®J¤Î" EG 2G_WORLD CE T CF ++ ++"El SalvadorÂĺ¸¥Ë¦h" SV 2G_WORLD Voluntary ++ ++"Estonia·R¨F¥§¨È" EE 2G_WORLD 5G_ETSI1 CE ++ ++"FinlandªâÄõ" FI 2G_WORLD 5G_ETSI1 CE ++ ++"Franceªk°ê" FR 5G_E TSI1 CE ++ ++"Germany¼w°ê" DE 2G_WORLD 5G_ETSI1 CE ++ ++"Greece §Æþ" GR 2G_WORLD 5G_ETSI1 CE ++ ++"GuamÃö®q" GU 2G_WORLD ++ ++"Guatemala¥Ê¦a°¨©Ô" GT 2G_WORLD ++ ++"Haiti®ü¦a" HT 2G_WORLD FCC TCF ++ ++"Honduras§»³£©Ô´µ" HN 2G_WORLD FCC TCF ++ ++"Hungary¦I¤ú§Q" HU 2G_WORLD 5G_ETSI1 CE ++ ++"Iceland¦B®q" IS 2G_WORLD 5G_ETSI1 CE ++ ++"India¦L«×" IN 2G_WORLD 5G_FCC3 FCC/CE TCF ++ ++"Ireland·Rº¸Äõ" IE 2G_WORLD 5G_ETSI1 CE ++ ++"Israel¥H¦â¦C" IL 5G_F CC6 CE TCF ++ ++"Italy¸q¤j§Q" IT 2G_WORLD 5G_ETSI1 CE ++ ++"Japan¤é¥»" JP 2G_MKK1 5G_MKK1 MKK MKK ++ ++"KoreaÁú°ê" KR 2G_WORLD 5G_KCC1 KCC KCC ++ ++"Latvia©Ô²æºû¨È" LV 2G_WORLD 5G_ETSI1 CE ++ ++"Lithuania¥ß³³©{" LT 2G_WORLD 5G_ETSI1 CE ++ ++"Luxembourg¿c´Ë³ù" LU 2G_WORLD 5G_ETSI1 CE ++ ++"Malaysia°¨¨Ó¦è¨È" MY 2G_WORLD Local Test ++ ++"Malta°¨º¸¥L" MT 2G_WORLD 5G_ETSI1 CE ++ ++"Mexico¾¥¦è­ô" MX 2G_WORLD 5G_FCC3 Local Test ++ ++"Morocco¼¯¬¥­ô" MA CE TCF ++ ++"Netherlands²üÄõ" NL 2G_WORLD 5G_ETSI1 CE ++ ++"New Zealand¯Ã¦èÄõ" NZ 2G_WORLD 5G_ETSI2 ++ ++"Norway®¿«Â" NO 2G_WORLD 5G_ETSI1 CE ++ ++"Panama¤Ú®³°¨ " PA 2G_FCC1 Voluntary ++ ++"Philippinesµá«ß»«" PH 2G_WORLD FCC TCF ++ ++"PolandªiÄõ" PL 2G_WORLD 5G_ETSI1 CE ++ ++"Portugal¸²µå¤ú" PT 2G_WORLD 5G_ETSI1 CE ++ ++"Romaniaù°¨¥§¨È" RO 2G_WORLD 5G_ETSI1 CE ++ ++"Russia«Xù´µ" RU 2G_WORLD 5G_ETSI3 CE TCF ++ ++"Saudi Arabia¨F¦aªü©Ô§B" SA 2G_WORLD CE TCF ++ ++"Singapore·s¥[©Y" SG 2G_WORLD ++ ++"Slovakia´µ¬¥¥ï§J" SK 2G_WORLD 5G_ETSI1 CE ++ ++"Slovenia´µ¬¥ºû¥§¨È" SI 2G_WORLD 5G_ETSI1 CE ++ ++"South Africa«n«D" ZA 2G_WORLD CE TCF ++ ++"Spain¦è¯Z¤ú" ES 5G_ETSI1 CE ++ ++"Sweden·ç¨å" SE 2G_WORLD 5G_ETSI1 CE ++ ++"Switzerland·ç¤h" CH 2G_WORLD 5G_ETSI1 CE ++ ++"Taiwan»OÆW" TW 2G_FCC1 5G_NCC1 NCC ++ ++"Thailand®õ°ê" TH 2G_WORLD FCC/CE TCF ++ ++"Turkey¤g¦Õ¨ä" TR 2G_WORLD ++ ++"Ukraine¯Q§JÄõ" UA 2G_WORLD Local Test ++ ++"United Kingdom­^°ê" GB 2G_WORLD 5G_ETSI1 CE ETSI ++ ++"United States¬ü°ê" US 2G_FCC1 5G_FCC7 FCC FCC ++ ++"Venezuela©e¤º·ç©Ô" VE 2G_WORLD 5G_FCC4 FCC TCF ++ ++"Vietnam¶V«n" VN 2G_WORLD FCC/CE TCF ++ ++ ++ ++*/ ++ ++// Counter abbervation. ++typedef enum _RT_COUNTRY_DEFINE_NUM ++{ ++ RT_CTRY_AL, // "Albaniaªüº¸¤Ú¥§¨È" ++ RT_CTRY_DZ, // "Algeriaªüº¸¤Î§Q¨È" ++ RT_CTRY_AG, // "Antigua & Barbuda¦w´£¥Ê®q&¤Ú¥¬¹F" ++ RT_CTRY_AR, // "Argentinaªü®Ú§Ê" ++ RT_CTRY_AM, // "Armenia¨È¬ü¥§¨È" ++ RT_CTRY_AW, // "Arubaªü¾|¤Ú®q" ++ RT_CTRY_AU, // "Australia¿D¬w" ++ RT_CTRY_AT, // "Austria¶ø¦a§Q" ++ RT_CTRY_AZ, // "Azerbaijanªü¶ë«ô¾Ê" ++ RT_CTRY_BS, // "Bahamas¤Ú«¢°¨" ++ RT_CTRY_BB, // "Barbados¤Ú¤Ú¦h´µ" ++ RT_CTRY_BE, // "Belgium¤ñ§Q®É" ++ RT_CTRY_BM, // "Bermuda¦Ê¼}¹F" ++ RT_CTRY_BR, // "Brazil¤Ú¦è" ++ RT_CTRY_BG, // "Bulgaria«O¥[§Q¨È" ++ RT_CTRY_CA, // "Canada¥[®³¤j" ++ RT_CTRY_KY, // "Cayman Islands¶}°Ò¸s®q" ++ RT_CTRY_CL, // "Chile´¼§Q" ++ RT_CTRY_CN, // "China¤¤°ê" ++ RT_CTRY_CO, // "Columbia­ô­Û¤ñ¨È" ++ RT_CTRY_CR, // "Costa Rica­ô´µ¹F¾¤¥[" ++ RT_CTRY_CY, // "Cyprus¶ë®ú¸ô´µ" ++ RT_CTRY_CZ, // "Czech ±¶§J" ++ RT_CTRY_DK, // "Denmark¤¦³Á" ++ RT_CTRY_DO, // "Dominican Republic¦h©ú¥§¥[¦@©M°ê" ++ RT_CTRY_CE, // "Egypt®J¤Î" EG 2G_WORLD ++ RT_CTRY_SV, // "El SalvadorÂĺ¸¥Ë¦h" ++ RT_CTRY_EE, // "Estonia·R¨F¥§¨È" ++ RT_CTRY_FI, // "FinlandªâÄõ" ++ RT_CTRY_FR, // "Franceªk°ê" ++ RT_CTRY_DE, // "Germany¼w°ê" ++ RT_CTRY_GR, // "Greece §Æþ" ++ RT_CTRY_GU, // "GuamÃö®q" ++ RT_CTRY_GT, // "Guatemala¥Ê¦a°¨©Ô" ++ RT_CTRY_HT, // "Haiti®ü¦a" ++ RT_CTRY_HN, // "Honduras§»³£©Ô´µ" ++ RT_CTRY_HU, // "Hungary¦I¤ú§Q" ++ RT_CTRY_IS, // "Iceland¦B®q" ++ RT_CTRY_IN, // "India¦L«×" ++ RT_CTRY_IE, // "Ireland·Rº¸Äõ" ++ RT_CTRY_IL, // "Israel¥H¦â¦C" ++ RT_CTRY_IT, // "Italy¸q¤j§Q" ++ RT_CTRY_JP, // "Japan¤é¥»" ++ RT_CTRY_KR, // "KoreaÁú°ê" ++ RT_CTRY_LV, // "Latvia©Ô²æºû¨È" ++ RT_CTRY_LT, // "Lithuania¥ß³³©{" ++ RT_CTRY_LU, // "Luxembourg¿c´Ë³ù" ++ RT_CTRY_MY, // "Malaysia°¨¨Ó¦è¨È" ++ RT_CTRY_MT, // "Malta°¨º¸¥L" ++ RT_CTRY_MX, // "Mexico¾¥¦è­ô" ++ RT_CTRY_MA, // "Morocco¼¯¬¥­ô" ++ RT_CTRY_NL, // "Netherlands²üÄõ" ++ RT_CTRY_NZ, // "New Zealand¯Ã¦èÄõ" ++ RT_CTRY_NO, // "Norway®¿«Â" ++ RT_CTRY_PA, // "Panama¤Ú®³°¨ " ++ RT_CTRY_PH, // "Philippinesµá«ß»«" ++ RT_CTRY_PL, // "PolandªiÄõ" ++ RT_CTRY_PT, // "Portugal¸²µå¤ú" ++ RT_CTRY_RO, // "Romaniaù°¨¥§¨È" ++ RT_CTRY_RU, // "Russia«Xù´µ" ++ RT_CTRY_SA, // "Saudi Arabia¨F¦aªü©Ô§B" ++ RT_CTRY_SG, // "Singapore·s¥[©Y" ++ RT_CTRY_SK, // "Slovakia´µ¬¥¥ï§J" ++ RT_CTRY_SI, // "Slovenia´µ¬¥ºû¥§¨È" ++ RT_CTRY_ZA, // "South Africa«n«D" ++ RT_CTRY_ES, // "Spain¦è¯Z¤ú" ++ RT_CTRY_SE, // "Sweden·ç¨å" ++ RT_CTRY_CH, // "Switzerland·ç¤h" ++ RT_CTRY_TW, // "Taiwan»OÆW" ++ RT_CTRY_TH, // "Thailand®õ°ê" ++ RT_CTRY_TR, // "Turkey¤g¦Õ¨ä" ++ RT_CTRY_UA, // "Ukraine¯Q§JÄõ" ++ RT_CTRY_GB, // "United Kingdom­^°ê" ++ RT_CTRY_US, // "United States¬ü°ê" ++ RT_CTRY_VE, // "Venezuela©e¤º·ç©Ô" ++ RT_CTRY_VN, // "Vietnam¶V«n" ++ RT_CTRY_MAX, // ++ ++}RT_COUNTRY_NAME, *PRT_COUNTRY_NAME; ++ ++// Scan type including active and passive scan. ++typedef enum _RT_SCAN_TYPE_NEW ++{ ++ SCAN_NULL, ++ SCAN_ACT, ++ SCAN_PAS, ++ SCAN_BOTH, ++}RT_SCAN_TYPE_NEW, *PRT_SCAN_TYPE_NEW; ++ ++ ++// Power table sample. ++ ++typedef struct _RT_CHNL_PLAN_LIMIT ++{ ++ u2Byte Chnl_Start; ++ u2Byte Chnl_end; ++ ++ u2Byte Freq_Start; ++ u2Byte Freq_end; ++}RT_CHNL_PLAN_LIMIT, *PRT_CHNL_PLAN_LIMIT; ++ ++ ++// ++// 2.4G Regulatory Domains ++// ++typedef enum _RT_REGULATION_DOMAIN_2G ++{ ++ RT_2G_NULL, ++ RT_2G_WORLD, ++ RT_2G_ETSI1, ++ RT_2G_FCC1, ++ RT_2G_MKK1, ++ RT_2G_ETSI2 ++ ++}RT_REGULATION_2G, *PRT_REGULATION_2G; ++ ++ ++//typedef struct _RT_CHANNEL_BEHAVIOR ++//{ ++// u1Byte Chnl; ++// RT_SCAN_TYPE_NEW ++// ++//}RT_CHANNEL_BEHAVIOR, *PRT_CHANNEL_BEHAVIOR; ++ ++//typedef struct _RT_CHANNEL_PLAN_TYPE ++//{ ++// RT_CHANNEL_BEHAVIOR ++// u1Byte Chnl_num; ++//}RT_CHNL_PLAN_TYPE, *PRT_CHNL_PLAN_TYPE; ++ ++// ++// 2.4G Channel Number ++// Channel definition & number ++// ++#define CHNL_RT_2G_NULL \ ++ {0}, 0 ++#define CHNL_RT_2G_WORLD \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 ++#define CHNL_RT_2G_WORLD_TEST \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 ++ ++#define CHNL_RT_2G_EFSI1 \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13}, 13 ++#define CHNL_RT_2G_FCC1 \ ++ {1,2,3,4,5,6,7,8,9,10,11}, 11 ++#define CHNL_RT_2G_MKK1 \ ++ {1,2,3,4,5,6,7,8,9,10,11,12,13,14}, 14 ++#define CHNL_RT_2G_ETSI2 \ ++ {10,11,12,13}, 4 ++ ++// ++// 2.4G Channel Active or passive scan. ++// ++#define CHNL_RT_2G_NULL_SCAN_TYPE \ ++ {SCAN_NULL} ++#define CHNL_RT_2G_WORLD_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1,0,0} ++#define CHNL_RT_2G_EFSI1_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1,1,1} ++#define CHNL_RT_2G_FCC1_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1} ++#define CHNL_RT_2G_MKK1_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1,1,1,1} ++#define CHNL_RT_2G_ETSI2_SCAN_TYPE \ ++ {1,1,1,1} ++ ++ ++// ++// 2.4G Band & Frequency Section ++// Freqency start & end / band number ++// ++#define FREQ_RT_2G_NULL \ ++ {0}, 0 ++ // Passive scan CH 12, 13 ++#define FREQ_RT_2G_WORLD \ ++ {2412, 2472}, 1 ++#define FREQ_RT_2G_EFSI1 \ ++ {2412, 2472}, 1 ++#define FREQ_RT_2G_FCC1 \ ++ {2412, 2462}, 1 ++#define FREQ_RT_2G_MKK1 \ ++ {2412, 2484}, 1 ++#define FREQ_RT_2G_ETSI2 \ ++ {2457, 2472}, 1 ++ ++ ++// ++// 5G Regulatory Domains ++// ++typedef enum _RT_REGULATION_DOMAIN_5G ++{ ++ RT_5G_NULL, ++ RT_5G_WORLD, ++ RT_5G_ETSI1, ++ RT_5G_ETSI2, ++ RT_5G_ETSI3, ++ RT_5G_FCC1, ++ RT_5G_FCC2, ++ RT_5G_FCC3, ++ RT_5G_FCC4, ++ RT_5G_FCC5, ++ RT_5G_FCC6, ++ RT_5G_FCC7, ++ RT_5G_IC1, ++ RT_5G_KCC1, ++ RT_5G_MKK1, ++ RT_5G_MKK2, ++ RT_5G_MKK3, ++ RT_5G_NCC1, ++ ++}RT_REGULATION_5G, *PRT_REGULATION_5G; ++ ++// ++// 5G Channel Number ++// ++#define CHNL_RT_5G_NULL \ ++ {0}, 0 ++#define CHNL_RT_5G_WORLD \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 ++#define CHNL_RT_5G_ETSI1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 ++#define CHNL_RT_5G_ETSI2 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165}, 22 ++#define CHNL_RT_5G_ETSI3 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 ++#define CHNL_RT_5G_FCC1 \ ++ {36,40,44,48,149,153,157,161,165}, 9 ++#define CHNL_RT_5G_FCC2 \ ++ {36,40,44,48,52,56,60,64,149,153,157,161,165}, 13 ++#define CHNL_RT_5G_FCC3 \ ++ {36,40,44,48,52,56,60,64,149,153,157,161}, 12 ++#define CHNL_RT_5G_FCC4 \ ++ {149,153,157,161,165}, 5 ++#define CHNL_RT_5G_FCC5 \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define CHNL_RT_5G_FCC6 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_FCC7 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_IC1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_KCC1 \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 ++#define CHNL_RT_5G_MKK1 \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define CHNL_RT_5G_MKK2 \ ++ {100,104,108,112,116,120,124,128,132,136,140}, 11 ++#define CHNL_RT_5G_MKK3 \ ++ {56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 24 ++#define CHNL_RT_5G_NCC1 \ ++ {56,60,64,149,153,157,161,165}, 8 ++ ++// ++// 5G Channel Active or passive scan. ++// ++#define CHNL_RT_5G_NULL_SCAN_TYPE \ ++ {SCAN_NULL} ++#define CHNL_RT_5G_WORLD_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1} ++#define CHNL_RT_5G_ETSI1_SCAN_TYPE \ ++ {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1} ++#define CHNL_RT_5G_ETSI2_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165}, 22 ++#define CHNL_RT_5G_ETSI3_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}, 24 ++#define CHNL_RT_5G_FCC1_SCAN_TYPE \ ++ {36,40,44,48,149,153,157,161,165}, 9 ++#define CHNL_RT_5G_FCC2_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,149,153,157,161,165}, 13 ++#define CHNL_RT_5G_FCC3_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,149,153,157,161}, 12 ++#define CHNL_RT_5G_FCC4_SCAN_TYPE \ ++ {149,153,157,161,165}, 5 ++#define CHNL_RT_5G_FCC5_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define CHNL_RT_5G_FCC6_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_FCC7_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_IC1_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165}, 20 ++#define CHNL_RT_5G_KCC1_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}, 19 ++#define CHNL_RT_5G_MKK1_SCAN_TYPE \ ++ {36,40,44,48,52,56,60,64}, 8 ++#define CHNL_RT_5G_MKK2_SCAN_TYPE \ ++ {100,104,108,112,116,120,124,128,132,136,140}, 11 ++#define CHNL_RT_5G_MKK3_SCAN_TYPE \ ++ {56,60,64,100,104,108,112,116,136,140,149,153,157,161,165}, 24 ++#define CHNL_RT_5G_NCC1_SCAN_TYPE \ ++ {56,60,64,149,153,157,161,165}, 8 ++ ++// ++// Global Regulation ++// ++typedef enum _RT_REGULATION_COMMON ++{ ++ RT_WORLD, ++ RT_FCC, ++ RT_MKK, ++ RT_ETSI, ++ RT_IC, ++ RT_CE, ++ RT_NCC, ++ ++}RT_REGULATION_CMN, *PRT_REGULATION_CMN; ++ ++ ++ ++// ++// Special requirement for different regulation domain. ++// For internal test or customerize special request. ++// ++typedef enum _RT_CHNLPLAN_SREQ ++{ ++ RT_SREQ_NA = 0x0, ++ RT_SREQ_2G_ADHOC_11N = 0x00000001, ++ RT_SREQ_2G_ADHOC_11B = 0x00000002, ++ RT_SREQ_2G_ALL_PASS = 0x00000004, ++ RT_SREQ_2G_ALL_ACT = 0x00000008, ++ RT_SREQ_5G_ADHOC_11N = 0x00000010, ++ RT_SREQ_5G_ADHOC_11AC = 0x00000020, ++ RT_SREQ_5G_ALL_PASS = 0x00000040, ++ RT_SREQ_5G_ALL_ACT = 0x00000080, ++ RT_SREQ_C1_PLAN = 0x00000100, ++ RT_SREQ_C2_PLAN = 0x00000200, ++ RT_SREQ_C3_PLAN = 0x00000400, ++ RT_SREQ_C4_PLAN = 0x00000800, ++ RT_SREQ_NFC_ON = 0x00001000, ++ RT_SREQ_MASK = 0x0000FFFF, /* Requirements bit mask */ ++ ++}RT_CHNLPLAN_SREQ, *PRT_CHNLPLAN_SREQ; ++ ++ ++// ++// RT_COUNTRY_NAME & RT_REGULATION_2G & RT_REGULATION_5G transfer table ++// ++// ++typedef struct _RT_CHANNEL_PLAN_COUNTRY_TRANSFER_TABLE ++{ ++ // ++ // Define countery domain and corresponding ++ // ++ RT_COUNTRY_NAME Country_Enum; ++ char Country_Name[3]; ++ ++ //char Domain_Name[12]; ++ RT_REGULATION_2G Domain_2G; ++ ++ RT_REGULATION_5G Domain_5G; ++ ++ RT_CHANNEL_DOMAIN RtChDomain; ++ //u1Byte Country_Area; ++ ++}RT_CHNL_CTRY_TBL, *PRT_CHNL_CTRY_TBL; ++ ++ ++#define RT_MAX_CHNL_NUM_2G 13 ++#define RT_MAX_CHNL_NUM_5G 44 ++ ++// Power table sample. ++ ++typedef struct _RT_CHNL_PLAN_PWR_LIMIT ++{ ++ u2Byte Chnl_Start; ++ u2Byte Chnl_end; ++ u1Byte dB_Max; ++ u2Byte mW_Max; ++}RT_CHNL_PWR_LIMIT, *PRT_CHNL_PWR_LIMIT; ++ ++ ++#define RT_MAX_BAND_NUM 5 ++ ++typedef struct _RT_CHANNEL_PLAN_MAXPWR ++{ ++// STRING_T ++ RT_CHNL_PWR_LIMIT Chnl[RT_MAX_BAND_NUM]; ++ u1Byte Band_Useful_Num; ++ ++ ++}RT_CHANNEL_PLAN_MAXPWR, *PRT_CHANNEL_PLAN_MAXPWR; ++ ++ ++// ++// Power By Rate Table. ++// ++ ++ ++ ++typedef struct _RT_CHANNEL_PLAN_NEW ++{ ++ // ++ // Define countery domain and corresponding ++ // ++ //char Country_Name[36]; ++ //u1Byte Country_Enum; ++ ++ //char Domain_Name[12]; ++ ++ ++ PRT_CHNL_CTRY_TBL pCtryTransfer; ++ ++ RT_CHANNEL_DOMAIN RtChDomain; ++ ++ RT_REGULATION_2G Domain_2G; ++ ++ RT_REGULATION_5G Domain_5G; ++ ++ RT_REGULATION_CMN Regulator; ++ ++ RT_CHNLPLAN_SREQ ChnlSreq; ++ ++ //RT_CHNL_PLAN_LIMIT RtChnl; ++ ++ u1Byte Chnl2G[MAX_CHANNEL_NUM]; // CHNL_RT_2G_WORLD ++ u1Byte Len2G; ++ u1Byte Chnl2GScanTp[MAX_CHANNEL_NUM]; // CHNL_RT_2G_WORLD_SCAN_TYPE ++ //u1Byte Freq2G[2]; // FREQ_RT_2G_WORLD ++ ++ u1Byte Chnl5G[MAX_CHANNEL_NUM]; ++ u1Byte Len5G; ++ u1Byte Chnl5GScanTp[MAX_CHANNEL_NUM]; ++ //u1Byte Freq2G[2]; // FREQ_RT_2G_WORLD ++ ++ RT_CHANNEL_PLAN_MAXPWR ChnlMaxPwr; ++ ++ ++}RT_CHANNEL_PLAN_NEW, *PRT_CHANNEL_PLAN_NEW; ++ ++ ++#endif // __RT_CHANNELPLAN_H__ ++ ++ ++ ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/hal8723breg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/hal8723breg.h +new file mode 100644 +index 0000000..e34fe98 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/hal8723breg.h +@@ -0,0 +1,861 @@ ++/***************************************************************************** ++ * Copyright(c) 2009, RealTEK Technology Inc. All Right Reserved. ++ * ++ * Module: __INC_HAL8723BREG_H ++ * ++ * ++ * Note: 1. Define Mac register address and corresponding bit mask map ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * ++ *****************************************************************************/ ++#ifndef __INC_HAL8723BREG_H ++#define __INC_HAL8723BREG_H ++ ++ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_ISO_CTRL_8723B 0x0000 // 2 Byte ++#define REG_SYS_FUNC_EN_8723B 0x0002 // 2 Byte ++#define REG_APS_FSMCO_8723B 0x0004 // 4 Byte ++#define REG_SYS_CLKR_8723B 0x0008 // 2 Byte ++#define REG_9346CR_8723B 0x000A // 2 Byte ++#define REG_EE_VPD_8723B 0x000C // 2 Byte ++#define REG_AFE_MISC_8723B 0x0010 // 1 Byte ++#define REG_SPS0_CTRL_8723B 0x0011 // 7 Byte ++#define REG_SPS_OCP_CFG_8723B 0x0018 // 4 Byte ++#define REG_RSV_CTRL_8723B 0x001C // 3 Byte ++#define REG_RF_CTRL_8723B 0x001F // 1 Byte ++#define REG_LPLDO_CTRL_8723B 0x0023 // 1 Byte ++#define REG_AFE_XTAL_CTRL_8723B 0x0024 // 4 Byte ++#define REG_AFE_PLL_CTRL_8723B 0x0028 // 4 Byte ++#define REG_MAC_PLL_CTRL_EXT_8723B 0x002c // 4 Byte ++#define REG_EFUSE_CTRL_8723B 0x0030 ++#define REG_EFUSE_TEST_8723B 0x0034 ++#define REG_PWR_DATA_8723B 0x0038 ++#define REG_CAL_TIMER_8723B 0x003C ++#define REG_ACLK_MON_8723B 0x003E ++#define REG_GPIO_MUXCFG_8723B 0x0040 ++#define REG_GPIO_IO_SEL_8723B 0x0042 ++#define REG_MAC_PINMUX_CFG_8723B 0x0043 ++#define REG_GPIO_PIN_CTRL_8723B 0x0044 ++#define REG_GPIO_INTM_8723B 0x0048 ++#define REG_LEDCFG0_8723B 0x004C ++#define REG_LEDCFG1_8723B 0x004D ++#define REG_LEDCFG2_8723B 0x004E ++#define REG_LEDCFG3_8723B 0x004F ++#define REG_FSIMR_8723B 0x0050 ++#define REG_FSISR_8723B 0x0054 ++#define REG_HSIMR_8723B 0x0058 ++#define REG_HSISR_8723B 0x005c ++#define REG_GPIO_EXT_CTRL 0x0060 ++#define REG_MULTI_FUNC_CTRL_8723B 0x0068 ++#define REG_GPIO_STATUS_8723B 0x006C ++#define REG_SDIO_CTRL_8723B 0x0070 ++#define REG_OPT_CTRL_8723B 0x0074 ++#define REG_AFE_XTAL_CTRL_EXT_8723B 0x0078 ++#define REG_MCUFWDL_8723B 0x0080 ++#define REG_FW_DBG_STATUS_8723B 0x0088 ++#define REG_FW_DBG_CTRL_8723B 0x008F ++#define REG_SYSON_FSM_MON_8723B 0x00A0 ++#define REG_HIMR0_8723B 0x00B0 ++#define REG_HISR0_8723B 0x00B4 ++#define REG_HIMR1_8723B 0x00B8 ++#define REG_HISR1_8723B 0x00BC ++#define REG_PMC_DBG_CTRL2_8723B 0x00CC ++#define REG_EFUSE_BURN_GNT_8723B 0x00CF ++#define REG_HPON_FSM_8723B 0x00EC ++#define REG_SYS_CFG_8723B 0x00F0 ++#define REG_SYS_CFG1_8723B 0x00FC ++#define REG_ROM_VERSION 0x00FD ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_CR_8723B 0x0100 ++#define REG_PBP_8723B 0x0104 ++#define REG_PKT_BUFF_ACCESS_CTRL_8723B 0x0106 ++#define REG_TRXDMA_CTRL_8723B 0x010C ++#define REG_TRXFF_BNDY_8723B 0x0114 ++#define REG_TRXFF_STATUS_8723B 0x0118 ++#define REG_RXFF_PTR_8723B 0x011C ++#define REG_CPWM_8723B 0x012F ++#define REG_FWIMR_8723B 0x0130 ++#define REG_FWISR_8723B 0x0134 ++#define REG_FTIMR_8723B 0x0138 ++#define REG_PKTBUF_DBG_CTRL_8723B 0x0140 ++#define REG_RXPKTBUF_CTRL_8723B 0x0142 ++#define REG_PKTBUF_DBG_DATA_L_8723B 0x0144 ++#define REG_PKTBUF_DBG_DATA_H_8723B 0x0148 ++ ++#define REG_TC0_CTRL_8723B 0x0150 ++#define REG_TC1_CTRL_8723B 0x0154 ++#define REG_TC2_CTRL_8723B 0x0158 ++#define REG_TC3_CTRL_8723B 0x015C ++#define REG_TC4_CTRL_8723B 0x0160 ++#define REG_TCUNIT_BASE_8723B 0x0164 ++#define REG_RSVD3_8723B 0x0168 ++#define REG_C2HEVT_MSG_NORMAL_8723B 0x01A0 ++#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 ++#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 ++#define REG_C2HEVT_CMD_LEN_88XX 0x01AE ++#define REG_C2HEVT_CLEAR_8723B 0x01AF ++#define REG_MCUTST_1_8723B 0x01C0 ++#define REG_MCUTST_WOWLAN_8723B 0x01C7 ++#define REG_FMETHR_8723B 0x01C8 ++#define REG_HMETFR_8723B 0x01CC ++#define REG_HMEBOX_0_8723B 0x01D0 ++#define REG_HMEBOX_1_8723B 0x01D4 ++#define REG_HMEBOX_2_8723B 0x01D8 ++#define REG_HMEBOX_3_8723B 0x01DC ++#define REG_LLT_INIT_8723B 0x01E0 ++#define REG_HMEBOX_EXT0_8723B 0x01F0 ++#define REG_HMEBOX_EXT1_8723B 0x01F4 ++#define REG_HMEBOX_EXT2_8723B 0x01F8 ++#define REG_HMEBOX_EXT3_8723B 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RQPN_8723B 0x0200 ++#define REG_FIFOPAGE_8723B 0x0204 ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#define REG_DWBCN0_CTRL_8723B REG_TDECTRL ++#else ++#define REG_TDECTRL_8723B 0x0208 ++#endif ++#define REG_TXDMA_OFFSET_CHK_8723B 0x020C ++#define REG_TXDMA_STATUS_8723B 0x0210 ++#define REG_RQPN_NPQ_8723B 0x0214 ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#define REG_DWBCN1_CTRL_8723B 0x0228 ++#else ++#define REG_TDECTRL1_8723B 0x0228 ++#endif ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_AGG_PG_TH_8723B 0x0280 ++#define REG_FW_UPD_RDPTR_8723B 0x0284 // FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 ++#define REG_RXDMA_CONTROL_8723B 0x0286 // Control the RX DMA. ++#define REG_RXPKT_NUM_8723B 0x0287 // The number of packets in RXPKTBUF. ++#define REG_RXDMA_STATUS_8723B 0x0288 ++#define REG_RXDMA_PRO_8723B 0x0290 ++#define REG_EARLY_MODE_CONTROL_8723B 0x02BC ++#define REG_RSVD5_8723B 0x02F0 ++#define REG_RSVD6_8723B 0x02F4 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8723B 0x0300 ++#define REG_INT_MIG_8723B 0x0304 // Interrupt Migration ++#define REG_BCNQ_DESA_8723B 0x0308 // TX Beacon Descriptor Address ++#define REG_HQ_DESA_8723B 0x0310 // TX High Queue Descriptor Address ++#define REG_MGQ_DESA_8723B 0x0318 // TX Manage Queue Descriptor Address ++#define REG_VOQ_DESA_8723B 0x0320 // TX VO Queue Descriptor Address ++#define REG_VIQ_DESA_8723B 0x0328 // TX VI Queue Descriptor Address ++#define REG_BEQ_DESA_8723B 0x0330 // TX BE Queue Descriptor Address ++#define REG_BKQ_DESA_8723B 0x0338 // TX BK Queue Descriptor Address ++#define REG_RX_DESA_8723B 0x0340 // RX Queue Descriptor Address ++#define REG_DBI_WDATA_8723B 0x0348 // DBI Write Data ++#define REG_DBI_RDATA_8723B 0x034C // DBI Read Data ++#define REG_DBI_ADDR_8723B 0x0350 // DBI Address ++#define REG_DBI_FLAG_8723B 0x0352 // DBI Read/Write Flag ++#define REG_MDIO_WDATA_8723B 0x0354 // MDIO for Write PCIE PHY ++#define REG_MDIO_RDATA_8723B 0x0356 // MDIO for Reads PCIE PHY ++#define REG_MDIO_CTL_8723B 0x0358 // MDIO for Control ++#define REG_DBG_SEL_8723B 0x0360 // Debug Selection Register ++#define REG_PCIE_HRPWM_8723B 0x0361 //PCIe RPWM ++#define REG_PCIE_HCPWM_8723B 0x0363 //PCIe CPWM ++#define REG_PCIE_MULTIFET_CTRL_8723B 0x036A //PCIE Multi-Fethc Control ++ ++// spec version 11 ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_VOQ_INFORMATION_8723B 0x0400 ++#define REG_VIQ_INFORMATION_8723B 0x0404 ++#define REG_BEQ_INFORMATION_8723B 0x0408 ++#define REG_BKQ_INFORMATION_8723B 0x040C ++#define REG_MGQ_INFORMATION_8723B 0x0410 ++#define REG_HGQ_INFORMATION_8723B 0x0414 ++#define REG_BCNQ_INFORMATION_8723B 0x0418 ++#define REG_TXPKT_EMPTY_8723B 0x041A ++ ++#define REG_FWHW_TXQ_CTRL_8723B 0x0420 ++#define REG_HWSEQ_CTRL_8723B 0x0423 ++#define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424 ++#define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425 ++#define REG_LIFECTRL_CTRL_8723B 0x0426 ++#define REG_MULTI_BCNQ_OFFSET_8723B 0x0427 ++#define REG_SPEC_SIFS_8723B 0x0428 ++#define REG_RL_8723B 0x042A ++#define REG_TXBF_CTRL_8723B 0x042C ++#define REG_DARFRC_8723B 0x0430 ++#define REG_RARFRC_8723B 0x0438 ++#define REG_RRSR_8723B 0x0440 ++#define REG_ARFR0_8723B 0x0444 ++#define REG_ARFR1_8723B 0x044C ++#define REG_CCK_CHECK_8723B 0x0454 ++#define REG_AMPDU_MAX_TIME_8723B 0x0456 ++#define REG_TXPKTBUF_BCNQ_BDNY1_8723B 0x0457 ++ ++#define REG_AMPDU_MAX_LENGTH_8723B 0x0458 ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D ++#define REG_NDPA_OPT_CTRL_8723B 0x045F ++#define REG_FAST_EDCA_CTRL_8723B 0x0460 ++#define REG_RD_RESP_PKT_TH_8723B 0x0463 ++#define REG_DATA_SC_8723B 0x0483 ++#define REG_TXRPT_START_OFFSET 0x04AC ++#define REG_POWER_STAGE1_8723B 0x04B4 ++#define REG_POWER_STAGE2_8723B 0x04B8 ++#define REG_AMPDU_BURST_MODE_8723B 0x04BC ++#define REG_PKT_VO_VI_LIFE_TIME_8723B 0x04C0 ++#define REG_PKT_BE_BK_LIFE_TIME_8723B 0x04C2 ++#define REG_STBC_SETTING_8723B 0x04C4 ++#define REG_HT_SINGLE_AMPDU_8723B 0x04C7 ++#define REG_PROT_MODE_CTRL_8723B 0x04C8 ++#define REG_MAX_AGGR_NUM_8723B 0x04CA ++#define REG_RTS_MAX_AGGR_NUM_8723B 0x04CB ++#define REG_BAR_MODE_CTRL_8723B 0x04CC ++#define REG_RA_TRY_RATE_AGG_LMT_8723B 0x04CF ++#define REG_MACID_PKT_DROP0_8723B 0x04D0 ++#define REG_MACID_PKT_SLEEP_8723B 0x04D4 ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_EDCA_VO_PARAM_8723B 0x0500 ++#define REG_EDCA_VI_PARAM_8723B 0x0504 ++#define REG_EDCA_BE_PARAM_8723B 0x0508 ++#define REG_EDCA_BK_PARAM_8723B 0x050C ++#define REG_BCNTCFG_8723B 0x0510 ++#define REG_PIFS_8723B 0x0512 ++#define REG_RDG_PIFS_8723B 0x0513 ++#define REG_SIFS_CTX_8723B 0x0514 ++#define REG_SIFS_TRX_8723B 0x0516 ++#define REG_AGGR_BREAK_TIME_8723B 0x051A ++#define REG_SLOT_8723B 0x051B ++#define REG_TX_PTCL_CTRL_8723B 0x0520 ++#define REG_TXPAUSE_8723B 0x0522 ++#define REG_DIS_TXREQ_CLR_8723B 0x0523 ++#define REG_RD_CTRL_8723B 0x0524 ++// ++// Format for offset 540h-542h: ++// [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. ++// [7:4]: Reserved. ++// [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. ++// [23:20]: Reserved ++// Description: ++// | ++// |<--Setup--|--Hold------------>| ++// --------------|---------------------- ++// | ++// TBTT ++// Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. ++// Described by Designer Tim and Bruce, 2011-01-14. ++// ++#define REG_TBTT_PROHIBIT_8723B 0x0540 ++#define REG_RD_NAV_NXT_8723B 0x0544 ++#define REG_NAV_PROT_LEN_8723B 0x0546 ++#define REG_BCN_CTRL_8723B 0x0550 ++#define REG_BCN_CTRL_1_8723B 0x0551 ++#define REG_MBID_NUM_8723B 0x0552 ++#define REG_DUAL_TSF_RST_8723B 0x0553 ++#define REG_BCN_INTERVAL_8723B 0x0554 ++#define REG_DRVERLYINT_8723B 0x0558 ++#define REG_BCNDMATIM_8723B 0x0559 ++#define REG_ATIMWND_8723B 0x055A ++#define REG_USTIME_TSF_8723B 0x055C ++#define REG_BCN_MAX_ERR_8723B 0x055D ++#define REG_RXTSF_OFFSET_CCK_8723B 0x055E ++#define REG_RXTSF_OFFSET_OFDM_8723B 0x055F ++#define REG_TSFTR_8723B 0x0560 ++#define REG_CTWND_8723B 0x0572 ++#define REG_SECONDARY_CCA_CTRL_8723B 0x0577 ++#define REG_PSTIMER_8723B 0x0580 ++#define REG_TIMER0_8723B 0x0584 ++#define REG_TIMER1_8723B 0x0588 ++#define REG_ACMHWCTRL_8723B 0x05C0 ++#define REG_SCH_TXCMD_8723B 0x05F8 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_MAC_CR_8723B 0x0600 ++#define REG_TCR_8723B 0x0604 ++#define REG_RCR_8723B 0x0608 ++#define REG_RX_PKT_LIMIT_8723B 0x060C ++#define REG_RX_DLK_TIME_8723B 0x060D ++#define REG_RX_DRVINFO_SZ_8723B 0x060F ++ ++#define REG_MACID_8723B 0x0610 ++#define REG_BSSID_8723B 0x0618 ++#define REG_MAR_8723B 0x0620 ++#define REG_MBIDCAMCFG_8723B 0x0628 ++ ++#define REG_USTIME_EDCA_8723B 0x0638 ++#define REG_MAC_SPEC_SIFS_8723B 0x063A ++#define REG_RESP_SIFP_CCK_8723B 0x063C ++#define REG_RESP_SIFS_OFDM_8723B 0x063E ++#define REG_ACKTO_8723B 0x0640 ++#define REG_CTS2TO_8723B 0x0641 ++#define REG_EIFS_8723B 0x0642 ++ ++#define REG_NAV_UPPER_8723B 0x0652 // unit of 128 ++#define REG_TRXPTCL_CTL_8723B 0x0668 ++ ++// Security ++#define REG_CAMCMD_8723B 0x0670 ++#define REG_CAMWRITE_8723B 0x0674 ++#define REG_CAMREAD_8723B 0x0678 ++#define REG_CAMDBG_8723B 0x067C ++#define REG_SECCFG_8723B 0x0680 ++ ++// Power ++#define REG_WOW_CTRL_8723B 0x0690 ++#define REG_PS_RX_INFO_8723B 0x0692 ++#define REG_UAPSD_TID_8723B 0x0693 ++#define REG_WKFMCAM_CMD_8723B 0x0698 ++#define REG_WKFMCAM_NUM_8723B 0x0698 ++#define REG_WKFMCAM_RWD_8723B 0x069C ++#define REG_RXFLTMAP0_8723B 0x06A0 ++#define REG_RXFLTMAP1_8723B 0x06A2 ++#define REG_RXFLTMAP2_8723B 0x06A4 ++#define REG_BCN_PSR_RPT_8723B 0x06A8 ++#define REG_BT_COEX_TABLE_8723B 0x06C0 ++#define REG_BFMER0_INFO_8723B 0x06E4 ++#define REG_BFMER1_INFO_8723B 0x06EC ++#define REG_CSI_RPT_PARAM_BW20_8723B 0x06F4 ++#define REG_CSI_RPT_PARAM_BW40_8723B 0x06F8 ++#define REG_CSI_RPT_PARAM_BW80_8723B 0x06FC ++ ++// Hardware Port 2 ++#define REG_MACID1_8723B 0x0700 ++#define REG_BSSID1_8723B 0x0708 ++#define REG_BFMEE_SEL_8723B 0x0714 ++#define REG_SND_PTCL_CTRL_8723B 0x0718 ++ ++ ++//----------------------------------------------------- ++// ++// Redifine 8192C register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++#define EFUSE_CTRL_8723B REG_EFUSE_CTRL_8723B // E-Fuse Control. ++#define EFUSE_TEST_8723B REG_EFUSE_TEST_8723B // E-Fuse Test. ++#define MSR_8723B (REG_CR_8723B + 2) // Media Status register ++#define ISR_8723B REG_HISR0_8723B ++#define TSFR_8723B REG_TSFTR_8723B // Timing Sync Function Timer Register. ++ ++#define PBP_8723B REG_PBP_8723B ++ ++// Redifine MACID register, to compatible prior ICs. ++#define IDR0_8723B REG_MACID_8723B // MAC ID Register, Offset 0x0050-0x0053 ++#define IDR4_8723B (REG_MACID_8723B + 4) // MAC ID Register, Offset 0x0054-0x0055 ++ ++ ++// ++// 9. Security Control Registers (Offset: ) ++// ++#define RWCAM_8723B REG_CAMCMD_8723B //IN 8190 Data Sheet is called CAMcmd ++#define WCAMI_8723B REG_CAMWRITE_8723B // Software write CAM input content ++#define RCAMO_8723B REG_CAMREAD_8723B // Software read/write CAM config ++#define CAMDBG_8723B REG_CAMDBG_8723B ++#define SECR_8723B REG_SECCFG_8723B //Security Configuration Register ++ ++ ++//---------------------------------------------------------------------------- ++// 8195 IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8723B 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8723B BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8723B BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8723B BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8723B BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8723B BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8723B BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8723B BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8723B BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8723B BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8723B BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8723B BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8723B BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8723B BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8723B BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8723B BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8723B BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8723B BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8723B BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8723B BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8723B BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8723B BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8723B BIT2 // AC_VO DMA OK ++#define IMR_RDU_8723B BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8723B BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_BCNDMAINT7_8723B BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8723B BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8723B BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8723B BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8723B BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8723B BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8723B BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8723B BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8723B BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8723B BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8723B BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8723B BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8723B BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8723B BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8723B BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8723B BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8723B BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8723B BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8723B BIT8 // Receive FIFO Overflow ++ ++ ++ ++ ++ ++/*=================================================================== ++===================================================================== ++Here the register defines are for 92C. When the define is as same with 92C, ++we will use the 92C's define for the consistency ++So the following defines for 92C is not entire!!!!!! ++===================================================================== ++=====================================================================*/ ++/* ++Based on Datasheet V33---090401 ++Register Summary ++Current IOREG MAP ++0x0000h ~ 0x00FFh System Configuration (256 Bytes) ++0x0100h ~ 0x01FFh MACTOP General Configuration (256 Bytes) ++0x0200h ~ 0x027Fh TXDMA Configuration (128 Bytes) ++0x0280h ~ 0x02FFh RXDMA Configuration (128 Bytes) ++0x0300h ~ 0x03FFh PCIE EMAC Reserved Region (256 Bytes) ++0x0400h ~ 0x04FFh Protocol Configuration (256 Bytes) ++0x0500h ~ 0x05FFh EDCA Configuration (256 Bytes) ++0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) ++0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) ++*/ ++//---------------------------------------------------------------------------- ++// 8195 (TXPAUSE) transmission pause (Offset 0x522, 8 bits) ++//---------------------------------------------------------------------------- ++/* ++#define StopBecon BIT6 ++#define StopHigh BIT5 ++#define StopMgt BIT4 ++#define StopVO BIT3 ++#define StopVI BIT2 ++#define StopBE BIT1 ++#define StopBK BIT0 ++*/ ++ ++ ++//============================================================================ ++// 8192C Regsiter Bit and Content definition ++//============================================================================ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++/* ++//2 SYS_ISO_CTRL ++#define ISO_MD2PP BIT(0) ++#define ISO_UA2USB BIT(1) ++#define ISO_UD2CORE BIT(2) ++#define ISO_PA2PCIE BIT(3) ++#define ISO_PD2CORE BIT(4) ++#define ISO_IP2MAC BIT(5) ++#define ISO_DIOP BIT(6) ++#define ISO_DIOE BIT(7) ++#define ISO_EB2CORE BIT(8) ++#define ISO_DIOR BIT(9) ++#define PWC_EV12V BIT(15) ++ ++ ++//2 SYS_FUNC_EN ++#define FEN_BBRSTB BIT(0) ++#define FEN_BB_GLB_RSTn BIT(1) ++#define FEN_USBA BIT(2) ++#define FEN_UPLL BIT(3) ++#define FEN_USBD BIT(4) ++#define FEN_DIO_PCIE BIT(5) ++#define FEN_PCIEA BIT(6) ++#define FEN_PPLL BIT(7) ++#define FEN_PCIED BIT(8) ++#define FEN_DIOE BIT(9) ++#define FEN_CPUEN BIT(10) ++#define FEN_DCORE BIT(11) ++#define FEN_ELDR BIT(12) ++#define FEN_DIO_RF BIT(13) ++#define FEN_HWPDN BIT(14) ++#define FEN_MREGEN BIT(15) ++ ++//2 APS_FSMCO ++#define PFM_LDALL BIT(0) ++#define PFM_ALDN BIT(1) ++#define PFM_LDKP BIT(2) ++#define PFM_WOWL BIT(3) ++#define EnPDN BIT(4) ++#define PDN_PL BIT(5) ++#define APFM_ONMAC BIT(8) ++#define APFM_OFF BIT(9) ++#define APFM_RSM BIT(10) ++#define AFSM_HSUS BIT(11) ++#define AFSM_PCIE BIT(12) ++#define APDM_MAC BIT(13) ++#define APDM_HOST BIT(14) ++#define APDM_HPDN BIT(15) ++#define RDY_MACON BIT(16) ++#define SUS_HOST BIT(17) ++#define ROP_ALD BIT(20) ++#define ROP_PWR BIT(21) ++#define ROP_SPS BIT(22) ++#define SOP_MRST BIT(25) ++#define SOP_FUSE BIT(26) ++#define SOP_ABG BIT(27) ++#define SOP_AMB BIT(28) ++#define SOP_RCK BIT(29) ++#define SOP_A8M BIT(30) ++#define XOP_BTCK BIT(31) ++ ++//2 SYS_CLKR ++#define ANAD16V_EN BIT(0) ++#define ANA8M BIT(1) ++#define MACSLP BIT(4) ++#define LOADER_CLK_EN BIT(5) ++ ++ ++//2 9346CR ++ ++#define BOOT_FROM_EEPROM BIT(4) ++#define EEPROM_EN BIT(5) ++ ++ ++//2 RF_CTRL ++#define RF_EN BIT(0) ++#define RF_RSTB BIT(1) ++#define RF_SDMRSTB BIT(2) ++ ++//2 LDOV12D_CTRL ++#define LDV12_EN BIT(0) ++#define LDV12_SDBY BIT(1) ++#define LPLDO_HSM BIT(2) ++#define LPLDO_LSM_DIS BIT(3) ++#define _LDV12_VADJ(x) (((x) & 0xF) << 4) ++ ++ ++//2 EFUSE_TEST (For RTL8723 partially) ++#define EF_TRPT BIT(7) ++#define EF_CELL_SEL (BIT(8)|BIT(9)) // 00: Wifi Efuse, 01: BT Efuse0, 10: BT Efuse1, 11: BT Efuse2 ++#define LDOE25_EN BIT(31) ++#define EFUSE_SEL(x) (((x) & 0x3) << 8) ++#define EFUSE_SEL_MASK 0x300 ++#define EFUSE_WIFI_SEL_0 0x0 ++#define EFUSE_BT_SEL_0 0x1 ++#define EFUSE_BT_SEL_1 0x2 ++#define EFUSE_BT_SEL_2 0x3 ++ ++ ++//2 8051FWDL ++//2 MCUFWDL ++#define MCUFWDL_EN BIT(0) ++#define MCUFWDL_RDY BIT(1) ++#define FWDL_ChkSum_rpt BIT(2) ++#define MACINI_RDY BIT(3) ++#define BBINI_RDY BIT(4) ++#define RFINI_RDY BIT(5) ++#define WINTINI_RDY BIT(6) ++#define RAM_DL_SEL BIT(7) ++#define ROM_DLEN BIT(19) ++#define CPRST BIT(23) ++ ++ ++ ++//2 REG_SYS_CFG ++#define XCLK_VLD BIT(0) ++#define ACLK_VLD BIT(1) ++#define UCLK_VLD BIT(2) ++#define PCLK_VLD BIT(3) ++#define PCIRSTB BIT(4) ++#define V15_VLD BIT(5) ++#define TRP_B15V_EN BIT(7) ++#define SIC_IDLE BIT(8) ++#define BD_MAC2 BIT(9) ++#define BD_MAC1 BIT(10) ++#define IC_MACPHY_MODE BIT(11) ++#define CHIP_VER (BIT(12)|BIT(13)|BIT(14)|BIT(15)) ++#define BT_FUNC BIT(16) ++#define VENDOR_ID BIT(19) ++#define PAD_HWPD_IDN BIT(22) ++#define TRP_VAUX_EN BIT(23) // RTL ID ++#define TRP_BT_EN BIT(24) ++#define BD_PKG_SEL BIT(25) ++#define BD_HCI_SEL BIT(26) ++#define TYPE_ID BIT(27) ++ ++#define CHIP_VER_RTL_MASK 0xF000 //Bit 12 ~ 15 ++#define CHIP_VER_RTL_SHIFT 12 ++ ++*/ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++/* ++ ++//2 Function Enable Registers ++//2 CR 0x0100-0x0103 ++ ++ ++#define HCI_TXDMA_EN BIT(0) ++#define HCI_RXDMA_EN BIT(1) ++#define TXDMA_EN BIT(2) ++#define RXDMA_EN BIT(3) ++#define PROTOCOL_EN BIT(4) ++#define SCHEDULE_EN BIT(5) ++#define MACTXEN BIT(6) ++#define MACRXEN BIT(7) ++#define ENSWBCN BIT(8) ++#define ENSEC BIT(9) ++#define CALTMR_EN BIT(10) // 32k CAL TMR enable ++ ++// Network type ++#define _NETTYPE(x) (((x) & 0x3) << 16) ++#define MASK_NETTYPE 0x30000 ++#define NT_NO_LINK 0x0 ++#define NT_LINK_AD_HOC 0x1 ++#define NT_LINK_AP 0x2 ++#define NT_AS_AP 0x3 ++ ++ ++//2 PBP - Page Size Register 0x0104 ++#define GET_RX_PAGE_SIZE(value) ((value) & 0xF) ++#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) ++#define _PSRX_MASK 0xF ++#define _PSTX_MASK 0xF0 ++#define _PSRX(x) (x) ++#define _PSTX(x) ((x) << 4) ++ ++#define PBP_64 0x0 ++#define PBP_128 0x1 ++#define PBP_256 0x2 ++#define PBP_512 0x3 ++#define PBP_1024 0x4 ++ ++ ++//2 TX/RXDMA 0x010C ++#define RXDMA_ARBBW_EN BIT(0) ++#define RXSHFT_EN BIT(1) ++#define RXDMA_AGG_EN BIT(2) ++#define QS_VO_QUEUE BIT(8) ++#define QS_VI_QUEUE BIT(9) ++#define QS_BE_QUEUE BIT(10) ++#define QS_BK_QUEUE BIT(11) ++#define QS_MANAGER_QUEUE BIT(12) ++#define QS_HIGH_QUEUE BIT(13) ++ ++#define HQSEL_VOQ BIT(0) ++#define HQSEL_VIQ BIT(1) ++#define HQSEL_BEQ BIT(2) ++#define HQSEL_BKQ BIT(3) ++#define HQSEL_MGTQ BIT(4) ++#define HQSEL_HIQ BIT(5) ++ ++// For normal driver, 0x10C ++#define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) ++#define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) ++#define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) ++#define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8 ) ++#define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6 ) ++#define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4 ) ++ ++#define QUEUE_LOW 1 ++#define QUEUE_NORMAL 2 ++#define QUEUE_HIGH 3 ++ ++ ++//2 REG_C2HEVT_CLEAR 0x01AF ++#define C2H_EVT_HOST_CLOSE 0x00 // Set by driver and notify FW that the driver has read the C2H command message ++#define C2H_EVT_FW_CLOSE 0xFF // Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. ++ ++ ++ ++//2 LLT_INIT 0x01E0 ++#define _LLT_NO_ACTIVE 0x0 ++#define _LLT_WRITE_ACCESS 0x1 ++#define _LLT_READ_ACCESS 0x2 ++ ++#define _LLT_INIT_DATA(x) ((x) & 0xFF) ++#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) ++#define _LLT_OP(x) (((x) & 0x3) << 30) ++#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) ++ ++*/ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++/* ++//2 TDECTL 0x0208 ++#define BLK_DESC_NUM_SHIFT 4 ++#define BLK_DESC_NUM_MASK 0xF ++ ++ ++//2 TXDMA_OFFSET_CHK 0x020C ++#define DROP_DATA_EN BIT(9) ++*/ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x028Bh RX DMA Configuration ++// ++//----------------------------------------------------- ++/* ++//2 REG_RXDMA_CONTROL, 0x0286h ++ ++// Write only. When this bit is set, RXDMA will decrease RX PKT counter by one. Before ++// this bit is polled, FW shall update RXFF_RD_PTR first. This register is write pulse and auto clear. ++#define RXPKT_RELEASE_POLL BIT(0) ++// Read only. When RXMA finishes on-going DMA operation, RXMDA will report idle state in ++// this bit. FW can start releasing packets after RXDMA entering idle mode. ++#define RXDMA_IDLE BIT(1) ++// When this bit is set, RXDMA will enter this mode after on-going RXDMA packet to host ++// completed, and stop DMA packet to host. RXDMA will then report Default: 0; ++#define RW_RELEASE_EN BIT(2) ++*/ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++/* ++//2 FWHW_TXQ_CTRL 0x0420 ++#define EN_AMPDU_RTY_NEW BIT(7) ++ ++ ++//2 REG_LIFECTRL_CTRL 0x0426 ++#define HAL92C_EN_PKT_LIFE_TIME_BK BIT3 ++#define HAL92C_EN_PKT_LIFE_TIME_BE BIT2 ++#define HAL92C_EN_PKT_LIFE_TIME_VI BIT1 ++#define HAL92C_EN_PKT_LIFE_TIME_VO BIT0 ++ ++#define HAL92C_MSDU_LIFE_TIME_UNIT 128 // in us, said by Tim. ++ ++ ++//2 SPEC SIFS 0x0428 ++#define _SPEC_SIFS_CCK(x) ((x) & 0xFF) ++#define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) ++ ++//2 RL 0x042A ++#define RETRY_LIMIT_SHORT_SHIFT 8 ++#define RETRY_LIMIT_LONG_SHIFT 0 ++ ++#define _LRL(x) ((x) & 0x3F) ++#define _SRL(x) (((x) & 0x3F) << 8) ++*/ ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++/* ++//2 EDCA setting 0x050C ++#define AC_PARAM_TXOP_LIMIT_OFFSET 16 ++#define AC_PARAM_ECW_MAX_OFFSET 12 ++#define AC_PARAM_ECW_MIN_OFFSET 8 ++#define AC_PARAM_AIFS_OFFSET 0 ++ ++ ++//2 BCN_CTRL 0x0550 ++#define EN_TXBCN_RPT BIT(2) ++#define EN_BCN_FUNCTION BIT(3) ++ ++//2 TxPause 0x0522 ++#define STOP_BCNQ BIT(6) ++*/ ++ ++ ++//2 ACMHWCTRL 0x05C0 ++#define AcmHw_HwEn_8723B BIT(0) ++#define AcmHw_VoqEn_8723B BIT(1) ++#define AcmHw_ViqEn_8723B BIT(2) ++#define AcmHw_BeqEn_8723B BIT(3) ++#define AcmHw_VoqStatus_8723B BIT(5) ++#define AcmHw_ViqStatus_8723B BIT(6) ++#define AcmHw_BeqStatus_8723B BIT(7) ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++/* ++ ++//2 TCR 0x0604 ++#define DIS_GCLK BIT(1) ++#define PAD_SEL BIT(2) ++#define PWR_ST BIT(6) ++#define PWRBIT_OW_EN BIT(7) ++#define ACRC BIT(8) ++#define CFENDFORM BIT(9) ++#define ICV BIT(10) ++*/ ++ ++//---------------------------------------------------------------------------- ++// 8195 (RCR) Receive Configuration Register (Offset 0x608, 32 bits) ++//---------------------------------------------------------------------------- ++/* ++#define RCR_APPFCS BIT31 // WMAC append FCS after pauload ++#define RCR_APP_MIC BIT30 // MACRX will retain the MIC at the bottom of the packet. ++#define RCR_APP_ICV BIT29 // MACRX will retain the ICV at the bottom of the packet. ++#define RCR_APP_PHYST_RXFF BIT28 // HY Status is appended before RX packet in RXFF ++#define RCR_APP_BA_SSN BIT27 // SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. ++#define RCR_RSVD_BIT26 BIT26 // Reserved ++*/ ++#define RCR_TCPOFLD_EN BIT25 // Enable TCP checksum offload ++ ++#endif // #ifndef __INC_HAL8723BREG_H +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_bb.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_bb.c +new file mode 100644 +index 0000000..a40f2cb +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_bb.c +@@ -0,0 +1,635 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8723B_SUPPORT == 1) ++static BOOLEAN ++CheckPositive( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2, ++ IN const u4Byte Condition3, ++ IN const u4Byte Condition4 ++) ++{ ++ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ ++ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ ++ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ ++ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ ++ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ ++ ++ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; ++ u4Byte driver1 = pDM_Odm->CutVersion << 24 | ++ (pDM_Odm->SupportInterface & 0xF0) << 16 | ++ pDM_Odm->SupportPlatform << 16 | ++ pDM_Odm->PackageType << 12 | ++ (pDM_Odm->SupportInterface & 0x0F) << 8 | ++ _BoardType; ++ ++ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | ++ (pDM_Odm->TypeGPA & 0xFF) << 8 | ++ (pDM_Odm->TypeALNA & 0xFF) << 16 | ++ (pDM_Odm->TypeAPA & 0xFF) << 24; ++ ++u4Byte driver3 = 0; ++ ++ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | ++ (pDM_Odm->TypeGPA & 0xFF00) | ++ (pDM_Odm->TypeALNA & 0xFF00) << 8 | ++ (pDM_Odm->TypeAPA & 0xFF00) << 16; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); ++ ++ ++ /*============== Value Defined Check ===============*/ ++ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ ++ ++ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) ++ return FALSE; ++ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) ++ return FALSE; ++ ++ /*=============== Bit Defined Check ================*/ ++ /* We don't care [31:28] */ ++ ++ cond1 &= 0x00FF0FFF; ++ driver1 &= 0x00FF0FFF; ++ ++ if ((cond1 & driver1) == cond1) { ++ u4Byte bitMask = 0; ++ ++ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ ++ return TRUE; ++ ++ if ((cond1 & BIT0) != 0) /*GLNA*/ ++ bitMask |= 0x000000FF; ++ if ((cond1 & BIT1) != 0) /*GPA*/ ++ bitMask |= 0x0000FF00; ++ if ((cond1 & BIT2) != 0) /*ALNA*/ ++ bitMask |= 0x00FF0000; ++ if ((cond1 & BIT3) != 0) /*APA*/ ++ bitMask |= 0xFF000000; ++ ++ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ ++ return TRUE; ++ else ++ return FALSE; ++ } else ++ return FALSE; ++} ++static BOOLEAN ++CheckNegative( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2 ++) ++{ ++ return TRUE; ++} ++ ++/****************************************************************************** ++* AGC_TAB.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8723B_AGC_TAB[] = { ++ 0xC78, 0xFD000001, ++ 0xC78, 0xFC010001, ++ 0xC78, 0xFB020001, ++ 0xC78, 0xFA030001, ++ 0xC78, 0xF9040001, ++ 0xC78, 0xF8050001, ++ 0xC78, 0xF7060001, ++ 0xC78, 0xF6070001, ++ 0xC78, 0xF5080001, ++ 0xC78, 0xF4090001, ++ 0xC78, 0xF30A0001, ++ 0xC78, 0xF20B0001, ++ 0xC78, 0xF10C0001, ++ 0xC78, 0xF00D0001, ++ 0xC78, 0xEF0E0001, ++ 0xC78, 0xEE0F0001, ++ 0xC78, 0xED100001, ++ 0xC78, 0xEC110001, ++ 0xC78, 0xEB120001, ++ 0xC78, 0xEA130001, ++ 0xC78, 0xE9140001, ++ 0xC78, 0xE8150001, ++ 0xC78, 0xE7160001, ++ 0xC78, 0xE6170001, ++ 0xC78, 0xE5180001, ++ 0xC78, 0xE4190001, ++ 0xC78, 0xE31A0001, ++ 0xC78, 0xA51B0001, ++ 0xC78, 0xA41C0001, ++ 0xC78, 0xA31D0001, ++ 0xC78, 0x671E0001, ++ 0xC78, 0x661F0001, ++ 0xC78, 0x65200001, ++ 0xC78, 0x64210001, ++ 0xC78, 0x63220001, ++ 0xC78, 0x4A230001, ++ 0xC78, 0x49240001, ++ 0xC78, 0x48250001, ++ 0xC78, 0x47260001, ++ 0xC78, 0x46270001, ++ 0xC78, 0x45280001, ++ 0xC78, 0x44290001, ++ 0xC78, 0x432A0001, ++ 0xC78, 0x422B0001, ++ 0xC78, 0x292C0001, ++ 0xC78, 0x282D0001, ++ 0xC78, 0x272E0001, ++ 0xC78, 0x262F0001, ++ 0xC78, 0x0A300001, ++ 0xC78, 0x09310001, ++ 0xC78, 0x08320001, ++ 0xC78, 0x07330001, ++ 0xC78, 0x06340001, ++ 0xC78, 0x05350001, ++ 0xC78, 0x04360001, ++ 0xC78, 0x03370001, ++ 0xC78, 0x02380001, ++ 0xC78, 0x01390001, ++ 0xC78, 0x013A0001, ++ 0xC78, 0x013B0001, ++ 0xC78, 0x013C0001, ++ 0xC78, 0x013D0001, ++ 0xC78, 0x013E0001, ++ 0xC78, 0x013F0001, ++ 0xC78, 0xFC400001, ++ 0xC78, 0xFB410001, ++ 0xC78, 0xFA420001, ++ 0xC78, 0xF9430001, ++ 0xC78, 0xF8440001, ++ 0xC78, 0xF7450001, ++ 0xC78, 0xF6460001, ++ 0xC78, 0xF5470001, ++ 0xC78, 0xF4480001, ++ 0xC78, 0xF3490001, ++ 0xC78, 0xF24A0001, ++ 0xC78, 0xF14B0001, ++ 0xC78, 0xF04C0001, ++ 0xC78, 0xEF4D0001, ++ 0xC78, 0xEE4E0001, ++ 0xC78, 0xED4F0001, ++ 0xC78, 0xEC500001, ++ 0xC78, 0xEB510001, ++ 0xC78, 0xEA520001, ++ 0xC78, 0xE9530001, ++ 0xC78, 0xE8540001, ++ 0xC78, 0xE7550001, ++ 0xC78, 0xE6560001, ++ 0xC78, 0xE5570001, ++ 0xC78, 0xE4580001, ++ 0xC78, 0xE3590001, ++ 0xC78, 0xA65A0001, ++ 0xC78, 0xA55B0001, ++ 0xC78, 0xA45C0001, ++ 0xC78, 0xA35D0001, ++ 0xC78, 0x675E0001, ++ 0xC78, 0x665F0001, ++ 0xC78, 0x65600001, ++ 0xC78, 0x64610001, ++ 0xC78, 0x63620001, ++ 0xC78, 0x62630001, ++ 0xC78, 0x61640001, ++ 0xC78, 0x48650001, ++ 0xC78, 0x47660001, ++ 0xC78, 0x46670001, ++ 0xC78, 0x45680001, ++ 0xC78, 0x44690001, ++ 0xC78, 0x436A0001, ++ 0xC78, 0x426B0001, ++ 0xC78, 0x286C0001, ++ 0xC78, 0x276D0001, ++ 0xC78, 0x266E0001, ++ 0xC78, 0x256F0001, ++ 0xC78, 0x24700001, ++ 0xC78, 0x09710001, ++ 0xC78, 0x08720001, ++ 0xC78, 0x07730001, ++ 0xC78, 0x06740001, ++ 0xC78, 0x05750001, ++ 0xC78, 0x04760001, ++ 0xC78, 0x03770001, ++ 0xC78, 0x02780001, ++ 0xC78, 0x01790001, ++ 0xC78, 0x017A0001, ++ 0xC78, 0x017B0001, ++ 0xC78, 0x017C0001, ++ 0xC78, 0x017D0001, ++ 0xC78, 0x017E0001, ++ 0xC78, 0x017F0001, ++ 0xC50, 0x69553422, ++ 0xC50, 0x69553420, ++ 0x824, 0x00390204, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8723B_AGC_TAB( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8723B_AGC_TAB)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8723B_AGC_TAB; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_AGC_TAB\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } ++ else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8723B_AGC_TAB(void) ++{ ++ return 24; ++} ++ ++/****************************************************************************** ++* PHY_REG.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8723B_PHY_REG[] = { ++ 0x800, 0x80040000, ++ 0x804, 0x00000003, ++ 0x808, 0x0000FC00, ++ 0x80C, 0x0000000A, ++ 0x810, 0x10001331, ++ 0x814, 0x020C3D10, ++ 0x818, 0x02200385, ++ 0x81C, 0x00000000, ++ 0x820, 0x01000100, ++ 0x824, 0x00190204, ++ 0x828, 0x00000000, ++ 0x82C, 0x00000000, ++ 0x830, 0x00000000, ++ 0x834, 0x00000000, ++ 0x838, 0x00000000, ++ 0x83C, 0x00000000, ++ 0x840, 0x00010000, ++ 0x844, 0x00000000, ++ 0x848, 0x00000000, ++ 0x84C, 0x00000000, ++ 0x850, 0x00000000, ++ 0x854, 0x00000000, ++ 0x858, 0x569A11A9, ++ 0x85C, 0x01000014, ++ 0x860, 0x66F60110, ++ 0x864, 0x061F0649, ++ 0x868, 0x00000000, ++ 0x86C, 0x27272700, ++ 0x870, 0x07000760, ++ 0x874, 0x25004000, ++ 0x878, 0x00000808, ++ 0x87C, 0x00000000, ++ 0x880, 0xB0000C1C, ++ 0x884, 0x00000001, ++ 0x888, 0x00000000, ++ 0x88C, 0xCCC000C0, ++ 0x890, 0x00000800, ++ 0x894, 0xFFFFFFFE, ++ 0x898, 0x40302010, ++ 0x89C, 0x00706050, ++ 0x900, 0x00000000, ++ 0x904, 0x00000023, ++ 0x908, 0x00000000, ++ 0x90C, 0x81121111, ++ 0x910, 0x00000002, ++ 0x914, 0x00000201, ++ 0xA00, 0x00D047C8, ++ 0xA04, 0x80FF800C, ++ 0xA08, 0x8C838300, ++ 0xA0C, 0x2E7F120F, ++ 0xA10, 0x9500BB78, ++ 0xA14, 0x1114D028, ++ 0xA18, 0x00881117, ++ 0xA1C, 0x89140F00, ++ 0xA20, 0x1A1B0000, ++ 0xA24, 0x090E1317, ++ 0xA28, 0x00000204, ++ 0xA2C, 0x00D30000, ++ 0xA70, 0x101FBF00, ++ 0xA74, 0x00000007, ++ 0xA78, 0x00000900, ++ 0xA7C, 0x225B0606, ++ 0xA80, 0x21806490, ++ 0xB2C, 0x00000000, ++ 0xC00, 0x48071D40, ++ 0xC04, 0x03A05611, ++ 0xC08, 0x000000E4, ++ 0xC0C, 0x6C6C6C6C, ++ 0xC10, 0x08800000, ++ 0xC14, 0x40000100, ++ 0xC18, 0x08800000, ++ 0xC1C, 0x40000100, ++ 0xC20, 0x00000000, ++ 0xC24, 0x00000000, ++ 0xC28, 0x00000000, ++ 0xC2C, 0x00000000, ++ 0xC30, 0x69E9AC44, ++ 0xC34, 0x469652AF, ++ 0xC38, 0x49795994, ++ 0xC3C, 0x0A97971C, ++ 0xC40, 0x1F7C403F, ++ 0xC44, 0x000100B7, ++ 0xC48, 0xEC020107, ++ 0xC4C, 0x007F037F, ++ 0xC50, 0x69553420, ++ 0xC54, 0x43BC0094, ++ 0xC58, 0x00013147, ++ 0xC5C, 0x00250492, ++ 0xC60, 0x00000000, ++ 0xC64, 0x7112848B, ++ 0xC68, 0x47C00BFF, ++ 0xC6C, 0x00000036, ++ 0xC70, 0x2C7F000D, ++ 0xC74, 0x020610DB, ++ 0xC78, 0x0000001F, ++ 0xC7C, 0x00B91612, ++ 0xC80, 0x390000E4, ++ 0xC84, 0x21F60000, ++ 0xC88, 0x40000100, ++ 0xC8C, 0x20200000, ++ 0xC90, 0x00020E1A, ++ 0xC94, 0x00000000, ++ 0xC98, 0x00020E1A, ++ 0xC9C, 0x00007F7F, ++ 0xCA0, 0x00000000, ++ 0xCA4, 0x000300A0, ++ 0xCA8, 0x00000000, ++ 0xCAC, 0x00000000, ++ 0xCB0, 0x00000000, ++ 0xCB4, 0x00000000, ++ 0xCB8, 0x00000000, ++ 0xCBC, 0x28000000, ++ 0xCC0, 0x00000000, ++ 0xCC4, 0x00000000, ++ 0xCC8, 0x00000000, ++ 0xCCC, 0x00000000, ++ 0xCD0, 0x00000000, ++ 0xCD4, 0x00000000, ++ 0xCD8, 0x64B22427, ++ 0xCDC, 0x00766932, ++ 0xCE0, 0x00222222, ++ 0xCE4, 0x00000000, ++ 0xCE8, 0x37644302, ++ 0xCEC, 0x2F97D40C, ++ 0xD00, 0x00000740, ++ 0xD04, 0x40020401, ++ 0xD08, 0x0000907F, ++ 0xD0C, 0x20010201, ++ 0xD10, 0xA0633333, ++ 0xD14, 0x3333BC53, ++ 0xD18, 0x7A8F5B6F, ++ 0xD2C, 0xCC979975, ++ 0xD30, 0x00000000, ++ 0xD34, 0x80608000, ++ 0xD38, 0x00000000, ++ 0xD3C, 0x00127353, ++ 0xD40, 0x00000000, ++ 0xD44, 0x00000000, ++ 0xD48, 0x00000000, ++ 0xD4C, 0x00000000, ++ 0xD50, 0x6437140A, ++ 0xD54, 0x00000000, ++ 0xD58, 0x00000282, ++ 0xD5C, 0x30032064, ++ 0xD60, 0x4653DE68, ++ 0xD64, 0x04518A3C, ++ 0xD68, 0x00002101, ++ 0xD6C, 0x2A201C16, ++ 0xD70, 0x1812362E, ++ 0xD74, 0x322C2220, ++ 0xD78, 0x000E3C24, ++ 0xE00, 0x2D2D2D2D, ++ 0xE04, 0x2D2D2D2D, ++ 0xE08, 0x0390272D, ++ 0xE10, 0x2D2D2D2D, ++ 0xE14, 0x2D2D2D2D, ++ 0xE18, 0x2D2D2D2D, ++ 0xE1C, 0x2D2D2D2D, ++ 0xE28, 0x00000000, ++ 0xE30, 0x1000DC1F, ++ 0xE34, 0x10008C1F, ++ 0xE38, 0x02140102, ++ 0xE3C, 0x681604C2, ++ 0xE40, 0x01007C00, ++ 0xE44, 0x01004800, ++ 0xE48, 0xFB000000, ++ 0xE4C, 0x000028D1, ++ 0xE50, 0x1000DC1F, ++ 0xE54, 0x10008C1F, ++ 0xE58, 0x02140102, ++ 0xE5C, 0x28160D05, ++ 0xE60, 0x00000048, ++ 0xE68, 0x001B2556, ++ 0xE6C, 0x00C00096, ++ 0xE70, 0x00C00096, ++ 0xE74, 0x01000056, ++ 0xE78, 0x01000014, ++ 0xE7C, 0x01000056, ++ 0xE80, 0x01000014, ++ 0xE84, 0x00C00096, ++ 0xE88, 0x01000056, ++ 0xE8C, 0x00C00096, ++ 0xED0, 0x00C00096, ++ 0xED4, 0x00C00096, ++ 0xED8, 0x00C00096, ++ 0xEDC, 0x000000D6, ++ 0xEE0, 0x000000D6, ++ 0xEEC, 0x01C00016, ++ 0xF14, 0x00000003, ++ 0xF4C, 0x00000000, ++ 0xF00, 0x00000300, ++ 0x820, 0x01000100, ++ 0x800, 0x83040000, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8723B_PHY_REG( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8723B_PHY_REG)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8723B_PHY_REG; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_PHY_REG\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } ++ else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8723B_PHY_REG(void) ++{ ++ return 24; ++} ++ ++/****************************************************************************** ++* PHY_REG_PG.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8723B_PHY_REG_PG[] = { ++ 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003800, ++ 0, 0, 0, 0x0000086c, 0xffffff00, 0x32343600, ++ 0, 0, 0, 0x00000e00, 0xffffffff, 0x40424444, ++ 0, 0, 0, 0x00000e04, 0xffffffff, 0x28323638, ++ 0, 0, 0, 0x00000e10, 0xffffffff, 0x38404244, ++ 0, 0, 0, 0x00000e14, 0xffffffff, 0x26303436 ++}; ++ ++void ++ODM_ReadAndConfig_MP_8723B_PHY_REG_PG( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u4Byte ArrayLen = sizeof(Array_MP_8723B_PHY_REG_PG)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8723B_PHY_REG_PG; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PlatformZeroMemory(pHalData->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); ++ pHalData->nLinesReadPwrByRate = ArrayLen/6; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_PHY_REG_PG\n")); ++ ++ pDM_Odm->PhyRegPgVersion = 1; ++ pDM_Odm->PhyRegPgValueType = PHY_REG_PG_EXACT_VALUE; ++ ++ for (i = 0; i < ArrayLen; i += 6) { ++ u4Byte v1 = Array[i]; ++ u4Byte v2 = Array[i+1]; ++ u4Byte v3 = Array[i+2]; ++ u4Byte v4 = Array[i+3]; ++ u4Byte v5 = Array[i+4]; ++ u4Byte v6 = Array[i+5]; ++ ++ odm_ConfigBB_PHY_REG_PG_8723B(pDM_Odm, v1, v2, v3, v4, v5, v6); ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ rsprintf(pHalData->BufOfLinesPwrByRate[i/6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", ++ (v1 == 0?"2.4G":" 5G"), (v2 == 0?"A":"B"), (v3 == 0?"1Tx":"2Tx"), v4, v5, v6); ++#endif ++ } ++} ++ ++ ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_bb.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_bb.h +new file mode 100644 +index 0000000..af17008 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_bb.h +@@ -0,0 +1,59 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#if (RTL8723B_SUPPORT == 1) ++#ifndef __INC_MP_BB_HW_IMG_8723B_H ++#define __INC_MP_BB_HW_IMG_8723B_H ++ ++ ++/****************************************************************************** ++* AGC_TAB.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8723B_AGC_TAB(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8723B_AGC_TAB(void); ++ ++/****************************************************************************** ++* PHY_REG.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8723B_PHY_REG(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8723B_PHY_REG(void); ++ ++/****************************************************************************** ++* PHY_REG_PG.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8723B_PHY_REG_PG(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8723B_PHY_REG_PG(void); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_fw.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_fw.c +new file mode 100644 +index 0000000..d9148da +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_fw.c +@@ -0,0 +1,5130 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.16*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8723B_SUPPORT == 1) ++#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) ++ ++ ++u1Byte Array_MP_8723B_FW_AP[] = { ++0x01, 0x53, 0x20, 0x00, 0x27, 0x00, 0x00, 0x00, 0x10, 0x30, 0x15, 0x16, 0xEC, 0x56, 0x00, 0x00, ++0x4D, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x45, 0xDB, 0x02, 0x7F, 0xE9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x7E, 0x85, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x80, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x80, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x81, 0x05, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x82, 0x30, 0x1D, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x0D, 0xF0, 0x0F, ++0x00, 0x00, 0x00, 0x00, 0x0D, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x0D, 0xF0, 0x0F, 0x00, 0x00, ++0x00, 0x00, 0x10, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x10, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, ++0xF5, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0xF0, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x10, 0xF0, 0x3F, 0x00, ++0x00, 0x00, 0x00, 0x32, 0x32, 0x24, 0x32, 0x32, 0x43, 0x4B, 0x43, 0x4B, 0x43, 0x4B, 0x59, 0x32, ++0x32, 0x43, 0x4B, 0x43, 0x4B, 0x59, 0x5A, 0x52, 0x53, 0x54, 0x55, 0x53, 0x54, 0x55, 0x56, 0x57, ++0x58, 0x59, 0x5A, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x00, 0x00, 0x00, 0x01, 0x00, ++0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x03, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x03, 0x01, ++0x01, 0x01, 0x01, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x01, 0x02, 0x03, 0x04, 0x05, ++0x06, 0x07, 0x08, 0x04, 0x02, 0x04, 0x02, 0x03, 0x0C, 0x0D, 0x0C, 0x19, 0x06, 0x04, 0x02, 0x00, ++0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x42, 0x94, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, ++0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, ++0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, ++0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, ++0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, ++0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, ++0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, ++0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, ++0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, ++0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, ++0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, ++0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, ++0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, ++0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, ++0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, ++0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, 0x30, 0x90, 0x46, 0x7D, 0x74, 0x01, 0x93, ++0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, ++0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, ++0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, ++0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, ++0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, ++0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, ++0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, ++0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, ++0x04, 0x90, 0x46, 0x7D, 0x93, 0xF6, 0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, ++0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x42, 0xDD, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, ++0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, ++0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, ++0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, ++0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, ++0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, ++0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x42, 0xDC, 0x8F, 0xF0, ++0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, ++0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x30, 0x50, 0x2E, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, ++0x60, 0x25, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x23, 0x0E, 0x30, ++0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x12, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x13, 0x54, 0xEC, ++0x4E, 0xF6, 0xD2, 0xAF, 0x02, 0x42, 0xDD, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, 0xC2, 0xAF, ++0x56, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x4F, 0xFF, 0x22, 0xEF, 0x2B, 0xFF, 0xEE, 0x3A, 0xFE, 0xED, ++0x39, 0xFD, 0xEC, 0x38, 0xFC, 0x22, 0xC3, 0xEF, 0x9B, 0xFF, 0xEE, 0x9A, 0xFE, 0xED, 0x99, 0xFD, ++0xEC, 0x98, 0xFC, 0x22, 0xEF, 0x5B, 0xFF, 0xEE, 0x5A, 0xFE, 0xED, 0x59, 0xFD, 0xEC, 0x58, 0xFC, ++0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, 0xFC, 0x22, 0xEB, 0x9F, ++0xF5, 0xF0, 0xEA, 0x9E, 0x42, 0xF0, 0xE9, 0x9D, 0x42, 0xF0, 0xE8, 0x9C, 0x45, 0xF0, 0x22, 0xE0, ++0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xE0, 0xF8, 0xA3, 0xE0, 0xF9, ++0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0x22, 0xA4, 0x25, 0x82, 0xF5, 0x82, 0xE5, 0xF0, 0x35, 0x83, ++0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xF9, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, ++0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, ++0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, ++0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0x02, 0x46, 0x19, 0x02, 0x43, ++0x6D, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, 0x80, 0x01, 0xF2, 0x08, 0xDF, ++0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, 0x33, 0xC4, 0x54, ++0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, 0xDF, 0xE4, 0x80, ++0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x46, 0x5E, 0xE4, 0x7E, 0x01, 0x93, ++0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, 0x93, 0xA3, 0x60, ++0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, 0xE4, 0x93, 0xA3, 0xFA, 0xE4, ++0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xF0, 0xA3, ++0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0xBE, 0x41, 0xA3, ++0x25, 0x00, 0x41, 0xA3, 0x26, 0x00, 0x41, 0xA3, 0x3B, 0x00, 0x41, 0xA3, 0x3D, 0x00, 0x44, 0xA2, ++0xE9, 0x41, 0x4E, 0x59, 0x00, 0x44, 0xA2, 0xE5, 0x61, 0x6E, 0x79, 0x00, 0x00, 0x6F, 0xF1, 0x77, ++0xED, 0x74, 0xD0, 0x7F, 0x02, 0xF1, 0xA9, 0xEF, 0x44, 0x01, 0xFD, 0x7F, 0x02, 0xD1, 0x99, 0x7F, ++0x02, 0xF1, 0xA9, 0xEF, 0x54, 0xFE, 0xFD, 0x7F, 0x02, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x8F, 0x82, 0x75, 0x83, 0x00, 0xED, 0xF1, 0xFD, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0x04, 0xEF, 0xF0, 0x90, 0xA3, 0x06, 0xEB, 0xF0, 0xED, 0x60, ++0x02, 0xE1, 0x57, 0x90, 0x07, 0x6E, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x07, 0x65, 0xE0, 0x54, 0xE7, ++0xF0, 0x90, 0xA3, 0x06, 0xE0, 0x70, 0x39, 0xF1, 0xC5, 0x90, 0xA3, 0x04, 0xE0, 0x70, 0x2B, 0x12, ++0x96, 0x99, 0x70, 0x12, 0x12, 0x37, 0x4E, 0xE4, 0xFF, 0x74, 0x02, 0xF1, 0xD1, 0x7F, 0x64, 0xF1, ++0xA9, 0xEF, 0x54, 0xFE, 0x80, 0x0F, 0x12, 0x37, 0x4E, 0xE4, 0xFE, 0x74, 0x80, 0xFF, 0xE4, 0xF1, ++0xD2, 0x7F, 0x64, 0xF1, 0xE0, 0xFD, 0x7F, 0x64, 0xD1, 0x99, 0x7F, 0x4E, 0xF1, 0xF7, 0xE1, 0x9B, ++0xF1, 0xC5, 0x90, 0xA3, 0x04, 0xE0, 0x70, 0x05, 0xF1, 0xE6, 0xFF, 0xF1, 0xD1, 0x12, 0x96, 0x90, ++0xF1, 0xEF, 0xF1, 0xE0, 0xFD, 0x7F, 0x4F, 0xD1, 0x99, 0x7F, 0x30, 0xF1, 0xE8, 0x74, 0x66, 0xFF, ++0xEC, 0x12, 0x78, 0xA7, 0x7F, 0x30, 0x7E, 0x09, 0x12, 0x38, 0x45, 0x7F, 0x2C, 0x7E, 0x09, 0x12, ++0x37, 0x4E, 0xEF, 0x54, 0xFC, 0xFF, 0xEF, 0x44, 0x01, 0xFF, 0xEC, 0x12, 0x78, 0xA7, 0x7F, 0x2C, ++0x7E, 0x09, 0x12, 0x38, 0x45, 0x80, 0x4D, 0x90, 0x07, 0x6E, 0xE0, 0x54, 0xF7, 0xF0, 0x90, 0x07, ++0x65, 0xE0, 0x44, 0x18, 0xF0, 0x90, 0xA3, 0x04, 0xE0, 0x70, 0x2D, 0x90, 0xA3, 0x06, 0xE0, 0x60, ++0x07, 0xF1, 0xC5, 0xF1, 0xE6, 0xFF, 0x80, 0x1E, 0x7F, 0x67, 0xF1, 0xA9, 0xEF, 0x54, 0xDF, 0xF1, ++0xCC, 0x12, 0x96, 0x99, 0x70, 0x0B, 0x12, 0x37, 0x4E, 0xE4, 0x74, 0x80, 0xFF, 0x74, 0x02, 0x80, ++0x05, 0x12, 0x37, 0x4E, 0xE4, 0xFF, 0xF1, 0xD1, 0x12, 0x96, 0x90, 0xF1, 0xEF, 0x12, 0x77, 0xCB, ++0x7F, 0x4F, 0xD1, 0x99, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x8F, 0x82, 0x75, 0x83, 0x00, 0xE0, 0x90, 0xA3, 0x33, 0xF1, 0xFD, 0x90, 0xA3, 0x33, 0xE0, 0xFF, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0x67, 0xF1, 0xA9, 0xEF, 0x44, 0x20, 0xFD, 0x7F, 0x67, 0xC1, ++0x99, 0xFE, 0xEC, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x48, 0x7E, 0x09, 0x02, 0x38, 0x45, ++0xF1, 0xA9, 0xEF, 0x44, 0x01, 0x22, 0x7F, 0x48, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0xE4, 0x22, 0xFD, ++0x7F, 0x4E, 0xD1, 0x99, 0x7F, 0x4F, 0x22, 0xF1, 0xA9, 0xEF, 0x44, 0x80, 0x22, 0xF0, 0x7F, 0x10, ++0x7E, 0x00, 0x02, 0x3E, 0x50, 0xF0, 0xE4, 0x90, 0xA2, 0xF1, 0xF0, 0x90, 0xA1, 0x44, 0xE0, 0x90, ++0xA2, 0xF2, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0xA2, 0xED, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA2, 0xF1, 0xE0, 0xF5, 0x3B, 0xA3, ++0xE0, 0xF5, 0x3C, 0x12, 0x36, 0x3E, 0x90, 0xA2, 0xED, 0x12, 0x96, 0x87, 0xA3, 0xA3, 0xA3, 0x74, ++0x05, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xF5, 0x27, 0x90, 0xA0, 0xE6, 0xE0, 0x70, 0x02, ++0x21, 0x07, 0xB1, 0x58, 0x60, 0x02, 0x21, 0x07, 0xD1, 0x00, 0x12, 0x45, 0x61, 0xC0, 0x04, 0xC0, ++0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0xD1, 0x19, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xD0, ++0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x61, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0xA3, 0xD1, 0x19, 0x78, 0x18, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, ++0xD0, 0x00, 0x12, 0x95, 0xE6, 0x44, 0x80, 0xF0, 0x12, 0x96, 0xB2, 0x60, 0x22, 0x24, 0xFE, 0x60, ++0x03, 0x04, 0x70, 0x1E, 0x90, 0xA0, 0xED, 0xE0, 0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0xA0, ++0xEF, 0xE0, 0x60, 0x0E, 0xEF, 0x70, 0x08, 0x90, 0xA0, 0xEC, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, ++0x27, 0x01, 0xE5, 0x27, 0x60, 0x41, 0x12, 0x96, 0xC2, 0x90, 0xA0, 0xEF, 0xE0, 0x60, 0x04, 0x64, ++0x01, 0x70, 0x13, 0xE4, 0x90, 0xA2, 0xF1, 0xF0, 0x90, 0xA0, 0xEF, 0xE0, 0x91, 0x2C, 0x11, 0x0F, ++0x90, 0xA0, 0xEF, 0xE0, 0x80, 0x12, 0xE4, 0x90, 0xA2, 0xF1, 0x91, 0x21, 0x11, 0x0F, 0x90, 0xA0, ++0xEF, 0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0x91, 0x2C, 0x90, 0xA0, 0xFF, 0xF0, 0x90, 0xA0, ++0xE9, 0xE0, 0x20, 0xE2, 0x02, 0x31, 0x08, 0x22, 0x7D, 0x01, 0x7F, 0x04, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0x3A, 0xED, 0xF0, 0x90, 0xA0, 0xE1, 0xE0, 0xFE, 0xC4, 0x13, 0x13, ++0x54, 0x03, 0x30, 0xE0, 0x02, 0x41, 0x4F, 0xEE, 0x12, 0x57, 0x86, 0x30, 0xE0, 0x02, 0x41, 0x4F, ++0x90, 0xA0, 0xE9, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0x41, 0x4F, 0xEF, 0x70, 0x02, 0x21, 0xC9, 0x24, ++0xFE, 0x70, 0x02, 0x41, 0x02, 0x24, 0xFE, 0x60, 0x48, 0x24, 0xFC, 0x70, 0x02, 0x41, 0x3D, 0x24, ++0xFC, 0x60, 0x02, 0x41, 0x4F, 0xEE, 0xB4, 0x0E, 0x02, 0x51, 0x8D, 0x90, 0xA0, 0xE9, 0xE0, 0x70, ++0x04, 0x7F, 0x01, 0x51, 0xC9, 0x90, 0xA0, 0xE9, 0xE0, 0xB4, 0x06, 0x02, 0x51, 0xA8, 0x90, 0xA0, ++0xE9, 0xE0, 0xB4, 0x04, 0x0E, 0x90, 0xA3, 0x3A, 0xE0, 0xFF, 0x60, 0x04, 0xB1, 0x2A, 0x80, 0x03, ++0x12, 0x79, 0xA1, 0x90, 0xA0, 0xE9, 0xE0, 0x64, 0x08, 0x60, 0x02, 0x41, 0x4F, 0x71, 0xD6, 0x41, ++0x4F, 0x90, 0xA0, 0xE9, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x51, 0xC9, 0x90, 0xA0, 0xE9, 0xE0, 0xB4, ++0x06, 0x02, 0x51, 0xA8, 0x90, 0xA0, 0xE9, 0xE0, 0xB4, 0x0E, 0x07, 0x51, 0x54, 0xBF, 0x01, 0x02, ++0x51, 0x8D, 0x90, 0xA0, 0xE9, 0xE0, 0x64, 0x0C, 0x60, 0x02, 0x41, 0x4F, 0x51, 0x54, 0xEF, 0x64, ++0x01, 0x60, 0x02, 0x41, 0x4F, 0x51, 0xDF, 0x41, 0x4F, 0x90, 0xA0, 0xE9, 0xE0, 0xB4, 0x0E, 0x07, ++0x51, 0x54, 0xBF, 0x01, 0x02, 0x51, 0x8D, 0x90, 0xA0, 0xE9, 0xE0, 0xB4, 0x06, 0x02, 0x51, 0xA8, ++0x90, 0xA0, 0xE9, 0xE0, 0xB4, 0x0C, 0x07, 0x51, 0x54, 0xBF, 0x01, 0x02, 0x51, 0xDF, 0x90, 0xA0, ++0xE9, 0xE0, 0x64, 0x04, 0x70, 0x59, 0x12, 0x94, 0x26, 0xEF, 0x64, 0x01, 0x70, 0x51, 0x91, 0x33, ++0x80, 0x4D, 0x90, 0xA0, 0xE9, 0xE0, 0xB4, 0x0E, 0x07, 0x51, 0x54, 0xBF, 0x01, 0x02, 0x51, 0x8D, ++0x90, 0xA0, 0xE9, 0xE0, 0xB4, 0x06, 0x02, 0x51, 0xA8, 0x90, 0xA0, 0xE9, 0xE0, 0xB4, 0x0C, 0x07, ++0x51, 0x54, 0xBF, 0x01, 0x02, 0x51, 0xDF, 0x90, 0xA0, 0xE9, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x51, ++0xC9, 0x90, 0xA0, 0xE9, 0xE0, 0xB4, 0x04, 0x17, 0x12, 0x94, 0xD8, 0x80, 0x12, 0x90, 0xA0, 0xE9, ++0xE0, 0xB4, 0x0C, 0x0B, 0x12, 0x50, 0xC1, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x02, 0x91, 0x17, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x94, 0x0D, 0xEF, 0x64, ++0x01, 0x70, 0x23, 0x12, 0x7F, 0xD1, 0x54, 0x1F, 0x20, 0xE0, 0x1B, 0x90, 0xA0, 0xE8, 0xE0, 0xD3, ++0x94, 0x04, 0x50, 0x12, 0x90, 0xA1, 0x4A, 0xE0, 0x30, 0xE0, 0x07, 0x13, 0x13, 0x54, 0x3F, 0x20, ++0xE0, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA0, 0xE2, ++0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x04, 0x7D, 0x0C, 0x80, 0x05, 0x12, 0x95, 0x50, 0x7D, 0x04, 0x7F, ++0x01, 0x71, 0x0B, 0xE4, 0xFD, 0xFF, 0x61, 0xCB, 0x90, 0xA0, 0xE2, 0xE0, 0x90, 0x06, 0x04, 0x20, ++0xE0, 0x08, 0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x04, 0x80, 0x06, 0xE0, 0x54, 0x7F, 0xF0, 0x7D, 0x0C, ++0x7F, 0x01, 0x71, 0x0B, 0xE4, 0xFD, 0xFF, 0x61, 0xCB, 0x90, 0xA3, 0x39, 0xEF, 0xF0, 0x71, 0xDE, ++0x90, 0xA3, 0x39, 0xE0, 0x60, 0x03, 0x12, 0x7A, 0x60, 0x7D, 0x04, 0x7F, 0x01, 0x80, 0x2C, 0xB1, ++0x58, 0x70, 0x23, 0x90, 0xA0, 0xE2, 0xE0, 0x54, 0xFD, 0xF0, 0x7D, 0x2C, 0x7F, 0x6F, 0x71, 0xCB, ++0x7D, 0x08, 0x7F, 0x01, 0x91, 0xDF, 0xBF, 0x01, 0x0D, 0x90, 0xA0, 0xE1, 0xE0, 0x44, 0x80, 0xF0, ++0x7D, 0x0E, 0x7F, 0x01, 0x71, 0x0B, 0x22, 0x7D, 0x0C, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0xA3, 0x38, 0xEF, 0xF0, 0x14, 0x60, 0x15, 0x14, 0x60, 0x19, 0x24, 0x02, 0x70, ++0x1A, 0xED, 0x54, 0x01, 0xFF, 0x90, 0xA0, 0xE1, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x80, 0x0C, 0x90, ++0xA0, 0xE9, 0xED, 0xF0, 0x80, 0x05, 0x90, 0xA0, 0xE8, 0xED, 0xF0, 0x7F, 0x8F, 0x12, 0x47, 0xA9, ++0xEF, 0x30, 0xE4, 0x2B, 0x90, 0xA3, 0x38, 0xE0, 0x14, 0x60, 0x07, 0x14, 0x60, 0x17, 0x24, 0x02, ++0x70, 0x1D, 0x90, 0xA0, 0xE1, 0xE0, 0x12, 0x96, 0x64, 0x90, 0xA0, 0xE9, 0xE0, 0x54, 0x7F, 0x4F, ++0xFD, 0x7F, 0x88, 0x80, 0x07, 0x90, 0xA0, 0xE8, 0xE0, 0xFD, 0x7F, 0x89, 0x12, 0x46, 0x99, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA1, 0x4A, 0xE0, 0x30, 0xE0, 0x4A, 0x13, 0x13, 0x54, 0x3F, 0x20, ++0xE0, 0x14, 0x12, 0x96, 0x75, 0x11, 0x0E, 0x71, 0xC6, 0x12, 0x83, 0xBA, 0x30, 0xE0, 0x02, 0x71, ++0x07, 0x12, 0x84, 0x03, 0xF0, 0x22, 0x90, 0xA1, 0x4A, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, ++0x24, 0xE4, 0x90, 0xA2, 0xF1, 0xF0, 0x90, 0xA1, 0x4D, 0x11, 0x0E, 0x90, 0xA1, 0x4A, 0xE0, 0x54, ++0xFB, 0xF0, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x09, 0x12, 0x84, 0x1B, 0x7D, 0x04, 0x7F, 0x01, 0x61, ++0x0B, 0x7D, 0x31, 0x91, 0x4B, 0x22, 0x71, 0xDE, 0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, 0xEF, 0xF0, ++0x90, 0x9F, 0x8A, 0xED, 0xF0, 0x22, 0x71, 0xC6, 0x7D, 0x0C, 0x7F, 0x01, 0x61, 0x0B, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01, 0x00, 0x74, ++0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, 0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, 0x12, 0x95, ++0xF4, 0xF0, 0xE4, 0xFD, 0x12, 0x46, 0xAD, 0x7F, 0x02, 0x12, 0x47, 0xE0, 0xFD, 0x7F, 0x02, 0x12, ++0x46, 0x99, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7D, 0x2F, 0x91, 0x4B, 0x7D, 0x08, 0x7F, 0x01, 0x61, ++0x0B, 0xF0, 0x90, 0xA0, 0xEF, 0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0xFF, 0x90, 0xA0, 0xEE, ++0xE0, 0x2F, 0x22, 0x7D, 0x2D, 0x91, 0x81, 0x90, 0x01, 0x37, 0x74, 0x02, 0xF0, 0xFD, 0x7F, 0x03, ++0x12, 0x51, 0xB1, 0x91, 0x4F, 0xE4, 0xFD, 0x7F, 0x01, 0x61, 0x0B, 0x7F, 0xFF, 0x71, 0xCB, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x95, 0xF4, 0xF0, 0x7D, 0x01, 0x12, 0x46, 0xAD, 0x91, ++0x85, 0x12, 0x46, 0x8F, 0x12, 0x46, 0x83, 0x12, 0x46, 0x83, 0x90, 0x01, 0x00, 0x74, 0x3F, 0xF0, ++0xA3, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x7F, 0xFF, 0x71, 0xCB, 0xE4, 0x90, 0xA3, 0x22, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, 0xE0, ++0x90, 0xA3, 0x24, 0xF0, 0x7D, 0x47, 0x7F, 0xFF, 0x71, 0xCB, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x11, ++0xA3, 0xE0, 0x70, 0x0D, 0xA3, 0xE0, 0x70, 0x09, 0xA3, 0xE0, 0x70, 0x05, 0xD1, 0x20, 0x7F, 0x01, ++0x22, 0xD3, 0x90, 0xA3, 0x23, 0xE0, 0x94, 0xE8, 0x90, 0xA3, 0x22, 0xE0, 0x94, 0x03, 0x40, 0x0C, ++0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0xD1, 0x20, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, ++0x12, 0x3E, 0x50, 0x90, 0xA3, 0x22, 0x12, 0x72, 0x98, 0x80, 0xBF, 0x7D, 0x08, 0xE4, 0xFF, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0xFF, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x9F, ++0x88, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x21, 0x90, 0x05, 0x22, 0xE0, 0x90, 0xA3, ++0x03, 0xF0, 0x7D, 0x26, 0x91, 0x81, 0xEF, 0x64, 0x01, 0x70, 0x02, 0xD1, 0x60, 0x90, 0xA3, 0x03, ++0xE0, 0xFF, 0x7D, 0x27, 0x71, 0xCB, 0x12, 0x94, 0xF1, 0x80, 0x05, 0x12, 0x94, 0xF1, 0xD1, 0x60, ++0x12, 0x67, 0xC3, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, 0x60, 0x2A, 0xB1, 0x58, 0x70, ++0x26, 0x90, 0xA0, 0xE2, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x2B, 0x7F, 0x0F, 0x71, 0xCB, 0x90, 0x06, ++0x04, 0xE0, 0x54, 0xBF, 0xF0, 0x91, 0xDB, 0xBF, 0x01, 0x0D, 0x90, 0xA0, 0xE1, 0xE0, 0x44, 0x40, ++0xF0, 0x7D, 0x06, 0x7F, 0x01, 0x71, 0x0B, 0x22, 0xE4, 0xFF, 0xB1, 0x60, 0xEF, 0x64, 0x01, 0x22, ++0x12, 0x77, 0xBB, 0xEF, 0x54, 0x07, 0xFF, 0x12, 0x71, 0x5F, 0xE0, 0xFD, 0x7C, 0x00, 0x12, 0x77, ++0xDC, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5C, 0xFE, 0xEF, 0x5D, ++0x4E, 0x7F, 0x00, 0x60, 0x02, 0x7F, 0x01, 0x22, 0xE4, 0x90, 0xA2, 0x04, 0xF0, 0x90, 0xA0, 0xE6, ++0xE0, 0x60, 0x6B, 0xB1, 0x58, 0x70, 0x67, 0x12, 0x96, 0xBA, 0xB1, 0xFF, 0x12, 0x45, 0x61, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0xD1, 0x19, 0x78, 0x10, 0x12, 0x08, ++0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x61, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0xA3, 0xD1, 0x19, 0x78, 0x18, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, ++0xD0, 0x01, 0xD0, 0x00, 0x12, 0x95, 0xE6, 0x44, 0x80, 0xF0, 0x90, 0xA2, 0x04, 0x74, 0x01, 0xF0, ++0xE4, 0x90, 0xA0, 0xED, 0xF0, 0x04, 0x60, 0x16, 0x12, 0x96, 0xC2, 0xE4, 0x90, 0xA2, 0xF1, 0xF0, ++0x90, 0xA0, 0xEE, 0x11, 0x0E, 0x90, 0xA0, 0xE9, 0xE0, 0x20, 0xE2, 0x02, 0x31, 0x08, 0x22, 0xF0, ++0x90, 0x05, 0x61, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x08, 0x12, 0x08, 0x5A, 0xA8, 0x04, ++0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, 0x05, 0x60, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22, ++0x90, 0xA3, 0x24, 0xE0, 0xFF, 0x7D, 0x48, 0x61, 0xCB, 0x90, 0xA1, 0x4A, 0xE0, 0x30, 0xE0, 0x13, ++0x90, 0x01, 0x57, 0xE4, 0xF0, 0x71, 0xC6, 0x12, 0x83, 0xBA, 0x30, 0xE0, 0x02, 0x71, 0x07, 0x12, ++0x84, 0x03, 0xF0, 0x22, 0xF1, 0x97, 0x54, 0x3F, 0xF0, 0xEF, 0x60, 0x0A, 0xF1, 0x8A, 0x44, 0x10, ++0xF1, 0x96, 0x44, 0x80, 0xF0, 0x22, 0xF1, 0x8A, 0x54, 0xEF, 0xF1, 0x96, 0x44, 0x40, 0xF0, 0x22, ++0x90, 0x9F, 0xB9, 0xE0, 0xFF, 0x90, 0xA3, 0x00, 0xE0, 0xFB, 0x90, 0xA3, 0x17, 0x74, 0x0A, 0xF0, ++0x7D, 0x01, 0xD1, 0xF0, 0x90, 0xA3, 0x01, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0xA2, ++0xFF, 0xE0, 0xFF, 0xD1, 0x44, 0x90, 0xA3, 0x01, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x81, 0x00, ++0xE0, 0x54, 0x0F, 0xFD, 0xAC, 0x07, 0x12, 0x96, 0x28, 0x44, 0x01, 0xF0, 0x12, 0x96, 0x28, 0x54, ++0xFB, 0xF0, 0xAC, 0x07, 0x74, 0x12, 0x2C, 0xF1, 0x82, 0xE0, 0x44, 0xFA, 0xF0, 0x74, 0x11, 0x2C, ++0x12, 0x96, 0xAA, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, 0x06, 0x2C, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x0E, 0xF0, 0x90, 0x04, 0xA7, 0xE4, 0xF0, 0x90, 0x04, 0xA6, 0xF0, ++0x90, 0x04, 0xA5, 0x74, 0xFF, 0xF0, 0x90, 0x04, 0xA4, 0x74, 0xFD, 0xF0, 0x74, 0x14, 0x2C, 0x12, ++0x96, 0xA2, 0xE0, 0x54, 0xC0, 0x4D, 0xFD, 0x74, 0x14, 0x2F, 0x12, 0x96, 0xA2, 0xED, 0xF0, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0x15, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, ++0xA3, 0x14, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0x12, 0x66, 0x15, 0x7C, 0x00, 0xAD, 0x07, 0x90, 0xA3, ++0x14, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, 0xA3, 0x15, 0xE0, 0x60, 0x06, 0x12, 0x96, 0x3C, 0x44, ++0x80, 0xF0, 0xAF, 0x05, 0x74, 0x20, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, ++0xC0, 0xF0, 0x12, 0x96, 0x3C, 0x54, 0xC0, 0xF0, 0x90, 0xA3, 0x17, 0xE0, 0xFF, 0xAE, 0x05, 0x74, ++0x18, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0xF1, 0x7F, 0xE0, 0x54, 0x01, ++0xFF, 0x90, 0xA3, 0x16, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFE, 0xEF, 0x44, 0x02, 0x4E, 0xFF, 0xAE, ++0x05, 0xF1, 0x7F, 0xEF, 0xF0, 0x74, 0x11, 0x2E, 0x12, 0x96, 0xAA, 0x74, 0xFF, 0xF0, 0x74, 0x29, ++0x2E, 0xF1, 0x8D, 0x54, 0xF7, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x74, ++0x12, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x74, 0x29, 0x2D, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF0, 0x74, 0x09, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0x22, 0xEF, 0x70, 0x36, 0x7D, 0x78, 0x7F, 0x02, 0x12, 0x51, 0xC1, 0x7D, 0x02, 0x7F, ++0x03, 0x12, 0x51, 0xC1, 0x7D, 0xC8, 0x7F, 0x02, 0x12, 0x51, 0xEF, 0x12, 0x95, 0xC0, 0xE4, 0xFF, ++0xB1, 0x60, 0xEF, 0x70, 0x0B, 0x12, 0x79, 0x94, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x80, 0x06, ++0x7D, 0x01, 0x7F, 0x0C, 0x31, 0x0C, 0x12, 0x79, 0x99, 0x02, 0x93, 0xEE, 0x90, 0x01, 0x36, 0x74, ++0x78, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x78, 0xFF, 0x12, 0x51, 0xB1, 0x7D, 0x02, 0x7F, 0x03, ++0x12, 0x51, 0xB1, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0x12, 0x57, 0xDC, 0xE4, 0xFF, 0x12, 0x4D, ++0x60, 0xBF, 0x01, 0x10, 0x11, 0x17, 0x90, 0xA0, 0xE9, 0xE0, 0x20, 0xE2, 0x09, 0x7D, 0x01, 0x7F, ++0x04, 0x02, 0x49, 0x0C, 0xB1, 0xCB, 0x22, 0x90, 0xA0, 0xE2, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x11, ++0xC1, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, ++0x02, 0x31, 0xBD, 0x90, 0xA0, 0xE1, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x0A, 0xEF, ++0xF1, 0xD2, 0xF0, 0x54, 0x07, 0x70, 0x44, 0x80, 0x3F, 0x90, 0xA0, 0xEF, 0xE0, 0x04, 0xF0, 0x90, ++0xA0, 0xEA, 0xE0, 0x54, 0xEF, 0xF0, 0xF1, 0xE7, 0x40, 0x2E, 0x12, 0x4D, 0x58, 0x70, 0x2C, 0x12, ++0x7D, 0xA4, 0x70, 0x04, 0x11, 0x8C, 0x80, 0xAF, 0x11, 0x8C, 0x90, 0xA0, 0xF0, 0xE0, 0x04, 0xF0, ++0xE0, 0xD3, 0x94, 0x02, 0x40, 0x09, 0x11, 0x17, 0xE4, 0x90, 0xA0, 0xF0, 0xF0, 0x80, 0x03, 0x12, ++0x79, 0x3C, 0xE4, 0x90, 0xA0, 0xEF, 0xF0, 0x22, 0x12, 0x78, 0xC3, 0x22, 0xF1, 0xE7, 0x40, 0x30, ++0x90, 0xA1, 0x00, 0xE0, 0x04, 0xF0, 0x90, 0xA1, 0x42, 0xE0, 0xFF, 0x90, 0xA1, 0x00, 0xE0, 0xD3, ++0x9F, 0x50, 0x1D, 0x90, 0xA0, 0xF8, 0xE0, 0x04, 0x12, 0x4C, 0x21, 0x90, 0xA0, 0xFF, 0xF0, 0xFB, ++0x90, 0xA0, 0xF8, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0xA3, 0x1B, 0x74, 0x04, 0xF0, 0x71, 0xA3, ++0x22, 0x90, 0xA0, 0xE2, 0xE0, 0xFF, 0x13, 0x22, 0x90, 0x05, 0x62, 0xE0, 0xFE, 0x90, 0x05, 0x61, ++0xE0, 0xFD, 0xED, 0x78, 0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0xA1, 0xF4, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x4D, 0x58, 0x60, 0x02, 0x21, 0x94, 0x90, 0xA0, 0xE6, 0xE0, ++0x70, 0x02, 0x21, 0x94, 0x31, 0x9D, 0x64, 0x01, 0x70, 0x22, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0xA0, ++0xED, 0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0xA0, 0xEC, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, 0x90, ++0xA0, 0xEC, 0xE0, 0xFE, 0xFF, 0x80, 0x00, 0x90, 0xA0, 0xED, 0xEF, 0xF0, 0x51, 0x0D, 0xE4, 0x90, ++0xA0, 0xEF, 0xF1, 0xDC, 0x12, 0x95, 0xC0, 0xF1, 0xD5, 0xF0, 0x54, 0xEF, 0xF0, 0x31, 0x9D, 0x24, ++0xFD, 0x50, 0x02, 0x80, 0x03, 0x12, 0x78, 0xEC, 0x11, 0xC1, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, ++0x51, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x1F, 0x31, 0x95, 0x6F, 0x70, 0x43, 0x90, ++0xA0, 0xE2, 0xE0, 0x44, 0x40, 0xF0, 0x12, 0x96, 0xBA, 0x31, 0xA6, 0xB1, 0xE3, 0xB1, 0x7F, 0x31, ++0xBD, 0x90, 0xA0, 0xED, 0xE0, 0x14, 0xF0, 0x80, 0x29, 0x12, 0x96, 0xB2, 0x64, 0x01, 0x70, 0x22, ++0x31, 0x95, 0xFE, 0x6F, 0x60, 0x1C, 0x90, 0x05, 0x73, 0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x13, 0x11, ++0xC1, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x0B, 0xEF, 0x54, 0xBF, 0x31, 0xA6, 0x31, 0xEF, 0x51, 0x02, ++0x31, 0xB1, 0xB1, 0xCB, 0x22, 0x90, 0xA0, 0xEC, 0xE0, 0xFF, 0xA3, 0xE0, 0x22, 0x90, 0xA0, 0xE4, ++0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x22, 0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03, ++0x22, 0x74, 0x59, 0x2F, 0xF8, 0xE6, 0x4D, 0xFE, 0xF6, 0x74, 0x30, 0x80, 0x3A, 0x7D, 0x02, 0x7F, ++0x02, 0x74, 0x59, 0xB1, 0xDB, 0xFE, 0xF6, 0x74, 0x30, 0x80, 0x2C, 0x90, 0xA0, 0xE1, 0xE0, 0x54, ++0xFB, 0xF0, 0xE4, 0x90, 0xA0, 0xEF, 0xF0, 0xA3, 0xF0, 0x90, 0xA0, 0xEA, 0xF0, 0x90, 0xA0, 0xE2, ++0xE0, 0x54, 0xF7, 0xF0, 0x54, 0xBF, 0xF0, 0x51, 0x02, 0x31, 0xB1, 0x7D, 0x10, 0x7F, 0x03, 0x74, ++0x61, 0xB1, 0xDB, 0xFE, 0xF6, 0x74, 0x38, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, ++0xF0, 0x22, 0x7D, 0x01, 0x7F, 0x02, 0x31, 0xB1, 0x7D, 0x02, 0x7F, 0x02, 0x22, 0x12, 0x4E, 0x00, ++0x12, 0x45, 0x61, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x12, 0x4E, ++0x19, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, ++0x61, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x4E, 0x19, 0x78, 0x18, 0x12, ++0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x61, 0x90, 0xA1, 0x35, ++0x12, 0x08, 0x6D, 0x90, 0xA1, 0x39, 0x12, 0x45, 0x7F, 0x90, 0xA1, 0x35, 0x12, 0x45, 0x8B, 0xC3, ++0x12, 0x45, 0x6E, 0x40, 0x3F, 0x90, 0xA0, 0xE1, 0xE0, 0x90, 0xA1, 0x39, 0x30, 0xE0, 0x0F, 0x71, ++0x86, 0x90, 0xA1, 0x03, 0xE0, 0x24, 0x04, 0x2F, 0xFF, 0x90, 0xA1, 0x3D, 0x80, 0x05, 0x71, 0x86, ++0x90, 0xA1, 0x3E, 0xE0, 0xFE, 0xC3, 0xEF, 0x9E, 0x90, 0xA1, 0xF6, 0xF0, 0x90, 0xA1, 0xF6, 0xE0, ++0xFF, 0xC3, 0x94, 0x2D, 0x50, 0x0E, 0x74, 0x04, 0x2F, 0x71, 0x6E, 0xE0, 0x04, 0xF0, 0x90, 0xA0, ++0xFC, 0xE0, 0x04, 0xF0, 0x90, 0xA0, 0xFC, 0xE0, 0xFF, 0xD3, 0x90, 0xA1, 0x40, 0xE0, 0x9F, 0x90, ++0xA1, 0x3F, 0xE0, 0x94, 0x00, 0x40, 0x02, 0x61, 0x6A, 0xE4, 0xFF, 0xFE, 0x71, 0x6B, 0x71, 0x76, ++0xFD, 0xEF, 0xD3, 0x9D, 0x40, 0x07, 0x90, 0xA1, 0xF7, 0xEE, 0xF0, 0x80, 0x05, 0x0E, 0xEE, 0xB4, ++0x2D, 0xEA, 0xE4, 0xFF, 0xFE, 0x71, 0x6B, 0x71, 0x76, 0xFD, 0xC3, 0x90, 0xA1, 0x40, 0xE0, 0x9D, ++0xFD, 0x90, 0xA1, 0x3F, 0xE0, 0x94, 0x00, 0xFC, 0xEF, 0xD3, 0x9D, 0xE4, 0x9C, 0x40, 0x07, 0x90, ++0xA1, 0xF8, 0xEE, 0xF0, 0x80, 0x05, 0x0E, 0xEE, 0xB4, 0x2D, 0xDA, 0x90, 0xA1, 0xF7, 0xE0, 0x90, ++0xA1, 0x01, 0xF0, 0x90, 0xA1, 0xF8, 0xE0, 0x90, 0xA1, 0x02, 0x71, 0x7E, 0x94, 0x0A, 0x40, 0x0A, ++0xEF, 0x24, 0xF6, 0x90, 0xA0, 0xF9, 0xF0, 0xE4, 0x80, 0x09, 0xE4, 0x90, 0xA0, 0xF9, 0x71, 0x7E, ++0x74, 0x0A, 0x9F, 0x90, 0xA0, 0xF8, 0xF0, 0x90, 0xA1, 0x01, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, ++0x90, 0xA0, 0xFF, 0xF0, 0x90, 0xA0, 0xE1, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0xA1, 0x3D, 0x80, 0x03, ++0x90, 0xA1, 0x3E, 0xE0, 0x04, 0xFF, 0x90, 0xA0, 0xFF, 0xE0, 0x2F, 0xF0, 0x90, 0xA0, 0xFF, 0xE0, ++0xC3, 0x94, 0x0A, 0x50, 0x03, 0x74, 0x0A, 0xF0, 0x90, 0xA0, 0xFF, 0xE0, 0x24, 0x02, 0xF0, 0xB1, ++0x85, 0x74, 0x03, 0xF0, 0x71, 0xA3, 0xE4, 0xFF, 0xF1, 0xF3, 0x22, 0x74, 0x04, 0x2E, 0xF5, 0x82, ++0xE4, 0x34, 0xA1, 0xF5, 0x83, 0x22, 0xE0, 0x2F, 0xFF, 0x90, 0xA1, 0x41, 0xE0, 0x22, 0xF0, 0x90, ++0xA1, 0x01, 0xE0, 0xFF, 0xC3, 0x22, 0x12, 0x45, 0x8B, 0x90, 0xA1, 0x35, 0x12, 0x45, 0x7F, 0x12, ++0x45, 0x46, 0x78, 0x0A, 0x12, 0x08, 0x47, 0x90, 0xA0, 0xFE, 0xE0, 0xFE, 0xC3, 0x74, 0x0A, 0x9E, ++0x2F, 0xFF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAC, 0x07, 0x90, 0xA0, 0xE2, 0xE0, ++0xF1, 0x86, 0x30, 0xE0, 0x02, 0x81, 0x5C, 0x90, 0xA0, 0xE1, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0xA1, ++0x03, 0xE0, 0x24, 0x04, 0x90, 0xA0, 0xFB, 0xF0, 0x90, 0xA1, 0x03, 0xE0, 0x24, 0x03, 0x90, 0xA0, ++0xFA, 0xF0, 0x80, 0x0D, 0x90, 0xA0, 0xFB, 0x74, 0x02, 0xF0, 0x90, 0xA0, 0xFA, 0x14, 0xF0, 0x0B, ++0x0B, 0x90, 0xA0, 0xFA, 0xE0, 0xFA, 0x90, 0xA0, 0xF9, 0xE0, 0xD3, 0x9A, 0x50, 0x0E, 0x90, 0xA0, ++0xEE, 0xEB, 0xF0, 0x90, 0xA0, 0xFB, 0xE0, 0xC3, 0x9D, 0x2C, 0x80, 0x11, 0xC3, 0xED, 0x9A, 0x2B, ++0x90, 0xA0, 0xEE, 0xF0, 0x90, 0xA0, 0xFA, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0xA0, 0xFE, ++0xF0, 0x90, 0xA0, 0xFB, 0xE0, 0xFF, 0x24, 0x0A, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0xA0, 0xFE, 0x91, ++0x68, 0x40, 0x04, 0xEF, 0x24, 0x0A, 0xF0, 0x90, 0xA0, 0xFE, 0xE0, 0xFF, 0x24, 0x23, 0xFD, 0xE4, ++0x33, 0xFC, 0x90, 0xA0, 0xEE, 0x91, 0x68, 0x40, 0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, 0xA0, 0xFE, ++0xE0, 0xFF, 0x7E, 0x00, 0x90, 0xA0, 0xF2, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58, 0xE0, ++0x6F, 0x70, 0x01, 0xE4, 0x60, 0x02, 0xF1, 0xDD, 0xB1, 0xD3, 0x80, 0x07, 0x90, 0xA0, 0xE3, 0xE0, ++0x44, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, ++0x80, 0x98, 0x22, 0x90, 0xA1, 0x73, 0x12, 0x45, 0xAC, 0x31, 0xCB, 0x90, 0xA0, 0xE6, 0xE0, 0xFF, ++0x12, 0x4F, 0xA3, 0x90, 0xA0, 0xE6, 0xE0, 0x60, 0x15, 0x90, 0xA1, 0x73, 0xB1, 0xEB, 0x54, 0x0F, ++0xFF, 0xF1, 0x38, 0xFD, 0x12, 0x94, 0x83, 0xB1, 0x85, 0x74, 0x01, 0xF0, 0x71, 0xA3, 0x22, 0x12, ++0x77, 0xC3, 0x90, 0xA0, 0xE6, 0xE0, 0x70, 0x02, 0xA1, 0x34, 0x90, 0xA0, 0xFD, 0xE0, 0x04, 0x12, ++0x4D, 0xFF, 0x12, 0x45, 0x61, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, ++0x12, 0x4E, 0x19, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, ++0x12, 0x45, 0x61, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x4E, 0x19, 0x78, ++0x18, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x61, 0x90, ++0xA1, 0x31, 0x12, 0x95, 0xEC, 0x54, 0x7F, 0xF0, 0xA3, 0xE0, 0x30, 0xE0, 0x09, 0xB1, 0x85, 0x74, ++0x05, 0xF0, 0x71, 0xA3, 0xB1, 0xD3, 0x90, 0xA0, 0xE2, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, ++0xE0, 0x0B, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x04, 0x31, 0xBD, 0xB1, 0x7F, 0x90, 0xA3, 0x36, ++0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x80, 0x40, 0x0B, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xFE, 0xF0, ++0xE0, 0x44, 0x01, 0xF0, 0x12, 0x7F, 0xB6, 0xBF, 0x03, 0x14, 0x90, 0xA1, 0x52, 0xE0, 0xB4, 0x01, ++0x0D, 0x90, 0x01, 0xB8, 0xE0, 0x04, 0xF0, 0x90, 0x05, 0x21, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x01, ++0x12, 0x7F, 0x52, 0x90, 0xA1, 0x4A, 0xE0, 0x30, 0xE0, 0x0A, 0x12, 0x96, 0x75, 0x12, 0x48, 0x0E, ++0x12, 0x84, 0x03, 0xF0, 0x90, 0x9F, 0x8C, 0xE0, 0xB4, 0x01, 0x10, 0x12, 0x84, 0x12, 0x20, 0xE0, ++0x0D, 0xEF, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, 0x05, 0x80, 0x00, 0x12, 0x83, 0xC1, 0x22, 0x7D, ++0x01, 0x7F, 0x02, 0x21, 0xC1, 0x90, 0xA0, 0xF8, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0xA0, 0xFF, ++0xE0, 0xFB, 0x90, 0xA3, 0x1B, 0x22, 0x12, 0x88, 0x03, 0x90, 0xA2, 0x04, 0xEF, 0xF0, 0x30, 0xE0, ++0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, 0x12, 0x4B, 0x0B, 0x90, 0xA2, 0x04, 0xE0, ++0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80, 0x06, 0x90, 0x01, ++0x2F, 0x74, 0x80, 0xF0, 0xB1, 0x85, 0x74, 0x02, 0xF0, 0x61, 0xA3, 0x90, 0xA0, 0xE2, 0xE0, 0x44, ++0x04, 0xF0, 0x22, 0x90, 0xA0, 0xE3, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, ++0xF4, 0x5E, 0x22, 0x74, 0x61, 0x2F, 0xF8, 0xE6, 0x4D, 0x21, 0xF3, 0x12, 0x45, 0xA3, 0x90, 0x00, ++0x01, 0x02, 0x06, 0xA2, 0x12, 0x06, 0x89, 0x54, 0x7F, 0x90, 0xA1, 0x70, 0xF0, 0xB1, 0xEE, 0xFF, ++0x54, 0x1F, 0x90, 0xA1, 0x72, 0xF0, 0xEF, 0x54, 0x60, 0xC4, 0x13, 0x54, 0x07, 0x90, 0xA1, 0x75, ++0xF0, 0xB1, 0xEE, 0xF1, 0x84, 0xF1, 0x34, 0xFF, 0x54, 0x03, 0xFE, 0xEF, 0x54, 0x30, 0xC4, 0x54, ++0x0F, 0x90, 0xA1, 0x74, 0xF1, 0x37, 0xFF, 0x54, 0x40, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x90, 0xA1, ++0x73, 0xF1, 0x82, 0xFF, 0xF1, 0x38, 0x54, 0x08, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xFD, 0xEF, 0x12, ++0x96, 0x64, 0x90, 0xA1, 0x70, 0xF1, 0x48, 0x54, 0x7F, 0x4F, 0xF0, 0x90, 0xA1, 0x73, 0xE0, 0x54, ++0x01, 0xC4, 0x33, 0x33, 0x54, 0xC0, 0xFF, 0x90, 0xA1, 0x70, 0xF1, 0x48, 0x54, 0xBF, 0x4F, 0xF0, ++0xAF, 0x05, 0xEF, 0x60, 0x02, 0xE1, 0x27, 0x90, 0xA1, 0x72, 0xE0, 0x54, 0x1F, 0xFF, 0x90, 0xA1, ++0x70, 0xE0, 0xFD, 0x75, 0xF0, 0x0F, 0x12, 0x59, 0x3E, 0x54, 0xE0, 0x4F, 0xF0, 0xEE, 0x54, 0x03, ++0xFF, 0x75, 0xF0, 0x0F, 0xED, 0xF1, 0x4C, 0x54, 0xFC, 0x4F, 0xF0, 0xEE, 0x54, 0x03, 0x25, 0xE0, ++0x25, 0xE0, 0xFF, 0x90, 0xA1, 0x70, 0xE0, 0xFE, 0xF1, 0x49, 0x54, 0xF3, 0x4F, 0xF0, 0x90, 0xA1, ++0x71, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x54, 0xE0, 0xFF, 0x75, 0xF0, 0x0F, 0xEE, 0x12, 0x59, 0x3E, ++0x54, 0xDF, 0x4F, 0xF0, 0x90, 0xA1, 0x74, 0xE0, 0x54, 0x03, 0xC4, 0x54, 0xF0, 0xFF, 0x90, 0xA1, ++0x70, 0xF1, 0x48, 0x54, 0xCF, 0x4F, 0xF0, 0xE4, 0xFF, 0xEF, 0xF5, 0x82, 0x75, 0x83, 0x00, 0xA3, ++0xA3, 0xA3, 0x12, 0x06, 0xA2, 0xFE, 0x90, 0xA1, 0x70, 0x12, 0x5C, 0xA9, 0xEE, 0xF0, 0x0F, 0xEF, ++0xB4, 0x04, 0xE6, 0x90, 0xA1, 0x70, 0xE0, 0xFF, 0x12, 0x5B, 0x08, 0x90, 0xA1, 0x75, 0xE0, 0x60, ++0x36, 0xB4, 0x01, 0x09, 0xF1, 0x7A, 0xF1, 0x2E, 0x74, 0x2E, 0xF0, 0x80, 0x1C, 0x90, 0xA1, 0x75, ++0xE0, 0xFF, 0xB4, 0x02, 0x09, 0xF1, 0x7A, 0xF1, 0x2E, 0x74, 0x1E, 0xF0, 0x80, 0x0B, 0xEF, 0xB4, ++0x03, 0x07, 0xF1, 0x7A, 0xF1, 0x2E, 0x74, 0x0E, 0xF0, 0x90, 0xA1, 0x70, 0xE0, 0xFF, 0x75, 0xF0, ++0x0F, 0xF1, 0x2E, 0xE0, 0xFD, 0xF1, 0x98, 0x22, 0xFF, 0x75, 0xF0, 0x0F, 0xE5, 0x0F, 0x90, 0x93, ++0x8C, 0x02, 0x45, 0x97, 0x90, 0xA1, 0x71, 0xF0, 0x90, 0x00, 0x02, 0x02, 0x06, 0xA2, 0xFB, 0x0D, ++0xE4, 0xFF, 0x12, 0x59, 0x04, 0x90, 0xA3, 0x1C, 0xE0, 0x75, 0xF0, 0x0F, 0x90, 0x93, 0x89, 0x12, ++0x45, 0x97, 0xE0, 0x22, 0x12, 0x06, 0x89, 0xF5, 0x0F, 0xC3, 0x94, 0x80, 0x50, 0x1B, 0x12, 0x82, ++0x79, 0xFF, 0xF1, 0x8D, 0xEF, 0xF1, 0x37, 0xF1, 0x28, 0xEF, 0xF0, 0xF1, 0x8D, 0xE0, 0x30, 0xE5, ++0x08, 0xF1, 0x29, 0xE0, 0xFD, 0xAF, 0x0F, 0xF1, 0x98, 0x22, 0x90, 0xA1, 0x70, 0xE0, 0x75, 0xF0, ++0x0F, 0x22, 0xF0, 0xEF, 0x54, 0x80, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x22, 0x75, 0xF0, 0x0F, ++0xE5, 0x0F, 0x90, 0x93, 0x8D, 0x02, 0x45, 0x97, 0x75, 0xF0, 0x0F, 0xEF, 0xF1, 0x4C, 0x13, 0x13, ++0x54, 0x03, 0xFE, 0xED, 0xD3, 0x94, 0x2D, 0x40, 0x09, 0x75, 0xF0, 0x0F, 0xEF, 0x90, 0x93, 0x85, ++0x80, 0x0E, 0xED, 0xD3, 0x94, 0x0F, 0x40, 0x05, 0x75, 0x10, 0x0F, 0x80, 0x09, 0x12, 0x96, 0xCA, ++0x12, 0x45, 0x97, 0xE0, 0xF5, 0x10, 0x90, 0xA2, 0xFC, 0xEE, 0xF0, 0xE4, 0xFB, 0xAD, 0x10, 0x02, ++0x5C, 0xCF, 0x54, 0xFB, 0xF0, 0x90, 0xA0, 0xEA, 0xE0, 0x54, 0xFD, 0x22, 0xF0, 0x90, 0xA0, 0xF2, ++0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x90, 0xA1, 0x43, 0xE0, 0xFF, 0x90, 0xA0, 0xEF, 0xE0, ++0xD3, 0x9F, 0x22, 0xE4, 0xFE, 0x71, 0x6B, 0xE4, 0xF0, 0x0E, 0xEE, 0xB4, 0x2D, 0xF7, 0xE4, 0x90, ++0xA0, 0xFD, 0xF0, 0x90, 0xA0, 0xFC, 0xF0, 0x90, 0xA1, 0x00, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, ++0x74, 0x2D, 0xF0, 0xE4, 0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x8F, ++0x12, 0x47, 0xA9, 0xEF, 0x20, 0xE6, 0x02, 0x01, 0xFF, 0x90, 0x00, 0x8C, 0xE0, 0x90, 0xA3, 0x1C, ++0xF0, 0x7F, 0x8D, 0x12, 0x47, 0xA9, 0x90, 0xA3, 0x1D, 0xEF, 0xF0, 0x90, 0x00, 0x8E, 0xE0, 0x90, ++0xA3, 0x1E, 0xF0, 0x90, 0xA3, 0x1D, 0xE0, 0x24, 0xFC, 0x60, 0x0F, 0x24, 0x03, 0x60, 0x02, 0x01, ++0xF4, 0x90, 0xA3, 0x1C, 0xE0, 0xFF, 0xF1, 0x05, 0x01, 0xF4, 0x90, 0xA3, 0x1C, 0xE0, 0x75, 0xF0, ++0x0F, 0x12, 0x57, 0x2E, 0xE0, 0xFB, 0xE4, 0xFD, 0x12, 0x57, 0x41, 0x13, 0x13, 0x54, 0x03, 0x12, ++0x57, 0x3E, 0x12, 0x57, 0x86, 0x12, 0x57, 0x3E, 0xC4, 0x54, 0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0x31, ++0x32, 0x75, 0xF0, 0x0F, 0xF1, 0x70, 0xE0, 0xFB, 0xE4, 0xFD, 0x0F, 0x31, 0x32, 0x75, 0xF0, 0x0F, ++0x90, 0x93, 0x86, 0x31, 0x2C, 0x75, 0xF0, 0x0F, 0x31, 0x3E, 0xC4, 0x13, 0x54, 0x01, 0xFB, 0x0D, ++0x7F, 0x01, 0x31, 0x32, 0x75, 0xF0, 0x0F, 0x31, 0x3E, 0x54, 0x1F, 0x31, 0x30, 0x91, 0xC2, 0xE0, ++0xFB, 0xE4, 0xFD, 0x0F, 0x31, 0x32, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x01, 0x31, 0x2C, 0x75, 0xF0, ++0x08, 0x90, 0x89, 0x02, 0x31, 0x2C, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x03, 0x31, 0x2C, 0x75, 0xF0, ++0x08, 0x12, 0x93, 0x05, 0xFB, 0xE4, 0xFD, 0x0F, 0x31, 0x32, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x05, ++0x31, 0x2C, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x06, 0x31, 0x2C, 0x75, 0xF0, 0x08, 0x12, 0x92, 0xFD, ++0xFB, 0x0D, 0x31, 0x04, 0x7F, 0x8F, 0x12, 0x47, 0xA9, 0xEF, 0x30, 0xE0, 0x02, 0xF1, 0xAC, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xEF, 0x70, 0x04, 0x74, 0xF0, 0x80, 0x16, 0xEF, 0xB4, 0x01, 0x04, 0x74, ++0xF4, 0x80, 0x0E, 0xEF, 0xB4, 0x02, 0x04, 0x74, 0xF8, 0x80, 0x06, 0xEF, 0xB4, 0x03, 0x0C, 0x74, ++0xFC, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83, 0xEB, 0xF0, 0x22, 0x12, 0x45, 0x97, 0xE0, ++0xFB, 0x0D, 0x31, 0x04, 0x90, 0xA3, 0x1C, 0xE0, 0x22, 0x75, 0xF0, 0x0F, 0xE5, 0x0F, 0x90, 0x93, ++0x87, 0x12, 0x45, 0x97, 0xE0, 0x22, 0xE4, 0xF5, 0x0E, 0x74, 0xA3, 0x25, 0x0E, 0x51, 0xF1, 0x74, ++0x5A, 0xF0, 0x74, 0x8F, 0x25, 0x0E, 0x12, 0x96, 0x34, 0xE4, 0xF0, 0x05, 0x0E, 0xE5, 0x0E, 0xB4, ++0x14, 0xE7, 0xE4, 0xF5, 0x0D, 0xE4, 0xFF, 0x75, 0xF0, 0x10, 0xE5, 0x0D, 0x90, 0x81, 0x00, 0xBF, ++0x03, 0x07, 0x91, 0xB0, 0x74, 0x80, 0xF0, 0x80, 0x04, 0x91, 0xB0, 0xE4, 0xF0, 0x75, 0xF0, 0x08, ++0xE5, 0x0D, 0x91, 0xAD, 0xE4, 0xF0, 0x0F, 0xBF, 0x10, 0xDD, 0x05, 0x0D, 0xE5, 0x0D, 0xB4, 0x80, ++0xD4, 0xE4, 0x90, 0xAD, 0xE2, 0xF0, 0xF5, 0x0D, 0xE4, 0xF5, 0x0E, 0x75, 0xF0, 0x0A, 0xE5, 0x0D, ++0xF1, 0xEB, 0x75, 0xF0, 0x02, 0xE5, 0x0E, 0x12, 0x76, 0xB8, 0xF0, 0x05, 0x0E, 0xE5, 0x0E, 0xB4, ++0x05, 0xE9, 0xE5, 0x0D, 0x12, 0x76, 0xD4, 0xE4, 0xF0, 0xA3, 0xF0, 0x74, 0x05, 0x25, 0x0D, 0x12, ++0x76, 0xCA, 0xE4, 0xF0, 0x90, 0x93, 0x81, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0xE5, 0x0D, ++0x12, 0x6D, 0xF1, 0xD1, 0xE8, 0x12, 0x6F, 0xCC, 0xD1, 0xE8, 0x12, 0x6E, 0x0F, 0xD1, 0xE8, 0x12, ++0x6F, 0xDA, 0xE4, 0xF0, 0xA3, 0x51, 0xE4, 0xF1, 0x70, 0x74, 0x1B, 0x51, 0xE4, 0x90, 0x93, 0x86, ++0x51, 0xE0, 0x31, 0x3E, 0x54, 0xE0, 0x51, 0xE4, 0x31, 0x3E, 0x44, 0x20, 0x51, 0xE4, 0x31, 0x3E, ++0x54, 0x3F, 0x51, 0xE4, 0x71, 0x00, 0x54, 0xFC, 0x44, 0x01, 0x51, 0xE4, 0x71, 0x00, 0x54, 0xF7, ++0x51, 0xE4, 0x71, 0x00, 0x54, 0xCF, 0x51, 0xE4, 0x71, 0x00, 0x54, 0x3F, 0x51, 0xE4, 0x12, 0x57, ++0x4C, 0x54, 0xFC, 0x51, 0xE4, 0x12, 0x57, 0x4C, 0x54, 0xF3, 0x51, 0xE4, 0x12, 0x57, 0x4C, 0x54, ++0xCF, 0x51, 0xE4, 0x12, 0x57, 0x4C, 0x44, 0x40, 0x51, 0xE4, 0x12, 0x57, 0x4C, 0x54, 0x7F, 0x51, ++0xE4, 0xD1, 0xE0, 0x54, 0xF0, 0x51, 0xE4, 0xD1, 0xE0, 0x54, 0x0F, 0x51, 0xE4, 0x90, 0x93, 0x8B, ++0x51, 0xE0, 0x90, 0x93, 0x8C, 0x51, 0xE0, 0x90, 0x93, 0x8D, 0x51, 0xE0, 0x90, 0x93, 0x8F, 0x51, ++0xE0, 0x90, 0x93, 0x90, 0x51, 0xE0, 0x90, 0x93, 0x91, 0x51, 0xE0, 0x90, 0x93, 0x92, 0x51, 0xE0, ++0x90, 0x93, 0x93, 0x51, 0xE0, 0x12, 0x7D, 0xD3, 0xE0, 0xFF, 0x75, 0xF0, 0x10, 0xE5, 0x0D, 0xF1, ++0x65, 0xEF, 0xF0, 0x05, 0x0D, 0xE5, 0x0D, 0x64, 0x80, 0x60, 0x02, 0x21, 0x98, 0x90, 0xA1, 0x5D, ++0x74, 0x01, 0xF0, 0xA3, 0x04, 0xF0, 0xA3, 0x74, 0x04, 0xF0, 0xA3, 0x74, 0x06, 0xF0, 0xA3, 0x74, ++0x08, 0xF0, 0xE4, 0xFB, 0xFD, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x04, 0x30, ++0x12, 0x96, 0x7E, 0x90, 0xA1, 0x5D, 0xE0, 0x90, 0x04, 0x33, 0xF0, 0x90, 0xA1, 0x5E, 0xE0, 0x90, ++0x04, 0x34, 0xF0, 0x90, 0xA1, 0x5F, 0xE0, 0x90, 0x04, 0x35, 0xF0, 0x90, 0xA1, 0x60, 0xE0, 0x90, ++0x04, 0x36, 0xF0, 0x90, 0xA1, 0x61, 0xE0, 0x90, 0x04, 0x37, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x12, 0x45, 0x97, 0xE4, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x0D, 0x22, 0xEF, 0xF0, 0x74, 0xA3, 0x25, ++0x10, 0xF5, 0x82, 0xE4, 0x34, 0x9F, 0xF5, 0x83, 0x22, 0x90, 0xA1, 0x76, 0xE0, 0x75, 0xF0, 0x0F, ++0x90, 0x93, 0x88, 0x12, 0x45, 0x97, 0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0xA1, 0x76, 0xEF, 0xF0, 0x75, 0xF0, 0x0F, 0x31, 0x3E, 0x54, 0x1F, 0xFB, 0x60, 0x12, 0x64, 0x02, ++0x60, 0x0E, 0xEB, 0x64, 0x04, 0x60, 0x09, 0xEB, 0x64, 0x09, 0x60, 0x04, 0xEB, 0xB4, 0x0C, 0x09, ++0x51, 0xF9, 0x54, 0xFC, 0x44, 0x02, 0xF0, 0x80, 0x07, 0x51, 0xF9, 0x54, 0xFC, 0x44, 0x01, 0xF0, ++0xE4, 0xF5, 0x0F, 0x90, 0xA1, 0x76, 0xE0, 0xFD, 0x91, 0xC2, 0xE5, 0x82, 0x25, 0x0F, 0x91, 0xB6, ++0xE0, 0xFE, 0xEB, 0x75, 0xF0, 0x07, 0xA4, 0x24, 0x56, 0xF5, 0x82, 0xE4, 0x34, 0x40, 0xF5, 0x83, ++0xE5, 0x82, 0x25, 0x0F, 0x91, 0xB6, 0xE4, 0x93, 0xFC, 0xEE, 0x5C, 0x90, 0xA1, 0x78, 0xF0, 0x75, ++0xF0, 0x0F, 0xED, 0x12, 0x57, 0x4C, 0x54, 0x03, 0xFF, 0xBF, 0x02, 0x0B, 0xE5, 0x0F, 0x70, 0x07, ++0x90, 0xA1, 0x78, 0xE0, 0x54, 0xF0, 0xF0, 0x90, 0xA1, 0x78, 0xE0, 0xFF, 0x91, 0xBE, 0xE5, 0x82, ++0x25, 0x0F, 0x91, 0xB6, 0xEF, 0xF0, 0x05, 0x0F, 0xE5, 0x0F, 0x64, 0x08, 0x70, 0xA5, 0x90, 0xA1, ++0x76, 0x12, 0x57, 0x48, 0xFF, 0xC4, 0x54, 0x03, 0xF5, 0x13, 0xE4, 0xFD, 0x75, 0x10, 0x06, 0xE5, ++0x10, 0xB4, 0x06, 0x07, 0x91, 0xA5, 0xE0, 0x54, 0x0F, 0x80, 0x09, 0x91, 0xBE, 0xE5, 0x82, 0x25, ++0x10, 0x91, 0xB6, 0xE0, 0x90, 0xA1, 0x77, 0xF0, 0x90, 0xA1, 0x77, 0xE0, 0x60, 0x20, 0x75, 0x0F, ++0x07, 0xF1, 0xBB, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xF1, 0xD5, 0x60, 0x05, ++0xF1, 0xCC, 0xFD, 0x80, 0x16, 0x15, 0x0F, 0xE5, 0x0F, 0xC3, 0x94, 0x00, 0x50, 0xE3, 0xE5, 0x10, ++0x60, 0x09, 0x15, 0x10, 0xE5, 0x10, 0xC3, 0x94, 0x00, 0x50, 0xB4, 0xE4, 0xFC, 0xF5, 0x10, 0xE5, ++0x10, 0xB4, 0x06, 0x07, 0x91, 0xA5, 0xE0, 0x54, 0x0F, 0x80, 0x09, 0x91, 0xBE, 0xE5, 0x82, 0x25, ++0x10, 0x91, 0xB6, 0xE0, 0x90, 0xA1, 0x77, 0xF0, 0x90, 0xA1, 0x77, 0xE0, 0x60, 0x1E, 0xE4, 0xF5, ++0x0F, 0xF1, 0xBB, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xF1, 0xD5, 0x60, 0x05, ++0xF1, 0xCC, 0xFC, 0x80, 0x0F, 0x05, 0x0F, 0xE5, 0x0F, 0xB4, 0x08, 0xE5, 0x05, 0x10, 0xE5, 0x10, ++0x64, 0x07, 0x70, 0xBB, 0x90, 0xA1, 0x76, 0xE0, 0xFF, 0x75, 0xF0, 0x0F, 0xF1, 0x70, 0xED, 0xF0, ++0x12, 0x96, 0xCA, 0x12, 0x45, 0x97, 0xEC, 0xF0, 0x75, 0xF0, 0x10, 0xEF, 0xF1, 0x65, 0xE0, 0xFF, ++0x54, 0x7F, 0xF5, 0x11, 0xEF, 0x54, 0x80, 0xF5, 0x12, 0xE5, 0x11, 0xD3, 0x9D, 0x40, 0x07, 0xE5, ++0x12, 0x4D, 0xF5, 0x11, 0x80, 0x0B, 0xE5, 0x11, 0xC3, 0x9C, 0x50, 0x05, 0xE5, 0x12, 0x4C, 0xF5, ++0x11, 0x90, 0xA1, 0x76, 0xE0, 0xFD, 0x12, 0x57, 0x49, 0xFE, 0xD1, 0xEF, 0xAF, 0x05, 0xE4, 0xFB, ++0xAD, 0x11, 0x91, 0xCF, 0x90, 0xA1, 0x76, 0xE0, 0x75, 0xF0, 0x10, 0x12, 0x76, 0xB2, 0xE4, 0xF0, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xFF, 0x90, 0xA1, 0x76, 0xE0, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x00, ++0x12, 0x45, 0x97, 0xE5, 0x82, 0x2F, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0x22, 0x90, 0xA1, ++0x76, 0xE0, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x00, 0x02, 0x45, 0x97, 0xAD, 0x1C, 0xAF, 0x1A, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0xF9, 0xEF, 0xF0, 0xA3, 0xED, 0xD1, 0xF8, 0x90, ++0xA2, 0xFE, 0xF0, 0xED, 0x54, 0x7F, 0x90, 0xA2, 0xFD, 0xF0, 0xEB, 0x70, 0x23, 0x90, 0xA2, 0xF9, ++0xE0, 0xFD, 0x51, 0xFD, 0x54, 0xF7, 0xF0, 0x90, 0xA2, 0xFE, 0xE0, 0x54, 0x7F, 0xF0, 0xAF, 0x05, ++0x90, 0xA2, 0xFA, 0xE0, 0xFD, 0xE4, 0x90, 0xA2, 0xB4, 0xF0, 0xFB, 0x12, 0x6F, 0x19, 0x80, 0x57, ++0x90, 0xA2, 0xF9, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0xA2, 0xB4, 0x74, 0x05, 0xF0, 0xE4, 0xFB, ++0x12, 0x6F, 0x19, 0x90, 0xA2, 0xFD, 0xE0, 0xFF, 0xC3, 0x94, 0x19, 0x40, 0x0E, 0xEF, 0xD3, 0x94, ++0x1B, 0x50, 0x08, 0x90, 0x04, 0xCF, 0x74, 0x02, 0xF0, 0x80, 0x05, 0x90, 0x04, 0xCF, 0xE4, 0xF0, ++0x90, 0xA2, 0xF9, 0xE0, 0xFF, 0x51, 0xFD, 0x44, 0x08, 0xD1, 0xF8, 0x54, 0x07, 0xFF, 0x90, 0xA2, ++0xFE, 0xF0, 0x90, 0xA2, 0xFD, 0xE0, 0x90, 0x40, 0xCB, 0x93, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x4F, ++0x90, 0xA2, 0xFE, 0xF0, 0x44, 0x80, 0xF0, 0x90, 0xA2, 0xFA, 0xF1, 0xDE, 0xF1, 0x65, 0xEF, 0xF0, ++0xEE, 0x70, 0x05, 0x90, 0x01, 0xC8, 0xEF, 0xF0, 0x90, 0xA2, 0xFE, 0xF1, 0xDE, 0x90, 0x81, 0x01, ++0x12, 0x45, 0x97, 0xEF, 0xF0, 0x75, 0xF0, 0x10, 0xEE, 0x12, 0x7A, 0x51, 0x54, 0xFC, 0xFF, 0x90, ++0xA2, 0xFC, 0xE0, 0x4F, 0xFE, 0x90, 0xA2, 0xF9, 0xE0, 0xFF, 0x75, 0xF0, 0x10, 0x90, 0x81, 0x05, ++0x12, 0x45, 0x97, 0xEE, 0xF0, 0x7D, 0x01, 0x12, 0x76, 0x5B, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, ++0xF5, 0x24, 0x90, 0xA0, 0xE0, 0xE0, 0xFF, 0xE5, 0x24, 0xC3, 0x9F, 0x40, 0x02, 0xC1, 0xD9, 0xAF, ++0x24, 0x12, 0x4D, 0x60, 0xEF, 0x70, 0x02, 0xC1, 0xD5, 0x75, 0xF0, 0x0F, 0xE5, 0x24, 0x71, 0x00, ++0x13, 0x13, 0x13, 0x54, 0x1F, 0x20, 0xE0, 0x02, 0xC1, 0xD5, 0x75, 0xF0, 0x10, 0xE5, 0x24, 0xD1, ++0xFD, 0x20, 0xE7, 0x02, 0x80, 0x13, 0x75, 0xF0, 0x10, 0xE5, 0x24, 0x90, 0x81, 0x02, 0x12, 0x45, ++0x97, 0xE0, 0x90, 0xA1, 0xF4, 0xF0, 0x20, 0xE7, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x20, 0xF0, ++0xC1, 0xD5, 0x75, 0xF0, 0x0F, 0xE5, 0x24, 0xD1, 0xE0, 0x54, 0x0F, 0xFF, 0x75, 0xF0, 0x0F, 0xE5, ++0x24, 0x12, 0x7B, 0xDA, 0xE0, 0xFD, 0x12, 0x91, 0xA0, 0xED, 0xF0, 0x12, 0x91, 0x79, 0xF1, 0xC5, ++0xE5, 0x24, 0xF0, 0x90, 0xA1, 0xF4, 0xE0, 0x54, 0x40, 0x12, 0x91, 0x8A, 0x7B, 0x01, 0x7A, 0x00, ++0x7D, 0x02, 0x7F, 0x10, 0x12, 0x7B, 0x6A, 0x90, 0xA1, 0xF4, 0xE0, 0x30, 0xE6, 0x34, 0x75, 0xF0, ++0x0F, 0xE5, 0x24, 0xD1, 0xE0, 0x54, 0xF0, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x24, 0xD1, 0xE0, 0x54, ++0x0F, 0xF0, 0xF1, 0xC5, 0xE5, 0x24, 0xF0, 0xE4, 0xA3, 0x12, 0x60, 0xE8, 0xA3, 0xF0, 0x7B, 0x01, ++0xFA, 0x7D, 0x01, 0x7F, 0x10, 0x12, 0x7B, 0x6A, 0x75, 0xF0, 0x10, 0xE5, 0x24, 0x90, 0x81, 0x00, ++0x80, 0x53, 0x75, 0xF0, 0x0F, 0xE5, 0x24, 0xD1, 0xE0, 0xFF, 0x54, 0x0F, 0x60, 0x2A, 0x75, 0xF0, ++0x0F, 0xE5, 0x24, 0x90, 0x93, 0x8A, 0x12, 0x45, 0x97, 0xEF, 0x54, 0xF0, 0xFE, 0xEF, 0x14, 0x54, ++0x0F, 0x4E, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x24, 0x12, 0x7B, 0xDA, 0xF1, 0xB3, 0x12, 0x57, 0x4C, ++0xD1, 0xEF, 0x7B, 0x01, 0xAF, 0x24, 0x81, 0xCF, 0x75, 0xF0, 0x0F, 0xE5, 0x24, 0x71, 0x00, 0xC4, ++0x54, 0x03, 0xFF, 0xBF, 0x01, 0x07, 0xAF, 0x24, 0x12, 0x7D, 0x16, 0x80, 0x18, 0x75, 0xF0, 0x0F, ++0xE5, 0x24, 0x90, 0x93, 0x92, 0x12, 0x45, 0x97, 0xF1, 0xB3, 0x12, 0x57, 0x4C, 0xD1, 0xEF, 0xE4, ++0xFB, 0xAF, 0x24, 0x91, 0xCF, 0x05, 0x24, 0xA1, 0xB2, 0x22, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x0F, ++0x90, 0x93, 0x8A, 0x12, 0x45, 0x97, 0xE0, 0x22, 0xE4, 0xF0, 0xA3, 0xF0, 0xE5, 0x0D, 0x22, 0x13, ++0x13, 0x54, 0x03, 0x90, 0xA2, 0xFC, 0xF0, 0x22, 0xF0, 0x75, 0xF0, 0x10, 0xEF, 0x90, 0x81, 0x01, ++0x12, 0x45, 0x97, 0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0x2B, 0xEF, ++0xF0, 0x7F, 0x8F, 0x12, 0x47, 0xA9, 0xEF, 0x30, 0xE6, 0x3E, 0x7F, 0x8D, 0x12, 0x47, 0xA9, 0xEF, ++0x64, 0x01, 0x70, 0x34, 0x90, 0xA3, 0x2C, 0xF0, 0x90, 0xA3, 0x2C, 0xE0, 0xFD, 0x90, 0xA3, 0x2B, ++0xE0, 0x75, 0xF0, 0x10, 0xF1, 0x65, 0xE5, 0x82, 0x2D, 0x91, 0xB6, 0xE0, 0xFB, 0xE4, 0xFF, 0x31, ++0x04, 0x90, 0xA3, 0x2C, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x10, 0x40, 0xDB, 0x7F, 0x8F, 0x12, ++0x47, 0xA9, 0xEF, 0x30, 0xE0, 0x02, 0xF1, 0xAC, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0xEE, 0xA3, ++0xF0, 0x75, 0xF0, 0x10, 0xED, 0x90, 0x81, 0x00, 0x02, 0x45, 0x97, 0x75, 0xF0, 0x0F, 0xE5, 0x1A, ++0x90, 0x93, 0x85, 0x02, 0x45, 0x97, 0xAC, 0x07, 0xEC, 0xB4, 0xFF, 0x03, 0x7F, 0xFF, 0x22, 0xAF, ++0x04, 0x12, 0x77, 0xBB, 0x75, 0xF0, 0x08, 0xED, 0x91, 0xC5, 0xE5, 0x82, 0x2E, 0x91, 0xB6, 0xE0, ++0xFB, 0x7A, 0x00, 0xEF, 0x54, 0x07, 0x12, 0x77, 0xDB, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, ++0xD8, 0xF9, 0x12, 0x77, 0xD3, 0xAF, 0x04, 0x70, 0x02, 0x7F, 0xFF, 0x22, 0xE4, 0xFD, 0x7F, 0x8D, ++0x02, 0x46, 0x99, 0xE0, 0xFD, 0x75, 0xF0, 0x0F, 0xE5, 0x24, 0x22, 0x74, 0x01, 0x7E, 0x00, 0xA8, ++0x0F, 0x08, 0x22, 0xE0, 0xFD, 0x90, 0xA2, 0x9A, 0xE4, 0xF0, 0xA3, 0x22, 0xE5, 0x10, 0x75, 0xF0, ++0x08, 0xA4, 0x25, 0x0F, 0x22, 0xFF, 0x90, 0xA1, 0x77, 0xE0, 0xFB, 0xEF, 0x5B, 0x22, 0xE0, 0xFF, ++0x90, 0xA2, 0xF9, 0xE0, 0xFE, 0x75, 0xF0, 0x10, 0x22, 0xA1, 0xAF, 0x90, 0x8D, 0x01, 0x02, 0x45, ++0x97, 0x7F, 0xF4, 0x12, 0x47, 0xA9, 0xEF, 0x20, 0xE5, 0x0E, 0x7F, 0xF4, 0x12, 0x47, 0xA9, 0xEF, ++0x7F, 0x01, 0x20, 0xE4, 0x05, 0x7F, 0x02, 0x22, 0x7F, 0x03, 0x22, 0x12, 0x5F, 0xF1, 0x90, 0x9F, ++0x8C, 0xEF, 0xF0, 0x11, 0x8A, 0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x04, 0x23, 0xE0, 0x44, ++0x80, 0xF0, 0x11, 0x78, 0x44, 0x04, 0xFD, 0x7F, 0x17, 0x12, 0x46, 0x99, 0x11, 0x81, 0x44, 0x40, ++0xFD, 0x7F, 0x16, 0x12, 0x46, 0x99, 0x12, 0x96, 0x15, 0xEF, 0x64, 0x01, 0x70, 0x2E, 0x90, 0xA1, ++0x5A, 0xE0, 0x54, 0x07, 0xF0, 0xE0, 0xFF, 0x64, 0x07, 0x60, 0x05, 0xEF, 0x64, 0x04, 0x70, 0x1C, ++0x12, 0x86, 0xF6, 0xEF, 0x64, 0x01, 0x70, 0x14, 0x11, 0x81, 0x44, 0x60, 0xFD, 0x7F, 0x16, 0x12, ++0x46, 0x99, 0x11, 0x78, 0x44, 0x05, 0xFD, 0x7F, 0x17, 0x12, 0x46, 0x99, 0x7F, 0x38, 0xF1, 0xCA, ++0x7F, 0x38, 0x12, 0x46, 0x99, 0x02, 0x37, 0x99, 0x7F, 0x17, 0x12, 0x47, 0xA9, 0xEF, 0x54, 0xFC, ++0x22, 0x7F, 0x16, 0x12, 0x47, 0xA9, 0xEF, 0x54, 0x0F, 0x22, 0x11, 0xBA, 0xD1, 0xA9, 0x12, 0x87, ++0x01, 0x12, 0x87, 0x20, 0xE4, 0xF5, 0x51, 0xF5, 0x52, 0xF5, 0x53, 0x75, 0x54, 0x80, 0xAD, 0x51, ++0x7F, 0x50, 0x12, 0x46, 0x99, 0xAD, 0x52, 0x7F, 0x51, 0x12, 0x46, 0x99, 0xAD, 0x53, 0x7F, 0x52, ++0x12, 0x46, 0x99, 0xAD, 0x54, 0x7F, 0x53, 0x02, 0x46, 0x99, 0x90, 0x01, 0x30, 0xE4, 0x11, 0xEA, ++0x90, 0x01, 0x38, 0x11, 0xEA, 0xFD, 0x7F, 0x50, 0x12, 0x46, 0x99, 0xE4, 0xFD, 0x7F, 0x51, 0x12, ++0x46, 0x99, 0xE4, 0xFD, 0x7F, 0x52, 0x12, 0x46, 0x99, 0xE4, 0xFD, 0x7F, 0x53, 0x02, 0x46, 0x99, ++0xE4, 0x90, 0xA1, 0x78, 0xF0, 0x90, 0xA1, 0xE3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, ++0xF0, 0x22, 0x90, 0xA0, 0xC7, 0xE0, 0x90, 0xA1, 0xCF, 0xF0, 0x90, 0xA0, 0xC8, 0xE0, 0x90, 0xA1, ++0xD0, 0xF0, 0x90, 0xA0, 0xC9, 0xE0, 0x90, 0xA1, 0xD1, 0xF0, 0x90, 0xA0, 0xCA, 0xE0, 0x90, 0xA1, ++0xD2, 0xF0, 0x90, 0xA0, 0xCB, 0xE0, 0x90, 0xA1, 0xD3, 0xF0, 0x90, 0xA0, 0xB8, 0xE0, 0x90, 0xA1, ++0xD4, 0xF0, 0x90, 0xA0, 0xB9, 0xE0, 0x90, 0xA1, 0xD5, 0xF0, 0x90, 0xA0, 0xBA, 0xE0, 0x90, 0xA1, ++0xD6, 0xF0, 0x90, 0xA0, 0xBB, 0xE0, 0x90, 0xA1, 0xD7, 0xF0, 0x90, 0xA0, 0xBC, 0xE0, 0x90, 0xA1, ++0xD8, 0xF0, 0x90, 0xA0, 0xBD, 0xE0, 0x90, 0xA1, 0xD9, 0xF0, 0x90, 0xA0, 0xBE, 0xE0, 0x90, 0xA1, ++0xDA, 0xF0, 0x90, 0xA0, 0xBF, 0xE0, 0x90, 0xA1, 0xDB, 0xF0, 0x90, 0xA0, 0xC0, 0xE0, 0x90, 0xA1, ++0xDC, 0xF0, 0x90, 0xA0, 0xC1, 0xE0, 0x90, 0xA1, 0xDD, 0xF0, 0x11, 0xE0, 0x90, 0xA1, 0x77, 0xF0, ++0xB1, 0xDA, 0x50, 0x04, 0xB1, 0xE7, 0x80, 0xF8, 0x90, 0x01, 0x1F, 0xE0, 0xFE, 0x90, 0x01, 0x1E, ++0x12, 0x77, 0xAE, 0x90, 0xA1, 0x6C, 0xF0, 0xA3, 0xF1, 0x3F, 0xB1, 0xDA, 0x50, 0x4A, 0xD1, 0x09, ++0x90, 0xA1, 0x77, 0xE0, 0xFE, 0x24, 0xDE, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xD1, 0x8A, 0xE0, 0x24, ++0x4D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFF, 0x74, 0x79, 0x2E, 0xF5, 0x82, 0xE4, ++0x34, 0xA1, 0xD1, 0x8A, 0xE0, 0x24, 0x4E, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xEE, 0xF1, ++0x82, 0x12, 0x45, 0xAC, 0xD1, 0x8E, 0xE0, 0x24, 0x38, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0xEE, 0xD1, ++0x7C, 0x12, 0x45, 0xAC, 0xB1, 0xF4, 0x80, 0xB2, 0x90, 0x02, 0x87, 0xE0, 0x70, 0x02, 0xA1, 0x9E, ++0x90, 0xA0, 0xAA, 0xE0, 0x20, 0xE0, 0x02, 0xA1, 0x9E, 0xE4, 0x90, 0xA1, 0xE8, 0x11, 0xE8, 0x90, ++0xA1, 0x6C, 0xE0, 0xFF, 0xA3, 0xE0, 0xA3, 0x12, 0x96, 0x5A, 0xFC, 0xA3, 0xE0, 0xFD, 0xEC, 0x90, ++0xFD, 0x11, 0xF0, 0x12, 0x86, 0x6A, 0xE0, 0xFE, 0x74, 0x00, 0x2D, 0xF1, 0x58, 0x7A, 0x00, 0x24, ++0x00, 0xFF, 0xEA, 0x3E, 0x54, 0x3F, 0x90, 0xA1, 0x70, 0xF0, 0xA3, 0x12, 0x86, 0x75, 0x54, 0x0F, ++0x33, 0x33, 0x33, 0x54, 0xF8, 0x90, 0xA1, 0x73, 0xF0, 0xFC, 0x74, 0x07, 0x2D, 0xF5, 0x82, 0xE4, ++0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0x90, 0xA1, 0x75, 0xF0, 0xEC, 0x24, 0x18, 0x90, 0xA1, ++0x72, 0xF0, 0xFD, 0x90, 0xA1, 0x6E, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xB1, 0x9F, 0xEF, 0x54, 0xFC, ++0x90, 0xA1, 0x74, 0xF0, 0x90, 0xA1, 0x73, 0xE0, 0x24, 0x18, 0xFF, 0xE4, 0x33, 0x90, 0xA1, 0x70, ++0x8F, 0xF0, 0x12, 0x08, 0xD6, 0x90, 0xA1, 0x70, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x93, 0x0D, ++0x90, 0xA1, 0x6C, 0xEE, 0x8F, 0xF0, 0x12, 0x08, 0xD6, 0x90, 0xA0, 0xA8, 0xE0, 0xFE, 0xA3, 0xE0, ++0xFF, 0x90, 0xA1, 0x6C, 0x12, 0x95, 0x9B, 0x40, 0x11, 0x90, 0xA0, 0xA9, 0xF1, 0x75, 0xED, 0x9F, ++0xFF, 0xEC, 0x9E, 0x90, 0xA1, 0x6C, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA1, 0x74, 0xE0, 0x24, 0xC0, ++0x60, 0x02, 0x81, 0x86, 0xB1, 0xCD, 0x24, 0x18, 0xFD, 0xB1, 0x9F, 0xEF, 0x60, 0x02, 0x81, 0x7C, ++0xB1, 0xCD, 0x24, 0x19, 0xFD, 0xB1, 0x9F, 0x90, 0xA1, 0x8D, 0xF1, 0x47, 0x90, 0xA1, 0x8D, 0xE0, ++0xFF, 0x90, 0xA1, 0x76, 0xE0, 0xFD, 0xC3, 0x9F, 0x50, 0x15, 0xB1, 0xCD, 0x24, 0x1A, 0xFC, 0xED, ++0x2C, 0xFD, 0xD1, 0x29, 0x24, 0x8E, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xD1, 0x30, 0x80, 0xDD, 0x90, ++0xA1, 0x8D, 0xE0, 0x70, 0x02, 0x61, 0xA6, 0xE4, 0x90, 0xA1, 0x77, 0xF0, 0xB1, 0xDA, 0x40, 0x02, ++0x61, 0x8E, 0xD1, 0x09, 0x90, 0xA1, 0x77, 0xE0, 0xFF, 0x24, 0x79, 0xF5, 0x82, 0xE4, 0x34, 0xA1, ++0xF5, 0x83, 0xE0, 0xFE, 0x90, 0xA1, 0x8D, 0xE0, 0xFD, 0xEE, 0x6D, 0x70, 0x1D, 0xEF, 0xF1, 0x82, ++0x12, 0x45, 0xA3, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0xD1, 0x99, 0xED, 0xF0, 0xD0, 0x01, 0xD0, ++0x02, 0xD0, 0x03, 0xD1, 0x49, 0xEF, 0x60, 0x02, 0x80, 0x47, 0x90, 0xA1, 0x8D, 0xE0, 0x64, 0x03, ++0x70, 0x4E, 0xD1, 0x99, 0x74, 0x03, 0xF0, 0x7A, 0xA2, 0x79, 0xE9, 0xD1, 0x49, 0xEF, 0x70, 0x0E, ++0xD1, 0x99, 0x74, 0x03, 0xF0, 0x7A, 0xA2, 0x79, 0xE5, 0xD1, 0x49, 0xEF, 0x60, 0x2A, 0x90, 0xA1, ++0x77, 0xE0, 0xFF, 0x24, 0xD9, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, 0x83, 0xE0, 0x60, 0x02, 0x80, ++0x0B, 0x90, 0xA1, 0x77, 0xE0, 0xFF, 0x24, 0xD4, 0xF1, 0x4F, 0x60, 0x05, 0x74, 0xE8, 0x2F, 0x80, ++0x15, 0xB1, 0xFB, 0x74, 0x01, 0xF0, 0x80, 0x12, 0x90, 0xA1, 0x77, 0xE0, 0x24, 0xE8, 0x80, 0x06, ++0x90, 0xA1, 0x77, 0xE0, 0x24, 0xE8, 0xD1, 0x01, 0xE4, 0xF0, 0xB1, 0xF4, 0x41, 0xEC, 0x90, 0xA1, ++0xE8, 0xE0, 0x70, 0x4F, 0xA3, 0xE0, 0x70, 0x4B, 0xA3, 0xE0, 0x70, 0x47, 0xA3, 0xE0, 0x70, 0x43, ++0xA3, 0xE0, 0x70, 0x3F, 0x81, 0x7C, 0xE4, 0x90, 0xA1, 0x77, 0xF0, 0xB1, 0xDA, 0x50, 0x1C, 0x74, ++0xD4, 0x2E, 0xF1, 0x4F, 0x60, 0x09, 0x74, 0xE8, 0x2E, 0xD1, 0x01, 0xE4, 0xF0, 0x80, 0x08, 0x74, ++0xE8, 0x2E, 0xD1, 0x01, 0x74, 0x01, 0xF0, 0xB1, 0xF4, 0x80, 0xE0, 0x90, 0xA1, 0xE8, 0xE0, 0x70, ++0x12, 0xA3, 0xE0, 0x70, 0x0E, 0xA3, 0xE0, 0x70, 0x0A, 0xA3, 0xE0, 0x70, 0x06, 0xA3, 0xE0, 0x70, ++0x02, 0x81, 0x7C, 0xE4, 0x90, 0xA1, 0x77, 0xF0, 0xB1, 0xDA, 0x40, 0x02, 0x81, 0x7C, 0xD1, 0x09, ++0xB1, 0xFB, 0xE0, 0x70, 0x02, 0x81, 0x78, 0x90, 0xA1, 0x4A, 0xE0, 0x30, 0xE0, 0x07, 0x13, 0x13, ++0x54, 0x3F, 0x30, 0xE0, 0x73, 0xE4, 0xFF, 0xFE, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x10, 0xD3, 0xEF, ++0x94, 0xE8, 0xEE, 0x94, 0x03, 0x50, 0x07, 0x0F, 0xBF, 0x00, 0x01, 0x0E, 0x80, 0xEA, 0x90, 0x04, ++0x1D, 0xE0, 0x70, 0x54, 0x90, 0xA1, 0x77, 0xE0, 0x24, 0xCF, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, ++0x83, 0xE0, 0xFF, 0x90, 0xA3, 0x17, 0x74, 0x06, 0xF0, 0x7B, 0x08, 0x7D, 0x01, 0x12, 0x4E, 0xF0, ++0x90, 0xA1, 0x70, 0xEE, 0xF0, 0xA3, 0xF1, 0x47, 0x90, 0xA1, 0x76, 0xE0, 0xFD, 0xC3, 0x94, 0x06, ++0x50, 0x20, 0xB1, 0xCD, 0x24, 0x0A, 0xFC, 0xED, 0x2C, 0xFD, 0xB1, 0x9F, 0x90, 0xA1, 0x70, 0xA3, ++0xE0, 0xFE, 0x90, 0xA1, 0x76, 0xE0, 0x2E, 0x24, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xD1, 0x30, ++0x80, 0xD6, 0xF1, 0xC3, 0x90, 0x06, 0x35, 0xF0, 0xB1, 0xF4, 0x61, 0xE8, 0xF1, 0x90, 0x90, 0x06, ++0x36, 0x74, 0xDD, 0xF0, 0x21, 0xD8, 0x90, 0xA1, 0x75, 0xE0, 0x60, 0x02, 0xA1, 0x9A, 0xB1, 0xCD, ++0x24, 0x16, 0xFD, 0xB1, 0x9F, 0x90, 0x06, 0x34, 0xEF, 0xF0, 0xB1, 0xCD, 0x24, 0x17, 0xFD, 0xB1, ++0x9F, 0x90, 0x06, 0x37, 0xF1, 0x3F, 0xB1, 0xDA, 0x50, 0x67, 0xD1, 0x09, 0xE4, 0x90, 0xA1, 0x76, ++0xF0, 0x90, 0xA1, 0x76, 0xE0, 0xFF, 0xC3, 0x94, 0x06, 0x50, 0x52, 0xEF, 0x60, 0x04, 0x64, 0x01, ++0x70, 0x1E, 0xB1, 0xCD, 0xF1, 0x61, 0xD1, 0x29, 0xFE, 0x24, 0xA0, 0xF1, 0x6B, 0x90, 0xA1, 0x77, ++0xE0, 0xD1, 0x7C, 0x12, 0x45, 0xA3, 0x8E, 0x82, 0xD1, 0x43, 0xFF, 0x74, 0xA2, 0x2E, 0xF1, 0x6B, ++0xB1, 0xCD, 0xF1, 0x61, 0xB1, 0x9F, 0x90, 0xA1, 0x77, 0xE0, 0xFE, 0xD1, 0x7C, 0x12, 0x45, 0xA3, ++0x90, 0xA1, 0x76, 0xE0, 0xF5, 0x82, 0xD1, 0x43, 0x6F, 0x60, 0x0E, 0x74, 0xE3, 0x2E, 0xF5, 0x82, ++0xE4, 0x34, 0xA1, 0xF5, 0x83, 0xE4, 0xF0, 0x80, 0x04, 0xD1, 0x34, 0x80, 0xA4, 0xB1, 0xF4, 0x80, ++0x95, 0x90, 0xA1, 0xE3, 0xE0, 0x64, 0x01, 0x60, 0x17, 0xA3, 0xE0, 0x64, 0x01, 0x60, 0x11, 0xA3, ++0xE0, 0x64, 0x01, 0x60, 0x0B, 0xA3, 0xE0, 0x64, 0x01, 0x60, 0x05, 0xA3, 0xE0, 0xB4, 0x01, 0x06, ++0x90, 0xA1, 0x78, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0x78, 0xE0, 0x64, 0x01, 0x70, 0x4E, 0x12, 0x84, ++0xDC, 0xF1, 0xD2, 0xF1, 0xDD, 0x90, 0xA0, 0xCC, 0xE0, 0x70, 0x02, 0x21, 0xD8, 0x90, 0x01, 0x3C, ++0xE0, 0x30, 0xE4, 0x03, 0x74, 0x10, 0xF0, 0x7D, 0x10, 0xE4, 0xFF, 0x12, 0x55, 0xE3, 0x90, 0xA0, ++0xCD, 0xE0, 0x60, 0x08, 0xF5, 0x35, 0xE4, 0xF5, 0x36, 0xFB, 0x80, 0x15, 0x90, 0xA0, 0xCE, 0xE0, ++0x60, 0x08, 0xFB, 0xE4, 0xF5, 0x35, 0xF5, 0x36, 0x80, 0x07, 0x75, 0x35, 0x20, 0xE4, 0xF5, 0x36, ++0xFB, 0x7D, 0x01, 0x7F, 0x60, 0x7E, 0x01, 0x12, 0x3C, 0xB1, 0x21, 0xD8, 0x11, 0xE0, 0x90, 0xA1, ++0x77, 0xF0, 0xB1, 0xDA, 0x50, 0x04, 0xB1, 0xE7, 0x80, 0xF8, 0xF1, 0x90, 0x21, 0xD8, 0x22, 0xAB, ++0x07, 0xAA, 0x06, 0xED, 0x2B, 0xFB, 0xE4, 0x3A, 0xFA, 0xC3, 0x90, 0xA0, 0xA9, 0xE0, 0x9B, 0x90, ++0xA0, 0xA8, 0xE0, 0x9A, 0x50, 0x09, 0xA3, 0xF1, 0x75, 0xEB, 0x9F, 0xFB, 0xEA, 0x9E, 0xFA, 0xEA, ++0x90, 0xFD, 0x11, 0xF0, 0xAF, 0x03, 0x74, 0x00, 0x2F, 0xF1, 0x58, 0xFF, 0x22, 0x90, 0xA1, 0x6E, ++0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0xA1, 0x72, 0xE0, 0x22, 0x90, 0xA0, 0xB5, 0xE0, 0xFF, 0x90, ++0xA1, 0x77, 0xE0, 0xFE, 0xC3, 0x9F, 0x22, 0x74, 0xE3, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, ++0x83, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0x77, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0xA1, 0x77, 0xE0, 0x24, ++0xE8, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, 0x83, 0x22, 0x74, 0xCF, 0x2E, 0xF5, 0x82, 0xE4, 0x34, ++0xA1, 0xF5, 0x83, 0xE0, 0xFF, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, 0x30, 0xE0, 0x02, 0x7E, ++0x80, 0x90, 0xFD, 0x10, 0xED, 0xF0, 0xAF, 0x06, 0x22, 0xB1, 0x9F, 0x90, 0xA1, 0x76, 0xE0, 0x22, ++0xF5, 0x83, 0xEF, 0xF0, 0x90, 0xA1, 0x76, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0xA1, 0x70, 0x12, 0x45, ++0xA3, 0x8D, 0x82, 0x75, 0x83, 0x00, 0x02, 0x06, 0xA2, 0x90, 0xA1, 0xED, 0x12, 0x45, 0xAC, 0xE4, ++0xFF, 0x90, 0xA1, 0xF3, 0xE0, 0xFE, 0xEF, 0xC3, 0x9E, 0x50, 0x1E, 0x90, 0xA1, 0xF0, 0x12, 0x45, ++0xA3, 0x8F, 0x82, 0xD1, 0x43, 0xFE, 0x90, 0xA1, 0xED, 0x12, 0x45, 0xA3, 0x8F, 0x82, 0xD1, 0x43, ++0x6E, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x0F, 0x80, 0xD8, 0x7F, 0x01, 0x22, 0x75, 0xF0, 0x03, 0xA4, ++0x24, 0xC0, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, 0x83, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0xDE, ++0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, 0x83, 0x22, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x8E, 0x90, ++0xA1, 0xF0, 0x12, 0x45, 0xAC, 0x90, 0xA1, 0xF3, 0x22, 0x90, 0x01, 0x34, 0x74, 0xFF, 0x11, 0xEA, ++0x90, 0x01, 0x3C, 0x11, 0xEA, 0xFD, 0x7F, 0x54, 0x12, 0x46, 0x99, 0x7D, 0xFF, 0x7F, 0x55, 0x12, ++0x46, 0x99, 0x7D, 0xFF, 0x7F, 0x56, 0x12, 0x46, 0x99, 0x7D, 0xFF, 0x7F, 0x57, 0x02, 0x46, 0x99, ++0x90, 0xA1, 0x70, 0x12, 0x45, 0xAC, 0xE4, 0x90, 0xA1, 0x75, 0xF0, 0xFD, 0xD1, 0x3B, 0xF4, 0x60, ++0x2F, 0x90, 0xA1, 0x75, 0xE0, 0xFF, 0xD1, 0x3B, 0xFE, 0x75, 0xF0, 0x10, 0x12, 0x5E, 0xFD, 0x12, ++0x57, 0x86, 0xFC, 0xA8, 0x05, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0x90, 0xA1, 0x75, ++0xF0, 0x75, 0xF0, 0x10, 0xEE, 0x12, 0x5F, 0x65, 0xE0, 0xFF, 0xF1, 0x34, 0xEF, 0xF0, 0x80, 0x05, ++0xF1, 0x34, 0x74, 0xFF, 0xF0, 0x0D, 0xED, 0xB4, 0x07, 0xC2, 0x90, 0xA1, 0x73, 0x74, 0x05, 0xF0, ++0x90, 0xA1, 0x81, 0x74, 0x08, 0xF0, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x73, 0x12, 0x6E, 0x52, 0x7F, ++0x04, 0x02, 0x6E, 0xD0, 0x74, 0x76, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, 0x83, 0x22, 0xEF, ++0xF0, 0xE4, 0x90, 0xA1, 0x77, 0xF0, 0x22, 0xEF, 0xF0, 0xE4, 0x90, 0xA1, 0x76, 0xF0, 0x22, 0xF5, ++0x82, 0xE4, 0x34, 0xA1, 0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, ++0x22, 0x24, 0x04, 0xFD, 0x90, 0xA1, 0x76, 0xE0, 0x2D, 0xFD, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x04, ++0xF5, 0x83, 0xEF, 0xF0, 0x22, 0xE0, 0x24, 0x01, 0xFF, 0x90, 0xA0, 0xA8, 0xE0, 0x34, 0x00, 0xFE, ++0xC3, 0x22, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0x7E, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, 0x83, 0x22, ++0x90, 0xA1, 0x6C, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x02, 0x84, 0xEF, 0xF0, 0xEE, 0xA3, 0xF0, ++0xA3, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0xA0, 0xAA, 0xE0, 0x54, 0xFE, 0x12, 0x73, 0x35, 0x90, ++0xA0, 0xB1, 0x11, 0xEA, 0x90, 0xA0, 0xCC, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0xE4, 0x90, 0x9F, ++0x86, 0x01, 0xE8, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x22, 0x12, 0x47, 0xA9, 0xEF, 0x44, 0x40, ++0xFD, 0x22, 0x90, 0x01, 0xC7, 0x74, 0x66, 0xF0, 0xE4, 0xFF, 0x22, 0xF1, 0xD2, 0x90, 0xA3, 0x37, ++0xEF, 0xF0, 0x90, 0x9F, 0x8C, 0xE0, 0xB4, 0x02, 0x12, 0x90, 0xA3, 0x37, 0xE0, 0xFF, 0x64, 0x01, ++0x60, 0x24, 0x90, 0x01, 0x4D, 0xE0, 0x64, 0x80, 0xF0, 0x80, 0x19, 0x90, 0x01, 0x00, 0x74, 0xFF, ++0xF0, 0x7F, 0x64, 0x7E, 0x00, 0x12, 0x3E, 0x50, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x01, 0xF0, 0x90, ++0xA3, 0x37, 0xE0, 0xFF, 0x11, 0x17, 0x22, 0xAD, 0x07, 0x90, 0xA1, 0x56, 0xE0, 0x75, 0xF0, 0x20, ++0xA4, 0xFF, 0x90, 0xA2, 0xF3, 0x31, 0x7B, 0x90, 0xA1, 0x57, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0xAE, ++0xF0, 0x90, 0xA2, 0xF5, 0xF0, 0xEE, 0xA3, 0xF0, 0x31, 0x67, 0x90, 0xA2, 0xF7, 0xF0, 0xEE, 0xA3, ++0xF0, 0xED, 0x64, 0x01, 0x60, 0x63, 0x90, 0xA1, 0x54, 0xE0, 0xFE, 0x12, 0x57, 0x86, 0x30, 0xE0, ++0x58, 0xEE, 0x31, 0x96, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x31, 0x60, 0xFE, 0x54, 0x0F, 0xFF, 0xEE, ++0xC4, 0x13, 0x13, 0x54, 0x01, 0xFD, 0x31, 0x60, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x23, 0xA3, ++0xE0, 0x30, 0xE0, 0x0F, 0x90, 0xA2, 0xF8, 0xE0, 0x90, 0xA2, 0xF1, 0xF0, 0x90, 0xA2, 0xF7, 0x31, ++0x82, 0x80, 0x0F, 0x31, 0x67, 0xFF, 0x12, 0x3E, 0x50, 0x31, 0x91, 0x20, 0xE0, 0x02, 0x7D, 0x01, ++0x11, 0xAA, 0x90, 0xA1, 0x54, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0D, 0x90, 0xA2, 0xF6, 0xE0, ++0x90, 0xA2, 0xF1, 0xF0, 0x90, 0xA2, 0xF5, 0x31, 0x82, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0xA3, 0x2E, 0xED, 0xF0, 0x90, 0xA3, 0x2D, 0xEF, 0xF0, 0xD3, 0x94, 0x07, 0x50, 0x42, ++0x7F, 0x47, 0x31, 0x52, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0xFD, 0x7F, 0x47, 0x12, ++0x46, 0x99, 0x7F, 0x46, 0x31, 0x52, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0xFD, 0x7F, 0x46, ++0x31, 0x6F, 0x60, 0x0D, 0x7F, 0x45, 0x31, 0x52, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0x80, ++0x0C, 0x7F, 0x45, 0x31, 0x52, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0xFD, 0x7F, 0x45, ++0x80, 0x46, 0x90, 0xA3, 0x2D, 0xE0, 0x24, 0xF8, 0xF0, 0x7F, 0x63, 0x31, 0x52, 0x80, 0x02, 0xC3, ++0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0xFD, 0x7F, 0x63, 0x12, 0x46, 0x99, 0x7F, 0x62, 0x31, 0x52, 0x80, ++0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0xFD, 0x7F, 0x62, 0x31, 0x6F, 0x60, 0x0E, 0x31, 0x50, 0x80, ++0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0xFD, 0x7F, 0x61, 0x80, 0x0D, 0x31, 0x50, 0x80, 0x02, 0xC3, ++0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0xFD, 0x7F, 0x61, 0x12, 0x46, 0x99, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x7F, 0x61, 0x12, 0x47, 0xA9, 0x90, 0xA3, 0x2D, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x22, ++0x11, 0xAA, 0x90, 0xA1, 0x54, 0xE0, 0x22, 0x90, 0xA2, 0xF3, 0xE0, 0xFE, 0xA3, 0xE0, 0x22, 0x12, ++0x46, 0x99, 0x90, 0xA3, 0x2E, 0xE0, 0x22, 0xFF, 0x90, 0xA2, 0x9A, 0xE5, 0xF0, 0xF0, 0xA3, 0xEF, ++0xF0, 0x22, 0xE0, 0x90, 0xA2, 0xF2, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x02, 0x48, ++0x1A, 0x90, 0xA1, 0x54, 0xE0, 0xFE, 0x54, 0x0F, 0xFF, 0xEE, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x7D, ++0x00, 0x22, 0x90, 0xA1, 0x54, 0xE0, 0xFF, 0x12, 0x57, 0x86, 0x30, 0xE0, 0x19, 0xEF, 0xC4, 0x54, ++0x0F, 0x30, 0xE0, 0x02, 0xD1, 0xB0, 0x90, 0xA1, 0x55, 0xE0, 0x30, 0xE0, 0x09, 0x31, 0x91, 0x20, ++0xE0, 0x02, 0x7D, 0x01, 0x11, 0xAA, 0x22, 0x12, 0x06, 0x89, 0xFF, 0x54, 0x80, 0xFE, 0x90, 0xA1, ++0x54, 0xE0, 0x54, 0x7F, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x40, 0xFF, 0xEE, 0x54, 0xBF, 0x12, 0x84, ++0x0A, 0x54, 0x20, 0xFD, 0xEF, 0x54, 0xDF, 0x4D, 0xFF, 0x90, 0xA1, 0x54, 0xF0, 0xEE, 0x54, 0x10, ++0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0xFF, 0xF0, 0x12, 0x06, 0x89, 0x54, 0x0F, 0xFE, 0xEF, 0x54, 0xF0, ++0x4E, 0x90, 0xA1, 0x54, 0xF0, 0x12, 0x55, 0xEE, 0xFF, 0x54, 0x7F, 0x90, 0xA1, 0x56, 0x12, 0x57, ++0x82, 0xFF, 0x90, 0xA1, 0x55, 0xE0, 0x54, 0xFE, 0x4F, 0x12, 0x57, 0x37, 0x90, 0xA1, 0x57, 0x12, ++0x82, 0x78, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0xA1, 0x55, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0x31, ++0x91, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x01, 0xAA, 0x90, 0xA1, 0x6D, 0x12, 0x45, 0xAC, 0x90, 0xA1, ++0x6C, 0xEF, 0xF0, 0x12, 0x45, 0xB5, 0x6A, 0x83, 0x00, 0x6A, 0x88, 0x01, 0x6A, 0x8D, 0x08, 0x6A, ++0x92, 0x09, 0x6A, 0x97, 0x0A, 0x6A, 0x9C, 0x12, 0x6A, 0xA1, 0x13, 0x6A, 0xA5, 0x14, 0x6A, 0xAA, ++0x20, 0x6A, 0xAF, 0x25, 0x6A, 0xB4, 0x26, 0x6A, 0xB9, 0x40, 0x6A, 0xBE, 0x42, 0x6A, 0xC3, 0x43, ++0x6A, 0xC7, 0x44, 0x6A, 0xEA, 0x47, 0x6A, 0xCC, 0x49, 0x6A, 0xD1, 0xC2, 0x6A, 0xD6, 0xC4, 0x00, ++0x00, 0x6A, 0xDB, 0x51, 0xEB, 0x02, 0x82, 0x31, 0x51, 0xEB, 0x02, 0x79, 0xAC, 0x51, 0xEB, 0x02, ++0x84, 0x29, 0x51, 0xEB, 0x02, 0x85, 0x0E, 0x51, 0xEB, 0x02, 0x85, 0x2F, 0x51, 0xEB, 0x02, 0x85, ++0x38, 0x51, 0xEB, 0x21, 0xC7, 0x51, 0xEB, 0x02, 0x85, 0xE0, 0x51, 0xEB, 0x02, 0x82, 0x7F, 0x51, ++0xEB, 0x02, 0x85, 0xEF, 0x51, 0xEB, 0x02, 0x82, 0xF1, 0x51, 0xEB, 0x02, 0x55, 0xF4, 0x51, 0xEB, ++0x02, 0x57, 0x54, 0x51, 0xEB, 0x81, 0x76, 0x51, 0xEB, 0x02, 0x66, 0xD0, 0x51, 0xEB, 0x02, 0x73, ++0xAE, 0x51, 0xEB, 0x02, 0x85, 0xF7, 0x51, 0xEB, 0x02, 0x85, 0xFF, 0x90, 0x01, 0xC0, 0xE0, 0x44, ++0x01, 0xF0, 0x90, 0xA1, 0x6C, 0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, 0x90, 0xA1, 0x6D, 0x02, 0x45, ++0xA3, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0xA3, 0x29, 0xF0, 0x90, 0xA3, 0x29, 0xE0, 0xFD, ++0x70, 0x02, 0x61, 0xFB, 0x90, 0xA0, 0x0E, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, ++0x0A, 0xEF, 0x14, 0xFF, 0x90, 0xA0, 0x0F, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, ++0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0xA3, 0x25, 0xE0, ++0x12, 0x77, 0xDB, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, ++0x02, 0x61, 0xDE, 0xE4, 0x90, 0xA3, 0x2A, 0xF0, 0x90, 0xA3, 0x2A, 0xE0, 0xF9, 0xC3, 0x94, 0x04, ++0x50, 0x42, 0x71, 0xFD, 0xA4, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, 0x2F, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, ++0x74, 0xD0, 0x91, 0x05, 0x90, 0x9F, 0xBE, 0x12, 0x45, 0x97, 0xE5, 0x82, 0x29, 0x12, 0x5C, 0xB6, ++0xEF, 0x71, 0xFC, 0xA4, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xF0, 0x91, 0x05, 0x90, 0x9F, ++0xC2, 0x12, 0x45, 0x97, 0xE5, 0x82, 0x29, 0x12, 0x5C, 0xB6, 0xEF, 0xF0, 0x90, 0xA3, 0x2A, 0xE0, ++0x04, 0xF0, 0x80, 0xB4, 0x90, 0xA3, 0x29, 0xE0, 0xFF, 0x90, 0xA3, 0x25, 0x31, 0x58, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0x90, 0xA3, 0x29, 0xF0, 0x90, 0xA3, 0x25, 0xE0, 0xFF, 0x74, ++0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, 0xA3, ++0x25, 0xE0, 0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0xA0, 0x0F, 0xD1, 0x4B, 0xB4, 0x0A, 0x02, ++0x7F, 0x01, 0xEF, 0x70, 0x02, 0x41, 0xFB, 0xE4, 0x90, 0xA0, 0x0F, 0xF0, 0x41, 0xFB, 0x90, 0x01, ++0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0xA3, 0x25, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0x71, 0xFC, ++0x90, 0x01, 0xD0, 0x12, 0x45, 0x97, 0xE0, 0x90, 0x01, 0xC3, 0xF0, 0x22, 0xF0, 0x90, 0xA3, 0x25, ++0xE0, 0x75, 0xF0, 0x04, 0x22, 0x2F, 0xF5, 0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, ++0xA0, 0x0F, 0xE0, 0x75, 0xF0, 0x08, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA0, ++0x0F, 0xE0, 0xFF, 0x90, 0xA0, 0x0E, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, ++0xEF, 0x70, 0x3E, 0x90, 0xA0, 0x0E, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, 0x9F, 0xBE, 0x12, 0x45, ++0x97, 0xE0, 0xFD, 0xEE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0xBF, 0xF9, 0x74, 0x9F, 0x35, 0xF0, 0xFA, ++0x7B, 0x01, 0xAF, 0x05, 0x51, 0x38, 0x90, 0xA0, 0x0E, 0xD1, 0x4B, 0xB4, 0x0A, 0x02, 0x7F, 0x01, ++0xEF, 0x60, 0x05, 0xE4, 0x90, 0xA0, 0x0E, 0xF0, 0x51, 0xF1, 0x90, 0x9F, 0x86, 0xE0, 0x44, 0x02, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x06, 0x89, 0x90, 0xA1, 0x70, 0xF0, 0x12, 0x55, 0xEE, ++0x12, 0x57, 0x34, 0xFD, 0xE4, 0xFF, 0x74, 0x74, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, 0x83, ++0xE4, 0xF0, 0x0F, 0xEF, 0xB4, 0x0C, 0xEF, 0xED, 0x30, 0xE0, 0x48, 0xD1, 0x2B, 0x40, 0x44, 0xA3, ++0xE0, 0xD3, 0x94, 0x80, 0x40, 0x3D, 0x90, 0xA1, 0x74, 0x74, 0x01, 0xB1, 0xD8, 0x90, 0xA1, 0x75, ++0xB1, 0xD7, 0x78, 0x08, 0x12, 0x08, 0x47, 0x90, 0xA1, 0x76, 0xB1, 0xD7, 0x78, 0x10, 0x12, 0x08, ++0x47, 0x90, 0xA1, 0x77, 0xB1, 0xD7, 0x78, 0x18, 0x12, 0x08, 0x47, 0x90, 0xA1, 0x78, 0xEF, 0xD1, ++0x1B, 0x90, 0xA1, 0x80, 0x74, 0x05, 0xF0, 0x90, 0x93, 0x81, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, ++0x00, 0xA1, 0xCB, 0xED, 0x30, 0xE1, 0x62, 0x90, 0xA1, 0x74, 0x74, 0x02, 0xF0, 0xD1, 0x2B, 0x50, ++0x1A, 0xE0, 0xFC, 0xF1, 0xDA, 0xD1, 0x33, 0xEC, 0xD1, 0x0F, 0xD1, 0x23, 0xF0, 0xEE, 0xA3, 0xF0, ++0x90, 0xA1, 0x70, 0xB1, 0xFD, 0xE4, 0xF0, 0xA3, 0xF0, 0x80, 0x06, 0x90, 0xA1, 0x75, 0x74, 0xEA, ++0xF0, 0x90, 0xA1, 0x71, 0xE0, 0xD3, 0x94, 0x80, 0x50, 0x1F, 0xE0, 0xFC, 0xF1, 0xDA, 0xE0, 0xFE, ++0xA3, 0xE0, 0x90, 0xA1, 0x79, 0xF0, 0xEE, 0xA3, 0xF0, 0xEC, 0xD1, 0x0F, 0xD1, 0x3F, 0x90, 0xA1, ++0x71, 0xB1, 0xFD, 0xE4, 0xF0, 0xA3, 0xF0, 0x80, 0x06, 0x90, 0xA1, 0x79, 0x74, 0xEA, 0xF0, 0xD1, ++0x1C, 0x90, 0xA1, 0x80, 0x74, 0x09, 0xF0, 0xA1, 0xCB, 0xED, 0x70, 0x74, 0x90, 0xA1, 0x70, 0xE0, ++0xFD, 0xD3, 0x94, 0x80, 0x50, 0x21, 0xE0, 0x90, 0xA1, 0x74, 0xF0, 0xF1, 0xCC, 0xD1, 0x33, 0xED, ++0xB1, 0xF1, 0xD1, 0x23, 0x12, 0x5F, 0x5D, 0xE0, 0x90, 0xA1, 0x79, 0xF0, 0x90, 0xA1, 0x70, 0xB1, ++0xDF, 0xE4, 0xF0, 0xA3, 0xF0, 0x80, 0x03, 0x12, 0x85, 0xD7, 0x90, 0xA1, 0x71, 0xE0, 0xFD, 0xD3, ++0x94, 0x80, 0x50, 0x26, 0xE0, 0x90, 0xA1, 0x7A, 0xF0, 0xF1, 0xCC, 0xD1, 0x3F, 0xED, 0xB1, 0xF1, ++0xE0, 0xFE, 0xA3, 0xE0, 0x90, 0xA1, 0x7D, 0x12, 0x5F, 0x5D, 0xE0, 0x90, 0xA1, 0x7F, 0xF0, 0x90, ++0xA1, 0x71, 0xB1, 0xDF, 0xE4, 0xF0, 0xA3, 0xF0, 0x80, 0x08, 0x90, 0xA1, 0x71, 0xE0, 0x90, 0xA1, ++0x7A, 0xF0, 0x90, 0xA1, 0x72, 0x74, 0x04, 0xF0, 0x90, 0xA1, 0x80, 0x74, 0x0C, 0xF0, 0x80, 0x0B, ++0x90, 0xA1, 0x72, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0xA1, 0x80, 0xF0, 0x7B, 0x01, 0x7A, 0xA1, 0x79, ++0x72, 0xD1, 0x52, 0x7F, 0x04, 0xC1, 0xD0, 0xEF, 0xF0, 0x90, 0x93, 0x81, 0x02, 0x45, 0x7F, 0xE0, ++0xFF, 0x25, 0xE0, 0x24, 0x85, 0xF5, 0x82, 0xE4, 0x34, 0x9C, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, ++0xEF, 0x25, 0xE0, 0x24, 0x85, 0xF5, 0x82, 0xE4, 0x34, 0x9B, 0xF5, 0x83, 0x22, 0xE0, 0xFF, 0x25, ++0xE0, 0x24, 0x86, 0xF5, 0x82, 0xE4, 0x34, 0x9E, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, ++0xE0, 0x24, 0x86, 0xF5, 0x82, 0xE4, 0x34, 0x9D, 0xF5, 0x83, 0x22, 0xF0, 0x90, 0xA1, 0x72, 0x74, ++0x0D, 0xF0, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0x90, 0xA1, 0x77, 0x22, 0x90, 0xA1, 0x70, 0xE0, 0xD3, ++0x94, 0x80, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0x90, 0xA1, 0x75, 0xF0, 0xEE, 0xA3, 0xF0, 0x22, 0xE0, ++0xFE, 0xA3, 0xE0, 0x90, 0xA1, 0x7B, 0xF0, 0xEE, 0xA3, 0xF0, 0x22, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, ++0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA0, 0xA6, 0xE0, 0xFF, 0x70, 0x06, ++0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0xA0, 0xA7, 0xE0, 0xB5, 0x07, 0x04, ++0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x02, 0xF0, ++0x80, 0x29, 0xC0, 0x01, 0x90, 0xA0, 0xA7, 0xE0, 0x12, 0x96, 0x48, 0xA8, 0x01, 0xFC, 0x7D, 0x01, ++0xD0, 0x01, 0x7E, 0x00, 0x7F, 0x0F, 0x12, 0x06, 0x63, 0x90, 0xA0, 0xA7, 0xD1, 0x4B, 0xB4, 0x0A, ++0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0xA0, 0xA7, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0xE4, 0x90, 0xA2, 0x06, 0xF0, 0x90, 0xA2, 0x04, 0x74, 0x14, 0xF0, 0x90, 0xA2, 0x12, 0x74, 0x01, ++0xF0, 0xFB, 0x7A, 0xA2, 0x79, 0x04, 0xD1, 0x52, 0x7F, 0x04, 0x80, 0x04, 0xD1, 0x52, 0x7F, 0x04, ++0x90, 0xA3, 0x34, 0xEF, 0xF0, 0x7F, 0x02, 0x12, 0x44, 0xB7, 0x90, 0x9F, 0x86, 0xE0, 0xFF, 0x90, ++0xA3, 0x34, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x9F, 0x86, 0xF0, 0x22, 0x90, 0xA1, 0x7B, 0x74, 0x12, ++0xF0, 0x90, 0xA1, 0x89, 0x74, 0x05, 0xF0, 0x90, 0xA1, 0x7D, 0x12, 0x96, 0x7E, 0x90, 0xA1, 0x79, ++0xE0, 0x90, 0xA1, 0x80, 0xF0, 0x90, 0xA1, 0x7A, 0xE0, 0x90, 0xA1, 0x81, 0xF0, 0x7B, 0x01, 0x7A, ++0xA1, 0x79, 0x7B, 0xD1, 0x52, 0x7F, 0x04, 0x80, 0xB7, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0xA2, 0xB7, 0xED, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0xA2, 0xB4, 0xE0, 0x90, ++0xA2, 0xBA, 0xF0, 0x90, 0xA2, 0xB5, 0x74, 0x0C, 0xF0, 0x90, 0xA2, 0xC3, 0x74, 0x04, 0xF0, 0x7B, ++0x01, 0x7A, 0xA2, 0x79, 0xB5, 0xD1, 0xCC, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA1, 0xF4, 0xEF, ++0xF0, 0x90, 0x04, 0x7E, 0xE0, 0xF5, 0x25, 0xA3, 0xE0, 0xF5, 0x26, 0x65, 0x25, 0x60, 0x6A, 0x90, ++0xA1, 0xF5, 0x74, 0x03, 0xF0, 0x90, 0xA2, 0x03, 0x74, 0x08, 0xF0, 0xE5, 0x26, 0x04, 0x54, 0x0F, ++0xF5, 0x27, 0xE4, 0xF5, 0x24, 0xE5, 0x27, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4, ++0x34, 0x80, 0xF5, 0x83, 0xE5, 0x82, 0x25, 0x24, 0x12, 0x5C, 0xB6, 0xE0, 0xFF, 0x74, 0xF7, 0x25, ++0x24, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, 0x83, 0xEF, 0xF0, 0x05, 0x24, 0xE5, 0x24, 0xB4, 0x08, ++0xD4, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0xF5, 0xD1, 0x52, 0xE5, 0x26, 0x04, 0x54, 0x0F, 0xF5, 0x26, ++0xB4, 0x0F, 0x03, 0xE4, 0xF5, 0x26, 0x90, 0x04, 0x7F, 0xE5, 0x26, 0xF0, 0x90, 0xA1, 0xF4, 0xE0, ++0x7F, 0x04, 0x70, 0x03, 0x02, 0x7F, 0x52, 0xD1, 0xD0, 0x22, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x85, ++0xF5, 0x82, 0xE4, 0x34, 0x9C, 0xF5, 0x83, 0x22, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x86, 0xF5, 0x82, ++0xE4, 0x34, 0x9E, 0xF5, 0x83, 0x22, 0xE4, 0xFF, 0xE1, 0x4C, 0x75, 0xE8, 0x03, 0x75, 0xA8, 0x85, ++0x22, 0x7F, 0x81, 0x12, 0x77, 0xCB, 0x7F, 0x81, 0x12, 0x46, 0x99, 0x7F, 0x80, 0x12, 0x47, 0xF7, ++0xFD, 0x7F, 0x80, 0x12, 0x46, 0x99, 0x12, 0x87, 0x3F, 0x12, 0x3E, 0x11, 0x31, 0xD8, 0x12, 0x67, ++0xBD, 0x7F, 0x01, 0x12, 0x43, 0xA5, 0x90, 0xA1, 0x51, 0x74, 0x02, 0xF0, 0xFF, 0x12, 0x43, 0xA5, ++0x90, 0xA1, 0x51, 0xE0, 0x04, 0xF0, 0x12, 0x60, 0x0B, 0x11, 0x5B, 0x90, 0x01, 0xCC, 0x74, 0x0F, ++0xF0, 0x7F, 0x80, 0x12, 0x67, 0xCA, 0x7F, 0x80, 0x12, 0x46, 0x99, 0x75, 0x28, 0xFF, 0x12, 0x6F, ++0xEA, 0x31, 0xF5, 0x7F, 0x81, 0x12, 0x47, 0xA9, 0xEF, 0x44, 0x04, 0xFD, 0x7F, 0x81, 0x12, 0x46, ++0x99, 0x12, 0x87, 0x6B, 0x31, 0xBB, 0xE4, 0xFF, 0x02, 0x44, 0x2E, 0x31, 0x1D, 0x12, 0x86, 0x14, ++0x12, 0x59, 0x46, 0x12, 0x93, 0x2F, 0x11, 0x75, 0x12, 0x67, 0xA6, 0x12, 0x88, 0xCF, 0x90, 0xA1, ++0x52, 0x74, 0x01, 0xF0, 0x22, 0x90, 0xA1, 0x4A, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFD, 0xF0, 0x54, ++0xFB, 0xF0, 0x44, 0x10, 0xF0, 0x90, 0x9F, 0x8C, 0xE0, 0xFF, 0x64, 0x02, 0x70, 0x29, 0x31, 0x16, ++0x30, 0xE0, 0x02, 0x7E, 0x01, 0x90, 0xA1, 0x50, 0x31, 0x14, 0x30, 0xE1, 0x02, 0x7E, 0x01, 0x90, ++0xA1, 0x4E, 0x31, 0x14, 0x30, 0xE2, 0x02, 0x7E, 0x01, 0x90, 0xA1, 0x4F, 0xEE, 0xF0, 0x90, 0xFD, ++0x80, 0xE0, 0x90, 0x02, 0xFB, 0xF0, 0x22, 0xEF, 0x64, 0x01, 0x70, 0x1D, 0x31, 0x0D, 0x30, 0xE0, ++0x02, 0x7F, 0x01, 0x90, 0xA1, 0x50, 0x31, 0x0B, 0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, 0xA1, 0x4E, ++0x31, 0x0B, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x80, 0x23, 0x90, 0x9F, 0x8C, 0xE0, 0x64, 0x03, 0x70, ++0x20, 0x31, 0x04, 0x30, 0xE0, 0x02, 0x7F, 0x01, 0x90, 0xA1, 0x50, 0x31, 0x02, 0x30, 0xE1, 0x02, ++0x7F, 0x01, 0x90, 0xA1, 0x4E, 0x31, 0x02, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x90, 0xA1, 0x4F, 0xEF, ++0xF0, 0x22, 0xEF, 0xF0, 0x90, 0xFD, 0x78, 0xE0, 0x7F, 0x00, 0x22, 0xEF, 0xF0, 0x90, 0xFD, 0x70, ++0xE0, 0x7F, 0x00, 0x22, 0xEE, 0xF0, 0x90, 0xFD, 0x80, 0xE0, 0x7E, 0x00, 0x22, 0xE4, 0xFD, 0xFF, ++0xF1, 0xBB, 0xEF, 0x54, 0x07, 0xFF, 0xED, 0x70, 0x12, 0x31, 0x5F, 0xC0, 0x83, 0xC0, 0x82, 0x31, ++0x57, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5E, 0x80, 0x0F, 0x31, 0x5F, 0xC0, 0x83, 0xC0, ++0x82, 0x31, 0x57, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x31, ++0x6A, 0x90, 0xA0, 0xE0, 0xEF, 0xF0, 0x22, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x22, 0x74, ++0xD0, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xA0, 0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x7D, 0x10, 0xED, 0x14, 0xF9, 0x24, 0xD0, 0x31, 0x62, 0xE0, 0x60, 0x35, 0x7C, 0x08, 0xEC, ++0x14, 0x90, 0xA3, 0x35, 0xF0, 0x74, 0xD0, 0x29, 0x31, 0x62, 0xE0, 0xFB, 0x7A, 0x00, 0x90, 0xA3, ++0x35, 0xE0, 0xF1, 0xDB, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xF1, 0xD3, 0x60, ++0x0F, 0xE9, 0x75, 0xF0, 0x08, 0xA4, 0xFF, 0x90, 0xA3, 0x35, 0xE0, 0x2F, 0x04, 0xFF, 0x80, 0x06, ++0xDC, 0xCD, 0xDD, 0xBF, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x96, 0x15, 0xBF, 0x01, ++0x16, 0x90, 0xA1, 0x5A, 0xE0, 0x54, 0x30, 0xFF, 0xBF, 0x20, 0x07, 0x90, 0xA1, 0x53, 0x74, 0x01, ++0xF0, 0x22, 0xE4, 0x90, 0xA1, 0x53, 0xF0, 0x22, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, ++0x01, 0x9A, 0xE0, 0x54, 0xC0, 0x51, 0x5D, 0x90, 0x01, 0x99, 0xE0, 0x44, 0xC0, 0xF0, 0x90, 0x01, ++0x9B, 0x74, 0x80, 0xF0, 0x22, 0xE4, 0x90, 0xA1, 0x5A, 0xF0, 0xA3, 0xF0, 0x51, 0x45, 0xEF, 0x64, ++0x01, 0x60, 0x3B, 0xC3, 0x90, 0xA1, 0x5B, 0xE0, 0x94, 0x88, 0x90, 0xA1, 0x5A, 0xE0, 0x94, 0x13, ++0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, ++0x1D, 0x90, 0xA1, 0x5A, 0x51, 0x98, 0x71, 0x2B, 0xD3, 0x90, 0xA1, 0x5B, 0xE0, 0x94, 0x32, 0x90, ++0xA1, 0x5A, 0xE0, 0x94, 0x00, 0x40, 0xC5, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE3, 0xBE, 0x90, 0x01, ++0xC7, 0x74, 0xFE, 0xF0, 0x22, 0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0, 0x44, 0x0B, 0x51, 0x5D, 0x90, ++0x01, 0x98, 0xE0, 0x54, 0xC0, 0x7F, 0x00, 0xB4, 0x40, 0x02, 0x7F, 0x01, 0x22, 0xF0, 0x7F, 0x0A, ++0x7E, 0x00, 0x02, 0x3E, 0x50, 0xE4, 0x90, 0xA3, 0x2F, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x86, 0xE0, ++0x20, 0xE1, 0x22, 0xC3, 0x90, 0xA3, 0x30, 0xE0, 0x94, 0xD0, 0x90, 0xA3, 0x2F, 0xE0, 0x94, 0x07, ++0x40, 0x0A, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x00, 0x22, 0x90, 0xA3, 0x2F, 0x51, ++0x98, 0x51, 0x5E, 0x80, 0xD7, 0x7F, 0x01, 0x22, 0xE4, 0x75, 0xF0, 0x01, 0x02, 0x08, 0xD6, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0x08, 0xEE, 0x71, 0x32, 0x90, 0xA3, 0x08, 0x12, ++0x96, 0x87, 0xE0, 0x60, 0x23, 0xC3, 0x90, 0xA3, 0x0B, 0xE0, 0x94, 0xE8, 0x90, 0xA3, 0x0A, 0xE0, ++0x94, 0x03, 0x40, 0x0B, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x00, 0x80, 0x0B, 0x90, ++0xA3, 0x0A, 0x51, 0x98, 0x51, 0x5E, 0x80, 0xD4, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, ++0xA3, 0x1F, 0x71, 0x34, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, ++0xA3, 0x1F, 0xE0, 0x6F, 0x60, 0x34, 0xC3, 0x90, 0xA3, 0x21, 0xE0, 0x94, 0x88, 0x90, 0xA3, 0x20, ++0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0xA3, 0x20, ++0x51, 0x98, 0x71, 0x2B, 0xD3, 0x90, 0xA3, 0x21, 0xE0, 0x94, 0x32, 0x90, 0xA3, 0x20, 0xE0, 0x94, ++0x00, 0x40, 0xC1, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0, 0xBA, 0x22, 0x7F, 0x14, 0x7E, 0x00, 0x02, ++0x3E, 0x50, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x12, 0x88, 0x48, 0x7F, ++0x08, 0x12, 0x47, 0xA9, 0xEF, 0x54, 0xEF, 0xFD, 0x7F, 0x08, 0x12, 0x46, 0x99, 0xE4, 0xFF, 0x51, ++0xDF, 0x90, 0xA0, 0xE2, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x71, 0xEB, 0x71, 0x3C, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA0, 0xE9, 0xE0, 0xFF, 0x60, 0x03, ++0xB4, 0x08, 0x08, 0x12, 0x94, 0xB0, 0xBF, 0x01, 0x02, 0x71, 0x59, 0x22, 0xF1, 0xA6, 0x90, 0xA0, ++0xA8, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x02, 0x86, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0xA0, 0xAA, 0xE0, ++0x44, 0x01, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x51, 0xB1, 0x90, 0x05, 0x52, 0xE0, 0x54, 0x07, ++0x04, 0x90, 0xA0, 0xB5, 0x71, 0x35, 0x90, 0x04, 0x22, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x12, 0x55, ++0xEE, 0xF5, 0x0F, 0x12, 0x57, 0x38, 0xF5, 0x10, 0x12, 0x06, 0x89, 0xF5, 0x11, 0x90, 0x9F, 0x8D, ++0xF0, 0xE0, 0xFF, 0x12, 0x5F, 0xC5, 0xEF, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x0F, 0xF0, 0xA3, ++0xE4, 0xF0, 0xA3, 0xE5, 0x10, 0x71, 0x35, 0xFB, 0xFA, 0x7D, 0x01, 0x7F, 0x20, 0x12, 0x7B, 0x6A, ++0xE5, 0x0F, 0x60, 0x06, 0xFD, 0xAF, 0x10, 0x12, 0x91, 0xD6, 0x22, 0x90, 0xA0, 0xE2, 0xE0, 0x44, ++0x10, 0xF0, 0x90, 0xA0, 0xF1, 0xE0, 0xFD, 0x7F, 0x93, 0x12, 0x46, 0x99, 0x90, 0xA0, 0xE7, 0xE0, ++0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, 0x06, 0x90, 0x01, ++0x2F, 0x74, 0x90, 0xF0, 0x7F, 0x08, 0x12, 0x47, 0xA9, 0xEF, 0x44, 0x10, 0xFD, 0x7F, 0x08, 0x12, ++0x46, 0x99, 0x7F, 0x01, 0x51, 0xDF, 0x7F, 0x90, 0x12, 0x47, 0xE0, 0xFD, 0x7F, 0x90, 0x12, 0x46, ++0x99, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x3E, 0x50, 0x90, 0xA0, 0xB5, 0xE0, 0xFD, 0x7C, 0x00, 0xA3, ++0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x07, 0x15, 0xED, 0x4C, 0x70, 0x05, 0x90, 0xA0, 0xC2, 0x80, ++0x2A, 0xED, 0x64, 0x01, 0x4C, 0x70, 0x05, 0x90, 0xA0, 0xC3, 0x80, 0x1F, 0xED, 0x64, 0x02, 0x4C, ++0x70, 0x05, 0x90, 0xA0, 0xC4, 0x80, 0x14, 0xED, 0x64, 0x03, 0x4C, 0x70, 0x05, 0x90, 0xA0, 0xC5, ++0x80, 0x09, 0xED, 0x64, 0x04, 0x4C, 0x70, 0x0D, 0x90, 0xA0, 0xC6, 0xE0, 0xFF, 0x12, 0x95, 0x5C, ++0x90, 0xA0, 0xB6, 0x51, 0x98, 0x22, 0xF1, 0xC3, 0x12, 0x48, 0x47, 0xE4, 0xFF, 0x91, 0x9B, 0x90, ++0xA0, 0xAA, 0xE0, 0x30, 0xE0, 0x02, 0x91, 0x38, 0x02, 0x4E, 0x29, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0xA0, 0xE3, 0xE0, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x1F, 0x90, 0xA2, 0xD6, 0x74, ++0x1E, 0xF0, 0x90, 0xA2, 0xE4, 0x74, 0x01, 0xF0, 0x90, 0xA2, 0xD8, 0xEF, 0xF0, 0x7B, 0x01, 0x7A, ++0xA2, 0x79, 0xD6, 0x12, 0x6E, 0x52, 0x7F, 0x04, 0x12, 0x7F, 0x52, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0xE4, 0xFB, 0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x44, 0xDE, 0x90, 0xA1, 0x6B, 0xEF, 0xF0, 0x60, 0xF0, ++0x90, 0x9F, 0x86, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE0, ++0x0E, 0x90, 0x9F, 0x86, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xFF, 0xB1, 0x34, 0x12, 0x89, 0xF4, 0xB1, ++0x2B, 0xFF, 0x30, 0xE1, 0x06, 0x54, 0xFD, 0xF0, 0x12, 0x6C, 0x17, 0xB1, 0x2B, 0xFF, 0x30, 0xE2, ++0x05, 0x54, 0xFB, 0xF0, 0xF1, 0x40, 0xB1, 0x2B, 0xFF, 0x30, 0xE5, 0x0B, 0x54, 0xDF, 0xF0, 0x51, ++0x65, 0xBF, 0x01, 0x03, 0x12, 0x60, 0xF2, 0xD2, 0xAF, 0x80, 0xB5, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, ++0x9F, 0x86, 0xE0, 0x22, 0x90, 0xA2, 0x13, 0xEF, 0xF0, 0x90, 0xA0, 0xE0, 0xE0, 0x90, 0xA2, 0x95, ++0xF0, 0xE4, 0x90, 0xA2, 0x14, 0xF0, 0x90, 0xA2, 0x95, 0xE0, 0xFE, 0x90, 0xA2, 0x14, 0xE0, 0xFF, ++0xC3, 0x9E, 0x50, 0x2C, 0xE0, 0xFE, 0xD1, 0x32, 0xE4, 0xF0, 0x75, 0xF0, 0x10, 0xEE, 0xD1, 0xB2, ++0xE0, 0x30, 0xE7, 0x09, 0x74, 0x01, 0x2F, 0xD1, 0x47, 0xE4, 0xF0, 0x80, 0x0B, 0xD1, 0xBF, 0x90, ++0xA2, 0x14, 0xE0, 0xD1, 0x32, 0x74, 0x01, 0xF0, 0x90, 0xA2, 0x14, 0xE0, 0x04, 0xF0, 0x80, 0xC6, ++0x7F, 0x0C, 0x7E, 0x00, 0x12, 0x3E, 0x50, 0xE4, 0x90, 0xA2, 0x14, 0xF0, 0x90, 0xA2, 0x95, 0xE0, ++0xFF, 0x90, 0xA2, 0x14, 0xE0, 0xFE, 0xC3, 0x9F, 0x40, 0x02, 0xC1, 0x31, 0x74, 0x15, 0x2E, 0xD1, ++0x34, 0xE0, 0x70, 0x02, 0xC1, 0x29, 0x75, 0xF0, 0x10, 0xEE, 0x90, 0x81, 0x06, 0xD1, 0x3C, 0xEE, ++0x90, 0x81, 0x07, 0xD1, 0x4F, 0xFC, 0xD1, 0xD4, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0xF0, 0x10, ++0xEC, 0x90, 0x81, 0x0A, 0xD1, 0x3C, 0xEC, 0x90, 0x81, 0x0B, 0xD1, 0x4F, 0x75, 0xF0, 0x0A, 0x12, ++0x5F, 0xEB, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x7F, 0x01, 0x90, 0xA2, 0x14, 0xE0, 0xFE, 0x75, 0xF0, ++0x10, 0x90, 0x81, 0x0B, 0x12, 0x5C, 0xB0, 0xE0, 0xFD, 0x75, 0xF0, 0x0A, 0xEE, 0x12, 0x5F, 0xEB, ++0x75, 0xF0, 0x02, 0xEF, 0xD1, 0xB8, 0xED, 0xF0, 0x0F, 0xEF, 0xB4, 0x05, 0xDC, 0x90, 0xA2, 0x14, ++0xE0, 0xFF, 0x75, 0xF0, 0x10, 0x90, 0x81, 0x09, 0x12, 0x45, 0x97, 0xE0, 0xFE, 0x74, 0x05, 0x2F, ++0xD1, 0xCA, 0xEE, 0xF0, 0x90, 0xA2, 0x14, 0xE0, 0xFF, 0x90, 0xA2, 0x13, 0xE0, 0xFD, 0xD1, 0x5B, ++0x90, 0xA2, 0x14, 0xE0, 0xD1, 0x45, 0x74, 0x01, 0xF0, 0x90, 0xA2, 0x14, 0xE0, 0x04, 0xF0, 0xA1, ++0x8C, 0x22, 0x24, 0x15, 0xF5, 0x82, 0xE4, 0x34, 0xA2, 0xF5, 0x83, 0x22, 0x12, 0x45, 0x97, 0xE0, ++0xFD, 0x75, 0xF0, 0x10, 0x22, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0x22, 0x12, ++0x45, 0x97, 0xE0, 0xFE, 0xED, 0xFF, 0x90, 0xA2, 0x14, 0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0xED, 0x60, 0x2C, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x8D, 0x01, 0xD1, 0xA2, 0x90, 0x8D, ++0x03, 0xD1, 0xA2, 0x90, 0x8D, 0x05, 0xD1, 0xA2, 0x90, 0x8D, 0x07, 0xD1, 0xA2, 0x90, 0x8D, 0x09, ++0xD1, 0xB8, 0xF0, 0xEF, 0xD1, 0xD4, 0xE4, 0xF0, 0xA3, 0xF0, 0x74, 0x05, 0x2F, 0xD1, 0xCA, 0xE4, ++0xF0, 0xD1, 0xAE, 0xE0, 0x54, 0xBF, 0x44, 0x80, 0xFE, 0xD1, 0xAE, 0xEE, 0xF0, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x12, 0x45, 0x97, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x22, 0x75, 0xF0, ++0x10, 0xEF, 0x90, 0x81, 0x03, 0x02, 0x45, 0x97, 0x12, 0x45, 0x97, 0xE4, 0xF0, 0xA3, 0x22, 0xD1, ++0xAE, 0xE0, 0x44, 0x40, 0xF0, 0x22, 0x74, 0x05, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x9B, 0xF5, ++0x83, 0x22, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0x10, 0x12, 0x45, 0xAC, 0x7F, 0x96, 0x7E, ++0x02, 0x51, 0x9F, 0xEF, 0x60, 0x45, 0xF1, 0xA6, 0xFE, 0xEF, 0x24, 0x01, 0xFF, 0xE4, 0x3E, 0xFE, ++0x90, 0xA3, 0x13, 0xEF, 0xF0, 0xEE, 0xFF, 0x90, 0xFD, 0x11, 0xF0, 0x90, 0xA3, 0x13, 0xE0, 0xFD, ++0x90, 0x02, 0x94, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA3, 0x10, 0xF1, 0xE4, 0x24, 0x02, 0xFF, 0xE4, ++0x33, 0xFE, 0x12, 0x86, 0x22, 0x90, 0xA3, 0x13, 0xE0, 0x24, 0x18, 0xFF, 0x90, 0xA3, 0x10, 0x12, ++0x45, 0xA3, 0x12, 0x86, 0x83, 0x90, 0x02, 0x96, 0x74, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFF, 0x90, 0xA0, 0xA7, 0xE0, 0xFE, 0x90, 0xA0, ++0xA6, 0xE0, 0xFD, 0xB5, 0x06, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x64, 0x01, 0x60, ++0x40, 0xED, 0x12, 0x96, 0x48, 0xFA, 0x7B, 0x01, 0xD1, 0xE0, 0x7F, 0x01, 0xEF, 0x60, 0x32, 0x90, ++0xA0, 0xA6, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x0A, 0x02, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x05, ++0xE4, 0x90, 0xA0, 0xA6, 0xF0, 0x90, 0xA0, 0xA7, 0xE0, 0xFF, 0x90, 0xA0, 0xA6, 0xE0, 0xB5, 0x07, ++0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x07, 0x90, 0x9F, 0x86, 0xE0, 0x44, 0x04, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0xE0, 0x7C, ++0x00, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x22, 0xE4, 0xFF, 0xA1, 0x34, 0xEF, 0x13, 0x13, 0x13, 0x54, ++0x1F, 0xFE, 0x22, 0xE4, 0xF5, 0x24, 0xF5, 0x25, 0xF5, 0x26, 0x22, 0x12, 0x47, 0xA9, 0xEF, 0x54, ++0xFE, 0xFD, 0x22, 0xFF, 0xEE, 0x5A, 0xFE, 0xEF, 0x5B, 0x4E, 0x22, 0xFF, 0x74, 0x01, 0x7E, 0x00, ++0xA8, 0x07, 0x08, 0x22, 0x12, 0x45, 0xA3, 0x90, 0x00, 0x0E, 0x02, 0x06, 0xA2, 0xE4, 0x90, 0xA1, ++0x62, 0xF0, 0x90, 0xA1, 0x62, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0xED, 0x90, 0x01, 0xC4, 0xF0, 0x74, ++0x77, 0xA3, 0xF0, 0x12, 0x3E, 0x44, 0xBF, 0x01, 0x03, 0x12, 0x31, 0xFC, 0xC2, 0xAF, 0x90, 0xA0, ++0xE6, 0xE0, 0x60, 0x0E, 0x90, 0xA0, 0xE9, 0xE0, 0xFF, 0x90, 0xA0, 0xE8, 0xE0, 0x6F, 0x60, 0x02, ++0x11, 0xC3, 0xC2, 0xAF, 0x12, 0x87, 0x4C, 0xBF, 0x01, 0x03, 0x12, 0x94, 0xE6, 0xD2, 0xAF, 0xD2, ++0xAF, 0x90, 0xA1, 0x53, 0xE0, 0xB4, 0x01, 0x02, 0x11, 0x42, 0x12, 0x58, 0x17, 0x12, 0x42, 0xDD, ++0x80, 0xB0, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x37, 0x4E, ++0x90, 0xA1, 0x63, 0x12, 0x08, 0x6D, 0x7F, 0x00, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0x90, 0xA1, 0x67, ++0x12, 0x08, 0x6D, 0x90, 0xA1, 0x63, 0x11, 0xB6, 0x60, 0x17, 0x90, 0xA1, 0x63, 0x11, 0xAD, 0x90, ++0xA1, 0x63, 0x12, 0x08, 0x6D, 0x90, 0xA1, 0x63, 0x11, 0xA4, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x38, ++0x45, 0x90, 0xA1, 0x67, 0x11, 0xB6, 0x60, 0x17, 0x90, 0xA1, 0x67, 0x11, 0xAD, 0x90, 0xA1, 0x67, ++0x12, 0x08, 0x6D, 0x90, 0xA1, 0x67, 0x11, 0xA4, 0x7F, 0x00, 0x7E, 0x09, 0x12, 0x38, 0x45, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x12, 0x45, 0x7F, 0x90, 0xAA, 0xB9, 0x02, 0x08, 0x6D, 0x12, 0x45, 0x7F, ++0xEF, 0x54, 0xFE, 0xFF, 0xEC, 0x22, 0x12, 0x45, 0x7F, 0xEF, 0x54, 0x01, 0xFF, 0xE4, 0xFE, 0xFD, ++0xFC, 0xEF, 0x22, 0x90, 0xA0, 0xE8, 0xE0, 0xFF, 0x7D, 0x01, 0x02, 0x49, 0x0C, 0xE4, 0xFF, 0x12, ++0x4D, 0x60, 0xBF, 0x01, 0x0E, 0x90, 0xA0, 0xE6, 0xE0, 0x60, 0x08, 0x11, 0xE4, 0x54, 0x07, 0x70, ++0x02, 0x11, 0xC3, 0x22, 0x90, 0xA0, 0xEA, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x90, 0x06, 0xA9, 0xE0, ++0xF5, 0x24, 0x54, 0xC0, 0x70, 0x07, 0x11, 0xE4, 0x54, 0xFD, 0xF0, 0x80, 0xC6, 0xE5, 0x24, 0x30, ++0xE6, 0x1D, 0x90, 0xA0, 0xE6, 0xE0, 0x64, 0x01, 0x70, 0x17, 0x90, 0xA0, 0xEA, 0xE0, 0x44, 0x01, ++0xF0, 0xB1, 0xA4, 0x64, 0x02, 0x60, 0x04, 0xF1, 0x7E, 0x80, 0x06, 0x31, 0x3C, 0x80, 0x02, 0x11, ++0xE4, 0xE5, 0x24, 0x90, 0xA0, 0xEA, 0x30, 0xE7, 0x0E, 0xE0, 0x44, 0x02, 0x12, 0x48, 0x05, 0x90, ++0xA0, 0xE1, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x31, 0x64, 0x90, 0xA0, ++0xE9, 0xE0, 0x64, 0x0C, 0x60, 0x05, 0x51, 0x59, 0x12, 0x4C, 0xDB, 0x22, 0x90, 0xA0, 0xE6, 0xE0, ++0x60, 0x0F, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x04, 0x31, 0x64, 0x80, 0x04, 0x31, 0x99, 0x11, ++0xC3, 0x02, 0x69, 0xA2, 0xF1, 0xD1, 0x54, 0x1F, 0x30, 0xE0, 0x05, 0x90, 0x01, 0x5B, 0xE4, 0xF0, ++0x90, 0x06, 0x92, 0x74, 0x02, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0xA2, 0xF1, ++0xF0, 0x90, 0xA1, 0x45, 0xE0, 0xC3, 0x13, 0x54, 0x7F, 0x12, 0x69, 0x83, 0x90, 0xA0, 0xE1, 0xE0, ++0x44, 0x08, 0xF0, 0x22, 0x12, 0x4B, 0xDE, 0x31, 0xA1, 0x90, 0xA0, 0xE1, 0xE0, 0x54, 0xF7, 0xF0, ++0x22, 0xF1, 0xAE, 0x51, 0x60, 0x7D, 0x0C, 0x7F, 0x01, 0x02, 0x4B, 0x0B, 0x8B, 0x0F, 0x8A, 0x10, ++0x89, 0x11, 0x12, 0x55, 0xEE, 0xFF, 0xF5, 0x13, 0x12, 0x06, 0x89, 0xFE, 0xC3, 0x13, 0x30, 0xE0, ++0x07, 0x12, 0x57, 0x38, 0xF5, 0x14, 0x80, 0x02, 0x8F, 0x14, 0x85, 0x13, 0x12, 0xE5, 0x12, 0xD3, ++0x95, 0x14, 0x50, 0x25, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x12, 0x06, 0x89, 0x54, 0x01, 0xFD, ++0xAF, 0x12, 0x12, 0x71, 0x20, 0xAF, 0x12, 0x12, 0x4D, 0x60, 0xEF, 0xAF, 0x12, 0x70, 0x04, 0xB1, ++0xA0, 0x80, 0x02, 0x51, 0x0D, 0x05, 0x12, 0x80, 0xD4, 0xE5, 0x13, 0x70, 0x0F, 0xFF, 0x12, 0x4D, ++0x60, 0xEF, 0x70, 0x08, 0x31, 0x94, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, 0xE4, 0xFD, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0x27, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x7D, 0x44, ++0x7F, 0x6F, 0x12, 0x4B, 0xCB, 0x12, 0x4C, 0x85, 0x90, 0xA3, 0x28, 0xE0, 0x90, 0xA3, 0x27, 0xB4, ++0x01, 0x0B, 0xE0, 0x75, 0xF0, 0x10, 0x51, 0x51, 0x44, 0x04, 0xF0, 0x80, 0x09, 0xE0, 0x75, 0xF0, ++0x10, 0x51, 0x51, 0x54, 0xFB, 0xF0, 0x51, 0x60, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, 0xF0, 0x10, ++0xEF, 0x90, 0x81, 0x05, 0x12, 0x45, 0x97, 0xE0, 0x22, 0xE4, 0xFD, 0x7F, 0x0C, 0x12, 0x49, 0x0C, ++0xE4, 0xFD, 0xFF, 0x02, 0x4B, 0xCB, 0x90, 0xA0, 0xE6, 0xE0, 0x64, 0x01, 0x70, 0x11, 0xB1, 0xA4, ++0x60, 0x04, 0x51, 0x59, 0x21, 0x64, 0x90, 0xA0, 0xE9, 0xE0, 0x70, 0x03, 0x12, 0x49, 0x08, 0x22, ++0x8F, 0x1A, 0x8D, 0x1B, 0x51, 0x4D, 0x54, 0x03, 0xF5, 0x1E, 0x75, 0xF0, 0x10, 0xEF, 0x12, 0x5F, ++0x65, 0xE0, 0xF5, 0x1C, 0x54, 0x7F, 0xF5, 0x1D, 0xE5, 0x1C, 0x54, 0x80, 0xFB, 0x12, 0x5F, 0x6B, ++0xE0, 0xFE, 0x90, 0xA1, 0x83, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x1A, 0x12, 0x57, 0x4C, 0xFD, 0xB1, ++0xC4, 0x12, 0x5B, 0x00, 0xFC, 0x54, 0x03, 0xF5, 0x20, 0xED, 0xC4, 0x54, 0x03, 0x90, 0xA1, 0x84, ++0xF0, 0x75, 0xF0, 0x0F, 0xEF, 0x90, 0x93, 0x88, 0x12, 0x45, 0x97, 0xEC, 0x54, 0xCF, 0x44, 0x10, ++0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x1A, 0x12, 0x5E, 0xE0, 0x71, 0xD2, 0x74, 0xFF, 0xF0, 0xE5, 0x1D, ++0x6E, 0x70, 0x30, 0x75, 0xF0, 0x0F, 0xE5, 0x1A, 0x12, 0x59, 0x3E, 0xC4, 0x13, 0x54, 0x07, 0x30, ++0xE0, 0x0B, 0xEB, 0x70, 0x08, 0xE5, 0x1D, 0x44, 0x80, 0xF5, 0x1C, 0x80, 0x39, 0x12, 0x5F, 0xC5, ++0xE5, 0x1A, 0xF0, 0xE4, 0xA3, 0x12, 0x60, 0xE8, 0xA3, 0xF0, 0x7B, 0x01, 0xFA, 0x7D, 0x02, 0x7F, ++0x04, 0x80, 0x57, 0x90, 0xA1, 0x83, 0xE0, 0xFD, 0xE5, 0x1D, 0xC3, 0x9D, 0x50, 0x0D, 0xAB, 0x1A, ++0xAF, 0x1D, 0xB1, 0xD9, 0xB1, 0xCE, 0xE0, 0xF5, 0x1C, 0x80, 0x0B, 0x90, 0xA1, 0x83, 0xE0, 0xFF, ++0xB1, 0x0B, 0xEF, 0xF0, 0x8F, 0x1C, 0x71, 0xD5, 0x12, 0x91, 0x77, 0x12, 0x5F, 0xC5, 0xE5, 0x1C, ++0x12, 0x91, 0x9F, 0xE5, 0x1E, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x1B, 0xF0, 0x7B, 0x01, 0x7A, ++0x00, 0x7D, 0x05, 0x7F, 0x04, 0x71, 0x6A, 0x90, 0xA2, 0xFC, 0xE5, 0x1E, 0xF0, 0xAB, 0x1B, 0x02, ++0x5C, 0xCB, 0x7B, 0x01, 0x7A, 0x00, 0x7D, 0x05, 0x7F, 0x01, 0x90, 0x9F, 0x8D, 0xE0, 0xFE, 0x60, ++0x60, 0xEF, 0x54, 0x3F, 0x60, 0x5B, 0x90, 0xA2, 0xA4, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xEB, 0xA3, ++0xF0, 0xEA, 0xA3, 0xF0, 0x90, 0xA2, 0x9A, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0xA2, 0xA8, 0xF0, 0xEC, ++0xA3, 0xF0, 0x90, 0xA2, 0x9C, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0xA2, 0xAA, 0xF0, 0xEC, 0xA3, 0xF0, ++0x90, 0xA2, 0x9E, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0xA2, 0xAC, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0xA2, ++0xA0, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0xA2, 0xAE, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0xA2, 0xA2, 0x74, ++0xFE, 0xF0, 0x90, 0xA2, 0xB0, 0x74, 0x0C, 0xF0, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xA2, 0x12, 0x6E, ++0xCC, 0x22, 0x54, 0xF0, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x1A, 0x90, 0x93, 0x92, 0x02, 0x45, 0x97, ++0x8F, 0x1A, 0x8B, 0x1B, 0xAE, 0x05, 0x51, 0x4D, 0x54, 0x03, 0xF5, 0x1D, 0x75, 0xF0, 0x10, 0xEF, ++0x12, 0x5F, 0x65, 0xE0, 0xF5, 0x1C, 0x54, 0x7F, 0xFF, 0x90, 0xA1, 0x84, 0xF0, 0x12, 0x5F, 0x6B, ++0xE0, 0xFD, 0x90, 0xA1, 0x87, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x1A, 0x90, 0x93, 0x86, 0x12, 0x45, ++0x97, 0xE0, 0x90, 0xA1, 0x86, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x1A, 0x12, 0x57, 0x4C, 0xFC, 0x54, ++0x03, 0xF5, 0x1E, 0x75, 0xF0, 0x0F, 0xE5, 0x1A, 0x12, 0x5B, 0x00, 0xFB, 0x54, 0x03, 0xF5, 0x20, ++0xEC, 0xC4, 0xB1, 0xC4, 0x90, 0x93, 0x88, 0x12, 0x45, 0x97, 0xEB, 0x54, 0xCF, 0x44, 0x20, 0xF0, ++0x75, 0xF0, 0x0F, 0xE5, 0x1A, 0x12, 0x5E, 0xE0, 0x71, 0xD2, 0x74, 0xFF, 0xF0, 0xEF, 0xD3, 0x9D, ++0x40, 0x0C, 0x90, 0xA1, 0x87, 0xE0, 0x90, 0xA1, 0x84, 0xF0, 0xF5, 0x1C, 0x80, 0x0F, 0x90, 0xA1, ++0x86, 0xE0, 0xFF, 0x90, 0xA1, 0x84, 0xE0, 0xD3, 0x9F, 0x50, 0x02, 0xA1, 0x0A, 0x90, 0xA1, 0x85, ++0xEE, 0xF0, 0xE4, 0x90, 0xA1, 0x83, 0xF0, 0x90, 0xA1, 0x85, 0xE0, 0xFF, 0x90, 0xA1, 0x83, 0xE0, ++0xC3, 0x9F, 0x50, 0x41, 0xE5, 0x1C, 0x30, 0xE7, 0x03, 0xA3, 0x80, 0x1B, 0x90, 0xA1, 0x86, 0xE0, ++0xFD, 0x90, 0xA1, 0x84, 0xE0, 0xFF, 0xD3, 0x9D, 0x40, 0x12, 0x90, 0xA1, 0x8B, 0xEE, 0xF0, 0xAB, ++0x1A, 0xD1, 0x08, 0x7E, 0x01, 0xB1, 0xCE, 0xE0, 0xF5, 0x1C, 0x80, 0x0D, 0x90, 0xA1, 0x86, 0xE0, ++0xFF, 0xF5, 0x1C, 0xB1, 0x0B, 0xEF, 0xF0, 0x80, 0x0C, 0x1E, 0xEE, 0x60, 0x08, 0x90, 0xA1, 0x83, ++0xE0, 0x04, 0xF0, 0x80, 0xB2, 0x12, 0x5F, 0xC5, 0xE5, 0x1A, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, ++0x1C, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x1D, 0x12, 0x73, 0x35, 0x7B, 0x01, 0xFA, 0x7D, 0x05, ++0x7F, 0x08, 0x71, 0x6A, 0x75, 0xF0, 0x0F, 0xE5, 0x1A, 0x12, 0x5E, 0xE0, 0x54, 0x0F, 0x60, 0x0F, ++0xE5, 0x1B, 0xB4, 0x02, 0x0A, 0x90, 0xA2, 0xFC, 0xE5, 0x1D, 0xF0, 0x7B, 0x01, 0x80, 0x08, 0x90, ++0xA2, 0xFC, 0xE5, 0x1D, 0xF0, 0xE4, 0xFB, 0x12, 0x5C, 0xCB, 0x22, 0x75, 0xF0, 0x0F, 0xE5, 0x1A, ++0x90, 0x93, 0x8B, 0x02, 0x45, 0x97, 0xE4, 0xFE, 0x75, 0xF0, 0x0F, 0xEF, 0x12, 0x5E, 0xE0, 0xC4, ++0x54, 0x0F, 0xFD, 0x51, 0x4D, 0x54, 0x03, 0xF9, 0x75, 0xF0, 0x0F, 0xEF, 0x12, 0x5F, 0x70, 0xE0, ++0xF5, 0x25, 0x75, 0xF0, 0x0F, 0xEF, 0xB1, 0x10, 0xE0, 0x54, 0x7F, 0xFC, 0xD3, 0x94, 0x1B, 0x50, ++0x4D, 0xEC, 0xC3, 0x94, 0x0C, 0x40, 0x47, 0x0D, 0xED, 0x94, 0x04, 0x40, 0x2F, 0xE4, 0xFD, 0x75, ++0xF0, 0x0F, 0xEF, 0x12, 0x57, 0x2E, 0xE0, 0xFB, 0x75, 0xF0, 0x0F, 0xEF, 0x12, 0x91, 0xB3, 0xEB, ++0xF0, 0xEC, 0xC3, 0x94, 0x14, 0x40, 0x02, 0x7E, 0x08, 0xC3, 0xEC, 0x9E, 0x24, 0xF5, 0x25, 0xE0, ++0x25, 0xE0, 0xFE, 0x75, 0xF0, 0x0F, 0xEF, 0x12, 0x91, 0x60, 0xEE, 0xF0, 0xED, 0x54, 0x0F, 0xC4, ++0x54, 0xF0, 0xFE, 0x75, 0xF0, 0x0F, 0xEF, 0x12, 0x5E, 0xE0, 0x54, 0x0F, 0x4E, 0xF0, 0x75, 0xF0, ++0x0F, 0xEF, 0xB1, 0x10, 0xE0, 0xFD, 0x90, 0xA2, 0xFC, 0xE9, 0xF0, 0xE4, 0xFB, 0x02, 0x5C, 0xCF, ++0x7D, 0x01, 0x41, 0x0F, 0x90, 0xA0, 0xE4, 0xE0, 0x54, 0x0F, 0x22, 0xE4, 0xFF, 0x12, 0x4D, 0x60, ++0xBF, 0x01, 0x10, 0x90, 0xA0, 0xE6, 0xE0, 0x60, 0x0A, 0xB1, 0xA4, 0x64, 0x02, 0x60, 0x02, 0xE1, ++0x7E, 0x31, 0x3C, 0x22, 0x54, 0x03, 0xF5, 0x1F, 0x75, 0xF0, 0x0F, 0xE5, 0x1A, 0x22, 0x75, 0xF0, ++0x0F, 0xE5, 0x1A, 0x90, 0x93, 0x91, 0x02, 0x45, 0x97, 0x90, 0xA1, 0x85, 0xED, 0xF0, 0xA9, 0x03, ++0xEF, 0x04, 0xF5, 0x21, 0x90, 0xA1, 0x85, 0xE0, 0xFF, 0xE5, 0x21, 0xD3, 0x9F, 0x50, 0x0F, 0xAD, ++0x01, 0xD1, 0x60, 0x60, 0x05, 0x85, 0x21, 0x22, 0x80, 0x04, 0x05, 0x21, 0x80, 0xE6, 0x75, 0xF0, ++0x0F, 0xE9, 0xB1, 0xD3, 0xE5, 0x22, 0xF0, 0x22, 0x90, 0xA1, 0x8A, 0xEB, 0xF0, 0xA9, 0x05, 0xE4, ++0xF5, 0x21, 0xF5, 0x22, 0xEF, 0x14, 0xF5, 0x21, 0xE9, 0xFF, 0xAD, 0x21, 0xED, 0x33, 0x95, 0xE0, ++0xFC, 0xC3, 0xED, 0x9F, 0x74, 0x80, 0xF8, 0x6C, 0x98, 0x40, 0x28, 0xE5, 0x21, 0x70, 0x04, 0x89, ++0x23, 0x80, 0x20, 0x90, 0xA1, 0x8A, 0xE0, 0xFD, 0xD1, 0x60, 0x60, 0x13, 0x85, 0x21, 0x23, 0x05, ++0x22, 0x90, 0xA1, 0x8B, 0xE0, 0x65, 0x22, 0x60, 0x0A, 0xE5, 0x23, 0xD3, 0x99, 0x40, 0x04, 0x15, ++0x21, 0x80, 0xC5, 0x90, 0xA1, 0x8A, 0xE0, 0x75, 0xF0, 0x0F, 0xB1, 0xD3, 0xE5, 0x23, 0xF0, 0x22, ++0xAF, 0x21, 0x12, 0x5F, 0x76, 0xEF, 0xF4, 0x22, 0x12, 0x4D, 0x58, 0x70, 0x17, 0x90, 0xA0, 0xE6, ++0xE0, 0x60, 0x11, 0x12, 0x95, 0xC0, 0x90, 0xA0, 0xE1, 0xE0, 0x12, 0x57, 0xD2, 0xF0, 0x54, 0x07, ++0x70, 0x02, 0x11, 0xC3, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, ++0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x85, 0xF0, 0x74, 0x7E, 0xA3, 0xF0, 0x12, 0x87, 0x75, 0xE5, ++0x5D, 0x30, 0xE1, 0x03, 0x12, 0x6F, 0xE6, 0xE5, 0x5D, 0x30, 0xE3, 0x02, 0xF1, 0x72, 0xE5, 0x5D, ++0x30, 0xE4, 0x02, 0xF1, 0x4D, 0xE5, 0x5D, 0x30, 0xE5, 0x03, 0x12, 0x87, 0xA2, 0xE5, 0x5F, 0x30, ++0xE0, 0x03, 0x12, 0x74, 0x86, 0xE5, 0x5F, 0x30, 0xE1, 0x03, 0x12, 0x54, 0x9F, 0xE5, 0x5F, 0x30, ++0xE2, 0x03, 0x12, 0x87, 0xDE, 0xE5, 0x5F, 0x30, 0xE3, 0x03, 0x12, 0x87, 0xEA, 0xE5, 0x5F, 0x30, ++0xE4, 0x02, 0xD1, 0x68, 0xE5, 0x5F, 0x30, 0xE5, 0x02, 0xB1, 0xAB, 0xE5, 0x5F, 0x30, 0xE6, 0x02, ++0x11, 0xCD, 0xE5, 0x5F, 0x30, 0xE7, 0x02, 0xF1, 0xBE, 0xE5, 0x60, 0x30, 0xE0, 0x02, 0xF1, 0x61, ++0xE5, 0x60, 0x30, 0xE1, 0x02, 0xF1, 0x69, 0xE5, 0x60, 0x30, 0xE4, 0x03, 0x12, 0x77, 0xB7, 0xE5, ++0x60, 0x30, 0xE5, 0x03, 0x12, 0x5F, 0xE9, 0x74, 0x85, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x7E, ++0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, ++0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x12, 0x6A, 0xF1, ++0x7F, 0x02, 0x8F, 0x6A, 0x7F, 0x02, 0x12, 0x44, 0xB7, 0x90, 0x9F, 0x86, 0xE0, 0x45, 0x6A, 0xF0, ++0x22, 0xF1, 0xB6, 0xBF, 0x03, 0x02, 0xF1, 0xC9, 0x22, 0x90, 0xA0, 0xE6, 0xE0, 0x60, 0x02, 0x51, ++0x66, 0x22, 0x90, 0xA0, 0xAA, 0xE0, 0x30, 0xE0, 0x04, 0x7F, 0x20, 0xF1, 0x52, 0x22, 0x90, 0x04, ++0x1D, 0xE0, 0x70, 0x1D, 0x90, 0x9F, 0xB8, 0xE0, 0xFF, 0x90, 0xA3, 0x17, 0x74, 0x09, 0xF0, 0x7B, ++0x18, 0xE4, 0xFD, 0x12, 0x4E, 0xF0, 0x90, 0xA3, 0x31, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x67, ++0xC3, 0x22, 0x7D, 0x01, 0x7F, 0x01, 0x61, 0x6A, 0x7D, 0x03, 0x7F, 0x01, 0x61, 0x6A, 0x90, 0x06, ++0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x22, 0x90, 0x01, 0x02, 0xE0, 0x54, 0x03, 0xFF, 0x22, 0x12, 0x77, ++0xC3, 0xF1, 0xB6, 0xBF, 0x03, 0x02, 0xF1, 0xC9, 0x22, 0x90, 0x05, 0x21, 0xE0, 0x54, 0x7F, 0xF0, ++0x22, 0x90, 0xA0, 0xE1, 0xE0, 0x13, 0x13, 0x13, 0x22, 0x7A, 0x00, 0x7D, 0x60, 0x7F, 0x01, 0x61, ++0x6A, 0x7A, 0x00, 0x7D, 0x04, 0x7F, 0x01, 0x61, 0x6A, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, ++0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0xE9, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, ++0x7F, 0x11, 0x10, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, ++0xFF, 0xA3, 0xF0, 0xED, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xC0, 0xE0, 0xC0, ++0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0x1D, 0x90, 0x01, ++0xC4, 0xED, 0xF0, 0x74, 0x80, 0x11, 0x10, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, ++0x83, 0xD0, 0xE0, 0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, ++0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, ++0x07, 0x90, 0x01, 0xC4, 0x74, 0x44, 0xF0, 0x74, 0x80, 0xA3, 0xF0, 0x11, 0xBD, 0xE5, 0x58, 0x30, ++0xE7, 0x02, 0x11, 0x9A, 0x74, 0x44, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x80, 0xA3, 0xF0, 0xD0, ++0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, ++0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90, 0x9F, 0x8C, 0xE0, 0xB4, 0x02, ++0x1B, 0x7F, 0x01, 0x7E, 0x00, 0x12, 0x3D, 0xC2, 0x7F, 0xF2, 0x12, 0x47, 0xA9, 0xEF, 0x20, 0xE6, ++0x0B, 0x7F, 0x05, 0x12, 0x47, 0xF7, 0xFD, 0x7F, 0x05, 0x12, 0x46, 0x99, 0x22, 0x7F, 0x54, 0x12, ++0x47, 0xA9, 0xE5, 0x51, 0x5F, 0xF5, 0x55, 0x7F, 0x55, 0x12, 0x47, 0xA9, 0xE5, 0x52, 0x5F, 0xF5, ++0x56, 0x7F, 0x56, 0x12, 0x47, 0xA9, 0xE5, 0x53, 0x5F, 0xF5, 0x57, 0x7F, 0x57, 0x12, 0x47, 0xA9, ++0xE5, 0x54, 0x5F, 0xF5, 0x58, 0xAD, 0x55, 0x7F, 0x54, 0x12, 0x46, 0x99, 0xAD, 0x56, 0x7F, 0x55, ++0x12, 0x46, 0x99, 0xAD, 0x57, 0x7F, 0x56, 0x12, 0x46, 0x99, 0xAD, 0x58, 0x7F, 0x57, 0x12, 0x46, ++0x99, 0x53, 0x91, 0xEF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, ++0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x05, 0xF0, 0x74, 0x81, 0xA3, 0xF0, 0x51, 0x00, 0xE5, 0x65, ++0x30, 0xE1, 0x02, 0x31, 0xE5, 0xE5, 0x65, 0x30, 0xE2, 0x03, 0x12, 0x79, 0x4C, 0xE5, 0x65, 0x30, ++0xE4, 0x03, 0x12, 0x67, 0xDB, 0xE5, 0x66, 0x30, 0xE0, 0x03, 0x12, 0x55, 0x96, 0xE5, 0x68, 0x30, ++0xE1, 0x05, 0x7F, 0x04, 0x12, 0x7F, 0x52, 0xE5, 0x68, 0x30, 0xE4, 0x02, 0x31, 0xF1, 0xE5, 0x68, ++0x30, 0xE5, 0x02, 0x31, 0x92, 0xE5, 0x68, 0x30, 0xE6, 0x02, 0x31, 0xB5, 0x74, 0x05, 0x04, 0x90, ++0x01, 0xC4, 0xF0, 0x74, 0x81, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, ++0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, ++0xE0, 0x32, 0x90, 0xA0, 0xE1, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x15, 0xEF, ++0x54, 0xBF, 0x31, 0xDC, 0x30, 0xE0, 0x06, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFE, ++0xF0, 0x12, 0x78, 0xC3, 0x22, 0x90, 0xA0, 0xE1, 0xE0, 0xFF, 0x12, 0x57, 0x86, 0x30, 0xE0, 0x1B, ++0xEF, 0x54, 0x7F, 0x31, 0xDC, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x04, 0xE0, 0x54, ++0xFD, 0xF0, 0x90, 0xA0, 0xE6, 0xE0, 0x60, 0x03, 0x12, 0x78, 0xC3, 0x22, 0xF0, 0x90, 0x04, 0xE0, ++0xE0, 0x90, 0xA0, 0xE2, 0x22, 0x90, 0xA0, 0xE6, 0xE0, 0x60, 0x03, 0x12, 0x50, 0x1F, 0x02, 0x4B, ++0x74, 0x12, 0x4D, 0x88, 0x7D, 0x02, 0x7F, 0x02, 0x12, 0x51, 0xB1, 0x7F, 0x01, 0x02, 0x74, 0x9B, ++0x90, 0x01, 0x3C, 0xE0, 0x55, 0x61, 0xF5, 0x65, 0xA3, 0xE0, 0x55, 0x62, 0xF5, 0x66, 0xA3, 0xE0, ++0x55, 0x63, 0xF5, 0x67, 0xA3, 0xE0, 0x55, 0x64, 0xF5, 0x68, 0x90, 0x01, 0x3C, 0xE5, 0x65, 0xF0, ++0xA3, 0xE5, 0x66, 0xF0, 0xA3, 0xE5, 0x67, 0xF0, 0xA3, 0xE5, 0x68, 0xF0, 0x53, 0x91, 0xDF, 0x22, ++0x32, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x0F, 0x12, 0x06, 0x89, 0x25, 0x0F, 0x90, 0x9F, 0xB7, 0xF0, ++0x12, 0x55, 0xEE, 0x25, 0x0F, 0x90, 0x9F, 0xB8, 0x12, 0x57, 0x37, 0x25, 0x0F, 0x90, 0x9F, 0xB9, ++0x51, 0x78, 0x25, 0x0F, 0x90, 0x9F, 0xBA, 0x51, 0xDF, 0x25, 0x0F, 0x90, 0x9F, 0xBB, 0xF0, 0x90, ++0x00, 0x05, 0x12, 0x06, 0xA2, 0x25, 0x0F, 0x90, 0x9F, 0xBC, 0xF0, 0x90, 0x00, 0x06, 0x12, 0x06, ++0xA2, 0x25, 0x0F, 0x90, 0x9F, 0xBD, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x03, 0x02, 0x06, 0xA2, 0x51, ++0xE6, 0x54, 0x7F, 0x90, 0xA0, 0xE6, 0xF0, 0xEF, 0x12, 0x57, 0x86, 0xA3, 0xF0, 0x12, 0x55, 0xEE, ++0xFD, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x90, 0xA0, 0xE4, 0xE0, 0x54, 0xF0, 0x4F, 0x51, 0x78, ++0xFC, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0xA0, 0xE1, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xEC, 0x54, ++0x04, 0xC3, 0x13, 0xFF, 0x90, 0xA0, 0xE3, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xED, 0x54, 0x0F, 0xC4, ++0x54, 0xF0, 0xFF, 0xA3, 0xE0, 0x54, 0x0F, 0x4F, 0x12, 0x57, 0x37, 0x90, 0xA0, 0xE5, 0x51, 0xDF, ++0xFD, 0x7F, 0x02, 0x12, 0x4B, 0x0B, 0x90, 0xA1, 0x70, 0x12, 0x45, 0xA3, 0x02, 0x54, 0x73, 0xF0, ++0x90, 0x00, 0x04, 0x02, 0x06, 0xA2, 0x90, 0xA1, 0x70, 0x12, 0x45, 0xAC, 0x12, 0x06, 0x89, 0xFF, ++0x22, 0x51, 0xE6, 0x54, 0x01, 0xFE, 0x90, 0xA1, 0x4A, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, ++0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x91, 0x0A, 0x54, 0x04, 0x25, 0xE0, 0xFD, 0xEF, 0x54, 0xF7, ++0x4D, 0xFF, 0x90, 0xA1, 0x4A, 0xF0, 0xEE, 0x54, 0x08, 0x25, 0xE0, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, ++0xF0, 0x90, 0x05, 0x52, 0xE0, 0x54, 0x07, 0xFF, 0x90, 0xA1, 0x70, 0x60, 0x13, 0x12, 0x55, 0xEB, ++0xFD, 0x90, 0x05, 0x56, 0xE0, 0xC3, 0x9D, 0x90, 0xA1, 0x4C, 0xF0, 0xA3, 0xED, 0xF0, 0x80, 0x23, ++0x12, 0x55, 0xEB, 0xFB, 0xFF, 0x90, 0x05, 0x54, 0xE0, 0xC3, 0x9F, 0xFF, 0xE4, 0x94, 0x00, 0xFE, ++0x7C, 0x00, 0x7D, 0x05, 0x12, 0x07, 0x15, 0x90, 0xA1, 0x4C, 0xEF, 0xF0, 0xEB, 0x75, 0xF0, 0x05, ++0x84, 0xA3, 0xF0, 0x90, 0xA1, 0x70, 0x12, 0x45, 0xA3, 0x12, 0x06, 0x89, 0x20, 0xE0, 0x0A, 0x12, ++0x4B, 0xC6, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x80, 0x06, 0x12, 0x4B, 0x07, 0x91, 0x03, 0xF0, 0x91, ++0x12, 0x20, 0xE0, 0x04, 0xEF, 0x54, 0xDF, 0xF0, 0x71, 0xBA, 0x30, 0xE0, 0x15, 0x90, 0xA0, 0xE6, ++0x74, 0x01, 0xF0, 0xE4, 0x90, 0xA0, 0xE8, 0xF0, 0x12, 0x55, 0xCB, 0x90, 0x05, 0x58, 0x74, 0x05, ++0xF0, 0x22, 0xE4, 0x90, 0xA0, 0xE6, 0xF0, 0x90, 0xA0, 0xE8, 0x74, 0x0C, 0xF0, 0x90, 0xA0, 0xE1, ++0xE0, 0x54, 0xFE, 0xF0, 0xA3, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0xA1, 0x4A, 0xE0, 0xC3, 0x13, ++0x22, 0x90, 0xA1, 0x4A, 0xE0, 0xFF, 0x30, 0xE0, 0x39, 0x90, 0x9F, 0x8C, 0xE0, 0x64, 0x01, 0x70, ++0x2A, 0xEF, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, 0x29, 0x90, 0xA3, 0x3B, 0xE0, 0x04, 0xF0, 0xE0, ++0xD3, 0x94, 0xC8, 0x40, 0x1D, 0x90, 0xA1, 0x4A, 0xE0, 0x44, 0x20, 0xF0, 0xE4, 0x90, 0xA3, 0x3B, ++0xF0, 0x90, 0xA1, 0x4A, 0xE0, 0x13, 0x30, 0xE0, 0x09, 0x80, 0x05, 0x71, 0xBA, 0x30, 0xE0, 0x02, ++0x91, 0x1B, 0x22, 0x90, 0xA1, 0x4A, 0xE0, 0x44, 0x04, 0x22, 0x4F, 0xFF, 0xF0, 0x12, 0x06, 0x89, ++0xFE, 0x22, 0x90, 0xA1, 0x4A, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x22, 0x90, 0xA0, 0xE1, 0xE0, 0x44, ++0x01, 0xF0, 0x90, 0xA0, 0xF1, 0x74, 0xD0, 0xF0, 0x22, 0x90, 0xA1, 0x70, 0x12, 0x45, 0xAC, 0x12, ++0x06, 0x89, 0x30, 0xE0, 0x14, 0x12, 0x73, 0x7C, 0x90, 0x9F, 0x8C, 0xE0, 0x64, 0x01, 0x70, 0x27, ++0x90, 0xFE, 0x10, 0xE0, 0x44, 0x04, 0xF0, 0x80, 0x1E, 0x90, 0xA0, 0xCC, 0xE0, 0x60, 0x16, 0x7D, ++0x10, 0xE4, 0xFF, 0x12, 0x51, 0xEF, 0x90, 0x01, 0x3C, 0xE0, 0x30, 0xE4, 0x03, 0x74, 0x10, 0xF0, ++0x90, 0x01, 0x63, 0xE4, 0xF0, 0x91, 0xDC, 0x90, 0xA1, 0x70, 0x12, 0x55, 0xEB, 0x90, 0xA0, 0xAB, ++0x12, 0x57, 0x37, 0x90, 0xA0, 0xAC, 0xF0, 0x90, 0xA0, 0xAB, 0xE0, 0x54, 0x01, 0x90, 0xA0, 0xB8, ++0xF0, 0x90, 0xA0, 0xAB, 0xE0, 0x54, 0x02, 0x90, 0xA0, 0xB9, 0xF0, 0x90, 0xA0, 0xAB, 0xE0, 0x54, ++0x04, 0x90, 0xA0, 0xBA, 0xF0, 0x90, 0xA0, 0xAB, 0xE0, 0x54, 0x08, 0x90, 0xA0, 0xBB, 0xF0, 0x90, ++0xA0, 0xAB, 0xE0, 0x54, 0x10, 0x90, 0xA0, 0xBC, 0xF0, 0x90, 0xA0, 0xAC, 0xE0, 0x54, 0x01, 0x90, ++0xA0, 0xBD, 0xF0, 0x90, 0xA0, 0xAC, 0xE0, 0x54, 0x02, 0x90, 0xA0, 0xBE, 0xF0, 0x90, 0xA0, 0xAC, ++0xE0, 0x54, 0x04, 0x90, 0xA0, 0xBF, 0xF0, 0x90, 0xA0, 0xAC, 0xE0, 0x54, 0x08, 0x90, 0xA0, 0xC0, ++0xF0, 0x90, 0xA0, 0xAC, 0xE0, 0x54, 0x10, 0x90, 0xA0, 0xC1, 0xF0, 0x22, 0xC2, 0xAF, 0x90, 0xA0, ++0xAA, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x51, 0xC1, 0x90, 0x02, 0x09, 0xE0, ++0x90, 0x04, 0x24, 0xF0, 0x90, 0x02, 0x09, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, 0x02, 0x29, 0xE0, ++0x90, 0x04, 0x57, 0xF0, 0xE4, 0x90, 0xA0, 0xB6, 0xF0, 0xA3, 0xF0, 0xD2, 0xAF, 0x22, 0xB1, 0x17, ++0x7A, 0xA0, 0x79, 0xC2, 0x02, 0x35, 0x26, 0x90, 0xA1, 0x70, 0x12, 0x45, 0xAC, 0x90, 0xA1, 0x70, ++0x12, 0x45, 0xA3, 0x8B, 0x40, 0x8A, 0x41, 0x89, 0x42, 0x75, 0x43, 0x05, 0x7B, 0x01, 0x22, 0xB1, ++0x17, 0x7A, 0xA0, 0x79, 0xC7, 0x02, 0x35, 0x26, 0x12, 0x06, 0x89, 0xFF, 0x90, 0xA0, 0xCF, 0xF0, ++0xBF, 0x01, 0x07, 0xB1, 0x4B, 0xE4, 0x90, 0xA0, 0xCF, 0xF0, 0x22, 0x7B, 0x01, 0x7A, 0xA1, 0x79, ++0x70, 0x7F, 0xF5, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x06, 0x90, 0xA1, 0x70, 0xE0, 0xA3, ++0xF0, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x70, 0x7F, 0xF6, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, ++0x08, 0x90, 0xA1, 0x70, 0xE0, 0x90, 0xA1, 0x72, 0xF0, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x70, 0x7F, ++0xF4, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x08, 0x90, 0xA1, 0x70, 0xE0, 0x90, 0xA1, 0x73, ++0xF0, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x70, 0x7F, 0xF3, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, ++0x02, 0xB1, 0xD7, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x70, 0x7F, 0xF2, 0x7E, 0x01, 0x12, 0x34, 0xC1, ++0xBF, 0x01, 0x08, 0x90, 0xA1, 0x70, 0xE0, 0x90, 0xA1, 0x75, 0xF0, 0x90, 0xA1, 0x71, 0xE0, 0xFF, ++0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0xA1, 0x79, 0xF0, 0x90, 0xA1, 0x75, 0xE0, ++0x90, 0xA1, 0x7A, 0xF0, 0x02, 0x6E, 0xEB, 0x90, 0xA1, 0x70, 0xE0, 0x90, 0xA1, 0x74, 0xF0, 0x22, ++0x12, 0x06, 0x89, 0x54, 0x01, 0xFF, 0x90, 0xA1, 0x59, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22, 0x12, ++0x06, 0x89, 0x90, 0xA1, 0x49, 0xF0, 0x22, 0x12, 0x06, 0x89, 0x90, 0xA1, 0x52, 0xF0, 0x22, 0x12, ++0x06, 0x89, 0x90, 0xA0, 0xCC, 0xF0, 0x12, 0x55, 0xEE, 0x90, 0xA0, 0xCD, 0x12, 0x57, 0x37, 0x90, ++0xA0, 0xCE, 0xF0, 0x22, 0xE4, 0x90, 0xA0, 0xA6, 0xF0, 0xA3, 0xF0, 0x90, 0xA0, 0x0E, 0xF0, 0xA3, ++0xF0, 0x22, 0xE4, 0xFC, 0xED, 0x2C, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE4, ++0xF0, 0x0C, 0xEC, 0xB4, 0x18, 0xEE, 0x74, 0x00, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, ++0xEF, 0xF0, 0xEE, 0x54, 0x3F, 0xFF, 0xD1, 0x6A, 0xD1, 0x75, 0x54, 0xF0, 0xF0, 0x74, 0x03, 0x2D, ++0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0x74, 0x0B, 0x2D, 0xF5, 0x82, ++0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x74, 0x01, 0x2D, 0xF5, 0x82, 0xE4, ++0x34, 0xFB, 0xF5, 0x83, 0x22, 0xEF, 0xF0, 0x74, 0x02, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, ++0x83, 0xE0, 0x22, 0x90, 0xA3, 0x0C, 0xEF, 0xF0, 0xA3, 0x12, 0x45, 0xAC, 0x90, 0xA3, 0x26, 0xE0, ++0xFE, 0x04, 0xF0, 0x90, 0x00, 0x01, 0xEE, 0x12, 0x06, 0xE1, 0x74, 0x00, 0x2F, 0xF9, 0xE4, 0x34, ++0xFB, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0xA3, 0x0D, 0x12, 0x45, 0xA3, ++0x8B, 0x40, 0x8A, 0x41, 0x89, 0x42, 0x75, 0x43, 0x02, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, ++0x35, 0x26, 0x90, 0xA3, 0x0C, 0xE0, 0x24, 0x02, 0xF9, 0xE4, 0x34, 0xFB, 0xFA, 0x7B, 0x01, 0xC0, ++0x03, 0xC0, 0x02, 0xC0, 0x01, 0xA3, 0x12, 0x45, 0xA3, 0xE9, 0x24, 0x02, 0xF9, 0xE4, 0x3A, 0x8B, ++0x40, 0xF5, 0x41, 0x89, 0x42, 0x90, 0xA3, 0x0D, 0x12, 0x77, 0xE4, 0xF5, 0x43, 0xD0, 0x01, 0xD0, ++0x02, 0xD0, 0x03, 0x02, 0x35, 0x26, 0x90, 0x00, 0xF1, 0xE0, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, ++0x22, 0x75, 0x59, 0x12, 0xE4, 0xF5, 0x5A, 0x75, 0x5B, 0x87, 0x75, 0x5C, 0x33, 0x90, 0x01, 0x30, ++0xE5, 0x59, 0xF0, 0xA3, 0xE5, 0x5A, 0xF0, 0xA3, 0xE5, 0x5B, 0xF0, 0xA3, 0xE5, 0x5C, 0xF0, 0x22, ++0x75, 0x61, 0x06, 0x75, 0x62, 0x01, 0x75, 0x63, 0x03, 0x75, 0x64, 0x62, 0x90, 0x01, 0x38, 0xE5, ++0x61, 0xF0, 0xA3, 0xE5, 0x62, 0xF0, 0xA3, 0xE5, 0x63, 0xF0, 0xA3, 0xE5, 0x64, 0xF0, 0x22, 0x90, ++0x01, 0x94, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22, 0x7F, 0x02, 0x90, 0xA1, ++0x51, 0xE0, 0xFE, 0xEF, 0xC3, 0x9E, 0x50, 0x10, 0xEF, 0x25, 0xE0, 0x24, 0x81, 0xF8, 0xE6, 0x30, ++0xE4, 0x03, 0x7F, 0x00, 0x22, 0x0F, 0x80, 0xE6, 0x7F, 0x01, 0x22, 0x90, 0x01, 0xE4, 0x74, 0x27, ++0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x34, 0xE0, 0x55, 0x59, 0xF5, 0x5D, 0xA3, 0xE0, 0x55, ++0x5A, 0xF5, 0x5E, 0xA3, 0xE0, 0x55, 0x5B, 0xF5, 0x5F, 0xA3, 0xE0, 0x55, 0x5C, 0xF5, 0x60, 0x90, ++0x01, 0x34, 0xE5, 0x5D, 0xF0, 0xA3, 0xE5, 0x5E, 0xF0, 0xA3, 0xE5, 0x5F, 0xF0, 0xA3, 0xE5, 0x60, ++0xF0, 0x22, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0xA1, 0xF4, 0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, ++0x01, 0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, 0x23, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, ++0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8, 0x12, 0x60, 0xBA, 0x90, ++0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x46, 0x99, 0x80, 0xFE, 0x22, 0x90, 0xA0, ++0xE9, 0xE0, 0x64, 0x02, 0x60, 0x03, 0x12, 0x50, 0xC8, 0x22, 0x12, 0x4D, 0x58, 0x70, 0x13, 0x90, ++0xA0, 0xE6, 0xE0, 0x60, 0x0D, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0x12, ++0x48, 0x05, 0x22, 0xE4, 0x90, 0xA2, 0x06, 0xF0, 0xA3, 0xF0, 0x7F, 0x83, 0x12, 0x47, 0xA9, 0x90, ++0xA2, 0x05, 0xEF, 0xF0, 0x7F, 0x83, 0x12, 0x47, 0xA9, 0xAE, 0x07, 0x90, 0xA2, 0x05, 0xE0, 0xFF, ++0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0xA2, 0x07, 0xE0, 0x94, 0x64, 0x90, 0xA2, 0x06, 0xE0, 0x94, ++0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0xA2, 0x05, 0xE0, 0xFF, 0x22, ++0x90, 0xA2, 0x06, 0x12, 0x72, 0x98, 0x80, 0xC2, 0x90, 0x01, 0xC4, 0x74, 0x48, 0xF0, 0x74, 0x88, ++0xA3, 0xF0, 0x7F, 0x90, 0x12, 0x47, 0xA9, 0xEF, 0x20, 0xE0, 0xF7, 0x74, 0x48, 0x04, 0x90, 0x01, ++0xC4, 0xF0, 0x74, 0x88, 0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, ++0xC4, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x37, 0x4E, 0x90, 0xA2, 0xCE, 0x12, 0x08, 0x6D, 0x90, ++0xA2, 0xC6, 0x12, 0x45, 0x7F, 0x12, 0x08, 0x3A, 0x90, 0xA2, 0xCE, 0x12, 0x45, 0x8B, 0x12, 0x45, ++0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0xA2, 0xC6, 0x12, 0x45, 0x7F, 0x90, ++0xA2, 0xCA, 0x12, 0x45, 0x8B, 0x12, 0x45, 0x54, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, ++0x12, 0x45, 0x61, 0x90, 0xA2, 0xD2, 0x12, 0x08, 0x6D, 0x90, 0xA2, 0xD2, 0x12, 0x78, 0xA4, 0x90, ++0xA2, 0xC4, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x38, 0x45, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, ++0xA1, 0x54, 0xE0, 0x54, 0x7F, 0xF0, 0x54, 0xBF, 0xF0, 0x54, 0xDF, 0xF0, 0x54, 0xF0, 0xF0, 0xE4, ++0x90, 0xA1, 0x56, 0xF0, 0x90, 0xA1, 0x54, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x8E, 0x1A, 0x8F, 0x1B, ++0x75, 0x1C, 0x00, 0x75, 0x1D, 0x01, 0xE4, 0xFB, 0xFA, 0xE5, 0x1B, 0xB5, 0x05, 0x0D, 0xE5, 0x1A, ++0xB5, 0x04, 0x08, 0x75, 0x1C, 0x00, 0x75, 0x1D, 0x64, 0x21, 0xEF, 0xE5, 0x1B, 0x45, 0x1A, 0x60, ++0x09, 0xD3, 0xE5, 0x1B, 0x9D, 0xE5, 0x1A, 0x9C, 0x40, 0x07, 0xE4, 0xF5, 0x1C, 0xF5, 0x1D, 0x21, ++0xEF, 0xD3, 0xED, 0x94, 0xFF, 0xEC, 0x94, 0x0F, 0x50, 0x06, 0x7A, 0x00, 0x7B, 0x04, 0x80, 0x2B, ++0xD3, 0xED, 0x94, 0xFF, 0xEC, 0x94, 0x1F, 0x50, 0x06, 0x7A, 0x00, 0x7B, 0x03, 0x80, 0x1C, 0xD3, ++0xED, 0x94, 0xFF, 0xEC, 0x94, 0x3F, 0x50, 0x06, 0x7A, 0x00, 0x7B, 0x02, 0x80, 0x0D, 0xD3, 0xED, ++0x94, 0xFF, 0xEC, 0x94, 0x7F, 0x50, 0x04, 0x7A, 0x00, 0x7B, 0x01, 0xAF, 0x03, 0xED, 0xAE, 0x04, ++0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFD, 0xAC, 0x06, 0xAF, ++0x03, 0xE5, 0x1B, 0xAE, 0x1A, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFB, 0xAA, 0x06, 0xE4, 0xF9, 0xEC, 0xC3, 0x13, 0xFC, 0xED, 0x13, 0xFD, 0xD3, 0xEB, 0x9D, ++0xEA, 0x9C, 0x40, 0x46, 0x74, 0x80, 0x7E, 0x0C, 0xA8, 0x01, 0x08, 0x80, 0x06, 0xCE, 0xA2, 0xE7, ++0x13, 0xCE, 0x13, 0xD8, 0xF8, 0x25, 0x1D, 0xF5, 0x1D, 0xEE, 0x35, 0x1C, 0xF5, 0x1C, 0xC3, 0xEB, ++0x9D, 0xFB, 0xEA, 0x9C, 0xFA, 0xED, 0x64, 0x01, 0x4C, 0x70, 0x0F, 0xC3, 0xEB, 0x94, 0x02, 0xEA, ++0x94, 0x00, 0x40, 0x06, 0x7C, 0x00, 0x7D, 0x02, 0x80, 0x10, 0xED, 0x64, 0x01, 0x4C, 0x70, 0x06, ++0xEB, 0x64, 0x01, 0x4A, 0x60, 0x08, 0xEB, 0x4A, 0x60, 0x04, 0x09, 0xB9, 0x0C, 0xA8, 0xE5, 0x1D, ++0xAE, 0x1C, 0x78, 0x06, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xF5, 0x1D, 0x8E, 0x1C, 0xAE, ++0x1C, 0xAF, 0x1D, 0x22, 0xE4, 0x90, 0xA1, 0x78, 0xF0, 0x90, 0xA1, 0x7C, 0xF0, 0x90, 0x9D, 0x85, ++0xE0, 0x04, 0xF0, 0xE4, 0xF5, 0x0F, 0x90, 0xA0, 0xE0, 0xE0, 0xFF, 0xE5, 0x0F, 0xC3, 0x9F, 0x40, ++0x03, 0x02, 0x91, 0x5A, 0x90, 0x04, 0xA0, 0xE0, 0xF5, 0x18, 0xA3, 0xE0, 0xF5, 0x19, 0x90, 0xA1, ++0x7C, 0xE0, 0xFF, 0x60, 0x10, 0x90, 0x9D, 0x85, 0xE0, 0x8F, 0xF0, 0x84, 0xE5, 0xF0, 0x70, 0x05, ++0xE4, 0xFD, 0x02, 0x91, 0x50, 0xAF, 0x0F, 0x12, 0x4D, 0x60, 0xEF, 0x70, 0x03, 0x02, 0x91, 0x55, ++0x75, 0xF0, 0x0F, 0xE5, 0x0F, 0x12, 0x57, 0x4C, 0x12, 0x57, 0x86, 0x30, 0xE0, 0x03, 0x02, 0x91, ++0x55, 0x75, 0xF0, 0x0F, 0xE5, 0x0F, 0x12, 0x5B, 0x00, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, ++0x03, 0x02, 0x91, 0x55, 0x12, 0x76, 0xD2, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x70, 0x09, 0x12, 0x76, ++0xC6, 0xE0, 0x70, 0x03, 0x02, 0x91, 0x55, 0x12, 0x5E, 0xDB, 0x54, 0xF0, 0xF0, 0xE5, 0x0F, 0x75, ++0xF0, 0x0A, 0xA4, 0x24, 0x01, 0xF9, 0x74, 0x8D, 0x35, 0xF0, 0x75, 0x11, 0x01, 0xF5, 0x12, 0x89, ++0x13, 0x12, 0x76, 0xD2, 0xE0, 0xF5, 0x16, 0xA3, 0xE0, 0xF5, 0x17, 0x12, 0x76, 0xC6, 0xE0, 0xFF, ++0x90, 0xA1, 0x6E, 0xE4, 0xF0, 0xA3, 0x12, 0x91, 0xC4, 0x12, 0x5F, 0x65, 0xE0, 0xFF, 0x90, 0xA1, ++0x6C, 0xF0, 0x54, 0x7F, 0xF5, 0x10, 0xEF, 0x54, 0x80, 0xA3, 0xF0, 0x90, 0xA1, 0x6C, 0xE0, 0xFF, ++0x75, 0xF0, 0x0F, 0xE5, 0x0F, 0x12, 0x7D, 0x10, 0xEF, 0xF0, 0xAB, 0x11, 0xAA, 0x12, 0x12, 0x07, ++0x80, 0x12, 0x69, 0x77, 0x12, 0x96, 0x22, 0xFF, 0x90, 0xA2, 0x9C, 0x12, 0x69, 0x7B, 0x90, 0x00, ++0x04, 0x12, 0x07, 0xAB, 0xFF, 0x90, 0xA2, 0x9E, 0x12, 0x69, 0x7B, 0x12, 0x96, 0x54, 0xFF, 0x90, ++0xA2, 0xA0, 0x12, 0x69, 0x7B, 0x7B, 0x01, 0x7A, 0x00, 0x7D, 0x01, 0x12, 0x95, 0xB4, 0x90, 0x00, ++0x08, 0x12, 0x07, 0xAB, 0x12, 0x69, 0x77, 0x90, 0xA1, 0x6E, 0x12, 0x96, 0xD2, 0x12, 0x95, 0xCC, ++0x90, 0xA1, 0x6C, 0x12, 0x91, 0x89, 0x7B, 0x02, 0x7A, 0x00, 0x12, 0x7F, 0xA2, 0x12, 0x57, 0x29, ++0xE0, 0xFF, 0x12, 0x5F, 0xC5, 0xEF, 0xF0, 0xE4, 0xA3, 0x12, 0x60, 0xE8, 0xA3, 0xF0, 0x7B, 0x04, ++0xFA, 0x12, 0x7F, 0xA2, 0x12, 0x5F, 0xC5, 0xE5, 0x0F, 0xF0, 0x12, 0x76, 0x45, 0x12, 0x91, 0x77, ++0xE4, 0x12, 0x60, 0xE9, 0x7B, 0x01, 0xFA, 0x7D, 0x60, 0x12, 0x95, 0xB4, 0x12, 0x96, 0x22, 0xFF, ++0xAE, 0xF0, 0x12, 0x07, 0x80, 0x12, 0x95, 0x89, 0xFE, 0x90, 0x00, 0x06, 0x12, 0x95, 0x92, 0xFE, ++0x90, 0x00, 0x08, 0x12, 0x95, 0x92, 0x90, 0xA1, 0x7D, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x96, 0x54, ++0xFD, 0xAC, 0xF0, 0x25, 0xE0, 0xFF, 0xEC, 0x33, 0xFE, 0xEF, 0x2D, 0xFD, 0xEE, 0x3C, 0x12, 0x96, ++0x06, 0x90, 0x00, 0x02, 0x12, 0x95, 0x92, 0xCF, 0x2D, 0xFD, 0xEF, 0x3C, 0xFC, 0x90, 0x00, 0x08, ++0x12, 0x07, 0xAB, 0xAE, 0xF0, 0x78, 0x02, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x2D, 0xFF, ++0xEC, 0x3E, 0x90, 0xA1, 0x81, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x07, 0x80, 0xFF, 0xC3, 0x90, 0xA1, ++0x7E, 0xE0, 0x9F, 0xFE, 0x90, 0xA1, 0x7D, 0xE0, 0x95, 0xF0, 0x90, 0xA1, 0x7F, 0xF0, 0xA3, 0xCE, ++0xF0, 0x90, 0xA1, 0x6E, 0x12, 0x95, 0xA5, 0xE5, 0x0F, 0x12, 0x6D, 0xF1, 0x12, 0x95, 0x9B, 0x50, ++0x08, 0x90, 0xA1, 0x6E, 0x12, 0x95, 0xDA, 0x80, 0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0xE5, 0x0F, 0x12, ++0x6D, 0xF1, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA1, 0x7D, 0x12, 0x95, 0xA5, 0x12, 0x6F, 0xCA, ++0x12, 0x95, 0x9B, 0x50, 0x08, 0x90, 0xA1, 0x7D, 0x12, 0x95, 0xDA, 0x80, 0x04, 0x7E, 0xFF, 0x7F, ++0xFF, 0x12, 0x6F, 0xCA, 0xEE, 0x12, 0x96, 0xDA, 0x12, 0x95, 0xA5, 0xE5, 0x0F, 0x12, 0x6E, 0x0F, ++0x12, 0x95, 0x9B, 0x50, 0x08, 0x90, 0xA1, 0x81, 0x12, 0x95, 0xDA, 0x80, 0x04, 0x7E, 0xFF, 0x7F, ++0xFF, 0xE5, 0x0F, 0x12, 0x6E, 0x0F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xC3, 0x74, 0xFF, 0x95, 0x17, ++0xFF, 0x74, 0xFF, 0x95, 0x16, 0xFE, 0x12, 0x6F, 0xD8, 0x12, 0x95, 0x9B, 0x50, 0x0A, 0xE5, 0x17, ++0x2D, 0xFF, 0xE5, 0x16, 0x3C, 0xFE, 0x80, 0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0x12, 0x6F, 0xD8, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x96, 0xE2, 0xFB, 0xC3, 0x74, 0xFF, 0x9B, 0xFF, 0x74, 0xFF, 0x9E, ++0xFE, 0x74, 0xFF, 0x94, 0x00, 0xFD, 0x74, 0xFF, 0x94, 0x00, 0xFC, 0x90, 0x93, 0x81, 0x12, 0x45, ++0x8B, 0xD3, 0x12, 0x45, 0x6E, 0x50, 0x12, 0x12, 0x96, 0xE2, 0xFF, 0xE4, 0xFC, 0xFD, 0x90, 0x93, ++0x81, 0x12, 0x45, 0x8B, 0x12, 0x45, 0x39, 0x80, 0x06, 0x74, 0xFF, 0xFF, 0xFE, 0xFD, 0xFC, 0x90, ++0x93, 0x81, 0x12, 0x08, 0x6D, 0x90, 0xA1, 0x7D, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0xA2, 0x9A, 0xCF, ++0x12, 0x96, 0xDA, 0x12, 0x96, 0xD2, 0x12, 0x96, 0x5A, 0xFF, 0xA3, 0xE0, 0x90, 0xA2, 0x9E, 0x12, ++0x95, 0xCC, 0x7B, 0x04, 0x12, 0x7F, 0xD9, 0x12, 0x6F, 0xCA, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xC0, ++0x07, 0xC0, 0x06, 0xE5, 0x0F, 0x12, 0x6E, 0x0F, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xE5, 0x0F, 0x12, ++0x6D, 0xF1, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x12, 0x6F, 0xD8, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0xA2, ++0xA0, 0xCB, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0xA2, 0x9E, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0xA2, ++0x9C, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA2, 0x9A, 0xD0, 0xE0, 0xF0, 0xA3, 0xD0, 0xE0, 0xF0, ++0x7B, 0x05, 0x12, 0x7F, 0xD9, 0x75, 0xF0, 0x0F, 0xE5, 0x0F, 0x90, 0x93, 0x93, 0x12, 0x45, 0x97, ++0xE0, 0xC3, 0x94, 0x05, 0x40, 0x03, 0x02, 0x91, 0x49, 0x75, 0xF0, 0x0F, 0xE5, 0x0F, 0x12, 0x5F, ++0x70, 0xE0, 0xFF, 0xE5, 0x10, 0xD3, 0x9F, 0x40, 0x16, 0x8F, 0x10, 0x90, 0xA1, 0x6D, 0xE0, 0x60, ++0x07, 0xE5, 0x10, 0x44, 0x80, 0xFF, 0x80, 0x02, 0xAF, 0x10, 0x90, 0xA1, 0x6C, 0xEF, 0xF0, 0x90, ++0xA1, 0x6C, 0xE0, 0x90, 0x40, 0xDF, 0x93, 0xFF, 0xD3, 0x90, 0xA1, 0x6F, 0xE0, 0x9F, 0x90, 0xA1, ++0x6E, 0xE0, 0x94, 0x00, 0x40, 0x08, 0xE5, 0x18, 0x64, 0x01, 0x60, 0x02, 0x80, 0x64, 0xD3, 0xE5, ++0x17, 0x94, 0x05, 0xE5, 0x16, 0x94, 0x00, 0x40, 0x02, 0xC1, 0x33, 0xE5, 0x18, 0x64, 0x01, 0x70, ++0x02, 0xC1, 0x33, 0x12, 0x95, 0xB9, 0x90, 0x00, 0x08, 0x12, 0x07, 0xAB, 0xFF, 0x90, 0xA1, 0x6F, ++0xE0, 0x2F, 0xFF, 0x90, 0xA1, 0x6E, 0xE0, 0x35, 0xF0, 0xFE, 0x90, 0x00, 0x06, 0x12, 0x95, 0x92, ++0xFE, 0x90, 0x00, 0x04, 0x12, 0x07, 0xAB, 0x2F, 0xFD, 0xEE, 0x35, 0xF0, 0xFC, 0xE5, 0x16, 0xC3, ++0x13, 0xFE, 0xE5, 0x17, 0x13, 0xFF, 0xD3, 0xED, 0x9F, 0xEC, 0x9E, 0x40, 0x1A, 0x12, 0x95, 0x66, ++0x90, 0xA2, 0x9E, 0x12, 0x73, 0x32, 0x7B, 0x01, 0xFA, 0x12, 0x7F, 0xA8, 0x12, 0x59, 0x39, 0x54, ++0x3F, 0xF0, 0x7B, 0x01, 0x02, 0x90, 0xA9, 0x12, 0x95, 0xB9, 0x12, 0x07, 0x80, 0x65, 0x17, 0x70, ++0x04, 0xE5, 0xF0, 0x65, 0x16, 0x70, 0x53, 0x12, 0x59, 0x39, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, ++0xFE, 0xEF, 0x54, 0x3F, 0xFF, 0xEE, 0x04, 0x54, 0x03, 0xFE, 0xC4, 0x33, 0x33, 0x54, 0xC0, 0x4F, ++0xF0, 0x12, 0x59, 0x39, 0xC4, 0x13, 0x13, 0x54, 0x03, 0xFF, 0xC3, 0x94, 0x02, 0x50, 0x03, 0x02, ++0x91, 0x49, 0x12, 0x91, 0x8B, 0x12, 0x95, 0x66, 0x90, 0xA2, 0x9E, 0xF0, 0xA3, 0xEF, 0xF0, 0x7B, ++0x02, 0x7A, 0x00, 0x12, 0x7F, 0xA8, 0xE5, 0x10, 0xD3, 0x94, 0x03, 0x50, 0x04, 0x7D, 0x01, 0x80, ++0x02, 0xE4, 0xFD, 0xAF, 0x0F, 0x12, 0x7A, 0x80, 0x80, 0x00, 0x12, 0x59, 0x39, 0x54, 0x3F, 0xF0, ++0x02, 0x91, 0x49, 0x12, 0x95, 0xB9, 0x12, 0x96, 0x22, 0xFF, 0xAE, 0xF0, 0x12, 0x07, 0x80, 0x12, ++0x95, 0x89, 0xFE, 0x90, 0x00, 0x06, 0x12, 0x95, 0x92, 0xFE, 0x90, 0xA1, 0x73, 0xF0, 0xA3, 0xEF, ++0xF0, 0x12, 0x96, 0x22, 0x2F, 0xFD, 0xEE, 0x35, 0xF0, 0x12, 0x96, 0x06, 0xED, 0x2F, 0xFD, 0xEC, ++0x3E, 0xFC, 0x12, 0x96, 0x54, 0xFB, 0xAA, 0xF0, 0x25, 0xE0, 0xFF, 0xEA, 0x33, 0xFE, 0xED, 0x2F, ++0xFF, 0xEC, 0x3E, 0xCF, 0x2B, 0xCF, 0x3A, 0x90, 0xA1, 0x75, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, ++0xA1, 0x71, 0xF0, 0xA3, 0xF0, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x4E, 0x60, 0x0D, 0xA3, 0xE0, ++0xFC, 0xA3, 0xE0, 0xFD, 0x11, 0xEC, 0x90, 0xA1, 0x71, 0xEF, 0xF0, 0x90, 0xA1, 0x6E, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0xC3, 0xE5, 0x17, 0x9F, 0xFD, 0xE5, 0x16, 0x9E, 0xFC, 0x4D, 0x60, 0x0F, 0x90, ++0xA1, 0x73, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x11, 0xEC, 0x90, 0xA1, 0x72, 0xEF, 0xF0, 0x12, 0x5A, ++0xED, 0x12, 0x91, 0x82, 0xFE, 0xEF, 0xC3, 0x9E, 0x40, 0x05, 0xEF, 0x9E, 0xFF, 0x80, 0x09, 0x12, ++0x5A, 0xED, 0xE0, 0xFF, 0xC3, 0xEE, 0x9F, 0xFF, 0x90, 0xA1, 0x77, 0xEF, 0xF0, 0x90, 0xA1, 0x71, ++0x12, 0x5F, 0xC3, 0xED, 0xF0, 0x90, 0xA1, 0x72, 0x12, 0x91, 0xCC, 0x12, 0x95, 0xD0, 0x12, 0x91, ++0xA7, 0x7B, 0x03, 0x12, 0x7F, 0xE1, 0x12, 0x96, 0x6E, 0x94, 0x04, 0x50, 0x24, 0xEF, 0x60, 0x21, ++0x12, 0x5A, 0xED, 0x12, 0x91, 0x82, 0xFE, 0xEF, 0xD3, 0x9E, 0x40, 0x0D, 0xEF, 0x94, 0x01, 0x40, ++0x08, 0x12, 0x5A, 0xED, 0xE0, 0x14, 0xF0, 0x80, 0x2B, 0x12, 0x5A, 0xED, 0xE0, 0x04, 0xF0, 0x80, ++0x23, 0x12, 0x5A, 0xED, 0xE0, 0xFF, 0x25, 0xE0, 0xFE, 0x90, 0xA1, 0x71, 0xE0, 0x13, 0x13, 0x54, ++0x3F, 0x2E, 0xFE, 0xEF, 0x13, 0x13, 0x54, 0x3F, 0xFF, 0xC3, 0xEE, 0x9F, 0xC3, 0x13, 0xFF, 0x12, ++0x5A, 0xED, 0xEF, 0xF0, 0x12, 0x5A, 0xED, 0xE0, 0xC3, 0x94, 0x64, 0x40, 0x06, 0x12, 0x5A, 0xED, ++0x74, 0x64, 0xF0, 0x74, 0x8F, 0x25, 0x10, 0x12, 0x96, 0x34, 0xE0, 0x90, 0xA1, 0x7B, 0xF0, 0x12, ++0x96, 0x6E, 0x94, 0x01, 0x50, 0x18, 0x90, 0xA1, 0x7B, 0xE0, 0xFE, 0xC3, 0x94, 0x01, 0x40, 0x05, ++0xEE, 0x14, 0xFE, 0x80, 0x02, 0x7E, 0x00, 0x90, 0xA1, 0x7B, 0xEE, 0xF0, 0x80, 0x2A, 0xEF, 0xD3, ++0x94, 0x02, 0x50, 0x02, 0x80, 0x22, 0x12, 0x96, 0x6E, 0x94, 0x04, 0x50, 0x09, 0x90, 0xA1, 0x7B, ++0xE0, 0x24, 0x02, 0xF0, 0x80, 0x12, 0xEF, 0xD3, 0x94, 0x06, 0x90, 0xA1, 0x7B, 0xE0, 0x50, 0x05, ++0x24, 0x04, 0xF0, 0x80, 0x03, 0x24, 0x06, 0xF0, 0x90, 0xA1, 0x7B, 0xE0, 0xC3, 0x94, 0x14, 0x40, ++0x03, 0x74, 0x14, 0xF0, 0x90, 0xA1, 0x7B, 0xE0, 0xFF, 0x74, 0x8F, 0x25, 0x10, 0x12, 0x96, 0x34, ++0xEF, 0xF0, 0x90, 0xA1, 0x78, 0x12, 0x5A, 0xEB, 0xE0, 0xFF, 0xC3, 0x94, 0x5A, 0x50, 0x0F, 0xC3, ++0x74, 0x5A, 0x9F, 0x13, 0x13, 0x54, 0x3F, 0xFF, 0x90, 0xA1, 0x78, 0xE0, 0x2F, 0xF0, 0x90, 0xA1, ++0x78, 0xE0, 0xC3, 0x94, 0x28, 0x40, 0x03, 0x74, 0x28, 0xF0, 0x90, 0xA1, 0x6D, 0xE0, 0x60, 0x0D, ++0x90, 0xA1, 0x78, 0xE0, 0xFF, 0xC3, 0x74, 0x53, 0x9F, 0xA3, 0xF0, 0x80, 0x0B, 0xE5, 0x10, 0x90, ++0x40, 0xA3, 0x31, 0xB9, 0x24, 0xFB, 0xA3, 0xF0, 0xE5, 0x10, 0x90, 0x40, 0xB7, 0x31, 0xB9, 0x90, ++0xA1, 0x7A, 0x12, 0x5A, 0xEC, 0x12, 0x5F, 0xC3, 0xED, 0xF0, 0x90, 0xA1, 0x7B, 0x31, 0xCC, 0xF0, ++0xEE, 0xFF, 0x31, 0xA7, 0x90, 0xA1, 0x79, 0x31, 0x89, 0x7B, 0x05, 0x12, 0x7F, 0xE1, 0xE5, 0x18, ++0x64, 0x01, 0x70, 0x42, 0xE5, 0x0F, 0x65, 0x19, 0x70, 0x3C, 0x90, 0x04, 0xA2, 0xE0, 0x90, 0xA1, ++0x6C, 0xF0, 0x90, 0x04, 0xA3, 0xE0, 0x90, 0xA1, 0x70, 0xF0, 0x90, 0xA1, 0x6C, 0xE0, 0xFF, 0x75, ++0xF0, 0x10, 0xE5, 0x0F, 0x12, 0x5F, 0x65, 0x31, 0xC4, 0x12, 0x7A, 0x51, 0x54, 0xFC, 0xFF, 0x90, ++0xA1, 0x70, 0xE0, 0x54, 0x03, 0x4F, 0xFF, 0x75, 0xF0, 0x10, 0xE5, 0x0F, 0x90, 0x81, 0x05, 0x12, ++0x45, 0x97, 0xEF, 0xF0, 0x21, 0x55, 0x90, 0xA1, 0x79, 0x31, 0x82, 0xFE, 0xD3, 0x9F, 0x50, 0x32, ++0xA3, 0xE0, 0xC3, 0x94, 0x50, 0x40, 0x0A, 0x90, 0xA1, 0x78, 0xE0, 0x94, 0x0F, 0x40, 0x02, 0x21, ++0x49, 0x31, 0x5B, 0xE4, 0xF0, 0xEE, 0x12, 0x5F, 0xC4, 0xED, 0xF0, 0x31, 0xA7, 0xE4, 0x12, 0x60, ++0xE9, 0x7B, 0x02, 0xFA, 0x12, 0x7B, 0x66, 0x7B, 0x02, 0x7D, 0x01, 0xAF, 0x0F, 0x12, 0x7B, 0xE0, ++0x21, 0x49, 0x90, 0xA1, 0x7A, 0x31, 0x82, 0xF9, 0xC3, 0x9F, 0x40, 0x57, 0x31, 0xAE, 0xE0, 0x12, ++0x57, 0x28, 0xE0, 0xFE, 0xC3, 0x9F, 0x40, 0x05, 0xEE, 0x9F, 0xFF, 0x80, 0x0B, 0x12, 0x57, 0x29, ++0xE0, 0xFF, 0x31, 0xAE, 0xE0, 0xC3, 0x9F, 0xFF, 0xEF, 0xD3, 0x94, 0x04, 0x50, 0x05, 0x31, 0x5B, ++0xE0, 0x70, 0x1A, 0x31, 0x5B, 0xE0, 0xFF, 0x12, 0x5E, 0xDB, 0x31, 0x94, 0xEF, 0xF0, 0xE9, 0x31, ++0x6B, 0x12, 0x7B, 0x62, 0x7D, 0x01, 0xAF, 0x0F, 0x12, 0x7A, 0x80, 0x80, 0x4C, 0x31, 0x5B, 0xE0, ++0xFF, 0x12, 0x5E, 0xDB, 0x31, 0x94, 0xEF, 0x31, 0x66, 0x12, 0x7B, 0x62, 0x31, 0x5B, 0xE0, 0x14, ++0xF0, 0x80, 0x36, 0x31, 0x5B, 0xE0, 0xD3, 0x94, 0x01, 0x40, 0x05, 0x31, 0x5B, 0xE0, 0x14, 0xF0, ++0x75, 0xF0, 0x0F, 0xE5, 0x0F, 0x12, 0x5B, 0x00, 0x54, 0xCF, 0x12, 0x5E, 0xDA, 0x54, 0xF0, 0x12, ++0x5E, 0xDA, 0x54, 0x0F, 0x31, 0x66, 0x90, 0xA1, 0x79, 0xE0, 0xFF, 0x31, 0xA0, 0x12, 0x5A, 0xEB, ++0x31, 0x89, 0x7B, 0x03, 0x12, 0x7B, 0x64, 0x80, 0x0C, 0xE4, 0xF5, 0x14, 0xF5, 0x15, 0x7D, 0x01, ++0xAF, 0x0F, 0x12, 0x76, 0x5B, 0x05, 0x0F, 0x02, 0x8A, 0x06, 0x22, 0x75, 0xF0, 0x0F, 0xE5, 0x0F, ++0x90, 0x93, 0x8F, 0x02, 0x45, 0x97, 0xF0, 0x90, 0xA1, 0x71, 0xE0, 0xFF, 0x90, 0xA2, 0x9A, 0xE4, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA1, 0x7A, 0xE0, 0xFF, 0x90, 0xA2, 0x9C, 0xE4, 0xF0, 0xA3, 0xEF, ++0xF0, 0x22, 0xE0, 0xFF, 0x90, 0xA1, 0x71, 0xE0, 0x22, 0xE0, 0xFF, 0x90, 0xA2, 0xA0, 0xE4, 0xF0, ++0xA3, 0xEF, 0xF0, 0x22, 0xC4, 0x54, 0x0F, 0xFD, 0x90, 0xA2, 0xA0, 0xE4, 0xF0, 0xA3, 0xED, 0xF0, ++0x90, 0xA2, 0x9E, 0xE4, 0xF0, 0xA3, 0x22, 0xA3, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x75, 0xF0, ++0x0F, 0xE5, 0x0F, 0x90, 0x93, 0x90, 0x02, 0x45, 0x97, 0x93, 0xFF, 0x90, 0xA1, 0x78, 0xE0, 0xFE, ++0xC3, 0xEF, 0x9E, 0x22, 0xEF, 0xF0, 0x75, 0xF0, 0x10, 0xE5, 0x0F, 0x22, 0xE0, 0xFD, 0x90, 0xA2, ++0x9C, 0xE4, 0xF0, 0xA3, 0xED, 0x22, 0x8F, 0x12, 0x90, 0xA1, 0x70, 0x74, 0x0E, 0xF0, 0xED, 0x24, ++0xFE, 0x60, 0x7A, 0x24, 0xFE, 0x70, 0x02, 0x41, 0xE0, 0x24, 0x03, 0x60, 0x02, 0x41, 0xF3, 0x90, ++0xA1, 0x7E, 0x74, 0x09, 0xF0, 0x90, 0xA1, 0x72, 0x74, 0x0C, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x12, ++0x12, 0x57, 0x2E, 0xE0, 0x90, 0xA1, 0x73, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x12, 0x12, 0x57, 0x4C, ++0xFD, 0x13, 0x13, 0x54, 0x03, 0x90, 0xA1, 0x74, 0xF0, 0xED, 0x12, 0x57, 0x86, 0xA3, 0xF0, 0x75, ++0xF0, 0x0F, 0xE5, 0x12, 0x12, 0x57, 0x4C, 0xFF, 0xC4, 0x54, 0x03, 0x90, 0xA1, 0x76, 0xF0, 0x75, ++0xF0, 0x0F, 0xE5, 0x12, 0x12, 0x5F, 0x70, 0xE0, 0x90, 0xA1, 0x77, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, ++0x12, 0x90, 0x93, 0x86, 0x51, 0xF4, 0x75, 0xF0, 0x0F, 0xE5, 0x12, 0x12, 0x59, 0x3E, 0xFD, 0xC4, ++0x13, 0x54, 0x01, 0x90, 0xA1, 0x79, 0xF0, 0xED, 0x54, 0x1F, 0xA3, 0x80, 0x74, 0x90, 0xA1, 0x7E, ++0x74, 0x09, 0x12, 0x6E, 0x1B, 0x75, 0xF0, 0x08, 0xE5, 0x12, 0x12, 0x5C, 0xC5, 0xE0, 0x90, 0xA1, ++0x73, 0xF0, 0x75, 0xF0, 0x08, 0xE5, 0x12, 0x90, 0x89, 0x01, 0x12, 0x45, 0x97, 0xE0, 0x90, 0xA1, ++0x74, 0xF0, 0x75, 0xF0, 0x08, 0xE5, 0x12, 0x90, 0x89, 0x02, 0x12, 0x45, 0x97, 0xE0, 0x90, 0xA1, ++0x75, 0xF0, 0x75, 0xF0, 0x08, 0xE5, 0x12, 0x90, 0x89, 0x03, 0x12, 0x45, 0x97, 0xE0, 0x90, 0xA1, ++0x76, 0xF0, 0x75, 0xF0, 0x08, 0xE5, 0x12, 0x71, 0x05, 0x90, 0xA1, 0x77, 0xF0, 0x75, 0xF0, 0x08, ++0xE5, 0x12, 0x90, 0x89, 0x05, 0x51, 0xF4, 0x75, 0xF0, 0x08, 0xE5, 0x12, 0x90, 0x89, 0x06, 0x12, ++0x45, 0x97, 0xE0, 0x90, 0xA1, 0x79, 0xF0, 0x75, 0xF0, 0x08, 0xE5, 0x12, 0x51, 0xFD, 0x90, 0xA1, ++0x7A, 0xF0, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x70, 0x12, 0x6E, 0x52, 0x7F, 0x04, 0x02, 0x6E, 0xD0, ++0x90, 0xA1, 0x7E, 0x74, 0x09, 0xF0, 0x90, 0xA1, 0x72, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0x27, 0xF0, ++0xE4, 0xA3, 0xF0, 0x22, 0x12, 0x45, 0x97, 0xE0, 0x90, 0xA1, 0x78, 0xF0, 0x22, 0x90, 0x89, 0x07, ++0x12, 0x45, 0x97, 0xE0, 0x22, 0x90, 0x89, 0x04, 0x12, 0x45, 0x97, 0xE0, 0x22, 0x7D, 0x07, 0xEF, ++0x5D, 0xC3, 0x60, 0x0A, 0x71, 0x22, 0x24, 0x08, 0xFF, 0xE4, 0x3E, 0xFE, 0x80, 0x03, 0x71, 0x22, ++0xFF, 0x22, 0x74, 0xFF, 0x9D, 0xFD, 0x74, 0xFF, 0x94, 0x00, 0x5E, 0xFE, 0xED, 0x5F, 0x22, 0x7E, ++0x00, 0x7F, 0x62, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0xA0, 0x79, 0xE1, 0x12, 0x08, 0xAA, 0x90, 0xA0, ++0xE5, 0x74, 0x02, 0xF0, 0x90, 0xA0, 0xEC, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x90, ++0xA0, 0xF2, 0xE4, 0xF0, 0xA3, 0x74, 0x02, 0x71, 0xDF, 0xF0, 0x71, 0xF6, 0xE4, 0xFD, 0xFF, 0x12, ++0x4B, 0x0B, 0x7D, 0x0C, 0x7F, 0x02, 0x12, 0x4B, 0x0B, 0x12, 0x4B, 0x07, 0x90, 0x9F, 0x8C, 0xE0, ++0xFF, 0xB4, 0x01, 0x08, 0x90, 0xA0, 0xF1, 0x74, 0xDD, 0xF0, 0x80, 0x0F, 0xEF, 0x90, 0xA0, 0xF1, ++0xB4, 0x03, 0x05, 0x74, 0xD4, 0xF0, 0x80, 0x03, 0x74, 0x40, 0xF0, 0x7F, 0x79, 0x12, 0x47, 0xA9, ++0xEF, 0x54, 0x03, 0xFF, 0xBF, 0x02, 0x0F, 0x7F, 0x28, 0x12, 0x47, 0xA9, 0xEF, 0x30, 0xE2, 0x06, ++0x90, 0xA1, 0x03, 0x74, 0x02, 0xF0, 0x90, 0xA1, 0x43, 0x74, 0x02, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, ++0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07, 0x71, 0xDF, 0xF0, 0x7F, 0x01, 0x12, ++0x57, 0xF3, 0x7E, 0x00, 0x7F, 0x02, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x47, 0x12, 0x08, ++0xAA, 0x12, 0x7F, 0xAE, 0x71, 0xEE, 0x12, 0x7A, 0x60, 0xE4, 0x90, 0xA1, 0x49, 0xF0, 0x22, 0xF0, ++0x90, 0xA1, 0x03, 0xE0, 0x24, 0x04, 0x90, 0xA0, 0xFE, 0xF0, 0xA3, 0x74, 0x0A, 0x22, 0x90, 0x06, ++0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0x90, 0xA1, 0x3D, 0x74, 0x04, 0xF0, 0xA3, 0x14, 0xF0, 0xA3, ++0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x04, 0x1A, ++0xE0, 0xF4, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x04, 0x1B, 0xE0, 0x54, 0x07, 0x64, 0x07, 0x7F, ++0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x91, 0x0D, 0xEF, ++0x64, 0x01, 0x70, 0x48, 0x90, 0xA0, 0xEA, 0xE0, 0xFF, 0x54, 0x03, 0x70, 0x3F, 0x90, 0xA0, 0xE8, ++0xE0, 0xFE, 0xE4, 0xC3, 0x9E, 0x40, 0x35, 0xEF, 0x20, 0xE2, 0x31, 0x90, 0xA0, 0xEA, 0xE0, 0x20, ++0xE4, 0x2A, 0x90, 0xA0, 0xE2, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x1F, 0x90, 0xA1, 0x49, ++0xE0, 0x70, 0x19, 0x90, 0x06, 0x62, 0xE0, 0x20, 0xE1, 0x12, 0x90, 0x06, 0x62, 0xE0, 0x30, 0xE0, ++0x07, 0xE0, 0x54, 0xFC, 0x64, 0x80, 0x60, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0xEF, 0x24, 0xFE, 0x60, 0x0B, 0x04, 0x70, 0x24, 0x90, 0xA0, 0xEC, 0x74, 0x02, ++0xF0, 0x80, 0x13, 0xED, 0x70, 0x06, 0x90, 0xA1, 0x46, 0xE0, 0x80, 0x02, 0xED, 0x14, 0x90, 0xA0, ++0xEC, 0xF0, 0x90, 0xA0, 0xEC, 0xE0, 0xA3, 0xF0, 0x90, 0xA0, 0xE2, 0xE0, 0x44, 0x08, 0xF0, 0x22, ++0x90, 0x02, 0x87, 0xE0, 0x70, 0x1F, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, 0x70, 0x17, 0x90, 0x02, ++0x96, 0xE0, 0x70, 0x11, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE1, 0x0A, 0x90, 0x02, 0x86, 0xE0, 0x20, ++0xE3, 0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x7D, 0x2E, 0x7F, 0x6F, 0x12, 0x4B, 0xCB, 0x7D, ++0x02, 0x7F, 0x01, 0x02, 0x4B, 0x0B, 0x90, 0xA0, 0xE1, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0x73, 0x69, ++0x22, 0x90, 0xA2, 0xFF, 0xE0, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0x3C, ++0xEF, 0xF0, 0x90, 0x9F, 0xB9, 0xE0, 0xFF, 0x90, 0x04, 0x1C, 0xE0, 0x6F, 0x70, 0x3D, 0x90, 0xA0, ++0xE9, 0xE0, 0x64, 0x0E, 0x70, 0x15, 0x90, 0xA3, 0x3C, 0xE0, 0x70, 0x2F, 0x90, 0xA0, 0xE1, 0xE0, ++0x54, 0x7F, 0xF0, 0x12, 0x7F, 0xAE, 0x12, 0x4B, 0x07, 0x80, 0x1D, 0x90, 0xA0, 0xE9, 0xE0, 0x64, ++0x06, 0x70, 0x18, 0x90, 0xA3, 0x3C, 0xE0, 0x60, 0x12, 0x90, 0xA0, 0xE1, 0xE0, 0x54, 0xBF, 0xF0, ++0xB1, 0x50, 0x90, 0xA0, 0xE9, 0x74, 0x04, 0xF0, 0x12, 0x7A, 0x60, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x90, 0x06, 0x04, 0xE0, 0x44, 0x40, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x22, 0x90, 0x04, 0x24, 0xEF, ++0xF0, 0x90, 0x04, 0x57, 0xF0, 0x22, 0x90, 0xA2, 0x9A, 0xE5, 0x16, 0xF0, 0xA3, 0xE5, 0x17, 0xF0, ++0xE5, 0x16, 0x13, 0xA3, 0xF0, 0xE5, 0x17, 0x13, 0xA3, 0xF0, 0x90, 0x00, 0x06, 0x12, 0x07, 0xAB, ++0xFF, 0xAE, 0xF0, 0x90, 0x00, 0x08, 0x12, 0x07, 0xAB, 0x2F, 0xFF, 0xE5, 0xF0, 0x3E, 0xFE, 0x90, ++0x00, 0x04, 0x12, 0x07, 0xAB, 0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, ++0xD3, 0x9F, 0xEC, 0x9E, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xC3, 0x74, 0xFF, 0x9F, 0xFF, 0x74, ++0xFF, 0x9E, 0xFE, 0x22, 0x7F, 0x01, 0x12, 0x7B, 0x6A, 0xAB, 0x11, 0xAA, 0x12, 0xA9, 0x13, 0x22, ++0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x22, 0xCF, 0xF0, 0xA3, 0xEF, ++0xF0, 0xA3, 0xE5, 0x16, 0xF0, 0xA3, 0xE5, 0x17, 0xF0, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xED, ++0x2F, 0xFF, 0xEC, 0x3E, 0xFE, 0x22, 0x12, 0x45, 0x61, 0x90, 0xA1, 0x39, 0x12, 0x08, 0x6D, 0x90, ++0xA0, 0xE2, 0xE0, 0x22, 0x90, 0xA1, 0x4F, 0xE0, 0xFF, 0x90, 0xA1, 0x4E, 0xE0, 0xFB, 0x90, 0xA1, ++0x50, 0xE0, 0x90, 0xA3, 0x07, 0x22, 0xFC, 0x90, 0x00, 0x04, 0x12, 0x07, 0xAB, 0x25, 0xE0, 0xFF, ++0xE5, 0xF0, 0x33, 0xFE, 0x22, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x5A, 0x7F, 0xFB, 0x7E, 0x01, 0x02, ++0x34, 0xC1, 0x90, 0x00, 0x02, 0x02, 0x07, 0xAB, 0x74, 0x0D, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x9F, 0xF5, 0x83, 0x22, 0x74, 0x21, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0x10, 0xF9, 0x74, ++0xA0, 0x35, 0xF0, 0x22, 0x90, 0x00, 0x06, 0x02, 0x07, 0xAB, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, ++0xA1, 0x6E, 0xE0, 0x22, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, 0xFF, 0x22, 0x90, 0xA1, ++0x77, 0xE0, 0xFF, 0xD3, 0x22, 0xE4, 0x90, 0xA2, 0xF1, 0xF0, 0x90, 0xA1, 0x4C, 0x22, 0xEF, 0xF0, ++0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0x22, ++0x7F, 0x4E, 0x12, 0x47, 0xA9, 0xEF, 0x54, 0x7F, 0x22, 0x90, 0xA3, 0x07, 0xE0, 0x7F, 0x48, 0x7E, ++0x09, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0x22, 0x90, 0xA0, 0xE4, 0xE0, 0xC4, 0x54, 0x0F, 0x22, 0x90, 0xA0, 0xEC, 0xE0, 0x90, 0x05, ++0x73, 0x22, 0x90, 0xA0, 0xEA, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x75, 0xF0, 0x0F, 0xEF, 0x90, 0x93, ++0x86, 0x22, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0xA2, 0x9C, 0x22, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA1, ++0x81, 0x22, 0x90, 0xA1, 0x7F, 0xE0, 0xFE, 0xA3, 0xE0, 0x22, 0x04, 0x5E, ++}; ++u4Byte ArrayLength_MP_8723B_FW_AP = 22284; ++ ++ ++void ++ODM_ReadFirmware_MP_8723B_FW_AP( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8723B_FW_AP; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8723B_FW_AP, ArrayLength_MP_8723B_FW_AP); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8723B_FW_AP; ++} ++ ++ ++#endif /* #if (defined(CONFIG_AP_WOWLAN)||(DM_ODM_SUPPORT_TYPE & (ODM_AP)) */ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ ++ ++u1Byte Array_MP_8723B_FW_NIC[] = { ++0x01, 0x53, 0x10, 0x00, 0x27, 0x00, 0x00, 0x00, 0x10, 0x30, 0x15, 0x16, 0xB0, 0x7C, 0x00, 0x00, ++0x4D, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x45, 0xCE, 0x02, 0x7F, 0xD8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x80, 0xAE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x80, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x80, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x87, 0xD7, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x90, 0x00, 0x1D, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x0D, 0xF0, 0x0F, ++0x00, 0x00, 0x00, 0x00, 0x0D, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x0D, 0xF0, 0x0F, 0x00, 0x00, ++0x00, 0x00, 0x10, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x10, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, ++0xF5, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0xF0, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x10, 0xF0, 0x3F, 0x00, ++0x00, 0x00, 0x00, 0x32, 0x32, 0x24, 0x32, 0x32, 0x43, 0x4B, 0x43, 0x4B, 0x43, 0x4B, 0x59, 0x32, ++0x32, 0x43, 0x4B, 0x43, 0x4B, 0x59, 0x5A, 0x52, 0x53, 0x54, 0x55, 0x53, 0x54, 0x55, 0x56, 0x57, ++0x58, 0x59, 0x5A, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x00, 0x00, 0x00, 0x01, 0x00, ++0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x03, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x03, 0x01, ++0x01, 0x01, 0x01, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x01, 0x02, 0x03, 0x04, 0x05, ++0x06, 0x07, 0x08, 0x04, 0x02, 0x04, 0x02, 0x03, 0x0C, 0x0D, 0x0C, 0x19, 0x06, 0x04, 0x02, 0x00, ++0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x42, 0x94, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, ++0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, ++0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, ++0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, ++0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, ++0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, ++0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, ++0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, ++0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, ++0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, ++0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, ++0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, ++0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, ++0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, ++0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, ++0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, 0x30, 0x90, 0x46, 0x71, 0x74, 0x01, 0x93, ++0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, ++0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, ++0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, ++0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, ++0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, ++0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, ++0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, ++0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, ++0x04, 0x90, 0x46, 0x71, 0x93, 0xF6, 0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, ++0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x42, 0xDD, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, ++0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, ++0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, ++0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, ++0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, ++0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, ++0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x42, 0xDC, 0x8F, 0xF0, ++0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, ++0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x30, 0x50, 0x2E, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, ++0x60, 0x25, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x23, 0x0E, 0x30, ++0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x12, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x13, 0x54, 0xEC, ++0x4E, 0xF6, 0xD2, 0xAF, 0x02, 0x42, 0xDD, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, 0xC2, 0xAF, ++0x56, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x4F, 0xFF, 0x22, 0xC3, 0xEF, 0x9B, 0xFF, 0xEE, 0x9A, 0xFE, ++0xED, 0x99, 0xFD, 0xEC, 0x98, 0xFC, 0x22, 0xEF, 0x5B, 0xFF, 0xEE, 0x5A, 0xFE, 0xED, 0x59, 0xFD, ++0xEC, 0x58, 0xFC, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, 0xFC, ++0x22, 0xEB, 0x9F, 0xF5, 0xF0, 0xEA, 0x9E, 0x42, 0xF0, 0xE9, 0x9D, 0x42, 0xF0, 0xE8, 0x9C, 0x45, ++0xF0, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xE0, 0xF8, ++0xA3, 0xE0, 0xF9, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0x22, 0xA4, 0x25, 0x82, 0xF5, 0x82, 0xE5, ++0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xF9, 0x22, 0xEB, ++0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, ++0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, ++0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0x02, 0x46, ++0x0C, 0x02, 0x43, 0x6D, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, 0x80, 0x01, ++0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, ++0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, ++0xDF, 0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x46, 0x51, 0xE4, ++0x7E, 0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, ++0x93, 0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, 0xE4, 0x93, ++0xA3, 0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, ++0xCA, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, ++0xBE, 0x41, 0xA2, 0x84, 0x00, 0x41, 0xA2, 0x85, 0x00, 0x41, 0xA2, 0x86, 0x00, 0x41, 0xA2, 0x8A, ++0x00, 0x01, 0x6E, 0x00, 0x41, 0xA2, 0x8B, 0x00, 0x41, 0xA2, 0x8C, 0x00, 0x41, 0xA2, 0xB0, 0x00, ++0x00, 0x67, 0xF4, 0x6F, 0xDE, 0x77, 0xE1, 0x7F, 0x67, 0xF1, 0x84, 0xEF, 0x44, 0x20, 0xFD, 0x7F, ++0x67, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x82, 0x75, 0x83, 0x00, 0xED, 0xF1, 0xF9, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x60, 0xEF, ++0xF0, 0x90, 0xA2, 0x62, 0xEB, 0xF0, 0xED, 0x60, 0x02, 0xE1, 0x30, 0x90, 0x07, 0x6E, 0xE0, 0x44, ++0x08, 0xF0, 0x12, 0xA3, 0x1D, 0x90, 0xA2, 0x62, 0xE0, 0x70, 0x3E, 0xD1, 0x77, 0x90, 0xA2, 0x60, ++0xE0, 0x70, 0x30, 0x12, 0xBC, 0x1D, 0x70, 0x13, 0x12, 0x37, 0x4E, 0xE4, 0xFF, 0x74, 0x02, 0x12, ++0x91, 0xE2, 0x7F, 0x64, 0xF1, 0x84, 0xEF, 0x54, 0xFE, 0x80, 0x13, 0x12, 0x37, 0x4E, 0xE4, 0xFE, ++0x74, 0x80, 0xFF, 0xE4, 0x12, 0x91, 0xE3, 0x7F, 0x64, 0xF1, 0x84, 0xEF, 0x44, 0x01, 0xFD, 0x7F, ++0x64, 0xD1, 0x81, 0x7F, 0x4E, 0xF1, 0xF3, 0x80, 0x7D, 0xD1, 0x77, 0x90, 0xA2, 0x60, 0xE0, 0x70, ++0x03, 0x12, 0x91, 0xD9, 0xF1, 0xEB, 0xF1, 0xE0, 0x44, 0x01, 0xFD, 0x7F, 0x4F, 0xD1, 0x81, 0x12, ++0x93, 0x03, 0x74, 0x66, 0xFF, 0xEC, 0x12, 0x5C, 0x33, 0x7F, 0x30, 0x7E, 0x09, 0x12, 0x38, 0x45, ++0x12, 0xBB, 0x3D, 0xEF, 0x44, 0x01, 0xFF, 0xEC, 0x12, 0x5C, 0x33, 0x12, 0x5F, 0xDF, 0x80, 0x4F, ++0x90, 0x07, 0x6E, 0xE0, 0x54, 0xF7, 0xF0, 0x12, 0xA3, 0x25, 0x90, 0xA2, 0x60, 0xE0, 0x70, 0x34, ++0x90, 0xA2, 0x62, 0xE0, 0x60, 0x0A, 0xD1, 0x77, 0x7F, 0x48, 0x12, 0x93, 0x05, 0xFF, 0x80, 0x21, ++0x7F, 0x67, 0xF1, 0x84, 0xEF, 0x54, 0xDF, 0xFD, 0x7F, 0x67, 0xD1, 0x81, 0x12, 0xBC, 0x1D, 0x70, ++0x0B, 0x12, 0x37, 0x4E, 0xE4, 0x74, 0x80, 0xFF, 0x74, 0x02, 0x80, 0x05, 0x12, 0x37, 0x4E, 0xE4, ++0xFF, 0x12, 0x91, 0xE2, 0xF1, 0xEB, 0xF1, 0xE0, 0x54, 0xFE, 0xFD, 0x7F, 0x4F, 0xD1, 0x81, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x82, 0x75, 0x83, 0x00, ++0xE0, 0x90, 0xA2, 0xA7, 0xF1, 0xF9, 0x90, 0xA2, 0xA7, 0xE0, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x7F, 0x54, 0xF1, 0x84, 0xE5, 0x0D, 0x5F, 0xF5, 0x11, 0x7F, 0x55, 0xF1, 0x84, 0xE5, 0x0E, 0x5F, ++0xF5, 0x12, 0x7F, 0x56, 0xF1, 0x84, 0xE5, 0x0F, 0x5F, 0xF5, 0x13, 0x7F, 0x57, 0xF1, 0x84, 0xE5, ++0x10, 0x5F, 0xF5, 0x14, 0xAD, 0x11, 0x7F, 0x54, 0xD1, 0x81, 0xAD, 0x12, 0x7F, 0x55, 0xD1, 0x81, ++0xAD, 0x13, 0x7F, 0x56, 0xD1, 0x81, 0xAD, 0x14, 0x7F, 0x57, 0xD1, 0x81, 0x53, 0x91, 0xEF, 0x22, ++0xFD, 0x7F, 0x4E, 0xD1, 0x81, 0x7F, 0x4F, 0xF1, 0x84, 0xEF, 0x22, 0x7F, 0x4E, 0xF1, 0x84, 0xEF, ++0x54, 0x7F, 0x22, 0xF1, 0x84, 0xEF, 0x44, 0x80, 0x22, 0xF0, 0x7F, 0x10, 0x7E, 0x00, 0x02, 0x3E, ++0x50, 0xE0, 0x44, 0x02, 0xF0, 0xE4, 0x90, 0xA2, 0x44, 0xF0, 0x90, 0x9F, 0xA0, 0xE0, 0x90, 0xA2, ++0x45, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0xA2, 0x40, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA2, 0x44, 0xE0, 0xF5, 0x3B, 0xA3, 0xE0, ++0xF5, 0x3C, 0x12, 0x36, 0x3E, 0x90, 0xA2, 0x40, 0x12, 0x97, 0xA0, 0xA3, 0xA3, 0xA3, 0x74, 0x05, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0x90, 0xA1, 0x88, 0xF0, 0x90, 0xA0, 0x17, 0xE0, 0x20, ++0xE0, 0x02, 0x21, 0x79, 0x90, 0xA0, 0x19, 0xE0, 0xB4, 0x14, 0x0B, 0x7F, 0x01, 0x51, 0x16, 0xEF, ++0x60, 0x02, 0x21, 0x79, 0x21, 0x74, 0x31, 0x81, 0x12, 0x9F, 0x5A, 0x90, 0xA1, 0x86, 0xF0, 0x60, ++0x07, 0xE0, 0x64, 0x02, 0x60, 0x02, 0x21, 0x3C, 0x90, 0xA0, 0x19, 0xE0, 0x70, 0x32, 0xF1, 0xD5, ++0x30, 0xE0, 0x02, 0x21, 0x2C, 0x12, 0xBC, 0x14, 0x7D, 0x4E, 0x7F, 0x6F, 0x71, 0x17, 0x31, 0x81, ++0xD1, 0xCD, 0x7B, 0x04, 0x7D, 0x01, 0x71, 0x26, 0xBF, 0x01, 0x0E, 0x31, 0x81, 0x51, 0x0B, 0x44, ++0x01, 0xF0, 0x90, 0xA0, 0x19, 0x74, 0x01, 0xF0, 0x22, 0x12, 0xBB, 0x89, 0x7D, 0x4F, 0x80, 0x6F, ++0x90, 0xA0, 0x19, 0xE0, 0x64, 0x01, 0x70, 0x74, 0x31, 0x81, 0x51, 0x0B, 0xFF, 0x30, 0xE0, 0x08, ++0x90, 0xA1, 0x88, 0x74, 0x01, 0xF0, 0x80, 0x15, 0xEF, 0xC3, 0x13, 0x20, 0xE0, 0x0F, 0x90, 0xA1, ++0x88, 0x74, 0x01, 0xF0, 0x12, 0xBC, 0x14, 0x7D, 0x50, 0x7F, 0x6F, 0x71, 0x17, 0x90, 0xA1, 0x88, ++0xE0, 0x60, 0x49, 0x90, 0xA0, 0xBF, 0xE0, 0x64, 0x06, 0x60, 0x36, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, ++0x94, 0x01, 0x40, 0x08, 0x90, 0xA1, 0x89, 0x74, 0x04, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0xA1, 0x89, ++0xF0, 0x31, 0x81, 0xD1, 0xCD, 0x90, 0xA1, 0x89, 0xE0, 0xFB, 0x7D, 0x01, 0x71, 0x26, 0xBF, 0x01, ++0x09, 0xD1, 0xF2, 0x74, 0x03, 0x12, 0xBC, 0x0B, 0x01, 0x19, 0x12, 0xBB, 0x89, 0x7D, 0x51, 0x61, ++0x17, 0xE4, 0x90, 0xA0, 0xBF, 0x31, 0x7A, 0x51, 0x0B, 0x54, 0xFB, 0xF0, 0x90, 0xA0, 0x19, 0xE0, ++0x64, 0x05, 0x70, 0x45, 0xFF, 0x51, 0x16, 0xEF, 0x70, 0x3F, 0x80, 0x38, 0x90, 0xA1, 0x86, 0xE0, ++0x64, 0x03, 0x70, 0x35, 0x90, 0xA0, 0x19, 0xE0, 0x64, 0x05, 0x70, 0x2D, 0xF1, 0xD5, 0x20, 0xE0, ++0x14, 0x31, 0x81, 0x04, 0xFF, 0xA3, 0xE0, 0xB5, 0x07, 0x02, 0xE4, 0xFF, 0x75, 0xF0, 0x13, 0xEF, ++0xD1, 0xE8, 0xEF, 0x11, 0x11, 0x31, 0x81, 0xFD, 0x7F, 0x02, 0x12, 0xA9, 0xD2, 0xE4, 0xFF, 0x51, ++0x16, 0xEF, 0x70, 0x05, 0x7F, 0x06, 0x12, 0x84, 0xE0, 0x22, 0xF0, 0x90, 0xA0, 0x19, 0x74, 0x05, ++0xF0, 0x90, 0xA0, 0x17, 0xE0, 0xC3, 0x13, 0x54, 0x07, 0x22, 0xE4, 0x90, 0xA1, 0x85, 0xF0, 0x90, ++0xA0, 0x17, 0xE0, 0xFF, 0x30, 0xE0, 0x73, 0xF1, 0xD5, 0x20, 0xE0, 0x6E, 0xEF, 0xC3, 0x13, 0x54, ++0x07, 0xFF, 0x51, 0x0B, 0xFE, 0x30, 0xE0, 0x62, 0x75, 0xF0, 0x13, 0xEF, 0x90, 0xA0, 0x4B, 0x12, ++0x45, 0x8A, 0xEE, 0x54, 0xFE, 0xF0, 0x75, 0xF0, 0x13, 0xEF, 0x51, 0x0E, 0x13, 0x13, 0x54, 0x3F, ++0x30, 0xE0, 0x0F, 0x90, 0xA0, 0x83, 0xF1, 0xDE, 0x31, 0x81, 0x51, 0x0B, 0x54, 0xFB, 0xF0, 0x12, ++0x8B, 0xC9, 0x90, 0x04, 0xE0, 0xE0, 0x30, 0xE1, 0x22, 0x31, 0x7B, 0x51, 0x0B, 0x44, 0x02, 0xF0, ++0xE4, 0x90, 0xA0, 0xBF, 0x31, 0x80, 0xFD, 0x7F, 0x02, 0x12, 0xA9, 0xD2, 0x90, 0xA1, 0x85, 0xE0, ++0x60, 0x18, 0xE4, 0x90, 0xA0, 0x81, 0xF0, 0xA3, 0xF0, 0x01, 0x46, 0x90, 0xA0, 0x81, 0xF1, 0xDE, ++0x31, 0x81, 0x51, 0x0B, 0x54, 0xFD, 0xF0, 0x12, 0x67, 0x6F, 0x22, 0x75, 0xF0, 0x13, 0x90, 0xA0, ++0x4B, 0x12, 0x45, 0x8A, 0xE0, 0x22, 0x90, 0xA1, 0x8A, 0xEF, 0xF0, 0x12, 0x9B, 0xA6, 0xEF, 0x70, ++0x02, 0xFF, 0x22, 0x31, 0x81, 0x90, 0xA0, 0x7D, 0xF0, 0x12, 0xBA, 0xF1, 0xB5, 0x07, 0x04, 0xEE, ++0x54, 0xF1, 0xF0, 0x31, 0x81, 0xF5, 0x6C, 0x90, 0xA1, 0x8A, 0xE0, 0x90, 0xA0, 0x19, 0x70, 0x03, ++0xF0, 0x80, 0x03, 0x74, 0x14, 0xF0, 0x75, 0xF0, 0x13, 0xE5, 0x6C, 0x12, 0xBC, 0x6E, 0x30, 0xE0, ++0x27, 0x51, 0xF9, 0xE0, 0x24, 0x86, 0xF5, 0x82, 0xE4, 0x34, 0xA0, 0xF5, 0x83, 0xE0, 0xFF, 0x12, ++0x9D, 0xC9, 0xEF, 0x51, 0xF8, 0xE0, 0x04, 0x51, 0xF8, 0xE0, 0xFF, 0x90, 0xA0, 0x85, 0xE0, 0xFE, ++0xEF, 0xB5, 0x06, 0x04, 0x51, 0xF9, 0xE4, 0xF0, 0x12, 0x9D, 0xC9, 0xE0, 0xFC, 0x90, 0xA0, 0x7D, ++0xE0, 0x75, 0xF0, 0x13, 0x12, 0x9D, 0xCE, 0xE0, 0x6C, 0x60, 0x10, 0x75, 0xF0, 0x13, 0xE5, 0x6C, ++0x12, 0x9C, 0x50, 0x75, 0xF0, 0x13, 0xE5, 0x6C, 0x12, 0x5C, 0x98, 0x75, 0xF0, 0x13, 0xE5, 0x6C, ++0x90, 0xA0, 0x4C, 0x12, 0x45, 0x8A, 0xE0, 0x04, 0xF0, 0x90, 0xA1, 0x8A, 0xE0, 0x70, 0x20, 0xF1, ++0xD5, 0x20, 0xE0, 0x1B, 0x75, 0xF0, 0x13, 0xE5, 0x6C, 0x12, 0x9F, 0x5D, 0xFF, 0x60, 0x03, 0xBF, ++0x02, 0x0D, 0x75, 0xF0, 0x13, 0xE5, 0x6C, 0xD1, 0xD0, 0x7B, 0x04, 0xE4, 0xFD, 0x71, 0x26, 0xAD, ++0x6C, 0x7F, 0x01, 0x12, 0xA9, 0xD2, 0x90, 0xA0, 0x7F, 0x12, 0x8C, 0x7E, 0xBF, 0x02, 0x05, 0xE4, ++0xFF, 0x12, 0x84, 0xE0, 0x90, 0x01, 0xA5, 0xE0, 0xB4, 0xFF, 0x04, 0xE4, 0xF0, 0x80, 0x06, 0x90, ++0x01, 0xA5, 0xE0, 0x04, 0xF0, 0x7F, 0x01, 0x22, 0xF0, 0x74, 0xA9, 0x25, 0x6C, 0xF5, 0x82, 0xE4, ++0x34, 0xA0, 0xF5, 0x83, 0x22, 0x90, 0xA0, 0x26, 0x12, 0x45, 0x8A, 0xE0, 0xFF, 0x7E, 0x00, 0xE4, ++0xFB, 0xFD, 0x71, 0x26, 0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, 0xEF, 0xF0, 0x90, 0x9E, 0x06, 0xED, ++0xF0, 0x22, 0xE4, 0xFB, 0x7D, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x39, ++0xEE, 0xF0, 0xA3, 0x12, 0x9B, 0x96, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x26, 0x90, 0x05, 0x22, 0xE0, ++0x90, 0xA2, 0x3F, 0xF0, 0x7D, 0x14, 0x12, 0x9B, 0xA1, 0xEF, 0x64, 0x01, 0x70, 0x05, 0x12, 0x73, ++0x60, 0x80, 0x04, 0x7F, 0x00, 0x80, 0x11, 0x90, 0xA2, 0x3F, 0xE0, 0xFF, 0x7D, 0x15, 0x71, 0x17, ++0x80, 0x03, 0x12, 0x73, 0x60, 0x12, 0xBC, 0x02, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA0, 0x16, ++0xE0, 0x30, 0xE0, 0x50, 0x90, 0xA0, 0x19, 0xE0, 0x70, 0x27, 0x7D, 0x16, 0x12, 0x7F, 0xA2, 0x31, ++0x81, 0x75, 0xF0, 0x0E, 0x90, 0xA0, 0x26, 0xD1, 0xD3, 0x71, 0x22, 0x31, 0x81, 0x12, 0xA8, 0xCC, ++0xE0, 0x44, 0x01, 0xF0, 0xD1, 0xF2, 0x74, 0x03, 0x11, 0x11, 0x90, 0xA0, 0x19, 0x74, 0x01, 0xF0, ++0x22, 0x90, 0xA0, 0x19, 0xE0, 0x64, 0x01, 0x70, 0x19, 0x31, 0x81, 0x12, 0xA8, 0xCB, 0xE0, 0x30, ++0xE0, 0x10, 0x12, 0xBC, 0x38, 0xD1, 0xD3, 0x71, 0x22, 0xD1, 0xF2, 0x74, 0x03, 0x12, 0xBB, 0xF9, ++0x01, 0x19, 0x71, 0xC5, 0x22, 0x12, 0xBA, 0xF1, 0xB5, 0x07, 0x04, 0xEE, 0x54, 0xF1, 0xF0, 0x31, ++0x81, 0x12, 0xBB, 0x12, 0x11, 0x11, 0xE4, 0x90, 0xA0, 0x19, 0xF0, 0x12, 0x9B, 0xA6, 0x12, 0xBB, ++0x08, 0x12, 0x9F, 0x3C, 0xE0, 0xFA, 0x12, 0x6E, 0xC9, 0xFC, 0x54, 0x03, 0xFD, 0xEC, 0x13, 0x13, ++0x54, 0x07, 0xFB, 0xEE, 0xC4, 0x54, 0x0F, 0x90, 0xA2, 0x77, 0xF0, 0xAF, 0x02, 0x12, 0x9C, 0x6F, ++0x31, 0x81, 0x75, 0xF0, 0x0E, 0x90, 0xA0, 0x1B, 0x12, 0x5C, 0x9B, 0x31, 0x81, 0xFF, 0x75, 0xF0, ++0x0E, 0x90, 0xA0, 0x25, 0x12, 0x45, 0x8A, 0xE0, 0x04, 0xF0, 0x75, 0xF0, 0x0E, 0xEF, 0x71, 0x05, ++0x31, 0x81, 0xFD, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x78, 0xEF, ++0xF0, 0xA3, 0xED, 0xF0, 0xE4, 0xA3, 0xF0, 0x90, 0xA2, 0x7A, 0xE0, 0xFF, 0xC3, 0x94, 0x03, 0x40, ++0x02, 0x81, 0xD9, 0x90, 0xA2, 0x79, 0xE0, 0xFE, 0x12, 0xBB, 0x96, 0x75, 0xF0, 0x03, 0xEF, 0x12, ++0xBB, 0x9F, 0xE0, 0x90, 0xA2, 0x7B, 0xF0, 0x90, 0xA2, 0x78, 0xE0, 0xFC, 0xB4, 0x02, 0x2A, 0x90, ++0xA2, 0x7B, 0xE0, 0xFD, 0x75, 0xF0, 0x0E, 0xEE, 0x12, 0x6E, 0xE1, 0xC0, 0x83, 0xC0, 0x82, 0x90, ++0xA2, 0x7A, 0xE0, 0xD0, 0x82, 0xD0, 0x83, 0x75, 0xF0, 0x03, 0x12, 0x45, 0x8A, 0x12, 0x83, 0x14, ++0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4D, 0x80, 0x2A, 0xEC, 0xB4, 0x01, 0x2A, 0x12, 0xBB, 0xEF, ++0x75, 0xF0, 0x0E, 0x12, 0x6E, 0xE1, 0xC0, 0x83, 0xC0, 0x82, 0x90, 0xA2, 0x7A, 0xE0, 0xD0, 0x82, ++0xD0, 0x83, 0x75, 0xF0, 0x03, 0x12, 0x45, 0x8A, 0x12, 0x83, 0x14, 0x80, 0x02, 0xC3, 0x33, 0xD8, ++0xFC, 0xF4, 0x5F, 0x90, 0xA2, 0x7B, 0xF0, 0x12, 0xBB, 0xEF, 0x12, 0xBB, 0x96, 0xC0, 0x83, 0xC0, ++0x82, 0x90, 0xA2, 0x7A, 0xE0, 0xD0, 0x82, 0xD0, 0x83, 0x75, 0xF0, 0x03, 0x12, 0xBB, 0x9F, 0xEF, ++0xF0, 0x90, 0xA2, 0x7A, 0xE0, 0x04, 0xF0, 0x81, 0x37, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x5C, 0xEF, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0xE4, 0xFF, ++0x12, 0x8C, 0xDE, 0x90, 0x9F, 0xB7, 0xE0, 0x30, 0xE0, 0x03, 0x0F, 0x80, 0x36, 0x90, 0x9F, 0xB3, ++0xF1, 0xEF, 0x30, 0xE0, 0x04, 0x7F, 0x0D, 0x80, 0x2A, 0x90, 0x9F, 0xB6, 0xE0, 0xFF, 0xC4, 0x54, ++0x0F, 0x30, 0xE0, 0x10, 0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x04, 0x7F, 0x09, 0x80, 0x13, ++0x7F, 0x03, 0x80, 0x0F, 0x90, 0x9F, 0xB6, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x04, 0x7F, 0x03, 0x80, ++0x02, 0x7F, 0x09, 0x12, 0x8A, 0xA3, 0xF1, 0xE5, 0x70, 0x6D, 0xF1, 0xEC, 0x30, 0xE0, 0x62, 0x90, ++0x9F, 0xBD, 0xE0, 0xFF, 0x90, 0x9F, 0xC8, 0xE0, 0xFE, 0xD3, 0x9F, 0x40, 0x35, 0xEE, 0x75, 0xF0, ++0x03, 0xA4, 0xFF, 0x90, 0x9F, 0xBF, 0xE0, 0xFE, 0xC3, 0xEF, 0x9E, 0xFF, 0x24, 0x03, 0xFD, 0xE4, ++0x33, 0xFC, 0x90, 0x9F, 0xB5, 0xE0, 0xFE, 0x12, 0x96, 0x03, 0x40, 0x08, 0xEE, 0x9F, 0x90, 0xA2, ++0x5F, 0xF0, 0x80, 0x06, 0x90, 0xA2, 0x5F, 0x74, 0x03, 0xF0, 0x90, 0xA2, 0x5F, 0x12, 0xBB, 0x5A, ++0x80, 0x18, 0x90, 0x9F, 0xC0, 0xE0, 0xFF, 0xD1, 0xDB, 0x90, 0x9F, 0xBB, 0x74, 0x04, 0xF0, 0xE4, ++0x90, 0x9F, 0xC6, 0xF0, 0x90, 0x06, 0x92, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0x9F, 0xC8, 0xF0, 0x80, ++0x06, 0x90, 0x9F, 0xB5, 0x12, 0xBB, 0x5A, 0x90, 0x9F, 0xB3, 0x12, 0x57, 0xA5, 0x30, 0xE0, 0x07, ++0xE4, 0x90, 0xA2, 0x5E, 0xF0, 0x80, 0x06, 0x90, 0xA2, 0x5E, 0x74, 0x01, 0xF0, 0x12, 0xBC, 0x26, ++0x20, 0xE0, 0x13, 0x90, 0x9F, 0xF5, 0xE0, 0x60, 0x07, 0xE4, 0x90, 0xA2, 0x5D, 0xF0, 0x80, 0x06, ++0x90, 0xA2, 0x5D, 0x74, 0x01, 0xF0, 0x90, 0xA2, 0x5D, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x12, 0x5B, ++0x20, 0x90, 0x9F, 0xC5, 0x74, 0x01, 0xF0, 0x12, 0x8F, 0xB9, 0x30, 0xE0, 0x11, 0x90, 0xA2, 0x5C, ++0xE0, 0x70, 0x49, 0xD1, 0xC0, 0x30, 0xE0, 0x44, 0x7F, 0x01, 0xF1, 0xB7, 0x80, 0x3E, 0x90, 0x9F, ++0xB3, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x20, 0x90, 0x9F, 0xB9, 0xE0, 0x44, 0x20, 0xF0, 0x90, ++0x9F, 0xA5, 0xE0, 0x60, 0x04, 0x7D, 0x01, 0x80, 0x1E, 0xD1, 0xBF, 0x30, 0xE0, 0x04, 0x7F, 0x01, ++0xF1, 0xB7, 0x7D, 0x01, 0x7F, 0x0C, 0x80, 0x11, 0x90, 0xA2, 0x5C, 0xE0, 0xB4, 0x03, 0x0D, 0x90, ++0x9F, 0x42, 0xE0, 0x60, 0x07, 0xE4, 0xFD, 0x7F, 0x04, 0x12, 0x63, 0x1A, 0x90, 0x9F, 0xA5, 0xE0, ++0x60, 0x26, 0x90, 0xA2, 0x5C, 0xE0, 0x70, 0x0B, 0xD1, 0xC4, 0x30, 0xE0, 0x02, 0x80, 0x0D, 0x7D, ++0x04, 0x80, 0x0F, 0xF1, 0xE5, 0x70, 0x3E, 0xD1, 0xC4, 0x30, 0xE0, 0x04, 0x7F, 0x02, 0x80, 0x33, ++0x7D, 0x0B, 0x7F, 0x6F, 0x71, 0x17, 0x80, 0x2D, 0x90, 0xA2, 0x5C, 0xE0, 0x70, 0x09, 0xD1, 0xC0, ++0x30, 0xE0, 0x22, 0x7F, 0x01, 0x80, 0x1C, 0xF1, 0xE5, 0x70, 0x1A, 0x12, 0x87, 0xA7, 0x20, 0xE0, ++0x0B, 0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x12, 0x71, 0xA5, 0xD1, 0xBF, 0x30, 0xE0, ++0x04, 0x7F, 0x01, 0xF1, 0xB7, 0x90, 0x9F, 0xB6, 0x12, 0x57, 0xA5, 0x30, 0xE0, 0x05, 0x7F, 0x01, ++0x12, 0x97, 0xCA, 0x90, 0x9F, 0xB7, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x0E, 0x90, 0x06, 0xCD, 0xE0, ++0x44, 0x10, 0xF0, 0x90, 0x06, 0xCF, 0xE0, 0x44, 0x10, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, ++0xFD, 0xFF, 0x71, 0x17, 0x90, 0xA0, 0x14, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x75, 0xF0, 0x13, ++0x90, 0xA0, 0x4D, 0x12, 0x45, 0x8A, 0xE0, 0xFF, 0x7E, 0x00, 0x22, 0xD1, 0xF2, 0xEF, 0xF0, 0xE4, ++0xFB, 0xFD, 0x7F, 0x6C, 0x7E, 0x01, 0x01, 0x19, 0x90, 0xA0, 0x46, 0x12, 0x45, 0x8A, 0xE0, 0x24, ++0xFC, 0xFF, 0xE4, 0x90, 0xA2, 0x44, 0xF0, 0xA3, 0x22, 0x90, 0x9F, 0xB3, 0xE0, 0x30, 0xE0, 0x4A, ++0xA3, 0xE0, 0xFF, 0xD1, 0xDB, 0x90, 0x9F, 0xC6, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x9F, 0xBB, 0xF0, ++0x90, 0x9F, 0xC8, 0xF0, 0xA3, 0xF0, 0x90, 0x9F, 0xC5, 0x04, 0xF0, 0x90, 0x9F, 0xA5, 0xE0, 0x60, ++0x0F, 0xD1, 0xC4, 0x30, 0xE0, 0x04, 0x7F, 0x02, 0xE1, 0xB7, 0x7D, 0x05, 0x7F, 0x6F, 0x61, 0x17, ++0xD1, 0xBF, 0x30, 0xE0, 0x04, 0x7F, 0x01, 0xF1, 0xB7, 0x12, 0x87, 0xA7, 0x20, 0xE0, 0x0B, 0xEF, ++0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x12, 0x71, 0xA5, 0x22, 0x90, 0xA0, 0xB6, 0xF1, 0xEF, ++0x30, 0xE0, 0x63, 0x90, 0xA0, 0x17, 0xE0, 0x30, 0xE0, 0x5C, 0x90, 0xA0, 0xBA, 0xF1, 0xDE, 0x90, ++0xA0, 0xB6, 0xE0, 0x54, 0xBF, 0x12, 0x8F, 0x93, 0x90, 0xA0, 0x59, 0xE0, 0x24, 0xFB, 0x90, 0xA2, ++0x45, 0x12, 0x97, 0xBF, 0x31, 0x81, 0x12, 0x9F, 0x5A, 0x90, 0xA1, 0x85, 0xF0, 0x90, 0xA0, 0x7F, ++0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x19, 0xEF, 0x54, 0xEF, 0xF0, 0xE0, 0xC4, 0x13, 0x54, ++0x07, 0x20, 0xE0, 0x22, 0x31, 0x81, 0x75, 0xF0, 0x13, 0xD1, 0xE8, 0xEF, 0x12, 0xBB, 0xF9, 0x01, ++0x19, 0x90, 0xA1, 0x85, 0xE0, 0xFF, 0x64, 0x03, 0x60, 0x04, 0xEF, 0xB4, 0x01, 0x08, 0x90, 0xA0, ++0x19, 0x74, 0x05, 0xF0, 0x11, 0x46, 0x22, 0xEF, 0x64, 0x02, 0x70, 0x07, 0x90, 0x04, 0xD4, 0x74, ++0xFF, 0x80, 0x08, 0xEF, 0x64, 0x01, 0x70, 0x0C, 0x90, 0x04, 0xD4, 0x12, 0x60, 0xF8, 0x90, 0x04, ++0x88, 0x12, 0x60, 0xF8, 0x22, 0x90, 0xA0, 0x7F, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x22, 0xE4, 0x75, ++0xF0, 0x01, 0x02, 0x08, 0xD6, 0x90, 0xA2, 0x5C, 0xE0, 0x64, 0x03, 0x22, 0x90, 0x9F, 0xB7, 0xE0, ++0xC4, 0x13, 0x13, 0x54, 0x03, 0x22, 0x7D, 0x1F, 0x7F, 0x6F, 0x71, 0x17, 0x90, 0x05, 0x27, 0xE0, ++0x54, 0xBF, 0xF0, 0x90, 0x9F, 0x3B, 0x74, 0x04, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x7F, 0x8F, 0x12, 0x47, 0x84, 0xEF, 0x20, 0xE6, 0x02, 0x01, 0xEE, 0x90, 0x00, 0x8C, 0xE0, ++0x90, 0xA2, 0x8D, 0xF0, 0x7F, 0x8D, 0x12, 0x47, 0x84, 0x90, 0xA2, 0x8E, 0xEF, 0xF0, 0x90, 0x00, ++0x8E, 0xE0, 0x90, 0xA2, 0x8F, 0xF0, 0x90, 0xA2, 0x8E, 0xE0, 0x24, 0xFC, 0x60, 0x10, 0x24, 0x03, ++0x60, 0x02, 0x01, 0xE2, 0x90, 0xA2, 0x8D, 0xE0, 0xFF, 0x12, 0xA9, 0x39, 0x01, 0xE2, 0x90, 0xA2, ++0x8D, 0xE0, 0x75, 0xF0, 0x0F, 0xF1, 0x77, 0xE0, 0xFB, 0xE4, 0xFD, 0x31, 0x2B, 0x13, 0x13, 0x54, ++0x03, 0x31, 0x28, 0xF1, 0xA6, 0x31, 0x28, 0xC4, 0x54, 0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0x31, 0x21, ++0x75, 0xF0, 0x0F, 0xF1, 0xC4, 0xE0, 0xFB, 0xE4, 0xFD, 0x0F, 0x31, 0x21, 0x75, 0xF0, 0x0F, 0x90, ++0x95, 0x02, 0x31, 0x1B, 0x75, 0xF0, 0x0F, 0xB1, 0x4C, 0xC4, 0x13, 0x54, 0x01, 0xFB, 0x0D, 0x7F, ++0x01, 0x31, 0x21, 0x75, 0xF0, 0x0F, 0xB1, 0x4C, 0x54, 0x1F, 0x31, 0x1F, 0x75, 0xF0, 0x08, 0x90, ++0x89, 0x00, 0xF1, 0xDA, 0x31, 0x21, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x01, 0x31, 0x1B, 0x75, 0xF0, ++0x08, 0x90, 0x89, 0x02, 0x31, 0x1B, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x03, 0x31, 0x1B, 0x75, 0xF0, ++0x08, 0x90, 0x89, 0x04, 0xF1, 0xDA, 0x31, 0x21, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x05, 0x31, 0x1B, ++0x75, 0xF0, 0x08, 0x90, 0x89, 0x06, 0x31, 0x1B, 0x75, 0xF0, 0x08, 0x12, 0xBC, 0x5F, 0xFB, 0x0D, ++0x11, 0xF3, 0x7F, 0x8F, 0x12, 0x47, 0x84, 0xEF, 0x30, 0xE0, 0x03, 0x12, 0xA9, 0x94, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0xEF, 0x70, 0x04, 0x74, 0xF0, 0x80, 0x16, 0xEF, 0xB4, 0x01, 0x04, 0x74, 0xF4, ++0x80, 0x0E, 0xEF, 0xB4, 0x02, 0x04, 0x74, 0xF8, 0x80, 0x06, 0xEF, 0xB4, 0x03, 0x0C, 0x74, 0xFC, ++0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83, 0xEB, 0xF0, 0x22, 0x12, 0x45, 0x8A, 0xE0, 0xFB, ++0x0D, 0x11, 0xF3, 0x90, 0xA2, 0x8D, 0xE0, 0x22, 0xFB, 0x0D, 0xE4, 0xFF, 0x11, 0xF3, 0x90, 0xA2, ++0x8D, 0xE0, 0x75, 0xF0, 0x0F, 0x90, 0x95, 0x05, 0x12, 0x45, 0x8A, 0xE0, 0x22, 0xE4, 0xFF, 0x74, ++0x1F, 0x2F, 0x51, 0xD7, 0x74, 0x5A, 0xF0, 0x74, 0x0B, 0x2F, 0x12, 0xB5, 0x07, 0xE4, 0xF0, 0x0F, ++0xBF, 0x14, 0xEC, 0xE4, 0xFE, 0xE4, 0xFD, 0x75, 0xF0, 0x10, 0xEE, 0x90, 0x81, 0x00, 0xBD, 0x03, ++0x0D, 0x12, 0x45, 0x8A, 0xE5, 0x82, 0x2D, 0xB1, 0x65, 0x74, 0x80, 0xF0, 0x80, 0x0A, 0x12, 0x45, ++0x8A, 0xE5, 0x82, 0x2D, 0xB1, 0x65, 0xE4, 0xF0, 0x75, 0xF0, 0x08, 0xEE, 0xF1, 0x91, 0x2D, 0xB1, ++0x65, 0xE4, 0xF0, 0x0D, 0xBD, 0x10, 0xD0, 0x0E, 0xBE, 0x80, 0xCA, 0xE4, 0x90, 0xAD, 0xE2, 0xF0, ++0xFE, 0xE4, 0xFF, 0x12, 0x79, 0x9C, 0xF0, 0x0F, 0xBF, 0x05, 0xF8, 0x74, 0x82, 0x2E, 0x12, 0xB5, ++0x46, 0x74, 0x13, 0xF0, 0x74, 0x01, 0x2E, 0x12, 0xB4, 0xBB, 0xE4, 0xF0, 0x74, 0x01, 0x2E, 0x12, ++0xB4, 0xAE, 0x74, 0xC0, 0xF0, 0xEE, 0x12, 0x79, 0xE6, 0xE4, 0xF0, 0xA3, 0xF0, 0x74, 0x81, 0x2E, ++0x12, 0x79, 0xD0, 0x51, 0xCC, 0xF1, 0xC4, 0x74, 0x1B, 0xF0, 0x75, 0xF0, 0x0F, 0xEE, 0x90, 0x95, ++0x02, 0x12, 0x45, 0x8A, 0xE4, 0xB1, 0x47, 0x54, 0xE0, 0xB1, 0x47, 0x44, 0x20, 0xB1, 0x47, 0x54, ++0x3F, 0xF1, 0x7D, 0x54, 0xFC, 0x44, 0x01, 0xF1, 0x7D, 0x54, 0xF7, 0xF1, 0x7D, 0x54, 0xCF, 0xF1, ++0x7D, 0x54, 0x3F, 0xF0, 0x75, 0xF0, 0x0F, 0xEE, 0x31, 0x35, 0x54, 0xFC, 0xF0, 0x75, 0xF0, 0x0F, ++0xEE, 0x31, 0x35, 0x54, 0xF3, 0xF0, 0x75, 0xF0, 0x0F, 0xEE, 0x31, 0x35, 0x54, 0xCF, 0xF0, 0x75, ++0xF0, 0x0F, 0xEE, 0x31, 0x35, 0x44, 0x40, 0xF0, 0x75, 0xF0, 0x0F, 0xEE, 0x31, 0x35, 0x54, 0x7F, ++0xF0, 0x75, 0xF0, 0x0F, 0xEE, 0x12, 0x7C, 0x16, 0x54, 0xF0, 0xF0, 0x75, 0xF0, 0x0F, 0xEE, 0x12, ++0x7C, 0x16, 0x54, 0x0F, 0xF0, 0x75, 0xF0, 0x0F, 0xEE, 0x90, 0x95, 0x07, 0x51, 0xC9, 0xF1, 0x77, ++0x51, 0xCC, 0x90, 0x95, 0x09, 0x51, 0xC9, 0x90, 0x95, 0x0B, 0x51, 0xC9, 0x90, 0x95, 0x0C, 0x51, ++0xC9, 0x90, 0x95, 0x0D, 0x51, 0xC9, 0x90, 0x95, 0x0E, 0x51, 0xC9, 0x12, 0xB4, 0x9B, 0x51, 0xCC, ++0x12, 0x7F, 0xC1, 0xE0, 0xFD, 0x75, 0xF0, 0x10, 0xEE, 0x12, 0x7F, 0x5C, 0xED, 0xF0, 0x0E, 0xEE, ++0x64, 0x80, 0x60, 0x02, 0x21, 0x91, 0x90, 0xA1, 0x48, 0x74, 0x01, 0xF0, 0xA3, 0x04, 0xF0, 0xA3, ++0x74, 0x04, 0xF0, 0xA3, 0x74, 0x06, 0xF0, 0xA3, 0x74, 0x08, 0xF0, 0xE4, 0xFB, 0xFD, 0xFF, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x04, 0x30, 0x12, 0x9B, 0x96, 0x90, 0xA1, 0x48, 0xE0, ++0x90, 0x04, 0x33, 0xF0, 0x90, 0xA1, 0x49, 0xE0, 0x90, 0x04, 0x34, 0xF0, 0x90, 0xA1, 0x4A, 0xE0, ++0x90, 0x04, 0x35, 0xF0, 0x90, 0xA1, 0x4B, 0xE0, 0x90, 0x04, 0x36, 0xF0, 0x90, 0xA1, 0x4C, 0xE0, ++0x90, 0x04, 0x37, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x45, 0x8A, 0xE4, 0xF0, 0x75, 0xF0, ++0x0F, 0xEE, 0x22, 0x74, 0x1F, 0x25, 0x52, 0xF5, 0x82, 0xE4, 0x34, 0x9E, 0xF5, 0x83, 0x22, 0x12, ++0x06, 0x89, 0x54, 0x7F, 0x12, 0x5F, 0x09, 0xFF, 0x54, 0x1F, 0x90, 0xA1, 0x5D, 0xF0, 0xEF, 0x54, ++0x60, 0xC4, 0x13, 0x54, 0x07, 0x90, 0xA1, 0x60, 0x12, 0x5F, 0x0C, 0x54, 0x80, 0xF1, 0xA6, 0xF1, ++0xB5, 0xFF, 0x54, 0x03, 0xFE, 0xEF, 0x54, 0x30, 0xC4, 0x54, 0x0F, 0x90, 0xA1, 0x5F, 0xF1, 0xB8, ++0xFF, 0x54, 0x40, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x90, 0xA1, 0x5E, 0xF0, 0xEF, 0x54, 0x80, 0xF1, ++0xA6, 0xFF, 0xF1, 0xB9, 0x54, 0x08, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xFD, 0xEF, 0x12, 0xBB, 0xDB, ++0x90, 0xA1, 0x5B, 0x31, 0x31, 0x54, 0x7F, 0x4F, 0xF0, 0x90, 0xA1, 0x5E, 0xE0, 0x12, 0x69, 0x93, ++0xFF, 0x90, 0xA1, 0x5B, 0x31, 0x31, 0x54, 0xBF, 0x4F, 0xF0, 0xAF, 0x05, 0xEF, 0x60, 0x02, 0x81, ++0x0A, 0x90, 0xA1, 0x5D, 0xE0, 0x54, 0x1F, 0xFF, 0x90, 0xA1, 0x5B, 0xE0, 0xFD, 0x75, 0xF0, 0x0F, ++0xB1, 0x4C, 0x54, 0xE0, 0x4F, 0xF0, 0xEE, 0x54, 0x03, 0xFF, 0x75, 0xF0, 0x0F, 0xED, 0x31, 0x35, ++0x54, 0xFC, 0x4F, 0xF0, 0xEE, 0x54, 0x03, 0x25, 0xE0, 0x25, 0xE0, 0xFF, 0x90, 0xA1, 0x5B, 0xE0, ++0xFE, 0x31, 0x32, 0x54, 0xF3, 0x4F, 0xF0, 0x90, 0xA1, 0x5C, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x54, ++0xE0, 0xFF, 0xB1, 0x48, 0x54, 0xDF, 0x4F, 0xF0, 0x90, 0xA1, 0x5F, 0xE0, 0x54, 0x03, 0xC4, 0x54, ++0xF0, 0xFF, 0x90, 0xA1, 0x5B, 0x31, 0x31, 0x54, 0xCF, 0x4F, 0xF0, 0xE4, 0xFF, 0xEF, 0xF5, 0x82, ++0x75, 0x83, 0x00, 0xA3, 0xA3, 0xA3, 0x12, 0x06, 0xA2, 0xFE, 0x90, 0xA1, 0x5B, 0xB1, 0x58, 0xEE, ++0xF0, 0x0F, 0xEF, 0xB4, 0x04, 0xE7, 0x90, 0xA1, 0x5B, 0xE0, 0xFF, 0xB1, 0x6D, 0x90, 0xA1, 0x60, ++0xE0, 0x60, 0x37, 0xB4, 0x01, 0x09, 0xF1, 0xAD, 0xF1, 0x77, 0x74, 0x2E, 0xF0, 0x80, 0x1C, 0x90, ++0xA1, 0x60, 0xE0, 0xFF, 0xB4, 0x02, 0x09, 0xF1, 0xAD, 0xF1, 0x77, 0x74, 0x1E, 0xF0, 0x80, 0x0B, ++0xEF, 0xB4, 0x03, 0x07, 0xF1, 0xAD, 0xF1, 0x77, 0x74, 0x0E, 0xF0, 0x90, 0xA1, 0x5B, 0xE0, 0xFF, ++0x75, 0xF0, 0x0F, 0xF1, 0x77, 0xE0, 0xFD, 0x12, 0xB5, 0xE8, 0x22, 0x90, 0xA1, 0x58, 0x12, 0x45, ++0x9F, 0x90, 0xA1, 0x57, 0xEF, 0xF0, 0x12, 0x45, 0xA8, 0x54, 0x89, 0x00, 0x54, 0x8E, 0x01, 0x54, ++0x93, 0x10, 0x54, 0x98, 0x11, 0x54, 0x9D, 0x12, 0x54, 0xA2, 0x14, 0x55, 0x40, 0x15, 0x54, 0xA7, ++0x16, 0x54, 0xAC, 0x18, 0x54, 0xB1, 0x19, 0x54, 0xB6, 0x1C, 0x54, 0xBB, 0x20, 0x54, 0xC0, 0x24, ++0x54, 0xC5, 0x25, 0x54, 0xCA, 0x27, 0x54, 0xCF, 0x28, 0x54, 0xD4, 0x40, 0x54, 0xD8, 0x42, 0x55, ++0x40, 0x47, 0x54, 0xDD, 0x49, 0x54, 0xE2, 0x60, 0x54, 0xE7, 0x61, 0x54, 0xEC, 0x62, 0x54, 0xF0, ++0x63, 0x54, 0xF5, 0x64, 0x54, 0xFA, 0x65, 0x54, 0xFF, 0x66, 0x55, 0x04, 0x67, 0x55, 0x09, 0x68, ++0x55, 0x0E, 0x69, 0x55, 0x13, 0x6B, 0x55, 0x18, 0x6C, 0x55, 0x1D, 0x6D, 0x55, 0x22, 0x6E, 0x55, ++0x27, 0x6F, 0x55, 0x2C, 0x70, 0x00, 0x00, 0x55, 0x31, 0xB1, 0x41, 0x02, 0x99, 0xC8, 0xB1, 0x41, ++0x02, 0x9F, 0xC0, 0xB1, 0x41, 0x02, 0x58, 0xD3, 0xB1, 0x41, 0x02, 0x6D, 0x17, 0xB1, 0x41, 0x02, ++0xA0, 0xCA, 0xB1, 0x41, 0x02, 0xA0, 0xDE, 0xB1, 0x41, 0x02, 0x98, 0xF0, 0xB1, 0x41, 0x02, 0x85, ++0x45, 0xB1, 0x41, 0x02, 0x99, 0x95, 0xB1, 0x41, 0x02, 0x5F, 0x13, 0xB1, 0x41, 0x02, 0x5E, 0x02, ++0xB1, 0x41, 0x02, 0x6A, 0xA9, 0xB1, 0x41, 0x02, 0xA0, 0xED, 0xB1, 0x41, 0x02, 0xA1, 0x2C, 0xB1, ++0x41, 0x02, 0xA1, 0x54, 0xB1, 0x41, 0x41, 0xDF, 0xB1, 0x41, 0x02, 0xB6, 0x27, 0xB1, 0x41, 0x02, ++0xB6, 0x5B, 0xB1, 0x41, 0x02, 0x59, 0x0E, 0xB1, 0x41, 0x02, 0xA1, 0xB4, 0xB1, 0x41, 0xE1, 0xEC, ++0xB1, 0x41, 0x02, 0xA1, 0xD4, 0xB1, 0x41, 0x02, 0xA2, 0x01, 0xB1, 0x41, 0x02, 0xA2, 0x5F, 0xB1, ++0x41, 0x02, 0x5F, 0x84, 0xB1, 0x41, 0x02, 0x99, 0x14, 0xB1, 0x41, 0x02, 0xA1, 0xE8, 0xB1, 0x41, ++0x02, 0x98, 0x4F, 0xB1, 0x41, 0x02, 0xA2, 0x6D, 0xB1, 0x41, 0x02, 0x5F, 0x6C, 0xB1, 0x41, 0x02, ++0x92, 0xB2, 0xB1, 0x41, 0x02, 0xA2, 0xFB, 0xB1, 0x41, 0x02, 0xA1, 0x95, 0xB1, 0x41, 0x02, 0xA3, ++0x2D, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0xA1, 0x57, 0xE0, 0x90, 0x01, 0xC2, 0xF0, ++0x22, 0x90, 0xA1, 0x58, 0x02, 0x45, 0x96, 0xF0, 0x75, 0xF0, 0x0F, 0xEE, 0x90, 0x95, 0x03, 0x12, ++0x45, 0x8A, 0xE0, 0x22, 0xFF, 0x90, 0xA1, 0x61, 0xE0, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x00, 0x12, ++0x45, 0x8A, 0xE5, 0x82, 0x2F, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA1, 0x61, 0xEF, 0xF0, 0x75, 0xF0, 0x0F, 0xB1, 0x4C, 0x54, 0x1F, ++0xFB, 0x60, 0x12, 0x64, 0x02, 0x60, 0x0E, 0xEB, 0x64, 0x04, 0x60, 0x09, 0xEB, 0x64, 0x09, 0x60, ++0x04, 0xEB, 0xB4, 0x0C, 0x0B, 0xF1, 0xCA, 0xF1, 0x82, 0x54, 0xFC, 0x44, 0x02, 0xF0, 0x80, 0x09, ++0xF1, 0xCA, 0xF1, 0x82, 0x54, 0xFC, 0x44, 0x01, 0xF0, 0xE4, 0xF5, 0x51, 0x90, 0xA1, 0x61, 0xE0, ++0xFD, 0xF1, 0x8E, 0x25, 0x51, 0xB1, 0x65, 0xE0, 0xFE, 0xEB, 0x75, 0xF0, 0x07, 0xA4, 0x24, 0x56, ++0xF5, 0x82, 0xE4, 0x34, 0x40, 0xF5, 0x83, 0xE5, 0x82, 0x25, 0x51, 0xB1, 0x65, 0xE4, 0x93, 0xFC, ++0xEE, 0x5C, 0x90, 0xA1, 0x64, 0xF0, 0x75, 0xF0, 0x0F, 0xED, 0x31, 0x35, 0x54, 0x03, 0xFF, 0xBF, ++0x02, 0x0B, 0xE5, 0x51, 0x70, 0x07, 0x90, 0xA1, 0x64, 0xE0, 0x54, 0xF0, 0xF0, 0x90, 0xA1, 0x64, ++0xE0, 0xFF, 0xF1, 0x8A, 0x25, 0x51, 0xB1, 0x65, 0xEF, 0xF0, 0x05, 0x51, 0xE5, 0x51, 0x64, 0x08, ++0x70, 0xAA, 0x90, 0xA1, 0x61, 0x31, 0x31, 0xFF, 0xC4, 0x54, 0x03, 0xF5, 0x55, 0xE4, 0x90, 0xA1, ++0x62, 0xF0, 0x75, 0x52, 0x06, 0xE5, 0x52, 0xB4, 0x06, 0x07, 0xB1, 0x54, 0xE0, 0x54, 0x0F, 0x80, ++0x07, 0xF1, 0x8A, 0x25, 0x52, 0xB1, 0x65, 0xE0, 0x90, 0xA1, 0x63, 0xF0, 0x90, 0xA1, 0x63, 0xE0, ++0x60, 0x29, 0x75, 0x51, 0x07, 0xF1, 0xD2, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0xFF, 0x90, 0xA1, 0x63, 0xE0, 0xFD, 0xEF, 0x5D, 0x60, 0x08, 0xF1, 0xE3, 0x90, 0xA1, 0x62, 0xF0, ++0x80, 0x16, 0x15, 0x51, 0xE5, 0x51, 0xC3, 0x94, 0x00, 0x50, 0xDA, 0xE5, 0x52, 0x60, 0x09, 0x15, ++0x52, 0xE5, 0x52, 0xC3, 0x94, 0x00, 0x50, 0xAD, 0xE4, 0xFD, 0xF5, 0x52, 0xE5, 0x52, 0xB4, 0x06, ++0x07, 0xB1, 0x54, 0xE0, 0x54, 0x0F, 0x80, 0x07, 0xF1, 0x8A, 0x25, 0x52, 0xB1, 0x65, 0xE0, 0x90, ++0xA1, 0x63, 0xF0, 0x90, 0xA1, 0x63, 0xE0, 0x60, 0x24, 0xE4, 0xF5, 0x51, 0xF1, 0xD2, 0x80, 0x05, ++0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0xA1, 0x63, 0xE0, 0xFB, 0xEF, 0x5B, 0x60, ++0x05, 0xF1, 0xE3, 0xFD, 0x80, 0x0F, 0x05, 0x51, 0xE5, 0x51, 0xB4, 0x08, 0xDF, 0x05, 0x52, 0xE5, ++0x52, 0x64, 0x07, 0x70, 0xB7, 0x90, 0xA1, 0x62, 0xE0, 0xFE, 0x90, 0xA1, 0x61, 0xE0, 0xFB, 0x75, ++0xF0, 0x0F, 0xF1, 0xC4, 0xEE, 0xF0, 0x75, 0xF0, 0x0F, 0xEB, 0x90, 0x95, 0x02, 0x12, 0x45, 0x8A, ++0xED, 0xF0, 0x75, 0xF0, 0x10, 0xEB, 0x12, 0x7F, 0x5C, 0xE0, 0xFC, 0x54, 0x7F, 0xF5, 0x53, 0xEC, ++0x54, 0x80, 0xF5, 0x54, 0xE5, 0x53, 0xD3, 0x9E, 0x40, 0x0A, 0x90, 0xA1, 0x62, 0xE0, 0x45, 0x54, ++0xF5, 0x53, 0x80, 0x0B, 0xE5, 0x53, 0xC3, 0x9D, 0x50, 0x05, 0xE5, 0x54, 0x4D, 0xF5, 0x53, 0x90, ++0xA1, 0x61, 0xE0, 0xFE, 0x24, 0x82, 0x12, 0xB5, 0x46, 0xE5, 0x53, 0xF0, 0x75, 0xF0, 0x0F, 0xEE, ++0x31, 0x35, 0xFE, 0x12, 0x7C, 0xB3, 0xAF, 0x03, 0xE4, 0xFB, 0xAD, 0x53, 0x12, 0x79, 0xF6, 0x90, ++0xA1, 0x61, 0xE0, 0xFF, 0x75, 0xF0, 0x10, 0x12, 0x79, 0xB5, 0xE4, 0xF0, 0x90, 0xA1, 0x62, 0xE0, ++0xFE, 0xC3, 0x94, 0x14, 0x40, 0x07, 0xF1, 0x9A, 0x74, 0x03, 0xF0, 0x80, 0x2F, 0xEE, 0xD3, 0x94, ++0x0C, 0x40, 0x0D, 0x90, 0xA1, 0x61, 0xE0, 0x24, 0x81, 0xF1, 0x9D, 0x74, 0x02, 0xF0, 0x80, 0x1C, ++0x90, 0xA1, 0x62, 0xE0, 0xC3, 0x94, 0x04, 0x90, 0xA1, 0x61, 0xE0, 0x40, 0x09, 0x24, 0x81, 0xF1, ++0x9D, 0x74, 0x01, 0xF0, 0x80, 0x06, 0x24, 0x81, 0xF1, 0x9D, 0xE4, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xFF, 0x75, 0xF0, 0x0F, 0xE5, 0x51, 0x90, 0x95, 0x08, 0x02, 0x45, 0x8A, 0xF0, 0x75, 0xF0, ++0x0F, 0xEE, 0x90, 0x95, 0x04, 0x12, 0x45, 0x8A, 0xE0, 0x22, 0x90, 0xA1, 0x61, 0xE0, 0x75, 0xF0, ++0x08, 0x90, 0x89, 0x00, 0x12, 0x45, 0x8A, 0xE5, 0x82, 0x22, 0x74, 0x81, 0x2F, 0xF5, 0x82, 0xE4, ++0x34, 0x94, 0xF5, 0x83, 0x22, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x22, 0x90, 0xA1, 0x5B, ++0xE0, 0x75, 0xF0, 0x0F, 0x22, 0x90, 0xA1, 0x5C, 0xF0, 0x90, 0x00, 0x02, 0x02, 0x06, 0xA2, 0x75, ++0xF0, 0x0F, 0xE5, 0x5E, 0x90, 0x95, 0x01, 0x02, 0x45, 0x8A, 0x90, 0xA1, 0x61, 0xE0, 0x75, 0xF0, ++0x0F, 0x22, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x51, 0x08, 0x22, 0x12, 0x45, 0x8A, 0xE0, 0xFB, 0xE4, ++0xFD, 0x0F, 0x22, 0xE5, 0x52, 0x75, 0xF0, 0x08, 0xA4, 0x25, 0x51, 0x22, 0x7D, 0x01, 0x7F, 0x17, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x52, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, ++0x12, 0x45, 0x9F, 0x12, 0x60, 0x82, 0x64, 0x04, 0x70, 0x21, 0x90, 0xFD, 0x58, 0xE0, 0x20, 0xE0, ++0x12, 0x90, 0xA2, 0x52, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0x12, 0x45, 0x96, 0x11, 0x6F, 0x7F, ++0x01, 0x80, 0x0E, 0x7F, 0x01, 0x11, 0x36, 0x7F, 0x02, 0x80, 0x06, 0x7F, 0x02, 0x11, 0x36, 0x7F, ++0x03, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x11, 0x49, 0x7F, 0x04, 0x8F, 0x6F, 0x7F, 0x02, 0x12, 0x44, ++0xB7, 0x90, 0x9E, 0x02, 0xE0, 0x45, 0x6F, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0xA2, 0x04, 0x74, 0x15, 0xF0, 0x90, 0xA2, 0x12, 0x74, 0x01, 0xF0, 0x90, 0xA2, 0x06, 0xEF, ++0xF0, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0x04, 0x12, 0x84, 0x82, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, ++0xA2, 0x87, 0x12, 0x45, 0x9F, 0xE4, 0xFE, 0x90, 0xFD, 0x50, 0xEF, 0xF0, 0x64, 0x30, 0x60, 0x23, ++0xA3, 0xED, 0xF0, 0xEE, 0xC3, 0x9D, 0x50, 0x0C, 0x11, 0xC5, 0xFF, 0x74, 0x52, 0x11, 0xBC, 0xEF, ++0xF0, 0x0E, 0x80, 0xEF, 0xEE, 0xC3, 0x94, 0x06, 0x50, 0x1B, 0x74, 0x52, 0x11, 0xBC, 0xE4, 0xF0, ++0x0E, 0x80, 0xF1, 0xEE, 0xC3, 0x94, 0x07, 0x50, 0x0C, 0x11, 0xC5, 0xFF, 0x74, 0x51, 0x11, 0xBC, ++0xEF, 0xF0, 0x0E, 0x80, 0xEE, 0x90, 0xFD, 0x58, 0x74, 0x01, 0xF0, 0x22, 0x2E, 0xF5, 0x82, 0xE4, ++0x34, 0xFD, 0xF5, 0x83, 0x22, 0x90, 0xA2, 0x87, 0x12, 0x45, 0x96, 0x8E, 0x82, 0x75, 0x83, 0x00, ++0x02, 0x06, 0xA2, 0xF1, 0x5F, 0x90, 0x04, 0x24, 0xE0, 0xF5, 0x51, 0xE4, 0xFF, 0x31, 0x08, 0x8F, ++0x82, 0x11, 0xCD, 0x25, 0x51, 0xFE, 0x12, 0xBC, 0x38, 0x12, 0x45, 0x8A, 0xEE, 0xF0, 0x8F, 0x82, ++0x11, 0xCD, 0x25, 0x51, 0xFE, 0x75, 0xF0, 0x13, 0xEF, 0x90, 0xA0, 0x4D, 0x12, 0x45, 0x8A, 0xEE, ++0xF0, 0x0F, 0xEF, 0xB4, 0x03, 0xD7, 0x22, 0xF0, 0x90, 0xA1, 0x5B, 0x02, 0x45, 0x96, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xF1, 0x5F, 0x31, 0x08, 0x12, 0xA2, 0xEF, 0x7A, 0x9F, 0x79, 0xB3, ++0x12, 0x35, 0x26, 0x31, 0x08, 0x12, 0x06, 0x89, 0x20, 0xE0, 0x02, 0x41, 0x8A, 0x90, 0x05, 0x54, ++0xE0, 0x90, 0x9F, 0xC4, 0xF0, 0xE0, 0xC3, 0x13, 0x90, 0x9F, 0xC3, 0x12, 0x8F, 0xB0, 0x30, 0xE0, ++0x14, 0xF1, 0x0D, 0x90, 0x9F, 0xB4, 0xF0, 0x24, 0x0A, 0x90, 0x9F, 0xE5, 0x12, 0x57, 0xB8, 0x90, ++0x9F, 0xB5, 0xF0, 0x80, 0x49, 0xF1, 0x0D, 0xFF, 0xC3, 0x94, 0x2A, 0x50, 0x14, 0xEF, 0xC3, 0x94, ++0x03, 0x50, 0x07, 0x90, 0x9F, 0xB4, 0x74, 0x03, 0x80, 0x0C, 0xF1, 0x0D, 0x90, 0x9F, 0xB4, 0x80, ++0x05, 0x90, 0x9F, 0xB4, 0x74, 0x2A, 0xF0, 0x24, 0x0A, 0x90, 0x9F, 0xE5, 0xF0, 0x12, 0x57, 0xB9, ++0xFF, 0xC3, 0x94, 0x2A, 0x50, 0x12, 0xEF, 0xC3, 0x94, 0x03, 0x90, 0x9F, 0xB5, 0x50, 0x05, 0x74, ++0x03, 0xF0, 0x80, 0x0A, 0xEF, 0xF0, 0x80, 0x06, 0x90, 0x9F, 0xB5, 0x74, 0x2A, 0xF0, 0x12, 0x4F, ++0xEC, 0x30, 0xE0, 0x3D, 0x90, 0x9F, 0xB4, 0xE0, 0x75, 0xF0, 0x03, 0x84, 0x90, 0x9F, 0xBC, 0xF0, ++0xE0, 0xC3, 0x13, 0xA3, 0xF0, 0x90, 0x9F, 0xB5, 0xE0, 0x75, 0xF0, 0x03, 0x84, 0x90, 0x9F, 0xBE, ++0xF0, 0x90, 0x9F, 0xB4, 0xE0, 0xC3, 0x13, 0x90, 0x9F, 0xBF, 0xF0, 0x90, 0x9F, 0xB5, 0xE0, 0xC3, ++0x13, 0x90, 0x9F, 0xC0, 0xF0, 0x90, 0x01, 0x3E, 0x74, 0x08, 0xF0, 0xFD, 0x7F, 0x02, 0x12, 0x66, ++0xE2, 0xE4, 0x90, 0x9F, 0xF3, 0x31, 0x07, 0xF1, 0x66, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, ++0x36, 0x90, 0x9F, 0xB3, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x06, 0x12, 0x57, 0xA5, 0x30, 0xE0, 0x27, ++0x12, 0x06, 0x89, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x08, 0x90, 0x9F, 0xF5, 0xE0, 0x60, ++0x08, 0x80, 0x0B, 0x90, 0x9F, 0xF5, 0xE0, 0x60, 0x05, 0x75, 0x51, 0x01, 0x80, 0x03, 0xE4, 0xF5, ++0x51, 0x7D, 0x02, 0xAF, 0x51, 0x71, 0x20, 0x90, 0x9F, 0xB3, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, ++0x15, 0x12, 0x8F, 0x9A, 0x54, 0x07, 0x30, 0xE0, 0x07, 0x7D, 0x04, 0x7F, 0x02, 0x12, 0x62, 0x85, ++0x12, 0xBC, 0x76, 0x74, 0x11, 0xF0, 0x90, 0x05, 0x58, 0x74, 0x02, 0xF0, 0x90, 0x9F, 0xBB, 0xE0, ++0xB4, 0x01, 0x08, 0x90, 0x9F, 0xC6, 0x74, 0x01, 0xF0, 0x80, 0x28, 0x90, 0x9F, 0xBB, 0xE0, 0xB4, ++0x04, 0x08, 0x90, 0x9F, 0xC6, 0x74, 0x04, 0xF0, 0x80, 0x19, 0x90, 0x9F, 0xBB, 0xE0, 0xB4, 0x06, ++0x08, 0x90, 0x9F, 0xC6, 0x74, 0x02, 0xF0, 0x80, 0x0A, 0x90, 0x9F, 0xBB, 0xE0, 0xB4, 0x07, 0x03, ++0x12, 0x77, 0xB8, 0xE4, 0x90, 0x9F, 0xBB, 0xF0, 0x80, 0x59, 0x31, 0x08, 0xF1, 0x66, 0x12, 0x6C, ++0xFD, 0x30, 0xE0, 0x05, 0x75, 0x52, 0x02, 0x80, 0x11, 0x12, 0x06, 0x89, 0x12, 0x6E, 0xEB, 0x30, ++0xE0, 0x05, 0x75, 0x52, 0x01, 0x80, 0x03, 0xE4, 0xF5, 0x52, 0x12, 0x9F, 0xAA, 0x90, 0xA0, 0x14, ++0xE0, 0x30, 0xE0, 0x04, 0x7D, 0xAC, 0x80, 0x02, 0x7D, 0x2C, 0x7F, 0x40, 0x12, 0x46, 0x81, 0x31, ++0x08, 0xF1, 0x66, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x04, 0x7F, 0x03, 0x80, 0x02, 0x7F, ++0x01, 0x12, 0x8A, 0xA3, 0xAD, 0x52, 0x7F, 0x02, 0x71, 0x20, 0x12, 0x67, 0x6F, 0x12, 0xBC, 0x76, ++0x74, 0x43, 0xF0, 0x12, 0x9F, 0x33, 0x90, 0x9F, 0xC5, 0xF0, 0x90, 0x9F, 0xB6, 0x12, 0x57, 0xA5, ++0x30, 0xE0, 0x09, 0x90, 0x9F, 0xE6, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x0C, 0x7F, 0x01, 0x12, 0x97, ++0xCA, 0x90, 0x9F, 0xE6, 0xE0, 0x54, 0xFD, 0xF0, 0x7F, 0x03, 0x12, 0x8C, 0xDE, 0x90, 0x9F, 0xB3, ++0xE0, 0x20, 0xE0, 0x07, 0x90, 0x9F, 0xB7, 0xE0, 0x54, 0xBF, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x26, 0x8D, 0x27, 0x90, 0x9F, 0xB6, 0x12, 0x4F, ++0xEF, 0x30, 0xE0, 0x02, 0x81, 0x17, 0x90, 0x9F, 0xF6, 0xE0, 0x70, 0x5C, 0xE5, 0x26, 0x64, 0x02, ++0x60, 0x26, 0xE5, 0x27, 0x70, 0x22, 0x91, 0x1C, 0xE5, 0x26, 0x90, 0xA2, 0x31, 0xB4, 0x01, 0x05, ++0x12, 0x45, 0x72, 0x80, 0x08, 0x12, 0xBC, 0x8E, 0xEE, 0x44, 0x02, 0xFE, 0xEC, 0x91, 0x2A, 0x90, ++0xA2, 0x31, 0x12, 0x45, 0x72, 0x12, 0x91, 0xE4, 0xE5, 0x27, 0x64, 0x02, 0x70, 0x02, 0x81, 0x17, ++0xE5, 0x27, 0x70, 0x02, 0x81, 0x17, 0x91, 0x1C, 0x90, 0x9F, 0xF5, 0xE0, 0x90, 0xA2, 0x31, 0x60, ++0x05, 0x12, 0xBC, 0x8E, 0x80, 0x07, 0x12, 0x45, 0x72, 0xEE, 0x44, 0x02, 0xFE, 0x91, 0x29, 0x90, ++0xA2, 0x31, 0x91, 0x30, 0x7F, 0x48, 0x80, 0x7A, 0xE5, 0x26, 0x64, 0x02, 0x60, 0x25, 0x12, 0xBB, ++0x3D, 0x91, 0x29, 0xE5, 0x26, 0x90, 0xA2, 0x31, 0xB4, 0x01, 0x08, 0x12, 0x45, 0x72, 0xEF, 0x44, ++0x01, 0x80, 0x06, 0x12, 0x45, 0x72, 0xEF, 0x44, 0x02, 0xFF, 0x91, 0x29, 0x90, 0xA2, 0x31, 0x91, ++0x30, 0xF1, 0xDF, 0xE5, 0x27, 0x64, 0x02, 0x60, 0x4E, 0x12, 0x93, 0x03, 0xFF, 0x91, 0x29, 0xE5, ++0x27, 0x70, 0x0A, 0x12, 0xBC, 0x86, 0x44, 0x77, 0xFF, 0x91, 0x29, 0x80, 0x2E, 0x12, 0xBC, 0x86, ++0x44, 0x66, 0xFF, 0x91, 0x29, 0x12, 0xBB, 0x3D, 0xF1, 0xE6, 0x90, 0x9F, 0xF5, 0xE0, 0x90, 0xA2, ++0x35, 0x60, 0x08, 0x12, 0x45, 0x72, 0xEF, 0x44, 0x02, 0x80, 0x06, 0x12, 0x45, 0x72, 0xEF, 0x44, ++0x01, 0xFF, 0xF1, 0xE6, 0x90, 0xA2, 0x35, 0x91, 0x30, 0xF1, 0xDF, 0x90, 0xA2, 0x31, 0x91, 0x30, ++0x7F, 0x30, 0x7E, 0x09, 0x12, 0x38, 0x45, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0x48, 0x7E, 0x09, ++0x12, 0x37, 0x4E, 0xE4, 0xFF, 0xEE, 0x54, 0xF0, 0xFE, 0xEC, 0x90, 0xA2, 0x31, 0x02, 0x08, 0x6D, ++0x12, 0x45, 0x72, 0x90, 0xAA, 0xB9, 0x02, 0x08, 0x6D, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0xA1, 0xD4, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x37, 0x4E, 0x90, 0xA1, 0xDE, 0x12, 0x08, ++0x6D, 0x90, 0xA1, 0xD6, 0x12, 0x45, 0x72, 0x12, 0x08, 0x3A, 0x90, 0xA1, 0xDE, 0xF1, 0xAE, 0xC0, ++0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0xA1, 0xD6, 0x12, 0x45, 0x72, 0x90, 0xA1, 0xDA, ++0xF1, 0xAE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x54, 0x90, 0xA1, 0xE2, ++0x12, 0x08, 0x6D, 0x90, 0xA1, 0xE2, 0x91, 0x30, 0x90, 0xA1, 0xD4, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x12, 0x38, 0x45, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA0, 0x45, 0x12, 0x45, 0x8A, 0xE0, 0xFE, ++0x54, 0x03, 0xFF, 0xEE, 0x13, 0x13, 0x54, 0x07, 0xFD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0xA2, 0xA3, 0xED, 0xF0, 0xE4, 0xA3, 0xF0, 0xEF, 0x14, 0x60, 0x02, 0xA1, 0x92, 0x90, 0x06, ++0x03, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0xA2, 0xA3, 0xE0, 0xFB, 0xC4, 0x33, 0x54, 0xE0, 0xFE, 0x90, ++0x04, 0x42, 0xE0, 0x54, 0x9F, 0x4E, 0xFE, 0xF0, 0xE4, 0xFD, 0x12, 0xA9, 0x9B, 0x90, 0xA2, 0xA4, ++0xEF, 0xF0, 0x90, 0x04, 0x83, 0xF0, 0x90, 0xA1, 0xD6, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x01, ++0x90, 0xA1, 0xDA, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x01, 0xB1, 0xF8, 0x12, 0x08, 0x79, 0x00, ++0x00, 0x00, 0x01, 0x90, 0xA1, 0xDA, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x01, 0x7F, 0x00, 0x7E, ++0x09, 0xB1, 0xFC, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x10, 0x90, 0xA2, 0xA3, 0xF1, 0xD8, 0xEF, ++0x54, 0x03, 0xFF, 0xE4, 0x78, 0x01, 0x12, 0x08, 0x47, 0x78, 0x04, 0x12, 0xBB, 0xAB, 0x7E, 0x0A, ++0xB1, 0xFC, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0x90, 0xA2, 0xA3, 0xF1, 0xD8, 0xEF, 0x54, ++0x03, 0xFF, 0xE4, 0x78, 0x0A, 0x12, 0xBB, 0xAB, 0x7E, 0x0D, 0xB1, 0xFC, 0x12, 0x08, 0x79, 0x0C, ++0x00, 0x00, 0x00, 0x90, 0xA2, 0xA4, 0xF1, 0xD8, 0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78, 0x1A, 0x12, ++0x08, 0x5A, 0x90, 0xA1, 0xDA, 0x12, 0x08, 0x6D, 0x7F, 0x18, 0xB1, 0xFA, 0x12, 0x08, 0x79, 0x00, ++0x00, 0x0C, 0x00, 0x90, 0xA1, 0xDA, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0xF1, 0xB4, 0x12, ++0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0x90, 0xA1, 0xB5, 0x12, 0x08, 0x79, 0x00, 0x00, 0x04, 0x00, ++0x80, 0x58, 0x90, 0x06, 0x03, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0xA1, 0xD6, 0x12, 0x08, 0x79, 0x00, ++0x00, 0x00, 0x01, 0x90, 0xA1, 0xDA, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0xB1, 0xF8, 0x12, ++0x08, 0x79, 0x00, 0x00, 0x00, 0x01, 0x90, 0xA1, 0xDA, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, ++0x7F, 0x00, 0x7E, 0x09, 0xB1, 0xFC, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0x90, 0xA1, 0xDA, ++0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0xF1, 0xB4, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, ++0x90, 0xA1, 0xB5, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0x7D, 0x18, 0x7C, 0x00, 0xE4, 0xFF, ++0x12, 0x9C, 0xE8, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0x00, 0x7E, 0x08, 0x91, 0x39, 0x90, 0xA1, ++0xD6, 0x22, 0xF1, 0x5F, 0x31, 0x08, 0x12, 0x06, 0x89, 0xFF, 0x54, 0x7F, 0x90, 0x9F, 0x42, 0xF0, ++0xEF, 0x12, 0x57, 0xA6, 0xA3, 0xF1, 0x0C, 0xFD, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x90, 0x9F, ++0x40, 0xE0, 0x54, 0xF0, 0x4F, 0xF1, 0x65, 0xFC, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0x9F, 0x3D, ++0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xEC, 0x54, 0x04, 0xC3, 0x13, 0xFF, 0x90, 0x9F, 0x3F, 0xE0, 0x54, ++0xFD, 0x4F, 0xF0, 0xED, 0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0xA3, 0xE0, 0x54, 0x0F, 0x4F, 0x12, ++0x57, 0xB8, 0x90, 0x9F, 0x41, 0x12, 0x98, 0xE9, 0xFD, 0x7F, 0x02, 0x12, 0x62, 0x85, 0x31, 0x08, ++0xF1, 0x03, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x9F, 0xA4, 0x12, 0xA1, 0x86, 0xF1, 0x01, 0xFE, 0x54, ++0x04, 0xFD, 0xEF, 0x54, 0xFB, 0x12, 0xBC, 0x7E, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7, 0xF1, 0x00, ++0xFE, 0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, 0x12, 0xBC, 0x7E, 0x54, 0x20, 0xFE, 0xEF, 0x54, 0xDF, ++0xF1, 0x00, 0x54, 0x40, 0xFE, 0xEF, 0x54, 0xBF, 0x4E, 0x90, 0x9F, 0xA4, 0xF0, 0x12, 0x6C, 0xFC, ++0x20, 0xE0, 0x28, 0xEF, 0xC3, 0x13, 0x20, 0xE0, 0x0B, 0x75, 0x52, 0x01, 0x90, 0x9F, 0xF5, 0xE0, ++0x60, 0x0B, 0x80, 0x0E, 0xE4, 0xF5, 0x52, 0x90, 0x9F, 0xF5, 0xE0, 0x60, 0x05, 0xE4, 0xF5, 0x51, ++0x80, 0x03, 0x75, 0x51, 0x01, 0xAD, 0x52, 0xAF, 0x51, 0x71, 0x20, 0x31, 0x08, 0x90, 0xA1, 0x5E, ++0x12, 0x45, 0x9F, 0x12, 0xB7, 0x11, 0x90, 0x9F, 0x42, 0xE0, 0xFF, 0x12, 0x66, 0xFF, 0x90, 0x9F, ++0x42, 0xE0, 0x60, 0x1B, 0x90, 0xA1, 0x5E, 0x12, 0x45, 0x96, 0xF1, 0x0D, 0x54, 0x0F, 0xFF, 0x12, ++0x57, 0xB9, 0xFD, 0x12, 0xB7, 0x36, 0x12, 0x96, 0x42, 0x74, 0x01, 0xF0, 0x12, 0x95, 0x35, 0x22, ++0x4E, 0xFF, 0xF0, 0x90, 0x00, 0x05, 0x02, 0x06, 0xA2, 0x90, 0xA1, 0x5B, 0xF0, 0x90, 0x00, 0x01, ++0x02, 0x06, 0xA2, 0xF1, 0x5F, 0x12, 0x06, 0x89, 0xFF, 0xF1, 0x0D, 0xFE, 0x54, 0x03, 0xFD, 0xEE, ++0x13, 0x13, 0x54, 0x07, 0xFB, 0xC0, 0x03, 0x31, 0x08, 0x12, 0x57, 0xB9, 0x54, 0x0F, 0x90, 0xA2, ++0x77, 0xF0, 0xD0, 0x03, 0x12, 0x9C, 0x6F, 0x31, 0x08, 0xF1, 0x0D, 0x91, 0x9F, 0x90, 0xA1, 0x5E, ++0x74, 0x10, 0xF0, 0x90, 0xA1, 0x6C, 0x74, 0x07, 0x31, 0x07, 0x12, 0x06, 0x89, 0x90, 0xA1, 0x60, ++0xF0, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x5E, 0x12, 0x84, 0x82, 0x7F, 0x04, 0x02, 0x83, 0x59, 0x90, ++0xA1, 0x5B, 0x02, 0x45, 0x9F, 0xF0, 0x90, 0x00, 0x03, 0x02, 0x06, 0xA2, 0xF1, 0x5F, 0x31, 0x08, ++0x12, 0x06, 0x89, 0x90, 0xA0, 0x12, 0xF1, 0x0C, 0x90, 0xA0, 0x13, 0x31, 0x07, 0x7D, 0x02, 0x7F, ++0x38, 0x02, 0x57, 0xF0, 0xF1, 0x5F, 0x31, 0x08, 0x12, 0x06, 0x89, 0x90, 0x9F, 0xFF, 0xF1, 0x0C, ++0x90, 0xA0, 0x00, 0x12, 0x57, 0xB8, 0x90, 0xA0, 0x01, 0xF0, 0x90, 0x9F, 0xDB, 0xE0, 0x44, 0x01, ++0x31, 0x07, 0x12, 0x98, 0x11, 0xB4, 0x02, 0x05, 0x7F, 0x40, 0x12, 0x83, 0x59, 0x22, 0x12, 0x45, ++0x7E, 0x02, 0x45, 0x47, 0x7F, 0x84, 0x7E, 0x08, 0x91, 0x39, 0x90, 0xA1, 0xB1, 0x22, 0xF0, 0x90, ++0x05, 0x61, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x08, 0x12, 0x08, 0x5A, 0xA8, 0x04, 0xA9, ++0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, 0x05, 0x60, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22, 0x7F, ++0x2C, 0x7E, 0x09, 0x02, 0x38, 0x45, 0xEC, 0x90, 0xA2, 0x35, 0x02, 0x08, 0x6D, 0x7F, 0xF4, 0x12, ++0x47, 0x84, 0xEF, 0x20, 0xE5, 0x0E, 0x7F, 0xF4, 0x12, 0x47, 0x84, 0xEF, 0x7F, 0x01, 0x20, 0xE4, ++0x05, 0x7F, 0x02, 0x22, 0x7F, 0x03, 0x22, 0x12, 0x5F, 0xED, 0x90, 0x9E, 0x08, 0xEF, 0xF0, 0x11, ++0x9B, 0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x04, 0x23, 0xE0, 0x44, 0x80, 0xF0, 0x11, 0x79, ++0x44, 0x04, 0xFD, 0x7F, 0x17, 0x12, 0x46, 0x81, 0x7F, 0x16, 0x11, 0x94, 0x44, 0x40, 0xFD, 0x7F, ++0x16, 0x12, 0x46, 0x81, 0x12, 0xBB, 0x6F, 0xEF, 0x64, 0x01, 0x70, 0x30, 0x90, 0xA1, 0x45, 0xE0, ++0x54, 0x07, 0xF0, 0xE0, 0xFF, 0x64, 0x07, 0x60, 0x05, 0xEF, 0x64, 0x04, 0x70, 0x1E, 0x12, 0xA5, ++0x60, 0xEF, 0x64, 0x01, 0x70, 0x16, 0x7F, 0x16, 0x11, 0x94, 0x44, 0x60, 0xFD, 0x7F, 0x16, 0x12, ++0x46, 0x81, 0x11, 0x79, 0x44, 0x05, 0xFD, 0x7F, 0x17, 0x12, 0x46, 0x81, 0x7F, 0x38, 0x12, 0xBC, ++0xA6, 0x7F, 0x38, 0x12, 0x46, 0x81, 0x02, 0x37, 0x99, 0x7F, 0x17, 0x12, 0x47, 0x84, 0xEF, 0x54, ++0xFC, 0x22, 0x7F, 0xA3, 0x12, 0x47, 0x84, 0xEF, 0x54, 0xF8, 0x44, 0x05, 0xFD, 0x7F, 0xA3, 0x12, ++0x46, 0x81, 0x7F, 0xA0, 0x12, 0x47, 0x84, 0xEF, 0x54, 0x0F, 0x22, 0x11, 0xCB, 0x31, 0x00, 0x12, ++0xA5, 0x6B, 0x12, 0xA5, 0x8A, 0xE4, 0xF5, 0x0D, 0xF5, 0x0E, 0xF5, 0x0F, 0x75, 0x10, 0x80, 0xAD, ++0x0D, 0x7F, 0x50, 0x12, 0x46, 0x81, 0xAD, 0x0E, 0x7F, 0x51, 0x12, 0x46, 0x81, 0xAD, 0x0F, 0x7F, ++0x52, 0x12, 0x46, 0x81, 0xAD, 0x10, 0x7F, 0x53, 0x02, 0x46, 0x81, 0x90, 0x01, 0x30, 0xE4, 0x11, ++0xF8, 0x90, 0x01, 0x38, 0x11, 0xF8, 0xFD, 0x7F, 0x50, 0x12, 0x46, 0x81, 0xE4, 0xFD, 0x7F, 0x51, ++0x12, 0x46, 0x81, 0xE4, 0xFD, 0x7F, 0x52, 0x12, 0x46, 0x81, 0xE4, 0xFD, 0x7F, 0x53, 0x02, 0x46, ++0x81, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, ++0x90, 0x01, 0x34, 0x74, 0xFF, 0x11, 0xF8, 0x90, 0x01, 0x3C, 0x11, 0xF8, 0xFD, 0x7F, 0x54, 0x12, ++0x46, 0x81, 0x7D, 0xFF, 0x7F, 0x55, 0x12, 0x46, 0x81, 0x7D, 0xFF, 0x7F, 0x56, 0x12, 0x46, 0x81, ++0x7D, 0xFF, 0x7F, 0x57, 0x02, 0x46, 0x81, 0xEF, 0x64, 0x01, 0x70, 0x20, 0xB1, 0x1A, 0x90, 0x01, ++0x38, 0xE4, 0x11, 0xF8, 0x90, 0x01, 0x30, 0x11, 0xF8, 0x90, 0x01, 0x30, 0x74, 0x10, 0xF0, 0x90, ++0x01, 0x39, 0x74, 0x01, 0xF0, 0x90, 0x00, 0x53, 0x74, 0x80, 0xF0, 0x22, 0x12, 0xBA, 0x24, 0x90, ++0x9F, 0xB0, 0xE0, 0x90, 0x01, 0x31, 0xF0, 0x90, 0x9F, 0xB1, 0xE0, 0x90, 0x01, 0x32, 0xF0, 0x90, ++0x9F, 0xB2, 0xE0, 0x90, 0x01, 0x33, 0xF0, 0x90, 0x9F, 0xAB, 0xE0, 0x90, 0x01, 0x38, 0xF0, 0x90, ++0x9F, 0xAE, 0xE0, 0x90, 0x01, 0x3B, 0xB1, 0x39, 0x7F, 0x01, 0x51, 0xFD, 0x7E, 0x00, 0x7F, 0x62, ++0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x9F, 0x79, 0x3D, 0x12, 0x08, 0xAA, 0x12, 0xBB, 0x7C, 0x12, 0x08, ++0xAA, 0x90, 0x9F, 0x41, 0x74, 0x02, 0xF0, 0x90, 0x9F, 0x48, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, ++0x0A, 0xF0, 0x90, 0x9F, 0x4E, 0xE4, 0xF0, 0xA3, 0x74, 0x02, 0x51, 0xEE, 0xF0, 0x12, 0xB8, 0x4F, ++0xE4, 0xFD, 0xFF, 0x51, 0x85, 0x7D, 0x0C, 0x7F, 0x02, 0x51, 0x85, 0x51, 0x81, 0x90, 0x9E, 0x08, ++0xE0, 0xB4, 0x01, 0x08, 0x90, 0x9F, 0x4D, 0x74, 0xDD, 0xF0, 0x80, 0x12, 0x90, 0x9E, 0x08, 0xE0, ++0x90, 0x9F, 0x4D, 0xB4, 0x03, 0x05, 0x74, 0xD4, 0xF0, 0x80, 0x03, 0x74, 0x40, 0xF0, 0x7F, 0x79, ++0x12, 0x47, 0x84, 0xEF, 0x54, 0x03, 0xFF, 0xBF, 0x02, 0x0F, 0x7F, 0x28, 0x12, 0x47, 0x84, 0xEF, ++0x30, 0xE2, 0x06, 0x90, 0x9F, 0x5F, 0x74, 0x02, 0xF0, 0x90, 0x9F, 0x9F, 0x74, 0x02, 0xF0, 0xA3, ++0x74, 0x0F, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07, 0x51, 0xEE, 0xF0, ++0x90, 0x9F, 0xAA, 0xE0, 0x54, 0xFE, 0xF0, 0x90, 0x01, 0x38, 0xE0, 0x90, 0x9F, 0xAB, 0xF0, 0x90, ++0x01, 0x39, 0xE0, 0x90, 0x9F, 0xAC, 0xF0, 0x90, 0x01, 0x3A, 0xE0, 0x90, 0x9F, 0xAD, 0xF0, 0x90, ++0x01, 0x3B, 0xE0, 0x90, 0x9F, 0xAE, 0xF0, 0x90, 0x01, 0x30, 0xE0, 0x90, 0x9F, 0xAF, 0xF0, 0x90, ++0x01, 0x31, 0xE0, 0x90, 0x9F, 0xB0, 0xF0, 0x90, 0x01, 0x32, 0xE0, 0x90, 0x9F, 0xB1, 0xF0, 0x90, ++0x01, 0x33, 0xE0, 0x90, 0x9F, 0xB2, 0xF0, 0x7F, 0x01, 0x12, 0xBA, 0x00, 0x90, 0x05, 0x58, 0x74, ++0x02, 0xF0, 0x7E, 0x00, 0xFF, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x9F, 0x79, 0xA3, 0x12, 0x08, 0xAA, ++0x12, 0xBC, 0x48, 0xF1, 0xE5, 0xF1, 0x6F, 0xE4, 0x90, 0x9F, 0xA5, 0xF0, 0x22, 0xE0, 0x54, 0x7F, ++0xF0, 0x7D, 0x0C, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0xAB, 0xEF, ++0xF0, 0x14, 0x60, 0x15, 0x14, 0x60, 0x19, 0x24, 0x02, 0x70, 0x1A, 0xED, 0x54, 0x01, 0xFF, 0x90, ++0x9F, 0x3D, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x80, 0x0C, 0x90, 0x9F, 0x45, 0xED, 0xF0, 0x80, 0x05, ++0x90, 0x9F, 0x44, 0xED, 0xF0, 0x7F, 0x8F, 0x12, 0x47, 0x84, 0xEF, 0x30, 0xE4, 0x2B, 0x90, 0xA2, ++0xAB, 0xE0, 0x14, 0x60, 0x07, 0x14, 0x60, 0x17, 0x24, 0x02, 0x70, 0x1D, 0x90, 0x9F, 0x3D, 0xE0, ++0x12, 0xBB, 0xDB, 0x90, 0x9F, 0x45, 0xE0, 0x54, 0x7F, 0x4F, 0xFD, 0x7F, 0x88, 0x80, 0x07, 0x90, ++0x9F, 0x44, 0xE0, 0xFD, 0x7F, 0x89, 0x12, 0x46, 0x81, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90, ++0x9F, 0x5F, 0xE0, 0x24, 0x04, 0x90, 0x9F, 0x5A, 0xF0, 0xA3, 0x74, 0x0A, 0x22, 0x90, 0xA2, 0xAC, ++0xEF, 0xF0, 0x12, 0xA0, 0x20, 0x90, 0xA2, 0xAC, 0xE0, 0x60, 0x02, 0xF1, 0x6F, 0xB1, 0x14, 0x90, ++0x9F, 0x3C, 0x74, 0x04, 0xF0, 0x22, 0x7D, 0x01, 0x7F, 0x04, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0xA2, 0xAD, 0xED, 0xF0, 0x90, 0x9F, 0x3D, 0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, ++0x30, 0xE0, 0x02, 0x81, 0x5D, 0xEE, 0x12, 0x57, 0xA6, 0x30, 0xE0, 0x02, 0x81, 0x5D, 0x90, 0x9F, ++0x45, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0x81, 0x5D, 0xEF, 0x70, 0x02, 0x61, 0xD7, 0x24, 0xFE, 0x70, ++0x02, 0x81, 0x10, 0x24, 0xFE, 0x60, 0x48, 0x24, 0xFC, 0x70, 0x02, 0x81, 0x4B, 0x24, 0xFC, 0x60, ++0x02, 0x81, 0x5D, 0xEE, 0xB4, 0x0E, 0x02, 0x91, 0xA0, 0x90, 0x9F, 0x45, 0xE0, 0x70, 0x04, 0x7F, ++0x01, 0x51, 0xFD, 0x90, 0x9F, 0x45, 0xE0, 0xB4, 0x06, 0x02, 0x91, 0xC1, 0x90, 0x9F, 0x45, 0xE0, ++0xB4, 0x04, 0x0E, 0x90, 0xA2, 0xAD, 0xE0, 0xFF, 0x60, 0x05, 0x12, 0xB8, 0x17, 0x80, 0x02, 0xF1, ++0x5E, 0x90, 0x9F, 0x45, 0xE0, 0x64, 0x08, 0x60, 0x02, 0x81, 0x5D, 0xF1, 0x82, 0x81, 0x5D, 0x90, ++0x9F, 0x45, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x51, 0xFD, 0x90, 0x9F, 0x45, 0xE0, 0xB4, 0x06, 0x02, ++0x91, 0xC1, 0x90, 0x9F, 0x45, 0xE0, 0xB4, 0x0E, 0x07, 0x91, 0x62, 0xBF, 0x01, 0x02, 0x91, 0xA0, ++0x90, 0x9F, 0x45, 0xE0, 0x64, 0x0C, 0x60, 0x02, 0x81, 0x5D, 0x91, 0x62, 0xEF, 0x64, 0x01, 0x60, ++0x02, 0x81, 0x5D, 0x91, 0xE7, 0x81, 0x5D, 0x90, 0x9F, 0x45, 0xE0, 0xB4, 0x0E, 0x07, 0x91, 0x62, ++0xBF, 0x01, 0x02, 0x91, 0xA0, 0x90, 0x9F, 0x45, 0xE0, 0xB4, 0x06, 0x02, 0x91, 0xC1, 0x90, 0x9F, ++0x45, 0xE0, 0xB4, 0x0C, 0x07, 0x91, 0x62, 0xBF, 0x01, 0x02, 0x91, 0xE7, 0x90, 0x9F, 0x45, 0xE0, ++0x64, 0x04, 0x70, 0x59, 0x12, 0xB7, 0x63, 0xEF, 0x64, 0x01, 0x70, 0x51, 0xB1, 0x1A, 0x80, 0x4D, ++0x90, 0x9F, 0x45, 0xE0, 0xB4, 0x0E, 0x07, 0x91, 0x62, 0xBF, 0x01, 0x02, 0x91, 0xA0, 0x90, 0x9F, ++0x45, 0xE0, 0xB4, 0x06, 0x02, 0x91, 0xC1, 0x90, 0x9F, 0x45, 0xE0, 0xB4, 0x0C, 0x07, 0x91, 0x62, ++0xBF, 0x01, 0x02, 0x91, 0xE7, 0x90, 0x9F, 0x45, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x51, 0xFD, 0x90, ++0x9F, 0x45, 0xE0, 0xB4, 0x04, 0x17, 0x12, 0xB6, 0xBD, 0x80, 0x12, 0x90, 0x9F, 0x45, 0xE0, 0xB4, ++0x0C, 0x0B, 0x90, 0x9F, 0x3E, 0x12, 0x75, 0xEA, 0x30, 0xE0, 0x02, 0xF1, 0xCE, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9F, 0xB3, 0xE0, 0x30, 0xE0, 0x0D, ++0x90, 0x9F, 0xB9, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x08, 0x80, 0x1C, 0x12, 0xA7, 0x3D, ++0xBF, 0x01, 0x16, 0x90, 0x9F, 0x3D, 0x12, 0x77, 0x6B, 0x20, 0xE0, 0x0D, 0x90, 0x9F, 0x44, 0xE0, ++0xD3, 0x94, 0x04, 0x50, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x90, 0x9F, 0x3E, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x04, 0x51, 0x81, 0x80, 0x0E, 0x12, 0xBA, 0x9D, ++0xB1, 0x13, 0x90, 0x05, 0x27, 0xE0, 0x44, 0x80, 0xF0, 0x71, 0x0F, 0xE4, 0xFD, 0xFF, 0x02, 0x4B, ++0x17, 0x90, 0x9F, 0x3E, 0xE0, 0x90, 0x06, 0x04, 0x20, 0xE0, 0x07, 0xE0, 0x44, 0x40, 0xB1, 0x13, ++0x80, 0x0F, 0x51, 0x7D, 0x90, 0x05, 0x27, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x9F, 0x3C, 0x74, 0x0C, ++0xF0, 0xE4, 0xFD, 0xFF, 0x02, 0x4B, 0x17, 0xF1, 0xBD, 0x70, 0x27, 0x90, 0x9F, 0x3E, 0xE0, 0x54, ++0xFD, 0xF0, 0x7D, 0x2C, 0x7F, 0x6F, 0x12, 0x4B, 0x17, 0x12, 0x72, 0xBA, 0xBF, 0x01, 0x13, 0x90, ++0x9F, 0x3D, 0xE0, 0x44, 0x80, 0xF0, 0x7D, 0x0E, 0x7F, 0x01, 0x51, 0x85, 0x90, 0x9F, 0x3C, 0x74, ++0x0E, 0xF0, 0x22, 0xF0, 0x7D, 0x04, 0x7F, 0x01, 0x41, 0x85, 0x7D, 0x2D, 0x12, 0x9B, 0xA1, 0x90, ++0x01, 0x37, 0x74, 0x02, 0xF0, 0xFD, 0x7F, 0x03, 0xB1, 0x44, 0x12, 0x6F, 0x23, 0xE4, 0xFD, 0x7F, ++0x01, 0x51, 0x85, 0xE4, 0x90, 0x9F, 0x3C, 0xF0, 0x22, 0xF0, 0x7D, 0x01, 0x7F, 0x02, 0xB1, 0x44, ++0x7D, 0x02, 0x7F, 0x02, 0x74, 0x15, 0x2F, 0xF8, 0xE6, 0x4D, 0xFE, 0xF6, 0x74, 0x30, 0xC1, 0xD3, ++0x90, 0x01, 0x36, 0x74, 0x78, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x78, 0xFF, 0xB1, 0x44, 0x7D, ++0x02, 0x7F, 0x03, 0xB1, 0x44, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0x12, 0x97, 0xA9, 0xE4, 0xFF, ++0xF1, 0x35, 0xBF, 0x01, 0x11, 0x12, 0x71, 0x85, 0xF0, 0x90, 0x9F, 0x45, 0xE0, 0x20, 0xE2, 0x08, ++0x7D, 0x01, 0x7F, 0x04, 0x61, 0x1A, 0xD1, 0xBE, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0xEF, 0x64, 0x01, 0x70, 0x17, 0xF1, 0xB5, 0x60, 0x09, 0xB1, 0xCD, 0xD1, 0xE2, 0x12, 0x8F, 0xC2, ++0x80, 0x06, 0xB1, 0xCD, 0xD1, 0xCA, 0xD1, 0xEA, 0xF1, 0xCE, 0x80, 0x18, 0xF1, 0xB5, 0x60, 0x06, ++0xB1, 0xCD, 0xD1, 0xE2, 0x80, 0x04, 0xB1, 0xCD, 0xD1, 0xCA, 0xB1, 0x40, 0x7D, 0x01, 0x7F, 0x02, ++0xB1, 0x44, 0xF1, 0x82, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10, 0xF0, ++0xFD, 0x7F, 0x03, 0x22, 0x90, 0x05, 0x62, 0xE0, 0xFE, 0x90, 0x05, 0x61, 0xE0, 0xFD, 0xED, 0x78, ++0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0xA1, 0x75, 0xEE, 0xF0, 0xA3, 0xEF, ++0xF0, 0xF1, 0xBD, 0x60, 0x02, 0xC1, 0xB2, 0x90, 0x9F, 0x42, 0xE0, 0x70, 0x02, 0xC1, 0xB2, 0x12, ++0x8A, 0x29, 0x64, 0x01, 0x70, 0x22, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0x9F, 0x49, 0xF0, 0x90, 0x06, ++0xAA, 0xE0, 0x90, 0x9F, 0x48, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, 0x90, 0x9F, 0x48, 0xE0, 0xFE, ++0xFF, 0x80, 0x00, 0x90, 0x9F, 0x49, 0xEF, 0xF0, 0x12, 0xB8, 0x66, 0xE4, 0x90, 0x9F, 0x4B, 0x12, ++0x97, 0xA9, 0x12, 0x83, 0x4A, 0x12, 0x77, 0xD8, 0x54, 0xEF, 0xF0, 0x12, 0x8A, 0x29, 0x24, 0xFD, ++0x50, 0x02, 0x80, 0x0F, 0x90, 0x9F, 0x38, 0xE0, 0x30, 0xE0, 0x05, 0x12, 0x70, 0xA9, 0x80, 0x03, ++0x12, 0x70, 0x69, 0x12, 0x6E, 0xE7, 0x30, 0xE0, 0x57, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, ++0xE0, 0x21, 0x12, 0xBC, 0x57, 0x6F, 0x70, 0x48, 0x90, 0x9F, 0x3E, 0xE0, 0x44, 0x40, 0xF0, 0x12, ++0x8F, 0xA8, 0xB1, 0xC9, 0xD1, 0xE2, 0xD1, 0xF0, 0x12, 0xBC, 0x50, 0x90, 0x9F, 0x49, 0xE0, 0x14, ++0xF0, 0x80, 0x2D, 0x90, 0x9F, 0x40, 0xE0, 0xC4, 0x54, 0x0F, 0x64, 0x01, 0x70, 0x22, 0x12, 0xBC, ++0x57, 0xFE, 0x6F, 0x60, 0x1B, 0x90, 0x05, 0x73, 0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x12, 0x90, 0x9F, ++0x3E, 0x12, 0x75, 0xEA, 0x30, 0xE0, 0x09, 0xEF, 0x54, 0xBF, 0xB1, 0xC9, 0xD1, 0xCA, 0xB1, 0x3A, ++0xD1, 0xBE, 0x90, 0x9F, 0x38, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x02, 0xD1, 0xBE, 0x22, 0x90, 0x9F, ++0x3E, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x7D, 0x20, 0xE4, 0xFF, 0x74, 0x1D, 0x12, 0xBC, 0x9E, 0xFE, ++0xF6, 0x74, 0x38, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0x7D, 0x03, ++0x7F, 0x02, 0x74, 0x1D, 0x2F, 0xF8, 0xE6, 0x4D, 0x80, 0xE5, 0x7D, 0x02, 0x7F, 0x02, 0xD1, 0xF4, ++0x7D, 0x01, 0x7F, 0x02, 0x74, 0x15, 0x12, 0xBC, 0x9E, 0xFE, 0xF6, 0x74, 0x30, 0x80, 0xD4, 0xEF, ++0x70, 0x31, 0x7D, 0x78, 0x7F, 0x02, 0xD1, 0xF4, 0x7D, 0x02, 0x7F, 0x03, 0xD1, 0xF4, 0x7D, 0xC8, ++0x7F, 0x02, 0xD1, 0xCA, 0x12, 0x83, 0x4A, 0xF0, 0xE4, 0xFF, 0xF1, 0x35, 0xEF, 0x70, 0x0A, 0xF1, ++0x75, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x80, 0x06, 0x7D, 0x01, 0x7F, 0x0C, 0x71, 0x1A, 0xF1, ++0x7A, 0xE1, 0xE5, 0xA1, 0x50, 0x12, 0xAB, 0xC7, 0xEF, 0x54, 0x07, 0xFF, 0x12, 0x69, 0xDE, 0xE0, ++0xFD, 0x7C, 0x00, 0x12, 0xAB, 0xC0, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0xFF, 0xEE, 0x5C, 0xFE, 0xEF, 0x5D, 0x4E, 0x7F, 0x00, 0x60, 0x02, 0x7F, 0x01, 0x22, 0x12, 0xBC, ++0x48, 0xF1, 0x6F, 0x7D, 0x0C, 0x7F, 0x01, 0x41, 0x85, 0xE4, 0xFD, 0x7F, 0x0C, 0x71, 0x1A, 0xE4, ++0xFD, 0xFF, 0x02, 0x4B, 0x17, 0x12, 0xA0, 0x20, 0xF1, 0x5E, 0x90, 0x9F, 0x3D, 0xE0, 0x54, 0xF7, ++0xF0, 0x22, 0x12, 0xA0, 0x20, 0xF1, 0x6F, 0x51, 0x81, 0x90, 0x9F, 0x3C, 0x74, 0x0C, 0xF0, 0x22, ++0x90, 0x9F, 0xB3, 0xE0, 0x20, 0xE0, 0x1D, 0x90, 0x9F, 0x42, 0xE0, 0x64, 0x01, 0x70, 0x15, 0x12, ++0x8A, 0x7C, 0x12, 0x71, 0x18, 0x60, 0x05, 0xF1, 0x69, 0x02, 0x8F, 0x5F, 0x90, 0x9F, 0x45, 0xE0, ++0x70, 0x02, 0x71, 0x16, 0x22, 0x90, 0x9F, 0xA8, 0xE0, 0x90, 0x01, 0x3F, 0x22, 0xE4, 0xFF, 0xF1, ++0x35, 0xEF, 0x64, 0x01, 0x22, 0xF1, 0x6F, 0xB1, 0x14, 0x12, 0x6F, 0xB9, 0x61, 0x0F, 0x7D, 0x2F, ++0x7F, 0xFF, 0x12, 0x4B, 0x17, 0x12, 0x6F, 0x23, 0x7D, 0x08, 0x7F, 0x01, 0x51, 0x85, 0x90, 0x9F, ++0x3C, 0x74, 0x08, 0xF0, 0x22, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0x75, 0xE8, 0x07, ++0x75, 0xA8, 0x85, 0x22, 0x7F, 0x81, 0x12, 0x47, 0x84, 0xEF, 0x54, 0xFE, 0xFD, 0x7F, 0x81, 0x12, ++0x46, 0x81, 0x7F, 0x80, 0x12, 0x47, 0xF3, 0xFD, 0x7F, 0x80, 0x12, 0x46, 0x81, 0x12, 0xA5, 0xB2, ++0x12, 0x3E, 0x11, 0x51, 0x60, 0x12, 0xA5, 0xDE, 0x7F, 0x01, 0x12, 0x43, 0xA5, 0x90, 0xA0, 0x15, ++0x74, 0x02, 0xF0, 0xFF, 0x12, 0x43, 0xA5, 0x90, 0xA0, 0x15, 0xE0, 0x04, 0xF0, 0x12, 0x60, 0x07, ++0x11, 0x63, 0x90, 0x01, 0xCC, 0x74, 0x0F, 0xF0, 0x7F, 0x80, 0x12, 0xBC, 0xA6, 0x7F, 0x80, 0x12, ++0x46, 0x81, 0x75, 0x28, 0xFF, 0x12, 0x67, 0xED, 0x12, 0x96, 0x5A, 0x7F, 0x81, 0x12, 0x47, 0x84, ++0xEF, 0x44, 0x04, 0xFD, 0x7F, 0x81, 0x12, 0x46, 0x81, 0x12, 0xA5, 0xE6, 0x51, 0x43, 0xE4, 0xFF, ++0x02, 0x44, 0x2E, 0x31, 0x9B, 0x12, 0xA4, 0x14, 0x12, 0x51, 0x3D, 0x51, 0x7E, 0x12, 0x61, 0x7C, ++0x51, 0x3D, 0x12, 0xA9, 0xC3, 0x7E, 0x00, 0x7F, 0x19, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x9F, 0x79, ++0xE6, 0x12, 0x08, 0xAA, 0x12, 0xA2, 0x52, 0x90, 0x9F, 0xED, 0x12, 0x45, 0x72, 0x90, 0x9F, 0xE9, ++0x12, 0x08, 0x6D, 0x90, 0x9E, 0x08, 0xE0, 0xFF, 0x64, 0x02, 0x70, 0x1A, 0x31, 0x8C, 0x30, 0xE0, ++0x02, 0x7E, 0x01, 0x90, 0x9F, 0xF5, 0xEE, 0xF0, 0x31, 0x8C, 0x30, 0xE1, 0x02, 0x7E, 0x01, 0x90, ++0x9F, 0xF6, 0xEE, 0xF0, 0x80, 0x3A, 0xEF, 0x64, 0x01, 0x70, 0x15, 0x31, 0x25, 0x30, 0xE0, 0x02, ++0x7F, 0x01, 0x90, 0x9F, 0xF5, 0xEF, 0xF0, 0x31, 0x25, 0x30, 0xE1, 0x02, 0x7F, 0x01, 0x80, 0x1B, ++0x90, 0x9E, 0x08, 0xE0, 0x64, 0x03, 0x70, 0x18, 0x31, 0x1E, 0x30, 0xE0, 0x02, 0x7F, 0x01, 0x90, ++0x9F, 0xF5, 0xEF, 0xF0, 0x31, 0x1E, 0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, 0x9F, 0xF6, 0xEF, 0xF0, ++0x90, 0xFD, 0x68, 0xE0, 0x44, 0x02, 0xF0, 0x7F, 0x01, 0x12, 0x8A, 0xA3, 0x31, 0x2C, 0x12, 0x9F, ++0xAA, 0x90, 0x9F, 0xCC, 0x74, 0x01, 0xF0, 0x90, 0xA0, 0x02, 0xE0, 0x54, 0xFE, 0xF0, 0x90, 0x04, ++0x8F, 0xE4, 0xF0, 0x90, 0xA0, 0x14, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0xFD, ++0x78, 0xE0, 0x7F, 0x00, 0x22, 0x90, 0xFD, 0x70, 0xE0, 0x7F, 0x00, 0x22, 0x7E, 0x00, 0x7F, 0x33, ++0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x9F, 0x79, 0xB3, 0x12, 0x08, 0xAA, 0x90, 0x9F, 0xB4, 0x74, 0x0B, ++0xF0, 0xA3, 0x74, 0x08, 0xF0, 0x90, 0x9E, 0x08, 0xE0, 0xFC, 0x64, 0x02, 0x70, 0x14, 0x31, 0x8C, ++0x30, 0xE2, 0x02, 0x7E, 0x01, 0xEE, 0x31, 0x93, 0xFE, 0x90, 0x9F, 0xB6, 0xE0, 0x54, 0xBF, 0x4E, ++0xF0, 0x22, 0xEC, 0x64, 0x01, 0x70, 0x09, 0x31, 0x25, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x80, 0x0F, ++0x90, 0x9E, 0x08, 0xE0, 0x64, 0x03, 0x70, 0x13, 0x31, 0x1E, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0xEF, ++0x31, 0x93, 0xFF, 0x90, 0x9F, 0xB6, 0xE0, 0x54, 0xBF, 0x4F, 0xF0, 0x22, 0x90, 0xFD, 0x80, 0xE0, ++0x7E, 0x00, 0x22, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x54, 0xC0, 0x22, 0xE4, 0xFD, 0xFF, 0x12, 0xAB, ++0xC7, 0xEF, 0x54, 0x07, 0xFF, 0xED, 0x70, 0x12, 0x31, 0xDE, 0xC0, 0x83, 0xC0, 0x82, 0x31, 0xD6, ++0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5E, 0x80, 0x0F, 0x31, 0xDE, 0xC0, 0x83, 0xC0, 0x82, ++0x31, 0xD6, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x31, 0xE9, ++0x90, 0x9F, 0x37, 0xEF, 0xF0, 0x22, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x22, 0x74, 0x27, ++0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x9F, 0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x7D, 0x10, 0xED, 0x14, 0xF9, 0x24, 0x27, 0x31, 0xE1, 0xE0, 0x60, 0x38, 0x7C, 0x08, 0xEC, 0x14, ++0x90, 0xA2, 0xA9, 0xF0, 0x74, 0x27, 0x29, 0x31, 0xE1, 0xE0, 0xFB, 0x7A, 0x00, 0x90, 0xA2, 0xA9, ++0xE0, 0x12, 0xAB, 0xBF, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x12, 0xAB, ++0xCF, 0x60, 0x0F, 0xE9, 0x75, 0xF0, 0x08, 0xA4, 0xFF, 0x90, 0xA2, 0xA9, 0xE0, 0x2F, 0x04, 0xFF, ++0x80, 0x06, 0xDC, 0xCA, 0xDD, 0xBC, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0xBB, 0x7C, ++0x02, 0x08, 0xAA, 0x12, 0xBB, 0x6F, 0xBF, 0x01, 0x16, 0x90, 0xA1, 0x45, 0xE0, 0x54, 0x30, 0xFF, ++0xBF, 0x20, 0x07, 0x90, 0xA0, 0xC0, 0x74, 0x01, 0xF0, 0x22, 0xE4, 0x90, 0xA0, 0xC0, 0xF0, 0x22, ++0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0, 0x12, 0x96, 0xC3, ++0x90, 0x01, 0x99, 0xE0, 0x44, 0xC0, 0xF0, 0x90, 0x01, 0x9B, 0x74, 0x80, 0xF0, 0x22, 0x7E, 0x00, ++0x7F, 0x01, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x9F, 0x79, 0x38, 0x12, 0x08, 0xAA, 0x90, 0x9F, 0x38, ++0xE0, 0x54, 0xFD, 0xF0, 0xE4, 0x12, 0x60, 0xF9, 0xA3, 0x74, 0x0C, 0xF0, 0x90, 0xA0, 0xB6, 0xE0, ++0x54, 0xDF, 0x12, 0x97, 0xB4, 0x54, 0xE0, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x8B, 0x51, 0x8A, 0x52, 0x89, 0x53, 0x90, 0x05, 0x27, 0xE0, 0xF5, 0x54, 0x12, 0xA3, 0xA4, 0x7A, ++0x9F, 0x79, 0x38, 0xB1, 0x0D, 0x12, 0x06, 0x89, 0xFF, 0xC3, 0x13, 0x20, 0xE0, 0x02, 0x61, 0x60, ++0x90, 0x9F, 0x38, 0xE0, 0x30, 0xE0, 0x75, 0x12, 0x66, 0xDE, 0x75, 0x54, 0x21, 0xB1, 0x04, 0x30, ++0xE0, 0x07, 0xD1, 0xFE, 0x43, 0x54, 0x08, 0x80, 0x0D, 0xE4, 0x90, 0x9F, 0x39, 0xF0, 0xA3, 0xF0, ++0x7D, 0x40, 0xFF, 0x12, 0x66, 0xF4, 0x90, 0x9F, 0x38, 0xD1, 0xEA, 0x30, 0xE0, 0x03, 0x43, 0x54, ++0x12, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x54, 0x14, 0x90, 0x9F, 0x38, 0xE0, 0xC4, ++0x13, 0x54, 0x07, 0x30, 0xE0, 0x03, 0x43, 0x54, 0x80, 0x90, 0x9F, 0x38, 0x12, 0x4F, 0xEF, 0x20, ++0xE0, 0x03, 0x43, 0x54, 0x40, 0x91, 0x0C, 0x90, 0x9F, 0x3B, 0xE0, 0x70, 0x04, 0x7F, 0x01, 0x91, ++0x13, 0x90, 0x9F, 0x38, 0x91, 0xFC, 0x30, 0xE0, 0x04, 0x7F, 0x04, 0x80, 0x0B, 0xD1, 0xF2, 0xEF, ++0x60, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x02, 0x91, 0x13, 0x61, 0xD4, 0x75, 0x54, 0x01, 0x91, ++0x0C, 0x90, 0x9F, 0x3B, 0xE0, 0x64, 0x04, 0x60, 0x02, 0x81, 0x07, 0xFF, 0x91, 0x13, 0x81, 0x07, ++0x90, 0x9F, 0x38, 0xE0, 0x30, 0xE0, 0x75, 0x12, 0x66, 0xDE, 0x43, 0x54, 0x31, 0xB1, 0x04, 0x30, ++0xE0, 0x07, 0xD1, 0xFE, 0x43, 0x54, 0x08, 0x80, 0x07, 0x7D, 0x40, 0xE4, 0xFF, 0x12, 0x66, 0xF4, ++0x90, 0x9F, 0x38, 0xD1, 0xEA, 0x30, 0xE0, 0x03, 0x43, 0x54, 0x02, 0xEF, 0xC4, 0x54, 0x0F, 0x30, ++0xE0, 0x03, 0x43, 0x54, 0x04, 0x91, 0x0C, 0x90, 0x9F, 0x38, 0x91, 0xFC, 0x30, 0xE0, 0x0B, 0x12, ++0xA6, 0xB8, 0x60, 0x30, 0xE4, 0xFD, 0x7F, 0x02, 0x80, 0x1D, 0xF1, 0xB9, 0x90, 0x9F, 0x3C, 0xE0, ++0xB4, 0x02, 0x19, 0x12, 0x67, 0xC5, 0xD1, 0xF2, 0xBF, 0x01, 0x09, 0x90, 0x9F, 0x44, 0xE0, 0xFF, ++0x7D, 0x01, 0x80, 0x03, 0xE4, 0xFD, 0xFF, 0x12, 0x63, 0x1A, 0x80, 0x08, 0x90, 0x9F, 0x45, 0xE0, ++0x90, 0x9F, 0x3C, 0xF0, 0x90, 0x05, 0x40, 0x74, 0x22, 0xF0, 0x80, 0x2B, 0x75, 0x54, 0x01, 0x91, ++0x0C, 0x90, 0x9F, 0x3C, 0xE0, 0xB4, 0x02, 0x06, 0x7D, 0x01, 0x7F, 0x04, 0x80, 0x0B, 0x90, 0x9F, ++0x3C, 0xE0, 0xB4, 0x08, 0x07, 0x7D, 0x01, 0x7F, 0x0C, 0x12, 0x63, 0x1A, 0x12, 0xA7, 0x56, 0x90, ++0x9F, 0x44, 0x12, 0x70, 0x43, 0x51, 0x7E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x05, 0x27, 0xE5, ++0x54, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9F, 0x3B, 0xE0, 0xF5, 0x71, ++0xE5, 0x71, 0x6F, 0x70, 0x02, 0x81, 0xF7, 0xEF, 0x14, 0x60, 0x3C, 0x14, 0x60, 0x5D, 0x14, 0x60, ++0x7D, 0x14, 0x70, 0x02, 0x81, 0xD3, 0x24, 0x04, 0x60, 0x02, 0x81, 0xF7, 0xE5, 0x71, 0xB4, 0x04, ++0x05, 0x12, 0xB6, 0xA5, 0x81, 0xF7, 0xE5, 0x71, 0xB4, 0x02, 0x05, 0x12, 0xB6, 0xAA, 0x81, 0xF7, ++0xE5, 0x71, 0xB4, 0x03, 0x05, 0x12, 0xB6, 0xA1, 0x81, 0xF7, 0xE5, 0x71, 0x64, 0x01, 0x60, 0x02, ++0x81, 0xF7, 0x12, 0xB6, 0x99, 0x81, 0xF7, 0xE5, 0x71, 0xB4, 0x04, 0x04, 0xF1, 0xB2, 0x81, 0xF7, ++0xE5, 0x71, 0xB4, 0x02, 0x04, 0xF1, 0xC1, 0x80, 0x7E, 0xE5, 0x71, 0xB4, 0x03, 0x05, 0x12, 0xB6, ++0xAF, 0x80, 0x74, 0xE5, 0x71, 0x70, 0x70, 0xF1, 0x0A, 0x80, 0x6C, 0xE5, 0x71, 0xB4, 0x04, 0x04, ++0xF1, 0xAC, 0x80, 0x63, 0xE5, 0x71, 0xB4, 0x01, 0x04, 0xF1, 0x13, 0x80, 0x5A, 0xE5, 0x71, 0xB4, ++0x03, 0x04, 0xF1, 0xAA, 0x80, 0x51, 0xE5, 0x71, 0x70, 0x4D, 0xF1, 0x11, 0x80, 0x49, 0xE5, 0x71, ++0xB4, 0x04, 0x05, 0x12, 0xB6, 0xD4, 0x80, 0x3F, 0xE5, 0x71, 0xB4, 0x01, 0x04, 0xF1, 0xD0, 0x80, ++0x36, 0xE5, 0x71, 0xB4, 0x02, 0x05, 0x12, 0xA0, 0xBE, 0x80, 0x2C, 0xE5, 0x71, 0x70, 0x28, 0xF1, ++0xCE, 0x80, 0x24, 0xE5, 0x71, 0xB4, 0x03, 0x05, 0x12, 0xB6, 0xE1, 0x80, 0x1A, 0xE5, 0x71, 0xB4, ++0x01, 0x05, 0x12, 0x4F, 0xF6, 0x80, 0x10, 0xE5, 0x71, 0xB4, 0x02, 0x05, 0x12, 0xA0, 0xC3, 0x80, ++0x06, 0xE5, 0x71, 0x70, 0x02, 0xF1, 0xC9, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xFF, 0xC4, 0x13, ++0x13, 0x54, 0x03, 0x22, 0x90, 0x9F, 0x38, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x12, 0x35, 0x26, ++0xAB, 0x51, 0xAA, 0x52, 0xA9, 0x53, 0x22, 0x12, 0x99, 0x8C, 0xC4, 0x54, 0x0F, 0xFF, 0xBF, 0x0F, ++0x18, 0x90, 0xA0, 0x16, 0xE0, 0x54, 0xFE, 0xF0, 0x12, 0x66, 0xC6, 0xB1, 0x10, 0x12, 0x06, 0x89, ++0x54, 0x0F, 0xFF, 0x12, 0x9C, 0x22, 0x02, 0xA9, 0xC3, 0xB1, 0x10, 0x12, 0x5F, 0x0D, 0xFF, 0x12, ++0x06, 0x89, 0xFE, 0x54, 0x0F, 0x12, 0x9F, 0x3C, 0xEF, 0x12, 0x57, 0xB8, 0x54, 0x03, 0xFF, 0xD1, ++0xC9, 0x54, 0xFC, 0x4F, 0x12, 0x57, 0xB8, 0x54, 0x1C, 0xFF, 0xEE, 0x54, 0x0F, 0xFE, 0x75, 0xF0, ++0x0E, 0xD1, 0xCD, 0x54, 0xE3, 0x4F, 0x12, 0x57, 0xB8, 0x54, 0xE0, 0xFF, 0x75, 0xF0, 0x0E, 0xEE, ++0xD1, 0xCD, 0x54, 0x1F, 0x4F, 0x12, 0x98, 0xE9, 0xD1, 0xD5, 0xE4, 0xFB, 0xB1, 0xE2, 0xB1, 0x10, ++0x12, 0x5F, 0x03, 0xD1, 0xD5, 0x7B, 0x01, 0xB1, 0xE2, 0xB1, 0x10, 0x12, 0x5F, 0x66, 0x12, 0xA1, ++0x75, 0x12, 0x06, 0x89, 0xFE, 0x54, 0x0F, 0xFD, 0x75, 0xF0, 0x0E, 0x90, 0xA0, 0x23, 0x12, 0x45, ++0x8A, 0xEF, 0x12, 0x5F, 0x65, 0xC4, 0x13, 0x54, 0x07, 0xFF, 0x75, 0xF0, 0x0E, 0xED, 0x90, 0xA0, ++0x24, 0x12, 0x45, 0x8A, 0xEF, 0xF0, 0xEE, 0xC4, 0x54, 0x0F, 0xFF, 0x14, 0x6D, 0x70, 0x22, 0x90, ++0xA0, 0x18, 0xEF, 0x12, 0x86, 0xE8, 0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0x90, 0xA0, 0x17, 0xE0, ++0x54, 0x0F, 0x4F, 0xF0, 0x54, 0xF1, 0xF0, 0x90, 0xA0, 0x16, 0xE0, 0x44, 0x01, 0xF0, 0x12, 0x87, ++0xD0, 0x22, 0x8F, 0x54, 0x8D, 0x55, 0xAE, 0x03, 0x74, 0x1F, 0xC3, 0x95, 0x54, 0x40, 0x0F, 0x90, ++0xA1, 0x5F, 0xEE, 0xF0, 0xAB, 0x55, 0xE4, 0xFD, 0xD1, 0xC1, 0x24, 0xD4, 0x80, 0x40, 0x74, 0x3F, ++0xC3, 0x95, 0x54, 0x40, 0x0F, 0x90, 0xA1, 0x5F, 0xEE, 0xF0, 0xAB, 0x55, 0x7D, 0x20, 0xD1, 0xBF, ++0x24, 0x88, 0x80, 0x2A, 0x74, 0x5F, 0xC3, 0x95, 0x54, 0x40, 0x0F, 0x90, 0xA1, 0x5F, 0xEE, 0xF0, ++0xAB, 0x55, 0x7D, 0x40, 0xD1, 0xBF, 0x24, 0xD0, 0x80, 0x14, 0x74, 0x7F, 0xC3, 0x95, 0x54, 0x40, ++0x26, 0x90, 0xA1, 0x5F, 0xEE, 0xF0, 0xAB, 0x55, 0x7D, 0x60, 0xD1, 0xBF, 0x24, 0x84, 0xFD, 0xE4, ++0x34, 0x04, 0xFC, 0x75, 0xF0, 0x0E, 0xE5, 0x55, 0x12, 0xBB, 0x99, 0x75, 0xF0, 0x03, 0xEE, 0x12, ++0x45, 0x8A, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x22, 0xC3, 0xEF, 0x9D, 0xF5, 0x56, 0xC3, 0x94, 0x08, ++0x50, 0x1C, 0xE4, 0xF5, 0x57, 0xD1, 0xDD, 0xC0, 0x83, 0xC0, 0x82, 0x90, 0xA1, 0x5F, 0xE0, 0xD0, ++0x82, 0xD0, 0x83, 0x75, 0xF0, 0x03, 0x12, 0x45, 0x8A, 0xE5, 0x56, 0xF0, 0x80, 0x3E, 0xE5, 0x56, ++0xC3, 0x94, 0x10, 0x50, 0x09, 0x75, 0x57, 0x01, 0xE5, 0x56, 0x24, 0xF8, 0x80, 0x17, 0xE5, 0x56, ++0xC3, 0x94, 0x18, 0x50, 0x09, 0x75, 0x57, 0x02, 0xE5, 0x56, 0x24, 0xF0, 0x80, 0x07, 0x75, 0x57, ++0x03, 0xE5, 0x56, 0x24, 0xE8, 0xFF, 0xD1, 0xDD, 0xC0, 0x83, 0xC0, 0x82, 0x90, 0xA1, 0x5F, 0xE0, ++0xD0, 0x82, 0xD0, 0x83, 0x75, 0xF0, 0x03, 0x12, 0x45, 0x8A, 0xEF, 0xF0, 0xAF, 0x57, 0x22, 0xAF, ++0x54, 0xD1, 0x58, 0x90, 0xA1, 0x5B, 0xEF, 0xF0, 0x22, 0x75, 0xF0, 0x0E, 0xED, 0x90, 0xA0, 0x1B, ++0x12, 0x45, 0x8A, 0xE0, 0x22, 0xFF, 0x12, 0x06, 0x89, 0x54, 0x0F, 0xFD, 0x22, 0x75, 0xF0, 0x0E, ++0xEB, 0x90, 0xA0, 0x1E, 0x02, 0x45, 0x8A, 0x90, 0x9F, 0x3E, 0xE0, 0xFF, 0x13, 0x13, 0x13, 0x54, ++0x1F, 0x22, 0x90, 0x05, 0x43, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x01, ++0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, 0xFF, 0x02, 0x65, 0x44, 0x90, 0x9F, 0x3B, 0x74, 0x01, 0xF0, ++0x22, 0xF1, 0x0A, 0x7D, 0x20, 0x7F, 0xFF, 0x12, 0x4B, 0x17, 0xF1, 0x23, 0x90, 0x9F, 0x3B, 0x74, ++0x02, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x9B, 0xA6, 0x12, 0xA0, 0xB2, ++0x12, 0xA0, 0x9C, 0x12, 0xA0, 0x9C, 0x54, 0xFE, 0xFD, 0x7F, 0x02, 0x12, 0x46, 0x81, 0x90, 0x01, ++0x00, 0x74, 0x3F, 0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x20, 0xF0, ++0x90, 0x9F, 0xA4, 0x12, 0x77, 0x6B, 0x30, 0xE0, 0x05, 0x7F, 0x01, 0x12, 0x8A, 0xA3, 0x12, 0x8F, ++0xA1, 0x13, 0x30, 0xE0, 0x38, 0x90, 0x9F, 0xF5, 0xE0, 0x60, 0x08, 0x90, 0xA2, 0x9F, 0x74, 0x01, ++0xF0, 0x80, 0x05, 0xE4, 0x90, 0xA2, 0x9F, 0xF0, 0xEF, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x07, ++0xE4, 0x90, 0xA2, 0xA0, 0xF0, 0x80, 0x06, 0x90, 0xA2, 0xA0, 0x74, 0x02, 0xF0, 0x90, 0xA2, 0x9F, ++0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x12, 0x5B, 0x20, 0x7F, 0x01, 0x12, 0x8A, 0xA3, 0x90, 0x9F, 0xA3, ++0xE0, 0x60, 0x02, 0xE4, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE1, 0x1A, 0xF1, 0xB9, 0x7D, 0x23, ++0xE1, 0x15, 0x12, 0x67, 0x6F, 0xF1, 0xB9, 0xE1, 0x0A, 0x90, 0x05, 0x27, 0xE0, 0x44, 0x40, 0xF0, ++0x22, 0x12, 0xA0, 0x20, 0x12, 0x67, 0x6F, 0xE1, 0x0A, 0xF1, 0x0A, 0x02, 0x4F, 0xF6, 0xF1, 0x0A, ++0x7D, 0x21, 0x7F, 0xFF, 0x12, 0x4B, 0x17, 0x90, 0x9F, 0x3B, 0x74, 0x03, 0xF0, 0x22, 0xE4, 0x90, ++0xA1, 0x4D, 0xF0, 0x90, 0xA1, 0x4D, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0xDE, 0x90, 0x01, 0xC4, 0xF0, ++0x74, 0x6F, 0xA3, 0xF0, 0x12, 0x3E, 0x44, 0xBF, 0x01, 0x03, 0x12, 0x31, 0xFC, 0xC2, 0xAF, 0x90, ++0x9F, 0x42, 0xE0, 0x60, 0x0E, 0x90, 0x9F, 0x45, 0xE0, 0xFF, 0x90, 0x9F, 0x44, 0xE0, 0x6F, 0x60, ++0x02, 0x11, 0x34, 0xC2, 0xAF, 0x12, 0xA5, 0xBF, 0xBF, 0x01, 0x03, 0x12, 0x94, 0x05, 0xD2, 0xAF, ++0xD2, 0xAF, 0x90, 0xA0, 0xC0, 0xE0, 0xB4, 0x01, 0x03, 0x12, 0xAA, 0x4D, 0x12, 0x50, 0x0A, 0x12, ++0x42, 0xDD, 0x80, 0xAF, 0x90, 0x9F, 0x38, 0xE0, 0x90, 0x9F, 0x44, 0x30, 0xE0, 0x05, 0xE0, 0xFF, ++0x02, 0xB6, 0xF3, 0xE0, 0xFF, 0x7D, 0x01, 0x02, 0x63, 0x1A, 0xE4, 0xFF, 0x12, 0x67, 0x35, 0xBF, ++0x01, 0x0E, 0x90, 0x9F, 0x42, 0xE0, 0x60, 0x08, 0x11, 0x61, 0x54, 0x07, 0x70, 0x02, 0x11, 0x34, ++0x22, 0x90, 0x9F, 0x46, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x68, 0x54, ++0xC0, 0x70, 0x07, 0x11, 0x61, 0x54, 0xFD, 0xF0, 0x80, 0xBA, 0xE5, 0x68, 0x30, 0xE6, 0x16, 0x90, ++0x9F, 0x42, 0xE0, 0x64, 0x01, 0x70, 0x10, 0x31, 0x11, 0x64, 0x02, 0x60, 0x04, 0x31, 0xA5, 0x80, ++0x06, 0x31, 0x1F, 0x80, 0x02, 0x11, 0x61, 0xE5, 0x68, 0x90, 0x9F, 0x46, 0x30, 0xE7, 0x05, 0x12, ++0x48, 0x01, 0xE1, 0xC5, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x06, 0xA9, 0xE0, 0x90, 0xA1, 0x77, ++0xF0, 0xE0, 0xFD, 0x54, 0xC0, 0x70, 0x04, 0x11, 0x61, 0x80, 0x52, 0xED, 0x30, 0xE6, 0x3C, 0x90, ++0x9F, 0x42, 0xE0, 0x64, 0x02, 0x70, 0x26, 0x90, 0x9F, 0x3D, 0xE0, 0xFF, 0xC3, 0x13, 0x20, 0xE0, ++0x09, 0x90, 0x9F, 0x46, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x19, 0x31, 0x18, 0x64, 0x01, 0x70, 0x1D, ++0x90, 0x9F, 0x46, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x01, 0x71, 0xFE, 0x80, 0x10, 0x31, 0x11, 0x64, ++0x02, 0x60, 0x04, 0x31, 0xA5, 0x80, 0x06, 0x31, 0x1F, 0x80, 0x02, 0x11, 0x61, 0x90, 0xA1, 0x77, ++0xE0, 0x90, 0x9F, 0x46, 0x30, 0xE7, 0x05, 0x12, 0x48, 0x01, 0xE1, 0xC5, 0xE0, 0x54, 0xFD, 0xF0, ++0x22, 0x90, 0x9F, 0x46, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x9F, 0x40, 0xE0, 0x54, 0x0F, 0x22, 0x12, ++0x8F, 0x5F, 0x90, 0x9F, 0x45, 0xE0, 0x64, 0x0C, 0x60, 0x05, 0x12, 0x67, 0x69, 0xF1, 0xBF, 0x22, ++0x12, 0x6E, 0xE7, 0x30, 0xE0, 0x0C, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x03, 0x12, ++0xBC, 0x50, 0xB1, 0xE7, 0x30, 0xE0, 0x08, 0xF1, 0xD5, 0x54, 0x07, 0x70, 0x37, 0x80, 0x33, 0xF1, ++0x9F, 0x40, 0x2F, 0x12, 0x67, 0xBD, 0x70, 0x2C, 0x31, 0x18, 0x70, 0x06, 0x31, 0xD5, 0x31, 0x85, ++0xF0, 0x22, 0x31, 0xD5, 0x90, 0x9F, 0x4C, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0x02, 0x40, 0x0A, ++0x31, 0x85, 0xF0, 0xE4, 0x90, 0x9F, 0x4C, 0xF0, 0x80, 0x02, 0x31, 0x1F, 0xE4, 0x90, 0x9F, 0x4B, ++0xF0, 0x22, 0x11, 0x34, 0x22, 0x90, 0x9F, 0x3E, 0xE0, 0x54, 0xFB, 0x22, 0xE4, 0xFF, 0x12, 0x67, ++0x35, 0xBF, 0x01, 0x10, 0x90, 0x9F, 0x42, 0xE0, 0x60, 0x0A, 0x31, 0x18, 0x64, 0x02, 0x60, 0x02, ++0x80, 0x03, 0x31, 0x1F, 0x22, 0x90, 0x9F, 0xA4, 0xE0, 0xC4, 0x54, 0x0F, 0x20, 0xE0, 0x25, 0x90, ++0x04, 0x1D, 0xE0, 0x70, 0x1F, 0x90, 0x9E, 0x34, 0xE0, 0xFF, 0x90, 0xA2, 0x73, 0x74, 0x09, 0xF0, ++0x7B, 0x18, 0xE4, 0xFD, 0x51, 0x0B, 0x90, 0xA2, 0xA5, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x04, ++0x1F, 0x74, 0x20, 0xF0, 0x22, 0xF1, 0xAC, 0x40, 0x31, 0x90, 0x9F, 0x5C, 0xE0, 0x04, 0xF0, 0x90, ++0x9F, 0x9E, 0xE0, 0xFF, 0x90, 0x9F, 0x5C, 0xE0, 0xD3, 0x9F, 0x50, 0x1E, 0x90, 0x9F, 0x54, 0xE0, ++0x04, 0x12, 0x8A, 0x17, 0x90, 0x9F, 0x5B, 0xF0, 0xFB, 0x90, 0x9F, 0x54, 0xE0, 0xFF, 0xA3, 0xE0, ++0xFD, 0x90, 0xA2, 0x7F, 0x74, 0x04, 0xF0, 0x12, 0x95, 0x35, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0xA2, 0x71, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0xA2, 0x70, 0xEF, 0xF0, 0xE4, ++0xFD, 0xFC, 0x12, 0xBA, 0xA8, 0x7C, 0x00, 0xAD, 0x07, 0x90, 0xA2, 0x70, 0xE0, 0x90, 0x04, 0x25, ++0xF0, 0x90, 0xA2, 0x71, 0xE0, 0x60, 0x06, 0x12, 0xBB, 0xC3, 0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74, ++0x20, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0xF0, 0x12, 0xBB, 0xC3, ++0x54, 0xC0, 0xF0, 0x90, 0xA2, 0x73, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x18, 0x2E, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x12, 0x2E, 0xF1, 0x76, 0xE0, 0x54, 0x01, 0xFF, 0x90, ++0xA2, 0x72, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFE, 0xEF, 0x44, 0x02, 0x4E, 0xFF, 0xAE, 0x05, 0x74, ++0x12, 0x2E, 0xF1, 0x76, 0xEF, 0xF0, 0x74, 0x11, 0x2E, 0x12, 0x9F, 0x22, 0x74, 0xFF, 0xF0, 0x74, ++0x29, 0x2E, 0xB1, 0xF4, 0x54, 0xF7, 0xF0, 0x90, 0x9F, 0xB3, 0xE0, 0x30, 0xE0, 0x0D, 0x12, 0xBB, ++0xB7, 0x44, 0x80, 0xF0, 0x90, 0x05, 0x12, 0xE4, 0xF0, 0x80, 0x06, 0x12, 0xBB, 0xB7, 0x54, 0x7F, ++0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x9F, 0xBA, 0xE0, 0x44, 0x02, ++0xF0, 0x7D, 0x08, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x57, 0xEF, ++0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x9E, 0x04, 0xE0, 0x04, 0xF0, 0x90, 0x9F, 0xB3, 0xE0, 0x30, 0xE0, ++0x07, 0x90, 0x05, 0x10, 0xE4, 0xF0, 0xA3, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x44, 0x90, 0x05, ++0x22, 0xE0, 0x90, 0xA2, 0x5B, 0xF0, 0x7D, 0x26, 0x12, 0x9B, 0xA1, 0xEF, 0x64, 0x01, 0x70, 0x0E, ++0x71, 0xD4, 0x20, 0xE0, 0x1E, 0x90, 0xA0, 0x16, 0xE0, 0x20, 0xE0, 0x17, 0x80, 0x12, 0x12, 0x4F, ++0xEC, 0x30, 0xE0, 0x0F, 0x71, 0xD4, 0x20, 0xE0, 0x0A, 0x90, 0xA0, 0x16, 0xE0, 0x20, 0xE0, 0x03, ++0x12, 0x9A, 0xC6, 0x90, 0xA2, 0x5B, 0xE0, 0xFF, 0x7D, 0x27, 0x12, 0x4B, 0x17, 0x12, 0xBA, 0x3D, ++0x80, 0x12, 0x12, 0xBA, 0x3D, 0x71, 0xD4, 0x20, 0xE0, 0x0A, 0x90, 0xA0, 0x16, 0xE0, 0x20, 0xE0, ++0x03, 0x12, 0x9A, 0xC6, 0x90, 0x9F, 0xB3, 0xE0, 0x30, 0xE0, 0x0D, 0x12, 0x4F, 0xEC, 0x30, 0xE0, ++0x07, 0xF1, 0xCD, 0x7D, 0x28, 0x12, 0x4B, 0x17, 0x12, 0xBC, 0x02, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x90, 0xA2, 0x39, 0xA3, 0xE0, 0xFF, 0x90, 0xA2, 0x73, 0x74, 0x03, 0xF0, 0x7B, 0x06, 0x7D, 0x01, ++0x51, 0x0B, 0x90, 0xA2, 0x3D, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0xA2, 0x3C, 0xE0, ++0xFF, 0x74, 0x10, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0xA2, 0x3B, ++0xE0, 0xFF, 0xD1, 0x0A, 0x54, 0x3F, 0xF0, 0xEF, 0x60, 0x30, 0xB1, 0xF1, 0x44, 0x10, 0xD1, 0x09, ++0x44, 0x80, 0xF0, 0x12, 0x8F, 0x9A, 0x54, 0x07, 0x30, 0xE0, 0x28, 0x12, 0x9F, 0x2A, 0x50, 0x0C, ++0xEF, 0x25, 0xE0, 0x25, 0xE0, 0xFF, 0x74, 0x2B, 0x2D, 0x02, 0x9F, 0x50, 0x74, 0x2B, 0x2D, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x74, 0x7F, 0xF0, 0x22, 0xB1, 0xF1, 0x54, 0xEF, 0xD1, 0x09, ++0x44, 0x40, 0xF0, 0x22, 0x90, 0x9E, 0x35, 0xE0, 0xFF, 0x90, 0xA2, 0x58, 0xE0, 0xFB, 0x90, 0xA2, ++0x73, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0x51, 0x0B, 0x90, 0xA2, 0x59, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, ++0xF0, 0xFD, 0x90, 0xA2, 0x57, 0xE0, 0xFF, 0x71, 0x92, 0x90, 0xA0, 0x17, 0xE0, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x80, 0xEF, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x20, ++0x90, 0x05, 0x22, 0xE0, 0x90, 0xA2, 0x83, 0xF0, 0x7D, 0x29, 0x12, 0x9B, 0xA1, 0xBF, 0x01, 0x04, ++0xD1, 0x16, 0x71, 0x92, 0x90, 0xA2, 0x83, 0xE0, 0xFF, 0x7D, 0x2A, 0x12, 0x4B, 0x17, 0x80, 0x04, ++0xD1, 0x16, 0x71, 0x92, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, ++0x4F, 0xEC, 0x20, 0xE0, 0x02, 0xA1, 0xE6, 0x90, 0x9F, 0xBB, 0xE0, 0x64, 0x01, 0x70, 0x2A, 0x90, ++0x06, 0x92, 0xE0, 0x20, 0xE2, 0x06, 0x90, 0x04, 0xE3, 0xE0, 0x60, 0x17, 0xB1, 0xFD, 0xF0, 0x90, ++0x9F, 0xBF, 0xE0, 0x75, 0xF0, 0x03, 0x84, 0xFF, 0x90, 0x9F, 0xC8, 0xE0, 0xB5, 0x07, 0x02, 0x80, ++0x02, 0xA1, 0xCF, 0x12, 0xBC, 0x2F, 0x04, 0xF0, 0x22, 0x90, 0x9F, 0xBB, 0xE0, 0x64, 0x04, 0x70, ++0x27, 0x90, 0x06, 0x92, 0xE0, 0x20, 0xE2, 0x06, 0x90, 0x04, 0xE3, 0xE0, 0x60, 0x13, 0xB1, 0xFD, ++0xF0, 0x90, 0x9F, 0xBE, 0xE0, 0xFF, 0x90, 0x9F, 0xC8, 0xE0, 0xB5, 0x07, 0x02, 0x80, 0x02, 0xA1, ++0xCF, 0x12, 0xBC, 0x2F, 0x74, 0x04, 0xF0, 0x22, 0x90, 0x9F, 0xBB, 0xE0, 0x64, 0x06, 0x60, 0x02, ++0xA1, 0x62, 0xD1, 0x37, 0x50, 0x08, 0x90, 0x9F, 0xC9, 0xE0, 0x94, 0x03, 0x40, 0x1B, 0x12, 0x8F, ++0xB1, 0x90, 0x9F, 0xC6, 0x30, 0xE0, 0x05, 0x74, 0x05, 0xF0, 0x80, 0x03, 0x74, 0x02, 0xF0, 0xE4, ++0x90, 0x9F, 0xBB, 0xF0, 0x90, 0x9F, 0xC9, 0xF0, 0x22, 0x90, 0x9F, 0xBA, 0xB1, 0xEA, 0x30, 0xE0, ++0x1B, 0xEF, 0x54, 0xFB, 0xF0, 0xE4, 0xA3, 0x12, 0x8F, 0xB0, 0x30, 0xE0, 0x02, 0xA1, 0x84, 0xD1, ++0x37, 0x90, 0x9F, 0xC6, 0x40, 0x02, 0xA1, 0x87, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x9F, 0xBA, 0xE0, ++0x44, 0x02, 0xF0, 0x90, 0x9F, 0xC9, 0xE0, 0x04, 0xF0, 0x7F, 0x03, 0x12, 0x4E, 0xDB, 0xD1, 0x37, ++0x50, 0x0A, 0x90, 0x9F, 0xC9, 0xE0, 0x94, 0x03, 0x50, 0x02, 0xA1, 0xE6, 0x90, 0x9E, 0x35, 0xE0, ++0xFF, 0x90, 0xA2, 0x73, 0x74, 0x0A, 0xF0, 0x7B, 0x01, 0x7D, 0x01, 0x51, 0x0B, 0xAD, 0x07, 0xAC, ++0x06, 0xE4, 0xFF, 0x71, 0x92, 0x90, 0x9F, 0x3D, 0x12, 0x97, 0xB8, 0x54, 0xFD, 0xF0, 0x90, 0x9F, ++0xBA, 0xE0, 0x54, 0xFD, 0xF0, 0x54, 0xFB, 0x12, 0x65, 0x13, 0x7F, 0x03, 0x12, 0x8A, 0xA3, 0x90, ++0x05, 0x22, 0xE0, 0x44, 0x10, 0xFF, 0x7D, 0x03, 0x12, 0x4B, 0x17, 0x90, 0x04, 0x9C, 0xE0, 0x04, ++0xF0, 0x22, 0x90, 0x9F, 0xBB, 0xE0, 0x64, 0x07, 0x70, 0x2B, 0x90, 0x9F, 0xC9, 0xE0, 0xB4, 0x04, ++0x04, 0xF1, 0xB8, 0x80, 0x54, 0x90, 0x9F, 0xBA, 0xB1, 0xEA, 0x30, 0xE0, 0x0E, 0xEF, 0x54, 0xFB, ++0xF0, 0xE4, 0xA3, 0xF0, 0x90, 0x9F, 0xC6, 0x74, 0x05, 0xF0, 0x22, 0x51, 0xBA, 0x90, 0x9F, 0xC9, ++0xE0, 0x04, 0xF0, 0x80, 0x3A, 0x90, 0x9F, 0xBB, 0xE0, 0x64, 0x09, 0x70, 0x49, 0x90, 0x9F, 0xBA, ++0xE0, 0x30, 0xE0, 0x0A, 0xF1, 0xB8, 0x90, 0x9F, 0xBA, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x90, 0x06, ++0x92, 0xE0, 0x30, 0xE2, 0x1F, 0xD1, 0x00, 0xF0, 0xE0, 0xB4, 0x02, 0x13, 0x12, 0xBC, 0x96, 0x60, ++0x05, 0x74, 0x05, 0xF0, 0x80, 0x03, 0x74, 0x02, 0xF0, 0xE4, 0x90, 0x9F, 0xBB, 0xF0, 0x22, 0x7F, ++0x03, 0x02, 0x4E, 0xDB, 0x12, 0xBC, 0x96, 0x60, 0x05, 0x74, 0x05, 0xF0, 0x80, 0x03, 0x74, 0x02, ++0xF0, 0xE4, 0x90, 0x9F, 0xBB, 0xF0, 0x22, 0x90, 0x9F, 0x3D, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, ++0x22, 0x74, 0x29, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x06, 0x92, ++0x74, 0x04, 0xF0, 0x90, 0x9F, 0xC8, 0xE0, 0x04, 0x22, 0xF0, 0x74, 0x09, 0x2D, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x9E, 0x36, 0xE0, 0xFF, 0x90, 0xA2, 0x73, 0x74, 0x0B, ++0xF0, 0x7B, 0x08, 0x7D, 0x01, 0x51, 0x0B, 0x90, 0xA2, 0x81, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, ++0xFD, 0x90, 0xA2, 0x80, 0xE0, 0xFF, 0x22, 0x90, 0x9F, 0xC9, 0xE0, 0xFF, 0x90, 0x9F, 0xC8, 0xE0, ++0x2F, 0xFF, 0xE4, 0x33, 0xFE, 0x7C, 0x00, 0x7D, 0x03, 0x12, 0x07, 0x03, 0x90, 0x9F, 0xB4, 0xE0, ++0x2F, 0xFF, 0xEC, 0x3E, 0xFE, 0x90, 0x9F, 0xE5, 0xE0, 0xFD, 0xC3, 0xEF, 0x9D, 0x74, 0x80, 0xF8, ++0x6E, 0x98, 0x22, 0x90, 0xA1, 0x85, 0x12, 0x9B, 0x96, 0xF1, 0x68, 0x20, 0xE0, 0x0E, 0x90, 0xA1, ++0x86, 0xE0, 0xB4, 0x01, 0x07, 0x7D, 0x36, 0x7F, 0x6F, 0x12, 0x4B, 0x17, 0x90, 0xA1, 0x85, 0xE0, ++0x70, 0x0B, 0x90, 0xA1, 0x87, 0xE0, 0xFF, 0x7D, 0x05, 0x51, 0xC5, 0x80, 0x2B, 0x90, 0xA1, 0x85, ++0xE0, 0xB4, 0x01, 0x09, 0x90, 0xA1, 0x87, 0xE0, 0xFF, 0x71, 0xFE, 0x80, 0x1B, 0x90, 0xA1, 0x85, ++0xE0, 0xB4, 0x02, 0x14, 0xA3, 0xE0, 0xB4, 0x01, 0x0F, 0x90, 0x9E, 0x38, 0xE0, 0xFF, 0x90, 0xA0, ++0x10, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xD1, 0xC9, 0xF1, 0x68, 0x20, 0xE0, 0x0B, 0x90, 0xA1, 0x86, ++0xE0, 0x70, 0x05, 0xFD, 0xFF, 0x12, 0x4B, 0x17, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0xA2, 0x4C, 0xEF, 0xF0, 0xA3, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, ++0x1E, 0x90, 0x05, 0x22, 0xE0, 0x90, 0xA2, 0x51, 0xF0, 0x7D, 0x36, 0x12, 0x9B, 0xA1, 0xBF, 0x01, ++0x02, 0xF1, 0x13, 0x90, 0xA2, 0x51, 0xE0, 0xFF, 0x7D, 0x37, 0x12, 0x4B, 0x17, 0x80, 0x02, 0xF1, ++0x13, 0xF1, 0xCD, 0x7D, 0x38, 0x12, 0x4B, 0x17, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x90, 0xA2, 0x4C, 0xE0, 0xFF, 0x90, 0xA2, 0x73, 0x74, 0x0C, 0xF0, 0xE4, 0xFB, ++0x7D, 0x01, 0x51, 0x0B, 0x90, 0xA2, 0x4F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA2, 0x4D, 0xE0, ++0xFC, 0xA3, 0xE0, 0xFD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAB, 0x07, 0x90, 0xA2, 0xAF, ++0xED, 0xF0, 0xEC, 0xF9, 0xE0, 0xFF, 0xAE, 0x03, 0x74, 0x2A, 0x2E, 0x12, 0x9F, 0x46, 0x74, 0x2B, ++0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE9, 0xF0, 0x74, 0x0D, 0x2E, 0x12, 0x9A, 0xBD, ++0x44, 0x80, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA0, 0x02, 0xE0, 0x13, 0x13, 0x13, 0x54, ++0x1F, 0x22, 0xF0, 0x74, 0x12, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x90, 0x01, ++0x57, 0xE0, 0x60, 0x1A, 0x12, 0x83, 0x4D, 0xF0, 0xB1, 0xE7, 0x30, 0xE0, 0x02, 0x80, 0x46, 0xF1, ++0x9F, 0x40, 0x0B, 0xE4, 0xFF, 0x12, 0x67, 0x35, 0xBF, 0x01, 0x03, 0x31, 0x85, 0xF0, 0x22, 0x90, ++0x9F, 0x4B, 0xE0, 0x04, 0xF0, 0x90, 0x9F, 0x46, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x9F, 0x9F, 0xE0, ++0xFF, 0x90, 0x9F, 0x4B, 0xE0, 0xD3, 0x9F, 0x22, 0x90, 0x9F, 0xC6, 0x74, 0x05, 0xF0, 0x22, 0x7D, ++0x08, 0xE4, 0xFF, 0x41, 0xC5, 0x90, 0x9F, 0x3D, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x05, 0x22, ++0xE0, 0x54, 0x6F, 0xFF, 0x22, 0xEF, 0x54, 0xFB, 0xF0, 0x90, 0x9F, 0x46, 0xE0, 0x54, 0xFD, 0xF0, ++0x22, 0xE4, 0xFB, 0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x44, 0xDE, 0x90, 0xA1, 0x56, 0xEF, 0xF0, 0x60, ++0xF0, 0x90, 0x9E, 0x02, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, ++0xE0, 0x0E, 0x90, 0x9E, 0x02, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xFF, 0x11, 0x41, 0x12, 0xAC, 0xDF, ++0x11, 0x38, 0xFF, 0x30, 0xE1, 0x06, 0x54, 0xFD, 0xF0, 0x12, 0xA3, 0xB0, 0x11, 0x38, 0xFF, 0x30, ++0xE2, 0x06, 0x54, 0xFB, 0xF0, 0x12, 0xA4, 0xEE, 0x11, 0x38, 0xFF, 0x30, 0xE6, 0x06, 0x54, 0xBF, ++0xF0, 0x12, 0x97, 0xEB, 0xD2, 0xAF, 0x80, 0xB9, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x9E, 0x02, 0xE0, ++0x22, 0x90, 0xA0, 0xC2, 0xEF, 0xF0, 0x90, 0x9F, 0x37, 0xE0, 0x90, 0xA1, 0x44, 0xF0, 0xE4, 0x90, ++0xA0, 0xC3, 0xF0, 0x90, 0xA1, 0x44, 0xE0, 0xFE, 0x90, 0xA0, 0xC3, 0xE0, 0xFF, 0xC3, 0x9E, 0x50, ++0x2C, 0xE0, 0xFE, 0x31, 0x37, 0xE4, 0xF0, 0x75, 0xF0, 0x10, 0xEE, 0x31, 0xB5, 0xE0, 0x30, 0xE7, ++0x09, 0x74, 0x81, 0x2F, 0x31, 0xBB, 0xE4, 0xF0, 0x80, 0x0B, 0xF1, 0x9B, 0x90, 0xA0, 0xC3, 0xE0, ++0x31, 0x37, 0x74, 0x01, 0xF0, 0x90, 0xA0, 0xC3, 0xE0, 0x04, 0xF0, 0x80, 0xC6, 0x7F, 0x0C, 0x7E, ++0x00, 0x12, 0x3E, 0x50, 0xE4, 0x90, 0xA0, 0xC3, 0xF0, 0x90, 0xA1, 0x44, 0xE0, 0xFF, 0x90, 0xA0, ++0xC3, 0xE0, 0xFE, 0xC3, 0x9F, 0x40, 0x02, 0x21, 0x36, 0x74, 0xC4, 0x2E, 0x31, 0x39, 0xE0, 0x60, ++0x7D, 0x75, 0xF0, 0x10, 0xEE, 0x90, 0x81, 0x06, 0x31, 0xC3, 0xEE, 0x90, 0x81, 0x07, 0x31, 0xD8, ++0xFC, 0x31, 0xE6, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0xF0, 0x10, 0xEC, 0x90, 0x81, 0x0A, 0x31, ++0xC3, 0xEC, 0x90, 0x81, 0x0B, 0x31, 0xD8, 0x75, 0xF0, 0x0A, 0x90, 0x8D, 0x01, 0x12, 0x45, 0x8A, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x7F, 0x01, 0x90, 0xA0, 0xC3, 0xE0, 0xFE, 0x75, 0xF0, 0x10, 0x90, ++0x81, 0x0B, 0x12, 0x55, 0x5F, 0xE0, 0xFD, 0x31, 0x9C, 0xED, 0xF0, 0x0F, 0xEF, 0xB4, 0x05, 0xE7, ++0x90, 0xA0, 0xC3, 0xE0, 0xFF, 0x75, 0xF0, 0x10, 0x90, 0x81, 0x09, 0x12, 0x45, 0x8A, 0xE0, 0xFE, ++0x74, 0x81, 0x2F, 0x31, 0xD0, 0xEE, 0xF0, 0x90, 0xA0, 0xC3, 0xE0, 0xFF, 0x90, 0xA0, 0xC2, 0xE0, ++0xFD, 0x31, 0x41, 0x90, 0xA0, 0xC3, 0xE0, 0x24, 0x81, 0x31, 0xBB, 0x74, 0x01, 0xF0, 0x90, 0xA0, ++0xC3, 0xE0, 0x04, 0xF0, 0x01, 0x99, 0x22, 0x24, 0xC4, 0xF5, 0x82, 0xE4, 0x34, 0xA0, 0xF5, 0x83, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xED, 0x60, 0x40, 0x75, 0xF0, 0x0A, 0xEF, 0x90, ++0x8D, 0x01, 0x31, 0xAA, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x8D, 0x03, 0x31, 0xAA, 0xF0, 0x75, ++0xF0, 0x0A, 0xEF, 0x90, 0x8D, 0x05, 0x31, 0xAA, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x8D, 0x07, ++0x31, 0xAA, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x8D, 0x09, 0x31, 0xAA, 0xF0, 0xEF, 0x31, 0xE6, ++0xE4, 0xF0, 0xA3, 0xF0, 0x74, 0x81, 0x2F, 0x31, 0xD0, 0xE4, 0xF0, 0x31, 0xB1, 0xE0, 0x54, 0xBF, ++0x44, 0x80, 0xFE, 0x31, 0xB1, 0xEE, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, 0xF0, 0x0A, 0xEE, ++0x90, 0x8D, 0x01, 0x12, 0x45, 0x8A, 0x75, 0xF0, 0x02, 0xEF, 0x12, 0x45, 0x8A, 0xE4, 0xF0, 0xA3, ++0x22, 0x75, 0xF0, 0x10, 0xEF, 0x90, 0x81, 0x03, 0x02, 0x45, 0x8A, 0xF5, 0x82, 0xE4, 0x34, 0x93, ++0xF5, 0x83, 0x22, 0x12, 0x45, 0x8A, 0xE0, 0xFD, 0x75, 0xF0, 0x10, 0x22, 0x74, 0x81, 0x25, 0x51, ++0xF5, 0x82, 0xE4, 0x34, 0x9C, 0xF5, 0x83, 0x22, 0x12, 0x45, 0x8A, 0xE0, 0xFE, 0xED, 0xFF, 0x90, ++0xA0, 0xC3, 0xE0, 0x22, 0xE5, 0x51, 0x25, 0xE0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, ++0x83, 0x22, 0xAD, 0x60, 0xAF, 0x5E, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x46, ++0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x91, 0x07, 0xE0, 0x90, 0xA2, 0x4B, 0xF0, 0xED, 0x54, 0x7F, 0x90, ++0xA2, 0x4A, 0xF0, 0xEB, 0x70, 0x27, 0x90, 0xA2, 0x46, 0xE0, 0xFD, 0x75, 0xF0, 0x0F, 0x12, 0x57, ++0x82, 0x54, 0xF7, 0xF0, 0x90, 0xA2, 0x4B, 0xE0, 0x54, 0x7F, 0xF0, 0xAF, 0x05, 0x90, 0xA2, 0x47, ++0xE0, 0xFD, 0xE4, 0x90, 0xA1, 0xC4, 0xF0, 0xFB, 0x12, 0xAA, 0xC7, 0x80, 0x62, 0x90, 0xA2, 0x46, ++0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0xA1, 0xC4, 0x74, 0x05, 0xF0, 0xE4, 0xFB, 0x12, 0xAA, 0xC7, ++0x90, 0xA2, 0x4A, 0xE0, 0xFF, 0xC3, 0x94, 0x19, 0x40, 0x0E, 0xEF, 0xD3, 0x94, 0x1B, 0x50, 0x08, ++0x90, 0x04, 0xCF, 0x74, 0x02, 0xF0, 0x80, 0x05, 0x90, 0x04, 0xCF, 0xE4, 0xF0, 0x90, 0xA2, 0x46, ++0xE0, 0xFF, 0x75, 0xF0, 0x0F, 0x12, 0x57, 0x82, 0x44, 0x08, 0xF0, 0x75, 0xF0, 0x10, 0xEF, 0x90, ++0x81, 0x01, 0x12, 0x9F, 0x60, 0xFF, 0x90, 0xA2, 0x4B, 0xF0, 0x90, 0xA2, 0x4A, 0xE0, 0x90, 0x40, ++0xCB, 0x93, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x4F, 0x90, 0xA2, 0x4B, 0xF0, 0x44, 0x80, 0xF0, 0x90, ++0xA2, 0x47, 0xF1, 0xC7, 0xF1, 0x5C, 0xEF, 0xF0, 0xEE, 0x70, 0x05, 0x90, 0x01, 0xC8, 0xEF, 0xF0, ++0x90, 0xA2, 0x4B, 0xF1, 0xC7, 0x91, 0x0B, 0xEF, 0xF0, 0x75, 0xF0, 0x10, 0xEE, 0xD1, 0xE1, 0x54, ++0xFC, 0xFF, 0x90, 0xA2, 0x49, 0xE0, 0x4F, 0xFE, 0x90, 0xA2, 0x46, 0xE0, 0xFF, 0x75, 0xF0, 0x10, ++0x90, 0x81, 0x05, 0x12, 0x45, 0x8A, 0xEE, 0xF0, 0x7D, 0x01, 0x31, 0x41, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xE4, 0xF5, 0x68, 0x90, 0x9F, 0x37, 0xE0, 0xFF, 0xE5, 0x68, 0xC3, 0x9F, 0x40, 0x02, 0x81, ++0x06, 0xAF, 0x68, 0x12, 0x67, 0x35, 0xEF, 0x70, 0x02, 0x81, 0x02, 0x75, 0xF0, 0x0F, 0xE5, 0x68, ++0x12, 0x57, 0x82, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x20, 0xE0, 0x02, 0x81, 0x02, 0x75, 0xF0, 0x10, ++0xE5, 0x68, 0x91, 0x0B, 0xE0, 0x20, 0xE7, 0x02, 0x80, 0x13, 0x75, 0xF0, 0x10, 0xE5, 0x68, 0x90, ++0x81, 0x02, 0x12, 0x45, 0x8A, 0xE0, 0x90, 0xA1, 0x75, 0xF0, 0x20, 0xE7, 0x09, 0x90, 0x01, 0xC1, ++0xE0, 0x44, 0x20, 0xF0, 0x81, 0x02, 0x75, 0xF0, 0x0F, 0xE5, 0x68, 0x91, 0x16, 0x54, 0x0F, 0xFF, ++0x75, 0xF0, 0x0F, 0xE5, 0x68, 0x91, 0xC1, 0xE0, 0xFD, 0x90, 0xA1, 0x9B, 0xE4, 0xF0, 0xA3, 0xED, ++0xF0, 0x12, 0xB4, 0xF0, 0xB1, 0xA5, 0xE5, 0x68, 0xF0, 0x90, 0xA1, 0x75, 0xE0, 0x54, 0x40, 0x12, ++0xB5, 0x22, 0x7B, 0x01, 0x7A, 0x00, 0x7D, 0x02, 0x7F, 0x10, 0xD1, 0xEF, 0x90, 0xA1, 0x75, 0xE0, ++0x30, 0xE6, 0x2D, 0x75, 0xF0, 0x0F, 0xE5, 0x68, 0x91, 0x16, 0x54, 0xF0, 0xF0, 0x75, 0xF0, 0x0F, ++0xE5, 0x68, 0x91, 0x16, 0x54, 0x0F, 0xF0, 0xB1, 0xA5, 0xE5, 0x68, 0x12, 0x60, 0xF5, 0xF1, 0xAA, ++0x7D, 0x01, 0x7F, 0x10, 0xD1, 0xEF, 0x75, 0xF0, 0x10, 0xE5, 0x68, 0x90, 0x81, 0x00, 0x80, 0x52, ++0x75, 0xF0, 0x0F, 0xE5, 0x68, 0x91, 0x16, 0xFF, 0x54, 0x0F, 0x60, 0x29, 0x75, 0xF0, 0x0F, 0xE5, ++0x68, 0x90, 0x95, 0x06, 0x12, 0x45, 0x8A, 0xEF, 0x54, 0xF0, 0xFE, 0xEF, 0x14, 0x54, 0x0F, 0x4E, ++0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x68, 0x91, 0xC1, 0x91, 0xAB, 0x12, 0x51, 0x35, 0x91, 0xB3, 0x7B, ++0x01, 0xAF, 0x68, 0x21, 0xF6, 0x75, 0xF0, 0x0F, 0xE5, 0x68, 0x12, 0x57, 0x82, 0xC4, 0x54, 0x03, ++0xFF, 0xBF, 0x01, 0x06, 0xAF, 0x68, 0x91, 0x1E, 0x80, 0x18, 0x75, 0xF0, 0x0F, 0xE5, 0x68, 0x90, ++0x95, 0x0E, 0x12, 0x45, 0x8A, 0x91, 0xAB, 0x12, 0x51, 0x35, 0x91, 0xB3, 0xE4, 0xFB, 0xAF, 0x68, ++0x31, 0xF6, 0x05, 0x68, 0x41, 0xE4, 0x22, 0x75, 0xF0, 0x10, 0xEF, 0x90, 0x81, 0x01, 0x02, 0x45, ++0x8A, 0x75, 0xF0, 0x0F, 0xE5, 0x51, 0x90, 0x95, 0x06, 0x12, 0x45, 0x8A, 0xE0, 0x22, 0xE4, 0xFE, ++0x75, 0xF0, 0x0F, 0xEF, 0x91, 0x16, 0xC4, 0x54, 0x0F, 0xFD, 0xD1, 0xDD, 0x54, 0x03, 0xF9, 0x75, ++0xF0, 0x0F, 0xEF, 0x12, 0x57, 0xC4, 0xE0, 0xF5, 0x69, 0x75, 0xF0, 0x0F, 0xEF, 0xD1, 0xD7, 0xE0, ++0x54, 0x7F, 0xFC, 0xD3, 0x94, 0x1B, 0x50, 0x52, 0xEC, 0xC3, 0x94, 0x0C, 0x40, 0x4C, 0x0D, 0xED, ++0x94, 0x04, 0x40, 0x35, 0xE4, 0xFD, 0x75, 0xF0, 0x0F, 0xEF, 0x12, 0x57, 0x77, 0xE0, 0xFB, 0x75, ++0xF0, 0x0F, 0xEF, 0x90, 0x95, 0x0C, 0x12, 0x45, 0x8A, 0xEB, 0xF0, 0xEC, 0xC3, 0x94, 0x14, 0x40, ++0x02, 0x7E, 0x08, 0xC3, 0xEC, 0x9E, 0x24, 0xF5, 0x25, 0xE0, 0x25, 0xE0, 0xFE, 0x75, 0xF0, 0x0F, ++0xEF, 0x90, 0x95, 0x0B, 0x12, 0x45, 0x8A, 0xEE, 0xF0, 0xED, 0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFE, ++0x75, 0xF0, 0x0F, 0xEF, 0x91, 0x16, 0x54, 0x0F, 0x4E, 0xF0, 0x75, 0xF0, 0x0F, 0xEF, 0xD1, 0xD7, ++0xE0, 0xFD, 0x90, 0xA2, 0x49, 0xE9, 0xF0, 0xE4, 0xFB, 0x21, 0xF6, 0xE0, 0xFD, 0x75, 0xF0, 0x0F, ++0xE5, 0x68, 0x22, 0x13, 0x13, 0x54, 0x03, 0x90, 0xA2, 0x49, 0xF0, 0x22, 0x75, 0xF0, 0x0F, 0xE5, ++0x5E, 0x90, 0x95, 0x0E, 0x02, 0x45, 0x8A, 0x8F, 0x5E, 0x8D, 0x5F, 0xD1, 0xDD, 0x54, 0x03, 0xF5, ++0x62, 0x75, 0xF0, 0x10, 0xEF, 0xF1, 0x5C, 0xE0, 0xF5, 0x60, 0x54, 0x7F, 0xF5, 0x61, 0xE5, 0x60, ++0x54, 0x80, 0xFB, 0x12, 0x57, 0xBF, 0xE0, 0xFE, 0x90, 0xA1, 0x6B, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, ++0x5E, 0x12, 0x51, 0x35, 0xFD, 0xF1, 0xB2, 0x12, 0x57, 0x82, 0xFC, 0x54, 0x03, 0xF5, 0x64, 0xED, ++0xC4, 0x54, 0x03, 0x90, 0xA1, 0x6C, 0xF0, 0x75, 0xF0, 0x0F, 0xEF, 0x90, 0x95, 0x04, 0x12, 0x45, ++0x8A, 0xEC, 0x54, 0xCF, 0x44, 0x10, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x5E, 0x91, 0x16, 0x54, 0xF0, ++0xF0, 0x91, 0xBC, 0x74, 0xFF, 0xF0, 0xE5, 0x61, 0x6E, 0x70, 0x29, 0x75, 0xF0, 0x0F, 0xE5, 0x5E, ++0x12, 0x55, 0x4C, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x0B, 0xEB, 0x70, 0x08, 0xE5, 0x61, 0x44, ++0x80, 0xF5, 0x60, 0x80, 0x33, 0xB1, 0xA5, 0xE5, 0x5E, 0x12, 0x60, 0xF5, 0xF1, 0xAA, 0x7D, 0x02, ++0x7F, 0x04, 0xC1, 0xEF, 0x90, 0xA1, 0x6B, 0xE0, 0xFD, 0xE5, 0x61, 0xC3, 0x9D, 0x50, 0x0E, 0xAB, ++0x5E, 0xAF, 0x61, 0x12, 0xAB, 0x2F, 0xF1, 0xBC, 0xE0, 0xF5, 0x60, 0x80, 0x0B, 0x90, 0xA1, 0x6B, ++0xE0, 0xFF, 0xD1, 0xD2, 0xEF, 0xF0, 0x8F, 0x60, 0x91, 0xBC, 0x12, 0xB4, 0xEE, 0xB1, 0xA5, 0xE5, ++0x60, 0x12, 0xB5, 0x66, 0xA3, 0xE5, 0x62, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x5F, 0xF0, 0x7B, ++0x01, 0x7A, 0x00, 0x7D, 0x05, 0x7F, 0x04, 0xD1, 0xEF, 0x90, 0xA2, 0x49, 0xE5, 0x62, 0xF0, 0xAB, ++0x5F, 0x21, 0xF2, 0xE0, 0xFD, 0x90, 0xA1, 0x97, 0xE4, 0xF0, 0xA3, 0x22, 0x8F, 0x5E, 0x8B, 0x5F, ++0xAE, 0x05, 0xD1, 0xDD, 0x54, 0x03, 0xF5, 0x61, 0x75, 0xF0, 0x10, 0xEF, 0xF1, 0x5C, 0xE0, 0xF5, ++0x60, 0x54, 0x7F, 0xFF, 0x90, 0xA1, 0x6C, 0xF0, 0x12, 0x57, 0xBF, 0xE0, 0xFD, 0x90, 0xA1, 0x6F, ++0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x5E, 0x12, 0xBC, 0x40, 0x90, 0xA1, 0x6E, 0xF0, 0x75, 0xF0, 0x0F, ++0xE5, 0x5E, 0x12, 0x51, 0x35, 0xFC, 0x54, 0x03, 0xF5, 0x62, 0x75, 0xF0, 0x0F, 0xE5, 0x5E, 0x12, ++0x57, 0x82, 0xFB, 0x54, 0x03, 0xF5, 0x64, 0xEC, 0xC4, 0xF1, 0xB2, 0x90, 0x95, 0x04, 0x12, 0x45, ++0x8A, 0xEB, 0x54, 0xCF, 0x44, 0x20, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x5E, 0x91, 0x16, 0x54, 0xF0, ++0xF0, 0x91, 0xBC, 0x74, 0xFF, 0xF0, 0xEF, 0xD3, 0x9D, 0x40, 0x0C, 0x90, 0xA1, 0x6F, 0xE0, 0x90, ++0xA1, 0x6C, 0xF0, 0xF5, 0x60, 0x80, 0x0F, 0x90, 0xA1, 0x6E, 0xE0, 0xFF, 0x90, 0xA1, 0x6C, 0xE0, ++0xD3, 0x9F, 0x50, 0x02, 0xC1, 0xD1, 0x90, 0xA1, 0x6D, 0xEE, 0xF0, 0xE4, 0x90, 0xA1, 0x6B, 0xF0, ++0x90, 0xA1, 0x6D, 0xE0, 0xFF, 0x90, 0xA1, 0x6B, 0xE0, 0xC3, 0x9F, 0x50, 0x42, 0xE5, 0x60, 0x30, ++0xE7, 0x03, 0xA3, 0x80, 0x1C, 0x90, 0xA1, 0x6E, 0xE0, 0xFD, 0x90, 0xA1, 0x6C, 0xE0, 0xFF, 0xD3, ++0x9D, 0x40, 0x13, 0x90, 0xA1, 0x73, 0xEE, 0xF0, 0xAB, 0x5E, 0x12, 0xAB, 0x66, 0x7E, 0x01, 0xF1, ++0xBC, 0xE0, 0xF5, 0x60, 0x80, 0x0D, 0x90, 0xA1, 0x6E, 0xE0, 0xFF, 0xF5, 0x60, 0xD1, 0xD2, 0xEF, ++0xF0, 0x80, 0x0C, 0x1E, 0xEE, 0x60, 0x08, 0x90, 0xA1, 0x6B, 0xE0, 0x04, 0xF0, 0x80, 0xB1, 0xB1, ++0xA5, 0xE5, 0x5E, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x60, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, ++0x61, 0x12, 0x97, 0x0E, 0x7B, 0x01, 0xFA, 0x7D, 0x05, 0x7F, 0x08, 0xD1, 0xEF, 0x75, 0xF0, 0x0F, ++0xE5, 0x5E, 0x91, 0x16, 0x54, 0x0F, 0x60, 0x0F, 0xE5, 0x5F, 0xB4, 0x02, 0x0A, 0x90, 0xA2, 0x49, ++0xE5, 0x61, 0xF0, 0x7B, 0x01, 0x80, 0x08, 0x90, 0xA2, 0x49, 0xE5, 0x61, 0xF0, 0xE4, 0xFB, 0x31, ++0xF2, 0x22, 0x75, 0xF0, 0x0F, 0xE5, 0x5E, 0x90, 0x95, 0x07, 0x02, 0x45, 0x8A, 0x75, 0xF0, 0x10, ++0xEF, 0x90, 0x81, 0x05, 0x12, 0x45, 0x8A, 0xE0, 0x22, 0x7A, 0x00, 0x7D, 0x05, 0x7F, 0x01, 0x90, ++0x9E, 0x09, 0xE0, 0xFE, 0x60, 0x60, 0xEF, 0x54, 0x3F, 0x60, 0x5B, 0x90, 0xA1, 0xA1, 0xEF, 0xF0, ++0xA3, 0xED, 0xF0, 0xEB, 0xA3, 0xF0, 0xEA, 0xA3, 0xF0, 0x90, 0xA1, 0x97, 0xE0, 0xFC, 0xA3, 0xE0, ++0x90, 0xA1, 0xA5, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0xA1, 0x99, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0xA1, ++0xA7, 0xF0, 0xEC, 0xA3, 0xF0, 0x90, 0xA1, 0x9B, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0xA1, 0xA9, 0xF0, ++0xEC, 0xA3, 0xF0, 0x90, 0xA1, 0x9D, 0xE0, 0xFC, 0xA3, 0xE0, 0x90, 0xA1, 0xAB, 0xF0, 0xEC, 0xA3, ++0xF0, 0x90, 0xA1, 0x9F, 0x74, 0xFE, 0xF0, 0x90, 0xA1, 0xAD, 0x74, 0x0C, 0xF0, 0x7B, 0x01, 0x7A, ++0xA1, 0x79, 0x9F, 0x12, 0x83, 0x55, 0x22, 0x75, 0xF0, 0x10, 0xE5, 0x51, 0x90, 0x81, 0x00, 0x02, ++0x45, 0x8A, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x99, 0xEF, 0xF0, 0xA3, 0xED, ++0xF0, 0x7D, 0x44, 0xF1, 0xA2, 0x90, 0xA2, 0x9A, 0xE0, 0x90, 0xA2, 0x99, 0xB4, 0x01, 0x0B, 0xE0, ++0x75, 0xF0, 0x10, 0xD1, 0xE1, 0x44, 0x04, 0xF0, 0x80, 0x09, 0xE0, 0x75, 0xF0, 0x10, 0xD1, 0xE1, ++0x54, 0xFB, 0xF0, 0x12, 0x67, 0x6F, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x31, 0xB1, 0xE0, 0x44, 0x40, ++0xF0, 0x22, 0x7F, 0x6F, 0x12, 0x4B, 0x17, 0x02, 0x9B, 0xA6, 0xA3, 0xF0, 0xA3, 0xF0, 0x7B, 0x01, ++0xFA, 0x22, 0x54, 0x03, 0xF5, 0x63, 0x75, 0xF0, 0x0F, 0xE5, 0x5E, 0x22, 0x75, 0xF0, 0x0F, 0xE5, ++0x5E, 0x90, 0x95, 0x0D, 0x02, 0x45, 0x8A, 0xE0, 0xFF, 0x90, 0xA2, 0x46, 0xE0, 0xFE, 0x75, 0xF0, ++0x10, 0x22, 0x41, 0xE1, 0xE4, 0xFD, 0x80, 0x8A, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, ++0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0xD8, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0x7F, ++0x12, 0x80, 0x00, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, ++0xFF, 0xA3, 0xF0, 0xED, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xC0, 0xE0, 0xC0, ++0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0x0D, 0x90, 0x01, ++0xC4, 0xED, 0xF0, 0x74, 0x80, 0x11, 0x00, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, ++0x83, 0xD0, 0xE0, 0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, ++0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, ++0x07, 0x90, 0x01, 0xC4, 0x74, 0x34, 0xF0, 0x74, 0x80, 0xA3, 0xF0, 0x12, 0x47, 0xA0, 0xE5, 0x14, ++0x30, 0xE7, 0x02, 0x11, 0x8B, 0x74, 0x34, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x80, 0xA3, 0xF0, ++0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, ++0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90, 0x9E, 0x08, 0xE0, 0xB4, ++0x02, 0x1B, 0x7F, 0x01, 0x7E, 0x00, 0x12, 0x3D, 0xC2, 0x7F, 0xF2, 0x12, 0x47, 0x84, 0xEF, 0x20, ++0xE6, 0x0B, 0x7F, 0x05, 0x12, 0x47, 0xF3, 0xFD, 0x7F, 0x05, 0x12, 0x46, 0x81, 0x22, 0xC0, 0xE0, ++0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, ++0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xAE, ++0xF0, 0x74, 0x80, 0xA3, 0xF0, 0x12, 0xA5, 0xF0, 0xE5, 0x19, 0x30, 0xE1, 0x02, 0x31, 0x69, 0xE5, ++0x19, 0x30, 0xE4, 0x02, 0x31, 0xE9, 0xE5, 0x19, 0x30, 0xE5, 0x03, 0x12, 0xA6, 0x4D, 0xE5, 0x19, ++0x30, 0xE6, 0x03, 0x12, 0xA6, 0x89, 0xE5, 0x1B, 0x30, 0xE0, 0x03, 0x12, 0x89, 0x15, 0xE5, 0x1B, ++0x30, 0xE1, 0x03, 0x12, 0x94, 0x26, 0xE5, 0x1B, 0x30, 0xE2, 0x03, 0x12, 0xA6, 0x96, 0xE5, 0x1B, ++0x30, 0xE3, 0x02, 0x71, 0x1C, 0xE5, 0x1B, 0x30, 0xE4, 0x02, 0x71, 0x2D, 0xE5, 0x1B, 0x30, 0xE5, ++0x03, 0x12, 0x71, 0x8C, 0xE5, 0x1B, 0x30, 0xE6, 0x03, 0x12, 0x70, 0x4A, 0xE5, 0x1C, 0x30, 0xE1, ++0x03, 0x12, 0xA7, 0x7A, 0xE5, 0x1C, 0x30, 0xE4, 0x02, 0xF1, 0xCB, 0xE5, 0x1C, 0x30, 0xE5, 0x03, ++0x12, 0x7F, 0xD2, 0x74, 0xAE, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x80, 0xA3, 0xF0, 0xD0, 0x07, ++0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, ++0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xE4, 0xFF, 0x90, 0xA1, 0x75, 0xEF, 0xF0, ++0x90, 0x04, 0x7E, 0xE0, 0xF5, 0x69, 0xA3, 0xE0, 0xF5, 0x6A, 0x65, 0x69, 0x60, 0x6A, 0x90, 0xA1, ++0x76, 0x74, 0x03, 0xF0, 0x90, 0xA1, 0x84, 0x74, 0x08, 0xF0, 0xE5, 0x6A, 0x04, 0x54, 0x0F, 0xF5, ++0x6B, 0xE4, 0xF5, 0x68, 0xE5, 0x6B, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, ++0x80, 0xF5, 0x83, 0xE5, 0x82, 0x25, 0x68, 0x12, 0x55, 0x65, 0xE0, 0xFF, 0x74, 0x78, 0x25, 0x68, ++0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, 0x83, 0xEF, 0xF0, 0x05, 0x68, 0xE5, 0x68, 0xB4, 0x08, 0xD4, ++0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x76, 0x91, 0x82, 0xE5, 0x6A, 0x04, 0x54, 0x0F, 0xF5, 0x6A, 0xB4, ++0x0F, 0x03, 0xE4, 0xF5, 0x6A, 0x90, 0x04, 0x7F, 0xE5, 0x6A, 0xF0, 0x90, 0xA1, 0x75, 0xE0, 0x7F, ++0x04, 0x70, 0x03, 0x02, 0x58, 0x3A, 0x71, 0x59, 0x22, 0x31, 0xF0, 0x7F, 0x02, 0x02, 0x58, 0x3A, ++0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0xA2, 0x9B, 0xF0, 0x90, 0xA2, 0x9B, 0xE0, 0xFD, 0x70, ++0x02, 0x41, 0xFB, 0x90, 0x9E, 0x8A, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, ++0xEF, 0x14, 0xFF, 0x90, 0x9E, 0x8B, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, ++0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0xA2, 0x8B, 0xE0, 0x12, ++0xAB, 0xBF, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, ++0x02, 0x41, 0xDE, 0xE4, 0x90, 0xA2, 0x9C, 0xF0, 0x90, 0xA2, 0x9C, 0xE0, 0xF9, 0xC3, 0x94, 0x04, ++0x50, 0x42, 0x51, 0xFD, 0xA4, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, 0x2F, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, ++0x74, 0xD0, 0x71, 0x05, 0x12, 0xA4, 0x0B, 0xE5, 0x82, 0x29, 0x12, 0x55, 0x65, 0xEF, 0x51, 0xFC, ++0xA4, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xF0, 0x71, 0x05, 0x75, 0xF0, 0x08, 0x90, 0x9E, ++0x3E, 0x12, 0x45, 0x8A, 0xE5, 0x82, 0x29, 0x12, 0x55, 0x65, 0xEF, 0xF0, 0x90, 0xA2, 0x9C, 0xE0, ++0x04, 0xF0, 0x80, 0xB4, 0x90, 0xA2, 0x9B, 0xE0, 0xFF, 0x90, 0xA2, 0x8B, 0x71, 0x14, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0x90, 0xA2, 0x9B, 0xF0, 0x90, 0xA2, 0x8B, 0xE0, 0xFF, 0x74, ++0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, 0xA2, ++0x8B, 0xE0, 0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0x9E, 0x8B, 0xF1, 0xA0, 0xB4, 0x0A, 0x02, ++0x7F, 0x01, 0xEF, 0x70, 0x02, 0x21, 0xFA, 0xE4, 0x90, 0x9E, 0x8B, 0xF0, 0x21, 0xFA, 0x90, 0x01, ++0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0xA2, 0x8B, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0x51, 0xFC, ++0x90, 0x01, 0xD0, 0x12, 0x45, 0x8A, 0xE0, 0x90, 0x01, 0xC3, 0xF0, 0x22, 0xF0, 0x90, 0xA2, 0x8B, ++0xE0, 0x75, 0xF0, 0x04, 0x22, 0x2F, 0xF5, 0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, ++0x9E, 0x8B, 0xE0, 0x22, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x22, 0x12, 0x67, 0xBD, 0x70, ++0x0B, 0x90, 0x9F, 0x42, 0xE0, 0x60, 0x05, 0x71, 0x4A, 0x12, 0x48, 0x04, 0x22, 0x12, 0x67, 0xBD, ++0x70, 0x17, 0x90, 0x9F, 0x42, 0xE0, 0x60, 0x11, 0x71, 0x4A, 0xF0, 0x90, 0x9F, 0x3D, 0xE0, 0x12, ++0x77, 0xD6, 0x54, 0x07, 0x70, 0x03, 0x12, 0x70, 0x34, 0x22, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, ++0x01, 0x3C, 0x74, 0x02, 0x22, 0x91, 0x82, 0x7F, 0x04, 0x90, 0xA2, 0xA8, 0xEF, 0xF0, 0x7F, 0x02, ++0x12, 0x44, 0xB7, 0x90, 0x9E, 0x02, 0xE0, 0xFF, 0x90, 0xA2, 0xA8, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, ++0x9E, 0x02, 0xF0, 0x22, 0x8F, 0x54, 0x90, 0xA1, 0x5B, 0x74, 0x0E, 0xF0, 0xED, 0x24, 0xFE, 0x60, ++0x78, 0x24, 0xFE, 0x70, 0x02, 0x81, 0x64, 0x24, 0x03, 0x60, 0x02, 0x81, 0x73, 0x91, 0x7B, 0x90, ++0xA1, 0x5D, 0x74, 0x0C, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x54, 0x12, 0x57, 0x77, 0xE0, 0x90, 0xA1, ++0x5E, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x54, 0x12, 0x51, 0x35, 0xFD, 0x13, 0x13, 0x54, 0x03, 0x90, ++0xA1, 0x5F, 0xF0, 0xED, 0x12, 0x57, 0xA6, 0xA3, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x54, 0x12, 0x51, ++0x35, 0xFF, 0xC4, 0x54, 0x03, 0x90, 0xA1, 0x61, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x54, 0x12, 0x57, ++0xC4, 0xE0, 0x90, 0xA1, 0x62, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x54, 0x12, 0xBC, 0x40, 0x90, 0xA1, ++0x63, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x54, 0x12, 0x55, 0x4C, 0xFD, 0xC4, 0x13, 0x54, 0x01, 0x90, ++0xA1, 0x64, 0xF0, 0xED, 0x54, 0x1F, 0xA3, 0x80, 0x63, 0x91, 0x7B, 0x90, 0xA1, 0x5D, 0x74, 0x0D, ++0x91, 0x74, 0x90, 0x89, 0x00, 0x12, 0x45, 0x8A, 0xE0, 0x90, 0xA1, 0x5E, 0x91, 0x74, 0x90, 0x89, ++0x01, 0x12, 0x45, 0x8A, 0xE0, 0x90, 0xA1, 0x5F, 0x91, 0x74, 0x90, 0x89, 0x02, 0x12, 0x45, 0x8A, ++0xE0, 0x90, 0xA1, 0x60, 0x91, 0x74, 0x90, 0x89, 0x03, 0x12, 0x45, 0x8A, 0xE0, 0x90, 0xA1, 0x61, ++0x91, 0x74, 0x90, 0x89, 0x04, 0x12, 0x45, 0x8A, 0xE0, 0x90, 0xA1, 0x62, 0x91, 0x74, 0x90, 0x89, ++0x05, 0x12, 0x45, 0x8A, 0xE0, 0x90, 0xA1, 0x63, 0x91, 0x74, 0x90, 0x89, 0x06, 0x12, 0x45, 0x8A, ++0xE0, 0x90, 0xA1, 0x64, 0x91, 0x74, 0x12, 0xBC, 0x5F, 0x90, 0xA1, 0x65, 0xD1, 0xEF, 0x91, 0x82, ++0x7F, 0x04, 0x61, 0x59, 0x91, 0x7B, 0x90, 0xA1, 0x5D, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0x27, 0xF0, ++0xE4, 0xA3, 0xF0, 0x22, 0xF0, 0x75, 0xF0, 0x08, 0xE5, 0x54, 0x22, 0x90, 0xA1, 0x69, 0x74, 0x09, ++0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9F, 0x22, 0xE0, 0xFF, 0x70, 0x06, ++0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x9F, 0x23, 0xE0, 0xB5, 0x07, 0x04, ++0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x02, 0xF0, ++0x80, 0x29, 0xC0, 0x01, 0x90, 0x9F, 0x23, 0xE0, 0x12, 0xA5, 0x54, 0xA8, 0x01, 0xFC, 0x7D, 0x01, ++0xD0, 0x01, 0x7E, 0x00, 0x7F, 0x0F, 0x12, 0x06, 0x63, 0x90, 0x9F, 0x23, 0xF1, 0xA0, 0xB4, 0x0A, ++0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x9F, 0x23, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xA9, 0x07, 0x90, 0x05, 0x63, 0xE0, 0xFE, 0x90, 0x05, ++0x62, 0x12, 0x97, 0x8E, 0xAD, 0x07, 0xFC, 0x90, 0x05, 0x61, 0xE0, 0xFE, 0x90, 0x05, 0x60, 0xE0, ++0x7A, 0x00, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0xFE, 0x90, 0xA2, 0x13, 0x74, 0x17, 0xF0, 0x90, 0xA2, ++0x21, 0x74, 0x06, 0xF0, 0x90, 0xA2, 0x15, 0xE9, 0x12, 0x49, 0x80, 0x75, 0xF0, 0x13, 0x12, 0x9D, ++0xCE, 0xE0, 0x90, 0xA2, 0x16, 0xF0, 0xAB, 0x07, 0xA3, 0xEB, 0xF0, 0xEE, 0xA3, 0xF0, 0xAF, 0x05, ++0xA3, 0xEF, 0xF0, 0xAE, 0x04, 0xEE, 0xA3, 0xF0, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0x13, 0x71, 0x55, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x99, 0x8C, 0xFF, 0x54, 0x0F, 0xF5, 0x54, 0xEF, 0xC4, 0x54, ++0x0F, 0x64, 0x0F, 0x70, 0x4C, 0x90, 0x01, 0xA4, 0x04, 0xF0, 0x90, 0xA0, 0x17, 0xE0, 0x54, 0xFE, ++0xFF, 0xF0, 0xE5, 0x54, 0x54, 0x07, 0x25, 0xE0, 0xFE, 0xEF, 0x54, 0xF1, 0x4E, 0xF1, 0xB1, 0x60, ++0x03, 0xBF, 0x01, 0x0F, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xED, 0xF0, 0x90, 0x01, 0xA4, 0x74, 0x02, ++0xF0, 0x80, 0x03, 0x12, 0x66, 0xC6, 0xAF, 0x54, 0x12, 0x9D, 0x68, 0xBF, 0x01, 0x08, 0xE4, 0xFD, ++0xFF, 0x12, 0xA9, 0xD2, 0x80, 0x00, 0x7F, 0x02, 0x91, 0xE0, 0x90, 0x01, 0xA4, 0x74, 0x04, 0xF0, ++0x22, 0xE5, 0x54, 0x75, 0xF0, 0x13, 0xA4, 0x24, 0x44, 0xF9, 0x74, 0xA0, 0x35, 0xF0, 0xFA, 0x7B, ++0x01, 0xC0, 0x02, 0xC0, 0x01, 0xE5, 0x53, 0x24, 0x01, 0xF9, 0xE4, 0x35, 0x52, 0x85, 0x51, 0x40, ++0xF5, 0x41, 0x89, 0x42, 0x75, 0x43, 0x04, 0xD0, 0x01, 0xD0, 0x02, 0x12, 0x6D, 0x0D, 0xD1, 0xE9, ++0x54, 0x80, 0x12, 0x57, 0xA6, 0xFF, 0x75, 0xF0, 0x13, 0xE5, 0x54, 0x12, 0xBC, 0x6E, 0x54, 0xFE, ++0x4F, 0xF0, 0x75, 0xF0, 0x13, 0xE5, 0x54, 0x90, 0xA0, 0x47, 0x12, 0x45, 0x8A, 0xE0, 0x54, 0xF7, ++0xF0, 0x12, 0x06, 0x89, 0xC4, 0x54, 0x0F, 0x14, 0x65, 0x54, 0x60, 0x02, 0xC1, 0xE7, 0x90, 0x9F, ++0x42, 0xE0, 0x70, 0x07, 0x90, 0x9F, 0x38, 0xE0, 0x30, 0xE0, 0x04, 0x7F, 0x05, 0x81, 0xE0, 0x90, ++0x01, 0xA4, 0xE4, 0xF0, 0xA3, 0xF0, 0x12, 0x6D, 0x10, 0x12, 0x06, 0x89, 0xC4, 0x54, 0x0F, 0x90, ++0xA0, 0x18, 0xD1, 0xE8, 0xFF, 0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFE, 0x90, 0xA0, 0x17, 0xE0, 0x54, ++0x0F, 0x4E, 0xF0, 0xEF, 0x54, 0x10, 0x25, 0xE0, 0xFF, 0x90, 0xA0, 0x7F, 0xE0, 0x54, 0xDF, 0x4F, ++0xFF, 0xD1, 0xE8, 0x54, 0x60, 0xC4, 0x54, 0x0F, 0xFE, 0xEF, 0x54, 0xF9, 0x4E, 0x90, 0xA0, 0x7F, ++0xF0, 0x90, 0xA0, 0x17, 0xE0, 0x54, 0xF1, 0xF0, 0x90, 0x05, 0x58, 0x74, 0x02, 0x12, 0x97, 0xB4, ++0x44, 0x40, 0xF0, 0xF1, 0xAA, 0x30, 0xE0, 0x06, 0xEF, 0x54, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0xA0, ++0x17, 0xE0, 0x44, 0x01, 0xF1, 0xB1, 0x60, 0x05, 0xEF, 0x64, 0x01, 0x70, 0x19, 0x90, 0xA0, 0xB6, ++0xF1, 0xAA, 0x30, 0xE0, 0x08, 0xEF, 0x54, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x30, 0x90, 0x05, 0x27, ++0xE0, 0x44, 0x32, 0xF0, 0x80, 0x27, 0xF1, 0xD0, 0xE4, 0xFF, 0xEF, 0xFD, 0xC3, 0x74, 0x87, 0xF1, ++0xBC, 0xC3, 0x74, 0x03, 0x12, 0xBB, 0x49, 0xEE, 0xF0, 0xEF, 0xFD, 0xC3, 0x74, 0x8B, 0xF1, 0xBC, ++0xC3, 0x74, 0x07, 0x12, 0xBB, 0x49, 0xEE, 0xF0, 0x0F, 0xEF, 0xB4, 0x04, 0xDD, 0x7F, 0x03, 0x91, ++0xE0, 0x90, 0xA0, 0x46, 0xE0, 0x90, 0xA0, 0xB4, 0xB4, 0x64, 0x05, 0x74, 0xC8, 0xF0, 0x80, 0x03, ++0x74, 0x64, 0xF0, 0x90, 0xA0, 0xAC, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0x90, 0xA0, 0xB0, ++0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0x22, 0xF0, 0x90, 0x00, 0x06, 0x02, 0x06, 0xA2, 0xF0, ++0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x5B, 0x22, 0xD1, 0xF0, 0x7F, 0xF5, 0x7E, 0x01, 0x12, 0x34, 0xC1, ++0xBF, 0x01, 0x06, 0x90, 0xA1, 0x5B, 0xE0, 0xA3, 0xF0, 0xD1, 0xF0, 0x7F, 0xF6, 0x7E, 0x01, 0x12, ++0x34, 0xC1, 0xBF, 0x01, 0x08, 0x90, 0xA1, 0x5B, 0xE0, 0x90, 0xA1, 0x5D, 0xF0, 0xD1, 0xF0, 0x7F, ++0xF4, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x08, 0x90, 0xA1, 0x5B, 0xE0, 0x90, 0xA1, 0x5E, ++0xF0, 0xD1, 0xF0, 0x7F, 0xF3, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x08, 0x90, 0xA1, 0x5B, ++0xE0, 0x90, 0xA1, 0x5F, 0xF0, 0xD1, 0xF0, 0x7F, 0xF2, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, ++0x08, 0x90, 0xA1, 0x5B, 0xE0, 0x90, 0xA1, 0x60, 0xF0, 0x90, 0xA1, 0x5C, 0xE0, 0xFF, 0xA3, 0xE0, ++0xFD, 0xA3, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0xA1, 0x64, 0xF0, 0x90, 0xA1, 0x60, 0xE0, 0x90, 0xA1, ++0x65, 0xF0, 0x90, 0xA1, 0x66, 0x74, 0x12, 0xF0, 0x90, 0xA1, 0x74, 0x74, 0x05, 0xF0, 0x90, 0xA1, ++0x68, 0x12, 0x9B, 0x96, 0x90, 0xA1, 0x64, 0xE0, 0x90, 0xA1, 0x6B, 0xF0, 0x90, 0xA1, 0x65, 0xE0, ++0x90, 0xA1, 0x6C, 0xF0, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x66, 0x91, 0x82, 0x7F, 0x04, 0x61, 0x59, ++0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0x22, 0x90, 0x9F, 0xB3, 0xE0, 0xFF, 0xC4, 0x13, 0x54, 0x07, ++0x22, 0xF0, 0x90, 0xA0, 0x47, 0xE0, 0x54, 0x07, 0xFF, 0x64, 0x03, 0x22, 0x9D, 0xFD, 0x74, 0x05, ++0x94, 0x00, 0x8D, 0x82, 0xF5, 0x83, 0xE0, 0xFE, 0xEF, 0xFD, 0x22, 0xE4, 0xFF, 0x02, 0x78, 0x41, ++0x7D, 0x20, 0xE4, 0xFF, 0x02, 0x66, 0xE2, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, ++0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xD7, 0xF0, 0x74, 0x87, 0xA3, 0xF0, 0x12, 0xA6, ++0x1D, 0xE5, 0x21, 0x30, 0xE1, 0x03, 0x12, 0xA7, 0x9A, 0xE5, 0x21, 0x30, 0xE2, 0x02, 0x51, 0x32, ++0xE5, 0x21, 0x30, 0xE4, 0x02, 0x51, 0x54, 0xE5, 0x21, 0x30, 0xE5, 0x02, 0x11, 0x9A, 0xE5, 0x22, ++0x30, 0xE0, 0x03, 0x12, 0x96, 0x0D, 0xE5, 0x23, 0x30, 0xE1, 0x03, 0x12, 0xA7, 0xA9, 0xE5, 0x23, ++0x30, 0xE0, 0x03, 0x12, 0xA6, 0xF3, 0xE5, 0x23, 0x30, 0xE4, 0x03, 0x12, 0xA7, 0xF5, 0xE5, 0x23, ++0x30, 0xE2, 0x09, 0x91, 0xAC, 0x90, 0x07, 0x8F, 0xE0, 0x44, 0x10, 0xF0, 0xE5, 0x24, 0x30, 0xE1, ++0x05, 0x7F, 0x04, 0x12, 0x58, 0x3A, 0xE5, 0x24, 0x30, 0xE4, 0x02, 0x11, 0xB2, 0xE5, 0x24, 0x30, ++0xE5, 0x03, 0x12, 0xA8, 0x0E, 0xE5, 0x24, 0x30, 0xE6, 0x03, 0x12, 0xA8, 0x46, 0xE5, 0x24, 0x30, ++0xE7, 0x02, 0x11, 0xE9, 0x74, 0xD7, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x87, 0xA3, 0xF0, 0xD0, ++0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, ++0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90, 0xA0, 0x16, 0xE0, 0x30, 0xE0, ++0x10, 0x12, 0x66, 0xC6, 0xE4, 0x90, 0xA0, 0x19, 0x12, 0x49, 0x80, 0x12, 0xBB, 0x12, 0x12, 0x48, ++0x11, 0x22, 0x71, 0xD0, 0x12, 0x65, 0x40, 0x7F, 0x01, 0xF1, 0xCB, 0x11, 0xDA, 0x90, 0x9F, 0xA6, ++0xE0, 0x30, 0xE0, 0x15, 0xF1, 0xC2, 0x90, 0x9F, 0xA9, 0xE0, 0x60, 0x05, 0x14, 0xF0, 0x02, 0x67, ++0xCE, 0x12, 0xA1, 0x7C, 0xE4, 0xFF, 0x12, 0x65, 0x89, 0x22, 0x90, 0x9F, 0xB3, 0xE0, 0x30, 0xE0, ++0x07, 0xD1, 0xEB, 0xE4, 0xFF, 0x12, 0x4C, 0xDE, 0x22, 0x90, 0x9F, 0xCE, 0xE0, 0x30, 0xE0, 0x04, ++0x31, 0x00, 0x80, 0x02, 0xD1, 0xA6, 0x90, 0xA0, 0x02, 0xE0, 0x30, 0xE0, 0x02, 0x71, 0x60, 0x22, ++0x7D, 0x12, 0x7F, 0xFF, 0x12, 0x4B, 0x17, 0x7F, 0x01, 0x51, 0xA3, 0x90, 0x9F, 0xF5, 0xE0, 0xFF, ++0xE4, 0xFD, 0x02, 0x5B, 0x20, 0x90, 0x9F, 0x38, 0xE0, 0x30, 0xE0, 0x11, 0xA3, 0x74, 0x01, 0xF0, ++0x90, 0x9F, 0x38, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x03, 0x12, 0xA7, 0x5F, 0x31, 0x35, 0xE4, ++0xFF, 0xF1, 0xCB, 0x80, 0xA5, 0xE4, 0xF5, 0x68, 0x90, 0x9F, 0x42, 0xE0, 0x70, 0x02, 0x41, 0x16, ++0x12, 0x67, 0xBD, 0x60, 0x02, 0x41, 0x16, 0x12, 0x5F, 0xBF, 0x12, 0x45, 0x54, 0xC0, 0x04, 0xC0, ++0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x12, 0x5F, 0xD8, 0x78, 0x10, 0x12, 0x08, 0x5A, ++0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0, ++0x06, 0xC0, 0x07, 0xA3, 0x12, 0x5F, 0xD8, 0x78, 0x18, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, ++0xD0, 0x01, 0xD0, 0x00, 0xD1, 0xF3, 0x51, 0x29, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, 0x70, ++0x1E, 0x90, 0x9F, 0x49, 0xE0, 0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x9F, 0x4B, 0xE0, 0x60, ++0x0E, 0xEF, 0x70, 0x08, 0x90, 0x9F, 0x48, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x68, 0x01, 0x90, ++0x9F, 0x38, 0xE0, 0x30, 0xE0, 0x12, 0x90, 0x9F, 0x3C, 0xE0, 0xB4, 0x02, 0x03, 0xE4, 0xF5, 0x68, ++0x12, 0x6E, 0xF2, 0xEF, 0x70, 0x02, 0xF5, 0x68, 0xE5, 0x68, 0x60, 0x4A, 0x90, 0x9F, 0x46, 0xE0, ++0x44, 0x10, 0xF0, 0x90, 0x9F, 0x4B, 0xE0, 0x60, 0x04, 0x64, 0x01, 0x70, 0x14, 0xE4, 0x90, 0xA2, ++0x44, 0xF0, 0x90, 0x9F, 0x4B, 0xE0, 0x51, 0x22, 0x12, 0x48, 0x0E, 0x90, 0x9F, 0x4B, 0xE0, 0x80, ++0x13, 0xE4, 0x90, 0xA2, 0x44, 0x51, 0x17, 0x12, 0x48, 0x0E, 0x90, 0x9F, 0x4B, 0xE0, 0x75, 0xF0, ++0x03, 0xA4, 0x24, 0xFE, 0x51, 0x22, 0x90, 0x9F, 0x5B, 0xF0, 0x90, 0x9F, 0x45, 0xE0, 0x20, 0xE2, ++0x03, 0x12, 0x63, 0x16, 0x51, 0x7C, 0x22, 0xF0, 0x90, 0x9F, 0x4B, 0xE0, 0x75, 0xF0, 0x03, 0xA4, ++0x24, 0xFE, 0xFF, 0x90, 0x9F, 0x4A, 0xE0, 0x2F, 0x22, 0x90, 0x9F, 0x40, 0xE0, 0xFF, 0xC4, 0x54, ++0x0F, 0x22, 0x90, 0x9F, 0x42, 0xE0, 0x60, 0x11, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x04, 0xF1, ++0x5F, 0x80, 0x06, 0x12, 0x67, 0x7A, 0x12, 0x70, 0x34, 0x90, 0xA0, 0x19, 0xE0, 0xB4, 0x01, 0x03, ++0x12, 0x48, 0x46, 0x22, 0x90, 0x9F, 0xB3, 0xE0, 0x30, 0xE0, 0x12, 0x12, 0x97, 0x97, 0x30, 0xE0, ++0x0C, 0xE4, 0xFF, 0x12, 0x4C, 0xDE, 0x90, 0x9F, 0xD8, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0xA0, 0x17, ++0xE0, 0x30, 0xE0, 0x07, 0x90, 0xA0, 0xB6, 0xE0, 0x44, 0x40, 0xF0, 0x22, 0xF1, 0xA1, 0x13, 0x30, ++0xE0, 0x20, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x20, 0xE0, 0x17, 0xF1, 0xB1, 0x30, 0xE0, 0x04, ++0x7F, 0x03, 0x80, 0x0C, 0x12, 0xA1, 0x23, 0x30, 0xE0, 0x04, 0x7F, 0x0D, 0x80, 0x02, 0x7F, 0x09, ++0x51, 0xA3, 0x22, 0x90, 0x9F, 0xD8, 0x12, 0x77, 0x6B, 0x30, 0xE0, 0x07, 0x90, 0x07, 0x78, 0x74, ++0x09, 0xF0, 0x22, 0x90, 0xA0, 0x14, 0xE0, 0x30, 0xE0, 0x1D, 0xEF, 0x24, 0xFD, 0x60, 0x0E, 0x24, ++0xFA, 0x60, 0x0E, 0x24, 0xFC, 0x60, 0x0E, 0x24, 0x0C, 0x7F, 0x02, 0x80, 0x0A, 0x7F, 0x03, 0x80, ++0x06, 0x7F, 0x0B, 0x80, 0x02, 0x7F, 0x0E, 0x90, 0x07, 0x78, 0xEF, 0xF0, 0x22, 0xAD, 0x07, 0xED, ++0x70, 0x19, 0x91, 0x6A, 0x70, 0x02, 0x80, 0x17, 0xBC, 0x01, 0x02, 0x80, 0x19, 0x91, 0x6A, 0xBC, ++0x02, 0x02, 0x80, 0x1B, 0xEC, 0x64, 0x03, 0x70, 0x21, 0x80, 0x1B, 0x91, 0x72, 0x70, 0x04, 0x7F, ++0x01, 0x80, 0x15, 0xBC, 0x01, 0x04, 0x7F, 0x03, 0x80, 0x0E, 0x91, 0x72, 0xBC, 0x02, 0x04, 0x7F, ++0x09, 0x80, 0x05, 0xBC, 0x03, 0x04, 0x7F, 0x0D, 0x51, 0xA3, 0x90, 0xA0, 0x02, 0xE0, 0xC4, 0x13, ++0x54, 0x07, 0x30, 0xE0, 0x3A, 0xED, 0x70, 0x1B, 0xA3, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, ++0x07, 0xE4, 0x90, 0xA1, 0x85, 0xF0, 0x80, 0x02, 0x71, 0xC9, 0x90, 0xA1, 0x85, 0xE0, 0xFD, 0xE4, ++0xFF, 0x80, 0x19, 0x90, 0xA0, 0x03, 0x12, 0x4F, 0xEF, 0x30, 0xE0, 0x07, 0xE4, 0x90, 0xA1, 0x85, ++0xF0, 0x80, 0x02, 0x71, 0xC9, 0x90, 0xA1, 0x85, 0xE0, 0xFD, 0x7F, 0x01, 0x12, 0x5B, 0x20, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA0, 0x09, 0xE0, 0xB4, 0x01, 0x02, 0x80, 0x41, ++0x90, 0xA0, 0x09, 0xE0, 0xB4, 0x02, 0x10, 0x91, 0x85, 0x7F, 0x01, 0x91, 0xDE, 0x51, 0xDD, 0x90, ++0xA0, 0x09, 0x74, 0x03, 0xF0, 0x80, 0x3D, 0x90, 0xA0, 0x09, 0xE0, 0x64, 0x03, 0x70, 0x1B, 0x90, ++0xA0, 0x0C, 0x91, 0x88, 0xE4, 0xFF, 0x91, 0xDE, 0x51, 0xDD, 0x91, 0x7B, 0xE4, 0xFB, 0xFD, 0x12, ++0x76, 0x63, 0x90, 0xA0, 0x09, 0x74, 0x04, 0xF0, 0x80, 0x1A, 0x90, 0xA0, 0x09, 0xE0, 0xB4, 0x04, ++0x13, 0x91, 0x7B, 0x7B, 0x01, 0x7D, 0x01, 0x12, 0x76, 0x63, 0x90, 0xA0, 0x09, 0x74, 0x02, 0xF0, ++0x90, 0xA0, 0x07, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA1, 0x85, 0x74, 0x01, 0xF0, 0x22, ++0xE4, 0x90, 0xA1, 0x85, 0xF0, 0x90, 0x9F, 0x42, 0xE0, 0x70, 0x02, 0x81, 0x69, 0x12, 0x67, 0xBD, ++0x60, 0x02, 0x81, 0x69, 0xF1, 0xA8, 0x12, 0x5F, 0xBE, 0x12, 0x45, 0x54, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x12, 0x5F, 0xD8, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xD0, ++0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0xA3, 0x12, 0x5F, 0xD8, 0x78, 0x18, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0xD1, 0xF3, 0x71, 0xC9, 0xE4, 0x90, 0x9F, 0x49, 0xF0, 0x90, 0x9F, 0x38, 0xE0, ++0x30, 0xE0, 0x16, 0x90, 0x9F, 0x3C, 0xE0, 0xB4, 0x02, 0x05, 0xE4, 0x90, 0xA1, 0x85, 0xF0, 0x12, ++0x6E, 0xF2, 0xEF, 0x70, 0x04, 0x90, 0xA1, 0x85, 0xF0, 0x90, 0xA1, 0x85, 0xE0, 0x60, 0x1A, 0x90, ++0x9F, 0x46, 0xE0, 0x44, 0x10, 0xF1, 0x93, 0x90, 0x9F, 0x4A, 0x12, 0x48, 0x0D, 0x90, 0x9F, 0x45, ++0xE0, 0x20, 0xE2, 0x03, 0x12, 0x63, 0x16, 0x51, 0x7C, 0x22, 0x90, 0xA0, 0x03, 0xE0, 0x54, 0x03, ++0xFC, 0x22, 0x90, 0xA0, 0x03, 0xE0, 0xC4, 0x54, 0x03, 0xFC, 0x22, 0x90, 0xA0, 0x02, 0xE0, 0xC3, ++0x13, 0x54, 0x03, 0xFF, 0x22, 0x90, 0xA0, 0x0E, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xAD, 0x07, 0xEE, ++0xFF, 0x90, 0x01, 0x6F, 0xE4, 0xF0, 0x8F, 0x35, 0xAF, 0x05, 0x8F, 0x36, 0xFB, 0xFD, 0x7F, 0x6C, ++0x7E, 0x01, 0x12, 0x3C, 0xB1, 0x90, 0x01, 0x6F, 0x74, 0x05, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0xA0, 0x02, 0xE0, 0x30, 0xE0, 0x1F, 0x90, 0xA0, 0x07, 0xE0, 0xB4, 0x01, ++0x0C, 0xA3, 0xE0, 0xB4, 0x01, 0x13, 0x74, 0x02, 0xF0, 0x91, 0x85, 0x80, 0x0C, 0x90, 0xA0, 0x07, ++0xE0, 0xB4, 0x02, 0x05, 0x74, 0x03, 0xF0, 0x71, 0x60, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0x64, 0x03, 0x70, 0x0E, 0x90, 0x9F, 0xB6, 0x12, 0x4F, 0xEF, ++0x90, 0x06, 0xCC, 0x30, 0xE0, 0x3A, 0x80, 0x2D, 0x90, 0x9F, 0xB7, 0xE0, 0xC4, 0x54, 0x0F, 0x30, ++0xE0, 0x10, 0xEF, 0x90, 0x06, 0xCC, 0x70, 0x06, 0xE0, 0x54, 0xFC, 0xF0, 0x80, 0x04, 0xE0, 0x44, ++0x03, 0xF0, 0x90, 0xA0, 0x02, 0xE0, 0x30, 0xE0, 0x1B, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0E, 0xEF, ++0x90, 0x06, 0xCC, 0x70, 0x06, 0xE0, 0x54, 0xFC, 0xF0, 0x80, 0x09, 0x80, 0x03, 0x90, 0x06, 0xCC, ++0xE0, 0x44, 0x03, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA1, 0x85, 0xEF, 0xF0, 0x90, 0xA1, ++0x87, 0x74, 0x02, 0xF0, 0x7F, 0x01, 0x91, 0xDE, 0x90, 0x9F, 0xB7, 0x12, 0x57, 0xA5, 0x30, 0xE0, ++0x04, 0x7F, 0x03, 0x80, 0x02, 0x7F, 0x01, 0x51, 0xA3, 0x90, 0xA1, 0x85, 0xE0, 0xB4, 0x02, 0x11, ++0x90, 0x9F, 0xB4, 0xE0, 0x24, 0x03, 0xFF, 0x90, 0x9F, 0xC3, 0xE0, 0xC3, 0x9F, 0xFF, 0x12, 0x4E, ++0xDB, 0x90, 0x9F, 0xB3, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x07, 0xE4, 0x90, 0xA1, 0x86, 0xF0, 0x80, ++0x06, 0x90, 0xA1, 0x86, 0x74, 0x01, 0xF0, 0x12, 0xBC, 0x26, 0x20, 0xE0, 0x13, 0x90, 0x9F, 0xF5, ++0xE0, 0x60, 0x08, 0x90, 0xA1, 0x87, 0x74, 0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0xA1, 0x87, 0xF0, ++0x90, 0xA1, 0x87, 0xE0, 0xFF, 0x90, 0xA1, 0x86, 0xE0, 0xFD, 0x12, 0x5B, 0x20, 0xE4, 0x90, 0x9F, ++0xC5, 0xF0, 0x90, 0xA1, 0x85, 0xE0, 0xFF, 0xB4, 0x02, 0x05, 0x12, 0xBB, 0x5F, 0x80, 0x09, 0xEF, ++0xB4, 0x05, 0x05, 0xE4, 0x90, 0x9F, 0xC6, 0xF0, 0xF1, 0xB9, 0x30, 0xE0, 0x27, 0x90, 0xA1, 0x85, ++0xE0, 0xB4, 0x02, 0x0C, 0x12, 0x4E, 0xC4, 0x30, 0xE0, 0x02, 0x80, 0x7A, 0x7D, 0x08, 0x80, 0x7F, ++0x90, 0xA1, 0x85, 0xE0, 0x64, 0x05, 0x70, 0x7C, 0x12, 0x4E, 0xC4, 0x30, 0xE0, 0x02, 0x80, 0x66, ++0x7D, 0x0E, 0x80, 0x6B, 0x90, 0x9F, 0xB3, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x30, 0xF1, 0x9A, ++0x54, 0x07, 0x20, 0xE0, 0x02, 0xD1, 0x9C, 0x90, 0xA1, 0x85, 0xE0, 0xB4, 0x02, 0x0C, 0x12, 0x4E, ++0xC4, 0x30, 0xE0, 0x02, 0x80, 0x40, 0x7D, 0x09, 0x80, 0x45, 0x90, 0xA1, 0x85, 0xE0, 0x64, 0x05, ++0x70, 0x42, 0x12, 0x4E, 0xC4, 0x30, 0xE0, 0x02, 0x80, 0x2C, 0x7D, 0x0F, 0x80, 0x31, 0x90, 0x9F, ++0x42, 0xE0, 0x60, 0x30, 0xD1, 0x9C, 0x90, 0xA1, 0x85, 0xE0, 0xB4, 0x02, 0x0C, 0x12, 0x4E, 0xC4, ++0x30, 0xE0, 0x02, 0x80, 0x11, 0x7D, 0x0A, 0x80, 0x16, 0x90, 0xA1, 0x85, 0xE0, 0xB4, 0x05, 0x14, ++0x12, 0x4E, 0xC4, 0x30, 0xE0, 0x07, 0x7F, 0x02, 0x12, 0x4F, 0xB7, 0x80, 0x07, 0x7D, 0x10, 0x7F, ++0x6F, 0x12, 0x4B, 0x17, 0x90, 0x9F, 0xB6, 0xE0, 0x30, 0xE0, 0x0B, 0x12, 0x4E, 0xBF, 0x30, 0xE0, ++0x05, 0x7F, 0x01, 0x12, 0x4F, 0xB7, 0x90, 0x9F, 0xB6, 0x12, 0x57, 0xA5, 0x30, 0xE0, 0x05, 0xE4, ++0xFF, 0x12, 0x97, 0xCA, 0x90, 0x9F, 0xB7, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x0E, 0x90, 0x06, 0xCD, ++0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x06, 0xCF, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x9F, 0x44, 0xE0, ++0xFF, 0xE4, 0xFD, 0x02, 0x63, 0x1A, 0x90, 0x9F, 0xB3, 0xE0, 0x30, 0xE0, 0x3D, 0x12, 0x74, 0x3F, ++0x90, 0x9F, 0xC6, 0xE0, 0xFF, 0xB4, 0x01, 0x02, 0x80, 0x23, 0x90, 0x9F, 0xC6, 0xE0, 0xFF, 0xB4, ++0x02, 0x02, 0x80, 0x24, 0x90, 0x9F, 0xC6, 0xE0, 0xB4, 0x03, 0x0A, 0xD1, 0xEB, 0x90, 0x9F, 0xC6, ++0xE0, 0xFF, 0x02, 0x4C, 0xDE, 0x90, 0x9F, 0xC6, 0xE0, 0xFF, 0xB4, 0x04, 0x03, 0x02, 0x9D, 0xD4, ++0x90, 0x9F, 0xC6, 0xE0, 0xFF, 0xB4, 0x05, 0x02, 0xB1, 0x39, 0x22, 0x90, 0x9F, 0xD8, 0xE0, 0x44, ++0x10, 0xF0, 0x22, 0x12, 0x45, 0x54, 0x90, 0x9F, 0x95, 0x12, 0x08, 0x6D, 0x90, 0x9F, 0x3E, 0xE0, ++0x44, 0x80, 0xF0, 0x22, 0x31, 0x00, 0x90, 0x9F, 0xCE, 0x12, 0x87, 0xAA, 0xFE, 0xEF, 0xC3, 0x13, ++0x54, 0x0F, 0xC3, 0x9E, 0x40, 0x02, 0x80, 0x17, 0x90, 0x9F, 0xCE, 0xE0, 0xFF, 0xC3, 0x13, 0x54, ++0x0F, 0xFE, 0xEF, 0x54, 0xE1, 0xFF, 0xEE, 0x04, 0x54, 0x0F, 0x25, 0xE0, 0x4F, 0xF0, 0x22, 0x90, ++0x9F, 0xCE, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xE1, 0xF0, 0x90, 0x9F, 0xD3, 0xE0, 0xFF, 0x51, 0xA3, ++0x90, 0x9F, 0xD4, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x12, 0x5B, 0x20, 0x90, 0x9F, 0x42, 0xE0, 0x70, ++0x0D, 0x90, 0x9F, 0xA6, 0xE0, 0x20, 0xE0, 0x06, 0x12, 0xA0, 0x20, 0x12, 0x67, 0x6F, 0x22, 0x90, ++0x9F, 0x3D, 0x12, 0x77, 0x6B, 0x30, 0xE0, 0x05, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x06, 0x92, ++0x74, 0x02, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF1, 0x93, 0x90, 0x9F, 0xA1, 0xE0, 0xC3, 0x13, ++0x54, 0x7F, 0x90, 0xA2, 0x45, 0x12, 0xBC, 0x0B, 0x12, 0x48, 0x19, 0x90, 0x9F, 0x3D, 0xE0, 0x44, ++0x08, 0xF0, 0x22, 0xF0, 0xE4, 0x90, 0xA2, 0x44, 0xF0, 0x22, 0x90, 0x9F, 0xB7, 0xE0, 0xC4, 0x13, ++0x22, 0x90, 0x9F, 0xA4, 0xE0, 0xFF, 0xC3, 0x22, 0x90, 0x9F, 0x48, 0xE0, 0x90, 0x05, 0x73, 0x22, ++0xF0, 0x90, 0x9F, 0xB6, 0xE0, 0xC4, 0x54, 0x0F, 0x22, 0x90, 0x9F, 0xB3, 0xE0, 0xC4, 0x13, 0x54, ++0x07, 0x22, 0x90, 0x9F, 0xA8, 0xE0, 0x90, 0x05, 0x73, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x9F, 0x3F, 0xE0, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x1F, 0x90, 0xA2, 0x22, 0x74, ++0x1E, 0xF0, 0x90, 0xA2, 0x30, 0x74, 0x01, 0xF0, 0x90, 0xA2, 0x24, 0xEF, 0xF0, 0x7B, 0x01, 0x7A, ++0xA2, 0x79, 0x22, 0x12, 0x84, 0x82, 0x7F, 0x04, 0x12, 0x58, 0x3A, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, ++0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, ++0x74, 0x00, 0xF0, 0x74, 0x90, 0xA3, 0xF0, 0x11, 0x52, 0x53, 0x91, 0xBF, 0x74, 0x00, 0x04, 0x90, ++0x01, 0xC4, 0xF0, 0x74, 0x90, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, ++0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, ++0xE0, 0x32, 0x90, 0xFD, 0x68, 0xE0, 0xFF, 0x90, 0xFD, 0x60, 0xE0, 0x90, 0xA1, 0x92, 0xF0, 0xEF, ++0x20, 0xE0, 0x02, 0x21, 0xD8, 0x90, 0xA2, 0x86, 0xE0, 0x70, 0x1A, 0x7F, 0x2E, 0x12, 0x47, 0x84, ++0x90, 0x9F, 0xF1, 0xEF, 0xF0, 0x7F, 0x2D, 0x12, 0x47, 0x84, 0x90, 0x9F, 0xF2, 0xEF, 0xF0, 0x90, ++0xA2, 0x86, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0x92, 0xE0, 0x64, 0x15, 0x70, 0x55, 0x90, 0xFD, 0x62, ++0xE0, 0xFF, 0x30, 0xE6, 0x11, 0xF4, 0x54, 0x3F, 0x04, 0xFE, 0x51, 0x89, 0xC3, 0x9E, 0x51, 0x81, ++0x40, 0x12, 0xE4, 0xF0, 0x80, 0x0E, 0x51, 0x89, 0xFE, 0xEF, 0x54, 0x3F, 0x2E, 0x51, 0x81, 0x40, ++0x03, 0x74, 0x3F, 0xF0, 0x90, 0xA1, 0x91, 0xE0, 0xFF, 0x54, 0x30, 0xC4, 0x54, 0x0F, 0xFE, 0xEF, ++0x25, 0xE0, 0x25, 0xE0, 0x4E, 0xF5, 0x6D, 0xFD, 0x7F, 0x2E, 0x12, 0x46, 0x81, 0x90, 0xA1, 0x91, ++0xE0, 0xC4, 0x54, 0xF0, 0xFF, 0x90, 0x9F, 0xF2, 0xE0, 0x54, 0x0F, 0x4F, 0xFD, 0x7F, 0x2D, 0x12, ++0x46, 0x81, 0x90, 0xA1, 0x92, 0xE0, 0xB4, 0x23, 0x04, 0x7F, 0x01, 0x31, 0xF1, 0x90, 0xA1, 0x92, ++0xE0, 0xB4, 0x27, 0x04, 0x7F, 0x02, 0x31, 0xF1, 0x90, 0xA1, 0x92, 0xE0, 0xB4, 0x30, 0x0D, 0xE4, ++0xFB, 0xFD, 0x7F, 0x01, 0x12, 0x9A, 0x07, 0x7F, 0x04, 0x12, 0x58, 0x3A, 0x90, 0xA1, 0x92, 0xE0, ++0x64, 0x34, 0x60, 0x02, 0x21, 0xA0, 0x90, 0xFD, 0x62, 0xE0, 0x30, 0xE0, 0x4E, 0x90, 0x9F, 0xD8, ++0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x7A, 0x90, 0x9F, 0xB6, 0x12, 0x4F, 0xEF, 0x30, 0xE0, 0x11, 0x7F, ++0x48, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0x90, 0x9F, 0xD9, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x31, 0xD9, ++0x51, 0x92, 0x7D, 0x01, 0x12, 0x46, 0x95, 0x75, 0x6D, 0x01, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x6D, ++0x7D, 0x01, 0x7F, 0x34, 0x12, 0x57, 0xF0, 0x90, 0x9F, 0xFC, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x04, ++0x9D, 0xE4, 0xF0, 0xE0, 0x44, 0x01, 0xF0, 0x51, 0xAA, 0x80, 0x35, 0x51, 0x92, 0xE4, 0xFD, 0x12, ++0x46, 0x95, 0x90, 0x9F, 0xB6, 0x12, 0x4F, 0xEF, 0x30, 0xE0, 0x1A, 0x7F, 0x48, 0x71, 0x05, 0xFB, ++0xFA, 0xED, 0xF9, 0xEC, 0xF8, 0x90, 0x9F, 0xD9, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, ++0x12, 0x45, 0x54, 0x31, 0xE4, 0xB1, 0x2A, 0x90, 0x04, 0x9D, 0xE0, 0x54, 0xFE, 0xF0, 0x51, 0xFB, ++0x90, 0xA1, 0x92, 0xE0, 0x64, 0x39, 0x70, 0x29, 0x90, 0x9F, 0xB3, 0xE0, 0x30, 0xE0, 0x22, 0xF1, ++0x97, 0x30, 0xE0, 0x1D, 0x90, 0x9F, 0xD8, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x13, 0x90, 0x9F, ++0xC6, 0xE0, 0x24, 0xFD, 0x60, 0x04, 0x24, 0x03, 0x70, 0x07, 0x12, 0x4E, 0xF2, 0x74, 0x05, 0xF1, ++0xBF, 0x90, 0xFD, 0x68, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x7F, 0x48, 0x7E, 0x09, 0x12, 0x37, 0x4E, ++0xE4, 0xFF, 0xFE, 0xEC, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x48, 0x7E, 0x09, 0x02, 0x38, ++0x45, 0x31, 0xF8, 0x7F, 0x04, 0x02, 0x58, 0x3A, 0x90, 0xA1, 0xE6, 0x74, 0x09, 0xF0, 0x90, 0xA1, ++0xF4, 0x74, 0x07, 0xF0, 0x90, 0xA1, 0xE8, 0xEF, 0xF0, 0x70, 0x31, 0x90, 0x9F, 0xCC, 0xE0, 0x60, ++0x1A, 0xA3, 0xE0, 0x60, 0x02, 0x80, 0x0C, 0x90, 0x07, 0x70, 0xE0, 0x70, 0x06, 0x90, 0x07, 0x74, ++0xE0, 0x60, 0x08, 0x90, 0xA1, 0xE9, 0x74, 0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0xA1, 0xE9, 0xF0, ++0xE4, 0x90, 0xA1, 0xEA, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0x80, 0x39, 0x90, 0xFD, 0x62, 0xE0, ++0x90, 0xA1, 0xE9, 0xF0, 0x90, 0xFD, 0x63, 0xE0, 0x90, 0xA1, 0xEA, 0xF0, 0x90, 0xFD, 0x64, 0xE0, ++0x90, 0xA1, 0xEB, 0xF0, 0x90, 0xFD, 0x65, 0xE0, 0x90, 0xA1, 0xEC, 0xF0, 0x90, 0xFD, 0x66, 0xE0, ++0x90, 0xA1, 0xED, 0xF0, 0x90, 0xFD, 0x67, 0xE0, 0x90, 0xA1, 0xEE, 0xF0, 0x90, 0xA1, 0xE9, 0xE0, ++0x54, 0x01, 0x90, 0x9F, 0xCC, 0xF0, 0xA3, 0xF0, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0xE6, 0x02, 0x84, ++0x82, 0x90, 0xA1, 0x91, 0xF0, 0xD3, 0x94, 0x3F, 0x22, 0x90, 0x9F, 0xF1, 0xE0, 0x13, 0x13, 0x54, ++0x3F, 0x22, 0x90, 0x9F, 0xB6, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x01, 0xFF, 0x90, 0x9F, 0xF6, 0xE0, ++0xFB, 0x90, 0x9F, 0xF5, 0xE0, 0x90, 0xA2, 0x63, 0xF0, 0x22, 0x90, 0x01, 0xE7, 0xE0, 0x54, 0xFE, ++0xF0, 0x22, 0x12, 0x06, 0x89, 0x54, 0x01, 0xF1, 0x7D, 0x54, 0xFD, 0x4F, 0xF0, 0xE0, 0xC3, 0x13, ++0xFF, 0x54, 0x01, 0x90, 0x01, 0xE6, 0xF0, 0xA3, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE0, 0x29, ++0x12, 0x60, 0x82, 0x64, 0x04, 0x70, 0x20, 0x90, 0x9F, 0xFC, 0xE0, 0x30, 0xE0, 0x02, 0x80, 0x19, ++0x90, 0xFD, 0x62, 0xE0, 0xB4, 0xAD, 0x0E, 0xA3, 0xE0, 0xB4, 0x35, 0x09, 0x51, 0xAA, 0x90, 0x01, ++0xE5, 0x74, 0xDF, 0xF0, 0x22, 0x80, 0x00, 0x80, 0x02, 0x80, 0xAF, 0x90, 0x01, 0xE7, 0xE0, 0x44, ++0x01, 0xF0, 0x22, 0x7F, 0x30, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0xE4, 0x22, 0x12, 0xA9, 0x1A, 0x7F, ++0x08, 0x12, 0x47, 0x84, 0xEF, 0x54, 0xEF, 0xFD, 0x7F, 0x08, 0x12, 0x46, 0x81, 0xE4, 0xFF, 0x71, ++0xA5, 0x51, 0x92, 0xE4, 0xFD, 0x12, 0x46, 0x95, 0x90, 0x9F, 0x3D, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, ++0x30, 0xE0, 0x03, 0x12, 0xBA, 0x24, 0x90, 0x9F, 0x3E, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x71, 0x4E, 0x71, 0x0C, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x9F, ++0x3E, 0xE0, 0x44, 0x10, 0xF0, 0x51, 0x92, 0x7D, 0x01, 0x12, 0x46, 0x95, 0x90, 0x9F, 0x4D, 0xE0, ++0xFD, 0x7F, 0x93, 0x12, 0x46, 0x81, 0x90, 0x9F, 0x43, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, ++0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x7F, 0x08, ++0x12, 0x47, 0x84, 0xEF, 0x44, 0x10, 0xFD, 0x7F, 0x08, 0x12, 0x46, 0x81, 0x7F, 0x01, 0x71, 0xA5, ++0x7F, 0x90, 0x12, 0x47, 0x84, 0xEF, 0x44, 0x01, 0xFD, 0x7F, 0x90, 0x12, 0x46, 0x81, 0x7F, 0x14, ++0x7E, 0x00, 0x02, 0x3E, 0x50, 0x90, 0xA2, 0x90, 0xF1, 0x0D, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00, ++0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, 0xA2, 0x90, 0xE0, 0x6F, 0x60, 0x35, 0xC3, 0x90, 0xA2, 0x92, ++0xE0, 0x94, 0x88, 0x90, 0xA2, 0x91, 0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44, ++0x10, 0xF0, 0x22, 0x90, 0xA2, 0x91, 0x12, 0x4F, 0xDE, 0xD1, 0x53, 0xD3, 0x90, 0xA2, 0x92, 0xE0, ++0x94, 0x32, 0x90, 0xA2, 0x91, 0xE0, 0x94, 0x00, 0x40, 0xC0, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0, ++0xB9, 0x22, 0x90, 0x9F, 0x45, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, 0x08, 0x12, 0xB7, 0xDF, 0xBF, ++0x01, 0x02, 0x71, 0x3E, 0x22, 0x90, 0x9F, 0x3D, 0xE0, 0x30, 0xE0, 0x19, 0x90, 0x9F, 0x38, 0xE0, ++0xFF, 0x30, 0xE0, 0x0F, 0xC3, 0x13, 0x30, 0xE0, 0x08, 0x12, 0xB6, 0xE6, 0xBF, 0x01, 0x06, 0x80, ++0x02, 0x80, 0x00, 0x71, 0xF2, 0x22, 0x90, 0x9F, 0xCE, 0xE0, 0x30, 0xE0, 0x05, 0x12, 0x8F, 0x04, ++0x80, 0x03, 0x12, 0x4E, 0xF9, 0x90, 0x9F, 0xFC, 0xE0, 0x30, 0xE0, 0x04, 0xA3, 0xE0, 0x04, 0xF0, ++0x90, 0x9F, 0xFD, 0xE0, 0x64, 0x08, 0x70, 0x17, 0x90, 0x9F, 0xFC, 0xE0, 0x30, 0xE0, 0x0B, 0x51, ++0x92, 0xE4, 0xFD, 0x12, 0x46, 0x95, 0xB1, 0x2A, 0x80, 0x05, 0xE4, 0x90, 0x9F, 0xFD, 0xF0, 0x12, ++0x4F, 0xEC, 0x30, 0xE0, 0x13, 0x90, 0x9F, 0xFE, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x14, 0x09, 0x90, ++0x04, 0x9C, 0xE4, 0xF0, 0x90, 0x9F, 0xFE, 0xF0, 0x90, 0x9F, 0x38, 0xE0, 0x30, 0xE0, 0x06, 0x90, ++0x9F, 0x3A, 0x74, 0x01, 0xF0, 0x90, 0x9F, 0x42, 0xE0, 0x70, 0x02, 0xA1, 0x13, 0x90, 0x9F, 0x59, ++0xE0, 0x04, 0x12, 0x5F, 0xBE, 0x12, 0x45, 0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0x05, 0x62, 0x12, 0x5F, 0xD8, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x12, 0x45, 0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, ++0x5F, 0xD8, 0x78, 0x18, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, ++0x45, 0x54, 0x90, 0x9F, 0x8D, 0x12, 0x08, 0x6D, 0x90, 0x9F, 0x3E, 0xF1, 0xB8, 0x30, 0xE0, 0x09, ++0xD1, 0x42, 0x74, 0x05, 0xF0, 0xB1, 0x35, 0xB1, 0xFA, 0x90, 0x9F, 0x3E, 0x12, 0x77, 0x6B, 0x30, ++0xE0, 0x0A, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x03, 0x12, 0x66, 0xEA, 0x90, 0xA2, 0xAA, 0xE0, ++0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x80, 0x40, 0x0B, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, ++0x44, 0x01, 0xF0, 0x7F, 0x01, 0x12, 0x58, 0x3A, 0x90, 0x9F, 0xA6, 0xE0, 0x30, 0xE0, 0x0A, 0x90, ++0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x03, 0x12, 0x66, 0xEA, 0x22, 0x90, 0x9F, 0xFC, 0xE0, 0x54, 0xFE, ++0xF0, 0xE4, 0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAC, 0x07, 0x90, 0x9F, ++0x3E, 0x12, 0x57, 0xA5, 0x30, 0xE0, 0x02, 0xA1, 0xEE, 0x90, 0x9F, 0x3D, 0xE0, 0x30, 0xE0, 0x16, ++0x90, 0x9F, 0x5F, 0xE0, 0x24, 0x04, 0x90, 0x9F, 0x57, 0xF0, 0x90, 0x9F, 0x5F, 0xE0, 0x24, 0x03, ++0x90, 0x9F, 0x56, 0xF0, 0x80, 0x0D, 0x90, 0x9F, 0x57, 0x74, 0x02, 0xF0, 0x90, 0x9F, 0x56, 0x14, ++0xF0, 0x0B, 0x0B, 0x90, 0x9F, 0x56, 0xE0, 0xFA, 0x90, 0x9F, 0x55, 0xE0, 0xD3, 0x9A, 0x50, 0x0E, ++0x90, 0x9F, 0x4A, 0xEB, 0xF0, 0x90, 0x9F, 0x57, 0xE0, 0xC3, 0x9D, 0x2C, 0x80, 0x11, 0xC3, 0xED, ++0x9A, 0x2B, 0x90, 0x9F, 0x4A, 0xF0, 0x90, 0x9F, 0x56, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, ++0x9F, 0x5A, 0xF0, 0x90, 0x9F, 0x57, 0xE0, 0xFF, 0x24, 0x0A, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x9F, ++0x5A, 0xD1, 0x02, 0x40, 0x04, 0xEF, 0x24, 0x0A, 0xF0, 0x90, 0x9F, 0x5A, 0xE0, 0xFF, 0x24, 0x23, ++0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x9F, 0x4A, 0xD1, 0x02, 0x40, 0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, ++0x9F, 0x5A, 0xE0, 0xFF, 0x7E, 0x00, 0x90, 0x9F, 0x4E, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, ++0x58, 0xE0, 0x6F, 0x70, 0x01, 0xE4, 0x60, 0x02, 0xF1, 0xAA, 0xB1, 0xFA, 0x80, 0x07, 0x90, 0x9F, ++0x3F, 0xE0, 0x44, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x9F, 0x3F, 0xE0, 0x54, 0xFE, ++0xF0, 0x22, 0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x22, 0x12, 0xA8, 0xD5, ++0x90, 0xA1, 0x85, 0xEF, 0xF0, 0x30, 0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, ++0x12, 0x62, 0x85, 0x90, 0xA1, 0x85, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, ++0x04, 0xE4, 0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0xD1, 0x42, 0x74, 0x02, 0xF0, ++0xA1, 0x35, 0x90, 0x9F, 0x54, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x9F, 0x5B, 0xE0, 0xFB, 0x90, ++0xA2, 0x7F, 0x22, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x3E, 0x50, 0xE4, 0x90, 0xA1, 0x45, 0xF0, 0xA3, ++0xF0, 0xD1, 0xAB, 0xEF, 0x64, 0x01, 0x60, 0x3C, 0xC3, 0x90, 0xA1, 0x46, 0xE0, 0x94, 0x88, 0x90, ++0xA1, 0x45, 0xE0, 0x94, 0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x01, ++0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1E, 0x90, 0xA1, 0x45, 0x12, 0x4F, 0xDE, 0xD1, 0x53, 0xD3, 0x90, ++0xA1, 0x46, 0xE0, 0x94, 0x32, 0x90, 0xA1, 0x45, 0xE0, 0x94, 0x00, 0x40, 0xC4, 0x90, 0x01, 0xC6, ++0xE0, 0x30, 0xE3, 0xBD, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0x90, 0x01, 0x9A, 0xE0, 0x54, ++0xC0, 0x44, 0x0B, 0xD1, 0xC3, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xC0, 0x7F, 0x00, 0xB4, 0x40, 0x02, ++0x7F, 0x01, 0x22, 0xF0, 0x7F, 0x0A, 0x7E, 0x00, 0x02, 0x3E, 0x50, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0xA2, 0x64, 0xEE, 0xF1, 0x0B, 0x90, 0xA2, 0x64, 0xF1, 0xA0, 0xE0, 0x60, 0x24, ++0xC3, 0x90, 0xA2, 0x67, 0xE0, 0x94, 0xE8, 0x90, 0xA2, 0x66, 0xE0, 0x94, 0x03, 0x40, 0x0B, 0x90, ++0x01, 0xC0, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x00, 0x80, 0x0C, 0x90, 0xA2, 0x66, 0x12, 0x4F, 0xDE, ++0xD1, 0xC4, 0x80, 0xD4, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, ++0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x6C, 0x12, ++0x45, 0x9F, 0x7F, 0x96, 0x7E, 0x02, 0xD1, 0xCB, 0xEF, 0x60, 0x4D, 0x90, 0x01, 0x17, 0xE0, 0xFE, ++0x90, 0x01, 0x16, 0xF1, 0x8E, 0xFE, 0xEF, 0x24, 0x01, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, 0xA2, 0x6F, ++0xEF, 0xF0, 0xEE, 0xFF, 0x90, 0xFD, 0x11, 0xF0, 0x90, 0xA2, 0x6F, 0xE0, 0xFD, 0x90, 0x02, 0x94, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA2, 0x6C, 0xF1, 0x85, 0x24, 0x02, 0xFF, 0xE4, 0x33, 0xFE, 0x12, ++0xA4, 0x22, 0x90, 0xA2, 0x6F, 0xE0, 0x24, 0x18, 0xFF, 0x90, 0xA2, 0x6C, 0x12, 0x45, 0x96, 0x12, ++0xA4, 0x7B, 0x90, 0x02, 0x96, 0x74, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x25, 0xE0, 0xFF, ++0x90, 0x9F, 0xD8, 0xE0, 0x22, 0x12, 0x45, 0x96, 0x90, 0x00, 0x0E, 0x02, 0x06, 0xA2, 0xE0, 0x7C, ++0x00, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x22, 0x90, 0x9F, 0xB7, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x22, ++0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0x22, 0xF0, 0x90, 0x9F, 0x4E, 0xA3, 0xE0, 0x90, ++0x05, 0x58, 0xF0, 0x22, 0xF0, 0x90, 0xA0, 0xB5, 0xE0, 0x54, 0x7F, 0xF0, 0xA3, 0xE0, 0x22, 0xF0, ++0xE4, 0xFB, 0xFD, 0x7F, 0x60, 0x7E, 0x01, 0x02, 0x48, 0x19, 0x90, 0x9F, 0xE6, 0xE0, 0xFE, 0xC3, ++0x13, 0x30, 0xE0, 0x16, 0xEF, 0xB4, 0x01, 0x05, 0x90, 0x9F, 0xED, 0x80, 0x03, 0x90, 0x9F, 0xE9, ++0x12, 0x5C, 0x30, 0x7F, 0x80, 0x7E, 0x08, 0x12, 0x38, 0x45, 0x22, 0x7B, 0x01, 0x7A, 0x9F, 0x79, ++0xFF, 0x12, 0x98, 0x11, 0xB4, 0x02, 0x19, 0x90, 0xA2, 0x84, 0xE0, 0x64, 0x04, 0x60, 0x0C, 0x7F, ++0x40, 0x12, 0x83, 0x59, 0x90, 0xA2, 0x84, 0xE0, 0x04, 0xF0, 0x22, 0xE4, 0x90, 0xA2, 0x84, 0xF0, ++0x22, 0x7D, 0x03, 0x7F, 0x11, 0x12, 0x57, 0xF0, 0xEF, 0x22, 0x90, 0xA1, 0x5B, 0x74, 0x0A, 0xF0, ++0x90, 0xA1, 0x69, 0x74, 0x06, 0xF0, 0x12, 0x06, 0x89, 0x90, 0xA1, 0x5D, 0x12, 0x5F, 0x0C, 0x90, ++0xA1, 0x5E, 0x12, 0x57, 0xB8, 0x90, 0xA1, 0x5F, 0x12, 0x5F, 0x65, 0x90, 0xA1, 0x60, 0x11, 0xE9, ++0x90, 0xA1, 0x61, 0x12, 0x5F, 0x02, 0x90, 0xA1, 0x62, 0x12, 0x86, 0xEF, 0x02, 0x84, 0x82, 0x12, ++0x06, 0x89, 0xF5, 0x51, 0x12, 0x5F, 0x0D, 0xF5, 0x54, 0x12, 0x57, 0xB9, 0xF5, 0x55, 0x12, 0x5F, ++0x66, 0xF5, 0x56, 0x11, 0xEA, 0xF5, 0x57, 0x12, 0x5F, 0x03, 0xF5, 0x58, 0x12, 0x86, 0xE9, 0xF5, ++0x59, 0xE5, 0x51, 0x12, 0x45, 0xA8, 0x98, 0x8F, 0x00, 0x98, 0x97, 0x01, 0x98, 0x9F, 0x02, 0x98, ++0xA7, 0x03, 0x98, 0xAF, 0x04, 0x98, 0xB7, 0x05, 0x98, 0xBF, 0x06, 0x00, 0x00, 0x98, 0xD6, 0x75, ++0x52, 0x02, 0x75, 0x53, 0x29, 0x80, 0x45, 0x75, 0x52, 0x06, 0x75, 0x53, 0x2A, 0x80, 0x3D, 0x75, ++0x52, 0x01, 0x75, 0x53, 0x31, 0x80, 0x35, 0x75, 0x52, 0x01, 0x75, 0x53, 0x32, 0x80, 0x2D, 0x75, ++0x52, 0x06, 0x75, 0x53, 0x33, 0x80, 0x25, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x54, 0x01, 0x1A, 0x90, ++0x9F, 0xF7, 0xE5, 0x54, 0xF0, 0xA3, 0xE5, 0x55, 0xF0, 0xA3, 0xE5, 0x56, 0xF0, 0xA3, 0xE5, 0x57, ++0xF0, 0xA3, 0xE5, 0x58, 0xF0, 0x22, 0x75, 0x52, 0x01, 0x75, 0x53, 0xFF, 0x7B, 0x00, 0x7A, 0x00, ++0x79, 0x54, 0xAD, 0x52, 0xAF, 0x53, 0x02, 0x57, 0xF0, 0xF0, 0x90, 0x00, 0x04, 0x02, 0x06, 0xA2, ++0x31, 0x8C, 0x90, 0xA0, 0x49, 0x12, 0x5F, 0x0C, 0x90, 0xA0, 0x4A, 0x12, 0x57, 0xB8, 0x90, 0xA0, ++0x5C, 0x12, 0x5F, 0x65, 0x90, 0xA0, 0x5D, 0x11, 0xE9, 0x90, 0xA0, 0x6F, 0x12, 0x5F, 0x02, 0x90, ++0xA0, 0x70, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x06, 0x89, 0x12, 0x5F, ++0x09, 0x12, 0x57, 0xB5, 0x90, 0xA1, 0x5D, 0x12, 0x5F, 0x65, 0x90, 0xA1, 0x5E, 0x11, 0xE9, 0x90, ++0xA1, 0x5F, 0x12, 0x97, 0x0E, 0x90, 0x9F, 0xDB, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0xA1, 0x5C, 0xE0, ++0xB4, 0x0C, 0x06, 0xE5, 0x6E, 0x70, 0x0E, 0x80, 0x00, 0x12, 0x86, 0xF0, 0x7D, 0x07, 0x7F, 0x30, ++0x12, 0x57, 0xF0, 0x8F, 0x51, 0x90, 0xA1, 0x5C, 0xE0, 0xB4, 0x0D, 0x0E, 0xE5, 0x51, 0x64, 0x01, ++0x60, 0x05, 0x75, 0x6E, 0x01, 0x80, 0x03, 0xE4, 0xF5, 0x6E, 0xE5, 0x51, 0xB4, 0x01, 0x05, 0x75, ++0x52, 0x01, 0x80, 0x03, 0xE4, 0xF5, 0x52, 0x90, 0xA1, 0x5B, 0xE0, 0xFB, 0xAD, 0x52, 0xE4, 0xFF, ++0x51, 0x07, 0x7F, 0x04, 0x12, 0x83, 0x59, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x8B, 0x51, 0x8A, 0x52, ++0x89, 0x53, 0x02, 0x06, 0x89, 0x31, 0x8C, 0xFF, 0x54, 0x01, 0xC4, 0x33, 0x54, 0xE0, 0xFE, 0x90, ++0xA0, 0xB6, 0xE0, 0x54, 0xDF, 0x4E, 0xF0, 0xEF, 0x54, 0xFE, 0xC3, 0x13, 0xFF, 0x90, 0xA0, 0xB5, ++0xE0, 0x54, 0x80, 0x4F, 0x12, 0x5F, 0x0C, 0x90, 0xA0, 0xB7, 0x12, 0x57, 0xB8, 0x90, 0xA0, 0xB8, ++0x12, 0x5F, 0x65, 0x90, 0xA0, 0xB9, 0xF0, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x51, 0x12, 0x06, ++0x89, 0x25, 0x51, 0x90, 0x9E, 0x33, 0x12, 0x5F, 0x0C, 0x25, 0x51, 0x90, 0x9E, 0x34, 0x12, 0x57, ++0xB8, 0x25, 0x51, 0x90, 0x9E, 0x35, 0x12, 0x5F, 0x65, 0x25, 0x51, 0x90, 0x9E, 0x36, 0x11, 0xE9, ++0x25, 0x51, 0x90, 0x9E, 0x37, 0x12, 0x5F, 0x02, 0x25, 0x51, 0x90, 0x9E, 0x38, 0x12, 0x86, 0xE8, ++0x25, 0x51, 0x90, 0x9E, 0x39, 0xF0, 0x22, 0x90, 0xA1, 0xF5, 0x74, 0x0B, 0xF0, 0x90, 0xA2, 0x03, ++0x74, 0x07, 0xF0, 0x90, 0xA1, 0xF7, 0xEF, 0xF0, 0x60, 0x32, 0x90, 0xFD, 0x63, 0xE0, 0x90, 0xA1, ++0xF8, 0xF0, 0x90, 0xFD, 0x61, 0xE0, 0x90, 0xA1, 0xF9, 0xF0, 0x90, 0xFD, 0x64, 0xE0, 0x90, 0xA1, ++0xFA, 0xF0, 0x90, 0xFD, 0x65, 0xE0, 0x90, 0xA1, 0xFB, 0xF0, 0x90, 0xFD, 0x66, 0xE0, 0x90, 0xA1, ++0xFC, 0xF0, 0x90, 0xFD, 0x67, 0xE0, 0x90, 0xA1, 0xFD, 0xF0, 0x80, 0x0A, 0x90, 0xA1, 0xF8, 0xED, ++0xF0, 0xA3, 0xEB, 0x12, 0x60, 0xF5, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0xF5, 0x02, 0x84, 0x82, 0x90, ++0xA1, 0x8D, 0xEC, 0x71, 0x97, 0x90, 0xA1, 0x8D, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x12, 0x73, 0x92, ++0x90, 0xA1, 0x8D, 0xA3, 0xE0, 0xFF, 0xFD, 0x24, 0x0D, 0x51, 0xBD, 0x44, 0x80, 0xF0, 0x74, 0x0D, ++0x2D, 0x51, 0xBD, 0x54, 0xEF, 0x12, 0x77, 0x72, 0xE0, 0x44, 0x02, 0x12, 0x77, 0x72, 0xE0, 0x54, ++0x03, 0xF0, 0x90, 0xA1, 0x8F, 0xE0, 0xFF, 0x90, 0xA1, 0x8D, 0xA3, 0xE0, 0xFE, 0x24, 0x2A, 0xF1, ++0x46, 0x90, 0xA1, 0x90, 0xE0, 0xFF, 0x74, 0x2B, 0x2E, 0xF1, 0x50, 0x74, 0x2C, 0x2E, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x24, 0x02, 0xF0, 0x22, 0x74, 0x0D, 0x2C, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0xA2, 0x59, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x81, ++0x00, 0xE0, 0x54, 0x0F, 0xFD, 0xAC, 0x07, 0x51, 0xBA, 0x44, 0x01, 0xF0, 0x51, 0xBA, 0x54, 0xFB, ++0xF0, 0xAC, 0x07, 0x74, 0x12, 0x2C, 0x12, 0x77, 0x76, 0xE0, 0x44, 0xFA, 0xF0, 0x74, 0x11, 0x2C, ++0xF1, 0x22, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, 0x06, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x44, 0x0E, 0xF0, 0x90, 0x04, 0xA7, 0xE4, 0xF0, 0x90, 0x04, 0xA6, 0xF0, 0x90, ++0x04, 0xA5, 0x74, 0xFF, 0xF0, 0x90, 0x04, 0xA4, 0x74, 0xFD, 0xF0, 0x74, 0x14, 0x2C, 0x71, 0x2D, ++0xE0, 0x54, 0xC0, 0x4D, 0xFD, 0x74, 0x14, 0x2F, 0x71, 0x2D, 0xED, 0xF0, 0x22, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0x22, 0x90, 0xA1, 0x86, 0x71, 0x96, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x21, ++0x90, 0x05, 0x22, 0xE0, 0x90, 0xA1, 0x8B, 0xF0, 0x7D, 0x01, 0x71, 0xA1, 0xEF, 0x64, 0x01, 0x70, ++0x04, 0x71, 0x6C, 0x51, 0x5F, 0x90, 0xA1, 0x8B, 0xE0, 0xFF, 0x7D, 0x02, 0x12, 0x4B, 0x17, 0x80, ++0x04, 0x71, 0x6C, 0x51, 0x5F, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x22, 0x90, 0x9E, 0x37, 0xE0, ++0xFF, 0x90, 0xA2, 0x73, 0x74, 0x01, 0xF0, 0x7B, 0x08, 0xFD, 0x12, 0x72, 0x0B, 0x90, 0xA1, 0x89, ++0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0xA1, 0x86, 0xE0, 0xFF, 0xA3, 0xE0, 0xFB, 0xA3, ++0xE0, 0x90, 0xA1, 0x90, 0xF0, 0x22, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x22, 0x7D, ++0x17, 0x7F, 0xFF, 0x12, 0x4B, 0x17, 0xE4, 0x90, 0xA2, 0x93, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, ++0xE0, 0x90, 0xA2, 0x95, 0xF0, 0x7D, 0x47, 0x7F, 0xFF, 0x12, 0x4B, 0x17, 0x90, 0x05, 0xF8, 0xE0, ++0x70, 0x11, 0xA3, 0xE0, 0x70, 0x0D, 0xA3, 0xE0, 0x70, 0x09, 0xA3, 0xE0, 0x70, 0x05, 0x91, 0x18, ++0x7F, 0x01, 0x22, 0x12, 0x4F, 0xEC, 0x30, 0xE0, 0x15, 0xD3, 0x90, 0xA2, 0x94, 0xE0, 0x94, 0x03, ++0x90, 0xA2, 0x93, 0xE0, 0x94, 0x00, 0x40, 0x02, 0x80, 0x13, 0x7F, 0x01, 0x80, 0x1D, 0xD3, 0x90, ++0xA2, 0x94, 0xE0, 0x94, 0xE8, 0x90, 0xA2, 0x93, 0xE0, 0x94, 0x03, 0x40, 0x0C, 0x90, 0x01, 0xC0, ++0xE0, 0x44, 0x20, 0xF0, 0x91, 0x18, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x3E, 0x50, ++0x90, 0xA2, 0x93, 0x12, 0x4F, 0xDE, 0x80, 0xA4, 0x90, 0xA2, 0x95, 0xE0, 0xFF, 0x7D, 0x48, 0x02, ++0x4B, 0x17, 0x8F, 0x54, 0x71, 0x9F, 0x75, 0xF0, 0x0E, 0xE5, 0x54, 0xF1, 0x40, 0xE0, 0xFC, 0x91, ++0x47, 0x91, 0x53, 0x91, 0x47, 0x12, 0x5C, 0x9B, 0x75, 0xF0, 0x0E, 0xE5, 0x54, 0x12, 0x4B, 0x05, ++0xAD, 0x54, 0x7F, 0x01, 0x02, 0x4C, 0x25, 0x75, 0xF0, 0x0E, 0xE5, 0x54, 0x90, 0xA0, 0x1B, 0x22, ++0x90, 0xA0, 0x45, 0x12, 0x45, 0x8A, 0xE0, 0xFE, 0x54, 0x03, 0xFD, 0xEE, 0x13, 0x13, 0x54, 0x07, ++0xFB, 0x90, 0xA0, 0x17, 0xE0, 0xFE, 0xC4, 0x54, 0x0F, 0x90, 0xA2, 0x77, 0xF0, 0xAF, 0x04, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x74, 0xEF, 0xF0, 0xED, 0x64, 0x01, 0x70, 0x2E, ++0xEB, 0xB4, 0x01, 0x07, 0xE0, 0x24, 0x02, 0xF5, 0x70, 0x80, 0x08, 0x90, 0xA2, 0x74, 0xE0, 0x24, ++0xFE, 0xF5, 0x70, 0x90, 0xA1, 0xB1, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0xFF, 0xAF, 0x70, 0x91, ++0xD9, 0xB1, 0x60, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0xFF, 0xAF, 0x70, 0x80, 0x20, 0x90, 0xA1, ++0xB1, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0xFF, 0x90, 0xA2, 0x74, 0x12, 0x5F, 0xD8, 0x91, 0xDD, ++0xB1, 0x60, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0xFF, 0x90, 0xA2, 0x74, 0xE0, 0xFF, 0x91, 0xD9, ++0x7F, 0x01, 0x91, 0xE8, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xFC, 0xFD, 0xFE, 0x90, 0xA1, 0xB5, ++0x12, 0x08, 0x6D, 0x7D, 0x18, 0x7C, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0xA1, 0xAF, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0xA1, 0xAE, 0xEF, 0xF0, 0xA3, 0xA3, 0xE0, 0xFD, ++0x12, 0x3E, 0x02, 0x90, 0xA1, 0xB9, 0x12, 0x08, 0x6D, 0x90, 0xA1, 0xB1, 0x12, 0x45, 0x72, 0x12, ++0x08, 0x3A, 0x90, 0xA1, 0xB9, 0x12, 0x5F, 0xAE, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0xA1, 0xB1, 0x12, 0x45, 0x72, 0x90, 0xA1, 0xB5, 0x12, 0x5F, 0xAE, 0xD0, 0x03, 0xD0, 0x02, ++0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x54, 0x90, 0xA1, 0xBD, 0x12, 0x08, 0x6D, 0x90, 0xA1, 0xAF, ++0xA3, 0xE0, 0xFD, 0xC0, 0x05, 0x90, 0xA1, 0xBD, 0x12, 0x45, 0x72, 0x90, 0xAA, 0x96, 0x12, 0x08, ++0x6D, 0x90, 0xA1, 0xAE, 0xE0, 0xFF, 0xD0, 0x05, 0x12, 0x3D, 0x09, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0xE4, 0xFF, 0x91, 0xE8, 0x90, 0xA1, 0xB1, 0x22, 0x8F, 0x55, 0x90, 0x05, 0x22, 0xE0, 0x90, 0xA1, ++0x63, 0xF0, 0x71, 0x9F, 0xEF, 0x64, 0x01, 0x70, 0x43, 0x75, 0xF0, 0x13, 0xE5, 0x55, 0xB1, 0xCE, ++0xE0, 0xFC, 0x75, 0xF0, 0x13, 0xE5, 0x55, 0x91, 0x50, 0x75, 0xF0, 0x13, 0xE5, 0x55, 0x12, 0x5C, ++0x98, 0x12, 0x4F, 0xD5, 0x20, 0xE0, 0x1B, 0x75, 0xF0, 0x13, 0xE5, 0x55, 0xF1, 0x5D, 0xFF, 0x60, ++0x03, 0xBF, 0x02, 0x0E, 0x75, 0xF0, 0x13, 0xE5, 0x55, 0x12, 0x4E, 0xD0, 0xE4, 0xFB, 0xFD, 0x12, ++0x4B, 0x26, 0xAD, 0x55, 0x7F, 0x01, 0x12, 0xA9, 0xD2, 0x7F, 0x01, 0x22, 0x90, 0xA1, 0x63, 0xE0, ++0xFF, 0x7D, 0x49, 0x12, 0x4B, 0x17, 0x7F, 0x00, 0x22, 0x75, 0xF0, 0x13, 0xE5, 0x6C, 0x90, 0xA0, ++0x44, 0x02, 0x45, 0x8A, 0x90, 0xA1, 0x85, 0xEF, 0xF0, 0x7F, 0x03, 0x12, 0x4E, 0xDB, 0x12, 0x8F, ++0xB1, 0x90, 0x9F, 0xC6, 0x30, 0xE0, 0x05, 0x74, 0x05, 0xF0, 0x80, 0x03, 0xE0, 0x04, 0xF0, 0x90, ++0x9F, 0xB7, 0x12, 0x87, 0xAA, 0x20, 0xE0, 0x09, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, ++0x38, 0x12, 0x8F, 0xB1, 0x30, 0xE0, 0x0A, 0x90, 0x9F, 0xB4, 0xE0, 0xFF, 0x90, 0x9F, 0xC4, 0x80, ++0x21, 0x90, 0xA1, 0x85, 0xE0, 0xFC, 0xB4, 0x01, 0x0D, 0x90, 0x9F, 0xB4, 0xE0, 0xFE, 0x90, 0x9F, ++0xC3, 0xE0, 0xC3, 0x9E, 0x80, 0x0F, 0xEC, 0xB4, 0x04, 0x0F, 0x90, 0x9F, 0xB5, 0xE0, 0xFF, 0x90, ++0x9F, 0xC3, 0xE0, 0xC3, 0x9F, 0x90, 0x9F, 0xCA, 0xF0, 0x12, 0x8F, 0xB9, 0x30, 0xE0, 0x22, 0x12, ++0x8F, 0x9A, 0x54, 0x07, 0x20, 0xE0, 0x02, 0xC1, 0xE1, 0xF1, 0x2A, 0x50, 0x0A, 0xEF, 0x25, 0xE0, ++0x25, 0xE0, 0xFB, 0xE4, 0xFD, 0x80, 0x05, 0x7B, 0x7F, 0x7D, 0xFF, 0xE4, 0xFF, 0x71, 0x35, 0xC1, ++0xE1, 0x90, 0x9F, 0xB3, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x48, 0xF1, 0x33, 0xFD, 0x7F, 0x04, ++0x12, 0x63, 0x1A, 0x12, 0x4F, 0xEC, 0x30, 0xE0, 0x3A, 0x90, 0x9F, 0xBA, 0xE0, 0x44, 0x02, 0xF0, ++0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x9F, 0xC9, 0xF0, 0x90, 0x9F, 0xC6, 0xF0, 0x90, 0xA1, 0x85, 0xE0, ++0xFF, 0xB4, 0x01, 0x08, 0x90, 0x9F, 0xBB, 0x74, 0x06, 0xF0, 0x80, 0x0A, 0xEF, 0xB4, 0x04, 0x06, ++0x90, 0x9F, 0xBB, 0x74, 0x07, 0xF0, 0x90, 0x9F, 0xA5, 0xE0, 0x60, 0x07, 0x90, 0x9F, 0xBA, 0xE0, ++0x44, 0x04, 0xF0, 0x90, 0xA1, 0x85, 0xE0, 0xB4, 0x01, 0x0C, 0x12, 0x4E, 0xC4, 0x30, 0xE0, 0x02, ++0x80, 0x11, 0x7D, 0x06, 0x80, 0x16, 0x90, 0xA1, 0x85, 0xE0, 0xB4, 0x04, 0x14, 0x12, 0x4E, 0xC4, ++0x30, 0xE0, 0x07, 0x7F, 0x02, 0x12, 0x4F, 0xB7, 0x80, 0x07, 0x7D, 0x0C, 0x7F, 0x6F, 0x12, 0x4B, ++0x17, 0x90, 0x9F, 0xB7, 0x12, 0x77, 0x6B, 0x30, 0xE0, 0x25, 0x90, 0x9F, 0xCA, 0xE0, 0xFE, 0xC3, ++0x94, 0x20, 0x50, 0x0F, 0xEE, 0x7D, 0x00, 0x25, 0xE0, 0x25, 0xE0, 0xFC, 0x90, 0x9E, 0x38, 0xE0, ++0xFF, 0x80, 0x09, 0x90, 0x9E, 0x38, 0xE0, 0xFF, 0x7D, 0xFF, 0x7C, 0x7F, 0x12, 0x76, 0xC9, 0x90, ++0x9F, 0xB6, 0xE0, 0x30, 0xE0, 0x0B, 0x12, 0x4E, 0xBF, 0x30, 0xE0, 0x05, 0x7F, 0x01, 0x12, 0x4F, ++0xB7, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x90, 0x9F, 0xCA, 0xE0, 0xFF, 0xC3, ++0x94, 0x20, 0x22, 0x90, 0x9F, 0xB9, 0xE0, 0x54, 0xDF, 0xF0, 0xE4, 0x22, 0xFD, 0x75, 0xF0, 0x0E, ++0x90, 0xA0, 0x1A, 0x02, 0x45, 0x8A, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x22, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x22, 0x75, 0xF0, 0x13, 0x90, 0xA0, 0x47, ++0x12, 0x45, 0x8A, 0xE0, 0x54, 0x07, 0x22, 0x90, 0xA0, 0xB6, 0x12, 0x4F, 0xEF, 0x30, 0xE0, 0x1A, ++0x90, 0xA0, 0x17, 0xE0, 0xFF, 0x30, 0xE0, 0x12, 0xC3, 0x13, 0x54, 0x07, 0xF1, 0x5A, 0xFE, 0xF1, ++0x8B, 0xEE, 0x60, 0x03, 0xB4, 0x02, 0x03, 0x12, 0x48, 0x46, 0x22, 0x12, 0x49, 0x81, 0x12, 0x4A, ++0x0B, 0x20, 0xE0, 0x0C, 0xC3, 0x13, 0x30, 0xE0, 0x10, 0x90, 0xA0, 0x19, 0x74, 0x05, 0xF0, 0x22, ++0x12, 0x49, 0x81, 0x12, 0x4A, 0x0B, 0x44, 0x04, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x0A, 0x7D, 0x00, ++0x7B, 0x01, 0x7A, 0x9F, 0x79, 0xDB, 0x12, 0x08, 0xAA, 0x90, 0x9F, 0xC7, 0x74, 0x02, 0xF0, 0x22, ++0x8B, 0x51, 0x8A, 0x52, 0x89, 0x53, 0x12, 0x5F, 0x0D, 0xFF, 0xF5, 0x55, 0x12, 0x06, 0x89, 0xFE, ++0xC3, 0x13, 0x30, 0xE0, 0x07, 0x12, 0x57, 0xB9, 0xF5, 0x56, 0x80, 0x02, 0x8F, 0x56, 0x85, 0x55, ++0x54, 0xE5, 0x54, 0xD3, 0x95, 0x56, 0x50, 0x23, 0x12, 0x6D, 0x10, 0x12, 0x06, 0x89, 0x54, 0x01, ++0xFD, 0xAF, 0x54, 0x12, 0x69, 0x9E, 0xAF, 0x54, 0x12, 0x67, 0x35, 0xEF, 0xAF, 0x54, 0x70, 0x04, ++0x11, 0xB9, 0x80, 0x03, 0x12, 0x7F, 0xD4, 0x05, 0x54, 0x80, 0xD6, 0xE5, 0x55, 0x70, 0x10, 0xFF, ++0x12, 0x67, 0x35, 0xEF, 0x70, 0x09, 0x12, 0x67, 0x75, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01, ++0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, 0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, ++0x90, 0x9F, 0xA4, 0x12, 0x77, 0x6B, 0x30, 0xE0, 0x05, 0x7F, 0x03, 0x12, 0x8A, 0xA3, 0x90, 0x9F, ++0xCE, 0xE0, 0x20, 0xE0, 0x38, 0x12, 0x8F, 0xA1, 0x13, 0x30, 0xE0, 0x31, 0x90, 0x9F, 0xF5, 0xE0, ++0x60, 0x07, 0xE4, 0x90, 0xA2, 0x9D, 0xF0, 0x80, 0x06, 0x90, 0xA2, 0x9D, 0x74, 0x01, 0xF0, 0xEF, ++0xC4, 0x13, 0x54, 0x07, 0x90, 0xA2, 0x9E, 0x30, 0xE0, 0x05, 0x74, 0x01, 0xF0, 0x80, 0x03, 0x74, ++0x02, 0xF0, 0x90, 0xA2, 0x9D, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x12, 0x5B, 0x20, 0x11, 0xB2, 0x44, ++0x01, 0xFD, 0x7F, 0x02, 0x12, 0x46, 0x81, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x54, 0xFE, 0xFD, 0x7F, ++0x02, 0x12, 0x46, 0x81, 0x7F, 0x02, 0x12, 0x47, 0x84, 0xEF, 0x44, 0x01, 0xFD, 0x7F, 0x02, 0x12, ++0x46, 0x81, 0x7F, 0x02, 0x12, 0x47, 0x84, 0xEF, 0x22, 0x7D, 0x01, 0x02, 0x7F, 0x62, 0x11, 0x20, ++0x02, 0x6F, 0xD7, 0x11, 0x20, 0x7D, 0x24, 0x02, 0x4F, 0xF8, 0x12, 0x06, 0x89, 0xFF, 0x90, 0x9F, ++0x26, 0xF0, 0xBF, 0x01, 0x08, 0x12, 0x86, 0xF7, 0xE4, 0x90, 0x9F, 0x26, 0xF0, 0x22, 0x12, 0x06, ++0x89, 0x54, 0x01, 0xFF, 0x90, 0xA0, 0xC1, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22, 0x12, 0x06, 0x89, ++0x90, 0x9F, 0xA5, 0xF0, 0x60, 0x2C, 0x90, 0x9F, 0xB3, 0xE0, 0x20, 0xE0, 0x25, 0xE4, 0xFD, 0x7F, ++0x04, 0x12, 0x63, 0x1A, 0x12, 0x8F, 0xA1, 0x13, 0x30, 0xE0, 0x17, 0xEF, 0x13, 0x13, 0x13, 0x54, ++0x1F, 0x20, 0xE0, 0x0E, 0x31, 0x23, 0x30, 0xE0, 0x04, 0x7F, 0x0D, 0x80, 0x02, 0x7F, 0x09, 0x12, ++0x8A, 0xA3, 0x22, 0x90, 0x9F, 0xA4, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x31, 0x4C, 0x90, 0x9F, ++0xA6, 0x31, 0x86, 0x12, 0x5F, 0x0C, 0x90, 0x9F, 0xA7, 0x12, 0x57, 0xB8, 0x90, 0x9F, 0xA8, 0xF0, ++0x31, 0x7C, 0x90, 0x9F, 0xA6, 0xE0, 0x54, 0x01, 0xFF, 0x02, 0x65, 0x89, 0x12, 0x06, 0x89, 0xFF, ++0x54, 0x01, 0xFE, 0x22, 0x31, 0x4C, 0x90, 0x9F, 0xAA, 0xE0, 0x54, 0xFE, 0x4E, 0xF0, 0xEF, 0x54, ++0x02, 0x31, 0x75, 0x90, 0x9F, 0x3D, 0xE0, 0x54, 0xEF, 0x4F, 0xF0, 0x90, 0x9F, 0xAA, 0xE0, 0x54, ++0x01, 0xFF, 0x02, 0x61, 0x27, 0x33, 0x33, 0x33, 0x54, 0xF8, 0xFF, 0x22, 0x90, 0x9F, 0xA7, 0xE0, ++0x14, 0x90, 0x9F, 0xA9, 0xF0, 0x22, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF, ++0xEE, 0x54, 0xFD, 0x4F, 0x22, 0x12, 0x06, 0x89, 0x54, 0x01, 0x31, 0x75, 0x90, 0x9F, 0xD8, 0xE0, ++0x54, 0xF7, 0x4F, 0xF0, 0x12, 0x77, 0x6B, 0x90, 0x07, 0x65, 0x30, 0xE0, 0x04, 0x74, 0x18, 0xF0, ++0x22, 0xE4, 0xF0, 0x22, 0x90, 0x9F, 0xDB, 0xE0, 0x44, 0x04, 0xF0, 0x7D, 0x01, 0x7F, 0x23, 0x12, ++0x57, 0xF0, 0x8F, 0x51, 0xE5, 0x51, 0xB4, 0x03, 0x0A, 0xE4, 0xFF, 0x12, 0x91, 0xF8, 0x7F, 0x04, ++0x12, 0x83, 0x59, 0x22, 0x90, 0x9F, 0xDB, 0xE0, 0x44, 0x10, 0xF0, 0x7D, 0x01, 0x7F, 0x1B, 0x12, ++0x57, 0xF0, 0x90, 0xA1, 0x5B, 0xEF, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0x9F, 0xDC, 0xE0, 0x44, 0x01, 0xF0, 0x7D, 0x01, 0x7F, 0x28, 0x31, 0xDF, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x12, 0x5F, 0x5F, 0x90, 0xA2, 0x8A, 0xE0, 0x70, 0x08, 0x51, 0x52, 0x90, 0xA2, 0x8A, 0x74, ++0x01, 0xF0, 0x12, 0x59, 0x08, 0x12, 0x06, 0x89, 0xFF, 0xE4, 0x8F, 0x54, 0xF5, 0x53, 0xF5, 0x52, ++0xF5, 0x51, 0x90, 0x9F, 0xED, 0x12, 0x45, 0x72, 0xEC, 0x54, 0xC1, 0xFC, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0xAF, 0x54, 0xAE, 0x53, 0xAD, 0x52, 0xAC, 0x51, 0x78, 0x19, 0x12, 0x08, ++0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x54, 0x90, 0x9F, 0xE9, 0x02, ++0x08, 0x6D, 0x7F, 0x80, 0x7E, 0x08, 0x12, 0x37, 0x4E, 0x90, 0x9F, 0xED, 0x02, 0x08, 0x6D, 0x12, ++0x06, 0x89, 0x90, 0x9F, 0xF5, 0x12, 0x5F, 0x0C, 0x90, 0x9F, 0xF6, 0xF0, 0x22, 0x12, 0x5F, 0x5F, ++0x12, 0x59, 0x08, 0x51, 0xEF, 0x7A, 0xA0, 0x79, 0x02, 0x12, 0x35, 0x26, 0x90, 0xA0, 0x04, 0x51, ++0xE4, 0xEF, 0x78, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0xA0, 0x0C, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA0, 0x05, 0x51, 0xE4, 0xEF, 0x78, 0x05, 0xCE, 0xC3, 0x13, 0xCE, ++0x13, 0xD8, 0xF9, 0xFF, 0x90, 0xA0, 0x0E, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA0, 0x06, 0x51, ++0xE4, 0x90, 0xA0, 0x10, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA0, 0x02, 0xE0, 0x30, 0xE0, 0x14, ++0x90, 0xA0, 0x07, 0x74, 0x01, 0xF0, 0xA3, 0xF0, 0xA3, 0x12, 0x97, 0x0E, 0x90, 0x07, 0x83, 0xE0, ++0x44, 0x20, 0xF0, 0x22, 0xE4, 0x90, 0xA0, 0x07, 0xF0, 0x12, 0x60, 0xF7, 0x90, 0x07, 0x83, 0xE0, ++0x54, 0xDF, 0xF0, 0x22, 0xE0, 0xFF, 0x7E, 0x00, 0x7C, 0x01, 0x7D, 0x40, 0x02, 0x07, 0x03, 0x8B, ++0x40, 0x8A, 0x41, 0x89, 0x42, 0x75, 0x43, 0x05, 0x7B, 0x01, 0x22, 0x12, 0x06, 0x89, 0x54, 0x01, ++0x25, 0xE0, 0x12, 0x97, 0x7D, 0x54, 0xFB, 0x4F, 0xF0, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, ++0x02, 0x80, 0x12, 0x90, 0x9F, 0xFC, 0xE0, 0x20, 0xE0, 0x02, 0x71, 0x1D, 0x22, 0x90, 0x07, 0x65, ++0xE0, 0x54, 0xE7, 0xF0, 0x22, 0x90, 0x07, 0x65, 0xE0, 0x44, 0x18, 0xF0, 0x22, 0x12, 0x5F, 0x5F, ++0x12, 0x59, 0x08, 0x71, 0xA4, 0x7A, 0xA0, 0x79, 0x14, 0x12, 0x35, 0x26, 0x90, 0xA0, 0x14, 0xE0, ++0x30, 0xE0, 0x55, 0x90, 0x00, 0x40, 0xE0, 0x54, 0xBF, 0x44, 0xA0, 0xFD, 0x7F, 0x40, 0x12, 0x46, ++0x81, 0x90, 0x00, 0x41, 0xE0, 0x44, 0x04, 0xFD, 0x7F, 0x41, 0x12, 0x46, 0x81, 0x90, 0x00, 0x6A, ++0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x6A, 0x12, 0x46, 0x81, 0x90, 0x07, 0x6E, 0x74, 0x55, 0xF0, 0xA3, ++0x74, 0x12, 0xF0, 0x90, 0x07, 0x78, 0xE0, 0x54, 0xF2, 0x44, 0x02, 0xF0, 0x90, 0x06, 0xCC, 0xE0, ++0x44, 0x03, 0xF0, 0x90, 0x07, 0x65, 0xE0, 0x54, 0xF5, 0xF0, 0x90, 0x05, 0x23, 0xE0, 0x54, 0x7F, ++0xF0, 0xE4, 0xFD, 0x7F, 0x66, 0x12, 0x46, 0x81, 0x12, 0x4E, 0xC4, 0x20, 0xE0, 0x05, 0x7F, 0x01, ++0x12, 0x4F, 0xB7, 0x22, 0x8B, 0x40, 0x8A, 0x41, 0x89, 0x42, 0x75, 0x43, 0x01, 0x7B, 0x01, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9E, 0x8B, 0xE0, 0xFF, 0x90, 0x9E, 0x8A, 0xE0, ++0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x3A, 0x90, 0x9E, 0x8A, 0xE0, ++0xFE, 0x91, 0x0B, 0xE0, 0xFD, 0xEE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x3B, 0xF9, 0x74, 0x9E, 0x35, ++0xF0, 0xFA, 0x7B, 0x01, 0xAF, 0x05, 0x12, 0x54, 0x0B, 0x90, 0x9E, 0x8A, 0x12, 0x87, 0xA0, 0xB4, ++0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x9E, 0x8A, 0xF0, 0x12, 0x81, 0xF0, 0x90, ++0x9E, 0x02, 0xE0, 0x44, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, 0xF0, 0x08, 0x90, 0x9E, ++0x3A, 0x02, 0x45, 0x8A, 0xE4, 0x90, 0x9F, 0x22, 0xF0, 0xA3, 0xF0, 0x90, 0x9E, 0x8A, 0xF0, 0xA3, ++0xF0, 0x22, 0xE4, 0xFC, 0xED, 0x2C, 0x24, 0x00, 0x91, 0x73, 0xE4, 0xF0, 0x0C, 0xEC, 0xB4, 0x18, ++0xF3, 0x74, 0x00, 0x2D, 0x91, 0x73, 0xEF, 0xF0, 0xEE, 0x54, 0x3F, 0xFF, 0x74, 0x01, 0x2D, 0xF5, ++0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x02, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, ++0xF5, 0x83, 0xE0, 0x54, 0xF0, 0xF0, 0x74, 0x03, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, ++0xE0, 0x44, 0x80, 0xF0, 0x74, 0x0B, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x44, ++0x10, 0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0x22, 0x90, 0xA2, 0x68, 0xEF, 0xF0, ++0xA3, 0x12, 0x45, 0x9F, 0x90, 0xA2, 0x8C, 0xE0, 0xFE, 0x04, 0xF0, 0x90, 0x00, 0x01, 0xEE, 0x12, ++0x06, 0xE1, 0x74, 0x00, 0x2F, 0xF9, 0xE4, 0x34, 0xFB, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, ++0xC0, 0x01, 0x90, 0xA2, 0x69, 0x12, 0x45, 0x96, 0x8B, 0x40, 0x8A, 0x41, 0x89, 0x42, 0x75, 0x43, ++0x02, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x35, 0x26, 0x90, 0xA2, 0x68, 0xE0, 0x24, 0x02, ++0xF9, 0xE4, 0x34, 0xFB, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0xA3, 0x12, 0x45, ++0x96, 0xE9, 0x24, 0x02, 0xF9, 0xE4, 0x3A, 0x8B, 0x40, 0xF5, 0x41, 0x89, 0x42, 0x90, 0xA2, 0x69, ++0x12, 0x97, 0x85, 0xF5, 0x43, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x02, 0x35, 0x26, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFF, 0x90, 0x9F, 0x23, 0xE0, 0xFE, 0x90, 0x9F, 0x22, 0xE0, ++0xFD, 0xB5, 0x06, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x64, 0x01, 0x60, 0x40, 0xED, ++0xB1, 0x54, 0xFA, 0x7B, 0x01, 0x12, 0x97, 0x15, 0x7F, 0x01, 0xEF, 0x60, 0x32, 0x90, 0x9F, 0x22, ++0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x0A, 0x02, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x05, 0xE4, 0x90, ++0x9F, 0x22, 0xF0, 0x90, 0x9F, 0x23, 0xE0, 0xFF, 0x90, 0x9F, 0x22, 0xE0, 0xB5, 0x07, 0x04, 0x7F, ++0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x07, 0x90, 0x9E, 0x02, 0xE0, 0x44, 0x04, 0xF0, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0x8C, 0xF9, 0x74, 0x9E, 0x35, 0xF0, 0x22, ++0x90, 0x00, 0xF1, 0xE0, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x22, 0x75, 0x15, 0x12, 0xE4, 0xF5, ++0x16, 0x75, 0x17, 0x07, 0x75, 0x18, 0x32, 0x90, 0x01, 0x30, 0xE5, 0x15, 0xF0, 0xA3, 0xE5, 0x16, ++0xF0, 0xA3, 0xE5, 0x17, 0xF0, 0xA3, 0xE5, 0x18, 0xF0, 0x22, 0x75, 0x1D, 0x06, 0x43, 0x1D, 0x10, ++0x75, 0x1E, 0x01, 0x75, 0x1F, 0x13, 0x75, 0x20, 0x62, 0x43, 0x20, 0x80, 0x43, 0x1F, 0x04, 0x90, ++0x01, 0x38, 0xE5, 0x1D, 0xF0, 0xA3, 0xE5, 0x1E, 0xF0, 0xA3, 0xE5, 0x1F, 0xF0, 0xA3, 0xE5, 0x20, ++0xF0, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22, 0x7F, ++0x02, 0x90, 0xA0, 0x15, 0xE0, 0xFE, 0xEF, 0xC3, 0x9E, 0x50, 0x10, 0xEF, 0x25, 0xE0, 0x24, 0x81, ++0xF8, 0xE6, 0x30, 0xE4, 0x03, 0x7F, 0x00, 0x22, 0x0F, 0x80, 0xE6, 0x7F, 0x01, 0x22, 0xE4, 0x90, ++0x9E, 0x02, 0xF0, 0x02, 0x60, 0xF7, 0x90, 0x01, 0xE4, 0x74, 0x27, 0xF0, 0xA3, 0xE4, 0xF0, 0x22, ++0x90, 0x01, 0x34, 0xE0, 0x55, 0x15, 0xF5, 0x19, 0xA3, 0xE0, 0x55, 0x16, 0xF5, 0x1A, 0xA3, 0xE0, ++0x55, 0x17, 0xF5, 0x1B, 0xA3, 0xE0, 0x55, 0x18, 0xF5, 0x1C, 0x90, 0x01, 0x34, 0xE5, 0x19, 0xF0, ++0xA3, 0xE5, 0x1A, 0xF0, 0xA3, 0xE5, 0x1B, 0xF0, 0xA3, 0xE5, 0x1C, 0xF0, 0x22, 0x90, 0x01, 0x3C, ++0xE0, 0x55, 0x1D, 0xF5, 0x21, 0xA3, 0xE0, 0x55, 0x1E, 0xF5, 0x22, 0xA3, 0xE0, 0x55, 0x1F, 0xF5, ++0x23, 0xA3, 0xE0, 0x55, 0x20, 0xF5, 0x24, 0x90, 0x01, 0x3C, 0xE5, 0x21, 0xF0, 0xA3, 0xE5, 0x22, ++0xF0, 0xA3, 0xE5, 0x23, 0xF0, 0xA3, 0xE5, 0x24, 0xF0, 0x53, 0x91, 0xDF, 0x22, 0x90, 0x01, 0xCF, ++0xE0, 0x90, 0xA1, 0x75, 0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xFE, ++0xF0, 0xEF, 0x30, 0xE5, 0x23, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, ++0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8, 0x12, 0x60, 0xCB, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, ++0xFD, 0x7F, 0x03, 0x12, 0x46, 0x81, 0x80, 0xFE, 0x22, 0x90, 0x9F, 0x38, 0xE0, 0x30, 0xE0, 0x05, ++0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x9F, 0x38, 0xE0, 0xFF, 0x30, 0xE0, 0x04, 0xD1, 0xB8, ++0x60, 0x15, 0x90, 0x9F, 0x42, 0xE0, 0x70, 0x04, 0xEF, 0x30, 0xE0, 0x0B, 0x90, 0x9F, 0x45, 0xE0, ++0x64, 0x02, 0x60, 0x03, 0x12, 0x65, 0xD4, 0x22, 0x90, 0x9F, 0x3C, 0xE0, 0x64, 0x02, 0x22, 0x90, ++0x9F, 0x38, 0x12, 0x6C, 0xFC, 0x30, 0xE0, 0x0B, 0xD1, 0xB8, 0x60, 0x07, 0x7D, 0x01, 0x7F, 0x02, ++0x12, 0x63, 0x1A, 0xD1, 0xB8, 0x60, 0x02, 0xD1, 0xDA, 0x22, 0x90, 0x9F, 0x42, 0xE0, 0x64, 0x02, ++0x60, 0x10, 0x12, 0x71, 0x18, 0x60, 0x0B, 0xF1, 0x3D, 0xEF, 0x70, 0x06, 0xFD, 0x7F, 0x0C, 0x12, ++0x63, 0x1A, 0x22, 0x90, 0x9F, 0x38, 0xE0, 0xFF, 0x30, 0xE0, 0x3F, 0x90, 0x9F, 0x3C, 0xE0, 0x7E, ++0x00, 0xB4, 0x02, 0x02, 0x7E, 0x01, 0x90, 0x9F, 0x3B, 0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, ++0x01, 0xED, 0x4E, 0x70, 0x25, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x04, 0xF1, 0x5F, 0x80, 0x1B, 0xD1, ++0xBF, 0x90, 0x9F, 0x3C, 0xE0, 0xB4, 0x08, 0x06, 0xE4, 0xFD, 0x7F, 0x0C, 0x80, 0x09, 0x90, 0x9F, ++0x3C, 0xE0, 0x70, 0x06, 0xFD, 0x7F, 0x04, 0x12, 0x63, 0x1A, 0x02, 0x9F, 0x67, 0x90, 0x04, 0x1A, ++0xE0, 0xF4, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x04, 0x1B, 0xE0, 0x54, 0x07, 0x64, 0x07, 0x7F, ++0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0xF1, 0x3D, 0xEF, 0x70, 0x03, 0x12, 0x67, 0x90, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x6E, 0xF2, 0xBF, 0x01, 0x04, 0x7F, 0x01, 0x80, 0x02, ++0x7F, 0x02, 0x12, 0x6C, 0x13, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x9F, 0x42, 0xE0, 0x70, 0x07, ++0x90, 0x9F, 0x38, 0xE0, 0x30, 0xE0, 0x12, 0x90, 0x9F, 0x38, 0xE0, 0x30, 0xE0, 0x08, 0x12, 0x6E, ++0xF2, 0xBF, 0x01, 0x05, 0xC1, 0xDA, 0x12, 0x67, 0x90, 0x22, 0x90, 0x9F, 0x42, 0xE0, 0x60, 0x03, ++0x12, 0x71, 0x30, 0x12, 0x4B, 0x6D, 0x02, 0x48, 0x46, 0x90, 0x9F, 0x38, 0xE0, 0xFF, 0x30, 0xE0, ++0x41, 0x90, 0x9F, 0x3C, 0xE0, 0x7E, 0x00, 0xB4, 0x02, 0x02, 0x7E, 0x01, 0x90, 0x9F, 0x3B, 0xE0, ++0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, 0x4E, 0x70, 0x27, 0xEF, 0xC3, 0x13, 0x30, 0xE0, ++0x04, 0xF1, 0x5F, 0x80, 0x1D, 0x12, 0x77, 0x7E, 0x90, 0x9F, 0x3C, 0xE0, 0xB4, 0x0C, 0x06, 0xE4, ++0xFD, 0x7F, 0x08, 0x80, 0x0A, 0x90, 0x9F, 0x3C, 0xE0, 0xB4, 0x04, 0x06, 0xE4, 0xFD, 0xFF, 0x12, ++0x63, 0x1A, 0x02, 0x4F, 0x4B, 0x90, 0xA0, 0x17, 0xE0, 0x30, 0xE0, 0x11, 0x90, 0xA0, 0xB5, 0x12, ++0x57, 0xA5, 0x30, 0xE0, 0x08, 0xA3, 0xE0, 0x44, 0x20, 0xF0, 0x44, 0x40, 0xF0, 0x22, 0x90, 0x9F, ++0x3D, 0x12, 0x6C, 0xFC, 0x30, 0xE0, 0x25, 0xEF, 0x54, 0xBF, 0x11, 0x3D, 0x30, 0xE0, 0x06, 0xE0, ++0x44, 0x01, 0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFE, 0xF0, 0x90, 0x9F, 0xB9, 0x12, 0x87, 0xAA, 0x30, ++0xE0, 0x07, 0x7D, 0x01, 0x7F, 0x0C, 0x02, 0x63, 0x1A, 0x12, 0x70, 0x34, 0x22, 0xF0, 0x90, 0x04, ++0xE0, 0xE0, 0x90, 0x9F, 0x3E, 0x22, 0x90, 0x9F, 0x3D, 0xE0, 0xFF, 0x12, 0x57, 0xA6, 0x30, 0xE0, ++0x1B, 0xEF, 0x54, 0x7F, 0x11, 0x3D, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x04, 0xE0, ++0x54, 0xFD, 0xF0, 0x90, 0x9F, 0x42, 0xE0, 0x60, 0x03, 0x12, 0x70, 0x34, 0x90, 0x9F, 0xB7, 0x12, ++0x6C, 0xFC, 0x30, 0xE0, 0x22, 0x90, 0x9F, 0xBA, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x18, 0xEF, ++0x54, 0xFD, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, 0x9F, 0xBA, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x04, ++0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x30, 0xE1, 0x05, 0x11, 0xA4, ++0x12, 0x49, 0x8A, 0x22, 0x90, 0xA0, 0x16, 0xE0, 0x30, 0xE0, 0x1F, 0xA3, 0xE0, 0xC3, 0x13, 0x54, ++0x07, 0x11, 0xCB, 0xE0, 0xFE, 0x30, 0xE0, 0x12, 0x75, 0xF0, 0x0E, 0xEF, 0x11, 0xCF, 0xEE, 0x54, ++0xFE, 0x12, 0x49, 0x7A, 0xFD, 0x7F, 0x02, 0x12, 0x4C, 0x25, 0x22, 0xFF, 0x75, 0xF0, 0x0E, 0x90, ++0xA0, 0x22, 0x02, 0x45, 0x8A, 0xE4, 0x90, 0xA1, 0x87, 0xF0, 0xA3, 0xF0, 0x7F, 0x83, 0x12, 0x47, ++0x84, 0x90, 0xA1, 0x86, 0xEF, 0xF0, 0x7F, 0x83, 0x12, 0x47, 0x84, 0xAE, 0x07, 0x90, 0xA1, 0x86, ++0xE0, 0xFF, 0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0xA1, 0x88, 0xE0, 0x94, 0x64, 0x90, 0xA1, 0x87, ++0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0xA1, 0x86, 0xE0, ++0xFF, 0x22, 0x90, 0xA1, 0x87, 0x12, 0x4F, 0xDE, 0x80, 0xC2, 0x90, 0x01, 0xC4, 0x74, 0x1A, 0xF0, ++0x74, 0xA9, 0xA3, 0xF0, 0x7F, 0x90, 0x12, 0x47, 0x84, 0xEF, 0x20, 0xE0, 0xF7, 0x74, 0x1A, 0x04, ++0x90, 0x01, 0xC4, 0xF0, 0x74, 0xA9, 0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0xA2, 0xA1, 0xEF, 0xF0, 0x7F, 0x8F, 0x12, 0x47, 0x84, 0xEF, 0x30, 0xE6, 0x41, 0x7F, 0x8D, ++0x12, 0x47, 0x84, 0xEF, 0x64, 0x01, 0x70, 0x37, 0x90, 0xA2, 0xA2, 0xF0, 0x90, 0xA2, 0xA2, 0xE0, ++0xFD, 0x90, 0xA2, 0xA1, 0xE0, 0x75, 0xF0, 0x10, 0x12, 0x7F, 0x5C, 0xE5, 0x82, 0x2D, 0x12, 0x55, ++0x65, 0xE0, 0xFB, 0xE4, 0xFF, 0x12, 0x50, 0xF3, 0x90, 0xA2, 0xA2, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, ++0x94, 0x10, 0x40, 0xD8, 0x7F, 0x8F, 0x12, 0x47, 0x84, 0xEF, 0x30, 0xE0, 0x02, 0x31, 0x94, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xFD, 0x7F, 0x8D, 0x02, 0x46, 0x81, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0xE4, 0xFE, 0xFD, 0xEF, 0xB4, 0x01, 0x0D, 0xEB, 0xB4, 0x02, 0x03, 0x0D, 0x80, 0x06, ++0xEB, 0xB4, 0x01, 0x02, 0x7D, 0x02, 0xAF, 0x06, 0xEF, 0xC4, 0x54, 0xF0, 0x4D, 0xFF, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x7E, 0x00, 0x7F, 0xAA, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0xA0, 0x79, 0x16, 0x02, ++0x08, 0xAA, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x97, 0xED, 0xF0, 0x90, 0xA2, ++0x96, 0xEF, 0xF0, 0x64, 0x02, 0x70, 0x25, 0x90, 0x05, 0x22, 0xE0, 0x90, 0xA2, 0x98, 0xF0, 0x7D, ++0x4A, 0x12, 0x7F, 0xA2, 0xBF, 0x01, 0x07, 0x90, 0x04, 0xD4, 0x74, 0xFF, 0x80, 0x45, 0x90, 0xA2, ++0x98, 0xE0, 0xFF, 0x7D, 0x46, 0x12, 0x4B, 0x17, 0x7F, 0x00, 0x80, 0x3C, 0x90, 0xA2, 0x96, 0xE0, ++0x64, 0x01, 0x70, 0x2B, 0xFD, 0xFF, 0x12, 0x4B, 0x17, 0x90, 0xA2, 0x97, 0xE0, 0xFF, 0x75, 0xF0, ++0x13, 0x90, 0xA0, 0x49, 0x12, 0x45, 0x8A, 0xE0, 0xF4, 0x90, 0x04, 0xD4, 0xF0, 0x75, 0xF0, 0x13, ++0xEF, 0x90, 0xA0, 0x4A, 0x12, 0x45, 0x8A, 0xE0, 0xF4, 0x90, 0x04, 0xD5, 0xF0, 0x80, 0x07, 0x90, ++0x04, 0xD4, 0xE4, 0xF0, 0xA3, 0xF0, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x37, 0x4E, 0x90, 0xA1, 0x4E, 0x12, 0x08, ++0x6D, 0x7F, 0x00, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0x90, 0xA1, 0x52, 0x12, 0x08, 0x6D, 0x90, 0xA1, ++0x4E, 0x51, 0xBA, 0x60, 0x18, 0x90, 0xA1, 0x4E, 0x51, 0xB1, 0x90, 0xA1, 0x4E, 0x12, 0x08, 0x6D, ++0x90, 0xA1, 0x4E, 0x12, 0x5C, 0x30, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x38, 0x45, 0x90, 0xA1, 0x52, ++0x51, 0xBA, 0x60, 0x18, 0x90, 0xA1, 0x52, 0x51, 0xB1, 0x90, 0xA1, 0x52, 0x12, 0x08, 0x6D, 0x90, ++0xA1, 0x52, 0x12, 0x5C, 0x30, 0x7F, 0x00, 0x7E, 0x09, 0x12, 0x38, 0x45, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x12, 0x45, 0x72, 0xEF, 0x54, 0xFE, 0xFF, 0xEC, 0x22, 0x12, 0x45, 0x72, 0xEF, 0x54, 0x01, ++0xFF, 0xE4, 0xFE, 0xFD, 0xFC, 0xEF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA1, ++0xC7, 0xED, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0xA1, 0xC4, 0xE0, 0x90, 0xA1, 0xCA, ++0xF0, 0x90, 0xA1, 0xC5, 0x74, 0x0C, 0xF0, 0x90, 0xA1, 0xD3, 0x74, 0x04, 0xF0, 0x7B, 0x01, 0x7A, ++0xA1, 0x79, 0xC5, 0x12, 0x83, 0x55, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xAC, 0x07, 0xEC, 0xB4, 0xFF, ++0x03, 0x7F, 0xFF, 0x22, 0xAF, 0x04, 0x71, 0xC7, 0x75, 0xF0, 0x08, 0xED, 0x12, 0x57, 0x91, 0x2E, ++0x12, 0x55, 0x65, 0xE0, 0xFB, 0x7A, 0x00, 0xEF, 0x54, 0x07, 0x71, 0xBF, 0x08, 0x80, 0x05, 0xC3, ++0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x71, 0xCF, 0xAF, 0x04, 0x70, 0x02, 0x7F, 0xFF, 0x22, 0x90, ++0xA1, 0x6D, 0xED, 0xF0, 0xA9, 0x03, 0xEF, 0x04, 0xF5, 0x65, 0x90, 0xA1, 0x6D, 0xE0, 0xFF, 0xE5, ++0x65, 0xD3, 0x9F, 0x50, 0x0F, 0xAD, 0x01, 0x71, 0x5F, 0x60, 0x05, 0x85, 0x65, 0x66, 0x80, 0x04, ++0x05, 0x65, 0x80, 0xE6, 0x75, 0xF0, 0x0F, 0xE9, 0x12, 0x7F, 0xC1, 0xE5, 0x66, 0xF0, 0x22, 0xAF, ++0x65, 0x51, 0xFB, 0xEF, 0xF4, 0x22, 0x90, 0xA1, 0x72, 0xEB, 0xF0, 0xA9, 0x05, 0xE4, 0xF5, 0x65, ++0xF5, 0x66, 0xEF, 0x14, 0xF5, 0x65, 0xE9, 0xFF, 0xAD, 0x65, 0xED, 0x33, 0x95, 0xE0, 0xFC, 0xC3, ++0xED, 0x9F, 0x74, 0x80, 0xF8, 0x6C, 0x98, 0x40, 0x28, 0xE5, 0x65, 0x70, 0x04, 0x89, 0x67, 0x80, ++0x20, 0x90, 0xA1, 0x72, 0xE0, 0xFD, 0x71, 0x5F, 0x60, 0x13, 0x85, 0x65, 0x67, 0x05, 0x66, 0x90, ++0xA1, 0x73, 0xE0, 0x65, 0x66, 0x60, 0x0A, 0xE5, 0x67, 0xD3, 0x99, 0x40, 0x04, 0x15, 0x65, 0x80, ++0xC5, 0x90, 0xA1, 0x72, 0xE0, 0x75, 0xF0, 0x0F, 0x12, 0x7F, 0xC1, 0xE5, 0x67, 0xF0, 0x22, 0xFF, ++0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x22, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xFE, 0x22, 0xFF, ++0xEE, 0x5A, 0xFE, 0xEF, 0x5B, 0x4E, 0x22, 0x8E, 0x5E, 0x8F, 0x5F, 0x75, 0x60, 0x00, 0x75, 0x61, ++0x01, 0xE4, 0xFB, 0xFA, 0xE5, 0x5F, 0xB5, 0x05, 0x0D, 0xE5, 0x5E, 0xB5, 0x04, 0x08, 0x75, 0x60, ++0x00, 0x75, 0x61, 0x64, 0x81, 0xDA, 0xE5, 0x5F, 0x45, 0x5E, 0x60, 0x09, 0xD3, 0xE5, 0x5F, 0x9D, ++0xE5, 0x5E, 0x9C, 0x40, 0x07, 0xE4, 0xF5, 0x60, 0xF5, 0x61, 0x81, 0xDA, 0xD3, 0xED, 0x94, 0xFF, ++0xEC, 0x94, 0x0F, 0x50, 0x06, 0x7A, 0x00, 0x7B, 0x04, 0x80, 0x2B, 0xD3, 0xED, 0x94, 0xFF, 0xEC, ++0x94, 0x1F, 0x50, 0x06, 0x7A, 0x00, 0x7B, 0x03, 0x80, 0x1C, 0xD3, 0xED, 0x94, 0xFF, 0xEC, 0x94, ++0x3F, 0x50, 0x06, 0x7A, 0x00, 0x7B, 0x02, 0x80, 0x0D, 0xD3, 0xED, 0x94, 0xFF, 0xEC, 0x94, 0x7F, ++0x50, 0x04, 0x7A, 0x00, 0x7B, 0x01, 0xAF, 0x03, 0xED, 0xAE, 0x04, 0xA8, 0x07, 0x08, 0x80, 0x05, ++0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFD, 0xAC, 0x06, 0xAF, 0x03, 0xE5, 0x5F, 0xAE, 0x5E, ++0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFB, 0xAA, 0x06, 0xE4, ++0xF9, 0xEC, 0xC3, 0x13, 0xFC, 0xED, 0x13, 0xFD, 0xD3, 0xEB, 0x9D, 0xEA, 0x9C, 0x40, 0x46, 0x74, ++0x80, 0x7E, 0x0C, 0xA8, 0x01, 0x08, 0x80, 0x06, 0xCE, 0xA2, 0xE7, 0x13, 0xCE, 0x13, 0xD8, 0xF8, ++0x25, 0x61, 0xF5, 0x61, 0xEE, 0x35, 0x60, 0xF5, 0x60, 0xC3, 0xEB, 0x9D, 0xFB, 0xEA, 0x9C, 0xFA, ++0xED, 0x64, 0x01, 0x4C, 0x70, 0x0F, 0xC3, 0xEB, 0x94, 0x02, 0xEA, 0x94, 0x00, 0x40, 0x06, 0x7C, ++0x00, 0x7D, 0x02, 0x80, 0x10, 0xED, 0x64, 0x01, 0x4C, 0x70, 0x06, 0xEB, 0x64, 0x01, 0x4A, 0x60, ++0x08, 0xEB, 0x4A, 0x60, 0x04, 0x09, 0xB9, 0x0C, 0xA8, 0xE5, 0x61, 0xAE, 0x60, 0x78, 0x06, 0xCE, ++0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xF5, 0x61, 0x8E, 0x60, 0xAE, 0x60, 0xAF, 0x61, 0x22, 0xE4, ++0x90, 0xA1, 0x63, 0xF0, 0x90, 0xA1, 0x67, 0xF0, 0x90, 0x9D, 0x81, 0xE0, 0x04, 0xF0, 0xE4, 0xF5, ++0x51, 0x90, 0x9F, 0x37, 0xE0, 0xFF, 0xE5, 0x51, 0xC3, 0x9F, 0x40, 0x03, 0x02, 0xB4, 0x92, 0x90, ++0x04, 0xA0, 0xE0, 0xF5, 0x5A, 0xA3, 0xE0, 0xF5, 0x5B, 0x90, 0xA1, 0x67, 0xE0, 0xFF, 0x60, 0x10, ++0x90, 0x9D, 0x81, 0xE0, 0x8F, 0xF0, 0x84, 0xE5, 0xF0, 0x70, 0x05, 0xE4, 0xFD, 0x02, 0xB4, 0x88, ++0xAF, 0x51, 0x12, 0x67, 0x35, 0xEF, 0x70, 0x03, 0x02, 0xB4, 0x8D, 0x75, 0xF0, 0x0F, 0xE5, 0x51, ++0x12, 0x51, 0x35, 0x12, 0x57, 0xA6, 0x30, 0xE0, 0x03, 0x02, 0xB4, 0x8D, 0x75, 0xF0, 0x0F, 0xE5, ++0x51, 0x12, 0x57, 0x82, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x03, 0x02, 0xB4, 0x8D, 0x12, ++0x79, 0xE4, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x70, 0x09, 0x12, 0x79, 0xCC, 0xE0, 0x70, 0x03, 0x02, ++0xB4, 0x8D, 0x12, 0x7C, 0x11, 0x54, 0xF0, 0xF0, 0xE5, 0x51, 0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x01, ++0xF9, 0x74, 0x8D, 0x35, 0xF0, 0x75, 0x53, 0x01, 0xF5, 0x54, 0x89, 0x55, 0x12, 0x79, 0xE4, 0xE0, ++0xF5, 0x58, 0xA3, 0xE0, 0xF5, 0x59, 0x12, 0x79, 0xCC, 0xE0, 0xFF, 0x90, 0xA1, 0x59, 0xE4, 0xF0, ++0xA3, 0xEF, 0xF0, 0x12, 0x7F, 0x57, 0xE0, 0xFF, 0x90, 0xA1, 0x57, 0xF0, 0x54, 0x7F, 0xF5, 0x52, ++0xEF, 0x54, 0x80, 0xA3, 0xF0, 0x90, 0xA1, 0x57, 0xE0, 0xFF, 0x75, 0xF0, 0x0F, 0xE5, 0x51, 0x12, ++0x7E, 0xD7, 0xEF, 0xF0, 0xAB, 0x53, 0xAA, 0x54, 0x12, 0x07, 0x80, 0x12, 0xBB, 0x32, 0x12, 0xBB, ++0xCF, 0xFF, 0x90, 0xA1, 0x99, 0x12, 0xBB, 0x36, 0x12, 0xBB, 0xD5, 0xFF, 0x90, 0xA1, 0x9B, 0x12, ++0xBB, 0x36, 0x90, 0x00, 0x06, 0x12, 0x07, 0xAB, 0xFF, 0x90, 0xA1, 0x9D, 0x12, 0xBB, 0x36, 0x7B, ++0x01, 0x12, 0xBB, 0x66, 0x12, 0xBB, 0xE5, 0x12, 0x07, 0xAB, 0x12, 0xBB, 0x32, 0x90, 0xA1, 0x59, ++0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0xA1, 0x99, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0xB5, 0x83, 0xF0, ++0x90, 0xA1, 0x57, 0x12, 0xB5, 0x21, 0x7B, 0x02, 0x12, 0xBB, 0x66, 0x12, 0x57, 0x72, 0xE0, 0xFF, ++0x90, 0xA1, 0x97, 0x12, 0x60, 0xF1, 0xA3, 0xF0, 0xA3, 0xF0, 0x7B, 0x04, 0xFA, 0x12, 0xBB, 0x68, ++0x12, 0xB4, 0x96, 0xE0, 0xC3, 0x94, 0x05, 0x40, 0x03, 0x02, 0xB2, 0x98, 0x75, 0xF0, 0x0F, 0xE5, ++0x51, 0x12, 0x57, 0xC4, 0xE0, 0xFF, 0xE5, 0x52, 0xD3, 0x9F, 0x40, 0x16, 0x8F, 0x52, 0x90, 0xA1, ++0x58, 0xE0, 0x60, 0x07, 0xE5, 0x52, 0x44, 0x80, 0xFF, 0x80, 0x02, 0xAF, 0x52, 0x90, 0xA1, 0x57, ++0xEF, 0xF0, 0x90, 0xA1, 0x57, 0xE0, 0x90, 0x40, 0xDF, 0x93, 0xFF, 0xD3, 0x90, 0xA1, 0x5A, 0xE0, ++0x9F, 0x90, 0xA1, 0x59, 0xE0, 0x94, 0x00, 0x40, 0x08, 0xE5, 0x5A, 0x64, 0x01, 0x60, 0x02, 0x80, ++0x63, 0xD3, 0xE5, 0x59, 0x94, 0x05, 0xE5, 0x58, 0x94, 0x00, 0x40, 0x02, 0xE1, 0x55, 0xE5, 0x5A, ++0x64, 0x01, 0x70, 0x02, 0xE1, 0x55, 0x12, 0xBB, 0xE5, 0x12, 0x07, 0xAB, 0xFF, 0x90, 0xA1, 0x5A, ++0xE0, 0x2F, 0xFF, 0x90, 0xA1, 0x59, 0xE0, 0x35, 0xF0, 0xFE, 0x90, 0x00, 0x06, 0x12, 0xBA, 0xE8, ++0xFE, 0x12, 0xBB, 0xD5, 0x2F, 0xFD, 0xEE, 0x35, 0xF0, 0xFC, 0xE5, 0x58, 0xC3, 0x13, 0xFE, 0xE5, ++0x59, 0x13, 0xFF, 0xD3, 0xED, 0x9F, 0xEC, 0x9E, 0x40, 0x1F, 0x12, 0xBA, 0xBC, 0x90, 0xA1, 0x9B, ++0x12, 0x97, 0x0B, 0x7B, 0x01, 0xFA, 0x12, 0xBC, 0x67, 0x75, 0xF0, 0x0F, 0xE5, 0x51, 0x12, 0x55, ++0x4C, 0x54, 0x3F, 0xF0, 0x7B, 0x01, 0x02, 0xB1, 0xDA, 0xAB, 0x53, 0xAA, 0x54, 0xA9, 0x55, 0x12, ++0x07, 0x80, 0x65, 0x59, 0x70, 0x04, 0xE5, 0xF0, 0x65, 0x58, 0x70, 0x5B, 0x75, 0xF0, 0x0F, 0xE5, ++0x51, 0x12, 0x55, 0x4C, 0x12, 0x6C, 0xFD, 0xFE, 0xEF, 0x54, 0x3F, 0xFF, 0xEE, 0x04, 0x54, 0x03, ++0xFE, 0xC4, 0x33, 0x33, 0x54, 0xC0, 0x4F, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x51, 0x90, 0x95, 0x03, ++0x12, 0x45, 0x8A, 0x12, 0x4F, 0xEF, 0xFF, 0xC3, 0x94, 0x02, 0x50, 0x03, 0x02, 0xB4, 0x6D, 0x12, ++0xB5, 0x23, 0x12, 0xBA, 0xBC, 0x90, 0xA1, 0x9B, 0xF0, 0xA3, 0xEF, 0xF0, 0x7B, 0x02, 0x7A, 0x00, ++0x12, 0xBC, 0x67, 0xE5, 0x52, 0xD3, 0x94, 0x03, 0x50, 0x04, 0x7D, 0x01, 0x80, 0x02, 0xE4, 0xFD, ++0xAF, 0x51, 0x12, 0x7C, 0xC7, 0x80, 0x00, 0x75, 0xF0, 0x0F, 0xE5, 0x51, 0x12, 0x55, 0x4C, 0x54, ++0x3F, 0xF0, 0x02, 0xB4, 0x6D, 0xAB, 0x53, 0xAA, 0x54, 0xA9, 0x55, 0x12, 0xBB, 0xCF, 0xFF, 0xAE, ++0xF0, 0x12, 0x07, 0x80, 0x12, 0xBA, 0xDF, 0xFE, 0x90, 0x00, 0x06, 0x12, 0xBA, 0xE8, 0xFE, 0x90, ++0xA1, 0x5E, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0xBB, 0xCF, 0x2F, 0xFD, 0xEE, 0x35, 0xF0, 0xFC, 0x12, ++0xBB, 0xD5, 0x25, 0xE0, 0xFF, 0xE5, 0xF0, 0x33, 0xFE, 0xED, 0x2F, 0xFD, 0xEC, 0x3E, 0xFC, 0x90, ++0x00, 0x06, 0x12, 0x07, 0xAB, 0xFB, 0xAA, 0xF0, 0x25, 0xE0, 0xFF, 0xEA, 0x33, 0xFE, 0xED, 0x2F, ++0xFF, 0xEC, 0x3E, 0xCF, 0x2B, 0xCF, 0x3A, 0x90, 0xA1, 0x60, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, ++0xA1, 0x5C, 0xF0, 0xA3, 0xF0, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x4E, 0x60, 0x0D, 0xA3, 0xE0, ++0xFC, 0xA3, 0xE0, 0xFD, 0x71, 0xD7, 0x90, 0xA1, 0x5C, 0xEF, 0xF0, 0x90, 0xA1, 0x59, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0xC3, 0xE5, 0x59, 0x9F, 0xFD, 0xE5, 0x58, 0x9E, 0xFC, 0x4D, 0x60, 0x0F, 0x90, ++0xA1, 0x5E, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x71, 0xD7, 0x90, 0xA1, 0x5D, 0xEF, 0xF0, 0x12, 0x52, ++0xD3, 0x12, 0xB4, 0xC3, 0xFE, 0xEF, 0xC3, 0x9E, 0x40, 0x05, 0xEF, 0x9E, 0xFF, 0x80, 0x09, 0x12, ++0x52, 0xD3, 0xE0, 0xFF, 0xC3, 0xEE, 0x9F, 0xFF, 0x90, 0xA1, 0x62, 0xEF, 0xF0, 0x90, 0xA1, 0x5C, ++0x12, 0x7D, 0xA3, 0xED, 0xF0, 0x90, 0xA1, 0x5D, 0xB1, 0x2C, 0xB1, 0x83, 0xF0, 0xA3, 0xE4, 0xF0, ++0xA3, 0xEF, 0xF0, 0x7B, 0x03, 0xB1, 0x0F, 0x91, 0xCA, 0x94, 0x04, 0x50, 0x23, 0xEF, 0x60, 0x20, ++0x12, 0x52, 0xD3, 0x91, 0xC3, 0xFE, 0xEF, 0xD3, 0x9E, 0x40, 0x0D, 0xEF, 0x94, 0x01, 0x40, 0x08, ++0x12, 0x52, 0xD3, 0xE0, 0x14, 0xF0, 0x80, 0x2B, 0x12, 0x52, 0xD3, 0xE0, 0x04, 0xF0, 0x80, 0x23, ++0x12, 0x52, 0xD3, 0xE0, 0xFF, 0x25, 0xE0, 0xFE, 0x90, 0xA1, 0x5C, 0xE0, 0x13, 0x13, 0x54, 0x3F, ++0x2E, 0xFE, 0xEF, 0x13, 0x13, 0x54, 0x3F, 0xFF, 0xC3, 0xEE, 0x9F, 0xC3, 0x13, 0xFF, 0x12, 0x52, ++0xD3, 0xEF, 0xF0, 0x12, 0x52, 0xD3, 0xE0, 0xC3, 0x94, 0x64, 0x40, 0x06, 0x12, 0x52, 0xD3, 0x74, ++0x64, 0xF0, 0x74, 0x0B, 0x25, 0x52, 0xB1, 0x07, 0xE0, 0x90, 0xA1, 0x66, 0xF0, 0x91, 0xCA, 0x94, ++0x01, 0x50, 0x18, 0x90, 0xA1, 0x66, 0xE0, 0xFE, 0xC3, 0x94, 0x01, 0x40, 0x05, 0xEE, 0x14, 0xFE, ++0x80, 0x02, 0x7E, 0x00, 0x90, 0xA1, 0x66, 0xEE, 0xF0, 0x80, 0x29, 0xEF, 0xD3, 0x94, 0x02, 0x50, ++0x02, 0x80, 0x21, 0x91, 0xCA, 0x94, 0x04, 0x50, 0x09, 0x90, 0xA1, 0x66, 0xE0, 0x24, 0x02, 0xF0, ++0x80, 0x12, 0xEF, 0xD3, 0x94, 0x06, 0x90, 0xA1, 0x66, 0xE0, 0x50, 0x05, 0x24, 0x04, 0xF0, 0x80, ++0x03, 0x24, 0x06, 0xF0, 0x90, 0xA1, 0x66, 0xE0, 0xC3, 0x94, 0x14, 0x40, 0x03, 0x74, 0x14, 0xF0, ++0x90, 0xA1, 0x66, 0xE0, 0xFF, 0x74, 0x0B, 0x25, 0x52, 0xB1, 0x07, 0xEF, 0xF0, 0x90, 0xA1, 0x63, ++0xEF, 0xF0, 0x12, 0x52, 0xD3, 0xE0, 0xFF, 0xC3, 0x94, 0x5A, 0x50, 0x0F, 0xC3, 0x74, 0x5A, 0x9F, ++0x13, 0x13, 0x54, 0x3F, 0xFF, 0x90, 0xA1, 0x63, 0xE0, 0x2F, 0xF0, 0x90, 0xA1, 0x63, 0xE0, 0xC3, ++0x94, 0x28, 0x40, 0x03, 0x74, 0x28, 0xF0, 0x90, 0xA1, 0x58, 0xE0, 0x60, 0x0D, 0x90, 0xA1, 0x63, ++0xE0, 0xFF, 0xC3, 0x74, 0x53, 0x9F, 0xA3, 0xF0, 0x80, 0x0B, 0xE5, 0x52, 0x90, 0x40, 0xA3, 0xB1, ++0x37, 0x24, 0xFB, 0xA3, 0xF0, 0xE5, 0x52, 0x90, 0x40, 0xB7, 0xB1, 0x37, 0x90, 0xA1, 0x65, 0xF0, ++0x12, 0x52, 0xD3, 0x12, 0x7D, 0xA3, 0xED, 0xF0, 0x90, 0xA1, 0x66, 0xB1, 0x2C, 0xEE, 0xFF, 0xA3, ++0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA1, 0x64, 0xB1, 0x21, 0x7B, 0x05, 0xB1, 0x0F, 0xE5, 0x5A, ++0x64, 0x01, 0x70, 0x42, 0xE5, 0x51, 0x65, 0x5B, 0x70, 0x3C, 0x90, 0x04, 0xA2, 0xE0, 0x90, 0xA1, ++0x57, 0xF0, 0x90, 0x04, 0xA3, 0xE0, 0x90, 0xA1, 0x5B, 0xF0, 0x90, 0xA1, 0x57, 0xE0, 0xFF, 0x12, ++0x7F, 0x57, 0xEF, 0xF0, 0x75, 0xF0, 0x10, 0xE5, 0x51, 0x12, 0x7E, 0xE1, 0x54, 0xFC, 0xFF, 0x90, ++0xA1, 0x5B, 0xE0, 0x54, 0x03, 0x4F, 0xFF, 0x75, 0xF0, 0x10, 0xE5, 0x51, 0x90, 0x81, 0x05, 0x12, ++0x45, 0x8A, 0xEF, 0xF0, 0x81, 0x8D, 0x90, 0xA1, 0x64, 0x91, 0xC3, 0xFE, 0xD3, 0x9F, 0x50, 0x33, ++0xA3, 0xE0, 0xC3, 0x94, 0x50, 0x40, 0x0A, 0x90, 0xA1, 0x63, 0xE0, 0x94, 0x0F, 0x40, 0x02, 0x81, ++0x6D, 0x91, 0xA1, 0x12, 0x45, 0x8A, 0xE4, 0xF0, 0xEE, 0x12, 0x7D, 0xA4, 0xED, 0xF0, 0xA3, 0x12, ++0x60, 0xF1, 0x7B, 0x02, 0xFA, 0x12, 0x7E, 0xEB, 0x7B, 0x02, 0x7D, 0x01, 0xAF, 0x51, 0x12, 0x7D, ++0xAC, 0x81, 0x6D, 0x90, 0xA1, 0x65, 0x91, 0xC3, 0xF9, 0xC3, 0x9F, 0x40, 0x67, 0xB1, 0x4E, 0x12, ++0x57, 0x71, 0xE0, 0xFE, 0xC3, 0x9F, 0x40, 0x05, 0xEE, 0x9F, 0xFF, 0x80, 0x0A, 0x12, 0x57, 0x72, ++0xE0, 0xFF, 0xB1, 0x4E, 0xC3, 0x9F, 0xFF, 0xEF, 0xD3, 0x94, 0x04, 0x50, 0x08, 0x91, 0xA1, 0x12, ++0x45, 0x8A, 0xE0, 0x70, 0x20, 0x91, 0xA1, 0x12, 0x45, 0x8A, 0xE0, 0xFF, 0x12, 0x7C, 0x11, 0xB1, ++0x5B, 0xA3, 0xEF, 0xF0, 0xE9, 0x91, 0xE2, 0x7B, 0x01, 0x12, 0x7E, 0xE9, 0x7D, 0x01, 0xAF, 0x51, ++0x12, 0x7C, 0xC7, 0x81, 0x6D, 0x91, 0xA1, 0x12, 0x45, 0x8A, 0xE0, 0xFF, 0x12, 0x7C, 0x11, 0xB1, ++0x5B, 0xA3, 0xEF, 0x91, 0xDD, 0x7B, 0x01, 0x12, 0x7E, 0xE9, 0x91, 0xA1, 0x12, 0x45, 0x8A, 0xE0, ++0x14, 0xF0, 0x81, 0x6D, 0x91, 0xA1, 0x12, 0x45, 0x8A, 0xE0, 0xD3, 0x94, 0x01, 0x40, 0x08, 0x91, ++0xA1, 0x12, 0x45, 0x8A, 0xE0, 0x14, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x51, 0x12, 0x57, 0x82, 0x54, ++0xCF, 0xF0, 0x12, 0x7C, 0x11, 0x54, 0xF0, 0xF0, 0x12, 0x7C, 0x11, 0x54, 0x0F, 0x91, 0xDD, 0x90, ++0xA1, 0x64, 0xE0, 0xFF, 0x90, 0xA1, 0x9B, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x52, 0xD3, 0xB1, ++0x21, 0x7B, 0x03, 0x12, 0x7E, 0xE9, 0x81, 0x8D, 0x91, 0x96, 0xE0, 0x64, 0x05, 0x60, 0x02, 0x61, ++0x74, 0xB1, 0x00, 0xEF, 0x54, 0x01, 0xFF, 0xEF, 0x64, 0x01, 0x70, 0x19, 0x91, 0x96, 0xE4, 0x91, ++0xB6, 0xE4, 0xF0, 0xB1, 0x00, 0xE4, 0xFF, 0xE4, 0xFD, 0xFC, 0x78, 0x08, 0x12, 0x08, 0x47, 0x8F, ++0x5D, 0xB1, 0x6D, 0x81, 0x81, 0xAD, 0x52, 0xAF, 0x51, 0xB1, 0xA5, 0xB1, 0x18, 0x12, 0x9F, 0x60, ++0xF5, 0x5D, 0x12, 0x57, 0x72, 0xE0, 0xFE, 0xC3, 0x94, 0x30, 0x50, 0x05, 0x91, 0x93, 0xE4, 0x80, ++0x5E, 0xEF, 0x64, 0x01, 0x70, 0x69, 0x91, 0xD1, 0xE0, 0xFF, 0x24, 0x05, 0xFD, 0xE4, 0x33, 0xFC, ++0xEE, 0x12, 0x96, 0x03, 0x50, 0x0A, 0xB1, 0x42, 0xE0, 0xFE, 0xE5, 0x52, 0xD3, 0x9E, 0x40, 0x20, ++0xE5, 0x5D, 0x70, 0x05, 0x75, 0x5D, 0x01, 0x80, 0x0D, 0xE5, 0x5D, 0xB4, 0x01, 0x05, 0x75, 0x5D, ++0x03, 0x80, 0x03, 0x75, 0x5D, 0x05, 0x12, 0x57, 0x72, 0xE0, 0xFE, 0x91, 0xD1, 0xEE, 0x80, 0x1F, ++0x12, 0x57, 0x72, 0xE0, 0x24, 0x05, 0xFD, 0xE4, 0x33, 0xFC, 0xD3, 0xEF, 0x12, 0x96, 0x04, 0x50, ++0x06, 0x91, 0xB7, 0xE0, 0xB4, 0x0A, 0x0E, 0x12, 0x57, 0x72, 0xE0, 0xFF, 0x91, 0xD1, 0xEF, 0x91, ++0xB6, 0xE4, 0xF0, 0x80, 0x0E, 0x91, 0x96, 0xE4, 0x91, 0xB6, 0xE0, 0x04, 0xF0, 0x80, 0x04, 0x91, ++0x93, 0xE4, 0xF0, 0xB1, 0x42, 0xE5, 0x52, 0xF0, 0x75, 0xF0, 0x0F, 0xE5, 0x51, 0x12, 0x51, 0x35, ++0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x02, 0x81, 0x6B, 0x91, 0xB7, 0xE4, 0xF0, 0x91, 0x94, ++0xE4, 0xF0, 0x81, 0x6B, 0x91, 0x96, 0xE0, 0x64, 0x06, 0x60, 0x02, 0x81, 0x6D, 0xF5, 0x56, 0xF5, ++0x57, 0xB1, 0x18, 0x12, 0x9F, 0x60, 0xF5, 0x5D, 0xAF, 0x59, 0xAE, 0x58, 0xB1, 0x8B, 0x90, 0xA1, ++0x68, 0xEF, 0xF0, 0xE0, 0xFF, 0xE5, 0x59, 0xAE, 0x58, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xCE, 0xC3, ++0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0x41, 0x00, 0xE4, 0x91, 0xF9, 0x90, 0xA1, 0x69, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xF5, 0x5C, 0xAB, 0x53, 0xAA, 0x54, 0xA9, 0x55, 0x75, 0xF0, 0x02, ++0xE5, 0x5C, 0xA4, 0xF5, 0x82, 0x85, 0xF0, 0x83, 0x12, 0x07, 0xAB, 0xFF, 0xAE, 0xF0, 0x90, 0xA1, ++0x68, 0xE0, 0xFD, 0xEF, 0xA8, 0x05, 0x08, 0x80, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, ++0xFF, 0xE5, 0x5C, 0x90, 0x40, 0xFB, 0x91, 0xF9, 0xEF, 0x25, 0x57, 0xF5, 0x57, 0xEE, 0x35, 0x56, ++0xF5, 0x56, 0xC3, 0x90, 0xA1, 0x6A, 0xE0, 0x95, 0x57, 0x90, 0xA1, 0x69, 0xE0, 0x95, 0x56, 0x40, ++0x07, 0x05, 0x5C, 0xE5, 0x5C, 0xB4, 0x05, 0xAF, 0xE5, 0x5C, 0xC3, 0x13, 0xF5, 0x5C, 0xE5, 0x5D, ++0x24, 0x01, 0xFF, 0xE4, 0x33, 0xA2, 0xE7, 0x13, 0xEF, 0x13, 0xFF, 0xD3, 0x95, 0x5C, 0x40, 0x06, ++0xEF, 0x95, 0x5C, 0xFF, 0x80, 0x02, 0xE4, 0xFF, 0x91, 0xAA, 0xE0, 0xC3, 0x13, 0xFE, 0xEF, 0xC4, ++0x33, 0x54, 0xE0, 0x2E, 0x04, 0xFE, 0x91, 0xAA, 0xEE, 0xF0, 0x91, 0xAA, 0xE0, 0xC3, 0x94, 0xC0, ++0x40, 0x05, 0x91, 0xAA, 0x74, 0xC0, 0xF0, 0x91, 0xAA, 0x12, 0x4F, 0xEF, 0x25, 0xE0, 0xFF, 0x70, ++0x03, 0xFF, 0x80, 0x03, 0xEF, 0x14, 0xFF, 0x8F, 0x5D, 0xD3, 0x90, 0xA1, 0x5A, 0xE0, 0x94, 0x03, ++0x90, 0xA1, 0x59, 0xE0, 0x94, 0x00, 0x40, 0x03, 0xE4, 0xF5, 0x5D, 0xB1, 0x6D, 0x91, 0x96, 0xE0, ++0xFF, 0xD3, 0x94, 0x05, 0x50, 0x05, 0xEF, 0x04, 0xFF, 0x80, 0x02, 0x7F, 0x00, 0x91, 0x96, 0xEF, ++0xF0, 0xE4, 0xF5, 0x56, 0xF5, 0x57, 0x7D, 0x01, 0xAF, 0x51, 0x12, 0x79, 0x41, 0x05, 0x51, 0x02, ++0xAC, 0xF1, 0x22, 0xE4, 0xF5, 0x5D, 0x75, 0xF0, 0x0F, 0xE5, 0x51, 0x90, 0x95, 0x0F, 0x02, 0x45, ++0x8A, 0x75, 0xF0, 0x0F, 0xE5, 0x51, 0x90, 0x95, 0x0B, 0x22, 0x74, 0x01, 0x25, 0x51, 0xF5, 0x82, ++0xE4, 0x34, 0x93, 0xF5, 0x83, 0x22, 0xF0, 0x74, 0x01, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9D, ++0xF5, 0x83, 0x22, 0xE0, 0xFF, 0x90, 0xA1, 0x5C, 0xE0, 0x22, 0x90, 0xA1, 0x62, 0xE0, 0xFF, 0xD3, ++0x22, 0x74, 0x01, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0x22, 0xF0, 0x90, 0xA1, ++0x5C, 0xE0, 0xFF, 0x90, 0xA1, 0x97, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA1, 0x65, 0xE0, 0xFF, ++0x90, 0xA1, 0x99, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x93, 0xFD, 0x7C, 0x00, 0x02, 0x07, 0x03, ++0x7F, 0xC0, 0x7E, 0x0C, 0x02, 0x37, 0x4E, 0xF5, 0x82, 0xE4, 0x34, 0x9E, 0xF5, 0x83, 0x22, 0x7A, ++0x00, 0x7D, 0x04, 0x7F, 0x01, 0x02, 0x7E, 0xEF, 0x75, 0xF0, 0x10, 0xE5, 0x51, 0x90, 0x81, 0x01, ++0x22, 0xE0, 0xFF, 0x90, 0xA1, 0x9D, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xE0, 0xFD, 0x90, 0xA1, ++0x99, 0xE4, 0xF0, 0xA3, 0xED, 0xF0, 0x22, 0x93, 0xFF, 0x90, 0xA1, 0x63, 0xE0, 0xFE, 0xC3, 0xEF, ++0x9E, 0x22, 0x74, 0x82, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9D, 0xF5, 0x83, 0x22, 0x75, 0xF0, ++0x0F, 0xE5, 0x51, 0x90, 0x95, 0x0C, 0x12, 0x45, 0x8A, 0xE0, 0x22, 0xC4, 0x54, 0x0F, 0xFD, 0x90, ++0xA1, 0x9D, 0xE4, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0xA1, 0x9B, 0xE4, 0xF0, 0x22, 0xAD, 0x5D, 0xAF, ++0x51, 0x12, 0x7C, 0x07, 0xE0, 0x54, 0xF8, 0xF5, 0x5E, 0xED, 0x42, 0x5E, 0x12, 0x7C, 0x07, 0xE5, ++0x5E, 0xF0, 0x22, 0xA3, 0xE5, 0x58, 0xF0, 0xA3, 0xE5, 0x59, 0x22, 0xD3, 0xEF, 0x94, 0xE8, 0xEE, ++0x94, 0x03, 0x40, 0x03, 0x7F, 0x05, 0x22, 0xD3, 0xEF, 0x94, 0xC8, 0xEE, 0x94, 0x00, 0x7F, 0x00, ++0x40, 0x02, 0x7F, 0x02, 0x22, 0xE4, 0xF5, 0x5E, 0x12, 0x57, 0x9A, 0xE0, 0xFE, 0xB4, 0x03, 0x08, ++0xED, 0xC3, 0x94, 0x19, 0x40, 0x2F, 0x80, 0x25, 0xEE, 0xB4, 0x02, 0x08, 0xED, 0xC3, 0x94, 0x11, ++0x40, 0x23, 0x80, 0x19, 0x12, 0x57, 0x9A, 0xE0, 0xFE, 0xB4, 0x01, 0x08, 0xED, 0xC3, 0x94, 0x0A, ++0x40, 0x13, 0x80, 0x09, 0xEE, 0x70, 0x0B, 0xED, 0xC3, 0x94, 0x03, 0x40, 0x08, 0x75, 0x5E, 0x01, ++0x80, 0x03, 0xE4, 0xF5, 0x5E, 0xAF, 0x5E, 0x22, 0x75, 0xF0, 0x0F, 0xEF, 0x12, 0x51, 0x35, 0x13, ++0x13, 0x54, 0x03, 0xFE, 0xED, 0xD3, 0x94, 0x2D, 0x40, 0x09, 0x75, 0xF0, 0x0F, 0xEF, 0x90, 0x95, ++0x01, 0x80, 0x12, 0xED, 0xD3, 0x94, 0x0F, 0x40, 0x05, 0x75, 0x52, 0x0F, 0x80, 0x0D, 0x75, 0xF0, ++0x0F, 0xEF, 0x90, 0x95, 0x02, 0x12, 0x45, 0x8A, 0xE0, 0xF5, 0x52, 0x90, 0xA2, 0x49, 0xEE, 0xF0, ++0xE4, 0xFB, 0xAD, 0x52, 0x02, 0x79, 0xF6, 0x12, 0x06, 0x89, 0xF5, 0x51, 0xC3, 0x94, 0x80, 0x50, ++0x1E, 0x12, 0x5F, 0x66, 0xFF, 0xD1, 0x50, 0xEF, 0x12, 0x57, 0xB8, 0x12, 0x57, 0x71, 0xEF, 0xF0, ++0xD1, 0x50, 0xE0, 0x30, 0xE5, 0x09, 0x12, 0x57, 0x72, 0xE0, 0xFD, 0xAF, 0x51, 0xB1, 0xE8, 0x22, ++0x75, 0xF0, 0x0F, 0xE5, 0x51, 0x90, 0x95, 0x09, 0x02, 0x45, 0x8A, 0x12, 0x5F, 0x0D, 0xF5, 0x51, ++0x12, 0x57, 0xB9, 0xF5, 0x52, 0x12, 0x06, 0x89, 0xF5, 0x53, 0x90, 0x9E, 0x09, 0xF0, 0xE0, 0xFF, ++0x12, 0x7D, 0xA5, 0xEF, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0xE5, 0x51, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, ++0xE5, 0x52, 0x12, 0x97, 0x0E, 0xFB, 0xFA, 0x7D, 0x01, 0x7F, 0x20, 0x12, 0x7E, 0xEF, 0xE5, 0x51, ++0x60, 0x06, 0xFD, 0xAF, 0x52, 0x12, 0x83, 0x74, 0x22, 0xD1, 0xB5, 0xE4, 0x90, 0x9F, 0x3B, 0xF0, ++0x22, 0xD1, 0xAF, 0x80, 0xF4, 0x12, 0x6F, 0xB2, 0x80, 0xEF, 0x12, 0x6F, 0xC1, 0x80, 0xEA, 0x12, ++0x67, 0x6F, 0x02, 0x6F, 0x0A, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0x22, 0x7D, 0x2E, 0x7F, ++0x6F, 0x12, 0x4B, 0x17, 0x7D, 0x02, 0x7F, 0x01, 0x12, 0x62, 0x85, 0xD1, 0xB5, 0x90, 0x9F, 0x3C, ++0x74, 0x02, 0xF0, 0x22, 0x7D, 0x22, 0x7F, 0xFF, 0x12, 0x4B, 0x17, 0x12, 0x6F, 0xB9, 0x02, 0x6F, ++0xD7, 0x7D, 0x25, 0x02, 0x4F, 0xF8, 0x90, 0x9F, 0x3B, 0xE0, 0x64, 0x02, 0x7F, 0x01, 0x60, 0x02, ++0x7F, 0x00, 0x22, 0xAE, 0x07, 0x12, 0x6E, 0xF2, 0xBF, 0x01, 0x13, 0x90, 0x9F, 0x38, 0x12, 0x4F, ++0xEF, 0x20, 0xE0, 0x0A, 0xAF, 0x06, 0x7D, 0x01, 0x12, 0x63, 0x1A, 0x7F, 0x01, 0x22, 0x7F, 0x00, ++0x22, 0x90, 0x9F, 0x3D, 0xE0, 0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x9F, 0x4B, 0xF0, 0xA3, 0xF0, 0x90, ++0x9F, 0x46, 0xF0, 0x90, 0x9F, 0x3E, 0xE0, 0x54, 0xF7, 0xF0, 0x54, 0xBF, 0x12, 0x65, 0x39, 0x7D, ++0x10, 0x7F, 0x03, 0x02, 0x66, 0xCA, 0xEF, 0x24, 0xFE, 0x60, 0x0B, 0x04, 0x70, 0x24, 0x90, 0x9F, ++0x48, 0x74, 0x02, 0xF0, 0x80, 0x13, 0xED, 0x70, 0x06, 0x90, 0x9F, 0xA2, 0xE0, 0x80, 0x02, 0xED, ++0x14, 0x90, 0x9F, 0x48, 0xF0, 0x90, 0x9F, 0x48, 0xE0, 0xA3, 0xF0, 0x90, 0x9F, 0x3E, 0xE0, 0x44, ++0x08, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9F, 0xB3, 0xE0, 0x30, 0xE0, ++0x17, 0x90, 0x9F, 0xC5, 0xE0, 0x70, 0x61, 0x90, 0x9F, 0x44, 0xE0, 0xD3, 0x94, 0x00, 0x50, 0x58, ++0x90, 0x9F, 0xA5, 0xE0, 0x60, 0x4E, 0x80, 0x50, 0x12, 0xA7, 0x3D, 0xEF, 0x64, 0x01, 0x70, 0x48, ++0x90, 0x9F, 0x46, 0xE0, 0xFF, 0x54, 0x03, 0x70, 0x3F, 0x90, 0x9F, 0x44, 0xE0, 0xFE, 0xE4, 0xC3, ++0x9E, 0x40, 0x35, 0xEF, 0x20, 0xE2, 0x31, 0x90, 0x9F, 0x46, 0xE0, 0x20, 0xE4, 0x2A, 0x90, 0x9F, ++0x3E, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x1F, 0x90, 0x9F, 0xA5, 0xE0, 0x70, 0x19, 0x90, ++0x06, 0x62, 0xE0, 0x20, 0xE1, 0x12, 0x90, 0x06, 0x62, 0xE0, 0x30, 0xE0, 0x07, 0xE0, 0x54, 0xFC, ++0x64, 0x80, 0x60, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, ++0x9F, 0xA6, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x22, 0x90, 0x02, 0x87, 0xE0, 0x70, 0x26, 0x90, 0x01, ++0x00, 0xE0, 0x64, 0x3F, 0x70, 0x1E, 0x90, 0x02, 0x96, 0xE0, 0x70, 0x18, 0x90, 0x02, 0x86, 0xE0, ++0x30, 0xE1, 0x11, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE3, 0x0A, 0x90, 0x9F, 0xFC, 0xE0, 0x20, 0xE0, ++0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xEF, 0x60, 0x34, 0x12, 0x67, 0xBD, 0x70, 0x2F, 0x90, ++0x9F, 0x3E, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x2B, 0x7F, 0x0F, 0x12, 0x4B, 0x17, 0x90, 0x06, 0x04, ++0xE0, 0x54, 0xBF, 0xF0, 0x12, 0x77, 0xBF, 0xBF, 0x01, 0x14, 0x90, 0x9F, 0x3D, 0xE0, 0x44, 0x40, ++0xF0, 0x7D, 0x06, 0x7F, 0x01, 0x12, 0x62, 0x85, 0x90, 0x9F, 0x3C, 0x74, 0x06, 0xF0, 0x22, 0x90, ++0x9F, 0x99, 0x74, 0x04, 0xF0, 0xA3, 0x14, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0, 0xA3, ++0x74, 0x05, 0xF0, 0xA3, 0xF0, 0x22, 0x12, 0x5F, 0xBF, 0x12, 0x45, 0x54, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x12, 0x5F, 0xD8, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xD0, ++0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0xA3, 0x12, 0x5F, 0xD8, 0x78, 0x18, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x12, 0x45, 0x54, 0x90, 0x9F, 0x91, 0x12, 0x08, 0x6D, 0x90, 0x9F, 0x95, 0x12, ++0x45, 0x72, 0x90, 0x9F, 0x91, 0x12, 0x45, 0x7E, 0xC3, 0x12, 0x45, 0x61, 0x40, 0x3F, 0x90, 0x9F, ++0x3D, 0xE0, 0x90, 0x9F, 0x95, 0x30, 0xE0, 0x0F, 0x31, 0xE3, 0x90, 0x9F, 0x5F, 0xE0, 0x24, 0x04, ++0x2F, 0xFF, 0x90, 0x9F, 0x99, 0x80, 0x05, 0x31, 0xE3, 0x90, 0x9F, 0x9A, 0xE0, 0xFE, 0xC3, 0xEF, ++0x9E, 0x90, 0xA1, 0x77, 0xF0, 0x90, 0xA1, 0x77, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x50, 0x0E, 0x74, ++0x60, 0x2F, 0x31, 0xD3, 0xE0, 0x04, 0xF0, 0x90, 0x9F, 0x58, 0xE0, 0x04, 0xF0, 0x90, 0x9F, 0x58, ++0xE0, 0xFF, 0xD3, 0x90, 0x9F, 0x9C, 0xE0, 0x9F, 0x90, 0x9F, 0x9B, 0xE0, 0x94, 0x00, 0x40, 0x02, ++0x21, 0xCF, 0xE4, 0xFF, 0xFE, 0x31, 0xD0, 0xE0, 0x2F, 0xFF, 0x90, 0x9F, 0x9D, 0xE0, 0xFD, 0xEF, ++0xD3, 0x9D, 0x40, 0x07, 0x90, 0xA1, 0x78, 0xEE, 0xF0, 0x80, 0x05, 0x0E, 0xEE, 0xB4, 0x2D, 0xE5, ++0xE4, 0xFF, 0xFE, 0x31, 0xD0, 0xE0, 0x2F, 0xFF, 0x90, 0x9F, 0x9D, 0xE0, 0xFD, 0xC3, 0x90, 0x9F, ++0x9C, 0xE0, 0x9D, 0xFD, 0x90, 0x9F, 0x9B, 0xE0, 0x94, 0x00, 0xFC, 0xEF, 0xD3, 0x9D, 0xE4, 0x9C, ++0x40, 0x07, 0x90, 0xA1, 0x79, 0xEE, 0xF0, 0x80, 0x05, 0x0E, 0xEE, 0xB4, 0x2D, 0xD5, 0x90, 0xA1, ++0x78, 0xE0, 0x90, 0x9F, 0x5D, 0xF0, 0x90, 0xA1, 0x79, 0xE0, 0x90, 0x9F, 0x5E, 0x31, 0xDB, 0x94, ++0x0A, 0x40, 0x0A, 0xEF, 0x24, 0xF6, 0x90, 0x9F, 0x55, 0xF0, 0xE4, 0x80, 0x09, 0xE4, 0x90, 0x9F, ++0x55, 0x31, 0xDB, 0x74, 0x0A, 0x9F, 0x90, 0x9F, 0x54, 0xF0, 0x90, 0x9F, 0x5D, 0xE0, 0xFF, 0xA3, ++0xE0, 0xC3, 0x9F, 0x90, 0x9F, 0x5B, 0xF0, 0x90, 0x9F, 0x3D, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x9F, ++0x99, 0x80, 0x03, 0x90, 0x9F, 0x9A, 0xE0, 0x04, 0xFF, 0x90, 0x9F, 0x5B, 0xE0, 0x2F, 0xF0, 0x90, ++0x9F, 0x5B, 0xE0, 0xC3, 0x94, 0x0A, 0x50, 0x03, 0x74, 0x0A, 0xF0, 0x90, 0x9F, 0x5B, 0xE0, 0x24, ++0x02, 0xF0, 0x12, 0x96, 0x42, 0x74, 0x03, 0xF0, 0x12, 0x95, 0x35, 0xE4, 0xFF, 0x51, 0x00, 0x22, ++0x74, 0x60, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x9F, 0xF5, 0x83, 0x22, 0xF0, 0x90, 0x9F, 0x5D, 0xE0, ++0xFF, 0xC3, 0x22, 0x12, 0x45, 0x7E, 0x90, 0x9F, 0x91, 0x12, 0x45, 0x72, 0x12, 0x45, 0x39, 0x78, ++0x0A, 0x12, 0x08, 0x47, 0x90, 0x9F, 0x5A, 0xE0, 0xFE, 0xC3, 0x74, 0x0A, 0x9E, 0x2F, 0xFF, 0x22, ++0xE4, 0xFE, 0x31, 0xD0, 0xE4, 0xF0, 0x0E, 0xEE, 0xB4, 0x2D, 0xF7, 0xE4, 0x90, 0x9F, 0x59, 0xF0, ++0x90, 0x9F, 0x58, 0xF0, 0x90, 0x9F, 0x5C, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, 0x74, 0x2D, 0xF0, ++0xE4, 0xA3, 0xF0, 0x22, 0x90, 0x9F, 0xAF, 0xE0, 0x90, 0x01, 0x30, 0xF0, 0x90, 0x9F, 0xAC, 0xE0, ++0x90, 0x01, 0x39, 0xF0, 0x90, 0x9F, 0xAD, 0xE0, 0x90, 0x01, 0x3A, 0xF0, 0x22, 0x90, 0xA2, 0x57, ++0xE0, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0xAE, 0xEF, 0xF0, 0x90, 0x9E, ++0x35, 0xE0, 0xFF, 0x90, 0x04, 0x1C, 0xE0, 0x6F, 0x70, 0x3E, 0x90, 0x9F, 0x45, 0xE0, 0x64, 0x0E, ++0x70, 0x15, 0x90, 0xA2, 0xAE, 0xE0, 0x70, 0x30, 0x90, 0x9F, 0x3D, 0xE0, 0x54, 0x7F, 0xF0, 0x90, ++0x06, 0x04, 0x12, 0x62, 0x7D, 0x80, 0x1E, 0x90, 0x9F, 0x45, 0xE0, 0x64, 0x06, 0x70, 0x19, 0x90, ++0xA2, 0xAE, 0xE0, 0x60, 0x13, 0x90, 0x9F, 0x3D, 0xE0, 0x54, 0xBF, 0xF0, 0x51, 0x9D, 0xF0, 0x90, ++0x9F, 0x45, 0x74, 0x04, 0xF0, 0x12, 0x67, 0x6F, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x06, 0x04, ++0xE0, 0x44, 0x40, 0xF0, 0xE0, 0x44, 0x80, 0x22, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, 0x30, ++0xE0, 0x02, 0x7E, 0x80, 0x90, 0xFD, 0x10, 0xED, 0xF0, 0xAF, 0x06, 0x22, 0x90, 0xA1, 0x97, 0xE5, ++0x58, 0xF0, 0xA3, 0xE5, 0x59, 0xF0, 0xE5, 0x58, 0x13, 0xA3, 0xF0, 0xE5, 0x59, 0x13, 0xA3, 0xF0, ++0x90, 0x00, 0x06, 0x12, 0x07, 0xAB, 0xFF, 0xAE, 0xF0, 0x90, 0x00, 0x08, 0x12, 0x07, 0xAB, 0x2F, ++0xFF, 0xE5, 0xF0, 0x3E, 0xFE, 0x90, 0x00, 0x04, 0x12, 0x07, 0xAB, 0x2F, 0xFF, 0xEE, 0x35, 0xF0, ++0x22, 0x90, 0xA0, 0x17, 0xE0, 0xFF, 0xC3, 0x13, 0xFE, 0xEF, 0x54, 0xF1, 0xFF, 0xEE, 0x04, 0x54, ++0x07, 0x25, 0xE0, 0x4F, 0xF0, 0xA3, 0xE0, 0xFF, 0x90, 0xA0, 0x17, 0xE0, 0xFE, 0xC3, 0x13, 0x54, ++0x07, 0x22, 0xFF, 0x75, 0xF0, 0x0E, 0x90, 0xA0, 0x24, 0x12, 0x45, 0x8A, 0xE0, 0xFE, 0x75, 0xF0, ++0x0E, 0xEF, 0x90, 0xA0, 0x23, 0x12, 0x45, 0x8A, 0xE0, 0x90, 0xA2, 0x45, 0xF0, 0x90, 0xA2, 0x44, ++0xEE, 0x22, 0xFF, 0x90, 0xA1, 0x97, 0xE5, 0xF0, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x7F, 0x2C, 0x7E, ++0x09, 0x12, 0x37, 0x4E, 0xEF, 0x54, 0xFC, 0xFF, 0x22, 0x9D, 0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x74, ++0x5B, 0x2D, 0xF5, 0x82, 0x74, 0xA1, 0x3C, 0xF5, 0x83, 0x22, 0xE0, 0xFF, 0x12, 0x4E, 0xDB, 0x90, ++0x9F, 0xC6, 0xE0, 0x04, 0xF0, 0x22, 0x7A, 0x00, 0x7D, 0x01, 0x7F, 0x01, 0x02, 0x7E, 0xEF, 0x7B, ++0x01, 0x7A, 0xA1, 0x79, 0x45, 0x7F, 0xFB, 0x7E, 0x01, 0x02, 0x34, 0xC1, 0x7E, 0x00, 0x7F, 0x04, ++0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x9F, 0x79, 0xA6, 0x22, 0x90, 0xA0, 0x7F, 0xE0, 0x44, 0x10, 0xF0, ++0x90, 0xA1, 0x87, 0xE0, 0xFF, 0x22, 0x75, 0xF0, 0x0E, 0x90, 0xA0, 0x1C, 0x02, 0x45, 0x8A, 0x12, ++0x45, 0x8A, 0xE0, 0xFC, 0xA3, 0xE0, 0xF5, 0x82, 0x8C, 0x83, 0x22, 0x12, 0x08, 0x5A, 0x90, 0xA1, ++0xDA, 0x12, 0x08, 0x6D, 0x7F, 0x00, 0x22, 0x74, 0x05, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0x22, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90, ++0x00, 0x02, 0x02, 0x07, 0xAB, 0x90, 0x00, 0x04, 0x02, 0x07, 0xAB, 0x54, 0x01, 0xC4, 0x33, 0x33, ++0x33, 0x54, 0x80, 0xFF, 0x22, 0xAB, 0x53, 0xAA, 0x54, 0xA9, 0x55, 0x90, 0x00, 0x08, 0x22, 0x90, ++0xA2, 0x7B, 0xE0, 0xFF, 0x90, 0xA2, 0x79, 0xE0, 0x22, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, ++0x01, 0x22, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x7F, 0x01, 0x22, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, ++0x58, 0x7E, 0x01, 0x22, 0x90, 0x05, 0x22, 0xE0, 0x90, 0xA1, 0x87, 0xF0, 0x22, 0x90, 0xA2, 0x63, ++0xE0, 0x7F, 0x48, 0x7E, 0x09, 0x22, 0x90, 0x9F, 0xB6, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x22, 0xE4, ++0x90, 0x9F, 0xBB, 0xF0, 0x90, 0x9F, 0xC6, 0x22, 0x75, 0xF0, 0x0E, 0xEF, 0x90, 0xA0, 0x26, 0x22, ++0x90, 0x95, 0x02, 0x12, 0x45, 0x8A, 0xE0, 0x22, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x22, ++0x7D, 0x02, 0x7F, 0x02, 0x02, 0x66, 0xF4, 0x90, 0x9F, 0x48, 0xE0, 0xFF, 0xA3, 0xE0, 0x22, 0x90, ++0x89, 0x07, 0x12, 0x45, 0x8A, 0xE0, 0x22, 0x7D, 0x03, 0x7F, 0x01, 0x02, 0x7E, 0xEF, 0x90, 0xA0, ++0x48, 0x12, 0x45, 0x8A, 0xE0, 0x22, 0x90, 0x05, 0x00, 0x74, 0x1C, 0xF0, 0xA3, 0x22, 0x4D, 0xFF, ++0x90, 0x9F, 0xA4, 0xF0, 0xEE, 0x22, 0x90, 0xA2, 0x31, 0x12, 0x45, 0x72, 0xEF, 0x22, 0x12, 0x45, ++0x72, 0xEF, 0x44, 0x80, 0xFF, 0x22, 0x90, 0xA2, 0x85, 0xE0, 0x90, 0x9F, 0xC6, 0x22, 0x2F, 0xF8, ++0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0x22, 0x12, 0x47, 0x84, 0xEF, 0x44, 0x40, 0xFD, 0x22, 0x30, 0x63, ++ ++}; ++u4Byte ArrayLength_MP_8723B_FW_NIC = 31952; ++ ++ ++void ++ODM_ReadFirmware_MP_8723B_FW_NIC( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8723B_FW_NIC; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8723B_FW_NIC, ArrayLength_MP_8723B_FW_NIC); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8723B_FW_NIC; ++} ++ ++ ++u1Byte Array_MP_8723B_FW_WoWLAN[] = { ++0x01, 0x53, 0x30, 0x00, 0x27, 0x00, 0x00, 0x00, 0x10, 0x30, 0x15, 0x17, 0x16, 0x66, 0x00, 0x00, ++0x4D, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x48, 0xA2, 0x02, 0x68, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x68, 0xB7, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x68, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x68, 0x5F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x6F, 0xF7, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x77, 0xF1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xEF, 0x2B, 0xFF, 0xEE, 0x3A, 0xFE, 0xED, 0x39, 0xFD, 0xEC, 0x38, 0xFC, 0x22, 0xC3, 0xEF, 0x9B, ++0xFF, 0xEE, 0x9A, 0xFE, 0xED, 0x99, 0xFD, 0xEC, 0x98, 0xFC, 0x22, 0xE8, 0x8F, 0xF0, 0xA4, 0xCC, ++0x8B, 0xF0, 0xA4, 0x2C, 0xFC, 0xE9, 0x8E, 0xF0, 0xA4, 0x2C, 0xFC, 0x8A, 0xF0, 0xED, 0xA4, 0x2C, ++0xFC, 0xEA, 0x8E, 0xF0, 0xA4, 0xCD, 0xA8, 0xF0, 0x8B, 0xF0, 0xA4, 0x2D, 0xCC, 0x38, 0x25, 0xF0, ++0xFD, 0xE9, 0x8F, 0xF0, 0xA4, 0x2C, 0xCD, 0x35, 0xF0, 0xFC, 0xEB, 0x8E, 0xF0, 0xA4, 0xFE, 0xA9, ++0xF0, 0xEB, 0x8F, 0xF0, 0xA4, 0xCF, 0xC5, 0xF0, 0x2E, 0xCD, 0x39, 0xFE, 0xE4, 0x3C, 0xFC, 0xEA, ++0xA4, 0x2D, 0xCE, 0x35, 0xF0, 0xFD, 0xE4, 0x3C, 0xFC, 0x22, 0x75, 0xF0, 0x08, 0x75, 0x82, 0x00, ++0xEF, 0x2F, 0xFF, 0xEE, 0x33, 0xFE, 0xCD, 0x33, 0xCD, 0xCC, 0x33, 0xCC, 0xC5, 0x82, 0x33, 0xC5, ++0x82, 0x9B, 0xED, 0x9A, 0xEC, 0x99, 0xE5, 0x82, 0x98, 0x40, 0x0C, 0xF5, 0x82, 0xEE, 0x9B, 0xFE, ++0xED, 0x9A, 0xFD, 0xEC, 0x99, 0xFC, 0x0F, 0xD5, 0xF0, 0xD6, 0xE4, 0xCE, 0xFB, 0xE4, 0xCD, 0xFA, ++0xE4, 0xCC, 0xF9, 0xA8, 0x82, 0x22, 0xB8, 0x00, 0xC1, 0xB9, 0x00, 0x59, 0xBA, 0x00, 0x2D, 0xEC, ++0x8B, 0xF0, 0x84, 0xCF, 0xCE, 0xCD, 0xFC, 0xE5, 0xF0, 0xCB, 0xF9, 0x78, 0x18, 0xEF, 0x2F, 0xFF, ++0xEE, 0x33, 0xFE, 0xED, 0x33, 0xFD, 0xEC, 0x33, 0xFC, 0xEB, 0x33, 0xFB, 0x10, 0xD7, 0x03, 0x99, ++0x40, 0x04, 0xEB, 0x99, 0xFB, 0x0F, 0xD8, 0xE5, 0xE4, 0xF9, 0xFA, 0x22, 0x78, 0x18, 0xEF, 0x2F, ++0xFF, 0xEE, 0x33, 0xFE, 0xED, 0x33, 0xFD, 0xEC, 0x33, 0xFC, 0xC9, 0x33, 0xC9, 0x10, 0xD7, 0x05, ++0x9B, 0xE9, 0x9A, 0x40, 0x07, 0xEC, 0x9B, 0xFC, 0xE9, 0x9A, 0xF9, 0x0F, 0xD8, 0xE0, 0xE4, 0xC9, ++0xFA, 0xE4, 0xCC, 0xFB, 0x22, 0x75, 0xF0, 0x10, 0xEF, 0x2F, 0xFF, 0xEE, 0x33, 0xFE, 0xED, 0x33, ++0xFD, 0xCC, 0x33, 0xCC, 0xC8, 0x33, 0xC8, 0x10, 0xD7, 0x07, 0x9B, 0xEC, 0x9A, 0xE8, 0x99, 0x40, ++0x0A, 0xED, 0x9B, 0xFD, 0xEC, 0x9A, 0xFC, 0xE8, 0x99, 0xF8, 0x0F, 0xD5, 0xF0, 0xDA, 0xE4, 0xCD, ++0xFB, 0xE4, 0xCC, 0xFA, 0xE4, 0xC8, 0xF9, 0x22, 0xEF, 0x5B, 0xFF, 0xEE, 0x5A, 0xFE, 0xED, 0x59, ++0xFD, 0xEC, 0x58, 0xFC, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, ++0xFC, 0x22, 0xEB, 0x9F, 0xF5, 0xF0, 0xEA, 0x9E, 0x42, 0xF0, 0xE9, 0x9D, 0x42, 0xF0, 0xE8, 0x9C, ++0x45, 0xF0, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xE0, ++0xF8, 0xA3, 0xE0, 0xF9, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0x22, 0xA4, 0x25, 0x82, 0xF5, 0x82, ++0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xF9, 0x22, ++0xEB, 0xF0, 0xA3, 0xEA, 0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, ++0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, ++0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0xE3, ++0xF5, 0xF0, 0x09, 0xE2, 0x08, 0xB5, 0xF0, 0x6B, 0xDF, 0xF5, 0x80, 0x67, 0xE3, 0xF5, 0xF0, 0x09, ++0xE6, 0x08, 0xB5, 0xF0, 0x5E, 0xDF, 0xF5, 0x80, 0x5A, 0x87, 0xF0, 0x09, 0xE6, 0x08, 0xB5, 0xF0, ++0x52, 0xDF, 0xF6, 0x80, 0x4E, 0x87, 0xF0, 0x09, 0xE2, 0x08, 0xB5, 0xF0, 0x46, 0xDF, 0xF6, 0x80, ++0x42, 0x88, 0x82, 0x8C, 0x83, 0x87, 0xF0, 0x09, 0xE0, 0xA3, 0xB5, 0xF0, 0x36, 0xDF, 0xF6, 0x80, ++0x32, 0x88, 0x82, 0x8C, 0x83, 0x87, 0xF0, 0x09, 0xE4, 0x93, 0xA3, 0xB5, 0xF0, 0x25, 0xDF, 0xF5, ++0x80, 0x21, 0x88, 0x82, 0x8C, 0x83, 0xE3, 0xF5, 0xF0, 0x09, 0xE0, 0xA3, 0xB5, 0xF0, 0x14, 0xDF, ++0xF5, 0x80, 0x10, 0x88, 0x82, 0x8C, 0x83, 0xE3, 0xF5, 0xF0, 0x09, 0xE4, 0x93, 0xA3, 0xB5, 0xF0, ++0x02, 0xDF, 0xF4, 0x02, 0x45, 0x7E, 0x80, 0x87, 0x80, 0xE9, 0x80, 0x90, 0x80, 0xD4, 0x80, 0x3E, ++0x80, 0x15, 0x80, 0x6E, 0x80, 0x7E, 0x80, 0x9D, 0x80, 0xB7, 0x80, 0x8D, 0x80, 0xA3, 0x80, 0x51, ++0x80, 0x74, 0x80, 0x3C, 0x02, 0x45, 0x8A, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE4, 0x93, 0xF5, ++0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, ++0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xB5, 0xF0, 0x76, 0xDF, 0xE3, 0xDE, 0xE1, 0x80, 0x70, 0x89, 0x82, ++0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0xA3, 0xE2, 0x08, 0xB5, 0xF0, 0x62, 0xDF, 0xF4, 0x80, 0x5E, ++0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5, 0xF0, 0xA3, 0xE6, 0x08, 0xB5, 0xF0, 0x51, 0xDF, 0xF5, 0x80, ++0x4D, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5, 0xF0, 0xA3, 0xE2, 0x08, 0xB5, 0xF0, 0x40, 0xDF, 0xF5, ++0x80, 0x3C, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0xA3, 0xE6, 0x08, 0xB5, 0xF0, 0x2E, ++0xDF, 0xF4, 0x80, 0x2A, 0x80, 0x02, 0x80, 0x57, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE4, 0x93, ++0xF5, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xE0, 0xA3, 0xC8, 0xC5, 0x82, ++0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xB5, 0xF0, 0x06, 0xDF, 0xE4, 0xDE, 0xE2, 0x80, 0x00, 0x7F, 0xFF, ++0xB5, 0xF0, 0x02, 0x0F, 0x22, 0x40, 0x02, 0x7F, 0x01, 0x22, 0x89, 0x82, 0x8A, 0x83, 0xEC, 0xFA, ++0xE0, 0xF5, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xE0, 0xA3, 0xC8, 0xC5, ++0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xB5, 0xF0, 0xD5, 0xDF, 0xE5, 0xDE, 0xE3, 0x80, 0xCF, 0x89, ++0x82, 0x8A, 0x83, 0xEC, 0xFA, 0xE0, 0xF5, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, ++0xCC, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCC, 0xC5, 0x83, 0xCC, 0xB5, 0xF0, 0xAF, 0xDF, ++0xE4, 0xDE, 0xE2, 0x80, 0xA9, 0x88, 0xF0, 0xEF, 0x60, 0x01, 0x0E, 0x4E, 0x60, 0xAB, 0xED, 0x24, ++0x02, 0xB4, 0x04, 0x00, 0x50, 0x98, 0xF5, 0x82, 0xEB, 0x24, 0x02, 0xB4, 0x04, 0x00, 0x50, 0x8E, ++0x23, 0x23, 0x45, 0x82, 0x23, 0x90, 0x44, 0xC6, 0x73, 0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x45, ++0xFD, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, 0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, ++0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, 0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, ++0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, 0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, ++0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, 0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, ++0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, 0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, ++0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, 0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, ++0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, 0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, ++0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, 0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, ++0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, 0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, 0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, ++0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, 0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, ++0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, 0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, ++0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, 0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, ++0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, 0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, ++0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, 0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, ++0x81, 0x76, 0x30, 0x90, 0x49, 0x41, 0x74, 0x01, 0x93, 0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, ++0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, 0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, 0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, 0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, ++0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, ++0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, 0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, ++0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, 0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, ++0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, 0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, ++0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, 0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, ++0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, 0x04, 0x90, 0x49, 0x41, 0x93, 0xF6, 0x08, ++0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, ++0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, 0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x46, 0x46, ++0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, ++0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, 0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, ++0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, 0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, ++0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, 0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, ++0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, 0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, ++0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, 0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, ++0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, ++0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, 0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, ++0x30, 0xE2, 0x01, 0x0F, 0x02, 0x46, 0x45, 0x8F, 0xF0, 0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, ++0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, 0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x30, ++0x50, 0x2E, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, 0x60, 0x25, 0x7E, 0x02, 0x08, 0x30, 0xF0, ++0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x23, 0x0E, 0x30, 0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, ++0x12, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x13, 0x54, 0xEC, 0x4E, 0xF6, 0xD2, 0xAF, 0x02, 0x46, 0x46, ++0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, 0xC2, 0xAF, 0x56, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x4F, ++0xFF, 0x22, 0x02, 0x48, 0xE0, 0x02, 0x46, 0xD6, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, ++0x03, 0xF6, 0x80, 0x01, 0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, ++0x24, 0x0C, 0xC8, 0xC3, 0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, ++0x80, 0x01, 0x46, 0xF6, 0xDF, 0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, ++0x90, 0x49, 0x25, 0xE4, 0x7E, 0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, ++0x54, 0x1F, 0xFE, 0xE4, 0x93, 0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, ++0x40, 0xB8, 0xE4, 0x93, 0xA3, 0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, ++0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, ++0xE9, 0xDE, 0xE7, 0x80, 0xBE, 0x41, 0x95, 0x4C, 0x00, 0x41, 0x95, 0x4D, 0x00, 0x41, 0x95, 0x5F, ++0x00, 0x41, 0x94, 0x88, 0x00, 0x41, 0x94, 0x6A, 0x00, 0x44, 0x95, 0x3F, 0x00, 0x50, 0xF2, 0x01, ++0x00, 0x4B, 0xBB, 0x58, 0x00, 0x60, 0x00, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x82, ++0x75, 0x83, 0x00, 0xED, 0xF1, 0xC0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x95, 0x23, 0xEF, 0xF0, 0x90, 0x95, 0x25, 0xEB, 0xF0, 0xED, 0x60, 0x02, 0x21, ++0xFD, 0x90, 0x07, 0x6E, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x07, 0x65, 0xE0, 0x54, 0xE7, 0xF0, 0x90, ++0x95, 0x25, 0xE0, 0x70, 0x38, 0xB1, 0x87, 0x70, 0x2E, 0x12, 0xA5, 0xC3, 0x70, 0x12, 0x12, 0x37, ++0x4E, 0xE4, 0xFF, 0x74, 0x02, 0xB1, 0x21, 0x7F, 0x64, 0x51, 0x5B, 0xEF, 0x54, 0xFE, 0x80, 0x12, ++0x12, 0x37, 0x4E, 0xE4, 0xFE, 0x74, 0x80, 0xFF, 0xE4, 0xB1, 0x22, 0x7F, 0x64, 0x51, 0x5B, 0xEF, ++0x44, 0x01, 0xFD, 0x7F, 0x64, 0x31, 0x47, 0x7F, 0x4E, 0xD1, 0xE7, 0x41, 0x4D, 0xB1, 0x87, 0x70, ++0x05, 0xD1, 0x8E, 0xFF, 0xB1, 0x21, 0xD1, 0x97, 0xB1, 0x7C, 0x44, 0x01, 0xFD, 0x7F, 0x4F, 0x31, ++0x47, 0x7F, 0x30, 0xD1, 0x90, 0x74, 0x66, 0xFF, 0xEC, 0xF1, 0xF0, 0x7F, 0x30, 0x7E, 0x09, 0x12, ++0x38, 0x45, 0x7F, 0x2C, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0xEF, 0x54, 0xFC, 0xFF, 0xEF, 0x44, 0x01, ++0xFF, 0xEC, 0xF1, 0xF0, 0x7F, 0x2C, 0x7E, 0x09, 0x12, 0x38, 0x45, 0x80, 0x59, 0x90, 0x07, 0x6E, ++0xE0, 0x54, 0xF7, 0xF0, 0x90, 0x07, 0x65, 0xE0, 0x44, 0x18, 0xF0, 0x90, 0x95, 0x23, 0xE0, 0x70, ++0x3A, 0x90, 0x95, 0x25, 0xE0, 0x60, 0x11, 0x7F, 0x67, 0x51, 0x5B, 0xEF, 0x44, 0x20, 0xFD, 0x7F, ++0x67, 0x31, 0x47, 0xD1, 0x8E, 0xFF, 0x80, 0x21, 0x7F, 0x67, 0x51, 0x5B, 0xEF, 0x54, 0xDF, 0xFD, ++0x7F, 0x67, 0x31, 0x47, 0x12, 0xA5, 0xC3, 0x70, 0x0B, 0x12, 0x37, 0x4E, 0xE4, 0x74, 0x80, 0xFF, ++0x74, 0x02, 0x80, 0x05, 0x12, 0x37, 0x4E, 0xE4, 0xFF, 0xB1, 0x21, 0xD1, 0x97, 0xB1, 0x7C, 0x54, ++0xFE, 0xFD, 0x7F, 0x4F, 0x31, 0x47, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x8F, 0x82, 0x75, 0x83, 0x00, 0xE0, 0x90, 0x95, 0x5A, 0xF1, 0xC0, 0x90, 0x95, 0x5A, ++0xE0, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, ++0x55, 0xED, 0xF0, 0x90, 0x95, 0x54, 0xEF, 0xF0, 0xD3, 0x94, 0x07, 0x50, 0x41, 0x7F, 0x47, 0x71, ++0x1C, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0xFD, 0x7F, 0x47, 0x31, 0x47, 0x7F, 0x46, ++0x71, 0x1C, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0xFD, 0x7F, 0x46, 0xD1, 0x87, 0x60, 0x0D, ++0x7F, 0x45, 0x71, 0x1C, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0x80, 0x0C, 0x7F, 0x45, 0x71, ++0x1C, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0xFD, 0x7F, 0x45, 0x80, 0x45, 0x90, 0x95, ++0x54, 0xE0, 0x24, 0xF8, 0xF0, 0x7F, 0x63, 0x71, 0x1C, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, ++0x5F, 0xFD, 0x7F, 0x63, 0x31, 0x47, 0x7F, 0x62, 0x71, 0x1C, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, ++0x4F, 0xFD, 0x7F, 0x62, 0xD1, 0x87, 0x60, 0x0E, 0x71, 0x1A, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, ++0x4F, 0xFD, 0x7F, 0x61, 0x80, 0x0D, 0x71, 0x1A, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, ++0xFD, 0x7F, 0x61, 0x31, 0x47, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0x61, 0x51, 0x5B, 0x90, 0x95, ++0x54, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x22, 0x7F, 0xFF, 0x12, 0x5A, 0x47, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xF1, 0xF8, 0x7D, 0x01, 0x31, 0x5B, 0x12, 0x5D, 0x24, 0x71, 0x75, ++0x71, 0x62, 0x71, 0x62, 0x54, 0xFE, 0xFD, 0x7F, 0x02, 0x31, 0x47, 0x90, 0x01, 0x00, 0x74, 0x3F, ++0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x20, 0xF0, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x54, 0xFE, 0xFD, 0x7F, 0x02, 0x31, 0x47, 0x7F, 0x02, 0x51, 0x5B, 0xEF, 0x44, 0x01, ++0xFD, 0x7F, 0x02, 0x31, 0x47, 0x7F, 0x02, 0x51, 0x5B, 0xEF, 0x22, 0x7F, 0x54, 0x51, 0x5B, 0xE5, ++0x0D, 0x5F, 0xF5, 0x11, 0x7F, 0x55, 0x51, 0x5B, 0xE5, 0x0E, 0x5F, 0xF5, 0x12, 0x7F, 0x56, 0x51, ++0x5B, 0xE5, 0x0F, 0x5F, 0xF5, 0x13, 0x7F, 0x57, 0x51, 0x5B, 0xE5, 0x10, 0x5F, 0xF5, 0x14, 0xAD, ++0x11, 0x7F, 0x54, 0x31, 0x47, 0xAD, 0x12, 0x7F, 0x55, 0x31, 0x47, 0xAD, 0x13, 0x7F, 0x56, 0x31, ++0x47, 0xAD, 0x14, 0x7F, 0x57, 0x31, 0x47, 0x53, 0x91, 0xEF, 0x22, 0x7F, 0x81, 0x51, 0x5B, 0xEF, ++0x54, 0xFE, 0xFD, 0x7F, 0x81, 0x31, 0x47, 0x7F, 0x80, 0xD1, 0xE7, 0xFD, 0x7F, 0x80, 0x31, 0x47, ++0x12, 0x97, 0x87, 0x12, 0x3E, 0x11, 0x12, 0x97, 0x94, 0x12, 0x98, 0x50, 0x7F, 0x01, 0x12, 0x47, ++0x0E, 0x90, 0x93, 0x3F, 0x74, 0x02, 0xF0, 0xFF, 0x12, 0x47, 0x0E, 0x90, 0x93, 0x3F, 0xE0, 0x04, ++0xF0, 0x91, 0x27, 0x12, 0x88, 0xE1, 0x90, 0x01, 0xCC, 0x74, 0x0F, 0xF0, 0x7F, 0x80, 0xF1, 0x85, ++0x7F, 0x80, 0x31, 0x47, 0x75, 0x28, 0xFF, 0x12, 0x57, 0xF9, 0x12, 0x97, 0xD5, 0x12, 0x9A, 0x4C, ++0x7F, 0x81, 0x51, 0x5B, 0xEF, 0x44, 0x04, 0xFD, 0x7F, 0x81, 0x31, 0x47, 0x12, 0x98, 0x5A, 0x12, ++0x9A, 0x9A, 0xE4, 0xFF, 0x02, 0x47, 0x97, 0xF1, 0x8C, 0x90, 0x8D, 0x07, 0xEF, 0xF0, 0xD1, 0x9F, ++0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x04, 0x23, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x17, 0x51, ++0x5B, 0xEF, 0x54, 0xFC, 0x44, 0x04, 0xFD, 0x7F, 0x17, 0x31, 0x47, 0x7F, 0x16, 0x51, 0x5B, 0xEF, ++0x54, 0x0F, 0x44, 0x40, 0xFD, 0x7F, 0x16, 0x31, 0x47, 0x7F, 0x38, 0xF1, 0x85, 0x7F, 0x38, 0x31, ++0x47, 0x02, 0x37, 0x99, 0xAD, 0x07, 0x90, 0x8E, 0xB3, 0xE0, 0x75, 0xF0, 0x40, 0xA4, 0xFF, 0x90, ++0x95, 0x19, 0xE5, 0xF0, 0x12, 0xA5, 0xCC, 0x90, 0x8E, 0xB4, 0xE0, 0xC3, 0x13, 0x54, 0x7F, 0x90, ++0x95, 0x1C, 0xF0, 0x90, 0x8E, 0xB5, 0xE0, 0x13, 0x13, 0x54, 0x01, 0x90, 0x95, 0x1D, 0xF0, 0xED, ++0x64, 0x01, 0x70, 0x6E, 0xE0, 0x70, 0x15, 0x90, 0x95, 0x19, 0xE0, 0x70, 0x02, 0xA3, 0xE0, 0x60, ++0x0B, 0x90, 0x95, 0x19, 0x74, 0xFF, 0x75, 0xF0, 0xD0, 0x12, 0x08, 0xD6, 0xB1, 0x12, 0x54, 0x07, ++0x7D, 0x00, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x51, 0x77, 0xB1, 0x12, 0x54, 0x01, 0xFD, 0x51, 0x77, ++0x90, 0x8E, 0xB4, 0xE0, 0x30, 0xE0, 0x3B, 0xB1, 0x03, 0x54, 0x07, 0x7D, 0x00, 0x20, 0xE0, 0x02, ++0x7D, 0x01, 0x51, 0x77, 0xE4, 0x90, 0x95, 0x1B, 0xF0, 0x90, 0x95, 0x1C, 0xE0, 0xFF, 0x90, 0x95, ++0x1B, 0xE0, 0xC3, 0x9F, 0x50, 0x1C, 0xB1, 0x03, 0x54, 0x01, 0xFD, 0x51, 0x77, 0xB1, 0x03, 0x54, ++0x07, 0x7D, 0x00, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x51, 0x77, 0x90, 0x95, 0x1B, 0xE0, 0x04, 0xF0, ++0x80, 0xD7, 0x22, 0x90, 0x95, 0x19, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x95, 0x1D, 0xE0, 0xFD, ++0xB1, 0xE5, 0x90, 0x8E, 0xB2, 0xE0, 0x54, 0x7F, 0xFF, 0x90, 0x8E, 0xB1, 0xE0, 0xFE, 0xC4, 0x13, ++0x22, 0xFE, 0xEC, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x48, 0x7E, 0x09, 0x02, 0x38, 0x45, ++0x90, 0x8E, 0x42, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x8E, 0x51, 0xE0, 0xFD, 0x7F, 0x93, 0x31, 0x47, ++0x90, 0x8E, 0x47, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, ++0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x7F, 0x08, 0x51, 0x5B, 0xEF, 0x44, 0x10, 0xFD, ++0x7F, 0x08, 0x31, 0x47, 0x7F, 0x01, 0x12, 0x89, 0x3D, 0x7F, 0x90, 0x51, 0x5B, 0xEF, 0x44, 0x01, ++0xFD, 0x7F, 0x90, 0x31, 0x47, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x3E, 0x50, 0xFD, 0x7F, 0x4E, 0x31, ++0x47, 0x7F, 0x4F, 0x51, 0x5B, 0xEF, 0x22, 0x7F, 0x67, 0x51, 0x5B, 0xEF, 0x44, 0x20, 0xFD, 0x7F, ++0x67, 0x31, 0x47, 0x90, 0x95, 0x23, 0xE0, 0x22, 0x90, 0x01, 0x30, 0xE4, 0xB1, 0xDD, 0x90, 0x01, ++0x38, 0xB1, 0xDD, 0xFD, 0x7F, 0x50, 0x31, 0x47, 0xE4, 0xFD, 0x7F, 0x51, 0x31, 0x47, 0xE4, 0xFD, ++0x7F, 0x52, 0x31, 0x47, 0xE4, 0xFD, 0x7F, 0x53, 0x21, 0x47, 0x90, 0x01, 0x34, 0x74, 0xFF, 0xB1, ++0xDD, 0x90, 0x01, 0x3C, 0xB1, 0xDD, 0xFD, 0x7F, 0x54, 0x31, 0x47, 0x7D, 0xFF, 0x7F, 0x55, 0x31, ++0x47, 0x7D, 0xFF, 0x7F, 0x56, 0x31, 0x47, 0x7D, 0xFF, 0x7F, 0x57, 0x21, 0x47, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8E, 0x26, 0x8F, 0x27, ++0xBD, 0x01, 0x15, 0xE5, 0x27, 0x78, 0x03, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0xEE, ++0x54, 0x1F, 0xFE, 0x12, 0x3D, 0xC2, 0x80, 0x07, 0xAF, 0x27, 0xAE, 0x26, 0x12, 0x3E, 0x50, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0x01, 0xE0, 0x44, ++0x02, 0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, 0x90, 0x06, ++0xB4, 0x74, 0x86, 0xF0, 0xF1, 0xF8, 0xE4, 0xFD, 0x31, 0x5B, 0x71, 0x75, 0x44, 0x01, 0xFD, 0x7F, ++0x02, 0x31, 0x47, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD1, ++0x81, 0x30, 0xE6, 0x28, 0x90, 0x00, 0x8C, 0xE0, 0x90, 0x95, 0x43, 0xF0, 0x7F, 0x8D, 0x51, 0x5B, ++0x90, 0x95, 0x44, 0xEF, 0xF0, 0x90, 0x00, 0x8E, 0xE0, 0x90, 0x95, 0x45, 0xF0, 0x90, 0x95, 0x44, ++0xE0, 0xD1, 0x81, 0x30, 0xE0, 0x06, 0xE4, 0xFD, 0x7F, 0x8D, 0x31, 0x47, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x7F, 0x8F, 0x51, 0x5B, 0xEF, 0x22, 0x31, 0x47, 0x90, 0x95, 0x55, 0xE0, 0x22, 0x7F, 0x48, ++0x7E, 0x09, 0x12, 0x37, 0x4E, 0xE4, 0x22, 0x7F, 0x4E, 0x51, 0x5B, 0xEF, 0x54, 0x7F, 0x22, 0xB1, ++0x98, 0xB1, 0xBA, 0x12, 0x97, 0x49, 0x12, 0x97, 0x68, 0xE4, 0xF5, 0x0D, 0xF5, 0x0E, 0xF5, 0x0F, ++0x75, 0x10, 0x80, 0xAD, 0x0D, 0x7F, 0x50, 0x31, 0x47, 0xAD, 0x0E, 0x7F, 0x51, 0x31, 0x47, 0xAD, ++0x0F, 0x7F, 0x52, 0x31, 0x47, 0xAD, 0x10, 0x7F, 0x53, 0x21, 0x47, 0x90, 0x8D, 0x07, 0xE0, 0xB4, ++0x02, 0x14, 0x12, 0xA5, 0xE4, 0x7F, 0xF2, 0x51, 0x5B, 0xEF, 0x20, 0xE6, 0x09, 0x7F, 0x05, 0xD1, ++0xE7, 0xFD, 0x7F, 0x05, 0x31, 0x47, 0x22, 0x51, 0x5B, 0xEF, 0x44, 0x80, 0x22, 0x12, 0x71, 0x9A, ++0xE4, 0x90, 0x93, 0x39, 0xB1, 0xDD, 0x90, 0x90, 0x8B, 0xB1, 0xDD, 0xA3, 0xB1, 0xDD, 0xA3, 0xF0, ++0xA3, 0xF0, 0x90, 0x90, 0x9D, 0xF0, 0xA3, 0xF0, 0x90, 0x90, 0xDF, 0xF0, 0xA3, 0xF0, 0x22, 0x90, ++0x8E, 0x48, 0xE0, 0x90, 0x94, 0x84, 0xF0, 0x7D, 0x02, 0x7F, 0x02, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x95, 0x60, 0xEF, 0xF0, 0x14, 0x60, 0x15, 0x14, 0x60, 0x19, 0x24, 0x02, 0x70, ++0x1A, 0xED, 0x54, 0x01, 0xFF, 0x90, 0x8E, 0x41, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x80, 0x0C, 0x90, ++0x8E, 0x49, 0xED, 0xF0, 0x80, 0x05, 0x90, 0x8E, 0x48, 0xED, 0xF0, 0xD1, 0x81, 0x30, 0xE4, 0x30, ++0x90, 0x95, 0x60, 0xE0, 0x14, 0x60, 0x07, 0x14, 0x60, 0x1D, 0x24, 0x02, 0x70, 0x22, 0x90, 0x8E, ++0x41, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, 0xFF, 0x90, 0x8E, 0x49, 0xE0, 0x54, ++0x7F, 0x4F, 0xFD, 0x7F, 0x88, 0x80, 0x07, 0x90, 0x8E, 0x48, 0xE0, 0xFD, 0x7F, 0x89, 0x31, 0x47, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x51, 0x5B, 0xEF, 0x44, 0x40, 0xFD, 0x22, 0x7F, 0xF4, 0x51, 0x5B, ++0xEF, 0x20, 0xE5, 0x0D, 0x7F, 0xF4, 0x51, 0x5B, 0xEF, 0x7F, 0x01, 0x20, 0xE4, 0x05, 0x7F, 0x02, ++0x22, 0x7F, 0x03, 0x22, 0x12, 0x9A, 0x2D, 0x7F, 0x08, 0x51, 0x5B, 0xEF, 0x54, 0xEF, 0xFD, 0x7F, ++0x08, 0x31, 0x47, 0xE4, 0xFF, 0x12, 0x89, 0x3D, 0x90, 0x8E, 0x42, 0xE0, 0x54, 0xEF, 0xF0, 0x22, ++0xF0, 0x7F, 0x10, 0x7E, 0x00, 0x02, 0x3E, 0x50, 0xD1, 0x14, 0xE4, 0xFD, 0xFF, 0x02, 0x5A, 0x47, ++0xF1, 0xC8, 0x7D, 0x0C, 0x7F, 0x01, 0xE1, 0x1B, 0x90, 0x95, 0x61, 0xEF, 0xF0, 0xD1, 0x14, 0x90, ++0x95, 0x61, 0xE0, 0x60, 0x02, 0xF1, 0xCA, 0x7D, 0x04, 0x7F, 0x01, 0xE1, 0x1B, 0x12, 0x43, 0xF3, ++0x90, 0xAA, 0xB9, 0x02, 0x08, 0x6D, 0xC1, 0x48, 0x90, 0x8E, 0xCC, 0xE0, 0xFF, 0x90, 0x8E, 0xCB, ++0xE0, 0xFB, 0x90, 0x8E, 0xCD, 0xE0, 0x90, 0x95, 0x26, 0xF0, 0x22, 0xF0, 0xE4, 0x90, 0x95, 0x0B, ++0xF0, 0x90, 0x8E, 0xA4, 0xE0, 0x90, 0x95, 0x0C, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x07, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, ++0x95, 0x0B, 0xE0, 0xF5, 0x3B, 0xA3, 0xE0, 0xF5, 0x3C, 0x12, 0x36, 0x3E, 0x90, 0x95, 0x07, 0x12, ++0x87, 0x5C, 0xA3, 0xA3, 0xA3, 0x74, 0x05, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xF5, 0x57, ++0x90, 0x8E, 0x46, 0xE0, 0x70, 0x02, 0x21, 0x0B, 0x12, 0x6F, 0xEF, 0x60, 0x02, 0x21, 0x0B, 0x31, ++0x0D, 0x12, 0x43, 0xD5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x31, ++0x26, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x43, ++0xD5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x31, 0x26, 0x78, 0x18, 0x12, 0x08, ++0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0xA2, 0x1E, 0x44, 0x80, 0xF0, 0x12, ++0xA5, 0xF3, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, 0x70, 0x1E, 0x90, 0x8E, 0x4D, 0xE0, 0x14, ++0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0x8E, 0x4F, 0xE0, 0x60, 0x0E, 0xEF, 0x70, 0x08, 0x90, 0x8E, ++0x4C, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x57, 0x01, 0xE5, 0x57, 0x60, 0x3E, 0x12, 0xA2, 0x16, ++0x90, 0x8E, 0x4F, 0xE0, 0x60, 0x04, 0x64, 0x01, 0x70, 0x13, 0xE4, 0x90, 0x95, 0x0B, 0xF0, 0x90, ++0x8E, 0x4F, 0xE0, 0xF1, 0xC9, 0x11, 0x15, 0x90, 0x8E, 0x4F, 0xE0, 0x80, 0x0E, 0xE4, 0x90, 0x95, ++0x0B, 0x12, 0x8D, 0xD7, 0xF1, 0xC9, 0x11, 0x15, 0x12, 0x8D, 0xD8, 0xF1, 0xC9, 0x90, 0x8E, 0x5F, ++0xF0, 0x90, 0x8E, 0x49, 0xE0, 0x20, 0xE2, 0x03, 0x12, 0x58, 0x5F, 0x22, 0xF0, 0x90, 0x05, 0x61, ++0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x08, 0x12, 0x08, 0x5A, 0xA8, 0x04, 0xA9, 0x05, 0xAA, ++0x06, 0xAB, 0x07, 0x90, 0x05, 0x60, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90, 0x93, 0x63, 0xF0, 0xA3, 0xF0, 0x90, 0x93, 0x68, 0xF0, 0x90, ++0x02, 0x09, 0xE0, 0x90, 0x93, 0x69, 0xF0, 0x90, 0x93, 0x3D, 0x12, 0x87, 0xD1, 0x90, 0x93, 0x63, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x71, 0x7B, 0xE0, 0x90, 0x90, 0xE1, 0xF0, 0x74, 0x01, 0x2F, 0xF1, ++0x25, 0xE0, 0x90, 0x90, 0xE2, 0xF0, 0x12, 0x7E, 0x63, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0x78, 0x10, ++0x12, 0x08, 0x5A, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x12, 0x7E, 0x51, 0x31, 0x26, ++0x78, 0x18, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x42, 0x90, ++0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xF1, 0x1E, 0x31, 0x26, 0x78, 0x08, 0x12, 0x08, ++0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x71, 0x6B, 0x31, 0x26, 0x12, 0x42, 0x90, ++0x90, 0x90, 0xE5, 0x12, 0x7E, 0x60, 0x31, 0x26, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xC0, 0x04, 0xC0, ++0x05, 0xC0, 0x06, 0xC0, 0x07, 0x12, 0x7E, 0x51, 0x31, 0x26, 0x78, 0x18, 0x12, 0x08, 0x5A, 0xD0, ++0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x42, 0x90, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0xF1, 0x1E, 0x31, 0x26, 0x78, 0x08, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x71, 0x6B, 0x31, 0x26, 0x12, 0x42, 0x90, 0x90, 0x90, 0xE9, 0x12, 0x7E, 0x60, ++0x31, 0x26, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x12, ++0x7E, 0x51, 0x31, 0x26, 0x78, 0x18, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, ++0x00, 0x12, 0x42, 0x90, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xF1, 0x1E, 0x31, 0x26, ++0x78, 0x08, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x71, 0x6B, 0x31, ++0x26, 0x12, 0x42, 0x90, 0x90, 0x90, 0xED, 0x12, 0x08, 0x6D, 0x90, 0x93, 0x63, 0xE4, 0x75, 0xF0, ++0x04, 0xF1, 0xC0, 0xF1, 0xE8, 0x71, 0x7B, 0xE0, 0xFF, 0x12, 0x86, 0xFC, 0x71, 0x85, 0xE0, 0xB4, ++0x10, 0xF1, 0xF1, 0xB9, 0xF1, 0xE8, 0x71, 0x7B, 0xE0, 0xFF, 0x74, 0x01, 0x2E, 0xF5, 0x82, 0xE4, ++0x34, 0x91, 0x71, 0x85, 0xE0, 0xB4, 0x10, 0xEC, 0xF1, 0xB9, 0xF1, 0xE8, 0x71, 0x7B, 0xE0, 0xFF, ++0x74, 0x11, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x91, 0x71, 0x85, 0xE0, 0xB4, 0x10, 0xEC, 0xF1, 0xB9, ++0x90, 0x93, 0x65, 0xE0, 0xFF, 0xC3, 0x94, 0x08, 0x50, 0x1F, 0x90, 0x93, 0x63, 0xA3, 0xE0, 0xFE, ++0xEF, 0x2E, 0x71, 0x7B, 0xE0, 0xFE, 0x90, 0x93, 0x69, 0xE0, 0xFD, 0xEE, 0x2D, 0xFE, 0x74, 0x21, ++0x2F, 0x12, 0xA5, 0xDC, 0xEE, 0x71, 0x88, 0x80, 0xD7, 0x90, 0x93, 0x3D, 0xE0, 0x04, 0x90, 0x93, ++0x67, 0xF0, 0xE4, 0x90, 0x93, 0x66, 0xF0, 0x90, 0x90, 0xE1, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x24, ++0x01, 0xFF, 0xE4, 0x33, 0xFE, 0x90, 0x93, 0x66, 0xE0, 0xC3, 0x9F, 0xEE, 0x12, 0x8C, 0xE2, 0x50, ++0x73, 0xA3, 0x12, 0x7C, 0xD8, 0xE4, 0x12, 0xA5, 0xCC, 0x90, 0x93, 0x65, 0xE0, 0xFD, 0xC3, 0x94, ++0x04, 0x50, 0x56, 0xA3, 0xE0, 0x75, 0xF0, 0x04, 0xA4, 0x7C, 0x00, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, ++0xFE, 0x90, 0x90, 0xE1, 0xE0, 0xFD, 0xC3, 0xEF, 0x9D, 0x74, 0x80, 0xF8, 0x6E, 0x98, 0x50, 0x39, ++0xEF, 0x78, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x24, 0x29, 0xF9, 0x74, 0x91, 0x3E, ++0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x01, 0x90, 0x93, 0x63, 0xA3, 0xE0, 0x24, 0x00, 0xF9, 0xE4, ++0x34, 0xFC, 0x8B, 0x40, 0xF5, 0x41, 0x89, 0x42, 0x75, 0x43, 0x20, 0xD0, 0x01, 0xD0, 0x03, 0x12, ++0x5F, 0x8B, 0x12, 0x86, 0xE6, 0x71, 0x89, 0x80, 0xA0, 0x12, 0xA4, 0xFE, 0x90, 0x93, 0x66, 0xE0, ++0x04, 0xF0, 0x41, 0xC7, 0xE4, 0x90, 0x93, 0x65, 0xF0, 0xE4, 0xFF, 0x0F, 0xEF, 0xB4, 0x20, 0xFB, ++0x71, 0x89, 0xE0, 0xB4, 0x10, 0xF3, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x42, 0x90, 0xA8, 0x04, ++0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, 0x93, 0x63, 0xA3, 0xE0, 0x24, 0x00, 0xF5, 0x82, 0xE4, ++0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x93, 0x65, 0xE0, 0x04, 0xF0, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x52, 0xED, 0xF0, 0xE4, 0xA3, 0xF0, 0xEF, ++0x14, 0x60, 0x02, 0x81, 0x75, 0x90, 0x06, 0x03, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x95, 0x52, 0xE0, ++0xFB, 0xC4, 0x33, 0x54, 0xE0, 0xFE, 0x90, 0x04, 0x42, 0xE0, 0x54, 0x9F, 0x4E, 0xFE, 0xF0, 0xE4, ++0xFD, 0x12, 0x9A, 0x72, 0x90, 0x95, 0x53, 0xEF, 0xF0, 0x90, 0x04, 0x83, 0xF0, 0x90, 0x94, 0xB3, ++0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x01, 0x90, 0x94, 0xB7, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, ++0x01, 0xB1, 0x40, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x01, 0x90, 0x94, 0xB7, 0x12, 0x08, 0x79, ++0x00, 0x00, 0x00, 0x01, 0x7F, 0x00, 0x7E, 0x09, 0xB1, 0x44, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, ++0x10, 0x90, 0x95, 0x52, 0x31, 0x26, 0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78, 0x01, 0x12, 0x08, 0x47, ++0x78, 0x04, 0xF1, 0xA4, 0x7F, 0x00, 0x7E, 0x0A, 0xB1, 0x44, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, ++0x00, 0x90, 0x95, 0x52, 0x31, 0x26, 0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78, 0x0A, 0xF1, 0xA4, 0x7F, ++0x00, 0x7E, 0x0D, 0xB1, 0x44, 0x12, 0x08, 0x79, 0x0C, 0x00, 0x00, 0x00, 0x90, 0x95, 0x53, 0x31, ++0x26, 0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78, 0x1A, 0xF1, 0xA4, 0x7F, 0x18, 0xB1, 0x42, 0x12, 0x08, ++0x79, 0x00, 0x00, 0x0C, 0x00, 0x90, 0x94, 0xB7, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0x12, ++0xA5, 0x66, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0x90, 0x94, 0xA5, 0x12, 0x08, 0x79, 0x00, ++0x00, 0x04, 0x00, 0x80, 0x59, 0x90, 0x06, 0x03, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x94, 0xB3, 0x12, ++0x08, 0x79, 0x00, 0x00, 0x00, 0x01, 0x90, 0x94, 0xB7, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, ++0xB1, 0x40, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x01, 0x90, 0x94, 0xB7, 0x12, 0x08, 0x79, 0x00, ++0x00, 0x00, 0x00, 0x7F, 0x00, 0x7E, 0x09, 0xB1, 0x44, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, ++0x90, 0x94, 0xB7, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0x12, 0xA5, 0x66, 0x12, 0x08, 0x79, ++0x00, 0x00, 0x0C, 0x00, 0x90, 0x94, 0xA5, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0x7D, 0x18, ++0x7C, 0x00, 0xE4, 0xFF, 0x12, 0x7A, 0xD7, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0x58, 0x7E, 0x0C, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x94, 0xB1, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, ++0x37, 0x4E, 0x90, 0x94, 0xBB, 0x12, 0x08, 0x6D, 0x90, 0x94, 0xB3, 0x12, 0x43, 0xF3, 0x12, 0x08, ++0x3A, 0x90, 0x94, 0xBB, 0xF1, 0xF3, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x94, ++0xB3, 0x12, 0x43, 0xF3, 0x90, 0x94, 0xB7, 0xF1, 0xF3, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, ++0x00, 0x12, 0x43, 0xD5, 0x90, 0x94, 0xBF, 0x12, 0x08, 0x6D, 0x90, 0x94, 0xBF, 0x12, 0x4F, 0xED, ++0x90, 0x94, 0xB1, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x38, 0x45, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x7F, 0x00, 0x7E, 0x08, 0x91, 0xE0, 0x90, 0x94, 0xB3, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x94, 0xF2, 0xEC, 0x12, 0xA6, 0x0B, 0xAA, 0x07, 0x90, 0x94, 0xF9, 0x12, 0x08, 0x79, ++0x00, 0x00, 0x00, 0x00, 0x12, 0xA5, 0x5B, 0xEA, 0x24, 0xEF, 0x60, 0x41, 0x24, 0xD7, 0x70, 0x02, ++0xC1, 0xBF, 0x24, 0x3A, 0x60, 0x02, 0xC1, 0xFE, 0xF1, 0xD0, 0x24, 0x0A, 0xF1, 0xDF, 0xED, 0xF0, ++0xFE, 0x71, 0x7B, 0xE4, 0xF0, 0x74, 0x01, 0x2E, 0xF1, 0x25, 0xE4, 0xF0, 0xFE, 0x74, 0x00, 0x2F, ++0x12, 0xA6, 0x03, 0x7D, 0x14, 0xF1, 0x2D, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x00, 0xF1, 0xAD, 0x90, ++0xAC, 0x6A, 0x12, 0x08, 0x6D, 0x7D, 0x14, 0x7C, 0x00, 0xE4, 0xFF, 0xC1, 0xBA, 0x90, 0x94, 0xF2, ++0xE4, 0x75, 0xF0, 0x14, 0x12, 0x08, 0xD6, 0x90, 0x94, 0xF2, 0xA3, 0xE0, 0xFB, 0xFF, 0x24, 0x06, ++0xFC, 0xF1, 0xE0, 0xCC, 0xF0, 0x90, 0x94, 0xFD, 0xA3, 0xE0, 0xFE, 0x71, 0x7B, 0xE4, 0xF0, 0x74, ++0x01, 0x2E, 0xF1, 0x25, 0xE4, 0xF0, 0x74, 0x04, 0x2F, 0x12, 0x7D, 0xEE, 0xFE, 0xA9, 0x03, 0x74, ++0x05, 0x29, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x12, 0x7C, 0xE9, 0xFE, 0x90, 0x94, 0xF7, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x94, 0xF2, 0xE0, 0xFC, 0xA3, 0xE0, 0x2F, 0xFF, 0xEC, 0x3E, 0xFE, ++0xD3, 0xEF, 0x94, 0x00, 0xEE, 0x94, 0x01, 0x90, 0x94, 0xF2, 0x40, 0x6B, 0xE0, 0xFE, 0xA3, 0xE0, ++0xFF, 0xE9, 0x7C, 0x00, 0x24, 0x00, 0xF9, 0xEC, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xC3, 0xE4, 0x9F, ++0xFD, 0x74, 0x01, 0x9E, 0xFC, 0xF1, 0x2F, 0x90, 0x94, 0xF4, 0xE0, 0x24, 0x01, 0xFF, 0xE4, 0x33, ++0xA2, 0xE7, 0x13, 0xEF, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0x12, 0xA4, 0xE9, 0xC0, 0x00, 0xC0, 0x01, ++0xC0, 0x02, 0xC0, 0x03, 0x7B, 0x01, 0x7A, 0xFC, 0x79, 0x00, 0x90, 0x94, 0xF2, 0xE0, 0xFE, 0xA3, ++0xE0, 0xFF, 0xC3, 0xE4, 0x9F, 0xFF, 0x74, 0x01, 0x9E, 0xFE, 0xF1, 0xD7, 0xC3, 0x9F, 0xFD, 0xEC, ++0x9E, 0xFC, 0x12, 0x26, 0x4E, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x42, 0x90, ++0xF1, 0x32, 0x12, 0xA5, 0x5B, 0x80, 0x0E, 0xA3, 0xE0, 0x7E, 0x00, 0x24, 0x00, 0x12, 0xA6, 0x03, ++0xF1, 0xD7, 0xFD, 0xF1, 0x2F, 0x90, 0x94, 0xF2, 0x74, 0xFF, 0x75, 0xF0, 0xEC, 0x12, 0x08, 0xD6, ++0xF1, 0xD0, 0x7E, 0x00, 0x24, 0x0C, 0xF9, 0xEE, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xC0, 0x02, 0xC0, ++0x01, 0x74, 0x10, 0x2F, 0xF9, 0xEE, 0x34, 0xFC, 0xFA, 0xF1, 0xAD, 0x90, 0xAC, 0x6A, 0x12, 0x08, ++0x6D, 0xF1, 0xD7, 0xFD, 0xD0, 0x01, 0xD0, 0x02, 0x7F, 0x11, 0x12, 0x1B, 0xAC, 0x80, 0x37, 0xF1, ++0xD0, 0x24, 0x2A, 0xF1, 0xDF, 0xED, 0xF0, 0xFE, 0x71, 0x7B, 0xE4, 0xF0, 0x74, 0x01, 0x2E, 0xF1, ++0x25, 0xE4, 0xF0, 0x12, 0x87, 0x65, 0x7D, 0x48, 0xF1, 0x2D, 0xF1, 0xB3, 0x12, 0xA4, 0xE4, 0x12, ++0x42, 0x90, 0xE4, 0xFD, 0xFC, 0xF1, 0x32, 0xF1, 0xB3, 0x12, 0xA4, 0xE4, 0x12, 0x42, 0x90, 0xF1, ++0x32, 0xF1, 0xB3, 0x12, 0x08, 0x3A, 0x90, 0x94, 0xF5, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x94, ++0xF5, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xEC, 0xFF, 0x90, 0x94, 0xFD, 0xA3, 0xE0, 0xFE, 0x71, 0x7B, ++0xEF, 0xF0, 0x74, 0x01, 0x2E, 0xF1, 0x25, 0xED, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x93, ++0x63, 0xA3, 0xE0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x7C, 0x00, 0x12, ++0x26, 0x4E, 0x90, 0x94, 0xF9, 0x02, 0x08, 0x6D, 0x90, 0x8E, 0x2C, 0x12, 0x8F, 0xB6, 0x30, 0xE0, ++0x08, 0x12, 0xA5, 0xEB, 0xE4, 0x90, 0x94, 0x87, 0xF0, 0x90, 0x94, 0xB3, 0x12, 0x08, 0x79, 0x00, ++0x00, 0x00, 0x7F, 0x90, 0x94, 0x6D, 0x31, 0x26, 0xF1, 0xA7, 0x7F, 0x50, 0x7E, 0x0C, 0xB1, 0x44, ++0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x7F, 0x90, 0x94, 0x6E, 0x31, 0x26, 0xF1, 0xA7, 0x91, 0xDC, ++0x90, 0x94, 0x83, 0xE0, 0x90, 0x06, 0x08, 0xF0, 0x90, 0x94, 0x85, 0xA3, 0xE0, 0x90, 0x06, 0xA0, ++0xF0, 0xA3, 0xE4, 0xF0, 0x90, 0x94, 0x71, 0xE0, 0xFF, 0x60, 0x05, 0xA3, 0xE0, 0xFD, 0x71, 0x90, ++0x90, 0x94, 0x70, 0xE0, 0xFF, 0x60, 0x0C, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB, 0x12, 0xA5, 0x7B, ++0x12, 0x7A, 0x54, 0x22, 0x12, 0x08, 0x5A, 0x90, 0x94, 0xB7, 0x02, 0x08, 0x6D, 0x90, 0xAC, 0x67, ++0x12, 0x44, 0x20, 0x90, 0x94, 0xF9, 0x02, 0x43, 0xF3, 0x90, 0x93, 0x63, 0xE4, 0x75, 0xF0, 0x10, ++0x12, 0x08, 0xD6, 0xE4, 0x90, 0x93, 0x65, 0xF0, 0x22, 0xFF, 0x90, 0x8E, 0x4E, 0xE0, 0x2F, 0x22, ++0x90, 0x94, 0xF2, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x94, 0xF7, 0xE0, 0xFC, 0xA3, 0xE0, 0x22, 0xFD, ++0xE4, 0x33, 0x90, 0x94, 0xFD, 0xF0, 0xA3, 0x22, 0x90, 0x93, 0x63, 0xA3, 0xE0, 0xFF, 0xA3, 0xE0, ++0xFE, 0x2F, 0x22, 0x12, 0x43, 0xFF, 0x02, 0x43, 0xC8, 0x75, 0xE8, 0x03, 0x75, 0xA8, 0x85, 0x22, ++0xE4, 0x90, 0x93, 0x55, 0xF0, 0x90, 0x93, 0x55, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0x00, 0x90, 0x01, ++0xC4, 0xF0, 0x74, 0x58, 0xA3, 0xF0, 0x12, 0x3E, 0x44, 0xBF, 0x01, 0x03, 0x12, 0x31, 0xFC, 0xC2, ++0xAF, 0x90, 0x8E, 0x46, 0xE0, 0x60, 0x0E, 0x90, 0x8E, 0x49, 0xE0, 0xFF, 0x90, 0x8E, 0x48, 0xE0, ++0x6F, 0x60, 0x02, 0x11, 0x56, 0xC2, 0xAF, 0x12, 0x98, 0x31, 0xBF, 0x01, 0x03, 0x12, 0xA1, 0x13, ++0xD2, 0xAF, 0xD2, 0xAF, 0x90, 0x93, 0x4C, 0xE0, 0xB4, 0x01, 0x03, 0x12, 0x9A, 0xC1, 0x12, 0x4F, ++0xF6, 0x12, 0x46, 0x46, 0x80, 0xAF, 0x90, 0x8E, 0x48, 0xE0, 0xFF, 0x7D, 0x01, 0x80, 0x04, 0x7D, ++0x01, 0x7F, 0x04, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x62, 0xED, 0xF0, 0x90, ++0x8E, 0x41, 0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0x21, 0xAA, 0xEE, 0x12, ++0x72, 0x26, 0x30, 0xE0, 0x02, 0x21, 0xAA, 0x90, 0x8E, 0x49, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0x21, ++0xAA, 0xEF, 0x70, 0x02, 0x21, 0x24, 0x24, 0xFE, 0x70, 0x02, 0x21, 0x5E, 0x24, 0xFE, 0x60, 0x4B, ++0x24, 0xFC, 0x70, 0x02, 0x21, 0x9A, 0x24, 0xFC, 0x60, 0x02, 0x21, 0xAA, 0xEE, 0xB4, 0x0E, 0x02, ++0x31, 0xD6, 0x90, 0x8E, 0x49, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x4F, 0xD8, 0x90, 0x8E, 0x49, ++0xE0, 0xB4, 0x06, 0x02, 0x31, 0xF2, 0x90, 0x8E, 0x49, 0xE0, 0xB4, 0x04, 0x0F, 0x90, 0x95, 0x62, ++0xE0, 0xFF, 0x60, 0x05, 0x12, 0xA1, 0x2F, 0x80, 0x03, 0x12, 0x6F, 0x93, 0x90, 0x8E, 0x49, 0xE0, ++0x64, 0x08, 0x60, 0x02, 0x21, 0xAA, 0x12, 0x4F, 0xD0, 0x21, 0xAA, 0x90, 0x8E, 0x49, 0xE0, 0x70, ++0x05, 0x7F, 0x01, 0x12, 0x4F, 0xD8, 0x90, 0x8E, 0x49, 0xE0, 0xB4, 0x06, 0x02, 0x31, 0xF2, 0x90, ++0x8E, 0x49, 0xE0, 0xB4, 0x0E, 0x07, 0x31, 0xAF, 0xBF, 0x01, 0x02, 0x31, 0xD6, 0x90, 0x8E, 0x49, ++0xE0, 0x64, 0x0C, 0x60, 0x02, 0x21, 0xAA, 0x31, 0xAF, 0xEF, 0x64, 0x01, 0x60, 0x02, 0x21, 0xAA, ++0x51, 0x14, 0x21, 0xAA, 0x90, 0x8E, 0x49, 0xE0, 0xB4, 0x0E, 0x07, 0x31, 0xAF, 0xBF, 0x01, 0x02, ++0x31, 0xD6, 0x90, 0x8E, 0x49, 0xE0, 0xB4, 0x06, 0x02, 0x31, 0xF2, 0x90, 0x8E, 0x49, 0xE0, 0xB4, ++0x0C, 0x07, 0x31, 0xAF, 0xBF, 0x01, 0x02, 0x51, 0x14, 0x90, 0x8E, 0x49, 0xE0, 0x64, 0x04, 0x70, ++0x59, 0x12, 0xA0, 0x32, 0xEF, 0x64, 0x01, 0x70, 0x51, 0x12, 0xA1, 0x61, 0x80, 0x4C, 0x90, 0x8E, ++0x49, 0xE0, 0xB4, 0x0E, 0x07, 0x31, 0xAF, 0xBF, 0x01, 0x02, 0x31, 0xD6, 0x90, 0x8E, 0x49, 0xE0, ++0xB4, 0x06, 0x02, 0x31, 0xF2, 0x90, 0x8E, 0x49, 0xE0, 0xB4, 0x0C, 0x07, 0x31, 0xAF, 0xBF, 0x01, ++0x02, 0x51, 0x14, 0x90, 0x8E, 0x49, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x4F, 0xD8, 0x90, 0x8E, ++0x49, 0xE0, 0xB4, 0x04, 0x15, 0x12, 0xA1, 0x7C, 0x80, 0x10, 0x90, 0x8E, 0x49, 0xE0, 0xB4, 0x0C, ++0x09, 0x12, 0x8F, 0xB3, 0x30, 0xE0, 0x03, 0x12, 0xA2, 0x43, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0xA0, 0x19, 0xBF, 0x01, 0x13, 0x12, 0xA5, 0x13, 0x20, ++0xE0, 0x0D, 0x90, 0x8E, 0x48, 0xE0, 0xD3, 0x94, 0x04, 0x50, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, ++0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x8E, 0x42, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x04, 0x7D, ++0x0C, 0x80, 0x05, 0x12, 0x8F, 0xD2, 0x7D, 0x04, 0x7F, 0x01, 0x12, 0x4F, 0x1B, 0xE4, 0xFD, 0xFF, ++0x80, 0x55, 0x90, 0x8E, 0x42, 0xE0, 0x90, 0x06, 0x04, 0x20, 0xE0, 0x08, 0xE0, 0x44, 0x40, 0xF0, ++0x7D, 0x04, 0x80, 0x06, 0xE0, 0x54, 0x7F, 0xF0, 0x7D, 0x0C, 0x7F, 0x01, 0x12, 0x4F, 0x1B, 0xE4, ++0xFD, 0xFF, 0x80, 0x33, 0x12, 0x6F, 0xEF, 0x70, 0x24, 0x90, 0x8E, 0x42, 0xE0, 0x54, 0xFD, 0xF0, ++0x7D, 0x2C, 0x7F, 0x6F, 0x51, 0x47, 0x7D, 0x08, 0x7F, 0x01, 0xB1, 0x82, 0xBF, 0x01, 0x0E, 0x90, ++0x8E, 0x41, 0xE0, 0x44, 0x80, 0xF0, 0x7D, 0x0E, 0x7F, 0x01, 0x12, 0x4F, 0x1B, 0x22, 0xE4, 0xFD, ++0x7F, 0x0C, 0x11, 0x63, 0xE4, 0xFD, 0xFF, 0x90, 0x05, 0x22, 0xEF, 0xF0, 0x90, 0x8D, 0x05, 0xED, ++0xF0, 0x22, 0x90, 0x93, 0x8C, 0x12, 0x44, 0x20, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x93, 0x9D, 0xF0, ++0x90, 0x04, 0x1D, 0xE0, 0x60, 0x0B, 0x7D, 0x39, 0xB1, 0x20, 0xEF, 0x64, 0x01, 0x70, 0x1B, 0x80, ++0x00, 0x90, 0x93, 0x31, 0xE0, 0xFF, 0x90, 0x95, 0x36, 0x74, 0x11, 0xF0, 0x7B, 0x18, 0x7D, 0x01, ++0xB1, 0xCD, 0x90, 0x93, 0x9A, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x93, 0x9A, 0x12, 0x94, 0xD2, ++0x90, 0x93, 0x9C, 0xEF, 0xF0, 0x90, 0x93, 0x9A, 0x12, 0x96, 0x8D, 0x7B, 0x01, 0x90, 0x93, 0x98, ++0xE0, 0xFD, 0x12, 0x93, 0xD5, 0x90, 0x93, 0x99, 0xE0, 0x60, 0x02, 0x61, 0x3A, 0xB1, 0x13, 0xC0, ++0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x93, 0x8F, 0xB1, 0x02, 0x75, 0x43, 0x06, 0xD0, 0x01, 0xD0, ++0x02, 0xD0, 0x03, 0x12, 0x35, 0x26, 0x71, 0xD8, 0xF1, 0xE6, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, ++0x90, 0x93, 0x8C, 0xB1, 0x02, 0x75, 0x43, 0x10, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x35, ++0x26, 0x71, 0xD8, 0xB1, 0x16, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x91, 0xFF, 0x75, 0x43, 0x10, ++0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x35, 0x26, 0x71, 0xD8, 0x24, 0x60, 0xF9, 0xE4, 0x34, ++0xFC, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x91, 0xFF, 0x75, 0x43, 0x10, 0xD0, ++0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x35, 0x26, 0x71, 0xD8, 0x24, 0x72, 0xF9, 0xE4, 0x34, 0xFC, ++0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x93, 0x95, 0xB1, 0x02, 0x75, 0x43, ++0x06, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x35, 0x26, 0x90, 0x93, 0x92, 0x12, 0x44, 0x17, ++0x90, 0x93, 0xC9, 0x12, 0x44, 0x20, 0x90, 0x93, 0xCC, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x20, ++0x90, 0x93, 0xD0, 0x74, 0x3A, 0xF0, 0x90, 0x93, 0x8C, 0x12, 0x44, 0x17, 0x12, 0x9E, 0xBB, 0x71, ++0xD8, 0x24, 0x30, 0xF9, 0xE4, 0x34, 0xFC, 0xD1, 0xDE, 0x75, 0x43, 0x28, 0x7B, 0x01, 0x7A, 0x93, ++0x79, 0x9E, 0x12, 0x35, 0x26, 0x71, 0xD8, 0x12, 0xA5, 0x71, 0xC0, 0x03, 0x8B, 0x40, 0x75, 0x41, ++0x8F, 0x75, 0x42, 0x57, 0x75, 0x43, 0x28, 0xD0, 0x03, 0x12, 0x35, 0x26, 0x90, 0x93, 0x9C, 0xE0, ++0xFF, 0x90, 0x93, 0x9B, 0xE0, 0x2F, 0xFF, 0x90, 0x93, 0x9A, 0xE0, 0x34, 0x00, 0xCF, 0x24, 0x30, ++0xFD, 0xE4, 0x3F, 0xFC, 0x90, 0x93, 0x31, 0xE0, 0xFB, 0x7F, 0x3A, 0x12, 0x55, 0x4A, 0x71, 0xD8, ++0x12, 0xA5, 0x71, 0xC0, 0x03, 0x8B, 0x40, 0x75, 0x41, 0x93, 0x75, 0x42, 0x9E, 0x75, 0x43, 0x28, ++0xD0, 0x03, 0x12, 0x35, 0x26, 0x90, 0x06, 0x33, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x93, 0x9D, 0xE0, ++0xFF, 0x7D, 0x3A, 0x51, 0x47, 0x02, 0x87, 0xDE, 0x90, 0x93, 0x9A, 0xA3, 0xE0, 0xFF, 0xA3, 0xE0, ++0x2F, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x94, 0xC3, 0x12, 0x44, 0x20, 0x78, ++0xCF, 0x7C, 0x94, 0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x40, 0x79, 0x64, 0x12, 0x67, 0xEC, 0x90, 0x05, ++0x22, 0xE0, 0x90, 0x94, 0xCE, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x0B, 0x7D, 0x33, 0xB1, 0x20, ++0xEF, 0x64, 0x01, 0x70, 0x1B, 0x80, 0x00, 0x90, 0x93, 0x30, 0xE0, 0xFF, 0x90, 0x95, 0x36, 0x74, ++0x10, 0xF0, 0x7B, 0x18, 0x7D, 0x01, 0xB1, 0xCD, 0x90, 0x94, 0xCB, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, ++0x90, 0x94, 0xCB, 0x12, 0x94, 0xD2, 0x90, 0x94, 0xCD, 0xEF, 0xF0, 0x90, 0x94, 0xCB, 0x12, 0x96, ++0x8D, 0x7B, 0x01, 0x90, 0x94, 0xC9, 0xE0, 0xFD, 0x12, 0x93, 0xD5, 0x90, 0x94, 0xCA, 0xE0, 0x70, ++0x4D, 0xB1, 0x13, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x94, 0xC6, 0xB1, 0x02, 0x75, 0x43, ++0x06, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0xB1, 0x0C, 0x71, 0xDB, 0xF1, 0xDF, 0xFA, 0x7B, 0x01, ++0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x94, 0xC6, 0xB1, 0x02, 0x75, 0x43, 0x06, 0xD0, 0x01, ++0xD0, 0x02, 0xD0, 0x03, 0xB1, 0x0C, 0x71, 0xDB, 0xF1, 0xE6, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, ++0x90, 0x94, 0xC3, 0xB1, 0x02, 0x75, 0x43, 0x04, 0xD0, 0x01, 0xD0, 0x02, 0x80, 0x44, 0x90, 0x94, ++0xCA, 0xE0, 0x64, 0x01, 0x70, 0x41, 0xB1, 0x13, 0xC0, 0x03, 0x8B, 0x40, 0x75, 0x41, 0x8E, 0x75, ++0x42, 0xD3, 0x75, 0x43, 0x06, 0xD0, 0x03, 0xB1, 0x0C, 0x71, 0xDB, 0xF1, 0xDF, 0xFA, 0x7B, 0x01, ++0xC0, 0x03, 0x8B, 0x40, 0x75, 0x41, 0x8E, 0x75, 0x42, 0xDD, 0x75, 0x43, 0x06, 0xD0, 0x03, 0xB1, ++0x0C, 0x71, 0xDB, 0xF1, 0xE6, 0xC0, 0x03, 0x8B, 0x40, 0x75, 0x41, 0x8E, 0x75, 0x42, 0xE3, 0x75, ++0x43, 0x04, 0xD0, 0x03, 0x12, 0x35, 0x26, 0x90, 0x06, 0x30, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x94, ++0xCE, 0xE0, 0xFF, 0x7D, 0x34, 0x51, 0x47, 0x12, 0x87, 0xDE, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, ++0x93, 0x92, 0x12, 0x44, 0x17, 0x8B, 0x40, 0x8A, 0x41, 0x89, 0x42, 0x22, 0x12, 0x35, 0x26, 0x90, ++0x94, 0xCB, 0x22, 0xA3, 0xA3, 0xE0, 0x24, 0x38, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0x22, ++0x7F, 0xFF, 0x51, 0x47, 0xE4, 0x90, 0x95, 0x49, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90, ++0x95, 0x4B, 0xF0, 0x7D, 0x47, 0x7F, 0xFF, 0x51, 0x47, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x11, 0xA3, ++0xE0, 0x70, 0x0D, 0xA3, 0xE0, 0x70, 0x09, 0xA3, 0xE0, 0x70, 0x05, 0xF1, 0x92, 0x7F, 0x01, 0x22, ++0xD3, 0x90, 0x95, 0x4A, 0xE0, 0x94, 0xE8, 0x90, 0x95, 0x49, 0xE0, 0x94, 0x03, 0x40, 0x0C, 0x90, ++0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0xF1, 0x92, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, ++0x3E, 0x50, 0x90, 0x95, 0x49, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0x80, 0xBB, 0x7D, 0x08, ++0xE4, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x1E, 0xEF, 0xF0, 0xA3, 0xED, ++0xF0, 0x90, 0x8D, 0x03, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x21, 0x90, 0x05, 0x22, ++0xE0, 0x90, 0x95, 0x22, 0xF0, 0x7D, 0x26, 0xB1, 0x20, 0xEF, 0x64, 0x01, 0x70, 0x02, 0xD1, 0xE6, ++0x90, 0x95, 0x22, 0xE0, 0xFF, 0x7D, 0x27, 0x51, 0x47, 0x12, 0x8F, 0x2D, 0x80, 0x05, 0x12, 0x8F, ++0x2D, 0xD1, 0xE6, 0x12, 0x87, 0xDE, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x34, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x95, 0x33, 0xEF, ++0xF0, 0xE4, 0xFD, 0xFC, 0x12, 0x7E, 0xA2, 0x90, 0x95, 0x33, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, ++0x95, 0x34, 0xE0, 0x60, 0x06, 0x12, 0xA5, 0x44, 0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74, 0x20, 0x2F, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0xF0, 0x12, 0xA5, 0x44, 0x54, 0xC0, ++0xF0, 0x90, 0x95, 0x36, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x18, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x00, 0x8B, 0xE0, 0xD3, 0x94, 0x03, 0x74, 0x10, 0x40, 0x08, 0x12, ++0xA5, 0xB1, 0x74, 0x04, 0xF0, 0x80, 0x05, 0x12, 0xA5, 0xB1, 0xE4, 0xF0, 0xAF, 0x05, 0x12, 0xA4, ++0xEF, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x95, 0x35, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFB, 0xEE, 0x44, ++0x02, 0x4B, 0xFE, 0x12, 0xA4, 0xEF, 0xEE, 0xF0, 0x74, 0x11, 0x2F, 0xF1, 0xF8, 0x74, 0xFF, 0xF0, ++0x74, 0x29, 0x2F, 0xF1, 0x9E, 0x54, 0xF7, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x12, 0x7C, 0xDA, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x93, 0x63, 0x12, 0x94, 0xD2, 0x90, ++0x93, 0x65, 0xEF, 0xF0, 0x90, 0x93, 0x63, 0xA3, 0xE0, 0x24, 0x38, 0xF9, 0xE4, 0x34, 0xFC, 0xD1, ++0xDE, 0x75, 0x43, 0x06, 0x7B, 0x01, 0x7A, 0x8E, 0x79, 0xD3, 0xF1, 0x8B, 0x71, 0xDB, 0x24, 0x3E, ++0xF9, 0xE4, 0x34, 0xFC, 0xD1, 0xDE, 0x75, 0x43, 0x04, 0x7B, 0x01, 0x7A, 0x8E, 0x79, 0xD9, 0xF1, ++0x8B, 0x71, 0xDB, 0xF1, 0xDF, 0xD1, 0xDE, 0x75, 0x43, 0x06, 0x7B, 0x01, 0x7A, 0x8E, 0x79, 0xDD, ++0xF1, 0x8B, 0x71, 0xDB, 0x24, 0x48, 0xF9, 0xE4, 0x34, 0xFC, 0xD1, 0xDE, 0x75, 0x43, 0x04, 0x7B, ++0x01, 0x7A, 0x8E, 0x79, 0xE3, 0x02, 0x35, 0x26, 0x24, 0x00, 0xF9, 0xE4, 0x34, 0xFC, 0x75, 0x40, ++0x01, 0xF5, 0x41, 0x89, 0x42, 0x22, 0x90, 0x8D, 0x3A, 0xE0, 0xFF, 0x90, 0x95, 0x1F, 0xE0, 0xFB, ++0x90, 0x95, 0x36, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0xB1, 0xCD, 0x90, 0x95, 0x20, 0xEE, 0xF0, 0xFC, ++0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x95, 0x1E, 0xE0, 0xFF, 0xF1, 0x6F, 0x90, 0x95, 0x20, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x90, 0x81, 0x00, 0xE0, 0x54, 0x0F, 0xFD, 0xAC, 0x07, 0x12, 0xA5, 0x1D, 0x44, ++0x01, 0xF0, 0x12, 0xA5, 0x1D, 0x54, 0xFB, 0xF0, 0xAC, 0x07, 0x74, 0x12, 0x2C, 0x12, 0xA4, 0xF2, ++0xE0, 0x44, 0xFA, 0xF0, 0x74, 0x11, 0x2C, 0xF1, 0xF8, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, ++0x06, 0x2C, 0x12, 0x7E, 0x7C, 0x44, 0x0E, 0xF0, 0x90, 0x04, 0xA7, 0xE4, 0xF0, 0x90, 0x04, 0xA6, ++0xF0, 0x90, 0x04, 0xA5, 0x74, 0xFF, 0xF0, 0x90, 0x04, 0xA4, 0x74, 0xFD, 0xF0, 0x74, 0x14, 0x2C, ++0xF1, 0xF0, 0xE0, 0x54, 0xC0, 0x4D, 0xFD, 0x74, 0x14, 0x2F, 0xF1, 0xF0, 0xED, 0xF0, 0x22, 0xF1, ++0xA8, 0x54, 0x3F, 0xF0, 0xEF, 0x60, 0x0A, 0xF1, 0x9B, 0x44, 0x10, 0xF1, 0xA7, 0x44, 0x80, 0xF0, ++0x22, 0xF1, 0x9B, 0x54, 0xEF, 0xF1, 0xA7, 0x44, 0x40, 0xF0, 0x22, 0x12, 0x35, 0x26, 0x90, 0x93, ++0x63, 0x22, 0x90, 0x95, 0x4B, 0xE0, 0xFF, 0x7D, 0x48, 0x41, 0x47, 0x74, 0x29, 0x2D, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF0, 0x74, 0x09, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x22, 0x12, 0x9F, 0xDF, 0x90, 0x8E, 0x49, 0xE0, 0x64, 0x0C, 0x60, 0x04, 0x51, ++0x3E, 0xB1, 0x7E, 0x22, 0x90, 0x8E, 0x46, 0xE0, 0x64, 0x01, 0x70, 0x12, 0x12, 0x8F, 0x04, 0x60, ++0x05, 0x51, 0x3E, 0x02, 0x9F, 0xDF, 0x90, 0x8E, 0x49, 0xE0, 0x70, 0x02, 0x11, 0x5F, 0x22, 0x24, ++0x42, 0xF9, 0xE4, 0x34, 0xFC, 0x22, 0x24, 0x48, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0x22, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, ++0xE4, 0xFB, 0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x48, 0x47, 0x90, 0x93, 0x5E, 0xEF, 0xF0, 0x60, 0xF0, ++0x90, 0x8D, 0x01, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE1, ++0x0A, 0x90, 0x8D, 0x01, 0xE0, 0x54, 0xFD, 0xF0, 0x12, 0x88, 0x6B, 0xF1, 0xDB, 0x30, 0xE2, 0x06, ++0x54, 0xFB, 0xF0, 0x12, 0x92, 0x86, 0xF1, 0xDB, 0x30, 0xE4, 0x0B, 0x54, 0xEF, 0xF0, 0x12, 0x9B, ++0x9D, 0xBF, 0x01, 0x02, 0x11, 0x55, 0xF1, 0xDB, 0x30, 0xE7, 0x06, 0x54, 0x7F, 0xF0, 0x12, 0x6B, ++0x97, 0xD2, 0xAF, 0x80, 0xBB, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90, 0x94, 0x93, ++0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x08, 0xF0, 0xA3, 0x12, 0x89, 0x22, 0x90, 0x94, 0x9B, 0xF0, 0xA3, ++0xF0, 0xA3, 0xF0, 0x90, 0x01, 0xC4, 0x74, 0x55, 0xF0, 0x74, 0x60, 0xA3, 0xF0, 0x12, 0x91, 0x69, ++0x12, 0x7C, 0xE9, 0x90, 0x94, 0x89, 0x12, 0x91, 0x60, 0x90, 0x94, 0x92, 0xF0, 0x90, 0x8E, 0xAE, ++0xE0, 0x20, 0xE0, 0x02, 0x61, 0x24, 0xE4, 0x90, 0x94, 0x91, 0xF0, 0x90, 0x94, 0x92, 0xE0, 0xFF, ++0x90, 0x94, 0x91, 0xE0, 0xC3, 0x9F, 0x40, 0x02, 0x61, 0x24, 0x12, 0xA5, 0x9F, 0xEC, 0xFF, 0x90, ++0xFD, 0x11, 0xF0, 0x90, 0x94, 0x9B, 0xEF, 0xF0, 0x12, 0x90, 0x26, 0x12, 0x91, 0x4E, 0x54, 0x3F, ++0xFE, 0x90, 0x94, 0x8B, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x94, 0x97, 0xEE, 0x12, 0x90, 0xD8, 0xE0, ++0x54, 0x03, 0xFE, 0xEF, 0x24, 0x18, 0x2E, 0xFF, 0x90, 0x94, 0x9C, 0xF0, 0x90, 0x94, 0x8A, 0xE0, ++0x2F, 0xFF, 0x90, 0x94, 0x89, 0xE0, 0x34, 0x00, 0xFE, 0x90, 0x94, 0x8D, 0xF1, 0xD3, 0xC0, 0x07, ++0x71, 0x35, 0x7D, 0x01, 0x71, 0x60, 0xC0, 0x07, 0x71, 0x35, 0x7D, 0x04, 0x71, 0x60, 0xAB, 0x07, ++0xD0, 0x05, 0xD0, 0x07, 0x12, 0x94, 0xF8, 0x90, 0x94, 0x93, 0xEF, 0x71, 0x34, 0xE4, 0xFD, 0x71, ++0x60, 0xEF, 0x54, 0xFC, 0x90, 0x94, 0x8F, 0xF0, 0x90, 0x94, 0x9C, 0xE0, 0xFF, 0x90, 0x94, 0x8B, ++0xE4, 0x8F, 0xF0, 0x12, 0x08, 0xD6, 0x12, 0xA5, 0xA8, 0x12, 0x90, 0xB6, 0x90, 0x94, 0x8B, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x94, 0x89, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x7D, 0x0F, 0x71, 0x60, ++0x90, 0x94, 0x90, 0xEF, 0xF0, 0x7D, 0x01, 0x12, 0x9F, 0x44, 0x12, 0xA5, 0xA8, 0x90, 0x94, 0x89, ++0x12, 0x91, 0x72, 0x12, 0xA5, 0x9F, 0xD3, 0x9F, 0xEC, 0x9E, 0x40, 0x0F, 0x12, 0x91, 0x81, 0xED, ++0x9F, 0xFF, 0xEC, 0x9E, 0x90, 0x94, 0x89, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x94, 0x88, 0xE0, 0x60, ++0x39, 0x90, 0x94, 0x8F, 0xE0, 0x24, 0xB0, 0x60, 0x15, 0x24, 0xD0, 0x60, 0x02, 0x41, 0xB7, 0x12, ++0xA5, 0xFB, 0x20, 0xE0, 0x16, 0xF1, 0xE5, 0x20, 0xE0, 0x02, 0x41, 0xB7, 0x80, 0x0D, 0x12, 0xA5, ++0xFB, 0x20, 0xE0, 0x07, 0xF1, 0xE5, 0x20, 0xE0, 0x02, 0x41, 0xB7, 0x71, 0x35, 0x90, 0x94, 0x97, ++0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x12, 0xA3, 0x95, 0x41, 0xB7, 0x90, 0x94, 0x8F, 0xE0, 0x24, 0xF8, ++0x60, 0x38, 0x24, 0x80, 0x60, 0x34, 0x24, 0xC8, 0x60, 0x06, 0x24, 0x20, 0x60, 0x02, 0x41, 0xB7, ++0x90, 0x8E, 0xB1, 0x12, 0x72, 0x25, 0x20, 0xE0, 0x02, 0x41, 0xB7, 0x90, 0x8E, 0xC4, 0xE0, 0x04, ++0x71, 0x34, 0x12, 0x9C, 0x44, 0xEF, 0x70, 0x02, 0x41, 0xB7, 0x90, 0x94, 0x8F, 0xE0, 0xFF, 0x12, ++0x9C, 0x32, 0x90, 0x8E, 0xC5, 0xE0, 0x04, 0xF0, 0x41, 0xB7, 0xF1, 0xFA, 0x30, 0xE0, 0x5C, 0x90, ++0x94, 0x93, 0xE0, 0xFF, 0x90, 0x94, 0x8E, 0xE0, 0x2F, 0xFF, 0x90, 0x94, 0x8D, 0xE0, 0x34, 0x00, ++0xCF, 0x24, 0x08, 0xCF, 0x34, 0x00, 0xFE, 0x90, 0x94, 0x99, 0xF1, 0xD3, 0xEF, 0x64, 0x45, 0x70, ++0x3A, 0xB1, 0xB4, 0x12, 0xA4, 0x90, 0xEF, 0x64, 0x01, 0x70, 0x30, 0xB1, 0xB4, 0x12, 0xA3, 0xB7, ++0xEF, 0x64, 0x01, 0x70, 0x26, 0x90, 0x94, 0x9D, 0x04, 0xF0, 0xB1, 0xB4, 0xA3, 0xE0, 0xFD, 0x12, ++0xA3, 0xF7, 0xEF, 0x70, 0x0E, 0x90, 0x94, 0x9B, 0xE0, 0xFD, 0x90, 0xFD, 0x11, 0xF0, 0xB1, 0xB4, ++0x12, 0xA4, 0x48, 0x90, 0x94, 0x9B, 0xE0, 0x90, 0xFD, 0x11, 0xF0, 0x71, 0x35, 0x12, 0x9C, 0x44, ++0xEF, 0x60, 0x1F, 0x71, 0x35, 0x90, 0x94, 0x93, 0xE0, 0xFD, 0x90, 0x94, 0x96, 0xE0, 0xFB, 0x90, ++0x94, 0x9B, 0xE0, 0x90, 0x93, 0x63, 0xF0, 0x91, 0x04, 0xEF, 0x60, 0x06, 0x90, 0x94, 0x9D, 0x74, ++0x01, 0xF0, 0x90, 0x8E, 0xAE, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x12, 0x71, 0x35, 0x90, 0x94, 0x93, ++0xE0, 0xFD, 0x91, 0x89, 0xEF, 0x60, 0x06, 0x90, 0x94, 0x9D, 0x74, 0x01, 0xF0, 0x12, 0x77, 0xDD, ++0x54, 0x3F, 0x30, 0xE0, 0x0A, 0x71, 0x35, 0x90, 0x94, 0x93, 0xE0, 0xFD, 0x12, 0x9C, 0xC6, 0x90, ++0x8E, 0xAE, 0x12, 0x72, 0x25, 0x30, 0xE0, 0x0F, 0x90, 0x94, 0x9D, 0xE0, 0x70, 0x09, 0x71, 0x35, ++0x90, 0x94, 0x93, 0xE0, 0xFD, 0xF1, 0x1B, 0x90, 0x94, 0x90, 0xE0, 0xFF, 0x7D, 0x02, 0x12, 0x9F, ++0x44, 0x30, 0xE0, 0x05, 0x7F, 0x01, 0x12, 0x71, 0x54, 0x12, 0x9C, 0x1B, 0xEF, 0x64, 0x01, 0x70, ++0x37, 0x90, 0x8E, 0xC6, 0xE0, 0x04, 0xF0, 0x12, 0x91, 0xA4, 0xAD, 0x07, 0xEF, 0x64, 0x01, 0x60, ++0x1F, 0xF1, 0xBD, 0xED, 0xB4, 0x02, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x42, 0xF0, 0x80, 0x0A, 0xED, ++0xB4, 0x04, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x43, 0xF0, 0x7F, 0x01, 0x12, 0x71, 0x54, 0x80, 0x24, ++0x90, 0x94, 0x89, 0x12, 0x91, 0x91, 0x80, 0x14, 0x90, 0x8E, 0xB0, 0xE0, 0xC4, 0x13, 0x54, 0x07, ++0x20, 0xE0, 0x11, 0x90, 0x8E, 0xAE, 0xE0, 0x54, 0xFE, 0xF0, 0x80, 0x08, 0x90, 0x94, 0x91, 0xE0, ++0x04, 0xF0, 0x01, 0x9B, 0x74, 0x55, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x60, 0xA3, 0xF0, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90, 0x94, 0x8D, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x93, ++0x61, 0xE0, 0xFD, 0x90, 0x93, 0x60, 0xE0, 0x2D, 0xFD, 0x90, 0x93, 0x5F, 0xE0, 0x34, 0x00, 0xCD, ++0x24, 0x10, 0xCD, 0x34, 0x00, 0xFC, 0x7E, 0x00, 0xED, 0x2F, 0xFF, 0xEE, 0x3C, 0xFE, 0xE4, 0xFD, ++0xAB, 0x07, 0xAA, 0x06, 0xED, 0x2B, 0xFB, 0xE4, 0x3A, 0xFA, 0xC3, 0x90, 0x8E, 0x2A, 0xE0, 0x9B, ++0x90, 0x8E, 0x29, 0xE0, 0x9A, 0x50, 0x0A, 0xA3, 0x12, 0x91, 0x84, 0xEB, 0x9F, 0xFB, 0xEA, 0x9E, ++0xFA, 0x12, 0x91, 0x46, 0x74, 0x00, 0x2F, 0x12, 0x90, 0x35, 0xE0, 0xFF, 0x22, 0x90, 0x93, 0x6F, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x7D, 0x09, 0x71, 0x60, 0xEF, 0x64, 0x06, 0x70, 0x24, 0xB1, 0xBD, ++0x7D, 0x14, 0x71, 0x60, 0xEF, 0x70, 0x1B, 0xB1, 0xBD, 0x7D, 0x15, 0x71, 0x60, 0xEF, 0x64, 0x50, ++0x70, 0x10, 0xB1, 0xBD, 0x7D, 0x21, 0x71, 0x60, 0xEF, 0x20, 0xE0, 0x03, 0x30, 0xE2, 0x03, 0x7F, ++0x01, 0x22, 0x90, 0x8E, 0xAF, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x34, 0xB1, 0xBD, 0x7D, ++0x09, 0x71, 0x60, 0xEF, 0x64, 0x11, 0x70, 0x29, 0x90, 0x93, 0x70, 0xE0, 0x24, 0x14, 0x12, 0x9C, ++0x8F, 0x90, 0x93, 0x71, 0xF0, 0xA3, 0xEF, 0xF0, 0x7D, 0x02, 0x71, 0x60, 0xEF, 0x70, 0x12, 0x90, ++0x93, 0x71, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x7D, 0x03, 0x71, 0x60, 0xBF, 0x89, 0x03, 0x7F, 0x01, ++0x22, 0x7F, 0x00, 0x22, 0x90, 0x93, 0x61, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x12, 0x87, 0x0E, 0x90, ++0x93, 0x64, 0xF0, 0xFD, 0x71, 0x60, 0xEF, 0x54, 0x0C, 0x64, 0x08, 0x70, 0x5C, 0x91, 0x80, 0xA3, ++0xE0, 0xF1, 0xCC, 0x64, 0x88, 0x70, 0x52, 0x91, 0x80, 0xA3, 0xE0, 0x24, 0x07, 0xFD, 0x71, 0x60, ++0xEF, 0x64, 0x8E, 0x70, 0x44, 0x90, 0x93, 0x64, 0x04, 0x91, 0x7F, 0x12, 0xA5, 0x50, 0x04, 0xFD, ++0x71, 0x60, 0xEF, 0x64, 0x03, 0x70, 0x32, 0x91, 0x80, 0x12, 0xA5, 0x50, 0xF1, 0xCC, 0x30, 0xE3, ++0x07, 0x90, 0x01, 0xC7, 0x74, 0x01, 0x80, 0x1F, 0x90, 0x8E, 0xAE, 0x12, 0xA5, 0x16, 0x30, 0xE0, ++0x09, 0x91, 0x80, 0xA3, 0xE0, 0xFD, 0xB1, 0xDD, 0x80, 0x0F, 0x90, 0x8E, 0xB1, 0xF1, 0xFD, 0x30, ++0xE0, 0x07, 0x90, 0x01, 0xC7, 0x74, 0x02, 0xF1, 0xBC, 0x90, 0x93, 0x64, 0xE0, 0xFF, 0x22, 0xF0, ++0x90, 0x93, 0x5F, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x12, 0x86, 0x68, 0x12, 0x9E, 0xB2, 0x7A, ++0x40, 0x79, 0x56, 0xF1, 0xEC, 0x78, 0x6E, 0x7C, 0x93, 0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x40, 0x79, ++0x5C, 0xF1, 0xC5, 0x78, 0x72, 0x7C, 0x93, 0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x40, 0x79, 0x60, 0xF1, ++0xC5, 0xE4, 0x90, 0x93, 0x77, 0xF0, 0xF1, 0x09, 0xCF, 0x24, 0x06, 0xCF, 0xB1, 0xD6, 0xEF, 0x64, ++0x08, 0x60, 0x02, 0xA1, 0xA7, 0xF1, 0x09, 0xCF, 0x24, 0x07, 0xCF, 0xB1, 0xD6, 0xEF, 0x64, 0x06, ++0x60, 0x02, 0xA1, 0xA7, 0x90, 0x93, 0x77, 0x04, 0xF0, 0xE4, 0x90, 0x93, 0x76, 0xF0, 0xB1, 0xAD, ++0x94, 0x06, 0x50, 0x17, 0x90, 0x93, 0x60, 0xE0, 0x24, 0x0A, 0xFD, 0x90, 0x93, 0x5F, 0xE0, 0x71, ++0x53, 0x90, 0x93, 0x76, 0x12, 0x9E, 0xA9, 0xB1, 0xC6, 0x80, 0xE3, 0xF1, 0xF3, 0x7B, 0x01, 0x7A, ++0x8E, 0x79, 0xBE, 0x12, 0x9C, 0x98, 0x60, 0x02, 0xA1, 0xA7, 0x90, 0x93, 0x76, 0xF0, 0xB1, 0xAD, ++0x94, 0x04, 0x50, 0x19, 0x12, 0x9E, 0x94, 0xF1, 0x14, 0xCD, 0x24, 0x20, 0x71, 0x52, 0x90, 0x93, ++0x76, 0xE0, 0x24, 0x72, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xB1, 0xC6, 0x80, 0xE1, 0x78, 0x72, 0x7C, ++0x93, 0x12, 0xA4, 0xD5, 0xEF, 0x70, 0x67, 0x90, 0x06, 0x30, 0xE0, 0x44, 0x01, 0x54, 0xDF, 0xF0, ++0x90, 0x8E, 0xB0, 0xE0, 0x30, 0xE0, 0x09, 0x90, 0x01, 0xC7, 0x74, 0x09, 0xF1, 0xBC, 0x80, 0x57, ++0xE4, 0x90, 0x93, 0x76, 0xF0, 0xB1, 0xAD, 0x94, 0x06, 0x50, 0x0C, 0x71, 0x3E, 0x90, 0x93, 0x76, ++0x12, 0x9E, 0xA0, 0xB1, 0xC6, 0x80, 0xEE, 0xE4, 0x90, 0x93, 0x76, 0xF0, 0xB1, 0xAD, 0x94, 0x04, ++0x50, 0x19, 0x12, 0x9E, 0x94, 0xF1, 0x14, 0xCD, 0x24, 0x16, 0x71, 0x52, 0x90, 0x93, 0x76, 0xE0, ++0x24, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xB1, 0xC6, 0x80, 0xE1, 0x7B, 0x01, 0x7A, 0x93, 0x79, ++0x68, 0x12, 0x9B, 0x54, 0xF0, 0x7A, 0x93, 0x79, 0x6E, 0x12, 0x5B, 0xE2, 0x80, 0x09, 0x90, 0x06, ++0x30, 0xE0, 0x44, 0x21, 0x54, 0xEF, 0xF0, 0x90, 0x93, 0x77, 0xE0, 0xFF, 0x22, 0x90, 0x93, 0x76, ++0xE0, 0xFF, 0xC3, 0x22, 0x90, 0x94, 0x99, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x93, 0x6F, ++0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x93, 0x76, 0xE0, 0x04, 0xF0, ++0x22, 0xFF, 0x90, 0x93, 0x68, 0xE0, 0x34, 0x00, 0xFE, 0xE4, 0xFD, 0x61, 0x60, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x06, 0x31, 0xE0, 0x54, 0xEF, 0x44, 0x08, 0xF0, 0xED, 0x2F, 0xFF, ++0xE4, 0x3E, 0xFE, 0x7C, 0x00, 0xEF, 0x24, 0x08, 0xFF, 0xEC, 0x3E, 0x90, 0x93, 0x68, 0xF0, 0xA3, ++0xEF, 0xF0, 0x7E, 0x00, 0x7F, 0x83, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x8F, 0x79, 0xBF, 0x12, 0x08, ++0xAA, 0x90, 0x93, 0x69, 0xE0, 0x24, 0x01, 0xB1, 0xD1, 0x90, 0x8F, 0xC0, 0xF1, 0x02, 0x24, 0x04, ++0xB1, 0xD1, 0x90, 0x8F, 0xC3, 0xF1, 0x02, 0x24, 0x05, 0xB1, 0xD1, 0x90, 0x8F, 0xC4, 0xF1, 0x02, ++0x24, 0x06, 0xB1, 0xD1, 0x90, 0x8F, 0xC5, 0xF1, 0x02, 0x24, 0x07, 0xB1, 0xD1, 0x90, 0x8F, 0xC6, ++0xF1, 0x02, 0x24, 0x08, 0xB1, 0xD1, 0x90, 0x8F, 0xC7, 0xEF, 0xF0, 0xE4, 0x90, 0x93, 0x67, 0xF0, ++0x90, 0x93, 0x67, 0xE0, 0xFF, 0xC3, 0x94, 0x08, 0x50, 0x1D, 0x90, 0x93, 0x69, 0xE0, 0x24, 0x09, ++0xFD, 0x90, 0x93, 0x68, 0xE0, 0x71, 0x53, 0x90, 0x93, 0x67, 0xE0, 0x24, 0xC8, 0xF5, 0x82, 0xE4, ++0x34, 0x8F, 0x12, 0xA4, 0xFA, 0x80, 0xD9, 0xE4, 0x90, 0x93, 0x67, 0xF0, 0x90, 0x93, 0x67, 0xE0, ++0xFF, 0xC3, 0x94, 0x20, 0x50, 0x1D, 0x90, 0x93, 0x69, 0xE0, 0x24, 0x63, 0xFD, 0x90, 0x93, 0x68, ++0xE0, 0x71, 0x53, 0x90, 0x93, 0x67, 0xE0, 0x24, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0x12, 0xA4, ++0xFA, 0x80, 0xD9, 0x90, 0x8F, 0xC4, 0x12, 0x8F, 0x9A, 0x12, 0x91, 0x57, 0x30, 0xE3, 0x0D, 0x7F, ++0x01, 0x12, 0x71, 0x54, 0x90, 0x01, 0xC7, 0x74, 0x03, 0xF0, 0x80, 0x3F, 0x90, 0x93, 0x65, 0xA3, ++0xE0, 0xFF, 0x7C, 0x00, 0x54, 0x07, 0xFD, 0x64, 0x01, 0x60, 0x05, 0xED, 0x64, 0x02, 0x70, 0x2B, ++0xED, 0x64, 0x02, 0x4C, 0x70, 0x25, 0xEF, 0x54, 0x30, 0xFF, 0xE4, 0xC4, 0xF8, 0x54, 0xF0, 0xC8, ++0xEF, 0xC4, 0x54, 0x0F, 0x48, 0x90, 0x90, 0x58, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xE4, 0xFD, 0x12, ++0x86, 0x92, 0x90, 0x06, 0x31, 0xE0, 0x54, 0xF7, 0x44, 0x10, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0xEF, 0xF0, 0x90, 0x93, 0x69, 0xE0, 0x22, 0x90, 0x93, 0x61, 0xE0, 0xFF, 0x90, 0x93, ++0x60, 0xE0, 0x2F, 0xFF, 0x90, 0x93, 0x5F, 0xE0, 0x34, 0x00, 0x22, 0x12, 0x86, 0x68, 0xF1, 0xF3, ++0x7B, 0xFF, 0x7A, 0x40, 0x79, 0x90, 0xF1, 0xEC, 0x78, 0x69, 0x7C, 0x93, 0x7D, 0x01, 0x7B, 0xFF, ++0x7A, 0x40, 0x79, 0x96, 0xF1, 0xC5, 0x91, 0x80, 0x12, 0x9C, 0x44, 0xEF, 0x60, 0x7D, 0xF1, 0x09, ++0xFE, 0x90, 0x93, 0x6D, 0xF0, 0xA3, 0xEF, 0xF0, 0x24, 0x06, 0xFF, 0xE4, 0x3E, 0xB1, 0xD8, 0xEF, ++0x64, 0x08, 0x70, 0x67, 0x90, 0x93, 0x6E, 0xE0, 0x24, 0x07, 0xFF, 0x90, 0x93, 0x6D, 0xB1, 0xD5, ++0xEF, 0x70, 0x58, 0x90, 0x93, 0x68, 0xF0, 0x90, 0x93, 0x68, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, ++0x24, 0x90, 0x93, 0x6E, 0xE0, 0x24, 0x18, 0xFD, 0x90, 0x93, 0x6D, 0xE0, 0x71, 0x53, 0x90, 0x93, ++0x68, 0xE0, 0x24, 0x69, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x93, 0x68, ++0xE0, 0x04, 0xF0, 0x80, 0xD2, 0x78, 0x69, 0x7C, 0x93, 0x12, 0xA4, 0xD5, 0xEF, 0x70, 0x1C, 0x90, ++0x93, 0x6E, 0xE0, 0x24, 0x08, 0xFF, 0x90, 0x93, 0x6D, 0xE0, 0x34, 0x00, 0xFE, 0x71, 0x8D, 0xEF, ++0x64, 0x01, 0x60, 0x07, 0x90, 0x01, 0xC7, 0x74, 0x22, 0xF1, 0xBC, 0x22, 0xF0, 0x90, 0x8E, 0xB7, ++0xE0, 0x44, 0x01, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x04, 0x02, 0x06, 0x63, 0x24, 0x06, 0xFD, 0x71, ++0x60, 0xEF, 0x22, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xFD, 0x61, 0x60, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, ++0x8D, 0x01, 0xE0, 0xFF, 0x22, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22, 0x7E, 0x00, 0x7F, 0x06, ++0x02, 0x06, 0x63, 0x78, 0x62, 0x7C, 0x93, 0x7D, 0x01, 0x22, 0x90, 0x8E, 0xAE, 0xE0, 0xC4, 0x13, ++0x13, 0x54, 0x03, 0x22, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, ++0x05, 0xC0, 0x07, 0x7D, 0x04, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0x68, 0x11, 0x2B, 0xD0, 0x07, ++0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, 0xFF, 0xA3, 0xF0, 0xED, 0x04, ++0x90, 0x01, 0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, ++0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0x38, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0x68, ++0x11, 0x2B, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, 0xC0, ++0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, ++0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, ++0x5F, 0xF0, 0x74, 0x68, 0xA3, 0xF0, 0x12, 0x4B, 0x7B, 0xE5, 0x14, 0x30, 0xE7, 0x03, 0x12, 0x4E, ++0xCB, 0x74, 0x5F, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x68, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, ++0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, ++0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, ++0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xB7, 0xF0, 0x74, 0x68, 0xA3, 0xF0, 0x12, 0x98, ++0x64, 0xE5, 0x19, 0x30, 0xE3, 0x02, 0x51, 0xCD, 0xE5, 0x19, 0x30, 0xE4, 0x02, 0x31, 0x5B, 0xE5, ++0x19, 0x30, 0xE5, 0x03, 0x12, 0x98, 0xC1, 0xE5, 0x1B, 0x30, 0xE0, 0x02, 0x51, 0x94, 0xE5, 0x1B, ++0x30, 0xE1, 0x02, 0xD1, 0x80, 0xE5, 0x1B, 0x30, 0xE2, 0x03, 0x12, 0x98, 0xFD, 0xE5, 0x1B, 0x30, ++0xE3, 0x03, 0x12, 0x99, 0x0F, 0xE5, 0x1B, 0x30, 0xE4, 0x03, 0x12, 0x99, 0x2B, 0xE5, 0x1B, 0x30, ++0xE5, 0x03, 0x12, 0x8F, 0x0B, 0xE5, 0x1B, 0x30, 0xE6, 0x03, 0x12, 0x99, 0x48, 0xE5, 0x1C, 0x30, ++0xE1, 0x03, 0x12, 0x99, 0xDA, 0x74, 0xB7, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x68, 0xA3, 0xF0, ++0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, ++0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x31, 0x6E, 0x7F, 0x02, 0x8F, ++0x58, 0x7F, 0x02, 0x12, 0x48, 0x20, 0x90, 0x8D, 0x01, 0xE0, 0x45, 0x58, 0xF0, 0x22, 0x90, 0x01, ++0xCC, 0xE0, 0x54, 0x0F, 0x90, 0x95, 0x50, 0xF0, 0x90, 0x95, 0x50, 0xE0, 0xFD, 0x70, 0x02, 0x41, ++0x69, 0x90, 0x8D, 0x8F, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, ++0xFF, 0x90, 0x8D, 0x90, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, ++0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0x95, 0x4C, 0x12, 0xA4, 0xCB, 0x80, ++0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0x41, 0x4B, 0xE4, ++0x90, 0x95, 0x51, 0xF0, 0x90, 0x95, 0x51, 0xE0, 0xF9, 0xC3, 0x94, 0x04, 0x50, 0x31, 0x51, 0x6A, ++0xA4, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, 0x2F, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xD0, 0x51, 0x82, ++0x90, 0x8D, 0x3F, 0x51, 0x72, 0x51, 0x6A, 0xA4, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xF0, ++0x51, 0x82, 0x90, 0x8D, 0x43, 0x51, 0x72, 0x90, 0x95, 0x51, 0xE0, 0x04, 0xF0, 0x80, 0xC5, 0x90, ++0x95, 0x50, 0xE0, 0xFF, 0x90, 0x95, 0x4C, 0x12, 0x4B, 0x21, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, ++0xF4, 0x5F, 0x90, 0x95, 0x50, 0xF0, 0x90, 0x95, 0x4C, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, ++0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, 0x95, 0x4C, 0xE0, 0x04, 0xF0, ++0xE0, 0x54, 0x03, 0xF0, 0x90, 0x8D, 0x90, 0x12, 0x88, 0xCC, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, ++0x70, 0x02, 0x21, 0x78, 0xE4, 0x90, 0x8D, 0x90, 0xF0, 0x21, 0x78, 0x90, 0x01, 0xC0, 0xE0, 0x44, ++0x02, 0xF0, 0x90, 0x95, 0x4C, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0xF0, 0x51, 0x6A, 0x90, 0x01, ++0xD0, 0x12, 0x44, 0x0B, 0xE0, 0x90, 0x01, 0xC3, 0xF0, 0x22, 0x90, 0x95, 0x4C, 0xE0, 0x75, 0xF0, ++0x04, 0x22, 0x12, 0x44, 0x0B, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xEF, ++0xF0, 0x22, 0x2F, 0xF5, 0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x8D, 0x90, 0xE0, ++0x75, 0xF0, 0x08, 0x22, 0x12, 0x50, 0x4D, 0xE4, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x8E, 0x43, 0xE0, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x1E, 0x90, 0x94, 0xD5, 0x74, 0x1E, 0xF0, ++0x90, 0x94, 0xE3, 0x74, 0x01, 0xF0, 0x90, 0x94, 0xD7, 0xEF, 0xF0, 0x7B, 0x01, 0x7A, 0x94, 0x79, ++0xD5, 0x12, 0x78, 0xC0, 0x7F, 0x04, 0x31, 0x5F, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x8E, 0xAE, ++0xE0, 0x30, 0xE0, 0x04, 0x7F, 0x10, 0x31, 0x5F, 0x22, 0x12, 0xA1, 0x94, 0xB1, 0xC7, 0x7F, 0x01, ++0x51, 0x99, 0x90, 0x8E, 0xAA, 0xE0, 0x30, 0xE0, 0x31, 0x12, 0xA5, 0x84, 0x90, 0x8E, 0xAD, 0xE0, ++0x60, 0x05, 0x14, 0xF0, 0x02, 0xA2, 0x43, 0x12, 0x88, 0x40, 0xE4, 0xFF, 0x91, 0x37, 0x90, 0x8E, ++0x2C, 0xE0, 0xFF, 0x20, 0xE0, 0x08, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x0C, 0x90, 0x95, ++0x0E, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x01, 0x71, 0x1B, 0x22, 0xE4, 0x90, 0x95, 0x12, 0xF0, ++0x7F, 0x03, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x0D, 0xEF, 0xF0, 0x12, 0x86, ++0x80, 0x90, 0x95, 0x0D, 0xE0, 0xFF, 0x12, 0x9A, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x95, 0x12, 0xE0, ++0xFE, 0xEF, 0x12, 0xA5, 0x05, 0xEE, 0xF0, 0x90, 0x95, 0x0D, 0xE0, 0x71, 0x89, 0x12, 0x08, 0x79, ++0x00, 0x00, 0x00, 0x01, 0x71, 0x7E, 0x78, 0x10, 0x12, 0x08, 0x47, 0xAB, 0x07, 0x71, 0x7E, 0x78, ++0x08, 0x12, 0x08, 0x47, 0x90, 0x95, 0x0B, 0xEF, 0xF0, 0x71, 0x7E, 0x90, 0x95, 0x0C, 0xEF, 0xF0, ++0x7D, 0x01, 0x7F, 0x50, 0x7E, 0x01, 0x12, 0x50, 0x20, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x95, ++0x0E, 0x02, 0x43, 0xF3, 0x90, 0x93, 0x5F, 0xE0, 0xFB, 0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x1A, 0xF5, ++0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0x22, 0xE4, 0x90, 0x93, 0x5F, 0xF0, 0x90, 0x93, 0x5F, 0xE0, ++0xFF, 0xC3, 0x94, 0x08, 0x40, 0x02, 0x81, 0x2F, 0xEF, 0x12, 0x9A, 0x64, 0xE0, 0x64, 0x01, 0x70, ++0x76, 0x90, 0x93, 0x5F, 0xE0, 0x71, 0x89, 0x12, 0x43, 0xF3, 0xE4, 0x7B, 0x01, 0x91, 0x30, 0x70, ++0x3C, 0x90, 0x93, 0x5F, 0xE0, 0xFB, 0x12, 0xA5, 0x05, 0xE0, 0x60, 0x21, 0x14, 0x70, 0x58, 0xEB, ++0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x1E, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0x12, 0x43, 0xF3, ++0xEB, 0x71, 0x89, 0x12, 0x08, 0x6D, 0x90, 0x93, 0x5F, 0xE0, 0xFF, 0x80, 0x0B, 0x71, 0x84, 0x12, ++0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0xAF, 0x03, 0x12, 0x7B, 0x4F, 0x80, 0x2A, 0x90, 0x93, 0x5F, ++0xE0, 0x71, 0x89, 0x12, 0x43, 0xF3, 0xE4, 0xFB, 0x91, 0x30, 0x50, 0x1B, 0x71, 0x84, 0x12, 0x43, ++0xF3, 0xEF, 0x24, 0xFF, 0xFF, 0xEE, 0x34, 0xFF, 0xFE, 0xED, 0x34, 0xFF, 0xFD, 0xEC, 0x34, 0xFF, ++0xFC, 0xEB, 0x71, 0x89, 0x12, 0x08, 0x6D, 0x90, 0x93, 0x5F, 0xE0, 0x04, 0xF0, 0x61, 0x9C, 0x22, ++0xFA, 0xF9, 0xF8, 0xC3, 0x02, 0x43, 0xE2, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, ++0x63, 0xEF, 0xF0, 0x90, 0x8E, 0x2C, 0xF1, 0x7E, 0x30, 0xE0, 0x39, 0x12, 0xA3, 0x7E, 0x60, 0x10, ++0x12, 0xA3, 0x74, 0x40, 0x0B, 0xE4, 0x7F, 0x0A, 0xFE, 0xFD, 0xFC, 0x90, 0x90, 0xED, 0x80, 0x09, ++0xE4, 0x7F, 0x0A, 0xFE, 0xFD, 0xFC, 0x90, 0x90, 0xE5, 0x12, 0x43, 0xFF, 0x12, 0x42, 0xAB, 0xC0, ++0x07, 0x90, 0x8E, 0xAC, 0xE0, 0xFB, 0xE4, 0xFA, 0xF9, 0xF8, 0xD0, 0x07, 0x12, 0x43, 0x36, 0x90, ++0x8E, 0xAD, 0xEF, 0xF0, 0x90, 0x95, 0x63, 0xE0, 0x64, 0x01, 0x70, 0x18, 0x91, 0xC5, 0x60, 0x09, ++0x91, 0xBE, 0xB1, 0xBD, 0x12, 0xA5, 0x84, 0x80, 0x06, 0x91, 0xBE, 0x91, 0xCD, 0xB1, 0xA7, 0x12, ++0xA2, 0x43, 0x80, 0x15, 0x91, 0xC5, 0x60, 0x06, 0x91, 0xBE, 0xB1, 0xBD, 0x80, 0x04, 0x91, 0xBE, ++0x91, 0xCD, 0xB1, 0xC7, 0xF1, 0x75, 0x12, 0x4F, 0xD0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x74, 0x10, ++0xF0, 0xFD, 0x7F, 0x03, 0x22, 0x90, 0x8E, 0xAC, 0xE0, 0x90, 0x01, 0x3F, 0x22, 0x74, 0x1D, 0xF1, ++0xE7, 0xB1, 0xD9, 0xF0, 0x22, 0x90, 0x05, 0x62, 0xE0, 0xFE, 0x90, 0x05, 0x61, 0xE0, 0xFD, 0xED, ++0x78, 0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x12, 0x96, 0x84, 0xF1, 0xEF, 0x60, ++0x02, 0xA1, 0xA6, 0x90, 0x8E, 0x46, 0xE0, 0x70, 0x02, 0xA1, 0xA6, 0x12, 0xA5, 0x8D, 0x64, 0x01, ++0x70, 0x22, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0x8E, 0x4D, 0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0x8E, ++0x4C, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, 0x90, 0x8E, 0x4C, 0xE0, 0xFE, 0xFF, 0x80, 0x00, 0x90, ++0x8E, 0x4D, 0xEF, 0xF0, 0x12, 0x8A, 0x80, 0xE4, 0x90, 0x8E, 0x4F, 0xF0, 0x12, 0x8F, 0xBD, 0x12, ++0x99, 0x20, 0x12, 0x8F, 0xC9, 0x54, 0xEF, 0xF0, 0x12, 0xA5, 0x8D, 0x24, 0xFD, 0x50, 0x02, 0x80, ++0x03, 0x12, 0x99, 0x68, 0xF1, 0x7B, 0x30, 0xE0, 0x5B, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, ++0xE0, 0x27, 0xF1, 0xDF, 0x6F, 0x70, 0x4D, 0x90, 0x8E, 0x42, 0xE0, 0x44, 0x40, 0xF0, 0x12, 0xA2, ++0x0E, 0xF0, 0x90, 0x01, 0x3F, 0x91, 0xBE, 0xB1, 0xBD, 0xB1, 0xAD, 0x7D, 0x02, 0x7F, 0x02, 0xB1, ++0xB1, 0x90, 0x8E, 0x4D, 0xE0, 0x14, 0xF0, 0x80, 0x2B, 0x12, 0xA5, 0xF3, 0x64, 0x01, 0x70, 0x24, ++0xF1, 0xDF, 0xFE, 0x6F, 0x60, 0x1E, 0x90, 0x05, 0x73, 0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x15, 0x12, ++0x8F, 0xB3, 0x30, 0xE0, 0x0F, 0xEF, 0x54, 0xBF, 0xF0, 0x90, 0x01, 0x3F, 0x91, 0xBE, 0x91, 0xCD, ++0xF1, 0x75, 0xB1, 0xC7, 0xF1, 0xD7, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0xB1, 0xB1, 0x7D, 0x01, 0x7F, ++0x02, 0x74, 0x15, 0xF1, 0xE7, 0xFE, 0xF6, 0x74, 0x30, 0xB1, 0xDD, 0xF0, 0x22, 0x74, 0x1D, 0x2F, ++0xF8, 0xE6, 0x4D, 0xB1, 0xD9, 0xF0, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0x74, 0x15, 0x2F, 0xF8, 0xE6, ++0x4D, 0xFE, 0xF6, 0x74, 0x30, 0xB1, 0xDD, 0xF0, 0x22, 0xFE, 0xF6, 0x74, 0x38, 0x2F, 0xF5, 0x82, ++0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0x22, 0xEF, 0x70, 0x33, 0x7D, 0x78, 0x7F, 0x02, 0xB1, 0xB1, ++0x7D, 0x02, 0x7F, 0x03, 0xB1, 0xB1, 0x7D, 0xC8, 0x7F, 0x02, 0x91, 0xCD, 0x12, 0x99, 0x20, 0xF0, ++0xE4, 0xFF, 0xD1, 0x57, 0xEF, 0x70, 0x0A, 0xF1, 0x86, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x80, ++0x07, 0x7D, 0x01, 0x7F, 0x0C, 0x12, 0x58, 0x63, 0xF1, 0x8B, 0x02, 0x8F, 0x92, 0x90, 0x01, 0x36, ++0x74, 0x78, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x78, 0xFF, 0xB1, 0xCB, 0x7D, 0x02, 0x7F, 0x03, ++0xB1, 0xCB, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0xF0, 0x12, 0x8F, 0xBD, 0xE4, 0xFF, 0xD1, 0x57, ++0xBF, 0x01, 0x11, 0x12, 0x8D, 0xCF, 0x90, 0x8E, 0x49, 0xE0, 0x20, 0xE2, 0x09, 0x7D, 0x01, 0x7F, ++0x04, 0x02, 0x58, 0x63, 0xF1, 0xD7, 0x22, 0x12, 0x67, 0xE5, 0xFE, 0xEF, 0x54, 0x07, 0xFF, 0x12, ++0x72, 0xAE, 0xE0, 0xFD, 0x7C, 0x00, 0x12, 0xA4, 0xCD, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, ++0xD8, 0xF9, 0xFF, 0xEE, 0x5C, 0xFE, 0xEF, 0x5D, 0x4E, 0x7F, 0x00, 0x60, 0x02, 0x7F, 0x01, 0x22, ++0x90, 0x8E, 0x46, 0xE0, 0x70, 0x02, 0xE1, 0x0F, 0x90, 0x8E, 0x5D, 0xE0, 0x04, 0x12, 0x51, 0x0C, ++0x12, 0x43, 0xD5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x12, 0x51, ++0x26, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x43, ++0xD5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x51, 0x26, 0x78, 0x18, 0x12, ++0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x43, 0xD5, 0x90, 0x8E, 0x91, ++0x12, 0xA2, 0x24, 0x54, 0x7F, 0xF0, 0xA3, 0xE0, 0x30, 0xE0, 0x0F, 0x12, 0x8D, 0x21, 0x90, 0x95, ++0x3E, 0x74, 0x05, 0xF0, 0x12, 0x8C, 0x19, 0x12, 0x8F, 0xA2, 0xF1, 0x7B, 0x30, 0xE0, 0x09, 0x90, ++0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x02, 0xB1, 0xA7, 0x90, 0x95, 0x5D, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, ++0x94, 0x80, 0x40, 0x0B, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, 0x44, 0x01, 0xF0, 0x12, ++0x71, 0xA2, 0x12, 0x9B, 0x61, 0xE4, 0x90, 0x93, 0x43, 0xF0, 0xF1, 0xA0, 0x12, 0x67, 0xFA, 0x30, ++0xE0, 0x52, 0x90, 0x90, 0x8B, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x7C, 0x00, 0x7D, 0x64, 0x12, 0x07, ++0x15, 0x90, 0x90, 0xDF, 0xE0, 0x6E, 0x70, 0x03, 0xA3, 0xE0, 0x6F, 0x60, 0x0A, 0x90, 0x90, 0xDF, ++0xE4, 0x75, 0xF0, 0x01, 0x02, 0x08, 0xD6, 0x90, 0x90, 0x8F, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, ++0x90, 0x9D, 0xE0, 0xB5, 0x06, 0x14, 0xA3, 0xE0, 0xB5, 0x07, 0x0F, 0xEF, 0x4E, 0x60, 0x0B, 0x90, ++0x01, 0xC7, 0x74, 0x31, 0xF0, 0x7F, 0x01, 0x02, 0x71, 0x54, 0x12, 0x95, 0x18, 0xE4, 0x90, 0x90, ++0xDF, 0xF0, 0xA3, 0xF0, 0x22, 0x7D, 0x01, 0x7F, 0x02, 0xA1, 0xCB, 0x90, 0x8E, 0x42, 0xE0, 0xFF, ++0x13, 0x13, 0x13, 0x54, 0x1F, 0x22, 0x12, 0x4E, 0x14, 0xF1, 0x93, 0x90, 0x8E, 0x41, 0xE0, 0x54, ++0xF7, 0xF0, 0x22, 0x12, 0x8F, 0x8A, 0x12, 0x4F, 0xCA, 0x7D, 0x0C, 0x7F, 0x01, 0x02, 0x4F, 0x1B, ++0x90, 0x8E, 0xAA, 0xE0, 0x30, 0xE0, 0x09, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x02, 0xB1, 0xA7, ++0x22, 0x90, 0x8E, 0x41, 0xE0, 0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x8E, 0x4F, 0xF0, 0xA3, 0xF0, 0x90, ++0x8E, 0x4A, 0xF0, 0x90, 0x8E, 0x42, 0xE0, 0x54, 0xF7, 0xF0, 0x54, 0xBF, 0xF0, 0xF1, 0x75, 0xB1, ++0xC7, 0x7D, 0x10, 0x7F, 0x03, 0x81, 0xCD, 0x90, 0x8E, 0x42, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, ++0x8E, 0x4C, 0xE0, 0xFF, 0xA3, 0xE0, 0x22, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0x22, 0xE4, ++0xFF, 0xD1, 0x57, 0xEF, 0x64, 0x01, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, ++0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xF7, 0xF0, 0x74, 0x6F, 0xA3, 0xF0, 0x12, 0x98, ++0x91, 0xE5, 0x21, 0x30, 0xE0, 0x02, 0xF1, 0xE4, 0xE5, 0x21, 0x30, 0xE1, 0x02, 0x11, 0x84, 0xE5, ++0x21, 0x30, 0xE2, 0x02, 0x11, 0x8E, 0xE5, 0x22, 0x30, 0xE0, 0x03, 0x12, 0x8C, 0xE9, 0xE5, 0x24, ++0x30, 0xE1, 0x05, 0x7F, 0x04, 0x12, 0x69, 0x5F, 0xE5, 0x24, 0x30, 0xE4, 0x03, 0x12, 0x6A, 0xD9, ++0xE5, 0x24, 0x30, 0xE5, 0x02, 0x11, 0xA5, 0xE5, 0x24, 0x30, 0xE6, 0x02, 0x31, 0x1B, 0x74, 0xF7, ++0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x6F, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, ++0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, ++0xF0, 0xD0, 0xE0, 0x32, 0x90, 0x8E, 0x46, 0xE0, 0x60, 0x03, 0x12, 0x8D, 0x66, 0x22, 0x90, 0x8E, ++0x46, 0xE0, 0x60, 0x10, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x03, 0x02, 0x9F, 0xDF, 0x12, 0x6F, ++0x8B, 0x12, 0x58, 0x56, 0x22, 0x90, 0x8E, 0x41, 0x12, 0x86, 0xF4, 0x30, 0xE0, 0x16, 0xEF, 0x54, ++0xBF, 0x12, 0xA5, 0xBA, 0x30, 0xE0, 0x06, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFE, ++0xF0, 0x12, 0x58, 0x56, 0xE4, 0xFF, 0x90, 0x93, 0x44, 0xE0, 0xFD, 0x30, 0xE0, 0x4C, 0x90, 0x93, ++0x49, 0xE0, 0xFC, 0x60, 0x45, 0x12, 0xA4, 0xCD, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0x90, 0x04, 0xE0, 0xE0, 0xFB, 0xEF, 0x5B, 0x60, 0x0B, 0xE4, 0x90, 0x93, 0x49, 0xF0, ++0x90, 0x93, 0x4B, 0x04, 0xF0, 0x22, 0x90, 0x93, 0x46, 0xE0, 0xD3, 0x9C, 0x50, 0x13, 0xED, 0x13, ++0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x04, 0x51, 0x2D, 0x80, 0x02, 0x31, 0x4C, 0x31, 0x45, 0xF0, ++0x22, 0x12, 0x5D, 0x7E, 0x90, 0x93, 0x49, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x8E, 0x41, 0xE0, 0xFF, ++0x51, 0x26, 0x30, 0xE0, 0x1C, 0xEF, 0x54, 0x7F, 0x12, 0xA5, 0xBA, 0x30, 0xE1, 0x06, 0xE0, 0x44, ++0x02, 0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x8E, 0x46, 0xE0, 0x60, 0x03, 0x12, 0x58, ++0x56, 0x7F, 0x01, 0x80, 0x81, 0x90, 0x93, 0x44, 0xE0, 0x54, 0xFE, 0x22, 0x90, 0x01, 0xC7, 0x74, ++0x10, 0xF0, 0x7F, 0x01, 0x90, 0x95, 0x5E, 0xEF, 0xF0, 0x90, 0x8D, 0x07, 0xE0, 0x64, 0x02, 0x70, ++0x1E, 0x90, 0x95, 0x5E, 0xE0, 0xFD, 0x64, 0x01, 0x70, 0x2D, 0x12, 0x67, 0xBD, 0x51, 0x22, 0x30, ++0xE0, 0x09, 0x90, 0x01, 0x4D, 0xE0, 0x64, 0x80, 0xF0, 0x80, 0x1C, 0xAF, 0x05, 0x80, 0x15, 0x90, ++0x01, 0x00, 0x74, 0xFF, 0xF0, 0x12, 0x86, 0xED, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x01, 0xF0, 0x90, ++0x95, 0x5E, 0xE0, 0xFF, 0x12, 0x4C, 0x64, 0x31, 0x45, 0xF0, 0x90, 0x8E, 0xAE, 0xE0, 0x54, 0xBF, ++0xF0, 0x22, 0x90, 0x93, 0x44, 0xE0, 0x30, 0xE0, 0x78, 0x90, 0x93, 0x48, 0xE0, 0x04, 0xF0, 0x90, ++0x93, 0x4B, 0xE0, 0x64, 0x01, 0x70, 0x2D, 0x90, 0x93, 0x44, 0x12, 0x8F, 0xB6, 0x30, 0xE0, 0x24, ++0x90, 0x93, 0x4A, 0xE0, 0x70, 0x1E, 0x90, 0x93, 0x47, 0xE0, 0xFE, 0xA3, 0xE0, 0xC3, 0x9E, 0x40, ++0x13, 0x12, 0x67, 0xE5, 0x30, 0xE0, 0x07, 0x51, 0x2D, 0x31, 0x45, 0xF0, 0x80, 0x06, 0x31, 0x4C, ++0x31, 0x45, 0xF0, 0x22, 0x90, 0x93, 0x48, 0xE0, 0xFF, 0x90, 0x93, 0x45, 0xE0, 0xD3, 0x9F, 0x50, ++0x30, 0x90, 0x06, 0x92, 0xE0, 0x20, 0xE2, 0x1A, 0x90, 0x93, 0x4A, 0xE0, 0x70, 0x14, 0x7D, 0x08, ++0xFF, 0x12, 0x5D, 0x82, 0x90, 0x93, 0x49, 0xE0, 0x04, 0xF0, 0x90, 0x93, 0x43, 0xE0, 0x04, 0xF0, ++0x80, 0x06, 0x90, 0x06, 0x92, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0x93, 0x48, 0xF0, 0x90, 0x93, 0x4A, ++0xF0, 0x22, 0x90, 0x8E, 0xB2, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x22, 0xE4, 0xFD, 0xFF, ++0x51, 0x6D, 0xE4, 0xFF, 0x7D, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x4E, ++0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x7D, 0x44, 0x7F, 0x6F, 0x12, 0x5A, 0x47, 0x12, 0x5D, 0x24, 0x90, ++0x95, 0x4F, 0xE0, 0x90, 0x95, 0x4E, 0xB4, 0x01, 0x07, 0x71, 0x0F, 0x44, 0x04, 0xF0, 0x80, 0x05, ++0x71, 0x0F, 0x54, 0xFB, 0xF0, 0x12, 0x4F, 0xCA, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x67, 0xE5, ++0xFE, 0xEF, 0x54, 0x07, 0xFF, 0xED, 0x70, 0x12, 0x51, 0xAE, 0xC0, 0x83, 0xC0, 0x82, 0x51, 0xA6, ++0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5E, 0x80, 0x0F, 0x51, 0xAE, 0xC0, 0x83, 0xC0, 0x82, ++0x51, 0xA6, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x51, 0xB9, ++0x90, 0x8E, 0x40, 0xEF, 0xF0, 0x22, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x22, 0x74, 0x30, ++0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x7D, 0x10, 0xED, 0x14, 0xF9, 0x24, 0x30, 0x51, 0xB1, 0xE0, 0x60, 0x3A, 0x7C, 0x08, 0xEC, 0x14, ++0x90, 0x95, 0x5C, 0xF0, 0x74, 0x30, 0x29, 0x51, 0xB1, 0xE0, 0xFB, 0x7A, 0x00, 0x90, 0x95, 0x5C, ++0x12, 0xA4, 0xCB, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5A, 0xFE, ++0xEF, 0x5B, 0x4E, 0x60, 0x0F, 0xE9, 0x75, 0xF0, 0x08, 0xA4, 0xFF, 0x90, 0x95, 0x5C, 0xE0, 0x2F, ++0x04, 0xFF, 0x80, 0x06, 0xDC, 0xC8, 0xDD, 0xBA, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, ++0x75, 0xF0, 0x10, 0x90, 0x81, 0x05, 0x12, 0x44, 0x0B, 0xE0, 0x22, 0x8B, 0x51, 0x8A, 0x52, 0x89, ++0x53, 0xB1, 0x06, 0xFF, 0xF5, 0x55, 0x12, 0x06, 0x89, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x06, 0xB1, ++0xD9, 0xF5, 0x56, 0x80, 0x02, 0x8F, 0x56, 0x85, 0x55, 0x54, 0xE5, 0x54, 0xD3, 0x95, 0x56, 0x50, ++0x24, 0xAB, 0x51, 0xAA, 0x52, 0xA9, 0x53, 0x12, 0x06, 0x89, 0x54, 0x01, 0xFD, 0xAF, 0x54, 0x51, ++0x6D, 0xAF, 0x54, 0x12, 0x6E, 0x57, 0xEF, 0xAF, 0x54, 0x70, 0x04, 0x51, 0x34, 0x80, 0x02, 0xF1, ++0xD9, 0x05, 0x54, 0x80, 0xD5, 0xE5, 0x55, 0x70, 0x10, 0xFF, 0x12, 0x6E, 0x57, 0xEF, 0x70, 0x09, ++0x12, 0x6F, 0x86, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, 0x90, 0x93, 0x60, 0x12, 0x44, 0x20, ++0x90, 0x93, 0x5F, 0xEF, 0xF0, 0x12, 0x44, 0x29, 0x73, 0xBC, 0x00, 0x73, 0xC0, 0x01, 0x73, 0xC4, ++0x03, 0x73, 0xC9, 0x04, 0x73, 0xCD, 0x12, 0x73, 0xD2, 0x14, 0x73, 0xD7, 0x20, 0x73, 0xDB, 0x25, ++0x73, 0xE0, 0x27, 0x73, 0xE9, 0x80, 0x73, 0xE5, 0x81, 0x73, 0xED, 0x82, 0x73, 0xF2, 0x83, 0x73, ++0xF7, 0x84, 0x74, 0x01, 0x86, 0x73, 0xFC, 0x88, 0x00, 0x00, 0x74, 0x06, 0x91, 0x16, 0xE1, 0x78, ++0x91, 0x16, 0x61, 0x1B, 0x91, 0x16, 0x02, 0x88, 0x4A, 0x91, 0x16, 0xC1, 0x92, 0x91, 0x16, 0x02, ++0x87, 0xE5, 0x91, 0x16, 0x02, 0x87, 0xF9, 0x91, 0x16, 0xC1, 0xCF, 0x91, 0x16, 0x02, 0x88, 0x08, ++0x91, 0x16, 0x02, 0x88, 0x10, 0x91, 0x16, 0xA1, 0x21, 0x91, 0x16, 0x80, 0x2F, 0x91, 0x16, 0x02, ++0x9F, 0x53, 0x91, 0x16, 0x02, 0x95, 0xEC, 0x91, 0x16, 0x02, 0x96, 0x31, 0x91, 0x16, 0x02, 0x96, ++0xA3, 0x91, 0x16, 0x02, 0xA2, 0x4F, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x93, 0x5F, ++0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, 0x90, 0x93, 0x60, 0x02, 0x44, 0x17, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0xF1, 0xB4, 0x12, 0x06, 0x89, 0x20, 0xE0, 0x05, 0x12, 0x9B, 0xF0, 0x81, 0xFF, ++0xF1, 0xCB, 0x90, 0x8E, 0xB1, 0xB1, 0x0C, 0xF1, 0xE9, 0xFF, 0x90, 0x8E, 0xB1, 0x12, 0xA3, 0x00, ++0xB1, 0x1A, 0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, 0x4D, 0xFF, 0x90, 0x8E, 0xB1, 0xF1, 0xC1, 0xB1, ++0x1A, 0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0x4D, 0xFF, 0x90, 0x8E, 0xB1, 0x12, 0xA5, 0x96, 0xB1, ++0x04, 0x54, 0x80, 0xFF, 0x90, 0x8E, 0xB2, 0xE0, 0x54, 0x7F, 0x4F, 0xF0, 0x12, 0x06, 0x89, 0x13, ++0x13, 0x54, 0x3F, 0x30, 0xE0, 0x07, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x93, 0x63, ++0x12, 0x44, 0x17, 0x12, 0x06, 0x89, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x06, ++0x90, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x8D, 0x07, 0xE0, 0xB4, 0x02, 0x05, 0x51, 0x22, 0x20, 0xE0, ++0x40, 0xB1, 0x06, 0x54, 0x7F, 0xFF, 0x90, 0x8E, 0xB2, 0xE0, 0x54, 0x80, 0xB1, 0xD7, 0x90, 0x8E, ++0xB3, 0xF1, 0x69, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x8E, 0xB4, 0x12, 0x88, 0x39, 0xEF, 0x54, 0xFE, ++0xFF, 0xEE, 0x54, 0x01, 0x4F, 0xF1, 0xBA, 0x54, 0x04, 0xFF, 0x90, 0x8E, 0xB5, 0xE0, 0x54, 0xFB, ++0x4F, 0xF0, 0x12, 0x4D, 0x12, 0x54, 0x07, 0x7D, 0x00, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x12, 0x4A, ++0x77, 0x90, 0x8D, 0x07, 0xE0, 0xB4, 0x01, 0x17, 0x90, 0xFE, 0x10, 0xE0, 0x44, 0x04, 0xF0, 0x90, ++0x90, 0x89, 0x74, 0x05, 0xF0, 0x12, 0x8F, 0xAA, 0x7A, 0x8F, 0x79, 0xC8, 0x12, 0x08, 0xAA, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x4E, 0xF0, 0x90, 0x00, 0x01, 0x02, 0x06, 0xA2, 0xE0, 0x54, 0xFE, 0x4E, ++0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0xFF, 0xF0, 0x12, 0x06, 0x89, 0xFE, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xF1, 0xD1, 0x90, 0x8E, 0xAE, 0xB1, 0x0C, 0xF1, ++0xE9, 0xFF, 0x90, 0x8E, 0xAE, 0x12, 0xA3, 0x00, 0xB1, 0x1A, 0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, ++0x4D, 0xFF, 0x90, 0x8E, 0xAE, 0xF1, 0xC1, 0xB1, 0x1A, 0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0x4D, ++0xFF, 0x90, 0x8E, 0xAE, 0x12, 0xA5, 0x96, 0x4E, 0xB1, 0xD8, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x8E, ++0xB0, 0xE0, 0x54, 0xFE, 0xB1, 0x04, 0xFE, 0x54, 0x01, 0xFD, 0x90, 0x8E, 0xAF, 0xE0, 0x54, 0xFE, ++0x4D, 0xFD, 0xF0, 0xEE, 0x54, 0x04, 0xFE, 0xED, 0x54, 0xFB, 0x4E, 0xF0, 0xEF, 0x54, 0x10, 0xFF, ++0xA3, 0xE0, 0x54, 0xEF, 0x4F, 0xFF, 0xB1, 0xD8, 0xF1, 0xC3, 0x90, 0x8E, 0xB0, 0x12, 0x7C, 0xE0, ++0x12, 0xA5, 0xD4, 0x90, 0x8E, 0xAE, 0xE0, 0xC3, 0x13, 0x54, 0x01, 0xFF, 0x12, 0x9F, 0x9C, 0xF1, ++0xDD, 0x54, 0x01, 0xFF, 0x12, 0x9C, 0xBB, 0xF1, 0xDD, 0x13, 0x54, 0x01, 0xFF, 0x12, 0x7E, 0xA9, ++0x90, 0x8E, 0xAE, 0xE0, 0xC4, 0x54, 0x01, 0xFF, 0x12, 0x9F, 0xA8, 0x90, 0x8E, 0xAE, 0xE0, 0xC4, ++0x13, 0x13, 0x54, 0x01, 0xFF, 0x12, 0x7D, 0x64, 0x90, 0x8E, 0xAE, 0xE0, 0x54, 0x01, 0xFF, 0x12, ++0x7E, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x4F, 0xF0, 0x90, 0x00, 0x02, 0x02, 0x06, 0xA2, 0xFF, ++0x7B, 0x01, 0x7A, 0x93, 0x79, 0xC6, 0x12, 0x06, 0x89, 0x90, 0x06, 0x74, 0xB1, 0x05, 0x90, 0x06, ++0x75, 0xB1, 0xD8, 0x90, 0x06, 0x76, 0xF1, 0x69, 0x90, 0x06, 0x77, 0xF0, 0x90, 0x06, 0x70, 0xEF, ++0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x04, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0x7F, 0x01, 0x7E, 0x00, 0x02, ++0x3E, 0x50, 0x90, 0x93, 0xC2, 0xEF, 0xF0, 0xA3, 0x12, 0x44, 0x20, 0x90, 0x93, 0xC3, 0x12, 0x5D, ++0x02, 0xD1, 0x7D, 0x24, 0x02, 0xB1, 0xDF, 0xF1, 0x70, 0x24, 0x04, 0xD1, 0x74, 0x24, 0x03, 0xB1, ++0xDF, 0xF1, 0x70, 0x24, 0x08, 0xD1, 0x74, 0x24, 0x04, 0xB1, 0xDF, 0xF1, 0x70, 0x24, 0x0C, 0xD1, ++0x74, 0x24, 0x05, 0xB1, 0xDF, 0x90, 0x93, 0xC2, 0xE0, 0xFE, 0x44, 0x50, 0x90, 0x93, 0xC6, 0xF0, ++0xA3, 0x74, 0x80, 0xF0, 0xA3, 0x74, 0xFF, 0xF0, 0xA3, 0xF0, 0xEE, 0x75, 0xF0, 0x08, 0xA4, 0xB1, ++0xDF, 0x90, 0x93, 0xC6, 0x74, 0xFF, 0x12, 0x4D, 0xDD, 0xD1, 0x89, 0x04, 0xB1, 0xDF, 0x90, 0x06, ++0x72, 0xE4, 0xF0, 0x22, 0xF9, 0xE4, 0x3A, 0x8B, 0x40, 0xF5, 0x41, 0x89, 0x42, 0x75, 0x43, 0x04, ++0x7B, 0x01, 0x7A, 0x93, 0x79, 0xC6, 0x12, 0x35, 0x26, 0x90, 0x93, 0xC2, 0xE0, 0x75, 0xF0, 0x08, ++0xA4, 0x22, 0xF1, 0xB4, 0x12, 0x89, 0x29, 0xF1, 0xCB, 0x31, 0x45, 0x4E, 0xF0, 0xEF, 0xC3, 0x13, ++0x30, 0xE0, 0x2B, 0xB1, 0x06, 0x90, 0x93, 0x45, 0xB1, 0xD8, 0x90, 0x93, 0x46, 0xF0, 0x12, 0x06, ++0x89, 0xFF, 0x54, 0x04, 0xFE, 0x90, 0x93, 0x44, 0xE0, 0x54, 0xFB, 0x4E, 0xF1, 0x69, 0x90, 0x93, ++0x47, 0xF0, 0xEF, 0x54, 0x08, 0xFF, 0x90, 0x93, 0x44, 0xE0, 0x54, 0xF7, 0x4F, 0xF0, 0x22, 0xF1, ++0xB4, 0x12, 0x06, 0x89, 0xFF, 0x54, 0x7F, 0x90, 0x8E, 0x46, 0xF0, 0xEF, 0x51, 0x26, 0xA3, 0xB1, ++0x05, 0xFD, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x90, 0x8E, 0x44, 0xE0, 0x54, 0xF0, 0x4F, 0xF1, ++0x69, 0xFC, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0x8E, 0x41, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xEC, ++0x54, 0x04, 0xC3, 0x13, 0xFF, 0x90, 0x8E, 0x43, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xED, 0x54, 0x0F, ++0xC4, 0x54, 0xF0, 0xFF, 0xA3, 0xE0, 0x54, 0x0F, 0xB1, 0xD7, 0x90, 0x8E, 0x45, 0xF1, 0xBA, 0xFD, ++0x7F, 0x02, 0x12, 0x4F, 0x1B, 0x90, 0x94, 0x88, 0xE0, 0x60, 0x03, 0x12, 0x4F, 0x0F, 0x90, 0x93, ++0x63, 0x12, 0x44, 0x17, 0x90, 0x93, 0x66, 0x12, 0x44, 0x20, 0x12, 0x6F, 0xB1, 0x90, 0x8E, 0x46, ++0xE0, 0xFF, 0x12, 0x6D, 0xE7, 0x90, 0x8E, 0x46, 0xE0, 0x60, 0x1D, 0x90, 0x93, 0x66, 0x12, 0x44, ++0x17, 0xB1, 0x06, 0x54, 0x0F, 0xFF, 0xB1, 0xD9, 0xFD, 0x12, 0xA0, 0x8F, 0x12, 0x8D, 0x21, 0x90, ++0x95, 0x3E, 0x74, 0x01, 0xF0, 0x12, 0x8C, 0x19, 0x22, 0xF0, 0x90, 0x00, 0x03, 0x02, 0x06, 0xA2, ++0x90, 0x93, 0xC3, 0x12, 0x44, 0x17, 0xE9, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x51, 0x12, 0x06, ++0x89, 0x25, 0x51, 0x90, 0x8D, 0x38, 0xB1, 0x05, 0x25, 0x51, 0x90, 0x8D, 0x39, 0xB1, 0xD8, 0x25, ++0x51, 0x90, 0x8D, 0x3A, 0xF1, 0x69, 0x25, 0x51, 0x90, 0x8D, 0x3B, 0xF1, 0xBA, 0x25, 0x51, 0x90, ++0x8D, 0x3C, 0x12, 0x96, 0x2A, 0x25, 0x51, 0x90, 0x8D, 0x3D, 0x12, 0x95, 0xE5, 0x25, 0x51, 0x90, ++0x8D, 0x3E, 0xF0, 0x22, 0x90, 0x93, 0x63, 0x02, 0x44, 0x20, 0xF0, 0x90, 0x00, 0x04, 0x02, 0x06, ++0xA2, 0xF0, 0xEE, 0x54, 0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x4E, 0x22, 0x90, 0x93, 0x63, 0x12, 0x44, ++0x17, 0x12, 0x06, 0x89, 0xFF, 0x54, 0x01, 0xFE, 0x22, 0xE4, 0xFD, 0x41, 0x36, 0x90, 0x8E, 0xAE, ++0xE0, 0x13, 0x13, 0x22, 0x7F, 0x80, 0x02, 0x69, 0x5F, 0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, 0x4D, ++0x22, 0x32, 0x90, 0x95, 0x5B, 0xEF, 0xF0, 0x7F, 0x02, 0x12, 0x48, 0x20, 0x90, 0x8D, 0x01, 0xE0, ++0xFF, 0x90, 0x95, 0x5B, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x8D, 0x01, 0xF0, 0x22, 0x90, 0x93, 0x6E, ++0x74, 0x12, 0xF0, 0x90, 0x93, 0x7C, 0x74, 0x05, 0xF0, 0x90, 0x93, 0x70, 0xEF, 0x12, 0xA6, 0x0B, ++0x90, 0x93, 0x6C, 0xE0, 0x90, 0x93, 0x73, 0xF0, 0x90, 0x93, 0x6D, 0xE0, 0x90, 0x93, 0x74, 0xF0, ++0x7B, 0x01, 0x7A, 0x93, 0x79, 0x6E, 0x11, 0xC0, 0x7F, 0x04, 0x80, 0xB6, 0x11, 0xB9, 0x7F, 0xF5, ++0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x06, 0x90, 0x93, 0x63, 0xE0, 0xA3, 0xF0, 0x11, 0xB9, ++0x7F, 0xF6, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x08, 0x90, 0x93, 0x63, 0xE0, 0x90, 0x93, ++0x65, 0xF0, 0x11, 0xB9, 0x7F, 0xF4, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x08, 0x90, 0x93, ++0x63, 0xE0, 0x90, 0x93, 0x66, 0xF0, 0x11, 0xB9, 0x7F, 0xF3, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, ++0x01, 0x08, 0x90, 0x93, 0x63, 0xE0, 0x90, 0x93, 0x67, 0xF0, 0x11, 0xB9, 0x7F, 0xF2, 0x7E, 0x01, ++0x12, 0x34, 0xC1, 0xBF, 0x01, 0x08, 0x90, 0x93, 0x63, 0xE0, 0x90, 0x93, 0x68, 0xF0, 0x90, 0x93, ++0x64, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x93, 0x6C, 0xF0, 0x90, ++0x93, 0x68, 0xE0, 0x90, 0x93, 0x6D, 0xF0, 0x01, 0x0D, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x63, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8E, 0x27, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, ++0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x8E, 0x28, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, ++0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x2A, ++0xC0, 0x01, 0x90, 0x8E, 0x28, 0xE0, 0x12, 0x96, 0x97, 0xA8, 0x01, 0xFC, 0x7D, 0x01, 0xD0, 0x01, ++0x7E, 0x00, 0x7F, 0x0F, 0x12, 0x06, 0x63, 0x90, 0x8E, 0x28, 0x12, 0x88, 0xCC, 0xB4, 0x0A, 0x02, ++0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x8E, 0x28, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x94, 0x7F, 0xE0, 0xFF, 0x12, 0xA3, 0x0A, 0xEF, 0x70, ++0x02, 0x21, 0xD7, 0x90, 0x94, 0x80, 0xE0, 0xFB, 0xD3, 0x94, 0x00, 0x40, 0x1A, 0x90, 0x94, 0xB3, ++0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x0F, 0xAF, 0x03, 0xE4, 0xFC, 0xFD, 0xFE, 0x12, 0x57, 0xA7, ++0x7F, 0x08, 0x7E, 0x0E, 0x12, 0x54, 0xE0, 0x90, 0x94, 0x7F, 0xE0, 0xFF, 0x90, 0x06, 0x33, 0xF0, ++0x12, 0xA5, 0x7B, 0xE4, 0xFB, 0xFD, 0x51, 0x54, 0x90, 0x94, 0x82, 0xE0, 0x60, 0x07, 0x90, 0x8E, ++0x2D, 0xE0, 0xFF, 0x51, 0x1E, 0x12, 0x9F, 0xD7, 0x30, 0xE0, 0x3A, 0x90, 0x90, 0xE2, 0xE0, 0x60, ++0x34, 0xE4, 0x90, 0x93, 0x61, 0xF0, 0x90, 0x90, 0xE2, 0xE0, 0xFF, 0x90, 0x93, 0x61, 0xE0, 0xC3, ++0x9F, 0x50, 0x22, 0x7F, 0x03, 0x7E, 0x00, 0x12, 0x3D, 0xC2, 0x90, 0x93, 0x61, 0xE0, 0x24, 0x21, ++0x12, 0xA5, 0xDC, 0xE0, 0xFF, 0x51, 0x1E, 0x90, 0x01, 0xA6, 0xE0, 0x04, 0xF0, 0x90, 0x93, 0x61, ++0xE0, 0x04, 0xF0, 0x80, 0xD1, 0x90, 0x94, 0x81, 0xE0, 0x90, 0x93, 0x60, 0xF0, 0x90, 0x94, 0x6C, ++0xE0, 0x04, 0xF0, 0xE0, 0xFF, 0x71, 0x5C, 0x90, 0x93, 0x60, 0x12, 0x51, 0x26, 0x12, 0xA3, 0x89, ++0x7F, 0x04, 0x12, 0x6B, 0x22, 0x80, 0x42, 0xE4, 0x90, 0x94, 0x6C, 0xF0, 0x90, 0x94, 0x88, 0xF0, ++0x90, 0x06, 0x32, 0xE0, 0x54, 0xFB, 0xF0, 0x12, 0x57, 0x38, 0xE4, 0xFF, 0x12, 0x6E, 0x57, 0xBF, ++0x01, 0x0D, 0x90, 0x94, 0x84, 0xE0, 0xFD, 0x7F, 0x02, 0x12, 0x4F, 0x1B, 0x12, 0xA1, 0x8A, 0x90, ++0x93, 0x62, 0x74, 0x07, 0xF0, 0x90, 0x93, 0x70, 0xF0, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x62, 0x11, ++0xC0, 0x7F, 0x04, 0x12, 0x77, 0xF2, 0x12, 0xA3, 0x35, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x71, 0xEF, 0xF0, 0x12, 0x96, 0xB6, 0xBF, 0x01, 0x1F, ++0x90, 0x06, 0x32, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x93, 0x71, 0xE0, 0xFF, 0x90, 0x95, 0x36, 0x74, ++0x07, 0xF0, 0x7B, 0x18, 0x7D, 0x01, 0x12, 0x5D, 0xCD, 0x90, 0x93, 0x72, 0x12, 0x87, 0xD9, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x37, 0xEF, 0xF0, ++0xED, 0x64, 0x01, 0x70, 0x33, 0xEB, 0xB4, 0x01, 0x07, 0xE0, 0x24, 0x02, 0xF5, 0x59, 0x80, 0x08, ++0x90, 0x95, 0x37, 0xE0, 0x24, 0xFE, 0xF5, 0x59, 0x90, 0x94, 0xA1, 0x12, 0x08, 0x79, 0x00, 0x00, ++0x00, 0xFF, 0xAF, 0x59, 0x51, 0xC8, 0xE4, 0xFF, 0x51, 0xD7, 0x90, 0x94, 0xA1, 0x12, 0x08, 0x79, ++0x00, 0x00, 0x00, 0xFF, 0xAF, 0x59, 0x80, 0x25, 0x90, 0x94, 0xA1, 0x12, 0x08, 0x79, 0x00, 0x00, ++0x00, 0xFF, 0x90, 0x95, 0x37, 0x12, 0x51, 0x26, 0x51, 0xCC, 0xE4, 0xFF, 0x51, 0xD7, 0x90, 0x94, ++0xA1, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0xFF, 0x90, 0x95, 0x37, 0xE0, 0xFF, 0x51, 0xC8, 0x7F, ++0x01, 0x51, 0xD7, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xFC, 0xFD, 0xFE, 0x90, 0x94, 0xA5, 0x12, ++0x08, 0x6D, 0x7D, 0x18, 0x7C, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x94, ++0x9F, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x94, 0x9E, 0xEF, 0xF0, 0xA3, 0xA3, 0xE0, 0xFD, 0x12, ++0x3E, 0x02, 0x90, 0x94, 0xA9, 0x12, 0x08, 0x6D, 0x90, 0x94, 0xA1, 0x12, 0x43, 0xF3, 0x12, 0x08, ++0x3A, 0x90, 0x94, 0xA9, 0x12, 0x57, 0xF3, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, ++0x94, 0xA1, 0x12, 0x43, 0xF3, 0x90, 0x94, 0xA5, 0x12, 0x57, 0xF3, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x12, 0x43, 0xD5, 0x90, 0x94, 0xAD, 0x12, 0x08, 0x6D, 0x90, 0x94, 0x9F, 0xA3, ++0xE0, 0xFD, 0xC0, 0x05, 0x90, 0x94, 0xAD, 0x12, 0x43, 0xF3, 0x90, 0xAA, 0x96, 0x12, 0x08, 0x6D, ++0x90, 0x94, 0x9E, 0xE0, 0xFF, 0xD0, 0x05, 0x12, 0x3D, 0x09, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, ++0x24, 0xFC, 0x60, 0x05, 0x04, 0x70, 0x04, 0x80, 0x33, 0x31, 0x1F, 0x22, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x71, 0xEF, 0xF0, 0x91, 0x04, 0x74, 0x10, 0x2F, 0xFF, 0x90, 0x93, ++0x71, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0x2F, 0xFF, 0x12, 0x5E, 0xD8, 0x75, 0x43, 0x04, 0x7B, 0x01, ++0x7A, 0x94, 0x79, 0x7F, 0x12, 0x35, 0x26, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0x90, 0x93, 0x60, ++0xF0, 0x90, 0x94, 0x88, 0x04, 0xF0, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x93, 0x29, ++0x12, 0x43, 0xF3, 0x12, 0x96, 0x7C, 0xE4, 0x3D, 0xFD, 0xE4, 0x3C, 0xFC, 0x90, 0x93, 0x29, 0x12, ++0x08, 0x6D, 0x91, 0xF2, 0xE4, 0x90, 0x94, 0x6C, 0xF0, 0xFF, 0x71, 0x5C, 0x12, 0x6F, 0xEF, 0x70, ++0x28, 0x71, 0xFD, 0x7F, 0x05, 0x7E, 0x00, 0x12, 0x3D, 0xC2, 0x12, 0x4F, 0x0F, 0x90, 0x8E, 0x49, ++0xE0, 0x64, 0x02, 0x60, 0x14, 0x90, 0x93, 0x60, 0xE0, 0x04, 0xF0, 0x12, 0xA5, 0xE4, 0x71, 0xFD, ++0x90, 0x93, 0x60, 0xE0, 0xD3, 0x94, 0x0A, 0x40, 0xE4, 0x90, 0x95, 0x0E, 0x12, 0x08, 0x79, 0x00, ++0x00, 0x00, 0x0A, 0xE4, 0x90, 0x95, 0x12, 0xF0, 0x7F, 0x04, 0x02, 0x6B, 0x22, 0x7D, 0x01, 0x7F, ++0x02, 0x02, 0x58, 0x63, 0x90, 0x8E, 0x2E, 0xE0, 0xFF, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, ++0x30, 0xE0, 0x02, 0x7E, 0x80, 0x90, 0xFD, 0x10, 0xED, 0xF0, 0xAF, 0x06, 0x22, 0x90, 0x93, 0x3A, ++0x91, 0xD8, 0xEF, 0xF0, 0xE0, 0xFE, 0x24, 0x28, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, ++0xFF, 0x74, 0x29, 0x2E, 0x12, 0x5F, 0x9E, 0xFD, 0x90, 0x93, 0x63, 0xE0, 0x24, 0x2C, 0x12, 0x94, ++0xEF, 0x90, 0x93, 0x63, 0xE0, 0x2F, 0x24, 0x30, 0xA3, 0xF0, 0xE0, 0xFD, 0x24, 0x04, 0xB1, 0xEE, ++0xFE, 0x74, 0x05, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x91, 0xE9, 0x90, 0x90, 0x95, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x93, 0x64, 0xE0, 0x24, 0x0C, 0xF9, 0xE4, 0x34, 0xFC, 0x12, 0x5E, ++0xDE, 0x75, 0x43, 0x04, 0x7B, 0x01, 0x7A, 0x90, 0x79, 0x97, 0x12, 0x35, 0x26, 0x90, 0x93, 0x64, ++0xE0, 0x24, 0x14, 0xF0, 0xE0, 0xFD, 0x12, 0x57, 0x23, 0xE0, 0xFE, 0x74, 0x00, 0x2D, 0x12, 0x53, ++0x7D, 0x91, 0xE9, 0x90, 0x90, 0x9B, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x93, 0x3B, 0x91, 0xD8, 0xEF, ++0xF0, 0x90, 0x90, 0x91, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x4E, 0x60, 0x12, 0x90, 0x93, 0x63, 0xE0, ++0x12, 0x5E, 0xD8, 0x8F, 0x43, 0x7B, 0x01, 0x7A, 0x90, 0x79, 0x9F, 0x12, 0x35, 0x26, 0x90, 0x93, ++0x3C, 0x91, 0xD8, 0xEF, 0xF0, 0x12, 0x5E, 0xD8, 0x90, 0x90, 0x93, 0xA3, 0xE0, 0xF5, 0x43, 0x7B, ++0x01, 0x7A, 0x90, 0x79, 0xBF, 0x02, 0x35, 0x26, 0xE0, 0xFF, 0x91, 0x09, 0x90, 0x93, 0x63, 0x22, ++0xF0, 0x90, 0x01, 0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF, 0xEC, ++0x3E, 0x22, 0x7F, 0x50, 0x7E, 0x0C, 0x12, 0x37, 0x4E, 0x90, 0x94, 0x6D, 0xEF, 0xF0, 0x7F, 0x58, ++0x7E, 0x0C, 0x12, 0x37, 0x4E, 0x90, 0x94, 0x6E, 0xEF, 0xF0, 0x90, 0x94, 0xB3, 0x12, 0x08, 0x79, ++0x00, 0x00, 0x00, 0x7F, 0x90, 0x94, 0xB7, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x17, 0x7F, 0x50, ++0x7E, 0x0C, 0x12, 0x55, 0x44, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x7F, 0x90, 0x94, 0xB7, 0x12, ++0x08, 0x79, 0x00, 0x00, 0x00, 0x17, 0x12, 0x54, 0xDC, 0x90, 0x06, 0x08, 0xE0, 0x90, 0x94, 0x83, ++0xF0, 0x90, 0x06, 0xA1, 0xE0, 0xFE, 0x90, 0x06, 0xA0, 0x91, 0xE9, 0x90, 0x94, 0x85, 0xF0, 0xA3, ++0xEF, 0x12, 0xA2, 0xF7, 0x90, 0x06, 0xA0, 0x74, 0x20, 0xF0, 0xA3, 0x74, 0x01, 0xF0, 0xE4, 0xFD, ++0xFF, 0x02, 0x53, 0x90, 0xEF, 0x60, 0x04, 0xB1, 0x6C, 0x91, 0x1D, 0x22, 0xE4, 0xFD, 0xFC, 0x90, ++0x93, 0x39, 0xD1, 0xA0, 0xAB, 0x05, 0x74, 0x01, 0x2B, 0x12, 0x57, 0x25, 0xE0, 0xFE, 0x74, 0x00, ++0x2B, 0x12, 0x53, 0x7D, 0x12, 0x91, 0x4E, 0x90, 0x90, 0x8B, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x03, ++0x2B, 0xD1, 0x58, 0xE0, 0xFE, 0x74, 0x02, 0x2B, 0xD1, 0x74, 0xE0, 0x24, 0x00, 0xFF, 0xEA, 0x3E, ++0x90, 0x90, 0x8D, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x05, 0x2B, 0xD1, 0x85, 0xFE, 0x74, 0x04, 0x2B, ++0xB1, 0xEE, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x90, 0x90, 0x8F, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x07, ++0x2B, 0xD1, 0x97, 0xFE, 0x74, 0x06, 0x2B, 0xD1, 0x7C, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x90, 0x90, ++0x91, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x09, 0x2B, 0x12, 0x5F, 0xAB, 0xFE, 0x74, 0x08, 0x2B, 0xD1, ++0x8E, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x90, 0x90, 0x93, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x91, 0x04, 0x74, 0x00, 0x2F, 0x12, 0x53, 0x7D, 0xE0, ++0x90, 0x94, 0x6F, 0xF0, 0x74, 0x01, 0x2F, 0x12, 0x57, 0x25, 0xE0, 0x90, 0x94, 0x70, 0xF0, 0x74, ++0x02, 0x2F, 0xD1, 0x74, 0xE0, 0x90, 0x94, 0x71, 0xF0, 0x74, 0x03, 0x2F, 0xD1, 0x58, 0xE0, 0x90, ++0x94, 0x72, 0xF0, 0x74, 0x04, 0x2F, 0xB1, 0xEE, 0x90, 0x94, 0x73, 0xF0, 0x74, 0x05, 0x2F, 0xD1, ++0x85, 0x90, 0x94, 0x74, 0xF0, 0x74, 0x06, 0x2F, 0xD1, 0x7C, 0x90, 0x94, 0x75, 0xF0, 0x74, 0x07, ++0x2F, 0xD1, 0x97, 0x90, 0x94, 0x76, 0xF0, 0x74, 0x08, 0x2F, 0xD1, 0x8E, 0x90, 0x94, 0x77, 0xF0, ++0x22, 0x90, 0x93, 0x63, 0xA3, 0xE0, 0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, ++0x12, 0x08, 0x6D, 0x90, 0x93, 0x63, 0xE4, 0x75, 0xF0, 0x04, 0x12, 0x08, 0xD6, 0x90, 0x93, 0x63, ++0xA3, 0xE0, 0x24, 0x02, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, ++0xE0, 0xFF, 0x91, 0x09, 0x7C, 0x00, 0xAD, 0x07, 0x22, 0xE4, 0xFD, 0xFC, 0xEF, 0x60, 0x3D, 0x90, ++0x93, 0x33, 0xD1, 0xA0, 0x12, 0x87, 0x65, 0x12, 0x77, 0xB4, 0x90, 0x93, 0x63, 0x12, 0x5D, 0x02, ++0x75, 0x43, 0x40, 0x7B, 0x01, 0x7A, 0x8F, 0x79, 0x7F, 0x12, 0x35, 0x26, 0xE4, 0xFD, 0x7F, 0x03, ++0x12, 0x30, 0xCE, 0x90, 0x93, 0x34, 0xE0, 0x12, 0x87, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, ++0xF9, 0xFF, 0x12, 0x39, 0xD6, 0x7D, 0x01, 0x7F, 0x03, 0x12, 0x30, 0xCE, 0x22, 0x12, 0x9C, 0xB2, ++0x12, 0x5E, 0xDA, 0x75, 0x43, 0x08, 0x7B, 0x01, 0x7A, 0x90, 0x79, 0x59, 0x02, 0x35, 0x26, 0xEF, ++0x60, 0x39, 0x90, 0x93, 0x2F, 0xE0, 0xFF, 0x60, 0x02, 0xD1, 0xED, 0x90, 0x01, 0xC7, 0xE4, 0x91, ++0xE0, 0x12, 0xA5, 0xD4, 0x90, 0x06, 0x09, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x35, 0x12, 0x4B, 0x29, ++0x12, 0xA2, 0xEF, 0x12, 0x90, 0xFA, 0x12, 0x9F, 0xB6, 0x12, 0x4F, 0xC8, 0x12, 0x9F, 0x69, 0x90, ++0x01, 0x34, 0x74, 0x08, 0xF0, 0xFD, 0xE4, 0xFF, 0x02, 0x6D, 0xCB, 0x7D, 0x08, 0xE4, 0xFF, 0x12, ++0x6D, 0xB1, 0x90, 0x06, 0x90, 0xE0, 0x54, 0xF0, 0xF0, 0x12, 0xA5, 0xEB, 0x12, 0x9B, 0xF0, 0x12, ++0x86, 0x64, 0x7E, 0x00, 0x7F, 0x25, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x8E, 0x79, 0xAE, 0x12, 0x08, ++0xAA, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x20, 0xF0, 0x12, 0x9B, 0xDD, 0x12, 0x4E, 0xED, 0x90, 0x8D, ++0x07, 0xE0, 0xFF, 0x64, 0x02, 0x70, 0x2D, 0x12, 0xA5, 0x3D, 0x30, 0xE0, 0x02, 0x7E, 0x01, 0x90, ++0x8E, 0xCD, 0x12, 0xA5, 0x3B, 0x30, 0xE1, 0x02, 0x7E, 0x01, 0x90, 0x8E, 0xCB, 0x12, 0xA5, 0x3B, ++0x30, 0xE2, 0x02, 0x7E, 0x01, 0x90, 0x8E, 0xCC, 0xEE, 0xF0, 0x90, 0xFD, 0x80, 0xE0, 0x90, 0x02, ++0xFB, 0xF0, 0x80, 0x50, 0xEF, 0x64, 0x01, 0x70, 0x20, 0x12, 0xA5, 0x34, 0x30, 0xE0, 0x02, 0x7F, ++0x01, 0x90, 0x8E, 0xCD, 0x12, 0xA5, 0x32, 0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, 0x8E, 0xCB, 0x12, ++0xA5, 0x32, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x80, 0x26, 0x90, 0x8D, 0x07, 0xE0, 0x64, 0x03, 0x70, ++0x23, 0x12, 0xA5, 0x2B, 0x30, 0xE0, 0x02, 0x7F, 0x01, 0x90, 0x8E, 0xCD, 0x12, 0xA5, 0x29, 0x30, ++0xE1, 0x02, 0x7F, 0x01, 0x90, 0x8E, 0xCB, 0x12, 0xA5, 0x29, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x90, ++0x8E, 0xCC, 0xEF, 0xF0, 0x90, 0x8E, 0xAE, 0xE0, 0x54, 0xEF, 0xF0, 0xE4, 0x90, 0x90, 0xE1, 0xF0, ++0xA3, 0xF0, 0x90, 0x90, 0xE9, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0x90, 0x90, 0xED, 0x12, ++0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0x90, 0x90, 0xE5, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, ++0x90, 0x93, 0x29, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0x22, 0x90, 0x8E, 0xAE, 0xE0, 0xFF, ++0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x05, 0xD1, 0x80, 0x12, 0x7F, 0xF4, 0x22, 0x90, 0x93, 0x63, 0xEC, ++0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x93, 0x61, 0xF1, 0x11, 0x90, 0x93, 0x87, 0xF0, 0xEF, 0x24, 0x24, ++0xFF, 0xE4, 0x3E, 0xFE, 0xC0, 0x06, 0x51, 0xBD, 0xD0, 0x06, 0xE4, 0xFB, 0xFA, 0x51, 0x8D, 0x4E, ++0x60, 0x3E, 0xE0, 0x24, 0x01, 0xFF, 0x90, 0x93, 0x88, 0x12, 0x65, 0xD5, 0x90, 0x93, 0x66, 0x51, ++0xA6, 0x90, 0x93, 0x66, 0x51, 0x9C, 0xFE, 0xC3, 0x9F, 0x50, 0x25, 0x90, 0x93, 0x89, 0xE0, 0x24, ++0x02, 0xFD, 0x90, 0x93, 0x88, 0xE0, 0x34, 0x00, 0xFC, 0xEE, 0x7E, 0x00, 0x2D, 0x12, 0x63, 0x5A, ++0x90, 0x93, 0x65, 0xE0, 0x24, 0x67, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0x12, 0x53, 0x85, 0x80, 0xD1, ++0x51, 0xAE, 0xC0, 0x06, 0x51, 0xBD, 0xD0, 0x06, 0x7B, 0x03, 0x51, 0x8A, 0x90, 0x93, 0x62, 0xE0, ++0x24, 0x22, 0x51, 0xB4, 0x90, 0x93, 0x88, 0x12, 0x67, 0xD3, 0xEF, 0x20, 0xE4, 0x02, 0x21, 0x72, ++0x90, 0x93, 0x87, 0xE0, 0x04, 0xF0, 0x51, 0xAE, 0xC0, 0x06, 0x51, 0xBD, 0xD0, 0x06, 0x7B, 0x30, ++0x51, 0x8A, 0x4E, 0x60, 0x45, 0xE0, 0x24, 0x08, 0xFF, 0x90, 0x93, 0x88, 0x12, 0x65, 0xD5, 0x51, ++0xA3, 0x51, 0x99, 0xC3, 0x9F, 0x50, 0x33, 0x90, 0x93, 0x89, 0xE0, 0x24, 0x0D, 0xFF, 0x90, 0x93, ++0x88, 0x12, 0x65, 0xD5, 0x90, 0x93, 0x8A, 0xEF, 0xF0, 0xBF, 0x02, 0x09, 0x90, 0x93, 0x87, 0xE0, ++0x24, 0x20, 0xF0, 0x80, 0x0E, 0x90, 0x93, 0x8A, 0xE0, 0xB4, 0x04, 0x07, 0x90, 0x93, 0x87, 0xE0, ++0x24, 0x40, 0xF0, 0x51, 0xDB, 0x12, 0x53, 0x89, 0x80, 0xC7, 0x51, 0xAE, 0xC0, 0x06, 0x51, 0xBD, ++0xD0, 0x06, 0x7B, 0xDD, 0x7A, 0x00, 0x7D, 0x01, 0x51, 0x8E, 0x4E, 0x60, 0x4A, 0xE0, 0x24, 0x0C, ++0xFF, 0x90, 0x93, 0x88, 0x12, 0x65, 0xD5, 0x51, 0xA3, 0x51, 0x99, 0xC3, 0x9F, 0x50, 0x38, 0x90, ++0x93, 0x89, 0xE0, 0x24, 0x11, 0xFF, 0x90, 0x93, 0x88, 0x12, 0x65, 0xD5, 0x90, 0x93, 0x8A, 0xEF, ++0xF0, 0xBF, 0x02, 0x09, 0x90, 0x93, 0x87, 0xE0, 0x24, 0x02, 0xF0, 0x80, 0x0E, 0x90, 0x93, 0x8A, ++0xE0, 0xB4, 0x04, 0x07, 0x90, 0x93, 0x87, 0xE0, 0x24, 0x04, 0xF0, 0x51, 0xDB, 0x12, 0x53, 0x89, ++0x80, 0xC7, 0xE4, 0x90, 0x93, 0x87, 0xF0, 0x90, 0x90, 0xE1, 0xE0, 0x90, 0x04, 0xFD, 0x51, 0xA7, ++0x90, 0x90, 0xE1, 0x51, 0x9C, 0xFE, 0xC3, 0x9F, 0x50, 0x6B, 0xD1, 0xFC, 0xF5, 0x83, 0xE0, 0xFF, ++0x90, 0x93, 0x66, 0xE0, 0xFE, 0x6F, 0x70, 0x58, 0x90, 0x04, 0xFC, 0xE0, 0x04, 0xF0, 0x90, 0x93, ++0x65, 0xE0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x91, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x93, 0x87, ++0xE0, 0xFD, 0x4F, 0x60, 0x04, 0xED, 0x5F, 0x60, 0x37, 0xEE, 0xFF, 0x7E, 0x00, 0xC0, 0x06, 0xC0, ++0x07, 0x90, 0x93, 0x65, 0xE0, 0x75, 0xF0, 0x20, 0xA4, 0x24, 0x29, 0xF9, 0x74, 0x91, 0x35, 0xF0, ++0xFA, 0x7B, 0x01, 0x78, 0x67, 0x7C, 0x93, 0x7D, 0x01, 0xD0, 0x07, 0xD0, 0x06, 0x12, 0x45, 0xD5, ++0xEF, 0x70, 0x0D, 0x90, 0x01, 0xC7, 0x74, 0x55, 0xF0, 0x7F, 0x01, 0x12, 0x71, 0x54, 0x11, 0x2B, ++0x12, 0x53, 0x89, 0x80, 0x8B, 0x22, 0x90, 0x93, 0x8C, 0xD1, 0x6B, 0xA3, 0xEA, 0xF0, 0xA3, 0xEB, ++0xF0, 0xC3, 0x90, 0x93, 0x92, 0xE0, 0x94, 0x01, 0x90, 0x93, 0x91, 0xE0, 0x94, 0x00, 0x50, 0x02, ++0x80, 0x74, 0xE4, 0x90, 0x93, 0x95, 0xF0, 0xA3, 0xF0, 0x51, 0xD2, 0xE4, 0xFD, 0x12, 0x63, 0x60, ++0x90, 0x93, 0x8F, 0xE0, 0x70, 0x03, 0xA3, 0xE0, 0x6F, 0x70, 0x18, 0x90, 0x93, 0x8D, 0xE0, 0x24, ++0x02, 0xD1, 0xDE, 0xFE, 0x90, 0x93, 0x8E, 0xE0, 0xFD, 0x12, 0xA3, 0xEA, 0xBF, 0x01, 0x02, 0x41, ++0xD2, 0x80, 0x00, 0x90, 0x93, 0x8D, 0xE0, 0x24, 0x01, 0xFF, 0x90, 0x93, 0x8C, 0x12, 0x65, 0xD5, ++0x7E, 0x00, 0x90, 0x93, 0x93, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x24, 0x02, 0xFF, 0xEE, 0x33, 0xFE, ++0x90, 0x93, 0x8C, 0x8F, 0xF0, 0x12, 0x08, 0xD6, 0x90, 0x93, 0x95, 0xEE, 0x8F, 0xF0, 0x12, 0x08, ++0xD6, 0x90, 0x93, 0x91, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xC3, 0x90, 0x93, 0x96, 0xE0, 0x9F, 0x90, ++0x93, 0x95, 0xE0, 0x9E, 0x40, 0x93, 0xE4, 0xFE, 0xFF, 0x22, 0x7A, 0x00, 0xE4, 0xFD, 0x31, 0xF6, ++0x90, 0x93, 0x88, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x90, 0x93, 0x8B, 0xE0, 0xFF, 0x90, 0x93, ++0x65, 0xE0, 0x22, 0x90, 0x93, 0x8B, 0xEF, 0xF0, 0xE4, 0x90, 0x93, 0x65, 0xF0, 0x22, 0x90, 0x93, ++0x62, 0xE0, 0x24, 0x24, 0xFF, 0x90, 0x93, 0x61, 0xE0, 0x34, 0x00, 0xFE, 0x22, 0x90, 0x93, 0x64, ++0xE0, 0x24, 0xDC, 0xFE, 0x90, 0x93, 0x63, 0xE0, 0x34, 0xFF, 0x90, 0x93, 0x91, 0xF0, 0xA3, 0xCE, ++0xF0, 0x22, 0x90, 0x93, 0x8C, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x93, 0x88, 0xE4, 0x75, ++0xF0, 0x04, 0x02, 0x08, 0xD6, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x6D, 0xD1, ++0x6B, 0x90, 0x93, 0x85, 0x74, 0x18, 0xF0, 0x7E, 0x00, 0x7F, 0x80, 0x7D, 0x00, 0x7B, 0x01, 0x7A, ++0x93, 0x79, 0x8D, 0x12, 0x08, 0xAA, 0x90, 0x01, 0xC4, 0x74, 0xE5, 0xF0, 0x74, 0x82, 0xA3, 0xF0, ++0x90, 0x93, 0x32, 0xE0, 0xFF, 0x12, 0x7C, 0x09, 0x90, 0x93, 0x84, 0xEF, 0xF0, 0xF9, 0xE0, 0xFE, ++0x24, 0x29, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x74, 0x41, 0xF0, 0xEE, 0x24, 0x28, 0xFD, ++0xE4, 0x33, 0xFC, 0x90, 0x93, 0x85, 0xE0, 0x7A, 0x00, 0x2D, 0xFE, 0xEA, 0x3C, 0x90, 0x93, 0x89, ++0xF0, 0xA3, 0xCE, 0xF0, 0x74, 0x28, 0x29, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0x90, 0x93, ++0x6F, 0xE0, 0xFD, 0x12, 0x93, 0xD5, 0xB1, 0xE6, 0x90, 0x93, 0x89, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, ++0x93, 0x87, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x93, 0x8D, 0x74, 0x01, 0xF0, 0xA3, 0x74, 0x03, ++0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0x74, 0x5F, 0xF0, 0x90, 0x93, 0x89, 0x51, 0xDE, 0x90, 0x8F, 0xC3, ++0xE0, 0xFF, 0x7E, 0x02, 0xB4, 0xFE, 0x02, 0x7E, 0xFE, 0x90, 0x93, 0x89, 0xA3, 0xE0, 0xFD, 0x12, ++0x53, 0x7B, 0xEE, 0xF0, 0x74, 0x00, 0x2D, 0x12, 0x53, 0x7D, 0xE0, 0x90, 0x93, 0x91, 0xF0, 0x90, ++0x93, 0x89, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0x90, 0x90, 0x58, 0xE0, 0x90, 0x93, 0x6D, ++0xB4, 0x01, 0x0B, 0xE0, 0x44, 0x03, 0xFC, 0xA3, 0xE0, 0x44, 0x10, 0xFD, 0x80, 0x09, 0xE0, 0x44, ++0x03, 0xFC, 0xA3, 0xE0, 0x44, 0x20, 0xFD, 0x90, 0x93, 0x8B, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x90, ++0x93, 0x92, 0x74, 0x03, 0xF0, 0xA3, 0x74, 0x12, 0xF0, 0xD1, 0x13, 0xEF, 0x64, 0xFE, 0x70, 0x24, ++0x90, 0x93, 0x89, 0xA3, 0xE0, 0x24, 0x00, 0xF1, 0x68, 0xC0, 0x03, 0x8B, 0x40, 0xD1, 0x37, 0xD0, ++0x03, 0x12, 0x35, 0x26, 0x75, 0x40, 0x01, 0xD1, 0x37, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x94, 0x12, ++0x35, 0x26, 0x80, 0x56, 0x90, 0x93, 0x2D, 0xE0, 0xFF, 0xB4, 0x02, 0x26, 0x90, 0x93, 0x89, 0xE0, ++0xFC, 0xA3, 0xE0, 0xFD, 0x24, 0x00, 0xF5, 0x82, 0x74, 0xFC, 0x3C, 0xF5, 0x83, 0xE4, 0xF0, 0x74, ++0x01, 0x2D, 0xF5, 0x82, 0x74, 0xFC, 0x3C, 0xF5, 0x83, 0x74, 0x20, 0xD1, 0x02, 0x74, 0x20, 0xF0, ++0x80, 0x28, 0xEF, 0xB4, 0x04, 0x24, 0x90, 0x93, 0x89, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x24, 0x00, ++0xF5, 0x82, 0x74, 0xFC, 0x3E, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x01, 0x2F, 0xF5, 0x82, 0x74, 0xFC, ++0x3E, 0xF5, 0x83, 0x74, 0x10, 0xD1, 0x02, 0x74, 0x10, 0xF0, 0xD1, 0x13, 0xE4, 0x90, 0x93, 0x86, ++0xF0, 0xD1, 0x41, 0xFE, 0x90, 0x93, 0x89, 0xA3, 0xE0, 0xFD, 0xEF, 0x2D, 0x12, 0x53, 0x7B, 0xEE, ++0xF0, 0xD1, 0x41, 0xFE, 0x74, 0x96, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xEE, 0xB1, ++0xDE, 0xE0, 0xB4, 0x08, 0xDC, 0xB1, 0xF0, 0x90, 0x93, 0x89, 0xD1, 0xE6, 0x90, 0x93, 0x89, 0xE4, ++0x75, 0xF0, 0x10, 0x12, 0x08, 0xD6, 0xB1, 0xE6, 0xE4, 0x90, 0x94, 0x10, 0xF0, 0xE4, 0x90, 0x93, ++0x86, 0xF0, 0xD1, 0x0A, 0x50, 0x0E, 0xD1, 0x51, 0xB1, 0xD7, 0xD1, 0x1D, 0x12, 0x53, 0x7A, 0xE4, ++0xB1, 0xDE, 0x80, 0xEE, 0xD1, 0xED, 0x90, 0x06, 0x31, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x93, 0x33, ++0xE0, 0xFD, 0xF1, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0xAC, 0x7B, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0xED, 0xFF, 0x90, 0x93, 0x32, 0xE0, 0xC3, 0x9F, 0xFF, 0xE4, 0x94, 0x00, ++0xFE, 0xEF, 0x78, 0x07, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x93, 0x85, 0xE0, ++0x7C, 0x00, 0x2F, 0xFF, 0xEC, 0x3E, 0xCF, 0x24, 0x38, 0xCF, 0x34, 0x00, 0xFE, 0x90, 0xAC, 0x7A, ++0x74, 0x10, 0xF0, 0x7B, 0x63, 0xE4, 0xFD, 0x12, 0x39, 0x9C, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x8D, ++0x90, 0xAC, 0xA0, 0x12, 0x44, 0x20, 0x7A, 0x93, 0x79, 0x70, 0x90, 0xAC, 0xA3, 0x12, 0x44, 0x20, ++0x90, 0xAC, 0xA6, 0x74, 0x10, 0xF0, 0x7A, 0x8F, 0x79, 0x7F, 0x12, 0x35, 0x86, 0x90, 0x94, 0x10, ++0xE0, 0x04, 0xF0, 0x90, 0x06, 0x31, 0xE0, 0x30, 0xE2, 0x06, 0xB1, 0xFA, 0x50, 0x02, 0x81, 0x9D, ++0xB1, 0xFA, 0x40, 0x0A, 0x90, 0x06, 0x35, 0xE0, 0x44, 0x20, 0x90, 0x06, 0x34, 0xF0, 0xE4, 0x90, ++0x93, 0x86, 0xF0, 0xD1, 0x0A, 0x50, 0x20, 0xD1, 0x51, 0xB1, 0xD7, 0xD1, 0x1D, 0x90, 0x93, 0x86, ++0xE0, 0x24, 0x70, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x93, 0x84, 0x12, ++0x53, 0x7A, 0xEF, 0xB1, 0xDE, 0x80, 0xDC, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x22, 0x90, 0x05, 0x22, ++0xE0, 0x90, 0x94, 0x0F, 0xF0, 0x7D, 0x1D, 0x12, 0x5D, 0x20, 0xBF, 0x01, 0x06, 0xB1, 0xC2, 0x90, ++0x04, 0x25, 0xF0, 0x90, 0x94, 0x0F, 0xE0, 0xFF, 0x7D, 0x1E, 0x12, 0x5A, 0x47, 0x80, 0x06, 0xB1, ++0xC2, 0x90, 0x04, 0x25, 0xF0, 0xF1, 0xDE, 0x90, 0x8E, 0x49, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, ++0x4F, 0xD8, 0x74, 0xE5, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x82, 0xA3, 0xF0, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x90, 0x93, 0x32, 0xE0, 0xFF, 0x90, 0x95, 0x36, 0x74, 0x08, 0xF0, 0x7B, 0x18, 0x7D, ++0x01, 0x12, 0x5D, 0xCD, 0x90, 0x93, 0x84, 0xEF, 0xF0, 0x90, 0x93, 0x32, 0xE0, 0x22, 0xF0, 0x90, ++0x93, 0x86, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x93, 0x89, 0xE4, 0x75, 0xF0, 0x08, 0x12, 0x08, 0xD6, ++0x90, 0x93, 0x89, 0xE4, 0x75, 0xF0, 0x08, 0x02, 0x08, 0xD6, 0x90, 0x94, 0x10, 0xE0, 0xC3, 0x94, ++0x0A, 0x22, 0xF0, 0xE4, 0x90, 0x93, 0x94, 0xF0, 0xA3, 0x22, 0x90, 0x93, 0x86, 0xE0, 0xFF, 0xC3, ++0x94, 0x10, 0x22, 0x90, 0x93, 0x89, 0xE4, 0x75, 0xF0, 0x02, 0x02, 0x08, 0xD6, 0xFD, 0xD1, 0x26, ++0x90, 0x93, 0x84, 0xEF, 0xF0, 0x22, 0xC3, 0xEE, 0x94, 0x01, 0x40, 0x0A, 0x0D, 0xED, 0x13, 0x90, ++0xFD, 0x10, 0xF0, 0xE4, 0x2F, 0xFF, 0x22, 0x75, 0x41, 0x8F, 0x75, 0x42, 0xC6, 0x75, 0x43, 0x02, ++0x22, 0x90, 0x93, 0x86, 0xE0, 0xFF, 0x24, 0xC8, 0xF5, 0x82, 0xE4, 0x34, 0x8F, 0xF5, 0x83, 0xE0, ++0x22, 0x90, 0x93, 0x8A, 0xE0, 0x2F, 0xFF, 0x90, 0x93, 0x89, 0xE0, 0x34, 0x00, 0xFE, 0x90, 0x94, ++0x0D, 0xF0, 0xA3, 0x22, 0xD1, 0x74, 0x01, 0x2B, 0x90, 0x93, 0x5F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, ++0xA3, 0xED, 0xF0, 0x22, 0x90, 0x8E, 0xAE, 0xD1, 0xF4, 0x30, 0xE0, 0x03, 0x12, 0x4E, 0xED, 0x22, ++0x90, 0x01, 0x53, 0xE4, 0xF0, 0xFF, 0xEF, 0x12, 0x9A, 0x64, 0xE4, 0xF0, 0x0F, 0xEF, 0xB4, 0x08, ++0xF5, 0x22, 0x90, 0x93, 0x6C, 0xED, 0xF0, 0x90, 0x93, 0x6A, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, ++0x8D, 0xEF, 0x90, 0x93, 0x6A, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x41, 0xE5, 0x90, ++0x93, 0x8C, 0xD1, 0x6B, 0x2F, 0xFF, 0xE4, 0x3E, 0xCF, 0x24, 0x06, 0xCF, 0x12, 0x65, 0xD6, 0xBF, ++0x86, 0x19, 0x90, 0x93, 0x8E, 0xE0, 0xFF, 0x90, 0x93, 0x8D, 0xE0, 0x2F, 0xD1, 0xDE, 0xCF, 0x24, ++0x07, 0xCF, 0x12, 0x65, 0xD6, 0xBF, 0xDD, 0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xFF, 0x90, ++0x93, 0x8C, 0xE0, 0x34, 0x00, 0x22, 0xE4, 0x75, 0xF0, 0x20, 0x02, 0x08, 0xD6, 0x7F, 0x64, 0x7E, ++0x00, 0x02, 0x3E, 0x50, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x22, 0x74, 0xF1, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x90, 0x22, 0x75, 0xF0, 0x80, 0xA4, 0xAE, 0xF0, 0x78, 0x03, 0x22, 0x90, 0x93, ++0x5F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0x95, 0x27, 0xF1, 0x11, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x95, 0x27, 0xF1, 0x5C, 0xE0, 0x60, 0x25, ++0xC3, 0x90, 0x95, 0x2A, 0xE0, 0x94, 0xE8, 0x90, 0x95, 0x29, 0xE0, 0x94, 0x03, 0x40, 0x0B, 0x90, ++0x01, 0xC0, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x00, 0x80, 0x0D, 0x90, 0x95, 0x29, 0x12, 0x9B, 0xD1, ++0x12, 0x3E, 0x50, 0x80, 0xD3, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, ++0xF5, 0x82, 0x8E, 0x83, 0x22, 0x74, 0x00, 0x2F, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0x22, ++0x90, 0x93, 0x66, 0xEF, 0xF0, 0xE4, 0xFF, 0x74, 0x59, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, ++0x83, 0xE0, 0xFE, 0x74, 0x84, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xEE, 0xF0, 0x0F, ++0xEF, 0xB4, 0x08, 0xE3, 0x90, 0x90, 0x89, 0xE0, 0x90, 0x04, 0x8C, 0xF0, 0x75, 0x40, 0x01, 0x75, ++0x41, 0x8F, 0x75, 0x42, 0xC8, 0x75, 0x43, 0x08, 0x7B, 0x01, 0x7A, 0x90, 0x79, 0x61, 0x12, 0x35, ++0x26, 0x90, 0x93, 0x3E, 0xE0, 0x60, 0x19, 0x90, 0x93, 0x66, 0xF1, 0xD1, 0xF1, 0x65, 0xC0, 0x03, ++0x8B, 0x40, 0x75, 0x41, 0x90, 0x75, 0x42, 0x59, 0x75, 0x43, 0x32, 0xD0, 0x03, 0x12, 0x35, 0x26, ++0x22, 0xE0, 0xFF, 0x12, 0x7C, 0x09, 0x7E, 0x00, 0x22, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x04, ++0x1F, 0x74, 0x20, 0xF0, 0x22, 0x12, 0x06, 0x89, 0xFF, 0x90, 0x8E, 0x2B, 0xF0, 0xBF, 0x01, 0x08, ++0x12, 0x78, 0x3C, 0xE4, 0x90, 0x8E, 0x2B, 0xF0, 0x22, 0x12, 0x06, 0x89, 0x54, 0x01, 0xFF, 0x90, ++0x93, 0x52, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22, 0x12, 0x06, 0x89, 0x90, 0x8E, 0xA9, 0xF0, 0x22, ++0x12, 0x77, 0xD1, 0x90, 0x8E, 0xAA, 0x11, 0x39, 0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, ++0x12, 0x75, 0x05, 0x90, 0x8E, 0xAB, 0x12, 0x75, 0xD8, 0x90, 0x8E, 0xAC, 0xF0, 0x11, 0x40, 0x90, ++0x8E, 0xAA, 0xE0, 0x54, 0x01, 0xFF, 0x02, 0x6C, 0x37, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0x22, ++0x90, 0x8E, 0xAB, 0xE0, 0x14, 0x90, 0x8E, 0xAD, 0xF0, 0x22, 0x12, 0x77, 0xD1, 0x90, 0x93, 0x40, ++0x11, 0x39, 0xEF, 0x54, 0x04, 0xFF, 0xEE, 0x54, 0xFB, 0x4F, 0xF0, 0x12, 0x06, 0x89, 0xC3, 0x13, ++0x30, 0xE0, 0x07, 0x12, 0x75, 0x06, 0x90, 0x93, 0x41, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x8D, 0x90, 0xE0, 0xFF, 0x90, 0x8D, 0x8F, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, ++0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x40, 0x90, 0x8D, 0x8F, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, ++0x8D, 0x3F, 0x12, 0x44, 0x0B, 0xE0, 0xFD, 0xEE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x40, 0xF9, 0x74, ++0x8D, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xAF, 0x05, 0x12, 0x73, 0x7A, 0x90, 0x8D, 0x8F, 0x11, 0xCC, ++0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x8D, 0x8F, 0xF0, 0x12, 0x69, 0x6E, ++0x90, 0x8D, 0x01, 0xE0, 0x44, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0x04, 0xF0, 0xE0, ++0x7F, 0x00, 0x22, 0xE4, 0x90, 0x8E, 0x27, 0xF0, 0xA3, 0xF0, 0x90, 0x8D, 0x8F, 0xF0, 0xA3, 0xF0, ++0x22, 0xD1, 0xFE, 0x11, 0xD3, 0x31, 0x89, 0x31, 0x0D, 0x12, 0x7F, 0x52, 0x31, 0x12, 0x31, 0x29, ++0x90, 0x93, 0x4D, 0xE0, 0x54, 0x7F, 0xF0, 0x54, 0xBF, 0xF0, 0x54, 0xDF, 0xF0, 0x54, 0xF0, 0xF0, ++0xE4, 0x90, 0x93, 0x4F, 0xF0, 0x90, 0x93, 0x4D, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x51, 0x4F, 0x02, ++0x08, 0xAA, 0x90, 0x93, 0x40, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0x7F, 0xF0, 0x54, 0xFB, 0xF0, 0xA3, ++0x74, 0x0A, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0xF1, 0xAA, 0x7A, 0x93, 0x79, 0x44, 0x12, ++0x08, 0xAA, 0x90, 0x93, 0x45, 0x74, 0x08, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x22, 0x90, 0x95, 0x46, ++0xEF, 0x31, 0x22, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, 0x95, ++0x46, 0xE0, 0x6F, 0x60, 0x33, 0xC3, 0x90, 0x95, 0x48, 0xE0, 0x94, 0x88, 0x90, 0x95, 0x47, 0xE0, ++0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x95, 0x47, 0x12, ++0x98, 0x23, 0xD3, 0x90, 0x95, 0x48, 0xE0, 0x94, 0x32, 0x90, 0x95, 0x47, 0xE0, 0x94, 0x00, 0x40, ++0xC2, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0, 0xBB, 0x22, 0x7E, 0x00, 0x7F, 0x62, 0x7D, 0x00, 0x7B, ++0x01, 0x7A, 0x8E, 0x79, 0x41, 0x12, 0x08, 0xAA, 0x51, 0x4F, 0x12, 0x08, 0xAA, 0x90, 0x8E, 0x45, ++0x74, 0x02, 0xF0, 0x90, 0x8E, 0x4C, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x90, 0x8E, ++0x52, 0xE4, 0xF0, 0xA3, 0x74, 0x02, 0x51, 0x3F, 0x12, 0xA2, 0x2C, 0xE4, 0xFD, 0xFF, 0x12, 0x4F, ++0x1B, 0x7D, 0x0C, 0x7F, 0x02, 0x12, 0x4F, 0x1B, 0xF1, 0x26, 0x90, 0x8D, 0x07, 0xE0, 0xFF, 0xB4, ++0x01, 0x08, 0x90, 0x8E, 0x51, 0x74, 0xDD, 0xF0, 0x80, 0x0F, 0xEF, 0x90, 0x8E, 0x51, 0xB4, 0x03, ++0x05, 0x74, 0xD4, 0xF0, 0x80, 0x03, 0x74, 0x40, 0xF0, 0x7F, 0x79, 0x12, 0x4A, 0x5B, 0xEF, 0x54, ++0x03, 0xFF, 0xBF, 0x02, 0x0F, 0x7F, 0x28, 0x12, 0x4A, 0x5B, 0xEF, 0x30, 0xE2, 0x06, 0x90, 0x8E, ++0x63, 0x74, 0x02, 0xF0, 0x90, 0x8E, 0xA3, 0x74, 0x03, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE0, ++0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07, 0x51, 0x3F, 0x7F, 0x01, 0x51, 0x5C, 0x90, 0x05, ++0x58, 0x74, 0x02, 0xF0, 0x7E, 0x00, 0xFF, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x8E, 0x79, 0xA7, 0x12, ++0x08, 0xAA, 0xF1, 0x8A, 0xF1, 0x92, 0x12, 0x4F, 0xCA, 0xE4, 0x90, 0x8E, 0xA9, 0xF0, 0x22, 0xF0, ++0x90, 0x8E, 0x63, 0xE0, 0x24, 0x04, 0x90, 0x8E, 0x5E, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x22, 0x7E, ++0x00, 0x7F, 0x04, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x8E, 0x79, 0xAA, 0x22, 0xE4, 0xFE, 0x71, 0xE1, ++0xE4, 0xF0, 0x0E, 0xEE, 0xB4, 0x2D, 0xF7, 0xE4, 0x90, 0x8E, 0x5D, 0xF0, 0x90, 0x8E, 0x5C, 0xF0, ++0x90, 0x8E, 0x60, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, 0x74, 0x2D, 0xF0, 0xE4, 0xA3, 0xF0, 0x22, ++0x12, 0x51, 0x0D, 0x12, 0x43, 0xD5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, ++0x62, 0x12, 0x51, 0x26, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, ++0x00, 0x12, 0x43, 0xD5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x51, 0x26, ++0x78, 0x18, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x43, 0xD5, ++0x90, 0x8E, 0x95, 0x12, 0x08, 0x6D, 0x90, 0x8E, 0x99, 0x12, 0x43, 0xF3, 0x90, 0x8E, 0x95, 0x12, ++0x43, 0xFF, 0xC3, 0x12, 0x43, 0xE2, 0x40, 0x41, 0x90, 0x8E, 0x41, 0xE0, 0x90, 0x8E, 0x99, 0x30, ++0xE0, 0x10, 0x71, 0xFD, 0xFF, 0x90, 0x8E, 0x63, 0xE0, 0x24, 0x04, 0x2F, 0xFF, 0x90, 0x8E, 0x9D, ++0x80, 0x06, 0x71, 0xFD, 0xFF, 0x90, 0x8E, 0x9E, 0xE0, 0xFE, 0xC3, 0xEF, 0x9E, 0x90, 0x94, 0x13, ++0xF0, 0x90, 0x94, 0x13, 0xE0, 0xFF, 0xC3, 0x94, 0x2D, 0x50, 0x0E, 0x74, 0x64, 0x2F, 0x71, 0xE4, ++0xE0, 0x04, 0xF0, 0x90, 0x8E, 0x5C, 0xE0, 0x04, 0xF0, 0x90, 0x8E, 0x5C, 0xE0, 0xFF, 0xD3, 0x90, ++0x8E, 0xA0, 0xE0, 0x9F, 0x90, 0x8E, 0x9F, 0xE0, 0x94, 0x00, 0x40, 0x02, 0x61, 0xE0, 0xE4, 0xFF, ++0xFE, 0x71, 0xE1, 0x71, 0xF4, 0xEF, 0xD3, 0x9D, 0x40, 0x07, 0x90, 0x94, 0x14, 0xEE, 0xF0, 0x80, ++0x05, 0x0E, 0xEE, 0xB4, 0x2D, 0xEB, 0xE4, 0xFF, 0xFE, 0x71, 0xE1, 0x71, 0xF4, 0xC3, 0x90, 0x8E, ++0xA0, 0xE0, 0x9D, 0xFD, 0x90, 0x8E, 0x9F, 0xE0, 0x94, 0x00, 0xFC, 0xEF, 0xD3, 0x9D, 0xE4, 0x9C, ++0x40, 0x07, 0x90, 0x94, 0x15, 0xEE, 0xF0, 0x80, 0x05, 0x0E, 0xEE, 0xB4, 0x2D, 0xDB, 0x90, 0x94, ++0x14, 0xE0, 0x90, 0x8E, 0x61, 0xF0, 0x90, 0x94, 0x15, 0xE0, 0x90, 0x8E, 0x62, 0x71, 0xEC, 0x94, ++0x0A, 0x40, 0x0A, 0xEF, 0x24, 0xF6, 0x90, 0x8E, 0x59, 0xF0, 0xE4, 0x80, 0x09, 0xE4, 0x90, 0x8E, ++0x59, 0x71, 0xEC, 0x74, 0x0A, 0x9F, 0x90, 0x8E, 0x58, 0xF0, 0x90, 0x8E, 0x61, 0xE0, 0xFF, 0xA3, ++0xE0, 0xC3, 0x9F, 0x90, 0x8E, 0x5F, 0xF0, 0x90, 0x8E, 0x41, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x8E, ++0x9D, 0x80, 0x03, 0x90, 0x8E, 0x9E, 0xE0, 0x04, 0xFF, 0x90, 0x8E, 0x5F, 0xE0, 0x2F, 0xF0, 0x90, ++0x8E, 0x5F, 0xE0, 0xC3, 0x94, 0x0A, 0x50, 0x03, 0x74, 0x0A, 0xF0, 0x90, 0x8E, 0x5F, 0xE0, 0x24, ++0x02, 0xF0, 0xB1, 0x21, 0x90, 0x95, 0x3E, 0x74, 0x03, 0xF0, 0x91, 0x19, 0xE4, 0xFF, 0x51, 0x5C, ++0x22, 0x74, 0x64, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0x22, 0xF0, 0x90, 0x8E, 0x61, ++0xE0, 0xFF, 0xC3, 0x22, 0xE0, 0x2F, 0xFF, 0x90, 0x8E, 0xA1, 0xE0, 0xFD, 0x22, 0x12, 0x43, 0xFF, ++0x90, 0x8E, 0x95, 0x12, 0x43, 0xF3, 0x12, 0x42, 0x9D, 0x78, 0x0A, 0x12, 0x08, 0x47, 0x90, 0x8E, ++0x5E, 0xE0, 0xFE, 0xC3, 0x74, 0x0A, 0x9E, 0x2F, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0xAC, 0x07, 0x90, 0x8E, 0x42, 0x12, 0x72, 0x25, 0x30, 0xE0, 0x02, 0x81, 0xD2, 0x90, 0x8E, 0x41, ++0xE0, 0x30, 0xE0, 0x16, 0x90, 0x8E, 0x63, 0xE0, 0x24, 0x04, 0x90, 0x8E, 0x5B, 0xF0, 0x90, 0x8E, ++0x63, 0xE0, 0x24, 0x03, 0x90, 0x8E, 0x5A, 0xF0, 0x80, 0x0D, 0x90, 0x8E, 0x5B, 0x74, 0x02, 0xF0, ++0x90, 0x8E, 0x5A, 0x14, 0xF0, 0x0B, 0x0B, 0x90, 0x8E, 0x5A, 0xE0, 0xFA, 0x90, 0x8E, 0x59, 0xE0, ++0xD3, 0x9A, 0x50, 0x0E, 0x90, 0x8E, 0x4E, 0xEB, 0xF0, 0x90, 0x8E, 0x5B, 0xE0, 0xC3, 0x9D, 0x2C, ++0x80, 0x11, 0xC3, 0xED, 0x9A, 0x2B, 0x90, 0x8E, 0x4E, 0xF0, 0x90, 0x8E, 0x5A, 0xE0, 0xFF, 0xA3, ++0xE0, 0xC3, 0x9F, 0x90, 0x8E, 0x5E, 0xF0, 0x90, 0x8E, 0x5B, 0xE0, 0xFF, 0x24, 0x0A, 0xFD, 0xE4, ++0x33, 0xFC, 0x90, 0x8E, 0x5E, 0x91, 0xDE, 0x40, 0x04, 0xEF, 0x24, 0x0A, 0xF0, 0x90, 0x8E, 0x5E, ++0xE0, 0xFF, 0x24, 0x23, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x8E, 0x4E, 0x91, 0xDE, 0x40, 0x04, 0xEF, ++0x24, 0x23, 0xF0, 0x90, 0x8E, 0x5E, 0xE0, 0xFF, 0x7E, 0x00, 0x90, 0x8E, 0x52, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0x90, 0x05, 0x58, 0xE0, 0x6F, 0x70, 0x01, 0xE4, 0x60, 0x02, 0xF1, 0xBD, 0xF1, 0xA2, ++0x80, 0x07, 0x90, 0x8E, 0x43, 0xE0, 0x44, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xD3, ++0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x22, 0x12, 0x99, 0xE4, 0x90, 0x94, 0x16, 0xEF, ++0xF0, 0x30, 0xE0, 0x05, 0x7D, 0x01, 0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, 0x12, 0x4F, 0x1B, 0x90, ++0x94, 0x16, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80, ++0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0xB1, 0x21, 0x90, 0x95, 0x3E, 0x74, 0x02, 0xF0, 0x81, ++0x19, 0x90, 0x8E, 0x58, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x8E, 0x5F, 0xE0, 0xFB, 0x22, 0xB1, ++0xE3, 0x40, 0x32, 0x90, 0x8E, 0x60, 0xE0, 0x04, 0xF0, 0x90, 0x8E, 0xA2, 0xE0, 0xFF, 0x90, 0x8E, ++0x60, 0xE0, 0xD3, 0x9F, 0x50, 0x1F, 0x90, 0x8E, 0x58, 0xE0, 0x04, 0xB1, 0xD7, 0x12, 0x57, 0xC9, ++0x90, 0x8E, 0x5F, 0xF0, 0xFB, 0x90, 0x8E, 0x58, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x95, 0x3E, ++0x74, 0x04, 0xF0, 0x91, 0x19, 0x22, 0x12, 0x6F, 0x7B, 0x30, 0xE0, 0x10, 0xEF, 0xC4, 0x13, 0x13, ++0x54, 0x03, 0x30, 0xE0, 0x07, 0x7D, 0x02, 0x7F, 0x02, 0x12, 0x6D, 0xB1, 0x90, 0x8E, 0x41, 0xF1, ++0xB6, 0x30, 0xE0, 0x09, 0xEF, 0xF1, 0xC7, 0x54, 0x07, 0x70, 0x43, 0x80, 0x3E, 0x90, 0x8E, 0x4F, ++0xE0, 0x04, 0xF0, 0x90, 0x8E, 0x4A, 0xE0, 0x54, 0xEF, 0xF0, 0xB1, 0xE3, 0x40, 0x2D, 0x12, 0x6F, ++0xEF, 0x70, 0x2B, 0xF1, 0x04, 0x70, 0x04, 0xB1, 0x2F, 0x80, 0x24, 0xB1, 0x2F, 0x90, 0x8E, 0x50, ++0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0x02, 0x40, 0x09, 0xB1, 0xCF, 0xE4, 0x90, 0x8E, 0x50, 0xF0, ++0x80, 0x03, 0x12, 0x5F, 0xB4, 0xE4, 0x90, 0x8E, 0x4F, 0xF0, 0x22, 0x12, 0x58, 0x56, 0x22, 0x90, ++0x8E, 0x42, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0xF0, 0x90, 0x8E, 0x4F, 0xE0, 0x75, 0xF0, 0x03, 0xA4, ++0x24, 0xFE, 0x22, 0x90, 0x8E, 0xA3, 0xE0, 0xFF, 0x90, 0x8E, 0x4F, 0xE0, 0xD3, 0x9F, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x2E, 0xE0, 0xFD, 0xB4, 0x02, 0x07, 0xD1, 0xED, ++0x74, 0x08, 0xF0, 0x80, 0x09, 0xED, 0xB4, 0x04, 0x05, 0xD1, 0xED, 0x74, 0x10, 0xF0, 0xEF, 0x64, ++0x02, 0x4E, 0x60, 0x02, 0xC1, 0xE8, 0x90, 0x8F, 0xC0, 0xE0, 0xFF, 0x64, 0xFE, 0x70, 0x02, 0xC1, ++0xE8, 0xEF, 0x64, 0x02, 0x60, 0x07, 0xEF, 0x64, 0x03, 0x60, 0x02, 0xC1, 0xE8, 0x90, 0x90, 0x20, ++0xF1, 0x9A, 0x90, 0x93, 0xC0, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xD1, 0xF5, 0x7A, 0x93, 0x79, 0x7E, ++0x12, 0x08, 0xAA, 0xD1, 0xF5, 0x7A, 0x93, 0x79, 0x9E, 0x12, 0x08, 0xAA, 0x90, 0xAC, 0x7A, 0x74, ++0x10, 0x31, 0x22, 0x7B, 0x20, 0xFD, 0xFC, 0xFF, 0xFE, 0x12, 0x39, 0x9C, 0x7B, 0x01, 0x7A, 0x90, ++0x79, 0x22, 0x90, 0xAC, 0x89, 0x12, 0x44, 0x20, 0x7A, 0x93, 0x79, 0x9E, 0x90, 0xAC, 0x8C, 0x12, ++0x44, 0x20, 0x90, 0xAC, 0x8F, 0x74, 0x20, 0xF0, 0x7A, 0x8F, 0x79, 0x8F, 0x12, 0x34, 0x5B, 0x75, ++0x40, 0x01, 0x75, 0x41, 0x93, 0x75, 0x42, 0xA6, 0x75, 0x43, 0x18, 0x7B, 0x01, 0x7A, 0x93, 0x79, ++0x7E, 0x12, 0x35, 0x26, 0x75, 0x40, 0x01, 0x75, 0x41, 0x93, 0x75, 0x42, 0x86, 0x75, 0x43, 0x10, ++0x7B, 0x01, 0x7A, 0x93, 0x79, 0x6D, 0x12, 0x35, 0x26, 0x90, 0x93, 0x84, 0xE0, 0x54, 0x03, 0x90, ++0x93, 0x7D, 0xF0, 0xC3, 0x94, 0x04, 0x50, 0x1C, 0xE0, 0x90, 0x90, 0x89, 0xF0, 0x75, 0x40, 0x01, ++0x75, 0x41, 0x93, 0x75, 0x42, 0x6D, 0x75, 0x43, 0x10, 0x7B, 0x01, 0x7A, 0x90, 0x79, 0x69, 0x12, ++0x35, 0x26, 0x80, 0x06, 0x90, 0x90, 0x89, 0x74, 0x05, 0xF0, 0x90, 0x93, 0x7D, 0xE0, 0xFF, 0x7B, ++0x01, 0x7A, 0x93, 0x79, 0x6D, 0x12, 0x76, 0x12, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x93, 0xBE, ++0x74, 0x80, 0xF0, 0xA3, 0x22, 0x7E, 0x00, 0x7F, 0x20, 0x7D, 0x00, 0x7B, 0x01, 0x22, 0xE4, 0xFD, ++0xFF, 0x02, 0x72, 0x6D, 0x90, 0x8E, 0x44, 0xE0, 0x54, 0x0F, 0x22, 0xE4, 0xFF, 0x12, 0x6E, 0x57, ++0xBF, 0x01, 0x12, 0x90, 0x8E, 0x46, 0xE0, 0x60, 0x0C, 0xF1, 0x04, 0x64, 0x02, 0x60, 0x03, 0x02, ++0x99, 0xBB, 0x12, 0x5F, 0xB4, 0x22, 0x7D, 0x0C, 0x7F, 0x01, 0x02, 0x4F, 0x1B, 0x90, 0x95, 0x1E, ++0xE0, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x64, 0xEF, 0xF0, 0x90, 0x8D, ++0x3A, 0xE0, 0xFF, 0x90, 0x04, 0x1C, 0xE0, 0x6F, 0x70, 0x3B, 0x90, 0x8E, 0x49, 0xE0, 0x64, 0x0E, ++0x70, 0x13, 0x90, 0x95, 0x64, 0xE0, 0x70, 0x2D, 0x90, 0x8E, 0x41, 0xE0, 0x54, 0x7F, 0xF0, 0xF1, ++0x8A, 0xF1, 0x26, 0x80, 0x1D, 0x90, 0x8E, 0x49, 0xE0, 0x64, 0x06, 0x70, 0x18, 0x90, 0x95, 0x64, ++0xE0, 0x60, 0x12, 0x90, 0x8E, 0x41, 0xE0, 0x54, 0xBF, 0xF0, 0xF1, 0xD2, 0x90, 0x8E, 0x49, 0x74, ++0x04, 0xF0, 0x12, 0x4F, 0xCA, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, ++0xF0, 0x22, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xFD, 0xED, ++0xFF, 0x22, 0x90, 0x8E, 0x43, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x08, 0x7D, 0x00, ++0x7B, 0x01, 0x22, 0x90, 0x8E, 0x42, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x90, 0x8E, 0x52, ++0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x54, 0xFB, 0xF0, 0x90, 0x8E, 0x4A, 0xE0, 0x54, 0xFD, ++0xF0, 0x22, 0x90, 0x06, 0x04, 0xE0, 0x44, 0x40, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x22, 0xE4, 0xFC, ++0xED, 0x2C, 0x24, 0x00, 0x12, 0x90, 0x35, 0xE4, 0xF0, 0x0C, 0xEC, 0xB4, 0x18, 0xF2, 0x12, 0x90, ++0x32, 0xEF, 0xF0, 0xEE, 0x54, 0x3F, 0xFF, 0x74, 0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, ++0x83, 0xEF, 0xF0, 0x74, 0x02, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x54, 0xF0, ++0xF0, 0x11, 0xEF, 0xE0, 0x44, 0x80, 0xF0, 0x74, 0x0B, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, ++0x83, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x74, 0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, ++0xE0, 0xFE, 0x74, 0x00, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0x22, 0x31, 0x69, 0x12, ++0x7C, 0xE9, 0x90, 0x93, 0x63, 0x31, 0x60, 0xF9, 0x90, 0x8E, 0xAE, 0xE0, 0x30, 0xE0, 0x66, 0xEC, ++0xC3, 0x99, 0x50, 0x61, 0x90, 0x93, 0x63, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0x31, 0x46, 0xAD, 0x07, ++0x11, 0x26, 0x31, 0x4E, 0x54, 0x3F, 0x90, 0x93, 0x65, 0x11, 0xD8, 0xE0, 0x54, 0x03, 0xFB, 0xEF, ++0x24, 0x18, 0xFF, 0xE4, 0x33, 0xCF, 0x2B, 0xCF, 0x3A, 0x90, 0x93, 0x65, 0x8F, 0xF0, 0x12, 0x08, ++0xD6, 0x90, 0x93, 0x65, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x11, 0xB6, 0x31, 0x57, 0x90, 0x93, 0x63, ++0x31, 0x72, 0xD3, 0x90, 0x93, 0x64, 0xE0, 0x9F, 0x90, 0x93, 0x63, 0xE0, 0x9E, 0x40, 0x0E, 0x31, ++0x81, 0x90, 0x93, 0x64, 0xE0, 0x9F, 0xF0, 0x90, 0x93, 0x63, 0xE0, 0x9E, 0xF0, 0x90, 0x93, 0x63, ++0x31, 0x91, 0x0C, 0x80, 0x9A, 0x22, 0x7D, 0x07, 0xEF, 0x5D, 0xC3, 0x60, 0x0A, 0x11, 0xCB, 0x24, ++0x08, 0xFF, 0xE4, 0x3E, 0xFE, 0x80, 0x03, 0x11, 0xCB, 0xFF, 0x22, 0x74, 0xFF, 0x9D, 0xFD, 0x74, ++0xFF, 0x94, 0x00, 0x5E, 0xFE, 0xED, 0x5F, 0x22, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x02, 0x2D, 0xF5, ++0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x54, 0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0xFF, 0x74, ++0x03, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0x22, 0x31, 0xA4, 0xAD, 0x07, 0x90, 0x01, ++0xC4, 0x74, 0xFA, 0xF0, 0x74, 0x90, 0xA3, 0xF0, 0xED, 0x64, 0x01, 0x60, 0x1E, 0x12, 0x67, 0xBD, ++0xED, 0xB4, 0x02, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x40, 0xF0, 0x80, 0x0A, 0xED, 0xB4, 0x04, 0x06, ++0x90, 0x01, 0xC7, 0x74, 0x41, 0xF0, 0x7F, 0x01, 0x02, 0x71, 0x54, 0x11, 0x3D, 0x90, 0x02, 0x87, ++0xE0, 0x70, 0xF8, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x02, 0xF0, 0x74, 0xFA, 0x04, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0x90, 0xA3, 0xF0, 0x22, 0xEA, 0x90, 0xFD, 0x11, 0xF0, 0xAF, 0x03, 0x22, 0xE0, 0x7A, ++0x00, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x22, 0x90, 0x93, 0x65, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x02, 0x87, 0xE0, 0x22, 0x90, 0x01, 0x1F, 0xE0, 0xFE, 0x90, 0x01, ++0x1E, 0x22, 0xEE, 0x8F, 0xF0, 0x12, 0x08, 0xD6, 0x90, 0x8E, 0x29, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x22, 0x90, 0x8E, 0x2A, 0xE0, 0x24, 0x01, 0xFF, 0x90, 0x8E, 0x29, 0xE0, 0x34, 0x00, 0xFE, 0xC3, ++0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x02, 0x84, 0xEF, 0xF0, 0xEE, 0xA3, 0xF0, 0xA3, 0xE0, ++0x44, 0x01, 0xF0, 0x22, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE2, 0x03, 0x7F, 0x04, 0x22, 0x90, 0x02, ++0x86, 0xE0, 0x7F, 0x01, 0x20, 0xE1, 0x02, 0x7F, 0x02, 0x22, 0x90, 0x95, 0x2B, 0xEF, 0xF0, 0xA3, ++0x12, 0x44, 0x20, 0x90, 0x95, 0x4D, 0xE0, 0xFE, 0x04, 0xF0, 0x51, 0xEB, 0x74, 0x00, 0x2F, 0xF9, ++0xE4, 0x34, 0xFB, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x95, 0x2C, 0x12, ++0x5D, 0x02, 0x75, 0x43, 0x02, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x35, 0x26, 0x90, 0x95, ++0x2B, 0xE0, 0x24, 0x02, 0xF9, 0xE4, 0x34, 0xFB, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, ++0x01, 0xA3, 0x12, 0x44, 0x17, 0xE9, 0x24, 0x02, 0xF9, 0xE4, 0x3A, 0x8B, 0x40, 0xF5, 0x41, 0x89, ++0x42, 0x90, 0x95, 0x2C, 0x51, 0x7D, 0xF5, 0x43, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x02, 0x35, ++0x26, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x2F, 0x12, 0x44, 0x20, 0x7F, 0x96, ++0x7E, 0x02, 0x12, 0x87, 0x18, 0xEF, 0x60, 0x40, 0x12, 0x7C, 0xE1, 0xFE, 0xD1, 0x7C, 0x90, 0x95, ++0x32, 0xEF, 0xF0, 0xEE, 0xFF, 0x90, 0xFD, 0x11, 0xF0, 0x90, 0x95, 0x32, 0xE0, 0xFD, 0x90, 0x02, ++0x94, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x95, 0x2F, 0x51, 0x7D, 0x24, 0x02, 0xFF, 0xE4, 0x33, 0xFE, ++0x12, 0x8F, 0xDE, 0x90, 0x95, 0x32, 0xE0, 0x24, 0x18, 0xFF, 0x90, 0x95, 0x2F, 0x12, 0x44, 0x17, ++0x31, 0xBA, 0x90, 0x02, 0x96, 0x74, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x44, 0x17, ++0x90, 0x00, 0x0E, 0x02, 0x06, 0xA2, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFF, 0x90, ++0x8E, 0x28, 0xE0, 0xFE, 0x90, 0x8E, 0x27, 0xE0, 0xFD, 0xB5, 0x06, 0x04, 0x7E, 0x01, 0x80, 0x02, ++0x7E, 0x00, 0xEE, 0x64, 0x01, 0x60, 0x3F, 0xED, 0xD1, 0x97, 0xFA, 0x7B, 0x01, 0x51, 0x21, 0x7F, ++0x01, 0xEF, 0x60, 0x32, 0x90, 0x8E, 0x27, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x0A, 0x02, 0x80, 0x02, ++0x7F, 0x00, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0x8E, 0x27, 0xF0, 0x90, 0x8E, 0x28, 0xE0, 0xFF, 0x90, ++0x8E, 0x27, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x07, 0x90, ++0x8D, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x00, 0x01, 0xEE, 0x02, ++0x06, 0xE1, 0x90, 0x94, 0xE4, 0x12, 0x44, 0x20, 0x12, 0x06, 0x89, 0x90, 0x94, 0xE9, 0x12, 0x75, ++0x05, 0x90, 0x94, 0xEA, 0x12, 0x77, 0xBA, 0x90, 0x94, 0xEB, 0xD1, 0x2A, 0x90, 0x94, 0xEC, 0xB1, ++0xE5, 0x90, 0x94, 0xED, 0xF0, 0x90, 0x00, 0x07, 0x12, 0x06, 0xA2, 0x90, 0x94, 0xEE, 0x12, 0x77, ++0x69, 0x90, 0x94, 0xF1, 0xF0, 0xED, 0x70, 0x19, 0xFF, 0x71, 0xC2, 0xE0, 0xB4, 0xFF, 0x06, 0x71, ++0xC2, 0xE4, 0xF0, 0x80, 0x07, 0x71, 0xC2, 0xE0, 0x04, 0xF0, 0x80, 0x05, 0x0F, 0xEF, 0xB4, 0x06, ++0xE8, 0x90, 0x94, 0xE8, 0xE0, 0xFF, 0xB4, 0x04, 0x13, 0xA3, 0xE0, 0xFE, 0x71, 0xBC, 0xEE, 0x71, ++0xCD, 0xFE, 0x71, 0xBC, 0x51, 0xEB, 0x90, 0x00, 0x02, 0xE4, 0x80, 0x20, 0xEF, 0xB4, 0x02, 0x1F, ++0x90, 0x94, 0xEA, 0x71, 0xBA, 0xEF, 0x71, 0xCD, 0x44, 0x20, 0x54, 0x7F, 0x71, 0xBB, 0x90, 0x00, ++0x01, 0xEF, 0x12, 0x06, 0xE1, 0x90, 0x94, 0xE9, 0xE0, 0x90, 0x00, 0x02, 0x12, 0x06, 0xE1, 0x71, ++0xBC, 0xE9, 0x24, 0x03, 0xF9, 0xE4, 0x3A, 0xFA, 0x12, 0x06, 0x89, 0x44, 0x20, 0x12, 0x06, 0xCF, ++0x90, 0x94, 0xEB, 0x71, 0xBA, 0x90, 0x00, 0x04, 0xEF, 0x12, 0x06, 0xE1, 0x90, 0x94, 0xEC, 0xE0, ++0x90, 0x00, 0x05, 0x12, 0x06, 0xE1, 0x90, 0x94, 0xED, 0xE0, 0x90, 0x00, 0x06, 0x12, 0x06, 0xE1, ++0x90, 0x94, 0xEE, 0xE0, 0x90, 0x00, 0x07, 0x02, 0x06, 0xE1, 0xE0, 0xFF, 0x90, 0x94, 0xE4, 0x02, ++0x44, 0x17, 0x74, 0xE9, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0x22, 0x12, 0x06, 0xCF, ++0x90, 0x94, 0xEA, 0xE0, 0x22, 0x90, 0x95, 0x16, 0xED, 0xF0, 0x90, 0x95, 0x13, 0x12, 0x44, 0x20, ++0xE4, 0x90, 0x95, 0x17, 0xF0, 0xA3, 0xF0, 0x12, 0x06, 0x89, 0xFF, 0x12, 0x75, 0x06, 0xFD, 0x12, ++0x77, 0xBB, 0xFB, 0x91, 0xF8, 0x90, 0x95, 0x17, 0xEF, 0xF0, 0x90, 0x95, 0x13, 0x12, 0x44, 0x17, ++0x12, 0x77, 0xBB, 0xFF, 0xB1, 0xA6, 0x90, 0x95, 0x18, 0xEF, 0xF0, 0x90, 0x90, 0x8A, 0xE0, 0x24, ++0xFE, 0x60, 0x14, 0x24, 0xFE, 0x60, 0x10, 0x14, 0x60, 0x07, 0x14, 0x60, 0x04, 0x24, 0x05, 0x70, ++0x40, 0x91, 0x62, 0x91, 0x6E, 0x80, 0x0C, 0x91, 0x62, 0x90, 0x90, 0x8A, 0xE0, 0x90, 0x94, 0xE8, ++0xF0, 0x51, 0xF2, 0x90, 0x95, 0x18, 0xE0, 0xFF, 0x90, 0x95, 0x13, 0x12, 0x44, 0x17, 0x90, 0x95, ++0x17, 0xE0, 0x7C, 0x00, 0x29, 0xF9, 0xEC, 0x3A, 0xFA, 0xC3, 0xE9, 0x9F, 0xF9, 0xEA, 0x94, 0x00, ++0xFA, 0x75, 0x40, 0x01, 0x75, 0x41, 0x90, 0x75, 0x42, 0x59, 0xA3, 0xE0, 0xF5, 0x43, 0x12, 0x35, ++0x26, 0x22, 0x7B, 0x01, 0x7A, 0x90, 0x79, 0x59, 0x90, 0x95, 0x16, 0xE0, 0xFD, 0x22, 0x90, 0x95, ++0x02, 0xED, 0xF0, 0x90, 0x94, 0xFF, 0x12, 0x44, 0x20, 0x12, 0x77, 0x6A, 0x90, 0x95, 0x06, 0xF0, ++0x90, 0x94, 0xFF, 0x12, 0x5D, 0x02, 0x75, 0x43, 0x03, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0x03, 0x12, ++0x35, 0x26, 0x90, 0x95, 0x02, 0xE0, 0x70, 0x2E, 0xFF, 0x91, 0xC7, 0xE0, 0xB4, 0xFF, 0x06, 0x91, ++0xC7, 0xE4, 0xF0, 0x80, 0x07, 0x91, 0xC7, 0xE0, 0x04, 0xF0, 0x80, 0x05, 0x0F, 0xEF, 0xB4, 0x03, ++0xE8, 0x75, 0x40, 0x01, 0x75, 0x41, 0x95, 0x75, 0x42, 0x03, 0x75, 0x43, 0x03, 0x90, 0x94, 0xFF, ++0x12, 0x44, 0x17, 0x12, 0x35, 0x26, 0x22, 0x74, 0x03, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, ++0x83, 0x22, 0xA3, 0xE0, 0xFE, 0x24, 0x28, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFF, ++0x74, 0x29, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFD, 0x74, 0x2C, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFB, 0xE4, 0xFE, 0xEF, 0x30, 0xE7, 0x04, 0x7C, 0x02, ++0x80, 0x02, 0xE4, 0xFC, 0xED, 0x30, 0xE6, 0x08, 0xAF, 0x03, 0xB1, 0xA6, 0xAE, 0x07, 0x80, 0x02, ++0xE4, 0xFE, 0xEC, 0x24, 0x18, 0x2E, 0xFF, 0x22, 0xE4, 0x90, 0x94, 0x14, 0xF0, 0xA3, 0xF0, 0x90, ++0x06, 0x32, 0xE0, 0x44, 0x20, 0xF0, 0xD1, 0xB6, 0xEF, 0x64, 0x01, 0x70, 0x6F, 0x90, 0x93, 0x3A, ++0xE0, 0xFF, 0x90, 0x95, 0x36, 0x74, 0x0D, 0xF0, 0x7B, 0x08, 0x7D, 0x01, 0x12, 0x5D, 0xCD, 0xD1, ++0x84, 0x90, 0x94, 0x11, 0x91, 0xD2, 0x90, 0x94, 0x13, 0xEF, 0xF0, 0x90, 0x94, 0x11, 0xD1, 0x8D, ++0x7B, 0x01, 0xE4, 0xFD, 0x71, 0xD5, 0x90, 0x94, 0x13, 0xE0, 0xFF, 0x90, 0x94, 0x12, 0xE0, 0x2F, ++0xFF, 0x90, 0x94, 0x11, 0xE0, 0x34, 0x00, 0xCF, 0x24, 0x30, 0xCF, 0x34, 0x00, 0xFE, 0x90, 0x94, ++0x14, 0xF0, 0xA3, 0xEF, 0xF0, 0xD1, 0xE4, 0xB1, 0x9D, 0x90, 0x93, 0x3A, 0xE0, 0xFB, 0xE4, 0xFF, ++0x12, 0x55, 0x4A, 0xB1, 0x9D, 0x90, 0x93, 0x36, 0xE0, 0xFB, 0x7F, 0x11, 0x12, 0x55, 0x4A, 0x12, ++0x87, 0xDE, 0x90, 0x90, 0x9D, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0x22, 0x90, 0x94, 0x14, ++0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0x20, 0xE0, ++0x05, 0x90, 0x93, 0x2D, 0x80, 0x03, 0x90, 0x93, 0x2E, 0xE0, 0x90, 0x90, 0x8A, 0xF0, 0x90, 0x90, ++0x8A, 0xE0, 0x14, 0x60, 0x13, 0x14, 0x60, 0x14, 0x24, 0xFE, 0x60, 0x10, 0x14, 0x60, 0x09, 0x14, ++0x60, 0x06, 0x24, 0x06, 0xE4, 0xFE, 0x80, 0x06, 0x7E, 0x04, 0x80, 0x02, 0x7E, 0x08, 0xAF, 0x06, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90, 0x00, 0x06, 0x02, 0x06, 0xA2, 0xD1, 0x6F, 0x2E, 0x90, ++0x93, 0x2F, 0x12, 0x75, 0x05, 0xFF, 0xED, 0x2F, 0x90, 0x93, 0x30, 0x12, 0x75, 0xD8, 0xFF, 0xED, ++0x2F, 0x90, 0x93, 0x31, 0x12, 0x77, 0x69, 0xFF, 0xED, 0x2F, 0x90, 0x93, 0x32, 0x12, 0x77, 0xBA, ++0xFF, 0xED, 0x2F, 0x90, 0x93, 0x33, 0xD1, 0x2A, 0xFF, 0xED, 0x2F, 0x90, 0x93, 0x34, 0xB1, 0xE5, ++0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x93, 0x35, 0xF0, 0x22, 0xF0, 0x90, 0x00, 0x05, 0x02, 0x06, ++0xA2, 0xD1, 0x6F, 0x2E, 0x90, 0x93, 0x36, 0x12, 0x75, 0x05, 0xFF, 0xED, 0x2F, 0x90, 0x93, 0x37, ++0x12, 0x75, 0xD8, 0xFF, 0xED, 0x2F, 0x90, 0x93, 0x38, 0x12, 0x77, 0x69, 0xFF, 0xED, 0x2F, 0x90, ++0x93, 0x39, 0x12, 0x77, 0xBA, 0xFF, 0xED, 0x2F, 0x90, 0x93, 0x3A, 0xD1, 0x2A, 0xFF, 0xED, 0x2F, ++0x90, 0x93, 0x3B, 0xB1, 0xE5, 0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x93, 0x3C, 0xF0, 0x22, 0x90, ++0x02, 0x09, 0xE0, 0xFD, 0x12, 0x06, 0x89, 0xFE, 0xAF, 0x05, 0xED, 0x22, 0xEF, 0x24, 0x01, 0xFF, ++0xE4, 0x3E, 0xFE, 0x22, 0x90, 0x94, 0x11, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xA3, 0xE0, 0x24, ++0x28, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x22, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0x91, 0xF9, 0x74, 0x8D, ++0x35, 0xF0, 0x22, 0xD1, 0x6F, 0x2E, 0x90, 0x93, 0x3D, 0x12, 0x75, 0x05, 0xFF, 0xAE, 0x05, 0xED, ++0x2F, 0x90, 0x93, 0x3E, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x04, 0x1D, ++0xE0, 0x60, 0x1A, 0x90, 0x05, 0x22, 0xE0, 0x54, 0x90, 0x60, 0x07, 0x90, 0x01, 0xC0, 0xE0, 0x44, ++0x08, 0xF0, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE1, 0xE4, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xAD, 0x07, 0x90, 0x90, 0x95, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, ++0x90, 0x90, 0x95, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x04, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xEF, 0xF0, 0x90, 0x90, 0x95, 0xA3, 0xE0, 0xFF, 0x74, 0x05, 0x2E, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x22, 0xEF, 0x70, 0x04, 0x74, 0xF0, 0x80, 0x16, 0xEF, 0xB4, 0x01, ++0x04, 0x74, 0xF4, 0x80, 0x0E, 0xEF, 0xB4, 0x02, 0x04, 0x74, 0xF8, 0x80, 0x06, 0xEF, 0xB4, 0x03, ++0x0C, 0x74, 0xFC, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83, 0xEB, 0xF0, 0x22, 0x90, 0x00, ++0xF1, 0xE0, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x22, 0x75, 0x15, 0x10, 0xE4, 0xF5, 0x16, 0x75, ++0x17, 0x07, 0x75, 0x18, 0x02, 0x90, 0x01, 0x30, 0xE5, 0x15, 0xF0, 0xA3, 0xE5, 0x16, 0xF0, 0xA3, ++0xE5, 0x17, 0xF0, 0xA3, 0xE5, 0x18, 0xF0, 0x22, 0x75, 0x1D, 0x07, 0x75, 0x1E, 0x01, 0x75, 0x1F, ++0x03, 0x75, 0x20, 0x62, 0x90, 0x01, 0x38, 0xE5, 0x1D, 0xF0, 0xA3, 0xE5, 0x1E, 0xF0, 0xA3, 0xE5, ++0x1F, 0xF0, 0xA3, 0xE5, 0x20, 0xF0, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, ++0xC7, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x01, 0x9A, 0xE0, 0x54, ++0xC0, 0xF0, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x3E, 0x50, 0x90, 0x01, 0x99, 0xE0, 0x44, 0xC0, 0xF0, ++0x90, 0x01, 0x9B, 0x74, 0x80, 0xF0, 0x22, 0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0, 0x44, 0x0B, 0xF0, ++0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x3E, 0x50, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xC0, 0x7F, 0x00, 0xB4, ++0x40, 0x02, 0x7F, 0x01, 0x22, 0xE4, 0x90, 0x93, 0x53, 0xF0, 0xA3, 0xF0, 0xF1, 0xB7, 0xEF, 0x64, ++0x01, 0x60, 0x39, 0xC3, 0x90, 0x93, 0x54, 0xE0, 0x94, 0x88, 0x90, 0x93, 0x53, 0xE0, 0x94, 0x13, ++0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, ++0x1B, 0x90, 0x93, 0x53, 0x11, 0x23, 0xD3, 0x90, 0x93, 0x54, 0xE0, 0x94, 0x32, 0x90, 0x93, 0x53, ++0xE0, 0x94, 0x00, 0x40, 0xC7, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE3, 0xC0, 0x90, 0x01, 0xC7, 0x74, ++0xFE, 0xF0, 0x22, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x3E, ++0x50, 0x7F, 0x02, 0x90, 0x93, 0x3F, 0xE0, 0xFE, 0xEF, 0xC3, 0x9E, 0x50, 0x10, 0xEF, 0x25, 0xE0, ++0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE4, 0x03, 0x7F, 0x00, 0x22, 0x0F, 0x80, 0xE6, 0x7F, 0x01, 0x22, ++0xE4, 0x90, 0x8D, 0x01, 0x12, 0x4D, 0xDD, 0xA3, 0xF0, 0x22, 0x90, 0x01, 0xE4, 0x74, 0x27, 0xF0, ++0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x34, 0xE0, 0x55, 0x15, 0xF5, 0x19, 0xA3, 0xE0, 0x55, 0x16, ++0xF5, 0x1A, 0xA3, 0xE0, 0x55, 0x17, 0xF5, 0x1B, 0xA3, 0xE0, 0x55, 0x18, 0xF5, 0x1C, 0x90, 0x01, ++0x34, 0xE5, 0x19, 0xF0, 0xA3, 0xE5, 0x1A, 0xF0, 0xA3, 0xE5, 0x1B, 0xF0, 0xA3, 0xE5, 0x1C, 0xF0, ++0x22, 0x90, 0x01, 0x3C, 0xE0, 0x55, 0x1D, 0xF5, 0x21, 0xA3, 0xE0, 0x55, 0x1E, 0xF5, 0x22, 0xA3, ++0xE0, 0x55, 0x1F, 0xF5, 0x23, 0xA3, 0xE0, 0x55, 0x20, 0xF5, 0x24, 0x90, 0x01, 0x3C, 0xE5, 0x21, ++0xF0, 0xA3, 0xE5, 0x22, 0xF0, 0xA3, 0xE5, 0x23, 0xF0, 0xA3, 0xE5, 0x24, 0xF0, 0x53, 0x91, 0xDF, ++0x22, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0x94, 0x11, 0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, ++0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, 0x23, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, ++0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8, 0x12, 0x4D, 0x98, 0x90, 0x00, ++0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x49, 0x47, 0x80, 0xFE, 0x22, 0x90, 0x93, 0x4A, ++0xE0, 0x04, 0xF0, 0x90, 0x8E, 0x49, 0xE0, 0x64, 0x02, 0x60, 0x03, 0x12, 0x6C, 0xD5, 0x22, 0x12, ++0x6F, 0xEF, 0x70, 0x0B, 0x90, 0x8E, 0x46, 0xE0, 0x60, 0x05, 0x31, 0x20, 0x12, 0x50, 0x0B, 0x22, ++0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0x22, 0x12, 0x6F, 0xEF, 0x70, 0x17, ++0x90, 0x8E, 0x46, 0xE0, 0x60, 0x11, 0x31, 0x20, 0xF0, 0x90, 0x8E, 0x41, 0xE0, 0x12, 0x8F, 0xC7, ++0x54, 0x07, 0x70, 0x03, 0x12, 0x58, 0x56, 0x22, 0xE4, 0xFF, 0x12, 0x6E, 0x57, 0xBF, 0x01, 0x0F, ++0x90, 0x8E, 0x46, 0xE0, 0x60, 0x09, 0x31, 0x60, 0x54, 0x07, 0x70, 0x03, 0x12, 0x58, 0x56, 0x22, ++0x90, 0x8E, 0x4A, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x57, 0x54, 0xC0, ++0x70, 0x08, 0x31, 0x60, 0x54, 0xFD, 0xF0, 0x02, 0x58, 0x56, 0xE5, 0x57, 0x30, 0xE6, 0x1F, 0x90, ++0x8E, 0x46, 0xE0, 0x64, 0x01, 0x70, 0x19, 0x90, 0x8E, 0x4A, 0xE0, 0x44, 0x01, 0xF0, 0x12, 0x8F, ++0x04, 0x64, 0x02, 0x60, 0x04, 0x31, 0xBB, 0x80, 0x07, 0x12, 0x5F, 0xB4, 0x80, 0x02, 0x31, 0x60, ++0xE5, 0x57, 0x90, 0x8E, 0x4A, 0x30, 0xE7, 0x0E, 0xE0, 0x44, 0x02, 0x12, 0x50, 0x0B, 0x90, 0x8E, ++0x41, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x04, 0x1D, 0xE0, 0x70, ++0x18, 0x90, 0x8D, 0x39, 0xE0, 0xFF, 0x90, 0x95, 0x36, 0x74, 0x09, 0xF0, 0x7B, 0x18, 0xE4, 0xFD, ++0x12, 0x5D, 0xCD, 0x90, 0x95, 0x58, 0x12, 0x87, 0xD9, 0x22, 0x90, 0x8E, 0x46, 0xE0, 0x60, 0x03, ++0x12, 0x5F, 0xC4, 0x22, 0xE4, 0x90, 0x94, 0x18, 0xF0, 0xA3, 0xF0, 0x7F, 0x83, 0x12, 0x4A, 0x5B, ++0x90, 0x94, 0x17, 0xEF, 0xF0, 0x7F, 0x83, 0x12, 0x4A, 0x5B, 0xAE, 0x07, 0x90, 0x94, 0x17, 0xE0, ++0xFF, 0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0x94, 0x19, 0xE0, 0x94, 0x64, 0x90, 0x94, 0x18, 0xE0, ++0x94, 0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0x94, 0x17, 0xE0, 0xFF, ++0x22, 0x90, 0x94, 0x18, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0x80, 0xBE, 0x90, 0x01, 0xC4, ++0x74, 0x2D, 0xF0, 0x74, 0x9A, 0xA3, 0xF0, 0x7F, 0x90, 0x12, 0x4A, 0x5B, 0xEF, 0x20, 0xE0, 0xF7, ++0x74, 0x2D, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x9A, 0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0xE4, 0xFF, 0xEF, 0x51, 0x64, 0xE4, 0xF0, 0x0F, 0xEF, 0xB4, 0x08, 0xF6, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x23, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, ++0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFE, 0xFD, 0xEF, 0xB4, 0x01, 0x0D, ++0xEB, 0xB4, 0x02, 0x03, 0x0D, 0x80, 0x06, 0xEB, 0xB4, 0x01, 0x02, 0x7D, 0x02, 0xAF, 0x06, 0xEF, ++0xC4, 0x54, 0xF0, 0x4D, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x53, ++0x7F, 0xFB, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x16, 0x90, 0x93, 0x53, 0xE0, 0x54, 0x30, ++0xFF, 0xBF, 0x20, 0x07, 0x90, 0x93, 0x4C, 0x74, 0x01, 0xF0, 0x22, 0xE4, 0x90, 0x93, 0x4C, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x37, 0x4E, 0x90, ++0x93, 0x56, 0x12, 0x08, 0x6D, 0x7F, 0x00, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0x90, 0x93, 0x5A, 0x12, ++0x08, 0x6D, 0x90, 0x93, 0x56, 0x71, 0x2E, 0x60, 0x18, 0x90, 0x93, 0x56, 0x71, 0x25, 0x90, 0x93, ++0x56, 0x12, 0x08, 0x6D, 0x90, 0x93, 0x56, 0x12, 0x4F, 0xED, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x38, ++0x45, 0x90, 0x93, 0x5A, 0x71, 0x2E, 0x60, 0x18, 0x90, 0x93, 0x5A, 0x71, 0x25, 0x90, 0x93, 0x5A, ++0x12, 0x08, 0x6D, 0x90, 0x93, 0x5A, 0x12, 0x4F, 0xED, 0x7F, 0x00, 0x7E, 0x09, 0x12, 0x38, 0x45, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x43, 0xF3, 0xEF, 0x54, 0xFE, 0xFF, 0xEC, 0x22, 0x12, 0x43, ++0xF3, 0xEF, 0x54, 0x01, 0xFF, 0xE4, 0xFE, 0xFD, 0xFC, 0xEF, 0x22, 0x90, 0x93, 0x40, 0x12, 0x8F, ++0xB6, 0x30, 0xE0, 0x0D, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x00, 0x71, 0x54, 0x04, 0xF0, 0x02, 0x5B, ++0xE2, 0x02, 0x5D, 0x7E, 0x90, 0x94, 0xC6, 0x12, 0x44, 0x20, 0xE4, 0x90, 0x94, 0xC9, 0xF0, 0xA3, ++0x22, 0x90, 0x93, 0x40, 0xE0, 0x30, 0xE0, 0x34, 0x12, 0x6F, 0xEF, 0x70, 0x2F, 0x90, 0x95, 0x5F, ++0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x0A, 0x0B, 0x90, 0x93, 0x42, 0xE0, 0x04, 0xF0, 0xE4, 0x90, 0x95, ++0x5F, 0xF0, 0x90, 0x93, 0x42, 0xE0, 0xFF, 0x90, 0x93, 0x41, 0xE0, 0xD3, 0x9F, 0x50, 0x0D, 0x90, ++0x93, 0x43, 0xE0, 0x70, 0x07, 0xE4, 0x90, 0x93, 0x42, 0xF0, 0x71, 0x3B, 0x22, 0xE4, 0x90, 0x95, ++0x56, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x23, 0xC3, 0x90, 0x95, 0x57, 0xE0, ++0x94, 0xD0, 0x90, 0x95, 0x56, 0xE0, 0x94, 0x07, 0x40, 0x0A, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x04, ++0xF0, 0x7F, 0x00, 0x22, 0x90, 0x95, 0x56, 0x71, 0xD1, 0x12, 0x3E, 0x50, 0x80, 0xD6, 0x7F, 0x01, ++0x22, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0x7F, 0x0A, 0x7E, 0x00, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFD, 0x7F, 0x8F, 0x12, 0x49, 0x47, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x71, 0xDD, 0x90, 0x93, 0x3E, 0xE0, 0xFF, 0x12, 0x87, 0x70, 0x90, 0x01, 0x3F, 0x74, 0x04, 0xF0, ++0x90, 0x8D, 0x07, 0xE0, 0xFF, 0xB4, 0x01, 0x07, 0x90, 0xFD, 0x00, 0xE0, 0x54, 0xEF, 0xF0, 0xEF, ++0xB4, 0x01, 0x07, 0x90, 0xFE, 0x10, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0x8E, 0xB7, 0xE0, 0x30, ++0xE0, 0x0D, 0x90, 0x8E, 0xB1, 0xE0, 0xC4, 0x54, 0x0F, 0x20, 0xE0, 0x03, 0x7F, 0x00, 0x22, 0x7F, ++0x01, 0x22, 0xEF, 0x90, 0x01, 0xC7, 0xB4, 0xA0, 0x05, 0x74, 0x04, 0xF0, 0x80, 0x03, 0x74, 0x08, ++0xF0, 0x02, 0x67, 0xBD, 0x90, 0x93, 0x6F, 0x12, 0x87, 0x11, 0x90, 0x93, 0x77, 0xF0, 0x90, 0x93, ++0x77, 0xE0, 0xFD, 0xC3, 0x94, 0x06, 0x50, 0x22, 0x90, 0x93, 0x70, 0xE0, 0x24, 0x04, 0x91, 0x8F, ++0x12, 0x63, 0x60, 0x90, 0x93, 0x77, 0xE0, 0x24, 0x71, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, ++0xEF, 0xF0, 0x90, 0x93, 0x77, 0xE0, 0x04, 0xF0, 0x80, 0xD4, 0x78, 0xB8, 0x7C, 0x8E, 0x7D, 0x01, ++0x7B, 0x01, 0x7A, 0x93, 0x79, 0x71, 0x91, 0x98, 0x7F, 0x00, 0x70, 0x02, 0x7F, 0x01, 0x22, 0xFF, ++0x90, 0x93, 0x6F, 0xE0, 0x34, 0x00, 0xFE, 0x22, 0x7E, 0x00, 0x7F, 0x06, 0x12, 0x45, 0xD5, 0xEF, ++0x22, 0x91, 0xB2, 0x12, 0x5E, 0xDA, 0x75, 0x43, 0x70, 0x7B, 0x01, 0x7A, 0x8E, 0x79, 0xE7, 0x02, ++0x35, 0x26, 0x12, 0x7C, 0x09, 0x7E, 0x00, 0x74, 0x00, 0x2F, 0x22, 0xEF, 0x60, 0x07, 0x90, 0x93, ++0x35, 0xE0, 0xFF, 0x91, 0xA1, 0x22, 0x12, 0x86, 0x68, 0x12, 0x67, 0xF3, 0x7B, 0xFF, 0x7A, 0x40, ++0x79, 0x6A, 0x12, 0x67, 0xEC, 0xD1, 0xB2, 0x7A, 0x40, 0x79, 0x70, 0xD1, 0x71, 0x78, 0x78, 0x7C, ++0x93, 0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x40, 0x79, 0x80, 0xD1, 0x71, 0xE4, 0x90, 0x93, 0x8B, 0x12, ++0x64, 0x7F, 0xA3, 0xE0, 0xFD, 0x12, 0x86, 0xAF, 0xEF, 0x64, 0x01, 0x60, 0x02, 0xC1, 0x59, 0x12, ++0x67, 0x09, 0xCF, 0x24, 0x0E, 0xCF, 0x12, 0x65, 0xD6, 0xEF, 0x64, 0x3A, 0x60, 0x02, 0xC1, 0x59, ++0x12, 0x67, 0x09, 0xCF, 0x24, 0x30, 0xCF, 0x12, 0x65, 0xD6, 0xEF, 0x64, 0x87, 0x60, 0x02, 0xC1, ++0x59, 0x90, 0x93, 0x8B, 0x04, 0xF0, 0xE4, 0x90, 0x93, 0x88, 0xF0, 0xD1, 0x5F, 0x94, 0x10, 0x50, ++0x1A, 0xD1, 0x94, 0x12, 0x67, 0x14, 0xCD, 0x24, 0x38, 0x12, 0x63, 0x52, 0x90, 0x93, 0x88, 0xE0, ++0x24, 0x78, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xD1, 0x66, 0x80, 0xE0, 0xE4, 0x90, 0x93, 0x89, 0xF0, ++0x90, 0x93, 0x89, 0xE0, 0xFF, 0xC3, 0x94, 0x02, 0x40, 0x02, 0xC1, 0x59, 0x75, 0xF0, 0x38, 0xEF, ++0xD1, 0x78, 0x20, 0xE0, 0x02, 0xC1, 0x59, 0xE4, 0x90, 0x93, 0x8A, 0xF0, 0xD1, 0x80, 0x90, 0x8E, ++0xE8, 0x12, 0x44, 0x0B, 0xE0, 0xFE, 0x90, 0x93, 0x8A, 0xE0, 0xC3, 0x9E, 0x40, 0x02, 0xC1, 0x51, ++0xEF, 0x75, 0xF0, 0x38, 0xA4, 0x24, 0xFF, 0xF9, 0x74, 0x8E, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xE0, ++0x75, 0xF0, 0x10, 0xA4, 0x29, 0xF9, 0xEA, 0x35, 0xF0, 0xFA, 0x78, 0x78, 0x7C, 0x93, 0xD1, 0x89, ++0x60, 0x02, 0xC1, 0x42, 0x90, 0x06, 0x33, 0xE0, 0x44, 0x01, 0x54, 0xFB, 0xF0, 0xE4, 0x90, 0x93, ++0x88, 0xF0, 0xD1, 0x5F, 0x94, 0x06, 0x50, 0x14, 0xD1, 0x94, 0x12, 0x67, 0x14, 0xCD, 0x24, 0x4A, ++0x12, 0x63, 0x52, 0x90, 0x93, 0x88, 0xD1, 0xA9, 0xD1, 0x66, 0x80, 0xE6, 0xE4, 0x90, 0x93, 0x88, ++0xF0, 0xD1, 0x5F, 0x94, 0x10, 0x50, 0x0C, 0x12, 0x63, 0x3E, 0x90, 0x93, 0x88, 0xD1, 0xA0, 0xD1, ++0x66, 0x80, 0xEE, 0xD1, 0x80, 0xD1, 0x78, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x19, 0xEF, 0x75, 0xF0, ++0x38, 0xA4, 0x24, 0xEF, 0xF9, 0x74, 0x8E, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x78, 0x68, 0x7C, 0x93, ++0xD1, 0x89, 0x70, 0x45, 0x80, 0x00, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x62, 0x90, 0x93, 0x8F, 0x12, ++0x44, 0x20, 0x7A, 0x93, 0x79, 0x78, 0x90, 0x93, 0x92, 0x12, 0x44, 0x20, 0x90, 0x93, 0x89, 0xE0, ++0x75, 0xF0, 0x38, 0xA4, 0x24, 0xE9, 0xF9, 0x74, 0x8E, 0x35, 0xF0, 0xFA, 0x90, 0x93, 0x95, 0x12, ++0x44, 0x20, 0xE4, 0x90, 0x93, 0x98, 0xF0, 0xA3, 0xF0, 0x7A, 0x93, 0x79, 0x68, 0x12, 0x5A, 0x52, ++0x80, 0x07, 0x90, 0x06, 0x33, 0xE0, 0x44, 0x05, 0xF0, 0x90, 0x93, 0x8A, 0xE0, 0x04, 0xF0, 0xA1, ++0x6C, 0x90, 0x93, 0x89, 0xE0, 0x04, 0xF0, 0xA1, 0x50, 0x90, 0x93, 0x8B, 0xE0, 0xFF, 0x22, 0x90, ++0x93, 0x88, 0xE0, 0xFF, 0xC3, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x93, 0x88, 0xE0, 0x04, 0xF0, ++0x22, 0x7E, 0x00, 0x7F, 0x10, 0x02, 0x06, 0x63, 0x90, 0x8E, 0xE7, 0x12, 0x44, 0x0B, 0xE0, 0x22, ++0x90, 0x93, 0x89, 0xE0, 0xFF, 0x75, 0xF0, 0x38, 0x22, 0x7D, 0x01, 0x7E, 0x00, 0x7F, 0x10, 0x12, ++0x45, 0xD5, 0xEF, 0x22, 0x90, 0x93, 0x61, 0xE0, 0xFD, 0x90, 0x93, 0x60, 0xE0, 0x2D, 0xFD, 0x22, ++0xE0, 0x24, 0x68, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0x22, 0xE0, 0x24, 0x62, 0xF5, 0x82, 0xE4, 0x34, ++0x93, 0x22, 0x78, 0x68, 0x7C, 0x93, 0x7D, 0x01, 0x7B, 0xFF, 0x22, 0x90, 0x93, 0xC6, 0x12, 0x44, ++0x20, 0x90, 0x93, 0xC9, 0x12, 0x5D, 0x02, 0x75, 0x43, 0x10, 0x7B, 0x01, 0x7A, 0x8F, 0x79, 0x57, ++0x12, 0x35, 0x26, 0x90, 0x93, 0xC6, 0x12, 0x5D, 0x02, 0x75, 0x43, 0x10, 0x7B, 0x01, 0x7A, 0x8F, ++0x79, 0x67, 0x12, 0x35, 0x26, 0x90, 0x93, 0xCC, 0x12, 0x43, 0xF3, 0x90, 0x8F, 0x77, 0x12, 0x08, ++0x6D, 0x90, 0x93, 0xD0, 0xE0, 0x90, 0x8F, 0x7E, 0xF0, 0x22, 0xE4, 0xFE, 0x90, 0x8E, 0xB7, 0xE0, ++0x30, 0xE0, 0x03, 0x7F, 0x01, 0x22, 0xED, 0x30, 0xE1, 0x0C, 0x90, 0x01, 0x3F, 0xE0, 0x30, 0xE2, ++0x05, 0x74, 0x04, 0xF0, 0xF1, 0x3B, 0xED, 0x30, 0xE0, 0x1E, 0xEF, 0x30, 0xE6, 0x08, 0x90, 0x01, ++0xC7, 0x74, 0x22, 0xF0, 0x7E, 0x01, 0xEF, 0x30, 0xE7, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x21, 0xF0, ++0x7E, 0x01, 0xEF, 0x30, 0xE5, 0x02, 0xF1, 0x3B, 0xAF, 0x06, 0x22, 0x90, 0x01, 0xC7, 0x74, 0x23, ++0xF0, 0x7E, 0x01, 0x22, 0xD1, 0xFA, 0xEF, 0x54, 0x01, 0xFF, 0x90, 0x8E, 0xB7, 0xE0, 0x54, 0xFE, ++0x4F, 0xF0, 0x22, 0x90, 0x02, 0x09, 0xE0, 0x90, 0x93, 0x63, 0xF0, 0x12, 0x06, 0x89, 0x90, 0x93, ++0x2D, 0x12, 0x75, 0x05, 0x90, 0x93, 0x2E, 0xF0, 0x22, 0xE4, 0xFF, 0x74, 0x18, 0xF1, 0x91, 0x74, ++0xBE, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0xEE, 0xF0, 0x74, 0x10, 0xF1, 0x91, 0x74, ++0xB8, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0xEE, 0xF0, 0x0F, 0xEF, 0xB4, 0x06, 0xDB, ++0x22, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x06, 0xF5, 0x83, 0xE0, 0xFE, 0x22, 0xEF, 0x60, 0x08, 0x90, ++0x93, 0x30, 0xE0, 0xFF, 0x12, 0x5E, 0x71, 0x22, 0xEF, 0x60, 0x0A, 0x90, 0x06, 0x31, 0xE0, 0x44, ++0x80, 0xF0, 0x12, 0x51, 0x2D, 0x22, 0xF1, 0xD6, 0xF1, 0xD7, 0x30, 0xE0, 0x18, 0x90, 0x8E, 0x2C, ++0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x20, 0xE0, 0x0D, 0x90, 0x95, 0x0E, 0x12, 0x08, 0x79, 0x00, 0x00, ++0x00, 0x14, 0x12, 0x6B, 0x1B, 0x22, 0x22, 0x90, 0x8E, 0xAE, 0xE0, 0xC4, 0x54, 0x0F, 0x22, 0x12, ++0xA5, 0x13, 0x30, 0xE0, 0x05, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x06, 0x92, 0x74, 0x02, 0xF0, ++0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0x95, 0x0B, 0xF0, 0x90, 0x8E, 0xA5, 0xE0, 0xC3, ++0x13, 0x54, 0x7F, 0x90, 0x95, 0x0C, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x12, 0x50, ++0x20, 0x90, 0x8E, 0x41, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0x90, 0x04, 0x1A, 0xE0, 0xF4, 0x60, 0x03, ++0x7F, 0x00, 0x22, 0x90, 0x04, 0x1B, 0xE0, 0x54, 0x07, 0x64, 0x07, 0x7F, 0x01, 0x60, 0x02, 0x7F, ++0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x11, 0x19, 0xEF, 0x64, 0x01, 0x70, 0x48, ++0x90, 0x8E, 0x4A, 0xE0, 0xFF, 0x54, 0x03, 0x70, 0x3F, 0x90, 0x8E, 0x48, 0xE0, 0xFE, 0xE4, 0xC3, ++0x9E, 0x40, 0x35, 0xEF, 0x20, 0xE2, 0x31, 0x90, 0x8E, 0x4A, 0xE0, 0x20, 0xE4, 0x2A, 0x90, 0x8E, ++0x42, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x1F, 0x90, 0x8E, 0xA9, 0xE0, 0x70, 0x19, 0x90, ++0x06, 0x62, 0xE0, 0x20, 0xE1, 0x12, 0x90, 0x06, 0x62, 0xE0, 0x30, 0xE0, 0x07, 0xE0, 0x54, 0xFC, ++0x64, 0x80, 0x60, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, ++0x24, 0xFE, 0x60, 0x0B, 0x04, 0x70, 0x24, 0x90, 0x8E, 0x4C, 0x74, 0x02, 0xF0, 0x80, 0x13, 0xED, ++0x70, 0x06, 0x90, 0x8E, 0xA6, 0xE0, 0x80, 0x02, 0xED, 0x14, 0x90, 0x8E, 0x4C, 0xF0, 0x90, 0x8E, ++0x4C, 0xE0, 0xA3, 0xF0, 0x90, 0x8E, 0x42, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0x90, 0x8E, 0xAA, 0xE0, ++0xC3, 0x13, 0x20, 0xE0, 0x30, 0x90, 0x02, 0x87, 0xE0, 0x70, 0x33, 0x90, 0x01, 0x00, 0xE0, 0x64, ++0x3F, 0x70, 0x2B, 0x90, 0x8E, 0xAE, 0xE0, 0x30, 0xE0, 0x06, 0x90, 0x02, 0x82, 0xE0, 0x70, 0x1E, ++0x90, 0x8E, 0xB7, 0xE0, 0x20, 0xE0, 0x17, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE1, 0x10, 0x90, 0x02, ++0x86, 0xE0, 0x20, 0xE3, 0x09, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, ++0x22, 0x90, 0x8E, 0x49, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, 0x07, 0x11, 0xBC, 0xBF, 0x01, 0x02, ++0x31, 0x1D, 0x22, 0x90, 0x8E, 0x41, 0xE0, 0x30, 0xE0, 0x02, 0x31, 0x01, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x4D, 0x30, 0x12, 0x4F, 0xA4, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, ++0x60, 0x2E, 0x12, 0x6F, 0xEF, 0x70, 0x29, 0x90, 0x8E, 0x42, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x2B, ++0x7F, 0x0F, 0x12, 0x5A, 0x47, 0x90, 0x06, 0x04, 0xE0, 0x54, 0xBF, 0xF0, 0x12, 0x5D, 0x7E, 0xBF, ++0x01, 0x0E, 0x90, 0x8E, 0x41, 0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x06, 0x7F, 0x01, 0x12, 0x4F, 0x1B, ++0x22, 0x7D, 0x2D, 0x12, 0x5D, 0x20, 0x90, 0x01, 0x37, 0x74, 0x02, 0xF0, 0xFD, 0x7F, 0x03, 0x12, ++0x6D, 0xCB, 0x12, 0x4B, 0x2E, 0xE4, 0xFD, 0x7F, 0x01, 0x02, 0x4F, 0x1B, 0x7D, 0x2E, 0x7F, 0x6F, ++0x12, 0x5A, 0x47, 0x7D, 0x02, 0x7F, 0x01, 0x02, 0x4F, 0x1B, 0x12, 0x4F, 0xCA, 0x7D, 0x04, 0x7F, ++0x01, 0x02, 0x4F, 0x1B, 0xE4, 0x90, 0x94, 0x16, 0xF0, 0x90, 0x8E, 0x46, 0xE0, 0x60, 0x6E, 0x12, ++0x6F, 0xEF, 0x70, 0x69, 0x51, 0x0E, 0x12, 0x51, 0x0C, 0x12, 0x43, 0xD5, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0x12, 0x51, 0x26, 0x78, 0x10, 0x12, 0x08, 0x5A, 0xD0, ++0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x43, 0xD5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0xA3, 0x12, 0x51, 0x26, 0x78, 0x18, 0x12, 0x08, 0x5A, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x51, 0x1E, 0x44, 0x80, 0xF0, 0x90, 0x94, 0x16, 0x74, 0x01, 0xF0, 0xE4, 0x90, ++0x8E, 0x4D, 0xF0, 0x04, 0x60, 0x17, 0x51, 0x16, 0xE4, 0x90, 0x95, 0x0B, 0xF0, 0x90, 0x8E, 0x4E, ++0x12, 0x50, 0x14, 0x90, 0x8E, 0x49, 0xE0, 0x20, 0xE2, 0x03, 0x12, 0x58, 0x5F, 0x22, 0x90, 0x8E, ++0x4C, 0xE0, 0x90, 0x05, 0x73, 0x22, 0x90, 0x8E, 0x4A, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x12, 0x43, ++0xD5, 0x90, 0x8E, 0x99, 0x12, 0x08, 0x6D, 0x90, 0x8E, 0x42, 0xE0, 0x22, 0x90, 0x8E, 0x9D, 0x74, ++0x04, 0xF0, 0xA3, 0x14, 0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74, 0x05, 0xF0, ++0xA3, 0xF0, 0x22, 0x7D, 0x2F, 0x12, 0x4B, 0x29, 0x7D, 0x08, 0x7F, 0x01, 0x02, 0x4F, 0x1B, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x02, 0x09, 0xE0, 0xFD, 0x12, 0x77, 0xD1, 0x90, 0x8E, ++0x2C, 0x12, 0x75, 0x0C, 0x54, 0x04, 0xFC, 0xEF, 0x54, 0xFB, 0x4C, 0xFF, 0x90, 0x8E, 0x2C, 0x71, ++0x00, 0xFF, 0xF0, 0x12, 0x06, 0x89, 0x54, 0x10, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0x90, 0x8E, 0x2C, ++0x12, 0x75, 0x05, 0xFF, 0xED, 0x2F, 0x90, 0x8E, 0x2D, 0x12, 0x75, 0xD8, 0xFF, 0xAE, 0x05, 0xED, ++0x2F, 0x90, 0x8E, 0x2E, 0xF0, 0x90, 0x8E, 0x2C, 0xE0, 0xFF, 0x20, 0xE0, 0x08, 0x13, 0x13, 0x13, ++0x54, 0x1F, 0x30, 0xE0, 0x0A, 0x90, 0x06, 0x31, 0xE0, 0x44, 0x40, 0xF0, 0x12, 0x7D, 0xF7, 0x90, ++0x8E, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x33, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x06, ++0x09, 0xE0, 0x54, 0xFE, 0x51, 0xF7, 0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x08, 0x51, 0xEF, ++0x90, 0x94, 0x87, 0x74, 0x01, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x6D, 0xCB, 0x90, 0x95, 0x0E, ++0x12, 0x08, 0x79, 0x00, 0x00, 0x27, 0x10, 0x12, 0x6B, 0x1B, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, ++0x02, 0x86, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xF0, 0x90, 0x06, 0x08, 0xE0, 0x54, 0x7F, 0xF0, 0x22, ++0xF0, 0xEE, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7, 0x4E, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x94, 0x6F, 0xE0, 0xFE, 0x90, 0x94, 0x6C, 0xE0, 0xC3, 0x9E, 0x40, 0x04, 0x7F, 0x00, ++0x80, 0x0E, 0xEF, 0x60, 0x05, 0xD3, 0x94, 0x0E, 0x40, 0x04, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x8E, 0x2C, 0x12, 0x6F, 0x7E, 0x30, 0xE0, 0x2D, 0xEF, 0xC4, ++0x54, 0x0F, 0x20, 0xE0, 0x21, 0x71, 0x7E, 0x60, 0x0B, 0x71, 0x74, 0x40, 0x07, 0x71, 0x6C, 0x90, ++0x90, 0xED, 0x80, 0x05, 0x71, 0x6C, 0x90, 0x90, 0xE5, 0x12, 0x43, 0xFF, 0x12, 0x42, 0xAB, 0x71, ++0x89, 0x7F, 0x03, 0x02, 0x6B, 0x22, 0x7F, 0x01, 0x12, 0x6C, 0x37, 0x22, 0xE4, 0x7F, 0xE8, 0x7E, ++0x03, 0xFD, 0xFC, 0x22, 0x90, 0x93, 0x29, 0x12, 0x43, 0xFF, 0xD3, 0x02, 0x43, 0xE2, 0x90, 0x90, ++0xE9, 0x12, 0x43, 0xF3, 0xEC, 0x4D, 0x4E, 0x4F, 0x22, 0x90, 0x95, 0x0E, 0x12, 0x08, 0x6D, 0xE4, ++0x90, 0x95, 0x12, 0xF0, 0x22, 0x71, 0xAE, 0x90, 0x94, 0x6A, 0xE0, 0x64, 0x01, 0xF0, 0xE0, 0x24, ++0x95, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xA3, 0xA3, 0x12, 0x64, 0x7F, 0x02, 0x80, 0x3C, 0x90, 0x93, ++0x5F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x71, 0xAE, 0x24, 0x16, 0xFF, 0xE4, 0x3E, 0x12, 0x65, ++0xD8, 0x90, 0x90, 0x9B, 0xA3, 0xE0, 0xB5, 0x07, 0x1B, 0x90, 0x93, 0x60, 0xE0, 0x24, 0x16, 0x12, ++0x67, 0x13, 0xFE, 0x7D, 0x01, 0x12, 0x63, 0x60, 0xEF, 0xFD, 0x90, 0x90, 0x9B, 0xE0, 0x6D, 0x70, ++0x01, 0xE4, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x7F, 0x01, 0x22, 0xED, 0x14, 0x60, 0x06, 0x04, 0x70, ++0x03, 0x7F, 0x01, 0x22, 0x7F, 0x01, 0x22, 0x12, 0x86, 0x68, 0x90, 0x90, 0x91, 0xE0, 0x70, 0x02, ++0xA3, 0xE0, 0x60, 0x27, 0xE4, 0x90, 0x93, 0x62, 0xF0, 0x91, 0x3F, 0x50, 0x21, 0x12, 0x64, 0x80, ++0x91, 0x85, 0xE0, 0x24, 0x9F, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0xE0, 0x6F, 0x60, 0x03, ++0x7F, 0x00, 0x22, 0x90, 0x93, 0x62, 0xE0, 0x04, 0xF0, 0x80, 0xDE, 0x7F, 0x00, 0x22, 0x90, 0x06, ++0x32, 0xE0, 0x44, 0x40, 0xF0, 0xE4, 0x90, 0x90, 0x9D, 0xF0, 0xA3, 0xF0, 0x7F, 0x01, 0x22, 0x90, ++0x93, 0x62, 0xE0, 0xFD, 0xC3, 0x94, 0x02, 0x22, 0x12, 0x86, 0x68, 0xE4, 0xA3, 0xF0, 0x91, 0x3F, ++0x50, 0x1B, 0x12, 0x64, 0x80, 0x91, 0x85, 0xE0, 0x24, 0xBF, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, ++0x83, 0xE0, 0xB5, 0x07, 0x1D, 0x90, 0x93, 0x62, 0xE0, 0x04, 0xF0, 0x80, 0xE1, 0x90, 0x06, 0x32, ++0xE0, 0x44, 0x80, 0xF0, 0x90, 0x01, 0xC7, 0x74, 0x30, 0xF0, 0x7F, 0x01, 0x12, 0x71, 0x54, 0x7F, ++0x01, 0x22, 0x7F, 0x00, 0x22, 0xED, 0x24, 0x1C, 0xFD, 0x12, 0x63, 0x60, 0x90, 0x93, 0x62, 0x22, ++0x12, 0x87, 0x0E, 0xA3, 0xF0, 0x90, 0x93, 0x61, 0xE0, 0xFD, 0xC3, 0x94, 0x04, 0x50, 0x29, 0x90, ++0x93, 0x60, 0xE0, 0x24, 0x10, 0x12, 0x67, 0x13, 0xFE, 0x12, 0x63, 0x60, 0x90, 0x93, 0x61, 0xE0, ++0x24, 0x97, 0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0xE0, 0x6F, 0x60, 0x03, 0x7F, 0x00, 0x22, ++0x90, 0x93, 0x61, 0xE0, 0x04, 0xF0, 0x80, 0xCD, 0x7F, 0x01, 0x22, 0xE0, 0xFF, 0x74, 0x01, 0x7E, ++0x00, 0xA8, 0x07, 0x08, 0x22, 0x7D, 0x01, 0x7B, 0x01, 0x7A, 0x8E, 0x79, 0xD9, 0x7E, 0x00, 0x7F, ++0x04, 0x02, 0x45, 0xD5, 0x78, 0x10, 0x12, 0x08, 0x47, 0x90, 0x94, 0xF9, 0x02, 0x43, 0xFF, 0x74, ++0x12, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x93, ++0x67, 0xE0, 0x04, 0xF0, 0x22, 0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x94, ++0xF5, 0x83, 0x22, 0x90, 0x8E, 0x41, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22, 0x74, 0x0D, 0x2C, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xEF, 0xF0, 0x90, 0xFD, 0x78, 0xE0, 0x7F, ++0x00, 0x22, 0xEF, 0xF0, 0x90, 0xFD, 0x70, 0xE0, 0x7F, 0x00, 0x22, 0xEE, 0xF0, 0x90, 0xFD, 0x80, ++0xE0, 0x7E, 0x00, 0x22, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, ++0x90, 0x93, 0x62, 0xE0, 0xFD, 0x90, 0x93, 0x61, 0xE0, 0x2D, 0x22, 0x90, 0x94, 0xF4, 0xE0, 0xC3, ++0x13, 0x90, 0xFD, 0x10, 0xF0, 0x22, 0x7F, 0x84, 0x7E, 0x08, 0x12, 0x54, 0xE0, 0x90, 0x94, 0xA1, ++0x22, 0x24, 0x30, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0x22, 0x90, 0x94, 0x77, 0xE0, 0x90, ++0x95, 0x3A, 0xF0, 0x22, 0x90, 0x8E, 0xAC, 0xE0, 0x90, 0x05, 0x73, 0xF0, 0x22, 0x90, 0x8E, 0x44, ++0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x22, 0xF0, 0xEE, 0x54, 0x80, 0xFE, 0xEF, 0x54, 0x7F, 0x22, 0x90, ++0x94, 0x89, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x22, 0x90, 0x94, 0x8B, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x22, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, ++0x8E, 0x42, 0x22, 0x90, 0x95, 0x26, 0xE0, 0x7F, 0x48, 0x7E, 0x09, 0x22, 0xF0, 0xA3, 0xEF, 0xF0, ++0xE4, 0xA3, 0xF0, 0x22, 0x90, 0x8E, 0x29, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, ++0x91, 0xF5, 0x83, 0x22, 0x7F, 0x01, 0x7E, 0x00, 0x02, 0x3D, 0xC2, 0x90, 0x02, 0x86, 0xE0, 0x54, ++0xFB, 0xF0, 0x22, 0x90, 0x8E, 0x44, 0xE0, 0xC4, 0x54, 0x0F, 0x22, 0x90, 0x8E, 0x2C, 0xE0, 0xFF, ++0xC3, 0x13, 0x22, 0xF9, 0xEE, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0x22, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, ++0xEB, 0xF0, 0x22, 0x00, 0x04, 0xCB, ++}; ++u4Byte ArrayLength_MP_8723B_FW_WoWLAN = 26166; ++ ++ ++void ++ODM_ReadFirmware_MP_8723B_FW_WoWLAN( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8723B_FW_WoWLAN; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8723B_FW_WoWLAN, ArrayLength_MP_8723B_FW_WoWLAN); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8723B_FW_WoWLAN; ++} ++ ++ ++ ++#endif /* end of (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))*/ ++ ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_fw.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_fw.h +new file mode 100644 +index 0000000..2b9c7d6 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_fw.h +@@ -0,0 +1,62 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.16*/ ++#if (RTL8723B_SUPPORT == 1) ++#ifndef __INC_MP_FW_HW_IMG_8723B_H ++#define __INC_MP_FW_HW_IMG_8723B_H ++ ++ ++/****************************************************************************** ++* FW_AP.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8723B_FW_AP( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++/****************************************************************************** ++* FW_NIC.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8723B_FW_NIC( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++/****************************************************************************** ++* FW_WoWLAN.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadFirmware_MP_8723B_FW_WoWLAN( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mac.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mac.c +new file mode 100644 +index 0000000..395f012 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mac.c +@@ -0,0 +1,291 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8723B_SUPPORT == 1) ++static BOOLEAN ++CheckPositive( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2, ++ IN const u4Byte Condition3, ++ IN const u4Byte Condition4 ++) ++{ ++ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ ++ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ ++ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ ++ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ ++ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ ++ ++ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; ++ u4Byte driver1 = pDM_Odm->CutVersion << 24 | ++ (pDM_Odm->SupportInterface & 0xF0) << 16 | ++ pDM_Odm->SupportPlatform << 16 | ++ pDM_Odm->PackageType << 12 | ++ (pDM_Odm->SupportInterface & 0x0F) << 8 | ++ _BoardType; ++ ++ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | ++ (pDM_Odm->TypeGPA & 0xFF) << 8 | ++ (pDM_Odm->TypeALNA & 0xFF) << 16 | ++ (pDM_Odm->TypeAPA & 0xFF) << 24; ++ ++u4Byte driver3 = 0; ++ ++ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | ++ (pDM_Odm->TypeGPA & 0xFF00) | ++ (pDM_Odm->TypeALNA & 0xFF00) << 8 | ++ (pDM_Odm->TypeAPA & 0xFF00) << 16; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); ++ ++ ++ /*============== Value Defined Check ===============*/ ++ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ ++ ++ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) ++ return FALSE; ++ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) ++ return FALSE; ++ ++ /*=============== Bit Defined Check ================*/ ++ /* We don't care [31:28] */ ++ ++ cond1 &= 0x00FF0FFF; ++ driver1 &= 0x00FF0FFF; ++ ++ if ((cond1 & driver1) == cond1) { ++ u4Byte bitMask = 0; ++ ++ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ ++ return TRUE; ++ ++ if ((cond1 & BIT0) != 0) /*GLNA*/ ++ bitMask |= 0x000000FF; ++ if ((cond1 & BIT1) != 0) /*GPA*/ ++ bitMask |= 0x0000FF00; ++ if ((cond1 & BIT2) != 0) /*ALNA*/ ++ bitMask |= 0x00FF0000; ++ if ((cond1 & BIT3) != 0) /*APA*/ ++ bitMask |= 0xFF000000; ++ ++ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ ++ return TRUE; ++ else ++ return FALSE; ++ } else ++ return FALSE; ++} ++static BOOLEAN ++CheckNegative( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2 ++) ++{ ++ return TRUE; ++} ++ ++/****************************************************************************** ++* MAC_REG.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8723B_MAC_REG[] = { ++ 0x02F, 0x00000030, ++ 0x035, 0x00000000, ++ 0x039, 0x00000008, ++ 0x064, 0x00000000, ++ 0x067, 0x00000020, ++ 0x421, 0x0000000F, ++ 0x428, 0x0000000A, ++ 0x429, 0x00000010, ++ 0x430, 0x00000000, ++ 0x431, 0x00000000, ++ 0x432, 0x00000000, ++ 0x433, 0x00000001, ++ 0x434, 0x00000004, ++ 0x435, 0x00000005, ++ 0x436, 0x00000007, ++ 0x437, 0x00000008, ++ 0x43C, 0x00000004, ++ 0x43D, 0x00000005, ++ 0x43E, 0x00000007, ++ 0x43F, 0x00000008, ++ 0x440, 0x0000005D, ++ 0x441, 0x00000001, ++ 0x442, 0x00000000, ++ 0x444, 0x00000010, ++ 0x445, 0x00000000, ++ 0x446, 0x00000000, ++ 0x447, 0x00000000, ++ 0x448, 0x00000000, ++ 0x449, 0x000000F0, ++ 0x44A, 0x0000000F, ++ 0x44B, 0x0000003E, ++ 0x44C, 0x00000010, ++ 0x44D, 0x00000000, ++ 0x44E, 0x00000000, ++ 0x44F, 0x00000000, ++ 0x450, 0x00000000, ++ 0x451, 0x000000F0, ++ 0x452, 0x0000000F, ++ 0x453, 0x00000000, ++ 0x456, 0x0000005E, ++ 0x460, 0x00000066, ++ 0x461, 0x00000066, ++ 0x4C8, 0x000000FF, ++ 0x4C9, 0x00000008, ++ 0x4CC, 0x000000FF, ++ 0x4CD, 0x000000FF, ++ 0x4CE, 0x00000001, ++ 0x500, 0x00000026, ++ 0x501, 0x000000A2, ++ 0x502, 0x0000002F, ++ 0x503, 0x00000000, ++ 0x504, 0x00000028, ++ 0x505, 0x000000A3, ++ 0x506, 0x0000005E, ++ 0x507, 0x00000000, ++ 0x508, 0x0000002B, ++ 0x509, 0x000000A4, ++ 0x50A, 0x0000005E, ++ 0x50B, 0x00000000, ++ 0x50C, 0x0000004F, ++ 0x50D, 0x000000A4, ++ 0x50E, 0x00000000, ++ 0x50F, 0x00000000, ++ 0x512, 0x0000001C, ++ 0x514, 0x0000000A, ++ 0x516, 0x0000000A, ++ 0x525, 0x0000004F, ++ 0x550, 0x00000010, ++ 0x551, 0x00000010, ++ 0x559, 0x00000002, ++ 0x55C, 0x00000050, ++ 0x55D, 0x000000FF, ++ 0x605, 0x00000030, ++ 0x608, 0x0000000E, ++ 0x609, 0x0000002A, ++ 0x620, 0x000000FF, ++ 0x621, 0x000000FF, ++ 0x622, 0x000000FF, ++ 0x623, 0x000000FF, ++ 0x624, 0x000000FF, ++ 0x625, 0x000000FF, ++ 0x626, 0x000000FF, ++ 0x627, 0x000000FF, ++ 0x638, 0x00000050, ++ 0x63C, 0x0000000A, ++ 0x63D, 0x0000000A, ++ 0x63E, 0x0000000E, ++ 0x63F, 0x0000000E, ++ 0x640, 0x00000040, ++ 0x642, 0x00000040, ++ 0x643, 0x00000000, ++ 0x652, 0x000000C8, ++ 0x66E, 0x00000005, ++ 0x700, 0x00000021, ++ 0x701, 0x00000043, ++ 0x702, 0x00000065, ++ 0x703, 0x00000087, ++ 0x708, 0x00000021, ++ 0x709, 0x00000043, ++ 0x70A, 0x00000065, ++ 0x70B, 0x00000087, ++ 0x765, 0x00000018, ++ 0x76E, 0x00000004, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8723B_MAC_REG( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8723B_MAC_REG)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8723B_MAC_REG; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_MAC_REG\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } ++ else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigMAC_8723B(pDM_Odm, v1, (u1Byte)v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8723B_MAC_REG(void) ++{ ++ return 24; ++} ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mac.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mac.h +new file mode 100644 +index 0000000..3ac3f15 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mac.h +@@ -0,0 +1,39 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#if (RTL8723B_SUPPORT == 1) ++#ifndef __INC_MP_MAC_HW_IMG_8723B_H ++#define __INC_MP_MAC_HW_IMG_8723B_H ++ ++ ++/****************************************************************************** ++* MAC_REG.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8723B_MAC_REG(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8723B_MAC_REG(void); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mp.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mp.c +new file mode 100644 +index 0000000..c689dd9 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mp.c +@@ -0,0 +1,2694 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++#include "../phydm_precomp.h" ++ ++#if (RTL8723B_SUPPORT==1) ++ ++#ifdef CONFIG_MP_INCLUDED ++ ++//#define SIZE_OF_BT_MP_PATCH 20564 ++u8 Rtl8723BFwBTImgArray[Rtl8723BFwBTImgArrayLength] = { ++0xfc, 0x63, 0x07, 0x62, 0x06, 0xd1, 0x05, 0xd0, 0x00, 0x69, 0x4f, 0xb2, 0x20, 0xda, 0x4f, 0xb2, 0x40, 0x9a, 0x4f, 0xb3, 0x4f, 0xb0, 0x42, 0x34, 0x82, 0x34, 0x80, 0xcb, 0x4e, 0xb3, 0x40, 0xcb, ++0x4e, 0xb2, 0x20, 0xc2, 0x4e, 0xb2, 0x20, 0xc2, 0x01, 0x6b, 0x4e, 0xb2, 0x60, 0xc2, 0x4e, 0xb2, 0x20, 0xc2, 0x4e, 0xb2, 0x20, 0xc2, 0x4e, 0xb2, 0x20, 0xca, 0x4e, 0xb3, 0x4e, 0xb2, 0x60, 0xda, ++0x4e, 0xb3, 0x4f, 0xb2, 0x60, 0xda, 0x4f, 0xb3, 0x4f, 0xb2, 0x60, 0xda, 0x4f, 0xb3, 0x50, 0xb2, 0x60, 0xda, 0x50, 0xb3, 0x50, 0xb2, 0x60, 0xda, 0x50, 0xb3, 0x51, 0xb2, 0x60, 0xda, 0x51, 0xb3, ++0x51, 0xb2, 0x60, 0xda, 0x51, 0xb3, 0x52, 0xb2, 0x60, 0xda, 0x52, 0xb3, 0x52, 0xb2, 0x60, 0xda, 0x52, 0xb3, 0x53, 0xb2, 0x60, 0xda, 0x53, 0xb3, 0x53, 0xb2, 0x60, 0xda, 0x53, 0xb3, 0x54, 0xb2, ++0x60, 0xda, 0x54, 0xb3, 0x54, 0xb2, 0x60, 0xda, 0x54, 0xb3, 0x55, 0xb2, 0x60, 0xda, 0x55, 0xb3, 0x55, 0xb2, 0x60, 0xda, 0x55, 0xb3, 0x56, 0xb2, 0x80, 0x18, 0xf8, 0x2d, 0x60, 0xda, 0x55, 0xb3, ++0x55, 0xb2, 0x60, 0xda, 0x55, 0xb3, 0x56, 0xb2, 0x60, 0xda, 0x56, 0xb3, 0x56, 0xb2, 0x60, 0xda, 0x56, 0xb3, 0x57, 0xb2, 0x60, 0xda, 0x57, 0xb3, 0x57, 0xb2, 0x60, 0xda, 0x57, 0xb3, 0x58, 0xb2, ++0x60, 0xda, 0x45, 0xf1, 0x09, 0x6a, 0x00, 0xf1, 0x50, 0xc8, 0x56, 0xb2, 0x00, 0xf4, 0x00, 0x6b, 0xa0, 0xf0, 0x76, 0xc8, 0x43, 0xd8, 0x54, 0xb2, 0x54, 0xb3, 0x25, 0xd8, 0x44, 0xd8, 0x02, 0x6a, ++0x80, 0xf1, 0x42, 0xc0, 0x00, 0xf2, 0x00, 0x6a, 0xa0, 0xf0, 0x52, 0xc8, 0x90, 0x6a, 0xa0, 0xf0, 0x54, 0xc8, 0xa0, 0xf0, 0x58, 0xc8, 0x4e, 0xb2, 0x60, 0xda, 0x4e, 0xb3, 0x4e, 0xb2, 0x60, 0xda, ++0x4e, 0xb3, 0x4f, 0xb2, 0x60, 0xda, 0x4f, 0xb3, 0x4f, 0xb2, 0x60, 0xda, 0x00, 0x6a, 0xe0, 0xf1, 0x45, 0xc0, 0x26, 0xd8, 0x27, 0xd8, 0x28, 0xd8, 0x80, 0x18, 0x4d, 0x34, 0x29, 0xd8, 0x80, 0x18, ++0x8e, 0x36, 0x00, 0x65, 0xc0, 0xf1, 0x7f, 0xa0, 0x48, 0xb2, 0x60, 0xc2, 0xe0, 0xf1, 0x62, 0xa0, 0x47, 0xb2, 0x60, 0xc2, 0x47, 0xb2, 0x00, 0x6b, 0x60, 0xc2, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90, ++0x00, 0xef, 0x04, 0x63, 0x54, 0x8b, 0x10, 0x80, 0x50, 0xf0, 0x10, 0x80, 0x46, 0x00, 0x11, 0x80, 0x4c, 0x00, 0x11, 0x80, 0x44, 0x00, 0x11, 0x80, 0x06, 0x96, 0x11, 0x80, 0x07, 0x96, 0x11, 0x80, ++0x08, 0x96, 0x11, 0x80, 0x01, 0x96, 0x11, 0x80, 0x02, 0x96, 0x11, 0x80, 0x04, 0x96, 0x11, 0x80, 0xe1, 0xc9, 0x10, 0x80, 0xe8, 0x07, 0x11, 0x80, 0xf9, 0xc3, 0x10, 0x80, 0x24, 0x19, 0x11, 0x80, ++0xa9, 0xc3, 0x10, 0x80, 0x80, 0x19, 0x11, 0x80, 0x01, 0xe4, 0x10, 0x80, 0x14, 0x07, 0x11, 0x80, 0x9d, 0xd3, 0x10, 0x80, 0x1c, 0x19, 0x11, 0x80, 0xed, 0xba, 0x10, 0x80, 0x20, 0x19, 0x11, 0x80, ++0x25, 0xd6, 0x10, 0x80, 0xb0, 0x07, 0x11, 0x80, 0x0d, 0xba, 0x10, 0x80, 0xf8, 0x06, 0x11, 0x80, 0xe5, 0xd6, 0x10, 0x80, 0x08, 0x07, 0x11, 0x80, 0xdd, 0xcb, 0x10, 0x80, 0xe0, 0x06, 0x11, 0x80, ++0x51, 0xcb, 0x10, 0x80, 0xd0, 0x07, 0x11, 0x80, 0x91, 0xba, 0x10, 0x80, 0xc8, 0x07, 0x11, 0x80, 0xad, 0xba, 0x10, 0x80, 0xa0, 0x07, 0x11, 0x80, 0x89, 0xce, 0x10, 0x80, 0xe8, 0x06, 0x11, 0x80, ++0x91, 0xcf, 0x10, 0x80, 0x48, 0x19, 0x11, 0x80, 0xad, 0xec, 0x10, 0x80, 0x90, 0x07, 0x11, 0x80, 0x6d, 0xbb, 0x10, 0x80, 0x34, 0x08, 0x11, 0x80, 0x09, 0xdf, 0x10, 0x80, 0xf8, 0x1a, 0x11, 0x80, ++0x79, 0xcc, 0x10, 0x80, 0x40, 0x19, 0x11, 0x80, 0xc5, 0xbb, 0x10, 0x80, 0xc4, 0x07, 0x11, 0x80, 0xa5, 0xca, 0x10, 0x80, 0x74, 0x19, 0x11, 0x80, 0x59, 0xe4, 0x10, 0x80, 0x74, 0x07, 0x11, 0x80, ++0x14, 0xc0, 0x52, 0x02, 0x58, 0xd5, 0xc8, 0x19, 0x2d, 0xb0, 0x10, 0x80, 0x7c, 0x07, 0x11, 0x80, 0x45, 0xd8, 0x10, 0x80, 0xb4, 0x07, 0x11, 0x80, 0x61, 0xd7, 0x10, 0x80, 0x58, 0x08, 0x11, 0x80, ++0xed, 0xbb, 0x10, 0x80, 0x1c, 0x1a, 0x11, 0x80, 0x18, 0x96, 0x11, 0x80, 0x1c, 0x96, 0x11, 0x80, 0x09, 0x96, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x04, 0xd0, 0x0d, 0xb0, 0x90, 0x67, 0x00, 0x6d, ++0x00, 0x18, 0x40, 0x33, 0x40, 0x6e, 0x01, 0x6a, 0x4b, 0xea, 0x47, 0xd8, 0x70, 0x6a, 0x43, 0xc0, 0x0a, 0x6a, 0x4c, 0xc0, 0x08, 0x6a, 0x4d, 0xc0, 0x06, 0xb3, 0x00, 0x6a, 0x40, 0xc3, 0x06, 0xb3, ++0x40, 0xc3, 0x05, 0x97, 0x04, 0x90, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0x90, 0x95, 0x11, 0x80, 0xd0, 0x95, 0x11, 0x80, 0xd1, 0x95, 0x11, 0x80, 0xd6, 0x63, 0x53, 0x62, 0x52, 0xd1, 0x51, 0xd0, ++0x00, 0xf4, 0x05, 0x6a, 0x7d, 0x67, 0x52, 0xcb, 0x0d, 0x6a, 0x20, 0xf0, 0x46, 0xc3, 0x20, 0xf0, 0x07, 0x04, 0x71, 0xb5, 0x00, 0x18, 0x0d, 0x33, 0x06, 0x6e, 0x9d, 0x67, 0x01, 0x6a, 0x00, 0x6b, ++0x20, 0xf0, 0x4f, 0xc4, 0x20, 0xf0, 0x53, 0xc4, 0x6c, 0xb2, 0x20, 0xf0, 0x6d, 0xc4, 0x20, 0xf0, 0x6e, 0xc4, 0x20, 0xf0, 0x70, 0xc4, 0x20, 0xf0, 0x71, 0xc4, 0x20, 0xf0, 0x72, 0xc4, 0xc0, 0xf1, ++0x6a, 0xc2, 0xc0, 0xf1, 0x7e, 0xc2, 0x03, 0x6b, 0x02, 0x6c, 0xc0, 0xf1, 0x7c, 0xc2, 0x64, 0xb3, 0xc0, 0xf1, 0x89, 0xc2, 0xc0, 0xf1, 0x88, 0xc2, 0xc0, 0xf1, 0x9d, 0xc2, 0x80, 0xc3, 0x61, 0xb3, ++0x00, 0x6c, 0x80, 0xdb, 0x81, 0xdb, 0x60, 0xf1, 0x70, 0xa2, 0x44, 0x67, 0x02, 0x73, 0x07, 0x60, 0x03, 0x73, 0xa0, 0xf0, 0x07, 0x60, 0x01, 0x73, 0xa0, 0xf0, 0x04, 0x60, 0x0f, 0x10, 0xc0, 0xf2, ++0x0c, 0x6b, 0x78, 0xea, 0x58, 0xb4, 0x12, 0xeb, 0x6d, 0xe4, 0xc0, 0xf0, 0x68, 0xa3, 0x80, 0xf0, 0x19, 0x2b, 0x01, 0x4a, 0xff, 0x6b, 0x6c, 0xea, 0x0a, 0x5a, 0xf1, 0x61, 0x00, 0x18, 0xc8, 0x5e, ++0x09, 0x04, 0x4a, 0xd2, 0x80, 0xf0, 0x10, 0x2a, 0x7d, 0x67, 0x20, 0xf0, 0x6d, 0xa3, 0x5d, 0x67, 0x9d, 0x67, 0x20, 0xf0, 0x4e, 0xa2, 0x20, 0xf0, 0x8f, 0xa4, 0x4e, 0xd3, 0x7d, 0x67, 0x4f, 0xd2, ++0x4d, 0xd4, 0x5d, 0x67, 0x20, 0xf0, 0x93, 0xa3, 0x20, 0xf0, 0x50, 0xa2, 0x20, 0xf0, 0x02, 0x05, 0x4b, 0xd4, 0x4c, 0xd2, 0x20, 0xf0, 0x12, 0xa3, 0x20, 0xf0, 0x31, 0xa3, 0x00, 0x18, 0x28, 0xe2, ++0x08, 0x04, 0x02, 0x22, 0x4a, 0xd2, 0x70, 0x10, 0x5d, 0x67, 0x00, 0x30, 0x2d, 0xe8, 0x31, 0xaa, 0xc0, 0xf2, 0x0c, 0x6a, 0x38, 0xb5, 0x58, 0xe9, 0x3b, 0xb2, 0x12, 0xe9, 0x45, 0xe1, 0xe0, 0xf0, ++0x88, 0x41, 0x00, 0x18, 0x0d, 0x33, 0x06, 0x6e, 0x4f, 0x93, 0x4e, 0x94, 0x60, 0x32, 0x8d, 0xea, 0x60, 0xf2, 0x58, 0xc9, 0x5d, 0x67, 0x30, 0xf1, 0x64, 0x42, 0x40, 0xa3, 0x7d, 0x67, 0x30, 0xf1, ++0x80, 0x43, 0xe0, 0xf0, 0x55, 0xc1, 0x60, 0xa4, 0x9d, 0x67, 0x20, 0xf1, 0x4c, 0x44, 0xe0, 0xf0, 0x77, 0xc1, 0x80, 0xa2, 0x7d, 0x67, 0xe0, 0xf0, 0x98, 0xc1, 0x20, 0xf0, 0x40, 0xa3, 0xe0, 0xf0, ++0x4e, 0xc1, 0x01, 0x6a, 0x60, 0xf2, 0x5a, 0xc1, 0x00, 0x18, 0xe5, 0x9c, 0x91, 0xab, 0x9d, 0x67, 0x20, 0xf1, 0x48, 0x44, 0x80, 0xa2, 0x02, 0x32, 0x5e, 0x32, 0x00, 0xf1, 0x8c, 0xc1, 0x13, 0x22, ++0xef, 0xf7, 0x1f, 0x6a, 0x0c, 0xea, 0x01, 0x6b, 0x80, 0xf0, 0x44, 0xc9, 0x06, 0x6c, 0x04, 0xd3, 0xfc, 0x6d, 0x1e, 0xb3, 0x80, 0xf5, 0x12, 0x6e, 0x20, 0xf5, 0x17, 0x6f, 0x05, 0xd3, 0x20, 0x18, ++0xa3, 0x30, 0x06, 0xd2, 0x06, 0x10, 0x5d, 0x67, 0x20, 0xf1, 0x68, 0x42, 0x40, 0xab, 0x80, 0xf0, 0x44, 0xc9, 0x00, 0x18, 0x92, 0xa0, 0x09, 0x04, 0x02, 0x67, 0x0e, 0x22, 0x7d, 0x67, 0x20, 0xf0, ++0x80, 0xa3, 0xe0, 0xf0, 0xa3, 0xa1, 0x00, 0x18, 0x02, 0xe2, 0x00, 0x65, 0x0a, 0xb4, 0x00, 0x18, 0xfe, 0xe1, 0x00, 0x65, 0x4a, 0xd0, 0x08, 0x10, 0x5d, 0x67, 0x91, 0xaa, 0x20, 0x18, 0xfa, 0x25, ++0x01, 0x6d, 0x02, 0x10, 0x0c, 0x6b, 0x4a, 0xd3, 0x4a, 0x92, 0x53, 0x97, 0x52, 0x91, 0x51, 0x90, 0x00, 0xef, 0x2a, 0x63, 0xa4, 0x95, 0x11, 0x80, 0x2c, 0x52, 0x11, 0x80, 0xb5, 0x51, 0x11, 0x80, ++0x5c, 0x53, 0x11, 0x80, 0x20, 0x56, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x10, 0xb3, 0x00, 0x6d, 0xc0, 0xf1, 0xaa, 0xc3, 0xc0, 0xf1, 0xbe, 0xc3, 0xff, 0x6a, 0x03, 0x6d, ++0x8c, 0xea, 0xc0, 0xf1, 0xbc, 0xc3, 0x02, 0x6c, 0x0b, 0xb5, 0xc0, 0xf1, 0x89, 0xc3, 0xc0, 0xf1, 0x88, 0xc3, 0xc0, 0xf1, 0x9d, 0xc3, 0x60, 0xf1, 0x40, 0xc3, 0x80, 0xc5, 0x00, 0x18, 0x2e, 0xaa, ++0x82, 0x67, 0x06, 0xb2, 0x00, 0x6b, 0x60, 0xda, 0x61, 0xda, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x2c, 0x52, 0x11, 0x80, 0xb5, 0x51, 0x11, 0x80, 0x5c, 0x53, 0x11, 0x80, 0xdc, 0x63, 0x47, 0x62, ++0x00, 0xf4, 0x06, 0x6a, 0x7d, 0x67, 0x4a, 0xcb, 0x03, 0x6a, 0x56, 0xc3, 0x13, 0x6a, 0x59, 0xc3, 0x1d, 0xb2, 0x6d, 0xa2, 0x08, 0x73, 0x1a, 0x60, 0xff, 0x6c, 0x09, 0x4c, 0x98, 0xeb, 0x1b, 0xb2, ++0x01, 0x6d, 0x12, 0xec, 0x91, 0xe2, 0x20, 0xf1, 0xcf, 0xa4, 0xac, 0xee, 0x0f, 0x26, 0x00, 0xf1, 0x52, 0xaa, 0x47, 0xeb, 0xac, 0xea, 0x0a, 0x22, 0x20, 0xf1, 0x4c, 0xac, 0x7d, 0x67, 0x05, 0x04, ++0x57, 0xc3, 0x42, 0x32, 0x58, 0xc3, 0x00, 0x18, 0x88, 0x4f, 0x04, 0x05, 0x0e, 0xb2, 0x4c, 0xa2, 0x0a, 0x72, 0x14, 0x60, 0xc0, 0xf2, 0x0c, 0x6b, 0x78, 0xea, 0x0d, 0xb3, 0x12, 0xea, 0x49, 0xe3, ++0xe0, 0xf0, 0x66, 0xa2, 0x01, 0x73, 0x0a, 0x61, 0x60, 0xf2, 0x56, 0xaa, 0x7d, 0x67, 0x05, 0x04, 0x57, 0xc3, 0x42, 0x32, 0x58, 0xc3, 0x00, 0x18, 0x88, 0x4f, 0x04, 0x05, 0x47, 0x97, 0x00, 0xef, ++0x24, 0x63, 0x00, 0x65, 0x90, 0x95, 0x11, 0x80, 0xa4, 0x3c, 0x11, 0x80, 0x20, 0x56, 0x11, 0x80, 0xdc, 0x63, 0x47, 0x62, 0x46, 0xd0, 0x00, 0x6a, 0x18, 0xb3, 0x9d, 0x67, 0x40, 0xdb, 0x41, 0xdb, ++0x04, 0xf0, 0x06, 0x6b, 0x68, 0xcc, 0x54, 0xc4, 0x56, 0xc4, 0x57, 0xc4, 0x58, 0xc4, 0x59, 0xc4, 0x5a, 0xc4, 0x5b, 0xc4, 0x5c, 0xc4, 0x5d, 0xc4, 0x5e, 0xc4, 0x5f, 0xc4, 0x0f, 0x6b, 0x07, 0x6a, ++0x04, 0x00, 0x72, 0xc4, 0x20, 0xf0, 0x40, 0xc4, 0x20, 0x6b, 0x03, 0x6a, 0x73, 0xc4, 0x75, 0xc4, 0x20, 0xf0, 0x41, 0xc4, 0x00, 0x18, 0x13, 0xca, 0x90, 0x67, 0x7d, 0x67, 0x04, 0xf0, 0x0a, 0x6a, ++0x48, 0xcb, 0x01, 0x6a, 0x90, 0x67, 0x52, 0xc3, 0x00, 0x18, 0x8b, 0xca, 0x53, 0xc3, 0x47, 0x97, 0x46, 0x90, 0x00, 0xef, 0x24, 0x63, 0x00, 0x65, 0x5c, 0x53, 0x11, 0x80, 0xdc, 0x63, 0x47, 0x62, ++0x00, 0x6a, 0x21, 0xb3, 0x9d, 0x67, 0x40, 0xdb, 0x41, 0xdb, 0x04, 0xf0, 0x0d, 0x6b, 0x68, 0xcc, 0x19, 0x6b, 0x72, 0xc4, 0x60, 0x6b, 0x6b, 0xeb, 0x73, 0xc4, 0x75, 0xc4, 0x1b, 0xb3, 0x54, 0xc4, ++0x56, 0xc4, 0x57, 0xc4, 0x58, 0xc4, 0x94, 0xa3, 0xbd, 0x67, 0x5f, 0xc5, 0x99, 0xc5, 0x95, 0xa3, 0x20, 0xf0, 0x40, 0xc5, 0x20, 0xf0, 0x42, 0xc5, 0x9a, 0xc5, 0x96, 0xa3, 0x20, 0xf0, 0x44, 0xc5, ++0x20, 0xf0, 0x45, 0xc5, 0x9b, 0xc5, 0x97, 0xa3, 0x20, 0xf0, 0x47, 0xc5, 0x20, 0xf0, 0x49, 0xc5, 0x9c, 0xc5, 0x98, 0xa3, 0x79, 0xa3, 0x9d, 0xc5, 0x7e, 0xc5, 0x02, 0x6b, 0x20, 0xf0, 0x61, 0xc5, ++0x20, 0xf0, 0x63, 0xc5, 0x1e, 0x6b, 0x20, 0xf0, 0x66, 0xc5, 0x12, 0x6b, 0x20, 0xf0, 0x68, 0xc5, 0x20, 0xf0, 0x6a, 0xc5, 0x20, 0xf0, 0x4b, 0xc5, 0x00, 0x18, 0x41, 0xc8, 0x04, 0x04, 0x47, 0x97, ++0x00, 0xef, 0x24, 0x63, 0x5c, 0x53, 0x11, 0x80, 0x90, 0x95, 0x11, 0x80, 0xdc, 0x63, 0x47, 0x62, 0x0c, 0xb2, 0x00, 0x6b, 0x60, 0xda, 0x61, 0xda, 0x7d, 0x67, 0x04, 0xf0, 0x1d, 0x6a, 0x48, 0xcb, ++0x01, 0x6a, 0x52, 0xc3, 0x08, 0xb2, 0x41, 0xaa, 0x7f, 0x6b, 0x04, 0x04, 0x4a, 0x32, 0x6c, 0xea, 0x7d, 0x67, 0x00, 0x18, 0xa2, 0xc5, 0x53, 0xc3, 0x47, 0x97, 0x00, 0xef, 0x24, 0x63, 0x00, 0x65, ++0x5c, 0x53, 0x11, 0x80, 0x90, 0x95, 0x11, 0x80, 0xdb, 0x63, 0x49, 0x62, 0x48, 0xd1, 0x47, 0xd0, 0x00, 0x69, 0x0e, 0xb2, 0x7d, 0x67, 0x20, 0xda, 0x21, 0xda, 0x04, 0xf0, 0x1f, 0x6a, 0x48, 0xcb, ++0x0b, 0xb2, 0x81, 0xf1, 0x48, 0xaa, 0x0b, 0xb0, 0x32, 0xc3, 0x04, 0x04, 0x00, 0x18, 0x1c, 0xc5, 0x4d, 0xd8, 0x64, 0xa0, 0x41, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0x29, 0xc0, 0x44, 0xc0, 0x49, 0x97, ++0x48, 0x91, 0x47, 0x90, 0x00, 0xef, 0x25, 0x63, 0x5c, 0x53, 0x11, 0x80, 0xa4, 0x3c, 0x11, 0x80, 0x90, 0x95, 0x11, 0x80, 0xdc, 0x63, 0x47, 0x62, 0x46, 0xd0, 0x00, 0x68, 0x0b, 0xb2, 0x7d, 0x67, ++0x00, 0xda, 0x01, 0xda, 0x04, 0xf0, 0x1f, 0x6a, 0x12, 0xc3, 0x04, 0x04, 0x00, 0x18, 0x1c, 0xc5, 0x48, 0xcb, 0x07, 0xb2, 0x84, 0xa2, 0x41, 0x6b, 0x6b, 0xeb, 0x8c, 0xeb, 0x64, 0xc2, 0x09, 0xc2, ++0x47, 0x97, 0x46, 0x90, 0x00, 0xef, 0x24, 0x63, 0x5c, 0x53, 0x11, 0x80, 0x90, 0x95, 0x11, 0x80, 0xdc, 0x63, 0x47, 0x62, 0x1c, 0xb2, 0x00, 0x6b, 0x60, 0xda, 0x61, 0xda, 0x1b, 0xb2, 0x64, 0xa2, ++0x07, 0x6d, 0x6e, 0x34, 0xac, 0xec, 0x05, 0x54, 0x06, 0x61, 0x39, 0x6c, 0x8b, 0xec, 0x6c, 0xec, 0x20, 0x6b, 0x6d, 0xec, 0x84, 0xc2, 0x15, 0xb2, 0x64, 0xa2, 0x07, 0x6c, 0x14, 0xb5, 0x6e, 0x33, ++0x8c, 0xeb, 0x6d, 0xe5, 0x60, 0xa3, 0xc3, 0xa2, 0x6c, 0xec, 0x0f, 0x6b, 0x6b, 0xeb, 0x84, 0x35, 0xcc, 0xeb, 0xad, 0xeb, 0x63, 0xc2, 0xbd, 0x67, 0x04, 0xf0, 0x1e, 0x6b, 0x68, 0xcd, 0x03, 0x6b, ++0x72, 0xc5, 0x61, 0xaa, 0x7f, 0x6d, 0x6a, 0x33, 0xac, 0xeb, 0xbd, 0x67, 0x73, 0xc5, 0x40, 0x9a, 0x95, 0xc5, 0x04, 0x04, 0x42, 0x32, 0x00, 0x18, 0x58, 0xc5, 0x54, 0xc5, 0x47, 0x97, 0x00, 0xef, ++0x24, 0x63, 0x00, 0x65, 0x5c, 0x53, 0x11, 0x80, 0x90, 0x95, 0x11, 0x80, 0x5c, 0xed, 0x10, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0xff, 0xf7, 0x1f, 0x6b, ++0x02, 0xf1, 0x01, 0x6e, 0x4c, 0xeb, 0xcb, 0xee, 0x6c, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x00, 0x6c, 0xa4, 0x67, 0x00, 0x18, 0x4d, 0xa6, 0xc4, 0x67, 0x06, 0xb2, 0x84, 0xa2, ++0x41, 0x6b, 0x6b, 0xeb, 0x8c, 0xeb, 0x64, 0xc2, 0x00, 0x6b, 0x69, 0xc2, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0x90, 0x95, 0x11, 0x80, 0xf7, 0x63, 0x11, 0x62, 0x10, 0xd1, 0x0f, 0xd0, ++0x7c, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x79, 0x6c, 0x01, 0x6d, 0xff, 0xf7, 0x1f, 0x68, 0x00, 0x18, 0xab, 0xa5, 0x22, 0x67, 0x3f, 0xb3, 0x0c, 0xe9, 0x4c, 0xe8, 0x58, 0xab, 0x8d, 0x9b, ++0xe3, 0xf7, 0x1f, 0x6d, 0x4b, 0xe0, 0x89, 0xe2, 0x80, 0x9b, 0x4d, 0xdb, 0x18, 0xcb, 0x96, 0x34, 0xac, 0xec, 0x98, 0xea, 0xaf, 0x9b, 0x12, 0xec, 0x8e, 0xdb, 0x99, 0xab, 0x39, 0xcb, 0x93, 0xe1, ++0xb1, 0xe4, 0x8f, 0xdb, 0x34, 0xb3, 0xa0, 0xa3, 0x0a, 0x5d, 0x18, 0x61, 0x06, 0x6d, 0x04, 0xd5, 0x32, 0xb5, 0x05, 0xd5, 0x02, 0xf1, 0x11, 0x6d, 0x06, 0xd5, 0x07, 0xd5, 0x0b, 0xd4, 0xfc, 0x6d, ++0x02, 0x6c, 0xc0, 0xf2, 0x08, 0x6e, 0xa4, 0xf3, 0x11, 0x6f, 0x0c, 0xd3, 0x08, 0xd0, 0x09, 0xd2, 0x20, 0x18, 0xa3, 0x30, 0x0a, 0xd1, 0x0c, 0x93, 0x00, 0x6a, 0x40, 0xc3, 0x26, 0xb2, 0x60, 0xa2, ++0x01, 0x4b, 0x60, 0xc2, 0x7d, 0xf2, 0x01, 0x6a, 0x43, 0xe8, 0x02, 0x60, 0x43, 0xe9, 0x3a, 0x61, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0xff, 0xf7, 0x1f, 0x68, 0x0c, 0xea, 0x01, 0xf6, ++0x01, 0x6b, 0x6b, 0xeb, 0xc2, 0x67, 0x6c, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x01, 0xf6, 0x00, 0x6b, 0xc2, 0x67, ++0x6d, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x03, 0x6b, 0x6b, 0xeb, 0xc2, 0x67, 0x6c, 0xee, 0x57, 0x6c, 0x00, 0x18, ++0x4d, 0xa6, 0x01, 0x6d, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x02, 0x6b, 0xc2, 0x67, 0x6d, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x05, 0xb2, 0x00, 0x6b, ++0x78, 0xca, 0x79, 0xca, 0x11, 0x97, 0x10, 0x91, 0x0f, 0x90, 0x00, 0xef, 0x09, 0x63, 0x00, 0x65, 0x90, 0x95, 0x11, 0x80, 0xd1, 0x95, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0xfb, 0x63, 0x09, 0x62, ++0x08, 0xd1, 0x07, 0xd0, 0x11, 0xb2, 0x47, 0x9a, 0xff, 0x68, 0x8c, 0xe8, 0x01, 0x4a, 0x04, 0x22, 0x0f, 0xb4, 0x00, 0x18, 0xcb, 0x1c, 0x00, 0x65, 0x11, 0x20, 0x00, 0x69, 0x0b, 0xb0, 0x01, 0x6c, ++0x0b, 0xb5, 0x0c, 0xb6, 0xf1, 0x67, 0x00, 0x18, 0xd9, 0x1c, 0x04, 0xd1, 0x87, 0x98, 0x00, 0x18, 0xbe, 0x1c, 0x64, 0x6d, 0x00, 0x6a, 0x30, 0xc8, 0x20, 0xf0, 0x49, 0xc0, 0x09, 0x97, 0x08, 0x91, ++0x07, 0x90, 0x00, 0xef, 0x05, 0x63, 0x00, 0x65, 0x90, 0x95, 0x11, 0x80, 0xac, 0x95, 0x11, 0x80, 0xed, 0xa9, 0x10, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x04, 0xd0, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, ++0x01, 0x6d, 0xff, 0xf7, 0x1f, 0x68, 0xff, 0x6b, 0x0c, 0xea, 0x02, 0x4b, 0x6b, 0xeb, 0xc2, 0x67, 0x6c, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x59, 0x6c, 0x00, 0x18, 0xab, 0xa5, ++0x01, 0x6d, 0x0c, 0xea, 0x00, 0xf2, 0x01, 0x6b, 0x6b, 0xeb, 0xc2, 0x67, 0x6c, 0xee, 0x59, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x00, 0x6c, 0x0c, 0xb0, 0xa4, 0x67, 0x00, 0x18, 0x4d, 0xa6, ++0xc4, 0x67, 0xd1, 0xa8, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x42, 0x6c, 0x80, 0x18, 0x47, 0x2a, 0x00, 0x6c, 0x64, 0xa0, 0x41, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0x44, 0xc0, 0x00, 0x6a, 0x49, 0xc0, ++0x05, 0x97, 0x04, 0x90, 0x00, 0xef, 0x03, 0x63, 0x90, 0x95, 0x11, 0x80, 0xfc, 0x63, 0x07, 0x62, 0x06, 0xd1, 0x05, 0xd0, 0x20, 0xb2, 0x47, 0x9a, 0x08, 0xd4, 0x8e, 0xea, 0x05, 0x22, 0x01, 0x4c, ++0x03, 0x24, 0x00, 0x18, 0xcb, 0x1c, 0x08, 0x04, 0x1b, 0xb0, 0x64, 0xa0, 0x40, 0x6a, 0x6c, 0xea, 0x08, 0x2a, 0x47, 0x98, 0x01, 0x4a, 0x29, 0x22, 0x18, 0xb4, 0x00, 0x18, 0xcb, 0x1c, 0x00, 0x65, ++0x24, 0x10, 0x02, 0x69, 0x6c, 0xe9, 0xff, 0x6a, 0x4c, 0xe9, 0x07, 0x21, 0x80, 0x18, 0xfe, 0x29, 0x00, 0x65, 0x50, 0xa8, 0x01, 0x4a, 0x50, 0xc8, 0x18, 0x10, 0x7d, 0x6c, 0x00, 0x18, 0xab, 0xa5, ++0x01, 0x6d, 0x04, 0x6b, 0x4c, 0xeb, 0x06, 0x23, 0x50, 0xa8, 0x20, 0xf0, 0x29, 0xc0, 0x01, 0x4a, 0x50, 0xc8, 0x0b, 0x10, 0x20, 0xf0, 0x49, 0xa0, 0x19, 0x5a, 0x04, 0x60, 0x01, 0x4a, 0x20, 0xf0, ++0x49, 0xc0, 0x03, 0x10, 0x80, 0x18, 0x5d, 0x2a, 0x00, 0x65, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90, 0x00, 0xef, 0x04, 0x63, 0x90, 0x95, 0x11, 0x80, 0xac, 0x95, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, ++0x04, 0xd0, 0x00, 0x6c, 0x02, 0xf0, 0x00, 0x6e, 0x00, 0x18, 0x4d, 0xa6, 0xa4, 0x67, 0x19, 0xb2, 0xc1, 0xaa, 0x7f, 0x6a, 0x3f, 0x6c, 0xca, 0x36, 0x4c, 0xee, 0x80, 0x4a, 0x81, 0x4a, 0x4d, 0xee, ++0xff, 0x6a, 0x4c, 0xee, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0xff, 0xf7, 0x1f, 0x68, 0x0c, 0xea, 0x01, 0xf7, 0x00, 0x6b, 0xc2, 0x67, 0x6d, 0xee, ++0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x02, 0x6b, 0xc2, 0x67, 0x01, 0x6d, 0x6d, 0xee, 0x00, 0x18, 0x4d, 0xa6, 0x57, 0x6c, ++0x80, 0x18, 0x47, 0x2a, 0x01, 0x6c, 0x05, 0x97, 0x04, 0x90, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0x90, 0x95, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x04, 0xd0, 0x00, 0x6c, 0xc4, 0x67, 0x00, 0x18, ++0x4d, 0xa6, 0xa4, 0x67, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0xff, 0x6e, 0xff, 0xf7, 0x1f, 0x6b, 0x04, 0x4e, 0x4c, 0xeb, 0xcb, 0xee, 0x6c, 0xee, 0x01, 0x6d, 0x0b, 0xb0, 0x00, 0x18, ++0x4d, 0xa6, 0x57, 0x6c, 0x64, 0xa0, 0x41, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0x00, 0x6c, 0x80, 0x18, 0x47, 0x2a, 0x44, 0xc0, 0x80, 0x18, 0xfe, 0x29, 0x00, 0x65, 0x00, 0x6a, 0x49, 0xc0, 0x05, 0x97, ++0x04, 0x90, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0x90, 0x95, 0x11, 0x80, 0xfb, 0x63, 0x09, 0x62, 0x08, 0xd0, 0x38, 0xb0, 0x90, 0xa0, 0x4f, 0xa0, 0x04, 0x05, 0x80, 0x34, 0x4d, 0xec, 0x4e, 0xa0, ++0x80, 0x34, 0x00, 0x18, 0x69, 0xbc, 0x4d, 0xec, 0x7d, 0x67, 0x48, 0xab, 0x8f, 0xa0, 0xdd, 0x67, 0x4c, 0xcb, 0x49, 0xab, 0xaa, 0xae, 0x4d, 0xcb, 0x4e, 0xa0, 0x80, 0x33, 0x68, 0x33, 0x48, 0x32, ++0x6d, 0xea, 0x03, 0x6b, 0xac, 0xeb, 0x6d, 0xea, 0x70, 0xa0, 0x4e, 0xce, 0x9a, 0x34, 0x68, 0x32, 0x7e, 0x33, 0x8d, 0xea, 0x05, 0x23, 0x09, 0xf4, 0x00, 0x6b, 0x4d, 0xeb, 0x6f, 0xce, 0x06, 0x10, ++0x0a, 0xf0, 0x00, 0x6b, 0x6b, 0xeb, 0x4d, 0xeb, 0x5d, 0x67, 0x6f, 0xca, 0x00, 0x6a, 0x21, 0x10, 0xdd, 0x67, 0x44, 0x35, 0xb5, 0xe6, 0xac, 0xad, 0x01, 0x6e, 0xa7, 0xeb, 0xcc, 0xed, 0x0c, 0x25, ++0x0f, 0x6d, 0x77, 0xe5, 0xc4, 0xed, 0xa6, 0x67, 0x8d, 0xed, 0xa0, 0x34, 0x80, 0x34, 0x83, 0x34, 0x83, 0x34, 0xff, 0xf7, 0x1f, 0x6d, 0xac, 0xec, 0x01, 0x4b, 0xff, 0x6d, 0xac, 0xeb, 0x10, 0x5b, ++0xe7, 0x61, 0x44, 0x33, 0x01, 0x4a, 0xdd, 0x67, 0xac, 0xea, 0x6d, 0xe6, 0x04, 0x5a, 0x8c, 0xcb, 0x03, 0x60, 0x00, 0x6c, 0x64, 0x67, 0xdc, 0x17, 0x5d, 0x67, 0xcc, 0xaa, 0x51, 0x6c, 0x00, 0x18, ++0x4d, 0xa6, 0x01, 0x6d, 0x7d, 0x67, 0xcd, 0xab, 0x50, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x5d, 0x67, 0xce, 0xaa, 0x4f, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x7d, 0x67, 0xcf, 0xab, ++0x4e, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x09, 0x97, 0x08, 0x90, 0x00, 0xef, 0x05, 0x63, 0x90, 0x95, 0x11, 0x80, 0xfb, 0x63, 0x09, 0x62, 0x08, 0xd1, 0x07, 0xd0, 0x5e, 0x6c, 0x00, 0x18, ++0xab, 0xa5, 0x01, 0x6d, 0xff, 0xf7, 0x1f, 0x68, 0x0c, 0xea, 0x02, 0xf0, 0x01, 0x6b, 0x6b, 0xeb, 0xc2, 0x67, 0x6c, 0xee, 0x5e, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x57, 0x6c, 0x00, 0x18, ++0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0xff, 0x6b, 0x01, 0x4b, 0xc2, 0x67, 0x53, 0xb1, 0x6d, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x44, 0xa1, 0x07, 0x6b, 0xa3, 0xa1, 0x4e, 0x32, ++0x6c, 0xea, 0x44, 0x34, 0x0f, 0x6a, 0x4b, 0xea, 0xac, 0xea, 0x8d, 0xea, 0x43, 0xc1, 0x57, 0x6c, 0x01, 0x6d, 0x00, 0x18, 0xab, 0xa5, 0x04, 0xd3, 0xc3, 0xa1, 0x04, 0x93, 0x71, 0x6c, 0xc6, 0x36, ++0x6c, 0xee, 0x0c, 0xea, 0x8b, 0xec, 0x8c, 0xea, 0xd0, 0x36, 0x4d, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x60, 0xa1, 0x01, 0x6a, 0x01, 0x68, 0x6c, 0xea, 0x0b, 0x22, 0x44, 0xa1, ++0x80, 0x48, 0xff, 0x48, 0x4c, 0xe8, 0xff, 0x6a, 0x4c, 0xe8, 0x0b, 0xe8, 0xc0, 0xf7, 0x02, 0x30, 0x03, 0x6a, 0x03, 0xe2, 0x39, 0xb1, 0x56, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x80, 0x99, ++0x00, 0x33, 0xe3, 0xf7, 0x1f, 0x6d, 0x96, 0x34, 0xac, 0xec, 0x78, 0x33, 0x8d, 0xeb, 0xfb, 0xf7, 0x1f, 0x6c, 0x8c, 0xeb, 0xff, 0xf7, 0x1f, 0x68, 0x1c, 0xf0, 0x00, 0x6c, 0x8b, 0xec, 0x0c, 0xea, ++0xc3, 0x67, 0x8c, 0xea, 0x4d, 0xee, 0x56, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0xc7, 0xa1, 0x46, 0xa1, 0x58, 0x6c, 0xc0, 0x36, 0x4d, 0xee, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x59, 0x6c, ++0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x04, 0x6b, 0x6b, 0xeb, 0x0c, 0xea, 0x6c, 0xea, 0x68, 0xa1, 0x03, 0x6c, 0xc2, 0x67, 0x8c, 0xeb, 0x6d, 0xee, 0x59, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, ++0x80, 0x18, 0xd3, 0x2a, 0x00, 0x65, 0x63, 0xa1, 0x80, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0xff, 0x6b, 0x6c, 0xea, 0x1e, 0x22, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x80, 0x6b, ++0xc2, 0x67, 0x6d, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x59, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0xc5, 0xa1, 0xe0, 0xf1, 0x1d, 0x6b, 0x6b, 0xeb, 0x0c, 0xea, 0x6c, 0xea, ++0xc8, 0x36, 0xe0, 0xf3, 0x19, 0x4b, 0x6c, 0xee, 0x59, 0x6c, 0x01, 0x6d, 0x4d, 0xee, 0x0b, 0x10, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x81, 0x6b, 0x6b, 0xeb, 0xc2, 0x67, ++0x57, 0x6c, 0x01, 0x6d, 0x6c, 0xee, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x65, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x00, 0xef, 0x05, 0x63, 0x00, 0x65, 0x90, 0x95, 0x11, 0x80, 0xfb, 0x63, 0x09, 0x62, ++0x08, 0xd1, 0x07, 0xd0, 0x42, 0xb0, 0x43, 0xa0, 0x07, 0x6b, 0xff, 0xf7, 0x1f, 0x69, 0x52, 0x32, 0x6c, 0xea, 0x05, 0x4a, 0x80, 0x18, 0x0d, 0x2b, 0x04, 0xd2, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, ++0x01, 0x6d, 0x2c, 0xea, 0x02, 0xf0, 0x01, 0x6b, 0x6b, 0xeb, 0xc2, 0x67, 0x6c, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x59, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x2c, 0xea, ++0x00, 0xf2, 0x00, 0x6b, 0xc2, 0x67, 0x6d, 0xee, 0x59, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x42, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0xd2, 0xa8, 0x51, 0xc8, 0x53, 0xa8, 0xc0, 0x36, ++0xc0, 0x36, 0x4d, 0xee, 0x02, 0xf0, 0x00, 0x5e, 0x02, 0x61, 0xe1, 0xf7, 0x1f, 0x6e, 0x28, 0xb1, 0x20, 0xf0, 0x48, 0xa1, 0x0f, 0x6b, 0xd0, 0x36, 0x6c, 0xea, 0x4d, 0xee, 0x42, 0x6c, 0x00, 0x18, ++0x4d, 0xa6, 0x01, 0x6d, 0x00, 0x6c, 0x02, 0xf0, 0x00, 0x6e, 0x00, 0x18, 0x4d, 0xa6, 0xa4, 0x67, 0x02, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, 0xff, 0xf7, 0x1f, 0x68, 0x04, 0x94, 0x1f, 0xf7, ++0x01, 0x6b, 0x0c, 0xea, 0x6b, 0xeb, 0x6c, 0xea, 0x1a, 0xb3, 0x8d, 0xe3, 0x20, 0xf1, 0xda, 0xa3, 0x02, 0x6c, 0x00, 0x6d, 0xc0, 0x36, 0x00, 0x18, 0x4d, 0xa6, 0x4d, 0xee, 0xc1, 0xa9, 0x7f, 0x6a, ++0x3f, 0x6c, 0xca, 0x36, 0x4c, 0xee, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x01, 0x6d, 0xc2, 0x67, 0xad, 0xee, 0x00, 0x18, 0x4d, 0xa6, ++0x57, 0x6c, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x02, 0x6b, 0x6b, 0xeb, 0xc2, 0x67, 0x01, 0x6d, 0x6c, 0xee, 0x00, 0x18, 0x4d, 0xa6, 0x57, 0x6c, 0x80, 0x18, 0x47, 0x2a, ++0x01, 0x6c, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x00, 0xef, 0x05, 0x63, 0x90, 0x95, 0x11, 0x80, 0x4c, 0x00, 0x11, 0x80, 0xfb, 0x63, 0x09, 0x62, 0x08, 0xd1, 0x07, 0xd0, 0x33, 0xb3, 0xe3, 0xa3, ++0x07, 0x6a, 0x05, 0xd3, 0xf2, 0x37, 0x4c, 0xef, 0x05, 0x4f, 0x80, 0x18, 0x0d, 0x2b, 0x04, 0xd7, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0xff, 0xf7, 0x1f, 0x68, 0x0c, 0xea, 0x02, 0xf0, ++0x00, 0x69, 0xc2, 0x67, 0x2d, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x59, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x00, 0xf2, 0x01, 0x6e, 0x0c, 0xea, 0xcb, 0xee, 0x4c, 0xee, ++0x59, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x00, 0x6c, 0xd1, 0x67, 0x00, 0x18, 0x4d, 0xa6, 0xa4, 0x67, 0x02, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, 0x04, 0x97, 0x1f, 0xf7, 0x01, 0x6c, ++0x0c, 0xea, 0x8b, 0xec, 0x8c, 0xea, 0x1a, 0xb4, 0xfd, 0xe4, 0x20, 0xf1, 0xda, 0xa7, 0x02, 0x6c, 0x00, 0x6d, 0xc0, 0x36, 0x00, 0x18, 0x4d, 0xa6, 0x4d, 0xee, 0x05, 0x93, 0x7f, 0x6a, 0x3f, 0x6c, ++0xc1, 0xab, 0x00, 0x6d, 0xca, 0x36, 0x00, 0x18, 0x4d, 0xa6, 0x4c, 0xee, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x01, 0x6d, 0xc2, 0x67, 0xad, 0xee, 0x00, 0x18, 0x4d, 0xa6, ++0x57, 0x6c, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x02, 0x6b, 0x6b, 0xeb, 0xc2, 0x67, 0x57, 0x6c, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x6c, 0xee, 0x09, 0x97, 0x08, 0x91, ++0x07, 0x90, 0x00, 0xef, 0x05, 0x63, 0x00, 0x65, 0x90, 0x95, 0x11, 0x80, 0x4c, 0x00, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x04, 0xd0, 0x59, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0xff, 0xf7, ++0x1f, 0x68, 0x0c, 0xea, 0x00, 0xf2, 0x00, 0x6b, 0xc2, 0x67, 0x6d, 0xee, 0x59, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x01, 0xf7, ++0x01, 0x6b, 0x6b, 0xeb, 0xc2, 0x67, 0x6c, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x0c, 0xea, 0x03, 0x6b, 0x6b, 0xeb, 0xc2, 0x67, ++0x6c, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x80, 0x18, 0x0d, 0x2b, 0x00, 0x65, 0x06, 0xb2, 0x00, 0x6b, 0x6f, 0xda, 0x6d, 0xda, 0x78, 0xca, 0x80, 0x18, 0x9f, 0x2a, 0x79, 0xca, ++0x05, 0x97, 0x04, 0x90, 0x00, 0xef, 0x03, 0x63, 0x90, 0x95, 0x11, 0x80, 0xf9, 0x63, 0x0d, 0x62, 0x0c, 0xd1, 0x0b, 0xd0, 0x42, 0xa4, 0xff, 0x6b, 0x04, 0x67, 0xff, 0x4a, 0x6c, 0xea, 0x25, 0x5a, ++0x23, 0xa4, 0x2d, 0x60, 0x04, 0x0b, 0x44, 0x32, 0x49, 0xe3, 0x40, 0x8a, 0x4d, 0xe3, 0x00, 0xeb, 0x00, 0x65, 0x00, 0x65, 0x4f, 0x00, 0xa3, 0x00, 0xb3, 0x02, 0x41, 0x03, 0x7b, 0x03, 0xef, 0x03, ++0x17, 0x04, 0x29, 0x04, 0x37, 0x04, 0x4d, 0x04, 0x5b, 0x04, 0x4b, 0x00, 0x4b, 0x00, 0x69, 0x04, 0x61, 0x05, 0x79, 0x05, 0x4b, 0x00, 0x91, 0x05, 0x9f, 0x05, 0xad, 0x05, 0xdf, 0x05, 0xed, 0x05, ++0xff, 0x05, 0x0d, 0x06, 0x1f, 0x06, 0x23, 0x06, 0x27, 0x06, 0x33, 0x06, 0x45, 0x06, 0x4b, 0x00, 0x4b, 0x00, 0x4b, 0x00, 0x4b, 0x00, 0x5d, 0x06, 0x95, 0x06, 0x9d, 0x06, 0xaf, 0x06, 0x00, 0x6a, ++0x4a, 0x13, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0xff, 0xf7, 0x1f, 0x6b, 0x02, 0xf1, 0x03, 0x6e, 0x4c, 0xeb, 0xcb, 0xee, 0x6c, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, ++0x00, 0x6c, 0xa4, 0x67, 0x00, 0x18, 0x4d, 0xa6, 0xc4, 0x67, 0x80, 0x18, 0x47, 0x2a, 0x00, 0x6c, 0x00, 0x18, 0xe8, 0x58, 0x00, 0x65, 0x00, 0x6d, 0x01, 0xf4, 0x03, 0x6c, 0x00, 0x18, 0x2b, 0x54, ++0xc5, 0x67, 0x60, 0xf6, 0x00, 0xb2, 0x0a, 0x6b, 0x6c, 0xc2, 0x08, 0x6b, 0x6d, 0xc2, 0x00, 0x6b, 0x69, 0xc2, 0x6a, 0xc2, 0x0f, 0x13, 0x0e, 0x59, 0x00, 0xf3, 0x08, 0x60, 0x40, 0xf6, 0x04, 0xb2, ++0x06, 0x21, 0x64, 0xa2, 0x40, 0x6a, 0x6c, 0xea, 0x00, 0xf3, 0x00, 0x2a, 0x06, 0x10, 0x84, 0xa2, 0x40, 0x6b, 0x8c, 0xeb, 0x02, 0x2b, 0x29, 0xc2, 0xfd, 0x12, 0x20, 0xf6, 0x08, 0xb2, 0x69, 0xa2, ++0x0e, 0x59, 0x29, 0xc2, 0x06, 0xd3, 0xe0, 0xf0, 0x03, 0x60, 0x04, 0x0a, 0x24, 0x31, 0x25, 0xe2, 0x60, 0x89, 0x69, 0xe2, 0x00, 0xea, 0x00, 0x65, 0x1d, 0x00, 0xa5, 0x00, 0xbb, 0x00, 0xef, 0x00, ++0x0f, 0x01, 0x13, 0x01, 0x1d, 0x01, 0xb9, 0x01, 0x21, 0x01, 0x29, 0x01, 0x31, 0x01, 0x39, 0x01, 0x6d, 0x01, 0xa7, 0x01, 0xe0, 0xf5, 0x0c, 0xb2, 0x44, 0xa2, 0x01, 0x6b, 0x4c, 0xeb, 0x12, 0x23, ++0x02, 0x6b, 0x4c, 0xeb, 0x04, 0x23, 0x80, 0x18, 0xbd, 0x2a, 0x00, 0x65, 0x18, 0x10, 0x06, 0x92, 0x02, 0x72, 0x04, 0x61, 0x80, 0x18, 0x5d, 0x2a, 0x00, 0x65, 0x11, 0x10, 0x80, 0x18, 0xec, 0x29, ++0x00, 0x65, 0x0d, 0x10, 0x04, 0x6b, 0x4c, 0xeb, 0x0a, 0x23, 0x02, 0x6b, 0x4c, 0xeb, 0x04, 0x23, 0x80, 0x18, 0xaa, 0x29, 0x00, 0x65, 0x03, 0x10, 0x80, 0x18, 0xbd, 0x29, 0x00, 0x65, 0xa0, 0xf5, ++0x04, 0xb1, 0x6d, 0x99, 0xee, 0x99, 0x4f, 0x99, 0x09, 0xd3, 0x08, 0xd7, 0x00, 0x18, 0xe8, 0x58, 0x07, 0xd2, 0x00, 0x6d, 0x01, 0xf4, 0x03, 0x6c, 0x00, 0x18, 0x2b, 0x54, 0xc5, 0x67, 0x0a, 0x6a, ++0x4c, 0xc1, 0x08, 0x6a, 0x4d, 0xc1, 0x06, 0x92, 0x09, 0x93, 0x08, 0x97, 0x02, 0x5a, 0xa0, 0xf2, 0x01, 0x60, 0x6d, 0xd9, 0x07, 0x93, 0xee, 0xd9, 0x6f, 0xd9, 0x9c, 0x12, 0x60, 0xf5, 0x04, 0xb1, ++0x64, 0xa1, 0x02, 0x6a, 0x6d, 0xea, 0x01, 0x6b, 0x6d, 0xea, 0x80, 0x18, 0xec, 0x2b, 0x44, 0xc1, 0x25, 0x10, 0x40, 0xf5, 0x10, 0xb3, 0x84, 0xa3, 0x03, 0x6a, 0x4b, 0xea, 0x8c, 0xea, 0x04, 0x6c, ++0x4c, 0xec, 0x07, 0x24, 0x02, 0x6c, 0x8b, 0xec, 0x4c, 0xec, 0x80, 0x18, 0xcc, 0x29, 0x84, 0xc3, 0x05, 0x10, 0x01, 0x6c, 0x4d, 0xec, 0x80, 0x18, 0x6f, 0x2b, 0x84, 0xc3, 0x20, 0xf5, 0x04, 0xb3, ++0x84, 0xa3, 0x40, 0x6a, 0x1f, 0x11, 0x00, 0xf5, 0x1c, 0xb1, 0x64, 0xa1, 0x03, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0x01, 0x6b, 0x6d, 0xea, 0x80, 0x18, 0xb5, 0x2b, 0x44, 0xc1, 0x64, 0xa1, 0x40, 0x6a, ++0x6d, 0xea, 0x44, 0xc1, 0x67, 0x12, 0x01, 0x6c, 0x01, 0x10, 0x02, 0x6c, 0x80, 0x18, 0x23, 0x29, 0x00, 0x65, 0x60, 0x12, 0x03, 0x6c, 0xfa, 0x17, 0x80, 0x18, 0x77, 0x29, 0x00, 0x65, 0x5a, 0x12, ++0x80, 0x18, 0x5c, 0x29, 0x00, 0x65, 0x56, 0x12, 0x80, 0x18, 0x37, 0x29, 0x00, 0x65, 0x52, 0x12, 0xc0, 0xf4, 0x10, 0xb2, 0x80, 0xa2, 0x01, 0x6b, 0x8c, 0xeb, 0xc0, 0xf4, 0x0c, 0xb4, 0x60, 0xc4, ++0x60, 0x9a, 0xc0, 0xf4, 0x08, 0xb4, 0x76, 0x33, 0xc0, 0xf4, 0x60, 0x33, 0x80, 0xf5, 0x62, 0x33, 0x60, 0xcc, 0x40, 0xa2, 0x0f, 0x6b, 0x00, 0x6c, 0x46, 0x32, 0x6c, 0xea, 0xa0, 0xf4, 0x10, 0xb3, ++0x40, 0xc3, 0x19, 0x10, 0x80, 0xf4, 0x1c, 0xb2, 0x80, 0xa2, 0x01, 0x6b, 0x8c, 0xeb, 0x80, 0xf4, 0x18, 0xb4, 0x60, 0xc4, 0x60, 0x9a, 0x80, 0xf4, 0x14, 0xb4, 0x76, 0x33, 0xc0, 0xf4, 0x60, 0x33, ++0x80, 0xf5, 0x62, 0x33, 0x60, 0xcc, 0x40, 0xa2, 0x0f, 0x6b, 0x01, 0x6c, 0x46, 0x32, 0x6c, 0xea, 0x60, 0xf4, 0x1c, 0xb3, 0x40, 0xc3, 0x80, 0x18, 0x6e, 0x34, 0x00, 0x65, 0x1b, 0x12, 0x60, 0xf4, ++0x04, 0xb2, 0x40, 0xa2, 0x0f, 0x6b, 0x46, 0x32, 0x6c, 0xea, 0x60, 0xf4, 0x04, 0xb3, 0x40, 0xc3, 0x80, 0x18, 0xa6, 0x28, 0x00, 0x65, 0x00, 0xf2, 0x0d, 0x22, 0x12, 0x72, 0x00, 0xf2, 0x06, 0x60, ++0x00, 0x6c, 0x04, 0x6b, 0x05, 0x12, 0x04, 0x59, 0x00, 0xf2, 0x00, 0x60, 0x80, 0x18, 0x47, 0x2a, 0x00, 0x6c, 0x57, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0xff, 0xf7, 0x1f, 0x6b, 0x02, 0xf1, ++0x03, 0x6e, 0x4c, 0xeb, 0xcb, 0xee, 0x6c, 0xee, 0x57, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x00, 0x6c, 0xa4, 0x67, 0x00, 0x18, 0x4d, 0xa6, 0xc4, 0x67, 0x00, 0x18, 0xe8, 0x58, 0x00, 0x65, ++0x00, 0x6d, 0x01, 0xf4, 0x03, 0x6c, 0x00, 0x18, 0x2b, 0x54, 0xc5, 0x67, 0xfd, 0xb3, 0x0a, 0x6a, 0x4c, 0xc3, 0x08, 0x6a, 0x2a, 0xc3, 0x4d, 0xc3, 0x00, 0x1c, 0x73, 0x1b, 0x09, 0xd3, 0x09, 0x93, ++0xa2, 0x67, 0x05, 0x6a, 0x84, 0xa3, 0x4b, 0xea, 0x01, 0x71, 0x8c, 0xea, 0x44, 0xc3, 0x09, 0x61, 0x03, 0x6c, 0x80, 0x18, 0x23, 0x29, 0x08, 0xd5, 0x00, 0x18, 0x81, 0x56, 0x00, 0x6c, 0x08, 0x95, ++0x05, 0x10, 0x02, 0x71, 0x03, 0x61, 0x04, 0x6c, 0x4d, 0xec, 0x84, 0xc3, 0x00, 0x1c, 0x7a, 0x1b, 0x85, 0x67, 0xc0, 0x11, 0x4f, 0x59, 0xa0, 0xf1, 0x19, 0x60, 0x44, 0xa4, 0x08, 0x5a, 0xa0, 0xf1, ++0x15, 0x60, 0xe8, 0xb3, 0x7f, 0x6a, 0xa1, 0xab, 0x2c, 0xea, 0x48, 0x34, 0xe0, 0xf1, 0x1d, 0x6a, 0x4b, 0xea, 0xac, 0xea, 0x8d, 0xea, 0x41, 0xcb, 0x84, 0xa0, 0x07, 0x6a, 0xa3, 0xa3, 0x8c, 0xea, ++0x50, 0x34, 0x71, 0x6a, 0x4b, 0xea, 0xac, 0xea, 0x8d, 0xea, 0x43, 0xc3, 0xa3, 0x11, 0x0a, 0x59, 0x44, 0xa4, 0x65, 0xa4, 0x80, 0xf1, 0x1a, 0x60, 0x60, 0x33, 0x4d, 0xeb, 0xe3, 0xf7, 0x1f, 0x6c, ++0xd8, 0xb2, 0x6c, 0xec, 0x94, 0x35, 0xdb, 0xb6, 0x80, 0x9a, 0xcc, 0xec, 0xad, 0xec, 0x80, 0xda, 0xd9, 0xb5, 0x24, 0x34, 0x91, 0xe5, 0x80, 0xac, 0x8c, 0x34, 0x62, 0xec, 0x80, 0xf1, 0x06, 0x61, ++0x03, 0x59, 0x06, 0x60, 0x80, 0xa2, 0x02, 0x6b, 0x6b, 0xeb, 0x8c, 0xeb, 0x60, 0xc2, 0x0c, 0x10, 0x80, 0xa2, 0xa4, 0xa2, 0x01, 0x6b, 0x8d, 0xeb, 0x06, 0x59, 0x60, 0xc2, 0x98, 0x67, 0x7f, 0x6b, ++0x9c, 0x34, 0xac, 0xeb, 0x8d, 0xeb, 0x64, 0xc2, 0xcc, 0xb2, 0x25, 0xe2, 0x80, 0xa1, 0xc5, 0xb3, 0x0f, 0x6a, 0x8c, 0xea, 0xa0, 0xa3, 0x44, 0x34, 0x1f, 0x6a, 0x4b, 0xea, 0xac, 0xea, 0x8d, 0xea, ++0x63, 0x11, 0x45, 0xa4, 0x08, 0x5a, 0x60, 0xf1, 0x01, 0x60, 0x44, 0xa4, 0xbd, 0xb3, 0xa4, 0xa3, 0x40, 0x32, 0x2d, 0xea, 0x53, 0xcb, 0x85, 0xa4, 0x07, 0x6a, 0x8c, 0xea, 0x4c, 0x34, 0x39, 0x6a, ++0x4b, 0xea, 0xac, 0xea, 0x8d, 0xea, 0x44, 0xc3, 0x55, 0x11, 0x44, 0xa4, 0xb5, 0xb3, 0x40, 0x32, 0x2d, 0xea, 0x52, 0xcb, 0x45, 0xa4, 0x20, 0xf0, 0x48, 0xc3, 0x4c, 0x11, 0xb1, 0xb2, 0x26, 0xc2, ++0x64, 0xa4, 0x67, 0xc2, 0x65, 0xa4, 0x68, 0xc2, 0x45, 0x11, 0xae, 0xb2, 0x63, 0xa2, 0x3e, 0x35, 0x7f, 0x6c, 0xbc, 0x35, 0x8c, 0xeb, 0xad, 0xeb, 0x8c, 0xe9, 0x63, 0xc2, 0x25, 0xc2, 0x3a, 0x11, ++0xa8, 0xb2, 0x2e, 0xc2, 0x64, 0xa4, 0x6f, 0xc2, 0x65, 0xa4, 0x70, 0xc2, 0x33, 0x11, 0xa5, 0xb2, 0x31, 0xc2, 0x64, 0xa4, 0x72, 0xc2, 0x65, 0xa4, 0x73, 0xc2, 0x2c, 0x11, 0xa1, 0xb3, 0x49, 0xa3, ++0x0a, 0x72, 0x2c, 0x61, 0x8c, 0xa3, 0x00, 0x6a, 0x0a, 0x74, 0x0e, 0x60, 0xc0, 0xf2, 0x0c, 0x4a, 0x58, 0xec, 0xa3, 0xb2, 0x12, 0xec, 0x91, 0xe2, 0xc0, 0xf0, 0x48, 0xa4, 0x04, 0x72, 0x05, 0x6a, ++0x03, 0x60, 0x0a, 0x6a, 0x4c, 0xc3, 0x00, 0x6a, 0x96, 0xb3, 0x8d, 0xa3, 0x08, 0x74, 0x5d, 0x60, 0xff, 0x6a, 0x09, 0x4a, 0x58, 0xec, 0x9b, 0xb3, 0x12, 0xea, 0x49, 0xe3, 0x20, 0xf1, 0xaf, 0xa2, ++0x01, 0x6a, 0x4c, 0xed, 0x06, 0x25, 0x00, 0xf1, 0x72, 0xab, 0x67, 0xec, 0x4c, 0xeb, 0x05, 0x6a, 0x4c, 0x2b, 0x8c, 0xb2, 0x08, 0x6b, 0x6d, 0xc2, 0x00, 0x6a, 0x47, 0x10, 0x8b, 0x42, 0xff, 0x6b, ++0x6c, 0xec, 0x03, 0x5c, 0x1a, 0x60, 0x00, 0x6a, 0xc0, 0xf2, 0x0c, 0x6c, 0x98, 0xea, 0x8c, 0xb3, 0x12, 0xec, 0x91, 0xe3, 0xc0, 0xf0, 0x68, 0xa4, 0x04, 0x73, 0x09, 0x61, 0xe0, 0xf0, 0xa8, 0x9c, ++0x80, 0xb3, 0xa5, 0xdb, 0xe0, 0xf0, 0x8c, 0xac, 0x4c, 0xc3, 0x8c, 0xcb, 0x26, 0x10, 0x01, 0x4a, 0xff, 0x6b, 0x6c, 0xea, 0x0a, 0x5a, 0xe8, 0x61, 0x27, 0x10, 0x88, 0x42, 0x6c, 0xec, 0x02, 0x5c, ++0x24, 0x60, 0x00, 0x6a, 0xff, 0x6c, 0x09, 0x4c, 0x98, 0xea, 0x7e, 0xb3, 0x01, 0x6d, 0x12, 0xec, 0x91, 0xe3, 0x20, 0xf1, 0xcf, 0xa4, 0xac, 0xee, 0x12, 0x26, 0x00, 0xf1, 0x72, 0xab, 0x67, 0xea, ++0xac, 0xeb, 0x0d, 0x23, 0x60, 0xf1, 0xbe, 0xac, 0x6e, 0xb3, 0xaa, 0xcb, 0x80, 0xf1, 0xa0, 0xac, 0xab, 0xcb, 0x80, 0xf1, 0x82, 0xac, 0x4d, 0xc3, 0x8c, 0xcb, 0x05, 0x6a, 0x06, 0x10, 0x01, 0x4a, ++0xff, 0x6b, 0x6c, 0xea, 0x08, 0x5a, 0xde, 0x61, 0x04, 0x6a, 0x66, 0xb3, 0x6a, 0xa3, 0x40, 0x32, 0x6d, 0xea, 0x67, 0x10, 0x6c, 0xb3, 0x20, 0xf0, 0x9e, 0xa3, 0x20, 0xf0, 0x5d, 0xa3, 0x20, 0xf0, ++0x7c, 0xa3, 0x80, 0x34, 0x40, 0x32, 0x80, 0x34, 0x8d, 0xea, 0x6e, 0x10, 0x66, 0xb3, 0x40, 0xf0, 0x81, 0xa3, 0x40, 0xf0, 0x40, 0xa3, 0x20, 0xf0, 0x7f, 0xa3, 0x80, 0x34, 0x40, 0x32, 0x80, 0x34, ++0x8d, 0xea, 0x62, 0x10, 0x57, 0xb2, 0x34, 0xc2, 0x64, 0xa4, 0x75, 0xc2, 0x65, 0xa4, 0x76, 0xc2, 0x91, 0x10, 0x54, 0xb2, 0x37, 0xc2, 0x64, 0xa4, 0x78, 0xc2, 0x65, 0xa4, 0x79, 0xc2, 0x8a, 0x10, ++0x4f, 0x41, 0xff, 0x6b, 0x6c, 0xea, 0x09, 0x5a, 0x80, 0xf0, 0x00, 0x60, 0x5c, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0xff, 0xf7, 0x1f, 0x6b, 0x4c, 0xeb, 0x79, 0x6a, 0x4b, 0xea, 0x4c, 0xeb, ++0x2c, 0x36, 0x78, 0x6a, 0x4c, 0xee, 0x5c, 0x6c, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x6d, 0xee, 0x71, 0x10, 0x44, 0xb3, 0x8d, 0x9b, 0x4d, 0xb5, 0x5a, 0xab, 0xac, 0xec, 0x8d, 0xdb, 0x21, 0x10, ++0x40, 0xb4, 0xad, 0x9c, 0xff, 0xf7, 0x1f, 0x6b, 0xa2, 0x32, 0xac, 0xeb, 0x42, 0x32, 0x6d, 0xdc, 0x18, 0x10, 0x3c, 0xb3, 0x8f, 0x9b, 0x45, 0xb5, 0x5e, 0xab, 0xac, 0xec, 0x8f, 0xdb, 0x11, 0x10, ++0x38, 0xb4, 0xaf, 0x9c, 0xff, 0xf7, 0x1f, 0x6b, 0xa2, 0x32, 0xac, 0xeb, 0x42, 0x32, 0x6f, 0xdc, 0x08, 0x10, 0x78, 0x6c, 0x03, 0x10, 0x76, 0x6c, 0x01, 0x10, 0x77, 0x6c, 0x00, 0x18, 0xab, 0xa5, ++0x01, 0x6d, 0x02, 0x6c, 0x13, 0x10, 0x2f, 0xb3, 0x96, 0xa3, 0x55, 0xa3, 0x74, 0xa3, 0x80, 0x34, 0x40, 0x32, 0x80, 0x34, 0x8d, 0xea, 0x08, 0x10, 0x2a, 0xb3, 0x99, 0xa3, 0x58, 0xa3, 0x77, 0xa3, ++0x80, 0x34, 0x40, 0x32, 0x80, 0x34, 0x8d, 0xea, 0x6d, 0xea, 0x03, 0x6c, 0x00, 0x6b, 0x35, 0x10, 0x64, 0x6a, 0x58, 0xe9, 0x2e, 0xb4, 0x40, 0x9c, 0x01, 0x4a, 0x12, 0xe9, 0x03, 0x22, 0x00, 0x18, ++0xcb, 0x1c, 0x00, 0x65, 0x27, 0x21, 0x80, 0x18, 0x61, 0x38, 0x00, 0x65, 0x00, 0x6a, 0x01, 0x6c, 0x27, 0xb5, 0x28, 0xb6, 0xe2, 0x67, 0x00, 0x18, 0xd9, 0x1c, 0x04, 0xd2, 0x24, 0xb2, 0x80, 0x9a, ++0x00, 0x18, 0xbe, 0x1c, 0xb1, 0x67, 0x16, 0x10, 0x1f, 0xb2, 0x80, 0xf1, 0x21, 0xc2, 0x12, 0x10, 0x1d, 0xb2, 0x00, 0x6b, 0x80, 0xf1, 0x71, 0xc2, 0x0d, 0x21, 0x01, 0x6b, 0x80, 0xf1, 0x71, 0xc2, ++0x09, 0x10, 0x01, 0x6a, 0x2c, 0xea, 0x1c, 0xb3, 0x40, 0xc3, 0x04, 0x10, 0x00, 0x6c, 0x03, 0x6b, 0x44, 0x67, 0x03, 0x10, 0x00, 0x6c, 0x64, 0x67, 0x44, 0x67, 0x90, 0x34, 0x6d, 0xec, 0x83, 0xc0, ++0x81, 0xa0, 0x10, 0x6b, 0x6b, 0xeb, 0x8c, 0xeb, 0x61, 0xc0, 0xa0, 0x98, 0x02, 0x6c, 0x00, 0x18, 0xa5, 0x2e, 0xc2, 0x67, 0x01, 0x6a, 0x0d, 0x97, 0x0c, 0x91, 0x0b, 0x90, 0x00, 0xef, 0x07, 0x63, ++0x90, 0x95, 0x11, 0x80, 0x02, 0x96, 0x11, 0x80, 0x04, 0x96, 0x11, 0x80, 0x01, 0x96, 0x11, 0x80, 0x1f, 0x00, 0xfc, 0xff, 0x48, 0xed, 0x10, 0x80, 0x3c, 0xed, 0x10, 0x80, 0x20, 0x56, 0x11, 0x80, ++0xa4, 0x3c, 0x11, 0x80, 0x4c, 0x00, 0x11, 0x80, 0x00, 0x00, 0xff, 0xff, 0x90, 0x04, 0x11, 0x80, 0x85, 0xe1, 0x10, 0x80, 0xd0, 0x95, 0x11, 0x80, 0x20, 0xe8, 0x00, 0x65, 0x0c, 0xb2, 0x0d, 0xb4, ++0x60, 0xa4, 0xa0, 0x9a, 0x04, 0x6a, 0x6c, 0xea, 0x0c, 0x22, 0x40, 0xf7, 0xa2, 0x35, 0x66, 0x33, 0x01, 0x6c, 0xae, 0xeb, 0x8c, 0xeb, 0xff, 0x6c, 0x8c, 0xeb, 0x00, 0x6a, 0x04, 0x23, 0x20, 0xe8, ++0x01, 0x6a, 0x05, 0xb2, 0x40, 0xa2, 0x20, 0xe8, 0x00, 0x65, 0x00, 0x65, 0x50, 0xa0, 0x00, 0xb0, 0x1c, 0x96, 0x11, 0x80, 0xd2, 0x06, 0x11, 0x80, 0x07, 0xb2, 0x40, 0x9a, 0x61, 0x42, 0x07, 0x23, ++0x24, 0x6b, 0x78, 0xea, 0x05, 0xb3, 0x12, 0xea, 0x49, 0xe3, 0x05, 0xb3, 0x63, 0xda, 0x20, 0xe8, 0x00, 0x65, 0x00, 0x65, 0x90, 0x04, 0x11, 0x80, 0xb8, 0x8b, 0x11, 0x80, 0x85, 0xe1, 0x10, 0x80, ++0x00, 0x6a, 0x76, 0xb5, 0x55, 0xe5, 0xa0, 0xa5, 0x75, 0xb3, 0x51, 0xe3, 0x20, 0xf1, 0xba, 0xc4, 0x01, 0x4a, 0xff, 0x6c, 0x8c, 0xea, 0x10, 0x5a, 0xf4, 0x61, 0x60, 0xf1, 0xa1, 0xa3, 0xfe, 0x75, ++0x0b, 0x60, 0x0f, 0x6a, 0xac, 0xea, 0xaf, 0x42, 0x8c, 0xed, 0x05, 0x5d, 0x05, 0x60, 0x10, 0x6c, 0x4d, 0xec, 0x60, 0xf1, 0x81, 0xc3, 0x03, 0x10, 0x15, 0x6a, 0x60, 0xf1, 0x41, 0xc3, 0x68, 0xb2, ++0x40, 0xf1, 0x7a, 0xa2, 0xff, 0x73, 0x03, 0x61, 0x0d, 0x6b, 0x40, 0xf1, 0x7a, 0xc2, 0x64, 0xb2, 0x40, 0xf1, 0x7a, 0xa2, 0x0a, 0x73, 0x0c, 0x61, 0x0d, 0x6b, 0x40, 0xf1, 0x7a, 0xc2, 0x0b, 0x6b, ++0x40, 0xf1, 0x7b, 0xc2, 0x40, 0xf1, 0x7c, 0xc2, 0x40, 0xf1, 0x7d, 0xc2, 0x40, 0xf1, 0x7e, 0xc2, 0x5b, 0xb2, 0x00, 0x6b, 0x80, 0xf0, 0x7d, 0xc2, 0x24, 0xf0, 0x10, 0x6b, 0x60, 0xf1, 0x62, 0xca, ++0x06, 0xf7, 0x19, 0x6b, 0x60, 0xf1, 0x64, 0xca, 0x0b, 0xf2, 0x10, 0x6b, 0x60, 0xf1, 0x66, 0xca, 0x0e, 0xf5, 0x0a, 0x6b, 0x60, 0xf1, 0x68, 0xca, 0x04, 0xf5, 0x00, 0x6b, 0x6b, 0xeb, 0x60, 0xf1, ++0x6a, 0xca, 0x00, 0x6b, 0xc0, 0xf1, 0x68, 0xca, 0xc0, 0xf1, 0x6a, 0xca, 0xc0, 0xf1, 0x6c, 0xca, 0xc0, 0xf1, 0x6e, 0xca, 0x40, 0xf1, 0x7f, 0xa2, 0xff, 0x73, 0x03, 0x61, 0x01, 0x6b, 0x40, 0xf1, ++0x7f, 0xc2, 0x47, 0xb2, 0x60, 0xf1, 0x60, 0xa2, 0xff, 0x73, 0x04, 0x61, 0x02, 0x6b, 0x6b, 0xeb, 0x60, 0xf1, 0x60, 0xc2, 0x42, 0xb2, 0x80, 0xf1, 0x62, 0xa2, 0xff, 0x73, 0x03, 0x61, 0x05, 0x6b, ++0x80, 0xf1, 0x62, 0xc2, 0x3e, 0xb2, 0x01, 0x6b, 0x80, 0xf1, 0x60, 0xc2, 0x80, 0xf1, 0x71, 0xc2, 0x80, 0xf1, 0x61, 0xa2, 0xfe, 0x73, 0x03, 0x61, 0x0f, 0x6b, 0x80, 0xf1, 0x61, 0xc2, 0x38, 0xb2, ++0x02, 0x6b, 0x80, 0xf1, 0x63, 0xc2, 0x80, 0xf1, 0x72, 0xc2, 0x00, 0x6a, 0x35, 0xb4, 0x51, 0xe4, 0x80, 0xa4, 0x33, 0xb3, 0x4d, 0xe3, 0x80, 0xf1, 0x84, 0xc3, 0x01, 0x4a, 0xff, 0x6b, 0x6c, 0xea, ++0x0d, 0x5a, 0xf4, 0x61, 0x00, 0x6a, 0x30, 0xb3, 0x4d, 0xe3, 0x60, 0xa3, 0xff, 0x6c, 0xe0, 0x4b, 0x8c, 0xeb, 0x00, 0xf6, 0x60, 0x34, 0x00, 0xf6, 0x83, 0x34, 0x00, 0x54, 0x05, 0x60, 0x80, 0x4b, ++0x00, 0xf6, 0x60, 0x34, 0x00, 0xf6, 0x83, 0x34, 0x25, 0xb3, 0x4d, 0xe3, 0x80, 0xf1, 0x93, 0xc3, 0x01, 0x4a, 0xff, 0x6b, 0x6c, 0xea, 0x0d, 0x5a, 0xe6, 0x61, 0x00, 0x6a, 0x23, 0xb4, 0x51, 0xe4, ++0x80, 0xa4, 0x1f, 0xb3, 0x4d, 0xe3, 0xc0, 0xf1, 0x80, 0xc3, 0x21, 0xb4, 0x51, 0xe4, 0x80, 0xa4, 0xc0, 0xf1, 0x82, 0xc3, 0x1f, 0xb3, 0x4d, 0xe3, 0x60, 0xa3, 0xff, 0x6c, 0xe0, 0x4b, 0x8c, 0xeb, ++0x00, 0xf6, 0x60, 0x34, 0x00, 0xf6, 0x83, 0x34, 0x00, 0x54, 0x05, 0x60, 0x80, 0x4b, 0x00, 0xf6, 0x60, 0x34, 0x00, 0xf6, 0x83, 0x34, 0x12, 0xb3, 0x4d, 0xe3, 0xc0, 0xf1, 0x84, 0xc3, 0x16, 0xb3, ++0x4d, 0xe3, 0x60, 0xa3, 0xff, 0x6c, 0xe0, 0x4b, 0x8c, 0xeb, 0x00, 0xf6, 0x60, 0x34, 0x00, 0xf6, 0x83, 0x34, 0x00, 0x54, 0x05, 0x60, 0x80, 0x4b, 0x00, 0xf6, 0x60, 0x34, 0x00, 0xf6, 0x83, 0x34, ++0x07, 0xb3, 0x4d, 0xe3, 0xc0, 0xf1, 0x86, 0xc3, 0x01, 0x4a, 0xff, 0x6b, 0x6c, 0xea, 0x02, 0x5a, 0xc5, 0x61, 0x20, 0xe8, 0x00, 0x65, 0x00, 0x65, 0x30, 0xef, 0x10, 0x80, 0x4c, 0x00, 0x11, 0x80, ++0x40, 0xef, 0x10, 0x80, 0x58, 0xef, 0x10, 0x80, 0x50, 0xef, 0x10, 0x80, 0x54, 0xef, 0x10, 0x80, 0x68, 0xef, 0x10, 0x80, 0x6c, 0xef, 0x10, 0x80, 0xff, 0x6a, 0x4c, 0xee, 0x4c, 0xec, 0x4c, 0xed, ++0xec, 0xea, 0x57, 0xe5, 0x00, 0xf6, 0xa0, 0x35, 0x00, 0xf6, 0xa3, 0x35, 0xb8, 0xed, 0xd3, 0xe4, 0x00, 0xf6, 0x80, 0x34, 0x00, 0xf6, 0x83, 0x34, 0xff, 0xf7, 0x1f, 0x6b, 0x12, 0xed, 0x98, 0xec, ++0x12, 0xec, 0x89, 0xe5, 0x20, 0xe8, 0x6c, 0xea, 0x20, 0xe8, 0x00, 0x65, 0x0a, 0xb2, 0x20, 0xf0, 0x70, 0xa2, 0x16, 0x6a, 0x6c, 0xea, 0x12, 0x72, 0x04, 0x61, 0x40, 0xa4, 0x01, 0x5a, 0x58, 0x67, ++0x40, 0xc4, 0x06, 0xb2, 0x60, 0xa2, 0x07, 0x6a, 0x6c, 0xea, 0x04, 0x52, 0x58, 0x67, 0x01, 0x6b, 0x20, 0xe8, 0x6e, 0xea, 0x4c, 0x00, 0x11, 0x80, 0x18, 0x96, 0x11, 0x80, 0x00, 0x6a, 0x11, 0xb3, ++0x60, 0x9b, 0x4c, 0x35, 0xff, 0x6c, 0xad, 0xe3, 0xc3, 0xa3, 0x80, 0x6b, 0x6b, 0xeb, 0x6c, 0xee, 0x8c, 0xee, 0x14, 0x2e, 0x0c, 0xb6, 0xc0, 0x9e, 0xb9, 0xe6, 0xc3, 0xa6, 0x6c, 0xee, 0x8c, 0xee, ++0x0d, 0x2e, 0x0a, 0xb6, 0xc0, 0x9e, 0xb5, 0xe6, 0xa3, 0xa5, 0xac, 0xeb, 0x8c, 0xeb, 0x06, 0x2b, 0x01, 0x4a, 0x8c, 0xea, 0x11, 0x5a, 0xe3, 0x61, 0x20, 0xe8, 0x01, 0x6a, 0x20, 0xe8, 0x00, 0x6a, ++0xf4, 0x1d, 0x11, 0x80, 0xcc, 0x1d, 0x11, 0x80, 0x04, 0x1f, 0x11, 0x80, 0x20, 0xe8, 0x01, 0x6a, 0x06, 0xb2, 0x60, 0xa2, 0x01, 0x6a, 0x6c, 0xea, 0x05, 0x22, 0x40, 0x9c, 0x11, 0x6b, 0x6b, 0xeb, ++0x6c, 0xea, 0x40, 0xdc, 0x20, 0xe8, 0x00, 0x6a, 0x1c, 0x96, 0x11, 0x80, 0x0d, 0xb2, 0x40, 0xa2, 0x08, 0x22, 0x0d, 0xb2, 0x60, 0xa2, 0x80, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0xff, 0x6b, 0x6c, 0xea, ++0x0d, 0x2a, 0x0a, 0xb2, 0x60, 0xa2, 0x10, 0x6a, 0x6c, 0xea, 0x08, 0x22, 0x60, 0x9c, 0x02, 0xf0, 0x00, 0x6a, 0x6c, 0xea, 0x03, 0x22, 0x01, 0x6b, 0x02, 0xb2, 0x60, 0xc2, 0x20, 0xe8, 0x00, 0x6a, ++0x98, 0x07, 0x11, 0x80, 0xdc, 0x37, 0x11, 0x80, 0x6c, 0x21, 0x11, 0x80, 0x64, 0xa4, 0x43, 0xa4, 0xc0, 0xa5, 0x60, 0x33, 0x4d, 0xe3, 0xff, 0xf7, 0x1f, 0x6a, 0x4c, 0xeb, 0x7f, 0xf4, 0x0f, 0x73, ++0x00, 0x6a, 0x09, 0x61, 0xc9, 0xe4, 0x01, 0x6b, 0x62, 0xc2, 0x41, 0x46, 0xff, 0x6b, 0x6c, 0xea, 0x41, 0xc4, 0x40, 0xc5, 0x01, 0x6a, 0x20, 0xe8, 0x00, 0x65, 0x00, 0x65, 0x0d, 0xb3, 0xc0, 0xf0, ++0x8a, 0xab, 0x08, 0xf0, 0x01, 0x6a, 0x4b, 0xea, 0x8c, 0xea, 0xc0, 0xf0, 0x4a, 0xcb, 0x00, 0x6a, 0x09, 0xb3, 0x40, 0xc3, 0x09, 0xb3, 0x40, 0xc3, 0x00, 0x6a, 0x09, 0xb3, 0x40, 0xcb, 0x09, 0xb3, ++0x40, 0xc3, 0x09, 0xb3, 0x40, 0xc3, 0x01, 0x6b, 0x08, 0xb2, 0x20, 0xe8, 0x60, 0xc2, 0x00, 0x65, 0x4c, 0x00, 0x11, 0x80, 0x01, 0x96, 0x11, 0x80, 0x02, 0x96, 0x11, 0x80, 0x04, 0x96, 0x11, 0x80, ++0x06, 0x96, 0x11, 0x80, 0x07, 0x96, 0x11, 0x80, 0x08, 0x96, 0x11, 0x80, 0x40, 0xac, 0x01, 0xf4, 0x03, 0x6b, 0x6e, 0xea, 0x16, 0x2a, 0x0d, 0xb4, 0xc0, 0xf0, 0xaa, 0xac, 0xf6, 0xf3, 0x1c, 0x4b, ++0xac, 0xeb, 0xc0, 0xf0, 0x6a, 0xcc, 0x0a, 0xb3, 0x40, 0xc3, 0x0a, 0xb4, 0x0a, 0xb3, 0x40, 0xc3, 0x40, 0xcc, 0x00, 0x6b, 0x09, 0xb2, 0x60, 0xc2, 0x09, 0xb2, 0x60, 0xc2, 0x01, 0x6b, 0x09, 0xb2, ++0x60, 0xc2, 0x20, 0xe8, 0x00, 0x6a, 0x00, 0x65, 0x4c, 0x00, 0x11, 0x80, 0x01, 0x96, 0x11, 0x80, 0x04, 0x96, 0x11, 0x80, 0x02, 0x96, 0x11, 0x80, 0x06, 0x96, 0x11, 0x80, 0x07, 0x96, 0x11, 0x80, ++0x08, 0x96, 0x11, 0x80, 0x08, 0xb3, 0xa0, 0xa3, 0x01, 0x6b, 0x40, 0x9c, 0xac, 0xeb, 0x02, 0x23, 0x10, 0x6b, 0x6d, 0xea, 0x02, 0x6b, 0xac, 0xeb, 0x02, 0x23, 0x04, 0xb3, 0x6d, 0xea, 0x40, 0xdc, ++0x20, 0xe8, 0x00, 0x6a, 0x1c, 0x96, 0x11, 0x80, 0x00, 0x00, 0x10, 0x00, 0x0b, 0xb2, 0x60, 0xf1, 0x50, 0xa2, 0xff, 0x6b, 0xfd, 0x4a, 0x6c, 0xea, 0x02, 0x5a, 0x0b, 0x60, 0x08, 0xb2, 0x40, 0xa2, ++0x08, 0x2a, 0x63, 0xa4, 0x02, 0x6a, 0x6c, 0xea, 0x04, 0x22, 0x03, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0x43, 0xc4, 0x20, 0xe8, 0x00, 0x6a, 0x00, 0x65, 0x2c, 0x52, 0x11, 0x80, 0x89, 0x04, 0x11, 0x80, ++0xf6, 0x63, 0x13, 0x62, 0x12, 0xd1, 0x11, 0xd0, 0x45, 0xa4, 0xff, 0xf7, 0x1f, 0x68, 0xac, 0xe8, 0xa4, 0xa4, 0x0e, 0xd2, 0x63, 0xb2, 0x40, 0x82, 0x11, 0x6e, 0x00, 0x52, 0xa0, 0xf0, 0x1a, 0x60, ++0xc0, 0xf2, 0x0c, 0x69, 0x38, 0xe8, 0x60, 0xb2, 0x01, 0x6b, 0xac, 0xeb, 0x12, 0xe9, 0x45, 0xe1, 0xc0, 0xf0, 0x48, 0xa1, 0x04, 0x72, 0x06, 0x60, 0x13, 0x72, 0x04, 0x60, 0x90, 0x67, 0x17, 0x6d, ++0xc3, 0x67, 0x0b, 0x10, 0xe0, 0xf0, 0xc7, 0xa1, 0x6a, 0xee, 0x0b, 0x61, 0x80, 0xf0, 0x4c, 0xa9, 0x04, 0x6d, 0xac, 0xea, 0x06, 0x2a, 0x90, 0x67, 0x17, 0x6d, 0x20, 0x18, 0xf6, 0x27, 0x24, 0x6f, ++0x98, 0x10, 0x04, 0x4c, 0x41, 0xac, 0x0a, 0xd2, 0x42, 0xac, 0x0b, 0xd2, 0x43, 0xac, 0x08, 0xd2, 0x84, 0xac, 0x4e, 0xb2, 0x09, 0xe2, 0x09, 0xd4, 0x80, 0xa2, 0x03, 0x5c, 0x01, 0x4c, 0x01, 0x61, ++0x00, 0x6c, 0x80, 0xc2, 0x49, 0xb2, 0x09, 0xe2, 0x40, 0xa2, 0x03, 0x72, 0x55, 0x61, 0x08, 0x94, 0x02, 0x6f, 0x02, 0x5c, 0x03, 0x61, 0x84, 0x37, 0xff, 0x6a, 0x4c, 0xef, 0x09, 0x94, 0x03, 0x24, ++0x02, 0x4f, 0xff, 0x6a, 0x4c, 0xef, 0x0a, 0x92, 0x0b, 0x96, 0x90, 0x67, 0x00, 0x6d, 0x0f, 0xd3, 0x20, 0x18, 0x4b, 0x29, 0x04, 0xd2, 0x0c, 0xd2, 0x0c, 0x94, 0x02, 0x6a, 0x04, 0xd2, 0x3c, 0xb2, ++0x05, 0xd2, 0x3a, 0xb2, 0x06, 0xd4, 0x09, 0xe2, 0x0d, 0xd2, 0x40, 0xa2, 0x04, 0x6c, 0xfa, 0x6d, 0x07, 0xf0, 0x14, 0x6e, 0xc2, 0xf7, 0x1a, 0x6f, 0x20, 0x18, 0xa3, 0x30, 0x07, 0xd2, 0x0c, 0x92, ++0x0f, 0x93, 0x2a, 0x22, 0x0d, 0x94, 0x00, 0x6a, 0xc3, 0x67, 0x40, 0xc4, 0x17, 0x6d, 0x00, 0x6a, 0x90, 0x67, 0x1c, 0x6f, 0x04, 0xd2, 0x20, 0x18, 0x04, 0x28, 0x0f, 0xd2, 0x7d, 0x67, 0x87, 0x43, ++0x25, 0x4c, 0x60, 0xac, 0x9d, 0x67, 0x80, 0xf0, 0x7e, 0xc9, 0x67, 0x44, 0x19, 0x4b, 0x80, 0xab, 0x7d, 0x67, 0xa0, 0xf0, 0x82, 0xc9, 0x87, 0x43, 0x1d, 0x4c, 0x60, 0xac, 0x9d, 0x67, 0xa0, 0xf0, ++0x66, 0xc9, 0x67, 0x44, 0x21, 0x4b, 0x80, 0xab, 0xa0, 0xf0, 0x80, 0xc9, 0x0f, 0x92, 0x00, 0xf2, 0x5d, 0xc1, 0x00, 0xf2, 0x5e, 0xc1, 0x2d, 0x10, 0x0b, 0x92, 0x08, 0x94, 0x0e, 0x95, 0x04, 0xd2, ++0x0a, 0x97, 0x09, 0x92, 0x05, 0xd4, 0xd0, 0x67, 0x83, 0x67, 0x0f, 0xd3, 0x20, 0x18, 0x25, 0x2c, 0x06, 0xd2, 0x01, 0x6e, 0x0f, 0x93, 0x1e, 0x22, 0xc3, 0x67, 0xe2, 0x67, 0x90, 0x67, 0x17, 0x6d, ++0x20, 0x18, 0xf6, 0x27, 0x0f, 0xd2, 0x0f, 0x92, 0x80, 0xf0, 0xfe, 0xa9, 0xb0, 0x67, 0x82, 0x67, 0x00, 0x18, 0xb4, 0x52, 0x02, 0x6e, 0x90, 0x67, 0x20, 0x18, 0xfa, 0x25, 0x04, 0x6d, 0x01, 0x6a, ++0x4b, 0xea, 0x00, 0xf2, 0x54, 0xc9, 0x00, 0x6a, 0x00, 0xf2, 0x56, 0xc1, 0x20, 0x18, 0x95, 0x28, 0x00, 0x65, 0x01, 0x6e, 0x13, 0x97, 0x12, 0x91, 0x11, 0x90, 0x46, 0x67, 0x00, 0xef, 0x0a, 0x63, ++0xb8, 0x51, 0x11, 0x80, 0x20, 0x56, 0x11, 0x80, 0xd8, 0x95, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0xf2, 0x63, 0x1b, 0x62, 0x1a, 0xd1, 0x19, 0xd0, 0x40, 0xf5, 0x14, 0xb2, 0x7d, 0x67, 0x40, 0xaa, ++0x51, 0xcb, 0x20, 0xf0, 0x82, 0xa3, 0x40, 0xf5, 0x0c, 0xb2, 0x92, 0x35, 0xa0, 0xc2, 0x13, 0xd5, 0x20, 0xf0, 0x63, 0xa3, 0x01, 0x6a, 0x86, 0x34, 0x6e, 0x31, 0x4c, 0xe9, 0x66, 0x33, 0x4c, 0xeb, ++0x24, 0x31, 0x6d, 0xe9, 0x07, 0x6b, 0x6c, 0xec, 0x10, 0xd4, 0x7c, 0x6c, 0x98, 0xe9, 0x20, 0xf5, 0x08, 0xb3, 0xb1, 0x67, 0x12, 0xec, 0x6d, 0xe4, 0x12, 0xd3, 0x60, 0xa3, 0x10, 0x94, 0x6c, 0xea, ++0x00, 0x18, 0x49, 0xbd, 0x14, 0xd2, 0x11, 0xd2, 0x11, 0x93, 0x0a, 0x6a, 0x58, 0xeb, 0x00, 0xf5, 0x0c, 0xb3, 0x12, 0xea, 0x49, 0xe3, 0x61, 0xaa, 0x00, 0xf5, 0x04, 0xb2, 0x60, 0xc2, 0x00, 0xf5, ++0x04, 0xb2, 0x40, 0x9a, 0x04, 0x22, 0x20, 0xf0, 0x02, 0x04, 0x40, 0xea, 0x00, 0x65, 0x13, 0x94, 0x09, 0x74, 0x07, 0x61, 0x10, 0x95, 0x00, 0x6c, 0x01, 0x25, 0x82, 0x41, 0x00, 0x18, 0xb8, 0x82, ++0x00, 0x65, 0x7d, 0x67, 0x20, 0xf0, 0x43, 0xa3, 0x01, 0x68, 0x0c, 0xea, 0x2d, 0x22, 0xc0, 0xf4, 0x18, 0xb2, 0x40, 0xa2, 0x03, 0x6b, 0x6c, 0xea, 0x14, 0x22, 0xc0, 0xf4, 0x10, 0xb3, 0x46, 0xab, ++0x9d, 0x67, 0x50, 0xcc, 0xc0, 0xf2, 0x0c, 0x6c, 0x98, 0xea, 0xc0, 0xf4, 0x04, 0xb4, 0x12, 0xea, 0x49, 0xe4, 0x00, 0x6c, 0x20, 0xf2, 0x9d, 0xc2, 0xe0, 0xf0, 0xa3, 0xa2, 0x00, 0x18, 0x13, 0x3d, ++0x8e, 0xa3, 0xa0, 0xf4, 0x10, 0xb2, 0x60, 0xf1, 0x4b, 0xa2, 0x20, 0xf2, 0x1a, 0x22, 0x00, 0x6a, 0xa0, 0xf4, 0x04, 0xb3, 0x04, 0xd2, 0x05, 0xd3, 0x06, 0xd2, 0x06, 0x6c, 0xfa, 0x6d, 0x26, 0xf5, ++0x05, 0x6e, 0xc0, 0xf5, 0x19, 0x6f, 0x32, 0x10, 0x10, 0x94, 0xb1, 0x67, 0x20, 0x18, 0xc0, 0x0e, 0x09, 0x06, 0x0d, 0x2a, 0x10, 0x93, 0x80, 0xf4, 0x04, 0xb2, 0x69, 0xe2, 0x40, 0xa2, 0x01, 0x72, ++0x00, 0xf2, 0x1f, 0x61, 0x60, 0xf4, 0x18, 0xb2, 0x69, 0xe2, 0x00, 0xc2, 0x1a, 0x12, 0x13, 0x94, 0x02, 0x74, 0x20, 0x61, 0x40, 0xf4, 0x10, 0xb2, 0x40, 0xa2, 0x00, 0xf2, 0x12, 0x2a, 0x40, 0xf4, ++0x14, 0xb2, 0x44, 0x9a, 0x02, 0x72, 0x00, 0xf2, 0x0c, 0x60, 0x00, 0x18, 0x1b, 0xaa, 0x00, 0x65, 0x00, 0x18, 0xa5, 0x3a, 0x00, 0x65, 0x40, 0xf4, 0x00, 0xb3, 0x04, 0xd0, 0x05, 0xd3, 0x06, 0xd2, ++0x06, 0x6c, 0xfa, 0x6d, 0x46, 0xf5, 0x0a, 0x6e, 0xc0, 0xf5, 0x1a, 0x6f, 0x20, 0x18, 0xa3, 0x30, 0x00, 0x65, 0xf7, 0x11, 0x10, 0x94, 0xb1, 0x67, 0x00, 0x18, 0xe8, 0xdf, 0x08, 0x06, 0xff, 0x72, ++0xe0, 0xf1, 0x0f, 0x60, 0x00, 0xf4, 0x1c, 0xb2, 0x40, 0x9a, 0xbd, 0x67, 0x10, 0xad, 0x0d, 0x22, 0x14, 0x93, 0x3c, 0x6c, 0x12, 0x95, 0x98, 0xeb, 0x7d, 0x67, 0xd1, 0xab, 0x12, 0xec, 0x91, 0xe5, ++0x04, 0x4c, 0x40, 0xea, 0xb0, 0x67, 0xc0, 0xf1, 0x1c, 0x2a, 0xc0, 0xf2, 0x0c, 0x6a, 0x58, 0xe8, 0x13, 0x93, 0xf7, 0xb2, 0x12, 0x94, 0x12, 0xe8, 0x41, 0xe0, 0x01, 0x6a, 0x44, 0xeb, 0x14, 0x93, ++0x15, 0xd2, 0x3c, 0x6a, 0x58, 0xeb, 0x12, 0xea, 0x49, 0xe4, 0x20, 0xf0, 0x72, 0xa2, 0x02, 0x73, 0xe0, 0xf0, 0x00, 0x61, 0x20, 0xf0, 0x70, 0xa2, 0xff, 0x73, 0xc0, 0xf0, 0x1b, 0x60, 0x20, 0xf0, ++0x74, 0xa2, 0x10, 0x95, 0xae, 0xeb, 0xc0, 0xf0, 0x15, 0x2b, 0x13, 0x95, 0x96, 0xaa, 0xa0, 0x33, 0x70, 0x33, 0x8e, 0xeb, 0xc0, 0xf0, 0x0e, 0x2b, 0x20, 0xf0, 0x76, 0xa2, 0x01, 0x4b, 0x20, 0xf0, ++0x76, 0xc2, 0xc0, 0xf0, 0x4d, 0xa0, 0x02, 0x72, 0x15, 0x61, 0x15, 0x93, 0x08, 0xf4, 0x10, 0x6a, 0x6c, 0xea, 0x06, 0x22, 0xa0, 0xf0, 0x5c, 0xa8, 0x01, 0x4a, 0xa0, 0xf0, 0x5c, 0xc8, 0x0a, 0x10, ++0x15, 0x94, 0x11, 0xf1, 0x00, 0x6a, 0x8c, 0xea, 0x05, 0x22, 0xc0, 0xf0, 0x42, 0xa8, 0x01, 0x4a, 0xc0, 0xf0, 0x42, 0xc8, 0x14, 0x93, 0x3c, 0x6a, 0x12, 0x94, 0x58, 0xeb, 0xbd, 0x67, 0x70, 0xad, ++0x12, 0xea, 0x49, 0xe4, 0x20, 0xf0, 0x50, 0xa2, 0x6a, 0xea, 0x0e, 0x60, 0x02, 0x6c, 0x04, 0xd4, 0xd1, 0xb4, 0x05, 0xd4, 0xfa, 0x6d, 0x02, 0x6c, 0xa6, 0xf5, 0x13, 0x6e, 0x61, 0xf4, 0x17, 0x6f, ++0x06, 0xd3, 0x20, 0x18, 0xa3, 0x30, 0x07, 0xd2, 0x14, 0x93, 0x3c, 0x6a, 0x12, 0x94, 0x58, 0xeb, 0x12, 0xea, 0x49, 0xe4, 0x20, 0xf0, 0x56, 0xa2, 0x04, 0x5a, 0x15, 0x61, 0xc5, 0xb2, 0x60, 0xf1, ++0x45, 0xa2, 0x11, 0x22, 0x20, 0x18, 0x02, 0x26, 0x00, 0x65, 0x2e, 0xea, 0x0c, 0x22, 0xc0, 0xf0, 0x58, 0xa0, 0x09, 0x2a, 0x00, 0x18, 0xac, 0x3b, 0x01, 0x6c, 0xc3, 0xb3, 0x80, 0xa3, 0x01, 0x6a, ++0x44, 0xe9, 0x8d, 0xea, 0x40, 0xc3, 0x14, 0x93, 0x3c, 0x6a, 0x12, 0x94, 0x58, 0xeb, 0xbf, 0xb3, 0x12, 0xea, 0x49, 0xe4, 0x20, 0xf0, 0xb6, 0xa2, 0xc0, 0xf0, 0x4a, 0xab, 0x03, 0x6c, 0x42, 0x32, ++0x4a, 0x32, 0x8c, 0xea, 0x44, 0x32, 0x42, 0xed, 0x2f, 0x61, 0xb2, 0xb2, 0x60, 0xf1, 0x47, 0xa2, 0x2b, 0x22, 0x17, 0xd3, 0x20, 0x18, 0x02, 0x26, 0x16, 0xd4, 0x2e, 0xea, 0x17, 0x93, 0x16, 0x94, ++0x23, 0x22, 0xc0, 0xf0, 0x59, 0xa0, 0x20, 0x2a, 0xb1, 0xb2, 0xa0, 0xaa, 0x02, 0x6a, 0xac, 0xea, 0x1b, 0x2a, 0xc0, 0xf0, 0x6a, 0xab, 0xaf, 0xb5, 0x40, 0xa5, 0x62, 0x33, 0x72, 0x33, 0x8c, 0xeb, ++0x01, 0x4a, 0xff, 0x6e, 0x64, 0x33, 0xcc, 0xea, 0x01, 0x4b, 0x7a, 0xea, 0x01, 0x2b, 0xe5, 0xe8, 0x40, 0xc5, 0x10, 0xea, 0x09, 0x2a, 0x00, 0x18, 0x97, 0x3b, 0x01, 0x6c, 0xa2, 0xb3, 0x80, 0xa3, ++0x01, 0x6a, 0x44, 0xe9, 0x8d, 0xea, 0x40, 0xc3, 0xa0, 0xb2, 0x7c, 0x4a, 0x58, 0x9a, 0x10, 0x6b, 0x6c, 0xea, 0x30, 0x22, 0x14, 0x93, 0x3c, 0x6a, 0x12, 0x94, 0x58, 0xeb, 0x12, 0xea, 0x49, 0xe4, ++0x20, 0xf0, 0x56, 0xa2, 0x04, 0x5a, 0x04, 0x61, 0x9b, 0xb2, 0x00, 0xf1, 0x54, 0xa2, 0x06, 0x2a, 0xe0, 0xf0, 0x47, 0xa0, 0x1f, 0x2a, 0x99, 0xb2, 0x40, 0xa2, 0x1c, 0x2a, 0x98, 0xb3, 0x40, 0xa3, ++0xff, 0x6c, 0x01, 0x4a, 0x8c, 0xea, 0x40, 0xc3, 0x90, 0xb3, 0x7c, 0x4b, 0x78, 0x9b, 0x07, 0x6c, 0x7a, 0x33, 0x8c, 0xeb, 0x64, 0x33, 0x01, 0x4b, 0x7b, 0xea, 0x01, 0x2b, 0xe5, 0xe8, 0x10, 0xea, ++0x09, 0x2a, 0x00, 0x18, 0x6c, 0xd0, 0x01, 0x6c, 0x8e, 0xb3, 0x80, 0xa3, 0x01, 0x6a, 0x44, 0xe9, 0x8d, 0xea, 0x40, 0xc3, 0xe0, 0xf0, 0x67, 0xa0, 0x15, 0x94, 0xff, 0x6a, 0x01, 0x5b, 0x78, 0x67, ++0x6b, 0xeb, 0x6c, 0xea, 0x19, 0xf5, 0x18, 0x6b, 0x8c, 0xeb, 0x04, 0x23, 0x10, 0x95, 0x02, 0x25, 0x01, 0x6a, 0x02, 0x10, 0xff, 0x72, 0x03, 0x60, 0x83, 0xb4, 0x31, 0xe4, 0x40, 0xc4, 0x75, 0xb2, ++0x60, 0xf1, 0x50, 0xa2, 0xff, 0x6c, 0xfd, 0x4a, 0x8c, 0xea, 0x02, 0x5a, 0x10, 0x60, 0x80, 0xf2, 0x5c, 0xa0, 0x03, 0x72, 0x0c, 0x61, 0x11, 0x94, 0x0a, 0x6a, 0xbd, 0x67, 0x58, 0xec, 0x91, 0xad, ++0x66, 0xb5, 0x17, 0xd3, 0x12, 0xea, 0x00, 0x18, 0x86, 0x07, 0x55, 0xe5, 0x17, 0x93, 0x06, 0x23, 0x5d, 0x67, 0x90, 0xaa, 0x00, 0x18, 0x51, 0xa3, 0x17, 0xd3, 0x17, 0x93, 0x65, 0xb2, 0x60, 0xf1, ++0x50, 0xa2, 0xff, 0x6c, 0xfd, 0x4a, 0x8c, 0xea, 0x02, 0x5a, 0x04, 0x60, 0x80, 0xf2, 0x5c, 0xa0, 0x03, 0x72, 0x0c, 0x60, 0x5f, 0xb2, 0x29, 0xe2, 0x80, 0xf1, 0x40, 0xa2, 0x07, 0x22, 0x91, 0x67, ++0x00, 0x18, 0xce, 0x06, 0x17, 0xd3, 0x10, 0xd2, 0x17, 0x93, 0x02, 0x10, 0x00, 0x6c, 0x10, 0xd4, 0x11, 0x95, 0x2a, 0x25, 0x65, 0xb2, 0x29, 0xe2, 0x44, 0xa2, 0x01, 0x6c, 0x46, 0x32, 0x8c, 0xea, ++0x23, 0x22, 0x22, 0x2b, 0x62, 0xb2, 0xa9, 0xe2, 0x60, 0xa2, 0x6a, 0x33, 0x60, 0xc2, 0xe0, 0xf0, 0x47, 0xa0, 0x01, 0x72, 0x19, 0x61, 0x5f, 0xb2, 0xa9, 0xe2, 0x40, 0xa2, 0x15, 0x2a, 0x60, 0xf0, ++0x56, 0xa8, 0x7d, 0x67, 0x01, 0x4a, 0x60, 0xf0, 0x56, 0xc8, 0x20, 0xf3, 0x0b, 0x6a, 0x58, 0xcb, 0x59, 0xb2, 0x80, 0x9a, 0x0d, 0x92, 0xb0, 0xab, 0x0b, 0x96, 0x04, 0xd2, 0x0c, 0x97, 0x0e, 0x92, ++0x0a, 0xd5, 0x00, 0x18, 0x8e, 0x1c, 0x05, 0xd2, 0x54, 0xb2, 0x40, 0x9a, 0x06, 0x22, 0x7d, 0x67, 0xb1, 0xab, 0x10, 0x96, 0x40, 0xea, 0x08, 0x04, 0x64, 0x2a, 0x4a, 0xb2, 0x40, 0xa2, 0x19, 0x2a, ++0x46, 0xb2, 0x40, 0xa2, 0x16, 0x2a, 0xc0, 0xf0, 0x6d, 0xa0, 0x02, 0x6c, 0x4c, 0xb2, 0x8e, 0xeb, 0x0a, 0x23, 0x01, 0x6b, 0x60, 0xc2, 0x3d, 0xb2, 0x7c, 0x4a, 0x58, 0x9a, 0x03, 0x6c, 0x42, 0x32, ++0x46, 0x32, 0x4c, 0xec, 0x03, 0x10, 0x60, 0xc2, 0x46, 0xb2, 0x80, 0xa2, 0x00, 0x18, 0x6c, 0xd0, 0x00, 0x65, 0x10, 0x95, 0x02, 0x2d, 0x13, 0x92, 0x08, 0x22, 0x13, 0x93, 0x01, 0x73, 0x34, 0x61, ++0x10, 0x94, 0x32, 0x2c, 0x2b, 0xb2, 0x44, 0x9a, 0x2f, 0x22, 0xe0, 0xf0, 0x47, 0xa0, 0x01, 0x6d, 0xae, 0xea, 0x2a, 0x2a, 0x3c, 0xb3, 0x02, 0x49, 0x28, 0x31, 0x27, 0xe3, 0x60, 0x99, 0x00, 0x53, ++0x23, 0x61, 0x11, 0x93, 0x21, 0x23, 0x11, 0x94, 0x0a, 0x6b, 0x18, 0xf0, 0x00, 0x6d, 0x78, 0xec, 0x1a, 0xb4, 0x12, 0xeb, 0x6d, 0xe4, 0x83, 0xab, 0x00, 0x18, 0x5c, 0x3b, 0x16, 0xd2, 0x11, 0x95, ++0x16, 0x92, 0x2c, 0xb3, 0xad, 0xe3, 0x40, 0xc3, 0x29, 0xb3, 0xad, 0xe3, 0x40, 0xc3, 0x01, 0x6b, 0x04, 0xd3, 0x03, 0x6c, 0x18, 0xb3, 0xfa, 0x6d, 0x86, 0xf6, 0x06, 0x6e, 0xc4, 0xf3, 0x15, 0x6f, ++0x05, 0xd3, 0x20, 0x18, 0xa3, 0x30, 0x06, 0xd2, 0x12, 0xb2, 0x60, 0xf1, 0x49, 0xa2, 0x01, 0x72, 0x08, 0x61, 0x00, 0xf2, 0x52, 0xa0, 0x05, 0x22, 0xa0, 0xf0, 0x44, 0xa8, 0x01, 0x4a, 0xa0, 0xf0, ++0x44, 0xc8, 0x1b, 0x97, 0x1a, 0x91, 0x19, 0x90, 0x00, 0xef, 0x0e, 0x63, 0x08, 0x00, 0x00, 0xb6, 0x89, 0x04, 0x11, 0x80, 0xf8, 0x37, 0x11, 0x80, 0x40, 0x3b, 0x11, 0x80, 0xd8, 0x1a, 0x11, 0x80, ++0xdc, 0x1a, 0x11, 0x80, 0x0c, 0x52, 0x11, 0x80, 0x18, 0x52, 0x11, 0x80, 0x20, 0x56, 0x11, 0x80, 0x2c, 0x52, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0xd4, 0x19, 0x11, 0x80, 0xdc, 0x19, 0x11, 0x80, ++0x28, 0x1a, 0x11, 0x80, 0x37, 0x1a, 0x11, 0x80, 0x4c, 0x00, 0x11, 0x80, 0x20, 0x01, 0x00, 0xb6, 0x38, 0x1a, 0x11, 0x80, 0xa4, 0x3c, 0x11, 0x80, 0x8e, 0x1b, 0x11, 0x80, 0x36, 0x1a, 0x11, 0x80, ++0x34, 0x1a, 0x11, 0x80, 0xc8, 0x19, 0x11, 0x80, 0xd4, 0x3b, 0x11, 0x80, 0x90, 0x19, 0x11, 0x80, 0x84, 0x19, 0x11, 0x80, 0xe4, 0x37, 0x11, 0x80, 0x24, 0x1a, 0x11, 0x80, 0xf9, 0x19, 0x11, 0x80, ++0x49, 0x00, 0x11, 0x80, 0x0c, 0xa3, 0x00, 0xb0, 0xfc, 0x63, 0x07, 0x62, 0x0f, 0xb3, 0x60, 0xf1, 0x64, 0x9b, 0x0f, 0xb2, 0x6c, 0xea, 0x0f, 0xb3, 0x6e, 0xea, 0x13, 0x2a, 0x0e, 0xb2, 0xff, 0xf7, ++0x1f, 0x6b, 0xff, 0x6c, 0x40, 0xaa, 0x1f, 0x4c, 0x4c, 0xeb, 0x5d, 0x67, 0x68, 0xca, 0x08, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0x01, 0x6b, 0x6d, 0xea, 0x7d, 0x67, 0x50, 0xc3, 0x00, 0x18, 0x5c, 0x3b, ++0xa8, 0xab, 0x07, 0x97, 0x00, 0xef, 0x04, 0x63, 0x2c, 0x52, 0x11, 0x80, 0xff, 0x00, 0x00, 0xff, 0x01, 0x00, 0x00, 0x01, 0x1e, 0x01, 0x00, 0xb6, 0xf0, 0x63, 0x1f, 0x62, 0x1e, 0xd1, 0x1d, 0xd0, ++0x80, 0xac, 0xc0, 0xf2, 0x0c, 0x68, 0xdf, 0xb2, 0x18, 0xec, 0x18, 0xd4, 0xa0, 0xa5, 0x12, 0xd5, 0x12, 0xe8, 0x41, 0xe0, 0xe0, 0xf0, 0x47, 0xa0, 0x13, 0xd2, 0xa0, 0xf0, 0x60, 0xa8, 0x19, 0xd3, ++0xa0, 0xf0, 0x82, 0xa8, 0x80, 0xf0, 0x7e, 0xa8, 0x17, 0xd4, 0xa0, 0xf0, 0xa6, 0xa8, 0x16, 0xd5, 0xe0, 0xf0, 0x4e, 0xa0, 0x11, 0xd2, 0x00, 0x6a, 0xc0, 0xf2, 0x44, 0xc0, 0xc0, 0xf2, 0x45, 0xc0, ++0xe0, 0xf0, 0x23, 0xa0, 0x11, 0x94, 0x1b, 0xd3, 0x00, 0x18, 0x49, 0xbd, 0xb1, 0x67, 0x0a, 0x6c, 0x98, 0xea, 0x14, 0xd2, 0xcc, 0xb2, 0x12, 0xec, 0x49, 0xe4, 0x15, 0xd2, 0xe0, 0xf0, 0xa3, 0xa0, ++0x00, 0x18, 0x56, 0x3d, 0x11, 0x94, 0x12, 0x92, 0x1b, 0x93, 0x1a, 0x22, 0x13, 0x94, 0x01, 0x74, 0x17, 0x61, 0x15, 0x92, 0x03, 0xf4, 0x00, 0x6c, 0x18, 0xf0, 0x00, 0x6d, 0x00, 0x18, 0xa6, 0x97, ++0xc3, 0xaa, 0x01, 0x6a, 0x04, 0xd2, 0xc1, 0xb2, 0x05, 0xd2, 0x04, 0x6c, 0x7b, 0x6a, 0xfa, 0x6d, 0x06, 0xf0, 0x11, 0x6e, 0xc4, 0xf3, 0x15, 0x6f, 0x20, 0x18, 0xa3, 0x30, 0x06, 0xd2, 0x1b, 0x93, ++0x00, 0x1c, 0x73, 0x1b, 0x1b, 0xd3, 0x0a, 0x04, 0xb1, 0x67, 0x00, 0x18, 0x44, 0x97, 0x1a, 0xd2, 0x0a, 0x92, 0xb7, 0xb4, 0x1b, 0x93, 0x46, 0x32, 0x01, 0x4a, 0x8c, 0xea, 0x0a, 0xd2, 0xa0, 0xf2, ++0x9e, 0xa8, 0x10, 0xd4, 0x07, 0x2c, 0x12, 0x95, 0x01, 0x75, 0x04, 0x61, 0x00, 0x1c, 0x7a, 0x1b, 0x1a, 0x94, 0x50, 0x11, 0x06, 0x22, 0x05, 0x23, 0x7b, 0xea, 0x01, 0x2b, 0xe5, 0xe8, 0x10, 0xe9, ++0x01, 0x10, 0x00, 0x69, 0xff, 0xf7, 0x1f, 0x6c, 0x27, 0xe3, 0x8c, 0xe9, 0x19, 0x94, 0x85, 0xe1, 0x23, 0xeb, 0x01, 0x60, 0x67, 0xe1, 0x12, 0x95, 0x01, 0x75, 0x02, 0x60, 0x10, 0xd3, 0x16, 0x10, ++0xa3, 0xb3, 0xa0, 0xf2, 0x8c, 0x98, 0x8c, 0xeb, 0x43, 0xeb, 0x67, 0xe2, 0x03, 0x61, 0xa1, 0xb1, 0x67, 0xe1, 0x45, 0xe1, 0x10, 0x95, 0x4b, 0xe3, 0xba, 0xe9, 0x01, 0x2d, 0xe5, 0xe8, 0x12, 0xe9, ++0x01, 0x49, 0xb8, 0xe9, 0x12, 0xe9, 0x25, 0xe2, 0x99, 0xb2, 0x4c, 0xe9, 0x11, 0x93, 0xe0, 0xf0, 0xa3, 0xa0, 0x02, 0x6c, 0x74, 0x32, 0xa0, 0x35, 0xff, 0x6b, 0x6c, 0xea, 0xac, 0x35, 0x4d, 0xed, ++0xff, 0xf7, 0x1f, 0x6a, 0x00, 0x18, 0x5c, 0x3b, 0x4c, 0xed, 0x0a, 0x93, 0x71, 0xe1, 0x11, 0xd4, 0x05, 0x10, 0x11, 0x95, 0x10, 0x92, 0x55, 0xe5, 0x11, 0xd5, 0x45, 0xe1, 0x08, 0x59, 0xf9, 0x61, ++0x00, 0x18, 0xa5, 0x3a, 0x1b, 0xd3, 0x11, 0x94, 0x1b, 0x93, 0x6f, 0xe4, 0x64, 0x33, 0x6d, 0xe2, 0x70, 0xd8, 0x10, 0x95, 0x00, 0x18, 0x5c, 0x3b, 0x4e, 0x6c, 0x11, 0x95, 0xff, 0xf7, 0x1f, 0x6a, ++0x48, 0x6c, 0x4c, 0xed, 0x19, 0xd5, 0x00, 0x18, 0x5c, 0x3b, 0x1b, 0xd2, 0x13, 0x93, 0x12, 0x2b, 0x16, 0x95, 0x00, 0x18, 0x5c, 0x3b, 0x4c, 0x6c, 0x17, 0x95, 0x00, 0x18, 0x5c, 0x3b, 0x4a, 0x6c, ++0x7d, 0xb3, 0x1b, 0x92, 0x00, 0xf2, 0x1c, 0x6c, 0xa0, 0xab, 0x40, 0x6b, 0x4c, 0xed, 0x6d, 0xed, 0x4c, 0xed, 0x16, 0x10, 0x79, 0xb3, 0x7c, 0x4b, 0x78, 0x9b, 0x10, 0xf0, 0x00, 0x6a, 0x6c, 0xea, ++0x08, 0x22, 0x16, 0x94, 0x03, 0x24, 0x4c, 0x6c, 0x01, 0x6d, 0x05, 0x10, 0x4c, 0x6c, 0x00, 0x6d, 0x02, 0x10, 0x16, 0x95, 0x4c, 0x6c, 0x00, 0x18, 0x5c, 0x3b, 0x00, 0x65, 0x17, 0x95, 0x4a, 0x6c, ++0x00, 0x18, 0x5c, 0x3b, 0x00, 0x65, 0x07, 0x6d, 0x00, 0x18, 0x5c, 0x3b, 0x00, 0x6c, 0x12, 0x95, 0x0e, 0x2d, 0x13, 0x92, 0x01, 0x72, 0x0b, 0x61, 0x14, 0x93, 0x69, 0xb2, 0x69, 0xe2, 0xa0, 0xc2, ++0x68, 0xb2, 0x69, 0xe2, 0x7d, 0x67, 0x87, 0x43, 0x41, 0x4c, 0x60, 0xa4, 0x60, 0xc2, 0x1a, 0x94, 0x00, 0x1c, 0x7a, 0x1b, 0x02, 0x49, 0x00, 0x18, 0x1c, 0x04, 0x00, 0x65, 0x01, 0xf0, 0x00, 0x6d, ++0x00, 0x18, 0x91, 0xbe, 0x5e, 0x6c, 0x03, 0x6a, 0x19, 0x95, 0x04, 0xd2, 0x11, 0x92, 0x57, 0xb4, 0x05, 0xd4, 0x06, 0xd5, 0x07, 0xd2, 0x00, 0x6c, 0x44, 0x32, 0xfa, 0x6d, 0xa6, 0xf0, 0x1c, 0x6e, ++0x40, 0x6f, 0x20, 0x18, 0xa3, 0x30, 0x08, 0xd2, 0x12, 0x94, 0x3b, 0x2c, 0x13, 0x95, 0x01, 0x75, 0x1a, 0x61, 0x15, 0x92, 0x18, 0xf0, 0x00, 0x6c, 0x03, 0xf4, 0x00, 0x6d, 0x00, 0x18, 0xa6, 0x97, ++0xc3, 0xaa, 0x01, 0x6a, 0x04, 0xd2, 0x49, 0xb3, 0x7b, 0x6a, 0x04, 0x6c, 0xfa, 0x6d, 0xc6, 0xf0, 0x1f, 0x6e, 0xc4, 0xf3, 0x15, 0x6f, 0x05, 0xd3, 0x20, 0x18, 0xa3, 0x30, 0x06, 0xd2, 0x20, 0x6a, ++0x00, 0xf2, 0x50, 0xc0, 0x40, 0x10, 0x51, 0x59, 0x06, 0x61, 0x18, 0x95, 0xff, 0xf7, 0x1f, 0x6c, 0x00, 0x18, 0xc7, 0x9c, 0x2c, 0xec, 0x15, 0x92, 0x18, 0xf0, 0x00, 0x6c, 0x01, 0xf4, 0x00, 0x6d, ++0x00, 0x18, 0xa6, 0x97, 0xc3, 0xaa, 0x01, 0x6a, 0x04, 0xd2, 0x38, 0xb2, 0x05, 0xd2, 0x04, 0x6c, 0x7b, 0x6a, 0xfa, 0x6d, 0xe6, 0xf0, 0x10, 0x6e, 0xc4, 0xf3, 0x15, 0x6f, 0x20, 0x18, 0xa3, 0x30, ++0x06, 0xd2, 0x13, 0x93, 0x20, 0x2b, 0x12, 0x94, 0x1e, 0x24, 0x51, 0x59, 0x1c, 0x61, 0x18, 0x95, 0xff, 0xf7, 0x1f, 0x6c, 0x00, 0x18, 0xc7, 0x9c, 0x2c, 0xec, 0x15, 0x92, 0x01, 0xf4, 0x00, 0x6c, ++0x18, 0xf0, 0x00, 0x6d, 0x00, 0x18, 0xa6, 0x97, 0xc3, 0xaa, 0x01, 0x6a, 0x04, 0xd2, 0x27, 0xb2, 0x05, 0xd2, 0x04, 0x6c, 0x7b, 0x6a, 0xfa, 0x6d, 0x06, 0xf1, 0x01, 0x6e, 0xc4, 0xf3, 0x15, 0x6f, ++0x20, 0x18, 0xa3, 0x30, 0x06, 0xd2, 0x10, 0x94, 0x7d, 0x67, 0x60, 0xf2, 0x0b, 0x6a, 0x5a, 0xcb, 0x25, 0xb2, 0x0b, 0xd4, 0x80, 0x9a, 0x0e, 0x92, 0x10, 0x95, 0x0c, 0x96, 0x04, 0xd2, 0x0d, 0x97, ++0x0f, 0x92, 0x00, 0x18, 0x8e, 0x1c, 0x05, 0xd2, 0x03, 0x6a, 0x10, 0x95, 0x04, 0xd2, 0x17, 0xb2, 0x05, 0xd2, 0x16, 0x93, 0x17, 0x92, 0x06, 0xd5, 0x05, 0x6c, 0xfa, 0x6d, 0x06, 0xf1, 0x15, 0x6e, ++0x82, 0xf7, 0x1e, 0x6f, 0x07, 0xd2, 0x20, 0x18, 0xa3, 0x30, 0x08, 0xd3, 0x14, 0x94, 0x0d, 0x24, 0x64, 0x67, 0xff, 0x4b, 0x68, 0x33, 0x15, 0xb4, 0x71, 0xe4, 0x00, 0x6a, 0x40, 0xdc, 0x14, 0xb4, ++0x71, 0xe4, 0x40, 0xdc, 0x13, 0xb4, 0x6d, 0xe4, 0x40, 0xdb, 0x18, 0x95, 0x12, 0xb2, 0x00, 0x6b, 0xa9, 0xe2, 0x60, 0xc2, 0x1f, 0x97, 0x1e, 0x91, 0x1d, 0x90, 0x01, 0x6a, 0x00, 0xef, 0x10, 0x63, ++0x20, 0x56, 0x11, 0x80, 0x40, 0x3b, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x08, 0x1c, 0x02, 0x00, 0xb6, 0x4c, 0x00, 0x11, 0x80, 0x84, 0x19, 0x11, 0x80, ++0x90, 0x19, 0x11, 0x80, 0xa0, 0x48, 0x11, 0x80, 0x44, 0x1a, 0x11, 0x80, 0x74, 0x1a, 0x11, 0x80, 0xa4, 0x1a, 0x11, 0x80, 0xd8, 0x95, 0x11, 0x80, 0xf8, 0x63, 0x0f, 0x62, 0x0e, 0xd1, 0x0d, 0xd0, ++0x7a, 0xb2, 0x01, 0x6c, 0x60, 0xaa, 0xff, 0xf7, 0x1f, 0x6a, 0x6c, 0xea, 0x78, 0xb3, 0x60, 0xab, 0x09, 0xd3, 0x78, 0xb3, 0x60, 0xa3, 0x8e, 0xeb, 0x04, 0x2b, 0x77, 0xb4, 0x60, 0xc4, 0x77, 0xb4, ++0x60, 0xc4, 0x00, 0x6b, 0x08, 0xd3, 0xd5, 0x10, 0x75, 0xb3, 0x60, 0x9b, 0x05, 0x23, 0x08, 0xf0, 0x00, 0x6b, 0x4c, 0xeb, 0xc0, 0xf0, 0x12, 0x23, 0x09, 0x94, 0x08, 0xf0, 0x00, 0x6b, 0x4c, 0xeb, ++0x8f, 0xe8, 0x4c, 0xe8, 0x00, 0x31, 0x20, 0x31, 0x23, 0x31, 0x23, 0x31, 0x03, 0x23, 0x00, 0x18, 0x05, 0x9c, 0x00, 0x65, 0x6b, 0xb2, 0x7c, 0x4a, 0x55, 0x9a, 0x02, 0x6b, 0x6c, 0xea, 0x0f, 0x22, ++0x00, 0x51, 0x0d, 0x60, 0x00, 0x18, 0xde, 0x1a, 0x00, 0x65, 0x67, 0xb2, 0x40, 0xf0, 0x63, 0xa2, 0x06, 0x23, 0xff, 0xf7, 0x1e, 0x6b, 0x6c, 0xe8, 0x00, 0x6b, 0x40, 0xf0, 0x63, 0xc2, 0x08, 0x6a, ++0x0c, 0xea, 0x03, 0x22, 0x00, 0x18, 0xcd, 0x09, 0x00, 0x65, 0x02, 0x6a, 0x0c, 0xea, 0x03, 0x22, 0x80, 0x18, 0x74, 0x2f, 0x00, 0x65, 0x01, 0x6a, 0x0c, 0xea, 0x46, 0x22, 0x00, 0x18, 0x42, 0x13, ++0x00, 0x6c, 0x5a, 0xb2, 0x40, 0xa2, 0x40, 0x22, 0x59, 0xb2, 0x60, 0xf1, 0x44, 0xa2, 0x3c, 0x22, 0x58, 0xb1, 0xe0, 0xf0, 0x47, 0xa1, 0x01, 0x72, 0x37, 0x61, 0xc0, 0xf0, 0x48, 0xa1, 0x04, 0x5a, ++0x33, 0x61, 0xc0, 0xf0, 0x4d, 0xa1, 0x02, 0x6b, 0x6e, 0xea, 0x2e, 0x2a, 0xe0, 0xf0, 0x8e, 0xa1, 0xe0, 0xf0, 0xa3, 0xa1, 0xc3, 0x67, 0x00, 0x18, 0x8f, 0x3c, 0x0a, 0xd2, 0x00, 0xf2, 0x65, 0xa1, ++0x0a, 0x92, 0x0f, 0x73, 0x13, 0x60, 0x9d, 0x67, 0x01, 0x6b, 0x03, 0x6e, 0x78, 0xc4, 0x5a, 0xc4, 0x64, 0x6b, 0x00, 0x6c, 0x06, 0x05, 0xe6, 0x67, 0x04, 0xd3, 0x00, 0x18, 0x23, 0xe3, 0x05, 0xd2, ++0x0f, 0x6a, 0x00, 0xf2, 0x45, 0xc1, 0x00, 0x18, 0xce, 0x06, 0x00, 0x6c, 0x3f, 0xb2, 0xa0, 0xa2, 0xe1, 0xf7, 0x1d, 0x6a, 0xa0, 0x35, 0xb0, 0x35, 0x4d, 0xed, 0x3f, 0xb2, 0x81, 0xa2, 0xff, 0xf7, ++0x1f, 0x6a, 0x00, 0x18, 0x5c, 0x3b, 0x4c, 0xed, 0x20, 0x6a, 0x0c, 0xea, 0x03, 0x22, 0x00, 0x18, 0xf4, 0x05, 0x00, 0x65, 0x04, 0x6a, 0x0c, 0xea, 0x03, 0x22, 0x00, 0x18, 0x43, 0x11, 0x00, 0x65, ++0x02, 0xf0, 0x00, 0x6a, 0x0c, 0xea, 0x09, 0x22, 0x00, 0x18, 0x5f, 0x11, 0x00, 0x65, 0x33, 0xb2, 0x40, 0xa2, 0x03, 0x22, 0x00, 0x18, 0xb6, 0xa3, 0x00, 0x65, 0x00, 0xf6, 0x00, 0x6a, 0x0c, 0xea, ++0x06, 0x22, 0x2f, 0xb2, 0xff, 0xf7, 0x1f, 0x6c, 0x40, 0xaa, 0x4c, 0xec, 0x08, 0xd4, 0x00, 0xf2, 0x00, 0x6a, 0x0c, 0xea, 0x03, 0x22, 0x00, 0x18, 0xf6, 0x12, 0x08, 0x94, 0x00, 0xf4, 0x00, 0x6a, ++0x0c, 0xea, 0x0f, 0x22, 0x00, 0x18, 0x2f, 0x13, 0x08, 0x94, 0xfe, 0xf7, 0x1f, 0x6d, 0x00, 0x18, 0xac, 0xbe, 0x5e, 0x6c, 0x1b, 0xb2, 0xe0, 0xf0, 0x54, 0xa2, 0x03, 0x22, 0x00, 0x18, 0xb9, 0xab, ++0x00, 0x65, 0x01, 0xf0, 0x00, 0x69, 0x50, 0x67, 0x2c, 0xea, 0x07, 0x22, 0x00, 0x18, 0x17, 0x13, 0x00, 0x65, 0x5e, 0x6c, 0x00, 0x18, 0x91, 0xbe, 0xb1, 0x67, 0xff, 0x6a, 0x01, 0x4a, 0x0c, 0xea, ++0x03, 0x22, 0x00, 0x18, 0x46, 0x05, 0x00, 0x65, 0x08, 0xb2, 0x60, 0xaa, 0xff, 0xf7, 0x1f, 0x6a, 0x6c, 0xea, 0x09, 0x94, 0x8f, 0xeb, 0x4c, 0xeb, 0x3f, 0xf7, 0x06, 0x2b, 0x0f, 0x97, 0x0e, 0x91, ++0x0d, 0x90, 0x00, 0xef, 0x08, 0x63, 0x00, 0x65, 0xbe, 0x00, 0x00, 0xb6, 0x7e, 0x04, 0x11, 0x80, 0xcc, 0x3b, 0x11, 0x80, 0x3b, 0x1a, 0x11, 0x80, 0x0c, 0x3b, 0x11, 0x80, 0xe8, 0x3b, 0x11, 0x80, ++0x4c, 0x00, 0x11, 0x80, 0x50, 0x46, 0x11, 0x80, 0x01, 0x96, 0x11, 0x80, 0x2c, 0x52, 0x11, 0x80, 0x20, 0x56, 0x11, 0x80, 0x34, 0xf2, 0x04, 0x80, 0xf0, 0x1a, 0x11, 0x80, 0x5c, 0x00, 0x00, 0xb6, ++0xfd, 0x63, 0x05, 0x62, 0x04, 0xd0, 0x2b, 0xb2, 0x40, 0x9a, 0x1e, 0xf4, 0x01, 0x6b, 0x6b, 0xeb, 0x4d, 0xeb, 0x40, 0x9c, 0x04, 0x67, 0x6c, 0xea, 0x7c, 0x6b, 0x4c, 0xeb, 0x40, 0xdc, 0x05, 0x23, ++0x25, 0xb3, 0x26, 0xb2, 0x00, 0x18, 0xe5, 0x39, 0x60, 0xda, 0x61, 0xa0, 0x40, 0x6a, 0x6c, 0xea, 0x03, 0x22, 0x00, 0x18, 0x99, 0x02, 0x00, 0x65, 0x61, 0xa0, 0x04, 0x6a, 0x6c, 0xea, 0x03, 0x22, ++0x80, 0x18, 0xee, 0x31, 0x00, 0x65, 0x61, 0xa0, 0x10, 0x6a, 0x6c, 0xea, 0x03, 0x22, 0x00, 0x18, 0xe0, 0x03, 0x00, 0x65, 0x61, 0xa0, 0x08, 0x6a, 0x4c, 0xeb, 0x0a, 0x23, 0x15, 0xb3, 0x61, 0xa3, ++0x6c, 0xea, 0x03, 0x22, 0x00, 0x18, 0xc0, 0x00, 0x00, 0x65, 0x00, 0x18, 0xe6, 0x37, 0x00, 0x65, 0x61, 0xa0, 0x80, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0xff, 0x6b, 0x6c, 0xea, 0x03, 0x22, 0x00, 0x18, ++0xad, 0x02, 0x00, 0x65, 0x61, 0xa0, 0x20, 0x6a, 0x6c, 0xea, 0x03, 0x22, 0x00, 0x18, 0x2d, 0x02, 0x00, 0x65, 0x0b, 0xb2, 0x60, 0xa2, 0x04, 0x23, 0x00, 0x6b, 0x00, 0x18, 0x5a, 0x33, 0x60, 0xc2, ++0x00, 0x6b, 0x08, 0xb2, 0x60, 0xc2, 0x05, 0x97, 0x04, 0x90, 0x01, 0x6a, 0x00, 0xef, 0x03, 0x63, 0xf4, 0x21, 0x11, 0x80, 0x32, 0x97, 0x79, 0x23, 0x60, 0x8b, 0x10, 0x80, 0x98, 0x07, 0x11, 0x80, ++0xe4, 0x07, 0x11, 0x80, 0xfb, 0x63, 0x09, 0x62, 0x08, 0xd1, 0x07, 0xd0, 0x22, 0xb0, 0x40, 0xa0, 0x01, 0x69, 0x2c, 0xea, 0x38, 0x22, 0x21, 0xb2, 0x00, 0x6b, 0x60, 0xda, 0x00, 0x18, 0x64, 0x35, ++0x04, 0xd2, 0x04, 0x92, 0x1e, 0xb3, 0xff, 0x6c, 0x60, 0xda, 0x1e, 0xb2, 0x60, 0x9a, 0x40, 0xa0, 0x40, 0xf7, 0x62, 0x33, 0x46, 0x32, 0x2c, 0xea, 0x8c, 0xea, 0x2c, 0xeb, 0x4e, 0xeb, 0x04, 0x2b, ++0x19, 0xb3, 0x80, 0x9b, 0x01, 0x4c, 0x80, 0xdb, 0x18, 0xb3, 0x80, 0xa3, 0x07, 0x6b, 0x8c, 0xeb, 0x1a, 0x23, 0x40, 0x6b, 0x8c, 0xeb, 0x17, 0x2b, 0x0f, 0xb3, 0xa0, 0xa3, 0x08, 0x6b, 0xac, 0xeb, ++0x12, 0x23, 0x10, 0xb3, 0x04, 0x6c, 0xac, 0xec, 0x60, 0x9b, 0x06, 0x24, 0x40, 0xf7, 0x62, 0x33, 0x01, 0x6c, 0x8c, 0xeb, 0x6e, 0xea, 0x02, 0x10, 0x0d, 0xb2, 0x40, 0xa2, 0x04, 0x2a, 0x0a, 0xb2, ++0x60, 0x9a, 0x01, 0x4b, 0x60, 0xda, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x00, 0x6a, 0x00, 0xef, 0x05, 0x63, 0x00, 0x65, 0x1c, 0x96, 0x11, 0x80, 0xcc, 0x07, 0x11, 0x80, 0x8d, 0xba, 0x10, 0x80, ++0x50, 0xa0, 0x00, 0xb0, 0x08, 0x22, 0x11, 0x80, 0x18, 0x96, 0x11, 0x80, 0xd2, 0x06, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x1d, 0xb2, 0x7c, 0x4a, 0x55, 0x9a, 0x20, 0x6b, 0x6c, 0xea, 0x2d, 0x2a, ++0x1b, 0xb2, 0x60, 0xf1, 0x50, 0xa2, 0x04, 0x72, 0x28, 0x60, 0x03, 0x72, 0x26, 0x60, 0x19, 0xb2, 0x40, 0x9a, 0x23, 0x2a, 0x18, 0xb2, 0x40, 0xa2, 0x01, 0x6f, 0x18, 0xb3, 0x56, 0x36, 0xec, 0xee, ++0x01, 0x4e, 0x64, 0x6f, 0xf8, 0xee, 0x80, 0xab, 0xff, 0x6d, 0x12, 0xee, 0xc2, 0xec, 0x12, 0x61, 0x40, 0x6b, 0x4c, 0xeb, 0xac, 0xeb, 0x13, 0x23, 0x07, 0x6b, 0x4c, 0xeb, 0xac, 0xeb, 0x0f, 0x23, ++0x80, 0x18, 0x8f, 0x2e, 0x00, 0x65, 0x00, 0x6c, 0x01, 0x2a, 0x01, 0x6c, 0x00, 0x18, 0x4a, 0x24, 0x00, 0x65, 0x05, 0x10, 0x01, 0x4c, 0x80, 0xcb, 0x02, 0x10, 0x01, 0x6a, 0x01, 0x10, 0x00, 0x6a, ++0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0x4c, 0x00, 0x11, 0x80, 0x2c, 0x52, 0x11, 0x80, 0xe8, 0x3b, 0x11, 0x80, 0x18, 0x96, 0x11, 0x80, 0x16, 0x96, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, ++0x12, 0xb2, 0xa0, 0xa2, 0x40, 0x6a, 0x60, 0x9c, 0xac, 0xea, 0xff, 0x6c, 0x0d, 0x22, 0x07, 0x6a, 0xac, 0xea, 0x8c, 0xea, 0x09, 0x22, 0x8c, 0xeb, 0x13, 0x23, 0x00, 0x6b, 0x0c, 0xb2, 0x60, 0xca, ++0x00, 0x18, 0x4a, 0x24, 0x01, 0x6c, 0x0c, 0x10, 0xff, 0x6a, 0x6c, 0xea, 0x09, 0x22, 0x09, 0xb2, 0x60, 0xa2, 0x1e, 0x6a, 0x6c, 0xea, 0x06, 0x6b, 0x6e, 0xea, 0x02, 0x2a, 0x06, 0xb3, 0x40, 0xc3, ++0x05, 0x97, 0x00, 0x6a, 0x00, 0xef, 0x03, 0x63, 0x18, 0x96, 0x11, 0x80, 0x16, 0x96, 0x11, 0x80, 0x44, 0x20, 0x11, 0x80, 0xd2, 0x06, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x06, 0xb2, 0x60, 0xa2, ++0x07, 0x6a, 0x6c, 0xea, 0x03, 0x22, 0x00, 0x18, 0x4a, 0x24, 0x01, 0x6c, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0x18, 0x96, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x06, 0xb2, 0x60, 0xa2, ++0x07, 0x6a, 0x6c, 0xea, 0x03, 0x22, 0x00, 0x18, 0x4a, 0x24, 0x00, 0x6c, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0x18, 0x96, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x12, 0xb2, 0x60, 0xa2, ++0x40, 0x6a, 0x6c, 0xea, 0x08, 0x22, 0x07, 0x6a, 0x6c, 0xea, 0xff, 0x6b, 0x6c, 0xea, 0x03, 0x22, 0x00, 0x18, 0x4a, 0x24, 0x00, 0x6c, 0x0d, 0xb3, 0x0d, 0xb2, 0x60, 0xda, 0x0d, 0xb3, 0x7c, 0x4b, ++0x0d, 0xb2, 0x78, 0x9b, 0x6c, 0xea, 0x08, 0x22, 0x0c, 0xb2, 0x54, 0xf5, 0x0f, 0x6b, 0x60, 0xda, 0x03, 0x10, 0x00, 0x1c, 0xb7, 0x1b, 0x00, 0x65, 0x09, 0xb2, 0x40, 0x9a, 0xfa, 0x2a, 0x05, 0x97, ++0x00, 0xef, 0x03, 0x63, 0x18, 0x96, 0x11, 0x80, 0x20, 0x4e, 0xa5, 0x01, 0x78, 0xa0, 0x00, 0xb0, 0x4c, 0x00, 0x11, 0x80, 0x00, 0x00, 0x40, 0x00, 0xb8, 0xa0, 0x00, 0xb0, 0xe8, 0x3b, 0x11, 0x80, ++0xf1, 0x63, 0x1d, 0x62, 0x1c, 0xd1, 0x1b, 0xd0, 0xff, 0xf7, 0x1f, 0x6a, 0x8c, 0xea, 0x00, 0x1c, 0x73, 0x1b, 0x16, 0xd2, 0x16, 0x94, 0x88, 0x33, 0x58, 0xb4, 0x6d, 0xe4, 0x82, 0x67, 0x00, 0x1c, ++0x7a, 0x1b, 0x00, 0x9b, 0x00, 0x6a, 0x15, 0xd2, 0x17, 0xd2, 0x9f, 0x10, 0x23, 0xa8, 0x45, 0x29, 0x15, 0x94, 0xff, 0x6a, 0x01, 0x4c, 0x4c, 0xec, 0x0b, 0x5c, 0x15, 0xd4, 0x06, 0x61, 0x00, 0x1c, ++0x73, 0x1b, 0x00, 0x65, 0x82, 0x67, 0x26, 0xd8, 0x0f, 0x10, 0x00, 0x1c, 0x73, 0x1b, 0x00, 0x65, 0x82, 0x67, 0x47, 0x98, 0x02, 0x72, 0x2b, 0x61, 0x17, 0x92, 0x0e, 0x2a, 0x16, 0x93, 0x68, 0x32, ++0x46, 0xb3, 0x49, 0xe3, 0x60, 0x9a, 0x04, 0x2b, 0x00, 0x1c, 0x7a, 0x1b, 0x00, 0x65, 0x7f, 0x10, 0x66, 0x98, 0x14, 0xd3, 0x60, 0xda, 0x05, 0x10, 0x46, 0x98, 0x17, 0x93, 0x46, 0xdb, 0x46, 0x98, ++0x14, 0xd2, 0x01, 0x6a, 0x47, 0xd8, 0x00, 0x6a, 0x00, 0x1c, 0x7a, 0x1b, 0x46, 0xd8, 0x43, 0x98, 0x03, 0x22, 0x80, 0x98, 0x40, 0xea, 0xa5, 0x98, 0x44, 0x98, 0x01, 0x72, 0x65, 0x61, 0x47, 0x98, ++0x01, 0x72, 0x62, 0x61, 0x80, 0x98, 0x20, 0x18, 0x7a, 0x34, 0xa2, 0x98, 0x5d, 0x10, 0x00, 0x1c, 0x7a, 0x1b, 0x00, 0x65, 0x06, 0x98, 0x14, 0xd0, 0x57, 0x10, 0x00, 0x1c, 0x73, 0x1b, 0x00, 0x65, ++0x82, 0x67, 0x47, 0x98, 0x02, 0x72, 0x09, 0x61, 0x43, 0xa8, 0x66, 0x98, 0xff, 0x4a, 0x43, 0xc8, 0x00, 0x1c, 0x7a, 0x1b, 0x14, 0xd3, 0x17, 0xd0, 0x04, 0x10, 0x00, 0x1c, 0x7a, 0x1b, 0x00, 0x65, ++0x14, 0xd0, 0x47, 0x98, 0x02, 0x72, 0x40, 0x61, 0x63, 0x98, 0x25, 0xb2, 0x4b, 0xe3, 0x3c, 0x2a, 0xc0, 0xf2, 0x0c, 0x69, 0x38, 0xea, 0x23, 0xb3, 0x12, 0xe9, 0x65, 0xe1, 0x8b, 0x99, 0x60, 0x98, ++0x8e, 0xeb, 0x2d, 0x2b, 0xe0, 0xf0, 0xa3, 0xa1, 0x12, 0x04, 0x00, 0x18, 0x44, 0x97, 0x18, 0xd2, 0x0b, 0x6b, 0x04, 0xd3, 0x1c, 0xb3, 0x05, 0xd3, 0x18, 0x92, 0x12, 0x93, 0x02, 0x6c, 0x07, 0xd2, ++0x06, 0xd3, 0xe0, 0xf0, 0x43, 0xa1, 0xfa, 0x6d, 0xe4, 0xf5, 0x1e, 0x6e, 0x08, 0xd2, 0xe0, 0xf0, 0x4e, 0xa1, 0x64, 0xf4, 0x14, 0x6f, 0x09, 0xd2, 0x4d, 0x99, 0x0a, 0xd2, 0x60, 0xf2, 0x52, 0xa1, ++0x0b, 0xd2, 0x60, 0xf2, 0x53, 0xa1, 0x0c, 0xd2, 0x4c, 0x99, 0x0d, 0xd2, 0x40, 0x98, 0x0e, 0xd2, 0x43, 0xa8, 0x0f, 0xd2, 0x48, 0x98, 0x20, 0x18, 0xa3, 0x30, 0x10, 0xd2, 0x05, 0x10, 0x01, 0x4a, ++0xff, 0x6b, 0x6c, 0xea, 0x0a, 0x5a, 0xc4, 0x61, 0x14, 0x90, 0x5f, 0xf7, 0x1f, 0x28, 0x1d, 0x97, 0x1c, 0x91, 0x1b, 0x90, 0x00, 0xef, 0x0f, 0x63, 0xb8, 0x8a, 0x11, 0x80, 0xe5, 0xb9, 0x04, 0x80, ++0x20, 0x56, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x44, 0xac, 0xc8, 0x72, 0x04, 0x61, 0x80, 0x18, 0x38, 0x33, 0x80, 0xac, 0x03, 0x10, 0x20, 0x18, 0x89, 0x35, 0x00, 0x65, ++0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0xf8, 0x63, 0x0f, 0x62, 0x0e, 0xd0, 0x68, 0xa4, 0x01, 0x6a, 0x04, 0x67, 0x6c, 0xea, 0x04, 0x22, 0x00, 0x18, 0x0a, 0x02, 0x00, 0x65, 0x56, 0x2a, ++0x68, 0xa0, 0x04, 0x6a, 0x6c, 0xea, 0x38, 0xb3, 0x01, 0x22, 0x01, 0x6a, 0x40, 0xc3, 0x68, 0xa0, 0x04, 0x6a, 0x6c, 0xea, 0x04, 0x22, 0x00, 0x18, 0x97, 0x01, 0x90, 0x67, 0x47, 0x2a, 0x68, 0xa0, ++0x08, 0x6a, 0x6c, 0xea, 0x04, 0x22, 0x00, 0x18, 0x72, 0x01, 0x90, 0x67, 0x3f, 0x2a, 0x2f, 0xb2, 0x7c, 0x4a, 0x58, 0x9a, 0x02, 0x6b, 0x6c, 0xea, 0x18, 0x22, 0x68, 0xa0, 0x80, 0x6a, 0x4b, 0xea, ++0x6c, 0xea, 0xff, 0x6b, 0x6c, 0xea, 0x04, 0x22, 0x00, 0x18, 0xf0, 0x01, 0x90, 0x67, 0x2e, 0x2a, 0x68, 0xa0, 0x40, 0x6a, 0x6c, 0xea, 0x04, 0x22, 0x00, 0x18, 0xdc, 0x01, 0x90, 0x67, 0x26, 0x2a, ++0x62, 0x98, 0xc1, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0x37, 0x22, 0x20, 0xb2, 0x80, 0xf0, 0x7c, 0xa2, 0x5d, 0x67, 0x20, 0xf0, 0x70, 0xc2, 0x04, 0x6a, 0x6c, 0xea, 0x07, 0x22, 0x66, 0xa0, 0x7f, 0x6a, ++0x6c, 0xea, 0x21, 0x6b, 0x6b, 0xeb, 0x6c, 0xea, 0x46, 0xc0, 0x18, 0xb2, 0x20, 0xf0, 0x7b, 0xa2, 0x5d, 0x67, 0x20, 0xf0, 0x74, 0xc2, 0x40, 0x6a, 0x6c, 0xea, 0x05, 0x22, 0x66, 0xa0, 0x21, 0x6a, ++0x4b, 0xea, 0x6c, 0xea, 0x46, 0xc0, 0x00, 0x18, 0x69, 0x37, 0x84, 0x40, 0x05, 0x6a, 0x04, 0xd2, 0x0f, 0xb2, 0x05, 0xd2, 0x40, 0x98, 0x04, 0x6c, 0xfa, 0x6d, 0x06, 0xd2, 0x43, 0x98, 0x44, 0xf5, ++0x1d, 0x6e, 0xa1, 0xf1, 0x1a, 0x6f, 0x07, 0xd2, 0x42, 0x98, 0x08, 0xd2, 0x41, 0x98, 0x09, 0xd2, 0x44, 0x98, 0x20, 0x18, 0xa3, 0x30, 0x0a, 0xd2, 0x0f, 0x97, 0x0e, 0x90, 0x01, 0x6a, 0x00, 0xef, ++0x08, 0x63, 0x00, 0x65, 0x1d, 0x96, 0x11, 0x80, 0x4c, 0x00, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0xf7, 0x63, 0x11, 0x62, 0x10, 0xd1, 0x0f, 0xd0, 0x59, 0xb4, 0x00, 0x6d, 0x00, 0x18, 0x40, 0x33, ++0x28, 0x6e, 0x80, 0x18, 0x95, 0x28, 0x00, 0x65, 0x56, 0xb2, 0x80, 0xf0, 0x9c, 0xa2, 0x40, 0x6b, 0x55, 0xb5, 0x8d, 0xeb, 0x97, 0xaa, 0x80, 0xf0, 0x7c, 0xc2, 0x08, 0x6b, 0x8d, 0xeb, 0x96, 0xaa, ++0x77, 0xca, 0x07, 0xf4, 0x01, 0x6b, 0x6b, 0xeb, 0x8c, 0xeb, 0x50, 0xb4, 0x76, 0xca, 0x60, 0x9c, 0xad, 0xeb, 0x60, 0xdc, 0x00, 0x6c, 0x4e, 0xb3, 0x80, 0xcb, 0x78, 0xaa, 0x4d, 0xb2, 0x80, 0xa2, ++0x01, 0x6d, 0x8e, 0x32, 0xac, 0xea, 0x50, 0x36, 0x11, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0x92, 0x33, 0xac, 0xeb, 0xcd, 0xea, 0x60, 0x33, 0xff, 0xf5, 0x1e, 0x4d, 0x64, 0x33, 0xac, 0xea, 0x6d, 0xea, ++0x07, 0x6b, 0x8c, 0xeb, 0x04, 0x53, 0x04, 0x61, 0x07, 0x6b, 0x6b, 0xeb, 0x4c, 0xeb, 0x07, 0x10, 0x03, 0x6c, 0x6c, 0xec, 0x84, 0x33, 0x07, 0x6c, 0x8b, 0xec, 0x4c, 0xec, 0x8d, 0xeb, 0x39, 0xb2, ++0x78, 0xca, 0x3c, 0xb2, 0x60, 0xa2, 0x07, 0x6a, 0x6c, 0xea, 0x03, 0x22, 0x00, 0x18, 0x4a, 0x24, 0x00, 0x6c, 0x38, 0xb2, 0x60, 0xa2, 0x80, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0xff, 0x6b, 0x6c, 0xea, ++0x12, 0x22, 0x00, 0x68, 0x00, 0x18, 0x44, 0x1c, 0x01, 0x6c, 0x00, 0x18, 0x4a, 0x24, 0x01, 0x6c, 0x00, 0x18, 0x44, 0x1c, 0x01, 0x6c, 0x00, 0x18, 0x4a, 0x24, 0x00, 0x6c, 0x01, 0x48, 0xff, 0x6a, ++0x4c, 0xe8, 0x04, 0x58, 0xef, 0x61, 0x2c, 0xb2, 0x60, 0xa2, 0x10, 0x6a, 0x6c, 0xea, 0x11, 0x22, 0x2a, 0xb4, 0xa3, 0xa4, 0x09, 0x6a, 0x4b, 0xea, 0xac, 0xea, 0x43, 0xc4, 0x01, 0x6d, 0x28, 0xb4, ++0x76, 0x32, 0xac, 0xea, 0xc0, 0xa4, 0x03, 0x4a, 0x54, 0x35, 0x1f, 0x6a, 0xcc, 0xea, 0xad, 0xea, 0x40, 0xc4, 0x20, 0xb2, 0x00, 0xa2, 0x20, 0xb2, 0xc0, 0xa2, 0x22, 0xb2, 0xa0, 0xa2, 0x22, 0xb2, ++0x04, 0x6c, 0x6c, 0xec, 0x40, 0x9a, 0x65, 0x67, 0x0b, 0x24, 0xc6, 0x34, 0x40, 0xf7, 0x42, 0x32, 0x8e, 0xea, 0x01, 0x6c, 0x8c, 0xea, 0xff, 0x6c, 0x8c, 0xea, 0x00, 0x6b, 0x01, 0x22, 0x01, 0x6b, ++0x1a, 0xb2, 0x07, 0x69, 0xe0, 0x9a, 0x18, 0xb2, 0x80, 0x9a, 0x19, 0xb2, 0x40, 0x9a, 0x04, 0xd1, 0x07, 0xd6, 0x08, 0xd5, 0x0a, 0xd7, 0x0b, 0xd4, 0x16, 0xb1, 0x05, 0x6c, 0xfa, 0x6d, 0x84, 0xf4, ++0x13, 0x6e, 0xa4, 0xf3, 0x12, 0x6f, 0x05, 0xd1, 0x06, 0xd0, 0x09, 0xd3, 0x20, 0x18, 0xa3, 0x30, 0x0c, 0xd2, 0x11, 0x97, 0x10, 0x91, 0x0f, 0x90, 0x00, 0xef, 0x09, 0x63, 0xd8, 0x95, 0x11, 0x80, ++0x4c, 0x00, 0x11, 0x80, 0x00, 0x00, 0x01, 0x00, 0x5c, 0xa0, 0x00, 0xb0, 0x16, 0x96, 0x11, 0x80, 0x18, 0x96, 0x11, 0x80, 0x1c, 0x96, 0x11, 0x80, 0x30, 0x21, 0x11, 0x80, 0x10, 0x21, 0x11, 0x80, ++0xd2, 0x06, 0x11, 0x80, 0x50, 0xa0, 0x00, 0xb0, 0x40, 0xa0, 0x00, 0xb0, 0x2c, 0x00, 0x00, 0xb5, 0xc8, 0xe7, 0x04, 0x80, 0xfb, 0x63, 0x09, 0x62, 0x08, 0xd1, 0x07, 0xd0, 0x18, 0xb2, 0x19, 0xb3, ++0x63, 0xea, 0x26, 0x61, 0x18, 0xb2, 0x80, 0x9a, 0x18, 0xb3, 0x8e, 0xeb, 0x21, 0x2b, 0x02, 0xaa, 0x17, 0xb5, 0x1d, 0x10, 0x17, 0xb4, 0x42, 0x45, 0x43, 0xec, 0x1a, 0x61, 0xc0, 0xa2, 0xff, 0xf7, ++0x1f, 0x6f, 0x43, 0x46, 0x43, 0xe8, 0x14, 0x61, 0x45, 0xe5, 0x23, 0xec, 0x11, 0x61, 0x81, 0xa5, 0x60, 0xa5, 0x80, 0x34, 0x6d, 0xec, 0xec, 0xec, 0xe0, 0xf3, 0x14, 0x5c, 0x09, 0x60, 0x43, 0xe0, ++0x0d, 0xb2, 0x03, 0x4d, 0x91, 0xe2, 0x00, 0x18, 0x0d, 0x33, 0xec, 0xe8, 0xb1, 0x67, 0xe2, 0x28, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x00, 0xef, 0x05, 0x63, 0x00, 0x65, 0xf0, 0xff, 0x10, 0x80, ++0x50, 0xf0, 0x10, 0x80, 0x54, 0xf0, 0x10, 0x80, 0x55, 0xab, 0x23, 0x87, 0x5a, 0xf0, 0x10, 0x80, 0xff, 0xff, 0x10, 0x80, 0x4c, 0x00, 0x11, 0x80, 0xf4, 0x63, 0x17, 0x62, 0x16, 0xd1, 0x15, 0xd0, ++0xff, 0x69, 0x69, 0xb0, 0x61, 0xf3, 0x06, 0x6d, 0x8c, 0xe9, 0x00, 0x18, 0x5c, 0x3b, 0x22, 0x6c, 0x20, 0xf0, 0xbf, 0xa0, 0xf3, 0x6a, 0x24, 0x6c, 0xa0, 0x35, 0x00, 0x18, 0x5c, 0x3b, 0x4d, 0xed, ++0x40, 0xf0, 0xa1, 0xa0, 0x40, 0xf0, 0x40, 0xa0, 0x26, 0x6c, 0xa0, 0x35, 0x00, 0x18, 0x5c, 0x3b, 0x4d, 0xed, 0xeb, 0xf0, 0x12, 0x6d, 0x00, 0x18, 0x5c, 0x3b, 0x28, 0x6c, 0x93, 0xf7, 0x1a, 0x6d, ++0x00, 0x18, 0x5c, 0x3b, 0x2a, 0x6c, 0x00, 0x18, 0x5e, 0x3a, 0x01, 0x6c, 0x02, 0x6c, 0x00, 0x18, 0x5c, 0x3b, 0x20, 0x6d, 0x55, 0xb2, 0xff, 0xf7, 0x1f, 0x6b, 0x60, 0x6d, 0x80, 0xaa, 0x9f, 0xf7, ++0x1f, 0x6a, 0x8c, 0xea, 0x52, 0xb4, 0x80, 0xa4, 0x01, 0x2c, 0x20, 0x6d, 0x4d, 0xed, 0x6c, 0xed, 0x00, 0x18, 0x5c, 0x3b, 0x5e, 0x6c, 0xff, 0x6c, 0x09, 0x4c, 0x00, 0x18, 0x5c, 0x3b, 0x03, 0x6d, ++0x4c, 0xb2, 0x41, 0xa2, 0x00, 0x6d, 0x10, 0xd2, 0x10, 0x93, 0x4b, 0xb2, 0x49, 0xe3, 0x60, 0xaa, 0xff, 0xf7, 0x1f, 0x6a, 0x83, 0x67, 0x49, 0xb3, 0x60, 0xa3, 0x4c, 0xec, 0x11, 0xd4, 0x12, 0xd3, ++0x47, 0xb3, 0x60, 0xa3, 0x0a, 0x2b, 0x41, 0xb3, 0x5e, 0x6c, 0xa0, 0xab, 0x80, 0x6b, 0x4c, 0xed, 0x6d, 0xed, 0x00, 0x18, 0x5c, 0x3b, 0x4c, 0xed, 0xf0, 0x6d, 0x42, 0xb0, 0x42, 0xb4, 0xe0, 0xf3, ++0x1d, 0x6e, 0x00, 0x18, 0x40, 0x33, 0x00, 0x65, 0xa0, 0xa8, 0x01, 0x6e, 0x3e, 0xb4, 0x00, 0x18, 0x42, 0x3b, 0x00, 0x6f, 0x40, 0xa8, 0x01, 0xf4, 0x00, 0x6d, 0xff, 0xf7, 0x1f, 0x68, 0x4d, 0xed, ++0x3a, 0xb2, 0x40, 0xa2, 0x40, 0x32, 0x50, 0x32, 0x4d, 0xed, 0x39, 0xb2, 0x81, 0xa2, 0x00, 0x18, 0x5c, 0x3b, 0x0c, 0xed, 0x11, 0x93, 0xee, 0xf1, 0x09, 0x6a, 0x12, 0x94, 0x6c, 0xea, 0x35, 0xb3, ++0x60, 0xa3, 0x07, 0x6d, 0x8c, 0xed, 0xa0, 0x35, 0x60, 0x33, 0x7c, 0x33, 0xa4, 0x35, 0x6d, 0xed, 0xff, 0x6b, 0x21, 0x4b, 0x6d, 0xea, 0x10, 0x94, 0x4d, 0xed, 0x00, 0x18, 0x5c, 0x3b, 0x0c, 0xed, ++0x02, 0x6c, 0x00, 0x18, 0x5c, 0x3b, 0x20, 0x6d, 0x00, 0x6c, 0x00, 0x18, 0x5c, 0x3b, 0x0d, 0x6d, 0x1f, 0xb2, 0x40, 0xa2, 0x08, 0x22, 0x28, 0xb2, 0x40, 0xa2, 0xc4, 0x6c, 0x40, 0x35, 0x4d, 0xed, ++0x00, 0x18, 0x5c, 0x3b, 0x0c, 0xed, 0x06, 0x6a, 0x04, 0xd2, 0x24, 0xb2, 0x05, 0xd2, 0x21, 0xb2, 0x40, 0xa2, 0x03, 0x6c, 0xfa, 0x6d, 0x06, 0xd2, 0x1c, 0xb2, 0x40, 0xa2, 0x44, 0xf1, 0x06, 0x6e, ++0xc4, 0xf3, 0x1a, 0x6f, 0x07, 0xd2, 0x17, 0xb2, 0x40, 0xaa, 0x08, 0xd2, 0x10, 0xb2, 0x40, 0xa2, 0x09, 0xd2, 0x19, 0xb2, 0x40, 0xa2, 0x0a, 0xd2, 0x11, 0xb2, 0x40, 0xa2, 0x20, 0x18, 0xa3, 0x30, ++0x0b, 0xd2, 0x0b, 0x21, 0x0c, 0x00, 0x90, 0x67, 0x55, 0x6d, 0x00, 0x18, 0x40, 0x33, 0x0a, 0x6e, 0x01, 0x6c, 0x00, 0x6d, 0x00, 0x18, 0x29, 0x3d, 0xd0, 0x67, 0x17, 0x97, 0x16, 0x91, 0x15, 0x90, ++0x00, 0xef, 0x0c, 0x63, 0x4c, 0x00, 0x11, 0x80, 0x5e, 0x00, 0x00, 0xb6, 0x06, 0x96, 0x11, 0x80, 0x3c, 0xf2, 0x04, 0x80, 0x00, 0x00, 0x00, 0xb6, 0x28, 0x05, 0x11, 0x80, 0x08, 0x96, 0x11, 0x80, ++0x04, 0x96, 0x11, 0x80, 0xa0, 0x94, 0x10, 0x80, 0x01, 0x96, 0x11, 0x80, 0x34, 0xf2, 0x04, 0x80, 0x02, 0x96, 0x11, 0x80, 0x07, 0x96, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0xfa, 0x63, 0x0b, 0x62, ++0x0a, 0xd1, 0x09, 0xd0, 0x8e, 0xb2, 0x0d, 0xd5, 0x60, 0xa2, 0x01, 0x6a, 0x04, 0x67, 0x6c, 0xea, 0x26, 0x67, 0x03, 0x22, 0x00, 0x6b, 0x8b, 0xb2, 0x60, 0xda, 0x40, 0xa8, 0x7f, 0xf4, 0x15, 0x72, ++0x36, 0x60, 0x7f, 0xf4, 0x16, 0x6b, 0x63, 0xea, 0x16, 0x60, 0x7f, 0xf4, 0x10, 0x72, 0x67, 0x60, 0xfb, 0x4b, 0x63, 0xea, 0x09, 0x60, 0x1f, 0xf4, 0x16, 0x72, 0x4c, 0x60, 0x7f, 0xf4, 0x0f, 0x72, ++0x00, 0x6d, 0xe0, 0xf0, 0x16, 0x60, 0xe9, 0x10, 0x7f, 0xf4, 0x13, 0x72, 0x36, 0x60, 0x7f, 0xf4, 0x14, 0x72, 0x36, 0x60, 0xe2, 0x10, 0x9f, 0xf4, 0x11, 0x72, 0xa0, 0xf0, 0x0c, 0x60, 0x9f, 0xf4, ++0x12, 0x6b, 0x63, 0xea, 0x09, 0x60, 0x9f, 0xf4, 0x00, 0x72, 0x80, 0xf0, 0x03, 0x60, 0x9f, 0xf4, 0x10, 0x72, 0x80, 0xf0, 0x06, 0x60, 0xd1, 0x10, 0x5f, 0xf5, 0x04, 0x72, 0x48, 0x60, 0x5f, 0xf5, ++0x05, 0x72, 0x3d, 0x60, 0x9f, 0xf4, 0x12, 0x72, 0xa0, 0xf0, 0x0e, 0x60, 0xc6, 0x10, 0x63, 0xa0, 0x6d, 0xb2, 0x60, 0xc2, 0x64, 0xa0, 0x6d, 0xb2, 0x60, 0xc2, 0x46, 0xa0, 0x65, 0xa0, 0x40, 0x32, ++0x6d, 0xea, 0x6b, 0xb3, 0x40, 0xcb, 0x67, 0xa0, 0x6a, 0xb2, 0x60, 0xc2, 0x68, 0xa0, 0x6a, 0xb2, 0x60, 0xc2, 0x69, 0xa0, 0x69, 0xb2, 0x60, 0xc2, 0x7c, 0x10, 0x43, 0xa0, 0x63, 0xb3, 0x5f, 0x10, ++0x67, 0xb2, 0x84, 0xa2, 0x19, 0x6b, 0x6b, 0xeb, 0x6c, 0xec, 0x84, 0xc2, 0x85, 0xa2, 0x8c, 0xeb, 0x65, 0xc2, 0x6f, 0x10, 0x63, 0xb2, 0x60, 0xa2, 0x07, 0x6a, 0x01, 0x68, 0x6c, 0xea, 0x80, 0xf0, ++0x1d, 0x22, 0x00, 0x18, 0x4a, 0x24, 0x00, 0x6c, 0x5f, 0xb2, 0x80, 0x18, 0x8f, 0x2e, 0x00, 0xc2, 0x00, 0x68, 0x80, 0xf0, 0x13, 0x2a, 0x00, 0x18, 0xa3, 0x35, 0x00, 0x65, 0x8f, 0x10, 0x43, 0xa0, ++0x00, 0x6c, 0x01, 0x22, 0x01, 0x6c, 0x80, 0x18, 0x6e, 0x34, 0x00, 0x65, 0x52, 0x10, 0x24, 0xa0, 0x63, 0xa0, 0x1f, 0x6a, 0x4c, 0xe9, 0x55, 0xb2, 0x01, 0x23, 0x01, 0x6b, 0x20, 0xf0, 0x6e, 0xc2, ++0x02, 0x6a, 0x04, 0xd2, 0x52, 0xb2, 0x05, 0xd2, 0x50, 0xb3, 0x20, 0xf0, 0x4e, 0xa3, 0x05, 0x6c, 0xfa, 0x6d, 0x44, 0xf2, 0x06, 0x6e, 0x41, 0xf5, 0x10, 0x6f, 0x06, 0xd2, 0x20, 0x18, 0xa3, 0x30, ++0x07, 0xd1, 0x0c, 0x21, 0x04, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, 0x1f, 0x6b, 0x4c, 0xeb, 0x05, 0x23, 0x2e, 0xeb, 0x03, 0x2b, 0x45, 0xb2, 0x20, 0xf0, 0x2f, 0xc2, 0x85, 0xa0, 0x43, 0xb3, ++0x07, 0x6a, 0x8c, 0xea, 0xa3, 0xa3, 0x50, 0x34, 0x71, 0x6a, 0x4b, 0xea, 0xac, 0xea, 0x8d, 0xea, 0x43, 0xc3, 0x1f, 0x10, 0x63, 0xa0, 0x00, 0x6a, 0x01, 0x23, 0x01, 0x6a, 0x3d, 0xb3, 0x40, 0xc3, ++0x18, 0x10, 0x42, 0xa0, 0x15, 0x72, 0x54, 0x61, 0x3b, 0xb4, 0xa3, 0x40, 0x00, 0x18, 0x0d, 0x33, 0x10, 0x6e, 0x73, 0xa0, 0x39, 0xb2, 0x40, 0xf1, 0x7a, 0xc2, 0x74, 0xa0, 0x40, 0xf1, 0x7b, 0xc2, ++0x75, 0xa0, 0x40, 0xf1, 0x7c, 0xc2, 0x76, 0xa0, 0x40, 0xf1, 0x7d, 0xc2, 0x77, 0xa0, 0x40, 0xf1, 0x7e, 0xc2, 0x00, 0x6d, 0x3e, 0x10, 0x42, 0xa0, 0x12, 0x72, 0x3a, 0x61, 0x30, 0xb4, 0xa3, 0x40, ++0x00, 0x18, 0x0d, 0x33, 0x0d, 0x6e, 0x50, 0xa0, 0x2c, 0xb1, 0xc0, 0xf1, 0x40, 0xc1, 0x51, 0xa0, 0xc0, 0xf1, 0x41, 0xc1, 0x52, 0xa0, 0xc0, 0xf1, 0x42, 0xc1, 0x53, 0xa0, 0xc0, 0xf1, 0x43, 0xc1, ++0x54, 0xa0, 0x80, 0xf1, 0x43, 0xc1, 0xe5, 0x17, 0x42, 0xa0, 0x12, 0x72, 0x21, 0x61, 0x25, 0xb4, 0xa3, 0x40, 0x00, 0x18, 0x0d, 0x33, 0x0d, 0x6e, 0x50, 0xa0, 0x20, 0xb1, 0xc0, 0xf1, 0x44, 0xc1, ++0x51, 0xa0, 0xc0, 0xf1, 0x45, 0xc1, 0x52, 0xa0, 0xc0, 0xf1, 0x46, 0xc1, 0x53, 0xa0, 0xc0, 0xf1, 0x47, 0xc1, 0x54, 0xa0, 0x80, 0xf1, 0x52, 0xc1, 0xcc, 0x17, 0x01, 0x68, 0x0d, 0x93, 0x00, 0x6a, ++0x00, 0xc3, 0x40, 0xc1, 0x00, 0x6a, 0x0b, 0x97, 0x0a, 0x91, 0x09, 0x90, 0x00, 0xef, 0x06, 0x63, 0x12, 0x6d, 0x00, 0x18, 0x8d, 0x8f, 0x80, 0xa8, 0x01, 0x6a, 0xf5, 0x17, 0x1c, 0x96, 0x11, 0x80, ++0xcc, 0x07, 0x11, 0x80, 0x02, 0x96, 0x11, 0x80, 0x01, 0x96, 0x11, 0x80, 0x04, 0x96, 0x11, 0x80, 0x06, 0x96, 0x11, 0x80, 0x07, 0x96, 0x11, 0x80, 0x08, 0x96, 0x11, 0x80, 0xb8, 0x51, 0x11, 0x80, ++0x18, 0x96, 0x11, 0x80, 0xd2, 0x06, 0x11, 0x80, 0x90, 0x95, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0x09, 0x96, 0x11, 0x80, 0x86, 0x01, 0x11, 0x80, 0x4c, 0x00, 0x11, 0x80, 0xd0, 0x01, 0x11, 0x80, ++0xdf, 0x01, 0x11, 0x80, 0xfb, 0x63, 0x09, 0x62, 0x08, 0xd0, 0x16, 0xb0, 0x60, 0xa0, 0x07, 0x6a, 0x6c, 0xea, 0x21, 0x22, 0x00, 0x18, 0x4a, 0x24, 0x01, 0x6c, 0x40, 0xa0, 0x01, 0x6b, 0x14, 0x6c, ++0x56, 0x32, 0x6c, 0xea, 0x00, 0x18, 0xf1, 0x24, 0x84, 0xea, 0x0f, 0xb2, 0x60, 0x9a, 0x24, 0x6a, 0x05, 0x6c, 0x58, 0xeb, 0x0d, 0xb3, 0xfa, 0x6d, 0xc3, 0xf7, 0x03, 0x6e, 0x01, 0xf0, 0x0c, 0x6f, ++0x12, 0xea, 0x49, 0xe3, 0x0a, 0xb3, 0x63, 0xda, 0x00, 0x6a, 0x0a, 0xb3, 0x04, 0xd2, 0x05, 0xd3, 0x20, 0x18, 0xa3, 0x30, 0x06, 0xd2, 0x09, 0x97, 0x08, 0x90, 0x00, 0xef, 0x05, 0x63, 0x00, 0x65, ++0x18, 0x96, 0x11, 0x80, 0x28, 0x00, 0x11, 0x80, 0xb8, 0x8b, 0x11, 0x80, 0x59, 0xcc, 0x10, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x04, 0xd0, 0x0f, 0xb0, 0x60, 0xa0, 0x07, 0x6a, ++0x6c, 0xea, 0x14, 0x22, 0x00, 0x18, 0x4a, 0x24, 0x00, 0x6c, 0x40, 0xa0, 0x01, 0x6b, 0x14, 0x6c, 0x56, 0x32, 0x6c, 0xea, 0x00, 0x18, 0xf1, 0x24, 0x84, 0xea, 0x08, 0xb2, 0x60, 0x9a, 0x24, 0x6a, ++0x58, 0xeb, 0x07, 0xb3, 0x12, 0xea, 0x49, 0xe3, 0x06, 0xb3, 0x63, 0xda, 0x05, 0x97, 0x04, 0x90, 0x00, 0xef, 0x03, 0x63, 0x18, 0x96, 0x11, 0x80, 0x28, 0x00, 0x11, 0x80, 0xb8, 0x8b, 0x11, 0x80, ++0x39, 0xcc, 0x10, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x19, 0xb2, 0xa0, 0x9a, 0x19, 0xb2, 0x60, 0xa2, 0x10, 0x6a, 0x6c, 0xea, 0x26, 0x22, 0x18, 0xb2, 0x80, 0xa2, 0x07, 0x6a, 0x8c, 0xea, 0x21, 0x22, ++0x16, 0xb2, 0x41, 0xaa, 0x80, 0xf4, 0x40, 0x32, 0x80, 0xf5, 0x42, 0x32, 0xac, 0xea, 0x19, 0x22, 0x40, 0x6a, 0x4b, 0xea, 0xac, 0xea, 0xff, 0x6d, 0xac, 0xea, 0x13, 0x22, 0x40, 0x6a, 0x4c, 0xec, ++0x04, 0x2c, 0x80, 0x18, 0x89, 0x35, 0x00, 0x65, 0x0c, 0x10, 0x00, 0x6d, 0x0c, 0xb4, 0x4c, 0xeb, 0xa0, 0xcc, 0x04, 0x23, 0x80, 0x18, 0xa5, 0x35, 0x00, 0x65, 0x03, 0x10, 0x00, 0x18, 0x4a, 0x24, ++0x01, 0x6c, 0x05, 0x97, 0x00, 0x6a, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0x2c, 0x00, 0x00, 0xb5, 0x1c, 0x96, 0x11, 0x80, 0x18, 0x96, 0x11, 0x80, 0x10, 0x21, 0x11, 0x80, 0x16, 0x96, 0x11, 0x80, ++0xfa, 0x63, 0x0b, 0x62, 0x0a, 0xd1, 0x09, 0xd0, 0x40, 0xac, 0x03, 0xf0, 0x03, 0x6b, 0x04, 0x67, 0x4e, 0xeb, 0x25, 0x67, 0x1c, 0x2b, 0x2f, 0xb2, 0x02, 0x6c, 0xc0, 0xf1, 0x6a, 0xc2, 0xc0, 0xf1, ++0x89, 0xc2, 0xc0, 0xf1, 0x88, 0xc2, 0x2c, 0xb3, 0x80, 0xa3, 0x01, 0x4c, 0x80, 0xc3, 0x03, 0x6b, 0x60, 0xf1, 0x60, 0xc2, 0x00, 0x18, 0x2e, 0xaa, 0x03, 0x6c, 0x28, 0xb3, 0x80, 0xa3, 0x05, 0x6a, ++0x4b, 0xea, 0x8c, 0xea, 0x09, 0x6c, 0x8b, 0xec, 0x8c, 0xea, 0x40, 0xc3, 0x3a, 0x10, 0xff, 0xf5, 0x10, 0x72, 0x0f, 0x61, 0x43, 0xa4, 0x22, 0xb3, 0x02, 0x6c, 0xfa, 0x6d, 0x6d, 0xe2, 0x60, 0x9b, ++0x04, 0xd4, 0x20, 0xb4, 0x05, 0xd4, 0x06, 0xd2, 0x07, 0xd3, 0x04, 0x6c, 0x63, 0xf5, 0x0f, 0x6e, 0x1c, 0x10, 0xff, 0xf5, 0x11, 0x72, 0x25, 0x61, 0x47, 0xa4, 0x66, 0xa4, 0xfa, 0x6d, 0x40, 0x32, ++0x6d, 0xea, 0x65, 0xa4, 0x40, 0x32, 0x63, 0xf5, 0x1b, 0x6e, 0x6d, 0xea, 0x64, 0xa4, 0x40, 0x32, 0x83, 0xa4, 0x6d, 0xea, 0x12, 0xb3, 0x6d, 0xe4, 0x40, 0xdb, 0x02, 0x6b, 0x04, 0xd3, 0x11, 0xb3, ++0x05, 0xd3, 0x63, 0xa0, 0x07, 0xd2, 0x04, 0x6c, 0x06, 0xd3, 0xc2, 0xf7, 0x1a, 0x6f, 0x20, 0x18, 0xa3, 0x30, 0x00, 0x65, 0x80, 0xa8, 0x00, 0x6d, 0x00, 0x18, 0x2b, 0x54, 0xc5, 0x67, 0x66, 0x6a, ++0x40, 0xc1, 0x0b, 0x97, 0x0a, 0x91, 0x09, 0x90, 0x00, 0x6a, 0x00, 0xef, 0x06, 0x63, 0x00, 0x65, 0x2c, 0x52, 0x11, 0x80, 0xb5, 0x51, 0x11, 0x80, 0x30, 0x3b, 0x11, 0x80, 0x00, 0xa0, 0x00, 0xb0, ++0xc8, 0xe7, 0x04, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x62, 0xa4, 0x80, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0xff, 0x6d, 0xac, 0xea, 0x0b, 0x22, 0x1d, 0xb2, 0xa1, 0xa2, 0x0c, 0x6a, 0xac, 0xea, 0x0c, 0x72, ++0x09, 0x60, 0x7f, 0x6a, 0x6c, 0xea, 0x21, 0x6b, 0x6b, 0xeb, 0x02, 0x10, 0x21, 0x6a, 0x4b, 0xea, 0x6c, 0xea, 0x42, 0xc4, 0x62, 0xa4, 0xa0, 0x6a, 0x4c, 0xeb, 0x0e, 0x23, 0x14, 0xb4, 0x96, 0xac, ++0x14, 0xb5, 0x01, 0x6e, 0x82, 0x34, 0x96, 0x34, 0x40, 0x9d, 0xcc, 0xec, 0x12, 0xb6, 0x80, 0x34, 0x80, 0x34, 0xcc, 0xea, 0x8d, 0xea, 0x40, 0xdd, 0x0c, 0xb2, 0x80, 0xa2, 0x1e, 0x6a, 0x8c, 0xea, ++0x02, 0x72, 0x0e, 0x61, 0x0d, 0xb2, 0x40, 0xa2, 0x0b, 0x22, 0x0d, 0xb2, 0x40, 0xa2, 0x01, 0x72, 0x02, 0x61, 0x00, 0x6c, 0x02, 0x23, 0x04, 0x2a, 0x01, 0x6c, 0x00, 0x18, 0xbe, 0x33, 0x00, 0x65, ++0x05, 0x97, 0x00, 0x6a, 0x00, 0xef, 0x03, 0x63, 0x44, 0x20, 0x11, 0x80, 0x4c, 0x00, 0x11, 0x80, 0x5c, 0xa0, 0x00, 0xb0, 0xff, 0xff, 0xfe, 0xff, 0x1d, 0x96, 0x11, 0x80, 0xd2, 0x06, 0x11, 0x80, ++0xfd, 0x63, 0x05, 0x62, 0xff, 0x6e, 0x8c, 0xee, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6c, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0xfa, 0x63, 0x0b, 0x62, 0x0a, 0xd1, 0x09, 0xd0, ++0xff, 0xf7, 0x1f, 0x69, 0x04, 0x67, 0x2c, 0xe8, 0xd0, 0x67, 0xac, 0xe9, 0x21, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0x80, 0x18, 0x38, 0x36, 0x01, 0x6c, 0x41, 0x6c, 0x01, 0x6d, 0x00, 0x18, ++0x4d, 0xa6, 0x20, 0x6e, 0x46, 0x6c, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x10, 0x6e, 0x47, 0x6c, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6e, 0xd1, 0x67, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, ++0x43, 0x6c, 0x80, 0x18, 0x38, 0x36, 0x00, 0x6c, 0x02, 0x6a, 0x04, 0xd2, 0x01, 0x6c, 0x09, 0xb2, 0xfa, 0x6d, 0xc3, 0xf1, 0x06, 0x6e, 0xa4, 0xf3, 0x0d, 0x6f, 0x06, 0xd0, 0x07, 0xd1, 0x20, 0x18, ++0xa3, 0x30, 0x05, 0xd2, 0x0b, 0x97, 0x0a, 0x91, 0x09, 0x90, 0x00, 0xef, 0x06, 0x63, 0x00, 0x65, 0xc8, 0xe7, 0x04, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x04, 0xd0, 0x00, 0x68, 0x18, 0xb4, 0x04, 0x32, ++0x49, 0xe4, 0x60, 0xaa, 0xff, 0xf7, 0x1f, 0x73, 0x0e, 0x60, 0x41, 0x40, 0x44, 0x32, 0x49, 0xe4, 0xc0, 0xaa, 0x3f, 0x6c, 0x6c, 0xec, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0x02, 0x48, 0xff, 0x6a, ++0x4c, 0xe8, 0x1e, 0x58, 0xeb, 0x61, 0x00, 0x68, 0x0e, 0xb4, 0x04, 0x32, 0x49, 0xe4, 0x60, 0xaa, 0xff, 0xf7, 0x1f, 0x73, 0x0e, 0x60, 0x41, 0x40, 0x44, 0x32, 0x49, 0xe4, 0xc0, 0xaa, 0x3f, 0x6c, ++0x6c, 0xec, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0x02, 0x48, 0xff, 0x6a, 0x4c, 0xe8, 0x22, 0x58, 0xeb, 0x61, 0x05, 0x97, 0x04, 0x90, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0xb0, 0xee, 0x10, 0x80, ++0xec, 0xee, 0x10, 0x80, 0xfb, 0x63, 0x09, 0x62, 0x08, 0xd1, 0x07, 0xd0, 0x0e, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, 0xff, 0xf7, 0x1f, 0x68, 0x22, 0x67, 0x10, 0xf0, 0x00, 0x6e, 0x0c, 0xe9, ++0xcb, 0xee, 0x2d, 0xee, 0x0c, 0xee, 0x0e, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0x24, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, 0xd1, 0x67, 0x0e, 0x6c, 0x00, 0x6d, 0x00, 0x18, 0x4d, 0xa6, ++0x04, 0xd2, 0x04, 0x92, 0xe1, 0xf7, 0x1f, 0x6b, 0x09, 0x97, 0x4c, 0xeb, 0x43, 0x67, 0x0c, 0xea, 0x08, 0x91, 0x07, 0x90, 0x00, 0xef, 0x05, 0x63, 0xfb, 0x63, 0x09, 0x62, 0x08, 0xd1, 0x07, 0xd0, ++0x00, 0x69, 0xe0, 0xf1, 0x18, 0x68, 0x1c, 0xb2, 0x80, 0x6b, 0x6b, 0xeb, 0x90, 0x67, 0x60, 0xc2, 0x00, 0x18, 0x10, 0x23, 0x04, 0x05, 0xbd, 0x67, 0x90, 0xa5, 0x18, 0xb2, 0x2d, 0xe2, 0x01, 0x49, ++0x80, 0xc3, 0x01, 0x48, 0xff, 0xf7, 0x1f, 0x6b, 0x06, 0x59, 0x6c, 0xe8, 0xec, 0x61, 0x00, 0x6b, 0x66, 0xc2, 0x68, 0xc2, 0x67, 0xc2, 0x12, 0xb3, 0xe0, 0xf1, 0x85, 0xa3, 0x01, 0x6b, 0x6c, 0xec, ++0x0c, 0x2c, 0x84, 0xa2, 0xff, 0x6d, 0xff, 0x4c, 0xac, 0xec, 0x1f, 0x5c, 0x06, 0x60, 0x83, 0x82, 0x00, 0x54, 0x03, 0x60, 0x66, 0xc2, 0x67, 0xc2, 0x68, 0xc2, 0x08, 0xb2, 0x66, 0xa2, 0x04, 0x23, ++0x64, 0xa2, 0x07, 0xb2, 0x80, 0xf1, 0x61, 0xc2, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x00, 0xef, 0x05, 0x63, 0x00, 0x65, 0x13, 0xa0, 0x00, 0xb0, 0x0c, 0x96, 0x11, 0x80, 0x4c, 0x00, 0x11, 0x80, ++0xfc, 0x63, 0x07, 0x62, 0x06, 0xd1, 0x05, 0xd0, 0x00, 0x68, 0x24, 0x67, 0x04, 0x32, 0x49, 0xe1, 0x60, 0xaa, 0xff, 0xf7, 0x1f, 0x73, 0x29, 0x60, 0x1e, 0xf0, 0x00, 0x6a, 0x6c, 0xea, 0x0c, 0xf0, ++0x00, 0x72, 0x07, 0x61, 0x41, 0x40, 0x44, 0x32, 0x49, 0xe1, 0x00, 0x18, 0x3f, 0x1c, 0x80, 0xaa, 0x18, 0x10, 0x04, 0xf0, 0x00, 0x72, 0x0b, 0x61, 0xff, 0x6c, 0x8c, 0xeb, 0x40, 0x6a, 0x67, 0x33, ++0x4d, 0xeb, 0x41, 0x40, 0x44, 0x32, 0x49, 0xe1, 0x6c, 0xec, 0x01, 0x6d, 0x07, 0x10, 0x0d, 0x2a, 0x41, 0x40, 0x44, 0x32, 0xff, 0x6c, 0x49, 0xe1, 0x6c, 0xec, 0x00, 0x6d, 0x00, 0x18, 0x4d, 0xa6, ++0xc0, 0xaa, 0x02, 0x48, 0xff, 0x6a, 0x4c, 0xe8, 0xd1, 0x17, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90, 0x00, 0xef, 0x04, 0x63, 0xfd, 0x63, 0x05, 0x62, 0x04, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, ++0x20, 0x6b, 0x4d, 0xeb, 0xff, 0xf7, 0x1f, 0x6e, 0x6c, 0xee, 0x00, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x04, 0x6c, 0x00, 0x18, 0x3f, 0x1c, 0x50, 0x6c, 0x04, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, ++0x05, 0x97, 0x1f, 0x6b, 0x6c, 0xea, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0xf9, 0x63, 0x0d, 0x62, 0x0c, 0xd1, 0x0b, 0xd0, 0xff, 0x68, 0x00, 0x6e, 0x01, 0x6d, 0x8c, 0xe8, 0x00, 0x18, 0x4d, 0xa6, ++0x40, 0x6c, 0x5a, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x5c, 0x6c, 0x01, 0x6d, 0x00, 0x18, 0xab, 0xa5, 0x22, 0x67, 0xff, 0xf7, 0x1f, 0x6b, 0x6c, 0xe9, 0xff, 0xf7, 0x1e, 0x6e, 0x6c, 0xea, ++0x5a, 0x6c, 0x01, 0x6d, 0x2c, 0xee, 0x08, 0xd2, 0x00, 0x18, 0x4d, 0xa6, 0x09, 0xd3, 0x08, 0x92, 0x09, 0x93, 0x03, 0x6e, 0x4d, 0xee, 0x01, 0x6d, 0x6c, 0xee, 0x00, 0x18, 0x4d, 0xa6, 0x5c, 0x6c, ++0x4c, 0xb4, 0x80, 0x18, 0xb0, 0x36, 0x00, 0x65, 0x80, 0x18, 0xcd, 0x36, 0x00, 0x65, 0x08, 0x5a, 0x05, 0x61, 0x02, 0x6c, 0x00, 0x6d, 0x1d, 0xf6, 0x00, 0x6e, 0x04, 0x10, 0x02, 0x6c, 0x00, 0x6d, ++0x19, 0xf6, 0x00, 0x6e, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x65, 0x43, 0xb4, 0x80, 0x18, 0xb0, 0x36, 0x00, 0x65, 0x06, 0x20, 0x90, 0x67, 0x00, 0x18, 0x44, 0x1c, 0x00, 0x68, 0x70, 0x67, 0x23, 0x10, ++0x01, 0x6d, 0xc5, 0x67, 0x00, 0x18, 0x4d, 0xa6, 0x40, 0x6c, 0x41, 0x6c, 0x38, 0xf0, 0x03, 0x6e, 0x00, 0x18, 0x4d, 0xa6, 0x01, 0x6d, 0x00, 0x18, 0x3f, 0x1c, 0x0a, 0x6c, 0x00, 0x68, 0x7e, 0x6c, ++0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x00, 0xf2, 0x00, 0x6b, 0x4c, 0xeb, 0x02, 0x23, 0x00, 0x6b, 0x0a, 0x10, 0x00, 0x18, 0x44, 0x1c, 0x0a, 0x6c, 0x01, 0x48, 0xff, 0xf7, 0x1f, 0x6a, 0x4c, 0xe8, ++0x64, 0x58, 0xed, 0x61, 0x01, 0x6b, 0x2d, 0xb4, 0x80, 0x18, 0xb0, 0x36, 0x09, 0xd3, 0x5a, 0x6c, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0xd1, 0x67, 0x08, 0x96, 0x5c, 0x6c, 0x00, 0x18, 0x4d, 0xa6, ++0x01, 0x6d, 0x01, 0x6d, 0xc5, 0x67, 0x00, 0x18, 0x4d, 0xa6, 0x40, 0x6c, 0x7e, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x01, 0x6d, 0x40, 0x6c, 0x01, 0x6d, 0x00, 0x6e, 0x00, 0x18, 0x4d, 0xa6, 0x08, 0xd2, ++0x09, 0x93, 0x09, 0x23, 0x21, 0x6c, 0x08, 0xf2, 0x00, 0x6e, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0xff, 0xf7, 0x1f, 0x69, 0x07, 0x10, 0x21, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, 0xff, 0xf7, ++0x1f, 0x69, 0x4c, 0xe9, 0x16, 0xb3, 0x01, 0x6a, 0x04, 0x6c, 0xfa, 0x6d, 0xa3, 0xf1, 0x08, 0x6e, 0xc4, 0xf3, 0x15, 0x6f, 0x05, 0xd3, 0x06, 0xd0, 0x09, 0xd3, 0x20, 0x18, 0xa3, 0x30, 0x04, 0xd2, ++0x09, 0x93, 0x02, 0x6a, 0x04, 0xd2, 0x05, 0xd3, 0x08, 0x93, 0xff, 0xf7, 0x1f, 0x6a, 0x05, 0x6c, 0x6c, 0xea, 0xfa, 0x6d, 0xa3, 0xf1, 0x09, 0x6e, 0x44, 0xf5, 0x18, 0x6f, 0x06, 0xd1, 0x20, 0x18, ++0xa3, 0x30, 0x07, 0xd2, 0x51, 0x67, 0x0d, 0x97, 0x0c, 0x91, 0x0b, 0x90, 0x00, 0xef, 0x07, 0x63, 0x70, 0xef, 0x10, 0x80, 0x90, 0xef, 0x10, 0x80, 0x10, 0xf0, 0x10, 0x80, 0xc8, 0xe7, 0x04, 0x80, ++0xf5, 0x63, 0x15, 0x62, 0x14, 0xd1, 0x13, 0xd0, 0x02, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, 0x3f, 0x6c, 0x00, 0x6d, 0xff, 0x69, 0x00, 0x18, 0xab, 0xa5, 0x02, 0x67, 0x2c, 0xea, 0xff, 0xf7, ++0x1f, 0x6b, 0x6c, 0xe8, 0x0c, 0xd2, 0x0c, 0x95, 0x02, 0x30, 0x01, 0x6a, 0x2c, 0xe8, 0x82, 0x67, 0xd0, 0x67, 0xe2, 0x67, 0x11, 0xd3, 0x80, 0x18, 0xdb, 0x36, 0x04, 0xd2, 0x0c, 0x95, 0x03, 0x6a, ++0x00, 0x6c, 0xd0, 0x67, 0x0f, 0x6f, 0x80, 0x18, 0xdb, 0x36, 0x04, 0xd2, 0x42, 0x34, 0x1f, 0x6d, 0x8a, 0x34, 0x56, 0x32, 0xac, 0xec, 0xac, 0xea, 0x0c, 0x95, 0x03, 0x6e, 0x0b, 0xd4, 0x04, 0xd6, ++0x00, 0x6c, 0xd0, 0x67, 0x0f, 0x6f, 0x80, 0x18, 0xdb, 0x36, 0x0a, 0xd2, 0x42, 0x37, 0x1f, 0x6c, 0xea, 0x37, 0x8c, 0xef, 0x09, 0xd7, 0x56, 0x35, 0x8c, 0xed, 0x0b, 0x96, 0x09, 0x94, 0x08, 0xd5, ++0x2c, 0xed, 0x2c, 0xee, 0x2c, 0xec, 0x0d, 0xd5, 0x0a, 0x97, 0x97, 0xe6, 0x10, 0xd6, 0x0d, 0x96, 0x2c, 0xef, 0x0e, 0xd4, 0xd3, 0xe7, 0x00, 0xf6, 0x80, 0x34, 0x00, 0xf6, 0x83, 0x34, 0x98, 0xec, ++0x00, 0xf6, 0xa0, 0x35, 0x00, 0xf6, 0xa3, 0x35, 0x11, 0x93, 0x0f, 0xd7, 0x12, 0xec, 0xb8, 0xed, 0x12, 0xed, 0xb1, 0xe4, 0x6c, 0xec, 0x11, 0x5c, 0x09, 0x60, 0x09, 0x94, 0x0b, 0x95, 0x08, 0x96, ++0x0a, 0x97, 0xa5, 0xe4, 0x27, 0x31, 0x6c, 0xe9, 0xe1, 0xe6, 0x50, 0x10, 0x0c, 0x95, 0xd0, 0x67, 0x03, 0x6a, 0x00, 0x6c, 0x0f, 0x6f, 0x11, 0xd3, 0x80, 0x18, 0xdb, 0x36, 0x04, 0xd2, 0x42, 0x34, ++0x1f, 0x6d, 0x8a, 0x34, 0xac, 0xec, 0x10, 0x96, 0xe4, 0x67, 0x2c, 0xef, 0x56, 0x30, 0xac, 0xe8, 0xf7, 0xe6, 0x00, 0xf6, 0xa0, 0x35, 0x00, 0xf6, 0xa3, 0x35, 0x0d, 0x65, 0x0f, 0x95, 0x0c, 0xe9, ++0x11, 0x93, 0x3b, 0xe5, 0x00, 0xf6, 0xc0, 0x36, 0x00, 0xf6, 0xc3, 0x36, 0xd8, 0xee, 0xa8, 0x67, 0x12, 0xee, 0xb8, 0xed, 0x12, 0xed, 0xb9, 0xe6, 0x0e, 0x95, 0x6c, 0xee, 0x11, 0x5e, 0xff, 0xe5, ++0x0d, 0x95, 0x00, 0xf6, 0xe0, 0x37, 0x00, 0xf6, 0xe3, 0x37, 0x27, 0xe5, 0x00, 0xf6, 0x20, 0x35, 0x00, 0xf6, 0xa3, 0x35, 0xb8, 0xed, 0x12, 0xed, 0xf8, 0xef, 0x12, 0xef, 0xf5, 0xe5, 0x6c, 0xed, ++0x09, 0x60, 0xc3, 0xed, 0x0d, 0x61, 0x0b, 0x97, 0xe5, 0xe4, 0x0a, 0x94, 0x27, 0x31, 0x6c, 0xe9, 0x81, 0xe0, 0x0c, 0x10, 0x11, 0x5d, 0x04, 0x61, 0x00, 0x6c, 0x11, 0x68, 0x10, 0x69, 0x09, 0x10, ++0x09, 0x95, 0x08, 0x96, 0xa5, 0xe4, 0x27, 0x31, 0x6c, 0xe9, 0xc1, 0xe0, 0x07, 0x30, 0x6c, 0xe8, 0x01, 0x6c, 0x1f, 0x6b, 0x4c, 0xeb, 0x08, 0x24, 0x10, 0xf0, 0x00, 0x6a, 0x4b, 0xea, 0x4d, 0xeb, ++0xff, 0xf7, 0x1f, 0x6a, 0x4c, 0xeb, 0x11, 0x10, 0x01, 0x6d, 0xc5, 0x67, 0x00, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x11, 0xd3, 0x46, 0x6c, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6e, 0x00, 0x6c, ++0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0xc4, 0x67, 0x11, 0x93, 0x20, 0x31, 0x28, 0x31, 0x14, 0x30, 0x2d, 0xe8, 0x6d, 0xe8, 0x00, 0x36, 0xc0, 0x36, 0xc3, 0x36, 0xff, 0xf7, 0x1f, 0x6a, 0xc3, 0x36, ++0x4c, 0xee, 0x21, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0x0e, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, 0x21, 0x6c, 0x00, 0x6d, 0x00, 0x18, 0xab, 0xa5, 0x02, 0x67, 0x02, 0x6b, 0x04, 0xd3, ++0x01, 0x6c, 0x09, 0xb3, 0xfa, 0x6d, 0x63, 0xf2, 0x0a, 0x6e, 0xa4, 0xf3, 0x0d, 0x6f, 0x06, 0xd0, 0x05, 0xd3, 0x20, 0x18, 0xa3, 0x30, 0x07, 0xd2, 0x15, 0x97, 0x14, 0x91, 0x13, 0x90, 0x00, 0xef, ++0x0b, 0x63, 0x00, 0x65, 0xc8, 0xe7, 0x04, 0x80, 0xf6, 0x63, 0x13, 0x62, 0x12, 0xd1, 0x11, 0xd0, 0x8c, 0xb3, 0xc0, 0xf1, 0x90, 0xa3, 0x05, 0x6a, 0x4b, 0xea, 0x8c, 0xea, 0x9d, 0x67, 0x20, 0xf0, ++0x50, 0xc4, 0xc0, 0xf1, 0x50, 0xc3, 0x00, 0x18, 0x29, 0xa8, 0x01, 0x68, 0x2c, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, 0xff, 0xf7, 0x1f, 0x69, 0x2c, 0xea, 0xc2, 0x67, 0x0d, 0xee, 0x2c, 0x6c, ++0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0x30, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, 0x2c, 0xea, 0xc2, 0x67, 0x30, 0x6c, 0x00, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x0d, 0xee, 0x7a, 0xb4, 0x00, 0x6d, ++0x00, 0x18, 0x94, 0xa8, 0x5e, 0x6e, 0x79, 0xb4, 0x00, 0x6d, 0x00, 0x18, 0x94, 0xa8, 0x32, 0x6e, 0x80, 0x18, 0x79, 0x36, 0x00, 0x65, 0x62, 0x67, 0x02, 0x6c, 0x75, 0xb2, 0xfa, 0x6d, 0xc3, 0xf2, ++0x12, 0x6e, 0xc4, 0xf3, 0x15, 0x6f, 0x06, 0xd3, 0x0e, 0xd3, 0x04, 0xd0, 0x20, 0x18, 0xa3, 0x30, 0x05, 0xd2, 0x0e, 0x93, 0x8a, 0x4b, 0x6c, 0xe9, 0x10, 0x59, 0x07, 0x60, 0x04, 0xeb, 0x70, 0x67, ++0x30, 0xf4, 0x01, 0x6a, 0x4c, 0xeb, 0x6b, 0xb4, 0x01, 0x2b, 0x6b, 0xb4, 0x00, 0x6d, 0x00, 0x18, 0x94, 0xa8, 0x22, 0x6e, 0x30, 0x6e, 0x69, 0xb4, 0x00, 0x18, 0x94, 0xa8, 0x00, 0x6d, 0x2c, 0x6c, ++0x00, 0x18, 0xab, 0xa5, 0x00, 0x6d, 0xff, 0xf7, 0x1f, 0x68, 0x0c, 0xea, 0x02, 0x69, 0xc2, 0x67, 0x2b, 0xe9, 0x2c, 0xee, 0x2c, 0x6c, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0x30, 0x6c, 0x00, 0x18, ++0xab, 0xa5, 0x00, 0x6d, 0x0c, 0xea, 0xc2, 0x67, 0x30, 0x6c, 0x00, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x2c, 0xee, 0x10, 0x6c, 0x08, 0xf0, 0x00, 0x6e, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0x11, 0x6c, ++0x00, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x3d, 0x6e, 0x12, 0x6c, 0x33, 0xf7, 0x16, 0x6e, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, 0x18, 0x6c, 0x69, 0xf6, 0x0c, 0x6e, 0x00, 0x18, 0x4d, 0xa6, 0x00, 0x6d, ++0x4f, 0xb2, 0x00, 0x9a, 0x4f, 0xb2, 0x4c, 0xe8, 0x46, 0xb2, 0xe0, 0xf1, 0x63, 0xa2, 0xff, 0x73, 0x03, 0x60, 0x04, 0x6a, 0x6c, 0xea, 0x16, 0x2a, 0x4b, 0xb3, 0x81, 0xa3, 0x0c, 0x6a, 0x8c, 0xea, ++0x04, 0x72, 0x13, 0x61, 0x01, 0x6a, 0x04, 0xd2, 0x41, 0xb2, 0x03, 0x6b, 0x05, 0xd2, 0x8a, 0x32, 0x6c, 0xea, 0x83, 0x67, 0xfa, 0x6d, 0x03, 0xf3, 0x13, 0x6e, 0xa4, 0xf3, 0x0c, 0x6f, 0x20, 0x18, ++0xa3, 0x30, 0x06, 0xd2, 0x1e, 0xf0, 0x02, 0x6a, 0x01, 0x10, 0x40, 0xb2, 0x35, 0xb3, 0xe0, 0xf1, 0x83, 0xa3, 0x0d, 0xea, 0xff, 0x74, 0x05, 0x60, 0x08, 0x6b, 0x8c, 0xeb, 0x02, 0x23, 0x3c, 0xb3, ++0x6c, 0xea, 0x37, 0xb3, 0x80, 0x18, 0x5d, 0x36, 0x40, 0xdb, 0x00, 0x18, 0x1b, 0xa7, 0x00, 0x65, 0x00, 0x18, 0xd2, 0xa6, 0x00, 0x65, 0x00, 0x18, 0x1e, 0xa4, 0x00, 0x65, 0x35, 0xb2, 0x40, 0x9a, ++0x61, 0x42, 0x07, 0x23, 0x24, 0x6b, 0x78, 0xea, 0x33, 0xb3, 0x12, 0xea, 0x49, 0xe3, 0x33, 0xb3, 0x63, 0xda, 0x01, 0x6b, 0x32, 0xb2, 0x60, 0xc2, 0x06, 0x6a, 0x04, 0xd2, 0x24, 0xb2, 0x05, 0xd2, ++0x30, 0xb0, 0x46, 0xa0, 0x01, 0x6c, 0xfa, 0x6d, 0x06, 0xd2, 0x41, 0xa0, 0x43, 0xf3, 0x04, 0x6e, 0xa4, 0xf3, 0x11, 0x6f, 0x07, 0xd2, 0x40, 0xa0, 0x08, 0xd2, 0x43, 0xa0, 0x09, 0xd2, 0x42, 0xa0, ++0x0a, 0xd2, 0x44, 0xa0, 0x20, 0x18, 0xa3, 0x30, 0x0b, 0xd2, 0x47, 0xa0, 0x11, 0x22, 0x48, 0xa0, 0x0f, 0x22, 0x83, 0xa0, 0xa1, 0xa0, 0x42, 0xa0, 0x60, 0xa0, 0x80, 0x34, 0xa0, 0x35, 0x51, 0xe4, ++0x75, 0xe5, 0xff, 0xf7, 0x1f, 0x6a, 0x4c, 0xec, 0x80, 0x18, 0x3e, 0x36, 0x4c, 0xed, 0x03, 0x10, 0x80, 0x18, 0x40, 0x37, 0x00, 0x65, 0x00, 0x6c, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x02, 0x6e, ++0x57, 0x6c, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0x10, 0x6e, 0x00, 0x6c, 0x01, 0x6d, 0x00, 0x18, 0x4d, 0xa6, 0xc4, 0x67, 0x13, 0x97, 0x12, 0x91, 0x11, 0x90, 0x00, 0xef, 0x0a, 0x63, 0x00, 0x65, ++0x4c, 0x00, 0x11, 0x80, 0x40, 0x02, 0x11, 0x80, 0x64, 0xed, 0x10, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0x0c, 0xee, 0x10, 0x80, 0xc8, 0xed, 0x10, 0x80, 0x50, 0xee, 0x10, 0x80, 0xac, 0xa0, 0x00, 0xb0, ++0x00, 0x00, 0xef, 0xff, 0x44, 0x20, 0x11, 0x80, 0x01, 0xf0, 0x10, 0x00, 0xff, 0xff, 0xef, 0xff, 0x90, 0x04, 0x11, 0x80, 0xb8, 0x8b, 0x11, 0x80, 0x85, 0xe1, 0x10, 0x80, 0x22, 0x1b, 0x11, 0x80, ++0x0c, 0x96, 0x11, 0x80, 0xfb, 0x63, 0x09, 0x62, 0x08, 0xd1, 0x07, 0xd0, 0x5b, 0xb2, 0x20, 0xf0, 0x6e, 0xa2, 0x03, 0x23, 0x20, 0xf0, 0x4f, 0xa2, 0x26, 0x10, 0x64, 0xa2, 0x41, 0x6a, 0x6c, 0xea, ++0x41, 0x72, 0x0f, 0x61, 0x00, 0x6c, 0x00, 0x18, 0xab, 0xa5, 0xa4, 0x67, 0xff, 0xf7, 0x1f, 0x6b, 0x4c, 0xeb, 0x62, 0x33, 0x72, 0x33, 0x00, 0x6a, 0x16, 0x23, 0x80, 0x18, 0xcd, 0x36, 0x00, 0x65, ++0x12, 0x10, 0xa0, 0xf1, 0x1a, 0x6c, 0x10, 0xf0, 0x0f, 0x6d, 0x00, 0x18, 0x5c, 0x3b, 0x00, 0x65, 0x4b, 0xb2, 0x60, 0xaa, 0xff, 0xf7, 0x1f, 0x6a, 0x6c, 0xea, 0x42, 0x32, 0x3f, 0x6b, 0x6c, 0xea, ++0x46, 0x32, 0xff, 0x6b, 0x6c, 0xea, 0x47, 0xb3, 0x80, 0xf1, 0x81, 0xa3, 0x7f, 0x22, 0x46, 0xb5, 0xa0, 0xa5, 0x7c, 0x2d, 0x8b, 0xe2, 0x00, 0xf6, 0x40, 0x32, 0x00, 0xf6, 0x43, 0x32, 0x04, 0xd2, ++0x42, 0xb2, 0x60, 0xf1, 0x52, 0xa2, 0x5e, 0x2a, 0x80, 0xf1, 0x40, 0xa3, 0x5b, 0x22, 0x80, 0xf1, 0x43, 0xa3, 0x03, 0x2a, 0x01, 0x6a, 0x80, 0xf1, 0x43, 0xc3, 0x3d, 0xb2, 0x00, 0x82, 0x39, 0xb2, ++0x80, 0xf1, 0x43, 0xa2, 0x04, 0x93, 0x5a, 0xeb, 0x01, 0x2a, 0xe5, 0xe8, 0x00, 0x18, 0x9c, 0xa6, 0x12, 0xec, 0x32, 0xb2, 0x20, 0xf0, 0x6e, 0xa2, 0x05, 0x2b, 0x64, 0xa2, 0x41, 0x6a, 0x6c, 0xea, ++0x41, 0x72, 0x40, 0x61, 0x32, 0xb2, 0x40, 0x82, 0x4e, 0xe8, 0x3c, 0x20, 0x31, 0xb2, 0x60, 0xa2, 0x07, 0x5b, 0x02, 0x61, 0x06, 0x6b, 0x60, 0xc2, 0x2e, 0xb2, 0xa0, 0xa2, 0x27, 0xb2, 0x63, 0xa2, ++0x07, 0x6c, 0x72, 0x36, 0x8c, 0xee, 0xc2, 0xed, 0x06, 0x60, 0x8c, 0xed, 0x88, 0x4c, 0xb0, 0x35, 0x6c, 0xec, 0xad, 0xec, 0x83, 0xc2, 0x21, 0xb2, 0x43, 0xa2, 0x07, 0x6b, 0x02, 0x6c, 0x52, 0x32, ++0x6c, 0xea, 0x61, 0x42, 0x8b, 0xec, 0x8c, 0xeb, 0x23, 0xb4, 0x20, 0xf1, 0x16, 0x4b, 0xff, 0xf7, 0x1f, 0x68, 0x8d, 0xe3, 0x20, 0xab, 0x01, 0x6b, 0x4c, 0xeb, 0x6c, 0x33, 0x02, 0x6c, 0x00, 0x6d, ++0x0c, 0xe9, 0x00, 0x18, 0xab, 0xa5, 0x27, 0xeb, 0x1f, 0xf7, 0x01, 0x6b, 0x0c, 0xea, 0x6b, 0xeb, 0x0c, 0xe9, 0x6c, 0xea, 0x20, 0x31, 0x0c, 0xe9, 0xc2, 0x67, 0x02, 0x6c, 0x00, 0x6d, 0x00, 0x18, ++0x4d, 0xa6, 0x2d, 0xee, 0x0f, 0xb2, 0x80, 0xf1, 0x71, 0xa2, 0x10, 0x23, 0x80, 0xf1, 0x72, 0xa2, 0x03, 0x2b, 0x01, 0x6b, 0x80, 0xf1, 0x72, 0xc2, 0x0a, 0xb2, 0x80, 0xf1, 0x52, 0xa2, 0x04, 0x93, ++0x5a, 0xeb, 0x01, 0x2a, 0xe5, 0xe8, 0x00, 0x18, 0x3e, 0xa8, 0x12, 0xec, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x00, 0xef, 0x05, 0x63, 0x00, 0x65, 0x90, 0x95, 0x11, 0x80, 0xba, 0x01, 0x00, 0xb6, ++0x4c, 0x00, 0x11, 0x80, 0x09, 0x96, 0x11, 0x80, 0x2c, 0x52, 0x11, 0x80, 0x25, 0x1b, 0x11, 0x80, 0x78, 0x04, 0x11, 0x80, 0x00, 0x00, 0x00, 0xb6, 0xf9, 0x63, 0x0d, 0x62, 0x0c, 0xd1, 0x0b, 0xd0, ++0xff, 0xf7, 0x1f, 0x69, 0x02, 0x74, 0x0e, 0xd4, 0x0f, 0xd5, 0x11, 0xd7, 0xcc, 0xe9, 0x1d, 0x61, 0x2b, 0xb2, 0x61, 0xa2, 0x0c, 0x6a, 0x6c, 0xea, 0x0c, 0x72, 0x17, 0x61, 0x00, 0x6a, 0x29, 0xb3, ++0x60, 0x9b, 0xc0, 0xf7, 0x62, 0x33, 0x11, 0x23, 0x27, 0xb3, 0x01, 0x4a, 0x43, 0xeb, 0xf7, 0x60, 0x00, 0x6a, 0x26, 0xb3, 0x02, 0x6c, 0xfa, 0x6d, 0xc2, 0xf4, 0x12, 0x6e, 0xe1, 0xf3, 0x00, 0x6f, ++0x04, 0xd2, 0x05, 0xd3, 0x20, 0x18, 0xa3, 0x30, 0x06, 0xd2, 0x21, 0xb0, 0x60, 0xa0, 0x07, 0x6a, 0x6c, 0xea, 0x28, 0x22, 0x00, 0x1c, 0x73, 0x1b, 0x00, 0x65, 0x60, 0xa0, 0x08, 0xd2, 0x40, 0x6a, ++0x6c, 0xea, 0x07, 0x22, 0x00, 0x6b, 0x1b, 0xb2, 0x60, 0xca, 0x00, 0x18, 0x4a, 0x24, 0x01, 0x6c, 0x16, 0x10, 0x19, 0xb4, 0xa0, 0xa4, 0x19, 0xb2, 0x04, 0x6b, 0xac, 0xeb, 0x40, 0x9a, 0x09, 0x23, ++0x40, 0xf7, 0x42, 0x33, 0xa6, 0x32, 0x6e, 0xea, 0x01, 0x6b, 0x6c, 0xea, 0xff, 0x6b, 0x6c, 0xea, 0x02, 0x10, 0x13, 0xb2, 0x40, 0xa2, 0x03, 0x22, 0x00, 0x18, 0xa3, 0x35, 0x00, 0x65, 0x00, 0x1c, ++0x7a, 0x1b, 0x08, 0x94, 0x11, 0x97, 0x0e, 0x94, 0x0f, 0x95, 0x00, 0x18, 0x3e, 0x20, 0xd1, 0x67, 0x0d, 0x97, 0x0c, 0x91, 0x0b, 0x90, 0x00, 0xef, 0x07, 0x63, 0x00, 0x65, 0x44, 0x20, 0x11, 0x80, ++0x1c, 0xa3, 0x00, 0xb0, 0xa0, 0x86, 0x01, 0x00, 0xc8, 0xe7, 0x04, 0x80, 0x18, 0x96, 0x11, 0x80, 0x16, 0x96, 0x11, 0x80, 0x1c, 0x96, 0x11, 0x80, 0x50, 0xa0, 0x00, 0xb0, 0xd2, 0x06, 0x11, 0x80, ++0xfd, 0x63, 0x05, 0x62, 0x04, 0xd0, 0x00, 0x1c, 0x73, 0x1b, 0x00, 0x65, 0x02, 0x67, 0x0f, 0xb2, 0x60, 0x9a, 0x0f, 0xb2, 0x00, 0x6c, 0x6e, 0xea, 0x02, 0x2a, 0x0e, 0xb2, 0x80, 0x9a, 0x0e, 0xb3, ++0x82, 0x34, 0x82, 0x34, 0x40, 0x9b, 0xff, 0xf7, 0x1f, 0x6d, 0x80, 0x34, 0xac, 0xea, 0x80, 0x34, 0x8d, 0xea, 0x40, 0xdb, 0x00, 0x18, 0xfd, 0x25, 0x00, 0x6c, 0x00, 0x1c, 0x7a, 0x1b, 0x90, 0x67, ++0x05, 0x97, 0x04, 0x90, 0x00, 0xef, 0x03, 0x63, 0x60, 0x8b, 0x10, 0x80, 0x32, 0x97, 0x79, 0x23, 0x64, 0x8b, 0x10, 0x80, 0x30, 0x00, 0x00, 0xb5, 0xfb, 0x63, 0x09, 0x62, 0x08, 0xd0, 0x44, 0x67, ++0x80, 0x9c, 0x3f, 0x6b, 0xff, 0x6e, 0x8c, 0xeb, 0x30, 0x73, 0x80, 0xf0, 0x00, 0x61, 0x62, 0xa2, 0x02, 0x6c, 0xa8, 0x43, 0xea, 0x4d, 0xa3, 0xec, 0x5e, 0x61, 0xa4, 0xa2, 0x83, 0xa2, 0x05, 0x5d, ++0x68, 0x60, 0x04, 0x0e, 0xa4, 0x35, 0xb5, 0xe6, 0xa0, 0x8d, 0xb9, 0xe6, 0x00, 0xee, 0x00, 0x65, 0x0f, 0x00, 0x91, 0x01, 0x0b, 0x00, 0x4f, 0x00, 0x5b, 0x00, 0x63, 0xb4, 0x29, 0x10, 0x1e, 0x73, ++0x18, 0x61, 0x00, 0x6b, 0xc0, 0xf2, 0x0c, 0x6d, 0xb8, 0xeb, 0x60, 0xb6, 0x12, 0xed, 0xd5, 0xe5, 0xe0, 0xf0, 0xe3, 0xa5, 0x5e, 0xb6, 0x8e, 0xef, 0x04, 0x2f, 0x40, 0xf2, 0x88, 0x45, 0xa0, 0xde, ++0x16, 0x10, 0x00, 0x6d, 0xa0, 0xde, 0x01, 0x4b, 0xff, 0x6d, 0xac, 0xeb, 0x0a, 0x5b, 0xea, 0x61, 0x40, 0x10, 0x57, 0xb3, 0x80, 0x9b, 0x3d, 0x24, 0x40, 0xf2, 0x08, 0x4c, 0x08, 0x10, 0x0a, 0x6b, ++0x78, 0xec, 0x54, 0xb3, 0x12, 0xec, 0x71, 0xe4, 0x02, 0x10, 0x53, 0xb4, 0x01, 0x10, 0x31, 0x24, 0x62, 0xa2, 0x1e, 0x73, 0x0a, 0x61, 0x62, 0xa4, 0xc1, 0xa4, 0x60, 0x33, 0x60, 0x33, 0xc0, 0x36, ++0x6d, 0xee, 0x60, 0xa4, 0x6d, 0xee, 0x63, 0xa4, 0x0b, 0x10, 0x1f, 0x73, 0x0e, 0x61, 0x66, 0xa4, 0xc5, 0xa4, 0x60, 0x33, 0x60, 0x33, 0xc0, 0x36, 0x6d, 0xee, 0x64, 0xa4, 0x6d, 0xee, 0x67, 0xa4, ++0x00, 0xf6, 0x60, 0x33, 0x6d, 0xee, 0x04, 0x6b, 0x16, 0x10, 0xc9, 0xa4, 0x68, 0xa4, 0xc0, 0x36, 0x6d, 0xee, 0x02, 0x6b, 0x10, 0x10, 0x0d, 0x73, 0x04, 0x61, 0x01, 0x6b, 0x3f, 0xb2, 0x60, 0xc2, ++0x68, 0x10, 0x0c, 0x6c, 0x8e, 0xeb, 0x65, 0x2b, 0x3c, 0xb4, 0xa0, 0xa4, 0x02, 0x25, 0x60, 0xc4, 0x60, 0x10, 0x00, 0x6b, 0xc3, 0x67, 0x81, 0xa2, 0x70, 0x33, 0x63, 0xc2, 0x10, 0x6b, 0x6b, 0xeb, ++0x8c, 0xeb, 0x61, 0xc2, 0xa0, 0x9a, 0x00, 0x18, 0xa5, 0x2e, 0x02, 0x6c, 0x54, 0x10, 0x23, 0x73, 0x52, 0x60, 0x11, 0x73, 0x30, 0x61, 0xa1, 0x9a, 0x82, 0x32, 0x42, 0x32, 0xcc, 0xea, 0x1c, 0x22, ++0xa2, 0x32, 0xcc, 0xea, 0x34, 0x5a, 0x07, 0x61, 0x1f, 0xf7, 0x01, 0x6a, 0x4b, 0xea, 0x4c, 0xed, 0x06, 0xf2, 0x00, 0x6a, 0x4d, 0xed, 0xa2, 0x32, 0xff, 0x6b, 0x6c, 0xea, 0x14, 0x5a, 0x07, 0x60, ++0x1f, 0xf7, 0x01, 0x6a, 0x4b, 0xea, 0x4c, 0xed, 0x02, 0xf4, 0x00, 0x6a, 0x4d, 0xed, 0x00, 0xf6, 0x82, 0x33, 0x23, 0xb2, 0x60, 0xc2, 0x02, 0x10, 0x21, 0xb3, 0x40, 0xc3, 0x20, 0xb2, 0x40, 0xa2, ++0xff, 0x6b, 0xff, 0x4a, 0x6c, 0xea, 0x0e, 0x5a, 0x26, 0x60, 0x01, 0x6b, 0x1d, 0xb2, 0x00, 0x18, 0x4d, 0xf4, 0x60, 0xc2, 0x20, 0x10, 0x1b, 0x73, 0x1c, 0x61, 0x82, 0x34, 0x82, 0x34, 0xcc, 0xec, ++0x03, 0x2c, 0x00, 0xf2, 0x00, 0x68, 0x02, 0x10, 0x20, 0xf2, 0x00, 0x68, 0xa0, 0xf1, 0x06, 0x6c, 0x00, 0x18, 0x5c, 0x3b, 0xb0, 0x67, 0x01, 0x6a, 0x04, 0xd2, 0x04, 0x6c, 0x12, 0xb2, 0xfa, 0x6d, ++0x22, 0xf4, 0x18, 0x6e, 0xa1, 0xf1, 0x14, 0x6f, 0x05, 0xd2, 0x20, 0x18, 0xa3, 0x30, 0x06, 0xd0, 0x02, 0x10, 0x00, 0x6a, 0x01, 0x10, 0x01, 0x6a, 0x09, 0x97, 0x08, 0x90, 0x00, 0xef, 0x05, 0x63, ++0x0a, 0xb4, 0x66, 0x17, 0x24, 0x51, 0x11, 0x80, 0x20, 0x56, 0x11, 0x80, 0x6c, 0x07, 0x11, 0x80, 0x78, 0x51, 0x11, 0x80, 0x54, 0x4d, 0x11, 0x80, 0x00, 0x96, 0x11, 0x80, 0x66, 0x07, 0x11, 0x80, ++0x1e, 0x96, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0x78, 0x4d, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, 0xff, 0x6d, 0x00, 0x18, 0x93, 0x8c, 0xcc, 0xed, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, ++0xfd, 0x63, 0x05, 0x62, 0x44, 0xac, 0xe0, 0xf3, 0x0a, 0x72, 0x04, 0x61, 0x00, 0x18, 0xcb, 0xed, 0x00, 0x65, 0x03, 0x10, 0x00, 0x18, 0x58, 0xf5, 0x00, 0x65, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, ++0xfd, 0x63, 0x05, 0x62, 0x00, 0x18, 0x15, 0x3a, 0x00, 0x65, 0x0c, 0xb2, 0x20, 0xf0, 0x55, 0xa2, 0x05, 0x2a, 0x80, 0xf1, 0x10, 0x6c, 0x00, 0x18, 0x5c, 0x3b, 0x00, 0x6d, 0x08, 0xb2, 0x40, 0x9a, ++0x61, 0x42, 0x07, 0x23, 0x24, 0x6b, 0x78, 0xea, 0x06, 0xb3, 0x12, 0xea, 0x49, 0xe3, 0x06, 0xb3, 0x63, 0xda, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x3c, 0x95, 0x11, 0x80, 0x90, 0x04, 0x11, 0x80, ++0xb8, 0x8b, 0x11, 0x80, 0x85, 0xe1, 0x10, 0x80, 0xfa, 0x63, 0x0b, 0x62, 0x0a, 0xd1, 0x09, 0xd0, 0x44, 0xac, 0x04, 0x67, 0x01, 0x72, 0x1f, 0x61, 0x20, 0x9c, 0x02, 0x6a, 0x04, 0xd2, 0x21, 0xb2, ++0x05, 0xd2, 0x06, 0xd1, 0x41, 0x9c, 0xfa, 0x6d, 0x04, 0x6c, 0xe1, 0xf2, 0x1a, 0x6e, 0x41, 0xf5, 0x0b, 0x6f, 0x20, 0x18, 0xa3, 0x30, 0x07, 0xd2, 0x3f, 0x6a, 0x2c, 0xea, 0x30, 0x72, 0x27, 0x61, ++0x41, 0xa8, 0xff, 0x6b, 0x6c, 0xea, 0x23, 0x2a, 0x17, 0xb3, 0x40, 0xdb, 0x17, 0xb3, 0x40, 0xdb, 0x17, 0xb3, 0x40, 0xdb, 0x1c, 0x10, 0x17, 0xb2, 0x20, 0xa2, 0x19, 0x29, 0x02, 0x6a, 0x04, 0xd2, ++0x10, 0xb2, 0x05, 0xd2, 0x40, 0x9c, 0xfa, 0x6d, 0x21, 0xf3, 0x1c, 0x6e, 0x06, 0xd2, 0x41, 0x9c, 0x41, 0xf5, 0x0c, 0x6f, 0x05, 0x6c, 0x20, 0x18, 0xa3, 0x30, 0x07, 0xd2, 0x0e, 0xb2, 0x40, 0xa2, ++0x06, 0x22, 0x40, 0xa0, 0x30, 0x72, 0x03, 0x60, 0x0c, 0xb2, 0x20, 0xda, 0x03, 0x10, 0x00, 0x18, 0x15, 0x31, 0x90, 0x67, 0x0b, 0x97, 0x0a, 0x91, 0x09, 0x90, 0x00, 0xef, 0x06, 0x63, 0x00, 0x65, ++0xc8, 0xe7, 0x04, 0x80, 0x54, 0x8b, 0x10, 0x80, 0x5c, 0x8b, 0x10, 0x80, 0x68, 0x8b, 0x10, 0x80, 0x67, 0x07, 0x11, 0x80, 0xd0, 0x95, 0x11, 0x80, 0x68, 0x07, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, ++0x00, 0x18, 0xfc, 0xba, 0x00, 0x65, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0xf7, 0x63, 0x11, 0x62, 0x10, 0xd0, 0x00, 0x18, 0x79, 0xbb, 0x04, 0x67, 0x44, 0xa8, 0x20, 0xf3, 0x01, 0x72, 0x4b, 0x61, ++0x28, 0xb2, 0x60, 0xf1, 0x50, 0xa2, 0x03, 0x72, 0x46, 0x61, 0x27, 0xb2, 0x40, 0xaa, 0x01, 0x72, 0x13, 0x61, 0x26, 0xb2, 0x40, 0xa2, 0x01, 0x72, 0x0f, 0x61, 0x25, 0xb2, 0x60, 0xaa, 0xff, 0xf7, ++0x1f, 0x6a, 0x6c, 0xea, 0xff, 0x6b, 0x01, 0x4b, 0x4c, 0xeb, 0x06, 0x23, 0xff, 0xf6, 0x1f, 0x6d, 0xac, 0x6c, 0x00, 0x18, 0x5c, 0x3b, 0x4c, 0xed, 0x1e, 0xb2, 0x40, 0xa2, 0x01, 0x72, 0x2b, 0x61, ++0x1d, 0xb2, 0x40, 0xa2, 0x28, 0x2a, 0x09, 0x6a, 0x04, 0xd2, 0x1c, 0xb2, 0x05, 0xd2, 0x1c, 0xb2, 0x80, 0xf2, 0x7e, 0xa2, 0x01, 0x6c, 0xfa, 0x6d, 0x06, 0xd3, 0x80, 0xf2, 0x7f, 0xa2, 0x81, 0xf2, ++0x0e, 0x6e, 0xc1, 0xf3, 0x19, 0x6f, 0x07, 0xd3, 0xa0, 0xf2, 0x60, 0xa2, 0x08, 0xd3, 0xa0, 0xf2, 0x61, 0xa2, 0x09, 0xd3, 0xa0, 0xf2, 0x62, 0xa2, 0x0a, 0xd3, 0xa0, 0xf2, 0x63, 0xa2, 0x0b, 0xd3, ++0xa0, 0xf2, 0x68, 0xa2, 0x0c, 0xd3, 0xa0, 0xf2, 0x66, 0xaa, 0x0d, 0xd3, 0xa0, 0xf2, 0x44, 0xaa, 0x20, 0x18, 0xa3, 0x30, 0x0e, 0xd2, 0x11, 0x97, 0x10, 0x90, 0x00, 0xef, 0x09, 0x63, 0x00, 0x65, ++0x2c, 0x52, 0x11, 0x80, 0x40, 0x1a, 0x11, 0x80, 0x3b, 0x1a, 0x11, 0x80, 0xac, 0x00, 0x00, 0xb6, 0xe8, 0x39, 0x11, 0x80, 0xcc, 0x3b, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0x20, 0x56, 0x11, 0x80, ++0xfd, 0x63, 0x05, 0x62, 0x44, 0xac, 0xe0, 0xf1, 0x14, 0x6b, 0x6e, 0xea, 0x04, 0x2a, 0x60, 0xac, 0x05, 0xb5, 0x6d, 0xe5, 0x40, 0xc3, 0x00, 0x18, 0xde, 0x5c, 0x00, 0x65, 0x05, 0x97, 0x00, 0xef, ++0x03, 0x63, 0x00, 0x65, 0xd8, 0x95, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x00, 0x18, 0x03, 0x8e, 0x00, 0x65, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0xfd, 0x63, 0x05, 0x62, 0x44, 0xac, 0x20, 0xf1, ++0x0c, 0x72, 0x0d, 0x61, 0x40, 0x9c, 0x40, 0xaa, 0x01, 0xf4, 0x03, 0x72, 0x08, 0x61, 0x08, 0xb3, 0xc0, 0xf0, 0xaa, 0xab, 0x08, 0xf0, 0x00, 0x6a, 0xad, 0xea, 0xc0, 0xf0, 0x4a, 0xcb, 0x00, 0x18, ++0x5f, 0x5d, 0x00, 0x65, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0x4c, 0x00, 0x11, 0x80, 0xf1, 0x63, 0x1d, 0x62, 0x1c, 0xd1, 0x1b, 0xd0, 0x44, 0xac, 0x60, 0xf2, 0x04, 0x68, 0x4e, 0xe8, ++0x2f, 0x28, 0x71, 0xb2, 0x60, 0xf1, 0x52, 0xa2, 0xc0, 0xf0, 0x13, 0x22, 0x00, 0x1c, 0x73, 0x1b, 0x00, 0x65, 0x00, 0x18, 0xe8, 0x58, 0x22, 0x67, 0x6c, 0xb3, 0xc0, 0xf0, 0x8a, 0xab, 0x08, 0xf0, ++0x01, 0x6a, 0x4b, 0xea, 0x8c, 0xea, 0xc0, 0xf0, 0x4a, 0xcb, 0x69, 0xb2, 0x00, 0xc2, 0x69, 0xb3, 0x69, 0xb2, 0x00, 0xc2, 0x00, 0xcb, 0x00, 0x6a, 0x68, 0xb3, 0x40, 0xc3, 0x68, 0xb3, 0x40, 0xc3, ++0x01, 0x6b, 0x68, 0xb2, 0x60, 0xc2, 0x80, 0x18, 0x23, 0x29, 0x03, 0x6c, 0x00, 0x18, 0x81, 0x56, 0x00, 0x6c, 0x20, 0x18, 0xf1, 0x25, 0x00, 0x65, 0x00, 0x1c, 0x7a, 0x1b, 0x91, 0x67, 0xac, 0x10, ++0x80, 0xf4, 0x00, 0x72, 0xa0, 0xf0, 0x05, 0x61, 0x00, 0x9c, 0x64, 0xa0, 0xab, 0xa8, 0x66, 0x32, 0x13, 0x72, 0x18, 0xd5, 0x05, 0x60, 0x18, 0x72, 0x03, 0x60, 0x17, 0x72, 0x80, 0xf0, 0x05, 0x61, ++0xa4, 0xa4, 0x21, 0x9c, 0x66, 0x33, 0xba, 0xc0, 0x16, 0x04, 0x00, 0x18, 0x44, 0x97, 0x19, 0xd3, 0x19, 0x93, 0x7f, 0x73, 0x04, 0x60, 0x00, 0x6c, 0xe1, 0xf4, 0x16, 0x6f, 0x03, 0x10, 0x85, 0xa0, ++0x01, 0xf4, 0x16, 0x6f, 0x10, 0x6d, 0x44, 0xa0, 0x04, 0xd5, 0x4f, 0xb5, 0x05, 0xd5, 0x16, 0x95, 0x07, 0xd3, 0x08, 0xd4, 0x06, 0xd5, 0x99, 0xa0, 0xa2, 0x67, 0x0a, 0xd1, 0x09, 0xd4, 0x01, 0x6c, ++0x8c, 0xed, 0x0b, 0xd5, 0xab, 0xa8, 0xe0, 0xf7, 0x18, 0x6e, 0x0c, 0xd5, 0x47, 0xb5, 0x25, 0xe5, 0xa4, 0xa1, 0x0e, 0xd2, 0xac, 0xec, 0x0d, 0xd4, 0x45, 0xa0, 0x04, 0x6c, 0xfa, 0x6d, 0x0f, 0xd2, ++0x46, 0xa0, 0x10, 0xd2, 0x47, 0xa0, 0x11, 0xd2, 0x48, 0xa0, 0x12, 0xd2, 0x49, 0xa0, 0x13, 0xd2, 0x4a, 0xa0, 0x14, 0xd2, 0x4b, 0xa0, 0x19, 0xd3, 0x20, 0x18, 0xa3, 0x30, 0x15, 0xd2, 0x18, 0x92, ++0x19, 0x93, 0xff, 0x72, 0x3c, 0x60, 0xc0, 0xf2, 0x0c, 0x69, 0x38, 0xea, 0x38, 0xb2, 0x12, 0xe9, 0x25, 0xe2, 0xe0, 0xf0, 0x46, 0xa1, 0x01, 0x72, 0x32, 0x61, 0xc0, 0xf0, 0x48, 0xa1, 0x0b, 0x72, ++0x11, 0x61, 0x34, 0xb2, 0x80, 0x9a, 0x00, 0x18, 0xe8, 0x1c, 0xb0, 0x67, 0x00, 0xf2, 0x0f, 0xa1, 0x01, 0x6a, 0x4e, 0xe8, 0x41, 0x28, 0x8b, 0x99, 0x00, 0x18, 0xb8, 0x1c, 0x00, 0x6d, 0x00, 0xf2, ++0x0f, 0xc1, 0x3a, 0x10, 0x18, 0x94, 0xb0, 0x67, 0x00, 0x18, 0x58, 0xe2, 0x19, 0xd3, 0x19, 0x93, 0x17, 0x73, 0x05, 0x61, 0x18, 0x95, 0x80, 0x18, 0x08, 0x2f, 0x90, 0x67, 0x10, 0x10, 0x13, 0x73, ++0x05, 0x61, 0x18, 0x95, 0x20, 0x18, 0x05, 0x04, 0x90, 0x67, 0x09, 0x10, 0x18, 0x73, 0x07, 0x61, 0x12, 0x6a, 0xc0, 0xf0, 0x48, 0xc1, 0x18, 0x95, 0x20, 0x18, 0x58, 0x01, 0x90, 0x67, 0x1d, 0xb2, ++0x80, 0x9a, 0x00, 0x18, 0xe8, 0x1c, 0xb0, 0x67, 0x17, 0x10, 0x23, 0x72, 0x12, 0x61, 0x18, 0x93, 0xc0, 0xf2, 0x0c, 0x6a, 0x58, 0xeb, 0x16, 0xb3, 0x12, 0xea, 0x49, 0xe3, 0x60, 0xf2, 0x6e, 0xa2, ++0xff, 0x73, 0x07, 0x61, 0x60, 0xf2, 0x6d, 0xa2, 0xff, 0x73, 0x03, 0x61, 0x05, 0x6b, 0x60, 0xf2, 0x6e, 0xc2, 0x20, 0x18, 0x43, 0x24, 0x00, 0x65, 0x1d, 0x97, 0x1c, 0x91, 0x1b, 0x90, 0x00, 0xef, ++0x0f, 0x63, 0x00, 0x65, 0x2c, 0x52, 0x11, 0x80, 0x4c, 0x00, 0x11, 0x80, 0x01, 0x96, 0x11, 0x80, 0x04, 0x96, 0x11, 0x80, 0x02, 0x96, 0x11, 0x80, 0x06, 0x96, 0x11, 0x80, 0x07, 0x96, 0x11, 0x80, ++0x08, 0x96, 0x11, 0x80, 0xc8, 0xe7, 0x04, 0x80, 0xd4, 0x3b, 0x11, 0x80, 0x20, 0x56, 0x11, 0x80, 0x9c, 0x48, 0x11, 0x80, 0xf9, 0x63, 0x0d, 0x62, 0x0c, 0xd1, 0x0b, 0xd0, 0x01, 0x6b, 0x6b, 0xeb, ++0x25, 0xb2, 0x60, 0xda, 0x00, 0x68, 0x0e, 0x10, 0x0c, 0x6b, 0x78, 0xe8, 0x12, 0xeb, 0x49, 0xe3, 0x62, 0x9a, 0x07, 0x23, 0x20, 0x18, 0x9c, 0x32, 0x81, 0x9a, 0x03, 0x22, 0x1e, 0xb2, 0x00, 0xda, ++0x06, 0x10, 0x01, 0x48, 0x1d, 0xb2, 0x80, 0xf0, 0x64, 0xa2, 0x02, 0xeb, 0xed, 0x60, 0x1c, 0xb3, 0x1c, 0xb2, 0x60, 0xda, 0x1c, 0xb3, 0x7c, 0x4b, 0x1c, 0xb2, 0x78, 0x9b, 0x6c, 0xea, 0x04, 0x22, ++0x1b, 0xb2, 0x54, 0xf5, 0x0f, 0x6b, 0x60, 0xda, 0x1a, 0xb2, 0x40, 0xa2, 0xff, 0x72, 0x07, 0x61, 0x19, 0xb2, 0x40, 0xaa, 0x04, 0x2a, 0x00, 0x18, 0x74, 0x39, 0x00, 0x65, 0x01, 0x10, 0x00, 0x6a, ++0x0d, 0xb3, 0x60, 0x9b, 0x81, 0x43, 0x07, 0x2c, 0x14, 0xb3, 0x60, 0x9b, 0xc7, 0x23, 0xc6, 0x2a, 0x40, 0xeb, 0x00, 0x65, 0xc3, 0x17, 0x0c, 0x68, 0x18, 0xeb, 0x08, 0xb2, 0x04, 0x01, 0xb1, 0x67, ++0x12, 0xe8, 0x41, 0xe0, 0x20, 0x18, 0xa3, 0x32, 0x81, 0x98, 0xb8, 0x2a, 0x40, 0x98, 0x40, 0xea, 0x91, 0x67, 0xb4, 0x17, 0x2c, 0x8a, 0x11, 0x80, 0x30, 0x8a, 0x11, 0x80, 0x20, 0x4e, 0xa5, 0x01, ++0x78, 0xa0, 0x00, 0xb0, 0x4c, 0x00, 0x11, 0x80, 0x00, 0x00, 0x40, 0x00, 0xb8, 0xa0, 0x00, 0xb0, 0x6e, 0x04, 0x11, 0x80, 0x0e, 0x19, 0x11, 0x80, 0x9c, 0x86, 0x11, 0x80, 0xf6, 0x63, 0x13, 0x62, ++0x12, 0xd1, 0x11, 0xd0, 0x09, 0x6a, 0x04, 0xd2, 0x31, 0xb2, 0x05, 0xd2, 0x31, 0xb2, 0x40, 0xaa, 0x01, 0x6c, 0xfa, 0x6d, 0x06, 0xd2, 0x30, 0xb2, 0x40, 0xaa, 0x20, 0xf6, 0x12, 0x6e, 0xa1, 0xf3, ++0x16, 0x6f, 0x07, 0xd2, 0x2d, 0xb2, 0x40, 0x9a, 0x08, 0xd2, 0x2d, 0xb2, 0x40, 0xf0, 0x61, 0xa2, 0x09, 0xd3, 0x40, 0xf0, 0x60, 0xa2, 0x0a, 0xd3, 0x20, 0xf0, 0x7f, 0xa2, 0x0b, 0xd3, 0x20, 0xf0, ++0x7e, 0xa2, 0x0c, 0xd3, 0x20, 0xf0, 0x7d, 0xa2, 0x0d, 0xd3, 0x20, 0xf0, 0x5c, 0xa2, 0x20, 0x18, 0xa3, 0x30, 0x0e, 0xd2, 0x04, 0xf7, 0x10, 0x6d, 0x00, 0x18, 0xcb, 0x31, 0x01, 0x6c, 0x21, 0xb2, ++0x60, 0x9a, 0x21, 0xb2, 0x6e, 0xea, 0x11, 0x2a, 0x20, 0xb1, 0x60, 0x99, 0x20, 0xb2, 0x21, 0xb0, 0x6c, 0xea, 0x4e, 0xe8, 0x0a, 0x28, 0x00, 0xf6, 0x62, 0x33, 0x1f, 0xb2, 0x60, 0xc2, 0x3f, 0xf4, ++0x00, 0x6c, 0x00, 0x18, 0x8d, 0x8f, 0x00, 0x6d, 0x00, 0xd9, 0x1c, 0xb2, 0x80, 0x9a, 0x1c, 0xb3, 0x8e, 0xeb, 0x01, 0x2b, 0x60, 0xda, 0x1b, 0xb2, 0x80, 0x9a, 0x1b, 0xb3, 0x8e, 0xeb, 0x01, 0x2b, ++0x60, 0xda, 0x11, 0xb3, 0x0f, 0xb2, 0x60, 0xda, 0x18, 0xb2, 0x00, 0x6b, 0x60, 0xda, 0x61, 0xda, 0x62, 0xda, 0x63, 0xda, 0x00, 0x1c, 0x43, 0x1b, 0x64, 0xda, 0x80, 0x18, 0xb5, 0x3a, 0x00, 0x65, ++0x13, 0x97, 0x12, 0x91, 0x11, 0x90, 0x00, 0xef, 0x0a, 0x63, 0x00, 0x65, 0xc8, 0xe7, 0x04, 0x80, 0x44, 0x00, 0x11, 0x80, 0x46, 0x00, 0x11, 0x80, 0x68, 0x21, 0x11, 0x80, 0x4c, 0x00, 0x11, 0x80, ++0x58, 0x8b, 0x10, 0x80, 0xef, 0xbe, 0x23, 0x87, 0x5c, 0x8b, 0x10, 0x80, 0xff, 0xff, 0xff, 0x00, 0xee, 0xff, 0xc0, 0x00, 0x80, 0x07, 0x11, 0x80, 0x60, 0x8b, 0x10, 0x80, 0x32, 0x97, 0x79, 0x23, ++0x68, 0x8b, 0x10, 0x80, 0x58, 0x3b, 0x7a, 0x93, 0xd0, 0x74, 0x11, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x13, 0xb3, 0x14, 0xb2, 0x60, 0xda, 0x14, 0xb2, 0x14, 0xb3, 0x63, 0xda, 0x14, 0xb3, 0x72, 0xda, ++0x14, 0xb3, 0x75, 0xda, 0x14, 0xb3, 0x69, 0xda, 0x14, 0xb3, 0x6c, 0xda, 0x14, 0xb3, 0x6f, 0xda, 0x14, 0xb3, 0x66, 0xda, 0x14, 0xb3, 0x7b, 0xda, 0x14, 0xb3, 0x60, 0xda, 0x14, 0xb3, 0x80, 0x18, ++0x95, 0x28, 0x78, 0xda, 0x13, 0xb3, 0x14, 0xb2, 0x60, 0xda, 0x00, 0x6b, 0x13, 0xb2, 0x80, 0x18, 0xe7, 0x3a, 0x60, 0xc2, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0x4d, 0xe6, 0x10, 0x80, ++0xe8, 0x1d, 0x11, 0x80, 0x30, 0x8a, 0x11, 0x80, 0x69, 0xce, 0x10, 0x80, 0xd1, 0xe8, 0x10, 0x80, 0x99, 0xe8, 0x10, 0x80, 0x89, 0xe8, 0x10, 0x80, 0x61, 0xe8, 0x10, 0x80, 0x8d, 0xe7, 0x10, 0x80, ++0x7d, 0xe7, 0x10, 0x80, 0xc9, 0xe6, 0x10, 0x80, 0x81, 0xe6, 0x10, 0x80, 0x61, 0xe6, 0x10, 0x80, 0x19, 0xe3, 0x10, 0x80, 0x64, 0x2f, 0x11, 0x80, 0x00, 0x96, 0x11, 0x80, 0x04, 0x0b, 0x0f, 0x04, ++0x0a, 0x0e, 0x08, 0x0b, 0x0f, 0x00, 0x00, 0x00, 0x1b, 0x00, 0xb7, 0x00, 0x53, 0x01, 0x36, 0x00, 0x6f, 0x01, 0xa7, 0x02, 0x53, 0x00, 0x28, 0x02, 0xfd, 0x03, 0x25, 0x00, 0x07, 0x04, 0x05, 0x01, ++0x00, 0x00, 0x00, 0x00, 0x74, 0x41, 0x01, 0x10, 0xac, 0x80, 0x01, 0xf0, 0x0a, 0x22, 0x62, 0x02, 0x4e, 0x22, 0x9a, 0x06, 0x50, 0x22, 0x9a, 0x06, 0x34, 0x21, 0xf5, 0xff, 0x36, 0x21, 0xff, 0xfe, ++0x18, 0x20, 0x0f, 0x69, 0x34, 0x20, 0x55, 0x22, 0x38, 0x20, 0xa8, 0xc0, 0x25, 0x00, 0x00, 0x72, 0x26, 0x00, 0x00, 0x72, 0x3d, 0x00, 0x00, 0xfe, 0x2e, 0x00, 0x95, 0xa7, 0x32, 0x00, 0x95, 0xa7, ++0x22, 0x00, 0x00, 0x84, 0x27, 0x00, 0xa0, 0x6a, 0x28, 0x00, 0xa0, 0x6a, 0x29, 0x00, 0x03, 0x22, 0x2a, 0x00, 0x01, 0x20, 0x2b, 0x00, 0xc9, 0xad, 0x2f, 0x00, 0xc9, 0xad, 0x33, 0x00, 0x00, 0xc0, ++0x37, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x80, 0x00, 0x0e, 0x00, 0xe2, 0xd1, 0x30, 0x00, 0x23, 0x20, 0x31, 0x00, 0x2a, 0x08, 0x32, 0x00, 0x64, 0x04, 0x33, 0x00, 0x42, 0x40, ++0x34, 0x00, 0xcc, 0x27, 0x35, 0x00, 0xd0, 0x48, 0x36, 0x00, 0x00, 0x40, 0x37, 0x00, 0x10, 0x05, 0x38, 0x00, 0x0c, 0x00, 0x39, 0x00, 0x70, 0x02, 0x22, 0x00, 0x04, 0xc0, 0x2b, 0x00, 0x43, 0x00, ++0x2c, 0x00, 0x43, 0x00, 0x0e, 0x00, 0xe2, 0x51, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x80, 0x00, 0x0e, 0x00, 0xe2, 0xd1, 0x30, 0x00, 0x23, 0x20, 0x31, 0x00, 0x4a, 0x08, 0x32, 0x00, 0x64, 0x04, ++0x33, 0x00, 0x84, 0xf8, 0x34, 0x00, 0x7e, 0x11, 0x35, 0x00, 0xd0, 0xf8, 0x37, 0x00, 0x90, 0x05, 0x38, 0x00, 0x08, 0x00, 0x36, 0x00, 0x00, 0x40, 0x39, 0x00, 0x70, 0x02, 0x22, 0x00, 0x04, 0xc0, ++0x2b, 0x00, 0x43, 0x00, 0x2c, 0x00, 0x43, 0x00, 0x0e, 0x00, 0xe2, 0x51, 0xff, 0xff, 0xff, 0xff, 0x3c, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x06, 0x10, 0x3f, 0x00, 0x01, 0x00, 0x00, 0x60, 0x01, 0x00, ++0x1c, 0x00, 0x21, 0x00, 0x00, 0x60, 0x0a, 0x00, 0x0e, 0x00, 0xe2, 0xd1, 0x35, 0x00, 0xd0, 0x4e, 0x0e, 0x00, 0xe2, 0x51, 0x24, 0x00, 0x01, 0x00, 0x00, 0x60, 0x64, 0x00, 0x0e, 0x00, 0xe2, 0xd1, ++0x35, 0x00, 0xd0, 0x48, 0x0e, 0x00, 0xe2, 0x51, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x3c, 0x00, 0x15, 0x00, 0x16, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x24, 0x10, 0x00, 0x00, 0x10, ++0x11, 0x00, 0x30, 0x00, 0x12, 0x00, 0x00, 0x04, 0x0e, 0x00, 0xe2, 0x51, 0xff, 0xff, 0xff, 0xff, 0x13, 0x00, 0x9b, 0x7d, 0x13, 0x00, 0x0e, 0x60, 0x13, 0x00, 0x9e, 0x5c, 0x13, 0x00, 0x0a, 0x30, ++0x13, 0x00, 0xf8, 0x2f, 0x13, 0x00, 0xc5, 0x1f, 0x13, 0x00, 0x90, 0x00, 0x19, 0x00, 0x9b, 0x7d, 0x19, 0x00, 0x0e, 0x60, 0x19, 0x00, 0x9e, 0x5c, 0x19, 0x00, 0x0a, 0x30, 0x19, 0x00, 0xf8, 0x2f, ++0x19, 0x00, 0xc5, 0x1f, 0x19, 0x00, 0x90, 0x00, 0xff, 0xff, 0xff, 0xff, 0x15, 0x00, 0x40, 0x00, 0x15, 0x00, 0xc0, 0x20, 0x15, 0x00, 0xc0, 0x41, 0x15, 0x00, 0xc0, 0x68, 0x15, 0x00, 0xc0, 0x89, ++0x15, 0x00, 0xc0, 0xb0, 0x15, 0x00, 0xc0, 0xd1, 0x15, 0x00, 0xc0, 0xf3, 0x1a, 0x00, 0x40, 0x00, 0x1a, 0x00, 0xc0, 0x20, 0x1a, 0x00, 0xc0, 0x41, 0x1a, 0x00, 0xc0, 0x68, 0x1a, 0x00, 0xc0, 0x89, ++0x1a, 0x00, 0xc0, 0xb0, 0x1a, 0x00, 0xc0, 0xd1, 0x1a, 0x00, 0xc0, 0xf3, 0xff, 0xff, 0xff, 0xff, 0x08, 0x08, 0x08, 0x08, 0x0b, 0x28, 0x2b, 0x2e, 0x6b, 0x6e, 0x8b, 0x8e, 0xce, 0xee, 0xee, 0xee, ++0xf7, 0xf7, 0xf9, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0d, 0x17, 0x18, 0x19, 0x19, 0x00, 0x00, 0x00, 0xf7, 0xf7, 0x00, 0x00, 0x19, 0x19, 0x00, 0x00, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, ++0x20, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0xc2, 0x10, 0x00, 0x00, 0x30, 0x11, 0x00, 0x3b, 0x00, 0x12, 0x00, 0xfc, 0xe4, ++0x18, 0x00, 0xf8, 0x39, 0x00, 0x00, 0x00, 0x30, 0x01, 0x00, 0x00, 0x17, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x01, 0x00, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x60, 0xf4, 0x01, 0x00, 0x20, 0x01, 0x00, ++0x02, 0x20, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x40, 0x20, 0x00, 0x48, 0x42, 0x20, 0x00, 0x01, 0x44, 0x20, 0x00, 0x48, 0x46, 0x20, 0x00, 0x81, 0x48, 0x20, 0x00, 0x00, 0x4a, 0x20, 0x00, 0xf8, ++0x4c, 0x20, 0x00, 0x00, 0x4e, 0x20, 0xd8, 0x00, 0x50, 0x20, 0x90, 0xcc, 0x52, 0x20, 0x00, 0x18, 0x54, 0x20, 0x10, 0x8c, 0x56, 0x20, 0x00, 0xe0, 0x58, 0x20, 0x00, 0x50, 0x5a, 0x20, 0x00, 0x80, ++0x5c, 0x20, 0x00, 0x20, 0x5e, 0x20, 0x00, 0x00, 0x00, 0x20, 0x01, 0x00, 0x0e, 0x20, 0x01, 0x00, 0x02, 0x20, 0x60, 0xc0, 0x00, 0x60, 0x0a, 0x00, 0x02, 0x20, 0x20, 0xc0, 0x00, 0x60, 0x0a, 0x00, ++0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x20, 0x01, 0x00, 0x02, 0x20, 0x20, 0x00, 0x0c, 0x20, 0x10, 0x00, 0x0e, 0x20, 0x00, 0x80, ++0x00, 0x20, 0x00, 0x00, 0x10, 0x00, 0x00, 0x30, 0x11, 0x00, 0x3c, 0x00, 0x12, 0x00, 0x02, 0x87, 0x18, 0x00, 0x04, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x40, 0x4e, 0xfb, 0x71, 0x4c, 0x30, 0x00, 0x00, 0x62, 0xd5, 0x3d, 0x80 ++}; ++ ++u4Byte ArrayLength_MP_8723B_FW_MP = 31870; ++ ++u1Byte Array_MP_8723B_FW_MP[] = { ++0x01, 0x53, 0x10, 0x00, 0x17, 0x00, 0x03, 0x00, 0x03, 0x04, 0x13, 0x42, 0x5E, 0x7C, 0x00, 0x00, ++0x7D, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x45, 0xED, 0x02, 0x70, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x70, 0xDD, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x7F, 0xCB, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x70, 0x85, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x5F, 0x0D, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x79, 0x56, 0x15, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x15, 0xF0, 0x0F, ++0x00, 0x00, 0x00, 0x00, 0x05, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x05, 0xF0, 0x0F, 0x00, 0x00, ++0x00, 0x00, 0x10, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x10, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, ++0xF5, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x08, 0x03, 0x03, 0x00, 0x04, 0x09, 0x07, 0x03, 0x03, 0x00, ++0x04, 0x08, 0x06, 0x03, 0x02, 0x00, 0x04, 0x08, 0x05, 0x03, 0x01, 0x00, 0x04, 0x0D, 0x0A, 0x07, ++0x05, 0x00, 0x08, 0x0C, 0x0A, 0x07, 0x04, 0x00, 0x08, 0x0B, 0x0A, 0x06, 0x05, 0x00, 0x08, 0x0B, ++0x0A, 0x05, 0x03, 0x00, 0x08, 0x0B, 0x0A, 0x03, 0x02, 0x00, 0x08, 0x14, 0x12, 0x0C, 0x04, 0x00, ++0x10, 0x14, 0x12, 0x09, 0x04, 0x00, 0x10, 0x24, 0x22, 0x1C, 0x12, 0x00, 0x20, 0x24, 0x22, 0x18, ++0x0C, 0x00, 0x20, 0x24, 0x22, 0x14, 0x06, 0x00, 0x20, 0x24, 0x22, 0x0F, 0x04, 0x00, 0x20, 0x24, ++0x21, 0x0A, 0x04, 0x00, 0x20, 0x23, 0x21, 0x0C, 0x04, 0x00, 0x20, 0x23, 0x1F, 0x0A, 0x04, 0x00, ++0x20, 0x22, 0x1F, 0x0F, 0x04, 0x00, 0x20, 0x21, 0x1F, 0x16, 0x0C, 0x00, 0x20, 0x31, 0x2F, 0x20, ++0x14, 0x00, 0x30, 0x31, 0x2F, 0x18, 0x10, 0x00, 0x30, 0x31, 0x2C, 0x18, 0x0C, 0x00, 0x30, 0x31, ++0x2A, 0x14, 0x0C, 0x00, 0x30, 0x31, 0x28, 0x14, 0x00, 0x00, 0x30, 0x31, 0x24, 0x14, 0x00, 0x00, ++0x30, 0x31, 0x1E, 0x14, 0x00, 0x00, 0x30, 0x04, 0x04, 0x04, 0x05, 0x04, 0x04, 0x05, 0x07, 0x07, ++0x07, 0x08, 0x0A, 0x04, 0x07, 0x0A, 0x0E, 0x11, 0x13, 0x14, 0x15, 0x04, 0x04, 0x04, 0x05, 0x07, ++0x07, 0x09, 0x09, 0x0C, 0x0E, 0x10, 0x12, 0x05, 0x06, 0x07, 0x0D, 0x10, 0x11, 0x12, 0x12, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x26, 0x2A, 0x00, 0x00, 0x00, 0x1F, 0x21, ++0x25, 0x27, 0x28, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, 0x00, ++0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x30, 0x00, ++0x00, 0x00, 0x48, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0xC0, 0x00, ++0x00, 0x00, 0xD8, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x78, 0x00, ++0x00, 0x00, 0xA0, 0x00, 0x00, 0x00, 0xF0, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x01, 0x90, 0x00, ++0x00, 0x01, 0xE0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x04, 0x00, 0x08, 0x00, 0x0C, 0x00, 0x12, 0x00, ++0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60, 0x00, 0x6C, 0x00, 0x14, 0x00, 0x32, 0x00, ++0x3C, 0x00, 0x50, 0x00, 0x78, 0x00, 0xA0, 0x00, 0xC8, 0x00, 0xF0, 0x02, 0x04, 0x06, 0x08, 0x0A, ++0x0C, 0x10, 0x18, 0x20, 0x30, 0x40, 0x50, 0x01, 0x01, 0x01, 0x02, 0x01, 0x02, 0x03, 0x03, 0x04, ++0x04, 0x05, 0x05, 0x02, 0x04, 0x06, 0x07, 0x07, 0x08, 0x08, 0x08, 0x01, 0x01, 0x01, 0x01, 0x01, ++0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x19, ++0x06, 0x04, 0x02, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xC2, 0xAF, 0x80, 0xFE, 0x32, 0x12, 0x42, 0x94, 0x85, 0xD0, 0x0B, 0x75, 0xD0, 0x08, 0xAA, 0xE0, ++0xC2, 0x8C, 0xE5, 0x8A, 0x24, 0x67, 0xF5, 0x8A, 0xE5, 0x8C, 0x34, 0x79, 0xF5, 0x8C, 0xD2, 0x8C, ++0xEC, 0x24, 0x87, 0xF8, 0xE6, 0xBC, 0x02, 0x02, 0x74, 0xFF, 0xC3, 0x95, 0x81, 0xB4, 0x40, 0x00, ++0x40, 0xCE, 0x79, 0x03, 0x78, 0x80, 0x16, 0xE6, 0x08, 0x70, 0x0B, 0xC2, 0xAF, 0xE6, 0x30, 0xE1, ++0x03, 0x44, 0x18, 0xF6, 0xD2, 0xAF, 0x08, 0xD9, 0xED, 0xEA, 0x8B, 0xD0, 0x22, 0xE5, 0x0C, 0xFF, ++0x23, 0x24, 0x81, 0xF8, 0x0F, 0x08, 0x08, 0xBF, 0x03, 0x04, 0x7F, 0x00, 0x78, 0x81, 0xE6, 0x30, ++0xE4, 0xF2, 0x00, 0xE5, 0x0C, 0xC3, 0x9F, 0x50, 0x20, 0x05, 0x0C, 0x74, 0x86, 0x25, 0x0C, 0xF8, ++0xE6, 0xFD, 0xA6, 0x81, 0x08, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xCD, 0xF8, 0xE8, ++0x6D, 0x60, 0xE0, 0x08, 0xE6, 0xC0, 0xE0, 0x80, 0xF6, 0xE5, 0x0C, 0xD3, 0x9F, 0x40, 0x27, 0xE5, ++0x0C, 0x24, 0x87, 0xF8, 0xE6, 0xAE, 0x0C, 0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xCD, ++0xF8, 0xE5, 0x81, 0x6D, 0x60, 0x06, 0xD0, 0xE0, 0xF6, 0x18, 0x80, 0xF5, 0xE5, 0x0C, 0x24, 0x86, ++0xC8, 0xF6, 0x15, 0x0C, 0x80, 0xD3, 0xE5, 0x0C, 0x23, 0x24, 0x81, 0xF8, 0x7F, 0x04, 0xC2, 0xAF, ++0xE6, 0x30, 0xE0, 0x03, 0x10, 0xE2, 0x0C, 0x7F, 0x00, 0x30, 0xE1, 0x07, 0x30, 0xE3, 0x04, 0x7F, ++0x08, 0x54, 0xF4, 0x54, 0x7C, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x42, 0x07, 0x22, 0x78, 0x86, 0xA6, ++0x81, 0x74, 0x02, 0x60, 0x06, 0xFF, 0x08, 0x76, 0xFF, 0xDF, 0xFB, 0x7F, 0x03, 0xE4, 0x78, 0x80, ++0xF6, 0x08, 0xF6, 0x08, 0xDF, 0xFA, 0x78, 0x81, 0x76, 0x30, 0x90, 0x46, 0x90, 0x74, 0x01, 0x93, ++0xC0, 0xE0, 0xE4, 0x93, 0xC0, 0xE0, 0x43, 0x89, 0x01, 0x75, 0x8A, 0x60, 0x75, 0x8C, 0x79, 0xD2, ++0x8C, 0xD2, 0xAF, 0x22, 0x02, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0x74, 0x81, ++0x2F, 0x2F, 0xF8, 0xE6, 0x20, 0xE5, 0xF4, 0xC2, 0xAF, 0xE6, 0x44, 0x30, 0xF6, 0xD2, 0xAF, 0xAE, ++0x0C, 0xEE, 0xC3, 0x9F, 0x50, 0x21, 0x0E, 0x74, 0x86, 0x2E, 0xF8, 0xE6, 0xF9, 0x08, 0xE6, 0x18, ++0xBE, 0x02, 0x02, 0x74, 0xFF, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x09, 0xE7, 0x19, 0x19, 0xF7, 0x09, ++0x09, 0x80, 0xF3, 0x16, 0x16, 0x80, 0xDA, 0xEE, 0xD3, 0x9F, 0x40, 0x04, 0x05, 0x81, 0x05, 0x81, ++0xEE, 0xD3, 0x9F, 0x40, 0x22, 0x74, 0x86, 0x2E, 0xF8, 0x08, 0xE6, 0xF9, 0xEE, 0xB5, 0x0C, 0x02, ++0xA9, 0x81, 0x18, 0x06, 0x06, 0xE6, 0xFD, 0xED, 0x69, 0x60, 0x09, 0x19, 0x19, 0xE7, 0x09, 0x09, ++0xF7, 0x19, 0x80, 0xF3, 0x1E, 0x80, 0xD9, 0xEF, 0x24, 0x86, 0xF8, 0xE6, 0x04, 0xF8, 0xEF, 0x2F, ++0x04, 0x90, 0x46, 0x90, 0x93, 0xF6, 0x08, 0xEF, 0x2F, 0x93, 0xF6, 0x7F, 0x00, 0x22, 0xEF, 0xD3, ++0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, 0xEF, 0x23, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE5, 0xF4, ++0xC2, 0xAF, 0xE6, 0x54, 0x8C, 0xF6, 0xD2, 0xAF, 0xE5, 0x0C, 0xB5, 0x07, 0x0A, 0x74, 0x86, 0x2F, ++0xF8, 0xE6, 0xF5, 0x81, 0x02, 0x42, 0xDD, 0x50, 0x2E, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xBF, 0x02, ++0x02, 0x74, 0xFF, 0xFD, 0x18, 0xE6, 0xF9, 0x74, 0x86, 0x2F, 0xF8, 0xFB, 0xE6, 0xFC, 0xE9, 0x6C, ++0x60, 0x08, 0xA8, 0x05, 0xE7, 0xF6, 0x1D, 0x19, 0x80, 0xF4, 0xA8, 0x03, 0xA6, 0x05, 0x1F, 0xE5, ++0x0C, 0xB5, 0x07, 0xE3, 0x7F, 0x00, 0x22, 0x74, 0x87, 0x2F, 0xF8, 0xE6, 0xFD, 0x18, 0x86, 0x01, ++0x0F, 0x74, 0x86, 0x2F, 0xF8, 0xA6, 0x01, 0x08, 0x86, 0x04, 0xE5, 0x0C, 0xB5, 0x07, 0x02, 0xAC, ++0x81, 0xED, 0x6C, 0x60, 0x08, 0x0D, 0x09, 0xA8, 0x05, 0xE6, 0xF7, 0x80, 0xF4, 0xE5, 0x0C, 0xB5, ++0x07, 0xDE, 0x89, 0x81, 0x7F, 0x00, 0x22, 0xEF, 0xD3, 0x94, 0x02, 0x40, 0x03, 0x7F, 0xFF, 0x22, ++0xEF, 0x23, 0x24, 0x81, 0xF8, 0xC2, 0xAF, 0xE6, 0x30, 0xE5, 0x05, 0x30, 0xE0, 0x02, 0xD2, 0xE4, ++0xD2, 0xE2, 0xC6, 0xD2, 0xAF, 0x7F, 0x00, 0x30, 0xE2, 0x01, 0x0F, 0x02, 0x42, 0xDC, 0x8F, 0xF0, ++0xE4, 0xFF, 0xFE, 0xE5, 0x0C, 0x23, 0x24, 0x80, 0xF8, 0xC2, 0xA9, 0x30, 0xF7, 0x0D, 0x7F, 0x08, ++0xE6, 0x60, 0x0B, 0x2D, 0xF6, 0x60, 0x30, 0x50, 0x2E, 0x80, 0x07, 0x30, 0xF1, 0x06, 0xED, 0xF6, ++0x60, 0x25, 0x7E, 0x02, 0x08, 0x30, 0xF0, 0x10, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x23, 0x0E, 0x30, ++0xE2, 0x0C, 0xD2, 0xAF, 0x7F, 0x04, 0x80, 0x12, 0xC2, 0xAF, 0xE6, 0x10, 0xE7, 0x13, 0x54, 0xEC, ++0x4E, 0xF6, 0xD2, 0xAF, 0x02, 0x42, 0xDD, 0x7F, 0x08, 0x08, 0xEF, 0x44, 0x83, 0xF4, 0xC2, 0xAF, ++0x56, 0xC6, 0xD2, 0xAF, 0x54, 0x80, 0x4F, 0xFF, 0x22, 0xEF, 0x2B, 0xFF, 0xEE, 0x3A, 0xFE, 0xED, ++0x39, 0xFD, 0xEC, 0x38, 0xFC, 0x22, 0xEF, 0x5B, 0xFF, 0xEE, 0x5A, 0xFE, 0xED, 0x59, 0xFD, 0xEC, ++0x58, 0xFC, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, 0x48, 0xFC, 0x22, ++0xEB, 0x9F, 0xF5, 0xF0, 0xEA, 0x9E, 0x42, 0xF0, 0xE9, 0x9D, 0x42, 0xF0, 0xE8, 0x9C, 0x45, 0xF0, ++0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xE4, 0x93, 0xFC, ++0x74, 0x01, 0x93, 0xFD, 0x74, 0x02, 0x93, 0xFE, 0x74, 0x03, 0x93, 0xFF, 0x22, 0xE0, 0xF8, 0xA3, ++0xE0, 0xF9, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0x22, 0xE4, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF9, ++0x74, 0x02, 0x93, 0xFA, 0x74, 0x03, 0x93, 0xFB, 0x22, 0xA4, 0x25, 0x82, 0xF5, 0x82, 0xE5, 0xF0, ++0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, 0xA3, 0xE0, 0xF9, 0x22, 0xEB, 0xF0, ++0xA3, 0xEA, 0xF0, 0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, 0x12, ++0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83, ++0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0x02, 0x46, 0x2B, ++0x02, 0x43, 0x6D, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, 0x80, 0x01, 0xF2, ++0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, 0x33, ++0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, 0xDF, ++0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x46, 0x70, 0xE4, 0x7E, ++0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, 0x93, ++0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, 0xE4, 0x93, 0xA3, ++0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, ++0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, 0xE7, 0x80, 0xBE, ++0x00, 0x41, 0xA3, 0xE4, 0x00, 0x41, 0xA3, 0xE5, 0x00, 0x41, 0xA3, 0xE6, 0x00, 0x41, 0xA3, 0xEA, ++0x00, 0x01, 0x70, 0x00, 0x41, 0xA3, 0xEB, 0x00, 0x41, 0xA3, 0xEC, 0x00, 0x41, 0xA4, 0x0D, 0x00, ++0x53, 0x1C, 0x57, 0xFB, 0x68, 0x0E, 0x7F, 0x02, 0xD1, 0xD6, 0xEF, 0x44, 0x01, 0xFD, 0x7F, 0x02, ++0xD1, 0xAC, 0x7F, 0x02, 0xD1, 0xD6, 0xEF, 0x54, 0xFE, 0xFD, 0x7F, 0x02, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x8F, 0x82, 0x75, 0x83, 0x00, 0xED, 0xF0, 0x7F, 0x10, 0x7E, 0x00, 0x12, 0x3E, ++0x50, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0xA3, 0xD1, 0xD6, 0xEF, 0x54, 0xF8, 0x44, 0x05, 0xFD, ++0x7F, 0xA3, 0xD1, 0xAC, 0x7F, 0xA0, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x82, 0x75, ++0x83, 0x00, 0xE0, 0x90, 0xA4, 0x04, 0xF0, 0x7F, 0x10, 0x7E, 0x00, 0x12, 0x3E, 0x50, 0x90, 0xA4, ++0x04, 0xE0, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0xFF, 0x12, 0x49, 0x5E, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x4C, 0x08, 0xD1, 0xA2, 0xD1, 0x96, 0xD1, 0x96, 0x90, 0x01, 0x00, ++0x74, 0x3F, 0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x20, 0xF0, 0x90, ++0xA1, 0xBE, 0xE0, 0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x06, 0x90, 0x07, 0x78, 0x74, ++0x01, 0xF0, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x37, 0x90, 0xA2, 0x0C, 0xE0, 0x60, 0x08, 0x90, 0xA3, ++0xFC, 0x74, 0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0xA3, 0xFC, 0xF0, 0x90, 0xA1, 0xBE, 0xE0, 0xC4, ++0x13, 0x54, 0x07, 0x30, 0xE0, 0x07, 0xE4, 0x90, 0xA3, 0xFD, 0xF0, 0x80, 0x06, 0x90, 0xA3, 0xFD, ++0x74, 0x02, 0xF0, 0x90, 0xA3, 0xFC, 0x12, 0x63, 0x7A, 0x90, 0x07, 0x78, 0x74, 0x01, 0xF0, 0x90, ++0xA1, 0xBD, 0xE0, 0x60, 0x02, 0xE4, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0x54, 0xD1, 0xD6, ++0xE5, 0x0D, 0x5F, 0xF5, 0x11, 0x7F, 0x55, 0xD1, 0xD6, 0xE5, 0x0E, 0x5F, 0xF5, 0x12, 0x7F, 0x56, ++0xD1, 0xD6, 0xE5, 0x0F, 0x5F, 0xF5, 0x13, 0x7F, 0x57, 0xD1, 0xD6, 0xE5, 0x10, 0x5F, 0xF5, 0x14, ++0xAD, 0x11, 0x7F, 0x54, 0xD1, 0xAC, 0xAD, 0x12, 0x7F, 0x55, 0xD1, 0xAC, 0xAD, 0x13, 0x7F, 0x56, ++0xD1, 0xAC, 0xAD, 0x14, 0x7F, 0x57, 0xD1, 0xAC, 0x53, 0x91, 0xEF, 0x22, 0xE4, 0xF5, 0x0D, 0xF5, ++0x0E, 0xF5, 0x0F, 0x75, 0x10, 0x80, 0xAD, 0x0D, 0x7F, 0x50, 0xD1, 0xAC, 0xAD, 0x0E, 0x7F, 0x51, ++0xD1, 0xAC, 0xAD, 0x0F, 0x7F, 0x52, 0xD1, 0xAC, 0xAD, 0x10, 0x7F, 0x53, 0xC1, 0xAC, 0x7F, 0x01, ++0x7E, 0x00, 0x12, 0x3D, 0xC2, 0x7F, 0xF2, 0xD1, 0xD6, 0xEF, 0x20, 0xE6, 0x0C, 0x7F, 0x05, 0xD1, ++0xD6, 0xEF, 0x44, 0x80, 0xFD, 0x7F, 0x05, 0xD1, 0xAC, 0x22, 0x90, 0xA2, 0x2C, 0xE0, 0xC3, 0x13, ++0x54, 0x07, 0xFF, 0x75, 0xF0, 0x0D, 0x90, 0xA2, 0x39, 0x12, 0x45, 0xA9, 0xE0, 0xFE, 0x75, 0xF0, ++0x0D, 0xEF, 0x90, 0xA2, 0x38, 0x12, 0x45, 0xA9, 0xE0, 0x90, 0xA3, 0xAF, 0xF0, 0x90, 0xA3, 0xAE, ++0xEE, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0xA3, 0xAA, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA3, 0xAE, 0xE0, 0xF5, 0x3B, 0xA3, 0xE0, ++0xF5, 0x3C, 0x12, 0x36, 0x3E, 0x90, 0xA3, 0xAA, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, ++0xA3, 0xA3, 0xA3, 0x74, 0x05, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA2, 0x2C, 0xE0, 0x30, ++0xE0, 0x79, 0x90, 0xA2, 0x2E, 0xE0, 0x70, 0x3B, 0x7D, 0x16, 0x7F, 0x6F, 0x31, 0x5E, 0x91, 0x08, ++0x90, 0xA2, 0x2C, 0xE0, 0xC3, 0x13, 0x54, 0x07, 0x75, 0xF0, 0x0D, 0x11, 0xDC, 0x90, 0xA2, 0x2C, ++0xE0, 0xC3, 0x13, 0x54, 0x07, 0x75, 0xF0, 0x0D, 0x90, 0xA2, 0x37, 0x12, 0x45, 0xA9, 0xE0, 0x44, ++0x01, 0xF0, 0xE4, 0x90, 0xA3, 0xAE, 0xF0, 0xA3, 0x74, 0x03, 0x11, 0x21, 0x90, 0xA2, 0x2E, 0x74, ++0x01, 0xF0, 0x22, 0x90, 0xA2, 0x2E, 0xE0, 0x64, 0x01, 0x70, 0x2E, 0x90, 0xA2, 0x2C, 0xE0, 0xC3, ++0x13, 0x54, 0x07, 0xFF, 0x75, 0xF0, 0x0D, 0x90, 0xA2, 0x37, 0x12, 0x45, 0xA9, 0xE0, 0x30, 0xE0, ++0x18, 0x75, 0xF0, 0x0D, 0xEF, 0x11, 0xDC, 0xE4, 0x90, 0xA3, 0xAE, 0xF0, 0xA3, 0x74, 0x03, 0xF0, ++0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0x01, 0x29, 0xD1, 0x51, 0x22, 0x90, 0xA2, 0x3B, 0x12, ++0x45, 0xA9, 0xE0, 0xFF, 0x7E, 0x00, 0x7D, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0xA3, 0xB0, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x2D, ++0x90, 0x05, 0x22, 0xE0, 0x90, 0xA3, 0xB5, 0xF0, 0x7D, 0x14, 0x91, 0x04, 0xBF, 0x01, 0x13, 0x51, ++0xA8, 0x90, 0xA3, 0xB3, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0xA3, 0xB2, 0xE0, 0xFF, ++0x51, 0x28, 0x90, 0xA3, 0xB5, 0xE0, 0xFF, 0x7D, 0x15, 0x31, 0x5E, 0x80, 0x13, 0x51, 0xA8, 0x90, ++0xA3, 0xB3, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0xA3, 0xB2, 0xE0, 0xFF, 0x51, 0x28, ++0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA2, 0x3B, ++0x12, 0x45, 0xA9, 0xE0, 0xFF, 0x7E, 0x00, 0xE4, 0xFD, 0x11, 0xE8, 0xE4, 0xFD, 0xFF, 0x90, 0x05, ++0x22, 0xEF, 0xF0, 0x90, 0x9F, 0x9B, 0xED, 0xF0, 0x22, 0x90, 0xA1, 0xD4, 0xE0, 0x44, 0x02, 0xF0, ++0x7D, 0x08, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0xBB, 0xEF, 0xF0, ++0xA3, 0xED, 0xF0, 0x90, 0x9F, 0x99, 0xE0, 0x04, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x42, 0x90, ++0x05, 0x22, 0xE0, 0x90, 0xA3, 0xBF, 0xF0, 0x7D, 0x26, 0x91, 0x04, 0xEF, 0x64, 0x01, 0x70, 0x0B, ++0x51, 0x0B, 0x90, 0xA2, 0x2C, 0xE0, 0x20, 0xE0, 0x1A, 0x80, 0x15, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, ++0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x0C, 0x51, 0x0B, 0x90, 0xA2, 0x2C, 0xE0, 0x20, 0xE0, 0x03, ++0x12, 0xBB, 0x50, 0x90, 0xA3, 0xBF, 0xE0, 0xFF, 0x7D, 0x27, 0x31, 0x5E, 0x12, 0xBB, 0xDC, 0x80, ++0x0F, 0x12, 0xBB, 0xDC, 0x51, 0x0B, 0x90, 0xA2, 0x2C, 0xE0, 0x20, 0xE0, 0x03, 0x12, 0xBB, 0x50, ++0x90, 0xA1, 0xCD, 0xE0, 0x30, 0xE0, 0x17, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, ++0x30, 0xE0, 0x0B, 0x90, 0x05, 0x22, 0xE0, 0x54, 0x6F, 0xFF, 0x7D, 0x28, 0x31, 0x5E, 0x90, 0x04, ++0x1F, 0x74, 0x20, 0xF0, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x9F, 0x9F, 0xE0, 0xFF, ++0x90, 0xA3, 0xBC, 0xE0, 0xFB, 0x7D, 0x01, 0x51, 0xB2, 0x90, 0xA3, 0xBD, 0xEE, 0xF0, 0xFC, 0xA3, ++0xEF, 0xF0, 0xFD, 0x90, 0xA3, 0xBB, 0xE0, 0xFF, 0x74, 0x09, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x54, 0x3F, 0xF0, 0xEF, 0x60, 0x52, 0x74, 0x29, 0x2D, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x10, 0xF0, 0x74, 0x09, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x47, ++0x90, 0xA1, 0xE4, 0xE0, 0xFF, 0xC3, 0x94, 0x20, 0x50, 0x13, 0xEF, 0x25, 0xE0, 0x25, 0xE0, 0xFF, ++0x74, 0x2B, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x22, 0x74, 0x2B, 0x2D, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x74, 0x7F, 0xF0, 0x22, 0x74, 0x29, 0x2D, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xEF, 0xF0, 0x74, 0x09, 0x2D, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x40, 0xF0, 0x22, 0x90, 0xA3, 0xB0, 0xA3, 0xE0, 0xFF, 0x7B, 0x08, ++0x7D, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0xF1, 0xED, 0xF0, 0xA3, 0xEB, ++0xF0, 0x90, 0xA3, 0xF0, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0x12, 0xBC, 0x47, 0x7C, 0x00, 0xAD, 0x07, ++0x90, 0xA3, 0xF0, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, 0xA3, 0xF1, 0xE0, 0x60, 0x0E, 0x74, 0x21, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74, 0x20, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0xF0, 0x74, 0x21, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0xF0, 0xAF, 0x05, 0x74, 0x12, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0xA3, 0xF2, 0xE0, 0x25, 0xE0, ++0x25, 0xE0, 0xFB, 0xEE, 0x44, 0x02, 0x4B, 0xFE, 0x74, 0x12, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xEE, 0xF0, 0x74, 0x11, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x74, 0xFF, ++0xF0, 0x74, 0x29, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xF7, 0xF0, 0xAE, ++0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0xA3, 0xE0, 0xEF, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x30, 0x90, 0x05, 0x22, 0xE0, 0x90, 0xA3, ++0xE3, 0xF0, 0x7D, 0x29, 0x91, 0x04, 0xBF, 0x01, 0x16, 0x90, 0x9F, 0xA0, 0x51, 0xAC, 0x90, 0xA3, ++0xE1, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0xA3, 0xE0, 0xE0, 0xFF, 0x51, 0x28, 0x90, ++0xA3, 0xE3, 0xE0, 0xFF, 0x7D, 0x2A, 0x31, 0x5E, 0x80, 0x16, 0x90, 0x9F, 0xA0, 0x51, 0xAC, 0x90, ++0xA3, 0xE1, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0xA3, 0xE0, 0xE0, 0xFF, 0x51, 0x28, ++0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0xA3, 0x18, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1C, ++0x90, 0x05, 0x22, 0xE0, 0x90, 0xA3, 0x1C, 0xF0, 0x7D, 0x36, 0x91, 0x04, 0xBF, 0x01, 0x02, 0xF1, ++0xB9, 0x90, 0xA3, 0x1C, 0xE0, 0xFF, 0x7D, 0x37, 0x31, 0x5E, 0x80, 0x02, 0xF1, 0xB9, 0x90, 0x05, ++0x22, 0xE0, 0x54, 0x6F, 0xFF, 0x7D, 0x38, 0x31, 0x5E, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x7F, 0xFF, 0x31, 0x5E, 0xE4, 0x90, 0xA3, 0xFE, 0xF0, 0xA3, 0xF0, 0x90, ++0x05, 0xF8, 0xE0, 0x70, 0x0F, 0xA3, 0xE0, 0x70, 0x0B, 0xA3, 0xE0, 0x70, 0x07, 0xA3, 0xE0, 0x70, ++0x03, 0x7F, 0x01, 0x22, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x15, ++0xD3, 0x90, 0xA3, 0xFF, 0xE0, 0x94, 0x03, 0x90, 0xA3, 0xFE, 0xE0, 0x94, 0x00, 0x40, 0x02, 0x80, ++0x13, 0x7F, 0x01, 0x80, 0x1B, 0xD3, 0x90, 0xA3, 0xFF, 0xE0, 0x94, 0xE8, 0x90, 0xA3, 0xFE, 0xE0, ++0x94, 0x03, 0x40, 0x0A, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0x7F, 0x00, 0x22, 0x7F, 0x32, ++0x7E, 0x00, 0x12, 0x3E, 0x50, 0x90, 0xA3, 0xFE, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0x80, ++0x9E, 0x90, 0xA3, 0x16, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x04, 0x1D, 0xE0, ++0x60, 0x1E, 0x90, 0x05, 0x22, 0xE0, 0x90, 0xA3, 0x1B, 0xF0, 0x7D, 0x01, 0x91, 0x04, 0xEF, 0x64, ++0x01, 0x70, 0x02, 0xD1, 0xEF, 0x90, 0xA3, 0x1B, 0xE0, 0xFF, 0x7D, 0x02, 0x31, 0x5E, 0x80, 0x02, ++0xD1, 0xEF, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x22, 0x90, 0xA3, 0x15, 0xEF, 0xF0, 0xA3, 0xED, ++0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0xA2, 0x19, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x20, 0xE0, 0x0D, ++0x90, 0xA3, 0x16, 0xE0, 0xB4, 0x01, 0x06, 0x7D, 0x36, 0x7F, 0x6F, 0x31, 0x5E, 0x90, 0xA3, 0x15, ++0xE0, 0x70, 0x0B, 0x90, 0xA3, 0x17, 0xE0, 0xFF, 0x7D, 0x05, 0x31, 0x74, 0x80, 0x26, 0x90, 0xA3, ++0x15, 0xE0, 0xB4, 0x01, 0x09, 0x90, 0xA3, 0x17, 0xE0, 0xFF, 0x71, 0x58, 0x80, 0x16, 0x90, 0xA3, ++0x15, 0xE0, 0xB4, 0x02, 0x0F, 0xA3, 0xE0, 0xB4, 0x01, 0x0A, 0x90, 0xA2, 0x27, 0xE0, 0xFE, 0xA3, ++0xE0, 0xFF, 0x71, 0xBB, 0x90, 0xA2, 0x19, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x20, 0xE0, 0x0A, ++0x90, 0xA3, 0x16, 0xE0, 0x70, 0x04, 0xFD, 0xFF, 0x31, 0x5E, 0x22, 0x8F, 0x54, 0x7D, 0x17, 0x91, ++0x04, 0x75, 0xF0, 0x0D, 0xE5, 0x54, 0x90, 0xA2, 0x2F, 0x12, 0x45, 0xA9, 0xE0, 0xFC, 0x75, 0xF0, ++0x0D, 0xE5, 0x54, 0x90, 0xA2, 0x30, 0x12, 0x45, 0xA9, 0xE0, 0xFE, 0x54, 0x03, 0xFD, 0xEE, 0x13, ++0x13, 0x54, 0x07, 0xFB, 0x90, 0xA2, 0x2C, 0xE0, 0xFE, 0xC4, 0x54, 0x0F, 0x90, 0xA3, 0xDB, 0xF0, ++0xAF, 0x04, 0x12, 0xB7, 0x01, 0x75, 0xF0, 0x0D, 0xE5, 0x54, 0x12, 0xB4, 0xEB, 0x75, 0xF0, 0x0D, ++0xE5, 0x54, 0x31, 0x4D, 0xAD, 0x54, 0xE4, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, ++0xA3, 0xDC, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xE4, 0xA3, 0xF0, 0x90, 0xA3, 0xDE, 0xE0, 0xFF, 0xC3, ++0x94, 0x02, 0x40, 0x02, 0xC1, 0x4C, 0x90, 0xA3, 0xDD, 0xE0, 0xFE, 0x75, 0xF0, 0x0D, 0x90, 0xA2, ++0x31, 0x12, 0x45, 0xA9, 0x75, 0xF0, 0x03, 0xEF, 0x12, 0x45, 0xA9, 0xE0, 0xFC, 0xA3, 0xE0, 0xF5, ++0x82, 0x8C, 0x83, 0xE0, 0x90, 0xA3, 0xDF, 0xF0, 0x90, 0xA3, 0xDC, 0xE0, 0x60, 0x31, 0x90, 0xA3, ++0xDF, 0xE0, 0xFF, 0x75, 0xF0, 0x0D, 0xEE, 0x90, 0xA2, 0x33, 0x12, 0x45, 0xA9, 0xC0, 0x83, 0xC0, ++0x82, 0x90, 0xA3, 0xDE, 0xE0, 0xD0, 0x82, 0xD0, 0x83, 0x75, 0xF0, 0x03, 0x12, 0x45, 0xA9, 0xE0, ++0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0x80, 0x33, 0x90, ++0xA3, 0xDF, 0xE0, 0xFF, 0x90, 0xA3, 0xDD, 0xE0, 0x75, 0xF0, 0x0D, 0x90, 0xA2, 0x33, 0x12, 0x45, ++0xA9, 0xC0, 0x83, 0xC0, 0x82, 0x90, 0xA3, 0xDE, 0xE0, 0xD0, 0x82, 0xD0, 0x83, 0x75, 0xF0, 0x03, ++0x12, 0x45, 0xA9, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, ++0xF4, 0x5F, 0x90, 0xA3, 0xDF, 0xF0, 0x90, 0xA3, 0xDF, 0xE0, 0xFF, 0x90, 0xA3, 0xDD, 0xE0, 0x75, ++0xF0, 0x0D, 0x90, 0xA2, 0x31, 0x12, 0x45, 0xA9, 0xC0, 0x83, 0xC0, 0x82, 0x90, 0xA3, 0xDE, 0xE0, ++0xD0, 0x82, 0xD0, 0x83, 0x75, 0xF0, 0x03, 0x12, 0x45, 0xA9, 0xE0, 0xFC, 0xA3, 0xE0, 0xF5, 0x82, ++0x8C, 0x83, 0xEF, 0xF0, 0x90, 0xA3, 0xDE, 0xE0, 0x04, 0xF0, 0xA1, 0x7A, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x90, 0xA2, 0x2C, 0xE0, 0xFF, 0xC3, 0x13, 0xFE, 0xEF, 0x54, 0xF1, 0xFF, 0xEE, 0x04, 0x54, ++0x07, 0x25, 0xE0, 0x4F, 0xF0, 0xA3, 0xE0, 0xFF, 0x90, 0xA2, 0x2C, 0xE0, 0xFE, 0xC3, 0x13, 0x54, ++0x07, 0xB5, 0x07, 0x04, 0xEE, 0x54, 0xF1, 0xF0, 0x12, 0x47, 0xFA, 0xE4, 0x90, 0xA2, 0x2E, 0xF0, ++0x91, 0x08, 0x90, 0xA2, 0x2C, 0xE0, 0xFE, 0xC3, 0x13, 0x54, 0x07, 0xFD, 0x75, 0xF0, 0x0D, 0x90, ++0xA2, 0x2F, 0x12, 0x45, 0xA9, 0xE0, 0xFA, 0x75, 0xF0, 0x0D, 0xED, 0x90, 0xA2, 0x30, 0x12, 0x45, ++0xA9, 0xE0, 0xFC, 0x54, 0x03, 0xFD, 0xEC, 0x13, 0x13, 0x54, 0x07, 0xFB, 0xEE, 0xC4, 0x54, 0x0F, ++0x90, 0xA3, 0xDB, 0xF0, 0xAF, 0x02, 0x12, 0xB7, 0x01, 0x90, 0xA2, 0x2C, 0xE0, 0xC3, 0x13, 0x54, ++0x07, 0x75, 0xF0, 0x0D, 0x12, 0xB4, 0xEB, 0x90, 0xA2, 0x2C, 0xE0, 0xC3, 0x13, 0x54, 0x07, 0xFF, ++0x75, 0xF0, 0x0D, 0x90, 0xA2, 0x3A, 0x12, 0x45, 0xA9, 0xE0, 0x04, 0xF0, 0x75, 0xF0, 0x0D, 0xEF, ++0x31, 0x4D, 0x90, 0xA2, 0x2C, 0xE0, 0xC3, 0x13, 0x54, 0x07, 0xFD, 0xE4, 0xFF, 0xA1, 0x68, 0x90, ++0x9F, 0xA1, 0xE0, 0xFF, 0x7B, 0x08, 0x7D, 0x01, 0x51, 0xB2, 0x90, 0xA3, 0x19, 0xEE, 0xF0, 0xFC, ++0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0xA3, 0x16, 0xE0, 0xFF, 0xA3, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0xA3, ++0x20, 0xF0, 0x90, 0xA3, 0x1D, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0xA3, 0x1D, ++0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x51, 0x28, 0x90, 0xA3, 0x1D, 0xA3, 0xE0, 0xFF, 0xFD, 0x24, 0x0D, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0x74, 0x0D, 0x2D, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xEF, 0xF0, 0x74, 0x12, 0x2F, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x02, 0xF0, 0x74, 0x12, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0xA3, 0x1F, 0xE0, 0xFF, 0x90, 0xA3, 0x1D, 0xA3, 0xE0, 0xFE, ++0x24, 0x2A, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0xA3, 0x20, 0xE0, 0xFF, ++0x74, 0x2B, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x2C, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x24, 0x02, 0xF0, 0x22, 0x12, 0xB9, 0xC9, 0x90, 0xA1, ++0x1D, 0xE0, 0x64, 0x0C, 0x60, 0x12, 0xE4, 0xFD, 0x7F, 0x0C, 0x12, 0x56, 0x56, 0xE4, 0xFD, 0xFF, ++0x31, 0x5E, 0x7D, 0x08, 0xE4, 0xFF, 0x31, 0x74, 0x22, 0x90, 0x9F, 0xA2, 0xE0, 0xFF, 0xE4, 0xFB, ++0x7D, 0x01, 0x51, 0xB2, 0x90, 0xA3, 0x1A, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA3, 0x18, 0xE0, ++0xFC, 0xA3, 0xE0, 0xFD, 0xAB, 0x07, 0x90, 0xA3, 0x1D, 0xED, 0xF0, 0xEC, 0xF9, 0xE0, 0xFF, 0xAE, ++0x03, 0x74, 0x2A, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x2B, 0x2E, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE9, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x7F, 0x8F, 0x12, 0x46, 0xD6, 0xEF, 0x20, 0xE6, 0x02, 0x21, 0x37, 0x90, 0x00, 0x8C, 0xE0, ++0xF5, 0x6E, 0x7F, 0x8D, 0x12, 0x46, 0xD6, 0x90, 0x00, 0x8E, 0xE0, 0xF5, 0x6F, 0xEF, 0x24, 0xFC, ++0x60, 0x0C, 0x24, 0x03, 0x60, 0x02, 0x21, 0x27, 0xAF, 0x6E, 0x31, 0x6A, 0x21, 0x27, 0x74, 0x96, ++0x25, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xE0, 0xFB, 0xE4, 0xFD, 0xFF, 0x31, 0x42, ++0x75, 0xF0, 0x04, 0xE5, 0x6E, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0x13, 0x13, 0x54, 0x03, ++0xFB, 0x0D, 0xE4, 0xFF, 0x31, 0x42, 0x75, 0xF0, 0x04, 0xE5, 0x6E, 0x90, 0x96, 0x19, 0x12, 0x45, ++0xA9, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0xFB, 0x0D, 0xE4, 0xFF, 0x31, 0x42, 0x75, 0xF0, ++0x04, 0xE5, 0x6E, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0xC4, 0x54, 0x03, 0xFB, 0x0D, 0xE4, ++0xFF, 0x31, 0x42, 0x75, 0xF0, 0x04, 0xE5, 0x6E, 0x90, 0x96, 0x16, 0x12, 0x45, 0xA9, 0xE0, 0xFB, ++0xE4, 0xFD, 0x0F, 0x31, 0x42, 0x75, 0xF0, 0x04, 0xE5, 0x6E, 0x90, 0x96, 0x17, 0x31, 0x3C, 0x75, ++0xF0, 0x04, 0xE5, 0x6E, 0x90, 0x96, 0x18, 0x12, 0x45, 0xA9, 0xE0, 0xC4, 0x13, 0x54, 0x01, 0xFB, ++0x0D, 0x7F, 0x01, 0x31, 0x42, 0x75, 0xF0, 0x04, 0xE5, 0x6E, 0x90, 0x96, 0x18, 0x12, 0x45, 0xA9, ++0xE0, 0x54, 0x1F, 0xFB, 0x0D, 0x31, 0x42, 0x75, 0xF0, 0x08, 0xE5, 0x6E, 0x90, 0x89, 0x00, 0x12, ++0x45, 0xA9, 0xE0, 0xFB, 0xE4, 0xFD, 0x0F, 0x31, 0x42, 0x75, 0xF0, 0x08, 0xE5, 0x6E, 0x90, 0x89, ++0x01, 0x31, 0x3C, 0x75, 0xF0, 0x08, 0xE5, 0x6E, 0x90, 0x89, 0x02, 0x31, 0x3C, 0x75, 0xF0, 0x08, ++0xE5, 0x6E, 0x90, 0x89, 0x03, 0x31, 0x3C, 0x75, 0xF0, 0x08, 0xE5, 0x6E, 0x90, 0x89, 0x04, 0x12, ++0x45, 0xA9, 0xE0, 0xFB, 0xE4, 0xFD, 0x0F, 0x31, 0x42, 0x75, 0xF0, 0x08, 0xE5, 0x6E, 0x90, 0x89, ++0x05, 0x31, 0x3C, 0x75, 0xF0, 0x08, 0xE5, 0x6E, 0x90, 0x89, 0x06, 0x31, 0x3C, 0x75, 0xF0, 0x08, ++0xE5, 0x6E, 0x90, 0x89, 0x07, 0x31, 0x3C, 0x7F, 0x8F, 0x12, 0x46, 0xD6, 0xEF, 0x30, 0xE0, 0x07, ++0xE4, 0xFD, 0x7F, 0x8D, 0x12, 0x46, 0xAC, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x45, 0xA9, 0xE0, ++0xFB, 0x0D, 0xEF, 0x70, 0x04, 0x74, 0xF0, 0x80, 0x16, 0xEF, 0xB4, 0x01, 0x04, 0x74, 0xF4, 0x80, ++0x0E, 0xEF, 0xB4, 0x02, 0x04, 0x74, 0xF8, 0x80, 0x06, 0xEF, 0xB4, 0x03, 0x0C, 0x74, 0xFC, 0x2D, ++0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83, 0xEB, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0xA4, 0x00, 0xEF, 0xF0, 0x7F, 0x8F, 0x12, 0x46, 0xD6, 0xEF, 0x30, 0xE6, 0x4C, 0x7F, ++0x8D, 0x12, 0x46, 0xD6, 0xEF, 0x64, 0x01, 0x70, 0x42, 0x90, 0xA4, 0x01, 0xF0, 0x90, 0xA4, 0x01, ++0xE0, 0xFD, 0x90, 0xA4, 0x00, 0xE0, 0x75, 0xF0, 0x10, 0x90, 0x81, 0x00, 0x12, 0x45, 0xA9, 0xE5, ++0x82, 0x2D, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xE0, 0xFB, 0xE4, 0xFF, 0x31, 0x42, 0x90, ++0xA4, 0x01, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x10, 0x40, 0xD2, 0x7F, 0x8F, 0x12, 0x46, 0xD6, ++0xEF, 0x30, 0xE0, 0x07, 0xE4, 0xFD, 0x7F, 0x8D, 0x12, 0x46, 0xAC, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x7F, 0xF4, 0x12, 0x46, 0xD6, 0xEF, 0x20, 0xE5, 0x0E, 0x7F, 0xF4, 0x12, 0x46, 0xD6, 0xEF, 0x7F, ++0x01, 0x20, 0xE4, 0x05, 0x7F, 0x02, 0x22, 0x7F, 0x03, 0x22, 0x31, 0xD0, 0x90, 0x9F, 0x9C, 0xEF, ++0xF0, 0x51, 0x31, 0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x04, 0x23, 0xE0, 0x44, 0x80, 0xF0, ++0x7F, 0x17, 0x12, 0x46, 0xD6, 0xEF, 0x54, 0xFC, 0x44, 0x04, 0xFD, 0x7F, 0x17, 0x12, 0x46, 0xAC, ++0x7F, 0x16, 0x12, 0x46, 0xD6, 0xEF, 0x54, 0x0F, 0x44, 0x40, 0xFD, 0x7F, 0x16, 0x12, 0x46, 0xAC, ++0x7F, 0x38, 0x12, 0x46, 0xD6, 0xEF, 0x44, 0x40, 0xFD, 0x7F, 0x38, 0x12, 0x46, 0xAC, 0x02, 0x37, ++0x99, 0x51, 0x80, 0x51, 0xB0, 0x51, 0x3C, 0x51, 0x5B, 0x02, 0x47, 0xBC, 0x75, 0x15, 0x12, 0xE4, ++0xF5, 0x16, 0x75, 0x17, 0x07, 0x75, 0x18, 0x32, 0x90, 0x01, 0x30, 0xE5, 0x15, 0xF0, 0xA3, 0xE5, ++0x16, 0xF0, 0xA3, 0xE5, 0x17, 0xF0, 0xA3, 0xE5, 0x18, 0xF0, 0x22, 0x75, 0x1D, 0x06, 0x75, 0x1E, ++0x01, 0x75, 0x1F, 0x03, 0x75, 0x20, 0x62, 0x43, 0x20, 0x80, 0x43, 0x1F, 0x04, 0x90, 0x01, 0x38, ++0xE5, 0x1D, 0xF0, 0xA3, 0xE5, 0x1E, 0xF0, 0xA3, 0xE5, 0x1F, 0xF0, 0xA3, 0xE5, 0x20, 0xF0, 0x22, ++0x90, 0x01, 0x30, 0xE4, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x38, 0xF0, 0xA3, ++0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xFD, 0x7F, 0x50, 0x12, 0x46, 0xAC, 0xE4, 0xFD, 0x7F, 0x51, 0x12, ++0x46, 0xAC, 0xE4, 0xFD, 0x7F, 0x52, 0x12, 0x46, 0xAC, 0xE4, 0xFD, 0x7F, 0x53, 0x02, 0x46, 0xAC, ++0x90, 0x01, 0x34, 0x74, 0xFF, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x3C, 0xF0, ++0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xFD, 0x7F, 0x54, 0x12, 0x46, 0xAC, 0x7D, 0xFF, 0x7F, 0x55, ++0x12, 0x46, 0xAC, 0x7D, 0xFF, 0x7F, 0x56, 0x12, 0x46, 0xAC, 0x7D, 0xFF, 0x7F, 0x57, 0x02, 0x46, ++0xAC, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0xA3, 0x05, 0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, ++0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, 0x22, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, ++0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8, 0x51, 0x80, 0x90, 0x00, 0x03, ++0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x46, 0xAC, 0x80, 0xFE, 0x22, 0x7F, 0x81, 0x12, 0x46, ++0xD6, 0xEF, 0x54, 0xFE, 0xFD, 0x7F, 0x81, 0x12, 0x46, 0xAC, 0x7F, 0x80, 0x12, 0x46, 0xD6, 0xEF, ++0x44, 0x80, 0xFD, 0x7F, 0x80, 0x12, 0x46, 0xAC, 0x12, 0x9E, 0x51, 0x12, 0x3E, 0x11, 0x12, 0x9E, ++0x5E, 0x12, 0x9F, 0x22, 0x7F, 0x01, 0x12, 0x43, 0xA5, 0x90, 0xA2, 0x2B, 0x74, 0x02, 0xF0, 0xFF, ++0x12, 0x43, 0xA5, 0x90, 0xA2, 0x2B, 0xE0, 0x04, 0xF0, 0x31, 0xEA, 0x71, 0xC5, 0x7F, 0x80, 0x12, ++0x46, 0xD6, 0xEF, 0x44, 0x40, 0xFD, 0x7F, 0x80, 0x12, 0x46, 0xAC, 0x75, 0x28, 0xFF, 0xF1, 0xF4, ++0x12, 0x9E, 0x9F, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xDA, 0x7F, 0xFB, 0x7E, 0x01, 0x12, 0x34, 0xC1, ++0xEF, 0x64, 0x01, 0x70, 0x27, 0x90, 0xA2, 0xDA, 0xE0, 0x54, 0x07, 0xF0, 0xE0, 0xFF, 0x64, 0x07, ++0x60, 0x04, 0xEF, 0xB4, 0x04, 0x16, 0x12, 0x9E, 0x46, 0xBF, 0x01, 0x10, 0x7F, 0x16, 0x12, 0x46, ++0xD6, 0xEF, 0x54, 0x0F, 0x44, 0x60, 0xFD, 0x7F, 0x16, 0x12, 0x46, 0xAC, 0x7F, 0x81, 0x12, 0x46, ++0xD6, 0xEF, 0x44, 0x04, 0xFD, 0x7F, 0x81, 0x12, 0x46, 0xAC, 0x12, 0x9F, 0x30, 0x12, 0xB7, 0x78, ++0xE4, 0xFF, 0x02, 0x44, 0x2E, 0x12, 0xB8, 0x2F, 0x12, 0x9C, 0x53, 0x12, 0xA1, 0x7D, 0x12, 0xB8, ++0x35, 0x91, 0xAB, 0x12, 0xBB, 0x41, 0x12, 0x85, 0xF8, 0x7E, 0x00, 0x7F, 0x19, 0x7D, 0x00, 0x7B, ++0x01, 0x7A, 0xA1, 0x79, 0xFD, 0x12, 0x08, 0xAA, 0x7F, 0x80, 0x7E, 0x08, 0x12, 0x37, 0x4E, 0x90, ++0xA2, 0x04, 0x12, 0x08, 0x6D, 0x90, 0xA2, 0x04, 0x12, 0x45, 0x71, 0x90, 0xA2, 0x00, 0x12, 0x08, ++0x6D, 0x90, 0x9F, 0x9C, 0xE0, 0xFF, 0x64, 0x02, 0x70, 0x2A, 0x90, 0xFD, 0x80, 0xE0, 0x7E, 0x00, ++0x30, 0xE0, 0x02, 0x7E, 0x01, 0x90, 0xA2, 0x0C, 0xEE, 0xF0, 0x90, 0xFD, 0x80, 0xE0, 0x7E, 0x00, ++0x30, 0xE1, 0x02, 0x7E, 0x01, 0x90, 0xA2, 0x0D, 0xEE, 0xF0, 0x90, 0xFD, 0x80, 0xE0, 0x90, 0x02, ++0xFB, 0xF0, 0x80, 0x4A, 0xEF, 0x64, 0x01, 0x70, 0x1D, 0x90, 0xFD, 0x70, 0xE0, 0x7F, 0x00, 0x30, ++0xE0, 0x02, 0x7F, 0x01, 0x90, 0xA2, 0x0C, 0xEF, 0xF0, 0x90, 0xFD, 0x70, 0xE0, 0x7F, 0x00, 0x30, ++0xE1, 0x02, 0x7F, 0x01, 0x80, 0x23, 0x90, 0x9F, 0x9C, 0xE0, 0x64, 0x03, 0x70, 0x20, 0x90, 0xFD, ++0x78, 0xE0, 0x7F, 0x00, 0x30, 0xE0, 0x02, 0x7F, 0x01, 0x90, 0xA2, 0x0C, 0xEF, 0xF0, 0x90, 0xFD, ++0x78, 0xE0, 0x7F, 0x00, 0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, 0xA2, 0x0D, 0xEF, 0xF0, 0x90, 0xFD, ++0x68, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x07, 0x78, 0x74, 0x01, 0xF0, 0x12, 0x8F, 0x3E, 0x12, 0x86, ++0x07, 0x90, 0xA1, 0xE6, 0x74, 0x01, 0xF0, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x63, 0x7F, 0x90, 0xA2, ++0x19, 0xE0, 0x54, 0xFE, 0xF0, 0x90, 0x04, 0x8F, 0xE4, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0xA3, 0x7D, ++0x00, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x16, 0x12, 0x08, 0xAA, 0x90, 0xA1, 0x19, 0x74, 0x02, 0xF0, ++0x90, 0xA1, 0x20, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x08, 0xF0, 0x90, 0xA1, 0x25, 0xE4, 0xF0, ++0xA3, 0x74, 0x02, 0xF0, 0x90, 0xA1, 0x51, 0xE0, 0x24, 0x04, 0x90, 0xA1, 0x2F, 0xF0, 0xA3, 0x74, ++0x08, 0xF0, 0xE4, 0xFD, 0xFF, 0xB1, 0x87, 0x7D, 0x0C, 0x7F, 0x02, 0xB1, 0x87, 0xB1, 0x83, 0x90, ++0x9F, 0x9C, 0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90, 0xA1, 0x24, 0x74, 0xDD, 0xF0, 0x80, 0x0F, 0xEF, ++0x90, 0xA1, 0x24, 0xB4, 0x03, 0x05, 0x74, 0xD4, 0xF0, 0x80, 0x03, 0x74, 0x40, 0xF0, 0x7F, 0x79, ++0x12, 0x46, 0xD6, 0xEF, 0x54, 0x03, 0xFF, 0xBF, 0x02, 0x0F, 0x7F, 0x28, 0x12, 0x46, 0xD6, 0xEF, ++0x30, 0xE2, 0x06, 0x90, 0xA1, 0x51, 0x74, 0x02, 0xF0, 0x90, 0xA1, 0xB9, 0x74, 0x03, 0xF0, 0xA3, ++0x74, 0x05, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0x90, 0xA1, ++0x51, 0xE0, 0x24, 0x04, 0x90, 0xA1, 0x2F, 0xF0, 0xA3, 0x74, 0x08, 0xF0, 0x90, 0xA1, 0xC4, 0xE0, ++0x54, 0xFE, 0xF0, 0x12, 0x92, 0xFC, 0x7E, 0x00, 0x7F, 0x02, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0xA1, ++0x79, 0xBD, 0x12, 0x08, 0xAA, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x06, 0x0A, 0xE0, ++0x54, 0xF8, 0xF0, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0xE4, 0x90, 0xA1, 0xBF, 0xF0, 0x22, 0xE0, ++0x54, 0x7F, 0xF0, 0x7D, 0x0C, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA4, ++0x09, 0xEF, 0xF0, 0x14, 0x60, 0x15, 0x14, 0x60, 0x19, 0x24, 0x02, 0x70, 0x1A, 0xED, 0x54, 0x01, ++0xFF, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x80, 0x0C, 0x90, 0xA1, 0x1D, 0xED, 0xF0, ++0x80, 0x05, 0x90, 0xA1, 0x1C, 0xED, 0xF0, 0x7F, 0x8F, 0x12, 0x46, 0xD6, 0xEF, 0x30, 0xE4, 0x31, ++0x90, 0xA4, 0x09, 0xE0, 0x14, 0x60, 0x07, 0x14, 0x60, 0x1D, 0x24, 0x02, 0x70, 0x23, 0x90, 0xA1, ++0x16, 0xE0, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, 0xFF, 0x90, 0xA1, 0x1D, 0xE0, 0x54, ++0x7F, 0x4F, 0xFD, 0x7F, 0x88, 0x80, 0x07, 0x90, 0xA1, 0x1C, 0xE0, 0xFD, 0x7F, 0x89, 0x12, 0x46, ++0xAC, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA1, 0x17, 0xE0, 0x90, 0x06, 0x04, 0x20, 0xE0, 0x0C, ++0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x04, 0x7F, 0x01, 0xB1, 0x87, 0x80, 0x0F, 0xB1, 0x7F, 0x90, 0x05, ++0x27, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0xA1, 0x15, 0x74, 0x0C, 0xF0, 0xE4, 0xFD, 0xFF, 0x02, 0x49, ++0x5E, 0x90, 0xA1, 0x17, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x04, 0xB1, 0x83, 0x80, 0x1E, 0x90, 0x06, ++0x04, 0xE0, 0x44, 0x40, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x7D, 0x04, 0x7F, 0x01, 0xB1, 0x87, 0x90, ++0x05, 0x27, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0xA1, 0x15, 0x74, 0x04, 0xF0, 0xE4, 0xFD, 0xFF, 0x02, ++0x49, 0x5E, 0x7D, 0x01, 0x7F, 0x04, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA4, 0x0B, ++0xED, 0xF0, 0x90, 0xA1, 0x16, 0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0xE1, ++0xA8, 0xEE, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x30, 0xE0, 0x02, 0xE1, 0xA8, 0x90, 0xA1, 0x1D, ++0xE0, 0xFE, 0x6F, 0x70, 0x02, 0xE1, 0xA8, 0xEF, 0x70, 0x02, 0xE1, 0x1B, 0x24, 0xFE, 0x70, 0x02, ++0xE1, 0x56, 0x24, 0xFE, 0x60, 0x4B, 0x24, 0xFC, 0x70, 0x02, 0xE1, 0x93, 0x24, 0xFC, 0x60, 0x02, ++0xE1, 0xA8, 0xEE, 0xB4, 0x0E, 0x02, 0xD1, 0x21, 0x90, 0xA1, 0x1D, 0xE0, 0x70, 0x05, 0x7F, 0x01, ++0x12, 0x6E, 0xEC, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x06, 0x02, 0xB1, 0xF6, 0x90, 0xA1, 0x1D, 0xE0, ++0xB4, 0x04, 0x0F, 0x90, 0xA4, 0x0B, 0xE0, 0xFF, 0x60, 0x05, 0x12, 0xBA, 0x79, 0x80, 0x03, 0x12, ++0x92, 0xE8, 0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x08, 0x60, 0x02, 0xE1, 0xA8, 0x12, 0x60, 0x3B, 0xE1, ++0xA8, 0x90, 0xA1, 0x1D, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x6E, 0xEC, 0x90, 0xA1, 0x1D, 0xE0, ++0xB4, 0x06, 0x02, 0xB1, 0xF6, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x0E, 0x07, 0xF1, 0xAD, 0xBF, 0x01, ++0x02, 0xD1, 0x21, 0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x0C, 0x60, 0x02, 0xE1, 0xA8, 0xF1, 0xAD, 0xEF, ++0x64, 0x01, 0x60, 0x02, 0xE1, 0xA8, 0x12, 0xBA, 0xB8, 0xE1, 0xA8, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, ++0x0E, 0x07, 0xF1, 0xAD, 0xBF, 0x01, 0x02, 0xD1, 0x21, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x06, 0x02, ++0xB1, 0xF6, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x0C, 0x08, 0xF1, 0xAD, 0xBF, 0x01, 0x03, 0x12, 0xBA, ++0xB8, 0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x04, 0x70, 0x5F, 0x12, 0xBA, 0x09, 0xEF, 0x64, 0x01, 0x70, ++0x57, 0x12, 0xBA, 0xE9, 0x80, 0x52, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x0E, 0x07, 0xF1, 0xAD, 0xBF, ++0x01, 0x02, 0xD1, 0x21, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x06, 0x02, 0xB1, 0xF6, 0x90, 0xA1, 0x1D, ++0xE0, 0xB4, 0x0C, 0x08, 0xF1, 0xAD, 0xBF, 0x01, 0x03, 0x12, 0xBA, 0xB8, 0x90, 0xA1, 0x1D, 0xE0, ++0x70, 0x05, 0x7F, 0x01, 0x12, 0x6E, 0xEC, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x04, 0x1A, 0x12, 0xBB, ++0x0A, 0x80, 0x15, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x0C, 0x0E, 0x90, 0xA1, 0x17, 0xE0, 0xFF, 0x13, ++0x13, 0x54, 0x3F, 0x30, 0xE0, 0x02, 0xF1, 0xE2, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA1, 0xCD, ++0xE0, 0x30, 0xE0, 0x0D, 0x90, 0xA1, 0xD3, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x08, 0x80, ++0x1E, 0x12, 0x73, 0xF1, 0xBF, 0x01, 0x18, 0x90, 0xA1, 0x16, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, ++0x20, 0xE0, 0x0C, 0x90, 0xA1, 0x1C, 0xE0, 0xD3, 0x94, 0x04, 0x50, 0x03, 0x7F, 0x01, 0x22, 0x7F, ++0x00, 0x22, 0x7D, 0x2F, 0x12, 0x46, 0xF8, 0x7D, 0x08, 0x7F, 0x01, 0xB1, 0x87, 0x90, 0xA1, 0x15, ++0x74, 0x08, 0xF0, 0x22, 0x75, 0xE8, 0x07, 0x75, 0xA8, 0x85, 0x22, 0xE4, 0x90, 0xA2, 0xDD, 0xF0, ++0x90, 0xA2, 0xDD, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0xFB, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x57, 0xA3, ++0xF0, 0x12, 0x3E, 0x44, 0xBF, 0x01, 0x03, 0x12, 0x31, 0xFC, 0x90, 0xA1, 0x1A, 0xE0, 0x60, 0x0E, ++0x90, 0xA1, 0x1D, 0xE0, 0xFF, 0x90, 0xA1, 0x1C, 0xE0, 0x6F, 0x60, 0x02, 0x11, 0x4D, 0xC2, 0xAF, ++0x12, 0x9E, 0xF9, 0xBF, 0x01, 0x03, 0x12, 0x7E, 0x60, 0xD2, 0xAF, 0x90, 0xA2, 0x56, 0xE0, 0xB4, ++0x01, 0x03, 0x12, 0xB7, 0x9F, 0x12, 0x4F, 0xFA, 0x12, 0x42, 0xDD, 0x80, 0xB3, 0x90, 0xA1, 0x11, ++0xE0, 0x90, 0xA1, 0x1C, 0x30, 0xE0, 0x04, 0xE0, 0xFF, 0x80, 0x21, 0xE0, 0xFF, 0x7D, 0x01, 0x02, ++0x56, 0x56, 0x90, 0xA1, 0x1A, 0xE0, 0x60, 0x13, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x03, 0x02, ++0xB9, 0xC9, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xF7, 0xF0, 0x11, 0x4D, 0x22, 0xAE, 0x07, 0x11, 0x9C, ++0xBF, 0x01, 0x16, 0x90, 0xA1, 0x11, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x0A, 0xAF, ++0x06, 0x7D, 0x01, 0x12, 0x56, 0x56, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x05, 0x43, 0xE0, ++0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, ++0x51, 0x8A, 0x52, 0x89, 0x53, 0x90, 0x05, 0x27, 0xE0, 0xF5, 0x54, 0x12, 0x06, 0x89, 0xFF, 0x54, ++0x01, 0xFE, 0x90, 0xA1, 0x11, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF, 0xEE, ++0x54, 0xFD, 0x4F, 0xFF, 0xF0, 0x12, 0x06, 0x89, 0xFE, 0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, 0x4D, ++0xFF, 0x90, 0xA1, 0x11, 0xF0, 0xEE, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7, 0x4E, 0xFF, 0xF0, 0x12, ++0x06, 0x89, 0xFE, 0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, 0x4D, 0xFF, 0x90, 0xA1, 0x11, 0xF0, 0xEE, ++0x54, 0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x4E, 0xFF, 0xF0, 0x12, 0x06, 0x89, 0xFE, 0x54, 0x40, 0xFD, ++0xEF, 0x54, 0xBF, 0x4D, 0x90, 0xA1, 0x11, 0xF0, 0xEE, 0xC3, 0x13, 0x20, 0xE0, 0x02, 0x21, 0xC2, ++0xE0, 0x20, 0xE0, 0x02, 0x21, 0xA9, 0x75, 0x54, 0x21, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x07, ++0x51, 0x88, 0x43, 0x54, 0x08, 0x80, 0x0C, 0xE4, 0x90, 0xA1, 0x12, 0xF0, 0xA3, 0xF0, 0x7D, 0x40, ++0xFF, 0x51, 0xB0, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x03, ++0x43, 0x54, 0x12, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x54, 0x14, 0x90, 0xA1, 0x11, ++0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x03, 0x43, 0x54, 0x80, 0x90, 0xA1, 0x11, 0xE0, 0xC4, ++0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x03, 0x43, 0x54, 0x40, 0x90, 0x05, 0x27, 0xE5, 0x54, 0xF0, ++0x90, 0xA1, 0x14, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x75, 0x07, 0x90, 0xA1, 0x11, 0xE0, 0xFF, ++0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x04, 0x7F, 0x04, 0x80, 0x21, 0x11, 0x9C, 0xEF, 0x60, ++0x04, 0x7F, 0x01, 0x80, 0x18, 0x7F, 0x02, 0x80, 0x14, 0x75, 0x54, 0x01, 0x90, 0x05, 0x27, 0xE5, ++0x54, 0xF0, 0x90, 0xA1, 0x14, 0xE0, 0x64, 0x04, 0x60, 0x02, 0x41, 0x83, 0xFF, 0x12, 0x75, 0x07, ++0x41, 0x83, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0x20, 0xE0, 0x02, 0x41, 0x4F, 0x43, 0x54, 0x31, 0x13, ++0x13, 0x54, 0x3F, 0x30, 0xE0, 0x07, 0x51, 0x88, 0x43, 0x54, 0x08, 0x80, 0x06, 0x7D, 0x40, 0xE4, ++0xFF, 0x51, 0xB0, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x03, ++0x43, 0x54, 0x02, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x54, 0x04, 0x90, 0x05, 0x27, ++0xE5, 0x54, 0xF0, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x0E, ++0x90, 0xA1, 0x15, 0xE0, 0x64, 0x02, 0x60, 0x6B, 0xE4, 0xFD, 0x7F, 0x02, 0x80, 0x22, 0x90, 0x05, ++0x27, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0xA1, 0x15, 0xE0, 0xB4, 0x02, 0x19, 0x12, 0xBB, 0x26, 0x11, ++0x9C, 0xBF, 0x01, 0x09, 0x90, 0xA1, 0x1C, 0xE0, 0xFF, 0x7D, 0x01, 0x80, 0x03, 0xE4, 0xFD, 0xFF, ++0x12, 0x56, 0x56, 0x80, 0x3E, 0x90, 0xA1, 0x1D, 0xE0, 0x90, 0xA1, 0x15, 0xF0, 0x80, 0x34, 0x75, ++0x54, 0x01, 0x90, 0x05, 0x27, 0xE5, 0x54, 0xF0, 0x90, 0xA1, 0x15, 0xE0, 0xB4, 0x02, 0x06, 0x7D, ++0x01, 0x7F, 0x04, 0x80, 0x0B, 0x90, 0xA1, 0x15, 0xE0, 0xB4, 0x08, 0x07, 0x7D, 0x01, 0x7F, 0x0C, ++0x12, 0x56, 0x56, 0x12, 0x73, 0xE9, 0x90, 0xA1, 0x1C, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x56, 0x56, ++0x12, 0xB8, 0x35, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, ++0xFF, 0x74, 0x15, 0x2F, 0xF8, 0xE6, 0x4D, 0xFE, 0xF6, 0x74, 0x30, 0x2F, 0xF5, 0x82, 0xE4, 0x34, ++0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0x51, 0xB0, 0x7D, 0x01, 0x7F, 0x02, ++0x74, 0x15, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0xFE, 0xF6, 0x74, 0x30, 0x2F, 0xF5, 0x82, ++0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0x90, 0xA1, 0xC0, 0xE0, 0x30, 0xE0, 0x33, 0x90, ++0xA1, 0xC2, 0xE0, 0x90, 0x05, 0x73, 0xF0, 0x90, 0xA1, 0xC3, 0xE0, 0x60, 0x05, 0x14, 0xF0, 0x02, ++0x57, 0xE2, 0x90, 0xA1, 0xC1, 0xE0, 0x14, 0x90, 0xA1, 0xC3, 0xF0, 0x90, 0x05, 0x73, 0x74, 0x01, ++0xF0, 0xE4, 0xFF, 0x12, 0x60, 0x0B, 0x7D, 0x02, 0x7F, 0x02, 0x51, 0x91, 0x7D, 0x01, 0x7F, 0x02, ++0x51, 0x91, 0x22, 0x71, 0xF8, 0x90, 0xA1, 0x20, 0xE0, 0x14, 0x90, 0x05, 0x73, 0xF0, 0x7D, 0x02, ++0x7F, 0x02, 0x51, 0x91, 0xF1, 0xC9, 0x80, 0xB0, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0x30, 0xE0, 0x08, ++0x90, 0xA1, 0x15, 0xE0, 0x64, 0x02, 0x60, 0x35, 0x90, 0xA1, 0x1A, 0xE0, 0x70, 0x04, 0xEF, 0x30, ++0xE0, 0x0A, 0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x02, 0x60, 0x23, 0x91, 0x5B, 0x90, 0xA1, 0x17, 0xE0, ++0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x15, 0x90, 0xA1, 0x20, 0xE0, 0xFF, 0xA3, 0xE0, 0x6F, ++0x70, 0x0B, 0x12, 0x7F, 0xFC, 0x51, 0xA6, 0x90, 0xA1, 0x21, 0xE0, 0x14, 0xF0, 0x22, 0xEF, 0x70, ++0x4E, 0x7D, 0x78, 0x7F, 0x02, 0x51, 0xB0, 0x7D, 0x02, 0x7F, 0x03, 0x51, 0xB0, 0x7D, 0xC8, 0x7F, ++0x02, 0xF1, 0xF3, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, 0xA0, ++0x90, 0xE0, 0x70, 0x15, 0x12, 0x60, 0x4D, 0x12, 0x92, 0xE8, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xF7, ++0xF0, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x80, 0x07, 0x7D, 0x01, 0x7F, 0x0C, 0x12, 0x56, 0x56, ++0x90, 0xA1, 0x16, 0xE0, 0x54, 0xF7, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0x90, ++0x01, 0x36, 0x74, 0x78, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x78, 0xFF, 0x51, 0x91, 0x7D, 0x02, ++0x7F, 0x03, 0x51, 0x91, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0xF0, 0x90, 0xA1, 0x25, 0xA3, 0xE0, ++0x90, 0x05, 0x58, 0xF0, 0x90, 0xA0, 0x90, 0xE0, 0xB4, 0x01, 0x15, 0x90, 0xA1, 0x17, 0xE0, 0x54, ++0xFB, 0xF0, 0x90, 0xA1, 0x1D, 0xE0, 0x20, 0xE2, 0x0E, 0x7D, 0x01, 0x7F, 0x04, 0x02, 0x56, 0x56, ++0x90, 0xA1, 0x17, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE4, 0x90, 0xA3, 0x15, 0xF0, 0x90, 0xA1, 0x1A, ++0xE0, 0x60, 0x57, 0x90, 0xA0, 0x90, 0xE0, 0x64, 0x01, 0x70, 0x4F, 0x90, 0xA3, 0x15, 0x04, 0xF0, ++0xE4, 0x90, 0xA1, 0x21, 0xF0, 0x90, 0xA1, 0x11, 0xE0, 0x30, 0xE0, 0x15, 0x90, 0xA1, 0x15, 0xE0, ++0xB4, 0x02, 0x05, 0xE4, 0x90, 0xA3, 0x15, 0xF0, 0x11, 0x9C, 0xEF, 0x70, 0x04, 0x90, 0xA3, 0x15, ++0xF0, 0x90, 0xA3, 0x15, 0xE0, 0x60, 0x23, 0x90, 0xA1, 0x1E, 0xE0, 0x44, 0x10, 0xF0, 0xE4, 0x90, ++0xA3, 0xAE, 0xF0, 0x90, 0xA1, 0x22, 0xE0, 0x90, 0xA3, 0xAF, 0x12, 0x48, 0x21, 0x90, 0xA1, 0x1D, ++0xE0, 0x20, 0xE2, 0x03, 0x12, 0x56, 0x52, 0x12, 0x8A, 0x1D, 0x22, 0x90, 0xA0, 0x90, 0xE0, 0x64, ++0x01, 0x60, 0x02, 0xA1, 0x0A, 0x90, 0xA1, 0x1A, 0xE0, 0x70, 0x02, 0xA1, 0x0A, 0x90, 0xA1, 0x18, ++0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x64, 0x01, 0x70, 0x26, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0xA1, 0x21, ++0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x04, 0x90, 0xA1, 0x20, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, 0x90, ++0xA1, 0x20, 0xE0, 0xFE, 0xFF, 0x80, 0x03, 0xEF, 0x04, 0xFF, 0x90, 0xA1, 0x21, 0xEF, 0xF0, 0x90, ++0xA1, 0x16, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0x93, 0x1D, 0x90, 0xA1, 0x17, 0xE0, 0x44, 0x04, 0xF0, ++0xE4, 0x90, 0xA1, 0x23, 0xF0, 0x90, 0xA1, 0x25, 0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x90, 0x01, ++0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, 0xA1, 0x1E, 0xE0, 0x54, 0xFD, 0xF0, ++0x54, 0xEF, 0xF0, 0x90, 0xA1, 0x18, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x24, 0xFD, 0x50, 0x02, 0x80, ++0x0E, 0x90, 0xA1, 0x11, 0xE0, 0x30, 0xE0, 0x05, 0x12, 0xB9, 0x05, 0x80, 0x02, 0xB1, 0x1B, 0x90, ++0xA1, 0x17, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x0F, 0x90, 0xA1, 0x20, 0xE0, 0xFF, ++0xA3, 0xE0, 0xB5, 0x07, 0x05, 0x12, 0x7F, 0xFC, 0x51, 0xAC, 0x90, 0xA1, 0x11, 0xE0, 0xC3, 0x13, ++0x20, 0xE0, 0x07, 0x90, 0xA1, 0x17, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE4, 0xF5, 0x63, 0x90, 0x06, ++0xA9, 0xE0, 0xF5, 0x63, 0x54, 0xC0, 0x70, 0x0C, 0x90, 0xA1, 0x1E, 0xE0, 0x54, 0xFE, 0xF0, 0x54, ++0xFD, 0xF0, 0x01, 0x4D, 0xE5, 0x63, 0x30, 0xE6, 0x23, 0x90, 0xA1, 0x1A, 0xE0, 0x64, 0x01, 0x70, ++0x22, 0x90, 0xA1, 0x1E, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0xA1, 0x18, 0xE0, 0x54, 0x0F, 0x64, 0x02, ++0x60, 0x05, 0x12, 0xB9, 0x9E, 0x80, 0x0C, 0x12, 0x4F, 0x9B, 0x80, 0x07, 0x90, 0xA1, 0x1E, 0xE0, ++0x54, 0xFE, 0xF0, 0xE5, 0x63, 0x90, 0xA1, 0x1E, 0x30, 0xE7, 0x1B, 0xE0, 0x44, 0x02, 0xF0, 0xE4, ++0x90, 0xA3, 0xAE, 0xF0, 0x90, 0xA1, 0xBA, 0xE0, 0x90, 0xA3, 0xAF, 0x12, 0x48, 0x21, 0x90, 0xA1, ++0x16, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0xA1, 0xE8, 0xE0, 0x30, ++0xE0, 0x05, 0x12, 0x91, 0x0F, 0x80, 0x03, 0x12, 0x63, 0x03, 0x90, 0xA2, 0x13, 0xE0, 0x30, 0xE0, ++0x04, 0xA3, 0xE0, 0x04, 0xF0, 0x90, 0xA2, 0x14, 0xE0, 0x64, 0x08, 0x70, 0x1B, 0x90, 0xA2, 0x13, ++0xE0, 0x30, 0xE0, 0x0F, 0x12, 0x7B, 0xFA, 0x90, 0xA2, 0x13, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xA3, ++0xF0, 0x80, 0x05, 0xE4, 0x90, 0xA2, 0x14, 0xF0, 0x90, 0xA1, 0xD1, 0xE0, 0xFF, 0xC4, 0x13, 0x13, ++0x54, 0x03, 0x30, 0xE0, 0x13, 0x90, 0xA2, 0x15, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x14, 0x09, 0x90, ++0x04, 0x9C, 0xE4, 0xF0, 0x90, 0xA2, 0x15, 0xF0, 0x90, 0xA1, 0x11, 0xE0, 0x30, 0xE0, 0x06, 0x90, ++0xA1, 0x13, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0x1A, 0xE0, 0x60, 0x6E, 0x90, 0xA1, 0x16, 0xE0, 0x30, ++0xE0, 0x23, 0x90, 0xA1, 0x2E, 0xE0, 0x04, 0xF0, 0x90, 0x05, 0x62, 0xE0, 0xFE, 0x90, 0x05, 0x61, ++0xE0, 0xFD, 0xED, 0x78, 0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0xA1, 0x4B, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA1, 0x17, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, ++0x12, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x0B, 0x51, 0xA6, 0x90, 0xA1, 0x20, 0xE0, 0x14, 0x90, ++0x05, 0x73, 0xF0, 0x90, 0xA3, 0xF8, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0xC3, 0x90, 0xA3, ++0xF9, 0xE0, 0x94, 0x80, 0x90, 0xA3, 0xF8, 0xE0, 0x64, 0x80, 0x94, 0x80, 0x40, 0x0B, 0x90, 0x01, ++0x98, 0xE0, 0x54, 0xFE, 0xF0, 0xE0, 0x44, 0x01, 0xF0, 0x7F, 0x01, 0xD1, 0x8A, 0x90, 0xA1, 0xC0, ++0xE0, 0x30, 0xE0, 0x11, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x0A, 0x51, 0xA6, 0x90, 0xA1, 0xC2, ++0xE0, 0x90, 0x05, 0x73, 0xF0, 0x22, 0xD1, 0xE7, 0x7F, 0x04, 0x8F, 0x71, 0x7F, 0x02, 0x12, 0x44, ++0xB7, 0x90, 0x9F, 0x97, 0xE0, 0x45, 0x71, 0xF0, 0x22, 0x7D, 0x03, 0x7F, 0x11, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0xB6, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0x12, 0x45, 0xBE, ++0x12, 0x46, 0xC6, 0xEF, 0x54, 0x0F, 0x64, 0x04, 0x70, 0x22, 0x90, 0xFD, 0x58, 0xE0, 0x20, 0xE0, ++0x13, 0x90, 0xA3, 0xB6, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0x12, 0x45, 0xB5, 0x12, 0x97, 0xC7, ++0x7F, 0x01, 0x80, 0x0E, 0x7F, 0x01, 0xD1, 0x86, 0x7F, 0x02, 0x80, 0x06, 0x7F, 0x02, 0xD1, 0x86, ++0x7F, 0x03, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, ++0x8B, 0x74, 0x15, 0xF0, 0x90, 0xA3, 0x99, 0x74, 0x01, 0xF0, 0x90, 0xA3, 0x8D, 0xEF, 0xF0, 0x7B, ++0x01, 0x7A, 0xA3, 0x79, 0x8B, 0x12, 0x6F, 0xEA, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xC0, 0xE0, 0xC0, ++0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, ++0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x0D, 0xF0, ++0x74, 0x5F, 0xA3, 0xF0, 0x12, 0x9F, 0x68, 0xE5, 0x21, 0x30, 0xE1, 0x03, 0x12, 0xA0, 0x19, 0xE5, ++0x21, 0x30, 0xE2, 0x02, 0x11, 0x62, 0xE5, 0x21, 0x30, 0xE5, 0x02, 0xF1, 0xD7, 0xE5, 0x22, 0x30, ++0xE0, 0x03, 0x12, 0x94, 0x74, 0xE5, 0x23, 0x30, 0xE1, 0x03, 0x12, 0x74, 0x77, 0xE5, 0x23, 0x30, ++0xE0, 0x03, 0x12, 0x74, 0x0A, 0xE5, 0x23, 0x30, 0xE3, 0x02, 0xF1, 0xD6, 0xE5, 0x23, 0x30, 0xE2, ++0x0A, 0x12, 0x8B, 0x46, 0x90, 0x07, 0x8F, 0xE0, 0x44, 0x10, 0xF0, 0xE5, 0x24, 0x30, 0xE1, 0x04, ++0x7F, 0x04, 0xD1, 0x8A, 0xE5, 0x24, 0x30, 0xE4, 0x02, 0x71, 0x03, 0xE5, 0x24, 0x30, 0xE5, 0x03, ++0x12, 0xA0, 0x6E, 0xE5, 0x24, 0x30, 0xE6, 0x03, 0x12, 0xA0, 0xAA, 0xE5, 0x24, 0x30, 0xE7, 0x03, ++0x12, 0x67, 0xB1, 0x74, 0x0D, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x5F, 0xA3, 0xF0, 0xD0, 0x07, ++0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, ++0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90, 0xA1, 0xCD, 0xE0, 0x30, 0xE0, 0x05, ++0xE4, 0xFF, 0x12, 0x60, 0xCE, 0x22, 0x22, 0x90, 0xA2, 0x2C, 0xE0, 0x30, 0xE0, 0x0A, 0xF1, 0xEF, ++0xE4, 0x90, 0xA2, 0x2E, 0xF0, 0x12, 0x47, 0xFA, 0x22, 0x7D, 0x01, 0x7F, 0x17, 0xC1, 0x9D, 0x7D, ++0x20, 0xE4, 0xFF, 0x74, 0x1D, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0xFE, 0xF6, 0x74, 0x38, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0xAC, 0x07, 0xEF, 0x54, 0x01, ++0xFE, 0x90, 0xA1, 0xC0, 0xE0, 0x54, 0xFE, 0x4E, 0xF0, 0xEF, 0x90, 0x01, 0x53, 0xB4, 0x01, 0x12, ++0xE4, 0xF0, 0x7D, 0x10, 0x7F, 0x03, 0x12, 0x80, 0x0B, 0x90, 0xA1, 0xC2, 0xE0, 0x90, 0x05, 0x73, ++0xF0, 0x22, 0x74, 0x03, 0xF0, 0x7D, 0x10, 0xFF, 0x12, 0x5F, 0xF3, 0x11, 0x4D, 0xE4, 0xFD, 0xFF, ++0x12, 0x49, 0x5E, 0x12, 0x55, 0x83, 0x90, 0xA1, 0x15, 0x74, 0x0C, 0xF0, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, ++0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, 0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, 0x90, 0xA1, 0xBE, ++0xE0, 0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x06, 0x90, 0x07, 0x78, 0x74, 0x03, 0xF0, ++0x90, 0xA1, 0xE8, 0xE0, 0x20, 0xE0, 0x34, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x2E, 0x90, 0xA2, 0x0C, ++0xE0, 0x60, 0x07, 0xE4, 0x90, 0xA3, 0xFA, 0xF0, 0x80, 0x06, 0x90, 0xA3, 0xFA, 0x74, 0x01, 0xF0, ++0x90, 0xA1, 0xBE, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x90, 0xA3, 0xFB, 0x30, 0xE0, 0x05, 0x74, 0x01, ++0xF0, 0x80, 0x03, 0x74, 0x02, 0xF0, 0x90, 0xA3, 0xFA, 0x71, 0x7A, 0x7F, 0x02, 0x12, 0x46, 0xD6, ++0xEF, 0x44, 0x01, 0xFD, 0x7F, 0x02, 0x12, 0x46, 0xAC, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0xC0, 0xEF, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0xE4, 0xFF, ++0xD1, 0xDF, 0x90, 0xA1, 0xD1, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x02, 0x11, 0x4D, ++0x90, 0xA1, 0xD1, 0xE0, 0xFF, 0x30, 0xE0, 0x08, 0x90, 0x07, 0x78, 0x74, 0x01, 0xF0, 0x80, 0x42, ++0x90, 0xA1, 0xCD, 0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x08, 0x90, 0x07, 0x78, ++0x74, 0x0D, 0xF0, 0x80, 0x2D, 0x90, 0xA1, 0xD0, 0xE0, 0xFE, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0D, ++0xEE, 0x13, 0x13, 0x54, 0x3F, 0x90, 0x07, 0x78, 0x30, 0xE0, 0x0F, 0x80, 0x12, 0x90, 0xA1, 0xD0, ++0xE0, 0xFE, 0xC3, 0x13, 0x90, 0x07, 0x78, 0x30, 0xE0, 0x05, 0x74, 0x03, 0xF0, 0x80, 0x03, 0x74, ++0x09, 0xF0, 0x90, 0xA3, 0xC0, 0xE0, 0x64, 0x03, 0x60, 0x02, 0x21, 0xD1, 0xEF, 0xC4, 0x13, 0x13, ++0x54, 0x03, 0x30, 0xE0, 0x6F, 0x90, 0xA1, 0xD7, 0xE0, 0xFF, 0x90, 0xA1, 0xE2, 0xE0, 0xFE, 0xD3, ++0x9F, 0x40, 0x42, 0xEE, 0x75, 0xF0, 0x03, 0xA4, 0xFF, 0x90, 0xA1, 0xD9, 0xE0, 0xFE, 0xC3, 0xEF, ++0x9E, 0xFF, 0x24, 0x03, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0xA1, 0xCF, 0xE0, 0xFE, 0xD3, 0x9D, 0xEC, ++0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x40, 0x08, 0xEE, 0x9F, 0x90, 0xA3, 0xC3, 0xF0, 0x80, 0x06, ++0x90, 0xA3, 0xC3, 0x74, 0x03, 0xF0, 0x90, 0xA3, 0xC3, 0xE0, 0xFF, 0x51, 0xF1, 0x90, 0xA1, 0xE0, ++0xE0, 0x04, 0xF0, 0x80, 0x18, 0x90, 0xA1, 0xDA, 0xE0, 0xFF, 0x51, 0xF1, 0x90, 0xA1, 0xD5, 0x74, ++0x04, 0xF0, 0xE4, 0x90, 0xA1, 0xE0, 0xF0, 0x90, 0x06, 0x92, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0xA1, ++0xE2, 0xF0, 0x80, 0x0D, 0x90, 0xA1, 0xCF, 0xE0, 0xFF, 0x51, 0xF1, 0x90, 0xA1, 0xE0, 0xE0, 0x04, ++0xF0, 0x90, 0xA1, 0xCD, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x30, 0xE0, 0x07, 0xE4, 0x90, ++0xA3, 0xC2, 0xF0, 0x80, 0x06, 0x90, 0xA3, 0xC2, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, ++0x13, 0x54, 0x07, 0x20, 0xE0, 0x13, 0x90, 0xA2, 0x0C, 0xE0, 0x60, 0x07, 0xE4, 0x90, 0xA3, 0xC1, ++0xF0, 0x80, 0x06, 0x90, 0xA3, 0xC1, 0x74, 0x01, 0xF0, 0x90, 0xA3, 0xC1, 0x71, 0x7A, 0x90, 0xA1, ++0xDF, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0xCD, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x0D, 0x90, ++0xA3, 0xC0, 0xE0, 0x70, 0x42, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x80, 0x3B, 0x90, 0xA1, 0xCD, 0xE0, ++0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x1D, 0x90, 0xA1, 0xD3, 0xE0, 0x44, 0x20, 0xF0, 0x90, 0xA1, 0xBF, ++0xE0, 0x60, 0x04, 0x7D, 0x01, 0x80, 0x1B, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x7D, 0x01, 0x7F, ++0x0C, 0x80, 0x11, 0x90, 0xA3, 0xC0, 0xE0, 0xB4, 0x03, 0x0D, 0x90, 0xA1, 0x1A, 0xE0, 0x60, 0x07, ++0xE4, 0xFD, 0x7F, 0x04, 0x12, 0x56, 0x56, 0x90, 0xA1, 0xBF, 0xE0, 0x60, 0x18, 0x90, 0xA3, 0xC0, ++0xE0, 0x70, 0x04, 0x7D, 0x04, 0x80, 0x0A, 0x90, 0xA3, 0xC0, 0xE0, 0x64, 0x03, 0x70, 0x34, 0x7D, ++0x0B, 0x7F, 0x6F, 0x80, 0x2B, 0x90, 0xA3, 0xC0, 0xE0, 0x70, 0x04, 0xFD, 0xFF, 0x80, 0x21, 0x90, ++0xA3, 0xC0, 0xE0, 0xB4, 0x03, 0x1D, 0x90, 0xA1, 0xCD, 0xE0, 0xFF, 0xC4, 0x13, 0x54, 0x07, 0x20, ++0xE0, 0x0B, 0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x12, 0xB9, 0x9E, 0xE4, 0xFD, 0xFF, ++0x12, 0x49, 0x5E, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x30, 0xE0, 0x04, ++0x7F, 0x01, 0xF1, 0xE7, 0x90, 0xA1, 0xD1, 0xE0, 0xC3, 0x13, 0x90, 0x06, 0xCD, 0x30, 0xE0, 0x0D, ++0xE0, 0x44, 0x10, 0xF0, 0x90, 0x06, 0xCF, 0xE0, 0x44, 0x10, 0xF0, 0x80, 0x0B, 0xE0, 0x54, 0xEF, ++0xF0, 0x90, 0x06, 0xCF, 0xE0, 0x54, 0xEF, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xC3, 0x9F, ++0xFF, 0xE4, 0x90, 0xA3, 0xAE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x6C, 0x7E, 0x01, ++0x02, 0x48, 0x29, 0xE4, 0x90, 0xA3, 0x05, 0xF0, 0x90, 0xA1, 0xCD, 0xE0, 0x30, 0xE0, 0x6A, 0x90, ++0xA1, 0xD1, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x1E, 0x90, 0xA1, 0xD9, 0xE0, 0xFF, ++0x51, 0xF1, 0x90, 0x06, 0x92, 0x74, 0x04, 0xF0, 0x90, 0xA1, 0xD5, 0x74, 0x01, 0xF0, 0xE4, 0x90, ++0xA1, 0xE2, 0xF0, 0x90, 0xA1, 0xE0, 0xF0, 0x80, 0x10, 0x90, 0xA3, 0x05, 0xE0, 0xFF, 0x90, 0xA1, ++0xCE, 0x51, 0xED, 0x90, 0xA1, 0xE0, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0xDF, 0x74, 0x01, 0xF0, 0x90, ++0xA1, 0xBF, 0xE0, 0x60, 0x07, 0x7D, 0x05, 0x7F, 0x6F, 0x02, 0x49, 0x5E, 0xE4, 0xFD, 0xFF, 0x12, ++0x49, 0x5E, 0x90, 0xA1, 0xCD, 0xE0, 0xFF, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, 0x0B, 0xEF, 0x13, ++0x13, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x12, 0xB9, 0x9E, 0x22, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x26, 0x8D, 0x27, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, ++0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0xA1, 0x22, 0x90, 0xA2, 0x0D, 0xE0, 0x60, 0x02, 0x81, 0x42, ++0xE5, 0x26, 0x64, 0x02, 0x60, 0x4A, 0xE5, 0x27, 0x70, 0x46, 0x7F, 0x48, 0x7E, 0x09, 0x12, 0x37, ++0x4E, 0xE4, 0xFF, 0xEE, 0x54, 0xF0, 0xFE, 0xEC, 0x90, 0xA3, 0x9A, 0x12, 0x08, 0x6D, 0xE5, 0x26, ++0x90, 0xA3, 0x9A, 0xB4, 0x01, 0x05, 0x12, 0x45, 0x71, 0x80, 0x0C, 0x12, 0x45, 0x71, 0xEF, 0x44, ++0x80, 0xFF, 0xEE, 0x44, 0x02, 0xFE, 0xEC, 0x90, 0xA3, 0x9A, 0x12, 0x08, 0x6D, 0x90, 0xA3, 0x9A, ++0x12, 0x45, 0x71, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x48, 0x7E, 0x09, 0x12, 0x38, 0x45, ++0xE5, 0x27, 0x64, 0x02, 0x70, 0x02, 0xA1, 0x22, 0xE5, 0x27, 0x70, 0x02, 0xA1, 0x22, 0x7F, 0x48, ++0x7E, 0x09, 0x12, 0x37, 0x4E, 0xE4, 0xFF, 0xEE, 0x54, 0xF0, 0xFE, 0xEC, 0x90, 0xA3, 0x9A, 0x12, ++0x08, 0x6D, 0x90, 0xA2, 0x0C, 0xE0, 0x90, 0xA3, 0x9A, 0x60, 0x09, 0x12, 0x45, 0x71, 0xEF, 0x44, ++0x80, 0xFF, 0x80, 0x07, 0x12, 0x45, 0x71, 0xEE, 0x44, 0x02, 0xFE, 0xEC, 0x90, 0xA3, 0x9A, 0x12, ++0x08, 0x6D, 0x90, 0xA3, 0x9A, 0x12, 0x45, 0x71, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x48, ++0xA1, 0x1D, 0xE5, 0x26, 0x64, 0x02, 0x60, 0x43, 0x7F, 0x2C, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0xEF, ++0x54, 0xFC, 0xFF, 0xEC, 0x90, 0xA3, 0x9A, 0x12, 0x08, 0x6D, 0xE5, 0x26, 0x90, 0xA3, 0x9A, 0xB4, ++0x01, 0x08, 0x12, 0x45, 0x71, 0xEF, 0x44, 0x01, 0x80, 0x06, 0x12, 0x45, 0x71, 0xEF, 0x44, 0x02, ++0xFF, 0xEC, 0x90, 0xA3, 0x9A, 0x12, 0x08, 0x6D, 0x90, 0xA3, 0x9A, 0x12, 0x45, 0x71, 0x90, 0xAA, ++0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x2C, 0x7E, 0x09, 0x12, 0x38, 0x45, 0xE5, 0x27, 0x64, 0x02, 0x70, ++0x02, 0xA1, 0x22, 0x7F, 0x30, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0xE4, 0xFF, 0xEC, 0x90, 0xA3, 0x9A, ++0x12, 0x08, 0x6D, 0xE5, 0x27, 0x70, 0x13, 0x90, 0xA3, 0x9A, 0x12, 0x45, 0x71, 0xEF, 0x44, 0x77, ++0xFF, 0xEC, 0x90, 0xA3, 0x9A, 0x12, 0x08, 0x6D, 0x80, 0x55, 0x90, 0xA3, 0x9A, 0x12, 0x45, 0x71, ++0xEF, 0x44, 0x66, 0xFF, 0xEC, 0x90, 0xA3, 0x9A, 0x12, 0x08, 0x6D, 0x7F, 0x2C, 0x7E, 0x09, 0x12, ++0x37, 0x4E, 0xEF, 0x54, 0xFC, 0xFF, 0xEC, 0x90, 0xA3, 0x9E, 0x12, 0x08, 0x6D, 0x90, 0xA2, 0x0C, ++0xE0, 0x90, 0xA3, 0x9E, 0x60, 0x08, 0x12, 0x45, 0x71, 0xEF, 0x44, 0x02, 0x80, 0x06, 0x12, 0x45, ++0x71, 0xEF, 0x44, 0x01, 0xFF, 0xEC, 0x90, 0xA3, 0x9E, 0x12, 0x08, 0x6D, 0x90, 0xA3, 0x9E, 0x12, ++0x45, 0x71, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x2C, 0x7E, 0x09, 0x12, 0x38, 0x45, 0x90, ++0xA3, 0x9A, 0x12, 0x45, 0x71, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x30, 0x7E, 0x09, 0x12, ++0x38, 0x45, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA3, 0x15, 0xEF, 0xF0, 0x90, 0xA3, 0x17, 0x74, ++0x02, 0xF0, 0x7F, 0x01, 0xD1, 0xDF, 0x90, 0xA1, 0xD1, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, ++0xE0, 0x22, 0x90, 0xA3, 0x15, 0xE0, 0xB4, 0x02, 0x04, 0x7D, 0x07, 0x80, 0x09, 0x90, 0xA3, 0x15, ++0xE0, 0xB4, 0x05, 0x07, 0x7D, 0x0D, 0x7F, 0xFF, 0x12, 0x49, 0x5E, 0x12, 0x4C, 0x08, 0xBF, 0x01, ++0x03, 0x12, 0x46, 0xFD, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x90, 0x07, ++0x78, 0x30, 0xE0, 0x05, 0x74, 0x03, 0xF0, 0x80, 0x03, 0x74, 0x01, 0xF0, 0x90, 0xA3, 0x15, 0xE0, ++0xB4, 0x02, 0x0C, 0x90, 0xA1, 0xCE, 0xE0, 0x24, 0x03, 0xFF, 0x90, 0xA1, 0xDD, 0x51, 0xED, 0x90, ++0xA1, 0xCD, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x07, 0xE4, 0x90, 0xA3, 0x16, 0xF0, 0x80, 0x06, 0x90, ++0xA3, 0x16, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, 0x13, ++0x90, 0xA2, 0x0C, 0xE0, 0x60, 0x08, 0x90, 0xA3, 0x17, 0x74, 0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, ++0xA3, 0x17, 0xF0, 0x90, 0xA3, 0x17, 0xE0, 0xFF, 0x90, 0xA3, 0x16, 0xE0, 0xFD, 0x71, 0x7F, 0xE4, ++0x90, 0xA1, 0xDF, 0xF0, 0x90, 0xA3, 0x15, 0xE0, 0xFF, 0xB4, 0x02, 0x08, 0x90, 0xA1, 0xE0, 0xE0, ++0x04, 0xF0, 0x80, 0x09, 0xEF, 0xB4, 0x05, 0x05, 0xE4, 0x90, 0xA1, 0xE0, 0xF0, 0x90, 0xA1, 0xCD, ++0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x17, 0x90, 0xA3, 0x15, 0xE0, 0xB4, 0x02, 0x04, 0x7D, ++0x08, 0x80, 0x66, 0x90, 0xA3, 0x15, 0xE0, 0x64, 0x05, 0x70, 0x63, 0x7D, 0x0E, 0x80, 0x5A, 0x90, ++0xA1, 0xCD, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x2C, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, 0x54, ++0x07, 0x20, 0xE0, 0x0A, 0x90, 0xA1, 0x1C, 0xE0, 0xFF, 0xE4, 0xFD, 0x12, 0x56, 0x56, 0x90, 0xA3, ++0x15, 0xE0, 0xB4, 0x02, 0x04, 0x7D, 0x09, 0x80, 0x30, 0x90, 0xA3, 0x15, 0xE0, 0x64, 0x05, 0x70, ++0x2D, 0x7D, 0x0F, 0x80, 0x24, 0x90, 0xA1, 0x1A, 0xE0, 0x60, 0x23, 0x90, 0xA1, 0x1C, 0xE0, 0xFF, ++0xE4, 0xFD, 0x12, 0x56, 0x56, 0x90, 0xA3, 0x15, 0xE0, 0xB4, 0x02, 0x04, 0x7D, 0x0A, 0x80, 0x09, ++0x90, 0xA3, 0x15, 0xE0, 0xB4, 0x05, 0x07, 0x7D, 0x10, 0x7F, 0x6F, 0x12, 0x49, 0x5E, 0x90, 0xA1, ++0xD0, 0xE0, 0x30, 0xE0, 0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, ++0x13, 0x13, 0x13, 0x54, 0x01, 0x30, 0xE0, 0x04, 0xE4, 0xFF, 0xF1, 0xE7, 0x90, 0xA1, 0xD1, 0xE0, ++0xC3, 0x13, 0x90, 0x06, 0xCD, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x06, 0xCF, 0xE0, 0x54, 0xEF, 0xF0, ++0x22, 0x90, 0xA1, 0xCD, 0xE0, 0x30, 0xE0, 0x36, 0x12, 0x8B, 0x79, 0x90, 0xA1, 0xE0, 0xE0, 0xFF, ++0xB4, 0x01, 0x02, 0x80, 0x1C, 0x90, 0xA1, 0xE0, 0xE0, 0xFF, 0xB4, 0x02, 0x02, 0x80, 0x1D, 0x90, ++0xA1, 0xE0, 0xE0, 0xFF, 0xB4, 0x03, 0x02, 0x01, 0xCE, 0x90, 0xA1, 0xE0, 0xE0, 0xFF, 0xB4, 0x04, ++0x03, 0x02, 0x8D, 0xEB, 0x90, 0xA1, 0xE0, 0xE0, 0xFF, 0xB4, 0x05, 0x02, 0xB1, 0x27, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0xB4, 0x03, 0x13, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, ++0x13, 0x54, 0x03, 0x90, 0x06, 0xCC, 0x30, 0xE0, 0x35, 0xE4, 0xF0, 0x80, 0x34, 0x90, 0xA1, 0xD1, ++0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0C, 0xEF, 0x90, 0x06, 0xCC, 0x70, 0x03, 0xF0, 0x80, 0x03, ++0x74, 0x03, 0xF0, 0x90, 0xA2, 0x19, 0xE0, 0x30, 0xE0, 0x17, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0B, ++0xEF, 0x90, 0x06, 0xCC, 0x70, 0x03, 0xF0, 0x80, 0x08, 0x80, 0x03, 0x90, 0x06, 0xCC, 0x74, 0x03, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x20, ++0xE0, 0xB4, 0x01, 0x02, 0x80, 0x4C, 0x90, 0xA2, 0x20, 0xE0, 0xB4, 0x02, 0x12, 0x12, 0x8B, 0x1F, ++0x7F, 0x01, 0xD1, 0xDF, 0x12, 0x91, 0x3E, 0x90, 0xA2, 0x20, 0x74, 0x03, 0xF0, 0x80, 0x4D, 0x90, ++0xA2, 0x20, 0xE0, 0x64, 0x03, 0x70, 0x24, 0x90, 0xA2, 0x23, 0x12, 0x8B, 0x22, 0xE4, 0xFF, 0xD1, ++0xDF, 0x12, 0x91, 0x3E, 0x90, 0xA2, 0x19, 0xE0, 0xC3, 0x13, 0x54, 0x03, 0xFF, 0xE4, 0xFB, 0xFD, ++0x12, 0x4C, 0xA9, 0x90, 0xA2, 0x20, 0x74, 0x04, 0xF0, 0x80, 0x21, 0x90, 0xA2, 0x20, 0xE0, 0xB4, ++0x04, 0x1A, 0x90, 0xA2, 0x19, 0xE0, 0xC3, 0x13, 0x54, 0x03, 0xFF, 0x7B, 0x01, 0x7D, 0x01, 0x12, ++0x4C, 0xA9, 0x90, 0xA2, 0x20, 0x74, 0x02, 0xF0, 0x90, 0xA2, 0x1E, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0x90, 0xA1, 0xE8, 0xE0, 0x30, 0xE0, 0x04, 0xF1, 0xC8, 0x80, 0x02, 0xD1, 0xA1, 0x90, 0xA2, ++0x19, 0xE0, 0x30, 0xE0, 0x02, 0xF1, 0x36, 0x22, 0x7D, 0x12, 0x7F, 0xFF, 0x12, 0x49, 0x5E, 0x90, ++0x07, 0x78, 0x74, 0x01, 0xF0, 0x90, 0xA2, 0x0C, 0xE0, 0xFF, 0xE4, 0xFD, 0x61, 0x7F, 0x11, 0x4D, ++0x90, 0xA1, 0x14, 0x74, 0x03, 0xF0, 0x22, 0x90, 0xA1, 0xFD, 0xE0, 0xFE, 0xC3, 0x13, 0x30, 0xE0, ++0x1C, 0xEF, 0xB4, 0x01, 0x05, 0x90, 0xA2, 0x04, 0x80, 0x03, 0x90, 0xA2, 0x00, 0x12, 0x45, 0x71, ++0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x80, 0x7E, 0x08, 0x12, 0x38, 0x45, 0x22, 0xE4, 0xFB, ++0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x44, 0xDE, 0x90, 0xA2, 0xE6, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x9F, ++0x97, 0xE0, 0x60, 0xEA, 0xC2, 0xAF, 0x30, 0xE0, 0x0A, 0x54, 0xFE, 0xF0, 0xE4, 0xFF, 0x31, 0xBD, ++0x12, 0xA8, 0x5D, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x9F, 0x97, 0xE0, 0xFF, 0x30, 0xE1, 0x05, 0x54, ++0xFD, 0xF0, 0x11, 0xE3, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x9F, 0x97, 0xE0, 0xFF, 0x30, 0xE2, 0x05, ++0x54, 0xFB, 0xF0, 0x11, 0x91, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x9F, 0x97, 0xE0, 0xFF, 0x30, 0xE6, ++0x05, 0x54, 0xBF, 0xF0, 0x11, 0x6A, 0xD2, 0xAF, 0x80, 0xB4, 0xE4, 0x7B, 0x01, 0x7A, 0xA2, 0x79, ++0x16, 0x12, 0x5E, 0x99, 0xEF, 0xB4, 0x02, 0x18, 0x90, 0xA3, 0xE4, 0xE0, 0x64, 0x04, 0x60, 0x0B, ++0x7F, 0x40, 0x91, 0xE0, 0x90, 0xA3, 0xE4, 0xE0, 0x04, 0xF0, 0x22, 0xE4, 0x90, 0xA3, 0xE4, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFF, 0x90, 0xA0, 0x8C, 0xE0, 0xFE, 0x90, ++0xA0, 0x8B, 0xE0, 0xFD, 0xB5, 0x06, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x64, 0x01, ++0x60, 0x2C, 0xED, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0xF5, 0xF9, 0x74, 0x9F, 0x35, 0xF0, 0xFA, 0x7B, ++0x01, 0x31, 0x47, 0x7F, 0x01, 0xEF, 0x60, 0x16, 0x90, 0xA0, 0x8B, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, ++0x0A, 0x02, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0xA0, 0x8B, 0xF0, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9F, 0xF4, 0xE0, 0xFF, 0x90, ++0x9F, 0xF3, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x43, 0x90, ++0x9F, 0xF3, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, 0x9F, 0xA3, 0x12, 0x45, 0xA9, 0xE0, 0xFD, 0xEE, ++0x75, 0xF0, 0x08, 0xA4, 0x24, 0xA4, 0xF9, 0x74, 0x9F, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xAF, 0x05, ++0x71, 0x15, 0x90, 0x9F, 0xF3, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, 0x02, 0x7F, 0x01, ++0xEF, 0x60, 0x05, 0xE4, 0x90, 0x9F, 0xF3, 0xF0, 0x12, 0x9B, 0x03, 0x90, 0x9F, 0x97, 0xE0, 0x44, ++0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, ++0xD0, 0x12, 0x45, 0xBE, 0x7F, 0x96, 0x7E, 0x02, 0x12, 0x9C, 0x61, 0xEF, 0x60, 0x5A, 0x90, 0x01, ++0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0xFE, 0xEF, ++0x24, 0x01, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, 0xA3, 0xD3, 0xEF, 0xF0, 0xEE, 0xFF, 0x90, 0xFD, 0x11, ++0xF0, 0x90, 0xA3, 0xD3, 0xE0, 0xFD, 0x90, 0x02, 0x94, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA3, 0xD0, ++0x12, 0x45, 0xB5, 0x90, 0x00, 0x0E, 0x12, 0x06, 0xA2, 0x24, 0x02, 0xFF, 0xE4, 0x33, 0xFE, 0x12, ++0x9C, 0xB7, 0x90, 0xA3, 0xD3, 0xE0, 0x24, 0x18, 0xFF, 0x90, 0xA3, 0xD0, 0x12, 0x45, 0xB5, 0x12, ++0x9D, 0x12, 0x90, 0x02, 0x96, 0x74, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA2, 0x58, ++0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0x90, 0xA2, 0x59, 0xE0, 0xFF, 0xC3, 0x94, 0x80, 0x50, 0x47, 0x74, ++0x5A, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xA2, 0xF5, 0x83, 0xE4, 0xF0, 0x75, 0xF0, 0x10, 0xEF, 0x90, ++0x81, 0x03, 0x12, 0x45, 0xA9, 0xE0, 0x90, 0xA2, 0x59, 0x30, 0xE7, 0x0E, 0xE0, 0x24, 0x81, 0xF5, ++0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE4, 0xF0, 0x80, 0x14, 0xE0, 0xFF, 0xF1, 0x9C, 0x90, 0xA2, ++0x59, 0xE0, 0x24, 0x5A, 0xF5, 0x82, 0xE4, 0x34, 0xA2, 0xF5, 0x83, 0x74, 0x01, 0xF0, 0x90, 0xA2, ++0x59, 0xE0, 0x04, 0xF0, 0x80, 0xAF, 0x7F, 0x0C, 0x7E, 0x00, 0x12, 0x3E, 0x50, 0xE4, 0x90, 0xA2, ++0x59, 0xF0, 0x90, 0xA2, 0x59, 0xE0, 0xFF, 0xC3, 0x94, 0x80, 0x40, 0x02, 0x61, 0x14, 0x74, 0x5A, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xA2, 0xF5, 0x83, 0xE0, 0x70, 0x02, 0x61, 0x0C, 0x90, 0xA2, 0x59, ++0xE0, 0xFF, 0x75, 0xF0, 0x10, 0x90, 0x81, 0x06, 0x12, 0x45, 0xA9, 0xE0, 0xFD, 0x75, 0xF0, 0x10, ++0xEF, 0x90, 0x81, 0x07, 0x12, 0x45, 0xA9, 0xE0, 0xFE, 0xED, 0xFF, 0x90, 0xA2, 0x59, 0xE0, 0xFC, ++0x25, 0xE0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, ++0x75, 0xF0, 0x10, 0xEC, 0x90, 0x81, 0x0A, 0x12, 0x45, 0xA9, 0xE0, 0xFD, 0x75, 0xF0, 0x10, 0xEC, ++0x90, 0x81, 0x0B, 0x12, 0x45, 0xA9, 0xE0, 0xFE, 0xED, 0xFF, 0x90, 0xA2, 0x59, 0xE0, 0x75, 0xF0, ++0x0A, 0x90, 0x8D, 0x01, 0x12, 0x45, 0xA9, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x7F, 0x01, 0x90, 0xA2, ++0x59, 0xE0, 0xFE, 0x75, 0xF0, 0x10, 0x90, 0x81, 0x0B, 0x12, 0x45, 0xA9, 0xE5, 0x82, 0x2F, 0xF5, ++0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xE0, 0xFD, 0x75, 0xF0, 0x0A, 0xEE, 0x90, 0x8D, 0x01, 0x12, ++0x45, 0xA9, 0x75, 0xF0, 0x02, 0xEF, 0x12, 0x45, 0xA9, 0xE4, 0xF0, 0xA3, 0xED, 0xF0, 0x0F, 0xEF, ++0xB4, 0x05, 0xCB, 0x90, 0xA2, 0x59, 0xE0, 0xFF, 0x75, 0xF0, 0x10, 0x90, 0x81, 0x09, 0x12, 0x45, ++0xA9, 0xE0, 0xFE, 0x74, 0x16, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x98, 0xF5, 0x83, 0xEE, 0xF0, 0x90, ++0xA2, 0x59, 0xE0, 0xFF, 0x90, 0xA2, 0x58, 0xE0, 0xFD, 0x12, 0x78, 0xC9, 0x90, 0xA2, 0x59, 0xE0, ++0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0x74, 0x01, 0xF0, 0x90, 0xA2, 0x59, 0xE0, ++0x04, 0xF0, 0x41, 0x22, 0x22, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xBE, 0x90, 0xA2, 0xE7, 0xEF, 0xF0, ++0x12, 0x45, 0xC7, 0x6B, 0x87, 0x00, 0x6B, 0x90, 0x01, 0x6B, 0x99, 0x02, 0x6B, 0xA2, 0x10, 0x6B, ++0xAB, 0x11, 0x6B, 0xB4, 0x12, 0x6B, 0xBC, 0x14, 0x6B, 0xC4, 0x20, 0x6B, 0xCD, 0x21, 0x6B, 0xD6, ++0x23, 0x6B, 0xDE, 0x24, 0x6B, 0xE7, 0x25, 0x6B, 0xF0, 0x27, 0x6B, 0xF9, 0x28, 0x6C, 0x01, 0x40, ++0x6C, 0x0A, 0x42, 0x6C, 0x13, 0x44, 0x6C, 0x1B, 0x60, 0x6C, 0x24, 0x61, 0x6C, 0x2C, 0x62, 0x6C, ++0x35, 0x63, 0x6C, 0x3D, 0x64, 0x6C, 0x46, 0x65, 0x6C, 0x4E, 0x66, 0x6C, 0x56, 0x67, 0x6C, 0x5E, ++0x68, 0x6C, 0x67, 0x69, 0x6C, 0x70, 0x6A, 0x6C, 0x79, 0x6B, 0x6C, 0x82, 0x6C, 0x6C, 0x8B, 0x6D, ++0x6C, 0x94, 0x6E, 0x00, 0x00, 0x6C, 0x9D, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, 0x91, 0xFA, ++0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, 0x92, 0x46, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, ++0x74, 0xBF, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, 0x94, 0xFB, 0x90, 0xA2, 0xE8, 0x12, 0x45, ++0xB5, 0x02, 0x80, 0x20, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x81, 0xAD, 0x90, 0xA2, 0xE8, 0x12, ++0x45, 0xB5, 0xE1, 0x8D, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, 0x95, 0x23, 0x90, 0xA2, 0xE8, ++0x12, 0x45, 0xB5, 0x02, 0x97, 0x0D, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0xE1, 0x85, 0x90, 0xA2, ++0xE8, 0x12, 0x45, 0xB5, 0x02, 0x58, 0xA8, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, 0x97, 0x53, ++0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, 0x97, 0x93, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0xC1, ++0x24, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, 0xB3, 0x0F, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, ++0x02, 0xA4, 0x2D, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0xA1, 0x90, 0x90, 0xA2, 0xE8, 0x12, 0x45, ++0xB5, 0x02, 0x82, 0x51, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x81, 0xC1, 0x90, 0xA2, 0xE8, 0x12, ++0x45, 0xB5, 0x02, 0x5F, 0xE9, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0xE1, 0xBD, 0x90, 0xA2, 0xE8, ++0x12, 0x45, 0xB5, 0x02, 0x98, 0x3E, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0xE1, 0xAB, 0x90, 0xA2, ++0xE8, 0x12, 0x45, 0xB5, 0xE1, 0x41, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x81, 0xFB, 0x90, 0xA2, ++0xE8, 0x12, 0x45, 0xB5, 0x02, 0x98, 0xA0, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, 0x89, 0x70, ++0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, 0x98, 0xBF, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, ++0x99, 0x22, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, 0x9A, 0x46, 0x90, 0xA2, 0xE8, 0x12, 0x45, ++0xB5, 0x02, 0x9A, 0x70, 0x90, 0xA2, 0xE8, 0x12, 0x45, 0xB5, 0x02, 0x9A, 0xD2, 0x90, 0x01, 0xC0, ++0xE0, 0x44, 0x01, 0xF0, 0x90, 0xA2, 0xE7, 0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, 0x12, 0x06, 0x89, ++0xFF, 0x90, 0xA0, 0x8F, 0xF0, 0xBF, 0x01, 0x08, 0x12, 0x9D, 0x8B, 0xE4, 0x90, 0xA0, 0x8F, 0xF0, ++0x22, 0x90, 0xA1, 0xF3, 0xE0, 0x44, 0x04, 0xF0, 0x7D, 0x01, 0x7F, 0x23, 0x12, 0x5E, 0x9D, 0x8F, ++0x51, 0xE5, 0x51, 0xB4, 0x03, 0x09, 0xE4, 0xFF, 0x12, 0x7B, 0x71, 0x7F, 0x04, 0x91, 0xE0, 0x22, ++0x90, 0xA4, 0x05, 0xEF, 0xF0, 0x7F, 0x02, 0x12, 0x44, 0xB7, 0x90, 0x9F, 0x97, 0xE0, 0xFF, 0x90, ++0xA4, 0x05, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x9F, 0x97, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x12, 0x06, 0x89, 0x90, 0xA2, 0xEB, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0x90, ++0xA2, 0xEC, 0xF0, 0x90, 0x00, 0x02, 0x12, 0x06, 0xA2, 0x90, 0xA2, 0xED, 0xF0, 0x90, 0x00, 0x03, ++0x12, 0x06, 0xA2, 0x90, 0xA2, 0xEE, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x06, 0xA2, 0x90, 0xA2, 0xEF, ++0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0xA1, 0xF3, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0xA2, 0xEC, ++0xE0, 0xB4, 0x0C, 0x06, 0xE5, 0x70, 0x70, 0x11, 0x80, 0x00, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xEB, ++0x7D, 0x07, 0x7F, 0x30, 0x12, 0x5E, 0x9D, 0x8F, 0x51, 0x90, 0xA2, 0xEC, 0xE0, 0xB4, 0x0D, 0x0E, ++0xE5, 0x51, 0x64, 0x01, 0x60, 0x05, 0x75, 0x70, 0x01, 0x80, 0x03, 0xE4, 0xF5, 0x70, 0xE5, 0x51, ++0xB4, 0x01, 0x05, 0x75, 0x52, 0x01, 0x80, 0x03, 0xE4, 0xF5, 0x52, 0x90, 0xA2, 0xEB, 0xE0, 0xFB, ++0xAD, 0x52, 0xE4, 0xFF, 0x12, 0x7F, 0x6C, 0x7F, 0x04, 0x91, 0xE0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x90, 0xA2, 0xEB, 0x12, 0x45, 0xBE, 0xE4, 0x90, 0xA2, 0xF0, 0xF0, 0xFD, 0x90, 0xA2, 0xEB, 0x12, ++0x45, 0xB5, 0x8D, 0x82, 0x75, 0x83, 0x00, 0x12, 0x06, 0xA2, 0xF4, 0x60, 0x4D, 0x90, 0xA2, 0xF0, ++0xE0, 0xFF, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x8D, 0x82, 0x75, 0x83, 0x00, 0x12, 0x06, 0xA2, ++0xFE, 0x75, 0xF0, 0x10, 0x90, 0x81, 0x01, 0x12, 0x45, 0xA9, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, ++0x01, 0xFC, 0xA8, 0x05, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0x90, 0xA2, 0xF0, 0xF0, ++0x75, 0xF0, 0x10, 0xEE, 0x90, 0x81, 0x00, 0x12, 0x45, 0xA9, 0xE0, 0xFF, 0x74, 0xF1, 0x2D, 0xF5, ++0x82, 0xE4, 0x34, 0xA2, 0xF5, 0x83, 0xEF, 0xF0, 0x80, 0x0D, 0x74, 0xF1, 0x2D, 0xF5, 0x82, 0xE4, ++0x34, 0xA2, 0xF5, 0x83, 0x74, 0xFF, 0xF0, 0x0D, 0xED, 0xB4, 0x07, 0x90, 0x90, 0xA2, 0xEE, 0x74, ++0x05, 0xF0, 0x90, 0xA2, 0xFC, 0x74, 0x08, 0xF0, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xEE, 0xF1, 0xEA, ++0x7F, 0x04, 0x81, 0xE0, 0x12, 0x06, 0x89, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0xA1, 0xC4, 0xE0, 0x54, ++0xFE, 0x4E, 0xF0, 0xEF, 0x54, 0x02, 0x33, 0x33, 0x33, 0x54, 0xF8, 0xFF, 0x90, 0xA1, 0x16, 0xE0, ++0x54, 0xEF, 0x4F, 0xF0, 0x90, 0xA1, 0xC4, 0xE0, 0x54, 0x01, 0xFF, 0xEF, 0x64, 0x01, 0x70, 0x6B, ++0x12, 0xBA, 0xE9, 0x90, 0x01, 0x38, 0xE0, 0x90, 0xA1, 0xC5, 0xF0, 0x90, 0x01, 0x39, 0xE0, 0x90, ++0xA1, 0xC6, 0xF0, 0x90, 0x01, 0x3A, 0xE0, 0x90, 0xA1, 0xC7, 0xF0, 0x90, 0x01, 0x3B, 0xE0, 0x90, ++0xA1, 0xC8, 0xF0, 0x90, 0x01, 0x30, 0xE0, 0x90, 0xA1, 0xC9, 0xF0, 0x90, 0x01, 0x31, 0xE0, 0x90, ++0xA1, 0xCA, 0xF0, 0x90, 0x01, 0x32, 0xE0, 0x90, 0xA1, 0xCB, 0xF0, 0x90, 0x01, 0x33, 0xE0, 0x90, ++0xA1, 0xCC, 0xF0, 0x90, 0x01, 0x38, 0xE4, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, ++0x30, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x30, 0x74, 0x10, 0xF0, 0x90, 0x01, ++0x39, 0x74, 0x01, 0xF0, 0x90, 0x00, 0x53, 0x74, 0x80, 0xF0, 0x22, 0xF1, 0xD1, 0x90, 0xA1, 0xCA, ++0xE0, 0x90, 0x01, 0x31, 0xF0, 0x90, 0xA1, 0xCB, 0xE0, 0x90, 0x01, 0x32, 0xF0, 0x90, 0xA1, 0xCC, ++0xE0, 0x90, 0x01, 0x33, 0xF0, 0x90, 0xA1, 0xC5, 0xE0, 0x90, 0x01, 0x38, 0xF0, 0x90, 0xA1, 0xC8, ++0xE0, 0x90, 0x01, 0x3B, 0xF0, 0x7F, 0x01, 0xD1, 0xEC, 0x02, 0x54, 0xAB, 0x90, 0xA4, 0x0A, 0xEF, ++0xF0, 0x12, 0x60, 0x4D, 0x90, 0xA4, 0x0A, 0xE0, 0x60, 0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, ++0x7D, 0x04, 0x7F, 0x01, 0x12, 0x55, 0x87, 0x90, 0xA1, 0x15, 0x74, 0x04, 0xF0, 0x22, 0x90, 0xA2, ++0xF6, 0x74, 0x12, 0xF0, 0x90, 0xA3, 0x04, 0x74, 0x05, 0xF0, 0x90, 0xA2, 0xF8, 0xEF, 0xF0, 0xA3, ++0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0xA2, 0xF4, 0xE0, 0x90, 0xA2, 0xFB, 0xF0, 0x90, 0xA2, 0xF5, ++0xE0, 0x90, 0xA2, 0xFC, 0xF0, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xF6, 0xF1, 0xEA, 0x7F, 0x04, 0x81, ++0xE0, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xBE, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x12, 0x06, 0x89, ++0x90, 0xA2, 0x16, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0x90, 0xA2, 0x17, 0xF0, 0x90, 0x00, ++0x02, 0x12, 0x06, 0xA2, 0x90, 0xA2, 0x18, 0xF0, 0x90, 0xA1, 0xF3, 0xE0, 0x44, 0x01, 0xF0, 0x90, ++0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x12, 0x5E, 0x99, 0xEF, 0xB4, 0x02, 0x04, 0x7F, 0x40, 0x91, 0xE0, ++0x22, 0xE4, 0xFF, 0x21, 0xBD, 0x12, 0x06, 0x89, 0x90, 0xA1, 0x24, 0xF0, 0x22, 0x12, 0x06, 0x89, ++0x54, 0x01, 0xFF, 0x90, 0xA2, 0x57, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22, 0x75, 0xF0, 0x10, 0xEF, ++0x90, 0x81, 0x03, 0x12, 0x45, 0xA9, 0xE0, 0x44, 0x40, 0xF0, 0x22, 0x12, 0x06, 0x89, 0x90, 0xA2, ++0x0C, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0x90, 0xA2, 0x0D, 0xF0, 0x22, 0x90, 0xA1, 0xF3, ++0xE0, 0x44, 0x10, 0xF0, 0x7D, 0x01, 0x7F, 0x1B, 0x12, 0x5E, 0x9D, 0x90, 0xA2, 0xEB, 0xEF, 0xF0, ++0x22, 0x90, 0xA1, 0xC9, 0xE0, 0x90, 0x01, 0x30, 0xF0, 0x90, 0xA1, 0xC6, 0xE0, 0x90, 0x01, 0x39, ++0xF0, 0x90, 0xA1, 0xC7, 0xE0, 0x90, 0x01, 0x3A, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0xA0, 0x8B, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A, 0xEF, 0x14, ++0xFF, 0x90, 0xA0, 0x8C, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x60, ++0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x35, 0xC0, 0x01, 0x90, 0xA0, 0x8C, 0xE0, ++0x75, 0xF0, 0x0F, 0xA4, 0x24, 0xF5, 0xF9, 0x74, 0x9F, 0x35, 0xF0, 0xA8, 0x01, 0xFC, 0x7D, 0x01, ++0xD0, 0x01, 0x7E, 0x00, 0x7F, 0x0F, 0x12, 0x06, 0x63, 0x90, 0xA0, 0x8C, 0xE0, 0x04, 0xF0, 0xE0, ++0x7F, 0x00, 0xB4, 0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x60, 0x05, 0xE4, 0x90, 0xA0, 0x8C, 0xF0, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, ++0x05, 0xC0, 0x07, 0x7D, 0x54, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0x70, 0xFF, 0xA3, 0xF0, 0xED, ++0x04, 0x90, 0x01, 0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, ++0xD0, 0x83, 0xD0, 0xE0, 0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, ++0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x85, 0xF0, 0x74, 0x70, 0xA3, 0xF0, 0x12, 0x47, 0x7C, 0xE5, ++0x14, 0x30, 0xE7, 0x03, 0x12, 0x47, 0xDE, 0x74, 0x85, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x70, ++0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, ++0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xC0, 0xE0, 0xC0, ++0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, ++0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xDD, 0xF0, ++0x74, 0x70, 0xA3, 0xF0, 0x12, 0x9F, 0x3B, 0xE5, 0x19, 0x30, 0xE1, 0x02, 0x51, 0x8C, 0xE5, 0x19, ++0x30, 0xE4, 0x02, 0x71, 0x12, 0xE5, 0x19, 0x30, 0xE5, 0x03, 0x12, 0x52, 0xE1, 0xE5, 0x19, 0x30, ++0xE6, 0x03, 0x12, 0x9F, 0x98, 0xE5, 0x1B, 0x30, 0xE0, 0x02, 0x71, 0x1A, 0xE5, 0x1B, 0x30, 0xE1, ++0x03, 0x12, 0x5D, 0x8B, 0xE5, 0x1B, 0x30, 0xE2, 0x03, 0x12, 0x5B, 0x18, 0xE5, 0x1B, 0x30, 0xE3, ++0x03, 0x12, 0x9F, 0xA5, 0xE5, 0x1B, 0x30, 0xE4, 0x03, 0x12, 0x9F, 0xCE, 0xE5, 0x1B, 0x30, 0xE5, ++0x02, 0x71, 0x37, 0xE5, 0x1B, 0x30, 0xE6, 0x03, 0x12, 0x9F, 0xFD, 0xE5, 0x1C, 0x30, 0xE1, 0x02, ++0x71, 0x55, 0xE5, 0x1C, 0x30, 0xE4, 0x03, 0x12, 0x6F, 0x81, 0xE5, 0x1C, 0x30, 0xE5, 0x02, 0x31, ++0x97, 0x74, 0xDD, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x70, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, ++0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, ++0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xE4, 0xF5, 0x63, 0x74, 0x90, 0x25, 0x63, 0xF5, 0x82, ++0xE4, 0x34, 0xA0, 0xF5, 0x83, 0xE0, 0x70, 0x02, 0x41, 0x80, 0xE5, 0x63, 0x13, 0x13, 0x13, 0x54, ++0x1F, 0xFF, 0xE5, 0x63, 0x54, 0x07, 0xFE, 0x74, 0x81, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, ++0x83, 0xE0, 0xFD, 0xAF, 0x06, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, ++0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0x41, 0x80, 0x75, 0xF0, 0x10, 0xE5, ++0x63, 0x90, 0x81, 0x01, 0x12, 0x45, 0xA9, 0xE0, 0x20, 0xE7, 0x02, 0x80, 0x10, 0x75, 0xF0, 0x10, ++0xE5, 0x63, 0x90, 0x81, 0x02, 0x12, 0x45, 0xA9, 0xE0, 0xFF, 0x20, 0xE7, 0x09, 0x90, 0x01, 0xC1, ++0xE0, 0x44, 0x20, 0xF0, 0x80, 0x7A, 0xEF, 0x30, 0xE6, 0x21, 0x75, 0xF0, 0x10, 0xE5, 0x63, 0x90, ++0x81, 0x00, 0x12, 0x45, 0xA9, 0xE0, 0xFD, 0x75, 0xF0, 0x10, 0xE5, 0x63, 0x90, 0x81, 0x05, 0x12, ++0x45, 0xA9, 0xE0, 0x54, 0x03, 0xF5, 0x6A, 0xE4, 0xFB, 0x80, 0x51, 0x74, 0x96, 0x25, 0x63, 0xF5, ++0x82, 0xE4, 0x34, 0x9E, 0xF5, 0x83, 0xE0, 0x04, 0xF0, 0x74, 0x96, 0x25, 0x63, 0xF5, 0x82, 0xE4, ++0x34, 0x9E, 0xF5, 0x83, 0xE0, 0xD3, 0x94, 0x03, 0x40, 0x13, 0xAF, 0x63, 0xD1, 0x9C, 0x74, 0x96, ++0x25, 0x63, 0xF5, 0x82, 0xE4, 0x34, 0x9E, 0xF5, 0x83, 0xE4, 0xF0, 0x80, 0x23, 0x75, 0xF0, 0x10, ++0xE5, 0x63, 0x90, 0x81, 0x00, 0x12, 0x45, 0xA9, 0xE0, 0xFD, 0x75, 0xF0, 0x10, 0xE5, 0x63, 0x90, ++0x81, 0x05, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0x03, 0xF5, 0x6A, 0x7B, 0x01, 0xAF, 0x63, 0xF1, 0x11, ++0x05, 0x63, 0xE5, 0x63, 0xC3, 0x94, 0x80, 0x50, 0x02, 0x21, 0x9A, 0x22, 0xE4, 0xFF, 0x90, 0xA3, ++0x05, 0xEF, 0xF0, 0x90, 0x04, 0x7E, 0xE0, 0xF5, 0x64, 0xA3, 0xE0, 0xF5, 0x65, 0x65, 0x64, 0x60, ++0x70, 0x90, 0xA3, 0x06, 0x74, 0x03, 0xF0, 0x90, 0xA3, 0x14, 0x74, 0x08, 0xF0, 0xE5, 0x65, 0x04, ++0x54, 0x0F, 0xF5, 0x66, 0xE4, 0xF5, 0x63, 0xE5, 0x66, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, ++0x82, 0xE4, 0x34, 0x80, 0xF5, 0x83, 0xE5, 0x82, 0x25, 0x63, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, ++0x83, 0xE0, 0xFF, 0x74, 0x08, 0x25, 0x63, 0xF5, 0x82, 0xE4, 0x34, 0xA3, 0xF5, 0x83, 0xEF, 0xF0, ++0x05, 0x63, 0xE5, 0x63, 0xB4, 0x08, 0xD0, 0x7B, 0x01, 0x7A, 0xA3, 0x79, 0x06, 0x12, 0x6F, 0xEA, ++0xE5, 0x65, 0x04, 0x54, 0x0F, 0xF5, 0x65, 0xB4, 0x0F, 0x03, 0xE4, 0xF5, 0x65, 0x90, 0x04, 0x7F, ++0xE5, 0x65, 0xF0, 0x90, 0xA3, 0x05, 0xE0, 0x7F, 0x04, 0x70, 0x03, 0x02, 0x5E, 0x8A, 0x12, 0x6C, ++0xE0, 0x22, 0x12, 0x9B, 0x03, 0x7F, 0x02, 0x02, 0x5E, 0x8A, 0x90, 0xA1, 0x11, 0xE0, 0x30, 0xE0, ++0x10, 0xA3, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x02, 0x71, ++0x90, 0x12, 0x8A, 0x57, 0x02, 0x5F, 0xC9, 0x90, 0xA0, 0x90, 0xE0, 0xB4, 0x01, 0x16, 0x90, 0xA1, ++0x1A, 0xE0, 0x60, 0x10, 0x90, 0xA1, 0x18, 0xE0, 0x54, 0x0F, 0x64, 0x02, 0x60, 0x03, 0x02, 0xB9, ++0x9E, 0x12, 0x4F, 0x9B, 0x22, 0x90, 0xA1, 0x1A, 0xE0, 0x70, 0x07, 0x90, 0xA1, 0x11, 0xE0, 0x30, ++0xE0, 0x11, 0x90, 0xA1, 0x11, 0xE0, 0x30, 0xE0, 0x08, 0x12, 0x58, 0x9C, 0xBF, 0x01, 0x04, 0x80, ++0x03, 0x71, 0xB5, 0x22, 0x90, 0xA1, 0x1A, 0xE0, 0x64, 0x02, 0x60, 0x13, 0x90, 0xA1, 0x18, 0xE0, ++0x54, 0x0F, 0x60, 0x0B, 0x71, 0xF1, 0xEF, 0x70, 0x06, 0xFD, 0x7F, 0x0C, 0x12, 0x56, 0x56, 0x22, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA1, 0x10, 0xE0, 0xB4, 0x01, 0x04, 0x7F, 0x04, ++0x80, 0x0C, 0x12, 0x58, 0x9C, 0xBF, 0x01, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x02, 0xB1, 0x07, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA1, 0xCD, 0xE0, 0x20, 0xE0, 0x2C, 0x90, 0xA1, 0x1A, 0xE0, ++0x64, 0x01, 0x70, 0x24, 0x12, 0x8A, 0x1D, 0x90, 0xA1, 0x18, 0xE0, 0x54, 0x0F, 0x60, 0x10, 0xE4, ++0xFD, 0x7F, 0x0C, 0x12, 0x56, 0x56, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x02, 0xB9, 0xC9, 0x90, ++0xA1, 0x1D, 0xE0, 0x70, 0x03, 0x12, 0x56, 0x52, 0x22, 0x71, 0xF1, 0xEF, 0x70, 0x02, 0x71, 0xB5, ++0x22, 0x90, 0x04, 0x1A, 0xE0, 0xF4, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x04, 0x1B, 0xE0, 0x54, ++0x07, 0x64, 0x07, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0x30, ++0xE0, 0x3D, 0x90, 0xA1, 0x15, 0xE0, 0x7E, 0x00, 0xB4, 0x02, 0x02, 0x7E, 0x01, 0x90, 0xA1, 0x14, ++0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, 0x4E, 0x70, 0x23, 0xEF, 0xC3, 0x13, 0x30, ++0xE0, 0x02, 0x61, 0x90, 0x91, 0x50, 0x90, 0xA1, 0x15, 0xE0, 0xB4, 0x08, 0x06, 0xE4, 0xFD, 0x7F, ++0x0C, 0x80, 0x09, 0x90, 0xA1, 0x15, 0xE0, 0x70, 0x06, 0xFD, 0x7F, 0x04, 0x12, 0x56, 0x56, 0x22, ++0x90, 0xA1, 0x11, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x0F, 0x90, 0xA1, 0x15, ++0xE0, 0x64, 0x02, 0x60, 0x07, 0x7D, 0x01, 0x7F, 0x02, 0x12, 0x56, 0x56, 0x90, 0xA1, 0x15, 0xE0, ++0x64, 0x02, 0x60, 0x02, 0x71, 0x74, 0x22, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0x30, 0xE0, 0x3F, 0x90, ++0xA1, 0x15, 0xE0, 0x7E, 0x00, 0xB4, 0x02, 0x02, 0x7E, 0x01, 0x90, 0xA1, 0x14, 0xE0, 0x7D, 0x00, ++0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, 0x4E, 0x70, 0x25, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x02, 0x61, ++0x90, 0x12, 0xB8, 0xB6, 0x90, 0xA1, 0x15, 0xE0, 0xB4, 0x0C, 0x06, 0xE4, 0xFD, 0x7F, 0x08, 0x80, ++0x0A, 0x90, 0xA1, 0x15, 0xE0, 0xB4, 0x04, 0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x56, 0x56, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, 0x51, 0x8A, 0x52, 0x89, 0x53, 0x12, 0x06, 0x89, 0xFF, ++0x90, 0xA1, 0x10, 0xF0, 0xBF, 0x01, 0x0C, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0x64, 0x01, 0x60, ++0x21, 0x80, 0x1D, 0xAB, 0x51, 0xAA, 0x52, 0xA9, 0x53, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0x64, ++0x01, 0x60, 0x0F, 0x90, 0xA1, 0x11, 0xE0, 0x20, 0xE0, 0x06, 0xE4, 0xFF, 0xB1, 0x07, 0x80, 0x02, ++0x71, 0x90, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA1, ++0x14, 0xE0, 0x90, 0xA4, 0x08, 0xF0, 0x6F, 0x70, 0x02, 0xC1, 0x13, 0xEF, 0x14, 0x60, 0x42, 0x14, ++0x60, 0x6C, 0x14, 0x70, 0x02, 0xA1, 0xBB, 0x14, 0x70, 0x02, 0xA1, 0xE8, 0x24, 0x04, 0x60, 0x02, ++0xC1, 0x13, 0x90, 0xA4, 0x08, 0xE0, 0xB4, 0x04, 0x04, 0xD1, 0x54, 0xC1, 0x13, 0x90, 0xA4, 0x08, ++0xE0, 0xB4, 0x02, 0x04, 0xD1, 0x63, 0xC1, 0x13, 0x90, 0xA4, 0x08, 0xE0, 0xB4, 0x03, 0x04, 0xD1, ++0x67, 0xC1, 0x13, 0x90, 0xA4, 0x08, 0xE0, 0x64, 0x01, 0x60, 0x02, 0xC1, 0x13, 0xD1, 0x56, 0xC1, ++0x13, 0x90, 0xA4, 0x08, 0xE0, 0xB4, 0x04, 0x04, 0xD1, 0x88, 0xC1, 0x13, 0x90, 0xA4, 0x08, 0xE0, ++0xB4, 0x02, 0x04, 0xD1, 0x78, 0xC1, 0x13, 0x90, 0xA4, 0x08, 0xE0, 0xB4, 0x03, 0x04, 0xD1, 0x6B, ++0xC1, 0x13, 0x90, 0xA4, 0x08, 0xE0, 0x60, 0x02, 0xC1, 0x13, 0xD1, 0x3D, 0xC1, 0x13, 0x90, 0xA4, ++0x08, 0xE0, 0xB4, 0x04, 0x05, 0x12, 0xB8, 0x6C, 0x80, 0x79, 0x90, 0xA4, 0x08, 0xE0, 0xB4, 0x01, ++0x04, 0xD1, 0x31, 0x80, 0x6E, 0x90, 0xA4, 0x08, 0xE0, 0xB4, 0x03, 0x05, 0x12, 0xB8, 0x97, 0x80, ++0x62, 0x90, 0xA4, 0x08, 0xE0, 0x70, 0x5C, 0xD1, 0x2F, 0x80, 0x58, 0x90, 0xA4, 0x08, 0xE0, 0xB4, ++0x04, 0x05, 0x12, 0xB8, 0x57, 0x80, 0x4C, 0x90, 0xA4, 0x08, 0xE0, 0xB4, 0x01, 0x04, 0xD1, 0x46, ++0x80, 0x41, 0x90, 0xA4, 0x08, 0xE0, 0xB4, 0x02, 0x05, 0x12, 0x67, 0xDE, 0x80, 0x35, 0x90, 0xA4, ++0x08, 0xE0, 0x70, 0x2F, 0xD1, 0x44, 0x80, 0x2B, 0x90, 0xA4, 0x08, 0xE0, 0xB4, 0x03, 0x05, 0x12, ++0xB8, 0xA1, 0x80, 0x1F, 0x90, 0xA4, 0x08, 0xE0, 0xB4, 0x01, 0x04, 0xD1, 0x1A, 0x80, 0x14, 0x90, ++0xA4, 0x08, 0xE0, 0xB4, 0x02, 0x05, 0x12, 0xB8, 0x7F, 0x80, 0x08, 0x90, 0xA4, 0x08, 0xE0, 0x70, ++0x02, 0xD1, 0x18, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD1, 0x3D, 0x7D, 0x1F, 0x7F, 0x6F, 0x12, 0x49, ++0x5E, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0x90, 0xA1, 0x14, 0x74, 0x04, 0xF0, 0x22, 0xD1, ++0x3D, 0x7D, 0x20, 0x12, 0x46, 0xF8, 0x90, 0xA1, 0x14, 0x74, 0x02, 0xF0, 0x22, 0x90, 0xA1, 0x14, ++0x74, 0x01, 0xF0, 0x22, 0xD1, 0x3D, 0x7D, 0x21, 0x7F, 0xFF, 0x12, 0x49, 0x5E, 0x90, 0xA1, 0x14, ++0x74, 0x03, 0xF0, 0x22, 0xD1, 0x88, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0xE4, 0x90, 0xA1, ++0x14, 0xF0, 0x22, 0xD1, 0x78, 0x80, 0xEF, 0xD1, 0x6B, 0x80, 0xEB, 0xE4, 0xFD, 0xFF, 0x12, 0x49, ++0x5E, 0x90, 0xA1, 0x14, 0x74, 0x01, 0xF0, 0x22, 0x12, 0x60, 0x4D, 0xE4, 0xFD, 0xFF, 0x12, 0x49, ++0x5E, 0x90, 0xA1, 0x14, 0x74, 0x01, 0xF0, 0x22, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x90, 0x05, ++0x27, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0xA1, 0x14, 0x74, 0x01, 0xF0, 0x22, 0x75, 0xF0, 0x10, 0xEF, ++0x90, 0x81, 0x05, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0x03, 0xFE, 0x75, 0xF0, 0x04, 0xEF, 0x90, 0x96, ++0x16, 0x12, 0x45, 0xA9, 0xE0, 0xFC, 0x74, 0x16, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x9F, 0xF5, 0x83, ++0xE0, 0x54, 0x7F, 0xFD, 0x64, 0x2C, 0x70, 0x2F, 0x75, 0xF0, 0x04, 0xEF, 0x90, 0x96, 0x19, 0x12, ++0x45, 0xA9, 0xE0, 0xF9, 0x54, 0x03, 0xFB, 0xEE, 0xD3, 0x9B, 0x50, 0x1B, 0xEE, 0x60, 0x18, 0x1E, ++0xEE, 0x54, 0x03, 0x25, 0xE0, 0x25, 0xE0, 0xFB, 0x75, 0xF0, 0x04, 0xEF, 0x90, 0x96, 0x19, 0x12, ++0x45, 0xA9, 0xE9, 0x54, 0xF3, 0x4B, 0xF0, 0xED, 0xD3, 0x9C, 0x40, 0x02, 0xAD, 0x04, 0x74, 0x16, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x9F, 0xF5, 0x83, 0xE0, 0x54, 0x80, 0x42, 0x05, 0x8E, 0x6A, 0xE4, ++0xFB, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x67, 0x8D, 0x68, 0x8B, 0x69, 0xE4, 0x90, ++0xA3, 0xA7, 0xF0, 0xE5, 0x67, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x90, 0xA3, 0xA2, 0xF0, 0xE5, 0x67, ++0x54, 0x07, 0x90, 0xA3, 0xA4, 0xF0, 0x75, 0xF0, 0x10, 0xEF, 0x90, 0x81, 0x01, 0x12, 0x45, 0xA9, ++0xE0, 0x90, 0xA3, 0xA5, 0xF0, 0x75, 0xF0, 0x04, 0xEF, 0x90, 0x96, 0x16, 0x12, 0x45, 0xA9, 0xE0, ++0x54, 0x7F, 0x90, 0xA3, 0xA8, 0xF0, 0x75, 0xF0, 0x04, 0xE5, 0x67, 0x90, 0x96, 0x17, 0x12, 0x45, ++0xA9, 0xE0, 0x90, 0xA3, 0xA9, 0xF0, 0xE5, 0x68, 0x54, 0x7F, 0x90, 0xA3, 0xA3, 0xF0, 0xE5, 0x69, ++0x70, 0x42, 0xE0, 0xFB, 0x25, 0xE0, 0x24, 0xC3, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, ++0x93, 0xFE, 0x74, 0x01, 0x93, 0xFF, 0xE4, 0xFC, 0xFD, 0xEB, 0x25, 0xE0, 0x25, 0xE0, 0x24, 0x73, ++0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0x12, 0x45, 0x99, 0x12, 0x45, 0x39, 0x78, 0x01, 0x12, ++0x08, 0x47, 0xE5, 0x67, 0x25, 0xE0, 0x24, 0x95, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA3, 0xA8, 0xE0, 0xFF, 0x90, 0xA3, 0xA3, 0xE0, 0xFE, 0xD3, 0x9F, ++0x40, 0x0B, 0xE5, 0x68, 0x54, 0x80, 0xFD, 0xEF, 0x4D, 0xF5, 0x68, 0x80, 0x0C, 0x90, 0xA3, 0xA9, ++0xE0, 0xFF, 0xEE, 0xC3, 0x9F, 0x50, 0x02, 0x8F, 0x68, 0xE5, 0x68, 0x54, 0x7F, 0x90, 0xA3, 0xA3, ++0xF0, 0xE5, 0x68, 0x54, 0x80, 0x90, 0xA3, 0xA6, 0xF0, 0xE5, 0x69, 0x70, 0x33, 0x90, 0xA3, 0xA2, ++0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0xC0, 0x83, 0xC0, 0x82, 0xE0, 0xFF, ++0x90, 0xA3, 0xA4, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, ++0xF4, 0x5F, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x90, 0xA3, 0xA5, 0xE0, 0x54, 0x7F, 0xF0, 0x80, 0x52, ++0x90, 0xA3, 0xA2, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0xC0, 0x83, 0xC0, ++0x82, 0xE0, 0xFF, 0x90, 0xA3, 0xA4, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, ++0x33, 0xD8, 0xFC, 0x4F, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x75, 0xF0, 0x10, 0xE5, 0x67, 0x90, 0x81, ++0x01, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0x07, 0xFF, 0x90, 0xA3, 0xA5, 0xF0, 0x90, 0xA3, 0xA3, 0xE0, ++0x90, 0x41, 0xF7, 0x93, 0xFE, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x4F, 0x90, 0xA3, 0xA5, 0xF0, 0x44, ++0x80, 0xF0, 0x75, 0xF0, 0x10, 0xE5, 0x67, 0x90, 0x81, 0x00, 0x12, 0x45, 0xA9, 0xE5, 0x68, 0xF0, ++0xE5, 0x67, 0x70, 0x06, 0x90, 0x01, 0xC8, 0xE5, 0x68, 0xF0, 0x90, 0xA3, 0xA5, 0xE0, 0xFF, 0x75, ++0xF0, 0x10, 0xE5, 0x67, 0x90, 0x81, 0x01, 0x12, 0x45, 0xA9, 0xEF, 0xF0, 0x75, 0xF0, 0x10, 0xE5, ++0x67, 0x90, 0x81, 0x05, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0xFC, 0xFF, 0xE5, 0x6A, 0x54, 0x03, 0x4F, ++0xFF, 0x75, 0xF0, 0x10, 0xE5, 0x67, 0x90, 0x81, 0x05, 0x12, 0x45, 0xA9, 0xEF, 0xF0, 0x7D, 0x01, ++0xAF, 0x67, 0x11, 0xC9, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0xED, 0x60, 0x62, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x8D, 0x01, 0x12, 0x45, 0xA9, 0xE4, 0xF0, 0xA3, ++0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x8D, 0x03, 0x12, 0x45, 0xA9, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, ++0xF0, 0x0A, 0xEF, 0x90, 0x8D, 0x05, 0x12, 0x45, 0xA9, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, ++0xEF, 0x90, 0x8D, 0x07, 0x12, 0x45, 0xA9, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, ++0x8D, 0x09, 0x12, 0x45, 0xA9, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x01, 0xF5, 0x82, ++0xE4, 0x34, 0x92, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x74, 0x16, 0x2F, 0xF5, 0x82, 0xE4, 0x34, ++0x98, 0xF5, 0x83, 0xE4, 0xF0, 0x75, 0xF0, 0x10, 0xEF, 0x90, 0x81, 0x03, 0x12, 0x45, 0xA9, 0xE0, ++0x54, 0xBF, 0x44, 0x80, 0xFE, 0x75, 0xF0, 0x10, 0xEF, 0x90, 0x81, 0x03, 0x12, 0x45, 0xA9, 0xEE, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, ++0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, ++0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x56, 0xF0, 0x74, 0x79, 0xA3, 0xF0, 0x31, 0xA8, 0x53, ++0x91, 0xBF, 0x74, 0x56, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x79, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, ++0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, ++0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90, 0xFD, 0x68, 0xE0, 0xFF, 0x90, 0xFD, 0x60, ++0xE0, 0x90, 0xA3, 0x24, 0xF0, 0xEF, 0x20, 0xE0, 0x02, 0x61, 0x70, 0x90, 0xA3, 0xE6, 0xE0, 0x70, ++0x1A, 0x7F, 0x2E, 0x12, 0x46, 0xD6, 0x90, 0xA2, 0x08, 0xEF, 0xF0, 0x7F, 0x2D, 0x12, 0x46, 0xD6, ++0x90, 0xA2, 0x09, 0xEF, 0xF0, 0x90, 0xA3, 0xE6, 0x74, 0x01, 0xF0, 0x90, 0xA3, 0x24, 0xE0, 0x64, ++0x15, 0x70, 0x6E, 0x90, 0xFD, 0x62, 0xE0, 0xFF, 0x30, 0xE6, 0x1C, 0xF4, 0x54, 0x3F, 0x04, 0xFE, ++0x90, 0xA2, 0x08, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0xC3, 0x9E, 0x90, 0xA3, 0x23, 0xF0, 0xD3, 0x94, ++0x3F, 0x40, 0x1D, 0xE4, 0xF0, 0x80, 0x19, 0x90, 0xA2, 0x08, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0xFE, ++0xEF, 0x54, 0x3F, 0x2E, 0x90, 0xA3, 0x23, 0xF0, 0xD3, 0x94, 0x3F, 0x40, 0x03, 0x74, 0x3F, 0xF0, ++0x90, 0xA3, 0x23, 0xE0, 0xFF, 0x54, 0x30, 0xC4, 0x54, 0x0F, 0xFE, 0xEF, 0x25, 0xE0, 0x25, 0xE0, ++0x4E, 0x90, 0xA3, 0x21, 0xF0, 0xE0, 0xFD, 0x7F, 0x2E, 0x12, 0x46, 0xAC, 0x90, 0xA3, 0x23, 0xE0, ++0xC4, 0x54, 0xF0, 0xFF, 0x90, 0xA2, 0x09, 0xE0, 0x54, 0x0F, 0x4F, 0xFD, 0x7F, 0x2D, 0x12, 0x46, ++0xAC, 0x90, 0xA3, 0x24, 0xE0, 0xB4, 0x21, 0x0C, 0x90, 0xFD, 0x62, 0xE0, 0xFF, 0xF1, 0x13, 0x7F, ++0x04, 0x12, 0x5E, 0x8A, 0x90, 0xA3, 0x24, 0xE0, 0xB4, 0x23, 0x09, 0x7F, 0x01, 0x71, 0x71, 0x7F, ++0x04, 0x12, 0x5E, 0x8A, 0x90, 0xA3, 0x24, 0xE0, 0xB4, 0x27, 0x09, 0x7F, 0x02, 0x71, 0x71, 0x7F, ++0x04, 0x12, 0x5E, 0x8A, 0x90, 0xA3, 0x24, 0xE0, 0xB4, 0x30, 0x0C, 0xE4, 0xFB, 0xFD, 0x7F, 0x01, ++0xF1, 0x6C, 0x7F, 0x04, 0x12, 0x5E, 0x8A, 0x90, 0xA3, 0x24, 0xE0, 0x64, 0x34, 0x70, 0x70, 0x90, ++0xFD, 0x62, 0xE0, 0x30, 0xE0, 0x4F, 0x90, 0xA1, 0xF2, 0xE0, 0xFF, 0xC3, 0x13, 0x20, 0xE0, 0x5F, ++0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x01, 0xFF, 0x90, 0xA2, 0x0D, 0xE0, 0xFB, 0x90, ++0xA2, 0x0C, 0xE0, 0x90, 0xA3, 0xC7, 0xF0, 0x7D, 0x01, 0x91, 0x13, 0x90, 0xA3, 0x21, 0x74, 0x01, ++0xF0, 0xFB, 0x7A, 0xA3, 0x79, 0x21, 0xFD, 0x7F, 0x34, 0x12, 0x5E, 0x9D, 0x90, 0xA2, 0x13, 0xE0, ++0x44, 0x01, 0xF0, 0x90, 0x04, 0x9D, 0xE4, 0xF0, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, 0xE7, 0xE0, ++0x54, 0xFE, 0xF0, 0x80, 0x1A, 0x71, 0xFA, 0x90, 0xA2, 0x13, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xA3, ++0xF0, 0x90, 0x04, 0x9D, 0xE0, 0x54, 0xFE, 0xF0, 0x90, 0x01, 0xE7, 0xE0, 0x44, 0x01, 0xF0, 0x90, ++0xA3, 0x24, 0xE0, 0xFD, 0xB4, 0x35, 0x07, 0x90, 0xA1, 0xD4, 0xE0, 0x44, 0x01, 0xF0, 0xED, 0xB4, ++0x36, 0x23, 0x90, 0xFD, 0x61, 0xE0, 0x90, 0xA3, 0x21, 0xF0, 0x90, 0xFD, 0x62, 0xE0, 0x90, 0xA3, ++0x22, 0xF0, 0x90, 0xA3, 0x24, 0xE0, 0xFF, 0x90, 0xA3, 0x21, 0xE0, 0xFD, 0x7B, 0x01, 0x7A, 0xA3, ++0x79, 0x22, 0x12, 0x5E, 0x9D, 0x90, 0xA3, 0x24, 0xE0, 0xB4, 0x37, 0x02, 0xD1, 0x80, 0x90, 0xA3, ++0x24, 0xE0, 0xB4, 0x40, 0x14, 0x90, 0xFD, 0x62, 0xE0, 0x30, 0xE0, 0x08, 0x90, 0xA1, 0xF0, 0x74, ++0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0xA1, 0xF0, 0xF0, 0x90, 0xFD, 0x68, 0xE0, 0x44, 0x01, 0xF0, ++0x22, 0x90, 0xA3, 0x6D, 0x74, 0x09, 0xF0, 0x90, 0xA3, 0x7B, 0x74, 0x07, 0xF0, 0x90, 0xA3, 0x6F, ++0xEF, 0xF0, 0x70, 0x31, 0x90, 0xA1, 0xE6, 0xE0, 0x60, 0x1A, 0xA3, 0xE0, 0x60, 0x02, 0x80, 0x0C, ++0x90, 0x07, 0x70, 0xE0, 0x70, 0x06, 0x90, 0x07, 0x74, 0xE0, 0x60, 0x08, 0x90, 0xA3, 0x70, 0x74, ++0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0xA3, 0x70, 0xF0, 0xE4, 0x90, 0xA3, 0x71, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0xA3, 0x80, 0x39, 0x90, 0xFD, 0x62, 0xE0, 0x90, 0xA3, 0x70, 0xF0, 0x90, 0xFD, 0x63, ++0xE0, 0x90, 0xA3, 0x71, 0xF0, 0x90, 0xFD, 0x64, 0xE0, 0x90, 0xA3, 0x72, 0xF0, 0x90, 0xFD, 0x65, ++0xE0, 0x90, 0xA3, 0x73, 0xF0, 0x90, 0xFD, 0x66, 0xE0, 0x90, 0xA3, 0x74, 0xF0, 0x90, 0xFD, 0x67, ++0xE0, 0x90, 0xA3, 0x75, 0xF0, 0x90, 0xA3, 0x70, 0xE0, 0x54, 0x01, 0x90, 0xA1, 0xE6, 0xF0, 0xA3, ++0xF0, 0x7B, 0x01, 0x7A, 0xA3, 0x79, 0x6D, 0x02, 0x6F, 0xEA, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, ++0x13, 0x54, 0x01, 0xFF, 0x90, 0xA2, 0x0D, 0xE0, 0xFB, 0x90, 0xA2, 0x0C, 0xE0, 0x90, 0xA3, 0xC7, ++0xF0, 0xE4, 0xFD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0xC4, 0xEF, 0xF0, 0x90, ++0xA3, 0xC6, 0xEB, 0xF0, 0xED, 0x60, 0x02, 0xA1, 0x2A, 0x90, 0x07, 0x6E, 0xE0, 0x44, 0x08, 0xF0, ++0x90, 0x07, 0x65, 0xE0, 0x54, 0xE7, 0xF0, 0x90, 0xA3, 0xC6, 0xE0, 0x70, 0x6D, 0x7F, 0x67, 0x12, ++0x46, 0xD6, 0xEF, 0x44, 0x20, 0xFD, 0x7F, 0x67, 0x12, 0x46, 0xAC, 0x90, 0xA3, 0xC4, 0xE0, 0x70, ++0x4F, 0x90, 0xA3, 0xC7, 0xE0, 0x7F, 0x48, 0x7E, 0x09, 0x70, 0x20, 0x12, 0x37, 0x4E, 0xE4, 0xFF, ++0x74, 0x02, 0xFE, 0xEC, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x48, 0x7E, 0x09, 0x12, 0x38, ++0x45, 0x7F, 0x64, 0x12, 0x46, 0xD6, 0xEF, 0x54, 0xFE, 0x80, 0x1F, 0x12, 0x37, 0x4E, 0xE4, 0xFE, ++0x74, 0x80, 0xFF, 0xE4, 0xEC, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x48, 0x7E, 0x09, 0x12, ++0x38, 0x45, 0x7F, 0x64, 0x12, 0x46, 0xD6, 0xEF, 0x44, 0x01, 0xFD, 0x7F, 0x64, 0x12, 0x46, 0xAC, ++0x7F, 0x4E, 0x12, 0x46, 0xD6, 0xEF, 0x44, 0x80, 0xA1, 0x9C, 0x7F, 0x67, 0x12, 0x46, 0xD6, 0xEF, ++0x44, 0x20, 0xFD, 0x7F, 0x67, 0x12, 0x46, 0xAC, 0x90, 0xA3, 0xC4, 0xE0, 0x70, 0x18, 0x7F, 0x48, ++0x7E, 0x09, 0x12, 0x37, 0x4E, 0xE4, 0xFF, 0xFE, 0xEC, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, ++0x48, 0x7E, 0x09, 0x12, 0x38, 0x45, 0x7F, 0x4E, 0x12, 0x46, 0xD6, 0xEF, 0x54, 0x7F, 0xFD, 0x7F, ++0x4E, 0x12, 0x46, 0xAC, 0x7F, 0x4F, 0x12, 0x46, 0xD6, 0xEF, 0x44, 0x01, 0xFD, 0x7F, 0x4F, 0x12, ++0x46, 0xAC, 0x7F, 0x30, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0xE4, 0x74, 0x66, 0xFF, 0xEC, 0x90, 0xAA, ++0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x30, 0x7E, 0x09, 0x12, 0x38, 0x45, 0x7F, 0x2C, 0x7E, 0x09, 0x12, ++0x37, 0x4E, 0xEF, 0x54, 0xFC, 0xFF, 0xEF, 0x44, 0x01, 0xFF, 0xEC, 0x90, 0xAA, 0xB9, 0x12, 0x08, ++0x6D, 0x7F, 0x2C, 0x7E, 0x09, 0x12, 0x38, 0x45, 0xA1, 0xB0, 0x90, 0x07, 0x6E, 0xE0, 0x54, 0xF7, ++0xF0, 0x90, 0x07, 0x65, 0xE0, 0x44, 0x18, 0xF0, 0x90, 0xA3, 0xC4, 0xE0, 0x70, 0x56, 0x90, 0xA3, ++0xC6, 0xE0, 0x60, 0x19, 0x7F, 0x67, 0x12, 0x46, 0xD6, 0xEF, 0x44, 0x20, 0xFD, 0x7F, 0x67, 0x12, ++0x46, 0xAC, 0x7F, 0x48, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0xE4, 0xFF, 0x80, 0x28, 0x7F, 0x67, 0x12, ++0x46, 0xD6, 0xEF, 0x54, 0xDF, 0xFD, 0x7F, 0x67, 0x12, 0x46, 0xAC, 0x90, 0xA3, 0xC7, 0xE0, 0x7F, ++0x48, 0x7E, 0x09, 0x70, 0x0B, 0x12, 0x37, 0x4E, 0xE4, 0x74, 0x80, 0xFF, 0x74, 0x02, 0x80, 0x05, ++0x12, 0x37, 0x4E, 0xE4, 0xFF, 0xFE, 0xEC, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x48, 0x7E, ++0x09, 0x12, 0x38, 0x45, 0x7F, 0x4E, 0x12, 0x46, 0xD6, 0xEF, 0x54, 0x7F, 0xFD, 0x7F, 0x4E, 0x12, ++0x46, 0xAC, 0x7F, 0x4F, 0x12, 0x46, 0xD6, 0xEF, 0x54, 0xFE, 0xFD, 0x7F, 0x4F, 0x12, 0x46, 0xAC, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF1, 0x2D, 0x7F, 0x08, 0x12, 0x46, 0xD6, 0xEF, 0x54, 0xEF, 0xFD, ++0x7F, 0x08, 0x12, 0x46, 0xAC, 0xE4, 0xFF, 0xD1, 0xAB, 0x71, 0xFA, 0x90, 0xA1, 0x16, 0xE0, 0xFF, ++0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x12, 0x6F, 0xD1, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0xB1, 0xEA, 0xB1, 0xB5, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, ++0x13, 0x54, 0x01, 0xFF, 0x90, 0xA2, 0x0D, 0xE0, 0xFB, 0x90, 0xA2, 0x0C, 0xE0, 0x90, 0xA3, 0xC7, ++0xF0, 0x7D, 0x01, 0x91, 0x13, 0x90, 0xA1, 0x24, 0xE0, 0xFD, 0x7F, 0x93, 0x12, 0x46, 0xAC, 0x90, ++0xA1, 0x1B, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, ++0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x7F, 0x08, 0x12, 0x46, 0xD6, 0xEF, 0x44, 0x10, 0xFD, ++0x7F, 0x08, 0x12, 0x46, 0xAC, 0x7F, 0x01, 0xD1, 0xAB, 0x7F, 0x90, 0x12, 0x46, 0xD6, 0xEF, 0x44, ++0x01, 0xFD, 0x7F, 0x90, 0x12, 0x46, 0xAC, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x3E, 0x50, 0x90, 0xA1, ++0x1D, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, 0x07, 0xF1, 0x4C, 0xBF, 0x01, 0x02, 0xB1, 0xDA, 0x22, ++0x90, 0xA1, 0x16, 0xE0, 0x30, 0xE0, 0x18, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0x30, 0xE0, 0x0E, 0xC3, ++0x13, 0x30, 0xE0, 0x07, 0xF1, 0x06, 0xBF, 0x01, 0x06, 0x80, 0x02, 0x80, 0x00, 0xD1, 0x4E, 0x22, ++0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x1E, 0x90, 0xFD, 0x62, 0xE0, ++0x30, 0xE0, 0x17, 0xE0, 0x90, 0xA3, 0x25, 0x30, 0xE1, 0x05, 0x74, 0x01, 0xF0, 0x80, 0x03, 0x74, ++0x02, 0xF0, 0x90, 0xA3, 0x25, 0xE0, 0xFF, 0x12, 0x8F, 0xB4, 0x22, 0x90, 0xA3, 0xF3, 0xEF, 0xF0, ++0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, ++0x90, 0xA3, 0xF3, 0xE0, 0x6F, 0x60, 0x3E, 0xC3, 0x90, 0xA3, 0xF5, 0xE0, 0x94, 0x88, 0x90, 0xA3, ++0xF4, 0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0xA3, ++0xF4, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0x7F, 0x14, 0x7E, 0x00, 0x12, 0x3E, 0x50, 0xD3, ++0x90, 0xA3, 0xF5, 0xE0, 0x94, 0x32, 0x90, 0xA3, 0xF4, 0xE0, 0x94, 0x00, 0x40, 0xB7, 0x90, 0x01, ++0xC6, 0xE0, 0x30, 0xE0, 0xB0, 0x22, 0x90, 0xA1, 0x14, 0xE0, 0x64, 0x02, 0x7F, 0x01, 0x60, 0x02, ++0x7F, 0x00, 0x22, 0x90, 0xA3, 0x25, 0x74, 0x08, 0xF0, 0x90, 0xA3, 0x33, 0x74, 0x01, 0xF0, 0x90, ++0xA3, 0x27, 0xEF, 0xF0, 0x7B, 0x01, 0x7A, 0xA3, 0x79, 0x25, 0x02, 0x6F, 0xEA, 0x90, 0x01, 0xC4, ++0x74, 0x2D, 0xF0, 0x74, 0x7F, 0xA3, 0xF0, 0x7F, 0x90, 0x12, 0x46, 0xD6, 0xEF, 0x20, 0xE0, 0xF7, ++0x74, 0x2D, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x7F, 0xA3, 0xF0, 0x22, 0x90, 0x02, 0x87, 0xE0, ++0x70, 0x17, 0x90, 0x02, 0x96, 0xE0, 0x70, 0x11, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE1, 0x0A, 0x90, ++0xA2, 0x13, 0xE0, 0x20, 0xE0, 0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0xA3, 0x7C, 0x74, ++0x0B, 0xF0, 0x90, 0xA3, 0x8A, 0x74, 0x07, 0xF0, 0x90, 0xA3, 0x7E, 0xEF, 0xF0, 0x60, 0x32, 0x90, ++0xFD, 0x63, 0xE0, 0x90, 0xA3, 0x7F, 0xF0, 0x90, 0xFD, 0x61, 0xE0, 0x90, 0xA3, 0x80, 0xF0, 0x90, ++0xFD, 0x64, 0xE0, 0x90, 0xA3, 0x81, 0xF0, 0x90, 0xFD, 0x65, 0xE0, 0x90, 0xA3, 0x82, 0xF0, 0x90, ++0xFD, 0x66, 0xE0, 0x90, 0xA3, 0x83, 0xF0, 0x90, 0xFD, 0x67, 0xE0, 0x90, 0xA3, 0x84, 0xF0, 0x80, ++0x11, 0x90, 0xA3, 0x7F, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0x7B, 0x01, 0x7A, 0xA3, 0x79, 0x7C, 0x02, 0x6F, 0xEA, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, ++0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0xCB, 0x90, 0x01, 0xC4, 0xED, ++0xF0, 0x74, 0x7F, 0xFF, 0xA3, 0xF0, 0xED, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0xD0, ++0x07, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, 0xEF, 0x14, 0x90, 0x05, ++0x73, 0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03, 0x74, 0x1D, 0x2F, 0xF8, 0xE6, ++0x4D, 0xFE, 0xF6, 0x74, 0x38, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, ++0x8B, 0x51, 0x8A, 0x52, 0x89, 0x53, 0x12, 0x06, 0x89, 0xC4, 0x54, 0x0F, 0xFF, 0xBF, 0x0F, 0x1B, ++0x90, 0xA2, 0x2C, 0xE0, 0x54, 0xFE, 0xF0, 0x12, 0x5F, 0xEF, 0xAB, 0x51, 0xAA, 0x52, 0xA9, 0x53, ++0x12, 0x06, 0x89, 0x54, 0x0F, 0xFF, 0x12, 0x4D, 0x1B, 0xA1, 0xF8, 0xAB, 0x51, 0xAA, 0x52, 0xA9, ++0x53, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0xFF, 0x12, 0x06, 0x89, 0xFE, 0x54, 0x0F, 0xFD, 0x75, ++0xF0, 0x0D, 0x90, 0xA2, 0x2F, 0x12, 0x45, 0xA9, 0xEF, 0xF0, 0x90, 0x00, 0x02, 0x12, 0x06, 0xA2, ++0x54, 0x03, 0xFF, 0x75, 0xF0, 0x0D, 0xED, 0x90, 0xA2, 0x30, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0xFC, ++0x4F, 0xF0, 0x90, 0x00, 0x02, 0x12, 0x06, 0xA2, 0x54, 0x1C, 0xFF, 0xEE, 0x54, 0x0F, 0xFE, 0x75, ++0xF0, 0x0D, 0x90, 0xA2, 0x30, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0xE3, 0x4F, 0xF0, 0x90, 0x00, 0x02, ++0x12, 0x06, 0xA2, 0x54, 0xE0, 0xFF, 0x75, 0xF0, 0x0D, 0xEE, 0x90, 0xA2, 0x30, 0x12, 0x45, 0xA9, ++0xE0, 0x54, 0x1F, 0x4F, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x06, 0xA2, 0xFF, 0x12, 0x06, 0x89, 0x54, ++0x0F, 0xFD, 0xE4, 0xFB, 0x31, 0x47, 0xAB, 0x51, 0xAA, 0x52, 0xA9, 0x53, 0x90, 0x00, 0x05, 0x12, ++0x06, 0xA2, 0xFF, 0x12, 0x06, 0x89, 0x54, 0x0F, 0xFD, 0x7B, 0x01, 0x31, 0x47, 0xAB, 0x51, 0xAA, ++0x52, 0xA9, 0x53, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0x33, 0x33, 0x33, 0x54, 0xF8, 0xFF, 0x12, ++0x06, 0x89, 0xFE, 0x54, 0x0F, 0xFD, 0x75, 0xF0, 0x0D, 0x90, 0xA2, 0x38, 0x12, 0x45, 0xA9, 0xEF, ++0xF0, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0xC4, 0x13, 0x54, 0x07, 0xFF, 0x75, 0xF0, 0x0D, 0xED, ++0x90, 0xA2, 0x39, 0x12, 0x45, 0xA9, 0xEF, 0xF0, 0xEE, 0xC4, 0x54, 0x0F, 0xFF, 0x14, 0x6D, 0x70, ++0x25, 0x90, 0xA2, 0x2D, 0xEF, 0xF0, 0x90, 0x00, 0x06, 0x12, 0x06, 0xA2, 0x54, 0x0F, 0xC4, 0x54, ++0xF0, 0xFF, 0x90, 0xA2, 0x2C, 0xE0, 0x54, 0x0F, 0x4F, 0xF0, 0x54, 0xF1, 0xF0, 0x44, 0x01, 0xF0, ++0x7D, 0x20, 0xE4, 0xFF, 0x11, 0x0B, 0x22, 0x8F, 0x54, 0x8D, 0x55, 0xAE, 0x03, 0x74, 0x1F, 0xC3, ++0x95, 0x54, 0x40, 0x14, 0x90, 0xA2, 0xEF, 0xEE, 0xF0, 0xAB, 0x55, 0xE4, 0xFD, 0x31, 0xDA, 0x90, ++0xA2, 0xEB, 0xEF, 0xF0, 0x24, 0xD4, 0x80, 0x55, 0x74, 0x3F, 0xC3, 0x95, 0x54, 0x40, 0x16, 0x90, ++0xA2, 0xEF, 0xEE, 0xF0, 0xAB, 0x55, 0x7D, 0x20, 0xAF, 0x54, 0x31, 0xDA, 0x90, 0xA2, 0xEB, 0xEF, ++0xF0, 0x24, 0x88, 0x80, 0x38, 0x74, 0x5F, 0xC3, 0x95, 0x54, 0x40, 0x16, 0x90, 0xA2, 0xEF, 0xEE, ++0xF0, 0xAB, 0x55, 0x7D, 0x40, 0xAF, 0x54, 0x31, 0xDA, 0x90, 0xA2, 0xEB, 0xEF, 0xF0, 0x24, 0xD0, ++0x80, 0x1B, 0x74, 0x7F, 0xC3, 0x95, 0x54, 0x40, 0x30, 0x90, 0xA2, 0xEF, 0xEE, 0xF0, 0xAB, 0x55, ++0x7D, 0x60, 0xAF, 0x54, 0x31, 0xDA, 0x90, 0xA2, 0xEB, 0xEF, 0xF0, 0x24, 0x84, 0xFD, 0xE4, 0x34, ++0x04, 0xFC, 0x75, 0xF0, 0x0D, 0xE5, 0x55, 0x90, 0xA2, 0x31, 0x12, 0x45, 0xA9, 0x75, 0xF0, 0x03, ++0xEE, 0x12, 0x45, 0xA9, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x22, 0xC3, 0xEF, 0x9D, 0xF5, 0x56, 0xC3, ++0x94, 0x08, 0x50, 0x24, 0xE4, 0xF5, 0x57, 0x75, 0xF0, 0x0D, 0xEB, 0x90, 0xA2, 0x33, 0x12, 0x45, ++0xA9, 0xC0, 0x83, 0xC0, 0x82, 0x90, 0xA2, 0xEF, 0xE0, 0xD0, 0x82, 0xD0, 0x83, 0x75, 0xF0, 0x03, ++0x12, 0x45, 0xA9, 0xE5, 0x56, 0xF0, 0x80, 0x46, 0xE5, 0x56, 0xC3, 0x94, 0x10, 0x50, 0x09, 0x75, ++0x57, 0x01, 0xE5, 0x56, 0x24, 0xF8, 0x80, 0x17, 0xE5, 0x56, 0xC3, 0x94, 0x18, 0x50, 0x09, 0x75, ++0x57, 0x02, 0xE5, 0x56, 0x24, 0xF0, 0x80, 0x07, 0x75, 0x57, 0x03, 0xE5, 0x56, 0x24, 0xE8, 0xFF, ++0x75, 0xF0, 0x0D, 0xEB, 0x90, 0xA2, 0x33, 0x12, 0x45, 0xA9, 0xC0, 0x83, 0xC0, 0x82, 0x90, 0xA2, ++0xEF, 0xE0, 0xD0, 0x82, 0xD0, 0x83, 0x75, 0xF0, 0x03, 0x12, 0x45, 0xA9, 0xEF, 0xF0, 0xAF, 0x57, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xBE, 0x12, 0x06, ++0x89, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0xA1, 0xCD, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, ++0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0xFF, 0xF0, 0x12, 0x06, 0x89, 0xFE, 0x54, 0x04, 0xFD, 0xEF, ++0x54, 0xFB, 0x4D, 0xFF, 0x90, 0xA1, 0xCD, 0xF0, 0xEE, 0x54, 0x10, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, ++0xFF, 0xF0, 0x12, 0x06, 0x89, 0xFE, 0x54, 0x20, 0xFD, 0xEF, 0x54, 0xDF, 0x4D, 0xFF, 0x90, 0xA1, ++0xCD, 0xF0, 0xEE, 0x54, 0x40, 0xFE, 0xEF, 0x54, 0xBF, 0x4E, 0xFF, 0xF0, 0x12, 0x06, 0x89, 0x54, ++0x80, 0xFE, 0xEF, 0x54, 0x7F, 0x4E, 0x90, 0xA1, 0xCD, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, ++0xFF, 0x54, 0x01, 0xFE, 0x90, 0xA1, 0xD0, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x02, ++0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0xFF, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0xFE, 0x54, 0x04, ++0xFD, 0xEF, 0x54, 0xFB, 0x4D, 0xFF, 0x90, 0xA1, 0xD0, 0xF0, 0xEE, 0x54, 0x10, 0xFE, 0xEF, 0x54, ++0xEF, 0x4E, 0xFF, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0xFE, 0x54, 0x20, 0xFD, 0xEF, 0x54, ++0xDF, 0x4D, 0xFF, 0x90, 0xA1, 0xD0, 0xF0, 0xEE, 0x54, 0x40, 0xFE, 0xEF, 0x54, 0xBF, 0x4E, 0xFF, ++0xF0, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0x54, 0x80, 0xFE, 0xEF, 0x54, 0x7F, 0x4E, 0x90, 0xA1, ++0xD0, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x06, 0xA2, 0xFF, 0x54, 0x20, 0xFE, 0x90, 0xA1, 0xD1, 0xE0, ++0x54, 0xDF, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x40, 0xFF, 0xEE, 0x54, 0xBF, 0x4F, 0xFF, 0xF0, 0x90, ++0x00, 0x04, 0x12, 0x06, 0xA2, 0xFE, 0x54, 0x80, 0xFD, 0xEF, 0x54, 0x7F, 0x4D, 0xFF, 0x90, 0xA1, ++0xD1, 0xF0, 0xEE, 0x54, 0x01, 0xFE, 0xEF, 0x54, 0xFE, 0x4E, 0xFF, 0xF0, 0x90, 0x00, 0x04, 0x12, ++0x06, 0xA2, 0xFE, 0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, 0x4D, 0xFF, 0x90, 0xA1, 0xD1, 0xF0, 0xEE, ++0x54, 0x02, 0xFE, 0xEF, 0x54, 0xFD, 0x4E, 0xFF, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x06, 0xA2, 0xFE, ++0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, 0x4D, 0xFF, 0x90, 0xA1, 0xD1, 0xF0, 0xEE, 0x54, 0x08, 0xFE, ++0xEF, 0x54, 0xF7, 0x4E, 0xF0, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x09, 0x12, 0x60, ++0x4D, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x90, 0xA1, 0xD1, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x0E, ++0x90, 0x06, 0xCD, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x06, 0xCF, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0xA2, ++0xEB, 0x12, 0x45, 0xB5, 0x12, 0x06, 0x89, 0x20, 0xE0, 0x02, 0xA1, 0x45, 0x90, 0x05, 0x54, 0xE0, ++0x90, 0xA1, 0xDE, 0xF0, 0xE0, 0xC3, 0x13, 0x90, 0xA1, 0xDD, 0xF0, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, ++0x54, 0x0F, 0x30, 0xE0, 0x16, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0x90, 0xA1, 0xCE, 0xF0, 0x90, ++0x00, 0x02, 0x12, 0x06, 0xA2, 0x90, 0xA1, 0xCF, 0xF0, 0x80, 0x48, 0x90, 0x00, 0x01, 0x12, 0x06, ++0xA2, 0xFF, 0xC3, 0x94, 0x2A, 0x50, 0x12, 0xEF, 0xC3, 0x94, 0x03, 0x90, 0xA1, 0xCE, 0x50, 0x05, ++0x74, 0x03, 0xF0, 0x80, 0x0A, 0xEF, 0xF0, 0x80, 0x06, 0x90, 0xA1, 0xCE, 0x74, 0x2A, 0xF0, 0x90, ++0x00, 0x02, 0x12, 0x06, 0xA2, 0xFF, 0xC3, 0x94, 0x2A, 0x50, 0x12, 0xEF, 0xC3, 0x94, 0x03, 0x90, ++0xA1, 0xCF, 0x50, 0x05, 0x74, 0x03, 0xF0, 0x80, 0x0A, 0xEF, 0xF0, 0x80, 0x06, 0x90, 0xA1, 0xCF, ++0x74, 0x2A, 0xF0, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x3C, 0x90, ++0xA1, 0xCE, 0xE0, 0x75, 0xF0, 0x03, 0x84, 0x90, 0xA1, 0xD6, 0xF0, 0xE0, 0xC3, 0x13, 0xA3, 0xF0, ++0x90, 0xA1, 0xCF, 0xE0, 0x75, 0xF0, 0x03, 0x84, 0x90, 0xA1, 0xD8, 0xF0, 0x90, 0xA1, 0xCE, 0xE0, ++0xC3, 0x13, 0x90, 0xA1, 0xD9, 0xF0, 0x90, 0xA1, 0xCF, 0xE0, 0xC3, 0x13, 0x90, 0xA1, 0xDA, 0xF0, ++0x90, 0x01, 0x3E, 0x74, 0x08, 0xF0, 0xFD, 0x7F, 0x02, 0x11, 0x0B, 0xE4, 0x90, 0xA2, 0x0A, 0xF0, ++0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0xC4, 0x13, 0x13, 0x54, ++0x03, 0x20, 0xE0, 0x3C, 0x90, 0xA1, 0xCD, 0xE0, 0xFF, 0xC3, 0x13, 0x20, 0xE0, 0x0A, 0xEF, 0xC4, ++0x13, 0x13, 0x13, 0x54, 0x01, 0x30, 0xE0, 0x28, 0x12, 0x06, 0x89, 0x13, 0x13, 0x13, 0x54, 0x1F, ++0x30, 0xE0, 0x08, 0x90, 0xA2, 0x0C, 0xE0, 0x60, 0x08, 0x80, 0x0B, 0x90, 0xA2, 0x0C, 0xE0, 0x60, ++0x05, 0x75, 0x51, 0x01, 0x80, 0x03, 0xE4, 0xF5, 0x51, 0x7D, 0x02, 0xAF, 0x51, 0x12, 0x63, 0x7F, ++0x90, 0xA1, 0xCD, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x1C, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, ++0x54, 0x07, 0x30, 0xE0, 0x07, 0x7D, 0x04, 0x7F, 0x02, 0x12, 0x55, 0x87, 0x90, 0x05, 0x00, 0x74, ++0x1C, 0xF0, 0xA3, 0x74, 0x11, 0xF0, 0x90, 0x05, 0x58, 0x74, 0x02, 0xF0, 0x90, 0xA1, 0xD5, 0xE0, ++0xFF, 0xB4, 0x01, 0x08, 0x90, 0xA1, 0xE0, 0x74, 0x01, 0xF0, 0x80, 0x22, 0xEF, 0xB4, 0x04, 0x08, ++0x90, 0xA1, 0xE0, 0x74, 0x04, 0xF0, 0x80, 0x16, 0xEF, 0xB4, 0x06, 0x08, 0x90, 0xA1, 0xE0, 0x74, ++0x02, 0xF0, 0x80, 0x0A, 0xEF, 0xB4, 0x07, 0x06, 0x90, 0xA1, 0xE0, 0x74, 0x05, 0xF0, 0xE4, 0x90, ++0xA1, 0xD5, 0xF0, 0x80, 0x6D, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x90, 0x00, 0x03, 0x12, 0x06, ++0xA2, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x05, 0x75, 0x52, 0x02, 0x80, 0x14, 0x12, ++0x06, 0x89, 0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x05, 0x75, 0x52, 0x01, 0x80, 0x03, ++0xE4, 0xF5, 0x52, 0xD1, 0x07, 0x7D, 0x2C, 0x7F, 0x40, 0x12, 0x46, 0xAC, 0x90, 0xA2, 0xEB, 0x12, ++0x45, 0xB5, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x90, 0x07, 0x78, ++0x30, 0xE0, 0x05, 0x74, 0x03, 0xF0, 0x80, 0x03, 0x74, 0x01, 0xF0, 0xAD, 0x52, 0x7F, 0x02, 0x12, ++0x63, 0x7F, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x90, 0x05, 0x00, 0x74, 0x1C, 0xF0, 0xA3, 0x74, ++0x43, 0xF0, 0x90, 0xA1, 0xD3, 0xE0, 0x54, 0xDF, 0xF0, 0xE4, 0x90, 0xA1, 0xDF, 0xF0, 0x90, 0xA1, ++0xD0, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x30, 0xE0, 0x09, 0x90, 0xA1, 0xFD, 0xE0, 0x44, ++0x02, 0xF0, 0x80, 0x0C, 0x7F, 0x01, 0x12, 0x67, 0xE7, 0x90, 0xA1, 0xFD, 0xE0, 0x54, 0xFD, 0xF0, ++0x7F, 0x03, 0x12, 0x66, 0xDF, 0x90, 0xA1, 0xCD, 0xE0, 0x20, 0xE0, 0x07, 0x90, 0xA1, 0xD1, 0xE0, ++0x54, 0xBF, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7E, 0x00, 0x7F, 0x2A, 0x7D, 0x00, 0x7B, 0x01, ++0x7A, 0xA2, 0x79, 0x2C, 0x02, 0x08, 0xAA, 0x7E, 0x00, 0x7F, 0x0A, 0x7D, 0x00, 0x7B, 0x01, 0x7A, ++0xA1, 0x79, 0xF3, 0x12, 0x08, 0xAA, 0x90, 0xA1, 0xE1, 0x74, 0x02, 0xF0, 0x22, 0x8F, 0x55, 0xE4, ++0x90, 0xA2, 0xF1, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0xFD, 0x58, 0xE0, 0x30, 0xE0, 0x2A, 0xD3, ++0x90, 0xA2, 0xF2, 0xE0, 0x94, 0x14, 0x90, 0xA2, 0xF1, 0xE0, 0x94, 0x00, 0x40, 0x08, 0x90, 0xA2, ++0xF3, 0x74, 0x01, 0xF0, 0x80, 0x13, 0x7F, 0x01, 0x7E, 0x00, 0x12, 0x3D, 0xC2, 0x90, 0xA2, 0xF1, ++0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0x80, 0xCF, 0x90, 0xA2, 0xF3, 0xE0, 0xB4, 0x01, 0x0C, ++0x7F, 0x05, 0x12, 0x5E, 0x86, 0x90, 0xFD, 0x58, 0xE0, 0x44, 0x80, 0xF0, 0xE5, 0x55, 0x75, 0xF0, ++0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x90, 0xFD, 0x50, 0xF0, ++0xE5, 0x55, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, ++0x90, 0xFD, 0x51, 0xF0, 0xE5, 0x55, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x02, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0x90, 0xFD, 0x52, 0xF0, 0xE5, 0x55, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x03, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x90, 0xFD, 0x53, 0xF0, 0xE5, 0x55, 0x75, 0xF0, ++0x08, 0xA4, 0x24, 0x04, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x90, 0xFD, 0x54, 0xF0, ++0xE5, 0x55, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x05, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, ++0x90, 0xFD, 0x55, 0xF0, 0xE5, 0x55, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x06, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0x90, 0xFD, 0x56, 0xF0, 0xE5, 0x55, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x07, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x90, 0xFD, 0x57, 0xF0, 0xA3, 0x74, 0x01, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xF5, 0x54, 0x90, 0xA2, 0xEE, 0xF0, 0x74, ++0x28, 0x2F, 0xFF, 0xE4, 0x3E, 0xFE, 0xA3, 0xEF, 0xF0, 0xEE, 0xA3, 0xF0, 0x90, 0x01, 0xBD, 0xE0, ++0x44, 0x02, 0xF0, 0x90, 0x02, 0x09, 0xE0, 0xC3, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0x90, 0xA2, 0xF0, ++0xE0, 0xFF, 0x90, 0xA2, 0xEE, 0xE0, 0xFE, 0xC3, 0x9F, 0x50, 0x5C, 0xEE, 0x70, 0x05, 0x75, 0x54, ++0x05, 0x80, 0x03, 0xE4, 0xF5, 0x54, 0xE5, 0x54, 0xC3, 0x94, 0x20, 0x50, 0x08, 0xAF, 0x54, 0xD1, ++0x1D, 0x05, 0x54, 0x80, 0xF1, 0x90, 0xA2, 0xEE, 0xE0, 0x04, 0xF0, 0x90, 0xFD, 0x10, 0xE0, 0x04, ++0xF0, 0x90, 0xA2, 0xF0, 0xE0, 0xFF, 0x90, 0xA2, 0xEE, 0xE0, 0xB5, 0x07, 0xC0, 0xE4, 0xF5, 0x54, ++0xE5, 0x54, 0x75, 0xF0, 0x08, 0xA4, 0xFF, 0x90, 0xA2, 0xEF, 0xE0, 0xFD, 0xC3, 0xEF, 0x9D, 0x74, ++0x80, 0xF8, 0x65, 0xF0, 0x98, 0x50, 0x08, 0xAF, 0x54, 0xD1, 0x1D, 0x05, 0x54, 0x80, 0xE1, 0x90, ++0xA2, 0xEE, 0xE0, 0x04, 0xF0, 0x80, 0x96, 0x90, 0x01, 0xBD, 0xE0, 0x44, 0x04, 0xF0, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0xEE, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0xE4, 0xF5, 0x54, 0xF5, 0x55, 0x90, 0x02, 0x09, 0xE0, 0xFF, 0x12, 0xBC, 0x47, 0xAD, ++0x07, 0xED, 0x24, 0x28, 0xFF, 0xE4, 0x33, 0xFE, 0x90, 0xA2, 0xEF, 0xE0, 0x2F, 0xFF, 0x90, 0xA2, ++0xEE, 0xE0, 0x3E, 0xF9, 0xC3, 0x74, 0xD8, 0x9D, 0x90, 0xA2, 0xF4, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, ++0xFC, 0xEC, 0xC3, 0x99, 0x40, 0x03, 0x02, 0x88, 0xB4, 0x90, 0x02, 0x09, 0xE0, 0xC3, 0x13, 0x2C, ++0x90, 0xFD, 0x10, 0xF0, 0xEC, 0x70, 0x67, 0xF5, 0x56, 0x90, 0xA2, 0xF4, 0xE0, 0xC3, 0x13, 0xFF, ++0xE5, 0x56, 0xC3, 0x9F, 0x40, 0x02, 0x01, 0xB0, 0x75, 0xF0, 0x02, 0xE5, 0x56, 0xA4, 0x2D, 0xF5, ++0x82, 0xE4, 0x35, 0xF0, 0xF5, 0x83, 0xE5, 0x82, 0x24, 0x28, 0xF5, 0x82, 0xE5, 0x83, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x90, 0xA2, 0xF0, 0xF0, 0xFB, 0x75, 0xF0, 0x02, 0xE5, 0x56, 0xA4, 0x2D, 0xF5, ++0x82, 0xE4, 0x35, 0xF0, 0xF5, 0x83, 0xE5, 0x82, 0x24, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x90, 0xA2, 0xF1, 0xF0, 0xFE, 0x7A, 0x00, 0xE4, 0x2B, 0xFF, 0xEA, 0x3E, 0xFE, ++0xA3, 0xF0, 0xA3, 0xEF, 0xF0, 0x62, 0x55, 0xEE, 0x62, 0x54, 0x05, 0x56, 0x80, 0x9B, 0xE4, 0xF5, ++0x56, 0xE5, 0x56, 0x25, 0xE0, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x90, ++0xA2, 0xF0, 0xF0, 0xFB, 0xE5, 0x56, 0x25, 0xE0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0x90, 0xA2, 0xF1, 0xF0, 0xFE, 0x7A, 0x00, 0xE4, 0x2B, 0xFF, 0xEA, 0x3E, 0xFE, 0xA3, ++0xF0, 0xA3, 0xEF, 0xF0, 0x62, 0x55, 0xEE, 0x62, 0x54, 0x05, 0x56, 0xE5, 0x56, 0xB4, 0x80, 0xC1, ++0x0C, 0x02, 0x87, 0xF1, 0x90, 0x02, 0x09, 0xE0, 0xC3, 0x13, 0x29, 0x90, 0xFD, 0x10, 0xF0, 0xE4, ++0xF5, 0x56, 0x90, 0xA2, 0xF5, 0xE0, 0xC3, 0x13, 0xFF, 0xE5, 0x56, 0xC3, 0x9F, 0x50, 0x3C, 0xE5, ++0x56, 0x25, 0xE0, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x90, 0xA2, 0xF0, ++0xF0, 0xFD, 0xE5, 0x56, 0x25, 0xE0, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, ++0x90, 0xA2, 0xF1, 0xF0, 0xFE, 0x7C, 0x00, 0xE4, 0x2D, 0xFF, 0xEC, 0x3E, 0xFE, 0xA3, 0xF0, 0xA3, ++0xEF, 0xF0, 0x62, 0x55, 0xEE, 0x62, 0x54, 0x05, 0x56, 0x80, 0xB7, 0xE5, 0x55, 0x90, 0x04, 0x9E, ++0xF0, 0xE5, 0x54, 0xA3, 0xF0, 0x45, 0x55, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x90, 0xA2, 0xEB, 0x74, 0x0A, 0xF0, 0x90, 0xA2, 0xF9, 0x74, 0x06, 0xF0, 0x12, 0x06, ++0x89, 0x90, 0xA2, 0xED, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0x90, 0xA2, 0xEE, 0xF0, 0x90, ++0x00, 0x02, 0x12, 0x06, 0xA2, 0x90, 0xA2, 0xEF, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0x90, ++0xA2, 0xF0, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x06, 0xA2, 0x90, 0xA2, 0xF1, 0xF0, 0x90, 0x00, 0x05, ++0x12, 0x06, 0xA2, 0x90, 0xA2, 0xF2, 0xF0, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xEB, 0x02, 0x6F, 0xEA, ++0x12, 0x06, 0x89, 0xF5, 0x51, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0xF5, 0x54, 0x90, 0x00, 0x02, ++0x12, 0x06, 0xA2, 0xF5, 0x55, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0xF5, 0x56, 0x90, 0x00, 0x04, ++0x12, 0x06, 0xA2, 0xF5, 0x57, 0x90, 0x00, 0x05, 0x12, 0x06, 0xA2, 0xF5, 0x58, 0x90, 0x00, 0x06, ++0x12, 0x06, 0xA2, 0xF5, 0x59, 0xE5, 0x51, 0x12, 0x45, 0xC7, 0x89, 0xC3, 0x00, 0x89, 0xCB, 0x01, ++0x89, 0xD3, 0x02, 0x89, 0xDB, 0x03, 0x89, 0xE3, 0x04, 0x89, 0xEB, 0x05, 0x89, 0xF3, 0x06, 0x00, ++0x00, 0x8A, 0x0A, 0x75, 0x52, 0x02, 0x75, 0x53, 0x29, 0x80, 0x45, 0x75, 0x52, 0x06, 0x75, 0x53, ++0x2A, 0x80, 0x3D, 0x75, 0x52, 0x01, 0x75, 0x53, 0x31, 0x80, 0x35, 0x75, 0x52, 0x01, 0x75, 0x53, ++0x32, 0x80, 0x2D, 0x75, 0x52, 0x06, 0x75, 0x53, 0x33, 0x80, 0x25, 0x7B, 0x00, 0x7A, 0x00, 0x79, ++0x54, 0x21, 0x22, 0x90, 0xA2, 0x0E, 0xE5, 0x54, 0xF0, 0xA3, 0xE5, 0x55, 0xF0, 0xA3, 0xE5, 0x56, ++0xF0, 0xA3, 0xE5, 0x57, 0xF0, 0xA3, 0xE5, 0x58, 0xF0, 0x22, 0x75, 0x52, 0x01, 0x75, 0x53, 0xFF, ++0x7B, 0x00, 0x7A, 0x00, 0x79, 0x54, 0xAD, 0x52, 0xAF, 0x53, 0x02, 0x5E, 0x9D, 0x90, 0xA1, 0xBE, ++0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x2F, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x20, 0xE0, 0x26, ++0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x07, 0x90, 0x07, 0x78, 0x74, 0x03, 0xF0, ++0x22, 0x90, 0xA1, 0xBE, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x90, 0x07, 0x78, 0x30, 0xE0, 0x04, 0x74, ++0x0D, 0xF0, 0x22, 0x74, 0x09, 0xF0, 0x22, 0xE4, 0xF5, 0x63, 0x90, 0xA1, 0x1A, 0xE0, 0x70, 0x02, ++0x61, 0x1E, 0x90, 0xA0, 0x90, 0xE0, 0x64, 0x01, 0x60, 0x02, 0x61, 0x1E, 0x90, 0xA1, 0x16, 0xE0, ++0x30, 0xE0, 0x1D, 0x90, 0x05, 0x62, 0xE0, 0xFE, 0x90, 0x05, 0x61, 0xE0, 0xFD, 0xED, 0x78, 0x02, ++0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0xA1, 0x4F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, ++0x90, 0xA1, 0x18, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x60, 0x22, 0x24, 0xFE, 0x60, 0x03, 0x04, 0x70, ++0x1E, 0x90, 0xA1, 0x21, 0xE0, 0x14, 0xF0, 0xE0, 0xFF, 0x60, 0x06, 0x90, 0xA1, 0x23, 0xE0, 0x60, ++0x0E, 0xEF, 0x70, 0x08, 0x90, 0xA1, 0x20, 0xE0, 0xA3, 0xF0, 0x80, 0x00, 0x75, 0x63, 0x01, 0x90, ++0xA1, 0x11, 0xE0, 0x30, 0xE0, 0x12, 0x90, 0xA1, 0x15, 0xE0, 0xB4, 0x02, 0x03, 0xE4, 0xF5, 0x63, ++0x12, 0x58, 0x9C, 0xEF, 0x70, 0x02, 0xF5, 0x63, 0xE5, 0x63, 0x60, 0x42, 0x90, 0xA1, 0x1E, 0xE0, ++0x44, 0x10, 0xF0, 0x90, 0xA1, 0x23, 0xE0, 0x60, 0x03, 0xB4, 0x01, 0x0B, 0xE4, 0x90, 0xA3, 0xAE, ++0xF0, 0x90, 0xA1, 0x23, 0xE0, 0x80, 0x0F, 0xE4, 0x90, 0xA3, 0xAE, 0xF0, 0x90, 0xA1, 0x23, 0xE0, ++0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0xFF, 0x90, 0xA1, 0x22, 0xE0, 0x2F, 0x90, 0xA3, 0xAF, 0x12, ++0x48, 0x21, 0x90, 0xA1, 0x1D, 0xE0, 0x20, 0xE2, 0x03, 0x12, 0x56, 0x52, 0x51, 0x1D, 0x22, 0x90, ++0xA2, 0x25, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xAD, 0x07, 0xEE, 0xFF, 0x90, 0x01, 0x6F, 0xE4, 0xF0, ++0x8F, 0x35, 0xAF, 0x05, 0x8F, 0x36, 0xFB, 0xFD, 0x7F, 0x6C, 0x7E, 0x01, 0x12, 0x3C, 0xB1, 0x90, ++0x01, 0x6F, 0x74, 0x05, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x19, ++0xE0, 0x30, 0xE0, 0x20, 0x90, 0xA2, 0x1E, 0xE0, 0xB4, 0x01, 0x0C, 0xA3, 0xE0, 0xB4, 0x01, 0x14, ++0x74, 0x02, 0xF0, 0x71, 0x1F, 0x80, 0x0D, 0x90, 0xA2, 0x1E, 0xE0, 0xB4, 0x02, 0x06, 0x74, 0x03, ++0xF0, 0x12, 0x67, 0x36, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, 0x13, ++0x54, 0x03, 0x20, 0xE0, 0x02, 0xA1, 0xEA, 0x90, 0xA1, 0xD5, 0xE0, 0x64, 0x01, 0x70, 0x38, 0x90, ++0x06, 0x92, 0xE0, 0x20, 0xE2, 0x06, 0x90, 0x04, 0xE3, 0xE0, 0x60, 0x20, 0x90, 0x06, 0x92, 0x74, ++0x04, 0xF0, 0x90, 0xA1, 0xE2, 0xE0, 0x04, 0xF0, 0x90, 0xA1, 0xD9, 0xE0, 0x75, 0xF0, 0x03, 0x84, ++0xFF, 0x90, 0xA1, 0xE2, 0xE0, 0xB5, 0x07, 0x02, 0x80, 0x02, 0xA1, 0xCF, 0xE4, 0x90, 0xA1, 0xD5, ++0xF0, 0x90, 0xA1, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0xA1, 0xD5, 0xE0, 0x64, 0x04, 0x70, 0x35, 0x90, ++0x06, 0x92, 0xE0, 0x20, 0xE2, 0x06, 0x90, 0x04, 0xE3, 0xE0, 0x60, 0x1C, 0x90, 0x06, 0x92, 0x74, ++0x04, 0xF0, 0x90, 0xA1, 0xE2, 0xE0, 0x04, 0xF0, 0x90, 0xA1, 0xD8, 0xE0, 0xFF, 0x90, 0xA1, 0xE2, ++0xE0, 0xB5, 0x07, 0x02, 0x80, 0x02, 0xA1, 0xCF, 0xE4, 0x90, 0xA1, 0xD5, 0xF0, 0x90, 0xA1, 0xE0, ++0x74, 0x04, 0xF0, 0x22, 0x90, 0xA1, 0xD5, 0xE0, 0x64, 0x06, 0x60, 0x02, 0xA1, 0x30, 0x90, 0xA1, ++0xE3, 0xE0, 0xFF, 0x90, 0xA1, 0xE2, 0xE0, 0x2F, 0xFF, 0xE4, 0x33, 0xFE, 0x7C, 0x00, 0x7D, 0x03, ++0x12, 0x07, 0x03, 0x90, 0xA1, 0xD9, 0xE0, 0x2F, 0xFF, 0xEC, 0x3E, 0xFE, 0xC3, 0xEF, 0x94, 0x41, ++0xEE, 0x64, 0x80, 0x94, 0x80, 0x50, 0x08, 0x90, 0xA1, 0xE3, 0xE0, 0x94, 0x03, 0x40, 0x11, 0x90, ++0xA1, 0xD0, 0xE0, 0xC4, 0x54, 0x0F, 0x90, 0xA1, 0xE0, 0x20, 0xE0, 0x02, 0x81, 0xD2, 0xA1, 0x78, ++0x90, 0xA1, 0xD4, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x7A, 0xEF, 0x54, 0xFB, 0xF0, ++0xE4, 0xA3, 0xF0, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0E, 0x90, 0xA1, 0xF2, ++0xE0, 0x30, 0xE0, 0x02, 0xA1, 0x5E, 0x90, 0xA1, 0xE0, 0xA1, 0x78, 0x90, 0xA1, 0xE3, 0xE0, 0xFF, ++0x90, 0xA1, 0xE2, 0xE0, 0x2F, 0xFF, 0xE4, 0x33, 0xFE, 0x7C, 0x00, 0x7D, 0x03, 0x12, 0x07, 0x03, ++0x90, 0xA1, 0xD9, 0xE0, 0x2F, 0xFF, 0xEC, 0x3E, 0xFE, 0xC3, 0xEF, 0x94, 0x41, 0xEE, 0x64, 0x80, ++0x94, 0x80, 0x40, 0x0E, 0x90, 0xA1, 0xF2, 0xE0, 0x30, 0xE0, 0x02, 0xA1, 0x5E, 0x90, 0xA1, 0xE0, ++0xA1, 0x78, 0x90, 0xA1, 0xF2, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0xA1, 0xD5, 0x74, 0x09, 0xF0, 0x90, ++0x06, 0x92, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0xA1, 0xE2, 0xF0, 0x90, 0xA3, 0xE5, 0xA1, 0x84, 0x90, ++0xA1, 0xE0, 0x74, 0x02, 0xF0, 0x22, 0x12, 0x49, 0x69, 0x90, 0xA1, 0xE3, 0xE0, 0x04, 0xF0, 0x7F, ++0x03, 0x12, 0x62, 0xF1, 0x90, 0xA1, 0xE3, 0xE0, 0xFF, 0x90, 0xA1, 0xE2, 0xE0, 0x2F, 0xFF, 0xE4, ++0x33, 0xFE, 0x7C, 0x00, 0x7D, 0x03, 0x12, 0x07, 0x03, 0x90, 0xA1, 0xD9, 0xE0, 0x2F, 0xFF, 0xEC, ++0x3E, 0xFE, 0xC3, 0xEF, 0x94, 0x41, 0xEE, 0x64, 0x80, 0x94, 0x80, 0x50, 0x0A, 0x90, 0xA1, 0xE3, ++0xE0, 0x94, 0x03, 0x50, 0x02, 0xA1, 0xEA, 0x90, 0x07, 0x78, 0x74, 0x03, 0xF0, 0x90, 0x05, 0x22, ++0xE0, 0x44, 0x10, 0xFF, 0x7D, 0x03, 0x12, 0x49, 0x5E, 0x90, 0x04, 0x9C, 0xE0, 0x04, 0xF0, 0x22, ++0x90, 0xA1, 0xD5, 0xE0, 0x64, 0x07, 0x70, 0x4F, 0x90, 0xA1, 0xE3, 0xE0, 0xB4, 0x04, 0x05, 0x90, ++0xA1, 0xE0, 0x80, 0x34, 0x90, 0xA1, 0xD4, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x2C, ++0xEF, 0x54, 0xFB, 0xF0, 0xE4, 0xA3, 0xF0, 0x90, 0xA1, 0xF2, 0xE0, 0x30, 0xE0, 0x17, 0x90, 0xA1, ++0xD5, 0x74, 0x09, 0xF0, 0x90, 0x06, 0x92, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0xA1, 0xE2, 0xF0, 0x90, ++0xA3, 0xE5, 0x04, 0x80, 0x0F, 0x90, 0xA1, 0xE0, 0x74, 0x05, 0xF0, 0x22, 0x12, 0x49, 0x69, 0x90, ++0xA1, 0xE3, 0xE0, 0x04, 0xF0, 0x80, 0x48, 0x90, 0xA1, 0xD5, 0xE0, 0x64, 0x09, 0x70, 0x5B, 0x90, ++0xA1, 0xD4, 0xE0, 0x30, 0xE0, 0x0E, 0x90, 0xA1, 0xE0, 0x74, 0x05, 0xF0, 0x90, 0xA1, 0xD4, 0xE0, ++0x54, 0xFE, 0xF0, 0x22, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE2, 0x29, 0x74, 0x04, 0xF0, 0x90, 0xA1, ++0xE2, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x02, 0x17, 0x90, 0xA3, 0xE5, 0xE0, 0x90, 0xA1, 0xE0, 0x60, ++0x05, 0x74, 0x05, 0xF0, 0x80, 0x03, 0x74, 0x02, 0xF0, 0xE4, 0x90, 0xA1, 0xD5, 0xF0, 0x22, 0x7F, ++0x03, 0x02, 0x62, 0xF1, 0x90, 0xA3, 0xE5, 0xE0, 0x90, 0xA1, 0xE0, 0x60, 0x05, 0x74, 0x05, 0xF0, ++0x80, 0x03, 0x74, 0x02, 0xF0, 0xE4, 0x90, 0xA1, 0xD5, 0xF0, 0x22, 0x90, 0xA3, 0x15, 0xEF, 0xF0, ++0x7F, 0x03, 0x12, 0x62, 0xF1, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x54, 0x0F, 0x90, 0xA1, 0xE0, 0x30, ++0xE0, 0x05, 0x74, 0x05, 0xF0, 0x80, 0x03, 0xE0, 0x04, 0xF0, 0x90, 0xA1, 0xD1, 0xE0, 0xFF, 0xC4, ++0x13, 0x54, 0x07, 0x20, 0xE0, 0x09, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x3C, 0x90, ++0xA1, 0xD0, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0A, 0x90, 0xA1, 0xCE, 0xE0, 0xFF, 0x90, 0xA1, ++0xDE, 0x80, 0x21, 0x90, 0xA3, 0x15, 0xE0, 0xFC, 0xB4, 0x01, 0x0D, 0x90, 0xA1, 0xCE, 0xE0, 0xFE, ++0x90, 0xA1, 0xDD, 0xE0, 0xC3, 0x9E, 0x80, 0x0F, 0xEC, 0xB4, 0x04, 0x0F, 0x90, 0xA1, 0xCF, 0xE0, ++0xFF, 0x90, 0xA1, 0xDD, 0xE0, 0xC3, 0x9F, 0x90, 0xA1, 0xE4, 0xF0, 0x90, 0xA1, 0xCD, 0xE0, 0xC4, ++0x13, 0x54, 0x07, 0x30, 0xE0, 0x2C, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, ++0x02, 0xE1, 0x09, 0x90, 0xA1, 0xE4, 0xE0, 0xFF, 0xC3, 0x94, 0x20, 0x50, 0x0A, 0xEF, 0x25, 0xE0, ++0x25, 0xE0, 0xFB, 0xE4, 0xFD, 0x80, 0x05, 0x7B, 0x7F, 0x7D, 0xFF, 0xE4, 0xFF, 0x12, 0x4C, 0x71, ++0x80, 0x77, 0x90, 0xA1, 0xCD, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x54, 0x90, 0xA1, 0xD3, 0xE0, ++0x54, 0xDF, 0xF0, 0xE4, 0xFD, 0x7F, 0x04, 0x12, 0x56, 0x56, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, ++0x13, 0x54, 0x03, 0x30, 0xE0, 0x3A, 0x90, 0xA1, 0xD4, 0xE0, 0x44, 0x02, 0xF0, 0x54, 0xFB, 0xF0, ++0xE4, 0x90, 0xA1, 0xE3, 0xF0, 0x90, 0xA1, 0xE0, 0xF0, 0x90, 0xA3, 0x15, 0xE0, 0xFF, 0xB4, 0x01, ++0x08, 0x90, 0xA1, 0xD5, 0x74, 0x06, 0xF0, 0x80, 0x0A, 0xEF, 0xB4, 0x04, 0x06, 0x90, 0xA1, 0xD5, ++0x74, 0x07, 0xF0, 0x90, 0xA1, 0xBF, 0xE0, 0x60, 0x07, 0x90, 0xA1, 0xD4, 0xE0, 0x44, 0x04, 0xF0, ++0x90, 0xA3, 0x15, 0xE0, 0xB4, 0x01, 0x04, 0x7D, 0x06, 0x80, 0x09, 0x90, 0xA3, 0x15, 0xE0, 0xB4, ++0x04, 0x07, 0x7D, 0x0C, 0x7F, 0x6F, 0x12, 0x49, 0x5E, 0x90, 0xA1, 0xD1, 0xE0, 0x13, 0x13, 0x13, ++0x54, 0x1F, 0x30, 0xE0, 0x1B, 0x90, 0xA1, 0xE4, 0xE0, 0xFF, 0xC3, 0x94, 0x20, 0x50, 0x0A, 0xEF, ++0x7F, 0x00, 0x25, 0xE0, 0x25, 0xE0, 0xFE, 0x80, 0x04, 0x7F, 0xFF, 0x7E, 0x7F, 0x12, 0x4B, 0xBB, ++0x90, 0xA1, 0xD0, 0xE0, 0x30, 0xE0, 0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x22, 0x7E, 0x00, ++0x7F, 0x30, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0xCD, 0x12, 0x08, 0xAA, 0x90, 0xA1, 0xCE, ++0x74, 0x0B, 0xF0, 0xA3, 0x74, 0x08, 0xF0, 0x90, 0x9F, 0x9C, 0xE0, 0xFC, 0x64, 0x02, 0x70, 0x1D, ++0x90, 0xFD, 0x80, 0xE0, 0x7E, 0x00, 0x30, 0xE2, 0x02, 0x7E, 0x01, 0xEE, 0x54, 0x01, 0xC4, 0x33, ++0x33, 0x54, 0xC0, 0xFE, 0x90, 0xA1, 0xD0, 0xE0, 0x54, 0xBF, 0x4E, 0xF0, 0x22, 0xEC, 0x64, 0x01, ++0x70, 0x0D, 0x90, 0xFD, 0x70, 0xE0, 0x7F, 0x00, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x80, 0x13, 0x90, ++0x9F, 0x9C, 0xE0, 0x64, 0x03, 0x70, 0x1C, 0x90, 0xFD, 0x78, 0xE0, 0x7F, 0x00, 0x30, 0xE2, 0x02, ++0x7F, 0x01, 0xEF, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x54, 0xC0, 0xFF, 0x90, 0xA1, 0xD0, 0xE0, 0x54, ++0xBF, 0x4F, 0xF0, 0x22, 0x90, 0xA3, 0x26, 0xEF, 0xF0, 0x90, 0xA2, 0x0D, 0xE0, 0x60, 0x03, 0x02, ++0x90, 0x3F, 0x7F, 0x48, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0xEE, 0x54, 0x0F, 0xFE, 0xE4, 0xFD, 0xFC, ++0x90, 0xA3, 0x27, 0x12, 0x08, 0x6D, 0xE4, 0x7F, 0x80, 0x7E, 0x02, 0xFD, 0xFC, 0x90, 0xA3, 0x27, ++0x12, 0x45, 0x8D, 0xC3, 0x12, 0x45, 0x60, 0x70, 0x05, 0x90, 0xA1, 0xEE, 0x80, 0x31, 0xE4, 0xFF, ++0xFE, 0xFD, 0xFC, 0x90, 0xA3, 0x27, 0x12, 0x45, 0x8D, 0xC3, 0x12, 0x45, 0x60, 0x70, 0x0A, 0x90, ++0xA1, 0xEE, 0x04, 0xF0, 0xE4, 0xA3, 0xF0, 0x01, 0x9B, 0xE4, 0xFF, 0x7E, 0x02, 0xFD, 0xFC, 0x90, ++0xA3, 0x27, 0x12, 0x45, 0x8D, 0xC3, 0x12, 0x45, 0x60, 0x70, 0x09, 0x90, 0xA1, 0xEE, 0x04, 0xF0, ++0xA3, 0xF0, 0x80, 0x77, 0xE4, 0x7F, 0x80, 0xFE, 0xFD, 0xFC, 0x90, 0xA3, 0x27, 0x12, 0x45, 0x8D, ++0xC3, 0x12, 0x45, 0x60, 0x70, 0x65, 0x90, 0xA1, 0xEE, 0xF0, 0xA3, 0x04, 0xF0, 0x80, 0x5C, 0x7F, ++0x2C, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0xEF, 0x54, 0x02, 0xFF, 0xE4, 0xFE, 0xFD, 0xFC, 0x90, 0xA3, ++0x27, 0x12, 0x08, 0x6D, 0x90, 0xA3, 0x27, 0x12, 0x45, 0x71, 0xEC, 0x4D, 0x4E, 0x4F, 0x60, 0x08, ++0x90, 0xA1, 0xEE, 0x74, 0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0xA1, 0xEE, 0xF0, 0x7F, 0x30, 0x7E, ++0x09, 0x12, 0x37, 0x4E, 0xEF, 0x54, 0x01, 0xFF, 0xE4, 0xFE, 0xFD, 0xFC, 0x90, 0xA3, 0x27, 0x12, ++0x08, 0x6D, 0x90, 0xA3, 0x27, 0x12, 0x45, 0x71, 0xEC, 0x4D, 0x4E, 0x4F, 0x60, 0x07, 0xE4, 0x90, ++0xA1, 0xEF, 0xF0, 0x80, 0x06, 0x90, 0xA1, 0xEF, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0xE8, 0xE0, 0x44, ++0x01, 0xF0, 0x7D, 0x11, 0x12, 0x46, 0xF8, 0x90, 0x07, 0x78, 0xE0, 0x90, 0xA1, 0xED, 0xF0, 0x90, ++0xA2, 0x0C, 0xE0, 0xFF, 0xE4, 0xFD, 0x12, 0x63, 0x7F, 0x90, 0xA3, 0x26, 0xE0, 0xFD, 0x70, 0x02, ++0x80, 0x24, 0xED, 0xB4, 0x01, 0x0A, 0x90, 0xA1, 0xE8, 0xE0, 0x54, 0x1F, 0x44, 0x20, 0xF0, 0x22, ++0x90, 0xA3, 0x26, 0xE0, 0xFD, 0xB4, 0x02, 0x0A, 0x90, 0xA1, 0xE8, 0xE0, 0x54, 0x1F, 0x44, 0x60, ++0xF0, 0x22, 0xED, 0xB4, 0x03, 0x07, 0x90, 0xA1, 0xE8, 0xE0, 0x54, 0x1F, 0xF0, 0x22, 0x90, 0xA1, ++0xE8, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xE1, 0xF0, 0x90, 0xA1, 0xED, 0xE0, 0x90, 0x07, 0x78, 0xF0, ++0x90, 0xA1, 0xEE, 0x12, 0x63, 0x7A, 0x12, 0x60, 0x4D, 0xE4, 0xFD, 0xFF, 0x02, 0x49, 0x5E, 0x12, ++0x67, 0xC8, 0x90, 0xA1, 0xE8, 0xE0, 0xFF, 0xC4, 0x13, 0x54, 0x07, 0xFE, 0xEF, 0xC3, 0x13, 0x54, ++0x0F, 0xC3, 0x9E, 0x40, 0x02, 0x80, 0xC7, 0x90, 0xA1, 0xE8, 0xE0, 0xFF, 0xC3, 0x13, 0x54, 0x0F, ++0xFE, 0xEF, 0x54, 0xE1, 0xFF, 0xEE, 0x04, 0x54, 0x0F, 0x25, 0xE0, 0x4F, 0xF0, 0x22, 0xEF, 0x70, ++0x1C, 0x90, 0xA2, 0x1A, 0xE0, 0x54, 0x03, 0xFE, 0x70, 0x02, 0x80, 0x1B, 0xBE, 0x01, 0x02, 0x80, ++0x20, 0xBE, 0x02, 0x02, 0x80, 0x26, 0xEE, 0x64, 0x03, 0x70, 0x32, 0x80, 0x2A, 0x90, 0xA2, 0x1A, ++0xE0, 0xC4, 0x54, 0x03, 0xFE, 0x70, 0x07, 0x90, 0x07, 0x78, 0x04, 0xF0, 0x80, 0x1F, 0xBE, 0x01, ++0x08, 0x90, 0x07, 0x78, 0x74, 0x03, 0xF0, 0x80, 0x14, 0xBE, 0x02, 0x08, 0x90, 0x07, 0x78, 0x74, ++0x09, 0xF0, 0x80, 0x09, 0xBE, 0x03, 0x06, 0x90, 0x07, 0x78, 0x74, 0x0D, 0xF0, 0x90, 0xA2, 0x19, ++0xE0, 0xFE, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x45, 0xEF, 0x70, 0x1F, 0xA3, 0xE0, 0x13, 0x13, ++0x54, 0x3F, 0x30, 0xE0, 0x07, 0xE4, 0x90, 0xA3, 0x15, 0xF0, 0x80, 0x06, 0x90, 0xA3, 0x15, 0x74, ++0x01, 0xF0, 0x90, 0xA3, 0x15, 0xE0, 0xFD, 0xE4, 0xFF, 0x80, 0x20, 0x90, 0xA2, 0x1A, 0xE0, 0xC4, ++0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x07, 0xE4, 0x90, 0xA3, 0x15, 0xF0, 0x80, 0x06, 0x90, 0xA3, ++0x15, 0x74, 0x01, 0xF0, 0x90, 0xA3, 0x15, 0xE0, 0xFD, 0x7F, 0x01, 0x12, 0x63, 0x7F, 0x22, 0x90, ++0xA4, 0x06, 0xEF, 0xF0, 0x7F, 0x02, 0x12, 0x44, 0xB7, 0x90, 0x9F, 0x98, 0xE0, 0xFF, 0x90, 0xA4, ++0x06, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x9F, 0x98, 0xF0, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xF5, 0x51, ++0x12, 0x06, 0x89, 0x25, 0x51, 0x90, 0x9F, 0x9D, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0x25, ++0x51, 0x90, 0x9F, 0x9E, 0xF0, 0x90, 0x00, 0x02, 0x12, 0x06, 0xA2, 0x25, 0x51, 0x90, 0x9F, 0x9F, ++0xF0, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0x25, 0x51, 0x90, 0x9F, 0xA0, 0xF0, 0x90, 0x00, 0x04, ++0x12, 0x06, 0xA2, 0x25, 0x51, 0x90, 0x9F, 0xA1, 0xF0, 0x90, 0x00, 0x05, 0x12, 0x06, 0xA2, 0x25, ++0x51, 0x90, 0x9F, 0xA2, 0xF0, 0x22, 0x8B, 0x51, 0x8A, 0x52, 0x89, 0x53, 0x90, 0x00, 0x01, 0x12, ++0x06, 0xA2, 0xFF, 0xF5, 0x55, 0x12, 0x06, 0x89, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x0A, 0x90, 0x00, ++0x02, 0x12, 0x06, 0xA2, 0xF5, 0x56, 0x80, 0x02, 0x8F, 0x56, 0x85, 0x55, 0x54, 0xE5, 0x54, 0xD3, ++0x95, 0x56, 0x50, 0x33, 0xAB, 0x51, 0xAA, 0x52, 0xA9, 0x53, 0x12, 0x06, 0x89, 0x54, 0x01, 0xFF, ++0x74, 0x90, 0x25, 0x54, 0xF5, 0x82, 0xE4, 0x34, 0xA0, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x90, 0x25, ++0x54, 0xF5, 0x82, 0xE4, 0x34, 0xA0, 0xF5, 0x83, 0xE0, 0xAF, 0x54, 0x70, 0x04, 0x51, 0xD7, 0x80, ++0x02, 0x51, 0xC6, 0x05, 0x54, 0x80, 0xC6, 0x51, 0xFC, 0xE5, 0x55, 0x70, 0x18, 0x90, 0xA0, 0x90, ++0xE0, 0x70, 0x12, 0x12, 0x60, 0x4D, 0x51, 0xE8, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xF7, 0xF0, 0x54, ++0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, 0x8F, 0x57, 0x75, 0xF0, 0x10, 0xEF, 0x90, 0x81, 0x05, 0x12, ++0x45, 0xA9, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x8F, 0x57, 0x75, 0xF0, 0x10, 0xEF, 0x90, 0x81, 0x05, ++0x12, 0x45, 0xA9, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0xE4, ++0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x7D, 0x0C, 0x7F, 0x01, 0x02, 0x55, 0x87, 0xE4, 0xFF, 0x74, 0x32, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xA1, 0xF5, 0x83, 0xE4, 0xF0, 0x0F, 0xEF, 0xB4, 0x19, 0xEF, 0xE4, ++0x90, 0xA1, 0x2D, 0xF0, 0x90, 0xA1, 0x31, 0xF0, 0x90, 0xA1, 0x2B, 0xF0, 0x22, 0xE4, 0x90, 0xA3, ++0x05, 0xF0, 0xFD, 0xA3, 0xF0, 0x90, 0x05, 0x62, 0xE0, 0xFE, 0x90, 0x05, 0x61, 0xE0, 0xFB, 0xEB, ++0x78, 0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0xA1, 0x4D, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0xA1, 0x4D, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, ++0xC3, 0x9F, 0xEA, 0x9E, 0x40, 0x28, 0xEB, 0x9F, 0xFF, 0x90, 0xA1, 0x2F, 0xE0, 0xFE, 0xC3, 0x74, ++0x0A, 0x9E, 0x2F, 0xFD, 0xC3, 0x94, 0x19, 0x50, 0x13, 0x74, 0x32, 0x2D, 0xF5, 0x82, 0xE4, 0x34, ++0xA1, 0xF5, 0x83, 0xE0, 0x04, 0xF0, 0x90, 0xA1, 0x2D, 0xE0, 0x04, 0xF0, 0x71, 0xEF, 0x90, 0xA1, ++0x2D, 0xE0, 0xC3, 0x94, 0x64, 0x40, 0x67, 0xE4, 0x90, 0xA3, 0x06, 0xF0, 0x90, 0xA3, 0x05, 0xF0, ++0x90, 0xA3, 0x05, 0xE0, 0xFF, 0xC3, 0x94, 0x19, 0x50, 0x47, 0x74, 0x32, 0x2F, 0xF5, 0x82, 0xE4, ++0x34, 0xA1, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0xA3, 0x06, 0xE0, 0x2F, 0xF0, 0xE0, 0xD3, 0x94, 0x05, ++0x40, 0x27, 0x90, 0xA3, 0x05, 0xE0, 0xFF, 0x94, 0x0A, 0x40, 0x0A, 0xEF, 0x24, 0xF6, 0x90, 0xA1, ++0x2C, 0xF0, 0xE4, 0x80, 0x0E, 0xE4, 0x90, 0xA1, 0x2C, 0xF0, 0x90, 0xA3, 0x05, 0xE0, 0xFF, 0xC3, ++0x74, 0x0A, 0x9F, 0x90, 0xA1, 0x2B, 0xF0, 0x80, 0x08, 0x90, 0xA3, 0x05, 0xE0, 0x04, 0xF0, 0x80, ++0xAF, 0x90, 0xA1, 0x2C, 0xE0, 0xFD, 0x7B, 0x08, 0xE4, 0xFF, 0x91, 0x21, 0x51, 0xFC, 0x22, 0x90, ++0xA1, 0xB9, 0xE0, 0xFF, 0x90, 0xA1, 0x23, 0xE0, 0xD3, 0x9F, 0x40, 0x24, 0x90, 0xA1, 0x31, 0xE0, ++0x04, 0xF0, 0xE0, 0xFF, 0x94, 0x04, 0x50, 0x18, 0x90, 0xA1, 0x2B, 0xEF, 0xF0, 0x25, 0xE0, 0x24, ++0x08, 0x90, 0xA1, 0x30, 0xF0, 0xFB, 0x90, 0xA1, 0x2B, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x91, 0x21, ++0x22, 0xAC, 0x07, 0x90, 0xA1, 0x16, 0xE0, 0x30, 0xE0, 0x32, 0x90, 0xA1, 0x2C, 0xE0, 0xD3, 0x94, ++0x03, 0x50, 0x07, 0x90, 0xA1, 0x22, 0xEB, 0xF0, 0x80, 0x0A, 0xED, 0x24, 0xFD, 0x2B, 0x90, 0xA1, ++0x22, 0xF0, 0x7D, 0x03, 0x90, 0xA1, 0x51, 0xE0, 0x24, 0x04, 0xC3, 0x9D, 0x2C, 0xFF, 0x90, 0xA1, ++0x2F, 0xF0, 0x90, 0xA1, 0x25, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x80, 0x0E, 0x90, 0xA1, 0x25, 0xE4, ++0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x90, 0xA1, 0x22, 0xEB, 0xF0, 0x90, 0xA1, 0x25, 0xA3, 0xE0, 0x90, ++0x05, 0x58, 0xF0, 0x22, 0x91, 0xB0, 0x90, 0xA3, 0x15, 0xEF, 0xF0, 0x30, 0xE0, 0x05, 0x7D, 0x01, ++0xE4, 0x80, 0x02, 0xE4, 0xFD, 0xFF, 0x12, 0x55, 0x87, 0x90, 0xA3, 0x15, 0xE0, 0x30, 0xE6, 0x11, ++0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, ++0xF0, 0x90, 0xA1, 0x2B, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0xA1, 0x30, 0xE0, 0xFB, 0x81, 0x21, ++0xE4, 0x90, 0xA3, 0x16, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x7F, 0x83, 0x12, 0x46, 0xD6, 0x90, 0xA3, ++0x16, 0xEF, 0xF0, 0x7F, 0x83, 0x12, 0x46, 0xD6, 0xAE, 0x07, 0x90, 0xA3, 0x16, 0xE0, 0xFF, 0xB5, ++0x06, 0x01, 0x22, 0xC3, 0x90, 0xA3, 0x18, 0xE0, 0x94, 0x64, 0x90, 0xA3, 0x17, 0xE0, 0x94, 0x00, ++0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0xA3, 0x16, 0xE0, 0xFF, 0x22, 0x90, ++0xA3, 0x17, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0x80, 0xBE, 0x90, 0x04, 0x24, 0xE0, 0xF5, ++0x51, 0x12, 0x06, 0x89, 0x25, 0x51, 0x90, 0xA2, 0x3B, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, ++0x25, 0x51, 0x90, 0xA2, 0x48, 0xF0, 0x90, 0x00, 0x02, 0x12, 0x06, 0xA2, 0x25, 0x51, 0x90, 0xA2, ++0x55, 0xF0, 0x22, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xBE, 0x12, 0x06, 0x89, 0xFF, 0x54, 0x7F, 0x90, ++0xA1, 0x1A, 0xF0, 0xEF, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0xA3, 0xF0, 0x90, 0x00, 0x01, 0x12, ++0x06, 0xA2, 0xFF, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFE, 0x90, 0xA1, 0x18, 0xE0, 0x54, 0xF0, 0x4E, ++0xF0, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0x54, 0x01, 0x25, 0xE0, 0xFE, 0x90, 0xA1, 0x16, 0xE0, ++0x54, 0xFD, 0x4E, 0xF0, 0xEF, 0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0x90, 0xA1, 0x18, 0xE0, 0x54, ++0x0F, 0x4F, 0xF0, 0x90, 0x00, 0x02, 0x12, 0x06, 0xA2, 0x90, 0xA1, 0x19, 0xF0, 0x90, 0x00, 0x06, ++0x12, 0x06, 0xA2, 0x30, 0xE0, 0x5E, 0xC3, 0x13, 0x54, 0x07, 0xFF, 0xC3, 0x94, 0x04, 0x90, 0xA1, ++0x2C, 0x50, 0x04, 0xEF, 0xF0, 0x80, 0x2E, 0x74, 0x03, 0xF0, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, ++0xE9, 0x24, 0x06, 0xF9, 0xE4, 0x3A, 0xFA, 0x12, 0x06, 0x89, 0xFF, 0x74, 0x03, 0x24, 0xFD, 0xFE, ++0xEF, 0xC4, 0x54, 0x0F, 0xFD, 0xEF, 0x54, 0x0F, 0xFF, 0xED, 0x2E, 0x54, 0x0F, 0xFE, 0xC4, 0x54, ++0xF0, 0x4F, 0x12, 0x06, 0xCF, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x90, 0x00, 0x06, 0x12, 0x06, ++0xA2, 0xC4, 0x54, 0x0F, 0xFF, 0xC3, 0x94, 0x04, 0x90, 0xA1, 0x22, 0x50, 0x05, 0x74, 0x04, 0xF0, ++0x80, 0x02, 0xEF, 0xF0, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x90, 0x00, 0x04, 0x12, 0x06, 0xA2, ++0xFD, 0x7F, 0x02, 0x12, 0x55, 0x87, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x90, 0x00, 0x05, 0x12, ++0x06, 0xA2, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0xA1, 0xBE, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, ++0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0xFF, 0xF0, 0x90, 0x00, 0x05, 0x12, 0x06, 0xA2, 0xFE, ++0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, 0x4D, 0xFF, 0x90, 0xA1, 0xBE, 0xF0, 0xEE, 0x54, 0x08, 0xFE, ++0xEF, 0x54, 0xF7, 0x4E, 0xFF, 0xF0, 0x90, 0x00, 0x05, 0x12, 0x06, 0xA2, 0xFE, 0x54, 0x10, 0xFD, ++0xEF, 0x54, 0xEF, 0x4D, 0xFF, 0x90, 0xA1, 0xBE, 0xF0, 0xEE, 0x54, 0x20, 0xFE, 0xEF, 0x54, 0xDF, ++0x4E, 0xFF, 0xF0, 0x90, 0x00, 0x05, 0x12, 0x06, 0xA2, 0x54, 0x40, 0xFE, 0xEF, 0x54, 0xBF, 0x4E, ++0x90, 0xA1, 0xBE, 0xF0, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x29, 0xEF, 0xC3, ++0x13, 0x20, 0xE0, 0x0B, 0x75, 0x52, 0x01, 0x90, 0xA2, 0x0C, 0xE0, 0x60, 0x0B, 0x80, 0x0E, 0xE4, ++0xF5, 0x52, 0x90, 0xA2, 0x0C, 0xE0, 0x60, 0x05, 0xE4, 0xF5, 0x51, 0x80, 0x03, 0x75, 0x51, 0x01, ++0xAD, 0x52, 0xAF, 0x51, 0x12, 0x63, 0x7F, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x90, 0xA2, 0xEE, ++0x12, 0x45, 0xBE, 0xD1, 0xCC, 0x90, 0xA1, 0x1A, 0xE0, 0xFF, 0x12, 0x5B, 0x5E, 0x90, 0xA1, 0x1A, ++0xE0, 0x60, 0x18, 0x90, 0xA2, 0xEE, 0x12, 0x45, 0xB5, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0x54, ++0x0F, 0xFF, 0x90, 0x00, 0x02, 0x12, 0x06, 0xA2, 0xFD, 0xD1, 0xDD, 0x22, 0x90, 0xA1, 0x16, 0xE0, ++0x54, 0xFB, 0xF0, 0xE4, 0x90, 0xA1, 0x23, 0xF0, 0x90, 0xA1, 0x1E, 0xF0, 0x22, 0xEF, 0x24, 0xFE, ++0x60, 0x0B, 0x04, 0x70, 0x27, 0x90, 0xA1, 0x20, 0x74, 0x02, 0xF0, 0x80, 0x16, 0xED, 0x70, 0x0A, ++0x90, 0xA1, 0xBC, 0xE0, 0x90, 0xA1, 0x20, 0xF0, 0x80, 0x05, 0x90, 0xA1, 0x20, 0xED, 0xF0, 0x90, ++0xA1, 0x20, 0xE0, 0xA3, 0xF0, 0x90, 0xA1, 0x17, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0x90, 0x00, 0x02, ++0x12, 0x06, 0xA2, 0xFF, 0x30, 0xE0, 0x26, 0x12, 0x06, 0x89, 0x90, 0xA1, 0xB9, 0xF0, 0x90, 0x00, ++0x01, 0x12, 0x06, 0xA2, 0x90, 0xA1, 0xBA, 0xF0, 0xEF, 0x54, 0xFE, 0xFF, 0xA3, 0xE0, 0x54, 0x01, ++0x4F, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0x90, 0xA1, 0xBC, 0xF0, 0x22, 0x90, 0xA1, 0xB9, ++0x74, 0x03, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, ++0x05, 0xF0, 0x22, 0x12, 0x06, 0x89, 0x90, 0xA1, 0xBF, 0xF0, 0x60, 0x36, 0x90, 0xA1, 0xCD, 0xE0, ++0x20, 0xE0, 0x2F, 0xE4, 0xFD, 0x7F, 0x04, 0x12, 0x56, 0x56, 0x90, 0xA1, 0xBE, 0xE0, 0xFF, 0xC3, ++0x13, 0x30, 0xE0, 0x1E, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x20, 0xE0, 0x15, 0x90, 0xA1, 0xBE, ++0xE0, 0x13, 0x13, 0x54, 0x3F, 0x90, 0x07, 0x78, 0x30, 0xE0, 0x04, 0x74, 0x0D, 0xF0, 0x22, 0x74, ++0x09, 0xF0, 0x22, 0x12, 0x06, 0x89, 0x54, 0x01, 0xFF, 0x90, 0xA1, 0xC0, 0xE0, 0x54, 0xFE, 0x4F, ++0xF0, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0x90, 0xA1, 0xC1, 0xF0, 0x90, 0x00, 0x02, 0x12, 0x06, ++0xA2, 0x90, 0xA1, 0xC2, 0xF0, 0x90, 0xA1, 0xC1, 0xE0, 0x90, 0xA1, 0xC3, 0xF0, 0x90, 0xA1, 0xC0, ++0xE0, 0x54, 0x01, 0xFF, 0x02, 0x60, 0x0B, 0x90, 0xA3, 0xE7, 0x12, 0x45, 0xBE, 0xE4, 0xFE, 0x90, ++0xFD, 0x50, 0xEF, 0xF0, 0x64, 0x30, 0x60, 0x3B, 0xA3, 0xED, 0xF0, 0xEE, 0xC3, 0x9D, 0x50, 0x1E, ++0x90, 0xA3, 0xE7, 0x12, 0x45, 0xB5, 0x8E, 0x82, 0x75, 0x83, 0x00, 0x12, 0x06, 0xA2, 0xFF, 0x74, ++0x52, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFD, 0xF5, 0x83, 0xEF, 0xF0, 0x0E, 0x80, 0xDD, 0xEE, 0xC3, ++0x94, 0x06, 0x50, 0x33, 0x74, 0x52, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFD, 0xF5, 0x83, 0xE4, 0xF0, ++0x0E, 0x80, 0xEB, 0xEE, 0xC3, 0x94, 0x07, 0x50, 0x1E, 0x90, 0xA3, 0xE7, 0x12, 0x45, 0xB5, 0x8E, ++0x82, 0x75, 0x83, 0x00, 0x12, 0x06, 0xA2, 0xFF, 0x74, 0x51, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFD, ++0xF5, 0x83, 0xEF, 0xF0, 0x0E, 0x80, 0xDC, 0x90, 0xFD, 0x58, 0x74, 0x01, 0xF0, 0x22, 0x90, 0xA2, ++0xEB, 0x12, 0x45, 0xBE, 0x90, 0xA3, 0xEA, 0xE0, 0x70, 0x13, 0x7F, 0x80, 0x7E, 0x08, 0x12, 0x37, ++0x4E, 0x90, 0xA2, 0x04, 0x12, 0x08, 0x6D, 0x90, 0xA3, 0xEA, 0x74, 0x01, 0xF0, 0x90, 0xA2, 0xEB, ++0x12, 0x45, 0xB5, 0x12, 0x06, 0x89, 0xFF, 0xE4, 0x8F, 0x54, 0xF5, 0x53, 0xF5, 0x52, 0xF5, 0x51, ++0x90, 0xA2, 0x04, 0x12, 0x45, 0x71, 0xEC, 0x54, 0xC1, 0xFC, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0xAF, 0x54, 0xAE, 0x53, 0xAD, 0x52, 0xAC, 0x51, 0x78, 0x19, 0x12, 0x08, 0x5A, 0xD0, ++0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x53, 0x90, 0xA2, 0x00, 0x02, 0x08, 0x6D, ++0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA1, 0xF4, 0xE0, 0x44, 0x01, 0xF0, 0x7D, 0x01, ++0x7F, 0x28, 0x12, 0x5E, 0x9D, 0x90, 0xA2, 0xEB, 0xEF, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, ++0xA2, 0xEB, 0x12, 0x45, 0xBE, 0x90, 0x04, 0x9D, 0xE0, 0x54, 0x3F, 0xF0, 0x90, 0xA2, 0xEB, 0x12, ++0x45, 0xB5, 0x7D, 0x06, 0x7F, 0x0A, 0x12, 0x5E, 0x9D, 0x8F, 0x53, 0xE5, 0x53, 0x64, 0x01, 0x60, ++0x08, 0x90, 0x04, 0x9D, 0xE0, 0x44, 0x40, 0xF0, 0x22, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x90, ++0x00, 0x01, 0x12, 0x06, 0xA2, 0xFE, 0x12, 0x06, 0x89, 0x7C, 0x00, 0x24, 0x00, 0xF5, 0x52, 0xEC, ++0x3E, 0xF5, 0x51, 0xAF, 0x52, 0xFE, 0x12, 0x87, 0xB3, 0xEF, 0x70, 0x07, 0x90, 0x04, 0x9D, 0xE0, ++0x44, 0x10, 0xF0, 0xAF, 0x52, 0xAE, 0x51, 0x12, 0x87, 0x11, 0x90, 0x04, 0x9D, 0xE0, 0x44, 0x80, ++0xF0, 0x22, 0x12, 0x06, 0x89, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0xA2, 0x19, 0xE0, 0x54, 0xFE, 0x4E, ++0xFE, 0xF0, 0xEF, 0x54, 0x06, 0xFF, 0xEE, 0x54, 0xF9, 0x4F, 0xFF, 0xF0, 0x12, 0x06, 0x89, 0xFE, ++0x54, 0x08, 0xFD, 0xEF, 0x54, 0xF7, 0x4D, 0xFF, 0x90, 0xA2, 0x19, 0xF0, 0xEE, 0x54, 0x10, 0xFE, ++0xEF, 0x54, 0xEF, 0x4E, 0xFF, 0xF0, 0x12, 0x06, 0x89, 0x54, 0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x4E, ++0x90, 0xA2, 0x19, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0xFF, 0x54, 0x03, 0xFE, 0x90, 0xA2, ++0x1A, 0xE0, 0x54, 0xFC, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x04, 0xFF, 0xEE, 0x54, 0xFB, 0x4F, 0xFF, ++0xF0, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0xFE, 0x54, 0x30, 0xFD, 0xEF, 0x54, 0xCF, 0x4D, 0xFF, ++0x90, 0xA2, 0x1A, 0xF0, 0xEE, 0x54, 0x40, 0xFE, 0xEF, 0x54, 0xBF, 0x4E, 0xF0, 0x90, 0x00, 0x02, ++0x12, 0x06, 0xA2, 0x90, 0xA2, 0x1B, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0x90, 0xA2, 0x1C, ++0xF0, 0x90, 0x00, 0x04, 0x12, 0x06, 0xA2, 0x90, 0xA2, 0x1D, 0xF0, 0x90, 0xA2, 0x1B, 0xE0, 0xFF, ++0x7E, 0x00, 0x7C, 0x01, 0x7D, 0x40, 0x12, 0x07, 0x03, 0xEF, 0x78, 0x05, 0xCE, 0xC3, 0x13, 0xCE, ++0x13, 0xD8, 0xF9, 0xFF, 0x90, 0xA2, 0x23, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA2, 0x1C, 0xE0, ++0xFF, 0x7E, 0x00, 0x7C, 0x01, 0x7D, 0x40, 0x12, 0x07, 0x03, 0xEF, 0x78, 0x05, 0xCE, 0xC3, 0x13, ++0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0xA2, 0x25, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA2, 0x1D, ++0xE0, 0xFF, 0x7E, 0x00, 0x7C, 0x01, 0x7D, 0x40, 0x12, 0x07, 0x03, 0x90, 0xA2, 0x27, 0xEE, 0xF0, ++0xA3, 0xEF, 0xF0, 0x90, 0xA2, 0x19, 0xE0, 0x30, 0xE0, 0x17, 0x90, 0xA2, 0x1E, 0x74, 0x01, 0xF0, ++0xA3, 0xF0, 0xA3, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x07, 0x83, 0xE0, 0x44, 0x20, 0xF0, ++0x22, 0xE4, 0x90, 0xA2, 0x1E, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x07, ++0x83, 0xE0, 0x54, 0xDF, 0xF0, 0x22, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xBE, 0x90, 0xA2, 0xEB, 0x12, ++0x45, 0xB5, 0x12, 0x06, 0x89, 0x90, 0xA2, 0x29, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0x90, ++0xA2, 0x2A, 0xF0, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x7D, 0x02, 0x7F, 0x38, 0x02, 0x5E, 0x9D, ++0x12, 0x06, 0x89, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0xA1, 0xF2, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, ++0xE0, 0xC3, 0x13, 0xFF, 0x54, 0x01, 0x90, 0x01, 0xE6, 0xF0, 0xA3, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, ++0x30, 0xE0, 0x37, 0x12, 0x46, 0xC6, 0xEF, 0x54, 0x0F, 0x64, 0x04, 0x70, 0x25, 0x90, 0xA2, 0x13, ++0xE0, 0x30, 0xE0, 0x02, 0x80, 0x24, 0x90, 0xFD, 0x62, 0xE0, 0xB4, 0xAD, 0x13, 0xA3, 0xE0, 0xB4, ++0x35, 0x0E, 0x90, 0x01, 0xE7, 0xE0, 0x54, 0xFE, 0xF0, 0x90, 0x01, 0xE5, 0x74, 0xDF, 0xF0, 0x22, ++0x80, 0x00, 0x90, 0x01, 0xE7, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0x01, 0xE7, 0xE0, 0x54, 0xFE, ++0xF0, 0x22, 0x12, 0x06, 0x89, 0x54, 0x01, 0x25, 0xE0, 0x25, 0xE0, 0xFF, 0x90, 0xA1, 0xF2, 0xE0, ++0x54, 0xFB, 0x4F, 0xF0, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x08, 0x90, 0x07, 0x65, 0xE0, ++0x44, 0x18, 0xF0, 0x22, 0x90, 0xA2, 0x13, 0xE0, 0x20, 0xE0, 0x07, 0x90, 0x07, 0x65, 0xE0, 0x54, ++0xE7, 0xF0, 0x22, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0xA3, 0xF6, 0xF0, 0x90, 0xA3, 0xF6, ++0xE0, 0xFD, 0x70, 0x02, 0x81, 0x52, 0x90, 0x9F, 0xF3, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, ++0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x9F, 0xF4, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, ++0x02, 0x7F, 0x00, 0xEF, 0x60, 0x08, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0xA3, ++0xEB, 0xE0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, ++0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0x81, 0x2F, 0xE4, 0x90, 0xA3, 0xF7, 0xF0, 0x90, ++0xA3, 0xF7, 0xE0, 0xF9, 0xC3, 0x94, 0x04, 0x50, 0x73, 0x90, 0xA3, 0xEB, 0xE0, 0x75, 0xF0, 0x04, ++0xA4, 0xFF, 0xE9, 0xFD, 0x7C, 0x00, 0x2F, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, 0xD0, 0x2F, 0xF5, ++0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x9F, 0xF4, 0xE0, 0x75, 0xF0, 0x08, 0x90, ++0x9F, 0xA3, 0x12, 0x45, 0xA9, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xEF, ++0xF0, 0x90, 0xA3, 0xEB, 0xE0, 0x75, 0xF0, 0x04, 0xA4, 0x2D, 0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x74, ++0xF0, 0x2F, 0xF5, 0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x9F, 0xF4, 0xE0, 0x75, ++0xF0, 0x08, 0x90, 0x9F, 0xA7, 0x12, 0x45, 0xA9, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE4, 0x35, 0x83, ++0xF5, 0x83, 0xEF, 0xF0, 0x90, 0xA3, 0xF7, 0xE0, 0x04, 0xF0, 0x80, 0x83, 0x90, 0xA3, 0xF6, 0xE0, ++0xFF, 0x90, 0xA3, 0xEB, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, ++0xFC, 0xF4, 0x5F, 0x90, 0xA3, 0xF6, 0xF0, 0x90, 0xA3, 0xEB, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, ++0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, 0xA3, 0xEB, 0xE0, 0x04, ++0xF0, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0x9F, 0xF4, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, ++0x02, 0x7F, 0x01, 0xEF, 0x70, 0x02, 0x61, 0x0D, 0xE4, 0x90, 0x9F, 0xF4, 0xF0, 0x61, 0x0D, 0x90, ++0x01, 0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0xA3, 0xEB, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0xF0, ++0x90, 0xA3, 0xEB, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD0, 0x12, 0x45, 0xA9, 0xE0, 0x90, 0x01, ++0xC3, 0xF0, 0x22, 0xE4, 0x90, 0xA0, 0x8B, 0xF0, 0xA3, 0xF0, 0x90, 0x9F, 0xF3, 0xF0, 0xA3, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0xC8, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, ++0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0xA3, 0xC8, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, ++0xE0, 0x60, 0x2D, 0xC3, 0x90, 0xA3, 0xCB, 0xE0, 0x94, 0xE8, 0x90, 0xA3, 0xCA, 0xE0, 0x94, 0x03, ++0x40, 0x0B, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x00, 0x80, 0x15, 0x90, 0xA3, 0xCA, ++0xE4, 0x75, 0xF0, 0x01, 0x12, 0x08, 0xD6, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x3E, 0x50, 0x80, 0xC5, ++0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xFC, 0xED, 0x2C, 0x24, 0x00, 0xF5, 0x82, 0xE4, ++0x34, 0xFB, 0xF5, 0x83, 0xE4, 0xF0, 0x0C, 0xEC, 0xB4, 0x18, 0xEE, 0x74, 0x00, 0x2D, 0xF5, 0x82, ++0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xEF, 0xF0, 0xEE, 0x54, 0x3F, 0xFF, 0x74, 0x01, 0x2D, 0xF5, 0x82, ++0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x02, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, ++0x83, 0xE0, 0x54, 0xF0, 0xF0, 0x74, 0x03, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, ++0x44, 0x80, 0xF0, 0x74, 0x0B, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x44, 0x10, ++0xF0, 0x22, 0x90, 0xA3, 0xCC, 0xEF, 0xF0, 0xA3, 0x12, 0x45, 0xBE, 0x90, 0xA3, 0xEC, 0xE0, 0xFE, ++0x04, 0xF0, 0x90, 0x00, 0x01, 0xEE, 0x12, 0x06, 0xE1, 0x74, 0x00, 0x2F, 0xF9, 0xE4, 0x34, 0xFB, ++0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0xA3, 0xCD, 0x12, 0x45, 0xB5, 0x8B, ++0x40, 0x8A, 0x41, 0x89, 0x42, 0x75, 0x43, 0x02, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x35, ++0x26, 0x90, 0xA3, 0xCC, 0xE0, 0x24, 0x02, 0xF9, 0xE4, 0x34, 0xFB, 0xFA, 0x7B, 0x01, 0xC0, 0x03, ++0xC0, 0x02, 0xC0, 0x01, 0xA3, 0x12, 0x45, 0xB5, 0xE9, 0x24, 0x02, 0xF9, 0xE4, 0x3A, 0x8B, 0x40, ++0xF5, 0x41, 0x89, 0x42, 0x90, 0xA3, 0xCD, 0x12, 0x45, 0xB5, 0x90, 0x00, 0x0E, 0x12, 0x06, 0xA2, ++0xF5, 0x43, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x02, 0x35, 0x26, 0x7B, 0x01, 0x7A, 0xA2, 0x79, ++0xEB, 0x7F, 0xF5, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x06, 0x90, 0xA2, 0xEB, 0xE0, 0xA3, ++0xF0, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xEB, 0x7F, 0xF6, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, ++0x08, 0x90, 0xA2, 0xEB, 0xE0, 0x90, 0xA2, 0xED, 0xF0, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xEB, 0x7F, ++0xF4, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x08, 0x90, 0xA2, 0xEB, 0xE0, 0x90, 0xA2, 0xEE, ++0xF0, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xEB, 0x7F, 0xF3, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, ++0x08, 0x90, 0xA2, 0xEB, 0xE0, 0x90, 0xA2, 0xEF, 0xF0, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xEB, 0x7F, ++0xF2, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x08, 0x90, 0xA2, 0xEB, 0xE0, 0x90, 0xA2, 0xF0, ++0xF0, 0x90, 0xA2, 0xEC, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0xA2, ++0xF4, 0xF0, 0x90, 0xA2, 0xF0, 0xE0, 0x90, 0xA2, 0xF5, 0xF0, 0x02, 0x6F, 0x0E, 0x90, 0xA3, 0xED, ++0x12, 0x45, 0xBE, 0xE4, 0xFF, 0x90, 0xA3, 0xED, 0x12, 0x45, 0xB5, 0x8F, 0x82, 0x75, 0x83, 0x00, ++0x12, 0x06, 0xA2, 0xFE, 0x74, 0xF0, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83, 0xEE, 0xF0, ++0x0F, 0xEF, 0xB4, 0x10, 0xE0, 0x22, 0x90, 0x00, 0xF1, 0xE0, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, ++0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22, 0x90, 0x01, ++0x01, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0, 0xF0, 0x7F, 0x0A, 0x7E, 0x00, ++0x12, 0x3E, 0x50, 0x90, 0x01, 0x99, 0xE0, 0x44, 0xC0, 0xF0, 0x90, 0x01, 0x9B, 0x74, 0x80, 0xF0, ++0x22, 0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0, 0x44, 0x0B, 0xF0, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x3E, ++0x50, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xC0, 0x7F, 0x00, 0xB4, 0x40, 0x02, 0x7F, 0x01, 0x22, 0xE4, ++0x90, 0xA2, 0xDB, 0xF0, 0xA3, 0xF0, 0xD1, 0x81, 0xEF, 0x64, 0x01, 0x60, 0x45, 0xC3, 0x90, 0xA2, ++0xDC, 0xE0, 0x94, 0x88, 0x90, 0xA2, 0xDB, 0xE0, 0x94, 0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, ++0x44, 0x10, 0xF0, 0x90, 0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x27, 0x90, 0xA2, 0xDB, 0xE4, 0x75, ++0xF0, 0x01, 0x12, 0x08, 0xD6, 0x7F, 0x14, 0x7E, 0x00, 0x12, 0x3E, 0x50, 0xD3, 0x90, 0xA2, 0xDC, ++0xE0, 0x94, 0x32, 0x90, 0xA2, 0xDB, 0xE0, 0x94, 0x00, 0x40, 0xBB, 0x90, 0x01, 0xC6, 0xE0, 0x30, ++0xE3, 0xB4, 0x90, 0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0x7D, 0x02, 0x90, 0x01, 0xC4, 0x74, 0xF9, ++0xF0, 0x74, 0x9E, 0xA3, 0xF0, 0x90, 0xA2, 0x2B, 0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50, 0x10, 0xED, ++0x25, 0xE0, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE4, 0x03, 0x7F, 0x00, 0x22, 0x0D, 0x80, 0xE6, 0x7F, ++0x01, 0x22, 0xE4, 0x90, 0x9F, 0x97, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, ++0x90, 0x01, 0xE4, 0x74, 0x17, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x22, 0x90, 0x01, 0x34, 0xE0, 0x55, ++0x15, 0xF5, 0x19, 0xA3, 0xE0, 0x55, 0x16, 0xF5, 0x1A, 0xA3, 0xE0, 0x55, 0x17, 0xF5, 0x1B, 0xA3, ++0xE0, 0x55, 0x18, 0xF5, 0x1C, 0x90, 0x01, 0x34, 0xE5, 0x19, 0xF0, 0xA3, 0xE5, 0x1A, 0xF0, 0xA3, ++0xE5, 0x1B, 0xF0, 0xA3, 0xE5, 0x1C, 0xF0, 0x22, 0x90, 0x01, 0x3C, 0xE0, 0x55, 0x1D, 0xF5, 0x21, ++0xA3, 0xE0, 0x55, 0x1E, 0xF5, 0x22, 0xA3, 0xE0, 0x55, 0x1F, 0xF5, 0x23, 0xA3, 0xE0, 0x55, 0x20, ++0xF5, 0x24, 0x90, 0x01, 0x3C, 0xE5, 0x21, 0xF0, 0xA3, 0xE5, 0x22, 0xF0, 0xA3, 0xE5, 0x23, 0xF0, ++0xA3, 0xE5, 0x24, 0xF0, 0x53, 0x91, 0xDF, 0x22, 0x90, 0xA1, 0x11, 0xE0, 0x30, 0xE0, 0x05, 0xE4, ++0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0xA0, 0x90, 0xE0, 0x64, 0x01, 0x70, 0x20, 0x90, 0xA1, 0x1A, ++0xE0, 0x60, 0x1A, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0xE4, 0x90, ++0xA3, 0xAE, 0xF0, 0x90, 0xA1, 0xBA, 0xE0, 0x90, 0xA3, 0xAF, 0x12, 0x48, 0x21, 0x22, 0x90, 0xA0, ++0x90, 0xE0, 0x64, 0x01, 0x70, 0x26, 0x90, 0xA1, 0x1A, 0xE0, 0x60, 0x20, 0x90, 0x01, 0x57, 0xE4, ++0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0xA1, ++0x1E, 0xE0, 0x54, 0xFD, 0xF0, 0x54, 0x07, 0x70, 0x03, 0x12, 0x58, 0x4D, 0x22, 0x90, 0xA0, 0x90, ++0xE0, 0xB4, 0x01, 0x14, 0x90, 0xA1, 0x1A, 0xE0, 0x60, 0x0E, 0x90, 0xA1, 0x1E, 0xE0, 0x54, 0xFE, ++0xF0, 0x54, 0x07, 0x70, 0x03, 0x12, 0x58, 0x4D, 0x22, 0x90, 0xA1, 0x1A, 0xE0, 0x60, 0x02, 0x11, ++0x24, 0x02, 0x48, 0x5B, 0x90, 0xA1, 0x16, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x11, ++0xEF, 0x54, 0xFB, 0xF0, 0x90, 0xA1, 0x1E, 0xE0, 0x54, 0xFD, 0xF0, 0x54, 0x07, 0x70, 0x2E, 0x80, ++0x29, 0x90, 0xA1, 0x23, 0xE0, 0x04, 0xF0, 0x90, 0xA1, 0x1E, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0xA1, ++0xB9, 0xE0, 0xFF, 0x90, 0xA1, 0x23, 0xE0, 0xD3, 0x9F, 0x40, 0x0F, 0x90, 0xA0, 0x90, 0xE0, 0xB4, ++0x01, 0x0B, 0x90, 0xA1, 0x17, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x12, 0x58, 0x4D, 0x22, 0x90, 0xA1, ++0x16, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x2E, 0xEF, 0x54, 0xBF, 0xF0, 0x90, ++0x04, 0xE0, 0xE0, 0x90, 0xA1, 0x17, 0x30, 0xE0, 0x06, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x04, 0xE0, ++0x54, 0xFE, 0xF0, 0x90, 0xA1, 0xD3, 0xE0, 0xFF, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x07, 0x7D, ++0x01, 0x7F, 0x0C, 0x02, 0x56, 0x56, 0x12, 0x58, 0x4D, 0x22, 0x90, 0xA1, 0x16, 0xE0, 0xFF, 0xC4, ++0x13, 0x13, 0x13, 0x54, 0x01, 0x30, 0xE0, 0x21, 0xEF, 0x54, 0x7F, 0xF0, 0x90, 0x04, 0xE0, 0xE0, ++0x90, 0xA1, 0x17, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFD, 0xF0, ++0x90, 0xA1, 0x1A, 0xE0, 0x60, 0x03, 0x12, 0x58, 0x4D, 0x90, 0xA1, 0xD1, 0xE0, 0xFF, 0xC4, 0x13, ++0x13, 0x54, 0x03, 0x30, 0xE0, 0x22, 0x90, 0xA1, 0xD4, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x18, ++0xEF, 0x54, 0xFD, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, 0xA1, 0xD4, 0x30, 0xE1, 0x06, 0xE0, 0x44, ++0x04, 0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x30, 0xE1, 0x02, 0x31, ++0x12, 0x22, 0x90, 0xA2, 0x2C, 0xE0, 0x30, 0xE0, 0x35, 0xC3, 0x13, 0x54, 0x07, 0xFF, 0x75, 0xF0, ++0x0D, 0x90, 0xA2, 0x37, 0x12, 0x45, 0xA9, 0xE0, 0xFE, 0x30, 0xE0, 0x22, 0x75, 0xF0, 0x0D, 0xEF, ++0x90, 0xA2, 0x37, 0x12, 0x45, 0xA9, 0xEE, 0x54, 0xFE, 0xF0, 0x90, 0xA2, 0x2E, 0x74, 0x05, 0xF0, ++0x90, 0xA2, 0x2C, 0xE0, 0xC3, 0x13, 0x54, 0x07, 0xFD, 0x7F, 0x01, 0x12, 0x4D, 0x68, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1A, 0x90, 0x05, 0x22, 0xE0, ++0x54, 0x90, 0x60, 0x07, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x01, 0xC6, 0xE0, 0x30, ++0xE1, 0xE4, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xFF, 0xE4, ++0xFE, 0x74, 0x16, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xE0, 0x54, 0xFE, 0xF0, 0x75, ++0xF0, 0x10, 0xEF, 0x90, 0x81, 0x00, 0xBE, 0x03, 0x12, 0x12, 0x45, 0xA9, 0xE5, 0x82, 0x2E, 0xF5, ++0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0x74, 0x80, 0xF0, 0x80, 0x0F, 0x12, 0x45, 0xA9, 0xE5, 0x82, ++0x2E, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xE4, 0xF0, 0x75, 0xF0, 0x08, 0xEF, 0x90, 0x89, ++0x00, 0x12, 0x45, 0xA9, 0xE5, 0x82, 0x2E, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xE4, 0xF0, ++0x0E, 0xBE, 0x10, 0xAD, 0x0F, 0xBF, 0x80, 0xA7, 0xE4, 0x90, 0xAD, 0xE2, 0xF0, 0x90, 0x94, 0x91, ++0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0xE4, 0xFF, 0xE4, 0xFE, 0x75, 0xF0, 0x0A, 0xEF, 0x90, ++0x8D, 0x01, 0x12, 0x45, 0xA9, 0x75, 0xF0, 0x02, 0xEE, 0x12, 0x45, 0xA9, 0xE4, 0xF0, 0xA3, 0xF0, ++0x0E, 0xBE, 0x05, 0xE7, 0x74, 0x16, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x9E, 0xF5, 0x83, 0x74, 0x13, ++0xF0, 0x74, 0x96, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x9A, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x01, 0x2F, ++0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0x74, 0xC0, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x01, 0xF5, ++0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x74, 0x16, 0x2F, 0xF5, 0x82, 0xE4, ++0x34, 0x98, 0xF5, 0x83, 0xE4, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x16, 0xF5, 0x82, 0xE4, 0x34, 0x9B, ++0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x16, 0xF5, 0x82, 0xE4, 0x34, 0x9C, ++0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x04, 0xEF, 0x90, 0x96, 0x16, 0x12, 0x45, 0xA9, ++0x74, 0x13, 0xF0, 0x75, 0xF0, 0x04, 0xEF, 0x90, 0x96, 0x17, 0x12, 0x45, 0xA9, 0xE4, 0xF0, 0x75, ++0xF0, 0x04, 0xEF, 0x90, 0x96, 0x18, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0xE0, 0x44, 0x09, 0xF0, 0x75, ++0xF0, 0x04, 0xEF, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0xF3, 0xF0, 0x75, 0xF0, 0x04, ++0xEF, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0xFC, 0xF0, 0x75, 0xF0, 0x04, 0xEF, 0x90, ++0x96, 0x18, 0x12, 0x45, 0xA9, 0xE0, 0x44, 0x20, 0xF0, 0x75, 0xF0, 0x04, 0xEF, 0x90, 0x96, 0x19, ++0x12, 0x45, 0xA9, 0xE0, 0x54, 0xCF, 0xF0, 0x75, 0xF0, 0x04, 0xEF, 0x90, 0x96, 0x19, 0x12, 0x45, ++0xA9, 0xE0, 0x44, 0x40, 0xF0, 0x75, 0xF0, 0x04, 0xEF, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, ++0x54, 0x7F, 0xF0, 0x75, 0xF0, 0x04, 0xEF, 0x90, 0x96, 0x17, 0x12, 0x45, 0xA9, 0xE0, 0xFE, 0x75, ++0xF0, 0x10, 0xEF, 0x90, 0x81, 0x00, 0x12, 0x45, 0xA9, 0xEE, 0xF0, 0x74, 0x16, 0x2F, 0xF5, 0x82, ++0xE4, 0x34, 0x99, 0xF5, 0x83, 0xE4, 0xF0, 0x0F, 0xEF, 0x64, 0x80, 0x60, 0x02, 0x21, 0xE9, 0x74, ++0x96, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x98, 0xF5, 0x83, 0x74, 0xFF, 0xF0, 0x22, 0x90, 0xA3, 0x36, ++0xEB, 0xF0, 0x70, 0x6C, 0x90, 0xA3, 0x36, 0xE0, 0xFE, 0x24, 0x96, 0xF5, 0x82, 0xE4, 0x34, 0x98, ++0xF5, 0x83, 0xE0, 0xFC, 0x90, 0xA3, 0x37, 0xE0, 0xFB, 0xEC, 0x6B, 0x60, 0x53, 0x90, 0xA3, 0x3B, ++0xEB, 0xF0, 0xA3, 0xEE, 0xF0, 0xAE, 0x05, 0xEE, 0x25, 0xE0, 0x4F, 0xFF, 0x90, 0x9F, 0x96, 0xE0, ++0xFE, 0x25, 0xE0, 0x25, 0xE0, 0x4F, 0x90, 0xA3, 0x3D, 0xF0, 0x90, 0xA3, 0x38, 0xE0, 0x90, 0xA3, ++0x3F, 0xF0, 0x90, 0xA3, 0x39, 0x74, 0x0C, 0xF0, 0x90, 0xA3, 0x47, 0x74, 0x04, 0xF0, 0x7B, 0x01, ++0x7A, 0xA3, 0x79, 0x39, 0x12, 0x6F, 0xEA, 0x7F, 0x04, 0x12, 0x6C, 0xE0, 0x90, 0xA3, 0x37, 0xE0, ++0xFF, 0x90, 0xA3, 0x36, 0xE0, 0x24, 0x96, 0xF5, 0x82, 0xE4, 0x34, 0x98, 0xF5, 0x83, 0xEF, 0xF0, ++0x22, 0xE4, 0xF5, 0x5E, 0x74, 0x96, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0xE0, 0xFE, ++0xB4, 0x02, 0x08, 0xED, 0xC3, 0x94, 0x11, 0x40, 0x29, 0x80, 0x1F, 0xEE, 0xB4, 0x01, 0x08, 0xED, ++0xC3, 0x94, 0x0A, 0x40, 0x1D, 0x80, 0x13, 0x74, 0x96, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, ++0x83, 0xE0, 0x70, 0x0B, 0xED, 0xC3, 0x94, 0x03, 0x40, 0x08, 0x75, 0x5E, 0x01, 0x80, 0x03, 0xE4, ++0xF5, 0x5E, 0xAF, 0x5E, 0x22, 0x8F, 0x52, 0x8D, 0x53, 0x8B, 0x54, 0x75, 0xF0, 0x04, 0xEF, 0x90, ++0x96, 0x17, 0x12, 0x45, 0xA9, 0xE0, 0xFF, 0x75, 0xF0, 0x04, 0xE5, 0x52, 0x90, 0x96, 0x16, 0x12, ++0x45, 0xA9, 0xE0, 0xFD, 0x2F, 0xFF, 0xE4, 0x33, 0xA2, 0xE7, 0x13, 0xEF, 0x13, 0x90, 0xA2, 0xEE, ++0xF0, 0xE5, 0x53, 0xD3, 0x94, 0x2D, 0x40, 0x02, 0x80, 0x19, 0xE5, 0x53, 0xD3, 0x94, 0x19, 0x40, ++0x05, 0x90, 0xA2, 0xEE, 0x80, 0x0B, 0x75, 0xF0, 0x04, 0xE5, 0x52, 0x90, 0x96, 0x17, 0x12, 0x45, ++0xA9, 0xE0, 0xFD, 0x85, 0x54, 0x6A, 0xE4, 0xFB, 0xAF, 0x52, 0x02, 0x77, 0x11, 0x90, 0xA2, 0xEB, ++0x12, 0x45, 0xBE, 0x12, 0x06, 0x89, 0xF5, 0x51, 0x24, 0x16, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, ++0x83, 0xE0, 0x54, 0x9C, 0xF0, 0x74, 0x16, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, ++0xC0, 0x83, 0xC0, 0x82, 0xE0, 0xFF, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x90, 0x00, 0x03, 0x12, ++0x06, 0xA2, 0x54, 0x01, 0xFE, 0xEF, 0x4E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x74, 0x16, 0x25, 0x51, ++0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xC0, 0x83, 0xC0, 0x82, 0xE0, 0xFF, 0x90, 0xA2, 0xEB, ++0x12, 0x45, 0xB5, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0x54, 0x02, 0xFE, 0xEF, 0x4E, 0xD0, 0x82, ++0xD0, 0x83, 0xF0, 0x74, 0x16, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xC0, 0x83, ++0xC0, 0x82, 0xE0, 0xFF, 0x90, 0xA2, 0xEB, 0x12, 0x45, 0xB5, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, ++0x54, 0x40, 0xFE, 0xEF, 0x4E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x74, 0x16, 0x25, 0x51, 0xF5, 0x82, ++0xE4, 0x34, 0x99, 0xF5, 0x83, 0xC0, 0x83, 0xC0, 0x82, 0xE0, 0xFF, 0x90, 0xA2, 0xEB, 0x12, 0x45, ++0xB5, 0x90, 0x00, 0x03, 0x12, 0x06, 0xA2, 0x54, 0x20, 0xFE, 0xEF, 0x4E, 0xD0, 0x82, 0xD0, 0x83, ++0xF0, 0xE5, 0x51, 0xC3, 0x94, 0x80, 0x50, 0x16, 0x90, 0x00, 0x02, 0x12, 0x06, 0xA2, 0xFF, 0x74, ++0x96, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xEF, 0xF0, 0x80, 0x0F, 0xE5, 0x51, ++0xB4, 0x80, 0x0A, 0x90, 0x00, 0x02, 0x12, 0x06, 0xA2, 0x90, 0x95, 0x95, 0xF0, 0x74, 0x16, 0x25, ++0x51, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xE0, 0x30, 0xE5, 0x22, 0x75, 0xF0, 0x04, 0xE5, ++0x51, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0x13, 0x13, 0x54, 0x03, 0xFB, 0x74, 0x96, 0x25, ++0x51, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xE0, 0xFD, 0xAF, 0x51, 0x71, 0xD5, 0x22, 0xAB, ++0x07, 0x75, 0xF0, 0x10, 0xEB, 0x90, 0x81, 0x00, 0x12, 0x45, 0xA9, 0xE0, 0xF5, 0x5E, 0xE4, 0xF5, ++0x62, 0xE5, 0x5E, 0x54, 0x7F, 0xF9, 0xE5, 0x5E, 0x54, 0x80, 0xFA, 0x75, 0xF0, 0x04, 0xEB, 0x90, ++0x96, 0x16, 0x12, 0x45, 0xA9, 0xE0, 0xF5, 0x60, 0x75, 0xF0, 0x04, 0xEB, 0x90, 0x96, 0x19, 0x12, ++0x45, 0xA9, 0xE0, 0xFF, 0xC4, 0x54, 0x03, 0xF5, 0x61, 0xE9, 0x25, 0xE0, 0x25, 0xE0, 0x24, 0x73, ++0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0x12, 0x45, 0x7D, 0xEB, 0x25, 0xE0, 0x24, 0x95, 0xF5, ++0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE5, 0x5E, 0x4A, 0xFF, 0x74, ++0x16, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0x9F, 0xF5, 0x83, 0xEF, 0xF0, 0x75, 0xF0, 0x10, 0xEB, 0x90, ++0x81, 0x05, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0x03, 0xF5, 0x5F, 0x74, 0x16, 0x2B, 0xF5, 0x82, 0xE4, ++0x34, 0x9D, 0xF5, 0x83, 0xE5, 0x5F, 0xF0, 0xE9, 0x64, 0x2C, 0x70, 0x33, 0x75, 0xF0, 0x04, 0xEB, ++0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0xFF, 0x54, 0x03, 0xFE, 0xE5, 0x5F, 0xC3, 0x9E, 0x50, ++0x1E, 0x05, 0x5F, 0xE5, 0x5F, 0x54, 0x03, 0x25, 0xE0, 0x25, 0xE0, 0xFE, 0x75, 0xF0, 0x04, 0xEB, ++0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xEF, 0x54, 0xF3, 0x4E, 0xF0, 0x89, 0x5E, 0xC1, 0xC7, 0xE9, ++0xC3, 0x95, 0x60, 0x50, 0x6B, 0xE9, 0x04, 0xFD, 0xED, 0xD3, 0x95, 0x60, 0x40, 0x02, 0xC1, 0xC7, ++0xED, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xFF, 0x75, 0xF0, 0x08, 0xEB, 0x90, 0x89, 0x00, 0x12, 0x45, ++0xA9, 0xE5, 0x82, 0x2F, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xE0, 0xF5, 0x82, 0x75, 0x83, ++0x00, 0xED, 0x54, 0x07, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, ++0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x55, 0x83, 0xFE, 0xEF, 0x55, 0x82, 0x4E, 0x60, 0x1D, ++0xB9, 0x13, 0x14, 0x79, 0x18, 0x89, 0x5E, 0x74, 0x16, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, ++0x83, 0xE0, 0x44, 0x04, 0xF0, 0x80, 0x60, 0xA9, 0x05, 0x89, 0x5E, 0x80, 0x5A, 0x0D, 0x80, 0x98, ++0xE9, 0x65, 0x60, 0x70, 0x43, 0x75, 0xF0, 0x04, 0xEB, 0x90, 0x96, 0x18, 0x12, 0x45, 0xA9, 0xE0, ++0xFF, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x0C, 0xE5, 0x5E, 0x20, 0xE7, 0x07, 0xE9, 0x44, 0x80, ++0xF5, 0x5E, 0x80, 0x33, 0xE9, 0x25, 0xE0, 0x25, 0xE0, 0x24, 0x73, 0xF5, 0x82, 0xE4, 0x34, 0x41, ++0xF5, 0x83, 0x12, 0x45, 0x7D, 0xEB, 0x25, 0xE0, 0x24, 0x95, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, ++0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x80, 0x0F, 0x74, 0x16, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0x9F, ++0xF5, 0x83, 0xE5, 0x60, 0xF0, 0xF5, 0x5E, 0xAF, 0x03, 0x85, 0x5F, 0x6A, 0x7B, 0x01, 0xAD, 0x5E, ++0x02, 0x77, 0x11, 0xAA, 0x07, 0xAB, 0x05, 0x75, 0xF0, 0x10, 0xEA, 0x90, 0x81, 0x00, 0x12, 0x45, ++0xA9, 0xE0, 0xF5, 0x5E, 0x54, 0x7F, 0xF5, 0x60, 0x75, 0xF0, 0x04, 0xEA, 0x90, 0x96, 0x17, 0x12, ++0x45, 0xA9, 0xE0, 0x90, 0xA2, 0xFB, 0xF0, 0x75, 0xF0, 0x04, 0xEA, 0x90, 0x96, 0x16, 0x12, 0x45, ++0xA9, 0xE0, 0xFF, 0x75, 0xF0, 0x10, 0xEA, 0x90, 0x81, 0x05, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0x03, ++0xF5, 0x5F, 0xE5, 0x60, 0x25, 0xE0, 0x24, 0xC3, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, ++0x93, 0xFC, 0x74, 0x01, 0x93, 0xFD, 0xEA, 0x25, 0xE0, 0x24, 0x95, 0xF5, 0x82, 0xE4, 0x34, 0x94, ++0xF5, 0x83, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x75, 0xF0, 0x04, 0xEA, 0x90, 0x96, 0x19, 0x12, 0x45, ++0xA9, 0xE0, 0xFE, 0xC4, 0x54, 0x03, 0x90, 0xA2, 0xF9, 0xF0, 0x74, 0x16, 0x2A, 0xF5, 0x82, 0xE4, ++0x34, 0x9F, 0xF5, 0x83, 0xE5, 0x60, 0xF0, 0x74, 0x16, 0x2A, 0xF5, 0x82, 0xE4, 0x34, 0x9D, 0xF5, ++0x83, 0xE5, 0x5F, 0xF0, 0xE5, 0x60, 0xD3, 0x9F, 0x40, 0x04, 0x8F, 0x60, 0x8F, 0x5E, 0xEB, 0x70, ++0x03, 0x02, 0xA8, 0x51, 0xAF, 0x03, 0x8F, 0x61, 0xE5, 0x5E, 0x30, 0xE7, 0x05, 0x85, 0x60, 0x5E, ++0x15, 0x61, 0xE5, 0x61, 0x70, 0x03, 0x02, 0xA8, 0x51, 0xE5, 0x60, 0x64, 0x2C, 0x70, 0x2A, 0xE5, ++0x5F, 0xD3, 0x94, 0x00, 0x40, 0x23, 0xE5, 0x5F, 0xD3, 0x94, 0x02, 0x50, 0x1C, 0x15, 0x5F, 0xE5, ++0x5F, 0x54, 0x03, 0x25, 0xE0, 0x25, 0xE0, 0xFF, 0x75, 0xF0, 0x04, 0xEA, 0x90, 0x96, 0x19, 0x12, ++0x45, 0xA9, 0xE0, 0x54, 0xF3, 0x4F, 0xF0, 0x15, 0x61, 0xE5, 0x61, 0x70, 0x03, 0x02, 0xA8, 0x51, ++0x90, 0xA2, 0xFB, 0xE0, 0xFF, 0xE5, 0x60, 0xD3, 0x9F, 0x50, 0x03, 0x02, 0xA8, 0x4B, 0xE4, 0x90, ++0xA2, 0xFA, 0xF0, 0x85, 0x60, 0x5E, 0xAD, 0x5E, 0xE5, 0x60, 0x14, 0xFC, 0x90, 0xA2, 0xFB, 0xE0, ++0xFF, 0xEC, 0xC3, 0x9F, 0x40, 0x5F, 0xEC, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xFF, 0x75, 0xF0, 0x08, ++0xEA, 0x90, 0x89, 0x00, 0x12, 0x45, 0xA9, 0xE5, 0x82, 0x2F, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, ++0x83, 0xE0, 0xF5, 0x82, 0x75, 0x83, 0x00, 0xEC, 0x54, 0x07, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, ++0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x55, 0x83, 0xFE, ++0xEF, 0x55, 0x82, 0x4E, 0x60, 0x1C, 0xE5, 0x60, 0xAD, 0x04, 0xB4, 0x14, 0x02, 0x7D, 0x0C, 0x90, ++0xA2, 0xFA, 0xE0, 0x04, 0xF0, 0xE0, 0x65, 0x61, 0x60, 0x0B, 0xA3, 0xE0, 0xFF, 0xED, 0xD3, 0x9F, ++0x40, 0x03, 0x1C, 0x80, 0x97, 0xAF, 0x05, 0x8F, 0x5E, 0x80, 0x06, 0x90, 0xA2, 0xFB, 0xE0, 0xF5, ++0x5E, 0xAF, 0x02, 0x85, 0x5F, 0x6A, 0xE4, 0xFB, 0xAD, 0x5E, 0x02, 0x77, 0x11, 0xE4, 0xF5, 0x51, ++0x74, 0x90, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0xA0, 0xF5, 0x83, 0xE0, 0x70, 0x03, 0x02, 0xB0, ++0x52, 0x75, 0xF0, 0x04, 0xE5, 0x51, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0xFF, 0xC4, 0x13, ++0x13, 0x13, 0x54, 0x01, 0x30, 0xE0, 0x03, 0x02, 0xB0, 0x52, 0xE5, 0x51, 0x25, 0xE0, 0x24, 0x01, ++0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0xD3, 0x94, 0x00, 0xEE, 0x94, ++0x00, 0x50, 0x03, 0x02, 0xB0, 0x52, 0xE5, 0x51, 0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x01, 0xF9, 0x74, ++0x8D, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x90, 0xA2, 0xEA, 0x12, 0x45, 0xBE, 0xE5, 0x51, 0x25, 0xE0, ++0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x92, 0xF5, 0x83, 0xE0, 0xF5, 0x56, 0xA3, 0xE0, 0xF5, 0x57, ++0x74, 0x16, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x98, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0xA2, 0xED, ++0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x00, 0x02, 0x12, 0x07, 0xAB, 0xFF, 0xAE, 0xF0, 0x12, 0x07, ++0x80, 0x2F, 0xFF, 0xE5, 0xF0, 0x3E, 0xFE, 0x90, 0x00, 0x04, 0x12, 0x07, 0xAB, 0x2F, 0xFF, 0xEE, ++0x35, 0xF0, 0xFE, 0x90, 0x00, 0x06, 0x12, 0x07, 0xAB, 0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0xFE, 0x90, ++0x00, 0x08, 0x12, 0x07, 0xAB, 0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0xFE, 0x90, 0xA2, 0xEF, 0xF0, 0xA3, ++0xEF, 0xF0, 0x12, 0x07, 0x80, 0xFD, 0xC3, 0xEF, 0x9D, 0xFF, 0xEE, 0x95, 0xF0, 0x90, 0xA2, 0xF1, ++0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0xF0, 0x10, 0xE5, 0x51, 0x90, 0x81, 0x00, 0x12, 0x45, 0xA9, 0xE0, ++0xF5, 0x52, 0x54, 0x7F, 0xF5, 0x53, 0x75, 0xF0, 0x04, 0xE5, 0x51, 0x90, 0x96, 0x16, 0x12, 0x45, ++0xA9, 0xE0, 0x90, 0xA2, 0xF3, 0xF0, 0x75, 0xF0, 0x04, 0xE5, 0x51, 0x90, 0x96, 0x19, 0x12, 0x45, ++0xA9, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x03, 0x90, 0xA2, 0xF4, 0xF0, 0x74, 0x96, 0x25, 0x51, 0xF5, ++0x82, 0xE4, 0x34, 0x9D, 0xF5, 0x83, 0xE0, 0xC3, 0x94, 0x05, 0x40, 0x02, 0x81, 0x4B, 0x90, 0xA2, ++0xF3, 0xE0, 0xFF, 0xE5, 0x53, 0x9F, 0x40, 0x08, 0x8F, 0x53, 0x53, 0x52, 0x80, 0xEF, 0x42, 0x52, ++0xE5, 0x53, 0x90, 0x41, 0x5F, 0x93, 0xFF, 0x74, 0x96, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x99, ++0xF5, 0x83, 0xE0, 0xC3, 0x9F, 0xE5, 0x53, 0x40, 0x05, 0x90, 0x41, 0x37, 0x80, 0x03, 0x90, 0x41, ++0x4B, 0x93, 0xF5, 0x58, 0x90, 0xA2, 0x0E, 0xE0, 0x60, 0x7D, 0xE5, 0x53, 0x64, 0x13, 0x60, 0x05, ++0xE5, 0x53, 0xB4, 0x0B, 0x05, 0x90, 0xA2, 0x10, 0x80, 0x23, 0xE5, 0x53, 0x64, 0x12, 0x60, 0x05, ++0xE5, 0x53, 0xB4, 0x0A, 0x05, 0x90, 0xA2, 0x11, 0x80, 0x13, 0xE5, 0x53, 0x64, 0x11, 0x60, 0x05, ++0xE5, 0x53, 0xB4, 0x09, 0x05, 0x90, 0xA2, 0x12, 0x80, 0x03, 0x90, 0xA2, 0x0F, 0xE0, 0xF5, 0x5C, ++0xE5, 0x5C, 0xC3, 0x94, 0x80, 0x50, 0x28, 0xE5, 0x5C, 0x94, 0x1B, 0x40, 0x02, 0x80, 0x13, 0xE5, ++0x58, 0x25, 0x5C, 0xFF, 0xE4, 0x33, 0xFE, 0xD3, 0xEF, 0x94, 0x1B, 0xEE, 0x64, 0x80, 0x94, 0x80, ++0x40, 0x05, 0x75, 0x58, 0x1B, 0x80, 0x20, 0xE5, 0x5C, 0x25, 0x58, 0xF5, 0x58, 0x80, 0x18, 0xC3, ++0xE4, 0x95, 0x5C, 0xF5, 0x5C, 0xE5, 0x58, 0xD3, 0x95, 0x5C, 0x40, 0x08, 0xE5, 0x58, 0x95, 0x5C, ++0xF5, 0x58, 0x80, 0x03, 0xE4, 0xF5, 0x58, 0xE5, 0x58, 0x75, 0xF0, 0x06, 0xA4, 0x24, 0x95, 0xF9, ++0x74, 0x40, 0x35, 0xF0, 0xFA, 0x7B, 0xFF, 0x90, 0xA2, 0xE7, 0x12, 0x45, 0xBE, 0xC3, 0xE5, 0x57, ++0x94, 0x0F, 0xE5, 0x56, 0x94, 0x00, 0x50, 0x5E, 0x90, 0xA2, 0xEA, 0x12, 0x45, 0xB5, 0x90, 0x00, ++0x06, 0x12, 0x07, 0xAB, 0xFF, 0xAE, 0xF0, 0x90, 0x00, 0x08, 0x12, 0x07, 0xAB, 0x2F, 0xFD, 0xE5, ++0xF0, 0x3E, 0xFC, 0xE5, 0x56, 0xC3, 0x13, 0xFE, 0xE5, 0x57, 0x13, 0xFF, 0xD3, 0xED, 0x9F, 0xEC, ++0x9E, 0x40, 0x02, 0x81, 0x1C, 0xE5, 0x57, 0xAE, 0x56, 0x78, 0x02, 0xCE, 0xC3, 0x13, 0xCE, 0x13, ++0xD8, 0xF9, 0xFD, 0xAC, 0x06, 0xE5, 0x56, 0xC3, 0x13, 0xFE, 0xE5, 0x57, 0x13, 0x2D, 0xFF, 0xEE, ++0x3C, 0xFE, 0x90, 0xA2, 0xEA, 0x12, 0x45, 0xB5, 0x12, 0x07, 0x80, 0xD3, 0x9F, 0xE5, 0xF0, 0x9E, ++0x50, 0x02, 0x81, 0x23, 0x61, 0xFC, 0xE5, 0x51, 0x70, 0x50, 0x90, 0xA2, 0xEA, 0x12, 0x45, 0xB5, ++0x90, 0x00, 0x08, 0x12, 0x07, 0xAB, 0xFD, 0xAC, 0xF0, 0xE5, 0x56, 0xC3, 0x13, 0xFE, 0xE5, 0x57, ++0x13, 0xFF, 0xC3, 0xED, 0x9F, 0xEC, 0x9E, 0x50, 0x08, 0x90, 0x9F, 0x96, 0x74, 0x01, 0xF0, 0x80, ++0x29, 0xE5, 0x57, 0xAE, 0x56, 0x78, 0x03, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFB, 0xAA, ++0x06, 0xE5, 0x56, 0xC3, 0x13, 0xFE, 0xE5, 0x57, 0x13, 0x2B, 0xFF, 0xEE, 0x3A, 0xFE, 0xD3, 0xED, ++0x9F, 0xEC, 0x9E, 0x40, 0x05, 0xE4, 0x90, 0x9F, 0x96, 0xF0, 0xD3, 0xE5, 0x57, 0x94, 0xE8, 0xE5, ++0x56, 0x94, 0x03, 0x40, 0x05, 0x75, 0x59, 0x05, 0x80, 0x13, 0xD3, 0xE5, 0x57, 0x94, 0xC8, 0xE5, ++0x56, 0x94, 0x00, 0x40, 0x05, 0x75, 0x59, 0x02, 0x80, 0x03, 0xE4, 0xF5, 0x59, 0xE5, 0x51, 0x25, ++0xE0, 0x24, 0x95, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0xE0, 0xF5, 0x54, 0xA3, 0xE0, 0xF5, ++0x55, 0xE4, 0xF5, 0x5D, 0x90, 0xA2, 0xEA, 0x12, 0x45, 0xB5, 0x75, 0xF0, 0x02, 0xE5, 0x5D, 0xA4, ++0xF5, 0x82, 0x85, 0xF0, 0x83, 0x12, 0x07, 0xAB, 0xAE, 0xF0, 0xA8, 0x59, 0x08, 0x80, 0x05, 0xCE, ++0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0xA2, 0xE7, 0x12, 0x45, 0xB5, 0x85, 0x5D, 0x82, ++0x75, 0x83, 0x00, 0x12, 0x06, 0xA2, 0xFD, 0x7C, 0x00, 0x12, 0x07, 0x03, 0xEF, 0x25, 0x55, 0xF5, ++0x55, 0xEE, 0x35, 0x54, 0xF5, 0x54, 0x05, 0x5D, 0xE5, 0x5D, 0xB4, 0x05, 0xB7, 0x90, 0xA2, 0xE7, ++0x12, 0x45, 0xB5, 0x90, 0x00, 0x05, 0x12, 0x06, 0xA2, 0xFD, 0x7C, 0x00, 0xE5, 0x57, 0xAE, 0x56, ++0xA8, 0x59, 0x08, 0x80, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x12, 0x07, 0x03, ++0xD3, 0xE5, 0x55, 0x9F, 0xE5, 0x54, 0x9E, 0x40, 0x0C, 0xE5, 0x55, 0x9F, 0xF5, 0x55, 0xE5, 0x54, ++0x9E, 0xF5, 0x54, 0x80, 0x05, 0xE4, 0xF5, 0x54, 0xF5, 0x55, 0xE5, 0x51, 0x25, 0xE0, 0x24, 0x95, ++0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0xE5, 0x54, 0xF0, 0xA3, 0xE5, 0x55, 0xF0, 0xAE, 0x54, ++0xFF, 0xE4, 0xFC, 0xFD, 0xE5, 0x53, 0x25, 0xE0, 0x25, 0xE0, 0x24, 0x73, 0xF5, 0x82, 0xE4, 0x34, ++0x41, 0xF5, 0x83, 0x12, 0x45, 0x99, 0xC3, 0x12, 0x45, 0x60, 0x50, 0x07, 0xAF, 0x51, 0x12, 0xA5, ++0x3F, 0x80, 0x20, 0xE5, 0x53, 0x25, 0xE0, 0x24, 0xC3, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, ++0xD3, 0x74, 0x01, 0x93, 0x95, 0x55, 0xE4, 0x93, 0x95, 0x54, 0x40, 0x07, 0x7D, 0x01, 0xAF, 0x51, ++0x12, 0xA6, 0xD3, 0xE5, 0x51, 0x25, 0xE0, 0x24, 0x95, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, ++0xA3, 0xE0, 0x90, 0xA3, 0x38, 0xF0, 0x90, 0xA3, 0x37, 0xE5, 0x52, 0xF0, 0xAB, 0x51, 0xE4, 0xFD, ++0xFF, 0x12, 0xA3, 0x1D, 0xE4, 0xF5, 0x54, 0xF5, 0x55, 0xE1, 0x28, 0x74, 0x96, 0x25, 0x51, 0xF5, ++0x82, 0xE4, 0x34, 0x9D, 0xF5, 0x83, 0xE0, 0xFC, 0x64, 0x05, 0x60, 0x02, 0xA1, 0xBE, 0xAD, 0x53, ++0xAF, 0x51, 0x12, 0xA3, 0x91, 0x74, 0x16, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9A, 0xF5, 0x83, ++0xEF, 0xF0, 0x75, 0xF0, 0x10, 0xE5, 0x51, 0x90, 0x81, 0x01, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0x07, ++0xF5, 0x5B, 0x74, 0x96, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xE0, 0xFF, 0xC3, ++0x94, 0x30, 0x50, 0x11, 0xE4, 0xF5, 0x5B, 0x74, 0x96, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9D, ++0xF5, 0x83, 0xE4, 0xA1, 0x43, 0x74, 0x16, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9A, 0xF5, 0x83, ++0xE0, 0x64, 0x01, 0x60, 0x02, 0xA1, 0x6C, 0x74, 0x96, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9A, ++0xF5, 0x83, 0xE0, 0x64, 0x0A, 0x60, 0x4D, 0xEF, 0x24, 0x05, 0xFF, 0xE4, 0x33, 0xFE, 0x74, 0x01, ++0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0xE0, 0xFD, 0xD3, 0x9F, 0xEE, 0x64, 0x80, ++0xF8, 0x74, 0x80, 0x98, 0x50, 0x2E, 0xED, 0x24, 0x05, 0xFF, 0xE4, 0x33, 0xFE, 0x74, 0x96, 0x25, ++0x51, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xE0, 0xD3, 0x9F, 0xEE, 0x64, 0x80, 0xF8, 0x74, ++0x80, 0x98, 0x50, 0x10, 0x74, 0x16, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9E, 0xF5, 0x83, 0xE0, ++0x65, 0x53, 0x60, 0x3B, 0xE5, 0x5B, 0x70, 0x05, 0x75, 0x5B, 0x01, 0x80, 0x0D, 0xE5, 0x5B, 0xB4, ++0x01, 0x05, 0x75, 0x5B, 0x03, 0x80, 0x03, 0x75, 0x5B, 0x05, 0x74, 0x96, 0x25, 0x51, 0xF5, 0x82, ++0xE4, 0x34, 0x99, 0xF5, 0x83, 0xE0, 0xFF, 0x74, 0x01, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x94, ++0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x96, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9A, 0x80, 0x29, 0x74, ++0x96, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9D, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x96, 0x25, 0x51, ++0xF5, 0x82, 0xE4, 0x34, 0x9A, 0xF5, 0x83, 0xE0, 0x04, 0xF0, 0x80, 0x10, 0xE4, 0xF5, 0x5B, 0x74, ++0x96, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9D, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x16, 0x25, 0x51, ++0xF5, 0x82, 0xE4, 0x34, 0x9E, 0xF5, 0x83, 0xE5, 0x53, 0xF0, 0x75, 0xF0, 0x04, 0xE5, 0x51, 0x90, ++0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x02, 0xE1, 0x05, ++0x74, 0x96, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9A, 0xF5, 0x83, 0xE4, 0xF0, 0xF5, 0x5B, 0x74, ++0x96, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9D, 0xF5, 0x83, 0xE4, 0xF0, 0xE1, 0x05, 0xEC, 0x64, ++0x06, 0x60, 0x02, 0xE1, 0x28, 0xF5, 0x54, 0xF5, 0x55, 0x75, 0xF0, 0x10, 0xE5, 0x51, 0x90, 0x81, ++0x01, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0x07, 0xF5, 0x5B, 0xD3, 0xE5, 0x57, 0x94, 0xE8, 0xE5, 0x56, ++0x94, 0x03, 0x40, 0x05, 0x75, 0x59, 0x05, 0x80, 0x13, 0xD3, 0xE5, 0x57, 0x94, 0xFA, 0xE5, 0x56, ++0x94, 0x00, 0x40, 0x05, 0x75, 0x59, 0x02, 0x80, 0x03, 0xE4, 0xF5, 0x59, 0xE5, 0x57, 0xAE, 0x56, ++0xA8, 0x59, 0x08, 0x80, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0x42, 0x24, ++0xE4, 0x93, 0xFD, 0x7C, 0x00, 0x12, 0x07, 0x03, 0x90, 0xA2, 0xF6, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, ++0xE4, 0xF5, 0x5A, 0x90, 0xA2, 0xEA, 0x12, 0x45, 0xB5, 0x75, 0xF0, 0x02, 0xE5, 0x5A, 0xA4, 0xF5, ++0x82, 0x85, 0xF0, 0x83, 0x12, 0x07, 0xAB, 0xAE, 0xF0, 0xA8, 0x59, 0x08, 0x80, 0x05, 0xCE, 0xC3, ++0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0xE5, 0x5A, 0x90, 0x42, 0x1F, 0x93, 0xFD, 0x7C, 0x00, 0x12, ++0x07, 0x03, 0xEF, 0x25, 0x55, 0xF5, 0x55, 0xEE, 0x35, 0x54, 0xF5, 0x54, 0xC3, 0x90, 0xA2, 0xF7, ++0xE0, 0x95, 0x55, 0x90, 0xA2, 0xF6, 0xE0, 0x95, 0x54, 0x40, 0x07, 0x05, 0x5A, 0xE5, 0x5A, 0xB4, ++0x05, 0xB1, 0xE5, 0x5A, 0xC3, 0x13, 0xF5, 0x5A, 0xE5, 0x5B, 0x24, 0x01, 0xFF, 0xE4, 0x33, 0xA2, ++0xE7, 0x13, 0xEF, 0x13, 0xFF, 0xD3, 0x95, 0x5A, 0x40, 0x06, 0xEF, 0x95, 0x5A, 0xFF, 0x80, 0x02, ++0xE4, 0xFF, 0x74, 0x01, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0xC3, 0x13, ++0xFE, 0xEF, 0xC4, 0x33, 0x54, 0xE0, 0x2E, 0x04, 0xFE, 0x74, 0x01, 0x25, 0x51, 0xF5, 0x82, 0xE4, ++0x34, 0x93, 0xF5, 0x83, 0xEE, 0xF0, 0x74, 0x01, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, ++0x83, 0xE0, 0xC3, 0x94, 0xC0, 0x40, 0x0E, 0x74, 0x01, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x93, ++0xF5, 0x83, 0x74, 0xC0, 0xF0, 0x74, 0x01, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, ++0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x25, 0xE0, 0xFF, 0x70, 0x04, 0xF5, 0x5B, 0x80, 0x04, 0xEF, ++0x14, 0xF5, 0x5B, 0xD3, 0x90, 0xA2, 0xEE, 0xE0, 0x94, 0x03, 0x90, 0xA2, 0xED, 0xE0, 0x94, 0x00, ++0x40, 0x03, 0xE4, 0xF5, 0x5B, 0x75, 0xF0, 0x10, 0xE5, 0x51, 0x90, 0x81, 0x01, 0x12, 0x45, 0xA9, ++0xE0, 0x54, 0xF8, 0x90, 0xA2, 0xF8, 0xF0, 0x45, 0x5B, 0xFF, 0xF0, 0x75, 0xF0, 0x10, 0xE5, 0x51, ++0x90, 0x81, 0x01, 0x12, 0x45, 0xA9, 0xEF, 0xF0, 0x74, 0x96, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, ++0x9D, 0xF5, 0x83, 0xE0, 0xD3, 0x94, 0x05, 0x74, 0x96, 0x50, 0x0E, 0x25, 0x51, 0xF5, 0x82, 0xE4, ++0x34, 0x9D, 0xF5, 0x83, 0xE0, 0x04, 0xF0, 0x80, 0x0B, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x9D, ++0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x81, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, ++0x64, 0x01, 0x60, 0x03, 0x02, 0xB0, 0x4B, 0x90, 0xA2, 0xED, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xC3, ++0x74, 0xFF, 0x9F, 0xFD, 0x74, 0xFF, 0x9E, 0xFC, 0xE5, 0x51, 0x25, 0xE0, 0x24, 0x16, 0xF5, 0x82, ++0xE4, 0x34, 0x9B, 0xF5, 0x83, 0xE0, 0xFA, 0xA3, 0xE0, 0xD3, 0x9D, 0xEA, 0x9C, 0xE5, 0x51, 0x50, ++0x13, 0x25, 0xE0, 0x24, 0x16, 0xF5, 0x82, 0xE4, 0x34, 0x9B, 0xF5, 0x83, 0xEE, 0x8F, 0xF0, 0x12, ++0x08, 0xD6, 0x80, 0x10, 0x25, 0xE0, 0x24, 0x16, 0xF5, 0x82, 0xE4, 0x34, 0x9B, 0xF5, 0x83, 0x74, ++0xFF, 0xF0, 0xA3, 0xF0, 0x90, 0xA2, 0xEF, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xC3, 0x74, 0xFF, 0x9F, ++0xFD, 0x74, 0xFF, 0x9E, 0xFC, 0xE5, 0x51, 0x25, 0xE0, 0x24, 0x16, 0xF5, 0x82, 0xE4, 0x34, 0x9C, ++0xF5, 0x83, 0xE0, 0xFA, 0xA3, 0xE0, 0xD3, 0x9D, 0xEA, 0x9C, 0xE5, 0x51, 0x50, 0x13, 0x25, 0xE0, ++0x24, 0x16, 0xF5, 0x82, 0xE4, 0x34, 0x9C, 0xF5, 0x83, 0xEE, 0x8F, 0xF0, 0x12, 0x08, 0xD6, 0x80, ++0x10, 0x25, 0xE0, 0x24, 0x16, 0xF5, 0x82, 0xE4, 0x34, 0x9C, 0xF5, 0x83, 0x74, 0xFF, 0xF0, 0xA3, ++0xF0, 0x90, 0xA2, 0xF1, 0xE0, 0xFE, 0xA3, 0xE0, 0xFB, 0xC3, 0x74, 0xFF, 0x9B, 0xFF, 0x74, 0xFF, ++0x9E, 0xFE, 0x74, 0xFF, 0x94, 0x00, 0xFD, 0x74, 0xFF, 0x94, 0x00, 0xFC, 0x90, 0x94, 0x91, 0x12, ++0x45, 0x8D, 0xD3, 0x12, 0x45, 0x60, 0x90, 0x94, 0x91, 0x50, 0x19, 0x12, 0x45, 0x8D, 0x90, 0xA2, ++0xF1, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0x12, 0x45, 0x39, 0x90, 0x94, 0x91, 0x12, ++0x08, 0x6D, 0x80, 0x07, 0x12, 0x08, 0x79, 0xFF, 0xFF, 0xFF, 0xFF, 0xE4, 0xFD, 0xAF, 0x51, 0x12, ++0x78, 0xC9, 0x05, 0x51, 0xE5, 0x51, 0xC3, 0x94, 0x80, 0x50, 0x03, 0x02, 0xA8, 0x60, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0xD4, 0xEF, 0xF0, 0x75, 0xF0, 0x04, 0x90, 0x96, ++0x18, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0x1F, 0xFB, 0x24, 0xF1, 0x50, 0x02, 0x21, 0x01, 0xE4, 0xF5, ++0x6B, 0x90, 0xA3, 0xD4, 0xE0, 0xFD, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x00, 0x12, 0x45, 0xA9, 0xE5, ++0x82, 0x25, 0x6B, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xE0, 0xFE, 0xEB, 0x75, 0xF0, 0x07, ++0xA4, 0x24, 0x56, 0xF5, 0x82, 0xE4, 0x34, 0x40, 0xF5, 0x83, 0xE5, 0x82, 0x25, 0x6B, 0xF5, 0x82, ++0xE4, 0x35, 0x83, 0xF5, 0x83, 0xE4, 0x93, 0xFC, 0xEE, 0x5C, 0x90, 0xA3, 0xD7, 0xF0, 0x75, 0xF0, ++0x04, 0xED, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0x03, 0xFF, 0xBF, 0x02, 0x0B, 0xE5, ++0x6B, 0x70, 0x07, 0x90, 0xA3, 0xD7, 0xE0, 0x54, 0xF0, 0xF0, 0x90, 0xA3, 0xD7, 0xE0, 0xFF, 0x90, ++0xA3, 0xD4, 0xE0, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x00, 0x12, 0x45, 0xA9, 0xE5, 0x82, 0x25, 0x6B, ++0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xEF, 0xF0, 0x05, 0x6B, 0xE5, 0x6B, 0x64, 0x07, 0x70, ++0x80, 0x90, 0xA3, 0xD4, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0xFF, ++0xC4, 0x54, 0x03, 0xFD, 0xE4, 0x90, 0xA3, 0xD5, 0xF0, 0x75, 0x6C, 0x06, 0xE5, 0x6C, 0xB4, 0x06, ++0x1D, 0xFF, 0x90, 0xA3, 0xD4, 0xE0, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x00, 0x12, 0x45, 0xA9, 0xE5, ++0x82, 0x2F, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xE0, 0x54, 0x0F, 0x80, 0x19, 0x90, 0xA3, ++0xD4, 0xE0, 0x75, 0xF0, 0x08, 0x90, 0x89, 0x00, 0x12, 0x45, 0xA9, 0xE5, 0x82, 0x25, 0x6C, 0xF5, ++0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xE0, 0x90, 0xA3, 0xD6, 0xF0, 0x90, 0xA3, 0xD6, 0xE0, 0x60, ++0x41, 0x75, 0x6B, 0x07, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x6B, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, ++0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0xA3, 0xD6, 0xE0, 0xFB, 0xEF, 0x5B, 0x60, 0x1B, 0xE5, 0x6C, ++0x75, 0xF0, 0x08, 0xA4, 0x25, 0x6B, 0x90, 0xA3, 0xD5, 0xF0, 0xED, 0x60, 0x24, 0xE0, 0xD3, 0x94, ++0x0B, 0x40, 0x1E, 0xE0, 0x24, 0x20, 0xF0, 0x80, 0x18, 0x15, 0x6B, 0xE5, 0x6B, 0xC3, 0x94, 0x00, ++0x50, 0xC2, 0xE5, 0x6C, 0x60, 0x0B, 0x15, 0x6C, 0xE5, 0x6C, 0xC3, 0x94, 0x00, 0x40, 0x02, 0x21, ++0x1C, 0xE4, 0xFC, 0xF5, 0x6C, 0xE5, 0x6C, 0xB4, 0x06, 0x1D, 0xFF, 0x90, 0xA3, 0xD4, 0xE0, 0x75, ++0xF0, 0x08, 0x90, 0x89, 0x00, 0x12, 0x45, 0xA9, 0xE5, 0x82, 0x2F, 0xF5, 0x82, 0xE4, 0x35, 0x83, ++0xF5, 0x83, 0xE0, 0x54, 0x0F, 0x80, 0x19, 0x90, 0xA3, 0xD4, 0xE0, 0x75, 0xF0, 0x08, 0x90, 0x89, ++0x00, 0x12, 0x45, 0xA9, 0xE5, 0x82, 0x25, 0x6C, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xE0, ++0x90, 0xA3, 0xD6, 0xF0, 0x90, 0xA3, 0xD6, 0xE0, 0x60, 0x3C, 0xE4, 0xF5, 0x6B, 0x74, 0x01, 0x7E, ++0x00, 0xA8, 0x6B, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0xA3, ++0xD6, 0xE0, 0xFB, 0xEF, 0x5B, 0x60, 0x18, 0xE5, 0x6C, 0x75, 0xF0, 0x08, 0xA4, 0x25, 0x6B, 0xFC, ++0xED, 0x60, 0x1D, 0xEC, 0xD3, 0x94, 0x0B, 0x40, 0x17, 0x74, 0x20, 0x2C, 0xFC, 0x80, 0x11, 0x05, ++0x6B, 0xE5, 0x6B, 0xB4, 0x08, 0xC7, 0x05, 0x6C, 0xE5, 0x6C, 0x64, 0x07, 0x60, 0x02, 0x21, 0xB5, ++0x90, 0xA3, 0xD5, 0xE0, 0xFF, 0x90, 0xA3, 0xD4, 0xE0, 0xFE, 0x75, 0xF0, 0x04, 0x90, 0x96, 0x16, ++0x12, 0x45, 0xA9, 0xEF, 0xF0, 0x75, 0xF0, 0x04, 0xEE, 0x90, 0x96, 0x17, 0x12, 0x45, 0xA9, 0xEC, ++0xF0, 0x75, 0xF0, 0x10, 0xEE, 0x90, 0x81, 0x00, 0x12, 0x45, 0xA9, 0xE0, 0xFE, 0x54, 0x7F, 0xF5, ++0x6D, 0xEE, 0x54, 0x80, 0xFE, 0xE5, 0x6D, 0xD3, 0x9F, 0x40, 0x09, 0x90, 0xA3, 0xD5, 0xE0, 0x4E, ++0xF5, 0x6D, 0x80, 0x0C, 0xE5, 0x6D, 0xC3, 0x9C, 0x50, 0x06, 0xAF, 0x06, 0xEC, 0x4F, 0xF5, 0x6D, ++0x90, 0xA3, 0xD4, 0xE0, 0xFF, 0x24, 0x16, 0xF5, 0x82, 0xE4, 0x34, 0x9E, 0xF5, 0x83, 0xE5, 0x6D, ++0xF0, 0x75, 0xF0, 0x04, 0xEF, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0x13, 0x13, 0x54, 0x03, ++0xF5, 0x6A, 0x90, 0xA3, 0xD4, 0xE0, 0xFF, 0xE4, 0xFB, 0xAD, 0x6D, 0x12, 0x77, 0x11, 0x90, 0xA3, ++0xD4, 0xE0, 0xFF, 0x75, 0xF0, 0x10, 0x90, 0x81, 0x03, 0x12, 0x45, 0xA9, 0xE4, 0xF0, 0x90, 0xA3, ++0xD5, 0xE0, 0xFE, 0xC3, 0x94, 0x0C, 0x40, 0x0F, 0x74, 0x96, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x95, ++0xF5, 0x83, 0x74, 0x02, 0xF0, 0x80, 0x23, 0xEE, 0xC3, 0x94, 0x04, 0x90, 0xA3, 0xD4, 0xE0, 0x40, ++0x0E, 0x24, 0x96, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0x74, 0x01, 0xF0, 0x80, 0x0B, 0x24, ++0x96, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0xE4, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, ++0x06, 0x89, 0x54, 0x7F, 0xF5, 0x51, 0x90, 0x00, 0x01, 0x12, 0x06, 0xA2, 0xFF, 0x54, 0x1F, 0xF5, ++0x53, 0xEF, 0x54, 0x80, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0xF5, 0x52, 0x90, 0x00, 0x02, 0x12, ++0x06, 0xA2, 0xFF, 0x54, 0x03, 0xF5, 0x54, 0xEF, 0x54, 0x30, 0xC4, 0x54, 0x0F, 0xF5, 0x57, 0x90, ++0x00, 0x02, 0x12, 0x06, 0xA2, 0xFF, 0x54, 0x40, 0xC4, 0x13, 0x13, 0x54, 0x03, 0xF5, 0x55, 0xEF, ++0x54, 0x80, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0xF5, 0x56, 0x90, 0x00, 0x02, 0x12, 0x06, 0xA2, ++0xFF, 0x54, 0x08, 0x13, 0x13, 0x13, 0x54, 0x1F, 0xF5, 0x59, 0xEF, 0x54, 0x04, 0x13, 0x13, 0x54, ++0x3F, 0xF5, 0x5A, 0xE5, 0x56, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, 0xFF, 0x75, 0xF0, ++0x04, 0xE5, 0x51, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0x7F, 0x4F, 0xF0, 0xE5, 0x55, ++0x54, 0x01, 0xC4, 0x33, 0x33, 0x54, 0xC0, 0xFF, 0x75, 0xF0, 0x04, 0xE5, 0x51, 0x90, 0x96, 0x19, ++0x12, 0x45, 0xA9, 0xE0, 0x54, 0xBF, 0x4F, 0xF0, 0xE5, 0x59, 0x60, 0x02, 0x81, 0x78, 0xE5, 0x53, ++0x54, 0x1F, 0xFF, 0x75, 0xF0, 0x04, 0xE5, 0x51, 0x90, 0x96, 0x18, 0x12, 0x45, 0xA9, 0xE0, 0x54, ++0xE0, 0x4F, 0xF0, 0xE5, 0x54, 0x54, 0x03, 0xFF, 0x75, 0xF0, 0x04, 0xE5, 0x51, 0x90, 0x96, 0x19, ++0x12, 0x45, 0xA9, 0xE0, 0x54, 0xFC, 0x4F, 0xF0, 0xEF, 0x25, 0xE0, 0x25, 0xE0, 0xFF, 0x75, 0xF0, ++0x04, 0xE5, 0x51, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0xF3, 0x4F, 0xF0, 0xE5, 0x52, ++0x54, 0x01, 0xC4, 0x33, 0x54, 0xE0, 0xFF, 0x75, 0xF0, 0x04, 0xE5, 0x51, 0x90, 0x96, 0x18, 0x12, ++0x45, 0xA9, 0xE0, 0x54, 0xDF, 0x4F, 0xF0, 0xE5, 0x57, 0x54, 0x03, 0xC4, 0x54, 0xF0, 0xFF, 0x75, ++0xF0, 0x04, 0xE5, 0x51, 0x90, 0x96, 0x19, 0x12, 0x45, 0xA9, 0xE0, 0x54, 0xCF, 0x4F, 0xF0, 0x74, ++0x16, 0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xE0, 0x54, 0xFB, 0xF0, 0x74, 0x16, ++0x25, 0x51, 0xF5, 0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xE0, 0xFF, 0xE5, 0x5A, 0x25, 0xE0, 0x25, ++0xE0, 0xFE, 0xEF, 0x4E, 0xF0, 0xE4, 0xF5, 0x58, 0x85, 0x58, 0x82, 0x75, 0x83, 0x00, 0xA3, 0xA3, ++0xA3, 0x12, 0x06, 0xA2, 0xFF, 0x75, 0xF0, 0x08, 0xE5, 0x51, 0x90, 0x89, 0x00, 0x12, 0x45, 0xA9, ++0xE5, 0x82, 0x25, 0x58, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0xEF, 0xF0, 0x05, 0x58, 0xE5, ++0x58, 0xB4, 0x04, 0xD4, 0xAF, 0x51, 0x11, 0x5F, 0x22, 0x7F, 0x84, 0x7E, 0x08, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0x5B, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x37, 0x4E, 0x90, ++0xA3, 0x65, 0x12, 0x08, 0x6D, 0x90, 0xA3, 0x5D, 0x12, 0x45, 0x71, 0x12, 0x08, 0x3A, 0x90, 0xA3, ++0x65, 0x12, 0x45, 0x8D, 0x12, 0x45, 0x46, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, ++0xA3, 0x5D, 0x12, 0x45, 0x71, 0x90, 0xA3, 0x61, 0x12, 0x45, 0x8D, 0x12, 0x45, 0x46, 0xD0, 0x03, ++0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x53, 0x90, 0xA3, 0x69, 0x12, 0x08, 0x6D, 0x90, ++0xA3, 0x69, 0x12, 0x45, 0x71, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x90, 0xA3, 0x5B, 0xE0, 0xFE, ++0xA3, 0xE0, 0xFF, 0x12, 0x38, 0x45, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA2, 0x30, 0x12, 0x45, ++0xA9, 0xE0, 0xFE, 0x54, 0x03, 0xFF, 0xEE, 0x13, 0x13, 0x54, 0x07, 0xFD, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0xA4, 0x07, 0xED, 0xF0, 0xEF, 0x14, 0x60, 0x02, 0xC1, 0x07, 0x90, 0x06, ++0x03, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0xA4, 0x07, 0xE0, 0xC4, 0x33, 0x54, 0xE0, 0xFF, 0x90, 0x04, ++0x42, 0xE0, 0x54, 0x9F, 0x4F, 0xFF, 0xF0, 0x90, 0xA3, 0x5D, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, ++0x01, 0x90, 0xA3, 0x61, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x01, 0x7F, 0x00, 0x7E, 0x08, 0x91, ++0x7D, 0x90, 0xA3, 0x5D, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x01, 0x90, 0xA3, 0x61, 0x12, 0x08, ++0x79, 0x00, 0x00, 0x00, 0x01, 0x7F, 0x00, 0x7E, 0x09, 0x91, 0x7D, 0x90, 0xA3, 0x5D, 0x12, 0x08, ++0x79, 0x00, 0x00, 0x00, 0x10, 0x90, 0xA4, 0x07, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0xEF, 0x54, ++0x03, 0xFF, 0xE4, 0x78, 0x01, 0x12, 0x08, 0x47, 0x78, 0x04, 0x12, 0x08, 0x5A, 0x90, 0xA3, 0x61, ++0x12, 0x08, 0x6D, 0x7F, 0x00, 0x7E, 0x0A, 0x91, 0x7D, 0x90, 0xA3, 0x5D, 0x12, 0x08, 0x79, 0x00, ++0x00, 0x0C, 0x00, 0x90, 0xA4, 0x07, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0xEF, 0x54, 0x03, 0xFF, ++0xE4, 0x78, 0x0A, 0x12, 0x08, 0x5A, 0x90, 0xA3, 0x61, 0x12, 0x08, 0x6D, 0x7F, 0x00, 0x7E, 0x0D, ++0x91, 0x7D, 0x90, 0xA3, 0x5D, 0x12, 0x08, 0x79, 0x0C, 0x00, 0x00, 0x00, 0x90, 0xA4, 0x07, 0xE0, ++0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78, 0x1A, 0x12, 0x08, 0x5A, 0x90, ++0xA3, 0x61, 0x12, 0x08, 0x6D, 0x7F, 0x18, 0x7E, 0x08, 0x91, 0x7D, 0x90, 0xA3, 0x5D, 0x12, 0x08, ++0x79, 0x00, 0x00, 0x0C, 0x00, 0x90, 0xA3, 0x61, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0x91, ++0x79, 0x90, 0xA3, 0x4B, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0x90, 0xA3, 0x4F, 0x12, 0x08, ++0x79, 0x00, 0x00, 0x04, 0x00, 0x80, 0x65, 0x90, 0x06, 0x03, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0xA3, ++0x5D, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x01, 0x90, 0xA3, 0x61, 0x12, 0x08, 0x79, 0x00, 0x00, ++0x00, 0x00, 0x7F, 0x00, 0x7E, 0x08, 0x91, 0x7D, 0x90, 0xA3, 0x5D, 0x12, 0x08, 0x79, 0x00, 0x00, ++0x00, 0x01, 0x90, 0xA3, 0x61, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x7E, 0x09, ++0x91, 0x7D, 0x90, 0xA3, 0x5D, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0x90, 0xA3, 0x61, 0x12, ++0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0x91, 0x79, 0x90, 0xA3, 0x4B, 0x12, 0x08, 0x79, 0x00, 0x00, ++0x0C, 0x00, 0x90, 0xA3, 0x4F, 0x12, 0x08, 0x79, 0x00, 0x00, 0x0C, 0x00, 0xD1, 0x7D, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0xE4, 0xFC, 0xFD, 0xFE, 0x90, 0xA3, 0x4F, 0x12, 0x08, 0x6D, 0x7D, 0x18, 0x7C, ++0x00, 0xE4, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0x49, 0xEC, 0xF0, 0xA3, ++0xED, 0xF0, 0x90, 0xA3, 0x48, 0xEF, 0xF0, 0xA3, 0xA3, 0xE0, 0xFD, 0x12, 0x3E, 0x02, 0x90, 0xA3, ++0x53, 0x12, 0x08, 0x6D, 0x90, 0xA3, 0x4B, 0x12, 0x45, 0x71, 0x12, 0x08, 0x3A, 0x90, 0xA3, 0x53, ++0x12, 0x45, 0x8D, 0x12, 0x45, 0x46, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0xA3, ++0x4B, 0x12, 0x45, 0x71, 0x90, 0xA3, 0x4F, 0x12, 0x45, 0x8D, 0x12, 0x45, 0x46, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x45, 0x53, 0x90, 0xA3, 0x57, 0x12, 0x08, 0x6D, 0x90, 0xA3, ++0x49, 0xA3, 0xE0, 0xFD, 0xC0, 0x05, 0x90, 0xA3, 0x57, 0x12, 0x45, 0x71, 0x90, 0xAA, 0x96, 0x12, ++0x08, 0x6D, 0x90, 0xA3, 0x48, 0xE0, 0xFF, 0xD0, 0x05, 0x12, 0x3D, 0x09, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0xD8, 0xEF, 0xF0, 0xED, 0x64, 0x01, ++0x70, 0x2F, 0xEB, 0xB4, 0x01, 0x07, 0xE0, 0x24, 0x02, 0xF5, 0x72, 0x80, 0x08, 0x90, 0xA3, 0xD8, ++0xE0, 0x24, 0xFE, 0xF5, 0x72, 0x90, 0xA3, 0x4B, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0xFF, 0xAF, ++0x72, 0xD1, 0x73, 0x90, 0xA3, 0x4B, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0xFF, 0xAF, 0x72, 0x80, ++0x20, 0x90, 0xA3, 0x4B, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0xFF, 0x90, 0xA3, 0xD8, 0xE0, 0xFF, ++0xD1, 0x73, 0x90, 0xA3, 0x4B, 0x12, 0x08, 0x79, 0x00, 0x00, 0x00, 0xFF, 0x90, 0xA3, 0xD8, 0xE0, ++0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x90, 0xA3, 0x4F, 0x12, 0x08, 0x6D, 0x7D, 0x18, 0x7C, 0x00, 0x7F, ++0x01, 0xD1, 0x83, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xDB, 0x7F, 0xFB, ++0x7E, 0x01, 0x12, 0x34, 0xC1, 0xBF, 0x01, 0x16, 0x90, 0xA2, 0xDB, 0xE0, 0x54, 0x30, 0xFF, 0xBF, ++0x20, 0x07, 0x90, 0xA2, 0x56, 0x74, 0x01, 0xF0, 0x22, 0xE4, 0x90, 0xA2, 0x56, 0xF0, 0x22, 0xD3, ++0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x37, 0x4E, 0x90, 0xA2, 0xDE, ++0x12, 0x08, 0x6D, 0x7F, 0x00, 0x7E, 0x09, 0x12, 0x37, 0x4E, 0x90, 0xA2, 0xE2, 0x12, 0x08, 0x6D, ++0x90, 0xA2, 0xDE, 0x12, 0x45, 0x71, 0xEF, 0x54, 0x01, 0xFF, 0xE4, 0xFE, 0xFD, 0xFC, 0xEF, 0x60, ++0x24, 0x90, 0xA2, 0xDE, 0x12, 0x45, 0x71, 0xEF, 0x54, 0xFE, 0xFF, 0xEC, 0x90, 0xA2, 0xDE, 0x12, ++0x08, 0x6D, 0x90, 0xA2, 0xDE, 0x12, 0x45, 0x71, 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x00, ++0x7E, 0x08, 0x12, 0x38, 0x45, 0x90, 0xA2, 0xE2, 0x12, 0x45, 0x71, 0xEF, 0x54, 0x01, 0xFF, 0xE4, ++0xFE, 0xFD, 0xFC, 0xEF, 0x60, 0x24, 0x90, 0xA2, 0xE2, 0x12, 0x45, 0x71, 0xEF, 0x54, 0xFE, 0xFF, ++0xEC, 0x90, 0xA2, 0xE2, 0x12, 0x08, 0x6D, 0x90, 0xA2, 0xE2, 0x12, 0x45, 0x71, 0x90, 0xAA, 0xB9, ++0x12, 0x08, 0x6D, 0x7F, 0x00, 0x7E, 0x09, 0x12, 0x38, 0x45, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, ++0x90, 0xA0, 0x90, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x01, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0xA1, 0x79, ++0x11, 0x12, 0x08, 0xAA, 0x90, 0xA1, 0x11, 0xE0, 0x54, 0xFD, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0xA3, 0x74, 0x0C, 0xF0, 0x22, 0x7D, 0x22, 0x7F, 0xFF, 0x12, 0x49, 0x5E, 0x90, 0x05, ++0x27, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0xA1, 0x14, 0x74, 0x03, 0xF0, 0x22, 0x90, 0x05, 0x27, 0xE0, ++0x44, 0x40, 0xF0, 0x7D, 0x23, 0x12, 0x46, 0xF8, 0x90, 0xA1, 0x14, 0x74, 0x02, 0xF0, 0x22, 0x12, ++0x60, 0x4D, 0x7D, 0x24, 0x7F, 0x6F, 0x12, 0x49, 0x5E, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, ++0x90, 0xA1, 0x14, 0x74, 0x04, 0xF0, 0x22, 0x12, 0x46, 0xFD, 0x90, 0xA1, 0x14, 0x74, 0x02, 0xF0, ++0x22, 0x7D, 0x25, 0x7F, 0x6F, 0x12, 0x49, 0x5E, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0x90, ++0xA1, 0x14, 0x74, 0x04, 0xF0, 0x22, 0x90, 0x01, 0x57, 0xE0, 0x60, 0x48, 0xE4, 0xF0, 0x90, 0x01, ++0x3C, 0x74, 0x02, 0xF0, 0x90, 0xA1, 0x16, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x0C, ++0xEF, 0x54, 0xFB, 0xF0, 0x90, 0xA1, 0x1E, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0xA1, 0x23, 0xE0, ++0x04, 0xF0, 0x90, 0xA1, 0x1E, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0xA1, 0xB9, 0xE0, 0xFF, 0x90, 0xA1, ++0x23, 0xE0, 0xD3, 0x9F, 0x40, 0x0E, 0x90, 0xA0, 0x90, 0xE0, 0xB4, 0x01, 0x07, 0x90, 0xA1, 0x17, ++0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0x06, 0xA9, 0xE0, 0x90, 0xA3, 0x05, 0xF0, 0xE0, 0xFD, 0x54, ++0xC0, 0x70, 0x09, 0x90, 0xA1, 0x1E, 0xE0, 0x54, 0xFE, 0xF0, 0x80, 0x7E, 0xED, 0x30, 0xE6, 0x4D, ++0x90, 0xA1, 0x1A, 0xE0, 0x64, 0x02, 0x70, 0x2B, 0x90, 0xA1, 0x16, 0xE0, 0xFF, 0xC3, 0x13, 0x20, ++0xE0, 0x09, 0x90, 0xA1, 0x1E, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x29, 0x90, 0xA1, 0x18, 0xE0, 0x54, ++0x0F, 0x64, 0x01, 0x70, 0x2F, 0x90, 0xA1, 0x1E, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x01, 0x12, 0x4B, ++0x58, 0x80, 0x21, 0x90, 0xA1, 0x1E, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0xA1, 0x18, 0xE0, 0x54, 0x0F, ++0x64, 0x02, 0x60, 0x04, 0x31, 0x9E, 0x80, 0x0C, 0x12, 0x4F, 0x9B, 0x80, 0x07, 0x90, 0xA1, 0x1E, ++0xE0, 0x54, 0xFE, 0xF0, 0x90, 0xA3, 0x05, 0xE0, 0x90, 0xA1, 0x1E, 0x30, 0xE7, 0x1B, 0xE0, 0x44, ++0x02, 0xF0, 0xE4, 0x90, 0xA3, 0xAE, 0xF0, 0x90, 0xA1, 0xBA, 0xE0, 0x90, 0xA3, 0xAF, 0x12, 0x48, ++0x21, 0x90, 0xA1, 0x16, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0xA1, ++0xBE, 0xE0, 0xC4, 0x54, 0x0F, 0x20, 0xE0, 0x20, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x1A, 0x90, 0x9F, ++0x9E, 0xE0, 0xFF, 0x7B, 0x18, 0xE4, 0xFD, 0x12, 0x4A, 0xB2, 0x90, 0xA4, 0x02, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x22, 0x90, 0xA1, 0x16, 0xE0, 0x13, 0x13, 0x13, ++0x54, 0x1F, 0x30, 0xE0, 0x05, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x06, 0x92, 0x74, 0x02, 0xF0, ++0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0xA3, 0xAE, 0xF0, 0x90, 0xA1, 0xBB, 0xE0, 0xC3, ++0x13, 0x54, 0x7F, 0x90, 0xA3, 0xAF, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x12, 0x48, ++0x29, 0x90, 0xA1, 0x16, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0x90, 0xA1, 0xCD, 0xE0, 0x30, 0xE0, 0x17, ++0x90, 0xA1, 0xDF, 0xE0, 0x70, 0x60, 0x90, 0xA1, 0x1C, 0xE0, 0xD3, 0x94, 0x00, 0x50, 0x57, 0x90, ++0xA1, 0xBF, 0xE0, 0x60, 0x4E, 0x80, 0x4F, 0x12, 0x73, 0xF1, 0xEF, 0x64, 0x01, 0x70, 0x47, 0x90, ++0xA1, 0x1E, 0xE0, 0xFF, 0x54, 0x03, 0x70, 0x3E, 0x90, 0xA1, 0x1C, 0xE0, 0xFE, 0xE4, 0xC3, 0x9E, ++0x40, 0x34, 0xEF, 0x20, 0xE2, 0x30, 0x90, 0xA1, 0x1E, 0xE0, 0x20, 0xE4, 0x29, 0x90, 0xA1, 0x17, ++0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x1E, 0x90, 0xA1, 0xBF, 0xE0, 0x70, 0x18, 0x90, 0x06, ++0x62, 0xE0, 0x20, 0xE1, 0x11, 0x90, 0x06, 0x62, 0xE0, 0x30, 0xE0, 0x07, 0xE0, 0x54, 0xFC, 0x64, ++0x80, 0x60, 0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xEF, 0x60, 0x3B, 0x90, 0xA0, 0x90, 0xE0, ++0x64, 0x01, 0x70, 0x33, 0x90, 0xA1, 0x17, 0xE0, 0x54, 0xFE, 0xF0, 0x7D, 0x2B, 0x7F, 0x0F, 0x12, ++0x49, 0x5E, 0x90, 0x06, 0x04, 0xE0, 0x54, 0xBF, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x49, 0x74, ++0xBF, 0x01, 0x14, 0x90, 0xA1, 0x16, 0xE0, 0x44, 0x40, 0xF0, 0x7D, 0x06, 0x7F, 0x01, 0x12, 0x55, ++0x87, 0x90, 0xA1, 0x15, 0x74, 0x06, 0xF0, 0x22, 0x90, 0xA0, 0x90, 0xE0, 0x64, 0x01, 0x70, 0x28, ++0x90, 0xA1, 0x17, 0xE0, 0x54, 0xFD, 0xF0, 0x7D, 0x2C, 0x7F, 0x6F, 0x12, 0x49, 0x5E, 0x12, 0x49, ++0x69, 0xBF, 0x01, 0x14, 0x90, 0xA1, 0x16, 0xE0, 0x44, 0x80, 0xF0, 0x7D, 0x0E, 0x7F, 0x01, 0x12, ++0x55, 0x87, 0x90, 0xA1, 0x15, 0x74, 0x0E, 0xF0, 0x22, 0x7D, 0x2D, 0x12, 0x4C, 0x04, 0x90, 0x01, ++0x37, 0x74, 0x02, 0xF0, 0xFD, 0x7F, 0x03, 0x12, 0x5A, 0x91, 0x12, 0x46, 0xFD, 0xE4, 0xFD, 0x7F, ++0x01, 0x12, 0x55, 0x87, 0xE4, 0x90, 0xA1, 0x15, 0xF0, 0x22, 0x7D, 0x2E, 0x7F, 0x6F, 0x12, 0x49, ++0x5E, 0x7D, 0x02, 0x7F, 0x01, 0x12, 0x55, 0x87, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0x90, ++0xA1, 0x15, 0x74, 0x02, 0xF0, 0x22, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x7D, 0x04, 0x7F, 0x01, ++0x12, 0x55, 0x87, 0x90, 0x05, 0x27, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0xA1, 0x15, 0x74, 0x04, 0xF0, ++0x22, 0x7E, 0x00, 0x7F, 0x04, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0xC0, 0x02, 0x08, 0xAA, ++0x90, 0xA3, 0xBD, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x81, 0x00, 0xE0, 0x54, 0x0F, 0xFD, 0xAC, ++0x07, 0x74, 0x0D, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x01, 0xF0, 0x74, ++0x0D, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xFB, 0xF0, 0xAC, 0x07, 0x74, ++0x12, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0xFA, 0xF0, 0x74, 0x11, 0x2C, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, 0x06, 0x2C, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x0E, 0xF0, 0x90, 0x04, 0xA7, 0xE4, 0xF0, ++0x90, 0x04, 0xA6, 0xF0, 0x90, 0x04, 0xA5, 0x74, 0xFF, 0xF0, 0x90, 0x04, 0xA4, 0x74, 0xFD, 0xF0, ++0x74, 0x14, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0x4D, 0xFD, 0x74, ++0x14, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xED, 0xF0, 0x22, 0x90, 0xA3, 0xBB, 0xE0, ++0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA4, 0x0C, 0xEF, 0xF0, 0x90, 0x9F, 0x9F, ++0xE0, 0xFF, 0x90, 0x04, 0x1C, 0xE0, 0x6F, 0x70, 0x49, 0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x0E, 0x70, ++0x15, 0x90, 0xA4, 0x0C, 0xE0, 0x70, 0x3B, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x06, ++0x04, 0x12, 0x55, 0x7F, 0x80, 0x26, 0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x06, 0x70, 0x24, 0x90, 0xA4, ++0x0C, 0xE0, 0x60, 0x1E, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xBF, 0xF0, 0x90, 0x06, 0x04, 0xE0, 0x44, ++0x40, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0xA1, 0x1D, 0x74, 0x04, 0xF0, 0xE4, 0xFD, 0xFF, 0x12, ++0x49, 0x5E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, 0x30, 0xE0, ++0x02, 0x7E, 0x80, 0x90, 0xFD, 0x10, 0xED, 0xF0, 0xAF, 0x06, 0x22, 0x00, 0x14, 0xF9, ++}; ++ ++void ++ODM_ReadFirmware_MP_8723B_FW_MP( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ++ *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8723B_FW_MP; ++#else ++ ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8723B_FW_MP, ArrayLength_MP_8723B_FW_MP); ++#endif ++ *pFirmwareSize = ArrayLength_MP_8723B_FW_MP; ++} ++ ++ ++const u32 Rtl8723B_PHYREG_Array_MP[Rtl8723B_PHYREG_Array_MPLength] = { ++0xc30,0x69e9ac4a, ++0xc3c,0x0a979718, ++}; ++ ++#endif //CONFIG_MP_INCLUDED ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mp.h +new file mode 100644 +index 0000000..be51ee4 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_mp.h +@@ -0,0 +1,45 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++#if (RTL8723B_SUPPORT==1) ++#ifndef __INC_MP_HW_IMG_8723B_H ++ ++#define __INC_MP_HW_IMG_8723B_H ++ ++#ifdef CONFIG_MP_INCLUDED ++ ++#define Rtl8723BFwBTImgArrayLength 20564 ++ ++#define Rtl8723B_PHYREG_Array_MPLength 4 ++ ++extern u8 Rtl8723BFwBTImgArray[Rtl8723BFwBTImgArrayLength]; ++extern const u32 Rtl8723B_PHYREG_Array_MP[Rtl8723B_PHYREG_Array_MPLength]; ++ ++void ++ODM_ReadFirmware_MP_8723B_FW_MP( ++ IN PDM_ODM_T pDM_Odm, ++ OUT u1Byte *pFirmware, ++ OUT u4Byte *pFirmwareSize ++); ++ ++ ++#endif //CONFIG_MP_INCLUDED ++#endif ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_rf.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_rf.c +new file mode 100644 +index 0000000..c736307 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_rf.c +@@ -0,0 +1,866 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8723B_SUPPORT == 1) ++static BOOLEAN ++CheckPositive( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2, ++ IN const u4Byte Condition3, ++ IN const u4Byte Condition4 ++) ++{ ++ u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ ++ ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA*/ ++ ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA*/ ++ ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ ++ ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT*/ ++ ++ u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; ++ u4Byte driver1 = pDM_Odm->CutVersion << 24 | ++ (pDM_Odm->SupportInterface & 0xF0) << 16 | ++ pDM_Odm->SupportPlatform << 16 | ++ pDM_Odm->PackageType << 12 | ++ (pDM_Odm->SupportInterface & 0x0F) << 8 | ++ _BoardType; ++ ++ u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | ++ (pDM_Odm->TypeGPA & 0xFF) << 8 | ++ (pDM_Odm->TypeALNA & 0xFF) << 16 | ++ (pDM_Odm->TypeAPA & 0xFF) << 24; ++ ++u4Byte driver3 = 0; ++ ++ u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | ++ (pDM_Odm->TypeGPA & 0xFF00) | ++ (pDM_Odm->TypeALNA & 0xFF00) << 8 | ++ (pDM_Odm->TypeAPA & 0xFF00) << 16; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ ("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4)); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ++ (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); ++ ++ ++ /*============== Value Defined Check ===============*/ ++ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ ++ ++ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) ++ return FALSE; ++ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) ++ return FALSE; ++ ++ /*=============== Bit Defined Check ================*/ ++ /* We don't care [31:28] */ ++ ++ cond1 &= 0x00FF0FFF; ++ driver1 &= 0x00FF0FFF; ++ ++ if ((cond1 & driver1) == cond1) { ++ u4Byte bitMask = 0; ++ ++ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ ++ return TRUE; ++ ++ if ((cond1 & BIT0) != 0) /*GLNA*/ ++ bitMask |= 0x000000FF; ++ if ((cond1 & BIT1) != 0) /*GPA*/ ++ bitMask |= 0x0000FF00; ++ if ((cond1 & BIT2) != 0) /*ALNA*/ ++ bitMask |= 0x00FF0000; ++ if ((cond1 & BIT3) != 0) /*APA*/ ++ bitMask |= 0xFF000000; ++ ++ if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ ++ return TRUE; ++ else ++ return FALSE; ++ } else ++ return FALSE; ++} ++static BOOLEAN ++CheckNegative( ++ IN PDM_ODM_T pDM_Odm, ++ IN const u4Byte Condition1, ++ IN const u4Byte Condition2 ++) ++{ ++ return TRUE; ++} ++ ++/****************************************************************************** ++* RadioA.TXT ++******************************************************************************/ ++ ++u4Byte Array_MP_8723B_RadioA[] = { ++ 0x000, 0x00010000, ++ 0x0B0, 0x000DFFE0, ++ 0x0FE, 0x00000000, ++ 0x0FE, 0x00000000, ++ 0x0FE, 0x00000000, ++ 0x0B1, 0x00000018, ++ 0x0FE, 0x00000000, ++ 0x0FE, 0x00000000, ++ 0x0FE, 0x00000000, ++ 0x0B2, 0x00084C00, ++ 0x0B5, 0x0000D2CC, ++ 0x0B6, 0x000925AA, ++ 0x0B7, 0x00000010, ++ 0x0B8, 0x0000907F, ++ 0x05C, 0x00000002, ++ 0x07C, 0x00000002, ++ 0x07E, 0x00000005, ++ 0x08B, 0x0006FC00, ++ 0x0B0, 0x000FF9F0, ++ 0x01C, 0x000739D2, ++ 0x01E, 0x00000000, ++ 0x0DF, 0x00000780, ++ 0x050, 0x00067435, ++ 0x80002000, 0x00000000, 0x40000000, 0x00000000, ++ 0x051, 0x0006F10E, ++ 0x052, 0x000007D3, ++ 0x90003000, 0x00000000, 0x40000000, 0x00000000, ++ 0x051, 0x0006F10E, ++ 0x052, 0x000007D3, ++ 0x90004000, 0x00000000, 0x40000000, 0x00000000, ++ 0x051, 0x0006F10E, ++ 0x052, 0x000007D3, ++ 0xA0000000, 0x00000000, ++ 0x051, 0x0006B04E, ++ 0x052, 0x000007D2, ++ 0xB0000000, 0x00000000, ++ 0x053, 0x00000000, ++ 0x054, 0x00050400, ++ 0x055, 0x0004026E, ++ 0x0DD, 0x0000004C, ++ 0x070, 0x00067435, ++ 0x80002000, 0x00000000, 0x40000000, 0x00000000, ++ 0x071, 0x0006F10E, ++ 0x072, 0x000007D3, ++ 0x90003000, 0x00000000, 0x40000000, 0x00000000, ++ 0x071, 0x0006F10E, ++ 0x072, 0x000007D3, ++ 0x90004000, 0x00000000, 0x40000000, 0x00000000, ++ 0x071, 0x0006F10E, ++ 0x072, 0x000007D3, ++ 0xA0000000, 0x00000000, ++ 0x071, 0x0006B04E, ++ 0x072, 0x000007D2, ++ 0xB0000000, 0x00000000, ++ 0x073, 0x00000000, ++ 0x074, 0x00050400, ++ 0x075, 0x0004026E, ++ 0x0EF, 0x00000100, ++ 0x034, 0x0000ADD7, ++ 0x035, 0x00005C00, ++ 0x034, 0x00009DD4, ++ 0x035, 0x00005000, ++ 0x034, 0x00008DD1, ++ 0x035, 0x00004400, ++ 0x034, 0x00007DCE, ++ 0x035, 0x00003800, ++ 0x034, 0x00006CD1, ++ 0x035, 0x00004400, ++ 0x034, 0x00005CCE, ++ 0x035, 0x00003800, ++ 0x034, 0x000048CE, ++ 0x035, 0x00004400, ++ 0x034, 0x000034CE, ++ 0x035, 0x00003800, ++ 0x034, 0x00002451, ++ 0x035, 0x00004400, ++ 0x034, 0x0000144E, ++ 0x035, 0x00003800, ++ 0x034, 0x00000051, ++ 0x035, 0x00004400, ++ 0x0EF, 0x00000000, ++ 0x0EF, 0x00000100, ++ 0x0ED, 0x00000010, ++ 0x044, 0x0000ADD7, ++ 0x044, 0x00009DD4, ++ 0x044, 0x00008DD1, ++ 0x044, 0x00007DCE, ++ 0x044, 0x00006CC1, ++ 0x044, 0x00005CCE, ++ 0x044, 0x000044D1, ++ 0x044, 0x000034CE, ++ 0x044, 0x00002451, ++ 0x044, 0x0000144E, ++ 0x044, 0x00000051, ++ 0x0EF, 0x00000000, ++ 0x0ED, 0x00000000, ++ 0x07F, 0x00020080, ++ 0x0EF, 0x00002000, ++ 0x03B, 0x000389EF, ++ 0x03B, 0x000302FE, ++ 0x03B, 0x00028CE6, ++ 0x03B, 0x000200BC, ++ 0x03B, 0x000188A5, ++ 0x03B, 0x00010FBC, ++ 0x03B, 0x00008F71, ++ 0x03B, 0x00000900, ++ 0x0EF, 0x00000000, ++ 0x0ED, 0x00000001, ++ 0x040, 0x000380EF, ++ 0x040, 0x000302FE, ++ 0x040, 0x00028CE6, ++ 0x040, 0x000200BC, ++ 0x040, 0x000188A5, ++ 0x040, 0x00010FBC, ++ 0x040, 0x00008F71, ++ 0x040, 0x00000900, ++ 0x0ED, 0x00000000, ++ 0x082, 0x00080000, ++ 0x083, 0x00008000, ++ 0x084, 0x00049F80, ++ 0x085, 0x00068000, ++ 0x0A2, 0x00080000, ++ 0x0A3, 0x00008000, ++ 0x0A4, 0x00048D80, ++ 0x0A5, 0x00068000, ++ 0x0ED, 0x00000002, ++ 0x0EF, 0x00000002, ++ 0x056, 0x00000032, ++ 0x076, 0x00000032, ++ 0x001, 0x00000780, ++ ++}; ++ ++void ++ODM_ReadAndConfig_MP_8723B_RadioA( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u1Byte cCond; ++ BOOLEAN bMatched = TRUE, bSkipped = FALSE; ++ u4Byte ArrayLen = sizeof(Array_MP_8723B_RadioA)/sizeof(u4Byte); ++ pu4Byte Array = Array_MP_8723B_RadioA; ++ ++ u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_RadioA\n")); ++ ++ while ((i + 1) < ArrayLen) { ++ v1 = Array[i]; ++ v2 = Array[i + 1]; ++ ++ if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ ++ if (v1 & BIT31) {/* positive condition*/ ++ cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); ++ if (cCond == COND_ENDIF) {/*end*/ ++ bMatched = TRUE; ++ bSkipped = FALSE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n")); ++ } else if (cCond == COND_ELSE) { /*else*/ ++ bMatched = bSkipped?FALSE:TRUE; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n")); ++ } ++ else {/*if , else if*/ ++ pre_v1 = v1; ++ pre_v2 = v2; ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n")); ++ } ++ } else if (v1 & BIT30) { /*negative condition*/ ++ if (bSkipped == FALSE) { ++ if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { ++ bMatched = TRUE; ++ bSkipped = TRUE; ++ } else { ++ bMatched = FALSE; ++ bSkipped = FALSE; ++ } ++ } else ++ bMatched = FALSE; ++ } ++ } else { ++ if (bMatched) ++ odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); ++ } ++ i = i + 2; ++ } ++} ++ ++u4Byte ++ODM_GetVersion_MP_8723B_RadioA(void) ++{ ++ return 24; ++} ++ ++/****************************************************************************** ++* TxPowerTrack_AP.TXT ++******************************************************************************/ ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_AP_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_AP_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_AP_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++#endif ++ ++void ++ODM_ReadAndConfig_MP_8723B_TxPowerTrack_AP( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); ++ ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE*3); ++#endif ++} ++ ++/****************************************************************************** ++* TxPowerTrack_PCIE.TXT ++******************************************************************************/ ++ ++#if DEV_BUS_TYPE == RT_PCI_INTERFACE ++u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_PCIE_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_PCIE_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_PCIE_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_PCIE_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++#endif ++ ++void ++ODM_ReadAndConfig_MP_8723B_TxPowerTrack_PCIE( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); ++ ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE*3); ++#endif ++} ++ ++/****************************************************************************** ++* TxPowerTrack_SDIO.TXT ++******************************************************************************/ ++ ++#if DEV_BUS_TYPE == RT_SDIO_INTERFACE ++u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_SDIO_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_SDIO_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_SDIO_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_SDIO_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 12, 12, 13, 13, 14, 15, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 12, 12, 13, 13, 14, 15, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++#endif ++ ++void ++ODM_ReadAndConfig_MP_8723B_TxPowerTrack_SDIO( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if DEV_BUS_TYPE == RT_SDIO_INTERFACE ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); ++ ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE*3); ++#endif ++} ++ ++/****************************************************************************** ++* TxPowerTrack_USB.TXT ++******************************************************************************/ ++ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_USB_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_USB_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_USB_8723B[][DELTA_SWINGIDX_SIZE] = { ++ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++ {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, ++}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; ++#endif ++ ++void ++ODM_ReadAndConfig_MP_8723B_TxPowerTrack_USB( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); ++ ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE); ++ ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE*3); ++ ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE*3); ++#endif ++} ++ ++/****************************************************************************** ++* TXPWR_LMT.TXT ++******************************************************************************/ ++ ++const char *Array_MP_8723B_TXPWR_LMT[] = { ++ "FCC", "2.4G", "20M", "CCK", "1T", "01", "30", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "01", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "02", "30", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "02", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "03", "30", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "03", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "04", "30", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "04", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "05", "30", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "05", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "06", "30", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "06", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "07", "30", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "07", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "08", "30", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "08", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "09", "30", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "09", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "10", "30", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "10", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "11", "30", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "11", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "12", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "13", "26", ++ "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", ++ "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "01", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "28", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "01", "28", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "02", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "32", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "02", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "03", "32", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "32", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "03", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "04", "32", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "32", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "04", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "05", "32", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "32", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "05", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "06", "32", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "32", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "06", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "07", "32", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "32", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "07", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "08", "32", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "32", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "08", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "09", "32", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "32", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "09", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "10", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "32", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "10", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "11", "28", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "32", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "11", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "32", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "12", "32", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "28", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "13", "28", ++ "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", ++ "FCC", "2.4G", "20M", "HT", "1T", "01", "26", ++ "ETSI", "2.4G", "20M", "HT", "1T", "01", "26", ++ "MKK", "2.4G", "20M", "HT", "1T", "01", "28", ++ "FCC", "2.4G", "20M", "HT", "1T", "02", "26", ++ "ETSI", "2.4G", "20M", "HT", "1T", "02", "32", ++ "MKK", "2.4G", "20M", "HT", "1T", "02", "32", ++ "FCC", "2.4G", "20M", "HT", "1T", "03", "32", ++ "ETSI", "2.4G", "20M", "HT", "1T", "03", "32", ++ "MKK", "2.4G", "20M", "HT", "1T", "03", "32", ++ "FCC", "2.4G", "20M", "HT", "1T", "04", "32", ++ "ETSI", "2.4G", "20M", "HT", "1T", "04", "32", ++ "MKK", "2.4G", "20M", "HT", "1T", "04", "32", ++ "FCC", "2.4G", "20M", "HT", "1T", "05", "32", ++ "ETSI", "2.4G", "20M", "HT", "1T", "05", "32", ++ "MKK", "2.4G", "20M", "HT", "1T", "05", "32", ++ "FCC", "2.4G", "20M", "HT", "1T", "06", "32", ++ "ETSI", "2.4G", "20M", "HT", "1T", "06", "32", ++ "MKK", "2.4G", "20M", "HT", "1T", "06", "32", ++ "FCC", "2.4G", "20M", "HT", "1T", "07", "32", ++ "ETSI", "2.4G", "20M", "HT", "1T", "07", "32", ++ "MKK", "2.4G", "20M", "HT", "1T", "07", "32", ++ "FCC", "2.4G", "20M", "HT", "1T", "08", "32", ++ "ETSI", "2.4G", "20M", "HT", "1T", "08", "32", ++ "MKK", "2.4G", "20M", "HT", "1T", "08", "32", ++ "FCC", "2.4G", "20M", "HT", "1T", "09", "32", ++ "ETSI", "2.4G", "20M", "HT", "1T", "09", "32", ++ "MKK", "2.4G", "20M", "HT", "1T", "09", "32", ++ "FCC", "2.4G", "20M", "HT", "1T", "10", "26", ++ "ETSI", "2.4G", "20M", "HT", "1T", "10", "32", ++ "MKK", "2.4G", "20M", "HT", "1T", "10", "32", ++ "FCC", "2.4G", "20M", "HT", "1T", "11", "26", ++ "ETSI", "2.4G", "20M", "HT", "1T", "11", "32", ++ "MKK", "2.4G", "20M", "HT", "1T", "11", "32", ++ "FCC", "2.4G", "20M", "HT", "1T", "12", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "12", "32", ++ "MKK", "2.4G", "20M", "HT", "1T", "12", "32", ++ "FCC", "2.4G", "20M", "HT", "1T", "13", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "13", "26", ++ "MKK", "2.4G", "20M", "HT", "1T", "13", "28", ++ "FCC", "2.4G", "20M", "HT", "1T", "14", "63", ++ "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", ++ "MKK", "2.4G", "20M", "HT", "1T", "14", "63", ++ "FCC", "2.4G", "20M", "HT", "2T", "01", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "01", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "01", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "02", "32", ++ "ETSI", "2.4G", "20M", "HT", "2T", "02", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "02", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "03", "32", ++ "ETSI", "2.4G", "20M", "HT", "2T", "03", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "03", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "04", "32", ++ "ETSI", "2.4G", "20M", "HT", "2T", "04", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "04", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "05", "32", ++ "ETSI", "2.4G", "20M", "HT", "2T", "05", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "05", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "06", "32", ++ "ETSI", "2.4G", "20M", "HT", "2T", "06", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "06", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "07", "32", ++ "ETSI", "2.4G", "20M", "HT", "2T", "07", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "07", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "08", "32", ++ "ETSI", "2.4G", "20M", "HT", "2T", "08", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "08", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "09", "32", ++ "ETSI", "2.4G", "20M", "HT", "2T", "09", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "09", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "10", "32", ++ "ETSI", "2.4G", "20M", "HT", "2T", "10", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "10", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "11", "30", ++ "ETSI", "2.4G", "20M", "HT", "2T", "11", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "11", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "12", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "12", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "12", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "13", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "13", "32", ++ "MKK", "2.4G", "20M", "HT", "2T", "13", "32", ++ "FCC", "2.4G", "20M", "HT", "2T", "14", "63", ++ "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", ++ "MKK", "2.4G", "20M", "HT", "2T", "14", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "01", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "01", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "02", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "02", "63", ++ "FCC", "2.4G", "40M", "HT", "1T", "03", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "03", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "03", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "04", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "04", "28", ++ "MKK", "2.4G", "40M", "HT", "1T", "04", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "05", "28", ++ "ETSI", "2.4G", "40M", "HT", "1T", "05", "28", ++ "MKK", "2.4G", "40M", "HT", "1T", "05", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "06", "28", ++ "ETSI", "2.4G", "40M", "HT", "1T", "06", "28", ++ "MKK", "2.4G", "40M", "HT", "1T", "06", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "07", "28", ++ "ETSI", "2.4G", "40M", "HT", "1T", "07", "28", ++ "MKK", "2.4G", "40M", "HT", "1T", "07", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "08", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "08", "28", ++ "MKK", "2.4G", "40M", "HT", "1T", "08", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "09", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "09", "28", ++ "MKK", "2.4G", "40M", "HT", "1T", "09", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "10", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "10", "28", ++ "MKK", "2.4G", "40M", "HT", "1T", "10", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "11", "26", ++ "ETSI", "2.4G", "40M", "HT", "1T", "11", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "11", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "12", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "12", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "12", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "13", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "13", "26", ++ "MKK", "2.4G", "40M", "HT", "1T", "13", "26", ++ "FCC", "2.4G", "40M", "HT", "1T", "14", "63", ++ "ETSI", "2.4G", "40M", "HT", "1T", "14", "63", ++ "MKK", "2.4G", "40M", "HT", "1T", "14", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "01", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "01", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "01", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "02", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "02", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "02", "63", ++ "FCC", "2.4G", "40M", "HT", "2T", "03", "30", ++ "ETSI", "2.4G", "40M", "HT", "2T", "03", "30", ++ "MKK", "2.4G", "40M", "HT", "2T", "03", "30", ++ "FCC", "2.4G", "40M", "HT", "2T", "04", "32", ++ "ETSI", "2.4G", "40M", "HT", "2T", "04", "30", ++ "MKK", "2.4G", "40M", "HT", "2T", "04", "30", ++ "FCC", "2.4G", "40M", "HT", "2T", "05", "32", ++ "ETSI", "2.4G", "40M", "HT", "2T", "05", "30", ++ "MKK", "2.4G", "40M", "HT", "2T", "05", "30", ++ "FCC", "2.4G", "40M", "HT", "2T", "06", "32", ++ "ETSI", "2.4G", "40M", "HT", "2T", "06", "30", ++ "MKK", "2.4G", "40M", "HT", "2T", "06", "30", ++ "FCC", "2.4G", "40M", "HT", "2T", "07", "32", ++ "ETSI", "2.4G", "40M", "HT", "2T", "07", "30", ++ "MKK", "2.4G", "40M", "HT", "2T", "07", "30", ++ "FCC", "2.4G", "40M", "HT", "2T", "08", "32", ++ "ETSI", "2.4G", "40M", "HT", "2T", "08", "30", ++ "MKK", "2.4G", "40M", "HT", "2T", "08", "30", ++ "FCC", "2.4G", "40M", "HT", "2T", "09", "32", ++ "ETSI", "2.4G", "40M", "HT", "2T", "09", "30", ++ "MKK", "2.4G", "40M", "HT", "2T", "09", "30", ++ "FCC", "2.4G", "40M", "HT", "2T", "10", "32", ++ "ETSI", "2.4G", "40M", "HT", "2T", "10", "30", ++ "MKK", "2.4G", "40M", "HT", "2T", "10", "30", ++ "FCC", "2.4G", "40M", "HT", "2T", "11", "30", ++ "ETSI", "2.4G", "40M", "HT", "2T", "11", "30", ++ "MKK", "2.4G", "40M", "HT", "2T", "11", "30", ++ "FCC", "2.4G", "40M", "HT", "2T", "12", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "12", "32", ++ "MKK", "2.4G", "40M", "HT", "2T", "12", "32", ++ "FCC", "2.4G", "40M", "HT", "2T", "13", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "13", "32", ++ "MKK", "2.4G", "40M", "HT", "2T", "13", "32", ++ "FCC", "2.4G", "40M", "HT", "2T", "14", "63", ++ "ETSI", "2.4G", "40M", "HT", "2T", "14", "63", ++ "MKK", "2.4G", "40M", "HT", "2T", "14", "63" ++}; ++ ++void ++ODM_ReadAndConfig_MP_8723B_TXPWR_LMT( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u4Byte i = 0; ++ u4Byte ArrayLen = sizeof(Array_MP_8723B_TXPWR_LMT)/sizeof(pu1Byte); ++ pu1Byte *Array = (pu1Byte *)Array_MP_8723B_TXPWR_LMT; ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PlatformZeroMemory(pHalData->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); ++ pHalData->nLinesReadPwrLmt = ArrayLen/7; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_TXPWR_LMT\n")); ++ ++ for (i = 0; i < ArrayLen; i += 7) { ++ pu1Byte regulation = Array[i]; ++ pu1Byte band = Array[i+1]; ++ pu1Byte bandwidth = Array[i+2]; ++ pu1Byte rate = Array[i+3]; ++ pu1Byte rfPath = Array[i+4]; ++ pu1Byte chnl = Array[i+5]; ++ pu1Byte val = Array[i+6]; ++ ++ odm_ConfigBB_TXPWR_LMT_8723B(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ rsprintf(pHalData->BufOfLinesPwrLmt[i/7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", ++ regulation, band, bandwidth, rate, rfPath, chnl, val); ++#endif ++ } ++ ++} ++ ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_rf.h +new file mode 100644 +index 0000000..7a478c1 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halhwimg8723b_rf.h +@@ -0,0 +1,89 @@ ++/****************************************************************************** ++* ++* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++* ++* This program is free software; you can redistribute it and/or modify it ++* under the terms of version 2 of the GNU General Public License as ++* published by the Free Software Foundation. ++* ++* This program is distributed in the hope that it will be useful, but WITHOUT ++* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++* more details. ++* ++* You should have received a copy of the GNU General Public License along with ++* this program; if not, write to the Free Software Foundation, Inc., ++* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++* ++* ++******************************************************************************/ ++ ++/*Image2HeaderVersion: 2.14*/ ++#if (RTL8723B_SUPPORT == 1) ++#ifndef __INC_MP_RF_HW_IMG_8723B_H ++#define __INC_MP_RF_HW_IMG_8723B_H ++ ++ ++/****************************************************************************** ++* RadioA.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8723B_RadioA(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8723B_RadioA(void); ++ ++/****************************************************************************** ++* TxPowerTrack_AP.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8723B_TxPowerTrack_AP(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8723B_TxPowerTrack_AP(void); ++ ++/****************************************************************************** ++* TxPowerTrack_PCIE.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8723B_TxPowerTrack_PCIE(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8723B_TxPowerTrack_PCIE(void); ++ ++/****************************************************************************** ++* TxPowerTrack_SDIO.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8723B_TxPowerTrack_SDIO(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8723B_TxPowerTrack_SDIO(void); ++ ++/****************************************************************************** ++* TxPowerTrack_USB.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8723B_TxPowerTrack_USB(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8723B_TxPowerTrack_USB(void); ++ ++/****************************************************************************** ++* TXPWR_LMT.TXT ++******************************************************************************/ ++ ++void ++ODM_ReadAndConfig_MP_8723B_TXPWR_LMT(/* TC: Test Chip, MP: MP Chip*/ ++ IN PDM_ODM_T pDM_Odm ++); ++u4Byte ODM_GetVersion_MP_8723B_TXPWR_LMT(void); ++ ++#endif ++#endif /* end of HWIMG_SUPPORT*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_ce.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_ce.c +new file mode 100644 +index 0000000..4afc2c1 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_ce.c +@@ -0,0 +1,3957 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++// 2010/04/25 MH Define the max tx power tracking tx agc power. ++#define ODM_TXPWRTRACK_MAX_IDX8723B 6 ++ ++// MACRO definition for pRFCalibrateInfo->TxIQC_8723B[0] ++#define PATH_S0 1 // RF_PATH_B ++#define IDX_0xC94 0 ++#define IDX_0xC80 1 ++#define IDX_0xC4C 2 ++#define IDX_0xC14 0 ++#define IDX_0xCA0 1 ++#define KEY 0 ++#define VAL 1 ++ ++// MACRO definition for pRFCalibrateInfo->TxIQC_8723B[1] ++#define PATH_S1 0 // RF_PATH_A ++#define IDX_0xC9C 0 ++#define IDX_0xC88 1 ++#define IDX_0xC4C 2 ++#define IDX_0xC1C 0 ++#define IDX_0xC78 1 ++ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++//3============================================================ ++//3 Tx Power Tracking ++//3============================================================ ++ ++ ++void setIqkMatrix_8723B( ++ PDM_ODM_T pDM_Odm, ++ u1Byte OFDM_index, ++ u1Byte RFPath, ++ s4Byte IqkResult_X, ++ s4Byte IqkResult_Y ++ ) ++{ ++ s4Byte ele_A=0, ele_D, ele_C=0, value32; ++ ++ if (OFDM_index >= OFDM_TABLE_SIZE) ++ OFDM_index = OFDM_TABLE_SIZE-1; ++ ++ ele_D = (OFDMSwingTable_New[OFDM_index] & 0xFFC00000)>>22; ++ ++ //new element A = element D x X ++ if((IqkResult_X != 0) && (*(pDM_Odm->pBandType) == ODM_BAND_2_4G)) ++ { ++ if ((IqkResult_X & 0x00000200) != 0) //consider minus ++ IqkResult_X = IqkResult_X | 0xFFFFFC00; ++ ele_A = ((IqkResult_X * ele_D)>>8)&0x000003FF; ++ ++ //new element C = element D x Y ++ if ((IqkResult_Y & 0x00000200) != 0) ++ IqkResult_Y = IqkResult_Y | 0xFFFFFC00; ++ ele_C = ((IqkResult_Y * ele_D)>>8)&0x000003FF; ++ ++ //if (RFPath == ODM_RF_PATH_A) ++ switch (RFPath) ++ { ++ case ODM_RF_PATH_A: ++ //wirte new elements A, C, D to regC80 and regC94, element B is always 0 ++ value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((IqkResult_X * ele_D)>>7)&0x01; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, value32); ++ break; ++ case ODM_RF_PATH_B: ++ //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 ++ value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((IqkResult_X * ele_D)>>7)&0x01; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, value32); ++ ++ break; ++ default: ++ break; ++ } ++ } ++ else ++ { ++ switch (RFPath) ++ { ++ case ODM_RF_PATH_A: ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, 0x00); ++ break; ++ ++ case ODM_RF_PATH_B: ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, 0x00); ++ break; ++ ++ default: ++ break; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", ++ (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y, (u4Byte)ele_A, (u4Byte)ele_C, (u4Byte)ele_D, (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y)); ++} ++ ++ ++VOID ++setCCKFilterCoefficient( ++ PDM_ODM_T pDM_Odm, ++ u1Byte CCKSwingIndex ++) ++{ ++ if(!pDM_Odm->RFCalibrateInfo.bCCKinCH14) ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][7]); ++ } ++ else ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14_New[CCKSwingIndex][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14_New[CCKSwingIndex][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14_New[CCKSwingIndex][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14_New[CCKSwingIndex][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14_New[CCKSwingIndex][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14_New[CCKSwingIndex][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14_New[CCKSwingIndex][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14_New[CCKSwingIndex][7]); ++ } ++} ++ ++void DoIQK_8723B( ++ PVOID pDM_VOID, ++ u1Byte DeltaThermalIndex, ++ u1Byte ThermalValue, ++ u1Byte Threshold ++ ) ++{ ++#if 0 // mark by Lucas@SD4 20140128, suggested by Allen@SD3 ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++#endif ++ ++ ODM_ResetIQKResult(pDM_Odm); ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#if USE_WORKITEM ++ PlatformAcquireMutex(&pHalData->mxChnlBwControl); ++#else ++ PlatformAcquireSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); ++#endif ++#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ PlatformAcquireMutex(&pHalData->mxChnlBwControl); ++#endif ++#endif ++ ++ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK= ThermalValue; ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_IQCalibrate_8723B(pDM_Odm, FALSE, FALSE); ++#else ++ PHY_IQCalibrate_8723B(Adapter, FALSE, FALSE); ++#endif ++ ++#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#if USE_WORKITEM ++ PlatformReleaseMutex(&pHalData->mxChnlBwControl); ++#else ++ PlatformReleaseSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); ++#endif ++#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) ++ PlatformReleaseMutex(&pHalData->mxChnlBwControl); ++#endif ++#endif ++#endif // #if 0 ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: odm_TxPwrTrackSetPwr88E() ++ * ++ * Overview: 88E change all channel tx power accordign to flag. ++ * OFDM & CCK are all different. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 04/23/2012 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++ODM_TxPwrTrackSetPwr_8723B( ++ IN PVOID pDM_VOID, ++ PWRTRACK_METHOD Method, ++ u1Byte RFPath, ++ u1Byte ChannelMappedIndex ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ u1Byte PwrTrackingLimit_OFDM = 34; //+0dB ++ u1Byte PwrTrackingLimit_CCK= 28; //-2dB ++ u1Byte TxRate = 0xFF; ++ u1Byte Final_OFDM_Swing_Index = 0; ++ u1Byte Final_CCK_Swing_Index = 0; ++ u1Byte i = 0; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ if (pDM_Odm->mp_mode == TRUE) { ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ #if (MP_DRIVER == 1) ++ PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); ++ ++ TxRate = MptToMgntRate(pMptCtx->MptRateIndex); ++ #endif ++ #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); ++ ++ TxRate = MptToMgntRate(pMptCtx->MptRateIndex); ++ #endif ++ #endif ++ } else { ++ u2Byte rate = *(pDM_Odm->pForcedDataRate); ++ ++ if (!rate) { /*auto rate*/ ++ if (rate != 0xFF) { ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); ++ #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ TxRate = HwRateToMRate(pDM_Odm->TxRate); ++ #endif ++ } ++ } else { /*force rate*/ ++ TxRate = (u1Byte)rate; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>ODM_TxPwrTrackSetPwr8723B\n")); ++ ++ if(TxRate != 0xFF) ++ { ++ //2 CCK ++ if((TxRate >= MGN_1M)&&(TxRate <= MGN_11M)) ++ PwrTrackingLimit_CCK = 28; //-2dB ++ //2 OFDM ++ else if((TxRate >= MGN_6M)&&(TxRate <= MGN_48M)) ++ PwrTrackingLimit_OFDM= 36; //+3dB ++ else if(TxRate == MGN_54M) ++ PwrTrackingLimit_OFDM= 34; //+2dB ++ ++ //2 HT ++ else if((TxRate >= MGN_MCS0)&&(TxRate <= MGN_MCS2)) //QPSK/BPSK ++ PwrTrackingLimit_OFDM= 38; //+4dB ++ else if((TxRate >= MGN_MCS3)&&(TxRate <= MGN_MCS4)) //16QAM ++ PwrTrackingLimit_OFDM= 36; //+3dB ++ else if((TxRate >= MGN_MCS5)&&(TxRate <= MGN_MCS7)) //64QAM ++ PwrTrackingLimit_OFDM= 34; //+2dB ++ ++ else ++ PwrTrackingLimit_OFDM = pRFCalibrateInfo->DefaultOfdmIndex; /*Default OFDM index = 30*/ ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("TxRate=0x%x, PwrTrackingLimit=%d\n", TxRate, PwrTrackingLimit_OFDM)); ++ ++ if (Method == TXAGC) ++ { ++ u1Byte rf = 0; ++ u4Byte pwr = 0, TxAGC = 0; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr8723B CH=%d\n", *(pDM_Odm->pChannel))); ++ ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE )) ++ if (pDM_Odm->mp_mode == TRUE) ++ { ++ pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); ++ pwr += pDM_Odm->RFCalibrateInfo.PowerIndexOffset[RFPath]; ++ PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr); ++ TxAGC = (pwr<<16)|(pwr<<8)|(pwr); ++ PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskH3Bytes, TxAGC); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ODM_TxPwrTrackSetPwr8723B: CCK Tx-rf(A) Power = 0x%x\n", TxAGC)); ++ ++ pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); ++ pwr += (pRFCalibrateInfo->BbSwingIdxOfdm[RFPath] - pRFCalibrateInfo->BbSwingIdxOfdmBase[RFPath]); ++ TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ODM_TxPwrTrackSetPwr8723B: OFDM Tx-rf(A) Power = 0x%x\n", TxAGC)); ++ } ++ else ++ { ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, CCK); ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, OFDM); ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, HT_MCS0_MCS7); ++ } ++#endif ++ } ++ else if (Method == BBSWING) ++ { ++ Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ ++ // Adjust BB swing by OFDM IQ matrix ++ if (Final_OFDM_Swing_Index >= PwrTrackingLimit_OFDM) ++ Final_OFDM_Swing_Index = PwrTrackingLimit_OFDM; ++ else if (Final_OFDM_Swing_Index <= 0) ++ Final_OFDM_Swing_Index = 0; ++ ++ if (Final_CCK_Swing_Index >= CCK_TABLE_SIZE) ++ Final_CCK_Swing_Index = CCK_TABLE_SIZE-1; ++ else if (pRFCalibrateInfo->BbSwingIdxCck <= 0) ++ Final_CCK_Swing_Index = 0; ++ ++ setIqkMatrix_8723B(pDM_Odm, Final_OFDM_Swing_Index, RFPath, ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ ++ setCCKFilterCoefficient(pDM_Odm, Final_CCK_Swing_Index); ++ ++ } ++ else if (Method == MIX_MODE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("pRFCalibrateInfo->DefaultOfdmIndex=%d, pDM_Odm->DefaultCCKIndex=%d, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n", ++ pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->DefaultCckIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath], RFPath)); ++ ++ Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ ++ if(Final_OFDM_Swing_Index > PwrTrackingLimit_OFDM ) //BBSwing higher then Limit ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index - PwrTrackingLimit_OFDM; ++ ++ setIqkMatrix_8723B(pDM_Odm, PwrTrackingLimit_OFDM, RFPath, ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A Over BBSwing Limit , PwrTrackingLimit = %d , Remnant TxAGC Value = %d\n", ++ PwrTrackingLimit_OFDM, pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath])); ++ } ++ else if (Final_OFDM_Swing_Index <= 0) ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index; ++ ++ setIqkMatrix_8723B(pDM_Odm, 0, RFPath, ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A Lower then BBSwing lower bound 0 , Remnant TxAGC Value = %d\n", ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath])); ++ } ++ else ++ { ++ setIqkMatrix_8723B(pDM_Odm, Final_OFDM_Swing_Index, RFPath, ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d\n", Final_OFDM_Swing_Index)); ++ ++ if (pRFCalibrateInfo->Modify_TxAGC_Flag_PathA) /*If TxAGC has changed, reset TxAGC again*/ ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = 0; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A pDM_Odm->Modify_TxAGC_Flag = FALSE\n")); ++ } ++ } ++ ++ if(Final_CCK_Swing_Index > PwrTrackingLimit_CCK) ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = Final_CCK_Swing_Index - PwrTrackingLimit_CCK; ++ setCCKFilterCoefficient(pDM_Odm, PwrTrackingLimit_CCK); ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, CCK ); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A CCK Over Limit , PwrTrackingLimit_CCK = %d , pRFCalibrateInfo->Remnant_CCKSwingIdx = %d\n", PwrTrackingLimit_CCK, pRFCalibrateInfo->Remnant_CCKSwingIdx)); ++ } ++ else if(Final_CCK_Swing_Index <= 0) // Lowest CCK Index = 0 ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = Final_CCK_Swing_Index; ++ setCCKFilterCoefficient(pDM_Odm, 0); ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, CCK ); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A CCK Under Limit , PwrTrackingLimit_CCK = %d , pRFCalibrateInfo->Remnant_CCKSwingIdx = %d\n", 0, pRFCalibrateInfo->Remnant_CCKSwingIdx)); ++ } ++ else ++ { ++ setCCKFilterCoefficient(pDM_Odm, Final_CCK_Swing_Index); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A CCK Compensate with BBSwing , Final_CCK_Swing_Index = %d\n", Final_CCK_Swing_Index)); ++ ++ if (pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK) /*If TxAGC has changed, reset TxAGC again*/ ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = 0; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, CCK ); ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A pDM_Odm->Modify_TxAGC_Flag_CCK = FALSE\n")); ++ } ++ } ++ } ++ else ++ { ++ return; // This method is not supported. ++ } ++} ++ ++VOID ++GetDeltaSwingTable_8723B( ++ IN PVOID pDM_VOID, ++ OUT pu1Byte *TemperatureUP_A, ++ OUT pu1Byte *TemperatureDOWN_A, ++ OUT pu1Byte *TemperatureUP_B, ++ OUT pu1Byte *TemperatureDOWN_B ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u1Byte TxRate = 0xFF; ++ u1Byte channel = pHalData->CurrentChannel; ++ ++ if (pDM_Odm->mp_mode == TRUE) { ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ #if (MP_DRIVER == 1) ++ PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); ++ ++ TxRate = MptToMgntRate(pMptCtx->MptRateIndex); ++ #endif ++ #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); ++ ++ TxRate = MptToMgntRate(pMptCtx->MptRateIndex); ++ #endif ++ #endif ++ } else { ++ u2Byte rate = *(pDM_Odm->pForcedDataRate); ++ ++ if (!rate) { /*auto rate*/ ++ if (rate != 0xFF) { ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); ++ #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ TxRate = HwRateToMRate(pDM_Odm->TxRate); ++ #endif ++ } ++ } else { /*force rate*/ ++ TxRate = (u1Byte)rate; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate)); ++ ++ if ( 1 <= channel && channel <= 14) { ++ if (IS_CCK_RATE(TxRate)) { ++ *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P; ++ *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N; ++ *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P; ++ *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N; ++ } else { ++ *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P; ++ *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N; ++ *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P; ++ *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N; ++ } ++ } else { ++ *TemperatureUP_A = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; ++ *TemperatureDOWN_A = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; ++ *TemperatureUP_B = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; ++ *TemperatureDOWN_B = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; ++ } ++ ++ return; ++} ++ ++ ++void ConfigureTxpowerTrack_8723B( ++ PTXPWRTRACK_CFG pConfig ++ ) ++{ ++ pConfig->SwingTableSize_CCK = CCK_TABLE_SIZE; ++ pConfig->SwingTableSize_OFDM = OFDM_TABLE_SIZE; ++ pConfig->Threshold_IQK = IQK_THRESHOLD; ++ pConfig->AverageThermalNum = AVG_THERMAL_NUM_8723B; ++ pConfig->RfPathCount = MAX_PATH_NUM_8723B; ++ pConfig->ThermalRegAddr = RF_T_METER_8723B; ++ ++ pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr_8723B; ++ pConfig->DoIQK = DoIQK_8723B; ++ pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8723B; ++ pConfig->GetDeltaSwingTable = GetDeltaSwingTable_8723B; ++} ++ ++//1 7. IQK ++#define MAX_TOLERANCE 5 ++#define IQK_DELAY_TIME 1 //ms ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_IQK_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN configPathB, ++ IN u1Byte RF_Path ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, tmp, Path_SEL_BB /*, regEA4*/; ++ u1Byte result = 0x00; ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ ++ // Save RF Path ++ Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n")); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ // enable path A PA in TXIQK mode ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x20000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0003f ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87 ); ++ // disable path B PA in TXIQK mode ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, bRFRegOffsetMask, 0x00020 ); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x40ec1 ); ++ ++ //1 Tx IQK ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ //path-A IQK setting ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A IQK setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x8214010a); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x821403ea); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); ++ ++ //enter IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++ ++ //Ant switch ++ if (configPathB || (RF_Path == 0)) ++ // wifi switch to S1 ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); ++ else ++ // wifi switch to S0 ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++ ++ //GNT_BT = 0 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); ++ ++ //One shot, path A LOK & IQK ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_8723B)); ++ //PlatformStallExecution(IQK_DELAY_TIME_8723B*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //restore Ant Path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); ++ //GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord))); ++ ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42)) ++ result |= 0x01; ++ ++ return result; ++ ++#if 0 ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ RT_DISP(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); ++#endif ++ } ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_RxIQK8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN configPathB, ++ IN u1Byte RF_Path ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, regEA4, u4tmp,tmp, Path_SEL_BB; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK!\n")); ++ ++ // Save RF Path ++ Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A RX IQK:Get TXIMR setting\n")); ++ //1 Get TXIMR setting ++ //modify RXIQK mode table ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n")); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f); ++ //LNA2 off, PA on for Dcut ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ++// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160ff0); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); ++ ++ //enter IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++ ++ //Ant switch ++ if (configPathB || (RF_Path == 0)) ++ // wifi switch to S1 ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); ++ else ++ // wifi switch to S0 ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++ ++ //GNT_BT = 0 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); ++ ++ //One shot, path A LOK & IQK ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_8723B)); ++ //PlatformStallExecution(IQK_DELAY_TIME_8723B*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //restore Ant Path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); ++ //GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord))); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42)) ++ ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++ ++ ++ u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x \n", ODM_GetBBReg(pDM_Odm, rTx_IQK, bMaskDWord), u4tmp)); ++ ++ ++ //1 RX IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A RX IQK\n")); ++ ++ //modify RXIQK mode table ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table 2!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f ); ++ //LAN2 on, PA off for Dcut ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77 ); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); ++ ++ //PA, PAD setting ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x55, bRFRegOffsetMask, 0x4021f ); ++ ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82110000); ++// ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x281604c2); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2816001f); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1); ++ ++ //enter IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++ ++ //Ant switch ++ if (configPathB || (RF_Path == 0)) ++ // wifi switch to S1 ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); ++ else ++ // wifi switch to S0 ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++ ++ //GNT_BT = 0 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); ++ ++ //One shot, path A LOK & IQK ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_8723B*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //restore Ant Path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); ++ //GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x, 0xeac = 0x%x\n", regEA4, regEAC)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea0(before IQK)= 0x%x, 0xea8(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xea0, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xea8, bMaskDWord))); ++ ++ // PA/PAD controlled by 0x0 ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x780 ); ++ ++ /* Allen 20141201 */ ++ tmp=(regEAC & 0x03FF0000)>>16; ++ if ((tmp & 0x200)> 0) ++ tmp = 0x400 - tmp; ++ ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)&& ++ (((regEA4 & 0x03FF0000)>>16) < 0x11a) && ++ (((regEA4 & 0x03FF0000)>>16) > 0xe6) && ++ (tmp < 0x1a)) ++ result |= 0x02; ++ else //if Tx not OK, ignore Rx ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK fail!!\n")); ++ ++ ++ return result; ++ ++ ++} ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathB_IQK_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, tmp, Path_SEL_BB/*, regEC4, regECC, Path_SEL_BB*/; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n")); ++ ++ // Save RF Path ++ Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ // in TXIQK mode ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1 ); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x20000 ); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0003f ); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87 ); ++ // enable path B PA in TXIQK mode ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x40fc1); ++ ++ ++ ++ //1 Tx IQK ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ //path-A IQK setting ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-B IQK setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ++// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82140114); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x821403ea); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); ++ ++ //enter IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++ ++ //switch to path B ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); ++ ++ //GNT_BT = 0 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); ++ ++ //One shot, path B LOK & IQK ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path B LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //restore Ant Path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); ++ //GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0x948 = 0x%x\n", ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord))); ++ ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord))); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42)) ++ result |= 0x01; ++ ++ return result; ++ ++#if 0 ++ if(!(regEAC & BIT30) && ++ (((regEC4 & 0x03FF0000)>>16) != 0x132) && ++ (((regECC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK fail!!\n")); ++ ++#endif ++} ++ ++ ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathB_RxIQK8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN configPathB ++ ) ++{ ++ u4Byte regE94, regE9C, regEA4, regEAC, u4tmp, tmp, Path_SEL_BB; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK!\n")); ++ ++ // Save RF Path ++ Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ //switch to path B ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++ ++ //1 Get TXIMR setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B RX IQK:Get TXIMR setting!\n")); ++ //modify RXIQK mode table ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n")); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7 ); ++ //open PA S1 & SMIXER ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60fcd ); ++ ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ ++ //path-B IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ++// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f ); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160ff0); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); ++ ++ //enter IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++ ++ //switch to path B ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); ++ ++ //GNT_BT = 0 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); ++ ++ //One shot, path B TXIQK @ RXIQK ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path B LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ ++ // delay x ms ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //restore Ant Path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); ++ //GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord))); ++ ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42)) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++ ++ ++ ++ u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x \n", ODM_GetBBReg(pDM_Odm, rTx_IQK, bMaskDWord), u4tmp)); ++ ++ ++ //1 RX IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B RX IQK\n")); ++ ++ //modify RXIQK mode table ++ //<20121009, Kordan> RF Mode = 3 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); ++ ++ //open PA S1 & close SMIXER ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60ebd); ++ ++ //PA, PAD setting ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000); ++ ++ ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ //path-B IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82110000); ++// ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x281604c2); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2816001f); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1); ++ ++ //enter IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++ ++ //switch to path B ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); ++ ++ //GNT_BT = 0 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); ++ ++ //One shot, path B LOK & IQK ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path B LOK & IQK!\n")); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); ++ //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //restore Ant Path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); ++ //GNT_BT = 1 ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord);; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x, 0xeac = 0x%x\n", regEA4, regEAC)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea0(before IQK)= 0x%x, 0xea8(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xea0, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xea8, bMaskDWord))); ++ ++ // PA/PAD controlled by 0x0 ++ //leave IQK mode ++// ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x00000000); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xdf, bRFRegOffsetMask, 0x180 ); ++ ++ ++ ++#if 0 ++ if(!(regEAC & BIT31) && ++ (((regEB4 & 0x03FF0000)>>16) != 0x142) && ++ (((regEBC & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++#endif ++ ++ ++ /* Allen 20141201 */ ++ tmp=(regEAC & 0x03FF0000)>>16; ++ if ((tmp & 0x200)> 0) ++ tmp = 0x400 - tmp; ++ ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36) && ++ (((regEA4 & 0x03FF0000)>>16) < 0x11a) && ++ (((regEA4 & 0x03FF0000)>>16) > 0xe6) && ++ (tmp < 0x1a)) ++ ++ result |= 0x02; ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK fail!!\n")); ++ ++ ++ return result; ++ ++ ++} ++ ++ ++VOID ++_PHY_PathAFillIQKMatrix8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly ++ ) ++{ ++ u4Byte Oldval_0, X, TX0_A, reg; ++ s4Byte Y, TX0_C; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_0 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][0]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX0_A = (X * Oldval_0) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); ++ ++ Y = result[final_candidate][1]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ //2 Tx IQC ++ TX0_C = (Y * Oldval_0) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][KEY] = rOFDM0_XCTxAFE; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskDWord); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][KEY] = rOFDM0_XATxIQImbalance; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][KEY] = rOFDM0_ECCAThreshold; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord); ++ ++ if(bTxOnly) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("_PHY_PathAFillIQKMatrix8723B only Tx OK\n")); ++ ++ // <20130226, Kordan> Saving RxIQC, otherwise not initialized. ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][KEY] = rOFDM0_RxIQExtAnta; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] = 0xfffffff & ODM_GetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, bMaskDWord); ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][KEY] = rOFDM0_XARxIQImbalance; ++// pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, bMaskDWord); ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = 0x40000100; ++ return; ++ } ++ ++ reg = result[final_candidate][2]; ++#if (DM_ODM_SUPPORT_TYPE==ODM_AP) ++ if( RTL_ABS(reg ,0x100) >= 16) ++ reg = 0x100; ++#endif ++ ++ //2 Rx IQC ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0x3FF, reg); ++ reg = result[final_candidate][3] & 0x3F; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0xFC00, reg); ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][KEY] = rOFDM0_XARxIQImbalance; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, bMaskDWord); ++ ++ reg = (result[final_candidate][3] >> 6) & 0xF; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, 0xF0000000, reg); ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][KEY] = rOFDM0_RxIQExtAnta; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, bMaskDWord); ++ ++ } ++} ++ ++VOID ++_PHY_PathBFillIQKMatrix8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly //do Tx only ++ ) ++{ ++ u4Byte Oldval_1, X, TX1_A, reg; ++ s4Byte Y, TX1_C; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_1 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][4]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX1_A = (X * Oldval_1) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); ++ ++ Y = result[final_candidate][5]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ TX1_C = (Y * Oldval_1) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); ++ ++ //2 Tx IQC ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); ++// pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC9C][KEY] = rOFDM0_XDTxAFE; ++// pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC9C][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskDWord); ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][KEY] = rOFDM0_XCTxAFE; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskDWord); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][KEY] = rOFDM0_XATxIQImbalance; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord); ++ ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][KEY] = rOFDM0_ECCAThreshold; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord); ++ ++ if(bTxOnly) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("_PHY_PathBFillIQKMatrix8723B only Tx OK\n")); ++ ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][KEY] = rOFDM0_XARxIQImbalance; ++// pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, bMaskDWord); ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] = 0x40000100; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][KEY] = rOFDM0_RxIQExtAnta; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][VAL] = 0x0fffffff & ODM_GetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, bMaskDWord); ++ return; ++ } ++ ++ //2 Rx IQC ++ reg = result[final_candidate][6]; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0x3FF, reg); ++ reg = result[final_candidate][7] & 0x3F; ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0xFC00, reg); ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][KEY] = rOFDM0_XARxIQImbalance; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] = ODM_GetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, bMaskDWord); ++ ++ reg = (result[final_candidate][7] >> 6) & 0xF; ++// ODM_SetBBReg(pDM_Odm, rOFDM0_AGCRSSITable, 0x0000F000, reg); ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][KEY] = rOFDM0_RxIQExtAnta; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][VAL] = (reg << 28)|(ODM_GetBBReg(pDM_Odm,rOFDM0_RxIQExtAnta, bMaskDWord)& 0x0fffffff); ++ } ++} ++ ++// ++// 2011/07/26 MH Add an API for testing IQK fail case. ++// ++// MP Already declare in odm.c ++ ++VOID ++ODM_SetIQCbyRFpath( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RFpath ++ ) ++{ ++ ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ if((pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL] != 0x0) && (pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] != 0x0)&& ++ (pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL] != 0x0) && (pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] != 0x0)) ++ { ++ if(RFpath) //S1: RFpath = 0, S0:RFpath = 1 ++ { ++ //S0 TX IQC ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][VAL]); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL]); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][VAL]); ++ //S0 RX IQC ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL]); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][VAL]); ++ } ++ else ++ { ++ //S1 TX IQC ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL]); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL]); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL]); ++ //S1 RX IQC ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL]); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL]); ++ } ++ } ++} ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++BOOLEAN ++ODM_CheckPowerStatus( ++ IN PADAPTER Adapter) ++{ ++/* ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ RT_RF_POWER_STATE rtState; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ ++ // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. ++ if (pMgntInfo->init_adpt_in_progress == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); ++ return TRUE; ++ } ++ ++ // ++ // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. ++ // ++ rtw_hal_get_hwreg(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); ++ if (rtw_is_drv_stopped(padapter) || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to drv_stop:%s/%d/%d\n", ++ rtw_is_drv_stopped(padapter)?"True":"False", Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); ++ return FALSE; ++ } ++*/ ++ return TRUE; ++} ++#endif ++ ++VOID ++_PHY_SaveADDARegisters8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegisterNum ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++ ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); ++ for( i = 0 ; i < RegisterNum ; i++){ ++ ADDABackup[i] = ODM_GetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord); ++ } ++} ++ ++ ++VOID ++_PHY_SaveMACRegisters8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); ++ for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ MACBackup[i] = ODM_Read1Byte(pDM_Odm, MACReg[i]); ++ } ++ MACBackup[i] = ODM_Read4Byte(pDM_Odm, MACReg[i]); ++ ++} ++ ++ ++VOID ++_PHY_ReloadADDARegisters8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegiesterNum ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); ++ for(i = 0 ; i < RegiesterNum; i++) ++ { ++ ODM_SetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord, ADDABackup[i]); ++ } ++} ++ ++VOID ++_PHY_ReloadMACRegisters8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); ++ for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)MACBackup[i]); ++ } ++ ODM_Write4Byte(pDM_Odm, MACReg[i], MACBackup[i]); ++} ++ ++ ++VOID ++_PHY_PathADDAOn8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN BOOLEAN isPathAOn, ++ IN BOOLEAN is2T ++ ) ++{ ++ u4Byte pathOn; ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n")); ++ ++ pathOn = isPathAOn ? 0x01c00014 : 0x01c00014; ++ if(FALSE == is2T){ ++ pathOn = 0x01c00014; ++ ODM_SetBBReg(pDM_Odm, ADDAReg[0], bMaskDWord, 0x01c00014); ++ } ++ else{ ++ ODM_SetBBReg(pDM_Odm,ADDAReg[0], bMaskDWord, pathOn); ++ } ++ ++ for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){ ++ ODM_SetBBReg(pDM_Odm,ADDAReg[i], bMaskDWord, pathOn); ++ } ++ ++} ++ ++VOID ++_PHY_MACSettingCalibration8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i = 0; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); ++ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], 0x3F); ++ ++ for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT3))); ++ } ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT5))); ++ ++} ++ ++VOID ++_PHY_PathAStandBy8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A standby mode!\n")); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x0); ++//Allen ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ //ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x00010000); ++// ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ++} ++ ++VOID ++_PHY_PIModeSwitch8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN PIMode ++ ) ++{ ++ u4Byte mode; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); ++ ++ mode = PIMode ? 0x01000100 : 0x01000000; ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); ++} ++ ++BOOLEAN ++phy_SimularityCompare_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s4Byte result[][8], ++ IN u1Byte c1, ++ IN u1Byte c2 ++ ) ++{ ++ u4Byte i, j, diff, SimularityBitMap, bound = 0; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B ++ BOOLEAN bResult = TRUE; ++//#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++// BOOLEAN is2T = IS_92C_SERIAL( pHalData->VersionID); ++//#else ++ BOOLEAN is2T = TRUE; ++//#endif ++ ++ s4Byte tmp1 = 0,tmp2 = 0; ++ ++ if(is2T) ++ bound = 8; ++ else ++ bound = 4; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> IQK:phy_SimularityCompare_8192E c1 %d c2 %d!!!\n", c1, c2)); ++ ++ ++ SimularityBitMap = 0; ++ ++ for( i = 0; i < bound; i++ ) ++ { ++ ++ if((i==1) || (i==3) || (i==5) || (i==7)) ++ { ++ if((result[c1][i]& 0x00000200) != 0) ++ tmp1 = result[c1][i] | 0xFFFFFC00; ++ else ++ tmp1 = result[c1][i]; ++ ++ if((result[c2][i]& 0x00000200) != 0) ++ tmp2 = result[c2][i] | 0xFFFFFC00; ++ else ++ tmp2 = result[c2][i]; ++ } ++ else ++ { ++ tmp1 = result[c1][i]; ++ tmp2 = result[c2][i]; ++ } ++ ++ diff = (tmp1 > tmp2) ? (tmp1 - tmp2) : (tmp2 - tmp1); ++ ++ if (diff > MAX_TOLERANCE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:differnece overflow %d index %d compare1 0x%x compare2 0x%x!!!\n", diff, i, result[c1][i], result[c2][i])); ++ ++ if((i == 2 || i == 6) && !SimularityBitMap) ++ { ++ if(result[c1][i]+result[c1][i+1] == 0) ++ final_candidate[(i/4)] = c2; ++ else if (result[c2][i]+result[c2][i+1] == 0) ++ final_candidate[(i/4)] = c1; ++ else ++ SimularityBitMap = SimularityBitMap|(1<odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ u4Byte i; ++ u1Byte PathAOK, PathBOK; ++ u1Byte tmp0xc50 = (u1Byte)ODM_GetBBReg(pDM_Odm, 0xC50, bMaskByte0); ++ u1Byte tmp0xc58 = (u1Byte)ODM_GetBBReg(pDM_Odm, 0xC58, bMaskByte0); ++ u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ //since 92C & 92D have the different define in IQK_BB_REG ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE, rCCK0_AFESetting ++ }; ++ ++ u4Byte Path_SEL_BB; ++// u4Byte Path_SEL_BB, Path_SEL_RF; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ u4Byte retryCount = 2; ++#else ++#if MP_DRIVER ++ const u4Byte retryCount = 1; ++#else ++ const u4Byte retryCount = 2; ++#endif ++#endif ++ ++if( pAdapter->registrypriv.mp_mode == 1 && pAdapter->mppriv.mode == 3 ) ++{ ++ DBG_871X("%s() :return !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n",__func__); ++ return; ++} ++ ++ // Note: IQ calibration must be performed after loading ++ // PHY_REG.txt , and radio_a, radio_b.txt ++ ++ //u4Byte bbvalue; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#ifdef MP_TEST ++ if(pDM_Odm->priv->pshare->rf_ft_var.mp_specific) ++ retryCount = 9; ++#endif ++#endif ++ ++ ++ if(t==0) ++ { ++// bbvalue = ODM_GetBBReg(pDM_Odm, rFPGA0_RFMOD, bMaskDWord); ++// RT_DISP(FINIT, INIT_IQK, ("phy_IQCalibrate_8188E()==>0x%08x\n",bbvalue)); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); ++ ++ // Save ADDA parameters, turn Path A ADDA on ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_SaveADDARegisters8723B(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters8723B(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ _PHY_SaveADDARegisters8723B(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#else ++ _PHY_SaveADDARegisters8723B(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters8723B(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ _PHY_SaveADDARegisters8723B(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#endif ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ _PHY_PathADDAOn8723B(pAdapter, ADDA_REG, TRUE, is2T); ++#else ++ _PHY_PathADDAOn8723B(pDM_Odm, ADDA_REG, TRUE, is2T); ++#endif ++ ++//no serial mode ++#if 0 ++ if(t==0) ++ { ++ pDM_Odm->RFCalibrateInfo.bRfPiEnable = (u1Byte)ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, BIT(8)); ++ } ++ ++ if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ ++ // Switch BB to PI mode to do IQ Calibration. ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PIModeSwitch8723B(pAdapter, TRUE); ++#else ++ _PHY_PIModeSwitch8723B(pDM_Odm, TRUE); ++#endif ++ } ++#endif ++ ++ //save RF path for 8723B ++// Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++// Path_SEL_RF = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, 0xfffff); ++ ++ //MAC settings ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_MACSettingCalibration8723B(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++#else ++ _PHY_MACSettingCalibration8723B(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++#endif ++ ++ //BB setting ++ //ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0x00); ++ ODM_SetBBReg(pDM_Odm, rCCK0_AFESetting, 0x0f000000, 0xf); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); ++ ++ ++// ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); ++// ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); ++// ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); ++// ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); ++ ++ ++//for 8723B ++#if 0 ++ if(is2T) ++ { ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMaskDWord, 0x10000); ++ } ++#endif ++ ++ ++//no APK ++#if 0 ++ //Page B init ++ //AP or IQK ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); ++ ++ if(is2T) ++ { ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x0f600000); ++ } ++#endif ++ ++//RX IQ calibration setting for 8723B D cut large current issue when leaving IPS ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60fbd); ++/* ++//LOK RF setting ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x2, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x2, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x56, bRFRegOffsetMask, 0x00032); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x76, bRFRegOffsetMask, 0x00032); ++*/ ++ ++ ++//path A TX IQK ++#if 1 ++ ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathAOK = phy_PathA_IQK_8723B(pAdapter, is2T, RF_Path); ++#else ++ PathAOK = phy_PathA_IQK_8723B(pDM_Odm, is2T, RF_Path); ++#endif ++// if(PathAOK == 0x03){ ++ if(PathAOK == 0x01){ ++ // Path A Tx IQK Success ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_A] = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x8, bRFRegOffsetMask); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Tx IQK Success!!\n")); ++ result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++#if 0 ++ else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK ++ { ++ RT_DISP(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); ++ ++ result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ } ++#endif ++ } ++#endif ++ ++//path A RXIQK ++#if 1 ++ ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathAOK = phy_PathA_RxIQK8723B(pAdapter, is2T, RF_Path); ++#else ++ PathAOK = phy_PathA_RxIQK8723B(pDM_Odm, is2T, RF_Path); ++#endif ++ if(PathAOK == 0x03){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Success!!\n")); ++// result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++// result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][2] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][3] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Fail!!\n")); ++ } ++ } ++ ++ if(0x00 == PathAOK){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK failed!!\n")); ++ } ++#endif ++ ++//path B IQK ++#if 1 ++ ++ if(is2T){ ++ ++/* ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++// _PHY_PathAStandBy8723B(pAdapter); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn8723B(pAdapter, ADDA_REG, FALSE, is2T); ++#else ++// _PHY_PathAStandBy8723B(pDM_Odm); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn8723B(pDM_Odm, ADDA_REG, FALSE, is2T); ++#endif ++*/ ++ ++//path B TX IQK ++#if 1 ++ for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathBOK = phy_PathB_IQK_8723B(pAdapter); ++#else ++ PathBOK = phy_PathB_IQK_8723B(pDM_Odm); ++#endif ++// if(PathBOK == 0x03){ ++ if(PathBOK == 0x01){ ++ // Path B Tx IQK Success ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_B] = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x8, bRFRegOffsetMask); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Tx IQK Success!!\n")); ++ result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++#if 0 ++ else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK ++ { ++ RT_DISP(FINIT, INIT_IQK, ("Path B IQK Only Tx Success!!\n")); ++ ++ result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ } ++#endif ++ } ++#endif ++ ++//path B RX IQK ++#if 1 ++ ++for(i = 0 ; i < retryCount ; i++){ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathBOK = phy_PathB_RxIQK8723B(pAdapter, is2T); ++#else ++ PathBOK = phy_PathB_RxIQK8723B(pDM_Odm, is2T); ++#endif ++ if(PathBOK == 0x03){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK Success!!\n")); ++// result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++// result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][6] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][7] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK Fail!!\n")); ++ } ++ } ++ ++#endif ++ ++////////Allen end ///////// ++ if(0x00 == PathBOK){ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK failed!!\n")); ++ } ++ } ++#endif //pathB IQK ++ ++ //Back to BB mode, load original value ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Back to BB mode, load original value!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0); ++ ++ if(t!=0) ++ { ++ if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ ++ // Switch back BB to SI mode after finish IQ Calibration. ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++// _PHY_PIModeSwitch8723B(pAdapter, FALSE); ++#else ++// _PHY_PIModeSwitch8723B(pDM_Odm, FALSE); ++#endif ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters8723B(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters8723B(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ ++ _PHY_ReloadADDARegisters8723B(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#else ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters8723B(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters8723B(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); ++ ++ _PHY_ReloadADDARegisters8723B(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); ++#endif ++ ++ ++ //Reload RF path ++// ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF); ++ ++ //Allen initial gain 0xc50 ++ // Restore RX initial gain ++ ODM_SetBBReg(pDM_Odm, 0xc50, bMaskByte0, 0x50); ++ ODM_SetBBReg(pDM_Odm, 0xc50, bMaskByte0, tmp0xc50); ++ if(is2T){ ++ ODM_SetBBReg(pDM_Odm, 0xc58, bMaskByte0, 0x50); ++ ODM_SetBBReg(pDM_Odm, 0xc58, bMaskByte0, tmp0xc58); ++ } ++ ++ //load 0xe30 IQC default value ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_IQCalibrate_8723B() <==\n")); ++ ++} ++ ++ ++VOID ++phy_LCCalibrate_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN BOOLEAN is2T ++ ) ++{ ++ u1Byte tmpReg; ++ u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++#endif ++ if( pAdapter->registrypriv.mp_mode == 1 && pAdapter->mppriv.mode == 3 ) ++ { ++ DBG_871X("%s() :return !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n",__func__); ++ return; ++ } ++ ++ //Check continuous TX and Packet TX ++ tmpReg = ODM_Read1Byte(pDM_Odm, 0xd03); ++ ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg&0x8F); //disable all continuous TX ++ else // Deal with Packet TX case ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // block all queues ++ ++ if((tmpReg&0x70) != 0) ++ { ++ //1. Read original RF mode ++ //Path-A ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RF_Amode = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_B, RF_AC, bMask12Bits); ++#else ++ RF_Amode = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits); ++#endif ++ ++ //2. Set RF mode = standby mode ++ //Path-A ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); ++ ++ //Path-B ++ if(is2T) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); ++ } ++ ++ //3. Read RF reg18 ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ LC_Cal = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits); ++#else ++ LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits); ++#endif ++ ++ //4. Set LC calibration begin bit15 ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFBE0); // LDO ON ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); ++ ++ ODM_delay_ms(100); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFFE0); // LDO OFF ++ ++ // Channel 10 LC calibration issue for 8723bs with 26M xtal ++ if(pDM_Odm->SupportInterface == ODM_ITRF_SDIO && pDM_Odm->PackageType >= 0x2) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal); ++ } ++ ++ //Restore original situation ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ { ++ //Path-A ++ ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); ++ ++ //Path-B ++ if(is2T) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); ++ } ++ else // Deal with Packet TX case ++ { ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); ++ } ++} ++ ++//Analog Pre-distortion calibration ++#define APK_BB_REG_NUM 8 ++#define APK_CURVE_REG_NUM 4 ++#define PATH_NUM 2 ++ ++VOID ++phy_APCalibrate_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta, ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ u4Byte regD[PATH_NUM]; ++ u4Byte tmpReg, index, offset, apkbound; ++ u1Byte path, i, pathbound = PATH_NUM; ++ u4Byte BB_backup[APK_BB_REG_NUM]; ++ u4Byte BB_REG[APK_BB_REG_NUM] = { ++ rFPGA1_TxBlock, rOFDM0_TRxPathEnable, ++ rFPGA0_RFMOD, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, ++ rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; ++ u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x00204000 }; ++ u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x22204000 }; ++ ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, ++ {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} ++ }; ++ ++ u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings ++ {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} ++ }; ++ ++ u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, ++ {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} ++ }; ++ ++ u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} ++ }; ++ ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u4Byte APK_offset[PATH_NUM] = { ++ rConfig_AntA, rConfig_AntB}; ++ ++ u4Byte APK_normal_offset[PATH_NUM] = { ++ rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; ++ ++ u4Byte APK_value[PATH_NUM] = { ++ 0x92fc0000, 0x12fc0000}; ++ ++ u4Byte APK_normal_value[PATH_NUM] = { ++ 0x92680000, 0x12680000}; ++ ++ s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} ++ }; ++ ++ u4Byte APK_normal_setting_value_1[13] = { ++ 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, ++ 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, ++ 0x12680000, 0x00880000, 0x00880000 ++ }; ++ ++ u4Byte APK_normal_setting_value_2[16] = { ++ 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, ++ 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, ++ 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, ++ 0x00050006 ++ }; ++ ++ u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a ++// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; ++ ++ s4Byte BB_offset, delta_V, delta_offset; ++ ++#if MP_DRIVER == 1 ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++#else ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++#endif ++ pMptCtx->APK_bound[0] = 45; ++ pMptCtx->APK_bound[1] = 52; ++ ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_APCalibrate_8188E() delta %d\n", delta)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ if(!is2T) ++ pathbound = 1; ++ ++ //2 FOR NORMAL CHIP SETTINGS ++ ++// Temporarily do not allow normal driver to do the following settings because these offset ++// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal ++// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the ++// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. ++#if MP_DRIVER != 1 ++ return; ++#endif ++ //settings adjust for normal chip ++ for(index = 0; index < PATH_NUM; index ++) ++ { ++ APK_offset[index] = APK_normal_offset[index]; ++ APK_value[index] = APK_normal_value[index]; ++ AFE_on_off[index] = 0x6fdb25a4; ++ } ++ ++ for(index = 0; index < APK_BB_REG_NUM; index ++) ++ { ++ for(path = 0; path < pathbound; path++) ++ { ++ APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; ++ APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; ++ } ++ BB_AP_MODE[index] = BB_normal_AP_MODE[index]; ++ } ++ ++ apkbound = 6; ++ ++ //save BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0) //skip ++ continue; ++ BB_backup[index] = ODM_GetBBReg(pDM_Odm, BB_REG[index], bMaskDWord); ++ } ++ ++ //save MAC default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_SaveMACRegisters8723B(pAdapter, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters8723B(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#else ++ _PHY_SaveMACRegisters8723B(pDM_Odm, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters8723B(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#endif ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ++ ++ if(path == ODM_RF_PATH_A) ++ { ++ //path A APK ++ //load APK setting ++ //path-A ++ offset = rPdp_AntA; ++ for(index = 0; index < 11; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ for(; index < 13; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ ++ //path A ++ offset = rPdp_AntA; ++ for(index = 0; index < 16; index++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ } ++ else if(path == ODM_RF_PATH_B) ++ { ++ //path B APK ++ //load APK setting ++ //path-B ++ offset = rPdp_AntB; ++ for(index = 0; index < 10; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++#else ++ PHY_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++#endif ++ ++ offset = rConfig_AntA; ++ index = 11; ++ for(; index < 13; index ++) //offset 0xb68, 0xb6c ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ ++ //path B ++ offset = 0xb60; ++ for(index = 0; index < 16; index++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0); ++ } ++ ++ //save RF default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord); ++#else ++ regD[path] = ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord); ++#endif ++ ++ //Path A AFE all on, path B AFE All off or vise versa ++ for(index = 0; index < IQK_ADDA_REG_NUM ; index++) ++ ODM_SetBBReg(pDM_Odm, AFE_REG[index], bMaskDWord, AFE_on_off[path]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xe70 %x\n", ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord))); ++ ++ //BB to AP mode ++ if(path == 0) ++ { ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ else if (index < 5) ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); ++ else if (BB_REG[index] == 0x870) ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); ++ else ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], BIT10, 0x0); ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ } ++ else //path B ++ { ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x800 %x\n", ODM_GetBBReg(pDM_Odm, 0x800, bMaskDWord))); ++ ++ //MAC settings ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_MACSettingCalibration8723B(pAdapter, MAC_REG, MAC_backup); ++#else ++ _PHY_MACSettingCalibration8723B(pDM_Odm, MAC_REG, MAC_backup); ++#endif ++ ++ if(path == ODM_RF_PATH_A) //Path B to standby mode ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMaskDWord, 0x10000); ++ } ++ else //Path A to standby mode ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE2, bMaskDWord, 0x20103); ++ } ++ ++ delta_offset = ((delta+14)/2); ++ if(delta_offset < 0) ++ delta_offset = 0; ++ else if (delta_offset > 12) ++ delta_offset = 12; ++ ++ //AP calibration ++ for(index = 0; index < APK_BB_REG_NUM; index++) ++ { ++ if(index != 1) //only DO PA11+PAD01001, AP RF setting ++ continue; ++ ++ tmpReg = APK_RF_init_value[path][index]; ++#if 1 ++ if(!pDM_Odm->RFCalibrateInfo.bAPKThermalMeterIgnore) ++ { ++ BB_offset = (tmpReg & 0xF0000) >> 16; ++ ++ if(!(tmpReg & BIT15)) //sign bit 0 ++ { ++ BB_offset = -BB_offset; ++ } ++ ++ delta_V = APK_delta_mapping[index][delta_offset]; ++ ++ BB_offset += delta_V; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); ++ ++ if(BB_offset < 0) ++ { ++ tmpReg = tmpReg & (~BIT15); ++ BB_offset = -BB_offset; ++ } ++ else ++ { ++ tmpReg = tmpReg | BIT15; ++ } ++ tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); ++ } ++#endif ++ ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_IPA_A, bMaskDWord, 0x8992e); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_TXBIAS_A, bMaskDWord, tmpReg); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord))); ++#else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", ODM_GetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", ODM_GetRFReg(pDM_Odm, path, RF_AC, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord))); ++#endif ++ ++ // PA11+PAD01111, one shot ++ i = 0; ++ do ++ { ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x800000); ++ { ++ ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[0]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); ++ ODM_delay_ms(3); ++ ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[1]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); ++ ++ ODM_delay_ms(20); ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ if(path == ODM_RF_PATH_A) ++ tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0x03E00000); ++ else ++ tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0xF8000000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xbd8[25:21] %x\n", tmpReg)); ++ ++ ++ i++; ++ } ++ while(tmpReg > apkbound && i < 4); ++ ++ APK_result[path][index] = tmpReg; ++ } ++ } ++ ++ //reload MAC default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadMACRegisters8723B(pAdapter, MAC_REG, MAC_backup); ++#else ++ _PHY_ReloadMACRegisters8723B(pDM_Odm, MAC_REG, MAC_backup); ++#endif ++ ++ //reload BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]); ++ } ++ ++ //reload AFE default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadADDARegisters8723B(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#else ++ _PHY_ReloadADDARegisters8723B(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#endif ++ ++ //reload RF path default value ++ for(path = 0; path < pathbound; path++) ++ { ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0xd, bMaskDWord, regD[path]); ++ if(path == ODM_RF_PATH_B) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE2, bMaskDWord, 0x20101); ++ } ++ ++ //note no index == 0 ++ if (APK_result[path][1] > 6) ++ APK_result[path][1] = 6; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\n")); ++ ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x3, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); ++ if(path == ODM_RF_PATH_A) ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); ++ else ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G9_G11, bMaskDWord, ++ ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); ++#endif ++ } ++ ++ pDM_Odm->RFCalibrateInfo.bAPKdone = TRUE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8188E()\n")); ++} ++ ++ ++ ++#define DP_BB_REG_NUM 7 ++#define DP_RF_REG_NUM 1 ++#define DP_RETRY_LIMIT 10 ++#define DP_PATH_NUM 2 ++#define DP_DPK_NUM 3 ++#define DP_DPK_VALUE_NUM 2 ++ ++ ++ ++//IQK version:V2.5 20140123 ++//IQK is controlled by Is2ant, RF path ++VOID ++PHY_IQCalibrate_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bReCovery, ++ IN BOOLEAN bRestore, ++ IN BOOLEAN Is2ant, //false:1ant, true:2-ant ++ IN u1Byte RF_Path //0:S1, 1:S0 ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ ++ #if (MP_DRIVER == 1) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ #endif ++ #endif//(MP_DRIVER == 1) ++#endif ++ ++ s4Byte result[4][8]; //last is final result ++ u1Byte i, final_candidate, Indexforchannel; ++ BOOLEAN bPathAOK, bPathBOK; ++ s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; ++ BOOLEAN is12simular, is13simular, is23simular; ++ BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, ++ rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, ++ rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, ++ rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, ++ rOFDM0_RxIQExtAnta}; ++// u4Byte Path_SEL_BB = 0; ++ u4Byte GNT_BT_default; ++ u4Byte StartTime; ++ s4Byte ProgressingTime; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE) ) ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++#else ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++#ifdef MP_TEST ++ if(priv->pshare->rf_ft_var.mp_specific) ++ { ++ if((OPMODE & WIFI_MP_CTX_PACKET) || (OPMODE & WIFI_MP_CTX_ST)) ++ return; ++ } ++#endif ++ ++ if(priv->pshare->IQK_88E_done) ++ bReCovery= 1; ++ priv->pshare->IQK_88E_done = 1; ++ ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ ++#if MP_DRIVER == 1 ++ bStartContTx = pMptCtx->bStartContTx; ++ bSingleTone = pMptCtx->bSingleTone; ++ bCarrierSuppression = pMptCtx->bCarrierSuppression; ++#endif ++ ++ // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) ++ if(bSingleTone || bCarrierSuppression) ++ return; ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ if (pDM_Odm->RFCalibrateInfo.bIQKInProgress) ++ return; ++ ++ ++ ODM_AcquireSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ pDM_Odm->RFCalibrateInfo.bIQKInProgress = TRUE; ++ ODM_ReleaseSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ ++ if (bRestore) { ++ u4Byte offset, data; ++ u1Byte path, bResult = SUCCESS; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ //#define PATH_S0 1 // RF_PATH_B ++ //#define PATH_S1 0 // RF_PATH_A ++ ++ path = (RF_Path == 0 ? ODM_RF_PATH_A : ODM_RF_PATH_B); ++ ++ // Restore TX IQK ++ for (i = 0; i < 3; ++i) { ++ offset = pRFCalibrateInfo->TxIQC_8723B[path][i][0]; ++ data = pRFCalibrateInfo->TxIQC_8723B[path][i][1]; ++ if ((offset == 0) || (i == 1 && data == 0)) { /* 0xc80, 0xc88 ==> index=1 */ ++ DBG_871X("%s =>path:%s Restore TX IQK result failed\n", __func__, (path == ODM_RF_PATH_A) ? "A" : "B"); ++ bResult = FAIL; ++ break; ++ } ++ //RT_TRACE(_module_mp_, _drv_notice_,("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data)); ++ ODM_SetBBReg(pDM_Odm,offset, bMaskDWord, data); ++ } ++ ++ // Restore RX IQK ++ for (i = 0; i < 2; ++i) { ++ offset = pRFCalibrateInfo->RxIQC_8723B[path][i][0]; ++ data = pRFCalibrateInfo->RxIQC_8723B[path][i][1]; ++ if ((offset == 0) || (i == 0 && data == 0)) { /* 0xc14, 0xc1c ==> index=0 */ ++ DBG_871X("%s =>path:%s Restore RX IQK result failed\n", __func__, (path == ODM_RF_PATH_A) ? "A" : "B"); ++ bResult = FAIL; ++ break; ++ } ++ //RT_TRACE(_module_mp_, _drv_notice_,("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data)); ++ ODM_SetBBReg(pDM_Odm,offset, bMaskDWord, data); ++ } ++ ++ if (pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_A] ==0) { ++ DBG_871X("%s => Restore Path-A TxLOK result failed \n",__FUNCTION__); ++ bResult = FAIL; ++ } else { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXM_IDAC, bRFRegOffsetMask, pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_A]); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_TXM_IDAC, bRFRegOffsetMask, pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_B]); ++ } ++ ++ if (bResult == SUCCESS) ++ goto out; ++ } ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++ if(bReCovery) ++#else//for ODM_WIN ++ if(bReCovery && (!pAdapter->bInHctTest)) //YJ,add for PowerTest,120405 ++#endif ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("PHY_IQCalibrate_8723B: Return due to bReCovery!\n")); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadADDARegisters8723B(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); ++#else ++ _PHY_ReloadADDARegisters8723B(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); ++#endif ++ goto out; ++ } ++ StartTime = ODM_GetCurrentTime( pDM_Odm); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n")); ++ ++ //save default GNT_BT ++ GNT_BT_default = ODM_GetBBReg(pDM_Odm, 0x764, bMaskDWord); ++ // Save RF Path ++// Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++// Path_SEL_RF = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, 0xfffff); ++ ++ //set GNT_BT=0, pause BT traffic ++// ODM_SetBBReg(pDM_Odm, 0x764, BIT12, 0x0); ++// ODM_SetBBReg(pDM_Odm, 0x764, BIT11, 0x1); ++ ++ ++ for(i = 0; i < 8; i++) ++ { ++ result[0][i] = 0; ++ result[1][i] = 0; ++ result[2][i] = 0; ++ result[3][i] = 0; ++ } ++ final_candidate = 0xff; ++ bPathAOK = FALSE; ++ bPathBOK = FALSE; ++ is12simular = FALSE; ++ is23simular = FALSE; ++ is13simular = FALSE; ++ ++ ++ for (i=0; i<3; i++) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_IQCalibrate_8723B(pAdapter, result, i, Is2ant, RF_Path); ++#else ++ phy_IQCalibrate_8723B(pDM_Odm, result, i, Is2ant, RF_Path); ++#endif ++ ++ if(i == 1) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is12simular = phy_SimularityCompare_8723B(pAdapter, result, 0, 1); ++#else ++ is12simular = phy_SimularityCompare_8723B(pDM_Odm, result, 0, 1); ++#endif ++ if(is12simular) ++ { ++ final_candidate = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is12simular final_candidate is %x\n",final_candidate)); ++ break; ++ } ++ } ++ ++ if(i == 2) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is13simular = phy_SimularityCompare_8723B(pAdapter, result, 0, 2); ++#else ++ is13simular = phy_SimularityCompare_8723B(pDM_Odm, result, 0, 2); ++#endif ++ if(is13simular) ++ { ++ final_candidate = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is13simular final_candidate is %x\n",final_candidate)); ++ ++ break; ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is23simular = phy_SimularityCompare_8723B(pAdapter, result, 1, 2); ++#else ++ is23simular = phy_SimularityCompare_8723B(pDM_Odm, result, 1, 2); ++#endif ++ if(is23simular) ++ { ++ final_candidate = 1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n",final_candidate)); ++ } ++ else ++ { ++ for(i = 0; i < 8; i++) ++ RegTmp += result[3][i]; ++ ++ if(RegTmp != 0) ++ final_candidate = 3; ++ else ++ final_candidate = 0xFF; ++ } ++ } ++ } ++// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); ++ ++ for (i=0; i<4; i++) ++ { ++ RegE94 = result[i][0]; ++ RegE9C = result[i][1]; ++ RegEA4 = result[i][2]; ++ RegEAC = result[i][3]; ++ RegEB4 = result[i][4]; ++ RegEBC = result[i][5]; ++ RegEC4 = result[i][6]; ++ RegECC = result[i][7]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ } ++ ++ if(final_candidate != 0xff) ++ { ++ pDM_Odm->RFCalibrateInfo.RegE94 = RegE94 = result[final_candidate][0]; ++ pDM_Odm->RFCalibrateInfo.RegE9C = RegE9C = result[final_candidate][1]; ++ RegEA4 = result[final_candidate][2]; ++ RegEAC = result[final_candidate][3]; ++ pDM_Odm->RFCalibrateInfo.RegEB4 = RegEB4 = result[final_candidate][4]; ++ pDM_Odm->RFCalibrateInfo.RegEBC = RegEBC = result[final_candidate][5]; ++ RegEC4 = result[final_candidate][6]; ++ RegECC = result[final_candidate][7]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: final_candidate is %x\n",final_candidate)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ bPathAOK = bPathBOK = TRUE; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: FAIL use default value\n")); ++ ++ pDM_Odm->RFCalibrateInfo.RegE94 = pDM_Odm->RFCalibrateInfo.RegEB4 = 0x100; //X default value ++ pDM_Odm->RFCalibrateInfo.RegE9C = pDM_Odm->RFCalibrateInfo.RegEBC = 0x0; //Y default value ++ } ++ ++#if MP_DRIVER == 1 ++ if ((pMptCtx->MptRfPath == ODM_RF_PATH_A) || (pDM_Odm->mp_mode == FALSE)) ++#endif ++ { ++ if (RegE94 != 0) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PathAFillIQKMatrix8723B(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++#else ++ _PHY_PathAFillIQKMatrix8723B(pDM_Odm, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++#endif ++ } ++ } ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++#if MP_DRIVER == 1 ++ if ((pMptCtx->MptRfPath == ODM_RF_PATH_A) || (pDM_Odm->mp_mode == FALSE)) ++#endif ++ { ++ if (RegEB4 != 0) ++ { ++ _PHY_PathBFillIQKMatrix8723B(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); ++ } ++ } ++#endif ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ Indexforchannel = ODM_GetRightChnlPlaceforIQK(pHalData->CurrentChannel); ++#else ++ Indexforchannel = 0; ++#endif ++ ++//To Fix BSOD when final_candidate is 0xff ++//by sherry 20120321 ++ if(final_candidate < 4) ++ { ++ for(i = 0; i < IQK_Matrix_REG_NUM; i++) ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][i] = result[final_candidate][i]; ++ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE; ++ } ++ //RT_DISP(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ _PHY_SaveADDARegisters8723B(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); ++#else ++ _PHY_SaveADDARegisters8723B(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, IQK_BB_REG_NUM); ++#endif ++ ++ //restore GNT_BT ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, GNT_BT_default); ++ // Restore RF Path ++// ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF); ++ ++ //Resotr RX mode table parameter ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xe6177 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x300bd ); ++ ++ //set GNT_BT= HW control ++// ODM_SetBBReg(pDM_Odm, 0x764, BIT12, 0x0); ++// ODM_SetBBReg(pDM_Odm, 0x764, BIT11, 0x0); ++ ++ if (Is2ant) { ++ if (RF_Path == 0x0) //S1 ++ ODM_SetIQCbyRFpath(pDM_Odm, 0); ++ else //S0 ++ ODM_SetIQCbyRFpath(pDM_Odm, 1); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n")); ++ ProgressingTime = ODM_GetProgressingTime(pDM_Odm, StartTime); ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK ProgressingTime = %d\n", ProgressingTime)); ++ ++out: ++ ODM_AcquireSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ pDM_Odm->RFCalibrateInfo.bIQKInProgress = FALSE; ++ ODM_ReleaseSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++} ++ ++ ++VOID ++PHY_LCCalibrate_8723B( ++ PVOID pDM_VOID ++ ) ++{ ++ BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte timeout = 2000, timecount = 0; ++ u4Byte StartTime; ++ s4Byte ProgressingTime; ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ ++ #if (MP_DRIVER == 1) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ #endif ++ #endif//(MP_DRIVER == 1) ++#endif ++ ++ ++ ++ ++#if MP_DRIVER == 1 ++ bStartContTx = pMptCtx->bStartContTx; ++ bSingleTone = pMptCtx->bSingleTone; ++ bCarrierSuppression = pMptCtx->bCarrierSuppression; ++#endif ++ ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) ++ if(bSingleTone || bCarrierSuppression) ++ return; ++ ++ StartTime = ODM_GetCurrentTime( pDM_Odm); ++ while(*(pDM_Odm->pbScanInProcess) && timecount < timeout) ++ { ++ ODM_delay_ms(50); ++ timecount += 50; ++ } ++ ++ pDM_Odm->RFCalibrateInfo.bLCKInProgress = TRUE; ++ ++ ++ phy_LCCalibrate_8723B(pDM_Odm, FALSE); ++ ++ ++ pDM_Odm->RFCalibrateInfo.bLCKInProgress = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Finish!!!interface %d\n", pDM_Odm->InterfaceIndex)); ++ ProgressingTime = ODM_GetProgressingTime( pDM_Odm, StartTime); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK ProgressingTime = %d\n", ProgressingTime)); ++} ++ ++VOID ++PHY_APCalibrate_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ return; ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ ++#if FOR_BRAZIL_PRETEST != 1 ++ if(pDM_Odm->RFCalibrateInfo.bAPKdone) ++#endif ++ return; ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if(IS_2T2R( pHalData->VersionID)){ ++ phy_APCalibrate_8723B(pAdapter, delta, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_APCalibrate_8723B(pAdapter, delta, FALSE); ++#else ++ phy_APCalibrate_8723B(pDM_Odm, delta, FALSE); ++#endif ++ } ++} ++VOID phy_SetRFPathSwitch_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bMain, ++ IN BOOLEAN is2T ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#endif ++ ++ if(bMain) // Left antenna ++ { ++ ODM_SetBBReg(pDM_Odm, 0x92C, bMaskDWord, 0x1); ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0x92C, bMaskDWord, 0x2); ++ } ++} ++VOID PHY_SetRFPathSwitch_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bMain ++ ) ++{ ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_SetRFPathSwitch_8723B(pAdapter, bMain, TRUE); ++#endif ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++//digital predistortion ++VOID ++phy_DigitalPredistortion8723B( ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PADAPTER pAdapter, ++#else ++ IN PDM_ODM_T pDM_Odm, ++#endif ++ IN BOOLEAN is2T ++ ) ++{ ++#if (RT_PLATFORM == PLATFORM_WINDOWS) ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ u4Byte tmpReg, tmpReg2, index, i; ++ u1Byte path, pathbound = PATH_NUM; ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte BB_backup[DP_BB_REG_NUM]; ++ u4Byte BB_REG[DP_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rFPGA0_RFMOD, ++ rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE}; ++ u4Byte BB_settings[DP_BB_REG_NUM] = { ++ 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, ++ 0x0, 0x0, 0x0}; ++ ++ u4Byte RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; ++ u4Byte RF_REG[DP_RF_REG_NUM] = { ++ RF_TXBIAS_A}; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = { ++ {0x1e1e1e1e, 0x03901e1e}, ++ {0x18181818, 0x03901818}, ++ {0x0e0e0e0e, 0x03900e0e} ++ }; ++ ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u1Byte RetryCount = 0; ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_DigitalPredistortion8723B()\n")); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_DigitalPredistortion8723B for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ ++ //save BB default value ++ for(index=0; index tx_agc 1f ~11 ++ // PA gain = 11 & PAD2 => tx_agc 10~0e ++ // PA gain = 01 => tx_agc 0b~0d ++ // PA gain = 00 => tx_agc 0a~00 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 3; index++) ++ ODM_SetBBReg(pDM_Odm, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, Tx_AGC[i][1]); ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02097098); ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path A ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x80047788); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x00047788); ++ ODM_delay_ms(50); ++ } ++ ++ //PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 3; index++) ++ ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, 0x34343434); ++ ODM_SetBBReg(pDM_Odm,0xe08+index*4, bMaskDWord, 0x03903434); ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, 0x34343434); ++ ++ //==================================== ++ // PAGE_B for Path-A DPK setting ++ //==================================== ++ // open inner loopback @ b00[19]:10 od 0xb00 0x01097018 ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02017098); ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); ++ ++ //rf_lpbk_setup ++ //1.rf 00:5205a, rf 0d:0e52c ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0c, bMaskDWord, 0x8992b); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0d, bMaskDWord, 0x0e52c); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bMaskDWord, 0x5205a ); ++ ++ //----send one shot signal----// ++ // Path A ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathAOK) ++ { ++ //----read back measurement results----// ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c297018); ++ tmpReg = ODM_GetBBReg(pDM_Odm, 0xbe0, bMaskDWord); ++ ODM_delay_ms(10); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c29701f); ++ tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbe8, bMaskDWord); ++ ODM_delay_ms(10); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff ) ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x02017098); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x800000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ RetryCount++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2)); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK Sucess\n")); ++ pDM_Odm->RFCalibrateInfo.bDPPathAOK = TRUE; ++ break; ++ } ++ } ++ RetryCount = 0; ++ ++ //DPP path A ++ if(pDM_Odm->RFCalibrateInfo.bDPPathAOK) ++ { ++ // DP settings ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x01017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x776d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00880000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ ++ for(i=rPdp_AntA; i<=0xb3c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A ofsset = 0x%x\n", i)); ++ } ++ ++ //pwsf ++ ODM_SetBBReg(pDM_Odm, 0xb40, bMaskDWord, 0x40404040); ++ ODM_SetBBReg(pDM_Odm, 0xb44, bMaskDWord, 0x28324040); ++ ODM_SetBBReg(pDM_Odm, 0xb48, bMaskDWord, 0x10141920); ++ ++ for(i=0xb4c; i<=0xb5c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ //TX_AGC boundary ++ ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x00000000); ++ } ++ ++ //DPK path B ++ if(is2T) ++ { ++ //Path A to standby mode ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ ++ // LUTs => tx_agc ++ // PA gain = 11 & PAD1, => tx_agc 1f ~11 ++ // PA gain = 11 & PAD2, => tx_agc 10 ~0e ++ // PA gain = 01 => tx_agc 0b ~0d ++ // PA gain = 00 => tx_agc 0a ~00 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02097098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path B ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntB, bMaskDWord, 0x80047788); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x00047788); ++ ODM_delay_ms(50); ++ } ++ ++ // PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, 0x34343434); ++ ++ // PAGE_B for Path-B DPK setting ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ // RF lpbk switches on ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x0101000f); ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x01120103); ++ ++ //Path-B RF lpbk ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x0c, bMaskDWord, 0x8992b); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x0d, bMaskDWord, 0x0e52c); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMaskDWord, 0x5205a); ++ ++ //----send one shot signal----// ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathBOK) ++ { ++ //----read back measurement results----// ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c297018); ++ tmpReg = ODM_GetBBReg(pDM_Odm, 0xbf0, bMaskDWord); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c29701f); ++ tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbf8, bMaskDWord); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff) ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x800000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ RetryCount++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2)); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK Success\n")); ++ pDM_Odm->RFCalibrateInfo.bDPPathBOK = TRUE; ++ break; ++ } ++ } ++ ++ //DPP path B ++ if(pDM_Odm->RFCalibrateInfo.bDPPathBOK) ++ { ++ // DP setting ++ // LUT by SRAM ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x01017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x776d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ++ for(i=0xb60; i<=0xb9c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B ofsset = 0x%x\n", i)); ++ } ++ ++ // PWSF ++ ODM_SetBBReg(pDM_Odm, 0xba0, bMaskDWord, 0x40404040); ++ ODM_SetBBReg(pDM_Odm, 0xba4, bMaskDWord, 0x28324050); ++ ODM_SetBBReg(pDM_Odm, 0xba8, bMaskDWord, 0x0c141920); ++ ++ for(i=0xbac; i<=0xbbc; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ // tx_agc boundary ++ ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ++ ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x00000000); ++ } ++ } ++ ++ //reload BB default value ++ for(index=0; indexRFCalibrateInfo.bDPdone = TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_DigitalPredistortion8723B()\n")); ++#endif ++} ++ ++VOID ++PHY_DigitalPredistortion_8723B( ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PADAPTER pAdapter ++#else ++ IN PDM_ODM_T pDM_Odm ++#endif ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ return; ++ ++ if(pDM_Odm->RFCalibrateInfo.bDPdone) ++ return; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if(IS_2T2R( pHalData->VersionID)){ ++ phy_DigitalPredistortion8723B(pAdapter, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++ phy_DigitalPredistortion8723B(pAdapter, FALSE); ++ } ++} ++ ++ ++ ++//return value TRUE => Main; FALSE => Aux ++ ++BOOLEAN phy_QueryRFPathSwitch_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ ++ if(ODM_GetBBReg(pDM_Odm, 0x92C, bMaskDWord) == 0x01) ++ return TRUE; ++ else ++ return FALSE; ++ ++} ++ ++ ++ ++//return value TRUE => Main; FALSE => Aux ++BOOLEAN PHY_QueryRFPathSwitch_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++#if DISABLE_BB_RF ++ return TRUE; ++#endif ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ return phy_QueryRFPathSwitch_8723B(pAdapter, FALSE); ++#else ++ return phy_QueryRFPathSwitch_8723B(pDM_Odm, FALSE); ++#endif ++ ++} ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_ce.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_ce.h +new file mode 100644 +index 0000000..feb77d8 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_ce.h +@@ -0,0 +1,134 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL_PHY_RF_8723B_H__ ++#define __HAL_PHY_RF_8723B_H__ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define IQK_DELAY_TIME_8723B 20 //ms ++#define IQK_DEFERRED_TIME_8723B 4 ++#define index_mapping_NUM_8723B 15 ++#define AVG_THERMAL_NUM_8723B 4 ++#define RF_T_METER_8723B 0x42 // ++ ++ ++void ConfigureTxpowerTrack_8723B( ++ PTXPWRTRACK_CFG pConfig ++ ); ++ ++void DoIQK_8723B( ++ PVOID pDM_VOID, ++ u1Byte DeltaThermalIndex, ++ u1Byte ThermalValue, ++ u1Byte Threshold ++ ); ++ ++VOID ++ODM_TxPwrTrackSetPwr_8723B( ++ IN PVOID pDM_VOID, ++ PWRTRACK_METHOD Method, ++ u1Byte RFPath, ++ u1Byte ChannelMappedIndex ++ ); ++ ++//1 7. IQK ++ ++void ++PHY_IQCalibrate_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER Adapter, ++#endif ++ IN BOOLEAN bReCovery, ++ IN BOOLEAN bRestore, ++ IN BOOLEAN Is2ant, ++ IN u1Byte RF_Path); ++ ++VOID ++ODM_SetIQCbyRFpath( ++//#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++//#else ++ //IN PADAPTER pAdapter, ++//#endif ++ IN u4Byte RFpath ++ ); ++ ++// ++// LC calibrate ++// ++void ++PHY_LCCalibrate_8723B( ++ IN PVOID pDM_VOID ++); ++ ++// ++// AP calibrate ++// ++void ++PHY_APCalibrate_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta); ++void ++PHY_DigitalPredistortion_8723B( IN PADAPTER pAdapter); ++ ++ ++VOID ++_PHY_SaveADDARegisters_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegisterNum ++ ); ++ ++VOID ++_PHY_PathADDAOn_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN BOOLEAN isPathAOn, ++ IN BOOLEAN is2T ++ ); ++ ++VOID ++_PHY_MACSettingCalibration_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ); ++ ++#endif // #ifndef __HAL_PHY_RF_8188E_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_win.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_win.c +new file mode 100644 +index 0000000..16d149e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_win.c +@@ -0,0 +1,3992 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++// 2010/04/25 MH Define the max tx power tracking tx agc power. ++#define ODM_TXPWRTRACK_MAX_IDX8723B 6 ++ ++// MACRO definition for pRFCalibrateInfo->TxIQC_8723B[0] ++#define PATH_S0 1 // RF_PATH_B ++#define IDX_0xC94 0 ++#define IDX_0xC80 1 ++#define IDX_0xC4C 2 ++#define IDX_0xC14 0 ++#define IDX_0xCA0 1 ++#define KEY 0 ++#define VAL 1 ++ ++// MACRO definition for pRFCalibrateInfo->TxIQC_8723B[1] ++#define PATH_S1 0 // RF_PATH_A ++#define IDX_0xC9C 0 ++#define IDX_0xC88 1 ++#define IDX_0xC4C 2 ++#define IDX_0xC1C 0 ++#define IDX_0xC78 1 ++ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++//3============================================================ ++//3 Tx Power Tracking ++//3============================================================ ++ ++ ++void setIqkMatrix_8723B( ++ PDM_ODM_T pDM_Odm, ++ u1Byte OFDM_index, ++ s4Byte IqkResultS1_X, ++ s4Byte IqkResultS1_Y, ++ s4Byte IqkResultS0_X, ++ s4Byte IqkResultS0_Y ++ ) ++{ ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ++ s4Byte ele_A=0, ele_D, ele_C=0, value32; ++ s4Byte ele_A_ext = 0, ele_C_ext = 0; ++ u1Byte RFPath = ODM_RF_PATH_A; ++ ++ if(pDM_Odm->mp_mode) ++ { ++ // MP driver => Check which antenna is using now ++ value32 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskLWord); ++ if(value32 == 0x280 || value32 == 0x80) ++ RFPath = ODM_RF_PATH_B; ++ } ++ else ++ { ++ // If Dual Antenna && Antenna diversity change antenna to S0 (path B) => Change RFPath to pathB ++ // If USB interface or efuse 0xc3 = 51(1-ant , path B) ==> swith to pathB ++ if(((*pDM_Odm->pIs1Antenna == TRUE)&&(*pDM_Odm->pRFDefaultPath == 1))||(pDM_Odm->SupportInterface == ODM_ITRF_USB) ++ ||((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) && (pDM_FatTable->RxIdleAnt == AUX_ANT))) ++ RFPath = ODM_RF_PATH_B; ++ } ++ ++ ++ if (OFDM_index >= OFDM_TABLE_SIZE) ++ OFDM_index = OFDM_TABLE_SIZE-1; ++ else if (OFDM_index < 0) ++ OFDM_index = 0; ++ ++ ele_D = (OFDMSwingTable_New[OFDM_index] & 0xFFC00000)>>22; ++ ++ // S1------------------------------------- ++ if ((IqkResultS1_X & 0x00000200) != 0) //consider minus ++ IqkResultS1_X = IqkResultS1_X | 0xFFFFFC00; ++ ele_A = ((IqkResultS1_X * ele_D)>>8)&0x000003FF; ++ ele_A_ext = ((IqkResultS1_X * ele_D)>>7) & 0x1; ++ ++ if ((IqkResultS1_Y & 0x00000200) != 0) ++ IqkResultS1_Y = IqkResultS1_Y | 0xFFFFFC00; ++ ele_C = ((IqkResultS1_Y * ele_D)>>8)&0x000003FF; ++ ele_C_ext = ((IqkResultS1_Y * ele_D)>>7) & 0x1; ++ ++ value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL] = value32; ++ ++ value32 = ((ele_C&0x000003C0)>>6)<<28; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL] = ++ (pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL] & (~(bMaskH4Bits))) | value32; ++ ++ value32 = ((((IqkResultS1_X * ele_D)>>7)&0x01)<<28) | (ele_A_ext << 31) | (ele_C_ext << 29) ; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL] = ++ (pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL] & (~(BIT31|BIT29|BIT28))) | value32; ++ ++ ++ // S0------------------------------------- ++ if(pDM_Odm->mp_mode || (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) || ((*pDM_Odm->pIs1Antenna == TRUE)&&(*pDM_Odm->pRFDefaultPath == 1)) ++ || (pDM_Odm->SupportInterface == ODM_ITRF_USB) || (*pDM_Odm->pIs1Antenna == FALSE)) ++ { ++ ele_A=0; ++ ele_C=0; ++ ++ if ((IqkResultS0_X & 0x00000200) != 0) //consider minus ++ IqkResultS0_X = IqkResultS0_X | 0xFFFFFC00; ++ ele_A = ((IqkResultS0_X * ele_D)>>8)&0x000003FF; ++ ele_A_ext = ((IqkResultS0_X * ele_D)>>7) & 0x1; ++ ++ if ((IqkResultS0_Y & 0x00000200) != 0) ++ IqkResultS0_Y = IqkResultS0_Y | 0xFFFFFC00; ++ ele_C = ((IqkResultS0_Y * ele_D)>>8)&0x000003FF; ++ ele_C_ext = ((IqkResultS0_Y * ele_D)>>7) & 0x1; ++ ++ value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL] = value32; ++ ++ value32 = ((ele_C&0x000003C0)>>6)<<28; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][VAL] = ++ (pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][VAL] & (~(bMaskH4Bits))) | value32; ++ ++ value32 = ((((IqkResultS0_X * ele_D)>>7)&0x01)<<28) | (ele_A_ext << 31) | (ele_C_ext << 29) ; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][VAL] = ++ (pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][VAL] & (~(BIT31|BIT29|BIT28))) | value32; ++ } ++ ++ //Set register by path------------------------------ ++ if((((IqkResultS1_X != 0) && (RFPath == ODM_RF_PATH_A)) || ++ ((IqkResultS0_X != 0) && (RFPath == ODM_RF_PATH_B))) && ++ (*(pDM_Odm->pBandType) == ODM_BAND_2_4G)) ++ { ++ switch (RFPath) ++ { ++ case ODM_RF_PATH_A: ++ //wirte new elements A, C, D to regC80 and regC94, element B is always 0 ++ // for 8723B S1 ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL]); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, ((pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL])>>28)); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord); ++ value32 = (value32 & (~(BIT31|BIT29|BIT28))) | (pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL] & (BIT31|BIT29|BIT28)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord, value32); ++ break; ++ case ODM_RF_PATH_B: ++ //wirte new elements A, C, D to regC80 and regC94, element B is always 0 ++ // for 8723B S0 ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL]); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, ((pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][VAL])>>28)); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord); ++ value32 = (value32 & (~(BIT31|BIT29|BIT28))) | (pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][VAL] & (BIT31|BIT29|BIT28)); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord, value32); ++ break; ++ default: ++ break; ++ } ++ } ++ else ++ { ++ // default IQK value (if current Antenna has default IQK value) ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); ++ ++ value32 = ODM_GetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord); ++ value32 = (value32 & (~(BIT31|BIT29|BIT28))); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord, value32); ++ } ++} ++ ++ ++VOID ++setCCKFilterCoefficient( ++ PDM_ODM_T pDM_Odm, ++ u1Byte CCKSwingIndex ++) ++{ ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ if(!pRFCalibrateInfo->bCCKinCH14) ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13_New[CCKSwingIndex][7]); ++ } ++ else ++ { ++ ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14_New[CCKSwingIndex][0]); ++ ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14_New[CCKSwingIndex][1]); ++ ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14_New[CCKSwingIndex][2]); ++ ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14_New[CCKSwingIndex][3]); ++ ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14_New[CCKSwingIndex][4]); ++ ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14_New[CCKSwingIndex][5]); ++ ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14_New[CCKSwingIndex][6]); ++ ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14_New[CCKSwingIndex][7]); ++ } ++} ++ ++void DoIQK_8723B( ++ PVOID pDM_VOID, ++ u1Byte DeltaThermalIndex, ++ u1Byte ThermalValue, ++ u1Byte Threshold ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER Adapter = pDM_Odm->Adapter; ++#endif ++ ++ ODM_ResetIQKResult(pDM_Odm); ++ ++ ++ pDM_Odm->RFCalibrateInfo.ThermalValue_IQK= ThermalValue; ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_IQCalibrate_8723B(pDM_Odm, FALSE); ++#else ++ PHY_IQCalibrate_8723B(Adapter, FALSE); ++#endif ++ ++ ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: odm_TxPwrTrackSetPwr88E() ++ * ++ * Overview: 88E change all channel tx power accordign to flag. ++ * OFDM & CCK are all different. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 04/23/2012 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++ODM_TxPwrTrackSetPwr_8723B( ++ PDM_ODM_T pDM_Odm, ++ PWRTRACK_METHOD Method, ++ u1Byte RFPath, ++ u1Byte ChannelMappedIndex ++ ) ++{ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ u1Byte PwrTrackingLimit_OFDM = 34; //+0dB ++ u1Byte PwrTrackingLimit_CCK= 28; //-2dB ++ u1Byte TxRate = 0xFF; ++ u1Byte Final_OFDM_Swing_Index = 0; ++ u1Byte Final_CCK_Swing_Index = 0; ++ u1Byte i = 0; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ if (pDM_Odm->mp_mode == TRUE) { ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ #if (MP_DRIVER == 1) ++ PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); ++ ++ TxRate = MptToMgntRate(pMptCtx->MptRateIndex); ++ #endif ++ #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); ++ ++ TxRate = MptToMgntRate(pMptCtx->MptRateIndex); ++ #endif ++ #endif ++ } else { ++ u2Byte rate = *(pDM_Odm->pForcedDataRate); ++ ++ if (!rate) { /*auto rate*/ ++ if (rate != 0xFF) { ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); ++ #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ TxRate = HwRateToMRate(pDM_Odm->TxRate); ++ #endif ++ } ++ } else { /*force rate*/ ++ TxRate = (u1Byte)rate; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>ODM_TxPwrTrackSetPwr8723B\n")); ++ ++ if(TxRate != 0xFF) ++ { ++ //2 CCK ++ if((TxRate >= MGN_1M)&&(TxRate <= MGN_11M)) ++ PwrTrackingLimit_CCK = 28; //-2dB ++ //2 OFDM ++ else if((TxRate >= MGN_6M)&&(TxRate <= MGN_48M)) ++ PwrTrackingLimit_OFDM= 36; //+3dB ++ else if(TxRate == MGN_54M) ++ PwrTrackingLimit_OFDM= 34; //+2dB ++ ++ //2 HT ++ else if((TxRate >= MGN_MCS0)&&(TxRate <= MGN_MCS2)) //QPSK/BPSK ++ PwrTrackingLimit_OFDM= 38; //+4dB ++ else if((TxRate >= MGN_MCS3)&&(TxRate <= MGN_MCS4)) //16QAM ++ PwrTrackingLimit_OFDM= 36; //+3dB ++ else if((TxRate >= MGN_MCS5)&&(TxRate <= MGN_MCS7)) //64QAM ++ PwrTrackingLimit_OFDM= 34; //+2dB ++ ++ else ++ PwrTrackingLimit_OFDM = pRFCalibrateInfo->DefaultOfdmIndex; //Default OFDM index = 30 ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("TxRate=0x%x, PwrTrackingLimit=%d\n", TxRate, PwrTrackingLimit_OFDM)); ++ ++ if (Method == TXAGC) ++ { ++ u1Byte rf = 0; ++ u4Byte pwr = 0, TxAGC = 0; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr8723B CH=%d\n", *(pDM_Odm->pChannel))); ++ ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE )) ++#if (MP_DRIVER != 1) ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, CCK ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++#else ++ pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); ++ pwr += pRFCalibrateInfo->PowerIndexOffset[RFPath]; ++ PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr); ++ TxAGC = (pwr<<16)|(pwr<<8)|(pwr); ++ PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); ++ RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr8723B: CCK Tx-rf(A) Power = 0x%x\n", TxAGC)); ++ ++ pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); ++ pwr += (pRFCalibrateInfo->BbSwingIdxOfdm[RFPath] - pRFCalibrateInfo->BbSwingIdxOfdmBase[RFPath]); ++ TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr8723B: OFDM Tx-rf(A) Power = 0x%x\n", TxAGC)); ++#endif ++#endif ++ } ++ else if (Method == BBSWING) ++ { ++ Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ ++ // Adjust BB swing by OFDM IQ matrix ++ if (Final_OFDM_Swing_Index >= PwrTrackingLimit_OFDM) ++ Final_OFDM_Swing_Index = PwrTrackingLimit_OFDM; ++ else if (Final_OFDM_Swing_Index < 0) ++ Final_OFDM_Swing_Index = 0; ++ ++ if (Final_CCK_Swing_Index >= CCK_TABLE_SIZE) ++ Final_CCK_Swing_Index = CCK_TABLE_SIZE-1; ++ else if (pRFCalibrateInfo->BbSwingIdxCck < 0) ++ Final_CCK_Swing_Index = 0; ++ ++ setIqkMatrix_8723B(pDM_Odm, Final_OFDM_Swing_Index, ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][4], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][5]); ++ ++ setCCKFilterCoefficient(pDM_Odm, Final_CCK_Swing_Index); ++ ++ } ++ else if (Method == MIX_MODE) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("pRFCalibrateInfo->DefaultOfdmIndex=%d, pDM_Odm->DefaultCCKIndex=%d, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n", ++ pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->DefaultCckIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath],RFPath )); ++ ++ Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; ++ ++ if(Final_OFDM_Swing_Index > PwrTrackingLimit_OFDM ) //BBSwing higher then Limit ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index - PwrTrackingLimit_OFDM; ++ ++ setIqkMatrix_8723B(pDM_Odm, PwrTrackingLimit_OFDM, ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][4], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][5]); ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A Over BBSwing Limit , PwrTrackingLimit = %d , Remnant TxAGC Value = %d \n", ++ PwrTrackingLimit_OFDM, pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath])); ++ } ++ else if (Final_OFDM_Swing_Index < 0) ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index ; ++ ++ setIqkMatrix_8723B(pDM_Odm, 0, ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][4], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][5]); ++ ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = TRUE; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A Lower then BBSwing lower bound 0 , Remnant TxAGC Value = %d \n", ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath])); ++ } ++ else ++ { ++ setIqkMatrix_8723B(pDM_Odm, Final_OFDM_Swing_Index, ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][4], ++ pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][5]); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); ++ ++ if(pRFCalibrateInfo->Modify_TxAGC_Flag_PathA) //If TxAGC has changed, reset TxAGC again ++ { ++ pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath] = 0; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, OFDM ); ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, HT_MCS0_MCS7 ); ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A pDM_Odm->Modify_TxAGC_Flag = FALSE \n")); ++ } ++ } ++ ++ if(Final_CCK_Swing_Index > PwrTrackingLimit_CCK) ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = Final_CCK_Swing_Index - PwrTrackingLimit_CCK; ++ setCCKFilterCoefficient(pDM_Odm, PwrTrackingLimit_CCK); ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, CCK ); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A CCK Over Limit , PwrTrackingLimit_CCK = %d , pRFCalibrateInfo->Remnant_CCKSwingIdx = %d \n", PwrTrackingLimit_CCK, pRFCalibrateInfo->Remnant_CCKSwingIdx)); ++ } ++ else if(Final_CCK_Swing_Index < 0) // Lowest CCK Index = 0 ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = Final_CCK_Swing_Index; ++ setCCKFilterCoefficient(pDM_Odm, 0); ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, CCK ); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A CCK Under Limit , PwrTrackingLimit_CCK = %d , pRFCalibrateInfo->Remnant_CCKSwingIdx = %d \n", 0, pRFCalibrateInfo->Remnant_CCKSwingIdx)); ++ } ++ else ++ { ++ setCCKFilterCoefficient(pDM_Odm, Final_CCK_Swing_Index); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A CCK Compensate with BBSwing , Final_CCK_Swing_Index = %d \n", Final_CCK_Swing_Index)); ++ ++ if(pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK) //If TxAGC has changed, reset TxAGC again ++ { ++ pRFCalibrateInfo->Remnant_CCKSwingIdx = 0; ++ PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, CCK ); ++ pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK= FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ++ ("******Path_A pDM_Odm->Modify_TxAGC_Flag_CCK = FALSE \n")); ++ } ++ } ++ } ++ else ++ { ++ return; // This method is not supported. ++ } ++} ++ ++VOID ++GetDeltaSwingTable_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ OUT pu1Byte *TemperatureUP_A, ++ OUT pu1Byte *TemperatureDOWN_A, ++ OUT pu1Byte *TemperatureUP_B, ++ OUT pu1Byte *TemperatureDOWN_B ++ ) ++{ ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u1Byte TxRate = 0xFF; ++ u1Byte channel = pHalData->CurrentChannel; ++ ++ if (pDM_Odm->mp_mode == TRUE) { ++ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ #if (MP_DRIVER == 1) ++ PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); ++ ++ TxRate = MptToMgntRate(pMptCtx->MptRateIndex); ++ #endif ++ #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); ++ ++ TxRate = MptToMgntRate(pMptCtx->MptRateIndex); ++ #endif ++ #endif ++ } else { ++ u2Byte rate = *(pDM_Odm->pForcedDataRate); ++ ++ if (!rate) { /*auto rate*/ ++ if (rate != 0xFF) { ++ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) ++ TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); ++ #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) ++ TxRate = HwRateToMRate(pDM_Odm->TxRate); ++ #endif ++ } ++ } else { /*force rate*/ ++ TxRate = (u1Byte)rate; ++ } ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate)); ++ ++ if ( 1 <= channel && channel <= 14) { ++ if (IS_CCK_RATE(TxRate)) { ++ *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P; ++ *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N; ++ *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P; ++ *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N; ++ } else { ++ *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P; ++ *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N; ++ *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P; ++ *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N; ++ } ++ } else if ( 36 <= channel && channel <= 64) { ++ *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[0]; ++ *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[0]; ++ *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[0]; ++ *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[0]; ++ } else if ( 100 <= channel && channel <= 140) { ++ *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[1]; ++ *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[1]; ++ *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[1]; ++ *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[1]; ++ } else if ( 149 <= channel && channel <= 173) { ++ *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[2]; ++ *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[2]; ++ *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[2]; ++ *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[2]; ++ } else { ++ *TemperatureUP_A = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; ++ *TemperatureDOWN_A = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; ++ *TemperatureUP_B = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; ++ *TemperatureDOWN_B = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; ++ } ++ ++ return; ++} ++ ++ ++void ConfigureTxpowerTrack_8723B( ++ PTXPWRTRACK_CFG pConfig ++ ) ++{ ++ pConfig->SwingTableSize_CCK = CCK_TABLE_SIZE; ++ pConfig->SwingTableSize_OFDM = OFDM_TABLE_SIZE; ++ pConfig->Threshold_IQK = IQK_THRESHOLD; ++ pConfig->AverageThermalNum = AVG_THERMAL_NUM_92E; ++ pConfig->RfPathCount = MAX_PATH_NUM_8723B; ++ pConfig->ThermalRegAddr = RF_T_METER_88E; ++ ++ pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr_8723B; ++ pConfig->DoIQK = DoIQK_8723B; ++ pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8723B; ++ pConfig->GetDeltaSwingTable = GetDeltaSwingTable_8723B; ++} ++ ++//1 7. IQK ++#define MAX_TOLERANCE 5 ++#define IQK_DELAY_TIME 1 //ms ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_IQK_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, Path_SEL_BB/*, regEA4*/; ++ u1Byte result = 0x00; ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S1 TX IQK!\n")); ++ //save RF path ++ Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++ ++ //1 Tx IQK ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x8214010a); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x821403ea); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ // enable path A PA in TXIQK mode ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x20000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0003f ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87 ); ++ ++ //enter IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ //RF switch to S1 ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); ++ ++ //set GNT_BT=0, pause BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x1); ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x764 when IQK= 0x%x\n", ODM_GetBBReg(pDM_Odm, 0x764, bMaskDWord))); ++ ++ //One shot, path A LOK & IQK ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //set GNT_BT=1, enable BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x3); ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x764 after IQK= 0x%x\n", ODM_GetBBReg(pDM_Odm, 0x764, bMaskDWord))); ++ ++ //reload RF path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord))); ++ ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42)) ++ ++ result |= 0x01; ++ ++ return result; ++ ++#if 0 ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ RT_DISP(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); ++#endif ++ } ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathA_RxIQK8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, regEA4, u4tmp,tmp,Path_SEL_BB; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ //save RF path ++ Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S1 RX IQK:Get TXIMR setting\n")); ++ //1 Get TXIMR setting ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ++// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160ff0); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ //modify RXIQK mode table ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f); ++ //S1 IQK PA off ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7df7); ++ //S0 IQK PA off ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1 ); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60fed); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60efd); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); ++ //set GNT_BT=0, pause BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x1); ++ ++ //One shot, path A LOK & IQK ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //set GNT_BT=1, enable BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x3); ++ ++ //reload RF path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord))); ++ ++ //Allen 20141201 ++ tmp=(regE9C & 0x03FF0000)>>16; ++ if ((tmp & 0x200)> 0) ++ tmp = 0x400 - tmp; ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) && ++ (((regE94 & 0x03FF0000)>>16) <0x11a) && ++ (((regE94 & 0x03FF0000)>>16) >0xe6) && ++ (tmp <0x1a)) ++ ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++ ++ ++ ++ u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe40 = 0x%x u4tmp = 0x%x \n", ODM_GetBBReg(pDM_Odm, rTx_IQK, bMaskDWord), u4tmp)); ++ ++ //1 RX IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S1 RX IQK\n")); ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2816081f); ++// ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2816001f); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1); ++ ++ ++ //modify RXIQK mode table ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f ); ++ //S1 PA off ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77 ); ++ ++ //S1 PA, PAD setting ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x55, bRFRegOffsetMask, 0x40207 ); ++ ++ //enter IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ++ //switch to S1 ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); ++ ++ //set GNT_BT=0, pause BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x1); ++ ++ //One shot, path A LOK & IQK ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //set GNT_BT=1, enable BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x3); ++ ++ //reload RF path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ // PA/PAD controlled by 0x0 ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x780 ); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xea4 = 0x%x, 0xeac = 0x%x\n", regEA4, regEAC)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xea0(before IQK)= 0x%x, 0xea8(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xea0, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xea8, bMaskDWord))); ++ ++ //Allen 20131125 ++ tmp=(regEAC & 0x03FF0000)>>16; ++ if ((tmp & 0x200)> 0) ++ tmp = 0x400 - tmp; ++ ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)&& ++ (((regEA4 & 0x03FF0000)>>16) < 0x110) && ++ (((regEA4 & 0x03FF0000)>>16) > 0xf0) && ++ (tmp <0xf)) ++ result |= 0x02; ++ else //if Tx not OK, ignore Rx ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK fail!!\n")); ++ ++ return result; ++} ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathB_IQK_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ u4Byte regEAC, regE94, regE9C, Path_SEL_BB/*, regEC4, regECC*/; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S0 TX IQK!\n")); ++ ++ //save RF path ++ Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++ ++ //1 Tx IQK ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ //path-A IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ++// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82140114); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x821403ea); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ // enable path B PA in TXIQK mode ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x40fc1); ++ ++ //enter IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ++ //RF switch to S0 ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++ ++ //set GNT_BT=0, pause BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x1); ++ ++ //One shot, path B LOK & IQK ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //set GNT_BT=1, enable BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x3); ++ ++ //reload RF path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0x948 = 0x%x\n", ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord))); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord))); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42)) ++ result |= 0x01; ++ ++ return result; ++ ++#if 0 ++ if(!(regEAC & BIT30) && ++ (((regEC4 & 0x03FF0000)>>16) != 0x132) && ++ (((regECC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK fail!!\n")); ++ ++#endif ++} ++ ++ ++ ++u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++phy_PathB_RxIQK8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ u4Byte regE94, regE9C, regEA4, regEAC, u4tmp, tmp, Path_SEL_BB; ++ u1Byte result = 0x00; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ //save RF path ++ Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++ ++ ++ //1 Get TXIMR setting ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S0 RX IQK:Get TXIMR setting!\n")); ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ //path-B IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ++// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f ); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160ff0); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); ++ ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ //modify RXIQK mode table ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f ); ++ //S1 IQK PA off ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7 ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7df7); ++ //S0 IQK PA off ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1 ); ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60fed ); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60efd); ++ ++ //enter IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ ++ //RF switch to S0 ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++ ++ //set GNT_BT=0, pause BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x1); ++ ++ ++ //One shot, path B TXIQK @ RXIQK ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //set GNT_BT=1, enable BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x3); ++ ++ //reload RF path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); ++ regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord))); ++ ++ //Allen 20131125 ++ tmp=(regE9C & 0x03FF0000)>>16; ++ ++ if ((tmp & 0x200)> 0) ++ tmp = 0x400 - tmp; ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) && ++ (((regE94 & 0x03FF0000)>>16) <0x11a) && ++ (((regE94 & 0x03FF0000)>>16) >0xe6) && ++ (tmp <0x1a)) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ { ++ return result; ++ } ++ ++ ++ u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe40 = 0x%x u4tmp = 0x%x \n", ODM_GetBBReg(pDM_Odm, rTx_IQK, bMaskDWord), u4tmp)); ++ ++ //1 RX IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S0 RX IQK\n")); ++ ++ //IQK setting ++ ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ //path-B IQK setting ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ++ ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82110000); ++// ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x281604c2); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2816081f); ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); ++ ++ //LO calibration setting ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1); ++ ++ //modify RXIQK mode table ++ //<20121009, Kordan> RF Mode = 3 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f); ++ //S1 PA off ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77); ++ //S0 PA off ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60ebd); ++ ++ //PA, PAD setting ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdd, bRFRegOffsetMask, 0x5c); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x75, bRFRegOffsetMask, 0xe1007); ++ ++ //enter IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++ //switch to S0 ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); ++ //set GNT_BT=0, pause BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x1); ++ ++ //One shot, path B LOK & IQK ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ ODM_delay_ms(IQK_DELAY_TIME_8723B); ++ ++ //set GNT_BT=1, enable BT traffic ++ ODM_SetBBReg(pDM_Odm, 0x764, BIT12|BIT11, 0x3); ++ ++ //reload RF path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); ++ //leave IQK mode ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ // PA/PAD controlled by 0x0 ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdd, bRFRegOffsetMask, 0x4c ); ++ ++ // Check failed ++ regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); ++ regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord);; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac = 0x%x\n", regEAC)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xea4 = 0x%x, 0xeac = 0x%x\n", regEA4, regEAC)); ++ //monitor image power before & after IQK ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xea0(before IQK)= 0x%x, 0xea8(afer IQK) = 0x%x\n", ++ ODM_GetBBReg(pDM_Odm, 0xea0, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xea8, bMaskDWord))); ++ ++#if 0 ++ if(!(regEAC & BIT31) && ++ (((regEB4 & 0x03FF0000)>>16) != 0x142) && ++ (((regEBC & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++#endif ++ ++ ++ //Allen 20131125 ++ tmp=(regEAC & 0x03FF0000)>>16; ++ if ((tmp & 0x200)> 0) ++ tmp = 0x400 - tmp; ++ ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36) && ++ (((regEA4 & 0x03FF0000)>>16) <0x110) && ++ (((regEA4 & 0x03FF0000)>>16) >0xf0) && ++ (tmp <0xf)) ++ ++ result |= 0x02; ++ else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S0 Rx IQK fail!!\n")); ++ ++ return result; ++} ++ ++ ++VOID ++_PHY_PathAFillIQKMatrix8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly ++ ) ++{ ++ u4Byte Oldval_0, X, TX0_A, reg, tmp0xc80, tmp0xc94, tmp0xc4c, tmp0xc14, tmp0xca0; ++ s4Byte Y, TX0_C; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ ++ Oldval_0 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][0]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX0_A = (X * Oldval_0) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); ++ tmp0xc80 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord) & 0xfffffc00)| (TX0_A & 0x3ff); ++ tmp0xc4c = (((X* Oldval_0>>7) & 0x1) << 31 ) | (ODM_GetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord) & 0x7fffffff); ++ ++ Y = result[final_candidate][1]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ //2 Tx IQC ++ TX0_C = (Y * Oldval_0) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); ++ ++ tmp0xc94 = (((TX0_C&0x3C0)>>6) << 28) | (ODM_GetBBReg(pDM_Odm,rOFDM0_XCTxAFE, bMaskDWord) & 0x0fffffff); ++ ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][KEY] = rOFDM0_XCTxAFE; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL] = tmp0xc94; ++ ++ tmp0xc80 = (tmp0xc80 & 0xffc0ffff) | (TX0_C & 0x3F)<<16; ++ ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][KEY] = rOFDM0_XATxIQImbalance; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL] = tmp0xc80; ++ ++ tmp0xc4c = (tmp0xc4c & 0xdfffffff) | (((Y* Oldval_0>>7) & 0x1)<<29); ++ ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][KEY] = rOFDM0_ECCAThreshold; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL] = tmp0xc4c; ++ ++ if(bTxOnly) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]_PHY_PathAFillIQKMatrix8723B only Tx OK\n")); ++ ++ // <20130226, Kordan> Saving RxIQC, otherwise not initialized. ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][KEY] = rOFDM0_RxIQExtAnta; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] = 0xfffffff & ODM_GetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, bMaskDWord); ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][KEY] = rOFDM0_XARxIQImbalance; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = 0x40000100; ++ return; ++ } ++ ++ reg = result[final_candidate][2]; ++#if (DM_ODM_SUPPORT_TYPE==ODM_AP) ++ if( RTL_ABS(reg ,0x100) >= 16) ++ reg = 0x100; ++#endif ++ ++ //2 Rx IQC ++ tmp0xc14 = (0x40000100 & 0xfffffc00) | reg; ++ ++ reg = result[final_candidate][3] & 0x3F; ++ tmp0xc14 = (tmp0xc14 & 0xffff03ff) | (reg << 10); ++ ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][KEY] = rOFDM0_XARxIQImbalance; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = tmp0xc14; ++ ++ reg = (result[final_candidate][3] >> 6) & 0xF; ++ tmp0xca0 = ODM_GetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, 0x0fffffff) | (reg << 28); ++ ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][KEY] = rOFDM0_RxIQExtAnta; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] = tmp0xca0; ++ } ++} ++ ++VOID ++_PHY_PathBFillIQKMatrix8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bIQKOK, ++ IN s4Byte result[][8], ++ IN u1Byte final_candidate, ++ IN BOOLEAN bTxOnly //do Tx only ++ ) ++{ ++ u4Byte Oldval_1, X, TX1_A, reg, tmp0xc80, tmp0xc94, tmp0xc4c, tmp0xc14, tmp0xca0; ++ s4Byte Y, TX1_C; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ++ ++ if(final_candidate == 0xFF) ++ return; ++ ++ else if(bIQKOK) ++ { ++ Oldval_1 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ ++ X = result[final_candidate][4]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX1_A = (X * Oldval_1) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); ++ ++ tmp0xc80 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord) & 0xfffffc00)| (TX1_A & 0x3ff); ++ tmp0xc4c = (((X* Oldval_1>>7) & 0x1) << 31 ) | (ODM_GetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord) & 0x7fffffff); ++ ++ Y = result[final_candidate][5]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ++ TX1_C = (Y * Oldval_1) >> 8; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); ++ ++ //2 Tx IQC ++ ++ tmp0xc94 = (((TX1_C&0x3C0)>>6) << 28) | (ODM_GetBBReg(pDM_Odm,rOFDM0_XCTxAFE, bMaskDWord) & 0x0fffffff); ++ ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][KEY] = rOFDM0_XCTxAFE; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][VAL] = tmp0xc94; ++ ++ tmp0xc80 = (tmp0xc80 & 0xffc0ffff) | (TX1_C&0x3F)<<16; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][KEY] = rOFDM0_XATxIQImbalance; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL] = tmp0xc80; ++ ++ tmp0xc4c = (tmp0xc4c & 0xdfffffff) | (((Y* Oldval_1>>7) & 0x1)<<29); ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][KEY] = rOFDM0_ECCAThreshold; ++ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][VAL] = tmp0xc4c; ++ ++ if(bTxOnly) { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]_PHY_PathBFillIQKMatrix8723B only Tx OK\n")); ++ ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][KEY] = rOFDM0_XARxIQImbalance; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] = 0x40000100; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][KEY] = rOFDM0_RxIQExtAnta; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][VAL] = 0x0fffffff & ODM_GetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, bMaskDWord); ++ return; ++ } ++ ++ //2 Rx IQC ++ reg = result[final_candidate][6]; ++ tmp0xc14 = (0x40000100 & 0xfffffc00) | reg; ++ ++ reg = result[final_candidate][7] & 0x3F; ++ tmp0xc14 = (tmp0xc14 & 0xffff03ff) | (reg << 10); ++ ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][KEY] = rOFDM0_XARxIQImbalance; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] = tmp0xc14; ++ ++ reg = (result[final_candidate][7] >> 6) & 0xF; ++ tmp0xca0 = ODM_GetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, 0x0fffffff) | (reg << 28); ++ ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][KEY] = rOFDM0_RxIQExtAnta; ++ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][VAL] = tmp0xca0; ++ } ++} ++ ++// ++// 2011/07/26 MH Add an API for testing IQK fail case. ++// ++// MP Already declare in odm.c ++ ++BOOLEAN ++ODM_SetIQCbyRFpath( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte RFpath ++ ) ++{ ++ ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ if(RFpath) //S1: RFpath = 0, S0:RFpath = 1 ++ { ++ if((pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL] != 0x0) && (pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] != 0x0)) ++ { ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]RF S0 IQC!!!\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xc80 = 0x%x!!!\n", pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL])); ++ ++ //S0 TX IQC ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][KEY], bMaskH4Bits, (pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][VAL]>>28)); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL]); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][KEY], BIT31, (pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][VAL]>>31)); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][KEY], BIT29, ((pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][VAL] & BIT29)>>29)); ++ ++ //S0 RX IQC ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL]); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][VAL]); ++ return TRUE; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQC S0 vaule invalid!!!\n")); ++ return FALSE; ++ } ++ } ++ else ++ { ++ if((pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL] != 0x0) && (pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] != 0x0)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]RF S1 IQC!!!\n")); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xc80 = 0x%x!!!\n", pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL])); ++ ++ //S1 TX IQC ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][KEY], bMaskH4Bits, (pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL]>>28)); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL]); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][KEY], BIT31, (pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL]>>31)); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][KEY], BIT29, ((pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL] & BIT29)>>29)); ++ ++ ++ //S1 RX IQC ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL]); ++ ODM_SetBBReg(pDM_Odm, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL]); ++ return TRUE; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQC S1 vaule invalid!!!\n")); ++ return FALSE; ++ } ++ } ++} ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_WIN) ++BOOLEAN ++ODM_CheckPowerStatus( ++ IN PADAPTER Adapter) ++{ ++/* ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ RT_RF_POWER_STATE rtState; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ ++ // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. ++ if (pMgntInfo->init_adpt_in_progress == TRUE) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); ++ return TRUE; ++ } ++ ++ // ++ // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. ++ // ++ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); ++ if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) ++ { ++ ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", ++ Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); ++ return FALSE; ++ } ++*/ ++ return TRUE; ++} ++#endif ++ ++VOID ++_PHY_SaveADDARegisters8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegisterNum ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++ ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++#endif ++ ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); ++ for( i = 0 ; i < RegisterNum ; i++){ ++ ADDABackup[i] = ODM_GetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord); ++ } ++} ++ ++ ++VOID ++_PHY_SaveMACRegisters8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); ++ for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ MACBackup[i] = ODM_Read1Byte(pDM_Odm, MACReg[i]); ++ } ++ MACBackup[i] = ODM_Read4Byte(pDM_Odm, MACReg[i]); ++ ++} ++ ++ ++VOID ++_PHY_ReloadADDARegisters8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegiesterNum ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); ++ for(i = 0 ; i < RegiesterNum; i++) ++ { ++ ODM_SetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord, ADDABackup[i]); ++ } ++} ++ ++VOID ++_PHY_ReloadMACRegisters8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); ++ for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)MACBackup[i]); ++ } ++ ODM_Write4Byte(pDM_Odm, MACReg[i], MACBackup[i]); ++} ++ ++ ++VOID ++_PHY_PathADDAOn8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN BOOLEAN isPathAOn ++ ) ++{ ++ u4Byte pathOn; ++ u4Byte i; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n")); ++ ++ pathOn = isPathAOn ? 0x01c00014 : 0x01c00014; ++ if( TRUE == *pDM_Odm->pIs1Antenna){ ++ pathOn = 0x01c00014; ++ ODM_SetBBReg(pDM_Odm, ADDAReg[0], bMaskDWord, 0x01c00014); ++ } ++ else{ ++ ODM_SetBBReg(pDM_Odm,ADDAReg[0], bMaskDWord, pathOn); ++ } ++ ++ for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){ ++ ODM_SetBBReg(pDM_Odm,ADDAReg[i], bMaskDWord, pathOn); ++ } ++ ++} ++ ++VOID ++_PHY_MACSettingCalibration8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ) ++{ ++ u4Byte i = 0; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); ++ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], 0x3F); ++ ++ for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT3))); ++ } ++ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT5))); ++ ++} ++ ++VOID ++_PHY_PathAStandBy8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A standby mode!\n")); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++//Allen ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ //ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x00010000); ++// ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ++} ++ ++VOID ++_PHY_PIModeSwitch8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN PIMode ++ ) ++{ ++ u4Byte mode; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); ++ ++ mode = PIMode ? 0x01000100 : 0x01000000; ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); ++} ++ ++BOOLEAN ++phy_SimularityCompare_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s4Byte result[][8], ++ IN u1Byte c1, ++ IN u1Byte c2 ++ ) ++{ ++ u4Byte i, j, diff, SimularityBitMap, bound = 0; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B ++ BOOLEAN bResult = TRUE; ++//#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++// BOOLEAN is2T = IS_92C_SERIAL( pHalData->VersionID); ++//#else ++ BOOLEAN is2T = TRUE; ++//#endif ++ ++ s4Byte tmp1 = 0,tmp2 = 0; ++ ++ if(is2T) ++ bound = 8; ++ else ++ bound = 4; ++ ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> IQK:phy_SimularityCompare_8192E c1 %d c2 %d!!!\n", c1, c2)); ++ ++ ++ SimularityBitMap = 0; ++ ++ for( i = 0; i < bound; i++ ) ++ { ++ ++ if((i==1) || (i==3) || (i==5) || (i==7)) ++ { ++ if((result[c1][i]& 0x00000200) != 0) ++ tmp1 = result[c1][i] | 0xFFFFFC00; ++ else ++ tmp1 = result[c1][i]; ++ ++ if((result[c2][i]& 0x00000200) != 0) ++ tmp2 = result[c2][i] | 0xFFFFFC00; ++ else ++ tmp2 = result[c2][i]; ++ } ++ else ++ { ++ tmp1 = result[c1][i]; ++ tmp2 = result[c2][i]; ++ } ++ ++ diff = (tmp1 > tmp2) ? (tmp1 - tmp2) : (tmp2 - tmp1); ++ ++ if (diff > MAX_TOLERANCE) ++ { ++// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:differnece overflow %d index %d compare1 0x%x compare2 0x%x!!!\n", diff, i, result[c1][i], result[c2][i])); ++ ++ if((i == 2 || i == 6) && !SimularityBitMap) ++ { ++ if(result[c1][i]+result[c1][i+1] == 0) ++ final_candidate[(i/4)] = c2; ++ else if (result[c2][i]+result[c2][i+1] == 0) ++ final_candidate[(i/4)] = c1; ++ else ++ SimularityBitMap = SimularityBitMap|(1<odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ u4Byte i; ++ u1Byte PathAOK, PathBOK; ++ u1Byte tmp0xc50 = (u1Byte)ODM_GetBBReg(pDM_Odm, 0xC50, bMaskByte0); ++ u1Byte tmp0xc58 = (u1Byte)ODM_GetBBReg(pDM_Odm, 0xC58, bMaskByte0); ++ u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ //since 92C & 92D have the different define in IQK_BB_REG ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE, rCCK0_AFESetting ++ }; ++ ++ u4Byte Path_SEL_BB, tmp0x764; ++// u4Byte Path_SEL_BB, Path_SEL_RF; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++ u4Byte retryCount = 2; ++#else ++#if MP_DRIVER ++ const u4Byte retryCount = 1; ++#else ++ const u4Byte retryCount = 2; ++#endif ++#endif ++ ++ // Note: IQ calibration must be performed after loading ++ // PHY_REG.txt , and radio_a, radio_b.txt ++ ++ //u4Byte bbvalue; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ++#ifdef MP_TEST ++ if(pDM_Odm->priv->pshare->rf_ft_var.mp_specific) ++ retryCount = 9; ++#endif ++#endif ++ ++ ++ if(t==0) ++ { ++// bbvalue = ODM_GetBBReg(pDM_Odm, rFPGA0_RFMOD, bMaskDWord); ++// RT_DISP(FINIT, INIT_IQK, ("phy_IQCalibrate_8188E()==>0x%08x\n",bbvalue)); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQ Calibration for %s for %d times\n", (*pDM_Odm->pIs1Antenna ? "1ant" : "2ant"), t)); ++ if(*pDM_Odm->pIs1Antenna) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQ Calibration for %s\n", (*pDM_Odm->pRFDefaultPath ? "S0" : "S1"))); ++ ++ // Save ADDA parameters, turn Path A ADDA on ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_SaveADDARegisters8723B(pAdapter, ADDA_REG, pRFCalibrateInfo->ADDA_backup, IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters8723B(pAdapter, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++ _PHY_SaveADDARegisters8723B(pAdapter, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup, IQK_BB_REG_NUM); ++#else ++ _PHY_SaveADDARegisters8723B(pDM_Odm, ADDA_REG, pRFCalibrateInfo->ADDA_backup, IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters8723B(pDM_Odm, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++ _PHY_SaveADDARegisters8723B(pDM_Odm, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup, IQK_BB_REG_NUM); ++#endif ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQ Calibration for %s for %d times\n", (*pDM_Odm->pIs1Antenna ? "1ant" : "2ant"), t)); ++ if(*pDM_Odm->pIs1Antenna) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQ Calibration for %s\n", (*pDM_Odm->pRFDefaultPath ? "S0" : "S1"))); ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ _PHY_PathADDAOn8723B(pAdapter, ADDA_REG, TRUE); ++#else ++ _PHY_PathADDAOn8723B(pDM_Odm, ADDA_REG, TRUE); ++#endif ++ ++//no serial mode ++#if 0 ++ if(t==0) ++ { ++ pRFCalibrateInfo->bRfPiEnable = (u1Byte)ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, BIT(8)); ++ } ++ ++ if(!pRFCalibrateInfo->bRfPiEnable){ ++ // Switch BB to PI mode to do IQ Calibration. ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_PIModeSwitch8723B(pAdapter, TRUE); ++#else ++ _PHY_PIModeSwitch8723B(pDM_Odm, TRUE); ++#endif ++ } ++#endif ++ ++ //save RF path for 8723B ++ Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++ //save 0x764 GNT_BT ++ tmp0x764 = ODM_GetBBReg(pDM_Odm, 0x764, bMaskDWord); ++ ++// Path_SEL_RF = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, 0xfffff); ++ ++ //MAC settings ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_MACSettingCalibration8723B(pAdapter, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++#else ++ _PHY_MACSettingCalibration8723B(pDM_Odm, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++#endif ++ ++ //BB setting ++ //ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0x00); ++ ODM_SetBBReg(pDM_Odm, rCCK0_AFESetting, 0x0f000000, 0xf); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); ++ ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); ++ ++ ++// ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); ++// ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); ++// ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); ++// ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); ++ ++ ++//for 8723B ++#if 0 ++ if(is2T) ++ { ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMaskDWord, 0x10000); ++ } ++#endif ++ ++ ++//no APK ++#if 0 ++ //Page B init ++ //AP or IQK ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); ++ ++ if(is2T) ++ { ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x0f600000); ++ } ++#endif ++ ++//RX IQ calibration setting for 8723B D cut large current issue when leaving IPS ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60fbd); ++/* ++//LOK RF setting ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x2, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, 0x2, 0x1); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x56, bRFRegOffsetMask, 0x00032); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x76, bRFRegOffsetMask, 0x00032); ++*/ ++ ++ ++//path A TX IQK ++#if 1 ++ ++#if MP_DRIVER != 1 ++ if((*pDM_Odm->pIs1Antenna == FALSE) || ((*pDM_Odm->pIs1Antenna == TRUE)&& (pDM_Odm->SupportInterface != ODM_ITRF_USB) ++ && (*pDM_Odm->pRFDefaultPath == 0)) ) ++#endif ++ { ++ ++ for(i = 0 ; i < retryCount ; i++) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathAOK = phy_PathA_IQK_8723B(pAdapter); ++#else ++ PathAOK = phy_PathA_IQK_8723B(pDM_Odm); ++#endif ++// if(PathAOK == 0x03){ ++ if(PathAOK == 0x01) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S1 Tx IQK Success!!\n")); ++ result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ ++ } ++#endif ++ ++//path A RXIQK ++#if 1 ++ ++ for(i = 0 ; i < retryCount ; i++) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathAOK = phy_PathA_RxIQK8723B(pAdapter); ++#else ++ PathAOK = phy_PathA_RxIQK8723B(pDM_Odm); ++#endif ++ if(PathAOK == 0x03) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S1 Rx IQK Success!!\n")); ++// result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++// result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][2] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][3] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S1Rx IQK Fail!!\n")); ++ } ++ } ++ ++ if(0x00 == PathAOK) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S1 IQK failed!!\n")); ++ } ++ } ++#endif ++ ++//path B TX IQK ++ ++/* ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++// _PHY_PathAStandBy8723B(pAdapter); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn8723B(pAdapter, ADDA_REG, FALSE, is2T); ++#else ++// _PHY_PathAStandBy8723B(pDM_Odm); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn8723B(pDM_Odm, ADDA_REG, FALSE, is2T); ++#endif ++*/ ++ ++//path B TX IQK ++#if 1 ++ ++#if MP_DRIVER != 1 ++ if((*pDM_Odm->pIs1Antenna == FALSE) || ((*pDM_Odm->pIs1Antenna == TRUE) && (*pDM_Odm->pRFDefaultPath == 1)) ++ || (pDM_Odm->SupportInterface == ODM_ITRF_USB)) ++#endif ++ { ++ ++ for(i = 0 ; i < retryCount ; i++) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathBOK = phy_PathB_IQK_8723B(pAdapter); ++#else ++ PathBOK = phy_PathB_IQK_8723B(pDM_Odm); ++#endif ++// if(PathBOK == 0x03){ ++ if(PathBOK == 0x01) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S0 Tx IQK Success!!\n")); ++ result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ ++ } ++#endif ++ ++//path B RX IQK ++#if 1 ++ ++ for(i = 0 ; i < retryCount ; i++) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PathBOK = phy_PathB_RxIQK8723B(pAdapter); ++#else ++ PathBOK = phy_PathB_RxIQK8723B(pDM_Odm); ++#endif ++ if(PathBOK == 0x03) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S0 Rx IQK Success!!\n")); ++// result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++// result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][6] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][7] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S0 Rx IQK Fail!!\n")); ++ } ++ } ++ ++#endif ++ ++ if(0x00 == PathBOK) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S0 IQK failed!!\n")); ++ } ++ } ++ ++ //Back to BB mode, load original value ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK:Back to BB mode, load original value!\n")); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ if(t!=0) ++ { ++ if(!pRFCalibrateInfo->bRfPiEnable){ ++ // Switch back BB to SI mode after finish IQ Calibration. ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++// _PHY_PIModeSwitch8723B(pAdapter, FALSE); ++#else ++// _PHY_PIModeSwitch8723B(pDM_Odm, FALSE); ++#endif ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters8723B(pAdapter, ADDA_REG, pRFCalibrateInfo->ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters8723B(pAdapter, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++ ++ _PHY_ReloadADDARegisters8723B(pAdapter, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup, IQK_BB_REG_NUM); ++#else ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters8723B(pDM_Odm, ADDA_REG, pRFCalibrateInfo->ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters8723B(pDM_Odm, IQK_MAC_REG, pRFCalibrateInfo->IQK_MAC_backup); ++ ++ _PHY_ReloadADDARegisters8723B(pDM_Odm, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup, IQK_BB_REG_NUM); ++#endif ++ ++ ++ //Reload RF path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); ++ ++ //reload 0x764 GNT_BT ++ ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, tmp0x764); ++ ++// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF); ++ ++ //Allen initial gain 0xc50 ++ // Restore RX initial gain ++ ODM_SetBBReg(pDM_Odm, 0xc50, bMaskByte0, 0x50); ++ ODM_SetBBReg(pDM_Odm, 0xc50, bMaskByte0, tmp0xc50); ++ if(*pDM_Odm->pIs1Antenna == FALSE){ ++ ODM_SetBBReg(pDM_Odm, 0xc58, bMaskByte0, 0x50); ++ ODM_SetBBReg(pDM_Odm, 0xc58, bMaskByte0, tmp0xc58); ++ } ++ ++ //load 0xe30 IQC default value ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]phy_IQCalibrate_8723B() <==\n")); ++ ++} ++ ++ ++VOID ++phy_LCCalibrate_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN BOOLEAN is2T ++ ) ++{ ++ u1Byte tmpReg; ++ u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++#endif ++ ++ //Check continuous TX and Packet TX ++ tmpReg = ODM_Read1Byte(pDM_Odm, 0xd03); ++ ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg&0x8F); //disable all continuous TX ++ else // Deal with Packet TX case ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // block all queues ++ ++ if((tmpReg&0x70) != 0) ++ { ++ //1. Read original RF mode ++ //Path-A ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ RF_Amode = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_AC, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_B, RF_AC, bMask12Bits); ++#else ++ RF_Amode = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits); ++#endif ++ ++ //2. Set RF mode = standby mode ++ //Path-A ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); ++ ++ //Path-B ++ if(is2T) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); ++ } ++ ++ //3. Read RF reg18 ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ LC_Cal = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits); ++#else ++ LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits); ++#endif ++ ++ //4. Set LC calibration begin bit15 ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFBE0); // LDO ON ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); ++ ++ ODM_delay_ms(100); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFFE0); // LDO OFF ++ ++ // Channel 10 LC calibration issue for 8723bs with 26M xtal ++ if(pDM_Odm->SupportInterface == ODM_ITRF_SDIO && pDM_Odm->PackageType >= 0x2) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal); ++ } ++ ++ //Restore original situation ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ { ++ //Path-A ++ ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); ++ ++ //Path-B ++ if(is2T) ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); ++ } ++ else // Deal with Packet TX case ++ { ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); ++ } ++} ++ ++//Analog Pre-distortion calibration ++#define APK_BB_REG_NUM 8 ++#define APK_CURVE_REG_NUM 4 ++#define PATH_NUM 2 ++ ++VOID ++phy_APCalibrate_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta, ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ u4Byte regD[PATH_NUM]; ++ u4Byte tmpReg, index, offset, apkbound; ++ u1Byte path, i, pathbound = PATH_NUM; ++ u4Byte BB_backup[APK_BB_REG_NUM]; ++ u4Byte BB_REG[APK_BB_REG_NUM] = { ++ rFPGA1_TxBlock, rOFDM0_TRxPathEnable, ++ rFPGA0_RFMOD, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, ++ rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; ++ u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x00204000 }; ++ u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x22204000 }; ++ ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, ++ {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} ++ }; ++ ++ u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings ++ {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} ++ }; ++ ++ u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, ++ {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} ++ }; ++ ++ u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} ++ }; ++ ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u4Byte APK_offset[PATH_NUM] = { ++ rConfig_AntA, rConfig_AntB}; ++ ++ u4Byte APK_normal_offset[PATH_NUM] = { ++ rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; ++ ++ u4Byte APK_value[PATH_NUM] = { ++ 0x92fc0000, 0x12fc0000}; ++ ++ u4Byte APK_normal_value[PATH_NUM] = { ++ 0x92680000, 0x12680000}; ++ ++ s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} ++ }; ++ ++ u4Byte APK_normal_setting_value_1[13] = { ++ 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, ++ 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, ++ 0x12680000, 0x00880000, 0x00880000 ++ }; ++ ++ u4Byte APK_normal_setting_value_2[16] = { ++ 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, ++ 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, ++ 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, ++ 0x00050006 ++ }; ++ ++ u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a ++// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; ++ ++ s4Byte BB_offset, delta_V, delta_offset; ++ ++#if MP_DRIVER == 1 ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++#else ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++#endif ++ pMptCtx->APK_bound[0] = 45; ++ pMptCtx->APK_bound[1] = 52; ++ ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_APCalibrate_8188E() delta %d\n", delta)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ if(!is2T) ++ pathbound = 1; ++ ++ //2 FOR NORMAL CHIP SETTINGS ++ ++// Temporarily do not allow normal driver to do the following settings because these offset ++// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal ++// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the ++// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. ++#if MP_DRIVER != 1 ++ return; ++#endif ++ //settings adjust for normal chip ++ for(index = 0; index < PATH_NUM; index ++) ++ { ++ APK_offset[index] = APK_normal_offset[index]; ++ APK_value[index] = APK_normal_value[index]; ++ AFE_on_off[index] = 0x6fdb25a4; ++ } ++ ++ for(index = 0; index < APK_BB_REG_NUM; index ++) ++ { ++ for(path = 0; path < pathbound; path++) ++ { ++ APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; ++ APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; ++ } ++ BB_AP_MODE[index] = BB_normal_AP_MODE[index]; ++ } ++ ++ apkbound = 6; ++ ++ //save BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0) //skip ++ continue; ++ BB_backup[index] = ODM_GetBBReg(pDM_Odm, BB_REG[index], bMaskDWord); ++ } ++ ++ //save MAC default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_SaveMACRegisters8723B(pAdapter, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters8723B(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#else ++ _PHY_SaveMACRegisters8723B(pDM_Odm, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters8723B(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#endif ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ++ ++ if(path == ODM_RF_PATH_A) ++ { ++ //path A APK ++ //load APK setting ++ //path-A ++ offset = rPdp_AntA; ++ for(index = 0; index < 11; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ for(; index < 13; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ //path A ++ offset = rPdp_AntA; ++ for(index = 0; index < 16; index++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ } ++ else if(path == ODM_RF_PATH_B) ++ { ++ //path B APK ++ //load APK setting ++ //path-B ++ offset = rPdp_AntB; ++ for(index = 0; index < 10; index ++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++#else ++ PHY_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++#endif ++ ++ offset = rConfig_AntA; ++ index = 11; ++ for(; index < 13; index ++) //offset 0xb68, 0xb6c ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ //path B ++ offset = 0xb60; ++ for(index = 0; index < 16; index++) ++ { ++ ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ } ++ ++ //save RF default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord); ++#else ++ regD[path] = ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord); ++#endif ++ ++ //Path A AFE all on, path B AFE All off or vise versa ++ for(index = 0; index < IQK_ADDA_REG_NUM ; index++) ++ ODM_SetBBReg(pDM_Odm, AFE_REG[index], bMaskDWord, AFE_on_off[path]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xe70 %x\n", ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord))); ++ ++ //BB to AP mode ++ if(path == 0) ++ { ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ else if (index < 5) ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); ++ else if (BB_REG[index] == 0x870) ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); ++ else ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], BIT10, 0x0); ++ } ++ ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ } ++ else //path B ++ { ++ ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x800 %x\n", ODM_GetBBReg(pDM_Odm, 0x800, bMaskDWord))); ++ ++ //MAC settings ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_MACSettingCalibration8723B(pAdapter, MAC_REG, MAC_backup); ++#else ++ _PHY_MACSettingCalibration8723B(pDM_Odm, MAC_REG, MAC_backup); ++#endif ++ ++ if(path == ODM_RF_PATH_A) //Path B to standby mode ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMaskDWord, 0x10000); ++ } ++ else //Path A to standby mode ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE2, bMaskDWord, 0x20103); ++ } ++ ++ delta_offset = ((delta+14)/2); ++ if(delta_offset < 0) ++ delta_offset = 0; ++ else if (delta_offset > 12) ++ delta_offset = 12; ++ ++ //AP calibration ++ for(index = 0; index < APK_BB_REG_NUM; index++) ++ { ++ if(index != 1) //only DO PA11+PAD01001, AP RF setting ++ continue; ++ ++ tmpReg = APK_RF_init_value[path][index]; ++#if 1 ++ if(!pRFCalibrateInfo->bAPKThermalMeterIgnore) ++ { ++ BB_offset = (tmpReg & 0xF0000) >> 16; ++ ++ if(!(tmpReg & BIT15)) //sign bit 0 ++ { ++ BB_offset = -BB_offset; ++ } ++ ++ delta_V = APK_delta_mapping[index][delta_offset]; ++ ++ BB_offset += delta_V; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); ++ ++ if(BB_offset < 0) ++ { ++ tmpReg = tmpReg & (~BIT15); ++ BB_offset = -BB_offset; ++ } ++ else ++ { ++ tmpReg = tmpReg | BIT15; ++ } ++ tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); ++ } ++#endif ++ ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_IPA_A, bMaskDWord, 0x8992e); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_TXBIAS_A, bMaskDWord, tmpReg); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord))); ++#else ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", ODM_GetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", ODM_GetRFReg(pDM_Odm, path, RF_AC, bMaskDWord))); ++ ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord))); ++#endif ++ ++ // PA11+PAD01111, one shot ++ i = 0; ++ do ++ { ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x800000); ++ { ++ ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[0]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); ++ ODM_delay_ms(3); ++ ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[1]); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); ++ ++ ODM_delay_ms(20); ++ } ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ if(path == ODM_RF_PATH_A) ++ tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0x03E00000); ++ else ++ tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0xF8000000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xbd8[25:21] %x\n", tmpReg)); ++ ++ ++ i++; ++ } ++ while(tmpReg > apkbound && i < 4); ++ ++ APK_result[path][index] = tmpReg; ++ } ++ } ++ ++ //reload MAC default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadMACRegisters8723B(pAdapter, MAC_REG, MAC_backup); ++#else ++ _PHY_ReloadMACRegisters8723B(pDM_Odm, MAC_REG, MAC_backup); ++#endif ++ ++ //reload BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ ++ if(index == 0) //skip ++ continue; ++ ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]); ++ } ++ ++ //reload AFE default value ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadADDARegisters8723B(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#else ++ _PHY_ReloadADDARegisters8723B(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++#endif ++ ++ //reload RF path default value ++ for(path = 0; path < pathbound; path++) ++ { ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0xd, bMaskDWord, regD[path]); ++ if(path == ODM_RF_PATH_B) ++ { ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_MODE2, bMaskDWord, 0x20101); ++ } ++ ++ //note no index == 0 ++ if (APK_result[path][1] > 6) ++ APK_result[path][1] = 6; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\n")); ++ ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x3, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); ++ if(path == ODM_RF_PATH_A) ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); ++ else ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G9_G11, bMaskDWord, ++ ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); ++#endif ++ } ++ ++ pRFCalibrateInfo->bAPKdone = TRUE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8188E()\n")); ++} ++ ++ ++ ++#define DP_BB_REG_NUM 7 ++#define DP_RF_REG_NUM 1 ++#define DP_RETRY_LIMIT 10 ++#define DP_PATH_NUM 2 ++#define DP_DPK_NUM 3 ++#define DP_DPK_VALUE_NUM 2 ++ ++ ++ ++// IQK version:V2.9 20141201 ++// 1. modify the boundary of IQK result for 8723B F-cut ++ ++VOID ++PHY_IQCalibrate_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bReCovery ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ ++ #if (MP_DRIVER == 1) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ #endif ++ #endif//(MP_DRIVER == 1) ++ ++ u1Byte u1bTmp; ++ u2Byte count=0; ++#endif ++ ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ s4Byte result[4][8]; //last is final result ++ u1Byte i, final_candidate, Indexforchannel; ++ BOOLEAN bPathAOK, bPathBOK; ++ s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; ++ BOOLEAN is12simular, is13simular, is23simular; ++ BOOLEAN bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, ++ rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, ++ rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, ++ rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, ++ rOFDM0_RxIQExtAnta}; ++ u4Byte Path_SEL_BB = 0; ++ BOOLEAN bReloadIQK = FALSE; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE) ) ++ if (ODM_CheckPowerStatus(pAdapter) == FALSE) ++ return; ++#else ++ prtl8192cd_priv priv = pDM_Odm->priv; ++ ++#ifdef MP_TEST ++ if(priv->pshare->rf_ft_var.mp_specific) ++ { ++ if((OPMODE & WIFI_MP_CTX_PACKET) || (OPMODE & WIFI_MP_CTX_ST)) ++ return; ++ } ++#endif ++ ++ if(priv->pshare->IQK_88E_done) ++ bReCovery= 1; ++ priv->pshare->IQK_88E_done = 1; ++#endif ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ ++ ++#if MP_DRIVER == 1 ++ // Add to determine IQK ON/OFF in certain case, Suggested by Cheng. ++ if (!pHalData->IQK_MP_Switch) ++ return; ++ ++ bSingleTone = pMptCtx->bSingleTone; ++ bCarrierSuppression = pMptCtx->bCarrierSuppression; ++ ++ // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) ++ if(bSingleTone || bCarrierSuppression) ++ return; ++#endif ++ ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ ++ if (pRFCalibrateInfo->bIQKInProgress) ++ return; ++ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) ++ if(bReCovery) ++#else//for ODM_WIN ++ if(bReCovery && (!pAdapter->bInHctTest)) //YJ,add for PowerTest,120405 ++#endif ++ { ++ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("[IQK]PHY_IQCalibrate_8723B: Return due to bReCovery!\n")); ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_ReloadADDARegisters8723B(pAdapter, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup_recover, 9); ++#else ++ _PHY_ReloadADDARegisters8723B(pDM_Odm, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup_recover, 9); ++#endif ++ return; ++ } ++ ++ ++ ++#if MP_DRIVER != 1 ++//check if IQK had been done before!! ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]S1 0xc80 = 0x%x, S0 0xc80 = 0x%x\n", pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL], pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL])); ++ ++ if((*pDM_Odm->pIs1Antenna == TRUE) && (*pDM_Odm->pRFDefaultPath == 0)) // 1-ant, S1 ++ { ++ if(ODM_SetIQCbyRFpath(pDM_Odm, 0)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]1-ant S1 IQK value is reloaded!!!\n")); ++ bReloadIQK = TRUE; ++ } ++ } ++ else if((*pDM_Odm->pIs1Antenna == TRUE) && (*pDM_Odm->pRFDefaultPath == 1)) // 1-ant, S0 ++ { ++ if(ODM_SetIQCbyRFpath(pDM_Odm, 1)) // S0 ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]1-ant S0 IQK value is reloaded!!!\n")); ++ bReloadIQK = TRUE; ++ } ++ } ++ else // 2-ant ++ { ++ if((pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL] != 0x0) && (pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] != 0x0)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK has been done before.!!!\n")); ++ ++ if((Path_SEL_BB == 0x0) || (Path_SEL_BB == 0x200)) //S1 ++ { ++ if(ODM_SetIQCbyRFpath(pDM_Odm, 0)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]2-ant S1 IQK value is reloaded!!!\n")); ++ bReloadIQK = TRUE; ++ } ++ } ++ else // S0 ++ { ++ if(ODM_SetIQCbyRFpath(pDM_Odm, 1)) ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]2-ant S0 IQK value is reloaded!!!\n")); ++ bReloadIQK = TRUE; ++ } ++ } ++ } ++ } ++ ++ if(bReloadIQK) ++ return; ++#endif ++ ++ //Check & wait if BT is doing IQK ++#if MP_DRIVER != 1 ++ // Set H2C cmd to inform FW (enable). ++ SetFwWiFiCalibrationCmd_8723B(pAdapter, 1); ++ ++ // Check 0x1e6 ++ count=0; ++ u1bTmp = PlatformEFIORead1Byte(pAdapter, 0x1e6); ++ while(u1bTmp != 0x1 && count<1000) ++ { ++ PlatformStallExecution(10); ++ u1bTmp = PlatformEFIORead1Byte(pAdapter, 0x1e6); ++ count++; ++ } ++ ++ if(count >= 1000) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("[IQK]Polling 0x1e6 to 1 for WiFi calibration H2C cmd FAIL! count(%d)", count)); ++ } ++ ++ // Wait BT IQK finished. ++ // polling 0x1e7[0]=1 or 300ms timeout ++ u1bTmp = PlatformEFIORead1Byte(pAdapter, 0x1e7); ++ while((!(u1bTmp&BIT0)) && count<6000) ++ { ++ PlatformStallExecution(50); ++ u1bTmp = PlatformEFIORead1Byte(pAdapter, 0x1e7); ++ count++; ++ } ++#endif ++ ++ ++// Save RF Path ++ Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x948 = 0x%x\n", Path_SEL_BB)); ++ ++ ++ //IQK start!!!!!!!!!! ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK:Start!!!\n")); ++ ODM_AcquireSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ pRFCalibrateInfo->bIQKInProgress = TRUE; ++ ODM_ReleaseSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ ++ ++ for(i = 0; i < 8; i++) ++ { ++ result[0][i] = 0; ++ result[1][i] = 0; ++ result[2][i] = 0; ++ result[3][i] = 0; ++ } ++ final_candidate = 0xff; ++ bPathAOK = FALSE; ++ bPathBOK = FALSE; ++ is12simular = FALSE; ++ is23simular = FALSE; ++ is13simular = FALSE; ++ ++ ++ for (i=0; i<3; i++) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_IQCalibrate_8723B(pAdapter, result, i); ++#else ++ phy_IQCalibrate_8723B(pDM_Odm, result, i); ++#endif ++ ++ ++ if(i == 1) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is12simular = phy_SimularityCompare_8723B(pAdapter, result, 0, 1); ++#else ++ is12simular = phy_SimularityCompare_8723B(pDM_Odm, result, 0, 1); ++#endif ++ if(is12simular) ++ { ++ final_candidate = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK: is12simular final_candidate is %x\n",final_candidate)); ++ break; ++ } ++ } ++ ++ if(i == 2) ++ { ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is13simular = phy_SimularityCompare_8723B(pAdapter, result, 0, 2); ++#else ++ is13simular = phy_SimularityCompare_8723B(pDM_Odm, result, 0, 2); ++#endif ++ if(is13simular) ++ { ++ final_candidate = 0; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK: is13simular final_candidate is %x\n",final_candidate)); ++ ++ break; ++ } ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ is23simular = phy_SimularityCompare_8723B(pAdapter, result, 1, 2); ++#else ++ is23simular = phy_SimularityCompare_8723B(pDM_Odm, result, 1, 2); ++#endif ++ if(is23simular) ++ { ++ final_candidate = 1; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK: is23simular final_candidate is %x\n",final_candidate)); ++ } ++ else ++ { ++ for(i = 0; i < 8; i++) ++ RegTmp += result[3][i]; ++ ++ if(RegTmp != 0) ++ final_candidate = 3; ++ else ++ final_candidate = 0xFF; ++ } ++ } ++ } ++// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); ++ ++ for (i=0; i<4; i++) ++ { ++ RegE94 = result[i][0]; ++ RegE9C = result[i][1]; ++ RegEA4 = result[i][2]; ++ RegEAC = result[i][3]; ++ RegEB4 = result[i][4]; ++ RegEBC = result[i][5]; ++ RegEC4 = result[i][6]; ++ RegECC = result[i][7]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ } ++ ++ if(final_candidate != 0xff) ++ { ++ pRFCalibrateInfo->RegE94 = RegE94 = result[final_candidate][0]; ++ pRFCalibrateInfo->RegE9C = RegE9C = result[final_candidate][1]; ++ RegEA4 = result[final_candidate][2]; ++ RegEAC = result[final_candidate][3]; ++ pRFCalibrateInfo->RegEB4 = RegEB4 = result[final_candidate][4]; ++ pRFCalibrateInfo->RegEBC = RegEBC = result[final_candidate][5]; ++ RegEC4 = result[final_candidate][6]; ++ RegECC = result[final_candidate][7]; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK: final_candidate is %x\n",final_candidate)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ bPathAOK = bPathBOK = TRUE; ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK: FAIL use default value\n")); ++ pRFCalibrateInfo->RegE94 = pRFCalibrateInfo->RegEB4 = 0x100; //X default value ++ pRFCalibrateInfo->RegE9C = pRFCalibrateInfo->RegEBC = 0x0; //Y default value ++ } ++ ++ // fill IQK matrix ++ if (RegE94 != 0) ++ _PHY_PathAFillIQKMatrix8723B(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++ if (RegEB4 != 0) ++ _PHY_PathBFillIQKMatrix8723B(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); ++ ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ Indexforchannel = ODM_GetRightChnlPlaceforIQK(pHalData->CurrentChannel); ++#else ++ Indexforchannel = 0; ++#endif ++ ++//To Fix BSOD when final_candidate is 0xff ++//by sherry 20120321 ++ if(final_candidate < 4) ++ { ++ for(i = 0; i < IQK_Matrix_REG_NUM; i++) ++ pRFCalibrateInfo->IQKMatrixRegSetting[Indexforchannel].Value[0][i] = result[final_candidate][i]; ++ pRFCalibrateInfo->IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE; ++ } ++ //RT_DISP(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]\nIQK OK Indexforchannel %d.\n", Indexforchannel)); ++ ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ _PHY_SaveADDARegisters8723B(pAdapter, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup_recover, 9); ++#else ++ _PHY_SaveADDARegisters8723B(pDM_Odm, IQK_BB_REG_92C, pRFCalibrateInfo->IQK_BB_backup_recover, IQK_BB_REG_NUM); ++#endif ++ ++ // Restore RF Path ++ ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]is1ant = %d, supprotinterface = %d, RFdefaultpath=%d.\n",*pDM_Odm->pIs1Antenna, pDM_Odm->SupportInterface, *pDM_Odm->pRFDefaultPath )); ++ ++//fill IQK register ++#if MP_DRIVER == 1 ++ if((Path_SEL_BB == 0x0) || (Path_SEL_BB == 0x200)) //S1 ++ ODM_SetIQCbyRFpath( pDM_Odm, 0); ++ else ++ ODM_SetIQCbyRFpath( pDM_Odm, 1); ++#else ++ if(*pDM_Odm->pRFDefaultPath == 0x0 ) //S1 ++ ODM_SetIQCbyRFpath( pDM_Odm, 0); ++ else ++ ODM_SetIQCbyRFpath( pDM_Odm, 1); ++#endif ++ ++ ++#if MP_DRIVER != 1 ++ // Set H2C cmd to inform FW (disable). ++ SetFwWiFiCalibrationCmd_8723B(pAdapter, 0); ++ ++ // Check 0x1e6 ++ count = 0; ++ u1bTmp = PlatformEFIORead1Byte(pAdapter, 0x1e6); ++ while(u1bTmp != 0 && count<1000) ++ { ++ PlatformStallExecution(10); ++ u1bTmp = PlatformEFIORead1Byte(pAdapter, 0x1e6); ++ count++; ++ } ++ ++ if(count >= 1000) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("[IQK]Polling 0x1e6 to 0 for WiFi calibration H2C cmd FAIL! count(%d)", count)); ++ } ++#endif ++ ++ ++ ODM_AcquireSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ pRFCalibrateInfo->bIQKInProgress = FALSE; ++ ODM_ReleaseSpinLock(pDM_Odm, RT_IQK_SPINLOCK); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK finished\n")); ++} ++ ++ ++VOID ++PHY_LCCalibrate_8723B( ++ IN PDM_ODM_T pDM_Odm ++ ) ++{ ++ BOOLEAN bSingleTone = FALSE, bCarrierSuppression = FALSE; ++ u4Byte timeout = 2000, timecount = 0; ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ PADAPTER pAdapter = pDM_Odm->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ #if (MP_DRIVER == 1) ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); ++ #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ #endif ++ #endif//(MP_DRIVER == 1) ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ ++ ++ ++#if MP_DRIVER == 1 ++ // Add to Disable Default LCK when Cont Tx, For Lab Test Usage. ++ if (!pHalData->IQK_MP_Switch) ++ return; ++ ++ bSingleTone = pMptCtx->bSingleTone; ++ bCarrierSuppression = pMptCtx->bCarrierSuppression; ++#endif ++ ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) ++ if(bSingleTone || bCarrierSuppression) ++ return; ++ ++ while(*(pDM_Odm->pbScanInProcess) && timecount < timeout) ++ { ++ ODM_delay_ms(50); ++ timecount += 50; ++ } ++ ++ pRFCalibrateInfo->bLCKInProgress = TRUE; ++ ++ ++ phy_LCCalibrate_8723B(pDM_Odm, FALSE); ++ ++ ++ pRFCalibrateInfo->bLCKInProgress = FALSE; ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Finish!!!interface %d\n", pDM_Odm->InterfaceIndex)); ++ ++} ++ ++VOID ++PHY_APCalibrate_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ return; ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) ++ { ++ return; ++ } ++#endif ++ ++#if FOR_BRAZIL_PRETEST != 1 ++ if(pRFCalibrateInfo->bAPKdone) ++#endif ++ return; ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ phy_APCalibrate_8723B(pAdapter, delta, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_APCalibrate_8723B(pAdapter, delta, FALSE); ++#else ++ phy_APCalibrate_8723B(pDM_Odm, delta, FALSE); ++#endif ++ } ++} ++VOID phy_SetRFPathSwitch_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bMain, ++ IN BOOLEAN is2T ++ ) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ if(bMain) // Left antenna ++ { ++ ODM_SetBBReg(pDM_Odm, 0x92C, bMaskDWord, 0x1); ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, 0x92C, bMaskDWord, 0x2); ++ } ++} ++VOID PHY_SetRFPathSwitch_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN bMain ++ ) ++{ ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ phy_SetRFPathSwitch_8723B(pAdapter, bMain, TRUE); ++#endif ++ ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++//digital predistortion ++VOID ++phy_DigitalPredistortion8723B( ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PADAPTER pAdapter, ++#else ++ IN PDM_ODM_T pDM_Odm, ++#endif ++ IN BOOLEAN is2T ++ ) ++{ ++#if (RT_PLATFORM == PLATFORM_WINDOWS) ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++ u4Byte tmpReg, tmpReg2, index, i; ++ u1Byte path, pathbound = PATH_NUM; ++ u4Byte AFE_backup[IQK_ADDA_REG_NUM]; ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u4Byte BB_backup[DP_BB_REG_NUM]; ++ u4Byte BB_REG[DP_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rFPGA0_RFMOD, ++ rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE}; ++ u4Byte BB_settings[DP_BB_REG_NUM] = { ++ 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, ++ 0x0, 0x0, 0x0}; ++ ++ u4Byte RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; ++ u4Byte RF_REG[DP_RF_REG_NUM] = { ++ RF_TXBIAS_A}; ++ ++ u4Byte MAC_backup[IQK_MAC_REG_NUM]; ++ u4Byte MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u4Byte Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = { ++ {0x1e1e1e1e, 0x03901e1e}, ++ {0x18181818, 0x03901818}, ++ {0x0e0e0e0e, 0x03900e0e} ++ }; ++ ++ u4Byte AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u1Byte RetryCount = 0; ++ ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_DigitalPredistortion8723B()\n")); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_DigitalPredistortion8723B for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ ++ //save BB default value ++ for(index=0; index tx_agc 1f ~11 ++ // PA gain = 11 & PAD2 => tx_agc 10~0e ++ // PA gain = 01 => tx_agc 0b~0d ++ // PA gain = 00 => tx_agc 0a~00 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 3; index++) ++ ODM_SetBBReg(pDM_Odm, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, Tx_AGC[i][1]); ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02097098); ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path A ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x80047788); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x00047788); ++ ODM_delay_ms(50); ++ } ++ ++ //PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 3; index++) ++ ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, 0x34343434); ++ ODM_SetBBReg(pDM_Odm,0xe08+index*4, bMaskDWord, 0x03903434); ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, 0x34343434); ++ ++ //==================================== ++ // PAGE_B for Path-A DPK setting ++ //==================================== ++ // open inner loopback @ b00[19]:10 od 0xb00 0x01097018 ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02017098); ++ ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); ++ ++ //rf_lpbk_setup ++ //1.rf 00:5205a, rf 0d:0e52c ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0c, bMaskDWord, 0x8992b); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0d, bMaskDWord, 0x0e52c); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bMaskDWord, 0x5205a ); ++ ++ //----send one shot signal----// ++ // Path A ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pRFCalibrateInfo->bDPPathAOK) ++ { ++ //----read back measurement results----// ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c297018); ++ tmpReg = ODM_GetBBReg(pDM_Odm, 0xbe0, bMaskDWord); ++ ODM_delay_ms(10); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c29701f); ++ tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbe8, bMaskDWord); ++ ODM_delay_ms(10); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff ) ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x02017098); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x800000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ RetryCount++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2)); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK Sucess\n")); ++ pRFCalibrateInfo->bDPPathAOK = TRUE; ++ break; ++ } ++ } ++ RetryCount = 0; ++ ++ //DPP path A ++ if(pRFCalibrateInfo->bDPPathAOK) ++ { ++ // DP settings ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x01017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x776d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00880000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ++ for(i=rPdp_AntA; i<=0xb3c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A ofsset = 0x%x\n", i)); ++ } ++ ++ //pwsf ++ ODM_SetBBReg(pDM_Odm, 0xb40, bMaskDWord, 0x40404040); ++ ODM_SetBBReg(pDM_Odm, 0xb44, bMaskDWord, 0x28324040); ++ ODM_SetBBReg(pDM_Odm, 0xb48, bMaskDWord, 0x10141920); ++ ++ for(i=0xb4c; i<=0xb5c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ //TX_AGC boundary ++ ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x00000000); ++ } ++ ++ //DPK path B ++ if(is2T) ++ { ++ //Path A to standby mode ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ ++ // LUTs => tx_agc ++ // PA gain = 11 & PAD1, => tx_agc 1f ~11 ++ // PA gain = 11 & PAD2, => tx_agc 10 ~0e ++ // PA gain = 01 => tx_agc 0b ~0d ++ // PA gain = 00 => tx_agc 0a ~00 ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02097098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path B ++ ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntB, bMaskDWord, 0x80047788); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x00047788); ++ ODM_delay_ms(50); ++ } ++ ++ // PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 4; index++) ++ ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, 0x34343434); ++ ++ // PAGE_B for Path-B DPK setting ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ // RF lpbk switches on ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x0101000f); ++ ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x01120103); ++ ++ //Path-B RF lpbk ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x0c, bMaskDWord, 0x8992b); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x0d, bMaskDWord, 0x0e52c); ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bMaskDWord, 0x5205a); ++ ++ //----send one shot signal----// ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pRFCalibrateInfo->bDPPathBOK) ++ { ++ //----read back measurement results----// ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c297018); ++ tmpReg = ODM_GetBBReg(pDM_Odm, 0xbf0, bMaskDWord); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c29701f); ++ tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbf8, bMaskDWord); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff) ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x800000); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); ++ ODM_delay_ms(1); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); ++ ODM_delay_ms(50); ++ RetryCount++; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2)); ++ } ++ else ++ { ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK Success\n")); ++ pRFCalibrateInfo->bDPPathBOK = TRUE; ++ break; ++ } ++ } ++ ++ //DPP path B ++ if(pRFCalibrateInfo->bDPPathBOK) ++ { ++ // DP setting ++ // LUT by SRAM ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x01017098); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x776d9f84); ++ ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ++ ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); ++ ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x400000); ++ for(i=0xb60; i<=0xb9c; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B ofsset = 0x%x\n", i)); ++ } ++ ++ // PWSF ++ ODM_SetBBReg(pDM_Odm, 0xba0, bMaskDWord, 0x40404040); ++ ODM_SetBBReg(pDM_Odm, 0xba4, bMaskDWord, 0x28324050); ++ ODM_SetBBReg(pDM_Odm, 0xba8, bMaskDWord, 0x0c141920); ++ ++ for(i=0xbac; i<=0xbbc; i+=4) ++ { ++ ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ // tx_agc boundary ++ ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); ++ ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ++ ++ } ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x00000000); ++ } ++ } ++ ++ //reload BB default value ++ for(index=0; indexbDPdone = TRUE; ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_DigitalPredistortion8723B()\n")); ++#endif ++} ++ ++VOID ++PHY_DigitalPredistortion_8723B( ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PADAPTER pAdapter ++#else ++ IN PDM_ODM_T pDM_Odm ++#endif ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ return; ++ ++ if(pRFCalibrateInfo->bDPdone) ++ return; ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ phy_DigitalPredistortion8723B(pAdapter, TRUE); ++ } ++ else ++#endif ++ { ++ // For 88C 1T1R ++ phy_DigitalPredistortion8723B(pAdapter, FALSE); ++ } ++} ++ ++ ++ ++//return value TRUE => Main; FALSE => Aux ++ ++BOOLEAN phy_QueryRFPathSwitch_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN BOOLEAN is2T ++ ) ++{ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ #endif ++ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ #endif ++#endif ++ ++ ++ if(ODM_GetBBReg(pDM_Odm, 0x92C, bMaskDWord) == 0x01) ++ return TRUE; ++ else ++ return FALSE; ++ ++} ++ ++ ++ ++//return value TRUE => Main; FALSE => Aux ++BOOLEAN PHY_QueryRFPathSwitch_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm ++#else ++ IN PADAPTER pAdapter ++#endif ++ ) ++{ ++ ++#if DISABLE_BB_RF ++ return TRUE; ++#endif ++ ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ return phy_QueryRFPathSwitch_8723B(pAdapter, FALSE); ++#else ++ return phy_QueryRFPathSwitch_8723B(pDM_Odm, FALSE); ++#endif ++ ++} ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_win.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_win.h +new file mode 100644 +index 0000000..296d404 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/halphyrf_8723b_win.h +@@ -0,0 +1,129 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL_PHY_RF_8723B_H__ ++#define __HAL_PHY_RF_8723B_H__ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define index_mapping_NUM_8723B 15 ++#define AVG_THERMAL_NUM_8723B 4 ++ ++#include "halphyrf_win.h" ++ ++void ConfigureTxpowerTrack_8723B( ++ PTXPWRTRACK_CFG pConfig ++ ); ++ ++void DoIQK_8723B( ++ PVOID pDM_VOID, ++ u1Byte DeltaThermalIndex, ++ u1Byte ThermalValue, ++ u1Byte Threshold ++ ); ++ ++VOID ++ODM_TxPwrTrackSetPwr_8723B( ++ PDM_ODM_T pDM_Odm, ++ PWRTRACK_METHOD Method, ++ u1Byte RFPath, ++ u1Byte ChannelMappedIndex ++ ); ++ ++//1 7. IQK ++ ++void ++PHY_IQCalibrate_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER Adapter, ++#endif ++ IN BOOLEAN bReCovery); ++ ++BOOLEAN ++ODM_SetIQCbyRFpath( ++//#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++//#else ++ //IN PADAPTER pAdapter, ++//#endif ++ IN u4Byte RFpath ++ ); ++ ++// ++// LC calibrate ++// ++void ++PHY_LCCalibrate_8723B( ++ IN PDM_ODM_T pDM_Odm ++); ++ ++// ++// AP calibrate ++// ++void ++PHY_APCalibrate_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN s1Byte delta); ++void ++PHY_DigitalPredistortion_8723B( IN PADAPTER pAdapter); ++ ++ ++VOID ++_PHY_SaveADDARegisters_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN pu4Byte ADDABackup, ++ IN u4Byte RegisterNum ++ ); ++ ++VOID ++_PHY_PathADDAOn_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte ADDAReg, ++ IN BOOLEAN isPathAOn, ++ IN BOOLEAN is2T ++ ); ++ ++VOID ++_PHY_MACSettingCalibration_8723B( ++#if (DM_ODM_SUPPORT_TYPE & ODM_AP) ++ IN PDM_ODM_T pDM_Odm, ++#else ++ IN PADAPTER pAdapter, ++#endif ++ IN pu4Byte MACReg, ++ IN pu4Byte MACBackup ++ ); ++ ++#endif // #ifndef __HAL_PHY_RF_8188E_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_regconfig8723b.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_regconfig8723b.c +new file mode 100644 +index 0000000..2f18788 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_regconfig8723b.c +@@ -0,0 +1,232 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8723B_SUPPORT == 1) ++ ++void ++odm_ConfigRFReg_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data, ++ IN ODM_RF_RADIO_PATH_E RF_PATH, ++ IN u4Byte RegAddr ++ ) ++{ ++ if(Addr == 0xfe || Addr == 0xffe) ++ { ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ ODM_sleep_ms(50); ++ #else ++ ODM_delay_ms(50); ++ #endif ++ } ++ else ++ { ++ ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); ++ // Add 1us delay between BB/RF register setting. ++ ODM_delay_us(1); ++ ++ //For disable/enable test in high temperature, the B6 value will fail to fill. Suggestion by BB Stanley, 2013.06.25. ++ if(Addr == 0xb6) ++ { ++ u4Byte getvalue=0; ++ u1Byte count =0; ++ getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord); ++ ++ ODM_delay_us(1); ++ ++ while((getvalue>>8)!=(Data>>8)) ++ { ++ count++; ++ ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); ++ ODM_delay_us(1); ++ getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [B6] getvalue 0x%x, Data 0x%x, count %d\n", getvalue, Data,count)); ++ if(count>5) ++ break; ++ } ++ } ++ ++ if(Addr == 0xb2) ++ { ++ u4Byte getvalue=0; ++ u1Byte count =0; ++ getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord); ++ ++ ODM_delay_us(1); ++ ++ while(getvalue!=Data) ++ { ++ count++; ++ ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); ++ ODM_delay_us(1); ++ //Do LCK againg ++ ODM_SetRFReg(pDM_Odm, RF_PATH, 0x18, bRFRegOffsetMask, 0x0fc07); ++ ODM_delay_us(1); ++ getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [B2] getvalue 0x%x, Data 0x%x, count %d\n", getvalue, Data,count)); ++ if(count>5) ++ break; ++ } ++ } ++ } ++} ++ ++ ++void ++odm_ConfigRF_RadioA_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data ++ ) ++{ ++ u4Byte content = 0x1000; // RF_Content: radioa_txt ++ u4Byte maskforPhySet= (u4Byte)(content&0xE000); ++ ++ odm_ConfigRFReg_8723B(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data)); ++} ++ ++void ++odm_ConfigRF_RadioB_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data ++ ) ++{ ++ u4Byte content = 0x1001; // RF_Content: radiob_txt ++ u4Byte maskforPhySet= (u4Byte)(content&0xE000); ++ ++ odm_ConfigRFReg_8723B(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data)); ++ ++} ++ ++void ++odm_ConfigMAC_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u1Byte Data ++ ) ++{ ++ ODM_Write1Byte(pDM_Odm, Addr, Data); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data)); ++} ++ ++void ++odm_ConfigBB_AGC_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ) ++{ ++ ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); ++ // Add 1us delay between BB/RF register setting. ++ ODM_delay_us(1); ++ ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data)); ++} ++ ++void ++odm_ConfigBB_PHY_REG_PG_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Band, ++ IN u4Byte RfPath, ++ IN u4Byte TxNum, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ) ++{ ++ if (Addr == 0xfe || Addr == 0xffe) ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ ODM_sleep_ms(50); ++ #else ++ ODM_delay_ms(50); ++ #endif ++ else ++ { ++#if !(DM_ODM_SUPPORT_TYPE&ODM_AP) ++ PHY_StoreTxPowerByRate(pDM_Odm->Adapter, Band, RfPath, TxNum, Addr, Bitmask, Data); ++#endif ++ } ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data)); ++} ++ ++void ++odm_ConfigBB_PHY_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ) ++{ ++ if (Addr == 0xfe) ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ ODM_sleep_ms(50); ++ #else ++ ODM_delay_ms(50); ++ #endif ++ else if (Addr == 0xfd) ++ ODM_delay_ms(5); ++ else if (Addr == 0xfc) ++ ODM_delay_ms(1); ++ else if (Addr == 0xfb) ++ ODM_delay_us(50); ++ else if (Addr == 0xfa) ++ ODM_delay_us(5); ++ else if (Addr == 0xf9) ++ ODM_delay_us(1); ++ else ++ { ++ ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); ++ } ++ ++ // Add 1us delay between BB/RF register setting. ++ ODM_delay_us(1); ++ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data)); ++} ++ ++void ++odm_ConfigBB_TXPWR_LMT_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte Regulation, ++ IN pu1Byte Band, ++ IN pu1Byte Bandwidth, ++ IN pu1Byte RateSection, ++ IN pu1Byte RfPath, ++ IN pu1Byte Channel, ++ IN pu1Byte PowerLimit ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ++ PHY_SetTxPowerLimit(pDM_Odm, Regulation, Band, ++ Bandwidth, RateSection, RfPath, Channel, PowerLimit); ++#endif ++} ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_regconfig8723b.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_regconfig8723b.h +new file mode 100644 +index 0000000..4f2d388 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_regconfig8723b.h +@@ -0,0 +1,96 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_ODM_REGCONFIG_H_8723B ++#define __INC_ODM_REGCONFIG_H_8723B ++ ++#if (RTL8723B_SUPPORT == 1) ++ ++void ++odm_ConfigRFReg_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data, ++ IN ODM_RF_RADIO_PATH_E RF_PATH, ++ IN u4Byte RegAddr ++ ); ++ ++void ++odm_ConfigRF_RadioA_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data ++ ); ++ ++void ++odm_ConfigRF_RadioB_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Data ++ ); ++ ++void ++odm_ConfigMAC_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u1Byte Data ++ ); ++ ++void ++odm_ConfigBB_AGC_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ); ++ ++void ++odm_ConfigBB_PHY_REG_PG_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Band, ++ IN u4Byte RfPath, ++ IN u4Byte TxNum, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ); ++ ++void ++odm_ConfigBB_PHY_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN u4Byte Addr, ++ IN u4Byte Bitmask, ++ IN u4Byte Data ++ ); ++ ++void ++odm_ConfigBB_TXPWR_LMT_8723B( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte Regulation, ++ IN pu1Byte Band, ++ IN pu1Byte Bandwidth, ++ IN pu1Byte RateSection, ++ IN pu1Byte RfPath, ++ IN pu1Byte Channel, ++ IN pu1Byte PowerLimit ++ ); ++ ++#endif ++#endif // end of SUPPORT ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_rtl8723b.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_rtl8723b.c +new file mode 100644 +index 0000000..1e0f2c4 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_rtl8723b.c +@@ -0,0 +1,70 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++//============================================================ ++// include files ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (RTL8723B_SUPPORT == 1) ++ ++ s1Byte ++odm_CCKRSSI_8723B( ++ IN u1Byte LNA_idx, ++ IN u1Byte VGA_idx ++ ) ++{ ++ s1Byte rx_pwr_all=0x00; ++ switch (LNA_idx) { ++ //46 53 73 95 201301231630 ++ // 46 53 77 99 201301241630 ++ ++ case 6: ++ rx_pwr_all = -40 - (2 * VGA_idx); ++ break; ++ case 4: ++ rx_pwr_all = -20 - (2 * VGA_idx); ++ break; ++ case 1: ++ rx_pwr_all = 0 - (2 * VGA_idx); ++ break; ++ case 0: ++ rx_pwr_all = 10 - (2 * VGA_idx); ++ break; ++ default: ++ /*rx_pwr_all = -53+(2*(31-VGA_idx));*/ ++ /*DbgPrint("wrong LNA index\n");*/ ++ break; ++ ++ } ++ return rx_pwr_all; ++} ++ ++#endif // end if RTL8723B ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_rtl8723b.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_rtl8723b.h +new file mode 100644 +index 0000000..a7739ef +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/phydm_rtl8723b.h +@@ -0,0 +1,29 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __ODM_RTL8723B_H__ ++#define __ODM_RTL8723B_H__ ++ ++s1Byte ++odm_CCKRSSI_8723B( ++ IN u1Byte LNA_idx, ++ IN u1Byte VGA_idx ++ ); ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/version_rtl8723b.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/version_rtl8723b.h +new file mode 100644 +index 0000000..93f2189 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/version_rtl8723b.h +@@ -0,0 +1,5 @@ ++/*RTL8723B PHY Parameters*/ ++#define SVN_COMMIT_VERSION_8723B 26 ++#define RELEASE_DATE_8723B 20150617 ++#define COMMIT_BY_8723B "BB_STANLEY" ++#define RELEASE_VERSION_8723B 24 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/halcomtxbf.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/halcomtxbf.c +new file mode 100644 +index 0000000..427dad4 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/halcomtxbf.c +@@ -0,0 +1,551 @@ ++//============================================================ ++// Description: ++// ++// This file is for TXBF mechanism ++// ++//============================================================ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++/*Beamforming halcomtxbf API create by YuChen 2015/05*/ ++ ++VOID ++halComTxbf_beamformInit( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_Init(pDM_Odm); ++} ++ ++/*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/ ++VOID ++halComTxbf_ConfigGtab( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_ConfigGtab(pDM_Odm); ++} ++ ++VOID ++phydm_beamformSetSoundingEnter( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_EnterWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_EnterWorkItem)); ++#else ++ halComTxbf_EnterWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetSoundingLeave( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_LeaveWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_LeaveWorkItem)); ++#else ++ halComTxbf_LeaveWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetSoundingRate( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_RateWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_RateWorkItem)); ++#else ++ halComTxbf_RateWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetSoundingStatus( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_StatusWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_StatusWorkItem)); ++#else ++ halComTxbf_StatusWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetSoundingFwNdpa( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (*pDM_Odm->pbFwDwRsvdPageInProgress) ++ ODM_SetTimer(pDM_Odm, &(pTxbfInfo->Txbf_FwNdpaTimer), 5); ++ else ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_FwNdpaWorkItem)); ++#else ++ halComTxbf_FwNdpaWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetSoundingClk( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_ClkWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_ClkWorkItem)); ++#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PADAPTER padapter = pDM_Odm->Adapter; ++ ++ rtw_run_in_thread_cmd(padapter, halComTxbf_ClkWorkItemCallback, padapter); ++#else ++ halComTxbf_ClkWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetResetTxPath( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_ResetTxPathWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_ResetTxPathWorkItem)); ++#else ++ halComTxbf_ResetTxPathWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++phydm_beamformSetGetTxRate( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ if (PlatformIsWorkItemScheduled(&(pTxbfInfo->Txbf_GetTxRateWorkItem)) == FALSE) ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_GetTxRateWorkItem)); ++#else ++ halComTxbf_GetTxRateWorkItemCallback(pDM_Odm); ++#endif ++} ++ ++VOID ++halComTxbf_EnterWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ u1Byte Idx = pTxbfInfo->TXBFIdx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) ++ HalTxbfJaguar_Enter(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8192E) ++ HalTxbf8192E_Enter(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_Enter(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8821B) ++ HalTxbf8821B_Enter(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_Enter(pDM_Odm, Idx); ++} ++ ++VOID ++halComTxbf_LeaveWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ u1Byte Idx = pTxbfInfo->TXBFIdx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) ++ HalTxbfJaguar_Leave(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8192E) ++ HalTxbf8192E_Leave(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_Leave(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8821B) ++ HalTxbf8821B_Leave(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_Leave(pDM_Odm, Idx); ++} ++ ++ ++VOID ++halComTxbf_FwNdpaWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ u1Byte Idx = pTxbfInfo->NdpaIdx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) ++ HalTxbfJaguar_FwTxBF(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8192E) ++ HalTxbf8192E_FwTxBF(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_FwTxBF(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8821B) ++ HalTxbf8821B_FwTxBF(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_FwTxBF(pDM_Odm, Idx); ++} ++ ++VOID ++halComTxbf_ClkWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8812) ++ HalTxbfJaguar_Clk_8812A(pDM_Odm); ++} ++ ++ ++ ++VOID ++halComTxbf_RateWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ u1Byte BW = pTxbfInfo->BW; ++ u1Byte Rate = pTxbfInfo->Rate; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8812) ++ HalTxbf8812A_setNDPArate(pDM_Odm, BW, Rate); ++ else if (pDM_Odm->SupportICType & ODM_RTL8192E) ++ HalTxbf8192E_setNDPArate(pDM_Odm, BW, Rate); ++ else if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_setNDPArate(pDM_Odm, BW, Rate); ++ ++} ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++halComTxbf_FwNdpaTimerCallback( ++ IN PRT_TIMER pTimer ++ ) ++{ ++ ++ PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (*pDM_Odm->pbFwDwRsvdPageInProgress) ++ ODM_SetTimer(pDM_Odm, &(pTxbfInfo->Txbf_FwNdpaTimer), 5); ++ else ++ PlatformScheduleWorkItem(&(pTxbfInfo->Txbf_FwNdpaWorkItem)); ++} ++#endif ++ ++ ++VOID ++halComTxbf_StatusWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ u1Byte Idx = pTxbfInfo->TXBFIdx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) ++ HalTxbfJaguar_Status(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8192E) ++ HalTxbf8192E_Status(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_Status(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8821B) ++ HalTxbf8821B_Status(pDM_Odm, Idx); ++ else if (pDM_Odm->SupportICType & ODM_RTL8822B) ++ HalTxbf8822B_Status(pDM_Odm, Idx); ++} ++ ++VOID ++halComTxbf_ResetTxPathWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ u1Byte Idx = pTxbfInfo->TXBFIdx; ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_ResetTxPath(pDM_Odm, Idx); ++ ++} ++ ++VOID ++halComTxbf_GetTxRateWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ) ++{ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#else ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#endif ++ ++ if (pDM_Odm->SupportICType & ODM_RTL8814A) ++ HalTxbf8814A_GetTxRate(pDM_Odm); ++} ++ ++ ++BOOLEAN ++HalComTxbf_Set( ++ IN PVOID pDM_VOID, ++ IN u1Byte setType, ++ IN PVOID pInBuf ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PBOOLEAN pBoolean=(PBOOLEAN)pInBuf; ++ pu1Byte pU1Tmp=(pu1Byte)pInBuf; ++ pu4Byte pU4Tmp=(pu4Byte)pInBuf; ++ PHAL_TXBF_INFO pTxbfInfo = &pDM_Odm->BeamformingInfo.TxbfInfo; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] setType = 0x%X\n", __func__, setType)); ++ ++ switch(setType){ ++ case TXBF_SET_SOUNDING_ENTER: ++ pTxbfInfo->TXBFIdx = *pU1Tmp; ++ phydm_beamformSetSoundingEnter(pDM_Odm); ++ break; ++ ++ case TXBF_SET_SOUNDING_LEAVE: ++ pTxbfInfo->TXBFIdx = *pU1Tmp; ++ phydm_beamformSetSoundingLeave(pDM_Odm); ++ break; ++ ++ case TXBF_SET_SOUNDING_RATE: ++ pTxbfInfo->BW = pU1Tmp[0]; ++ pTxbfInfo->Rate = pU1Tmp[1]; ++ phydm_beamformSetSoundingRate(pDM_Odm); ++ break; ++ ++ case TXBF_SET_SOUNDING_STATUS: ++ pTxbfInfo->TXBFIdx = *pU1Tmp; ++ phydm_beamformSetSoundingStatus(pDM_Odm); ++ break; ++ ++ case TXBF_SET_SOUNDING_FW_NDPA: ++ pTxbfInfo->NdpaIdx = *pU1Tmp; ++ phydm_beamformSetSoundingFwNdpa(pDM_Odm); ++ break; ++ ++ case TXBF_SET_SOUNDING_CLK: ++ phydm_beamformSetSoundingClk(pDM_Odm); ++ break; ++ ++ case TXBF_SET_TX_PATH_RESET: ++ pTxbfInfo->TXBFIdx = *pU1Tmp; ++ phydm_beamformSetResetTxPath(pDM_Odm); ++ break; ++ ++ case TXBF_SET_GET_TX_RATE: ++ phydm_beamformSetGetTxRate(pDM_Odm); ++ break; ++ ++ } ++ ++ return TRUE; ++} ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++BOOLEAN ++HalComTxbf_Get( ++ IN PADAPTER Adapter, ++ IN u1Byte getType, ++ OUT PVOID pOutBuf ++ ) ++{ ++ PHAL_DATA_TYPE pHalData=GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PBOOLEAN pBoolean=(PBOOLEAN)pOutBuf; ++ ps4Byte pS4Tmp=(ps4Byte)pOutBuf; ++ pu4Byte pU4Tmp=(pu4Byte)pOutBuf; ++ pu1Byte pU1Tmp=(pu1Byte)pOutBuf; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (getType == TXBF_GET_EXPLICIT_BEAMFORMEE) { ++ if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(Adapter)) ++ *pBoolean = FALSE; ++ else if (/*IS_HARDWARE_TYPE_8822B(Adapter) ||*/ ++ IS_HARDWARE_TYPE_8821B(Adapter) || ++ IS_HARDWARE_TYPE_8192E(Adapter) || ++ IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) ++ *pBoolean = TRUE; ++ else ++ *pBoolean = FALSE; ++ } else if (getType == TXBF_GET_EXPLICIT_BEAMFORMER) { ++ if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(Adapter)) ++ *pBoolean = FALSE; ++ else if (/*IS_HARDWARE_TYPE_8822B(Adapter) ||*/ ++ IS_HARDWARE_TYPE_8821B(Adapter) || ++ IS_HARDWARE_TYPE_8192E(Adapter) || ++ IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) { ++ if(pHalData->RF_Type == RF_2T2R || pHalData->RF_Type == RF_3T3R) ++ *pBoolean = TRUE; ++ else ++ *pBoolean = FALSE; ++ } else ++ *pBoolean = FALSE; ++ } else if (getType == TXBF_GET_MU_MIMO_STA) { ++#if (RTL8822B_SUPPORT == 1) ++ if (/*pDM_Odm->SupportICType & (ODM_RTL8822B)*/ ++ IS_HARDWARE_TYPE_8822B(Adapter)) ++ *pBoolean = TRUE; ++ else ++#endif ++ *pBoolean = FALSE; ++ ++ ++ } else if (getType == TXBF_GET_MU_MIMO_AP) { ++#if (RTL8822B_SUPPORT == 1) ++ if (/*pDM_Odm->SupportICType & (ODM_RTL8822B)*/ ++ IS_HARDWARE_TYPE_8822B(Adapter)) ++ *pBoolean = TRUE; ++ else ++#endif ++ *pBoolean = FALSE; ++ } ++ ++ return TRUE; ++} ++#endif ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/halcomtxbf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/halcomtxbf.h +new file mode 100644 +index 0000000..7be4efd +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/halcomtxbf.h +@@ -0,0 +1,181 @@ ++#ifndef __HAL_COM_TXBF_H__ ++#define __HAL_COM_TXBF_H__ ++ ++/* ++typedef BOOLEAN ++(*TXBF_GET)( ++ IN PVOID pAdapter, ++ IN u1Byte getType, ++ OUT PVOID pOutBuf ++ ); ++ ++typedef BOOLEAN ++(*TXBF_SET)( ++ IN PVOID pAdapter, ++ IN u1Byte setType, ++ OUT PVOID pInBuf ++ ); ++*/ ++#define TxBF_Nr(a, b) ((a > b) ? (b) : (a)) ++ ++typedef enum _TXBF_SET_TYPE{ ++ TXBF_SET_SOUNDING_ENTER, ++ TXBF_SET_SOUNDING_LEAVE, ++ TXBF_SET_SOUNDING_RATE, ++ TXBF_SET_SOUNDING_STATUS, ++ TXBF_SET_SOUNDING_FW_NDPA, ++ TXBF_SET_SOUNDING_CLK, ++ TXBF_SET_TX_PATH_RESET, ++ TXBF_SET_GET_TX_RATE ++}TXBF_SET_TYPE,*PTXBF_SET_TYPE; ++ ++ ++typedef enum _TXBF_GET_TYPE{ ++ TXBF_GET_EXPLICIT_BEAMFORMEE, ++ TXBF_GET_EXPLICIT_BEAMFORMER, ++ TXBF_GET_MU_MIMO_STA, ++ TXBF_GET_MU_MIMO_AP ++}TXBF_GET_TYPE,*PTXBF_GET_TYPE; ++ ++ ++ ++//2 HAL TXBF related ++typedef struct _HAL_TXBF_INFO { ++ u1Byte TXBFIdx; ++ u1Byte NdpaIdx; ++ u1Byte BW; ++ u1Byte Rate; ++ ++ RT_TIMER Txbf_FwNdpaTimer; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_WORK_ITEM Txbf_EnterWorkItem; ++ RT_WORK_ITEM Txbf_LeaveWorkItem; ++ RT_WORK_ITEM Txbf_FwNdpaWorkItem; ++ RT_WORK_ITEM Txbf_ClkWorkItem; ++ RT_WORK_ITEM Txbf_StatusWorkItem; ++ RT_WORK_ITEM Txbf_RateWorkItem; ++ RT_WORK_ITEM Txbf_ResetTxPathWorkItem; ++ RT_WORK_ITEM Txbf_GetTxRateWorkItem; ++#endif ++ ++} HAL_TXBF_INFO, *PHAL_TXBF_INFO; ++ ++#if (BEAMFORMING_SUPPORT == 1) ++ ++VOID ++halComTxbf_beamformInit( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++halComTxbf_ConfigGtab( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++halComTxbf_EnterWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_LeaveWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_FwNdpaWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_ClkWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_ResetTxPathWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_GetTxRateWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_RateWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++VOID ++halComTxbf_FwNdpaTimerCallback( ++ IN PRT_TIMER pTimer ++ ); ++ ++VOID ++halComTxbf_StatusWorkItemCallback( ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN PADAPTER Adapter ++#else ++ IN PVOID pDM_VOID ++#endif ++ ); ++ ++BOOLEAN ++HalComTxbf_Set( ++ IN PVOID pDM_VOID, ++ IN u1Byte setType, ++ IN PVOID pInBuf ++ ); ++ ++BOOLEAN ++HalComTxbf_Get( ++ IN PADAPTER Adapter, ++ IN u1Byte getType, ++ OUT PVOID pOutBuf ++ ); ++ ++#else ++#define halComTxbf_beamformInit(pDM_VOID) NULL ++#define halComTxbf_ConfigGtab(pDM_VOID) NULL ++#define halComTxbf_EnterWorkItemCallback(_Adapter) NULL ++#define halComTxbf_LeaveWorkItemCallback(_Adapter) NULL ++#define halComTxbf_FwNdpaWorkItemCallback(_Adapter) NULL ++#define halComTxbf_ClkWorkItemCallback(_Adapter) NULL ++#define halComTxbf_RateWorkItemCallback(_Adapter) NULL ++#define halComTxbf_FwNdpaTimerCallback(_Adapter) NULL ++#define halComTxbf_StatusWorkItemCallback(_Adapter) NULL ++#define HalComTxbf_Get(_Adapter, _getType, _pOutBuf) ++ ++#endif ++ ++#endif // #ifndef __HAL_COM_TXBF_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8192e.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8192e.c +new file mode 100644 +index 0000000..41a8bac +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8192e.c +@@ -0,0 +1,392 @@ ++//============================================================ ++// Description: ++// ++// This file is for 8192E TXBF mechanism ++// ++//============================================================ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8192E_SUPPORT == 1) ++ ++VOID ++HalTxbf8192E_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8192E, (Rate << 2 | BW)); ++ ++} ++ ++VOID ++halTxbf8192E_RfMode( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamInfo ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ BOOLEAN bSelfBeamformer = FALSE; ++ BOOLEAN bSelfBeamformee = FALSE; ++ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pDM_Odm->RFType == ODM_1T1R) ++ return; ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) { ++ /*Path_A*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode 0x30=0x18000*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/ ++ /*Path_B*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/ ++ } else { ++ /*Path_A*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/ ++ /*Path_B*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/ ++ } ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) { ++ ODM_SetBBReg(pDM_Odm, rFPGA1_TxInfo, bMaskDWord, 0x83321333); ++ ODM_SetBBReg(pDM_Odm, rCCK0_AFESetting, bMaskByte3, 0xc1); ++ } else ++ ODM_SetBBReg(pDM_Odm, rFPGA1_TxInfo, bMaskDWord, 0x81121313); ++} ++ ++ ++ ++VOID ++halTxbf8192E_FwTxBFCmd( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx, Period0 = 0, Period1 = 0; ++ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; ++ u1Byte u1TxBFParm[3] = {0}; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ if (pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (Idx == 0) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum0 = 0xFE; ++ else ++ PageNum0 = 0xFF; //stop sounding ++ Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } else if (Idx == 1) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum1 = 0xFE; ++ else ++ PageNum1 = 0xFF; //stop sounding ++ Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } ++ } ++ } ++ ++ u1TxBFParm[0] = PageNum0; ++ u1TxBFParm[1] = PageNum1; ++ u1TxBFParm[2] = (Period1 << 4) | Period0; ++ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_TXBF, 3, u1TxBFParm); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ++ ("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1)); ++} ++ ++ ++VOID ++halTxbf8192E_DownloadNDPA( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page; ++ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; ++ BOOLEAN bSendBeacon = FALSE; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; ++ /*default reseved 1 page for the IC type which is undefined.*/ ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ *pDM_Odm->pbFwDwRsvdPageInProgress = TRUE; ++#endif ++ if (Idx == 0) ++ Head_Page = 0xFE; ++ else ++ Head_Page = 0xFE; ++ ++ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy); ++ ++ /*Set REG_CR bit 8. DMA beacon by SW.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8192E+1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8192E+1, (u1bTmp | BIT0)); ++ ++ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ ++ tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2); ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2, tmpReg422 & (~BIT6)); ++ ++ if (tmpReg422 & BIT6) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s There is an Adapter is sending beacon.\n", __func__)); ++ bSendBeacon = TRUE; ++ } ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xFE/0xFD NDPA Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+1, Head_Page); ++ ++ do { ++ /*Clear beacon valid check bit.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2); ++ ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2, (BcnValidReg | BIT0)); ++ ++ // download NDPA rsvd page. ++ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); ++ ++#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3); ++ count = 0; ++ while ((count < 20) && (u1bTmp & BIT4)) { ++ count++; ++ ODM_delay_us(10); ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3); ++ } ++ ODM_Write1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3, u1bTmp | BIT4); ++#endif ++ ++ /*check rsvd page download OK.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2); ++ count = 0; ++ while (!(BcnValidReg & BIT0) && count < 20) { ++ count++; ++ ODM_delay_us(10); ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2); ++ } ++ DLBcnCount++; ++ } while (!(BcnValidReg & BIT0) && DLBcnCount < 5); ++ ++ if (!(BcnValidReg & BIT0)) ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s Download RSVD page failed!\n", __func__)); ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xF9 Beacon Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+1, TxPageBndy); ++ ++ /*To make sure that if there exists an adapter which would like to send beacon.*/ ++ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ ++ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ ++ /*the beacon cannot be sent by HW.*/ ++ /*2010.06.23. Added by tynli.*/ ++ if (bSendBeacon) ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2, tmpReg422); ++ ++ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ ++ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8192E+1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8192E+1, (u1bTmp & (~BIT0))); ++ ++ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ *pDM_Odm->pbFwDwRsvdPageInProgress = FALSE; ++#endif ++} ++ ++ ++VOID ++HalTxbf8192E_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte BFerBFeeIdx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; ++ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); ++ u4Byte CSI_Param; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ u2Byte STAid = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ halTxbf8192E_RfMode(pDM_Odm, pBeamformingInfo); ++ ++ if (pDM_Odm->RFType == ODM_2T2R) ++ ODM_Write4Byte(pDM_Odm, 0xd80, 0x00000000); /*Nc =2*/ ++ ++ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E, 0xCB); ++ ++ /*MAC address/Partial AID of Beamformer*/ ++ if (BFerIdx == 0) { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8192E+i), BeamformerEntry.MacAddr[i]); ++ } else { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8192E+i), BeamformerEntry.MacAddr[i]); ++ } ++ ++ /*CSI report parameters of Beamformer Default use Nc = 2*/ ++ CSI_Param = 0x03090309; ++ ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8192E, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8192E, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8192E, CSI_Param); ++ ++ /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E+3, 0x50); ++ ++ } ++ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ STAid = BeamformeeEntry.MacId; ++ else ++ STAid = BeamformeeEntry.P_AID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s], STAid=0x%X\n", __func__, STAid)); ++ ++ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ ++ if (BFeeIdx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E, STAid); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+3) | BIT4 | BIT6 | BIT7); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2, STAid | BIT12 | BIT14 | BIT15); ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BFeeIdx == 0) { ++ /*Get BIT24 & BIT25*/ ++ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3) & 0x3; ++ ++ ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3, tmp | 0x60); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E, STAid | BIT9); ++ } else { ++ /*Set BIT25*/ ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, STAid | 0xE200); ++ } ++ phydm_Beamforming_Notify(pDM_Odm); ++ ++ } ++} ++ ++ ++VOID ++HalTxbf8192E_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ halTxbf8192E_RfMode(pDM_Odm, pBeamInfo); ++ ++ /* Clear P_AID of Beamformee ++ * Clear MAC addresss of Beamformer ++ * Clear Associated Bfmee Sel ++ */ ++ if (pBeamInfo->BeamformCap == BEAMFORMING_CAP_NONE) ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E, 0xC8); ++ ++ if (Idx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E, 0); ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8192E, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8192E+4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E, 0); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2) & 0xF000); ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8192E, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8192E+4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2) & 0x60); ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Idx %d\n", __func__, Idx)); ++} ++ ++ ++VOID ++HalTxbf8192E_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte BeamCtrlVal; ++ u4Byte BeamCtrlReg; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ BeamCtrlVal = BeamformEntry.MacId; ++ else ++ BeamCtrlVal = BeamformEntry.P_AID; ++ ++ if (Idx == 0) ++ BeamCtrlReg = REG_TXBF_CTRL_8192E; ++ else { ++ BeamCtrlReg = REG_TXBF_CTRL_8192E+2; ++ BeamCtrlVal |= BIT12 | BIT14 | BIT15; ++ } ++ ++ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) ++ BeamCtrlVal |= BIT9; ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) ++ BeamCtrlVal |= BIT10; ++ } else ++ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); ++ ++ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Idx %d BeamCtrlReg %x BeamCtrlVal %x\n", __func__, Idx, BeamCtrlReg, BeamCtrlVal)); ++} ++ ++ ++VOID ++HalTxbf8192E_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ halTxbf8192E_DownloadNDPA(pDM_Odm, Idx); ++ ++ halTxbf8192E_FwTxBFCmd(pDM_Odm); ++} ++ ++#endif /* #if (RTL8192E_SUPPORT == 1)*/ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8192e.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8192e.h +new file mode 100644 +index 0000000..be70cc6 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8192e.h +@@ -0,0 +1,52 @@ ++#ifndef __HAL_TXBF_8192E_H__ ++#define __HAL_TXBF_8192E_H__ ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8192E_SUPPORT == 1) ++VOID ++HalTxbf8192E_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++); ++ ++VOID ++HalTxbf8192E_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8192E_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8192E_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8192E_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++#else ++ ++#define HalTxbf8192E_setNDPArate(pDM_VOID, BW, Rate) ++#define HalTxbf8192E_Enter(pDM_VOID, Idx) ++#define HalTxbf8192E_Leave(pDM_VOID, Idx) ++#define HalTxbf8192E_Status(pDM_VOID, Idx) ++#define HalTxbf8192E_FwTxBF(pDM_VOID, Idx) ++ ++#endif ++ ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8814a.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8814a.c +new file mode 100644 +index 0000000..8eb36d6 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8814a.c +@@ -0,0 +1,653 @@ ++//============================================================ ++// Description: ++// ++// This file is for 8814A TXBF mechanism ++// ++//============================================================ ++ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8814A_SUPPORT == 1) ++ ++VOID ++HalTxbf8814A_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8814A, BW); ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_RATE_8814A, (u1Byte) Rate); ++ ++} ++ ++#define PHYDM_MEMORY_MAP_BUF_READ 0x8000 ++#define PHYDM_CTRL_INFO_PAGE 0x660 ++ ++VOID ++phydm_DataRate_8814A( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte macId, ++ OUT pu4Byte data, ++ IN u1Byte dataLen ++ ) ++{ ++ u1Byte i = 0; ++ u2Byte XReadDataAddr = 0; ++ ++ ODM_Write2Byte(pDM_Odm, REG_PKTBUF_DBG_CTRL_8814A, PHYDM_CTRL_INFO_PAGE); ++ XReadDataAddr = PHYDM_MEMORY_MAP_BUF_READ + macId*32; /*Ctrl Info: 32Bytes for each macid(n)*/ ++ ++ if ((XReadDataAddr < PHYDM_MEMORY_MAP_BUF_READ) || (XReadDataAddr > 0x8FFF)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("XReadDataAddr(0x%x) is not correct!\n", XReadDataAddr)); ++ return; ++ } ++ ++ /* Read data */ ++ for (i = 0; i < dataLen; i++) ++ *(data+i) = ODM_Read2Byte(pDM_Odm, XReadDataAddr+i); ++ ++} ++ ++VOID ++HalTxbf8814A_GetTxRate( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ u4Byte TxRptData = 0; ++ u1Byte DataRate = 0xFF; ++ ++ pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ ++ phydm_DataRate_8814A(pDM_Odm, (u1Byte)pEntry->MacId, &TxRptData, 1); ++ DataRate = (u1Byte)TxRptData; ++ DataRate &= bMask7bits; /*Bit7 indicates SGI*/ ++ ++ pDM_Odm->TxBfDataRate = DataRate; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] pDM_Odm->TxBfDataRate = 0x%x\n", __func__, pDM_Odm->TxBfDataRate)); ++} ++ ++VOID ++HalTxbf8814A_ResetTxPath( ++ IN PVOID pDM_VOID, ++ IN u1Byte idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ u1Byte Nr_index = 0; ++ ++ if (idx < BEAMFORMEE_ENTRY_NUM) ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; ++ else ++ return; ++ ++ if ((pDM_Odm->LastUSBHub) != (*pDM_Odm->HubUsbMode)) { ++ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), BeamformeeEntry.CompSteeringNumofBFer); ++ ++ if (idx == 0) { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskDWord, 0x93f93f0); ++ break; ++ } ++ } else { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); ++ break; ++ } ++ } ++ ++ pDM_Odm->LastUSBHub = *pDM_Odm->HubUsbMode; ++ } else ++ return; ++#endif ++} ++ ++ ++u1Byte ++halTxbf8814A_GetNtx( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Ntx = 0; ++ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { ++ if (*pDM_Odm->HubUsbMode == 2) {/*USB3.0*/ ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Ntx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Ntx = 2; ++ else ++ Ntx = 1; ++ } else if (*pDM_Odm->HubUsbMode == 1) /*USB 2.0 always 2Tx*/ ++ Ntx = 1; ++ else ++ Ntx = 1; ++ } else ++#endif ++ { ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Ntx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Ntx = 2; ++ else ++ Ntx = 1; ++ } ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Ntx = %d\n", __func__, Ntx)); ++ return Ntx; ++} ++ ++u1Byte ++halTxbf8814A_GetNrx( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Nrx = 0; ++ ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Nrx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Nrx = 2; ++ else if (pDM_Odm->RFType == ODM_2T2R) ++ Nrx = 1; ++ else if (pDM_Odm->RFType == ODM_2T3R) ++ Nrx = 2; ++ else if (pDM_Odm->RFType == ODM_2T4R) ++ Nrx = 3; ++ else if (pDM_Odm->RFType == ODM_1T1R) ++ Nrx = 0; ++ else if (pDM_Odm->RFType == ODM_1T2R) ++ Nrx = 1; ++ else ++ Nrx = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Nrx = %d\n", __func__, Nrx)); ++ return Nrx; ++} ++ ++VOID ++halTxbf8814A_RfMode( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamformingInfo, ++ IN u1Byte idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i, Nr_index = 0; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ ++ if (idx < BEAMFORMEE_ENTRY_NUM) ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; ++ else ++ return; ++ ++ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), BeamformeeEntry.CompSteeringNumofBFer); ++ ++ if (pDM_Odm->RFType == ODM_1T1R) ++ return; ++ ++ for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x1); ++ /*RF Mode table write enable*/ ++ } ++ ++ if (pBeamformingInfo->beamformee_su_cnt > 0) { ++ for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableAddr, 0xfffff, 0x18000); ++ /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData0, 0xfffff, 0xBE77F); ++ /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData1, 0xfffff, 0x226BF); ++ /*Enable TXIQGEN in RX mode*/ ++ } ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); ++ /*Enable TXIQGEN in RX mode*/ ++ } ++ ++ for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x0); ++ /*RF Mode table write disable*/ ++ } ++ ++ if (pBeamformingInfo->beamformee_su_cnt > 0) { ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ pDM_Odm->LastUSBHub = *pDM_Odm->HubUsbMode; ++#endif ++ ++ /*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, BIT28 | BIT29, 0x2); /*enable BB TxBF ant mapping register*/ ++ ++ if (idx == 0) { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskDWord, 0x93f93f0); ++ break; ++ } ++ } else { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); ++ break; ++ } ++ } ++ } ++ ++ if ((pBeamformingInfo->beamformee_su_cnt == 0) && (pBeamformingInfo->beamformer_su_cnt == 0)) { ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x932); /*set TxPath selection for 8814a BFer bug refine*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e9360); ++ } ++} ++#if 0 ++VOID ++halTxbf8814A_DownloadNDPA( ++ IN PADAPTER Adapter, ++ IN u1Byte Idx ++) ++{ ++ u1Byte u1bTmp = 0, tmpReg422 = 0; ++ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; ++ u2Byte Head_Page = 0x7FE; ++ BOOLEAN bSendBeacon = FALSE; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u2Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/ ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ pHalData->bFwDwRsvdPageInProgress = TRUE; ++ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu2Byte)&TxPageBndy); ++ ++ /*Set REG_CR bit 8. DMA beacon by SW.*/ ++ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1); ++ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp | BIT0)); ++ ++ ++ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ ++ tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2); ++ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422 & (~BIT6)); ++ ++ if (tmpReg422 & BIT6) { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("SetBeamformDownloadNDPA_8814A(): There is an Adapter is sending beacon.\n")); ++ bSendBeacon = TRUE; ++ } ++ ++ /*0x204[11:0] Beacon Head for TXDMA*/ ++ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, Head_Page); ++ ++ do { ++ /*Clear beacon valid check bit.*/ ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); ++ PlatformEFIOWrite1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1, (BcnValidReg | BIT7)); ++ ++ /*download NDPA rsvd page.*/ ++ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); ++ else ++ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); ++ ++ /*check rsvd page download OK.*/ ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); ++ count = 0; ++ while (!(BcnValidReg & BIT7) && count < 20) { ++ count++; ++ delay_us(10); ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 2); ++ } ++ DLBcnCount++; ++ } while (!(BcnValidReg & BIT7) && DLBcnCount < 5); ++ ++ if (!(BcnValidReg & BIT0)) ++ RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__)); ++ ++ /*0x204[11:0] Beacon Head for TXDMA*/ ++ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, TxPageBndy); ++ ++ /*To make sure that if there exists an adapter which would like to send beacon.*/ ++ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ ++ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ ++ /*the beacon cannot be sent by HW.*/ ++ /*2010.06.23. Added by tynli.*/ ++ if (bSendBeacon) ++ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422); ++ ++ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ ++ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ ++ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1); ++ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp & (~BIT0))); ++ ++ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++ ++ pHalData->bFwDwRsvdPageInProgress = FALSE; ++} ++ ++VOID ++halTxbf8814A_FwTxBFCmd( ++ IN PADAPTER Adapter ++) ++{ ++ u1Byte Idx, Period = 0; ++ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; ++ u1Byte u1TxBFParm[3] = {0}; ++ ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) { ++ PageNum0 = 0xFE; ++ PageNum1 = 0x07; ++ Period = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } else if (PageNum0 == 0xFF) { ++ PageNum0 = 0xFF; /*stop sounding*/ ++ PageNum1 = 0x0F; ++ } ++ } ++ } ++ ++ u1TxBFParm[0] = PageNum0; ++ u1TxBFParm[1] = PageNum1; ++ u1TxBFParm[2] = Period; ++ FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm); ++ ++ RT_DISP(FBEAM, FBEAM_FUN, ("@%s End, PageNum0 = 0x%x, PageNum1 = 0x%x Period = %d", __func__, PageNum0, PageNum1, Period)); ++} ++#endif ++VOID ++HalTxbf8814A_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte BFerBFeeIdx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; ++ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ u2Byte STAid = 0, CSI_Param = 0; ++ u1Byte Nc_index = 0, Nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BFerIdx=%d, BFeeIdx=%d\n", __func__, BFerIdx, BFeeIdx)); ++ ODM_SetMACReg(pDM_Odm, REG_SND_PTCL_CTRL_8814A, bMaskByte1 | bMaskByte2, 0x0202); ++ ++ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A, 0xDB); ++ ++ /*MAC address/Partial AID of Beamformer*/ ++ if (BFerIdx == 0) { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8814A + i), BeamformerEntry.MacAddr[i]); ++ } else { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8814A + i), BeamformerEntry.MacAddr[i]); ++ } ++ ++ /*CSI report parameters of Beamformer*/ ++ Nc_index = halTxbf8814A_GetNrx(pDM_Odm); /*for 8814A Nrx = 3(4 Ant), min=0(1 Ant)*/ ++ Nr_index = BeamformerEntry.NumofSoundingDim; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care*/ ++ ++ grouping = 0; ++ ++ /*for ac = 1, for n = 3*/ ++ if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) ++ codebookinfo = 1; ++ else if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_HT_EXPLICIT) ++ codebookinfo = 3; ++ ++ coefficientsize = 3; ++ ++ CSI_Param = (u2Byte)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (Nr_index << 3) | (Nc_index)); ++ ++ if (BFerIdx == 0) ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A, CSI_Param); ++ else ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, CSI_Param); ++ /*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A + 3, 0x40); ++ ++ } ++ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ ++ halTxbf8814A_RfMode(pDM_Odm, pBeamformingInfo, BFeeIdx); ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ STAid = BeamformeeEntry.MacId; ++ else ++ STAid = BeamformeeEntry.P_AID; ++ ++ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ ++ if (BFeeIdx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, STAid); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3) | BIT4 | BIT6 | BIT7); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 2, STAid | BIT14 | BIT15 | BIT12); ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BFeeIdx == 0) { ++ /*Get BIT24 & BIT25*/ ++ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3; ++ ++ ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3, tmp | 0x60); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A, STAid | BIT9); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, STAid | 0xE200); /*Set BIT25*/ ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++ } ++ ++} ++ ++ ++VOID ++HalTxbf8814A_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ ++ if (Idx < BEAMFORMER_ENTRY_NUM) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx]; ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx]; ++ } else ++ return; ++ ++ /*Clear P_AID of Beamformee*/ ++ /*Clear MAC address of Beamformer*/ ++ /*Clear Associated Bfmee Sel*/ ++ ++ if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A, 0xD8); ++ if (Idx == 0) { ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8814A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8814A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A, 0); ++ } else { ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8814A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8814A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, 0); ++ } ++ } ++ ++ if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ halTxbf8814A_RfMode(pDM_Odm, pBeamformingInfo, Idx); ++ if (Idx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, 0x0); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3) | BIT4 | BIT6 | BIT7); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A, 0); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 2, 0x0 | BIT14 | BIT15 | BIT12); ++ ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2) & 0x60); ++ } ++ } ++} ++ ++VOID ++HalTxbf8814A_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte BeamCtrlVal, tmpVal; ++ u4Byte BeamCtrlReg; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformEntry; ++ ++ if (Idx < BEAMFORMEE_ENTRY_NUM) ++ BeamformEntry = pBeamformingInfo->BeamformeeEntry[Idx]; ++ else ++ return; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ BeamCtrlVal = BeamformEntry.MacId; ++ else ++ BeamCtrlVal = BeamformEntry.P_AID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, BeamformEntry.BeamformEntryState = %d", __func__, BeamformEntry.BeamformEntryState)); ++ ++ if (Idx == 0) ++ BeamCtrlReg = REG_TXBF_CTRL_8814A; ++ else { ++ BeamCtrlReg = REG_TXBF_CTRL_8814A + 2; ++ BeamCtrlVal |= BIT12 | BIT14 | BIT15; ++ } ++ ++ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) ++ BeamCtrlVal |= BIT9; ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) ++ BeamCtrlVal |= (BIT9 | BIT10); ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80) ++ BeamCtrlVal |= (BIT9 | BIT10 | BIT11); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, Don't apply Vmatrix", __func__)); ++ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); ++ } ++ ++ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); ++ /*disable NDP packet use beamforming */ ++ tmpVal = ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8814A); ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, tmpVal | BIT15); ++ ++} ++ ++ ++ ++ ++ ++VOID ++HalTxbf8814A_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++#if 0 ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ halTxbf8814A_DownloadNDPA(Adapter, Idx); ++ ++ halTxbf8814A_FwTxBFCmd(Adapter); ++#endif ++} ++ ++#endif /* (RTL8814A_SUPPORT == 1)*/ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8814a.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8814a.h +new file mode 100644 +index 0000000..aac2b93 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8814a.h +@@ -0,0 +1,70 @@ ++#ifndef __HAL_TXBF_8814A_H__ ++#define __HAL_TXBF_8814A_H__ ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8814A_SUPPORT == 1) ++VOID ++HalTxbf8814A_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++); ++ ++u1Byte ++halTxbf8814A_GetNtx( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++HalTxbf8814A_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8814A_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8814A_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++VOID ++HalTxbf8814A_ResetTxPath( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8814A_GetTxRate( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++HalTxbf8814A_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++#else ++ ++#define HalTxbf8814A_setNDPArate(pDM_VOID, BW, Rate) ++#define halTxbf8814A_GetNtx(pDM_VOID) 0 ++#define HalTxbf8814A_Enter(pDM_VOID, Idx) ++#define HalTxbf8814A_Leave(pDM_VOID, Idx) ++#define HalTxbf8814A_Status(pDM_VOID, Idx) ++#define HalTxbf8814A_ResetTxPath(pDM_VOID, Idx) ++#define HalTxbf8814A_GetTxRate(pDM_VOID) ++#define HalTxbf8814A_FwTxBF(pDM_VOID, Idx) ++#endif ++ ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8821b.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8821b.c +new file mode 100644 +index 0000000..36ea38a +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8821b.c +@@ -0,0 +1,400 @@ ++/*============================================================*/ ++/*Description:*/ ++/*This file is for 8812/8821/8811 TXBF mechanism*/ ++/*============================================================*/ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8821B_SUPPORT == 1) ++ ++VOID ++halTxbf8821B_RfMode( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamInfo ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->RFType == ODM_1T1R) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] set TxIQGen\n", __func__)); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) { ++ /*Path_A*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ ++ /*Path_B*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ ++ } else { ++ /*Path_A*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ ++ /*Path_B*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ ++ } ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) ++ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x33); ++ else ++ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x11); ++} ++ ++#if 0 ++VOID ++halTxbf8821B_DownloadNDPA( ++ IN PDM_ODM_T pDM_Odm, ++ IN u1Byte Idx ++) ++{ ++ u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page; ++ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; ++ BOOLEAN bSendBeacon = FALSE; ++ u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*default reseved 1 page for the IC type which is undefined.*/ ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter); ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ pHalData->bFwDwRsvdPageInProgress = TRUE; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (Idx == 0) ++ Head_Page = 0xFE; ++ else ++ Head_Page = 0xFE; ++ ++ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy); ++ ++ /*Set REG_CR bit 8. DMA beacon by SW.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8821B + 1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8821B + 1, (u1bTmp | BIT0)); ++ ++ ++ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ ++ tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2); ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2, tmpReg422 & (~BIT6)); ++ ++ if (tmpReg422 & BIT6) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("SetBeamformDownloadNDPA_8812(): There is an Adapter is sending beacon.\n")); ++ bSendBeacon = TRUE; ++ } ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, Head_Page); ++ ++ do { ++ /*Clear beacon valid check bit.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 2, (BcnValidReg | BIT0)); ++ ++ /*download NDPA rsvd page.*/ ++ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); ++ else ++ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); ++ ++ /*check rsvd page download OK.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ count = 0; ++ while (!(BcnValidReg & BIT0) && count < 20) { ++ count++; ++ ODM_delay_ms(10); ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ } ++ DLBcnCount++; ++ } while (!(BcnValidReg & BIT0) && DLBcnCount < 5); ++ ++ if (!(BcnValidReg & BIT0)) ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__)); ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, TxPageBndy); ++ ++ /*To make sure that if there exists an adapter which would like to send beacon.*/ ++ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ ++ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ ++ /*the beacon cannot be sent by HW.*/ ++ /*2010.06.23. Added by tynli.*/ ++ if (bSendBeacon) ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2, tmpReg422); ++ ++ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ ++ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8821B + 1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8821B + 1, (u1bTmp & (~BIT0))); ++ ++ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++ ++ pHalData->bFwDwRsvdPageInProgress = FALSE; ++} ++ ++ ++VOID ++halTxbf8821B_FwTxBFCmd( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u1Byte Idx, Period0 = 0, Period1 = 0; ++ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; ++ u1Byte u1TxBFParm[3] = {0}; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ /*Modified by David*/ ++ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (Idx == 0) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum0 = 0xFE; ++ else ++ PageNum0 = 0xFF; /*stop sounding*/ ++ Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } else if (Idx == 1) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum1 = 0xFE; ++ else ++ PageNum1 = 0xFF; /*stop sounding*/ ++ Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } ++ } ++ } ++ ++ u1TxBFParm[0] = PageNum0; ++ u1TxBFParm[1] = PageNum1; ++ u1TxBFParm[2] = (Period1 << 4) | Period0; ++ FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ++ ("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1)); ++} ++ ++#endif ++VOID ++HalTxbf8821B_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte BFerBFeeIdx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; ++ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); ++ u4Byte CSI_Param; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ u2Byte STAid = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!\n", __func__)); ++ ++ halTxbf8821B_RfMode(pDM_Odm, pBeamformingInfo); ++ ++ if (pDM_Odm->RFType == ODM_2T2R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x00000000); /*Nc =2*/ ++ else ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x01081008); /*Nc =1*/ ++ ++ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B, 0xCB); ++ ++ /*MAC address/Partial AID of Beamformer*/ ++ if (BFerIdx == 0) { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_BFMER0_INFO_8812A + i), BeamformerEntry.MacAddr[i]); ++ /*CSI report use legacy ofdm so don't need to fill P_AID. */ ++ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER0_INFO_8821B+6, BeamformEntry.P_AID); */ ++ } else { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_BFMER1_INFO_8812A + i), BeamformerEntry.MacAddr[i]); ++ /*CSI report use legacy ofdm so don't need to fill P_AID.*/ ++ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER1_INFO_8821B+6, BeamformEntry.P_AID);*/ ++ } ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) { ++ if (pDM_Odm->RFType == ODM_2T2R) ++ CSI_Param = 0x01090109; ++ else ++ CSI_Param = 0x01080108; ++ } else { ++ if (pDM_Odm->RFType == ODM_2T2R) ++ CSI_Param = 0x03090309; ++ else ++ CSI_Param = 0x03080308; ++ } ++ ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, CSI_Param); ++ ++ /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B + 3, 0x50); ++ } ++ ++ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ STAid = BeamformeeEntry.MacId; ++ else ++ STAid = BeamformeeEntry.P_AID; ++ ++ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ ++ if (BFeeIdx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B, STAid); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 3) | BIT4 | BIT6 | BIT7); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2, STAid | BIT12 | BIT14 | BIT15); ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BFeeIdx == 0) { ++ /*Get BIT24 & BIT25*/ ++ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3) & 0x3; ++ ++ ODM_Write1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, STAid | BIT9); ++ } else { ++ /*Set BIT25*/ ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, STAid | 0xE200); ++ } ++ phydm_Beamforming_Notify(pDM_Odm); ++ } ++} ++ ++ ++VOID ++HalTxbf8821B_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ ++ if (Idx < BEAMFORMER_ENTRY_NUM) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx]; ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx]; ++ } else ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!, IDx = %d\n", __func__, Idx)); ++ ++ /*Clear P_AID of Beamformee*/ ++ /*Clear MAC address of Beamformer*/ ++ /*Clear Associated Bfmee Sel*/ ++ ++ if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B, 0xC8); ++ if (Idx == 0) { ++ ODM_Write4Byte(pDM_Odm, REG_BFMER0_INFO_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMER0_INFO_8812A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, 0); ++ } else { ++ ODM_Write4Byte(pDM_Odm, REG_BFMER1_INFO_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMER1_INFO_8812A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, 0); ++ } ++ } ++ ++ if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ halTxbf8821B_RfMode(pDM_Odm, pBeamformingInfo); ++ if (Idx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B, 0x0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, 0); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2, ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2) & 0xF000); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, ODM_Read2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2) & 0x60); ++ } ++ } ++ ++} ++ ++ ++VOID ++HalTxbf8821B_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte BeamCtrlVal; ++ u4Byte BeamCtrlReg; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ BeamCtrlVal = BeamformEntry.MacId; ++ else ++ BeamCtrlVal = BeamformEntry.P_AID; ++ ++ if (Idx == 0) ++ BeamCtrlReg = REG_TXBF_CTRL_8821B; ++ else { ++ BeamCtrlReg = REG_TXBF_CTRL_8821B + 2; ++ BeamCtrlVal |= BIT12 | BIT14 | BIT15; ++ } ++ ++ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) ++ BeamCtrlVal |= BIT9; ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) ++ BeamCtrlVal |= BIT10; ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80) ++ BeamCtrlVal |= BIT11; ++ } else ++ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BeamCtrlVal = 0x%x!\n", __func__, BeamCtrlVal)); ++ ++ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); ++} ++ ++ ++ ++VOID ++HalTxbf8821B_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++#if 0 ++ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ halTxbf8821B_DownloadNDPA(pDM_Odm, Idx); ++ ++ halTxbf8821B_FwTxBFCmd(pDM_Odm); ++#endif ++} ++ ++#endif ++ ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8821b.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8821b.h +new file mode 100644 +index 0000000..3045caf +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8821b.h +@@ -0,0 +1,43 @@ ++#ifndef __HAL_TXBF_8821B_H__ ++#define __HAL_TXBF_8821B_H__ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8821B_SUPPORT == 1) ++VOID ++HalTxbf8821B_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8821B_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8821B_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8821B_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++#else ++#define HalTxbf8821B_Enter(pDM_VOID, Idx) ++#define HalTxbf8821B_Leave(pDM_VOID, Idx) ++#define HalTxbf8821B_Status(pDM_VOID, Idx) ++#define HalTxbf8821B_FwTxBF(pDM_VOID, Idx) ++#endif ++ ++ ++#endif ++ ++#endif // #ifndef __HAL_TXBF_8821B_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8822b.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8822b.c +new file mode 100644 +index 0000000..e0cc389 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8822b.c +@@ -0,0 +1,1099 @@ ++/*============================================================*/ ++/* Description: */ ++/* */ ++/* This file is for 8814A TXBF mechanism */ ++/* */ ++/*============================================================*/ ++ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8822B_SUPPORT == 1) ++ ++#if 0 ++VOID ++HalTxbf8814A_GetBeamformcap( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = GET_BEAMFORM_INFO(Adapter); ++ BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; ++ ++ BeamformCap = phydm_Beamforming_GetBeamCap(pDM_Odm, pBeamformingInfo); ++ ++ if (BeamformCap == pBeamformingInfo->BeamformCap) ++ return; ++ else ++ pBeamformingInfo->BeamformCap = BeamformCap; ++ ++} ++ ++VOID ++HalTxbf8814A_GetTxRate( ++ IN PADAPTER Adapter ++) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ PRT_BEAMFORMEE_ENTRY pEntry; ++ u4Byte TxRptData = 0; ++ u1Byte DataRate = 0xFF; ++ ++ pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]); ++ ++ ReadSdramData_8814A(Adapter, (u1Byte)pEntry->MacId, LOC_8814A_CTRL_INFO, &TxRptData, 1); ++ DataRate = (u1Byte)TxRptData; ++ DataRate &= bMask7bits; /*Bit7 indicates SGI*/ ++ ++ pDM_Odm->TxBfDataRate = DataRate; ++ ++} ++ ++VOID ++HalTxbf8814A_ResetTxPath( ++ IN PADAPTER Adapter, ++ IN u1Byte idx ++) ++{ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = GET_BEAMFORM_INFO(Adapter); ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ u1Byte Nr_index = 0; ++ ++ if (idx < BEAMFORMEE_ENTRY_NUM) ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; ++ else ++ return; ++ ++ if ((pDM_Odm->LastUSBHub) != (RT_GetHubUSBMode(Adapter))) { ++ Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(Adapter), BeamformeeEntry.CompSteeringNumofBFer); ++ ++ if (idx == 0) { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT3|BIT2|BIT1|BIT0, 0x6); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT7|BIT6|BIT5|BIT4, 0x6); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0x0000ff00, 0x10); /*BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0x6); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x10); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x1060); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT3|BIT2|BIT1|BIT0, 0xe); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT7|BIT6|BIT5|BIT4, 0xe); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0x0000ff00, 0x90); /*BCD*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT19|BIT18|BIT17|BIT16, 0xe); /*3ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0xff00000, 0x90); /*bcd*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xe); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x90); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x90e90e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT3|BIT2|BIT1|BIT0, 0xf); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT7|BIT6|BIT5|BIT4, 0xf); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0x0000ff00, 0x93); /*BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT19|BIT18|BIT17|BIT16, 0xf); /*3ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0xff00000, 0x93); /*bcd*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xf); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x93); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); ++ break; ++ } ++ } else { ++ switch (Nr_index) { ++ case 0: ++ break; ++ ++ case 1: /*Nsts = 2 BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT3|BIT2|BIT1|BIT0, 0x6); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT7|BIT6|BIT5|BIT4, 0x6); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0x0000ff00, 0x10); /*BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0x6); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x10); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x1060); ++ break; ++ ++ case 2: /*Nsts = 3 BCD*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT3|BIT2|BIT1|BIT0, 0xe); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT7|BIT6|BIT5|BIT4, 0xe); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0x0000ff00, 0x90); /*BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT19|BIT18|BIT17|BIT16, 0xe); /*3ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0xff00000, 0x90); /*bcd*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xe); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x90); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x90e90e0); ++ break; ++ ++ default: /*Nr>3, same as Case 3*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT3|BIT2|BIT1|BIT0, 0xf); /*1ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT7|BIT6|BIT5|BIT4, 0xf); /*2ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0x0000ff00, 0x93); /*BC*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, BIT19|BIT18|BIT17|BIT16, 0xf); /*3ss*/ ++ PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF1, 0xff00000, 0x93); /*bcd*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0xf); /*set TxPath selection for 8814a BFer bug refine*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x93); /*if Bfer enable, always use 3Tx for all Spatial stream*/ ++ PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0); ++ break; ++ ++ } ++ } ++ ++ pDM_Odm->LastUSBHub = RT_GetHubUSBMode(Adapter); ++ } ++ else ++ return; ++#endif ++} ++#endif ++ ++u1Byte ++halTxbf8822B_GetNtx( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Ntx = 0; ++ ++#if DEV_BUS_TYPE == RT_USB_INTERFACE ++ if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { ++ if (*pDM_Odm->HubUsbMode == 2) {/*USB3.0*/ ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Ntx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Ntx = 2; ++ else ++ Ntx = 1; ++ } else if (*pDM_Odm->HubUsbMode == 1) /*USB 2.0 always 2Tx*/ ++ Ntx = 1; ++ else ++ Ntx = 1; ++ } else ++#endif ++ { ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Ntx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Ntx = 2; ++ else ++ Ntx = 1; ++ } ++ ++ return Ntx; ++ ++} ++ ++u1Byte ++halTxbf8822B_GetNrx( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Nrx = 0; ++ ++ if (pDM_Odm->RFType == ODM_4T4R) ++ Nrx = 3; ++ else if (pDM_Odm->RFType == ODM_3T3R) ++ Nrx = 2; ++ else if (pDM_Odm->RFType == ODM_2T2R) ++ Nrx = 1; ++ else if (pDM_Odm->RFType == ODM_2T3R) ++ Nrx = 2; ++ else if (pDM_Odm->RFType == ODM_2T4R) ++ Nrx = 3; ++ else if (pDM_Odm->RFType == ODM_1T1R) ++ Nrx = 0; ++ else if (pDM_Odm->RFType == ODM_1T2R) ++ Nrx = 1; ++ else ++ Nrx = 0; ++ ++ return Nrx; ++ ++} ++ ++/***************SU & MU BFee Entry********************/ ++VOID ++halTxbf8822B_RfMode( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamformingInfo, ++ IN u1Byte idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i, Nr_index = 0; ++ BOOLEAN bSelfBeamformer = FALSE; ++ BOOLEAN bSelfBeamformee = FALSE; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ ++ if (idx < BEAMFORMEE_ENTRY_NUM) ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx]; ++ else ++ return; ++ ++ if (pDM_Odm->RFType == ODM_1T1R) ++ return; ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_B; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x1); ++ /*RF Mode table write enable*/ ++ } ++ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) || (pBeamformingInfo->beamformee_mu_cnt > 0)) { ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_B; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableAddr, 0xfffff, 0x18000); ++ /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData0, 0xfffff, 0xBE77F); ++ /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData1, 0xfffff, 0x226BF); ++ /*Enable TXIQGEN in RX mode*/ ++ } ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); ++ /*Enable TXIQGEN in RX mode*/ ++ } ++ ++ for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_B; i++) { ++ ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x0); ++ /*RF Mode table write disable*/ ++ } ++ ++ if (pBeamformingInfo->beamformee_su_cnt > 0) { ++ ++ /*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, BIT28|BIT29, 0x2); /*enable BB TxBF ant mapping register*/ ++ ++ if (idx == 0) { ++ /*Nsts = 2 AB*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, 0xffff, 0x0433); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x043); ++ /*ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x430);*/ ++ ++ } else {/*IDX =1*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, 0xffff, 0x0433); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x043); ++ /*ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x430;*/ ++ } ++ } else { ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x1); /*1SS by path-A*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x430); /*2SS by path-A,B*/ ++ } ++ ++ if (pBeamformingInfo->beamformee_mu_cnt > 0) { ++ /*MU STAs share the common setting*/ ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, BIT31, 1); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, 0xffff, 0x0433); ++ ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, 0xfff00000, 0x043); ++ } ++ ++} ++#if 0 ++VOID ++halTxbf8822B_DownloadNDPA( ++ IN PADAPTER Adapter, ++ IN u1Byte Idx ++ ) ++{ ++ u1Byte u1bTmp = 0, tmpReg422 = 0; ++ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; ++ u2Byte Head_Page = 0x7FE; ++ BOOLEAN bSendBeacon = FALSE; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u2Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/ ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry+Idx; ++ ++ pHalData->bFwDwRsvdPageInProgress = TRUE; ++ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu2Byte)&TxPageBndy); ++ ++ /*Set REG_CR bit 8. DMA beacon by SW.*/ ++ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A+1); ++ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A+1, (u1bTmp|BIT0)); ++ ++ ++ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ ++ tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A+2); ++ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A+2, tmpReg422&(~BIT6)); ++ ++ if (tmpReg422 & BIT6) { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("SetBeamformDownloadNDPA_8814A(): There is an Adapter is sending beacon.\n")); ++ bSendBeacon = TRUE; ++ } ++ ++ /*0x204[11:0] Beacon Head for TXDMA*/ ++ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, Head_Page); ++ ++ do { ++ /*Clear beacon valid check bit.*/ ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A+1); ++ PlatformEFIOWrite1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A+1, (BcnValidReg|BIT7)); ++ ++ /*download NDPA rsvd page.*/ ++ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); ++ else ++ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); ++ ++ /*check rsvd page download OK.*/ ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); ++ count = 0; ++ while (!(BcnValidReg & BIT7) && count < 20) { ++ count++; ++ delay_us(10); ++ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A+2); ++ } ++ DLBcnCount++; ++ } while (!(BcnValidReg & BIT7) && DLBcnCount < 5); ++ ++ if (!(BcnValidReg & BIT0)) ++ RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__)); ++ ++ /*0x204[11:0] Beacon Head for TXDMA*/ ++ PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, TxPageBndy); ++ ++ /*To make sure that if there exists an adapter which would like to send beacon.*/ ++ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ ++ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ ++ /*the beacon cannot be sent by HW.*/ ++ /*2010.06.23. Added by tynli.*/ ++ if (bSendBeacon) ++ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A+2, tmpReg422); ++ ++ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ ++ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ ++ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A+1); ++ PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A+1, (u1bTmp&(~BIT0))); ++ ++ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++ ++ pHalData->bFwDwRsvdPageInProgress = FALSE; ++} ++ ++VOID ++halTxbf8822B_FwTxBFCmd( ++ IN PADAPTER Adapter ++ ) ++{ ++ u1Byte Idx, Period = 0; ++ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; ++ u1Byte u1TxBFParm[3] = {0}; ++ ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) { ++ PageNum0 = 0xFE; ++ PageNum1 = 0x07; ++ Period = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } else if (PageNum0 == 0xFF) { ++ PageNum0 = 0xFF; /*stop sounding*/ ++ PageNum1 = 0x0F; ++ } ++ } ++ } ++ ++ u1TxBFParm[0] = PageNum0; ++ u1TxBFParm[1] = PageNum1; ++ u1TxBFParm[2] = Period; ++ FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm); ++ ++ RT_DISP(FBEAM, FBEAM_FUN, ("@%s End, PageNum0 = 0x%x, PageNum1 = 0x%x Period = %d", __func__, PageNum0, PageNum1, Period)); ++} ++#endif ++ ++VOID ++HalTxbf8822B_Init( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte u1bTmp; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ ++ ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT16, 1); /*Enable P1 aggr new packet according to P0 transfer time*/ ++ ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT15|BIT14|BIT13|BIT12, 1); /*MU Retry Limit*/ ++ ODM_SetBBReg(pDM_Odm, 0x14c0 , BIT7, 0); /*Disable Tx MU-MIMO until sounding done*/ ++ ODM_SetBBReg(pDM_Odm, 0x14c0 , 0x3F, 0); /* Clear validity of MU STAs */ ++ ODM_Write1Byte(pDM_Odm, 0x167c , 0x70); /*MU-MIMO Option as default value*/ ++ ODM_Write2Byte(pDM_Odm, 0x1680 , 0); /*MU-MIMO Control as default value*/ ++ ++ /* Set MU NDPA rate & BW source */ ++ /* 0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, 0x42C); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B, (u1bTmp|BIT6)); ++ /* 0x45F[7:0] = 0x10 (Rate=OFDM_6M, BW20) */ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8822B, 0x10); ++ ++ /* Init HW variable */ ++ pBeamformingInfo->RegMUTxCtrl = ODM_Read4Byte(pDM_Odm, 0x14c0); ++} ++ ++VOID ++HalTxbf8822B_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte BFerBFeeIdx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0)>>4; ++ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); ++ u2Byte CSI_Param = 0; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamformeeEntry; ++ PRT_BEAMFORMER_ENTRY pBeamformerEntry; ++ u2Byte value16, STAid = 0; ++ u1Byte Nc_index = 0, Nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; ++ u4Byte gid_valid, user_position_l, user_position_h; ++ u4Byte mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; ++ u1Byte u1bTmp; ++ u4Byte u4bTmp; ++ ++ RT_DISP(FBEAM, FBEAM_FUN, ("%s: BFerBFeeIdx=%d, BFerIdx=%d, BFeeIdx=%d\n", __func__, BFerBFeeIdx, BFerIdx, BFeeIdx)); ++ ++ /*************SU BFer Entry Init*************/ ++ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ pBeamformerEntry->is_mu_ap = FALSE; ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xDB); ++ ++ ++ for (i = 0; i < MAX_BEAMFORMER_SU; i++) { ++ if ((pBeamformingInfo->beamformer_su_reg_maping & BIT(i)) == 0) { ++ pBeamformingInfo->beamformer_su_reg_maping |= BIT(i); ++ pBeamformerEntry->su_reg_index = i; ++ break; ++ } ++ } ++ ++ /*MAC address/Partial AID of Beamformer*/ ++ if (pBeamformerEntry->su_reg_index == 0) { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8822B+i), pBeamformerEntry->MacAddr[i]); ++ } else { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8822B+i), pBeamformerEntry->MacAddr[i]); ++ } ++ ++ /*CSI report parameters of Beamformer*/ ++ Nc_index = halTxbf8822B_GetNrx(pDM_Odm); /*for 8814A Nrx = 3(4 Ant), min=0(1 Ant)*/ ++ Nr_index = pBeamformerEntry->NumofSoundingDim; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care*/ ++ ++ grouping = 0; ++ ++ /*for ac = 1, for n = 3*/ ++ if (pBeamformerEntry->BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) ++ codebookinfo = 1; ++ else if (pBeamformerEntry->BeamformEntryCap & BEAMFORMEE_CAP_HT_EXPLICIT) ++ codebookinfo = 3; ++ ++ coefficientsize = 3; ++ ++ CSI_Param = (u2Byte)((coefficientsize<<10)|(codebookinfo<<8)|(grouping<<6)|(Nr_index<<3)|(Nc_index)); ++ ++ if (BFerIdx == 0) ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B, CSI_Param); ++ else ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B+2, CSI_Param); ++ /*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A+3, 0x70); ++ ++ } ++ ++ /*************SU BFee Entry Init*************/ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ pBeamformeeEntry = &pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ pBeamformeeEntry->is_mu_sta = FALSE; ++ halTxbf8822B_RfMode(pDM_Odm, pBeamformingInfo, BFeeIdx); ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ STAid = pBeamformeeEntry->MacId; ++ else ++ STAid = pBeamformeeEntry->P_AID; ++ ++ for (i = 0; i < MAX_BEAMFORMEE_SU; i++) { ++ if ((pBeamformingInfo->beamformee_su_reg_maping & BIT(i)) == 0) { ++ pBeamformingInfo->beamformee_su_reg_maping |= BIT(i); ++ pBeamformeeEntry->su_reg_index = i; ++ break; ++ } ++ } ++ ++ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ ++ if (pBeamformeeEntry->su_reg_index == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B, STAid); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3)|BIT4|BIT6|BIT7); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B+2, STAid | BIT14 | BIT15 | BIT12); ++ } ++ ++ /*CSI report parameters of Beamformee*/ ++ if (pBeamformeeEntry->su_reg_index == 0) { ++ /*Get BIT24 & BIT25*/ ++ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+3) & 0x3; ++ ++ ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3, tmp | 0x60); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B, STAid | BIT9); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+2, STAid | 0xE200); /*Set BIT25*/ ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++ } ++ ++ /*************MU BFer Entry Init*************/ ++ if ((pBeamformingInfo->beamformer_mu_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ pBeamformingInfo->mu_ap_index = BFerIdx; ++ pBeamformerEntry->is_mu_ap = TRUE; ++ for (i = 0; i < 8; i++) ++ pBeamformerEntry->gid_valid[i] = 0; ++ for (i = 0; i < 16; i++) ++ pBeamformerEntry->user_position[i] = 0; ++ ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xDB); ++ ++ /* MAC address */ ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8822B+i), pBeamformerEntry->MacAddr[i]); ++ ++ /* Set partial AID */ ++ ODM_Write2Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8822B+6), pBeamformerEntry->P_AID); ++ ++ /* Fill our AID to 0x1680[11:0] and [13:12] = 2b'00, BF report segment select to 3895 bytes*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, 0x1680); ++ u1bTmp = (pBeamformerEntry->AID)&0xFFF; ++ ODM_Write1Byte(pDM_Odm, 0x1680, u1bTmp); ++ ++ /* Set 80us for leaving ndp_rx_standby_state */ ++ ODM_Write1Byte(pDM_Odm, 0x71B, 0x50); ++ ++ /* Set 0x6A0[14] = 1 to accept action_no_ack */ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1); ++ u1bTmp |= 0x40; ++ ODM_Write1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1, u1bTmp); ++ /* Set 0x6A2[5:4] = 1 to NDPA and BF report poll */ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_RXFLTMAP1_8822B); ++ u1bTmp |= 0x30; ++ ODM_Write1Byte(pDM_Odm, REG_RXFLTMAP1_8822B, u1bTmp); ++ ++ /*CSI report parameters of Beamformer*/ ++ Nc_index = halTxbf8822B_GetNrx(pDM_Odm); /* Depend on RF type */ ++ Nr_index = 1; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care*/ ++ grouping = 0; /*no grouping*/ ++ codebookinfo = 1; /*7 bit for psi, 9 bit for phi*/ ++ coefficientsize = 0; /*This is nothing really matter*/ ++ CSI_Param = (u2Byte)((coefficientsize<<10)|(codebookinfo<<8)|(grouping<<6)|(Nr_index<<3)|(Nc_index)); ++ ODM_Write2Byte(pDM_Odm, 0x6F4, CSI_Param); ++ ++ } ++ ++ /*************MU BFee Entry Init*************/ ++ if ((pBeamformingInfo->beamformee_mu_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ pBeamformeeEntry = &pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ pBeamformeeEntry->is_mu_sta = TRUE; ++ for (i = 0; i < MAX_BEAMFORMEE_MU; i++) { ++ if ((pBeamformingInfo->beamformee_mu_reg_maping & BIT(i)) == 0) { ++ pBeamformingInfo->beamformee_mu_reg_maping |= BIT(i); ++ pBeamformeeEntry->mu_reg_index = i; ++ break; ++ } ++ } ++ ++ if (pBeamformeeEntry->mu_reg_index == 0xFF) { ++ /* There is no valid bit in beamformee_mu_reg_maping */ ++ RT_DISP(FBEAM, FBEAM_FUN, ("%s: ERROR! There is no valid bit in beamformee_mu_reg_maping!\n", __func__)); ++ return; ++ } ++ ++ /*User position table*/ ++ switch (pBeamformeeEntry->mu_reg_index) { ++ case 0: ++ gid_valid = 0x7fe; ++ user_position_l = 0x111110; ++ user_position_h = 0x0; ++ break; ++ case 1: ++ gid_valid = 0x7f806; ++ user_position_l = 0x11000004; ++ user_position_h = 0x11; ++ break; ++ case 2: ++ gid_valid = 0x1f81818; ++ user_position_l = 0x400040; ++ user_position_h = 0x11100; ++ break; ++ case 3: ++ gid_valid = 0x1e186060; ++ user_position_l = 0x4000400; ++ user_position_h = 0x1100040; ++ break; ++ case 4: ++ gid_valid = 0x66618180; ++ user_position_l = 0x40004000; ++ user_position_h = 0x10040400; ++ break; ++ case 5: ++ gid_valid = 0x79860600; ++ user_position_l = 0x40000; ++ user_position_h = 0x4404004; ++ break; ++ } ++ ++ for (i = 0; i < 8; i++) { ++ if (i < 4) { ++ pBeamformeeEntry->gid_valid[i] = (u1Byte)(gid_valid & 0xFF); ++ gid_valid = (gid_valid >> 8); ++ } else ++ pBeamformeeEntry->gid_valid[i] = 0; ++ } ++ for (i = 0; i < 16; i++) { ++ if (i < 4) { ++ pBeamformeeEntry->user_position[i] = (u1Byte)(user_position_l & 0xFF); ++ user_position_l = user_position_l >> 8; ++ } else if (i < 8) { ++ pBeamformeeEntry->user_position[i] = (u1Byte)(user_position_h & 0xFF); ++ user_position_h = user_position_h >> 8; ++ } else ++ pBeamformeeEntry->user_position[i] = 0; ++ } ++ ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xDB); ++ ++ /*select MU STA table*/ ++ pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); ++ pBeamformingInfo->RegMUTxCtrl |= (pBeamformeeEntry->mu_reg_index << 8)&(BIT8|BIT9|BIT10); ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ++ ODM_SetBBReg(pDM_Odm, 0x14c4 , bMaskDWord, 0); /*Reset gid_valid table*/ ++ ODM_SetBBReg(pDM_Odm, 0x14c8 , bMaskDWord, user_position_l); ++ ODM_SetBBReg(pDM_Odm, 0x14cc , bMaskDWord, user_position_h); ++ ++ /*set validity of MU STAs*/ ++ pBeamformingInfo->RegMUTxCtrl &= 0xFFFFFFC0; ++ pBeamformingInfo->RegMUTxCtrl |= pBeamformingInfo->beamformee_mu_reg_maping&0x3F; ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ++ value16 = ODM_Read2Byte(pDM_Odm, mu_reg[pBeamformeeEntry->mu_reg_index]); ++ value16 &= 0xFE00; /*Clear PAID*/ ++ value16 |= BIT9; /*Enable MU BFee*/ ++ value16 |= pBeamformeeEntry->P_AID; ++ ODM_Write2Byte(pDM_Odm, mu_reg[pBeamformeeEntry->mu_reg_index] , value16); ++ ++ /* 0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3); ++ u1bTmp |= 0xD0; /* Set bit 28, 30, 31 to 3b'111*/ ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3, u1bTmp); ++ /* Set NDPA to 6M*/ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_RATE_8822B, 0x4); /* 6M */ ++ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8822B); ++ u1bTmp &= 0xFC; /* Clear bit 0, 1*/ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8822B, u1bTmp); ++ ++ u4bTmp = ODM_Read4Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B); ++ u4bTmp = ((u4bTmp & 0xFF0000FF) | 0x020200); /* Set [23:8] to 0x0202 */ ++ ODM_Write4Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, u4bTmp); ++ ++ /* Set 0x6A0[14] = 1 to accept action_no_ack */ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1); ++ u1bTmp |= 0x40; ++ ODM_Write1Byte(pDM_Odm, REG_RXFLTMAP0_8822B+1, u1bTmp); ++ /* End of MAC registers setting */ ++ ++ halTxbf8822B_RfMode(pDM_Odm, pBeamformingInfo, BFeeIdx); ++#if (SUPPORT_MU_BF == 1) ++ /*Special for plugfest*/ ++ delay_ms(50); /* wait for 4-way handshake ending*/ ++ SendSWVHTGIDMgntFrame(pDM_Odm, pBeamformeeEntry->MacAddr, BFeeIdx); ++#endif ++ ++ phydm_Beamforming_Notify(pDM_Odm); ++ ++ } ++ ++} ++ ++ ++VOID ++HalTxbf8822B_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMER_ENTRY pBeamformerEntry; ++ PRT_BEAMFORMEE_ENTRY pBeamformeeEntry; ++ u4Byte mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; ++ ++ if (Idx < BEAMFORMER_ENTRY_NUM) { ++ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[Idx]; ++ pBeamformeeEntry = &pBeamformingInfo->BeamformeeEntry[Idx]; ++ } else ++ return; ++ ++ /*Clear P_AID of Beamformee*/ ++ /*Clear MAC address of Beamformer*/ ++ /*Clear Associated Bfmee Sel*/ ++ ++ if (pBeamformerEntry->BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8822B, 0xD8); ++ if (pBeamformerEntry->is_mu_ap == 0) { /*SU BFer */ ++ if (pBeamformerEntry->su_reg_index == 0) { ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8822B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8822B+4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B, 0); ++ } else { ++ ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8822B, 0); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8822B+4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8822B+2, 0); ++ } ++ pBeamformingInfo->beamformer_su_reg_maping &= ~(BIT(pBeamformerEntry->su_reg_index)); ++ pBeamformerEntry->su_reg_index = 0xFF; ++ } else { /*MU BFer */ ++ /*set validity of MU STA0 and MU STA1*/ ++ pBeamformingInfo->RegMUTxCtrl &= 0xFFFFFFC0; ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ++ ODM_Memory_Set(pDM_Odm, pBeamformerEntry->gid_valid, 0, 8); ++ ODM_Memory_Set(pDM_Odm, pBeamformerEntry->user_position, 0, 16); ++ pBeamformerEntry->is_mu_ap = FALSE; ++ } ++ } ++ ++ if (pBeamformeeEntry->BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ halTxbf8822B_RfMode(pDM_Odm, pBeamformingInfo, Idx); ++ if (pBeamformeeEntry->is_mu_sta == 0) { /*SU BFee*/ ++ if (pBeamformeeEntry->su_reg_index == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B, 0x0); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8822B+3)|BIT4|BIT6|BIT7); ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B, 0); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B+2, 0x0 | BIT14 | BIT15 | BIT12); ++ ++ ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+2, ++ ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B+2) & 0x60); ++ } ++ pBeamformingInfo->beamformee_su_reg_maping &= ~(BIT(pBeamformeeEntry->su_reg_index)); ++ pBeamformeeEntry->su_reg_index = 0xFF; ++ } else { /*MU BFee */ ++ /*Disable sending NDPA & BF-rpt-poll to this BFee*/ ++ ODM_Write2Byte(pDM_Odm, mu_reg[pBeamformeeEntry->mu_reg_index] , 0); ++ /*set validity of MU STA*/ ++ pBeamformingInfo->RegMUTxCtrl &= ~(BIT(pBeamformeeEntry->mu_reg_index)); ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ++ ++ pBeamformeeEntry->is_mu_sta = FALSE; ++ pBeamformingInfo->beamformee_mu_reg_maping &= ~(BIT(pBeamformeeEntry->mu_reg_index)); ++ pBeamformeeEntry->mu_reg_index = 0xFF; ++ } ++ } ++} ++ ++ ++/***********SU & MU BFee Entry Only when souding done****************/ ++VOID ++HalTxbf8822B_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte BeamCtrlVal, tmpVal; ++ u4Byte BeamCtrlReg; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry; ++ BOOLEAN is_mu_sounding = pBeamformingInfo->is_mu_sounding, is_bitmap_ready = FALSE; ++ u16 bitmap; ++ u8 idx, gid, i; ++ u8 id1, id0; ++ u32 gid_valid[6] = {0}; ++ u32 user_position_lsb[6] = {0}; ++ u32 user_position_msb[6] = {0}; ++ u32 value32; ++ ++ if (Idx < BEAMFORMEE_ENTRY_NUM) ++ pBeamformEntry = &pBeamformingInfo->BeamformeeEntry[Idx]; ++ else ++ return; ++ ++ /*SU sounding done */ ++ if (is_mu_sounding == FALSE) { ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ BeamCtrlVal = pBeamformEntry->MacId; ++ else ++ BeamCtrlVal = pBeamformEntry->P_AID; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, BeamformEntry.BeamformEntryState = %d", __func__, pBeamformEntry->BeamformEntryState)); ++ ++ if (pBeamformEntry->su_reg_index == 0) { ++ BeamCtrlReg = REG_TXBF_CTRL_8822B; ++ } else { ++ BeamCtrlReg = REG_TXBF_CTRL_8822B+2; ++ BeamCtrlVal |= BIT12|BIT14|BIT15; ++ } ++ ++ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (pBeamformEntry->SoundBW == CHANNEL_WIDTH_20) ++ BeamCtrlVal |= BIT9; ++ else if (pBeamformEntry->SoundBW == CHANNEL_WIDTH_40) ++ BeamCtrlVal |= (BIT9|BIT10); ++ else if (pBeamformEntry->SoundBW == CHANNEL_WIDTH_80) ++ BeamCtrlVal |= (BIT9|BIT10|BIT11); ++ } else { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, Don't apply Vmatrix", __func__)); ++ BeamCtrlVal &= ~(BIT9|BIT10|BIT11); ++ } ++ ++ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); ++ /*disable NDP packet use beamforming */ ++ tmpVal = ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8822B); ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8822B, tmpVal|BIT15); ++ } else { ++ /*MU sounding done */ ++ if (pBeamformEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ /*value32 = ODM_GetBBReg(pDM_Odm, 0xF4C, 0xFFFF0000);*/ ++ value32 = 1; ++ ++ is_bitmap_ready = (BOOLEAN)((value32 & BIT15) >> 15); ++ bitmap = (u16)(value32 & 0x3FFF); ++ ++ for (idx = 0; idx < 15; idx++) { ++ if (idx < 5) {/*bit0~4*/ ++ id0 = 0; ++ id1 = (u8)(idx + 1); ++ } else if (idx < 9) { /*bit5~8*/ ++ id0 = 1; ++ id1 = (u8)(idx - 3); ++ } else if (idx < 12) { /*bit9~11*/ ++ id0 = 2; ++ id1 = (u8)(idx - 6); ++ } else if (idx < 14) { /*bit12~13*/ ++ id0 = 3; ++ id1 = (u8)(idx - 8); ++ } else { /*bit14*/ ++ id0 = 4; ++ id1 = (u8)(idx - 9); ++ } ++ if (bitmap & BIT(idx)) { ++ /*Pair 1*/ ++ gid = (idx << 1) + 1; ++ gid_valid[id0] |= (BIT(gid)); ++ gid_valid[id1] |= (BIT(gid)); ++ /*Pair 2*/ ++ gid += 1; ++ gid_valid[id0] |= (BIT(gid)); ++ gid_valid[id1] |= (BIT(gid)); ++ } else { ++ /*Pair 1*/ ++ gid = (idx << 1) + 1; ++ gid_valid[id0] &= ~(BIT(gid)); ++ gid_valid[id1] &= ~(BIT(gid)); ++ /*Pair 2*/ ++ gid += 1; ++ gid_valid[id0] &= ~(BIT(gid)); ++ gid_valid[id1] &= ~(BIT(gid)); ++ } ++ } ++ ++ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { ++ pBeamformEntry = &pBeamformingInfo->BeamformeeEntry[i]; ++ if ((pBeamformEntry->is_mu_sta) && (pBeamformEntry->mu_reg_index < 6)) { ++ value32 = gid_valid[pBeamformEntry->mu_reg_index]; ++ for (idx = 0; idx < 4; idx++) { ++ pBeamformEntry->gid_valid[idx] = (u8)(value32 & 0xFF); ++ value32 = (value32 >> 8); ++ } ++ } ++ } ++ ++ for (idx = 0; idx < 6; idx++) { ++ pBeamformingInfo->RegMUTxCtrl |= ~(BIT8|BIT9|BIT10); ++ pBeamformingInfo->RegMUTxCtrl |= ((idx<<8)&(BIT8|BIT9|BIT10)); ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ODM_SetMACReg(pDM_Odm, 0x14C4, bMaskDWord, gid_valid[idx]); /*set MU STA gid valid table*/ ++ } ++ ++ /*Enable TxMU PPDU*/ ++ pBeamformingInfo->RegMUTxCtrl |= BIT7; ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ } ++ } ++} ++ ++/*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/ ++VOID ++HalTxbf8822B_ConfigGtab( ++ IN PVOID pDM_VOID ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMER_ENTRY pBeamformerEntry = NULL; ++ u4Byte gid_valid = 0, user_position_l = 0, user_position_h = 0, i; ++ ++ if (pBeamformingInfo->mu_ap_index < BEAMFORMER_ENTRY_NUM) ++ pBeamformerEntry = &pBeamformingInfo->BeamformerEntry[pBeamformingInfo->mu_ap_index]; ++ else ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s==>\n", __func__)); ++ ++ /*For GID 0~31*/ ++ for (i = 0; i < 4; i++) ++ gid_valid |= (pBeamformerEntry->gid_valid[i] << (i<<3)); ++ for (i = 0; i < 8; i++) { ++ if (i < 4) ++ user_position_l |= (pBeamformerEntry->user_position[i] << (i << 3)); ++ else ++ user_position_h |= (pBeamformerEntry->user_position[i] << ((i - 4)<<3)); ++ } ++ /*select MU STA0 table*/ ++ pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ODM_SetBBReg(pDM_Odm, 0x14c4, bMaskDWord, gid_valid); ++ ODM_SetBBReg(pDM_Odm, 0x14c8, bMaskDWord, user_position_l); ++ ODM_SetBBReg(pDM_Odm, 0x14cc, bMaskDWord, user_position_h); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: STA0: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", ++ __func__, gid_valid, user_position_l, user_position_h)); ++ ++ gid_valid = 0; ++ user_position_l = 0; ++ user_position_h = 0; ++ ++ /*For GID 32~64*/ ++ for (i = 4; i < 8; i++) ++ gid_valid |= (pBeamformerEntry->gid_valid[i] << ((i - 4)<<3)); ++ for (i = 8; i < 16; i++) { ++ if (i < 4) ++ user_position_l |= (pBeamformerEntry->user_position[i] << ((i - 8) << 3)); ++ else ++ user_position_h |= (pBeamformerEntry->user_position[i] << ((i - 12) << 3)); ++ } ++ /*select MU STA1 table*/ ++ pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); ++ pBeamformingInfo->RegMUTxCtrl |= BIT8; ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ODM_SetBBReg(pDM_Odm, 0x14c4, bMaskDWord, gid_valid); ++ ODM_SetBBReg(pDM_Odm, 0x14c8, bMaskDWord, user_position_l); ++ ODM_SetBBReg(pDM_Odm, 0x14cc, bMaskDWord, user_position_h); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: STA1: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", ++ __func__, gid_valid, user_position_l, user_position_h)); ++ ++ /* Set validity of MU STA0 and MU STA1*/ ++ pBeamformingInfo->RegMUTxCtrl &= 0xFFFFFFC0; ++ pBeamformingInfo->RegMUTxCtrl |= 0x3; /* STA0, STA1*/ ++ ODM_Write4Byte(pDM_Odm, 0x14c0, pBeamformingInfo->RegMUTxCtrl); ++ ++} ++ ++ ++ ++#if 0 ++/*This function translate the bitmap to GTAB*/ ++VOID ++haltxbf8822b_gtab_translation( ++ IN PDM_ODM_T pDM_Odm ++) ++{ ++ u8 idx, gid; ++ u8 id1, id0; ++ u32 gid_valid[6] = {0}; ++ u32 user_position_lsb[6] = {0}; ++ u32 user_position_msb[6] = {0}; ++ ++ for (idx = 0; idx < 15; idx++) { ++ if (idx < 5) {/*bit0~4*/ ++ id0 = 0; ++ id1 = (u8)(idx + 1); ++ } else if (idx < 9) { /*bit5~8*/ ++ id0 = 1; ++ id1 = (u8)(idx - 3); ++ } else if (idx < 12) { /*bit9~11*/ ++ id0 = 2; ++ id1 = (u8)(idx - 6); ++ } else if (idx < 14) { /*bit12~13*/ ++ id0 = 3; ++ id1 = (u8)(idx - 8); ++ } else { /*bit14*/ ++ id0 = 4; ++ id1 = (u8)(idx - 9); ++ } ++ ++ /*Pair 1*/ ++ gid = (idx << 1) + 1; ++ gid_valid[id0] |= (1 << gid); ++ gid_valid[id1] |= (1 << gid); ++ if (gid < 16) { ++ /*user_position_lsb[id0] |= (0 << (gid << 1));*/ ++ user_position_lsb[id1] |= (1 << (gid << 1)); ++ } else { ++ /*user_position_msb[id0] |= (0 << ((gid - 16) << 1));*/ ++ user_position_msb[id1] |= (1 << ((gid - 16) << 1)); ++ } ++ ++ /*Pair 2*/ ++ gid += 1; ++ gid_valid[id0] |= (1 << gid); ++ gid_valid[id1] |= (1 << gid); ++ if (gid < 16) { ++ user_position_lsb[id0] |= (1 << (gid << 1)); ++ /*user_position_lsb[id1] |= (0 << (gid << 1));*/ ++ } else { ++ user_position_msb[id0] |= (1 << ((gid - 16) << 1)); ++ /*user_position_msb[id1] |= (0 << ((gid - 16) << 1));*/ ++ } ++ ++ } ++ ++ ++ for (idx = 0; idx < 6; idx++) { ++ /*DbgPrint("gid_valid[%d] = 0x%x\n", idx, gid_valid[idx]); ++ DbgPrint("user_position[%d] = 0x%x %x\n", idx, user_position_msb[idx], user_position_lsb[idx]);*/ ++ } ++} ++#endif ++ ++VOID ++HalTxbf8822B_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ) ++{ ++#if 0 ++ PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry+Idx; ++ ++ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ halTxbf8822B_DownloadNDPA(Adapter, Idx); ++ ++ halTxbf8822B_FwTxBFCmd(Adapter); ++#endif ++} ++ ++#else /* (RTL8822B_SUPPORT == 1)*/ ++ ++#endif /* (RTL8822B_SUPPORT == 1)*/ ++ ++#endif /*(BEAMFORMING_SUPPORT == 1)*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8822b.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8822b.h +new file mode 100644 +index 0000000..d9bc960 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbf8822b.h +@@ -0,0 +1,53 @@ ++#ifndef __HAL_TXBF_8822B_H__ ++#define __HAL_TXBF_8822B_H__ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (RTL8822B_SUPPORT == 1) ++ ++VOID ++HalTxbf8822B_Init( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++HalTxbf8822B_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8822B_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbf8822B_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++VOID ++HalTxbf8822B_ConfigGtab( ++ IN PVOID pDM_VOID ++ ); ++ ++VOID ++HalTxbf8822B_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++#else ++#define HalTxbf8822B_Init(pDM_VOID) ++#define HalTxbf8822B_Enter(pDM_VOID, Idx) ++#define HalTxbf8822B_Leave(pDM_VOID, Idx) ++#define HalTxbf8822B_Status(pDM_VOID, Idx) ++#define HalTxbf8822B_FwTxBF(pDM_VOID, Idx) ++#define HalTxbf8822B_ConfigGtab(pDM_VOID) ++#endif ++ ++ ++#endif ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfinterface.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfinterface.c +new file mode 100644 +index 0000000..e7d79f0 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfinterface.c +@@ -0,0 +1,1384 @@ ++//============================================================ ++// Description: ++// ++// This file is for TXBF interface mechanism ++// ++//============================================================ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++Beamforming_GidPAid( ++ PADAPTER Adapter, ++ PRT_TCB pTcb ++) ++{ ++ u1Byte Idx = 0; ++ u1Byte RA[6] ={0}; ++ pu1Byte pHeader = GET_FRAME_OF_FIRST_FRAG(Adapter, pTcb); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ ++ if (Adapter->HardwareType < HARDWARE_TYPE_RTL8192EE) ++ return; ++ else if (IS_WIRELESS_MODE_N(Adapter) == FALSE) ++ return; ++ ++#if (SUPPORT_MU_BF == 1) ++ if (pTcb->TxBFPktType == RT_BF_PKT_TYPE_BROADCAST_NDPA) { /* MU NDPA */ ++#else ++ if (0) { ++#endif ++ /* Fill G_ID and P_AID */ ++ pTcb->G_ID = 63; ++ if (pBeamInfo->FirstMUBFeeIndex < BEAMFORMEE_ENTRY_NUM) { ++ pTcb->P_AID = pBeamInfo->BeamformeeEntry[pBeamInfo->FirstMUBFeeIndex].P_AID; ++ RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, pTcb->G_ID, pTcb->P_AID)); ++ } ++ } else { ++ GET_80211_HDR_ADDRESS1(pHeader, &RA); ++ ++ // VHT SU PPDU carrying one or more group addressed MPDUs or ++ // Transmitting a VHT NDP intended for multiple recipients ++ if (MacAddr_isBcst(RA) || MacAddr_isMulticast(RA) || pTcb->macId == MAC_ID_STATIC_FOR_BROADCAST_MULTICAST) { ++ pTcb->G_ID = 63; ++ pTcb->P_AID = 0; ++ } else if (ACTING_AS_AP(Adapter)) { ++ u2Byte AID = (u2Byte) (MacIdGetOwnerAssociatedClientAID(Adapter, pTcb->macId) & 0x1ff); /*AID[0:8]*/ ++ ++ /*RT_DISP(FBEAM, FBEAM_FUN, ("@%s pTcb->macId=0x%X, AID=0x%X\n", __func__, pTcb->macId, AID));*/ ++ pTcb->G_ID = 63; ++ ++ if (AID == 0) /*A PPDU sent by an AP to a non associated STA*/ ++ pTcb->P_AID = 0; ++ else { /*Sent by an AP and addressed to a STA associated with that AP*/ ++ u2Byte BSSID = 0; ++ GET_80211_HDR_ADDRESS2(pHeader, &RA); ++ BSSID = ((RA[5] & 0xf0) >> 4) ^ (RA[5] & 0xf); /*BSSID[44:47] xor BSSID[40:43]*/ ++ pTcb->P_AID = (AID + BSSID *32) & 0x1ff; /*(dec(A) + dec(B)*32) mod 512*/ ++ } ++ } else if (ACTING_AS_IBSS(Adapter)) { ++ pTcb->G_ID = 63; ++ /*P_AID for infrasturcture mode; MACID for ad-hoc mode. */ ++ pTcb->P_AID = pTcb->macId; ++ } else if (MgntLinkStatusQuery(Adapter)) { /*Addressed to AP*/ ++ pTcb->G_ID = 0; ++ GET_80211_HDR_ADDRESS1(pHeader, &RA); ++ pTcb->P_AID = RA[5]; /*RA[39:47]*/ ++ pTcb->P_AID = (pTcb->P_AID << 1) | (RA[4] >> 7 ); ++ } else { ++ pTcb->G_ID = 63; ++ pTcb->P_AID = 0; ++ } ++ /*RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, pTcb->G_ID, pTcb->P_AID));*/ ++ } ++} ++ ++ ++RT_STATUS ++Beamforming_GetReportFrame( ++ IN PADAPTER Adapter, ++ IN PRT_RFD pRfd, ++ IN POCTET_STRING pPduOS ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; ++ pu1Byte pMIMOCtrlField, pCSIReport, pCSIMatrix; ++ u1Byte Idx, Nc, Nr, CH_W; ++ u2Byte CSIMatrixLen = 0; ++ ++ ACT_PKT_TYPE pktType = ACT_PKT_TYPE_UNKNOWN; ++ ++ //Memory comparison to see if CSI report is the same with previous one ++ pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, Frame_Addr2(*pPduOS), &Idx); ++ ++ if (pBeamformEntry == NULL) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Beamforming_GetReportFrame: Cannot find entry by addr\n")); ++ return RT_STATUS_FAILURE; ++ } ++ ++ pktType = PacketGetActionFrameType(pPduOS); ++ ++ //-@ Modified by David ++ if (pktType == ACT_PKT_VHT_COMPRESSED_BEAMFORMING) { ++ pMIMOCtrlField = pPduOS->Octet + 26; ++ Nc = ((*pMIMOCtrlField) & 0x7) + 1; ++ Nr = (((*pMIMOCtrlField) & 0x38) >> 3) + 1; ++ CH_W = (((*pMIMOCtrlField) & 0xC0) >> 6); ++ pCSIMatrix = pMIMOCtrlField + 3 + Nc; //24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField) +SNR(Nc=2) ++ CSIMatrixLen = pPduOS->Length - 26 -3 -Nc; ++ } else if (pktType == ACT_PKT_HT_COMPRESSED_BEAMFORMING) { ++ pMIMOCtrlField = pPduOS->Octet + 26; ++ Nc = ((*pMIMOCtrlField) & 0x3) + 1; ++ Nr = (((*pMIMOCtrlField) & 0xC) >> 2) + 1; ++ CH_W = (((*pMIMOCtrlField) & 0x10) >> 4); ++ pCSIMatrix = pMIMOCtrlField + 6 + Nr; //24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField) +SNR(Nc=2) ++ CSIMatrixLen = pPduOS->Length - 26 -6 -Nr; ++ } else ++ return RT_STATUS_SUCCESS; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] idx=%d, pkt type=%d, Nc=%d, Nr=%d, CH_W=%d\n", __func__, Idx, pktType, Nc, Nr, CH_W)); ++ ++ return RT_STATUS_SUCCESS; ++} ++ ++ ++VOID ++ConstructHTNDPAPacket( ++ PADAPTER Adapter, ++ pu1Byte RA, ++ pu1Byte Buffer, ++ pu4Byte pLength, ++ CHANNEL_WIDTH BW ++ ) ++{ ++ u2Byte Duration= 0; ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ OCTET_STRING pNDPAFrame,ActionContent; ++ u1Byte ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; ++ ++ PlatformZeroMemory(Buffer, 32); ++ ++ SET_80211_HDR_FRAME_CONTROL(Buffer,0); ++ ++ SET_80211_HDR_ORDER(Buffer, 1); ++ SET_80211_HDR_TYPE_AND_SUBTYPE(Buffer,Type_Action_No_Ack); ++ ++ SET_80211_HDR_ADDRESS1(Buffer, RA); ++ SET_80211_HDR_ADDRESS2(Buffer, Adapter->CurrentAddress); ++ SET_80211_HDR_ADDRESS3(Buffer, pMgntInfo->Bssid); ++ ++ Duration = 2*aSifsTime + 40; ++ ++ if (BW == CHANNEL_WIDTH_40) ++ Duration+= 87; ++ else ++ Duration+= 180; ++ ++ SET_80211_HDR_DURATION(Buffer, Duration); ++ ++ //HT control field ++ SET_HT_CTRL_CSI_STEERING(Buffer+sMacHdrLng, 3); ++ SET_HT_CTRL_NDP_ANNOUNCEMENT(Buffer+sMacHdrLng, 1); ++ ++ FillOctetString(pNDPAFrame, Buffer, sMacHdrLng+sHTCLng); ++ ++ FillOctetString(ActionContent, ActionHdr, 4); ++ PacketAppendData(&pNDPAFrame, ActionContent); ++ ++ *pLength = 32; ++} ++ ++ ++ ++ ++BOOLEAN ++SendFWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u4Byte BufLen; ++ pu1Byte BufAddr; ++ u1Byte DescLen = 0, Idx = 0, NDPTxRate; ++ PADAPTER pDefAdapter = GetDefaultAdapter(Adapter); ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pBeamformEntry == NULL) ++ return FALSE; ++ ++ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetFWBuffer(pDefAdapter, &pTcb, &pBuf)) { ++#if(DEV_BUS_TYPE != RT_PCI_INTERFACE) ++ DescLen = Adapter->HWDescHeadLength - pHalData->USBALLDummyLength; ++#endif ++ BufAddr = pBuf->Buffer.VirtualAddress + DescLen; ++ ++ ConstructHTNDPAPacket( ++ Adapter, ++ RA, ++ BufAddr, ++ &BufLen, ++ BW ++ ); ++ ++ pTcb->PacketLength = BufLen + DescLen; ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; ++ ++ pTcb->BWOfPacket = BW; ++ ++ if(ACTING_AS_IBSS(Adapter) || ACTING_AS_AP(Adapter)) ++ pTcb->G_ID = 63; ++ ++ pTcb->P_AID = pBeamformEntry->P_AID; ++ pTcb->DataRate = NDPTxRate; /*rate of NDP decide by Nr*/ ++ ++ Adapter->HalFunc.CmdSendPacketHandler(Adapter, pTcb, pBuf, pTcb->PacketLength, DESC_PACKET_TYPE_NORMAL, FALSE); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++ ++BOOLEAN ++SendSWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u1Byte Idx = 0, NDPTxRate = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { ++ ConstructHTNDPAPacket( ++ Adapter, ++ RA, ++ pBuf->Buffer.VirtualAddress, ++ &pTcb->PacketLength, ++ BW ++ ); ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; ++ ++ pTcb->BWOfPacket = BW; ++ ++ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, NDPTxRate); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++ ++ ++VOID ++ConstructVHTNDPAPacket( ++ IN PDM_ODM_T pDM_Odm, ++ pu1Byte RA, ++ u2Byte AID, ++ pu1Byte Buffer, ++ pu4Byte pLength, ++ CHANNEL_WIDTH BW ++ ) ++{ ++ u2Byte Duration= 0; ++ u1Byte Sequence = 0; ++ pu1Byte pNDPAFrame = Buffer; ++ RT_NDPA_STA_INFO STAInfo; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ u1Byte Idx = 0; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ // Frame control. ++ SET_80211_HDR_FRAME_CONTROL(pNDPAFrame, 0); ++ SET_80211_HDR_TYPE_AND_SUBTYPE(pNDPAFrame, Type_NDPA); ++ ++ SET_80211_HDR_ADDRESS1(pNDPAFrame, RA); ++ SET_80211_HDR_ADDRESS2(pNDPAFrame, pBeamformEntry->MyMacAddr); ++ ++ Duration = 2*aSifsTime + 44; ++ ++ if (BW == CHANNEL_WIDTH_80) ++ Duration += 40; ++ else if(BW == CHANNEL_WIDTH_40) ++ Duration+= 87; ++ else ++ Duration+= 180; ++ ++ SET_80211_HDR_DURATION(pNDPAFrame, Duration); ++ ++ Sequence = *(pDM_Odm->pSoundingSeq) << 2; ++ ODM_MoveMemory(pDM_Odm, pNDPAFrame+16, &Sequence, 1); ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS) || phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP) == FALSE) ++ AID = 0; ++ ++ STAInfo.AID = AID; ++ STAInfo.FeedbackType = 0; ++ STAInfo.NcIndex = 0; ++ ++ ODM_MoveMemory(pDM_Odm, pNDPAFrame+17, (pu1Byte)&STAInfo, 2); ++ ++ *pLength = 19; ++} ++ ++ ++BOOLEAN ++SendFWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u4Byte BufLen; ++ pu1Byte BufAddr; ++ u1Byte DescLen = 0, Idx = 0, NDPTxRate = 0; ++ PADAPTER pDefAdapter = GetDefaultAdapter(Adapter); ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry =phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pBeamformEntry == NULL) ++ return FALSE; ++ ++ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetFWBuffer(pDefAdapter, &pTcb, &pBuf)) { ++#if(DEV_BUS_TYPE != RT_PCI_INTERFACE) ++ DescLen = Adapter->HWDescHeadLength - pHalData->USBALLDummyLength; ++#endif ++ BufAddr = pBuf->Buffer.VirtualAddress + DescLen; ++ ++ ConstructVHTNDPAPacket( ++ pDM_Odm, ++ RA, ++ AID, ++ BufAddr, ++ &BufLen, ++ BW ++ ); ++ ++ pTcb->PacketLength = BufLen + DescLen; ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; ++ ++ pTcb->BWOfPacket = BW; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS) || phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_AP)) ++ pTcb->G_ID = 63; ++ ++ pTcb->P_AID = pBeamformEntry->P_AID; ++ pTcb->DataRate = NDPTxRate; /*decide by Nr*/ ++ ++ Adapter->HalFunc.CmdSendPacketHandler(Adapter, pTcb, pBuf, pTcb->PacketLength, DESC_PACKET_TYPE_NORMAL, FALSE); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End, ret=%d\n", __func__, ret)); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++ ++ ++BOOLEAN ++SendSWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u1Byte Idx = 0, NDPTxRate = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { ++ ConstructVHTNDPAPacket( ++ pDM_Odm, ++ RA, ++ AID, ++ pBuf->Buffer.VirtualAddress, ++ &pTcb->PacketLength, ++ BW ++ ); ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; ++ pTcb->BWOfPacket = BW; ++ ++ /*rate of NDP decide by Nr*/ ++ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, NDPTxRate); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++#ifdef SUPPORT_MU_BF ++#if (SUPPORT_MU_BF == 1) ++/* ++// Description: On VHT GID management frame by an MU beamformee. ++// ++// 2015.05.20. Created by tynli. ++*/ ++RT_STATUS ++Beamforming_GetVHTGIDMgntFrame( ++ IN PADAPTER Adapter, ++ IN PRT_RFD pRfd, ++ IN POCTET_STRING pPduOS ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ RT_STATUS rtStatus = RT_STATUS_SUCCESS; ++ pu1Byte pBuffer = NULL; ++ pu1Byte pRaddr = NULL; ++ u1Byte MemStatus[8] = {0}, UserPos[16] = {0}; ++ u1Byte idx; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMER_ENTRY pBeamformEntry = &pBeamInfo->BeamformerEntry[pBeamInfo->mu_ap_index]; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] On VHT GID mgnt frame!\n", __func__)); ++ ++ /* Check length*/ ++ if (pPduOS->Length < (FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY+16)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Beamforming_GetVHTGIDMgntFrame(): Invalid length (%d)\n", pPduOS->Length)); ++ return RT_STATUS_INVALID_LENGTH; ++ } ++ ++ /* Check RA*/ ++ pRaddr = (pu1Byte)(pPduOS->Octet)+4; ++ if (!eqMacAddr(pRaddr, Adapter->CurrentAddress)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Beamforming_GetVHTGIDMgntFrame(): Drop because of RA error.\n")); ++ return RT_STATUS_PKT_DROP; ++ } ++ ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "On VHT GID Mgnt Frame ==>:\n", pPduOS->Octet, pPduOS->Length); ++ ++ /*Parsing Membership Status Array*/ ++ pBuffer = pPduOS->Octet + FRAME_OFFSET_VHT_GID_MGNT_MEMBERSHIP_STATUS_ARRAY; ++ for (idx = 0; idx < 8; idx++) { ++ MemStatus[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(pBuffer+idx); ++ pBeamformEntry->gid_valid[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(pBuffer+idx); ++ } ++ ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "MemStatus: ", MemStatus, 8); ++ ++ /* Parsing User Position Array*/ ++ pBuffer = pPduOS->Octet + FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY; ++ for (idx = 0; idx < 16; idx++) { ++ UserPos[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(pBuffer+idx); ++ pBeamformEntry->user_position[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(pBuffer+idx); ++ } ++ ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "UserPos: ", UserPos, 16); ++ ++ /* Group ID detail printed*/ ++ { ++ u1Byte i, j; ++ u1Byte tmpVal; ++ u2Byte tmpVal2; ++ ++ for (i = 0; i < 8; i++) { ++ tmpVal = MemStatus[i]; ++ tmpVal2 = ((UserPos[i*2 + 1] << 8) & 0xFF00) + (UserPos[i * 2] & 0xFF); ++ for (j = 0; j < 8; j++) { ++ if ((tmpVal >> j) & BIT0) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Use Group ID (%d), User Position (%d)\n", ++ (i*8+j), (tmpVal2 >> 2 * j)&0x3)); ++ } ++ } ++ } ++ } ++ ++ /* Indicate GID frame to IHV service. */ ++ { ++ u1Byte Indibuffer[24] = {0}; ++ u1Byte Indioffset = 0; ++ ++ PlatformMoveMemory(Indibuffer + Indioffset, pBeamformEntry->gid_valid, 8); ++ Indioffset += 8; ++ PlatformMoveMemory(Indibuffer + Indioffset, pBeamformEntry->user_position, 16); ++ Indioffset += 16; ++ ++ PlatformIndicateCustomStatus( ++ Adapter, ++ RT_CUSTOM_EVENT_VHT_RECV_GID_MGNT_FRAME, ++ RT_CUSTOM_INDI_TARGET_IHV, ++ Indibuffer, ++ Indioffset); ++ } ++ ++ /* Config HW GID table */ ++ halComTxbf_ConfigGtab(pDM_Odm); ++ ++ return rtStatus; ++} ++ ++/* ++// Description: Construct VHT Group ID (GID) management frame. ++// ++// 2015.05.20. Created by tynli. ++*/ ++VOID ++ConstructVHTGIDMgntFrame( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte RA, ++ IN PRT_BEAMFORMEE_ENTRY pBeamformEntry, ++ OUT pu1Byte Buffer, ++ OUT pu4Byte pLength ++ ++) ++{ ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ OCTET_STRING osFTMFrame, tmp; ++ ++ FillOctetString(osFTMFrame, Buffer, 0); ++ *pLength = 0; ++ ++ ConstructMaFrameHdr( ++ Adapter, ++ RA, ++ ACT_CAT_VHT, ++ ACT_VHT_GROUPID_MANAGEMENT, ++ &osFTMFrame); ++ ++ /* Membership Status Array*/ ++ FillOctetString(tmp, pBeamformEntry->gid_valid, 8); ++ PacketAppendData(&osFTMFrame, tmp); ++ ++ /* User Position Array*/ ++ FillOctetString(tmp, pBeamformEntry->user_position, 16); ++ PacketAppendData(&osFTMFrame, tmp); ++ ++ *pLength = osFTMFrame.Length; ++ ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "ConstructVHTGIDMgntFrame():\n", Buffer, *pLength); ++} ++ ++BOOLEAN ++SendSWVHTGIDMgntFrame( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u1Byte Idx ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u1Byte DataRate = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = &pBeamInfo->BeamformeeEntry[Idx]; ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { ++ ConstructVHTGIDMgntFrame( ++ pDM_Odm, ++ RA, ++ pBeamformEntry, ++ pBuf->Buffer.VirtualAddress, ++ &pTcb->PacketLength ++ ); ++ ++ pTcb->BWOfPacket = CHANNEL_WIDTH_20; ++ DataRate = MGN_6M; ++ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, DataRate); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++ ++/* ++// Description: Construct VHT beamforming report poll. ++// ++// 2015.05.20. Created by tynli. ++*/ ++VOID ++ConstructVHTBFReportPoll( ++ IN PDM_ODM_T pDM_Odm, ++ IN pu1Byte RA, ++ OUT pu1Byte Buffer, ++ OUT pu4Byte pLength ++) ++{ ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ pu1Byte pBFRptPoll = Buffer; ++ ++ /* Frame control*/ ++ SET_80211_HDR_FRAME_CONTROL(pBFRptPoll, 0); ++ SET_80211_HDR_TYPE_AND_SUBTYPE(pBFRptPoll, Type_Beamforming_Report_Poll); ++ ++ /* Duration*/ ++ SET_80211_HDR_DURATION(pBFRptPoll, 100); ++ ++ /* RA*/ ++ SET_VHT_BF_REPORT_POLL_RA(pBFRptPoll, RA); ++ ++ /* TA*/ ++ SET_VHT_BF_REPORT_POLL_TA(pBFRptPoll, Adapter->CurrentAddress); ++ ++ /* Feedback Segment Retransmission Bitmap*/ ++ SET_VHT_BF_REPORT_POLL_FEEDBACK_SEG_RETRAN_BITMAP(pBFRptPoll, 0xFF); ++ ++ *pLength = 17; ++ ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "ConstructVHTBFReportPoll():\n", Buffer, *pLength); ++ ++} ++ ++BOOLEAN ++SendSWVHTBFReportPoll( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN BOOLEAN bFinalPoll ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u1Byte Idx = 0, DataRate = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { ++ ConstructVHTBFReportPoll( ++ pDM_Odm, ++ RA, ++ pBuf->Buffer.VirtualAddress, ++ &pTcb->PacketLength ++ ); ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; /* need?*/ ++ pTcb->BWOfPacket = CHANNEL_WIDTH_20; ++ ++ if (bFinalPoll) ++ pTcb->TxBFPktType = RT_BF_PKT_TYPE_FINAL_BF_REPORT_POLL; ++ else ++ pTcb->TxBFPktType = RT_BF_PKT_TYPE_BF_REPORT_POLL; ++ ++ DataRate = MGN_6M; /* Legacy OFDM rate*/ ++ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, DataRate); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "SendSWVHTBFReportPoll():\n", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++ ++} ++ ++ ++/* ++// Description: Construct VHT MU NDPA packet. ++// We should combine this function with ConstructVHTNDPAPacket() in the future. ++// ++// 2015.05.21. Created by tynli. ++*/ ++VOID ++ConstructVHTMUNDPAPacket( ++ IN PDM_ODM_T pDM_Odm, ++ IN CHANNEL_WIDTH BW, ++ OUT pu1Byte Buffer, ++ OUT pu4Byte pLength ++ ) ++{ ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ u2Byte Duration = 0; ++ u1Byte Sequence = 0; ++ pu1Byte pNDPAFrame = Buffer; ++ RT_NDPA_STA_INFO STAInfo; ++ u1Byte idx; ++ u1Byte DestAddr[6] = {0}; ++ PRT_BEAMFORMEE_ENTRY pEntry = NULL; ++ ++ /* Fill the first MU BFee entry (STA1) MAC addr to destination address then ++ HW will change A1 to broadcast addr. 2015.05.28. Suggested by SD1 Chunchu. */ ++ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { ++ pEntry = &(pBeamInfo->BeamformeeEntry[idx]); ++ if (pEntry->is_mu_sta) { ++ cpMacAddr(DestAddr, pEntry->MacAddr); ++ break; ++ } ++ } ++ if (pEntry == NULL) ++ return; ++ ++ /* Frame control.*/ ++ SET_80211_HDR_FRAME_CONTROL(pNDPAFrame, 0); ++ SET_80211_HDR_TYPE_AND_SUBTYPE(pNDPAFrame, Type_NDPA); ++ ++ SET_80211_HDR_ADDRESS1(pNDPAFrame, DestAddr); ++ SET_80211_HDR_ADDRESS2(pNDPAFrame, pEntry->MyMacAddr); ++ ++ /*--------------------------------------------*/ ++ /* Need to modify "Duration" to MU consideration. */ ++ Duration = 2*aSifsTime + 44; ++ ++ if (BW == CHANNEL_WIDTH_80) ++ Duration += 40; ++ else if(BW == CHANNEL_WIDTH_40) ++ Duration+= 87; ++ else ++ Duration+= 180; ++ /*--------------------------------------------*/ ++ ++ SET_80211_HDR_DURATION(pNDPAFrame, Duration); ++ ++ Sequence = *(pDM_Odm->pSoundingSeq) << 2; ++ ODM_MoveMemory(pDM_Odm, pNDPAFrame + 16, &Sequence, 1); ++ ++ *pLength = 17; ++ ++ /* Construct STA info. for multiple STAs*/ ++ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { ++ pEntry = &(pBeamInfo->BeamformeeEntry[idx]); ++ if (pEntry->is_mu_sta) { ++ STAInfo.AID = pEntry->AID; ++ STAInfo.FeedbackType = 1; /* 1'b1: MU*/ ++ STAInfo.NcIndex = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Get BeamformeeEntry idx(%d), AID =%d\n", __func__, idx, pEntry->AID)); ++ ++ ODM_MoveMemory(pDM_Odm, pNDPAFrame+(*pLength), (pu1Byte)&STAInfo, 2); ++ *pLength += 2; ++ } ++ } ++ ++} ++ ++BOOLEAN ++SendSWVHTMUNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_TCB pTcb; ++ PRT_TX_LOCAL_BUFFER pBuf; ++ BOOLEAN ret = TRUE; ++ u1Byte NDPTxRate = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PADAPTER Adapter = pBeamInfo->SourceAdapter; ++ ++ NDPTxRate = MGN_VHT2SS_MCS0; ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ ++ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (MgntGetBuffer(Adapter, &pTcb, &pBuf)) { ++ ConstructVHTMUNDPAPacket( ++ pDM_Odm, ++ BW, ++ pBuf->Buffer.VirtualAddress, ++ &pTcb->PacketLength ++ ); ++ ++ pTcb->bTxEnableSwCalcDur = TRUE; ++ pTcb->BWOfPacket = BW; ++ pTcb->TxBFPktType = RT_BF_PKT_TYPE_BROADCAST_NDPA; ++ ++ /*rate of NDP decide by Nr*/ ++ MgntSendPacket(Adapter, pTcb, pBuf, pTcb->PacketLength, NORMAL_QUEUE, NDPTxRate); ++ } else ++ ret = FALSE; ++ ++ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); ++ ++ if (ret) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", pBuf->Buffer.VirtualAddress, pTcb->PacketLength); ++ ++ return ret; ++} ++ ++#endif /*#if (SUPPORT_MU_BF == 1)*/ ++#endif /*#ifdef SUPPORT_MU_BF*/ ++ ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++u4Byte ++Beamforming_GetReportFrame( ++ IN PVOID pDM_VOID, ++ union recv_frame *precv_frame ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u4Byte ret = _SUCCESS; ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = NULL; ++ pu1Byte pframe = precv_frame->u.hdr.rx_data; ++ u4Byte frame_len = precv_frame->u.hdr.len; ++ pu1Byte TA; ++ u1Byte Idx, offset; ++ ++ /*DBG_871X("beamforming_get_report_frame\n");*/ ++ ++ /*Memory comparison to see if CSI report is the same with previous one*/ ++ TA = GetAddr2Ptr(pframe); ++ pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, TA, &Idx); ++ if(pBeamformEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ offset = 31; /*24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ ++ else if(pBeamformEntry->BeamformEntryCap & BEAMFORMER_CAP_HT_EXPLICIT) ++ offset = 34; /*24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2)*/ ++ else ++ return ret; ++ ++ /*DBG_871X("%s MacId %d offset=%d\n", __FUNCTION__, pBeamformEntry->mac_id, offset);*/ ++ ++ return ret; ++} ++ ++ ++BOOLEAN ++SendFWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u1Byte ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; ++ u1Byte *pframe; ++ u2Byte *fctrl; ++ u2Byte duration = 0; ++ u1Byte aSifsTime = 0, NDPTxRate = 0, Idx = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) { ++ DBG_871X("%s, alloc mgnt frame fail\n", __func__); ++ return _FALSE; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ ++ pattrib->qsel = QSLT_BEACON; ++ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = BW; ++ pattrib->order = 1; ++ pattrib->subtype = WIFI_ACTION_NOACK; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetOrderBit(pframe); ++ SetFrameSubType(pframe, WIFI_ACTION_NOACK); ++ ++ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ if( pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ duration = 2*aSifsTime + 40; ++ ++ if(BW == CHANNEL_WIDTH_40) ++ duration+= 87; ++ else ++ duration+= 180; ++ ++ SetDuration(pframe, duration); ++ ++ //HT control field ++ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); ++ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); ++ ++ _rtw_memcpy(pframe+28, ActionHdr, 4); ++ ++ pattrib->pktlen = 32; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++} ++ ++ ++BOOLEAN ++SendSWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u1Byte ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; ++ pu1Byte pframe; ++ pu2Byte fctrl; ++ u2Byte duration = 0; ++ u1Byte aSifsTime = 0, NDPTxRate = 0, Idx = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ NDPTxRate = Beamforming_GetHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) { ++ DBG_871X("%s, alloc mgnt frame fail\n", __func__); ++ return _FALSE; ++ } ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ pattrib->qsel = QSLT_MGNT; ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = BW; ++ pattrib->order = 1; ++ pattrib->subtype = WIFI_ACTION_NOACK; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetOrderBit(pframe); ++ SetFrameSubType(pframe, WIFI_ACTION_NOACK); ++ ++ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ if (pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ duration = 2*aSifsTime + 40; ++ ++ if (BW == CHANNEL_WIDTH_40) ++ duration += 87; ++ else ++ duration += 180; ++ ++ SetDuration(pframe, duration); ++ ++ /*HT control field*/ ++ SET_HT_CTRL_CSI_STEERING(pframe+24, 3); ++ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); ++ ++ _rtw_memcpy(pframe+28, ActionHdr, 4); ++ ++ pattrib->pktlen = 32; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++} ++ ++ ++BOOLEAN ++SendFWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ pu1Byte pframe; ++ pu2Byte fctrl; ++ u2Byte duration = 0; ++ u1Byte sequence = 0, aSifsTime = 0, NDPTxRate= 0, Idx = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ RT_NDPA_STA_INFO sta_info; ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) { ++ DBG_871X("%s, alloc mgnt frame fail\n", __func__); ++ return _FALSE; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ _rtw_memcpy(pattrib->ra, RA, ETH_ALEN); ++ update_mgntframe_attrib(Adapter, pattrib); ++ ++ pattrib->qsel = QSLT_BEACON; ++ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = BW; ++ pattrib->subtype = WIFI_NDPA; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetFrameSubType(pframe, WIFI_NDPA); ++ ++ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); ++ ++ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) ++ aSifsTime = 16; ++ else ++ aSifsTime = 10; ++ ++ duration = 2*aSifsTime + 44; ++ ++ if(BW == CHANNEL_WIDTH_80) ++ duration += 40; ++ else if(BW == CHANNEL_WIDTH_40) ++ duration+= 87; ++ else ++ duration+= 180; ++ ++ SetDuration(pframe, duration); ++ ++ sequence = pBeamInfo->SoundingSequence<< 2; ++ if (pBeamInfo->SoundingSequence >= 0x3f) ++ pBeamInfo->SoundingSequence = 0; ++ else ++ pBeamInfo->SoundingSequence++; ++ ++ _rtw_memcpy(pframe+16, &sequence,1); ++ ++ if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ AID = 0; ++ ++ sta_info.AID = AID; ++ sta_info.FeedbackType = 0; ++ sta_info.NcIndex= 0; ++ ++ _rtw_memcpy(pframe+17, (u8 *)&sta_info, 2); ++ ++ pattrib->pktlen = 19; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ++ return _TRUE; ++} ++ ++ ++ ++BOOLEAN ++SendSWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ RT_NDPA_STA_INFO ndpa_sta_info; ++ u1Byte NDPTxRate = 0, sequence = 0, aSifsTime = 0, Idx = 0; ++ pu1Byte pframe; ++ pu2Byte fctrl; ++ u2Byte duration = 0; ++ PRT_BEAMFORMING_INFO pBeamInfo = &(pDM_Odm->BeamformingInfo); ++ PRT_BEAMFORMEE_ENTRY pBeamformEntry = phydm_Beamforming_GetBFeeEntryByAddr(pDM_Odm, RA, &Idx); ++ ++ NDPTxRate = Beamforming_GetVHTNDPTxRate(pDM_Odm, pBeamformEntry->CompSteeringNumofBFer); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] NDPTxRate =%d\n", __func__, NDPTxRate)); ++ ++ pmgntframe = alloc_mgtxmitframe(pxmitpriv); ++ ++ if (pmgntframe == NULL) { ++ DBG_871X("%s, alloc mgnt frame fail\n", __func__); ++ return _FALSE; ++ } ++ ++ /*update attribute*/ ++ pattrib = &pmgntframe->attrib; ++ _rtw_memcpy(pattrib->ra, RA, ETH_ALEN); ++ update_mgntframe_attrib(Adapter, pattrib); ++ pattrib->qsel = QSLT_MGNT; ++ pattrib->rate = NDPTxRate; ++ pattrib->bwmode = BW; ++ pattrib->subtype = WIFI_NDPA; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &pwlanhdr->frame_ctl; ++ *(fctrl) = 0; ++ ++ SetFrameSubType(pframe, WIFI_NDPA); ++ ++ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pBeamformEntry->MyMacAddr, ETH_ALEN); ++ ++ if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) ++ aSifsTime = 16; ++ else ++ aSifsTime = 10; ++ ++ duration = 2*aSifsTime + 44; ++ ++ if (BW == CHANNEL_WIDTH_80) ++ duration += 40; ++ else if (BW == CHANNEL_WIDTH_40) ++ duration += 87; ++ else ++ duration += 180; ++ ++ SetDuration(pframe, duration); ++ ++ sequence = pBeamInfo->SoundingSequence << 2; ++ if (pBeamInfo->SoundingSequence >= 0x3f) ++ pBeamInfo->SoundingSequence = 0; ++ else ++ pBeamInfo->SoundingSequence++; ++ ++ _rtw_memcpy(pframe+16, &sequence, 1); ++ if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ AID = 0; ++ ++ ndpa_sta_info.AID = AID; ++ ndpa_sta_info.FeedbackType = 0; ++ ndpa_sta_info.NcIndex = 0; ++ ++ _rtw_memcpy(pframe+17, (u8 *)&ndpa_sta_info, 2); ++ ++ pattrib->pktlen = 19; ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(Adapter, pmgntframe); ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] [%d]\n", __func__, __LINE__)); ++ ++ return _TRUE; ++} ++ ++ ++#endif ++ ++ ++VOID ++Beamforming_GetNDPAFrame( ++ IN PVOID pDM_VOID, ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN OCTET_STRING pduOS ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ union recv_frame *precv_frame ++#endif ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ pu1Byte TA ; ++ u1Byte Idx, Sequence; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ pu1Byte pNDPAFrame = pduOS.Octet; ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ pu1Byte pNDPAFrame = precv_frame->u.hdr.rx_data; ++#endif ++ PRT_BEAMFORMER_ENTRY pBeamformerEntry = NULL; /*Modified By Jeffery @2014-10-29*/ ++ ++ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_DISP_DATA(FBEAM, FBEAM_DATA, "Beamforming_GetNDPAFrame\n", pduOS.Octet, pduOS.Length); ++ if (IsCtrlNDPA(pNDPAFrame) == FALSE) ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ if (GetFrameSubType(pNDPAFrame) != WIFI_NDPA) ++#endif ++ return; ++ else if (!(pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821))) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] not 8812 or 8821A, return\n", __func__)); ++ return; ++ } ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ TA = Frame_Addr2(pduOS); ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ TA = GetAddr2Ptr(pNDPAFrame); ++#endif ++ /*Remove signaling TA. */ ++ TA[0] = TA[0] & 0xFE; ++ ++ pBeamformerEntry = phydm_Beamforming_GetBFerEntryByAddr(pDM_Odm, TA, &Idx); // Modified By Jeffery @2014-10-29 ++ ++ /*Break options for Clock Reset*/ ++ if (pBeamformerEntry == NULL) ++ return; ++ else if (!(pBeamformerEntry->BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU)) ++ return; ++ /*LogSuccess: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/ ++ /*ClockResetTimes: While BFer entry always doesn't receive our CSI, clock will reset again and again.So ClockResetTimes is limited to 5 times.2015-04-13, Jeffery*/ ++ else if ((pBeamformerEntry->LogSuccess == 1) || (pBeamformerEntry->ClockResetTimes == 5)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] LogSeq=%d, PreLogSeq=%d, LogRetryCnt=%d, LogSuccess=%d, ClockResetTimes=%d, clock reset is no longer needed.\n", ++ __func__, pBeamformerEntry->LogSeq, pBeamformerEntry->PreLogSeq, pBeamformerEntry->LogRetryCnt, pBeamformerEntry->LogSuccess, pBeamformerEntry->ClockResetTimes)); ++ ++ return; ++ } ++ ++ Sequence = (pNDPAFrame[16]) >> 2; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start, Sequence=%d, LogSeq=%d, PreLogSeq=%d, LogRetryCnt=%d, ClockResetTimes=%d, LogSuccess=%d\n", ++ __func__, Sequence, pBeamformerEntry->LogSeq, pBeamformerEntry->PreLogSeq, pBeamformerEntry->LogRetryCnt, pBeamformerEntry->ClockResetTimes, pBeamformerEntry->LogSuccess)); ++ ++ if ((pBeamformerEntry->LogSeq != 0) && (pBeamformerEntry->PreLogSeq != 0)) { ++ /*Success condition*/ ++ if ((pBeamformerEntry->LogSeq != Sequence) && (pBeamformerEntry->PreLogSeq != pBeamformerEntry->LogSeq)) { ++ /* break option for clcok reset, 2015-03-30, Jeffery */ ++ pBeamformerEntry->LogRetryCnt = 0; ++ /*As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/ ++ /*That is, LogSuccess is NOT needed to be reset to zero, 2015-04-13, Jeffery*/ ++ pBeamformerEntry->LogSuccess = 1; ++ ++ } else {/*Fail condition*/ ++ ++ if (pBeamformerEntry->LogRetryCnt == 5) { ++ pBeamformerEntry->ClockResetTimes++; ++ pBeamformerEntry->LogRetryCnt = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Clock Reset!!! ClockResetTimes=%d\n", ++ __func__, pBeamformerEntry->ClockResetTimes)); ++ HalComTxbf_Set(pDM_Odm, TXBF_SET_SOUNDING_CLK, NULL); ++ ++ } else ++ pBeamformerEntry->LogRetryCnt++; ++ } ++ } ++ ++ /*Update LogSeq & PreLogSeq*/ ++ pBeamformerEntry->PreLogSeq = pBeamformerEntry->LogSeq; ++ pBeamformerEntry->LogSeq = Sequence; ++ ++} ++ ++ ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfinterface.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfinterface.h +new file mode 100644 +index 0000000..18c8edb +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfinterface.h +@@ -0,0 +1,158 @@ ++#ifndef __HAL_TXBF_INTERFACE_H__ ++#define __HAL_TXBF_INTERFACE_H__ ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++VOID ++Beamforming_GidPAid( ++ PADAPTER Adapter, ++ PRT_TCB pTcb ++ ); ++ ++RT_STATUS ++Beamforming_GetReportFrame( ++ IN PADAPTER Adapter, ++ IN PRT_RFD pRfd, ++ IN POCTET_STRING pPduOS ++ ); ++ ++VOID ++Beamforming_GetNDPAFrame( ++ IN PVOID pDM_VOID, ++ IN OCTET_STRING pduOS ++ ); ++ ++BOOLEAN ++SendFWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendFWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendSWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendSWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++#ifdef SUPPORT_MU_BF ++#if (SUPPORT_MU_BF == 1) ++RT_STATUS ++Beamforming_GetVHTGIDMgntFrame( ++ IN PADAPTER Adapter, ++ IN PRT_RFD pRfd, ++ IN POCTET_STRING pPduOS ++ ); ++ ++BOOLEAN ++SendSWVHTGIDMgntFrame( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u1Byte Idx ++ ); ++ ++BOOLEAN ++SendSWVHTBFReportPoll( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN BOOLEAN bFinalPoll ++ ); ++ ++BOOLEAN ++SendSWVHTMUNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN CHANNEL_WIDTH BW ++ ); ++#else ++#define Beamforming_GetVHTGIDMgntFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE ++#define SendSWVHTGIDMgntFrame(pDM_VOID, RA) ++#define SendSWVHTBFReportPoll(pDM_VOID, RA, bFinalPoll) ++#define SendSWVHTMUNDPAPacket(pDM_VOID, BW) ++#endif ++#endif ++ ++ ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ ++u4Byte ++Beamforming_GetReportFrame( ++ IN PVOID pDM_VOID, ++ union recv_frame *precv_frame ++ ); ++ ++BOOLEAN ++SendFWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendSWHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendFWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ); ++ ++BOOLEAN ++SendSWVHTNDPAPacket( ++ IN PVOID pDM_VOID, ++ IN pu1Byte RA, ++ IN u2Byte AID, ++ IN CHANNEL_WIDTH BW ++ ); ++#endif ++ ++VOID ++Beamforming_GetNDPAFrame( ++ IN PVOID pDM_VOID, ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ IN OCTET_STRING pduOS ++#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ union recv_frame *precv_frame ++#endif ++); ++ ++#else ++#define Beamforming_GetNDPAFrame(pDM_Odm, _PduOS) ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++#define Beamforming_GetReportFrame(Adapter, precv_frame) RT_STATUS_FAILURE ++#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++#define Beamforming_GetReportFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE ++#define Beamforming_GetVHTGIDMgntFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE ++#endif ++#define SendFWHTNDPAPacket(pDM_VOID, RA, BW) ++#define SendSWHTNDPAPacket(pDM_VOID, RA, BW) ++#define SendFWVHTNDPAPacket(pDM_VOID, RA, AID, BW) ++#define SendSWVHTNDPAPacket(pDM_VOID, RA, AID, BW) ++#define SendSWVHTGIDMgntFrame(pDM_VOID, RA, idx) ++#define SendSWVHTBFReportPoll(pDM_VOID, RA, bFinalPoll) ++#define SendSWVHTMUNDPAPacket(pDM_VOID, BW) ++#endif ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfjaguar.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfjaguar.c +new file mode 100644 +index 0000000..b34e851 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfjaguar.c +@@ -0,0 +1,527 @@ ++//============================================================ ++// Description: ++// ++// This file is for 8812/8821/8811 TXBF mechanism ++// ++//============================================================ ++#include "mp_precomp.h" ++#include "../phydm_precomp.h" ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) ++VOID ++HalTxbf8812A_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8812A, (Rate << 2 | BW)); ++ ++} ++ ++VOID ++halTxbfJaguar_RfMode( ++ IN PVOID pDM_VOID, ++ IN PRT_BEAMFORMING_INFO pBeamInfo ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ ++ if (pDM_Odm->RFType == ODM_1T1R) ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] set TxIQGen\n", __func__)); ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) { ++ // Paath_A ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ ++ // Path_B ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ ++ } else { ++ // Paath_A ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ ++ // Path_B ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/ ++ } ++ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/ ++ ++ if (pBeamInfo->beamformee_su_cnt > 0) ++ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x33); ++ else ++ ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x11); ++} ++ ++ ++VOID ++halTxbfJaguar_DownloadNDPA( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page; ++ u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0; ++ BOOLEAN bSendBeacon = FALSE; ++ u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*default reseved 1 page for the IC type which is undefined.*/ ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ *pDM_Odm->pbFwDwRsvdPageInProgress = TRUE; ++#endif ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (Idx == 0) ++ Head_Page = 0xFE; ++ else ++ Head_Page = 0xFE; ++ ++ Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy); ++ ++ /*Set REG_CR bit 8. DMA beacon by SW.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8812A + 1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8812A + 1, (u1bTmp | BIT0)); ++ ++ ++ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ ++ tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8812A + 2); ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8812A + 2, tmpReg422 & (~BIT6)); ++ ++ if (tmpReg422 & BIT6) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("SetBeamformDownloadNDPA_8812(): There is an Adapter is sending beacon.\n")); ++ bSendBeacon = TRUE; ++ } ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, Head_Page); ++ ++ do { ++ /*Clear beacon valid check bit.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 2, (BcnValidReg | BIT0)); ++ ++ /*download NDPA rsvd page.*/ ++ if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU) ++ Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE); ++ else ++ Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE); ++ ++ /*check rsvd page download OK.*/ ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ count = 0; ++ while (!(BcnValidReg & BIT0) && count < 20) { ++ count++; ++ ODM_delay_ms(10); ++ BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2); ++ } ++ DLBcnCount++; ++ } while (!(BcnValidReg & BIT0) && DLBcnCount < 5); ++ ++ if (!(BcnValidReg & BIT0)) ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__)); ++ ++ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, TxPageBndy); ++ ++ /*To make sure that if there exists an adapter which would like to send beacon.*/ ++ /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ ++ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ ++ /*the beacon cannot be sent by HW.*/ ++ /*2010.06.23. Added by tynli.*/ ++ if (bSendBeacon) ++ ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8812A + 2, tmpReg422); ++ ++ /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ ++ /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ ++ u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8812A + 1); ++ ODM_Write1Byte(pDM_Odm, REG_CR_8812A + 1, (u1bTmp & (~BIT0))); ++ ++ pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ *pDM_Odm->pbFwDwRsvdPageInProgress = FALSE; ++#endif ++} ++ ++ ++VOID ++halTxbfJaguar_FwTxBFCmd( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte Idx, Period0 = 0, Period1 = 0; ++ u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF; ++ u1Byte u1TxBFParm[3] = {0}; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) { ++ /*Modified by David*/ ++ if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (Idx == 0) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum0 = 0xFE; ++ else ++ PageNum0 = 0xFF; /*stop sounding*/ ++ Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } else if (Idx == 1) { ++ if (pBeamInfo->BeamformeeEntry[Idx].bSound) ++ PageNum1 = 0xFE; ++ else ++ PageNum1 = 0xFF; /*stop sounding*/ ++ Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod); ++ } ++ } ++ } ++ ++ u1TxBFParm[0] = PageNum0; ++ u1TxBFParm[1] = PageNum1; ++ u1TxBFParm[2] = (Period1 << 4) | Period0; ++ ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_TXBF, 3, u1TxBFParm); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ++ ("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1)); ++} ++ ++ ++VOID ++HalTxbfJaguar_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte BFerBFeeIdx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u1Byte i = 0; ++ u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4; ++ u1Byte BFeeIdx = (BFerBFeeIdx & 0xF); ++ u4Byte CSI_Param; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ u2Byte STAid = 0; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!\n", __func__)); ++ ++ halTxbfJaguar_RfMode(pDM_Odm, pBeamformingInfo); ++ ++ if (pDM_Odm->RFType == ODM_2T2R) ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x00000000); /*Nc =2*/ ++ else ++ ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x01081008); /*Nc =1*/ ++ ++ if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx]; ++ ++ /*Sounding protocol control*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xCB); ++ ++ /*MAC address/Partial AID of Beamformer*/ ++ if (BFerIdx == 0) { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_BFMER0_INFO_8812A + i), BeamformerEntry.MacAddr[i]); ++ /*CSI report use legacy ofdm so don't need to fill P_AID. */ ++ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER0_INFO_8812A+6, BeamformEntry.P_AID); */ ++ } else { ++ for (i = 0; i < 6 ; i++) ++ ODM_Write1Byte(pDM_Odm, (REG_BFMER1_INFO_8812A + i), BeamformerEntry.MacAddr[i]); ++ /*CSI report use legacy ofdm so don't need to fill P_AID.*/ ++ /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER1_INFO_8812A+6, BeamformEntry.P_AID);*/ ++ } ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) { ++ if (pDM_Odm->RFType == ODM_2T2R) ++ CSI_Param = 0x01090109; ++ else ++ CSI_Param = 0x01080108; ++ } else { ++ if (pDM_Odm->RFType == ODM_2T2R) ++ CSI_Param = 0x03090309; ++ else ++ CSI_Param = 0x03080308; ++ } ++ ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8812A, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8812A, CSI_Param); ++ ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8812A, CSI_Param); ++ ++ /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A + 3, 0x50); ++ } ++ ++ ++ if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) { ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ STAid = BeamformeeEntry.MacId; ++ else ++ STAid = BeamformeeEntry.P_AID; ++ ++ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ ++ if (BFeeIdx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A, STAid); ++ ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 3) | BIT4 | BIT6 | BIT7); ++ } else ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 2, STAid | BIT12 | BIT14 | BIT15); ++ ++ /*CSI report parameters of Beamformee*/ ++ if (BFeeIdx == 0) { ++ /*Get BIT24 & BIT25*/ ++ u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3) & 0x3; ++ ++ ODM_Write1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, STAid | BIT9); ++ } else { ++ /*Set BIT25*/ ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, STAid | 0xE200); ++ } ++ phydm_Beamforming_Notify(pDM_Odm); ++ } ++} ++ ++ ++VOID ++HalTxbfJaguar_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMER_ENTRY BeamformerEntry; ++ RT_BEAMFORMEE_ENTRY BeamformeeEntry; ++ ++ if (Idx < BEAMFORMER_ENTRY_NUM) { ++ BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx]; ++ BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx]; ++ } else ++ return; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!, IDx = %d\n", __func__, Idx)); ++ ++ /*Clear P_AID of Beamformee*/ ++ /*Clear MAC address of Beamformer*/ ++ /*Clear Associated Bfmee Sel*/ ++ ++ if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xC8); ++ if (Idx == 0) { ++ ODM_Write4Byte(pDM_Odm, REG_BFMER0_INFO_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMER0_INFO_8812A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8812A, 0); ++ } else { ++ ODM_Write4Byte(pDM_Odm, REG_BFMER1_INFO_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMER1_INFO_8812A + 4, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8812A, 0); ++ ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8812A, 0); ++ } ++ } ++ ++ if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) { ++ halTxbfJaguar_RfMode(pDM_Odm, pBeamformingInfo); ++ if (Idx == 0) { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A, 0x0); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, 0); ++ } else { ++ ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 2, ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8812A + 2) & 0xF000); ++ ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, ODM_Read2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2) & 0x60); ++ } ++ } ++ ++} ++ ++ ++VOID ++HalTxbfJaguar_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte BeamCtrlVal; ++ u4Byte BeamCtrlReg; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx]; ++ ++ if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS)) ++ BeamCtrlVal = BeamformEntry.MacId; ++ else ++ BeamCtrlVal = BeamformEntry.P_AID; ++ ++ if (Idx == 0) ++ BeamCtrlReg = REG_TXBF_CTRL_8812A; ++ else { ++ BeamCtrlReg = REG_TXBF_CTRL_8812A + 2; ++ BeamCtrlVal |= BIT12 | BIT14 | BIT15; ++ } ++ ++ if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) { ++ if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20) ++ BeamCtrlVal |= BIT9; ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40) ++ BeamCtrlVal |= (BIT9 | BIT10); ++ else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80) ++ BeamCtrlVal |= (BIT9 | BIT10 | BIT11); ++ } else ++ BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BeamCtrlVal = 0x%x!\n", __func__, BeamCtrlVal)); ++ ++ ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal); ++} ++ ++ ++ ++VOID ++HalTxbfJaguar_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING) ++ halTxbfJaguar_DownloadNDPA(pDM_Odm, Idx); ++ ++ halTxbfJaguar_FwTxBFCmd(pDM_Odm); ++} ++ ++ ++VOID ++HalTxbfJaguar_Patch( ++ IN PVOID pDM_VOID, ++ IN u1Byte Operation ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (pBeamInfo->BeamformCap == BEAMFORMING_CAP_NONE) ++ return; ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ if (Operation == SCAN_OPT_BACKUP_BAND0) ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xC8); ++ else if (Operation == SCAN_OPT_RESTORE) ++ ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8812A, 0xCB); ++#endif ++} ++ ++VOID ++HalTxbfJaguar_Clk_8812A( ++ IN PVOID pDM_VOID ++) ++{ ++ PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ++ u2Byte u2btmp; ++ u1Byte Count = 0, u1btmp; ++ PADAPTER Adapter = pDM_Odm->Adapter; ++ ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__)); ++ ++ if (*(pDM_Odm->pbScanInProcess)) { ++ ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] return by Scan\n", __func__)); ++ return; ++ } ++#if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ /*Stop PCIe TxDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_PCIE_CTRL_REG_8812A + 1, 0xFE); ++#endif ++ ++ /*Stop Usb TxDMA*/ ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ RT_DISABLE_FUNC(Adapter, DF_TX_BIT); ++ PlatformReturnAllPendingTxPackets(Adapter); ++#else ++ rtw_write_port_cancel(Adapter); ++#endif ++ ++ /*Wait TXFF empty*/ ++ for (Count = 0; Count < 100; Count++) { ++ u2btmp = ODM_Read2Byte(pDM_Odm, REG_TXPKT_EMPTY_8812A); ++ u2btmp = u2btmp & 0xfff; ++ if (u2btmp != 0xfff) { ++ ODM_delay_ms(10); ++ continue; ++ } else ++ break; ++ } ++ ++ /*TX pause*/ ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0xFF); ++ ++ /*Wait TX State Machine OK*/ ++ for (Count = 0; Count < 100; Count++) { ++ if (ODM_Read4Byte(pDM_Odm, REG_SCH_TXCMD_8812A) != 0) ++ continue; ++ else ++ break; ++ } ++ ++ ++ /*Stop RX DMA path*/ ++ u1btmp = ODM_Read1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A); ++ ODM_Write1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A, u1btmp | BIT2); ++ ++ for (Count = 0; Count < 100; Count++) { ++ u1btmp = ODM_Read1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A); ++ if (u1btmp & BIT1) ++ break; ++ else ++ ODM_delay_ms(10); ++ } ++ ++ /*Disable clock*/ ++ ODM_Write1Byte(pDM_Odm, REG_SYS_CLKR_8812A + 1, 0xf0); ++ /*Disable 320M*/ ++ ODM_Write1Byte(pDM_Odm, REG_AFE_PLL_CTRL_8812A + 3, 0x8); ++ /*Enable 320M*/ ++ ODM_Write1Byte(pDM_Odm, REG_AFE_PLL_CTRL_8812A + 3, 0xa); ++ /*Enable clock*/ ++ ODM_Write1Byte(pDM_Odm, REG_SYS_CLKR_8812A + 1, 0xfc); ++ ++ ++ /*Release Tx pause*/ ++ ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0); ++ ++ /*Enable RX DMA path*/ ++ u1btmp = ODM_Read1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A); ++ ODM_Write1Byte(pDM_Odm, REG_RXDMA_CONTROL_8812A, u1btmp & (~BIT2)); ++#if DEV_BUS_TYPE == RT_PCI_INTERFACE ++ /*Enable PCIe TxDMA*/ ++ ODM_Write1Byte(pDM_Odm, REG_PCIE_CTRL_REG_8812A + 1, 0); ++#endif ++ /*Start Usb TxDMA*/ ++ RT_ENABLE_FUNC(Adapter, DF_TX_BIT); ++} ++ ++#endif ++ ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfjaguar.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfjaguar.h +new file mode 100644 +index 0000000..ba16b7f +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/haltxbfjaguar.h +@@ -0,0 +1,67 @@ ++#ifndef __HAL_TXBF_JAGUAR_H__ ++#define __HAL_TXBF_JAGUAR_H__ ++ ++#if (BEAMFORMING_SUPPORT == 1) ++#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) ++VOID ++HalTxbf8812A_setNDPArate( ++ IN PVOID pDM_VOID, ++ IN u1Byte BW, ++ IN u1Byte Rate ++); ++ ++ ++VOID ++HalTxbfJaguar_Enter( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbfJaguar_Leave( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbfJaguar_Status( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbfJaguar_FwTxBF( ++ IN PVOID pDM_VOID, ++ IN u1Byte Idx ++ ); ++ ++ ++VOID ++HalTxbfJaguar_Patch( ++ IN PVOID pDM_VOID, ++ IN u1Byte Operation ++ ); ++ ++ ++VOID ++HalTxbfJaguar_Clk_8812A( ++ IN PVOID pDM_VOID ++ ); ++ ++#else ++ ++#define HalTxbf8812A_setNDPArate(pDM_VOID, BW, Rate) ++#define HalTxbfJaguar_Enter(pDM_VOID, Idx) ++#define HalTxbfJaguar_Leave(pDM_VOID, Idx) ++#define HalTxbfJaguar_Status(pDM_VOID, Idx) ++#define HalTxbfJaguar_FwTxBF(pDM_VOID, Idx) ++#define HalTxbfJaguar_Patch(pDM_VOID, Operation) ++#define HalTxbfJaguar_Clk_8812A(pDM_VOID) ++#endif ++ ++#endif ++#endif // #ifndef __HAL_TXBF_JAGUAR_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/Hal8723BPwrSeq.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/Hal8723BPwrSeq.c +old mode 100755 +new mode 100644 +index 5f2a976..edeb182 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/Hal8723BPwrSeq.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/Hal8723BPwrSeq.c +@@ -1,108 +1,108 @@ +- +-/*++ +-Copyright (c) Realtek Semiconductor Corp. All rights reserved. +- +-Module Name: +- Hal8821PwrSeq.c +- +-Abstract: +- This file includes all kinds of Power Action event for RTL8723B and corresponding hardware configurtions which are released from HW SD. +- +-Major Change History: +- When Who What +- ---------- --------------- ------------------------------- +- 2011-08-08 Roger Create. +- +---*/ +- +-#include "Hal8723BPwrSeq.h" +- +- +-/* +- drivers should parse below arrays and do the corresponding actions +-*/ +-//3 Power on Array +-WLAN_PWR_CFG rtl8723B_power_on_flow[RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]= +-{ +- RTL8723B_TRANS_CARDEMU_TO_ACT +- RTL8723B_TRANS_END +-}; +- +-//3Radio off GPIO Array +-WLAN_PWR_CFG rtl8723B_radio_off_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_END_STEPS]= +-{ +- RTL8723B_TRANS_ACT_TO_CARDEMU +- RTL8723B_TRANS_END +-}; +- +-//3Card Disable Array +-WLAN_PWR_CFG rtl8723B_card_disable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]= +-{ +- RTL8723B_TRANS_ACT_TO_CARDEMU +- RTL8723B_TRANS_CARDEMU_TO_CARDDIS +- RTL8723B_TRANS_END +-}; +- +-//3 Card Enable Array +-WLAN_PWR_CFG rtl8723B_card_enable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]= +-{ +- RTL8723B_TRANS_CARDDIS_TO_CARDEMU +- RTL8723B_TRANS_CARDEMU_TO_ACT +- RTL8723B_TRANS_END +-}; +- +-//3Suspend Array +-WLAN_PWR_CFG rtl8723B_suspend_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]= +-{ +- RTL8723B_TRANS_ACT_TO_CARDEMU +- RTL8723B_TRANS_CARDEMU_TO_SUS +- RTL8723B_TRANS_END +-}; +- +-//3 Resume Array +-WLAN_PWR_CFG rtl8723B_resume_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]= +-{ +- RTL8723B_TRANS_SUS_TO_CARDEMU +- RTL8723B_TRANS_CARDEMU_TO_ACT +- RTL8723B_TRANS_END +-}; +- +-//3HWPDN Array +-WLAN_PWR_CFG rtl8723B_hwpdn_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]= +-{ +- RTL8723B_TRANS_ACT_TO_CARDEMU +- RTL8723B_TRANS_CARDEMU_TO_PDN +- RTL8723B_TRANS_END +-}; +- +-//3 Enter LPS +-WLAN_PWR_CFG rtl8723B_enter_lps_flow[RTL8723B_TRANS_ACT_TO_LPS_STEPS+RTL8723B_TRANS_END_STEPS]= +-{ +- //FW behavior +- RTL8723B_TRANS_ACT_TO_LPS +- RTL8723B_TRANS_END +-}; +- +-//3 Leave LPS +-WLAN_PWR_CFG rtl8723B_leave_lps_flow[RTL8723B_TRANS_LPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]= +-{ +- //FW behavior +- RTL8723B_TRANS_LPS_TO_ACT +- RTL8723B_TRANS_END +-}; +- +-//3 Enter SW LPS +-WLAN_PWR_CFG rtl8723B_enter_swlps_flow[RTL8723B_TRANS_ACT_TO_SWLPS_STEPS+RTL8723B_TRANS_END_STEPS]= +-{ +- //SW behavior +- RTL8723B_TRANS_ACT_TO_SWLPS +- RTL8723B_TRANS_END +-}; +- +-//3 Leave SW LPS +-WLAN_PWR_CFG rtl8723B_leave_swlps_flow[RTL8723B_TRANS_SWLPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]= +-{ +- //SW behavior +- RTL8723B_TRANS_SWLPS_TO_ACT +- RTL8723B_TRANS_END +-}; ++ ++/*++ ++Copyright (c) Realtek Semiconductor Corp. All rights reserved. ++ ++Module Name: ++ Hal8821PwrSeq.c ++ ++Abstract: ++ This file includes all kinds of Power Action event for RTL8723B and corresponding hardware configurtions which are released from HW SD. ++ ++Major Change History: ++ When Who What ++ ---------- --------------- ------------------------------- ++ 2011-08-08 Roger Create. ++ ++--*/ ++ ++#include "Hal8723BPwrSeq.h" ++ ++ ++/* ++ drivers should parse below arrays and do the corresponding actions ++*/ ++//3 Power on Array ++WLAN_PWR_CFG rtl8723B_power_on_flow[RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]= ++{ ++ RTL8723B_TRANS_CARDEMU_TO_ACT ++ RTL8723B_TRANS_END ++}; ++ ++//3Radio off GPIO Array ++WLAN_PWR_CFG rtl8723B_radio_off_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_END_STEPS]= ++{ ++ RTL8723B_TRANS_ACT_TO_CARDEMU ++ RTL8723B_TRANS_END ++}; ++ ++//3Card Disable Array ++WLAN_PWR_CFG rtl8723B_card_disable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]= ++{ ++ RTL8723B_TRANS_ACT_TO_CARDEMU ++ RTL8723B_TRANS_CARDEMU_TO_CARDDIS ++ RTL8723B_TRANS_END ++}; ++ ++//3 Card Enable Array ++WLAN_PWR_CFG rtl8723B_card_enable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]= ++{ ++ RTL8723B_TRANS_CARDDIS_TO_CARDEMU ++ RTL8723B_TRANS_CARDEMU_TO_ACT ++ RTL8723B_TRANS_END ++}; ++ ++//3Suspend Array ++WLAN_PWR_CFG rtl8723B_suspend_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]= ++{ ++ RTL8723B_TRANS_ACT_TO_CARDEMU ++ RTL8723B_TRANS_CARDEMU_TO_SUS ++ RTL8723B_TRANS_END ++}; ++ ++//3 Resume Array ++WLAN_PWR_CFG rtl8723B_resume_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]= ++{ ++ RTL8723B_TRANS_SUS_TO_CARDEMU ++ RTL8723B_TRANS_CARDEMU_TO_ACT ++ RTL8723B_TRANS_END ++}; ++ ++//3HWPDN Array ++WLAN_PWR_CFG rtl8723B_hwpdn_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]= ++{ ++ RTL8723B_TRANS_ACT_TO_CARDEMU ++ RTL8723B_TRANS_CARDEMU_TO_PDN ++ RTL8723B_TRANS_END ++}; ++ ++//3 Enter LPS ++WLAN_PWR_CFG rtl8723B_enter_lps_flow[RTL8723B_TRANS_ACT_TO_LPS_STEPS+RTL8723B_TRANS_END_STEPS]= ++{ ++ //FW behavior ++ RTL8723B_TRANS_ACT_TO_LPS ++ RTL8723B_TRANS_END ++}; ++ ++//3 Leave LPS ++WLAN_PWR_CFG rtl8723B_leave_lps_flow[RTL8723B_TRANS_LPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]= ++{ ++ //FW behavior ++ RTL8723B_TRANS_LPS_TO_ACT ++ RTL8723B_TRANS_END ++}; ++ ++//3 Enter SW LPS ++WLAN_PWR_CFG rtl8723B_enter_swlps_flow[RTL8723B_TRANS_ACT_TO_SWLPS_STEPS+RTL8723B_TRANS_END_STEPS]= ++{ ++ //SW behavior ++ RTL8723B_TRANS_ACT_TO_SWLPS ++ RTL8723B_TRANS_END ++}; ++ ++//3 Leave SW LPS ++WLAN_PWR_CFG rtl8723B_leave_swlps_flow[RTL8723B_TRANS_SWLPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]= ++{ ++ //SW behavior ++ RTL8723B_TRANS_SWLPS_TO_ACT ++ RTL8723B_TRANS_END ++}; +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_cmd.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_cmd.c +old mode 100755 +new mode 100644 +index 7714e38..fa5b11a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_cmd.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_cmd.c +@@ -42,10 +42,8 @@ static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 msgbox_num) + if(0 == valid ){ + read_down = _TRUE; + } +-#ifdef CONFIG_WOWLAN + else +- rtw_msleep_os(1); +-#endif ++ rtw_msleep_os(1); + }while( (!read_down) && (retry_cnts--)); + + return read_down; +@@ -95,7 +93,7 @@ _func_enter_; + if(CmdLen > RTL8723B_MAX_CMD_LEN) { + goto exit; + } +- if (padapter->bSurpriseRemoved == _TRUE) ++ if (rtw_is_surprise_removed(padapter)) + goto exit; + + //pay attention to if race condition happened in H2C cmd setting. +@@ -171,7 +169,7 @@ static void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); +@@ -279,7 +277,7 @@ static void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength) + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + // TA. +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + + *pLength = 16; + } +@@ -319,19 +317,19 @@ static void ConstructNullFunctionData( + case Ndis802_11Infrastructure: + SetToDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); + break; + case Ndis802_11APMode: + SetFrDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + break; + case Ndis802_11IBSS: + default: + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + break; + } +@@ -357,655 +355,6 @@ static void ConstructNullFunctionData( + *pLength = pktlen; + } + +- +-#ifdef CONFIG_WOWLAN +-// +-// Description: +-// Construct the ARP response packet to support ARP offload. +-// +-static void ConstructARPResponse( +- PADAPTER padapter, +- u8 *pframe, +- u32 *pLength, +- u8 *pIPAddress +- ) +-{ +- struct rtw_ieee80211_hdr *pwlanhdr; +- u16 *fctrl; +- u32 pktlen; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct wlan_network *cur_network = &pmlmepriv->cur_network; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- static u8 ARPLLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x08, 0x06}; +- u8 *pARPRspPkt = pframe; +- //for TKIP Cal MIC +- u8 *payload = pframe; +- u8 EncryptionHeadOverhead = 0; +- //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); +- +- pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; +- +- fctrl = &pwlanhdr->frame_ctl; +- *(fctrl) = 0; +- +- //------------------------------------------------------------------------- +- // MAC Header. +- //------------------------------------------------------------------------- +- SetFrameType(fctrl, WIFI_DATA); +- //SetFrameSubType(fctrl, 0); +- SetToDs(fctrl); +- _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- +- SetSeqNum(pwlanhdr, 0); +- SetDuration(pwlanhdr, 0); +- //SET_80211_HDR_FRAME_CONTROL(pARPRspPkt, 0); +- //SET_80211_HDR_TYPE_AND_SUBTYPE(pARPRspPkt, Type_Data); +- //SET_80211_HDR_TO_DS(pARPRspPkt, 1); +- //SET_80211_HDR_ADDRESS1(pARPRspPkt, pMgntInfo->Bssid); +- //SET_80211_HDR_ADDRESS2(pARPRspPkt, Adapter->CurrentAddress); +- //SET_80211_HDR_ADDRESS3(pARPRspPkt, pMgntInfo->Bssid); +- +- //SET_80211_HDR_DURATION(pARPRspPkt, 0); +- //SET_80211_HDR_FRAGMENT_SEQUENCE(pARPRspPkt, 0); +-#ifdef CONFIG_WAPI_SUPPORT +- *pLength = sMacHdrLng; +-#else +- *pLength = 24; +-#endif +- +-//YJ,del,120503 +-#if 0 +- //------------------------------------------------------------------------- +- // Qos Header: leave space for it if necessary. +- //------------------------------------------------------------------------- +- if(pStaQos->CurrentQosMode > QOS_DISABLE) +- { +- SET_80211_HDR_QOS_EN(pARPRspPkt, 1); +- PlatformZeroMemory(&(Buffer[*pLength]), sQoSCtlLng); +- *pLength += sQoSCtlLng; +- } +-#endif +- //------------------------------------------------------------------------- +- // Security Header: leave space for it if necessary. +- //------------------------------------------------------------------------- +- +-#if 1 +- switch (psecuritypriv->dot11PrivacyAlgrthm) +- { +- case _WEP40_: +- case _WEP104_: +- EncryptionHeadOverhead = 4; +- break; +- case _TKIP_: +- EncryptionHeadOverhead = 8; +- break; +- case _AES_: +- EncryptionHeadOverhead = 8; +- break; +-#ifdef CONFIG_WAPI_SUPPORT +- case _SMS4_: +- EncryptionHeadOverhead = 18; +- break; +-#endif +- default: +- EncryptionHeadOverhead = 0; +- } +- +- if(EncryptionHeadOverhead > 0) +- { +- _rtw_memset(&(pframe[*pLength]), 0,EncryptionHeadOverhead); +- *pLength += EncryptionHeadOverhead; +- //SET_80211_HDR_WEP(pARPRspPkt, 1); //Suggested by CCW. +- SetPrivacy(fctrl); +- } +-#endif +- //------------------------------------------------------------------------- +- // Frame Body. +- //------------------------------------------------------------------------- +- pARPRspPkt = (u8*)(pframe+ *pLength); +- payload = pARPRspPkt; //Get Payload pointer +- // LLC header +- _rtw_memcpy(pARPRspPkt, ARPLLCHeader, 8); +- *pLength += 8; +- +- // ARP element +- pARPRspPkt += 8; +- SET_ARP_PKT_HW(pARPRspPkt, 0x0100); +- SET_ARP_PKT_PROTOCOL(pARPRspPkt, 0x0008); // IP protocol +- SET_ARP_PKT_HW_ADDR_LEN(pARPRspPkt, 6); +- SET_ARP_PKT_PROTOCOL_ADDR_LEN(pARPRspPkt, 4); +- SET_ARP_PKT_OPERATION(pARPRspPkt, 0x0200); // ARP response +- SET_ARP_PKT_SENDER_MAC_ADDR(pARPRspPkt, myid(&(padapter->eeprompriv))); +- SET_ARP_PKT_SENDER_IP_ADDR(pARPRspPkt, pIPAddress); +-#ifdef CONFIG_ARP_KEEP_ALIVE +- if (rtw_gw_addr_query(padapter)==0) { +- SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, pmlmepriv->gw_mac_addr); +- SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pmlmepriv->gw_ip); +- } +- else +-#endif +- { +- SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, get_my_bssid(&(pmlmeinfo->network))); +- SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pIPAddress); +- DBG_871X("%s Target Mac Addr:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(get_my_bssid(&(pmlmeinfo->network)))); +- DBG_871X("%s Target IP Addr" IP_FMT "\n", __FUNCTION__, IP_ARG(pIPAddress)); +- } +- +- *pLength += 28; +- +- if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) +- { +- u8 mic[8]; +- struct mic_data micdata; +- struct sta_info *psta = NULL; +- u8 priority[4]={0x0,0x0,0x0,0x0}; +- u8 null_key[16]={0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}; +- +- DBG_871X("%s(): Add MIC\n",__FUNCTION__); +- +- psta = rtw_get_stainfo(&padapter->stapriv, get_my_bssid(&(pmlmeinfo->network))); +- if (psta != NULL) { +- if(_rtw_memcmp(&psta->dot11tkiptxmickey.skey[0],null_key, 16)==_TRUE){ +- DBG_871X("%s(): STA dot11tkiptxmickey==0\n",__FUNCTION__); +- } +- //start to calculate the mic code +- rtw_secmicsetkey(&micdata, &psta->dot11tkiptxmickey.skey[0]); +- } +- +- rtw_secmicappend(&micdata, pwlanhdr->addr3, 6); //DA +- +- rtw_secmicappend(&micdata, pwlanhdr->addr2, 6); //SA +- +- priority[0]=0; +- rtw_secmicappend(&micdata, &priority[0], 4); +- +- rtw_secmicappend(&micdata, payload, 36); //payload length = 8 + 28 +- +- rtw_secgetmic(&micdata,&(mic[0])); +- +- pARPRspPkt += 28; +- _rtw_memcpy(pARPRspPkt, &(mic[0]),8); +- +- *pLength += 8; +- } +-} +- +-#ifdef CONFIG_PNO_SUPPORT +-static void ConstructPnoInfo( +- PADAPTER padapter, +- u8 *pframe, +- u32 *pLength +- ) +-{ +- +- struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); +- +- u8 *pPnoInfoPkt = pframe; +- pPnoInfoPkt = (u8*)(pframe+ *pLength); +- _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_num, 1); +- +- *pLength+=1; +- pPnoInfoPkt += 1; +- _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->hidden_ssid_num, 1); +- +- *pLength+=3; +- pPnoInfoPkt += 3; +- _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->fast_scan_period, 1); +- +- *pLength+=4; +- pPnoInfoPkt += 4; +- _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->fast_scan_iterations, 4); +- +- *pLength+=4; +- pPnoInfoPkt += 4; +- _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->slow_scan_period, 4); +- +- *pLength+=4; +- pPnoInfoPkt += 4; +- _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_length, +- MAX_PNO_LIST_COUNT); +- +- *pLength+=MAX_PNO_LIST_COUNT; +- pPnoInfoPkt += MAX_PNO_LIST_COUNT; +- _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_cipher_info, +- MAX_PNO_LIST_COUNT); +- +- *pLength+=MAX_PNO_LIST_COUNT; +- pPnoInfoPkt += MAX_PNO_LIST_COUNT; +- _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_channel_info, +- MAX_PNO_LIST_COUNT); +- +- *pLength+=MAX_PNO_LIST_COUNT; +- pPnoInfoPkt += MAX_PNO_LIST_COUNT; +- _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->loc_probe_req, +- MAX_HIDDEN_AP); +- +- *pLength+=MAX_HIDDEN_AP; +- pPnoInfoPkt += MAX_HIDDEN_AP; +-} +- +-static void ConstructSSIDList( +- PADAPTER padapter, +- u8 *pframe, +- u32 *pLength +- ) +-{ +- int i = 0; +- u8 *pSSIDListPkt = pframe; +- struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); +- +- pSSIDListPkt = (u8*)(pframe+ *pLength); +- +- for(i = 0; i < pwrctl->pnlo_info->ssid_num ; i++) { +- _rtw_memcpy(pSSIDListPkt, &pwrctl->pno_ssid_list->node[i].SSID, +- pwrctl->pnlo_info->ssid_length[i]); +- +- *pLength += WLAN_SSID_MAXLEN; +- pSSIDListPkt += WLAN_SSID_MAXLEN; +- } +-} +- +-static void ConstructScanInfo( +- PADAPTER padapter, +- u8 *pframe, +- u32 *pLength +- ) +-{ +- int i = 0; +- u8 *pScanInfoPkt = pframe; +- struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); +- +- pScanInfoPkt = (u8*)(pframe+ *pLength); +- +- _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->channel_num, 1); +- +- *pLength+=1; +- pScanInfoPkt += 1; +- _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_ch, 1); +- +- +- *pLength+=1; +- pScanInfoPkt += 1; +- _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_bw, 1); +- +- +- *pLength+=1; +- pScanInfoPkt += 1; +- _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_40_offset, 1); +- +- *pLength+=1; +- pScanInfoPkt += 1; +- _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_80_offset, 1); +- +- *pLength+=1; +- pScanInfoPkt += 1; +- _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->periodScan, 1); +- +- *pLength+=1; +- pScanInfoPkt += 1; +- _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->period_scan_time, 1); +- +- *pLength+=1; +- pScanInfoPkt += 1; +- _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->enableRFE, 1); +- +- *pLength+=1; +- pScanInfoPkt += 1; +- _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->rfe_type, 8); +- +- *pLength+=8; +- pScanInfoPkt += 8; +- +- for(i = 0 ; i < MAX_SCAN_LIST_COUNT ; i ++) { +- _rtw_memcpy(pScanInfoPkt, +- &pwrctl->pscan_info->ssid_channel_info[i], 4); +- *pLength+=4; +- pScanInfoPkt += 4; +- } +-} +-#endif +- +-#ifdef CONFIG_GTK_OL +-static void ConstructGTKResponse( +- PADAPTER padapter, +- u8 *pframe, +- u32 *pLength +- ) +-{ +- struct rtw_ieee80211_hdr *pwlanhdr; +- u16 *fctrl; +- u32 pktlen; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct wlan_network *cur_network = &pmlmepriv->cur_network; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- static u8 LLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x88, 0x8E}; +- static u8 GTKbody_a[11] ={0x01, 0x03, 0x00, 0x5F, 0x02, 0x03, 0x12, 0x00, 0x10, 0x42, 0x0B}; +- u8 *pGTKRspPkt = pframe; +- u8 EncryptionHeadOverhead = 0; +- //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); +- +- pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; +- +- fctrl = &pwlanhdr->frame_ctl; +- *(fctrl) = 0; +- +- //------------------------------------------------------------------------- +- // MAC Header. +- //------------------------------------------------------------------------- +- SetFrameType(fctrl, WIFI_DATA); +- //SetFrameSubType(fctrl, 0); +- SetToDs(fctrl); +- _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- +- SetSeqNum(pwlanhdr, 0); +- SetDuration(pwlanhdr, 0); +- +-#ifdef CONFIG_WAPI_SUPPORT +- *pLength = sMacHdrLng; +-#else +- *pLength = 24; +-#endif //CONFIG_WAPI_SUPPORT +- +-//YJ,del,120503 +-#if 0 +- //------------------------------------------------------------------------- +- // Qos Header: leave space for it if necessary. +- //------------------------------------------------------------------------- +- if(pStaQos->CurrentQosMode > QOS_DISABLE) +- { +- SET_80211_HDR_QOS_EN(pGTKRspPkt, 1); +- PlatformZeroMemory(&(Buffer[*pLength]), sQoSCtlLng); +- *pLength += sQoSCtlLng; +- } +-#endif //0 +- //------------------------------------------------------------------------- +- // Security Header: leave space for it if necessary. +- //------------------------------------------------------------------------- +- +-#if 1 +- switch (psecuritypriv->dot11PrivacyAlgrthm) +- { +- case _WEP40_: +- case _WEP104_: +- EncryptionHeadOverhead = 4; +- break; +- case _TKIP_: +- EncryptionHeadOverhead = 8; +- break; +- case _AES_: +- EncryptionHeadOverhead = 8; +- break; +-#ifdef CONFIG_WAPI_SUPPORT +- case _SMS4_: +- EncryptionHeadOverhead = 18; +- break; +-#endif //CONFIG_WAPI_SUPPORT +- default: +- EncryptionHeadOverhead = 0; +- } +- +- if(EncryptionHeadOverhead > 0) +- { +- _rtw_memset(&(pframe[*pLength]), 0,EncryptionHeadOverhead); +- *pLength += EncryptionHeadOverhead; +- //SET_80211_HDR_WEP(pGTKRspPkt, 1); //Suggested by CCW. +- //GTK's privacy bit is done by FW +- //SetPrivacy(fctrl); +- } +-#endif //1 +- //------------------------------------------------------------------------- +- // Frame Body. +- //------------------------------------------------------------------------- +- pGTKRspPkt = (u8*)(pframe+ *pLength); +- // LLC header +- _rtw_memcpy(pGTKRspPkt, LLCHeader, 8); +- *pLength += 8; +- +- // GTK element +- pGTKRspPkt += 8; +- +- //GTK frame body after LLC, part 1 +- _rtw_memcpy(pGTKRspPkt, GTKbody_a, 11); +- *pLength += 11; +- pGTKRspPkt += 11; +- //GTK frame body after LLC, part 2 +- _rtw_memset(&(pframe[*pLength]), 0, 88); +- *pLength += 88; +- pGTKRspPkt += 88; +- +-} +-#endif //CONFIG_GTK_OL +- +-#ifdef CONFIG_PNO_SUPPORT +-static void ConstructProbeReq(_adapter *padapter, u8 *pframe, u32 *pLength, +- pno_ssid_t *ssid) +-{ +- struct rtw_ieee80211_hdr *pwlanhdr; +- u16 *fctrl; +- u32 pktlen; +- unsigned char *mac; +- unsigned char bssrate[NumRates]; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- int bssrate_len = 0; +- u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; +- +- pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; +- mac = myid(&(padapter->eeprompriv)); +- +- fctrl = &(pwlanhdr->frame_ctl); +- *(fctrl) = 0; +- +- _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN); +- +- _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); +- +- SetSeqNum(pwlanhdr, 0); +- SetFrameSubType(pframe, WIFI_PROBEREQ); +- +- pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); +- pframe += pktlen; +- +- if (ssid == NULL) { +- pframe = rtw_set_ie(pframe, _SSID_IE_, 0, NULL, &pktlen); +- } else { +- pframe = rtw_set_ie(pframe, _SSID_IE_, ssid->SSID_len, ssid->SSID, &pktlen); +- } +- +- get_rate_set(padapter, bssrate, &bssrate_len); +- +- if (bssrate_len > 8) +- { +- pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &pktlen); +- pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &pktlen); +- } +- else +- { +- pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &pktlen); +- } +- +- *pLength = pktlen; +-} +-#endif //CONFIG_PNO_SUPPORT +-#endif //CONFIG_WOWLAN +- +-static void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID) +-{ +- struct rtw_ieee80211_hdr *pwlanhdr; +- u16 *fctrl; +- u8 *mac, *bssid; +- u32 pktlen; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); +-#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) +- u8 *pwps_ie; +- uint wps_ielen; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +-#endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) +-#ifdef CONFIG_P2P +- struct wifidirect_info *pwdinfo = &(padapter->wdinfo); +-#ifdef CONFIG_WFD +- u32 wfdielen = 0; +-#endif //CONFIG_WFD +-#endif //CONFIG_P2P +- +- +- //DBG_871X("%s\n", __FUNCTION__); +- +- pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; +- +- mac = myid(&(padapter->eeprompriv)); +- bssid = cur_network->MacAddress; +- +- fctrl = &(pwlanhdr->frame_ctl); +- *(fctrl) = 0; +- _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); +- +- DBG_871X("%s FW Mac Addr:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(mac)); +- DBG_871X("%s FW IP Addr" IP_FMT "\n", __FUNCTION__, IP_ARG(StaAddr)); +- +- SetSeqNum(pwlanhdr, 0); +- SetFrameSubType(fctrl, WIFI_PROBERSP); +- +- pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); +- pframe += pktlen; +- +- if(cur_network->IELength>MAX_IE_SZ) +- return; +- +- pwps_ie = rtw_get_wps_ie(cur_network->IEs+_FIXED_IE_LENGTH_, +- cur_network->IELength-_FIXED_IE_LENGTH_, NULL, &wps_ielen); +- +- //inerset & update wps_probe_resp_ie +- if ((pmlmepriv->wps_probe_resp_ie!=NULL) && pwps_ie && (wps_ielen>0)) { +- uint wps_offset, remainder_ielen; +- u8 *premainder_ie; +- +- wps_offset = (uint)(pwps_ie - cur_network->IEs); +- +- premainder_ie = pwps_ie + wps_ielen; +- +- remainder_ielen = cur_network->IELength - wps_offset - wps_ielen; +- +- _rtw_memcpy(pframe, cur_network->IEs, wps_offset); +- pframe += wps_offset; +- pktlen += wps_offset; +- +- wps_ielen = (uint)pmlmepriv->wps_probe_resp_ie[1];//to get ie data len +- if ((wps_offset+wps_ielen+2)<=MAX_IE_SZ) { +- _rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, wps_ielen+2); +- pframe += wps_ielen+2; +- pktlen += wps_ielen+2; +- } +- +- if ((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) { +- _rtw_memcpy(pframe, premainder_ie, remainder_ielen); +- pframe += remainder_ielen; +- pktlen += remainder_ielen; +- } +- } else { +- _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); +- pframe += cur_network->IELength; +- pktlen += cur_network->IELength; +- } +- +- /* retrieve SSID IE from cur_network->Ssid */ +- { +- u8 *ssid_ie; +- sint ssid_ielen; +- sint ssid_ielen_diff; +- u8 buf[MAX_IE_SZ]; +- u8 *ies = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); +- +- ssid_ie = rtw_get_ie(ies+_FIXED_IE_LENGTH_, _SSID_IE_, &ssid_ielen, +- (pframe-ies)-_FIXED_IE_LENGTH_); +- +- ssid_ielen_diff = cur_network->Ssid.SsidLength - ssid_ielen; +- +- if (ssid_ie && cur_network->Ssid.SsidLength) { +- uint remainder_ielen; +- u8 *remainder_ie; +- remainder_ie = ssid_ie+2; +- remainder_ielen = (pframe-remainder_ie); +- +- if (remainder_ielen > MAX_IE_SZ) { +- DBG_871X_LEVEL(_drv_warning_, FUNC_ADPT_FMT" remainder_ielen > MAX_IE_SZ\n", FUNC_ADPT_ARG(padapter)); +- remainder_ielen = MAX_IE_SZ; +- } +- +- _rtw_memcpy(buf, remainder_ie, remainder_ielen); +- _rtw_memcpy(remainder_ie+ssid_ielen_diff, buf, remainder_ielen); +- *(ssid_ie+1) = cur_network->Ssid.SsidLength; +- _rtw_memcpy(ssid_ie+2, cur_network->Ssid.Ssid, cur_network->Ssid.SsidLength); +- pframe += ssid_ielen_diff; +- pktlen += ssid_ielen_diff; +- } +- } +- +-#ifdef CONFIG_P2P +- if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) /*&& is_valid_p2p_probereq*/) +- { +- u32 len; +-#ifdef CONFIG_IOCTL_CFG80211 +- if(adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) +- { +- //if pwdinfo->role == P2P_ROLE_DEVICE will call issue_probersp_p2p() +- len = pmlmepriv->p2p_go_probe_resp_ie_len; +- if(pmlmepriv->p2p_go_probe_resp_ie && len>0) +- _rtw_memcpy(pframe, pmlmepriv->p2p_go_probe_resp_ie, len); +- } +- else +-#endif //CONFIG_IOCTL_CFG80211 +- { +- len = build_probe_resp_p2p_ie(pwdinfo, pframe); +- } +- +- pframe += len; +- pktlen += len; +- +-#ifdef CONFIG_WFD +-#ifdef CONFIG_IOCTL_CFG80211 +- if(_TRUE == pwdinfo->wfd_info->wfd_enable) +-#endif //CONFIG_IOCTL_CFG80211 +- { +- len = build_probe_resp_wfd_ie(pwdinfo, pframe, 0); +- } +-#ifdef CONFIG_IOCTL_CFG80211 +- else +- { +- len = 0; +- if(pmlmepriv->wfd_probe_resp_ie && pmlmepriv->wfd_probe_resp_ie_len>0) +- { +- len = pmlmepriv->wfd_probe_resp_ie_len; +- _rtw_memcpy(pframe, pmlmepriv->wfd_probe_resp_ie, len); +- } +- } +-#endif //CONFIG_IOCTL_CFG80211 +- pframe += len; +- pktlen += len; +-#endif //CONFIG_WFD +- +- } +-#endif //CONFIG_P2P +- +- *pLength = pktlen; +- +-} +- + // To check if reserved page content is destroyed by beacon beacuse beacon is too large. + // 2010.06.23. Added by tynli. + VOID +@@ -1104,60 +453,7 @@ static void rtl8723b_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsv + #endif // CONFIG_WOWLAN + } + +-#ifdef CONFIG_AP_WOWLAN +-static void rtl8723b_set_ap_wow_rsvdpage_cmd(PADAPTER padapter, +- PRSVDPAGE_LOC rsvdpageloc) +-{ +- struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- u8 res = 0, count = 0, header = 0; +- u8 rsvdparm[H2C_AOAC_RSVDPAGE_LOC_LEN]={0}; +- +- header = rtw_read8(padapter, REG_BCNQ_BDNY); +- +- DBG_871X("%s: beacon: %d, probeRsp: %d, header:0x%02x\n", __func__, +- rsvdpageloc->LocApOffloadBCN, +- rsvdpageloc->LocProbeRsp, +- header); +- +- SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_BCN(rsvdparm, +- rsvdpageloc->LocApOffloadBCN + header); +- +- FillH2CCmd8723B(padapter, H2C_8723B_BCN_RSVDPAGE, +- H2C_BCN_RSVDPAGE_LEN, rsvdparm); +- +- rtw_msleep_os(10); +- +- _rtw_memset(&rsvdparm, 0, sizeof(rsvdparm)); +- +- SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_ProbeRsp( +- rsvdparm, +- rsvdpageloc->LocProbeRsp + header); +- +- FillH2CCmd8723B(padapter, H2C_8723B_PROBERSP_RSVDPAGE, +- H2C_PROBERSP_RSVDPAGE_LEN, rsvdparm); +- +- rtw_msleep_os(10); +-} +-#endif //CONFIG_AP_WOWLAN +- +-void rtl8723b_set_FwMediaStatusRpt_cmd(PADAPTER padapter, u8 mstatus, u8 macid) +-{ +- u8 u1H2CMediaStatusRptParm[H2C_MEDIA_STATUS_RPT_LEN]={0}; +- u8 macid_end = 0; +- +- DBG_871X("%s(): mstatus = %d macid=%d\n", __func__, mstatus, macid); +- +- SET_8723B_H2CCMD_MSRRPT_PARM_OPMODE(u1H2CMediaStatusRptParm, mstatus); +- SET_8723B_H2CCMD_MSRRPT_PARM_MACID_IND(u1H2CMediaStatusRptParm, 0); +- SET_8723B_H2CCMD_MSRRPT_PARM_MACID(u1H2CMediaStatusRptParm, macid); +- SET_8723B_H2CCMD_MSRRPT_PARM_MACID_END(u1H2CMediaStatusRptParm, macid_end); +- +- RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CMediaStatusRptParm:", u1H2CMediaStatusRptParm, H2C_MEDIA_STATUS_RPT_LEN); +- FillH2CCmd8723B(padapter, H2C_8723B_MEDIA_STATUS_RPT, H2C_MEDIA_STATUS_RPT_LEN, u1H2CMediaStatusRptParm); +-} +- +-static void rtl8723b_set_FwKeepAlive_cmd(PADAPTER padapter, u8 benable, u8 pkt_type) ++static void rtl8723b_set_FwKeepAlive_cmd(PADAPTER padapter, u8 benable, u8 pkt_type) + { + u8 u1H2CKeepAliveParm[H2C_KEEP_ALIVE_CTRL_LEN]={0}; + u8 adopt = 1; +@@ -1282,12 +578,6 @@ void rtl8723b_set_FwPwrMode_cmd(PADAPTER padapter, u8 psmode) + + _func_enter_; + +-#ifdef CONFIG_PLATFORM_INTEL_BYT +- if(psmode == PS_MODE_DTIM) +- psmode = PS_MODE_MAX; +-#endif //CONFIG_PLATFORM_INTEL_BYT +- +- + if(pwrpriv->dtim > 0) + DBG_871X("%s(): FW LPS mode = %d, SmartPS=%d, dtim=%d\n", __func__, psmode, pwrpriv->smart_ps, pwrpriv->dtim); + else +@@ -1448,6 +738,25 @@ _func_enter_; + _func_exit_; + } + ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++void rtl8723b_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable) ++{ ++ u8 u1H2CSetPwrMode[H2C_PWRMODE_LEN] = {0}; ++ ++ SET_8723B_H2CCMD_PWRMODE_PARM_MODE(u1H2CSetPwrMode, 1); ++ SET_8723B_H2CCMD_PWRMODE_PARM_RLBM(u1H2CSetPwrMode, 1); ++ SET_8723B_H2CCMD_PWRMODE_PARM_SMART_PS(u1H2CSetPwrMode, 0); ++ SET_8723B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1H2CSetPwrMode, 0); ++ SET_8723B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(u1H2CSetPwrMode, 0); ++ SET_8723B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(u1H2CSetPwrMode, enable); ++ SET_8723B_H2CCMD_PWRMODE_PARM_PWR_STATE(u1H2CSetPwrMode, 0x0C); ++ SET_8723B_H2CCMD_PWRMODE_PARM_BYTE5(u1H2CSetPwrMode, 0); ++ FillH2CCmd8723B(padapter, H2C_8723B_SET_PWR_MODE, sizeof(u1H2CSetPwrMode), u1H2CSetPwrMode); ++} ++#endif ++#endif ++ + void rtl8723b_set_FwPsTuneParam_cmd(PADAPTER padapter) + { + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); +@@ -1474,7 +783,7 @@ _func_exit_; + + void rtl8723b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param) + { +- u8 u1H2CBtMpOperParm[H2C_BTMP_OPER_LEN+1]={0}; ++ u8 u1H2CBtMpOperParm[H2C_BTMP_OPER_LEN] = {0}; + + _func_enter_; + +@@ -1489,7 +798,7 @@ _func_enter_; + + RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CBtMpOperParm:", u1H2CBtMpOperParm, H2C_BTMP_OPER_LEN); + +- FillH2CCmd8723B(padapter, H2C_8723B_BT_MP_OPER, H2C_BTMP_OPER_LEN+1, u1H2CBtMpOperParm); ++ FillH2CCmd8723B(padapter, H2C_8723B_BT_MP_OPER, H2C_BTMP_OPER_LEN, u1H2CBtMpOperParm); + _func_exit_; + } + +@@ -1499,263 +808,10 @@ void rtl8723b_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param) + + DBG_871X("%s()\n", __func__); + +- cmd_param = cmd_param; +- + FillH2CCmd8723B(padapter, H2C_8723B_FWLPS_IN_IPS_, 1, &cmd_param); + + } + +-#ifdef CONFIG_WOWLAN +-static void rtl8723b_set_FwRemoteWakeCtrl_Cmd(PADAPTER padapter, u8 benable) +-{ +- u8 u1H2CRemoteWakeCtrlParm[H2C_REMOTE_WAKE_CTRL_LEN]={0}; +- struct security_priv* psecuritypriv=&(padapter->securitypriv); +- struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(padapter); +- u8 res = 0, count = 0; +- +- DBG_871X("%s(): Enable=%d\n", __func__, benable); +- +- if (!ppwrpriv->wowlan_pno_enable) { +- SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(u1H2CRemoteWakeCtrlParm, benable); +- SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(u1H2CRemoteWakeCtrlParm, 1); +-#ifdef CONFIG_GTK_OL +- if (psecuritypriv->binstallKCK_KEK == _TRUE && +- psecuritypriv->dot11PrivacyAlgrthm == _AES_) { +- SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(u1H2CRemoteWakeCtrlParm, 1); +- } else { +- DBG_871X("no kck or security is not AES\n"); +- SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(u1H2CRemoteWakeCtrlParm, 0); +- } +-#endif //CONFIG_GTK_OL +- +- SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(u1H2CRemoteWakeCtrlParm, 1); +- +- if ((psecuritypriv->dot11PrivacyAlgrthm == _AES_) || +- (psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_)) +- { +- SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(u1H2CRemoteWakeCtrlParm, 0); +- } else { +- SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(u1H2CRemoteWakeCtrlParm, 1); +- } +- } +-#ifdef CONFIG_PNO_SUPPORT +- else { +- SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(u1H2CRemoteWakeCtrlParm, benable); +- SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(u1H2CRemoteWakeCtrlParm, benable); +- } +-#endif +-exit: +- RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CRemoteWakeCtrlParm:", u1H2CRemoteWakeCtrlParm, H2C_REMOTE_WAKE_CTRL_LEN); +- FillH2CCmd8723B(padapter, H2C_8723B_REMOTE_WAKE_CTRL, +- H2C_REMOTE_WAKE_CTRL_LEN, u1H2CRemoteWakeCtrlParm); +-#ifdef CONFIG_PNO_SUPPORT +- if (ppwrpriv->wowlan_pno_enable && ppwrpriv->pno_in_resume == _FALSE) { +- res = rtw_read8(padapter, REG_PNO_STATUS); +- DBG_871X("cmd: 0x81 REG_PNO_STATUS: 0x%02x\n", res); +- while(!(res&BIT(7)) && count < 25) { +- DBG_871X("[%d] cmd: 0x81 REG_PNO_STATUS: 0x%02x\n", count, res); +- res = rtw_read8(padapter, REG_PNO_STATUS); +- count++; +- rtw_msleep_os(2); +- } +- DBG_871X("cmd: 0x81 REG_PNO_STATUS: 0x%02x\n", res); +- } +-#endif //CONFIG_PNO_SUPPORT +-} +- +-static void rtl8723b_set_FwAOACGlobalInfo_Cmd(PADAPTER padapter, u8 group_alg, u8 pairwise_alg) +-{ +- u8 u1H2CAOACGlobalInfoParm[H2C_AOAC_GLOBAL_INFO_LEN]={0}; +- +- DBG_871X("%s(): group_alg=%d pairwise_alg=%d\n", __func__, group_alg, pairwise_alg); +- +- SET_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(u1H2CAOACGlobalInfoParm, pairwise_alg); +- SET_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(u1H2CAOACGlobalInfoParm, group_alg); +- +- RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CAOACGlobalInfoParm:", u1H2CAOACGlobalInfoParm, H2C_AOAC_GLOBAL_INFO_LEN); +- +- FillH2CCmd8723B(padapter, H2C_8723B_AOAC_GLOBAL_INFO, H2C_AOAC_GLOBAL_INFO_LEN, u1H2CAOACGlobalInfoParm); +-} +- +-#ifdef CONFIG_PNO_SUPPORT +-static void rtl8723b_set_FwScanOffloadInfo_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc, u8 enable) +-{ +- u8 u1H2CScanOffloadInfoParm[H2C_SCAN_OFFLOAD_CTRL_LEN]={0}; +- u8 res = 0, count = 0; +- struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); +- +- DBG_871X("%s: loc_probe_packet:%d, loc_scan_info: %d loc_ssid_info:%d\n", +- __func__, rsvdpageloc->LocProbePacket, rsvdpageloc->LocScanInfo, rsvdpageloc->LocSSIDInfo); +- +- SET_H2CCMD_AOAC_NLO_FUN_EN(u1H2CScanOffloadInfoParm, enable); +- SET_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(u1H2CScanOffloadInfoParm, rsvdpageloc->LocScanInfo); +- SET_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(u1H2CScanOffloadInfoParm, rsvdpageloc->LocProbePacket); +- SET_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(u1H2CScanOffloadInfoParm, rsvdpageloc->LocSSIDInfo); +- +- RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CScanOffloadInfoParm:", u1H2CScanOffloadInfoParm, H2C_SCAN_OFFLOAD_CTRL_LEN); +- FillH2CCmd8723B(padapter, H2C_8723B_D0_SCAN_OFFLOAD_INFO, H2C_SCAN_OFFLOAD_CTRL_LEN, u1H2CScanOffloadInfoParm); +- +- rtw_msleep_os(20); +-} +-#endif //CONFIG_PNO_SUPPORT +- +-static void rtl8723b_set_FwWoWlanRelated_cmd(_adapter* padapter, u8 enable) +-{ +- struct security_priv *psecpriv = &padapter->securitypriv; +- struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(padapter); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct sta_info *psta = NULL; +- u8 pkt_type = 0; +- +- DBG_871X_LEVEL(_drv_always_, "+%s()+: enable=%d\n", __func__, enable); +-_func_enter_; +- if(enable) +- { +- rtl8723b_set_FwAOACGlobalInfo_Cmd(padapter, psecpriv->dot118021XGrpPrivacy, psecpriv->dot11PrivacyAlgrthm); +- +- rtl8723b_set_FwJoinBssRpt_cmd(padapter, RT_MEDIA_CONNECT); //RT_MEDIA_CONNECT will confuse in the future +- +- if(!(ppwrpriv->wowlan_pno_enable)) +- { +- psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(pmlmepriv)); +- if (psta != NULL) +- rtl8723b_set_FwMediaStatusRpt_cmd(padapter, RT_MEDIA_CONNECT, psta->mac_id); +- } +- else +- DBG_871X("%s(): Disconnected, no FwMediaStatusRpt CONNECT\n",__FUNCTION__); +- +- rtw_msleep_os(2); +- +- if(!(ppwrpriv->wowlan_pno_enable)) { +- rtl8723b_set_FwDisconDecision_cmd(padapter, enable); +- rtw_msleep_os(2); +- +- if ((psecpriv->dot11PrivacyAlgrthm != _WEP40_) || (psecpriv->dot11PrivacyAlgrthm != _WEP104_)) +- pkt_type = 1; +- rtl8723b_set_FwKeepAlive_cmd(padapter, enable, pkt_type); +- rtw_msleep_os(2); +- } +- +- rtw_hal_set_wowlan_ctrl_cmd(padapter, enable); +- rtw_msleep_os(2); +- +- rtl8723b_set_FwRemoteWakeCtrl_Cmd(padapter, enable); +- } +- else +- { +-#if 0 +- { +- u32 PageSize = 0; +- rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize); +- dump_TX_FIFO(padapter, 4, PageSize); +- } +-#endif +- rtl8723b_set_FwRemoteWakeCtrl_Cmd(padapter, enable); +- rtw_msleep_os(2); +- rtw_hal_set_wowlan_ctrl_cmd(padapter, enable); +- } +- +-_func_exit_; +- DBG_871X_LEVEL(_drv_always_, "-%s()-\n", __func__); +- return ; +-} +- +-void rtl8723b_set_wowlan_cmd(_adapter* padapter, u8 enable) +-{ +- rtl8723b_set_FwWoWlanRelated_cmd(padapter, enable); +-} +-#endif //CONFIG_WOWLAN +- +-#ifdef CONFIG_AP_WOWLAN +-static void rtl8723b_set_FwAPWoWlanCtrl_Cmd(PADAPTER padapter, u8 bFuncEn) +-{ +- u8 u1H2CAPWoWlanCtrlParm[H2C_WOWLAN_LEN]={0}; +- u8 discont_wake = 1, gpionum = 0, gpio_dur = 0; +- u8 gpio_high_active = 1; //0: low active, 1: high active +- u8 gpio_pulse = bFuncEn; +-#ifdef CONFIG_GPIO_WAKEUP +- gpionum = WAKEUP_GPIO_IDX; +-#endif +- +- DBG_871X("%s(): bFuncEn=%d\n", __func__, bFuncEn); +- +- if (bFuncEn) +- gpio_dur = 16; +- else +- gpio_dur = 0; +- +- SET_H2CCMD_AP_WOW_GPIO_CTRL_INDEX(u1H2CAPWoWlanCtrlParm, +- gpionum); +- SET_H2CCMD_AP_WOW_GPIO_CTRL_PLUS(u1H2CAPWoWlanCtrlParm, +- gpio_pulse); +- SET_H2CCMD_AP_WOW_GPIO_CTRL_HIGH_ACTIVE(u1H2CAPWoWlanCtrlParm, +- gpio_high_active); +- SET_H2CCMD_AP_WOW_GPIO_CTRL_EN(u1H2CAPWoWlanCtrlParm, +- bFuncEn); +- SET_H2CCMD_AP_WOW_GPIO_CTRL_DURATION(u1H2CAPWoWlanCtrlParm, +- gpio_dur); +- +- FillH2CCmd8723B(padapter, H2C_8723B_AP_WOW_GPIO_CTRL, +- H2C_AP_WOW_GPIO_CTRL_LEN, u1H2CAPWoWlanCtrlParm); +-} +- +-static void rtl8723b_set_Fw_AP_Offload_Cmd(PADAPTER padapter, u8 bFuncEn) +-{ +- u8 u1H2CAPOffloadCtrlParm[H2C_WOWLAN_LEN]={0}; +- +- DBG_871X("%s(): bFuncEn=%d\n", __func__, bFuncEn); +- +- SET_H2CCMD_AP_WOWLAN_EN(u1H2CAPOffloadCtrlParm, bFuncEn); +- +- FillH2CCmd8723B(padapter, H2C_8723B_AP_OFFLOAD, +- H2C_AP_OFFLOAD_LEN, u1H2CAPOffloadCtrlParm); +-} +- +-static void rtl8723b_set_AP_FwWoWlan_cmd(_adapter* padapter, u8 enable) +-{ +- struct security_priv *psecpriv = &padapter->securitypriv; +- struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(padapter); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct sta_info *psta = NULL; +- u8 pkt_type = 0; +- u8 res = 0; +- +- DBG_871X_LEVEL(_drv_always_, "+%s()+: enable=%d\n", __func__, enable); +-_func_enter_; +- if (enable) { +-#ifdef CONFIG_CONCURRENT_MODE +- if (rtw_buddy_adapter_up(padapter) == _TRUE && +- check_buddy_fwstate(padapter, WIFI_AP_STATE) == _TRUE) { +- rtl8723b_set_FwJoinBssRpt_cmd(padapter->pbuddy_adapter, RT_MEDIA_CONNECT); +- issue_beacon(padapter->pbuddy_adapter, 0); +- } else { +- rtl8723b_set_FwJoinBssRpt_cmd(padapter, RT_MEDIA_CONNECT); +- issue_beacon(padapter, 0); +- } +-#else +- rtl8723b_set_FwJoinBssRpt_cmd(padapter, RT_MEDIA_CONNECT); +- issue_beacon(padapter, 0); +-#endif +- } +-#if 0 +- else +- +- dump_TX_FIFO(padapter); +-#endif +- rtl8723b_set_FwAPWoWlanCtrl_Cmd(padapter, enable); +- rtw_msleep_os(10); +- rtl8723b_set_Fw_AP_Offload_Cmd(padapter, enable); +- rtw_msleep_os(10); +-_func_exit_; +- DBG_871X_LEVEL(_drv_always_, "-%s()-\n", __func__); +- return ; +-} +- +-void rtl8723b_set_ap_wowlan_cmd(_adapter* padapter, u8 enable) +-{ +- rtl8723b_set_AP_FwWoWlan_cmd(padapter, enable); +-} +-#endif //CONFIG_AP_WOWLAN + + static s32 rtl8723b_set_FwLowPwrLps_cmd(PADAPTER padapter, u8 enable) + { +@@ -1763,635 +819,6 @@ static s32 rtl8723b_set_FwLowPwrLps_cmd(PADAPTER padapter, u8 enable) + return _FALSE; + } + +-// +-// Description: Fill the reserved packets that FW will use to RSVD page. +-// Now we just send 4 types packet to rsvd page. +-// (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. +-// Input: +-// bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw, +-// so we need to set the packet length to total lengh. +-// TRUE: At the second time, we should send the first packet (default:beacon) +-// to Hw again and set the lengh in descriptor to the real beacon lengh. +-// 2009.10.15 by tynli. +-static void rtl8723b_set_FwRsvdPagePkt(PADAPTER padapter, BOOLEAN bDLFinished) +-{ +- PHAL_DATA_TYPE pHalData; +- struct xmit_frame *pcmdframe; +- struct pkt_attrib *pattrib; +- struct xmit_priv *pxmitpriv; +- struct mlme_ext_priv *pmlmeext; +- struct mlme_ext_info *pmlmeinfo; +- struct pwrctrl_priv *pwrctl; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- u32 BeaconLength=0, ProbeRspLength=0, PSPollLength=0; +- u32 NullDataLength=0, QosNullLength=0, BTQosNullLength=0; +- u32 ProbeReqLength=0; +- u8 *ReservedPagePacket; +- u8 TxDescLen = TXDESC_SIZE, TxDescOffset = TXDESC_OFFSET; +- u8 TotalPageNum=0, CurtPktPageNum=0, RsvdPageNum=0; +- u16 BufIndex, PageSize = 128; +- u32 TotalPacketLen, MaxRsvdPageBufSize=0; +- RSVDPAGE_LOC RsvdPageLoc; +-#ifdef CONFIG_WOWLAN +- u32 ARPLegnth = 0, GTKLegnth = 0, PNOLength = 0, ScanInfoLength = 0; +- u32 SSIDLegnth = 0; +- struct security_priv *psecuritypriv = &padapter->securitypriv; //added by xx +- u8 currentip[4]; +- u8 cur_dot11txpn[8]; +-#ifdef CONFIG_GTK_OL +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct sta_info * psta; +- u8 kek[RTW_KEK_LEN]; +- u8 kck[RTW_KCK_LEN]; +-#endif +-#ifdef CONFIG_PNO_SUPPORT +- int index; +- u8 ssid_num; +-#endif //CONFIG_PNO_SUPPORT +-#endif +-#ifdef DBG_CONFIG_ERROR_DETECT +- struct sreset_priv *psrtpriv; +-#endif // DBG_CONFIG_ERROR_DETECT +- +- //DBG_871X("%s---->\n", __FUNCTION__); +- +- pHalData = GET_HAL_DATA(padapter); +-#ifdef DBG_CONFIG_ERROR_DETECT +- psrtpriv = &pHalData->srestpriv; +-#endif +- pxmitpriv = &padapter->xmitpriv; +- pmlmeext = &padapter->mlmeextpriv; +- pmlmeinfo = &pmlmeext->mlmext_info; +- pwrctl = adapter_to_pwrctl(padapter); +- +- RsvdPageNum = BCNQ_PAGE_NUM_8723B + WOWLAN_PAGE_NUM_8723B; +- MaxRsvdPageBufSize = RsvdPageNum*PageSize; +- +- pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv); +- if (pcmdframe == NULL) { +- DBG_871X("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); +- return; +- } +- +- ReservedPagePacket = pcmdframe->buf_addr; +- _rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC)); +- +- //3 (1) beacon +- BufIndex = TxDescOffset; +- ConstructBeacon(padapter, &ReservedPagePacket[BufIndex], &BeaconLength); +- +- // When we count the first page size, we need to reserve description size for the RSVD +- // packet, it will be filled in front of the packet in TXPKTBUF. +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + BeaconLength); +- //If we don't add 1 more page, the WOWLAN function has a problem. Baron thinks it's a bug of firmware +- if (CurtPktPageNum == 1) +- { +- CurtPktPageNum += 1; +- } +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +- //3 (2) ps-poll +- RsvdPageLoc.LocPsPoll = TotalPageNum; +- ConstructPSPoll(padapter, &ReservedPagePacket[BufIndex], &PSPollLength); +- rtl8723b_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE, _FALSE, _FALSE); +- +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: PS-POLL %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (PSPollLength+TxDescLen)); +- +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + PSPollLength); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +- //3 (3) null data +- RsvdPageLoc.LocNullData = TotalPageNum; +- ConstructNullFunctionData( +- padapter, +- &ReservedPagePacket[BufIndex], +- &NullDataLength, +- get_my_bssid(&pmlmeinfo->network), +- _FALSE, 0, 0, _FALSE); +- rtl8723b_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], NullDataLength, _FALSE, _FALSE, _FALSE); +- +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: NULL DATA %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (NullDataLength+TxDescLen)); +- +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + NullDataLength); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +-#if 0 +- //3 (4) probe response +- RsvdPageLoc.LocProbeRsp = TotalPageNum; +- ConstructProbeRsp( +- padapter, +- &ReservedPagePacket[BufIndex], +- &ProbeRspLength, +- get_my_bssid(&pmlmeinfo->network), +- _FALSE); +- rtl8723b_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE, _FALSE, _FALSE); +- +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (ProbeRspLength+TxDescLen)); +- +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + ProbeRspLength); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +-#endif +- +- //3 (5) Qos null data +- RsvdPageLoc.LocQosNull = TotalPageNum; +- ConstructNullFunctionData( +- padapter, +- &ReservedPagePacket[BufIndex], +- &QosNullLength, +- get_my_bssid(&pmlmeinfo->network), +- _TRUE, 0, 0, _FALSE); +- rtl8723b_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], QosNullLength, _FALSE, _FALSE, _FALSE); +- +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (QosNullLength+TxDescLen)); +- +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + QosNullLength); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +- //3 (6) BT Qos null data +- RsvdPageLoc.LocBTQosNull = TotalPageNum; +- ConstructNullFunctionData( +- padapter, +- &ReservedPagePacket[BufIndex], +- &BTQosNullLength, +- get_my_bssid(&pmlmeinfo->network), +- _TRUE, 0, 0, _FALSE); +- rtl8723b_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], BTQosNullLength, _FALSE, _TRUE, _FALSE); +- +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: BT QOS NULL DATA %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (BTQosNullLength+TxDescLen)); +- +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + BTQosNullLength); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +-#ifdef CONFIG_WOWLAN +- if (check_fwstate(pmlmepriv, _FW_LINKED)) { +- //if (pwrctl->wowlan_mode == _TRUE) { +- //BufIndex += (CurtPktPageNum*PageSize); +- +- //3(7) ARP RSP +- rtw_get_current_ip_address(padapter, currentip); +- RsvdPageLoc.LocArpRsp= TotalPageNum; +-#ifdef DBG_CONFIG_ERROR_DETECT +- if(psrtpriv->silent_reset_inprogress == _FALSE) +-#endif //DBG_CONFIG_ERROR_DETECT +- { +- ConstructARPResponse( +- padapter, +- &ReservedPagePacket[BufIndex], +- &ARPLegnth, +- currentip +- ); +- rtl8723b_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], ARPLegnth, _FALSE, _FALSE, _TRUE); +- +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: ARP RSP %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (ARPLegnth+TxDescLen)); +- +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + ARPLegnth); +- } +-#ifdef DBG_CONFIG_ERROR_DETECT +- else +- CurtPktPageNum = (u8)PageNum_128(128); +-#endif //DBG_CONFIG_ERROR_DETECT +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +- //3(8) SEC IV +- rtw_get_sec_iv(padapter, cur_dot11txpn, get_my_bssid(&pmlmeinfo->network)); +- RsvdPageLoc.LocRemoteCtrlInfo = TotalPageNum; +- _rtw_memcpy(ReservedPagePacket+BufIndex-TxDescLen, cur_dot11txpn, _AES_IV_LEN_); +- +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: SEC IV %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], _AES_IV_LEN_); +- +- CurtPktPageNum = (u8)PageNum_128(_AES_IV_LEN_); +- +- TotalPageNum += CurtPktPageNum; +- +-#ifdef CONFIG_GTK_OL +- BufIndex += (CurtPktPageNum*PageSize); +- +- //if the ap staion info. exists, get the kek, kck from staion info. +- psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); +- if (psta == NULL) +- { +- _rtw_memset(kek, 0, RTW_KEK_LEN); +- _rtw_memset(kck, 0, RTW_KCK_LEN); +- DBG_8192C("%s, KEK, KCK download rsvd page all zero \n", __func__); +- } +- else +- { +- _rtw_memcpy(kek, psta->kek, RTW_KEK_LEN); +- _rtw_memcpy(kck, psta->kck, RTW_KCK_LEN); +- } +- +- //3(9) KEK, KCK +- RsvdPageLoc.LocGTKInfo = TotalPageNum; +- _rtw_memcpy(ReservedPagePacket+BufIndex-TxDescLen, kck, RTW_KCK_LEN); +- _rtw_memcpy(ReservedPagePacket+BufIndex-TxDescLen+RTW_KCK_LEN, kek, RTW_KEK_LEN); +- +-#if 0 +- { +- int i; +- printk("\ntoFW KCK: "); +- for(i=0;i<16; i++) +- printk(" %02x ", kck[i]); +- printk("\ntoFW KEK: "); +- for(i=0;i<16; i++) +- printk(" %02x ", kek[i]); +- printk("\n"); +- } +-#endif +- +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: KEK KCK %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (TxDescLen + RTW_KCK_LEN + RTW_KEK_LEN)); +- +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + RTW_KCK_LEN + RTW_KEK_LEN); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +- //3(10) GTK Response +- RsvdPageLoc.LocGTKRsp= TotalPageNum; +- ConstructGTKResponse( +- padapter, +- &ReservedPagePacket[BufIndex], +- >KLegnth +- ); +- +- rtl8723b_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], GTKLegnth, _FALSE, _FALSE, _TRUE); +-#if 0 +- { +- int gj; +- printk("123GTK pkt=> \n"); +- for(gj=0; gj < GTKLegnth+TxDescLen; gj++) { +- printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen+gj]); +- if ((gj + 1)%16==0) +- printk("\n"); +- } +- printk(" <=end\n"); +- } +-#endif +- +- //DBG_871X("%s(): HW_VAR_SET_TX_CMD: GTK RSP %p %d\n", +- // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (TxDescLen + GTKLegnth)); +- +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + GTKLegnth); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +- //below page is empty for GTK extension memory +- //3(11) GTK EXT MEM +- RsvdPageLoc.LocGTKEXTMEM= TotalPageNum; +- +- CurtPktPageNum = 2; +- +- TotalPageNum += CurtPktPageNum; +- +- TotalPacketLen = BufIndex-TxDescLen + 256; //extension memory for FW +-#else +- TotalPacketLen = BufIndex-TxDescLen + sizeof (union pn48); //IV len +-#endif //CONFIG_GTK_OL +- } else +-#endif //CONFIG_WOWLAN +- { +-#ifdef CONFIG_PNO_SUPPORT +- if (pwrctl->pno_in_resume == _FALSE && pwrctl->pno_inited == _TRUE) { +- +- //Broadcast Probe Request +- RsvdPageLoc.LocProbePacket = TotalPageNum; +- +- ConstructProbeReq( +- padapter, +- &ReservedPagePacket[BufIndex], +- &ProbeReqLength, +- NULL); +- +- rtl8723b_fill_fake_txdesc(padapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- ProbeReqLength, _FALSE, _FALSE, _FALSE); +- +-#ifdef CONFIG_PNO_SET_DEBUG +- { +- int gj; +- printk("probe req pkt=> \n"); +- for(gj=0; gj < ProbeReqLength + TxDescLen; gj++) { +- printk(" %02x ",ReservedPagePacket[BufIndex- TxDescLen + gj]); +- if ((gj + 1)%8==0) +- printk("\n"); +- } +- printk(" <=end\n"); +- } +-#endif +- CurtPktPageNum = +- (u8)PageNum_128(TxDescLen + ProbeReqLength); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +- //Hidden SSID Probe Request +- ssid_num = pwrctl->pnlo_info->hidden_ssid_num; +- +- for (index = 0 ; index < ssid_num ; index++) { +- pwrctl->pnlo_info->loc_probe_req[index] = TotalPageNum; +- +- ConstructProbeReq( +- padapter, +- &ReservedPagePacket[BufIndex], +- &ProbeReqLength, +- &pwrctl->pno_ssid_list->node[index]); +- +- rtl8723b_fill_fake_txdesc(padapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- ProbeReqLength, _FALSE, _FALSE, _FALSE); +- +-#ifdef CONFIG_PNO_SET_DEBUG +- { +- int gj; +- printk("probe req pkt=> \n"); +- for(gj=0; gj < ProbeReqLength + TxDescLen; gj++) { +- printk(" %02x ", ReservedPagePacket[BufIndex- TxDescLen + gj]); +- if ((gj + 1)%8==0) +- printk("\n"); +- } +- printk(" <=end\n"); +- } +-#endif +- CurtPktPageNum = +- (u8)PageNum_128(TxDescLen + ProbeReqLength); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- } +- +- //PNO INFO Page +- RsvdPageLoc.LocPNOInfo = TotalPageNum; +- ConstructPnoInfo(padapter, &ReservedPagePacket[BufIndex -TxDescLen], &PNOLength); +-#ifdef CONFIG_PNO_SET_DEBUG +- { +- int gj; +- printk("PNO pkt=> \n"); +- for(gj=0; gj < PNOLength; gj++) { +- printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen +gj]); +- if ((gj + 1)%8==0) +- printk("\n"); +- } +- printk(" <=end\n"); +- } +-#endif +- +- CurtPktPageNum = (u8)PageNum_128(PNOLength); +- TotalPageNum += CurtPktPageNum; +- BufIndex += (CurtPktPageNum*PageSize); +- +- //SSID List Page +- RsvdPageLoc.LocSSIDInfo = TotalPageNum; +- ConstructSSIDList(padapter, &ReservedPagePacket[BufIndex-TxDescLen], &SSIDLegnth); +-#ifdef CONFIG_PNO_SET_DEBUG +- { +- int gj; +- printk("SSID list pkt=> \n"); +- for(gj=0; gj < SSIDLegnth; gj++) { +- printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen+gj]); +- if ((gj + 1)%8==0) +- printk("\n"); +- } +- printk(" <=end\n"); +- } +-#endif +- CurtPktPageNum = (u8)PageNum_128(SSIDLegnth); +- TotalPageNum += CurtPktPageNum; +- BufIndex += (CurtPktPageNum*PageSize); +- +- //Scan Info Page +- RsvdPageLoc.LocScanInfo = TotalPageNum; +- ConstructScanInfo(padapter, &ReservedPagePacket[BufIndex-TxDescLen], &ScanInfoLength); +-#ifdef CONFIG_PNO_SET_DEBUG +- { +- int gj; +- printk("Scan info pkt=> \n"); +- for(gj=0; gj < ScanInfoLength; gj++) { +- printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen+gj]); +- if ((gj + 1)%8==0) +- printk("\n"); +- } +- printk(" <=end\n"); +- } +-#endif +- CurtPktPageNum = (u8)PageNum_128(ScanInfoLength); +- TotalPageNum += CurtPktPageNum; +- BufIndex += (CurtPktPageNum*PageSize); +- +- TotalPacketLen = BufIndex + ScanInfoLength; +- } else { +- TotalPacketLen = BufIndex + BTQosNullLength; +- } +-#else //CONFIG_PNO_SUPPORT +- TotalPacketLen = BufIndex + BTQosNullLength; +-#endif +- } +- +- if(TotalPacketLen > MaxRsvdPageBufSize) +- { +- DBG_871X("%s(): ERROR: The rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n",__FUNCTION__, +- TotalPacketLen,MaxRsvdPageBufSize); +- goto error; +- } +- else +- { +- // update attribute +- pattrib = &pcmdframe->attrib; +- update_mgntframe_attrib(padapter, pattrib); +- pattrib->qsel = QSLT_BEACON; +- pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescOffset; +-#ifdef CONFIG_PCI_HCI +- dump_mgntframe(padapter, pcmdframe); +-#else +- dump_mgntframe_and_wait(padapter, pcmdframe, 100); +-#endif +- } +- +- DBG_871X("%s: Set RSVD page location to Fw ,TotalPacketLen(%d), TotalPageNum(%d)\n", __FUNCTION__,TotalPacketLen,TotalPageNum); +- if(check_fwstate(pmlmepriv, _FW_LINKED)) { +- rtl8723b_set_FwRsvdPage_cmd(padapter, &RsvdPageLoc); +- rtl8723b_set_FwAoacRsvdPage_cmd(padapter, &RsvdPageLoc); +- } else { +- rtl8723b_set_FwAoacRsvdPage_cmd(padapter, &RsvdPageLoc); +-#ifdef CONFIG_PNO_SUPPORT +- if(pwrctl->pno_in_resume) +- rtl8723b_set_FwScanOffloadInfo_cmd(padapter, +- &RsvdPageLoc, 0); +- else +- rtl8723b_set_FwScanOffloadInfo_cmd(padapter, +- &RsvdPageLoc, 1); +-#endif +- } +- return; +- +-error: +- +- rtw_free_xmitframe(pxmitpriv, pcmdframe); +-} +- +-#ifdef CONFIG_AP_WOWLAN +-// +-//Description: Fill the reserved packets that FW will use to RSVD page. +-//Now we just send 2 types packet to rsvd page. (1)Beacon, (2)ProbeRsp. +-// +-//Input: bDLFinished +-// +-//FALSE: At the first time we will send all the packets as a large packet to Hw, +-// so we need to set the packet length to total lengh. +-// +-//TRUE: At the second time, we should send the first packet (default:beacon) +-// to Hw again and set the lengh in descriptor to the real beacon lengh. +-// 2009.10.15 by tynli. +-static void rtl8723b_set_AP_FwRsvdPagePkt(PADAPTER padapter, +- BOOLEAN bDLFinished) +-{ +- PHAL_DATA_TYPE pHalData; +- struct xmit_frame *pcmdframe; +- struct pkt_attrib *pattrib; +- struct xmit_priv *pxmitpriv; +- struct mlme_ext_priv *pmlmeext; +- struct mlme_ext_info *pmlmeinfo; +- struct pwrctrl_priv *pwrctl; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- u32 BeaconLength=0, ProbeRspLength=0; +- u8 *ReservedPagePacket; +- u8 TxDescLen = TXDESC_SIZE, TxDescOffset = TXDESC_OFFSET; +- u8 TotalPageNum=0, CurtPktPageNum=0, RsvdPageNum=0; +- u8 currentip[4]; +- u16 BufIndex, PageSize = 128; +- u32 TotalPacketLen = 0, MaxRsvdPageBufSize=0; +- RSVDPAGE_LOC RsvdPageLoc; +-#ifdef DBG_CONFIG_ERROR_DETECT +- struct sreset_priv *psrtpriv; +-#endif // DBG_CONFIG_ERROR_DETECT +- +- //DBG_871X("%s---->\n", __FUNCTION__); +- DBG_8192C("+" FUNC_ADPT_FMT ": iface_type=%d\n", +- FUNC_ADPT_ARG(padapter), get_iface_type(padapter)); +- +- pHalData = GET_HAL_DATA(padapter); +-#ifdef DBG_CONFIG_ERROR_DETECT +- psrtpriv = &pHalData->srestpriv; +-#endif +- pxmitpriv = &padapter->xmitpriv; +- pmlmeext = &padapter->mlmeextpriv; +- pmlmeinfo = &pmlmeext->mlmext_info; +- pwrctl = adapter_to_pwrctl(padapter); +- +- RsvdPageNum = BCNQ_PAGE_NUM_8723B + AP_WOWLAN_PAGE_NUM_8723B; +- MaxRsvdPageBufSize = RsvdPageNum*PageSize; +- +- pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv); +- if (pcmdframe == NULL) { +- DBG_871X("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); +- return; +- } +- +- ReservedPagePacket = pcmdframe->buf_addr; +- _rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC)); +- +- //3 (1) beacon +- BufIndex = TxDescOffset; +- ConstructBeacon(padapter, &ReservedPagePacket[BufIndex], &BeaconLength); +- +- // When we count the first page size, we need to reserve description size for the RSVD +- // packet, it will be filled in front of the packet in TXPKTBUF. +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + BeaconLength); +- //If we don't add 1 more page, the WOWLAN function has a problem. Baron thinks it's a bug of firmware +- if (CurtPktPageNum == 1) +- { +- CurtPktPageNum += 1; +- } +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +- //2 (4) probe response +- RsvdPageLoc.LocProbeRsp = TotalPageNum; +- +- rtw_get_current_ip_address(padapter, currentip); +- +- ConstructProbeRsp( +- padapter, +- &ReservedPagePacket[BufIndex], +- &ProbeRspLength, +- currentip, +- _FALSE); +- rtl8723b_fill_fake_txdesc(padapter, +- &ReservedPagePacket[BufIndex-TxDescLen], +- ProbeRspLength, +- _FALSE, _FALSE, _FALSE); +- +- DBG_871X("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n", +- __func__, &ReservedPagePacket[BufIndex-TxDescLen], +- (ProbeRspLength+TxDescLen)); +- +- CurtPktPageNum = (u8)PageNum_128(TxDescLen + ProbeRspLength); +- +- TotalPageNum += CurtPktPageNum; +- +- BufIndex += (CurtPktPageNum*PageSize); +- +- TotalPacketLen = BufIndex + ProbeRspLength; +- +- if (TotalPacketLen > MaxRsvdPageBufSize) { +- DBG_871X("%s(): ERROR: The rsvd page size is not enough \ +- !!TotalPacketLen %d, MaxRsvdPageBufSize %d\n", +- __func__, TotalPacketLen,MaxRsvdPageBufSize); +- goto error; +- } else { +- // update attribute +- pattrib = &pcmdframe->attrib; +- update_mgntframe_attrib(padapter, pattrib); +- pattrib->qsel = QSLT_BEACON; +- pattrib->pktlen = TotalPacketLen - TxDescOffset; +- pattrib->last_txcmdsz = TotalPacketLen - TxDescOffset; +-#ifdef CONFIG_PCI_HCI +- dump_mgntframe(padapter, pcmdframe); +-#else +- dump_mgntframe_and_wait(padapter, pcmdframe, 100); +-#endif +- } +- +- DBG_871X("%s: Set RSVD page location to Fw ,TotalPacketLen(%d), TotalPageNum(%d)\n", __FUNCTION__,TotalPacketLen,TotalPageNum); +- rtl8723b_set_ap_wow_rsvdpage_cmd(padapter, &RsvdPageLoc); +- +- return; +-error: +- rtw_free_xmitframe(pxmitpriv, pcmdframe); +-} +-#endif //CONFIG_AP_WOWLAN +- + void rtl8723b_download_rsvd_page(PADAPTER padapter, u8 mstatus) + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +@@ -2446,15 +873,8 @@ _func_enter_; + poll = 0; + do + { +-#ifdef CONFIG_AP_WOWLAN +- if (pwrpriv->wowlan_ap_mode) +- rtl8723b_set_AP_FwRsvdPagePkt(padapter, 0); +- else +- rtl8723b_set_FwRsvdPagePkt(padapter, 0); +-#else + // download rsvd page. +- rtl8723b_set_FwRsvdPagePkt(padapter, 0); +-#endif ++ rtw_hal_set_fw_rsvd_page(padapter, 0); + DLBcnCount++; + do + { +@@ -2463,13 +883,12 @@ _func_enter_; + // check rsvd page download OK. + rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); + poll++; +- } while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); ++ } while (!bcn_valid && (poll%10) != 0 && !RTW_CANNOT_RUN(padapter)); + +- }while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); ++ } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(padapter)); + +- if(padapter->bSurpriseRemoved || padapter->bDriverStopped) +- { +- } ++ if (RTW_CANNOT_RUN(padapter)) ++ ; + else if(!bcn_valid) + DBG_871X(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n", + ADPT_ARG(padapter) ,DLBcnCount, poll); +@@ -2527,21 +946,23 @@ void rtl8723b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus) + //arg[1] = raid + //arg[2] = shortGIrate + //arg[3] = init_rate +-void rtl8723b_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8* arg, u8 rssi_level) ++void rtl8723b_Add_RateATid(PADAPTER pAdapter, u64 rate_bitmap, u8 *arg, u8 rssi_level) + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +- struct mlme_ext_priv *pmlmeext = &pAdapter->mlmeextpriv; +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct sta_info *psta; ++ struct macid_ctl_t *macid_ctl = &pAdapter->dvobj->macid_ctl; ++ struct sta_info *psta = NULL; + u8 mac_id = arg[0]; + u8 raid = arg[1]; + u8 shortGI = arg[2]; + u8 bw; ++ u32 bitmap = (u32) rate_bitmap; + u32 mask = bitmap&0x0FFFFFFF; + +- psta = pmlmeinfo->FW_sta_info[mac_id].psta; +- if(psta == NULL) +- { ++ if (mac_id < macid_ctl->num) ++ psta = macid_ctl->sta[mac_id]; ++ if (psta == NULL) { ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" macid:%u, sta is NULL\n" ++ , FUNC_ADPT_ARG(pAdapter), mac_id); + return; + } + +@@ -2589,7 +1010,7 @@ static void ConstructBtNullFunctionData( + + if (NULL == StaAddr) + { +- _rtw_memcpy(bssid, myid(&padapter->eeprompriv), ETH_ALEN); ++ _rtw_memcpy(bssid, adapter_mac_addr(padapter), ETH_ALEN); + StaAddr = bssid; + } + +@@ -2600,8 +1021,8 @@ static void ConstructBtNullFunctionData( + + SetFrDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, myid(&padapter->eeprompriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + + SetDuration(pwlanhdr, 0); + SetSeqNum(pwlanhdr, 0); +@@ -2802,8 +1223,8 @@ void rtl8723b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter) + // check rsvd page download OK. + rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, &bcn_valid); + poll++; +- } while (!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); +- } while (!bcn_valid && (DLBcnCount<=100) && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); ++ } while (!bcn_valid && (poll%10) != 0 && !RTW_CANNOT_RUN(padapter)); ++ } while (!bcn_valid && (DLBcnCount <= 100) && !RTW_CANNOT_RUN(padapter)); + + if (_TRUE == bcn_valid) + { +@@ -2816,10 +1237,10 @@ void rtl8723b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter) + { + DBG_8192C(ADPT_FMT": DL RSVD page fail! DLBcnCount:%d, poll:%d\n", + ADPT_ARG(padapter), DLBcnCount, poll); +- DBG_8192C(ADPT_FMT": DL RSVD page fail! bSurpriseRemoved=%d\n", +- ADPT_ARG(padapter), padapter->bSurpriseRemoved); +- DBG_8192C(ADPT_FMT": DL RSVD page fail! bDriverStopped=%d\n", +- ADPT_ARG(padapter), padapter->bDriverStopped); ++ DBG_8192C(ADPT_FMT": DL RSVD page fail! bSurpriseRemoved=%s\n", ++ ADPT_ARG(padapter), rtw_is_surprise_removed(padapter)?"True":"False"); ++ DBG_8192C(ADPT_FMT": DL RSVD page fail! bDriverStopped=%s\n", ++ ADPT_ARG(padapter), rtw_is_drv_stopped(padapter)?"True":"False"); + } + + // 2010.05.11. Added by tynli. +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_dm.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_dm.c +old mode 100755 +new mode 100644 +index 2224afb..73c6b9c +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_dm.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_dm.c +@@ -1,663 +1,558 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-//============================================================ +-// Description: +-// +-// This file is for 92CE/92CU dynamic mechanism only +-// +-// +-//============================================================ +-#define _RTL8723B_DM_C_ +- +-//============================================================ +-// include files +-//============================================================ +-#include +- +-//============================================================ +-// Global var +-//============================================================ +- +- +-static VOID +-dm_CheckProtection( +- IN PADAPTER Adapter +- ) +-{ +-#if 0 +- PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); +- u1Byte CurRate, RateThreshold; +- +- if(pMgntInfo->pHTInfo->bCurBW40MHz) +- RateThreshold = MGN_MCS1; +- else +- RateThreshold = MGN_MCS3; +- +- if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) +- { +- pMgntInfo->bDmDisableProtect = TRUE; +- DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); +- } +- else +- { +- pMgntInfo->bDmDisableProtect = FALSE; +- DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); +- } +-#endif +-} +- +-static VOID +-dm_CheckStatistics( +- IN PADAPTER Adapter +- ) +-{ +-#if 0 +- if(!Adapter->MgntInfo.bMediaConnect) +- return; +- +- //2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. +- rtw_hal_get_hwreg( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) ); +- +- // Calculate current Tx Rate(Successful transmited!!) +- +- // Calculate current Rx Rate(Successful received!!) +- +- //for tx tx retry count +- rtw_hal_get_hwreg( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) ); +-#endif +-} +-#ifdef CONFIG_SUPPORT_HW_WPS_PBC +-static void dm_CheckPbcGPIO(_adapter *padapter) +-{ +- u8 tmp1byte; +- u8 bPbcPressed = _FALSE; +- +- if(!padapter->registrypriv.hw_wps_pbc) +- return; +- +-#ifdef CONFIG_USB_HCI +- tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); +- tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT); +- rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode +- +- tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); +- rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level +- +- tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); +- tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); +- rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode +- +- tmp1byte =rtw_read8(padapter, GPIO_IN); +- +- if (tmp1byte == 0xff) +- return ; +- +- if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT) +- { +- bPbcPressed = _TRUE; +- } +-#else +- tmp1byte = rtw_read8(padapter, GPIO_IN); +- //RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte)); +- +- if (tmp1byte == 0xff || padapter->init_adpt_in_progress) +- return ; +- +- if((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0) +- { +- bPbcPressed = _TRUE; +- } +-#endif +- +- if( _TRUE == bPbcPressed) +- { +- // Here we only set bPbcPressed to true +- // After trigger PBC, the variable will be set to false +- DBG_8192C("CheckPbcGPIO - PBC is pressed\n"); +- rtw_request_wps_pbc_event(padapter); +- } +-} +-#endif //#ifdef CONFIG_SUPPORT_HW_WPS_PBC +- +- +-#ifdef CONFIG_PCI_HCI +-// +-// Description: +-// Perform interrupt migration dynamically to reduce CPU utilization. +-// +-// Assumption: +-// 1. Do not enable migration under WIFI test. +-// +-// Created by Roger, 2010.03.05. +-// +-VOID +-dm_InterruptMigration( +- IN PADAPTER Adapter +- ) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); +- BOOLEAN bCurrentIntMt, bCurrentACIntDisable; +- BOOLEAN IntMtToSet = _FALSE; +- BOOLEAN ACIntToSet = _FALSE; +- +- +- // Retrieve current interrupt migration and Tx four ACs IMR settings first. +- bCurrentIntMt = pHalData->bInterruptMigration; +- bCurrentACIntDisable = pHalData->bDisableTxInt; +- +- // +- // Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics +- // when interrupt migration is set before. 2010.03.05. +- // +- if(!Adapter->registrypriv.wifi_spec && +- (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && +- pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) +- { +- IntMtToSet = _TRUE; +- +- // To check whether we should disable Tx interrupt or not. +- if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic ) +- ACIntToSet = _TRUE; +- } +- +- //Update current settings. +- if( bCurrentIntMt != IntMtToSet ){ +- DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet); +- if(IntMtToSet) +- { +- // +- // Set interrrupt migration timer and corresponging Tx/Rx counter. +- // timer 25ns*0xfa0=100us for 0xf packets. +- // 2010.03.05. +- // +- rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx +- pHalData->bInterruptMigration = IntMtToSet; +- } +- else +- { +- // Reset all interrupt migration settings. +- rtw_write32(Adapter, REG_INT_MIG, 0); +- pHalData->bInterruptMigration = IntMtToSet; +- } +- } +- +- /*if( bCurrentACIntDisable != ACIntToSet ){ +- DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet); +- if(ACIntToSet) // Disable four ACs interrupts. +- { +- // +- // Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. +- // When extremely highly Rx OK occurs, we will disable Tx interrupts. +- // 2010.03.05. +- // +- UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS ); +- pHalData->bDisableTxInt = ACIntToSet; +- } +- else// Enable four ACs interrupts. +- { +- UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 ); +- pHalData->bDisableTxInt = ACIntToSet; +- } +- }*/ +- +-} +- +-#endif +- +-// +-// Initialize GPIO setting registers +-// +-static void +-dm_InitGPIOSetting( +- IN PADAPTER Adapter +- ) +-{ +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- +- u8 tmp1byte; +- +- tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); +- tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); +- +- rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); +-} +-//============================================================ +-// functions +-//============================================================ +-static void Init_ODM_ComInfo_8723b(PADAPTER Adapter) +-{ +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +- u8 cut_ver,fab_ver; +- +- Init_ODM_ComInfo(Adapter); +- +- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PACKAGE_TYPE, pHalData->PackageType); +- ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_IC_TYPE, ODM_RTL8723B); +- +- fab_ver = ODM_TSMC; +- cut_ver = ODM_CUT_A; +- +- DBG_871X("%s(): fab_ver=%d cut_ver=%d\n", __func__, fab_ver, cut_ver); +- ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver); +- ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver); +- +- #ifdef CONFIG_DISABLE_ODM +- pdmpriv->InitODMFlag = 0; +- #else +- pdmpriv->InitODMFlag = ODM_RF_CALIBRATION | +- ODM_RF_TX_PWR_TRACK //| +- ; +- //if(pHalData->AntDivCfg) +- // pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; +- #endif +- +- ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag); +-} +- +-static void Update_ODM_ComInfo_8723b(PADAPTER Adapter) +-{ +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +- +- pdmpriv->InitODMFlag = 0 +- | ODM_BB_DIG +- | ODM_BB_RA_MASK +- | ODM_BB_DYNAMIC_TXPWR +- | ODM_BB_FA_CNT +- | ODM_BB_RSSI_MONITOR +- | ODM_BB_CCK_PD +- | ODM_BB_PWR_SAVE +- | ODM_BB_CFO_TRACKING +- | ODM_MAC_EDCA_TURBO +- | ODM_RF_TX_PWR_TRACK +- | ODM_RF_CALIBRATION +- | ODM_BB_NHM_CNT +-// | ODM_BB_PWR_TRAIN +- ; +- +- if (rtw_odm_adaptivity_needed(Adapter) == _TRUE) +- pdmpriv->InitODMFlag |= ODM_BB_ADAPTIVITY; +- +-#ifdef CONFIG_ANTENNA_DIVERSITY +- if(pHalData->AntDivCfg) +- pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; +-#endif +- +-#if (MP_DRIVER==1) +- if (Adapter->registrypriv.mp_mode == 1) { +- pdmpriv->InitODMFlag = 0 +- | ODM_RF_CALIBRATION +- | ODM_RF_TX_PWR_TRACK +- ; +- } +-#endif//(MP_DRIVER==1) +- +-#ifdef CONFIG_DISABLE_ODM +- pdmpriv->InitODMFlag = 0; +-#endif//CONFIG_DISABLE_ODM +- +- ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag); +-} +- +-void +-rtl8723b_InitHalDm( +- IN PADAPTER Adapter +- ) +-{ +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +- PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); +- +- u8 i; +- +-#ifdef CONFIG_USB_HCI +- dm_InitGPIOSetting(Adapter); +-#endif +- +- pdmpriv->DM_Type = DM_Type_ByDriver; +- pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; +- +-#ifdef CONFIG_BT_COEXIST +- pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; +-#endif +- pdmpriv->InitDMFlag = pdmpriv->DMFlag; +- +- Update_ODM_ComInfo_8723b(Adapter); +- +- if (Adapter->registrypriv.mp_mode == 0) +- ODM_DMInit(pDM_Odm); +- +-} +- +-static void +-FindMinimumRSSI_8723b( +-IN PADAPTER pAdapter +- ) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +- struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; +- +- //1 1.Determine the minimum RSSI +- +- +-#ifdef CONFIG_CONCURRENT_MODE +- // FindMinimumRSSI() per-adapter +- { +- PADAPTER pbuddy_adapter = pAdapter->pbuddy_adapter; +- PHAL_DATA_TYPE pbuddy_HalData = GET_HAL_DATA(pbuddy_adapter); +- struct dm_priv *pbuddy_dmpriv = &pbuddy_HalData->dmpriv; +- +- if((pdmpriv->EntryMinUndecoratedSmoothedPWDB != 0) && +- (pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB != 0)) +- { +- +- if(pdmpriv->EntryMinUndecoratedSmoothedPWDB > pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB) +- pdmpriv->EntryMinUndecoratedSmoothedPWDB = pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB; +- } +- else +- { +- if(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0) +- pdmpriv->EntryMinUndecoratedSmoothedPWDB = pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB; +- +- } +- #if 0 +- if((pdmpriv->UndecoratedSmoothedPWDB != (-1)) && +- (pbuddy_dmpriv->UndecoratedSmoothedPWDB != (-1))) +- { +- +- if((pdmpriv->UndecoratedSmoothedPWDB > pbuddy_dmpriv->UndecoratedSmoothedPWDB) && +- (pbuddy_dmpriv->UndecoratedSmoothedPWDB!=0)) +- pdmpriv->UndecoratedSmoothedPWDB = pbuddy_dmpriv->UndecoratedSmoothedPWDB; +- } +- else +- { +- if((pdmpriv->UndecoratedSmoothedPWDB == (-1)) && (pbuddy_dmpriv->UndecoratedSmoothedPWDB!=0)) +- pdmpriv->UndecoratedSmoothedPWDB = pbuddy_dmpriv->UndecoratedSmoothedPWDB; +- } +- #endif +- } +-#endif +- +- if((check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) && +- (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) +- { +- pdmpriv->MinUndecoratedPWDBForDM = 0; +- //ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n")); +- } +- if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port +- { +- #if 0 +- if((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) || +- (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || +- (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) +- { +- pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; +- //ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("AP Client PWDB = 0x%x \n", pHalData->MinUndecoratedPWDBForDM)); +- } +- else//for STA mode +- { +- pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->UndecoratedSmoothedPWDB; +- //ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", pHalData->MinUndecoratedPWDBForDM)); +- } +- #else +- pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; +- #endif +- } +- else // associated entry pwdb +- { +- pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; +- //ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("AP Ext Port or disconnet PWDB = 0x%x \n", pHalData->MinUndecoratedPWDBForDM)); +- } +- +- //odm_FindMinimumRSSI_Dmsp(pAdapter); +- //DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM); +- //ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM)); +-} +- +-VOID +-rtl8723b_HalDmWatchDog( +- IN PADAPTER Adapter +- ) +-{ +- BOOLEAN bFwCurrentInPSMode = _FALSE; +- BOOLEAN bFwPSAwake = _TRUE; +- u8 hw_init_completed = _FALSE; +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +-#ifdef CONFIG_CONCURRENT_MODE +- PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; +-#endif //CONFIG_CONCURRENT_MODE +- +-//#if MP_DRIVER +-if (Adapter->registrypriv.mp_mode == 1 && Adapter->mppriv.mp_dm ==0) // for MP power tracking +- return; +-//#endif +- +- hw_init_completed = Adapter->hw_init_completed; +- +- if (hw_init_completed == _FALSE) +- goto skip_dm; +- +-#ifdef CONFIG_LPS +- bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode; +- rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); +-#endif +- +-#ifdef CONFIG_P2P +- // Fw is under p2p powersaving mode, driver should stop dynamic mechanism. +- // modifed by thomas. 2011.06.11. +- if(Adapter->wdinfo.p2p_ps_mode) +- bFwPSAwake = _FALSE; +-#endif //CONFIG_P2P +- +- +- if( (hw_init_completed == _TRUE) +- && ((!bFwCurrentInPSMode) && bFwPSAwake)) +- { +- // +- // Calculate Tx/Rx statistics. +- // +- dm_CheckStatistics(Adapter); +- rtw_hal_check_rxfifo_full(Adapter); +- // +- // Dynamically switch RTS/CTS protection. +- // +- //dm_CheckProtection(Adapter); +- +-#ifdef CONFIG_PCI_HCI +- // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. +- // Tx Migration settings. +- //dm_InterruptMigration(Adapter); +- +- //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) +- // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); +-#endif +- } +- +- //ODM +- if (hw_init_completed == _TRUE) +- { +- u8 bLinked=_FALSE; +- u8 bsta_state=_FALSE; +- u8 bBtDisabled = _TRUE; +- +- if(rtw_linked_check(Adapter)){ +- bLinked = _TRUE; +- if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE)) +- bsta_state = _TRUE; +- } +- +-#ifdef CONFIG_CONCURRENT_MODE +- if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)){ +- bLinked = _TRUE; +- if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE)) +- bsta_state = _TRUE; +- } +-#endif //CONFIG_CONCURRENT_MODE +- +- ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked); +- ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state); +- +- //FindMinimumRSSI_8723b(Adapter); +- //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); +- +-#ifdef CONFIG_BT_COEXIST +- bBtDisabled = rtw_btcoex_IsBtDisabled(Adapter); +-#endif // CONFIG_BT_COEXIST +- ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_BT_ENABLED, ((bBtDisabled == _TRUE)?_FALSE:_TRUE)); +- +- ODM_DMWatchdog(&pHalData->odmpriv); +- } +- +-skip_dm: +- +- // Check GPIO to determine current RF on/off and Pbc status. +- // Check Hardware Radio ON/OFF or not +- //if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw) +- //{ +- //RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n")); +- // dm_CheckRfCtrlGPIO(Adapter); +- //} +-#ifdef CONFIG_SUPPORT_HW_WPS_PBC +- dm_CheckPbcGPIO(Adapter); +-#endif +- return; +-} +- +-void rtl8723b_hal_dm_in_lps(PADAPTER padapter) +-{ +- u32 PWDB_rssi=0; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +- PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +- pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; +- struct sta_priv *pstapriv = &padapter->stapriv; +- struct sta_info *psta = NULL; +- +- DBG_871X("%s, RSSI_Min=%d\n", __func__, pDM_Odm->RSSI_Min); +- +- //update IGI +- ODM_Write_DIG(pDM_Odm, pDM_Odm->RSSI_Min); +- +- +- //set rssi to fw +- psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); +- if(psta && (psta->rssi_stat.UndecoratedSmoothedPWDB > 0)) +- { +- PWDB_rssi = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); +- +- rtl8723b_set_rssi_cmd(padapter, (u8*)&PWDB_rssi); +- } +- +-} +- +-void rtl8723b_HalDmWatchDog_in_LPS(IN PADAPTER Adapter) +-{ +- u8 bLinked=_FALSE; +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +- PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +- pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; +- struct sta_priv *pstapriv = &Adapter->stapriv; +- struct sta_info *psta = NULL; +-#ifdef CONFIG_CONCURRENT_MODE +- PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; +-#endif //CONFIG_CONCURRENT_MODE +- +- if (Adapter->hw_init_completed == _FALSE) +- goto skip_lps_dm; +- +- +- if(rtw_linked_check(Adapter)) +- bLinked = _TRUE; +- +-#ifdef CONFIG_CONCURRENT_MODE +- if (pbuddy_adapter && rtw_linked_check(pbuddy_adapter)) +- bLinked = _TRUE; +-#endif //CONFIG_CONCURRENT_MODE +- +- ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked); +- +- if(bLinked == _FALSE) +- goto skip_lps_dm; +- +- if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) +- goto skip_lps_dm; +- +- +- //ODM_DMWatchdog(&pHalData->odmpriv); +- //Do DIG by RSSI In LPS-32K +- +- //.1 Find MIN-RSSI +- psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); +- if(psta == NULL) +- goto skip_lps_dm; +- +- pdmpriv->EntryMinUndecoratedSmoothedPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; +- +- DBG_871X("CurIGValue=%d, EntryMinUndecoratedSmoothedPWDB = %d\n", pDM_DigTable->CurIGValue, pdmpriv->EntryMinUndecoratedSmoothedPWDB ); +- +- if(pdmpriv->EntryMinUndecoratedSmoothedPWDB <=0) +- goto skip_lps_dm; +- +- pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; +- +- pDM_Odm->RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM; +- +- //if(pDM_DigTable->CurIGValue != pDM_Odm->RSSI_Min) +- if((pDM_DigTable->CurIGValue > pDM_Odm->RSSI_Min + 5) || +- (pDM_DigTable->CurIGValue < pDM_Odm->RSSI_Min - 5)) +- +- { +- rtw_dm_in_lps_wk_cmd(Adapter); +- } +- +- +-skip_lps_dm: +- +- return; +- +-} +- +-void rtl8723b_init_dm_priv(IN PADAPTER Adapter) +-{ +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +- PDM_ODM_T podmpriv = &pHalData->odmpriv; +- _rtw_memset(pdmpriv, 0, sizeof(struct dm_priv)); +- Init_ODM_ComInfo_8723b(Adapter); +- ODM_InitAllTimers(podmpriv ); +-} +- +-void rtl8723b_deinit_dm_priv(IN PADAPTER Adapter) +-{ +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +- PDM_ODM_T podmpriv = &pHalData->odmpriv; +- ODM_CancelAllTimers(podmpriv); +- +-} +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++//============================================================ ++// Description: ++// ++// This file is for 92CE/92CU dynamic mechanism only ++// ++// ++//============================================================ ++#define _RTL8723B_DM_C_ ++ ++//============================================================ ++// include files ++//============================================================ ++#include ++ ++//============================================================ ++// Global var ++//============================================================ ++ ++ ++static VOID ++dm_CheckProtection( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u1Byte CurRate, RateThreshold; ++ ++ if(pMgntInfo->pHTInfo->bCurBW40MHz) ++ RateThreshold = MGN_MCS1; ++ else ++ RateThreshold = MGN_MCS3; ++ ++ if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) ++ { ++ pMgntInfo->bDmDisableProtect = TRUE; ++ DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); ++ } ++ else ++ { ++ pMgntInfo->bDmDisableProtect = FALSE; ++ DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); ++ } ++#endif ++} ++ ++static VOID ++dm_CheckStatistics( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ if(!Adapter->MgntInfo.bMediaConnect) ++ return; ++ ++ //2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. ++ rtw_hal_get_hwreg( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) ); ++ ++ // Calculate current Tx Rate(Successful transmited!!) ++ ++ // Calculate current Rx Rate(Successful received!!) ++ ++ //for tx tx retry count ++ rtw_hal_get_hwreg( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) ); ++#endif ++} ++#ifdef CONFIG_SUPPORT_HW_WPS_PBC ++static void dm_CheckPbcGPIO(_adapter *padapter) ++{ ++ u8 tmp1byte; ++ u8 bPbcPressed = _FALSE; ++ ++ if(!padapter->registrypriv.hw_wps_pbc) ++ return; ++ ++#ifdef CONFIG_USB_HCI ++ tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); ++ tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode ++ ++ tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level ++ ++ tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); ++ tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode ++ ++ tmp1byte =rtw_read8(padapter, GPIO_IN); ++ ++ if (tmp1byte == 0xff) ++ return ; ++ ++ if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT) ++ { ++ bPbcPressed = _TRUE; ++ } ++#else ++ tmp1byte = rtw_read8(padapter, GPIO_IN); ++ //RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte)); ++ ++ if (tmp1byte == 0xff || padapter->init_adpt_in_progress) ++ return ; ++ ++ if((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0) ++ { ++ bPbcPressed = _TRUE; ++ } ++#endif ++ ++ if( _TRUE == bPbcPressed) ++ { ++ // Here we only set bPbcPressed to true ++ // After trigger PBC, the variable will be set to false ++ DBG_8192C("CheckPbcGPIO - PBC is pressed\n"); ++ rtw_request_wps_pbc_event(padapter); ++ } ++} ++#endif //#ifdef CONFIG_SUPPORT_HW_WPS_PBC ++ ++ ++#ifdef CONFIG_PCI_HCI ++// ++// Description: ++// Perform interrupt migration dynamically to reduce CPU utilization. ++// ++// Assumption: ++// 1. Do not enable migration under WIFI test. ++// ++// Created by Roger, 2010.03.05. ++// ++VOID ++dm_InterruptMigration( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ BOOLEAN bCurrentIntMt, bCurrentACIntDisable; ++ BOOLEAN IntMtToSet = _FALSE; ++ BOOLEAN ACIntToSet = _FALSE; ++ ++ ++ // Retrieve current interrupt migration and Tx four ACs IMR settings first. ++ bCurrentIntMt = pHalData->bInterruptMigration; ++ bCurrentACIntDisable = pHalData->bDisableTxInt; ++ ++ // ++ // Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics ++ // when interrupt migration is set before. 2010.03.05. ++ // ++ if(!Adapter->registrypriv.wifi_spec && ++ (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && ++ pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) ++ { ++ IntMtToSet = _TRUE; ++ ++ // To check whether we should disable Tx interrupt or not. ++ if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic ) ++ ACIntToSet = _TRUE; ++ } ++ ++ //Update current settings. ++ if( bCurrentIntMt != IntMtToSet ){ ++ DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet); ++ if(IntMtToSet) ++ { ++ // ++ // Set interrrupt migration timer and corresponging Tx/Rx counter. ++ // timer 25ns*0xfa0=100us for 0xf packets. ++ // 2010.03.05. ++ // ++ rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx ++ pHalData->bInterruptMigration = IntMtToSet; ++ } ++ else ++ { ++ // Reset all interrupt migration settings. ++ rtw_write32(Adapter, REG_INT_MIG, 0); ++ pHalData->bInterruptMigration = IntMtToSet; ++ } ++ } ++ ++ /*if( bCurrentACIntDisable != ACIntToSet ){ ++ DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet); ++ if(ACIntToSet) // Disable four ACs interrupts. ++ { ++ // ++ // Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. ++ // When extremely highly Rx OK occurs, we will disable Tx interrupts. ++ // 2010.03.05. ++ // ++ UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS ); ++ pHalData->bDisableTxInt = ACIntToSet; ++ } ++ else// Enable four ACs interrupts. ++ { ++ UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 ); ++ pHalData->bDisableTxInt = ACIntToSet; ++ } ++ }*/ ++ ++} ++ ++#endif ++ ++// ++// Initialize GPIO setting registers ++// ++static void ++dm_InitGPIOSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ ++ u8 tmp1byte; ++ ++ tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); ++ tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); ++ ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); ++} ++//============================================================ ++// functions ++//============================================================ ++static void Init_ODM_ComInfo_8723b(PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ u32 SupportAbility = 0; ++ u8 cut_ver,fab_ver; ++ ++ Init_ODM_ComInfo(Adapter); ++ ++ ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PACKAGE_TYPE, pHalData->PackageType); ++ ++ fab_ver = ODM_TSMC; ++ cut_ver = ODM_CUT_A; ++ ++ DBG_871X("%s(): fab_ver=%d cut_ver=%d\n", __func__, fab_ver, cut_ver); ++ ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver); ++ ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver); ++ ++ #ifdef CONFIG_DISABLE_ODM ++ SupportAbility = 0; ++ #else ++ SupportAbility = ODM_RF_CALIBRATION | ++ ODM_RF_TX_PWR_TRACK ++ ; ++ #endif ++ ++ ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,SupportAbility); ++} ++ ++static void Update_ODM_ComInfo_8723b(PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ u32 SupportAbility = 0; ++ ++ SupportAbility = 0 ++ | ODM_BB_DIG ++ | ODM_BB_RA_MASK ++ | ODM_BB_DYNAMIC_TXPWR ++ | ODM_BB_FA_CNT ++ | ODM_BB_RSSI_MONITOR ++ | ODM_BB_CCK_PD ++ //| ODM_BB_PWR_SAVE ++ | ODM_BB_CFO_TRACKING ++ | ODM_MAC_EDCA_TURBO ++ | ODM_RF_TX_PWR_TRACK ++ | ODM_RF_CALIBRATION ++ | ODM_BB_NHM_CNT ++// | ODM_BB_PWR_TRAIN ++ ; ++ ++ if (rtw_odm_adaptivity_needed(Adapter) == _TRUE) { ++ rtw_odm_adaptivity_config_msg(RTW_DBGDUMP, Adapter); ++ SupportAbility |= ODM_BB_ADAPTIVITY; ++ } ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ if (pHalData->AntDivCfg) ++ SupportAbility |= ODM_BB_ANT_DIV; ++#endif ++ ++#if (MP_DRIVER==1) ++ if (Adapter->registrypriv.mp_mode == 1) { ++ SupportAbility = 0 ++ | ODM_RF_CALIBRATION ++ | ODM_RF_TX_PWR_TRACK ++ ; ++ } ++#endif//(MP_DRIVER==1) ++ ++#ifdef CONFIG_DISABLE_ODM ++ SupportAbility = 0; ++#endif//CONFIG_DISABLE_ODM ++ ++ ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,SupportAbility); ++} ++ ++void ++rtl8723b_InitHalDm( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ ++ u8 i; ++ ++#ifdef CONFIG_USB_HCI ++ dm_InitGPIOSetting(Adapter); ++#endif ++ ++ pHalData->DM_Type = DM_Type_ByDriver; ++ ++ Update_ODM_ComInfo_8723b(Adapter); ++ ++ ODM_DMInit(pDM_Odm); ++ ++} ++ ++VOID ++rtl8723b_HalDmWatchDog( ++ IN PADAPTER Adapter ++ ) ++{ ++ BOOLEAN bFwCurrentInPSMode = _FALSE; ++ BOOLEAN bFwPSAwake = _TRUE; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; ++#endif //CONFIG_CONCURRENT_MODE ++ ++//#if MP_DRIVER ++if (Adapter->registrypriv.mp_mode == 1 && Adapter->mppriv.mp_dm ==0) // for MP power tracking ++ return; ++//#endif ++ ++ if (!rtw_is_hw_init_completed(Adapter)) ++ goto skip_dm; ++ ++#ifdef CONFIG_LPS ++ bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode; ++ rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); ++#endif ++ ++#ifdef CONFIG_P2P ++ // Fw is under p2p powersaving mode, driver should stop dynamic mechanism. ++ // modifed by thomas. 2011.06.11. ++ if(Adapter->wdinfo.p2p_ps_mode) ++ bFwPSAwake = _FALSE; ++#endif //CONFIG_P2P ++ ++ ++ if ((rtw_is_hw_init_completed(Adapter)) ++ && ((!bFwCurrentInPSMode) && bFwPSAwake)) { ++ // ++ // Calculate Tx/Rx statistics. ++ // ++ dm_CheckStatistics(Adapter); ++ rtw_hal_check_rxfifo_full(Adapter); ++ // ++ // Dynamically switch RTS/CTS protection. ++ // ++ //dm_CheckProtection(Adapter); ++ ++#ifdef CONFIG_PCI_HCI ++ // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. ++ // Tx Migration settings. ++ //dm_InterruptMigration(Adapter); ++ ++ //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) ++ // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); ++#endif ++ } ++ ++ //ODM ++ if (rtw_is_hw_init_completed(Adapter)) ++ { ++ u8 bLinked=_FALSE; ++ u8 bsta_state=_FALSE; ++ u8 bBtDisabled = _TRUE; ++ ++ if(rtw_linked_check(Adapter)){ ++ bLinked = _TRUE; ++ if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE)) ++ bsta_state = _TRUE; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)){ ++ bLinked = _TRUE; ++ if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE)) ++ bsta_state = _TRUE; ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++ ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked); ++ ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state); ++ ++ //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); ++ ++#ifdef CONFIG_BT_COEXIST ++ bBtDisabled = rtw_btcoex_IsBtDisabled(Adapter); ++#endif // CONFIG_BT_COEXIST ++ ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_BT_ENABLED, ((bBtDisabled == _TRUE)?_FALSE:_TRUE)); ++ ++ ODM_DMWatchdog(&pHalData->odmpriv); ++ } ++ ++skip_dm: ++ ++ // Check GPIO to determine current RF on/off and Pbc status. ++ // Check Hardware Radio ON/OFF or not ++ //if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw) ++ //{ ++ //RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n")); ++ // dm_CheckRfCtrlGPIO(Adapter); ++ //} ++#ifdef CONFIG_SUPPORT_HW_WPS_PBC ++ dm_CheckPbcGPIO(Adapter); ++#endif ++ return; ++} ++ ++void rtl8723b_hal_dm_in_lps(PADAPTER padapter) ++{ ++ u32 PWDB_rssi=0; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta = NULL; ++ ++ DBG_871X("%s, RSSI_Min=%d\n", __func__, pDM_Odm->RSSI_Min); ++ ++ //update IGI ++ ODM_Write_DIG(pDM_Odm, pDM_Odm->RSSI_Min); ++ ++ ++ //set rssi to fw ++ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ if(psta && (psta->rssi_stat.UndecoratedSmoothedPWDB > 0)) ++ { ++ PWDB_rssi = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); ++ ++ rtl8723b_set_rssi_cmd(padapter, (u8*)&PWDB_rssi); ++ } ++ ++} ++ ++void rtl8723b_HalDmWatchDog_in_LPS(IN PADAPTER Adapter) ++{ ++ u8 bLinked=_FALSE; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++ pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ++ struct sta_priv *pstapriv = &Adapter->stapriv; ++ struct sta_info *psta = NULL; ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; ++#endif //CONFIG_CONCURRENT_MODE ++ ++ if (!rtw_is_hw_init_completed(Adapter)) ++ goto skip_lps_dm; ++ ++ ++ if(rtw_linked_check(Adapter)) ++ bLinked = _TRUE; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (pbuddy_adapter && rtw_linked_check(pbuddy_adapter)) ++ bLinked = _TRUE; ++#endif //CONFIG_CONCURRENT_MODE ++ ++ ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked); ++ ++ if(bLinked == _FALSE) ++ goto skip_lps_dm; ++ ++ if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) ++ goto skip_lps_dm; ++ ++ ++ //ODM_DMWatchdog(&pHalData->odmpriv); ++ //Do DIG by RSSI In LPS-32K ++ ++ //.1 Find MIN-RSSI ++ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ if(psta == NULL) ++ goto skip_lps_dm; ++ ++ pHalData->EntryMinUndecoratedSmoothedPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ DBG_871X("CurIGValue=%d, EntryMinUndecoratedSmoothedPWDB = %d\n", pDM_DigTable->CurIGValue, pHalData->EntryMinUndecoratedSmoothedPWDB ); ++ ++ if(pHalData->EntryMinUndecoratedSmoothedPWDB <=0) ++ goto skip_lps_dm; ++ ++ pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB; ++ ++ pDM_Odm->RSSI_Min = pHalData->MinUndecoratedPWDBForDM; ++ ++ //if(pDM_DigTable->CurIGValue != pDM_Odm->RSSI_Min) ++ if((pDM_DigTable->CurIGValue > pDM_Odm->RSSI_Min + 5) || ++ (pDM_DigTable->CurIGValue < pDM_Odm->RSSI_Min - 5)) ++ ++ { ++ rtw_dm_in_lps_wk_cmd(Adapter); ++ } ++ ++ ++skip_lps_dm: ++ ++ return; ++ ++} ++ ++void rtl8723b_init_dm_priv(IN PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T podmpriv = &pHalData->odmpriv; ++ Init_ODM_ComInfo_8723b(Adapter); ++ ODM_InitAllTimers(podmpriv ); ++} ++ ++void rtl8723b_deinit_dm_priv(IN PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PDM_ODM_T podmpriv = &pHalData->odmpriv; ++ ODM_CancelAllTimers(podmpriv); ++ ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_hal_init.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_hal_init.c +old mode 100755 +new mode 100644 +index 37cb5cc..d2cdae7 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_hal_init.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_hal_init.c +@@ -22,6 +22,7 @@ + #include + #include "rtw_bt_mp.h" + #include "hal_com_h2c.h" ++#include + + static VOID + _FWDownloadEnable( +@@ -224,7 +225,6 @@ _WriteFW( + ) + { + // Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. +- // We can remove _ReadChipVersion from ReadpadapterInfo8192C later. + int ret = _SUCCESS; + u32 pageNums,remainSize ; + u32 page, offset; +@@ -309,7 +309,7 @@ static s32 polling_fwdl_chksum(_adapter *adapter, u32 min_cnt, u32 timeout_ms) + do { + cnt++; + value32 = rtw_read32(adapter, REG_MCUFWDL); +- if (value32 & FWDL_ChkSum_rpt || adapter->bSurpriseRemoved || adapter->bDriverStopped) ++ if (value32 & FWDL_ChkSum_rpt || RTW_CANNOT_IO(adapter)) + break; + rtw_yield_os(); + } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); +@@ -348,7 +348,7 @@ static s32 _FWFreeToGo(_adapter *adapter, u32 min_cnt, u32 timeout_ms) + do { + cnt++; + value32 = rtw_read32(adapter, REG_MCUFWDL); +- if (value32 & WINTINI_RDY || adapter->bSurpriseRemoved || adapter->bDriverStopped) ++ if (value32 & WINTINI_RDY || RTW_CANNOT_IO(adapter)) + break; + rtw_yield_os(); + } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); +@@ -895,7 +895,7 @@ s32 FirmwareDownloadBT(PADAPTER padapter, PRT_MP_FIRMWARE pFirmware) + { + DBG_8192C("%s: accquire MP BT FW from file:%s\n", __FUNCTION__, rtw_fw_mp_bt_file_path); + +- rtStatus = rtw_retrive_from_file(rtw_fw_mp_bt_file_path, FwBuffer, FW_8723B_SIZE); ++ rtStatus = rtw_retrieve_from_file(rtw_fw_mp_bt_file_path, FwBuffer, FW_8723B_SIZE); + BTFirmwareLen = rtStatus>=0?rtStatus:0; + pBTFirmwareBuf = FwBuffer; + } +@@ -1049,7 +1049,7 @@ s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw) + { + case FW_SOURCE_IMG_FILE: + #ifdef CONFIG_FILE_FWIMG +- rtStatus = rtw_retrive_from_file(fwfilepath, FwBuffer, FW_8723B_SIZE); ++ rtStatus = rtw_retrieve_from_file(fwfilepath, FwBuffer, FW_8723B_SIZE); + pFirmware->ulFwLength = rtStatus>=0?rtStatus:0; + pFirmware->szFwBuffer = FwBuffer; + #endif // CONFIG_FILE_FWIMG +@@ -1088,8 +1088,7 @@ s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw) + } + else + { +- ODM_ConfigFWWithHeaderFile(&pHalData->odmpriv, CONFIG_FW_MP, +- (u8*)&pFirmware->szFwBuffer, &pFirmware->ulFwLength); ++ ODM_ReadFirmware_MP_8723B_FW_MP(&pHalData->odmpriv, (u8 *)&pFirmware->szFwBuffer, &pFirmware->ulFwLength); + DBG_8192C("%s fw: %s, size: %d\n", __FUNCTION__, "FW_MP", pFirmware->ulFwLength); + } + } +@@ -1134,7 +1133,7 @@ s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw) + + _FWDownloadEnable(padapter, _TRUE); + fwdl_start_time = rtw_get_current_time(); +- while(!padapter->bDriverStopped && !padapter->bSurpriseRemoved ++ while (!RTW_CANNOT_IO(padapter) + && (write_fw++ < 3 || rtw_get_passing_time_ms(fwdl_start_time) < 500)) + { + /* reset FWDL chksum */ +@@ -1183,6 +1182,9 @@ exit: + rtw_mfree((u8*)pFirmware, sizeof(RT_FIRMWARE_8723B)); + if (pBTFirmware) + rtw_mfree((u8*)pBTFirmware, sizeof(RT_FIRMWARE_8723B)); ++ ++ rtl8723b_InitializeFirmwareVars(padapter); ++ + DBG_871X(" <=== rtl8723b_FirmwareDownload()\n"); + return rtStatus; + } +@@ -1204,50 +1206,6 @@ void rtl8723b_InitializeFirmwareVars(PADAPTER padapter) + // pHalData->H2CStopInsertQueue = _FALSE; + } + +-#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) +-//=========================================== +- +-// +-// Description: Prepare some information to Fw for WoWLAN. +-// (1) Download wowlan Fw. +-// (2) Download RSVD page packets. +-// (3) Enable AP offload if needed. +-// +-// 2011.04.12 by tynli. +-// +-VOID +-SetFwRelatedForWoWLAN8723b( +- IN PADAPTER padapter, +- IN u8 bHostIsGoingtoSleep +-) +-{ +- int status=_FAIL; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- u8 bRecover = _FALSE; +- // +- // 1. Before WoWLAN we need to re-download WoWLAN Fw. +- // +- status = rtl8723b_FirmwareDownload(padapter, bHostIsGoingtoSleep); +- if(status != _SUCCESS) { +- DBG_871X("SetFwRelatedForWoWLAN8723b(): Re-Download Firmware failed!!\n"); +- return; +- } else { +- DBG_871X("SetFwRelatedForWoWLAN8723b(): Re-Download Firmware Success !!\n"); +- } +- // +- // 2. Re-Init the variables about Fw related setting. +- // +- rtl8723b_InitializeFirmwareVars(padapter); +-} +-#endif //CONFIG_WOWLAN +- +-static void rtl8723b_free_hal_data(PADAPTER padapter) +-{ +-_func_enter_; +- +-_func_exit_; +-} +- + //=========================================================== + // Efuse related code + //=========================================================== +@@ -1660,11 +1618,13 @@ if(0) + // Check word enable condition in the section + if (!(wden & (0x01<>CHIP_VER_RTL_SHIFT; // IC version (CUT) ++ pHalData->VersionID.ICType = CHIP_8723B; ++ pHalData->VersionID.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); ++ pHalData->VersionID.RFType = RF_TYPE_1T1R ; ++ pHalData->VersionID.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); ++ pHalData->VersionID.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; // IC version (CUT) + + // For regulator mode. by tynli. 2011.01.14 + pHalData->RegulatorMode = ((value32 & SPS_SEL) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR); + + value32 = rtw_read32(padapter, REG_GPIO_OUTSTS); +- ChipVersion.ROMVer = ((value32 & RF_RL_ID) >> 20); // ROM code version. ++ pHalData->VersionID.ROMVer = ((value32 & RF_RL_ID) >> 20); // ROM code version. + + // For multi-function consideration. Added by Roger, 2010.10.06. + pHalData->MultiFunc = RT_MULTI_FUNC_NONE; +@@ -2864,39 +2830,27 @@ ReadChipVersion8723B( + pHalData->MultiFunc |= ((value32 & BT_FUNC_EN) ? RT_MULTI_FUNC_BT : 0); + pHalData->MultiFunc |= ((value32 & GPS_FUNC_EN) ? RT_MULTI_FUNC_GPS : 0); + pHalData->PolarityCtl = ((value32 & WL_HWPDN_SL) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT); +-//#if DBG +-#if 1 +- dump_chip_info(ChipVersion); +-#endif +- pHalData->VersionID = ChipVersion; ++ ++ rtw_hal_config_rftype(padapter); ++ + /* // mark for chage to use efuse +- if( IS_B_CUT(ChipVersion) || IS_C_CUT(ChipVersion)) ++ if( IS_B_CUT(pHalData->VersionID) || IS_C_CUT(pHalData->VersionID)) + { + MSG_8192C(" IS_B/C_CUT SWR up 1 level !!!!!!!!!!!!!!!!!\n"); + PHY_SetMacReg(padapter, 0x14, BIT23|BIT22|BIT21|BIT20, 0x5); //MAC reg 0x14[23:20] = 4b'0101 (SWR 1.220V) +- }else if ( IS_D_CUT(ChipVersion)) ++ }else if ( IS_D_CUT(pHalData->VersionID)) + { + MSG_8192C(" IS_D_CUT SKIP SWR !!!!!!!!!!!!!!!!!\n"); + } + */ +- if (IS_1T2R(ChipVersion)) +- pHalData->rf_type = RF_1T2R; +- else if (IS_2T2R(ChipVersion)) +- pHalData->rf_type = RF_2T2R; +- else +- pHalData->rf_type = RF_1T1R; + +- MSG_8192C("RF_Type is %x!!\n", pHalData->rf_type); ++#if 1 ++ dump_chip_info(pHalData->VersionID); ++#endif + +- return ChipVersion; + } + + +-static void rtl8723b_read_chip_version(PADAPTER padapter) +-{ +- ReadChipVersion8723B(padapter); +-} +- + void rtl8723b_InitBeaconParameters(PADAPTER padapter) + { + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +@@ -2933,7 +2887,7 @@ void rtl8723b_InitBeaconParameters(PADAPTER padapter) + + void rtl8723b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode) + { +-#ifdef RTL8192CU_ADHOC_WORKAROUND_SETTING ++#ifdef CONFIG_ADHOC_WORKAROUND_SETTING + rtw_write8(padapter, REG_BCN_MAX_ERR, 0xFF); + #else + //rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10)); +@@ -3076,35 +3030,6 @@ static void rtl8723b_SetBeaconRelatedRegisters(PADAPTER padapter) + rtw_write8(padapter, bcn_ctrl_reg, val8); + } + +-void rtl8723b_GetHalODMVar( +- PADAPTER Adapter, +- HAL_ODM_VARIABLE eVariable, +- PVOID pValue1, +- PVOID pValue2) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- PDM_ODM_T podmpriv = &pHalData->odmpriv; +- switch(eVariable){ +- default: +- GetHalODMVar(Adapter,eVariable,pValue1,pValue2); +- break; +- } +-} +- +-void rtl8723b_SetHalODMVar( +- PADAPTER Adapter, +- HAL_ODM_VARIABLE eVariable, +- PVOID pValue1, +- BOOLEAN bSet) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- PDM_ODM_T podmpriv = &pHalData->odmpriv; +- switch(eVariable){ +- default: +- SetHalODMVar(Adapter,eVariable,pValue1,bSet); +- break; +- } +-} + void hal_notch_filter_8723b(_adapter *adapter, bool enable) + { + if (enable) { +@@ -3181,22 +3106,17 @@ void UpdateHalRAMask8723B(PADAPTER padapter, u32 mac_id, u8 rssi_level) + { + u32 mask,rate_bitmap; + u8 shortGIrate = _FALSE; +- struct sta_info *psta; ++ struct sta_info *psta = NULL; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct macid_ctl_t *macid_ctl = &padapter->dvobj->macid_ctl; + +- DBG_871X("%s(): mac_id=%d rssi_level=%d\n", __func__, mac_id, rssi_level); +- +- if (mac_id >= NUM_STA) //CAM_SIZE +- { +- return; +- } +- +- psta = pmlmeinfo->FW_sta_info[mac_id].psta; +- if(psta == NULL) +- { ++ if (mac_id < macid_ctl->num) ++ psta = macid_ctl->sta[mac_id]; ++ if (psta == NULL) { ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" macid:%u, sta is NULL\n" ++ , FUNC_ADPT_ARG(padapter), mac_id); + return; + } + +@@ -3235,7 +3155,7 @@ void UpdateHalRAMask8723B(PADAPTER padapter, u32 mac_id, u8 rssi_level) + } + + //set correct initial date rate for each mac_id +- pdmpriv->INIDATA_RATE[mac_id] = psta->init_rate; ++ pHalData->INIDATA_RATE[mac_id] = psta->init_rate; + DBG_871X("%s(): mac_id=%d raid=0x%x bw=%d mask=0x%x init_rate=0x%x\n", __func__, mac_id, psta->raid, psta->bw_mode, mask, psta->init_rate); + } + +@@ -3264,17 +3184,99 @@ void rtl8723b_cal_txdesc_chksum(struct tx_desc *ptxdesc) + } + #endif + +-void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc) ++ ++// ++// Description: In normal chip, we should send some packet to Hw which will be used by Fw ++// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then ++// Fw can tell Hw to send these packet derectly. ++// Added by tynli. 2009.10.15. ++// ++//type1:pspoll, type2:null ++void rtl8723b_fill_fake_txdesc( ++ PADAPTER padapter, ++ u8* pDesc, ++ u32 BufferLen, ++ u8 IsPsPoll, ++ u8 IsBTQosNull, ++ u8 bDataFrame) + { +- pHalFunc->free_hal_data = &rtl8723b_free_hal_data; ++ // Clear all status ++ _rtw_memset(pDesc, 0, TXDESC_SIZE); ++ ++ SET_TX_DESC_FIRST_SEG_8723B(pDesc, 1); //bFirstSeg; ++ SET_TX_DESC_LAST_SEG_8723B(pDesc, 1); //bLastSeg; ++ ++ SET_TX_DESC_OFFSET_8723B(pDesc, 0x28); // Offset = 32 ++ ++ SET_TX_DESC_PKT_SIZE_8723B(pDesc, BufferLen); // Buffer size + command header ++ SET_TX_DESC_QUEUE_SEL_8723B(pDesc, QSLT_MGNT); // Fixed queue of Mgnt queue ++ ++ // Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. ++ if (_TRUE == IsPsPoll) ++ { ++ SET_TX_DESC_NAV_USE_HDR_8723B(pDesc, 1); ++ } ++ else ++ { ++ SET_TX_DESC_HWSEQ_EN_8723B(pDesc, 1); // Hw set sequence number ++ SET_TX_DESC_HWSEQ_SEL_8723B(pDesc, 0); ++ } ++ ++ if (_TRUE ==IsBTQosNull) ++ { ++ SET_TX_DESC_BT_INT_8723B(pDesc, 1); ++ } ++ ++ SET_TX_DESC_USE_RATE_8723B(pDesc, 1); // use data rate which is set by Sw ++ SET_TX_DESC_OWN_8723B((pu1Byte)pDesc, 1); ++ ++ SET_TX_DESC_TX_RATE_8723B(pDesc, DESC8723B_RATE1M); ++ ++ // ++ // Encrypt the data frame if under security mode excepct null data. Suggested by CCW. ++ // ++ if (_TRUE ==bDataFrame) ++ { ++ u32 EncAlg; ++ ++ EncAlg = padapter->securitypriv.dot11PrivacyAlgrthm; ++ switch (EncAlg) ++ { ++ case _NO_PRIVACY_: ++ SET_TX_DESC_SEC_TYPE_8723B(pDesc, 0x0); ++ break; ++ case _WEP40_: ++ case _WEP104_: ++ case _TKIP_: ++ SET_TX_DESC_SEC_TYPE_8723B(pDesc, 0x1); ++ break; ++ case _SMS4_: ++ SET_TX_DESC_SEC_TYPE_8723B(pDesc, 0x2); ++ break; ++ case _AES_: ++ SET_TX_DESC_SEC_TYPE_8723B(pDesc, 0x3); ++ break; ++ default: ++ SET_TX_DESC_SEC_TYPE_8723B(pDesc, 0x0); ++ break; ++ } ++ } ++ ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ // USB interface drop packet if the checksum of descriptor isn't correct. ++ // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). ++ rtl8723b_cal_txdesc_chksum((struct tx_desc*)pDesc); ++#endif ++} + ++void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc) ++{ + pHalFunc->dm_init = &rtl8723b_init_dm_priv; + pHalFunc->dm_deinit = &rtl8723b_deinit_dm_priv; + +- pHalFunc->read_chip_version = &rtl8723b_read_chip_version; ++ pHalFunc->read_chip_version = read_chip_version_8723b; + + pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8723B; +- + pHalFunc->set_bwmode_handler = &PHY_SetBWMode8723B; + pHalFunc->set_channel_handler = &PHY_SwChnl8723B; + pHalFunc->set_chnl_bw_handler = &PHY_SetSwChnlBWMode8723B; +@@ -3283,7 +3285,9 @@ void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc) + pHalFunc->get_tx_power_level_handler = &PHY_GetTxPowerLevel8723B; + + pHalFunc->hal_dm_watchdog = &rtl8723b_HalDmWatchDog; ++#ifdef CONFIG_LPS_LCLK_WD_TIMER + pHalFunc->hal_dm_watchdog_in_lps = &rtl8723b_HalDmWatchDog_in_LPS; ++#endif + + #ifdef CONFIG_C2H_PACKET_EN + pHalFunc->SetHwRegHandlerWithBuf = &SetHwRegWithBuf8723B; +@@ -3321,8 +3325,8 @@ void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc) + pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; + pHalFunc->sreset_inprogress= &sreset_inprogress; + #endif +- pHalFunc->GetHalODMVarHandler = &rtl8723b_GetHalODMVar; +- pHalFunc->SetHalODMVarHandler = &rtl8723b_SetHalODMVar; ++ pHalFunc->GetHalODMVarHandler = GetHalODMVar; ++ pHalFunc->SetHalODMVarHandler = SetHalODMVar; + + #ifdef CONFIG_XMIT_THREAD_MODE + pHalFunc->xmit_thread_handler = &hal_xmit_handler; +@@ -3333,13 +3337,14 @@ void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc) + pHalFunc->c2h_id_filter_ccx = c2h_id_filter_ccx_8723b; + + pHalFunc->fill_h2c_cmd = &FillH2CCmd8723B; +-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +- pHalFunc->hal_cal_txdesc_chksum = &rtl8723b_cal_txdesc_chksum; +-#endif +-#ifdef CONFIG_WOWLAN +- pHalFunc->hal_set_wowlan_fw = &SetFwRelatedForWoWLAN8723b; +-#endif ++ pHalFunc->fill_fake_txdesc = &rtl8723b_fill_fake_txdesc; ++ pHalFunc->fw_dl = &rtl8723b_FirmwareDownload; + pHalFunc->hal_get_tx_buff_rsvd_page_num = &GetTxBufferRsvdPageNum8723B; ++#ifdef CONFIG_GPIO_API ++ pHalFunc->hal_gpio_func_check = &rtl8723b_GpioFuncCheck; ++ pHalFunc->hal_gpio_multi_func_reset = &rtl8723b_GpioMultiFuncReset; ++#endif ++ + } + + void rtl8723b_InitAntenna_Selection(PADAPTER padapter) +@@ -3385,37 +3390,44 @@ void rtl8723b_DeinitAntenna_Selection(PADAPTER padapter) + + } + +-void rtl8723b_init_default_value(PADAPTER padapter) ++void init_hal_spec_8723b(_adapter *adapter) + { +- PHAL_DATA_TYPE pHalData; +- struct dm_priv *pdmpriv; +- u8 i; ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); + ++ hal_spec->macid_num = MACID_NUM_8723B; ++ hal_spec->sec_cam_ent_num = SEC_CAM_ENT_NUM_8723B; ++ hal_spec->sec_cap = 0; ++ hal_spec->nss_num = NSS_NUM_8723B; ++ hal_spec->band_cap = BAND_CAP_8723B; ++ hal_spec->bw_cap = BW_CAP_8723B; ++ hal_spec->proto_cap = PROTO_CAP_8723B; + ++ hal_spec->wl_func = 0 ++ | WL_FUNC_P2P ++ | WL_FUNC_MIRACAST ++ | WL_FUNC_TDLS ++ ; ++} ++ ++void rtl8723b_init_default_value(PADAPTER padapter) ++{ ++ PHAL_DATA_TYPE pHalData; ++ u8 i; + pHalData = GET_HAL_DATA(padapter); +- pdmpriv = &pHalData->dmpriv; + + padapter->registrypriv.wireless_mode = WIRELESS_11BG_24N; + + // init default value + pHalData->fw_ractrl = _FALSE; +- pHalData->bIQKInitialized = _FALSE; + if (!adapter_to_pwrctl(padapter)->bkeepfwalive) + pHalData->LastHMEBoxNum = 0; + +- /* hal capability values */ +- pHalData->macid_num = MACID_NUM_8723B; +- pHalData->cam_entry_num = CAM_ENTRY_NUM_8723B; +- +- // init dm default value +- pdmpriv->TM_Trigger = 0;//for IQK +-// pdmpriv->binitialized = _FALSE; +-// pdmpriv->prv_traffic_idx = 3; +-// pdmpriv->initialize = 0; +- +- pdmpriv->ThermalValue_HP_index = 0; +- for (i=0; iThermalValue_HP[i] = 0; ++ //init phydm default value ++ pHalData->bIQKInitialized = _FALSE; ++ pHalData->odmpriv.RFCalibrateInfo.TM_Trigger = 0;//for IQK ++ pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0; ++ for(i = 0; i < HP_THERMAL_NUM; i++) ++ pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0; + + // init Efuse variables + pHalData->EfuseUsedBytes = 0; +@@ -3517,47 +3529,22 @@ n. LEDCFG 0x4C[15:0] = 0x8080 + value32 |= ((u4bTmp<<8) | 0x00FF0000); + rtw_write32(padapter, REG_GPIO_PIN_CTRL, value32); + +- if (IS_HARDWARE_TYPE_8723AU(padapter) || +- IS_HARDWARE_TYPE_8723AS(padapter)) +- { +- // +- // For RTL8723u multi-function configuration which was autoload from Efuse offset 0x0a and 0x0b, +- // WLAN HW GPIO[9], GPS HW GPIO[10] and BT HW GPIO[11]. +- // Added by Roger, 2010.10.07. +- // +- //2. Disable GPIO[8] and GPIO[12] +- rtw_write16(padapter, REG_GPIO_IO_SEL_2, 0x0000); // Configure all pins as input mode. +- value32 = rtw_read32(padapter, REG_GPIO_PIN_CTRL_2) & 0xFFFF001F; +- u4bTmp = value32 & 0x0000001F; +-// if( IS_MULTI_FUNC_CHIP(padapter) ) +-// value32 |= ((u4bTmp<<8) | 0x00110000); // Set pin 8 and pin 12 to output mode. +-// else +- value32 |= ((u4bTmp<<8) | 0x001D0000); // Set pin 8, 10, 11 and pin 12 to output mode. +- rtw_write32(padapter, REG_GPIO_PIN_CTRL_2, value32); +- } +- else +- { +- //2. Disable GPIO[10:8] +- rtw_write8(padapter, REG_MAC_PINMUX_CFG, 0x00); +- value16 = rtw_read16(padapter, REG_GPIO_IO_SEL) & 0xFF0F; +- value8 = (u8) (value16&0x000F); +- value16 |= ((value8<<4) | 0x0780); +- rtw_write16(padapter, REG_GPIO_IO_SEL, value16); +- } ++ ++ //2. Disable GPIO[10:8] ++ rtw_write8(padapter, REG_MAC_PINMUX_CFG, 0x00); ++ value16 = rtw_read16(padapter, REG_GPIO_IO_SEL) & 0xFF0F; ++ value8 = (u8) (value16&0x000F); ++ value16 |= ((value8<<4) | 0x0780); ++ rtw_write16(padapter, REG_GPIO_IO_SEL, value16); ++ + + //3. Disable LED0 & 1 +- if(IS_HARDWARE_TYPE_8192DU(padapter)) +- { +- rtw_write16(padapter, REG_LEDCFG0, 0x8888); +- } +- else +- { +- rtw_write16(padapter, REG_LEDCFG0, 0x8080); +- } ++ rtw_write16(padapter, REG_LEDCFG0, 0x8080); ++ + // RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable GPIO and LED.\n")); + } //end of _DisableGPIO() + +-void _DisableRFAFEAndResetBB8192C(PADAPTER padapter) ++void _DisableRFAFEAndResetBB8723B(PADAPTER padapter) + { + /************************************** + a. TXPAUSE 0x522[7:0] = 0xFF //Pause MAC TX queue +@@ -3591,15 +3578,10 @@ e. SYS_FUNC_EN 0x02[7:0] = 0x14 //reset BB state machine + + void _DisableRFAFEAndResetBB(PADAPTER padapter) + { +-#if 0 +- if (IS_HARDWARE_TYPE_8192D(padapter)) +- _DisableRFAFEAndResetBB8192D(padapter); +- else +-#endif +- _DisableRFAFEAndResetBB8192C(padapter); ++ _DisableRFAFEAndResetBB8723B(padapter); + } + +-void _ResetDigitalProcedure1_92C(PADAPTER padapter, BOOLEAN bWithoutHWSM) ++void _ResetDigitalProcedure1_8723B(PADAPTER padapter, BOOLEAN bWithoutHWSM) + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + +@@ -3704,10 +3686,7 @@ void _ResetDigitalProcedure1_92C(PADAPTER padapter, BOOLEAN bWithoutHWSM) + //rtw_write16(padapter, REG_SYS_CLKR, 0x30A3); + //if(!pDevice->RegUsbSS) + // 2011/01/26 MH SD4 Scott suggest to fix UNC-B cut bug. +- //if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) +- //rtw_write16(padapter, REG_SYS_CLKR, (0x70A3|BIT6)); //modify to 0x70A3 by Scott. +- //else +- rtw_write16(padapter, REG_SYS_CLKR, 0x70A3); //modify to 0x70A3 by Scott. ++ rtw_write16(padapter, REG_SYS_CLKR, 0x70A3); //modify to 0x70A3 by Scott. + rtw_write8(padapter, REG_AFE_PLL_CTRL, 0x80); + rtw_write16(padapter, REG_AFE_XTAL_CTRL, 0x880F); + //if(!pDevice->RegUsbSS) +@@ -3724,12 +3703,7 @@ void _ResetDigitalProcedure1_92C(PADAPTER padapter, BOOLEAN bWithoutHWSM) + + void _ResetDigitalProcedure1(PADAPTER padapter, BOOLEAN bWithoutHWSM) + { +-#if 0 +- if(IS_HARDWARE_TYPE_8192D(padapter)) +- _ResetDigitalProcedure1_92D(padapter, bWithoutHWSM); +- else +-#endif +- _ResetDigitalProcedure1_92C(padapter, bWithoutHWSM); ++ _ResetDigitalProcedure1_8723B(padapter, bWithoutHWSM); + } + + void _ResetDigitalProcedure2(PADAPTER padapter) +@@ -3742,10 +3716,7 @@ m. SYS_ISO_CTRL 0x01[7:0] = 0x83 // isolated ELDR to PON + ******************************/ + //rtw_write8(padapter, REG_SYS_FUNC_EN+1, 0x44); //marked by Scott. + // 2011/01/26 MH SD4 Scott suggest to fix UNC-B cut bug. +- //if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) +- //rtw_write16(padapter, REG_SYS_CLKR, 0x70a3|BIT6); +- //else +- rtw_write16(padapter, REG_SYS_CLKR, 0x70a3); //modify to 0x70a3 by Scott. ++ rtw_write16(padapter, REG_SYS_CLKR, 0x70a3); //modify to 0x70a3 by Scott. + rtw_write8(padapter, REG_SYS_ISO_CTRL+1, 0x82); //modify to 0x82 by Scott. + } + +@@ -3778,8 +3749,6 @@ void _DisableAnalog(PADAPTER padapter, BOOLEAN bWithoutHWSM) + i. APS_FSMCO 0x04[15:0] = 0x4802 // set USB suspend + ******************************/ + value8 = 0x23; +- if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) +- value8 |= BIT3; + + rtw_write8(padapter, REG_SPS0_CTRL, value8); + +@@ -3815,9 +3784,9 @@ s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU) + int rtStatus = _SUCCESS; + + +- if (padapter->bSurpriseRemoved){ ++ if (RTW_CANNOT_RUN(padapter)) + return rtStatus; +- } ++ + //==== RF Off Sequence ==== + _DisableRFAFEAndResetBB(padapter); + +@@ -3842,9 +3811,9 @@ s32 CardDisableWithoutHWSM(PADAPTER padapter) + + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Card Disable Without HWSM .\n")); +- if (padapter->bSurpriseRemoved) { ++ if (RTW_CANNOT_RUN(padapter)) + return rtStatus; +- } ++ + + //==== RF Off Sequence ==== + _DisableRFAFEAndResetBB(padapter); +@@ -3922,15 +3891,15 @@ Hal_InitPGData( + PADAPTER padapter, + u8 *PROMContent) + { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +-// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u32 i; + u16 value16; + +- if(_FALSE == pEEPROM->bautoload_fail_flag) ++ if(_FALSE == pHalData->bautoload_fail_flag) + { // autoload OK. + // if (IS_BOOT_FROM_EEPROM(padapter)) +- if (_TRUE == pEEPROM->EepromOrEfuse) ++ if (_TRUE == pHalData->EepromOrEfuse) + { + // Read all Content from EEPROM or EFUSE. + for(i = 0; i < HWSET_MAX_SIZE_8723B; i += 2) +@@ -3943,7 +3912,7 @@ Hal_InitPGData( + { + // Read EFUSE real map to shadow. + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); +- _rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE_8723B); ++ _rtw_memcpy((void*)PROMContent, (void*)pHalData->efuse_eeprom_data, HWSET_MAX_SIZE_8723B); + } + } + else +@@ -3951,10 +3920,17 @@ Hal_InitPGData( + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n")); + // pHalData->AutoloadFailFlag = _TRUE; + //update to default value 0xFF +- if (_FALSE == pEEPROM->EepromOrEfuse) ++ if (_FALSE == pHalData->EepromOrEfuse) + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); +- _rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE_8723B); ++ _rtw_memcpy((void*)PROMContent, (void*)pHalData->efuse_eeprom_data, HWSET_MAX_SIZE_8723B); ++ } ++ ++#ifdef CONFIG_EFUSE_CONFIG_FILE ++ if (check_phy_efuse_tx_power_info_valid(padapter) == _FALSE) { ++ if (Hal_readPGDataFromConfigFile(padapter) != _SUCCESS) ++ DBG_871X_LEVEL(_drv_err_, "invalid phy efuse and read from file fail, will use driver default!!\n"); + } ++#endif + } + + void +@@ -3963,8 +3939,7 @@ Hal_EfuseParseIDCode( + IN u8 *hwinfo + ) + { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +-// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u16 EEPROMId; + + +@@ -3973,11 +3948,11 @@ Hal_EfuseParseIDCode( + if (EEPROMId != RTL_EEPROM_ID) + { + DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId); +- pEEPROM->bautoload_fail_flag = _TRUE; ++ pHalData->bautoload_fail_flag = _TRUE; + } + else + { +- pEEPROM->bautoload_fail_flag = _FALSE; ++ pHalData->bautoload_fail_flag = _FALSE; + } + + RT_TRACE(_module_hal_init_c_, _drv_notice_, ("EEPROM ID=0x%04x\n", EEPROMId)); +@@ -4102,64 +4077,36 @@ Hal_ReadPowerValueFromPROM_8723B( + if(TxCount==0) + { + pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0; +- if(PROMContent[eeAddr] == 0xFF) +- pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF; +- else +- { +- pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; +- if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number +- pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; +- } ++ pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; ++ if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; ++ ++ pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); ++ if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; + +- if(PROMContent[eeAddr] == 0xFF) +- pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF; +- else +- { +- pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); +- if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number +- pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; +- } + pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0; + eeAddr++; +- } +- else +- { +- if(PROMContent[eeAddr] == 0xFF) +- pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; +- else +- { +- pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; +- if(pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number +- pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0; +- } +- +- if(PROMContent[eeAddr] == 0xFF) +- pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; +- else +- { +- pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); +- if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number +- pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; +- } ++ } else{ ++ pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; ++ if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0; ++ ++ pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); ++ if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; ++ + eeAddr++; +- +- if(PROMContent[eeAddr] == 0xFF) +- pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; +- else +- { +- pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; +- if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number +- pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; +- } +- +- if(PROMContent[eeAddr] == 0xFF) +- pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; +- else +- { +- pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); +- if(pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number +- pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0; +- } ++ ++ pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; ++ if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; ++ ++ ++ pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); ++ if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3) /*4bit sign number to 8 bit sign number*/ ++ pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0; ++ + eeAddr++; + } + } +@@ -4186,8 +4133,7 @@ Hal_EfuseParseTxPowerInfo_8723B( + Hal_ReadPowerValueFromPROM_8723B(padapter, &pwrInfo24G, PROMContent, AutoLoadFail); + for(rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++) + { +- for(ch = 0 ; ch < CHANNEL_MAX_NUMBER; ch++) +- { ++ for (ch = 0 ; ch < CENTER_CH_2G_NUM; ch++) { + Hal_GetChnlGroup8723B(ch+1, &group); + + if(ch == 14-1) +@@ -4239,6 +4185,31 @@ Hal_EfuseParseTxPowerInfo_8723B( + } + + VOID ++Hal_EfuseParseBoardType_8723B( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(!AutoloadFail) ++ { ++ pHalData->InterfaceSel = (PROMContent[EEPROM_RF_BOARD_OPTION_8723B]&0xE0)>>5; ++ if(PROMContent[EEPROM_RF_BOARD_OPTION_8723B] == 0xFF) ++ pHalData->InterfaceSel = (EEPROM_DEFAULT_BOARD_OPTION&0xE0)>>5; ++ } ++ else ++ { ++ pHalData->InterfaceSel = 0; ++ } ++ RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("Board Type: 0x%2x\n", pHalData->InterfaceSel)); ++ ++} ++ ++VOID + Hal_EfuseParseBTCoexistInfo_8723B( + IN PADAPTER padapter, + IN u8* hwinfo, +@@ -4264,8 +4235,14 @@ Hal_EfuseParseBTCoexistInfo_8723B( + if(tempval !=0xFF){ + pHalData->EEPROMBluetoothAntNum = tempval & BIT(0); + #ifdef CONFIG_USB_HCI +- //if(padapter->interface_type == RTW_USB) +- pHalData->ant_path =ODM_RF_PATH_B;//s0 ++ /* ++ * Note. default BT antenna is s0 for USB, ++ * but the efuse 0xC3[6] is 0, it mean Single antenna use s1 (default). ++ */ ++ if (pHalData->EEPROMBluetoothAntNum == Ant_x2) ++ pHalData->ant_path = ODM_RF_PATH_A; /* s1 */ ++ else ++ pHalData->ant_path = ODM_RF_PATH_B; /* s0 */ + #else //SDIO or PCIE + // EFUSE_0xC3[6] == 0, S1(Main)-ODM_RF_PATH_A; + // EFUSE_0xC3[6] == 1, S0(Aux)-ODM_RF_PATH_B +@@ -4391,6 +4368,15 @@ Hal_EfuseParsePackageType_8723B( + } + + DBG_871X("PackageType = 0x%X\n", pHalData->PackageType); ++ ++#ifdef CONFIG_SDIO_HCI ++ /* RTL8703AS: 0x1FB[5:4] 2b'10 */ ++ /* RTL8723BS: 0x1FB[5:4] 2b'11 */ ++ if ((efuseContent & 0x30) == 0x20) { ++ pAdapter->registrypriv.bw_mode &= 0xF0; ++ DBG_871X("This is the case of 8703AS\n"); ++ } ++#endif + } + + +@@ -4402,12 +4388,11 @@ Hal_EfuseParseVoltage_8723B( + ) + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); +- +- //_rtw_memcpy(pEEPROM->adjuseVoltageVal, &hwinfo[EEPROM_Voltage_ADDR_8723B], 1); ++ ++ //_rtw_memcpy(pHalData->adjuseVoltageVal, &hwinfo[EEPROM_Voltage_ADDR_8723B], 1); + DBG_871X("%s hwinfo[EEPROM_Voltage_ADDR_8723B] =%02x \n",__func__, hwinfo[EEPROM_Voltage_ADDR_8723B]); +- pEEPROM->adjuseVoltageVal = (hwinfo[EEPROM_Voltage_ADDR_8723B] & 0xf0) >> 4 ; +- DBG_871X("%s pEEPROM->adjuseVoltageVal =%x \n",__func__,pEEPROM->adjuseVoltageVal); ++ pHalData->adjuseVoltageVal = (hwinfo[EEPROM_Voltage_ADDR_8723B] & 0xf0) >> 4 ; ++ DBG_871X("%s pHalData->adjuseVoltageVal =%x \n",__func__,pHalData->adjuseVoltageVal); + } + + VOID +@@ -4419,13 +4404,13 @@ Hal_EfuseParseChnlPlan_8723B( + { + padapter->mlmepriv.ChannelPlan = hal_com_config_channel_plan( + padapter +- , hwinfo?hwinfo[EEPROM_ChannelPlan_8723B]:0xFF ++ , hwinfo ? &hwinfo[EEPROM_COUNTRY_CODE_8723B] : NULL ++ , hwinfo ? hwinfo[EEPROM_ChannelPlan_8723B] : 0xFF ++ , padapter->registrypriv.alpha2 + , padapter->registrypriv.channel_plan +- , RT_CHANNEL_DOMAIN_WORLD_NULL ++ , RTW_CHPLAN_WORLD_NULL + , AutoLoadFail + ); +- +- RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("EEPROM ChannelPlan=0x%02x\n", padapter->mlmepriv.ChannelPlan)); + } + + VOID +@@ -4536,7 +4521,7 @@ Hal_EfuseParseThermalMeter_8723B( + + if ((pHalData->EEPROMThermalMeter == 0xff) || (_TRUE == AutoLoadFail)) + { +- pHalData->bAPKThermalMeterIgnore = _TRUE; ++ pHalData->odmpriv.RFCalibrateInfo.bAPKThermalMeterIgnore = _TRUE; + pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_8723B; + } + +@@ -4550,22 +4535,23 @@ void Hal_ReadRFGainOffset( + IN u8* PROMContent, + IN BOOLEAN AutoloadFail) + { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + // + // BB_RF Gain Offset from EEPROM + // + +- if(!AutoloadFail ){ +- Adapter->eeprompriv.EEPROMRFGainOffset =PROMContent[EEPROM_RF_GAIN_OFFSET]; ++ if (!AutoloadFail || (Adapter->registrypriv.RegRfKFreeEnable == 1)) { ++ pHalData->EEPROMRFGainOffset =PROMContent[EEPROM_RF_GAIN_OFFSET]; + DBG_871X("AutoloadFail =%x,\n", AutoloadFail); +- Adapter->eeprompriv.EEPROMRFGainVal=EFUSE_Read1Byte(Adapter, EEPROM_RF_GAIN_VAL); +- DBG_871X("Adapter->eeprompriv.EEPROMRFGainVal=%x\n", Adapter->eeprompriv.EEPROMRFGainVal); ++ pHalData->EEPROMRFGainVal=EFUSE_Read1Byte(Adapter, EEPROM_RF_GAIN_VAL); ++ DBG_871X("pHalData->EEPROMRFGainVal=%x\n", pHalData->EEPROMRFGainVal); + } + else{ +- Adapter->eeprompriv.EEPROMRFGainOffset = 0; +- Adapter->eeprompriv.EEPROMRFGainVal=0xFF; ++ pHalData->EEPROMRFGainOffset = 0; ++ pHalData->EEPROMRFGainVal=0xFF; + DBG_871X("else AutoloadFail =%x,\n", AutoloadFail); + } +- DBG_871X("EEPRORFGainOffset = 0x%02x\n", Adapter->eeprompriv.EEPROMRFGainOffset); ++ DBG_871X("EEPRORFGainOffset = 0x%02x\n", pHalData->EEPROMRFGainOffset); + } + #endif //CONFIG_RF_GAIN_OFFSET + +@@ -4625,7 +4611,7 @@ u8 SCMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib) + else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) + SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ; + else +- DBG_871X("SCMapping: Not Correct Primary40MHz Setting \n"); ++ DBG_871X("SCMapping: DONOT CARE Mode Setting\n"); + } + else + { +@@ -4638,7 +4624,7 @@ u8 SCMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib) + else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) + SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ; + else +- DBG_871X("SCMapping: Not Correct Primary40MHz Setting \n"); ++ DBG_871X("SCMapping: DONOT CARE Mode Setting\n"); + } + } + else if(pHalData->CurrentChannelBW== CHANNEL_WIDTH_40) +@@ -4755,8 +4741,7 @@ static void rtl8723b_fill_default_txdesc( + u8 *pbuf) + { + PADAPTER padapter; +- HAL_DATA_TYPE *pHalData; +- struct dm_priv *pdmpriv; ++ HAL_DATA_TYPE *pHalData; + struct mlme_ext_priv *pmlmeext; + struct mlme_ext_info *pmlmeinfo; + struct pkt_attrib *pattrib; +@@ -4765,8 +4750,7 @@ static void rtl8723b_fill_default_txdesc( + _rtw_memset(pbuf, 0, TXDESC_SIZE); + + padapter = pxmitframe->padapter; +- pHalData = GET_HAL_DATA(padapter); +- pdmpriv = &pHalData->dmpriv; ++ pHalData = GET_HAL_DATA(padapter); + pmlmeext = &padapter->mlmeextpriv; + pmlmeinfo = &(pmlmeext->mlmext_info); + +@@ -4785,8 +4769,12 @@ static void rtl8723b_fill_default_txdesc( + SET_TX_DESC_SEC_TYPE_8723B(pbuf, fill_txdesc_sectype(pattrib)); + fill_txdesc_vcs_8723b(padapter, pattrib, pbuf); + +- if(pattrib->icmp_pkt ==1 && padapter->registrypriv.wifi_spec==1) +- drv_userate = 1; ++#ifdef CONFIG_P2P ++ if (!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) { ++ if (pattrib->icmp_pkt == 1 && padapter->registrypriv.wifi_spec == 1) ++ drv_userate = 1; ++ } ++#endif + + if ((pattrib->ether_type != 0x888e) && + (pattrib->ether_type != 0x0806) && +@@ -4816,11 +4804,11 @@ static void rtl8723b_fill_default_txdesc( + if (pHalData->fw_ractrl == _FALSE) { + SET_TX_DESC_USE_RATE_8723B(pbuf, 1); + +- if (pHalData->dmpriv.INIDATA_RATE[pattrib->mac_id] & BIT(7)) { ++ if (pHalData->INIDATA_RATE[pattrib->mac_id] & BIT(7)) { + SET_TX_DESC_DATA_SHORT_8723B(pbuf, 1); + } + +- SET_TX_DESC_TX_RATE_8723B(pbuf, pHalData->dmpriv.INIDATA_RATE[pattrib->mac_id] & 0x7F); ++ SET_TX_DESC_TX_RATE_8723B(pbuf, pHalData->INIDATA_RATE[pattrib->mac_id] & 0x7F); + } + + // modify data rate by iwpriv +@@ -4867,9 +4855,22 @@ static void rtl8723b_fill_default_txdesc( + #if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) + SET_TX_DESC_USB_TXAGG_NUM_8723B(pbuf, pxmitframe->agg_num); + #endif +- } +- else if (pxmitframe->frame_tag == MGNT_FRAMETAG) +- { ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_XMIT_ACK ++ /* CCX-TXRPT ack for xmit mgmt frames. */ ++ if (pxmitframe->ack_report) { ++ #ifdef DBG_CCX ++ DBG_8192C("%s set spe_rpt\n", __func__); ++ #endif ++ SET_TX_DESC_SPE_RPT_8723B(pbuf, 1); ++ SET_TX_DESC_SW_DEFINE_8723B(pbuf, (u8)(GET_PRIMARY_ADAPTER(padapter)->xmitpriv.seq_no)); ++ } ++#endif /* CONFIG_XMIT_ACK */ ++#endif ++ } ++ else if (pxmitframe->frame_tag == MGNT_FRAMETAG) ++ { + // RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: MGNT_FRAMETAG\n", __FUNCTION__)); + + SET_TX_DESC_MACID_8723B(pbuf, pattrib->mac_id); +@@ -4981,6 +4982,7 @@ static void rtl8723b_fill_default_txdesc( + */ + void rtl8723b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf) + { ++ PADAPTER padapter = pxmitframe->padapter; + rtl8723b_fill_default_txdesc(pxmitframe, pbuf); + + #ifdef CONFIG_ANTENNA_DIVERSITY +@@ -4992,90 +4994,6 @@ void rtl8723b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf) + #endif + } + +-// +-// Description: In normal chip, we should send some packet to Hw which will be used by Fw +-// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then +-// Fw can tell Hw to send these packet derectly. +-// Added by tynli. 2009.10.15. +-// +-//type1:pspoll, type2:null +-void rtl8723b_fill_fake_txdesc( +- PADAPTER padapter, +- u8* pDesc, +- u32 BufferLen, +- u8 IsPsPoll, +- u8 IsBTQosNull, +- u8 bDataFrame) +-{ +- // Clear all status +- _rtw_memset(pDesc, 0, TXDESC_SIZE); +- +- SET_TX_DESC_FIRST_SEG_8723B(pDesc, 1); //bFirstSeg; +- SET_TX_DESC_LAST_SEG_8723B(pDesc, 1); //bLastSeg; +- +- SET_TX_DESC_OFFSET_8723B(pDesc, 0x28); // Offset = 32 +- +- SET_TX_DESC_PKT_SIZE_8723B(pDesc, BufferLen); // Buffer size + command header +- SET_TX_DESC_QUEUE_SEL_8723B(pDesc, QSLT_MGNT); // Fixed queue of Mgnt queue +- +- // Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. +- if (_TRUE == IsPsPoll) +- { +- SET_TX_DESC_NAV_USE_HDR_8723B(pDesc, 1); +- } +- else +- { +- SET_TX_DESC_HWSEQ_EN_8723B(pDesc, 1); // Hw set sequence number +- SET_TX_DESC_HWSEQ_SEL_8723B(pDesc, 0); +- } +- +- if (_TRUE ==IsBTQosNull) +- { +- SET_TX_DESC_BT_INT_8723B(pDesc, 1); +- } +- +- SET_TX_DESC_USE_RATE_8723B(pDesc, 1); // use data rate which is set by Sw +- SET_TX_DESC_OWN_8723B((pu1Byte)pDesc, 1); +- +- SET_TX_DESC_TX_RATE_8723B(pDesc, DESC8723B_RATE1M); +- +- // +- // Encrypt the data frame if under security mode excepct null data. Suggested by CCW. +- // +- if (_TRUE ==bDataFrame) +- { +- u32 EncAlg; +- +- EncAlg = padapter->securitypriv.dot11PrivacyAlgrthm; +- switch (EncAlg) +- { +- case _NO_PRIVACY_: +- SET_TX_DESC_SEC_TYPE_8723B(pDesc, 0x0); +- break; +- case _WEP40_: +- case _WEP104_: +- case _TKIP_: +- SET_TX_DESC_SEC_TYPE_8723B(pDesc, 0x1); +- break; +- case _SMS4_: +- SET_TX_DESC_SEC_TYPE_8723B(pDesc, 0x2); +- break; +- case _AES_: +- SET_TX_DESC_SEC_TYPE_8723B(pDesc, 0x3); +- break; +- default: +- SET_TX_DESC_SEC_TYPE_8723B(pDesc, 0x0); +- break; +- } +- } +- +-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +- // USB interface drop packet if the checksum of descriptor isn't correct. +- // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). +- rtl8723b_cal_txdesc_chksum((struct tx_desc*)pDesc); +-#endif +-} +- + #ifdef CONFIG_TSF_RESET_OFFLOAD + int reset_tsf(PADAPTER Adapter, u8 reset_port ) + { +@@ -5097,10 +5015,73 @@ int reset_tsf(PADAPTER Adapter, u8 reset_port ) + } + #endif // CONFIG_TSF_RESET_OFFLOAD + ++static void hw_var_set_monitor(PADAPTER Adapter, u8 variable, u8 *val) ++{ ++ u32 value_rcr, rcr_bits; ++ u16 value_rxfltmap2; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++ if (*((u8 *)val) == _HW_STATE_MONITOR_) { ++ ++ /* Leave IPS */ ++ rtw_pm_set_ips(Adapter, IPS_NONE); ++ LeaveAllPowerSaveMode(Adapter); ++ ++ /* Receive all type */ ++ rcr_bits = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_APWRMGT | RCR_ADF | RCR_ACF | RCR_AMF | RCR_APP_PHYST_RXFF; ++ ++ /* Append FCS */ ++ rcr_bits |= RCR_APPFCS; ++ ++ #if 0 ++ /* ++ CRC and ICV packet will drop in recvbuf2recvframe() ++ We no turn on it. ++ */ ++ rcr_bits |= (RCR_ACRC32 | RCR_AICV); ++ #endif ++ ++ /* Receive all data frames */ ++ value_rxfltmap2 = 0xFFFF; ++ ++ value_rcr = rcr_bits; ++ rtw_write32(Adapter, REG_RCR, value_rcr); ++ ++ rtw_write16(Adapter, REG_RXFLTMAP2, value_rxfltmap2); ++ ++ #if 0 ++ /* tx pause */ ++ rtw_write8(padapter, REG_TXPAUSE, 0xFF); ++ #endif ++ } else { ++ /* do nothing */ ++ } ++ ++} ++ + static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8* val) + { + u8 val8; + u8 mode = *((u8 *)val); ++ static u8 isMonitor = _FALSE; ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (isMonitor == _TRUE) { ++ /* reset RCR */ ++ rtw_write32(padapter, REG_RCR, pHalData->ReceiveConfig); ++ isMonitor = _FALSE; ++ } ++ ++ if (mode == _HW_STATE_MONITOR_) { ++ isMonitor = _TRUE; ++ /* set net_type */ ++ Set_MSR(padapter, _HW_STATE_NOLINK_); ++ ++ hw_var_set_monitor(padapter, variable, val); ++ return; ++ } + + #ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) +@@ -5588,27 +5569,38 @@ static void hw_var_set_mlme_disconnect(PADAPTER padapter, u8 variable, u8 *val) + + static void hw_var_set_mlme_sitesurvey(PADAPTER padapter, u8 variable, u8* val) + { ++ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + u32 value_rcr, rcr_clear_bit, reg_bcn_ctl; ++#ifdef CONFIG_CONCURRENT_MODE ++ u32 buddy_reg_bcn_ctl; ++#endif + u16 value_rxfltmap2; + u8 val8; + PHAL_DATA_TYPE pHalData; + struct mlme_priv *pmlmepriv; +- ++ u8 ap_num; + + pHalData = GET_HAL_DATA(padapter); + pmlmepriv = &padapter->mlmepriv; + + #ifdef CONFIG_CONCURRENT_MODE +- if (padapter->iface_type == IFACE_PORT1) ++ if (padapter->iface_type == IFACE_PORT1) { + reg_bcn_ctl = REG_BCN_CTRL_1; +- else +-#endif ++ buddy_reg_bcn_ctl = REG_BCN_CTRL; ++ } else { + reg_bcn_ctl = REG_BCN_CTRL; ++ buddy_reg_bcn_ctl = REG_BCN_CTRL_1; ++ } ++#else ++ reg_bcn_ctl = REG_BCN_CTRL; ++#endif ++ ++ rtw_dev_iface_status(padapter, NULL, NULL, NULL, &ap_num, NULL); + + #ifdef CONFIG_FIND_BEST_CHANNEL + rcr_clear_bit = (RCR_CBSSID_BCN | RCR_CBSSID_DATA); + +- // Recieve all data frames ++ /* Receive all data frames */ + value_rxfltmap2 = 0xFFFF; + #else // CONFIG_FIND_BEST_CHANNEL + +@@ -5639,33 +5631,47 @@ static void hw_var_set_mlme_sitesurvey(PADAPTER padapter, u8 variable, u8* val) + + if (*((u8*)val)) + { +- // under sitesurvey +- value_rcr &= ~(rcr_clear_bit); +- rtw_write32(padapter, REG_RCR, value_rcr); ++ /* ++ * 1. configure REG_RXFLTMAP2 ++ * 2. disable TSF update & buddy TSF update to avoid updating wrong TSF due to clear RCR_CBSSID_BCN ++ * 3. config RCR to receive different BSSID BCN or probe rsp ++ */ + + rtw_write16(padapter, REG_RXFLTMAP2, value_rxfltmap2); + +- if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) +- { +- // disable update TSF +- val8 = rtw_read8(padapter, reg_bcn_ctl); +- val8 |= DIS_TSF_UDT; +- rtw_write8(padapter, reg_bcn_ctl, val8); ++ if (rtw_linked_check(padapter) && ++ check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) { ++ /* disable update TSF */ ++ rtw_write8(padapter, reg_bcn_ctl, rtw_read8(padapter, reg_bcn_ctl)|DIS_TSF_UDT); ++ padapter->mlmeextpriv.en_hw_update_tsf = _FALSE; + } + ++#ifdef CONFIG_CONCURRENT_MODE ++ if (rtw_linked_check(padapter->pbuddy_adapter) && ++ check_fwstate(&padapter->pbuddy_adapter->mlmepriv, WIFI_AP_STATE) != _TRUE) { ++ /* disable update buddy TSF to avoid updating wrong TSF due to clear RCR_CBSSID_BCN */ ++ rtw_write8(padapter->pbuddy_adapter, buddy_reg_bcn_ctl, ++ rtw_read8(padapter->pbuddy_adapter, buddy_reg_bcn_ctl)|DIS_TSF_UDT); ++ padapter->pbuddy_adapter->mlmeextpriv.en_hw_update_tsf = _FALSE; ++ } ++#endif ++ value_rcr &= ~(rcr_clear_bit); ++ rtw_write32(padapter, REG_RCR, value_rcr); ++ + // Save orignal RRSR setting. + pHalData->RegRRSR = rtw_read16(padapter, REG_RRSR); + +-#ifdef CONFIG_CONCURRENT_MODE +- if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && +- check_buddy_fwstate(padapter, _FW_LINKED)) +- { ++ if (ap_num) + StopTxBeacon(padapter); +- } +-#endif + } + else + { ++ /* ++ * 1. enable rx data frame ++ * 2. config RCR not to receive different BSSID BCN or probe rsp ++ * 3. doesn't enable TSF update & buddy TSF right now to avoid HW conflict ++ * so, we enable TSF update when rx first BCN after sitesurvey done ++ */ + // sitesurvey done + if (check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) + #ifdef CONFIG_CONCURRENT_MODE +@@ -5677,27 +5683,45 @@ static void hw_var_set_mlme_sitesurvey(PADAPTER padapter, u8 variable, u8* val) + rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF); + } + +- if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) +- { +- // enable update TSF +- val8 = rtw_read8(padapter, reg_bcn_ctl); +- val8 &= ~DIS_TSF_UDT; +- rtw_write8(padapter, reg_bcn_ctl, val8); +- } +- + value_rcr |= rcr_clear_bit; + rtw_write32(padapter, REG_RCR, value_rcr); + ++ if (rtw_linked_check(padapter) && ++ check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ padapter->mlmeextpriv.en_hw_update_tsf = _TRUE; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (rtw_linked_check(padapter->pbuddy_adapter) && ++ check_fwstate(&padapter->pbuddy_adapter->mlmepriv, WIFI_AP_STATE) != _TRUE) ++ /* disable update buddy TSF to avoid updating wrong TSF due to clear RCR_CBSSID_BCN */ ++ padapter->pbuddy_adapter->mlmeextpriv.en_hw_update_tsf = _TRUE; ++#endif ++ + // Restore orignal RRSR setting. + rtw_write16(padapter, REG_RRSR, pHalData->RegRRSR); + +-#ifdef CONFIG_CONCURRENT_MODE +- if (check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && +- check_buddy_fwstate(padapter, _FW_LINKED)) +- { ++ if (ap_num) { ++ int i; ++ _adapter *iface; ++ + ResumeTxBeacon(padapter); ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ iface = dvobj->padapters[i]; ++ if (!iface) ++ continue; ++ ++ if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE ++ && check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE ++ ) { ++ iface->mlmepriv.update_bcn = _TRUE; ++ #ifndef CONFIG_INTERRUPT_BASED_TXBCN ++ #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ tx_beacon_hdl(iface, NULL); ++ #endif ++ #endif ++ } ++ } + } +-#endif + } + } + +@@ -5710,14 +5734,11 @@ static void hw_var_set_mlme_join(PADAPTER padapter, u8 variable, u8 *val) + u8 type; + PHAL_DATA_TYPE pHalData; + struct mlme_priv *pmlmepriv; +- EEPROM_EFUSE_PRIV *pEEPROM; +- + + RetryLimit = 0x30; + type = *(u8*)val; + pHalData = GET_HAL_DATA(padapter); + pmlmepriv = &padapter->mlmepriv; +- pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + + #ifdef CONFIG_CONCURRENT_MODE + if (type == 0) +@@ -5747,7 +5768,7 @@ static void hw_var_set_mlme_join(PADAPTER padapter, u8 variable, u8 *val) + + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + { +- RetryLimit = (pEEPROM->CustomerID == RT_CID_CCX) ? 7 : 48; ++ RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; + } + else // Ad-hoc Mode + { +@@ -5821,7 +5842,7 @@ static void hw_var_set_mlme_join(PADAPTER padapter, u8 variable, u8 *val) + + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + { +- RetryLimit = (pEEPROM->CustomerID == RT_CID_CCX) ? 7 : 48; ++ RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; + } + else // Ad-hoc Mode + { +@@ -5850,6 +5871,40 @@ static void hw_var_set_mlme_join(PADAPTER padapter, u8 variable, u8 *val) + #endif // !CONFIG_CONCURRENT_MODE + } + ++static void hw_var_set_hw_update_tsf(PADAPTER padapter) ++{ ++ ++ u16 reg_bcn_ctl; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->iface_type == IFACE_PORT1) ++ reg_bcn_ctl = REG_BCN_CTRL_1; ++ else ++ reg_bcn_ctl = REG_BCN_CTRL; ++#else ++ reg_bcn_ctl = REG_BCN_CTRL; ++#endif ++ ++ if (!pmlmeext->en_hw_update_tsf) ++ return; ++ ++ /* check REG_RCR bit is set */ ++ if (!(rtw_read32(padapter, REG_RCR) & RCR_CBSSID_BCN)) { ++ pmlmeext->en_hw_update_tsf = _FALSE; ++ return; ++ } ++ ++ /* enable hw update tsf function for non-AP */ ++ if (rtw_linked_check(padapter) && ++ check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ /* enable update buddy TSF */ ++ rtw_write8(padapter, reg_bcn_ctl, rtw_read8(padapter, reg_bcn_ctl)&(~DIS_TSF_UDT)); ++ ++ pmlmeext->en_hw_update_tsf = _FALSE; ++} ++ + void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len) + { + u8 seq_no; +@@ -5878,70 +5933,6 @@ void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len) + #endif + } + +-#ifdef CONFIG_FW_C2H_DEBUG +-/* +- * C2H RX package original is 128. +- * If enable CONFIG_FW_C2H_DEBUG, it should increase to 256. +- * C2H FW debug message: +- * without aggregate: +- * {C2H CmdID, Seq, SubID, Len, Content[0~n]} +- * Content[0~n] = { 'a' , 'b' , 'c' ,..., 'z' , '\n'} +- * +- * with aggregate: +- * {C2H CmdID, Seq, SubID, Len, Content[0~n]} +- * Content[0~n] = { 'a' , 'b' , 'c' ,..., 'z', '\n' , Extend C2H pkt 2...} +- * Extend C2H pkt 2 = {C2H CmdID, Seq, SubID, Len, Content = { 'a' , 'b' , 'c' ,..., 'z' , '\n'}} +- * +- * Author: Isaac +- */ +-void Debug_FwC2H_8723b(PADAPTER padapter, u8 *pdata, u8 len) +-{ +- int i = 0; +- int cnt = 0, total_length = 0; +- u8 buf[128]={0}; +- u8 more_data = _FALSE; +- u8 *nextdata = NULL; +- u8 test = 0; +- +- u8 data_len; +- u8 seq_no; +- +- nextdata = pdata; +-#if 0 +- for (i = 0 ; i < len ; i++) { +- printk("%02x ", pdata[i]); +- if ((i + 1)%8 == 0) +- printk("\n"); +- } +- printk("\n"); +-#endif +- do { +- data_len = *(nextdata + 1); +- seq_no = *(nextdata + 2); +- +- for (i = 0 ; i < data_len - 2 ; i++) { +- cnt += sprintf((buf+cnt), "%c", nextdata[3 + i]); +- +- if (nextdata[3 + i] == 0x0a && nextdata[4 + i] == 0xff) { +- more_data = _TRUE; +- } else if (nextdata[3 + i] == 0x0a && nextdata[4 + i] != 0xff) { +- more_data = _FALSE; +- } +- } +- +- DBG_871X("[RTKFW, SEQ=%d]: %s", seq_no, buf); +- data_len += 3; +- total_length += data_len; +- +- if (more_data == _TRUE) { +- _rtw_memset(buf, '\0', 128); +- cnt = 0; +- nextdata = (pdata + total_length); +- } +- } while (more_data == _TRUE); +-} +-#endif //CONFIG_FW_C2H_DEBUG +- + s32 c2h_id_filter_ccx_8723b(u8 *buf) + { + struct c2h_evt_hdr_88xx *c2h_evt = (struct c2h_evt_hdr_88xx *)buf; +@@ -5968,78 +5959,33 @@ s32 c2h_handler_8723b(PADAPTER padapter, u8 *buf) + goto exit; + } + +- switch (pC2hEvent->id) +- { +- case C2H_AP_RPT_RSP: +- { +-//YJ,TODO,130407 +-#if 0 +- u4Byte c2h_ap_keeplink = _TRUE; +- if (c2hBuf[2] == 0 && c2hBuf[3] == 0) +- c2h_ap_keeplink = _FALSE; +- else +- c2h_ap_keeplink = _TRUE; +- +- if (_TRUE == pmlmeext->try_ap_c2h_wait) { +- if (_FALSE == c2h_ap_keeplink) { +- pmlmeext->try_ap_c2h_wait = _FALSE; +- RT_TRACE(_module_hal_init_c_, _drv_err_,("fw tell us link is off\n")); +- receive_disconnect(padapter, pmlmeinfo->network.MacAddress , 65535); +- } else { +- RT_TRACE(_module_hal_init_c_, _drv_err_,("fw tell us link is on\n")); +- } +- } else { +- RT_TRACE(_module_hal_init_c_, _drv_err_,("we don't need this C2H\n")); +- } +- pmlmeext->check_ap_processing = _FALSE; +-#endif +- } +- break; +- case C2H_DBG: +- { +- RT_TRACE(_module_hal_init_c_, _drv_info_, ("c2h_handler_8723b: %s\n", pC2hEvent->payload)); +- } +- break; ++ switch (pC2hEvent->id) { ++ case C2H_DBG: ++ RT_TRACE(_module_hal_init_c_, _drv_info_, ("c2h_handler_8723b: %s\n", pC2hEvent->payload)); ++ break; + +- case C2H_CCX_TX_RPT: +-// CCX_FwC2HTxRpt(padapter, QueueID, pC2hEvent->payload); +- break; ++ case C2H_CCX_TX_RPT: ++ /* CCX_FwC2HTxRpt(padapter, QueueID, pC2hEvent->payload); */ ++ break; + + #ifdef CONFIG_BT_COEXIST +-#ifdef CONFIG_PCI_HCI +- case C2H_BT_RSSI: +-// fwc2h_ODM(padapter, tmpBuf, &C2hEvent); +- //BT_FwC2hBtRssi(padapter, pC2hEvent->payload); +- break; +-#endif ++ case C2H_BT_INFO: ++ rtw_btcoex_BtInfoNotify(padapter, pC2hEvent->plen, pC2hEvent->payload); ++ break; + #endif + +- case C2H_EXT_RA_RPT: +-// C2HExtRaRptHandler(padapter, pC2hEvent->payload, C2hEvent.CmdLen); +- break; +- +- case C2H_HW_INFO_EXCH: +- RT_TRACE(_module_hal_init_c_, _drv_info_, ("[BT], C2H_HW_INFO_EXCH\n")); +- for (index = 0; index < pC2hEvent->plen; index++) +- { +- RT_TRACE(_module_hal_init_c_, _drv_info_, ("[BT], tmpBuf[%d]=0x%x\n", index, pC2hEvent->payload[index])); +- } +- break; +- ++ case C2H_BT_MP_INFO: ++ DBG_8192C("%s: [C2H_BT_MP_INFO] pC2hEvent->plen=%d\n", __FUNCTION__, pC2hEvent->plen); ++#ifdef CONFIG_MP_INCLUDED ++ MPTBT_FwC2hBtMpCtrl(padapter, pC2hEvent->payload, pC2hEvent->plen); ++#endif /* CONFIG_MP_INCLUDED */ + #ifdef CONFIG_BT_COEXIST +- case C2H_8723B_BT_INFO: +- rtw_btcoex_BtInfoNotify(padapter, pC2hEvent->plen, pC2hEvent->payload); +- break; +-#endif ++ rtw_btcoex_BtMpRptNotify(padapter, pC2hEvent->plen, pC2hEvent->payload); ++#endif /* CONFIG_BT_COEXIST */ ++ break; + +-#ifdef CONFIG_MP_INCLUDED +- case C2H_8723B_BT_MP_INFO: +- DBG_8192C(" %s, C2H_8723B_BT_MP_INFO pC2hEvent->plen=%d\n",__func__,pC2hEvent->plen); +- MPTBT_FwC2hBtMpCtrl(padapter, pC2hEvent->payload, pC2hEvent->plen); +- break; +-#endif +- default: +- break; ++ default: ++ break; + } + + // Clear event to notify FW we have read the command. +@@ -6056,90 +6002,44 @@ static void process_c2h_event(PADAPTER padapter, PC2H_EVT_HDR pC2hEvent, u8 *c2h + PHAL_DATA_TYPE pHalData=GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + + if (c2hBuf == NULL) { + DBG_8192C("%s c2hbuff is NULL\n",__FUNCTION__); + return; + } + +- switch (pC2hEvent->CmdID) +- { +- case C2H_AP_RPT_RSP: +- #if 0 +- { +- +- u4Byte c2h_ap_keeplink = _TRUE; +- if (c2hBuf[2] == 0 && c2hBuf[3] == 0) +- c2h_ap_keeplink = _FALSE; +- else +- c2h_ap_keeplink = _TRUE; +- +- if (_TRUE == pmlmeext->try_ap_c2h_wait) { +- if (_FALSE == c2h_ap_keeplink) { +- pmlmeext->try_ap_c2h_wait = _FALSE; +- RT_TRACE(_module_hal_init_c_, _drv_err_,("fw tell us link is off\n")); +- receive_disconnect(padapter, pmlmeinfo->network.MacAddress , 65535); +- } else { +- RT_TRACE(_module_hal_init_c_, _drv_err_,("fw tell us link is on\n")); +- } +- } else { +- RT_TRACE(_module_hal_init_c_, _drv_err_,("we don't need this C2H\n")); +- } +- pmlmeext->check_ap_processing = _FALSE; +- } +- #endif +- break; +- case C2H_DBG: +- { +- RT_TRACE(_module_hal_init_c_, _drv_info_, ("C2HCommandHandler: %s\n", c2hBuf)); +- } +- break; +- +- case C2H_CCX_TX_RPT: +- CCX_FwC2HTxRpt_8723b(padapter, c2hBuf, pC2hEvent->CmdLen); +- break; +- +-#ifdef CONFIG_BT_COEXIST +-#ifdef CONFIG_PCI_HCI +- case C2H_BT_RSSI: +-// fwc2h_ODM(padapter, tmpBuf, &C2hEvent); +- //BT_FwC2hBtRssi(padapter, c2hBuf); +- break; +-#endif +-#endif +- +- case C2H_EXT_RA_RPT: +-// C2HExtRaRptHandler(padapter, tmpBuf, C2hEvent.CmdLen); +- break; ++ switch (pC2hEvent->CmdID) { ++ case C2H_CCX_TX_RPT: ++ CCX_FwC2HTxRpt_8723b(padapter, c2hBuf, pC2hEvent->CmdLen); ++ break; + +- case C2H_HW_INFO_EXCH: +- RT_TRACE(_module_hal_init_c_, _drv_info_, ("[BT], C2H_HW_INFO_EXCH\n")); +- for (index = 0; index < pC2hEvent->CmdLen; index++) +- { +- RT_TRACE(_module_hal_init_c_, _drv_info_, ("[BT], tmpBuf[%d]=0x%x\n", index, c2hBuf[index])); +- } +- break; ++#ifdef CONFIG_FW_C2H_DEBUG ++ case C2H_EXTEND: ++ Debug_FwC2H(padapter, c2hBuf, pC2hEvent->CmdLen); ++ break; ++#endif /* CONFIG_FW_C2H_DEBUG*/ + + #ifdef CONFIG_BT_COEXIST +- case C2H_8723B_BT_INFO: +- rtw_btcoex_BtInfoNotify(padapter, pC2hEvent->CmdLen, c2hBuf); +- break; ++ case C2H_BT_INFO: ++ rtw_btcoex_BtInfoNotify(padapter, pC2hEvent->CmdLen, c2hBuf); ++ break; + #endif + ++ case C2H_BT_MP_INFO: + #ifdef CONFIG_MP_INCLUDED +- case C2H_8723B_BT_MP_INFO: +- MPTBT_FwC2hBtMpCtrl(padapter, c2hBuf, pC2hEvent->CmdLen); +- break; +-#endif +- +-#ifdef CONFIG_FW_C2H_DEBUG +- case C2H_8723B_FW_DEBUG: +- Debug_FwC2H_8723b(padapter, c2hBuf, pC2hEvent->CmdLen); +- break; +-#endif // CONFIG_FW_C2H_DEBUG ++ MPTBT_FwC2hBtMpCtrl(padapter, c2hBuf, pC2hEvent->CmdLen); ++#endif /* CONFIG_MP_INCLUDED */ ++#ifdef CONFIG_BT_COEXIST ++ rtw_btcoex_BtMpRptNotify(padapter, pC2hEvent->CmdLen, c2hBuf); ++#endif /* CONFIG_BT_COEXIST */ ++ break; + +- default: +- break; ++ default: ++ if (!(phydm_c2H_content_parsing(pDM_Odm, pC2hEvent->CmdID, pC2hEvent->CmdLen, c2hBuf))) ++ RT_TRACE(_module_hal_init_c_, _drv_info_, ("%s: [WARNING] unknown C2H(0x%02x)\n", __func__, c2hCmdId)); ++ ++ break; + } + + #ifndef CONFIG_C2H_PACKET_EN +@@ -6198,19 +6098,33 @@ void rtl8723b_c2h_packet_handler(PADAPTER padapter, u8 *pbuf, u16 length) + + switch (C2hEvent.CmdID) { + case C2H_CCX_TX_RPT: ++#ifdef CONFIG_BT_COEXIST ++ case C2H_BT_MP_INFO: ++#endif /* CONFIG_BT_COEXIST */ + #ifdef CONFIG_FW_C2H_DEBUG +- case C2H_8723B_FW_DEBUG: ++ case C2H_EXTEND: + #endif // CONFIG_FW_C2H_DEBUG + process_c2h_event(padapter, &C2hEvent, pdata); + break; + ++ case C2H_BCN_EARLY_RPT: ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++ rtw_tdls_ch_sw_back_to_base_chnl(padapter); ++#endif ++#endif ++ break; ++ ++ case C2H_FW_CHNL_SWITCH_COMPLETE: ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++ rtw_tdls_chsw_oper_done(padapter); ++#endif ++#endif ++ break; ++ + default: +- pdata = rtw_zmalloc(length); +- if (pdata == NULL) +- break; +- _rtw_memcpy(pdata, pbuf, length); +- if (rtw_c2h_packet_wk_cmd(padapter, pdata, length) == _FAIL) +- rtw_mfree(pdata, length); ++ rtw_c2h_packet_wk_cmd(padapter, pbuf, length); + break; + } + } +@@ -6339,7 +6253,7 @@ _func_enter_; + { + struct mlme_ext_info *mlmext_info = &padapter->mlmeextpriv.mlmext_info; + u16 input_b = 0, masked = 0, ioted = 0, BrateCfg = 0; +- u16 rrsr_2g_force_mask = (RRSR_11M|RRSR_5_5M|RRSR_1M); ++ u16 rrsr_2g_force_mask = RRSR_CCK_RATES; + u16 rrsr_2g_allow_mask = (RRSR_24M|RRSR_12M|RRSR_6M|RRSR_CCK_RATES); + + HalSetBrateCfg(padapter, val, &BrateCfg); +@@ -6527,18 +6441,6 @@ _func_enter_; + rtw_write32(padapter, RWCAM, BIT(31)|BIT(30)); + break; + +- case HW_VAR_CAM_WRITE: +- { +- u32 cmd; +- u32 *cam_val = (u32*)val; +- +- rtw_write32(padapter, WCAMI, cam_val[0]); +- +- cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1]; +- rtw_write32(padapter, RWCAM, cmd); +- } +- break; +- + case HW_VAR_AC_PARAM_VO: + rtw_write32(padapter, REG_EDCA_VO_PARAM, *((u32*)val)); + break; +@@ -6605,7 +6507,7 @@ _func_enter_; + + // Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power + // saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. +- if ((psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(pHalData->VersionID))) ++ if (psmode != PS_MODE_ACTIVE) + { + ODM_RF_Saving(&pHalData->odmpriv, _TRUE); + } +@@ -6635,43 +6537,10 @@ _func_enter_; + case HW_VAR_TDLS_WRCR: + rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)&(~RCR_CBSSID_DATA )); + break; +- case HW_VAR_TDLS_INIT_CH_SEN: +- { +- rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)&(~ RCR_CBSSID_DATA )&(~RCR_CBSSID_BCN )); +- rtw_write16(padapter, REG_RXFLTMAP2,0xffff); +- +- //disable update TSF +- rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|DIS_TSF_UDT); +- } +- break; +- case HW_VAR_TDLS_DONE_CH_SEN: +- { +- //enable update TSF +- rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~ DIS_TSF_UDT)); +- rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|(RCR_CBSSID_BCN )); +- } +- break; + case HW_VAR_TDLS_RS_RCR: + rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|(RCR_CBSSID_DATA)); + break; + #endif //CONFIG_TDLS +-#ifdef CONFIG_SW_ANTENNA_DIVERSITY +- case HW_VAR_ANTENNA_DIVERSITY_LINK: +- //SwAntDivRestAfterLink8192C(padapter); +- ODM_SwAntDivRestAfterLink(&pHalData->odmpriv); +- break; +- +- case HW_VAR_ANTENNA_DIVERSITY_SELECT: +- { +- u8 Optimum_antenna = *val; +- +- //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); +- +- //PHY_SetBBReg(padapter, rFPGA0_XA_RFInterfaceOE, 0x300, Optimum_antenna); +- ODM_SetAntenna(&pHalData->odmpriv, Optimum_antenna); +- } +- break; +-#endif + + case HW_VAR_EFUSE_USAGE: + pHalData->EfuseUsedPercentage = *val; +@@ -6734,7 +6603,10 @@ _func_enter_; + } + } + break; +- ++ case HW_VAR_RESTORE_HW_SEQ: ++ /* restore Sequence No. */ ++ rtw_write8(padapter, 0x4dc, padapter->xmitpriv.nqos_ssn); ++ break; + #ifdef CONFIG_CONCURRENT_MODE + case HW_VAR_CHECK_TXBUF: + { +@@ -6801,16 +6673,6 @@ _func_enter_; + break; + #endif + +- case HW_VAR_H2C_MEDIA_STATUS_RPT: +- { +- u16 mstatus_rpt = (*(u16 *)val); +- u8 mstatus, macId; +- +- mstatus = (u8) (mstatus_rpt & 0xFF); +- macId = (u8)(mstatus_rpt >> 8) ; +- rtl8723b_set_FwMediaStatusRpt_cmd(padapter , mstatus, macId); +- } +- break; + case HW_VAR_BCN_VALID: + #ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) +@@ -6849,7 +6711,10 @@ _func_enter_; + break; + + case HW_VAR_DO_IQK: +- pHalData->bNeedIQK = _TRUE; ++ if (*val) ++ pHalData->bNeedIQK = _TRUE; ++ else ++ pHalData->bNeedIQK = _FALSE; + break; + + case HW_VAR_DL_RSVD_PAGE: +@@ -6934,7 +6799,31 @@ _func_enter_; + rtw_write32(padapter, reg_macid_sleep, val32); + } + break; +- ++#ifdef CONFIG_GPIO_WAKEUP ++ case HW_SET_GPIO_WL_CTRL: ++ { ++ u8 enable = *val; ++ u8 value = rtw_read8(padapter, 0x4e); ++ if (enable && (value & BIT(6))) { ++ value &= ~BIT(6); ++ rtw_write8(padapter, 0x4e, value); ++ } else if (enable == _FALSE){ ++ value |= BIT(6); ++ rtw_write8(padapter, 0x4e, value); ++ } ++ DBG_871X("%s: set WL control, 0x4E=0x%02X\n", ++ __func__, rtw_read8(padapter, 0x4e)); ++ } ++ break; ++#endif ++ case HW_VAR_EN_HW_UPDATE_TSF: ++ hw_var_set_hw_update_tsf(padapter); ++ break; ++#if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) ++ case HW_VAR_TDLS_BCN_EARLY_C2H_RPT: ++ rtl8723b_set_BcnEarly_C2H_Rpt_cmd(padapter, *val); ++ break; ++#endif + default: + SetHwReg(padapter, variable, val); + break; +@@ -7046,7 +6935,7 @@ void GetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val) + // When we halt NIC, we should check if FW LPS is leave. + u32 valRCR; + +- if ((padapter->bSurpriseRemoved == _TRUE) || ++ if (rtw_is_surprise_removed(padapter) || + (adapter_to_pwrctl(padapter)->rf_pwrstate == rf_off)) + { + // If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, +@@ -7065,12 +6954,6 @@ void GetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val) + } + break; + +-#ifdef CONFIG_ANTENNA_DIVERSITY +- case HW_VAR_CURRENT_ANTENNA: +- *val = pHalData->CurAntenna; +- break; +-#endif +- + case HW_VAR_EFUSE_USAGE: + *val = pHalData->EfuseUsedPercentage; + break; +@@ -7166,6 +7049,88 @@ _func_exit_; + } + #endif // CONFIG_C2H_PACKET_EN + ++void hal_ra_info_dump(_adapter *padapter , void *sel) ++{ ++ int i; ++ u8 mac_id; ++ u32 cmd; ++ u32 ra_info1, ra_info2, bw_set; ++ u32 rate_mask1, rate_mask2; ++ u8 curr_tx_rate, curr_tx_sgi, hight_rate, lowest_rate; ++ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); ++ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); ++ HAL_DATA_TYPE *HalData = GET_HAL_DATA(padapter); ++ ++ for (i = 0; i < macid_ctl->num; i++) { ++ ++ if (rtw_macid_is_used(macid_ctl, i) && !rtw_macid_is_bmc(macid_ctl, i)) { ++ ++ mac_id = (u8) i; ++ DBG_871X_SEL(sel , "============ RA status check Mac_id:%d ===================\n", mac_id); ++ ++ cmd = 0x40000100 | mac_id; ++ rtw_write32(padapter, REG_HMEBOX_DBG_2_8723B, cmd); ++ rtw_msleep_os(10); ++ ra_info1 = rtw_read32(padapter, 0x2F0); ++ curr_tx_rate = ra_info1&0x7F; ++ curr_tx_sgi = (ra_info1>>7)&0x01; ++ ++ DBG_871X_SEL(sel , "[ ra_info1:0x%08x ] =>cur_tx_rate= %s,cur_sgi:%d\n", ra_info1, HDATA_RATE(curr_tx_rate), curr_tx_sgi); ++ DBG_871X_SEL(sel , "[ ra_info1:0x%08x ] =>PWRSTS = 0x%02x\n", ra_info1, (ra_info1>>8) & 0x07); ++ ++ cmd = 0x40000400 | mac_id; ++ rtw_write32(padapter, REG_HMEBOX_DBG_2_8723B, cmd); ++ rtw_msleep_os(10); ++ ra_info1 = rtw_read32(padapter, 0x2F0); ++ ra_info2 = rtw_read32(padapter, 0x2F4); ++ rate_mask1 = rtw_read32(padapter, 0x2F8); ++ rate_mask2 = rtw_read32(padapter, 0x2FC); ++ hight_rate = ra_info2 & 0xFF; ++ lowest_rate = (ra_info2>>8) & 0xFF; ++ bw_set = (ra_info1 >> 8) & 0xFF; ++ ++ DBG_871X_SEL(sel , "[ ra_info1:0x%08x ] => VHT_EN=0x%02x, ", ra_info1, (ra_info1>>24) & 0xFF); ++ ++ switch (bw_set) { ++ ++ case CHANNEL_WIDTH_20: ++ DBG_871X_SEL(sel , "BW_setting=20M\n"); ++ break; ++ ++ case CHANNEL_WIDTH_40: ++ DBG_871X_SEL(sel , "BW_setting=40M\n "); ++ break; ++ ++ case CHANNEL_WIDTH_80: ++ DBG_871X_SEL(sel , "BW_setting=80M\n"); ++ break; ++ ++ case CHANNEL_WIDTH_160: ++ DBG_871X_SEL(sel , "BW_setting=160M\n"); ++ break; ++ ++ default: ++ DBG_871X_SEL(sel , "BW_setting=0x%02x\n", bw_set); ++ break; ++ ++ } ++ ++ DBG_871X_SEL(sel , "[ ra_info1:0x%08x ] =>RSSI=%d, DISRA=0x%02x\n", ra_info1, ra_info1&0xFF, (ra_info1>>16) & 0xFF); ++ ++ DBG_871X_SEL(sel , "[ ra_info2:0x%08x ] =>hight_rate=%s, lowest_rate=%s, SGI=0x%02x, RateID=%d\n", ++ ra_info2, ++ HDATA_RATE(hight_rate), ++ HDATA_RATE(lowest_rate), ++ (ra_info2>>16) & 0xFF, ++ (ra_info2>>24) & 0xFF); ++ ++ DBG_871X_SEL(sel , "rate_mask2=0x%08x, rate_mask1=0x%08x\n", rate_mask2, rate_mask1); ++ ++ } ++ } ++} ++ ++ + /* + * Description: + * Query setting of specified variable. +@@ -7195,6 +7160,9 @@ u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval) + // coding by Lucas@20130730 + *(HT_CAP_AMPDU_FACTOR*)pval = MAX_AMPDU_FACTOR_16K; + break; ++ case HW_VAR_BEST_AMPDU_DENSITY: ++ *((u32 *)pval) = AMPDU_DENSITY_VALUE_7; ++ break; + case HAL_DEF_TX_LDPC: + case HAL_DEF_RX_LDPC: + *((u8 *)pval) = _FALSE; +@@ -7211,54 +7179,7 @@ u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval) + break; + + case HW_DEF_RA_INFO_DUMP: +- { +- u8 mac_id = *(u8*)pval; +- u32 cmd; +- u32 ra_info1, ra_info2; +- u32 rate_mask1, rate_mask2; +- u8 curr_tx_rate,curr_tx_sgi,hight_rate,lowest_rate; +- +- DBG_8192C("============ RA status check Mac_id:%d ===================\n", mac_id); +- +- cmd = 0x40000100 | mac_id; +- rtw_write32(padapter, REG_HMEBOX_DBG_2_8723B, cmd); +- rtw_msleep_os(10); +- ra_info1 = rtw_read32(padapter, 0x2F0); +- curr_tx_rate = ra_info1&0x7F; +- curr_tx_sgi = (ra_info1>>7)&0x01; +- DBG_8192C("[ ra_info1:0x%08x ] =>cur_tx_rate= %s,cur_sgi:%d, PWRSTS = 0x%02x \n", +- ra_info1, +- HDATA_RATE(curr_tx_rate), +- curr_tx_sgi, +- (ra_info1>>8) & 0x07); +- +- cmd = 0x40000400 | mac_id; +- rtw_write32(padapter, REG_HMEBOX_DBG_2_8723B,cmd); +- rtw_msleep_os(10); +- ra_info1 = rtw_read32(padapter, 0x2F0); +- ra_info2 = rtw_read32(padapter, 0x2F4); +- rate_mask1 = rtw_read32(padapter, 0x2F8); +- rate_mask2 = rtw_read32(padapter, 0x2FC); +- hight_rate = ra_info2&0xFF; +- lowest_rate = (ra_info2>>8) & 0xFF; +- +- DBG_8192C("[ ra_info1:0x%08x ] =>RSSI=%d, BW_setting=0x%02x, DISRA=0x%02x, VHT_EN=0x%02x\n", +- ra_info1, +- ra_info1&0xFF, +- (ra_info1>>8) & 0xFF, +- (ra_info1>>16) & 0xFF, +- (ra_info1>>24) & 0xFF); +- +- DBG_8192C("[ ra_info2:0x%08x ] =>hight_rate=%s, lowest_rate=%s, SGI=0x%02x, RateID=%d\n", +- ra_info2, +- HDATA_RATE(hight_rate), +- HDATA_RATE(lowest_rate), +- (ra_info2>>16) & 0xFF, +- (ra_info2>>24) & 0xFF); +- +- DBG_8192C("rate_mask2=0x%08x, rate_mask1=0x%08x\n", rate_mask2, rate_mask1); +- +- } ++ hal_ra_info_dump(padapter, pval); + break; + + case HAL_DEF_TX_PAGE_BOUNDARY: +@@ -7278,6 +7199,15 @@ u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval) + case HAL_DEF_TX_PAGE_SIZE: + *(( u32*)pval) = PAGE_SIZE_128; + break; ++ case HAL_DEF_RX_DMA_SZ_WOW: ++ *(u32 *)pval = RX_DMA_SIZE_8723B - RESV_FMWF; ++ break; ++ case HAL_DEF_RX_DMA_SZ: ++ *(u32 *)pval = RX_DMA_BOUNDARY_8723B + 1; ++ break; ++ case HAL_DEF_RX_PAGE_SIZE: ++ *((u32 *)pval) = 8; ++ break; + default: + bResult = GetHalDefVar(padapter, variable, pval); + break; +@@ -7286,11 +7216,10 @@ u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval) + return bResult; + } + +-#ifdef CONFIG_WOWLAN ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) + void Hal_DetectWoWMode(PADAPTER pAdapter) + { + adapter_to_pwrctl(pAdapter)->bSupportRemoteWakeup = _TRUE; +- DBG_871X("%s\n", __func__); + } + #endif //CONFIG_WOWLAN + +@@ -7361,5 +7290,99 @@ void rtl8723bs_hal_check_bt_hang(_adapter * adapter) + } + #endif + ++#ifdef CONFIG_GPIO_API ++int rtl8723b_GpioFuncCheck(PADAPTER adapter, u8 gpio_num) ++{ ++ int ret = _SUCCESS; ++ ++ if (IS_HARDWARE_TYPE_8723B(adapter) == _FAIL) { ++ if((gpio_num > 15) || (gpio_num < 4)) { ++ DBG_871X("%s The gpio number does not included 4~5.\n",__FUNCTION__); ++ ret = _FAIL; ++ } ++ } ++ ++ return ret; ++} + ++VOID rtl8723b_GpioMultiFuncReset(PADAPTER adapter, u8 gpio_num) ++{ ++ u8 value8 = 0; ++ u16 value16 = 0; ++ u32 value32 = 0; ++ ++ if (IS_HARDWARE_TYPE_8723B(adapter) == _FAIL) ++ return ; ++ ++ switch (gpio_num) { ++ case 6: ++ /* check 0x66[4] */ ++ value8 = rtw_read8(adapter, 0x66); ++ if (value8 & BIT4) ++ rtw_write8(adapter, 0x66, value8 & ~BIT4); ++ ++ /* check 0x40[4] */ ++ value8 = rtw_read8(adapter, REG_GPIO_MUXCFG); ++ if (value8 & BIT4) ++ rtw_write8(adapter, REG_GPIO_MUXCFG, value8 & ~BIT4); ++ ++ /* check 0x66[8] */ ++ value16 = rtw_read16(adapter, 0x66); ++ if (value16 & BIT8) ++ rtw_write16(adapter, 0x66, value16 & ~BIT8); ++ ++ /* check 0x8[8] */ ++ value16 = rtw_read16(adapter, REG_SYS_CLKR); ++ if (value16 & BIT8) ++ rtw_write16(adapter, REG_SYS_CLKR, value16 & ~BIT8); ++ ++ /* check 0x64[26] */ ++ value32 = rtw_read32(adapter, 0x64); ++ if (value32 & BIT26) ++ rtw_write32(adapter, 0x64, value32 & ~BIT26); ++ ++ /* check 0x40[8] */ ++ value16 = rtw_read16(adapter, REG_GPIO_MUXCFG); ++ if (value16 & BIT8) ++ rtw_write16(adapter, REG_GPIO_MUXCFG, value16 & ~BIT8); ++ break; ++ case 8: ++ /* check 0x48[16] */ ++ value32 = rtw_read32(adapter, REG_GPIO_INTM); ++ if (value32 & BIT16) ++ rtw_write32(adapter, REG_GPIO_INTM, value32 & ~BIT16); ++ ++ /* check 0x4C[21] */ ++ value32 = rtw_read32(adapter, REG_LEDCFG0); ++ if (value32 & BIT21) ++ rtw_write32(adapter, REG_LEDCFG0, value32 & ~BIT21); ++ ++ /* check 0x68[2] */ ++ value8 = rtw_read8(adapter, REG_MULTI_FUNC_CTRL); ++ if (!(value8 & BIT2)) ++ rtw_write8(adapter, REG_MULTI_FUNC_CTRL, value8 | BIT2); ++ break; ++ case 12: ++ /* check 0x48[18] */ ++ value32 = rtw_read32(adapter, REG_GPIO_INTM); ++ if (value32 & BIT18) ++ rtw_write32(adapter, REG_GPIO_INTM, value32 & ~BIT18); ++ ++ /* check 0x4C[22] */ ++ value32 = rtw_read32(adapter, REG_LEDCFG0); ++ if (value32 & BIT22) ++ rtw_write32(adapter, REG_LEDCFG0, value32 & ~BIT22); ++ ++ /* check 0x66[6] */ ++ value8 = rtw_read8(adapter, 0x66); ++ if (value8 & BIT6) ++ rtw_write8(adapter, 0x66, value8 & ~BIT6); ++ break; ++ default: ++ DBG_871X("%s: Invalid GPIO num\n", __FUNCTION__); ++ break; ++ } ++ ++} ++#endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_phycfg.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_phycfg.c +old mode 100755 +new mode 100644 +index 137270e..ff6b212 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_phycfg.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_phycfg.c +@@ -1,1620 +1,1539 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#define _RTL8723B_PHYCFG_C_ +- +-#include +- +- +-/*---------------------------Define Local Constant---------------------------*/ +-/* Channel switch:The size of command tables for switch channel*/ +-#define MAX_PRECMD_CNT 16 +-#define MAX_RFDEPENDCMD_CNT 16 +-#define MAX_POSTCMD_CNT 16 +- +-#define MAX_DOZE_WAITING_TIMES_9x 64 +- +-/*---------------------------Define Local Constant---------------------------*/ +- +- +-/*------------------------Define global variable-----------------------------*/ +- +-/*------------------------Define local variable------------------------------*/ +- +- +-/*--------------------Define export function prototype-----------------------*/ +-// Please refer to header file +-/*--------------------Define export function prototype-----------------------*/ +- +-/*----------------------------Function Body----------------------------------*/ +-// +-// 1. BB register R/W API +-// +- +-/** +-* Function: phy_CalculateBitShift +-* +-* OverView: Get shifted position of the BitMask +-* +-* Input: +-* u4Byte BitMask, +-* +-* Output: none +-* Return: u4Byte Return the shift bit bit position of the mask +-*/ +-static u32 +-phy_CalculateBitShift( +- u32 BitMask +- ) +-{ +- u32 i; +- +- for(i=0; i<=31; i++) +- { +- if ( ((BitMask>>i) & 0x1 ) == 1) +- break; +- } +- +- return (i); +-} +- +- +-/** +-* Function: PHY_QueryBBReg +-* +-* OverView: Read "sepcific bits" from BB register +-* +-* Input: +-* PADAPTER Adapter, +-* u4Byte RegAddr, //The target address to be readback +-* u4Byte BitMask //The target bit position in the target address +-* //to be readback +-* Output: None +-* Return: u4Byte Data //The readback register value +-* Note: This function is equal to "GetRegSetting" in PHY programming guide +-*/ +-u32 +-PHY_QueryBBReg_8723B( +- IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask +- ) +-{ +- u32 ReturnValue = 0, OriginalValue, BitShift; +- u16 BBWaitCounter = 0; +- +-#if (DISABLE_BB_RF == 1) +- return 0; +-#endif +- +- //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); +- +- OriginalValue = rtw_read32(Adapter, RegAddr); +- BitShift = phy_CalculateBitShift(BitMask); +- ReturnValue = (OriginalValue & BitMask) >> BitShift; +- +- return (ReturnValue); +- +-} +- +- +-/** +-* Function: PHY_SetBBReg +-* +-* OverView: Write "Specific bits" to BB register (page 8~) +-* +-* Input: +-* PADAPTER Adapter, +-* u4Byte RegAddr, //The target address to be modified +-* u4Byte BitMask //The target bit position in the target address +-* //to be modified +-* u4Byte Data //The new register value in the target bit position +-* //of the target address +-* +-* Output: None +-* Return: None +-* Note: This function is equal to "PutRegSetting" in PHY programming guide +-*/ +- +-VOID +-PHY_SetBBReg_8723B( +- IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data +- ) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- //u16 BBWaitCounter = 0; +- u32 OriginalValue, BitShift; +- +-#if (DISABLE_BB_RF == 1) +- return; +-#endif +- +- //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); +- +- if(BitMask!= bMaskDWord){//if not "double word" write +- OriginalValue = rtw_read32(Adapter, RegAddr); +- BitShift = phy_CalculateBitShift(BitMask); +- Data = ((OriginalValue & (~BitMask)) | ((Data << BitShift) & BitMask)); +- } +- +- rtw_write32(Adapter, RegAddr, Data); +- +-} +- +- +-// +-// 2. RF register R/W API +-// +- +-/*----------------------------------------------------------------------------- +- * Function: phy_FwRFSerialRead() +- * +- * Overview: We support firmware to execute RF-R/W. +- * +- * Input: NONE +- * +- * Output: NONE +- * +- * Return: NONE +- * +- * Revised History: +- * When Who Remark +- * 01/21/2008 MHC Create Version 0. +- * +- *---------------------------------------------------------------------------*/ +-static u32 +-phy_FwRFSerialRead( +- IN PADAPTER Adapter, +- IN RF_PATH eRFPath, +- IN u32 Offset ) +-{ +- u32 retValue = 0; +- //RT_ASSERT(FALSE,("deprecate!\n")); +- return (retValue); +- +-} /* phy_FwRFSerialRead */ +- +- +-/*----------------------------------------------------------------------------- +- * Function: phy_FwRFSerialWrite() +- * +- * Overview: We support firmware to execute RF-R/W. +- * +- * Input: NONE +- * +- * Output: NONE +- * +- * Return: NONE +- * +- * Revised History: +- * When Who Remark +- * 01/21/2008 MHC Create Version 0. +- * +- *---------------------------------------------------------------------------*/ +-static VOID +-phy_FwRFSerialWrite( +- IN PADAPTER Adapter, +- IN RF_PATH eRFPath, +- IN u32 Offset, +- IN u32 Data ) +-{ +- //RT_ASSERT(FALSE,("deprecate!\n")); +-} +- +-static u32 +-phy_RFSerialRead_8723B( +- IN PADAPTER Adapter, +- IN RF_PATH eRFPath, +- IN u32 Offset +- ) +-{ +- u32 retValue = 0; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; +- u32 NewOffset; +- u32 tmplong,tmplong2; +- u8 RfPiEnable=0; +- u4Byte MaskforPhySet=0; +- int i = 0; +- +- // +- // Make sure RF register offset is correct +- // +- Offset &= 0xff; +- +- NewOffset = Offset; +- +- if(eRFPath == RF_PATH_A) +- { +- tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord);; +- tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF +- PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge)); +- } +- else +- { +- tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord); +- tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF +- PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge)); +- } +- +- tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord); +- PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge)); +- PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge); +- +- rtw_udelay_os(10); +- +- for(i=0;i<2;i++) +- rtw_udelay_os(MAX_STALL_TIME); +- rtw_udelay_os(10); +- +- if(eRFPath == RF_PATH_A) +- RfPiEnable = (u1Byte)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1|MaskforPhySet, BIT8); +- else if(eRFPath == RF_PATH_B) +- RfPiEnable = (u1Byte)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1|MaskforPhySet, BIT8); +- +- if(RfPiEnable) +- { // Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF +- retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhySet, bLSSIReadBackData); +- +- //RT_DISP(FINIT, INIT_RF, ("Readback from RF-PI : 0x%x\n", retValue)); +- } +- else +- { //Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF +- retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhySet, bLSSIReadBackData); +- +- //RT_DISP(FINIT, INIT_RF,("Readback from RF-SI : 0x%x\n", retValue)); +- } +- return retValue; +- +-} +- +-/** +-* Function: phy_RFSerialWrite_8723B +-* +-* OverView: Write data to RF register (page 8~) +-* +-* Input: +-* PADAPTER Adapter, +-* RF_PATH eRFPath, //Radio path of A/B/C/D +-* u4Byte Offset, //The target address to be read +-* u4Byte Data //The new register Data in the target bit position +-* //of the target to be read +-* +-* Output: None +-* Return: None +-* Note: Threre are three types of serial operations: +-* 1. Software serial write +-* 2. Hardware LSSI-Low Speed Serial Interface +-* 3. Hardware HSSI-High speed +-* serial write. Driver need to implement (1) and (2). +-* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() +- * +- * Note: For RF8256 only +- * The total count of RTL8256(Zebra4) register is around 36 bit it only employs +- * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) +- * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration +- * programming guide" for more details. +- * Thus, we define a sub-finction for RTL8526 register address conversion +- * =========================================================== +- * Register Mode RegCTL[1] RegCTL[0] Note +- * (Reg00[12]) (Reg00[10]) +- * =========================================================== +- * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) +- * ------------------------------------------------------------------ +- * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) +- * ------------------------------------------------------------------ +- * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) +- * ------------------------------------------------------------------ +- * +- * 2008/09/02 MH Add 92S RF definition +- * +- * +- * +-*/ +-static VOID +-phy_RFSerialWrite_8723B( +- IN PADAPTER Adapter, +- IN RF_PATH eRFPath, +- IN u32 Offset, +- IN u32 Data +- ) +-{ +- u32 DataAndAddr = 0; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; +- u32 NewOffset; +- +- Offset &= 0xff; +- +- // +- // Shadow Update +- // +- //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); +- +- // +- // Switch page for 8256 RF IC +- // +- NewOffset = Offset; +- +- // +- // Put write addr in [5:0] and write data in [31:16] +- // +- //DataAndAddr = (Data<<16) | (NewOffset&0x3f); +- DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; // T65 RF +- +- // +- // Write Operation +- // +- PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); +- //RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); +- +-} +- +- +-/** +-* Function: PHY_QueryRFReg +-* +-* OverView: Query "Specific bits" to RF register (page 8~) +-* +-* Input: +-* PADAPTER Adapter, +-* RF_PATH eRFPath, //Radio path of A/B/C/D +-* u4Byte RegAddr, //The target address to be read +-* u4Byte BitMask //The target bit position in the target address +-* //to be read +-* +-* Output: None +-* Return: u4Byte Readback value +-* Note: This function is equal to "GetRFRegSetting" in PHY programming guide +-*/ +-u32 +-PHY_QueryRFReg_8723B( +- IN PADAPTER Adapter, +- IN u8 eRFPath, +- IN u32 RegAddr, +- IN u32 BitMask +- ) +-{ +- u32 Original_Value, Readback_Value, BitShift; +- +-#if (DISABLE_BB_RF == 1) +- return 0; +-#endif +- +- Original_Value = phy_RFSerialRead_8723B(Adapter, eRFPath, RegAddr); +- +- BitShift = phy_CalculateBitShift(BitMask); +- Readback_Value = (Original_Value & BitMask) >> BitShift; +- +- return (Readback_Value); +-} +- +-/** +-* Function: PHY_SetRFReg +-* +-* OverView: Write "Specific bits" to RF register (page 8~) +-* +-* Input: +-* PADAPTER Adapter, +-* RF_PATH eRFPath, //Radio path of A/B/C/D +-* u4Byte RegAddr, //The target address to be modified +-* u4Byte BitMask //The target bit position in the target address +-* //to be modified +-* u4Byte Data //The new register Data in the target bit position +-* //of the target address +-* +-* Output: None +-* Return: None +-* Note: This function is equal to "PutRFRegSetting" in PHY programming guide +-*/ +-VOID +-PHY_SetRFReg_8723B( +- IN PADAPTER Adapter, +- IN u8 eRFPath, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data +- ) +-{ +- u32 Original_Value, BitShift; +- +-#if (DISABLE_BB_RF == 1) +- return; +-#endif +- +- // RF data is 12 bits only +- if (BitMask != bRFRegOffsetMask) +- { +- Original_Value = phy_RFSerialRead_8723B(Adapter, eRFPath, RegAddr); +- BitShift = phy_CalculateBitShift(BitMask); +- Data = ((Original_Value & (~BitMask)) | (Data<< BitShift)); +- } +- +- phy_RFSerialWrite_8723B(Adapter, eRFPath, RegAddr, Data); +-} +- +- +-// +-// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. +-// +- +- +-/*----------------------------------------------------------------------------- +- * Function: PHY_MACConfig8192C +- * +- * Overview: Condig MAC by header file or parameter file. +- * +- * Input: NONE +- * +- * Output: NONE +- * +- * Return: NONE +- * +- * Revised History: +- * When Who Remark +- * 08/12/2008 MHC Create Version 0. +- * +- *---------------------------------------------------------------------------*/ +-s32 PHY_MACConfig8723B(PADAPTER Adapter) +-{ +- int rtStatus = _SUCCESS; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- s8 *pszMACRegFile; +- s8 sz8723MACRegFile[] = RTL8723B_PHY_MACREG; +- +- +- pszMACRegFile = sz8723MACRegFile; +- +- // +- // Config MAC +- // +-#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +- rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile); +- if (rtStatus == _FAIL) +-#endif +- { +-#ifdef CONFIG_EMBEDDED_FWIMG +- ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv); +- rtStatus = _SUCCESS; +-#endif//CONFIG_EMBEDDED_FWIMG +- } +- +-#ifdef CONFIG_GPIO_WAKEUP +- rtw_clear_hostwakeupgpio(Adapter); +-#endif // CONFIG_GPIO_WAKEUP +- +- return rtStatus; +-} +- +-/** +-* Function: phy_InitBBRFRegisterDefinition +-* +-* OverView: Initialize Register definition offset for Radio Path A/B/C/D +-* +-* Input: +-* PADAPTER Adapter, +-* +-* Output: None +-* Return: None +-* Note: The initialization value is constant and it should never be changes +-*/ +-static VOID +-phy_InitBBRFRegisterDefinition( +- IN PADAPTER Adapter +-) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- +- // RF Interface Sowrtware Control +- pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 +- pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) +- +- // RF Interface Output (and Enable) +- pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 +- pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 +- +- // RF Interface (Output and) Enable +- pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) +- pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) +- +- pHalData->PHYRegDef[ODM_RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter +- pHalData->PHYRegDef[ODM_RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; +- +- pHalData->PHYRegDef[ODM_RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 +- pHalData->PHYRegDef[ODM_RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2 +- +- // Tranceiver Readback LSSI/HSPI mode +- pHalData->PHYRegDef[ODM_RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; +- pHalData->PHYRegDef[ODM_RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; +- pHalData->PHYRegDef[ODM_RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; +- pHalData->PHYRegDef[ODM_RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; +- +-} +- +-#if (MP_DRIVER == 1) +- +-/*----------------------------------------------------------------------------- +- * Function: phy_ConfigBBWithMpHeaderFile +- * +- * Overview: Config PHY_REG_MP array +- * +- * Input: NONE +- * +- * Output: NONE +- * +- * Return: NONE +- * +- * Revised History: +- * When Who Remark +- * 02/04/2010 chiyokolin Modify to new files. +- *---------------------------------------------------------------------------*/ +-static int +-phy_ConfigBBWithMpHeaderFile( +- IN PADAPTER Adapter, +- IN u1Byte ConfigType) +-{ +- int i; +- u32* Rtl8192CPHY_REGArray_Table_MP; +- u16 PHY_REGArrayMPLen; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- +- +- PHY_REGArrayMPLen = Rtl8723B_PHY_REG_Array_MPLength; +- Rtl8192CPHY_REGArray_Table_MP = (u32*)Rtl8723B_PHY_REG_Array_MP; +- +- if(ConfigType == BaseBand_Config_PHY_REG) +- { +- for(i=0;iregistrypriv.RegEnableTxPowerLimit == 1 || +- ( Adapter->registrypriv.RegEnableTxPowerLimit == 2 && pHalData->EEPROMRegulatory == 1 ) ) +- { +-#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +- if (PHY_ConfigRFWithPowerLimitTableParaFile( Adapter, pszRFTxPwrLmtFile )== _FAIL) +-#endif +- { +-#ifdef CONFIG_EMBEDDED_FWIMG +- if (HAL_STATUS_SUCCESS != ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, CONFIG_RF_TXPWR_LMT, (ODM_RF_RADIO_PATH_E)0)) +- rtStatus = _FAIL; +-#endif +- } +- +- if(rtStatus != _SUCCESS){ +- DBG_871X("%s():Read Tx power limit fail\n",__func__); +- goto phy_BB8190_Config_ParaFile_Fail; +- } +- } +- +- // +- // 1. Read PHY_REG.TXT BB INIT!! +- // +-#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +- if (phy_ConfigBBWithParaFile(Adapter, pszBBRegFile, CONFIG_BB_PHY_REG) == _FAIL) +-#endif +- { +-#ifdef CONFIG_EMBEDDED_FWIMG +- if (HAL_STATUS_SUCCESS != ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG)) +- rtStatus = _FAIL; +-#endif +- } +- +- if(rtStatus != _SUCCESS){ +- DBG_8192C("%s():Write BB Reg Fail!!", __func__); +- goto phy_BB8190_Config_ParaFile_Fail; +- } +- +-#if MP_DRIVER == 1 +- if (Adapter->registrypriv.mp_mode == 1) +- { +- // +- // 1.1 Read PHY_REG_MP.TXT BB INIT!! +- // +-#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +- if (phy_ConfigBBWithMpParaFile(Adapter, pszBBRegMpFile) == _FAIL) +-#endif +- { +-#ifdef CONFIG_EMBEDDED_FWIMG +- if (HAL_STATUS_SUCCESS != ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_MP)) +- rtStatus = _FAIL; +-#endif +- } +- +- if(rtStatus != _SUCCESS){ +- DBG_8192C("%s():Write BB Reg MP Fail!!", __func__); +- goto phy_BB8190_Config_ParaFile_Fail; +- } +- } +-#endif // #if (MP_DRIVER == 1) +- +- // If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt +- PHY_InitTxPowerByRate( Adapter ); +- if ( Adapter->registrypriv.RegEnableTxPowerByRate == 1 || +- ( Adapter->registrypriv.RegEnableTxPowerByRate == 2 && pHalData->EEPROMRegulatory != 2 ) ) +- { +-#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +- if (phy_ConfigBBWithPgParaFile(Adapter, pszBBRegPgFile) == _FAIL) +-#endif +- { +-#ifdef CONFIG_EMBEDDED_FWIMG +- if (HAL_STATUS_SUCCESS != ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG)) +- rtStatus = _FAIL; +-#endif +- } +- +- if ( pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE ) +- PHY_TxPowerByRateConfiguration( Adapter ); +- +- if ( Adapter->registrypriv.RegEnableTxPowerLimit == 1 || +- ( Adapter->registrypriv.RegEnableTxPowerLimit == 2 && pHalData->EEPROMRegulatory == 1 ) ) +- PHY_ConvertTxPowerLimitToPowerIndex( Adapter ); +- +- if(rtStatus != _SUCCESS){ +- DBG_8192C("%s():BB_PG Reg Fail!!\n",__func__); +- } +- } +- +- // +- // 2. Read BB AGC table Initialization +- // +-#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +- if (phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile, CONFIG_BB_AGC_TAB) == _FAIL) +-#endif +- { +-#ifdef CONFIG_EMBEDDED_FWIMG +- if (HAL_STATUS_SUCCESS != ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB)) +- rtStatus = _FAIL; +-#endif +- } +- +- if(rtStatus != _SUCCESS){ +- DBG_8192C("%s():AGC Table Fail\n", __func__); +- goto phy_BB8190_Config_ParaFile_Fail; +- } +- +-phy_BB8190_Config_ParaFile_Fail: +- +- return rtStatus; +-} +- +- +-int +-PHY_BBConfig8723B( +- IN PADAPTER Adapter +- ) +-{ +- int rtStatus = _SUCCESS; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- u32 RegVal; +- u8 TmpU1B=0; +- u8 value8, CrystalCap; +- +- phy_InitBBRFRegisterDefinition(Adapter); +- +- // Enable BB and RF +- RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); +- rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); +- +- // switch ant to BT +-#ifdef CONFIG_USB_HCI +- rtw_write32(Adapter, 0x948, 0x0); // USB use Antenna S0 +-#else +- if (pHalData->ant_path == ODM_RF_PATH_A) +- rtw_write32(Adapter, 0x948, 0x280); +- else +- rtw_write32(Adapter, 0x948, 0x0); +-#endif +- +- rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); +- +- rtw_usleep_os(10); +- +- PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x1, 0xfffff,0x780); +- +-#if 0 +- // 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. +- rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); +- rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb); +-#endif +- +- rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB); +- +- rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80); +- +- // +- // Config BB and AGC +- // +- rtStatus = phy_BB8723b_Config_ParaFile(Adapter); +- +- // 0x2C[23:18] = 0x2C[17:12] = CrystalCap +- CrystalCap = pHalData->CrystalCap & 0x3F; +- PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); +- +- return rtStatus; +-} +- +-void phy_LCK_8723B( +- IN PADAPTER Adapter +- ) +-{ +- PHY_SetRFReg(Adapter, RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFBE0); +- PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x8C01); +- rtw_mdelay_os(200); +- PHY_SetRFReg(Adapter, RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFFE0); +-} +- +-#if 0 +-// Block & Path enable +-#define rOFDMCCKEN_Jaguar 0x808 // OFDM/CCK block enable +-#define bOFDMEN_Jaguar 0x20000000 +-#define bCCKEN_Jaguar 0x10000000 +-#define rRxPath_Jaguar 0x808 // Rx antenna +-#define bRxPath_Jaguar 0xff +-#define rTxPath_Jaguar 0x80c // Tx antenna +-#define bTxPath_Jaguar 0x0fffffff +-#define rCCK_RX_Jaguar 0xa04 // for cck rx path selection +-#define bCCK_RX_Jaguar 0x0c000000 +-#define rVhtlen_Use_Lsig_Jaguar 0x8c3 // Use LSIG for VHT length +-VOID +-PHY_BB8723B_Config_1T( +- IN PADAPTER Adapter +- ) +-{ +- // BB OFDM RX Path_A +- PHY_SetBBReg(Adapter, rRxPath_Jaguar, bRxPath_Jaguar, 0x11); +- // BB OFDM TX Path_A +- PHY_SetBBReg(Adapter, rTxPath_Jaguar, bMaskLWord, 0x1111); +- // BB CCK R/Rx Path_A +- PHY_SetBBReg(Adapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); +- // MCS support +- PHY_SetBBReg(Adapter, 0x8bc, 0xc0000060, 0x4); +- // RF Path_B HSSI OFF +- PHY_SetBBReg(Adapter, 0xe00, 0xf, 0x4); +- // RF Path_B Power Down +- PHY_SetBBReg(Adapter, 0xe90, bMaskDWord, 0); +- // ADDA Path_B OFF +- PHY_SetBBReg(Adapter, 0xe60, bMaskDWord, 0); +- PHY_SetBBReg(Adapter, 0xe64, bMaskDWord, 0); +-} +-#endif +- +-int +-PHY_RFConfig8723B( +- IN PADAPTER Adapter +- ) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- int rtStatus = _SUCCESS; +- +- // +- // RF config +- // +- rtStatus = PHY_RF6052_Config8723B(Adapter); +- +- phy_LCK_8723B(Adapter); +- //PHY_BB8723B_Config_1T(Adapter); +- +- return rtStatus; +-} +- +-/*----------------------------------------------------------------------------- +- * Function: PHY_ConfigRFWithParaFile() +- * +- * Overview: This function read RF parameters from general file format, and do RF 3-wire +- * +- * Input: PADAPTER Adapter +- * ps1Byte pFileName +- * RF_PATH eRFPath +- * +- * Output: NONE +- * +- * Return: RT_STATUS_SUCCESS: configuration file exist +- * +- * Note: Delay may be required for RF configuration +- *---------------------------------------------------------------------------*/ +-int +-PHY_ConfigRFWithParaFile_8723B( +- IN PADAPTER Adapter, +- IN u8* pFileName, +- RF_PATH eRFPath +-) +-{ +- return _SUCCESS; +-} +- +-//**************************************** +-/*----------------------------------------------------------------------------- +- * Function: PHY_ConfigRFWithHeaderFile() +- * +- * Overview: This function read RF parameters from general file format, and do RF 3-wire +- * +- * Input: PADAPTER Adapter +- * ps1Byte pFileName +- * RF_PATH eRFPath +- * +- * Output: NONE +- * +- * Return: RT_STATUS_SUCCESS: configuration file exist +- * +- * Note: Delay may be required for RF configuration +- *---------------------------------------------------------------------------*/ +-void phy_PowerIndexCheck8723B( +- IN PADAPTER Adapter, +- IN u8 channel, +- IN OUT u8 *cckPowerLevel, +- IN OUT u8 *ofdmPowerLevel, +- IN OUT u8 *BW20PowerLevel, +- IN OUT u8 *BW40PowerLevel +- ) +-{ +- +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- +- pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0]; +- pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0]; +- pHalData->CurrentBW2024GTxPwrIdx = BW20PowerLevel[0]; +- pHalData->CurrentBW4024GTxPwrIdx = BW40PowerLevel[0]; +- +- RT_TRACE(_module_hal_init_c_, _drv_info_, +- ("PHY_SetTxPowerLevel8723B(): CurrentCckTxPwrIdx : 0x%x,CurrentOfdm24GTxPwrIdx: 0x%x\n", +- pHalData->CurrentCckTxPwrIdx, pHalData->CurrentOfdm24GTxPwrIdx)); +-} +- +-/************************************************************************************************************** +- * Description: +- * The low-level interface to set TxAGC , called by both MP and Normal Driver. +- * +- * <20120830, Kordan> +- **************************************************************************************************************/ +- +-VOID +-PHY_SetTxPowerIndex_8723B( +- IN PADAPTER Adapter, +- IN u32 PowerIndex, +- IN u8 RFPath, +- IN u8 Rate +- ) +-{ +- if (RFPath == ODM_RF_PATH_A || RFPath == ODM_RF_PATH_B) +- { +- switch (Rate) +- { +- case MGN_1M: PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex); break; +- case MGN_2M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1, PowerIndex); break; +- case MGN_5_5M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte2, PowerIndex); break; +- case MGN_11M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte3, PowerIndex); break; +- +- case MGN_6M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte0, PowerIndex); break; +- case MGN_9M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte1, PowerIndex); break; +- case MGN_12M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte2, PowerIndex); break; +- case MGN_18M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte3, PowerIndex); break; +- +- case MGN_24M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte0, PowerIndex); break; +- case MGN_36M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte1, PowerIndex); break; +- case MGN_48M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte2, PowerIndex); break; +- case MGN_54M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte3, PowerIndex); break; +- +- case MGN_MCS0: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte0, PowerIndex); break; +- case MGN_MCS1: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte1, PowerIndex); break; +- case MGN_MCS2: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte2, PowerIndex); break; +- case MGN_MCS3: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte3, PowerIndex); break; +- +- case MGN_MCS4: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte0, PowerIndex); break; +- case MGN_MCS5: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte1, PowerIndex); break; +- case MGN_MCS6: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte2, PowerIndex); break; +- case MGN_MCS7: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte3, PowerIndex); break; +- +- default: +- DBG_871X("Invalid Rate!!\n"); +- break; +- } +- } +- else +- { +- RT_TRACE(_module_hal_init_c_, _drv_err_,("Invalid RFPath!!\n")); +- } +-} +- +-u8 +-phy_GetCurrentTxNum_8723B( +- IN PADAPTER pAdapter +- ) +-{ +- return RF_TX_NUM_NONIMPLEMENT; +-} +- +-u8 +-PHY_GetTxPowerIndex_8723B( +- IN PADAPTER pAdapter, +- IN u8 RFPath, +- IN u8 Rate, +- IN CHANNEL_WIDTH BandWidth, +- IN u8 Channel +- ) +-{ +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); +- s8 txPower = 0, powerDiffByRate = 0, limit = 0; +- BOOLEAN bIn24G = _FALSE; +- +- //DBG_871X("===>%s\n", __FUNCTION__ ); +- +- txPower = (s8) PHY_GetTxPowerIndexBase( pAdapter,RFPath, Rate, BandWidth, Channel, &bIn24G ); +- powerDiffByRate = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_A, RF_1TX, Rate ); +- +- limit = PHY_GetTxPowerLimit( pAdapter, pAdapter->registrypriv.RegPwrTblSel, (u8)(!bIn24G), pHalData->CurrentChannelBW, RFPath, Rate, pHalData->CurrentChannel); +- +- powerDiffByRate = powerDiffByRate > limit ? limit : powerDiffByRate; +- txPower += powerDiffByRate; +- +- txPower += PHY_GetTxPowerTrackingOffset( pAdapter, RFPath, Rate ); +- +- if(txPower > MAX_POWER_INDEX) +- txPower = MAX_POWER_INDEX; +- +- //DBG_871X("Final Tx Power(RF-%c, Channel: %d) = %d(0x%X)\n", ((RFPath==0)?'A':'B'), Channel, txPower, txPower)); +- return (u8) txPower; +-} +- +-VOID +-PHY_SetTxPowerLevel8723B( +- IN PADAPTER Adapter, +- IN u8 Channel +- ) +-{ +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +- pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; +- u8 RFPath = ODM_RF_PATH_A; +- +- if(pHalData->AntDivCfg){// antenna diversity Enable +- RFPath = ( (pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ODM_RF_PATH_A : ODM_RF_PATH_B); +- } +- else{ // antenna diversity disable +- RFPath = pHalData->ant_path; +- } +- +- RT_TRACE(_module_hal_init_c_, _drv_info_,("==>PHY_SetTxPowerLevel8723B()\n")); +- +- PHY_SetTxPowerLevelByPath(Adapter, Channel, RFPath); +- +- RT_TRACE(_module_hal_init_c_, _drv_info_,("<==PHY_SetTxPowerLevel8723B()\n")); +-} +- +-VOID +-PHY_GetTxPowerLevel8723B( +- IN PADAPTER Adapter, +- OUT s32* powerlevel +- ) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- s32 TxPwrDbm = 13; +-#if 0 +- RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_GetTxPowerLevel8723B(): TxPowerLevel: %#x\n", TxPwrDbm)); +- +- if ( pMgntInfo->ClientConfigPwrInDbm != UNSPECIFIED_PWR_DBM ) +- *powerlevel = pMgntInfo->ClientConfigPwrInDbm; +- else +- *powerlevel = TxPwrDbm; +-#endif +-} +- +- +-// <20130321, VincentLan> A workaround to eliminate the 2440MHz & 2480MHz spur of 8723B. (Asked by Rock.) +-VOID +-phy_SpurCalibration_8723B( +- IN PADAPTER pAdapter, +- IN u1Byte ToChannel, +- IN u1Byte threshold +- ) +-{ +- u4Byte freq[6] = {0xFCCD, 0xFC4D, 0xFFCD, 0xFF4D, 0xFCCD, 0xFF9A}; // {chnl 5, 6, 7, 8, 13, 14} +- u1Byte idx = 0; +- u1Byte b_doNotch = FALSE; +- u1Byte initial_gain; +- BOOLEAN bHW_Ctrl = FALSE, bSW_Ctrl = FALSE,bHW_Ctrl_S1 = FALSE, bSW_Ctrl_S1 = FALSE; +- u4Byte reg948; +- +- // add for notch +- u4Byte wlan_channel, CurrentChannel, Is40MHz; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +- //PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); +- PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); +- //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +- +- // check threshold +- if(threshold <= 0x0) +- threshold = 0x16; +- +- DBG_8192C("===>phy_SpurCalibration_8723B: Channel = %d\n", ToChannel); +- +- if (ToChannel == 5) +- idx = 0; +- else if (ToChannel == 6) +- idx = 1; +- else if (ToChannel == 7) +- idx = 2; +- else if (ToChannel == 8) +- idx = 3; +- else if (ToChannel == 13) +- idx = 4; +- else if (ToChannel == 14) +- idx = 5; +- else +- idx = 10; +- +- reg948 = PHY_QueryBBReg(pAdapter, rS0S1_PathSwitch, bMaskDWord); +- if((reg948 & BIT6) == 0x0) +- bSW_Ctrl = TRUE; +- else +- bHW_Ctrl = TRUE; +- +- if(bHW_Ctrl) +- bHW_Ctrl_S1 = (PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3)==0x1)? TRUE:FALSE; +- else if(bSW_Ctrl) +- bSW_Ctrl_S1 = ((reg948 & BIT9) == 0x0)? TRUE:FALSE; +- +- // If wlan at S1 (both HW control & SW control) and current channel=5,6,7,8,13,14 +- if ((bHW_Ctrl_S1 || bSW_Ctrl_S1) && (idx <= 5)) +- { +- initial_gain = (u1Byte) (ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0) & 0x7f); +- ODM_Write_DIG(pDM_Odm, 0x30); +- PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, bMaskDWord, 0xccf000c0); // disable 3-wire +- +- PHY_SetBBReg(pAdapter, rFPGA0_PSDFunction, bMaskDWord, freq[idx]); // Setup PSD +- PHY_SetBBReg(pAdapter, rFPGA0_PSDFunction, bMaskDWord, 0x400000 | freq[idx]); // Start PSD +- +- rtw_msleep_os(30); +- +- if(PHY_QueryBBReg(pAdapter, rFPGA0_PSDReport, bMaskDWord) >= threshold) +- b_doNotch = TRUE; +- +- PHY_SetBBReg(pAdapter, rFPGA0_PSDFunction, bMaskDWord, freq[idx]); // turn off PSD +- PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, bMaskDWord, 0xccc000c0); // enable 3-wire +- ODM_Write_DIG(pDM_Odm, initial_gain); +- } +- +- // --- Notch Filter --- Asked by Rock +- if (b_doNotch) +- { +- CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); +- wlan_channel = CurrentChannel & 0x0f; //Get center frequency +- +- switch(wlan_channel) //Set notch filter +- { +- case 5: +- case 13: +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT28|BIT27|BIT26|BIT25|BIT24, 0xB); +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x1); //enable notch filter +- ODM_SetBBReg(pDM_Odm, 0xD40, bMaskDWord, 0x06000000); +- ODM_SetBBReg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD4C, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x1); //enable CSI mask +- break; +- case 6: +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT28|BIT27|BIT26|BIT25|BIT24, 0x4); +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x1); //enable notch filter +- ODM_SetBBReg(pDM_Odm, 0xD40, bMaskDWord, 0x00000600); +- ODM_SetBBReg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD4C, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x1); //enable CSI mask +- break; +- case 7: +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT28|BIT27|BIT26|BIT25|BIT24, 0x3); +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x1); //enable notch filter +- ODM_SetBBReg(pDM_Odm, 0xD40, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD4C, bMaskDWord, 0x06000000); +- ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x1); //enable CSI mask +- break; +- case 8: +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT28|BIT27|BIT26|BIT25|BIT24, 0xA); +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x1); //enable notch filter +- ODM_SetBBReg(pDM_Odm, 0xD40, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD4C, bMaskDWord, 0x00000380); +- ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x1); //enable CSI mask +- break; +- case 14: +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT28|BIT27|BIT26|BIT25|BIT24, 0x5); +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x1); //enable notch filter +- ODM_SetBBReg(pDM_Odm, 0xD40, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); +- ODM_SetBBReg(pDM_Odm, 0xD4C, bMaskDWord, 0x00180000); +- ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x1); //enable CSI mask +- break; +- default: +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x0); //disable notch filter +- ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x0); //disable CSI mask function +- break; +- }//switch(wlan_channel) +- return; +- } +- +- ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x0); //disable notch filter +- ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x0); //disable CSI mask +- +-} +- +-VOID +-phy_SetRegBW_8723B( +- IN PADAPTER Adapter, +- CHANNEL_WIDTH CurrentBW +-) +-{ +- u16 RegRfMod_BW, u2tmp = 0; +- RegRfMod_BW = rtw_read16(Adapter, REG_TRXPTCL_CTL_8723B); +- +- switch(CurrentBW) +- { +- case CHANNEL_WIDTH_20: +- rtw_write16(Adapter, REG_TRXPTCL_CTL_8723B, (RegRfMod_BW & 0xFE7F)); // BIT 7 = 0, BIT 8 = 0 +- break; +- +- case CHANNEL_WIDTH_40: +- u2tmp = RegRfMod_BW | BIT7; +- rtw_write16(Adapter, REG_TRXPTCL_CTL_8723B, (u2tmp & 0xFEFF)); // BIT 7 = 1, BIT 8 = 0 +- break; +- +- case CHANNEL_WIDTH_80: +- u2tmp = RegRfMod_BW | BIT8; +- rtw_write16(Adapter, REG_TRXPTCL_CTL_8723B, (u2tmp & 0xFF7F)); // BIT 7 = 0, BIT 8 = 1 +- break; +- +- default: +- DBG_871X("phy_PostSetBWMode8723B(): unknown Bandwidth: %#X\n",CurrentBW); +- break; +- } +-} +- +-u8 +-phy_GetSecondaryChnl_8723B( +- IN PADAPTER Adapter +-) +-{ +- u8 SCSettingOf40 = 0, SCSettingOf20 = 0; +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- +- RT_TRACE(_module_hal_init_c_, _drv_info_,("SCMapping: VHT Case: pHalData->CurrentChannelBW %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->CurrentChannelBW,pHalData->nCur80MhzPrimeSC,pHalData->nCur40MhzPrimeSC)); +- if(pHalData->CurrentChannelBW== CHANNEL_WIDTH_80) +- { +- if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) +- SCSettingOf40 = VHT_DATA_SC_40_LOWER_OF_80MHZ; +- else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) +- SCSettingOf40 = VHT_DATA_SC_40_UPPER_OF_80MHZ; +- else +- RT_TRACE(_module_hal_init_c_, _drv_err_,("SCMapping: Not Correct Primary40MHz Setting \n")); +- +- if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) +- SCSettingOf20 = VHT_DATA_SC_20_LOWEST_OF_80MHZ; +- else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) +- SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ; +- else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) +- SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ; +- else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) +- SCSettingOf20 = VHT_DATA_SC_20_UPPERST_OF_80MHZ; +- else +- RT_TRACE(_module_hal_init_c_, _drv_err_,("SCMapping: Not Correct Primary40MHz Setting \n")); +- } +- else if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_40) +- { +- RT_TRACE(_module_hal_init_c_, _drv_info_,("SCMapping: VHT Case: pHalData->CurrentChannelBW %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->CurrentChannelBW,pHalData->nCur40MhzPrimeSC)); +- +- if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) +- SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ; +- else if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) +- SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ; +- else +- RT_TRACE(_module_hal_init_c_, _drv_err_,("SCMapping: Not Correct Primary40MHz Setting \n")); +- } +- +- RT_TRACE(_module_hal_init_c_, _drv_info_,("SCMapping: SC Value %x \n", ( (SCSettingOf40 << 4) | SCSettingOf20))); +- return ( (SCSettingOf40 << 4) | SCSettingOf20); +-} +- +-VOID +-phy_PostSetBwMode8723B( +- IN PADAPTER Adapter +-) +-{ +- u1Byte SubChnlNum = 0; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- +- +- //3 Set Reg668 Reg440 BW +- phy_SetRegBW_8723B(Adapter, pHalData->CurrentChannelBW); +- +- //3 Set Reg483 +- SubChnlNum = phy_GetSecondaryChnl_8723B(Adapter); +- rtw_write8(Adapter, REG_DATA_SC_8723B, SubChnlNum); +- +- //3// +- //3//<2>Set PHY related register +- //3// +- switch(pHalData->CurrentChannelBW) +- { +- /* 20 MHz channel*/ +- case CHANNEL_WIDTH_20: +- PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); +- +- PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); +- +-// PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); +- +- PHY_SetBBReg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT31|BIT30), 0x0); +- break; +- +- +- /* 40 MHz channel*/ +- case CHANNEL_WIDTH_40: +- PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); +- +- PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); +- +- // Set Control channel to upper or lower. These settings are required only for 40MHz +- PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); +- +- PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); +- +-// PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); +- +- PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1); +- +- break; +- +- +- +- default: +- /*RT_TRACE(COMP_DBG, DBG_LOUD, ("phy_SetBWMode8723B(): unknown Bandwidth: %#X\n"\ +- ,pHalData->CurrentChannelBW));*/ +- break; +- +- } +- +- //3<3>Set RF related register +- PHY_RF6052SetBandwidth8723B(Adapter, pHalData->CurrentChannelBW); +-} +- +-VOID +-phy_SwChnl8723B( +- IN PADAPTER pAdapter +- ) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +- u8 channelToSW = pHalData->CurrentChannel; +- +- if(pHalData->rf_chip == RF_PSEUDO_11N) +- { +- //RT_TRACE(COMP_MLME,DBG_LOUD,("phy_SwChnl8723B: return for PSEUDO \n")); +- return; +- } +- pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff00) | channelToSW ); +- PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0] ); +- PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0] ); +- +- DBG_8192C("===>phy_SwChnl8723B: Channel = %d\n", channelToSW); +- //phy_SpurCalibration_8723B(pAdapter, channelToSW, 0x16); +-} +- +-VOID +-phy_SwChnlAndSetBwMode8723B( +- IN PADAPTER Adapter +-) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- +- //RT_TRACE(COMP_SCAN, DBG_LOUD, ("phy_SwChnlAndSetBwMode8723B(): bSwChnl %d, bSetChnlBW %d \n", pHalData->bSwChnl, pHalData->bSetChnlBW)); +- if ( Adapter->bNotifyChannelChange ) +- { +- DBG_871X( "[%s] bSwChnl=%d, ch=%d, bSetChnlBW=%d, bw=%d\n", +- __FUNCTION__, +- pHalData->bSwChnl, +- pHalData->CurrentChannel, +- pHalData->bSetChnlBW, +- pHalData->CurrentChannelBW); +- } +- +- if((Adapter->bDriverStopped) || (Adapter->bSurpriseRemoved)) +- { +- return; +- } +- +- if(pHalData->bSwChnl) +- { +- phy_SwChnl8723B(Adapter); +- pHalData->bSwChnl = _FALSE; +- } +- +- if(pHalData->bSetChnlBW) +- { +- phy_PostSetBwMode8723B(Adapter); +- pHalData->bSetChnlBW = _FALSE; +- } +- +- PHY_SetTxPowerLevel8723B(Adapter, pHalData->CurrentChannel); +-} +- +-VOID +-PHY_HandleSwChnlAndSetBW8723B( +- IN PADAPTER Adapter, +- IN BOOLEAN bSwitchChannel, +- IN BOOLEAN bSetBandWidth, +- IN u8 ChannelNum, +- IN CHANNEL_WIDTH ChnlWidth, +- IN EXTCHNL_OFFSET ExtChnlOffsetOf40MHz, +- IN EXTCHNL_OFFSET ExtChnlOffsetOf80MHz, +- IN u8 CenterFrequencyIndex1 +-) +-{ +- //static BOOLEAN bInitialzed = _FALSE; +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- u8 tmpChannel = pHalData->CurrentChannel; +- CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; +- u8 tmpnCur40MhzPrimeSC = pHalData->nCur40MhzPrimeSC; +- u8 tmpnCur80MhzPrimeSC = pHalData->nCur80MhzPrimeSC; +- u8 tmpCenterFrequencyIndex1 =pHalData->CurrentCenterFrequencyIndex1; +- struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; +- +- //DBG_871X("=> PHY_HandleSwChnlAndSetBW8812: bSwitchChannel %d, bSetBandWidth %d \n",bSwitchChannel,bSetBandWidth); +- +- //check is swchnl or setbw +- if(!bSwitchChannel && !bSetBandWidth) +- { +- DBG_871X("PHY_HandleSwChnlAndSetBW8812: not switch channel and not set bandwidth \n"); +- return; +- } +- +- //skip change for channel or bandwidth is the same +- if(bSwitchChannel) +- { +- //if(pHalData->CurrentChannel != ChannelNum) +- { +- if (HAL_IsLegalChannel(Adapter, ChannelNum)) +- pHalData->bSwChnl = _TRUE; +- } +- } +- +- if(bSetBandWidth) +- { +- #if 0 +- if(bInitialzed == _FALSE) +- { +- bInitialzed = _TRUE; +- pHalData->bSetChnlBW = _TRUE; +- } +- else if((pHalData->CurrentChannelBW != ChnlWidth) ||(pHalData->nCur40MhzPrimeSC != ExtChnlOffsetOf40MHz) || (pHalData->CurrentCenterFrequencyIndex1!= CenterFrequencyIndex1)) +- { +- pHalData->bSetChnlBW = _TRUE; +- } +- #else +- pHalData->bSetChnlBW = _TRUE; +- #endif +- } +- +- if(!pHalData->bSetChnlBW && !pHalData->bSwChnl) +- { +- //DBG_871X("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d \n",pHalData->bSwChnl,pHalData->bSetChnlBW); +- return; +- } +- +- +- if(pHalData->bSwChnl) +- { +- pHalData->CurrentChannel=ChannelNum; +- pHalData->CurrentCenterFrequencyIndex1 = ChannelNum; +- } +- +- +- if(pHalData->bSetChnlBW) +- { +- pHalData->CurrentChannelBW = ChnlWidth; +-#if 0 +- if(ExtChnlOffsetOf40MHz==EXTCHNL_OFFSET_LOWER) +- pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; +- else if(ExtChnlOffsetOf40MHz==EXTCHNL_OFFSET_UPPER) +- pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; +- else +- pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +- +- if(ExtChnlOffsetOf80MHz==EXTCHNL_OFFSET_LOWER) +- pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; +- else if(ExtChnlOffsetOf80MHz==EXTCHNL_OFFSET_UPPER) +- pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; +- else +- pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +-#else +- pHalData->nCur40MhzPrimeSC = ExtChnlOffsetOf40MHz; +- pHalData->nCur80MhzPrimeSC = ExtChnlOffsetOf80MHz; +-#endif +- +- pHalData->CurrentCenterFrequencyIndex1 = CenterFrequencyIndex1; +- } +- +- //Switch workitem or set timer to do switch channel or setbandwidth operation +- if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) +- { +- phy_SwChnlAndSetBwMode8723B(Adapter); +- } +- else +- { +- if(pHalData->bSwChnl) +- { +- pHalData->CurrentChannel = tmpChannel; +- pHalData->CurrentCenterFrequencyIndex1 = tmpChannel; +- } +- if(pHalData->bSetChnlBW) +- { +- pHalData->CurrentChannelBW = tmpBW; +- pHalData->nCur40MhzPrimeSC = tmpnCur40MhzPrimeSC; +- pHalData->nCur80MhzPrimeSC = tmpnCur80MhzPrimeSC; +- pHalData->CurrentCenterFrequencyIndex1 = tmpCenterFrequencyIndex1; +- } +- } +- +- //DBG_871X("Channel %d ChannelBW %d ",pHalData->CurrentChannel, pHalData->CurrentChannelBW); +- //DBG_871X("40MhzPrimeSC %d 80MhzPrimeSC %d ",pHalData->nCur40MhzPrimeSC, pHalData->nCur80MhzPrimeSC); +- //DBG_871X("CenterFrequencyIndex1 %d \n",pHalData->CurrentCenterFrequencyIndex1); +- +- //DBG_871X("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d \n",pHalData->bSwChnl,pHalData->bSetChnlBW); +- +-} +- +-VOID +-PHY_SetBWMode8723B( +- IN PADAPTER Adapter, +- IN CHANNEL_WIDTH Bandwidth, // 20M or 40M +- IN unsigned char Offset // Upper, Lower, or Don't care +-) +-{ +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +- +- PHY_HandleSwChnlAndSetBW8723B(Adapter, _FALSE, _TRUE, pHalData->CurrentChannel, Bandwidth, Offset, Offset, pHalData->CurrentChannel); +-} +- +-VOID +-PHY_SwChnl8723B( // Call after initialization +- IN PADAPTER Adapter, +- IN u8 channel +- ) +-{ +- PHY_HandleSwChnlAndSetBW8723B(Adapter, _TRUE, _FALSE, channel, 0, 0, 0, channel); +-} +- +-VOID +-PHY_SetSwChnlBWMode8723B( +- IN PADAPTER Adapter, +- IN u8 channel, +- IN CHANNEL_WIDTH Bandwidth, +- IN u8 Offset40, +- IN u8 Offset80 +-) +-{ +- //DBG_871X("%s()===>\n",__FUNCTION__); +- +- PHY_HandleSwChnlAndSetBW8723B(Adapter, _TRUE, _TRUE, channel, Bandwidth, Offset40, Offset80, channel); +- +- //DBG_871X("<==%s()\n",__FUNCTION__); +-} +- +-static VOID +-_PHY_DumpRFReg_8723B(IN PADAPTER pAdapter) +-{ +- u32 rfRegValue,rfRegOffset; +- +- RT_TRACE(_module_hal_init_c_, _drv_info_, ("_PHY_DumpRFReg_8723B()====>\n")); +- +- for(rfRegOffset = 0x00;rfRegOffset<=0x30;rfRegOffset++){ +- rfRegValue = PHY_QueryRFReg_8723B(pAdapter,RF_PATH_A, rfRegOffset, bMaskDWord); +- RT_TRACE(_module_hal_init_c_, _drv_info_, (" 0x%02x = 0x%08x\n",rfRegOffset,rfRegValue)); +- } +- RT_TRACE(_module_hal_init_c_, _drv_info_, ("<===== _PHY_DumpRFReg_8723B()\n")); +-} +- +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8723B_PHYCFG_C_ ++ ++#include ++ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++/* Channel switch:The size of command tables for switch channel*/ ++#define MAX_PRECMD_CNT 16 ++#define MAX_RFDEPENDCMD_CNT 16 ++#define MAX_POSTCMD_CNT 16 ++ ++#define MAX_DOZE_WAITING_TIMES_9x 64 ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++/*------------------------Define global variable-----------------------------*/ ++ ++/*------------------------Define local variable------------------------------*/ ++ ++ ++/*--------------------Define export function prototype-----------------------*/ ++// Please refer to header file ++/*--------------------Define export function prototype-----------------------*/ ++ ++/*----------------------------Function Body----------------------------------*/ ++// ++// 1. BB register R/W API ++// ++ ++/** ++* Function: phy_CalculateBitShift ++* ++* OverView: Get shifted position of the BitMask ++* ++* Input: ++* u4Byte BitMask, ++* ++* Output: none ++* Return: u4Byte Return the shift bit bit position of the mask ++*/ ++static u32 ++phy_CalculateBitShift( ++ u32 BitMask ++ ) ++{ ++ u32 i; ++ ++ for(i=0; i<=31; i++) ++ { ++ if ( ((BitMask>>i) & 0x1 ) == 1) ++ break; ++ } ++ ++ return (i); ++} ++ ++ ++/** ++* Function: PHY_QueryBBReg ++* ++* OverView: Read "sepcific bits" from BB register ++* ++* Input: ++* PADAPTER Adapter, ++* u4Byte RegAddr, //The target address to be readback ++* u4Byte BitMask //The target bit position in the target address ++* //to be readback ++* Output: None ++* Return: u4Byte Data //The readback register value ++* Note: This function is equal to "GetRegSetting" in PHY programming guide ++*/ ++u32 ++PHY_QueryBBReg_8723B( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ) ++{ ++ u32 ReturnValue = 0, OriginalValue, BitShift; ++ u16 BBWaitCounter = 0; ++ ++#if (DISABLE_BB_RF == 1) ++ return 0; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); ++ ++ OriginalValue = rtw_read32(Adapter, RegAddr); ++ BitShift = phy_CalculateBitShift(BitMask); ++ ReturnValue = (OriginalValue & BitMask) >> BitShift; ++ ++ return (ReturnValue); ++ ++} ++ ++ ++/** ++* Function: PHY_SetBBReg ++* ++* OverView: Write "Specific bits" to BB register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* u4Byte RegAddr, //The target address to be modified ++* u4Byte BitMask //The target bit position in the target address ++* //to be modified ++* u4Byte Data //The new register value in the target bit position ++* //of the target address ++* ++* Output: None ++* Return: None ++* Note: This function is equal to "PutRegSetting" in PHY programming guide ++*/ ++ ++VOID ++PHY_SetBBReg_8723B( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //u16 BBWaitCounter = 0; ++ u32 OriginalValue, BitShift; ++ ++#if (DISABLE_BB_RF == 1) ++ return; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); ++ ++ if(BitMask!= bMaskDWord){//if not "double word" write ++ OriginalValue = rtw_read32(Adapter, RegAddr); ++ BitShift = phy_CalculateBitShift(BitMask); ++ Data = ((OriginalValue & (~BitMask)) | ((Data << BitShift) & BitMask)); ++ } ++ ++ rtw_write32(Adapter, RegAddr, Data); ++ ++} ++ ++ ++// ++// 2. RF register R/W API ++// ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_FwRFSerialRead() ++ * ++ * Overview: We support firmware to execute RF-R/W. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/21/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++static u32 ++phy_FwRFSerialRead( ++ IN PADAPTER Adapter, ++ IN RF_PATH eRFPath, ++ IN u32 Offset ) ++{ ++ u32 retValue = 0; ++ //RT_ASSERT(FALSE,("deprecate!\n")); ++ return (retValue); ++ ++} /* phy_FwRFSerialRead */ ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_FwRFSerialWrite() ++ * ++ * Overview: We support firmware to execute RF-R/W. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/21/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++phy_FwRFSerialWrite( ++ IN PADAPTER Adapter, ++ IN RF_PATH eRFPath, ++ IN u32 Offset, ++ IN u32 Data ) ++{ ++ //RT_ASSERT(FALSE,("deprecate!\n")); ++} ++ ++static u32 ++phy_RFSerialRead_8723B( ++ IN PADAPTER Adapter, ++ IN RF_PATH eRFPath, ++ IN u32 Offset ++ ) ++{ ++ u32 retValue = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ u32 NewOffset; ++ u32 tmplong,tmplong2; ++ u8 RfPiEnable=0; ++ u4Byte MaskforPhySet=0; ++ int i = 0; ++ ++ _enter_critical_mutex(&(adapter_to_dvobj(Adapter)->rf_read_reg_mutex) , NULL); ++ // ++ // Make sure RF register offset is correct ++ // ++ Offset &= 0xff; ++ ++ NewOffset = Offset; ++ ++ if(eRFPath == RF_PATH_A) ++ { ++ tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord);; ++ tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF ++ PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge)); ++ } ++ else ++ { ++ tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord); ++ tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF ++ PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge)); ++ } ++ ++ tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord); ++ PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge)); ++ PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge); ++ ++ rtw_udelay_os(10); ++ ++ for(i=0;i<2;i++) ++ rtw_udelay_os(MAX_STALL_TIME); ++ rtw_udelay_os(10); ++ ++ if(eRFPath == RF_PATH_A) ++ RfPiEnable = (u1Byte)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1|MaskforPhySet, BIT8); ++ else if(eRFPath == RF_PATH_B) ++ RfPiEnable = (u1Byte)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1|MaskforPhySet, BIT8); ++ ++ if(RfPiEnable) ++ { // Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF ++ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhySet, bLSSIReadBackData); ++ ++ //RT_DISP(FINIT, INIT_RF, ("Readback from RF-PI : 0x%x\n", retValue)); ++ } ++ else ++ { //Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF ++ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhySet, bLSSIReadBackData); ++ ++ //RT_DISP(FINIT, INIT_RF,("Readback from RF-SI : 0x%x\n", retValue)); ++ } ++ _exit_critical_mutex(&(adapter_to_dvobj(Adapter)->rf_read_reg_mutex) , NULL); ++ return retValue; ++ ++} ++ ++/** ++* Function: phy_RFSerialWrite_8723B ++* ++* OverView: Write data to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* RF_PATH eRFPath, //Radio path of A/B/C/D ++* u4Byte Offset, //The target address to be read ++* u4Byte Data //The new register Data in the target bit position ++* //of the target to be read ++* ++* Output: None ++* Return: None ++* Note: Threre are three types of serial operations: ++* 1. Software serial write ++* 2. Hardware LSSI-Low Speed Serial Interface ++* 3. Hardware HSSI-High speed ++* serial write. Driver need to implement (1) and (2). ++* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() ++ * ++ * Note: For RF8256 only ++ * The total count of RTL8256(Zebra4) register is around 36 bit it only employs ++ * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) ++ * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration ++ * programming guide" for more details. ++ * Thus, we define a sub-finction for RTL8526 register address conversion ++ * =========================================================== ++ * Register Mode RegCTL[1] RegCTL[0] Note ++ * (Reg00[12]) (Reg00[10]) ++ * =========================================================== ++ * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * ++ * 2008/09/02 MH Add 92S RF definition ++ * ++ * ++ * ++*/ ++static VOID ++phy_RFSerialWrite_8723B( ++ IN PADAPTER Adapter, ++ IN RF_PATH eRFPath, ++ IN u32 Offset, ++ IN u32 Data ++ ) ++{ ++ u32 DataAndAddr = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ u32 NewOffset; ++ ++ Offset &= 0xff; ++ ++ // ++ // Shadow Update ++ // ++ //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); ++ ++ // ++ // Switch page for 8256 RF IC ++ // ++ NewOffset = Offset; ++ ++ // ++ // Put write addr in [5:0] and write data in [31:16] ++ // ++ //DataAndAddr = (Data<<16) | (NewOffset&0x3f); ++ DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; // T65 RF ++ ++ // ++ // Write Operation ++ // ++ PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); ++ //RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); ++ ++} ++ ++ ++/** ++* Function: PHY_QueryRFReg ++* ++* OverView: Query "Specific bits" to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* RF_PATH eRFPath, //Radio path of A/B/C/D ++* u4Byte RegAddr, //The target address to be read ++* u4Byte BitMask //The target bit position in the target address ++* //to be read ++* ++* Output: None ++* Return: u4Byte Readback value ++* Note: This function is equal to "GetRFRegSetting" in PHY programming guide ++*/ ++u32 ++PHY_QueryRFReg_8723B( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ) ++{ ++ u32 Original_Value, Readback_Value, BitShift; ++ ++#if (DISABLE_BB_RF == 1) ++ return 0; ++#endif ++ ++ Original_Value = phy_RFSerialRead_8723B(Adapter, eRFPath, RegAddr); ++ ++ BitShift = phy_CalculateBitShift(BitMask); ++ Readback_Value = (Original_Value & BitMask) >> BitShift; ++ ++ return (Readback_Value); ++} ++ ++/** ++* Function: PHY_SetRFReg ++* ++* OverView: Write "Specific bits" to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* RF_PATH eRFPath, //Radio path of A/B/C/D ++* u4Byte RegAddr, //The target address to be modified ++* u4Byte BitMask //The target bit position in the target address ++* //to be modified ++* u4Byte Data //The new register Data in the target bit position ++* //of the target address ++* ++* Output: None ++* Return: None ++* Note: This function is equal to "PutRFRegSetting" in PHY programming guide ++*/ ++VOID ++PHY_SetRFReg_8723B( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ) ++{ ++ u32 Original_Value, BitShift; ++ ++#if (DISABLE_BB_RF == 1) ++ return; ++#endif ++ ++ // RF data is 12 bits only ++ if (BitMask != bRFRegOffsetMask) ++ { ++ Original_Value = phy_RFSerialRead_8723B(Adapter, eRFPath, RegAddr); ++ BitShift = phy_CalculateBitShift(BitMask); ++ Data = ((Original_Value & (~BitMask)) | (Data<< BitShift)); ++ } ++ ++ phy_RFSerialWrite_8723B(Adapter, eRFPath, RegAddr, Data); ++} ++ ++ ++// ++// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. ++// ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_MACConfig8192C ++ * ++ * Overview: Condig MAC by header file or parameter file. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 08/12/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++s32 PHY_MACConfig8723B(PADAPTER Adapter) ++{ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ s8 *pszMACRegFile; ++ s8 sz8723MACRegFile[] = RTL8723B_PHY_MACREG; ++ ++ ++ pszMACRegFile = sz8723MACRegFile; ++ ++ // ++ // Config MAC ++ // ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile); ++ if (rtStatus == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv); ++ rtStatus = _SUCCESS; ++#endif//CONFIG_EMBEDDED_FWIMG ++ } ++ ++ return rtStatus; ++} ++ ++/** ++* Function: phy_InitBBRFRegisterDefinition ++* ++* OverView: Initialize Register definition offset for Radio Path A/B/C/D ++* ++* Input: ++* PADAPTER Adapter, ++* ++* Output: None ++* Return: None ++* Note: The initialization value is constant and it should never be changes ++*/ ++static VOID ++phy_InitBBRFRegisterDefinition( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // RF Interface Sowrtware Control ++ pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 ++ pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) ++ ++ // RF Interface Output (and Enable) ++ pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 ++ pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 ++ ++ // RF Interface (Output and) Enable ++ pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) ++ pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) ++ ++ pHalData->PHYRegDef[ODM_RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter ++ pHalData->PHYRegDef[ODM_RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; ++ ++ pHalData->PHYRegDef[ODM_RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 ++ pHalData->PHYRegDef[ODM_RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2 ++ ++ // Tranceiver Readback LSSI/HSPI mode ++ pHalData->PHYRegDef[ODM_RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; ++ pHalData->PHYRegDef[ODM_RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; ++ pHalData->PHYRegDef[ODM_RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; ++ pHalData->PHYRegDef[ODM_RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; ++ ++} ++ ++#if (MP_DRIVER == 1) ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigBBWithMpHeaderFile ++ * ++ * Overview: Config PHY_REG_MP array ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 02/04/2010 chiyokolin Modify to new files. ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigBBWithMpHeaderFile( ++ IN PADAPTER Adapter, ++ IN u1Byte ConfigType) ++{ ++ int i; ++ u32* Rtl8723BPHY_REGArray_Table_MP; ++ u16 PHY_REGArrayMPLen; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ ++ PHY_REGArrayMPLen = Rtl8723B_PHY_REG_Array_MPLength; ++ Rtl8723BPHY_REGArray_Table_MP = (u32*)Rtl8723B_PHY_REG_Array_MP; ++ ++ if(ConfigType == BaseBand_Config_PHY_REG) ++ { ++ for(i=0;iodmpriv, CONFIG_BB_PHY_REG)) ++ rtStatus = _FAIL; ++#endif ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ DBG_8192C("%s():Write BB Reg Fail!!", __func__); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ ++#if MP_DRIVER == 1 ++ if (Adapter->registrypriv.mp_mode == 1) ++ { ++ // ++ // 1.1 Read PHY_REG_MP.TXT BB INIT!! ++ // ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (phy_ConfigBBWithMpParaFile(Adapter, pszBBRegMpFile) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if (HAL_STATUS_SUCCESS != ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_MP)) ++ rtStatus = _FAIL; ++#endif ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ DBG_8192C("%s():Write BB Reg MP Fail!!", __func__); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ } ++#endif // #if (MP_DRIVER == 1) ++ ++ // ++ // 2. Read BB AGC table Initialization ++ // ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile, CONFIG_BB_AGC_TAB) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if (HAL_STATUS_SUCCESS != ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB)) ++ rtStatus = _FAIL; ++#endif ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ DBG_8192C("%s():AGC Table Fail\n", __func__); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ ++phy_BB8190_Config_ParaFile_Fail: ++ ++ return rtStatus; ++} ++ ++ ++int ++PHY_BBConfig8723B( ++ IN PADAPTER Adapter ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 RegVal; ++ u8 TmpU1B=0; ++ u8 value8; ++ ++ phy_InitBBRFRegisterDefinition(Adapter); ++ ++ // Enable BB and RF ++ RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); ++ ++ /* switch ant to BT */ ++#ifdef CONFIG_USB_HCI ++ rtw_write32(Adapter, 0x948, 0x0); // USB use Antenna S0 ++#else ++ if (pHalData->ant_path == ODM_RF_PATH_A) ++ rtw_write32(Adapter, 0x948, 0x280); ++ else ++ rtw_write32(Adapter, 0x948, 0x0); ++#endif ++ ++ rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); ++ ++ rtw_usleep_os(10); ++ ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x1, 0xfffff,0x780); ++ ++#if 0 ++ // 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb); ++#endif ++ ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB); ++ ++ rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80); ++ ++ // ++ // Config BB and AGC ++ // ++ rtStatus = phy_BB8723b_Config_ParaFile(Adapter); ++ ++ hal_set_crystal_cap(Adapter, pHalData->CrystalCap); ++ ++ return rtStatus; ++} ++ ++void phy_LCK_8723B( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHY_SetRFReg(Adapter, RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFBE0); ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x8C01); ++ rtw_mdelay_os(200); ++ PHY_SetRFReg(Adapter, RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFFE0); ++} ++ ++#if 0 ++// Block & Path enable ++#define rOFDMCCKEN_Jaguar 0x808 // OFDM/CCK block enable ++#define bOFDMEN_Jaguar 0x20000000 ++#define bCCKEN_Jaguar 0x10000000 ++#define rRxPath_Jaguar 0x808 // Rx antenna ++#define bRxPath_Jaguar 0xff ++#define rTxPath_Jaguar 0x80c // Tx antenna ++#define bTxPath_Jaguar 0x0fffffff ++#define rCCK_RX_Jaguar 0xa04 // for cck rx path selection ++#define bCCK_RX_Jaguar 0x0c000000 ++#define rVhtlen_Use_Lsig_Jaguar 0x8c3 // Use LSIG for VHT length ++VOID ++PHY_BB8723B_Config_1T( ++ IN PADAPTER Adapter ++ ) ++{ ++ // BB OFDM RX Path_A ++ PHY_SetBBReg(Adapter, rRxPath_Jaguar, bRxPath_Jaguar, 0x11); ++ // BB OFDM TX Path_A ++ PHY_SetBBReg(Adapter, rTxPath_Jaguar, bMaskLWord, 0x1111); ++ // BB CCK R/Rx Path_A ++ PHY_SetBBReg(Adapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); ++ // MCS support ++ PHY_SetBBReg(Adapter, 0x8bc, 0xc0000060, 0x4); ++ // RF Path_B HSSI OFF ++ PHY_SetBBReg(Adapter, 0xe00, 0xf, 0x4); ++ // RF Path_B Power Down ++ PHY_SetBBReg(Adapter, 0xe90, bMaskDWord, 0); ++ // ADDA Path_B OFF ++ PHY_SetBBReg(Adapter, 0xe60, bMaskDWord, 0); ++ PHY_SetBBReg(Adapter, 0xe64, bMaskDWord, 0); ++} ++#endif ++ ++int ++PHY_RFConfig8723B( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int rtStatus = _SUCCESS; ++ ++ // ++ // RF config ++ // ++ rtStatus = PHY_RF6052_Config8723B(Adapter); ++ ++ phy_LCK_8723B(Adapter); ++ //PHY_BB8723B_Config_1T(Adapter); ++ ++ return rtStatus; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_ConfigRFWithParaFile() ++ * ++ * Overview: This function read RF parameters from general file format, and do RF 3-wire ++ * ++ * Input: PADAPTER Adapter ++ * ps1Byte pFileName ++ * RF_PATH eRFPath ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * ++ * Note: Delay may be required for RF configuration ++ *---------------------------------------------------------------------------*/ ++int ++PHY_ConfigRFWithParaFile_8723B( ++ IN PADAPTER Adapter, ++ IN u8* pFileName, ++ RF_PATH eRFPath ++) ++{ ++ return _SUCCESS; ++} ++ ++//**************************************** ++/*----------------------------------------------------------------------------- ++ * Function: PHY_ConfigRFWithHeaderFile() ++ * ++ * Overview: This function read RF parameters from general file format, and do RF 3-wire ++ * ++ * Input: PADAPTER Adapter ++ * ps1Byte pFileName ++ * RF_PATH eRFPath ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * ++ * Note: Delay may be required for RF configuration ++ *---------------------------------------------------------------------------*/ ++void phy_PowerIndexCheck8723B( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN OUT u8 *cckPowerLevel, ++ IN OUT u8 *ofdmPowerLevel, ++ IN OUT u8 *BW20PowerLevel, ++ IN OUT u8 *BW40PowerLevel ++ ) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0]; ++ pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0]; ++ pHalData->CurrentBW2024GTxPwrIdx = BW20PowerLevel[0]; ++ pHalData->CurrentBW4024GTxPwrIdx = BW40PowerLevel[0]; ++ ++ RT_TRACE(_module_hal_init_c_, _drv_info_, ++ ("PHY_SetTxPowerLevel8723B(): CurrentCckTxPwrIdx : 0x%x,CurrentOfdm24GTxPwrIdx: 0x%x\n", ++ pHalData->CurrentCckTxPwrIdx, pHalData->CurrentOfdm24GTxPwrIdx)); ++} ++ ++/************************************************************************************************************** ++ * Description: ++ * The low-level interface to set TxAGC , called by both MP and Normal Driver. ++ * ++ * <20120830, Kordan> ++ **************************************************************************************************************/ ++ ++VOID ++PHY_SetTxPowerIndex_8723B( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ) ++{ ++ if (RFPath == ODM_RF_PATH_A || RFPath == ODM_RF_PATH_B) ++ { ++ switch (Rate) ++ { ++ case MGN_1M: PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex); break; ++ case MGN_2M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1, PowerIndex); break; ++ case MGN_5_5M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte2, PowerIndex); break; ++ case MGN_11M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte3, PowerIndex); break; ++ ++ case MGN_6M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte0, PowerIndex); break; ++ case MGN_9M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte1, PowerIndex); break; ++ case MGN_12M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte2, PowerIndex); break; ++ case MGN_18M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte3, PowerIndex); break; ++ ++ case MGN_24M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte0, PowerIndex); break; ++ case MGN_36M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte1, PowerIndex); break; ++ case MGN_48M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte2, PowerIndex); break; ++ case MGN_54M: PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte3, PowerIndex); break; ++ ++ case MGN_MCS0: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte0, PowerIndex); break; ++ case MGN_MCS1: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte1, PowerIndex); break; ++ case MGN_MCS2: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte2, PowerIndex); break; ++ case MGN_MCS3: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte3, PowerIndex); break; ++ ++ case MGN_MCS4: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte0, PowerIndex); break; ++ case MGN_MCS5: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte1, PowerIndex); break; ++ case MGN_MCS6: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte2, PowerIndex); break; ++ case MGN_MCS7: PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte3, PowerIndex); break; ++ ++ default: ++ DBG_871X("Invalid Rate!!\n"); ++ break; ++ } ++ } ++ else ++ { ++ RT_TRACE(_module_hal_init_c_, _drv_err_,("Invalid RFPath!!\n")); ++ } ++} ++ ++u8 ++phy_GetCurrentTxNum_8723B( ++ IN PADAPTER pAdapter ++ ) ++{ ++ return RF_TX_NUM_NONIMPLEMENT; ++} ++ ++u8 ++PHY_GetTxPowerIndex_8723B( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); ++ s8 txPower = 0, powerDiffByRate = 0, limit = 0; ++ BOOLEAN bIn24G = _FALSE; ++ ++ //DBG_871X("===>%s\n", __FUNCTION__ ); ++ ++ txPower = (s8) PHY_GetTxPowerIndexBase( pAdapter,RFPath, Rate, BandWidth, Channel, &bIn24G ); ++ powerDiffByRate = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_A, RF_1TX, Rate ); ++ ++ limit = PHY_GetTxPowerLimit( pAdapter, pAdapter->registrypriv.RegPwrTblSel, (u8)(!bIn24G), pHalData->CurrentChannelBW, RFPath, Rate, pHalData->CurrentChannel); ++ ++ powerDiffByRate = powerDiffByRate > limit ? limit : powerDiffByRate; ++ txPower += powerDiffByRate; ++ ++ txPower += PHY_GetTxPowerTrackingOffset( pAdapter, RFPath, Rate ); ++ ++ if(txPower > MAX_POWER_INDEX) ++ txPower = MAX_POWER_INDEX; ++ ++ //DBG_871X("Final Tx Power(RF-%c, Channel: %d) = %d(0x%X)\n", ((RFPath==0)?'A':'B'), Channel, txPower, txPower)); ++ return (u8) txPower; ++} ++ ++VOID ++PHY_SetTxPowerLevel8723B( ++ IN PADAPTER Adapter, ++ IN u8 Channel ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ u8 cur_antenna; ++ u8 RFPath = ODM_RF_PATH_A; ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ rtw_hal_get_odm_var(Adapter, HAL_ODM_ANTDIV_SELECT, &cur_antenna, NULL); ++ ++ if (pHalData->AntDivCfg) /* antenna diversity Enable */ ++ RFPath = ((cur_antenna == MAIN_ANT) ? ODM_RF_PATH_A : ODM_RF_PATH_B); ++ else /* antenna diversity disable */ ++#endif ++ RFPath = pHalData->ant_path; ++ ++ ++ RT_TRACE(_module_hal_init_c_, _drv_info_,("==>PHY_SetTxPowerLevel8723B()\n")); ++ ++ PHY_SetTxPowerLevelByPath(Adapter, Channel, RFPath); ++ ++ RT_TRACE(_module_hal_init_c_, _drv_info_,("<==PHY_SetTxPowerLevel8723B()\n")); ++} ++ ++VOID ++PHY_GetTxPowerLevel8723B( ++ IN PADAPTER Adapter, ++ OUT s32* powerlevel ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ s32 TxPwrDbm = 13; ++#if 0 ++ RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_GetTxPowerLevel8723B(): TxPowerLevel: %#x\n", TxPwrDbm)); ++ ++ if ( pMgntInfo->ClientConfigPwrInDbm != UNSPECIFIED_PWR_DBM ) ++ *powerlevel = pMgntInfo->ClientConfigPwrInDbm; ++ else ++ *powerlevel = TxPwrDbm; ++#endif ++} ++ ++ ++// <20130321, VincentLan> A workaround to eliminate the 2440MHz & 2480MHz spur of 8723B. (Asked by Rock.) ++VOID ++phy_SpurCalibration_8723B( ++ IN PADAPTER pAdapter, ++ IN u1Byte ToChannel, ++ IN u1Byte threshold ++ ) ++{ ++ u4Byte freq[6] = {0xFCCD, 0xFC4D, 0xFFCD, 0xFF4D, 0xFCCD, 0xFF9A}; // {chnl 5, 6, 7, 8, 13, 14} ++ u1Byte idx = 0; ++ u1Byte b_doNotch = FALSE; ++ u1Byte initial_gain; ++ BOOLEAN bHW_Ctrl = FALSE, bSW_Ctrl = FALSE,bHW_Ctrl_S1 = FALSE, bSW_Ctrl_S1 = FALSE; ++ u4Byte reg948; ++ ++ // add for notch ++ u4Byte wlan_channel, CurrentChannel, Is40MHz; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ //PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ++ PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); ++ //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++ ++ // check threshold ++ if(threshold <= 0x0) ++ threshold = 0x16; ++ ++ DBG_8192C("===>phy_SpurCalibration_8723B: Channel = %d\n", ToChannel); ++ ++ if (ToChannel == 5) ++ idx = 0; ++ else if (ToChannel == 6) ++ idx = 1; ++ else if (ToChannel == 7) ++ idx = 2; ++ else if (ToChannel == 8) ++ idx = 3; ++ else if (ToChannel == 13) ++ idx = 4; ++ else if (ToChannel == 14) ++ idx = 5; ++ else ++ idx = 10; ++ ++ reg948 = PHY_QueryBBReg(pAdapter, rS0S1_PathSwitch, bMaskDWord); ++ if((reg948 & BIT6) == 0x0) ++ bSW_Ctrl = TRUE; ++ else ++ bHW_Ctrl = TRUE; ++ ++ if(bHW_Ctrl) ++ bHW_Ctrl_S1 = (PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3)==0x1)? TRUE:FALSE; ++ else if(bSW_Ctrl) ++ bSW_Ctrl_S1 = ((reg948 & BIT9) == 0x0)? TRUE:FALSE; ++ ++ // If wlan at S1 (both HW control & SW control) and current channel=5,6,7,8,13,14 ++ if ((bHW_Ctrl_S1 || bSW_Ctrl_S1) && (idx <= 5)) ++ { ++ initial_gain = (u1Byte) (ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0) & 0x7f); ++ ODM_Write_DIG(pDM_Odm, 0x30); ++ PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, bMaskDWord, 0xccf000c0); // disable 3-wire ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_PSDFunction, bMaskDWord, freq[idx]); // Setup PSD ++ PHY_SetBBReg(pAdapter, rFPGA0_PSDFunction, bMaskDWord, 0x400000 | freq[idx]); // Start PSD ++ ++ rtw_msleep_os(30); ++ ++ if(PHY_QueryBBReg(pAdapter, rFPGA0_PSDReport, bMaskDWord) >= threshold) ++ b_doNotch = TRUE; ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_PSDFunction, bMaskDWord, freq[idx]); // turn off PSD ++ PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, bMaskDWord, 0xccc000c0); // enable 3-wire ++ ODM_Write_DIG(pDM_Odm, initial_gain); ++ } ++ ++ // --- Notch Filter --- Asked by Rock ++ if (b_doNotch) ++ { ++ CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); ++ wlan_channel = CurrentChannel & 0x0f; //Get center frequency ++ ++ switch(wlan_channel) //Set notch filter ++ { ++ case 5: ++ case 13: ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT28|BIT27|BIT26|BIT25|BIT24, 0xB); ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x1); //enable notch filter ++ ODM_SetBBReg(pDM_Odm, 0xD40, bMaskDWord, 0x06000000); ++ ODM_SetBBReg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD4C, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x1); //enable CSI mask ++ break; ++ case 6: ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT28|BIT27|BIT26|BIT25|BIT24, 0x4); ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x1); //enable notch filter ++ ODM_SetBBReg(pDM_Odm, 0xD40, bMaskDWord, 0x00000600); ++ ODM_SetBBReg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD4C, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x1); //enable CSI mask ++ break; ++ case 7: ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT28|BIT27|BIT26|BIT25|BIT24, 0x3); ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x1); //enable notch filter ++ ODM_SetBBReg(pDM_Odm, 0xD40, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD4C, bMaskDWord, 0x06000000); ++ ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x1); //enable CSI mask ++ break; ++ case 8: ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT28|BIT27|BIT26|BIT25|BIT24, 0xA); ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x1); //enable notch filter ++ ODM_SetBBReg(pDM_Odm, 0xD40, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD4C, bMaskDWord, 0x00000380); ++ ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x1); //enable CSI mask ++ break; ++ case 14: ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT28|BIT27|BIT26|BIT25|BIT24, 0x5); ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x1); //enable notch filter ++ ODM_SetBBReg(pDM_Odm, 0xD40, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); ++ ODM_SetBBReg(pDM_Odm, 0xD4C, bMaskDWord, 0x00180000); ++ ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x1); //enable CSI mask ++ break; ++ default: ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x0); //disable notch filter ++ ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x0); //disable CSI mask function ++ break; ++ }//switch(wlan_channel) ++ return; ++ } ++ ++ ODM_SetBBReg(pDM_Odm, 0xC40, BIT9, 0x0); //disable notch filter ++ ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, 0x0); //disable CSI mask ++ ++} ++ ++VOID ++phy_SetRegBW_8723B( ++ IN PADAPTER Adapter, ++ CHANNEL_WIDTH CurrentBW ++) ++{ ++ u16 RegRfMod_BW, u2tmp = 0; ++ RegRfMod_BW = rtw_read16(Adapter, REG_TRXPTCL_CTL_8723B); ++ ++ switch(CurrentBW) ++ { ++ case CHANNEL_WIDTH_20: ++ rtw_write16(Adapter, REG_TRXPTCL_CTL_8723B, (RegRfMod_BW & 0xFE7F)); // BIT 7 = 0, BIT 8 = 0 ++ break; ++ ++ case CHANNEL_WIDTH_40: ++ u2tmp = RegRfMod_BW | BIT7; ++ rtw_write16(Adapter, REG_TRXPTCL_CTL_8723B, (u2tmp & 0xFEFF)); // BIT 7 = 1, BIT 8 = 0 ++ break; ++ ++ case CHANNEL_WIDTH_80: ++ u2tmp = RegRfMod_BW | BIT8; ++ rtw_write16(Adapter, REG_TRXPTCL_CTL_8723B, (u2tmp & 0xFF7F)); // BIT 7 = 0, BIT 8 = 1 ++ break; ++ ++ default: ++ DBG_871X("phy_PostSetBWMode8723B(): unknown Bandwidth: %#X\n",CurrentBW); ++ break; ++ } ++} ++ ++u8 ++phy_GetSecondaryChnl_8723B( ++ IN PADAPTER Adapter ++) ++{ ++ u8 SCSettingOf40 = 0, SCSettingOf20 = 0; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ ++ RT_TRACE(_module_hal_init_c_, _drv_info_,("SCMapping: VHT Case: pHalData->CurrentChannelBW %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->CurrentChannelBW,pHalData->nCur80MhzPrimeSC,pHalData->nCur40MhzPrimeSC)); ++ if(pHalData->CurrentChannelBW== CHANNEL_WIDTH_80) ++ { ++ if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ++ SCSettingOf40 = VHT_DATA_SC_40_LOWER_OF_80MHZ; ++ else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) ++ SCSettingOf40 = VHT_DATA_SC_40_UPPER_OF_80MHZ; ++ else ++ RT_TRACE(_module_hal_init_c_, _drv_err_,("SCMapping: Not Correct Primary40MHz Setting \n")); ++ ++ if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) ++ SCSettingOf20 = VHT_DATA_SC_20_LOWEST_OF_80MHZ; ++ else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) ++ SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ; ++ else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) ++ SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ; ++ else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) ++ SCSettingOf20 = VHT_DATA_SC_20_UPPERST_OF_80MHZ; ++ else ++ RT_TRACE(_module_hal_init_c_, _drv_err_,("SCMapping: Not Correct Primary40MHz Setting \n")); ++ } ++ else if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_40) ++ { ++ RT_TRACE(_module_hal_init_c_, _drv_info_,("SCMapping: VHT Case: pHalData->CurrentChannelBW %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->CurrentChannelBW,pHalData->nCur40MhzPrimeSC)); ++ ++ if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) ++ SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ; ++ else if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ++ SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ; ++ else ++ RT_TRACE(_module_hal_init_c_, _drv_err_,("SCMapping: Not Correct Primary40MHz Setting \n")); ++ } ++ ++ RT_TRACE(_module_hal_init_c_, _drv_info_,("SCMapping: SC Value %x \n", ( (SCSettingOf40 << 4) | SCSettingOf20))); ++ return ( (SCSettingOf40 << 4) | SCSettingOf20); ++} ++ ++VOID ++phy_PostSetBwMode8723B( ++ IN PADAPTER Adapter ++) ++{ ++ u1Byte SubChnlNum = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ ++ //3 Set Reg668 Reg440 BW ++ phy_SetRegBW_8723B(Adapter, pHalData->CurrentChannelBW); ++ ++ //3 Set Reg483 ++ SubChnlNum = phy_GetSecondaryChnl_8723B(Adapter); ++ rtw_write8(Adapter, REG_DATA_SC_8723B, SubChnlNum); ++ ++ //3// ++ //3//<2>Set PHY related register ++ //3// ++ switch(pHalData->CurrentChannelBW) ++ { ++ /* 20 MHz channel*/ ++ case CHANNEL_WIDTH_20: ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); ++ ++ PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); ++ ++// PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); ++ ++ PHY_SetBBReg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT31|BIT30), 0x0); ++ break; ++ ++ ++ /* 40 MHz channel*/ ++ case CHANNEL_WIDTH_40: ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); ++ ++ PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); ++ ++ // Set Control channel to upper or lower. These settings are required only for 40MHz ++ PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); ++ ++ PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); ++ ++// PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); ++ ++ PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1); ++ ++ break; ++ ++ ++ ++ default: ++ /*RT_TRACE(COMP_DBG, DBG_LOUD, ("phy_SetBWMode8723B(): unknown Bandwidth: %#X\n"\ ++ ,pHalData->CurrentChannelBW));*/ ++ break; ++ ++ } ++ ++ //3<3>Set RF related register ++ PHY_RF6052SetBandwidth8723B(Adapter, pHalData->CurrentChannelBW); ++} ++ ++VOID ++phy_SwChnl8723B( ++ IN PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 channelToSW = pHalData->CurrentChannel; ++ ++ if(pHalData->rf_chip == RF_PSEUDO_11N) ++ { ++ //RT_TRACE(COMP_MLME,DBG_LOUD,("phy_SwChnl8723B: return for PSEUDO \n")); ++ return; ++ } ++ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff00) | channelToSW ); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0] ); ++ PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0] ); ++ ++ DBG_8192C("===>phy_SwChnl8723B: Channel = %d\n", channelToSW); ++ //phy_SpurCalibration_8723B(pAdapter, channelToSW, 0x16); ++} ++ ++VOID ++phy_SwChnlAndSetBwMode8723B( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("phy_SwChnlAndSetBwMode8723B(): bSwChnl %d, bSetChnlBW %d \n", pHalData->bSwChnl, pHalData->bSetChnlBW)); ++ if ( Adapter->bNotifyChannelChange ) ++ { ++ DBG_871X( "[%s] bSwChnl=%d, ch=%d, bSetChnlBW=%d, bw=%d\n", ++ __FUNCTION__, ++ pHalData->bSwChnl, ++ pHalData->CurrentChannel, ++ pHalData->bSetChnlBW, ++ pHalData->CurrentChannelBW); ++ } ++ ++ if (RTW_CANNOT_RUN(Adapter)) ++ return; ++ ++ if(pHalData->bSwChnl) ++ { ++ phy_SwChnl8723B(Adapter); ++ pHalData->bSwChnl = _FALSE; ++ } ++ ++ if(pHalData->bSetChnlBW) ++ { ++ phy_PostSetBwMode8723B(Adapter); ++ pHalData->bSetChnlBW = _FALSE; ++ } ++ ++ PHY_SetTxPowerLevel8723B(Adapter, pHalData->CurrentChannel); ++} ++ ++VOID ++PHY_HandleSwChnlAndSetBW8723B( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bSwitchChannel, ++ IN BOOLEAN bSetBandWidth, ++ IN u8 ChannelNum, ++ IN CHANNEL_WIDTH ChnlWidth, ++ IN EXTCHNL_OFFSET ExtChnlOffsetOf40MHz, ++ IN EXTCHNL_OFFSET ExtChnlOffsetOf80MHz, ++ IN u8 CenterFrequencyIndex1 ++) ++{ ++ //static BOOLEAN bInitialzed = _FALSE; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ u8 tmpChannel = pHalData->CurrentChannel; ++ CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; ++ u8 tmpnCur40MhzPrimeSC = pHalData->nCur40MhzPrimeSC; ++ u8 tmpnCur80MhzPrimeSC = pHalData->nCur80MhzPrimeSC; ++ u8 tmpCenterFrequencyIndex1 =pHalData->CurrentCenterFrequencyIndex1; ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ ++ //DBG_871X("=> PHY_HandleSwChnlAndSetBW8812: bSwitchChannel %d, bSetBandWidth %d \n",bSwitchChannel,bSetBandWidth); ++ ++ //check is swchnl or setbw ++ if(!bSwitchChannel && !bSetBandWidth) ++ { ++ DBG_871X("PHY_HandleSwChnlAndSetBW8812: not switch channel and not set bandwidth \n"); ++ return; ++ } ++ ++ //skip change for channel or bandwidth is the same ++ if(bSwitchChannel) ++ { ++ //if(pHalData->CurrentChannel != ChannelNum) ++ { ++ if (HAL_IsLegalChannel(Adapter, ChannelNum)) ++ pHalData->bSwChnl = _TRUE; ++ } ++ } ++ ++ if(bSetBandWidth) ++ { ++ #if 0 ++ if(bInitialzed == _FALSE) ++ { ++ bInitialzed = _TRUE; ++ pHalData->bSetChnlBW = _TRUE; ++ } ++ else if((pHalData->CurrentChannelBW != ChnlWidth) ||(pHalData->nCur40MhzPrimeSC != ExtChnlOffsetOf40MHz) || (pHalData->CurrentCenterFrequencyIndex1!= CenterFrequencyIndex1)) ++ { ++ pHalData->bSetChnlBW = _TRUE; ++ } ++ #else ++ pHalData->bSetChnlBW = _TRUE; ++ #endif ++ } ++ ++ if(!pHalData->bSetChnlBW && !pHalData->bSwChnl) ++ { ++ //DBG_871X("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d \n",pHalData->bSwChnl,pHalData->bSetChnlBW); ++ return; ++ } ++ ++ ++ if(pHalData->bSwChnl) ++ { ++ pHalData->CurrentChannel=ChannelNum; ++ pHalData->CurrentCenterFrequencyIndex1 = ChannelNum; ++ } ++ ++ ++ if(pHalData->bSetChnlBW) ++ { ++ pHalData->CurrentChannelBW = ChnlWidth; ++#if 0 ++ if(ExtChnlOffsetOf40MHz==EXTCHNL_OFFSET_LOWER) ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; ++ else if(ExtChnlOffsetOf40MHz==EXTCHNL_OFFSET_UPPER) ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; ++ else ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ if(ExtChnlOffsetOf80MHz==EXTCHNL_OFFSET_LOWER) ++ pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; ++ else if(ExtChnlOffsetOf80MHz==EXTCHNL_OFFSET_UPPER) ++ pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; ++ else ++ pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++#else ++ pHalData->nCur40MhzPrimeSC = ExtChnlOffsetOf40MHz; ++ pHalData->nCur80MhzPrimeSC = ExtChnlOffsetOf80MHz; ++#endif ++ ++ pHalData->CurrentCenterFrequencyIndex1 = CenterFrequencyIndex1; ++ } ++ ++ //Switch workitem or set timer to do switch channel or setbandwidth operation ++ if (!RTW_CANNOT_RUN(Adapter)) ++ phy_SwChnlAndSetBwMode8723B(Adapter); ++ else { ++ if(pHalData->bSwChnl) ++ { ++ pHalData->CurrentChannel = tmpChannel; ++ pHalData->CurrentCenterFrequencyIndex1 = tmpChannel; ++ } ++ if(pHalData->bSetChnlBW) ++ { ++ pHalData->CurrentChannelBW = tmpBW; ++ pHalData->nCur40MhzPrimeSC = tmpnCur40MhzPrimeSC; ++ pHalData->nCur80MhzPrimeSC = tmpnCur80MhzPrimeSC; ++ pHalData->CurrentCenterFrequencyIndex1 = tmpCenterFrequencyIndex1; ++ } ++ } ++ ++ //DBG_871X("Channel %d ChannelBW %d ",pHalData->CurrentChannel, pHalData->CurrentChannelBW); ++ //DBG_871X("40MhzPrimeSC %d 80MhzPrimeSC %d ",pHalData->nCur40MhzPrimeSC, pHalData->nCur80MhzPrimeSC); ++ //DBG_871X("CenterFrequencyIndex1 %d \n",pHalData->CurrentCenterFrequencyIndex1); ++ ++ //DBG_871X("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d \n",pHalData->bSwChnl,pHalData->bSetChnlBW); ++ ++} ++ ++VOID ++PHY_SetBWMode8723B( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M ++ IN unsigned char Offset // Upper, Lower, or Don't care ++) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ ++ PHY_HandleSwChnlAndSetBW8723B(Adapter, _FALSE, _TRUE, pHalData->CurrentChannel, Bandwidth, Offset, Offset, pHalData->CurrentChannel); ++} ++ ++VOID ++PHY_SwChnl8723B( // Call after initialization ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ) ++{ ++ PHY_HandleSwChnlAndSetBW8723B(Adapter, _TRUE, _FALSE, channel, 0, 0, 0, channel); ++} ++ ++VOID ++PHY_SetSwChnlBWMode8723B( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++) ++{ ++ //DBG_871X("%s()===>\n",__FUNCTION__); ++ ++ PHY_HandleSwChnlAndSetBW8723B(Adapter, _TRUE, _TRUE, channel, Bandwidth, Offset40, Offset80, channel); ++ ++ //DBG_871X("<==%s()\n",__FUNCTION__); ++} ++ ++static VOID ++_PHY_DumpRFReg_8723B(IN PADAPTER pAdapter) ++{ ++ u32 rfRegValue,rfRegOffset; ++ ++ RT_TRACE(_module_hal_init_c_, _drv_info_, ("_PHY_DumpRFReg_8723B()====>\n")); ++ ++ for(rfRegOffset = 0x00;rfRegOffset<=0x30;rfRegOffset++){ ++ rfRegValue = PHY_QueryRFReg_8723B(pAdapter,RF_PATH_A, rfRegOffset, bMaskDWord); ++ RT_TRACE(_module_hal_init_c_, _drv_info_, (" 0x%02x = 0x%08x\n",rfRegOffset,rfRegValue)); ++ } ++ RT_TRACE(_module_hal_init_c_, _drv_info_, ("<===== _PHY_DumpRFReg_8723B()\n")); ++} ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_rf6052.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_rf6052.c +old mode 100755 +new mode 100644 +index 64c67c9..f083e3e +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_rf6052.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_rf6052.c +@@ -1,268 +1,268 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-/****************************************************************************** +- * +- * +- * Module: rtl8192c_rf6052.c ( Source C File) +- * +- * Note: Provide RF 6052 series relative API. +- * +- * Function: +- * +- * Export: +- * +- * Abbrev: +- * +- * History: +- * Data Who Remark +- * +- * 09/25/2008 MHC Create initial version. +- * 11/05/2008 MHC Add API for tw power setting. +- * +- * +-******************************************************************************/ +- +-#include +- +-/*---------------------------Define Local Constant---------------------------*/ +-/*---------------------------Define Local Constant---------------------------*/ +- +- +-/*------------------------Define global variable-----------------------------*/ +-/*------------------------Define global variable-----------------------------*/ +- +- +-/*------------------------Define local variable------------------------------*/ +-// 2008/11/20 MH For Debug only, RF +-//static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; +-static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; +-/*------------------------Define local variable------------------------------*/ +- +-/*----------------------------------------------------------------------------- +- * Function: PHY_RF6052SetBandwidth() +- * +- * Overview: This function is called by SetBWModeCallback8190Pci() only +- * +- * Input: PADAPTER Adapter +- * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M +- * +- * Output: NONE +- * +- * Return: NONE +- * +- * Note: For RF type 0222D +- *---------------------------------------------------------------------------*/ +-VOID +-PHY_RF6052SetBandwidth8723B( +- IN PADAPTER Adapter, +- IN CHANNEL_WIDTH Bandwidth) //20M or 40M +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- +- switch(Bandwidth) +- { +- case CHANNEL_WIDTH_20: +- pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11 ); +- PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); +- PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); +- break; +- +- case CHANNEL_WIDTH_40: +- pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 ); +- PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); +- PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); +- break; +- +- default: +- //RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); +- break; +- } +- +-} +- +-static VOID +-phy_RF6052_Config_HardCode( +- IN PADAPTER Adapter +- ) +-{ +- +- // Set Default Bandwidth to 20M +- //Adapter->HalFunc .SetBWModeHandler(Adapter, CHANNEL_WIDTH_20); +- +- // TODO: Set Default Channel to channel one for RTL8225 +- +-} +- +-static int +-phy_RF6052_Config_ParaFile( +- IN PADAPTER Adapter +- ) +-{ +- u32 u4RegValue=0; +- u8 eRFPath; +- BB_REGISTER_DEFINITION_T *pPhyReg; +- +- int rtStatus = _SUCCESS; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- +- static char sz8723RadioAFile[] = RTL8723B_PHY_RADIO_A; +- static char sz8723RadioBFile[] = RTL8723B_PHY_RADIO_B; +- static s1Byte sz8723BTxPwrTrackFile[] = RTL8723B_TXPWR_TRACK; +- char *pszRadioAFile, *pszRadioBFile, *pszTxPwrTrackFile; +- +- pszRadioAFile = sz8723RadioAFile; +- pszRadioBFile = sz8723RadioBFile; +- pszTxPwrTrackFile = sz8723BTxPwrTrackFile; +- +- //3//----------------------------------------------------------------- +- //3// <2> Initialize RF +- //3//----------------------------------------------------------------- +- //for(eRFPath = RF_PATH_A; eRFPath NumTotalRFPath; eRFPath++) +- for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) +- { +- +- pPhyReg = &pHalData->PHYRegDef[eRFPath]; +- +- /*----Store original RFENV control type----*/ +- switch(eRFPath) +- { +- case RF_PATH_A: +- case RF_PATH_C: +- u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); +- break; +- case RF_PATH_B : +- case RF_PATH_D: +- u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); +- break; +- } +- +- /*----Set RF_ENV enable----*/ +- PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); +- rtw_udelay_os(1);//PlatformStallExecution(1); +- +- /*----Set RF_ENV output high----*/ +- PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); +- rtw_udelay_os(1);//PlatformStallExecution(1); +- +- /* Set bit number of Address and Data for RF register */ +- PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 +- rtw_udelay_os(1);//PlatformStallExecution(1); +- +- PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 +- rtw_udelay_os(1);//PlatformStallExecution(1); +- +- /*----Initialize RF fom connfiguration file----*/ +- switch(eRFPath) +- { +- case RF_PATH_A: +-#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +- if (PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, eRFPath) == _FAIL) +-#endif +- { +-#ifdef CONFIG_EMBEDDED_FWIMG +- if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath)) +- rtStatus = _FAIL; +-#endif +- } +- break; +- case RF_PATH_B: +-#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +- if (PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, eRFPath) == _FAIL) +-#endif +- { +-#ifdef CONFIG_EMBEDDED_FWIMG +- if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath)) +- rtStatus = _FAIL; +-#endif +- } +- break; +- case RF_PATH_C: +- break; +- case RF_PATH_D: +- break; +- } +- +- /*----Restore RFENV control type----*/; +- switch(eRFPath) +- { +- case RF_PATH_A: +- case RF_PATH_C: +- PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); +- break; +- case RF_PATH_B : +- case RF_PATH_D: +- PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); +- break; +- } +- +- if(rtStatus != _SUCCESS){ +- //RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); +- goto phy_RF6052_Config_ParaFile_Fail; +- } +- +- } +- +- //3 ----------------------------------------------------------------- +- //3 Configuration of Tx Power Tracking +- //3 ----------------------------------------------------------------- +- +-#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE +- if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, pszTxPwrTrackFile) == _FAIL) +-#endif +- { +-#ifdef CONFIG_EMBEDDED_FWIMG +- ODM_ConfigRFWithTxPwrTrackHeaderFile(&pHalData->odmpriv); +-#endif +- } +- +- //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n")); +- return rtStatus; +- +-phy_RF6052_Config_ParaFile_Fail: +- return rtStatus; +-} +- +- +-int +-PHY_RF6052_Config8723B( +- IN PADAPTER Adapter) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +- int rtStatus = _SUCCESS; +- +- // +- // Initialize general global value +- // +- // TODO: Extend RF_PATH_C and RF_PATH_D in the future +- if(pHalData->rf_type == RF_1T1R) +- pHalData->NumTotalRFPath = 1; +- else +- pHalData->NumTotalRFPath = 2; +- +- // +- // Config BB and RF +- // +- rtStatus = phy_RF6052_Config_ParaFile(Adapter); +- return rtStatus; +- +-} +- +-/* End of HalRf6052.c */ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/****************************************************************************** ++ * ++ * ++ * Module: rtl8192c_rf6052.c ( Source C File) ++ * ++ * Note: Provide RF 6052 series relative API. ++ * ++ * Function: ++ * ++ * Export: ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * ++ * 09/25/2008 MHC Create initial version. ++ * 11/05/2008 MHC Add API for tw power setting. ++ * ++ * ++******************************************************************************/ ++ ++#include ++ ++/*---------------------------Define Local Constant---------------------------*/ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++/*------------------------Define global variable-----------------------------*/ ++/*------------------------Define global variable-----------------------------*/ ++ ++ ++/*------------------------Define local variable------------------------------*/ ++// 2008/11/20 MH For Debug only, RF ++//static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; ++static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; ++/*------------------------Define local variable------------------------------*/ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_RF6052SetBandwidth() ++ * ++ * Overview: This function is called by SetBWModeCallback8190Pci() only ++ * ++ * Input: PADAPTER Adapter ++ * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Note: For RF type 0222D ++ *---------------------------------------------------------------------------*/ ++VOID ++PHY_RF6052SetBandwidth8723B( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth) //20M or 40M ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ switch(Bandwidth) ++ { ++ case CHANNEL_WIDTH_20: ++ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11 ); ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); ++ break; ++ ++ case CHANNEL_WIDTH_40: ++ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 ); ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); ++ PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); ++ break; ++ ++ default: ++ //RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); ++ break; ++ } ++ ++} ++ ++static VOID ++phy_RF6052_Config_HardCode( ++ IN PADAPTER Adapter ++ ) ++{ ++ ++ // Set Default Bandwidth to 20M ++ //Adapter->HalFunc .SetBWModeHandler(Adapter, CHANNEL_WIDTH_20); ++ ++ // TODO: Set Default Channel to channel one for RTL8225 ++ ++} ++ ++static int ++phy_RF6052_Config_ParaFile( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 u4RegValue=0; ++ u8 eRFPath; ++ BB_REGISTER_DEFINITION_T *pPhyReg; ++ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ static char sz8723RadioAFile[] = RTL8723B_PHY_RADIO_A; ++ static char sz8723RadioBFile[] = RTL8723B_PHY_RADIO_B; ++ static s1Byte sz8723BTxPwrTrackFile[] = RTL8723B_TXPWR_TRACK; ++ char *pszRadioAFile, *pszRadioBFile, *pszTxPwrTrackFile; ++ ++ pszRadioAFile = sz8723RadioAFile; ++ pszRadioBFile = sz8723RadioBFile; ++ pszTxPwrTrackFile = sz8723BTxPwrTrackFile; ++ ++ //3//----------------------------------------------------------------- ++ //3// <2> Initialize RF ++ //3//----------------------------------------------------------------- ++ //for(eRFPath = RF_PATH_A; eRFPath NumTotalRFPath; eRFPath++) ++ for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ { ++ ++ pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ ++ /*----Store original RFENV control type----*/ ++ switch(eRFPath) ++ { ++ case RF_PATH_A: ++ case RF_PATH_C: ++ u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); ++ break; ++ case RF_PATH_B : ++ case RF_PATH_D: ++ u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); ++ break; ++ } ++ ++ /*----Set RF_ENV enable----*/ ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /*----Set RF_ENV output high----*/ ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /* Set bit number of Address and Data for RF register */ ++ PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /*----Initialize RF fom connfiguration file----*/ ++ switch(eRFPath) ++ { ++ case RF_PATH_A: ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, eRFPath) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath)) ++ rtStatus = _FAIL; ++#endif ++ } ++ break; ++ case RF_PATH_B: ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, eRFPath) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath)) ++ rtStatus = _FAIL; ++#endif ++ } ++ break; ++ case RF_PATH_C: ++ break; ++ case RF_PATH_D: ++ break; ++ } ++ ++ /*----Restore RFENV control type----*/; ++ switch(eRFPath) ++ { ++ case RF_PATH_A: ++ case RF_PATH_C: ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); ++ break; ++ case RF_PATH_B : ++ case RF_PATH_D: ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); ++ break; ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); ++ goto phy_RF6052_Config_ParaFile_Fail; ++ } ++ ++ } ++ ++ //3 ----------------------------------------------------------------- ++ //3 Configuration of Tx Power Tracking ++ //3 ----------------------------------------------------------------- ++ ++#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, pszTxPwrTrackFile) == _FAIL) ++#endif ++ { ++#ifdef CONFIG_EMBEDDED_FWIMG ++ ODM_ConfigRFWithTxPwrTrackHeaderFile(&pHalData->odmpriv); ++#endif ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n")); ++ return rtStatus; ++ ++phy_RF6052_Config_ParaFile_Fail: ++ return rtStatus; ++} ++ ++ ++int ++PHY_RF6052_Config8723B( ++ IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int rtStatus = _SUCCESS; ++ ++ // ++ // Initialize general global value ++ // ++ // TODO: Extend RF_PATH_C and RF_PATH_D in the future ++ if(pHalData->rf_type == RF_1T1R) ++ pHalData->NumTotalRFPath = 1; ++ else ++ pHalData->NumTotalRFPath = 2; ++ ++ // ++ // Config BB and RF ++ // ++ rtStatus = phy_RF6052_Config_ParaFile(Adapter); ++ return rtStatus; ++ ++} ++ ++/* End of HalRf6052.c */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_rxdesc.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_rxdesc.c +old mode 100755 +new mode 100644 +index eedc8c2..c7fa88d +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_rxdesc.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_rxdesc.c +@@ -21,227 +21,6 @@ + + #include + +-static void process_rssi(_adapter *padapter,union recv_frame *prframe) +-{ +- u32 last_rssi, tmp_val; +- struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; +-#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS +- struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data; +-#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS +- +- //DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength); +- //if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) +- { +- +- #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS +- if(signal_stat->update_req) { +- signal_stat->total_num = 0; +- signal_stat->total_val = 0; +- signal_stat->update_req = 0; +- } +- +- signal_stat->total_num++; +- signal_stat->total_val += pattrib->phy_info.SignalStrength; +- signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; +- #else //CONFIG_NEW_SIGNAL_STAT_PROCESS +- +- //Adapter->RxStats.RssiCalculateCnt++; //For antenna Test +- if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX) +- { +- padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX; +- last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index]; +- padapter->recvpriv.signal_strength_data.total_val -= last_rssi; +- } +- padapter->recvpriv.signal_strength_data.total_val +=pattrib->phy_info.SignalStrength; +- +- padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->phy_info.SignalStrength; +- if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX) +- padapter->recvpriv.signal_strength_data.index = 0; +- +- +- tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num; +- +- if(padapter->recvpriv.is_signal_dbg) { +- padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg; +- padapter->recvpriv.rssi=(s8)translate_percentage_to_dbm(padapter->recvpriv.signal_strength_dbg); +- } else { +- padapter->recvpriv.signal_strength= tmp_val; +- padapter->recvpriv.rssi=(s8)translate_percentage_to_dbm(tmp_val); +- } +- +- RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num)); +- #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS +- } +- +-}// Process_UI_RSSI_8192C +- +-static void process_link_qual(_adapter *padapter,union recv_frame *prframe) +-{ +- u32 last_evm=0, tmpVal; +- struct rx_pkt_attrib *pattrib; +-#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS +- struct signal_stat * signal_stat; +-#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS +- +- if(prframe == NULL || padapter==NULL){ +- return; +- } +- +- pattrib = &prframe->u.hdr.attrib; +-#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS +- signal_stat = &padapter->recvpriv.signal_qual_data; +-#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS +- +- //DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual); +- +-#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS +- if(signal_stat->update_req) { +- signal_stat->total_num = 0; +- signal_stat->total_val = 0; +- signal_stat->update_req = 0; +- } +- +- signal_stat->total_num++; +- signal_stat->total_val += pattrib->phy_info.SignalQuality; +- signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; +- +-#else //CONFIG_NEW_SIGNAL_STAT_PROCESS +- if(pattrib->phy_info.SignalQuality != 0) +- { +- // +- // 1. Record the general EVM to the sliding window. +- // +- if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) +- { +- padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; +- last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; +- padapter->recvpriv.signal_qual_data.total_val -= last_evm; +- } +- padapter->recvpriv.signal_qual_data.total_val += pattrib->phy_info.SignalQuality; +- +- padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->phy_info.SignalQuality; +- if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) +- padapter->recvpriv.signal_qual_data.index = 0; +- +- RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->phy_info.SignalQuality)); +- +- // <1> Showed on UI for user, in percentage. +- tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num; +- padapter->recvpriv.signal_qual=(u8)tmpVal; +- +- } +- else +- { +- RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->phy_info.SignalQuality)); +- } +-#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS +- +-}// Process_UiLinkQuality8192S +- +-static void process_phy_info(_adapter *padapter, void *prframe) +-{ +- union recv_frame *precvframe = (union recv_frame *)prframe; +- // +- // Check RSSI +- // +- process_rssi(padapter, precvframe); +- // +- // Check PWDB. +- // +- //process_PWDB(padapter, precvframe); +- +- //UpdateRxSignalStatistics8192C(Adapter, pRfd); +- // +- // Check EVM +- // +- process_link_qual(padapter, precvframe); +- #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA +- rtw_store_phy_info( padapter,prframe); +- #endif +- +-} +- +-/* +- * Notice: +- * Before calling this function, +- * precvframe->u.hdr.rx_data should be ready! +- */ +-void rtl8723b_query_rx_phy_status(union recv_frame *precvframe, struct phy_stat *pphy_status) +-{ +- PADAPTER padapter = precvframe->u.hdr.adapter; +- struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); +- PODM_PHY_INFO_T pPHYInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info); +- +- u8 *wlanhdr; +- ODM_PACKET_INFO_T pkt_info; +- u8 *sa = NULL; +- //_irqL irqL; +- struct sta_priv *pstapriv; +- struct sta_info *psta; +- +- +- pkt_info.bPacketMatchBSSID =_FALSE; +- pkt_info.bPacketToSelf = _FALSE; +- pkt_info.bPacketBeacon = _FALSE; +- +- wlanhdr = get_recvframe_data(precvframe); +- +- pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) && +- !pattrib->icv_err && !pattrib->crc_err && +- _rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN)); +- +- pkt_info.bToSelf = ((!pattrib->icv_err) && (!pattrib->crc_err)) && (_rtw_memcmp(get_ra(wlanhdr), myid(&padapter->eeprompriv), ETH_ALEN)); +- +- pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID && (_rtw_memcmp(get_ra(wlanhdr), myid(&padapter->eeprompriv), ETH_ALEN)); +- +- pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && (GetFrameSubType(wlanhdr) == WIFI_BEACON); +-/* +- if(pkt_info.bPacketBeacon){ +- if(check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){ +- sa = padapter->mlmepriv.cur_network.network.MacAddress; +- #if 0 +- { +- DBG_871X("==> rx beacon from AP[%02x:%02x:%02x:%02x:%02x:%02x]\n", +- sa[0],sa[1],sa[2],sa[3],sa[4],sa[5]); +- } +- #endif +- } +- //to do Ad-hoc +- } +- else{ +- sa = get_sa(wlanhdr); +- } +-*/ +- sa = get_ta(wlanhdr); +- +- pkt_info.StationID = 0xFF; +- +- pstapriv = &padapter->stapriv; +- psta = rtw_get_stainfo(pstapriv, sa); +- if (psta) +- pkt_info.StationID = psta->mac_id; +- pkt_info.DataRate = pattrib->data_rate; +- +- ODM_PhyStatusQuery(&pHalData->odmpriv, pPHYInfo, (u8*)pphy_status, &pkt_info); +- if(psta) +- psta->rssi = pattrib->phy_info.RecvSignalPower; +- +- precvframe->u.hdr.psta = NULL; +- if (pkt_info.bPacketMatchBSSID && +- (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)) { +- if (psta) { +- precvframe->u.hdr.psta = psta; +- process_phy_info(padapter, precvframe); +- } +- } else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) { +- if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) +- if (psta) +- precvframe->u.hdr.psta = psta; +- process_phy_info(padapter, precvframe); +- } +-} +- + void rtl8723b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc) + { + struct rx_pkt_attrib *pattrib; +@@ -276,6 +55,15 @@ void rtl8723b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc) + + // Offset 12 + pattrib->data_rate = (u8)GET_RX_STATUS_DESC_RX_RATE_8723B(pdesc); ++ ++ /* Offset 16 */ ++ pattrib->sgi = (u8)GET_RX_STATUS_DESC_SPLCP_8723B(pdesc); ++ pattrib->ldpc = (u8)GET_RX_STATUS_DESC_LDPC_8723B(pdesc); ++ pattrib->stbc = (u8)GET_RX_STATUS_DESC_STBC_8723B(pdesc); ++ pattrib->bw = (u8)GET_RX_STATUS_DESC_BW_8723B(pdesc); ++ ++ /* Offset 20 */ ++ /* pattrib->tsfl=(u8)GET_RX_STATUS_DESC_TSFL_8723B(pdesc); */ + } + } + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_sreset.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_sreset.c +old mode 100755 +new mode 100644 +index 2c1ee80..63ea920 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_sreset.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/rtl8723b_sreset.c +@@ -1,111 +1,111 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#define _RTL8723B_SRESET_C_ +- +-#include +- +- +-#ifdef DBG_CONFIG_ERROR_DETECT +-void rtl8723b_sreset_xmit_status_check(_adapter *padapter) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- struct sreset_priv *psrtpriv = &pHalData->srestpriv; +- +- unsigned long current_time; +- struct xmit_priv *pxmitpriv = &padapter->xmitpriv; +- unsigned int diff_time; +- u32 txdma_status; +- +- txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS); +- if( txdma_status !=0x00 && txdma_status !=0xeaeaeaea){ +- DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); +- rtw_hal_sreset_reset(padapter); +- } +- +-#ifdef CONFIG_USB_HCI +- //total xmit irp = 4 +- //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); +- //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) +- current_time = rtw_get_current_time(); +- +- if(0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) { +- +- diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time); +- +- if (diff_time > 2000) { +- if (psrtpriv->last_tx_complete_time == 0) { +- psrtpriv->last_tx_complete_time = current_time; +- } +- else{ +- diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time); +- if (diff_time > 4000) { +- u32 ability; +- +- //padapter->Wifi_Error_Status = WIFI_TX_HANG; +- rtw_hal_get_hwreg(padapter, HW_VAR_DM_FLAG, (u8*)&ability); +- +- DBG_871X("%s tx hang %s\n", __FUNCTION__, +- (ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : ""); +- +- if (!(ability & ODM_BB_ADAPTIVITY)) +- rtw_hal_sreset_reset(padapter); +- } +- } +- } +- } +-#endif // #ifdef CONFIG_USB_HCI +- +- if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) { +- psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; +- rtw_hal_sreset_reset(padapter); +- return; +- } +-} +- +-void rtl8723b_sreset_linked_status_check(_adapter *padapter) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- struct sreset_priv *psrtpriv = &pHalData->srestpriv; +-#if 0 +- u32 regc50,regc58,reg824,reg800; +- regc50 = rtw_read32(padapter,0xc50); +- regc58 = rtw_read32(padapter,0xc58); +- reg824 = rtw_read32(padapter,0x824); +- reg800 = rtw_read32(padapter,0x800); +- if( ((regc50&0xFFFFFF00)!= 0x69543400)|| +- ((regc58&0xFFFFFF00)!= 0x69543400)|| +- (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| +- ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) +- { +- DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, +- regc50, regc58, reg824, reg800); +- rtw_hal_sreset_reset(padapter); +- } +-#endif +- +- if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) { +- psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; +- rtw_hal_sreset_reset(padapter); +- return; +- } +-} +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8723B_SRESET_C_ ++ ++#include ++ ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++void rtl8723b_sreset_xmit_status_check(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ unsigned long current_time; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ unsigned int diff_time; ++ u32 txdma_status; ++ ++ txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS); ++ if( txdma_status !=0x00 && txdma_status !=0xeaeaeaea){ ++ DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); ++ rtw_hal_sreset_reset(padapter); ++ } ++ ++#ifdef CONFIG_USB_HCI ++ //total xmit irp = 4 ++ //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); ++ //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) ++ current_time = rtw_get_current_time(); ++ ++ if(0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) { ++ ++ diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time); ++ ++ if (diff_time > 2000) { ++ if (psrtpriv->last_tx_complete_time == 0) { ++ psrtpriv->last_tx_complete_time = current_time; ++ } ++ else{ ++ diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time); ++ if (diff_time > 4000) { ++ u32 ability = 0; ++ ++ //padapter->Wifi_Error_Status = WIFI_TX_HANG; ++ ability = rtw_phydm_ability_get(padapter); ++ ++ DBG_871X("%s tx hang %s\n", __FUNCTION__, ++ (ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : ""); ++ ++ if (!(ability & ODM_BB_ADAPTIVITY)) ++ rtw_hal_sreset_reset(padapter); ++ } ++ } ++ } ++ } ++#endif // #ifdef CONFIG_USB_HCI ++ ++ if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) { ++ psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; ++ rtw_hal_sreset_reset(padapter); ++ return; ++ } ++} ++ ++void rtl8723b_sreset_linked_status_check(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++#if 0 ++ u32 regc50,regc58,reg824,reg800; ++ regc50 = rtw_read32(padapter,0xc50); ++ regc58 = rtw_read32(padapter,0xc58); ++ reg824 = rtw_read32(padapter,0x824); ++ reg800 = rtw_read32(padapter,0x800); ++ if( ((regc50&0xFFFFFF00)!= 0x69543400)|| ++ ((regc58&0xFFFFFF00)!= 0x69543400)|| ++ (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| ++ ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) ++ { ++ DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, ++ regc50, regc58, reg824, reg800); ++ rtw_hal_sreset_reset(padapter); ++ } ++#endif ++ ++ if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) { ++ psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; ++ rtw_hal_sreset_reset(padapter); ++ return; ++ } ++} ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_led.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_led.c +old mode 100755 +new mode 100644 +index 26aeebb..7bba731 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_led.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_led.c +@@ -1,131 +1,127 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#define _RTL8723BS_LED_C_ +- +-#include "rtl8723b_hal.h" +- +-//================================================================================ +-// LED object. +-//================================================================================ +- +- +-//================================================================================ +-// Prototype of protected function. +-//================================================================================ +- +-//================================================================================ +-// LED_819xUsb routines. +-//================================================================================ +- +-// +-// Description: +-// Turn on LED according to LedPin specified. +-// +-void +-SwLedOn_8723BS( +- _adapter *padapter, +- PLED_SDIO pLed +-) +-{ +- u8 LedCfg; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- +- if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) +- { +- return; +- } +- +- pLed->bLedOn = _TRUE; +- +-} +- +- +-// +-// Description: +-// Turn off LED according to LedPin specified. +-// +-void +-SwLedOff_8723BS( +- _adapter *padapter, +- PLED_SDIO pLed +-) +-{ +- u8 LedCfg; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- +- if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) +- { +- goto exit; +- } +- +-exit: +- pLed->bLedOn = _FALSE; +- +-} +- +-//================================================================================ +-// Interface to manipulate LED objects. +-//================================================================================ +- +-//================================================================================ +-// Default LED behavior. +-//================================================================================ +- +-// +-// Description: +-// Initialize all LED_871x objects. +-// +-void +-rtl8723bs_InitSwLeds( +- _adapter *padapter +- ) +-{ +-#if 0 +- struct led_priv *pledpriv = &(padapter->ledpriv); +- +- pledpriv->LedControlHandler = LedControlSDIO; +- +- pledpriv->SwLedOn = SwLedOn_8723BS; +- pledpriv->SwLedOff = SwLedOff_8723BS; +- +- InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); +- +- InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); +-#endif +-} +- +- +-// +-// Description: +-// DeInitialize all LED_819xUsb objects. +-// +-void +-rtl8723bs_DeInitSwLeds( +- _adapter *padapter +- ) +-{ +-#if 0 +- struct led_priv *ledpriv = &(padapter->ledpriv); +- +- DeInitLed871x( &(ledpriv->SwLed0) ); +- DeInitLed871x( &(ledpriv->SwLed1) ); +-#endif +-} +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8723BS_LED_C_ ++ ++#include "rtl8723b_hal.h" ++ ++//================================================================================ ++// LED object. ++//================================================================================ ++ ++ ++//================================================================================ ++// Prototype of protected function. ++//================================================================================ ++ ++//================================================================================ ++// LED_819xUsb routines. ++//================================================================================ ++ ++// ++// Description: ++// Turn on LED according to LedPin specified. ++// ++void ++SwLedOn_8723BS( ++ _adapter *padapter, ++ PLED_SDIO pLed ++) ++{ ++ u8 LedCfg; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (RTW_CANNOT_RUN(padapter)) ++ return; ++ ++ pLed->bLedOn = _TRUE; ++ ++} ++ ++ ++// ++// Description: ++// Turn off LED according to LedPin specified. ++// ++void ++SwLedOff_8723BS( ++ _adapter *padapter, ++ PLED_SDIO pLed ++) ++{ ++ u8 LedCfg; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (RTW_CANNOT_RUN(padapter)) ++ goto exit; ++ ++exit: ++ pLed->bLedOn = _FALSE; ++ ++} ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++ ++//================================================================================ ++// Default LED behavior. ++//================================================================================ ++ ++// ++// Description: ++// Initialize all LED_871x objects. ++// ++void ++rtl8723bs_InitSwLeds( ++ _adapter *padapter ++ ) ++{ ++#if 0 ++ struct led_priv *pledpriv = &(padapter->ledpriv); ++ ++ pledpriv->LedControlHandler = LedControlSDIO; ++ ++ pledpriv->SwLedOn = SwLedOn_8723BS; ++ pledpriv->SwLedOff = SwLedOff_8723BS; ++ ++ InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); ++ ++ InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); ++#endif ++} ++ ++ ++// ++// Description: ++// DeInitialize all LED_819xUsb objects. ++// ++void ++rtl8723bs_DeInitSwLeds( ++ _adapter *padapter ++ ) ++{ ++#if 0 ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ ++ DeInitLed871x( &(ledpriv->SwLed0) ); ++ DeInitLed871x( &(ledpriv->SwLed1) ); ++#endif ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_recv.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_recv.c +old mode 100755 +new mode 100644 +index 1189583..ea704f6 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_recv.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_recv.c +@@ -37,11 +37,11 @@ static void freerecvbuf(struct recv_buf *precvbuf) + _rtw_spinlock_free(&precvbuf->recvbuf_lock); + } + +-static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbuf, struct phy_stat *pphy_status) ++static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbuf, u8 *pphy_status) + { + s32 ret=_SUCCESS; + #ifdef CONFIG_CONCURRENT_MODE +- u8 *primary_myid, *secondary_myid, *paddr1; ++ u8 *secondary_myid, *paddr1; + union recv_frame *precvframe_if2 = NULL; + _adapter *primary_padapter = precvframe->u.hdr.adapter; + _adapter *secondary_padapter = primary_padapter->pbuddy_adapter; +@@ -56,8 +56,7 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbu + + if(IS_MCAST(paddr1) == _FALSE)//unicast packets + { +- //primary_myid = myid(&primary_padapter->eeprompriv); +- secondary_myid = myid(&secondary_padapter->eeprompriv); ++ secondary_myid = adapter_mac_addr(secondary_padapter); + + if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN)) + { +@@ -94,7 +93,6 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbu + { + DBG_8192C("pre_recv_entry(): rtw_skb_copy fail , drop frag frame \n"); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); +- ret = _FAIL; + return ret; + } + +@@ -103,7 +101,6 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbu + { + DBG_8192C("pre_recv_entry(): rtw_skb_clone fail , drop frame\n"); + rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); +- ret = _FAIL; + return ret; + } + } +@@ -123,7 +120,7 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbu + recvframe_pull_tail(precvframe_if2, IEEE80211_FCS_LEN); + + if (pattrib->physt) +- rtl8723b_query_rx_phy_status(precvframe_if2, pphy_status); ++ rx_query_phy_status(precvframe_if2, pphy_status); + + if(rtw_recv_entry(precvframe_if2) != _SUCCESS) + { +@@ -131,6 +128,11 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbu + ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); + } + } ++ ++ if (precvframe->u.hdr.attrib.physt) ++ rx_query_phy_status(precvframe, pphy_status); ++ ++ ret = rtw_recv_entry(precvframe); + #endif + + return ret; +@@ -320,17 +322,20 @@ static void rtl8723bs_recv_tasklet(void *priv) + #ifdef CONFIG_CONCURRENT_MODE + if (rtw_buddy_adapter_up(padapter)) + { +- if (pre_recv_entry(precvframe, precvbuf, (struct phy_stat*)ptr) != _SUCCESS) { +- DBG_8192C(FUNC_ADPT_FMT ": pre_recv_entry(precvframe) != _SUCCESS\n", +- FUNC_ADPT_ARG(padapter->pbuddy_adapter)); ++ if (pre_recv_entry(precvframe, precvbuf, ptr) != _SUCCESS) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ++ ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); + } + } ++ else + #endif +- if (pattrib->physt) +- rtl8723b_query_rx_phy_status(precvframe, (struct phy_stat*)ptr); ++ { ++ if (pattrib->physt) ++ rx_query_phy_status(precvframe, ptr); + +- if (rtw_recv_entry(precvframe) != _SUCCESS) { +- RT_TRACE(_module_rtl871x_recv_c_, _drv_dump_, ("%s: rtw_recv_entry(precvframe) != _SUCCESS\n",__FUNCTION__)); ++ if (rtw_recv_entry(precvframe) != _SUCCESS) { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_dump_, ("%s: rtw_recv_entry(precvframe) != _SUCCESS\n",__FUNCTION__)); ++ } + } + } + else { +@@ -477,7 +482,7 @@ static void rtl8723bs_recv_tasklet(void *priv) + + // The case of can't allocte skb is serious and may never be recovered, + // once bDriverStopped is enable, this task should be stopped. +- if (padapter->bDriverStopped == _FALSE) { ++ if (!rtw_is_drv_stopped(padapter)) { + #ifdef PLATFORM_LINUX + tasklet_schedule(&precvpriv->recv_tasklet); + #endif +@@ -509,18 +514,21 @@ static void rtl8723bs_recv_tasklet(void *priv) + #ifdef CONFIG_CONCURRENT_MODE + if (rtw_buddy_adapter_up(padapter)) + { +- if (pre_recv_entry(precvframe, precvbuf, (struct phy_stat*)ptr) != _SUCCESS) { +- DBG_8192C(FUNC_ADPT_FMT ": pre_recv_entry(precvframe) != _SUCCESS\n", +- FUNC_ADPT_ARG(padapter->pbuddy_adapter)); ++ if (pre_recv_entry(precvframe, precvbuf, ptr) != _SUCCESS) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ++ ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); + } + } ++ else + #endif +- if (pattrib->physt) +- rtl8723b_query_rx_phy_status(precvframe, (struct phy_stat*)ptr); +- +- if (rtw_recv_entry(precvframe) != _SUCCESS) + { +- RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("rtl8723bs_recv_tasklet: rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ if (pattrib->physt) ++ rx_query_phy_status(precvframe, ptr); ++ ++ if (rtw_recv_entry(precvframe) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("rtl8723bs_recv_tasklet: rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } + } + } + else { +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_xmit.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_xmit.c +old mode 100755 +new mode 100644 +index 5ba84ea..c7046fd +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_xmit.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/rtl8723bs_xmit.c +@@ -28,13 +28,7 @@ static u8 rtw_sdio_wait_enough_TxOQT_space(PADAPTER padapter, u8 agg_num) + + while (pHalData->SdioTxOQTFreeSpace < agg_num) + { +- if ((padapter->bSurpriseRemoved == _TRUE) +- || (padapter->bDriverStopped == _TRUE) +-#ifdef CONFIG_CONCURRENT_MODE +- ||((padapter->pbuddy_adapter) +- && ((padapter->pbuddy_adapter->bSurpriseRemoved) ||(padapter->pbuddy_adapter->bDriverStopped))) +-#endif +- ){ ++ if (RTW_CANNOT_RUN(padapter)) { + DBG_871X("%s: bSurpriseRemoved or bDriverStopped (wait TxOQT)\n", __func__); + return _FALSE; + } +@@ -65,8 +59,6 @@ static s32 rtl8723_dequeue_writeport(PADAPTER padapter) + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct xmit_buf *pxmitbuf; +- PADAPTER pri_padapter = padapter; +- s32 ret = 0; + u8 PageIdx = 0; + u32 deviceId; + #ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT +@@ -75,18 +67,7 @@ static s32 rtl8723_dequeue_writeport(PADAPTER padapter) + u32 polling_num = 0; + #endif + +- +-#ifdef CONFIG_CONCURRENT_MODE +- if (padapter->adapter_type > 0) +- pri_padapter = padapter->pbuddy_adapter; +- +- if (rtw_buddy_adapter_up(padapter)) +- ret = check_buddy_fwstate(padapter, _FW_UNDER_SURVEY); +-#endif +- +- ret = ret || check_fwstate(pmlmepriv, _FW_UNDER_SURVEY); +- +- if (_TRUE == ret) ++ if (rtw_xmit_ac_blocked(padapter) == _TRUE) + pxmitbuf = dequeue_pending_xmitbuf_under_survey(pxmitpriv); + else + pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); +@@ -112,9 +93,8 @@ static s32 rtl8723_dequeue_writeport(PADAPTER padapter) + } + + query_free_page: +- // check if hardware tx fifo page is enough +- if( _FALSE == rtw_hal_sdio_query_tx_freepage(pri_padapter, PageIdx, pxmitbuf->pg_num)) +- { ++ /* check if hardware tx fifo page is enough */ ++ if (_FALSE == rtw_hal_sdio_query_tx_freepage(padapter, PageIdx, pxmitbuf->pg_num)) { + #ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT + if (!bUpdatePageNum) { + // Total number of page is NOT available, so update current FIFO status +@@ -140,13 +120,7 @@ query_free_page: + #endif //CONFIG_SDIO_TX_ENABLE_AVAL_INT + } + +- if ((padapter->bSurpriseRemoved == _TRUE) +- || (padapter->bDriverStopped == _TRUE) +-#ifdef CONFIG_CONCURRENT_MODE +- ||((padapter->pbuddy_adapter) +- && ((padapter->pbuddy_adapter->bSurpriseRemoved) ||(padapter->pbuddy_adapter->bDriverStopped))) +-#endif +- ){ ++ if (RTW_CANNOT_RUN(padapter)) { + RT_TRACE(_module_hal_xmit_c_, _drv_notice_, + ("%s: bSurpriseRemoved(wirte port)\n", __FUNCTION__)); + goto free_xmitbuf; +@@ -163,7 +137,7 @@ query_free_page: + + rtw_write_port(padapter, deviceId, pxmitbuf->len, (u8 *)pxmitbuf); + +- rtw_hal_sdio_update_tx_freepage(pri_padapter, PageIdx, pxmitbuf->pg_num); ++ rtw_hal_sdio_update_tx_freepage(padapter, PageIdx, pxmitbuf->pg_num); + + free_xmitbuf: + //rtw_free_xmitframe(pxmitpriv, pframe); +@@ -191,7 +165,7 @@ free_xmitbuf: + if (sdio_hisr & SDIO_HISR_RX_REQUEST) + { + sdio_claim_host(func); +- sd_int_hdl(pri_padapter); ++ sd_int_hdl(GET_PRIMARY_ADAPTER(padapter)); + sdio_release_host(func); + } + else +@@ -239,11 +213,12 @@ s32 rtl8723bs_xmit_buf_handler(PADAPTER padapter) + return _FAIL; + } + +- ret = (padapter->bDriverStopped == _TRUE) || (padapter->bSurpriseRemoved == _TRUE); +- if (ret) { +- RT_TRACE(_module_hal_xmit_c_, _drv_err_, +- ("%s: bDriverStopped(%d) bSurpriseRemoved(%d)!\n", +- __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ if (RTW_CANNOT_RUN(padapter)) { ++ RT_TRACE(_module_hal_xmit_c_, _drv_err_ ++ , ("%s: bDriverStopped(%s) bSurpriseRemoved(%s)!\n" ++ , __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False")); + return _FAIL; + } + +@@ -305,6 +280,8 @@ static s32 xmit_xmitframes(PADAPTER padapter, struct xmit_priv *pxmitpriv) + u8 txdesc_size = TXDESC_SIZE; + int inx[4]; + u8 pre_qsel=0xFF,next_qsel=0xFF; ++ u8 single_sta_in_queue = _FALSE; ++ + err = 0; + no_res = _FALSE; + hwxmits = pxmitpriv->hwxmits; +@@ -341,6 +318,9 @@ static s32 xmit_xmitframes(PADAPTER padapter, struct xmit_priv *pxmitpriv) + sta_plist = get_next(sta_phead); + //because stop_sta_xmit may delete sta_plist at any time + //so we should add lock here, or while loop can not exit ++ ++ single_sta_in_queue = rtw_end_of_queue_search(sta_phead, get_next(sta_plist)); ++ + while (rtw_end_of_queue_search(sta_phead, sta_plist) == _FALSE) + { + ptxservq = LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending); +@@ -384,7 +364,14 @@ static s32 xmit_xmitframes(PADAPTER padapter, struct xmit_priv *pxmitpriv) + pxmitbuf->priv_data = NULL; + enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); + //can not yield under lock ++ + //rtw_yield_os(); ++ if (single_sta_in_queue == _FALSE) { ++ /* break the loop in case there is more than one sta in this ac queue */ ++ pxmitbuf = NULL; ++ err = -3; ++ break; ++ } + } else { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + } +@@ -459,7 +446,12 @@ static s32 xmit_xmitframes(PADAPTER padapter, struct xmit_priv *pxmitpriv) + + if (_rtw_queue_empty(pframe_queue) == _TRUE) + rtw_list_delete(&ptxservq->tx_pending); +- ++ else if (err == -3) { ++ /* Re-arrange the order of stations in this ac queue to balance the service for these stations */ ++ rtw_list_delete(&ptxservq->tx_pending); ++ rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmit->sta_queue)); ++ } ++ + if (err) break; + } + _exit_critical_bh(&pxmitpriv->lock, &irql); +@@ -485,7 +477,8 @@ static s32 xmit_xmitframes(PADAPTER padapter, struct xmit_priv *pxmitpriv) + pxmitbuf = NULL; + } + +- if (err) break; ++ if (err == -2) ++ break; + } + + return err; +@@ -516,11 +509,12 @@ wait: + } + + next: +- if ((padapter->bDriverStopped == _TRUE) || +- (padapter->bSurpriseRemoved == _TRUE)) { +- RT_TRACE(_module_hal_xmit_c_, _drv_notice_, +- ("%s: bDriverStopped(%d) bSurpriseRemoved(%d)\n", +- __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ if (RTW_CANNOT_RUN(padapter)) { ++ RT_TRACE(_module_hal_xmit_c_, _drv_notice_ ++ , ("%s: bDriverStopped(%s) bSurpriseRemoved(%s)\n" ++ , __func__ ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False")); + return _FAIL; + } + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/sdio_halinit.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/sdio_halinit.c +old mode 100755 +new mode 100644 +index 30db5c9..aebc84c +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/sdio_halinit.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/sdio_halinit.c +@@ -20,12 +20,8 @@ + #define _SDIO_HALINIT_C_ + + #include +- +-#ifdef CONFIG_EFUSE_CONFIG_FILE +-#include +-#include +-#endif + #include "hal_com_h2c.h" ++ + /* + * Description: + * Call power on sequence to enable card +@@ -40,6 +36,7 @@ static u8 CardEnable(PADAPTER padapter) + u8 ret = _FAIL; + + ++ bMacPwrCtrlOn = _FALSE; + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (bMacPwrCtrlOn == _FALSE) + { +@@ -147,7 +144,7 @@ static int PowerOnCheck(PADAPTER padapter) + } + + //static +-u8 _InitPowerOn_8723BS(PADAPTER padapter) ++u32 _InitPowerOn_8723BS(PADAPTER padapter) + { + u8 value8; + u16 value16; +@@ -263,10 +260,6 @@ _init_power_on: + // DBG_8192C("%s: REG_PAD_CTRL1(0x%x)=0x%02X\n", __FUNCTION__, REG_PAD_CTRL1_8723B, rtw_read8(padapter, REG_PAD_CTRL1_8723B)); + #endif // CONFIG_BT_COEXIST + +-#ifdef CONFIG_GPIO_WAKEUP +- rtw_clear_hostwakeupgpio(padapter); +-#endif // CONFIG_GPIO_WAKEUP +- + return _SUCCESS; + } + +@@ -747,9 +740,6 @@ void _initSdioAggregationSetting(PADAPTER padapter) + HalRxAggr8723BSdio(padapter); + + sdio_AggSettingRxUpdate(padapter); +- +- // 201/12/10 MH Add for USB agg mode dynamic switch. +- pHalData->UsbRxHighSpeedMode = _FALSE; + } + + static void _RXAggrSwitch(PADAPTER padapter, u8 enable) +@@ -857,12 +847,6 @@ void _InitOperationMode(PADAPTER padapter) + + void _InitInterrupt(PADAPTER padapter) + { +- // HISR - turn all off +- rtw_write32(padapter, REG_HISR, 0); +- +- // HIMR - turn all off +- rtw_write32(padapter, REG_HIMR, 0); +- + // + // Initialize and enable SDIO Host Interrupt. + // +@@ -881,37 +865,17 @@ void _InitRDGSetting(PADAPTER padapter) + rtw_write8(padapter, REG_RD_RESP_PKT_TH, 0x05); + } + +-#if (MP_DRIVER == 1 ) +-static void _InitRxSetting(PADAPTER padapter) +-{ +- rtw_write32(padapter, REG_MACID, 0x87654321); +- rtw_write32(padapter, 0x0700, 0x87654321); +-} +-#endif +- + static void _InitRFType(PADAPTER padapter) + { + struct registry_priv *pregpriv = &padapter->registrypriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- BOOLEAN is92CU = IS_92C_SERIAL(pHalData->VersionID); +- + + #if DISABLE_BB_RF + pHalData->rf_chip = RF_PSEUDO_11N; + return; + #endif +- + pHalData->rf_chip = RF_6052; + +- if (_FALSE == is92CU) { +- pHalData->rf_type = RF_1T1R; +- DBG_8192C("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n"); +- return; +- } +- +- // TODO: Consider that EEPROM set 92CU to 1T1R later. +- // Force to overwrite setting according to chip version. Ignore EEPROM setting. +- //pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; + MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type); + } + +@@ -940,7 +904,6 @@ static void _InitPABias(PADAPTER padapter) + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 pa_setting; +- BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); + + //FIXED PA current issue + //efuse_one_byte_read(padapter, 0x1FA, &pa_setting); +@@ -957,15 +920,6 @@ static void _InitPABias(PADAPTER padapter) + //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path A\n")); + } + +- if(!(pa_setting & BIT1) && is92C) +- { +- PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0x0F406); +- PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0x4F406); +- PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0x8F406); +- PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0xCF406); +- //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path B\n")); +- } +- + if(!(pa_setting & BIT4)) + { + pa_setting = rtw_read8(padapter, 0x16); +@@ -985,7 +939,7 @@ static BOOLEAN HalDetectPwrDownMode(PADAPTER Adapter) + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); + + +- EFUSE_ShadowRead(Adapter, 1, 0x7B/*EEPROM_RF_OPT3_92C*/, (u32 *)&tmpvalue); ++ EFUSE_ShadowRead(Adapter, 1, EEPROM_FEATURE_OPTION_8723B, (u32 *)&tmpvalue); + + // 2010/08/25 MH INF priority > PDN Efuse value. + if(tmpvalue & BIT4 && pwrctrlpriv->reg_pdnmode) +@@ -1011,7 +965,7 @@ static u32 rtl8723bs_hal_init(PADAPTER padapter) + struct sreset_priv *psrtpriv; + struct dvobj_priv *psdpriv = padapter->dvobj; + struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; +- u8 is92C; ++ + rt_rf_power_state eRfPowerStateToSet; + u32 NavUpper = WiFiNavUpperUs; + u8 u1bTmp; +@@ -1023,7 +977,6 @@ static u32 rtl8723bs_hal_init(PADAPTER padapter) + psrtpriv = &pHalData->srestpriv; + pwrctrlpriv = adapter_to_pwrctl(padapter); + pregistrypriv = &padapter->registrypriv; +- is92C = IS_92C_SERIAL(pHalData->VersionID); + + #ifdef CONFIG_SWLPS_IN_IPS + if (adapter_to_pwrctl(padapter)->bips_processing == _TRUE) +@@ -1128,30 +1081,6 @@ static u32 rtl8723bs_hal_init(PADAPTER padapter) + } + #endif //CONFIG_SWLPS_IN_IPS + +-#ifdef CONFIG_WOWLAN +- if(rtw_read8(padapter, REG_MCUFWDL)&BIT7) { +- u8 reg_val=0; +- DBG_871X("+Reset Entry+\n"); +- rtw_write8(padapter, REG_MCUFWDL, 0x00); +- _8051Reset8723(padapter); +- //reset BB +- reg_val = rtw_read8(padapter, REG_SYS_FUNC_EN); +- reg_val &= ~(BIT(0) | BIT(1)); +- rtw_write8(padapter, REG_SYS_FUNC_EN, reg_val); +- //reset RF +- rtw_write8(padapter, REG_RF_CTRL, 0); +- //reset TRX path +- rtw_write16(padapter, REG_CR, 0); +- //reset MAC, Digital Core +- reg_val = rtw_read8(padapter, REG_SYS_FUNC_EN+1); +- reg_val &= ~(BIT(4) | BIT(7)); +- rtw_write8(padapter, REG_SYS_FUNC_EN+1, reg_val); +- reg_val = rtw_read8(padapter, REG_SYS_FUNC_EN+1); +- reg_val |= BIT(4) | BIT(7); +- rtw_write8(padapter, REG_SYS_FUNC_EN+1, reg_val); +- DBG_871X("-Reset Entry-\n"); +- } +-#endif //CONFIG_WOWLAN + // Disable Interrupt first. + // rtw_hal_disable_interrupt(padapter); + +@@ -1167,7 +1096,7 @@ static u32 rtl8723bs_hal_init(PADAPTER padapter) + pdbgpriv->dbg_ips_drvopen_fail_cnt++; + } + +- ret = _InitPowerOn_8723BS(padapter); ++ ret = rtw_hal_power_on(padapter); + if (_FAIL == ret) { + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init Power On!\n")); + return _FAIL; +@@ -1183,14 +1112,8 @@ static u32 rtl8723bs_hal_init(PADAPTER padapter) + + rtw_write8(padapter, REG_EARLY_MODE_CONTROL, 0); + +-#if (MP_DRIVER == 1) +- if (padapter->registrypriv.mp_mode == 1) ++ /* if (padapter->registrypriv.mp_mode == 0) */ + { +- _InitRxSetting(padapter); +- } +- +-#endif +- + ret = rtl8723b_FirmwareDownload(padapter, _FALSE); + if (ret != _SUCCESS) { + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("%s: Download Firmware failed!!\n", __FUNCTION__)); +@@ -1202,8 +1125,7 @@ static u32 rtl8723bs_hal_init(PADAPTER padapter) + padapter->bFWReady = _TRUE; + pHalData->fw_ractrl = _TRUE; + } +- +- rtl8723b_InitializeFirmwareVars(padapter); ++ } + + // SIC_Init(padapter); + +@@ -1347,15 +1269,18 @@ static u32 rtl8723bs_hal_init(PADAPTER padapter) + rtw_write32(padapter, REG_CR, 0x0b0202ff); + #endif + +- // +- // Configure SDIO TxRx Control to enable Rx DMA timer masking. +- // 2010.02.24. +- // +- rtw_write32(padapter, SDIO_LOCAL_BASE|SDIO_REG_TX_CTRL, 0); ++ /* ++ * Configure SDIO TxRx Control to enable Rx DMA timer masking. ++ * 2010.02.24. ++ * Only clear necessary bits 0x0[2:0] and 0x2[15:0] and keep 0x0[15:3] ++ * 2015.03.19. ++ */ ++ u4Tmp = rtw_read32(padapter, SDIO_LOCAL_BASE|SDIO_REG_TX_CTRL); ++ u4Tmp &= 0x0000FFF8; ++ rtw_write32(padapter, SDIO_LOCAL_BASE|SDIO_REG_TX_CTRL, u4Tmp); + + _RfPowerSave(padapter); + +- + rtl8723b_InitHalDm(padapter); + + //DbgPrint("pHalData->DefaultTxPwrDbm = %d\n", pHalData->DefaultTxPwrDbm); +@@ -1425,7 +1350,7 @@ static u32 rtl8723bs_hal_init(PADAPTER padapter) + restore_iqk_rst = (pwrpriv->bips_processing==_TRUE)?_TRUE:_FALSE; + b2Ant = pHalData->EEPROMBluetoothAntNum==Ant_x2?_TRUE:_FALSE; + PHY_IQCalibrate_8723B(padapter, _FALSE, restore_iqk_rst, b2Ant, pHalData->ant_path); +- pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _TRUE; ++ pHalData->bIQKInitialized = _TRUE; + #ifdef CONFIG_BT_COEXIST + rtw_btcoex_IQKNotify(padapter, _FALSE); + #endif +@@ -1502,6 +1427,8 @@ static void CardDisableRTL8723BSdio(PADAPTER padapter) + if (ret == _FALSE) { + DBG_8192C(KERN_ERR "%s: run CARD DISABLE flow fail!\n", __func__); + } ++ ++ padapter->bFWReady = _FALSE; + } + + static u32 rtl8723bs_hal_deinit(PADAPTER padapter) +@@ -1516,8 +1443,7 @@ static u32 rtl8723bs_hal_deinit(PADAPTER padapter) + MPT_DeInitAdapter(padapter); + #endif + +- if (padapter->hw_init_completed == _TRUE) +- { ++ if (rtw_is_hw_init_completed(padapter)) { + #ifdef CONFIG_SWLPS_IN_IPS + if (adapter_to_pwrctl(padapter)->bips_processing == _TRUE) + { +@@ -1604,7 +1530,7 @@ static u32 rtl8723bs_hal_deinit(PADAPTER padapter) + pdbgpriv->dbg_carddisable_error_cnt++; + } + #endif //DBG_CHECK_FW_PS_STATE +- CardDisableRTL8723BSdio(padapter); ++ rtw_hal_power_off(padapter); + + adapter_to_pwrctl(padapter)->pre_ips_type = 1; + } +@@ -1621,7 +1547,7 @@ static u32 rtl8723bs_hal_deinit(PADAPTER padapter) + pdbgpriv->dbg_carddisable_error_cnt++; + } + #endif //DBG_CHECK_FW_PS_STATE +- CardDisableRTL8723BSdio(padapter); ++ rtw_hal_power_off(padapter); + } + } + else +@@ -1631,29 +1557,6 @@ static u32 rtl8723bs_hal_deinit(PADAPTER padapter) + + return _SUCCESS; + } +- +-static u32 rtl8723bs_inirp_init(PADAPTER padapter) +-{ +- u32 status; +- +-_func_enter_; +- +- status = _SUCCESS; +- +-_func_exit_; +- +- return status; +-} +- +-static u32 rtl8723bs_inirp_deinit(PADAPTER padapter) +-{ +- RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("+rtl8723bs_inirp_deinit\n")); +- +- RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("-rtl8723bs_inirp_deinit\n")); +- +- return _SUCCESS; +-} +- + static void rtl8723bs_init_default_value(PADAPTER padapter) + { + PHAL_DATA_TYPE pHalData; +@@ -1675,6 +1578,23 @@ static void rtl8723bs_interface_configure(PADAPTER padapter) + BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; + + ++ /* F-Cut patch for IC always can response SDIO recognition commands */ ++ if (IS_F_CUT(pHalData->VersionID)) { ++ u32 addr; ++ u8 val8; ++ ++ /* ++ * Always response recognition command ++ * SDIO Local Register 0x00[4] = 1 ++ */ ++ addr = SDIO_LOCAL_BASE | SDIO_REG_TX_CTRL; ++ val8 = rtw_read8(padapter, addr); ++ if (!(val8 & BIT(4))) { ++ val8 |= BIT(4); ++ rtw_write8(padapter, addr, val8); ++ } ++ } ++ + pdvobjpriv->RtOutPipe[0] = WLAN_TX_HIQ_DEVICE_ID; + pdvobjpriv->RtOutPipe[1] = WLAN_TX_MIQ_DEVICE_ID; + pdvobjpriv->RtOutPipe[2] = WLAN_TX_LOQ_DEVICE_ID; +@@ -1741,148 +1661,13 @@ _ReadRFType( + #endif + } + +- +-static void +-Hal_EfuseParseMACAddr_8723BS( +- IN PADAPTER padapter, +- IN u8* hwinfo, +- IN BOOLEAN AutoLoadFail +- ) +-{ +- u16 i, usValue; +- u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0xb7, 0x23, 0x00}; +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- +- if (AutoLoadFail) +- { +-// sMacAddr[5] = (u1Byte)GetRandomNumber(1, 254); +- for (i=0; i<6; i++) +- pEEPROM->mac_addr[i] = sMacAddr[i]; +- } +- else +- { +- //Read Permanent MAC address +-#if 1 +- _rtw_memcpy(pEEPROM->mac_addr, &hwinfo[EEPROM_MAC_ADDR_8723BS], ETH_ALEN); +-#else +- for(i=0; i<6; i+=2) +- { +- usValue = *(u16*)&hwinfo[EEPROM_MAC_ADDR_8723S+i]; +- *((u16*)(&pEEPROM->mac_addr[i])) = usValue; +- } +-#endif +- } +-// NicIFSetMacAddress(pAdapter, pAdapter->PermanentAddress); +- +- RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, +- ("Hal_EfuseParseMACAddr_8723BS: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", +- pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], +- pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], +- pEEPROM->mac_addr[4], pEEPROM->mac_addr[5])); +-} +- +-static void +-Hal_EfuseParseBoardType_8723BS( +- IN PADAPTER pAdapter, +- IN u8* hwinfo, +- IN BOOLEAN AutoLoadFail +- ) +-{ +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +- +- if (!AutoLoadFail) +- { +- pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_8723B] & 0xE0) >> 5; +- if(pHalData->BoardType == 0xFF) +- pHalData->BoardType = (EEPROM_DEFAULT_BOARD_OPTION&0xE0)>>5; +- } +- else +- pHalData->BoardType = 0; +- RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Board Type: 0x%2x\n", pHalData->BoardType)); +-} +- +-#ifdef CONFIG_EFUSE_CONFIG_FILE +-static void +-Hal_ReadMACAddrFromFile_8723BS( +- PADAPTER padapter +- ) +-{ +- u32 i; +- struct file *fp; +- mm_segment_t fs; +- u8 source_addr[18]; +- loff_t pos = 0; +- u32 curtime = rtw_get_current_time(); +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- u8 *head, *end; +- +- u8 null_mac_addr[ETH_ALEN] = {0, 0, 0,0, 0, 0}; +- u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; +- +- _rtw_memset(source_addr, 0, 18); +- _rtw_memset(pEEPROM->mac_addr, 0, ETH_ALEN); +- +- fp = filp_open("/data/wifimac.txt", O_RDWR, 0644); +- if (IS_ERR(fp)) { +- RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Error, wifi mac address file doesn't exist.\n")); +- } else { +- fs = get_fs(); +- set_fs(KERNEL_DS); +- +- DBG_871X("wifi mac address:\n"); +- vfs_read(fp, source_addr, 18, &pos); +- source_addr[17] = ':'; +- +- head = end = source_addr; +- for (i=0; imac_addr[i] = simple_strtoul(head, NULL, 16 ); +- +- if (end) { +- end++; +- head = end; +- } +- DBG_871X("%02x \n", pEEPROM->mac_addr[i]); +- } +- DBG_871X("\n"); +- set_fs(fs); +- +- filp_close(fp, NULL); +- } +- +- if ( (_rtw_memcmp(pEEPROM->mac_addr, null_mac_addr, ETH_ALEN)) || +- (_rtw_memcmp(pEEPROM->mac_addr, multi_mac_addr, ETH_ALEN)) ) { +- pEEPROM->mac_addr[0] = 0x00; +- pEEPROM->mac_addr[1] = 0xe0; +- pEEPROM->mac_addr[2] = 0x4c; +- pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ; +- pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ; +- pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ; +- } +- +- RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, +- ("Hal_ReadMACAddrFromFile_8723BS: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", +- pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], +- pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], +- pEEPROM->mac_addr[4], pEEPROM->mac_addr[5])); +-} +-#endif +- + static VOID + _ReadEfuseInfo8723BS( + IN PADAPTER padapter + ) + { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8* hwinfo = NULL; +-#ifdef CONFIG_EFUSE_CONFIG_FILE +- struct file *fp; +-#endif //CONFIG_EFUSE_CONFIG_FILE + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("====>_ReadEfuseInfo8723BS()\n")); + +@@ -1890,68 +1675,38 @@ _ReadEfuseInfo8723BS( + // This part read and parse the eeprom/efuse content + // + +- if (sizeof(pEEPROM->efuse_eeprom_data) < HWSET_MAX_SIZE_8723B) ++ if (sizeof(pHalData->efuse_eeprom_data) < HWSET_MAX_SIZE_8723B) + DBG_871X("[WARNING] size of efuse_eeprom_data is less than HWSET_MAX_SIZE_8723B!\n"); + +- hwinfo = pEEPROM->efuse_eeprom_data; ++ hwinfo = pHalData->efuse_eeprom_data; + + Hal_InitPGData(padapter, hwinfo); + +-#ifdef CONFIG_EFUSE_CONFIG_FILE +- if (check_phy_efuse_tx_power_info_valid(padapter) == _FALSE) { +- fp = filp_open(EFUSE_MAP_PATH, O_RDONLY, 0); +- if (fp == NULL || IS_ERR(fp)) { +- DBG_871X("[WARNING] invalid phy efuse and no efuse file, use driver default!!\n"); +- } else { +- Hal_readPGDataFromConfigFile(padapter, fp); +- filp_close(fp, NULL); +- } +- } +-#endif //CONFIG_EFUSE_CONFIG_FILE +- + Hal_EfuseParseIDCode(padapter, hwinfo); +- Hal_EfuseParseEEPROMVer_8723B(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +- +-#ifdef CONFIG_EFUSE_CONFIG_FILE +- if (check_phy_efuse_macaddr_info_valid(padapter) == _TRUE) { +- DBG_871X("using phy efuse mac\n"); +- Hal_GetPhyEfuseMACAddr(padapter, pEEPROM->mac_addr); +- } else { +- fp = filp_open(WIFIMAC_PATH, O_RDONLY, 0); +- if (fp == NULL || IS_ERR(fp)) { +- DBG_871X("wifimac does not exist!!\n"); +- Hal_GetPhyEfuseMACAddr(padapter, pEEPROM->mac_addr); +- } else { +- Hal_ReadMACAddrFromFile(padapter, fp); +- filp_close(fp, NULL); +- } +- } +-#else //CONFIG_EFUSE_CONFIG_FILE +- Hal_EfuseParseMACAddr_8723BS(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +-#endif +- +- Hal_EfuseParseTxPowerInfo_8723B(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +- Hal_EfuseParseBoardType_8723BS(padapter, hwinfo, pEEPROM->bautoload_fail_flag); ++ Hal_EfuseParseEEPROMVer_8723B(padapter, hwinfo, pHalData->bautoload_fail_flag); ++ hal_config_macaddr(padapter, pHalData->bautoload_fail_flag); ++ Hal_EfuseParseTxPowerInfo_8723B(padapter, hwinfo, pHalData->bautoload_fail_flag); ++ Hal_EfuseParseBoardType_8723B(padapter, hwinfo, pHalData->bautoload_fail_flag); + + // + // Read Bluetooth co-exist and initialize + // +- Hal_EfuseParseBTCoexistInfo_8723B(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +- Hal_EfuseParseChnlPlan_8723B(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +- Hal_EfuseParseXtal_8723B(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +- Hal_EfuseParsePackageType_8723B(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +- Hal_EfuseParseThermalMeter_8723B(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +- Hal_EfuseParseAntennaDiversity_8723B(padapter, hwinfo, pEEPROM->bautoload_fail_flag); +- Hal_EfuseParseCustomerID_8723B(padapter, hwinfo, pEEPROM->bautoload_fail_flag); ++ Hal_EfuseParseBTCoexistInfo_8723B(padapter, hwinfo, pHalData->bautoload_fail_flag); ++ Hal_EfuseParseChnlPlan_8723B(padapter, hwinfo, pHalData->bautoload_fail_flag); ++ Hal_EfuseParseXtal_8723B(padapter, hwinfo, pHalData->bautoload_fail_flag); ++ Hal_EfuseParsePackageType_8723B(padapter, hwinfo, pHalData->bautoload_fail_flag); ++ Hal_EfuseParseThermalMeter_8723B(padapter, hwinfo, pHalData->bautoload_fail_flag); ++ Hal_EfuseParseAntennaDiversity_8723B(padapter, hwinfo, pHalData->bautoload_fail_flag); ++ Hal_EfuseParseCustomerID_8723B(padapter, hwinfo, pHalData->bautoload_fail_flag); + +- Hal_EfuseParseVoltage_8723B(padapter, hwinfo, pEEPROM->bautoload_fail_flag); ++ Hal_EfuseParseVoltage_8723B(padapter, hwinfo, pHalData->bautoload_fail_flag); + +-#ifdef CONFIG_WOWLAN ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) + Hal_DetectWoWMode(padapter); + #endif + + #ifdef CONFIG_RF_GAIN_OFFSET +- Hal_ReadRFGainOffset(padapter, hwinfo, pEEPROM->bautoload_fail_flag); ++ Hal_ReadRFGainOffset(padapter, hwinfo, pHalData->bautoload_fail_flag); + #endif //CONFIG_RF_GAIN_OFFSET + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<==== _ReadEfuseInfo8723BS()\n")); +@@ -1961,19 +1716,19 @@ static void _ReadPROMContent( + IN PADAPTER padapter + ) + { +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 eeValue; + + eeValue = rtw_read8(padapter, REG_9346CR); + // To check system boot selection. +- pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; +- pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; ++ pHalData->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; ++ pHalData->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, + ("%s: 9346CR=0x%02X, Boot from %s, Autoload %s\n", + __FUNCTION__, eeValue, +- (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"), +- (pEEPROM->bautoload_fail_flag ? "Fail" : "OK"))); ++ (pHalData->EepromOrEfuse ? "EEPROM" : "EFUSE"), ++ (pHalData->bautoload_fail_flag ? "Fail" : "OK"))); + + // pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; + +@@ -2007,25 +1762,17 @@ _InitOtherVariable( + // PASSIVE_LEVEL (SDIO interface) + // + // +-static s32 _ReadAdapterInfo8723BS(PADAPTER padapter) ++static void ReadAdapterInfo8723BS(PADAPTER padapter) + { + u8 val8; +- u32 start; +- +- RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+_ReadAdapterInfo8723BS\n")); +- +- // before access eFuse, make sure card enable has been called +- if(padapter->hw_init_completed == _FALSE) +- _InitPowerOn_8723BS(padapter); +- + + val8 = rtw_read8(padapter, 0x4e); + MSG_8192C("%s, 0x4e=0x%x\n", __func__, val8); + val8 |= BIT(6); + rtw_write8(padapter, 0x4e, val8); + +- +- start = rtw_get_current_time(); ++ /* Read EEPROM size before call any EEPROM function */ ++ padapter->EepromAddressSize = GetEEPROMSize8723B(padapter); + + _EfuseCellSel(padapter); + _ReadRFType(padapter); +@@ -2044,24 +1791,8 @@ static s32 _ReadAdapterInfo8723BS(PADAPTER padapter) + } + #endif //CONFIG_PLATFORM_INTEL_BYT + +- if(padapter->hw_init_completed == _FALSE) +- { +- rtw_write8(padapter, 0x67, 0x00); // for BT, Switch Ant control to BT +- CardDisableRTL8723BSdio(padapter);//for the power consumption issue, wifi ko module is loaded during booting, but wifi GUI is off +- } +- +- +- MSG_8192C("<==== _ReadAdapterInfo8723BS in %d ms\n", rtw_get_passing_time_ms(start)); +- +- return _SUCCESS; +-} +- +-static void ReadAdapterInfo8723BS(PADAPTER padapter) +-{ +- // Read EEPROM size before call any EEPROM function +- padapter->EepromAddressSize = GetEEPROMSize8723B(padapter); +- +- _ReadAdapterInfo8723BS(padapter); ++ if (!rtw_is_hw_init_completed(padapter)) ++ rtw_write8(padapter, 0x67, 0x00); /* for BT, Switch Ant control to BT */ + } + + /* +@@ -2174,14 +1905,10 @@ GetHalDefVar8723BSDIO( + { + case HAL_DEF_IS_SUPPORT_ANT_DIV: + #ifdef CONFIG_ANTENNA_DIVERSITY +- *((u8 *)pValue) = (IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))?_FALSE:_TRUE; +-#endif +- break; +- case HAL_DEF_CURRENT_ANTENNA: +-#ifdef CONFIG_ANTENNA_DIVERSITY +- *(( u8*)pValue) = pHalData->CurAntenna; ++ *((u8 *)pValue) = _FALSE; + #endif + break; ++ + case HW_VAR_MAX_RX_AMPDU_FACTOR: + // Stanley@BB.SD3 suggests 16K can get stable performance + // coding by Lucas@20130730 +@@ -2227,12 +1954,12 @@ _func_enter_; + + rtl8723b_set_hal_ops(pHalFunc); + ++ pHalFunc->hal_power_on = &_InitPowerOn_8723BS; ++ pHalFunc->hal_power_off = &CardDisableRTL8723BSdio; ++ + pHalFunc->hal_init = &rtl8723bs_hal_init; + pHalFunc->hal_deinit = &rtl8723bs_hal_deinit; + +- pHalFunc->inirp_init = &rtl8723bs_inirp_init; +- pHalFunc->inirp_deinit = &rtl8723bs_inirp_deinit; +- + pHalFunc->init_xmit_priv = &rtl8723bs_init_xmit_priv; + pHalFunc->free_xmit_priv = &rtl8723bs_free_xmit_priv; + +@@ -2249,7 +1976,8 @@ _func_enter_; + pHalFunc->enable_interrupt = &EnableInterrupt8723BSdio; + pHalFunc->disable_interrupt = &DisableInterrupt8723BSdio; + pHalFunc->check_ips_status = &CheckIPSStatus; +-#ifdef CONFIG_WOWLAN ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) + pHalFunc->clear_interrupt = &ClearInterrupt8723BSdio; + #endif + pHalFunc->SetHwRegHandler = &SetHwReg8723BS; +@@ -2263,7 +1991,6 @@ _func_enter_; + + #ifdef CONFIG_HOSTAPD_MLME + pHalFunc->hostap_mgnt_xmit_entry = NULL; +-// pHalFunc->hostap_mgnt_xmit_entry = &rtl8192cu_hostap_mgnt_xmit_entry; + #endif + + #if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/sdio_ops.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/sdio_ops.c +old mode 100755 +new mode 100644 +index 22a0987..ec2a6f7 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/sdio_ops.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/sdio/sdio_ops.c +@@ -178,6 +178,7 @@ u16 sdio_read16(struct intf_hdl *pintfhdl, u32 addr) + + _func_enter_; + ftaddr = _cvrt2ftaddr(addr, NULL, NULL); ++ val = 0; + sd_cmd52_read(pintfhdl, ftaddr, 2, (u8*)&val); + val = le16_to_cpu(val); + +@@ -202,6 +203,7 @@ _func_enter_; + padapter = pintfhdl->padapter; + ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); + ++ bMacPwrCtrlOn = _FALSE; + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) + || (_FALSE == bMacPwrCtrlOn) +@@ -210,6 +212,7 @@ _func_enter_; + #endif + ) + { ++ val = 0; + err = sd_cmd52_read(pintfhdl, ftaddr, 4, (u8*)&val); + #ifdef SDIO_DEBUG_IO + if (!err) { +@@ -238,7 +241,9 @@ _func_enter_; + } + + ftaddr &= ~(u16)0x3; +- sd_read(pintfhdl, ftaddr, 8, ptmpbuf); ++ err = sd_read(pintfhdl, ftaddr, 8, ptmpbuf); ++ if (err) ++ return SDIO_ERR_VAL32; + _rtw_memcpy(&val, ptmpbuf+shift, 4); + val = le32_to_cpu(val); + +@@ -267,6 +272,7 @@ _func_enter_; + + ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); + ++ bMacPwrCtrlOn = _FALSE; + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) + || (_FALSE == bMacPwrCtrlOn) +@@ -309,6 +315,7 @@ s32 sdio_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) + + _func_enter_; + ftaddr = _cvrt2ftaddr(addr, NULL, NULL); ++ err = 0; + sd_write8(pintfhdl, ftaddr, val, &err); + + _func_exit_; +@@ -349,6 +356,7 @@ _func_enter_; + + ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); + ++ bMacPwrCtrlOn = _FALSE; + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) + || (_FALSE == bMacPwrCtrlOn) +@@ -419,6 +427,7 @@ _func_enter_; + + ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); + ++ bMacPwrCtrlOn = _FALSE; + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) + || (_FALSE == bMacPwrCtrlOn) +@@ -591,7 +600,7 @@ static u32 sdio_write_port( + padapter = pintfhdl->padapter; + psdio = &adapter_to_dvobj(padapter)->intf_data; + +- if (padapter->hw_init_completed == _FALSE) { ++ if (!rtw_is_hw_init_completed(padapter)) { + DBG_871X("%s [addr=0x%x cnt=%d] padapter->hw_init_completed == _FALSE\n",__func__,addr,cnt); + return _FAIL; + } +@@ -654,6 +663,7 @@ s32 _sdio_local_read( + + HalSdioGetCmdAddr8723BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + ++ bMacPwrCtrlOn = _FALSE; + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (_FALSE == bMacPwrCtrlOn) + { +@@ -695,6 +705,7 @@ s32 sdio_local_read( + + HalSdioGetCmdAddr8723BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + ++ bMacPwrCtrlOn = _FALSE; + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if ((_FALSE == bMacPwrCtrlOn) + #ifdef CONFIG_LPS_LCLK +@@ -745,6 +756,7 @@ s32 _sdio_local_write( + + HalSdioGetCmdAddr8723BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + ++ bMacPwrCtrlOn = _FALSE; + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if ((_FALSE == bMacPwrCtrlOn) + #ifdef CONFIG_LPS_LCLK +@@ -794,6 +806,7 @@ s32 sdio_local_write( + + HalSdioGetCmdAddr8723BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); + ++ bMacPwrCtrlOn = _FALSE; + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if ((_FALSE == bMacPwrCtrlOn) + #ifdef CONFIG_LPS_LCLK +@@ -864,6 +877,7 @@ u32 SdioLocalCmd53Read4Byte(PADAPTER padapter, u32 addr) + struct intf_hdl * pintfhdl=&padapter->iopriv.intf; + + HalSdioGetCmdAddr8723BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); ++ bMacPwrCtrlOn = _FALSE; + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if ((_FALSE == bMacPwrCtrlOn) + #ifdef CONFIG_LPS_LCLK +@@ -1123,8 +1137,11 @@ void InitInterrupt8723BSdio(PADAPTER padapter) + // SDIO_HIMR_C2HCMD_MSK | + #if defined(CONFIG_LPS_LCLK) && !defined(CONFIG_DETECT_CPWM_BY_POLLING) + SDIO_HIMR_CPWM1_MSK | +-// SDIO_HIMR_CPWM2_MSK | + #endif // CONFIG_LPS_LCLK && !CONFIG_DETECT_CPWM_BY_POLLING ++#ifdef CONFIG_WOWLAN ++ SDIO_HIMR_CPWM2_MSK | ++#endif ++ + // SDIO_HIMR_HSISR_IND_MSK | + // SDIO_HIMR_GTINT3_IND_MSK | + // SDIO_HIMR_GTINT4_IND_MSK | +@@ -1158,7 +1175,7 @@ void InitSysInterrupt8723BSdio(PADAPTER padapter) + 0); + } + +-#ifdef CONFIG_WOWLAN ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) + // + // Description: + // Clear corresponding SDIO Host ISR interrupt service. +@@ -1174,7 +1191,7 @@ void ClearInterrupt8723BSdio(PADAPTER padapter) + u8 *clear; + + +- if (_TRUE == padapter->bSurpriseRemoved) ++ if (rtw_is_surprise_removed(padapter)) + return; + + pHalData = GET_HAL_DATA(padapter); +@@ -1205,7 +1222,7 @@ void ClearSysInterrupt8723BSdio(PADAPTER padapter) + u32 clear; + + +- if (_TRUE == padapter->bSurpriseRemoved) ++ if (rtw_is_surprise_removed(padapter)) + return; + + pHalData = GET_HAL_DATA(padapter); +@@ -1234,11 +1251,6 @@ void EnableInterrupt8723BSdio(PADAPTER padapter) + PHAL_DATA_TYPE pHalData; + u32 himr; + +-#ifdef CONFIG_CONCURRENT_MODE +- if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){ +- padapter = padapter->pbuddy_adapter; +- } +-#endif + pHalData = GET_HAL_DATA(padapter); + + himr = cpu_to_le32(pHalData->sdio_himr); +@@ -1275,11 +1287,6 @@ void DisableInterrupt8723BSdio(PADAPTER padapter) + { + u32 himr; + +-#ifdef CONFIG_CONCURRENT_MODE +- if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){ +- padapter = padapter->pbuddy_adapter; +- } +-#endif + himr = cpu_to_le32(SDIO_HIMR_DISABLED); + sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8*)&himr); + +@@ -1310,11 +1317,6 @@ void DisableInterruptButCpwm28723BSdio(PADAPTER padapter) + { + u32 himr, tmp; + +-#ifdef CONFIG_CONCURRENT_MODE +- if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){ +- padapter = padapter->pbuddy_adapter; +- } +-#endif + sdio_local_read(padapter, SDIO_REG_HIMR, 4, (u8*)&tmp); + DBG_871X("DisableInterruptButCpwm28723BSdio(): Read SDIO_REG_HIMR: 0x%08x\n", tmp); + +@@ -1339,11 +1341,6 @@ void UpdateInterruptMask8723BSdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR) + { + HAL_DATA_TYPE *pHalData; + +-#ifdef CONFIG_CONCURRENT_MODE +- if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){ +- padapter = padapter->pbuddy_adapter; +- } +-#endif + pHalData = GET_HAL_DATA(padapter); + + if (AddMSR) +@@ -1706,8 +1703,7 @@ void sd_int_hdl(PADAPTER padapter) + PHAL_DATA_TYPE phal; + + +- if ((padapter->bDriverStopped == _TRUE) || +- (padapter->bSurpriseRemoved == _TRUE)) ++ if (RTW_CANNOT_RUN(padapter)) + return; + + phal = GET_HAL_DATA(padapter); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/ifcfg-wlan0 b/drivers/net/wireless/rockchip_wlan/rtl8723bs/ifcfg-wlan0 +index 20dcbec..7ecb7ae 100755 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/ifcfg-wlan0 ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/ifcfg-wlan0 +@@ -1,4 +1,4 @@ +-#DHCP client +-DEVICE=wlan0 +-BOOTPROTO=dhcp ++#DHCP client ++DEVICE=wlan0 ++BOOTPROTO=dhcp + ONBOOT=yes +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPhyCfg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPhyCfg.h +old mode 100755 +new mode 100644 +index 17b87de..8e76e3a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPhyCfg.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPhyCfg.h +@@ -1,279 +1,278 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __INC_HAL8188EPHYCFG_H__ +-#define __INC_HAL8188EPHYCFG_H__ +- +- +-/*--------------------------Define Parameters-------------------------------*/ +-#define LOOP_LIMIT 5 +-#define MAX_STALL_TIME 50 //us +-#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) +-#define MAX_TXPWR_IDX_NMODE_92S 63 +-#define Reset_Cnt_Limit 3 +- +-#ifdef CONFIG_PCI_HCI +-#define MAX_AGGR_NUM 0x0B +-#else +-#define MAX_AGGR_NUM 0x07 +-#endif // CONFIG_PCI_HCI +- +- +-/*--------------------------Define Parameters-------------------------------*/ +- +- +-/*------------------------------Define structure----------------------------*/ +- +-#define MAX_PG_GROUP 13 +- +-#define MAX_TX_COUNT_8188E 1 +- +-/* BB/RF related */ +- +- +-/*------------------------------Define structure----------------------------*/ +- +- +-/*------------------------Export global variable----------------------------*/ +-/*------------------------Export global variable----------------------------*/ +- +- +-/*------------------------Export Marco Definition---------------------------*/ +-/*------------------------Export Marco Definition---------------------------*/ +- +- +-/*--------------------------Exported Function prototype---------------------*/ +-// +-// BB and RF register read/write +-// +-u32 PHY_QueryBBReg8188E( IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask ); +-void PHY_SetBBReg8188E( IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data ); +-u32 PHY_QueryRFReg8188E( IN PADAPTER Adapter, +- IN u8 eRFPath, +- IN u32 RegAddr, +- IN u32 BitMask ); +-void PHY_SetRFReg8188E( IN PADAPTER Adapter, +- IN u8 eRFPath, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data ); +- +-// +-// Initialization related function +-// +-/* MAC/BB/RF HAL config */ +-int PHY_MACConfig8188E(IN PADAPTER Adapter ); +-int PHY_BBConfig8188E(IN PADAPTER Adapter ); +-int PHY_RFConfig8188E(IN PADAPTER Adapter ); +- +-/* RF config */ +-int rtl8188e_PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN u8 * pFileName, u8 eRFPath); +- +-/* Read initi reg value for tx power setting. */ +-void rtl8192c_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); +- +-// +-// RF Power setting +-// +-//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, +-// IN RT_RF_POWER_STATE eRFPowerState); +- +-// +-// BB TX Power R/W +-// +-void PHY_GetTxPowerLevel8188E( IN PADAPTER Adapter, +- OUT s32* powerlevel ); +-void PHY_SetTxPowerLevel8188E( IN PADAPTER Adapter, +- IN u8 channel ); +-BOOLEAN PHY_UpdateTxPowerDbm8188E( IN PADAPTER Adapter, +- IN int powerInDbm ); +- +-VOID +-PHY_SetTxPowerIndex_8188E( +- IN PADAPTER Adapter, +- IN u32 PowerIndex, +- IN u8 RFPath, +- IN u8 Rate +- ); +- +-u8 +-PHY_GetTxPowerIndex_8188E( +- IN PADAPTER pAdapter, +- IN u8 RFPath, +- IN u8 Rate, +- IN CHANNEL_WIDTH BandWidth, +- IN u8 Channel +- ); +- +-// +-// Switch bandwidth for 8192S +-// +-//extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); +-void PHY_SetBWMode8188E( IN PADAPTER pAdapter, +- IN CHANNEL_WIDTH ChnlWidth, +- IN unsigned char Offset ); +- +-// +-// Set FW CMD IO for 8192S. +-// +-//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, +-// IN IO_TYPE IOType); +- +-// +-// Set A2 entry to fw for 8192S +-// +-extern void FillA2Entry8192C( IN PADAPTER Adapter, +- IN u8 index, +- IN u8* val); +- +- +-// +-// channel switch related funciton +-// +-//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); +-void PHY_SwChnl8188E( IN PADAPTER pAdapter, +- IN u8 channel ); +- +-VOID +-PHY_SetSwChnlBWMode8188E( +- IN PADAPTER Adapter, +- IN u8 channel, +- IN CHANNEL_WIDTH Bandwidth, +- IN u8 Offset40, +- IN u8 Offset80 +-); +- +-// +-// BB/MAC/RF other monitor API +-// +-void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, +- IN BOOLEAN bEnableMonitorMode ); +- +-BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter, +- IN u32 eRFPath ); +- +-VOID PHY_SetRFPathSwitch_8188E(IN PADAPTER pAdapter, IN BOOLEAN bMain); +- +-extern VOID +-PHY_SwitchEphyParameter( +- IN PADAPTER Adapter +- ); +- +-extern VOID +-PHY_EnableHostClkReq( +- IN PADAPTER Adapter +- ); +- +-BOOLEAN +-SetAntennaConfig92C( +- IN PADAPTER Adapter, +- IN u8 DefaultAnt +- ); +- +-VOID +-storePwrIndexDiffRateOffset( +- IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data +- ); +-/*--------------------------Exported Function prototype---------------------*/ +- +-// +-// Initialization related function +-// +-/* MAC/BB/RF HAL config */ +-//extern s32 PHY_MACConfig8723(PADAPTER padapter); +-//s32 PHY_BBConfig8723(PADAPTER padapter); +-//s32 PHY_RFConfig8723(PADAPTER padapter); +- +- +- +-//================================================================== +-// Note: If SIC_ENABLE under PCIE, because of the slow operation +-// you should +-// 2) "#define RTL8723_FPGA_VERIFICATION 1" in Precomp.h.WlanE.Windows +-// 3) "#define RTL8190_Download_Firmware_From_Header 0" in Precomp.h.WlanE.Windows if needed. +-// +-#if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1) +-#define SIC_ENABLE 1 +-#define SIC_HW_SUPPORT 1 +-#else +-#define SIC_ENABLE 0 +-#define SIC_HW_SUPPORT 0 +-#endif +-//================================================================== +- +- +-#define SIC_MAX_POLL_CNT 5 +- +-#if(SIC_HW_SUPPORT == 1) +-#define SIC_CMD_READY 0 +-#define SIC_CMD_PREWRITE 0x1 +-#if(RTL8188E_SUPPORT == 1) +-#define SIC_CMD_WRITE 0x40 +-#define SIC_CMD_PREREAD 0x2 +-#define SIC_CMD_READ 0x80 +-#define SIC_CMD_INIT 0xf0 +-#define SIC_INIT_VAL 0xff +- +-#define SIC_INIT_REG 0x1b7 +-#define SIC_CMD_REG 0x1EB // 1byte +-#define SIC_ADDR_REG 0x1E8 // 1b4~1b5, 2 bytes +-#define SIC_DATA_REG 0x1EC // 1b0~1b3 +-#else +-#define SIC_CMD_WRITE 0x11 +-#define SIC_CMD_PREREAD 0x2 +-#define SIC_CMD_READ 0x12 +-#define SIC_CMD_INIT 0x1f +-#define SIC_INIT_VAL 0xff +- +-#define SIC_INIT_REG 0x1b7 +-#define SIC_CMD_REG 0x1b6 // 1byte +-#define SIC_ADDR_REG 0x1b4 // 1b4~1b5, 2 bytes +-#define SIC_DATA_REG 0x1b0 // 1b0~1b3 +-#endif +-#else +-#define SIC_CMD_READY 0 +-#define SIC_CMD_WRITE 1 +-#define SIC_CMD_READ 2 +- +-#if(RTL8188E_SUPPORT == 1) +-#define SIC_CMD_REG 0x1EB // 1byte +-#define SIC_ADDR_REG 0x1E8 // 1b9~1ba, 2 bytes +-#define SIC_DATA_REG 0x1EC // 1bc~1bf +-#else +-#define SIC_CMD_REG 0x1b8 // 1byte +-#define SIC_ADDR_REG 0x1b9 // 1b9~1ba, 2 bytes +-#define SIC_DATA_REG 0x1bc // 1bc~1bf +-#endif +-#endif +- +-#if(SIC_ENABLE == 1) +-VOID SIC_Init(IN PADAPTER Adapter); +-#endif +- +- +-#endif // __INC_HAL8192CPHYCFG_H +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8188EPHYCFG_H__ ++#define __INC_HAL8188EPHYCFG_H__ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++#define MAX_TX_COUNT_8188E 1 ++ ++/* BB/RF related */ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++// ++// BB and RF register read/write ++// ++u32 PHY_QueryBBReg8188E( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetBBReg8188E( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 PHY_QueryRFReg8188E( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetRFReg8188E( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++int PHY_MACConfig8188E(IN PADAPTER Adapter ); ++int PHY_BBConfig8188E(IN PADAPTER Adapter ); ++int PHY_RFConfig8188E(IN PADAPTER Adapter ); ++ ++/* RF config */ ++int rtl8188e_PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN u8 * pFileName, u8 eRFPath); ++ ++// ++// RF Power setting ++// ++//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, ++// IN RT_RF_POWER_STATE eRFPowerState); ++ ++// ++// BB TX Power R/W ++// ++void PHY_GetTxPowerLevel8188E( IN PADAPTER Adapter, ++ OUT s32* powerlevel ); ++void PHY_SetTxPowerLevel8188E( IN PADAPTER Adapter, ++ IN u8 channel ); ++BOOLEAN PHY_UpdateTxPowerDbm8188E( IN PADAPTER Adapter, ++ IN int powerInDbm ); ++ ++VOID ++PHY_SetTxPowerIndex_8188E( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ); ++ ++u8 ++PHY_GetTxPowerIndex_8188E( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++// ++// Switch bandwidth for 8192S ++// ++//extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SetBWMode8188E( IN PADAPTER pAdapter, ++ IN CHANNEL_WIDTH ChnlWidth, ++ IN unsigned char Offset ); ++ ++// ++// Set FW CMD IO for 8192S. ++// ++//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, ++// IN IO_TYPE IOType); ++ ++// ++// Set A2 entry to fw for 8192S ++// ++extern void FillA2Entry8192C( IN PADAPTER Adapter, ++ IN u8 index, ++ IN u8* val); ++ ++ ++// ++// channel switch related funciton ++// ++//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SwChnl8188E( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ ++VOID ++PHY_SetSwChnlBWMode8188E( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++ ++VOID ++PHY_SetRFEReg_8188E( ++ IN PADAPTER Adapter ++); ++// ++// BB/MAC/RF other monitor API ++// ++void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, ++ IN BOOLEAN bEnableMonitorMode ); ++ ++BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter, ++ IN u32 eRFPath ); ++ ++VOID PHY_SetRFPathSwitch_8188E(IN PADAPTER pAdapter, IN BOOLEAN bMain); ++ ++extern VOID ++PHY_SwitchEphyParameter( ++ IN PADAPTER Adapter ++ ); ++ ++extern VOID ++PHY_EnableHostClkReq( ++ IN PADAPTER Adapter ++ ); ++ ++BOOLEAN ++SetAntennaConfig92C( ++ IN PADAPTER Adapter, ++ IN u8 DefaultAnt ++ ); ++ ++VOID ++storePwrIndexDiffRateOffset( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++/*--------------------------Exported Function prototype---------------------*/ ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++//extern s32 PHY_MACConfig8723(PADAPTER padapter); ++//s32 PHY_BBConfig8723(PADAPTER padapter); ++//s32 PHY_RFConfig8723(PADAPTER padapter); ++ ++ ++ ++//================================================================== ++// Note: If SIC_ENABLE under PCIE, because of the slow operation ++// you should ++// 2) "#define RTL8723_FPGA_VERIFICATION 1" in Precomp.h.WlanE.Windows ++// 3) "#define RTL8190_Download_Firmware_From_Header 0" in Precomp.h.WlanE.Windows if needed. ++// ++#if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1) ++#define SIC_ENABLE 1 ++#define SIC_HW_SUPPORT 1 ++#else ++#define SIC_ENABLE 0 ++#define SIC_HW_SUPPORT 0 ++#endif ++//================================================================== ++ ++ ++#define SIC_MAX_POLL_CNT 5 ++ ++#if(SIC_HW_SUPPORT == 1) ++#define SIC_CMD_READY 0 ++#define SIC_CMD_PREWRITE 0x1 ++#if(RTL8188E_SUPPORT == 1) ++#define SIC_CMD_WRITE 0x40 ++#define SIC_CMD_PREREAD 0x2 ++#define SIC_CMD_READ 0x80 ++#define SIC_CMD_INIT 0xf0 ++#define SIC_INIT_VAL 0xff ++ ++#define SIC_INIT_REG 0x1b7 ++#define SIC_CMD_REG 0x1EB // 1byte ++#define SIC_ADDR_REG 0x1E8 // 1b4~1b5, 2 bytes ++#define SIC_DATA_REG 0x1EC // 1b0~1b3 ++#else ++#define SIC_CMD_WRITE 0x11 ++#define SIC_CMD_PREREAD 0x2 ++#define SIC_CMD_READ 0x12 ++#define SIC_CMD_INIT 0x1f ++#define SIC_INIT_VAL 0xff ++ ++#define SIC_INIT_REG 0x1b7 ++#define SIC_CMD_REG 0x1b6 // 1byte ++#define SIC_ADDR_REG 0x1b4 // 1b4~1b5, 2 bytes ++#define SIC_DATA_REG 0x1b0 // 1b0~1b3 ++#endif ++#else ++#define SIC_CMD_READY 0 ++#define SIC_CMD_WRITE 1 ++#define SIC_CMD_READ 2 ++ ++#if(RTL8188E_SUPPORT == 1) ++#define SIC_CMD_REG 0x1EB // 1byte ++#define SIC_ADDR_REG 0x1E8 // 1b9~1ba, 2 bytes ++#define SIC_DATA_REG 0x1EC // 1bc~1bf ++#else ++#define SIC_CMD_REG 0x1b8 // 1byte ++#define SIC_ADDR_REG 0x1b9 // 1b9~1ba, 2 bytes ++#define SIC_DATA_REG 0x1bc // 1bc~1bf ++#endif ++#endif ++ ++#if(SIC_ENABLE == 1) ++VOID SIC_Init(IN PADAPTER Adapter); ++#endif ++ ++ ++#endif // __INC_HAL8192CPHYCFG_H ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPhyReg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPhyReg.h +old mode 100755 +new mode 100644 +index 2ef34ed..b73300a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPhyReg.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPhyReg.h +@@ -1,1111 +1,1106 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __INC_HAL8188EPHYREG_H__ +-#define __INC_HAL8188EPHYREG_H__ +-/*--------------------------Define Parameters-------------------------------*/ +-// +-// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF +-// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF +-// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 +-// 3. RF register 0x00-2E +-// 4. Bit Mask for BB/RF register +-// 5. Other defintion for BB/RF R/W +-// +- +- +-// +-// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF +-// 1. Page1(0x100) +-// +-#define rPMAC_Reset 0x100 +-#define rPMAC_TxStart 0x104 +-#define rPMAC_TxLegacySIG 0x108 +-#define rPMAC_TxHTSIG1 0x10c +-#define rPMAC_TxHTSIG2 0x110 +-#define rPMAC_PHYDebug 0x114 +-#define rPMAC_TxPacketNum 0x118 +-#define rPMAC_TxIdle 0x11c +-#define rPMAC_TxMACHeader0 0x120 +-#define rPMAC_TxMACHeader1 0x124 +-#define rPMAC_TxMACHeader2 0x128 +-#define rPMAC_TxMACHeader3 0x12c +-#define rPMAC_TxMACHeader4 0x130 +-#define rPMAC_TxMACHeader5 0x134 +-#define rPMAC_TxDataType 0x138 +-#define rPMAC_TxRandomSeed 0x13c +-#define rPMAC_CCKPLCPPreamble 0x140 +-#define rPMAC_CCKPLCPHeader 0x144 +-#define rPMAC_CCKCRC16 0x148 +-#define rPMAC_OFDMRxCRC32OK 0x170 +-#define rPMAC_OFDMRxCRC32Er 0x174 +-#define rPMAC_OFDMRxParityEr 0x178 +-#define rPMAC_OFDMRxCRC8Er 0x17c +-#define rPMAC_CCKCRxRC16Er 0x180 +-#define rPMAC_CCKCRxRC32Er 0x184 +-#define rPMAC_CCKCRxRC32OK 0x188 +-#define rPMAC_TxStatus 0x18c +- +-// +-// 2. Page2(0x200) +-// +-// The following two definition are only used for USB interface. +-#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. +-#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. +- +-// +-// 3. Page8(0x800) +-// +-#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? +- +-#define rFPGA0_TxInfo 0x804 // Status report?? +-#define rFPGA0_PSDFunction 0x808 +- +-#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? +- +-#define rFPGA0_RFTiming1 0x810 // Useless now +-#define rFPGA0_RFTiming2 0x814 +- +-#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register +-#define rFPGA0_XA_HSSIParameter2 0x824 +-#define rFPGA0_XB_HSSIParameter1 0x828 +-#define rFPGA0_XB_HSSIParameter2 0x82c +- +-#define rFPGA0_XA_LSSIParameter 0x840 +-#define rFPGA0_XB_LSSIParameter 0x844 +- +-#define rFPGA0_RFWakeUpParameter 0x850 // Useless now +-#define rFPGA0_RFSleepUpParameter 0x854 +- +-#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch +-#define rFPGA0_XCD_SwitchControl 0x85c +- +-#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch +-#define rFPGA0_XB_RFInterfaceOE 0x864 +-#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control +-#define rFPGA0_XCD_RFInterfaceSW 0x874 +- +-#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter +-#define rFPGA0_XCD_RFParameter 0x87c +- +-#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? +-#define rFPGA0_AnalogParameter2 0x884 +-#define rFPGA0_AnalogParameter3 0x888 +-#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy +-#define rFPGA0_AnalogParameter4 0x88c +- +-#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback +-#define rFPGA0_XB_LSSIReadBack 0x8a4 +-#define rFPGA0_XC_LSSIReadBack 0x8a8 +-#define rFPGA0_XD_LSSIReadBack 0x8ac +- +-#define rFPGA0_PSDReport 0x8b4 // Useless now +-#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback +-#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback +-#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value +-#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now +- +-// +-// 4. Page9(0x900) +-// +-#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? +- +-#define rFPGA1_TxBlock 0x904 // Useless now +-#define rFPGA1_DebugSelect 0x908 // Useless now +-#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? +- +-// +-// 5. PageA(0xA00) +-// +-// Set Control channel to upper or lower. These settings are required only for 40MHz +-#define rCCK0_System 0xa00 +- +-#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI +-#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain +- +-#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series +-#define rCCK0_RxAGC2 0xa10 //AGC & DAGC +- +-#define rCCK0_RxHP 0xa14 +- +-#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold +-#define rCCK0_DSPParameter2 0xa1c //SQ threshold +- +-#define rCCK0_TxFilter1 0xa20 +-#define rCCK0_TxFilter2 0xa24 +-#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 +-#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report +-#define rCCK0_TRSSIReport 0xa50 +-#define rCCK0_RxReport 0xa54 //0xa57 +-#define rCCK0_FACounterLower 0xa5c //0xa5b +-#define rCCK0_FACounterUpper 0xa58 //0xa5c +- +-// +-// PageB(0xB00) +-// +-#define rPdp_AntA 0xb00 +-#define rPdp_AntA_4 0xb04 +-#define rConfig_Pmpd_AntA 0xb28 +-#define rConfig_ram64x16 0xb2c +-#define rConfig_AntA 0xb68 +-#define rConfig_AntB 0xb6c +-#define rPdp_AntB 0xb70 +-#define rPdp_AntB_4 0xb74 +-#define rConfig_Pmpd_AntB 0xb98 +-#define rAPK 0xbd8 +- +- +- +-// +-// 6. PageC(0xC00) +-// +-#define rOFDM0_LSTF 0xc00 +- +-#define rOFDM0_TRxPathEnable 0xc04 +-#define rOFDM0_TRMuxPar 0xc08 +-#define rOFDM0_TRSWIsolation 0xc0c +- +-#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter +-#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix +-#define rOFDM0_XBRxAFE 0xc18 +-#define rOFDM0_XBRxIQImbalance 0xc1c +-#define rOFDM0_XCRxAFE 0xc20 +-#define rOFDM0_XCRxIQImbalance 0xc24 +-#define rOFDM0_XDRxAFE 0xc28 +-#define rOFDM0_XDRxIQImbalance 0xc2c +- +-#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain +-#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. +-#define rOFDM0_RxDetector3 0xc38 //Frame Sync. +-#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI +- +-#define rOFDM0_RxDSP 0xc40 //Rx Sync Path +-#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC +-#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold +-#define rOFDM0_ECCAThreshold 0xc4c // energy CCA +- +-#define rOFDM0_XAAGCCore1 0xc50 // DIG +-#define rOFDM0_XAAGCCore2 0xc54 +-#define rOFDM0_XBAGCCore1 0xc58 +-#define rOFDM0_XBAGCCore2 0xc5c +-#define rOFDM0_XCAGCCore1 0xc60 +-#define rOFDM0_XCAGCCore2 0xc64 +-#define rOFDM0_XDAGCCore1 0xc68 +-#define rOFDM0_XDAGCCore2 0xc6c +- +-#define rOFDM0_AGCParameter1 0xc70 +-#define rOFDM0_AGCParameter2 0xc74 +-#define rOFDM0_AGCRSSITable 0xc78 +-#define rOFDM0_HTSTFAGC 0xc7c +- +-#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG +-#define rOFDM0_XATxAFE 0xc84 +-#define rOFDM0_XBTxIQImbalance 0xc88 +-#define rOFDM0_XBTxAFE 0xc8c +-#define rOFDM0_XCTxIQImbalance 0xc90 +-#define rOFDM0_XCTxAFE 0xc94 +-#define rOFDM0_XDTxIQImbalance 0xc98 +-#define rOFDM0_XDTxAFE 0xc9c +- +-#define rOFDM0_RxIQExtAnta 0xca0 +-#define rOFDM0_TxCoeff1 0xca4 +-#define rOFDM0_TxCoeff2 0xca8 +-#define rOFDM0_TxCoeff3 0xcac +-#define rOFDM0_TxCoeff4 0xcb0 +-#define rOFDM0_TxCoeff5 0xcb4 +-#define rOFDM0_TxCoeff6 0xcb8 +-#define rOFDM0_RxHPParameter 0xce0 +-#define rOFDM0_TxPseudoNoiseWgt 0xce4 +-#define rOFDM0_FrameSync 0xcf0 +-#define rOFDM0_DFSReport 0xcf4 +- +- +-// +-// 7. PageD(0xD00) +-// +-#define rOFDM1_LSTF 0xd00 +-#define rOFDM1_TRxPathEnable 0xd04 +- +-#define rOFDM1_CFO 0xd08 // No setting now +-#define rOFDM1_CSI1 0xd10 +-#define rOFDM1_SBD 0xd14 +-#define rOFDM1_CSI2 0xd18 +-#define rOFDM1_CFOTracking 0xd2c +-#define rOFDM1_TRxMesaure1 0xd34 +-#define rOFDM1_IntfDet 0xd3c +-#define rOFDM1_csi_fix_mask1 0xd40 +-#define rOFDM1_csi_fix_mask2 0xd44 +-#define rOFDM1_PseudoNoiseStateAB 0xd50 +-#define rOFDM1_PseudoNoiseStateCD 0xd54 +-#define rOFDM1_RxPseudoNoiseWgt 0xd58 +- +-#define rOFDM_PHYCounter1 0xda0 //cca, parity fail +-#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail +-#define rOFDM_PHYCounter3 0xda8 //MCS not support +- +-#define rOFDM_ShortCFOAB 0xdac // No setting now +-#define rOFDM_ShortCFOCD 0xdb0 +-#define rOFDM_LongCFOAB 0xdb4 +-#define rOFDM_LongCFOCD 0xdb8 +-#define rOFDM_TailCFOAB 0xdbc +-#define rOFDM_TailCFOCD 0xdc0 +-#define rOFDM_PWMeasure1 0xdc4 +-#define rOFDM_PWMeasure2 0xdc8 +-#define rOFDM_BWReport 0xdcc +-#define rOFDM_AGCReport 0xdd0 +-#define rOFDM_RxSNR 0xdd4 +-#define rOFDM_RxEVMCSI 0xdd8 +-#define rOFDM_SIGReport 0xddc +- +- +-// +-// 8. PageE(0xE00) +-// +-#define rTxAGC_A_Rate18_06 0xe00 +-#define rTxAGC_A_Rate54_24 0xe04 +-#define rTxAGC_A_CCK1_Mcs32 0xe08 +-#define rTxAGC_A_Mcs03_Mcs00 0xe10 +-#define rTxAGC_A_Mcs07_Mcs04 0xe14 +-#define rTxAGC_A_Mcs11_Mcs08 0xe18 +-#define rTxAGC_A_Mcs15_Mcs12 0xe1c +- +-#define rTxAGC_B_Rate18_06 0x830 +-#define rTxAGC_B_Rate54_24 0x834 +-#define rTxAGC_B_CCK1_55_Mcs32 0x838 +-#define rTxAGC_B_Mcs03_Mcs00 0x83c +-#define rTxAGC_B_Mcs07_Mcs04 0x848 +-#define rTxAGC_B_Mcs11_Mcs08 0x84c +-#define rTxAGC_B_Mcs15_Mcs12 0x868 +-#define rTxAGC_B_CCK11_A_CCK2_11 0x86c +- +-#define rFPGA0_IQK 0xe28 +-#define rTx_IQK_Tone_A 0xe30 +-#define rRx_IQK_Tone_A 0xe34 +-#define rTx_IQK_PI_A 0xe38 +-#define rRx_IQK_PI_A 0xe3c +- +-#define rTx_IQK 0xe40 +-#define rRx_IQK 0xe44 +-#define rIQK_AGC_Pts 0xe48 +-#define rIQK_AGC_Rsp 0xe4c +-#define rTx_IQK_Tone_B 0xe50 +-#define rRx_IQK_Tone_B 0xe54 +-#define rTx_IQK_PI_B 0xe58 +-#define rRx_IQK_PI_B 0xe5c +-#define rIQK_AGC_Cont 0xe60 +- +-#define rBlue_Tooth 0xe6c +-#define rRx_Wait_CCA 0xe70 +-#define rTx_CCK_RFON 0xe74 +-#define rTx_CCK_BBON 0xe78 +-#define rTx_OFDM_RFON 0xe7c +-#define rTx_OFDM_BBON 0xe80 +-#define rTx_To_Rx 0xe84 +-#define rTx_To_Tx 0xe88 +-#define rRx_CCK 0xe8c +- +-#define rTx_Power_Before_IQK_A 0xe94 +-#define rTx_Power_After_IQK_A 0xe9c +- +-#define rRx_Power_Before_IQK_A 0xea0 +-#define rRx_Power_Before_IQK_A_2 0xea4 +-#define rRx_Power_After_IQK_A 0xea8 +-#define rRx_Power_After_IQK_A_2 0xeac +- +-#define rTx_Power_Before_IQK_B 0xeb4 +-#define rTx_Power_After_IQK_B 0xebc +- +-#define rRx_Power_Before_IQK_B 0xec0 +-#define rRx_Power_Before_IQK_B_2 0xec4 +-#define rRx_Power_After_IQK_B 0xec8 +-#define rRx_Power_After_IQK_B_2 0xecc +- +-#define rRx_OFDM 0xed0 +-#define rRx_Wait_RIFS 0xed4 +-#define rRx_TO_Rx 0xed8 +-#define rStandby 0xedc +-#define rSleep 0xee0 +-#define rPMPD_ANAEN 0xeec +- +-// +-// 7. RF Register 0x00-0x2E (RF 8256) +-// RF-0222D 0x00-3F +-// +-//Zebra1 +-#define rZebra1_HSSIEnable 0x0 // Useless now +-#define rZebra1_TRxEnable1 0x1 +-#define rZebra1_TRxEnable2 0x2 +-#define rZebra1_AGC 0x4 +-#define rZebra1_ChargePump 0x5 +-#define rZebra1_Channel 0x7 // RF channel switch +- +-//#endif +-#define rZebra1_TxGain 0x8 // Useless now +-#define rZebra1_TxLPF 0x9 +-#define rZebra1_RxLPF 0xb +-#define rZebra1_RxHPFCorner 0xc +- +-//Zebra4 +-#define rGlobalCtrl 0 // Useless now +-#define rRTL8256_TxLPF 19 +-#define rRTL8256_RxLPF 11 +- +-//RTL8258 +-#define rRTL8258_TxLPF 0x11 // Useless now +-#define rRTL8258_RxLPF 0x13 +-#define rRTL8258_RSSILPF 0xa +- +-// +-// RL6052 Register definition +-// +-#define RF_AC 0x00 // +- +-#define RF_IQADJ_G1 0x01 // +-#define RF_IQADJ_G2 0x02 // +- +-#define RF_POW_TRSW 0x05 // +- +-#define RF_GAIN_RX 0x06 // +-#define RF_GAIN_TX 0x07 // +- +-#define RF_TXM_IDAC 0x08 // +-#define RF_IPA_G 0x09 // +-#define RF_TXBIAS_G 0x0A +-#define RF_TXPA_AG 0x0B +-#define RF_IPA_A 0x0C // +-#define RF_TXBIAS_A 0x0D +-#define RF_BS_PA_APSET_G9_G11 0x0E +-#define RF_BS_IQGEN 0x0F // +- +-#define RF_MODE1 0x10 // +-#define RF_MODE2 0x11 // +- +-#define RF_RX_AGC_HP 0x12 // +-#define RF_TX_AGC 0x13 // +-#define RF_BIAS 0x14 // +-#define RF_IPA 0x15 // +-#define RF_TXBIAS 0x16 +-#define RF_POW_ABILITY 0x17 // +-#define RF_CHNLBW 0x18 // RF channel and BW switch +-#define RF_TOP 0x19 // +- +-#define RF_RX_G1 0x1A // +-#define RF_RX_G2 0x1B // +- +-#define RF_RX_BB2 0x1C // +-#define RF_RX_BB1 0x1D // +- +-#define RF_RCK1 0x1E // +-#define RF_RCK2 0x1F // +- +-#define RF_TX_G1 0x20 // +-#define RF_TX_G2 0x21 // +-#define RF_TX_G3 0x22 // +- +-#define RF_TX_BB1 0x23 // +- +-//#if HARDWARE_TYPE_IS_RTL8192D == 1 +-#define RF_T_METER_92D 0x42 // +-//#else +-#define RF_T_METER_88E 0x42 // +-#define RF_T_METER 0x24 // +- +-//#endif +- +-#define RF_SYN_G1 0x25 // RF TX Power control +-#define RF_SYN_G2 0x26 // RF TX Power control +-#define RF_SYN_G3 0x27 // RF TX Power control +-#define RF_SYN_G4 0x28 // RF TX Power control +-#define RF_SYN_G5 0x29 // RF TX Power control +-#define RF_SYN_G6 0x2A // RF TX Power control +-#define RF_SYN_G7 0x2B // RF TX Power control +-#define RF_SYN_G8 0x2C // RF TX Power control +- +-#define RF_RCK_OS 0x30 // RF TX PA control +-#define RF_TXPA_G1 0x31 // RF TX PA control +-#define RF_TXPA_G2 0x32 // RF TX PA control +-#define RF_TXPA_G3 0x33 // RF TX PA control +-#define RF_TX_BIAS_A 0x35 +-#define RF_TX_BIAS_D 0x36 +-#define RF_LOBF_9 0x38 +-#define RF_RXRF_A3 0x3C // +-#define RF_TRSW 0x3F +- +-#define RF_TXRF_A2 0x41 +-#define RF_TXPA_G4 0x46 +-#define RF_TXPA_A4 0x4B +-#define RF_0x52 0x52 +-#define RF_WE_LUT 0xEF +- +- +-// +-//Bit Mask +-// +-// 1. Page1(0x100) +-#define bBBResetB 0x100 // Useless now? +-#define bGlobalResetB 0x200 +-#define bOFDMTxStart 0x4 +-#define bCCKTxStart 0x8 +-#define bCRC32Debug 0x100 +-#define bPMACLoopback 0x10 +-#define bTxLSIG 0xffffff +-#define bOFDMTxRate 0xf +-#define bOFDMTxReserved 0x10 +-#define bOFDMTxLength 0x1ffe0 +-#define bOFDMTxParity 0x20000 +-#define bTxHTSIG1 0xffffff +-#define bTxHTMCSRate 0x7f +-#define bTxHTBW 0x80 +-#define bTxHTLength 0xffff00 +-#define bTxHTSIG2 0xffffff +-#define bTxHTSmoothing 0x1 +-#define bTxHTSounding 0x2 +-#define bTxHTReserved 0x4 +-#define bTxHTAggreation 0x8 +-#define bTxHTSTBC 0x30 +-#define bTxHTAdvanceCoding 0x40 +-#define bTxHTShortGI 0x80 +-#define bTxHTNumberHT_LTF 0x300 +-#define bTxHTCRC8 0x3fc00 +-#define bCounterReset 0x10000 +-#define bNumOfOFDMTx 0xffff +-#define bNumOfCCKTx 0xffff0000 +-#define bTxIdleInterval 0xffff +-#define bOFDMService 0xffff0000 +-#define bTxMACHeader 0xffffffff +-#define bTxDataInit 0xff +-#define bTxHTMode 0x100 +-#define bTxDataType 0x30000 +-#define bTxRandomSeed 0xffffffff +-#define bCCKTxPreamble 0x1 +-#define bCCKTxSFD 0xffff0000 +-#define bCCKTxSIG 0xff +-#define bCCKTxService 0xff00 +-#define bCCKLengthExt 0x8000 +-#define bCCKTxLength 0xffff0000 +-#define bCCKTxCRC16 0xffff +-#define bCCKTxStatus 0x1 +-#define bOFDMTxStatus 0x2 +- +-#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) +- +-// 2. Page8(0x800) +-#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD +-#define bJapanMode 0x2 +-#define bCCKTxSC 0x30 +-#define bCCKEn 0x1000000 +-#define bOFDMEn 0x2000000 +- +-#define bOFDMRxADCPhase 0x10000 // Useless now +-#define bOFDMTxDACPhase 0x40000 +-#define bXATxAGC 0x3f +- +-#define bAntennaSelect 0x0300 +- +-#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage +-#define bXCTxAGC 0xf000 +-#define bXDTxAGC 0xf0000 +- +-#define bPAStart 0xf0000000 // Useless now +-#define bTRStart 0x00f00000 +-#define bRFStart 0x0000f000 +-#define bBBStart 0x000000f0 +-#define bBBCCKStart 0x0000000f +-#define bPAEnd 0xf //Reg0x814 +-#define bTREnd 0x0f000000 +-#define bRFEnd 0x000f0000 +-#define bCCAMask 0x000000f0 //T2R +-#define bR2RCCAMask 0x00000f00 +-#define bHSSI_R2TDelay 0xf8000000 +-#define bHSSI_T2RDelay 0xf80000 +-#define bContTxHSSI 0x400 //chane gain at continue Tx +-#define bIGFromCCK 0x200 +-#define bAGCAddress 0x3f +-#define bRxHPTx 0x7000 +-#define bRxHPT2R 0x38000 +-#define bRxHPCCKIni 0xc0000 +-#define bAGCTxCode 0xc00000 +-#define bAGCRxCode 0x300000 +- +-#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 +-#define b3WireAddressLength 0x400 +- +-#define b3WireRFPowerDown 0x1 // Useless now +-//#define bHWSISelect 0x8 +-#define b5GPAPEPolarity 0x40000000 +-#define b2GPAPEPolarity 0x80000000 +-#define bRFSW_TxDefaultAnt 0x3 +-#define bRFSW_TxOptionAnt 0x30 +-#define bRFSW_RxDefaultAnt 0x300 +-#define bRFSW_RxOptionAnt 0x3000 +-#define bRFSI_3WireData 0x1 +-#define bRFSI_3WireClock 0x2 +-#define bRFSI_3WireLoad 0x4 +-#define bRFSI_3WireRW 0x8 +-#define bRFSI_3Wire 0xf +- +-#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW +- +-#define bRFSI_TRSW 0x20 // Useless now +-#define bRFSI_TRSWB 0x40 +-#define bRFSI_ANTSW 0x100 +-#define bRFSI_ANTSWB 0x200 +-#define bRFSI_PAPE 0x400 +-#define bRFSI_PAPE5G 0x800 +-#define bBandSelect 0x1 +-#define bHTSIG2_GI 0x80 +-#define bHTSIG2_Smoothing 0x01 +-#define bHTSIG2_Sounding 0x02 +-#define bHTSIG2_Aggreaton 0x08 +-#define bHTSIG2_STBC 0x30 +-#define bHTSIG2_AdvCoding 0x40 +-#define bHTSIG2_NumOfHTLTF 0x300 +-#define bHTSIG2_CRC8 0x3fc +-#define bHTSIG1_MCS 0x7f +-#define bHTSIG1_BandWidth 0x80 +-#define bHTSIG1_HTLength 0xffff +-#define bLSIG_Rate 0xf +-#define bLSIG_Reserved 0x10 +-#define bLSIG_Length 0x1fffe +-#define bLSIG_Parity 0x20 +-#define bCCKRxPhase 0x4 +- +-#define bLSSIReadAddress 0x7f800000 // T65 RF +- +-#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal +- +-#define bLSSIReadBackData 0xfffff // T65 RF +- +-#define bLSSIReadOKFlag 0x1000 // Useless now +-#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz +-#define bRegulator0Standby 0x1 +-#define bRegulatorPLLStandby 0x2 +-#define bRegulator1Standby 0x4 +-#define bPLLPowerUp 0x8 +-#define bDPLLPowerUp 0x10 +-#define bDA10PowerUp 0x20 +-#define bAD7PowerUp 0x200 +-#define bDA6PowerUp 0x2000 +-#define bXtalPowerUp 0x4000 +-#define b40MDClkPowerUP 0x8000 +-#define bDA6DebugMode 0x20000 +-#define bDA6Swing 0x380000 +- +-#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ +- +-#define b80MClkDelay 0x18000000 // Useless +-#define bAFEWatchDogEnable 0x20000000 +- +-#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap +-#define bXtalCap23 0x3 +-#define bXtalCap92x 0x0f000000 +-#define bXtalCap 0x0f000000 +- +-#define bIntDifClkEnable 0x400 // Useless +-#define bExtSigClkEnable 0x800 +-#define bBandgapMbiasPowerUp 0x10000 +-#define bAD11SHGain 0xc0000 +-#define bAD11InputRange 0x700000 +-#define bAD11OPCurrent 0x3800000 +-#define bIPathLoopback 0x4000000 +-#define bQPathLoopback 0x8000000 +-#define bAFELoopback 0x10000000 +-#define bDA10Swing 0x7e0 +-#define bDA10Reverse 0x800 +-#define bDAClkSource 0x1000 +-#define bAD7InputRange 0x6000 +-#define bAD7Gain 0x38000 +-#define bAD7OutputCMMode 0x40000 +-#define bAD7InputCMMode 0x380000 +-#define bAD7Current 0xc00000 +-#define bRegulatorAdjust 0x7000000 +-#define bAD11PowerUpAtTx 0x1 +-#define bDA10PSAtTx 0x10 +-#define bAD11PowerUpAtRx 0x100 +-#define bDA10PSAtRx 0x1000 +-#define bCCKRxAGCFormat 0x200 +-#define bPSDFFTSamplepPoint 0xc000 +-#define bPSDAverageNum 0x3000 +-#define bIQPathControl 0xc00 +-#define bPSDFreq 0x3ff +-#define bPSDAntennaPath 0x30 +-#define bPSDIQSwitch 0x40 +-#define bPSDRxTrigger 0x400000 +-#define bPSDTxTrigger 0x80000000 +-#define bPSDSineToneScale 0x7f000000 +-#define bPSDReport 0xffff +- +-// 3. Page9(0x900) +-#define bOFDMTxSC 0x30000000 // Useless +-#define bCCKTxOn 0x1 +-#define bOFDMTxOn 0x2 +-#define bDebugPage 0xfff //reset debug page and also HWord, LWord +-#define bDebugItem 0xff //reset debug page and LWord +-#define bAntL 0x10 +-#define bAntNonHT 0x100 +-#define bAntHT1 0x1000 +-#define bAntHT2 0x10000 +-#define bAntHT1S1 0x100000 +-#define bAntNonHTS1 0x1000000 +- +-// 4. PageA(0xA00) +-#define bCCKBBMode 0x3 // Useless +-#define bCCKTxPowerSaving 0x80 +-#define bCCKRxPowerSaving 0x40 +- +-#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch +- +-#define bCCKScramble 0x8 // Useless +-#define bCCKAntDiversity 0x8000 +-#define bCCKCarrierRecovery 0x4000 +-#define bCCKTxRate 0x3000 +-#define bCCKDCCancel 0x0800 +-#define bCCKISICancel 0x0400 +-#define bCCKMatchFilter 0x0200 +-#define bCCKEqualizer 0x0100 +-#define bCCKPreambleDetect 0x800000 +-#define bCCKFastFalseCCA 0x400000 +-#define bCCKChEstStart 0x300000 +-#define bCCKCCACount 0x080000 +-#define bCCKcs_lim 0x070000 +-#define bCCKBistMode 0x80000000 +-#define bCCKCCAMask 0x40000000 +-#define bCCKTxDACPhase 0x4 +-#define bCCKRxADCPhase 0x20000000 //r_rx_clk +-#define bCCKr_cp_mode0 0x0100 +-#define bCCKTxDCOffset 0xf0 +-#define bCCKRxDCOffset 0xf +-#define bCCKCCAMode 0xc000 +-#define bCCKFalseCS_lim 0x3f00 +-#define bCCKCS_ratio 0xc00000 +-#define bCCKCorgBit_sel 0x300000 +-#define bCCKPD_lim 0x0f0000 +-#define bCCKNewCCA 0x80000000 +-#define bCCKRxHPofIG 0x8000 +-#define bCCKRxIG 0x7f00 +-#define bCCKLNAPolarity 0x800000 +-#define bCCKRx1stGain 0x7f0000 +-#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity +-#define bCCKRxAGCSatLevel 0x1f000000 +-#define bCCKRxAGCSatCount 0xe0 +-#define bCCKRxRFSettle 0x1f //AGCsamp_dly +-#define bCCKFixedRxAGC 0x8000 +-//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 +-#define bCCKAntennaPolarity 0x2000 +-#define bCCKTxFilterType 0x0c00 +-#define bCCKRxAGCReportType 0x0300 +-#define bCCKRxDAGCEn 0x80000000 +-#define bCCKRxDAGCPeriod 0x20000000 +-#define bCCKRxDAGCSatLevel 0x1f000000 +-#define bCCKTimingRecovery 0x800000 +-#define bCCKTxC0 0x3f0000 +-#define bCCKTxC1 0x3f000000 +-#define bCCKTxC2 0x3f +-#define bCCKTxC3 0x3f00 +-#define bCCKTxC4 0x3f0000 +-#define bCCKTxC5 0x3f000000 +-#define bCCKTxC6 0x3f +-#define bCCKTxC7 0x3f00 +-#define bCCKDebugPort 0xff0000 +-#define bCCKDACDebug 0x0f000000 +-#define bCCKFalseAlarmEnable 0x8000 +-#define bCCKFalseAlarmRead 0x4000 +-#define bCCKTRSSI 0x7f +-#define bCCKRxAGCReport 0xfe +-#define bCCKRxReport_AntSel 0x80000000 +-#define bCCKRxReport_MFOff 0x40000000 +-#define bCCKRxRxReport_SQLoss 0x20000000 +-#define bCCKRxReport_Pktloss 0x10000000 +-#define bCCKRxReport_Lockedbit 0x08000000 +-#define bCCKRxReport_RateError 0x04000000 +-#define bCCKRxReport_RxRate 0x03000000 +-#define bCCKRxFACounterLower 0xff +-#define bCCKRxFACounterUpper 0xff000000 +-#define bCCKRxHPAGCStart 0xe000 +-#define bCCKRxHPAGCFinal 0x1c00 +-#define bCCKRxFalseAlarmEnable 0x8000 +-#define bCCKFACounterFreeze 0x4000 +-#define bCCKTxPathSel 0x10000000 +-#define bCCKDefaultRxPath 0xc000000 +-#define bCCKOptionRxPath 0x3000000 +- +-// 5. PageC(0xC00) +-#define bNumOfSTF 0x3 // Useless +-#define bShift_L 0xc0 +-#define bGI_TH 0xc +-#define bRxPathA 0x1 +-#define bRxPathB 0x2 +-#define bRxPathC 0x4 +-#define bRxPathD 0x8 +-#define bTxPathA 0x1 +-#define bTxPathB 0x2 +-#define bTxPathC 0x4 +-#define bTxPathD 0x8 +-#define bTRSSIFreq 0x200 +-#define bADCBackoff 0x3000 +-#define bDFIRBackoff 0xc000 +-#define bTRSSILatchPhase 0x10000 +-#define bRxIDCOffset 0xff +-#define bRxQDCOffset 0xff00 +-#define bRxDFIRMode 0x1800000 +-#define bRxDCNFType 0xe000000 +-#define bRXIQImb_A 0x3ff +-#define bRXIQImb_B 0xfc00 +-#define bRXIQImb_C 0x3f0000 +-#define bRXIQImb_D 0xffc00000 +-#define bDC_dc_Notch 0x60000 +-#define bRxNBINotch 0x1f000000 +-#define bPD_TH 0xf +-#define bPD_TH_Opt2 0xc000 +-#define bPWED_TH 0x700 +-#define bIfMF_Win_L 0x800 +-#define bPD_Option 0x1000 +-#define bMF_Win_L 0xe000 +-#define bBW_Search_L 0x30000 +-#define bwin_enh_L 0xc0000 +-#define bBW_TH 0x700000 +-#define bED_TH2 0x3800000 +-#define bBW_option 0x4000000 +-#define bRatio_TH 0x18000000 +-#define bWindow_L 0xe0000000 +-#define bSBD_Option 0x1 +-#define bFrame_TH 0x1c +-#define bFS_Option 0x60 +-#define bDC_Slope_check 0x80 +-#define bFGuard_Counter_DC_L 0xe00 +-#define bFrame_Weight_Short 0x7000 +-#define bSub_Tune 0xe00000 +-#define bFrame_DC_Length 0xe000000 +-#define bSBD_start_offset 0x30000000 +-#define bFrame_TH_2 0x7 +-#define bFrame_GI2_TH 0x38 +-#define bGI2_Sync_en 0x40 +-#define bSarch_Short_Early 0x300 +-#define bSarch_Short_Late 0xc00 +-#define bSarch_GI2_Late 0x70000 +-#define bCFOAntSum 0x1 +-#define bCFOAcc 0x2 +-#define bCFOStartOffset 0xc +-#define bCFOLookBack 0x70 +-#define bCFOSumWeight 0x80 +-#define bDAGCEnable 0x10000 +-#define bTXIQImb_A 0x3ff +-#define bTXIQImb_B 0xfc00 +-#define bTXIQImb_C 0x3f0000 +-#define bTXIQImb_D 0xffc00000 +-#define bTxIDCOffset 0xff +-#define bTxQDCOffset 0xff00 +-#define bTxDFIRMode 0x10000 +-#define bTxPesudoNoiseOn 0x4000000 +-#define bTxPesudoNoise_A 0xff +-#define bTxPesudoNoise_B 0xff00 +-#define bTxPesudoNoise_C 0xff0000 +-#define bTxPesudoNoise_D 0xff000000 +-#define bCCADropOption 0x20000 +-#define bCCADropThres 0xfff00000 +-#define bEDCCA_H 0xf +-#define bEDCCA_L 0xf0 +-#define bLambda_ED 0x300 +-#define bRxInitialGain 0x7f +-#define bRxAntDivEn 0x80 +-#define bRxAGCAddressForLNA 0x7f00 +-#define bRxHighPowerFlow 0x8000 +-#define bRxAGCFreezeThres 0xc0000 +-#define bRxFreezeStep_AGC1 0x300000 +-#define bRxFreezeStep_AGC2 0xc00000 +-#define bRxFreezeStep_AGC3 0x3000000 +-#define bRxFreezeStep_AGC0 0xc000000 +-#define bRxRssi_Cmp_En 0x10000000 +-#define bRxQuickAGCEn 0x20000000 +-#define bRxAGCFreezeThresMode 0x40000000 +-#define bRxOverFlowCheckType 0x80000000 +-#define bRxAGCShift 0x7f +-#define bTRSW_Tri_Only 0x80 +-#define bPowerThres 0x300 +-#define bRxAGCEn 0x1 +-#define bRxAGCTogetherEn 0x2 +-#define bRxAGCMin 0x4 +-#define bRxHP_Ini 0x7 +-#define bRxHP_TRLNA 0x70 +-#define bRxHP_RSSI 0x700 +-#define bRxHP_BBP1 0x7000 +-#define bRxHP_BBP2 0x70000 +-#define bRxHP_BBP3 0x700000 +-#define bRSSI_H 0x7f0000 //the threshold for high power +-#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity +-#define bRxSettle_TRSW 0x7 +-#define bRxSettle_LNA 0x38 +-#define bRxSettle_RSSI 0x1c0 +-#define bRxSettle_BBP 0xe00 +-#define bRxSettle_RxHP 0x7000 +-#define bRxSettle_AntSW_RSSI 0x38000 +-#define bRxSettle_AntSW 0xc0000 +-#define bRxProcessTime_DAGC 0x300000 +-#define bRxSettle_HSSI 0x400000 +-#define bRxProcessTime_BBPPW 0x800000 +-#define bRxAntennaPowerShift 0x3000000 +-#define bRSSITableSelect 0xc000000 +-#define bRxHP_Final 0x7000000 +-#define bRxHTSettle_BBP 0x7 +-#define bRxHTSettle_HSSI 0x8 +-#define bRxHTSettle_RxHP 0x70 +-#define bRxHTSettle_BBPPW 0x80 +-#define bRxHTSettle_Idle 0x300 +-#define bRxHTSettle_Reserved 0x1c00 +-#define bRxHTRxHPEn 0x8000 +-#define bRxHTAGCFreezeThres 0x30000 +-#define bRxHTAGCTogetherEn 0x40000 +-#define bRxHTAGCMin 0x80000 +-#define bRxHTAGCEn 0x100000 +-#define bRxHTDAGCEn 0x200000 +-#define bRxHTRxHP_BBP 0x1c00000 +-#define bRxHTRxHP_Final 0xe0000000 +-#define bRxPWRatioTH 0x3 +-#define bRxPWRatioEn 0x4 +-#define bRxMFHold 0x3800 +-#define bRxPD_Delay_TH1 0x38 +-#define bRxPD_Delay_TH2 0x1c0 +-#define bRxPD_DC_COUNT_MAX 0x600 +-//#define bRxMF_Hold 0x3800 +-#define bRxPD_Delay_TH 0x8000 +-#define bRxProcess_Delay 0xf0000 +-#define bRxSearchrange_GI2_Early 0x700000 +-#define bRxFrame_Guard_Counter_L 0x3800000 +-#define bRxSGI_Guard_L 0xc000000 +-#define bRxSGI_Search_L 0x30000000 +-#define bRxSGI_TH 0xc0000000 +-#define bDFSCnt0 0xff +-#define bDFSCnt1 0xff00 +-#define bDFSFlag 0xf0000 +-#define bMFWeightSum 0x300000 +-#define bMinIdxTH 0x7f000000 +-#define bDAFormat 0x40000 +-#define bTxChEmuEnable 0x01000000 +-#define bTRSWIsolation_A 0x7f +-#define bTRSWIsolation_B 0x7f00 +-#define bTRSWIsolation_C 0x7f0000 +-#define bTRSWIsolation_D 0x7f000000 +-#define bExtLNAGain 0x7c00 +- +-// 6. PageE(0xE00) +-#define bSTBCEn 0x4 // Useless +-#define bAntennaMapping 0x10 +-#define bNss 0x20 +-#define bCFOAntSumD 0x200 +-#define bPHYCounterReset 0x8000000 +-#define bCFOReportGet 0x4000000 +-#define bOFDMContinueTx 0x10000000 +-#define bOFDMSingleCarrier 0x20000000 +-#define bOFDMSingleTone 0x40000000 +-//#define bRxPath1 0x01 +-//#define bRxPath2 0x02 +-//#define bRxPath3 0x04 +-//#define bRxPath4 0x08 +-//#define bTxPath1 0x10 +-//#define bTxPath2 0x20 +-#define bHTDetect 0x100 +-#define bCFOEn 0x10000 +-#define bCFOValue 0xfff00000 +-#define bSigTone_Re 0x3f +-#define bSigTone_Im 0x7f00 +-#define bCounter_CCA 0xffff +-#define bCounter_ParityFail 0xffff0000 +-#define bCounter_RateIllegal 0xffff +-#define bCounter_CRC8Fail 0xffff0000 +-#define bCounter_MCSNoSupport 0xffff +-#define bCounter_FastSync 0xffff +-#define bShortCFO 0xfff +-#define bShortCFOTLength 12 //total +-#define bShortCFOFLength 11 //fraction +-#define bLongCFO 0x7ff +-#define bLongCFOTLength 11 +-#define bLongCFOFLength 11 +-#define bTailCFO 0x1fff +-#define bTailCFOTLength 13 +-#define bTailCFOFLength 12 +-#define bmax_en_pwdB 0xffff +-#define bCC_power_dB 0xffff0000 +-#define bnoise_pwdB 0xffff +-#define bPowerMeasTLength 10 +-#define bPowerMeasFLength 3 +-#define bRx_HT_BW 0x1 +-#define bRxSC 0x6 +-#define bRx_HT 0x8 +-#define bNB_intf_det_on 0x1 +-#define bIntf_win_len_cfg 0x30 +-#define bNB_Intf_TH_cfg 0x1c0 +-#define bRFGain 0x3f +-#define bTableSel 0x40 +-#define bTRSW 0x80 +-#define bRxSNR_A 0xff +-#define bRxSNR_B 0xff00 +-#define bRxSNR_C 0xff0000 +-#define bRxSNR_D 0xff000000 +-#define bSNREVMTLength 8 +-#define bSNREVMFLength 1 +-#define bCSI1st 0xff +-#define bCSI2nd 0xff00 +-#define bRxEVM1st 0xff0000 +-#define bRxEVM2nd 0xff000000 +-#define bSIGEVM 0xff +-#define bPWDB 0xff00 +-#define bSGIEN 0x10000 +- +-#define bSFactorQAM1 0xf // Useless +-#define bSFactorQAM2 0xf0 +-#define bSFactorQAM3 0xf00 +-#define bSFactorQAM4 0xf000 +-#define bSFactorQAM5 0xf0000 +-#define bSFactorQAM6 0xf0000 +-#define bSFactorQAM7 0xf00000 +-#define bSFactorQAM8 0xf000000 +-#define bSFactorQAM9 0xf0000000 +-#define bCSIScheme 0x100000 +- +-#define bNoiseLvlTopSet 0x3 // Useless +-#define bChSmooth 0x4 +-#define bChSmoothCfg1 0x38 +-#define bChSmoothCfg2 0x1c0 +-#define bChSmoothCfg3 0xe00 +-#define bChSmoothCfg4 0x7000 +-#define bMRCMode 0x800000 +-#define bTHEVMCfg 0x7000000 +- +-#define bLoopFitType 0x1 // Useless +-#define bUpdCFO 0x40 +-#define bUpdCFOOffData 0x80 +-#define bAdvUpdCFO 0x100 +-#define bAdvTimeCtrl 0x800 +-#define bUpdClko 0x1000 +-#define bFC 0x6000 +-#define bTrackingMode 0x8000 +-#define bPhCmpEnable 0x10000 +-#define bUpdClkoLTF 0x20000 +-#define bComChCFO 0x40000 +-#define bCSIEstiMode 0x80000 +-#define bAdvUpdEqz 0x100000 +-#define bUChCfg 0x7000000 +-#define bUpdEqz 0x8000000 +- +-//Rx Pseduo noise +-#define bRxPesudoNoiseOn 0x20000000 // Useless +-#define bRxPesudoNoise_A 0xff +-#define bRxPesudoNoise_B 0xff00 +-#define bRxPesudoNoise_C 0xff0000 +-#define bRxPesudoNoise_D 0xff000000 +-#define bPesudoNoiseState_A 0xffff +-#define bPesudoNoiseState_B 0xffff0000 +-#define bPesudoNoiseState_C 0xffff +-#define bPesudoNoiseState_D 0xffff0000 +- +-//7. RF Register +-//Zebra1 +-#define bZebra1_HSSIEnable 0x8 // Useless +-#define bZebra1_TRxControl 0xc00 +-#define bZebra1_TRxGainSetting 0x07f +-#define bZebra1_RxCorner 0xc00 +-#define bZebra1_TxChargePump 0x38 +-#define bZebra1_RxChargePump 0x7 +-#define bZebra1_ChannelNum 0xf80 +-#define bZebra1_TxLPFBW 0x400 +-#define bZebra1_RxLPFBW 0x600 +- +-//Zebra4 +-#define bRTL8256RegModeCtrl1 0x100 // Useless +-#define bRTL8256RegModeCtrl0 0x40 +-#define bRTL8256_TxLPFBW 0x18 +-#define bRTL8256_RxLPFBW 0x600 +- +-//RTL8258 +-#define bRTL8258_TxLPFBW 0xc // Useless +-#define bRTL8258_RxLPFBW 0xc00 +-#define bRTL8258_RSSILPFBW 0xc0 +- +- +-// +-// Other Definition +-// +- +-//byte endable for sb_write +-#define bByte0 0x1 // Useless +-#define bByte1 0x2 +-#define bByte2 0x4 +-#define bByte3 0x8 +-#define bWord0 0x3 +-#define bWord1 0xc +-#define bDWord 0xf +- +-//for PutRegsetting & GetRegSetting BitMask +-#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f +-#define bMaskByte1 0xff00 +-#define bMaskByte2 0xff0000 +-#define bMaskByte3 0xff000000 +-#define bMaskHWord 0xffff0000 +-#define bMaskLWord 0x0000ffff +-#define bMaskDWord 0xffffffff +-#define bMaskH3Bytes 0xffffff00 +-#define bMask12Bits 0xfff +-#define bMaskH4Bits 0xf0000000 +-#define bMaskOFDM_D 0xffc00000 +-#define bMaskCCK 0x3f3f3f3f +- +- +- +-#define bEnable 0x1 // Useless +-#define bDisable 0x0 +- +-#define LeftAntenna 0x0 // Useless +-#define RightAntenna 0x1 +- +-#define tCheckTxStatus 500 //500ms // Useless +-#define tUpdateRxCounter 100 //100ms +- +-#define rateCCK 0 // Useless +-#define rateOFDM 1 +-#define rateHT 2 +- +-//define Register-End +-#define bPMAC_End 0x1ff // Useless +-#define bFPGAPHY0_End 0x8ff +-#define bFPGAPHY1_End 0x9ff +-#define bCCKPHY0_End 0xaff +-#define bOFDMPHY0_End 0xcff +-#define bOFDMPHY1_End 0xdff +- +-//define max debug item in each debug page +-//#define bMaxItem_FPGA_PHY0 0x9 +-//#define bMaxItem_FPGA_PHY1 0x3 +-//#define bMaxItem_PHY_11B 0x16 +-//#define bMaxItem_OFDM_PHY0 0x29 +-//#define bMaxItem_OFDM_PHY1 0x0 +- +-#define bPMACControl 0x0 // Useless +-#define bWMACControl 0x1 +-#define bWNICControl 0x2 +- +-#define PathA 0x0 // Useless +-#define PathB 0x1 +-#define PathC 0x2 +-#define PathD 0x3 +- +-/*--------------------------Define Parameters-------------------------------*/ +- +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8188EPHYREG_H__ ++#define __INC_HAL8188EPHYREG_H__ ++/*--------------------------Define Parameters-------------------------------*/ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 ++#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_ram64x16 0xb2c ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rConfig_Pmpd_AntB 0xb98 ++#define rAPK 0xbd8 ++ ++ ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_csi_fix_mask1 0xd40 ++#define rOFDM1_csi_fix_mask2 0xd44 ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++ ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_TXBIAS 0x16 ++#define RF_POW_ABILITY 0x17 // ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER_88E 0x42 // ++#define RF_T_METER 0x24 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_TX_BIAS_A 0x35 ++#define RF_TX_BIAS_D 0x36 ++#define RF_LOBF_9 0x38 ++#define RF_RXRF_A3 0x3C // ++#define RF_TRSW 0x3F ++ ++#define RF_TXRF_A2 0x41 ++#define RF_TXPA_G4 0x46 ++#define RF_TXPA_A4 0x4B ++#define RF_0x52 0x52 ++#define RF_WE_LUT 0xEF ++ ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++ ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPwrSeq.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPwrSeq.h +old mode 100755 +new mode 100644 +index 41f852f..1c0f3a3 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPwrSeq.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188EPwrSeq.h +@@ -1,176 +1,176 @@ +- +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +- +-#ifndef __HAL8188EPWRSEQ_H__ +-#define __HAL8188EPWRSEQ_H__ +- +-#include "HalPwrSeqCmd.h" +- +-/* +- Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd +- There are 6 HW Power States: +- 0: POFF--Power Off +- 1: PDN--Power Down +- 2: CARDEMU--Card Emulation +- 3: ACT--Active Mode +- 4: LPS--Low Power State +- 5: SUS--Suspend +- +- The transision from different states are defined below +- TRANS_CARDEMU_TO_ACT +- TRANS_ACT_TO_CARDEMU +- TRANS_CARDEMU_TO_SUS +- TRANS_SUS_TO_CARDEMU +- TRANS_CARDEMU_TO_PDN +- TRANS_ACT_TO_LPS +- TRANS_LPS_TO_ACT +- +- TRANS_END +- +- PWR SEQ Version: rtl8188E_PwrSeq_V09.h +-*/ +-#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10 +-#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10 +-#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10 +-#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10 +-#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10 +-#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10 +-#define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15 +-#define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15 +-#define RTL8188E_TRANS_END_STEPS 1 +- +- +-#define RTL8188E_TRANS_CARDEMU_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0}, /* 0x02[1:0] = 0 reset BB*/ \ +- {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, 0}, /*0x04[12:11] = 2b'00 disable WL suspend*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x04[8] = 1 polling until return 0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0}, /*wait till 0x04[8] = 0*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*LDO normal mode*/ \ +- +-#define RTL8188E_TRANS_ACT_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*LDO Sleep mode*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ +- +-#define RTL8188E_TRANS_CARDEMU_TO_SUS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11enable WL suspend for PCIe*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, BIT7}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ +- {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ +- {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ +- +-#define RTL8188E_TRANS_SUS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ +- +-#define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ +- {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ +- {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ +- +-#define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ +- +-#define RTL8188E_TRANS_CARDEMU_TO_PDN \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ +- +-#define RTL8188E_TRANS_PDN_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ +- +-//This is used by driver for LPSRadioOff Procedure, not for FW LPS Step +-#define RTL8188E_TRANS_ACT_TO_LPS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ +- {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ +- {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ +- +- +-#define RTL8188E_TRANS_LPS_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ +- {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ +- {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ +- {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ +- {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ +- {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ +- +-#define RTL8188E_TRANS_END \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // +- +- +-extern WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; +- +-#endif //__HAL8188EPWRSEQ_H__ +- ++ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL8188EPWRSEQ_H__ ++#define __HAL8188EPWRSEQ_H__ ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++ ++ PWR SEQ Version: rtl8188E_PwrSeq_V09.h ++*/ ++#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10 ++#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10 ++#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10 ++#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10 ++#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10 ++#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10 ++#define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8188E_TRANS_END_STEPS 1 ++ ++ ++#define RTL8188E_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0}, /* 0x02[1:0] = 0 reset BB*/ \ ++ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, 0}, /*0x04[12:11] = 2b'00 disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x04[8] = 1 polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0}, /*wait till 0x04[8] = 0*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*LDO normal mode*/ \ ++ ++#define RTL8188E_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*LDO Sleep mode*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ ++#define RTL8188E_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11enable WL suspend for PCIe*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, BIT7}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ ++ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ ++ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8188E_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ ++ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ ++ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8188E_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8188E_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++//This is used by driver for LPSRadioOff Procedure, not for FW LPS Step ++#define RTL8188E_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8188E_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8188E_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; ++ ++#endif //__HAL8188EPWRSEQ_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188FPhyCfg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188FPhyCfg.h +new file mode 100644 +index 0000000..9d729ff +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188FPhyCfg.h +@@ -0,0 +1,149 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8188FPHYCFG_H__ ++#define __INC_HAL8188FPHYCFG_H__ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters End-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++/*------------------------------Define structure End----------------------------*/ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++u32 ++PHY_QueryBBReg_8188F( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ); ++ ++VOID ++PHY_SetBBReg_8188F( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++u32 ++PHY_QueryRFReg_8188F( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ); ++ ++VOID ++PHY_SetRFReg_8188F( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++/* MAC/BB/RF HAL config */ ++int PHY_BBConfig8188F(PADAPTER Adapter ); ++ ++int PHY_RFConfig8188F(PADAPTER Adapter ); ++ ++s32 PHY_MACConfig8188F(PADAPTER padapter); ++ ++int ++PHY_ConfigRFWithParaFile_8188F( ++ IN PADAPTER Adapter, ++ IN u8* pFileName, ++ RF_PATH eRFPath ++); ++ ++VOID ++PHY_SetTxPowerIndex_8188F( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ); ++ ++u8 ++PHY_GetTxPowerIndex_8188F( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++VOID ++PHY_GetTxPowerLevel8188F( ++ IN PADAPTER Adapter, ++ OUT s32* powerlevel ++ ); ++ ++VOID ++PHY_SetTxPowerLevel8188F( ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetBWMode8188F( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M ++ IN unsigned char Offset // Upper, Lower, or Don't care ++); ++ ++VOID ++PHY_SwChnl8188F( // Call after initialization ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetSwChnlBWMode8188F( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++ ++VOID PHY_SetRFPathSwitch_8188F( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain ++ ); ++/*--------------------------Exported Function prototype End---------------------*/ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188FPhyReg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188FPhyReg.h +new file mode 100644 +index 0000000..817ff8e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188FPhyReg.h +@@ -0,0 +1,1171 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8188FPHYREG_H__ ++#define __INC_HAL8188FPHYREG_H__ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++//============================================================ ++// Regsiter offset definition ++//============================================================ ++ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++ ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 // Useless now ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++#define rS0S1_PathSwitch 0x948 ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rConfig_Pmpd_AntB 0xb98 ++#define rAPK 0xbd8 ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++#define RF_BS_PA_APSET_G1_G4 0x03 ++#define RF_BS_PA_APSET_G5_G8 0x04 ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_TXBIAS 0x16 // ++#define RF_POW_ABILITY 0x17 // ++#define RF_MODE_AG 0x18 // ++#define rRfChannel 0x18 // RF channel and BW switch ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER 0x24 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++ ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_TX_BIAS_A 0x35 ++#define RF_TX_BIAS_D 0x36 ++#define RF_LOBF_9 0x38 ++#define RF_RXRF_A3 0x3C // ++#define RF_TRSW 0x3F ++ ++#define RF_TXRF_A2 0x41 ++#define RF_TXPA_G4 0x46 ++#define RF_TXPA_A4 0x4B ++#define RF_0x52 0x52 ++#define RF_RXG_MIX_SWBW 0x87 ++#define RF_DBG_LP_RX2 0xDF ++#define RF_WE_LUT 0xEF ++#define RF_S0S1 0xB0 ++ ++#define RF_TX_GAIN_OFFSET_8188F(_val) (abs((_val)) | (((_val) > 0) ? BIT5 : 0)) ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++// BB Register Definition ++// ++// 4. Page9(0x900) ++// ++#define rDPDT_control 0x92c ++#define rfe_ctrl_anta_src 0x930 ++#define rS0S1_PathSwitch 0x948 ++#define BBrx_DFIR 0x954 ++#define AGC_table_select 0xb2c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rPdp_AntA_8 0xb08 ++#define rPdp_AntA_C 0xb0c ++#define rPdp_AntA_10 0xb10 ++#define rPdp_AntA_14 0xb14 ++#define rPdp_AntA_18 0xb18 ++#define rPdp_AntA_1C 0xb1c ++#define rPdp_AntA_20 0xb20 ++#define rPdp_AntA_24 0xb24 ++ ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_ram64x16 0xb2c ++ ++#define rBndA 0xb30 ++#define rHssiPar 0xb34 ++ ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++ ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rPdp_AntB_8 0xb78 ++#define rPdp_AntB_C 0xb7c ++#define rPdp_AntB_10 0xb80 ++#define rPdp_AntB_14 0xb84 ++#define rPdp_AntB_18 0xb88 ++#define rPdp_AntB_1C 0xb8c ++#define rPdp_AntB_20 0xb90 ++#define rPdp_AntB_24 0xb94 ++ ++#define rConfig_Pmpd_AntB 0xb98 ++ ++#define rBndB 0xba0 ++ ++#define rAPK 0xbd8 ++#define rPm_Rx0_AntA 0xbdc ++#define rPm_Rx1_AntA 0xbe0 ++#define rPm_Rx2_AntA 0xbe4 ++#define rPm_Rx3_AntA 0xbe8 ++#define rPm_Rx0_AntB 0xbec ++#define rPm_Rx1_AntB 0xbf0 ++#define rPm_Rx2_AntB 0xbf4 ++#define rPm_Rx3_AntB 0xbf8 ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188FPwrSeq.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188FPwrSeq.h +new file mode 100644 +index 0000000..b6d0c59 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8188FPwrSeq.h +@@ -0,0 +1,199 @@ ++#ifndef REALTEK_POWER_SEQUENCE_8188F ++#define REALTEK_POWER_SEQUENCE_8188F ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WM-20130815-JackieLau-RTL8188F_Power_Architecture v08.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8188F_TRANS_CARDEMU_TO_ACT_STEPS 13 ++#define RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS 15 ++#define RTL8188F_TRANS_CARDEMU_TO_SUS_STEPS 14 ++#define RTL8188F_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS 15 ++#define RTL8188F_TRANS_PDN_TO_CARDEMU_STEPS 15 ++#define RTL8188F_TRANS_ACT_TO_LPS_STEPS 11 ++#define RTL8188F_TRANS_LPS_TO_ACT_STEPS 13 ++#define RTL8188F_TRANS_ACT_TO_SWLPS_STEPS 21 ++#define RTL8188F_TRANS_SWLPS_TO_ACT_STEPS 14 ++#define RTL8188F_TRANS_END_STEPS 1 ++ ++ ++#define RTL8188F_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT3), 0},/* 0x4[11]=1'b0 disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* 0x4[8]=1 polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ ++ {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x35}, /*0x27<=35 to reduce RF noise*/ ++ ++#define RTL8188F_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ ++ {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x34}, /*0x27 <= 34, xtal_qsel=0 to xtal bring up*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ ++#define RTL8188F_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00}, /*0x07=0x00 , SOP option to disable BG/MB*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ \ ++ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ ++ ++#define RTL8188F_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ ++ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ ++ ++#define RTL8188F_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00}, /*0x07=0x00 , SOP option to disable BG/MB*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ \ ++ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ ++ ++#define RTL8188F_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ ++ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ ++ ++ ++#define RTL8188F_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8188F_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8188F_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*set RPWM IMR*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ ++ ++ ++#define RTL8188F_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xff,0x35},/*xtal_qsel=1 for low noise*/ \ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x002B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x1c, 0x1c}, /*. 0x2b[4:2] = 3b'111 to enable BB,AFE clock*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++ ++ #define RTL8188F_TRANS_ACT_TO_SWLPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*set RPWM IMR*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ {0x002b, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x1C, 0x00},/*0x2b[4:2]<=0 to gated BB,AFE clock*/ \ ++ {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x34},/*xtal_qsel=0 for bring up*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x00},/* sdio LPS option*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x83},/* usb LPS option, open bandgap, xtal*/ \ ++ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /* 0xC4[5]<=0, digital LDO no standby mode*/ \ ++ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /* 0xC4[7]<=1, on domain voltage adjust*/ \ ++ {0x00a7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0xe0}, /* low power LPS enable for sdio*/ \ ++ {0x00a7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0xe4}, /* low power LPS enable for usb*/ \ ++ {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /* enable WL_LPS_EN*/ ++ ++ ++#define RTL8188F_TRANS_SWLPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*polling TSF stable*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1, enable security engine*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x06B7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x09}, /*. reset MAC rx state machine*/\ ++ {0x06B4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x86}, /*. reset MAC rx state machine*/\ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/* set CPU RAM code ready*/ \ ++ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/ \ ++ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*enable CPU IO Wrapper*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, BIT7},/*polling FW init ready */ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT6, BIT6},/*polling FW init ready */ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8188F_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8188F_power_on_flow[RTL8188F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188F_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188F_radio_off_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188F_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188F_card_disable_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188F_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188F_card_enable_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188F_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188F_suspend_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188F_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188F_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188F_resume_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188F_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188F_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188F_hwpdn_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188F_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188F_enter_lps_flow[RTL8188F_TRANS_ACT_TO_LPS_STEPS+RTL8188F_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188F_leave_lps_flow[RTL8188F_TRANS_LPS_TO_ACT_STEPS+RTL8188F_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188F_enter_swlps_flow[RTL8188F_TRANS_ACT_TO_SWLPS_STEPS+RTL8188F_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8188F_leave_swlps_flow[RTL8188F_TRANS_SWLPS_TO_ACT_STEPS+RTL8188F_TRANS_END_STEPS]; ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPhyCfg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPhyCfg.h +old mode 100755 +new mode 100644 +index d76863b..f67fe28 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPhyCfg.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPhyCfg.h +@@ -1,165 +1,178 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __INC_HAL8192EPHYCFG_H__ +-#define __INC_HAL8192EPHYCFG_H__ +- +- +-/*--------------------------Define Parameters-------------------------------*/ +-#define LOOP_LIMIT 5 +-#define MAX_STALL_TIME 50 //us +-#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) +-#define MAX_TXPWR_IDX_NMODE_92S 63 +-#define Reset_Cnt_Limit 3 +- +-#ifdef CONFIG_PCI_HCI +-#define MAX_AGGR_NUM 0x0B +-#else +-#define MAX_AGGR_NUM 0x07 +-#endif // CONFIG_PCI_HCI +- +- +-/*--------------------------Define Parameters-------------------------------*/ +- +-/*------------------------------Define structure----------------------------*/ +- +-/* BB/RF related */ +- +-/*------------------------------Define structure----------------------------*/ +- +- +-/*------------------------Export global variable----------------------------*/ +-/*------------------------Export global variable----------------------------*/ +- +- +-/*------------------------Export Marco Definition---------------------------*/ +-/*------------------------Export Marco Definition---------------------------*/ +- +- +-/*--------------------------Exported Function prototype---------------------*/ +-// +-// BB and RF register read/write +-// +-u32 PHY_QueryBBReg8192E( IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask ); +-void PHY_SetBBReg8192E( IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data ); +-u32 PHY_QueryRFReg8192E( IN PADAPTER Adapter, +- IN u8 eRFPath, +- IN u32 RegAddr, +- IN u32 BitMask ); +-void PHY_SetRFReg8192E( IN PADAPTER Adapter, +- IN u8 eRFPath, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data ); +- +-// +-// Initialization related function +-// +-/* MAC/BB/RF HAL config */ +-int PHY_MACConfig8192E(IN PADAPTER Adapter ); +-int PHY_BBConfig8192E(IN PADAPTER Adapter ); +-int PHY_RFConfig8192E(IN PADAPTER Adapter ); +- +-/* RF config */ +- +- +-// +-// BB TX Power R/W +-// +-void PHY_GetTxPowerLevel8192E( IN PADAPTER Adapter, OUT s32* powerlevel ); +-void PHY_SetTxPowerLevel8192E( IN PADAPTER Adapter, IN u8 channel ); +-BOOLEAN PHY_UpdateTxPowerDbm8192E( IN PADAPTER Adapter, IN int powerInDbm ); +- +-VOID +-PHY_SetTxPowerIndex_8192E( +- IN PADAPTER Adapter, +- IN u32 PowerIndex, +- IN u8 RFPath, +- IN u8 Rate +- ); +- +-u8 +-PHY_GetTxPowerIndex_8192E( +- IN PADAPTER pAdapter, +- IN u8 RFPath, +- IN u8 Rate, +- IN CHANNEL_WIDTH BandWidth, +- IN u8 Channel +- ); +- +-// +-// Switch bandwidth for 8192S +-// +-VOID +-PHY_SetBWMode8192E( +- IN PADAPTER pAdapter, +- IN CHANNEL_WIDTH Bandwidth, +- IN u8 Offset +-); +- +-// +-// channel switch related funciton +-// +-VOID +-PHY_SwChnl8192E( +- IN PADAPTER Adapter, +- IN u8 channel +-); +- +- +-VOID +-PHY_SetSwChnlBWMode8192E( +- IN PADAPTER Adapter, +- IN u8 channel, +- IN CHANNEL_WIDTH Bandwidth, +- IN u8 Offset40, +- IN u8 Offset80 +-); +- +-void +-phy_SpurCalibration_8192E( +- IN PADAPTER Adapter, +- IN SPUR_CAL_METHOD Method +-); +-// +-// BB/MAC/RF other monitor API +-// +- +-VOID +-PHY_SetRFPathSwitch_8192E( +- IN PADAPTER pAdapter, +- IN BOOLEAN bMain +-); +- +-VOID +-storePwrIndexDiffRateOffset( +- IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data +- ); +- +-/*--------------------------Exported Function prototype---------------------*/ +-#endif // __INC_HAL8192CPHYCFG_H +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192EPHYCFG_H__ ++#define __INC_HAL8192EPHYCFG_H__ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++/* BB/RF related */ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++// ++// BB and RF register read/write ++// ++u32 PHY_QueryBBReg8192E( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetBBReg8192E( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 PHY_QueryRFReg8192E( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetRFReg8192E( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++int PHY_MACConfig8192E(IN PADAPTER Adapter ); ++int PHY_BBConfig8192E(IN PADAPTER Adapter ); ++int PHY_RFConfig8192E(IN PADAPTER Adapter ); ++ ++/* RF config */ ++ ++ ++// ++// BB TX Power R/W ++// ++void PHY_GetTxPowerLevel8192E( IN PADAPTER Adapter, OUT s32* powerlevel ); ++void PHY_SetTxPowerLevel8192E( IN PADAPTER Adapter, IN u8 channel ); ++BOOLEAN PHY_UpdateTxPowerDbm8192E( IN PADAPTER Adapter, IN int powerInDbm ); ++ ++VOID ++PHY_SetTxPowerIndex_8192E( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ); ++ ++u8 ++PHY_GetTxPowerIndex_8192E( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++// ++// Switch bandwidth for 8192S ++// ++VOID ++PHY_SetBWMode8192E( ++ IN PADAPTER pAdapter, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset ++); ++ ++// ++// channel switch related funciton ++// ++VOID ++PHY_SwChnl8192E( ++ IN PADAPTER Adapter, ++ IN u8 channel ++); ++ ++ ++VOID ++PHY_SetSwChnlBWMode8192E( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++ ++VOID ++PHY_SetRFEReg_8192E( ++ IN PADAPTER Adapter ++); ++ ++void ++phy_SpurCalibration_8192E( ++ IN PADAPTER Adapter, ++ IN SPUR_CAL_METHOD Method ++); ++void PHY_SpurCalibration_8192E(IN PADAPTER Adapter); ++ ++#ifdef CONFIG_SPUR_CAL_NBI ++void ++phy_SpurCalibration_8192E_NBI( ++ IN PADAPTER Adapter ++); ++#endif ++// ++// BB/MAC/RF other monitor API ++// ++ ++VOID ++PHY_SetRFPathSwitch_8192E( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain ++); ++ ++VOID ++storePwrIndexDiffRateOffset( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++/*--------------------------Exported Function prototype---------------------*/ ++#endif // __INC_HAL8192CPHYCFG_H ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPhyReg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPhyReg.h +old mode 100755 +new mode 100644 +index 02a3f86..e7cfa26 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPhyReg.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPhyReg.h +@@ -1,1131 +1,1133 @@ +-/***************************************************************************** +- * Copyright(c) 2008, RealTEK Technology Inc. All Right Reserved. +- * +- * Module: __INC_HAL8192SPHYREG_H +- * +- * +- * Note: 1. Define PMAC/BB register map +- * 2. Define RF register map +- * 3. PMAC/BB register bit mask. +- * 4. RF reg bit mask. +- * 5. Other BB/RF relative definition. +- * +- * +- * Export: Constants, macro, functions(API), global variables(None). +- * +- * Abbrev: +- * +- * History: +- * Data Who Remark +- * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. +- * 2. Reorganize code architecture. +- * 09/25/2008 MH 1. Add RL6052 register definition +- * +- *****************************************************************************/ +-#ifndef __INC_HAL8192EPHYREG_H +-#define __INC_HAL8192EPHYREG_H +- +- +-/*--------------------------Define Parameters-------------------------------*/ +- +-//============================================================ +-// 8192S Regsiter offset definition +-//============================================================ +- +-// +-// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF +-// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF +-// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 +-// 3. RF register 0x00-2E +-// 4. Bit Mask for BB/RF register +-// 5. Other defintion for BB/RF R/W +-// +- +- +-// +-// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF +-// 1. Page1(0x100) +-// +-#define rPMAC_Reset 0x100 +-#define rPMAC_TxStart 0x104 +-#define rPMAC_TxLegacySIG 0x108 +-#define rPMAC_TxHTSIG1 0x10c +-#define rPMAC_TxHTSIG2 0x110 +-#define rPMAC_PHYDebug 0x114 +-#define rPMAC_TxPacketNum 0x118 +-#define rPMAC_TxIdle 0x11c +-#define rPMAC_TxMACHeader0 0x120 +-#define rPMAC_TxMACHeader1 0x124 +-#define rPMAC_TxMACHeader2 0x128 +-#define rPMAC_TxMACHeader3 0x12c +-#define rPMAC_TxMACHeader4 0x130 +-#define rPMAC_TxMACHeader5 0x134 +-#define rPMAC_TxDataType 0x138 +-#define rPMAC_TxRandomSeed 0x13c +-#define rPMAC_CCKPLCPPreamble 0x140 +-#define rPMAC_CCKPLCPHeader 0x144 +-#define rPMAC_CCKCRC16 0x148 +-#define rPMAC_OFDMRxCRC32OK 0x170 +-#define rPMAC_OFDMRxCRC32Er 0x174 +-#define rPMAC_OFDMRxParityEr 0x178 +-#define rPMAC_OFDMRxCRC8Er 0x17c +-#define rPMAC_CCKCRxRC16Er 0x180 +-#define rPMAC_CCKCRxRC32Er 0x184 +-#define rPMAC_CCKCRxRC32OK 0x188 +-#define rPMAC_TxStatus 0x18c +- +- +-// +-// 3. Page8(0x800) +-// +-#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? +- +-#define rFPGA0_TxInfo 0x804 // Status report?? +-#define rFPGA0_PSDFunction 0x808 +- +-#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? +- +-#define rFPGA0_RFTiming1 0x810 // Useless now +-#define rFPGA0_RFTiming2 0x814 +- +-#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register +-#define rFPGA0_XA_HSSIParameter2 0x824 +-#define rFPGA0_XB_HSSIParameter1 0x828 +-#define rFPGA0_XB_HSSIParameter2 0x82c +- +-#define rFPGA0_XA_LSSIParameter 0x840 +-#define rFPGA0_XB_LSSIParameter 0x844 +- +-#define rFPGA0_RFWakeUpParameter 0x850 // Useless now +-#define rFPGA0_RFSleepUpParameter 0x854 +- +-#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch +-#define rFPGA0_XCD_SwitchControl 0x85c +- +-#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch +-#define rFPGA0_XB_RFInterfaceOE 0x864 +- +-#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control +-#define rFPGA0_XCD_RFInterfaceSW 0x874 +- +-#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter +-#define rFPGA0_XCD_RFParameter 0x87c +- +-#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? +-#define rFPGA0_AnalogParameter2 0x884 +-#define rFPGA0_AnalogParameter3 0x888 +-#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy +-#define rFPGA0_AnalogParameter4 0x88c +- +-#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback +-#define rFPGA0_XB_LSSIReadBack 0x8a4 +-#define rFPGA0_XC_LSSIReadBack 0x8a8 +-#define rFPGA0_XD_LSSIReadBack 0x8ac +- +-#define rFPGA0_PSDReport 0x8b4 // Useless now +-#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback +-#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback +-#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value +-#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now +- +-// +-// 4. Page9(0x900) +-// +-#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? +- +-#define rFPGA1_TxBlock 0x904 // Useless now +-#define rFPGA1_DebugSelect 0x908 // Useless now +-#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? +- +-// +-// 5. PageA(0xA00) +-// +-// Set Control channel to upper or lower. These settings are required only for 40MHz +-#define rCCK0_System 0xa00 +- +-#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI +-#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain +- +-#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series +-#define rCCK0_RxAGC2 0xa10 //AGC & DAGC +- +-#define rCCK0_RxHP 0xa14 +- +-#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold +-#define rCCK0_DSPParameter2 0xa1c //SQ threshold +- +-#define rCCK0_TxFilter1 0xa20 +-#define rCCK0_TxFilter2 0xa24 +-#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 +-#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report +-#define rCCK0_TRSSIReport 0xa50 +-#define rCCK0_RxReport 0xa54 //0xa57 +-#define rCCK0_FACounterLower 0xa5c //0xa5b +-#define rCCK0_FACounterUpper 0xa58 //0xa5c +- +-// +-// PageB(0xB00) +-// +-#define rPdp_AntA 0xb00 +-#define rPdp_AntA_4 0xb04 +-#define rConfig_Pmpd_AntA 0xb28 +-#define rConfig_ram64x16 0xb2c +- +-#define rConfig_AntA 0xb68 +-#define rConfig_AntB 0xb6c +-#define rPdp_AntB 0xb70 +-#define rPdp_AntB_4 0xb74 +-#define rConfig_Pmpd_AntB 0xb98 +-#define rAPK 0xbd8 +- +- +- +-// +-// 6. PageC(0xC00) +-// +-#define rOFDM0_LSTF 0xc00 +- +-#define rOFDM0_TRxPathEnable 0xc04 +-#define rOFDM0_TRMuxPar 0xc08 +-#define rOFDM0_TRSWIsolation 0xc0c +- +-#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter +-#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix +-#define rOFDM0_XBRxAFE 0xc18 +-#define rOFDM0_XBRxIQImbalance 0xc1c +-#define rOFDM0_XCRxAFE 0xc20 +-#define rOFDM0_XCRxIQImbalance 0xc24 +-#define rOFDM0_XDRxAFE 0xc28 +-#define rOFDM0_XDRxIQImbalance 0xc2c +- +-#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain +-#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. +-#define rOFDM0_RxDetector3 0xc38 //Frame Sync. +-#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI +- +-#define rOFDM0_RxDSP 0xc40 //Rx Sync Path +-#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC +-#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold +-#define rOFDM0_ECCAThreshold 0xc4c // energy CCA +- +-#define rOFDM0_XAAGCCore1 0xc50 // DIG +-#define rOFDM0_XAAGCCore2 0xc54 +-#define rOFDM0_XBAGCCore1 0xc58 +-#define rOFDM0_XBAGCCore2 0xc5c +-#define rOFDM0_XCAGCCore1 0xc60 +-#define rOFDM0_XCAGCCore2 0xc64 +-#define rOFDM0_XDAGCCore1 0xc68 +-#define rOFDM0_XDAGCCore2 0xc6c +- +-#define rOFDM0_AGCParameter1 0xc70 +-#define rOFDM0_AGCParameter2 0xc74 +-#define rOFDM0_AGCRSSITable 0xc78 +-#define rOFDM0_HTSTFAGC 0xc7c +- +-#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG +-#define rOFDM0_XATxAFE 0xc84 +-#define rOFDM0_XBTxIQImbalance 0xc88 +-#define rOFDM0_XBTxAFE 0xc8c +-#define rOFDM0_XCTxIQImbalance 0xc90 +-#define rOFDM0_XCTxAFE 0xc94 +-#define rOFDM0_XDTxIQImbalance 0xc98 +-#define rOFDM0_XDTxAFE 0xc9c +- +-#define rOFDM0_RxIQExtAnta 0xca0 +-#define rOFDM0_TxCoeff1 0xca4 +-#define rOFDM0_TxCoeff2 0xca8 +-#define rOFDM0_TxCoeff3 0xcac +-#define rOFDM0_TxCoeff4 0xcb0 +-#define rOFDM0_TxCoeff5 0xcb4 +-#define rOFDM0_RxHPParameter 0xce0 +-#define rOFDM0_TxPseudoNoiseWgt 0xce4 +-#define rOFDM0_FrameSync 0xcf0 +-#define rOFDM0_DFSReport 0xcf4 +- +- +-// +-// 7. PageD(0xD00) +-// +-#define rOFDM1_LSTF 0xd00 +-#define rOFDM1_TRxPathEnable 0xd04 +- +-#define rOFDM1_CFO 0xd08 // No setting now +-#define rOFDM1_CSI1 0xd10 +-#define rOFDM1_SBD 0xd14 +-#define rOFDM1_CSI2 0xd18 +-#define rOFDM1_CFOTracking 0xd2c +-#define rOFDM1_TRxMesaure1 0xd34 +-#define rOFDM1_IntfDet 0xd3c +-#define rOFDM1_PseudoNoiseStateAB 0xd50 +-#define rOFDM1_PseudoNoiseStateCD 0xd54 +-#define rOFDM1_RxPseudoNoiseWgt 0xd58 +- +-#define rOFDM_PHYCounter1 0xda0 //cca, parity fail +-#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail +-#define rOFDM_PHYCounter3 0xda8 //MCS not support +- +-#define rOFDM_ShortCFOAB 0xdac // No setting now +-#define rOFDM_ShortCFOCD 0xdb0 +-#define rOFDM_LongCFOAB 0xdb4 +-#define rOFDM_LongCFOCD 0xdb8 +-#define rOFDM_TailCFOAB 0xdbc +-#define rOFDM_TailCFOCD 0xdc0 +-#define rOFDM_PWMeasure1 0xdc4 +-#define rOFDM_PWMeasure2 0xdc8 +-#define rOFDM_BWReport 0xdcc +-#define rOFDM_AGCReport 0xdd0 +-#define rOFDM_RxSNR 0xdd4 +-#define rOFDM_RxEVMCSI 0xdd8 +-#define rOFDM_SIGReport 0xddc +- +- +-// +-// 8. PageE(0xE00) +-// +-#define rTxAGC_A_Rate18_06 0xe00 +-#define rTxAGC_A_Rate54_24 0xe04 +-#define rTxAGC_A_CCK1_Mcs32 0xe08 +-#define rTxAGC_A_Mcs03_Mcs00 0xe10 +-#define rTxAGC_A_Mcs07_Mcs04 0xe14 +-#define rTxAGC_A_Mcs11_Mcs08 0xe18 +-#define rTxAGC_A_Mcs15_Mcs12 0xe1c +- +-#define rTxAGC_B_Rate18_06 0x830 +-#define rTxAGC_B_Rate54_24 0x834 +-#define rTxAGC_B_CCK1_55_Mcs32 0x838 +-#define rTxAGC_B_Mcs03_Mcs00 0x83c +-#define rTxAGC_B_Mcs07_Mcs04 0x848 +-#define rTxAGC_B_Mcs11_Mcs08 0x84c +-#define rTxAGC_B_Mcs15_Mcs12 0x868 +-#define rTxAGC_B_CCK11_A_CCK2_11 0x86c +- +-#define rFPGA0_IQK 0xe28 +-#define rTx_IQK_Tone_A 0xe30 +-#define rRx_IQK_Tone_A 0xe34 +-#define rTx_IQK_PI_A 0xe38 +-#define rRx_IQK_PI_A 0xe3c +- +-#define rTx_IQK 0xe40 +-#define rRx_IQK 0xe44 +-#define rIQK_AGC_Pts 0xe48 +-#define rIQK_AGC_Rsp 0xe4c +-#define rTx_IQK_Tone_B 0xe50 +-#define rRx_IQK_Tone_B 0xe54 +-#define rTx_IQK_PI_B 0xe58 +-#define rRx_IQK_PI_B 0xe5c +-#define rIQK_AGC_Cont 0xe60 +- +-#define rBlue_Tooth 0xe6c +-#define rRx_Wait_CCA 0xe70 +-#define rTx_CCK_RFON 0xe74 +-#define rTx_CCK_BBON 0xe78 +-#define rTx_OFDM_RFON 0xe7c +-#define rTx_OFDM_BBON 0xe80 +-#define rTx_To_Rx 0xe84 +-#define rTx_To_Tx 0xe88 +-#define rRx_CCK 0xe8c +- +-#define rTx_Power_Before_IQK_A 0xe94 +-#define rTx_Power_After_IQK_A 0xe9c +- +-#define rRx_Power_Before_IQK_A 0xea0 +-#define rRx_Power_Before_IQK_A_2 0xea4 +-#define rRx_Power_After_IQK_A 0xea8 +-#define rRx_Power_After_IQK_A_2 0xeac +- +-#define rTx_Power_Before_IQK_B 0xeb4 +-#define rTx_Power_After_IQK_B 0xebc +- +-#define rRx_Power_Before_IQK_B 0xec0 +-#define rRx_Power_Before_IQK_B_2 0xec4 +-#define rRx_Power_After_IQK_B 0xec8 +-#define rRx_Power_After_IQK_B_2 0xecc +- +-#define rRx_OFDM 0xed0 +-#define rRx_Wait_RIFS 0xed4 +-#define rRx_TO_Rx 0xed8 +-#define rStandby 0xedc +-#define rSleep 0xee0 +-#define rPMPD_ANAEN 0xeec +- +-// +-// 7. RF Register 0x00-0x2E (RF 8256) +-// RF-0222D 0x00-3F +-// +-//Zebra1 +-#define rZebra1_HSSIEnable 0x0 // Useless now +-#define rZebra1_TRxEnable1 0x1 +-#define rZebra1_TRxEnable2 0x2 +-#define rZebra1_AGC 0x4 +-#define rZebra1_ChargePump 0x5 +-#define rZebra1_Channel 0x7 // RF channel switch +- +-//#endif +-#define rZebra1_TxGain 0x8 // Useless now +-#define rZebra1_TxLPF 0x9 +-#define rZebra1_RxLPF 0xb +-#define rZebra1_RxHPFCorner 0xc +- +-//Zebra4 +-#define rGlobalCtrl 0 // Useless now +-#define rRTL8256_TxLPF 19 +-#define rRTL8256_RxLPF 11 +- +-//RTL8258 +-#define rRTL8258_TxLPF 0x11 // Useless now +-#define rRTL8258_RxLPF 0x13 +-#define rRTL8258_RSSILPF 0xa +- +-// +-// RL6052 Register definition +-// +-#define RF_AC 0x00 // +- +-#define RF_IQADJ_G1 0x01 // +-#define RF_IQADJ_G2 0x02 // +- +-#define RF_POW_TRSW 0x05 // +- +-#define RF_GAIN_RX 0x06 // +-#define RF_GAIN_TX 0x07 // +- +-#define RF_TXM_IDAC 0x08 // +-#define RF_IPA_G 0x09 // +-#define RF_TXBIAS_G 0x0A +-#define RF_TXPA_AG 0x0B +-#define RF_IPA_A 0x0C // +-#define RF_TXBIAS_A 0x0D +-#define RF_BS_PA_APSET_G9_G11 0x0E +-#define RF_BS_IQGEN 0x0F // +- +-#define RF_MODE1 0x10 // +-#define RF_MODE2 0x11 // +- +-#define RF_RX_AGC_HP 0x12 // +-#define RF_TX_AGC 0x13 // +-#define RF_BIAS 0x14 // +-#define RF_IPA 0x15 // +-#define RF_TXBIAS 0x16 +-#define RF_POW_ABILITY 0x17 // +-#define RF_CHNLBW 0x18 // RF channel and BW switch +-#define RF_TOP 0x19 // +- +-#define RF_RX_G1 0x1A // +-#define RF_RX_G2 0x1B // +- +-#define RF_RX_BB2 0x1C // +-#define RF_RX_BB1 0x1D // +- +-#define RF_RCK1 0x1E // +-#define RF_RCK2 0x1F // +- +-#define RF_TX_G1 0x20 // +-#define RF_TX_G2 0x21 // +-#define RF_TX_G3 0x22 // +- +-#define RF_TX_BB1 0x23 // +- +-#define RF_T_METER_8192E 0x42 // +-#define RF_T_METER_88E 0x42 // +-#define RF_T_METER 0x24 // +- +-//#endif +- +-#define RF_SYN_G1 0x25 // RF TX Power control +-#define RF_SYN_G2 0x26 // RF TX Power control +-#define RF_SYN_G3 0x27 // RF TX Power control +-#define RF_SYN_G4 0x28 // RF TX Power control +-#define RF_SYN_G5 0x29 // RF TX Power control +-#define RF_SYN_G6 0x2A // RF TX Power control +-#define RF_SYN_G7 0x2B // RF TX Power control +-#define RF_SYN_G8 0x2C // RF TX Power control +- +-#define RF_RCK_OS 0x30 // RF TX PA control +-#define RF_TXPA_G1 0x31 // RF TX PA control +-#define RF_TXPA_G2 0x32 // RF TX PA control +-#define RF_TXPA_G3 0x33 // RF TX PA control +-#define RF_TX_BIAS_A 0x35 +-#define RF_TX_BIAS_D 0x36 +-#define RF_LOBF_9 0x38 +-#define RF_RXRF_A3 0x3C // +-#define RF_TRSW 0x3F +- +-#define RF_TXRF_A2 0x41 +-#define RF_TXPA_G4 0x46 +-#define RF_TXPA_A4 0x4B +-#define RF_0x52 0x52 +-#define RF_LDO 0xB1 +-#define RF_WE_LUT 0xEF +- +- +-// +-//Bit Mask +-// +-// 1. Page1(0x100) +-#define bBBResetB 0x100 // Useless now? +-#define bGlobalResetB 0x200 +-#define bOFDMTxStart 0x4 +-#define bCCKTxStart 0x8 +-#define bCRC32Debug 0x100 +-#define bPMACLoopback 0x10 +-#define bTxLSIG 0xffffff +-#define bOFDMTxRate 0xf +-#define bOFDMTxReserved 0x10 +-#define bOFDMTxLength 0x1ffe0 +-#define bOFDMTxParity 0x20000 +-#define bTxHTSIG1 0xffffff +-#define bTxHTMCSRate 0x7f +-#define bTxHTBW 0x80 +-#define bTxHTLength 0xffff00 +-#define bTxHTSIG2 0xffffff +-#define bTxHTSmoothing 0x1 +-#define bTxHTSounding 0x2 +-#define bTxHTReserved 0x4 +-#define bTxHTAggreation 0x8 +-#define bTxHTSTBC 0x30 +-#define bTxHTAdvanceCoding 0x40 +-#define bTxHTShortGI 0x80 +-#define bTxHTNumberHT_LTF 0x300 +-#define bTxHTCRC8 0x3fc00 +-#define bCounterReset 0x10000 +-#define bNumOfOFDMTx 0xffff +-#define bNumOfCCKTx 0xffff0000 +-#define bTxIdleInterval 0xffff +-#define bOFDMService 0xffff0000 +-#define bTxMACHeader 0xffffffff +-#define bTxDataInit 0xff +-#define bTxHTMode 0x100 +-#define bTxDataType 0x30000 +-#define bTxRandomSeed 0xffffffff +-#define bCCKTxPreamble 0x1 +-#define bCCKTxSFD 0xffff0000 +-#define bCCKTxSIG 0xff +-#define bCCKTxService 0xff00 +-#define bCCKLengthExt 0x8000 +-#define bCCKTxLength 0xffff0000 +-#define bCCKTxCRC16 0xffff +-#define bCCKTxStatus 0x1 +-#define bOFDMTxStatus 0x2 +- +-#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) +- +-// 2. Page8(0x800) +-#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD +-#define bJapanMode 0x2 +-#define bCCKTxSC 0x30 +-#define bCCKEn 0x1000000 +-#define bOFDMEn 0x2000000 +- +-#define bOFDMRxADCPhase 0x10000 // Useless now +-#define bOFDMTxDACPhase 0x40000 +-#define bXATxAGC 0x3f +- +-#define bAntennaSelect 0x0300 +- +-#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage +-#define bXCTxAGC 0xf000 +-#define bXDTxAGC 0xf0000 +- +-#define bPAStart 0xf0000000 // Useless now +-#define bTRStart 0x00f00000 +-#define bRFStart 0x0000f000 +-#define bBBStart 0x000000f0 +-#define bBBCCKStart 0x0000000f +-#define bPAEnd 0xf //Reg0x814 +-#define bTREnd 0x0f000000 +-#define bRFEnd 0x000f0000 +-#define bCCAMask 0x000000f0 //T2R +-#define bR2RCCAMask 0x00000f00 +-#define bHSSI_R2TDelay 0xf8000000 +-#define bHSSI_T2RDelay 0xf80000 +-#define bContTxHSSI 0x400 //chane gain at continue Tx +-#define bIGFromCCK 0x200 +-#define bAGCAddress 0x3f +-#define bRxHPTx 0x7000 +-#define bRxHPT2R 0x38000 +-#define bRxHPCCKIni 0xc0000 +-#define bAGCTxCode 0xc00000 +-#define bAGCRxCode 0x300000 +- +-#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 +-#define b3WireAddressLength 0x400 +- +-#define b3WireRFPowerDown 0x1 // Useless now +-//#define bHWSISelect 0x8 +-#define b5GPAPEPolarity 0x40000000 +-#define b2GPAPEPolarity 0x80000000 +-#define bRFSW_TxDefaultAnt 0x3 +-#define bRFSW_TxOptionAnt 0x30 +-#define bRFSW_RxDefaultAnt 0x300 +-#define bRFSW_RxOptionAnt 0x3000 +-#define bRFSI_3WireData 0x1 +-#define bRFSI_3WireClock 0x2 +-#define bRFSI_3WireLoad 0x4 +-#define bRFSI_3WireRW 0x8 +-#define bRFSI_3Wire 0xf +- +-#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW +- +-#define bRFSI_TRSW 0x20 // Useless now +-#define bRFSI_TRSWB 0x40 +-#define bRFSI_ANTSW 0x100 +-#define bRFSI_ANTSWB 0x200 +-#define bRFSI_PAPE 0x400 +-#define bRFSI_PAPE5G 0x800 +-#define bBandSelect 0x1 +-#define bHTSIG2_GI 0x80 +-#define bHTSIG2_Smoothing 0x01 +-#define bHTSIG2_Sounding 0x02 +-#define bHTSIG2_Aggreaton 0x08 +-#define bHTSIG2_STBC 0x30 +-#define bHTSIG2_AdvCoding 0x40 +-#define bHTSIG2_NumOfHTLTF 0x300 +-#define bHTSIG2_CRC8 0x3fc +-#define bHTSIG1_MCS 0x7f +-#define bHTSIG1_BandWidth 0x80 +-#define bHTSIG1_HTLength 0xffff +-#define bLSIG_Rate 0xf +-#define bLSIG_Reserved 0x10 +-#define bLSIG_Length 0x1fffe +-#define bLSIG_Parity 0x20 +-#define bCCKRxPhase 0x4 +- +-#define bLSSIReadAddress 0x7f800000 // T65 RF +- +-#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal +- +-#define bLSSIReadBackData 0xfffff // T65 RF +- +-#define bLSSIReadOKFlag 0x1000 // Useless now +-#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz +-#define bRegulator0Standby 0x1 +-#define bRegulatorPLLStandby 0x2 +-#define bRegulator1Standby 0x4 +-#define bPLLPowerUp 0x8 +-#define bDPLLPowerUp 0x10 +-#define bDA10PowerUp 0x20 +-#define bAD7PowerUp 0x200 +-#define bDA6PowerUp 0x2000 +-#define bXtalPowerUp 0x4000 +-#define b40MDClkPowerUP 0x8000 +-#define bDA6DebugMode 0x20000 +-#define bDA6Swing 0x380000 +- +-#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ +- +-#define b80MClkDelay 0x18000000 // Useless +-#define bAFEWatchDogEnable 0x20000000 +- +-#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap +-#define bXtalCap23 0x3 +-#define bXtalCap92x 0x0f000000 +-#define bXtalCap 0x0f000000 +- +-#define bIntDifClkEnable 0x400 // Useless +-#define bExtSigClkEnable 0x800 +-#define bBandgapMbiasPowerUp 0x10000 +-#define bAD11SHGain 0xc0000 +-#define bAD11InputRange 0x700000 +-#define bAD11OPCurrent 0x3800000 +-#define bIPathLoopback 0x4000000 +-#define bQPathLoopback 0x8000000 +-#define bAFELoopback 0x10000000 +-#define bDA10Swing 0x7e0 +-#define bDA10Reverse 0x800 +-#define bDAClkSource 0x1000 +-#define bAD7InputRange 0x6000 +-#define bAD7Gain 0x38000 +-#define bAD7OutputCMMode 0x40000 +-#define bAD7InputCMMode 0x380000 +-#define bAD7Current 0xc00000 +-#define bRegulatorAdjust 0x7000000 +-#define bAD11PowerUpAtTx 0x1 +-#define bDA10PSAtTx 0x10 +-#define bAD11PowerUpAtRx 0x100 +-#define bDA10PSAtRx 0x1000 +-#define bCCKRxAGCFormat 0x200 +-#define bPSDFFTSamplepPoint 0xc000 +-#define bPSDAverageNum 0x3000 +-#define bIQPathControl 0xc00 +-#define bPSDFreq 0x3ff +-#define bPSDAntennaPath 0x30 +-#define bPSDIQSwitch 0x40 +-#define bPSDRxTrigger 0x400000 +-#define bPSDTxTrigger 0x80000000 +-#define bPSDSineToneScale 0x7f000000 +-#define bPSDReport 0xffff +- +-// 3. Page9(0x900) +-#define bOFDMTxSC 0x30000000 // Useless +-#define bCCKTxOn 0x1 +-#define bOFDMTxOn 0x2 +-#define bDebugPage 0xfff //reset debug page and also HWord, LWord +-#define bDebugItem 0xff //reset debug page and LWord +-#define bAntL 0x10 +-#define bAntNonHT 0x100 +-#define bAntHT1 0x1000 +-#define bAntHT2 0x10000 +-#define bAntHT1S1 0x100000 +-#define bAntNonHTS1 0x1000000 +- +-// 4. PageA(0xA00) +-#define bCCKBBMode 0x3 // Useless +-#define bCCKTxPowerSaving 0x80 +-#define bCCKRxPowerSaving 0x40 +- +-#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch +- +-#define bCCKScramble 0x8 // Useless +-#define bCCKAntDiversity 0x8000 +-#define bCCKCarrierRecovery 0x4000 +-#define bCCKTxRate 0x3000 +-#define bCCKDCCancel 0x0800 +-#define bCCKISICancel 0x0400 +-#define bCCKMatchFilter 0x0200 +-#define bCCKEqualizer 0x0100 +-#define bCCKPreambleDetect 0x800000 +-#define bCCKFastFalseCCA 0x400000 +-#define bCCKChEstStart 0x300000 +-#define bCCKCCACount 0x080000 +-#define bCCKcs_lim 0x070000 +-#define bCCKBistMode 0x80000000 +-#define bCCKCCAMask 0x40000000 +-#define bCCKTxDACPhase 0x4 +-#define bCCKRxADCPhase 0x20000000 //r_rx_clk +-#define bCCKr_cp_mode0 0x0100 +-#define bCCKTxDCOffset 0xf0 +-#define bCCKRxDCOffset 0xf +-#define bCCKCCAMode 0xc000 +-#define bCCKFalseCS_lim 0x3f00 +-#define bCCKCS_ratio 0xc00000 +-#define bCCKCorgBit_sel 0x300000 +-#define bCCKPD_lim 0x0f0000 +-#define bCCKNewCCA 0x80000000 +-#define bCCKRxHPofIG 0x8000 +-#define bCCKRxIG 0x7f00 +-#define bCCKLNAPolarity 0x800000 +-#define bCCKRx1stGain 0x7f0000 +-#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity +-#define bCCKRxAGCSatLevel 0x1f000000 +-#define bCCKRxAGCSatCount 0xe0 +-#define bCCKRxRFSettle 0x1f //AGCsamp_dly +-#define bCCKFixedRxAGC 0x8000 +-//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 +-#define bCCKAntennaPolarity 0x2000 +-#define bCCKTxFilterType 0x0c00 +-#define bCCKRxAGCReportType 0x0300 +-#define bCCKRxDAGCEn 0x80000000 +-#define bCCKRxDAGCPeriod 0x20000000 +-#define bCCKRxDAGCSatLevel 0x1f000000 +-#define bCCKTimingRecovery 0x800000 +-#define bCCKTxC0 0x3f0000 +-#define bCCKTxC1 0x3f000000 +-#define bCCKTxC2 0x3f +-#define bCCKTxC3 0x3f00 +-#define bCCKTxC4 0x3f0000 +-#define bCCKTxC5 0x3f000000 +-#define bCCKTxC6 0x3f +-#define bCCKTxC7 0x3f00 +-#define bCCKDebugPort 0xff0000 +-#define bCCKDACDebug 0x0f000000 +-#define bCCKFalseAlarmEnable 0x8000 +-#define bCCKFalseAlarmRead 0x4000 +-#define bCCKTRSSI 0x7f +-#define bCCKRxAGCReport 0xfe +-#define bCCKRxReport_AntSel 0x80000000 +-#define bCCKRxReport_MFOff 0x40000000 +-#define bCCKRxRxReport_SQLoss 0x20000000 +-#define bCCKRxReport_Pktloss 0x10000000 +-#define bCCKRxReport_Lockedbit 0x08000000 +-#define bCCKRxReport_RateError 0x04000000 +-#define bCCKRxReport_RxRate 0x03000000 +-#define bCCKRxFACounterLower 0xff +-#define bCCKRxFACounterUpper 0xff000000 +-#define bCCKRxHPAGCStart 0xe000 +-#define bCCKRxHPAGCFinal 0x1c00 +-#define bCCKRxFalseAlarmEnable 0x8000 +-#define bCCKFACounterFreeze 0x4000 +-#define bCCKTxPathSel 0x10000000 +-#define bCCKDefaultRxPath 0xc000000 +-#define bCCKOptionRxPath 0x3000000 +- +-// 5. PageC(0xC00) +-#define bNumOfSTF 0x3 // Useless +-#define bShift_L 0xc0 +-#define bGI_TH 0xc +-#define bRxPathA 0x1 +-#define bRxPathB 0x2 +-#define bRxPathC 0x4 +-#define bRxPathD 0x8 +-#define bTxPathA 0x1 +-#define bTxPathB 0x2 +-#define bTxPathC 0x4 +-#define bTxPathD 0x8 +-#define bTRSSIFreq 0x200 +-#define bADCBackoff 0x3000 +-#define bDFIRBackoff 0xc000 +-#define bTRSSILatchPhase 0x10000 +-#define bRxIDCOffset 0xff +-#define bRxQDCOffset 0xff00 +-#define bRxDFIRMode 0x1800000 +-#define bRxDCNFType 0xe000000 +-#define bRXIQImb_A 0x3ff +-#define bRXIQImb_B 0xfc00 +-#define bRXIQImb_C 0x3f0000 +-#define bRXIQImb_D 0xffc00000 +-#define bDC_dc_Notch 0x60000 +-#define bRxNBINotch 0x1f000000 +-#define bPD_TH 0xf +-#define bPD_TH_Opt2 0xc000 +-#define bPWED_TH 0x700 +-#define bIfMF_Win_L 0x800 +-#define bPD_Option 0x1000 +-#define bMF_Win_L 0xe000 +-#define bBW_Search_L 0x30000 +-#define bwin_enh_L 0xc0000 +-#define bBW_TH 0x700000 +-#define bED_TH2 0x3800000 +-#define bBW_option 0x4000000 +-#define bRatio_TH 0x18000000 +-#define bWindow_L 0xe0000000 +-#define bSBD_Option 0x1 +-#define bFrame_TH 0x1c +-#define bFS_Option 0x60 +-#define bDC_Slope_check 0x80 +-#define bFGuard_Counter_DC_L 0xe00 +-#define bFrame_Weight_Short 0x7000 +-#define bSub_Tune 0xe00000 +-#define bFrame_DC_Length 0xe000000 +-#define bSBD_start_offset 0x30000000 +-#define bFrame_TH_2 0x7 +-#define bFrame_GI2_TH 0x38 +-#define bGI2_Sync_en 0x40 +-#define bSarch_Short_Early 0x300 +-#define bSarch_Short_Late 0xc00 +-#define bSarch_GI2_Late 0x70000 +-#define bCFOAntSum 0x1 +-#define bCFOAcc 0x2 +-#define bCFOStartOffset 0xc +-#define bCFOLookBack 0x70 +-#define bCFOSumWeight 0x80 +-#define bDAGCEnable 0x10000 +-#define bTXIQImb_A 0x3ff +-#define bTXIQImb_B 0xfc00 +-#define bTXIQImb_C 0x3f0000 +-#define bTXIQImb_D 0xffc00000 +-#define bTxIDCOffset 0xff +-#define bTxQDCOffset 0xff00 +-#define bTxDFIRMode 0x10000 +-#define bTxPesudoNoiseOn 0x4000000 +-#define bTxPesudoNoise_A 0xff +-#define bTxPesudoNoise_B 0xff00 +-#define bTxPesudoNoise_C 0xff0000 +-#define bTxPesudoNoise_D 0xff000000 +-#define bCCADropOption 0x20000 +-#define bCCADropThres 0xfff00000 +-#define bEDCCA_H 0xf +-#define bEDCCA_L 0xf0 +-#define bLambda_ED 0x300 +-#define bRxInitialGain 0x7f +-#define bRxAntDivEn 0x80 +-#define bRxAGCAddressForLNA 0x7f00 +-#define bRxHighPowerFlow 0x8000 +-#define bRxAGCFreezeThres 0xc0000 +-#define bRxFreezeStep_AGC1 0x300000 +-#define bRxFreezeStep_AGC2 0xc00000 +-#define bRxFreezeStep_AGC3 0x3000000 +-#define bRxFreezeStep_AGC0 0xc000000 +-#define bRxRssi_Cmp_En 0x10000000 +-#define bRxQuickAGCEn 0x20000000 +-#define bRxAGCFreezeThresMode 0x40000000 +-#define bRxOverFlowCheckType 0x80000000 +-#define bRxAGCShift 0x7f +-#define bTRSW_Tri_Only 0x80 +-#define bPowerThres 0x300 +-#define bRxAGCEn 0x1 +-#define bRxAGCTogetherEn 0x2 +-#define bRxAGCMin 0x4 +-#define bRxHP_Ini 0x7 +-#define bRxHP_TRLNA 0x70 +-#define bRxHP_RSSI 0x700 +-#define bRxHP_BBP1 0x7000 +-#define bRxHP_BBP2 0x70000 +-#define bRxHP_BBP3 0x700000 +-#define bRSSI_H 0x7f0000 //the threshold for high power +-#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity +-#define bRxSettle_TRSW 0x7 +-#define bRxSettle_LNA 0x38 +-#define bRxSettle_RSSI 0x1c0 +-#define bRxSettle_BBP 0xe00 +-#define bRxSettle_RxHP 0x7000 +-#define bRxSettle_AntSW_RSSI 0x38000 +-#define bRxSettle_AntSW 0xc0000 +-#define bRxProcessTime_DAGC 0x300000 +-#define bRxSettle_HSSI 0x400000 +-#define bRxProcessTime_BBPPW 0x800000 +-#define bRxAntennaPowerShift 0x3000000 +-#define bRSSITableSelect 0xc000000 +-#define bRxHP_Final 0x7000000 +-#define bRxHTSettle_BBP 0x7 +-#define bRxHTSettle_HSSI 0x8 +-#define bRxHTSettle_RxHP 0x70 +-#define bRxHTSettle_BBPPW 0x80 +-#define bRxHTSettle_Idle 0x300 +-#define bRxHTSettle_Reserved 0x1c00 +-#define bRxHTRxHPEn 0x8000 +-#define bRxHTAGCFreezeThres 0x30000 +-#define bRxHTAGCTogetherEn 0x40000 +-#define bRxHTAGCMin 0x80000 +-#define bRxHTAGCEn 0x100000 +-#define bRxHTDAGCEn 0x200000 +-#define bRxHTRxHP_BBP 0x1c00000 +-#define bRxHTRxHP_Final 0xe0000000 +-#define bRxPWRatioTH 0x3 +-#define bRxPWRatioEn 0x4 +-#define bRxMFHold 0x3800 +-#define bRxPD_Delay_TH1 0x38 +-#define bRxPD_Delay_TH2 0x1c0 +-#define bRxPD_DC_COUNT_MAX 0x600 +-//#define bRxMF_Hold 0x3800 +-#define bRxPD_Delay_TH 0x8000 +-#define bRxProcess_Delay 0xf0000 +-#define bRxSearchrange_GI2_Early 0x700000 +-#define bRxFrame_Guard_Counter_L 0x3800000 +-#define bRxSGI_Guard_L 0xc000000 +-#define bRxSGI_Search_L 0x30000000 +-#define bRxSGI_TH 0xc0000000 +-#define bDFSCnt0 0xff +-#define bDFSCnt1 0xff00 +-#define bDFSFlag 0xf0000 +-#define bMFWeightSum 0x300000 +-#define bMinIdxTH 0x7f000000 +-#define bDAFormat 0x40000 +-#define bTxChEmuEnable 0x01000000 +-#define bTRSWIsolation_A 0x7f +-#define bTRSWIsolation_B 0x7f00 +-#define bTRSWIsolation_C 0x7f0000 +-#define bTRSWIsolation_D 0x7f000000 +-#define bExtLNAGain 0x7c00 +- +-// 6. PageE(0xE00) +-#define bSTBCEn 0x4 // Useless +-#define bAntennaMapping 0x10 +-#define bNss 0x20 +-#define bCFOAntSumD 0x200 +-#define bPHYCounterReset 0x8000000 +-#define bCFOReportGet 0x4000000 +-#define bOFDMContinueTx 0x10000000 +-#define bOFDMSingleCarrier 0x20000000 +-#define bOFDMSingleTone 0x40000000 +-//#define bRxPath1 0x01 +-//#define bRxPath2 0x02 +-//#define bRxPath3 0x04 +-//#define bRxPath4 0x08 +-//#define bTxPath1 0x10 +-//#define bTxPath2 0x20 +-#define bHTDetect 0x100 +-#define bCFOEn 0x10000 +-#define bCFOValue 0xfff00000 +-#define bSigTone_Re 0x3f +-#define bSigTone_Im 0x7f00 +-#define bCounter_CCA 0xffff +-#define bCounter_ParityFail 0xffff0000 +-#define bCounter_RateIllegal 0xffff +-#define bCounter_CRC8Fail 0xffff0000 +-#define bCounter_MCSNoSupport 0xffff +-#define bCounter_FastSync 0xffff +-#define bShortCFO 0xfff +-#define bShortCFOTLength 12 //total +-#define bShortCFOFLength 11 //fraction +-#define bLongCFO 0x7ff +-#define bLongCFOTLength 11 +-#define bLongCFOFLength 11 +-#define bTailCFO 0x1fff +-#define bTailCFOTLength 13 +-#define bTailCFOFLength 12 +-#define bmax_en_pwdB 0xffff +-#define bCC_power_dB 0xffff0000 +-#define bnoise_pwdB 0xffff +-#define bPowerMeasTLength 10 +-#define bPowerMeasFLength 3 +-#define bRx_HT_BW 0x1 +-#define bRxSC 0x6 +-#define bRx_HT 0x8 +-#define bNB_intf_det_on 0x1 +-#define bIntf_win_len_cfg 0x30 +-#define bNB_Intf_TH_cfg 0x1c0 +-#define bRFGain 0x3f +-#define bTableSel 0x40 +-#define bTRSW 0x80 +-#define bRxSNR_A 0xff +-#define bRxSNR_B 0xff00 +-#define bRxSNR_C 0xff0000 +-#define bRxSNR_D 0xff000000 +-#define bSNREVMTLength 8 +-#define bSNREVMFLength 1 +-#define bCSI1st 0xff +-#define bCSI2nd 0xff00 +-#define bRxEVM1st 0xff0000 +-#define bRxEVM2nd 0xff000000 +-#define bSIGEVM 0xff +-#define bPWDB 0xff00 +-#define bSGIEN 0x10000 +- +-#define bSFactorQAM1 0xf // Useless +-#define bSFactorQAM2 0xf0 +-#define bSFactorQAM3 0xf00 +-#define bSFactorQAM4 0xf000 +-#define bSFactorQAM5 0xf0000 +-#define bSFactorQAM6 0xf0000 +-#define bSFactorQAM7 0xf00000 +-#define bSFactorQAM8 0xf000000 +-#define bSFactorQAM9 0xf0000000 +-#define bCSIScheme 0x100000 +- +-#define bNoiseLvlTopSet 0x3 // Useless +-#define bChSmooth 0x4 +-#define bChSmoothCfg1 0x38 +-#define bChSmoothCfg2 0x1c0 +-#define bChSmoothCfg3 0xe00 +-#define bChSmoothCfg4 0x7000 +-#define bMRCMode 0x800000 +-#define bTHEVMCfg 0x7000000 +- +-#define bLoopFitType 0x1 // Useless +-#define bUpdCFO 0x40 +-#define bUpdCFOOffData 0x80 +-#define bAdvUpdCFO 0x100 +-#define bAdvTimeCtrl 0x800 +-#define bUpdClko 0x1000 +-#define bFC 0x6000 +-#define bTrackingMode 0x8000 +-#define bPhCmpEnable 0x10000 +-#define bUpdClkoLTF 0x20000 +-#define bComChCFO 0x40000 +-#define bCSIEstiMode 0x80000 +-#define bAdvUpdEqz 0x100000 +-#define bUChCfg 0x7000000 +-#define bUpdEqz 0x8000000 +- +-//Rx Pseduo noise +-#define bRxPesudoNoiseOn 0x20000000 // Useless +-#define bRxPesudoNoise_A 0xff +-#define bRxPesudoNoise_B 0xff00 +-#define bRxPesudoNoise_C 0xff0000 +-#define bRxPesudoNoise_D 0xff000000 +-#define bPesudoNoiseState_A 0xffff +-#define bPesudoNoiseState_B 0xffff0000 +-#define bPesudoNoiseState_C 0xffff +-#define bPesudoNoiseState_D 0xffff0000 +- +-//7. RF Register +-//Zebra1 +-#define bZebra1_HSSIEnable 0x8 // Useless +-#define bZebra1_TRxControl 0xc00 +-#define bZebra1_TRxGainSetting 0x07f +-#define bZebra1_RxCorner 0xc00 +-#define bZebra1_TxChargePump 0x38 +-#define bZebra1_RxChargePump 0x7 +-#define bZebra1_ChannelNum 0xf80 +-#define bZebra1_TxLPFBW 0x400 +-#define bZebra1_RxLPFBW 0x600 +- +-//Zebra4 +-#define bRTL8256RegModeCtrl1 0x100 // Useless +-#define bRTL8256RegModeCtrl0 0x40 +-#define bRTL8256_TxLPFBW 0x18 +-#define bRTL8256_RxLPFBW 0x600 +- +-//RTL8258 +-#define bRTL8258_TxLPFBW 0xc // Useless +-#define bRTL8258_RxLPFBW 0xc00 +-#define bRTL8258_RSSILPFBW 0xc0 +- +- +-// +-// Other Definition +-// +- +-//byte endable for sb_write +-#define bByte0 0x1 // Useless +-#define bByte1 0x2 +-#define bByte2 0x4 +-#define bByte3 0x8 +-#define bWord0 0x3 +-#define bWord1 0xc +-#define bDWord 0xf +- +-//for PutRegsetting & GetRegSetting BitMask +-#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f +-#define bMaskByte1 0xff00 +-#define bMaskByte2 0xff0000 +-#define bMaskByte3 0xff000000 +-#define bMaskHWord 0xffff0000 +-#define bMaskLWord 0x0000ffff +-#define bMaskDWord 0xffffffff +-#define bMaskH3Bytes 0xffffff00 +-#define bMask12Bits 0xfff +-#define bMaskH4Bits 0xf0000000 +-#define bMaskOFDM_D 0xffc00000 +-#define bMaskCCK 0x3f3f3f3f +- +-//for PutRFRegsetting & GetRFRegSetting BitMask +-//#define bMask12Bits 0xfffff // RF Reg mask bits +-//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF +-#define bRFRegOffsetMask 0xfffff +- +-#define bEnable 0x1 // Useless +-#define bDisable 0x0 +- +-#define LeftAntenna 0x0 // Useless +-#define RightAntenna 0x1 +- +-#define tCheckTxStatus 500 //500ms // Useless +-#define tUpdateRxCounter 100 //100ms +- +-#define rateCCK 0 // Useless +-#define rateOFDM 1 +-#define rateHT 2 +- +-//define Register-End +-#define bPMAC_End 0x1ff // Useless +-#define bFPGAPHY0_End 0x8ff +-#define bFPGAPHY1_End 0x9ff +-#define bCCKPHY0_End 0xaff +-#define bOFDMPHY0_End 0xcff +-#define bOFDMPHY1_End 0xdff +- +-//define max debug item in each debug page +-//#define bMaxItem_FPGA_PHY0 0x9 +-//#define bMaxItem_FPGA_PHY1 0x3 +-//#define bMaxItem_PHY_11B 0x16 +-//#define bMaxItem_OFDM_PHY0 0x29 +-//#define bMaxItem_OFDM_PHY1 0x0 +- +-#define bPMACControl 0x0 // Useless +-#define bWMACControl 0x1 +-#define bWNICControl 0x2 +- +-#define PathA 0x0 // Useless +-#define PathB 0x1 +-#define PathC 0x2 +-#define PathD 0x3 +- +- +-// RSSI Dump Message +-#define rA_RSSIDump_92E 0xcb0 +-#define rB_RSSIDump_92E 0xcb1 +-#define rS1_RXevmDump_92E 0xcb2 +-#define rS2_RXevmDump_92E 0xcb3 +-#define rA_RXsnrDump_92E 0xcb4 +-#define rB_RXsnrDump_92E 0xcb5 +-#define rA_CfoShortDump_92E 0xcb6 +-#define rB_CfoShortDump_92E 0xcb8 +-#define rA_CfoLongDump_92E 0xcba +-#define rB_CfoLongDump_92E 0xcbc +- +-/*--------------------------Define Parameters-------------------------------*/ +- +- +-#endif //__INC_HAL8188EPHYREG_H +- ++/***************************************************************************** ++ * Copyright(c) 2008, RealTEK Technology Inc. All Right Reserved. ++ * ++ * Module: __INC_HAL8192SPHYREG_H ++ * ++ * ++ * Note: 1. Define PMAC/BB register map ++ * 2. Define RF register map ++ * 3. PMAC/BB register bit mask. ++ * 4. RF reg bit mask. ++ * 5. Other BB/RF relative definition. ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * 09/25/2008 MH 1. Add RL6052 register definition ++ * ++ *****************************************************************************/ ++#ifndef __INC_HAL8192EPHYREG_H ++#define __INC_HAL8192EPHYREG_H ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++//============================================================ ++// 8192S Regsiter offset definition ++//============================================================ ++ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 ++#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_ram64x16 0xb2c ++ ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rConfig_Pmpd_AntB 0xb98 ++#define rAPK 0xbd8 ++ ++ ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++ ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_TXBIAS 0x16 ++#define RF_POW_ABILITY 0x17 // ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER_8192E 0x42 // ++#define RF_T_METER_88E 0x42 // ++#define RF_T_METER 0x24 // ++ ++//#endif ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_TX_BIAS_A 0x35 ++#define RF_TX_BIAS_D 0x36 ++#define RF_LOBF_9 0x38 ++#define RF_RXRF_A3 0x3C // ++#define RF_TRSW 0x3F ++ ++#define RF_TXRF_A2 0x41 ++#define RF_TXPA_G4 0x46 ++#define RF_TXPA_A4 0x4B ++#define RF_0x52 0x52 ++#define RF_LDO 0xB1 ++#define RF_WE_LUT 0xEF ++ ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++#define RF_TX_GAIN_OFFSET_8192E(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) ++ ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++//for PutRFRegsetting & GetRFRegSetting BitMask ++//#define bMask12Bits 0xfffff // RF Reg mask bits ++//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF ++#define bRFRegOffsetMask 0xfffff ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++ ++// RSSI Dump Message ++#define rA_RSSIDump_92E 0xcb0 ++#define rB_RSSIDump_92E 0xcb1 ++#define rS1_RXevmDump_92E 0xcb2 ++#define rS2_RXevmDump_92E 0xcb3 ++#define rA_RXsnrDump_92E 0xcb4 ++#define rB_RXsnrDump_92E 0xcb5 ++#define rA_CfoShortDump_92E 0xcb6 ++#define rB_CfoShortDump_92E 0xcb8 ++#define rA_CfoLongDump_92E 0xcba ++#define rB_CfoLongDump_92E 0xcbc ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif //__INC_HAL8188EPHYREG_H ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPwrSeq.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPwrSeq.h +old mode 100755 +new mode 100644 +index 7acc0d1..dfad445 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPwrSeq.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192EPwrSeq.h +@@ -1,155 +1,155 @@ +-#ifndef REALTEK_POWER_SEQUENCE_8192E +-#define REALTEK_POWER_SEQUENCE_8192E +- +-#include "HalPwrSeqCmd.h" +-/* +- Check document WM-20110607-Paul-RTL8192E_Power_Architecture-R02.vsd +- There are 6 HW Power States: +- 0: POFF--Power Off +- 1: PDN--Power Down +- 2: CARDEMU--Card Emulation +- 3: ACT--Active Mode +- 4: LPS--Low Power State +- 5: SUS--Suspend +- +- The transision from different states are defined below +- TRANS_CARDEMU_TO_ACT +- TRANS_ACT_TO_CARDEMU +- TRANS_CARDEMU_TO_SUS +- TRANS_SUS_TO_CARDEMU +- TRANS_CARDEMU_TO_PDN +- TRANS_ACT_TO_LPS +- TRANS_LPS_TO_ACT +- +- TRANS_END +-*/ +-#define RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS 18 +-#define RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS 18 +-#define RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS 18 +-#define RTL8192E_TRANS_SUS_TO_CARDEMU_STEPS 18 +-#define RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS 18 +-#define RTL8192E_TRANS_PDN_TO_CARDEMU_STEPS 18 +-#define RTL8192E_TRANS_ACT_TO_LPS_STEPS 23 +-#define RTL8192E_TRANS_LPS_TO_ACT_STEPS 23 +-#define RTL8192E_TRANS_END_STEPS 1 +- +- +-#define RTL8192E_TRANS_CARDEMU_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ +- +- +-#define RTL8192E_TRANS_ACT_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ +- {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ +- +- +-#define RTL8192E_TRANS_CARDEMU_TO_SUS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ +- +-#define RTL8192E_TRANS_SUS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ +- +-#define RTL8192E_TRANS_CARDEMU_TO_CARDDIS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ +- {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*Unlock small LDO Register*/ \ +- {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*Disable small LDO*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ +- +-#define RTL8192E_TRANS_CARDDIS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ +- {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*Enable small LDO*/ \ +- {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*Lock small LDO Register*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ +- +- +-#define RTL8192E_TRANS_CARDEMU_TO_PDN \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ +- +-#define RTL8192E_TRANS_PDN_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ +- +-#define RTL8192E_TRANS_ACT_TO_LPS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ +- {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ +- {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ +- {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ +- +- +-#define RTL8192E_TRANS_LPS_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM, For Repeatly In and out, Taggle bit should be changed*/\ +- {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ +- {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ +- {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ +- {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/\ +- {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*Clear ISR*/ +- +-#define RTL8192E_TRANS_END \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // +- +- +-extern WLAN_PWR_CFG rtl8192E_power_on_flow[RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8192E_radio_off_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8192E_card_disable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8192E_card_enable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8192E_suspend_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8192E_resume_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8192E_hwpdn_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8192E_enter_lps_flow[RTL8192E_TRANS_ACT_TO_LPS_STEPS+RTL8192E_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8192E_leave_lps_flow[RTL8192E_TRANS_LPS_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]; +- +-#endif ++#ifndef REALTEK_POWER_SEQUENCE_8192E ++#define REALTEK_POWER_SEQUENCE_8192E ++ ++#include "HalPwrSeqCmd.h" ++/* ++ Check document WM-20110607-Paul-RTL8192E_Power_Architecture-R02.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS 18 ++#define RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS 18 ++#define RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS 18 ++#define RTL8192E_TRANS_SUS_TO_CARDEMU_STEPS 18 ++#define RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS 18 ++#define RTL8192E_TRANS_PDN_TO_CARDEMU_STEPS 18 ++#define RTL8192E_TRANS_ACT_TO_LPS_STEPS 23 ++#define RTL8192E_TRANS_LPS_TO_ACT_STEPS 23 ++#define RTL8192E_TRANS_END_STEPS 1 ++ ++ ++#define RTL8192E_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ ++ ++ ++#define RTL8192E_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ ++ ++#define RTL8192E_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8192E_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8192E_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*Unlock small LDO Register*/ \ ++ {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*Disable small LDO*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8192E_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*Enable small LDO*/ \ ++ {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*Lock small LDO Register*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ ++ ++ ++#define RTL8192E_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8192E_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8192E_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8192E_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM, For Repeatly In and out, Taggle bit should be changed*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/\ ++ {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*Clear ISR*/ ++ ++#define RTL8192E_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8192E_power_on_flow[RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_radio_off_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_card_disable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_card_enable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_suspend_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_resume_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_hwpdn_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_enter_lps_flow[RTL8192E_TRANS_ACT_TO_LPS_STEPS+RTL8192E_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8192E_leave_lps_flow[RTL8192E_TRANS_LPS_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]; ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8703BPhyCfg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8703BPhyCfg.h +new file mode 100644 +index 0000000..c05bb45 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8703BPhyCfg.h +@@ -0,0 +1,144 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8703BPHYCFG_H__ ++#define __INC_HAL8703BPHYCFG_H__ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters End-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++/*------------------------------Define structure End----------------------------*/ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++u32 ++PHY_QueryBBReg_8703B( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ); ++ ++VOID ++PHY_SetBBReg_8703B( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++u32 ++PHY_QueryRFReg_8703B( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ); ++ ++VOID ++PHY_SetRFReg_8703B( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++/* MAC/BB/RF HAL config */ ++int PHY_BBConfig8703B(PADAPTER Adapter ); ++ ++int PHY_RFConfig8703B(PADAPTER Adapter ); ++ ++s32 PHY_MACConfig8703B(PADAPTER padapter); ++ ++int ++PHY_ConfigRFWithParaFile_8703B( ++ IN PADAPTER Adapter, ++ IN u8* pFileName, ++ RF_PATH eRFPath ++); ++ ++VOID ++PHY_SetTxPowerIndex_8703B( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ); ++ ++u8 ++PHY_GetTxPowerIndex_8703B( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++VOID ++PHY_GetTxPowerLevel8703B( ++ IN PADAPTER Adapter, ++ OUT s32* powerlevel ++ ); ++ ++VOID ++PHY_SetTxPowerLevel8703B( ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetBWMode8703B( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M ++ IN unsigned char Offset // Upper, Lower, or Don't care ++); ++ ++VOID ++PHY_SwChnl8703B( // Call after initialization ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetSwChnlBWMode8703B( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++/*--------------------------Exported Function prototype End---------------------*/ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8703BPhyReg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8703BPhyReg.h +new file mode 100644 +index 0000000..4d1b714 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8703BPhyReg.h +@@ -0,0 +1,1139 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8703BPHYREG_H__ ++#define __INC_HAL8703BPHYREG_H__ ++ ++#define rSYM_WLBT_PAPE_SEL 0x64 ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++ ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 // Useless now ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++#define rDPDT_control 0x92c ++#define rfe_ctrl_anta_src 0x930 ++#define rS0S1_PathSwitch 0x948 ++#define rBBrx_DFIR 0x954 ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rPdp_AntA_8 0xb08 ++#define rPdp_AntA_C 0xb0c ++#define rPdp_AntA_10 0xb10 ++#define rPdp_AntA_14 0xb14 ++#define rPdp_AntA_18 0xb18 ++#define rPdp_AntA_1C 0xb1c ++#define rPdp_AntA_20 0xb20 ++#define rPdp_AntA_24 0xb24 ++ ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_ram64x16 0xb2c ++ ++#define rBndA 0xb30 ++#define rHssiPar 0xb34 ++ ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++ ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rPdp_AntB_8 0xb78 ++#define rPdp_AntB_C 0xb7c ++#define rPdp_AntB_10 0xb80 ++#define rPdp_AntB_14 0xb84 ++#define rPdp_AntB_18 0xb88 ++#define rPdp_AntB_1C 0xb8c ++#define rPdp_AntB_20 0xb90 ++#define rPdp_AntB_24 0xb94 ++ ++#define rConfig_Pmpd_AntB 0xb98 ++ ++#define rBndB 0xba0 ++ ++#define rAPK 0xbd8 ++#define rPm_Rx0_AntA 0xbdc ++#define rPm_Rx1_AntA 0xbe0 ++#define rPm_Rx2_AntA 0xbe4 ++#define rPm_Rx3_AntA 0xbe8 ++#define rPm_Rx0_AntB 0xbec ++#define rPm_Rx1_AntB 0xbf0 ++#define rPm_Rx2_AntB 0xbf4 ++#define rPm_Rx3_AntB 0xbf8 ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++#define RF_BS_PA_APSET_G1_G4 0x03 ++#define RF_BS_PA_APSET_G5_G8 0x04 ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_TXBIAS 0x16 // ++#define RF_POW_ABILITY 0x17 // ++#define RF_MODE_AG 0x18 // ++#define rRfChannel 0x18 // RF channel and BW switch ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER 0x24 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++ ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_TX_BIAS_A 0x35 ++#define RF_TX_BIAS_D 0x36 ++#define RF_LOBF_9 0x38 ++#define RF_RXRF_A3 0x3C // ++#define RF_TRSW 0x3F ++ ++#define RF_TXRF_A2 0x41 ++#define RF_TXPA_G4 0x46 ++#define RF_TXPA_A4 0x4B ++#define RF_0x52 0x52 ++#define RF_WE_LUT 0xEF ++#define RF_S0S1 0xB0 ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++#define RF_TX_GAIN_OFFSET_8703B(_val) (abs((_val)) | (((_val) > 0) ? BIT5 : 0)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8703BPwrSeq.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8703BPwrSeq.h +new file mode 100644 +index 0000000..35e965e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8703BPwrSeq.h +@@ -0,0 +1,184 @@ ++#ifndef REALTEK_POWER_SEQUENCE_8703B ++#define REALTEK_POWER_SEQUENCE_8703B ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WM-20140402-JackieLau-RTL8703B_Power_Architecture v09.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8703B_TRANS_CARDEMU_TO_ACT_STEPS 23 ++#define RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS 15 ++#define RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS 15 ++#define RTL8703B_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS 15 ++#define RTL8703B_TRANS_PDN_TO_CARDEMU_STEPS 15 ++#define RTL8703B_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8703B_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8703B_TRANS_END_STEPS 1 ++ ++ ++#define RTL8703B_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ ++ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ ++ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ ++ {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 , BIT3},/* enabled usb resume */ \ ++ {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 , 0},/* disable usb resume */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ ++ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ ++ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ ++ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ ++ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ ++ {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\ ++ {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ ++ ++ ++#define RTL8703B_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ ++ ++ ++#define RTL8703B_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8703B_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8703B_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8703B_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ ++ ++ ++#define RTL8703B_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8703B_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8703B_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8703B_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8703B_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8703B_power_on_flow[RTL8703B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_radio_off_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_card_disable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_card_enable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_suspend_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_resume_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_hwpdn_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_enter_lps_flow[RTL8703B_TRANS_ACT_TO_LPS_STEPS+RTL8703B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8703B_leave_lps_flow[RTL8703B_TRANS_LPS_TO_ACT_STEPS+RTL8703B_TRANS_END_STEPS]; ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPhyCfg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPhyCfg.h +old mode 100755 +new mode 100644 +index 534e1be..da47597 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPhyCfg.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPhyCfg.h +@@ -1,149 +1,149 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __INC_HAL8723BPHYCFG_H__ +-#define __INC_HAL8723BPHYCFG_H__ +- +-/*--------------------------Define Parameters-------------------------------*/ +-#define LOOP_LIMIT 5 +-#define MAX_STALL_TIME 50 //us +-#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) +-#define MAX_TXPWR_IDX_NMODE_92S 63 +-#define Reset_Cnt_Limit 3 +- +-#ifdef CONFIG_PCI_HCI +-#define MAX_AGGR_NUM 0x0B +-#else +-#define MAX_AGGR_NUM 0x07 +-#endif // CONFIG_PCI_HCI +- +- +-/*--------------------------Define Parameters End-------------------------------*/ +- +- +-/*------------------------------Define structure----------------------------*/ +- +-/*------------------------------Define structure End----------------------------*/ +- +-/*--------------------------Exported Function prototype---------------------*/ +-u32 +-PHY_QueryBBReg_8723B( +- IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask +- ); +- +-VOID +-PHY_SetBBReg_8723B( +- IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data +- ); +- +-u32 +-PHY_QueryRFReg_8723B( +- IN PADAPTER Adapter, +- IN u8 eRFPath, +- IN u32 RegAddr, +- IN u32 BitMask +- ); +- +-VOID +-PHY_SetRFReg_8723B( +- IN PADAPTER Adapter, +- IN u8 eRFPath, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data +- ); +- +-/* MAC/BB/RF HAL config */ +-int PHY_BBConfig8723B(PADAPTER Adapter ); +- +-int PHY_RFConfig8723B(PADAPTER Adapter ); +- +-s32 PHY_MACConfig8723B(PADAPTER padapter); +- +-int +-PHY_ConfigRFWithParaFile_8723B( +- IN PADAPTER Adapter, +- IN u8* pFileName, +- RF_PATH eRFPath +-); +- +-VOID +-PHY_SetTxPowerIndex_8723B( +- IN PADAPTER Adapter, +- IN u32 PowerIndex, +- IN u8 RFPath, +- IN u8 Rate +- ); +- +-u8 +-PHY_GetTxPowerIndex_8723B( +- IN PADAPTER pAdapter, +- IN u8 RFPath, +- IN u8 Rate, +- IN CHANNEL_WIDTH BandWidth, +- IN u8 Channel +- ); +- +-VOID +-PHY_GetTxPowerLevel8723B( +- IN PADAPTER Adapter, +- OUT s32* powerlevel +- ); +- +-VOID +-PHY_SetTxPowerLevel8723B( +- IN PADAPTER Adapter, +- IN u8 channel +- ); +- +-VOID +-PHY_SetBWMode8723B( +- IN PADAPTER Adapter, +- IN CHANNEL_WIDTH Bandwidth, // 20M or 40M +- IN unsigned char Offset // Upper, Lower, or Don't care +-); +- +-VOID +-PHY_SwChnl8723B( // Call after initialization +- IN PADAPTER Adapter, +- IN u8 channel +- ); +- +-VOID +-PHY_SetSwChnlBWMode8723B( +- IN PADAPTER Adapter, +- IN u8 channel, +- IN CHANNEL_WIDTH Bandwidth, +- IN u8 Offset40, +- IN u8 Offset80 +-); +- +-VOID PHY_SetRFPathSwitch_8723B( +- IN PADAPTER pAdapter, +- IN BOOLEAN bMain +- ); +-/*--------------------------Exported Function prototype End---------------------*/ +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8723BPHYCFG_H__ ++#define __INC_HAL8723BPHYCFG_H__ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters End-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++/*------------------------------Define structure End----------------------------*/ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++u32 ++PHY_QueryBBReg_8723B( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ); ++ ++VOID ++PHY_SetBBReg_8723B( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++u32 ++PHY_QueryRFReg_8723B( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ); ++ ++VOID ++PHY_SetRFReg_8723B( ++ IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ); ++ ++/* MAC/BB/RF HAL config */ ++int PHY_BBConfig8723B(PADAPTER Adapter ); ++ ++int PHY_RFConfig8723B(PADAPTER Adapter ); ++ ++s32 PHY_MACConfig8723B(PADAPTER padapter); ++ ++int ++PHY_ConfigRFWithParaFile_8723B( ++ IN PADAPTER Adapter, ++ IN u8* pFileName, ++ RF_PATH eRFPath ++); ++ ++VOID ++PHY_SetTxPowerIndex_8723B( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ); ++ ++u8 ++PHY_GetTxPowerIndex_8723B( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++VOID ++PHY_GetTxPowerLevel8723B( ++ IN PADAPTER Adapter, ++ OUT s32* powerlevel ++ ); ++ ++VOID ++PHY_SetTxPowerLevel8723B( ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetBWMode8723B( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M ++ IN unsigned char Offset // Upper, Lower, or Don't care ++); ++ ++VOID ++PHY_SwChnl8723B( // Call after initialization ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetSwChnlBWMode8723B( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++ ++VOID PHY_SetRFPathSwitch_8723B( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain ++ ); ++/*--------------------------Exported Function prototype End---------------------*/ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPhyReg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPhyReg.h +old mode 100755 +new mode 100644 +index a9b006e..a734a86 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPhyReg.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPhyReg.h +@@ -1,83 +1,1137 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __INC_HAL8723BPHYREG_H__ +-#define __INC_HAL8723BPHYREG_H__ +- +-#include +- +-// BB Register Definition +-// +-// 4. Page9(0x900) +-// +-#define rDPDT_control 0x92c +-#define rfe_ctrl_anta_src 0x930 +-#define rS0S1_PathSwitch 0x948 +-#define AGC_table_select 0xb2c +- +-// +-// PageB(0xB00) +-// +-#define rPdp_AntA 0xb00 +-#define rPdp_AntA_4 0xb04 +-#define rPdp_AntA_8 0xb08 +-#define rPdp_AntA_C 0xb0c +-#define rPdp_AntA_10 0xb10 +-#define rPdp_AntA_14 0xb14 +-#define rPdp_AntA_18 0xb18 +-#define rPdp_AntA_1C 0xb1c +-#define rPdp_AntA_20 0xb20 +-#define rPdp_AntA_24 0xb24 +- +-#define rConfig_Pmpd_AntA 0xb28 +-#define rConfig_ram64x16 0xb2c +- +-#define rBndA 0xb30 +-#define rHssiPar 0xb34 +- +-#define rConfig_AntA 0xb68 +-#define rConfig_AntB 0xb6c +- +-#define rPdp_AntB 0xb70 +-#define rPdp_AntB_4 0xb74 +-#define rPdp_AntB_8 0xb78 +-#define rPdp_AntB_C 0xb7c +-#define rPdp_AntB_10 0xb80 +-#define rPdp_AntB_14 0xb84 +-#define rPdp_AntB_18 0xb88 +-#define rPdp_AntB_1C 0xb8c +-#define rPdp_AntB_20 0xb90 +-#define rPdp_AntB_24 0xb94 +- +-#define rConfig_Pmpd_AntB 0xb98 +- +-#define rBndB 0xba0 +- +-#define rAPK 0xbd8 +-#define rPm_Rx0_AntA 0xbdc +-#define rPm_Rx1_AntA 0xbe0 +-#define rPm_Rx2_AntA 0xbe4 +-#define rPm_Rx3_AntA 0xbe8 +-#define rPm_Rx0_AntB 0xbec +-#define rPm_Rx1_AntB 0xbf0 +-#define rPm_Rx2_AntB 0xbf4 +-#define rPm_Rx3_AntB 0xbf8 +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8723BPHYREG_H__ ++#define __INC_HAL8723BPHYREG_H__ ++ ++#define rSYM_WLBT_PAPE_SEL 0x64 ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++ ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 // Useless now ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++#define rDPDT_control 0x92c ++#define rfe_ctrl_anta_src 0x930 ++#define rS0S1_PathSwitch 0x948 ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rPdp_AntA_8 0xb08 ++#define rPdp_AntA_C 0xb0c ++#define rPdp_AntA_10 0xb10 ++#define rPdp_AntA_14 0xb14 ++#define rPdp_AntA_18 0xb18 ++#define rPdp_AntA_1C 0xb1c ++#define rPdp_AntA_20 0xb20 ++#define rPdp_AntA_24 0xb24 ++ ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_ram64x16 0xb2c ++ ++#define rBndA 0xb30 ++#define rHssiPar 0xb34 ++ ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++ ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rPdp_AntB_8 0xb78 ++#define rPdp_AntB_C 0xb7c ++#define rPdp_AntB_10 0xb80 ++#define rPdp_AntB_14 0xb84 ++#define rPdp_AntB_18 0xb88 ++#define rPdp_AntB_1C 0xb8c ++#define rPdp_AntB_20 0xb90 ++#define rPdp_AntB_24 0xb94 ++ ++#define rConfig_Pmpd_AntB 0xb98 ++ ++#define rBndB 0xba0 ++ ++#define rAPK 0xbd8 ++#define rPm_Rx0_AntA 0xbdc ++#define rPm_Rx1_AntA 0xbe0 ++#define rPm_Rx2_AntA 0xbe4 ++#define rPm_Rx3_AntA 0xbe8 ++#define rPm_Rx0_AntB 0xbec ++#define rPm_Rx1_AntB 0xbf0 ++#define rPm_Rx2_AntB 0xbf4 ++#define rPm_Rx3_AntB 0xbf8 ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++#define RF_BS_PA_APSET_G1_G4 0x03 ++#define RF_BS_PA_APSET_G5_G8 0x04 ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_TXBIAS 0x16 // ++#define RF_POW_ABILITY 0x17 // ++#define RF_MODE_AG 0x18 // ++#define rRfChannel 0x18 // RF channel and BW switch ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER 0x24 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++ ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_TX_BIAS_A 0x35 ++#define RF_TX_BIAS_D 0x36 ++#define RF_LOBF_9 0x38 ++#define RF_RXRF_A3 0x3C // ++#define RF_TRSW 0x3F ++ ++#define RF_TXRF_A2 0x41 ++#define RF_TXPA_G4 0x46 ++#define RF_TXPA_A4 0x4B ++#define RF_0x52 0x52 ++#define RF_WE_LUT 0xEF ++#define RF_S0S1 0xB0 ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPwrSeq.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPwrSeq.h +old mode 100755 +new mode 100644 +index d212445..2bbd976 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPwrSeq.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723BPwrSeq.h +@@ -1,233 +1,233 @@ +-#ifndef REALTEK_POWER_SEQUENCE_8723B +-#define REALTEK_POWER_SEQUENCE_8723B +- +-#include "HalPwrSeqCmd.h" +- +-/* +- Check document WM-20130815-JackieLau-RTL8723B_Power_Architecture v08.vsd +- There are 6 HW Power States: +- 0: POFF--Power Off +- 1: PDN--Power Down +- 2: CARDEMU--Card Emulation +- 3: ACT--Active Mode +- 4: LPS--Low Power State +- 5: SUS--Suspend +- +- The transision from different states are defined below +- TRANS_CARDEMU_TO_ACT +- TRANS_ACT_TO_CARDEMU +- TRANS_CARDEMU_TO_SUS +- TRANS_SUS_TO_CARDEMU +- TRANS_CARDEMU_TO_PDN +- TRANS_ACT_TO_LPS +- TRANS_LPS_TO_ACT +- +- TRANS_END +-*/ +-#define RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS 26 +-#define RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS 15 +-#define RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS 15 +-#define RTL8723B_TRANS_SUS_TO_CARDEMU_STEPS 15 +-#define RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS 15 +-#define RTL8723B_TRANS_PDN_TO_CARDEMU_STEPS 15 +-#define RTL8723B_TRANS_ACT_TO_LPS_STEPS 15 +-#define RTL8723B_TRANS_LPS_TO_ACT_STEPS 15 +-#define RTL8723B_TRANS_ACT_TO_SWLPS_STEPS 22 +-#define RTL8723B_TRANS_SWLPS_TO_ACT_STEPS 15 +-#define RTL8723B_TRANS_END_STEPS 1 +- +- +-#define RTL8723B_TRANS_CARDEMU_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ +- {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ +- {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ +- {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ +- {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ +- {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ +- {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ +- {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ +- {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ +- {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ +- {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ +- {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ +- {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\ +- {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ +- +- +-#define RTL8723B_TRANS_ACT_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ +- {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ +- {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\ +- {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ +- {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ +- +- +-#define RTL8723B_TRANS_CARDEMU_TO_SUS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ +- +-#define RTL8723B_TRANS_SUS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ +- +-#define RTL8723B_TRANS_CARDEMU_TO_CARDDIS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ +- {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ +- +-#define RTL8723B_TRANS_CARDDIS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ +- {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ +- {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ +- +- +-#define RTL8723B_TRANS_CARDEMU_TO_PDN \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ +- +-#define RTL8723B_TRANS_PDN_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ +- +-#define RTL8723B_TRANS_ACT_TO_LPS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ +- {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ +- {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ +- {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ +- +- +-#define RTL8723B_TRANS_LPS_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ +- {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ +- {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ +- {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ +- {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ +- {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ +- +- +- #define RTL8723B_TRANS_ACT_TO_SWLPS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*enable 32 K source*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*disable security engine*/ \ +- {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x40},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ +- {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*reset dual TSF*/ \ +- {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/*Reset CPU*/ \ +- {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*Reset MCUFWDL register*/ \ +- {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ +- {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*Reset CPU IO Wrapper*/ \ +- {0x0287, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*polling RXFF packet number = 0 */ \ +- {0x0286, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/*polling RXDMA idle */ \ +- {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Clear FW RPWM interrupt */\ +- {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Set FW RPWM interrupt source*/\ +- {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4},/*switch TSF to 32K*/\ +- {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/*polling TSF stable*/\ +- {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Set FW LPS*/ \ +- {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/*polling FW LPS ready */ +- +- +-#define RTL8723B_TRANS_SWLPS_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0},/*switch TSF to 32K*/\ +- {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*polling TSF stable*/\ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1, enable security engine*/\ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ +- {0x06B7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x09}, /*. reset MAC rx state machine*/\ +- {0x06B4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x86}, /*. reset MAC rx state machine*/\ +- {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/* set CPU RAM code ready*/ \ +- {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ +- {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/ \ +- {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*enable CPU IO Wrapper*/ \ +- {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/ \ +- {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, BIT7},/*polling FW init ready */ \ +- {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT6, BIT6},/*polling FW init ready */ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ +- +-#define RTL8723B_TRANS_END \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // +- +- +-extern WLAN_PWR_CFG rtl8723B_power_on_flow[RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723B_radio_off_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723B_card_disable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723B_card_enable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723B_suspend_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723B_resume_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723B_hwpdn_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723B_enter_lps_flow[RTL8723B_TRANS_ACT_TO_LPS_STEPS+RTL8723B_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723B_leave_lps_flow[RTL8723B_TRANS_LPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723B_enter_swlps_flow[RTL8723B_TRANS_ACT_TO_SWLPS_STEPS+RTL8723B_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723B_leave_swlps_flow[RTL8723B_TRANS_SWLPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; +-#endif +- ++#ifndef REALTEK_POWER_SEQUENCE_8723B ++#define REALTEK_POWER_SEQUENCE_8723B ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WM-20130815-JackieLau-RTL8723B_Power_Architecture v08.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS 26 ++#define RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS 15 ++#define RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS 15 ++#define RTL8723B_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS 15 ++#define RTL8723B_TRANS_PDN_TO_CARDEMU_STEPS 15 ++#define RTL8723B_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8723B_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8723B_TRANS_ACT_TO_SWLPS_STEPS 22 ++#define RTL8723B_TRANS_SWLPS_TO_ACT_STEPS 15 ++#define RTL8723B_TRANS_END_STEPS 1 ++ ++ ++#define RTL8723B_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ ++ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ ++ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ ++ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ ++ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ ++ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ ++ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ ++ {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\ ++ {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ ++ ++ ++#define RTL8723B_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ ++ ++ ++#define RTL8723B_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8723B_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8723B_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8723B_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ ++ ++ ++#define RTL8723B_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8723B_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8723B_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8723B_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++ ++ #define RTL8723B_TRANS_ACT_TO_SWLPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*enable 32 K source*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*disable security engine*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x40},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*reset dual TSF*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/*Reset CPU*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*Reset MCUFWDL register*/ \ ++ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ ++ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},/*Reset CPU IO Wrapper*/ \ ++ {0x0287, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*polling RXFF packet number = 0 */ \ ++ {0x0286, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/*polling RXDMA idle */ \ ++ {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Clear FW RPWM interrupt */\ ++ {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Set FW RPWM interrupt source*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4},/*switch TSF to 32K*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/*polling TSF stable*/\ ++ {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Set FW LPS*/ \ ++ {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/*polling FW LPS ready */ ++ ++ ++#define RTL8723B_TRANS_SWLPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0},/*switch TSF to 32K*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*polling TSF stable*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1, enable security engine*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x06B7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x09}, /*. reset MAC rx state machine*/\ ++ {0x06B4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x86}, /*. reset MAC rx state machine*/\ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/* set CPU RAM code ready*/ \ ++ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/ \ ++ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*enable CPU IO Wrapper*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, BIT7},/*polling FW init ready */ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT6, BIT6},/*polling FW init ready */ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8723B_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8723B_power_on_flow[RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_radio_off_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_card_disable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_card_enable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_suspend_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_resume_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_hwpdn_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_enter_lps_flow[RTL8723B_TRANS_ACT_TO_LPS_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_leave_lps_flow[RTL8723B_TRANS_LPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_enter_swlps_flow[RTL8723B_TRANS_ACT_TO_SWLPS_STEPS+RTL8723B_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723B_leave_swlps_flow[RTL8723B_TRANS_SWLPS_TO_ACT_STEPS+RTL8723B_TRANS_END_STEPS]; ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723PwrSeq.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723PwrSeq.h +old mode 100755 +new mode 100644 +index 307ac90..ab31a7a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723PwrSeq.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8723PwrSeq.h +@@ -1,170 +1,170 @@ +-#ifndef __HAL8723PWRSEQ_H__ +-#define __HAL8723PWRSEQ_H__ +-/* +- Check document WM-20110607-Paul-RTL8723A_Power_Architecture-R02.vsd +- There are 6 HW Power States: +- 0: POFF--Power Off +- 1: PDN--Power Down +- 2: CARDEMU--Card Emulation +- 3: ACT--Active Mode +- 4: LPS--Low Power State +- 5: SUS--Suspend +- +- The transision from different states are defined below +- TRANS_CARDEMU_TO_ACT +- TRANS_ACT_TO_CARDEMU +- TRANS_CARDEMU_TO_SUS +- TRANS_SUS_TO_CARDEMU +- TRANS_CARDEMU_TO_PDN +- TRANS_ACT_TO_LPS +- TRANS_LPS_TO_ACT +- +- TRANS_END +-*/ +-#include "HalPwrSeqCmd.h" +- +-#define RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS 15 +-#define RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS 15 +-#define RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS 15 +-#define RTL8723A_TRANS_SUS_TO_CARDEMU_STEPS 15 +-#define RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS 15 +-#define RTL8723A_TRANS_PDN_TO_CARDEMU_STEPS 15 +-#define RTL8723A_TRANS_ACT_TO_LPS_STEPS 15 +-#define RTL8723A_TRANS_LPS_TO_ACT_STEPS 15 +-#define RTL8723A_TRANS_END_STEPS 1 +- +- +-#define RTL8723A_TRANS_CARDEMU_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ +- {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ +- {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ +- {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ +- {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 1},/*0x4C[23] = 0x4E[7] = 1, switch DPDT_SEL_P output from WL BB */\ +- +-#define RTL8723A_TRANS_ACT_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ +- {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ +- {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ +- {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ +- +- +-#define RTL8723A_TRANS_CARDEMU_TO_SUS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ +- +-#define RTL8723A_TRANS_SUS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ +- +-#define RTL8723A_TRANS_CARDEMU_TO_CARDDIS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ +- {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ +- +-#define RTL8723A_TRANS_CARDDIS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ +- {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ +- {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ +- +- +-#define RTL8723A_TRANS_CARDEMU_TO_PDN \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ +- +-#define RTL8723A_TRANS_PDN_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ +- +-#define RTL8723A_TRANS_ACT_TO_LPS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ +- {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ +- {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ +- {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ +- +- +-#define RTL8723A_TRANS_LPS_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ +- {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ +- {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ +- {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ +- {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ +- {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ +- +-#define RTL8723A_TRANS_END \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // +- +- +-extern WLAN_PWR_CFG rtl8723A_power_on_flow[RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723A_radio_off_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723A_card_disable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723A_card_enable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723A_suspend_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723A_resume_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723A_hwpdn_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723A_enter_lps_flow[RTL8723A_TRANS_ACT_TO_LPS_STEPS+RTL8723A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8723A_leave_lps_flow[RTL8723A_TRANS_LPS_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS]; +- +-#endif +- ++#ifndef __HAL8723PWRSEQ_H__ ++#define __HAL8723PWRSEQ_H__ ++/* ++ Check document WM-20110607-Paul-RTL8723A_Power_Architecture-R02.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#include "HalPwrSeqCmd.h" ++ ++#define RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS 15 ++#define RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS 15 ++#define RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS 15 ++#define RTL8723A_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS 15 ++#define RTL8723A_TRANS_PDN_TO_CARDEMU_STEPS 15 ++#define RTL8723A_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8723A_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8723A_TRANS_END_STEPS 1 ++ ++ ++#define RTL8723A_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ ++ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ ++ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ ++ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 1},/*0x4C[23] = 0x4E[7] = 1, switch DPDT_SEL_P output from WL BB */\ ++ ++#define RTL8723A_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ ++ ++ ++#define RTL8723A_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8723A_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8723A_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8723A_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ ++ ++ ++#define RTL8723A_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8723A_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8723A_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8723A_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8723A_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8723A_power_on_flow[RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_radio_off_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_card_disable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_card_enable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_suspend_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_resume_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_hwpdn_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_enter_lps_flow[RTL8723A_TRANS_ACT_TO_LPS_STEPS+RTL8723A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8723A_leave_lps_flow[RTL8723A_TRANS_LPS_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS]; ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PhyCfg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PhyCfg.h +old mode 100755 +new mode 100644 +index f8c83e1..b5241d6 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PhyCfg.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PhyCfg.h +@@ -1,165 +1,165 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __INC_HAL8812PHYCFG_H__ +-#define __INC_HAL8812PHYCFG_H__ +- +- +-/*--------------------------Define Parameters-------------------------------*/ +-#define LOOP_LIMIT 5 +-#define MAX_STALL_TIME 50 //us +-#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) +-#define MAX_TXPWR_IDX_NMODE_92S 63 +-#define Reset_Cnt_Limit 3 +- +- +-#ifdef CONFIG_PCI_HCI +-#define MAX_AGGR_NUM 0x0B +-#else +-#define MAX_AGGR_NUM 0x07 +-#endif // CONFIG_PCI_HCI +- +- +-/*--------------------------Define Parameters-------------------------------*/ +- +-/*------------------------------Define structure----------------------------*/ +- +- +-/* BB/RF related */ +- +-/*------------------------------Define structure----------------------------*/ +- +- +-/*------------------------Export global variable----------------------------*/ +-/*------------------------Export global variable----------------------------*/ +- +- +-/*------------------------Export Marco Definition---------------------------*/ +-/*------------------------Export Marco Definition---------------------------*/ +- +- +-/*--------------------------Exported Function prototype---------------------*/ +-// +-// BB and RF register read/write +-// +-u32 PHY_QueryBBReg8812( IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask ); +-void PHY_SetBBReg8812( IN PADAPTER Adapter, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data ); +-u32 PHY_QueryRFReg8812( IN PADAPTER Adapter, +- IN u8 eRFPath, +- IN u32 RegAddr, +- IN u32 BitMask ); +-void PHY_SetRFReg8812( IN PADAPTER Adapter, +- IN u8 eRFPath, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Data ); +- +-// +-// Initialization related function +-// +-/* MAC/BB/RF HAL config */ +-int PHY_MACConfig8812(IN PADAPTER Adapter ); +-int PHY_BBConfig8812(IN PADAPTER Adapter ); +-void PHY_BB8812_Config_1T(IN PADAPTER Adapter ); +-int PHY_RFConfig8812(IN PADAPTER Adapter ); +- +-/* RF config */ +- +-s32 +-PHY_SwitchWirelessBand8812( +- IN PADAPTER Adapter, +- IN u8 Band +-); +- +-// +-// BB TX Power R/W +-// +-void PHY_GetTxPowerLevel8812( IN PADAPTER Adapter, OUT s32* powerlevel ); +-void PHY_SetTxPowerLevel8812( IN PADAPTER Adapter, IN u8 Channel ); +- +-BOOLEAN PHY_UpdateTxPowerDbm8812( IN PADAPTER Adapter, IN int powerInDbm ); +-u8 PHY_GetTxPowerIndex_8812A( +- IN PADAPTER pAdapter, +- IN u8 RFPath, +- IN u8 Rate, +- IN CHANNEL_WIDTH BandWidth, +- IN u8 Channel +- ); +- +-u32 PHY_GetTxBBSwing_8812A( +- IN PADAPTER Adapter, +- IN BAND_TYPE Band, +- IN u8 RFPath +- ); +- +-VOID +-PHY_SetTxPowerIndex_8812A( +- IN PADAPTER Adapter, +- IN u4Byte PowerIndex, +- IN u1Byte RFPath, +- IN u1Byte Rate +- ); +- +-// +-// Switch bandwidth for 8192S +-// +-VOID +-PHY_SetBWMode8812( +- IN PADAPTER pAdapter, +- IN CHANNEL_WIDTH Bandwidth, +- IN u8 Offset +-); +- +-// +-// channel switch related funciton +-// +-VOID +-PHY_SwChnl8812( +- IN PADAPTER Adapter, +- IN u8 channel +-); +- +- +-VOID +-PHY_SetSwChnlBWMode8812( +- IN PADAPTER Adapter, +- IN u8 channel, +- IN CHANNEL_WIDTH Bandwidth, +- IN u8 Offset40, +- IN u8 Offset80 +-); +- +-// +-// BB/MAC/RF other monitor API +-// +- +-VOID +-PHY_SetRFPathSwitch_8812A( +- IN PADAPTER pAdapter, +- IN BOOLEAN bMain +-); +- +-/*--------------------------Exported Function prototype---------------------*/ +-#endif // __INC_HAL8192CPHYCFG_H +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8812PHYCFG_H__ ++#define __INC_HAL8812PHYCFG_H__ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/* BB/RF related */ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++// ++// BB and RF register read/write ++// ++u32 PHY_QueryBBReg8812( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetBBReg8812( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 PHY_QueryRFReg8812( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void PHY_SetRFReg8812( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++int PHY_MACConfig8812(IN PADAPTER Adapter ); ++int PHY_BBConfig8812(IN PADAPTER Adapter ); ++void PHY_BB8812_Config_1T(IN PADAPTER Adapter ); ++int PHY_RFConfig8812(IN PADAPTER Adapter ); ++ ++/* RF config */ ++ ++s32 ++PHY_SwitchWirelessBand8812( ++ IN PADAPTER Adapter, ++ IN u8 Band ++); ++ ++// ++// BB TX Power R/W ++// ++void PHY_GetTxPowerLevel8812( IN PADAPTER Adapter, OUT s32* powerlevel ); ++void PHY_SetTxPowerLevel8812( IN PADAPTER Adapter, IN u8 Channel ); ++ ++BOOLEAN PHY_UpdateTxPowerDbm8812( IN PADAPTER Adapter, IN int powerInDbm ); ++u8 PHY_GetTxPowerIndex_8812A( ++ IN PADAPTER pAdapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++u32 PHY_GetTxBBSwing_8812A( ++ IN PADAPTER Adapter, ++ IN BAND_TYPE Band, ++ IN u8 RFPath ++ ); ++ ++VOID ++PHY_SetTxPowerIndex_8812A( ++ IN PADAPTER Adapter, ++ IN u4Byte PowerIndex, ++ IN u1Byte RFPath, ++ IN u1Byte Rate ++ ); ++ ++// ++// Switch bandwidth for 8192S ++// ++VOID ++PHY_SetBWMode8812( ++ IN PADAPTER pAdapter, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset ++); ++ ++// ++// channel switch related funciton ++// ++VOID ++PHY_SwChnl8812( ++ IN PADAPTER Adapter, ++ IN u8 channel ++); ++ ++ ++VOID ++PHY_SetSwChnlBWMode8812( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++ ++// ++// BB/MAC/RF other monitor API ++// ++ ++VOID ++PHY_SetRFPathSwitch_8812A( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain ++); ++ ++/*--------------------------Exported Function prototype---------------------*/ ++#endif // __INC_HAL8192CPHYCFG_H ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PhyReg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PhyReg.h +old mode 100755 +new mode 100644 +index fde6f33..de9cefe +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PhyReg.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PhyReg.h +@@ -1,733 +1,739 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __INC_HAL8812PHYREG_H__ +-#define __INC_HAL8812PHYREG_H__ +-/*--------------------------Define Parameters-------------------------------*/ +-// +-// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF +-// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF +-// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 +-// 3. RF register 0x00-2E +-// 4. Bit Mask for BB/RF register +-// 5. Other defintion for BB/RF R/W +-// +- +- +-// BB Register Definition +- +-#define rCCAonSec_Jaguar 0x838 +-#define rPwed_TH_Jaguar 0x830 +- +-// BW and sideband setting +-#define rBWIndication_Jaguar 0x834 +-#define rL1PeakTH_Jaguar 0x848 +-#define rRFMOD_Jaguar 0x8ac //RF mode +-#define rADC_Buf_Clk_Jaguar 0x8c4 +-#define rRFECTRL_Jaguar 0x900 +-#define bRFMOD_Jaguar 0xc3 +-#define rCCK_System_Jaguar 0xa00 // for cck sideband +-#define bCCK_System_Jaguar 0x10 +- +-// Block & Path enable +-#define rOFDMCCKEN_Jaguar 0x808 // OFDM/CCK block enable +-#define bOFDMEN_Jaguar 0x20000000 +-#define bCCKEN_Jaguar 0x10000000 +-#define rRxPath_Jaguar 0x808 // Rx antenna +-#define bRxPath_Jaguar 0xff +-#define rTxPath_Jaguar 0x80c // Tx antenna +-#define bTxPath_Jaguar 0x0fffffff +-#define rCCK_RX_Jaguar 0xa04 // for cck rx path selection +-#define bCCK_RX_Jaguar 0x0c000000 +-#define rVhtlen_Use_Lsig_Jaguar 0x8c3 // Use LSIG for VHT length +- +-// RF read/write-related +-#define rHSSIRead_Jaguar 0x8b0 // RF read addr +-#define bHSSIRead_addr_Jaguar 0xff +-#define bHSSIRead_trigger_Jaguar 0x100 +-#define rA_PIRead_Jaguar 0xd04 // RF readback with PI +-#define rB_PIRead_Jaguar 0xd44 // RF readback with PI +-#define rA_SIRead_Jaguar 0xd08 // RF readback with SI +-#define rB_SIRead_Jaguar 0xd48 // RF readback with SI +-#define rRead_data_Jaguar 0xfffff +-#define rA_LSSIWrite_Jaguar 0xc90 // RF write addr +-#define rB_LSSIWrite_Jaguar 0xe90 // RF write addr +-#define bLSSIWrite_data_Jaguar 0x000fffff +-#define bLSSIWrite_addr_Jaguar 0x0ff00000 +- +- +- +-// YN: mask the following register definition temporarily +-#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch +-#define rFPGA0_XB_RFInterfaceOE 0x864 +- +-#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control +-#define rFPGA0_XCD_RFInterfaceSW 0x874 +- +-//#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter +-//#define rFPGA0_XCD_RFParameter 0x87c +- +-//#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? +-//#define rFPGA0_AnalogParameter2 0x884 +-//#define rFPGA0_AnalogParameter3 0x888 +-//#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy +-//#define rFPGA0_AnalogParameter4 0x88c +- +- +-// CCK TX scaling +-#define rCCK_TxFilter1_Jaguar 0xa20 +-#define bCCK_TxFilter1_C0_Jaguar 0x00ff0000 +-#define bCCK_TxFilter1_C1_Jaguar 0xff000000 +-#define rCCK_TxFilter2_Jaguar 0xa24 +-#define bCCK_TxFilter2_C2_Jaguar 0x000000ff +-#define bCCK_TxFilter2_C3_Jaguar 0x0000ff00 +-#define bCCK_TxFilter2_C4_Jaguar 0x00ff0000 +-#define bCCK_TxFilter2_C5_Jaguar 0xff000000 +-#define rCCK_TxFilter3_Jaguar 0xa28 +-#define bCCK_TxFilter3_C6_Jaguar 0x000000ff +-#define bCCK_TxFilter3_C7_Jaguar 0x0000ff00 +- +- +-// YN: mask the following register definition temporarily +-//#define rPdp_AntA 0xb00 +-//#define rPdp_AntA_4 0xb04 +-//#define rConfig_Pmpd_AntA 0xb28 +-//#define rConfig_AntA 0xb68 +-//#define rConfig_AntB 0xb6c +-//#define rPdp_AntB 0xb70 +-//#define rPdp_AntB_4 0xb74 +-//#define rConfig_Pmpd_AntB 0xb98 +-//#define rAPK 0xbd8 +- +-// RXIQC +-#define rA_RxIQC_AB_Jaguar 0xc10 //RxIQ imblance matrix coeff. A & B +-#define rA_RxIQC_CD_Jaguar 0xc14 //RxIQ imblance matrix coeff. C & D +-#define rA_TxScale_Jaguar 0xc1c // Pah_A TX scaling factor +-#define rB_TxScale_Jaguar 0xe1c // Path_B TX scaling factor +-#define rB_RxIQC_AB_Jaguar 0xe10 //RxIQ imblance matrix coeff. A & B +-#define rB_RxIQC_CD_Jaguar 0xe14 //RxIQ imblance matrix coeff. C & D +-#define b_RxIQC_AC_Jaguar 0x02ff // bit mask for IQC matrix element A & C +-#define b_RxIQC_BD_Jaguar 0x02ff0000 // bit mask for IQC matrix element A & C +- +- +-// DIG-related +-#define rA_IGI_Jaguar 0xc50 // Initial Gain for path-A +-#define rB_IGI_Jaguar 0xe50 // Initial Gain for path-B +-#define rOFDM_FalseAlarm1_Jaguar 0xf48 // counter for break +-#define rOFDM_FalseAlarm2_Jaguar 0xf4c // counter for spoofing +-#define rCCK_FalseAlarm_Jaguar 0xa5c // counter for cck false alarm +-#define b_FalseAlarm_Jaguar 0xffff +-#define rCCK_CCA_Jaguar 0xa08 // cca threshold +-#define bCCK_CCA_Jaguar 0x00ff0000 +- +-// Tx Power Ttraining-related +-#define rA_TxPwrTraing_Jaguar 0xc54 +-#define rB_TxPwrTraing_Jaguar 0xe54 +- +-// Report-related +-#define rOFDM_ShortCFOAB_Jaguar 0xf60 +-#define rOFDM_LongCFOAB_Jaguar 0xf64 +-#define rOFDM_EndCFOAB_Jaguar 0xf70 +-#define rOFDM_AGCReport_Jaguar 0xf84 +-#define rOFDM_RxSNR_Jaguar 0xf88 +-#define rOFDM_RxEVMCSI_Jaguar 0xf8c +-#define rOFDM_SIGReport_Jaguar 0xf90 +- +-// Misc functions +-#define rEDCCA_Jaguar 0x8a4 // EDCCA +-#define bEDCCA_Jaguar 0xffff +-#define rAGC_table_Jaguar 0x82c // AGC tabel select +-#define bAGC_table_Jaguar 0x3 +-#define b_sel5g_Jaguar 0x1000 // sel5g +-#define b_LNA_sw_Jaguar 0x8000 // HW/WS control for LNA +-#define rFc_area_Jaguar 0x860 // fc_area +-#define bFc_area_Jaguar 0x1ffe000 +-#define rSingleTone_ContTx_Jaguar 0x914 +- +-// RFE +-#define rA_RFE_Pinmux_Jaguar 0xcb0 // Path_A RFE cotrol pinmux +-#define rB_RFE_Pinmux_Jaguar 0xeb0 // Path_B RFE control pinmux +-#define rA_RFE_Inv_Jaguar 0xcb4 // Path_A RFE cotrol +-#define rB_RFE_Inv_Jaguar 0xeb4 // Path_B RFE control +-#define rA_RFE_Jaguar 0xcb8 // Path_A RFE cotrol +-#define rB_RFE_Jaguar 0xeb8 // Path_B RFE control +-#define r_ANTSEL_SW_Jaguar 0x900 // ANTSEL SW Control +-#define bMask_RFEInv_Jaguar 0x3ff00000 +-#define bMask_AntselPathFollow_Jaguar 0x00030000 +- +-// TX AGC +-#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 +-#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 +-#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 +-#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c +-#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 +-#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 +-#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 +-#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c +-#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 +-#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 +-#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 +-#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c +-#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 +-#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 +-#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 +-#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c +-#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 +-#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 +-#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 +-#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c +-#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 +-#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 +-#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 +-#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c +-#define bTxAGC_byte0_Jaguar 0xff +-#define bTxAGC_byte1_Jaguar 0xff00 +-#define bTxAGC_byte2_Jaguar 0xff0000 +-#define bTxAGC_byte3_Jaguar 0xff000000 +- +-// IQK YN: temporaily mask this part +-//#define rFPGA0_IQK 0xe28 +-//#define rTx_IQK_Tone_A 0xe30 +-//#define rRx_IQK_Tone_A 0xe34 +-//#define rTx_IQK_PI_A 0xe38 +-//#define rRx_IQK_PI_A 0xe3c +- +-//#define rTx_IQK 0xe40 +-//#define rRx_IQK 0xe44 +-//#define rIQK_AGC_Pts 0xe48 +-//#define rIQK_AGC_Rsp 0xe4c +-//#define rTx_IQK_Tone_B 0xe50 +-//#define rRx_IQK_Tone_B 0xe54 +-//#define rTx_IQK_PI_B 0xe58 +-//#define rRx_IQK_PI_B 0xe5c +-//#define rIQK_AGC_Cont 0xe60 +- +- +-// AFE-related +-#define rA_AFEPwr1_Jaguar 0xc60 // dynamic AFE power control +-#define rA_AFEPwr2_Jaguar 0xc64 // dynamic AFE power control +-#define rA_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xc68 +-#define rA_Tx_CCKBBON_OFDMRFON_Jaguar 0xc6c +-#define rA_Tx_OFDMBBON_Tx2Rx_Jaguar 0xc70 +-#define rA_Tx2Tx_RXCCK_Jaguar 0xc74 +-#define rA_Rx_OFDM_WaitRIFS_Jaguar 0xc78 +-#define rA_Rx2Rx_BT_Jaguar 0xc7c +-#define rA_sleep_nav_Jaguar 0xc80 +-#define rA_pmpd_Jaguar 0xc84 +-#define rB_AFEPwr1_Jaguar 0xe60 // dynamic AFE power control +-#define rB_AFEPwr2_Jaguar 0xe64 // dynamic AFE power control +-#define rB_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xe68 +-#define rB_Tx_CCKBBON_OFDMRFON_Jaguar 0xe6c +-#define rB_Tx_OFDMBBON_Tx2Rx_Jaguar 0xe70 +-#define rB_Tx2Tx_RXCCK_Jaguar 0xe74 +-#define rB_Rx_OFDM_WaitRIFS_Jaguar 0xe78 +-#define rB_Rx2Rx_BT_Jaguar 0xe7c +-#define rB_sleep_nav_Jaguar 0xe80 +-#define rB_pmpd_Jaguar 0xe84 +- +- +-// YN: mask these registers temporaily +-//#define rTx_Power_Before_IQK_A 0xe94 +-//#define rTx_Power_After_IQK_A 0xe9c +- +-//#define rRx_Power_Before_IQK_A 0xea0 +-//#define rRx_Power_Before_IQK_A_2 0xea4 +-//#define rRx_Power_After_IQK_A 0xea8 +-//#define rRx_Power_After_IQK_A_2 0xeac +- +-//#define rTx_Power_Before_IQK_B 0xeb4 +-//#define rTx_Power_After_IQK_B 0xebc +- +-//#define rRx_Power_Before_IQK_B 0xec0 +-//#define rRx_Power_Before_IQK_B_2 0xec4 +-//#define rRx_Power_After_IQK_B 0xec8 +-//#define rRx_Power_After_IQK_B_2 0xecc +- +- +-// RSSI Dump +-#define rA_RSSIDump_Jaguar 0xBF0 +-#define rB_RSSIDump_Jaguar 0xBF1 +-#define rS1_RXevmDump_Jaguar 0xBF4 +-#define rS2_RXevmDump_Jaguar 0xBF5 +-#define rA_RXsnrDump_Jaguar 0xBF6 +-#define rB_RXsnrDump_Jaguar 0xBF7 +-#define rA_CfoShortDump_Jaguar 0xBF8 +-#define rB_CfoShortDump_Jaguar 0xBFA +-#define rA_CfoLongDump_Jaguar 0xBEC +-#define rB_CfoLongDump_Jaguar 0xBEE +- +- +-// RF Register +-// +-#define RF_AC_Jaguar 0x00 // +-#define RF_RF_Top_Jaguar 0x07 // +-#define RF_TXLOK_Jaguar 0x08 // +-#define RF_TXAPK_Jaguar 0x0B +-#define RF_CHNLBW_Jaguar 0x18 // RF channel and BW switch +-#define RF_RCK1_Jaguar 0x1c // +-#define RF_RCK2_Jaguar 0x1d +-#define RF_RCK3_Jaguar 0x1e +-#define RF_ModeTableAddr 0x30 +-#define RF_ModeTableData0 0x31 +-#define RF_ModeTableData1 0x32 +-#define RF_TxLCTank_Jaguar 0x54 +-#define RF_APK_Jaguar 0x63 +-#define RF_LCK 0xB4 +-#define RF_WeLut_Jaguar 0xEF +- +-#define bRF_CHNLBW_MOD_AG_Jaguar 0x70300 +-#define bRF_CHNLBW_BW 0xc00 +- +- +-// +-// RL6052 Register definition +-// +-#define RF_AC 0x00 // +-#define RF_IPA_A 0x0C // +-#define RF_TXBIAS_A 0x0D +-#define RF_BS_PA_APSET_G9_G11 0x0E +-#define RF_MODE1 0x10 // +-#define RF_MODE2 0x11 // +-#define RF_CHNLBW 0x18 // RF channel and BW switch +-#define RF_RCK_OS 0x30 // RF TX PA control +-#define RF_TXPA_G1 0x31 // RF TX PA control +-#define RF_TXPA_G2 0x32 // RF TX PA control +-#define RF_TXPA_G3 0x33 // RF TX PA control +-#define RF_0x52 0x52 +-#define RF_WE_LUT 0xEF +- +-// +-//Bit Mask +-// +-// 1. Page1(0x100) +-#define bBBResetB 0x100 // Useless now? +-#define bGlobalResetB 0x200 +-#define bOFDMTxStart 0x4 +-#define bCCKTxStart 0x8 +-#define bCRC32Debug 0x100 +-#define bPMACLoopback 0x10 +-#define bTxLSIG 0xffffff +-#define bOFDMTxRate 0xf +-#define bOFDMTxReserved 0x10 +-#define bOFDMTxLength 0x1ffe0 +-#define bOFDMTxParity 0x20000 +-#define bTxHTSIG1 0xffffff +-#define bTxHTMCSRate 0x7f +-#define bTxHTBW 0x80 +-#define bTxHTLength 0xffff00 +-#define bTxHTSIG2 0xffffff +-#define bTxHTSmoothing 0x1 +-#define bTxHTSounding 0x2 +-#define bTxHTReserved 0x4 +-#define bTxHTAggreation 0x8 +-#define bTxHTSTBC 0x30 +-#define bTxHTAdvanceCoding 0x40 +-#define bTxHTShortGI 0x80 +-#define bTxHTNumberHT_LTF 0x300 +-#define bTxHTCRC8 0x3fc00 +-#define bCounterReset 0x10000 +-#define bNumOfOFDMTx 0xffff +-#define bNumOfCCKTx 0xffff0000 +-#define bTxIdleInterval 0xffff +-#define bOFDMService 0xffff0000 +-#define bTxMACHeader 0xffffffff +-#define bTxDataInit 0xff +-#define bTxHTMode 0x100 +-#define bTxDataType 0x30000 +-#define bTxRandomSeed 0xffffffff +-#define bCCKTxPreamble 0x1 +-#define bCCKTxSFD 0xffff0000 +-#define bCCKTxSIG 0xff +-#define bCCKTxService 0xff00 +-#define bCCKLengthExt 0x8000 +-#define bCCKTxLength 0xffff0000 +-#define bCCKTxCRC16 0xffff +-#define bCCKTxStatus 0x1 +-#define bOFDMTxStatus 0x2 +- +- +-// +-// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF +-// 1. Page1(0x100) +-// +-#define rPMAC_Reset 0x100 +-#define rPMAC_TxStart 0x104 +-#define rPMAC_TxLegacySIG 0x108 +-#define rPMAC_TxHTSIG1 0x10c +-#define rPMAC_TxHTSIG2 0x110 +-#define rPMAC_PHYDebug 0x114 +-#define rPMAC_TxPacketNum 0x118 +-#define rPMAC_TxIdle 0x11c +-#define rPMAC_TxMACHeader0 0x120 +-#define rPMAC_TxMACHeader1 0x124 +-#define rPMAC_TxMACHeader2 0x128 +-#define rPMAC_TxMACHeader3 0x12c +-#define rPMAC_TxMACHeader4 0x130 +-#define rPMAC_TxMACHeader5 0x134 +-#define rPMAC_TxDataType 0x138 +-#define rPMAC_TxRandomSeed 0x13c +-#define rPMAC_CCKPLCPPreamble 0x140 +-#define rPMAC_CCKPLCPHeader 0x144 +-#define rPMAC_CCKCRC16 0x148 +-#define rPMAC_OFDMRxCRC32OK 0x170 +-#define rPMAC_OFDMRxCRC32Er 0x174 +-#define rPMAC_OFDMRxParityEr 0x178 +-#define rPMAC_OFDMRxCRC8Er 0x17c +-#define rPMAC_CCKCRxRC16Er 0x180 +-#define rPMAC_CCKCRxRC32Er 0x184 +-#define rPMAC_CCKCRxRC32OK 0x188 +-#define rPMAC_TxStatus 0x18c +- +-// +-// 3. Page8(0x800) +-// +-#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? +- +-#define rFPGA0_TxInfo 0x804 // Status report?? +-#define rFPGA0_PSDFunction 0x808 +-#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? +- +-#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register +-#define rFPGA0_XA_HSSIParameter2 0x824 +-#define rFPGA0_XB_HSSIParameter1 0x828 +-#define rFPGA0_XB_HSSIParameter2 0x82c +- +-#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch +-#define rFPGA0_XCD_SwitchControl 0x85c +- +-#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter +-#define rFPGA0_XCD_RFParameter 0x87c +- +-#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? +-#define rFPGA0_AnalogParameter2 0x884 +-#define rFPGA0_AnalogParameter3 0x888 +-#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy +-#define rFPGA0_AnalogParameter4 0x88c +-#define rFPGA0_XB_LSSIReadBack 0x8a4 +-#define rFPGA0_XCD_RFPara 0x8b4 +- +-// +-// 4. Page9(0x900) +-// +-#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? +- +-#define rFPGA1_TxBlock 0x904 // Useless now +-#define rFPGA1_DebugSelect 0x908 // Useless now +-#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? +- +-// +-// PageA(0xA00) +-// +-#define rCCK0_System 0xa00 +-#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI +-#define rCCK0_TxFilter1 0xa20 +-#define rCCK0_TxFilter2 0xa24 +-#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 +- +-// +-// PageB(0xB00) +-// +-#define rPdp_AntA 0xb00 +-#define rPdp_AntA_4 0xb04 +-#define rConfig_Pmpd_AntA 0xb28 +-#define rConfig_AntA 0xb68 +-#define rConfig_AntB 0xb6c +-#define rPdp_AntB 0xb70 +-#define rPdp_AntB_4 0xb74 +-#define rConfig_Pmpd_AntB 0xb98 +-#define rAPK 0xbd8 +- +-// +-// 6. PageC(0xC00) +-// +-#define rOFDM0_LSTF 0xc00 +- +-#define rOFDM0_TRxPathEnable 0xc04 +-#define rOFDM0_TRMuxPar 0xc08 +-#define rOFDM0_TRSWIsolation 0xc0c +- +-#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter +-#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix +-#define rOFDM0_XBRxAFE 0xc18 +-#define rOFDM0_XBRxIQImbalance 0xc1c +-#define rOFDM0_XCRxAFE 0xc20 +-#define rOFDM0_XCRxIQImbalance 0xc24 +-#define rOFDM0_XDRxAFE 0xc28 +-#define rOFDM0_XDRxIQImbalance 0xc2c +- +-#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain +-#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. +-#define rOFDM0_RxDetector3 0xc38 //Frame Sync. +-#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI +- +-#define rOFDM0_RxDSP 0xc40 //Rx Sync Path +-#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC +-#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold +-#define rOFDM0_ECCAThreshold 0xc4c // energy CCA +- +-#define rOFDM0_XAAGCCore1 0xc50 // DIG +-#define rOFDM0_XAAGCCore2 0xc54 +-#define rOFDM0_XBAGCCore1 0xc58 +-#define rOFDM0_XBAGCCore2 0xc5c +-#define rOFDM0_XCAGCCore1 0xc60 +-#define rOFDM0_XCAGCCore2 0xc64 +-#define rOFDM0_XDAGCCore1 0xc68 +-#define rOFDM0_XDAGCCore2 0xc6c +- +-#define rOFDM0_AGCParameter1 0xc70 +-#define rOFDM0_AGCParameter2 0xc74 +-#define rOFDM0_AGCRSSITable 0xc78 +-#define rOFDM0_HTSTFAGC 0xc7c +- +-#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG +-#define rOFDM0_XATxAFE 0xc84 +-#define rOFDM0_XBTxIQImbalance 0xc88 +-#define rOFDM0_XBTxAFE 0xc8c +-#define rOFDM0_XCTxIQImbalance 0xc90 +-#define rOFDM0_XCTxAFE 0xc94 +-#define rOFDM0_XDTxIQImbalance 0xc98 +-#define rOFDM0_XDTxAFE 0xc9c +- +-#define rOFDM0_RxIQExtAnta 0xca0 +-#define rOFDM0_TxCoeff1 0xca4 +-#define rOFDM0_TxCoeff2 0xca8 +-#define rOFDM0_TxCoeff3 0xcac +-#define rOFDM0_TxCoeff4 0xcb0 +-#define rOFDM0_TxCoeff5 0xcb4 +-#define rOFDM0_TxCoeff6 0xcb8 +-#define rOFDM0_RxHPParameter 0xce0 +-#define rOFDM0_TxPseudoNoiseWgt 0xce4 +-#define rOFDM0_FrameSync 0xcf0 +-#define rOFDM0_DFSReport 0xcf4 +- +-// +-// 7. PageD(0xD00) +-// +-#define rOFDM1_LSTF 0xd00 +-#define rOFDM1_TRxPathEnable 0xd04 +- +-// +-// 8. PageE(0xE00) +-// +-#define rTxAGC_A_Rate18_06 0xe00 +-#define rTxAGC_A_Rate54_24 0xe04 +-#define rTxAGC_A_CCK1_Mcs32 0xe08 +-#define rTxAGC_A_Mcs03_Mcs00 0xe10 +-#define rTxAGC_A_Mcs07_Mcs04 0xe14 +-#define rTxAGC_A_Mcs11_Mcs08 0xe18 +-#define rTxAGC_A_Mcs15_Mcs12 0xe1c +- +-#define rTxAGC_B_Rate18_06 0x830 +-#define rTxAGC_B_Rate54_24 0x834 +-#define rTxAGC_B_CCK1_55_Mcs32 0x838 +-#define rTxAGC_B_Mcs03_Mcs00 0x83c +-#define rTxAGC_B_Mcs07_Mcs04 0x848 +-#define rTxAGC_B_Mcs11_Mcs08 0x84c +-#define rTxAGC_B_Mcs15_Mcs12 0x868 +-#define rTxAGC_B_CCK11_A_CCK2_11 0x86c +- +-#define rFPGA0_IQK 0xe28 +-#define rTx_IQK_Tone_A 0xe30 +-#define rRx_IQK_Tone_A 0xe34 +-#define rTx_IQK_PI_A 0xe38 +-#define rRx_IQK_PI_A 0xe3c +- +-#define rTx_IQK 0xe40 +-#define rRx_IQK 0xe44 +-#define rIQK_AGC_Pts 0xe48 +-#define rIQK_AGC_Rsp 0xe4c +-#define rTx_IQK_Tone_B 0xe50 +-#define rRx_IQK_Tone_B 0xe54 +-#define rTx_IQK_PI_B 0xe58 +-#define rRx_IQK_PI_B 0xe5c +-#define rIQK_AGC_Cont 0xe60 +- +-#define rBlue_Tooth 0xe6c +-#define rRx_Wait_CCA 0xe70 +-#define rTx_CCK_RFON 0xe74 +-#define rTx_CCK_BBON 0xe78 +-#define rTx_OFDM_RFON 0xe7c +-#define rTx_OFDM_BBON 0xe80 +-#define rTx_To_Rx 0xe84 +-#define rTx_To_Tx 0xe88 +-#define rRx_CCK 0xe8c +- +-#define rTx_Power_Before_IQK_A 0xe94 +-#define rTx_Power_After_IQK_A 0xe9c +- +-#define rRx_Power_Before_IQK_A 0xea0 +-#define rRx_Power_Before_IQK_A_2 0xea4 +-#define rRx_Power_After_IQK_A 0xea8 +-#define rRx_Power_After_IQK_A_2 0xeac +- +-#define rTx_Power_Before_IQK_B 0xeb4 +-#define rTx_Power_After_IQK_B 0xebc +- +-#define rRx_Power_Before_IQK_B 0xec0 +-#define rRx_Power_Before_IQK_B_2 0xec4 +-#define rRx_Power_After_IQK_B 0xec8 +-#define rRx_Power_After_IQK_B_2 0xecc +- +-#define rRx_OFDM 0xed0 +-#define rRx_Wait_RIFS 0xed4 +-#define rRx_TO_Rx 0xed8 +-#define rStandby 0xedc +-#define rSleep 0xee0 +-#define rPMPD_ANAEN 0xeec +- +- +-// 2. Page8(0x800) +-#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD +-#define bJapanMode 0x2 +-#define bCCKTxSC 0x30 +-#define bCCKEn 0x1000000 +-#define bOFDMEn 0x2000000 +-#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage +-#define bXCTxAGC 0xf000 +-#define bXDTxAGC 0xf0000 +- +-// 4. PageA(0xA00) +-#define bCCKBBMode 0x3 // Useless +-#define bCCKTxPowerSaving 0x80 +-#define bCCKRxPowerSaving 0x40 +- +-#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch +- +-#define bCCKScramble 0x8 // Useless +-#define bCCKAntDiversity 0x8000 +-#define bCCKCarrierRecovery 0x4000 +-#define bCCKTxRate 0x3000 +-#define bCCKDCCancel 0x0800 +-#define bCCKISICancel 0x0400 +-#define bCCKMatchFilter 0x0200 +-#define bCCKEqualizer 0x0100 +-#define bCCKPreambleDetect 0x800000 +-#define bCCKFastFalseCCA 0x400000 +-#define bCCKChEstStart 0x300000 +-#define bCCKCCACount 0x080000 +-#define bCCKcs_lim 0x070000 +-#define bCCKBistMode 0x80000000 +-#define bCCKCCAMask 0x40000000 +-#define bCCKTxDACPhase 0x4 +-#define bCCKRxADCPhase 0x20000000 //r_rx_clk +-#define bCCKr_cp_mode0 0x0100 +-#define bCCKTxDCOffset 0xf0 +-#define bCCKRxDCOffset 0xf +-#define bCCKCCAMode 0xc000 +-#define bCCKFalseCS_lim 0x3f00 +-#define bCCKCS_ratio 0xc00000 +-#define bCCKCorgBit_sel 0x300000 +-#define bCCKPD_lim 0x0f0000 +-#define bCCKNewCCA 0x80000000 +-#define bCCKRxHPofIG 0x8000 +-#define bCCKRxIG 0x7f00 +-#define bCCKLNAPolarity 0x800000 +-#define bCCKRx1stGain 0x7f0000 +-#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity +-#define bCCKRxAGCSatLevel 0x1f000000 +-#define bCCKRxAGCSatCount 0xe0 +-#define bCCKRxRFSettle 0x1f //AGCsamp_dly +-#define bCCKFixedRxAGC 0x8000 +-//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 +-#define bCCKAntennaPolarity 0x2000 +-#define bCCKTxFilterType 0x0c00 +-#define bCCKRxAGCReportType 0x0300 +-#define bCCKRxDAGCEn 0x80000000 +-#define bCCKRxDAGCPeriod 0x20000000 +-#define bCCKRxDAGCSatLevel 0x1f000000 +-#define bCCKTimingRecovery 0x800000 +-#define bCCKTxC0 0x3f0000 +-#define bCCKTxC1 0x3f000000 +-#define bCCKTxC2 0x3f +-#define bCCKTxC3 0x3f00 +-#define bCCKTxC4 0x3f0000 +-#define bCCKTxC5 0x3f000000 +-#define bCCKTxC6 0x3f +-#define bCCKTxC7 0x3f00 +-#define bCCKDebugPort 0xff0000 +-#define bCCKDACDebug 0x0f000000 +-#define bCCKFalseAlarmEnable 0x8000 +-#define bCCKFalseAlarmRead 0x4000 +-#define bCCKTRSSI 0x7f +-#define bCCKRxAGCReport 0xfe +-#define bCCKRxReport_AntSel 0x80000000 +-#define bCCKRxReport_MFOff 0x40000000 +-#define bCCKRxRxReport_SQLoss 0x20000000 +-#define bCCKRxReport_Pktloss 0x10000000 +-#define bCCKRxReport_Lockedbit 0x08000000 +-#define bCCKRxReport_RateError 0x04000000 +-#define bCCKRxReport_RxRate 0x03000000 +-#define bCCKRxFACounterLower 0xff +-#define bCCKRxFACounterUpper 0xff000000 +-#define bCCKRxHPAGCStart 0xe000 +-#define bCCKRxHPAGCFinal 0x1c00 +-#define bCCKRxFalseAlarmEnable 0x8000 +-#define bCCKFACounterFreeze 0x4000 +-#define bCCKTxPathSel 0x10000000 +-#define bCCKDefaultRxPath 0xc000000 +-#define bCCKOptionRxPath 0x3000000 +- +-// 6. PageE(0xE00) +-#define bSTBCEn 0x4 // Useless +-#define bAntennaMapping 0x10 +-#define bNss 0x20 +-#define bCFOAntSumD 0x200 +-#define bPHYCounterReset 0x8000000 +-#define bCFOReportGet 0x4000000 +-#define bOFDMContinueTx 0x10000000 +-#define bOFDMSingleCarrier 0x20000000 +-#define bOFDMSingleTone 0x40000000 +- +- +-// +-// Other Definition +-// +- +-#define bEnable 0x1 // Useless +-#define bDisable 0x0 +- +-//byte endable for srwrite +-#define bByte0 0x1 // Useless +-#define bByte1 0x2 +-#define bByte2 0x4 +-#define bByte3 0x8 +-#define bWord0 0x3 +-#define bWord1 0xc +-#define bDWord 0xf +- +-//for PutRegsetting & GetRegSetting BitMask +-#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f +-#define bMaskByte1 0xff00 +-#define bMaskByte2 0xff0000 +-#define bMaskByte3 0xff000000 +-#define bMaskHWord 0xffff0000 +-#define bMaskLWord 0x0000ffff +-#define bMaskDWord 0xffffffff +-#define bMaskH3Bytes 0xffffff00 +-#define bMask12Bits 0xfff +-#define bMaskH4Bits 0xf0000000 +-#define bMaskOFDM_D 0xffc00000 +-#define bMaskCCK 0x3f3f3f3f +- +- +-/*--------------------------Define Parameters-------------------------------*/ +- +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8812PHYREG_H__ ++#define __INC_HAL8812PHYREG_H__ ++/*--------------------------Define Parameters-------------------------------*/ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// BB Register Definition ++ ++#define rCCAonSec_Jaguar 0x838 ++#define rPwed_TH_Jaguar 0x830 ++ ++// BW and sideband setting ++#define rBWIndication_Jaguar 0x834 ++#define rL1PeakTH_Jaguar 0x848 ++#define rFPGA0_XA_LSSIReadBack 0x8a0 /*Tranceiver LSSI Readback*/ ++#define rRFMOD_Jaguar 0x8ac //RF mode ++#define rADC_Buf_Clk_Jaguar 0x8c4 ++#define rRFECTRL_Jaguar 0x900 ++#define bRFMOD_Jaguar 0xc3 ++#define rCCK_System_Jaguar 0xa00 // for cck sideband ++#define bCCK_System_Jaguar 0x10 ++ ++// Block & Path enable ++#define rOFDMCCKEN_Jaguar 0x808 // OFDM/CCK block enable ++#define bOFDMEN_Jaguar 0x20000000 ++#define bCCKEN_Jaguar 0x10000000 ++#define rRxPath_Jaguar 0x808 // Rx antenna ++#define bRxPath_Jaguar 0xff ++#define rTxPath_Jaguar 0x80c // Tx antenna ++#define bTxPath_Jaguar 0x0fffffff ++#define rCCK_RX_Jaguar 0xa04 // for cck rx path selection ++#define bCCK_RX_Jaguar 0x0c000000 ++#define rVhtlen_Use_Lsig_Jaguar 0x8c3 // Use LSIG for VHT length ++ ++// RF read/write-related ++#define rHSSIRead_Jaguar 0x8b0 // RF read addr ++#define bHSSIRead_addr_Jaguar 0xff ++#define bHSSIRead_trigger_Jaguar 0x100 ++#define rA_PIRead_Jaguar 0xd04 // RF readback with PI ++#define rB_PIRead_Jaguar 0xd44 // RF readback with PI ++#define rA_SIRead_Jaguar 0xd08 // RF readback with SI ++#define rB_SIRead_Jaguar 0xd48 // RF readback with SI ++#define rRead_data_Jaguar 0xfffff ++#define rA_LSSIWrite_Jaguar 0xc90 // RF write addr ++#define rB_LSSIWrite_Jaguar 0xe90 // RF write addr ++#define bLSSIWrite_data_Jaguar 0x000fffff ++#define bLSSIWrite_addr_Jaguar 0x0ff00000 ++ ++ ++ ++// YN: mask the following register definition temporarily ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++//#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++//#define rFPGA0_XCD_RFParameter 0x87c ++ ++//#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++//#define rFPGA0_AnalogParameter2 0x884 ++//#define rFPGA0_AnalogParameter3 0x888 ++//#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++//#define rFPGA0_AnalogParameter4 0x88c ++ ++ ++// CCK TX scaling ++#define rCCK_TxFilter1_Jaguar 0xa20 ++#define bCCK_TxFilter1_C0_Jaguar 0x00ff0000 ++#define bCCK_TxFilter1_C1_Jaguar 0xff000000 ++#define rCCK_TxFilter2_Jaguar 0xa24 ++#define bCCK_TxFilter2_C2_Jaguar 0x000000ff ++#define bCCK_TxFilter2_C3_Jaguar 0x0000ff00 ++#define bCCK_TxFilter2_C4_Jaguar 0x00ff0000 ++#define bCCK_TxFilter2_C5_Jaguar 0xff000000 ++#define rCCK_TxFilter3_Jaguar 0xa28 ++#define bCCK_TxFilter3_C6_Jaguar 0x000000ff ++#define bCCK_TxFilter3_C7_Jaguar 0x0000ff00 ++ ++ ++// YN: mask the following register definition temporarily ++//#define rPdp_AntA 0xb00 ++//#define rPdp_AntA_4 0xb04 ++//#define rConfig_Pmpd_AntA 0xb28 ++//#define rConfig_AntA 0xb68 ++//#define rConfig_AntB 0xb6c ++//#define rPdp_AntB 0xb70 ++//#define rPdp_AntB_4 0xb74 ++//#define rConfig_Pmpd_AntB 0xb98 ++//#define rAPK 0xbd8 ++ ++// RXIQC ++#define rA_RxIQC_AB_Jaguar 0xc10 //RxIQ imblance matrix coeff. A & B ++#define rA_RxIQC_CD_Jaguar 0xc14 //RxIQ imblance matrix coeff. C & D ++#define rA_TxScale_Jaguar 0xc1c // Pah_A TX scaling factor ++#define rB_TxScale_Jaguar 0xe1c // Path_B TX scaling factor ++#define rB_RxIQC_AB_Jaguar 0xe10 //RxIQ imblance matrix coeff. A & B ++#define rB_RxIQC_CD_Jaguar 0xe14 //RxIQ imblance matrix coeff. C & D ++#define b_RxIQC_AC_Jaguar 0x02ff // bit mask for IQC matrix element A & C ++#define b_RxIQC_BD_Jaguar 0x02ff0000 // bit mask for IQC matrix element A & C ++ ++ ++// DIG-related ++#define rA_IGI_Jaguar 0xc50 // Initial Gain for path-A ++#define rB_IGI_Jaguar 0xe50 // Initial Gain for path-B ++#define rOFDM_FalseAlarm1_Jaguar 0xf48 // counter for break ++#define rOFDM_FalseAlarm2_Jaguar 0xf4c // counter for spoofing ++#define rCCK_FalseAlarm_Jaguar 0xa5c // counter for cck false alarm ++#define b_FalseAlarm_Jaguar 0xffff ++#define rCCK_CCA_Jaguar 0xa08 // cca threshold ++#define bCCK_CCA_Jaguar 0x00ff0000 ++ ++// Tx Power Ttraining-related ++#define rA_TxPwrTraing_Jaguar 0xc54 ++#define rB_TxPwrTraing_Jaguar 0xe54 ++ ++// Report-related ++#define rOFDM_ShortCFOAB_Jaguar 0xf60 ++#define rOFDM_LongCFOAB_Jaguar 0xf64 ++#define rOFDM_EndCFOAB_Jaguar 0xf70 ++#define rOFDM_AGCReport_Jaguar 0xf84 ++#define rOFDM_RxSNR_Jaguar 0xf88 ++#define rOFDM_RxEVMCSI_Jaguar 0xf8c ++#define rOFDM_SIGReport_Jaguar 0xf90 ++ ++// Misc functions ++#define rEDCCA_Jaguar 0x8a4 // EDCCA ++#define bEDCCA_Jaguar 0xffff ++#define rAGC_table_Jaguar 0x82c // AGC tabel select ++#define bAGC_table_Jaguar 0x3 ++#define b_sel5g_Jaguar 0x1000 // sel5g ++#define b_LNA_sw_Jaguar 0x8000 // HW/WS control for LNA ++#define rFc_area_Jaguar 0x860 // fc_area ++#define bFc_area_Jaguar 0x1ffe000 ++#define rSingleTone_ContTx_Jaguar 0x914 ++ ++// RFE ++#define rA_RFE_Pinmux_Jaguar 0xcb0 // Path_A RFE cotrol pinmux ++#define rB_RFE_Pinmux_Jaguar 0xeb0 // Path_B RFE control pinmux ++#define rA_RFE_Inv_Jaguar 0xcb4 // Path_A RFE cotrol ++#define rB_RFE_Inv_Jaguar 0xeb4 // Path_B RFE control ++#define rA_RFE_Jaguar 0xcb8 // Path_A RFE cotrol ++#define rB_RFE_Jaguar 0xeb8 // Path_B RFE control ++#define r_ANTSEL_SW_Jaguar 0x900 // ANTSEL SW Control ++#define bMask_RFEInv_Jaguar 0x3ff00000 ++#define bMask_AntselPathFollow_Jaguar 0x00030000 ++ ++// TX AGC ++#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 ++#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 ++#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 ++#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c ++#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 ++#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 ++#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 ++#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c ++#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 ++#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 ++#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 ++#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c ++#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 ++#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 ++#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 ++#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c ++#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 ++#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 ++#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 ++#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c ++#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 ++#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 ++#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 ++#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c ++#define bTxAGC_byte0_Jaguar 0xff ++#define bTxAGC_byte1_Jaguar 0xff00 ++#define bTxAGC_byte2_Jaguar 0xff0000 ++#define bTxAGC_byte3_Jaguar 0xff000000 ++ ++// IQK YN: temporaily mask this part ++//#define rFPGA0_IQK 0xe28 ++//#define rTx_IQK_Tone_A 0xe30 ++//#define rRx_IQK_Tone_A 0xe34 ++//#define rTx_IQK_PI_A 0xe38 ++//#define rRx_IQK_PI_A 0xe3c ++ ++//#define rTx_IQK 0xe40 ++//#define rRx_IQK 0xe44 ++//#define rIQK_AGC_Pts 0xe48 ++//#define rIQK_AGC_Rsp 0xe4c ++//#define rTx_IQK_Tone_B 0xe50 ++//#define rRx_IQK_Tone_B 0xe54 ++//#define rTx_IQK_PI_B 0xe58 ++//#define rRx_IQK_PI_B 0xe5c ++//#define rIQK_AGC_Cont 0xe60 ++ ++ ++// AFE-related ++#define rA_AFEPwr1_Jaguar 0xc60 // dynamic AFE power control ++#define rA_AFEPwr2_Jaguar 0xc64 // dynamic AFE power control ++#define rA_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xc68 ++#define rA_Tx_CCKBBON_OFDMRFON_Jaguar 0xc6c ++#define rA_Tx_OFDMBBON_Tx2Rx_Jaguar 0xc70 ++#define rA_Tx2Tx_RXCCK_Jaguar 0xc74 ++#define rA_Rx_OFDM_WaitRIFS_Jaguar 0xc78 ++#define rA_Rx2Rx_BT_Jaguar 0xc7c ++#define rA_sleep_nav_Jaguar 0xc80 ++#define rA_pmpd_Jaguar 0xc84 ++#define rB_AFEPwr1_Jaguar 0xe60 // dynamic AFE power control ++#define rB_AFEPwr2_Jaguar 0xe64 // dynamic AFE power control ++#define rB_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xe68 ++#define rB_Tx_CCKBBON_OFDMRFON_Jaguar 0xe6c ++#define rB_Tx_OFDMBBON_Tx2Rx_Jaguar 0xe70 ++#define rB_Tx2Tx_RXCCK_Jaguar 0xe74 ++#define rB_Rx_OFDM_WaitRIFS_Jaguar 0xe78 ++#define rB_Rx2Rx_BT_Jaguar 0xe7c ++#define rB_sleep_nav_Jaguar 0xe80 ++#define rB_pmpd_Jaguar 0xe84 ++ ++ ++// YN: mask these registers temporaily ++//#define rTx_Power_Before_IQK_A 0xe94 ++//#define rTx_Power_After_IQK_A 0xe9c ++ ++//#define rRx_Power_Before_IQK_A 0xea0 ++//#define rRx_Power_Before_IQK_A_2 0xea4 ++//#define rRx_Power_After_IQK_A 0xea8 ++//#define rRx_Power_After_IQK_A_2 0xeac ++ ++//#define rTx_Power_Before_IQK_B 0xeb4 ++//#define rTx_Power_After_IQK_B 0xebc ++ ++//#define rRx_Power_Before_IQK_B 0xec0 ++//#define rRx_Power_Before_IQK_B_2 0xec4 ++//#define rRx_Power_After_IQK_B 0xec8 ++//#define rRx_Power_After_IQK_B_2 0xecc ++ ++ ++// RSSI Dump ++#define rA_RSSIDump_Jaguar 0xBF0 ++#define rB_RSSIDump_Jaguar 0xBF1 ++#define rS1_RXevmDump_Jaguar 0xBF4 ++#define rS2_RXevmDump_Jaguar 0xBF5 ++#define rA_RXsnrDump_Jaguar 0xBF6 ++#define rB_RXsnrDump_Jaguar 0xBF7 ++#define rA_CfoShortDump_Jaguar 0xBF8 ++#define rB_CfoShortDump_Jaguar 0xBFA ++#define rA_CfoLongDump_Jaguar 0xBEC ++#define rB_CfoLongDump_Jaguar 0xBEE ++ ++ ++// RF Register ++// ++#define RF_AC_Jaguar 0x00 // ++#define RF_RF_Top_Jaguar 0x07 // ++#define RF_TXLOK_Jaguar 0x08 // ++#define RF_TXAPK_Jaguar 0x0B ++#define RF_CHNLBW_Jaguar 0x18 // RF channel and BW switch ++#define RF_RCK1_Jaguar 0x1c // ++#define RF_RCK2_Jaguar 0x1d ++#define RF_RCK3_Jaguar 0x1e ++#define RF_ModeTableAddr 0x30 ++#define RF_ModeTableData0 0x31 ++#define RF_ModeTableData1 0x32 ++#define RF_TxLCTank_Jaguar 0x54 ++#define RF_APK_Jaguar 0x63 ++#define RF_LCK 0xB4 ++#define RF_WeLut_Jaguar 0xEF ++ ++#define bRF_CHNLBW_MOD_AG_Jaguar 0x70300 ++#define bRF_CHNLBW_BW 0xc00 ++ ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_RCK_OS 0x30 // RF TX PA control ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_0x52 0x52 ++#define RF_WE_LUT 0xEF ++ ++#define RF_TX_GAIN_OFFSET_8812A(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) ++#define RF_TX_GAIN_OFFSET_8821A(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 ++#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++#define rFPGA0_AnalogParameter4 0x88c ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XCD_RFPara 0x8b4 ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// PageA(0xA00) ++// ++#define rCCK0_System 0xa00 ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rConfig_Pmpd_AntB 0xb98 ++#define rAPK 0xbd8 ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++ ++ ++// ++// Other Definition ++// ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++//byte endable for srwrite ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PwrSeq.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PwrSeq.h +old mode 100755 +new mode 100644 +index 0d0c2f7..fdf127c +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PwrSeq.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8812PwrSeq.h +@@ -1,210 +1,210 @@ +- +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +- +-#ifndef __HAL8812PWRSEQ_H__ +-#define __HAL8812PWRSEQ_H__ +- +-#include "HalPwrSeqCmd.h" +- +-/* +- Check document WB-110628-DZ-RTL8195 (Jaguar) Power Architecture-R04.pdf +- There are 6 HW Power States: +- 0: POFF--Power Off +- 1: PDN--Power Down +- 2: CARDEMU--Card Emulation +- 3: ACT--Active Mode +- 4: LPS--Low Power State +- 5: SUS--Suspend +- +- The transision from different states are defined below +- TRANS_CARDEMU_TO_ACT +- TRANS_ACT_TO_CARDEMU +- TRANS_CARDEMU_TO_SUS +- TRANS_SUS_TO_CARDEMU +- TRANS_CARDEMU_TO_PDN +- TRANS_ACT_TO_LPS +- TRANS_LPS_TO_ACT +- +- TRANS_END +-*/ +-#define RTL8812_TRANS_CARDEMU_TO_ACT_STEPS 15 +-#define RTL8812_TRANS_ACT_TO_CARDEMU_STEPS 15 +-#define RTL8812_TRANS_CARDEMU_TO_SUS_STEPS 15 +-#define RTL8812_TRANS_SUS_TO_CARDEMU_STEPS 15 +-#define RTL8812_TRANS_CARDEMU_TO_PDN_STEPS 15 +-#define RTL8812_TRANS_PDN_TO_CARDEMU_STEPS 15 +-#define RTL8812_TRANS_ACT_TO_LPS_STEPS 15 +-#define RTL8812_TRANS_LPS_TO_ACT_STEPS 15 +-#define RTL8812_TRANS_END_STEPS 1 +- +- +-#define RTL8812_TRANS_CARDEMU_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/* disable WL suspend*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ +- +-#define RTL8812_TRANS_ACT_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ +- {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ +- /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},//0x1F[7:0] = 0 turn off RF*/ \ +- /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},//0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x28}, /* 0x07[7:0] = 0x28 sps pwm mode */ \ +- {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ +- /*{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0}, // 0x02[1:0] = 0 reset BB */ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ +- +-#define RTL8812_TRANS_CARDEMU_TO_SUS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},\ +- {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},\ +- {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ +- {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ +- {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ +- {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* suspend option all off */ \ +- {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ +- {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ +- {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'11 enable WL suspend for PCIe*/ +- +-#define RTL8812_TRANS_SUS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO sleep mode leave */ \ +- {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ +- {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ +- {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ +- {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ +- +-#define RTL8812_TRANS_CARDEMU_TO_CARDDIS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- /**{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, //0x194[0]=0 , disable 32K clock*/ \ +- /**{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x94}, //0x93=0x94 , 90[30] =0 enable 500k ANA clock .switch clock from 12M to 500K , 90 [26] =0 disable EEprom loader clock*/ \ +- {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x03[2] = 0, reset 8051*/ \ +- {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x05}, /*0x80=05h if reload fw, fill the default value of host_CPU handshake field*/ \ +- {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},\ +- {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},\ +- {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ +- {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ +- {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ +- {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ +- {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ +- {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ +- {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/*0x12[0] = 0 force PFM mode */ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ +- {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ +- {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x01f[1]=0 , disable RFC_0 control REG_RF_CTRL_8812 */ \ +- {0x0076, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x076[1]=0 , disable RFC_1 control REG_OPT_CTRL_8812 +2 */ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'01 enable WL suspend*/ +- +-#define RTL8812_TRANS_CARDDIS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*0x12[0] = 1 force PWM mode */ \ +- {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ +- {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO leave sleep mode */ \ +- {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ +- {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x04[10] = 0, enable SW LPS PCIE only*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ +- {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x03[2] = 1, enable 8051*/ \ +- {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ +- +- +-#define RTL8812_TRANS_CARDEMU_TO_PDN \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ +- +-#define RTL8812_TRANS_PDN_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ +- +-#define RTL8812_TRANS_ACT_TO_LPS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ +- {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ +- {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated,and RF closed*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ +- {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ +- +- +-#define RTL8812_TRANS_LPS_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/ \ +- {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/ \ +- {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/ \ +- {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/ \ +- {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/ \ +- {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/ \ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ +- +-#define RTL8812_TRANS_END \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // +- +- +-extern WLAN_PWR_CFG rtl8812_power_on_flow[RTL8812_TRANS_CARDEMU_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8812_radio_off_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8812_card_disable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8812_card_enable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8812_suspend_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8812_resume_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8812_hwpdn_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8812_enter_lps_flow[RTL8812_TRANS_ACT_TO_LPS_STEPS+RTL8812_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8812_leave_lps_flow[RTL8812_TRANS_LPS_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]; +- +-#endif //__HAL8812PWRSEQ_H__ +- ++ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL8812PWRSEQ_H__ ++#define __HAL8812PWRSEQ_H__ ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WB-110628-DZ-RTL8195 (Jaguar) Power Architecture-R04.pdf ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8812_TRANS_CARDEMU_TO_ACT_STEPS 15 ++#define RTL8812_TRANS_ACT_TO_CARDEMU_STEPS 15 ++#define RTL8812_TRANS_CARDEMU_TO_SUS_STEPS 15 ++#define RTL8812_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8812_TRANS_CARDEMU_TO_PDN_STEPS 15 ++#define RTL8812_TRANS_PDN_TO_CARDEMU_STEPS 15 ++#define RTL8812_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8812_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8812_TRANS_END_STEPS 1 ++ ++ ++#define RTL8812_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ /*{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/* disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ ++ ++#define RTL8812_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ ++ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},//0x1F[7:0] = 0 turn off RF*/ \ ++ /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},//0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x2A}, /* 0x07[7:0] = 0x28 sps pwm mode 0x2a for BT coex*/ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ ++ /*{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0}, // 0x02[1:0] = 0 reset BB */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ ++ ++#define RTL8812_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},\ ++ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},\ ++ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ ++ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ ++ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* suspend option all off */ \ ++ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'11 enable WL suspend for PCIe*/ ++ ++#define RTL8812_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO sleep mode leave */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ ++ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ ++ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ ++ ++#define RTL8812_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ /**{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, //0x194[0]=0 , disable 32K clock*/ \ ++ /**{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x94}, //0x93=0x94 , 90[30] =0 enable 500k ANA clock .switch clock from 12M to 500K , 90 [26] =0 disable EEprom loader clock*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x03[2] = 0, reset 8051*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x05}, /*0x80=05h if reload fw, fill the default value of host_CPU handshake field*/ \ ++ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},\ ++ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},\ ++ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ ++ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ ++ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ ++ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ ++ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/*0x12[0] = 0 force PFM mode */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x01f[1]=0 , disable RFC_0 control REG_RF_CTRL_8812 */ \ ++ {0x0076, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x076[1]=0 , disable RFC_1 control REG_OPT_CTRL_8812 +2 */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'01 enable WL suspend*/ ++ ++#define RTL8812_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*0x12[0] = 1 force PWM mode */ \ ++ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO leave sleep mode */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ ++ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x04[10] = 0, enable SW LPS PCIE only*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x03[2] = 1, enable 8051*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ ++ ++ ++#define RTL8812_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8812_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8812_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ ++ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated,and RF closed*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ ++ ++ ++#define RTL8812_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/ \ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/ \ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/ \ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/ \ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8812_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8812_power_on_flow[RTL8812_TRANS_CARDEMU_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_radio_off_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_card_disable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_card_enable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_suspend_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_resume_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_hwpdn_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_enter_lps_flow[RTL8812_TRANS_ACT_TO_LPS_STEPS+RTL8812_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8812_leave_lps_flow[RTL8812_TRANS_LPS_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]; ++ ++#endif //__HAL8812PWRSEQ_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8814PhyCfg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8814PhyCfg.h +new file mode 100644 +index 0000000..4772692 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8814PhyCfg.h +@@ -0,0 +1,282 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8814PHYCFG_H__ ++#define __INC_HAL8814PHYCFG_H__ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0B ++#else ++#define MAX_AGGR_NUM 0x07 ++#endif // CONFIG_PCI_HCI ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/* BB/RF related */ ++ ++#define SIC_ENABLE 0 ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++//1. BB register R/W API ++ ++extern u32 ++PHY_QueryBBReg8814A( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++ ++ ++VOID ++PHY_SetBBReg8814A( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++ ++extern u32 ++PHY_QueryRFReg8814A( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++ ++ ++void ++PHY_SetRFReg8814A( IN PADAPTER Adapter, ++ IN u8 eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++//1 3. Initial BB/RF config by reading MAC/BB/RF txt. ++s32 ++phy_BB8814A_Config_ParaFile( ++ IN PADAPTER Adapter ++ ); ++ ++ ++RT_STATUS ++PHY_BBConfigMP_8814A( ++ IN PADAPTER Adapter ++ ); ++ ++VOID ++PHY_ConfigBB_8814A( ++ IN PADAPTER Adapter ++ ); ++ ++ ++VOID ++phy_ADC_CLK_8814A( ++ IN PADAPTER Adapter ++ ); ++ ++s32 ++PHY_RFConfig8814A( ++ IN PADAPTER Adapter ++ ); ++ ++// ++// RF Power setting ++// ++//BOOLEAN PHY_SetRFPowerState8814A(PADAPTER Adapter, rt_rf_power_state eRFPowerState); ++ ++//1 5. Tx Power setting API ++ ++VOID ++PHY_GetTxPowerLevel8814( ++ IN PADAPTER Adapter, ++ OUT ps4Byte powerlevel ++ ); ++ ++VOID ++PHY_SetTxPowerLevel8814( ++ IN PADAPTER Adapter, ++ IN u8 Channel ++ ); ++ ++u8 ++PHY_GetTxPowerIndex_8814A( ++ IN PADAPTER Adapter, ++ IN u8 RFPath, ++ IN u8 Rate, ++ IN CHANNEL_WIDTH BandWidth, ++ IN u8 Channel ++ ); ++ ++VOID ++PHY_SetTxPowerIndex_8814A( ++ IN PADAPTER Adapter, ++ IN u32 PowerIndex, ++ IN u8 RFPath, ++ IN u8 Rate ++ ); ++ ++ ++BOOLEAN ++PHY_UpdateTxPowerDbm8814A( ++ IN PADAPTER Adapter, ++ IN s4Byte powerInDbm ++ ); ++ ++ ++u32 ++PHY_GetTxBBSwing_8814A( ++ IN PADAPTER Adapter, ++ IN BAND_TYPE Band, ++ IN u8 RFPath ++ ); ++ ++ ++ ++//1 6. Channel setting API ++ ++VOID ++PHY_SwChnlTimerCallback8814A( ++ IN PRT_TIMER pTimer ++ ); ++ ++VOID ++PHY_SwChnlWorkItemCallback8814A( ++ IN PVOID pContext ++ ); ++ ++ ++VOID ++HAL_HandleSwChnl8814A( ++ IN PADAPTER pAdapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SwChnlSynchronously8814A( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ ++VOID ++PHY_SwChnlAndSetBWModeCallback8814A(IN PVOID pContext); ++ ++ ++VOID ++PHY_HandleSwChnlAndSetBW8814A( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bSwitchChannel, ++ IN BOOLEAN bSetBandWidth, ++ IN u8 ChannelNum, ++ IN CHANNEL_WIDTH ChnlWidth, ++ IN u8 ChnlOffsetOf40MHz, ++ IN u8 ChnlOffsetOf80MHz, ++ IN u8 CenterFrequencyIndex1 ++); ++ ++ ++BOOLEAN ++PHY_QueryRFPathSwitch_8814A( IN PADAPTER pAdapter); ++ ++ ++ ++//VOID PHY_SetMonitorMode8814A(PADAPTER pAdapter, BOOLEAN bEnableMonitorMode); ++ ++ ++#if (USE_WORKITEM) ++VOID ++RtCheckForHangWorkItemCallback8814A( ++ IN PVOID pContext ++); ++#endif ++ ++BOOLEAN ++SetAntennaConfig8814A( ++ IN PADAPTER Adapter, ++ IN u8 DefaultAnt ++ ); ++ ++VOID ++PHY_SetRFEReg8814A( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bInit, ++ IN u8 Band ++ ); ++ ++ ++s32 ++PHY_SwitchWirelessBand8814A( ++ IN PADAPTER Adapter, ++ IN u8 Band ++); ++ ++VOID ++PHY_SetIO_8814A( ++ PADAPTER pAdapter ++ ); ++ ++VOID ++PHY_SetBWMode8814( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth, // 20M or 40M ++ IN u8 Offset // Upper, Lower, or Don't care ++); ++ ++VOID ++PHY_SwChnl8814( ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ); ++ ++VOID ++PHY_SetSwChnlBWMode8814( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN CHANNEL_WIDTH Bandwidth, ++ IN u8 Offset40, ++ IN u8 Offset80 ++); ++ ++s32 PHY_MACConfig8814(PADAPTER Adapter); ++int PHY_BBConfig8814(PADAPTER Adapter); ++VOID PHY_Set_SecCCATH_by_RXANT_8814A(PADAPTER pAdapter, u4Byte ulAntennaRx); ++ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++#endif // __INC_HAL8192CPHYCFG_H ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8814PhyReg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8814PhyReg.h +new file mode 100644 +index 0000000..89fe053 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8814PhyReg.h +@@ -0,0 +1,867 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8814PHYREG_H__ ++#define __INC_HAL8814PHYREG_H__ ++/*--------------------------Define Parameters-------------------------------*/ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++/* BB Register Definition */ ++ ++#define rCCAonSec_Jaguar 0x838 ++#define rPwed_TH_Jaguar 0x830 ++#define rL1_Weight_Jaguar 0x840 ++#define r_L1_SBD_start_time 0x844 ++ ++// BW and sideband setting ++#define rBWIndication_Jaguar 0x834 ++#define rL1PeakTH_Jaguar 0x848 ++#define rRFMOD_Jaguar 0x8ac //RF mode ++#define rADC_Buf_Clk_Jaguar 0x8c4 ++#define rADC_Buf_40_Clk_Jaguar2 0x8c8 ++#define rRFECTRL_Jaguar 0x900 ++#define bRFMOD_Jaguar 0xc3 ++#define rCCK_System_Jaguar 0xa00 // for cck sideband ++#define bCCK_System_Jaguar 0x10 ++ ++// Block & Path enable ++#define rOFDMCCKEN_Jaguar 0x808 // OFDM/CCK block enable ++#define bOFDMEN_Jaguar 0x20000000 ++#define bCCKEN_Jaguar 0x10000000 ++#define rRxPath_Jaguar 0x808 // Rx antenna ++#define bRxPath_Jaguar 0xff ++#define rTxPath_Jaguar 0x80c // Tx antenna ++#define bTxPath_Jaguar 0x0fffffff ++#define rCCK_RX_Jaguar 0xa04 // for cck rx path selection ++#define bCCK_RX_Jaguar 0x0c000000 ++#define rVhtlen_Use_Lsig_Jaguar 0x8c3 // Use LSIG for VHT length ++ ++#define rRxPath_Jaguar2 0xa04 // Rx antenna ++#define rTxAnt_1Nsts_Jaguar2 0x93c // Tx antenna for 1Nsts ++#define rTxAnt_23Nsts_Jaguar2 0x940 // Tx antenna for 2Nsts and 3Nsts ++ ++ ++// RF read/write-related ++#define rHSSIRead_Jaguar 0x8b0 // RF read addr ++#define bHSSIRead_addr_Jaguar 0xff ++#define bHSSIRead_trigger_Jaguar 0x100 ++#define rA_PIRead_Jaguar 0xd04 // RF readback with PI ++#define rB_PIRead_Jaguar 0xd44 // RF readback with PI ++#define rA_SIRead_Jaguar 0xd08 // RF readback with SI ++#define rB_SIRead_Jaguar 0xd48 // RF readback with SI ++#define rRead_data_Jaguar 0xfffff ++#define rA_LSSIWrite_Jaguar 0xc90 // RF write addr ++#define rB_LSSIWrite_Jaguar 0xe90 // RF write addr ++#define bLSSIWrite_data_Jaguar 0x000fffff ++#define bLSSIWrite_addr_Jaguar 0x0ff00000 ++ ++#define rC_PIRead_Jaguar2 0xd84 // RF readback with PI ++#define rD_PIRead_Jaguar2 0xdC4 // RF readback with PI ++#define rC_SIRead_Jaguar2 0xd88 // RF readback with SI ++#define rD_SIRead_Jaguar2 0xdC8 // RF readback with SI ++#define rC_LSSIWrite_Jaguar2 0x1890 // RF write addr ++#define rD_LSSIWrite_Jaguar2 0x1A90 // RF write addr ++ ++ ++// YN: mask the following register definition temporarily ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++//#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++//#define rFPGA0_XCD_RFParameter 0x87c ++ ++//#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++//#define rFPGA0_AnalogParameter2 0x884 ++//#define rFPGA0_AnalogParameter3 0x888 ++//#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++//#define rFPGA0_AnalogParameter4 0x88c ++ ++ ++// CCK TX scaling ++#define rCCK_TxFilter1_Jaguar 0xa20 ++#define bCCK_TxFilter1_C0_Jaguar 0x00ff0000 ++#define bCCK_TxFilter1_C1_Jaguar 0xff000000 ++#define rCCK_TxFilter2_Jaguar 0xa24 ++#define bCCK_TxFilter2_C2_Jaguar 0x000000ff ++#define bCCK_TxFilter2_C3_Jaguar 0x0000ff00 ++#define bCCK_TxFilter2_C4_Jaguar 0x00ff0000 ++#define bCCK_TxFilter2_C5_Jaguar 0xff000000 ++#define rCCK_TxFilter3_Jaguar 0xa28 ++#define bCCK_TxFilter3_C6_Jaguar 0x000000ff ++#define bCCK_TxFilter3_C7_Jaguar 0x0000ff00 ++/* NBI & CSI Mask setting */ ++#define rCSI_Mask_Setting1_Jaguar 0x874 ++#define rCSI_Fix_Mask0_Jaguar 0x880 ++#define rCSI_Fix_Mask1_Jaguar 0x884 ++#define rCSI_Fix_Mask2_Jaguar 0x888 ++#define rCSI_Fix_Mask3_Jaguar 0x88c ++#define rCSI_Fix_Mask4_Jaguar 0x890 ++#define rCSI_Fix_Mask5_Jaguar 0x894 ++#define rCSI_Fix_Mask6_Jaguar 0x898 ++#define rCSI_Fix_Mask7_Jaguar 0x89c ++#define rNBI_Setting_Jaguar 0x87c ++ ++ ++// YN: mask the following register definition temporarily ++//#define rPdp_AntA 0xb00 ++//#define rPdp_AntA_4 0xb04 ++//#define rConfig_Pmpd_AntA 0xb28 ++//#define rConfig_AntA 0xb68 ++//#define rConfig_AntB 0xb6c ++//#define rPdp_AntB 0xb70 ++//#define rPdp_AntB_4 0xb74 ++//#define rConfig_Pmpd_AntB 0xb98 ++//#define rAPK 0xbd8 ++ ++// RXIQC ++#define rA_RxIQC_AB_Jaguar 0xc10 //RxIQ imblance matrix coeff. A & B ++#define rA_RxIQC_CD_Jaguar 0xc14 //RxIQ imblance matrix coeff. C & D ++#define rA_TxScale_Jaguar 0xc1c // Pah_A TX scaling factor ++#define rB_TxScale_Jaguar 0xe1c // Path_B TX scaling factor ++#define rB_RxIQC_AB_Jaguar 0xe10 //RxIQ imblance matrix coeff. A & B ++#define rB_RxIQC_CD_Jaguar 0xe14 //RxIQ imblance matrix coeff. C & D ++#define b_RxIQC_AC_Jaguar 0x02ff // bit mask for IQC matrix element A & C ++#define b_RxIQC_BD_Jaguar 0x02ff0000 // bit mask for IQC matrix element A & C ++ ++#define rC_TxScale_Jaguar2 0x181c // Pah_C TX scaling factor ++#define rD_TxScale_Jaguar2 0x1A1c // Path_D TX scaling factor ++#define rRF_TxGainOffset 0x55 ++ ++// DIG-related ++#define rA_IGI_Jaguar 0xc50 // Initial Gain for path-A ++#define rB_IGI_Jaguar 0xe50 // Initial Gain for path-B ++#define rC_IGI_Jaguar2 0x1850 // Initial Gain for path-C ++#define rD_IGI_Jaguar2 0x1A50 // Initial Gain for path-D ++ ++#define rOFDM_FalseAlarm1_Jaguar 0xf48 // counter for break ++#define rOFDM_FalseAlarm2_Jaguar 0xf4c // counter for spoofing ++#define rCCK_FalseAlarm_Jaguar 0xa5c // counter for cck false alarm ++#define b_FalseAlarm_Jaguar 0xffff ++#define rCCK_CCA_Jaguar 0xa08 // cca threshold ++#define bCCK_CCA_Jaguar 0x00ff0000 ++ ++// Tx Power Ttraining-related ++#define rA_TxPwrTraing_Jaguar 0xc54 ++#define rB_TxPwrTraing_Jaguar 0xe54 ++ ++// Report-related ++#define rOFDM_ShortCFOAB_Jaguar 0xf60 ++#define rOFDM_LongCFOAB_Jaguar 0xf64 ++#define rOFDM_EndCFOAB_Jaguar 0xf70 ++#define rOFDM_AGCReport_Jaguar 0xf84 ++#define rOFDM_RxSNR_Jaguar 0xf88 ++#define rOFDM_RxEVMCSI_Jaguar 0xf8c ++#define rOFDM_SIGReport_Jaguar 0xf90 ++ ++// Misc functions ++#define rEDCCA_Jaguar 0x8a4 // EDCCA ++#define bEDCCA_Jaguar 0xffff ++#define rAGC_table_Jaguar 0x82c // AGC tabel select ++#define bAGC_table_Jaguar 0x3 ++#define b_sel5g_Jaguar 0x1000 // sel5g ++#define b_LNA_sw_Jaguar 0x8000 // HW/WS control for LNA ++#define rFc_area_Jaguar 0x860 // fc_area ++#define bFc_area_Jaguar 0x1ffe000 ++#define rSingleTone_ContTx_Jaguar 0x914 ++ ++#define rAGC_table_Jaguar2 0x958 // AGC tabel select ++#define rDMA_trigger_Jaguar2 0x95C // ADC sample mode ++ ++ ++// RFE ++#define rA_RFE_Pinmux_Jaguar 0xcb0 // Path_A RFE cotrol pinmux ++#define rB_RFE_Pinmux_Jaguar 0xeb0 // Path_B RFE control pinmux ++#define rA_RFE_Inv_Jaguar 0xcb4 // Path_A RFE cotrol ++#define rB_RFE_Inv_Jaguar 0xeb4 // Path_B RFE control ++#define rA_RFE_Jaguar 0xcb8 // Path_A RFE cotrol ++#define rB_RFE_Jaguar 0xeb8 // Path_B RFE control ++#define r_ANTSEL_SW_Jaguar 0x900 // ANTSEL SW Control ++#define bMask_RFEInv_Jaguar 0x3ff00000 ++#define bMask_AntselPathFollow_Jaguar 0x00030000 ++ ++#define rC_RFE_Pinmux_Jaguar 0x18B4 // Path_C RFE cotrol pinmux ++#define rD_RFE_Pinmux_Jaguar 0x1AB4 // Path_D RFE cotrol pinmux ++#define rA_RFE_Sel_Jaguar2 0x1990 ++ ++ ++ ++// TX AGC ++#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 ++#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 ++#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 ++#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c ++#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 ++#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 ++#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 ++#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c ++#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 ++#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 ++#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 ++#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c ++#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 ++#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 ++#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 ++#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c ++#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 ++#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 ++#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 ++#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c ++#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 ++#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 ++#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 ++#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c ++#define bTxAGC_byte0_Jaguar 0xff ++#define bTxAGC_byte1_Jaguar 0xff00 ++#define bTxAGC_byte2_Jaguar 0xff0000 ++#define bTxAGC_byte3_Jaguar 0xff000000 ++ ++ ++// TX AGC ++#define rTxAGC_A_CCK11_CCK1_Jaguar2 0xc20 ++#define rTxAGC_A_Ofdm18_Ofdm6_Jaguar2 0xc24 ++#define rTxAGC_A_Ofdm54_Ofdm24_Jaguar2 0xc28 ++#define rTxAGC_A_MCS3_MCS0_Jaguar2 0xc2c ++#define rTxAGC_A_MCS7_MCS4_Jaguar2 0xc30 ++#define rTxAGC_A_MCS11_MCS8_Jaguar2 0xc34 ++#define rTxAGC_A_MCS15_MCS12_Jaguar2 0xc38 ++#define rTxAGC_A_MCS19_MCS16_Jaguar2 0xcd8 ++#define rTxAGC_A_MCS23_MCS20_Jaguar2 0xcdc ++#define rTxAGC_A_Nss1Index3_Nss1Index0_Jaguar2 0xc3c ++#define rTxAGC_A_Nss1Index7_Nss1Index4_Jaguar2 0xc40 ++#define rTxAGC_A_Nss2Index1_Nss1Index8_Jaguar2 0xc44 ++#define rTxAGC_A_Nss2Index5_Nss2Index2_Jaguar2 0xc48 ++#define rTxAGC_A_Nss2Index9_Nss2Index6_Jaguar2 0xc4c ++#define rTxAGC_A_Nss3Index3_Nss3Index0_Jaguar2 0xce0 ++#define rTxAGC_A_Nss3Index7_Nss3Index4_Jaguar2 0xce4 ++#define rTxAGC_A_Nss3Index9_Nss3Index8_Jaguar2 0xce8 ++#define rTxAGC_B_CCK11_CCK1_Jaguar2 0xe20 ++#define rTxAGC_B_Ofdm18_Ofdm6_Jaguar2 0xe24 ++#define rTxAGC_B_Ofdm54_Ofdm24_Jaguar2 0xe28 ++#define rTxAGC_B_MCS3_MCS0_Jaguar2 0xe2c ++#define rTxAGC_B_MCS7_MCS4_Jaguar2 0xe30 ++#define rTxAGC_B_MCS11_MCS8_Jaguar2 0xe34 ++#define rTxAGC_B_MCS15_MCS12_Jaguar2 0xe38 ++#define rTxAGC_B_MCS19_MCS16_Jaguar2 0xed8 ++#define rTxAGC_B_MCS23_MCS20_Jaguar2 0xedc ++#define rTxAGC_B_Nss1Index3_Nss1Index0_Jaguar2 0xe3c ++#define rTxAGC_B_Nss1Index7_Nss1Index4_Jaguar2 0xe40 ++#define rTxAGC_B_Nss2Index1_Nss1Index8_Jaguar2 0xe44 ++#define rTxAGC_B_Nss2Index5_Nss2Index2_Jaguar2 0xe48 ++#define rTxAGC_B_Nss2Index9_Nss2Index6_Jaguar2 0xe4c ++#define rTxAGC_B_Nss3Index3_Nss3Index0_Jaguar2 0xee0 ++#define rTxAGC_B_Nss3Index7_Nss3Index4_Jaguar2 0xee4 ++#define rTxAGC_B_Nss3Index9_Nss3Index8_Jaguar2 0xee8 ++#define rTxAGC_C_CCK11_CCK1_Jaguar2 0x1820 ++#define rTxAGC_C_Ofdm18_Ofdm6_Jaguar2 0x1824 ++#define rTxAGC_C_Ofdm54_Ofdm24_Jaguar2 0x1828 ++#define rTxAGC_C_MCS3_MCS0_Jaguar2 0x182c ++#define rTxAGC_C_MCS7_MCS4_Jaguar2 0x1830 ++#define rTxAGC_C_MCS11_MCS8_Jaguar2 0x1834 ++#define rTxAGC_C_MCS15_MCS12_Jaguar2 0x1838 ++#define rTxAGC_C_MCS19_MCS16_Jaguar2 0x18d8 ++#define rTxAGC_C_MCS23_MCS20_Jaguar2 0x18dc ++#define rTxAGC_C_Nss1Index3_Nss1Index0_Jaguar2 0x183c ++#define rTxAGC_C_Nss1Index7_Nss1Index4_Jaguar2 0x1840 ++#define rTxAGC_C_Nss2Index1_Nss1Index8_Jaguar2 0x1844 ++#define rTxAGC_C_Nss2Index5_Nss2Index2_Jaguar2 0x1848 ++#define rTxAGC_C_Nss2Index9_Nss2Index6_Jaguar2 0x184c ++#define rTxAGC_C_Nss3Index3_Nss3Index0_Jaguar2 0x18e0 ++#define rTxAGC_C_Nss3Index7_Nss3Index4_Jaguar2 0x18e4 ++#define rTxAGC_C_Nss3Index9_Nss3Index8_Jaguar2 0x18e8 ++#define rTxAGC_D_CCK11_CCK1_Jaguar2 0x1a20 ++#define rTxAGC_D_Ofdm18_Ofdm6_Jaguar2 0x1a24 ++#define rTxAGC_D_Ofdm54_Ofdm24_Jaguar2 0x1a28 ++#define rTxAGC_D_MCS3_MCS0_Jaguar2 0x1a2c ++#define rTxAGC_D_MCS7_MCS4_Jaguar2 0x1a30 ++#define rTxAGC_D_MCS11_MCS8_Jaguar2 0x1a34 ++#define rTxAGC_D_MCS15_MCS12_Jaguar2 0x1a38 ++#define rTxAGC_D_MCS19_MCS16_Jaguar2 0x1ad8 ++#define rTxAGC_D_MCS23_MCS20_Jaguar2 0x1adc ++#define rTxAGC_D_Nss1Index3_Nss1Index0_Jaguar2 0x1a3c ++#define rTxAGC_D_Nss1Index7_Nss1Index4_Jaguar2 0x1a40 ++#define rTxAGC_D_Nss2Index1_Nss1Index8_Jaguar2 0x1a44 ++#define rTxAGC_D_Nss2Index5_Nss2Index2_Jaguar2 0x1a48 ++#define rTxAGC_D_Nss2Index9_Nss2Index6_Jaguar2 0x1a4c ++#define rTxAGC_D_Nss3Index3_Nss3Index0_Jaguar2 0x1ae0 ++#define rTxAGC_D_Nss3Index7_Nss3Index4_Jaguar2 0x1ae4 ++#define rTxAGC_D_Nss3Index9_Nss3Index8_Jaguar2 0x1ae8 ++// IQK YN: temporaily mask this part ++//#define rFPGA0_IQK 0xe28 ++//#define rTx_IQK_Tone_A 0xe30 ++//#define rRx_IQK_Tone_A 0xe34 ++//#define rTx_IQK_PI_A 0xe38 ++//#define rRx_IQK_PI_A 0xe3c ++ ++//#define rTx_IQK 0xe40 ++//#define rRx_IQK 0xe44 ++//#define rIQK_AGC_Pts 0xe48 ++//#define rIQK_AGC_Rsp 0xe4c ++//#define rTx_IQK_Tone_B 0xe50 ++//#define rRx_IQK_Tone_B 0xe54 ++//#define rTx_IQK_PI_B 0xe58 ++//#define rRx_IQK_PI_B 0xe5c ++//#define rIQK_AGC_Cont 0xe60 ++ ++ ++// AFE-related ++#define rA_AFEPwr1_Jaguar 0xc60 // dynamic AFE power control ++#define rA_AFEPwr2_Jaguar 0xc64 // dynamic AFE power control ++#define rA_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xc68 ++#define rA_Tx_CCKBBON_OFDMRFON_Jaguar 0xc6c ++#define rA_Tx_OFDMBBON_Tx2Rx_Jaguar 0xc70 ++#define rA_Tx2Tx_RXCCK_Jaguar 0xc74 ++#define rA_Rx_OFDM_WaitRIFS_Jaguar 0xc78 ++#define rA_Rx2Rx_BT_Jaguar 0xc7c ++#define rA_sleep_nav_Jaguar 0xc80 ++#define rA_pmpd_Jaguar 0xc84 ++#define rB_AFEPwr1_Jaguar 0xe60 // dynamic AFE power control ++#define rB_AFEPwr2_Jaguar 0xe64 // dynamic AFE power control ++#define rB_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xe68 ++#define rB_Tx_CCKBBON_OFDMRFON_Jaguar 0xe6c ++#define rB_Tx_OFDMBBON_Tx2Rx_Jaguar 0xe70 ++#define rB_Tx2Tx_RXCCK_Jaguar 0xe74 ++#define rB_Rx_OFDM_WaitRIFS_Jaguar 0xe78 ++#define rB_Rx2Rx_BT_Jaguar 0xe7c ++#define rB_sleep_nav_Jaguar 0xe80 ++#define rB_pmpd_Jaguar 0xe84 ++ ++ ++// YN: mask these registers temporaily ++//#define rTx_Power_Before_IQK_A 0xe94 ++//#define rTx_Power_After_IQK_A 0xe9c ++ ++//#define rRx_Power_Before_IQK_A 0xea0 ++//#define rRx_Power_Before_IQK_A_2 0xea4 ++//#define rRx_Power_After_IQK_A 0xea8 ++//#define rRx_Power_After_IQK_A_2 0xeac ++ ++//#define rTx_Power_Before_IQK_B 0xeb4 ++//#define rTx_Power_After_IQK_B 0xebc ++ ++//#define rRx_Power_Before_IQK_B 0xec0 ++//#define rRx_Power_Before_IQK_B_2 0xec4 ++//#define rRx_Power_After_IQK_B 0xec8 ++//#define rRx_Power_After_IQK_B_2 0xecc ++ ++ ++// RSSI Dump ++#define rA_RSSIDump_Jaguar 0xBF0 ++#define rB_RSSIDump_Jaguar 0xBF1 ++#define rS1_RXevmDump_Jaguar 0xBF4 ++#define rS2_RXevmDump_Jaguar 0xBF5 ++#define rA_RXsnrDump_Jaguar 0xBF6 ++#define rB_RXsnrDump_Jaguar 0xBF7 ++#define rA_CfoShortDump_Jaguar 0xBF8 ++#define rB_CfoShortDump_Jaguar 0xBFA ++#define rA_CfoLongDump_Jaguar 0xBEC ++#define rB_CfoLongDump_Jaguar 0xBEE ++ ++ ++// RF Register ++// ++#define RF_AC_Jaguar 0x00 // ++#define RF_RF_Top_Jaguar 0x07 // ++#define RF_TXLOK_Jaguar 0x08 // ++#define RF_TXAPK_Jaguar 0x0B ++#define RF_CHNLBW_Jaguar 0x18 // RF channel and BW switch ++#define RF_RCK1_Jaguar 0x1c // ++#define RF_RCK2_Jaguar 0x1d ++#define RF_RCK3_Jaguar 0x1e ++#define RF_ModeTableAddr 0x30 ++#define RF_ModeTableData0 0x31 ++#define RF_ModeTableData1 0x32 ++#define RF_TxLCTank_Jaguar 0x54 ++#define RF_APK_Jaguar 0x63 ++#define RF_LCK 0xB4 ++#define RF_WeLut_Jaguar 0xEF ++ ++#define bRF_CHNLBW_MOD_AG_Jaguar 0x70300 ++#define bRF_CHNLBW_BW 0xc00 ++ ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_RCK_OS 0x30 // RF TX PA control ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_0x52 0x52 ++#define RF_WE_LUT 0xEF ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 ++#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_XCD_RFPara 0x8b4 ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++#define REG_BB_TX_PATH_SEL_1 0x93c ++#define REG_BB_TX_PATH_SEL_2 0x940 ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ /*Page 19 for TxBF*/ ++#define REG_BB_TXBF_ANT_SET_BF1 0x19ac ++#define REG_BB_TXBF_ANT_SET_BF0 0x19b4 ++// ++// PageA(0xA00) ++// ++#define rCCK0_System 0xa00 ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rConfig_Pmpd_AntB 0xb98 ++#define rAPK 0xbd8 ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++#define RF_T_METER_88E 0x42 // ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++ ++ ++// ++// Other Definition ++// ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++//byte endable for srwrite ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH3Bytes 0xffffff00 ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++#define bMask7bits 0x7f ++#define bMaskByte2HighNibble 0x00f00000 ++#define bMaskByte3LowNibble 0x0f000000 ++#define bMaskL3Bytes 0x00ffffff ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8814PwrSeq.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8814PwrSeq.h +new file mode 100644 +index 0000000..ff9ce9e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8814PwrSeq.h +@@ -0,0 +1,237 @@ ++ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL8814PWRSEQ_H__ ++#define __HAL8814PWRSEQ_H__ ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WB-110628-DZ-RTL8195 (Jaguar) Power Architecture-R04.pdf ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8814A_TRANS_CARDEMU_TO_ACT_STEPS 16 ++#define RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS 20 ++#define RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS 17 ++#define RTL8814A_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS 17 ++#define RTL8814A_TRANS_PDN_TO_CARDEMU_STEPS 16 ++#define RTL8814A_TRANS_ACT_TO_LPS_STEPS 20 ++#define RTL8814A_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8814A_TRANS_END_STEPS 1 ++ ++ ++#define RTL8814A_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x002B, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /* ??0x28[24]=1, enable pll phase select*/ \ ++ {0x0015, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT3|BIT2|BIT1), (BIT3|BIT2|BIT1)},/* 0x14[11:9]=3'b111,OCP current threshold=1.5A */ \ ++ {0x002D, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0E, 0x08},/* 0x2C[11:9]=3'b100, select lpf R3 */ \ ++ {0x002D, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x70, 0x50},/* 0x2C[14:12]=3'b101, select lpf Rs*/ \ ++ {0x007B, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* 0x78[30]=1'b1, SDM order select*/ \ ++ /*{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, */ /* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/* disable WL suspend*/ \ ++ {0x00F0, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* */ \ ++ {0x0081, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x30, 0x20},/* */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ ++ ++#define RTL8814A_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ ++ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ ++ {0x0002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ ++ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*0x1F[7:0] = 0 turn off RF*/ \ ++ /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},*/ /*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x28}, /* 0x07[7:0] = 0x28 sps pwm mode 0x2a for BT coex*/ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0}, /*0x8[1] = 0 ANA clk =500k */ \ ++ /*{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0},*/ /* 0x02[1:0] = 0 reset BB */ \ ++ {0x0066, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, /*0x66[7]=0, disable ckreq for gpio7 output SUS */ \ ++ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x41[4]=0, disable sic for gpio7 output SUS */ \ ++ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x42[1]=0, disable ckout for gpio7 output SUS */ \ ++ {0x004e, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x4E[5]=1, disable LED2 for gpio7 output SUS */ \ ++ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x41[0]=0, disable uart for gpio7 output SUS */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ ++ ++#define RTL8814A_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0061, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0F, 0x0c},\ ++ {0x0061, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0F, 0x0E},\ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x0F, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ ++ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ ++ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* suspend option all off */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*0x14[13] = 1 turn on ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* 0x14[14] =1 trun on ZCD */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*0x8[1] = 0 ANA clk =500k */ \ ++ {0x0091, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xA0, 0xA0}, /* 0x91[7]=1 0x91[5]=1 , disable sps,ldo sleep mode */ \ ++ {0x0070, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /* 0x70[3]=1 enable mainbias polling */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 1 enable WL suspend */ ++ ++#define RTL8814A_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 0 enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO sleep mode leave */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* 0x14[14] =0 trun off ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0},/*0x14[13] = 0 turn off ZCD */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ ++ ++#define RTL8814A_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ /**{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, //0x194[0]=0 , disable 32K clock*/ \ ++ /**{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x94}, //0x93=0x94 , 90[30] =0 enable 500k ANA clock .switch clock from 12M to 500K , 90 [26] =0 disable EEprom loader clock*/ \ ++ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x03[2] = 0, reset 3081*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x01}, /*0x80=05h if reload fw, fill the default value of host_CPU handshake field*/ \ ++ {0x0081, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x30}, /*0x80=05h if reload fw, fill the default value of host_CPU handshake field*/ \ ++ /*{0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},*/ \ ++ /*{0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},*/ \ ++ /*{0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},*/ /* gpio11 input mode, gpio10~8 output mode */ \ ++ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ ++ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* 0x15[6] =1 trun on ZCD output */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*0x15[5] = 1 turn on ZCD */ \ ++ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/*0x12[6] = 0 force PFM mode */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*0x8[1] = 0 ANA clk =500k */ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x01f[1]=0 , disable RFC_0 control REG_RF_CTRL_8814A */ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x020[1]=0 , disable RFC_1 control REG_RF_CTRL_8814A */ \ ++ {0x0021, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x021[1]=0 , disable RFC_2 control REG_RF_CTRL_8814A */ \ ++ {0x0076, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x076[1]=0 , disable RFC_3 control REG_OPT_CTRL_8814A +2 */ \ ++ {0x0091, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xA0, 0xA0}, /* 0x91[7]=1 0x91[5]=1 , disable sps,ldo sleep mode */ \ ++ {0x0070, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /* 0x70[3]=1 enable mainbias polling */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 1 enable WL suspend*/ ++ ++#define RTL8814A_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*0x12[6] = 1 force PWM mode */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0},/*0x15[5] = 0 turn off ZCD */ \ ++ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/* 0x15[6] =0 trun off ZCD output */ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0},/*0x23[4] = 0 hpon LDO leave sleep mode */ \ ++ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00}, /* gpio11 input mode, gpio10~8 input mode */ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x04[10] = 0, enable SW LPS PCIE only*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 0, enable WL suspend*/ \ ++ /*{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},*/ /*0x03[2] = 1, enable 3081*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ \ ++ {0x0071, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/*0x70[10] = 0, CPHY_MBIAS_EN disable*/ ++ ++ ++#define RTL8814A_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8814A_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8814A_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ ++ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated,and RF closed*/ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated,and RF closed*/ \ ++ {0x0002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x05F1, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Respond TxOK to scheduler*/ ++ ++ ++#define RTL8814A_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/ \ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/ \ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /* Delay*/ \ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/ \ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /* Polling 0x109[7]=0 TSF in 40M*/ \ ++ /*{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, */ /*. ??0x29[7:6] = 2b'00 enable BB clock*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ ++ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ ++ {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x1002[1:0] = 2b'11 enable BB macro*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8814A_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8814A_power_on_flow[RTL8814A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_radio_off_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_card_disable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_card_enable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_suspend_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_resume_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_hwpdn_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_enter_lps_flow[RTL8814A_TRANS_ACT_TO_LPS_STEPS+RTL8814A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8814A_leave_lps_flow[RTL8814A_TRANS_LPS_TO_ACT_STEPS+RTL8814A_TRANS_END_STEPS]; ++ ++#endif //__HAL8814PWRSEQ_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8821APwrSeq.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8821APwrSeq.h +old mode 100755 +new mode 100644 +index 840dd74..208ad61 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8821APwrSeq.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8821APwrSeq.h +@@ -1,186 +1,186 @@ +-#ifndef REALTEK_POWER_SEQUENCE_8821 +-#define REALTEK_POWER_SEQUENCE_8821 +- +-#include "HalPwrSeqCmd.h" +- +-/* +- Check document WM-20130516-JackieLau-RTL8821A_Power_Architecture-R10.vsd +- There are 6 HW Power States: +- 0: POFF--Power Off +- 1: PDN--Power Down +- 2: CARDEMU--Card Emulation +- 3: ACT--Active Mode +- 4: LPS--Low Power State +- 5: SUS--Suspend +- +- The transision from different states are defined below +- TRANS_CARDEMU_TO_ACT +- TRANS_ACT_TO_CARDEMU +- TRANS_CARDEMU_TO_SUS +- TRANS_SUS_TO_CARDEMU +- TRANS_CARDEMU_TO_PDN +- TRANS_ACT_TO_LPS +- TRANS_LPS_TO_ACT +- +- TRANS_END +-*/ +-#define RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS 25 +-#define RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS 15 +-#define RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS 15 +-#define RTL8821A_TRANS_SUS_TO_CARDEMU_STEPS 15 +-#define RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS 15 +-#define RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS 15 +-#define RTL8821A_TRANS_PDN_TO_CARDEMU_STEPS 15 +-#define RTL8821A_TRANS_ACT_TO_LPS_STEPS 15 +-#define RTL8821A_TRANS_LPS_TO_ACT_STEPS 15 +-#define RTL8821A_TRANS_END_STEPS 1 +- +- +-#define RTL8821A_TRANS_CARDEMU_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ +- {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ +- {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ +- {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[12:11]=0*/ \ +- {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ +- {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ +- {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*0x4C[24] = 0x4F[0] = 1, switch DPDT_SEL_P output from WL BB */\ +- {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT5|BIT4), (BIT5|BIT4)},/*0x66[13] = 0x67[5] = 1, switch for PAPE_G/PAPE_A from WL BB ; 0x66[12] = 0x67[4] = 1, switch LNAON from WL BB */\ +- {0x0025, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/*anapar_mac<118> , 0x25[6]=0 by wlan single function*/\ +- {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ +- {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ +- {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ +- {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ +- {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ +- {0x007A, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3A},/*0x7A = 0x3A start BT*/\ +- {0x002E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF , 0x82 },/* 0x2C[23:12]=0x820 ; XTAL trim */ \ +- {0x0010, PWR_CUT_A_MSK , PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6 , BIT6 },/* 0x10[6]=1 ; MP·s¼W¹ï©ó0x2Cªº±±¨îÅv¡A¶·§â0x10[6]³]¬°1¤~¯àÅýWLAN±±¨î */ \ +- +- +-#define RTL8821A_TRANS_ACT_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ +- {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*0x4C[24] = 0x4F[0] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ +- {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ +- {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ +- {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ +- +- +-#define RTL8821A_TRANS_CARDEMU_TO_SUS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ +- +-#define RTL8821A_TRANS_SUS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ +- +-#define RTL8821A_TRANS_CARDEMU_TO_CARDDIS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ +- {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ +- +-#define RTL8821A_TRANS_CARDDIS_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ +- {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ +- {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ +- {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ +- +- +-#define RTL8821A_TRANS_CARDEMU_TO_PDN \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ +- {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ +- {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ +- +-#define RTL8821A_TRANS_PDN_TO_CARDEMU \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ +- +-#define RTL8821A_TRANS_ACT_TO_LPS \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ +- {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ +- {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ +- {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ +- +- +-#define RTL8821A_TRANS_LPS_TO_ACT \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ +- {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ +- {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ +- {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ +- {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ +- {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ +- {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ +- {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ +- {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ +- {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ +- +-#define RTL8821A_TRANS_END \ +- /* format */ \ +- /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ +- {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // +- +- +-extern WLAN_PWR_CFG rtl8821A_power_on_flow[RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8821A_radio_off_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8821A_card_disable_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8821A_card_enable_flow[RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8821A_suspend_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8821A_resume_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8821A_hwpdn_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8821A_enter_lps_flow[RTL8821A_TRANS_ACT_TO_LPS_STEPS+RTL8821A_TRANS_END_STEPS]; +-extern WLAN_PWR_CFG rtl8821A_leave_lps_flow[RTL8821A_TRANS_LPS_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; +- +-#endif ++#ifndef REALTEK_POWER_SEQUENCE_8821 ++#define REALTEK_POWER_SEQUENCE_8821 ++ ++#include "HalPwrSeqCmd.h" ++ ++/* ++ Check document WM-20130516-JackieLau-RTL8821A_Power_Architecture-R10.vsd ++ There are 6 HW Power States: ++ 0: POFF--Power Off ++ 1: PDN--Power Down ++ 2: CARDEMU--Card Emulation ++ 3: ACT--Active Mode ++ 4: LPS--Low Power State ++ 5: SUS--Suspend ++ ++ The transision from different states are defined below ++ TRANS_CARDEMU_TO_ACT ++ TRANS_ACT_TO_CARDEMU ++ TRANS_CARDEMU_TO_SUS ++ TRANS_SUS_TO_CARDEMU ++ TRANS_CARDEMU_TO_PDN ++ TRANS_ACT_TO_LPS ++ TRANS_LPS_TO_ACT ++ ++ TRANS_END ++*/ ++#define RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS 25 ++#define RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS 15 ++#define RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS 15 ++#define RTL8821A_TRANS_SUS_TO_CARDEMU_STEPS 15 ++#define RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS 15 ++#define RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS 15 ++#define RTL8821A_TRANS_PDN_TO_CARDEMU_STEPS 15 ++#define RTL8821A_TRANS_ACT_TO_LPS_STEPS 15 ++#define RTL8821A_TRANS_LPS_TO_ACT_STEPS 15 ++#define RTL8821A_TRANS_END_STEPS 1 ++ ++ ++#define RTL8821A_TRANS_CARDEMU_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ ++ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ ++ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[12:11]=0*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ ++ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ ++ {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*0x4C[24] = 0x4F[0] = 1, switch DPDT_SEL_P output from WL BB */\ ++ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT5|BIT4), (BIT5|BIT4)},/*0x66[13] = 0x67[5] = 1, switch for PAPE_G/PAPE_A from WL BB ; 0x66[12] = 0x67[4] = 1, switch LNAON from WL BB */\ ++ {0x0025, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/*anapar_mac<118> , 0x25[6]=0 by wlan single function*/\ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ ++ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ ++ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ ++ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ ++ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ ++ {0x007A, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3A},/*0x7A = 0x3A start BT*/\ ++ {0x002E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF , 0x82 },/* 0x2C[23:12]=0x820 ; XTAL trim */ \ ++ {0x0010, PWR_CUT_A_MSK , PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6 , BIT6 },/* 0x10[6]=1 ; MP·s¼W¹ï©ó0x2Cªº±±¨îÅv¡A¶·§â0x10[6]³]¬°1¤~¯àÅýWLAN±±¨î */ \ ++ ++ ++#define RTL8821A_TRANS_ACT_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ ++ {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*0x4C[24] = 0x4F[0] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ ++ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ ++ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ ++ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ ++ ++ ++#define RTL8821A_TRANS_CARDEMU_TO_SUS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8821A_TRANS_SUS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ ++ ++#define RTL8821A_TRANS_CARDEMU_TO_CARDDIS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ ++ ++#define RTL8821A_TRANS_CARDDIS_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ ++ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ ++ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ ++ ++ ++#define RTL8821A_TRANS_CARDEMU_TO_PDN \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ ++ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ ++ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ ++ ++#define RTL8821A_TRANS_PDN_TO_CARDEMU \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ ++ ++#define RTL8821A_TRANS_ACT_TO_LPS \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ ++ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ ++ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ ++ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ ++ ++ ++#define RTL8821A_TRANS_LPS_TO_ACT \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ ++ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ ++ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ ++ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ ++ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ ++ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ ++ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ ++ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ ++ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ ++ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ ++ ++#define RTL8821A_TRANS_END \ ++ /* format */ \ ++ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ ++ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // ++ ++ ++extern WLAN_PWR_CFG rtl8821A_power_on_flow[RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_radio_off_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_card_disable_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_card_enable_flow[RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_suspend_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_resume_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_hwpdn_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_enter_lps_flow[RTL8821A_TRANS_ACT_TO_LPS_STEPS+RTL8821A_TRANS_END_STEPS]; ++extern WLAN_PWR_CFG rtl8821A_leave_lps_flow[RTL8821A_TRANS_LPS_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/HalPwrSeqCmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/HalPwrSeqCmd.h +old mode 100755 +new mode 100644 +index 5cf122f..24e4a54 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/HalPwrSeqCmd.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/HalPwrSeqCmd.h +@@ -1,138 +1,138 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __HALPWRSEQCMD_H__ +-#define __HALPWRSEQCMD_H__ +- +-#include +- +-/*---------------------------------------------*/ +-//3 The value of cmd: 4 bits +-/*---------------------------------------------*/ +-#define PWR_CMD_READ 0x00 +- // offset: the read register offset +- // msk: the mask of the read value +- // value: N/A, left by 0 +- // note: dirver shall implement this function by read & msk +- +-#define PWR_CMD_WRITE 0x01 +- // offset: the read register offset +- // msk: the mask of the write bits +- // value: write value +- // note: driver shall implement this cmd by read & msk after write +- +-#define PWR_CMD_POLLING 0x02 +- // offset: the read register offset +- // msk: the mask of the polled value +- // value: the value to be polled, masked by the msd field. +- // note: driver shall implement this cmd by +- // do{ +- // if( (Read(offset) & msk) == (value & msk) ) +- // break; +- // } while(not timeout); +- +-#define PWR_CMD_DELAY 0x03 +- // offset: the value to delay +- // msk: N/A +- // value: the unit of delay, 0: us, 1: ms +- +-#define PWR_CMD_END 0x04 +- // offset: N/A +- // msk: N/A +- // value: N/A +- +-/*---------------------------------------------*/ +-//3 The value of base: 4 bits +-/*---------------------------------------------*/ +- // define the base address of each block +-#define PWR_BASEADDR_MAC 0x00 +-#define PWR_BASEADDR_USB 0x01 +-#define PWR_BASEADDR_PCIE 0x02 +-#define PWR_BASEADDR_SDIO 0x03 +- +-/*---------------------------------------------*/ +-//3 The value of interface_msk: 4 bits +-/*---------------------------------------------*/ +-#define PWR_INTF_SDIO_MSK BIT(0) +-#define PWR_INTF_USB_MSK BIT(1) +-#define PWR_INTF_PCI_MSK BIT(2) +-#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) +- +-/*---------------------------------------------*/ +-//3 The value of fab_msk: 4 bits +-/*---------------------------------------------*/ +-#define PWR_FAB_TSMC_MSK BIT(0) +-#define PWR_FAB_UMC_MSK BIT(1) +-#define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) +- +-/*---------------------------------------------*/ +-//3 The value of cut_msk: 8 bits +-/*---------------------------------------------*/ +-#define PWR_CUT_TESTCHIP_MSK BIT(0) +-#define PWR_CUT_A_MSK BIT(1) +-#define PWR_CUT_B_MSK BIT(2) +-#define PWR_CUT_C_MSK BIT(3) +-#define PWR_CUT_D_MSK BIT(4) +-#define PWR_CUT_E_MSK BIT(5) +-#define PWR_CUT_F_MSK BIT(6) +-#define PWR_CUT_G_MSK BIT(7) +-#define PWR_CUT_ALL_MSK 0xFF +- +- +-typedef enum _PWRSEQ_CMD_DELAY_UNIT_ +-{ +- PWRSEQ_DELAY_US, +- PWRSEQ_DELAY_MS, +-} PWRSEQ_DELAY_UNIT; +- +-typedef struct _WL_PWR_CFG_ +-{ +- u16 offset; +- u8 cut_msk; +- u8 fab_msk:4; +- u8 interface_msk:4; +- u8 base:4; +- u8 cmd:4; +- u8 msk; +- u8 value; +-} WLAN_PWR_CFG, *PWLAN_PWR_CFG; +- +- +-#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset +-#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk +-#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk +-#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk +-#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base +-#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd +-#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk +-#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value +- +- +-//================================================================================ +-// Prototype of protected function. +-//================================================================================ +-u8 HalPwrSeqCmdParsing( +- PADAPTER padapter, +- u8 CutVersion, +- u8 FabVersion, +- u8 InterfaceType, +- WLAN_PWR_CFG PwrCfgCmd[]); +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __HALPWRSEQCMD_H__ ++#define __HALPWRSEQCMD_H__ ++ ++#include ++ ++/*---------------------------------------------*/ ++//3 The value of cmd: 4 bits ++/*---------------------------------------------*/ ++#define PWR_CMD_READ 0x00 ++ // offset: the read register offset ++ // msk: the mask of the read value ++ // value: N/A, left by 0 ++ // note: dirver shall implement this function by read & msk ++ ++#define PWR_CMD_WRITE 0x01 ++ // offset: the read register offset ++ // msk: the mask of the write bits ++ // value: write value ++ // note: driver shall implement this cmd by read & msk after write ++ ++#define PWR_CMD_POLLING 0x02 ++ // offset: the read register offset ++ // msk: the mask of the polled value ++ // value: the value to be polled, masked by the msd field. ++ // note: driver shall implement this cmd by ++ // do{ ++ // if( (Read(offset) & msk) == (value & msk) ) ++ // break; ++ // } while(not timeout); ++ ++#define PWR_CMD_DELAY 0x03 ++ // offset: the value to delay ++ // msk: N/A ++ // value: the unit of delay, 0: us, 1: ms ++ ++#define PWR_CMD_END 0x04 ++ // offset: N/A ++ // msk: N/A ++ // value: N/A ++ ++/*---------------------------------------------*/ ++//3 The value of base: 4 bits ++/*---------------------------------------------*/ ++ // define the base address of each block ++#define PWR_BASEADDR_MAC 0x00 ++#define PWR_BASEADDR_USB 0x01 ++#define PWR_BASEADDR_PCIE 0x02 ++#define PWR_BASEADDR_SDIO 0x03 ++ ++/*---------------------------------------------*/ ++//3 The value of interface_msk: 4 bits ++/*---------------------------------------------*/ ++#define PWR_INTF_SDIO_MSK BIT(0) ++#define PWR_INTF_USB_MSK BIT(1) ++#define PWR_INTF_PCI_MSK BIT(2) ++#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) ++ ++/*---------------------------------------------*/ ++//3 The value of fab_msk: 4 bits ++/*---------------------------------------------*/ ++#define PWR_FAB_TSMC_MSK BIT(0) ++#define PWR_FAB_UMC_MSK BIT(1) ++#define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) ++ ++/*---------------------------------------------*/ ++//3 The value of cut_msk: 8 bits ++/*---------------------------------------------*/ ++#define PWR_CUT_TESTCHIP_MSK BIT(0) ++#define PWR_CUT_A_MSK BIT(1) ++#define PWR_CUT_B_MSK BIT(2) ++#define PWR_CUT_C_MSK BIT(3) ++#define PWR_CUT_D_MSK BIT(4) ++#define PWR_CUT_E_MSK BIT(5) ++#define PWR_CUT_F_MSK BIT(6) ++#define PWR_CUT_G_MSK BIT(7) ++#define PWR_CUT_ALL_MSK 0xFF ++ ++ ++typedef enum _PWRSEQ_CMD_DELAY_UNIT_ ++{ ++ PWRSEQ_DELAY_US, ++ PWRSEQ_DELAY_MS, ++} PWRSEQ_DELAY_UNIT; ++ ++typedef struct _WL_PWR_CFG_ ++{ ++ u16 offset; ++ u8 cut_msk; ++ u8 fab_msk:4; ++ u8 interface_msk:4; ++ u8 base:4; ++ u8 cmd:4; ++ u8 msk; ++ u8 value; ++} WLAN_PWR_CFG, *PWLAN_PWR_CFG; ++ ++ ++#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset ++#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk ++#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk ++#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk ++#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base ++#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd ++#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk ++#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value ++ ++ ++//================================================================================ ++// Prototype of protected function. ++//================================================================================ ++u8 HalPwrSeqCmdParsing( ++ PADAPTER padapter, ++ u8 CutVersion, ++ u8 FabVersion, ++ u8 InterfaceType, ++ WLAN_PWR_CFG PwrCfgCmd[]); ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/HalVerDef.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/HalVerDef.h +old mode 100755 +new mode 100644 +index ce30c4a..d3df5df +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/HalVerDef.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/HalVerDef.h +@@ -36,6 +36,9 @@ typedef enum tag_HAL_IC_Type_Definition + CHIP_8821 = 7, + CHIP_8723B = 8, + CHIP_8192E = 9, ++ CHIP_8814A = 10, ++ CHIP_8703B = 11, ++ CHIP_8188F = 12, + }HAL_IC_TYPE_E; + + //HAL_CHIP_TYPE_E +@@ -109,15 +112,20 @@ typedef struct tag_HAL_VERSION + //HAL_VERSION VersionID + + // HAL_IC_TYPE_E ++#if 0 + #define IS_81XXC(version) (((GET_CVID_IC_TYPE(version) == CHIP_8192C)||(GET_CVID_IC_TYPE(version) == CHIP_8188C))? TRUE : FALSE) + #define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723A)? TRUE : FALSE) + #define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_8192D)? TRUE : FALSE) ++#endif ++ + #define IS_8188E(version) ((GET_CVID_IC_TYPE(version) == CHIP_8188E)? TRUE : FALSE) ++#define IS_8188F(version) ((GET_CVID_IC_TYPE(version) == CHIP_8188F) ? TRUE : FALSE) + #define IS_8192E(version) ((GET_CVID_IC_TYPE(version) == CHIP_8192E)? TRUE : FALSE) + #define IS_8812_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8812)? TRUE : FALSE) + #define IS_8821_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8821)? TRUE : FALSE) ++#define IS_8814A_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8814A) ? TRUE : FALSE) + #define IS_8723B_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723B)? TRUE : FALSE) +- ++#define IS_8703B_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8703B)? TRUE : FALSE) + + //HAL_CHIP_TYPE_E + #define IS_TEST_CHIP(version) ((GET_CVID_CHIP_TYPE(version)==TEST_CHIP)? TRUE: FALSE) +@@ -129,6 +137,7 @@ typedef struct tag_HAL_VERSION + #define IS_C_CUT(version) ((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? TRUE : FALSE) + #define IS_D_CUT(version) ((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? TRUE : FALSE) + #define IS_E_CUT(version) ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? TRUE : FALSE) ++#define IS_F_CUT(version) ((GET_CVID_CUT_VERSION(version) == F_CUT_VERSION) ? TRUE : FALSE) + #define IS_I_CUT(version) ((GET_CVID_CUT_VERSION(version) == I_CUT_VERSION) ? TRUE : FALSE) + #define IS_J_CUT(version) ((GET_CVID_CUT_VERSION(version) == J_CUT_VERSION) ? TRUE : FALSE) + #define IS_K_CUT(version) ((GET_CVID_CUT_VERSION(version) == K_CUT_VERSION) ? TRUE : FALSE) +@@ -142,11 +151,16 @@ typedef struct tag_HAL_VERSION + #define IS_1T1R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R)? TRUE : FALSE ) + #define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? TRUE : FALSE) + #define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? TRUE : FALSE) ++#define IS_3T3R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_3T3R)? TRUE : FALSE) ++#define IS_3T4R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_3T4R)? TRUE : FALSE) ++#define IS_4T4R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_4T4R)? TRUE : FALSE) ++ + + + //---------------------------------------------------------------------------- + //Chip version Macro. -- + //---------------------------------------------------------------------------- ++#if 0 + #define IS_81XXC_TEST_CHIP(version) ((IS_81XXC(version) && (!IS_NORMAL_CHIP(version)))? TRUE: FALSE) + + #define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? TRUE : FALSE) +@@ -163,6 +177,7 @@ typedef struct tag_HAL_VERSION + + #define IS_8723A_A_CUT(version) ((IS_8723_SERIES(version)) ? ( IS_A_CUT(version)?TRUE : FALSE) : FALSE) + #define IS_8723A_B_CUT(version) ((IS_8723_SERIES(version)) ? ( IS_B_CUT(version)?TRUE : FALSE) : FALSE) ++#endif + + #define IS_VENDOR_8188E_I_CUT_SERIES(_Adapter) ((IS_8188E(GET_HAL_DATA(_Adapter)->VersionID)) ? ((GET_CVID_CUT_VERSION(GET_HAL_DATA(_Adapter)->VersionID) >= I_CUT_VERSION) ? TRUE : FALSE) : FALSE) + +@@ -178,5 +193,10 @@ typedef struct tag_HAL_VERSION + #define IS_VENDOR_8723B_TEST_CHIP(_Adapter) ((IS_8723B_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? FALSE : TRUE) : FALSE) + #define IS_VENDOR_8723B_MP_CHIP(_Adapter) ((IS_8723B_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? TRUE : FALSE) : FALSE) + ++#define IS_VENDOR_8703B_TEST_CHIP(_Adapter) ((IS_8703B_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? FALSE : TRUE) : FALSE) ++#define IS_VENDOR_8703B_MP_CHIP(_Adapter) ((IS_8703B_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? TRUE : FALSE) : FALSE) ++#define IS_VENDOR_8814A_TEST_CHIP(_Adapter) ((IS_8814A_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? FALSE : TRUE) : FALSE) ++#define IS_VENDOR_8814A_MP_CHIP(_Adapter) ((IS_8814A_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? TRUE : FALSE) : FALSE) ++ + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/autoconf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/autoconf.h +old mode 100755 +new mode 100644 +index 2829142..41f9275 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/autoconf.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/autoconf.h +@@ -57,6 +57,7 @@ + #endif //!CONFIG_PLATFORM_INTEL_BYT + //#define CONFIG_DEBUG_CFG80211 + #define CONFIG_SET_SCAN_DENY_TIMER ++ /*#define SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42*/ /* wpa_supplicant realtek version <= jb42 will be defined this */ + #endif + + #define CONFIG_AP_MODE +@@ -66,7 +67,6 @@ + #define CONFIG_HOSTAPD_MLME + #endif + //#define CONFIG_FIND_BEST_CHANNEL +- //#define CONFIG_NO_WIRELESS_HANDLERS + #define CONFIG_TX_MCAST2UNI // Support IP multicast->unicast + #endif + +@@ -76,25 +76,24 @@ + //The CONFIG_WFD is for supporting the Wi-Fi display + #define CONFIG_WFD + +- #ifndef CONFIG_WIFI_TEST +- #define CONFIG_P2P_REMOVE_GROUP_INFO +- #endif ++ #define CONFIG_P2P_REMOVE_GROUP_INFO ++ + //#define CONFIG_DBG_P2P + #define CONFIG_P2P_PS +- //#define CONFIG_P2P_IPS + #define CONFIG_P2P_OP_CHK_SOCIAL_CH + #define CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT //replace CONFIG_P2P_CHK_INVITE_CH_LIST flag + #define CONFIG_P2P_INVITE_IOT + #endif + + // Added by Kurt 20110511 +-//#define CONFIG_TDLS + #ifdef CONFIG_TDLS ++ #define CONFIG_TDLS_DRIVER_SETUP + // #ifndef CONFIG_WFD + // #define CONFIG_WFD + // #endif + // #define CONFIG_TDLS_AUTOSETUP +-// #define CONFIG_TDLS_AUTOCHECKALIVE ++ #define CONFIG_TDLS_AUTOCHECKALIVE ++ /* #define CONFIG_TDLS_CH_SW */ /* Enable this flag only when we confirm that TDLS CH SW is supported in FW */ + #endif + + //#define CONFIG_CONCURRENT_MODE // Set from Makefile +@@ -105,18 +104,12 @@ + #define CONFIG_TSF_RESET_OFFLOAD // For 2 PORT TSF SYNC. + #endif + //#define DBG_RUNTIME_PORT_SWITCH +- #define CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ #define CONFIG_SCAN_BACKOP + #endif // CONFIG_CONCURRENT_MODE + + #define CONFIG_LAYER2_ROAMING + #define CONFIG_LAYER2_ROAMING_RESUME + +-//#define CONFIG_SCAN_SPARSE //partial scan, ASUS RK3188 use the feature +-#ifdef CONFIG_SCAN_SPARSE +- #define ALLOW_SCAN_INTERVAL 12000 // unit is ms +- #define SCAN_DIVISION_NUM 4 +-#endif +- + //#define CONFIG_80211D + + +@@ -165,7 +158,6 @@ + //#define CONFIG_FILE_FWIMG + + #define CONFIG_LONG_DELAY_ISSUE +-#define CONFIG_DEAUTH_BEFORE_CONNECT + //#define CONFIG_PATCH_JOIN_WRONG_CHANNEL + #define CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR + +@@ -229,8 +221,6 @@ + + #ifdef CONFIG_BT_COEXIST + // for ODM and outsrc BT-Coex +- #define BT_30_SUPPORT 1 +- + #ifndef CONFIG_LPS + #define CONFIG_LPS // download reserved page to FW + #endif +@@ -238,8 +228,6 @@ + #ifndef CONFIG_C2H_PACKET_EN + #define CONFIG_C2H_PACKET_EN + #endif +-#else // !CONFIG_BT_COEXIST +- #define BT_30_SUPPORT 0 + #endif // !CONFIG_BT_COEXIST + + #ifdef CONFIG_WOWLAN +@@ -251,44 +239,10 @@ + #ifndef WAKEUP_GPIO_IDX + #define WAKEUP_GPIO_IDX 12 // WIFI Chip Side + #endif // !WAKEUP_GPIO_IDX +- #define CONFIG_GPIO_WAKEUP_LOW_ACTIVE // mark this for HIGH active + #endif // CONFIG_GPIO_WAKEUP + + +-/* +- * Outsource Related Config +- */ +- +-#define TESTCHIP_SUPPORT 0 + +-#define RTL8192CE_SUPPORT 0 +-#define RTL8192CU_SUPPORT 0 +-#define RTL8192C_SUPPORT (RTL8192CE_SUPPORT|RTL8192CU_SUPPORT) +- +-#define RTL8192DE_SUPPORT 0 +-#define RTL8192DU_SUPPORT 0 +-#define RTL8192D_SUPPORT (RTL8192DE_SUPPORT|RTL8192DU_SUPPORT) +- +-#define RTL8723AS_SUPPORT 0 +-#define RTL8723AU_SUPPORT 0 +-#define RTL8723AE_SUPPORT 0 +-#define RTL8723A_SUPPORT (RTL8723AU_SUPPORT|RTL8723AS_SUPPORT|RTL8723AE_SUPPORT) +-#define RTL8723_FPGA_VERIFICATION 0 +- +-#define RTL8188E_SUPPORT 0 +-#define RTL8812A_SUPPORT 0 +-#define RTL8821A_SUPPORT 0 +-#define RTL8723B_SUPPORT 1 +-#define RTL8192E_SUPPORT 0 +-#define RTL8814A_SUPPORT 0 +-#define RTL8195A_SUPPORT 0 +- +-#define RATE_ADAPTIVE_SUPPORT 0 +-#define POWER_TRAINING_ACTIVE 0 +- +-#ifdef CONFIG_ANTENNA_DIVERSITY +-#define CONFIG_HW_ANTENNA_DIVERSITY +-#endif + + + /* +@@ -349,3 +303,4 @@ + #define DBG_CHECK_FW_PS_STATE + #define DBG_CHECK_FW_PS_STATE_H2C + //#define CONFIG_FW_C2H_DEBUG ++/* #define CONFIG_GPIO_API */ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/basic_types.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/basic_types.h +old mode 100755 +new mode 100644 +index 28ba763..ed4aa73 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/basic_types.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/basic_types.h +@@ -76,8 +76,12 @@ + + + #ifdef PLATFORM_LINUX +- ++ #include + #include ++ #include ++ #include ++ #include ++ #include + #define IN + #define OUT + #define VOID void +@@ -96,6 +100,10 @@ + #define UINT u32 + #define ULONG u32 + ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)) ++ typedef _Bool bool; ++ #endif ++ + typedef void (*proc_t)(void*); + + typedef __kernel_size_t SIZE_T; +@@ -155,194 +163,217 @@ + #define SIZE_PTR SIZE_T + #define SSIZE_PTR SSIZE_T + +-//port from fw by thomas +-// TODO: Belows are Sync from SD7-Driver. It is necessary to check correctness ++/* ++* Continuous bits starting from least significant bit ++* Example: ++* BIT_LEN_MASK_32(0) => 0x00000000 ++* BIT_LEN_MASK_32(1) => 0x00000001 ++* BIT_LEN_MASK_32(2) => 0x00000003 ++* BIT_LEN_MASK_32(32) => 0xFFFFFFFF ++*/ ++#define BIT_LEN_MASK_32(__BitLen) ((u32)(0xFFFFFFFF >> (32 - (__BitLen)))) ++#define BIT_LEN_MASK_16(__BitLen) ((u16)(0xFFFF >> (16 - (__BitLen)))) ++#define BIT_LEN_MASK_8(__BitLen) ((u8)(0xFF >> (8 - (__BitLen)))) ++ ++/* ++* Continuous bits starting from least significant bit ++* Example: ++* BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003 ++* BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000 ++*/ ++#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ((u32)(BIT_LEN_MASK_32(__BitLen) << (__BitOffset))) ++#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ((u16)(BIT_LEN_MASK_16(__BitLen) << (__BitOffset))) ++#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ((u8)(BIT_LEN_MASK_8(__BitLen) << (__BitOffset))) ++ ++/* ++* Convert LE data to host byte order ++*/ ++#define EF1Byte (u8) ++#define EF2Byte le16_to_cpu ++#define EF4Byte le32_to_cpu ++ ++/* ++* Read LE data from memory to host byte order ++*/ ++#define ReadLE4Byte(_ptr) le32_to_cpu(*((u32 *)(_ptr))) ++#define ReadLE2Byte(_ptr) le16_to_cpu(*((u16 *)(_ptr))) ++#define ReadLE1Byte(_ptr) (*((u8 *)(_ptr))) ++ ++/* ++* Read BE data from memory to host byte order ++*/ ++#define ReadBEE4Byte(_ptr) be32_to_cpu(*((u32 *)(_ptr))) ++#define ReadBE2Byte(_ptr) be16_to_cpu(*((u16 *)(_ptr))) ++#define ReadBE1Byte(_ptr) (*((u8 *)(_ptr))) ++ ++/* ++* Write host byte order data to memory in LE order ++*/ ++#define WriteLE4Byte(_ptr, _val) (*((u32 *)(_ptr))) = cpu_to_le32(_val) ++#define WriteLE2Byte(_ptr, _val) (*((u16 *)(_ptr))) = cpu_to_le16(_val) ++#define WriteLE1Byte(_ptr, _val) (*((u8 *)(_ptr))) = ((u8)(_val)) ++ ++/* ++* Write host byte order data to memory in BE order ++*/ ++#define WriteBE4Byte(_ptr, _val) (*((u32 *)(_ptr))) = cpu_to_be32(_val) ++#define WriteBE2Byte(_ptr, _val) (*((u16 *)(_ptr))) = cpu_to_be16(_val) ++#define WriteBE1Byte(_ptr, _val) (*((u8 *)(_ptr))) = ((u8)(_val)) ++ ++/* ++* Return 4-byte value in host byte ordering from 4-byte pointer in litten-endian system. ++*/ ++#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) (le32_to_cpu(*((u32 *)(__pStart)))) ++#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) (le16_to_cpu(*((u16 *)(__pStart)))) ++#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) ((*((u8 *)(__pStart)))) + + /* +- * Call endian free function when +- * 1. Read/write packet content. +- * 2. Before write integer to IO. +- * 3. After read integer from IO. ++* Return 4-byte value in host byte ordering from 4-byte pointer in big-endian system. + */ ++#define BE_P4BYTE_TO_HOST_4BYTE(__pStart) (be32_to_cpu(*((u32 *)(__pStart)))) ++#define BE_P2BYTE_TO_HOST_2BYTE(__pStart) (be16_to_cpu(*((u16 *)(__pStart)))) ++#define BE_P1BYTE_TO_HOST_1BYTE(__pStart) ((*((u8 *)(__pStart)))) + +-// +-// Byte Swapping routine. +-// +-#define EF1Byte (u8) +-#define EF2Byte le16_to_cpu +-#define EF4Byte le32_to_cpu +- +-// +-// Read LE format data from memory +-// +-#define ReadEF1Byte(_ptr) EF1Byte(*((u8 *)(_ptr))) +-#define ReadEF2Byte(_ptr) EF2Byte(*((u16 *)(_ptr))) +-#define ReadEF4Byte(_ptr) EF4Byte(*((u32 *)(_ptr))) +- +-// +-// Write LE data to memory +-// +-#define WriteEF1Byte(_ptr, _val) (*((u8 *)(_ptr)))=EF1Byte(_val) +-#define WriteEF2Byte(_ptr, _val) (*((u16 *)(_ptr)))=EF2Byte(_val) +-#define WriteEF4Byte(_ptr, _val) (*((u32 *)(_ptr)))=EF4Byte(_val) +- +-// +-// Example: +-// BIT_LEN_MASK_32(0) => 0x00000000 +-// BIT_LEN_MASK_32(1) => 0x00000001 +-// BIT_LEN_MASK_32(2) => 0x00000003 +-// BIT_LEN_MASK_32(32) => 0xFFFFFFFF +-// +-#define BIT_LEN_MASK_32(__BitLen) \ +- (0xFFFFFFFF >> (32 - (__BitLen))) +-// +-// Example: +-// BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003 +-// BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000 +-// +-#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) \ +- (BIT_LEN_MASK_32(__BitLen) << (__BitOffset)) +- +-// +-// Description: +-// Return 4-byte value in host byte ordering from +-// 4-byte pointer in litten-endian system. +-// +-#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) \ +- (EF4Byte(*((u32 *)(__pStart)))) +- +-// +-// Description: +-// Translate subfield (continuous bits in little-endian) of 4-byte value in litten byte to +-// 4-byte value in host byte ordering. +-// ++/* ++* Translate subfield (continuous bits in little-endian) of 4-byte value in LE byte to ++* 4-byte value in host byte ordering. ++*/ + #define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ +- ( \ +- ( LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset) ) \ +- & \ +- BIT_LEN_MASK_32(__BitLen) \ +- ) +- +-// +-// Description: +-// Mask subfield (continuous bits in little-endian) of 4-byte value in litten byte oredering +-// and return the result in 4-byte value in host byte ordering. +-// +-#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ +- ( \ +- LE_P4BYTE_TO_HOST_4BYTE(__pStart) \ +- & \ +- ( ~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ) \ +- ) +- +-// +-// Description: +-// Set subfield of little-endian 4-byte value to specified value. +-// +-#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \ +- *((u32 *)(__pStart)) = \ +- EF4Byte( \ +- LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ +- | \ +- ( (((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset) ) \ +- ); ++ ((LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_32(__BitLen)) + +- +-#define BIT_LEN_MASK_16(__BitLen) \ +- (0xFFFF >> (16 - (__BitLen))) +- +-#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \ +- (BIT_LEN_MASK_16(__BitLen) << (__BitOffset)) +- +-#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \ +- (EF2Byte(*((u16 *)(__pStart)))) +- + #define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ +- ( \ +- ( LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset) ) \ +- & \ +- BIT_LEN_MASK_16(__BitLen) \ +- ) +- +-#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ +- ( \ +- LE_P2BYTE_TO_HOST_2BYTE(__pStart) \ +- & \ +- ( ~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ) \ +- ) +- +-#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \ +- *((u16 *)(__pStart)) = \ +- EF2Byte( \ +- LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ +- | \ +- ( (((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset) ) \ +- ); +- +-#define BIT_LEN_MASK_8(__BitLen) \ +- (0xFF >> (8 - (__BitLen))) +- +-#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \ +- (BIT_LEN_MASK_8(__BitLen) << (__BitOffset)) +- +-#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \ +- (EF1Byte(*((u8 *)(__pStart)))) ++ ((LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_16(__BitLen)) + + #define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ +- ( \ +- ( LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset) ) \ +- & \ +- BIT_LEN_MASK_8(__BitLen) \ +- ) ++ ((LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_8(__BitLen)) ++ ++/* ++* Translate subfield (continuous bits in big-endian) of 4-byte value in BE byte to ++* 4-byte value in host byte ordering. ++*/ ++#define BE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ++ ((BE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_32(__BitLen)) ++ ++#define BE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ++ ((BE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_16(__BitLen)) ++ ++#define BE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ++ ((BE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_8(__BitLen)) ++ ++/* ++* Mask subfield (continuous bits in little-endian) of 4-byte value in LE byte oredering ++* and return the result in 4-byte value in host byte ordering. ++*/ ++#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ++ (LE_P4BYTE_TO_HOST_4BYTE(__pStart) & (~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen))) ++ ++#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ++ (LE_P2BYTE_TO_HOST_2BYTE(__pStart) & (~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen))) + + #define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ +- ( \ +- LE_P1BYTE_TO_HOST_1BYTE(__pStart) \ +- & \ +- ( ~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ) \ +- ) ++ (LE_P1BYTE_TO_HOST_1BYTE(__pStart) & (~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen))) ++ ++/* ++* Mask subfield (continuous bits in big-endian) of 4-byte value in BE byte oredering ++* and return the result in 4-byte value in host byte ordering. ++*/ ++#define BE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ++ (BE_P4BYTE_TO_HOST_4BYTE(__pStart) & (~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen))) ++ ++#define BE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ++ (BE_P2BYTE_TO_HOST_2BYTE(__pStart) & (~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen))) ++ ++#define BE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ++ (BE_P1BYTE_TO_HOST_1BYTE(__pStart) & (~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen))) ++ ++/* ++* Set subfield of little-endian 4-byte value to specified value. ++*/ ++#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \ ++ do { \ ++ if (__BitOffset == 0 && __BitLen == 32) \ ++ WriteLE4Byte(__pStart, __Value); \ ++ else { \ ++ WriteLE4Byte(__pStart, \ ++ LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ((((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset)) \ ++ ); \ ++ } \ ++ } while (0) ++ ++#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \ ++ do { \ ++ if (__BitOffset == 0 && __BitLen == 16) \ ++ WriteLE2Byte(__pStart, __Value); \ ++ else { \ ++ WriteLE2Byte(__pStart, \ ++ LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ((((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset)) \ ++ ); \ ++ } \ ++ } while (0) + + #define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \ +- *((u8 *)(__pStart)) = \ +- EF1Byte( \ +- LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ +- | \ +- ( (((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset) ) \ +- ); +- +- +-#define LE_BITS_CLEARED_TO_2BYTE_16BIT(__pStart, __BitOffset, __BitLen) \ +- ( \ +- LE_P2BYTE_TO_HOST_2BYTE(__pStart) \ +- ) +- +-#define SET_BITS_TO_LE_2BYTE_16BIT(__pStart, __BitOffset, __BitLen, __Value) \ +- *((u16 *)(__pStart)) = \ +- EF2Byte( \ +- LE_BITS_CLEARED_TO_2BYTE_16BIT(__pStart, __BitOffset, __BitLen) \ +- | \ +- ( (u16)__Value) \ +- ); +- +-#define LE_BITS_CLEARED_TO_1BYTE_8BIT(__pStart, __BitOffset, __BitLen) \ +- ( \ +- LE_P1BYTE_TO_HOST_1BYTE(__pStart) \ +- ) +- +-#define SET_BITS_TO_LE_1BYTE_8BIT(__pStart, __BitOffset, __BitLen, __Value) \ +-{ \ +- *((u8 *)(__pStart)) = \ +- EF1Byte( \ +- LE_BITS_CLEARED_TO_1BYTE_8BIT(__pStart, __BitOffset, __BitLen) \ +- | \ +- ((u8)__Value) \ +- ); \ +-} ++ do { \ ++ if (__BitOffset == 0 && __BitLen == 8) \ ++ WriteLE1Byte(__pStart, __Value); \ ++ else { \ ++ WriteLE1Byte(__pStart, \ ++ LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ((((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset)) \ ++ ); \ ++ } \ ++ } while (0) ++ ++/* ++* Set subfield of big-endian 4-byte value to specified value. ++*/ ++#define SET_BITS_TO_BE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \ ++ do { \ ++ if (__BitOffset == 0 && __BitLen == 32) \ ++ WriteBE4Byte(__pStart, __Value); \ ++ else { \ ++ WriteBE4Byte(__pStart, \ ++ BE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ((((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset)) \ ++ ); \ ++ } \ ++ } while (0) ++ ++#define SET_BITS_TO_BE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \ ++ do { \ ++ if (__BitOffset == 0 && __BitLen == 16) \ ++ WriteBE2Byte(__pStart, __Value); \ ++ else { \ ++ WriteBE2Byte(__pStart, \ ++ BE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ((((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset)) \ ++ ); \ ++ } \ ++ } while (0) ++ ++#define SET_BITS_TO_BE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \ ++ do { \ ++ if (__BitOffset == 0 && __BitLen == 8) \ ++ WriteBE1Byte(__pStart, __Value); \ ++ else { \ ++ WriteBE1Byte(__pStart, \ ++ BE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ((((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset)) \ ++ ); \ ++ } \ ++ } while (0) + + // Get the N-bytes aligment offset from the current length + #define N_BYTE_ALIGMENT(__Value, __Aligment) ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / __Aligment) * __Aligment)) + +-typedef unsigned char BOOLEAN,*PBOOLEAN; ++typedef unsigned char BOOLEAN, *PBOOLEAN, boolean; + + #define TEST_FLAG(__Flag,__testFlag) (((__Flag) & (__testFlag)) != 0) + #define SET_FLAG(__Flag, __setFlag) ((__Flag) |= __setFlag) +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/circ_buf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/circ_buf.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/cmd_osdep.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/cmd_osdep.h +old mode 100755 +new mode 100644 +index 8dc4a35..65a7253 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/cmd_osdep.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/cmd_osdep.h +@@ -25,8 +25,8 @@ extern sint _rtw_init_cmd_priv (struct cmd_priv *pcmdpriv); + extern sint _rtw_init_evt_priv(struct evt_priv *pevtpriv); + extern void _rtw_free_evt_priv (struct evt_priv *pevtpriv); + extern void _rtw_free_cmd_priv (struct cmd_priv *pcmdpriv); +-extern sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj); +-extern struct cmd_obj *_rtw_dequeue_cmd(_queue *queue); ++extern sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj, bool to_head); ++extern struct cmd_obj *_rtw_dequeue_cmd(_queue *queue); + + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/custom_gpio.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/custom_gpio.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_conf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_conf.h +old mode 100755 +new mode 100644 +index 09befee..467862e +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_conf.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_conf.h +@@ -20,6 +20,7 @@ + #ifndef __DRV_CONF_H__ + #define __DRV_CONF_H__ + #include "autoconf.h" ++#include "hal_ic_cfg.h" + + #if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) + +@@ -75,8 +76,16 @@ + #define CONFIG_USB_VENDOR_REQ_MUTEX + #endif + ++#if !defined(CONFIG_AP_MODE) && defined(CONFIG_DFS_MASTER) ++ #warning "undef CONFIG_DFS_MASTER because CONFIG_AP_MODE is not defined" ++ #undef CONFIG_DFS_MASTER ++#endif ++ + #define DYNAMIC_CAMID_ALLOC + ++#define RTW_SCAN_SPARSE_MIRACAST 1 ++#define RTW_SCAN_SPARSE_BG 0 ++ + #ifndef CONFIG_RTW_HIQ_FILTER + #define CONFIG_RTW_HIQ_FILTER 1 + #endif +@@ -89,8 +98,52 @@ + #define CONFIG_RTW_ADAPTIVITY_MODE 0 + #endif + +-#ifndef CONFIG_RTW_NHM_EN +- #define CONFIG_RTW_NHM_EN 0 ++#ifndef CONFIG_RTW_ADAPTIVITY_DML ++ #define CONFIG_RTW_ADAPTIVITY_DML 0 ++#endif ++ ++#ifndef CONFIG_RTW_ADAPTIVITY_DC_BACKOFF ++ #define CONFIG_RTW_ADAPTIVITY_DC_BACKOFF 2 ++#endif ++ ++#ifndef CONFIG_RTW_ADAPTIVITY_TH_L2H_INI ++ #define CONFIG_RTW_ADAPTIVITY_TH_L2H_INI 0 ++#endif ++ ++#ifndef CONFIG_RTW_ADAPTIVITY_TH_EDCCA_HL_DIFF ++ #define CONFIG_RTW_ADAPTIVITY_TH_EDCCA_HL_DIFF 0 ++#endif ++ ++#ifndef CONFIG_RTW_TARGET_TX_PWR_2G_A ++ #define CONFIG_RTW_TARGET_TX_PWR_2G_A {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1} ++#endif ++ ++#ifndef CONFIG_RTW_TARGET_TX_PWR_2G_B ++ #define CONFIG_RTW_TARGET_TX_PWR_2G_B {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1} ++#endif ++ ++#ifndef CONFIG_RTW_TARGET_TX_PWR_2G_C ++ #define CONFIG_RTW_TARGET_TX_PWR_2G_C {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1} ++#endif ++ ++#ifndef CONFIG_RTW_TARGET_TX_PWR_2G_D ++ #define CONFIG_RTW_TARGET_TX_PWR_2G_D {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1} ++#endif ++ ++#ifndef CONFIG_RTW_TARGET_TX_PWR_5G_A ++ #define CONFIG_RTW_TARGET_TX_PWR_5G_A {-1, -1, -1, -1, -1, -1, -1, -1, -1} ++#endif ++ ++#ifndef CONFIG_RTW_TARGET_TX_PWR_5G_B ++ #define CONFIG_RTW_TARGET_TX_PWR_5G_B {-1, -1, -1, -1, -1, -1, -1, -1, -1} ++#endif ++ ++#ifndef CONFIG_RTW_TARGET_TX_PWR_5G_C ++ #define CONFIG_RTW_TARGET_TX_PWR_5G_C {-1, -1, -1, -1, -1, -1, -1, -1, -1} ++#endif ++ ++#ifndef CONFIG_RTW_TARGET_TX_PWR_5G_D ++ #define CONFIG_RTW_TARGET_TX_PWR_5G_D {-1, -1, -1, -1, -1, -1, -1, -1, -1} + #endif + + #ifndef CONFIG_RTW_AMPLIFIER_TYPE_2G +@@ -101,10 +154,48 @@ + #define CONFIG_RTW_AMPLIFIER_TYPE_5G 0 + #endif + ++#ifndef CONFIG_RTW_RFE_TYPE ++ #define CONFIG_RTW_RFE_TYPE 64 ++#endif ++ ++#ifndef CONFIG_RTW_GLNA_TYPE ++ #define CONFIG_RTW_GLNA_TYPE 0 ++#endif ++ ++#ifndef CONFIG_RTW_PLL_REF_CLK_SEL ++ #define CONFIG_RTW_PLL_REF_CLK_SEL 0x0F ++#endif ++ + #define MACID_NUM_SW_LIMIT 32 +-#define CAM_ENTRY_NUM_SW_LIMIT 32 ++#define SEC_CAM_ENT_NUM_SW_LIMIT 32 ++ ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) ++ #define CONFIG_IEEE80211_BAND_5GHZ ++#endif + ++#ifndef RTW_DEF_MODULE_REGULATORY_CERT ++ #define RTW_DEF_MODULE_REGULATORY_CERT 0 ++#endif ++ ++#if RTW_DEF_MODULE_REGULATORY_CERT ++ /* force enable TX power by rate and TX power limit */ ++ #ifndef CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY ++ #define CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY ++ #endif ++#endif ++ ++/* ++ Mark CONFIG_DEAUTH_BEFORE_CONNECT by Arvin 2015/07/20 ++ If the failure of Wi-Fi connection is due to some irregular disconnection behavior (like unplug dongle, ++ power down etc.) in last time, we can unmark this flag to avoid some unpredictable response from AP. ++*/ ++/*#define CONFIG_DEAUTH_BEFORE_CONNECT */ ++ ++/*#define CONFIG_WEXT_DONT_JOIN_BYSSID */ + //#include + ++ ++/*#define CONFIG_DOSCAN_IN_BUSYTRAFFIC */ ++ + #endif // __DRV_CONF_H__ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types.h +old mode 100755 +new mode 100644 +index b42c42b..1008c0f +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types.h +@@ -93,6 +93,7 @@ typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER; + #include + #include + #include ++#include + #include + #include "../hal/hal_dm.h" + #include +@@ -118,9 +119,7 @@ typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER; + #include + #endif + +-#ifdef CONFIG_P2P + #include +-#endif // CONFIG_P2P + + #ifdef CONFIG_TDLS + #include +@@ -153,6 +152,10 @@ typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER; + + #include + ++#ifdef CONFIG_BT_COEXIST ++#include ++#endif // CONFIG_BT_COEXIST ++ + #define SPEC_DEV_ID_NONE BIT(0) + #define SPEC_DEV_ID_DISABLE_HT BIT(1) + #define SPEC_DEV_ID_ENABLE_PS BIT(2) +@@ -236,6 +239,8 @@ struct registry_priv + u8 stbc_cap; + // BIT0: Enable VHT Beamformer, BIT1: Enable VHT Beamformee, BIT4: Enable HT Beamformer, BIT5: Enable HT Beamformee + u8 beamform_cap; ++ u8 beamformer_rf_num; ++ u8 beamformee_rf_num; + #endif //CONFIG_80211N_HT + + #ifdef CONFIG_80211AC_VHT +@@ -251,7 +256,9 @@ struct registry_priv + + u8 wifi_spec;// !turbo_mode + u8 special_rf_path; // 0: 2T2R ,1: only turn on path A 1T1R ++ char alpha2[2]; + u8 channel_plan; ++ u8 full_ch_in_p2p_handshake; /* 0: reply only softap channel, 1: reply full channel list*/ + #ifdef CONFIG_BT_COEXIST + u8 btcoex; + u8 bt_iso; +@@ -263,6 +270,8 @@ struct registry_priv + + u8 antdiv_cfg; + u8 antdiv_type; ++ ++ u8 switch_usb3; + + u8 usbss_enable;//0:disable,1:enable + u8 hwpdn_mode;//0:disable,1:enable,2:decide by EFUSE config +@@ -282,10 +291,6 @@ struct registry_priv + u8 fw_iol; //enable iol without other concern + #endif + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- u8 dmsp;//0:disable,1:enable +-#endif +- + #ifdef CONFIG_80211D + u8 enable80211d; + #endif +@@ -300,19 +305,31 @@ struct registry_priv + u8 force_igi;//0 normal + #endif + ++ /* for pll reference clock selction */ ++ u8 pll_ref_clk_sel; ++ + //define for tx power adjust + u8 RegEnableTxPowerLimit; + u8 RegEnableTxPowerByRate; + u8 RegPowerBase; + u8 RegPwrTblSel; ++ ++ u8 target_tx_pwr_valid; ++ s8 target_tx_pwr_2g[RF_PATH_MAX][RATE_SECTION_NUM]; ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++ s8 target_tx_pwr_5g[RF_PATH_MAX][RATE_SECTION_NUM - 1]; ++#endif ++ + s8 TxBBSwing_2G; + s8 TxBBSwing_5G; + u8 AmplifierType_2G; + u8 AmplifierType_5G; + u8 bEn_RFE; + u8 RFE_Type; ++ u8 GLNA_Type; + u8 check_fw_ps; +- ++ u8 RegRfKFreeEnable; ++ + #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + u8 load_phy_file; + u8 RegDecryptCustomFile; +@@ -326,10 +343,23 @@ struct registry_priv + u8 hiq_filter; + u8 adaptivity_en; + u8 adaptivity_mode; +- u8 nhm_en; ++ u8 adaptivity_dml; ++ u8 adaptivity_dc_backoff; ++ s8 adaptivity_th_l2h_ini; ++ s8 adaptivity_th_edcca_hl_diff; ++ ++ u8 boffefusemask; ++ BOOLEAN bFileMaskEfuse; ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ u8 acs_mode; ++ u8 acs_auto_scan; ++#endif ++ u32 reg_rxgain_offset_2g; ++ u32 reg_rxgain_offset_5gl; ++ u32 reg_rxgain_offset_5gm; ++ u32 reg_rxgain_offset_5gh; + }; + +- + //For registry parameters + #define RGTRY_OFT(field) ((ULONG)FIELD_OFFSET(struct registry_priv,field)) + #define RGTRY_SZ(field) sizeof(((struct registry_priv*) 0)->field) +@@ -342,12 +372,18 @@ struct registry_priv + + #define GetRegbENRFEType(_Adapter) (_Adapter->registrypriv.bEn_RFE) + #define GetRegRFEType(_Adapter) (_Adapter->registrypriv.RFE_Type) +- ++#define GetRegGLNAType(_Adapter) (_Adapter->registrypriv.GLNA_Type) + + #define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(WLAN_BSSID_EX,field)) + #define BSSID_SZ(field) sizeof(((PWLAN_BSSID_EX) 0)->field) + ++#define REGSTY_BW_2G(regsty) ((regsty)->bw_mode & 0x0F) ++#define REGSTY_BW_5G(regsty) (((regsty)->bw_mode) >> 4) ++#define REGSTY_IS_BW_2G_SUPPORT(regsty, bw) (REGSTY_BW_2G((regsty)) >= (bw)) ++#define REGSTY_IS_BW_5G_SUPPORT(regsty, bw) (REGSTY_BW_5G((regsty)) >= (bw)) + ++#define REGSTY_IS_11AC_ENABLE(regsty) ((regsty)->vht_enable != 0) ++#define REGSTY_IS_11AC_AUTO(regsty) ((regsty)->vht_enable == 2) + + #ifdef CONFIG_SDIO_HCI + #include +@@ -361,12 +397,14 @@ struct registry_priv + + #ifdef CONFIG_CONCURRENT_MODE + #define is_primary_adapter(adapter) (adapter->adapter_type == PRIMARY_ADAPTER) ++#define is_vir_adapter(adapter) (adapter->adapter_type == MAX_ADAPTER) + #define get_iface_type(adapter) (adapter->iface_type) + #else + #define is_primary_adapter(adapter) (1) ++#define is_vir_adapter(adapter) (0) + #define get_iface_type(adapter) (IFACE_PORT0) + #endif +-#define GET_PRIMARY_ADAPTER(padapter) (((_adapter *)padapter)->dvobj->if1) ++#define GET_PRIMARY_ADAPTER(padapter) (((_adapter *)padapter)->dvobj->padapters[IFACE_ID0]) + #define GET_IFACE_NUMS(padapter) (((_adapter *)padapter)->dvobj->iface_nums) + #define GET_ADAPTER(padapter, iface_id) (((_adapter *)padapter)->dvobj->padapters[iface_id]) + +@@ -543,6 +581,7 @@ struct debug_priv { + u64 dbg_rx_ampdu_loss_count; + u64 dbg_rx_dup_mgt_frame_drop_count; + u64 dbg_rx_ampdu_window_shift_cnt; ++ u64 dbg_rx_conflic_mac_addr_cnt; + }; + + struct rtw_traffic_statistics { +@@ -563,12 +602,36 @@ struct rtw_traffic_statistics { + u32 cur_rx_tp; // Rx throughput in MBps. + }; + ++#define SEC_CAP_CHK_BMC BIT0 ++ ++#define SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH BIT0 ++ ++struct sec_cam_bmp { ++ u32 m0; ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) ++ u32 m1; ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) ++ u32 m2; ++#endif ++#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) ++ u32 m3; ++#endif ++}; ++ + struct cam_ctl_t { + _lock lock; +- u64 bitmap; ++ ++ u8 sec_cap; ++ u32 flags; ++ ++ u8 num; ++ struct sec_cam_bmp used; ++ ++ _mutex sec_cam_access_mutex; + }; + +-struct cam_entry_cache { ++struct sec_cam_ent { + u16 ctrl; + u8 mac[ETH_ALEN]; + u8 key[16]; +@@ -599,13 +662,44 @@ struct macid_ctl_t { + struct macid_bmp bmc; + struct macid_bmp if_g[IFACE_ID_MAX]; + struct macid_bmp ch_g[2]; /* 2 ch concurrency */ ++ u8 h2c_msr[MACID_NUM_SW_LIMIT]; ++ struct sta_info *sta[MACID_NUM_SW_LIMIT]; ++}; ++ ++struct rf_ctl_t { ++ #ifdef CONFIG_DFS_MASTER ++ bool radar_detect_by_sta_link; ++ bool pre_radar_detect_by_sta_link; ++ bool dfs_master_enabled; ++ ++ u8 radar_detect_ch; ++ u8 radar_detect_bw; ++ u8 radar_detect_offset; ++ u8 pre_radar_detect_ch; ++ u8 pre_radar_detect_bw; ++ u8 pre_radar_detect_offset; ++ ++ u32 cac_end_time; ++ ++ u8 dbg_dfs_master_fake_radar_detect_cnt; ++ u8 dbg_dfs_master_radar_detect_trigger_non; ++ u8 dbg_dfs_master_choose_dfs_ch_first; ++ #endif + }; + ++#define RTW_CAC_STOPPED 0 ++#define IS_UNDER_CAC(rfctl) ((rfctl)->cac_end_time > rtw_get_current_time()) ++#define IS_CAC_STOPPED(rfctl) ((rfctl)->cac_end_time == RTW_CAC_STOPPED) ++ + struct dvobj_priv + { + /*-------- below is common data --------*/ +- _adapter *if1; //PRIMARY_ADAPTER +- _adapter *if2; //SECONDARY_ADAPTER ++ u8 chip_type; ++ u8 HardwareType; ++ u8 interface_type;/*USB,SDIO,SPI,PCI*/ ++ ++ ATOMIC_T bSurpriseRemoved; ++ ATOMIC_T bDriverStopped; + + s32 processing_dev_remove; + +@@ -615,6 +709,10 @@ struct dvobj_priv + _mutex h2c_fwcmd_mutex; + _mutex setch_mutex; + _mutex setbw_mutex; ++ _mutex rf_read_reg_mutex; ++#ifdef CONFIG_SDIO_INDIRECT_ACCESS ++ _mutex sd_indirect_access_mutex; ++#endif + + unsigned char oper_channel; //saved channel info when call set_channel_bw + unsigned char oper_bwmode; +@@ -622,15 +720,17 @@ struct dvobj_priv + u32 on_oper_ch_time; + + //extend to support mulitu interface +- //padapters[IFACE_ID0] == if1 +- //padapters[IFACE_ID1] == if2 ++ /*padapters[IFACE_ID0] == if1 - PRIMARY_ADAPTER*/ ++ /*padapters[IFACE_ID1] == if2 - SECONDARY_ADAPTER*/ + _adapter *padapters[IFACE_ID_MAX]; + u8 iface_nums; // total number of ifaces used runtime + + struct macid_ctl_t macid_ctl; + + struct cam_ctl_t cam_ctl; +- struct cam_entry_cache cam_cache[TOTAL_CAM_ENTRY]; ++ struct sec_cam_ent cam_cache[SEC_CAM_ENT_NUM_SW_LIMIT]; ++ ++ struct rf_ctl_t rf_ctl; + + //For 92D, DMDP have 2 interface. + u8 InterfaceNumber; +@@ -650,6 +750,10 @@ struct dvobj_priv + + struct rtw_traffic_statistics traffic_stat; + ++#if defined(CONFIG_IOCTL_CFG80211) && defined(RTW_SINGLE_WIPHY) ++ struct wiphy *wiphy; ++#endif ++ + /*-------- below is for SDIO INTERFACE --------*/ + + #ifdef INTF_DATA +@@ -733,6 +837,7 @@ struct dvobj_priv + //PciBridge + struct pci_priv pcipriv; + ++ unsigned int irq; /* get from pci_dev.irq, store to net_device.irq */ + u16 irqline; + u8 irq_enabled; + RT_ISR_CONTENT isr_content; +@@ -758,6 +863,12 @@ struct dvobj_priv + #define dvobj_to_pwrctl(dvobj) (&(dvobj->pwrctl_priv)) + #define pwrctl_to_dvobj(pwrctl) container_of(pwrctl, struct dvobj_priv, pwrctl_priv) + #define dvobj_to_macidctl(dvobj) (&(dvobj->macid_ctl)) ++#define dvobj_to_regsty(dvobj) (&(dvobj->padapters[IFACE_ID0]->registrypriv)) ++#if defined(CONFIG_IOCTL_CFG80211) && defined(RTW_SINGLE_WIPHY) ++#define dvobj_to_wiphy(dvobj) ((dvobj)->wiphy) ++#endif ++#define dvobj_to_rfctl(dvobj) (&(dvobj->rf_ctl)) ++#define rfctl_to_dvobj(rfctl) container_of((rfctl), struct dvobj_priv, rf_ctl) + + #ifdef PLATFORM_LINUX + static struct device *dvobj_to_dev(struct dvobj_priv *dvobj) +@@ -834,9 +945,6 @@ struct _ADAPTER{ + int DriverState;// for disable driver using module, use dongle to replace module. + int pid[3];//process id from UI, 0:wps, 1:hostapd, 2:dhcpcd + int bDongle;//build-in module or external dongle +- u16 chip_type; +- u16 HardwareType; +- u16 interface_type;//USB,SDIO,SPI,PCI + + struct dvobj_priv *dvobj; + struct mlme_priv mlmepriv; +@@ -850,8 +958,8 @@ struct _ADAPTER{ + struct sta_priv stapriv; + struct security_priv securitypriv; + _lock security_key_mutex; // add for CONFIG_IEEE80211W, none 11w also can use +- struct registry_priv registrypriv; +- struct eeprom_priv eeprompriv; ++ struct registry_priv registrypriv; ++ + struct led_priv ledpriv; + + #ifdef CONFIG_MP_INCLUDED +@@ -890,24 +998,30 @@ struct _ADAPTER{ + struct wifi_display_info wfd_info; + #endif //CONFIG_WFD + ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ struct bt_coex_info coex_info; ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX ++ ++ ERROR_CODE LastError; /* <20130613, Kordan> Only the functions associated with MP records the error code by now. */ ++ + PVOID HalData; + u32 hal_data_sz; + struct hal_ops HalFunc; + +- s32 bDriverStopped; +- s32 bSurpriseRemoved; +- s32 bCardDisableWOHSM; +- + u32 IsrContent; + u32 ImrContent; + + u8 EepromAddressSize; +- u8 hw_init_completed; + u8 bDriverIsGoingToUnload; + u8 init_adpt_in_progress; + u8 bHaltInProgress; + #ifdef CONFIG_GPIO_API + u8 pre_gpio_pin; ++ struct gpio_int_priv { ++ u8 interrupt_mode; ++ u8 interrupt_enable_mask; ++ void (*callback[8])(u8 level); ++ }gpiointpriv; + #endif + _thread_hdl_ cmdThread; + _thread_hdl_ evtThread; +@@ -951,6 +1065,7 @@ struct _ADAPTER{ + u8 old_bRegUseLed; + } rereg_nd_name_priv; + ++ u8 ndev_unregistering; + int bup; + struct net_device_stats stats; + struct iw_statistics iwstats; +@@ -960,15 +1075,21 @@ struct _ADAPTER{ + #ifdef CONFIG_IOCTL_CFG80211 + struct wireless_dev *rtw_wdev; + struct rtw_wdev_priv wdev_data; +-#endif //CONFIG_IOCTL_CFG80211 + +-#endif //end of PLATFORM_LINUX ++ #if !defined(RTW_SINGLE_WIPHY) ++ struct wiphy *wiphy; ++ #endif ++ ++#endif /* CONFIG_IOCTL_CFG80211 */ ++ ++#endif /* PLATFORM_LINUX */ + + #ifdef PLATFORM_FREEBSD + _nic_hdl pifp; + int bup; + _lock glock; + #endif //PLATFORM_FREEBSD ++ u8 mac_addr[ETH_ALEN]; + int net_closed; + + u8 netif_up; +@@ -997,7 +1118,7 @@ struct _ADAPTER{ + //for PRIMARY_ADAPTER(IFACE_ID0) can directly refer to if1 in struct dvobj_priv + _adapter *pbuddy_adapter; + +-#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT) ++#if defined(CONFIG_CONCURRENT_MODE) + u8 isprimary; //is primary adapter or not + //notes: + // if isprimary is true, the adapter_type value is 0, iface_id is IFACE_ID0 for PRIMARY_ADAPTER +@@ -1005,17 +1126,13 @@ struct _ADAPTER{ + // refer to iface_id if iface_nums>2 and isprimary is false and the adapter_type value is 0xff. + u8 adapter_type;//used only in two inteface case(PRIMARY_ADAPTER and SECONDARY_ADAPTER) . + u8 iface_type; //interface port type, it depends on HW port +-#endif //CONFIG_CONCURRENT_MODE || CONFIG_DUALMAC_CONCURRENT ++#endif //CONFIG_CONCURRENT_MODE + + //extend to support multi interface + //IFACE_ID0 is equals to PRIMARY_ADAPTER + //IFACE_ID1 is equals to SECONDARY_ADAPTER + u8 iface_id; + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- u8 DualMacConcurrent; // 1: DMSP 0:DMDP +-#endif +- + #ifdef CONFIG_BR_EXT + _lock br_ext_lock; + //unsigned int macclone_completed; +@@ -1049,9 +1166,16 @@ struct _ADAPTER{ + u8 driver_vcs_type;//force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. + u8 driver_ampdu_spacing;//driver control AMPDU Density for peer sta's rx + u8 driver_rx_ampdu_factor;//0xff: disable drv ctrl, 0:8k, 1:16k, 2:32k, 3:64k; +- u8 fix_ba_rxbuf_bz; /* 0~127, TODO:consider each sta and each TID */ + u8 driver_rx_ampdu_spacing; //driver control Rx AMPDU Density ++ u8 fix_rx_ampdu_accept; ++ u8 fix_rx_ampdu_size; /* 0~127, TODO:consider each sta and each TID */ + unsigned char in_cta_test; ++#ifdef DBG_RX_COUNTER_DUMP ++ u8 dump_rx_cnt_mode;/*BIT0:drv,BIT1:mac,BIT2:phy*/ ++ u32 drv_rx_cnt_ok; ++ u32 drv_rx_cnt_crcerror; ++ u32 drv_rx_cnt_drop; ++#endif + + #ifdef CONFIG_DBG_COUNTER + struct rx_logs rx_logs; +@@ -1060,15 +1184,51 @@ struct _ADAPTER{ + #endif + }; + +-#define adapter_to_dvobj(adapter) (adapter->dvobj) +-#define adapter_to_pwrctl(adapter) (dvobj_to_pwrctl(adapter->dvobj)) ++#define adapter_to_dvobj(adapter) ((adapter)->dvobj) ++#define adapter_to_regsty(adapter) dvobj_to_regsty(adapter_to_dvobj((adapter))) ++#define adapter_to_pwrctl(adapter) dvobj_to_pwrctl(adapter_to_dvobj((adapter))) + #define adapter_wdev_data(adapter) (&((adapter)->wdev_data)) ++#if defined(RTW_SINGLE_WIPHY) ++#define adapter_to_wiphy(adapter) dvobj_to_wiphy(adapter_to_dvobj(adapter)) ++#else ++#define adapter_to_wiphy(adapter) ((adapter)->wiphy) ++#endif ++ ++#define adapter_to_rfctl(adapter) dvobj_to_rfctl(adapter_to_dvobj((adapter))) ++ ++#define adapter_mac_addr(adapter) (adapter->mac_addr) ++ ++#define mlme_to_adapter(mlme) container_of((mlme), struct _ADAPTER, mlmepriv) ++#define tdls_info_to_adapter(tdls) container_of((tdls), struct _ADAPTER, tdlsinfo) ++ ++#define rtw_get_chip_type(adapter) (((PADAPTER)adapter)->dvobj->chip_type) ++#define rtw_get_hw_type(adapter) (((PADAPTER)adapter)->dvobj->HardwareType) ++#define rtw_get_intf_type(adapter) (((PADAPTER)adapter)->dvobj->interface_type) ++ ++static inline void rtw_set_surprise_removed(_adapter *padapter) ++{ ++ ATOMIC_SET(&adapter_to_dvobj(padapter)->bSurpriseRemoved, _TRUE); ++} ++static inline void rtw_clr_surprise_removed(_adapter *padapter) ++{ ++ ATOMIC_SET(&adapter_to_dvobj(padapter)->bSurpriseRemoved, _FALSE); ++} ++static inline void rtw_set_drv_stopped(_adapter *padapter) ++{ ++ ATOMIC_SET(&adapter_to_dvobj(padapter)->bDriverStopped, _TRUE); ++} ++static inline void rtw_clr_drv_stopped(_adapter *padapter) ++{ ++ ATOMIC_SET(&adapter_to_dvobj(padapter)->bDriverStopped, _FALSE); ++} ++#define rtw_is_surprise_removed(padapter) (ATOMIC_READ(&adapter_to_dvobj(padapter)->bSurpriseRemoved) == _TRUE) ++#define rtw_is_drv_stopped(padapter) (ATOMIC_READ(&adapter_to_dvobj(padapter)->bDriverStopped) == _TRUE) + + // + // Function disabled. + // +-#define DF_TX_BIT BIT0 +-#define DF_RX_BIT BIT1 ++#define DF_TX_BIT BIT0 /*write_port_cancel*/ ++#define DF_RX_BIT BIT1 /*read_port_cancel*/ + #define DF_IO_BIT BIT2 + + //#define RTW_DISABLE_FUNC(padapter, func) (ATOMIC_ADD(&adapter_to_dvobj(padapter)->disable_func, (func))) +@@ -1087,24 +1247,24 @@ __inline static void RTW_ENABLE_FUNC(_adapter*padapter, int func_bit) + ATOMIC_SET(&adapter_to_dvobj(padapter)->disable_func, df); + } + ++#define RTW_CANNOT_RUN(padapter) \ ++ (rtw_is_surprise_removed(padapter) || \ ++ rtw_is_drv_stopped(padapter)) ++ + #define RTW_IS_FUNC_DISABLED(padapter, func_bit) (ATOMIC_READ(&adapter_to_dvobj(padapter)->disable_func) & (func_bit)) + + #define RTW_CANNOT_IO(padapter) \ +- ((padapter)->bSurpriseRemoved || \ +- RTW_IS_FUNC_DISABLED((padapter), DF_IO_BIT)) ++ (rtw_is_surprise_removed(padapter) || \ ++ RTW_IS_FUNC_DISABLED((padapter), DF_IO_BIT)) + + #define RTW_CANNOT_RX(padapter) \ +- ((padapter)->bDriverStopped || \ +- (padapter)->bSurpriseRemoved || \ ++ (RTW_CANNOT_RUN(padapter) || \ + RTW_IS_FUNC_DISABLED((padapter), DF_RX_BIT)) + + #define RTW_CANNOT_TX(padapter) \ +- ((padapter)->bDriverStopped || \ +- (padapter)->bSurpriseRemoved || \ ++ (RTW_CANNOT_RUN(padapter) || \ + RTW_IS_FUNC_DISABLED((padapter), DF_TX_BIT)) + +-int rtw_handle_dualmac(_adapter *adapter, bool init); +- + #ifdef CONFIG_PNO_SUPPORT + int rtw_parse_ssid_list_tlv(char** list_str, pno_ssid_t* ssid, int max, int *bytes_left); + int rtw_dev_pno_set(struct net_device *net, pno_ssid_t* ssid, int num, +@@ -1119,11 +1279,6 @@ int rtw_suspend_wow(_adapter *padapter); + int rtw_resume_process_wow(_adapter *padapter); + #endif + +-__inline static u8 *myid(struct eeprom_priv *peepriv) +-{ +- return (peepriv->mac_addr); +-} +- + // HCI Related header file + #ifdef CONFIG_USB_HCI + #include +@@ -1149,9 +1304,5 @@ __inline static u8 *myid(struct eeprom_priv *peepriv) + #include + #endif + +-#ifdef CONFIG_BT_COEXIST +-#include +-#endif // CONFIG_BT_COEXIST +- + #endif //__DRV_TYPES_H__ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_ce.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_ce.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_gspi.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_gspi.h +old mode 100755 +new mode 100644 +index 27b3cb0..545776b +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_gspi.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_gspi.h +@@ -1,56 +1,56 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __DRV_TYPES_GSPI_H__ +-#define __DRV_TYPES_GSPI_H__ +- +-// SPI Header Files +-#ifdef PLATFORM_LINUX +- #include +- #include +- #include +- //#include +- #include +- #include +- #include +- #include +- #include +- #include +- #include +-#endif +- +- +-typedef struct gspi_data +-{ +- u8 func_number; +- +- u8 tx_block_mode; +- u8 rx_block_mode; +- u32 block_transfer_len; +- +-#ifdef PLATFORM_LINUX +- struct spi_device *func; +- +- struct workqueue_struct *priv_wq; +- struct delayed_work irq_work; +-#endif +-} GSPI_DATA, *PGSPI_DATA; +- +-#endif // #ifndef __DRV_TYPES_GSPI_H__ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_GSPI_H__ ++#define __DRV_TYPES_GSPI_H__ ++ ++// SPI Header Files ++#ifdef PLATFORM_LINUX ++ #include ++ #include ++ #include ++ //#include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++#endif ++ ++ ++typedef struct gspi_data ++{ ++ u8 func_number; ++ ++ u8 tx_block_mode; ++ u8 rx_block_mode; ++ u32 block_transfer_len; ++ ++#ifdef PLATFORM_LINUX ++ struct spi_device *func; ++ ++ struct workqueue_struct *priv_wq; ++ struct delayed_work irq_work; ++#endif ++} GSPI_DATA, *PGSPI_DATA; ++ ++#endif // #ifndef __DRV_TYPES_GSPI_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_linux.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_linux.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_pci.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_pci.h +old mode 100755 +new mode 100644 +index 6ba8f92..857aaf9 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_pci.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_pci.h +@@ -1,280 +1,273 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __DRV_TYPES_PCI_H__ +-#define __DRV_TYPES_PCI_H__ +- +- +-#ifdef PLATFORM_LINUX +-#include +-#endif +- +- +-#define INTEL_VENDOR_ID 0x8086 +-#define SIS_VENDOR_ID 0x1039 +-#define ATI_VENDOR_ID 0x1002 +-#define ATI_DEVICE_ID 0x7914 +-#define AMD_VENDOR_ID 0x1022 +- +-#define PCI_MAX_BRIDGE_NUMBER 255 +-#define PCI_MAX_DEVICES 32 +-#define PCI_MAX_FUNCTION 8 +- +-#define PCI_CONF_ADDRESS 0x0CF8 // PCI Configuration Space Address +-#define PCI_CONF_DATA 0x0CFC // PCI Configuration Space Data +- +-#define PCI_CLASS_BRIDGE_DEV 0x06 +-#define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04 +- +-#define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10 +- +-#define U1DONTCARE 0xFF +-#define U2DONTCARE 0xFFFF +-#define U4DONTCARE 0xFFFFFFFF +- +-#define PCI_VENDER_ID_REALTEK 0x10ec +- +-#define HAL_HW_PCI_8180_DEVICE_ID 0x8180 +-#define HAL_HW_PCI_8185_DEVICE_ID 0x8185 //8185 or 8185b +-#define HAL_HW_PCI_8188_DEVICE_ID 0x8188 //8185b +-#define HAL_HW_PCI_8198_DEVICE_ID 0x8198 //8185b +-#define HAL_HW_PCI_8190_DEVICE_ID 0x8190 //8190 +-#define HAL_HW_PCI_8723E_DEVICE_ID 0x8723 //8723E +-#define HAL_HW_PCI_8192_DEVICE_ID 0x8192 //8192 PCI-E +-#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 //8192 SE +-#define HAL_HW_PCI_8174_DEVICE_ID 0x8174 //8192 SE +-#define HAL_HW_PCI_8173_DEVICE_ID 0x8173 //8191 SE Crab +-#define HAL_HW_PCI_8172_DEVICE_ID 0x8172 //8191 SE RE +-#define HAL_HW_PCI_8171_DEVICE_ID 0x8171 //8191 SE Unicron +-#define HAL_HW_PCI_0045_DEVICE_ID 0x0045 //8190 PCI for Ceraga +-#define HAL_HW_PCI_0046_DEVICE_ID 0x0046 //8190 Cardbus for Ceraga +-#define HAL_HW_PCI_0044_DEVICE_ID 0x0044 //8192e PCIE for Ceraga +-#define HAL_HW_PCI_0047_DEVICE_ID 0x0047 //8192e Express Card for Ceraga +-#define HAL_HW_PCI_700F_DEVICE_ID 0x700F +-#define HAL_HW_PCI_701F_DEVICE_ID 0x701F +-#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304 +-#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191 //8192ce +-#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178 //8192ce +-#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177 //8192ce +-#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176 //8192ce +-#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191 //8192ce +-#define HAL_HW_PCI_8192DE_DEVICE_ID 0x8193 //8192de +-#define HAL_HW_PCI_002B_DEVICE_ID 0x002B //8192de, provided by HW SD +-#define HAL_HW_PCI_8188EE_DEVICE_ID 0x8179 +- +-#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 //8190 support 16 pages of IO registers +-#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00 +-#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 //8192 support 16 pages of IO registers +-#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01 +-#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 //8192 support 16 pages of IO registers +-#define HAL_HW_PCI_REVISION_ID_8192SE 0x10 +-#define HAL_HW_PCI_REVISION_ID_8192CE 0x1 +-#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 //8192 support 16 pages of IO registers +-#define HAL_HW_PCI_REVISION_ID_8192DE 0x0 +-#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 //8192 support 16 pages of IO registers +- +-enum pci_bridge_vendor { +- PCI_BRIDGE_VENDOR_INTEL = 0x0,//0b'0000,0001 +- PCI_BRIDGE_VENDOR_ATI, //= 0x02,//0b'0000,0010 +- PCI_BRIDGE_VENDOR_AMD, //= 0x04,//0b'0000,0100 +- PCI_BRIDGE_VENDOR_SIS ,//= 0x08,//0b'0000,1000 +- PCI_BRIDGE_VENDOR_UNKNOWN, //= 0x40,//0b'0100,0000 +- PCI_BRIDGE_VENDOR_MAX ,//= 0x80 +-} ; +- +-// copy this data structor defination from MSDN SDK +-typedef struct _PCI_COMMON_CONFIG { +- u16 VendorID; +- u16 DeviceID; +- u16 Command; +- u16 Status; +- u8 RevisionID; +- u8 ProgIf; +- u8 SubClass; +- u8 BaseClass; +- u8 CacheLineSize; +- u8 LatencyTimer; +- u8 HeaderType; +- u8 BIST; +- +- union { +- struct _PCI_HEADER_TYPE_0 { +- u32 BaseAddresses[6]; +- u32 CIS; +- u16 SubVendorID; +- u16 SubSystemID; +- u32 ROMBaseAddress; +- u8 CapabilitiesPtr; +- u8 Reserved1[3]; +- u32 Reserved2; +- +- u8 InterruptLine; +- u8 InterruptPin; +- u8 MinimumGrant; +- u8 MaximumLatency; +- } type0; +-#if 0 +- struct _PCI_HEADER_TYPE_1 { +- ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; +- UCHAR PrimaryBusNumber; +- UCHAR SecondaryBusNumber; +- UCHAR SubordinateBusNumber; +- UCHAR SecondaryLatencyTimer; +- UCHAR IOBase; +- UCHAR IOLimit; +- USHORT SecondaryStatus; +- USHORT MemoryBase; +- USHORT MemoryLimit; +- USHORT PrefetchableMemoryBase; +- USHORT PrefetchableMemoryLimit; +- ULONG PrefetchableMemoryBaseUpper32; +- ULONG PrefetchableMemoryLimitUpper32; +- USHORT IOBaseUpper; +- USHORT IOLimitUpper; +- ULONG Reserved2; +- ULONG ExpansionROMBase; +- UCHAR InterruptLine; +- UCHAR InterruptPin; +- USHORT BridgeControl; +- } type1; +- +- struct _PCI_HEADER_TYPE_2 { +- ULONG BaseAddress; +- UCHAR CapabilitiesPtr; +- UCHAR Reserved2; +- USHORT SecondaryStatus; +- UCHAR PrimaryBusNumber; +- UCHAR CardbusBusNumber; +- UCHAR SubordinateBusNumber; +- UCHAR CardbusLatencyTimer; +- ULONG MemoryBase0; +- ULONG MemoryLimit0; +- ULONG MemoryBase1; +- ULONG MemoryLimit1; +- USHORT IOBase0_LO; +- USHORT IOBase0_HI; +- USHORT IOLimit0_LO; +- USHORT IOLimit0_HI; +- USHORT IOBase1_LO; +- USHORT IOBase1_HI; +- USHORT IOLimit1_LO; +- USHORT IOLimit1_HI; +- UCHAR InterruptLine; +- UCHAR InterruptPin; +- USHORT BridgeControl; +- USHORT SubVendorID; +- USHORT SubSystemID; +- ULONG LegacyBaseAddress; +- UCHAR Reserved3[56]; +- ULONG SystemControl; +- UCHAR MultiMediaControl; +- UCHAR GeneralStatus; +- UCHAR Reserved4[2]; +- UCHAR GPIO0Control; +- UCHAR GPIO1Control; +- UCHAR GPIO2Control; +- UCHAR GPIO3Control; +- ULONG IRQMuxRouting; +- UCHAR RetryStatus; +- UCHAR CardControl; +- UCHAR DeviceControl; +- UCHAR Diagnostic; +- } type2; +-#endif +- } u; +- +- u8 DeviceSpecific[108]; +-} PCI_COMMON_CONFIG , *PPCI_COMMON_CONFIG; +- +-typedef struct _RT_PCI_CAPABILITIES_HEADER { +- u8 CapabilityID; +- u8 Next; +-} RT_PCI_CAPABILITIES_HEADER, *PRT_PCI_CAPABILITIES_HEADER; +- +-struct pci_priv{ +- BOOLEAN pci_clk_req; +- +- u8 pciehdr_offset; +- // PCIeCap is only differece between B-cut and C-cut. +- // Configuration Space offset 72[7:4] +- // 0: A/B cut +- // 1: C cut and later. +- u8 pcie_cap; +- u8 linkctrl_reg; +- +- u8 busnumber; +- u8 devnumber; +- u8 funcnumber; +- +- u8 pcibridge_busnum; +- u8 pcibridge_devnum; +- u8 pcibridge_funcnum; +- u8 pcibridge_vendor; +- u16 pcibridge_vendorid; +- u16 pcibridge_deviceid; +- u8 pcibridge_pciehdr_offset; +- u8 pcibridge_linkctrlreg; +- +- u8 amd_l1_patch; +-}; +- +-typedef struct _RT_ISR_CONTENT +-{ +- union{ +- u32 IntArray[2]; +- u32 IntReg4Byte; +- u16 IntReg2Byte; +- }; +-}RT_ISR_CONTENT, *PRT_ISR_CONTENT; +- +-//#define RegAddr(addr) (addr + 0xB2000000UL) +-//some platform macros will def here +-static inline void NdisRawWritePortUlong(u32 port, u32 val) +-{ +- outl(val, port); +- //writel(val, (u8 *)RegAddr(port)); +-} +- +-static inline void NdisRawWritePortUchar(u32 port, u8 val) +-{ +- outb(val, port); +- //writeb(val, (u8 *)RegAddr(port)); +-} +- +-static inline void NdisRawReadPortUchar(u32 port, u8 *pval) +-{ +- *pval = inb(port); +- //*pval = readb((u8 *)RegAddr(port)); +-} +- +-static inline void NdisRawReadPortUshort(u32 port, u16 *pval) +-{ +- *pval = inw(port); +- //*pval = readw((u8 *)RegAddr(port)); +-} +- +-static inline void NdisRawReadPortUlong(u32 port, u32 *pval) +-{ +- *pval = inl(port); +- //*pval = readl((u8 *)RegAddr(port)); +-} +- +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_PCI_H__ ++#define __DRV_TYPES_PCI_H__ ++ ++ ++#ifdef PLATFORM_LINUX ++#include ++#endif ++ ++ ++#define INTEL_VENDOR_ID 0x8086 ++#define SIS_VENDOR_ID 0x1039 ++#define ATI_VENDOR_ID 0x1002 ++#define ATI_DEVICE_ID 0x7914 ++#define AMD_VENDOR_ID 0x1022 ++ ++#define PCI_MAX_BRIDGE_NUMBER 255 ++#define PCI_MAX_DEVICES 32 ++#define PCI_MAX_FUNCTION 8 ++ ++#define PCI_CONF_ADDRESS 0x0CF8 // PCI Configuration Space Address ++#define PCI_CONF_DATA 0x0CFC // PCI Configuration Space Data ++ ++#define PCI_CLASS_BRIDGE_DEV 0x06 ++#define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04 ++ ++#define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10 ++ ++#define U1DONTCARE 0xFF ++#define U2DONTCARE 0xFFFF ++#define U4DONTCARE 0xFFFFFFFF ++ ++#define PCI_VENDER_ID_REALTEK 0x10ec ++ ++#define HAL_HW_PCI_8180_DEVICE_ID 0x8180 ++#define HAL_HW_PCI_8185_DEVICE_ID 0x8185 //8185 or 8185b ++#define HAL_HW_PCI_8188_DEVICE_ID 0x8188 //8185b ++#define HAL_HW_PCI_8198_DEVICE_ID 0x8198 //8185b ++#define HAL_HW_PCI_8190_DEVICE_ID 0x8190 //8190 ++#define HAL_HW_PCI_8723E_DEVICE_ID 0x8723 //8723E ++#define HAL_HW_PCI_8192_DEVICE_ID 0x8192 //8192 PCI-E ++#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 //8192 SE ++#define HAL_HW_PCI_8174_DEVICE_ID 0x8174 //8192 SE ++#define HAL_HW_PCI_8173_DEVICE_ID 0x8173 //8191 SE Crab ++#define HAL_HW_PCI_8172_DEVICE_ID 0x8172 //8191 SE RE ++#define HAL_HW_PCI_8171_DEVICE_ID 0x8171 //8191 SE Unicron ++#define HAL_HW_PCI_0045_DEVICE_ID 0x0045 //8190 PCI for Ceraga ++#define HAL_HW_PCI_0046_DEVICE_ID 0x0046 //8190 Cardbus for Ceraga ++#define HAL_HW_PCI_0044_DEVICE_ID 0x0044 //8192e PCIE for Ceraga ++#define HAL_HW_PCI_0047_DEVICE_ID 0x0047 //8192e Express Card for Ceraga ++#define HAL_HW_PCI_700F_DEVICE_ID 0x700F ++#define HAL_HW_PCI_701F_DEVICE_ID 0x701F ++#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304 ++#define HAL_HW_PCI_8188EE_DEVICE_ID 0x8179 ++ ++#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 //8190 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192SE 0x10 ++#define HAL_HW_PCI_REVISION_ID_8192CE 0x1 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192DE 0x0 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 //8192 support 16 pages of IO registers ++ ++enum pci_bridge_vendor { ++ PCI_BRIDGE_VENDOR_INTEL = 0x0,//0b'0000,0001 ++ PCI_BRIDGE_VENDOR_ATI, //= 0x02,//0b'0000,0010 ++ PCI_BRIDGE_VENDOR_AMD, //= 0x04,//0b'0000,0100 ++ PCI_BRIDGE_VENDOR_SIS ,//= 0x08,//0b'0000,1000 ++ PCI_BRIDGE_VENDOR_UNKNOWN, //= 0x40,//0b'0100,0000 ++ PCI_BRIDGE_VENDOR_MAX ,//= 0x80 ++} ; ++ ++// copy this data structor defination from MSDN SDK ++typedef struct _PCI_COMMON_CONFIG { ++ u16 VendorID; ++ u16 DeviceID; ++ u16 Command; ++ u16 Status; ++ u8 RevisionID; ++ u8 ProgIf; ++ u8 SubClass; ++ u8 BaseClass; ++ u8 CacheLineSize; ++ u8 LatencyTimer; ++ u8 HeaderType; ++ u8 BIST; ++ ++ union { ++ struct _PCI_HEADER_TYPE_0 { ++ u32 BaseAddresses[6]; ++ u32 CIS; ++ u16 SubVendorID; ++ u16 SubSystemID; ++ u32 ROMBaseAddress; ++ u8 CapabilitiesPtr; ++ u8 Reserved1[3]; ++ u32 Reserved2; ++ ++ u8 InterruptLine; ++ u8 InterruptPin; ++ u8 MinimumGrant; ++ u8 MaximumLatency; ++ } type0; ++#if 0 ++ struct _PCI_HEADER_TYPE_1 { ++ ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; ++ UCHAR PrimaryBusNumber; ++ UCHAR SecondaryBusNumber; ++ UCHAR SubordinateBusNumber; ++ UCHAR SecondaryLatencyTimer; ++ UCHAR IOBase; ++ UCHAR IOLimit; ++ USHORT SecondaryStatus; ++ USHORT MemoryBase; ++ USHORT MemoryLimit; ++ USHORT PrefetchableMemoryBase; ++ USHORT PrefetchableMemoryLimit; ++ ULONG PrefetchableMemoryBaseUpper32; ++ ULONG PrefetchableMemoryLimitUpper32; ++ USHORT IOBaseUpper; ++ USHORT IOLimitUpper; ++ ULONG Reserved2; ++ ULONG ExpansionROMBase; ++ UCHAR InterruptLine; ++ UCHAR InterruptPin; ++ USHORT BridgeControl; ++ } type1; ++ ++ struct _PCI_HEADER_TYPE_2 { ++ ULONG BaseAddress; ++ UCHAR CapabilitiesPtr; ++ UCHAR Reserved2; ++ USHORT SecondaryStatus; ++ UCHAR PrimaryBusNumber; ++ UCHAR CardbusBusNumber; ++ UCHAR SubordinateBusNumber; ++ UCHAR CardbusLatencyTimer; ++ ULONG MemoryBase0; ++ ULONG MemoryLimit0; ++ ULONG MemoryBase1; ++ ULONG MemoryLimit1; ++ USHORT IOBase0_LO; ++ USHORT IOBase0_HI; ++ USHORT IOLimit0_LO; ++ USHORT IOLimit0_HI; ++ USHORT IOBase1_LO; ++ USHORT IOBase1_HI; ++ USHORT IOLimit1_LO; ++ USHORT IOLimit1_HI; ++ UCHAR InterruptLine; ++ UCHAR InterruptPin; ++ USHORT BridgeControl; ++ USHORT SubVendorID; ++ USHORT SubSystemID; ++ ULONG LegacyBaseAddress; ++ UCHAR Reserved3[56]; ++ ULONG SystemControl; ++ UCHAR MultiMediaControl; ++ UCHAR GeneralStatus; ++ UCHAR Reserved4[2]; ++ UCHAR GPIO0Control; ++ UCHAR GPIO1Control; ++ UCHAR GPIO2Control; ++ UCHAR GPIO3Control; ++ ULONG IRQMuxRouting; ++ UCHAR RetryStatus; ++ UCHAR CardControl; ++ UCHAR DeviceControl; ++ UCHAR Diagnostic; ++ } type2; ++#endif ++ } u; ++ ++ u8 DeviceSpecific[108]; ++} PCI_COMMON_CONFIG , *PPCI_COMMON_CONFIG; ++ ++typedef struct _RT_PCI_CAPABILITIES_HEADER { ++ u8 CapabilityID; ++ u8 Next; ++} RT_PCI_CAPABILITIES_HEADER, *PRT_PCI_CAPABILITIES_HEADER; ++ ++struct pci_priv{ ++ BOOLEAN pci_clk_req; ++ ++ u8 pciehdr_offset; ++ // PCIeCap is only differece between B-cut and C-cut. ++ // Configuration Space offset 72[7:4] ++ // 0: A/B cut ++ // 1: C cut and later. ++ u8 pcie_cap; ++ u8 linkctrl_reg; ++ ++ u8 busnumber; ++ u8 devnumber; ++ u8 funcnumber; ++ ++ u8 pcibridge_busnum; ++ u8 pcibridge_devnum; ++ u8 pcibridge_funcnum; ++ u8 pcibridge_vendor; ++ u16 pcibridge_vendorid; ++ u16 pcibridge_deviceid; ++ u8 pcibridge_pciehdr_offset; ++ u8 pcibridge_linkctrlreg; ++ ++ u8 amd_l1_patch; ++}; ++ ++typedef struct _RT_ISR_CONTENT ++{ ++ union{ ++ u32 IntArray[2]; ++ u32 IntReg4Byte; ++ u16 IntReg2Byte; ++ }; ++}RT_ISR_CONTENT, *PRT_ISR_CONTENT; ++ ++//#define RegAddr(addr) (addr + 0xB2000000UL) ++//some platform macros will def here ++static inline void NdisRawWritePortUlong(u32 port, u32 val) ++{ ++ outl(val, port); ++ //writel(val, (u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawWritePortUchar(u32 port, u8 val) ++{ ++ outb(val, port); ++ //writeb(val, (u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUchar(u32 port, u8 *pval) ++{ ++ *pval = inb(port); ++ //*pval = readb((u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUshort(u32 port, u16 *pval) ++{ ++ *pval = inw(port); ++ //*pval = readw((u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUlong(u32 port, u32 *pval) ++{ ++ *pval = inl(port); ++ //*pval = readl((u8 *)RegAddr(port)); ++} ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_sdio.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_sdio.h +old mode 100755 +new mode 100644 +index 044ef51..2fa9026 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_sdio.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_sdio.h +@@ -1,81 +1,81 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __DRV_TYPES_SDIO_H__ +-#define __DRV_TYPES_SDIO_H__ +- +-// SDIO Header Files +-#ifdef PLATFORM_LINUX +- #include +- #include +- +-#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PLATFORM_SPRD) +- #include +- #include +-#endif +- +-#ifdef CONFIG_PLATFORM_SPRD +- #include +- #include +-#endif // CONFIG_PLATFORM_SPRD +-#endif +- +-#ifdef PLATFORM_OS_XP +-#include +-#include +-#endif +- +-#ifdef PLATFORM_OS_CE +-#include +-#endif +- +- +-typedef struct sdio_data +-{ +- u8 func_number; +- +- u8 tx_block_mode; +- u8 rx_block_mode; +- u32 block_transfer_len; +- +-#ifdef PLATFORM_LINUX +- struct sdio_func *func; +- _thread_hdl_ sys_sdio_irq_thd; +-#endif +- +-#ifdef PLATFORM_OS_XP +- PDEVICE_OBJECT pphysdevobj; +- PDEVICE_OBJECT pfuncdevobj; +- PDEVICE_OBJECT pnextdevobj; +- SDBUS_INTERFACE_STANDARD sdbusinft; +- u8 nextdevstacksz; +-#endif +- +-#ifdef PLATFORM_OS_CE +- SD_DEVICE_HANDLE hDevice; +- SD_CARD_RCA sd_rca; +- SD_CARD_INTERFACE card_intf; +- BOOLEAN enableIsarWithStatus; +- WCHAR active_path[MAX_ACTIVE_REG_PATH]; +- SD_HOST_BLOCK_CAPABILITY sd_host_blk_cap; +-#endif +-} SDIO_DATA, *PSDIO_DATA; +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_SDIO_H__ ++#define __DRV_TYPES_SDIO_H__ ++ ++// SDIO Header Files ++#ifdef PLATFORM_LINUX ++ #include ++ #include ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PLATFORM_SPRD) ++ #include ++ #include ++#endif ++ ++#ifdef CONFIG_PLATFORM_SPRD ++ #include ++ #include ++#endif // CONFIG_PLATFORM_SPRD ++#endif ++ ++#ifdef PLATFORM_OS_XP ++#include ++#include ++#endif ++ ++#ifdef PLATFORM_OS_CE ++#include ++#endif ++ ++ ++typedef struct sdio_data ++{ ++ u8 func_number; ++ ++ u8 tx_block_mode; ++ u8 rx_block_mode; ++ u32 block_transfer_len; ++ ++#ifdef PLATFORM_LINUX ++ struct sdio_func *func; ++ _thread_hdl_ sys_sdio_irq_thd; ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ PDEVICE_OBJECT pphysdevobj; ++ PDEVICE_OBJECT pfuncdevobj; ++ PDEVICE_OBJECT pnextdevobj; ++ SDBUS_INTERFACE_STANDARD sdbusinft; ++ u8 nextdevstacksz; ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ SD_DEVICE_HANDLE hDevice; ++ SD_CARD_RCA sd_rca; ++ SD_CARD_INTERFACE card_intf; ++ BOOLEAN enableIsarWithStatus; ++ WCHAR active_path[MAX_ACTIVE_REG_PATH]; ++ SD_HOST_BLOCK_CAPABILITY sd_host_blk_cap; ++#endif ++} SDIO_DATA, *PSDIO_DATA; ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_xp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/drv_types_xp.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ethernet.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ethernet.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_hal.h +old mode 100755 +new mode 100644 +index efe1afb..7581512 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_hal.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_hal.h +@@ -21,12 +21,8 @@ + #define __GSPI_HAL_H__ + + +-void spi_int_dpc(PADAPTER padapter); +-void rtw_set_hal_ops(_adapter *padapter); +- +-#ifdef CONFIG_RTL8723A +-void rtl8723as_set_hal_ops(PADAPTER padapter); +-#endif ++void spi_int_dpc(PADAPTER padapter, u32 sdio_hisr); ++u8 rtw_set_hal_ops(_adapter *padapter); + + #ifdef CONFIG_RTL8188E + void rtl8188es_set_hal_ops(PADAPTER padapter); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_ops.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_ops.h +old mode 100755 +new mode 100644 +index 1e77ccc..e04c28a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_ops.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_ops.h +@@ -146,16 +146,12 @@ struct spi_more_data { + unsigned long len; + }; + +-#ifdef CONFIG_RTL8723A +-void rtl8723as_set_hal_ops(PADAPTER padapter); +-#define set_hal_ops rtl8723as_set_hal_ops +-#endif +- + #ifdef CONFIG_RTL8188E + void rtl8188es_set_hal_ops(PADAPTER padapter); + #define set_hal_ops rtl8188es_set_hal_ops + #endif + extern void spi_set_chip_endian(PADAPTER padapter); ++extern unsigned int spi_write8_endian(ADAPTER *Adapter, unsigned int addr, unsigned int buf, u32 big); + extern void spi_set_intf_ops(_adapter *padapter,struct _io_ops *pops); + extern void spi_set_chip_endian(PADAPTER padapter); + extern void InitInterrupt8723ASdio(PADAPTER padapter); +@@ -164,9 +160,6 @@ extern void EnableInterrupt8723ASdio(PADAPTER padapter); + extern void DisableInterrupt8723ASdio(PADAPTER padapter); + extern void spi_int_hdl(PADAPTER padapter); + extern u8 HalQueryTxBufferStatus8723ASdio(PADAPTER padapter); +-extern void InitInterrupt8188ESdio(PADAPTER padapter); +-extern void EnableInterrupt8188ESdio(PADAPTER padapter); +-extern void DisableInterrupt8188ESdio(PADAPTER padapter); + #ifdef CONFIG_RTL8723B + extern void InitInterrupt8723BSdio(PADAPTER padapter); + extern void InitSysInterrupt8723BSdio(PADAPTER padapter); +@@ -175,4 +168,18 @@ extern void DisableInterrupt8723BSdio(PADAPTER padapter); + extern u8 HalQueryTxBufferStatus8723BSdio(PADAPTER padapter); + #endif + ++#ifdef CONFIG_RTL8188E ++extern void InitInterrupt8188EGspi(PADAPTER padapter); ++extern void EnableInterrupt8188EGspi(PADAPTER padapter); ++extern void DisableInterrupt8188EGspi(PADAPTER padapter); ++extern void UpdateInterruptMask8188EGspi(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR); ++extern u8 HalQueryTxBufferStatus8189EGspi(PADAPTER padapter); ++extern u8 HalQueryTxOQTBufferStatus8189EGspi(PADAPTER padapter); ++extern void ClearInterrupt8188EGspi(PADAPTER padapter); ++extern u8 CheckIPSStatus(PADAPTER padapter); ++#endif // CONFIG_RTL8188E ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++extern u8 RecvOnePkt(PADAPTER padapter, u32 size); ++#endif // CONFIG_WOWLAN ++ + #endif //__GSPI_OPS_H__ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_ops_linux.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_ops_linux.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_osintf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/gspi_osintf.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/h2clbk.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/h2clbk.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_btcoex.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_btcoex.h +old mode 100755 +new mode 100644 +index 84aa63a..dd2eb84 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_btcoex.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_btcoex.h +@@ -57,12 +57,15 @@ void hal_btcoex_MediaStatusNotify(PADAPTER padapter, u8 mediaStatus); + void hal_btcoex_SpecialPacketNotify(PADAPTER padapter, u8 pktType); + void hal_btcoex_IQKNotify(PADAPTER padapter, u8 state); + void hal_btcoex_BtInfoNotify(PADAPTER padapter, u8 length, u8 *tmpBuf); ++void hal_btcoex_BtMpRptNotify(PADAPTER padapter, u8 length, u8 *tmpBuf); + void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state); + void hal_btcoex_HaltNotify(PADAPTER padapter); ++void hal_btcoex_ScoreBoardStatusNotify(PADAPTER padapter, u8 length, u8 *tmpBuf); + void hal_btcoex_SwitchBtTRxMask(PADAPTER padapter); + + void hal_btcoex_Hanlder(PADAPTER padapter); + ++s32 hal_btcoex_IsBTCoexRejectAMPDU(PADAPTER padapter); + s32 hal_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER padapter); + u32 hal_btcoex_GetAMPDUSize(PADAPTER padapter); + void hal_btcoex_SetManualControl(PADAPTER padapter, u8 bmanual); +@@ -78,10 +81,17 @@ void hal_btcoex_SetDBG(PADAPTER, u32 *pDbgModule); + u32 hal_btcoex_GetDBG(PADAPTER, u8 *pStrBuf, u32 bufSize); + u8 hal_btcoex_IncreaseScanDeviceNum(PADAPTER); + u8 hal_btcoex_IsBtLinkExist(PADAPTER); ++void hal_btcoex_SetBtPatchVersion(PADAPTER,u16 btHciVer,u16 btPatchVer); ++void hal_btcoex_SetHciVersion(PADAPTER, u16 hciVersion); ++void hal_btcoex_SendScanNotify(PADAPTER, u8 type); ++void hal_btcoex_StackUpdateProfileInfo(void); ++void hal_btcoex_BTOffOnNotify(PADAPTER padapter, u8 bBTON); + void hal_btcoex_SetAntIsolationType(PADAPTER padapter, u8 anttype); + #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + int hal_btcoex_AntIsolationConfig_ParaFile(IN PADAPTER Adapter,IN char* pFileName); + int hal_btcoex_ParseAntIsolationConfigFile(PADAPTER Adapter, char* buffer); + #endif // CONFIG_LOAD_PHY_PARA_FROM_FILE ++u16 hal_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data); ++u16 hal_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val); + #endif // !__HAL_BTCOEX_H__ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com.h +old mode 100755 +new mode 100644 +index 6cb7f71..eb003d3 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com.h +@@ -26,6 +26,7 @@ + #include "hal_phy_reg.h" + #include "hal_com_reg.h" + #include "hal_com_phycfg.h" ++#include "../hal/hal_com_c2h.h" + + /*------------------------------ Tx Desc definition Macro ------------------------*/ + //#pragma mark -- Tx Desc related definition. -- +@@ -124,54 +125,72 @@ + #define DESC_RATEVHTSS4MCS9 0x53 + + #define HDATA_RATE(rate)\ +-(rate==DESC_RATE1M)?"CCK_1M":\ +-(rate==DESC_RATE2M)?"CCK_2M":\ +-(rate==DESC_RATE5_5M)?"CCK5_5M":\ +-(rate==DESC_RATE11M)?"CCK_11M":\ +-(rate==DESC_RATE6M)?"OFDM_6M":\ +-(rate==DESC_RATE9M)?"OFDM_9M":\ +-(rate==DESC_RATE12M)?"OFDM_12M":\ +-(rate==DESC_RATE18M)?"OFDM_18M":\ +-(rate==DESC_RATE24M)?"OFDM_24M":\ +-(rate==DESC_RATE36M)?"OFDM_36M":\ +-(rate==DESC_RATE48M)?"OFDM_48M":\ +-(rate==DESC_RATE54M)?"OFDM_54M":\ +-(rate==DESC_RATEMCS0)?"MCS0":\ +-(rate==DESC_RATEMCS1)?"MCS1":\ +-(rate==DESC_RATEMCS2)?"MCS2":\ +-(rate==DESC_RATEMCS3)?"MCS3":\ +-(rate==DESC_RATEMCS4)?"MCS4":\ +-(rate==DESC_RATEMCS5)?"MCS5":\ +-(rate==DESC_RATEMCS6)?"MCS6":\ +-(rate==DESC_RATEMCS7)?"MCS7":\ +-(rate==DESC_RATEMCS8)?"MCS8":\ +-(rate==DESC_RATEMCS9)?"MCS9":\ +-(rate==DESC_RATEMCS10)?"MCS10":\ +-(rate==DESC_RATEMCS11)?"MCS11":\ +-(rate==DESC_RATEMCS12)?"MCS12":\ +-(rate==DESC_RATEMCS13)?"MCS13":\ +-(rate==DESC_RATEMCS14)?"MCS14":\ +-(rate==DESC_RATEMCS15)?"MCS15":\ +-(rate==DESC_RATEVHTSS1MCS0)?"VHTSS1MCS0":\ +-(rate==DESC_RATEVHTSS1MCS1)?"VHTSS1MCS1":\ +-(rate==DESC_RATEVHTSS1MCS2)?"VHTSS1MCS2":\ +-(rate==DESC_RATEVHTSS1MCS3)?"VHTSS1MCS3":\ +-(rate==DESC_RATEVHTSS1MCS4)?"VHTSS1MCS4":\ +-(rate==DESC_RATEVHTSS1MCS5)?"VHTSS1MCS5":\ +-(rate==DESC_RATEVHTSS1MCS6)?"VHTSS1MCS6":\ +-(rate==DESC_RATEVHTSS1MCS7)?"VHTSS1MCS7":\ +-(rate==DESC_RATEVHTSS1MCS8)?"VHTSS1MCS8":\ +-(rate==DESC_RATEVHTSS1MCS9)?"VHTSS1MCS9":\ +-(rate==DESC_RATEVHTSS2MCS0)?"VHTSS2MCS0":\ +-(rate==DESC_RATEVHTSS2MCS1)?"VHTSS2MCS1":\ +-(rate==DESC_RATEVHTSS2MCS2)?"VHTSS2MCS2":\ +-(rate==DESC_RATEVHTSS2MCS3)?"VHTSS2MCS3":\ +-(rate==DESC_RATEVHTSS2MCS4)?"VHTSS2MCS4":\ +-(rate==DESC_RATEVHTSS2MCS5)?"VHTSS2MCS5":\ +-(rate==DESC_RATEVHTSS2MCS6)?"VHTSS2MCS6":\ +-(rate==DESC_RATEVHTSS2MCS7)?"VHTSS2MCS7":\ +-(rate==DESC_RATEVHTSS2MCS8)?"VHTSS2MCS8":\ +-(rate==DESC_RATEVHTSS2MCS9)?"VHTSS2MCS9":"UNKNOW" ++(rate == DESC_RATE1M)?"CCK_1M" :\ ++(rate == DESC_RATE2M)?"CCK_2M" :\ ++(rate == DESC_RATE5_5M)?"CCK5_5M" :\ ++(rate == DESC_RATE11M)?"CCK_11M" :\ ++(rate == DESC_RATE6M)?"OFDM_6M" :\ ++(rate == DESC_RATE9M)?"OFDM_9M" :\ ++(rate == DESC_RATE12M)?"OFDM_12M" :\ ++(rate == DESC_RATE18M)?"OFDM_18M" :\ ++(rate == DESC_RATE24M)?"OFDM_24M" :\ ++(rate == DESC_RATE36M)?"OFDM_36M" :\ ++(rate == DESC_RATE48M)?"OFDM_48M" :\ ++(rate == DESC_RATE54M)?"OFDM_54M" :\ ++(rate == DESC_RATEMCS0)?"MCS0" :\ ++(rate == DESC_RATEMCS1)?"MCS1" :\ ++(rate == DESC_RATEMCS2)?"MCS2" :\ ++(rate == DESC_RATEMCS3)?"MCS3" :\ ++(rate == DESC_RATEMCS4)?"MCS4" :\ ++(rate == DESC_RATEMCS5)?"MCS5" :\ ++(rate == DESC_RATEMCS6)?"MCS6" :\ ++(rate == DESC_RATEMCS7)?"MCS7" :\ ++(rate == DESC_RATEMCS8)?"MCS8" :\ ++(rate == DESC_RATEMCS9)?"MCS9" :\ ++(rate == DESC_RATEMCS10)?"MCS10" :\ ++(rate == DESC_RATEMCS11)?"MCS11" :\ ++(rate == DESC_RATEMCS12)?"MCS12" :\ ++(rate == DESC_RATEMCS13)?"MCS13" :\ ++(rate == DESC_RATEMCS14)?"MCS14" :\ ++(rate == DESC_RATEMCS15)?"MCS15" :\ ++(rate == DESC_RATEMCS16)?"MCS16" :\ ++(rate == DESC_RATEMCS17)?"MCS17" :\ ++(rate == DESC_RATEMCS18)?"MCS18" :\ ++(rate == DESC_RATEMCS19)?"MCS19" :\ ++(rate == DESC_RATEMCS20)?"MCS20" :\ ++(rate == DESC_RATEMCS21)?"MCS21" :\ ++(rate == DESC_RATEMCS22)?"MCS22" :\ ++(rate == DESC_RATEMCS23)?"MCS23" :\ ++(rate == DESC_RATEVHTSS1MCS0)?"VHTSS1MCS0" :\ ++(rate == DESC_RATEVHTSS1MCS1)?"VHTSS1MCS1" :\ ++(rate == DESC_RATEVHTSS1MCS2)?"VHTSS1MCS2" :\ ++(rate == DESC_RATEVHTSS1MCS3)?"VHTSS1MCS3" :\ ++(rate == DESC_RATEVHTSS1MCS4)?"VHTSS1MCS4" :\ ++(rate == DESC_RATEVHTSS1MCS5)?"VHTSS1MCS5" :\ ++(rate == DESC_RATEVHTSS1MCS6)?"VHTSS1MCS6" :\ ++(rate == DESC_RATEVHTSS1MCS7)?"VHTSS1MCS7" :\ ++(rate == DESC_RATEVHTSS1MCS8)?"VHTSS1MCS8" :\ ++(rate == DESC_RATEVHTSS1MCS9)?"VHTSS1MCS9" :\ ++(rate == DESC_RATEVHTSS2MCS0)?"VHTSS2MCS0" :\ ++(rate == DESC_RATEVHTSS2MCS1)?"VHTSS2MCS1" :\ ++(rate == DESC_RATEVHTSS2MCS2)?"VHTSS2MCS2" :\ ++(rate == DESC_RATEVHTSS2MCS3)?"VHTSS2MCS3" :\ ++(rate == DESC_RATEVHTSS2MCS4)?"VHTSS2MCS4" :\ ++(rate == DESC_RATEVHTSS2MCS5)?"VHTSS2MCS5" :\ ++(rate == DESC_RATEVHTSS2MCS6)?"VHTSS2MCS6" :\ ++(rate == DESC_RATEVHTSS2MCS7)?"VHTSS2MCS7" :\ ++(rate == DESC_RATEVHTSS2MCS8)?"VHTSS2MCS8" :\ ++(rate == DESC_RATEVHTSS2MCS9)?"VHTSS2MCS9" :\ ++(rate == DESC_RATEVHTSS3MCS0)?"VHTSS3MCS0" :\ ++(rate == DESC_RATEVHTSS3MCS1)?"VHTSS3MCS1" :\ ++(rate == DESC_RATEVHTSS3MCS2)?"VHTSS3MCS2" :\ ++(rate == DESC_RATEVHTSS3MCS3)?"VHTSS3MCS3" :\ ++(rate == DESC_RATEVHTSS3MCS4)?"VHTSS3MCS4" :\ ++(rate == DESC_RATEVHTSS3MCS5)?"VHTSS3MCS5" :\ ++(rate == DESC_RATEVHTSS3MCS6)?"VHTSS3MCS6" :\ ++(rate == DESC_RATEVHTSS3MCS7)?"VHTSS3MCS7" :\ ++(rate == DESC_RATEVHTSS3MCS8)?"VHTSS3MCS8" :\ ++(rate == DESC_RATEVHTSS3MCS9)?"VHTSS3MCS9" : "UNKNOWN" + + + enum{ +@@ -189,6 +208,11 @@ typedef enum _FIRMWARE_SOURCE { + FW_SOURCE_HEADER_FILE = 1, //from header file + } FIRMWARE_SOURCE, *PFIRMWARE_SOURCE; + ++typedef enum _CH_SW_USE_CASE { ++ CH_SW_USE_CASE_TDLS = 0, ++ CH_SW_USE_CASE_MCC = 1 ++} CH_SW_USE_CASE; ++ + // + // Queue Select Value in TxDesc + // +@@ -214,21 +238,83 @@ typedef enum _FIRMWARE_SOURCE { + #define PageNum_512(_Len) (u32)(((_Len)>>9) + ((_Len)&0x1FF ? 1:0)) + #define PageNum(_Len, _Size) (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1:0)) + +- +-u8 rtw_hal_data_init(_adapter *padapter); +-void rtw_hal_data_deinit(_adapter *padapter); ++struct dbg_rx_counter ++{ ++ u32 rx_pkt_ok; ++ u32 rx_pkt_crc_error; ++ u32 rx_pkt_drop; ++ u32 rx_ofdm_fa; ++ u32 rx_cck_fa; ++ u32 rx_ht_fa; ++}; ++void rtw_dump_mac_rx_counters(_adapter* padapter,struct dbg_rx_counter *rx_counter); ++void rtw_dump_phy_rx_counters(_adapter* padapter,struct dbg_rx_counter *rx_counter); ++void rtw_reset_mac_rx_counters(_adapter* padapter); ++void rtw_reset_phy_rx_counters(_adapter* padapter); ++ ++#ifdef DBG_RX_COUNTER_DUMP ++#define DUMP_DRV_RX_COUNTER BIT0 ++#define DUMP_MAC_RX_COUNTER BIT1 ++#define DUMP_PHY_RX_COUNTER BIT2 ++#define DUMP_DRV_TRX_COUNTER_DATA BIT3 ++ ++void rtw_dump_phy_rxcnts_preprocess(_adapter* padapter,u8 rx_cnt_mode); ++void rtw_dump_rx_counters(_adapter* padapter); ++#endif + + void dump_chip_info(HAL_VERSION ChipVersion); +- +-u8 //return the final channel plan decision +-hal_com_config_channel_plan( +- IN PADAPTER padapter, +- IN u8 hw_channel_plan, //channel plan from HW (efuse/eeprom) +- IN u8 sw_channel_plan, //channel plan from SW (registry/module param) +- IN u8 def_channel_plan, //channel plan used when the former two is invalid +- IN BOOLEAN AutoLoadFail ++void rtw_hal_config_rftype(PADAPTER padapter); ++ ++#define BAND_CAP_2G BIT0 ++#define BAND_CAP_5G BIT1 ++#define BAND_CAP_BIT_NUM 2 ++ ++#define BW_CAP_5M BIT0 ++#define BW_CAP_10M BIT1 ++#define BW_CAP_20M BIT2 ++#define BW_CAP_40M BIT3 ++#define BW_CAP_80M BIT4 ++#define BW_CAP_160M BIT5 ++#define BW_CAP_80_80M BIT6 ++#define BW_CAP_BIT_NUM 7 ++ ++#define PROTO_CAP_11B BIT0 ++#define PROTO_CAP_11G BIT1 ++#define PROTO_CAP_11N BIT2 ++#define PROTO_CAP_11AC BIT3 ++#define PROTO_CAP_BIT_NUM 4 ++ ++#define WL_FUNC_P2P BIT0 ++#define WL_FUNC_MIRACAST BIT1 ++#define WL_FUNC_TDLS BIT2 ++#define WL_FUNC_FTM BIT3 ++#define WL_FUNC_BIT_NUM 4 ++ ++int hal_spec_init(_adapter *adapter); ++void dump_hal_spec(void *sel, _adapter *adapter); ++ ++bool hal_chk_band_cap(_adapter *adapter, u8 cap); ++bool hal_chk_bw_cap(_adapter *adapter, u8 cap); ++bool hal_chk_proto_cap(_adapter *adapter, u8 cap); ++bool hal_is_band_support(_adapter *adapter, u8 band); ++bool hal_is_bw_support(_adapter *adapter, u8 bw); ++bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode); ++u8 hal_largest_bw(_adapter *adapter, u8 in_bw); ++ ++bool hal_chk_wl_func(_adapter *adapter, u8 func); ++ ++u8 hal_com_config_channel_plan( ++ IN PADAPTER padapter, ++ IN char *hw_alpha2, ++ IN u8 hw_chplan, ++ IN char *sw_alpha2, ++ IN u8 sw_chplan, ++ IN u8 def_chplan, ++ IN BOOLEAN AutoLoadFail + ); + ++int hal_config_macaddr(_adapter *adapter, bool autoload_fail); ++ + BOOLEAN + HAL_IsLegalChannel( + IN PADAPTER Adapter, +@@ -262,6 +348,13 @@ u8 rtw_hal_networktype_to_raid(_adapter *adapter, struct sta_info *psta); + u8 rtw_get_mgntframe_raid(_adapter *adapter,unsigned char network_type); + void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta); + ++/* access HW only */ ++u32 rtw_sec_read_cam(_adapter *adapter, u8 addr); ++void rtw_sec_write_cam(_adapter *adapter, u8 addr, u32 wdata); ++void rtw_sec_read_cam_ent(_adapter *adapter, u8 id, u8 *ctrl, u8 *mac, u8 *key); ++void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key); ++bool rtw_sec_read_cam_is_gk(_adapter *adapter, u8 id); ++ + void hw_var_port_switch(_adapter *adapter); + + void SetHwReg(PADAPTER padapter, u8 variable, u8 *val); +@@ -278,11 +371,6 @@ eqNByte( + u32 num + ); + +-BOOLEAN +-IsHexDigit( +- IN char chTmp +- ); +- + u32 + MapCharToHexDigit( + IN char chTmp +@@ -333,18 +421,19 @@ void linked_info_dump(_adapter *padapter,u8 benable); + #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA + void rtw_get_raw_rssi_info(void *sel, _adapter *padapter); + void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe); +-void rtw_dump_raw_rssi_info(_adapter *padapter); ++void rtw_dump_raw_rssi_info(_adapter *padapter, void *sel); + #endif + + #define HWSET_MAX_SIZE 512 + #ifdef CONFIG_EFUSE_CONFIG_FILE + #define EFUSE_FILE_COLUMN_NUM 16 +-u32 Hal_readPGDataFromConfigFile(PADAPTER padapter, struct file *fp); +-void Hal_ReadMACAddrFromFile(PADAPTER padapter, struct file *fp); +-void Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8* mac_addr); ++u32 Hal_readPGDataFromConfigFile(PADAPTER padapter); ++u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr); ++#endif /* CONFIG_EFUSE_CONFIG_FILE */ ++ + int check_phy_efuse_tx_power_info_valid(PADAPTER padapter); +-int check_phy_efuse_macaddr_info_valid(PADAPTER padapter); +-#endif //CONFIG_EFUSE_CONFIG_FILE ++int hal_efuse_macaddr_offset(_adapter *adapter); ++int Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8 *mac_addr); + + #ifdef CONFIG_RF_GAIN_OFFSET + void rtw_bb_rf_gain_offset(_adapter *padapter); +@@ -373,20 +462,99 @@ struct noise_info + }; + #endif + ++void rtw_get_noise(_adapter* padapter); ++u8 rtw_get_current_tx_rate(_adapter *padapter, u8 macid); ++void rtw_hal_set_fw_rsvd_page(_adapter* adapter, bool finished); ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset, u16 bwmode); ++#endif ++#endif ++ + #ifdef CONFIG_GPIO_API + u8 rtw_hal_get_gpio(_adapter* adapter, u8 gpio_num); +-int rtw_hal_set_gpio_output_value(_adapter* adapter, u8 gpio_num, BOOLEAN isHigh); +-int rtw_hal_config_gpio(_adapter* adapter, u8 gpio_num, BOOLEAN isOutput); ++int rtw_hal_set_gpio_output_value(_adapter* adapter, u8 gpio_num, bool isHigh); ++int rtw_hal_config_gpio(_adapter* adapter, u8 gpio_num, bool isOutput); ++int rtw_hal_register_gpio_interrupt(_adapter* adapter, int gpio_num, void(*callback)(u8 level)); ++int rtw_hal_disable_gpio_interrupt(_adapter* adapter, int gpio_num); + #endif + ++s8 rtw_hal_ch_sw_iqk_info_search(_adapter *padapter, u8 central_chnl, u8 bw_mode); ++void rtw_hal_ch_sw_iqk_info_backup(_adapter *adapter); ++void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case); ++ + #ifdef CONFIG_GPIO_WAKEUP +-void rtw_clear_hostwakeupgpio(PADAPTER padapter); ++void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable); ++void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval); + #endif + ++typedef enum _HAL_PHYDM_OPS { ++ HAL_PHYDM_DIS_ALL_FUNC, ++ HAL_PHYDM_FUNC_SET, ++ HAL_PHYDM_FUNC_CLR, ++ HAL_PHYDM_ABILITY_BK, ++ HAL_PHYDM_ABILITY_RESTORE, ++ HAL_PHYDM_ABILITY_SET, ++ HAL_PHYDM_ABILITY_GET, ++} HAL_PHYDM_OPS; ++ ++ ++#define DYNAMIC_FUNC_DISABLE (0x0) ++u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability); ++ ++#define rtw_phydm_func_disable_all(adapter) \ ++ rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0) ++ ++#define rtw_phydm_func_for_offchannel(adapter) \ ++ do { \ ++ rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \ ++ if (rtw_odm_adaptivity_needed(adapter)) \ ++ rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \ ++ } while (0) ++ ++#define rtw_phydm_func_set(adapter, ability) \ ++ rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ability) ++ ++#define rtw_phydm_func_clr(adapter, ability) \ ++ rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_CLR, ability) ++ ++#define rtw_phydm_ability_backup(adapter) \ ++ rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_BK, 0) ++ ++#define rtw_phydm_ability_restore(adapter) \ ++ rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_RESTORE, 0) ++ ++#define rtw_phydm_ability_set(adapter, ability) \ ++ rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_SET, ability) ++ ++static inline u32 rtw_phydm_ability_get(_adapter *adapter) ++{ ++ return rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_GET, 0); ++} ++ + #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + extern char *rtw_phy_file_path; +-extern char file_path[PATH_LENGTH_MAX]; +-#define GetLineFromBuffer(buffer) strsep(&buffer, "\n") ++extern char rtw_phy_para_file_path[PATH_LENGTH_MAX]; ++#define GetLineFromBuffer(buffer) strsep(&buffer, "\r\n") ++#endif ++ ++#ifdef CONFIG_FW_C2H_DEBUG ++void Debug_FwC2H(PADAPTER padapter, u8 *pdata, u8 len); ++#endif ++/*CONFIG_FW_C2H_DEBUG*/ ++ ++void update_IOT_info(_adapter *padapter); ++ ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++void rtw_acs_start(_adapter *padapter, bool bStart); ++#endif ++ ++void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap); ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++u8 rtw_hal_antdiv_before_linked(_adapter *padapter); ++void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); + #endif + + #endif //__HAL_COMMON_H__ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_h2c.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_h2c.h +old mode 100755 +new mode 100644 +index 8ad82f6..3e8c414 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_h2c.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_h2c.h +@@ -38,6 +38,7 @@ enum h2c_cmd{ + H2C_FCS_RSVDPAGE = 0x10, + H2C_FCS_INFO = 0x11, + H2C_AP_WOW_GPIO_CTRL = 0x13, ++ H2C_CHNL_SWITCH_OPER_OFFLOAD = 0x1C, + + //PoweSave Class: 001 + H2C_SET_PWR_MODE = 0x20, +@@ -51,11 +52,18 @@ enum h2c_cmd{ + H2C_FWLPS_IN_IPS_ = 0x28, + + //Dynamic Mechanism Class: 010 +- H2C_MACID_CFG = 0x40, ++ H2C_MACID_CFG = 0x40, + H2C_TXBF = 0x41, + H2C_RSSI_SETTING = 0x42, + H2C_AP_REQ_TXRPT = 0x43, + H2C_INIT_RATE_COLLECT = 0x44, ++ H2C_IQ_CALIBRATION = 0x45, ++ ++ H2C_RA_MASK_3SS = 0x46,/* for 8814A */ ++ H2C_RA_PARA_ADJUST = 0x47,/* CONFIG_RA_DBG_CMD */ ++ H2C_DYNAMIC_TX_PATH = 0x48,/* for 8814A */ ++ ++ H2C_FW_TRACE_EN = 0x49, + + //BT Class: 011 + H2C_B_TYPE_TDMA = 0x60, +@@ -84,6 +92,7 @@ enum h2c_cmd{ + H2C_P2P_OFFLOAD = 0x8B, + + H2C_RESET_TSF = 0xC0, ++ H2C_BCNHWSEQ = 0xC5, + H2C_MAXID, + }; + +@@ -98,7 +107,7 @@ enum h2c_cmd{ + #define H2C_PWRMODE_LEN 7 + #define H2C_PSTUNEPARAM_LEN 4 + #define H2C_MACID_CFG_LEN 7 +-#define H2C_BTMP_OPER_LEN 4 ++#define H2C_BTMP_OPER_LEN 5 + #define H2C_WOWLAN_LEN 5 + #define H2C_REMOTE_WAKE_CTRL_LEN 3 + #define H2C_AOAC_GLOBAL_INFO_LEN 2 +@@ -113,29 +122,28 @@ enum h2c_cmd{ + #define H2C_P2PRSVDPAGE_LOC_LEN 5 + #define H2C_P2P_OFFLOAD_LEN 3 + +-#ifdef CONFIG_WOWLAN + #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) + #define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) + #define cpIpAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3]) +- ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) + // + // ARP packet + // + // LLC Header +-#define GET_ARP_PKT_LLC_TYPE(__pHeader) ReadEF2Byte( ((u8*)(__pHeader)) + 6) ++#define GET_ARP_PKT_LLC_TYPE(__pHeader) ReadLE2Byte(((u8 *)(__pHeader)) + 6) + + //ARP element +-#define GET_ARP_PKT_OPERATION(__pHeader) ReadEF2Byte(((u8*)(__pHeader)) + 6) ++#define GET_ARP_PKT_OPERATION(__pHeader) ReadLE2Byte(((u8 *)(__pHeader)) + 6) + #define GET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+8) + #define GET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr((u8*)(_val), ((u8*)(__pHeader))+14) + #define GET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+18) + #define GET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr((u8*)(_val), ((u8*)(__pHeader))+24) + +-#define SET_ARP_PKT_HW(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 0, __Value) +-#define SET_ARP_PKT_PROTOCOL(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 2, __Value) +-#define SET_ARP_PKT_HW_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 4, __Value) +-#define SET_ARP_PKT_PROTOCOL_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 5, __Value) +-#define SET_ARP_PKT_OPERATION(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 6, __Value) ++#define SET_ARP_PKT_HW(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 0, __Value) ++#define SET_ARP_PKT_PROTOCOL(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 2, __Value) ++#define SET_ARP_PKT_HW_ADDR_LEN(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 4, __Value) ++#define SET_ARP_PKT_PROTOCOL_ADDR_LEN(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 5, __Value) ++#define SET_ARP_PKT_OPERATION(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 6, __Value) + #define SET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+8, (u8*)(_val)) + #define SET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr(((u8*)(__pHeader))+14, (u8*)(_val)) + #define SET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+18, (u8*)(_val)) +@@ -168,49 +176,79 @@ enum h2c_cmd{ + #endif //CONFIG_WOWLAN + + //_RSVDPAGE_LOC_CMD_0x00 +-#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) +-#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) +-#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) +-#define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) +-#define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) + + //_MEDIA_STATUS_RPT_PARM_CMD_0x01 +-#define SET_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) +-#define SET_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +-#define SET_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) +-#define SET_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) ++#define SET_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 1, (__Value)) ++#define SET_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 1, 1, (__Value)) ++#define SET_H2CCMD_MSRRPT_PARM_MIRACAST(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 2, 1, (__Value)) ++#define SET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 3, 1, (__Value)) ++#define SET_H2CCMD_MSRRPT_PARM_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 4, 4, (__Value)) ++#define SET_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 1, 0, 8, (__Value)) ++#define SET_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 2, 0, 8, (__Value)) ++ ++#define GET_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 0, 1) ++#define GET_H2CCMD_MSRRPT_PARM_MIRACAST(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 2, 1) ++#define GET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 3, 1) ++#define GET_H2CCMD_MSRRPT_PARM_ROLE(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 4, 4) ++ ++#define H2C_MSR_ROLE_RSVD 0 ++#define H2C_MSR_ROLE_STA 1 ++#define H2C_MSR_ROLE_AP 2 ++#define H2C_MSR_ROLE_GC 3 ++#define H2C_MSR_ROLE_GO 4 ++#define H2C_MSR_ROLE_TDLS 5 ++#define H2C_MSR_ROLE_ADHOC 6 ++#define H2C_MSR_ROLE_MAX 7 ++ ++extern const char * const _h2c_msr_role_str[]; ++#define h2c_msr_role_str(role) (((role) >= H2C_MSR_ROLE_MAX) ? _h2c_msr_role_str[H2C_MSR_ROLE_MAX] : _h2c_msr_role_str[(role)]) ++ ++#define H2C_MSR_FMT "%s %s%s" ++#define H2C_MSR_ARG(h2c_msr) \ ++ GET_H2CCMD_MSRRPT_PARM_OPMODE((h2c_msr)) ? " C" : "", \ ++ h2c_msr_role_str(GET_H2CCMD_MSRRPT_PARM_ROLE((h2c_msr))), \ ++ GET_H2CCMD_MSRRPT_PARM_MIRACAST((h2c_msr)) ? (GET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK((h2c_msr)) ? " MSINK" : " MSRC") : "" ++ ++s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, bool macid_ind, u8 macid_end); ++s32 rtw_hal_set_FwMediaStatusRpt_single_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid); ++s32 rtw_hal_set_FwMediaStatusRpt_range_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, u8 macid_end); + + //_KEEP_ALIVE_CMD_0x03 + #define SET_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) + #define SET_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) + #define SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) +-#define SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) ++#define SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) + + //_DISCONNECT_DECISION_CMD_0x04 + #define SET_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) + #define SET_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +-#define SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) +-#define SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) ++#define SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++#define SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) + + //_AP_Offload 0x08 +-#define SET_H2CCMD_AP_WOWLAN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) ++#define SET_H2CCMD_AP_WOWLAN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) + //_BCN_RsvdPage 0x09 +-#define SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) ++#define SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) + //_Probersp_RsvdPage 0x0a +-#define SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_ProbeRsp(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) ++#define SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_ProbeRsp(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) + //_Probersp_RsvdPage 0x13 + #define SET_H2CCMD_AP_WOW_GPIO_CTRL_INDEX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) + #define SET_H2CCMD_AP_WOW_GPIO_CTRL_C2H_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) + #define SET_H2CCMD_AP_WOW_GPIO_CTRL_PLUS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) + #define SET_H2CCMD_AP_WOW_GPIO_CTRL_HIGH_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) + #define SET_H2CCMD_AP_WOW_GPIO_CTRL_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) +-#define SET_H2CCMD_AP_WOW_GPIO_CTRL_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) +-#define SET_H2CCMD_AP_WOW_GPIO_CTRL_C2H_DURATION(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_H2CCMD_AP_WOW_GPIO_CTRL_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_H2CCMD_AP_WOW_GPIO_CTRL_C2H_DURATION(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) + //_AP_PS 0x26 + #define SET_H2CCMD_AP_WOW_PS_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) + #define SET_H2CCMD_AP_WOW_PS_32K_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) + #define SET_H2CCMD_AP_WOW_PS_RF(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) +-#define SET_H2CCMD_AP_WOW_PS_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_H2CCMD_AP_WOW_PS_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) + + // _WoWLAN PARAM_CMD_0x80 + #define SET_H2CCMD_WOWLAN_FUNC_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) +@@ -223,11 +261,11 @@ enum h2c_cmd{ + #define SET_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) + #define SET_H2CCMD_WOWLAN_GPIONUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 7, __Value) + #define SET_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 7, 1, __Value) +-#define SET_H2CCMD_WOWLAN_GPIO_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_H2CCMD_WOWLAN_GPIO_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) + #define SET_H2CCMD_WOWLAN_GPIO_PULSE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 1, __Value) + #define SET_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 1, 7, __Value) + #define SET_H2CCMD_WOWLAN_LOWPR_RX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 1, __Value) +- ++#define SET_H2CCMD_WOWLAN_CHANGE_UNIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 2, 1, __Value) + // _REMOTE_WAKEUP_CMD_0x81 + #define SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) + #define SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +@@ -236,40 +274,43 @@ enum h2c_cmd{ + #define SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) + #define SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) + #define SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 1, __Value) ++#define SET_H2CCMD_REMOTE_WAKE_CTRL_NBNS_FILTER_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 2, 1, __Value) + #define SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 1, __Value) ++#define SET_H2CCMD_REMOTE_WAKE_CTRL_FW_PARSING_UNTIL_WAKEUP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 4, 1, __Value) + + // AOAC_GLOBAL_INFO_0x82 +-#define SET_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) +-#define SET_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) + + // AOAC_RSVDPAGE_LOC_0x83 +-#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd), 0, 8, __Value) +-#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) +-#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) +-#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) +-#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) ++#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) ++#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) + #ifdef CONFIG_GTK_OL +-#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+5, 0, 8, __Value) ++#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) + #endif //CONFIG_GTK_OL + #ifdef CONFIG_PNO_SUPPORT +-#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd), 0, 8, __Value) ++#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) + #endif + + #ifdef CONFIG_PNO_SUPPORT + // D0_Scan_Offload_Info_0x86 + #define SET_H2CCMD_AOAC_NLO_FUN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 3, 1, __Value) +-#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) +-#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) +-#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_H2CCMD_AOAC_NLO_IPS_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 4, 1, __Value) ++#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) + #endif //CONFIG_PNO_SUPPORT + + #ifdef CONFIG_P2P_WOWLAN + //P2P_RsvdPage_0x8a +-#define SET_H2CCMD_RSVDPAGE_LOC_P2P_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) +-#define SET_H2CCMD_RSVDPAGE_LOC_P2P_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) +-#define SET_H2CCMD_RSVDPAGE_LOC_P2P_NEGO_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) +-#define SET_H2CCMD_RSVDPAGE_LOC_P2P_INVITE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) +-#define SET_H2CCMD_RSVDPAGE_LOC_P2P_PD_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_P2P_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_P2P_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_P2P_NEGO_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_P2P_INVITE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_P2P_PD_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) + #endif //CONFIG_P2P_WOWLAN + + //---------------------------------------------------------------------------------------------------------// +@@ -311,18 +352,9 @@ typedef struct _RSVDPAGE_LOC { + + #endif + void dump_TX_FIFO(PADAPTER padapter, u8 page_num, u16 page_size); +-u8 rtw_check_invalid_mac_address (u8 *mac_addr); + u8 rtw_hal_set_fw_media_status_cmd(_adapter* adapter, u8 mstatus, u8 macid); + #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) +-void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip); +-void rtw_get_sec_iv(PADAPTER padapter, u8*pcur_dot11txpn, u8 *StaAddr); +-void rtw_set_sec_pn(_adapter *padapter); +- +-void rtw_hal_fill_fake_txdesc(_adapter* padapter, u8* pDesc, u32 BufferLen, +- u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); +- + //WOW command function +-u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable); + void rtw_hal_set_fw_wow_related_cmd(_adapter* padapter, u8 enable); + #ifdef CONFIG_P2P_WOWLAN + //H2C 0x8A +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_led.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_led.h +old mode 100755 +new mode 100644 +index e03c692..79e62c6 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_led.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_led.h +@@ -264,7 +264,8 @@ typedef struct _LED_USB{ + + _timer BlinkTimer; // Timer object for led blinking. + +- _workitem BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED. ++ _workitem BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED.' ++ ATOMIC_T bCancelWorkItem; //check if WorkItem is cancelled + } LED_USB, *PLED_USB; + + typedef struct _LED_USB LED_DATA, *PLED_DATA; +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_phycfg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_phycfg.h +old mode 100755 +new mode 100644 +index 19276ea..a765d6c +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_phycfg.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_phycfg.h +@@ -25,19 +25,6 @@ + #define PathC 0x2 + #define PathD 0x3 + +-typedef enum _RATE_SECTION { +- CCK = 0, +- OFDM, +- HT_MCS0_MCS7, +- HT_MCS8_MCS15, +- HT_MCS16_MCS23, +- HT_MCS24_MCS31, +- VHT_1SSMCS0_1SSMCS9, +- VHT_2SSMCS0_2SSMCS9, +- VHT_3SSMCS0_3SSMCS9, +- VHT_4SSMCS0_4SSMCS9, +-} RATE_SECTION; +- + typedef enum _RF_TX_NUM { + RF_1TX = 0, + RF_2TX, +@@ -58,6 +45,9 @@ typedef enum _REGULATION_TXPWR_LMT { + TXPWR_LMT_MAX_REGULATION_NUM = 4 + } REGULATION_TXPWR_LMT; + ++#define TX_PWR_LMT_REF_VHT_FROM_HT BIT0 ++#define TX_PWR_LMT_REF_HT_FROM_VHT BIT1 ++ + /*------------------------------Define structure----------------------------*/ + typedef struct _BB_REGISTER_DEFINITION{ + u32 rfintfs; // set software control: +@@ -84,13 +74,6 @@ typedef struct _BB_REGISTER_DEFINITION{ + + + //---------------------------------------------------------------------- +-s32 +-phy_TxPwrIdxToDbm( +- IN PADAPTER Adapter, +- IN WIRELESS_MODE WirelessMode, +- IN u8 TxPwrIdx +- ); +- + u8 + PHY_GetTxPowerByRateBase( + IN PADAPTER Adapter, +@@ -100,22 +83,24 @@ PHY_GetTxPowerByRateBase( + IN RATE_SECTION RateSection + ); + ++#ifdef TX_POWER_BY_RATE_OLD + u8 + PHY_GetRateSectionIndexOfTxPowerByRate( + IN PADAPTER pAdapter, + IN u32 RegAddr, + IN u32 BitMask + ); ++#endif /* TX_POWER_BY_RATE_OLD */ + + VOID + PHY_GetRateValuesOfTxPowerByRate( +- IN PADAPTER pAdapter, +- IN u32 RegAddr, +- IN u32 BitMask, +- IN u32 Value, +- OUT u8* RateIndex, +- OUT s8* PwrByRateVal, +- OUT u8* RateNum ++ IN PADAPTER pAdapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Value, ++ OUT u8 *Rate, ++ OUT s8 *PwrByRateVal, ++ OUT u8 *RateNum + ); + + u8 +@@ -132,6 +117,15 @@ PHY_SetTxPowerIndexByRateSection( + ); + + s8 ++_PHY_GetTxPowerByRate( ++ IN PADAPTER pAdapter, ++ IN u8 Band, ++ IN u8 RFPath, ++ IN u8 TxNum, ++ IN u8 RateIndex ++ ); ++ ++s8 + PHY_GetTxPowerByRate( + IN PADAPTER pAdapter, + IN u8 Band, +@@ -209,18 +203,6 @@ PHY_GetTxPowerLimit( + IN u8 Channel + ); + +-VOID +-PHY_SetTxPowerLimit( +- IN PADAPTER Adapter, +- IN u8 *Regulation, +- IN u8 *Band, +- IN u8 *Bandwidth, +- IN u8 *RateSection, +- IN u8 *RfPath, +- IN u8 *Channel, +- IN u8 *PowerLimit +- ); +- + VOID + PHY_ConvertTxPowerLimitToPowerIndex( + IN PADAPTER Adapter +@@ -255,11 +237,20 @@ PHY_SetTxPowerIndex( + IN u8 Rate + ); + +-VOID +-Hal_ChannelPlanToRegulation( +- IN PADAPTER Adapter, +- IN u16 ChannelPlan +- ); ++bool phy_is_tx_power_limit_needed(_adapter *adapter); ++bool phy_is_tx_power_by_rate_needed(_adapter *adapter); ++int phy_load_tx_power_by_rate(_adapter *adapter, const char *hal_file_name, u8 force); ++int phy_load_tx_power_limit(_adapter *adapter, const char *hal_file_name, u8 force); ++void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file, u8 force); ++void phy_reload_tx_power_ext_info(_adapter *adapter); ++void phy_reload_default_tx_power_ext_info(_adapter *adapter); ++ ++void dump_tx_power_ext_info(void *sel, _adapter *adapter); ++void dump_target_tx_power(void *sel, _adapter *adapter); ++void dump_tx_power_by_rate(void *sel, _adapter *adapter); ++void dump_tx_power_limit(void *sel, _adapter *adapter); ++ ++int rtw_is_phy_file_readable(const char *hal_file_name); + + #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + #define MAX_PARA_FILE_BUF_LEN 25600 +@@ -276,7 +267,7 @@ int phy_ConfigMACWithParaFile(IN PADAPTER Adapter, IN char* pFileName); + + int phy_ConfigBBWithParaFile(IN PADAPTER Adapter, IN char* pFileName, IN u32 ConfigType); + +-int phy_ConfigBBWithPgParaFile(IN PADAPTER Adapter, IN char* pFileName); ++int phy_ConfigBBWithPgParaFile(IN PADAPTER Adapter, IN const char *pFileName); + + int phy_ConfigBBWithMpParaFile(IN PADAPTER Adapter, IN char* pFileName); + +@@ -284,11 +275,11 @@ int PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN char* pFileName, IN u8 eRFP + + int PHY_ConfigRFWithTxPwrTrackParaFile(IN PADAPTER Adapter, IN char* pFileName); + +-int PHY_ConfigRFWithPowerLimitTableParaFile(IN PADAPTER Adapter, IN char* pFileName); ++int PHY_ConfigRFWithPowerLimitTableParaFile(IN PADAPTER Adapter, IN const char *pFileName); + ++void phy_free_filebuf_mask(_adapter *padapter, u8 mask); + void phy_free_filebuf(_adapter *padapter); +-#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE +- ++#endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */ + +-#endif //__HAL_COMMON_H__ ++#endif /* __HAL_COMMON_H__ */ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_reg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_reg.h +old mode 100755 +new mode 100644 +index 6a0faf0..0548729 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_reg.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_com_reg.h +@@ -43,6 +43,7 @@ + #define REG_SYS_FUNC_EN 0x0002 + #define REG_APS_FSMCO 0x0004 + #define REG_SYS_CLKR 0x0008 ++#define REG_SYS_CLK_CTRL REG_SYS_CLKR + #define REG_9346CR 0x000A + #define REG_SYS_EEPROM_CTRL 0x000A + #define REG_EE_VPD 0x000C +@@ -157,6 +158,10 @@ + #define REG_HMEBOX_2 0x01D8 + #define REG_HMEBOX_3 0x01DC + #define REG_LLT_INIT 0x01E0 ++#define REG_HMEBOX_EXT_0 0x01F0 ++#define REG_HMEBOX_EXT_1 0x01F4 ++#define REG_HMEBOX_EXT_2 0x01F8 ++#define REG_HMEBOX_EXT_3 0x01FC + + + //----------------------------------------------------- +@@ -188,28 +193,29 @@ + // + //----------------------------------------------------- + #define REG_PCIE_CTRL_REG 0x0300 +-#define REG_INT_MIG 0x0304 // Interrupt Migration +-#define REG_BCNQ_DESA 0x0308 // TX Beacon Descriptor Address +-#define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address +-#define REG_MGQ_DESA 0x0318 // TX Manage Queue Descriptor Address +-#define REG_VOQ_DESA 0x0320 // TX VO Queue Descriptor Address +-#define REG_VIQ_DESA 0x0328 // TX VI Queue Descriptor Address +-#define REG_BEQ_DESA 0x0330 // TX BE Queue Descriptor Address +-#define REG_BKQ_DESA 0x0338 // TX BK Queue Descriptor Address +-#define REG_RX_DESA 0x0340 // RX Queue Descriptor Address ++#define REG_INT_MIG 0x0304 /* Interrupt Migration */ ++#define REG_BCNQ_DESA 0x0308 /* TX Beacon Descriptor Address */ ++#define REG_HQ_DESA 0x0310 /* TX High Queue Descriptor Address */ ++#define REG_MGQ_DESA 0x0318 /* TX Manage Queue Descriptor Address */ ++#define REG_VOQ_DESA 0x0320 /* TX VO Queue Descriptor Address */ ++#define REG_VIQ_DESA 0x0328 /* TX VI Queue Descriptor Address */ ++#define REG_BEQ_DESA 0x0330 /* TX BE Queue Descriptor Address */ ++#define REG_BKQ_DESA 0x0338 /* TX BK Queue Descriptor Address */ ++#define REG_RX_DESA 0x0340 /* RX Queue Descriptor Address */ + //sherry added for DBI Read/Write 20091126 +-#define REG_DBI_WDATA 0x0348 // Backdoor REG for Access Configuration +-#define REG_DBI_RDATA 0x034C //Backdoor REG for Access Configuration +-#define REG_DBI_CTRL 0x0350 //Backdoor REG for Access Configuration +-#define REG_DBI_FLAG 0x0352 //Backdoor REG for Access Configuration +-#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY +-#define REG_DBG_SEL 0x0360 // Debug Selection Register +-#define REG_PCIE_HRPWM 0x0361 //PCIe RPWM +-#define REG_PCIE_HCPWM 0x0363 //PCIe CPWM ++#define REG_DBI_WDATA 0x0348 /* Backdoor REG for Access Configuration */ ++#define REG_DBI_RDATA 0x034C /* Backdoor REG for Access Configuration */ ++#define REG_DBI_CTRL 0x0350 /* Backdoor REG for Access Configuration */ ++#define REG_DBI_FLAG 0x0352 /* Backdoor REG for Access Configuration */ ++#define REG_MDIO 0x0354 /* MDIO for Access PCIE PHY */ ++#define REG_DBG_SEL 0x0360 /* Debug Selection Register */ ++#define REG_PCIE_HRPWM 0x0361 /* PCIe RPWM */ ++#define REG_PCIE_HCPWM 0x0363 /* PCIe CPWM */ + #define REG_WATCH_DOG 0x0368 ++#define REG_RX_RXBD_NUM 0x0382 + + // RTL8723 series ------------------------------- +-#define REG_PCIE_HISR_EN 0x0394 //PCIE Local Interrupt Enable Register ++#define REG_PCIE_HISR_EN 0x0394 /* PCIE Local Interrupt Enable Register */ + #define REG_PCIE_HISR 0x03A0 + #define REG_PCIE_HISRE 0x03A4 + #define REG_PCIE_HIMR 0x03A8 +@@ -1065,28 +1071,27 @@ Current IOREG MAP + #define RCR_APP_ICV BIT29 // MACRX will retain the ICV at the bottom of the packet. + #define RCR_APP_PHYST_RXFF BIT28 // PHY Status is appended before RX packet in RXFF + #define RCR_APP_BA_SSN BIT27 // SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. +-#define RCR_NONQOS_VHT BIT26 // Reserved +-#define RCR_RSVD_BIT25 BIT25 // Reserved ++#define RCR_VHT_DACK BIT26 /* This bit to control response type for vht single mpdu data packet. 1. ACK as response 0. BA as response */ ++#define RCR_TCPOFLD_EN BIT25 /* Enable TCP checksum offload */ + #define RCR_ENMBID BIT24 // Enable Multiple BssId. Only response ACK to the packets whose DID(A1) matching to the addresses in the MBSSID CAM Entries. + #define RCR_LSIGEN BIT23 // Enable LSIG TXOP Protection function. Search KEYCAM for each rx packet to check if LSIGEN bit is set. + #define RCR_MFBEN BIT22 // Enable immediate MCS Feedback function. When Rx packet with MRQ = 1'b1, then search KEYCAM to find sender's MCS Feedback function and send response. +-#define RCR_RSVD_BIT21 BIT21 // Reserved +-#define RCR_RSVD_BIT20 BIT20 // Reserved +-#define RCR_RSVD_BIT19 BIT19 // Reserved ++#define RCR_DISCHKPPDLLEN BIT21 /* Do not check PPDU while the PPDU length is smaller than 14 byte. */ ++#define RCR_PKTCTL_DLEN BIT20 /* While rx path dead lock occurs, reset rx path */ ++#define RCR_DISGCLK BIT19 /* Disable macrx clock gating control (no used) */ + #define RCR_TIM_PARSER_EN BIT18 // RX Beacon TIM Parser. +-#define RCR_BM_DATA_EN BIT17 // Broadcast data packet interrupt enable. +-#define RCR_UC_DATA_EN BIT16 // Unicast data packet interrupt enable. +-#define RCR_RSVD_BIT15 BIT15 // Reserved ++#define RCR_BC_MD_EN BIT17 /* Broadcast data packet more data bit check interrupt enable.*/ ++#define RCR_UC_MD_EN BIT16 /* Unicast data packet more data bit check interrupt enable. */ ++#define RCR_RXSK_PERPKT BIT15 /* Executing key search per MPDU */ + #define RCR_HTC_LOC_CTRL BIT14 // MFC<--HTC=1 MFC-->HTC=0 + #define RCR_AMF BIT13 // Accept management type frame + #define RCR_ACF BIT12 // Accept control type frame. Control frames BA, BAR, and PS-Poll (when in AP mode) are not controlled by this bit. They are controlled by ADF. + #define RCR_ADF BIT11 // Accept data type frame. This bit also regulates BA, BAR, and PS-Poll (AP mode only). +-#define RCR_RSVD_BIT10 BIT10 // Reserved ++#define RCR_DISDECMYPKT BIT10 /* This bit determines whether hw need to do decryption.1: If A1 match, do decryption.0: Do decryption. */ + #define RCR_AICV BIT9 // Accept ICV error packet + #define RCR_ACRC32 BIT8 // Accept CRC32 error packet + #define RCR_CBSSID_BCN BIT7 // Accept BSSID match packet (Rx beacon, probe rsp) + #define RCR_CBSSID_DATA BIT6 // Accept BSSID match packet (Data) +-#define RCR_CBSSID RCR_CBSSID_DATA // Accept BSSID match packet + #define RCR_APWRMGT BIT5 // Accept power management packet + #define RCR_ADD3 BIT4 // Accept address 3 match packet + #define RCR_AB BIT3 // Accept broadcast packet +@@ -1211,6 +1216,7 @@ Current IOREG MAP + #define RFINI_RDY BIT(5) + #define WINTINI_RDY BIT(6) + #define RAM_DL_SEL BIT(7) ++#define CPU_DL_READY BIT(15) /* add flag by gw for fw download ready 20130826 */ + #define ROM_DLEN BIT(19) + #define CPRST BIT(23) + +@@ -1545,6 +1551,7 @@ Current IOREG MAP + #define SCR_TXBCUSEDK BIT(6) // Force Tx Broadcast packets Use Default Key + #define SCR_RXBCUSEDK BIT(7) // Force Rx Broadcast packets Use Default Key + #define SCR_CHK_KEYID BIT(8) ++#define SCR_CHK_BMC BIT(9) /* add option to support a2+keyid+bcm */ + + //----------------------------------------------------- + // +@@ -1751,7 +1758,9 @@ Current IOREG MAP + #define LAST_ENTRY_OF_TX_PKT_BUFFER_8812 255 + #define LAST_ENTRY_OF_TX_PKT_BUFFER_8723B 255 + #define LAST_ENTRY_OF_TX_PKT_BUFFER_8192C 255 ++#define LAST_ENTRY_OF_TX_PKT_BUFFER_8703B 255 + #define LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC 127 ++#define LAST_ENTRY_OF_TX_PKT_BUFFER_8188F 255 + + #define POLLING_LLT_THRESHOLD 20 + #if defined(CONFIG_RTL8723B) && defined(CONFIG_PCI_HCI) +@@ -1762,6 +1771,7 @@ Current IOREG MAP + + + // GPIO BIT ++#define HAL_8812A_HW_GPIO_WPS_BIT BIT2 + #define HAL_8192C_HW_GPIO_WPS_BIT BIT2 + #define HAL_8192EU_HW_GPIO_WPS_BIT BIT7 + #define HAL_8188E_HW_GPIO_WPS_BIT BIT7 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_data.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_data.h +old mode 100755 +new mode 100644 +index ac6007e..67be1f9 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_data.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_data.h +@@ -22,7 +22,7 @@ + + #if 1//def CONFIG_SINGLE_IMG + +-#include "../hal/OUTSRC/phydm_precomp.h" ++#include "../hal/phydm/phydm_precomp.h" + #ifdef CONFIG_BT_COEXIST + #include + #endif +@@ -75,22 +75,6 @@ typedef enum _INTERFACE_SELECT_USB{ + INTF_SEL5_USB_Combo_MF = 5, // USB WiFi+BT Multi-Function Combo, i.e., Proprietary layout(AS-VAU) which is the same as SDIO card + } INTERFACE_SELECT_USB, *PINTERFACE_SELECT_USB; + +-#ifdef CONFIG_USB_HCI +-//should be sync with INTERFACE_SELECT_USB +-typedef enum _BOARD_TYPE_8192CUSB{ +- BOARD_USB_DONGLE = 0, // USB dongle +- BOARD_USB_High_PA = 1, // USB dongle with high power PA +- BOARD_MINICARD = 2, // Minicard +- BOARD_USB_SOLO = 3, // USB solo-Slim module +- BOARD_USB_COMBO = 4, // USB Combo-Slim module +-} BOARD_TYPE_8192CUSB, *PBOARD_TYPE_8192CUSB; +- +-#define SUPPORT_HW_RADIO_DETECT(pHalData) \ +- (pHalData->BoardType == BOARD_MINICARD||\ +- pHalData->BoardType == BOARD_USB_SOLO||\ +- pHalData->BoardType == BOARD_USB_COMBO) +-#endif +- + typedef enum _RT_AMPDU_BRUST_MODE{ + RT_AMPDU_BRUST_NONE = 0, + RT_AMPDU_BRUST_92D = 1, +@@ -102,19 +86,18 @@ typedef enum _RT_AMPDU_BRUST_MODE{ + RT_AMPDU_BRUST_8723B = 7, + }RT_AMPDU_BRUST,*PRT_AMPDU_BRUST_MODE; + ++/* + #define CHANNEL_MAX_NUMBER 14+24+21 // 14 is the max channel number +-#define CHANNEL_MAX_NUMBER_2G 14 +-#define CHANNEL_MAX_NUMBER_5G 54 // Please refer to "phy_GetChnlGroup8812A" and "Hal_ReadTxPowerInfo8812A" +-#define CHANNEL_MAX_NUMBER_5G_80M 7 +-#define CHANNEL_GROUP_MAX 3+9 // ch1~3, ch4~9, ch10~14 total three groups +-#define MAX_PG_GROUP 13 ++*/ ++#define CHANNEL_GROUP_MAX (3 + 9) /* ch1~3, ch4~9, ch10~14 total three groups */ ++#define MAX_PG_GROUP 13 + + // Tx Power Limit Table Size + #define MAX_REGULATION_NUM 4 + #define MAX_RF_PATH_NUM_IN_POWER_LIMIT_TABLE 4 +-#define MAX_2_4G_BANDWITH_NUM 2 ++#define MAX_2_4G_BANDWIDTH_NUM 2 + #define MAX_RATE_SECTION_NUM 10 +-#define MAX_5G_BANDWITH_NUM 4 ++#define MAX_5G_BANDWIDTH_NUM 4 + + #define MAX_BASE_NUM_IN_PHY_REG_PG_2_4G 10 // CCK:1,OFDM:1, HT:4, VHT:4 + #define MAX_BASE_NUM_IN_PHY_REG_PG_5G 9 // OFDM:1, HT:4, VHT:4 +@@ -134,14 +117,6 @@ typedef enum _RT_AMPDU_BRUST_MODE{ + //#define HP_THERMAL_NUM 8 + //###### duplicate code,will move to ODM ######### + +-#if defined(CONFIG_RTL8192D) || defined(CONFIG_BT_COEXIST) +-typedef enum _MACPHY_MODE_8192D{ +- SINGLEMAC_SINGLEPHY, //SMSP +- DUALMAC_DUALPHY, //DMDP +- DUALMAC_SINGLEPHY, //DMSP +-}MACPHY_MODE_8192D,*PMACPHY_MODE_8192D; +-#endif +- + #ifdef CONFIG_USB_RX_AGGREGATION + typedef enum _USB_RX_AGG_MODE{ + USB_RX_AGG_DISABLE, +@@ -154,118 +129,87 @@ typedef enum _USB_RX_AGG_MODE{ + + #endif + ++/* For store initial value of BB register */ ++typedef struct _BB_INIT_REGISTER { ++ u16 offset; ++ u32 value; ++ ++} BB_INIT_REGISTER, *PBB_INIT_REGISTER; ++ + #define PAGE_SIZE_128 128 + #define PAGE_SIZE_256 256 + #define PAGE_SIZE_512 512 + +-struct dm_priv +-{ +- u8 DM_Type; ++#define HCI_SUS_ENTER 0 ++#define HCI_SUS_LEAVING 1 ++#define HCI_SUS_LEAVE 2 ++#define HCI_SUS_ENTERING 3 ++#define HCI_SUS_ERR 4 ++ ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++typedef enum _ACS_OP { ++ ACS_INIT, /*ACS - Variable init*/ ++ ACS_RESET, /*ACS - NHM Counter reset*/ ++ ACS_SELECT, /*ACS - NHM Counter Statistics */ ++} ACS_OP; ++ ++typedef enum _ACS_STATE { ++ ACS_DISABLE, ++ ACS_ENABLE, ++} ACS_STATE; ++ ++struct auto_chan_sel { ++ ATOMIC_T state; ++ u8 ch; /* previous channel*/ ++}; ++#endif /*CONFIG_AUTO_CHNL_SEL_NHM*/ + +-#define DYNAMIC_FUNC_BT BIT0 ++#define EFUSE_FILE_UNUSED 0 ++#define EFUSE_FILE_FAILED 1 ++#define EFUSE_FILE_LOADED 2 + +- u8 DMFlag; +- u8 InitDMFlag; +- //u8 RSVD_1; +- +- u32 InitODMFlag; +- //* Upper and Lower Signal threshold for Rate Adaptive*/ +- int UndecoratedSmoothedPWDB; +- int UndecoratedSmoothedCCK; +- int EntryMinUndecoratedSmoothedPWDB; +- int EntryMaxUndecoratedSmoothedPWDB; +- int MinUndecoratedPWDBForDM; +- int LastMinUndecoratedPWDBForDM; ++#define MACADDR_FILE_UNUSED 0 ++#define MACADDR_FILE_FAILED 1 ++#define MACADDR_FILE_LOADED 2 + +- s32 UndecoratedSmoothedBeacon; ++#define KFREE_FLAG_ON BIT0 ++#define KFREE_FLAG_THERMAL_K_ON BIT1 + +-//###### duplicate code,will move to ODM ######### +- //for High Power +- u8 bDynamicTxPowerEnable; +- u8 LastDTPLvl; +- u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 +- +- //for tx power tracking +- u8 bTXPowerTracking; +- u8 TXPowercount; +- u8 bTXPowerTrackingInit; +- u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default +- u8 TM_Trigger; +- +- u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 +- u8 ThermalValue; +- u8 ThermalValue_LCK; +- u8 ThermalValue_IQK; +- u8 ThermalValue_DPK; +- u8 bRfPiEnable; +- //u8 RSVD_2; +- +- //for APK +- u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a +- u8 bAPKdone; +- u8 bAPKThermalMeterIgnore; +- u8 bDPdone; +- u8 bDPPathAOK; +- u8 bDPPathBOK; +- //u8 RSVD_3; +- //u8 RSVD_4; +- //u8 RSVD_5; +- +- //for IQK +- u32 ADDA_backup[IQK_ADDA_REG_NUM]; +- u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; +- u32 IQK_BB_backup_recover[9]; +- u32 IQK_BB_backup[IQK_BB_REG_NUM]; +- +- u8 PowerIndex_backup[6]; +- u8 OFDM_index[2]; +- +- u8 bCCKinCH14; +- u8 CCK_index; +- u8 bDoneTxpower; +- u8 CCK_index_HP; +- +- u8 OFDM_index_HP[2]; +- u8 ThermalValue_HP[HP_THERMAL_NUM]; +- u8 ThermalValue_HP_index; +- //u8 RSVD_6; +- +- //for TxPwrTracking2 +- s32 RegE94; +- s32 RegE9C; +- s32 RegEB4; +- s32 RegEBC; +- +- u32 TXPowerTrackingCallbackCnt; //cosa add for debug +- +- u32 prv_traffic_idx; // edca turbo +-#ifdef CONFIG_RTL8192D +- u8 ThermalValue_AVG[AVG_THERMAL_NUM]; +- u8 ThermalValue_AVG_index; +- u8 ThermalValue_RxGain; +- u8 ThermalValue_Crystal; +- u8 bReloadtxpowerindex; +- +- u32 RegD04_MP; +- +- u8 RegC04_MP; +- u8 Delta_IQK; +- u8 Delta_LCK; +- //u8 RSVD_7; +- +- BOOLEAN bDPKdone[2]; +- //u16 RSVD_8; +- +- u32 RegA24; +- u32 RegRF3C[2]; //pathA / pathB ++#define MAX_IQK_INFO_BACKUP_CHNL_NUM 5 ++#define MAX_IQK_INFO_BACKUP_REG_NUM 10 ++ ++struct kfree_data_t { ++ u8 flag; ++ s8 bb_gain[BB_GAIN_NUM][RF_PATH_MAX]; ++ ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++ s8 pa_bias_5g[RF_PATH_MAX]; ++ s8 pad_bias_5g[RF_PATH_MAX]; + #endif +-//###### duplicate code,will move to ODM ######### ++ s8 thermal; ++}; ++ ++bool kfree_data_is_bb_gain_empty(struct kfree_data_t *data); + +- // Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas +- u8 INIDATA_RATE[32]; +- _lock IQKSpinLock; ++struct hal_spec_t { ++ u8 macid_num; ++ ++ u8 sec_cam_ent_num; ++ u8 sec_cap; ++ ++ u8 nss_num; ++ u8 band_cap; /* value of BAND_CAP_XXX */ ++ u8 bw_cap; /* value of BW_CAP_XXX */ ++ u8 proto_cap; /* value of PROTO_CAP_XXX */ ++ ++ u8 wl_func; /* value of WL_FUNC_XXX */ + }; + ++struct hal_iqk_reg_backup { ++ u8 central_chnl; ++ u8 bw_mode; ++ u32 reg_backup[MAX_RF_PATH][MAX_IQK_INFO_BACKUP_REG_NUM]; ++}; + + typedef struct hal_com_data + { +@@ -273,41 +217,62 @@ typedef struct hal_com_data + RT_MULTI_FUNC MultiFunc; // For multi-function consideration. + RT_POLARITY_CTL PolarityCtl; // For Wifi PDn Polarity control. + RT_REGULATOR_MODE RegulatorMode; // switching regulator or LDO +- ++ u8 hw_init_completed; ++ /****** FW related ******/ + u16 FirmwareVersion; + u16 FirmwareVersionRev; + u16 FirmwareSubVersion; + u16 FirmwareSignature; ++ u8 RegFWOffload; ++ u8 fw_ractrl; ++ u8 FwRsvdPageStartOffset; /* 2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.*/ ++ u8 LastHMEBoxNum; /* H2C - for host message to fw */ + +- //current WIFI_PHY values +- WIRELESS_MODE CurrentWirelessMode; ++ /****** current WIFI_PHY values ******/ ++ WIRELESS_MODE CurrentWirelessMode; + CHANNEL_WIDTH CurrentChannelBW; +- BAND_TYPE CurrentBandType; //0:2.4G, 1:5G +- BAND_TYPE BandSet; +- u8 CurrentChannel; +- u8 CurrentCenterFrequencyIndex1; +- u8 nCur40MhzPrimeSC;// Control channel sub-carrier +- u8 nCur80MhzPrimeSC; //used for primary 40MHz of 80MHz mode +- +- u16 CustomerID; +- u16 BasicRateSet; +- u16 ForcedDataRate;// Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M. +- u32 ReceiveConfig; +- +- //rf_ctrl ++ BAND_TYPE CurrentBandType; /* 0:2.4G, 1:5G */ ++ BAND_TYPE BandSet; ++ u8 CurrentChannel; ++ u8 CurrentCenterFrequencyIndex1; ++ u8 nCur40MhzPrimeSC; /* Control channel sub-carrier */ ++ u8 nCur80MhzPrimeSC; /* used for primary 40MHz of 80MHz mode */ ++ BOOLEAN bSwChnlAndSetBWInProgress; ++ u8 bDisableSWChannelPlan; /* flag of disable software change channel plan */ ++ u16 BasicRateSet; ++ u32 ReceiveConfig; ++ BOOLEAN bSwChnl; ++ BOOLEAN bSetChnlBW; ++ BOOLEAN bSWToBW40M; ++ BOOLEAN bSWToBW80M; ++ BOOLEAN bChnlBWInitialized; ++ u32 BackUp_BB_REG_4_2nd_CCA[3]; ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ struct auto_chan_sel acs; ++#endif ++ /****** rf_ctrl *****/ + u8 rf_chip; + u8 rf_type; + u8 PackageType; + u8 NumTotalRFPath; + +- u8 InterfaceSel; +- u8 framesync; +- u32 framesyncC34; +- u8 framesyncMonitor; +- u8 DefaultInitialGain[4]; +- // +- // EEPROM setting. +- // ++ /****** Debug ******/ ++ u16 ForcedDataRate; /* Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M. */ ++ u8 u1ForcedIgiLb; /* forced IGI lower bound */ ++ u8 bDumpRxPkt; ++ u8 bDumpTxPkt; ++ u8 bDisableTXPowerTraining; ++ ++ ++ /****** EEPROM setting.******/ ++ u8 bautoload_fail_flag; ++ u8 efuse_file_status; ++ u8 macaddr_file_status; ++ u8 EepromOrEfuse; ++ u8 efuse_eeprom_data[EEPROM_MAX_SIZE]; /*92C:256bytes, 88E:512bytes, we use union set (512bytes)*/ ++ u8 InterfaceSel; /* board type kept in eFuse */ ++ u16 CustomerID; ++ + u16 EEPROMVID; + u16 EEPROMSVID; + #ifdef CONFIG_USB_HCI +@@ -330,27 +295,34 @@ typedef struct hal_com_data + u8 EEPROMBluetoothAntIsolation; + u8 EEPROMBluetoothRadioShared; + u8 bTXPowerDataReadFromEEPORM; +- u8 bAPKThermalMeterIgnore; +- u8 bDisableSWChannelPlan; // flag of disable software change channel plan +- +- BOOLEAN EepromOrEfuse; +- u8 EfuseUsedPercentage; +- u16 EfuseUsedBytes; +- //u8 EfuseMap[2][HWSET_MAX_SIZE_JAGUAR]; +- EFUSE_HAL EfuseHal; ++ u8 EEPROMMACAddr[ETH_ALEN]; ++ ++#ifdef CONFIG_RF_GAIN_OFFSET ++ u8 EEPROMRFGainOffset; ++ u8 EEPROMRFGainVal; ++ struct kfree_data_t kfree_data; ++#endif /*CONFIG_RF_GAIN_OFFSET*/ ++ ++#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) ++ u8 adjuseVoltageVal; ++#endif ++ u8 EfuseUsedPercentage; ++ u16 EfuseUsedBytes; ++ /*u8 EfuseMap[2][HWSET_MAX_SIZE_JAGUAR];*/ ++ EFUSE_HAL EfuseHal; + +- //---------------------------------------------------------------------------------// ++ /*---------------------------------------------------------------------------------*/ + //3 [2.4G] +- u8 Index24G_CCK_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER]; +- u8 Index24G_BW40_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER]; ++ u8 Index24G_CCK_Base[MAX_RF_PATH][CENTER_CH_2G_NUM]; ++ u8 Index24G_BW40_Base[MAX_RF_PATH][CENTER_CH_2G_NUM]; + //If only one tx, only BW20 and OFDM are used. + s8 CCK_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; + s8 OFDM_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; + s8 BW20_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; + s8 BW40_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; + //3 [5G] +- u8 Index5G_BW40_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER]; +- u8 Index5G_BW80_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER_5G_80M]; ++ u8 Index5G_BW40_Base[MAX_RF_PATH][CENTER_CH_5G_ALL_NUM]; ++ u8 Index5G_BW80_Base[MAX_RF_PATH][CENTER_CH_5G_80M_NUM]; + s8 OFDM_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; + s8 BW20_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; + s8 BW40_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; +@@ -361,16 +333,15 @@ typedef struct hal_com_data + + u8 TxPwrInPercentage; + +- u8 TxPwrCalibrateRate; +- // +- // TX power by rate table at most 4RF path. +- // The register is +- // +- // VHT TX power by rate off setArray = +- // Band:-2G&5G = 0 / 1 +- // RF: at most 4*4 = ABCD=0/1/2/3 +- // CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 +- // ++ /******************************** ++ * TX power by rate table at most 4RF path. ++ * The register is ++ * ++ * VHT TX power by rate off setArray = ++ * Band:-2G&5G = 0 / 1 ++ * RF: at most 4*4 = ABCD=0/1/2/3 ++ * CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 ++ **********************************/ + u8 TxPwrByRateTable; + u8 TxPwrByRateBand; + s8 TxPwrByRateOffset[TX_PWR_BY_RATE_NUM_BAND] +@@ -379,26 +350,30 @@ typedef struct hal_com_data + [TX_PWR_BY_RATE_NUM_RATE]; + //---------------------------------------------------------------------------------// + ++ /* + //2 Power Limit Table + u8 TxPwrLevelCck[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; + u8 TxPwrLevelHT40_1S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr + u8 TxPwrLevelHT40_2S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr + s8 TxPwrHt20Diff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff + u8 TxPwrLegacyHtDiff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff ++ */ ++ ++ u8 tx_pwr_lmt_5g_20_40_ref; + + // Power Limit Table for 2.4G + s8 TxPwrLimit_2_4G[MAX_REGULATION_NUM] +- [MAX_2_4G_BANDWITH_NUM] +- [MAX_RATE_SECTION_NUM] +- [CHANNEL_MAX_NUMBER_2G] +- [MAX_RF_PATH_NUM]; ++ [MAX_2_4G_BANDWIDTH_NUM] ++ [MAX_RATE_SECTION_NUM] ++ [CENTER_CH_2G_NUM] ++ [MAX_RF_PATH]; + + // Power Limit Table for 5G + s8 TxPwrLimit_5G[MAX_REGULATION_NUM] +- [MAX_5G_BANDWITH_NUM] ++ [MAX_5G_BANDWIDTH_NUM] + [MAX_RATE_SECTION_NUM] +- [CHANNEL_MAX_NUMBER_5G] +- [MAX_RF_PATH_NUM]; ++ [CENTER_CH_5G_ALL_NUM] ++ [MAX_RF_PATH]; + + + // Store the original power by rate value of the base of each rate section of rf path A & B +@@ -409,15 +384,18 @@ typedef struct hal_com_data + [TX_PWR_BY_RATE_NUM_RF] + [MAX_BASE_NUM_IN_PHY_REG_PG_5G]; + ++ u8 txpwr_by_rate_loaded:1; ++ u8 txpwr_by_rate_from_file:1; ++ u8 txpwr_limit_loaded:1; ++ u8 txpwr_limit_from_file:1; ++ + // For power group ++ /* + u8 PwrGroupHT20[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; + u8 PwrGroupHT40[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; +- +- +- +- ++ */ + u8 PGMaxGroup; +- u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff ++ + // The current Tx Power Level + u8 CurrentCckTxPwrIdx; + u8 CurrentOfdm24GTxPwrIdx; +@@ -430,9 +408,7 @@ typedef struct hal_com_data + u32 CCKTxPowerLevelOriginalOffset; + + u8 CrystalCap; +- u32 AntennaTxPath; // Antenna path Tx +- u32 AntennaRxPath; // Antenna path Rx +- ++ + u8 PAType_2G; + u8 PAType_5G; + u8 LNAType_2G; +@@ -441,38 +417,22 @@ typedef struct hal_com_data + u8 ExternalLNA_2G; + u8 ExternalPA_5G; + u8 ExternalLNA_5G; +- u8 TypeGLNA; +- u8 TypeGPA; +- u8 TypeALNA; +- u8 TypeAPA; +- u8 RFEType; +- u8 BoardType; +- u8 ExternalPA; +- u8 bIQKInitialized; +- BOOLEAN bLCKInProgress; +- +- BOOLEAN bSwChnl; +- BOOLEAN bSetChnlBW; +- BOOLEAN bChnlBWInitialized; +- BOOLEAN bNeedIQK; +- +- u8 bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. +- u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default +- u8 b1x1RecvCombine; // for 1T1R receive combining ++ u16 TypeGLNA; ++ u16 TypeGPA; ++ u16 TypeALNA; ++ u16 TypeAPA; ++ u16 RFEType; + +- u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. ++ u8 bLedOpenDrain; /* Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. */ ++ u32 AcParam_BE; /* Original parameter for BE, use for EDCA turbo. */ + +- BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D ++ BB_REGISTER_DEFINITION_T PHYRegDef[MAX_RF_PATH]; //Radio A/B/C/D + +- u32 RfRegChnlVal[2]; ++ u32 RfRegChnlVal[MAX_RF_PATH]; + + //RDG enable + BOOLEAN bRDGEnable; + +- //for host message to fw +- u8 LastHMEBoxNum; +- +- u8 fw_ractrl; + u8 RegTxPause; + // Beacon function related global variable. + u8 RegBcnCtrlVal; +@@ -481,18 +441,30 @@ typedef struct hal_com_data + u8 RegCR_1; + u8 Reg837; + u16 RegRRSR; +- +- u8 CurAntenna; ++ ++ /****** antenna diversity ******/ + u8 AntDivCfg; + u8 AntDetection; + u8 TRxAntDivType; +- u8 ant_path; //for 8723B s0/s1 selection ++ u8 ant_path; //for 8723B s0/s1 selection ++ u32 AntennaTxPath; /* Antenna path Tx */ ++ u32 AntennaRxPath; /* Antenna path Rx */ ++ u8 sw_antdiv_bl_state; ++ ++ /******** PHY DM & DM Section **********/ ++ u8 DM_Type; ++ _lock IQKSpinLock; ++ u8 INIDATA_RATE[MACID_NUM_SW_LIMIT]; ++ /* Upper and Lower Signal threshold for Rate Adaptive*/ ++ int EntryMinUndecoratedSmoothedPWDB; ++ int EntryMaxUndecoratedSmoothedPWDB; ++ int MinUndecoratedPWDBForDM; ++ DM_ODM_T odmpriv; ++ u8 bIQKInitialized; ++ u8 bNeedIQK; ++ /******** PHY DM & DM Section **********/ + +- u8 u1ForcedIgiLb; // forced IGI lower bound + +- u8 bDumpRxPkt;//for debug +- u8 bDumpTxPkt;//for debug +- u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. + + // 2010/08/09 MH Add CU power down mode. + BOOLEAN pwrdown; +@@ -500,30 +472,21 @@ typedef struct hal_com_data + // Add for dual MAC 0--Mac0 1--Mac1 + u32 interfaceIndex; + +- u8 OutEpQueueSel; +- u8 OutEpNumber; +- +- // 2010/12/10 MH Add for USB aggreation mode dynamic shceme. +- BOOLEAN UsbRxHighSpeedMode; +- +- // 2010/11/22 MH Add for slim combo debug mode selective. +- // This is used for fix the drawback of CU TSMC-A/UMC-A cut. HW auto suspend ability. Close BT clock. +- BOOLEAN SlimComboDbg; +- + #ifdef CONFIG_P2P + u8 p2p_ps_offload; + #endif +- +- //u8 AMPDUDensity; +- +- // Auto FSM to Turn On, include clock, isolation, power control for MAC only ++ /* Auto FSM to Turn On, include clock, isolation, power control for MAC only */ + u8 bMacPwrCtrlOn; +- u8 bDisableTXPowerTraining; ++ u8 hci_sus_state; ++ + u8 RegIQKFWOffload; + struct submit_ctx iqk_sctx; + + RT_AMPDU_BRUST AMPDUBurstMode; //92C maybe not use, but for compile successfully + ++ u8 OutEpQueueSel; ++ u8 OutEpNumber; ++ + #if defined (CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) + // + // For SDIO Interface HAL related +@@ -546,7 +509,6 @@ typedef struct hal_com_data + _lock SdioTxFIFOFreePageLock; + u8 SdioTxOQTMaxFreeSpace; + u8 SdioTxOQTFreeSpace; +- + + // + // SDIO Rx FIFO related. +@@ -558,30 +520,34 @@ typedef struct hal_com_data + #endif //CONFIG_SDIO_HCI + + #ifdef CONFIG_USB_HCI +- u32 UsbBulkOutSize; ++ ++ // 2010/12/10 MH Add for USB aggreation mode dynamic shceme. ++ BOOLEAN UsbRxHighSpeedMode; ++ BOOLEAN UsbTxVeryHighSpeedMode; ++ u32 UsbBulkOutSize; + BOOLEAN bSupportUSB3; + + // Interrupt relatd register information. +- u32 IntArray[3];//HISR0,HISR1,HSISR +- u32 IntrMask[3]; +- u8 C2hArray[16]; ++ u32 IntArray[3];//HISR0,HISR1,HSISR ++ u32 IntrMask[3]; ++ u8 C2hArray[16]; + #ifdef CONFIG_USB_TX_AGGREGATION +- u8 UsbTxAggMode; +- u8 UsbTxAggDescNum; ++ u8 UsbTxAggMode; ++ u8 UsbTxAggDescNum; + #endif // CONFIG_USB_TX_AGGREGATION + + #ifdef CONFIG_USB_RX_AGGREGATION +- u16 HwRxPageSize; // Hardware setting +- u32 MaxUsbRxAggBlock; ++ u16 HwRxPageSize; // Hardware setting ++ u32 MaxUsbRxAggBlock; + + USB_RX_AGG_MODE UsbRxAggMode; +- u8 UsbRxAggBlockCount; //FOR USB Mode, USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed +- u8 UsbRxAggBlockTimeout; +- u8 UsbRxAggPageCount; //FOR DMA Mode, 8192C DMA page count +- u8 UsbRxAggPageTimeout; ++ u8 UsbRxAggBlockCount; /* FOR USB Mode, USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed */ ++ u8 UsbRxAggBlockTimeout; ++ u8 UsbRxAggPageCount; /* FOR DMA Mode, 8192C DMA page count*/ ++ u8 UsbRxAggPageTimeout; + +- u8 RegAcUsbDmaSize; +- u8 RegAcUsbDmaTime; ++ u8 RegAcUsbDmaSize; ++ u8 RegAcUsbDmaTime; + #endif//CONFIG_USB_RX_AGGREGATION + #endif //CONFIG_USB_HCI + +@@ -590,34 +556,27 @@ typedef struct hal_com_data + // + // EEPROM setting. + // +- u16 EEPROMChannelPlan; +- +- u8 EEPROMTSSI[2]; +- u8 EEPROMBoardType; +- u32 TransmitConfig; +- +- u32 IntrMaskToSet[2]; +- u32 IntArray[2]; +- u32 IntrMask[2]; +- u32 SysIntArray[1]; +- u32 SysIntrMask[1]; +- u32 IntrMaskReg[2]; +- u32 IntrMaskDefault[2]; +- +- BOOLEAN bL1OffSupport; +- BOOLEAN bSupportBackDoor; +- +- u8 bDefaultAntenna; +- //u8 bIQKInitialized; ++ u32 TransmitConfig; ++ u32 IntrMaskToSet[2]; ++ u32 IntArray[2]; ++ u32 IntrMask[2]; ++ u32 SysIntArray[1]; ++ u32 SysIntrMask[1]; ++ u32 IntrMaskReg[2]; ++ u32 IntrMaskDefault[2]; ++ ++ BOOLEAN bL1OffSupport; ++ BOOLEAN bSupportBackDoor; ++ ++ u8 bDefaultAntenna; + +- u8 bInterruptMigration; +- u8 bDisableTxInt; ++ u8 bInterruptMigration; ++ u8 bDisableTxInt; + +- u16 RxTag; ++ u16 RxTag; + #endif //CONFIG_PCI_HCI ++ + +- struct dm_priv dmpriv; +- DM_ODM_T odmpriv; + #ifdef DBG_CONFIG_ERROR_DETECT + struct sreset_priv srestpriv; + #endif //#ifdef DBG_CONFIG_ERROR_DETECT +@@ -625,58 +584,15 @@ typedef struct hal_com_data + #ifdef CONFIG_BT_COEXIST + // For bluetooth co-existance + BT_COEXIST bt_coexist; +-#ifdef CONFIG_RTL8723A +- u8 bAntennaDetected; +-#endif // CONFIG_RTL8723A + #endif // CONFIG_BT_COEXIST + +-#if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) ++#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8188F) + #ifndef CONFIG_PCI_HCI // mutual exclusive with PCI -- so they're SDIO and GSPI + // Interrupt relatd register information. + u32 SysIntrStatus; + u32 SysIntrMask; + #endif +-#endif //endif CONFIG_RTL8723A +- +- +-#if defined(CONFIG_RTL8192C) ||defined(CONFIG_RTL8192D) +- +- u8 BluetoothCoexist; +- +- u8 EEPROMChnlAreaTxPwrCCK[2][3]; +- u8 EEPROMChnlAreaTxPwrHT40_1S[2][3]; +- u8 EEPROMChnlAreaTxPwrHT40_2SDiff[2][3]; +- u8 EEPROMPwrLimitHT20[3]; +- u8 EEPROMPwrLimitHT40[3]; +- #ifdef CONFIG_RTL8192D +- MACPHY_MODE_8192D MacPhyMode92D; +- BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G +- BAND_TYPE BandSet92D; +- BOOLEAN bMasterOfDMSP; +- BOOLEAN bSlaveOfDMSP; +- +- IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM_92D]; +- #ifdef CONFIG_DUALMAC_CONCURRENT +- BOOLEAN bInModeSwitchProcess; +- #endif +- u8 AutoLoadStatusFor8192D; +- u8 EEPROMC9; +- u8 EEPROMCC; +- u8 PAMode; +- u8 InternalPA5G[2]; //pathA / pathB +- BOOLEAN bPhyValueInitReady; +- BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress +- BOOLEAN bNOPG; +- BOOLEAN bIsVS; +- //Query RF by FW +- BOOLEAN bReadRFbyFW; +- BOOLEAN bEarlyModeEnable; +- BOOLEAN bSupportRemoteWakeUp; +- BOOLEAN bInSetPower; +- u8 RTSInitRate; // 2010.11.24.by tynli. +- #endif //CONFIG_RTL8192D +- +-#endif //defined(CONFIG_RTL8192C) ||defined(CONFIG_RTL8192D) ++#endif /*endif CONFIG_RTL8723B */ + + #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + char para_file_buf[MAX_PARA_FILE_BUF_LEN]; +@@ -704,19 +620,49 @@ typedef struct hal_com_data + s16 noise[ODM_MAX_CHANNEL_NUM]; + #endif + +- u8 macid_num; +- u8 cam_entry_num; ++ struct hal_spec_t hal_spec; ++ ++ u8 RfKFreeEnable; ++ u8 RfKFree_ch_group; ++ BOOLEAN bCCKinCH14; ++ BB_INIT_REGISTER RegForRecover[5]; + ++#if defined(CONFIG_PCI_HCI) && defined(RTL8814AE_SW_BCN) ++ BOOLEAN bCorrectBCN; ++#endif ++ u32 RxGainOffset[4]; /*{2G, 5G_Low, 5G_Middle, G_High}*/ ++ u8 BackUp_IG_REG_4_Chnl_Section[4]; /*{A,B,C,D}*/ ++ ++ struct hal_iqk_reg_backup iqk_reg_backup[MAX_IQK_INFO_BACKUP_CHNL_NUM]; + } HAL_DATA_COMMON, *PHAL_DATA_COMMON; + + ++ + typedef struct hal_com_data HAL_DATA_TYPE, *PHAL_DATA_TYPE; +-#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData)) +-#define GET_HAL_RFPATH_NUM(__pAdapter) (((HAL_DATA_TYPE *)((__pAdapter)->HalData))->NumTotalRFPath ) +-#define RT_GetInterfaceSelection(_Adapter) (GET_HAL_DATA(_Adapter)->InterfaceSel) +-#define GET_RF_TYPE(__pAdapter) (GET_HAL_DATA(__pAdapter)->rf_type) ++#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData)) ++#define GET_HAL_SPEC(__pAdapter) (&(GET_HAL_DATA((__pAdapter))->hal_spec)) ++ ++#define GET_HAL_RFPATH_NUM(__pAdapter) (((HAL_DATA_TYPE *)((__pAdapter)->HalData))->NumTotalRFPath ) ++#define RT_GetInterfaceSelection(_Adapter) (GET_HAL_DATA(_Adapter)->InterfaceSel) ++#define GET_RF_TYPE(__pAdapter) (GET_HAL_DATA(__pAdapter)->rf_type) ++#define GET_KFREE_DATA(_adapter) (&(GET_HAL_DATA((_adapter))->kfree_data)) ++ ++#define SUPPORT_HW_RADIO_DETECT(Adapter) ( RT_GetInterfaceSelection(Adapter) == INTF_SEL2_MINICARD ||\ ++ RT_GetInterfaceSelection(Adapter) == INTF_SEL3_USB_Solo ||\ ++ RT_GetInterfaceSelection(Adapter) == INTF_SEL4_USB_Combo) ++ ++#define get_hal_mac_addr(adapter) (GET_HAL_DATA(adapter)->EEPROMMACAddr) ++#define is_boot_from_eeprom(adapter) (GET_HAL_DATA(adapter)->EepromOrEfuse) ++#define rtw_get_hw_init_completed(adapter) (GET_HAL_DATA(adapter)->hw_init_completed) ++#define rtw_is_hw_init_completed(adapter) (GET_HAL_DATA(adapter)->hw_init_completed == _TRUE) + #endif + ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++#define GET_ACS_STATE(padapter) (ATOMIC_READ(&GET_HAL_DATA(padapter)->acs.state)) ++#define SET_ACS_STATE(padapter, set_state) (ATOMIC_SET(&GET_HAL_DATA(padapter)->acs.state, set_state)) ++#define rtw_get_acs_channel(padapter) (GET_HAL_DATA(padapter)->acs.ch) ++#define rtw_set_acs_channel(padapter, survey_ch) (GET_HAL_DATA(padapter)->acs.ch = survey_ch) ++#endif /*CONFIG_AUTO_CHNL_SEL_NHM*/ + + #endif //__HAL_DATA_H__ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_gspi.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_gspi.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_ic_cfg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_ic_cfg.h +new file mode 100644 +index 0000000..0c8371e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_ic_cfg.h +@@ -0,0 +1,93 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __HAL_IC_CFG_H__ ++#define __HAL_IC_CFG_H__ ++ ++#define RTL8188E_SUPPORT 0 ++#define RTL8812A_SUPPORT 0 ++#define RTL8821A_SUPPORT 0 ++#define RTL8723B_SUPPORT 0 ++#define RTL8192E_SUPPORT 0 ++#define RTL8814A_SUPPORT 0 ++#define RTL8195A_SUPPORT 0 ++#define RTL8703B_SUPPORT 0 ++#define RTL8188F_SUPPORT 0 ++#define RTL8822B_SUPPORT 0 ++#define RTL8821B_SUPPORT 0 ++ ++/*#if (RTL8188E_SUPPORT==1)*/ ++#define RATE_ADAPTIVE_SUPPORT 0 ++#define POWER_TRAINING_ACTIVE 0 ++ ++#ifdef CONFIG_MULTIDRV ++#endif ++ ++#ifdef CONFIG_RTL8188E ++#undef RTL8188E_SUPPORT ++#undef RATE_ADAPTIVE_SUPPORT ++#undef POWER_TRAINING_ACTIVE ++ ++#define RTL8188E_SUPPORT 1 ++#define RATE_ADAPTIVE_SUPPORT 1 ++#define POWER_TRAINING_ACTIVE 1 ++#endif ++ ++#ifdef CONFIG_RTL8812A ++#undef RTL8812A_SUPPORT ++#define RTL8812A_SUPPORT 1 ++#endif ++ ++#ifdef CONFIG_RTL8821A ++#undef RTL8821A_SUPPORT ++#define RTL8821A_SUPPORT 1 ++#endif ++ ++#ifdef CONFIG_RTL8192E ++#undef RTL8192E_SUPPORT ++#define RTL8192E_SUPPORT 1 ++#endif ++ ++#ifdef CONFIG_RTL8723B ++#undef RTL8723B_SUPPORT ++#define RTL8723B_SUPPORT 1 ++#endif ++ ++#ifdef CONFIG_RTL8814A ++#undef RTL8814A_SUPPORT ++#define RTL8814A_SUPPORT 1 ++#endif ++ ++#ifdef CONFIG_RTL8703B ++#undef RTL8703B_SUPPORT ++#define RTL8703B_SUPPORT 1 ++#endif ++ ++#ifdef CONFIG_RTL8188F ++#undef RTL8188F_SUPPORT ++#define RTL8188F_SUPPORT 1 ++#endif ++ ++#ifdef CONFIG_RTL8822B ++#undef RTL8822B_SUPPORT ++#define RTL8822B_SUPPORT 1 ++#endif ++ ++#endif /*__HAL_IC_CFG_H__*/ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_intf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_intf.h +old mode 100755 +new mode 100644 +index 9dadd66..6964c6b +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_intf.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_intf.h +@@ -30,18 +30,27 @@ enum RTL871X_HCI_TYPE { + + enum _CHIP_TYPE { + +- NULL_CHIP_TYPE, +- RTL8188C_8192C, +- RTL8192D, +- RTL8723A, ++ NULL_CHIP_TYPE, + RTL8188E, + RTL8192E, + RTL8812, + RTL8821, //RTL8811 + RTL8723B, ++ RTL8814A, ++ RTL8703B, ++ RTL8188F, + MAX_CHIP_TYPE + }; + ++extern const u32 _chip_type_to_odm_ic_type[]; ++#define chip_type_to_odm_ic_type(chip_type) (((chip_type) >= MAX_CHIP_TYPE) ? _chip_type_to_odm_ic_type[MAX_CHIP_TYPE] : _chip_type_to_odm_ic_type[(chip_type)]) ++ ++typedef enum _HAL_HW_TIMER_TYPE { ++ HAL_TIMER_NONE = 0, ++ HAL_TIMER_TXBF = 1, ++ HAL_TIMER_EARLYMODE = 2, ++} HAL_HW_TIMER_TYPE, *PHAL_HW_TIMER_TYPE; ++ + + typedef enum _HW_VARIABLES{ + HW_VAR_MEDIA_STATUS, +@@ -68,14 +77,9 @@ typedef enum _HW_VARIABLES{ + HW_VAR_SEC_DK_CFG, + HW_VAR_BCN_VALID, + HW_VAR_RF_TYPE, +- HW_VAR_DM_FLAG, +- HW_VAR_DM_FUNC_OP, +- HW_VAR_DM_FUNC_SET, +- HW_VAR_DM_FUNC_CLR, ++ /* PHYDM odm->SupportAbility */ + HW_VAR_CAM_EMPTY_ENTRY, + HW_VAR_CAM_INVALID_ALL, +- HW_VAR_CAM_WRITE, +- HW_VAR_CAM_READ, + HW_VAR_AC_PARAM_VO, + HW_VAR_AC_PARAM_VI, + HW_VAR_AC_PARAM_BE, +@@ -91,42 +95,35 @@ typedef enum _HW_VARIABLES{ + HW_VAR_H2C_FW_JOINBSSRPT, + HW_VAR_FWLPS_RF_ON, + HW_VAR_H2C_FW_P2P_PS_OFFLOAD, +- HW_VAR_TDLS_WRCR, +- HW_VAR_TDLS_INIT_CH_SEN, +- HW_VAR_TDLS_RS_RCR, +- HW_VAR_TDLS_DONE_CH_SEN, +- HW_VAR_INITIAL_GAIN, + HW_VAR_TRIGGER_GPIO_0, + HW_VAR_BT_SET_COEXIST, + HW_VAR_BT_ISSUE_DELBA, +- HW_VAR_CURRENT_ANTENNA, +- HW_VAR_ANTENNA_DIVERSITY_LINK, +- HW_VAR_ANTENNA_DIVERSITY_SELECT, + HW_VAR_SWITCH_EPHY_WoWLAN, + HW_VAR_EFUSE_USAGE, + HW_VAR_EFUSE_BYTES, + HW_VAR_EFUSE_BT_USAGE, + HW_VAR_EFUSE_BT_BYTES, + HW_VAR_FIFO_CLEARN_UP, ++ HW_VAR_RESTORE_HW_SEQ, + HW_VAR_CHECK_TXBUF, + HW_VAR_PCIE_STOP_TX_DMA, + HW_VAR_APFM_ON_MAC, //Auto FSM to Turn On, include clock, isolation, power control for MAC only ++ HW_VAR_HCI_SUS_STATE, + // The valid upper nav range for the HW updating, if the true value is larger than the upper range, the HW won't update it. + // Unit in microsecond. 0 means disable this function. +-#ifdef CONFIG_WOWLAN ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) + HW_VAR_WOWLAN, + HW_VAR_WAKEUP_REASON, + HW_VAR_RPWM_TOG, + #endif +-#ifdef CONFIG_AP_WOWLAN +- HW_VAR_AP_WOWLAN, ++#ifdef CONFIG_GPIO_WAKEUP ++ HW_SET_GPIO_WL_CTRL, + #endif + HW_VAR_SYS_CLKR, + HW_VAR_NAV_UPPER, + HW_VAR_C2H_HANDLE, + HW_VAR_RPT_TIMER_SETTING, + HW_VAR_TX_RPT_MAX_MACID, +- HW_VAR_H2C_MEDIA_STATUS_RPT, + HW_VAR_CHK_HI_QUEUE_EMPTY, + HW_VAR_DL_BCN_SEL, + HW_VAR_AMPDU_MAX_TIME, +@@ -143,22 +140,42 @@ typedef enum _HW_VARIABLES{ + HW_VAR_SOUNDING_STATUS, + HW_VAR_SOUNDING_FW_NDPA, + HW_VAR_SOUNDING_CLK, ++/*Add by YuChen for TXBF HW timer*/ ++ HW_VAR_HW_REG_TIMER_INIT, ++ HW_VAR_HW_REG_TIMER_RESTART, ++ HW_VAR_HW_REG_TIMER_START, ++ HW_VAR_HW_REG_TIMER_STOP, ++/*Add by YuChen for TXBF HW timer*/ + HW_VAR_DL_RSVD_PAGE, ++ HW_VAR_MACID_LINK, ++ HW_VAR_MACID_NOLINK, + HW_VAR_MACID_SLEEP, + HW_VAR_MACID_WAKEUP, + HW_VAR_DUMP_MAC_QUEUE_INFO, + HW_VAR_ASIX_IOT, ++ HW_VAR_EN_HW_UPDATE_TSF, ++ HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, ++ HW_VAR_CH_SW_IQK_INFO_BACKUP, ++ HW_VAR_CH_SW_IQK_INFO_RESTORE, ++#ifdef CONFIG_TDLS ++ HW_VAR_TDLS_WRCR, ++ HW_VAR_TDLS_RS_RCR, ++#ifdef CONFIG_TDLS_CH_SW ++ HW_VAR_TDLS_BCN_EARLY_C2H_RPT ++#endif ++#endif + }HW_VARIABLES; + + typedef enum _HAL_DEF_VARIABLE{ + HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, + HAL_DEF_IS_SUPPORT_ANT_DIV, +- HAL_DEF_CURRENT_ANTENNA, + HAL_DEF_DRVINFO_SZ, + HAL_DEF_MAX_RECVBUF_SZ, + HAL_DEF_RX_PACKET_OFFSET, ++ HAL_DEF_RX_DMA_SZ_WOW, ++ HAL_DEF_RX_DMA_SZ, ++ HAL_DEF_RX_PAGE_SIZE, + HAL_DEF_DBG_DUMP_RXPKT,//for dbg +- HAL_DEF_DBG_DM_FUNC,//for dbg + HAL_DEF_RA_DECISION_RATE, + HAL_DEF_RA_SGI, + HAL_DEF_PT_PWR_STATUS, +@@ -168,12 +185,12 @@ typedef enum _HAL_DEF_VARIABLE{ + HAL_DEF_RX_STBC, // RX STBC support + HAL_DEF_EXPLICIT_BEAMFORMER,// Explicit Compressed Steering Capable + HAL_DEF_EXPLICIT_BEAMFORMEE,// Explicit Compressed Beamforming Feedback Capable ++ HAL_DEF_BEAMFORMER_CAP, ++ HAL_DEF_BEAMFORMEE_CAP, + HW_VAR_MAX_RX_AMPDU_FACTOR, + HW_DEF_RA_INFO_DUMP, + HAL_DEF_DBG_DUMP_TXPKT, +- HW_DEF_FA_CNT_DUMP, +- HW_DEF_ODM_DBG_FLAG, +- HW_DEF_ODM_DBG_LEVEL, ++ + HAL_DEF_TX_PAGE_SIZE, + HAL_DEF_TX_PAGE_BOUNDARY, + HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN, +@@ -182,8 +199,10 @@ typedef enum _HAL_DEF_VARIABLE{ + HAL_DEF_PCI_AMD_L1_SUPPORT, + HAL_DEF_PCI_ASPM_OSC, // Support for ASPM OSC, added by Roger, 2013.03.27. + HAL_DEF_MACID_SLEEP, // Support for MACID sleep +- HAL_DEF_DBG_RX_INFO_DUMP, + HAL_DEF_DBG_DIS_PWT, //disable Tx power training or not. ++ HAL_DEF_EFUSE_USAGE, /* Get current EFUSE utilization. 2008.12.19. Added by Roger. */ ++ HAL_DEF_EFUSE_BYTES, ++ HW_VAR_BEST_AMPDU_DENSITY, + }HAL_DEF_VARIABLE; + + typedef enum _HAL_ODM_VARIABLE{ +@@ -192,6 +211,17 @@ typedef enum _HAL_ODM_VARIABLE{ + HAL_ODM_WIFI_DISPLAY_STATE, + HAL_ODM_NOISE_MONITOR, + HAL_ODM_REGULATION, ++ HAL_ODM_INITIAL_GAIN, ++ HAL_ODM_FA_CNT_DUMP, ++ HAL_ODM_DBG_FLAG, ++ HAL_ODM_DBG_LEVEL, ++ HAL_ODM_RX_INFO_DUMP, ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ HAL_ODM_AUTO_CHNL_SEL, ++#endif ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ HAL_ODM_ANTDIV_SELECT ++#endif + }HAL_ODM_VARIABLE; + + typedef enum _HAL_INTF_PS_FUNC{ +@@ -202,41 +232,62 @@ typedef enum _HAL_INTF_PS_FUNC{ + typedef s32 (*c2h_id_filter)(u8 *c2h_evt); + + struct hal_ops { ++ /*** initialize section ***/ ++ void (*read_chip_version)(_adapter *padapter); ++ void (*init_default_value)(_adapter *padapter); ++ void (*intf_chip_configure)(_adapter *padapter); ++ void (*read_adapter_info)(_adapter *padapter); + u32 (*hal_power_on)(_adapter *padapter); +- void (*hal_power_off)(_adapter *padapter); ++ void (*hal_power_off)(_adapter *padapter); + u32 (*hal_init)(_adapter *padapter); + u32 (*hal_deinit)(_adapter *padapter); +- +- void (*free_hal_data)(_adapter *padapter); +- +- u32 (*inirp_init)(_adapter *padapter); +- u32 (*inirp_deinit)(_adapter *padapter); +- void (*irp_reset)(_adapter *padapter); +- ++ void (*dm_init)(_adapter *padapter); ++ void (*dm_deinit)(_adapter *padapter); ++ ++ /*** xmit section ***/ + s32 (*init_xmit_priv)(_adapter *padapter); + void (*free_xmit_priv)(_adapter *padapter); ++ s32 (*hal_xmit)(_adapter *padapter, struct xmit_frame *pxmitframe); ++ /* ++ * mgnt_xmit should be implemented to run in interrupt context ++ */ ++ s32 (*mgnt_xmit)(_adapter *padapter, struct xmit_frame *pmgntframe); ++ s32 (*hal_xmitframe_enqueue)(_adapter *padapter, struct xmit_frame *pxmitframe); ++#ifdef CONFIG_XMIT_THREAD_MODE ++ s32 (*xmit_thread_handler)(_adapter *padapter); ++#endif ++ void (*run_thread)(_adapter *padapter); ++ void (*cancel_thread)(_adapter *padapter); + ++ /*** recv section ***/ + s32 (*init_recv_priv)(_adapter *padapter); +- void (*free_recv_priv)(_adapter *padapter); ++ void (*free_recv_priv)(_adapter *padapter); ++#if defined(CONFIG_USB_HCI)||defined(CONFIG_PCI_HCI) ++ u32 (*inirp_init)(_adapter *padapter); ++ u32 (*inirp_deinit)(_adapter *padapter); ++#endif ++ /*** interrupt hdl section ***/ ++ void (*enable_interrupt)(_adapter *padapter); ++ void (*disable_interrupt)(_adapter *padapter); ++ u8 (*check_ips_status)(_adapter *padapter); ++#if defined(CONFIG_PCI_HCI) ++ s32 (*interrupt_handler)(_adapter *padapter); ++#endif ++ ++#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) ++ void (*interrupt_handler)(_adapter *padapter, u16 pkt_len, u8 *pbuf); ++#endif + ++#if defined(CONFIG_PCI_HCI) ++ void (*irp_reset)(_adapter *padapter); ++#endif ++ ++ /*** DM section ***/ ++ + void (*InitSwLeds)(_adapter *padapter); + void (*DeInitSwLeds)(_adapter *padapter); ++ + +- void (*dm_init)(_adapter *padapter); +- void (*dm_deinit)(_adapter *padapter); +- void (*read_chip_version)(_adapter *padapter); +- +- void (*init_default_value)(_adapter *padapter); +- +- void (*intf_chip_configure)(_adapter *padapter); +- +- void (*read_adapter_info)(_adapter *padapter); +- +- void (*enable_interrupt)(_adapter *padapter); +- void (*disable_interrupt)(_adapter *padapter); +- u8 (*check_ips_status)(_adapter *padapter); +- s32 (*interrupt_handler)(_adapter *padapter); +- void (*clear_interrupt)(_adapter *padapter); + void (*set_bwmode_handler)(_adapter *padapter, CHANNEL_WIDTH Bandwidth, u8 Offset); + void (*set_channel_handler)(_adapter *padapter, u8 channel); + void (*set_chnl_bw_handler)(_adapter *padapter, u8 channel, CHANNEL_WIDTH Bandwidth, u8 Offset40, u8 Offset80); +@@ -245,14 +296,15 @@ struct hal_ops { + void (*get_tx_power_level_handler)(_adapter *padapter, s32 *powerlevel); + + void (*hal_dm_watchdog)(_adapter *padapter); ++#ifdef CONFIG_LPS_LCLK_WD_TIMER + void (*hal_dm_watchdog_in_lps)(_adapter *padapter); +- ++#endif + + void (*SetHwRegHandler)(_adapter *padapter, u8 variable,u8* val); + void (*GetHwRegHandler)(_adapter *padapter, u8 variable,u8* val); + + #ifdef CONFIG_C2H_PACKET_EN +- void (*SetHwRegHandlerWithBuf)(_adapter *padapter, u8 variable, u8* pbuf, int len); ++ void (*SetHwRegHandlerWithBuf)(_adapter *padapter, u8 variable, u8 * pbuf, int len); + #endif + + u8 (*GetHalDefVarHandler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); +@@ -264,24 +316,9 @@ struct hal_ops { + void (*UpdateRAMaskHandler)(_adapter *padapter, u32 mac_id, u8 rssi_level); + void (*SetBeaconRelatedRegistersHandler)(_adapter *padapter); + +- void (*Add_RateATid)(_adapter *padapter, u32 bitmap, u8* arg, u8 rssi_level); +- +- void (*run_thread)(_adapter *padapter); +- void (*cancel_thread)(_adapter *padapter); +- +-#ifdef CONFIG_ANTENNA_DIVERSITY +- u8 (*AntDivBeforeLinkHandler)(_adapter *padapter); +- void (*AntDivCompareHandler)(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); +-#endif ++ void (*Add_RateATid)(_adapter *padapter, u64 bitmap, u8 *arg, u8 rssi_level); + u8 (*interface_ps_func)(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val); + +- s32 (*hal_xmit)(_adapter *padapter, struct xmit_frame *pxmitframe); +- /* +- * mgnt_xmit should be implemented to run in interrupt context +- */ +- s32 (*mgnt_xmit)(_adapter *padapter, struct xmit_frame *pmgntframe); +- s32 (*hal_xmitframe_enqueue)(_adapter *padapter, struct xmit_frame *pxmitframe); +- + u32 (*read_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask); + void (*write_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); + u32 (*read_rfreg)(_adapter *padapter, u8 eRFPath, u32 RegAddr, u32 BitMask); +@@ -315,23 +352,24 @@ struct hal_ops { + int (*IOL_exec_cmds_sync)(_adapter *padapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); + #endif + +-#ifdef CONFIG_XMIT_THREAD_MODE +- s32 (*xmit_thread_handler)(_adapter *padapter); +-#endif + void (*hal_notch_filter)(_adapter * adapter, bool enable); +- void (*hal_reset_security_engine)(_adapter * adapter); + s32 (*c2h_handler)(_adapter *padapter, u8 *c2h_evt); + c2h_id_filter c2h_id_filter_ccx; + s32 (*fill_h2c_cmd)(PADAPTER, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); +-#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) +- void (*hal_cal_txdesc_chksum)(struct tx_desc *ptxdesc); +-#else +- void (*hal_cal_txdesc_chksum)(u8 *ptxdesc); +-#endif +-#ifdef CONFIG_WOWLAN +- void (*hal_set_wowlan_fw)(_adapter *adapter, u8 sleep); +-#endif //CONFIG_WOWLAN ++ void (*fill_fake_txdesc)(PADAPTER, u8 *pDesc, u32 BufferLen, ++ u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); ++ s32 (*fw_dl)(_adapter *adapter, u8 wowlan); ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++ void (*clear_interrupt)(_adapter *padapter); ++#endif + u8 (*hal_get_tx_buff_rsvd_page_num)(_adapter *adapter, bool wowlan); ++#ifdef CONFIG_GPIO_API ++ void (*update_hisr_hsisr_ind)(PADAPTER padapter, u32 flag); ++ int (*hal_gpio_func_check)(_adapter *padapter, u8 gpio_num); ++ void (*hal_gpio_multi_func_reset)(_adapter *padapter, u8 gpio_num); ++#endif ++ void (*fw_correct_bcn)(PADAPTER padapter); + }; + + typedef enum _RT_EEPROM_TYPE{ +@@ -349,22 +387,6 @@ typedef enum _RT_EEPROM_TYPE{ + #define RF_CHANGE_BY_SW BIT31 + + typedef enum _HARDWARE_TYPE{ +- HARDWARE_TYPE_RTL8180, +- HARDWARE_TYPE_RTL8185, +- HARDWARE_TYPE_RTL8187, +- HARDWARE_TYPE_RTL8188, +- HARDWARE_TYPE_RTL8190P, +- HARDWARE_TYPE_RTL8192E, +- HARDWARE_TYPE_RTL819xU, +- HARDWARE_TYPE_RTL8192SE, +- HARDWARE_TYPE_RTL8192SU, +- HARDWARE_TYPE_RTL8192CE, +- HARDWARE_TYPE_RTL8192CU, +- HARDWARE_TYPE_RTL8192DE, +- HARDWARE_TYPE_RTL8192DU, +- HARDWARE_TYPE_RTL8723AE, +- HARDWARE_TYPE_RTL8723AU, +- HARDWARE_TYPE_RTL8723AS, + HARDWARE_TYPE_RTL8188EE, + HARDWARE_TYPE_RTL8188EU, + HARDWARE_TYPE_RTL8188ES, +@@ -381,74 +403,46 @@ typedef enum _HARDWARE_TYPE{ + HARDWARE_TYPE_RTL8723BE, + HARDWARE_TYPE_RTL8723BU, + HARDWARE_TYPE_RTL8723BS, +- HARDWARE_TYPE_RTL8813AE, +- HARDWARE_TYPE_RTL8813AU, +- HARDWARE_TYPE_RTL8813AS, +- ++ HARDWARE_TYPE_RTL8814AE, ++ HARDWARE_TYPE_RTL8814AU, ++ HARDWARE_TYPE_RTL8814AS, ++ HARDWARE_TYPE_RTL8821BE, ++ HARDWARE_TYPE_RTL8821BU, ++ HARDWARE_TYPE_RTL8821BS, ++ HARDWARE_TYPE_RTL8822BE, ++ HARDWARE_TYPE_RTL8822BU, ++ HARDWARE_TYPE_RTL8822BS, ++ HARDWARE_TYPE_RTL8703BE, ++ HARDWARE_TYPE_RTL8703BU, ++ HARDWARE_TYPE_RTL8703BS, ++ HARDWARE_TYPE_RTL8188FE, ++ HARDWARE_TYPE_RTL8188FU, ++ HARDWARE_TYPE_RTL8188FS, + HARDWARE_TYPE_MAX, + }HARDWARE_TYPE; + +-#define IS_NEW_GENERATION_IC(_Adapter) (((PADAPTER)_Adapter)->HardwareType >=HARDWARE_TYPE_RTL8192EE) +-// +-// RTL8192C Series +-// +-#define IS_HARDWARE_TYPE_8192CE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CE) +-#define IS_HARDWARE_TYPE_8192CU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CU) +-#define IS_HARDWARE_TYPE_8192C(_Adapter) \ +-(IS_HARDWARE_TYPE_8192CE(_Adapter) || IS_HARDWARE_TYPE_8192CU(_Adapter)) +- +-// +-// RTL8192D Series +-// +-#define IS_HARDWARE_TYPE_8192DE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DE) +-#define IS_HARDWARE_TYPE_8192DU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DU) +-#define IS_HARDWARE_TYPE_8192D(_Adapter) \ +-(IS_HARDWARE_TYPE_8192DE(_Adapter) || IS_HARDWARE_TYPE_8192DU(_Adapter)) +- +-#define IS_HARDWARE_TYPE_OLDER_THAN_8723A(_Adapter) \ +-(IS_HARDWARE_TYPE_8192D(_Adapter) || IS_HARDWARE_TYPE_8192C(_Adapter)) +- +-// +-// RTL8723A Series +-// +-#define IS_HARDWARE_TYPE_8723AE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AE) +-#define IS_HARDWARE_TYPE_8723AU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AU) +-#define IS_HARDWARE_TYPE_8723AS(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AS) +-#define IS_HARDWARE_TYPE_8723A(_Adapter) \ +-(IS_HARDWARE_TYPE_8723AE(_Adapter) || IS_HARDWARE_TYPE_8723AU(_Adapter) || IS_HARDWARE_TYPE_8723AS(_Adapter)) +- ++#define IS_NEW_GENERATION_IC(_Adapter) (rtw_get_hw_type(_Adapter) >= HARDWARE_TYPE_RTL8192EE) + // + // RTL8188E Series + // +-#define IS_HARDWARE_TYPE_8188EE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188EE) +-#define IS_HARDWARE_TYPE_8188EU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188EU) +-#define IS_HARDWARE_TYPE_8188ES(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188ES) ++#define IS_HARDWARE_TYPE_8188EE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188EE) ++#define IS_HARDWARE_TYPE_8188EU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188EU) ++#define IS_HARDWARE_TYPE_8188ES(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188ES) + #define IS_HARDWARE_TYPE_8188E(_Adapter) \ + (IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || IS_HARDWARE_TYPE_8188ES(_Adapter)) + +- +-#define IS_HARDWARE_TYPE_8188E_before(_Adapter) \ +-(IS_HARDWARE_TYPE_8192C(_Adapter) ||IS_HARDWARE_TYPE_8192D(_Adapter) ||IS_HARDWARE_TYPE_8723A(_Adapter)) +- +- +-#define IS_HARDWARE_TYPE_OLDER_THAN_8812A(_Adapter) \ +-(IS_HARDWARE_TYPE_8192D(_Adapter) || IS_HARDWARE_TYPE_8192C(_Adapter) ||\ +- IS_HARDWARE_TYPE_8723AE(_Adapter) || IS_HARDWARE_TYPE_8723AU(_Adapter) || IS_HARDWARE_TYPE_8723AS(_Adapter) ||\ +- IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || IS_HARDWARE_TYPE_8188ES(_Adapter)\ +-) +- + // RTL8812 Series +-#define IS_HARDWARE_TYPE_8812E(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8812E) +-#define IS_HARDWARE_TYPE_8812AU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8812AU) ++#define IS_HARDWARE_TYPE_8812E(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8812E) ++#define IS_HARDWARE_TYPE_8812AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8812AU) + #define IS_HARDWARE_TYPE_8812(_Adapter) \ + (IS_HARDWARE_TYPE_8812E(_Adapter) || IS_HARDWARE_TYPE_8812AU(_Adapter)) + + // RTL8821 Series +-#define IS_HARDWARE_TYPE_8821E(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8821E) +-#define IS_HARDWARE_TYPE_8811AU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8811AU) +-#define IS_HARDWARE_TYPE_8821U(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8821U ||\ +- ((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8811AU) +-#define IS_HARDWARE_TYPE_8821S(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8821S) ++#define IS_HARDWARE_TYPE_8821E(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821E) ++#define IS_HARDWARE_TYPE_8811AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8811AU) ++#define IS_HARDWARE_TYPE_8821U(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821U || \ ++ rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8811AU) ++#define IS_HARDWARE_TYPE_8821S(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821S) + #define IS_HARDWARE_TYPE_8821(_Adapter) \ + (IS_HARDWARE_TYPE_8821E(_Adapter) || IS_HARDWARE_TYPE_8821U(_Adapter)|| IS_HARDWARE_TYPE_8821S(_Adapter)) + +@@ -456,56 +450,75 @@ typedef enum _HARDWARE_TYPE{ + (IS_HARDWARE_TYPE_8812(_Adapter) || IS_HARDWARE_TYPE_8821(_Adapter)) + + //RTL8192E Series +-#define IS_HARDWARE_TYPE_8192EE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192EE) +-#define IS_HARDWARE_TYPE_8192EU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192EU) +-#define IS_HARDWARE_TYPE_8192ES(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192ES) ++#define IS_HARDWARE_TYPE_8192EE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192EE) ++#define IS_HARDWARE_TYPE_8192EU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192EU) ++#define IS_HARDWARE_TYPE_8192ES(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192ES) + + #define IS_HARDWARE_TYPE_8192E(_Adapter) \ + (IS_HARDWARE_TYPE_8192EE(_Adapter) || IS_HARDWARE_TYPE_8192EU(_Adapter) ||IS_HARDWARE_TYPE_8192ES(_Adapter)) + +-#define IS_HARDWARE_TYPE_8723BE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723BE) +-#define IS_HARDWARE_TYPE_8723BU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723BU) +-#define IS_HARDWARE_TYPE_8723BS(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723BS) +- ++#define IS_HARDWARE_TYPE_8723BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BE) ++#define IS_HARDWARE_TYPE_8723BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BU) ++#define IS_HARDWARE_TYPE_8723BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BS) + + #define IS_HARDWARE_TYPE_8723B(_Adapter) \ + (IS_HARDWARE_TYPE_8723BE(_Adapter) || IS_HARDWARE_TYPE_8723BU(_Adapter) ||IS_HARDWARE_TYPE_8723BS(_Adapter)) + +-//RTL8813A Series +-#define IS_HARDWARE_TYPE_8813AE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8813AE) +-#define IS_HARDWARE_TYPE_8813AU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8813AU) +-#define IS_HARDWARE_TYPE_8813AS(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8813AS) +- +-#define IS_HARDWARE_TYPE_8813A(_Adapter) \ +-(IS_HARDWARE_TYPE_8813AE(_Adapter) || IS_HARDWARE_TYPE_8813AU(_Adapter) ||IS_HARDWARE_TYPE_8813AS(_Adapter)) +- +- +-typedef struct eeprom_priv EEPROM_EFUSE_PRIV, *PEEPROM_EFUSE_PRIV; +-#define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv) +-#define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse) +- +-typedef enum _wowlan_subcode{ +- WOWLAN_PATTERN_MATCH = 1, +- WOWLAN_MAGIC_PACKET = 2, +- WOWLAN_UNICAST = 3, +- WOWLAN_SET_PATTERN = 4, +- WOWLAN_DUMP_REG = 5, +- WOWLAN_ENABLE = 6, +- WOWLAN_DISABLE = 7, +- WOWLAN_STATUS = 8, +- WOWLAN_DEBUG_RELOAD_FW = 9, +- WOWLAN_DEBUG_1 =10, +- WOWLAN_DEBUG_2 =11, +- WOWLAN_AP_ENABLE =12, +- WOWLAN_AP_DISABLE =13 +-}wowlan_subcode; ++/* RTL8814A Series */ ++#define IS_HARDWARE_TYPE_8814AE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AE) ++#define IS_HARDWARE_TYPE_8814AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AU) ++#define IS_HARDWARE_TYPE_8814AS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AS) ++ ++#define IS_HARDWARE_TYPE_8814A(_Adapter) \ ++(IS_HARDWARE_TYPE_8814AE(_Adapter) || IS_HARDWARE_TYPE_8814AU(_Adapter) || IS_HARDWARE_TYPE_8814AS(_Adapter)) ++ ++#define IS_HARDWARE_TYPE_JAGUAR2(_Adapter) \ ++(IS_HARDWARE_TYPE_8814A(_Adapter) || IS_HARDWARE_TYPE_8821B(_Adapter) || IS_HARDWARE_TYPE_8822B(_Adapter)) ++ ++#define IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(_Adapter) \ ++(IS_HARDWARE_TYPE_JAGUAR(_Adapter) || IS_HARDWARE_TYPE_JAGUAR2(_Adapter)) ++ ++/* RTL8703B Series */ ++#define IS_HARDWARE_TYPE_8703BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BE) ++#define IS_HARDWARE_TYPE_8703BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BS) ++#define IS_HARDWARE_TYPE_8703BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BU) ++#define IS_HARDWARE_TYPE_8703B(_Adapter) \ ++(IS_HARDWARE_TYPE_8703BE(_Adapter) || IS_HARDWARE_TYPE_8703BU(_Adapter) || IS_HARDWARE_TYPE_8703BS(_Adapter)) ++ ++/* RTL8188F Series */ ++#define IS_HARDWARE_TYPE_8188FE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FE) ++#define IS_HARDWARE_TYPE_8188FS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FS) ++#define IS_HARDWARE_TYPE_8188FU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FU) ++#define IS_HARDWARE_TYPE_8188F(_Adapter) \ ++(IS_HARDWARE_TYPE_8188FE(_Adapter) || IS_HARDWARE_TYPE_8188FU(_Adapter) || IS_HARDWARE_TYPE_8188FS(_Adapter)) ++ ++#define IS_HARDWARE_TYPE_8821BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BE) ++#define IS_HARDWARE_TYPE_8821BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BU) ++#define IS_HARDWARE_TYPE_8821BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BS) ++ ++#define IS_HARDWARE_TYPE_8821B(_Adapter) \ ++(IS_HARDWARE_TYPE_8821BE(_Adapter) || IS_HARDWARE_TYPE_8821BU(_Adapter) || IS_HARDWARE_TYPE_8821BS(_Adapter)) ++ ++#define IS_HARDWARE_TYPE_8822BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BE) ++#define IS_HARDWARE_TYPE_8822BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BU) ++#define IS_HARDWARE_TYPE_8822BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BS) ++#define IS_HARDWARE_TYPE_8822B(_Adapter) \ ++(IS_HARDWARE_TYPE_8822BE(_Adapter) || IS_HARDWARE_TYPE_8822BU(_Adapter) || IS_HARDWARE_TYPE_8822BS(_Adapter)) ++ ++ ++ ++typedef enum _wowlan_subcode { ++ WOWLAN_ENABLE = 0, ++ WOWLAN_DISABLE = 1, ++ WOWLAN_AP_ENABLE = 2, ++ WOWLAN_AP_DISABLE = 3, ++ WOWLAN_PATTERN_CLEAN = 4 ++} wowlan_subcode; + + struct wowlan_ioctl_param{ + unsigned int subcode; + unsigned int subcode_value; + unsigned int wakeup_reason; +- unsigned int len; +- unsigned char pattern[0]; + }; + + #define Rx_Pairwisekey 0x01 +@@ -520,6 +533,9 @@ struct wowlan_ioctl_param{ + #define RX_PNOWakeUp 0x55 + #define AP_WakeUp 0x66 + ++u8 rtw_hal_data_init(_adapter *padapter); ++void rtw_hal_data_deinit(_adapter *padapter); ++ + void rtw_hal_def_value_init(_adapter *padapter); + + void rtw_hal_free_data(_adapter *padapter); +@@ -531,6 +547,7 @@ void rtw_hal_sw_led_deinit(_adapter *padapter); + + u32 rtw_hal_power_on(_adapter *padapter); + void rtw_hal_power_off(_adapter *padapter); ++ + uint rtw_hal_init(_adapter *padapter); + uint rtw_hal_deinit(_adapter *padapter); + void rtw_hal_stop(_adapter *padapter); +@@ -550,16 +567,20 @@ u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pVa + + void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet); + void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,PVOID pValue2); +- ++ + void rtw_hal_enable_interrupt(_adapter *padapter); + void rtw_hal_disable_interrupt(_adapter *padapter); + + u8 rtw_hal_check_ips_status(_adapter *padapter); + ++#if defined(CONFIG_USB_HCI)||defined(CONFIG_PCI_HCI) + u32 rtw_hal_inirp_init(_adapter *padapter); + u32 rtw_hal_inirp_deinit(_adapter *padapter); ++#endif + ++#if defined(CONFIG_PCI_HCI) + void rtw_hal_irp_reset(_adapter *padapter); ++#endif + + u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val); + +@@ -574,7 +595,7 @@ s32 rtw_hal_init_recv_priv(_adapter *padapter); + void rtw_hal_free_recv_priv(_adapter *padapter); + + void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level); +-void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8* arg, u8 rssi_level); ++void rtw_hal_add_ra_tid(_adapter *padapter, u64 bitmap, u8 *arg, u8 rssi_level); + + void rtw_hal_start_thread(_adapter *padapter); + void rtw_hal_stop_thread(_adapter *padapter); +@@ -594,7 +615,12 @@ void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMa + #define PHY_SetMacReg PHY_SetBBReg + #define PHY_QueryMacReg PHY_QueryBBReg + ++#if defined(CONFIG_PCI_HCI) + s32 rtw_hal_interrupt_handler(_adapter *padapter); ++#endif ++#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) ++void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf); ++#endif + + void rtw_hal_set_bwmode(_adapter *padapter, CHANNEL_WIDTH Bandwidth, u8 Offset); + void rtw_hal_set_chan(_adapter *padapter, u8 channel); +@@ -605,11 +631,6 @@ void rtw_hal_dm_watchdog_in_lps(_adapter *padapter); + void rtw_hal_set_tx_power_level(_adapter *padapter, u8 channel); + void rtw_hal_get_tx_power_level(_adapter *padapter, s32 *powerlevel); + +-#ifdef CONFIG_ANTENNA_DIVERSITY +-u8 rtw_hal_antdiv_before_linked(_adapter *padapter); +-void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); +-#endif +- + #ifdef CONFIG_HOSTAPD_MLME + s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); + #endif +@@ -633,7 +654,6 @@ s32 rtw_hal_xmit_thread_handler(_adapter *padapter); + #endif + + void rtw_hal_notch_filter(_adapter * adapter, bool enable); +-void rtw_hal_reset_security_engine(_adapter * adapter); + + bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf); + s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf); +@@ -645,7 +665,24 @@ s32 rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter); + s32 rtw_hal_macid_sleep(PADAPTER padapter, u8 macid); + s32 rtw_hal_macid_wakeup(PADAPTER padapter, u8 macid); + +-s32 rtw_hal_fill_h2c_cmd(PADAPTER, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); ++s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); ++void rtw_hal_fill_fake_txdesc(_adapter *padapter, u8 *pDesc, u32 BufferLen, ++ u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); ++u8 rtw_hal_get_txbuff_rsvd_page_num(_adapter *adapter, bool wowlan); ++ ++#ifdef CONFIG_GPIO_API ++void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag); ++int rtw_hal_gpio_func_check(_adapter *padapter, u8 gpio_num); ++void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num); ++#endif ++ ++void rtw_hal_fw_correct_bcn(_adapter *padapter); ++s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan); ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++void rtw_hal_clear_interrupt(_adapter *padapter); ++#endif ++u8 rtw_hal_ops_check(_adapter *padapter); + + #endif //__HAL_INTF_H__ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_pg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_pg.h +old mode 100755 +new mode 100644 +index 9d9911f..086bcc7 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_pg.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_pg.h +@@ -1,656 +1,661 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +- +-#ifndef __HAL_PG_H__ +-#define __HAL_PG_H__ +- +-//==================================================== +-// EEPROM/Efuse PG Offset for 8192 CE/CU +-//==================================================== +-#define EEPROM_VID_92C 0x0A +-#define EEPROM_PID_92C 0x0C +-#define EEPROM_DID_92C 0x0C +-#define EEPROM_SVID_92C 0x0E +-#define EEPROM_SMID_92C 0x10 +-#define EEPROM_MAC_ADDR_92C 0x16 +- +-#define EEPROM_MAC_ADDR 0x16 +-#define EEPROM_TV_OPTION 0x50 +-#define EEPROM_SUBCUSTOMER_ID_92C 0x59 +-#define EEPROM_CCK_TX_PWR_INX 0x5A +-#define EEPROM_HT40_1S_TX_PWR_INX 0x60 +-#define EEPROM_HT40_2S_TX_PWR_INX_DIFF 0x66 +-#define EEPROM_HT20_TX_PWR_INX_DIFF 0x69 +-#define EEPROM_OFDM_TX_PWR_INX_DIFF 0x6C +-#define EEPROM_HT40_MAX_PWR_OFFSET 0x6F +-#define EEPROM_HT20_MAX_PWR_OFFSET 0x72 +-#define EEPROM_CHANNEL_PLAN_92C 0x75 +-#define EEPROM_TSSI_A 0x76 +-#define EEPROM_TSSI_B 0x77 +-#define EEPROM_THERMAL_METER_92C 0x78 +-#define EEPROM_RF_OPT1_92C 0x79 +-#define EEPROM_RF_OPT2_92C 0x7A +-#define EEPROM_RF_OPT3_92C 0x7B +-#define EEPROM_RF_OPT4_92C 0x7C +-#define EEPROM_VERSION_92C 0x7E +-#define EEPROM_CUSTOMER_ID_92C 0x7F +- +-#define EEPROM_NORMAL_CHANNEL_PLAN 0x75 +-#define EEPROM_NORMAL_BoardType_92C EEPROM_RF_OPT1_92C +-#define BOARD_TYPE_NORMAL_MASK 0xE0 +-#define BOARD_TYPE_TEST_MASK 0xF +-#define EEPROM_TYPE_ID 0x7E +- +-// PCIe related +-#define EEPROM_PCIE_DEV_CAP_01 0xE0 // Express device capability in PCIe configuration space, i.e., map to offset 0x74 +-#define EEPROM_PCIE_DEV_CAP_02 0xE1 // Express device capability in PCIe configuration space, i.e., map to offset 0x75 +- +-// EEPROM address for Test chip +-#define EEPROM_TEST_USB_OPT 0x0E +- +-#define EEPROM_EASY_REPLACEMENT 0x50//BIT0 1 for build-in module, 0 for external dongle +- +-//==================================================== +-// EEPROM/Efuse PG Offset for 8723AE/8723AU/8723AS +-//==================================================== +-#define EEPROM_CCK_TX_PWR_INX_8723A 0x10 +-#define EEPROM_HT40_1S_TX_PWR_INX_8723A 0x16 +-#define EEPROM_HT20_TX_PWR_INX_DIFF_8723A 0x1C +-#define EEPROM_OFDM_TX_PWR_INX_DIFF_8723A 0x1F +-#define EEPROM_HT40_MAX_PWR_OFFSET_8723A 0x22 +-#define EEPROM_HT20_MAX_PWR_OFFSET_8723A 0x25 +- +-#define EEPROM_ChannelPlan_8723A 0x28 +-#define EEPROM_TSSI_A_8723A 0x29 +-#define EEPROM_THERMAL_METER_8723A 0x2A +-#define RF_OPTION1_8723A 0x2B +-#define RF_OPTION2_8723A 0x2C +-#define RF_OPTION3_8723A 0x2D +-#define RF_OPTION4_8723A 0x2E +-#define EEPROM_VERSION_8723A 0x30 +-#define EEPROM_CustomID_8723A 0x31 +-#define EEPROM_SubCustomID_8723A 0x32 +-#define EEPROM_XTAL_K_8723A 0x33 +-#define EEPROM_Chipset_8723A 0x34 +- +- +-// RTL8723AE +-#define EEPROM_VID_8723AE 0x49 +-#define EEPROM_DID_8723AE 0x4B +-#define EEPROM_SVID_8723AE 0x4D +-#define EEPROM_SMID_8723AE 0x4F +-#define EEPROM_MAC_ADDR_8723AE 0x67 +- +-//RTL8723AU +-#define EEPROM_MAC_ADDR_8723AU 0xC6 +-#define EEPROM_VID_8723AU 0xB7 +-#define EEPROM_PID_8723AU 0xB9 +- +-// RTL8723AS +-#define EEPROM_MAC_ADDR_8723AS 0xAA +- +-//==================================================== +-// EEPROM/Efuse PG Offset for 8192 DE/DU +-//==================================================== +-// pcie +-#define RTL8190_EEPROM_ID 0x8129 // 0-1 +-#define EEPROM_HPON 0x02 // LDO settings.2-5 +-#define EEPROM_CLK 0x06 // Clock settings.6-7 +-#define EEPROM_MAC_FUNCTION 0x08 // SE Test mode.8 +- +-#define EEPROM_MAC_ADDR_MAC0_92DE 0x55 +-#define EEPROM_MAC_ADDR_MAC1_92DE 0x5B +- +-//usb +-#define EEPROM_ENDPOINT_SETTING 0x10 +-#define EEPROM_CHIRP_K 0x12 // Changed +-#define EEPROM_USB_PHY 0x13 // Changed +-#define EEPROM_STRING 0x1F +-#define EEPROM_SUBCUSTOMER_ID_92D 0x59 +- +-#define EEPROM_MAC_ADDR_MAC0_92DU 0x19 +-#define EEPROM_MAC_ADDR_MAC1_92DU 0x5B +-//---------------------------------------------------------------- +-// 2.4G band Tx power index setting +-#define EEPROM_CCK_TX_PWR_INX_2G_92D 0x61 +-#define EEPROM_HT40_1S_TX_PWR_INX_2G_92D 0x67 +-#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G_92D 0x6D +-#define EEPROM_HT20_TX_PWR_INX_DIFF_2G_92D 0x70 +-#define EEPROM_OFDM_TX_PWR_INX_DIFF_2G_92D 0x73 +-#define EEPROM_HT40_MAX_PWR_OFFSET_2G_92D 0x76 +-#define EEPROM_HT20_MAX_PWR_OFFSET_2G_92D 0x79 +- +-//5GL channel 32-64 +-#define EEPROM_HT40_1S_TX_PWR_INX_5GL_92D 0x7C +-#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL_92D 0x82 +-#define EEPROM_HT20_TX_PWR_INX_DIFF_5GL_92D 0x85 +-#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL_92D 0x88 +-#define EEPROM_HT40_MAX_PWR_OFFSET_5GL_92D 0x8B +-#define EEPROM_HT20_MAX_PWR_OFFSET_5GL_92D 0x8E +- +-//5GM channel 100-140 +-#define EEPROM_HT40_1S_TX_PWR_INX_5GM_92D 0x91 +-#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM_92D 0x97 +-#define EEPROM_HT20_TX_PWR_INX_DIFF_5GM_92D 0x9A +-#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM_92D 0x9D +-#define EEPROM_HT40_MAX_PWR_OFFSET_5GM_92D 0xA0 +-#define EEPROM_HT20_MAX_PWR_OFFSET_5GM_92D 0xA3 +- +-//5GH channel 149-165 +-#define EEPROM_HT40_1S_TX_PWR_INX_5GH_92D 0xA6 +-#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH_92D 0xAC +-#define EEPROM_HT20_TX_PWR_INX_DIFF_5GH_92D 0xAF +-#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH_92D 0xB2 +-#define EEPROM_HT40_MAX_PWR_OFFSET_5GH_92D 0xB5 +-#define EEPROM_HT20_MAX_PWR_OFFSET_5GH_92D 0xB8 +- +- +-#define EEPROM_CHANNEL_PLAN_92D 0xBB // Map of supported channels. +-#define EEPROM_TEST_CHANNEL_PLAN_92D 0xBB +-#define EEPROM_THERMAL_METER_92D 0xC3 //[4:0] +-#define EEPROM_IQK_DELTA_92D 0xBC +-#define EEPROM_LCK_DELTA_92D 0xBC +-#define EEPROM_XTAL_K_92D 0xBD //[7:5] +-#define EEPROM_TSSI_A_5G_92D 0xBE +-#define EEPROM_TSSI_B_5G_92D 0xBF +-#define EEPROM_TSSI_AB_5G_92D 0xC0 +- +-#define EEPROM_RF_OPT1_92D 0xC4 +-#define EEPROM_RF_OPT2_92D 0xC5 +-#define EEPROM_RF_OPT3_92D 0xC6 +-#define EEPROM_RF_OPT4_92D 0xC7 +-#define EEPROM_RF_OPT5_92D 0xC8 +-#define EEPROM_RF_OPT6_92D 0xC9 +-#define EEPROM_RF_OPT7_92D 0xCC +- +-#define EEPROM_NORMAL_BoardType_92D EEPROM_RF_OPT1_92D //[7:5] +- +-#define EEPROM_WIDIPAIRING_ADDR 0xF0 +-#define EEPROM_WIDIPAIRING_KEY 0xF6 +- +-#define EEPROM_DEF_PART_NO 0x3FD //Byte +-#define EEPROME_CHIP_VERSION_L 0x3FF +-#define EEPROME_CHIP_VERSION_H 0x3FE +- +-//---------------------------------------------------------------- +- +-#define EEPROM_VID_92DE 0x28 +-#define EEPROM_PID_92DE 0x2A +-#define EEPROM_SVID_92DE 0x2C +-#define EEPROM_SMID_92DE 0x2E +-#define EEPROM_PATHDIV_92D 0xC4 +- +-#define EEPROM_BOARD_OPTIONS_92D 0xC4 +-#define EEPROM_5G_LNA_GAIN_92D 0xC6 +-#define EEPROM_FEATURE_OPTIONS_92D 0xC7 +-#define EEPROM_BT_SETTING_92D 0xC8 +- +-#define EEPROM_VERSION_92D 0xCA +-#define EEPROM_CUSTOMER_ID_92D 0xCB +- +-#define EEPROM_VID_92DU 0xC +-#define EEPROM_PID_92DU 0xE +- +-//==================================================== +-// EEPROM/Efuse PG Offset for 88EE/88EU/88ES +-//==================================================== +-#define EEPROM_TX_PWR_INX_88E 0x10 +- +-#define EEPROM_ChannelPlan_88E 0xB8 +-#define EEPROM_XTAL_88E 0xB9 +-#define EEPROM_THERMAL_METER_88E 0xBA +-#define EEPROM_IQK_LCK_88E 0xBB +- +-#define EEPROM_RF_BOARD_OPTION_88E 0xC1 +-#define EEPROM_RF_FEATURE_OPTION_88E 0xC2 +-#define EEPROM_RF_BT_SETTING_88E 0xC3 +-#define EEPROM_VERSION_88E 0xC4 +-#define EEPROM_CustomID_88E 0xC5 +-#define EEPROM_RF_ANTENNA_OPT_88E 0xC9 +- +-// RTL88EE +-#define EEPROM_MAC_ADDR_88EE 0xD0 +-#define EEPROM_VID_88EE 0xD6 +-#define EEPROM_DID_88EE 0xD8 +-#define EEPROM_SVID_88EE 0xDA +-#define EEPROM_SMID_88EE 0xDC +- +-//RTL88EU +-#define EEPROM_MAC_ADDR_88EU 0xD7 +-#define EEPROM_VID_88EU 0xD0 +-#define EEPROM_PID_88EU 0xD2 +-#define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 //8192EU, 8812AU is the same +-#define EEPROM_USB_OPTIONAL_FUNCTION0_8811AU 0x104 +- +-// RTL88ES +-#define EEPROM_MAC_ADDR_88ES 0x11A +-//==================================================== +-// EEPROM/Efuse PG Offset for 8192EE/8192EU/8192ES +-//==================================================== +-// 0x10 ~ 0x63 = TX power area. +-#define EEPROM_TX_PWR_INX_8192E 0x10 +- +-#define EEPROM_ChannelPlan_8192E 0xB8 +-#define EEPROM_XTAL_8192E 0xB9 +-#define EEPROM_THERMAL_METER_8192E 0xBA +-#define EEPROM_IQK_LCK_8192E 0xBB +-#define EEPROM_2G_5G_PA_TYPE_8192E 0xBC +-#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192E 0xBD +-#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192E 0xBF +- +-#define EEPROM_RF_BOARD_OPTION_8192E 0xC1 +-#define EEPROM_RF_FEATURE_OPTION_8192E 0xC2 +-#define EEPROM_RF_BT_SETTING_8192E 0xC3 +-#define EEPROM_VERSION_8192E 0xC4 +-#define EEPROM_CustomID_8192E 0xC5 +-#define EEPROM_TX_BBSWING_2G_8192E 0xC6 +-#define EEPROM_TX_BBSWING_5G_8192E 0xC7 +-#define EEPROM_TX_PWR_CALIBRATE_RATE_8192E 0xC8 +-#define EEPROM_RF_ANTENNA_OPT_8192E 0xC9 +- +-// RTL8192EE +-#define EEPROM_MAC_ADDR_8192EE 0xD0 +-#define EEPROM_VID_8192EE 0xD6 +-#define EEPROM_DID_8192EE 0xD8 +-#define EEPROM_SVID_8192EE 0xDA +-#define EEPROM_SMID_8192EE 0xDC +- +-//RTL8192EU +-#define EEPROM_MAC_ADDR_8192EU 0xD7 +-#define EEPROM_VID_8192EU 0xD0 +-#define EEPROM_PID_8192EU 0xD2 +-#define EEPROM_PA_TYPE_8192EU 0xBC +-#define EEPROM_LNA_TYPE_2G_8192EU 0xBD +-#define EEPROM_LNA_TYPE_5G_8192EU 0xBF +- +-// RTL8192ES +-#define EEPROM_MAC_ADDR_8192ES 0x11B +-//==================================================== +-// EEPROM/Efuse PG Offset for 8812AE/8812AU/8812AS +-//==================================================== +-// 0x10 ~ 0x63 = TX power area. +-#define EEPROM_USB_MODE_8812 0x08 +-#define EEPROM_TX_PWR_INX_8812 0x10 +- +-#define EEPROM_ChannelPlan_8812 0xB8 +-#define EEPROM_XTAL_8812 0xB9 +-#define EEPROM_THERMAL_METER_8812 0xBA +-#define EEPROM_IQK_LCK_8812 0xBB +-#define EEPROM_2G_5G_PA_TYPE_8812 0xBC +-#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8812 0xBD +-#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8812 0xBF +- +-#define EEPROM_RF_BOARD_OPTION_8812 0xC1 +-#define EEPROM_RF_FEATURE_OPTION_8812 0xC2 +-#define EEPROM_RF_BT_SETTING_8812 0xC3 +-#define EEPROM_VERSION_8812 0xC4 +-#define EEPROM_CustomID_8812 0xC5 +-#define EEPROM_TX_BBSWING_2G_8812 0xC6 +-#define EEPROM_TX_BBSWING_5G_8812 0xC7 +-#define EEPROM_TX_PWR_CALIBRATE_RATE_8812 0xC8 +-#define EEPROM_RF_ANTENNA_OPT_8812 0xC9 +-#define EEPROM_RFE_OPTION_8812 0xCA +- +-// RTL8812AE +-#define EEPROM_MAC_ADDR_8812AE 0xD0 +-#define EEPROM_VID_8812AE 0xD6 +-#define EEPROM_DID_8812AE 0xD8 +-#define EEPROM_SVID_8812AE 0xDA +-#define EEPROM_SMID_8812AE 0xDC +- +-//RTL8812AU +-#define EEPROM_MAC_ADDR_8812AU 0xD7 +-#define EEPROM_VID_8812AU 0xD0 +-#define EEPROM_PID_8812AU 0xD2 +-#define EEPROM_PA_TYPE_8812AU 0xBC +-#define EEPROM_LNA_TYPE_2G_8812AU 0xBD +-#define EEPROM_LNA_TYPE_5G_8812AU 0xBF +- +-//==================================================== +-// EEPROM/Efuse PG Offset for 8821AE/8821AU/8821AS +-//==================================================== +-#define EEPROM_TX_PWR_INX_8821 0x10 +- +-#define EEPROM_ChannelPlan_8821 0xB8 +-#define EEPROM_XTAL_8821 0xB9 +-#define EEPROM_THERMAL_METER_8821 0xBA +-#define EEPROM_IQK_LCK_8821 0xBB +- +- +-#define EEPROM_RF_BOARD_OPTION_8821 0xC1 +-#define EEPROM_RF_FEATURE_OPTION_8821 0xC2 +-#define EEPROM_RF_BT_SETTING_8821 0xC3 +-#define EEPROM_VERSION_8821 0xC4 +-#define EEPROM_CustomID_8821 0xC5 +-#define EEPROM_RF_ANTENNA_OPT_8821 0xC9 +- +-// RTL8821AE +-#define EEPROM_MAC_ADDR_8821AE 0xD0 +-#define EEPROM_VID_8821AE 0xD6 +-#define EEPROM_DID_8821AE 0xD8 +-#define EEPROM_SVID_8821AE 0xDA +-#define EEPROM_SMID_8821AE 0xDC +- +-//RTL8821AU +-#define EEPROM_PA_TYPE_8821AU 0xBC +-#define EEPROM_LNA_TYPE_8821AU 0xBF +- +-// RTL8821AS +-#define EEPROM_MAC_ADDR_8821AS 0x11A +- +-//RTL8821AU +-#define EEPROM_MAC_ADDR_8821AU 0x107 +-#define EEPROM_VID_8821AU 0x100 +-#define EEPROM_PID_8821AU 0x102 +- +- +-//==================================================== +-// EEPROM/Efuse PG Offset for 8192 SE/SU +-//==================================================== +-#define EEPROM_VID_92SE 0x0A +-#define EEPROM_DID_92SE 0x0C +-#define EEPROM_SVID_92SE 0x0E +-#define EEPROM_SMID_92SE 0x10 +- +-#define EEPROM_MAC_ADDR_92S 0x12 +- +-#define EEPROM_TSSI_A_92SE 0x74 +-#define EEPROM_TSSI_B_92SE 0x75 +- +-#define EEPROM_Version_92SE 0x7C +- +- +-#define EEPROM_VID_92SU 0x08 +-#define EEPROM_PID_92SU 0x0A +- +-#define EEPROM_Version_92SU 0x50 +-#define EEPROM_TSSI_A_92SU 0x6b +-#define EEPROM_TSSI_B_92SU 0x6c +- +-//==================================================== +-// EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS +-//==================================================== +-// 0x10 ~ 0x63 = TX power area. +-#define EEPROM_TX_PWR_INX_8723B 0x10 +- +-#define EEPROM_ChannelPlan_8723B 0xB8 +-#define EEPROM_XTAL_8723B 0xB9 +-#define EEPROM_THERMAL_METER_8723B 0xBA +-#define EEPROM_IQK_LCK_8723B 0xBB +-#define EEPROM_2G_5G_PA_TYPE_8723B 0xBC +-#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723B 0xBD +-#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723B 0xBF +- +-#define EEPROM_RF_BOARD_OPTION_8723B 0xC1 +-#define EEPROM_FEATURE_OPTION_8723B 0xC2 +-#define EEPROM_RF_BT_SETTING_8723B 0xC3 +-#define EEPROM_VERSION_8723B 0xC4 +-#define EEPROM_CustomID_8723B 0xC5 +-#define EEPROM_TX_BBSWING_2G_8723B 0xC6 +-#define EEPROM_TX_PWR_CALIBRATE_RATE_8723B 0xC8 +-#define EEPROM_RF_ANTENNA_OPT_8723B 0xC9 +-#define EEPROM_RFE_OPTION_8723B 0xCA +- +-// RTL8723BE +-#define EEPROM_MAC_ADDR_8723BE 0xD0 +-#define EEPROM_VID_8723BE 0xD6 +-#define EEPROM_DID_8723BE 0xD8 +-#define EEPROM_SVID_8723BE 0xDA +-#define EEPROM_SMID_8723BE 0xDC +- +-//RTL8723BU +-#define EEPROM_MAC_ADDR_8723BU 0x107 +-#define EEPROM_VID_8723BU 0x100 +-#define EEPROM_PID_8723BU 0x102 +-#define EEPROM_PA_TYPE_8723BU 0xBC +-#define EEPROM_LNA_TYPE_2G_8723BU 0xBD +- +-//RTL8723BS +-#define EEPROM_MAC_ADDR_8723BS 0x11A +-#define EEPROM_Voltage_ADDR_8723B 0x8 +- +- +-//==================================================== +-// EEPROM/Efuse Value Type +-//==================================================== +-#define EETYPE_TX_PWR 0x0 +-//==================================================== +-// EEPROM/Efuse Default Value +-//==================================================== +-#define EEPROM_CID_DEFAULT 0x0 +-#define EEPROM_CID_DEFAULT_EXT 0xFF // Reserved for Realtek +-#define EEPROM_CID_TOSHIBA 0x4 +-#define EEPROM_CID_CCX 0x10 +-#define EEPROM_CID_QMI 0x0D +-#define EEPROM_CID_WHQL 0xFE +- +-#define EEPROM_CHANNEL_PLAN_FCC 0x0 +-#define EEPROM_CHANNEL_PLAN_IC 0x1 +-#define EEPROM_CHANNEL_PLAN_ETSI 0x2 +-#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 +-#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 +-#define EEPROM_CHANNEL_PLAN_MKK 0x5 +-#define EEPROM_CHANNEL_PLAN_MKK1 0x6 +-#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 +-#define EEPROM_CHANNEL_PLAN_TELEC 0x8 +-#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 +-#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA +-#define EEPROM_CHANNEL_PLAN_NCC_TAIWAN 0xB +-#define EEPROM_CHANNEL_PLAN_CHIAN 0XC +-#define EEPROM_CHANNEL_PLAN_SINGAPORE_INDIA_MEXICO 0XD +-#define EEPROM_CHANNEL_PLAN_KOREA 0xE +-#define EEPROM_CHANNEL_PLAN_TURKEY 0xF +-#define EEPROM_CHANNEL_PLAN_JAPAN 0x10 +-#define EEPROM_CHANNEL_PLAN_FCC_NO_DFS 0x11 +-#define EEPROM_CHANNEL_PLAN_JAPAN_NO_DFS 0x12 +-#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_5G 0x13 +-#define EEPROM_CHANNEL_PLAN_TAIWAN_NO_DFS 0x14 +- +-#define EEPROM_USB_OPTIONAL1 0xE +-#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 +- +-#define RTL_EEPROM_ID 0x8129 +-#define EEPROM_Default_TSSI 0x0 +-#define EEPROM_Default_BoardType 0x02 +-#define EEPROM_Default_ThermalMeter 0x12 +-#define EEPROM_Default_ThermalMeter_92SU 0x7 +-#define EEPROM_Default_ThermalMeter_88E 0x18 +-#define EEPROM_Default_ThermalMeter_8812 0x18 +-#define EEPROM_Default_ThermalMeter_8192E 0x1A +-#define EEPROM_Default_ThermalMeter_8723B 0x18 +- +- +-#define EEPROM_Default_CrystalCap 0x0 +-#define EEPROM_Default_CrystalCap_8723A 0x20 +-#define EEPROM_Default_CrystalCap_88E 0x20 +-#define EEPROM_Default_CrystalCap_8812 0x20 +-#define EEPROM_Default_CrystalCap_8192E 0x20 +-#define EEPROM_Default_CrystalCap_8723B 0x20 +-#define EEPROM_Default_CrystalFreq 0x0 +-#define EEPROM_Default_TxPowerLevel_92C 0x22 +-#define EEPROM_Default_TxPowerLevel_2G 0x2C +-#define EEPROM_Default_TxPowerLevel_5G 0x22 +-#define EEPROM_Default_TxPowerLevel 0x22 +-#define EEPROM_Default_HT40_2SDiff 0x0 +-#define EEPROM_Default_HT20_Diff 2 +-#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 +-#define EEPROM_Default_LegacyHTTxPowerDiff_92C 0x3 +-#define EEPROM_Default_LegacyHTTxPowerDiff_92D 0x4 +-#define EEPROM_Default_HT40_PwrMaxOffset 0 +-#define EEPROM_Default_HT20_PwrMaxOffset 0 +- +-#define EEPROM_Default_PID 0x1234 +-#define EEPROM_Default_VID 0x5678 +-#define EEPROM_Default_CustomerID 0xAB +-#define EEPROM_Default_CustomerID_8188E 0x00 +-#define EEPROM_Default_SubCustomerID 0xCD +-#define EEPROM_Default_Version 0 +- +-#define EEPROM_Default_externalPA_C9 0x00 +-#define EEPROM_Default_externalPA_CC 0xFF +-#define EEPROM_Default_internalPA_SP3T_C9 0xAA +-#define EEPROM_Default_internalPA_SP3T_CC 0xAF +-#define EEPROM_Default_internalPA_SPDT_C9 0xAA +-#ifdef CONFIG_PCI_HCI +-#define EEPROM_Default_internalPA_SPDT_CC 0xA0 +-#else +-#define EEPROM_Default_internalPA_SPDT_CC 0xFA +-#endif +-#define EEPROM_Default_PAType 0 +-#define EEPROM_Default_LNAType 0 +- +-//New EFUSE deafult value +-#define EEPROM_DEFAULT_24G_INDEX 0x2D +-#define EEPROM_DEFAULT_24G_HT20_DIFF 0X02 +-#define EEPROM_DEFAULT_24G_OFDM_DIFF 0X04 +- +-#define EEPROM_DEFAULT_5G_INDEX 0X2A +-#define EEPROM_DEFAULT_5G_HT20_DIFF 0X00 +-#define EEPROM_DEFAULT_5G_OFDM_DIFF 0X04 +- +-#define EEPROM_DEFAULT_DIFF 0XFE +-#define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F +-#define EEPROM_DEFAULT_BOARD_OPTION 0x00 +-#define EEPROM_DEFAULT_RFE_OPTION 0x04 +-#define EEPROM_DEFAULT_FEATURE_OPTION 0x00 +-#define EEPROM_DEFAULT_BT_OPTION 0x10 +- +- +-#define EEPROM_DEFAULT_TX_CALIBRATE_RATE 0x00 +- +-// +-// For VHT series TX power by rate table. +-// VHT TX power by rate off setArray = +-// Band:-2G&5G = 0 / 1 +-// RF: at most 4*4 = ABCD=0/1/2/3 +-// CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 +-// +-#define TX_PWR_BY_RATE_NUM_BAND 2 +-#define TX_PWR_BY_RATE_NUM_RF 4 +-#define TX_PWR_BY_RATE_NUM_RATE 84 +- +-#define TXPWR_LMT_MAX_RF 4 +- +-//---------------------------------------------------------------------------- +-// EEPROM/EFUSE data structure definition. +-//---------------------------------------------------------------------------- +-#define MAX_RF_PATH_NUM 2 +-#define MAX_CHNL_GROUP 3+9 +-typedef struct _TxPowerInfo{ +- u8 CCKIndex[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; +- u8 HT40_1SIndex[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; +- u8 HT40_2SIndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; +- s8 HT20IndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; +- u8 OFDMIndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; +- u8 HT40MaxOffset[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; +- u8 HT20MaxOffset[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; +- u8 TSSI_A[3]; +- u8 TSSI_B[3]; +- u8 TSSI_A_5G[3]; //5GL/5GM/5GH +- u8 TSSI_B_5G[3]; +-}TxPowerInfo, *PTxPowerInfo; +- +- +-//For 88E new structure +- +-/* +-2.4G: +-{ +-{1,2}, +-{3,4,5}, +-{6,7,8}, +-{9,10,11}, +-{12,13}, +-{14} +-} +- +-5G: +-{ +-{36,38,40}, +-{44,46,48}, +-{52,54,56}, +-{60,62,64}, +-{100,102,104}, +-{108,110,112}, +-{116,118,120}, +-{124,126,128}, +-{132,134,136}, +-{140,142,144}, +-{149,151,153}, +-{157,159,161}, +-{173,175,177}, +-} +-*/ +-#define MAX_RF_PATH 4 +-#define RF_PATH_MAX MAX_RF_PATH +-#define MAX_CHNL_GROUP_24G 6 +-#define MAX_CHNL_GROUP_5G 14 +- +-//It must always set to 4, otherwise read efuse table secquence will be wrong. +-#define MAX_TX_COUNT 4 +- +-typedef struct _TxPowerInfo24G{ +- u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; +- u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; +- //If only one tx, only BW20 and OFDM are used. +- s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; +- s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; +- s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; +- s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; +-}TxPowerInfo24G, *PTxPowerInfo24G; +- +-typedef struct _TxPowerInfo5G{ +- u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G]; +- //If only one tx, only BW20, OFDM, BW80 and BW160 are used. +- s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; +- s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; +- s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; +- s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT]; +- s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT]; +-}TxPowerInfo5G, *PTxPowerInfo5G; +- +- +-typedef enum _BT_Ant_NUM{ +- Ant_x2 = 0, +- Ant_x1 = 1 +-} BT_Ant_NUM, *PBT_Ant_NUM; +- +-typedef enum _BT_CoType{ +- BT_2WIRE = 0, +- BT_ISSC_3WIRE = 1, +- BT_ACCEL = 2, +- BT_CSR_BC4 = 3, +- BT_CSR_BC8 = 4, +- BT_RTL8756 = 5, +- BT_RTL8723A = 6, +- BT_RTL8821 = 7, +- BT_RTL8723B = 8, +- BT_RTL8192E = 9, +- BT_RTL8813A = 10, +- BT_RTL8812A = 11 +-} BT_CoType, *PBT_CoType; +- +-typedef enum _BT_RadioShared{ +- BT_Radio_Shared = 0, +- BT_Radio_Individual = 1, +-} BT_RadioShared, *PBT_RadioShared; +- +- +-#endif ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __HAL_PG_H__ ++#define __HAL_PG_H__ ++ ++#define PPG_BB_GAIN_2G_TX_OFFSET_MASK 0x0F ++#define PPG_BB_GAIN_2G_TXB_OFFSET_MASK 0xF0 ++ ++#define PPG_BB_GAIN_5G_TX_OFFSET_MASK 0x1F ++#define PPG_THERMAL_OFFSET_MASK 0x1F ++#define KFREE_BB_GAIN_2G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) ++#define KFREE_BB_GAIN_5G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_5G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) ++#define KFREE_THERMAL_OFFSET(_ppg_v) (((_ppg_v) == PPG_THERMAL_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) ++ ++//==================================================== ++// EEPROM/Efuse PG Offset for 88EE/88EU/88ES ++//==================================================== ++#define EEPROM_TX_PWR_INX_88E 0x10 ++ ++#define EEPROM_ChannelPlan_88E 0xB8 ++#define EEPROM_XTAL_88E 0xB9 ++#define EEPROM_THERMAL_METER_88E 0xBA ++#define EEPROM_IQK_LCK_88E 0xBB ++ ++#define EEPROM_RF_BOARD_OPTION_88E 0xC1 ++#define EEPROM_RF_FEATURE_OPTION_88E 0xC2 ++#define EEPROM_RF_BT_SETTING_88E 0xC3 ++#define EEPROM_VERSION_88E 0xC4 ++#define EEPROM_CustomID_88E 0xC5 ++#define EEPROM_RF_ANTENNA_OPT_88E 0xC9 ++#define EEPROM_COUNTRY_CODE_88E 0xCB ++ ++// RTL88EE ++#define EEPROM_MAC_ADDR_88EE 0xD0 ++#define EEPROM_VID_88EE 0xD6 ++#define EEPROM_DID_88EE 0xD8 ++#define EEPROM_SVID_88EE 0xDA ++#define EEPROM_SMID_88EE 0xDC ++ ++//RTL88EU ++#define EEPROM_MAC_ADDR_88EU 0xD7 ++#define EEPROM_VID_88EU 0xD0 ++#define EEPROM_PID_88EU 0xD2 ++#define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 //8188EU,8192EU, 8812AU is the same ++#define EEPROM_USB_OPTIONAL_FUNCTION0_8811AU 0x104 ++ ++// RTL88ES ++#define EEPROM_MAC_ADDR_88ES 0x11A ++//==================================================== ++// EEPROM/Efuse PG Offset for 8192EE/8192EU/8192ES ++//==================================================== ++#define GET_PG_KFREE_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) ++#define GET_PG_KFREE_THERMAL_K_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) ++ ++#define PPG_BB_GAIN_2G_TXA_OFFSET_8192E 0x1F6 ++#define PPG_THERMAL_OFFSET_8192E 0x1F5 ++ ++// 0x10 ~ 0x63 = TX power area. ++#define EEPROM_TX_PWR_INX_8192E 0x10 ++ ++#define EEPROM_ChannelPlan_8192E 0xB8 ++#define EEPROM_XTAL_8192E 0xB9 ++#define EEPROM_THERMAL_METER_8192E 0xBA ++#define EEPROM_IQK_LCK_8192E 0xBB ++#define EEPROM_2G_5G_PA_TYPE_8192E 0xBC ++#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192E 0xBD ++#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192E 0xBF ++ ++#define EEPROM_RF_BOARD_OPTION_8192E 0xC1 ++#define EEPROM_RF_FEATURE_OPTION_8192E 0xC2 ++#define EEPROM_RF_BT_SETTING_8192E 0xC3 ++#define EEPROM_VERSION_8192E 0xC4 ++#define EEPROM_CustomID_8192E 0xC5 ++#define EEPROM_TX_BBSWING_2G_8192E 0xC6 ++#define EEPROM_TX_BBSWING_5G_8192E 0xC7 ++#define EEPROM_TX_PWR_CALIBRATE_RATE_8192E 0xC8 ++#define EEPROM_RF_ANTENNA_OPT_8192E 0xC9 ++#define EEPROM_RFE_OPTION_8192E 0xCA ++#define EEPROM_RFE_OPTION_8188E 0xCA ++#define EEPROM_COUNTRY_CODE_8192E 0xCB ++ ++// RTL8192EE ++#define EEPROM_MAC_ADDR_8192EE 0xD0 ++#define EEPROM_VID_8192EE 0xD6 ++#define EEPROM_DID_8192EE 0xD8 ++#define EEPROM_SVID_8192EE 0xDA ++#define EEPROM_SMID_8192EE 0xDC ++ ++//RTL8192EU ++#define EEPROM_MAC_ADDR_8192EU 0xD7 ++#define EEPROM_VID_8192EU 0xD0 ++#define EEPROM_PID_8192EU 0xD2 ++#define EEPROM_PA_TYPE_8192EU 0xBC ++#define EEPROM_LNA_TYPE_2G_8192EU 0xBD ++#define EEPROM_LNA_TYPE_5G_8192EU 0xBF ++ ++// RTL8192ES ++#define EEPROM_MAC_ADDR_8192ES 0x11A ++//==================================================== ++// EEPROM/Efuse PG Offset for 8812AE/8812AU/8812AS ++//==================================================== ++// 0x10 ~ 0x63 = TX power area. ++#define EEPROM_USB_MODE_8812 0x08 ++#define EEPROM_TX_PWR_INX_8812 0x10 ++ ++#define EEPROM_ChannelPlan_8812 0xB8 ++#define EEPROM_XTAL_8812 0xB9 ++#define EEPROM_THERMAL_METER_8812 0xBA ++#define EEPROM_IQK_LCK_8812 0xBB ++#define EEPROM_2G_5G_PA_TYPE_8812 0xBC ++#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8812 0xBD ++#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8812 0xBF ++ ++#define EEPROM_RF_BOARD_OPTION_8812 0xC1 ++#define EEPROM_RF_FEATURE_OPTION_8812 0xC2 ++#define EEPROM_RF_BT_SETTING_8812 0xC3 ++#define EEPROM_VERSION_8812 0xC4 ++#define EEPROM_CustomID_8812 0xC5 ++#define EEPROM_TX_BBSWING_2G_8812 0xC6 ++#define EEPROM_TX_BBSWING_5G_8812 0xC7 ++#define EEPROM_TX_PWR_CALIBRATE_RATE_8812 0xC8 ++#define EEPROM_RF_ANTENNA_OPT_8812 0xC9 ++#define EEPROM_RFE_OPTION_8812 0xCA ++#define EEPROM_COUNTRY_CODE_8812 0xCB ++ ++// RTL8812AE ++#define EEPROM_MAC_ADDR_8812AE 0xD0 ++#define EEPROM_VID_8812AE 0xD6 ++#define EEPROM_DID_8812AE 0xD8 ++#define EEPROM_SVID_8812AE 0xDA ++#define EEPROM_SMID_8812AE 0xDC ++ ++//RTL8812AU ++#define EEPROM_MAC_ADDR_8812AU 0xD7 ++#define EEPROM_VID_8812AU 0xD0 ++#define EEPROM_PID_8812AU 0xD2 ++#define EEPROM_PA_TYPE_8812AU 0xBC ++#define EEPROM_LNA_TYPE_2G_8812AU 0xBD ++#define EEPROM_LNA_TYPE_5G_8812AU 0xBF ++ ++//RTL8814AU ++#define EEPROM_MAC_ADDR_8814AU 0xD8 ++#define EEPROM_VID_8814AU 0xD0 ++#define EEPROM_PID_8814AU 0xD2 ++#define EEPROM_PA_TYPE_8814AU 0xBC ++#define EEPROM_LNA_TYPE_2G_8814AU 0xBD ++#define EEPROM_LNA_TYPE_5G_8814AU 0xBF ++ ++/* RTL8814AE */ ++#define EEPROM_MAC_ADDR_8814AE 0xD0 ++#define EEPROM_VID_8814AE 0xD6 ++#define EEPROM_DID_8814AE 0xD8 ++#define EEPROM_SVID_8814AE 0xDA ++#define EEPROM_SMID_8814AE 0xDC ++ ++//==================================================== ++// EEPROM/Efuse PG Offset for 8814AU ++//==================================================== ++#define GET_PG_KFREE_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) ++#define GET_PG_KFREE_THERMAL_K_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) ++#define GET_PG_TX_POWER_TRACKING_MODE_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 6, 2) ++ ++#define KFREE_GAIN_DATA_LENGTH_8814A 22 ++ ++#define PPG_BB_GAIN_2G_TXBA_OFFSET_8814A 0x3EE ++ ++#define PPG_THERMAL_OFFSET_8814A 0x3EF ++ ++#define EEPROM_TX_PWR_INX_8814 0x10 ++#define EEPROM_ChannelPlan_8814 0xB8 ++#define EEPROM_XTAL_8814 0xB9 ++#define EEPROM_THERMAL_METER_8814 0xBA ++#define EEPROM_IQK_LCK_8814 0xBB ++ ++ ++#define EEPROM_PA_TYPE_8814 0xBC ++#define EEPROM_LNA_TYPE_AB_2G_8814 0xBD ++#define EEPROM_LNA_TYPE_CD_2G_8814 0xBE ++#define EEPROM_LNA_TYPE_AB_5G_8814 0xBF ++#define EEPROM_LNA_TYPE_CD_5G_8814 0xC0 ++#define EEPROM_RF_BOARD_OPTION_8814 0xC1 ++#define EEPROM_RF_BT_SETTING_8814 0xC3 ++#define EEPROM_VERSION_8814 0xC4 ++#define EEPROM_CustomID_8814 0xC5 ++#define EEPROM_TX_BBSWING_2G_8814 0xC6 ++#define EEPROM_TX_BBSWING_5G_8814 0xC7 ++#define EEPROM_TRX_ANTENNA_OPTION_8814 0xC9 ++#define EEPROM_RFE_OPTION_8814 0xCA ++#define EEPROM_COUNTRY_CODE_8814 0xCB ++ ++/*Extra Info for 8814A Initial Gain Fine Tune suggested by Willis, JIRA: MP123*/ ++#define EEPROM_IG_OFFSET_4_AB_2G_8814A 0x120 ++#define EEPROM_IG_OFFSET_4_CD_2G_8814A 0x121 ++#define EEPROM_IG_OFFSET_4_AB_5GL_8814A 0x122 ++#define EEPROM_IG_OFFSET_4_CD_5GL_8814A 0x123 ++#define EEPROM_IG_OFFSET_4_AB_5GM_8814A 0x124 ++#define EEPROM_IG_OFFSET_4_CD_5GM_8814A 0x125 ++#define EEPROM_IG_OFFSET_4_AB_5GH_8814A 0x126 ++#define EEPROM_IG_OFFSET_4_CD_5GH_8814A 0x127 ++ ++//==================================================== ++// EEPROM/Efuse PG Offset for 8821AE/8821AU/8821AS ++//==================================================== ++ ++#define GET_PG_KFREE_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) ++#define GET_PG_KFREE_THERMAL_K_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) ++ ++#define PPG_BB_GAIN_2G_TXA_OFFSET_8821A 0x1F6 ++#define PPG_THERMAL_OFFSET_8821A 0x1F5 ++#define PPG_BB_GAIN_5GLB1_TXA_OFFSET_8821A 0x1F4 ++#define PPG_BB_GAIN_5GLB2_TXA_OFFSET_8821A 0x1F3 ++#define PPG_BB_GAIN_5GMB1_TXA_OFFSET_8821A 0x1F2 ++#define PPG_BB_GAIN_5GMB2_TXA_OFFSET_8821A 0x1F1 ++#define PPG_BB_GAIN_5GHB_TXA_OFFSET_8821A 0x1F0 ++ ++#define EEPROM_TX_PWR_INX_8821 0x10 ++ ++#define EEPROM_ChannelPlan_8821 0xB8 ++#define EEPROM_XTAL_8821 0xB9 ++#define EEPROM_THERMAL_METER_8821 0xBA ++#define EEPROM_IQK_LCK_8821 0xBB ++ ++ ++#define EEPROM_RF_BOARD_OPTION_8821 0xC1 ++#define EEPROM_RF_FEATURE_OPTION_8821 0xC2 ++#define EEPROM_RF_BT_SETTING_8821 0xC3 ++#define EEPROM_VERSION_8821 0xC4 ++#define EEPROM_CustomID_8821 0xC5 ++#define EEPROM_RF_ANTENNA_OPT_8821 0xC9 ++ ++// RTL8821AE ++#define EEPROM_MAC_ADDR_8821AE 0xD0 ++#define EEPROM_VID_8821AE 0xD6 ++#define EEPROM_DID_8821AE 0xD8 ++#define EEPROM_SVID_8821AE 0xDA ++#define EEPROM_SMID_8821AE 0xDC ++ ++//RTL8821AU ++#define EEPROM_PA_TYPE_8821AU 0xBC ++#define EEPROM_LNA_TYPE_8821AU 0xBF ++ ++// RTL8821AS ++#define EEPROM_MAC_ADDR_8821AS 0x11A ++ ++//RTL8821AU ++#define EEPROM_MAC_ADDR_8821AU 0x107 ++#define EEPROM_VID_8821AU 0x100 ++#define EEPROM_PID_8821AU 0x102 ++ ++ ++//==================================================== ++// EEPROM/Efuse PG Offset for 8192 SE/SU ++//==================================================== ++#define EEPROM_VID_92SE 0x0A ++#define EEPROM_DID_92SE 0x0C ++#define EEPROM_SVID_92SE 0x0E ++#define EEPROM_SMID_92SE 0x10 ++ ++#define EEPROM_MAC_ADDR_92S 0x12 ++ ++#define EEPROM_TSSI_A_92SE 0x74 ++#define EEPROM_TSSI_B_92SE 0x75 ++ ++#define EEPROM_Version_92SE 0x7C ++ ++ ++#define EEPROM_VID_92SU 0x08 ++#define EEPROM_PID_92SU 0x0A ++ ++#define EEPROM_Version_92SU 0x50 ++#define EEPROM_TSSI_A_92SU 0x6b ++#define EEPROM_TSSI_B_92SU 0x6c ++ ++/* ==================================================== ++ EEPROM/Efuse PG Offset for 8188FE/8188FU/8188FS ++ ==================================================== ++ */ ++ ++#define GET_PG_KFREE_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) ++#define GET_PG_KFREE_THERMAL_K_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) ++ ++#define PPG_BB_GAIN_2G_TXA_OFFSET_8188F 0xEE ++#define PPG_THERMAL_OFFSET_8188F 0xEF ++ ++/* 0x10 ~ 0x63 = TX power area. */ ++#define EEPROM_TX_PWR_INX_8188F 0x10 ++ ++#define EEPROM_ChannelPlan_8188F 0xB8 ++#define EEPROM_XTAL_8188F 0xB9 ++#define EEPROM_THERMAL_METER_8188F 0xBA ++#define EEPROM_IQK_LCK_8188F 0xBB ++#define EEPROM_2G_5G_PA_TYPE_8188F 0xBC ++#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188F 0xBD ++#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188F 0xBF ++ ++#define EEPROM_RF_BOARD_OPTION_8188F 0xC1 ++#define EEPROM_FEATURE_OPTION_8188F 0xC2 ++#define EEPROM_RF_BT_SETTING_8188F 0xC3 ++#define EEPROM_VERSION_8188F 0xC4 ++#define EEPROM_CustomID_8188F 0xC5 ++#define EEPROM_TX_BBSWING_2G_8188F 0xC6 ++#define EEPROM_TX_PWR_CALIBRATE_RATE_8188F 0xC8 ++#define EEPROM_RF_ANTENNA_OPT_8188F 0xC9 ++#define EEPROM_RFE_OPTION_8188F 0xCA ++#define EEPROM_COUNTRY_CODE_8188F 0xCB ++#define EEPROM_CUSTOMER_ID_8188F 0x7F ++#define EEPROM_SUBCUSTOMER_ID_8188F 0x59 ++ ++/* RTL8188FU */ ++#define EEPROM_MAC_ADDR_8188FU 0xD7 ++#define EEPROM_VID_8188FU 0xD0 ++#define EEPROM_PID_8188FU 0xD2 ++#define EEPROM_PA_TYPE_8188FU 0xBC ++#define EEPROM_LNA_TYPE_2G_8188FU 0xBD ++#define EEPROM_USB_OPTIONAL_FUNCTION0_8188FU 0xD4 ++ ++/* RTL8188FS */ ++#define EEPROM_MAC_ADDR_8188FS 0x11A ++#define EEPROM_Voltage_ADDR_8188F 0x8 ++ ++//==================================================== ++// EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS ++//==================================================== ++// 0x10 ~ 0x63 = TX power area. ++#define EEPROM_TX_PWR_INX_8723B 0x10 ++ ++#define EEPROM_ChannelPlan_8723B 0xB8 ++#define EEPROM_XTAL_8723B 0xB9 ++#define EEPROM_THERMAL_METER_8723B 0xBA ++#define EEPROM_IQK_LCK_8723B 0xBB ++#define EEPROM_2G_5G_PA_TYPE_8723B 0xBC ++#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723B 0xBD ++#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723B 0xBF ++ ++#define EEPROM_RF_BOARD_OPTION_8723B 0xC1 ++#define EEPROM_FEATURE_OPTION_8723B 0xC2 ++#define EEPROM_RF_BT_SETTING_8723B 0xC3 ++#define EEPROM_VERSION_8723B 0xC4 ++#define EEPROM_CustomID_8723B 0xC5 ++#define EEPROM_TX_BBSWING_2G_8723B 0xC6 ++#define EEPROM_TX_PWR_CALIBRATE_RATE_8723B 0xC8 ++#define EEPROM_RF_ANTENNA_OPT_8723B 0xC9 ++#define EEPROM_RFE_OPTION_8723B 0xCA ++#define EEPROM_COUNTRY_CODE_8723B 0xCB ++ ++// RTL8723BE ++#define EEPROM_MAC_ADDR_8723BE 0xD0 ++#define EEPROM_VID_8723BE 0xD6 ++#define EEPROM_DID_8723BE 0xD8 ++#define EEPROM_SVID_8723BE 0xDA ++#define EEPROM_SMID_8723BE 0xDC ++ ++//RTL8723BU ++#define EEPROM_MAC_ADDR_8723BU 0x107 ++#define EEPROM_VID_8723BU 0x100 ++#define EEPROM_PID_8723BU 0x102 ++#define EEPROM_PA_TYPE_8723BU 0xBC ++#define EEPROM_LNA_TYPE_2G_8723BU 0xBD ++ ++ ++//RTL8723BS ++#define EEPROM_MAC_ADDR_8723BS 0x11A ++#define EEPROM_Voltage_ADDR_8723B 0x8 ++ ++//==================================================== ++/* EEPROM/Efuse PG Offset for 8703B */ ++//==================================================== ++#define GET_PG_KFREE_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) ++#define GET_PG_KFREE_THERMAL_K_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) ++ ++#define PPG_BB_GAIN_2G_TXA_OFFSET_8703B 0xEE ++#define PPG_THERMAL_OFFSET_8703B 0xEF ++ ++#define EEPROM_TX_PWR_INX_8703B 0x10 ++ ++#define EEPROM_ChannelPlan_8703B 0xB8 ++#define EEPROM_XTAL_8703B 0xB9 ++#define EEPROM_THERMAL_METER_8703B 0xBA ++#define EEPROM_IQK_LCK_8703B 0xBB ++#define EEPROM_2G_5G_PA_TYPE_8703B 0xBC ++#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8703B 0xBD ++#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8703B 0xBF ++ ++#define EEPROM_RF_BOARD_OPTION_8703B 0xC1 ++#define EEPROM_FEATURE_OPTION_8703B 0xC2 ++#define EEPROM_RF_BT_SETTING_8703B 0xC3 ++#define EEPROM_VERSION_8703B 0xC4 ++#define EEPROM_CustomID_8703B 0xC5 ++#define EEPROM_TX_BBSWING_2G_8703B 0xC6 ++#define EEPROM_TX_PWR_CALIBRATE_RATE_8703B 0xC8 ++#define EEPROM_RF_ANTENNA_OPT_8703B 0xC9 ++#define EEPROM_RFE_OPTION_8703B 0xCA ++#define EEPROM_COUNTRY_CODE_8703B 0xCB ++ ++/* MAC Hidden */ ++#define PPG_MAC_HIDDEN_START_8703B 0xF0 ++#define PPG_MAC_HIDDEN_END_8703B 0xFF ++#define EEPROM_HCI_AND_PACKAGE_TYPE_8703B 0xF8 ++#define EEPROM_WL_FUNC_CAP_8703B 0xF9 ++#define EEPROM_BW_AND_ANT_NUM_CAP_8703B 0xFB ++#define GET_PMH_HCI_TYPE_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_HCI_AND_PACKAGE_TYPE_8703B - PPG_MAC_HIDDEN_START_8703B, 0, 4) ++#define GET_PMH_PACKAGE_TYPE_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_HCI_AND_PACKAGE_TYPE_8703B - PPG_MAC_HIDDEN_START_8703B, 4, 4) ++#define GET_PMH_WL_FUNC_CAP_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_WL_FUNC_CAP_8703B - PPG_MAC_HIDDEN_START_8703B, 0, 4) ++#define GET_PMH_BW_CAP_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_BW_AND_ANT_NUM_CAP_8703B - PPG_MAC_HIDDEN_START_8703B, 0, 3) ++#define GET_PMH_ANT_NUM_CAP_8703B(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_BW_AND_ANT_NUM_CAP_8703B - PPG_MAC_HIDDEN_START_8703B, 5, 3) ++ ++/* RTL8703BU */ ++#define EEPROM_MAC_ADDR_8703BU 0x107 ++#define EEPROM_VID_8703BU 0x100 ++#define EEPROM_PID_8703BU 0x102 ++#define EEPROM_USB_OPTIONAL_FUNCTION0_8703BU 0x104 ++#define EEPROM_PA_TYPE_8703BU 0xBC ++#define EEPROM_LNA_TYPE_2G_8703BU 0xBD ++ ++//RTL8703BS ++#define EEPROM_MAC_ADDR_8703BS 0x11A ++#define EEPROM_Voltage_ADDR_8703B 0x8 ++ ++//==================================================== ++// EEPROM/Efuse Value Type ++//==================================================== ++#define EETYPE_TX_PWR 0x0 ++//==================================================== ++// EEPROM/Efuse Default Value ++//==================================================== ++#define EEPROM_CID_DEFAULT 0x0 ++#define EEPROM_CID_DEFAULT_EXT 0xFF // Reserved for Realtek ++#define EEPROM_CID_TOSHIBA 0x4 ++#define EEPROM_CID_CCX 0x10 ++#define EEPROM_CID_QMI 0x0D ++#define EEPROM_CID_WHQL 0xFE ++ ++#define EEPROM_CHANNEL_PLAN_FCC 0x0 ++#define EEPROM_CHANNEL_PLAN_IC 0x1 ++#define EEPROM_CHANNEL_PLAN_ETSI 0x2 ++#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 ++#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 ++#define EEPROM_CHANNEL_PLAN_MKK 0x5 ++#define EEPROM_CHANNEL_PLAN_MKK1 0x6 ++#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 ++#define EEPROM_CHANNEL_PLAN_TELEC 0x8 ++#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA ++#define EEPROM_CHANNEL_PLAN_NCC_TAIWAN 0xB ++#define EEPROM_CHANNEL_PLAN_CHIAN 0XC ++#define EEPROM_CHANNEL_PLAN_SINGAPORE_INDIA_MEXICO 0XD ++#define EEPROM_CHANNEL_PLAN_KOREA 0xE ++#define EEPROM_CHANNEL_PLAN_TURKEY 0xF ++#define EEPROM_CHANNEL_PLAN_JAPAN 0x10 ++#define EEPROM_CHANNEL_PLAN_FCC_NO_DFS 0x11 ++#define EEPROM_CHANNEL_PLAN_JAPAN_NO_DFS 0x12 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_5G 0x13 ++#define EEPROM_CHANNEL_PLAN_TAIWAN_NO_DFS 0x14 ++ ++#define EEPROM_USB_OPTIONAL1 0xE ++#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 ++ ++#define RTL_EEPROM_ID 0x8129 ++#define EEPROM_Default_TSSI 0x0 ++#define EEPROM_Default_BoardType 0x02 ++#define EEPROM_Default_ThermalMeter 0x12 ++#define EEPROM_Default_ThermalMeter_92SU 0x7 ++#define EEPROM_Default_ThermalMeter_88E 0x18 ++#define EEPROM_Default_ThermalMeter_8812 0x18 ++#define EEPROM_Default_ThermalMeter_8192E 0x1A ++#define EEPROM_Default_ThermalMeter_8723B 0x18 ++#define EEPROM_Default_ThermalMeter_8703B 0x18 ++#define EEPROM_Default_ThermalMeter_8188F 0x18 ++#define EEPROM_Default_ThermalMeter_8814A 0x18 ++ ++ ++#define EEPROM_Default_CrystalCap 0x0 ++#define EEPROM_Default_CrystalCap_8723A 0x20 ++#define EEPROM_Default_CrystalCap_88E 0x20 ++#define EEPROM_Default_CrystalCap_8812 0x20 ++#define EEPROM_Default_CrystalCap_8814 0x20 ++#define EEPROM_Default_CrystalCap_8192E 0x20 ++#define EEPROM_Default_CrystalCap_8723B 0x20 ++#define EEPROM_Default_CrystalCap_8703B 0x20 ++#define EEPROM_Default_CrystalCap_8188F 0x20 ++#define EEPROM_Default_CrystalFreq 0x0 ++#define EEPROM_Default_TxPowerLevel_92C 0x22 ++#define EEPROM_Default_TxPowerLevel_2G 0x2C ++#define EEPROM_Default_TxPowerLevel_5G 0x22 ++#define EEPROM_Default_TxPowerLevel 0x22 ++#define EEPROM_Default_HT40_2SDiff 0x0 ++#define EEPROM_Default_HT20_Diff 2 ++#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 ++#define EEPROM_Default_LegacyHTTxPowerDiff_92C 0x3 ++#define EEPROM_Default_LegacyHTTxPowerDiff_92D 0x4 ++#define EEPROM_Default_HT40_PwrMaxOffset 0 ++#define EEPROM_Default_HT20_PwrMaxOffset 0 ++ ++#define EEPROM_Default_PID 0x1234 ++#define EEPROM_Default_VID 0x5678 ++#define EEPROM_Default_CustomerID 0xAB ++#define EEPROM_Default_CustomerID_8188E 0x00 ++#define EEPROM_Default_SubCustomerID 0xCD ++#define EEPROM_Default_Version 0 ++ ++#define EEPROM_Default_externalPA_C9 0x00 ++#define EEPROM_Default_externalPA_CC 0xFF ++#define EEPROM_Default_internalPA_SP3T_C9 0xAA ++#define EEPROM_Default_internalPA_SP3T_CC 0xAF ++#define EEPROM_Default_internalPA_SPDT_C9 0xAA ++#ifdef CONFIG_PCI_HCI ++#define EEPROM_Default_internalPA_SPDT_CC 0xA0 ++#else ++#define EEPROM_Default_internalPA_SPDT_CC 0xFA ++#endif ++#define EEPROM_Default_PAType 0 ++#define EEPROM_Default_LNAType 0 ++ ++//New EFUSE deafult value ++#define EEPROM_DEFAULT_24G_INDEX 0x2D ++#define EEPROM_DEFAULT_24G_HT20_DIFF 0X02 ++#define EEPROM_DEFAULT_24G_OFDM_DIFF 0X04 ++ ++#define EEPROM_DEFAULT_5G_INDEX 0X2A ++#define EEPROM_DEFAULT_5G_HT20_DIFF 0X00 ++#define EEPROM_DEFAULT_5G_OFDM_DIFF 0X04 ++ ++#define EEPROM_DEFAULT_DIFF 0XFE ++#define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F ++#define EEPROM_DEFAULT_BOARD_OPTION 0x00 ++#define EEPROM_DEFAULT_RFE_OPTION_8192E 0xFF ++#define EEPROM_DEFAULT_RFE_OPTION_8188E 0xFF ++#define EEPROM_DEFAULT_RFE_OPTION 0x04 ++#define EEPROM_DEFAULT_FEATURE_OPTION 0x00 ++#define EEPROM_DEFAULT_BT_OPTION 0x10 ++ ++ ++#define EEPROM_DEFAULT_TX_CALIBRATE_RATE 0x00 ++ ++// PCIe related ++#define EEPROM_PCIE_DEV_CAP_01 0xE0 // Express device capability in PCIe configuration space, i.e., map to offset 0x74 ++#define EEPROM_PCIE_DEV_CAP_02 0xE1 // Express device capability in PCIe configuration space, i.e., map to offset 0x75 ++ ++ ++// ++// For VHT series TX power by rate table. ++// VHT TX power by rate off setArray = ++// Band:-2G&5G = 0 / 1 ++// RF: at most 4*4 = ABCD=0/1/2/3 ++// CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 ++// ++#define TX_PWR_BY_RATE_NUM_BAND 2 ++#define TX_PWR_BY_RATE_NUM_RF 4 ++#define TX_PWR_BY_RATE_NUM_RATE 84 ++ ++#define TXPWR_LMT_MAX_RF 4 ++ ++//---------------------------------------------------------------------------- ++// EEPROM/EFUSE data structure definition. ++//---------------------------------------------------------------------------- ++ ++//For 88E new structure ++ ++/* ++2.4G: ++{ ++{1,2}, ++{3,4,5}, ++{6,7,8}, ++{9,10,11}, ++{12,13}, ++{14} ++} ++ ++5G: ++{ ++{36,38,40}, ++{44,46,48}, ++{52,54,56}, ++{60,62,64}, ++{100,102,104}, ++{108,110,112}, ++{116,118,120}, ++{124,126,128}, ++{132,134,136}, ++{140,142,144}, ++{149,151,153}, ++{157,159,161}, ++{173,175,177}, ++} ++*/ ++#define MAX_RF_PATH 4 ++#define RF_PATH_MAX MAX_RF_PATH ++#define MAX_CHNL_GROUP_24G 6 ++#define MAX_CHNL_GROUP_5G 14 ++ ++//It must always set to 4, otherwise read efuse table secquence will be wrong. ++#define MAX_TX_COUNT 4 ++ ++typedef struct _TxPowerInfo24G{ ++ u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; ++ u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; ++ //If only one tx, only BW20 and OFDM are used. ++ s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++}TxPowerInfo24G, *PTxPowerInfo24G; ++ ++typedef struct _TxPowerInfo5G{ ++ u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G]; ++ //If only one tx, only BW20, OFDM, BW80 and BW160 are used. ++ s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++ s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT]; ++}TxPowerInfo5G, *PTxPowerInfo5G; ++ ++ ++typedef enum _BT_Ant_NUM{ ++ Ant_x2 = 0, ++ Ant_x1 = 1 ++} BT_Ant_NUM, *PBT_Ant_NUM; ++ ++typedef enum _BT_CoType{ ++ BT_2WIRE = 0, ++ BT_ISSC_3WIRE = 1, ++ BT_ACCEL = 2, ++ BT_CSR_BC4 = 3, ++ BT_CSR_BC8 = 4, ++ BT_RTL8756 = 5, ++ BT_RTL8723A = 6, ++ BT_RTL8821 = 7, ++ BT_RTL8723B = 8, ++ BT_RTL8192E = 9, ++ BT_RTL8814A = 10, ++ BT_RTL8812A = 11, ++ BT_RTL8703B = 12 ++} BT_CoType, *PBT_CoType; ++ ++typedef enum _BT_RadioShared{ ++ BT_Radio_Shared = 0, ++ BT_Radio_Individual = 1, ++} BT_RadioShared, *PBT_RadioShared; ++ ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_phy.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_phy.h +old mode 100755 +new mode 100644 +index 371f8cf..56b50c8 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_phy.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_phy.h +@@ -56,13 +56,6 @@ + + + /*--------------------------Define Parameters-------------------------------*/ +-typedef enum _BAND_TYPE{ +- BAND_ON_2_4G = 0, +- BAND_ON_5G, +- BAND_ON_BOTH, +- BANDMAX +-}BAND_TYPE,*PBAND_TYPE; +- + typedef enum _RF_TYPE{ + RF_TYPE_MIN = 0, // 0 + RF_8225=1, // 1 11b/g RF for verification only +@@ -73,13 +66,6 @@ typedef enum _RF_TYPE{ + RF_TYPE_MAX + }RF_TYPE_E,*PRF_TYPE_E; + +-typedef enum _RF_PATH{ +- RF_PATH_A = 0, +- RF_PATH_B, +- RF_PATH_C, +- RF_PATH_D +-}RF_PATH, *PRF_PATH; +- + #define TX_1S 0 + #define TX_2S 1 + #define TX_3S 2 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_phy_reg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_phy_reg.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_sdio.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/hal_sdio.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ieee80211.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ieee80211.h +old mode 100755 +new mode 100644 +index 5dfc421..8ed08a9 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ieee80211.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ieee80211.h +@@ -166,6 +166,10 @@ typedef enum _RATEID_IDX_ { + RATEID_IDX_B = 8, + RATEID_IDX_VHT_2SS = 9, + RATEID_IDX_VHT_1SS = 10, ++ RATEID_IDX_MIX1 = 11, ++ RATEID_IDX_MIX2 = 12, ++ RATEID_IDX_VHT_3SS = 13, ++ RATEID_IDX_BGN_3SS = 14, + } RATEID_IDX, *PRATEID_IDX; + + typedef enum _RATR_TABLE_MODE{ +@@ -207,13 +211,13 @@ enum NETWORK_TYPE + //Type for registry default wireless mode + WIRELESS_11AGN = (WIRELESS_11A|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N), // tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only + WIRELESS_11ABGN = (WIRELESS_11A|WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N), +- WIRELESS_MODE_24G = (WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11AC), ++ WIRELESS_MODE_24G = (WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N), + WIRELESS_MODE_5G = (WIRELESS_11A|WIRELESS_11_5N|WIRELESS_11AC), + WIRELESS_MODE_MAX = (WIRELESS_11A|WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N|WIRELESS_11AC), + }; + +-#define SUPPORTED_24G_NETTYPE_MSK (WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N) +-#define SUPPORTED_5G_NETTYPE_MSK (WIRELESS_11A | WIRELESS_11_5N) ++#define SUPPORTED_24G_NETTYPE_MSK WIRELESS_MODE_24G ++#define SUPPORTED_5G_NETTYPE_MSK WIRELESS_MODE_5G + + #define IsLegacyOnly(NetType) ((NetType) == ((NetType) & (WIRELESS_11BG|WIRELESS_11A))) + +@@ -836,11 +840,81 @@ enum MGN_RATE{ + MGN_UNKNOWN + }; + +-#define IS_HT_RATE(_rate) (_rate >= MGN_MCS0 && _rate <= MGN_MCS31) +-#define IS_VHT_RATE(_rate) (_rate >= MGN_VHT1SS_MCS0 && _rate <= MGN_VHT4SS_MCS9) +-#define IS_CCK_RATE(_rate) (MGN_1M == _rate || _rate == MGN_2M || _rate == MGN_5_5M || _rate == MGN_11M ) +-#define IS_OFDM_RATE(_rate) (MGN_6M <= _rate && _rate <= MGN_54M && _rate != MGN_11M) ++#define IS_HT_RATE(_rate) ((_rate) >= MGN_MCS0 && (_rate) <= MGN_MCS31) ++#define IS_VHT_RATE(_rate) ((_rate) >= MGN_VHT1SS_MCS0 && (_rate) <= MGN_VHT4SS_MCS9) ++#define IS_CCK_RATE(_rate) ((_rate) == MGN_1M || (_rate) == MGN_2M || (_rate) == MGN_5_5M || (_rate) == MGN_11M) ++#define IS_OFDM_RATE(_rate) ((_rate) >= MGN_6M && (_rate) <= MGN_54M && (_rate) != MGN_11M) ++ ++#define IS_HT1SS_RATE(_rate) ((_rate) >= MGN_MCS0 && (_rate) <= MGN_MCS7) ++#define IS_HT2SS_RATE(_rate) ((_rate) >= MGN_MCS8 && (_rate) <= MGN_MCS15) ++#define IS_HT3SS_RATE(_rate) ((_rate) >= MGN_MCS16 && (_rate) <= MGN_MCS23) ++#define IS_HT4SS_RATE(_rate) ((_rate) >= MGN_MCS24 && (_rate) <= MGN_MCS31) ++ ++#define IS_VHT1SS_RATE(_rate) ((_rate) >= MGN_VHT1SS_MCS0 && (_rate) <= MGN_VHT1SS_MCS9) ++#define IS_VHT2SS_RATE(_rate) ((_rate) >= MGN_VHT2SS_MCS0 && (_rate) <= MGN_VHT2SS_MCS9) ++#define IS_VHT3SS_RATE(_rate) ((_rate) >= MGN_VHT3SS_MCS0 && (_rate) <= MGN_VHT3SS_MCS9) ++#define IS_VHT4SS_RATE(_rate) ((_rate) >= MGN_VHT4SS_MCS0 && (_rate) <= MGN_VHT4SS_MCS9) ++ ++#define IS_1T_RATE(_rate) (IS_CCK_RATE((_rate)) || IS_OFDM_RATE((_rate)) || IS_HT1SS_RATE((_rate)) || IS_VHT1SS_RATE((_rate))) ++#define IS_2T_RATE(_rate) (IS_HT2SS_RATE((_rate)) || IS_VHT2SS_RATE((_rate))) ++#define IS_3T_RATE(_rate) (IS_HT3SS_RATE((_rate)) || IS_VHT3SS_RATE((_rate))) ++#define IS_4T_RATE(_rate) (IS_HT4SS_RATE((_rate)) || IS_VHT4SS_RATE((_rate))) ++ ++typedef enum _RATE_SECTION { ++ CCK = 0, ++ OFDM = 1, ++ HT_MCS0_MCS7 = 2, ++ HT_MCS8_MCS15 = 3, ++ HT_MCS16_MCS23 = 4, ++ HT_MCS24_MCS31 = 5, ++ HT_1SS = HT_MCS0_MCS7, ++ HT_2SS = HT_MCS8_MCS15, ++ HT_3SS = HT_MCS16_MCS23, ++ HT_4SS = HT_MCS24_MCS31, ++ VHT_1SSMCS0_1SSMCS9 = 6, ++ VHT_2SSMCS0_2SSMCS9 = 7, ++ VHT_3SSMCS0_3SSMCS9 = 8, ++ VHT_4SSMCS0_4SSMCS9 = 9, ++ VHT_1SS = VHT_1SSMCS0_1SSMCS9, ++ VHT_2SS = VHT_2SSMCS0_2SSMCS9, ++ VHT_3SS = VHT_3SSMCS0_3SSMCS9, ++ VHT_4SS = VHT_4SSMCS0_4SSMCS9, ++ RATE_SECTION_NUM, ++} RATE_SECTION; ++ ++const char *rate_section_str(u8 section); ++ ++#define IS_CCK_RATE_SECTION(section) ((section) == CCK) ++#define IS_OFDM_RATE_SECTION(section) ((section) == OFDM) ++#define IS_HT_RATE_SECTION(section) ((section) >= HT_1SS && (section) <= HT_4SS) ++#define IS_VHT_RATE_SECTION(section) ((section) >= VHT_1SS && (section) <= VHT_4SS) ++ ++#define IS_1T_RATE_SECTION(section) ((section) == CCK || (section) == OFDM || (section) == HT_1SS || (section) == VHT_1SS) ++#define IS_2T_RATE_SECTION(section) ((section) == HT_2SS || (section) == VHT_2SS) ++#define IS_3T_RATE_SECTION(section) ((section) == HT_3SS || (section) == VHT_3SS) ++#define IS_4T_RATE_SECTION(section) ((section) == HT_4SS || (section) == VHT_4SS) ++ ++extern u8 mgn_rates_cck[]; ++extern u8 mgn_rates_ofdm[]; ++extern u8 mgn_rates_mcs0_7[]; ++extern u8 mgn_rates_mcs8_15[]; ++extern u8 mgn_rates_mcs16_23[]; ++extern u8 mgn_rates_mcs24_31[]; ++extern u8 mgn_rates_vht1ss[]; ++extern u8 mgn_rates_vht2ss[]; ++extern u8 mgn_rates_vht3ss[]; ++extern u8 mgn_rates_vht4ss[]; ++ ++struct rate_section_ent { ++ u8 tx_num; /* value of RF_TX_NUM */ ++ u8 rate_num; ++ u8 *rates; ++}; ++ ++extern struct rate_section_ent rates_by_sections[]; + ++#define rate_section_to_tx_num(section) (rates_by_sections[(section)].tx_num) ++#define rate_section_rate_num(section) (rates_by_sections[(section)].rate_num) + + /* NOTE: This data is for statistical purposes; not all hardware provides this + * information for frames received. Not setting these will not cause +@@ -1307,6 +1381,8 @@ enum ieee80211_state { + #define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5] + #define IP_FMT "%d.%d.%d.%d" + #define IP_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3] ++#define PORT_FMT "%u" ++#define PORT_ARG(x) ntohs(*((u16 *)(x))) + + #ifdef PLATFORM_FREEBSD //Baron change func to macro + #define is_multicast_mac_addr(Addr) ((((Addr[0]) & 0x01) == 0x01) && ((Addr[0]) != 0xff)) +@@ -1342,7 +1418,7 @@ typedef struct tx_pending_t{ + + + +-#define MAXTID 16 ++#define TID_NUM 16 + + #define IEEE_A (1<<0) + #define IEEE_B (1<<1) +@@ -1461,6 +1537,13 @@ enum rtw_ieee80211_back_parties { + RTW_WLAN_BACK_TIMER = 2, + }; + ++/*20/40 BSS Coexistence element */ ++#define RTW_WLAN_20_40_BSS_COEX_INFO_REQ BIT(0) ++#define RTW_WLAN_20_40_BSS_COEX_40MHZ_INTOL BIT(1) ++#define RTW_WLAN_20_40_BSS_COEX_20MHZ_WIDTH_REQ BIT(2) ++#define RTW_WLAN_20_40_BSS_COEX_OBSS_EXEMPT_REQ BIT(3) ++#define RTW_WLAN_20_40_BSS_COEX_OBSS_EXEMPT_GRNT BIT(4) ++ + /* VHT features action code */ + enum rtw_ieee80211_vht_actioncode{ + RTW_WLAN_ACTION_VHT_COMPRESSED_BEAMFORMING = 0, +@@ -1679,31 +1762,43 @@ void dump_ht_cap_ie_content(void *sel, u8 *buf, u32 buf_len); + + void dump_wps_ie(void *sel, u8 *ie, u32 ie_len); + +-#ifdef CONFIG_P2P ++void rtw_ies_get_chbw(u8 *ies, int ies_len, u8 *ch, u8 *bw, u8 *offset); ++ ++void rtw_bss_get_chbw(WLAN_BSSID_EX *bss, u8 *ch, u8 *bw, u8 *offset); ++ ++bool rtw_is_chbw_grouped(u8 ch_a, u8 bw_a, u8 offset_a ++ , u8 ch_b, u8 bw_b, u8 offset_b); ++void rtw_sync_chbw(u8 *req_ch, u8 *req_bw, u8 *req_offset ++ , u8 *g_ch, u8 *g_bw, u8 *g_offset); ++ + u32 rtw_get_p2p_merged_ies_len(u8 *in_ie, u32 in_len); + int rtw_p2p_merge_ies(u8 *in_ie, u32 in_len, u8 *merge_ie); + void dump_p2p_ie(void *sel, u8 *ie, u32 ie_len); + u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen); +-u8 *rtw_get_p2p_ie_from_scan_queue(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen, u8 frame_type); + u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_attr, u32 *len_attr); + u8 *rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_content, uint *len_content); + u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr); +-void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id); +-#endif ++uint rtw_del_p2p_ie(u8 *ies, uint ies_len_ori, const char *msg); ++uint rtw_del_p2p_attr(u8 *ie, uint ielen_ori, u8 attr_id); ++u8 *rtw_bss_ex_get_p2p_ie(WLAN_BSSID_EX *bss_ex, u8 *p2p_ie, uint *p2p_ielen); ++void rtw_bss_ex_del_p2p_ie(WLAN_BSSID_EX *bss_ex); ++void rtw_bss_ex_del_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id); + +-#ifdef CONFIG_WFD + void dump_wfd_ie(void *sel, u8 *ie, u32 ie_len); +-int rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen); +-int rtw_get_wfd_ie_from_scan_queue(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen, u8 frame_type); +-int rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id ,u8 *attr_content, uint *attr_contentlen); +-#endif // CONFIG_WFD ++u8 *rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen); ++u8 *rtw_get_wfd_attr(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id, u8 *buf_attr, u32 *len_attr); ++u8 *rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id, u8 *buf_content, uint *len_content); ++uint rtw_del_wfd_ie(u8 *ies, uint ies_len_ori, const char *msg); ++uint rtw_del_wfd_attr(u8 *ie, uint ielen_ori, u8 attr_id); ++u8 *rtw_bss_ex_get_wfd_ie(WLAN_BSSID_EX *bss_ex, u8 *wfd_ie, uint *wfd_ielen); ++void rtw_bss_ex_del_wfd_ie(WLAN_BSSID_EX *bss_ex); ++void rtw_bss_ex_del_wfd_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id); + + uint rtw_get_rateset_len(u8 *rateset); + + struct registry_priv; + int rtw_generate_ie(struct registry_priv *pregistrypriv); + +- + int rtw_get_bit_value_from_ieee_value(u8 val); + + uint rtw_is_cckrates_included(u8 *rate); +@@ -1714,12 +1809,20 @@ int rtw_check_network_type(unsigned char *rate, int ratelen, int channel); + + void rtw_get_bcn_info(struct wlan_network *pnetwork); + +-void rtw_macaddr_cfg(u8 *mac_addr); ++u8 rtw_check_invalid_mac_address(u8 *mac_addr, u8 check_local_bit); ++void rtw_macaddr_cfg(u8 *out, const u8 *hw_mac_addr); + + u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char * MCS_rate); ++u8 rtw_ht_mcsset_to_nss(u8 *supp_mcs_set); + + int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8* category, u8 *action); + const char *action_public_str(u8 action); + ++u8 key_2char2num(u8 hch, u8 lch); ++u8 str_2char2num(u8 hch, u8 lch); ++void macstr2num(u8 *dst, u8 *src); ++u8 convert_ip_addr(u8 hch, u8 mch, u8 lch); ++int wifirate2_ratetbl_inx(unsigned char rate); ++ + #endif /* IEEE80211_H */ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ieee80211_ext.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ieee80211_ext.h +old mode 100755 +new mode 100644 +index 14f1b23..3e55305 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ieee80211_ext.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ieee80211_ext.h +@@ -16,462 +16,462 @@ + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * +- ******************************************************************************/ +-#ifndef __IEEE80211_EXT_H +-#define __IEEE80211_EXT_H +- +-#include +-#include +-#include +- +-#define WMM_OUI_TYPE 2 +-#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0 +-#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1 +-#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2 +-#define WMM_VERSION 1 +- +-#define WPA_PROTO_WPA BIT(0) +-#define WPA_PROTO_RSN BIT(1) +- +-#define WPA_KEY_MGMT_IEEE8021X BIT(0) +-#define WPA_KEY_MGMT_PSK BIT(1) +-#define WPA_KEY_MGMT_NONE BIT(2) +-#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3) +-#define WPA_KEY_MGMT_WPA_NONE BIT(4) +- +- +-#define WPA_CAPABILITY_PREAUTH BIT(0) +-#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6) +-#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9) +- +- +-#define PMKID_LEN 16 +- +- +-#ifdef PLATFORM_LINUX +-struct wpa_ie_hdr { +- u8 elem_id; +- u8 len; +- u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ +- u8 version[2]; /* little endian */ +-}__attribute__ ((packed)); +- +-struct rsn_ie_hdr { +- u8 elem_id; /* WLAN_EID_RSN */ +- u8 len; +- u8 version[2]; /* little endian */ +-}__attribute__ ((packed)); +- +-struct wme_ac_parameter { +-#if defined(CONFIG_LITTLE_ENDIAN) +- /* byte 1 */ +- u8 aifsn:4, +- acm:1, +- aci:2, +- reserved:1; +- +- /* byte 2 */ +- u8 eCWmin:4, +- eCWmax:4; +-#elif defined(CONFIG_BIG_ENDIAN) +- /* byte 1 */ +- u8 reserved:1, +- aci:2, +- acm:1, +- aifsn:4; +- +- /* byte 2 */ +- u8 eCWmax:4, +- eCWmin:4; +-#else +-#error "Please fix " +-#endif +- +- /* bytes 3 & 4 */ +- u16 txopLimit; +-} __attribute__ ((packed)); +- +-struct wme_parameter_element { +- /* required fields for WME version 1 */ +- u8 oui[3]; +- u8 oui_type; +- u8 oui_subtype; +- u8 version; +- u8 acInfo; +- u8 reserved; +- struct wme_ac_parameter ac[4]; +- +-} __attribute__ ((packed)); +- +-#endif +- +-#ifdef PLATFORM_WINDOWS +- +-#pragma pack(1) +- +-struct wpa_ie_hdr { +- u8 elem_id; +- u8 len; +- u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ +- u8 version[2]; /* little endian */ +-}; +- +-struct rsn_ie_hdr { +- u8 elem_id; /* WLAN_EID_RSN */ +- u8 len; +- u8 version[2]; /* little endian */ +-}; +- +-#pragma pack() +- +-#endif +- +-#define WPA_PUT_LE16(a, val) \ +- do { \ +- (a)[1] = ((u16) (val)) >> 8; \ +- (a)[0] = ((u16) (val)) & 0xff; \ +- } while (0) +- +-#define WPA_PUT_BE32(a, val) \ +- do { \ +- (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ +- (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ +- (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ +- (a)[3] = (u8) (((u32) (val)) & 0xff); \ +- } while (0) +- +-#define WPA_PUT_LE32(a, val) \ +- do { \ +- (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ +- (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ +- (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ +- (a)[0] = (u8) (((u32) (val)) & 0xff); \ +- } while (0) +- +-#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val)) +-//#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val)) +- +- +- +-/* Action category code */ +-enum ieee80211_category { +- WLAN_CATEGORY_SPECTRUM_MGMT = 0, +- WLAN_CATEGORY_QOS = 1, +- WLAN_CATEGORY_DLS = 2, +- WLAN_CATEGORY_BACK = 3, +- WLAN_CATEGORY_HT = 7, +- WLAN_CATEGORY_WMM = 17, +-}; +- +-/* SPECTRUM_MGMT action code */ +-enum ieee80211_spectrum_mgmt_actioncode { +- WLAN_ACTION_SPCT_MSR_REQ = 0, +- WLAN_ACTION_SPCT_MSR_RPRT = 1, +- WLAN_ACTION_SPCT_TPC_REQ = 2, +- WLAN_ACTION_SPCT_TPC_RPRT = 3, +- WLAN_ACTION_SPCT_CHL_SWITCH = 4, +- WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, +-}; +- +-/* BACK action code */ +-enum ieee80211_back_actioncode { +- WLAN_ACTION_ADDBA_REQ = 0, +- WLAN_ACTION_ADDBA_RESP = 1, +- WLAN_ACTION_DELBA = 2, +-}; +- +-/* HT features action code */ +-enum ieee80211_ht_actioncode { +- WLAN_ACTION_NOTIFY_CH_WIDTH = 0, +- WLAN_ACTION_SM_PS = 1, +- WLAN_ACTION_PSPM = 2, +- WLAN_ACTION_PCO_PHASE = 3, +- WLAN_ACTION_MIMO_CSI_MX = 4, +- WLAN_ACTION_MIMO_NONCP_BF = 5, +- WLAN_ACTION_MIMP_CP_BF = 6, +- WLAN_ACTION_ASEL_INDICATES_FB = 7, +- WLAN_ACTION_HI_INFO_EXCHG = 8, +-}; +- +-/* BACK (block-ack) parties */ +-enum ieee80211_back_parties { +- WLAN_BACK_RECIPIENT = 0, +- WLAN_BACK_INITIATOR = 1, +- WLAN_BACK_TIMER = 2, +-}; +- +-#ifdef PLATFORM_LINUX +- +-struct ieee80211_mgmt { +- u16 frame_control; +- u16 duration; +- u8 da[6]; +- u8 sa[6]; +- u8 bssid[6]; +- u16 seq_ctrl; +- union { +- struct { +- u16 auth_alg; +- u16 auth_transaction; +- u16 status_code; +- /* possibly followed by Challenge text */ +- u8 variable[0]; +- } __attribute__ ((packed)) auth; +- struct { +- u16 reason_code; +- } __attribute__ ((packed)) deauth; +- struct { +- u16 capab_info; +- u16 listen_interval; +- /* followed by SSID and Supported rates */ +- u8 variable[0]; +- } __attribute__ ((packed)) assoc_req; +- struct { +- u16 capab_info; +- u16 status_code; +- u16 aid; +- /* followed by Supported rates */ +- u8 variable[0]; +- } __attribute__ ((packed)) assoc_resp, reassoc_resp; +- struct { +- u16 capab_info; +- u16 listen_interval; +- u8 current_ap[6]; +- /* followed by SSID and Supported rates */ +- u8 variable[0]; +- } __attribute__ ((packed)) reassoc_req; +- struct { +- u16 reason_code; +- } __attribute__ ((packed)) disassoc; +- struct { +- __le64 timestamp; +- u16 beacon_int; +- u16 capab_info; +- /* followed by some of SSID, Supported rates, +- * FH Params, DS Params, CF Params, IBSS Params, TIM */ +- u8 variable[0]; +- } __attribute__ ((packed)) beacon; +- struct { +- /* only variable items: SSID, Supported rates */ +- u8 variable[0]; +- } __attribute__ ((packed)) probe_req; +- struct { +- __le64 timestamp; +- u16 beacon_int; +- u16 capab_info; +- /* followed by some of SSID, Supported rates, +- * FH Params, DS Params, CF Params, IBSS Params */ +- u8 variable[0]; +- } __attribute__ ((packed)) probe_resp; +- struct { +- u8 category; +- union { +- struct { +- u8 action_code; +- u8 dialog_token; +- u8 status_code; +- u8 variable[0]; +- } __attribute__ ((packed)) wme_action; +-#if 0 +- struct{ +- u8 action_code; +- u8 element_id; +- u8 length; +- struct ieee80211_channel_sw_ie sw_elem; +- } __attribute__ ((packed)) chan_switch; +- struct{ +- u8 action_code; +- u8 dialog_token; +- u8 element_id; +- u8 length; +- struct ieee80211_msrment_ie msr_elem; +- } __attribute__ ((packed)) measurement; +-#endif +- struct{ +- u8 action_code; +- u8 dialog_token; +- u16 capab; +- u16 timeout; +- u16 start_seq_num; +- } __attribute__ ((packed)) addba_req; +- struct{ +- u8 action_code; +- u8 dialog_token; +- u16 status; +- u16 capab; +- u16 timeout; +- } __attribute__ ((packed)) addba_resp; +- struct{ +- u8 action_code; +- u16 params; +- u16 reason_code; +- } __attribute__ ((packed)) delba; +- struct{ +- u8 action_code; +- /* capab_info for open and confirm, +- * reason for close +- */ +- u16 aux; +- /* Followed in plink_confirm by status +- * code, AID and supported rates, +- * and directly by supported rates in +- * plink_open and plink_close +- */ +- u8 variable[0]; +- } __attribute__ ((packed)) plink_action; +- struct{ +- u8 action_code; +- u8 variable[0]; +- } __attribute__ ((packed)) mesh_action; +- } __attribute__ ((packed)) u; +- } __attribute__ ((packed)) action; +- } __attribute__ ((packed)) u; +-}__attribute__ ((packed)); +- +-#endif +- +- +-#ifdef PLATFORM_WINDOWS +- +-#pragma pack(1) +- +-struct ieee80211_mgmt { +- u16 frame_control; +- u16 duration; +- u8 da[6]; +- u8 sa[6]; +- u8 bssid[6]; +- u16 seq_ctrl; +- union { +- struct { +- u16 auth_alg; +- u16 auth_transaction; +- u16 status_code; +- /* possibly followed by Challenge text */ +- u8 variable[0]; +- } auth; +- struct { +- u16 reason_code; +- } deauth; +- struct { +- u16 capab_info; +- u16 listen_interval; +- /* followed by SSID and Supported rates */ +- u8 variable[0]; +- } assoc_req; +- struct { +- u16 capab_info; +- u16 status_code; +- u16 aid; +- /* followed by Supported rates */ +- u8 variable[0]; +- } assoc_resp, reassoc_resp; +- struct { +- u16 capab_info; +- u16 listen_interval; +- u8 current_ap[6]; +- /* followed by SSID and Supported rates */ +- u8 variable[0]; +- } reassoc_req; +- struct { +- u16 reason_code; +- } disassoc; +-#if 0 +- struct { +- __le64 timestamp; +- u16 beacon_int; +- u16 capab_info; +- /* followed by some of SSID, Supported rates, +- * FH Params, DS Params, CF Params, IBSS Params, TIM */ +- u8 variable[0]; +- } beacon; +- struct { +- /* only variable items: SSID, Supported rates */ +- u8 variable[0]; +- } probe_req; +- +- struct { +- __le64 timestamp; +- u16 beacon_int; +- u16 capab_info; +- /* followed by some of SSID, Supported rates, +- * FH Params, DS Params, CF Params, IBSS Params */ +- u8 variable[0]; +- } probe_resp; +-#endif +- struct { +- u8 category; +- union { +- struct { +- u8 action_code; +- u8 dialog_token; +- u8 status_code; +- u8 variable[0]; +- } wme_action; +-/* +- struct{ +- u8 action_code; +- u8 element_id; +- u8 length; +- struct ieee80211_channel_sw_ie sw_elem; +- } chan_switch; +- struct{ +- u8 action_code; +- u8 dialog_token; +- u8 element_id; +- u8 length; +- struct ieee80211_msrment_ie msr_elem; +- } measurement; +-*/ +- struct{ +- u8 action_code; +- u8 dialog_token; +- u16 capab; +- u16 timeout; +- u16 start_seq_num; +- } addba_req; +- struct{ +- u8 action_code; +- u8 dialog_token; +- u16 status; +- u16 capab; +- u16 timeout; +- } addba_resp; +- struct{ +- u8 action_code; +- u16 params; +- u16 reason_code; +- } delba; +- struct{ +- u8 action_code; +- /* capab_info for open and confirm, +- * reason for close +- */ +- u16 aux; +- /* Followed in plink_confirm by status +- * code, AID and supported rates, +- * and directly by supported rates in +- * plink_open and plink_close +- */ +- u8 variable[0]; +- } plink_action; +- struct{ +- u8 action_code; +- u8 variable[0]; +- } mesh_action; +- } u; +- } action; +- } u; +-} ; +- +-#pragma pack() +- +-#endif +- +-/* mgmt header + 1 byte category code */ +-#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) +- +- +- +-#endif +- ++ ******************************************************************************/ ++#ifndef __IEEE80211_EXT_H ++#define __IEEE80211_EXT_H ++ ++#include ++#include ++#include ++ ++#define WMM_OUI_TYPE 2 ++#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0 ++#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1 ++#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2 ++#define WMM_VERSION 1 ++ ++#define WPA_PROTO_WPA BIT(0) ++#define WPA_PROTO_RSN BIT(1) ++ ++#define WPA_KEY_MGMT_IEEE8021X BIT(0) ++#define WPA_KEY_MGMT_PSK BIT(1) ++#define WPA_KEY_MGMT_NONE BIT(2) ++#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3) ++#define WPA_KEY_MGMT_WPA_NONE BIT(4) ++ ++ ++#define WPA_CAPABILITY_PREAUTH BIT(0) ++#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6) ++#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9) ++ ++ ++#define PMKID_LEN 16 ++ ++ ++#ifdef PLATFORM_LINUX ++struct wpa_ie_hdr { ++ u8 elem_id; ++ u8 len; ++ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ ++ u8 version[2]; /* little endian */ ++}__attribute__ ((packed)); ++ ++struct rsn_ie_hdr { ++ u8 elem_id; /* WLAN_EID_RSN */ ++ u8 len; ++ u8 version[2]; /* little endian */ ++}__attribute__ ((packed)); ++ ++struct wme_ac_parameter { ++#if defined(CONFIG_LITTLE_ENDIAN) ++ /* byte 1 */ ++ u8 aifsn:4, ++ acm:1, ++ aci:2, ++ reserved:1; ++ ++ /* byte 2 */ ++ u8 eCWmin:4, ++ eCWmax:4; ++#elif defined(CONFIG_BIG_ENDIAN) ++ /* byte 1 */ ++ u8 reserved:1, ++ aci:2, ++ acm:1, ++ aifsn:4; ++ ++ /* byte 2 */ ++ u8 eCWmax:4, ++ eCWmin:4; ++#else ++#error "Please fix " ++#endif ++ ++ /* bytes 3 & 4 */ ++ u16 txopLimit; ++} __attribute__ ((packed)); ++ ++struct wme_parameter_element { ++ /* required fields for WME version 1 */ ++ u8 oui[3]; ++ u8 oui_type; ++ u8 oui_subtype; ++ u8 version; ++ u8 acInfo; ++ u8 reserved; ++ struct wme_ac_parameter ac[4]; ++ ++} __attribute__ ((packed)); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct wpa_ie_hdr { ++ u8 elem_id; ++ u8 len; ++ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ ++ u8 version[2]; /* little endian */ ++}; ++ ++struct rsn_ie_hdr { ++ u8 elem_id; /* WLAN_EID_RSN */ ++ u8 len; ++ u8 version[2]; /* little endian */ ++}; ++ ++#pragma pack() ++ ++#endif ++ ++#define WPA_PUT_LE16(a, val) \ ++ do { \ ++ (a)[1] = ((u16) (val)) >> 8; \ ++ (a)[0] = ((u16) (val)) & 0xff; \ ++ } while (0) ++ ++#define WPA_PUT_BE32(a, val) \ ++ do { \ ++ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[3] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define WPA_PUT_LE32(a, val) \ ++ do { \ ++ (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[0] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val)) ++//#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val)) ++ ++ ++ ++/* Action category code */ ++enum ieee80211_category { ++ WLAN_CATEGORY_SPECTRUM_MGMT = 0, ++ WLAN_CATEGORY_QOS = 1, ++ WLAN_CATEGORY_DLS = 2, ++ WLAN_CATEGORY_BACK = 3, ++ WLAN_CATEGORY_HT = 7, ++ WLAN_CATEGORY_WMM = 17, ++}; ++ ++/* SPECTRUM_MGMT action code */ ++enum ieee80211_spectrum_mgmt_actioncode { ++ WLAN_ACTION_SPCT_MSR_REQ = 0, ++ WLAN_ACTION_SPCT_MSR_RPRT = 1, ++ WLAN_ACTION_SPCT_TPC_REQ = 2, ++ WLAN_ACTION_SPCT_TPC_RPRT = 3, ++ WLAN_ACTION_SPCT_CHL_SWITCH = 4, ++ WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, ++}; ++ ++/* BACK action code */ ++enum ieee80211_back_actioncode { ++ WLAN_ACTION_ADDBA_REQ = 0, ++ WLAN_ACTION_ADDBA_RESP = 1, ++ WLAN_ACTION_DELBA = 2, ++}; ++ ++/* HT features action code */ ++enum ieee80211_ht_actioncode { ++ WLAN_ACTION_NOTIFY_CH_WIDTH = 0, ++ WLAN_ACTION_SM_PS = 1, ++ WLAN_ACTION_PSPM = 2, ++ WLAN_ACTION_PCO_PHASE = 3, ++ WLAN_ACTION_MIMO_CSI_MX = 4, ++ WLAN_ACTION_MIMO_NONCP_BF = 5, ++ WLAN_ACTION_MIMP_CP_BF = 6, ++ WLAN_ACTION_ASEL_INDICATES_FB = 7, ++ WLAN_ACTION_HI_INFO_EXCHG = 8, ++}; ++ ++/* BACK (block-ack) parties */ ++enum ieee80211_back_parties { ++ WLAN_BACK_RECIPIENT = 0, ++ WLAN_BACK_INITIATOR = 1, ++ WLAN_BACK_TIMER = 2, ++}; ++ ++#ifdef PLATFORM_LINUX ++ ++struct ieee80211_mgmt { ++ u16 frame_control; ++ u16 duration; ++ u8 da[6]; ++ u8 sa[6]; ++ u8 bssid[6]; ++ u16 seq_ctrl; ++ union { ++ struct { ++ u16 auth_alg; ++ u16 auth_transaction; ++ u16 status_code; ++ /* possibly followed by Challenge text */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) auth; ++ struct { ++ u16 reason_code; ++ } __attribute__ ((packed)) deauth; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) assoc_req; ++ struct { ++ u16 capab_info; ++ u16 status_code; ++ u16 aid; ++ /* followed by Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) assoc_resp, reassoc_resp; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ u8 current_ap[6]; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) reassoc_req; ++ struct { ++ u16 reason_code; ++ } __attribute__ ((packed)) disassoc; ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params, TIM */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) beacon; ++ struct { ++ /* only variable items: SSID, Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) probe_req; ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) probe_resp; ++ struct { ++ u8 category; ++ union { ++ struct { ++ u8 action_code; ++ u8 dialog_token; ++ u8 status_code; ++ u8 variable[0]; ++ } __attribute__ ((packed)) wme_action; ++#if 0 ++ struct{ ++ u8 action_code; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_channel_sw_ie sw_elem; ++ } __attribute__ ((packed)) chan_switch; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_msrment_ie msr_elem; ++ } __attribute__ ((packed)) measurement; ++#endif ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 capab; ++ u16 timeout; ++ u16 start_seq_num; ++ } __attribute__ ((packed)) addba_req; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 status; ++ u16 capab; ++ u16 timeout; ++ } __attribute__ ((packed)) addba_resp; ++ struct{ ++ u8 action_code; ++ u16 params; ++ u16 reason_code; ++ } __attribute__ ((packed)) delba; ++ struct{ ++ u8 action_code; ++ /* capab_info for open and confirm, ++ * reason for close ++ */ ++ u16 aux; ++ /* Followed in plink_confirm by status ++ * code, AID and supported rates, ++ * and directly by supported rates in ++ * plink_open and plink_close ++ */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) plink_action; ++ struct{ ++ u8 action_code; ++ u8 variable[0]; ++ } __attribute__ ((packed)) mesh_action; ++ } __attribute__ ((packed)) u; ++ } __attribute__ ((packed)) action; ++ } __attribute__ ((packed)) u; ++}__attribute__ ((packed)); ++ ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct ieee80211_mgmt { ++ u16 frame_control; ++ u16 duration; ++ u8 da[6]; ++ u8 sa[6]; ++ u8 bssid[6]; ++ u16 seq_ctrl; ++ union { ++ struct { ++ u16 auth_alg; ++ u16 auth_transaction; ++ u16 status_code; ++ /* possibly followed by Challenge text */ ++ u8 variable[0]; ++ } auth; ++ struct { ++ u16 reason_code; ++ } deauth; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } assoc_req; ++ struct { ++ u16 capab_info; ++ u16 status_code; ++ u16 aid; ++ /* followed by Supported rates */ ++ u8 variable[0]; ++ } assoc_resp, reassoc_resp; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ u8 current_ap[6]; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } reassoc_req; ++ struct { ++ u16 reason_code; ++ } disassoc; ++#if 0 ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params, TIM */ ++ u8 variable[0]; ++ } beacon; ++ struct { ++ /* only variable items: SSID, Supported rates */ ++ u8 variable[0]; ++ } probe_req; ++ ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params */ ++ u8 variable[0]; ++ } probe_resp; ++#endif ++ struct { ++ u8 category; ++ union { ++ struct { ++ u8 action_code; ++ u8 dialog_token; ++ u8 status_code; ++ u8 variable[0]; ++ } wme_action; ++/* ++ struct{ ++ u8 action_code; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_channel_sw_ie sw_elem; ++ } chan_switch; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_msrment_ie msr_elem; ++ } measurement; ++*/ ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 capab; ++ u16 timeout; ++ u16 start_seq_num; ++ } addba_req; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 status; ++ u16 capab; ++ u16 timeout; ++ } addba_resp; ++ struct{ ++ u8 action_code; ++ u16 params; ++ u16 reason_code; ++ } delba; ++ struct{ ++ u8 action_code; ++ /* capab_info for open and confirm, ++ * reason for close ++ */ ++ u16 aux; ++ /* Followed in plink_confirm by status ++ * code, AID and supported rates, ++ * and directly by supported rates in ++ * plink_open and plink_close ++ */ ++ u8 variable[0]; ++ } plink_action; ++ struct{ ++ u8 action_code; ++ u8 variable[0]; ++ } mesh_action; ++ } u; ++ } action; ++ } u; ++} ; ++ ++#pragma pack() ++ ++#endif ++ ++/* mgmt header + 1 byte category code */ ++#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) ++ ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/if_ether.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/if_ether.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ip.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ip.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/linux/wireless.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/linux/wireless.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/mlme_osdep.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/mlme_osdep.h +old mode 100755 +new mode 100644 +index 5380cd4..a740a13 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/mlme_osdep.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/mlme_osdep.h +@@ -26,7 +26,7 @@ extern int time_after(u32 now, u32 old); + #endif + + extern void rtw_init_mlme_timer(_adapter *padapter); +-extern void rtw_os_indicate_disconnect( _adapter *adapter ); ++extern void rtw_os_indicate_disconnect(_adapter *adapter, u16 reason, u8 locally_generated); + extern void rtw_os_indicate_connect( _adapter *adapter ); + void rtw_os_indicate_scan_done( _adapter *padapter, bool aborted); + extern void rtw_report_sec_ie(_adapter *adapter,u8 authmode,u8 *sec_ie); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/mp_custom_oid.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/mp_custom_oid.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/nic_spec.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/nic_spec.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_intf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_intf.h +old mode 100755 +new mode 100644 +index 805f3b2..8b8679f +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_intf.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_intf.h +@@ -105,12 +105,20 @@ void rtw_cancel_dynamic_chk_timer(_adapter *padapter); + #endif + void rtw_cancel_all_timer(_adapter *padapter); + ++uint loadparam(_adapter *adapter); ++ + #ifdef PLATFORM_LINUX + int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); + + int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname); + struct net_device *rtw_init_netdev(_adapter *padapter); +-void rtw_unregister_netdevs(struct dvobj_priv *dvobj); ++ ++void rtw_os_ndev_free(_adapter *adapter); ++int rtw_os_ndev_init(_adapter *adapter, char *name); ++void rtw_os_ndev_deinit(_adapter *adapter); ++void rtw_os_ndevs_unregister(struct dvobj_priv *dvobj); ++int rtw_os_ndevs_init(struct dvobj_priv *dvobj); ++void rtw_os_ndevs_deinit(struct dvobj_priv *dvobj); + + #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) + u16 rtw_recv_select_queue(struct sk_buff *skb); +@@ -152,7 +160,6 @@ void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj); + #endif //CONFIG_MULTI_VIR_IFACES + #endif + +-int rtw_drv_register_netdev(_adapter *padapter); + void rtw_ndev_destructor(_nic_hdl ndev); + + #ifdef CONFIG_ARP_KEEP_ALIVE +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service.h +old mode 100755 +new mode 100644 +index b590176..4423eea +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service.h +@@ -256,8 +256,9 @@ void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_a + extern void* rtw_malloc2d(int h, int w, size_t size); + extern void rtw_mfree2d(void *pbuf, int h, int w, int size); + +-extern void _rtw_memcpy(void* dec, void* sour, u32 sz); +-extern int _rtw_memcmp(void *dst, void *src, u32 sz); ++extern void _rtw_memcpy(void *dec, const void *sour, u32 sz); ++extern void _rtw_memmove(void *dst, const void *src, u32 sz); ++extern int _rtw_memcmp(void *dst, const void *src, u32 sz); + extern void _rtw_memset(void *pbuf, int c, u32 sz); + + extern void _rtw_init_listhead(_list *list); +@@ -283,7 +284,8 @@ extern void _rtw_spinunlock(_lock *plock); + extern void _rtw_spinlock_ex(_lock *plock); + extern void _rtw_spinunlock_ex(_lock *plock); + +-extern void _rtw_init_queue(_queue *pqueue); ++extern void _rtw_init_queue(_queue *pqueue); ++extern void _rtw_deinit_queue(_queue *pqueue); + extern u32 _rtw_queue_empty(_queue *pqueue); + extern u32 rtw_end_of_queue_search(_list *queue, _list *pelement); + +@@ -476,6 +478,8 @@ __inline static u32 bitshift(u32 bitmask) + } + + #define rtw_min(a, b) ((a>b)?b:a) ++#define rtw_is_range_a_in_b(hi_a, lo_a, hi_b, lo_b) (((hi_a) <= (hi_b)) && ((lo_a) >= (lo_b))) ++#define rtw_is_range_overlap(hi_a, lo_a, hi_b, lo_b) (((hi_a) > (lo_b)) && ((lo_a) < (hi_b))) + + #ifndef MAC_FMT + #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" +@@ -514,7 +518,7 @@ extern int ATOMIC_DEC_RETURN(ATOMIC_T *v); + + //File operation APIs, just for linux now + extern int rtw_is_file_readable(char *path); +-extern int rtw_retrive_from_file(char *path, u8* buf, u32 sz); ++extern int rtw_retrieve_from_file(char *path, u8 *buf, u32 sz); + extern int rtw_store_to_file(char *path, u8* buf, u32 sz); + + +@@ -611,6 +615,11 @@ struct rtw_cbuf *rtw_cbuf_alloc(u32 size); + void rtw_cbuf_free(struct rtw_cbuf *cbuf); + + // String handler ++ ++BOOLEAN IsHexDigit(char chTmp); ++BOOLEAN is_alpha(char chTmp); ++char alpha_to_upper(char c); ++ + /* + * Write formatted output to sized buffer + */ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_bsd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_bsd.h +old mode 100755 +new mode 100644 +index b56ccbb..040225c +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_bsd.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_bsd.h +@@ -1,749 +1,749 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __OSDEP_BSD_SERVICE_H_ +-#define __OSDEP_BSD_SERVICE_H_ +- +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +- +-#include +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include "usbdevs.h" +- +-#define USB_DEBUG_VAR rum_debug +-#include +- +-#if 1 //Baron porting from linux, it's all temp solution, needs to check again +-#include +-#include /* XXX for PCPU_GET */ +-// typedef struct semaphore _sema; +- typedef struct sema _sema; +-// typedef spinlock_t _lock; +- typedef struct mtx _lock; +- typedef struct mtx _mutex; +- typedef struct timer_list _timer; +- struct list_head { +- struct list_head *next, *prev; +- }; +- struct __queue { +- struct list_head queue; +- _lock lock; +- }; +- +- //typedef struct sk_buff _pkt; +- typedef struct mbuf _pkt; +- typedef struct mbuf _buffer; +- +- typedef struct __queue _queue; +- typedef struct list_head _list; +- typedef int _OS_STATUS; +- //typedef u32 _irqL; +- typedef unsigned long _irqL; +- typedef struct ifnet * _nic_hdl; +- +- typedef pid_t _thread_hdl_; +-// typedef struct thread _thread_hdl_; +- typedef void thread_return; +- typedef void* thread_context; +- +- //#define thread_exit() complete_and_exit(NULL, 0) +- +- #define thread_exit() do{printf("%s", "RTKTHREAD_exit");}while(0) +- +- typedef void timer_hdl_return; +- typedef void* timer_hdl_context; +- typedef struct work_struct _workitem; +- +-#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) +-/* emulate a modern version */ +-#define LINUX_VERSION_CODE KERNEL_VERSION(2, 6, 35) +- +-#define WIRELESS_EXT -1 +-#define HZ hz +-#define spin_lock_irqsave mtx_lock_irqsave +-#define spin_lock_bh mtx_lock_irqsave +-#define mtx_lock_irqsave(lock, x) mtx_lock(lock)//{local_irq_save((x)); mtx_lock_spin((lock));} +-//#define IFT_RTW 0xf9 //ifnet allocate type for RTW +-#define free_netdev if_free +-#define LIST_CONTAINOR(ptr, type, member) \ +- ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) +-#define container_of(p,t,n) (t*)((p)-&(((t*)0)->n)) +-/* +- * Linux timers are emulated using FreeBSD callout functions +- * (and taskqueue functionality). +- * +- * Currently no timer stats functionality. +- * +- * See (linux_compat) processes.c +- * +- */ +-struct timer_list { +- +- /* FreeBSD callout related fields */ +- struct callout callout; +- +- //timeout function +- void (*function)(void*); +- //argument +- void *arg; +- +-}; +-struct workqueue_struct; +-struct work_struct; +-typedef void (*work_func_t)(struct work_struct *work); +-/* Values for the state of an item of work (work_struct) */ +-typedef enum work_state { +- WORK_STATE_UNSET = 0, +- WORK_STATE_CALLOUT_PENDING = 1, +- WORK_STATE_TASK_PENDING = 2, +- WORK_STATE_WORK_CANCELLED = 3 +-} work_state_t; +- +-struct work_struct { +- struct task task; /* FreeBSD task */ +- work_state_t state; /* the pending or otherwise state of work. */ +- work_func_t func; +-}; +-#define spin_unlock_irqrestore mtx_unlock_irqrestore +-#define spin_unlock_bh mtx_unlock_irqrestore +-#define mtx_unlock_irqrestore(lock,x) mtx_unlock(lock); +-extern void _rtw_spinlock_init(_lock *plock); +- +-//modify private structure to match freebsd +-#define BITS_PER_LONG 32 +-union ktime { +- s64 tv64; +-#if BITS_PER_LONG != 64 && !defined(CONFIG_KTIME_SCALAR) +- struct { +-#ifdef __BIG_ENDIAN +- s32 sec, nsec; +-#else +- s32 nsec, sec; +-#endif +- } tv; +-#endif +-}; +-#define kmemcheck_bitfield_begin(name) +-#define kmemcheck_bitfield_end(name) +-#define CHECKSUM_NONE 0 +-typedef unsigned char *sk_buff_data_t; +-typedef union ktime ktime_t; /* Kill this */ +- +-void rtw_mtx_lock(_lock *plock); +- +-void rtw_mtx_unlock(_lock *plock); +- +-/** +- * struct sk_buff - socket buffer +- * @next: Next buffer in list +- * @prev: Previous buffer in list +- * @sk: Socket we are owned by +- * @tstamp: Time we arrived +- * @dev: Device we arrived on/are leaving by +- * @transport_header: Transport layer header +- * @network_header: Network layer header +- * @mac_header: Link layer header +- * @_skb_refdst: destination entry (with norefcount bit) +- * @sp: the security path, used for xfrm +- * @cb: Control buffer. Free for use by every layer. Put private vars here +- * @len: Length of actual data +- * @data_len: Data length +- * @mac_len: Length of link layer header +- * @hdr_len: writable header length of cloned skb +- * @csum: Checksum (must include start/offset pair) +- * @csum_start: Offset from skb->head where checksumming should start +- * @csum_offset: Offset from csum_start where checksum should be stored +- * @local_df: allow local fragmentation +- * @cloned: Head may be cloned (check refcnt to be sure) +- * @nohdr: Payload reference only, must not modify header +- * @pkt_type: Packet class +- * @fclone: skbuff clone status +- * @ip_summed: Driver fed us an IP checksum +- * @priority: Packet queueing priority +- * @users: User count - see {datagram,tcp}.c +- * @protocol: Packet protocol from driver +- * @truesize: Buffer size +- * @head: Head of buffer +- * @data: Data head pointer +- * @tail: Tail pointer +- * @end: End pointer +- * @destructor: Destruct function +- * @mark: Generic packet mark +- * @nfct: Associated connection, if any +- * @ipvs_property: skbuff is owned by ipvs +- * @peeked: this packet has been seen already, so stats have been +- * done for it, don't do them again +- * @nf_trace: netfilter packet trace flag +- * @nfctinfo: Relationship of this skb to the connection +- * @nfct_reasm: netfilter conntrack re-assembly pointer +- * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c +- * @skb_iif: ifindex of device we arrived on +- * @rxhash: the packet hash computed on receive +- * @queue_mapping: Queue mapping for multiqueue devices +- * @tc_index: Traffic control index +- * @tc_verd: traffic control verdict +- * @ndisc_nodetype: router type (from link layer) +- * @dma_cookie: a cookie to one of several possible DMA operations +- * done by skb DMA functions +- * @secmark: security marking +- * @vlan_tci: vlan tag control information +- */ +- +-struct sk_buff { +- /* These two members must be first. */ +- struct sk_buff *next; +- struct sk_buff *prev; +- +- ktime_t tstamp; +- +- struct sock *sk; +- //struct net_device *dev; +- struct ifnet *dev; +- +- /* +- * This is the control buffer. It is free to use for every +- * layer. Please put your private variables there. If you +- * want to keep them across layers you have to do a skb_clone() +- * first. This is owned by whoever has the skb queued ATM. +- */ +- char cb[48] __aligned(8); +- +- unsigned long _skb_refdst; +-#ifdef CONFIG_XFRM +- struct sec_path *sp; +-#endif +- unsigned int len, +- data_len; +- u16 mac_len, +- hdr_len; +- union { +- u32 csum; +- struct { +- u16 csum_start; +- u16 csum_offset; +- }smbol2; +- }smbol1; +- u32 priority; +- kmemcheck_bitfield_begin(flags1); +- u8 local_df:1, +- cloned:1, +- ip_summed:2, +- nohdr:1, +- nfctinfo:3; +- u8 pkt_type:3, +- fclone:2, +- ipvs_property:1, +- peeked:1, +- nf_trace:1; +- kmemcheck_bitfield_end(flags1); +- u16 protocol; +- +- void (*destructor)(struct sk_buff *skb); +-#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) +- struct nf_conntrack *nfct; +- struct sk_buff *nfct_reasm; +-#endif +-#ifdef CONFIG_BRIDGE_NETFILTER +- struct nf_bridge_info *nf_bridge; +-#endif +- +- int skb_iif; +-#ifdef CONFIG_NET_SCHED +- u16 tc_index; /* traffic control index */ +-#ifdef CONFIG_NET_CLS_ACT +- u16 tc_verd; /* traffic control verdict */ +-#endif +-#endif +- +- u32 rxhash; +- +- kmemcheck_bitfield_begin(flags2); +- u16 queue_mapping:16; +-#ifdef CONFIG_IPV6_NDISC_NODETYPE +- u8 ndisc_nodetype:2, +- deliver_no_wcard:1; +-#else +- u8 deliver_no_wcard:1; +-#endif +- kmemcheck_bitfield_end(flags2); +- +- /* 0/14 bit hole */ +- +-#ifdef CONFIG_NET_DMA +- dma_cookie_t dma_cookie; +-#endif +-#ifdef CONFIG_NETWORK_SECMARK +- u32 secmark; +-#endif +- union { +- u32 mark; +- u32 dropcount; +- }symbol3; +- +- u16 vlan_tci; +- +- sk_buff_data_t transport_header; +- sk_buff_data_t network_header; +- sk_buff_data_t mac_header; +- /* These elements must be at the end, see alloc_skb() for details. */ +- sk_buff_data_t tail; +- sk_buff_data_t end; +- unsigned char *head, +- *data; +- unsigned int truesize; +- atomic_t users; +-}; +-struct sk_buff_head { +- /* These two members must be first. */ +- struct sk_buff *next; +- struct sk_buff *prev; +- +- u32 qlen; +- _lock lock; +-}; +-#define skb_tail_pointer(skb) skb->tail +-static inline unsigned char *skb_put(struct sk_buff *skb, unsigned int len) +-{ +- unsigned char *tmp = skb_tail_pointer(skb); +- //SKB_LINEAR_ASSERT(skb); +- skb->tail += len; +- skb->len += len; +- return tmp; +-} +- +-static inline unsigned char *__skb_pull(struct sk_buff *skb, unsigned int len) +-{ +- skb->len -= len; +- if(skb->len < skb->data_len) +- printf("%s(),%d,error!\n",__FUNCTION__,__LINE__); +- return skb->data += len; +-} +-static inline unsigned char *skb_pull(struct sk_buff *skb, unsigned int len) +-{ +- #ifdef PLATFORM_FREEBSD +- return __skb_pull(skb, len); +- #else +- return unlikely(len > skb->len) ? NULL : __skb_pull(skb, len); +- #endif //PLATFORM_FREEBSD +-} +-static inline u32 skb_queue_len(const struct sk_buff_head *list_) +-{ +- return list_->qlen; +-} +-static inline void __skb_insert(struct sk_buff *newsk, +- struct sk_buff *prev, struct sk_buff *next, +- struct sk_buff_head *list) +-{ +- newsk->next = next; +- newsk->prev = prev; +- next->prev = prev->next = newsk; +- list->qlen++; +-} +-static inline void __skb_queue_before(struct sk_buff_head *list, +- struct sk_buff *next, +- struct sk_buff *newsk) +-{ +- __skb_insert(newsk, next->prev, next, list); +-} +-static inline void skb_queue_tail(struct sk_buff_head *list, +- struct sk_buff *newsk) +-{ +- mtx_lock(&list->lock); +- __skb_queue_before(list, (struct sk_buff *)list, newsk); +- mtx_unlock(&list->lock); +-} +-static inline struct sk_buff *skb_peek(struct sk_buff_head *list_) +-{ +- struct sk_buff *list = ((struct sk_buff *)list_)->next; +- if (list == (struct sk_buff *)list_) +- list = NULL; +- return list; +-} +-static inline void __skb_unlink(struct sk_buff *skb, struct sk_buff_head *list) +-{ +- struct sk_buff *next, *prev; +- +- list->qlen--; +- next = skb->next; +- prev = skb->prev; +- skb->next = skb->prev = NULL; +- next->prev = prev; +- prev->next = next; +-} +- +-static inline struct sk_buff *skb_dequeue(struct sk_buff_head *list) +-{ +- mtx_lock(&list->lock); +- +- struct sk_buff *skb = skb_peek(list); +- if (skb) +- __skb_unlink(skb, list); +- +- mtx_unlock(&list->lock); +- +- return skb; +-} +-static inline void skb_reserve(struct sk_buff *skb, int len) +-{ +- skb->data += len; +- skb->tail += len; +-} +-static inline void __skb_queue_head_init(struct sk_buff_head *list) +-{ +- list->prev = list->next = (struct sk_buff *)list; +- list->qlen = 0; +-} +-/* +- * This function creates a split out lock class for each invocation; +- * this is needed for now since a whole lot of users of the skb-queue +- * infrastructure in drivers have different locking usage (in hardirq) +- * than the networking core (in softirq only). In the long run either the +- * network layer or drivers should need annotation to consolidate the +- * main types of usage into 3 classes. +- */ +-static inline void skb_queue_head_init(struct sk_buff_head *list) +-{ +- _rtw_spinlock_init(&list->lock); +- __skb_queue_head_init(list); +-} +-unsigned long copy_from_user(void *to, const void *from, unsigned long n); +-unsigned long copy_to_user(void *to, const void *from, unsigned long n); +-struct sk_buff * dev_alloc_skb(unsigned int size); +-struct sk_buff *skb_clone(const struct sk_buff *skb); +-void dev_kfree_skb_any(struct sk_buff *skb); +-#endif //Baron porting from linux, it's all temp solution, needs to check again +- +- +-#if 1 // kenny add Linux compatibility code for Linux USB driver +-#include +- +-#define __init // __attribute ((constructor)) +-#define __exit // __attribute ((destructor)) +- +-/* +- * Definitions for module_init and module_exit macros. +- * +- * These macros will use the SYSINIT framework to call a specified +- * function (with no arguments) on module loading or unloading. +- * +- */ +- +-void module_init_exit_wrapper(void *arg); +- +-#define module_init(initfn) \ +- SYSINIT(mod_init_ ## initfn, \ +- SI_SUB_KLD, SI_ORDER_FIRST, \ +- module_init_exit_wrapper, initfn) +- +-#define module_exit(exitfn) \ +- SYSUNINIT(mod_exit_ ## exitfn, \ +- SI_SUB_KLD, SI_ORDER_ANY, \ +- module_init_exit_wrapper, exitfn) +- +-/* +- * The usb_register and usb_deregister functions are used to register +- * usb drivers with the usb subsystem. +- */ +-int usb_register(struct usb_driver *driver); +-int usb_deregister(struct usb_driver *driver); +- +-/* +- * usb_get_dev and usb_put_dev - increment/decrement the reference count +- * of the usb device structure. +- * +- * Original body of usb_get_dev: +- * +- * if (dev) +- * get_device(&dev->dev); +- * return dev; +- * +- * Reference counts are not currently used in this compatibility +- * layer. So these functions will do nothing. +- */ +-static inline struct usb_device * +-usb_get_dev(struct usb_device *dev) +-{ +- return dev; +-} +- +-static inline void +-usb_put_dev(struct usb_device *dev) +-{ +- return; +-} +- +- +-// rtw_usb_compat_linux +-int rtw_usb_submit_urb(struct urb *urb, uint16_t mem_flags); +-int rtw_usb_unlink_urb(struct urb *urb); +-int rtw_usb_clear_halt(struct usb_device *dev, struct usb_host_endpoint *uhe); +-int rtw_usb_control_msg(struct usb_device *dev, struct usb_host_endpoint *uhe, +- uint8_t request, uint8_t requesttype, +- uint16_t value, uint16_t index, void *data, +- uint16_t size, usb_timeout_t timeout); +-int rtw_usb_set_interface(struct usb_device *dev, uint8_t iface_no, uint8_t alt_index); +-int rtw_usb_setup_endpoint(struct usb_device *dev, +- struct usb_host_endpoint *uhe, usb_size_t bufsize); +-struct urb *rtw_usb_alloc_urb(uint16_t iso_packets, uint16_t mem_flags); +-struct usb_host_endpoint *rtw_usb_find_host_endpoint(struct usb_device *dev, uint8_t type, uint8_t ep); +-struct usb_host_interface *rtw_usb_altnum_to_altsetting(const struct usb_interface *intf, uint8_t alt_index); +-struct usb_interface *rtw_usb_ifnum_to_if(struct usb_device *dev, uint8_t iface_no); +-void *rtw_usbd_get_intfdata(struct usb_interface *intf); +-void rtw_usb_linux_register(void *arg); +-void rtw_usb_linux_deregister(void *arg); +-void rtw_usb_linux_free_device(struct usb_device *dev); +-void rtw_usb_free_urb(struct urb *urb); +-void rtw_usb_init_urb(struct urb *urb); +-void rtw_usb_kill_urb(struct urb *urb); +-void rtw_usb_set_intfdata(struct usb_interface *intf, void *data); +-void rtw_usb_fill_bulk_urb(struct urb *urb, struct usb_device *udev, +- struct usb_host_endpoint *uhe, void *buf, +- int length, usb_complete_t callback, void *arg); +-int rtw_usb_bulk_msg(struct usb_device *udev, struct usb_host_endpoint *uhe, +- void *data, int len, uint16_t *pactlen, usb_timeout_t timeout); +-void *usb_get_intfdata(struct usb_interface *intf); +-int usb_linux_init_endpoints(struct usb_device *udev); +- +- +- +-typedef struct urb * PURB; +- +-typedef unsigned gfp_t; +-#define __GFP_WAIT ((gfp_t)0x10u) /* Can wait and reschedule? */ +-#define __GFP_HIGH ((gfp_t)0x20u) /* Should access emergency pools? */ +-#define __GFP_IO ((gfp_t)0x40u) /* Can start physical IO? */ +-#define __GFP_FS ((gfp_t)0x80u) /* Can call down to low-level FS? */ +-#define __GFP_COLD ((gfp_t)0x100u) /* Cache-cold page required */ +-#define __GFP_NOWARN ((gfp_t)0x200u) /* Suppress page allocation failure warning */ +-#define __GFP_REPEAT ((gfp_t)0x400u) /* Retry the allocation. Might fail */ +-#define __GFP_NOFAIL ((gfp_t)0x800u) /* Retry for ever. Cannot fail */ +-#define __GFP_NORETRY ((gfp_t)0x1000u)/* Do not retry. Might fail */ +-#define __GFP_NO_GROW ((gfp_t)0x2000u)/* Slab internal usage */ +-#define __GFP_COMP ((gfp_t)0x4000u)/* Add compound page metadata */ +-#define __GFP_ZERO ((gfp_t)0x8000u)/* Return zeroed page on success */ +-#define __GFP_NOMEMALLOC ((gfp_t)0x10000u) /* Don't use emergency reserves */ +-#define __GFP_HARDWALL ((gfp_t)0x20000u) /* Enforce hardwall cpuset memory allocs */ +- +-/* This equals 0, but use constants in case they ever change */ +-#define GFP_NOWAIT (GFP_ATOMIC & ~__GFP_HIGH) +-/* GFP_ATOMIC means both !wait (__GFP_WAIT not set) and use emergency pool */ +-#define GFP_ATOMIC (__GFP_HIGH) +-#define GFP_NOIO (__GFP_WAIT) +-#define GFP_NOFS (__GFP_WAIT | __GFP_IO) +-#define GFP_KERNEL (__GFP_WAIT | __GFP_IO | __GFP_FS) +-#define GFP_USER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL) +-#define GFP_HIGHUSER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL | \ +- __GFP_HIGHMEM) +- +- +-#endif // kenny add Linux compatibility code for Linux USB +- +-__inline static _list *get_next(_list *list) +-{ +- return list->next; +-} +- +-__inline static _list *get_list_head(_queue *queue) +-{ +- return (&(queue->queue)); +-} +- +- +-#define LIST_CONTAINOR(ptr, type, member) \ +- ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) +- +- +-__inline static void _enter_critical(_lock *plock, _irqL *pirqL) +-{ +- spin_lock_irqsave(plock, *pirqL); +-} +- +-__inline static void _exit_critical(_lock *plock, _irqL *pirqL) +-{ +- spin_unlock_irqrestore(plock, *pirqL); +-} +- +-__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) +-{ +- spin_lock_irqsave(plock, *pirqL); +-} +- +-__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) +-{ +- spin_unlock_irqrestore(plock, *pirqL); +-} +- +-__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) +-{ +- spin_lock_bh(plock, *pirqL); +-} +- +-__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) +-{ +- spin_unlock_bh(plock, *pirqL); +-} +- +-__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) +-{ +- +- mtx_lock(pmutex); +- +-} +- +- +-__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) +-{ +- +- mtx_unlock(pmutex); +- +-} +-static inline void __list_del(struct list_head * prev, struct list_head * next) +-{ +- next->prev = prev; +- prev->next = next; +-} +-static inline void INIT_LIST_HEAD(struct list_head *list) +-{ +- list->next = list; +- list->prev = list; +-} +-__inline static void rtw_list_delete(_list *plist) +-{ +- __list_del(plist->prev, plist->next); +- INIT_LIST_HEAD(plist); +-} +- +-__inline static void _init_timer(_timer *ptimer,_nic_hdl padapter,void *pfunc,void* cntx) +-{ +- ptimer->function = pfunc; +- ptimer->arg = cntx; +- callout_init(&ptimer->callout, CALLOUT_MPSAFE); +-} +- +-__inline static void _set_timer(_timer *ptimer,u32 delay_time) +-{ +- // mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); +- if(ptimer->function && ptimer->arg){ +- rtw_mtx_lock(NULL); +- callout_reset(&ptimer->callout, delay_time,ptimer->function, ptimer->arg); +- rtw_mtx_unlock(NULL); +- } +-} +- +-__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) +-{ +- // del_timer_sync(ptimer); +- // *bcancelled= _TRUE;//TRUE ==1; FALSE==0 +- rtw_mtx_lock(NULL); +- callout_drain(&ptimer->callout); +- rtw_mtx_unlock(NULL); +-} +- +-__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) +-{ +- printf("%s Not implement yet! \n",__FUNCTION__); +-} +- +-__inline static void _set_workitem(_workitem *pwork) +-{ +- printf("%s Not implement yet! \n",__FUNCTION__); +-// schedule_work(pwork); +-} +- +-// +-// Global Mutex: can only be used at PASSIVE level. +-// +- +-#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ +-{ \ +-} +- +-#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ +-{ \ +-} +- +-#define ATOMIC_INIT(i) { (i) } +- +-static __inline void thread_enter(char *name); +- +-//Atomic integer operations +-typedef uint32_t ATOMIC_T ; +- +-#define rtw_netdev_priv(netdev) (((struct ifnet *)netdev)->if_softc) +- +-#define rtw_free_netdev(netdev) if_free((netdev)) +- +-#define NDEV_FMT "%s" +-#define NDEV_ARG(ndev) "" +-#define ADPT_FMT "%s" +-#define ADPT_ARG(adapter) "" +-#define FUNC_NDEV_FMT "%s" +-#define FUNC_NDEV_ARG(ndev) __func__ +-#define FUNC_ADPT_FMT "%s" +-#define FUNC_ADPT_ARG(adapter) __func__ +- +-#define STRUCT_PACKED +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __OSDEP_BSD_SERVICE_H_ ++#define __OSDEP_BSD_SERVICE_H_ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include "usbdevs.h" ++ ++#define USB_DEBUG_VAR rum_debug ++#include ++ ++#if 1 //Baron porting from linux, it's all temp solution, needs to check again ++#include ++#include /* XXX for PCPU_GET */ ++// typedef struct semaphore _sema; ++ typedef struct sema _sema; ++// typedef spinlock_t _lock; ++ typedef struct mtx _lock; ++ typedef struct mtx _mutex; ++ typedef struct timer_list _timer; ++ struct list_head { ++ struct list_head *next, *prev; ++ }; ++ struct __queue { ++ struct list_head queue; ++ _lock lock; ++ }; ++ ++ //typedef struct sk_buff _pkt; ++ typedef struct mbuf _pkt; ++ typedef struct mbuf _buffer; ++ ++ typedef struct __queue _queue; ++ typedef struct list_head _list; ++ typedef int _OS_STATUS; ++ //typedef u32 _irqL; ++ typedef unsigned long _irqL; ++ typedef struct ifnet * _nic_hdl; ++ ++ typedef pid_t _thread_hdl_; ++// typedef struct thread _thread_hdl_; ++ typedef void thread_return; ++ typedef void* thread_context; ++ ++ //#define thread_exit() complete_and_exit(NULL, 0) ++ ++ #define thread_exit() do{printf("%s", "RTKTHREAD_exit");}while(0) ++ ++ typedef void timer_hdl_return; ++ typedef void* timer_hdl_context; ++ typedef struct work_struct _workitem; ++ ++#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) ++/* emulate a modern version */ ++#define LINUX_VERSION_CODE KERNEL_VERSION(2, 6, 35) ++ ++#define WIRELESS_EXT -1 ++#define HZ hz ++#define spin_lock_irqsave mtx_lock_irqsave ++#define spin_lock_bh mtx_lock_irqsave ++#define mtx_lock_irqsave(lock, x) mtx_lock(lock)//{local_irq_save((x)); mtx_lock_spin((lock));} ++//#define IFT_RTW 0xf9 //ifnet allocate type for RTW ++#define free_netdev if_free ++#define LIST_CONTAINOR(ptr, type, member) \ ++ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) ++#define container_of(p,t,n) (t*)((p)-&(((t*)0)->n)) ++/* ++ * Linux timers are emulated using FreeBSD callout functions ++ * (and taskqueue functionality). ++ * ++ * Currently no timer stats functionality. ++ * ++ * See (linux_compat) processes.c ++ * ++ */ ++struct timer_list { ++ ++ /* FreeBSD callout related fields */ ++ struct callout callout; ++ ++ //timeout function ++ void (*function)(void*); ++ //argument ++ void *arg; ++ ++}; ++struct workqueue_struct; ++struct work_struct; ++typedef void (*work_func_t)(struct work_struct *work); ++/* Values for the state of an item of work (work_struct) */ ++typedef enum work_state { ++ WORK_STATE_UNSET = 0, ++ WORK_STATE_CALLOUT_PENDING = 1, ++ WORK_STATE_TASK_PENDING = 2, ++ WORK_STATE_WORK_CANCELLED = 3 ++} work_state_t; ++ ++struct work_struct { ++ struct task task; /* FreeBSD task */ ++ work_state_t state; /* the pending or otherwise state of work. */ ++ work_func_t func; ++}; ++#define spin_unlock_irqrestore mtx_unlock_irqrestore ++#define spin_unlock_bh mtx_unlock_irqrestore ++#define mtx_unlock_irqrestore(lock,x) mtx_unlock(lock); ++extern void _rtw_spinlock_init(_lock *plock); ++ ++//modify private structure to match freebsd ++#define BITS_PER_LONG 32 ++union ktime { ++ s64 tv64; ++#if BITS_PER_LONG != 64 && !defined(CONFIG_KTIME_SCALAR) ++ struct { ++#ifdef __BIG_ENDIAN ++ s32 sec, nsec; ++#else ++ s32 nsec, sec; ++#endif ++ } tv; ++#endif ++}; ++#define kmemcheck_bitfield_begin(name) ++#define kmemcheck_bitfield_end(name) ++#define CHECKSUM_NONE 0 ++typedef unsigned char *sk_buff_data_t; ++typedef union ktime ktime_t; /* Kill this */ ++ ++void rtw_mtx_lock(_lock *plock); ++ ++void rtw_mtx_unlock(_lock *plock); ++ ++/** ++ * struct sk_buff - socket buffer ++ * @next: Next buffer in list ++ * @prev: Previous buffer in list ++ * @sk: Socket we are owned by ++ * @tstamp: Time we arrived ++ * @dev: Device we arrived on/are leaving by ++ * @transport_header: Transport layer header ++ * @network_header: Network layer header ++ * @mac_header: Link layer header ++ * @_skb_refdst: destination entry (with norefcount bit) ++ * @sp: the security path, used for xfrm ++ * @cb: Control buffer. Free for use by every layer. Put private vars here ++ * @len: Length of actual data ++ * @data_len: Data length ++ * @mac_len: Length of link layer header ++ * @hdr_len: writable header length of cloned skb ++ * @csum: Checksum (must include start/offset pair) ++ * @csum_start: Offset from skb->head where checksumming should start ++ * @csum_offset: Offset from csum_start where checksum should be stored ++ * @local_df: allow local fragmentation ++ * @cloned: Head may be cloned (check refcnt to be sure) ++ * @nohdr: Payload reference only, must not modify header ++ * @pkt_type: Packet class ++ * @fclone: skbuff clone status ++ * @ip_summed: Driver fed us an IP checksum ++ * @priority: Packet queueing priority ++ * @users: User count - see {datagram,tcp}.c ++ * @protocol: Packet protocol from driver ++ * @truesize: Buffer size ++ * @head: Head of buffer ++ * @data: Data head pointer ++ * @tail: Tail pointer ++ * @end: End pointer ++ * @destructor: Destruct function ++ * @mark: Generic packet mark ++ * @nfct: Associated connection, if any ++ * @ipvs_property: skbuff is owned by ipvs ++ * @peeked: this packet has been seen already, so stats have been ++ * done for it, don't do them again ++ * @nf_trace: netfilter packet trace flag ++ * @nfctinfo: Relationship of this skb to the connection ++ * @nfct_reasm: netfilter conntrack re-assembly pointer ++ * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c ++ * @skb_iif: ifindex of device we arrived on ++ * @rxhash: the packet hash computed on receive ++ * @queue_mapping: Queue mapping for multiqueue devices ++ * @tc_index: Traffic control index ++ * @tc_verd: traffic control verdict ++ * @ndisc_nodetype: router type (from link layer) ++ * @dma_cookie: a cookie to one of several possible DMA operations ++ * done by skb DMA functions ++ * @secmark: security marking ++ * @vlan_tci: vlan tag control information ++ */ ++ ++struct sk_buff { ++ /* These two members must be first. */ ++ struct sk_buff *next; ++ struct sk_buff *prev; ++ ++ ktime_t tstamp; ++ ++ struct sock *sk; ++ //struct net_device *dev; ++ struct ifnet *dev; ++ ++ /* ++ * This is the control buffer. It is free to use for every ++ * layer. Please put your private variables there. If you ++ * want to keep them across layers you have to do a skb_clone() ++ * first. This is owned by whoever has the skb queued ATM. ++ */ ++ char cb[48] __aligned(8); ++ ++ unsigned long _skb_refdst; ++#ifdef CONFIG_XFRM ++ struct sec_path *sp; ++#endif ++ unsigned int len, ++ data_len; ++ u16 mac_len, ++ hdr_len; ++ union { ++ u32 csum; ++ struct { ++ u16 csum_start; ++ u16 csum_offset; ++ }smbol2; ++ }smbol1; ++ u32 priority; ++ kmemcheck_bitfield_begin(flags1); ++ u8 local_df:1, ++ cloned:1, ++ ip_summed:2, ++ nohdr:1, ++ nfctinfo:3; ++ u8 pkt_type:3, ++ fclone:2, ++ ipvs_property:1, ++ peeked:1, ++ nf_trace:1; ++ kmemcheck_bitfield_end(flags1); ++ u16 protocol; ++ ++ void (*destructor)(struct sk_buff *skb); ++#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) ++ struct nf_conntrack *nfct; ++ struct sk_buff *nfct_reasm; ++#endif ++#ifdef CONFIG_BRIDGE_NETFILTER ++ struct nf_bridge_info *nf_bridge; ++#endif ++ ++ int skb_iif; ++#ifdef CONFIG_NET_SCHED ++ u16 tc_index; /* traffic control index */ ++#ifdef CONFIG_NET_CLS_ACT ++ u16 tc_verd; /* traffic control verdict */ ++#endif ++#endif ++ ++ u32 rxhash; ++ ++ kmemcheck_bitfield_begin(flags2); ++ u16 queue_mapping:16; ++#ifdef CONFIG_IPV6_NDISC_NODETYPE ++ u8 ndisc_nodetype:2, ++ deliver_no_wcard:1; ++#else ++ u8 deliver_no_wcard:1; ++#endif ++ kmemcheck_bitfield_end(flags2); ++ ++ /* 0/14 bit hole */ ++ ++#ifdef CONFIG_NET_DMA ++ dma_cookie_t dma_cookie; ++#endif ++#ifdef CONFIG_NETWORK_SECMARK ++ u32 secmark; ++#endif ++ union { ++ u32 mark; ++ u32 dropcount; ++ }symbol3; ++ ++ u16 vlan_tci; ++ ++ sk_buff_data_t transport_header; ++ sk_buff_data_t network_header; ++ sk_buff_data_t mac_header; ++ /* These elements must be at the end, see alloc_skb() for details. */ ++ sk_buff_data_t tail; ++ sk_buff_data_t end; ++ unsigned char *head, ++ *data; ++ unsigned int truesize; ++ atomic_t users; ++}; ++struct sk_buff_head { ++ /* These two members must be first. */ ++ struct sk_buff *next; ++ struct sk_buff *prev; ++ ++ u32 qlen; ++ _lock lock; ++}; ++#define skb_tail_pointer(skb) skb->tail ++static inline unsigned char *skb_put(struct sk_buff *skb, unsigned int len) ++{ ++ unsigned char *tmp = skb_tail_pointer(skb); ++ //SKB_LINEAR_ASSERT(skb); ++ skb->tail += len; ++ skb->len += len; ++ return tmp; ++} ++ ++static inline unsigned char *__skb_pull(struct sk_buff *skb, unsigned int len) ++{ ++ skb->len -= len; ++ if(skb->len < skb->data_len) ++ printf("%s(),%d,error!\n",__FUNCTION__,__LINE__); ++ return skb->data += len; ++} ++static inline unsigned char *skb_pull(struct sk_buff *skb, unsigned int len) ++{ ++ #ifdef PLATFORM_FREEBSD ++ return __skb_pull(skb, len); ++ #else ++ return unlikely(len > skb->len) ? NULL : __skb_pull(skb, len); ++ #endif //PLATFORM_FREEBSD ++} ++static inline u32 skb_queue_len(const struct sk_buff_head *list_) ++{ ++ return list_->qlen; ++} ++static inline void __skb_insert(struct sk_buff *newsk, ++ struct sk_buff *prev, struct sk_buff *next, ++ struct sk_buff_head *list) ++{ ++ newsk->next = next; ++ newsk->prev = prev; ++ next->prev = prev->next = newsk; ++ list->qlen++; ++} ++static inline void __skb_queue_before(struct sk_buff_head *list, ++ struct sk_buff *next, ++ struct sk_buff *newsk) ++{ ++ __skb_insert(newsk, next->prev, next, list); ++} ++static inline void skb_queue_tail(struct sk_buff_head *list, ++ struct sk_buff *newsk) ++{ ++ mtx_lock(&list->lock); ++ __skb_queue_before(list, (struct sk_buff *)list, newsk); ++ mtx_unlock(&list->lock); ++} ++static inline struct sk_buff *skb_peek(struct sk_buff_head *list_) ++{ ++ struct sk_buff *list = ((struct sk_buff *)list_)->next; ++ if (list == (struct sk_buff *)list_) ++ list = NULL; ++ return list; ++} ++static inline void __skb_unlink(struct sk_buff *skb, struct sk_buff_head *list) ++{ ++ struct sk_buff *next, *prev; ++ ++ list->qlen--; ++ next = skb->next; ++ prev = skb->prev; ++ skb->next = skb->prev = NULL; ++ next->prev = prev; ++ prev->next = next; ++} ++ ++static inline struct sk_buff *skb_dequeue(struct sk_buff_head *list) ++{ ++ mtx_lock(&list->lock); ++ ++ struct sk_buff *skb = skb_peek(list); ++ if (skb) ++ __skb_unlink(skb, list); ++ ++ mtx_unlock(&list->lock); ++ ++ return skb; ++} ++static inline void skb_reserve(struct sk_buff *skb, int len) ++{ ++ skb->data += len; ++ skb->tail += len; ++} ++static inline void __skb_queue_head_init(struct sk_buff_head *list) ++{ ++ list->prev = list->next = (struct sk_buff *)list; ++ list->qlen = 0; ++} ++/* ++ * This function creates a split out lock class for each invocation; ++ * this is needed for now since a whole lot of users of the skb-queue ++ * infrastructure in drivers have different locking usage (in hardirq) ++ * than the networking core (in softirq only). In the long run either the ++ * network layer or drivers should need annotation to consolidate the ++ * main types of usage into 3 classes. ++ */ ++static inline void skb_queue_head_init(struct sk_buff_head *list) ++{ ++ _rtw_spinlock_init(&list->lock); ++ __skb_queue_head_init(list); ++} ++unsigned long copy_from_user(void *to, const void *from, unsigned long n); ++unsigned long copy_to_user(void *to, const void *from, unsigned long n); ++struct sk_buff * dev_alloc_skb(unsigned int size); ++struct sk_buff *skb_clone(const struct sk_buff *skb); ++void dev_kfree_skb_any(struct sk_buff *skb); ++#endif //Baron porting from linux, it's all temp solution, needs to check again ++ ++ ++#if 1 // kenny add Linux compatibility code for Linux USB driver ++#include ++ ++#define __init // __attribute ((constructor)) ++#define __exit // __attribute ((destructor)) ++ ++/* ++ * Definitions for module_init and module_exit macros. ++ * ++ * These macros will use the SYSINIT framework to call a specified ++ * function (with no arguments) on module loading or unloading. ++ * ++ */ ++ ++void module_init_exit_wrapper(void *arg); ++ ++#define module_init(initfn) \ ++ SYSINIT(mod_init_ ## initfn, \ ++ SI_SUB_KLD, SI_ORDER_FIRST, \ ++ module_init_exit_wrapper, initfn) ++ ++#define module_exit(exitfn) \ ++ SYSUNINIT(mod_exit_ ## exitfn, \ ++ SI_SUB_KLD, SI_ORDER_ANY, \ ++ module_init_exit_wrapper, exitfn) ++ ++/* ++ * The usb_register and usb_deregister functions are used to register ++ * usb drivers with the usb subsystem. ++ */ ++int usb_register(struct usb_driver *driver); ++int usb_deregister(struct usb_driver *driver); ++ ++/* ++ * usb_get_dev and usb_put_dev - increment/decrement the reference count ++ * of the usb device structure. ++ * ++ * Original body of usb_get_dev: ++ * ++ * if (dev) ++ * get_device(&dev->dev); ++ * return dev; ++ * ++ * Reference counts are not currently used in this compatibility ++ * layer. So these functions will do nothing. ++ */ ++static inline struct usb_device * ++usb_get_dev(struct usb_device *dev) ++{ ++ return dev; ++} ++ ++static inline void ++usb_put_dev(struct usb_device *dev) ++{ ++ return; ++} ++ ++ ++// rtw_usb_compat_linux ++int rtw_usb_submit_urb(struct urb *urb, uint16_t mem_flags); ++int rtw_usb_unlink_urb(struct urb *urb); ++int rtw_usb_clear_halt(struct usb_device *dev, struct usb_host_endpoint *uhe); ++int rtw_usb_control_msg(struct usb_device *dev, struct usb_host_endpoint *uhe, ++ uint8_t request, uint8_t requesttype, ++ uint16_t value, uint16_t index, void *data, ++ uint16_t size, usb_timeout_t timeout); ++int rtw_usb_set_interface(struct usb_device *dev, uint8_t iface_no, uint8_t alt_index); ++int rtw_usb_setup_endpoint(struct usb_device *dev, ++ struct usb_host_endpoint *uhe, usb_size_t bufsize); ++struct urb *rtw_usb_alloc_urb(uint16_t iso_packets, uint16_t mem_flags); ++struct usb_host_endpoint *rtw_usb_find_host_endpoint(struct usb_device *dev, uint8_t type, uint8_t ep); ++struct usb_host_interface *rtw_usb_altnum_to_altsetting(const struct usb_interface *intf, uint8_t alt_index); ++struct usb_interface *rtw_usb_ifnum_to_if(struct usb_device *dev, uint8_t iface_no); ++void *rtw_usbd_get_intfdata(struct usb_interface *intf); ++void rtw_usb_linux_register(void *arg); ++void rtw_usb_linux_deregister(void *arg); ++void rtw_usb_linux_free_device(struct usb_device *dev); ++void rtw_usb_free_urb(struct urb *urb); ++void rtw_usb_init_urb(struct urb *urb); ++void rtw_usb_kill_urb(struct urb *urb); ++void rtw_usb_set_intfdata(struct usb_interface *intf, void *data); ++void rtw_usb_fill_bulk_urb(struct urb *urb, struct usb_device *udev, ++ struct usb_host_endpoint *uhe, void *buf, ++ int length, usb_complete_t callback, void *arg); ++int rtw_usb_bulk_msg(struct usb_device *udev, struct usb_host_endpoint *uhe, ++ void *data, int len, uint16_t *pactlen, usb_timeout_t timeout); ++void *usb_get_intfdata(struct usb_interface *intf); ++int usb_linux_init_endpoints(struct usb_device *udev); ++ ++ ++ ++typedef struct urb * PURB; ++ ++typedef unsigned gfp_t; ++#define __GFP_WAIT ((gfp_t)0x10u) /* Can wait and reschedule? */ ++#define __GFP_HIGH ((gfp_t)0x20u) /* Should access emergency pools? */ ++#define __GFP_IO ((gfp_t)0x40u) /* Can start physical IO? */ ++#define __GFP_FS ((gfp_t)0x80u) /* Can call down to low-level FS? */ ++#define __GFP_COLD ((gfp_t)0x100u) /* Cache-cold page required */ ++#define __GFP_NOWARN ((gfp_t)0x200u) /* Suppress page allocation failure warning */ ++#define __GFP_REPEAT ((gfp_t)0x400u) /* Retry the allocation. Might fail */ ++#define __GFP_NOFAIL ((gfp_t)0x800u) /* Retry for ever. Cannot fail */ ++#define __GFP_NORETRY ((gfp_t)0x1000u)/* Do not retry. Might fail */ ++#define __GFP_NO_GROW ((gfp_t)0x2000u)/* Slab internal usage */ ++#define __GFP_COMP ((gfp_t)0x4000u)/* Add compound page metadata */ ++#define __GFP_ZERO ((gfp_t)0x8000u)/* Return zeroed page on success */ ++#define __GFP_NOMEMALLOC ((gfp_t)0x10000u) /* Don't use emergency reserves */ ++#define __GFP_HARDWALL ((gfp_t)0x20000u) /* Enforce hardwall cpuset memory allocs */ ++ ++/* This equals 0, but use constants in case they ever change */ ++#define GFP_NOWAIT (GFP_ATOMIC & ~__GFP_HIGH) ++/* GFP_ATOMIC means both !wait (__GFP_WAIT not set) and use emergency pool */ ++#define GFP_ATOMIC (__GFP_HIGH) ++#define GFP_NOIO (__GFP_WAIT) ++#define GFP_NOFS (__GFP_WAIT | __GFP_IO) ++#define GFP_KERNEL (__GFP_WAIT | __GFP_IO | __GFP_FS) ++#define GFP_USER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL) ++#define GFP_HIGHUSER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL | \ ++ __GFP_HIGHMEM) ++ ++ ++#endif // kenny add Linux compatibility code for Linux USB ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->next; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++ ++#define LIST_CONTAINOR(ptr, type, member) \ ++ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) ++ ++ ++__inline static void _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_bh(plock, *pirqL); ++} ++ ++__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_bh(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ ++ mtx_lock(pmutex); ++ ++} ++ ++ ++__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ ++ mtx_unlock(pmutex); ++ ++} ++static inline void __list_del(struct list_head * prev, struct list_head * next) ++{ ++ next->prev = prev; ++ prev->next = next; ++} ++static inline void INIT_LIST_HEAD(struct list_head *list) ++{ ++ list->next = list; ++ list->prev = list; ++} ++__inline static void rtw_list_delete(_list *plist) ++{ ++ __list_del(plist->prev, plist->next); ++ INIT_LIST_HEAD(plist); ++} ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl padapter,void *pfunc,void* cntx) ++{ ++ ptimer->function = pfunc; ++ ptimer->arg = cntx; ++ callout_init(&ptimer->callout, CALLOUT_MPSAFE); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ // mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); ++ if(ptimer->function && ptimer->arg){ ++ rtw_mtx_lock(NULL); ++ callout_reset(&ptimer->callout, delay_time,ptimer->function, ptimer->arg); ++ rtw_mtx_unlock(NULL); ++ } ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ // del_timer_sync(ptimer); ++ // *bcancelled= _TRUE;//TRUE ==1; FALSE==0 ++ rtw_mtx_lock(NULL); ++ callout_drain(&ptimer->callout); ++ rtw_mtx_unlock(NULL); ++} ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++ printf("%s Not implement yet! \n",__FUNCTION__); ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ printf("%s Not implement yet! \n",__FUNCTION__); ++// schedule_work(pwork); ++} ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++} ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++static __inline void thread_enter(char *name); ++ ++//Atomic integer operations ++typedef uint32_t ATOMIC_T ; ++ ++#define rtw_netdev_priv(netdev) (((struct ifnet *)netdev)->if_softc) ++ ++#define rtw_free_netdev(netdev) if_free((netdev)) ++ ++#define NDEV_FMT "%s" ++#define NDEV_ARG(ndev) "" ++#define ADPT_FMT "%s" ++#define ADPT_ARG(adapter) "" ++#define FUNC_NDEV_FMT "%s" ++#define FUNC_NDEV_ARG(ndev) __func__ ++#define FUNC_ADPT_FMT "%s" ++#define FUNC_ADPT_ARG(adapter) __func__ ++ ++#define STRUCT_PACKED ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_ce.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_ce.h +old mode 100755 +new mode 100644 +index 04c5b18..5f2a78a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_ce.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_ce.h +@@ -16,177 +16,177 @@ + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * +- ******************************************************************************/ +- +-#ifndef __OSDEP_CE_SERVICE_H_ +-#define __OSDEP_CE_SERVICE_H_ +- +- +-#include +-#include +- +-#ifdef CONFIG_SDIO_HCI +-#include "SDCardDDK.h" +-#endif +- +-#ifdef CONFIG_USB_HCI +-#include +-#endif +- +-typedef HANDLE _sema; +-typedef LIST_ENTRY _list; +-typedef NDIS_STATUS _OS_STATUS; +- +-typedef NDIS_SPIN_LOCK _lock; +- +-typedef HANDLE _rwlock; //Mutex +- +-typedef u32 _irqL; +- +-typedef NDIS_HANDLE _nic_hdl; +- +- +-typedef NDIS_MINIPORT_TIMER _timer; +- +-struct __queue { +- LIST_ENTRY queue; +- _lock lock; +-}; +- +-typedef NDIS_PACKET _pkt; +-typedef NDIS_BUFFER _buffer; +-typedef struct __queue _queue; +- +-typedef HANDLE _thread_hdl_; +-typedef DWORD thread_return; +-typedef void* thread_context; +-typedef NDIS_WORK_ITEM _workitem; +- +-#define thread_exit() ExitThread(STATUS_SUCCESS); return 0; +- +- +-#define SEMA_UPBND (0x7FFFFFFF) //8192 +- +-__inline static _list *get_prev(_list *list) +-{ +- return list->Blink; +-} +- +-__inline static _list *get_next(_list *list) +-{ +- return list->Flink; +-} +- +-__inline static _list *get_list_head(_queue *queue) +-{ +- return (&(queue->queue)); +-} +- +-#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) +- +-__inline static void _enter_critical(_lock *plock, _irqL *pirqL) +-{ +- NdisAcquireSpinLock(plock); +-} +- +-__inline static void _exit_critical(_lock *plock, _irqL *pirqL) +-{ +- NdisReleaseSpinLock(plock); +-} +- +-__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) +-{ +- NdisDprAcquireSpinLock(plock); +-} +- +-__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) +-{ +- NdisDprReleaseSpinLock(plock); +-} +- +- +-__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) +-{ +- WaitForSingleObject(*prwlock, INFINITE ); +- +-} +- +-__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) +-{ +- ReleaseMutex(*prwlock); +-} +- +-__inline static void rtw_list_delete(_list *plist) +-{ +- RemoveEntryList(plist); +- InitializeListHead(plist); +-} +- +-#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 +- +-__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) +-{ +- NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); +-} +- +-__inline static void _set_timer(_timer *ptimer,u32 delay_time) +-{ +- NdisMSetTimer(ptimer,delay_time); +-} +- +-__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) +-{ +- NdisMCancelTimer(ptimer,bcancelled); +-} +- +-__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) +-{ +- +- NdisInitializeWorkItem(pwork, pfunc, cntx); +-} +- +-__inline static void _set_workitem(_workitem *pwork) +-{ +- NdisScheduleWorkItem(pwork); +-} +- +-#define ATOMIC_INIT(i) { (i) } +- +-// +-// Global Mutex: can only be used at PASSIVE level. +-// +- +-#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ +-{ \ +- while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ +- { \ +- NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ +- NdisMSleep(10000); \ +- } \ +-} +- +-#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ +-{ \ +- NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ +-} +- +-// limitation of path length +-#define PATH_LENGTH_MAX MAX_PATH +- +-//Atomic integer operations +-#define ATOMIC_T LONG +- +-#define NDEV_FMT "%s" +-#define NDEV_ARG(ndev) "" +-#define ADPT_FMT "%s" +-#define ADPT_ARG(adapter) "" +-#define FUNC_NDEV_FMT "%s" +-#define FUNC_NDEV_ARG(ndev) __func__ +-#define FUNC_ADPT_FMT "%s" +-#define FUNC_ADPT_ARG(adapter) __func__ +- +-#define STRUCT_PACKED +- +- +-#endif +- ++ ******************************************************************************/ ++ ++#ifndef __OSDEP_CE_SERVICE_H_ ++#define __OSDEP_CE_SERVICE_H_ ++ ++ ++#include ++#include ++ ++#ifdef CONFIG_SDIO_HCI ++#include "SDCardDDK.h" ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++typedef HANDLE _sema; ++typedef LIST_ENTRY _list; ++typedef NDIS_STATUS _OS_STATUS; ++ ++typedef NDIS_SPIN_LOCK _lock; ++ ++typedef HANDLE _rwlock; //Mutex ++ ++typedef u32 _irqL; ++ ++typedef NDIS_HANDLE _nic_hdl; ++ ++ ++typedef NDIS_MINIPORT_TIMER _timer; ++ ++struct __queue { ++ LIST_ENTRY queue; ++ _lock lock; ++}; ++ ++typedef NDIS_PACKET _pkt; ++typedef NDIS_BUFFER _buffer; ++typedef struct __queue _queue; ++ ++typedef HANDLE _thread_hdl_; ++typedef DWORD thread_return; ++typedef void* thread_context; ++typedef NDIS_WORK_ITEM _workitem; ++ ++#define thread_exit() ExitThread(STATUS_SUCCESS); return 0; ++ ++ ++#define SEMA_UPBND (0x7FFFFFFF) //8192 ++ ++__inline static _list *get_prev(_list *list) ++{ ++ return list->Blink; ++} ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->Flink; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) ++ ++__inline static void _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisAcquireSpinLock(plock); ++} ++ ++__inline static void _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisReleaseSpinLock(plock); ++} ++ ++__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++ ++__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) ++{ ++ WaitForSingleObject(*prwlock, INFINITE ); ++ ++} ++ ++__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) ++{ ++ ReleaseMutex(*prwlock); ++} ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ RemoveEntryList(plist); ++ InitializeListHead(plist); ++} ++ ++#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) ++{ ++ NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ NdisMSetTimer(ptimer,delay_time); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ NdisMCancelTimer(ptimer,bcancelled); ++} ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++ ++ NdisInitializeWorkItem(pwork, pfunc, cntx); ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ NdisScheduleWorkItem(pwork); ++} ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ ++ { \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++ NdisMSleep(10000); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++} ++ ++// limitation of path length ++#define PATH_LENGTH_MAX MAX_PATH ++ ++//Atomic integer operations ++#define ATOMIC_T LONG ++ ++#define NDEV_FMT "%s" ++#define NDEV_ARG(ndev) "" ++#define ADPT_FMT "%s" ++#define ADPT_ARG(adapter) "" ++#define FUNC_NDEV_FMT "%s" ++#define FUNC_NDEV_ARG(ndev) __func__ ++#define FUNC_ADPT_FMT "%s" ++#define FUNC_ADPT_ARG(adapter) __func__ ++ ++#define STRUCT_PACKED ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_linux.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_linux.h +old mode 100755 +new mode 100644 +index 894169d..dc18d9f +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_linux.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_linux.h +@@ -1,405 +1,425 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __OSDEP_LINUX_SERVICE_H_ +-#define __OSDEP_LINUX_SERVICE_H_ +- +- #include +- #include +- #include +- #include +- #include +- #include +- #include +- #include +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,5)) +- #include +-#endif +- //#include +- #include +- #include +- #include +- #include +- #include +- #include +- #include +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) +- #include +-#else +- #include +-#endif +- #include +- #include +- #include +- #include +- #include +- #include +- #include +- #include +- #include // for struct tasklet_struct +- #include +- #include +- #include +- #include +- +-#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,41)) +- #include +-#endif +- +-#ifdef RTK_DMP_PLATFORM +-#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) +- #include +-#endif +- #include +-#endif +- +-#ifdef CONFIG_IOCTL_CFG80211 +-// #include +- #include +- #include +-#endif //CONFIG_IOCTL_CFG80211 +- +-#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX +- #include +- #include +-#endif +- +-#ifdef CONFIG_HAS_EARLYSUSPEND +- #include +-#endif //CONFIG_HAS_EARLYSUSPEND +- +-#ifdef CONFIG_EFUSE_CONFIG_FILE +- #include +-#endif //CONFIG_EFUSE_CONFIG_FILE +- +-#ifdef CONFIG_USB_HCI +- #include +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) +- #include +-#else +- #include +-#endif +-#endif +- +-#ifdef CONFIG_USB_HCI +- typedef struct urb * PURB; +-#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) +-#ifdef CONFIG_USB_SUSPEND +-#define CONFIG_AUTOSUSPEND 1 +-#endif +-#endif +-#endif +- +- typedef struct semaphore _sema; +- typedef spinlock_t _lock; +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +- typedef struct mutex _mutex; +-#else +- typedef struct semaphore _mutex; +-#endif +- typedef struct timer_list _timer; +- +- struct __queue { +- struct list_head queue; +- _lock lock; +- }; +- +- typedef struct sk_buff _pkt; +- typedef unsigned char _buffer; +- +- typedef struct __queue _queue; +- typedef struct list_head _list; +- typedef int _OS_STATUS; +- //typedef u32 _irqL; +- typedef unsigned long _irqL; +- typedef struct net_device * _nic_hdl; +- +- typedef void* _thread_hdl_; +- typedef int thread_return; +- typedef void* thread_context; +- +- #define thread_exit() complete_and_exit(NULL, 0) +- +- typedef void timer_hdl_return; +- typedef void* timer_hdl_context; +- +-#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) +- typedef struct work_struct _workitem; +-#else +- typedef struct tq_struct _workitem; +-#endif +- +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) +- #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) +-#endif +- +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)) +-// Porting from linux kernel, for compatible with old kernel. +-static inline unsigned char *skb_tail_pointer(const struct sk_buff *skb) +-{ +- return skb->tail; +-} +- +-static inline void skb_reset_tail_pointer(struct sk_buff *skb) +-{ +- skb->tail = skb->data; +-} +- +-static inline void skb_set_tail_pointer(struct sk_buff *skb, const int offset) +-{ +- skb->tail = skb->data + offset; +-} +- +-static inline unsigned char *skb_end_pointer(const struct sk_buff *skb) +-{ +- return skb->end; +-} +-#endif +- +-__inline static _list *get_next(_list *list) +-{ +- return list->next; +-} +- +-__inline static _list *get_list_head(_queue *queue) +-{ +- return (&(queue->queue)); +-} +- +- +-#define LIST_CONTAINOR(ptr, type, member) \ +- ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) +- +- +-__inline static void _enter_critical(_lock *plock, _irqL *pirqL) +-{ +- spin_lock_irqsave(plock, *pirqL); +-} +- +-__inline static void _exit_critical(_lock *plock, _irqL *pirqL) +-{ +- spin_unlock_irqrestore(plock, *pirqL); +-} +- +-__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) +-{ +- spin_lock_irqsave(plock, *pirqL); +-} +- +-__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) +-{ +- spin_unlock_irqrestore(plock, *pirqL); +-} +- +-__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) +-{ +- spin_lock_bh(plock); +-} +- +-__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) +-{ +- spin_unlock_bh(plock); +-} +- +-__inline static int _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) +-{ +- int ret = 0; +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +- //mutex_lock(pmutex); +- ret = mutex_lock_interruptible(pmutex); +-#else +- ret = down_interruptible(pmutex); +-#endif +- return ret; +-} +- +- +-__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) +-{ +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +- mutex_unlock(pmutex); +-#else +- up(pmutex); +-#endif +-} +- +-__inline static void rtw_list_delete(_list *plist) +-{ +- list_del_init(plist); +-} +- +-#define RTW_TIMER_HDL_ARGS void *FunctionContext +- +-__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,void* cntx) +-{ +- //setup_timer(ptimer, pfunc,(u32)cntx); +- ptimer->function = pfunc; +- ptimer->data = (unsigned long)cntx; +- init_timer(ptimer); +-} +- +-__inline static void _set_timer(_timer *ptimer,u32 delay_time) +-{ +- mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); +-} +- +-__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) +-{ +- del_timer_sync(ptimer); +- *bcancelled= _TRUE;//TRUE ==1; FALSE==0 +-} +- +- +-__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) +-{ +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) +- INIT_WORK(pwork, pfunc); +-#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) +- INIT_WORK(pwork, pfunc,pwork); +-#else +- INIT_TQUEUE(pwork, pfunc,pwork); +-#endif +-} +- +-__inline static void _set_workitem(_workitem *pwork) +-{ +-#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) +- schedule_work(pwork); +-#else +- schedule_task(pwork); +-#endif +-} +- +-__inline static void _cancel_workitem_sync(_workitem *pwork) +-{ +-#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) +- cancel_work_sync(pwork); +-#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) +- flush_scheduled_work(); +-#else +- flush_scheduled_tasks(); +-#endif +-} +-// +-// Global Mutex: can only be used at PASSIVE level. +-// +- +-#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ +-{ \ +- while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\ +- { \ +- atomic_dec((atomic_t *)&(_MutexCounter)); \ +- msleep(10); \ +- } \ +-} +- +-#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ +-{ \ +- atomic_dec((atomic_t *)&(_MutexCounter)); \ +-} +- +-static inline int rtw_netif_queue_stopped(struct net_device *pnetdev) +-{ +-#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) +- return (netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) && +- netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 1)) && +- netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 2)) && +- netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3)) ); +-#else +- return netif_queue_stopped(pnetdev); +-#endif +-} +- +-static inline void rtw_netif_wake_queue(struct net_device *pnetdev) +-{ +-#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) +- netif_tx_wake_all_queues(pnetdev); +-#else +- netif_wake_queue(pnetdev); +-#endif +-} +- +-static inline void rtw_netif_start_queue(struct net_device *pnetdev) +-{ +-#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) +- netif_tx_start_all_queues(pnetdev); +-#else +- netif_start_queue(pnetdev); +-#endif +-} +- +-static inline void rtw_netif_stop_queue(struct net_device *pnetdev) +-{ +-#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) +- netif_tx_stop_all_queues(pnetdev); +-#else +- netif_stop_queue(pnetdev); +-#endif +-} +- +-static inline void rtw_merge_string(char *dst, int dst_len, char *src1, char *src2) +-{ +- int len = 0; +- len += snprintf(dst+len, dst_len - len, "%s", src1); +- len += snprintf(dst+len, dst_len - len, "%s", src2); +-} +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) +-#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1) +-#else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) +-#define rtw_signal_process(pid, sig) kill_proc((pid), (sig), 1) +-#endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) +- +- +-// Suspend lock prevent system from going suspend +-#ifdef CONFIG_WAKELOCK +-#include +-#elif defined(CONFIG_ANDROID_POWER) +-#include +-#endif +- +-// limitation of path length +-#define PATH_LENGTH_MAX PATH_MAX +- +-//Atomic integer operations +-#define ATOMIC_T atomic_t +- +-#define rtw_netdev_priv(netdev) ( ((struct rtw_netdev_priv_indicator *)netdev_priv(netdev))->priv ) +- +-#define NDEV_FMT "%s" +-#define NDEV_ARG(ndev) ndev->name +-#define ADPT_FMT "%s" +-#define ADPT_ARG(adapter) adapter->pnetdev->name +-#define FUNC_NDEV_FMT "%s(%s)" +-#define FUNC_NDEV_ARG(ndev) __func__, ndev->name +-#define FUNC_ADPT_FMT "%s(%s)" +-#define FUNC_ADPT_ARG(adapter) __func__, adapter->pnetdev->name +- +-struct rtw_netdev_priv_indicator { +- void *priv; +- u32 sizeof_priv; +-}; +-struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv); +-extern struct net_device * rtw_alloc_etherdev(int sizeof_priv); +- +-#define STRUCT_PACKED __attribute__ ((packed)) +- +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __OSDEP_LINUX_SERVICE_H_ ++#define __OSDEP_LINUX_SERVICE_H_ ++ ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,5)) ++ #include ++#endif ++ //#include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ #include ++#else ++ #include ++#endif ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include // for struct tasklet_struct ++ #include ++ #include ++ #include ++ #include ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,41)) ++ #include ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 7, 0)) ++ #include ++#else ++ #include ++#endif ++ ++#ifdef RTK_DMP_PLATFORM ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) ++ #include ++#endif ++ #include ++#endif ++ ++#ifdef CONFIG_NET_RADIO ++ #define CONFIG_WIRELESS_EXT ++#endif ++ ++ /* Monitor mode */ ++ #include ++ #include ++#ifdef CONFIG_IOCTL_CFG80211 ++/* #include */ ++ #include ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ #include ++ #include ++#endif ++ ++#ifdef CONFIG_HAS_EARLYSUSPEND ++ #include ++#endif //CONFIG_HAS_EARLYSUSPEND ++ ++#ifdef CONFIG_EFUSE_CONFIG_FILE ++ #include ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ #include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) ++ #include ++#else ++ #include ++#endif ++#endif ++ ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ #include ++ #include ++ #include ++ #include ++ #include ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX ++ ++#ifdef CONFIG_USB_HCI ++ typedef struct urb * PURB; ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) ++#ifdef CONFIG_USB_SUSPEND ++#define CONFIG_AUTOSUSPEND 1 ++#endif ++#endif ++#endif ++ ++ typedef struct semaphore _sema; ++ typedef spinlock_t _lock; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ typedef struct mutex _mutex; ++#else ++ typedef struct semaphore _mutex; ++#endif ++ typedef struct timer_list _timer; ++ ++ struct __queue { ++ struct list_head queue; ++ _lock lock; ++ }; ++ ++ typedef struct sk_buff _pkt; ++ typedef unsigned char _buffer; ++ ++ typedef struct __queue _queue; ++ typedef struct list_head _list; ++ typedef int _OS_STATUS; ++ //typedef u32 _irqL; ++ typedef unsigned long _irqL; ++ typedef struct net_device * _nic_hdl; ++ ++ typedef void* _thread_hdl_; ++ typedef int thread_return; ++ typedef void* thread_context; ++ ++ #define thread_exit() complete_and_exit(NULL, 0) ++ ++ typedef void timer_hdl_return; ++ typedef void* timer_hdl_context; ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) ++ typedef struct work_struct _workitem; ++#else ++ typedef struct tq_struct _workitem; ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)) ++// Porting from linux kernel, for compatible with old kernel. ++static inline unsigned char *skb_tail_pointer(const struct sk_buff *skb) ++{ ++ return skb->tail; ++} ++ ++static inline void skb_reset_tail_pointer(struct sk_buff *skb) ++{ ++ skb->tail = skb->data; ++} ++ ++static inline void skb_set_tail_pointer(struct sk_buff *skb, const int offset) ++{ ++ skb->tail = skb->data + offset; ++} ++ ++static inline unsigned char *skb_end_pointer(const struct sk_buff *skb) ++{ ++ return skb->end; ++} ++#endif ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->next; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++ ++#define LIST_CONTAINOR(ptr, type, member) \ ++ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) ++ ++ ++__inline static void _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_bh(plock); ++} ++ ++__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_bh(plock); ++} ++ ++__inline static int _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ int ret = 0; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ //mutex_lock(pmutex); ++ ret = mutex_lock_interruptible(pmutex); ++#else ++ ret = down_interruptible(pmutex); ++#endif ++ return ret; ++} ++ ++ ++__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ mutex_unlock(pmutex); ++#else ++ up(pmutex); ++#endif ++} ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ list_del_init(plist); ++} ++ ++#define RTW_TIMER_HDL_ARGS void *FunctionContext ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,void* cntx) ++{ ++ //setup_timer(ptimer, pfunc,(u32)cntx); ++ ptimer->function = pfunc; ++ ptimer->data = (unsigned long)cntx; ++ init_timer(ptimer); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ del_timer_sync(ptimer); ++ *bcancelled = 1; ++} ++ ++ ++static inline void _init_workitem(_workitem *pwork, void *pfunc, void *cntx) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) ++ INIT_WORK(pwork, pfunc); ++#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) ++ INIT_WORK(pwork, pfunc,pwork); ++#else ++ INIT_TQUEUE(pwork, pfunc,pwork); ++#endif ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) ++ schedule_work(pwork); ++#else ++ schedule_task(pwork); ++#endif ++} ++ ++__inline static void _cancel_workitem_sync(_workitem *pwork) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) ++ cancel_work_sync(pwork); ++#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) ++ flush_scheduled_work(); ++#else ++ flush_scheduled_tasks(); ++#endif ++} ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\ ++ { \ ++ atomic_dec((atomic_t *)&(_MutexCounter)); \ ++ msleep(10); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ atomic_dec((atomic_t *)&(_MutexCounter)); \ ++} ++ ++static inline int rtw_netif_queue_stopped(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ return (netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) && ++ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 1)) && ++ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 2)) && ++ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3)) ); ++#else ++ return netif_queue_stopped(pnetdev); ++#endif ++} ++ ++static inline void rtw_netif_wake_queue(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ netif_tx_wake_all_queues(pnetdev); ++#else ++ netif_wake_queue(pnetdev); ++#endif ++} ++ ++static inline void rtw_netif_start_queue(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ netif_tx_start_all_queues(pnetdev); ++#else ++ netif_start_queue(pnetdev); ++#endif ++} ++ ++static inline void rtw_netif_stop_queue(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ netif_tx_stop_all_queues(pnetdev); ++#else ++ netif_stop_queue(pnetdev); ++#endif ++} ++ ++static inline void rtw_merge_string(char *dst, int dst_len, const char *src1, const char *src2) ++{ ++ int len = 0; ++ len += snprintf(dst+len, dst_len - len, "%s", src1); ++ len += snprintf(dst+len, dst_len - len, "%s", src2); ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) ++#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1) ++#else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) ++#define rtw_signal_process(pid, sig) kill_proc((pid), (sig), 1) ++#endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) ++ ++ ++// Suspend lock prevent system from going suspend ++#ifdef CONFIG_WAKELOCK ++#include ++#elif defined(CONFIG_ANDROID_POWER) ++#include ++#endif ++ ++// limitation of path length ++#define PATH_LENGTH_MAX PATH_MAX ++ ++//Atomic integer operations ++#define ATOMIC_T atomic_t ++ ++#define rtw_netdev_priv(netdev) ( ((struct rtw_netdev_priv_indicator *)netdev_priv(netdev))->priv ) ++ ++#define NDEV_FMT "%s" ++#define NDEV_ARG(ndev) ndev->name ++#define ADPT_FMT "%s" ++#define ADPT_ARG(adapter) adapter->pnetdev->name ++#define FUNC_NDEV_FMT "%s(%s)" ++#define FUNC_NDEV_ARG(ndev) __func__, ndev->name ++#define FUNC_ADPT_FMT "%s(%s)" ++#define FUNC_ADPT_ARG(adapter) __func__, adapter->pnetdev->name ++ ++struct rtw_netdev_priv_indicator { ++ void *priv; ++ u32 sizeof_priv; ++}; ++struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv); ++extern struct net_device * rtw_alloc_etherdev(int sizeof_priv); ++ ++#define STRUCT_PACKED __attribute__ ((packed)) ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_xp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_xp.h +old mode 100755 +new mode 100644 +index 45d54af..61b1a00 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_xp.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/osdep_service_xp.h +@@ -1,202 +1,202 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __OSDEP_LINUX_SERVICE_H_ +-#define __OSDEP_LINUX_SERVICE_H_ +- +- #include +- #include +- #include +- #include +- +-#ifdef CONFIG_USB_HCI +- #include +- #include +- #include +-#endif +- +- typedef KSEMAPHORE _sema; +- typedef LIST_ENTRY _list; +- typedef NDIS_STATUS _OS_STATUS; +- +- +- typedef NDIS_SPIN_LOCK _lock; +- +- typedef KMUTEX _mutex; +- +- typedef KIRQL _irqL; +- +- // USB_PIPE for WINCE , but handle can be use just integer under windows +- typedef NDIS_HANDLE _nic_hdl; +- +- +- typedef NDIS_MINIPORT_TIMER _timer; +- +- struct __queue { +- LIST_ENTRY queue; +- _lock lock; +- }; +- +- typedef NDIS_PACKET _pkt; +- typedef NDIS_BUFFER _buffer; +- typedef struct __queue _queue; +- +- typedef PKTHREAD _thread_hdl_; +- typedef void thread_return; +- typedef void* thread_context; +- +- typedef NDIS_WORK_ITEM _workitem; +- +- #define thread_exit() PsTerminateSystemThread(STATUS_SUCCESS); +- +- #define HZ 10000000 +- #define SEMA_UPBND (0x7FFFFFFF) //8192 +- +-__inline static _list *get_next(_list *list) +-{ +- return list->Flink; +-} +- +-__inline static _list *get_list_head(_queue *queue) +-{ +- return (&(queue->queue)); +-} +- +- +-#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) +- +- +-__inline static _enter_critical(_lock *plock, _irqL *pirqL) +-{ +- NdisAcquireSpinLock(plock); +-} +- +-__inline static _exit_critical(_lock *plock, _irqL *pirqL) +-{ +- NdisReleaseSpinLock(plock); +-} +- +- +-__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) +-{ +- NdisDprAcquireSpinLock(plock); +-} +- +-__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) +-{ +- NdisDprReleaseSpinLock(plock); +-} +- +-__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) +-{ +- NdisDprAcquireSpinLock(plock); +-} +- +-__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) +-{ +- NdisDprReleaseSpinLock(plock); +-} +- +-__inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) +-{ +- KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL); +-} +- +- +-__inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) +-{ +- KeReleaseMutex(pmutex, FALSE); +-} +- +- +-__inline static void rtw_list_delete(_list *plist) +-{ +- RemoveEntryList(plist); +- InitializeListHead(plist); +-} +- +-#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 +- +-__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) +-{ +- NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); +-} +- +-__inline static void _set_timer(_timer *ptimer,u32 delay_time) +-{ +- NdisMSetTimer(ptimer,delay_time); +-} +- +-__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) +-{ +- NdisMCancelTimer(ptimer,bcancelled); +-} +- +-__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) +-{ +- +- NdisInitializeWorkItem(pwork, pfunc, cntx); +-} +- +-__inline static void _set_workitem(_workitem *pwork) +-{ +- NdisScheduleWorkItem(pwork); +-} +- +- +-#define ATOMIC_INIT(i) { (i) } +- +-// +-// Global Mutex: can only be used at PASSIVE level. +-// +- +-#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ +-{ \ +- while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ +- { \ +- NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ +- NdisMSleep(10000); \ +- } \ +-} +- +-#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ +-{ \ +- NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ +-} +- +-// limitation of path length +-#define PATH_LENGTH_MAX MAX_PATH +- +-//Atomic integer operations +-#define ATOMIC_T LONG +- +- +-#define NDEV_FMT "%s" +-#define NDEV_ARG(ndev) "" +-#define ADPT_FMT "%s" +-#define ADPT_ARG(adapter) "" +-#define FUNC_NDEV_FMT "%s" +-#define FUNC_NDEV_ARG(ndev) __func__ +-#define FUNC_ADPT_FMT "%s" +-#define FUNC_ADPT_ARG(adapter) __func__ +- +-#define STRUCT_PACKED +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __OSDEP_LINUX_SERVICE_H_ ++#define __OSDEP_LINUX_SERVICE_H_ ++ ++ #include ++ #include ++ #include ++ #include ++ ++#ifdef CONFIG_USB_HCI ++ #include ++ #include ++ #include ++#endif ++ ++ typedef KSEMAPHORE _sema; ++ typedef LIST_ENTRY _list; ++ typedef NDIS_STATUS _OS_STATUS; ++ ++ ++ typedef NDIS_SPIN_LOCK _lock; ++ ++ typedef KMUTEX _mutex; ++ ++ typedef KIRQL _irqL; ++ ++ // USB_PIPE for WINCE , but handle can be use just integer under windows ++ typedef NDIS_HANDLE _nic_hdl; ++ ++ ++ typedef NDIS_MINIPORT_TIMER _timer; ++ ++ struct __queue { ++ LIST_ENTRY queue; ++ _lock lock; ++ }; ++ ++ typedef NDIS_PACKET _pkt; ++ typedef NDIS_BUFFER _buffer; ++ typedef struct __queue _queue; ++ ++ typedef PKTHREAD _thread_hdl_; ++ typedef void thread_return; ++ typedef void* thread_context; ++ ++ typedef NDIS_WORK_ITEM _workitem; ++ ++ #define thread_exit() PsTerminateSystemThread(STATUS_SUCCESS); ++ ++ #define HZ 10000000 ++ #define SEMA_UPBND (0x7FFFFFFF) //8192 ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->Flink; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++ ++#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) ++ ++ ++__inline static _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisReleaseSpinLock(plock); ++} ++ ++ ++__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++__inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL); ++} ++ ++ ++__inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ KeReleaseMutex(pmutex, FALSE); ++} ++ ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ RemoveEntryList(plist); ++ InitializeListHead(plist); ++} ++ ++#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) ++{ ++ NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ NdisMSetTimer(ptimer,delay_time); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ NdisMCancelTimer(ptimer,bcancelled); ++} ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++ ++ NdisInitializeWorkItem(pwork, pfunc, cntx); ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ NdisScheduleWorkItem(pwork); ++} ++ ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ ++ { \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++ NdisMSleep(10000); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++} ++ ++// limitation of path length ++#define PATH_LENGTH_MAX MAX_PATH ++ ++//Atomic integer operations ++#define ATOMIC_T LONG ++ ++ ++#define NDEV_FMT "%s" ++#define NDEV_ARG(ndev) "" ++#define ADPT_FMT "%s" ++#define ADPT_ARG(adapter) "" ++#define FUNC_NDEV_FMT "%s" ++#define FUNC_NDEV_ARG(ndev) __func__ ++#define FUNC_ADPT_FMT "%s" ++#define FUNC_ADPT_ARG(adapter) __func__ ++ ++#define STRUCT_PACKED ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/pci_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/pci_hal.h +old mode 100755 +new mode 100644 +index a37040b..0015770 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/pci_hal.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/pci_hal.h +@@ -20,31 +20,27 @@ + #ifndef __PCI_HAL_H__ + #define __PCI_HAL_H__ + +-#ifdef CONFIG_RTL8192C +-void rtl8192ce_set_hal_ops(_adapter * padapter); +-#endif +- +-#ifdef CONFIG_RTL8192D +-void rtl8192de_set_hal_ops(_adapter * padapter); +-#endif +- + #ifdef CONFIG_RTL8188E +-void rtl8188ee_set_hal_ops(_adapter * padapter); ++void rtl8188ee_set_hal_ops(_adapter *padapter); + #endif + + #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) +-void rtl8812ae_set_hal_ops(_adapter * padapter); ++void rtl8812ae_set_hal_ops(_adapter *padapter); + #endif + + #if defined(CONFIG_RTL8192E) +-void rtl8192ee_set_hal_ops(_adapter * padapter); ++void rtl8192ee_set_hal_ops(_adapter *padapter); + #endif + + #ifdef CONFIG_RTL8723B +-void rtl8723be_set_hal_ops(_adapter * padapter); ++void rtl8723be_set_hal_ops(_adapter *padapter); ++#endif ++ ++#ifdef CONFIG_RTL8814A ++void rtl8814ae_set_hal_ops(_adapter *padapter); + #endif + +-void rtw_set_hal_ops(_adapter *padapter); ++u8 rtw_set_hal_ops(_adapter *padapter); + + #endif //__PCIE_HAL_H__ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/pci_ops.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/pci_ops.h +old mode 100755 +new mode 100644 +index cc2f45d..07add16 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/pci_ops.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/pci_ops.h +@@ -22,9 +22,9 @@ + + + #ifdef CONFIG_RTL8188E +-u32 rtl8188ee_init_desc_ring(_adapter * padapter); +-u32 rtl8188ee_free_desc_ring(_adapter * padapter); +-void rtl8188ee_reset_desc_ring(_adapter * padapter); ++u32 rtl8188ee_init_desc_ring(_adapter *padapter); ++u32 rtl8188ee_free_desc_ring(_adapter *padapter); ++void rtl8188ee_reset_desc_ring(_adapter *padapter); + int rtl8188ee_interrupt(PADAPTER Adapter); + void rtl8188ee_xmit_tasklet(void *priv); + void rtl8188ee_recv_tasklet(void *priv); +@@ -32,35 +32,10 @@ void rtl8188ee_prepare_bcn_tasklet(void *priv); + void rtl8188ee_set_intf_ops(struct _io_ops *pops); + #endif + +- +-#ifdef CONFIG_RTL8192C +-u32 rtl8192ce_init_desc_ring(_adapter * padapter); +-u32 rtl8192ce_free_desc_ring(_adapter * padapter); +-void rtl8192ce_reset_desc_ring(_adapter * padapter); +-int rtl8192ce_interrupt(PADAPTER Adapter); +-void rtl8192ce_xmit_tasklet(void *priv); +-void rtl8192ce_recv_tasklet(void *priv); +-void rtl8192ce_prepare_bcn_tasklet(void *priv); +-void rtl8192ce_set_intf_ops(struct _io_ops *pops); +-#endif +- +-#ifdef CONFIG_RTL8192D +-u32 rtl8192de_init_desc_ring(_adapter * padapter); +-u32 rtl8192de_free_desc_ring(_adapter * padapter); +-void rtl8192de_reset_desc_ring(_adapter * padapter); +-int rtl8192de_interrupt(PADAPTER Adapter); +-void rtl8192de_xmit_tasklet(void *priv); +-void rtl8192de_recv_tasklet(void *priv); +-void rtl8192de_prepare_bcn_tasklet(void *priv); +-void rtl8192de_set_intf_ops(struct _io_ops *pops); +-u32 MpReadPCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u8 Direct); +-void MpWritePCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u32 Value, IN u8 Direct); +-#endif +- + #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) +-u32 rtl8812ae_init_desc_ring(_adapter * padapter); +-u32 rtl8812ae_free_desc_ring(_adapter * padapter); +-void rtl8812ae_reset_desc_ring(_adapter * padapter); ++u32 rtl8812ae_init_desc_ring(_adapter *padapter); ++u32 rtl8812ae_free_desc_ring(_adapter *padapter); ++void rtl8812ae_reset_desc_ring(_adapter *padapter); + int rtl8812ae_interrupt(PADAPTER Adapter); + void rtl8812ae_xmit_tasklet(void *priv); + void rtl8812ae_recv_tasklet(void *priv); +@@ -69,9 +44,9 @@ void rtl8812ae_set_intf_ops(struct _io_ops *pops); + #endif + + #ifdef CONFIG_RTL8192E +-u32 rtl8192ee_init_desc_ring(_adapter * padapter); +-u32 rtl8192ee_free_desc_ring(_adapter * padapter); +-void rtl8192ee_reset_desc_ring(_adapter * padapter); ++u32 rtl8192ee_init_desc_ring(_adapter *padapter); ++u32 rtl8192ee_free_desc_ring(_adapter *padapter); ++void rtl8192ee_reset_desc_ring(_adapter *padapter); + void rtl8192ee_recv_tasklet(void *priv); + void rtl8192ee_prepare_bcn_tasklet(void *priv); + int rtl8192ee_interrupt(PADAPTER Adapter); +@@ -79,14 +54,25 @@ void rtl8192ee_set_intf_ops(struct _io_ops *pops); + #endif + + #ifdef CONFIG_RTL8723B +-u32 rtl8723be_init_desc_ring(_adapter * padapter); +-u32 rtl8723be_free_desc_ring(_adapter * padapter); +-void rtl8723be_reset_desc_ring(_adapter * padapter); ++u32 rtl8723be_init_desc_ring(_adapter *padapter); ++u32 rtl8723be_free_desc_ring(_adapter *padapter); ++void rtl8723be_reset_desc_ring(_adapter *padapter); + int rtl8723be_interrupt(PADAPTER Adapter); + void rtl8723be_recv_tasklet(void *priv); + void rtl8723be_prepare_bcn_tasklet(void *priv); + void rtl8723be_set_intf_ops(struct _io_ops *pops); + #endif + ++#ifdef CONFIG_RTL8814A ++u32 rtl8814ae_init_desc_ring(_adapter *padapter); ++u32 rtl8814ae_free_desc_ring(_adapter *padapter); ++void rtl8814ae_reset_desc_ring(_adapter *padapter); ++int rtl8814ae_interrupt(PADAPTER Adapter); ++void rtl8814ae_xmit_tasklet(void *priv); ++void rtl8814ae_recv_tasklet(void *priv); ++void rtl8814ae_prepare_bcn_tasklet(void *priv); ++void rtl8814ae_set_intf_ops(struct _io_ops *pops); ++#endif ++ + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/pci_osintf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/pci_osintf.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/recv_osdep.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/recv_osdep.h +old mode 100755 +new mode 100644 +index e101337..0a65313 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/recv_osdep.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/recv_osdep.h +@@ -29,8 +29,12 @@ extern s32 rtw_recv_entry(union recv_frame *precv_frame); + extern int rtw_recv_indicatepkt(_adapter *adapter, union recv_frame *precv_frame); + extern void rtw_recv_returnpacket(IN _nic_hdl cnxt, IN _pkt *preturnedpkt); + ++extern int rtw_recv_monitor(_adapter *padapter, union recv_frame *precv_frame); ++ + extern void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame); +-extern void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup); ++ ++struct sta_info; ++extern void rtw_handle_tkip_mic_err(_adapter *padapter, struct sta_info *sta, u8 bgroup); + + + int rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_cmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_cmd.h +old mode 100755 +new mode 100644 +index cc417a2..9fc2ad6 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_cmd.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_cmd.h +@@ -65,7 +65,7 @@ typedef enum _RTL8188E_H2C_CMD_ID + //Class DM + H2C_DM_MACID_CFG =0x40, + H2C_DM_TXBF =0x41, +- ++ H2C_RSSI_REPORT =0x42, + //Class BT + H2C_BT_COEX_MASK =0x60, + H2C_BT_COEX_GPIO_MODE =0x61, +@@ -142,9 +142,11 @@ typedef struct _RSVDPAGE_LOC_88E { + void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); + void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); + u8 rtl8188e_set_rssi_cmd(PADAPTER padapter, u8 *param); +-u8 rtl8188e_set_raid_cmd(PADAPTER padapter, u32 mask); +-void rtl8188e_Add_RateATid(PADAPTER padapter, u32 bitmap, u8* arg, u8 rssi_level); ++u8 rtl8188e_set_raid_cmd(_adapter *padapter, u32 bitmap, u8 *arg); ++void rtl8188e_Add_RateATid(PADAPTER padapter, u64 rate_bitmap, u8 *arg, u8 rssi_level); ++s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); + //u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); ++u8 GetTxBufferRsvdPageNum8188E(_adapter *padapter, bool wowlan); + + + #ifdef CONFIG_P2P +@@ -152,7 +154,6 @@ void rtl8188e_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); + #endif //CONFIG_P2P + + void CheckFwRsvdPageContent(PADAPTER padapter); +-void rtl8188e_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt ); + + #ifdef CONFIG_TSF_RESET_OFFLOAD + //u8 rtl8188e_reset_tsf(_adapter *padapter, u8 reset_port); +@@ -162,74 +163,6 @@ int reset_tsf(PADAPTER Adapter, u8 reset_port ); + //#define H2C_8188E_RSVDPAGE_LOC_LEN 5 + //#define H2C_8188E_AOAC_RSVDPAGE_LOC_LEN 7 + +-#ifdef CONFIG_WOWLAN +-typedef struct _SETWOWLAN_PARM{ +- u8 mode; +- u8 gpio_index; +- u8 gpio_duration; +- u8 second_mode; +- u8 reserve; +-}SETWOWLAN_PARM, *PSETWOWLAN_PARM; +- +-typedef struct _SETAOAC_GLOBAL_INFO{ +- u8 pairwiseEncAlg; +- u8 groupEncAlg; +-}SETAOAC_GLOBAL_INFO, *PSETAOAC_GLOBAL_INFO; +- +-/* move to hal_com_h2c.h +-#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) +-#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) +-#define cpIpAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3]) +- +-// +-// ARP packet +-// +-// LLC Header +-#define GET_ARP_PKT_LLC_TYPE(__pHeader) ReadEF2Byte( ((u8*)(__pHeader)) + 6) +- +-//ARP element +-#define GET_ARP_PKT_OPERATION(__pHeader) ReadEF2Byte( ((u8*)(__pHeader)) + 6) +-#define GET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+8) +-#define GET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr((u8*)(_val), ((u8*)(__pHeader))+14) +-#define GET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+18) +- +-#define SET_ARP_PKT_HW(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 0, __Value) +-#define SET_ARP_PKT_PROTOCOL(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 2, __Value) +-#define SET_ARP_PKT_HW_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 4, __Value) +-#define SET_ARP_PKT_PROTOCOL_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 5, __Value) +-#define SET_ARP_PKT_OPERATION(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 6, __Value) +-#define SET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+8, (u8*)(_val)) +-#define SET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr(((u8*)(__pHeader))+14, (u8*)(_val)) +-#define SET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+18, (u8*)(_val)) +-#define SET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr(((u8*)(__pHeader))+24, (u8*)(_val)) +- +-#define FW_WOWLAN_FUN_EN BIT(0) +-#define FW_WOWLAN_PATTERN_MATCH BIT(1) +-#define FW_WOWLAN_MAGIC_PKT BIT(2) +-#define FW_WOWLAN_UNICAST BIT(3) +-#define FW_WOWLAN_ALL_PKT_DROP BIT(4) +-#define FW_WOWLAN_GPIO_ACTIVE BIT(5) +-#define FW_WOWLAN_REKEY_WAKEUP BIT(6) +-#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) +- +-#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) +-#define FW_FW_PARSE_MAGIC_PKT BIT(1) +- +-#define FW_WOWLAN_KEEP_ALIVE_EN BIT(0) +-#define FW_WOWLAN_KEEP_ALIVE_PKT_TYPE BIT(2) +- +-#define FW_REMOTE_WAKE_CTRL_EN BIT(0) +-#define FW_ARP_EN BIT(1) +-#define FW_REALWOWLAN_EN BIT(5) +-#define FW_WOW_FW_UNICAST_EN BIT(7) +- +-#define FW_ADOPT_USER BIT(1) +-*/ +-void rtl8188es_set_wowlan_cmd(_adapter* padapter, u8 enable); +-void SetFwRelatedForWoWLAN8188ES(_adapter* padapter, u8 bHostIsGoingtoSleep); +- +-#endif//CONFIG_WOWLAN +- + //---------------------------------------------------------------------------------------------------------// + //---------------------------------- H2C CMD CONTENT --------------------------------------------------// + //---------------------------------------------------------------------------------------------------------// +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_dm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_dm.h +old mode 100755 +new mode 100644 +index eb97de1..d6637a5 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_dm.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_dm.h +@@ -29,9 +29,5 @@ void rtl8188e_HalDmWatchDog(IN PADAPTER Adapter); + + //void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); + +-#ifdef CONFIG_ANTENNA_DIVERSITY +-void AntDivCompare8188E(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); +-u8 AntDivBeforeLink8188E(PADAPTER Adapter ); +-#endif + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_hal.h +old mode 100755 +new mode 100644 +index df06a09..782a979 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_hal.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_hal.h +@@ -1,309 +1,335 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8188E_HAL_H__ +-#define __RTL8188E_HAL_H__ +- +-//#include "hal_com.h" +-#if 1 +-#include "hal_data.h" +-#else +-#include "../hal/OUTSRC/odm_precomp.h" +-#endif +- +-//include HAL Related header after HAL Related compiling flags +-#include "rtl8188e_spec.h" +-#include "Hal8188EPhyReg.h" +-#include "Hal8188EPhyCfg.h" +-#include "rtl8188e_rf.h" +-#include "rtl8188e_dm.h" +-#include "rtl8188e_recv.h" +-#include "rtl8188e_xmit.h" +-#include "rtl8188e_cmd.h" +-#include "rtl8188e_led.h" +-#include "Hal8188EPwrSeq.h" +-#ifdef DBG_CONFIG_ERROR_DETECT +-#include "rtl8188e_sreset.h" +-#endif +- +-#if 0 +- // Fw Array +- #define Rtl8188E_FwImageArray Rtl8188EFwImgArray +- #define Rtl8188E_FWImgArrayLength Rtl8188EFWImgArrayLength +-#ifdef CONFIG_WOWLAN +- #define Rtl8188E_FwWoWImageArray Array_MP_8188E_FW_WoWLAN +- #define Rtl8188E_FwWoWImgArrayLength ArrayLength_MP_8188E_FW_WoWLAN +-#endif //CONFIG_WOWLAN +-#endif +- +- +- #define RTL8188E_FW_IMG "rtl8188e/FW_NIC.bin" +- #define RTL8188E_FW_WW_IMG "rtl8188e/FW_WoWLAN.bin" +- #define RTL8188E_PHY_REG "rtl8188e/PHY_REG.txt" +- #define RTL8188E_PHY_RADIO_A "rtl8188e/RadioA.txt" +- #define RTL8188E_PHY_RADIO_B "rtl8188e/RadioB.txt" +- #define RTL8188E_TXPWR_TRACK "rtl8188e/TxPowerTrack.txt" +- #define RTL8188E_AGC_TAB "rtl8188e/AGC_TAB.txt" +- #define RTL8188E_PHY_MACREG "rtl8188e/MAC_REG.txt" +- #define RTL8188E_PHY_REG_PG "rtl8188e/PHY_REG_PG.txt" +- #define RTL8188E_PHY_REG_MP "rtl8188e/PHY_REG_MP.txt" +- #define RTL8188E_TXPWR_LMT "rtl8188e/TXPWR_LMT.txt" +- +- //--------------------------------------------------------------------- +- // RTL8188E Power Configuration CMDs for USB/SDIO/PCIE interfaces +- //--------------------------------------------------------------------- +- #define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow +- #define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow +- #define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow +- #define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow +- #define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow +- #define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow +- #define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow +- #define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow +- #define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow +- +- +-#if 1 // download firmware related data structure +-#define FW_8188E_SIZE 0x4000 //16384,16k +-#define FW_8188E_START_ADDRESS 0x1000 +-#define FW_8188E_END_ADDRESS 0x1FFF //0x5FFF +- +- +- +- +-#define IS_FW_HEADER_EXIST_88E(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0) +- +-typedef struct _RT_FIRMWARE_8188E { +- FIRMWARE_SOURCE eFWSource; +-#ifdef CONFIG_EMBEDDED_FWIMG +- u8* szFwBuffer; +-#else +- u8 szFwBuffer[FW_8188E_SIZE]; +-#endif +- u32 ulFwLength; +-} RT_FIRMWARE_8188E, *PRT_FIRMWARE_8188E; +- +-// +-// This structure must be cared byte-ordering +-// +- +-typedef struct _RT_8188E_FIRMWARE_HDR +-{ +- // 8-byte alinment required +- +- //--- LONG WORD 0 ---- +- u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut +- u8 Category; // AP/NIC and USB/PCI +- u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions +- u16 Version; // FW Version +- u8 Subversion; // FW Subversion, default 0x00 +- u16 Rsvd1; +- +- +- //--- LONG WORD 1 ---- +- u8 Month; // Release time Month field +- u8 Date; // Release time Date field +- u8 Hour; // Release time Hour field +- u8 Minute; // Release time Minute field +- u16 RamCodeSize; // The size of RAM code +- u8 Foundry; +- u8 Rsvd2; +- +- //--- LONG WORD 2 ---- +- u32 SvnIdx; // The SVN entry index +- u32 Rsvd3; +- +- //--- LONG WORD 3 ---- +- u32 Rsvd4; +- u32 Rsvd5; +-}RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR; +-#endif // download firmware related data structure +- +- +-#define DRIVER_EARLY_INT_TIME_8188E 0x05 +-#define BCN_DMA_ATIME_INT_TIME_8188E 0x02 +- +- +-#define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 //9k for 88E nornal chip , //MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) +-//#define MAX_RX_DMA_BUFFER_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2400:0x3C00) +- +- +-#define MAX_TX_REPORT_BUFFER_SIZE 0x0400 // 1k +- +- +-// Note: We will divide number of page equally for each queue other than public queue! +-// 22k = 22528 bytes = 176 pages (@page = 128 bytes) +-// must reserved about 7 pages for LPS => 176-7 = 169 (0xA9) +-// 2*BCN / 1*ps-poll / 1*null-data /1*prob_rsp /1*QOS null-data /1*BT QOS null-data +- +-#define BCNQ_PAGE_NUM_88E 0x08 +- +-//For WoWLan , more reserved page +-#ifdef CONFIG_WOWLAN +-#define WOWLAN_PAGE_NUM_88E 0x00 +-#else +-#define WOWLAN_PAGE_NUM_88E 0x00 +-#endif +- +-#define TX_TOTAL_PAGE_NUMBER_88E (0xB0 - BCNQ_PAGE_NUM_88E - WOWLAN_PAGE_NUM_88E) +-#define TX_PAGE_BOUNDARY_88E (TX_TOTAL_PAGE_NUMBER_88E + 1) +- +-#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E TX_TOTAL_PAGE_NUMBER_88E +-#define WMM_NORMAL_TX_PAGE_BOUNDARY_88E (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E + 1) +- +-// For Normal Chip Setting +-// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B +-#define NORMAL_PAGE_NUM_HPQ_88E 0x00 +-#define NORMAL_PAGE_NUM_LPQ_88E 0x09 +-#define NORMAL_PAGE_NUM_NPQ_88E 0x00 +- +-// Note: For Normal Chip Setting, modify later +-#define WMM_NORMAL_PAGE_NUM_HPQ_88E 0x29 +-#define WMM_NORMAL_PAGE_NUM_LPQ_88E 0x1C +-#define WMM_NORMAL_PAGE_NUM_NPQ_88E 0x1C +- +- +-//------------------------------------------------------------------------- +-// Chip specific +-//------------------------------------------------------------------------- +-#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) +-#define CHIP_BONDING_92C_1T2R 0x1 +-#define CHIP_BONDING_88C_USB_MCARD 0x2 +-#define CHIP_BONDING_88C_USB_HP 0x1 +- +-//------------------------------------------------------------------------- +-// Channel Plan +-//------------------------------------------------------------------------- +- +- +-#define EFUSE_REAL_CONTENT_LEN 512 +-#define EFUSE_MAP_LEN 128 +-#define EFUSE_MAX_SECTION 16 +-#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. +-#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) +-// +-// +-// To prevent out of boundary programming case, +-// leave 1byte and program full section +-// 9bytes + 1byt + 5bytes and pre 1byte. +-// For worst case: +-// | 1byte|----8bytes----|1byte|--5bytes--| +-// | | Reserved(14bytes) | +-// +-#define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. +- +-#define EFUSE_REAL_CONTENT_LEN_88E 256 +-#define EFUSE_MAP_LEN_88E 512 +-#define EFUSE_MAX_SECTION_88E 64 +-#define EFUSE_MAX_WORD_UNIT_88E 4 +-#define EFUSE_IC_ID_OFFSET_88E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. +-#define AVAILABLE_EFUSE_ADDR_88E(addr) (addr < EFUSE_REAL_CONTENT_LEN_88E) +-// To prevent out of boundary programming case, leave 1byte and program full section +-// 9bytes + 1byt + 5bytes and pre 1byte. +-// For worst case: +-// | 2byte|----8bytes----|1byte|--7bytes--| //92D +-#define EFUSE_OOB_PROTECT_BYTES_88E 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. +-#define EFUSE_PROTECT_BYTES_BANK_88E 16 +- +- +-//======================================================== +-// EFUSE for BT definition +-//======================================================== +-#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 +-#define EFUSE_BT_MAP_LEN 1024 // 1k bytes +-#define EFUSE_BT_MAX_SECTION 128 // 1024/8 +- +-#define EFUSE_PROTECT_BYTES_BANK 16 +- +-#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) +-#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) +- +-//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) +- +-//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) +- +-#ifdef CONFIG_PCI_HCI +-void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); +-void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); +-#endif //CONFIG_PCI_HCI +- +-// rtl8188e_hal_init.c +- +-s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); +-void _8051Reset88E(PADAPTER padapter); +-void rtl8188e_InitializeFirmwareVars(PADAPTER padapter); +- +- +-s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy); +- +-// EFuse +-u8 GetEEPROMSize8188E(PADAPTER padapter); +-void Hal_InitPGData88E(PADAPTER padapter); +-void Hal_EfuseParseIDCode88E(PADAPTER padapter, u8 *hwinfo); +-void Hal_ReadTxPowerInfo88E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail); +- +-void Hal_EfuseParseEEPROMVer88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void rtl8188e_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void Hal_EfuseParseCustomerID88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void Hal_ReadAntennaDiversity88E (PADAPTER pAdapter,u8*PROMContent,BOOLEAN AutoLoadFail); +-void Hal_ReadThermalMeter_88E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail); +-void Hal_EfuseParseXtal_8188E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); +-void Hal_EfuseParseBoardType88E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); +-void Hal_ReadPowerSavingMode88E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); +- +-BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter); +- +-#ifdef CONFIG_WOWLAN +-void Hal_DetectWoWMode(PADAPTER pAdapter); +-#endif //CONFIG_WOWLAN +-//RT_CHANNEL_DOMAIN rtl8723a_HalMapChannelPlan(PADAPTER padapter, u8 HalChannelPlan); +-//VERSION_8192C rtl8723a_ReadChipVersion(PADAPTER padapter); +-//void rtl8723a_ReadBluetoothCoexistInfo(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoloadFail); +-void Hal_InitChannelPlan(PADAPTER padapter); +- +-#ifdef CONFIG_RF_GAIN_OFFSET +-void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); +-#endif //CONFIG_RF_GAIN_OFFSET +- +-void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc); +- +-// register +-void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); +- +-void rtl8188e_start_thread(_adapter *padapter); +-void rtl8188e_stop_thread(_adapter *padapter); +- +-void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter,int data_len); +-#ifdef CONFIG_IOL_EFUSE_PATCH +-s32 rtl8188e_iol_efuse_patch(PADAPTER padapter); +-#endif//CONFIG_IOL_EFUSE_PATCH +-void _InitTransferPageSize(PADAPTER padapter); +- +-void SetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); +-void GetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); +-void ResumeTxBeacon(PADAPTER padapter); +-void StopTxBeacon(PADAPTER padapter); +-u8 +-GetHalDefVar8188E( +- IN PADAPTER Adapter, +- IN HAL_DEF_VARIABLE eVariable, +- IN PVOID pValue +- ); +-#endif //__RTL8188E_HAL_H__ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188E_HAL_H__ ++#define __RTL8188E_HAL_H__ ++ ++//#include "hal_com.h" ++#include "hal_data.h" ++ ++//include HAL Related header after HAL Related compiling flags ++#include "rtl8188e_spec.h" ++#include "Hal8188EPhyReg.h" ++#include "Hal8188EPhyCfg.h" ++#include "rtl8188e_rf.h" ++#include "rtl8188e_dm.h" ++#include "rtl8188e_recv.h" ++#include "rtl8188e_xmit.h" ++#include "rtl8188e_cmd.h" ++#include "rtl8188e_led.h" ++#include "Hal8188EPwrSeq.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8188e_sreset.h" ++#endif ++ ++#if 0 ++ // Fw Array ++ #define Rtl8188E_FwImageArray Rtl8188EFwImgArray ++ #define Rtl8188E_FWImgArrayLength Rtl8188EFWImgArrayLength ++#ifdef CONFIG_WOWLAN ++ #define Rtl8188E_FwWoWImageArray Array_MP_8188E_FW_WoWLAN ++ #define Rtl8188E_FwWoWImgArrayLength ArrayLength_MP_8188E_FW_WoWLAN ++#endif //CONFIG_WOWLAN ++#endif ++ ++ ++ #define RTL8188E_FW_IMG "rtl8188e/FW_NIC.bin" ++ #define RTL8188E_FW_WW_IMG "rtl8188e/FW_WoWLAN.bin" ++ #define RTL8188E_PHY_REG "rtl8188e/PHY_REG.txt" ++ #define RTL8188E_PHY_RADIO_A "rtl8188e/RadioA.txt" ++ #define RTL8188E_PHY_RADIO_B "rtl8188e/RadioB.txt" ++ #define RTL8188E_TXPWR_TRACK "rtl8188e/TxPowerTrack.txt" ++ #define RTL8188E_AGC_TAB "rtl8188e/AGC_TAB.txt" ++ #define RTL8188E_PHY_MACREG "rtl8188e/MAC_REG.txt" ++ #define RTL8188E_PHY_REG_PG "rtl8188e/PHY_REG_PG.txt" ++ #define RTL8188E_PHY_REG_MP "rtl8188e/PHY_REG_MP.txt" ++ #define RTL8188E_TXPWR_LMT "rtl8188e/TXPWR_LMT.txt" ++ ++ //--------------------------------------------------------------------- ++ // RTL8188E Power Configuration CMDs for USB/SDIO/PCIE interfaces ++ //--------------------------------------------------------------------- ++ #define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow ++ #define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow ++ #define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow ++ #define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow ++ #define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow ++ #define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow ++ #define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow ++ #define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow ++ #define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow ++ ++ ++#if 1 // download firmware related data structure ++#define MAX_FW_8188E_SIZE 0x8000 //32768,32k / 16384,16k ++ ++#define FW_8188E_SIZE 0x4000 //16384,16k ++#define FW_8188E_SIZE_2 0x8000 //32768,32k ++ ++#define FW_8188E_START_ADDRESS 0x1000 ++#define FW_8188E_END_ADDRESS 0x1FFF //0x5FFF ++ ++ ++#define IS_FW_HEADER_EXIST_88E(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0) ++ ++typedef struct _RT_FIRMWARE_8188E { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[MAX_FW_8188E_SIZE]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8188E, *PRT_FIRMWARE_8188E; ++ ++// ++// This structure must be cared byte-ordering ++// ++ ++typedef struct _RT_8188E_FIRMWARE_HDR ++{ ++ // 8-byte alinment required ++ ++ //--- LONG WORD 0 ---- ++ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++ u8 Category; // AP/NIC and USB/PCI ++ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++ u16 Version; // FW Version ++ u8 Subversion; // FW Subversion, default 0x00 ++ u16 Rsvd1; ++ ++ ++ //--- LONG WORD 1 ---- ++ u8 Month; // Release time Month field ++ u8 Date; // Release time Date field ++ u8 Hour; // Release time Hour field ++ u8 Minute; // Release time Minute field ++ u16 RamCodeSize; // The size of RAM code ++ u8 Foundry; ++ u8 Rsvd2; ++ ++ //--- LONG WORD 2 ---- ++ u32 SvnIdx; // The SVN entry index ++ u32 Rsvd3; ++ ++ //--- LONG WORD 3 ---- ++ u32 Rsvd4; ++ u32 Rsvd5; ++}RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR; ++#endif // download firmware related data structure ++ ++ ++#define DRIVER_EARLY_INT_TIME_8188E 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8188E 0x02 ++ ++ ++//#define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 //9k for 88E nornal chip , //MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) ++#define RX_DMA_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2800:0x4000) ++ ++#ifdef CONFIG_WOWLAN ++#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ ++#else ++#define RESV_FMWF 0 ++#endif ++ ++#define RX_DMA_RESERVD_FW_FEATURE 0x200 /* for tx report (64*8) */ ++ ++#define MAX_RX_DMA_BUFFER_SIZE_88E(__Adapter) RX_DMA_SIZE_88E(__Adapter)-RX_DMA_RESERVD_FW_FEATURE ++ ++#define MAX_TX_REPORT_BUFFER_SIZE 0x0400 /* 1k */ ++ ++// Note: We will divide number of page equally for each queue other than public queue! ++// 22k = 22528 bytes = 176 pages (@page = 128 bytes) ++// must reserved about 7 pages for LPS => 176-7 = 169 (0xA9) ++// 2*BCN / 1*ps-poll / 1*null-data /1*prob_rsp /1*QOS null-data /1*BT QOS null-data ++ ++#define BCNQ_PAGE_NUM_88E 0x08 ++ ++//For WoWLan , more reserved page ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_88E 0x00 ++#else ++#define WOWLAN_PAGE_NUM_88E 0x00 ++#endif ++ ++/* Note: ++Tx FIFO Size : previous CUT:22K /I_CUT after:32KB ++Tx page Size : 128B ++Total page numbers : 176(0xB0) / 256(0x100) ++*/ ++#define TOTAL_PAGE_NUMBER_88E(_Adapter) ((IS_VENDOR_8188E_I_CUT_SERIES(_Adapter)?0x100:0xB0) - 1)/* must reserved 1 page for dma issue */ ++#define TX_TOTAL_PAGE_NUMBER_88E(_Adapter) (TOTAL_PAGE_NUMBER_88E(_Adapter) - BCNQ_PAGE_NUM_88E - WOWLAN_PAGE_NUM_88E) ++#define TX_PAGE_BOUNDARY_88E(_Adapter) (TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) /* beacon header start address */ ++ ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) TX_TOTAL_PAGE_NUMBER_88E(_Adapter) ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_88E(_Adapter) (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B ++#define NORMAL_PAGE_NUM_HPQ_88E 0x0 ++#define NORMAL_PAGE_NUM_LPQ_88E 0x09 ++#define NORMAL_PAGE_NUM_NPQ_88E 0x0 ++ ++// Note: For Normal Chip Setting, modify later ++#define WMM_NORMAL_PAGE_NUM_HPQ_88E 0x29 ++#define WMM_NORMAL_PAGE_NUM_LPQ_88E 0x1C ++#define WMM_NORMAL_PAGE_NUM_NPQ_88E 0x1C ++ ++ ++//------------------------------------------------------------------------- ++// Chip specific ++//------------------------------------------------------------------------- ++#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) ++#define CHIP_BONDING_92C_1T2R 0x1 ++#define CHIP_BONDING_88C_USB_MCARD 0x2 ++#define CHIP_BONDING_88C_USB_HP 0x1 ++ ++//------------------------------------------------------------------------- ++// Channel Plan ++//------------------------------------------------------------------------- ++ ++ ++#define EFUSE_REAL_CONTENT_LEN 512 ++#define EFUSE_MAP_LEN 128 ++#define EFUSE_MAX_SECTION 16 ++#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) ++// ++// ++// To prevent out of boundary programming case, ++// leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 1byte|----8bytes----|1byte|--5bytes--| ++// | | Reserved(14bytes) | ++// ++#define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. ++ ++#define EFUSE_REAL_CONTENT_LEN_88E 256 ++#define EFUSE_MAP_LEN_88E 512 ++#define EFUSE_MAX_SECTION_88E 64 ++#define EFUSE_MAX_WORD_UNIT_88E 4 ++#define EFUSE_IC_ID_OFFSET_88E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR_88E(addr) (addr < EFUSE_REAL_CONTENT_LEN_88E) ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 2byte|----8bytes----|1byte|--7bytes--| //92D ++#define EFUSE_OOB_PROTECT_BYTES_88E 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. ++#define EFUSE_PROTECT_BYTES_BANK_88E 16 ++ ++ ++//======================================================== ++// EFUSE for BT definition ++//======================================================== ++#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 ++#define EFUSE_BT_MAP_LEN 1024 // 1k bytes ++#define EFUSE_BT_MAX_SECTION 128 // 1024/8 ++ ++#define EFUSE_PROTECT_BYTES_BANK 16 ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) ++ ++//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) ++ ++#ifdef CONFIG_PCI_HCI ++ /* according to the define in the rtw_xmit.h, rtw_recv.h */ ++#define TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ ++#ifdef CONFIG_CONCURRENT_MODE ++/*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM<<1)*/ /* 256 */ ++#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+(TXDESC_NUM>>1)) /* 320 */ ++/*#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+TXDESC_NUM)*/ /* 384 */ ++#else ++#define BE_QUEUE_TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ ++/*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM+(TXDESC_NUM>>1)) *//* 192 */ ++#endif ++ ++void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); ++void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++#endif //CONFIG_PCI_HCI ++ ++// rtl8188e_hal_init.c ++ ++s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); ++void _8051Reset88E(PADAPTER padapter); ++void rtl8188e_InitializeFirmwareVars(PADAPTER padapter); ++ ++ ++s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy); ++ ++// EFuse ++u8 GetEEPROMSize8188E(PADAPTER padapter); ++void Hal_InitPGData88E(PADAPTER padapter); ++void Hal_EfuseParseIDCode88E(PADAPTER padapter, u8 *hwinfo); ++void Hal_ReadTxPowerInfo88E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++ ++void Hal_EfuseParseEEPROMVer88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void rtl8188e_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseCustomerID88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_ReadAntennaDiversity88E (PADAPTER pAdapter,u8*PROMContent,BOOLEAN AutoLoadFail); ++void Hal_ReadThermalMeter_88E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail); ++void Hal_EfuseParseXtal_8188E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_EfuseParseBoardType88E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadPowerSavingMode88E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadPAType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++void Hal_ReadAmplifierType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++void Hal_ReadRFEType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++ ++BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter); ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++ ++#ifdef CONFIG_RF_GAIN_OFFSET ++void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++#endif //CONFIG_RF_GAIN_OFFSET ++ ++void rtl8188e_init_default_value(_adapter *adapter); ++ ++void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8188e(_adapter *adapter); ++ ++// register ++void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); ++ ++void rtl8188e_start_thread(_adapter *padapter); ++void rtl8188e_stop_thread(_adapter *padapter); ++ ++void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter,int data_len); ++#ifdef CONFIG_IOL_EFUSE_PATCH ++s32 rtl8188e_iol_efuse_patch(PADAPTER padapter); ++#endif//CONFIG_IOL_EFUSE_PATCH ++void _InitTransferPageSize(PADAPTER padapter); ++ ++void SetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); ++void GetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); ++void ResumeTxBeacon(PADAPTER padapter); ++void StopTxBeacon(PADAPTER padapter); ++u8 ++GetHalDefVar8188E( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ); ++#endif //__RTL8188E_HAL_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_led.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_led.h +old mode 100755 +new mode 100644 +index c5e3800..c18ffb8 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_led.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_led.h +@@ -1,41 +1,41 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8188E_LED_H__ +-#define __RTL8188E_LED_H__ +- +- +-//================================================================================ +-// Interface to manipulate LED objects. +-//================================================================================ +-#ifdef CONFIG_USB_HCI +-void rtl8188eu_InitSwLeds(PADAPTER padapter); +-void rtl8188eu_DeInitSwLeds(PADAPTER padapter); +-#endif +-#ifdef CONFIG_PCI_HCI +-void rtl8188ee_InitSwLeds(PADAPTER padapter); +-void rtl8188ee_DeInitSwLeds(PADAPTER padapter); +-#endif +-#ifdef CONFIG_SDIO_HCI +-void rtl8188es_InitSwLeds(PADAPTER padapter); +-void rtl8188es_DeInitSwLeds(PADAPTER padapter); +-#endif +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188E_LED_H__ ++#define __RTL8188E_LED_H__ ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8188eu_InitSwLeds(PADAPTER padapter); ++void rtl8188eu_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8188ee_InitSwLeds(PADAPTER padapter); ++void rtl8188ee_DeInitSwLeds(PADAPTER padapter); ++#endif ++#if defined (CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++void rtl8188es_InitSwLeds(PADAPTER padapter); ++void rtl8188es_DeInitSwLeds(PADAPTER padapter); ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_recv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_recv.h +old mode 100755 +new mode 100644 +index df6e59f..a1c3e31 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_recv.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_recv.h +@@ -1,139 +1,175 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8188E_RECV_H__ +-#define __RTL8188E_RECV_H__ +- +-#include +- +-#define TX_RPT1_PKT_LEN 8 +- +-typedef struct rxreport_8188e +-{ +- //Offset 0 +- u32 pktlen:14; +- u32 crc32:1; +- u32 icverr:1; +- u32 drvinfosize:4; +- u32 security:3; +- u32 qos:1; +- u32 shift:2; +- u32 physt:1; +- u32 swdec:1; +- u32 ls:1; +- u32 fs:1; +- u32 eor:1; +- u32 own:1; +- +- //Offset 4 +- u32 macid:5; +- u32 tid:4; +- u32 hwrsvd:4; +- u32 amsdu:1; +- u32 paggr:1; +- u32 faggr:1; +- u32 a1fit:4; +- u32 a2fit:4; +- u32 pam:1; +- u32 pwr:1; +- u32 md:1; +- u32 mf:1; +- u32 type:2; +- u32 mc:1; +- u32 bc:1; +- +- //Offset 8 +- u32 seq:12; +- u32 frag:4; +- u32 nextpktlen:14; +- u32 nextind:1; +- u32 rsvd0831:1; +- +- //Offset 12 +- u32 rxmcs:6; +- u32 rxht:1; +- u32 gf:1; +- u32 splcp:1; +- u32 bw:1; +- u32 htc:1; +- u32 eosp:1; +- u32 bssidfit:2; +- u32 rpt_sel:2; +- u32 rsvd1216:13; +- u32 pattern_match:1; +- u32 unicastwake:1; +- u32 magicwake:1; +- +- //Offset 16 +- /* +- u32 pattern0match:1; +- u32 pattern1match:1; +- u32 pattern2match:1; +- u32 pattern3match:1; +- u32 pattern4match:1; +- u32 pattern5match:1; +- u32 pattern6match:1; +- u32 pattern7match:1; +- u32 pattern8match:1; +- u32 pattern9match:1; +- u32 patternamatch:1; +- u32 patternbmatch:1; +- u32 patterncmatch:1; +- u32 rsvd1613:19; +- */ +- u32 rsvd16; +- +- //Offset 20 +- u32 tsfl; +- +- //Offset 24 +- u32 bassn:12; +- u32 bavld:1; +- u32 rsvd2413:19; +-} RXREPORT, *PRXREPORT; +- +- +-#ifdef CONFIG_SDIO_HCI +-s32 rtl8188es_init_recv_priv(PADAPTER padapter); +-void rtl8188es_free_recv_priv(PADAPTER padapter); +-void rtl8188es_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); +-#endif +- +-#ifdef CONFIG_USB_HCI +-#define INTERRUPT_MSG_FORMAT_LEN 60 +-void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); +-s32 rtl8188eu_init_recv_priv(PADAPTER padapter); +-void rtl8188eu_free_recv_priv(PADAPTER padapter); +-void rtl8188eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); +-void rtl8188eu_recv_tasklet(void *priv); +- +-#endif +- +-#ifdef CONFIG_PCI_HCI +-s32 rtl8188ee_init_recv_priv(PADAPTER padapter); +-void rtl8188ee_free_recv_priv(PADAPTER padapter); +-#endif +- +-void rtl8188e_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat); +-void rtl8188e_process_phy_info(PADAPTER padapter, void *prframe); +-void update_recvframe_phyinfo_88e(union recv_frame *precvframe,struct phy_stat *pphy_status); +-void update_recvframe_attrib_88e( union recv_frame *precvframe, struct recv_stat *prxstat); +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188E_RECV_H__ ++#define __RTL8188E_RECV_H__ ++ ++#define RECV_BLK_SZ 512 ++#define RECV_BLK_CNT 16 ++#define RECV_BLK_TH RECV_BLK_CNT ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ //#define MAX_RECVBUF_SZ (32768) // 32k ++ //#define MAX_RECVBUF_SZ (16384) //16K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ #ifdef CONFIG_PLATFORM_MSTAR ++ #define MAX_RECVBUF_SZ (8192) // 8K ++ #else ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ #endif ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ ++#define MAX_RECVBUF_SZ (10240) ++ ++#endif ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++#define TX_RPT1_PKT_LEN 8 ++ ++typedef struct rxreport_8188e ++{ ++ //Offset 0 ++ u32 pktlen:14; ++ u32 crc32:1; ++ u32 icverr:1; ++ u32 drvinfosize:4; ++ u32 security:3; ++ u32 qos:1; ++ u32 shift:2; ++ u32 physt:1; ++ u32 swdec:1; ++ u32 ls:1; ++ u32 fs:1; ++ u32 eor:1; ++ u32 own:1; ++ ++ //Offset 4 ++ u32 macid:5; ++ u32 tid:4; ++ u32 hwrsvd:4; ++ u32 amsdu:1; ++ u32 paggr:1; ++ u32 faggr:1; ++ u32 a1fit:4; ++ u32 a2fit:4; ++ u32 pam:1; ++ u32 pwr:1; ++ u32 md:1; ++ u32 mf:1; ++ u32 type:2; ++ u32 mc:1; ++ u32 bc:1; ++ ++ //Offset 8 ++ u32 seq:12; ++ u32 frag:4; ++ u32 nextpktlen:14; ++ u32 nextind:1; ++ u32 rsvd0831:1; ++ ++ //Offset 12 ++ u32 rxmcs:6; ++ u32 rxht:1; ++ u32 gf:1; ++ u32 splcp:1; ++ u32 bw:1; ++ u32 htc:1; ++ u32 eosp:1; ++ u32 bssidfit:2; ++ u32 rpt_sel:2; ++ u32 rsvd1216:13; ++ u32 pattern_match:1; ++ u32 unicastwake:1; ++ u32 magicwake:1; ++ ++ //Offset 16 ++ /* ++ u32 pattern0match:1; ++ u32 pattern1match:1; ++ u32 pattern2match:1; ++ u32 pattern3match:1; ++ u32 pattern4match:1; ++ u32 pattern5match:1; ++ u32 pattern6match:1; ++ u32 pattern7match:1; ++ u32 pattern8match:1; ++ u32 pattern9match:1; ++ u32 patternamatch:1; ++ u32 patternbmatch:1; ++ u32 patterncmatch:1; ++ u32 rsvd1613:19; ++ */ ++ u32 rsvd16; ++ ++ //Offset 20 ++ u32 tsfl; ++ ++ //Offset 24 ++ u32 bassn:12; ++ u32 bavld:1; ++ u32 rsvd2413:19; ++} RXREPORT, *PRXREPORT; ++ ++ ++#if defined (CONFIG_SDIO_HCI)||defined(CONFIG_GSPI_HCI) ++s32 rtl8188es_init_recv_priv(PADAPTER padapter); ++void rtl8188es_free_recv_priv(PADAPTER padapter); ++void rtl8188es_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++s32 rtl8188eu_init_recv_priv(PADAPTER padapter); ++void rtl8188eu_free_recv_priv(PADAPTER padapter); ++void rtl8188eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); ++void rtl8188eu_recv_tasklet(void *priv); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8188ee_init_recv_priv(PADAPTER padapter); ++void rtl8188ee_free_recv_priv(PADAPTER padapter); ++#endif ++ ++void rtl8188e_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *prxstat); ++ ++#endif /* __RTL8188E_RECV_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_rf.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_spec.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_spec.h +old mode 100755 +new mode 100644 +index 535862c..c5fc9e2 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_spec.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_spec.h +@@ -1,157 +1,165 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- *******************************************************************************/ +-#ifndef __RTL8188E_SPEC_H__ +-#define __RTL8188E_SPEC_H__ +- +- +-//============================================================ +-// 8188E Regsiter offset definition +-//============================================================ +- +- +-//============================================================ +-// +-//============================================================ +- +-//----------------------------------------------------- +-// +-// 0x0000h ~ 0x00FFh System Configuration +-// +-//----------------------------------------------------- +-#define REG_BB_PAD_CTRL 0x0064 +-#define REG_HMEBOX_E0 0x0088 +-#define REG_HMEBOX_E1 0x008A +-#define REG_HMEBOX_E2 0x008C +-#define REG_HMEBOX_E3 0x008E +-#define REG_HMEBOX_EXT_0 0x01F0 +-#define REG_HMEBOX_EXT_1 0x01F4 +-#define REG_HMEBOX_EXT_2 0x01F8 +-#define REG_HMEBOX_EXT_3 0x01FC +-#define REG_HIMR_88E 0x00B0 //RTL8188E +-#define REG_HISR_88E 0x00B4 //RTL8188E +-#define REG_HIMRE_88E 0x00B8 //RTL8188E +-#define REG_HISRE_88E 0x00BC //RTL8188E +-#define REG_MACID_NO_LINK_0 0x0484 +-#define REG_MACID_NO_LINK_1 0x0488 +- +-//----------------------------------------------------- +-// +-// 0x0100h ~ 0x01FFh MACTOP General Configuration +-// +-//----------------------------------------------------- +-#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) +-#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) +-#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) +-#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN +- +-//----------------------------------------------------- +-// +-// 0x0200h ~ 0x027Fh TXDMA Configuration +-// +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// +-// 0x0280h ~ 0x02FFh RXDMA Configuration +-// +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// +-// 0x0300h ~ 0x03FFh PCIe +-// +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// +-// 0x0400h ~ 0x047Fh Protocol Configuration +-// +-//----------------------------------------------------- +-#ifdef CONFIG_WOWLAN +-#define REG_TXPKTBUF_IV_LOW 0x01a4 +-#define REG_TXPKTBUF_IV_HIGH 0x01a8 +-#endif +- +-//----------------------------------------------------- +-// +-// 0x0500h ~ 0x05FFh EDCA Configuration +-// +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// +-// 0x0600h ~ 0x07FFh WMAC Configuration +-// +-//----------------------------------------------------- +-#ifdef CONFIG_RF_GAIN_OFFSET +-#define EEPROM_RF_GAIN_OFFSET 0xC1 +-#define EEPROM_RF_GAIN_VAL 0xF6 +-#define EEPROM_THERMAL_OFFSET 0xF5 +-#endif //CONFIG_RF_GAIN_OFFSET +-//---------------------------------------------------------------------------- +-// 88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits) +-//---------------------------------------------------------------------------- +-//IOL config for REG_FDHM0(Reg0x88) +-#define CMD_INIT_LLT BIT0 +-#define CMD_READ_EFUSE_MAP BIT1 +-#define CMD_EFUSE_PATCH BIT2 +-#define CMD_IOCONFIG BIT3 +-#define CMD_INIT_LLT_ERR BIT4 +-#define CMD_READ_EFUSE_MAP_ERR BIT5 +-#define CMD_EFUSE_PATCH_ERR BIT6 +-#define CMD_IOCONFIG_ERR BIT7 +- +-//----------------------------------------------------- +-// +-// Redifine register definition for compatibility +-// +-//----------------------------------------------------- +- +-// TODO: use these definition when using REG_xxx naming rule. +-// NOTE: DO NOT Remove these definition. Use later. +-#define ISR_88E REG_HISR_88E +- +-#ifdef CONFIG_PCI_HCI +-//#define IMR_RX_MASK (IMR_ROK_88E|IMR_RDU_88E|IMR_RXFOVW_88E) +-#define IMR_TX_MASK (IMR_VODOK_88E|IMR_VIDOK_88E|IMR_BEDOK_88E|IMR_BKDOK_88E|IMR_MGNTDOK_88E|IMR_HIGHDOK_88E|IMR_BCNDERR0_88E) +- +-#ifdef CONFIG_CONCURRENT_MODE +-#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E | IMR_BCNDMAINT_E_88E) +-#else +-#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E) +-#endif +- +-#define RT_AC_INT_MASKS (IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E|IMR_BKDOK_88E) +-#endif +- +- +-//======================================================== +-// General definitions +-//======================================================== +- +- +-//---------------------------------------------------------------------------- +-// 8192C EEPROM/EFUSE share register definition. +-//---------------------------------------------------------------------------- +- +-#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. +-#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. +- +-#endif //__RTL8188E_SPEC_H__ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8188E_SPEC_H__ ++#define __RTL8188E_SPEC_H__ ++ ++ ++//============================================================ ++// 8188E Regsiter offset definition ++//============================================================ ++ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_BB_PAD_CTRL 0x0064 ++#define REG_HMEBOX_E0 0x0088 ++#define REG_HMEBOX_E1 0x008A ++#define REG_HMEBOX_E2 0x008C ++#define REG_HMEBOX_E3 0x008E ++#define REG_HMEBOX_EXT_0 0x01F0 ++#define REG_HMEBOX_EXT_1 0x01F4 ++#define REG_HMEBOX_EXT_2 0x01F8 ++#define REG_HMEBOX_EXT_3 0x01FC ++#define REG_HIMR_88E 0x00B0 //RTL8188E ++#define REG_HISR_88E 0x00B4 //RTL8188E ++#define REG_HIMRE_88E 0x00B8 //RTL8188E ++#define REG_HISRE_88E 0x00BC //RTL8188E ++#define REG_MACID_NO_LINK_0 0x0484 ++#define REG_MACID_NO_LINK_1 0x0488 ++#define REG_MACID_PAUSE_0 0x048c ++#define REG_MACID_PAUSE_1 0x0490 ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) ++#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) ++#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) ++#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#ifdef CONFIG_WOWLAN ++#define REG_TXPKTBUF_IV_LOW 0x01a4 ++#define REG_TXPKTBUF_IV_HIGH 0x01a8 ++#endif ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#ifdef CONFIG_RF_GAIN_OFFSET ++#define EEPROM_RF_GAIN_OFFSET 0xC1 ++#define EEPROM_RF_GAIN_VAL 0xF6 ++#define EEPROM_THERMAL_OFFSET 0xF5 ++#endif //CONFIG_RF_GAIN_OFFSET ++//---------------------------------------------------------------------------- ++// 88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits) ++//---------------------------------------------------------------------------- ++//IOL config for REG_FDHM0(Reg0x88) ++#define CMD_INIT_LLT BIT0 ++#define CMD_READ_EFUSE_MAP BIT1 ++#define CMD_EFUSE_PATCH BIT2 ++#define CMD_IOCONFIG BIT3 ++#define CMD_INIT_LLT_ERR BIT4 ++#define CMD_READ_EFUSE_MAP_ERR BIT5 ++#define CMD_EFUSE_PATCH_ERR BIT6 ++#define CMD_IOCONFIG_ERR BIT7 ++ ++//----------------------------------------------------- ++// ++// Redifine register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++#define ISR_88E REG_HISR_88E ++ ++#ifdef CONFIG_PCI_HCI ++//#define IMR_RX_MASK (IMR_ROK_88E|IMR_RDU_88E|IMR_RXFOVW_88E) ++#define IMR_TX_MASK (IMR_VODOK_88E|IMR_VIDOK_88E|IMR_BEDOK_88E|IMR_BKDOK_88E|IMR_MGNTDOK_88E|IMR_HIGHDOK_88E|IMR_BCNDERR0_88E) ++ ++#ifdef CONFIG_CONCURRENT_MODE ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E | IMR_BCNDMAINT_E_88E) ++#else ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E) ++#endif ++ ++#define RT_AC_INT_MASKS (IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E|IMR_BKDOK_88E) ++#endif ++ ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_88E 64 ++#define SEC_CAM_ENT_NUM_88E 32 ++#define NSS_NUM_88E 1 ++#define BAND_CAP_88E (BAND_CAP_2G) ++#define BW_CAP_88E (BW_CAP_20M | BW_CAP_40M) ++#define PROTO_CAP_88E (PROTO_CAP_11B|PROTO_CAP_11G|PROTO_CAP_11N) ++ ++//---------------------------------------------------------------------------- ++// 8192C EEPROM/EFUSE share register definition. ++//---------------------------------------------------------------------------- ++ ++#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. ++#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. ++ ++#endif /* __RTL8188E_SPEC_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_sreset.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_sreset.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_xmit.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_xmit.h +old mode 100755 +new mode 100644 +index ef88d94..9ed6164 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_xmit.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_xmit.h +@@ -1,307 +1,299 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8188E_XMIT_H__ +-#define __RTL8188E_XMIT_H__ +- +- +-// +-// Queue Select Value in TxDesc +-// +-#define QSLT_BK 0x2//0x01 +-#define QSLT_BE 0x0 +-#define QSLT_VI 0x5//0x4 +-#define QSLT_VO 0x7//0x6 +-#define QSLT_BEACON 0x10 +-#define QSLT_HIGH 0x11 +-#define QSLT_MGNT 0x12 +-#define QSLT_CMD 0x13 +- +-//For 88e early mode +-#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) +-#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) +-#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) +-#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) +-#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) +-#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) +-#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) +- +-// +-//defined for TX DESC Operation +-// +- +-#define MAX_TID (15) +- +-//OFFSET 0 +-#define OFFSET_SZ 0 +-#define OFFSET_SHT 16 +-#define BMC BIT(24) +-#define LSG BIT(26) +-#define FSG BIT(27) +-#define OWN BIT(31) +- +- +-//OFFSET 4 +-#define PKT_OFFSET_SZ 0 +-#define QSEL_SHT 8 +-#define RATE_ID_SHT 16 +-#define NAVUSEHDR BIT(20) +-#define SEC_TYPE_SHT 22 +-#define PKT_OFFSET_SHT 26 +- +-//OFFSET 8 +-#define AGG_EN BIT(12) +-#define AGG_BK BIT(16) +-#define AMPDU_DENSITY_SHT 20 +-#define ANTSEL_A BIT(24) +-#define ANTSEL_B BIT(25) +-#define TX_ANT_CCK_SHT 26 +-#define TX_ANTL_SHT 28 +-#define TX_ANT_HT_SHT 30 +- +-//OFFSET 12 +-#define SEQ_SHT 16 +-#define EN_HWSEQ BIT(31) +- +-//OFFSET 16 +-#define QOS BIT(6) +-#define HW_SSN BIT(7) +-#define USERATE BIT(8) +-#define DISDATAFB BIT(10) +-#define CTS_2_SELF BIT(11) +-#define RTS_EN BIT(12) +-#define HW_RTS_EN BIT(13) +-#define DATA_SHORT BIT(24) +-#define PWR_STATUS_SHT 15 +-#define DATA_SC_SHT 20 +-#define DATA_BW BIT(25) +- +-//OFFSET 20 +-#define RTY_LMT_EN BIT(17) +- +- +-//OFFSET 20 +-#define SGI BIT(6) +-#define USB_TXAGG_NUM_SHT 24 +- +-typedef struct txdesc_88e +-{ +- //Offset 0 +- u32 pktlen:16; +- u32 offset:8; +- u32 bmc:1; +- u32 htc:1; +- u32 ls:1; +- u32 fs:1; +- u32 linip:1; +- u32 noacm:1; +- u32 gf:1; +- u32 own:1; +- +- //Offset 4 +- u32 macid:6; +- u32 rsvd0406:2; +- u32 qsel:5; +- u32 rd_nav_ext:1; +- u32 lsig_txop_en:1; +- u32 pifs:1; +- u32 rate_id:4; +- u32 navusehdr:1; +- u32 en_desc_id:1; +- u32 sectype:2; +- u32 rsvd0424:2; +- u32 pkt_offset:5; // unit: 8 bytes +- u32 rsvd0431:1; +- +- //Offset 8 +- u32 rts_rc:6; +- u32 data_rc:6; +- u32 agg_en:1; +- u32 rd_en:1; +- u32 bar_rty_th:2; +- u32 bk:1; +- u32 morefrag:1; +- u32 raw:1; +- u32 ccx:1; +- u32 ampdu_density:3; +- u32 bt_null:1; +- u32 ant_sel_a:1; +- u32 ant_sel_b:1; +- u32 tx_ant_cck:2; +- u32 tx_antl:2; +- u32 tx_ant_ht:2; +- +- //Offset 12 +- u32 nextheadpage:8; +- u32 tailpage:8; +- u32 seq:12; +- u32 cpu_handle:1; +- u32 tag1:1; +- u32 trigger_int:1; +- u32 hwseq_en:1; +- +- //Offset 16 +- u32 rtsrate:5; +- u32 ap_dcfe:1; +- u32 hwseq_sel:2; +- u32 userate:1; +- u32 disrtsfb:1; +- u32 disdatafb:1; +- u32 cts2self:1; +- u32 rtsen:1; +- u32 hw_rts_en:1; +- u32 port_id:1; +- u32 pwr_status:3; +- u32 wait_dcts:1; +- u32 cts2ap_en:1; +- u32 data_sc:2; +- u32 data_stbc:2; +- u32 data_short:1; +- u32 data_bw:1; +- u32 rts_short:1; +- u32 rts_bw:1; +- u32 rts_sc:2; +- u32 vcs_stbc:2; +- +- //Offset 20 +- u32 datarate:6; +- u32 sgi:1; +- u32 try_rate:1; +- u32 data_ratefb_lmt:5; +- u32 rts_ratefb_lmt:4; +- u32 rty_lmt_en:1; +- u32 data_rt_lmt:6; +- u32 usb_txagg_num:8; +- +- //Offset 24 +- u32 txagg_a:5; +- u32 txagg_b:5; +- u32 use_max_len:1; +- u32 max_agg_num:5; +- u32 mcsg1_max_len:4; +- u32 mcsg2_max_len:4; +- u32 mcsg3_max_len:4; +- u32 mcs7_sgi_max_len:4; +- +- //Offset 28 +- u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) +- u32 sw0:8; /* offset 30 */ +- u32 sw1:4; +- u32 mcs15_sgi_max_len:4; +-}TXDESC_8188E, *PTXDESC_8188E; +- +-#define txdesc_set_ccx_sw_88e(txdesc, value) \ +- do { \ +- ((struct txdesc_88e *)(txdesc))->sw1 = (((value)>>8) & 0x0f); \ +- ((struct txdesc_88e *)(txdesc))->sw0 = ((value) & 0xff); \ +- } while (0) +- +-struct txrpt_ccx_88e { +- /* offset 0 */ +- u8 tag1:1; +- u8 pkt_num:3; +- u8 txdma_underflow:1; +- u8 int_bt:1; +- u8 int_tri:1; +- u8 int_ccx:1; +- +- /* offset 1 */ +- u8 mac_id:6; +- u8 pkt_ok:1; +- u8 bmc:1; +- +- /* offset 2 */ +- u8 retry_cnt:6; +- u8 lifetime_over:1; +- u8 retry_over:1; +- +- /* offset 3 */ +- u8 ccx_qtime0; +- u8 ccx_qtime1; +- +- /* offset 5 */ +- u8 final_data_rate; +- +- /* offset 6 */ +- u8 sw1:4; +- u8 qsel:4; +- +- /* offset 7 */ +- u8 sw0; +-}; +- +-#define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8)) +-#define txrpt_ccx_qtime_88e(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) +- +-#define SET_TX_DESC_SEC_TYPE_8188E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) +- +-void rtl8188e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen, +- u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); +-#ifdef CONFIG_SDIO_HCI +-s32 rtl8188es_init_xmit_priv(PADAPTER padapter); +-void rtl8188es_free_xmit_priv(PADAPTER padapter); +-s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-s32 rtl8188es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); +-thread_return rtl8188es_xmit_thread(thread_context context); +-s32 rtl8188es_xmit_buf_handler(PADAPTER padapter); +- +-#ifdef CONFIG_SDIO_TX_TASKLET +-void rtl8188es_xmit_tasklet(void *priv); +-#endif +-#endif +- +-#ifdef CONFIG_USB_HCI +-s32 rtl8188eu_init_xmit_priv(PADAPTER padapter); +-void rtl8188eu_free_xmit_priv(PADAPTER padapter); +-s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8188eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-s32 rtl8188eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); +-s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter); +-void rtl8188eu_xmit_tasklet(void *priv); +-s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); +-#endif +- +-#ifdef CONFIG_PCI_HCI +-s32 rtl8188ee_init_xmit_priv(PADAPTER padapter); +-void rtl8188ee_free_xmit_priv(PADAPTER padapter); +-void rtl8188ee_xmitframe_resume(_adapter *padapter); +-s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-s32 rtl8188ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); +-void rtl8188ee_xmit_tasklet(void *priv); +-#endif +- +- +- +-#ifdef CONFIG_TX_EARLY_MODE +-void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); +-#endif +- +-#ifdef CONFIG_XMIT_ACK +-void dump_txrpt_ccx_88e(void *buf); +-void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf); +-#else +-#define dump_txrpt_ccx_88e(buf) do {} while(0) +-#define handle_txrpt_ccx_88e(adapter, buf) do {} while(0) +-#endif //CONFIG_XMIT_ACK +- +-void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); +-#endif //__RTL8188E_XMIT_H__ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188E_XMIT_H__ ++#define __RTL8188E_XMIT_H__ ++ ++ ++ ++ ++//For 88e early mode ++#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) ++#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) ++#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) ++#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) ++#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) ++#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) ++#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) ++ ++// ++//defined for TX DESC Operation ++// ++ ++#define MAX_TID (15) ++ ++//OFFSET 0 ++#define OFFSET_SZ 0 ++#define OFFSET_SHT 16 ++#define BMC BIT(24) ++#define LSG BIT(26) ++#define FSG BIT(27) ++#define OWN BIT(31) ++ ++ ++//OFFSET 4 ++#define PKT_OFFSET_SZ 0 ++#define QSEL_SHT 8 ++#define RATE_ID_SHT 16 ++#define NAVUSEHDR BIT(20) ++#define SEC_TYPE_SHT 22 ++#define PKT_OFFSET_SHT 26 ++ ++//OFFSET 8 ++#define AGG_EN BIT(12) ++#define AGG_BK BIT(16) ++#define AMPDU_DENSITY_SHT 20 ++#define ANTSEL_A BIT(24) ++#define ANTSEL_B BIT(25) ++#define TX_ANT_CCK_SHT 26 ++#define TX_ANTL_SHT 28 ++#define TX_ANT_HT_SHT 30 ++ ++//OFFSET 12 ++#define SEQ_SHT 16 ++#define EN_HWSEQ BIT(31) ++ ++//OFFSET 16 ++#define QOS BIT(6) ++#define HW_SSN BIT(7) ++#define USERATE BIT(8) ++#define DISDATAFB BIT(10) ++#define CTS_2_SELF BIT(11) ++#define RTS_EN BIT(12) ++#define HW_RTS_EN BIT(13) ++#define DATA_SHORT BIT(24) ++#define PWR_STATUS_SHT 15 ++#define DATA_SC_SHT 20 ++#define DATA_BW BIT(25) ++ ++//OFFSET 20 ++#define RTY_LMT_EN BIT(17) ++ ++ ++//OFFSET 20 ++#define SGI BIT(6) ++#define USB_TXAGG_NUM_SHT 24 ++ ++typedef struct txdesc_88e ++{ ++ //Offset 0 ++ u32 pktlen:16; ++ u32 offset:8; ++ u32 bmc:1; ++ u32 htc:1; ++ u32 ls:1; ++ u32 fs:1; ++ u32 linip:1; ++ u32 noacm:1; ++ u32 gf:1; ++ u32 own:1; ++ ++ //Offset 4 ++ u32 macid:6; ++ u32 rsvd0406:2; ++ u32 qsel:5; ++ u32 rd_nav_ext:1; ++ u32 lsig_txop_en:1; ++ u32 pifs:1; ++ u32 rate_id:4; ++ u32 navusehdr:1; ++ u32 en_desc_id:1; ++ u32 sectype:2; ++ u32 rsvd0424:2; ++ u32 pkt_offset:5; // unit: 8 bytes ++ u32 rsvd0431:1; ++ ++ //Offset 8 ++ u32 rts_rc:6; ++ u32 data_rc:6; ++ u32 agg_en:1; ++ u32 rd_en:1; ++ u32 bar_rty_th:2; ++ u32 bk:1; ++ u32 morefrag:1; ++ u32 raw:1; ++ u32 ccx:1; ++ u32 ampdu_density:3; ++ u32 bt_null:1; ++ u32 ant_sel_a:1; ++ u32 ant_sel_b:1; ++ u32 tx_ant_cck:2; ++ u32 tx_antl:2; ++ u32 tx_ant_ht:2; ++ ++ //Offset 12 ++ u32 nextheadpage:8; ++ u32 tailpage:8; ++ u32 seq:12; ++ u32 cpu_handle:1; ++ u32 tag1:1; ++ u32 trigger_int:1; ++ u32 hwseq_en:1; ++ ++ //Offset 16 ++ u32 rtsrate:5; ++ u32 ap_dcfe:1; ++ u32 hwseq_sel:2; ++ u32 userate:1; ++ u32 disrtsfb:1; ++ u32 disdatafb:1; ++ u32 cts2self:1; ++ u32 rtsen:1; ++ u32 hw_rts_en:1; ++ u32 port_id:1; ++ u32 pwr_status:3; ++ u32 wait_dcts:1; ++ u32 cts2ap_en:1; ++ u32 data_sc:2; ++ u32 data_stbc:2; ++ u32 data_short:1; ++ u32 data_bw:1; ++ u32 rts_short:1; ++ u32 rts_bw:1; ++ u32 rts_sc:2; ++ u32 vcs_stbc:2; ++ ++ //Offset 20 ++ u32 datarate:6; ++ u32 sgi:1; ++ u32 try_rate:1; ++ u32 data_ratefb_lmt:5; ++ u32 rts_ratefb_lmt:4; ++ u32 rty_lmt_en:1; ++ u32 data_rt_lmt:6; ++ u32 usb_txagg_num:8; ++ ++ //Offset 24 ++ u32 txagg_a:5; ++ u32 txagg_b:5; ++ u32 use_max_len:1; ++ u32 max_agg_num:5; ++ u32 mcsg1_max_len:4; ++ u32 mcsg2_max_len:4; ++ u32 mcsg3_max_len:4; ++ u32 mcs7_sgi_max_len:4; ++ ++ //Offset 28 ++ u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) ++ u32 sw0:8; /* offset 30 */ ++ u32 sw1:4; ++ u32 mcs15_sgi_max_len:4; ++}TXDESC_8188E, *PTXDESC_8188E; ++ ++#define txdesc_set_ccx_sw_88e(txdesc, value) \ ++ do { \ ++ ((struct txdesc_88e *)(txdesc))->sw1 = (((value)>>8) & 0x0f); \ ++ ((struct txdesc_88e *)(txdesc))->sw0 = ((value) & 0xff); \ ++ } while (0) ++ ++struct txrpt_ccx_88e { ++ /* offset 0 */ ++ u8 tag1:1; ++ u8 pkt_num:3; ++ u8 txdma_underflow:1; ++ u8 int_bt:1; ++ u8 int_tri:1; ++ u8 int_ccx:1; ++ ++ /* offset 1 */ ++ u8 mac_id:6; ++ u8 pkt_ok:1; ++ u8 bmc:1; ++ ++ /* offset 2 */ ++ u8 retry_cnt:6; ++ u8 lifetime_over:1; ++ u8 retry_over:1; ++ ++ /* offset 3 */ ++ u8 ccx_qtime0; ++ u8 ccx_qtime1; ++ ++ /* offset 5 */ ++ u8 final_data_rate; ++ ++ /* offset 6 */ ++ u8 sw1:4; ++ u8 qsel:4; ++ ++ /* offset 7 */ ++ u8 sw0; ++}; ++ ++#define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8)) ++#define txrpt_ccx_qtime_88e(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) ++ ++#define SET_TX_DESC_SEC_TYPE_8188E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++ ++void rtl8188e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen, ++ u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); ++void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc); ++ ++#if defined(CONFIG_SDIO_HCI)||defined (CONFIG_GSPI_HCI) ++s32 rtl8188es_init_xmit_priv(PADAPTER padapter); ++void rtl8188es_free_xmit_priv(PADAPTER padapter); ++s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8188es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++thread_return rtl8188es_xmit_thread(thread_context context); ++s32 rtl8188es_xmit_buf_handler(PADAPTER padapter); ++ ++#ifdef CONFIG_SDIO_TX_TASKLET ++void rtl8188es_xmit_tasklet(void *priv); ++#endif ++#endif ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8188eu_init_xmit_priv(PADAPTER padapter); ++void rtl8188eu_free_xmit_priv(PADAPTER padapter); ++s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8188eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter); ++void rtl8188eu_xmit_tasklet(void *priv); ++s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8188ee_init_xmit_priv(PADAPTER padapter); ++void rtl8188ee_free_xmit_priv(PADAPTER padapter); ++void rtl8188ee_xmitframe_resume(_adapter *padapter); ++s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8188ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8188ee_xmit_tasklet(void *priv); ++#endif ++ ++ ++ ++#ifdef CONFIG_TX_EARLY_MODE ++void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); ++#endif ++ ++#ifdef CONFIG_XMIT_ACK ++void dump_txrpt_ccx_88e(void *buf); ++void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf); ++#else ++#define dump_txrpt_ccx_88e(buf) do {} while(0) ++#define handle_txrpt_ccx_88e(adapter, buf) do {} while(0) ++#endif //CONFIG_XMIT_ACK ++ ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); ++#endif //__RTL8188E_XMIT_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_cmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_cmd.h +new file mode 100644 +index 0000000..66d374d +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_cmd.h +@@ -0,0 +1,221 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188F_CMD_H__ ++#define __RTL8188F_CMD_H__ ++ ++//---------------------------------------------------------------------------------------------------------// ++//---------------------------------- H2C CMD DEFINITION ------------------------------------------------// ++//---------------------------------------------------------------------------------------------------------// ++ ++enum h2c_cmd_8188F{ ++ //Common Class: 000 ++ H2C_8188F_RSVD_PAGE = 0x00, ++ H2C_8188F_MEDIA_STATUS_RPT = 0x01, ++ H2C_8188F_SCAN_ENABLE = 0x02, ++ H2C_8188F_KEEP_ALIVE = 0x03, ++ H2C_8188F_DISCON_DECISION = 0x04, ++ H2C_8188F_PSD_OFFLOAD = 0x05, ++ H2C_8188F_AP_OFFLOAD = 0x08, ++ H2C_8188F_BCN_RSVDPAGE = 0x09, ++ H2C_8188F_PROBERSP_RSVDPAGE = 0x0A, ++ H2C_8188F_FCS_RSVDPAGE = 0x10, ++ H2C_8188F_FCS_INFO = 0x11, ++ H2C_8188F_AP_WOW_GPIO_CTRL = 0x13, ++ ++ //PoweSave Class: 001 ++ H2C_8188F_SET_PWR_MODE = 0x20, ++ H2C_8188F_PS_TUNING_PARA = 0x21, ++ H2C_8188F_PS_TUNING_PARA2 = 0x22, ++ H2C_8188F_P2P_LPS_PARAM = 0x23, ++ H2C_8188F_P2P_PS_OFFLOAD = 0x24, ++ H2C_8188F_PS_SCAN_ENABLE = 0x25, ++ H2C_8188F_SAP_PS_ = 0x26, ++ H2C_8188F_INACTIVE_PS_ = 0x27, //Inactive_PS ++ H2C_8188F_FWLPS_IN_IPS_ = 0x28, ++ ++ //Dynamic Mechanism Class: 010 ++ H2C_8188F_MACID_CFG = 0x40, ++ H2C_8188F_TXBF = 0x41, ++ H2C_8188F_RSSI_SETTING = 0x42, ++ H2C_8188F_AP_REQ_TXRPT = 0x43, ++ H2C_8188F_INIT_RATE_COLLECT = 0x44, ++ H2C_8188F_RA_PARA_ADJUST = 0x46, ++ ++ //BT Class: 011 ++ H2C_8188F_B_TYPE_TDMA = 0x60, ++ H2C_8188F_BT_INFO = 0x61, ++ H2C_8188F_FORCE_BT_TXPWR = 0x62, ++ H2C_8188F_BT_IGNORE_WLANACT = 0x63, ++ H2C_8188F_DAC_SWING_VALUE = 0x64, ++ H2C_8188F_ANT_SEL_RSV = 0x65, ++ H2C_8188F_WL_OPMODE = 0x66, ++ H2C_8188F_BT_MP_OPER = 0x67, ++ H2C_8188F_BT_CONTROL = 0x68, ++ H2C_8188F_BT_WIFI_CTRL = 0x69, ++ H2C_8188F_BT_FW_PATCH = 0x6A, ++ H2C_8188F_BT_WLAN_CALIBRATION = 0x6D, ++ ++ //WOWLAN Class: 100 ++ H2C_8188F_WOWLAN = 0x80, ++ H2C_8188F_REMOTE_WAKE_CTRL = 0x81, ++ H2C_8188F_AOAC_GLOBAL_INFO = 0x82, ++ H2C_8188F_AOAC_RSVD_PAGE = 0x83, ++ H2C_8188F_AOAC_RSVD_PAGE2 = 0x84, ++ H2C_8188F_D0_SCAN_OFFLOAD_CTRL = 0x85, ++ H2C_8188F_D0_SCAN_OFFLOAD_INFO = 0x86, ++ H2C_8188F_CHNL_SWITCH_OFFLOAD = 0x87, ++ H2C_8188F_P2P_OFFLOAD_RSVD_PAGE = 0x8A, ++ H2C_8188F_P2P_OFFLOAD = 0x8B, ++ ++ H2C_8188F_RESET_TSF = 0xC0, ++ H2C_8188F_MAXID, ++}; ++ ++//---------------------------------------------------------------------------------------------------------// ++//---------------------------------- H2C CMD CONTENT --------------------------------------------------// ++//---------------------------------------------------------------------------------------------------------// ++//_RSVDPAGE_LOC_CMD_0x00 ++#define SET_8188F_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8188F_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_8188F_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8188F_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8188F_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++ ++//_KEEP_ALIVE_CMD_0x03 ++#define SET_8188F_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) ++#define SET_8188F_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) ++#define SET_8188F_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) ++#define SET_8188F_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++ ++//_DISCONNECT_DECISION_CMD_0x04 ++#define SET_8188F_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) ++#define SET_8188F_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) ++#define SET_8188F_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++#define SET_8188F_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) ++ ++// _PWR_MOD_CMD_0x20 ++#define SET_8188F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8188F_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) ++#define SET_8188F_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) ++#define SET_8188F_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8188F_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8188F_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) ++#define SET_8188F_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++#define SET_8188F_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) ++ ++#define GET_8188F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) ++ ++// _PS_TUNE_PARAM_CMD_0x21 ++#define SET_8188F_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8188F_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++#define SET_8188F_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) ++#define SET_8188F_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) ++#define SET_8188F_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) ++ ++//_MACID_CFG_CMD_0x40 ++#define SET_8188F_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8188F_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) ++#define SET_8188F_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) ++#define SET_8188F_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) ++#define SET_8188F_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) ++#define SET_8188F_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) ++#define SET_8188F_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) ++#define SET_8188F_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) ++#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) ++#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) ++#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) ++#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) ++ ++//_RSSI_SETTING_CMD_0x42 ++#define SET_8188F_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8188F_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) ++#define SET_8188F_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) ++ ++// _AP_REQ_TXRPT_CMD_0x43 ++#define SET_8188F_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8188F_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++ ++// _FORCE_BT_TXPWR_CMD_0x62 ++#define SET_8188F_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++ ++// _FORCE_BT_MP_OPER_CMD_0x67 ++#define SET_8188F_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) ++#define SET_8188F_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) ++#define SET_8188F_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++#define SET_8188F_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) ++#define SET_8188F_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) ++#define SET_8188F_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) ++ ++// _BT_FW_PATCH_0x6A ++#define SET_8188F_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) ++#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) ++ ++ ++//---------------------------------------------------------------------------------------------------------// ++//------------------------------------------- Structure --------------------------------------------------// ++//---------------------------------------------------------------------------------------------------------// ++ ++ ++//---------------------------------------------------------------------------------------------------------// ++//---------------------------------- Function Statement --------------------------------------------------// ++//---------------------------------------------------------------------------------------------------------// ++ ++// host message to firmware cmd ++void rtl8188f_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); ++void rtl8188f_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); ++void rtl8188f_set_rssi_cmd(PADAPTER padapter, u8 *param); ++void rtl8188f_Add_RateATid(PADAPTER pAdapter, u64 bitmap, u8* arg, u8 rssi_level); ++void rtl8188f_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); ++//s32 rtl8188f_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); ++void rtl8188f_set_FwPsTuneParam_cmd(PADAPTER padapter); ++void rtl8188f_set_FwMacIdConfig_cmd(_adapter* padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask); ++void rtl8188f_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); ++void rtl8188f_download_rsvd_page(PADAPTER padapter, u8 mstatus); ++#ifdef CONFIG_BT_COEXIST ++void rtl8188f_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); ++#endif // CONFIG_BT_COEXIST ++#ifdef CONFIG_P2P ++void rtl8188f_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); ++#endif //CONFIG_P2P ++ ++void CheckFwRsvdPageContent(PADAPTER padapter); ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++void rtl8188f_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); ++#endif ++#endif ++ ++#ifdef CONFIG_P2P_WOWLAN ++void rtl8188f_set_p2p_wowlan_offload_cmd(PADAPTER padapter); ++#endif ++ ++void rtl8188f_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); ++ ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++u8 rtl8188f_reset_tsf(_adapter *padapter, u8 reset_port); ++#endif // CONFIG_TSF_RESET_OFFLOAD ++s32 FillH2CCmd8188F(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); ++u8 GetTxBufferRsvdPageNum8188F(_adapter *padapter, bool wowlan); ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_dm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_dm.h +new file mode 100644 +index 0000000..d703ae5 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_dm.h +@@ -0,0 +1,48 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188F_DM_H__ ++#define __RTL8188F_DM_H__ ++//============================================================ ++// Description: ++// ++// This file is for 8188F dynamic mechanism only ++// ++// ++//============================================================ ++ ++//============================================================ ++// structure and define ++//============================================================ ++ ++//============================================================ ++// function prototype ++//============================================================ ++ ++void rtl8188f_init_dm_priv(PADAPTER padapter); ++void rtl8188f_deinit_dm_priv(PADAPTER padapter); ++ ++void rtl8188f_InitHalDm(PADAPTER padapter); ++void rtl8188f_HalDmWatchDog(PADAPTER padapter); ++void rtl8188f_HalDmWatchDog_in_LPS(PADAPTER padapter); ++void rtl8188f_hal_dm_in_lps(PADAPTER padapter); ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_hal.h +new file mode 100644 +index 0000000..3b1787f +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_hal.h +@@ -0,0 +1,321 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188F_HAL_H__ ++#define __RTL8188F_HAL_H__ ++ ++#include "hal_data.h" ++ ++#include "rtl8188f_spec.h" ++#include "rtl8188f_rf.h" ++#include "rtl8188f_dm.h" ++#include "rtl8188f_recv.h" ++#include "rtl8188f_xmit.h" ++#include "rtl8188f_cmd.h" ++#include "rtl8188f_led.h" ++#include "Hal8188FPwrSeq.h" ++#include "Hal8188FPhyReg.h" ++#include "Hal8188FPhyCfg.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8188f_sreset.h" ++#endif ++ ++ ++//--------------------------------------------------------------------- ++// RTL8188F From file ++//--------------------------------------------------------------------- ++ #define RTL8188F_FW_IMG "rtl8188f/FW_NIC.bin" ++ #define RTL8188F_FW_WW_IMG "rtl8188f/FW_WoWLAN.bin" ++ #define RTL8188F_PHY_REG "rtl8188f/PHY_REG.txt" ++ #define RTL8188F_PHY_RADIO_A "rtl8188f/RadioA.txt" ++ #define RTL8188F_PHY_RADIO_B "rtl8188f/RadioB.txt" ++ #define RTL8188F_TXPWR_TRACK "rtl8188f/TxPowerTrack.txt" ++ #define RTL8188F_AGC_TAB "rtl8188f/AGC_TAB.txt" ++ #define RTL8188F_PHY_MACREG "rtl8188f/MAC_REG.txt" ++ #define RTL8188F_PHY_REG_PG "rtl8188f/PHY_REG_PG.txt" ++ #define RTL8188F_PHY_REG_MP "rtl8188f/PHY_REG_MP.txt" ++ #define RTL8188F_TXPWR_LMT "rtl8188f/TXPWR_LMT.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8188F From header ++//--------------------------------------------------------------------- ++ ++#if MP_DRIVER == 1 ++ #define Rtl8188F_FwBTImgArray Rtl8188FFwBTImgArray ++ #define Rtl8188F_FwBTImgArrayLength Rtl8188FFwBTImgArrayLength ++ ++ #define Rtl8188F_FwMPImageArray Rtl8188FFwMPImgArray ++ #define Rtl8188F_FwMPImgArrayLength Rtl8188FMPImgArrayLength ++ ++ #define Rtl8188F_PHY_REG_Array_MP Rtl8188F_PHYREG_Array_MP ++ #define Rtl8188F_PHY_REG_Array_MPLength Rtl8188F_PHYREG_Array_MPLength ++#endif ++ ++ ++#define FW_8188F_SIZE 0x8000 ++#define FW_8188F_START_ADDRESS 0x1000 ++#define FW_8188F_END_ADDRESS 0x1FFF //0x5FFF ++ ++#define IS_FW_HEADER_EXIST_8188F(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88F0) ++ ++typedef struct _RT_FIRMWARE { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[FW_8188F_SIZE]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8188F, *PRT_FIRMWARE_8188F; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++typedef struct _RT_8188F_FIRMWARE_HDR ++{ ++ // 8-byte alinment required ++ ++ //--- LONG WORD 0 ---- ++ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++ u8 Category; // AP/NIC and USB/PCI ++ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++ u16 Version; // FW Version ++ u16 Subversion; // FW Subversion, default 0x00 ++ ++ //--- LONG WORD 1 ---- ++ u8 Month; // Release time Month field ++ u8 Date; // Release time Date field ++ u8 Hour; // Release time Hour field ++ u8 Minute; // Release time Minute field ++ u16 RamCodeSize; // The size of RAM code ++ u16 Rsvd2; ++ ++ //--- LONG WORD 2 ---- ++ u32 SvnIdx; // The SVN entry index ++ u32 Rsvd3; ++ ++ //--- LONG WORD 3 ---- ++ u32 Rsvd4; ++ u32 Rsvd5; ++}RT_8188F_FIRMWARE_HDR, *PRT_8188F_FIRMWARE_HDR; ++ ++#define DRIVER_EARLY_INT_TIME_8188F 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8188F 0x02 ++ ++// for 8188F ++// TX 32K, RX 16K, Page size 128B for TX, 8B for RX ++#define PAGE_SIZE_TX_8188F 128 ++#define PAGE_SIZE_RX_8188F 8 ++ ++#define RX_DMA_SIZE_8188F 0x4000 // 16K ++#ifdef CONFIG_FW_C2H_DEBUG ++#define RX_DMA_RESERVED_SIZE_8188F 0x100 // 256B, reserved for c2h debug message ++#else ++#define RX_DMA_RESERVED_SIZE_8188F 0x80 // 128B, reserved for tx report ++#endif ++ ++#ifdef CONFIG_WOWLAN ++#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ ++#else ++#define RESV_FMWF 0 ++#endif ++ ++#define RX_DMA_BOUNDARY_8188F (RX_DMA_SIZE_8188F - RX_DMA_RESERVED_SIZE_8188F - 1) ++ ++// Note: We will divide number of page equally for each queue other than public queue! ++ ++//For General Reserved Page Number(Beacon Queue is reserved page) ++//Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 ++#define BCNQ_PAGE_NUM_8188F 0x08 ++#ifdef CONFIG_CONCURRENT_MODE ++#define BCNQ1_PAGE_NUM_8188F 0x08 // 0x04 ++#else ++#define BCNQ1_PAGE_NUM_8188F 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef BCNQ1_PAGE_NUM_8188F ++#define BCNQ1_PAGE_NUM_8188F 0x00 // 0x04 ++#endif ++ ++//For WoWLan , more reserved page ++//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8188F 0x07 ++#else ++#define WOWLAN_PAGE_NUM_8188F 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef WOWLAN_PAGE_NUM_8188F ++#define WOWLAN_PAGE_NUM_8188F 0x15 ++#endif ++ ++#ifdef CONFIG_AP_WOWLAN ++#define AP_WOWLAN_PAGE_NUM_8188F 0x02 ++#endif ++ ++#define TX_TOTAL_PAGE_NUMBER_8188F (0xFF - BCNQ_PAGE_NUM_8188F - BCNQ1_PAGE_NUM_8188F - WOWLAN_PAGE_NUM_8188F) ++#define TX_PAGE_BOUNDARY_8188F (TX_TOTAL_PAGE_NUMBER_8188F + 1) ++ ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8188F TX_TOTAL_PAGE_NUMBER_8188F ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_8188F (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8188F + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8188F ++#define NORMAL_PAGE_NUM_HPQ_8188F 0x0C ++#define NORMAL_PAGE_NUM_LPQ_8188F 0x02 ++#define NORMAL_PAGE_NUM_NPQ_8188F 0x02 ++ ++// Note: For Normal Chip Setting, modify later ++#define WMM_NORMAL_PAGE_NUM_HPQ_8188F 0x30 ++#define WMM_NORMAL_PAGE_NUM_LPQ_8188F 0x20 ++#define WMM_NORMAL_PAGE_NUM_NPQ_8188F 0x20 ++ ++ ++#include "HalVerDef.h" ++#include "hal_com.h" ++ ++#define EFUSE_OOB_PROTECT_BYTES 15 ++ ++#define HAL_EFUSE_MEMORY ++ ++#define HWSET_MAX_SIZE_8188F 512 ++#define EFUSE_REAL_CONTENT_LEN_8188F 512 ++#define EFUSE_MAP_LEN_8188F 512 ++#define EFUSE_MAX_SECTION_8188F 64 ++ ++#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8188F) ++ ++#define EFUSE_ACCESS_ON 0x69 // For RTL8188 only. ++#define EFUSE_ACCESS_OFF 0x00 // For RTL8188 only. ++ ++//======================================================== ++// EFUSE for BT definition ++//======================================================== ++#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 ++#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 ++#define EFUSE_BT_MAP_LEN 1024 // 1k bytes ++#define EFUSE_BT_MAX_SECTION 128 // 1024/8 ++ ++#define EFUSE_PROTECT_BYTES_BANK 16 ++ ++typedef struct _C2H_EVT_HDR ++{ ++ u8 CmdID; ++ u8 CmdLen; ++ u8 CmdSeq; ++} __attribute__((__packed__)) C2H_EVT_HDR, *PC2H_EVT_HDR; ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++// rtl8188a_hal_init.c ++s32 rtl8188f_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); ++void rtl8188f_FirmwareSelfReset(PADAPTER padapter); ++void rtl8188f_InitializeFirmwareVars(PADAPTER padapter); ++ ++void rtl8188f_InitAntenna_Selection(PADAPTER padapter); ++void rtl8188f_DeinitAntenna_Selection(PADAPTER padapter); ++void rtl8188f_CheckAntenna_Selection(PADAPTER padapter); ++void rtl8188f_init_default_value(PADAPTER padapter); ++ ++s32 rtl8188f_InitLLTTable(PADAPTER padapter); ++ ++s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); ++s32 CardDisableWithoutHWSM(PADAPTER padapter); ++ ++// EFuse ++u8 GetEEPROMSize8188F(PADAPTER padapter); ++void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); ++void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); ++void Hal_EfuseParseTxPowerInfo_8188F(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); ++/* void Hal_EfuseParseBTCoexistInfo_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); */ ++void Hal_EfuseParseEEPROMVer_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseChnlPlan_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseCustomerID_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParsePowerSavingMode_8188F(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseAntennaDiversity_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseXtal_8188F(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); ++void Hal_EfuseParseThermalMeter_8188F(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); ++void Hal_EfuseParseKFreeData_8188F(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++ ++#if 0 /* Do not need for rtl8188f */ ++VOID Hal_EfuseParseVoltage_8188F(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++#endif ++ ++#ifdef CONFIG_C2H_PACKET_EN ++void rtl8188f_c2h_packet_handler(PADAPTER padapter, u8 *pbuf, u16 length); ++#endif ++ ++void rtl8188f_set_pll_ref_clk_sel(_adapter *adapter, u8 sel); ++ ++void rtl8188f_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8188f(_adapter *adapter); ++void SetHwReg8188F(PADAPTER padapter, u8 variable, u8 *val); ++void GetHwReg8188F(PADAPTER padapter, u8 variable, u8 *val); ++#ifdef CONFIG_C2H_PACKET_EN ++void SetHwRegWithBuf8188F(PADAPTER padapter, u8 variable, u8 *pbuf, int len); ++#endif // CONFIG_C2H_PACKET_EN ++u8 SetHalDefVar8188F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++u8 GetHalDefVar8188F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++ ++// register ++void rtl8188f_InitBeaconParameters(PADAPTER padapter); ++void rtl8188f_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); ++void _InitBurstPktLen_8188FS(PADAPTER Adapter); ++void _8051Reset8188(PADAPTER padapter); ++#ifdef CONFIG_WOWLAN ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++void rtl8188f_start_thread(_adapter *padapter); ++void rtl8188f_stop_thread(_adapter *padapter); ++ ++#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) ++void rtl8188fs_init_checkbthang_workqueue(_adapter * adapter); ++void rtl8188fs_free_checkbthang_workqueue(_adapter * adapter); ++void rtl8188fs_cancle_checkbthang_workqueue(_adapter * adapter); ++void rtl8188fs_hal_check_bt_hang(_adapter * adapter); ++#endif ++ ++#ifdef CONFIG_GPIO_WAKEUP ++void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); ++#endif ++ ++int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); ++ ++void CCX_FwC2HTxRpt_8188f(PADAPTER padapter, u8 *pdata, u8 len); ++#ifdef CONFIG_FW_C2H_DEBUG ++void Debug_FwC2H_8188f(PADAPTER padapter, u8 *pdata, u8 len); ++#endif //CONFIG_FW_C2H_DEBUG ++s32 c2h_id_filter_ccx_8188f(u8 *buf); ++s32 c2h_handler_8188f(PADAPTER padapter, u8 *pC2hEvent); ++u8 MRateToHwRate8188F(u8 rate); ++u8 HwRateToMRate8188F(u8 rate); ++ ++#ifdef CONFIG_PCI_HCI ++BOOLEAN InterruptRecognized8188FE(PADAPTER Adapter); ++VOID UpdateInterruptMask8188FE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_led.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_led.h +new file mode 100644 +index 0000000..9b7bf78 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_led.h +@@ -0,0 +1,49 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188F_LED_H__ ++#define __RTL8188F_LED_H__ ++ ++#include ++#include ++#include ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8188fu_InitSwLeds(PADAPTER padapter); ++void rtl8188fu_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_SDIO_HCI ++void rtl8188fs_InitSwLeds(PADAPTER padapter); ++void rtl8188fs_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_GSPI_HCI ++void rtl8188fs_InitSwLeds(PADAPTER padapter); ++void rtl8188fs_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8188fe_InitSwLeds(PADAPTER padapter); ++void rtl8188fe_DeInitSwLeds(PADAPTER padapter); ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_recv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_recv.h +new file mode 100644 +index 0000000..8a1228c +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_recv.h +@@ -0,0 +1,73 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188F_RECV_H__ ++#define __RTL8188F_RECV_H__ ++ ++#if defined(CONFIG_USB_HCI) ++ #ifndef MAX_RECVBUF_SZ ++ #ifdef PLATFORM_OS_CE ++ #define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #else ++ #ifdef CONFIG_MINIMAL_MEMORY_USAGE ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #else ++ #ifdef CONFIG_PLATFORM_MSTAR ++ #define MAX_RECVBUF_SZ (8192) // 8K ++ #elif defined(CONFIG_PLATFORM_HISILICON) ++ #define MAX_RECVBUF_SZ (16384) /* 16k */ ++ #else ++ #define MAX_RECVBUF_SZ (32768) /* 32k */ ++ #endif ++ //#define MAX_RECVBUF_SZ (20480) //20K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ //#define MAX_RECVBUF_SZ (16384) // 16k - 92E RX BUF :16K ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #endif ++ #endif ++ #endif //!MAX_RECVBUF_SZ ++#elif defined(CONFIG_PCI_HCI) ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++#elif defined(CONFIG_SDIO_HCI) ++ #define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8188F + 1) ++#endif /* CONFIG_SDIO_HCI */ ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++s32 rtl8188fs_init_recv_priv(PADAPTER padapter); ++void rtl8188fs_free_recv_priv(PADAPTER padapter); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++int rtl8188fu_init_recv_priv(_adapter *padapter); ++void rtl8188fu_free_recv_priv (_adapter *padapter); ++void rtl8188fu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8188fe_init_recv_priv(PADAPTER padapter); ++void rtl8188fe_free_recv_priv(PADAPTER padapter); ++#endif ++ ++void rtl8188f_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); ++ ++#endif /* __RTL8188F_RECV_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_rf.h +new file mode 100644 +index 0000000..ea71ef1 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_rf.h +@@ -0,0 +1,31 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188F_RF_H__ ++#define __RTL8188F_RF_H__ ++ ++int PHY_RF6052_Config8188F( IN PADAPTER Adapter ); ++ ++VOID ++PHY_RF6052SetBandwidth8188F( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth); ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_spec.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_spec.h +new file mode 100644 +index 0000000..4324a53 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_spec.h +@@ -0,0 +1,303 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8188F_SPEC_H__ ++#define __RTL8188F_SPEC_H__ ++ ++#include ++ ++ ++#define HAL_NAV_UPPER_UNIT_8188F 128 // micro-second ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_RSV_CTRL_8188F 0x001C // 3 Byte ++#define REG_BT_WIFI_ANTENNA_SWITCH_8188F 0x0038 ++#define REG_HSISR_8188F 0x005c ++#define REG_PAD_CTRL1_8188F 0x0064 ++#define REG_AFE_CTRL_4_8188F 0x0078 ++#define REG_HMEBOX_DBG_0_8188F 0x0088 ++#define REG_HMEBOX_DBG_1_8188F 0x008A ++#define REG_HMEBOX_DBG_2_8188F 0x008C ++#define REG_HMEBOX_DBG_3_8188F 0x008E ++#define REG_HIMR0_8188F 0x00B0 ++#define REG_HISR0_8188F 0x00B4 ++#define REG_HIMR1_8188F 0x00B8 ++#define REG_HISR1_8188F 0x00BC ++#define REG_PMC_DBG_CTRL2_8188F 0x00CC ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_C2HEVT_CMD_ID_8188F 0x01A0 ++#define REG_C2HEVT_CMD_LEN_8188F 0x01AE ++#define REG_WOWLAN_WAKE_REASON 0x01C7 ++#define REG_WOWLAN_GTK_DBG1 0x630 ++#define REG_WOWLAN_GTK_DBG2 0x634 ++ ++#define REG_HMEBOX_EXT0_8188F 0x01F0 ++#define REG_HMEBOX_EXT1_8188F 0x01F4 ++#define REG_HMEBOX_EXT2_8188F 0x01F8 ++#define REG_HMEBOX_EXT3_8188F 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_CONTROL_8188F 0x0286 // Control the RX DMA. ++#define REG_RXDMA_MODE_CTRL_8188F 0x0290 ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8188F 0x0300 ++#define REG_INT_MIG_8188F 0x0304 // Interrupt Migration ++#define REG_BCNQ_DESA_8188F 0x0308 // TX Beacon Descriptor Address ++#define REG_HQ_DESA_8188F 0x0310 // TX High Queue Descriptor Address ++#define REG_MGQ_DESA_8188F 0x0318 // TX Manage Queue Descriptor Address ++#define REG_VOQ_DESA_8188F 0x0320 // TX VO Queue Descriptor Address ++#define REG_VIQ_DESA_8188F 0x0328 // TX VI Queue Descriptor Address ++#define REG_BEQ_DESA_8188F 0x0330 // TX BE Queue Descriptor Address ++#define REG_BKQ_DESA_8188F 0x0338 // TX BK Queue Descriptor Address ++#define REG_RX_DESA_8188F 0x0340 // RX Queue Descriptor Address ++#define REG_DBI_WDATA_8188F 0x0348 // DBI Write Data ++#define REG_DBI_RDATA_8188F 0x034C // DBI Read Data ++#define REG_DBI_ADDR_8188F 0x0350 // DBI Address ++#define REG_DBI_FLAG_8188F 0x0352 // DBI Read/Write Flag ++#define REG_MDIO_WDATA_8188F 0x0354 // MDIO for Write PCIE PHY ++#define REG_MDIO_RDATA_8188F 0x0356 // MDIO for Reads PCIE PHY ++#define REG_MDIO_CTL_8188F 0x0358 // MDIO for Control ++#define REG_DBG_SEL_8188F 0x0360 // Debug Selection Register ++#define REG_PCIE_HRPWM_8188F 0x0361 //PCIe RPWM ++#define REG_PCIE_HCPWM_8188F 0x0363 //PCIe CPWM ++#define REG_PCIE_MULTIFET_CTRL_8188F 0x036A //PCIE Multi-Fethc Control ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_TXPKTBUF_BCNQ_BDNY_8188F 0x0424 ++#define REG_TXPKTBUF_MGQ_BDNY_8188F 0x0425 ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8188F 0x045D ++#ifdef CONFIG_WOWLAN ++#define REG_TXPKTBUF_IV_LOW 0x0484 ++#define REG_TXPKTBUF_IV_HIGH 0x0488 ++#endif ++#define REG_AMPDU_BURST_MODE_8188F 0x04BC ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_SECONDARY_CCA_CTRL_8188F 0x0577 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++ ++ ++//============================================================ ++// SDIO Bus Specification ++//============================================================ ++ ++//----------------------------------------------------- ++// SDIO CMD Address Mapping ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// I/O bus domain (Host) ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// SDIO register ++//----------------------------------------------------- ++#define SDIO_REG_HIQ_FREEPG_8188F 0x0020 ++#define SDIO_REG_MID_FREEPG_8188F 0x0022 ++#define SDIO_REG_LOW_FREEPG_8188F 0x0024 ++#define SDIO_REG_PUB_FREEPG_8188F 0x0026 ++#define SDIO_REG_EXQ_FREEPG_8188F 0x0028 ++#define SDIO_REG_AC_OQT_FREEPG_8188F 0x002A ++#define SDIO_REG_NOAC_OQT_FREEPG_8188F 0x002B ++ ++#define SDIO_REG_HCPWM1_8188F 0x0038 ++ ++/* indirect access */ ++#define SDIO_REG_INDIRECT_REG_CFG_8188F 0x40 ++#define SET_INDIRECT_REG_ADDR(_cmd, _addr) SET_BITS_TO_LE_2BYTE(((u8 *)(_cmd)) + 0, 0, 16, (_addr)) ++#define SET_INDIRECT_REG_SIZE_1BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 0) ++#define SET_INDIRECT_REG_SIZE_2BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 1) ++#define SET_INDIRECT_REG_SIZE_4BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 2) ++#define SET_INDIRECT_REG_WRITE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 2, 1, 1) ++#define SET_INDIRECT_REG_READ(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 3, 1, 1) ++#define GET_INDIRECT_REG_RDY(_cmd) LE_BITS_TO_1BYTE(((u8 *)(_cmd)) + 2, 4, 1) ++ ++#define SDIO_REG_INDIRECT_REG_DATA_8188F 0x44 ++ ++//============================================================================ ++// 8188 Regsiter Bit and Content definition ++//============================================================================ ++ ++//2 HSISR ++// interrupt mask which needs to clear ++#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ ++ HSISR_SPS_OCP_INT |\ ++ HSISR_RON_INT |\ ++ HSISR_PDNINT |\ ++ HSISR_GPIO9_INT) ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++ ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define BIT_USB_RXDMA_AGG_EN BIT(31) ++#define RXDMA_AGG_MODE_EN BIT(1) ++ ++#ifdef CONFIG_WOWLAN ++#define RXPKT_RELEASE_POLL BIT(16) ++#define RXDMA_IDLE BIT(17) ++#define RW_RELEASE_EN BIT(18) ++#endif ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++ ++//---------------------------------------------------------------------------- ++// 8188F REG_CCK_CHECK (offset 0x454) ++//---------------------------------------------------------------------------- ++#define BIT_BCN_PORT_SEL BIT5 ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++ ++//---------------------------------------------------------------------------- ++// 8195 IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8188F 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8188F BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8188F BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8188F BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8188F BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8188F BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8188F BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8188F BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8188F BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8188F BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8188F BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8188F BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8188F BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8188F BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8188F BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8188F BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8188F BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8188F BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8188F BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8188F BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8188F BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8188F BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8188F BIT2 // AC_VO DMA OK ++#define IMR_RDU_8188F BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8188F BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_BCNDMAINT7_8188F BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8188F BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8188F BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8188F BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8188F BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8188F BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8188F BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8188F BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8188F BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8188F BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8188F BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8188F BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8188F BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8188F BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8188F BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8188F BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8188F BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8188F BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8188F BIT8 // Receive FIFO Overflow ++ ++#ifdef CONFIG_PCI_HCI ++//#define IMR_RX_MASK (IMR_ROK_8188F|IMR_RDU_8188F|IMR_RXFOVW_8188F) ++#define IMR_TX_MASK (IMR_VODOK_8188F|IMR_VIDOK_8188F|IMR_BEDOK_8188F|IMR_BKDOK_8188F|IMR_MGNTDOK_8188F|IMR_HIGHDOK_8188F) ++ ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8188F | IMR_TXBCN0OK_8188F | IMR_TXBCN0ERR_8188F | IMR_BCNDERR0_8188F) ++ ++#define RT_AC_INT_MASKS (IMR_VIDOK_8188F | IMR_VODOK_8188F | IMR_BEDOK_8188F|IMR_BKDOK_8188F) ++#endif ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_8188F 16 ++#define SEC_CAM_ENT_NUM_8188F 16 ++#define NSS_NUM_8188F 1 ++#define BAND_CAP_8188F (BAND_CAP_2G) ++#define BW_CAP_8188F (BW_CAP_20M | BW_CAP_40M) ++#define PROTO_CAP_8188F (PROTO_CAP_11B|PROTO_CAP_11G|PROTO_CAP_11N) ++ ++#endif /* __RTL8188F_SPEC_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_sreset.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_sreset.h +new file mode 100644 +index 0000000..8a27624 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_sreset.h +@@ -0,0 +1,30 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTL8188F_SRESET_H_ ++#define _RTL8188F_SRESET_H_ ++ ++#include ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++extern void rtl8188f_sreset_xmit_status_check(_adapter *padapter); ++extern void rtl8188f_sreset_linked_status_check(_adapter *padapter); ++#endif ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_xmit.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_xmit.h +new file mode 100644 +index 0000000..265b887 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188f_xmit.h +@@ -0,0 +1,336 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8188F_XMIT_H__ ++#define __RTL8188F_XMIT_H__ ++ ++ ++#define MAX_TID (15) ++ ++ ++#ifndef __INC_HAL8188FDESC_H ++#define __INC_HAL8188FDESC_H ++ ++#define RX_STATUS_DESC_SIZE_8188F 24 ++#define RX_DRV_INFO_SIZE_UNIT_8188F 8 ++ ++ ++//DWORD 0 ++#define SET_RX_STATUS_DESC_PKT_LEN_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_STATUS_DESC_EOR_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) ++#define SET_RX_STATUS_DESC_OWN_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) ++ ++#define GET_RX_STATUS_DESC_PKT_LEN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) ++#define GET_RX_STATUS_DESC_CRC32_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) ++#define GET_RX_STATUS_DESC_ICV_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) ++#define GET_RX_STATUS_DESC_SECURITY_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) ++#define GET_RX_STATUS_DESC_QOS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) ++#define GET_RX_STATUS_DESC_SHIFT_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) ++#define GET_RX_STATUS_DESC_PHY_STATUS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) ++#define GET_RX_STATUS_DESC_SWDEC_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) ++#define GET_RX_STATUS_DESC_LAST_SEG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) ++#define GET_RX_STATUS_DESC_FIRST_SEG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) ++#define GET_RX_STATUS_DESC_EOR_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++#define GET_RX_STATUS_DESC_OWN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) ++ ++//DWORD 1 ++#define GET_RX_STATUS_DESC_MACID_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) ++#define GET_RX_STATUS_DESC_TID_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) ++#define GET_RX_STATUS_DESC_AMSDU_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) ++#define GET_RX_STATUS_DESC_RXID_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) ++#define GET_RX_STATUS_DESC_PAGGR_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) ++#define GET_RX_STATUS_DESC_A1_FIT_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) ++#define GET_RX_STATUS_DESC_CHKERR_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) ++#define GET_RX_STATUS_DESC_IPVER_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) ++#define GET_RX_STATUS_DESC_IS_TCPUDP__8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) ++#define GET_RX_STATUS_DESC_CHK_VLD_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) ++#define GET_RX_STATUS_DESC_PAM_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) ++#define GET_RX_STATUS_DESC_PWR_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) ++#define GET_RX_STATUS_DESC_MORE_DATA_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) ++#define GET_RX_STATUS_DESC_MORE_FRAG_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) ++#define GET_RX_STATUS_DESC_TYPE_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) ++#define GET_RX_STATUS_DESC_MC_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) ++#define GET_RX_STATUS_DESC_BC_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) ++ ++//DWORD 2 ++#define GET_RX_STATUS_DESC_SEQ_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) ++#define GET_RX_STATUS_DESC_FRAG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) ++#define GET_RX_STATUS_DESC_RX_IS_QOS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) ++#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) ++#define GET_RX_STATUS_DESC_RPT_SEL_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) ++ ++//DWORD 3 ++#define GET_RX_STATUS_DESC_RX_RATE_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) ++#define GET_RX_STATUS_DESC_HTC_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) ++#define GET_RX_STATUS_DESC_EOSP_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) ++#define GET_RX_STATUS_DESC_BSSID_FIT_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) ++#ifdef CONFIG_USB_RX_AGGREGATION ++#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) ++#endif ++#define GET_RX_STATUS_DESC_PATTERN_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) ++#define GET_RX_STATUS_DESC_UNICAST_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) ++#define GET_RX_STATUS_DESC_MAGIC_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) ++ ++//DWORD 6 ++#define GET_RX_STATUS_DESC_SPLCP_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) ++#define GET_RX_STATUS_DESC_LDPC_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) ++#define GET_RX_STATUS_DESC_STBC_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) ++#define GET_RX_STATUS_DESC_BW_8188F(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) ++ ++//DWORD 5 ++#define GET_RX_STATUS_DESC_TSFL_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++#define GET_RX_STATUS_DESC_BUFF_ADDR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) ++#define GET_RX_STATUS_DESC_BUFF_ADDR64_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) ++ ++#define SET_RX_STATUS_DESC_BUFF_ADDR_8188F(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) ++ ++ ++// Dword 0 ++#define GET_TX_DESC_OWN_8188F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) ++ ++#define SET_TX_DESC_PKT_SIZE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) ++#define SET_TX_DESC_OFFSET_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) ++#define SET_TX_DESC_BMC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) ++#define SET_TX_DESC_HTC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) ++#define SET_TX_DESC_LAST_SEG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) ++#define SET_TX_DESC_FIRST_SEG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) ++#define SET_TX_DESC_LINIP_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) ++#define SET_TX_DESC_NO_ACM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) ++#define SET_TX_DESC_GF_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) ++#define SET_TX_DESC_OWN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++ ++// Dword 1 ++#define SET_TX_DESC_MACID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) ++#define SET_TX_DESC_QUEUE_SEL_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) ++#define SET_TX_DESC_RDG_NAV_EXT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) ++#define SET_TX_DESC_LSIG_TXOP_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) ++#define SET_TX_DESC_PIFS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) ++#define SET_TX_DESC_RATE_ID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) ++#define SET_TX_DESC_EN_DESC_ID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) ++#define SET_TX_DESC_SEC_TYPE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++#define SET_TX_DESC_PKT_OFFSET_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) ++ ++ ++// Dword 2 ++#define SET_TX_DESC_PAID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) ++#define SET_TX_DESC_CCA_RTS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) ++#define SET_TX_DESC_AGG_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) ++#define SET_TX_DESC_RDG_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) ++#define SET_TX_DESC_AGG_BREAK_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) ++#define SET_TX_DESC_MORE_FRAG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) ++#define SET_TX_DESC_RAW_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) ++#define SET_TX_DESC_SPE_RPT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) ++#define SET_TX_DESC_AMPDU_DENSITY_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) ++#define SET_TX_DESC_BT_INT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) ++#define SET_TX_DESC_GID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) ++ ++ ++// Dword 3 ++#define SET_TX_DESC_WHEADER_LEN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) ++#define SET_TX_DESC_CHK_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) ++#define SET_TX_DESC_EARLY_MODE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) ++#define SET_TX_DESC_HWSEQ_SEL_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) ++#define SET_TX_DESC_USE_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) ++#define SET_TX_DESC_DISABLE_RTS_FB_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) ++#define SET_TX_DESC_DISABLE_FB_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) ++#define SET_TX_DESC_CTS2SELF_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) ++#define SET_TX_DESC_RTS_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) ++#define SET_TX_DESC_HW_RTS_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) ++#define SET_TX_DESC_NAV_USE_HDR_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) ++#define SET_TX_DESC_USE_MAX_LEN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) ++#define SET_TX_DESC_MAX_AGG_NUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) ++#define SET_TX_DESC_NDPA_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) ++#define SET_TX_DESC_AMPDU_MAX_TIME_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) ++ ++// Dword 4 ++#define SET_TX_DESC_TX_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) ++#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) ++#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) ++#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) ++#define SET_TX_DESC_DATA_RETRY_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) ++#define SET_TX_DESC_RTS_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) ++ ++ ++// Dword 5 ++#define SET_TX_DESC_DATA_SC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) ++#define SET_TX_DESC_DATA_SHORT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) ++#define SET_TX_DESC_DATA_BW_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) ++#define SET_TX_DESC_DATA_LDPC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) ++#define SET_TX_DESC_DATA_STBC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) ++#define SET_TX_DESC_CTROL_STBC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) ++#define SET_TX_DESC_RTS_SHORT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) ++#define SET_TX_DESC_RTS_SC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) ++ ++ ++// Dword 6 ++#define SET_TX_DESC_SW_DEFINE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) ++#define SET_TX_DESC_MBSSID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) ++#define SET_TX_DESC_ANTSEL_A_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) ++#define SET_TX_DESC_ANTSEL_B_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) ++#define SET_TX_DESC_ANTSEL_C_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) ++#define SET_TX_DESC_ANTSEL_D_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) ++ ++// Dword 7 ++#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#define SET_TX_DESC_TX_BUFFER_SIZE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#else ++#define SET_TX_DESC_TX_DESC_CHECKSUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#endif ++#define SET_TX_DESC_USB_TXAGG_NUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) ++#if(DEV_BUS_TYPE == RT_SDIO_INTERFACE) ++#define SET_TX_DESC_SDIO_TXSEQ_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) ++#endif ++ ++// Dword 8 ++#define SET_TX_DESC_HWSEQ_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++ ++// Dword 9 ++#define SET_TX_DESC_SEQ_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) ++ ++// Dword 10 ++#define SET_TX_DESC_TX_BUFFER_ADDRESS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) ++#define GET_TX_DESC_TX_BUFFER_ADDRESS_8188F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) ++ ++// Dword 11 ++#define SET_TX_DESC_NEXT_DESC_ADDRESS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) ++ ++ ++#define SET_EARLYMODE_PKTNUM_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) ++#define SET_EARLYMODE_LEN0_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) ++#define SET_EARLYMODE_LEN1_1_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) ++#define SET_EARLYMODE_LEN1_2_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) ++#define SET_EARLYMODE_LEN2_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) ++#define SET_EARLYMODE_LEN3_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) ++ ++#endif ++//----------------------------------------------------------- ++// ++// Rate ++// ++//----------------------------------------------------------- ++// CCK Rates, TxHT = 0 ++#define DESC8188F_RATE1M 0x00 ++#define DESC8188F_RATE2M 0x01 ++#define DESC8188F_RATE5_5M 0x02 ++#define DESC8188F_RATE11M 0x03 ++ ++// OFDM Rates, TxHT = 0 ++#define DESC8188F_RATE6M 0x04 ++#define DESC8188F_RATE9M 0x05 ++#define DESC8188F_RATE12M 0x06 ++#define DESC8188F_RATE18M 0x07 ++#define DESC8188F_RATE24M 0x08 ++#define DESC8188F_RATE36M 0x09 ++#define DESC8188F_RATE48M 0x0a ++#define DESC8188F_RATE54M 0x0b ++ ++// MCS Rates, TxHT = 1 ++#define DESC8188F_RATEMCS0 0x0c ++#define DESC8188F_RATEMCS1 0x0d ++#define DESC8188F_RATEMCS2 0x0e ++#define DESC8188F_RATEMCS3 0x0f ++#define DESC8188F_RATEMCS4 0x10 ++#define DESC8188F_RATEMCS5 0x11 ++#define DESC8188F_RATEMCS6 0x12 ++#define DESC8188F_RATEMCS7 0x13 ++#define DESC8188F_RATEMCS8 0x14 ++#define DESC8188F_RATEMCS9 0x15 ++#define DESC8188F_RATEMCS10 0x16 ++#define DESC8188F_RATEMCS11 0x17 ++#define DESC8188F_RATEMCS12 0x18 ++#define DESC8188F_RATEMCS13 0x19 ++#define DESC8188F_RATEMCS14 0x1a ++#define DESC8188F_RATEMCS15 0x1b ++#define DESC8188F_RATEVHTSS1MCS0 0x2c ++#define DESC8188F_RATEVHTSS1MCS1 0x2d ++#define DESC8188F_RATEVHTSS1MCS2 0x2e ++#define DESC8188F_RATEVHTSS1MCS3 0x2f ++#define DESC8188F_RATEVHTSS1MCS4 0x30 ++#define DESC8188F_RATEVHTSS1MCS5 0x31 ++#define DESC8188F_RATEVHTSS1MCS6 0x32 ++#define DESC8188F_RATEVHTSS1MCS7 0x33 ++#define DESC8188F_RATEVHTSS1MCS8 0x34 ++#define DESC8188F_RATEVHTSS1MCS9 0x35 ++#define DESC8188F_RATEVHTSS2MCS0 0x36 ++#define DESC8188F_RATEVHTSS2MCS1 0x37 ++#define DESC8188F_RATEVHTSS2MCS2 0x38 ++#define DESC8188F_RATEVHTSS2MCS3 0x39 ++#define DESC8188F_RATEVHTSS2MCS4 0x3a ++#define DESC8188F_RATEVHTSS2MCS5 0x3b ++#define DESC8188F_RATEVHTSS2MCS6 0x3c ++#define DESC8188F_RATEVHTSS2MCS7 0x3d ++#define DESC8188F_RATEVHTSS2MCS8 0x3e ++#define DESC8188F_RATEVHTSS2MCS9 0x3f ++ ++ ++#define RX_HAL_IS_CCK_RATE_8188F(pDesc)\ ++ (GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE1M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE2M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE5_5M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE11M) ++ ++ ++void rtl8188f_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); ++void rtl8188f_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++s32 rtl8188fs_init_xmit_priv(PADAPTER padapter); ++void rtl8188fs_free_xmit_priv(PADAPTER padapter); ++s32 rtl8188fs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188fs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8188fs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188fs_xmit_buf_handler(PADAPTER padapter); ++thread_return rtl8188fs_xmit_thread(thread_context context); ++#define hal_xmit_handler rtl8188fs_xmit_buf_handler ++#endif ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8188fu_xmit_buf_handler(PADAPTER padapter); ++#define hal_xmit_handler rtl8188fu_xmit_buf_handler ++ ++ ++s32 rtl8188fu_init_xmit_priv(PADAPTER padapter); ++void rtl8188fu_free_xmit_priv(PADAPTER padapter); ++s32 rtl8188fu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188fu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8188fu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++//s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); ++void rtl8188fu_xmit_tasklet(void *priv); ++s32 rtl8188fu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8188fe_init_xmit_priv(PADAPTER padapter); ++void rtl8188fe_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf *rtl8188fe_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++void rtl8188fe_xmitframe_resume(_adapter *padapter); ++s32 rtl8188fe_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8188fe_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8188fe_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8188fe_xmit_tasklet(void *priv); ++#endif ++ ++u8 BWMapping_8188F(PADAPTER Adapter, struct pkt_attrib *pattrib); ++u8 SCMapping_8188F(PADAPTER Adapter, struct pkt_attrib *pattrib); ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_cmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_cmd.h +old mode 100755 +new mode 100644 +index f765795..3f3b2dd +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_cmd.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_cmd.h +@@ -42,6 +42,7 @@ typedef enum _RTL8192E_H2C_CMD + H2C_8192E_SAP_PS = 0x26, + H2C_8192E_RA_MASK = 0x40, + H2C_8192E_RSSI_REPORT = 0x42, ++ H2C_8192E_RA_PARA_ADJUST = 0x46, + + H2C_8192E_WO_WLAN = 0x80, + H2C_8192E_REMOTE_WAKE_CTRL = 0x81, +@@ -55,21 +56,6 @@ typedef enum _RTL8192E_H2C_CMD + MAX_8192E_H2CCMD + }RTL8192E_H2C_CMD; + +-typedef enum _RTL8192E_C2H_EVT +-{ +- C2H_8192E_DBG = 0, +- C2H_8192E_LB = 1, +- C2H_8192E_TXBF = 2, +- C2H_8192E_TX_REPORT = 3, +- C2H_8192E_BT_INFO = 9, +- C2H_8192E_FW_SWCHNL = 0x10, +- C2H_8192E_BT_MP = 11, +- C2H_8192E_RA_RPT=12, +- +- MAX_8192E_C2HEVENT +-}RTL8192E_C2H_EVT; +- +- + struct cmd_msg_parm { + u8 eid; //element id + u8 sz; // sz +@@ -114,13 +100,14 @@ typedef struct _RSVDPAGE_LOC_92E { + + + //_SETPWRMODE_PARM +-#define SET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) ++#define SET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) + #define SET_8192E_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) + #define SET_8192E_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) +-#define SET_8192E_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) +-#define SET_8192E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) +-#define SET_8192E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) +-#define SET_8192E_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+5, 0, 8, __Value) ++#define SET_8192E_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8192E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8192E_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) ++#define SET_8192E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++#define SET_8192E_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) + #define GET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) + + //_P2P_PS_OFFLOAD +@@ -137,54 +124,30 @@ void rtl8192e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); + void rtl8192e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); + u8 rtl8192e_set_rssi_cmd(PADAPTER padapter, u8 *param); + void rtl8192e_set_raid_cmd(PADAPTER padapter, u32 bitmap, u8* arg); +-void rtl8192e_Add_RateATid(PADAPTER padapter, u32 bitmap, u8 *arg, u8 rssi_level); ++void rtl8192e_Add_RateATid(PADAPTER padapter, u64 rate_bitmap, u8 *arg, u8 rssi_level); ++s32 FillH2CCmd_8192E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); ++u8 GetTxBufferRsvdPageNum8192E(_adapter *padapter, bool wowlan); + //u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); +- +- ++s32 c2h_handler_8192e(PADAPTER padapter, u8 *buf); ++#ifdef CONFIG_BT_COEXIST ++void rtl8192e_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); ++#endif // CONFIG_BT_COEXIST + #ifdef CONFIG_P2P_PS + void rtl8192e_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); +-//void rtl8723a_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); + #endif //CONFIG_P2P + + void CheckFwRsvdPageContent(PADAPTER padapter); +-void rtl8192e_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt ); ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++void rtl8192e_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); ++#endif ++#endif + + #ifdef CONFIG_TSF_RESET_OFFLOAD +-//u8 rtl8188e_reset_tsf(_adapter *padapter, u8 reset_port); + int reset_tsf(PADAPTER Adapter, u8 reset_port ); + #endif // CONFIG_TSF_RESET_OFFLOAD + +-#ifdef CONFIG_WOWLAN +-typedef struct _SETWOWLAN_PARM{ +- u8 mode; +- u8 gpio_index; +- u8 gpio_duration; +- u8 second_mode; +- u8 reserve; +-}SETWOWLAN_PARM, *PSETWOWLAN_PARM; +- +-#define FW_WOWLAN_FUN_EN BIT(0) +-#define FW_WOWLAN_PATTERN_MATCH BIT(1) +-#define FW_WOWLAN_MAGIC_PKT BIT(2) +-#define FW_WOWLAN_UNICAST BIT(3) +-#define FW_WOWLAN_ALL_PKT_DROP BIT(4) +-#define FW_WOWLAN_GPIO_ACTIVE BIT(5) +-#define FW_WOWLAN_REKEY_WAKEUP BIT(6) +-#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) +- +-#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) +-#define FW_FW_PARSE_MAGIC_PKT BIT(1) +- +-#define FW_REMOTE_WAKE_CTRL_EN BIT(0) +-#define FW_REALWOWLAN_EN BIT(5) +-#endif//CONFIG_WOWLAN +- +-#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) +-void rtl8192e_set_wowlan_cmd(_adapter* padapter, u8 enable); +-void rtl8192e_set_ap_wowlan_cmd(_adapter* padapter, u8 enable); +-void rtl8192e_set_ap_ps_wowlan_cmd(_adapter* padapter, u8 enable); +-void SetFwRelatedForWoWLAN8192E(_adapter* padapter, u8 bHostIsGoingtoSleep); +-#endif + /// TX Feedback Content + #define USEC_UNIT_FOR_8192E_C2H_TX_RPT_QUEUE_TIME 256 + +@@ -212,4 +175,4 @@ C2HPacketHandler_8192E( + IN u1Byte Length + ); + +-#endif//__RTL8188E_CMD_H__ ++#endif//__RTL8192E_CMD_H__ +\ No newline at end of file +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_dm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_dm.h +old mode 100755 +new mode 100644 +index bb4f7a5..677de0c +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_dm.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_dm.h +@@ -30,9 +30,5 @@ void rtl8192e_HalDmWatchDog(IN PADAPTER Adapter); + + //void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); + +-#ifdef CONFIG_ANTENNA_DIVERSITY +-void AntDivCompare8192e(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); +-u8 AntDivBeforeLink8192e(PADAPTER Adapter ); +-#endif + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_hal.h +old mode 100755 +new mode 100644 +index 2d72c68..93b7eab +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_hal.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_hal.h +@@ -1,296 +1,350 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8192E_HAL_H__ +-#define __RTL8192E_HAL_H__ +- +-//#include "hal_com.h" +- +-#if 1 +-#include "hal_data.h" +-#else +-#include "../hal/OUTSRC/odm_precomp.h" +-#endif +- +-//include HAL Related header after HAL Related compiling flags +-#include "rtl8192e_spec.h" +-#include "rtl8192e_rf.h" +-#include "rtl8192e_dm.h" +-#include "rtl8192e_recv.h" +-#include "rtl8192e_xmit.h" +-#include "rtl8192e_cmd.h" +-#include "rtl8192e_led.h" +-#include "Hal8192EPwrSeq.h" +-#include "Hal8192EPhyReg.h" +-#include "Hal8192EPhyCfg.h" +- +- +-#ifdef DBG_CONFIG_ERROR_DETECT +-#include "rtl8192e_sreset.h" +-#endif +- +- +-//--------------------------------------------------------------------- +-// RTL8192E From header +-//--------------------------------------------------------------------- +- #define RTL8192E_FW_IMG "rtl8192e/FW_NIC.bin" +- #define RTL8192E_FW_WW_IMG "rtl8192e/FW_WoWLAN.bin" +- #define RTL8192E_PHY_REG "rtl8192e/PHY_REG.txt" +- #define RTL8192E_PHY_RADIO_A "rtl8192e/RadioA.txt" +- #define RTL8192E_PHY_RADIO_B "rtl8192e/RadioB.txt" +- #define RTL8192E_TXPWR_TRACK "rtl8192e/TxPowerTrack.txt" +- #define RTL8192E_AGC_TAB "rtl8192e/AGC_TAB.txt" +- #define RTL8192E_PHY_MACREG "rtl8192e/MAC_REG.txt" +- #define RTL8192E_PHY_REG_PG "rtl8192e/PHY_REG_PG.txt" +- #define RTL8192E_PHY_REG_MP "rtl8192e/PHY_REG_MP.txt" +- #define RTL8192E_TXPWR_LMT "rtl8192e/TXPWR_LMT.txt" +- +-//--------------------------------------------------------------------- +-// RTL8192E Power Configuration CMDs for PCIe interface +-//--------------------------------------------------------------------- +-#define Rtl8192E_NIC_PWR_ON_FLOW rtl8192E_power_on_flow +-#define Rtl8192E_NIC_RF_OFF_FLOW rtl8192E_radio_off_flow +-#define Rtl8192E_NIC_DISABLE_FLOW rtl8192E_card_disable_flow +-#define Rtl8192E_NIC_ENABLE_FLOW rtl8192E_card_enable_flow +-#define Rtl8192E_NIC_SUSPEND_FLOW rtl8192E_suspend_flow +-#define Rtl8192E_NIC_RESUME_FLOW rtl8192E_resume_flow +-#define Rtl8192E_NIC_PDN_FLOW rtl8192E_hwpdn_flow +-#define Rtl8192E_NIC_LPS_ENTER_FLOW rtl8192E_enter_lps_flow +-#define Rtl8192E_NIC_LPS_LEAVE_FLOW rtl8192E_leave_lps_flow +- +- +-#if 1 // download firmware related data structure +-#define FW_SIZE_8192E 0x8000 // Compatible with RTL8192e Maximal RAM code size 32k +-#define FW_START_ADDRESS 0x1000 +-#define FW_END_ADDRESS 0x5FFF +- +- +-#define IS_FW_HEADER_EXIST_8192E(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8192E(_pFwHdr) &0xFFF0) == 0x92E0) +- +- +- +-typedef struct _RT_FIRMWARE_8192E { +- FIRMWARE_SOURCE eFWSource; +-#ifdef CONFIG_EMBEDDED_FWIMG +- u8* szFwBuffer; +-#else +- u8 szFwBuffer[FW_SIZE_8192E]; +-#endif +- u32 ulFwLength; +-} RT_FIRMWARE_8192E, *PRT_FIRMWARE_8192E; +- +-// +-// This structure must be cared byte-ordering +-// +-// Added by tynli. 2009.12.04. +- +-//===================================================== +-// Firmware Header(8-byte alinment required) +-//===================================================== +-//--- LONG WORD 0 ---- +-#define GET_FIRMWARE_HDR_SIGNATURE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut +-#define GET_FIRMWARE_HDR_CATEGORY_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI +-#define GET_FIRMWARE_HDR_FUNCTION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions +-#define GET_FIRMWARE_HDR_VERSION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version +-#define GET_FIRMWARE_HDR_SUB_VER_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 +-#define GET_FIRMWARE_HDR_RSVD1_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) +- +-//--- LONG WORD 1 ---- +-#define GET_FIRMWARE_HDR_MONTH_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field +-#define GET_FIRMWARE_HDR_DATE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field +-#define GET_FIRMWARE_HDR_HOUR_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field +-#define GET_FIRMWARE_HDR_MINUTE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field +-#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code +-#define GET_FIRMWARE_HDR_RSVD2_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) +- +-//--- LONG WORD 2 ---- +-#define GET_FIRMWARE_HDR_SVN_IDX_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index +-#define GET_FIRMWARE_HDR_RSVD3_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) +- +-//--- LONG WORD 3 ---- +-#define GET_FIRMWARE_HDR_RSVD4_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) +-#define GET_FIRMWARE_HDR_RSVD5_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) +- +-#endif // download firmware related data structure +- +-#define DRIVER_EARLY_INT_TIME_8192E 0x05 +-#define BCN_DMA_ATIME_INT_TIME_8192E 0x02 +- +-#define MAX_RX_DMA_BUFFER_SIZE_8192E 0x3d00 //0x3E80 //0x3FFF // RX 16K reserved for WOW ? +- +- +-#define TX_TOTAL_PAGE_NUMBER_8192E 243 //0x00~0xF3 totoal pages: F4 +- +-#define TX_PAGE_BOUNDARY_8192E (TX_TOTAL_PAGE_NUMBER_8192E + 1)//0xF4 ~0xFF ,Rserved 12 pages for BCN/PS-POLL.. +-#define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 //0xA5 +-#define TX_PAGE_BOUNDARY_WOWLAN_8192E 0xE0 +- +-// For Normal Chip Setting +-// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C +- +-#define NORMAL_PAGE_NUM_HPQ_8192E 0x10 +-#define NORMAL_PAGE_NUM_LPQ_8192E 0x10 +-#define NORMAL_PAGE_NUM_NPQ_8192E 0x10 +-#define NORMAL_PAGE_NUM_EPQ_8192E 0x00 +- +- +-//Note: For WMM Normal Chip Setting ,modify later +-#define WMM_NORMAL_PAGE_NUM_HPQ_8192E NORMAL_PAGE_NUM_HPQ_8192E +-#define WMM_NORMAL_PAGE_NUM_LPQ_8192E NORMAL_PAGE_NUM_LPQ_8192E +-#define WMM_NORMAL_PAGE_NUM_NPQ_8192E NORMAL_PAGE_NUM_NPQ_8192E +- +- +-//------------------------------------------------------------------------- +-// Chip specific +-//------------------------------------------------------------------------- +- +-// pic buffer descriptor +-#define RTL8192EE_SEG_NUM TX_BUFFER_SEG_NUM +-#define TX_DESC_NUM_92E 128 +-#define RX_DESC_NUM_92E 128 +- +-//------------------------------------------------------------------------- +-// Channel Plan +-//------------------------------------------------------------------------- +- +-#define HWSET_MAX_SIZE_8192E 512 +- +-#define EFUSE_REAL_CONTENT_LEN_8192E 512 +- +-#define EFUSE_MAP_LEN_8192E 512 +-#define EFUSE_MAX_SECTION_8192E 64 +-#define EFUSE_MAX_WORD_UNIT_8192E 4 +-#define EFUSE_IC_ID_OFFSET_8192E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. +-#define AVAILABLE_EFUSE_ADDR_8192E(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192E) +-// +-// To prevent out of boundary programming case, leave 1byte and program full section +-// 9bytes + 1byt + 5bytes and pre 1byte. +-// For worst case: +-// | 1byte|----8bytes----|1byte|--5bytes--| +-// | | Reserved(14bytes) | +-// +-#define EFUSE_OOB_PROTECT_BYTES_8192E 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. +- +- +- +-//======================================================== +-// EFUSE for BT definition +-//======================================================== +-#define EFUSE_BT_REAL_BANK_CONTENT_LEN_8192E 512 +-#define EFUSE_BT_REAL_CONTENT_LEN_8192E 1024 // 512*2 +-#define EFUSE_BT_MAP_LEN_8192E 1024 // 1k bytes +-#define EFUSE_BT_MAX_SECTION_8192E 128 // 1024/8 +- +-#define EFUSE_PROTECT_BYTES_BANK_8192E 16 +-#define EFUSE_MAX_BANK_8192E 3 +-//=========================================================== +- +-#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) +-#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) +- +-//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) +- +-//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) +- +-#define GetDefaultAdapter(padapter) padapter +- +-// rtl8812_hal_init.c +-void _8051Reset8192E(PADAPTER padapter); +-s32 FirmwareDownload8192E(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); +-void InitializeFirmwareVars8192E(PADAPTER padapter); +- +-s32 InitLLTTable8192E(PADAPTER padapter, u8 txpktbuf_bndy); +- +-// EFuse +-u8 GetEEPROMSize8192E(PADAPTER padapter); +-void hal_InitPGData_8192E(PADAPTER padapter, u8* PROMContent); +-void Hal_EfuseParseIDCode8192E(PADAPTER padapter, u8 *hwinfo); +-void Hal_ReadPROMVersion8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void Hal_ReadPowerSavingMode8192E(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); +-void Hal_ReadTxPowerInfo8192E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail); +-void Hal_ReadBoardType8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); +-void Hal_ReadThermalMeter_8192E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail); +-void Hal_ReadChannelPlan8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void Hal_EfuseParseXtal_8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); +-void Hal_ReadAntennaDiversity8192E(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); +-void Hal_ReadPAType_8192E(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); +-void Hal_EfuseParseBTCoexistInfo8192E(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); +-u8 Hal_CrystalAFEAdjust(_adapter * Adapter); +- +-BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter); +- +-#ifdef CONFIG_WOWLAN +-void Hal_DetectWoWMode(PADAPTER pAdapter); +-#endif //CONFIG_WOWLAN +- +-/***********************************************************/ +-// RTL8192E-MAC Setting +-VOID _InitTxBufferBoundary_8192E(IN PADAPTER Adapter,IN u8 txpktbuf_bndy); +-VOID _InitPageBoundary_8192E(IN PADAPTER Adapter); +-//VOID _InitTransferPageSize_8192E(IN PADAPTER Adapter); +-VOID _InitDriverInfoSize_8192E(IN PADAPTER Adapter,IN u8 drvInfoSize); +-VOID _InitRxSetting_8192E(PADAPTER Adapter); +-VOID _InitRDGSetting_8192E(PADAPTER Adapter); +-void _InitID_8192E(IN PADAPTER Adapter); +-VOID _InitNetworkType_8192E(IN PADAPTER Adapter); +-VOID _InitWMACSetting_8192E(IN PADAPTER Adapter); ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192E_HAL_H__ ++#define __RTL8192E_HAL_H__ ++ ++//#include "hal_com.h" ++ ++#include "hal_data.h" ++ ++//include HAL Related header after HAL Related compiling flags ++#include "rtl8192e_spec.h" ++#include "rtl8192e_rf.h" ++#include "rtl8192e_dm.h" ++#include "rtl8192e_recv.h" ++#include "rtl8192e_xmit.h" ++#include "rtl8192e_cmd.h" ++#include "rtl8192e_led.h" ++#include "Hal8192EPwrSeq.h" ++#include "Hal8192EPhyReg.h" ++#include "Hal8192EPhyCfg.h" ++ ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8192e_sreset.h" ++#endif ++ ++ ++//--------------------------------------------------------------------- ++// RTL8192E From header ++//--------------------------------------------------------------------- ++ #define RTL8192E_FW_IMG "rtl8192e/FW_NIC.bin" ++ #define RTL8192E_FW_WW_IMG "rtl8192e/FW_WoWLAN.bin" ++ #define RTL8192E_PHY_REG "rtl8192e/PHY_REG.txt" ++ #define RTL8192E_PHY_RADIO_A "rtl8192e/RadioA.txt" ++ #define RTL8192E_PHY_RADIO_B "rtl8192e/RadioB.txt" ++ #define RTL8192E_TXPWR_TRACK "rtl8192e/TxPowerTrack.txt" ++ #define RTL8192E_AGC_TAB "rtl8192e/AGC_TAB.txt" ++ #define RTL8192E_PHY_MACREG "rtl8192e/MAC_REG.txt" ++ #define RTL8192E_PHY_REG_PG "rtl8192e/PHY_REG_PG.txt" ++ #define RTL8192E_PHY_REG_MP "rtl8192e/PHY_REG_MP.txt" ++ #define RTL8192E_TXPWR_LMT "rtl8192e/TXPWR_LMT.txt" ++ #define RTL8192E_WIFI_ANT_ISOLATION "rtl8192e/wifi_ant_isolation.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8192E Power Configuration CMDs for PCIe interface ++//--------------------------------------------------------------------- ++#define Rtl8192E_NIC_PWR_ON_FLOW rtl8192E_power_on_flow ++#define Rtl8192E_NIC_RF_OFF_FLOW rtl8192E_radio_off_flow ++#define Rtl8192E_NIC_DISABLE_FLOW rtl8192E_card_disable_flow ++#define Rtl8192E_NIC_ENABLE_FLOW rtl8192E_card_enable_flow ++#define Rtl8192E_NIC_SUSPEND_FLOW rtl8192E_suspend_flow ++#define Rtl8192E_NIC_RESUME_FLOW rtl8192E_resume_flow ++#define Rtl8192E_NIC_PDN_FLOW rtl8192E_hwpdn_flow ++#define Rtl8192E_NIC_LPS_ENTER_FLOW rtl8192E_enter_lps_flow ++#define Rtl8192E_NIC_LPS_LEAVE_FLOW rtl8192E_leave_lps_flow ++ ++ ++#if 1 // download firmware related data structure ++#define FW_SIZE_8192E 0x8000 // Compatible with RTL8192e Maximal RAM code size 32k ++#define FW_START_ADDRESS 0x1000 ++#define FW_END_ADDRESS 0x5FFF ++ ++ ++#define IS_FW_HEADER_EXIST_8192E(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8192E(_pFwHdr) &0xFFF0) == 0x92E0) ++ ++ ++ ++typedef struct _RT_FIRMWARE_8192E { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[FW_SIZE_8192E]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8192E, *PRT_FIRMWARE_8192E; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++ ++//===================================================== ++// Firmware Header(8-byte alinment required) ++//===================================================== ++//--- LONG WORD 0 ---- ++#define GET_FIRMWARE_HDR_SIGNATURE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++#define GET_FIRMWARE_HDR_CATEGORY_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI ++#define GET_FIRMWARE_HDR_FUNCTION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++#define GET_FIRMWARE_HDR_VERSION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version ++#define GET_FIRMWARE_HDR_SUB_VER_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 ++#define GET_FIRMWARE_HDR_RSVD1_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) ++ ++//--- LONG WORD 1 ---- ++#define GET_FIRMWARE_HDR_MONTH_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field ++#define GET_FIRMWARE_HDR_DATE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field ++#define GET_FIRMWARE_HDR_HOUR_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field ++#define GET_FIRMWARE_HDR_MINUTE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field ++#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code ++#define GET_FIRMWARE_HDR_RSVD2_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) ++ ++//--- LONG WORD 2 ---- ++#define GET_FIRMWARE_HDR_SVN_IDX_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index ++#define GET_FIRMWARE_HDR_RSVD3_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) ++ ++//--- LONG WORD 3 ---- ++#define GET_FIRMWARE_HDR_RSVD4_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) ++#define GET_FIRMWARE_HDR_RSVD5_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) ++ ++#endif // download firmware related data structure ++ ++#define DRIVER_EARLY_INT_TIME_8192E 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8192E 0x02 ++#define RX_DMA_SIZE_8192E 0x4000 /* 16K*/ ++ ++#ifdef CONFIG_WOWLAN ++#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ ++#else ++#define RESV_FMWF 0 ++#endif ++ ++#ifdef CONFIG_FW_C2H_DEBUG ++ #define RX_DMA_RESERVED_SIZE_8192E 0x100 /* 256B, reserved for c2h debug message*/ ++#else ++ #define RX_DMA_RESERVED_SIZE_8192E 0x40 /* 64B, reserved for c2h event(16bytes) or ccx(8 Bytes )*/ ++#endif ++#define MAX_RX_DMA_BUFFER_SIZE_8192E (RX_DMA_SIZE_8192E-RX_DMA_RESERVED_SIZE_8192E) /*RX 16K*/ ++ ++//For General Reserved Page Number(Beacon Queue is reserved page) ++//if (CONFIG_2BCN_EN) Beacon:4, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 ++//Beacon:2, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 ++#define RSVD_PAGE_NUM_8192E 0x08 ++//For WoWLan , more reserved page ++//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8192E 0x07 ++#else ++#define WOWLAN_PAGE_NUM_8192E 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef WOWLAN_PAGE_NUM_8192E ++#define WOWLAN_PAGE_NUM_8192E 0x0d ++#endif ++ ++/* Note: ++Tx FIFO Size : 64KB ++Tx page Size : 256B ++Total page numbers : 256(0x100) ++*/ ++ ++#define TOTAL_RSVD_PAGE_NUMBER_8192E (RSVD_PAGE_NUM_8192E+WOWLAN_PAGE_NUM_8192E) ++ ++#define TOTAL_PAGE_NUMBER_8192E (0x100) ++#define TX_TOTAL_PAGE_NUMBER_8192E (TOTAL_PAGE_NUMBER_8192E - TOTAL_RSVD_PAGE_NUMBER_8192E) ++ ++#define TX_PAGE_BOUNDARY_8192E ( TX_TOTAL_PAGE_NUMBER_8192E ) /* beacon header start address */ ++ ++ ++#define PAGE_SIZE_TX_92E PAGE_SIZE_256 ++#define RSVD_PKT_LEN_92E (TOTAL_RSVD_PAGE_NUMBER_8192E *PAGE_SIZE_TX_92E) ++ ++#define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 //0xA5 ++#define TX_PAGE_BOUNDARY_WOWLAN_8192E 0xE0 ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C ++ ++#define NORMAL_PAGE_NUM_HPQ_8192E 0x10 ++#define NORMAL_PAGE_NUM_LPQ_8192E 0x10 ++#define NORMAL_PAGE_NUM_NPQ_8192E 0x10 ++#define NORMAL_PAGE_NUM_EPQ_8192E 0x00 ++ ++ ++//Note: For WMM Normal Chip Setting ,modify later ++#define WMM_NORMAL_PAGE_NUM_HPQ_8192E NORMAL_PAGE_NUM_HPQ_8192E ++#define WMM_NORMAL_PAGE_NUM_LPQ_8192E NORMAL_PAGE_NUM_LPQ_8192E ++#define WMM_NORMAL_PAGE_NUM_NPQ_8192E NORMAL_PAGE_NUM_NPQ_8192E ++ ++ ++//------------------------------------------------------------------------- ++// Chip specific ++//------------------------------------------------------------------------- ++ ++// pic buffer descriptor ++#define RTL8192EE_SEG_NUM TX_BUFFER_SEG_NUM ++#define TX_DESC_NUM_92E 128 ++#define RX_DESC_NUM_92E 128 ++ ++//------------------------------------------------------------------------- ++// Channel Plan ++//------------------------------------------------------------------------- ++ ++#define HWSET_MAX_SIZE_8192E 512 ++ ++#define EFUSE_REAL_CONTENT_LEN_8192E 512 ++ ++#define EFUSE_MAP_LEN_8192E 512 ++#define EFUSE_MAX_SECTION_8192E 64 ++#define EFUSE_MAX_WORD_UNIT_8192E 4 ++#define EFUSE_IC_ID_OFFSET_8192E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR_8192E(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192E) ++// ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 1byte|----8bytes----|1byte|--5bytes--| ++// | | Reserved(14bytes) | ++// ++#define EFUSE_OOB_PROTECT_BYTES_8192E 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. ++ ++ ++ ++//======================================================== ++// EFUSE for BT definition ++//======================================================== ++#define EFUSE_BT_REAL_BANK_CONTENT_LEN_8192E 512 ++#define EFUSE_BT_REAL_CONTENT_LEN_8192E 1024 // 512*2 ++#define EFUSE_BT_MAP_LEN_8192E 1024 // 1k bytes ++#define EFUSE_BT_MAX_SECTION_8192E 128 // 1024/8 ++ ++#define EFUSE_PROTECT_BYTES_BANK_8192E 16 ++#define EFUSE_MAX_BANK_8192E 3 ++//=========================================================== ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) ++ ++//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) ++ ++// rtl8812_hal_init.c ++void _8051Reset8192E(PADAPTER padapter); ++s32 FirmwareDownload8192E(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); ++void InitializeFirmwareVars8192E(PADAPTER padapter); ++ ++s32 InitLLTTable8192E(PADAPTER padapter, u8 txpktbuf_bndy); ++ ++// EFuse ++u8 GetEEPROMSize8192E(PADAPTER padapter); ++void hal_InitPGData_8192E(PADAPTER padapter, u8* PROMContent); ++void Hal_EfuseParseIDCode8192E(PADAPTER padapter, u8 *hwinfo); ++void Hal_ReadPROMVersion8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_ReadPowerSavingMode8192E(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++void Hal_ReadTxPowerInfo8192E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadBoardType8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadThermalMeter_8192E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail); ++void Hal_ReadChannelPlan8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseXtal_8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadAntennaDiversity8192E(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); ++void Hal_ReadPAType_8192E(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); ++void Hal_ReadAmplifierType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++void Hal_ReadRFEType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++void Hal_EfuseParseBTCoexistInfo8192E(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseKFreeData_8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++ ++u8 Hal_CrystalAFEAdjust(_adapter * Adapter); ++ ++BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter); ++ ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++/***********************************************************/ ++// RTL8192E-MAC Setting ++VOID _InitQueueReservedPage_8192E(IN PADAPTER Adapter); ++VOID _InitQueuePriority_8192E(IN PADAPTER Adapter); ++VOID _InitTxBufferBoundary_8192E(IN PADAPTER Adapter,IN u8 txpktbuf_bndy); ++VOID _InitPageBoundary_8192E(IN PADAPTER Adapter); ++//VOID _InitTransferPageSize_8192E(IN PADAPTER Adapter); ++VOID _InitDriverInfoSize_8192E(IN PADAPTER Adapter,IN u8 drvInfoSize); ++VOID _InitRDGSetting_8192E(PADAPTER Adapter); ++void _InitID_8192E(IN PADAPTER Adapter); ++VOID _InitNetworkType_8192E(IN PADAPTER Adapter); ++VOID _InitWMACSetting_8192E(IN PADAPTER Adapter); + VOID _InitAdaptiveCtrl_8192E(IN PADAPTER Adapter); +-VOID _InitEDCA_8192E( IN PADAPTER Adapter); +-VOID _InitRetryFunction_8192E( IN PADAPTER Adapter); +-VOID _InitBeaconParameters_8192E(IN PADAPTER Adapter); +-VOID _InitBeaconMaxError_8192E( +- IN PADAPTER Adapter, +- IN BOOLEAN InfraMode +- ); +-void _BBTurnOnBlock_8192E(PADAPTER padapter); +-void SetBeaconRelatedRegisters8192E(PADAPTER padapter); +-VOID hal_ReadRFType_8192E(PADAPTER Adapter); +-// RTL8192E-MAC Setting +-/***********************************************************/ +- +-void SetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val); +-void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val); +-u8 +-SetHalDefVar8192E( +- IN PADAPTER Adapter, +- IN HAL_DEF_VARIABLE eVariable, +- IN PVOID pValue +- ); +-u8 +-GetHalDefVar8192E( +- IN PADAPTER Adapter, +- IN HAL_DEF_VARIABLE eVariable, +- IN PVOID pValue +- ); +- +-void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc); +-void rtl8192e_init_default_value(_adapter * padapter); +-// register +-void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); +- +-void rtl8192e_start_thread(_adapter *padapter); +-void rtl8192e_stop_thread(_adapter *padapter); +- +-#ifdef CONFIG_PCI_HCI +-BOOLEAN InterruptRecognized8192EE(PADAPTER Adapter); +-u16 get_txdesc_buf_addr(u16 ff_hwaddr); +-#endif +- +-#endif //__RTL8192E_HAL_H__ +- ++VOID _InitRateFallback_8192E(IN PADAPTER Adapter); ++VOID _InitEDCA_8192E( IN PADAPTER Adapter); ++VOID _InitRetryFunction_8192E( IN PADAPTER Adapter); ++VOID _BBTurnOnBlock_8192E(IN PADAPTER Adapter); ++VOID _InitBeaconParameters_8192E(IN PADAPTER Adapter); ++VOID _InitBeaconMaxError_8192E( ++ IN PADAPTER Adapter, ++ IN BOOLEAN InfraMode ++ ); ++void SetBeaconRelatedRegisters8192E(PADAPTER padapter); ++VOID hal_ReadRFType_8192E(PADAPTER Adapter); ++// RTL8192E-MAC Setting ++/***********************************************************/ ++ ++void SetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val); ++void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val); ++u8 ++SetHalDefVar8192E( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ); ++u8 ++GetHalDefVar8192E( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ); ++ ++void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8192e(_adapter *adapter); ++void rtl8192e_init_default_value(_adapter * padapter); ++// register ++void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); ++ ++void rtl8192e_start_thread(_adapter *padapter); ++void rtl8192e_stop_thread(_adapter *padapter); ++ ++#ifdef CONFIG_PCI_HCI ++BOOLEAN InterruptRecognized8192EE(PADAPTER Adapter); ++u16 get_txdesc_buf_addr(u16 ff_hwaddr); ++#endif ++ ++#ifdef CONFIG_SDIO_HCI ++#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT ++void _init_available_page_threshold(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ); ++#endif ++#endif ++ ++#ifdef CONFIG_BT_COEXIST ++void rtl8192e_combo_card_WifiOnlyHwInit(PADAPTER Adapter); ++#endif ++ ++#endif //__RTL8192E_HAL_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_led.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_led.h +old mode 100755 +new mode 100644 +index 221e0aa..53317d0 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_led.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_led.h +@@ -1,41 +1,41 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8192E_LED_H__ +-#define __RTL8192E_LED_H__ +- +- +-//================================================================================ +-// Interface to manipulate LED objects. +-//================================================================================ +-#ifdef CONFIG_USB_HCI +-void rtl8192eu_InitSwLeds(PADAPTER padapter); +-void rtl8192eu_DeInitSwLeds(PADAPTER padapter); +-#endif +-#ifdef CONFIG_PCI_HCI +-void rtl8192ee_InitSwLeds(PADAPTER padapter); +-void rtl8192ee_DeInitSwLeds(PADAPTER padapter); +-#endif +-#ifdef CONFIG_SDIO_HCI +-void rtl8192es_InitSwLeds(PADAPTER padapter); +-void rtl8192es_DeInitSwLeds(PADAPTER padapter); +-#endif +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192E_LED_H__ ++#define __RTL8192E_LED_H__ ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8192eu_InitSwLeds(PADAPTER padapter); ++void rtl8192eu_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8192ee_InitSwLeds(PADAPTER padapter); ++void rtl8192ee_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_SDIO_HCI ++void rtl8192es_InitSwLeds(PADAPTER padapter); ++void rtl8192es_DeInitSwLeds(PADAPTER padapter); ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_recv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_recv.h +old mode 100755 +new mode 100644 +index 4dc9769..cc14545 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_recv.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_recv.h +@@ -1,178 +1,178 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8192E_RECV_H__ +-#define __RTL8192E_RECV_H__ +- +-#if defined(CONFIG_USB_HCI) +- +-#ifndef MAX_RECVBUF_SZ +-#ifdef PLATFORM_OS_CE +-#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k +-#else +- #ifdef CONFIG_MINIMAL_MEMORY_USAGE +- #define MAX_RECVBUF_SZ (4000) // about 4K +- #else +- #ifdef CONFIG_PLATFORM_MSTAR +- #define MAX_RECVBUF_SZ (8192) // 8K +- #else +- #define MAX_RECVBUF_SZ (32768) // 32k +- #endif +- //#define MAX_RECVBUF_SZ (20480) //20K +- //#define MAX_RECVBUF_SZ (10240) //10K +- //#define MAX_RECVBUF_SZ (16384) // 16k - 92E RX BUF :16K +- //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k +- #endif +-#endif +-#endif //!MAX_RECVBUF_SZ +- +-#elif defined(CONFIG_PCI_HCI) +-//#ifndef CONFIG_MINIMAL_MEMORY_USAGE +-// #define MAX_RECVBUF_SZ (9100) +-//#else +- #define MAX_RECVBUF_SZ (4000) // about 4K +-//#endif +- +- +-#elif defined(CONFIG_SDIO_HCI) +- +-#define MAX_RECVBUF_SZ (10240) +- +-#endif +- +- +-// Rx smooth factor +-#define Rx_Smooth_Factor (20) +- +-//============= +-// [1] Rx Buffer Descriptor (for PCIE) buffer descriptor architecture +-//DWORD 0 +-#define SET_RX_BUFFER_DESC_DATA_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) +-#define SET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc,__Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 15, 1, __Value) +-#define SET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 16, 1, __Value) +-#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 16, 15, __Value) +- +-#define GET_RX_BUFFER_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) +-#define GET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) +-#define GET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 1) +-#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 15) +- +- +-//DWORD 1 +-#define SET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc+4, 0, 32, __Value) +-#define GET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 0, 32) +- +-//DWORD 2 +-#define SET_RX_BUFFER_PHYSICAL_HIGH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc+8, 0, 32, __Value) +- +-//============= +-// [2] Rx Descriptor +-//DWORD 0 +-#define GET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) +-#define GET_RX_STATUS_DESC_CRC32_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) +-#define GET_RX_STATUS_DESC_ICVERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) +-#define GET_RX_STATUS_DESC_DRVINFO_SIZE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) +-#define GET_RX_STATUS_DESC_SECURITY_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) +-#define GET_RX_STATUS_DESC_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) +-#define GET_RX_STATUS_DESC_SHIFT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) +-#define GET_RX_STATUS_DESC_PHY_STATUS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) +-#define GET_RX_STATUS_DESC_SWDEC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) +-#define GET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) +-#define GET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) +- +- +-#define SET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) +-#define SET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) +-#define SET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) +- +-//DWORD 1 +-#define GET_RX_STATUS_DESC_MACID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) +-#define GET_RX_STATUS_DESC_TID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) +-#define GET_RX_STATUS_DESC_MACID_VLD_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 12, 1) +-#define GET_RX_STATUS_DESC_AMSDU_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) +-#define GET_RX_STATUS_DESC_RXID_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) +-#define GET_RX_STATUS_DESC_PAGGR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 15, 1) +-#define GET_RX_STATUS_DESC_A1_FITS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 16, 4) +-#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 20, 1) +-#define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 21, 1) +-#define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 22, 1) +-#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 23, 1) +-#define GET_RX_STATUS_DESC_PAM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 24, 1) +-#define GET_RX_STATUS_DESC_PWR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 25, 1) +-#define GET_RX_STATUS_DESC_MORE_DATA_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 26, 1) +-#define GET_RX_STATUS_DESC_MORE_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 27, 1) +-#define GET_RX_STATUS_DESC_TYPE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 28, 2) +-#define GET_RX_STATUS_DESC_MC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 30, 1) +-#define GET_RX_STATUS_DESC_BC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 31, 1) +- +-//DWORD 2 +-#define GET_RX_STATUS_DESC_SEQ_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) +-#define GET_RX_STATUS_DESC_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) +-#define GET_RX_STATUS_DESC_RX_IS_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) +- +-#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) +-#define GET_RX_STATUS_DESC_HWRSVD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 24, 4) +-#define GET_RX_STATUS_DESC_FCS_OK_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 31, 1) +-#define GET_RX_STATUS_DESC_RPT_SEL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) +- +-//DWORD 3 +-#define GET_RX_STATUS_DESC_RX_RATE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) +-#define GET_RX_STATUS_DESC_HTC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) +-#define GET_RX_STATUS_DESC_EOSP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) +-#define GET_RX_STATUS_DESC_BSSID_FIT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) +-#define GET_RX_STATUS_DESC_DMA_AGG_NUM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) +- +-#define GET_RX_STATUS_DESC_PATTERN_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) +-#define GET_RX_STATUS_DESC_UNICAST_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) +-#define GET_RX_STATUS_DESC_MAGIC_WAKE_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) +- +- +-//DWORD 5 +-#define GET_RX_STATUS_DESC_TSFL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) +- +-#define GET_RX_STATUS_DESC_BUFF_ADDR_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) +-#define GET_RX_STATUS_DESC_BUFF_ADDR64_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) +- +- +-#ifdef CONFIG_SDIO_HCI +-s32 rtl8812s_init_recv_priv(PADAPTER padapter); +-void rtl8812s_free_recv_priv(PADAPTER padapter); +-void rtl8812s_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); +-#endif +- +-#ifdef CONFIG_USB_HCI +-#define INTERRUPT_MSG_FORMAT_LEN 60 +-void rtl8192eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); +-s32 rtl8192eu_init_recv_priv(PADAPTER padapter); +-void rtl8192eu_free_recv_priv(PADAPTER padapter); +-void rtl8192eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); +-void rtl8192eu_recv_tasklet(void *priv); +- +-#endif +- +-#ifdef CONFIG_PCI_HCI +-s32 rtl8192ee_init_recv_priv(PADAPTER padapter); +-void rtl8192ee_free_recv_priv(PADAPTER padapter); +-#endif +- +-void rtl8192e_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); +-void rtl8192e_query_rx_phy_status(union recv_frame *prframe, u8 *pphy_stat); +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192E_RECV_H__ ++#define __RTL8192E_RECV_H__ ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifdef CONFIG_MINIMAL_MEMORY_USAGE ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #else ++ #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER ++ #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ ++ #elif defined(CONFIG_PLATFORM_HISILICON) ++ #define MAX_RECVBUF_SZ (16384) /* 16k */ ++ #else ++ #define MAX_RECVBUF_SZ (32768) /* 32k */ ++ #endif ++ //#define MAX_RECVBUF_SZ (20480) //20K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ //#define MAX_RECVBUF_SZ (16384) // 16k - 92E RX BUF :16K ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) ++ ++#define MAX_RECVBUF_SZ (16384) ++ ++#endif ++ ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++//============= ++// [1] Rx Buffer Descriptor (for PCIE) buffer descriptor architecture ++//DWORD 0 ++#define SET_RX_BUFFER_DESC_DATA_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc,__Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 15, 1, __Value) ++#define SET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 16, 1, __Value) ++#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 16, 15, __Value) ++ ++#define GET_RX_BUFFER_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) ++#define GET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 1) ++#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 15) ++ ++ ++//DWORD 1 ++#define SET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc+4, 0, 32, __Value) ++#define GET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 0, 32) ++ ++//DWORD 2 ++#define SET_RX_BUFFER_PHYSICAL_HIGH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc+8, 0, 32, __Value) ++ ++//============= ++// [2] Rx Descriptor ++//DWORD 0 ++#define GET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) ++#define GET_RX_STATUS_DESC_CRC32_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) ++#define GET_RX_STATUS_DESC_ICVERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_STATUS_DESC_DRVINFO_SIZE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) ++#define GET_RX_STATUS_DESC_SECURITY_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) ++#define GET_RX_STATUS_DESC_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) ++#define GET_RX_STATUS_DESC_SHIFT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) ++#define GET_RX_STATUS_DESC_PHY_STATUS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) ++#define GET_RX_STATUS_DESC_SWDEC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) ++#define GET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++#define GET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) ++ ++ ++#define SET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) ++#define SET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) ++ ++//DWORD 1 ++#define GET_RX_STATUS_DESC_MACID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) ++#define GET_RX_STATUS_DESC_TID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) ++#define GET_RX_STATUS_DESC_MACID_VLD_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 12, 1) ++#define GET_RX_STATUS_DESC_AMSDU_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) ++#define GET_RX_STATUS_DESC_RXID_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) ++#define GET_RX_STATUS_DESC_PAGGR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 15, 1) ++#define GET_RX_STATUS_DESC_A1_FITS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 16, 4) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 20, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 21, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 22, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 23, 1) ++#define GET_RX_STATUS_DESC_PAM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 24, 1) ++#define GET_RX_STATUS_DESC_PWR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 25, 1) ++#define GET_RX_STATUS_DESC_MORE_DATA_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 26, 1) ++#define GET_RX_STATUS_DESC_MORE_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 27, 1) ++#define GET_RX_STATUS_DESC_TYPE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 28, 2) ++#define GET_RX_STATUS_DESC_MC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 30, 1) ++#define GET_RX_STATUS_DESC_BC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 31, 1) ++ ++//DWORD 2 ++#define GET_RX_STATUS_DESC_SEQ_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) ++#define GET_RX_STATUS_DESC_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) ++#define GET_RX_STATUS_DESC_RX_IS_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) ++ ++#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) ++#define GET_RX_STATUS_DESC_HWRSVD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 24, 4) ++#define GET_RX_STATUS_DESC_FCS_OK_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 31, 1) ++#define GET_RX_STATUS_DESC_RPT_SEL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) ++ ++//DWORD 3 ++#define GET_RX_STATUS_DESC_RX_RATE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) ++#define GET_RX_STATUS_DESC_HTC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) ++#define GET_RX_STATUS_DESC_EOSP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) ++#define GET_RX_STATUS_DESC_BSSID_FIT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) ++#define GET_RX_STATUS_DESC_DMA_AGG_NUM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) ++ ++#define GET_RX_STATUS_DESC_PATTERN_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) ++#define GET_RX_STATUS_DESC_UNICAST_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) ++#define GET_RX_STATUS_DESC_MAGIC_WAKE_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) ++ ++ ++//DWORD 5 ++#define GET_RX_STATUS_DESC_TSFL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++#define GET_RX_STATUS_DESC_BUFF_ADDR_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) ++#define GET_RX_STATUS_DESC_BUFF_ADDR64_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) ++ ++ ++#ifdef CONFIG_SDIO_HCI ++s32 rtl8192es_init_recv_priv(PADAPTER padapter); ++void rtl8192es_free_recv_priv(PADAPTER padapter); ++void rtl8192es_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++void rtl8192eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++s32 rtl8192eu_init_recv_priv(PADAPTER padapter); ++void rtl8192eu_free_recv_priv(PADAPTER padapter); ++void rtl8192eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); ++void rtl8192eu_recv_tasklet(void *priv); ++ ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8192ee_init_recv_priv(PADAPTER padapter); ++void rtl8192ee_free_recv_priv(PADAPTER padapter); ++#endif ++ ++void rtl8192e_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); ++ ++#endif /* __RTL8192E_RECV_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_rf.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_spec.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_spec.h +old mode 100755 +new mode 100644 +index 7e5a17e..5b28bfb +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_spec.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_spec.h +@@ -1,316 +1,328 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- *******************************************************************************/ +-#ifndef __RTL8192E_SPEC_H__ +-#define __RTL8192E_SPEC_H__ +- +-#include +- +- +-//============================================================ +-// 8192E Regsiter offset definition +-//============================================================ +- +-//============================================================ +-// +-//============================================================ +- +-//----------------------------------------------------- +-// +-// 0x0000h ~ 0x00FFh System Configuration +-// +-//----------------------------------------------------- +-#define REG_SYS_SWR_CTRL1_8192E 0x0010 // 1 Byte +-#define REG_SYS_SWR_CTRL2_8192E 0x0014 // 1 Byte +-#define REG_AFE_CTRL1_8192E 0x0024 +-#define REG_AFE_CTRL2_8192E 0x0028 +-#define REG_AFE_CTRL3_8192E 0x002c +- +- +-#define REG_SDIO_CTRL_8192E 0x0070 +-#define REG_OPT_CTRL_8192E 0x0074 +-#define REG_RF_B_CTRL_8192E 0x0076 +-#define REG_AFE_CTRL4_8192E 0x0078 +-#define REG_LDO_SWR_CTRL 0x007C +-#define REG_FW_DRV_MSG_8192E 0x0088 +-#define REG_HMEBOX_E2_E3_8192E 0x008C +-#define REG_HIMR0_8192E 0x00B0 +-#define REG_HISR0_8192E 0x00B4 +-#define REG_HIMR1_8192E 0x00B8 +-#define REG_HISR1_8192E 0x00BC +- +-#define REG_SYS_CFG1_8192E 0x00F0 +-#define REG_SYS_CFG2_8192E 0x00FC +-//----------------------------------------------------- +-// +-// 0x0100h ~ 0x01FFh MACTOP General Configuration +-// +-//----------------------------------------------------- +-#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) +-#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) +-#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) +-#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN +- +-#define REG_RSVD3_8192E 0x0168 +-#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 +-#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 +-#define REG_C2HEVT_CMD_LEN_88XX 0x01AE +- +-#define REG_HMEBOX_EXT0_8192E 0x01F0 +-#define REG_HMEBOX_EXT1_8192E 0x01F4 +-#define REG_HMEBOX_EXT2_8192E 0x01F8 +-#define REG_HMEBOX_EXT3_8192E 0x01FC +- +-//----------------------------------------------------- +-// +-// 0x0200h ~ 0x027Fh TXDMA Configuration +-// +-//----------------------------------------------------- +-#define REG_DWBCN0_CTRL 0x0208 +-#define REG_DWBCN1_CTRL 0x0228 +- +-//----------------------------------------------------- +-// +-// 0x0280h ~ 0x02FFh RXDMA Configuration +-// +-//----------------------------------------------------- +-#define REG_RXDMA_8192E 0x0290 +-#define REG_EARLY_MODE_CONTROL_8192E 0x02BC +- +-#define REG_RSVD5_8192E 0x02F0 +-#define REG_RSVD6_8192E 0x02F4 +-#define REG_RSVD7_8192E 0x02F8 +-#define REG_RSVD8_8192E 0x02FC +- +-//----------------------------------------------------- +-// +-// 0x0300h ~ 0x03FFh PCIe +-// +-//----------------------------------------------------- +-#define REG_PCIE_CTRL_REG_8192E 0x0300 +-#define REG_INT_MIG_8192E 0x0304 // Interrupt Migration +-#define REG_BCNQ_TXBD_DESA_8192E 0x0308 // TX Beacon Descriptor Address +-#define REG_MGQ_TXBD_DESA_8192E 0x0310 // TX Manage Queue Descriptor Address +-#define REG_VOQ_TXBD_DESA_8192E 0x0318 // TX VO Queue Descriptor Address +-#define REG_VIQ_TXBD_DESA_8192E 0x0320 // TX VI Queue Descriptor Address +-#define REG_BEQ_TXBD_DESA_8192E 0x0328 // TX BE Queue Descriptor Address +-#define REG_BKQ_TXBD_DESA_8192E 0x0330 // TX BK Queue Descriptor Address +-#define REG_RXQ_RXBD_DESA_8192E 0x0338 // RX Queue Descriptor Address +-#define REG_HI0Q_TXBD_DESA_8192E 0x0340 +-#define REG_HI1Q_TXBD_DESA_8192E 0x0348 +-#define REG_HI2Q_TXBD_DESA_8192E 0x0350 +-#define REG_HI3Q_TXBD_DESA_8192E 0x0358 +-#define REG_HI4Q_TXBD_DESA_8192E 0x0360 +-#define REG_HI5Q_TXBD_DESA_8192E 0x0368 +-#define REG_HI6Q_TXBD_DESA_8192E 0x0370 +-#define REG_HI7Q_TXBD_DESA_8192E 0x0378 +-#define REG_MGQ_TXBD_NUM_8192E 0x0380 +-#define REG_RX_RXBD_NUM_8192E 0x0382 +-#define REG_VOQ_TXBD_NUM_8192E 0x0384 +-#define REG_VIQ_TXBD_NUM_8192E 0x0386 +-#define REG_BEQ_TXBD_NUM_8192E 0x0388 +-#define REG_BKQ_TXBD_NUM_8192E 0x038A +-#define REG_HI0Q_TXBD_NUM_8192E 0x038C +-#define REG_HI1Q_TXBD_NUM_8192E 0x038E +-#define REG_HI2Q_TXBD_NUM_8192E 0x0390 +-#define REG_HI3Q_TXBD_NUM_8192E 0x0392 +-#define REG_HI4Q_TXBD_NUM_8192E 0x0394 +-#define REG_HI5Q_TXBD_NUM_8192E 0x0396 +-#define REG_HI6Q_TXBD_NUM_8192E 0x0398 +-#define REG_HI7Q_TXBD_NUM_8192E 0x039A +-#define REG_TSFTIMER_HCI_8192E 0x039C +- +-//Read Write Point +-#define REG_VOQ_TXBD_IDX_8192E 0x03A0 +-#define REG_VIQ_TXBD_IDX_8192E 0x03A4 +-#define REG_BEQ_TXBD_IDX_8192E 0x03A8 +-#define REG_BKQ_TXBD_IDX_8192E 0x03AC +-#define REG_MGQ_TXBD_IDX_8192E 0x03B0 +-#define REG_RXQ_TXBD_IDX_8192E 0x03B4 +-#define REG_HI0Q_TXBD_IDX_8192E 0x03B8 +-#define REG_HI1Q_TXBD_IDX_8192E 0x03BC +-#define REG_HI2Q_TXBD_IDX_8192E 0x03C0 +-#define REG_HI3Q_TXBD_IDX_8192E 0x03C4 +-#define REG_HI4Q_TXBD_IDX_8192E 0x03C8 +-#define REG_HI5Q_TXBD_IDX_8192E 0x03CC +-#define REG_HI6Q_TXBD_IDX_8192E 0x03D0 +-#define REG_HI7Q_TXBD_IDX_8192E 0x03D4 +- +-#define REG_PCIE_HCPWM_8192EE 0x03D8 // ?????? +-#define REG_PCIE_HRPWM_8192EE 0x03DC //PCIe RPWM // ?????? +-#define REG_DBI_WDATA_V1_8192E 0x03E8 +-#define REG_DBI_RDATA_V1_8192E 0x03EC +-#define REG_DBI_FLAG_V1_8192E 0x03F0 +-#define REG_MDIO_V1_8192E 0x3F4 +-#define REG_PCIE_MIX_CFG_8192E 0x3F8 +- +-//----------------------------------------------------- +-// +-// 0x0400h ~ 0x047Fh Protocol Configuration +-// +-//----------------------------------------------------- +-#define REG_TXBF_CTRL_8192E 0x042C +-#define REG_ARFR0_8192E 0x0444 +-#define REG_ARFR1_8192E 0x044C +-#define REG_CCK_CHECK_8192E 0x0454 +-#define REG_AMPDU_MAX_TIME_8192E 0x0456 +-#define REG_BCNQ1_BDNY_8192E 0x0457 +- +-#define REG_AMPDU_MAX_LENGTH_8192E 0x0458 +-#define REG_WMAC_LBK_BUF_HD_8192E 0x045D +-#define REG_NDPA_OPT_CTRL_8192E 0x045F +-#define REG_DATA_SC_8192E 0x0483 +-#define REG_ARFR2_8192E 0x048C +-#define REG_ARFR3_8192E 0x0494 +-#define REG_TXRPT_START_OFFSET 0x04AC +-#define REG_AMPDU_BURST_MODE_8192E 0x04BC +-#define REG_HT_SINGLE_AMPDU_8192E 0x04C7 +-#define REG_MACID_PKT_DROP0_8192E 0x04D0 +- +-//----------------------------------------------------- +-// +-// 0x0500h ~ 0x05FFh EDCA Configuration +-// +-//----------------------------------------------------- +-#define REG_CTWND_8192E 0x0572 +-#define REG_SECONDARY_CCA_CTRL_8192E 0x0577 +-#define REG_SCH_TXCMD_8192E 0x05F8 +- +-//----------------------------------------------------- +-// +-// 0x0600h ~ 0x07FFh WMAC Configuration +-// +-//----------------------------------------------------- +-#define REG_MAC_CR_8192E 0x0600 +- +-#define REG_MAC_TX_SM_STATE_8192E 0x06B4 +- +-// Power +-#define REG_BFMER0_INFO_8192E 0x06E4 +-#define REG_BFMER1_INFO_8192E 0x06EC +-#define REG_CSI_RPT_PARAM_BW20_8192E 0x06F4 +-#define REG_CSI_RPT_PARAM_BW40_8192E 0x06F8 +-#define REG_CSI_RPT_PARAM_BW80_8192E 0x06FC +- +-// Hardware Port 2 +-#define REG_BFMEE_SEL_8192E 0x0714 +-#define REG_SND_PTCL_CTRL_8192E 0x0718 +- +- +-//----------------------------------------------------- +-// +-// Redifine register definition for compatibility +-// +-//----------------------------------------------------- +- +-// TODO: use these definition when using REG_xxx naming rule. +-// NOTE: DO NOT Remove these definition. Use later. +-#define ISR_8192E REG_HISR0_8192E +- +-//---------------------------------------------------------------------------- +-// 8192E IMR/ISR bits (offset 0xB0, 8bits) +-//---------------------------------------------------------------------------- +-#define IMR_DISABLED_8192E 0 +-// IMR DW0(0x00B0-00B3) Bit 0-31 +-#define IMR_TIMER2_8192E BIT31 // Timeout interrupt 2 +-#define IMR_TIMER1_8192E BIT30 // Timeout interrupt 1 +-#define IMR_PSTIMEOUT_8192E BIT29 // Power Save Time Out Interrupt +-#define IMR_GTINT4_8192E BIT28 // When GTIMER4 expires, this bit is set to 1 +-#define IMR_GTINT3_8192E BIT27 // When GTIMER3 expires, this bit is set to 1 +-#define IMR_TXBCN0ERR_8192E BIT26 // Transmit Beacon0 Error +-#define IMR_TXBCN0OK_8192E BIT25 // Transmit Beacon0 OK +-#define IMR_TSF_BIT32_TOGGLE_8192E BIT24 // TSF Timer BIT32 toggle indication interrupt +-#define IMR_BCNDMAINT0_8192E BIT20 // Beacon DMA Interrupt 0 +-#define IMR_BCNDERR0_8192E BIT16 // Beacon Queue DMA OK0 +-#define IMR_HSISR_IND_ON_INT_8192E BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) +-#define IMR_BCNDMAINT_E_8192E BIT14 // Beacon DMA Interrupt Extension for Win7 +-#define IMR_ATIMEND_8192E BIT12 // CTWidnow End or ATIM Window End +-#define IMR_C2HCMD_8192E BIT10 // CPU to Host Command INT Status, Write 1 clear +-#define IMR_CPWM2_8192E BIT9 // CPU power Mode exchange INT Status, Write 1 clear +-#define IMR_CPWM_8192E BIT8 // CPU power Mode exchange INT Status, Write 1 clear +-#define IMR_HIGHDOK_8192E BIT7 // High Queue DMA OK +-#define IMR_MGNTDOK_8192E BIT6 // Management Queue DMA OK +-#define IMR_BKDOK_8192E BIT5 // AC_BK DMA OK +-#define IMR_BEDOK_8192E BIT4 // AC_BE DMA OK +-#define IMR_VIDOK_8192E BIT3 // AC_VI DMA OK +-#define IMR_VODOK_8192E BIT2 // AC_VO DMA OK +-#define IMR_RDU_8192E BIT1 // Rx Descriptor Unavailable +-#define IMR_ROK_8192E BIT0 // Receive DMA OK +- +-// IMR DW1(0x00B4-00B7) Bit 0-31 +-#define IMR_BCNDMAINT7_8192E BIT27 // Beacon DMA Interrupt 7 +-#define IMR_BCNDMAINT6_8192E BIT26 // Beacon DMA Interrupt 6 +-#define IMR_BCNDMAINT5_8192E BIT25 // Beacon DMA Interrupt 5 +-#define IMR_BCNDMAINT4_8192E BIT24 // Beacon DMA Interrupt 4 +-#define IMR_BCNDMAINT3_8192E BIT23 // Beacon DMA Interrupt 3 +-#define IMR_BCNDMAINT2_8192E BIT22 // Beacon DMA Interrupt 2 +-#define IMR_BCNDMAINT1_8192E BIT21 // Beacon DMA Interrupt 1 +-#define IMR_BCNDOK7_8192E BIT20 // Beacon Queue DMA OK Interrup 7 +-#define IMR_BCNDOK6_8192E BIT19 // Beacon Queue DMA OK Interrup 6 +-#define IMR_BCNDOK5_8192E BIT18 // Beacon Queue DMA OK Interrup 5 +-#define IMR_BCNDOK4_8192E BIT17 // Beacon Queue DMA OK Interrup 4 +-#define IMR_BCNDOK3_8192E BIT16 // Beacon Queue DMA OK Interrup 3 +-#define IMR_BCNDOK2_8192E BIT15 // Beacon Queue DMA OK Interrup 2 +-#define IMR_BCNDOK1_8192E BIT14 // Beacon Queue DMA OK Interrup 1 +-#define IMR_ATIMEND_E_8192E BIT13 // ATIM Window End Extension for Win7 +-#define IMR_TXERR_8192E BIT11 // Tx Error Flag Interrupt Status, write 1 clear. +-#define IMR_RXERR_8192E BIT10 // Rx Error Flag INT Status, Write 1 clear +-#define IMR_TXFOVW_8192E BIT9 // Transmit FIFO Overflow +-#define IMR_RXFOVW_8192E BIT8 // Receive FIFO Overflow +- +-//---------------------------------------------------------------------------- +-// 8192E Auto LLT bits (offset 0x224, 8bits) +-//---------------------------------------------------------------------------- +-//224 REG_AUTO_LLT +-// move to hal_com_reg.h +- +-//---------------------------------------------------------------------------- +-// 8192E Auto LLT bits (offset 0x290, 32bits) +-//---------------------------------------------------------------------------- +-#define BIT_DMA_MODE BIT1 +-#define BIT_USB_RXDMA_AGG_EN BIT31 +- +-//---------------------------------------------------------------------------- +-// 8192E REG_SYS_CFG1 (offset 0xF0, 32bits) +-//---------------------------------------------------------------------------- +-#define BIT_SPSLDO_SEL BIT24 +- +- +-//---------------------------------------------------------------------------- +-// 8192E REG_CCK_CHECK (offset 0x454, 8bits) +-//---------------------------------------------------------------------------- +-#define BIT_BCN_PORT_SEL BIT5 +- +-//============================================================================ +-// Regsiter Bit and Content definition +-//============================================================================ +- +-//2 ACMHWCTRL 0x05C0 +-#define AcmHw_HwEn_8192E BIT(0) +-#define AcmHw_VoqEn_8192E BIT(1) +-#define AcmHw_ViqEn_8192E BIT(2) +-#define AcmHw_BeqEn_8192E BIT(3) +-#define AcmHw_VoqStatus_8192E BIT(5) +-#define AcmHw_ViqStatus_8192E BIT(6) +-#define AcmHw_BeqStatus_8192E BIT(7) +- +- +- +- +-#endif //__RTL8192E_SPEC_H__ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8192E_SPEC_H__ ++#define __RTL8192E_SPEC_H__ ++ ++#include ++ ++ ++//============================================================ ++// 8192E Regsiter offset definition ++//============================================================ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_SWR_CTRL1_8192E 0x0010 // 1 Byte ++#define REG_SYS_SWR_CTRL2_8192E 0x0014 // 1 Byte ++#define REG_AFE_CTRL1_8192E 0x0024 ++#define REG_AFE_CTRL2_8192E 0x0028 ++#define REG_AFE_CTRL3_8192E 0x002c ++ ++#define REG_PAD_CTRL1_8192E 0x0064 ++#define REG_SDIO_CTRL_8192E 0x0070 ++#define REG_OPT_CTRL_8192E 0x0074 ++#define REG_RF_B_CTRL_8192E 0x0076 ++#define REG_AFE_CTRL4_8192E 0x0078 ++#define REG_LDO_SWR_CTRL 0x007C ++#define REG_FW_DRV_MSG_8192E 0x0088 ++#define REG_HMEBOX_E2_E3_8192E 0x008C ++#define REG_HIMR0_8192E 0x00B0 ++#define REG_HISR0_8192E 0x00B4 ++#define REG_HIMR1_8192E 0x00B8 ++#define REG_HISR1_8192E 0x00BC ++ ++#define REG_SYS_CFG1_8192E 0x00F0 ++#define REG_SYS_CFG2_8192E 0x00FC ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) ++#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) ++#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) ++#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN ++ ++#define REG_RSVD3_8192E 0x0168 ++#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 ++#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 ++#define REG_C2HEVT_CMD_LEN_88XX 0x01AE ++ ++#define REG_HMEBOX_EXT0_8192E 0x01F0 ++#define REG_HMEBOX_EXT1_8192E 0x01F4 ++#define REG_HMEBOX_EXT2_8192E 0x01F8 ++#define REG_HMEBOX_EXT3_8192E 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_DWBCN0_CTRL 0x0208 ++#define REG_DWBCN1_CTRL 0x0228 ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_8192E 0x0290 ++#define REG_EARLY_MODE_CONTROL_8192E 0x02BC ++ ++#define REG_RSVD5_8192E 0x02F0 ++#define REG_RSVD6_8192E 0x02F4 ++#define REG_RSVD7_8192E 0x02F8 ++#define REG_RSVD8_8192E 0x02FC ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8192E 0x0300 ++#define REG_INT_MIG_8192E 0x0304 // Interrupt Migration ++#define REG_BCNQ_TXBD_DESA_8192E 0x0308 // TX Beacon Descriptor Address ++#define REG_MGQ_TXBD_DESA_8192E 0x0310 // TX Manage Queue Descriptor Address ++#define REG_VOQ_TXBD_DESA_8192E 0x0318 // TX VO Queue Descriptor Address ++#define REG_VIQ_TXBD_DESA_8192E 0x0320 // TX VI Queue Descriptor Address ++#define REG_BEQ_TXBD_DESA_8192E 0x0328 // TX BE Queue Descriptor Address ++#define REG_BKQ_TXBD_DESA_8192E 0x0330 // TX BK Queue Descriptor Address ++#define REG_RXQ_RXBD_DESA_8192E 0x0338 // RX Queue Descriptor Address ++#define REG_HI0Q_TXBD_DESA_8192E 0x0340 ++#define REG_HI1Q_TXBD_DESA_8192E 0x0348 ++#define REG_HI2Q_TXBD_DESA_8192E 0x0350 ++#define REG_HI3Q_TXBD_DESA_8192E 0x0358 ++#define REG_HI4Q_TXBD_DESA_8192E 0x0360 ++#define REG_HI5Q_TXBD_DESA_8192E 0x0368 ++#define REG_HI6Q_TXBD_DESA_8192E 0x0370 ++#define REG_HI7Q_TXBD_DESA_8192E 0x0378 ++#define REG_MGQ_TXBD_NUM_8192E 0x0380 ++#define REG_RX_RXBD_NUM_8192E 0x0382 ++#define REG_VOQ_TXBD_NUM_8192E 0x0384 ++#define REG_VIQ_TXBD_NUM_8192E 0x0386 ++#define REG_BEQ_TXBD_NUM_8192E 0x0388 ++#define REG_BKQ_TXBD_NUM_8192E 0x038A ++#define REG_HI0Q_TXBD_NUM_8192E 0x038C ++#define REG_HI1Q_TXBD_NUM_8192E 0x038E ++#define REG_HI2Q_TXBD_NUM_8192E 0x0390 ++#define REG_HI3Q_TXBD_NUM_8192E 0x0392 ++#define REG_HI4Q_TXBD_NUM_8192E 0x0394 ++#define REG_HI5Q_TXBD_NUM_8192E 0x0396 ++#define REG_HI6Q_TXBD_NUM_8192E 0x0398 ++#define REG_HI7Q_TXBD_NUM_8192E 0x039A ++#define REG_TSFTIMER_HCI_8192E 0x039C ++ ++//Read Write Point ++#define REG_VOQ_TXBD_IDX_8192E 0x03A0 ++#define REG_VIQ_TXBD_IDX_8192E 0x03A4 ++#define REG_BEQ_TXBD_IDX_8192E 0x03A8 ++#define REG_BKQ_TXBD_IDX_8192E 0x03AC ++#define REG_MGQ_TXBD_IDX_8192E 0x03B0 ++#define REG_RXQ_TXBD_IDX_8192E 0x03B4 ++#define REG_HI0Q_TXBD_IDX_8192E 0x03B8 ++#define REG_HI1Q_TXBD_IDX_8192E 0x03BC ++#define REG_HI2Q_TXBD_IDX_8192E 0x03C0 ++#define REG_HI3Q_TXBD_IDX_8192E 0x03C4 ++#define REG_HI4Q_TXBD_IDX_8192E 0x03C8 ++#define REG_HI5Q_TXBD_IDX_8192E 0x03CC ++#define REG_HI6Q_TXBD_IDX_8192E 0x03D0 ++#define REG_HI7Q_TXBD_IDX_8192E 0x03D4 ++ ++#define REG_PCIE_HCPWM_8192EE 0x03D8 // ?????? ++#define REG_PCIE_HRPWM_8192EE 0x03DC //PCIe RPWM // ?????? ++#define REG_DBI_WDATA_V1_8192E 0x03E8 ++#define REG_DBI_RDATA_V1_8192E 0x03EC ++#define REG_DBI_FLAG_V1_8192E 0x03F0 ++#define REG_MDIO_V1_8192E 0x3F4 ++#define REG_PCIE_MIX_CFG_8192E 0x3F8 ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_TXBF_CTRL_8192E 0x042C ++#define REG_ARFR0_8192E 0x0444 ++#define REG_ARFR1_8192E 0x044C ++#define REG_CCK_CHECK_8192E 0x0454 ++#define REG_AMPDU_MAX_TIME_8192E 0x0456 ++#define REG_BCNQ1_BDNY_8192E 0x0457 ++ ++#define REG_AMPDU_MAX_LENGTH_8192E 0x0458 ++#define REG_WMAC_LBK_BUF_HD_8192E 0x045D ++#define REG_NDPA_OPT_CTRL_8192E 0x045F ++#define REG_DATA_SC_8192E 0x0483 ++#ifdef CONFIG_WOWLAN ++#define REG_TXPKTBUF_IV_LOW 0x0484 ++#define REG_TXPKTBUF_IV_HIGH 0x0488 ++#endif ++#define REG_ARFR2_8192E 0x048C ++#define REG_ARFR3_8192E 0x0494 ++#define REG_TXRPT_START_OFFSET 0x04AC ++#define REG_AMPDU_BURST_MODE_8192E 0x04BC ++#define REG_HT_SINGLE_AMPDU_8192E 0x04C7 ++#define REG_MACID_PKT_DROP0_8192E 0x04D0 ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_CTWND_8192E 0x0572 ++#define REG_SECONDARY_CCA_CTRL_8192E 0x0577 ++#define REG_SCH_TXCMD_8192E 0x05F8 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_MAC_CR_8192E 0x0600 ++ ++#define REG_MAC_TX_SM_STATE_8192E 0x06B4 ++ ++// Power ++#define REG_BFMER0_INFO_8192E 0x06E4 ++#define REG_BFMER1_INFO_8192E 0x06EC ++#define REG_CSI_RPT_PARAM_BW20_8192E 0x06F4 ++#define REG_CSI_RPT_PARAM_BW40_8192E 0x06F8 ++#define REG_CSI_RPT_PARAM_BW80_8192E 0x06FC ++ ++// Hardware Port 2 ++#define REG_BFMEE_SEL_8192E 0x0714 ++#define REG_SND_PTCL_CTRL_8192E 0x0718 ++ ++ ++//----------------------------------------------------- ++// ++// Redifine register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++#define ISR_8192E REG_HISR0_8192E ++ ++//---------------------------------------------------------------------------- ++// 8192E IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8192E 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8192E BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8192E BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8192E BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8192E BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8192E BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8192E BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8192E BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8192E BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8192E BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8192E BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8192E BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8192E BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8192E BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8192E BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8192E BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8192E BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8192E BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8192E BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8192E BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8192E BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8192E BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8192E BIT2 // AC_VO DMA OK ++#define IMR_RDU_8192E BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8192E BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_BCNDMAINT7_8192E BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8192E BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8192E BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8192E BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8192E BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8192E BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8192E BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8192E BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8192E BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8192E BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8192E BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8192E BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8192E BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8192E BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8192E BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8192E BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8192E BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8192E BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8192E BIT8 // Receive FIFO Overflow ++ ++//---------------------------------------------------------------------------- ++// 8192E Auto LLT bits (offset 0x224, 8bits) ++//---------------------------------------------------------------------------- ++//224 REG_AUTO_LLT ++// move to hal_com_reg.h ++ ++//---------------------------------------------------------------------------- ++// 8192E Auto LLT bits (offset 0x290, 32bits) ++//---------------------------------------------------------------------------- ++#define BIT_DMA_MODE BIT1 ++#define BIT_USB_RXDMA_AGG_EN BIT31 ++ ++//---------------------------------------------------------------------------- ++// 8192E REG_SYS_CFG1 (offset 0xF0, 32bits) ++//---------------------------------------------------------------------------- ++#define BIT_SPSLDO_SEL BIT24 ++ ++ ++//---------------------------------------------------------------------------- ++// 8192E REG_CCK_CHECK (offset 0x454, 8bits) ++//---------------------------------------------------------------------------- ++#define BIT_BCN_PORT_SEL BIT5 ++ ++//============================================================================ ++// Regsiter Bit and Content definition ++//============================================================================ ++ ++//2 ACMHWCTRL 0x05C0 ++#define AcmHw_HwEn_8192E BIT(0) ++#define AcmHw_VoqEn_8192E BIT(1) ++#define AcmHw_ViqEn_8192E BIT(2) ++#define AcmHw_BeqEn_8192E BIT(3) ++#define AcmHw_VoqStatus_8192E BIT(5) ++#define AcmHw_ViqStatus_8192E BIT(6) ++#define AcmHw_BeqStatus_8192E BIT(7) ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_8192E 128 ++#define SEC_CAM_ENT_NUM_8192E 64 ++#define NSS_NUM_8192E 2 ++#define BAND_CAP_8192E (BAND_CAP_2G) ++#define BW_CAP_8192E (BW_CAP_20M | BW_CAP_40M) ++#define PROTO_CAP_8192E (PROTO_CAP_11B|PROTO_CAP_11G|PROTO_CAP_11N) ++ ++#endif //__RTL8192E_SPEC_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_sreset.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_sreset.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_xmit.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_xmit.h +old mode 100755 +new mode 100644 +index 91fc018..2d29eb2 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_xmit.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8192e_xmit.h +@@ -1,441 +1,451 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8192E_XMIT_H__ +-#define __RTL8192E_XMIT_H__ +- +-typedef struct txdescriptor_8192e +-{ +- //Offset 0 +- u32 pktlen:16; +- u32 offset:8; +- u32 bmc:1; +- u32 htc:1; +- u32 ls:1; +- u32 fs:1; +- u32 linip:1; +- u32 noacm:1; +- u32 gf:1; +- u32 own:1; +- +- //Offset 4 +- u32 macid:6; +- u32 rsvd0406:2; +- u32 qsel:5; +- u32 rd_nav_ext:1; +- u32 lsig_txop_en:1; +- u32 pifs:1; +- u32 rate_id:4; +- u32 navusehdr:1; +- u32 en_desc_id:1; +- u32 sectype:2; +- u32 rsvd0424:2; +- u32 pkt_offset:5; // unit: 8 bytes +- u32 rsvd0431:1; +- +- //Offset 8 +- u32 rts_rc:6; +- u32 data_rc:6; +- u32 agg_en:1; +- u32 rd_en:1; +- u32 bar_rty_th:2; +- u32 bk:1; +- u32 morefrag:1; +- u32 raw:1; +- u32 ccx:1; +- u32 ampdu_density:3; +- u32 bt_null:1; +- u32 ant_sel_a:1; +- u32 ant_sel_b:1; +- u32 tx_ant_cck:2; +- u32 tx_antl:2; +- u32 tx_ant_ht:2; +- +- //Offset 12 +- u32 nextheadpage:8; +- u32 tailpage:8; +- u32 seq:12; +- u32 cpu_handle:1; +- u32 tag1:1; +- u32 trigger_int:1; +- u32 hwseq_en:1; +- +- //Offset 16 +- u32 rtsrate:5; +- u32 ap_dcfe:1; +- u32 hwseq_sel:2; +- u32 userate:1; +- u32 disrtsfb:1; +- u32 disdatafb:1; +- u32 cts2self:1; +- u32 rtsen:1; +- u32 hw_rts_en:1; +- u32 port_id:1; +- u32 pwr_status:3; +- u32 wait_dcts:1; +- u32 cts2ap_en:1; +- u32 data_sc:2; +- u32 data_stbc:2; +- u32 data_short:1; +- u32 data_bw:1; +- u32 rts_short:1; +- u32 rts_bw:1; +- u32 rts_sc:2; +- u32 vcs_stbc:2; +- +- //Offset 20 +- u32 datarate:6; +- u32 sgi:1; +- u32 try_rate:1; +- u32 data_ratefb_lmt:5; +- u32 rts_ratefb_lmt:4; +- u32 rty_lmt_en:1; +- u32 data_rt_lmt:6; +- u32 usb_txagg_num:8; +- +- //Offset 24 +- u32 txagg_a:5; +- u32 txagg_b:5; +- u32 use_max_len:1; +- u32 max_agg_num:5; +- u32 mcsg1_max_len:4; +- u32 mcsg2_max_len:4; +- u32 mcsg3_max_len:4; +- u32 mcs7_sgi_max_len:4; +- +- //Offset 28 +- u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) +- u32 mcsg4_max_len:4; +- u32 mcsg5_max_len:4; +- u32 mcsg6_max_len:4; +- u32 mcs15_sgi_max_len:4; +-}TXDESC_8192E, *PTXDESC_8192E; +- +-// +-// Queue Select Value in TxDesc +-// +-#define QSLT_BK 0x2//0x01 +-#define QSLT_BE 0x0 +-#define QSLT_VI 0x5//0x4 +-#define QSLT_VO 0x7//0x6 +-#define QSLT_BEACON 0x10 +-#define QSLT_HIGH 0x11 +-#define QSLT_MGNT 0x12 +-#define QSLT_CMD 0x13 +- +-//For 88e early mode +-#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) +-#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) +-#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) +-#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) +-#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) +-#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) +-#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) +- +-// +-//defined for TX DESC Operation +-// +- +-#define MAX_TID (15) +- +-//OFFSET 0 +-#define OFFSET_SZ 0 +-#define OFFSET_SHT 16 +-#define BMC BIT(24) +-#define LSG BIT(26) +-#define FSG BIT(27) +-#define OWN BIT(31) +- +- +-//OFFSET 4 +-#define PKT_OFFSET_SZ 0 +-#define QSEL_SHT 8 +-#define RATE_ID_SHT 16 +-#define NAVUSEHDR BIT(20) +-#define SEC_TYPE_SHT 22 +-#define PKT_OFFSET_SHT 26 +- +-//OFFSET 8 +-#define AGG_EN BIT(12) +-#define AGG_BK BIT(16) +-#define AMPDU_DENSITY_SHT 20 +-#define ANTSEL_A BIT(24) +-#define ANTSEL_B BIT(25) +-#define TX_ANT_CCK_SHT 26 +-#define TX_ANTL_SHT 28 +-#define TX_ANT_HT_SHT 30 +- +-//OFFSET 12 +-#define SEQ_SHT 16 +-#define EN_HWSEQ BIT(31) +- +-//OFFSET 16 +-#define QOS BIT(6) +-#define HW_SSN BIT(7) +-#define USERATE BIT(8) +-#define DISDATAFB BIT(10) +-#define CTS_2_SELF BIT(11) +-#define RTS_EN BIT(12) +-#define HW_RTS_EN BIT(13) +-#define DATA_SHORT BIT(24) +-#define PWR_STATUS_SHT 15 +-#define DATA_SC_SHT 20 +-#define DATA_BW BIT(25) +- +-//OFFSET 20 +-#define RTY_LMT_EN BIT(17) +- +- +-//OFFSET 20 +-#define SGI BIT(6) +-#define USB_TXAGG_NUM_SHT 24 +- +- +-//=====Tx Desc Buffer content +- +-// config element for each tx buffer +-/* +-#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 0, 16, __Valeu) +-#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 31, 1, __Valeu) +-#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+4, 0, 32, __Valeu) +-#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) +-*/ +-#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) +-#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) +-#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) +-#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) +- +- +-// Dword 0 +-#define SET_TX_BUFF_DESC_LEN_0_92E(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) +-#define SET_TX_BUFF_DESC_PSB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) +-#define SET_TX_BUFF_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) +-// Dword 1 +-#define SET_TX_BUFF_DESC_ADDR_LOW_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) +-#define GET_TX_DESC_TX_BUFFER_ADDRESS_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0,32) +- +- +-// Dword 2 +-#define SET_TX_BUFF_DESC_ADDR_HIGH_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) +-// Dword 3, RESERVED +- +- +-//=====Tx Desc content +-// Dword 0 +-#define SET_TX_DESC_PKT_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) +-#define SET_TX_DESC_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) +-#define SET_TX_DESC_BMC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) +-#define SET_TX_DESC_HTC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) +-#define SET_TX_DESC_LAST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) +-#define SET_TX_DESC_FIRST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) +-#define SET_TX_DESC_LINIP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) +-#define SET_TX_DESC_NO_ACM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) +-#define SET_TX_DESC_GF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) +-#define SET_TX_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) +-#define GET_TX_DESC_OWN_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) +- +-// Dword 1 +-#define SET_TX_DESC_MACID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) +-#define SET_TX_DESC_QUEUE_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) +-#define SET_TX_DESC_RDG_NAV_EXT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) +-#define SET_TX_DESC_LSIG_TXOP_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) +-#define SET_TX_DESC_PIFS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) +-#define SET_TX_DESC_RATE_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) +-#define SET_TX_DESC_EN_DESC_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) +-#define SET_TX_DESC_SEC_TYPE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) +-#define SET_TX_DESC_PKT_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) +-#define SET_TX_DESC_MORE_DATA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) +-#define SET_TX_DESC_TXOP_PS_CAP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) +-#define SET_TX_DESC_TXOP_PS_MODE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) +- +- +-// Dword 2 +-#define SET_TX_DESC_PAID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) +-#define SET_TX_DESC_CCA_RTS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) +-#define SET_TX_DESC_AGG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) +-#define SET_TX_DESC_RDG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) +-#define SET_TX_DESC_NULL_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) +-#define SET_TX_DESC_NULL_1_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) +-#define SET_TX_DESC_BK_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) +-#define SET_TX_DESC_MORE_FRAG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) +-#define SET_TX_DESC_RAW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) +-#define GET_TX_DESC_MORE_FRAG_92E(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc+8, 17, 1) +-#define SET_TX_DESC_SPE_RPT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) +-#define SET_TX_DESC_AMPDU_DENSITY_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) +-#define SET_TX_DESC_BT_NULL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) +-#define SET_TX_DESC_GID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) +- +- +-// Dword 3 +-#define SET_TX_DESC_WHEADER_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) +-#define SET_TX_DESC_CHK_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) +-#define SET_TX_DESC_EARLY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) +-#define SET_TX_DESC_HWSEQ_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) +-#define SET_TX_DESC_USE_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) +-#define SET_TX_DESC_DISABLE_RTS_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) +-#define SET_TX_DESC_DISABLE_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) +-#define SET_TX_DESC_CTS2SELF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) +-#define SET_TX_DESC_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) +-#define SET_TX_DESC_HW_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) +-#define SET_TX_DESC_HW_PORT_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) +-#define SET_TX_DESC_NAV_USE_HDR_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) +-#define SET_TX_DESC_USE_MAX_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) +-#define SET_TX_DESC_MAX_AGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) +-#define SET_TX_DESC_NDPA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) +-#define SET_TX_DESC_AMPDU_MAX_TIME_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) +- +-// Dword 4 +-#define SET_TX_DESC_TX_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) +-#define SET_TX_DESC_TRY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) +-#define SET_TX_DESC_DATA_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) +-#define SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) +-#define SET_TX_DESC_RETRY_LIMIT_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) +-#define SET_TX_DESC_DATA_RETRY_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) +-#define SET_TX_DESC_RTS_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) +-#define SET_TX_DESC_PCTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) +-#define SET_TX_DESC_PCTS_MASK_IDX_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) +- +- +-// Dword 5 +-#define SET_TX_DESC_DATA_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) +-#define SET_TX_DESC_DATA_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) +-#define SET_TX_DESC_DATA_BW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) +-#define SET_TX_DESC_DATA_LDPC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) +-#define SET_TX_DESC_DATA_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) +-#define SET_TX_DESC_VCS_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) +-#define SET_TX_DESC_RTS_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) +-#define SET_TX_DESC_RTS_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) +-#define SET_TX_DESC_TX_ANT_92E(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) +-#define SET_TX_DESC_TX_POWER_0_PSET_92E(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) +- +-// Dword 6 +-#define SET_TX_DESC_SW_DEFINE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) +-#define SET_TX_DESC_MBSSID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) +-#define SET_TX_DESC_ANTSEL_A_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) +-#define SET_TX_DESC_ANTSEL_B_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) +-#define SET_TX_DESC_ANTSEL_C_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) +-#define SET_TX_DESC_ANTSEL_D_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) +- +-// Dword 7 +-#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) +-#define SET_TX_DESC_TX_BUFFER_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) +-#else +-#define SET_TX_DESC_TX_DESC_CHECKSUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) +-#endif +-#define SET_TX_DESC_USB_TXAGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) +- +- +-//#define SET_TX_DESC_HWSEQ_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) +-// Dword 8 +- +-#define SET_TX_DESC_RTS_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) +-#define SET_TX_DESC_BAR_RTY_TH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) +-#define SET_TX_DESC_DATA_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) +-#define SET_TX_DESC_EN_HWSEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) +-#define SET_TX_DESC_NEXT_HEAD_PAGE_92E(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) +-#define SET_TX_DESC_TAIL_PAGE_92E(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) +- +-// Dword 9 +-#define SET_TX_DESC_PADDING_LENGTH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) +-#define SET_TX_DESC_TXBF_PATH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) +-#define SET_TX_DESC_SEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) +-#define SET_TX_DESC_FINAL_DATA_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) +- +- +-#define SET_EARLYMODE_PKTNUM_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) +-#define SET_EARLYMODE_LEN0_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) +-#define SET_EARLYMODE_LEN1_1_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) +-#define SET_EARLYMODE_LEN1_2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) +-#define SET_EARLYMODE_LEN2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) +-#define SET_EARLYMODE_LEN3_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) +- +- +- +-void rtl8192e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull); +- +-#ifdef CONFIG_USB_HCI +-s32 rtl8192eu_init_xmit_priv(PADAPTER padapter); +-void rtl8192eu_free_xmit_priv(PADAPTER padapter); +-s32 rtl8192eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8192eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-s32 rtl8192eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); +-s32 rtl8192eu_xmit_buf_handler(PADAPTER padapter); +-#define hal_xmit_handler rtl8192eu_xmit_buf_handler +-void rtl8192eu_xmit_tasklet(void *priv); +-s32 rtl8192eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); +-#endif +- +-#ifdef CONFIG_PCI_HCI +-s32 rtl8192ee_init_xmit_priv(PADAPTER padapter); +-void rtl8192ee_free_xmit_priv(PADAPTER padapter); +-struct xmit_buf *rtl8192ee_dequeue_xmitbuf(struct rtw_tx_ring *ring); +-s32 rtl8192ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); +-void rtl8192ee_xmitframe_resume(_adapter *padapter); +-s32 rtl8192ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8192ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-void rtl8192ee_xmit_tasklet(void *priv); +-#endif +- +- +-struct txrpt_ccx_92e { +- /* offset 0 */ +- u8 tag1:1; +- u8 pkt_num:3; +- u8 txdma_underflow:1; +- u8 int_bt:1; +- u8 int_tri:1; +- u8 int_ccx:1; +- +- /* offset 1 */ +- u8 mac_id:6; +- u8 pkt_ok:1; +- u8 bmc:1; +- +- /* offset 2 */ +- u8 retry_cnt:6; +- u8 lifetime_over:1; +- u8 retry_over:1; +- +- /* offset 3 */ +- u8 ccx_qtime0; +- u8 ccx_qtime1; +- +- /* offset 5 */ +- u8 final_data_rate; +- +- /* offset 6 */ +- u8 sw1:4; +- u8 qsel:4; +- +- /* offset 7 */ +- u8 sw0; +-}; +- +-#ifdef CONFIG_TX_EARLY_MODE +-void UpdateEarlyModeInfo8192E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); +-#endif +- +-void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc); +- +-u8 BWMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); +- +-u8 SCMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); +- +-#endif //__RTL8192E_XMIT_H__ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192E_XMIT_H__ ++#define __RTL8192E_XMIT_H__ ++ ++typedef struct txdescriptor_8192e ++{ ++ //Offset 0 ++ u32 pktlen:16; ++ u32 offset:8; ++ u32 bmc:1; ++ u32 htc:1; ++ u32 ls:1; ++ u32 fs:1; ++ u32 linip:1; ++ u32 noacm:1; ++ u32 gf:1; ++ u32 own:1; ++ ++ //Offset 4 ++ u32 macid:6; ++ u32 rsvd0406:2; ++ u32 qsel:5; ++ u32 rd_nav_ext:1; ++ u32 lsig_txop_en:1; ++ u32 pifs:1; ++ u32 rate_id:4; ++ u32 navusehdr:1; ++ u32 en_desc_id:1; ++ u32 sectype:2; ++ u32 rsvd0424:2; ++ u32 pkt_offset:5; // unit: 8 bytes ++ u32 rsvd0431:1; ++ ++ //Offset 8 ++ u32 rts_rc:6; ++ u32 data_rc:6; ++ u32 agg_en:1; ++ u32 rd_en:1; ++ u32 bar_rty_th:2; ++ u32 bk:1; ++ u32 morefrag:1; ++ u32 raw:1; ++ u32 ccx:1; ++ u32 ampdu_density:3; ++ u32 bt_null:1; ++ u32 ant_sel_a:1; ++ u32 ant_sel_b:1; ++ u32 tx_ant_cck:2; ++ u32 tx_antl:2; ++ u32 tx_ant_ht:2; ++ ++ //Offset 12 ++ u32 nextheadpage:8; ++ u32 tailpage:8; ++ u32 seq:12; ++ u32 cpu_handle:1; ++ u32 tag1:1; ++ u32 trigger_int:1; ++ u32 hwseq_en:1; ++ ++ //Offset 16 ++ u32 rtsrate:5; ++ u32 ap_dcfe:1; ++ u32 hwseq_sel:2; ++ u32 userate:1; ++ u32 disrtsfb:1; ++ u32 disdatafb:1; ++ u32 cts2self:1; ++ u32 rtsen:1; ++ u32 hw_rts_en:1; ++ u32 port_id:1; ++ u32 pwr_status:3; ++ u32 wait_dcts:1; ++ u32 cts2ap_en:1; ++ u32 data_sc:2; ++ u32 data_stbc:2; ++ u32 data_short:1; ++ u32 data_bw:1; ++ u32 rts_short:1; ++ u32 rts_bw:1; ++ u32 rts_sc:2; ++ u32 vcs_stbc:2; ++ ++ //Offset 20 ++ u32 datarate:6; ++ u32 sgi:1; ++ u32 try_rate:1; ++ u32 data_ratefb_lmt:5; ++ u32 rts_ratefb_lmt:4; ++ u32 rty_lmt_en:1; ++ u32 data_rt_lmt:6; ++ u32 usb_txagg_num:8; ++ ++ //Offset 24 ++ u32 txagg_a:5; ++ u32 txagg_b:5; ++ u32 use_max_len:1; ++ u32 max_agg_num:5; ++ u32 mcsg1_max_len:4; ++ u32 mcsg2_max_len:4; ++ u32 mcsg3_max_len:4; ++ u32 mcs7_sgi_max_len:4; ++ ++ //Offset 28 ++ u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) ++ u32 mcsg4_max_len:4; ++ u32 mcsg5_max_len:4; ++ u32 mcsg6_max_len:4; ++ u32 mcs15_sgi_max_len:4; ++}TXDESC_8192E, *PTXDESC_8192E; ++ ++ ++ ++//For 88e early mode ++#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) ++#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) ++#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) ++#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) ++#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) ++#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) ++#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) ++ ++// ++//defined for TX DESC Operation ++// ++ ++#define MAX_TID (15) ++ ++//OFFSET 0 ++#define OFFSET_SZ 0 ++#define OFFSET_SHT 16 ++#define BMC BIT(24) ++#define LSG BIT(26) ++#define FSG BIT(27) ++#define OWN BIT(31) ++ ++ ++//OFFSET 4 ++#define PKT_OFFSET_SZ 0 ++#define QSEL_SHT 8 ++#define RATE_ID_SHT 16 ++#define NAVUSEHDR BIT(20) ++#define SEC_TYPE_SHT 22 ++#define PKT_OFFSET_SHT 26 ++ ++//OFFSET 8 ++#define AGG_EN BIT(12) ++#define AGG_BK BIT(16) ++#define AMPDU_DENSITY_SHT 20 ++#define ANTSEL_A BIT(24) ++#define ANTSEL_B BIT(25) ++#define TX_ANT_CCK_SHT 26 ++#define TX_ANTL_SHT 28 ++#define TX_ANT_HT_SHT 30 ++ ++//OFFSET 12 ++#define SEQ_SHT 16 ++#define EN_HWSEQ BIT(31) ++ ++//OFFSET 16 ++#define QOS BIT(6) ++#define HW_SSN BIT(7) ++#define USERATE BIT(8) ++#define DISDATAFB BIT(10) ++#define CTS_2_SELF BIT(11) ++#define RTS_EN BIT(12) ++#define HW_RTS_EN BIT(13) ++#define DATA_SHORT BIT(24) ++#define PWR_STATUS_SHT 15 ++#define DATA_SC_SHT 20 ++#define DATA_BW BIT(25) ++ ++//OFFSET 20 ++#define RTY_LMT_EN BIT(17) ++ ++ ++//OFFSET 20 ++#define SGI BIT(6) ++#define USB_TXAGG_NUM_SHT 24 ++ ++ ++//=====Tx Desc Buffer content ++ ++// config element for each tx buffer ++/* ++#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 0, 16, __Valeu) ++#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 31, 1, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+4, 0, 32, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) ++*/ ++#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) ++#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) ++ ++ ++// Dword 0 ++#define SET_TX_BUFF_DESC_LEN_0_92E(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) ++#define SET_TX_BUFF_DESC_PSB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) ++#define SET_TX_BUFF_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++// Dword 1 ++#define SET_TX_BUFF_DESC_ADDR_LOW_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) ++#define GET_TX_DESC_TX_BUFFER_ADDRESS_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0,32) ++ ++ ++// Dword 2 ++#define SET_TX_BUFF_DESC_ADDR_HIGH_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) ++// Dword 3, RESERVED ++ ++ ++//=====Tx Desc content ++// Dword 0 ++#define SET_TX_DESC_PKT_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) ++#define SET_TX_DESC_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) ++#define SET_TX_DESC_BMC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) ++#define SET_TX_DESC_HTC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) ++#define SET_TX_DESC_LAST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) ++#define SET_TX_DESC_FIRST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) ++#define SET_TX_DESC_LINIP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) ++#define SET_TX_DESC_NO_ACM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) ++#define SET_TX_DESC_GF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) ++#define SET_TX_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++#define GET_TX_DESC_OWN_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) ++ ++// Dword 1 ++#define SET_TX_DESC_MACID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) ++#define SET_TX_DESC_QUEUE_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) ++#define SET_TX_DESC_RDG_NAV_EXT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) ++#define SET_TX_DESC_LSIG_TXOP_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) ++#define SET_TX_DESC_PIFS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) ++#define SET_TX_DESC_RATE_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) ++#define SET_TX_DESC_EN_DESC_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) ++#define SET_TX_DESC_SEC_TYPE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++#define SET_TX_DESC_PKT_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) ++#define SET_TX_DESC_MORE_DATA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) ++#define SET_TX_DESC_TXOP_PS_CAP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) ++#define SET_TX_DESC_TXOP_PS_MODE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) ++ ++ ++// Dword 2 ++#define SET_TX_DESC_PAID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) ++#define SET_TX_DESC_CCA_RTS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) ++#define SET_TX_DESC_AGG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) ++#define SET_TX_DESC_RDG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) ++#define SET_TX_DESC_NULL_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) ++#define SET_TX_DESC_NULL_1_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) ++#define SET_TX_DESC_BK_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) ++#define SET_TX_DESC_MORE_FRAG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) ++#define SET_TX_DESC_RAW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) ++#define GET_TX_DESC_MORE_FRAG_92E(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc+8, 17, 1) ++#define SET_TX_DESC_SPE_RPT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) ++#define SET_TX_DESC_AMPDU_DENSITY_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) ++#define SET_TX_DESC_BT_NULL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) ++#define SET_TX_DESC_GID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) ++ ++ ++// Dword 3 ++#define SET_TX_DESC_WHEADER_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) ++#define SET_TX_DESC_CHK_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) ++#define SET_TX_DESC_EARLY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) ++#define SET_TX_DESC_HWSEQ_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) ++#define SET_TX_DESC_USE_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) ++#define SET_TX_DESC_DISABLE_RTS_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) ++#define SET_TX_DESC_DISABLE_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) ++#define SET_TX_DESC_CTS2SELF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) ++#define SET_TX_DESC_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) ++#define SET_TX_DESC_HW_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) ++#define SET_TX_DESC_HW_PORT_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) ++#define SET_TX_DESC_NAV_USE_HDR_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) ++#define SET_TX_DESC_USE_MAX_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) ++#define SET_TX_DESC_MAX_AGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) ++#define SET_TX_DESC_NDPA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) ++#define SET_TX_DESC_AMPDU_MAX_TIME_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) ++ ++// Dword 4 ++#define SET_TX_DESC_TX_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) ++#define SET_TX_DESC_TRY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) ++#define SET_TX_DESC_DATA_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) ++#define SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) ++#define SET_TX_DESC_RETRY_LIMIT_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) ++#define SET_TX_DESC_DATA_RETRY_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) ++#define SET_TX_DESC_RTS_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) ++#define SET_TX_DESC_PCTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) ++#define SET_TX_DESC_PCTS_MASK_IDX_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) ++ ++ ++// Dword 5 ++#define SET_TX_DESC_DATA_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) ++#define SET_TX_DESC_DATA_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) ++#define SET_TX_DESC_DATA_BW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) ++#define SET_TX_DESC_DATA_LDPC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) ++#define SET_TX_DESC_DATA_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) ++#define SET_TX_DESC_VCS_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) ++#define SET_TX_DESC_RTS_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) ++#define SET_TX_DESC_RTS_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) ++#define SET_TX_DESC_TX_ANT_92E(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) ++#define SET_TX_DESC_TX_POWER_0_PSET_92E(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) ++ ++// Dword 6 ++#define SET_TX_DESC_SW_DEFINE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) ++#define SET_TX_DESC_MBSSID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) ++#define SET_TX_DESC_ANTSEL_A_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) ++#define SET_TX_DESC_ANTSEL_B_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) ++#define SET_TX_DESC_ANTSEL_C_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) ++#define SET_TX_DESC_ANTSEL_D_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) ++ ++// Dword 7 ++#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#define SET_TX_DESC_TX_BUFFER_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#else ++#define SET_TX_DESC_TX_DESC_CHECKSUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#endif ++#define SET_TX_DESC_USB_TXAGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) ++ ++ ++//#define SET_TX_DESC_HWSEQ_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++// Dword 8 ++ ++#define SET_TX_DESC_RTS_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) ++#define SET_TX_DESC_BAR_RTY_TH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) ++#define SET_TX_DESC_DATA_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) ++#define SET_TX_DESC_EN_HWSEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++#define SET_TX_DESC_NEXT_HEAD_PAGE_92E(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) ++#define SET_TX_DESC_TAIL_PAGE_92E(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) ++ ++// Dword 9 ++#define SET_TX_DESC_PADDING_LENGTH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) ++#define SET_TX_DESC_TXBF_PATH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) ++#define SET_TX_DESC_SEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) ++#define SET_TX_DESC_FINAL_DATA_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) ++ ++ ++#define SET_EARLYMODE_PKTNUM_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) ++#define SET_EARLYMODE_LEN0_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) ++#define SET_EARLYMODE_LEN1_1_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) ++#define SET_EARLYMODE_LEN1_2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) ++#define SET_EARLYMODE_LEN2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) ++#define SET_EARLYMODE_LEN3_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) ++ ++void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc); ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8192eu_init_xmit_priv(PADAPTER padapter); ++void rtl8192eu_free_xmit_priv(PADAPTER padapter); ++s32 rtl8192eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8192eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8192eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8192eu_xmit_buf_handler(PADAPTER padapter); ++#define hal_xmit_handler rtl8192eu_xmit_buf_handler ++void rtl8192eu_xmit_tasklet(void *priv); ++s32 rtl8192eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8192ee_init_xmit_priv(PADAPTER padapter); ++void rtl8192ee_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf *rtl8192ee_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++s32 rtl8192ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8192ee_xmitframe_resume(_adapter *padapter); ++s32 rtl8192ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8192ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++void rtl8192ee_xmit_tasklet(void *priv); ++#endif ++ ++#if defined(CONFIG_SDIO_HCI)||defined (CONFIG_GSPI_HCI) ++s32 rtl8192es_init_xmit_priv(PADAPTER padapter); ++void rtl8192es_free_xmit_priv(PADAPTER padapter); ++ ++s32 rtl8192es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8192es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8192es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++thread_return rtl8192es_xmit_thread(thread_context context); ++s32 rtl8192es_xmit_buf_handler(PADAPTER padapter); ++ ++#ifdef CONFIG_SDIO_TX_TASKLET ++void rtl8192es_xmit_tasklet(void *priv); ++#endif ++#endif ++ ++struct txrpt_ccx_92e { ++ /* offset 0 */ ++ u8 tag1:1; ++ u8 pkt_num:3; ++ u8 txdma_underflow:1; ++ u8 int_bt:1; ++ u8 int_tri:1; ++ u8 int_ccx:1; ++ ++ /* offset 1 */ ++ u8 mac_id:6; ++ u8 pkt_ok:1; ++ u8 bmc:1; ++ ++ /* offset 2 */ ++ u8 retry_cnt:6; ++ u8 lifetime_over:1; ++ u8 retry_over:1; ++ ++ /* offset 3 */ ++ u8 ccx_qtime0; ++ u8 ccx_qtime1; ++ ++ /* offset 5 */ ++ u8 final_data_rate; ++ ++ /* offset 6 */ ++ u8 sw1:4; ++ u8 qsel:4; ++ ++ /* offset 7 */ ++ u8 sw0; ++}; ++ ++#ifdef CONFIG_TX_EARLY_MODE ++void UpdateEarlyModeInfo8192E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); ++#endif ++ s32 rtl8192e_init_xmit_priv(_adapter *padapter); ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc); ++ ++void rtl8192e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen, ++ u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); ++void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc); ++ ++u8 BWMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); ++u8 SCMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); ++void fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); ++void fill_txdesc_vcs(struct pkt_attrib *pattrib, u8 *ptxdesc); ++void fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); ++void rtl8192e_fixed_rate(_adapter *padapter,u8 *ptxdesc); ++ ++#endif //__RTL8192E_XMIT_H__ ++ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_cmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_cmd.h +new file mode 100644 +index 0000000..663f315 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_cmd.h +@@ -0,0 +1,220 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8703B_CMD_H__ ++#define __RTL8703B_CMD_H__ ++ ++//---------------------------------------------------------------------------------------------------------// ++//---------------------------------- H2C CMD DEFINITION ------------------------------------------------// ++//---------------------------------------------------------------------------------------------------------// ++ ++enum h2c_cmd_8703B{ ++ //Common Class: 000 ++ H2C_8703B_RSVD_PAGE = 0x00, ++ H2C_8703B_MEDIA_STATUS_RPT = 0x01, ++ H2C_8703B_SCAN_ENABLE = 0x02, ++ H2C_8703B_KEEP_ALIVE = 0x03, ++ H2C_8703B_DISCON_DECISION = 0x04, ++ H2C_8703B_PSD_OFFLOAD = 0x05, ++ H2C_8703B_AP_OFFLOAD = 0x08, ++ H2C_8703B_BCN_RSVDPAGE = 0x09, ++ H2C_8703B_PROBERSP_RSVDPAGE = 0x0A, ++ H2C_8703B_FCS_RSVDPAGE = 0x10, ++ H2C_8703B_FCS_INFO = 0x11, ++ H2C_8703B_AP_WOW_GPIO_CTRL = 0x13, ++ ++ //PoweSave Class: 001 ++ H2C_8703B_SET_PWR_MODE = 0x20, ++ H2C_8703B_PS_TUNING_PARA = 0x21, ++ H2C_8703B_PS_TUNING_PARA2 = 0x22, ++ H2C_8703B_P2P_LPS_PARAM = 0x23, ++ H2C_8703B_P2P_PS_OFFLOAD = 0x24, ++ H2C_8703B_PS_SCAN_ENABLE = 0x25, ++ H2C_8703B_SAP_PS_ = 0x26, ++ H2C_8703B_INACTIVE_PS_ = 0x27, //Inactive_PS ++ H2C_8703B_FWLPS_IN_IPS_ = 0x28, ++ ++ //Dynamic Mechanism Class: 010 ++ H2C_8703B_MACID_CFG = 0x40, ++ H2C_8703B_TXBF = 0x41, ++ H2C_8703B_RSSI_SETTING = 0x42, ++ H2C_8703B_AP_REQ_TXRPT = 0x43, ++ H2C_8703B_INIT_RATE_COLLECT = 0x44, ++ H2C_8703B_RA_PARA_ADJUST = 0x46, ++ ++ //BT Class: 011 ++ H2C_8703B_B_TYPE_TDMA = 0x60, ++ H2C_8703B_BT_INFO = 0x61, ++ H2C_8703B_FORCE_BT_TXPWR = 0x62, ++ H2C_8703B_BT_IGNORE_WLANACT = 0x63, ++ H2C_8703B_DAC_SWING_VALUE = 0x64, ++ H2C_8703B_ANT_SEL_RSV = 0x65, ++ H2C_8703B_WL_OPMODE = 0x66, ++ H2C_8703B_BT_MP_OPER = 0x67, ++ H2C_8703B_BT_CONTROL = 0x68, ++ H2C_8703B_BT_WIFI_CTRL = 0x69, ++ H2C_8703B_BT_FW_PATCH = 0x6A, ++ H2C_8703B_BT_WLAN_CALIBRATION = 0x6D, ++ ++ //WOWLAN Class: 100 ++ H2C_8703B_WOWLAN = 0x80, ++ H2C_8703B_REMOTE_WAKE_CTRL = 0x81, ++ H2C_8703B_AOAC_GLOBAL_INFO = 0x82, ++ H2C_8703B_AOAC_RSVD_PAGE = 0x83, ++ H2C_8703B_AOAC_RSVD_PAGE2 = 0x84, ++ H2C_8703B_D0_SCAN_OFFLOAD_CTRL = 0x85, ++ H2C_8703B_D0_SCAN_OFFLOAD_INFO = 0x86, ++ H2C_8703B_CHNL_SWITCH_OFFLOAD = 0x87, ++ H2C_8703B_P2P_OFFLOAD_RSVD_PAGE = 0x8A, ++ H2C_8703B_P2P_OFFLOAD = 0x8B, ++ ++ H2C_8703B_RESET_TSF = 0xC0, ++ H2C_8703B_MAXID, ++}; ++ ++//---------------------------------------------------------------------------------------------------------// ++//---------------------------------- H2C CMD CONTENT --------------------------------------------------// ++//---------------------------------------------------------------------------------------------------------// ++//_RSVDPAGE_LOC_CMD_0x00 ++#define SET_8703B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8703B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_8703B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8703B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8703B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++ ++//_KEEP_ALIVE_CMD_0x03 ++#define SET_8703B_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) ++#define SET_8703B_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) ++#define SET_8703B_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) ++#define SET_8703B_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++ ++//_DISCONNECT_DECISION_CMD_0x04 ++#define SET_8703B_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) ++#define SET_8703B_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) ++#define SET_8703B_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++#define SET_8703B_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) ++ ++// _PWR_MOD_CMD_0x20 ++#define SET_8703B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8703B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) ++#define SET_8703B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) ++#define SET_8703B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8703B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8703B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) ++#define SET_8703B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++#define SET_8703B_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) ++ ++#define GET_8703B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) ++ ++// _PS_TUNE_PARAM_CMD_0x21 ++#define SET_8703B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8703B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++#define SET_8703B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) ++#define SET_8703B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) ++#define SET_8703B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) ++ ++//_MACID_CFG_CMD_0x40 ++#define SET_8703B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8703B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) ++#define SET_8703B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) ++#define SET_8703B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) ++#define SET_8703B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) ++#define SET_8703B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) ++#define SET_8703B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) ++#define SET_8703B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) ++#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) ++#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) ++#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) ++#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) ++ ++//_RSSI_SETTING_CMD_0x42 ++#define SET_8703B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8703B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) ++#define SET_8703B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) ++ ++// _AP_REQ_TXRPT_CMD_0x43 ++#define SET_8703B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8703B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++ ++// _FORCE_BT_TXPWR_CMD_0x62 ++#define SET_8703B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++ ++// _FORCE_BT_MP_OPER_CMD_0x67 ++#define SET_8703B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) ++#define SET_8703B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) ++#define SET_8703B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++#define SET_8703B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) ++#define SET_8703B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) ++#define SET_8703B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) ++ ++// _BT_FW_PATCH_0x6A ++#define SET_8703B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) ++#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) ++ ++//---------------------------------------------------------------------------------------------------------// ++//------------------------------------------- Structure --------------------------------------------------// ++//---------------------------------------------------------------------------------------------------------// ++ ++ ++//---------------------------------------------------------------------------------------------------------// ++//---------------------------------- Function Statement --------------------------------------------------// ++//---------------------------------------------------------------------------------------------------------// ++ ++// host message to firmware cmd ++void rtl8703b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); ++void rtl8703b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); ++void rtl8703b_set_rssi_cmd(PADAPTER padapter, u8 *param); ++void rtl8703b_Add_RateATid(PADAPTER pAdapter, u64 rate_bitmap, u8 *arg, u8 rssi_level); ++void rtl8703b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); ++//s32 rtl8703b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); ++void rtl8703b_set_FwPsTuneParam_cmd(PADAPTER padapter); ++void rtl8703b_set_FwMacIdConfig_cmd(_adapter* padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask); ++void rtl8703b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); ++void rtl8703b_download_rsvd_page(PADAPTER padapter, u8 mstatus); ++#ifdef CONFIG_BT_COEXIST ++void rtl8703b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); ++#endif // CONFIG_BT_COEXIST ++#ifdef CONFIG_P2P ++void rtl8703b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); ++#endif //CONFIG_P2P ++ ++void CheckFwRsvdPageContent(PADAPTER padapter); ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++void rtl8703b_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); ++#endif ++#endif ++ ++#ifdef CONFIG_P2P_WOWLAN ++void rtl8703b_set_p2p_wowlan_offload_cmd(PADAPTER padapter); ++#endif ++ ++void rtl8703b_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); ++ ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++u8 rtl8703b_reset_tsf(_adapter *padapter, u8 reset_port); ++#endif // CONFIG_TSF_RESET_OFFLOAD ++s32 FillH2CCmd8703B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); ++u8 GetTxBufferRsvdPageNum8703B(_adapter *padapter, bool wowlan); ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_dm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_dm.h +new file mode 100644 +index 0000000..094adc8 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_dm.h +@@ -0,0 +1,48 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8703B_DM_H__ ++#define __RTL8703B_DM_H__ ++//============================================================ ++// Description: ++// ++// This file is for 8703B dynamic mechanism only ++// ++// ++//============================================================ ++ ++//============================================================ ++// structure and define ++//============================================================ ++ ++//============================================================ ++// function prototype ++//============================================================ ++ ++void rtl8703b_init_dm_priv(PADAPTER padapter); ++void rtl8703b_deinit_dm_priv(PADAPTER padapter); ++ ++void rtl8703b_InitHalDm(PADAPTER padapter); ++void rtl8703b_HalDmWatchDog(PADAPTER padapter); ++void rtl8703b_HalDmWatchDog_in_LPS(PADAPTER padapter); ++void rtl8703b_hal_dm_in_lps(PADAPTER padapter); ++ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_hal.h +new file mode 100644 +index 0000000..7ad47d4 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_hal.h +@@ -0,0 +1,326 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8703B_HAL_H__ ++#define __RTL8703B_HAL_H__ ++ ++#include "hal_data.h" ++ ++#include "rtl8703b_spec.h" ++#include "rtl8703b_rf.h" ++#include "rtl8703b_dm.h" ++#include "rtl8703b_recv.h" ++#include "rtl8703b_xmit.h" ++#include "rtl8703b_cmd.h" ++#include "rtl8703b_led.h" ++#include "Hal8703BPwrSeq.h" ++#include "Hal8703BPhyReg.h" ++#include "Hal8703BPhyCfg.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8703b_sreset.h" ++#endif ++ ++ ++//--------------------------------------------------------------------- ++// RTL8703B From file ++//--------------------------------------------------------------------- ++ #define RTL8703B_FW_IMG "rtl8703b/FW_NIC.bin" ++ #define RTL8703B_FW_WW_IMG "rtl8703b/FW_WoWLAN.bin" ++ #define RTL8703B_PHY_REG "rtl8703b/PHY_REG.txt" ++ #define RTL8703B_PHY_RADIO_A "rtl8703b/RadioA.txt" ++ #define RTL8703B_PHY_RADIO_B "rtl8703b/RadioB.txt" ++ #define RTL8703B_TXPWR_TRACK "rtl8703b/TxPowerTrack.txt" ++ #define RTL8703B_AGC_TAB "rtl8703b/AGC_TAB.txt" ++ #define RTL8703B_PHY_MACREG "rtl8703b/MAC_REG.txt" ++ #define RTL8703B_PHY_REG_PG "rtl8703b/PHY_REG_PG.txt" ++ #define RTL8703B_PHY_REG_MP "rtl8703b/PHY_REG_MP.txt" ++ #define RTL8703B_TXPWR_LMT "rtl8703b/TXPWR_LMT.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8703B From header ++//--------------------------------------------------------------------- ++ ++#if MP_DRIVER == 1 ++ #define Rtl8703B_FwBTImgArray Rtl8703BFwBTImgArray ++ #define Rtl8703B_FwBTImgArrayLength Rtl8703BFwBTImgArrayLength ++ ++ #define Rtl8703B_PHY_REG_Array_MP Rtl8703B_PHYREG_Array_MP ++ #define Rtl8703B_PHY_REG_Array_MPLength Rtl8703B_PHYREG_Array_MPLength ++#endif ++ ++ ++#define FW_8703B_SIZE 0x8000 ++#define FW_8703B_START_ADDRESS 0x1000 ++#define FW_8703B_END_ADDRESS 0x1FFF //0x5FFF ++ ++#define IS_FW_HEADER_EXIST_8703B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x03B0) ++ ++typedef struct _RT_FIRMWARE { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[FW_8703B_SIZE]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8703B, *PRT_FIRMWARE_8703B; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++typedef struct _RT_8703B_FIRMWARE_HDR ++{ ++ // 8-byte alinment required ++ ++ //--- LONG WORD 0 ---- ++ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++ u8 Category; // AP/NIC and USB/PCI ++ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++ u16 Version; // FW Version ++ u16 Subversion; // FW Subversion, default 0x00 ++ ++ //--- LONG WORD 1 ---- ++ u8 Month; // Release time Month field ++ u8 Date; // Release time Date field ++ u8 Hour; // Release time Hour field ++ u8 Minute; // Release time Minute field ++ u16 RamCodeSize; // The size of RAM code ++ u16 Rsvd2; ++ ++ //--- LONG WORD 2 ---- ++ u32 SvnIdx; // The SVN entry index ++ u32 Rsvd3; ++ ++ //--- LONG WORD 3 ---- ++ u32 Rsvd4; ++ u32 Rsvd5; ++}RT_8703B_FIRMWARE_HDR, *PRT_8703B_FIRMWARE_HDR; ++ ++#define DRIVER_EARLY_INT_TIME_8703B 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8703B 0x02 ++ ++// for 8703B ++// TX 32K, RX 16K, Page size 128B for TX, 8B for RX ++#define PAGE_SIZE_TX_8703B 128 ++#define PAGE_SIZE_RX_8703B 8 ++ ++#define TX_DMA_SIZE_8703B 0x8000 /* 32K(TX) */ ++#define RX_DMA_SIZE_8703B 0x4000 /* 16K(RX) */ ++ ++#ifdef CONFIG_WOWLAN ++#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ ++#else ++#define RESV_FMWF 0 ++#endif ++ ++#ifdef CONFIG_FW_C2H_DEBUG ++#define RX_DMA_RESERVED_SIZE_8703B 0x100 // 256B, reserved for c2h debug message ++#else ++#define RX_DMA_RESERVED_SIZE_8703B 0x80 // 128B, reserved for tx report ++#endif ++#define RX_DMA_BOUNDARY_8703B (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B - 1) ++ ++ ++// Note: We will divide number of page equally for each queue other than public queue! ++ ++//For General Reserved Page Number(Beacon Queue is reserved page) ++//Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 ++#define BCNQ_PAGE_NUM_8703B 0x08 ++#ifdef CONFIG_CONCURRENT_MODE ++#define BCNQ1_PAGE_NUM_8703B 0x08 // 0x04 ++#else ++#define BCNQ1_PAGE_NUM_8703B 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef BCNQ1_PAGE_NUM_8703B ++#define BCNQ1_PAGE_NUM_8703B 0x00 // 0x04 ++#endif ++ ++//For WoWLan , more reserved page ++//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8703B 0x07 ++#else ++#define WOWLAN_PAGE_NUM_8703B 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef WOWLAN_PAGE_NUM_8703B ++#define WOWLAN_PAGE_NUM_8703B 0x15 ++#endif ++ ++#ifdef CONFIG_AP_WOWLAN ++#define AP_WOWLAN_PAGE_NUM_8703B 0x02 ++#endif ++ ++#define TX_TOTAL_PAGE_NUMBER_8703B (0xFF - BCNQ_PAGE_NUM_8703B - BCNQ1_PAGE_NUM_8703B - WOWLAN_PAGE_NUM_8703B) ++#define TX_PAGE_BOUNDARY_8703B (TX_TOTAL_PAGE_NUMBER_8703B + 1) ++ ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B TX_TOTAL_PAGE_NUMBER_8703B ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_8703B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8703B ++#define NORMAL_PAGE_NUM_HPQ_8703B 0x0C ++#define NORMAL_PAGE_NUM_LPQ_8703B 0x02 ++#define NORMAL_PAGE_NUM_NPQ_8703B 0x02 ++ ++// Note: For Normal Chip Setting, modify later ++#define WMM_NORMAL_PAGE_NUM_HPQ_8703B 0x30 ++#define WMM_NORMAL_PAGE_NUM_LPQ_8703B 0x20 ++#define WMM_NORMAL_PAGE_NUM_NPQ_8703B 0x20 ++ ++ ++#include "HalVerDef.h" ++#include "hal_com.h" ++ ++#define EFUSE_OOB_PROTECT_BYTES 15 ++ ++#define HAL_EFUSE_MEMORY ++ ++#define HWSET_MAX_SIZE_8703B 256 ++#define EFUSE_REAL_CONTENT_LEN_8703B 256 ++#define EFUSE_MAP_LEN_8703B 512 ++#define EFUSE_MAX_SECTION_8703B 64 ++ ++#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8703B) ++ ++#define EFUSE_ACCESS_ON 0x69 ++#define EFUSE_ACCESS_OFF 0x00 ++ ++//======================================================== ++// EFUSE for BT definition ++//======================================================== ++#define BANK_NUM 1 ++#define EFUSE_BT_REAL_BANK_CONTENT_LEN 128 ++#define EFUSE_BT_REAL_CONTENT_LEN (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM) ++#define EFUSE_BT_MAP_LEN 1024 // 1k bytes ++#define EFUSE_BT_MAX_SECTION (EFUSE_BT_MAP_LEN / 8) ++#define EFUSE_PROTECT_BYTES_BANK 16 ++ ++typedef struct _C2H_EVT_HDR ++{ ++ u8 CmdID; ++ u8 CmdLen; ++ u8 CmdSeq; ++} __attribute__((__packed__)) C2H_EVT_HDR, *PC2H_EVT_HDR; ++ ++typedef enum tag_Package_Definition ++{ ++ PACKAGE_DEFAULT, ++ PACKAGE_QFN68, ++ PACKAGE_TFBGA90, ++ PACKAGE_TFBGA80, ++ PACKAGE_TFBGA79 ++}PACKAGE_TYPE_E; ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++// rtl8703b_hal_init.c ++s32 rtl8703b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); ++void rtl8703b_FirmwareSelfReset(PADAPTER padapter); ++void rtl8703b_InitializeFirmwareVars(PADAPTER padapter); ++ ++void rtl8703b_InitAntenna_Selection(PADAPTER padapter); ++void rtl8703b_DeinitAntenna_Selection(PADAPTER padapter); ++void rtl8703b_CheckAntenna_Selection(PADAPTER padapter); ++void rtl8703b_init_default_value(PADAPTER padapter); ++ ++s32 rtl8703b_InitLLTTable(PADAPTER padapter); ++ ++s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); ++s32 CardDisableWithoutHWSM(PADAPTER padapter); ++ ++// EFuse ++u8 GetEEPROMSize8703B(PADAPTER padapter); ++void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); ++void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); ++void Hal_EfuseParseTxPowerInfo_8703B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseBTCoexistInfo_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseEEPROMVer_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseChnlPlan_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseCustomerID_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseAntennaDiversity_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseXtal_8703B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); ++void Hal_EfuseParseThermalMeter_8703B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); ++VOID Hal_EfuseParseMacHidden_8703B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++VOID Hal_EfuseParseVoltage_8703B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++VOID Hal_EfuseParseBoardType_8703B(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); ++ ++#ifdef CONFIG_C2H_PACKET_EN ++void rtl8703b_c2h_packet_handler(PADAPTER padapter, u8 *pbuf, u16 length); ++#endif ++ ++ ++void rtl8703b_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8703b(_adapter *adapter); ++void SetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val); ++void GetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val); ++#ifdef CONFIG_C2H_PACKET_EN ++void SetHwRegWithBuf8703B(PADAPTER padapter, u8 variable, u8 *pbuf, int len); ++#endif // CONFIG_C2H_PACKET_EN ++u8 SetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++u8 GetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++ ++// register ++void rtl8703b_InitBeaconParameters(PADAPTER padapter); ++void rtl8703b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); ++void _InitBurstPktLen_8703BS(PADAPTER Adapter); ++void _InitLTECoex_8703BS(PADAPTER Adapter); ++void _InitMacAPLLSetting_8703B(PADAPTER Adapter); ++void _8051Reset8703(PADAPTER padapter); ++#ifdef CONFIG_WOWLAN ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++void rtl8703b_start_thread(_adapter *padapter); ++void rtl8703b_stop_thread(_adapter *padapter); ++ ++#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) ++void rtl8703bs_init_checkbthang_workqueue(_adapter * adapter); ++void rtl8703bs_free_checkbthang_workqueue(_adapter * adapter); ++void rtl8703bs_cancle_checkbthang_workqueue(_adapter * adapter); ++void rtl8703bs_hal_check_bt_hang(_adapter * adapter); ++#endif ++ ++#ifdef CONFIG_GPIO_WAKEUP ++void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); ++#endif ++ ++int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); ++ ++void CCX_FwC2HTxRpt_8703b(PADAPTER padapter, u8 *pdata, u8 len); ++s32 c2h_id_filter_ccx_8703b(u8 *buf); ++s32 c2h_handler_8703b(PADAPTER padapter, u8 *pC2hEvent); ++u8 MRateToHwRate8703B(u8 rate); ++u8 HwRateToMRate8703B(u8 rate); ++ ++void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++ ++#ifdef CONFIG_PCI_HCI ++BOOLEAN InterruptRecognized8703BE(PADAPTER Adapter); ++VOID UpdateInterruptMask8703BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_led.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_led.h +new file mode 100644 +index 0000000..bfd851e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_led.h +@@ -0,0 +1,49 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8703B_LED_H__ ++#define __RTL8703B_LED_H__ ++ ++#include ++#include ++#include ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8703bu_InitSwLeds(PADAPTER padapter); ++void rtl8703bu_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_SDIO_HCI ++void rtl8703bs_InitSwLeds(PADAPTER padapter); ++void rtl8703bs_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_GSPI_HCI ++void rtl8703bs_InitSwLeds(PADAPTER padapter); ++void rtl8703bs_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8703be_InitSwLeds(PADAPTER padapter); ++void rtl8703be_DeInitSwLeds(PADAPTER padapter); ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_recv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_recv.h +new file mode 100644 +index 0000000..091705e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_recv.h +@@ -0,0 +1,92 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8703B_RECV_H__ ++#define __RTL8703B_RECV_H__ ++ ++#define RECV_BLK_SZ 512 ++#define RECV_BLK_CNT 16 ++#define RECV_BLK_TH RECV_BLK_CNT ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ //#define MAX_RECVBUF_SZ (32768) // 32k ++ //#define MAX_RECVBUF_SZ (16384) //16K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ #ifdef CONFIG_PLATFORM_MSTAR ++ #define MAX_RECVBUF_SZ (8192) // 8K ++ #else ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ #endif ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ ++#define MAX_RECVBUF_SZ (10240) ++ ++#endif ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++#ifdef CONFIG_SDIO_HCI ++#ifndef CONFIG_SDIO_RX_COPY ++#undef MAX_RECVBUF_SZ ++#define MAX_RECVBUF_SZ (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B) ++#endif // !CONFIG_SDIO_RX_COPY ++#endif // CONFIG_SDIO_HCI ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++s32 rtl8703bs_init_recv_priv(PADAPTER padapter); ++void rtl8703bs_free_recv_priv(PADAPTER padapter); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++int rtl8703bu_init_recv_priv(_adapter *padapter); ++void rtl8703bu_free_recv_priv (_adapter *padapter); ++void rtl8703bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8703be_init_recv_priv(PADAPTER padapter); ++void rtl8703be_free_recv_priv(PADAPTER padapter); ++#endif ++ ++void rtl8703b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); ++ ++#endif /* __RTL8703B_RECV_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_rf.h +new file mode 100644 +index 0000000..20e7268 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_rf.h +@@ -0,0 +1,31 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8703B_RF_H__ ++#define __RTL8703B_RF_H__ ++ ++int PHY_RF6052_Config8703B( IN PADAPTER Adapter ); ++ ++VOID ++PHY_RF6052SetBandwidth8703B( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth); ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_spec.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_spec.h +new file mode 100644 +index 0000000..f1e59f3 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_spec.h +@@ -0,0 +1,480 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8703B_SPEC_H__ ++#define __RTL8703B_SPEC_H__ ++ ++#include ++ ++ ++#define HAL_NAV_UPPER_UNIT_8703B 128 // micro-second ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_ISO_CTRL_8703B 0x0000 // 2 Byte ++#define REG_SYS_FUNC_EN_8703B 0x0002 // 2 Byte ++#define REG_APS_FSMCO_8703B 0x0004 // 4 Byte ++#define REG_SYS_CLKR_8703B 0x0008 // 2 Byte ++#define REG_9346CR_8703B 0x000A // 2 Byte ++#define REG_EE_VPD_8703B 0x000C // 2 Byte ++#define REG_AFE_MISC_8703B 0x0010 // 1 Byte ++#define REG_SPS0_CTRL_8703B 0x0011 // 7 Byte ++#define REG_SPS_OCP_CFG_8703B 0x0018 // 4 Byte ++#define REG_RSV_CTRL_8703B 0x001C // 3 Byte ++#define REG_RF_CTRL_8703B 0x001F // 1 Byte ++#define REG_LPLDO_CTRL_8703B 0x0023 // 1 Byte ++#define REG_AFE_XTAL_CTRL_8703B 0x0024 // 4 Byte ++#define REG_AFE_PLL_CTRL_8703B 0x0028 // 4 Byte ++#define REG_MAC_PLL_CTRL_EXT_8703B 0x002c // 4 Byte ++#define REG_EFUSE_CTRL_8703B 0x0030 ++#define REG_EFUSE_TEST_8703B 0x0034 ++#define REG_PWR_DATA_8703B 0x0038 ++#define REG_CAL_TIMER_8703B 0x003C ++#define REG_ACLK_MON_8703B 0x003E ++#define REG_GPIO_MUXCFG_8703B 0x0040 ++#define REG_GPIO_IO_SEL_8703B 0x0042 ++#define REG_MAC_PINMUX_CFG_8703B 0x0043 ++#define REG_GPIO_PIN_CTRL_8703B 0x0044 ++#define REG_GPIO_INTM_8703B 0x0048 ++#define REG_LEDCFG0_8703B 0x004C ++#define REG_LEDCFG1_8703B 0x004D ++#define REG_LEDCFG2_8703B 0x004E ++#define REG_LEDCFG3_8703B 0x004F ++#define REG_FSIMR_8703B 0x0050 ++#define REG_FSISR_8703B 0x0054 ++#define REG_HSIMR_8703B 0x0058 ++#define REG_HSISR_8703B 0x005c ++#define REG_GPIO_EXT_CTRL 0x0060 ++#define REG_PAD_CTRL1_8703B 0x0064 ++#define REG_MULTI_FUNC_CTRL_8703B 0x0068 ++#define REG_GPIO_STATUS_8703B 0x006C ++#define REG_SDIO_CTRL_8703B 0x0070 ++#define REG_OPT_CTRL_8703B 0x0074 ++#define REG_AFE_CTRL_4_8703B 0x0078 ++#define REG_MCUFWDL_8703B 0x0080 ++#define REG_HMEBOX_DBG_0_8703B 0x0088 ++#define REG_HMEBOX_DBG_1_8703B 0x008A ++#define REG_HMEBOX_DBG_2_8703B 0x008C ++#define REG_HMEBOX_DBG_3_8703B 0x008E ++#define REG_HIMR0_8703B 0x00B0 ++#define REG_HISR0_8703B 0x00B4 ++#define REG_HIMR1_8703B 0x00B8 ++#define REG_HISR1_8703B 0x00BC ++#define REG_PMC_DBG_CTRL2_8703B 0x00CC ++#define REG_EFUSE_BURN_GNT_8703B 0x00CF ++#define REG_HPON_FSM_8703B 0x00EC ++#define REG_SYS_CFG_8703B 0x00F0 ++#define REG_SYS_CFG1_8703B 0x00FC ++#define REG_ROM_VERSION 0x00FD ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_C2HEVT_CMD_ID_8703B 0x01A0 ++#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 ++#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 ++#define REG_C2HEVT_CMD_LEN_8703B 0x01AE ++#define REG_C2HEVT_CMD_LEN_88XX REG_C2HEVT_CMD_LEN_8703B ++#define REG_C2HEVT_CLEAR_8703B 0x01AF ++#define REG_MCUTST_1_8703B 0x01C0 ++#define REG_WOWLAN_WAKE_REASON 0x01C7 ++#define REG_FMETHR_8703B 0x01C8 ++#define REG_HMETFR_8703B 0x01CC ++#define REG_HMEBOX_0_8703B 0x01D0 ++#define REG_HMEBOX_1_8703B 0x01D4 ++#define REG_HMEBOX_2_8703B 0x01D8 ++#define REG_HMEBOX_3_8703B 0x01DC ++#define REG_LLT_INIT_8703B 0x01E0 ++#define REG_HMEBOX_EXT0_8703B 0x01F0 ++#define REG_HMEBOX_EXT1_8703B 0x01F4 ++#define REG_HMEBOX_EXT2_8703B 0x01F8 ++#define REG_HMEBOX_EXT3_8703B 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RQPN_8703B 0x0200 ++#define REG_FIFOPAGE_8703B 0x0204 ++#define REG_DWBCN0_CTRL_8703B REG_TDECTRL ++#define REG_TXDMA_OFFSET_CHK_8703B 0x020C ++#define REG_TXDMA_STATUS_8703B 0x0210 ++#define REG_RQPN_NPQ_8703B 0x0214 ++#define REG_DWBCN1_CTRL_8703B 0x0228 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_AGG_PG_TH_8703B 0x0280 ++#define REG_FW_UPD_RDPTR_8703B 0x0284 // FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 ++#define REG_RXDMA_CONTROL_8703B 0x0286 // Control the RX DMA. ++#define REG_RXPKT_NUM_8703B 0x0287 // The number of packets in RXPKTBUF. ++#define REG_RXDMA_STATUS_8703B 0x0288 ++#define REG_RXDMA_MODE_CTRL_8703B 0x0290 ++#define REG_EARLY_MODE_CONTROL_8703B 0x02BC ++#define REG_RSVD5_8703B 0x02F0 ++#define REG_RSVD6_8703B 0x02F4 ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8703B 0x0300 ++#define REG_INT_MIG_8703B 0x0304 // Interrupt Migration ++#define REG_BCNQ_DESA_8703B 0x0308 // TX Beacon Descriptor Address ++#define REG_HQ_DESA_8703B 0x0310 // TX High Queue Descriptor Address ++#define REG_MGQ_DESA_8703B 0x0318 // TX Manage Queue Descriptor Address ++#define REG_VOQ_DESA_8703B 0x0320 // TX VO Queue Descriptor Address ++#define REG_VIQ_DESA_8703B 0x0328 // TX VI Queue Descriptor Address ++#define REG_BEQ_DESA_8703B 0x0330 // TX BE Queue Descriptor Address ++#define REG_BKQ_DESA_8703B 0x0338 // TX BK Queue Descriptor Address ++#define REG_RX_DESA_8703B 0x0340 // RX Queue Descriptor Address ++#define REG_DBI_WDATA_8703B 0x0348 // DBI Write Data ++#define REG_DBI_RDATA_8703B 0x034C // DBI Read Data ++#define REG_DBI_ADDR_8703B 0x0350 // DBI Address ++#define REG_DBI_FLAG_8703B 0x0352 // DBI Read/Write Flag ++#define REG_MDIO_WDATA_8703B 0x0354 // MDIO for Write PCIE PHY ++#define REG_MDIO_RDATA_8703B 0x0356 // MDIO for Reads PCIE PHY ++#define REG_MDIO_CTL_8703B 0x0358 // MDIO for Control ++#define REG_DBG_SEL_8703B 0x0360 // Debug Selection Register ++#define REG_PCIE_HRPWM_8703B 0x0361 //PCIe RPWM ++#define REG_PCIE_HCPWM_8703B 0x0363 //PCIe CPWM ++#define REG_PCIE_MULTIFET_CTRL_8703B 0x036A //PCIE Multi-Fethc Control ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_VOQ_INFORMATION_8703B 0x0400 ++#define REG_VIQ_INFORMATION_8703B 0x0404 ++#define REG_BEQ_INFORMATION_8703B 0x0408 ++#define REG_BKQ_INFORMATION_8703B 0x040C ++#define REG_MGQ_INFORMATION_8703B 0x0410 ++#define REG_HGQ_INFORMATION_8703B 0x0414 ++#define REG_BCNQ_INFORMATION_8703B 0x0418 ++#define REG_TXPKT_EMPTY_8703B 0x041A ++ ++#define REG_FWHW_TXQ_CTRL_8703B 0x0420 ++#define REG_HWSEQ_CTRL_8703B 0x0423 ++#define REG_TXPKTBUF_BCNQ_BDNY_8703B 0x0424 ++#define REG_TXPKTBUF_MGQ_BDNY_8703B 0x0425 ++#define REG_LIFECTRL_CTRL_8703B 0x0426 ++#define REG_MULTI_BCNQ_OFFSET_8703B 0x0427 ++#define REG_SPEC_SIFS_8703B 0x0428 ++#define REG_RL_8703B 0x042A ++#define REG_TXBF_CTRL_8703B 0x042C ++#define REG_DARFRC_8703B 0x0430 ++#define REG_RARFRC_8703B 0x0438 ++#define REG_RRSR_8703B 0x0440 ++#define REG_ARFR0_8703B 0x0444 ++#define REG_ARFR1_8703B 0x044C ++#define REG_CCK_CHECK_8703B 0x0454 ++#define REG_AMPDU_MAX_TIME_8703B 0x0456 ++#define REG_TXPKTBUF_BCNQ_BDNY1_8703B 0x0457 ++ ++#define REG_AMPDU_MAX_LENGTH_8703B 0x0458 ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8703B 0x045D ++#define REG_NDPA_OPT_CTRL_8703B 0x045F ++#define REG_FAST_EDCA_CTRL_8703B 0x0460 ++#define REG_RD_RESP_PKT_TH_8703B 0x0463 ++#define REG_DATA_SC_8703B 0x0483 ++#ifdef CONFIG_WOWLAN ++#define REG_TXPKTBUF_IV_LOW 0x0484 ++#define REG_TXPKTBUF_IV_HIGH 0x0488 ++#endif ++#define REG_TXRPT_START_OFFSET 0x04AC ++#define REG_POWER_STAGE1_8703B 0x04B4 ++#define REG_POWER_STAGE2_8703B 0x04B8 ++#define REG_AMPDU_BURST_MODE_8703B 0x04BC ++#define REG_PKT_VO_VI_LIFE_TIME_8703B 0x04C0 ++#define REG_PKT_BE_BK_LIFE_TIME_8703B 0x04C2 ++#define REG_STBC_SETTING_8703B 0x04C4 ++#define REG_HT_SINGLE_AMPDU_8703B 0x04C7 ++#define REG_PROT_MODE_CTRL_8703B 0x04C8 ++#define REG_MAX_AGGR_NUM_8703B 0x04CA ++#define REG_RTS_MAX_AGGR_NUM_8703B 0x04CB ++#define REG_BAR_MODE_CTRL_8703B 0x04CC ++#define REG_RA_TRY_RATE_AGG_LMT_8703B 0x04CF ++#define REG_MACID_PKT_DROP0_8703B 0x04D0 ++#define REG_MACID_PKT_SLEEP_8703B 0x04D4 ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_EDCA_VO_PARAM_8703B 0x0500 ++#define REG_EDCA_VI_PARAM_8703B 0x0504 ++#define REG_EDCA_BE_PARAM_8703B 0x0508 ++#define REG_EDCA_BK_PARAM_8703B 0x050C ++#define REG_BCNTCFG_8703B 0x0510 ++#define REG_PIFS_8703B 0x0512 ++#define REG_RDG_PIFS_8703B 0x0513 ++#define REG_SIFS_CTX_8703B 0x0514 ++#define REG_SIFS_TRX_8703B 0x0516 ++#define REG_AGGR_BREAK_TIME_8703B 0x051A ++#define REG_SLOT_8703B 0x051B ++#define REG_TX_PTCL_CTRL_8703B 0x0520 ++#define REG_TXPAUSE_8703B 0x0522 ++#define REG_DIS_TXREQ_CLR_8703B 0x0523 ++#define REG_RD_CTRL_8703B 0x0524 ++// ++// Format for offset 540h-542h: ++// [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. ++// [7:4]: Reserved. ++// [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. ++// [23:20]: Reserved ++// Description: ++// | ++// |<--Setup--|--Hold------------>| ++// --------------|---------------------- ++// | ++// TBTT ++// Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. ++// Described by Designer Tim and Bruce, 2011-01-14. ++// ++#define REG_TBTT_PROHIBIT_8703B 0x0540 ++#define REG_RD_NAV_NXT_8703B 0x0544 ++#define REG_NAV_PROT_LEN_8703B 0x0546 ++#define REG_BCN_CTRL_8703B 0x0550 ++#define REG_BCN_CTRL_1_8703B 0x0551 ++#define REG_MBID_NUM_8703B 0x0552 ++#define REG_DUAL_TSF_RST_8703B 0x0553 ++#define REG_BCN_INTERVAL_8703B 0x0554 ++#define REG_DRVERLYINT_8703B 0x0558 ++#define REG_BCNDMATIM_8703B 0x0559 ++#define REG_ATIMWND_8703B 0x055A ++#define REG_USTIME_TSF_8703B 0x055C ++#define REG_BCN_MAX_ERR_8703B 0x055D ++#define REG_RXTSF_OFFSET_CCK_8703B 0x055E ++#define REG_RXTSF_OFFSET_OFDM_8703B 0x055F ++#define REG_TSFTR_8703B 0x0560 ++#define REG_CTWND_8703B 0x0572 ++#define REG_SECONDARY_CCA_CTRL_8703B 0x0577 ++#define REG_PSTIMER_8703B 0x0580 ++#define REG_TIMER0_8703B 0x0584 ++#define REG_TIMER1_8703B 0x0588 ++#define REG_ACMHWCTRL_8703B 0x05C0 ++#define REG_SCH_TXCMD_8703B 0x05F8 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_MAC_CR_8703B 0x0600 ++#define REG_TCR_8703B 0x0604 ++#define REG_RCR_8703B 0x0608 ++#define REG_RX_PKT_LIMIT_8703B 0x060C ++#define REG_RX_DLK_TIME_8703B 0x060D ++#define REG_RX_DRVINFO_SZ_8703B 0x060F ++ ++#define REG_MACID_8703B 0x0610 ++#define REG_BSSID_8703B 0x0618 ++#define REG_MAR_8703B 0x0620 ++#define REG_MBIDCAMCFG_8703B 0x0628 ++#define REG_WOWLAN_GTK_DBG1 0x630 ++#define REG_WOWLAN_GTK_DBG2 0x634 ++ ++#define REG_USTIME_EDCA_8703B 0x0638 ++#define REG_MAC_SPEC_SIFS_8703B 0x063A ++#define REG_RESP_SIFP_CCK_8703B 0x063C ++#define REG_RESP_SIFS_OFDM_8703B 0x063E ++#define REG_ACKTO_8703B 0x0640 ++#define REG_CTS2TO_8703B 0x0641 ++#define REG_EIFS_8703B 0x0642 ++ ++#define REG_NAV_UPPER_8703B 0x0652 // unit of 128 ++#define REG_TRXPTCL_CTL_8703B 0x0668 ++ ++// Security ++#define REG_CAMCMD_8703B 0x0670 ++#define REG_CAMWRITE_8703B 0x0674 ++#define REG_CAMREAD_8703B 0x0678 ++#define REG_CAMDBG_8703B 0x067C ++#define REG_SECCFG_8703B 0x0680 ++ ++// Power ++#define REG_WOW_CTRL_8703B 0x0690 ++#define REG_PS_RX_INFO_8703B 0x0692 ++#define REG_UAPSD_TID_8703B 0x0693 ++#define REG_WKFMCAM_CMD_8703B 0x0698 ++#define REG_WKFMCAM_NUM_8703B 0x0698 ++#define REG_WKFMCAM_RWD_8703B 0x069C ++#define REG_RXFLTMAP0_8703B 0x06A0 ++#define REG_RXFLTMAP1_8703B 0x06A2 ++#define REG_RXFLTMAP2_8703B 0x06A4 ++#define REG_BCN_PSR_RPT_8703B 0x06A8 ++#define REG_BT_COEX_TABLE_8703B 0x06C0 ++#define REG_BFMER0_INFO_8703B 0x06E4 ++#define REG_BFMER1_INFO_8703B 0x06EC ++#define REG_CSI_RPT_PARAM_BW20_8703B 0x06F4 ++#define REG_CSI_RPT_PARAM_BW40_8703B 0x06F8 ++#define REG_CSI_RPT_PARAM_BW80_8703B 0x06FC ++ ++// Hardware Port 2 ++#define REG_MACID1_8703B 0x0700 ++#define REG_BSSID1_8703B 0x0708 ++#define REG_BFMEE_SEL_8703B 0x0714 ++#define REG_SND_PTCL_CTRL_8703B 0x0718 ++ ++// LTE_COEX ++#define REG_LTECOEX_CTRL 0x07C0 ++#define REG_LTECOEX_WRITE_DATA 0x07C4 ++#define REG_LTECOEX_READ_DATA 0x07C8 ++#define REG_LTECOEX_PATH_CONTROL 0x70 ++ ++//============================================================ ++// SDIO Bus Specification ++//============================================================ ++ ++//----------------------------------------------------- ++// SDIO CMD Address Mapping ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// I/O bus domain (Host) ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// SDIO register ++//----------------------------------------------------- ++#define SDIO_REG_HCPWM1_8703B 0x025 // HCI Current Power Mode 1 ++ ++ ++//============================================================================ ++// 8703 Regsiter Bit and Content definition ++//============================================================================ ++ ++#define BIT_USB_RXDMA_AGG_EN BIT(31) ++#define RXDMA_AGG_MODE_EN BIT(1) ++ ++#ifdef CONFIG_WOWLAN ++#define RXPKT_RELEASE_POLL BIT(16) ++#define RXDMA_IDLE BIT(17) ++#define RW_RELEASE_EN BIT(18) ++#endif ++ ++//2 HSISR ++// interrupt mask which needs to clear ++#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ ++ HSISR_SPS_OCP_INT |\ ++ HSISR_RON_INT |\ ++ HSISR_PDNINT |\ ++ HSISR_GPIO9_INT) ++ ++ ++//---------------------------------------------------------------------------- ++// 8703B REG_CCK_CHECK (offset 0x454) ++//---------------------------------------------------------------------------- ++#define BIT_BCN_PORT_SEL BIT5 ++ ++#ifdef CONFIG_RF_GAIN_OFFSET ++ ++#ifdef CONFIG_RTL8703B ++#define EEPROM_RF_GAIN_OFFSET 0xC1 ++#endif ++ ++#define EEPROM_RF_GAIN_VAL 0x1F6 ++#endif //CONFIG_RF_GAIN_OFFSET ++ ++ ++//---------------------------------------------------------------------------- ++// 8195 IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8703B 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8703B BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8703B BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8703B BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8703B BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8703B BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8703B BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8703B BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8703B BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8703B BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8703B BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8703B BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8703B BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8703B BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8703B BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8703B BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8703B BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8703B BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8703B BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8703B BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8703B BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8703B BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8703B BIT2 // AC_VO DMA OK ++#define IMR_RDU_8703B BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8703B BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_BCNDMAINT7_8703B BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8703B BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8703B BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8703B BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8703B BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8703B BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8703B BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8703B BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8703B BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8703B BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8703B BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8703B BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8703B BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8703B BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8703B BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8703B BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8703B BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8703B BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8703B BIT8 // Receive FIFO Overflow ++ ++#ifdef CONFIG_PCI_HCI ++//#define IMR_RX_MASK (IMR_ROK_8703B|IMR_RDU_8703B|IMR_RXFOVW_8703B) ++#define IMR_TX_MASK (IMR_VODOK_8703B|IMR_VIDOK_8703B|IMR_BEDOK_8703B|IMR_BKDOK_8703B|IMR_MGNTDOK_8703B|IMR_HIGHDOK_8703B) ++ ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8703B | IMR_TXBCN0OK_8703B | IMR_TXBCN0ERR_8703B | IMR_BCNDERR0_8703B) ++ ++#define RT_AC_INT_MASKS (IMR_VIDOK_8703B | IMR_VODOK_8703B | IMR_BEDOK_8703B|IMR_BKDOK_8703B) ++#endif ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_8703B 16 ++#define SEC_CAM_ENT_NUM_8703B 16 ++#define NSS_NUM_8703B 1 ++#define BAND_CAP_8703B (BAND_CAP_2G) ++#define BW_CAP_8703B (BW_CAP_20M | BW_CAP_40M) ++#define PROTO_CAP_8703B (PROTO_CAP_11B|PROTO_CAP_11G|PROTO_CAP_11N) ++ ++#endif /* __RTL8703B_SPEC_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_sreset.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_sreset.h +new file mode 100644 +index 0000000..4eb70dd +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_sreset.h +@@ -0,0 +1,30 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTL8703B_SRESET_H_ ++#define _RTL8703B_SRESET_H_ ++ ++#include ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++extern void rtl8703b_sreset_xmit_status_check(_adapter *padapter); ++extern void rtl8703b_sreset_linked_status_check(_adapter *padapter); ++#endif ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_xmit.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_xmit.h +new file mode 100644 +index 0000000..a0b7334 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8703b_xmit.h +@@ -0,0 +1,336 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8703B_XMIT_H__ ++#define __RTL8703B_XMIT_H__ ++ ++ ++#define MAX_TID (15) ++ ++ ++#ifndef __INC_HAL8703BDESC_H ++#define __INC_HAL8703BDESC_H ++ ++#define RX_STATUS_DESC_SIZE_8703B 24 ++#define RX_DRV_INFO_SIZE_UNIT_8703B 8 ++ ++ ++//DWORD 0 ++#define SET_RX_STATUS_DESC_PKT_LEN_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_STATUS_DESC_EOR_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) ++#define SET_RX_STATUS_DESC_OWN_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) ++ ++#define GET_RX_STATUS_DESC_PKT_LEN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) ++#define GET_RX_STATUS_DESC_CRC32_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) ++#define GET_RX_STATUS_DESC_ICV_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) ++#define GET_RX_STATUS_DESC_SECURITY_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) ++#define GET_RX_STATUS_DESC_QOS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) ++#define GET_RX_STATUS_DESC_SHIFT_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) ++#define GET_RX_STATUS_DESC_PHY_STATUS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) ++#define GET_RX_STATUS_DESC_SWDEC_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) ++#define GET_RX_STATUS_DESC_LAST_SEG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) ++#define GET_RX_STATUS_DESC_FIRST_SEG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) ++#define GET_RX_STATUS_DESC_EOR_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++#define GET_RX_STATUS_DESC_OWN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) ++ ++//DWORD 1 ++#define GET_RX_STATUS_DESC_MACID_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) ++#define GET_RX_STATUS_DESC_TID_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) ++#define GET_RX_STATUS_DESC_AMSDU_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) ++#define GET_RX_STATUS_DESC_RXID_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) ++#define GET_RX_STATUS_DESC_PAGGR_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) ++#define GET_RX_STATUS_DESC_A1_FIT_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) ++#define GET_RX_STATUS_DESC_CHKERR_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) ++#define GET_RX_STATUS_DESC_IPVER_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) ++#define GET_RX_STATUS_DESC_IS_TCPUDP__8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) ++#define GET_RX_STATUS_DESC_CHK_VLD_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) ++#define GET_RX_STATUS_DESC_PAM_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) ++#define GET_RX_STATUS_DESC_PWR_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) ++#define GET_RX_STATUS_DESC_MORE_DATA_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) ++#define GET_RX_STATUS_DESC_MORE_FRAG_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) ++#define GET_RX_STATUS_DESC_TYPE_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) ++#define GET_RX_STATUS_DESC_MC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) ++#define GET_RX_STATUS_DESC_BC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) ++ ++//DWORD 2 ++#define GET_RX_STATUS_DESC_SEQ_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) ++#define GET_RX_STATUS_DESC_FRAG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) ++#define GET_RX_STATUS_DESC_RX_IS_QOS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) ++#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) ++#define GET_RX_STATUS_DESC_RPT_SEL_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) ++ ++//DWORD 3 ++#define GET_RX_STATUS_DESC_RX_RATE_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) ++#define GET_RX_STATUS_DESC_HTC_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) ++#define GET_RX_STATUS_DESC_EOSP_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) ++#define GET_RX_STATUS_DESC_BSSID_FIT_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) ++#ifdef CONFIG_USB_RX_AGGREGATION ++#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) ++#endif ++#define GET_RX_STATUS_DESC_PATTERN_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) ++#define GET_RX_STATUS_DESC_UNICAST_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) ++#define GET_RX_STATUS_DESC_MAGIC_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) ++ ++//DWORD 6 ++#define GET_RX_STATUS_DESC_SPLCP_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) ++#define GET_RX_STATUS_DESC_LDPC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) ++#define GET_RX_STATUS_DESC_STBC_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) ++#define GET_RX_STATUS_DESC_BW_8703B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) ++ ++//DWORD 5 ++#define GET_RX_STATUS_DESC_TSFL_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++#define GET_RX_STATUS_DESC_BUFF_ADDR_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) ++#define GET_RX_STATUS_DESC_BUFF_ADDR64_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) ++ ++#define SET_RX_STATUS_DESC_BUFF_ADDR_8703B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) ++ ++ ++// Dword 0 ++#define GET_TX_DESC_OWN_8703B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) ++ ++#define SET_TX_DESC_PKT_SIZE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) ++#define SET_TX_DESC_OFFSET_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) ++#define SET_TX_DESC_BMC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) ++#define SET_TX_DESC_HTC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) ++#define SET_TX_DESC_LAST_SEG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) ++#define SET_TX_DESC_FIRST_SEG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) ++#define SET_TX_DESC_LINIP_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) ++#define SET_TX_DESC_NO_ACM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) ++#define SET_TX_DESC_GF_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) ++#define SET_TX_DESC_OWN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++ ++// Dword 1 ++#define SET_TX_DESC_MACID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) ++#define SET_TX_DESC_QUEUE_SEL_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) ++#define SET_TX_DESC_RDG_NAV_EXT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) ++#define SET_TX_DESC_LSIG_TXOP_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) ++#define SET_TX_DESC_PIFS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) ++#define SET_TX_DESC_RATE_ID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) ++#define SET_TX_DESC_EN_DESC_ID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) ++#define SET_TX_DESC_SEC_TYPE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++#define SET_TX_DESC_PKT_OFFSET_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) ++ ++ ++// Dword 2 ++#define SET_TX_DESC_PAID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) ++#define SET_TX_DESC_CCA_RTS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) ++#define SET_TX_DESC_AGG_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) ++#define SET_TX_DESC_RDG_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) ++#define SET_TX_DESC_AGG_BREAK_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) ++#define SET_TX_DESC_MORE_FRAG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) ++#define SET_TX_DESC_RAW_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) ++#define SET_TX_DESC_SPE_RPT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) ++#define SET_TX_DESC_AMPDU_DENSITY_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) ++#define SET_TX_DESC_BT_INT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) ++#define SET_TX_DESC_GID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) ++ ++ ++// Dword 3 ++#define SET_TX_DESC_WHEADER_LEN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) ++#define SET_TX_DESC_CHK_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) ++#define SET_TX_DESC_EARLY_MODE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) ++#define SET_TX_DESC_HWSEQ_SEL_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) ++#define SET_TX_DESC_USE_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) ++#define SET_TX_DESC_DISABLE_RTS_FB_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) ++#define SET_TX_DESC_DISABLE_FB_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) ++#define SET_TX_DESC_CTS2SELF_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) ++#define SET_TX_DESC_RTS_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) ++#define SET_TX_DESC_HW_RTS_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) ++#define SET_TX_DESC_NAV_USE_HDR_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) ++#define SET_TX_DESC_USE_MAX_LEN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) ++#define SET_TX_DESC_MAX_AGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) ++#define SET_TX_DESC_NDPA_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) ++#define SET_TX_DESC_AMPDU_MAX_TIME_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) ++ ++// Dword 4 ++#define SET_TX_DESC_TX_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) ++#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) ++#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) ++#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) ++#define SET_TX_DESC_DATA_RETRY_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) ++#define SET_TX_DESC_RTS_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) ++ ++ ++// Dword 5 ++#define SET_TX_DESC_DATA_SC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) ++#define SET_TX_DESC_DATA_SHORT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) ++#define SET_TX_DESC_DATA_BW_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) ++#define SET_TX_DESC_DATA_LDPC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) ++#define SET_TX_DESC_DATA_STBC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) ++#define SET_TX_DESC_CTROL_STBC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) ++#define SET_TX_DESC_RTS_SHORT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) ++#define SET_TX_DESC_RTS_SC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) ++ ++ ++// Dword 6 ++#define SET_TX_DESC_SW_DEFINE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) ++#define SET_TX_DESC_MBSSID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) ++#define SET_TX_DESC_ANTSEL_A_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) ++#define SET_TX_DESC_ANTSEL_B_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) ++#define SET_TX_DESC_ANTSEL_C_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) ++#define SET_TX_DESC_ANTSEL_D_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) ++ ++// Dword 7 ++#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#define SET_TX_DESC_TX_BUFFER_SIZE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#else ++#define SET_TX_DESC_TX_DESC_CHECKSUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#endif ++#define SET_TX_DESC_USB_TXAGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) ++#if(DEV_BUS_TYPE == RT_SDIO_INTERFACE) ++#define SET_TX_DESC_SDIO_TXSEQ_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) ++#endif ++ ++// Dword 8 ++#define SET_TX_DESC_HWSEQ_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++ ++// Dword 9 ++#define SET_TX_DESC_SEQ_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) ++ ++// Dword 10 ++#define SET_TX_DESC_TX_BUFFER_ADDRESS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) ++#define GET_TX_DESC_TX_BUFFER_ADDRESS_8703B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) ++ ++// Dword 11 ++#define SET_TX_DESC_NEXT_DESC_ADDRESS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) ++ ++ ++#define SET_EARLYMODE_PKTNUM_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) ++#define SET_EARLYMODE_LEN0_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) ++#define SET_EARLYMODE_LEN1_1_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) ++#define SET_EARLYMODE_LEN1_2_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) ++#define SET_EARLYMODE_LEN2_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) ++#define SET_EARLYMODE_LEN3_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) ++ ++#endif ++//----------------------------------------------------------- ++// ++// Rate ++// ++//----------------------------------------------------------- ++// CCK Rates, TxHT = 0 ++#define DESC8703B_RATE1M 0x00 ++#define DESC8703B_RATE2M 0x01 ++#define DESC8703B_RATE5_5M 0x02 ++#define DESC8703B_RATE11M 0x03 ++ ++// OFDM Rates, TxHT = 0 ++#define DESC8703B_RATE6M 0x04 ++#define DESC8703B_RATE9M 0x05 ++#define DESC8703B_RATE12M 0x06 ++#define DESC8703B_RATE18M 0x07 ++#define DESC8703B_RATE24M 0x08 ++#define DESC8703B_RATE36M 0x09 ++#define DESC8703B_RATE48M 0x0a ++#define DESC8703B_RATE54M 0x0b ++ ++// MCS Rates, TxHT = 1 ++#define DESC8703B_RATEMCS0 0x0c ++#define DESC8703B_RATEMCS1 0x0d ++#define DESC8703B_RATEMCS2 0x0e ++#define DESC8703B_RATEMCS3 0x0f ++#define DESC8703B_RATEMCS4 0x10 ++#define DESC8703B_RATEMCS5 0x11 ++#define DESC8703B_RATEMCS6 0x12 ++#define DESC8703B_RATEMCS7 0x13 ++#define DESC8703B_RATEMCS8 0x14 ++#define DESC8703B_RATEMCS9 0x15 ++#define DESC8703B_RATEMCS10 0x16 ++#define DESC8703B_RATEMCS11 0x17 ++#define DESC8703B_RATEMCS12 0x18 ++#define DESC8703B_RATEMCS13 0x19 ++#define DESC8703B_RATEMCS14 0x1a ++#define DESC8703B_RATEMCS15 0x1b ++#define DESC8703B_RATEVHTSS1MCS0 0x2c ++#define DESC8703B_RATEVHTSS1MCS1 0x2d ++#define DESC8703B_RATEVHTSS1MCS2 0x2e ++#define DESC8703B_RATEVHTSS1MCS3 0x2f ++#define DESC8703B_RATEVHTSS1MCS4 0x30 ++#define DESC8703B_RATEVHTSS1MCS5 0x31 ++#define DESC8703B_RATEVHTSS1MCS6 0x32 ++#define DESC8703B_RATEVHTSS1MCS7 0x33 ++#define DESC8703B_RATEVHTSS1MCS8 0x34 ++#define DESC8703B_RATEVHTSS1MCS9 0x35 ++#define DESC8703B_RATEVHTSS2MCS0 0x36 ++#define DESC8703B_RATEVHTSS2MCS1 0x37 ++#define DESC8703B_RATEVHTSS2MCS2 0x38 ++#define DESC8703B_RATEVHTSS2MCS3 0x39 ++#define DESC8703B_RATEVHTSS2MCS4 0x3a ++#define DESC8703B_RATEVHTSS2MCS5 0x3b ++#define DESC8703B_RATEVHTSS2MCS6 0x3c ++#define DESC8703B_RATEVHTSS2MCS7 0x3d ++#define DESC8703B_RATEVHTSS2MCS8 0x3e ++#define DESC8703B_RATEVHTSS2MCS9 0x3f ++ ++ ++#define RX_HAL_IS_CCK_RATE_8703B(pDesc)\ ++ (GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE1M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE2M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE5_5M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE11M) ++ ++ ++void rtl8703b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); ++void rtl8703b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++s32 rtl8703bs_init_xmit_priv(PADAPTER padapter); ++void rtl8703bs_free_xmit_priv(PADAPTER padapter); ++s32 rtl8703bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8703bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8703bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8703bs_xmit_buf_handler(PADAPTER padapter); ++thread_return rtl8703bs_xmit_thread(thread_context context); ++#define hal_xmit_handler rtl8703bs_xmit_buf_handler ++#endif ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8703bu_xmit_buf_handler(PADAPTER padapter); ++#define hal_xmit_handler rtl8703bu_xmit_buf_handler ++ ++ ++s32 rtl8703bu_init_xmit_priv(PADAPTER padapter); ++void rtl8703bu_free_xmit_priv(PADAPTER padapter); ++s32 rtl8703bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8703bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8703bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++//s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); ++void rtl8703bu_xmit_tasklet(void *priv); ++s32 rtl8703bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8703be_init_xmit_priv(PADAPTER padapter); ++void rtl8703be_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf *rtl8703be_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++void rtl8703be_xmitframe_resume(_adapter *padapter); ++s32 rtl8703be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8703be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8703be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8703be_xmit_tasklet(void *priv); ++#endif ++ ++u8 BWMapping_8703B(PADAPTER Adapter, struct pkt_attrib *pattrib); ++u8 SCMapping_8703B(PADAPTER Adapter, struct pkt_attrib *pattrib); ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_cmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_cmd.h +old mode 100755 +new mode 100644 +index 9826d0d..5663cb1 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_cmd.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_cmd.h +@@ -56,6 +56,7 @@ enum h2c_cmd_8723B{ + H2C_8723B_RSSI_SETTING = 0x42, + H2C_8723B_AP_REQ_TXRPT = 0x43, + H2C_8723B_INIT_RATE_COLLECT = 0x44, ++ H2C_8723B_RA_PARA_ADJUST = 0x46, + + //BT Class: 011 + H2C_8723B_B_TYPE_TDMA = 0x60, +@@ -86,110 +87,38 @@ enum h2c_cmd_8723B{ + H2C_8723B_RESET_TSF = 0xC0, + H2C_8723B_MAXID, + }; +-/* move to hal_com_h2c.h +-#define H2C_8723B_RSVDPAGE_LOC_LEN 5 +-#define H2C_8723B_MEDIA_STATUS_RPT_LEN 3 +-#define H2C_8723B_KEEP_ALIVE_CTRL_LEN 2 +-#define H2C_8723B_DISCON_DECISION_LEN 3 +-#define H2C_8723B_BCN_RSVDPAGE_LEN 5 +-#define H2C_8723B_PROBERSP_RSVDPAGE_LEN 5 +-#define H2C_8723B_AP_OFFLOAD_LEN 3 +-#define H2C_8723B_AP_WOW_GPIO_CTRL_LEN 3 +-#define H2C_8723B_PWRMODE_LEN 7 +-#define H2C_8723B_PSTUNEPARAM_LEN 4 +-#define H2C_8723B_MACID_CFG_LEN 7 +-#define H2C_8723B_BTMP_OPER_LEN 4 +-#define H2C_8723B_WOWLAN_LEN 4 +-#define H2C_8723B_REMOTE_WAKE_CTRL_LEN 3 +-#define H2C_8723B_AOAC_GLOBAL_INFO_LEN 2 +-#define H2C_8723B_AOAC_RSVDPAGE_LOC_LEN 7 +-#define H2C_8723B_SCAN_OFFLOAD_CTRL_LEN 4 +-#define H2C_8723B_BT_FW_PATCH_LEN 6 +-#define H2C_8723B_RSSI_SETTING_LEN 4 +-#define H2C_8723B_AP_REQ_TXRPT_LEN 2 +-#define H2C_8723B_FORCE_BT_TXPWR_LEN 3 + +-#ifdef CONFIG_WOWLAN +-#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) +-#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) +-#define cpIpAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3]) +- +-// +-// ARP packet +-// +-// LLC Header +-#define GET_ARP_PKT_LLC_TYPE(__pHeader) ReadEF2Byte( ((u8*)(__pHeader)) + 6) +- +-//ARP element +-#define GET_ARP_PKT_OPERATION(__pHeader) ReadEF2Byte( ((u8*)(__pHeader)) + 6) +-#define GET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+8) +-#define GET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr((u8*)(_val), ((u8*)(__pHeader))+14) +-#define GET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+18) +-#define GET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr((u8*)(_val), ((u8*)(__pHeader))+24) +- +-#define SET_ARP_PKT_HW(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 0, __Value) +-#define SET_ARP_PKT_PROTOCOL(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 2, __Value) +-#define SET_ARP_PKT_HW_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 4, __Value) +-#define SET_ARP_PKT_PROTOCOL_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 5, __Value) +-#define SET_ARP_PKT_OPERATION(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 6, __Value) +-#define SET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+8, (u8*)(_val)) +-#define SET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr(((u8*)(__pHeader))+14, (u8*)(_val)) +-#define SET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+18, (u8*)(_val)) +-#define SET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr(((u8*)(__pHeader))+24, (u8*)(_val)) +- +-#define FW_WOWLAN_FUN_EN BIT(0) +-#define FW_WOWLAN_PATTERN_MATCH BIT(1) +-#define FW_WOWLAN_MAGIC_PKT BIT(2) +-#define FW_WOWLAN_UNICAST BIT(3) +-#define FW_WOWLAN_ALL_PKT_DROP BIT(4) +-#define FW_WOWLAN_GPIO_ACTIVE BIT(5) +-#define FW_WOWLAN_REKEY_WAKEUP BIT(6) +-#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) +- +-#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) +-#define FW_FW_PARSE_MAGIC_PKT BIT(1) +- +-#define FW_REMOTE_WAKE_CTRL_EN BIT(0) +-#define FW_REALWOWLAN_EN BIT(5) +- +-#endif //CONFIG_WOWLAN +-*/ + //---------------------------------------------------------------------------------------------------------// + //---------------------------------- H2C CMD CONTENT --------------------------------------------------// + //---------------------------------------------------------------------------------------------------------// + //_RSVDPAGE_LOC_CMD_0x00 +-#define SET_8723B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) +-#define SET_8723B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) +-#define SET_8723B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) +-#define SET_8723B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) +-#define SET_8723B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) +- +-//_MEDIA_STATUS_RPT_PARM_CMD_0x01 +-#define SET_8723B_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) +-#define SET_8723B_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +-#define SET_8723B_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) +-#define SET_8723B_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) ++#define SET_8723B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8723B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_8723B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8723B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8723B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) + + //_KEEP_ALIVE_CMD_0x03 + #define SET_8723B_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) + #define SET_8723B_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) + #define SET_8723B_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) +-#define SET_8723B_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) ++#define SET_8723B_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) + + //_DISCONNECT_DECISION_CMD_0x04 + #define SET_8723B_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) + #define SET_8723B_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +-#define SET_8723B_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) +-#define SET_8723B_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) ++#define SET_8723B_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) ++#define SET_8723B_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) + + // _PWR_MOD_CMD_0x20 +-#define SET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) ++#define SET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) + #define SET_8723B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) + #define SET_8723B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) +-#define SET_8723B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) +-#define SET_8723B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) +-#define SET_8723B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) +-#define SET_8723B_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+5, 0, 8, __Value) ++#define SET_8723B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8723B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8723B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) ++#define SET_8723B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++#define SET_8723B_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) + + #define GET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) + +@@ -224,7 +153,7 @@ enum h2c_cmd_8723B{ + #define SET_8723B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) + + // _FORCE_BT_TXPWR_CMD_0x62 +-#define SET_8723B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) ++#define SET_8723B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) + + // _FORCE_BT_MP_OPER_CMD_0x67 + #define SET_8723B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) +@@ -240,90 +169,11 @@ enum h2c_cmd_8723B{ + #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) + #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) + #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) +-/* move to hal_com_h2c.h +-// _WoWLAN PARAM_CMD_0x80 +-#define SET_8723B_H2CCMD_WOWLAN_FUNC_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) +-#define SET_8723B_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +-#define SET_8723B_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) +-#define SET_8723B_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) +-#define SET_8723B_H2CCMD_WOWLAN_ALL_PKT_DROP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) +-#define SET_8723B_H2CCMD_WOWLAN_GPIO_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) +-#define SET_8723B_H2CCMD_WOWLAN_REKEY_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) +-#define SET_8723B_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) +-#define SET_8723B_H2CCMD_WOWLAN_GPIONUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 7, __Value) +-#define SET_8723B_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 7, 1, __Value) +-#define SET_8723B_H2CCMD_WOWLAN_GPIO_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) +-//#define SET_8723B_H2CCMD_WOWLAN_GPIO_PULSE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 1, __Value) +-#define SET_8723B_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) +- +-// _REMOTE_WAKEUP_CMD_0x81 +-#define SET_8723B_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) +-#define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +-#define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) +-#define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) +-#define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) +-#define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) +-#define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 1, __Value) +- +-// AOAC_GLOBAL_INFO_0x82 +-#define SET_8723B_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +-#define SET_8723B_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) +- +-// AOAC_RSVDPAGE_LOC_0x83 +-#define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) +-#define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) +-#define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) +-#define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) +-#define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) +-#ifdef CONFIG_GTK_OL +-#define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) +-#endif //CONFIG_GTK_OL +-#ifdef CONFIG_PNO_SUPPORT +-#define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 0, 8, __Value) +-#endif +- +-#ifdef CONFIG_PNO_SUPPORT +-// D0_Scan_Offload_Info_0x86 +-#define SET_8723B_H2CCMD_AOAC_NLO_FUN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 3, 1, __Value) +-#define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) +-#define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) +-#define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) +-#endif //CONFIG_PNO_SUPPORT +-*/ + + //---------------------------------------------------------------------------------------------------------// + //------------------------------------------- Structure --------------------------------------------------// + //---------------------------------------------------------------------------------------------------------// +-/* move to hal_com_h2c.h +-typedef struct _RSVDPAGE_LOC { +- u8 LocProbeRsp; +- u8 LocPsPoll; +- u8 LocNullData; +- u8 LocQosNull; +- u8 LocBTQosNull; +-#ifdef CONFIG_WOWLAN +- u8 LocRemoteCtrlInfo; +- u8 LocArpRsp; +- u8 LocNbrAdv; +- u8 LocGTKRsp; +- u8 LocGTKInfo; +- u8 LocProbeReq; +- u8 LocNetList; +-#ifdef CONFIG_GTK_OL +- u8 LocGTKEXTMEM; +-#endif //CONFIG_GTK_OL +-#ifdef CONFIG_PNO_SUPPORT +- u8 LocPNOInfo; +- u8 LocScanInfo; +- u8 LocSSIDInfo; +- u8 LocProbePacket; +-#endif //CONFIG_PNO_SUPPORT +-#endif //CONFIG_WOWLAN +-#ifdef CONFIG_AP_WOWLAN +- u8 LocApOffloadBCN; +-#endif //CONFIG_AP_WOWLAN +-} RSVDPAGE_LOC_8723B, *PRSVDPAGE_LOC_8723B; +-*/ ++ + + //---------------------------------------------------------------------------------------------------------// + //---------------------------------- Function Statement --------------------------------------------------// +@@ -333,12 +183,11 @@ typedef struct _RSVDPAGE_LOC { + void rtl8723b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); + void rtl8723b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); + void rtl8723b_set_rssi_cmd(PADAPTER padapter, u8 *param); +-void rtl8723b_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8* arg, u8 rssi_level); ++void rtl8723b_Add_RateATid(PADAPTER pAdapter, u64 rate_bitmap, u8 *arg, u8 rssi_level); + void rtl8723b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); + //s32 rtl8723b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); + void rtl8723b_set_FwPsTuneParam_cmd(PADAPTER padapter); + void rtl8723b_set_FwMacIdConfig_cmd(_adapter* padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask); +-void rtl8723b_set_FwMediaStatusRpt_cmd(PADAPTER padapter, u8 mstatus, u8 macid); + void rtl8723b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); + void rtl8723b_download_rsvd_page(PADAPTER padapter, u8 mstatus); + #ifdef CONFIG_BT_COEXIST +@@ -350,11 +199,11 @@ void rtl8723b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); + + void CheckFwRsvdPageContent(PADAPTER padapter); + +-#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) +-void rtl8723b_set_wowlan_cmd(_adapter* padapter, u8 enable); +-void rtl8723b_set_ap_wowlan_cmd(_adapter* padapter, u8 enable); +-void SetFwRelatedForWoWLAN8723b(_adapter* padapter, u8 bHostIsGoingtoSleep); +-#endif//CONFIG_WOWLAN ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++void rtl8723b_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); ++#endif ++#endif + + #ifdef CONFIG_P2P_WOWLAN + void rtl8723b_set_p2p_wowlan_offload_cmd(PADAPTER padapter); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_dm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_dm.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_hal.h +old mode 100755 +new mode 100644 +index 11ccd6e..574ee9a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_hal.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_hal.h +@@ -1,341 +1,331 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8723B_HAL_H__ +-#define __RTL8723B_HAL_H__ +- +-#include "hal_data.h" +- +-#include "rtl8723b_spec.h" +-#include "rtl8723b_rf.h" +-#include "rtl8723b_dm.h" +-#include "rtl8723b_recv.h" +-#include "rtl8723b_xmit.h" +-#include "rtl8723b_cmd.h" +-#include "rtl8723b_led.h" +-#include "Hal8723BPwrSeq.h" +-#include "Hal8723BPhyReg.h" +-#include "Hal8723BPhyCfg.h" +-#ifdef DBG_CONFIG_ERROR_DETECT +-#include "rtl8723b_sreset.h" +-#endif +- +- +-//--------------------------------------------------------------------- +-// RTL8723B From file +-//--------------------------------------------------------------------- +- #define RTL8723B_FW_IMG "rtl8723b/FW_NIC.bin" +- #define RTL8723B_FW_WW_IMG "rtl8723b/FW_WoWLAN.bin" +- #define RTL8723B_PHY_REG "rtl8723b/PHY_REG.txt" +- #define RTL8723B_PHY_RADIO_A "rtl8723b/RadioA.txt" +- #define RTL8723B_PHY_RADIO_B "rtl8723b/RadioB.txt" +- #define RTL8723B_TXPWR_TRACK "rtl8723b/TxPowerTrack.txt" +- #define RTL8723B_AGC_TAB "rtl8723b/AGC_TAB.txt" +- #define RTL8723B_PHY_MACREG "rtl8723b/MAC_REG.txt" +- #define RTL8723B_PHY_REG_PG "rtl8723b/PHY_REG_PG.txt" +- #define RTL8723B_PHY_REG_MP "rtl8723b/PHY_REG_MP.txt" +- #define RTL8723B_TXPWR_LMT "rtl8723b/TXPWR_LMT.txt" +- +-//--------------------------------------------------------------------- +-// RTL8723B From header +-//--------------------------------------------------------------------- +- +-#if MP_DRIVER == 1 +- #define Rtl8723B_FwBTImgArray Rtl8723BFwBTImgArray +- #define Rtl8723B_FwBTImgArrayLength Rtl8723BFwBTImgArrayLength +- +- #define Rtl8723B_FwMPImageArray Rtl8723BFwMPImgArray +- #define Rtl8723B_FwMPImgArrayLength Rtl8723BMPImgArrayLength +- +- #define Rtl8723B_PHY_REG_Array_MP Rtl8723B_PHYREG_Array_MP +- #define Rtl8723B_PHY_REG_Array_MPLength Rtl8723B_PHYREG_Array_MPLength +-#endif +- +- +-#define FW_8723B_SIZE 0x8000 +-#define FW_8723B_START_ADDRESS 0x1000 +-#define FW_8723B_END_ADDRESS 0x1FFF //0x5FFF +- +-#define IS_FW_HEADER_EXIST_8723B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x5300) +- +-typedef struct _RT_FIRMWARE { +- FIRMWARE_SOURCE eFWSource; +-#ifdef CONFIG_EMBEDDED_FWIMG +- u8* szFwBuffer; +-#else +- u8 szFwBuffer[FW_8723B_SIZE]; +-#endif +- u32 ulFwLength; +-} RT_FIRMWARE_8723B, *PRT_FIRMWARE_8723B; +- +-// +-// This structure must be cared byte-ordering +-// +-// Added by tynli. 2009.12.04. +-typedef struct _RT_8723B_FIRMWARE_HDR +-{ +- // 8-byte alinment required +- +- //--- LONG WORD 0 ---- +- u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut +- u8 Category; // AP/NIC and USB/PCI +- u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions +- u16 Version; // FW Version +- u16 Subversion; // FW Subversion, default 0x00 +- +- //--- LONG WORD 1 ---- +- u8 Month; // Release time Month field +- u8 Date; // Release time Date field +- u8 Hour; // Release time Hour field +- u8 Minute; // Release time Minute field +- u16 RamCodeSize; // The size of RAM code +- u16 Rsvd2; +- +- //--- LONG WORD 2 ---- +- u32 SvnIdx; // The SVN entry index +- u32 Rsvd3; +- +- //--- LONG WORD 3 ---- +- u32 Rsvd4; +- u32 Rsvd5; +-}RT_8723B_FIRMWARE_HDR, *PRT_8723B_FIRMWARE_HDR; +- +-#define DRIVER_EARLY_INT_TIME_8723B 0x05 +-#define BCN_DMA_ATIME_INT_TIME_8723B 0x02 +- +-// for 8723B +-// TX 32K, RX 16K, Page size 128B for TX, 8B for RX +-#define PAGE_SIZE_TX_8723B 128 +-#define PAGE_SIZE_RX_8723B 8 +- +-#define TX_DMA_SIZE_8723B 0x8000 // 32K(TX) +-#define RX_DMA_SIZE_8723B 0x4000 // 16K(RX) +- +-#ifdef CONFIG_FW_C2H_DEBUG +-#define RX_DMA_RESERVED_SIZE_8723B 0x100 // 256B, reserved for c2h debug message +-#else +-#define RX_DMA_RESERVED_SIZE_8723B 0x80 // 128B, reserved for tx report +-#endif +-#define RX_DMA_BOUNDARY_8723B (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B - 1) +- +- +-// Note: We will divide number of page equally for each queue other than public queue! +- +-//For General Reserved Page Number(Beacon Queue is reserved page) +-//Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 +-#define BCNQ_PAGE_NUM_8723B 0x08 +-#ifdef CONFIG_CONCURRENT_MODE +-#define BCNQ1_PAGE_NUM_8723B 0x08 // 0x04 +-#else +-#define BCNQ1_PAGE_NUM_8723B 0x00 +-#endif +- +-#ifdef CONFIG_PNO_SUPPORT +-#undef BCNQ1_PAGE_NUM_8723B +-#define BCNQ1_PAGE_NUM_8723B 0x00 // 0x04 +-#endif +- +-//For WoWLan , more reserved page +-//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 +-#ifdef CONFIG_WOWLAN +-#define WOWLAN_PAGE_NUM_8723B 0x07 +-#else +-#define WOWLAN_PAGE_NUM_8723B 0x00 +-#endif +- +-#ifdef CONFIG_PNO_SUPPORT +-#undef WOWLAN_PAGE_NUM_8723B +-#define WOWLAN_PAGE_NUM_8723B 0x15 +-#endif +- +-#ifdef CONFIG_AP_WOWLAN +-#define AP_WOWLAN_PAGE_NUM_8723B 0x02 +-#endif +- +-#define TX_TOTAL_PAGE_NUMBER_8723B (0xFF - BCNQ_PAGE_NUM_8723B - BCNQ1_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B) +-#define TX_PAGE_BOUNDARY_8723B (TX_TOTAL_PAGE_NUMBER_8723B + 1) +- +-#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B TX_TOTAL_PAGE_NUMBER_8723B +-#define WMM_NORMAL_TX_PAGE_BOUNDARY_8723B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B + 1) +- +-// For Normal Chip Setting +-// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B +-#define NORMAL_PAGE_NUM_HPQ_8723B 0x0C +-#define NORMAL_PAGE_NUM_LPQ_8723B 0x02 +-#define NORMAL_PAGE_NUM_NPQ_8723B 0x02 +- +-// Note: For Normal Chip Setting, modify later +-#define WMM_NORMAL_PAGE_NUM_HPQ_8723B 0x30 +-#define WMM_NORMAL_PAGE_NUM_LPQ_8723B 0x20 +-#define WMM_NORMAL_PAGE_NUM_NPQ_8723B 0x20 +- +- +-#include "HalVerDef.h" +-#include "hal_com.h" +- +-#define EFUSE_OOB_PROTECT_BYTES 15 +- +-#define HAL_EFUSE_MEMORY +- +-#define HWSET_MAX_SIZE_8723B 512 +-#define EFUSE_REAL_CONTENT_LEN_8723B 512 +-#define EFUSE_MAP_LEN_8723B 512 +-#define EFUSE_MAX_SECTION_8723B 64 +- +-#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. +-#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8723B) +- +-#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. +-#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. +- +-//======================================================== +-// EFUSE for BT definition +-//======================================================== +-#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 +-#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 +-#define EFUSE_BT_MAP_LEN 1024 // 1k bytes +-#define EFUSE_BT_MAX_SECTION 128 // 1024/8 +- +-#define EFUSE_PROTECT_BYTES_BANK 16 +- +-// Description: Determine the types of C2H events that are the same in driver and Fw. +-// Fisrt constructed by tynli. 2009.10.09. +-typedef enum _C2H_EVT +-{ +- C2H_DBG = 0, +- C2H_TSF = 1, +- C2H_AP_RPT_RSP = 2, +- C2H_CCX_TX_RPT = 3, // The FW notify the report of the specific tx packet. +- C2H_BT_RSSI = 4, +- C2H_BT_OP_MODE = 5, +- C2H_EXT_RA_RPT = 6, +- C2H_8723B_BT_INFO = 9, +- C2H_HW_INFO_EXCH = 10, +- C2H_8723B_BT_MP_INFO = 11, +- C2H_8723B_P2P_RPORT = 0x16, +-#ifdef CONFIG_FW_C2H_DEBUG +- C2H_8723B_FW_DEBUG = 0xff, +-#endif //CONFIG_FW_C2H_DEBUG +- MAX_C2HEVENT +-} C2H_EVT; +- +-typedef struct _C2H_EVT_HDR +-{ +- u8 CmdID; +- u8 CmdLen; +- u8 CmdSeq; +-} __attribute__((__packed__)) C2H_EVT_HDR, *PC2H_EVT_HDR; +- +-typedef enum tag_Package_Definition +-{ +- PACKAGE_DEFAULT, +- PACKAGE_QFN68, +- PACKAGE_TFBGA90, +- PACKAGE_TFBGA80, +- PACKAGE_TFBGA79 +-}PACKAGE_TYPE_E; +- +-#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) +-#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) +- +-// rtl8723a_hal_init.c +-s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); +-void rtl8723b_FirmwareSelfReset(PADAPTER padapter); +-void rtl8723b_InitializeFirmwareVars(PADAPTER padapter); +- +-void rtl8723b_InitAntenna_Selection(PADAPTER padapter); +-void rtl8723b_DeinitAntenna_Selection(PADAPTER padapter); +-void rtl8723b_CheckAntenna_Selection(PADAPTER padapter); +-void rtl8723b_init_default_value(PADAPTER padapter); +- +-s32 rtl8723b_InitLLTTable(PADAPTER padapter); +- +-s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); +-s32 CardDisableWithoutHWSM(PADAPTER padapter); +- +-// EFuse +-u8 GetEEPROMSize8723B(PADAPTER padapter); +-void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); +-void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); +-void Hal_EfuseParseTxPowerInfo_8723B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); +-void Hal_EfuseParseBTCoexistInfo_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void Hal_EfuseParseEEPROMVer_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void Hal_EfuseParseChnlPlan_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void Hal_EfuseParseCustomerID_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void Hal_EfuseParseAntennaDiversity_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void Hal_EfuseParseXtal_8723B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); +-void Hal_EfuseParseThermalMeter_8723B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); +-VOID Hal_EfuseParsePackageType_8723B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); +-VOID Hal_EfuseParseVoltage_8723B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); +- +-#ifdef CONFIG_C2H_PACKET_EN +-void rtl8723b_c2h_packet_handler(PADAPTER padapter, u8 *pbuf, u16 length); +-#endif +- +- +-void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc); +-void SetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); +-void GetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); +-#ifdef CONFIG_C2H_PACKET_EN +-void SetHwRegWithBuf8723B(PADAPTER padapter, u8 variable, u8 *pbuf, int len); +-#endif // CONFIG_C2H_PACKET_EN +-u8 SetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); +-u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); +- +-// register +-void rtl8723b_InitBeaconParameters(PADAPTER padapter); +-void rtl8723b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); +-void _InitBurstPktLen_8723BS(PADAPTER Adapter); +-void _8051Reset8723(PADAPTER padapter); +-#ifdef CONFIG_WOWLAN +-void Hal_DetectWoWMode(PADAPTER pAdapter); +-#endif //CONFIG_WOWLAN +- +-void rtl8723b_start_thread(_adapter *padapter); +-void rtl8723b_stop_thread(_adapter *padapter); +- +-#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) +-void rtl8723bs_init_checkbthang_workqueue(_adapter * adapter); +-void rtl8723bs_free_checkbthang_workqueue(_adapter * adapter); +-void rtl8723bs_cancle_checkbthang_workqueue(_adapter * adapter); +-void rtl8723bs_hal_check_bt_hang(_adapter * adapter); +-#endif +- +-int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); +- +-void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len); +-#ifdef CONFIG_FW_C2H_DEBUG +-void Debug_FwC2H_8723b(PADAPTER padapter, u8 *pdata, u8 len); +-#endif //CONFIG_FW_C2H_DEBUG +-s32 c2h_id_filter_ccx_8723b(u8 *buf); +-s32 c2h_handler_8723b(PADAPTER padapter, u8 *pC2hEvent); +-u8 MRateToHwRate8723B(u8 rate); +-u8 HwRateToMRate8723B(u8 rate); +- +-#ifdef CONFIG_RF_GAIN_OFFSET +-void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); +-#endif //CONFIG_RF_GAIN_OFFSET +- +-#ifdef CONFIG_PCI_HCI +-BOOLEAN InterruptRecognized8723BE(PADAPTER Adapter); +-VOID UpdateInterruptMask8723BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); +-#endif +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8723B_HAL_H__ ++#define __RTL8723B_HAL_H__ ++ ++#include "hal_data.h" ++ ++#include "rtl8723b_spec.h" ++#include "rtl8723b_rf.h" ++#include "rtl8723b_dm.h" ++#include "rtl8723b_recv.h" ++#include "rtl8723b_xmit.h" ++#include "rtl8723b_cmd.h" ++#include "rtl8723b_led.h" ++#include "Hal8723BPwrSeq.h" ++#include "Hal8723BPhyReg.h" ++#include "Hal8723BPhyCfg.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8723b_sreset.h" ++#endif ++ ++ ++//--------------------------------------------------------------------- ++// RTL8723B From file ++//--------------------------------------------------------------------- ++ #define RTL8723B_FW_IMG "rtl8723b/FW_NIC.bin" ++ #define RTL8723B_FW_WW_IMG "rtl8723b/FW_WoWLAN.bin" ++ #define RTL8723B_PHY_REG "rtl8723b/PHY_REG.txt" ++ #define RTL8723B_PHY_RADIO_A "rtl8723b/RadioA.txt" ++ #define RTL8723B_PHY_RADIO_B "rtl8723b/RadioB.txt" ++ #define RTL8723B_TXPWR_TRACK "rtl8723b/TxPowerTrack.txt" ++ #define RTL8723B_AGC_TAB "rtl8723b/AGC_TAB.txt" ++ #define RTL8723B_PHY_MACREG "rtl8723b/MAC_REG.txt" ++ #define RTL8723B_PHY_REG_PG "rtl8723b/PHY_REG_PG.txt" ++ #define RTL8723B_PHY_REG_MP "rtl8723b/PHY_REG_MP.txt" ++ #define RTL8723B_TXPWR_LMT "rtl8723b/TXPWR_LMT.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8723B From header ++//--------------------------------------------------------------------- ++ ++#if MP_DRIVER == 1 ++ #define Rtl8723B_FwBTImgArray Rtl8723BFwBTImgArray ++ #define Rtl8723B_FwBTImgArrayLength Rtl8723BFwBTImgArrayLength ++ ++ #define Rtl8723B_PHY_REG_Array_MP Rtl8723B_PHYREG_Array_MP ++ #define Rtl8723B_PHY_REG_Array_MPLength Rtl8723B_PHYREG_Array_MPLength ++#endif ++ ++ ++#define FW_8723B_SIZE 0x8000 ++#define FW_8723B_START_ADDRESS 0x1000 ++#define FW_8723B_END_ADDRESS 0x1FFF //0x5FFF ++ ++#define IS_FW_HEADER_EXIST_8723B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x5300) ++ ++typedef struct _RT_FIRMWARE { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[FW_8723B_SIZE]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8723B, *PRT_FIRMWARE_8723B; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++typedef struct _RT_8723B_FIRMWARE_HDR ++{ ++ // 8-byte alinment required ++ ++ //--- LONG WORD 0 ---- ++ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++ u8 Category; // AP/NIC and USB/PCI ++ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++ u16 Version; // FW Version ++ u16 Subversion; // FW Subversion, default 0x00 ++ ++ //--- LONG WORD 1 ---- ++ u8 Month; // Release time Month field ++ u8 Date; // Release time Date field ++ u8 Hour; // Release time Hour field ++ u8 Minute; // Release time Minute field ++ u16 RamCodeSize; // The size of RAM code ++ u16 Rsvd2; ++ ++ //--- LONG WORD 2 ---- ++ u32 SvnIdx; // The SVN entry index ++ u32 Rsvd3; ++ ++ //--- LONG WORD 3 ---- ++ u32 Rsvd4; ++ u32 Rsvd5; ++}RT_8723B_FIRMWARE_HDR, *PRT_8723B_FIRMWARE_HDR; ++ ++#define DRIVER_EARLY_INT_TIME_8723B 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8723B 0x02 ++ ++// for 8723B ++// TX 32K, RX 16K, Page size 128B for TX, 8B for RX ++#define PAGE_SIZE_TX_8723B 128 ++#define PAGE_SIZE_RX_8723B 8 ++ ++#define TX_DMA_SIZE_8723B 0x8000 /* 32K(TX) */ ++#define RX_DMA_SIZE_8723B 0x4000 /* 16K(RX) */ ++ ++#ifdef CONFIG_WOWLAN ++#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ ++#else ++#define RESV_FMWF 0 ++#endif ++ ++#ifdef CONFIG_FW_C2H_DEBUG ++#define RX_DMA_RESERVED_SIZE_8723B 0x100 // 256B, reserved for c2h debug message ++#else ++#define RX_DMA_RESERVED_SIZE_8723B 0x80 // 128B, reserved for tx report ++#endif ++#define RX_DMA_BOUNDARY_8723B (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B - 1) ++ ++ ++// Note: We will divide number of page equally for each queue other than public queue! ++ ++//For General Reserved Page Number(Beacon Queue is reserved page) ++//Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 ++#define BCNQ_PAGE_NUM_8723B 0x08 ++#ifdef CONFIG_CONCURRENT_MODE ++#define BCNQ1_PAGE_NUM_8723B 0x08 // 0x04 ++#else ++#define BCNQ1_PAGE_NUM_8723B 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef BCNQ1_PAGE_NUM_8723B ++#define BCNQ1_PAGE_NUM_8723B 0x00 // 0x04 ++#endif ++ ++//For WoWLan , more reserved page ++//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8723B 0x07 ++#else ++#define WOWLAN_PAGE_NUM_8723B 0x00 ++#endif ++ ++#ifdef CONFIG_PNO_SUPPORT ++#undef WOWLAN_PAGE_NUM_8723B ++#define WOWLAN_PAGE_NUM_8723B 0x15 ++#endif ++ ++#ifdef CONFIG_AP_WOWLAN ++#define AP_WOWLAN_PAGE_NUM_8723B 0x02 ++#endif ++ ++#define TX_TOTAL_PAGE_NUMBER_8723B (0xFF - BCNQ_PAGE_NUM_8723B - BCNQ1_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B) ++#define TX_PAGE_BOUNDARY_8723B (TX_TOTAL_PAGE_NUMBER_8723B + 1) ++ ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B TX_TOTAL_PAGE_NUMBER_8723B ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_8723B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B ++#define NORMAL_PAGE_NUM_HPQ_8723B 0x0C ++#define NORMAL_PAGE_NUM_LPQ_8723B 0x02 ++#define NORMAL_PAGE_NUM_NPQ_8723B 0x02 ++ ++// Note: For Normal Chip Setting, modify later ++#define WMM_NORMAL_PAGE_NUM_HPQ_8723B 0x30 ++#define WMM_NORMAL_PAGE_NUM_LPQ_8723B 0x20 ++#define WMM_NORMAL_PAGE_NUM_NPQ_8723B 0x20 ++ ++ ++#include "HalVerDef.h" ++#include "hal_com.h" ++ ++#define EFUSE_OOB_PROTECT_BYTES 15 ++ ++#define HAL_EFUSE_MEMORY ++ ++#define HWSET_MAX_SIZE_8723B 512 ++#define EFUSE_REAL_CONTENT_LEN_8723B 512 ++#define EFUSE_MAP_LEN_8723B 512 ++#define EFUSE_MAX_SECTION_8723B 64 ++ ++#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8723B) ++ ++#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. ++#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. ++ ++//======================================================== ++// EFUSE for BT definition ++//======================================================== ++#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 ++#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 ++#define EFUSE_BT_MAP_LEN 1024 // 1k bytes ++#define EFUSE_BT_MAX_SECTION 128 // 1024/8 ++ ++#define EFUSE_PROTECT_BYTES_BANK 16 ++ ++typedef struct _C2H_EVT_HDR ++{ ++ u8 CmdID; ++ u8 CmdLen; ++ u8 CmdSeq; ++} __attribute__((__packed__)) C2H_EVT_HDR, *PC2H_EVT_HDR; ++ ++typedef enum tag_Package_Definition ++{ ++ PACKAGE_DEFAULT, ++ PACKAGE_QFN68, ++ PACKAGE_TFBGA90, ++ PACKAGE_TFBGA80, ++ PACKAGE_TFBGA79 ++}PACKAGE_TYPE_E; ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++// rtl8723a_hal_init.c ++s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); ++void rtl8723b_FirmwareSelfReset(PADAPTER padapter); ++void rtl8723b_InitializeFirmwareVars(PADAPTER padapter); ++ ++void rtl8723b_InitAntenna_Selection(PADAPTER padapter); ++void rtl8723b_DeinitAntenna_Selection(PADAPTER padapter); ++void rtl8723b_CheckAntenna_Selection(PADAPTER padapter); ++void rtl8723b_init_default_value(PADAPTER padapter); ++ ++s32 rtl8723b_InitLLTTable(PADAPTER padapter); ++ ++s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); ++s32 CardDisableWithoutHWSM(PADAPTER padapter); ++ ++// EFuse ++u8 GetEEPROMSize8723B(PADAPTER padapter); ++void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); ++void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); ++void Hal_EfuseParseTxPowerInfo_8723B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseBTCoexistInfo_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseEEPROMVer_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseChnlPlan_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseCustomerID_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseAntennaDiversity_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseXtal_8723B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); ++void Hal_EfuseParseThermalMeter_8723B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); ++VOID Hal_EfuseParsePackageType_8723B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++VOID Hal_EfuseParseVoltage_8723B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++VOID Hal_EfuseParseBoardType_8723B(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); ++ ++#ifdef CONFIG_C2H_PACKET_EN ++void rtl8723b_c2h_packet_handler(PADAPTER padapter, u8 *pbuf, u16 length); ++#endif ++ ++ ++void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8723b(_adapter *adapter); ++void SetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); ++void GetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); ++#ifdef CONFIG_C2H_PACKET_EN ++void SetHwRegWithBuf8723B(PADAPTER padapter, u8 variable, u8 *pbuf, int len); ++#endif // CONFIG_C2H_PACKET_EN ++u8 SetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++ ++// register ++void rtl8723b_InitBeaconParameters(PADAPTER padapter); ++void rtl8723b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); ++void _InitBurstPktLen_8723BS(PADAPTER Adapter); ++void _8051Reset8723(PADAPTER padapter); ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++void rtl8723b_start_thread(_adapter *padapter); ++void rtl8723b_stop_thread(_adapter *padapter); ++ ++#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) ++void rtl8723bs_init_checkbthang_workqueue(_adapter * adapter); ++void rtl8723bs_free_checkbthang_workqueue(_adapter * adapter); ++void rtl8723bs_cancle_checkbthang_workqueue(_adapter * adapter); ++void rtl8723bs_hal_check_bt_hang(_adapter * adapter); ++#endif ++ ++#ifdef CONFIG_GPIO_WAKEUP ++void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); ++#endif ++ ++int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); ++ ++void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len); ++s32 c2h_id_filter_ccx_8723b(u8 *buf); ++s32 c2h_handler_8723b(PADAPTER padapter, u8 *pC2hEvent); ++u8 MRateToHwRate8723B(u8 rate); ++u8 HwRateToMRate8723B(u8 rate); ++ ++#ifdef CONFIG_RF_GAIN_OFFSET ++void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); ++#endif //CONFIG_RF_GAIN_OFFSET ++ ++#ifdef CONFIG_PCI_HCI ++BOOLEAN InterruptRecognized8723BE(PADAPTER Adapter); ++VOID UpdateInterruptMask8723BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++#endif ++ ++#ifdef CONFIG_GPIO_API ++int rtl8723b_GpioFuncCheck(PADAPTER adapter, u8 gpio_num); ++VOID rtl8723b_GpioMultiFuncReset(PADAPTER adapter, u8 gpio_num); ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_led.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_led.h +old mode 100755 +new mode 100644 +index 36772c0..161fa48 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_led.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_led.h +@@ -1,49 +1,49 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8723B_LED_H__ +-#define __RTL8723B_LED_H__ +- +-#include +-#include +-#include +- +- +-//================================================================================ +-// Interface to manipulate LED objects. +-//================================================================================ +-#ifdef CONFIG_USB_HCI +-void rtl8723bu_InitSwLeds(PADAPTER padapter); +-void rtl8723bu_DeInitSwLeds(PADAPTER padapter); +-#endif +-#ifdef CONFIG_SDIO_HCI +-void rtl8723bs_InitSwLeds(PADAPTER padapter); +-void rtl8723bs_DeInitSwLeds(PADAPTER padapter); +-#endif +-#ifdef CONFIG_GSPI_HCI +-void rtl8723bs_InitSwLeds(PADAPTER padapter); +-void rtl8723bs_DeInitSwLeds(PADAPTER padapter); +-#endif +-#ifdef CONFIG_PCI_HCI +-void rtl8723be_InitSwLeds(PADAPTER padapter); +-void rtl8723be_DeInitSwLeds(PADAPTER padapter); +-#endif +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8723B_LED_H__ ++#define __RTL8723B_LED_H__ ++ ++#include ++#include ++#include ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8723bu_InitSwLeds(PADAPTER padapter); ++void rtl8723bu_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_SDIO_HCI ++void rtl8723bs_InitSwLeds(PADAPTER padapter); ++void rtl8723bs_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_GSPI_HCI ++void rtl8723bs_InitSwLeds(PADAPTER padapter); ++void rtl8723bs_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8723be_InitSwLeds(PADAPTER padapter); ++void rtl8723be_DeInitSwLeds(PADAPTER padapter); ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_recv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_recv.h +old mode 100755 +new mode 100644 +index 4218f50..92fad67 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_recv.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_recv.h +@@ -1,52 +1,92 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8723B_RECV_H__ +-#define __RTL8723B_RECV_H__ +- +-#include +- +-#ifdef CONFIG_SDIO_HCI +-#ifndef CONFIG_SDIO_RX_COPY +-#undef MAX_RECVBUF_SZ +-#define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B) +-#endif // !CONFIG_SDIO_RX_COPY +-#endif // CONFIG_SDIO_HCI +- +-#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +-s32 rtl8723bs_init_recv_priv(PADAPTER padapter); +-void rtl8723bs_free_recv_priv(PADAPTER padapter); +-#endif +- +-#ifdef CONFIG_USB_HCI +-int rtl8723bu_init_recv_priv(_adapter *padapter); +-void rtl8723bu_free_recv_priv (_adapter *padapter); +-void rtl8723bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); +-#endif +- +-#ifdef CONFIG_PCI_HCI +-s32 rtl8723be_init_recv_priv(PADAPTER padapter); +-void rtl8723be_free_recv_priv(PADAPTER padapter); +-#endif +- +-void rtl8723b_query_rx_phy_status(union recv_frame *precvframe, struct phy_stat *pphy_status); +-void rtl8723b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8723B_RECV_H__ ++#define __RTL8723B_RECV_H__ ++ ++#define RECV_BLK_SZ 512 ++#define RECV_BLK_CNT 16 ++#define RECV_BLK_TH RECV_BLK_CNT ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ //#define MAX_RECVBUF_SZ (32768) // 32k ++ //#define MAX_RECVBUF_SZ (16384) //16K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ #ifdef CONFIG_PLATFORM_MSTAR ++ #define MAX_RECVBUF_SZ (8192) // 8K ++ #else ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ #endif ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ ++#define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B) ++ ++#endif ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++#ifdef CONFIG_SDIO_HCI ++#ifndef CONFIG_SDIO_RX_COPY ++#undef MAX_RECVBUF_SZ ++#define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B) ++#endif // !CONFIG_SDIO_RX_COPY ++#endif // CONFIG_SDIO_HCI ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++s32 rtl8723bs_init_recv_priv(PADAPTER padapter); ++void rtl8723bs_free_recv_priv(PADAPTER padapter); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++int rtl8723bu_init_recv_priv(_adapter *padapter); ++void rtl8723bu_free_recv_priv (_adapter *padapter); ++void rtl8723bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8723be_init_recv_priv(PADAPTER padapter); ++void rtl8723be_free_recv_priv(PADAPTER padapter); ++#endif ++ ++void rtl8723b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); ++ ++#endif /* __RTL8723B_RECV_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_rf.h +old mode 100755 +new mode 100644 +index 1c6d420..2bb7341 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_rf.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_rf.h +@@ -20,8 +20,6 @@ + #ifndef __RTL8723B_RF_H__ + #define __RTL8723B_RF_H__ + +-#include "rtl8192c_rf.h" +- + int PHY_RF6052_Config8723B( IN PADAPTER Adapter ); + + VOID +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_spec.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_spec.h +old mode 100755 +new mode 100644 +index aa4bc2c..7e5dced +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_spec.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_spec.h +@@ -1,289 +1,296 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- *******************************************************************************/ +-#ifndef __RTL8723B_SPEC_H__ +-#define __RTL8723B_SPEC_H__ +- +-#include +- +- +-#define HAL_NAV_UPPER_UNIT_8723B 128 // micro-second +- +-//----------------------------------------------------- +-// +-// 0x0000h ~ 0x00FFh System Configuration +-// +-//----------------------------------------------------- +-#define REG_RSV_CTRL_8723B 0x001C // 3 Byte +-#define REG_BT_WIFI_ANTENNA_SWITCH_8723B 0x0038 +-#define REG_HSISR_8723B 0x005c +-#define REG_PAD_CTRL1_8723B 0x0064 +-#define REG_AFE_CTRL_4_8723B 0x0078 +-#define REG_HMEBOX_DBG_0_8723B 0x0088 +-#define REG_HMEBOX_DBG_1_8723B 0x008A +-#define REG_HMEBOX_DBG_2_8723B 0x008C +-#define REG_HMEBOX_DBG_3_8723B 0x008E +-#define REG_HIMR0_8723B 0x00B0 +-#define REG_HISR0_8723B 0x00B4 +-#define REG_HIMR1_8723B 0x00B8 +-#define REG_HISR1_8723B 0x00BC +-#define REG_PMC_DBG_CTRL2_8723B 0x00CC +- +-//----------------------------------------------------- +-// +-// 0x0100h ~ 0x01FFh MACTOP General Configuration +-// +-//----------------------------------------------------- +-#define REG_C2HEVT_CMD_ID_8723B 0x01A0 +-#define REG_C2HEVT_CMD_LEN_8723B 0x01AE +-#define REG_WOWLAN_WAKE_REASON 0x01C7 +-#define REG_WOWLAN_GTK_DBG1 0x630 +-#define REG_WOWLAN_GTK_DBG2 0x634 +- +-#define REG_HMEBOX_EXT0_8723B 0x01F0 +-#define REG_HMEBOX_EXT1_8723B 0x01F4 +-#define REG_HMEBOX_EXT2_8723B 0x01F8 +-#define REG_HMEBOX_EXT3_8723B 0x01FC +- +-//----------------------------------------------------- +-// +-// 0x0200h ~ 0x027Fh TXDMA Configuration +-// +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// +-// 0x0280h ~ 0x02FFh RXDMA Configuration +-// +-//----------------------------------------------------- +-#define REG_RXDMA_CONTROL_8723B 0x0286 // Control the RX DMA. +-#define REG_RXDMA_MODE_CTRL_8723B 0x0290 +- +-//----------------------------------------------------- +-// +-// 0x0300h ~ 0x03FFh PCIe +-// +-//----------------------------------------------------- +-#define REG_PCIE_CTRL_REG_8723B 0x0300 +-#define REG_INT_MIG_8723B 0x0304 // Interrupt Migration +-#define REG_BCNQ_DESA_8723B 0x0308 // TX Beacon Descriptor Address +-#define REG_HQ_DESA_8723B 0x0310 // TX High Queue Descriptor Address +-#define REG_MGQ_DESA_8723B 0x0318 // TX Manage Queue Descriptor Address +-#define REG_VOQ_DESA_8723B 0x0320 // TX VO Queue Descriptor Address +-#define REG_VIQ_DESA_8723B 0x0328 // TX VI Queue Descriptor Address +-#define REG_BEQ_DESA_8723B 0x0330 // TX BE Queue Descriptor Address +-#define REG_BKQ_DESA_8723B 0x0338 // TX BK Queue Descriptor Address +-#define REG_RX_DESA_8723B 0x0340 // RX Queue Descriptor Address +-#define REG_DBI_WDATA_8723B 0x0348 // DBI Write Data +-#define REG_DBI_RDATA_8723B 0x034C // DBI Read Data +-#define REG_DBI_ADDR_8723B 0x0350 // DBI Address +-#define REG_DBI_FLAG_8723B 0x0352 // DBI Read/Write Flag +-#define REG_MDIO_WDATA_8723B 0x0354 // MDIO for Write PCIE PHY +-#define REG_MDIO_RDATA_8723B 0x0356 // MDIO for Reads PCIE PHY +-#define REG_MDIO_CTL_8723B 0x0358 // MDIO for Control +-#define REG_DBG_SEL_8723B 0x0360 // Debug Selection Register +-#define REG_PCIE_HRPWM_8723B 0x0361 //PCIe RPWM +-#define REG_PCIE_HCPWM_8723B 0x0363 //PCIe CPWM +-#define REG_PCIE_MULTIFET_CTRL_8723B 0x036A //PCIE Multi-Fethc Control +- +-//----------------------------------------------------- +-// +-// 0x0400h ~ 0x047Fh Protocol Configuration +-// +-//----------------------------------------------------- +-#define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424 +-#define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425 +-#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D +-#ifdef CONFIG_WOWLAN +-#define REG_TXPKTBUF_IV_LOW 0x0484 +-#define REG_TXPKTBUF_IV_HIGH 0x0488 +-#endif +-#define REG_AMPDU_BURST_MODE_8723B 0x04BC +- +-//----------------------------------------------------- +-// +-// 0x0500h ~ 0x05FFh EDCA Configuration +-// +-//----------------------------------------------------- +-#define REG_SECONDARY_CCA_CTRL_8723B 0x0577 +- +-//----------------------------------------------------- +-// +-// 0x0600h ~ 0x07FFh WMAC Configuration +-// +-//----------------------------------------------------- +- +- +-//============================================================ +-// SDIO Bus Specification +-//============================================================ +- +-//----------------------------------------------------- +-// SDIO CMD Address Mapping +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// I/O bus domain (Host) +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// SDIO register +-//----------------------------------------------------- +-#define SDIO_REG_HCPWM1_8723B 0x025 // HCI Current Power Mode 1 +- +- +-//============================================================================ +-// 8723 Regsiter Bit and Content definition +-//============================================================================ +- +-//2 HSISR +-// interrupt mask which needs to clear +-#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ +- HSISR_SPS_OCP_INT |\ +- HSISR_RON_INT |\ +- HSISR_PDNINT |\ +- HSISR_GPIO9_INT) +- +-//----------------------------------------------------- +-// +-// 0x0100h ~ 0x01FFh MACTOP General Configuration +-// +-//----------------------------------------------------- +- +- +-//----------------------------------------------------- +-// +-// 0x0200h ~ 0x027Fh TXDMA Configuration +-// +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// +-// 0x0280h ~ 0x02FFh RXDMA Configuration +-// +-//----------------------------------------------------- +-#define BIT_USB_RXDMA_AGG_EN BIT(31) +-#define RXDMA_AGG_MODE_EN BIT(1) +- +-#ifdef CONFIG_WOWLAN +-#define RXPKT_RELEASE_POLL BIT(16) +-#define RXDMA_IDLE BIT(17) +-#define RW_RELEASE_EN BIT(18) +-#endif +- +-//----------------------------------------------------- +-// +-// 0x0400h ~ 0x047Fh Protocol Configuration +-// +-//----------------------------------------------------- +- +-//---------------------------------------------------------------------------- +-// 8723B REG_CCK_CHECK (offset 0x454) +-//---------------------------------------------------------------------------- +-#define BIT_BCN_PORT_SEL BIT5 +- +-//----------------------------------------------------- +-// +-// 0x0500h ~ 0x05FFh EDCA Configuration +-// +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// +-// 0x0600h ~ 0x07FFh WMAC Configuration +-// +-//----------------------------------------------------- +-#ifdef CONFIG_RF_GAIN_OFFSET +- +-#ifdef CONFIG_RTL8723B +-#define EEPROM_RF_GAIN_OFFSET 0xC1 +-#endif +- +-#define EEPROM_RF_GAIN_VAL 0x1F6 +-#endif //CONFIG_RF_GAIN_OFFSET +- +- +-//---------------------------------------------------------------------------- +-// 8195 IMR/ISR bits (offset 0xB0, 8bits) +-//---------------------------------------------------------------------------- +-#define IMR_DISABLED_8723B 0 +-// IMR DW0(0x00B0-00B3) Bit 0-31 +-#define IMR_TIMER2_8723B BIT31 // Timeout interrupt 2 +-#define IMR_TIMER1_8723B BIT30 // Timeout interrupt 1 +-#define IMR_PSTIMEOUT_8723B BIT29 // Power Save Time Out Interrupt +-#define IMR_GTINT4_8723B BIT28 // When GTIMER4 expires, this bit is set to 1 +-#define IMR_GTINT3_8723B BIT27 // When GTIMER3 expires, this bit is set to 1 +-#define IMR_TXBCN0ERR_8723B BIT26 // Transmit Beacon0 Error +-#define IMR_TXBCN0OK_8723B BIT25 // Transmit Beacon0 OK +-#define IMR_TSF_BIT32_TOGGLE_8723B BIT24 // TSF Timer BIT32 toggle indication interrupt +-#define IMR_BCNDMAINT0_8723B BIT20 // Beacon DMA Interrupt 0 +-#define IMR_BCNDERR0_8723B BIT16 // Beacon Queue DMA OK0 +-#define IMR_HSISR_IND_ON_INT_8723B BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) +-#define IMR_BCNDMAINT_E_8723B BIT14 // Beacon DMA Interrupt Extension for Win7 +-#define IMR_ATIMEND_8723B BIT12 // CTWidnow End or ATIM Window End +-#define IMR_C2HCMD_8723B BIT10 // CPU to Host Command INT Status, Write 1 clear +-#define IMR_CPWM2_8723B BIT9 // CPU power Mode exchange INT Status, Write 1 clear +-#define IMR_CPWM_8723B BIT8 // CPU power Mode exchange INT Status, Write 1 clear +-#define IMR_HIGHDOK_8723B BIT7 // High Queue DMA OK +-#define IMR_MGNTDOK_8723B BIT6 // Management Queue DMA OK +-#define IMR_BKDOK_8723B BIT5 // AC_BK DMA OK +-#define IMR_BEDOK_8723B BIT4 // AC_BE DMA OK +-#define IMR_VIDOK_8723B BIT3 // AC_VI DMA OK +-#define IMR_VODOK_8723B BIT2 // AC_VO DMA OK +-#define IMR_RDU_8723B BIT1 // Rx Descriptor Unavailable +-#define IMR_ROK_8723B BIT0 // Receive DMA OK +- +-// IMR DW1(0x00B4-00B7) Bit 0-31 +-#define IMR_BCNDMAINT7_8723B BIT27 // Beacon DMA Interrupt 7 +-#define IMR_BCNDMAINT6_8723B BIT26 // Beacon DMA Interrupt 6 +-#define IMR_BCNDMAINT5_8723B BIT25 // Beacon DMA Interrupt 5 +-#define IMR_BCNDMAINT4_8723B BIT24 // Beacon DMA Interrupt 4 +-#define IMR_BCNDMAINT3_8723B BIT23 // Beacon DMA Interrupt 3 +-#define IMR_BCNDMAINT2_8723B BIT22 // Beacon DMA Interrupt 2 +-#define IMR_BCNDMAINT1_8723B BIT21 // Beacon DMA Interrupt 1 +-#define IMR_BCNDOK7_8723B BIT20 // Beacon Queue DMA OK Interrup 7 +-#define IMR_BCNDOK6_8723B BIT19 // Beacon Queue DMA OK Interrup 6 +-#define IMR_BCNDOK5_8723B BIT18 // Beacon Queue DMA OK Interrup 5 +-#define IMR_BCNDOK4_8723B BIT17 // Beacon Queue DMA OK Interrup 4 +-#define IMR_BCNDOK3_8723B BIT16 // Beacon Queue DMA OK Interrup 3 +-#define IMR_BCNDOK2_8723B BIT15 // Beacon Queue DMA OK Interrup 2 +-#define IMR_BCNDOK1_8723B BIT14 // Beacon Queue DMA OK Interrup 1 +-#define IMR_ATIMEND_E_8723B BIT13 // ATIM Window End Extension for Win7 +-#define IMR_TXERR_8723B BIT11 // Tx Error Flag Interrupt Status, write 1 clear. +-#define IMR_RXERR_8723B BIT10 // Rx Error Flag INT Status, Write 1 clear +-#define IMR_TXFOVW_8723B BIT9 // Transmit FIFO Overflow +-#define IMR_RXFOVW_8723B BIT8 // Receive FIFO Overflow +- +-#ifdef CONFIG_PCI_HCI +-//#define IMR_RX_MASK (IMR_ROK_8723B|IMR_RDU_8723B|IMR_RXFOVW_8723B) +-#define IMR_TX_MASK (IMR_VODOK_8723B|IMR_VIDOK_8723B|IMR_BEDOK_8723B|IMR_BKDOK_8723B|IMR_MGNTDOK_8723B|IMR_HIGHDOK_8723B) +- +-#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8723B | IMR_TXBCN0OK_8723B | IMR_TXBCN0ERR_8723B | IMR_BCNDERR0_8723B) +- +-#define RT_AC_INT_MASKS (IMR_VIDOK_8723B | IMR_VODOK_8723B | IMR_BEDOK_8723B|IMR_BKDOK_8723B) +-#endif +- +-//======================================================== +-// General definitions +-//======================================================== +- +-#define MACID_NUM_8723B 128 +-#define CAM_ENTRY_NUM_8723B 64 +- +-#endif /* __RTL8723B_SPEC_H__ */ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8723B_SPEC_H__ ++#define __RTL8723B_SPEC_H__ ++ ++#include ++ ++ ++#define HAL_NAV_UPPER_UNIT_8723B 128 // micro-second ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_RSV_CTRL_8723B 0x001C // 3 Byte ++#define REG_BT_WIFI_ANTENNA_SWITCH_8723B 0x0038 ++#define REG_HSISR_8723B 0x005c ++#define REG_PAD_CTRL1_8723B 0x0064 ++#define REG_AFE_CTRL_4_8723B 0x0078 ++#define REG_HMEBOX_DBG_0_8723B 0x0088 ++#define REG_HMEBOX_DBG_1_8723B 0x008A ++#define REG_HMEBOX_DBG_2_8723B 0x008C ++#define REG_HMEBOX_DBG_3_8723B 0x008E ++#define REG_HIMR0_8723B 0x00B0 ++#define REG_HISR0_8723B 0x00B4 ++#define REG_HIMR1_8723B 0x00B8 ++#define REG_HISR1_8723B 0x00BC ++#define REG_PMC_DBG_CTRL2_8723B 0x00CC ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_C2HEVT_CMD_ID_8723B 0x01A0 ++#define REG_C2HEVT_CMD_LEN_8723B 0x01AE ++#define REG_WOWLAN_WAKE_REASON 0x01C7 ++#define REG_WOWLAN_GTK_DBG1 0x630 ++#define REG_WOWLAN_GTK_DBG2 0x634 ++ ++#define REG_HMEBOX_EXT0_8723B 0x01F0 ++#define REG_HMEBOX_EXT1_8723B 0x01F4 ++#define REG_HMEBOX_EXT2_8723B 0x01F8 ++#define REG_HMEBOX_EXT3_8723B 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_CONTROL_8723B 0x0286 // Control the RX DMA. ++#define REG_RXDMA_MODE_CTRL_8723B 0x0290 ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8723B 0x0300 ++#define REG_INT_MIG_8723B 0x0304 // Interrupt Migration ++#define REG_BCNQ_DESA_8723B 0x0308 // TX Beacon Descriptor Address ++#define REG_HQ_DESA_8723B 0x0310 // TX High Queue Descriptor Address ++#define REG_MGQ_DESA_8723B 0x0318 // TX Manage Queue Descriptor Address ++#define REG_VOQ_DESA_8723B 0x0320 // TX VO Queue Descriptor Address ++#define REG_VIQ_DESA_8723B 0x0328 // TX VI Queue Descriptor Address ++#define REG_BEQ_DESA_8723B 0x0330 // TX BE Queue Descriptor Address ++#define REG_BKQ_DESA_8723B 0x0338 // TX BK Queue Descriptor Address ++#define REG_RX_DESA_8723B 0x0340 // RX Queue Descriptor Address ++#define REG_DBI_WDATA_8723B 0x0348 // DBI Write Data ++#define REG_DBI_RDATA_8723B 0x034C // DBI Read Data ++#define REG_DBI_ADDR_8723B 0x0350 // DBI Address ++#define REG_DBI_FLAG_8723B 0x0352 // DBI Read/Write Flag ++#define REG_MDIO_WDATA_8723B 0x0354 // MDIO for Write PCIE PHY ++#define REG_MDIO_RDATA_8723B 0x0356 // MDIO for Reads PCIE PHY ++#define REG_MDIO_CTL_8723B 0x0358 // MDIO for Control ++#define REG_DBG_SEL_8723B 0x0360 // Debug Selection Register ++#define REG_PCIE_HRPWM_8723B 0x0361 //PCIe RPWM ++#define REG_PCIE_HCPWM_8723B 0x0363 //PCIe CPWM ++#define REG_PCIE_MULTIFET_CTRL_8723B 0x036A //PCIE Multi-Fethc Control ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424 ++#define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425 ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D ++#ifdef CONFIG_WOWLAN ++#define REG_TXPKTBUF_IV_LOW 0x0484 ++#define REG_TXPKTBUF_IV_HIGH 0x0488 ++#endif ++#define REG_AMPDU_BURST_MODE_8723B 0x04BC ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_SECONDARY_CCA_CTRL_8723B 0x0577 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++ ++ ++//============================================================ ++// SDIO Bus Specification ++//============================================================ ++ ++//----------------------------------------------------- ++// SDIO CMD Address Mapping ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// I/O bus domain (Host) ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// SDIO register ++//----------------------------------------------------- ++#define SDIO_REG_HCPWM1_8723B 0x025 // HCI Current Power Mode 1 ++ ++ ++//============================================================================ ++// 8723 Regsiter Bit and Content definition ++//============================================================================ ++ ++//2 HSISR ++// interrupt mask which needs to clear ++#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ ++ HSISR_SPS_OCP_INT |\ ++ HSISR_RON_INT |\ ++ HSISR_PDNINT |\ ++ HSISR_GPIO9_INT) ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#undef IS_E_CUT ++#define IS_E_CUT(version) FALSE ++#undef IS_F_CUT ++#define IS_F_CUT(version) ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? TRUE : FALSE) ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define BIT_USB_RXDMA_AGG_EN BIT(31) ++#define RXDMA_AGG_MODE_EN BIT(1) ++ ++#ifdef CONFIG_WOWLAN ++#define RXPKT_RELEASE_POLL BIT(16) ++#define RXDMA_IDLE BIT(17) ++#define RW_RELEASE_EN BIT(18) ++#endif ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++ ++//---------------------------------------------------------------------------- ++// 8723B REG_CCK_CHECK (offset 0x454) ++//---------------------------------------------------------------------------- ++#define BIT_BCN_PORT_SEL BIT5 ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#ifdef CONFIG_RF_GAIN_OFFSET ++ ++#ifdef CONFIG_RTL8723B ++#define EEPROM_RF_GAIN_OFFSET 0xC1 ++#endif ++ ++#define EEPROM_RF_GAIN_VAL 0x1F6 ++#endif //CONFIG_RF_GAIN_OFFSET ++ ++ ++//---------------------------------------------------------------------------- ++// 8195 IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8723B 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8723B BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8723B BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8723B BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8723B BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8723B BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8723B BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8723B BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8723B BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8723B BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8723B BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8723B BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8723B BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8723B BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8723B BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8723B BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8723B BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8723B BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8723B BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8723B BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8723B BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8723B BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8723B BIT2 // AC_VO DMA OK ++#define IMR_RDU_8723B BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8723B BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_BCNDMAINT7_8723B BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8723B BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8723B BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8723B BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8723B BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8723B BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8723B BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8723B BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8723B BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8723B BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8723B BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8723B BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8723B BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8723B BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8723B BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8723B BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8723B BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8723B BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8723B BIT8 // Receive FIFO Overflow ++ ++#ifdef CONFIG_PCI_HCI ++//#define IMR_RX_MASK (IMR_ROK_8723B|IMR_RDU_8723B|IMR_RXFOVW_8723B) ++#define IMR_TX_MASK (IMR_VODOK_8723B|IMR_VIDOK_8723B|IMR_BEDOK_8723B|IMR_BKDOK_8723B|IMR_MGNTDOK_8723B|IMR_HIGHDOK_8723B) ++ ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8723B | IMR_TXBCN0OK_8723B | IMR_TXBCN0ERR_8723B | IMR_BCNDERR0_8723B) ++ ++#define RT_AC_INT_MASKS (IMR_VIDOK_8723B | IMR_VODOK_8723B | IMR_BEDOK_8723B|IMR_BKDOK_8723B) ++#endif ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_8723B 128 ++#define SEC_CAM_ENT_NUM_8723B 64 ++#define NSS_NUM_8723B 1 ++#define BAND_CAP_8723B (BAND_CAP_2G) ++#define BW_CAP_8723B (BW_CAP_20M | BW_CAP_40M) ++#define PROTO_CAP_8723B (PROTO_CAP_11B|PROTO_CAP_11G|PROTO_CAP_11N) ++ ++#endif /* __RTL8723B_SPEC_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_sreset.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_sreset.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_xmit.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_xmit.h +old mode 100755 +new mode 100644 +index b998233..8caa307 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_xmit.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723b_xmit.h +@@ -1,336 +1,336 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8723B_XMIT_H__ +-#define __RTL8723B_XMIT_H__ +- +- +-#define MAX_TID (15) +- +- +-#ifndef __INC_HAL8723BDESC_H +-#define __INC_HAL8723BDESC_H +- +-#define RX_STATUS_DESC_SIZE_8723B 24 +-#define RX_DRV_INFO_SIZE_UNIT_8723B 8 +- +- +-//DWORD 0 +-#define SET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) +-#define SET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) +-#define SET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) +- +-#define GET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) +-#define GET_RX_STATUS_DESC_CRC32_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) +-#define GET_RX_STATUS_DESC_ICV_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) +-#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) +-#define GET_RX_STATUS_DESC_SECURITY_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) +-#define GET_RX_STATUS_DESC_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) +-#define GET_RX_STATUS_DESC_SHIFT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) +-#define GET_RX_STATUS_DESC_PHY_STATUS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) +-#define GET_RX_STATUS_DESC_SWDEC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) +-#define GET_RX_STATUS_DESC_LAST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) +-#define GET_RX_STATUS_DESC_FIRST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) +-#define GET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) +-#define GET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) +- +-//DWORD 1 +-#define GET_RX_STATUS_DESC_MACID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) +-#define GET_RX_STATUS_DESC_TID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) +-#define GET_RX_STATUS_DESC_AMSDU_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) +-#define GET_RX_STATUS_DESC_RXID_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) +-#define GET_RX_STATUS_DESC_PAGGR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) +-#define GET_RX_STATUS_DESC_A1_FIT_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) +-#define GET_RX_STATUS_DESC_CHKERR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) +-#define GET_RX_STATUS_DESC_IPVER_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) +-#define GET_RX_STATUS_DESC_IS_TCPUDP__8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) +-#define GET_RX_STATUS_DESC_CHK_VLD_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) +-#define GET_RX_STATUS_DESC_PAM_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) +-#define GET_RX_STATUS_DESC_PWR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) +-#define GET_RX_STATUS_DESC_MORE_DATA_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) +-#define GET_RX_STATUS_DESC_MORE_FRAG_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) +-#define GET_RX_STATUS_DESC_TYPE_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) +-#define GET_RX_STATUS_DESC_MC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) +-#define GET_RX_STATUS_DESC_BC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) +- +-//DWORD 2 +-#define GET_RX_STATUS_DESC_SEQ_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) +-#define GET_RX_STATUS_DESC_FRAG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) +-#define GET_RX_STATUS_DESC_RX_IS_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) +-#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) +-#define GET_RX_STATUS_DESC_RPT_SEL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) +- +-//DWORD 3 +-#define GET_RX_STATUS_DESC_RX_RATE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) +-#define GET_RX_STATUS_DESC_HTC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) +-#define GET_RX_STATUS_DESC_EOSP_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) +-#define GET_RX_STATUS_DESC_BSSID_FIT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) +-#ifdef CONFIG_USB_RX_AGGREGATION +-#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) +-#endif +-#define GET_RX_STATUS_DESC_PATTERN_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) +-#define GET_RX_STATUS_DESC_UNICAST_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) +-#define GET_RX_STATUS_DESC_MAGIC_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) +- +-//DWORD 6 +-#define GET_RX_STATUS_DESC_SPLCP_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) +-#define GET_RX_STATUS_DESC_LDPC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) +-#define GET_RX_STATUS_DESC_STBC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) +-#define GET_RX_STATUS_DESC_BW_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) +- +-//DWORD 5 +-#define GET_RX_STATUS_DESC_TSFL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) +- +-#define GET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) +-#define GET_RX_STATUS_DESC_BUFF_ADDR64_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) +- +-#define SET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) +- +- +-// Dword 0 +-#define GET_TX_DESC_OWN_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) +- +-#define SET_TX_DESC_PKT_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) +-#define SET_TX_DESC_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) +-#define SET_TX_DESC_BMC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) +-#define SET_TX_DESC_HTC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) +-#define SET_TX_DESC_LAST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) +-#define SET_TX_DESC_FIRST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) +-#define SET_TX_DESC_LINIP_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) +-#define SET_TX_DESC_NO_ACM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) +-#define SET_TX_DESC_GF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) +-#define SET_TX_DESC_OWN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) +- +-// Dword 1 +-#define SET_TX_DESC_MACID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) +-#define SET_TX_DESC_QUEUE_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) +-#define SET_TX_DESC_RDG_NAV_EXT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) +-#define SET_TX_DESC_LSIG_TXOP_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) +-#define SET_TX_DESC_PIFS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) +-#define SET_TX_DESC_RATE_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) +-#define SET_TX_DESC_EN_DESC_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) +-#define SET_TX_DESC_SEC_TYPE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) +-#define SET_TX_DESC_PKT_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) +- +- +-// Dword 2 +-#define SET_TX_DESC_PAID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) +-#define SET_TX_DESC_CCA_RTS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) +-#define SET_TX_DESC_AGG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) +-#define SET_TX_DESC_RDG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) +-#define SET_TX_DESC_AGG_BREAK_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) +-#define SET_TX_DESC_MORE_FRAG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) +-#define SET_TX_DESC_RAW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) +-#define SET_TX_DESC_SPE_RPT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) +-#define SET_TX_DESC_AMPDU_DENSITY_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) +-#define SET_TX_DESC_BT_INT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) +-#define SET_TX_DESC_GID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) +- +- +-// Dword 3 +-#define SET_TX_DESC_WHEADER_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) +-#define SET_TX_DESC_CHK_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) +-#define SET_TX_DESC_EARLY_MODE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) +-#define SET_TX_DESC_HWSEQ_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) +-#define SET_TX_DESC_USE_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) +-#define SET_TX_DESC_DISABLE_RTS_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) +-#define SET_TX_DESC_DISABLE_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) +-#define SET_TX_DESC_CTS2SELF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) +-#define SET_TX_DESC_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) +-#define SET_TX_DESC_HW_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) +-#define SET_TX_DESC_NAV_USE_HDR_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) +-#define SET_TX_DESC_USE_MAX_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) +-#define SET_TX_DESC_MAX_AGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) +-#define SET_TX_DESC_NDPA_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) +-#define SET_TX_DESC_AMPDU_MAX_TIME_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) +- +-// Dword 4 +-#define SET_TX_DESC_TX_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) +-#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) +-#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) +-#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) +-#define SET_TX_DESC_DATA_RETRY_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) +-#define SET_TX_DESC_RTS_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) +- +- +-// Dword 5 +-#define SET_TX_DESC_DATA_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) +-#define SET_TX_DESC_DATA_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) +-#define SET_TX_DESC_DATA_BW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) +-#define SET_TX_DESC_DATA_LDPC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) +-#define SET_TX_DESC_DATA_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) +-#define SET_TX_DESC_CTROL_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) +-#define SET_TX_DESC_RTS_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) +-#define SET_TX_DESC_RTS_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) +- +- +-// Dword 6 +-#define SET_TX_DESC_SW_DEFINE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) +-#define SET_TX_DESC_MBSSID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) +-#define SET_TX_DESC_ANTSEL_A_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) +-#define SET_TX_DESC_ANTSEL_B_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) +-#define SET_TX_DESC_ANTSEL_C_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) +-#define SET_TX_DESC_ANTSEL_D_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) +- +-// Dword 7 +-#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) +-#define SET_TX_DESC_TX_BUFFER_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) +-#else +-#define SET_TX_DESC_TX_DESC_CHECKSUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) +-#endif +-#define SET_TX_DESC_USB_TXAGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) +-#if(DEV_BUS_TYPE == RT_SDIO_INTERFACE) +-#define SET_TX_DESC_SDIO_TXSEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) +-#endif +- +-// Dword 8 +-#define SET_TX_DESC_HWSEQ_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) +- +-// Dword 9 +-#define SET_TX_DESC_SEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) +- +-// Dword 10 +-#define SET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) +-#define GET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) +- +-// Dword 11 +-#define SET_TX_DESC_NEXT_DESC_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) +- +- +-#define SET_EARLYMODE_PKTNUM_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) +-#define SET_EARLYMODE_LEN0_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) +-#define SET_EARLYMODE_LEN1_1_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) +-#define SET_EARLYMODE_LEN1_2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) +-#define SET_EARLYMODE_LEN2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) +-#define SET_EARLYMODE_LEN3_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) +- +-#endif +-//----------------------------------------------------------- +-// +-// Rate +-// +-//----------------------------------------------------------- +-// CCK Rates, TxHT = 0 +-#define DESC8723B_RATE1M 0x00 +-#define DESC8723B_RATE2M 0x01 +-#define DESC8723B_RATE5_5M 0x02 +-#define DESC8723B_RATE11M 0x03 +- +-// OFDM Rates, TxHT = 0 +-#define DESC8723B_RATE6M 0x04 +-#define DESC8723B_RATE9M 0x05 +-#define DESC8723B_RATE12M 0x06 +-#define DESC8723B_RATE18M 0x07 +-#define DESC8723B_RATE24M 0x08 +-#define DESC8723B_RATE36M 0x09 +-#define DESC8723B_RATE48M 0x0a +-#define DESC8723B_RATE54M 0x0b +- +-// MCS Rates, TxHT = 1 +-#define DESC8723B_RATEMCS0 0x0c +-#define DESC8723B_RATEMCS1 0x0d +-#define DESC8723B_RATEMCS2 0x0e +-#define DESC8723B_RATEMCS3 0x0f +-#define DESC8723B_RATEMCS4 0x10 +-#define DESC8723B_RATEMCS5 0x11 +-#define DESC8723B_RATEMCS6 0x12 +-#define DESC8723B_RATEMCS7 0x13 +-#define DESC8723B_RATEMCS8 0x14 +-#define DESC8723B_RATEMCS9 0x15 +-#define DESC8723B_RATEMCS10 0x16 +-#define DESC8723B_RATEMCS11 0x17 +-#define DESC8723B_RATEMCS12 0x18 +-#define DESC8723B_RATEMCS13 0x19 +-#define DESC8723B_RATEMCS14 0x1a +-#define DESC8723B_RATEMCS15 0x1b +-#define DESC8723B_RATEVHTSS1MCS0 0x2c +-#define DESC8723B_RATEVHTSS1MCS1 0x2d +-#define DESC8723B_RATEVHTSS1MCS2 0x2e +-#define DESC8723B_RATEVHTSS1MCS3 0x2f +-#define DESC8723B_RATEVHTSS1MCS4 0x30 +-#define DESC8723B_RATEVHTSS1MCS5 0x31 +-#define DESC8723B_RATEVHTSS1MCS6 0x32 +-#define DESC8723B_RATEVHTSS1MCS7 0x33 +-#define DESC8723B_RATEVHTSS1MCS8 0x34 +-#define DESC8723B_RATEVHTSS1MCS9 0x35 +-#define DESC8723B_RATEVHTSS2MCS0 0x36 +-#define DESC8723B_RATEVHTSS2MCS1 0x37 +-#define DESC8723B_RATEVHTSS2MCS2 0x38 +-#define DESC8723B_RATEVHTSS2MCS3 0x39 +-#define DESC8723B_RATEVHTSS2MCS4 0x3a +-#define DESC8723B_RATEVHTSS2MCS5 0x3b +-#define DESC8723B_RATEVHTSS2MCS6 0x3c +-#define DESC8723B_RATEVHTSS2MCS7 0x3d +-#define DESC8723B_RATEVHTSS2MCS8 0x3e +-#define DESC8723B_RATEVHTSS2MCS9 0x3f +- +- +-#define RX_HAL_IS_CCK_RATE_8723B(pDesc)\ +- (GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE1M ||\ +- GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE2M ||\ +- GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE5_5M ||\ +- GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE11M) +- +- +-void rtl8723b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); +-void rtl8723b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); +- +-#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +-s32 rtl8723bs_init_xmit_priv(PADAPTER padapter); +-void rtl8723bs_free_xmit_priv(PADAPTER padapter); +-s32 rtl8723bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8723bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-s32 rtl8723bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); +-s32 rtl8723bs_xmit_buf_handler(PADAPTER padapter); +-thread_return rtl8723bs_xmit_thread(thread_context context); +-#define hal_xmit_handler rtl8723bs_xmit_buf_handler +-#endif +- +-#ifdef CONFIG_USB_HCI +-s32 rtl8723bu_xmit_buf_handler(PADAPTER padapter); +-#define hal_xmit_handler rtl8723bu_xmit_buf_handler +- +- +-s32 rtl8723bu_init_xmit_priv(PADAPTER padapter); +-void rtl8723bu_free_xmit_priv(PADAPTER padapter); +-s32 rtl8723bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8723bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-s32 rtl8723bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); +-//s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); +-void rtl8723bu_xmit_tasklet(void *priv); +-s32 rtl8723bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); +-void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); +-#endif +- +-#ifdef CONFIG_PCI_HCI +-s32 rtl8723be_init_xmit_priv(PADAPTER padapter); +-void rtl8723be_free_xmit_priv(PADAPTER padapter); +-struct xmit_buf *rtl8723be_dequeue_xmitbuf(struct rtw_tx_ring *ring); +-void rtl8723be_xmitframe_resume(_adapter *padapter); +-s32 rtl8723be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8723be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-s32 rtl8723be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); +-void rtl8723be_xmit_tasklet(void *priv); +-#endif +- +-u8 BWMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); +-u8 SCMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8723B_XMIT_H__ ++#define __RTL8723B_XMIT_H__ ++ ++ ++#define MAX_TID (15) ++ ++ ++#ifndef __INC_HAL8723BDESC_H ++#define __INC_HAL8723BDESC_H ++ ++#define RX_STATUS_DESC_SIZE_8723B 24 ++#define RX_DRV_INFO_SIZE_UNIT_8723B 8 ++ ++ ++//DWORD 0 ++#define SET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) ++#define SET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) ++ ++#define GET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) ++#define GET_RX_STATUS_DESC_CRC32_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) ++#define GET_RX_STATUS_DESC_ICV_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) ++#define GET_RX_STATUS_DESC_SECURITY_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) ++#define GET_RX_STATUS_DESC_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) ++#define GET_RX_STATUS_DESC_SHIFT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) ++#define GET_RX_STATUS_DESC_PHY_STATUS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) ++#define GET_RX_STATUS_DESC_SWDEC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) ++#define GET_RX_STATUS_DESC_LAST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) ++#define GET_RX_STATUS_DESC_FIRST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) ++#define GET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++#define GET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) ++ ++//DWORD 1 ++#define GET_RX_STATUS_DESC_MACID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) ++#define GET_RX_STATUS_DESC_TID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) ++#define GET_RX_STATUS_DESC_AMSDU_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) ++#define GET_RX_STATUS_DESC_RXID_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) ++#define GET_RX_STATUS_DESC_PAGGR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) ++#define GET_RX_STATUS_DESC_A1_FIT_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) ++#define GET_RX_STATUS_DESC_CHKERR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) ++#define GET_RX_STATUS_DESC_IPVER_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) ++#define GET_RX_STATUS_DESC_IS_TCPUDP__8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) ++#define GET_RX_STATUS_DESC_CHK_VLD_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) ++#define GET_RX_STATUS_DESC_PAM_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) ++#define GET_RX_STATUS_DESC_PWR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) ++#define GET_RX_STATUS_DESC_MORE_DATA_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) ++#define GET_RX_STATUS_DESC_MORE_FRAG_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) ++#define GET_RX_STATUS_DESC_TYPE_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) ++#define GET_RX_STATUS_DESC_MC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) ++#define GET_RX_STATUS_DESC_BC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) ++ ++//DWORD 2 ++#define GET_RX_STATUS_DESC_SEQ_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) ++#define GET_RX_STATUS_DESC_FRAG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) ++#define GET_RX_STATUS_DESC_RX_IS_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) ++#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) ++#define GET_RX_STATUS_DESC_RPT_SEL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) ++ ++//DWORD 3 ++#define GET_RX_STATUS_DESC_RX_RATE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) ++#define GET_RX_STATUS_DESC_HTC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) ++#define GET_RX_STATUS_DESC_EOSP_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) ++#define GET_RX_STATUS_DESC_BSSID_FIT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) ++#ifdef CONFIG_USB_RX_AGGREGATION ++#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) ++#endif ++#define GET_RX_STATUS_DESC_PATTERN_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) ++#define GET_RX_STATUS_DESC_UNICAST_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) ++#define GET_RX_STATUS_DESC_MAGIC_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) ++ ++//DWORD 6 ++#define GET_RX_STATUS_DESC_SPLCP_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) ++#define GET_RX_STATUS_DESC_LDPC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) ++#define GET_RX_STATUS_DESC_STBC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) ++#define GET_RX_STATUS_DESC_BW_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) ++ ++//DWORD 5 ++#define GET_RX_STATUS_DESC_TSFL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++#define GET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) ++#define GET_RX_STATUS_DESC_BUFF_ADDR64_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) ++ ++#define SET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) ++ ++ ++// Dword 0 ++#define GET_TX_DESC_OWN_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) ++ ++#define SET_TX_DESC_PKT_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) ++#define SET_TX_DESC_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) ++#define SET_TX_DESC_BMC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) ++#define SET_TX_DESC_HTC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) ++#define SET_TX_DESC_LAST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) ++#define SET_TX_DESC_FIRST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) ++#define SET_TX_DESC_LINIP_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) ++#define SET_TX_DESC_NO_ACM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) ++#define SET_TX_DESC_GF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) ++#define SET_TX_DESC_OWN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++ ++// Dword 1 ++#define SET_TX_DESC_MACID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) ++#define SET_TX_DESC_QUEUE_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) ++#define SET_TX_DESC_RDG_NAV_EXT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) ++#define SET_TX_DESC_LSIG_TXOP_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) ++#define SET_TX_DESC_PIFS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) ++#define SET_TX_DESC_RATE_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) ++#define SET_TX_DESC_EN_DESC_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) ++#define SET_TX_DESC_SEC_TYPE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++#define SET_TX_DESC_PKT_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) ++ ++ ++// Dword 2 ++#define SET_TX_DESC_PAID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) ++#define SET_TX_DESC_CCA_RTS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) ++#define SET_TX_DESC_AGG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) ++#define SET_TX_DESC_RDG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) ++#define SET_TX_DESC_AGG_BREAK_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) ++#define SET_TX_DESC_MORE_FRAG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) ++#define SET_TX_DESC_RAW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) ++#define SET_TX_DESC_SPE_RPT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) ++#define SET_TX_DESC_AMPDU_DENSITY_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) ++#define SET_TX_DESC_BT_INT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) ++#define SET_TX_DESC_GID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) ++ ++ ++// Dword 3 ++#define SET_TX_DESC_WHEADER_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) ++#define SET_TX_DESC_CHK_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) ++#define SET_TX_DESC_EARLY_MODE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) ++#define SET_TX_DESC_HWSEQ_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) ++#define SET_TX_DESC_USE_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) ++#define SET_TX_DESC_DISABLE_RTS_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) ++#define SET_TX_DESC_DISABLE_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) ++#define SET_TX_DESC_CTS2SELF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) ++#define SET_TX_DESC_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) ++#define SET_TX_DESC_HW_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) ++#define SET_TX_DESC_NAV_USE_HDR_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) ++#define SET_TX_DESC_USE_MAX_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) ++#define SET_TX_DESC_MAX_AGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) ++#define SET_TX_DESC_NDPA_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) ++#define SET_TX_DESC_AMPDU_MAX_TIME_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) ++ ++// Dword 4 ++#define SET_TX_DESC_TX_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) ++#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) ++#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) ++#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) ++#define SET_TX_DESC_DATA_RETRY_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) ++#define SET_TX_DESC_RTS_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) ++ ++ ++// Dword 5 ++#define SET_TX_DESC_DATA_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) ++#define SET_TX_DESC_DATA_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) ++#define SET_TX_DESC_DATA_BW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) ++#define SET_TX_DESC_DATA_LDPC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) ++#define SET_TX_DESC_DATA_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) ++#define SET_TX_DESC_CTROL_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) ++#define SET_TX_DESC_RTS_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) ++#define SET_TX_DESC_RTS_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) ++ ++ ++// Dword 6 ++#define SET_TX_DESC_SW_DEFINE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) ++#define SET_TX_DESC_MBSSID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) ++#define SET_TX_DESC_ANTSEL_A_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) ++#define SET_TX_DESC_ANTSEL_B_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) ++#define SET_TX_DESC_ANTSEL_C_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) ++#define SET_TX_DESC_ANTSEL_D_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) ++ ++// Dword 7 ++#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#define SET_TX_DESC_TX_BUFFER_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#else ++#define SET_TX_DESC_TX_DESC_CHECKSUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#endif ++#define SET_TX_DESC_USB_TXAGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) ++#if(DEV_BUS_TYPE == RT_SDIO_INTERFACE) ++#define SET_TX_DESC_SDIO_TXSEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) ++#endif ++ ++// Dword 8 ++#define SET_TX_DESC_HWSEQ_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++ ++// Dword 9 ++#define SET_TX_DESC_SEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) ++ ++// Dword 10 ++#define SET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) ++#define GET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) ++ ++// Dword 11 ++#define SET_TX_DESC_NEXT_DESC_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) ++ ++ ++#define SET_EARLYMODE_PKTNUM_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) ++#define SET_EARLYMODE_LEN0_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) ++#define SET_EARLYMODE_LEN1_1_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) ++#define SET_EARLYMODE_LEN1_2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) ++#define SET_EARLYMODE_LEN2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) ++#define SET_EARLYMODE_LEN3_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) ++ ++#endif ++//----------------------------------------------------------- ++// ++// Rate ++// ++//----------------------------------------------------------- ++// CCK Rates, TxHT = 0 ++#define DESC8723B_RATE1M 0x00 ++#define DESC8723B_RATE2M 0x01 ++#define DESC8723B_RATE5_5M 0x02 ++#define DESC8723B_RATE11M 0x03 ++ ++// OFDM Rates, TxHT = 0 ++#define DESC8723B_RATE6M 0x04 ++#define DESC8723B_RATE9M 0x05 ++#define DESC8723B_RATE12M 0x06 ++#define DESC8723B_RATE18M 0x07 ++#define DESC8723B_RATE24M 0x08 ++#define DESC8723B_RATE36M 0x09 ++#define DESC8723B_RATE48M 0x0a ++#define DESC8723B_RATE54M 0x0b ++ ++// MCS Rates, TxHT = 1 ++#define DESC8723B_RATEMCS0 0x0c ++#define DESC8723B_RATEMCS1 0x0d ++#define DESC8723B_RATEMCS2 0x0e ++#define DESC8723B_RATEMCS3 0x0f ++#define DESC8723B_RATEMCS4 0x10 ++#define DESC8723B_RATEMCS5 0x11 ++#define DESC8723B_RATEMCS6 0x12 ++#define DESC8723B_RATEMCS7 0x13 ++#define DESC8723B_RATEMCS8 0x14 ++#define DESC8723B_RATEMCS9 0x15 ++#define DESC8723B_RATEMCS10 0x16 ++#define DESC8723B_RATEMCS11 0x17 ++#define DESC8723B_RATEMCS12 0x18 ++#define DESC8723B_RATEMCS13 0x19 ++#define DESC8723B_RATEMCS14 0x1a ++#define DESC8723B_RATEMCS15 0x1b ++#define DESC8723B_RATEVHTSS1MCS0 0x2c ++#define DESC8723B_RATEVHTSS1MCS1 0x2d ++#define DESC8723B_RATEVHTSS1MCS2 0x2e ++#define DESC8723B_RATEVHTSS1MCS3 0x2f ++#define DESC8723B_RATEVHTSS1MCS4 0x30 ++#define DESC8723B_RATEVHTSS1MCS5 0x31 ++#define DESC8723B_RATEVHTSS1MCS6 0x32 ++#define DESC8723B_RATEVHTSS1MCS7 0x33 ++#define DESC8723B_RATEVHTSS1MCS8 0x34 ++#define DESC8723B_RATEVHTSS1MCS9 0x35 ++#define DESC8723B_RATEVHTSS2MCS0 0x36 ++#define DESC8723B_RATEVHTSS2MCS1 0x37 ++#define DESC8723B_RATEVHTSS2MCS2 0x38 ++#define DESC8723B_RATEVHTSS2MCS3 0x39 ++#define DESC8723B_RATEVHTSS2MCS4 0x3a ++#define DESC8723B_RATEVHTSS2MCS5 0x3b ++#define DESC8723B_RATEVHTSS2MCS6 0x3c ++#define DESC8723B_RATEVHTSS2MCS7 0x3d ++#define DESC8723B_RATEVHTSS2MCS8 0x3e ++#define DESC8723B_RATEVHTSS2MCS9 0x3f ++ ++ ++#define RX_HAL_IS_CCK_RATE_8723B(pDesc)\ ++ (GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE1M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE2M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE5_5M ||\ ++ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE11M) ++ ++ ++void rtl8723b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); ++void rtl8723b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++s32 rtl8723bs_init_xmit_priv(PADAPTER padapter); ++void rtl8723bs_free_xmit_priv(PADAPTER padapter); ++s32 rtl8723bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8723bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8723bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8723bs_xmit_buf_handler(PADAPTER padapter); ++thread_return rtl8723bs_xmit_thread(thread_context context); ++#define hal_xmit_handler rtl8723bs_xmit_buf_handler ++#endif ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8723bu_xmit_buf_handler(PADAPTER padapter); ++#define hal_xmit_handler rtl8723bu_xmit_buf_handler ++ ++ ++s32 rtl8723bu_init_xmit_priv(PADAPTER padapter); ++void rtl8723bu_free_xmit_priv(PADAPTER padapter); ++s32 rtl8723bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8723bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8723bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++//s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); ++void rtl8723bu_xmit_tasklet(void *priv); ++s32 rtl8723bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8723be_init_xmit_priv(PADAPTER padapter); ++void rtl8723be_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf *rtl8723be_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++void rtl8723be_xmitframe_resume(_adapter *padapter); ++s32 rtl8723be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8723be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8723be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8723be_xmit_tasklet(void *priv); ++#endif ++ ++u8 BWMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); ++u8 SCMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_cmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_cmd.h +old mode 100755 +new mode 100644 +index 0dfc257..4fe423d +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_cmd.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_cmd.h +@@ -41,6 +41,8 @@ typedef enum _RTL8812_H2C_CMD + H2C_8812_RA_MASK = 0x40, + H2C_8812_TxBF = 0x41, + H2C_8812_RSSI_REPORT = 0x42, ++ H2C_8812_IQ_CALIBRATION = 0x45, ++ H2C_8812_RA_PARA_ADJUST = 0x46, + + H2C_8812_BT_FW_PATCH = 0x6a, + +@@ -55,24 +57,6 @@ typedef enum _RTL8812_H2C_CMD + MAX_8812_H2CCMD + }RTL8812_H2C_CMD; + +- +-typedef enum _RTL8812_C2H_EVT +-{ +- C2H_8812_DBG = 0, +- C2H_8812_LB = 1, +- C2H_8812_TXBF = 2, +- C2H_8812_TX_REPORT = 3, +- C2H_8812_BT_INFO = 9, +- C2H_8812_BT_MP = 11, +- C2H_8812_RA_RPT=12, +- +- C2H_8812_FW_SWCHNL = 0x10, +- C2H_8812_IQK_FINISH = 0x11, +- C2H_8812_MAILBOX_STATUS = 0x15, +- MAX_8812_C2HEVENT +-}RTL8812_C2H_EVT; +- +- + struct cmd_msg_parm { + u8 eid; //element id + u8 sz; // sz +@@ -91,26 +75,21 @@ struct H2C_SS_RFOFF_PARAM{ + + + //_RSVDPAGE_LOC_CMD0 +-#define SET_8812_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) +-#define SET_8812_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) +-#define SET_8812_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) +-#define SET_8812_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) +-#define SET_8812_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) +- +-//_MEDIA_STATUS_RPT_PARM_CMD1 +-#define SET_8812_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) +-#define SET_8812_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +-#define SET_8812_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) +-#define SET_8812_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) ++#define SET_8812_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8812_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_8812_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8812_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8812_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) + + //_SETPWRMODE_PARM +-#define SET_8812_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) ++#define SET_8812_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) + #define SET_8812_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) + #define SET_8812_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) +-#define SET_8812_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) +-#define SET_8812_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) +-#define SET_8812_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) +-#define SET_8812_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+5, 0, 8, __Value) ++#define SET_8812_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8812_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8812_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) ++#define SET_8812_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++#define SET_8812_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) + + #define GET_8812_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) + +@@ -132,47 +111,30 @@ void rtl8812_set_FwPwrMode_cmd(PADAPTER padapter, u8 PSMode); + void rtl8812_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); + u8 rtl8812_set_rssi_cmd(PADAPTER padapter, u8 *param); + void rtl8812_set_raid_cmd(PADAPTER padapter, u32 bitmap, u8* arg); +-void rtl8812_Add_RateATid(PADAPTER padapter, u32 bitmap, u8* arg, u8 rssi_level); ++void rtl8812_Add_RateATid(PADAPTER padapter, u64 rate_bitmap, u8 *arg, u8 rssi_level); + void rtl8812_set_wowlan_cmd(_adapter* padapter, u8 enable); ++s32 FillH2CCmd_8812(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); ++u8 GetTxBufferRsvdPageNum8812(_adapter *padapter, bool wowlan); + ++#ifdef CONFIG_BT_COEXIST ++void rtl8812a_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); ++#endif // CONFIG_BT_COEXIST + #ifdef CONFIG_P2P_PS + void rtl8812_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); + #endif //CONFIG_P2P + + void CheckFwRsvdPageContent(PADAPTER padapter); +-void rtl8812_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt ); ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++void rtl8812_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); ++#endif ++#endif + + #ifdef CONFIG_TSF_RESET_OFFLOAD + int reset_tsf(PADAPTER Adapter, u8 reset_port ); + #endif // CONFIG_TSF_RESET_OFFLOAD + +-#ifdef CONFIG_WOWLAN +-typedef struct _SETWOWLAN_PARM{ +- u8 mode; +- u8 gpio_index; +- u8 gpio_duration; +- u8 second_mode; +- u8 reserve; +-}SETWOWLAN_PARM, *PSETWOWLAN_PARM; +- +-#define FW_WOWLAN_FUN_EN BIT(0) +-#define FW_WOWLAN_PATTERN_MATCH BIT(1) +-#define FW_WOWLAN_MAGIC_PKT BIT(2) +-#define FW_WOWLAN_UNICAST BIT(3) +-#define FW_WOWLAN_ALL_PKT_DROP BIT(4) +-#define FW_WOWLAN_GPIO_ACTIVE BIT(5) +-#define FW_WOWLAN_REKEY_WAKEUP BIT(6) +-#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) +- +-#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) +-#define FW_FW_PARSE_MAGIC_PKT BIT(1) +- +-#define FW_REMOTE_WAKE_CTRL_EN BIT(0) +-#define FW_REALWOWLAN_EN BIT(5) +-void rtl8812a_set_wowlan_cmd(_adapter* padapter, u8 enable); +-void SetFwRelatedForWoWLAN8812(_adapter* padapter, u8 bHostIsGoingtoSleep); +-#endif//CONFIG_WOWLAN +- + //------------------------------------ + // C2H format + //------------------------------------ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_dm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_dm.h +old mode 100755 +new mode 100644 +index 3196973..f697e5c +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_dm.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_dm.h +@@ -29,9 +29,5 @@ void rtl8812_HalDmWatchDog(IN PADAPTER Adapter); + + //void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); + +-#ifdef CONFIG_ANTENNA_DIVERSITY +-void AntDivCompare8812(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); +-u8 AntDivBeforeLink8812(PADAPTER Adapter ); +-#endif + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_hal.h +old mode 100755 +new mode 100644 +index 79718ee..19f221f +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_hal.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_hal.h +@@ -1,347 +1,372 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8812A_HAL_H__ +-#define __RTL8812A_HAL_H__ +- +-//#include "hal_com.h" +-#if 1 +-#include "hal_data.h" +-#else +-#include "../hal/OUTSRC/odm_precomp.h" +-#endif +- +-//include HAL Related header after HAL Related compiling flags +-#include "rtl8812a_spec.h" +-#include "rtl8812a_rf.h" +-#include "rtl8812a_dm.h" +-#include "rtl8812a_recv.h" +-#include "rtl8812a_xmit.h" +-#include "rtl8812a_cmd.h" +-#include "rtl8812a_led.h" +-#include "Hal8812PwrSeq.h" +-#include "Hal8821APwrSeq.h" //for 8821A/8811A +-#include "Hal8812PhyReg.h" +-#include "Hal8812PhyCfg.h" +-#ifdef DBG_CONFIG_ERROR_DETECT +-#include "rtl8812a_sreset.h" +-#endif +- +- +-//--------------------------------------------------------------------- +-// RTL8812AU From header +-//--------------------------------------------------------------------- +- #define RTL8812_FW_IMG "rtl8812a/FW_NIC.bin" +- #define RTL8812_FW_WW_IMG "rtl8812a/FW_WoWLAN.bin" +- #define RTL8812_PHY_REG "rtl8812a/PHY_REG.txt" +- #define RTL8812_PHY_RADIO_A "rtl8812a/RadioA.txt" +- #define RTL8812_PHY_RADIO_B "rtl8812a/RadioB.txt" +- #define RTL8812_TXPWR_TRACK "rtl8812a/TxPowerTrack.txt" +- #define RTL8812_AGC_TAB "rtl8812a/AGC_TAB.txt" +- #define RTL8812_PHY_MACREG "rtl8812a/MAC_REG.txt" +- #define RTL8812_PHY_REG_PG "rtl8812a/PHY_REG_PG.txt" +- #define RTL8812_PHY_REG_MP "rtl8812a/PHY_REG_MP.txt" +- #define RTL8812_TXPWR_LMT "rtl8812a/TXPWR_LMT.txt" +- +-//--------------------------------------------------------------------- +-// RTL8821U From file +-//--------------------------------------------------------------------- +- #define RTL8821_FW_IMG "rtl8821a/FW_NIC.bin" +- #define RTL8821_FW_WW_IMG "rtl8821a/FW_WoWLAN.bin" +- #define RTL8821_PHY_REG "rtl8821a/PHY_REG.txt" +- #define RTL8821_PHY_RADIO_A "rtl8821a/RadioA.txt" +- #define RTL8821_PHY_RADIO_B "rtl8821a/RadioB.txt" +- #define RTL8821_TXPWR_TRACK "rtl8821a/TxPowerTrack.txt" +- #define RTL8821_AGC_TAB "rtl8821a/AGC_TAB.txt" +- #define RTL8821_PHY_MACREG "rtl8821a/MAC_REG.txt" +- #define RTL8821_PHY_REG_PG "rtl8821a/PHY_REG_PG.txt" +- #define RTL8821_PHY_REG_MP "rtl8821a/PHY_REG_MP.txt" +- #define RTL8821_TXPWR_LMT "rtl8821a/TXPWR_LMT.txt" +- +-//--------------------------------------------------------------------- +-// RTL8812 Power Configuration CMDs for PCIe interface +-//--------------------------------------------------------------------- +-#define Rtl8812_NIC_PWR_ON_FLOW rtl8812_power_on_flow +-#define Rtl8812_NIC_RF_OFF_FLOW rtl8812_radio_off_flow +-#define Rtl8812_NIC_DISABLE_FLOW rtl8812_card_disable_flow +-#define Rtl8812_NIC_ENABLE_FLOW rtl8812_card_enable_flow +-#define Rtl8812_NIC_SUSPEND_FLOW rtl8812_suspend_flow +-#define Rtl8812_NIC_RESUME_FLOW rtl8812_resume_flow +-#define Rtl8812_NIC_PDN_FLOW rtl8812_hwpdn_flow +-#define Rtl8812_NIC_LPS_ENTER_FLOW rtl8812_enter_lps_flow +-#define Rtl8812_NIC_LPS_LEAVE_FLOW rtl8812_leave_lps_flow +- +-//--------------------------------------------------------------------- +-// RTL8821 Power Configuration CMDs for PCIe interface +-//--------------------------------------------------------------------- +-#define Rtl8821A_NIC_PWR_ON_FLOW rtl8821A_power_on_flow +-#define Rtl8821A_NIC_RF_OFF_FLOW rtl8821A_radio_off_flow +-#define Rtl8821A_NIC_DISABLE_FLOW rtl8821A_card_disable_flow +-#define Rtl8821A_NIC_ENABLE_FLOW rtl8821A_card_enable_flow +-#define Rtl8821A_NIC_SUSPEND_FLOW rtl8821A_suspend_flow +-#define Rtl8821A_NIC_RESUME_FLOW rtl8821A_resume_flow +-#define Rtl8821A_NIC_PDN_FLOW rtl8821A_hwpdn_flow +-#define Rtl8821A_NIC_LPS_ENTER_FLOW rtl8821A_enter_lps_flow +-#define Rtl8821A_NIC_LPS_LEAVE_FLOW rtl8821A_leave_lps_flow +- +- +-#if 1 // download firmware related data structure +-#define FW_SIZE_8812 0x8000 // Compatible with RTL8723 Maximal RAM code size 24K. modified to 32k, TO compatible with 92d maximal fw size 32k +-#define FW_START_ADDRESS 0x1000 +-#define FW_END_ADDRESS 0x5FFF +- +- +- +-typedef struct _RT_FIRMWARE_8812 { +- FIRMWARE_SOURCE eFWSource; +-#ifdef CONFIG_EMBEDDED_FWIMG +- u8* szFwBuffer; +-#else +- u8 szFwBuffer[FW_SIZE_8812]; +-#endif +- u32 ulFwLength; +-} RT_FIRMWARE_8812, *PRT_FIRMWARE_8812; +- +-// +-// This structure must be cared byte-ordering +-// +-// Added by tynli. 2009.12.04. +-#define IS_FW_HEADER_EXIST_8812(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x9500) +- +-#define IS_FW_HEADER_EXIST_8821(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x2100) +-//===================================================== +-// Firmware Header(8-byte alinment required) +-//===================================================== +-//--- LONG WORD 0 ---- +-#define GET_FIRMWARE_HDR_SIGNATURE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut +-#define GET_FIRMWARE_HDR_CATEGORY_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI +-#define GET_FIRMWARE_HDR_FUNCTION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions +-#define GET_FIRMWARE_HDR_VERSION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version +-#define GET_FIRMWARE_HDR_SUB_VER_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 +-#define GET_FIRMWARE_HDR_RSVD1_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) +- +-//--- LONG WORD 1 ---- +-#define GET_FIRMWARE_HDR_MONTH_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field +-#define GET_FIRMWARE_HDR_DATE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field +-#define GET_FIRMWARE_HDR_HOUR_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field +-#define GET_FIRMWARE_HDR_MINUTE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field +-#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code +-#define GET_FIRMWARE_HDR_RSVD2_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) +- +-//--- LONG WORD 2 ---- +-#define GET_FIRMWARE_HDR_SVN_IDX_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index +-#define GET_FIRMWARE_HDR_RSVD3_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) +- +-//--- LONG WORD 3 ---- +-#define GET_FIRMWARE_HDR_RSVD4_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) +-#define GET_FIRMWARE_HDR_RSVD5_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) +- +-#endif // download firmware related data structure +- +- +-#define DRIVER_EARLY_INT_TIME_8812 0x05 +-#define BCN_DMA_ATIME_INT_TIME_8812 0x02 +- +-//for 8812 +-// TX 128K, RX 16K, Page size 512B for TX, 128B for RX +-#define MAX_RX_DMA_BUFFER_SIZE_8812 0x3E80 //0x3FFF // RX 16K +- +-#define BCNQ_PAGE_NUM_8812 0x07 +- +-//For WoWLan , more reserved page +-//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 +-#ifdef CONFIG_WOWLAN +-#define WOWLAN_PAGE_NUM_8812 0x05 +-#else +-#define WOWLAN_PAGE_NUM_8812 0x00 +-#endif +- +-#define TX_TOTAL_PAGE_NUMBER_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812) +-#define TX_PAGE_BOUNDARY_8812 (TX_TOTAL_PAGE_NUMBER_8812 + 1) +- +-#define TX_PAGE_BOUNDARY_WOWLAN_8812 0xE0 +- +-#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 TX_PAGE_BOUNDARY_8812 +-#define WMM_NORMAL_TX_PAGE_BOUNDARY_8812 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 + 1) +- +-// For Normal Chip Setting +-// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8812 +-#define NORMAL_PAGE_NUM_LPQ_8812 0x10 +-#define NORMAL_PAGE_NUM_HPQ_8812 0x10 +-#define NORMAL_PAGE_NUM_NPQ_8812 0x00 +- +-#define WMM_NORMAL_PAGE_NUM_HPQ_8812 0x30 +-#define WMM_NORMAL_PAGE_NUM_LPQ_8812 0x20 +-#define WMM_NORMAL_PAGE_NUM_NPQ_8812 0x20 +- +- +-// for 8821A +-// TX 64K, RX 16K, Page size 256B for TX, 128B for RX +-#define PAGE_SIZE_TX_8821A 256 +-#define PAGE_SIZE_RX_8821A 128 +- +-#define MAX_RX_DMA_BUFFER_SIZE_8821 0x3E80 // RX 16K +- +-#define BCNQ_PAGE_NUM_8821 0x08 +-#ifdef CONFIG_CONCURRENT_MODE +-#define BCNQ1_PAGE_NUM_8821 0x04 +-#else +-#define BCNQ1_PAGE_NUM_8821 0x00 +-#endif +- +-//For WoWLan , more reserved page +-//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 +-#ifdef CONFIG_WOWLAN +-#define WOWLAN_PAGE_NUM_8821 0x06 +-#else +-#define WOWLAN_PAGE_NUM_8821 0x00 +-#endif +- +-#define TX_TOTAL_PAGE_NUMBER_8821 (0xFF - BCNQ_PAGE_NUM_8821 - BCNQ1_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821) +-#define TX_PAGE_BOUNDARY_8821 (TX_TOTAL_PAGE_NUMBER_8821 + 1) +-//#define TX_PAGE_BOUNDARY_WOWLAN_8821 0xE0 +- +-#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 TX_TOTAL_PAGE_NUMBER_8821 +-#define WMM_NORMAL_TX_PAGE_BOUNDARY_8821 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 + 1) +- +- +-// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER +-#define NORMAL_PAGE_NUM_LPQ_8821 0x08//0x10 +-#define NORMAL_PAGE_NUM_HPQ_8821 0x08//0x10 +-#define NORMAL_PAGE_NUM_NPQ_8821 0x00 +- +-#define WMM_NORMAL_PAGE_NUM_HPQ_8821 0x30 +-#define WMM_NORMAL_PAGE_NUM_LPQ_8821 0x20 +-#define WMM_NORMAL_PAGE_NUM_NPQ_8821 0x20 +- +- +-#define EFUSE_HIDDEN_812AU 0 +-#define EFUSE_HIDDEN_812AU_VS 1 +-#define EFUSE_HIDDEN_812AU_VL 2 +-#define EFUSE_HIDDEN_812AU_VN 3 +- +-#ifdef CONFIG_PCI_HCI +-#define EFUSE_REAL_CONTENT_LEN_JAGUAR 1024 +-#define HWSET_MAX_SIZE_JAGUAR 1024 +-#else +-#define EFUSE_REAL_CONTENT_LEN_JAGUAR 512 +-#define HWSET_MAX_SIZE_JAGUAR 512 +-#endif +- +-#define EFUSE_MAX_BANK_8812A 2 +-#define EFUSE_MAP_LEN_JAGUAR 512 +-#define EFUSE_MAX_SECTION_JAGUAR 64 +-#define EFUSE_MAX_WORD_UNIT_JAGUAR 4 +-#define EFUSE_IC_ID_OFFSET_JAGUAR 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. +-#define AVAILABLE_EFUSE_ADDR_8812(addr) (addr < EFUSE_REAL_CONTENT_LEN_JAGUAR) +-// To prevent out of boundary programming case, leave 1byte and program full section +-// 9bytes + 1byt + 5bytes and pre 1byte. +-// For worst case: +-// | 2byte|----8bytes----|1byte|--7bytes--| //92D +-#define EFUSE_OOB_PROTECT_BYTES_JAGUAR 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. +-#define EFUSE_PROTECT_BYTES_BANK_JAGUAR 16 +-// Added for different registry settings to adjust TxPwr index. added by Roger, 2010.03.09. +-typedef enum _TX_PWR_PERCENTAGE{ +- TX_PWR_PERCENTAGE_0 = 0x01, // 12.5% +- TX_PWR_PERCENTAGE_1 = 0x02, // 25% +- TX_PWR_PERCENTAGE_2 = 0x04, // 50% +- TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power. +-} TX_PWR_PERCENTAGE; +- +-#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) +-#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) +- +-//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) +- +-//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) +- +-#define GetRegTxBBSwing_2G(_Adapter) (_Adapter->registrypriv.TxBBSwing_2G) +-#define GetRegTxBBSwing_5G(_Adapter) (_Adapter->registrypriv.TxBBSwing_5G) +- +-#define GetRegAmplifierType2G(_Adapter) (_Adapter->registrypriv.AmplifierType_2G) +-#define GetRegAmplifierType5G(_Adapter) (_Adapter->registrypriv.AmplifierType_5G) +- +-#define GetRegbENRFEType(_Adapter) (_Adapter->registrypriv.bEn_RFE) +-#define GetRegRFEType(_Adapter) (_Adapter->registrypriv.RFE_Type) +- +-#define GetDefaultAdapter(padapter) padapter +- +-// rtl8812_hal_init.c +-void _8051Reset8812(PADAPTER padapter); +-s32 FirmwareDownload8812(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); +-void InitializeFirmwareVars8812(PADAPTER padapter); +- +-s32 _LLTWrite_8812A(PADAPTER Adapter, u32 address, u32 data); +-s32 InitLLTTable8812A(PADAPTER padapter, u8 txpktbuf_bndy); +-void InitRDGSetting8812A(PADAPTER padapter); +- +-void CheckAutoloadState8812A(PADAPTER padapter); +- +-// EFuse +-u8 GetEEPROMSize8812A(PADAPTER padapter); +-void InitPGData8812A(PADAPTER padapter); +-void Hal_EfuseParseIDCode8812A(PADAPTER padapter, u8 *hwinfo); +-void Hal_ReadPROMVersion8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void Hal_ReadTxPowerInfo8812A(PADAPTER padapter, u8* hwinfo,BOOLEAN AutoLoadFail); +-void Hal_ReadBoardType8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); +-void Hal_ReadThermalMeter_8812A(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); +-void Hal_ReadChannelPlan8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); +-void Hal_EfuseParseXtal_8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); +-void Hal_ReadAntennaDiversity8812A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); +-void Hal_ReadAntennaDiversity8821A(PADAPTER pAdapter, u8* PROMContent, BOOLEAN AutoLoadFail); +-void Hal_ReadAmplifierType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); +-void Hal_ReadPAType_8821A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); +-void Hal_ReadRFEType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); +-void Hal_EfuseParseBTCoexistInfo8812A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); +-void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); +-int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); +-void Hal_ReadRemoteWakeup_8812A(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); +- +-BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); +- +-#ifdef CONFIG_WOWLAN +-void Hal_DetectWoWMode(PADAPTER pAdapter); +-#endif //CONFIG_WOWLAN +- +-void _InitBeaconParameters_8812A(PADAPTER padapter); +-void SetBeaconRelatedRegisters8812A(PADAPTER padapter); +- +-void ReadRFType8812A(PADAPTER padapter); +-void InitDefaultValue8821A(PADAPTER padapter); +- +-void SetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); +-void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); +-u8 SetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); +-u8 GetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); +-s32 c2h_id_filter_ccx_8812a(u8 *buf); +-void rtl8812_set_hal_ops(struct hal_ops *pHalFunc); +- +-// register +-void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); +- +-void rtl8812_start_thread(PADAPTER padapter); +-void rtl8812_stop_thread(PADAPTER padapter); +- +-#ifdef CONFIG_PCI_HCI +-BOOLEAN InterruptRecognized8812AE(PADAPTER Adapter); +-VOID UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); +-#endif +- +-#endif //__RTL8188E_HAL_H__ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8812A_HAL_H__ ++#define __RTL8812A_HAL_H__ ++ ++//#include "hal_com.h" ++#include "hal_data.h" ++ ++//include HAL Related header after HAL Related compiling flags ++#include "rtl8812a_spec.h" ++#include "rtl8812a_rf.h" ++#include "rtl8812a_dm.h" ++#include "rtl8812a_recv.h" ++#include "rtl8812a_xmit.h" ++#include "rtl8812a_cmd.h" ++#include "rtl8812a_led.h" ++#include "Hal8812PwrSeq.h" ++#include "Hal8821APwrSeq.h" //for 8821A/8811A ++#include "Hal8812PhyReg.h" ++#include "Hal8812PhyCfg.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8812a_sreset.h" ++#endif ++ ++ ++//--------------------------------------------------------------------- ++// RTL8812AU From header ++//--------------------------------------------------------------------- ++ #define RTL8812_FW_IMG "rtl8812a/FW_NIC.bin" ++ #define RTL8812_FW_WW_IMG "rtl8812a/FW_WoWLAN.bin" ++ #define RTL8812_PHY_REG "rtl8812a/PHY_REG.txt" ++ #define RTL8812_PHY_RADIO_A "rtl8812a/RadioA.txt" ++ #define RTL8812_PHY_RADIO_B "rtl8812a/RadioB.txt" ++ #define RTL8812_TXPWR_TRACK "rtl8812a/TxPowerTrack.txt" ++ #define RTL8812_AGC_TAB "rtl8812a/AGC_TAB.txt" ++ #define RTL8812_PHY_MACREG "rtl8812a/MAC_REG.txt" ++ #define RTL8812_PHY_REG_PG "rtl8812a/PHY_REG_PG.txt" ++ #define RTL8812_PHY_REG_MP "rtl8812a/PHY_REG_MP.txt" ++ #define RTL8812_TXPWR_LMT "rtl8812a/TXPWR_LMT.txt" ++ #define RTL8812_WIFI_ANT_ISOLATION "rtl8812a/wifi_ant_isolation.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8821U From file ++//--------------------------------------------------------------------- ++ #define RTL8821_FW_IMG "rtl8821a/FW_NIC.bin" ++ #define RTL8821_FW_WW_IMG "rtl8821a/FW_WoWLAN.bin" ++ #define RTL8821_PHY_REG "rtl8821a/PHY_REG.txt" ++ #define RTL8821_PHY_RADIO_A "rtl8821a/RadioA.txt" ++ #define RTL8821_PHY_RADIO_B "rtl8821a/RadioB.txt" ++ #define RTL8821_TXPWR_TRACK "rtl8821a/TxPowerTrack.txt" ++ #define RTL8821_AGC_TAB "rtl8821a/AGC_TAB.txt" ++ #define RTL8821_PHY_MACREG "rtl8821a/MAC_REG.txt" ++ #define RTL8821_PHY_REG_PG "rtl8821a/PHY_REG_PG.txt" ++ #define RTL8821_PHY_REG_MP "rtl8821a/PHY_REG_MP.txt" ++ #define RTL8821_TXPWR_LMT "rtl8821a/TXPWR_LMT.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8812 Power Configuration CMDs for PCIe interface ++//--------------------------------------------------------------------- ++#define Rtl8812_NIC_PWR_ON_FLOW rtl8812_power_on_flow ++#define Rtl8812_NIC_RF_OFF_FLOW rtl8812_radio_off_flow ++#define Rtl8812_NIC_DISABLE_FLOW rtl8812_card_disable_flow ++#define Rtl8812_NIC_ENABLE_FLOW rtl8812_card_enable_flow ++#define Rtl8812_NIC_SUSPEND_FLOW rtl8812_suspend_flow ++#define Rtl8812_NIC_RESUME_FLOW rtl8812_resume_flow ++#define Rtl8812_NIC_PDN_FLOW rtl8812_hwpdn_flow ++#define Rtl8812_NIC_LPS_ENTER_FLOW rtl8812_enter_lps_flow ++#define Rtl8812_NIC_LPS_LEAVE_FLOW rtl8812_leave_lps_flow ++ ++//--------------------------------------------------------------------- ++// RTL8821 Power Configuration CMDs for PCIe interface ++//--------------------------------------------------------------------- ++#define Rtl8821A_NIC_PWR_ON_FLOW rtl8821A_power_on_flow ++#define Rtl8821A_NIC_RF_OFF_FLOW rtl8821A_radio_off_flow ++#define Rtl8821A_NIC_DISABLE_FLOW rtl8821A_card_disable_flow ++#define Rtl8821A_NIC_ENABLE_FLOW rtl8821A_card_enable_flow ++#define Rtl8821A_NIC_SUSPEND_FLOW rtl8821A_suspend_flow ++#define Rtl8821A_NIC_RESUME_FLOW rtl8821A_resume_flow ++#define Rtl8821A_NIC_PDN_FLOW rtl8821A_hwpdn_flow ++#define Rtl8821A_NIC_LPS_ENTER_FLOW rtl8821A_enter_lps_flow ++#define Rtl8821A_NIC_LPS_LEAVE_FLOW rtl8821A_leave_lps_flow ++ ++ ++#if 1 // download firmware related data structure ++#define FW_SIZE_8812 0x8000 // Compatible with RTL8723 Maximal RAM code size 24K. modified to 32k, TO compatible with 92d maximal fw size 32k ++#define FW_START_ADDRESS 0x1000 ++#define FW_END_ADDRESS 0x5FFF ++ ++ ++ ++typedef struct _RT_FIRMWARE_8812 { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[FW_SIZE_8812]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8812, *PRT_FIRMWARE_8812; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++#define IS_FW_HEADER_EXIST_8812(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x9500) ++ ++#define IS_FW_HEADER_EXIST_8821(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x2100) ++//===================================================== ++// Firmware Header(8-byte alinment required) ++//===================================================== ++//--- LONG WORD 0 ---- ++#define GET_FIRMWARE_HDR_SIGNATURE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++#define GET_FIRMWARE_HDR_CATEGORY_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI ++#define GET_FIRMWARE_HDR_FUNCTION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++#define GET_FIRMWARE_HDR_VERSION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version ++#define GET_FIRMWARE_HDR_SUB_VER_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 ++#define GET_FIRMWARE_HDR_RSVD1_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) ++ ++//--- LONG WORD 1 ---- ++#define GET_FIRMWARE_HDR_MONTH_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field ++#define GET_FIRMWARE_HDR_DATE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field ++#define GET_FIRMWARE_HDR_HOUR_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field ++#define GET_FIRMWARE_HDR_MINUTE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field ++#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code ++#define GET_FIRMWARE_HDR_RSVD2_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) ++ ++//--- LONG WORD 2 ---- ++#define GET_FIRMWARE_HDR_SVN_IDX_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index ++#define GET_FIRMWARE_HDR_RSVD3_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) ++ ++//--- LONG WORD 3 ---- ++#define GET_FIRMWARE_HDR_RSVD4_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) ++#define GET_FIRMWARE_HDR_RSVD5_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) ++ ++#endif // download firmware related data structure ++ ++ ++#define DRIVER_EARLY_INT_TIME_8812 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8812 0x02 ++ ++//for 8812 ++// TX 128K, RX 16K, Page size 512B for TX, 128B for RX ++#define MAX_RX_DMA_BUFFER_SIZE_8812 0x3E80 /* RX 16K */ ++ ++#ifdef CONFIG_WOWLAN ++#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ ++#else ++#define RESV_FMWF 0 ++#endif ++ ++#ifdef CONFIG_FW_C2H_DEBUG ++#define RX_DMA_RESERVED_SIZE_8812 0x100 // 256B, reserved for c2h debug message ++#else ++#define RX_DMA_RESERVED_SIZE_8812 0x0 // 0B ++#endif ++#define RX_DMA_BOUNDARY_8812 (MAX_RX_DMA_BUFFER_SIZE_8812 - RX_DMA_RESERVED_SIZE_8812 - 1) ++ ++#define BCNQ_PAGE_NUM_8812 0x07 ++ ++//For WoWLan , more reserved page ++//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8812 0x05 ++#else ++#define WOWLAN_PAGE_NUM_8812 0x00 ++#endif ++ ++ ++#ifdef CONFIG_BEAMFORMER_FW_NDPA ++#define FW_NDPA_PAGE_NUM 0x02 ++#else ++#define FW_NDPA_PAGE_NUM 0x00 ++#endif ++ ++#define TX_TOTAL_PAGE_NUMBER_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812-FW_NDPA_PAGE_NUM) ++#define TX_PAGE_BOUNDARY_8812 (TX_TOTAL_PAGE_NUMBER_8812 + 1) ++ ++#define TX_PAGE_BOUNDARY_WOWLAN_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812 + 1) ++ ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 TX_TOTAL_PAGE_NUMBER_8812 ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_8812 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8812 ++#define NORMAL_PAGE_NUM_LPQ_8812 0x10 ++#define NORMAL_PAGE_NUM_HPQ_8812 0x10 ++#define NORMAL_PAGE_NUM_NPQ_8812 0x00 ++ ++#define WMM_NORMAL_PAGE_NUM_HPQ_8812 0x30 ++#define WMM_NORMAL_PAGE_NUM_LPQ_8812 0x20 ++#define WMM_NORMAL_PAGE_NUM_NPQ_8812 0x20 ++ ++ ++// for 8821A ++// TX 64K, RX 16K, Page size 256B for TX, 128B for RX ++#define PAGE_SIZE_TX_8821A 256 ++#define PAGE_SIZE_RX_8821A 128 ++ ++#define MAX_RX_DMA_BUFFER_SIZE_8821 0x3E80 /* RX 16K */ ++ ++#ifdef CONFIG_FW_C2H_DEBUG ++#define RX_DMA_RESERVED_SIZE_8821 0x100 // 256B, reserved for c2h debug message ++#else ++#define RX_DMA_RESERVED_SIZE_8821 0x0 // 0B ++#endif ++#define RX_DMA_BOUNDARY_8821 (MAX_RX_DMA_BUFFER_SIZE_8821 - RX_DMA_RESERVED_SIZE_8821 - 1) ++ ++#define BCNQ_PAGE_NUM_8821 0x08 ++#ifdef CONFIG_CONCURRENT_MODE ++#define BCNQ1_PAGE_NUM_8821 0x04 ++#else ++#define BCNQ1_PAGE_NUM_8821 0x00 ++#endif ++ ++//For WoWLan , more reserved page ++//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8821 0x06 ++#else ++#define WOWLAN_PAGE_NUM_8821 0x00 ++#endif ++ ++#define TX_TOTAL_PAGE_NUMBER_8821 (0xFF - BCNQ_PAGE_NUM_8821 - BCNQ1_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821) ++#define TX_PAGE_BOUNDARY_8821 (TX_TOTAL_PAGE_NUMBER_8821 + 1) ++//#define TX_PAGE_BOUNDARY_WOWLAN_8821 0xE0 ++ ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 TX_TOTAL_PAGE_NUMBER_8821 ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_8821 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 + 1) ++ ++ ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER ++#define NORMAL_PAGE_NUM_LPQ_8821 0x08//0x10 ++#define NORMAL_PAGE_NUM_HPQ_8821 0x08//0x10 ++#define NORMAL_PAGE_NUM_NPQ_8821 0x00 ++ ++#define WMM_NORMAL_PAGE_NUM_HPQ_8821 0x30 ++#define WMM_NORMAL_PAGE_NUM_LPQ_8821 0x20 ++#define WMM_NORMAL_PAGE_NUM_NPQ_8821 0x20 ++ ++ ++#define EFUSE_HIDDEN_812AU 0 ++#define EFUSE_HIDDEN_812AU_VS 1 ++#define EFUSE_HIDDEN_812AU_VL 2 ++#define EFUSE_HIDDEN_812AU_VN 3 ++ ++#if 0 ++#define EFUSE_REAL_CONTENT_LEN_JAGUAR 1024 ++#define HWSET_MAX_SIZE_JAGUAR 1024 ++#else ++#define EFUSE_REAL_CONTENT_LEN_JAGUAR 512 ++#define HWSET_MAX_SIZE_JAGUAR 512 ++#endif ++ ++#define EFUSE_MAX_BANK_8812A 2 ++#define EFUSE_MAP_LEN_JAGUAR 512 ++#define EFUSE_MAX_SECTION_JAGUAR 64 ++#define EFUSE_MAX_WORD_UNIT_JAGUAR 4 ++#define EFUSE_IC_ID_OFFSET_JAGUAR 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR_8812(addr) (addr < EFUSE_REAL_CONTENT_LEN_JAGUAR) ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 2byte|----8bytes----|1byte|--7bytes--| //92D ++#define EFUSE_OOB_PROTECT_BYTES_JAGUAR 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. ++#define EFUSE_PROTECT_BYTES_BANK_JAGUAR 16 ++// Added for different registry settings to adjust TxPwr index. added by Roger, 2010.03.09. ++typedef enum _TX_PWR_PERCENTAGE{ ++ TX_PWR_PERCENTAGE_0 = 0x01, // 12.5% ++ TX_PWR_PERCENTAGE_1 = 0x02, // 25% ++ TX_PWR_PERCENTAGE_2 = 0x04, // 50% ++ TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power. ++} TX_PWR_PERCENTAGE; ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) ++ ++//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) ++ ++// rtl8812_hal_init.c ++void _8051Reset8812(PADAPTER padapter); ++s32 FirmwareDownload8812(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); ++void InitializeFirmwareVars8812(PADAPTER padapter); ++ ++s32 _LLTWrite_8812A(PADAPTER Adapter, u32 address, u32 data); ++s32 InitLLTTable8812A(PADAPTER padapter, u8 txpktbuf_bndy); ++void InitRDGSetting8812A(PADAPTER padapter); ++ ++void CheckAutoloadState8812A(PADAPTER padapter); ++ ++// EFuse ++u8 GetEEPROMSize8812A(PADAPTER padapter); ++void InitPGData8812A(PADAPTER padapter); ++void Hal_EfuseParseIDCode8812A(PADAPTER padapter, u8 *hwinfo); ++void Hal_ReadPROMVersion8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_ReadTxPowerInfo8812A(PADAPTER padapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadBoardType8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadThermalMeter_8812A(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); ++void Hal_ReadChannelPlan8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void Hal_EfuseParseXtal_8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void Hal_ReadAntennaDiversity8812A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); ++void Hal_ReadAmplifierType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); ++void Hal_ReadPAType_8821A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); ++void Hal_ReadRFEType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); ++void Hal_EfuseParseBTCoexistInfo8812A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); ++void Hal_ReadRemoteWakeup_8812A(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++ ++BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); ++void Hal_EfuseParseKFreeData_8821A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++ ++#ifdef CONFIG_WOWLAN ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++void _InitBeaconParameters_8812A(PADAPTER padapter); ++void SetBeaconRelatedRegisters8812A(PADAPTER padapter); ++ ++void ReadRFType8812A(PADAPTER padapter); ++void InitDefaultValue8821A(PADAPTER padapter); ++ ++void SetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); ++void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); ++u8 SetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++u8 GetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++s32 c2h_id_filter_ccx_8812a(u8 *buf); ++void rtl8812_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8812a(_adapter *adapter); ++void init_hal_spec_8821a(_adapter *adapter); ++ ++// register ++void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); ++ ++void rtl8812_start_thread(PADAPTER padapter); ++void rtl8812_stop_thread(PADAPTER padapter); ++ ++#ifdef CONFIG_PCI_HCI ++BOOLEAN InterruptRecognized8812AE(PADAPTER Adapter); ++VOID UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++#endif ++ ++#ifdef CONFIG_BT_COEXIST ++void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); ++#endif ++ ++VOID ++Hal_PatchwithJaguar_8812( ++ IN PADAPTER Adapter, ++ IN RT_MEDIA_STATUS MediaStatus ++ ); ++ ++#endif //__RTL8188E_HAL_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_led.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_led.h +old mode 100755 +new mode 100644 +index 293e504..5765b55 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_led.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_led.h +@@ -1,41 +1,42 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8812A_LED_H__ +-#define __RTL8812A_LED_H__ +- +- +-//================================================================================ +-// Interface to manipulate LED objects. +-//================================================================================ +-#ifdef CONFIG_USB_HCI +-void rtl8812au_InitSwLeds(PADAPTER padapter); +-void rtl8812au_DeInitSwLeds(PADAPTER padapter); +-#endif +-#ifdef CONFIG_PCI_HCI +-void rtl8812ae_InitSwLeds(PADAPTER padapter); +-void rtl8812ae_DeInitSwLeds(PADAPTER padapter); +-#endif +-#ifdef CONFIG_SDIO_HCI +-void rtl8812s_InitSwLeds(PADAPTER padapter); +-void rtl8812s_DeInitSwLeds(PADAPTER padapter); +-#endif +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8812A_LED_H__ ++#define __RTL8812A_LED_H__ ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8812au_InitSwLeds(PADAPTER padapter); ++void rtl8812au_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8812ae_InitSwLeds(PADAPTER padapter); ++void rtl8812ae_DeInitSwLeds(PADAPTER padapter); ++#endif ++#ifdef CONFIG_SDIO_HCI ++void rtl8821as_hw_led_config(PADAPTER adapter); ++void rtl8821as_InitSwLeds(PADAPTER padapter); ++void rtl8821as_DeInitSwLeds(PADAPTER padapter); ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_recv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_recv.h +old mode 100755 +new mode 100644 +index 1ad222d..7729d42 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_recv.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_recv.h +@@ -1,164 +1,162 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8812A_RECV_H__ +-#define __RTL8812A_RECV_H__ +- +-#if defined(CONFIG_USB_HCI) +- +-#ifndef MAX_RECVBUF_SZ +-#ifdef PLATFORM_OS_CE +-#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k +-#else +- #ifndef CONFIG_MINIMAL_MEMORY_USAGE +- #ifdef CONFIG_PLATFORM_MSTAR +- #define MAX_RECVBUF_SZ (8192) // 8K +- #else +- #define MAX_RECVBUF_SZ (32768) // 32k +- #endif +- //#define MAX_RECVBUF_SZ (24576) // 24k +- //#define MAX_RECVBUF_SZ (20480) //20K +- //#define MAX_RECVBUF_SZ (10240) //10K +- //#define MAX_RECVBUF_SZ (15360) // 15k < 16k +- //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k +- #else +- #define MAX_RECVBUF_SZ (4000) // about 4K +- #endif +-#endif +-#endif //!MAX_RECVBUF_SZ +- +-#elif defined(CONFIG_PCI_HCI) +-//#ifndef CONFIG_MINIMAL_MEMORY_USAGE +-// #define MAX_RECVBUF_SZ (9100) +-//#else +- #define MAX_RECVBUF_SZ (4000) // about 4K +-//#endif +- +- +-#elif defined(CONFIG_SDIO_HCI) +- +-#ifdef CONFIG_SDIO_RX_COPY +-#define MAX_RECVBUF_SZ (10240) +-#else // !CONFIG_SDIO_RX_COPY +-#define MAX_RECVBUF_SZ MAX_RX_DMA_BUFFER_SIZE_8821 +-#endif // !CONFIG_SDIO_RX_COPY +- +-#endif +- +- +-// Rx smooth factor +-#define Rx_Smooth_Factor (20) +- +-//DWORD 0 +-#define SET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) +-#define SET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) +-#define SET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) +- +-#define GET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) +-#define GET_RX_STATUS_DESC_CRC32_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) +-#define GET_RX_STATUS_DESC_ICV_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) +-#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) +-#define GET_RX_STATUS_DESC_SECURITY_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) +-#define GET_RX_STATUS_DESC_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) +-#define GET_RX_STATUS_DESC_SHIFT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) +-#define GET_RX_STATUS_DESC_PHY_STATUS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) +-#define GET_RX_STATUS_DESC_SWDEC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) +-#define GET_RX_STATUS_DESC_LAST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) +-#define GET_RX_STATUS_DESC_FIRST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) +-#define GET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) +-#define GET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) +- +-//DWORD 1 +-#define GET_RX_STATUS_DESC_MACID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) +-#define GET_RX_STATUS_DESC_TID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) +-#define GET_RX_STATUS_DESC_AMSDU_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) +-#define GET_RX_STATUS_DESC_RXID_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) +-#define GET_RX_STATUS_DESC_PAGGR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) +-#define GET_RX_STATUS_DESC_A1_FIT_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) +-#define GET_RX_STATUS_DESC_CHKERR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) +-#define GET_RX_STATUS_DESC_IPVER_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) +-#define GET_RX_STATUS_DESC_IS_TCPUDP__8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) +-#define GET_RX_STATUS_DESC_CHK_VLD_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) +-#define GET_RX_STATUS_DESC_PAM_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) +-#define GET_RX_STATUS_DESC_PWR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) +-#define GET_RX_STATUS_DESC_MORE_DATA_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) +-#define GET_RX_STATUS_DESC_MORE_FRAG_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) +-#define GET_RX_STATUS_DESC_TYPE_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) +-#define GET_RX_STATUS_DESC_MC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) +-#define GET_RX_STATUS_DESC_BC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) +- +-//DWORD 2 +-#define GET_RX_STATUS_DESC_SEQ_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) +-#define GET_RX_STATUS_DESC_FRAG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) +-#define GET_RX_STATUS_DESC_RX_IS_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) +-#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) +-#define GET_RX_STATUS_DESC_RPT_SEL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) +- +-//DWORD 3 +-#define GET_RX_STATUS_DESC_RX_RATE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) +-#define GET_RX_STATUS_DESC_HTC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) +-#define GET_RX_STATUS_DESC_EOSP_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) +-#define GET_RX_STATUS_DESC_BSSID_FIT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) +-#ifdef CONFIG_USB_RX_AGGREGATION +-#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) +-#endif +-#define GET_RX_STATUS_DESC_PATTERN_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) +-#define GET_RX_STATUS_DESC_UNICAST_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) +-#define GET_RX_STATUS_DESC_MAGIC_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) +- +-//DWORD 6 +-#define GET_RX_STATUS_DESC_SPLCP_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) +-#define GET_RX_STATUS_DESC_LDPC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) +-#define GET_RX_STATUS_DESC_STBC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) +-#define GET_RX_STATUS_DESC_BW_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) +- +-//DWORD 5 +-#define GET_RX_STATUS_DESC_TSFL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) +- +-#define GET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) +-#define GET_RX_STATUS_DESC_BUFF_ADDR64_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) +- +-#define SET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) +- +- +-#ifdef CONFIG_SDIO_HCI +-s32 InitRecvPriv8821AS(PADAPTER padapter); +-void FreeRecvPriv8821AS(PADAPTER padapter); +-#endif // CONFIG_SDIO_HCI +- +-#ifdef CONFIG_USB_HCI +-#define INTERRUPT_MSG_FORMAT_LEN 60 +-void rtl8812au_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); +-s32 rtl8812au_init_recv_priv(PADAPTER padapter); +-void rtl8812au_free_recv_priv(PADAPTER padapter); +-void rtl8812au_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); +-void rtl8812au_recv_tasklet(void *priv); +- +-#endif +- +-#ifdef CONFIG_PCI_HCI +-s32 rtl8812ae_init_recv_priv(PADAPTER padapter); +-void rtl8812ae_free_recv_priv(PADAPTER padapter); +-#endif +- +-void rtl8812_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); +-void rtl8812_query_rx_phy_status(union recv_frame *prframe, u8 *pphy_stat); +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8812A_RECV_H__ ++#define __RTL8812A_RECV_H__ ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER ++ #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ ++ #else ++ #define MAX_RECVBUF_SZ (32768) /*32k*/ ++ #endif ++ //#define MAX_RECVBUF_SZ (24576) // 24k ++ //#define MAX_RECVBUF_SZ (20480) //20K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ //#define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 ++ #undef MAX_RECVBUF_SZ ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ #endif //CONFIG_PLATFORM_NOVATEK_NT72668 ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) ++ ++#define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8821 + 1) ++ ++#endif ++ ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++//DWORD 0 ++#define SET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) ++#define SET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) ++ ++#define GET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) ++#define GET_RX_STATUS_DESC_CRC32_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) ++#define GET_RX_STATUS_DESC_ICV_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) ++#define GET_RX_STATUS_DESC_SECURITY_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) ++#define GET_RX_STATUS_DESC_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) ++#define GET_RX_STATUS_DESC_SHIFT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) ++#define GET_RX_STATUS_DESC_PHY_STATUS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) ++#define GET_RX_STATUS_DESC_SWDEC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) ++#define GET_RX_STATUS_DESC_LAST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) ++#define GET_RX_STATUS_DESC_FIRST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) ++#define GET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++#define GET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) ++ ++//DWORD 1 ++#define GET_RX_STATUS_DESC_MACID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) ++#define GET_RX_STATUS_DESC_TID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) ++#define GET_RX_STATUS_DESC_AMSDU_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) ++#define GET_RX_STATUS_DESC_RXID_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) ++#define GET_RX_STATUS_DESC_PAGGR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) ++#define GET_RX_STATUS_DESC_A1_FIT_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) ++#define GET_RX_STATUS_DESC_CHKERR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) ++#define GET_RX_STATUS_DESC_IPVER_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) ++#define GET_RX_STATUS_DESC_IS_TCPUDP__8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) ++#define GET_RX_STATUS_DESC_CHK_VLD_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) ++#define GET_RX_STATUS_DESC_PAM_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) ++#define GET_RX_STATUS_DESC_PWR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) ++#define GET_RX_STATUS_DESC_MORE_DATA_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) ++#define GET_RX_STATUS_DESC_MORE_FRAG_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) ++#define GET_RX_STATUS_DESC_TYPE_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) ++#define GET_RX_STATUS_DESC_MC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) ++#define GET_RX_STATUS_DESC_BC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) ++ ++//DWORD 2 ++#define GET_RX_STATUS_DESC_SEQ_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) ++#define GET_RX_STATUS_DESC_FRAG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) ++#define GET_RX_STATUS_DESC_RX_IS_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) ++#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) ++#define GET_RX_STATUS_DESC_RPT_SEL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) ++ ++//DWORD 3 ++#define GET_RX_STATUS_DESC_RX_RATE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) ++#define GET_RX_STATUS_DESC_HTC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) ++#define GET_RX_STATUS_DESC_EOSP_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) ++#define GET_RX_STATUS_DESC_BSSID_FIT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) ++#ifdef CONFIG_USB_RX_AGGREGATION ++#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) ++#endif ++#define GET_RX_STATUS_DESC_PATTERN_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) ++#define GET_RX_STATUS_DESC_UNICAST_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) ++#define GET_RX_STATUS_DESC_MAGIC_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) ++ ++//DWORD 6 ++#define GET_RX_STATUS_DESC_SPLCP_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) ++#define GET_RX_STATUS_DESC_LDPC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) ++#define GET_RX_STATUS_DESC_STBC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) ++#define GET_RX_STATUS_DESC_BW_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) ++ ++//DWORD 5 ++#define GET_RX_STATUS_DESC_TSFL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++#define GET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) ++#define GET_RX_STATUS_DESC_BUFF_ADDR64_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) ++ ++#define SET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) ++ ++ ++#ifdef CONFIG_SDIO_HCI ++s32 InitRecvPriv8821AS(PADAPTER padapter); ++void FreeRecvPriv8821AS(PADAPTER padapter); ++#endif // CONFIG_SDIO_HCI ++ ++#ifdef CONFIG_USB_HCI ++void rtl8812au_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++s32 rtl8812au_init_recv_priv(PADAPTER padapter); ++void rtl8812au_free_recv_priv(PADAPTER padapter); ++void rtl8812au_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); ++void rtl8812au_recv_tasklet(void *priv); ++ ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8812ae_init_recv_priv(PADAPTER padapter); ++void rtl8812ae_free_recv_priv(PADAPTER padapter); ++#endif ++ ++void rtl8812_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); ++ ++#endif /* __RTL8812A_RECV_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_rf.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_spec.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_spec.h +old mode 100755 +new mode 100644 +index f1e266f..b5877c8 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_spec.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_spec.h +@@ -1,252 +1,276 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- *******************************************************************************/ +-#ifndef __RTL8812A_SPEC_H__ +-#define __RTL8812A_SPEC_H__ +- +-#include +- +- +-//============================================================ +-// 8812 Regsiter offset definition +-//============================================================ +- +-//============================================================ +-// +-//============================================================ +- +-//----------------------------------------------------- +-// +-// 0x0000h ~ 0x00FFh System Configuration +-// +-//----------------------------------------------------- +-#define REG_HSIMR_8812 0x0058 +-#define REG_HSISR_8812 0x005c +-#define REG_GPIO_EXT_CTRL 0x0060 +-#define REG_GPIO_STATUS_8812 0x006C +-#define REG_SDIO_CTRL_8812 0x0070 +-#define REG_OPT_CTRL_8812 0x0074 +-#define REG_RF_B_CTRL_8812 0x0076 +-#define REG_FW_DRV_MSG_8812 0x0088 +-#define REG_HMEBOX_E2_E3_8812 0x008C +-#define REG_HIMR0_8812 0x00B0 +-#define REG_HISR0_8812 0x00B4 +-#define REG_HIMR1_8812 0x00B8 +-#define REG_HISR1_8812 0x00BC +-#define REG_EFUSE_BURN_GNT_8812 0x00CF +-#define REG_SYS_CFG1_8812 0x00FC +- +-//----------------------------------------------------- +-// +-// 0x0100h ~ 0x01FFh MACTOP General Configuration +-// +-//----------------------------------------------------- +-#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) +-#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) +-#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) +- +-#define REG_RSVD3_8812 0x0168 +-#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 +-#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 +-#define REG_C2HEVT_CMD_LEN_88XX 0x01AE +- +-#define REG_HMEBOX_EXT0_8812 0x01F0 +-#define REG_HMEBOX_EXT1_8812 0x01F4 +-#define REG_HMEBOX_EXT2_8812 0x01F8 +-#define REG_HMEBOX_EXT3_8812 0x01FC +- +-//----------------------------------------------------- +-// +-// 0x0200h ~ 0x027Fh TXDMA Configuration +-// +-//----------------------------------------------------- +-#define REG_DWBCN0_CTRL_8812 REG_TDECTRL +-#define REG_DWBCN1_CTRL_8812 0x0228 +- +-//----------------------------------------------------- +-// +-// 0x0280h ~ 0x02FFh RXDMA Configuration +-// +-//----------------------------------------------------- +-#define REG_RXDMA_CONTROL_8812 0x0286 // Control the RX DMA. +-#define REG_RXDMA_PRO_8812 0x0290 +-#define REG_EARLY_MODE_CONTROL_8812 0x02BC +-#define REG_RSVD5_8812 0x02F0 +-#define REG_RSVD6_8812 0x02F4 +-#define REG_RSVD7_8812 0x02F8 +-#define REG_RSVD8_8812 0x02FC +- +- +-//----------------------------------------------------- +-// +-// 0x0300h ~ 0x03FFh PCIe +-// +-//----------------------------------------------------- +-#define REG_DBI_WDATA_8812 0x0348 // DBI Write Data +-#define REG_DBI_RDATA_8812 0x034C // DBI Read Data +-#define REG_DBI_ADDR_8812 0x0350 // DBI Address +-#define REG_DBI_FLAG_8812 0x0352 // DBI Read/Write Flag +-#define REG_MDIO_WDATA_8812 0x0354 // MDIO for Write PCIE PHY +-#define REG_MDIO_RDATA_8812 0x0356 // MDIO for Reads PCIE PHY +-#define REG_MDIO_CTL_8812 0x0358 // MDIO for Control +-#define REG_PCIE_MULTIFET_CTRL_8812 0x036A //PCIE Multi-Fethc Control +- +-//----------------------------------------------------- +-// +-// 0x0400h ~ 0x047Fh Protocol Configuration +-// +-//----------------------------------------------------- +-#define REG_TXBF_CTRL_8812 0x042C +-#define REG_ARFR0_8812 0x0444 +-#define REG_ARFR1_8812 0x044C +-#define REG_CCK_CHECK_8812 0x0454 +-#define REG_AMPDU_MAX_TIME_8812 0x0456 +-#define REG_TXPKTBUF_BCNQ_BDNY1_8812 0x0457 +- +-#define REG_AMPDU_MAX_LENGTH_8812 0x0458 +-#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8812 0x045D +-#define REG_NDPA_OPT_CTRL_8812 0x045F +-#define REG_DATA_SC_8812 0x0483 +-#define REG_ARFR2_8812 0x048C +-#define REG_ARFR3_8812 0x0494 +-#define REG_TXRPT_START_OFFSET 0x04AC +-#define REG_AMPDU_BURST_MODE_8812 0x04BC +-#define REG_HT_SINGLE_AMPDU_8812 0x04C7 +-#define REG_MACID_PKT_DROP0_8812 0x04D0 +- +-//----------------------------------------------------- +-// +-// 0x0500h ~ 0x05FFh EDCA Configuration +-// +-//----------------------------------------------------- +-#define REG_CTWND_8812 0x0572 +-#define REG_SECONDARY_CCA_CTRL_8812 0x0577 +-#define REG_SCH_TXCMD_8812 0x05F8 +- +-//----------------------------------------------------- +-// +-// 0x0600h ~ 0x07FFh WMAC Configuration +-// +-//----------------------------------------------------- +-#define REG_MAC_CR_8812 0x0600 +- +-#define REG_MAC_TX_SM_STATE_8812 0x06B4 +- +-// Power +-#define REG_BFMER0_INFO_8812 0x06E4 +-#define REG_BFMER1_INFO_8812 0x06EC +-#define REG_CSI_RPT_PARAM_BW20_8812 0x06F4 +-#define REG_CSI_RPT_PARAM_BW40_8812 0x06F8 +-#define REG_CSI_RPT_PARAM_BW80_8812 0x06FC +- +-// Hardware Port 2 +-#define REG_BFMEE_SEL_8812 0x0714 +-#define REG_SND_PTCL_CTRL_8812 0x0718 +- +- +-//----------------------------------------------------- +-// +-// Redifine register definition for compatibility +-// +-//----------------------------------------------------- +- +-// TODO: use these definition when using REG_xxx naming rule. +-// NOTE: DO NOT Remove these definition. Use later. +-#define ISR_8812 REG_HISR0_8812 +- +-//---------------------------------------------------------------------------- +-// 8195 IMR/ISR bits (offset 0xB0, 8bits) +-//---------------------------------------------------------------------------- +-#define IMR_DISABLED_8812 0 +-// IMR DW0(0x00B0-00B3) Bit 0-31 +-#define IMR_TIMER2_8812 BIT31 // Timeout interrupt 2 +-#define IMR_TIMER1_8812 BIT30 // Timeout interrupt 1 +-#define IMR_PSTIMEOUT_8812 BIT29 // Power Save Time Out Interrupt +-#define IMR_GTINT4_8812 BIT28 // When GTIMER4 expires, this bit is set to 1 +-#define IMR_GTINT3_8812 BIT27 // When GTIMER3 expires, this bit is set to 1 +-#define IMR_TXBCN0ERR_8812 BIT26 // Transmit Beacon0 Error +-#define IMR_TXBCN0OK_8812 BIT25 // Transmit Beacon0 OK +-#define IMR_TSF_BIT32_TOGGLE_8812 BIT24 // TSF Timer BIT32 toggle indication interrupt +-#define IMR_BCNDMAINT0_8812 BIT20 // Beacon DMA Interrupt 0 +-#define IMR_BCNDERR0_8812 BIT16 // Beacon Queue DMA OK0 +-#define IMR_HSISR_IND_ON_INT_8812 BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) +-#define IMR_BCNDMAINT_E_8812 BIT14 // Beacon DMA Interrupt Extension for Win7 +-#define IMR_ATIMEND_8812 BIT12 // CTWidnow End or ATIM Window End +-#define IMR_C2HCMD_8812 BIT10 // CPU to Host Command INT Status, Write 1 clear +-#define IMR_CPWM2_8812 BIT9 // CPU power Mode exchange INT Status, Write 1 clear +-#define IMR_CPWM_8812 BIT8 // CPU power Mode exchange INT Status, Write 1 clear +-#define IMR_HIGHDOK_8812 BIT7 // High Queue DMA OK +-#define IMR_MGNTDOK_8812 BIT6 // Management Queue DMA OK +-#define IMR_BKDOK_8812 BIT5 // AC_BK DMA OK +-#define IMR_BEDOK_8812 BIT4 // AC_BE DMA OK +-#define IMR_VIDOK_8812 BIT3 // AC_VI DMA OK +-#define IMR_VODOK_8812 BIT2 // AC_VO DMA OK +-#define IMR_RDU_8812 BIT1 // Rx Descriptor Unavailable +-#define IMR_ROK_8812 BIT0 // Receive DMA OK +- +-// IMR DW1(0x00B4-00B7) Bit 0-31 +-#define IMR_BCNDMAINT7_8812 BIT27 // Beacon DMA Interrupt 7 +-#define IMR_BCNDMAINT6_8812 BIT26 // Beacon DMA Interrupt 6 +-#define IMR_BCNDMAINT5_8812 BIT25 // Beacon DMA Interrupt 5 +-#define IMR_BCNDMAINT4_8812 BIT24 // Beacon DMA Interrupt 4 +-#define IMR_BCNDMAINT3_8812 BIT23 // Beacon DMA Interrupt 3 +-#define IMR_BCNDMAINT2_8812 BIT22 // Beacon DMA Interrupt 2 +-#define IMR_BCNDMAINT1_8812 BIT21 // Beacon DMA Interrupt 1 +-#define IMR_BCNDOK7_8812 BIT20 // Beacon Queue DMA OK Interrup 7 +-#define IMR_BCNDOK6_8812 BIT19 // Beacon Queue DMA OK Interrup 6 +-#define IMR_BCNDOK5_8812 BIT18 // Beacon Queue DMA OK Interrup 5 +-#define IMR_BCNDOK4_8812 BIT17 // Beacon Queue DMA OK Interrup 4 +-#define IMR_BCNDOK3_8812 BIT16 // Beacon Queue DMA OK Interrup 3 +-#define IMR_BCNDOK2_8812 BIT15 // Beacon Queue DMA OK Interrup 2 +-#define IMR_BCNDOK1_8812 BIT14 // Beacon Queue DMA OK Interrup 1 +-#define IMR_ATIMEND_E_8812 BIT13 // ATIM Window End Extension for Win7 +-#define IMR_TXERR_8812 BIT11 // Tx Error Flag Interrupt Status, write 1 clear. +-#define IMR_RXERR_8812 BIT10 // Rx Error Flag INT Status, Write 1 clear +-#define IMR_TXFOVW_8812 BIT9 // Transmit FIFO Overflow +-#define IMR_RXFOVW_8812 BIT8 // Receive FIFO Overflow +- +- +-#ifdef CONFIG_PCI_HCI +-//#define IMR_RX_MASK (IMR_ROK_8812|IMR_RDU_8812|IMR_RXFOVW_8812) +-#define IMR_TX_MASK (IMR_VODOK_8812|IMR_VIDOK_8812|IMR_BEDOK_8812|IMR_BKDOK_8812|IMR_MGNTDOK_8812|IMR_HIGHDOK_8812) +- +-#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8812 | IMR_TXBCN0OK_8812 | IMR_TXBCN0ERR_8812 | IMR_BCNDERR0_8812) +- +-#define RT_AC_INT_MASKS (IMR_VIDOK_8812 | IMR_VODOK_8812 | IMR_BEDOK_8812|IMR_BKDOK_8812) +-#endif +- +- +-//============================================================================ +-// Regsiter Bit and Content definition +-//============================================================================ +- +-//2 ACMHWCTRL 0x05C0 +-#define AcmHw_HwEn_8812 BIT(0) +-#define AcmHw_VoqEn_8812 BIT(1) +-#define AcmHw_ViqEn_8812 BIT(2) +-#define AcmHw_BeqEn_8812 BIT(3) +-#define AcmHw_VoqStatus_8812 BIT(5) +-#define AcmHw_ViqStatus_8812 BIT(6) +-#define AcmHw_BeqStatus_8812 BIT(7) +- +-#endif //__RTL8188E_SPEC_H__ +- +-#ifdef CONFIG_RTL8821A +-#include "rtl8821a_spec.h" +-#endif // CONFIG_RTL8821A +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8812A_SPEC_H__ ++#define __RTL8812A_SPEC_H__ ++ ++#include ++ ++ ++//============================================================ ++// 8812 Regsiter offset definition ++//============================================================ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_CLKR_8812A 0x0008 ++#define REG_AFE_PLL_CTRL_8812A 0x0028 ++#define REG_HSIMR_8812 0x0058 ++#define REG_HSISR_8812 0x005c ++#define REG_GPIO_EXT_CTRL 0x0060 ++#define REG_GPIO_STATUS_8812 0x006C ++#define REG_SDIO_CTRL_8812 0x0070 ++#define REG_OPT_CTRL_8812 0x0074 ++#define REG_RF_B_CTRL_8812 0x0076 ++#define REG_FW_DRV_MSG_8812 0x0088 ++#define REG_HMEBOX_E2_E3_8812 0x008C ++#define REG_HIMR0_8812 0x00B0 ++#define REG_HISR0_8812 0x00B4 ++#define REG_HIMR1_8812 0x00B8 ++#define REG_HISR1_8812 0x00BC ++#define REG_EFUSE_BURN_GNT_8812 0x00CF ++#define REG_SYS_CFG1_8812 0x00FC ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_CR_8812A 0x100 ++#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) ++#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) ++#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) ++#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN ++ ++#define REG_RSVD3_8812 0x0168 ++#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 ++#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 ++#define REG_C2HEVT_CMD_LEN_88XX 0x01AE ++ ++#define REG_HMEBOX_EXT0_8812 0x01F0 ++#define REG_HMEBOX_EXT1_8812 0x01F4 ++#define REG_HMEBOX_EXT2_8812 0x01F8 ++#define REG_HMEBOX_EXT3_8812 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_DWBCN0_CTRL_8812 REG_TDECTRL ++#define REG_DWBCN1_CTRL_8812 0x0228 ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_TDECTRL_8812A 0x0208 ++#define REG_RXDMA_CONTROL_8812A 0x0286 /*Control the RX DMA.*/ ++#define REG_RXDMA_PRO_8812 0x0290 ++#define REG_EARLY_MODE_CONTROL_8812 0x02BC ++#define REG_RSVD5_8812 0x02F0 ++#define REG_RSVD6_8812 0x02F4 ++#define REG_RSVD7_8812 0x02F8 ++#define REG_RSVD8_8812 0x02FC ++ ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8812A 0x0300 ++#define REG_DBI_WDATA_8812 0x0348 // DBI Write Data ++#define REG_DBI_RDATA_8812 0x034C // DBI Read Data ++#define REG_DBI_ADDR_8812 0x0350 // DBI Address ++#define REG_DBI_FLAG_8812 0x0352 // DBI Read/Write Flag ++#define REG_MDIO_WDATA_8812 0x0354 // MDIO for Write PCIE PHY ++#define REG_MDIO_RDATA_8812 0x0356 // MDIO for Reads PCIE PHY ++#define REG_MDIO_CTL_8812 0x0358 // MDIO for Control ++#define REG_PCIE_MULTIFET_CTRL_8812 0x036A //PCIE Multi-Fethc Control ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_TXPKT_EMPTY_8812A 0x041A ++#define REG_FWHW_TXQ_CTRL_8812A 0x0420 ++#define REG_TXBF_CTRL_8812A 0x042C ++#define REG_ARFR0_8812 0x0444 ++#define REG_ARFR1_8812 0x044C ++#define REG_CCK_CHECK_8812 0x0454 ++#define REG_AMPDU_MAX_TIME_8812 0x0456 ++#define REG_TXPKTBUF_BCNQ_BDNY1_8812 0x0457 ++ ++#define REG_AMPDU_MAX_LENGTH_8812 0x0458 ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8812 0x045D ++#define REG_NDPA_OPT_CTRL_8812A 0x045F ++#define REG_DATA_SC_8812 0x0483 ++#ifdef CONFIG_WOWLAN ++#define REG_TXPKTBUF_IV_LOW 0x0484 ++#define REG_TXPKTBUF_IV_HIGH 0x0488 ++#endif ++#define REG_ARFR2_8812 0x048C ++#define REG_ARFR3_8812 0x0494 ++#define REG_TXRPT_START_OFFSET 0x04AC ++#define REG_AMPDU_BURST_MODE_8812 0x04BC ++#define REG_HT_SINGLE_AMPDU_8812 0x04C7 ++#define REG_MACID_PKT_DROP0_8812 0x04D0 ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_TXPAUSE_8812A 0x0522 ++#define REG_CTWND_8812 0x0572 ++#define REG_SECONDARY_CCA_CTRL_8812 0x0577 ++#define REG_SCH_TXCMD_8812A 0x05F8 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_MAC_CR_8812 0x0600 ++ ++#define REG_MAC_TX_SM_STATE_8812 0x06B4 ++ ++// Power ++#define REG_BFMER0_INFO_8812A 0x06E4 ++#define REG_BFMER1_INFO_8812A 0x06EC ++#define REG_CSI_RPT_PARAM_BW20_8812A 0x06F4 ++#define REG_CSI_RPT_PARAM_BW40_8812A 0x06F8 ++#define REG_CSI_RPT_PARAM_BW80_8812A 0x06FC ++ ++// Hardware Port 2 ++#define REG_BFMEE_SEL_8812A 0x0714 ++#define REG_SND_PTCL_CTRL_8812A 0x0718 ++ ++ ++//----------------------------------------------------- ++// ++// Redifine register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++#define ISR_8812 REG_HISR0_8812 ++ ++//---------------------------------------------------------------------------- ++// 8195 IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8812 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8812 BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8812 BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8812 BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8812 BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8812 BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8812 BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8812 BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8812 BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8812 BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8812 BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8812 BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8812 BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8812 BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8812 BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8812 BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8812 BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8812 BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8812 BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8812 BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8812 BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8812 BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8812 BIT2 // AC_VO DMA OK ++#define IMR_RDU_8812 BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8812 BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_BCNDMAINT7_8812 BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8812 BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8812 BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8812 BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8812 BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8812 BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8812 BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8812 BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8812 BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8812 BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8812 BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8812 BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8812 BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8812 BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8812 BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8812 BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8812 BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8812 BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8812 BIT8 // Receive FIFO Overflow ++ ++ ++#ifdef CONFIG_PCI_HCI ++//#define IMR_RX_MASK (IMR_ROK_8812|IMR_RDU_8812|IMR_RXFOVW_8812) ++#define IMR_TX_MASK (IMR_VODOK_8812|IMR_VIDOK_8812|IMR_BEDOK_8812|IMR_BKDOK_8812|IMR_MGNTDOK_8812|IMR_HIGHDOK_8812) ++ ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8812 | IMR_TXBCN0OK_8812 | IMR_TXBCN0ERR_8812 | IMR_BCNDERR0_8812) ++ ++#define RT_AC_INT_MASKS (IMR_VIDOK_8812 | IMR_VODOK_8812 | IMR_BEDOK_8812|IMR_BKDOK_8812) ++#endif ++ ++ ++//============================================================================ ++// Regsiter Bit and Content definition ++//============================================================================ ++ ++//2 ACMHWCTRL 0x05C0 ++#define AcmHw_HwEn_8812 BIT(0) ++#define AcmHw_VoqEn_8812 BIT(1) ++#define AcmHw_ViqEn_8812 BIT(2) ++#define AcmHw_BeqEn_8812 BIT(3) ++#define AcmHw_VoqStatus_8812 BIT(5) ++#define AcmHw_ViqStatus_8812 BIT(6) ++#define AcmHw_BeqStatus_8812 BIT(7) ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_8812A 128 ++#define SEC_CAM_ENT_NUM_8812A 64 ++#define NSS_NUM_8812A 2 ++#define BAND_CAP_8812A (BAND_CAP_2G | BAND_CAP_5G) ++#define BW_CAP_8812A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M) ++#define PROTO_CAP_8812A (PROTO_CAP_11B|PROTO_CAP_11G|PROTO_CAP_11N|PROTO_CAP_11AC) ++ ++#endif /* __RTL8812A_SPEC_H__ */ ++ ++#ifdef CONFIG_RTL8821A ++#include "rtl8821a_spec.h" ++#endif /* CONFIG_RTL8821A */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_sreset.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_sreset.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_xmit.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_xmit.h +old mode 100755 +new mode 100644 +index cc87890..0d25436 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_xmit.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8812a_xmit.h +@@ -1,376 +1,365 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8812A_XMIT_H__ +-#define __RTL8812A_XMIT_H__ +- +-// +-// Queue Select Value in TxDesc +-// +-#define QSLT_BK 0x2//0x01 +-#define QSLT_BE 0x0 +-#define QSLT_VI 0x5//0x4 +-#define QSLT_VO 0x7//0x6 +-#define QSLT_BEACON 0x10 +-#define QSLT_HIGH 0x11 +-#define QSLT_MGNT 0x12 +-#define QSLT_CMD 0x13 +- +-//For 88e early mode +-#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) +-#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) +-#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) +-#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) +-#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) +-#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) +-#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) +- +-// +-//defined for TX DESC Operation +-// +- +-#define MAX_TID (15) +- +-//OFFSET 0 +-#define OFFSET_SZ 0 +-#define OFFSET_SHT 16 +-#define BMC BIT(24) +-#define LSG BIT(26) +-#define FSG BIT(27) +-#define OWN BIT(31) +- +- +-//OFFSET 4 +-#define PKT_OFFSET_SZ 0 +-#define QSEL_SHT 8 +-#define RATE_ID_SHT 16 +-#define NAVUSEHDR BIT(20) +-#define SEC_TYPE_SHT 22 +-#define PKT_OFFSET_SHT 26 +- +-//OFFSET 8 +-#define AGG_EN BIT(12) +-#define AGG_BK BIT(16) +-#define AMPDU_DENSITY_SHT 20 +-#define ANTSEL_A BIT(24) +-#define ANTSEL_B BIT(25) +-#define TX_ANT_CCK_SHT 26 +-#define TX_ANTL_SHT 28 +-#define TX_ANT_HT_SHT 30 +- +-//OFFSET 12 +-#define SEQ_SHT 16 +-#define EN_HWSEQ BIT(31) +- +-//OFFSET 16 +-#define QOS BIT(6) +-#define HW_SSN BIT(7) +-#define USERATE BIT(8) +-#define DISDATAFB BIT(10) +-#define CTS_2_SELF BIT(11) +-#define RTS_EN BIT(12) +-#define HW_RTS_EN BIT(13) +-#define DATA_SHORT BIT(24) +-#define PWR_STATUS_SHT 15 +-#define DATA_SC_SHT 20 +-#define DATA_BW BIT(25) +- +-//OFFSET 20 +-#define RTY_LMT_EN BIT(17) +- +-//OFFSET 20 +-#define SGI BIT(6) +-#define USB_TXAGG_NUM_SHT 24 +- +-typedef struct txdescriptor_8812 +-{ +- // Offset 0 +- u32 pktlen:16; +- u32 offset:8; +- u32 bmc:1; +- u32 htc:1; +- u32 ls:1; +- u32 fs:1; +- u32 linip:1; +- u32 noacm:1; +- u32 gf:1; +- u32 own:1; +- +- // Offset 4 +- u32 macid:6; +- u32 rsvd0406:2; +- u32 qsel:5; +- u32 rd_nav_ext:1; +- u32 lsig_txop_en:1; +- u32 pifs:1; +- u32 rate_id:4; +- u32 navusehdr:1; +- u32 en_desc_id:1; +- u32 sectype:2; +- u32 rsvd0424:2; +- u32 pkt_offset:5; // unit: 8 bytes +- u32 rsvd0431:1; +- +- // Offset 8 +- u32 rts_rc:6; +- u32 data_rc:6; +- u32 agg_en:1; +- u32 rd_en:1; +- u32 bar_rty_th:2; +- u32 bk:1; +- u32 morefrag:1; +- u32 raw:1; +- u32 ccx:1; +- u32 ampdu_density:3; +- u32 bt_null:1; +- u32 ant_sel_a:1; +- u32 ant_sel_b:1; +- u32 tx_ant_cck:2; +- u32 tx_antl:2; +- u32 tx_ant_ht:2; +- +- // Offset 12 +- u32 nextheadpage:8; +- u32 tailpage:8; +- u32 seq:12; +- u32 cpu_handle:1; +- u32 tag1:1; +- u32 trigger_int:1; +- u32 hwseq_en:1; +- +- // Offset 16 +- u32 rtsrate:5; +- u32 ap_dcfe:1; +- u32 hwseq_sel:2; +- u32 userate:1; +- u32 disrtsfb:1; +- u32 disdatafb:1; +- u32 cts2self:1; +- u32 rtsen:1; +- u32 hw_rts_en:1; +- u32 port_id:1; +- u32 pwr_status:3; +- u32 wait_dcts:1; +- u32 cts2ap_en:1; +- u32 data_sc:2; +- u32 data_stbc:2; +- u32 data_short:1; +- u32 data_bw:1; +- u32 rts_short:1; +- u32 rts_bw:1; +- u32 rts_sc:2; +- u32 vcs_stbc:2; +- +- // Offset 20 +- u32 datarate:6; +- u32 sgi:1; +- u32 try_rate:1; +- u32 data_ratefb_lmt:5; +- u32 rts_ratefb_lmt:4; +- u32 rty_lmt_en:1; +- u32 data_rt_lmt:6; +- u32 usb_txagg_num:8; +- +- // Offset 24 +- u32 txagg_a:5; +- u32 txagg_b:5; +- u32 use_max_len:1; +- u32 max_agg_num:5; +- u32 mcsg1_max_len:4; +- u32 mcsg2_max_len:4; +- u32 mcsg3_max_len:4; +- u32 mcs7_sgi_max_len:4; +- +- // Offset 28 +- u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) +- u32 mcsg4_max_len:4; +- u32 mcsg5_max_len:4; +- u32 mcsg6_max_len:4; +- u32 mcs15_sgi_max_len:4; +- +- // Offset 32 +- u32 rsvd32; +- +- // Offset 36 +- u32 rsvd36; +-}TXDESC_8812, *PTXDESC_8812; +- +- +-// Dword 0 +-#define GET_TX_DESC_OWN_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) +-#define SET_TX_DESC_PKT_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) +-#define SET_TX_DESC_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) +-#define SET_TX_DESC_BMC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) +-#define SET_TX_DESC_HTC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) +-#define SET_TX_DESC_LAST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) +-#define SET_TX_DESC_FIRST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) +-#define SET_TX_DESC_LINIP_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) +-#define SET_TX_DESC_NO_ACM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) +-#define SET_TX_DESC_GF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) +-#define SET_TX_DESC_OWN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) +- +-// Dword 1 +-#define SET_TX_DESC_MACID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) +-#define SET_TX_DESC_QUEUE_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) +-#define SET_TX_DESC_RDG_NAV_EXT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) +-#define SET_TX_DESC_LSIG_TXOP_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) +-#define SET_TX_DESC_PIFS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) +-#define SET_TX_DESC_RATE_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) +-#define SET_TX_DESC_EN_DESC_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) +-#define SET_TX_DESC_SEC_TYPE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) +-#define SET_TX_DESC_PKT_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) +- +-// Dword 2 +-#define SET_TX_DESC_PAID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) +-#define SET_TX_DESC_CCA_RTS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) +-#define SET_TX_DESC_AGG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) +-#define SET_TX_DESC_RDG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) +-#define SET_TX_DESC_AGG_BREAK_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) +-#define SET_TX_DESC_MORE_FRAG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) +-#define SET_TX_DESC_RAW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) +-#define SET_TX_DESC_SPE_RPT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) +-#define SET_TX_DESC_AMPDU_DENSITY_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) +-#define SET_TX_DESC_BT_INT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) +-#define SET_TX_DESC_GID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) +- +-// Dword 3 +-#define SET_TX_DESC_WHEADER_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) +-#define SET_TX_DESC_CHK_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) +-#define SET_TX_DESC_EARLY_MODE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) +-#define SET_TX_DESC_HWSEQ_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) +-#define SET_TX_DESC_USE_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) +-#define SET_TX_DESC_DISABLE_RTS_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) +-#define SET_TX_DESC_DISABLE_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) +-#define SET_TX_DESC_CTS2SELF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) +-#define SET_TX_DESC_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) +-#define SET_TX_DESC_HW_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) +-#define SET_TX_DESC_NAV_USE_HDR_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) +-#define SET_TX_DESC_USE_MAX_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) +-#define SET_TX_DESC_MAX_AGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) +-#define SET_TX_DESC_NDPA_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) +-#define SET_TX_DESC_AMPDU_MAX_TIME_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) +- +-// Dword 4 +-#define SET_TX_DESC_TX_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) +-#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) +-#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) +-#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) +-#define SET_TX_DESC_DATA_RETRY_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) +-#define SET_TX_DESC_RTS_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) +- +-// Dword 5 +-#define SET_TX_DESC_DATA_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) +-#define SET_TX_DESC_DATA_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) +-#define SET_TX_DESC_DATA_BW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) +-#define SET_TX_DESC_DATA_LDPC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) +-#define SET_TX_DESC_DATA_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) +-#define SET_TX_DESC_CTROL_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) +-#define SET_TX_DESC_RTS_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) +-#define SET_TX_DESC_RTS_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) +-#define SET_TX_DESC_TX_ANT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) +- +-// Dword 6 +-#define SET_TX_DESC_SW_DEFINE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) +-#define SET_TX_DESC_ANTSEL_A_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) +-#define SET_TX_DESC_ANTSEL_B_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) +-#define SET_TX_DESC_ANTSEL_C_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) +-#define SET_TX_DESC_ANTSEL_D_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) +-#define SET_TX_DESC_MBSSID_8821(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) +- +-// Dword 7 +-#define SET_TX_DESC_TX_BUFFER_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) +-#define SET_TX_DESC_TX_DESC_CHECKSUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) +-#define SET_TX_DESC_USB_TXAGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) +-#ifdef CONFIG_SDIO_HCI +-#define SET_TX_DESC_SDIO_TXSEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) +-#endif +- +-// Dword 8 +-#define SET_TX_DESC_HWSEQ_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) +- +-// Dword 9 +-#define SET_TX_DESC_SEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) +- +-// Dword 10 +-#define SET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) +-#define GET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) +- +-// Dword 11 +-#define SET_TX_DESC_NEXT_DESC_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) +- +- +-#define SET_EARLYMODE_PKTNUM_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) +-#define SET_EARLYMODE_LEN0_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) +-#define SET_EARLYMODE_LEN1_1_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) +-#define SET_EARLYMODE_LEN1_2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) +-#define SET_EARLYMODE_LEN2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) +-#define SET_EARLYMODE_LEN3_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) +- +-#ifdef CONFIG_TX_EARLY_MODE +-#define USB_DUMMY_OFFSET 2 +-#else +-#define USB_DUMMY_OFFSET 1 +-#endif +-#define USB_DUMMY_LENGTH (USB_DUMMY_OFFSET * PACKET_OFFSET_SZ) +- +- +-void rtl8812a_cal_txdesc_chksum(u8 *ptxdesc); +-void rtl8812a_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull); +-void rtl8812a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); +-void rtl8812a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); +-void rtl8812a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); +- +-#ifdef CONFIG_USB_HCI +-s32 rtl8812au_init_xmit_priv(PADAPTER padapter); +-void rtl8812au_free_xmit_priv(PADAPTER padapter); +-s32 rtl8812au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8812au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-s32 rtl8812au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); +-s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); +-void rtl8812au_xmit_tasklet(void *priv); +-s32 rtl8812au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); +-#endif +- +-#ifdef CONFIG_PCI_HCI +-s32 rtl8812ae_init_xmit_priv(PADAPTER padapter); +-void rtl8812ae_free_xmit_priv(PADAPTER padapter); +-struct xmit_buf *rtl8812ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); +-void rtl8812ae_xmitframe_resume(_adapter *padapter); +-s32 rtl8812ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8812ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-s32 rtl8812ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); +-void rtl8812ae_xmit_tasklet(void *priv); +-#endif +- +-#ifdef CONFIG_TX_EARLY_MODE +-void UpdateEarlyModeInfo8812(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); +-#endif +- +-void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc); +- +-u8 BWMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); +- +-u8 SCMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); +- +-#endif //__RTL8812_XMIT_H__ +- +-#ifdef CONFIG_RTL8821A +-#include "rtl8821a_xmit.h" +-#endif // CONFIG_RTL8821A +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8812A_XMIT_H__ ++#define __RTL8812A_XMIT_H__ ++ ++ ++//For 88e early mode ++#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) ++#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) ++#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) ++#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) ++#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) ++#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) ++#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) ++ ++// ++//defined for TX DESC Operation ++// ++ ++#define MAX_TID (15) ++ ++//OFFSET 0 ++#define OFFSET_SZ 0 ++#define OFFSET_SHT 16 ++#define BMC BIT(24) ++#define LSG BIT(26) ++#define FSG BIT(27) ++#define OWN BIT(31) ++ ++ ++//OFFSET 4 ++#define PKT_OFFSET_SZ 0 ++#define QSEL_SHT 8 ++#define RATE_ID_SHT 16 ++#define NAVUSEHDR BIT(20) ++#define SEC_TYPE_SHT 22 ++#define PKT_OFFSET_SHT 26 ++ ++//OFFSET 8 ++#define AGG_EN BIT(12) ++#define AGG_BK BIT(16) ++#define AMPDU_DENSITY_SHT 20 ++#define ANTSEL_A BIT(24) ++#define ANTSEL_B BIT(25) ++#define TX_ANT_CCK_SHT 26 ++#define TX_ANTL_SHT 28 ++#define TX_ANT_HT_SHT 30 ++ ++//OFFSET 12 ++#define SEQ_SHT 16 ++#define EN_HWSEQ BIT(31) ++ ++//OFFSET 16 ++#define QOS BIT(6) ++#define HW_SSN BIT(7) ++#define USERATE BIT(8) ++#define DISDATAFB BIT(10) ++#define CTS_2_SELF BIT(11) ++#define RTS_EN BIT(12) ++#define HW_RTS_EN BIT(13) ++#define DATA_SHORT BIT(24) ++#define PWR_STATUS_SHT 15 ++#define DATA_SC_SHT 20 ++#define DATA_BW BIT(25) ++ ++//OFFSET 20 ++#define RTY_LMT_EN BIT(17) ++ ++//OFFSET 20 ++#define SGI BIT(6) ++#define USB_TXAGG_NUM_SHT 24 ++ ++typedef struct txdescriptor_8812 ++{ ++ // Offset 0 ++ u32 pktlen:16; ++ u32 offset:8; ++ u32 bmc:1; ++ u32 htc:1; ++ u32 ls:1; ++ u32 fs:1; ++ u32 linip:1; ++ u32 noacm:1; ++ u32 gf:1; ++ u32 own:1; ++ ++ // Offset 4 ++ u32 macid:6; ++ u32 rsvd0406:2; ++ u32 qsel:5; ++ u32 rd_nav_ext:1; ++ u32 lsig_txop_en:1; ++ u32 pifs:1; ++ u32 rate_id:4; ++ u32 navusehdr:1; ++ u32 en_desc_id:1; ++ u32 sectype:2; ++ u32 rsvd0424:2; ++ u32 pkt_offset:5; // unit: 8 bytes ++ u32 rsvd0431:1; ++ ++ // Offset 8 ++ u32 rts_rc:6; ++ u32 data_rc:6; ++ u32 agg_en:1; ++ u32 rd_en:1; ++ u32 bar_rty_th:2; ++ u32 bk:1; ++ u32 morefrag:1; ++ u32 raw:1; ++ u32 ccx:1; ++ u32 ampdu_density:3; ++ u32 bt_null:1; ++ u32 ant_sel_a:1; ++ u32 ant_sel_b:1; ++ u32 tx_ant_cck:2; ++ u32 tx_antl:2; ++ u32 tx_ant_ht:2; ++ ++ // Offset 12 ++ u32 nextheadpage:8; ++ u32 tailpage:8; ++ u32 seq:12; ++ u32 cpu_handle:1; ++ u32 tag1:1; ++ u32 trigger_int:1; ++ u32 hwseq_en:1; ++ ++ // Offset 16 ++ u32 rtsrate:5; ++ u32 ap_dcfe:1; ++ u32 hwseq_sel:2; ++ u32 userate:1; ++ u32 disrtsfb:1; ++ u32 disdatafb:1; ++ u32 cts2self:1; ++ u32 rtsen:1; ++ u32 hw_rts_en:1; ++ u32 port_id:1; ++ u32 pwr_status:3; ++ u32 wait_dcts:1; ++ u32 cts2ap_en:1; ++ u32 data_sc:2; ++ u32 data_stbc:2; ++ u32 data_short:1; ++ u32 data_bw:1; ++ u32 rts_short:1; ++ u32 rts_bw:1; ++ u32 rts_sc:2; ++ u32 vcs_stbc:2; ++ ++ // Offset 20 ++ u32 datarate:6; ++ u32 sgi:1; ++ u32 try_rate:1; ++ u32 data_ratefb_lmt:5; ++ u32 rts_ratefb_lmt:4; ++ u32 rty_lmt_en:1; ++ u32 data_rt_lmt:6; ++ u32 usb_txagg_num:8; ++ ++ // Offset 24 ++ u32 txagg_a:5; ++ u32 txagg_b:5; ++ u32 use_max_len:1; ++ u32 max_agg_num:5; ++ u32 mcsg1_max_len:4; ++ u32 mcsg2_max_len:4; ++ u32 mcsg3_max_len:4; ++ u32 mcs7_sgi_max_len:4; ++ ++ // Offset 28 ++ u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) ++ u32 mcsg4_max_len:4; ++ u32 mcsg5_max_len:4; ++ u32 mcsg6_max_len:4; ++ u32 mcs15_sgi_max_len:4; ++ ++ // Offset 32 ++ u32 rsvd32; ++ ++ // Offset 36 ++ u32 rsvd36; ++}TXDESC_8812, *PTXDESC_8812; ++ ++ ++// Dword 0 ++#define GET_TX_DESC_OWN_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) ++#define SET_TX_DESC_PKT_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) ++#define SET_TX_DESC_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) ++#define SET_TX_DESC_BMC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) ++#define SET_TX_DESC_HTC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) ++#define SET_TX_DESC_LAST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) ++#define SET_TX_DESC_FIRST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) ++#define SET_TX_DESC_LINIP_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) ++#define SET_TX_DESC_NO_ACM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) ++#define SET_TX_DESC_GF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) ++#define SET_TX_DESC_OWN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++ ++// Dword 1 ++#define SET_TX_DESC_MACID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) ++#define SET_TX_DESC_QUEUE_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) ++#define SET_TX_DESC_RDG_NAV_EXT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) ++#define SET_TX_DESC_LSIG_TXOP_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) ++#define SET_TX_DESC_PIFS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) ++#define SET_TX_DESC_RATE_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) ++#define SET_TX_DESC_EN_DESC_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) ++#define SET_TX_DESC_SEC_TYPE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++#define SET_TX_DESC_PKT_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) ++ ++// Dword 2 ++#define SET_TX_DESC_PAID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) ++#define SET_TX_DESC_CCA_RTS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) ++#define SET_TX_DESC_AGG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) ++#define SET_TX_DESC_RDG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) ++#define SET_TX_DESC_AGG_BREAK_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) ++#define SET_TX_DESC_MORE_FRAG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) ++#define SET_TX_DESC_RAW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) ++#define SET_TX_DESC_SPE_RPT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) ++#define SET_TX_DESC_AMPDU_DENSITY_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) ++#define SET_TX_DESC_BT_INT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) ++#define SET_TX_DESC_GID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) ++ ++// Dword 3 ++#define SET_TX_DESC_WHEADER_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) ++#define SET_TX_DESC_CHK_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) ++#define SET_TX_DESC_EARLY_MODE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) ++#define SET_TX_DESC_HWSEQ_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) ++#define SET_TX_DESC_USE_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) ++#define SET_TX_DESC_DISABLE_RTS_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) ++#define SET_TX_DESC_DISABLE_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) ++#define SET_TX_DESC_CTS2SELF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) ++#define SET_TX_DESC_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) ++#define SET_TX_DESC_HW_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) ++#define SET_TX_DESC_NAV_USE_HDR_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) ++#define SET_TX_DESC_USE_MAX_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) ++#define SET_TX_DESC_MAX_AGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) ++#define SET_TX_DESC_NDPA_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) ++#define SET_TX_DESC_AMPDU_MAX_TIME_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) ++ ++// Dword 4 ++#define SET_TX_DESC_TX_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) ++#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) ++#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) ++#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) ++#define SET_TX_DESC_DATA_RETRY_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) ++#define SET_TX_DESC_RTS_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) ++ ++// Dword 5 ++#define SET_TX_DESC_DATA_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) ++#define SET_TX_DESC_DATA_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) ++#define SET_TX_DESC_DATA_BW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) ++#define SET_TX_DESC_DATA_LDPC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) ++#define SET_TX_DESC_DATA_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) ++#define SET_TX_DESC_CTROL_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) ++#define SET_TX_DESC_RTS_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) ++#define SET_TX_DESC_RTS_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) ++#define SET_TX_DESC_TX_ANT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) ++ ++// Dword 6 ++#define SET_TX_DESC_SW_DEFINE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) ++#define SET_TX_DESC_ANTSEL_A_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) ++#define SET_TX_DESC_ANTSEL_B_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) ++#define SET_TX_DESC_ANTSEL_C_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) ++#define SET_TX_DESC_ANTSEL_D_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) ++#define SET_TX_DESC_MBSSID_8821(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) ++ ++// Dword 7 ++#define SET_TX_DESC_TX_BUFFER_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#define SET_TX_DESC_TX_DESC_CHECKSUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#define SET_TX_DESC_USB_TXAGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) ++#ifdef CONFIG_SDIO_HCI ++#define SET_TX_DESC_SDIO_TXSEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) ++#endif ++ ++// Dword 8 ++#define SET_TX_DESC_HWSEQ_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++ ++// Dword 9 ++#define SET_TX_DESC_SEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) ++ ++// Dword 10 ++#define SET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) ++#define GET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) ++ ++// Dword 11 ++#define SET_TX_DESC_NEXT_DESC_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) ++ ++ ++#define SET_EARLYMODE_PKTNUM_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) ++#define SET_EARLYMODE_LEN0_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) ++#define SET_EARLYMODE_LEN1_1_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) ++#define SET_EARLYMODE_LEN1_2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) ++#define SET_EARLYMODE_LEN2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) ++#define SET_EARLYMODE_LEN3_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) ++ ++#ifdef CONFIG_TX_EARLY_MODE ++#define USB_DUMMY_OFFSET 2 ++#else ++#define USB_DUMMY_OFFSET 1 ++#endif ++#define USB_DUMMY_LENGTH (USB_DUMMY_OFFSET * PACKET_OFFSET_SZ) ++ ++ ++void rtl8812a_cal_txdesc_chksum(u8 *ptxdesc); ++void rtl8812a_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); ++void rtl8812a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); ++void rtl8812a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); ++void rtl8812a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8812au_init_xmit_priv(PADAPTER padapter); ++void rtl8812au_free_xmit_priv(PADAPTER padapter); ++s32 rtl8812au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8812au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8812au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); ++void rtl8812au_xmit_tasklet(void *priv); ++s32 rtl8812au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8812ae_init_xmit_priv(PADAPTER padapter); ++void rtl8812ae_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf *rtl8812ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++void rtl8812ae_xmitframe_resume(_adapter *padapter); ++s32 rtl8812ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8812ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8812ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8812ae_xmit_tasklet(void *priv); ++#endif ++ ++#ifdef CONFIG_TX_EARLY_MODE ++void UpdateEarlyModeInfo8812(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); ++#endif ++ ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc); ++ ++u8 BWMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); ++ ++u8 SCMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); ++ ++#endif //__RTL8812_XMIT_H__ ++ ++#ifdef CONFIG_RTL8821A ++#include "rtl8821a_xmit.h" ++#endif // CONFIG_RTL8821A ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_cmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_cmd.h +new file mode 100644 +index 0000000..d86c97b +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_cmd.h +@@ -0,0 +1,160 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8814A_CMD_H__ ++#define __RTL8814A_CMD_H__ ++#include "hal_com_h2c.h" ++ ++//_RSVDPAGE_LOC_CMD0 ++#define SET_8814A_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8814A_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_8814A_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8814A_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8814A_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++ ++//_SETPWRMODE_PARM ++#define SET_8814A_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8814A_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) ++#define SET_8814A_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) ++#define SET_8814A_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8814A_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_8814A_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) ++#define SET_8814A_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++#define SET_8814A_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) ++ ++#define GET_8814A_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) ++ ++ ++// _WoWLAN PARAM_CMD5 ++#define SET_8814A_H2CCMD_WOWLAN_FUNC_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) ++#define SET_8814A_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) ++#define SET_8814A_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) ++#define SET_8814A_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) ++#define SET_8814A_H2CCMD_WOWLAN_ALL_PKT_DROP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) ++#define SET_8814A_H2CCMD_WOWLAN_GPIO_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) ++#define SET_8814A_H2CCMD_WOWLAN_REKEY_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) ++#define SET_8814A_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) ++#define SET_8814A_H2CCMD_WOWLAN_GPIONUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_8814A_H2CCMD_WOWLAN_GPIO_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++ ++ ++//WLANINFO_PARM ++#define SET_8814A_H2CCMD_WLANINFO_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8814A_H2CCMD_WLANINFO_PARM_CHANNEL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_8814A_H2CCMD_WLANINFO_PARM_BW40MHZ(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++ ++// _REMOTE_WAKEUP_CMD7 ++#define SET_8814A_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) ++#define SET_8814A_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) ++#define SET_8814A_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) ++#define SET_8814A_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) ++ ++ ++// _AP_OFFLOAD_CMD8 ++#define SET_8814A_H2CCMD_AP_OFFLOAD_ON(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_8814A_H2CCMD_AP_OFFLOAD_HIDDEN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_8814A_H2CCMD_AP_OFFLOAD_DENYANY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_8814A_H2CCMD_AP_OFFLOAD_WAKEUP_EVT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++ ++// _PWR_MOD_CMD20 ++#define SET_88E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_88E_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) ++#define SET_88E_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) ++#define SET_88E_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++#define SET_88E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) ++#define SET_88E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) ++ ++/*BCNHWSEQ*/ ++#define SET_8814A_H2CCMD_BCNHWSEQ_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 1, __Value) ++#define SET_8814A_H2CCMD_BCNHWSEQ_BCN_NUMBER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 1, 3, __Value) ++#define SET_8814A_H2CCMD_BCNHWSEQ_HWSEQ(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 6, 1, __Value) ++#define SET_8814A_H2CCMD_BCNHWSEQ_EXHWSEQ(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 7, 1, __Value) ++#define SET_8814A_H2CCMD_BCNHWSEQ_PAGE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++void rtl8814_fw_update_beacon_cmd(_adapter *padapter); ++ ++// TX Beamforming ++#define GET_8814A_C2H_TXBF_ORIGINATE(_Header) LE_BITS_TO_1BYTE(_Header, 0, 8) ++#define GET_8814A_C2H_TXBF_MACID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8) ++ ++ ++ ++/// TX Feedback Content ++#define USEC_UNIT_FOR_8814A_C2H_TX_RPT_QUEUE_TIME 256 ++ ++#define GET_8814A_C2H_TX_RPT_QUEUE_SELECT(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 5) ++#define GET_8814A_C2H_TX_RPT_PKT_BROCAST(_Header) LE_BITS_TO_1BYTE((_Header + 0), 5, 1) ++#define GET_8814A_C2H_TX_RPT_LIFE_TIME_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 6, 1) ++#define GET_8814A_C2H_TX_RPT_RETRY_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 7, 1) ++#define GET_8814A_C2H_TX_RPT_MAC_ID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8) ++#define GET_8814A_C2H_TX_RPT_DATA_RETRY_CNT(_Header) LE_BITS_TO_1BYTE((_Header + 2), 0, 6) ++#define GET_8814A_C2H_TX_RPT_QUEUE_TIME(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) // In unit of 256 microseconds. ++#define GET_8814A_C2H_TX_RPT_FINAL_DATA_RATE(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8) ++ ++ ++//_P2P_PS_OFFLOAD ++#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) ++#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) ++#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_CTWINDOW_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) ++#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_NOA0_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) ++#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_NOA1_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) ++#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) ++#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) ++ ++s32 FillH2CCmd_8814(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); ++void rtl8814_set_raid_cmd(PADAPTER padapter, u64 bitmap, u8* arg); ++void rtl8814_Add_RateATid(PADAPTER padapter, u64 rate_bitmap, u8 *arg, u8 rssi_level); ++void rtl8814_set_wowlan_cmd(_adapter* padapter, u8 enable); ++void rtl8814_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); ++void rtl8814_set_FwPwrMode_cmd(PADAPTER padapter, u8 PSMode); ++u8 GetTxBufferRsvdPageNum8814(_adapter *padapter, bool wowlan); ++u8 rtl8814_set_rssi_cmd(_adapter*padapter, u8 *param); ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++void rtl8814_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); ++#endif ++#endif ++ ++void ++Set_RA_LDPC_8814( ++ struct sta_info *psta, ++ BOOLEAN bLDPC ++ ); ++int rtl8814_iqk_wait(_adapter* padapter, u32 timeout_ms); ++void rtl8814_iqk_done(_adapter* padapter); ++VOID ++C2HPacketHandler_8814( ++ IN PADAPTER Adapter, ++ IN u8 *Buffer, ++ IN u8 Length ++ ); ++#ifdef CONFIG_P2P_PS ++void rtl8814_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); ++#endif //CONFIG_P2P ++ ++s32 ++_C2HContentParsing8814( ++ IN PADAPTER Adapter, ++ IN u8 c2hCmdId, ++ IN u8 c2hCmdLen, ++ IN u8 *tmpBuf ++); ++ ++#endif/* __RTL8814A_CMD_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_dm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_dm.h +new file mode 100644 +index 0000000..f51d93d +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_dm.h +@@ -0,0 +1,29 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8814A_DM_H__ ++#define __RTL8814A_DM_H__ ++ ++void rtl8814_init_dm_priv(IN PADAPTER Adapter); ++void rtl8814_deinit_dm_priv(IN PADAPTER Adapter); ++void rtl8814_InitHalDm(IN PADAPTER Adapter); ++void rtl8814_HalDmWatchDog(IN PADAPTER Adapter); ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_hal.h +new file mode 100644 +index 0000000..400c09e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_hal.h +@@ -0,0 +1,341 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8814A_HAL_H__ ++#define __RTL8814A_HAL_H__ ++ ++//#include "hal_com.h" ++#include "hal_data.h" ++ ++//include HAL Related header after HAL Related compiling flags ++#include "rtl8814a_spec.h" ++#include "rtl8814a_rf.h" ++#include "rtl8814a_dm.h" ++#include "rtl8814a_recv.h" ++#include "rtl8814a_xmit.h" ++#include "rtl8814a_cmd.h" ++#include "rtl8814a_led.h" ++#include "Hal8814PwrSeq.h" ++#include "Hal8814PhyReg.h" ++#include "Hal8814PhyCfg.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8814a_sreset.h" ++#endif //DBG_CONFIG_ERROR_DETECT ++ ++ ++typedef enum _TX_PWR_PERCENTAGE{ ++ TX_PWR_PERCENTAGE_0 = 0x01, // 12.5% ++ TX_PWR_PERCENTAGE_1 = 0x02, // 25% ++ TX_PWR_PERCENTAGE_2 = 0x04, // 50% ++ TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power. ++} TX_PWR_PERCENTAGE; ++ ++ ++enum{ ++ VOLTAGE_V25 = 0x03, ++ LDOE25_SHIFT = 28 , ++ }; ++/* max. iram is 64k , max dmen is 32k. Total = 96k = 0x18000*/ ++#define FW_SIZE 0x18000 ++#define FW_START_ADDRESS 0x1000 ++typedef struct _RT_FIRMWARE_8814 { ++ FIRMWARE_SOURCE eFWSource; ++#ifdef CONFIG_EMBEDDED_FWIMG ++ u8* szFwBuffer; ++#else ++ u8 szFwBuffer[FW_SIZE]; ++#endif ++ u32 ulFwLength; ++} RT_FIRMWARE_8814, *PRT_FIRMWARE_8814; ++ ++#define PAGE_SIZE_TX_8814 PAGE_SIZE_128 ++#define BCNQ_PAGE_NUM_8814 0x08 ++ ++//--------------------------------------------------------------------- ++// RTL8814AU From header ++//--------------------------------------------------------------------- ++ #define RTL8814A_FW_IMG "rtl8814a/FW_NIC.bin" ++ #define RTL8814A_FW_WW_IMG "rtl8814a/FW_WoWLAN.bin" ++ #define RTL8814A_PHY_REG "rtl8814a/PHY_REG.txt" ++ #define RTL8814A_PHY_RADIO_A "rtl8814a/RadioA.txt" ++ #define RTL8814A_PHY_RADIO_B "rtl8814a/RadioB.txt" ++ #define RTL8814A_PHY_RADIO_C "rtl8814a/RadioC.txt" ++ #define RTL8814A_PHY_RADIO_D "rtl8814a/RadioD.txt" ++ #define RTL8814A_TXPWR_TRACK "rtl8814a/TxPowerTrack.txt" ++ #define RTL8814A_AGC_TAB "rtl8814a/AGC_TAB.txt" ++ #define RTL8814A_PHY_MACREG "rtl8814a/MAC_REG.txt" ++ #define RTL8814A_PHY_REG_PG "rtl8814a/PHY_REG_PG.txt" ++ #define RTL8814A_PHY_REG_MP "rtl8814a/PHY_REG_MP.txt" ++ #define RTL8814A_TXPWR_LMT "rtl8814a/TXPWR_LMT.txt" ++ #define RTL8814A_WIFI_ANT_ISOLATION "rtl8814a/wifi_ant_isolation.txt" ++ ++#define Rtl8814A_NIC_PWR_ON_FLOW rtl8814A_power_on_flow ++#define Rtl8814A_NIC_RF_OFF_FLOW rtl8814A_radio_off_flow ++#define Rtl8814A_NIC_DISABLE_FLOW rtl8814A_card_disable_flow ++#define Rtl8814A_NIC_ENABLE_FLOW rtl8814A_card_enable_flow ++#define Rtl8814A_NIC_SUSPEND_FLOW rtl8814A_suspend_flow ++#define Rtl8814A_NIC_RESUME_FLOW rtl8814A_resume_flow ++#define Rtl8814A_NIC_PDN_FLOW rtl8814A_hwpdn_flow ++#define Rtl8814A_NIC_LPS_ENTER_FLOW rtl8814A_enter_lps_flow ++#define Rtl8814A_NIC_LPS_LEAVE_FLOW rtl8814A_leave_lps_flow ++ ++//===================================================== ++// New Firmware Header(8-byte alinment required) ++//===================================================== ++//--- LONG WORD 0 ---- ++#define GET_FIRMWARE_HDR_SIGNATURE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) ++#define GET_FIRMWARE_HDR_CATEGORY_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI ++#define GET_FIRMWARE_HDR_FUNCTION_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++#define GET_FIRMWARE_HDR_VERSION_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version ++#define GET_FIRMWARE_HDR_SUB_VER_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 ++#define GET_FIRMWARE_HDR_SUB_IDX_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) // FW Subversion Index ++ ++//--- LONG WORD 1 ---- ++#define GET_FIRMWARE_HDR_SVN_IDX_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 32)// The SVN entry index ++#define GET_FIRMWARE_HDR_RSVD1_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 32) ++ ++//--- LONG WORD 2 ---- ++#define GET_FIRMWARE_HDR_MONTH_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 8) // Release time Month field ++#define GET_FIRMWARE_HDR_DATE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 8, 8) // Release time Date field ++#define GET_FIRMWARE_HDR_HOUR_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 16, 8)// Release time Hour field ++#define GET_FIRMWARE_HDR_MINUTE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 24, 8)// Release time Minute field ++#define GET_FIRMWARE_HDR_YEAR_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 16)// Release time Year field ++#define GET_FIRMWARE_HDR_FOUNDRY_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 16, 8)// Release time Foundry field ++#define GET_FIRMWARE_HDR_RSVD2_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 24, 8) ++ ++//--- LONG WORD 3 ---- ++#define GET_FIRMWARE_HDR_MEM_UASGE_DL_FROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 1) ++#define GET_FIRMWARE_HDR_MEM_UASGE_BOOT_FROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 1, 1) ++#define GET_FIRMWARE_HDR_MEM_UASGE_BOOT_LOADER_3081(__FwHdr)LE_BITS_TO_4BYTE(__FwHdr+24, 2, 1) ++#define GET_FIRMWARE_HDR_MEM_UASGE_IRAM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 3, 1) ++#define GET_FIRMWARE_HDR_MEM_UASGE_ERAM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 4, 1) ++#define GET_FIRMWARE_HDR_MEM_UASGE_RSVD4_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 5, 3) ++#define GET_FIRMWARE_HDR_RSVD3_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 8, 8) ++#define GET_FIRMWARE_HDR_BOOT_LOADER_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 16, 16) ++#define GET_FIRMWARE_HDR_RSVD5_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) ++ ++//--- LONG WORD 4 ---- ++#define GET_FIRMWARE_HDR_TOTAL_DMEM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 0, 32) ++#define GET_FIRMWARE_HDR_FW_CFG_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 0, 16) ++#define GET_FIRMWARE_HDR_FW_ATTR_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 16, 16) ++ ++//--- LONG WORD 5 ---- ++#define GET_FIRMWARE_HDR_IROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+40, 0, 32) ++#define GET_FIRMWARE_HDR_EROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+44, 0, 32) ++ ++//--- LONG WORD 6 ---- ++#define GET_FIRMWARE_HDR_IRAM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+48, 0, 32) ++#define GET_FIRMWARE_HDR_ERAM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+52, 0, 32) ++ ++//--- LONG WORD 7 ---- ++#define GET_FIRMWARE_HDR_RSVD6_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+56, 0, 32) ++#define GET_FIRMWARE_HDR_RSVD7_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+60, 0, 32) ++ ++ ++ ++// ++// 2013/08/16 MH MOve from SDIO.h for common use. ++// ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) ++#define TRX_SHARE_MODE_8814A 0 //TRX Buffer Share Index ++#define BASIC_RXFF_SIZE_8814A 24576//Basic RXFF Size is 24K = 24*1024 Unit: Byte ++#define TRX_SHARE_BUFF_UNIT_8814A 65536//TRX Share Buffer unit Size 64K = 64*1024 Unit: Byte ++#define TRX_SHARE_BUFF_UNIT_PAGE_8814A TRX_SHARE_BUFF_UNIT_8814A/PAGE_SIZE_8814A//512 Pages ++ ++//Origin: ++#define HPQ_PGNUM_8814A 0x20 //High Queue ++#define LPQ_PGNUM_8814A 0x20 //Low Queue ++#define NPQ_PGNUM_8814A 0x20 //Normal Queue ++#define EPQ_PGNUM_8814A 0x20 //Extra Queue ++ ++#else // #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) ++ ++#define HPQ_PGNUM_8814A 20 ++#define NPQ_PGNUM_8814A 20 ++#define LPQ_PGNUM_8814A 20 //1972 ++#define EPQ_PGNUM_8814A 20 ++#define BCQ_PGNUM_8814A 32 ++ ++#endif //#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) ++ ++#ifdef CONFIG_WOWLAN ++#define WOWLAN_PAGE_NUM_8814 0x00 ++#else ++#define WOWLAN_PAGE_NUM_8814 0x00 ++#endif ++ ++#define PAGE_SIZE_8814A 128//TXFF Page Size, Unit: Byte ++#define MAX_RX_DMA_BUFFER_SIZE_8814A 0x5C00 //BASIC_RXFF_SIZE_8814A+TRX_SHARE_MODE_8814A*TRX_SHARE_BUFF_UNIT_8814A //Basic RXFF Size + ShareBuffer Size ++#define TX_PAGE_BOUNDARY_8814A TXPKT_PGNUM_8814A // Need to enlarge boundary, by KaiYuan ++#define TX_PAGE_BOUNDARY_WOWLAN_8814A TXPKT_PGNUM_8814A //TODO: 20130415 KaiYuan Check this value later ++ ++ ++#define TOTAL_PGNUM_8814A 2048 ++#define TXPKT_PGNUM_8814A (2048 - BCNQ_PAGE_NUM_8814-WOWLAN_PAGE_NUM_8814) ++#define PUB_PGNUM_8814A (TXPKT_PGNUM_8814A-HPQ_PGNUM_8814A-NPQ_PGNUM_8814A-LPQ_PGNUM_8814A-EPQ_PGNUM_8814A) ++ ++//Note: For WMM Normal Chip Setting ,modify later ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8814A TX_PAGE_BOUNDARY_8814A ++#define WMM_NORMAL_TX_PAGE_BOUNDARY_8814A (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8814A + 1) ++ ++#define DRIVER_EARLY_INT_TIME_8814 0x05 ++#define BCN_DMA_ATIME_INT_TIME_8814 0x02 ++ ++ ++#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes ++ ++#define EFUSE_MAX_SECTION_JAGUAR 64 ++ ++#define HWSET_MAX_SIZE_8814A 512 ++ ++#define EFUSE_REAL_CONTENT_LEN_8814A 1024 ++#define EFUSE_MAX_BANK_8814A 2 ++ ++#define EFUSE_MAP_LEN_8814A 512 ++#define EFUSE_MAX_SECTION_8814A 64 ++#define EFUSE_MAX_WORD_UNIT_8814A 4 ++#define EFUSE_PROTECT_BYTES_BANK_8814A 16 ++ ++#define EFUSE_IC_ID_OFFSET_8814A 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR_8814A(addr) (addr < EFUSE_REAL_CONTENT_LEN_8814A) ++ ++/*------------------------------------------------------------------------- ++Chip specific ++-------------------------------------------------------------------------*/ ++ ++/* pic buffer descriptor */ ++#if 1 /* according to the define in the rtw_xmit.h, rtw_recv.h */ ++#define RTL8814AE_SEG_NUM TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */ ++#define TX_DESC_NUM_8814A TXDESC_NUM /* 128 */ ++#define RX_DESC_NUM_8814A PCI_MAX_RX_COUNT /* 128 */ ++#ifdef CONFIG_CONCURRENT_MODE ++#define BE_QUEUE_TX_DESC_NUM_8814A (TXDESC_NUM<<1) /* 256 */ ++#else ++#define BE_QUEUE_TX_DESC_NUM_8814A (TXDESC_NUM+(TXDESC_NUM>>1)) /* 192 */ ++#endif ++#else ++#define RTL8814AE_SEG_NUM TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */ ++#define TX_DESC_NUM_8814A 128 /* 1024//2048 change by ylb 20130624 */ ++#define RX_DESC_NUM_8814A 128 /* 1024 //512 change by ylb 20130624 */ ++#endif ++ ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 1byte|----8bytes----|1byte|--5bytes--| ++// | | Reserved(14bytes) | ++// ++#define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. ++ ++/* rtl8814_hal_init.c */ ++s32 FirmwareDownload8814A( PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); ++void InitializeFirmwareVars8814(PADAPTER padapter); ++ ++VOID ++Hal_InitEfuseVars_8814A( ++ IN PADAPTER Adapter ++ ); ++ ++s32 InitLLTTable8814A( ++ IN PADAPTER Adapter ++ ); ++ ++ ++void InitRDGSetting8814A(PADAPTER padapter); ++ ++//void CheckAutoloadState8812A(PADAPTER padapter); ++ ++// EFuse ++u8 GetEEPROMSize8814A(PADAPTER padapter); ++void InitPGData8814A(PADAPTER padapter); ++ ++void hal_ReadPROMVersion8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void hal_ReadTxPowerInfo8814A(PADAPTER padapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void hal_ReadBoardType8814A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void hal_ReadThermalMeter_8814A(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); ++void hal_ReadChannelPlan8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++void hal_EfuseParseXtal_8814A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); ++void hal_ReadAntennaDiversity8814A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); ++void hal_Read_TRX_antenna_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++VOID hal_ReadAmplifierType_8814A( ++ IN PADAPTER Adapter ++ ); ++VOID hal_ReadPAType_8814A( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail, ++ OUT u8* pPAType, ++ OUT u8* pLNAType ++ ); ++void hal_GetRxGainOffset_8814A( ++ PADAPTER Adapter, ++ pu1Byte PROMContent, ++ BOOLEAN AutoloadFail ++ ); ++void Hal_EfuseParseKFreeData_8814A( ++ IN PADAPTER Adapter, ++ IN u8 *PROMContent, ++ IN BOOLEAN AutoloadFail); ++void hal_ReadRFEType_8814A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); ++void hal_EfuseParseBTCoexistInfo8814A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++ ++//void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++//int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); ++void hal_ReadRemoteWakeup_8814A(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); ++u8 MgntQuery_NssTxRate(u16 Rate); ++ ++//BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); ++ ++#ifdef CONFIG_WOWLAN ++void Hal_DetectWoWMode(PADAPTER pAdapter); ++#endif //CONFIG_WOWLAN ++ ++void _InitBeaconParameters_8814A(PADAPTER padapter); ++void SetBeaconRelatedRegisters8814A(PADAPTER padapter); ++ ++void ReadRFType8814A(PADAPTER padapter); ++void InitDefaultValue8814A(PADAPTER padapter); ++ ++void SetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval); ++void GetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval); ++u8 SetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++u8 GetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); ++s32 c2h_id_filter_ccx_8814a(u8 *buf); ++void rtl8814_set_hal_ops(struct hal_ops *pHalFunc); ++void init_hal_spec_8814a(_adapter *adapter); ++ ++// register ++void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); ++void SetBcnCtrlReg(PADAPTER Adapter, u8 SetBits, u8 ClearBits); ++void rtl8814_start_thread(PADAPTER padapter); ++void rtl8814_stop_thread(PADAPTER padapter); ++ ++ ++#ifdef CONFIG_PCI_HCI ++BOOLEAN InterruptRecognized8814AE(PADAPTER Adapter); ++VOID UpdateInterruptMask8814AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++u16 get_txbd_idx_addr(u16 ff_hwaddr); ++#endif ++ ++#ifdef CONFIG_BT_COEXIST ++void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); ++#endif ++ ++#endif //__RTL8188E_HAL_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_led.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_led.h +new file mode 100644 +index 0000000..93d0a7c +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_led.h +@@ -0,0 +1,41 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8814A_LED_H__ ++#define __RTL8814A_LED_H__ ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8814au_InitSwLeds(PADAPTER padapter); ++void rtl8814au_DeInitSwLeds(PADAPTER padapter); ++#endif //CONFIG_USB_HCI ++#ifdef CONFIG_PCI_HCI ++void rtl8814ae_InitSwLeds(PADAPTER padapter); ++void rtl8814ae_DeInitSwLeds(PADAPTER padapter); ++#endif //CONFIG_PCI_HCI ++#ifdef CONFIG_SDIO_HCI ++void rtl8814s_InitSwLeds(PADAPTER padapter); ++void rtl8814s_DeInitSwLeds(PADAPTER padapter); ++#endif //CONFIG_SDIO_HCI ++ ++#endif //__RTL8814A_LED_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_recv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_recv.h +new file mode 100644 +index 0000000..718e749 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_recv.h +@@ -0,0 +1,188 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8814A_RECV_H__ ++#define __RTL8814A_RECV_H__ ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifndef MAX_RECVBUF_SZ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ #ifdef CONFIG_PLATFORM_MSTAR ++ #define MAX_RECVBUF_SZ (8192) // 8K ++ #else ++ #define MAX_RECVBUF_SZ (32768) // 32k ++ #endif ++ //#define MAX_RECVBUF_SZ (24576) // 24k ++ //#define MAX_RECVBUF_SZ (20480) //20K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ //#define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++#endif //!MAX_RECVBUF_SZ ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++ ++#elif defined(CONFIG_SDIO_HCI) ++/* temp solution ++#ifdef CONFIG_SDIO_RX_COPY ++#define MAX_RECVBUF_SZ (10240) ++#else // !CONFIG_SDIO_RX_COPY ++#define MAX_RECVBUF_SZ MAX_RX_DMA_BUFFER_SIZE_8821 ++#endif // !CONFIG_SDIO_RX_COPY ++*/ ++#endif ++ ++ ++/* RX buffer descriptor */ ++/* DWORD 0 */ ++#define SET_RX_BUFFER_DESC_DATA_LENGTH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_BUFFER_DESC_LS_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 14, 1, __Value) ++#define SET_RX_BUFFER_DESC_FS_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) ++#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 16, __Value) ++ ++#define GET_RX_BUFFER_DESC_OWN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) ++#define GET_RX_BUFFER_DESC_LS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) ++#define GET_RX_BUFFER_DESC_FS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) ++#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) ++ ++/* DWORD 1 */ ++#define SET_RX_BUFFER_PHYSICAL_LOW_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) ++#define GET_RX_BUFFER_PHYSICAL_LOW_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 32) ++ ++/* DWORD 2 */ ++#define SET_RX_BUFFER_PHYSICAL_HIGH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) ++ ++/* DWORD 3*/ /* RESERVED */ ++ ++ ++/*============= ++//RX Info ++==============*/ ++//DWORD 0 ++#define SET_RX_STATUS_DESC_PKT_LEN_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) ++#define SET_RX_STATUS_DESC_EOR_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) ++#define SET_RX_STATUS_DESC_OWN_8814AE(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) ++ ++#define GET_RX_STATUS_DESC_PKT_LEN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) ++#define GET_RX_STATUS_DESC_CRC32_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) ++#define GET_RX_STATUS_DESC_ICV_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) ++#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) ++#define GET_RX_STATUS_DESC_SECURITY_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) ++#define GET_RX_STATUS_DESC_QOS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) ++#define GET_RX_STATUS_DESC_SHIFT_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) ++#define GET_RX_STATUS_DESC_PHY_STATUS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) ++#define GET_RX_STATUS_DESC_SWDEC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) ++#define GET_RX_STATUS_DESC_LAST_SEG_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) ++#define GET_RX_STATUS_DESC_EOR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++ ++//DWORD 1 ++#define GET_RX_STATUS_DESC_MACID_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 7) ++#define GET_RX_STATUS_DESC_EXT_SECTYPE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 7, 1)/* 20130415 KaiYuan add for 8814 */ ++#define GET_RX_STATUS_DESC_TID_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 8, 4) ++#define GET_RX_STATUS_DESC_MACID_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 12, 1) ++#define GET_RX_STATUS_DESC_AMSDU_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 13, 1) ++#define GET_RX_STATUS_DESC_RXID_MATCH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 14, 1) ++#define GET_RX_STATUS_DESC_PAGGR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 15, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 20, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 21, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 22, 1) ++#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 23, 1) ++#define GET_RX_STATUS_DESC_PAM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 24, 1) ++#define GET_RX_STATUS_DESC_PWR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 25, 1) ++#define GET_RX_STATUS_DESC_MORE_DATA_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 26, 1) ++#define GET_RX_STATUS_DESC_MORE_FRAG_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 27, 1) ++#define GET_RX_STATUS_DESC_TYPE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 28, 2) ++#define GET_RX_STATUS_DESC_FIRST_SEG_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) ++#define GET_RX_STATUS_DESC_EOR_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) ++#define GET_RX_STATUS_DESC_MC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 30, 1) ++#define GET_RX_STATUS_DESC_BC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 31, 1) ++ ++//DWORD 2 ++#define GET_RX_STATUS_DESC_SEQ_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) ++#define GET_RX_STATUS_DESC_FRAG_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) ++#ifdef CONFIG_USB_RX_AGGREGATION ++#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 8) ++#else ++#define GET_RX_STATUS_DESC_RX_IS_QOS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) ++#endif ++#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) ++#define GET_RX_STATUS_DESC_HWRSVD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 24, 4) ++#define GET_RX_STATUS_C2H_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) ++#define GET_RX_STATUS_DESC_FCS_OK_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 31, 1) ++ ++//DWORD 3 ++#define GET_RX_STATUS_DESC_RX_RATE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) ++#define GET_RX_STATUS_DESC_BSSID_FIT_H_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 7, 3)//20130415 KaiYuan add for 8814 ++#define GET_RX_STATUS_DESC_HTC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) ++#define GET_RX_STATUS_DESC_EOSP_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) ++#define GET_RX_STATUS_DESC_BSSID_FIT_L_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) ++#define GET_RX_STATUS_DESC_DMA_AGG_NUM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8)//20130415 KaiYuan Check if it exist anymore ++#define GET_RX_STATUS_DESC_PATTERN_MATCH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 29, 1) ++#define GET_RX_STATUS_DESC_UNICAST_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 30, 1) ++#define GET_RX_STATUS_DESC_MAGIC_WAKE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 31, 1) ++ ++//DWORD 4 ++#define GET_RX_STATUS_DESC_PATTERN_IDX_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 0, 8) ++#define GET_RX_STATUS_DESC_RX_EOF_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 8, 1) ++#define GET_RX_STATUS_DESC_RX_SCRAMBLER_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 9, 7) ++#define GET_RX_STATUS_DESC_RX_PRE_NDP_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 16, 1) ++#define GET_RX_STATUS_DESC_A1_FIT_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+16, 24, 5) ++ ++ ++//DWORD 5 ++#define GET_RX_STATUS_DESC_TSFL_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) ++ ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8814au_init_recv_priv(PADAPTER padapter); ++void rtl8814au_free_recv_priv(PADAPTER padapter); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8814ae_init_recv_priv(PADAPTER padapter); ++void rtl8814ae_free_recv_priv(PADAPTER padapter); ++#endif ++ ++/* temp solution ++#ifdef CONFIG_SDIO_HCI ++s32 InitRecvPriv8821AS(PADAPTER padapter); ++void FreeRecvPriv8821AS(PADAPTER padapter); ++#endif // CONFIG_SDIO_HCI ++*/ ++ ++void rtl8814_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); ++ ++#endif /* __RTL8814A_RECV_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_rf.h +new file mode 100644 +index 0000000..5cd517a +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_rf.h +@@ -0,0 +1,34 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8814A_RF_H__ ++#define __RTL8814A_RF_H__ ++ ++VOID ++PHY_RF6052SetBandwidth8814A( ++ IN PADAPTER Adapter, ++ IN CHANNEL_WIDTH Bandwidth); ++ ++ ++int ++PHY_RF6052_Config_8814A( ++ IN PADAPTER Adapter ); ++ ++#endif//__RTL8188E_RF_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_spec.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_spec.h +new file mode 100644 +index 0000000..06f4b76 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_spec.h +@@ -0,0 +1,643 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8814A_SPEC_H__ ++#define __RTL8814A_SPEC_H__ ++ ++#include ++ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_ISO_CTRL_8814A 0x0000 // 2 Byte ++#define REG_SYS_FUNC_EN_8814A 0x0002 // 2 Byte ++#define REG_SYS_PW_CTRL_8814A 0x0004 // 4 Byte ++#define REG_SYS_CLKR_8814A 0x0008 // 2 Byte ++#define REG_SYS_EEPROM_CTRL_8814A 0x000A // 2 Byte ++#define REG_EE_VPD_8814A 0x000C // 2 Byte ++#define REG_SYS_SWR_CTRL1_8814A 0x0010 // 1 Byte ++#define REG_SPS0_CTRL_8814A 0x0011 // 7 Byte ++#define REG_SYS_SWR_CTRL3_8814A 0x0018 // 4 Byte ++#define REG_RSV_CTRL_8814A 0x001C // 3 Byte ++#define REG_RF_CTRL0_8814A 0x001F // 1 Byte ++#define REG_RF_CTRL1_8814A 0x0020 // 1 Byte ++#define REG_RF_CTRL2_8814A 0x0021 // 1 Byte ++#define REG_LPLDO_CTRL_8814A 0x0023 // 1 Byte ++#define REG_AFE_CTRL1_8814A 0x0024 // 4 Byte ++#define REG_AFE_CTRL2_8814A 0x0028 // 4 Byte ++#define REG_AFE_CTRL3_8814A 0x002c // 4 Byte ++#define REG_EFUSE_CTRL_8814A 0x0030 ++#define REG_LDO_EFUSE_CTRL_8814A 0x0034 ++#define REG_PWR_DATA_8814A 0x0038 ++#define REG_CAL_TIMER_8814A 0x003C ++#define REG_ACLK_MON_8814A 0x003E ++#define REG_GPIO_MUXCFG_8814A 0x0040 ++#define REG_GPIO_IO_SEL_8814A 0x0042 ++#define REG_MAC_PINMUX_CFG_8814A 0x0043 ++#define REG_GPIO_PIN_CTRL_8814A 0x0044 ++#define REG_GPIO_INTM_8814A 0x0048 ++#define REG_LEDCFG0_8814A 0x004C ++#define REG_LEDCFG1_8814A 0x004D ++#define REG_LEDCFG2_8814A 0x004E ++#define REG_LEDCFG3_8814A 0x004F ++#define REG_FSIMR_8814A 0x0050 ++#define REG_FSISR_8814A 0x0054 ++#define REG_HSIMR_8814A 0x0058 ++#define REG_HSISR_8814A 0x005c ++#define REG_GPIO_EXT_CTRL_8814A 0x0060 ++#define REG_GPIO_STATUS_8814A 0x006C ++#define REG_SDIO_CTRL_8814A 0x0070 ++#define REG_HCI_OPT_CTRL_8814A 0x0074 ++#define REG_RF_CTRL3_8814A 0x0076 // 1 Byte ++#define REG_AFE_CTRL4_8814A 0x0078 ++#define REG_8051FW_CTRL_8814A 0x0080 ++#define REG_HIMR0_8814A 0x00B0 ++#define REG_HISR0_8814A 0x00B4 ++#define REG_HIMR1_8814A 0x00B8 ++#define REG_HISR1_8814A 0x00BC ++#define REG_SYS_CFG1_8814A 0x00F0 ++#define REG_SYS_CFG2_8814A 0x00FC ++#define REG_SYS_CFG3_8814A 0x1000 ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_CR_8814A 0x0100 ++#define REG_PBP_8814A 0x0104 ++#define REG_PKT_BUFF_ACCESS_CTRL_8814A 0x0106 ++#define REG_TRXDMA_CTRL_8814A 0x010C ++#define REG_TRXFF_BNDY_8814A 0x0114 ++#define REG_TRXFF_STATUS_8814A 0x0118 ++#define REG_RXFF_PTR_8814A 0x011C ++#define REG_CPWM_8814A 0x012F ++#define REG_FWIMR_8814A 0x0130 ++#define REG_FWISR_8814A 0x0134 ++#define REG_FTIMR_8814A 0x0138 ++#define REG_PKTBUF_DBG_CTRL_8814A 0x0140 ++#define REG_RXPKTBUF_CTRL_8814A 0x0142 ++#define REG_PKTBUF_DBG_DATA_L_8814A 0x0144 ++#define REG_PKTBUF_DBG_DATA_H_8814A 0x0148 ++ ++#define REG_TC0_CTRL_8814A 0x0150 ++#define REG_TC1_CTRL_8814A 0x0154 ++#define REG_TC2_CTRL_8814A 0x0158 ++#define REG_TC3_CTRL_8814A 0x015C ++#define REG_TC4_CTRL_8814A 0x0160 ++#define REG_TCUNIT_BASE_8814A 0x0164 ++#define REG_RSVD3_8814A 0x0168 ++#define REG_C2HEVT_MSG_NORMAL_8814A 0x01A0 ++#define REG_C2HEVT_CLEAR_8814A 0x01AF ++#define REG_MCUTST_1_8814A 0x01C0 ++#define REG_MCUTST_WOWLAN_8814A 0x01C7 ++#define REG_FMETHR_8814A 0x01C8 ++#define REG_HMETFR_8814A 0x01CC ++#define REG_HMEBOX_0_8814A 0x01D0 ++#define REG_HMEBOX_1_8814A 0x01D4 ++#define REG_HMEBOX_2_8814A 0x01D8 ++#define REG_HMEBOX_3_8814A 0x01DC ++#define REG_LLT_INIT_8814A 0x01E0 ++#define REG_LLT_ADDR_8814A 0x01E4 //20130415 KaiYuan add for 8814 ++#define REG_HMEBOX_EXT0_8814A 0x01F0 ++#define REG_HMEBOX_EXT1_8814A 0x01F4 ++#define REG_HMEBOX_EXT2_8814A 0x01F8 ++#define REG_HMEBOX_EXT3_8814A 0x01FC ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_FIFOPAGE_CTRL_1_8814A 0x0200 ++#define REG_FIFOPAGE_CTRL_2_8814A 0x0204 ++#define REG_AUTO_LLT_8814A 0x0208 ++#define REG_TXDMA_OFFSET_CHK_8814A 0x020C ++#define REG_TXDMA_STATUS_8814A 0x0210 ++#define REG_RQPN_NPQ_8814A 0x0214 ++#define REG_TQPNT1_8814A 0x0218 ++#define REG_TQPNT2_8814A 0x021C ++#define REG_TQPNT3_8814A 0x0220 ++#define REG_TQPNT4_8814A 0x0224 ++#define REG_RQPN_CTRL_1_8814A 0x0228 ++#define REG_RQPN_CTRL_2_8814A 0x022C ++#define REG_FIFOPAGE_INFO_1_8814A 0x0230 ++#define REG_FIFOPAGE_INFO_2_8814A 0x0234 ++#define REG_FIFOPAGE_INFO_3_8814A 0x0238 ++#define REG_FIFOPAGE_INFO_4_8814A 0x023C ++#define REG_FIFOPAGE_INFO_5_8814A 0x0240 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_AGG_PG_TH_8814A 0x0280 ++#define REG_RXPKT_NUM_8814A 0x0284 // The number of packets in RXPKTBUF. ++#define REG_RXDMA_CONTROL_8814A 0x0286 // ?????? Control the RX DMA. ++#define REG_RXDMA_STATUS_8814A 0x0288 ++#define REG_RXDMA_MODE_8814A 0x0290 // ?????? ++#define REG_EARLY_MODE_CONTROL_8814A 0x02BC // ?????? ++#define REG_RSVD5_8814A 0x02F0 // ?????? ++ ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG_8814A 0x0300 ++#define REG_INT_MIG_8814A 0x0304 // Interrupt Migration ++#define REG_BCNQ_TXBD_DESA_8814A 0x0308 // TX Beacon Descriptor Address ++#define REG_MGQ_TXBD_DESA_8814A 0x0310 // TX Manage Queue Descriptor Address ++#define REG_VOQ_TXBD_DESA_8814A 0x0318 // TX VO Queue Descriptor Address ++#define REG_VIQ_TXBD_DESA_8814A 0x0320 // TX VI Queue Descriptor Address ++#define REG_BEQ_TXBD_DESA_8814A 0x0328 // TX BE Queue Descriptor Address ++#define REG_BKQ_TXBD_DESA_8814A 0x0330 // TX BK Queue Descriptor Address ++#define REG_RXQ_RXBD_DESA_8814A 0x0338 // RX Queue Descriptor Address ++#define REG_HI0Q_TXBD_DESA_8814A 0x0340 ++#define REG_HI1Q_TXBD_DESA_8814A 0x0348 ++#define REG_HI2Q_TXBD_DESA_8814A 0x0350 ++#define REG_HI3Q_TXBD_DESA_8814A 0x0358 ++#define REG_HI4Q_TXBD_DESA_8814A 0x0360 ++#define REG_HI5Q_TXBD_DESA_8814A 0x0368 ++#define REG_HI6Q_TXBD_DESA_8814A 0x0370 ++#define REG_HI7Q_TXBD_DESA_8814A 0x0378 ++#define REG_MGQ_TXBD_NUM_8814A 0x0380 ++#define REG_RX_RXBD_NUM_8814A 0x0382 ++#define REG_VOQ_TXBD_NUM_8814A 0x0384 ++#define REG_VIQ_TXBD_NUM_8814A 0x0386 ++#define REG_BEQ_TXBD_NUM_8814A 0x0388 ++#define REG_BKQ_TXBD_NUM_8814A 0x038A ++#define REG_HI0Q_TXBD_NUM_8814A 0x038C ++#define REG_HI1Q_TXBD_NUM_8814A 0x038E ++#define REG_HI2Q_TXBD_NUM_8814A 0x0390 ++#define REG_HI3Q_TXBD_NUM_8814A 0x0392 ++#define REG_HI4Q_TXBD_NUM_8814A 0x0394 ++#define REG_HI5Q_TXBD_NUM_8814A 0x0396 ++#define REG_HI6Q_TXBD_NUM_8814A 0x0398 ++#define REG_HI7Q_TXBD_NUM_8814A 0x039A ++#define REG_TSFTIMER_HCI_8814A 0x039C ++ ++//Read Write Point ++#define REG_VOQ_TXBD_IDX_8814A 0x03A0 ++#define REG_VIQ_TXBD_IDX_8814A 0x03A4 ++#define REG_BEQ_TXBD_IDX_8814A 0x03A8 ++#define REG_BKQ_TXBD_IDX_8814A 0x03AC ++#define REG_MGQ_TXBD_IDX_8814A 0x03B0 ++#define REG_RXQ_TXBD_IDX_8814A 0x03B4 ++#define REG_HI0Q_TXBD_IDX_8814A 0x03B8 ++#define REG_HI1Q_TXBD_IDX_8814A 0x03BC ++#define REG_HI2Q_TXBD_IDX_8814A 0x03C0 ++#define REG_HI3Q_TXBD_IDX_8814A 0x03C4 ++#define REG_HI4Q_TXBD_IDX_8814A 0x03C8 ++#define REG_HI5Q_TXBD_IDX_8814A 0x03CC ++#define REG_HI6Q_TXBD_IDX_8814A 0x03D0 ++#define REG_HI7Q_TXBD_IDX_8814A 0x03D4 ++#define REG_DBG_SEL_V1_8814A 0x03D8 ++#define REG_PCIE_HRPWM1_V1_8814A 0x03D9 ++#define REG_PCIE_HCPWM1_V1_8814A 0x03DA ++#define REG_PCIE_CTRL2_8814A 0x03DB ++#define REG_PCIE_HRPWM2_V1_8814A 0x03DC ++#define REG_PCIE_HCPWM2_V1_8814A 0x03DE ++#define REG_PCIE_H2C_MSG_V1_8814A 0x03E0 ++#define REG_PCIE_C2H_MSG_V1_8814A 0x03E4 ++#define REG_DBI_WDATA_V1_8814A 0x03E8 ++#define REG_DBI_RDATA_V1_8814A 0x03EC ++#define REG_DBI_FLAG_V1_8814A 0x03F0 ++#define REG_MDIO_V1_8814A 0x03F4 ++#define REG_PCIE_MIX_CFG_8814A 0x03F8 ++#define REG_DBG_8814A 0x03FC ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_VOQ_INFORMATION_8814A 0x0400 ++#define REG_VIQ_INFORMATION_8814A 0x0404 ++#define REG_BEQ_INFORMATION_8814A 0x0408 ++#define REG_BKQ_INFORMATION_8814A 0x040C ++#define REG_MGQ_INFORMATION_8814A 0x0410 ++#define REG_HGQ_INFORMATION_8814A 0x0414 ++#define REG_BCNQ_INFORMATION_8814A 0x0418 ++#define REG_TXPKT_EMPTY_8814A 0x041A ++#define REG_CPU_MGQ_INFORMATION_8814A 0x041C ++#define REG_FWHW_TXQ_CTRL_8814A 0x0420 ++#define REG_HWSEQ_CTRL_8814A 0x0423 ++#define REG_TXPKTBUF_BCNQ_BDNY_8814A 0x0424 ++//#define REG_MGQ_BDNY_8814A 0x0425 ++#define REG_LIFETIME_EN_8814A 0x0426 ++//#define REG_FW_FREE_TAIL_8814A 0x0427 ++#define REG_SPEC_SIFS_8814A 0x0428 ++#define REG_RETRY_LIMIT_8814A 0x042A ++#define REG_TXBF_CTRL_8814A 0x042C ++#define REG_DARFRC_8814A 0x0430 ++#define REG_RARFRC_8814A 0x0438 ++#define REG_RRSR_8814A 0x0440 ++#define REG_ARFR0_8814A 0x0444 ++#define REG_ARFR1_8814A 0x044C ++#define REG_CCK_CHECK_8814A 0x0454 ++#define REG_AMPDU_MAX_TIME_8814A 0x0455 ++#define REG_TXPKTBUF_BCNQ1_BDNY_8814A 0x0456 ++#define REG_AMPDU_MAX_LENGTH_8814A 0x0458 ++#define REG_ACQ_STOP_8814A 0x045C ++#define REG_NDPA_RATE_8814A 0x045D ++#define REG_TX_HANG_CTRL_8814A 0x045E ++#define REG_NDPA_OPT_CTRL_8814A 0x045F ++#define REG_FAST_EDCA_CTRL_8814A 0x0460 ++#define REG_RD_RESP_PKT_TH_8814A 0x0463 ++#define REG_CMDQ_INFO_8814A 0x0464 ++#define REG_Q4_INFO_8814A 0x0468 ++#define REG_Q5_INFO_8814A 0x046C ++#define REG_Q6_INFO_8814A 0x0470 ++#define REG_Q7_INFO_8814A 0x0474 ++#define REG_WMAC_LBK_BUF_HD_8814A 0x0478 ++#define REG_MGQ_PGBNDY_8814A 0x047A ++#define REG_INIRTS_RATE_SEL_8814A 0x0480 ++#define REG_BASIC_CFEND_RATE_8814A 0x0481 ++#define REG_STBC_CFEND_RATE_8814A 0x0482 ++#define REG_DATA_SC_8814A 0x0483 ++#define REG_MACID_SLEEP3_8814A 0x0484 ++#define REG_MACID_SLEEP1_8814A 0x0488 ++#define REG_ARFR2_8814A 0x048C ++#define REG_ARFR3_8814A 0x0494 ++#define REG_ARFR4_8814A 0x049C ++#define REG_ARFR5_8814A 0x04A4 ++#define REG_TXRPT_START_OFFSET_8814A 0x04AC ++#define REG_TRYING_CNT_TH_8814A 0x04B0 ++#define REG_POWER_STAGE1_8814A 0x04B4 ++#define REG_POWER_STAGE2_8814A 0x04B8 ++#define REG_SW_AMPDU_BURST_MODE_CTRL_8814A 0x04BC ++#define REG_PKT_LIFE_TIME_8814A 0x04C0 ++#define REG_PKT_BE_BK_LIFE_TIME_8814A 0x04C2 // ?????? ++#define REG_STBC_SETTING_8814A 0x04C4 ++#define REG_STBC_8814A 0x04C5 ++#define REG_QUEUE_CTRL_8814A 0x04C6 ++#define REG_SINGLE_AMPDU_CTRL_8814A 0x04C7 ++#define REG_PROT_MODE_CTRL_8814A 0x04C8 ++#define REG_MAX_AGGR_NUM_8814A 0x04CA ++#define REG_RTS_MAX_AGGR_NUM_8814A 0x04CB ++#define REG_BAR_MODE_CTRL_8814A 0x04CC ++#define REG_RA_TRY_RATE_AGG_LMT_8814A 0x04CF ++#define REG_MACID_SLEEP2_8814A 0x04D0 ++#define REG_MACID_SLEEP0_8814A 0x04D4 ++#define REG_HW_SEQ0_8814A 0x04D8 ++#define REG_HW_SEQ1_8814A 0x04DA ++#define REG_HW_SEQ2_8814A 0x04DC ++#define REG_HW_SEQ3_8814A 0x04DE ++#define REG_NULL_PKT_STATUS_8814A 0x04E0 ++#define REG_PTCL_ERR_STATUS_8814A 0x04E2 ++#define REG_DROP_PKT_NUM_8814A 0x04EC ++#define REG_PTCL_TX_RPT_8814A 0x04F0 ++#define REG_Dummy_8814A 0x04FC ++ ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_EDCA_VO_PARAM_8814A 0x0500 ++#define REG_EDCA_VI_PARAM_8814A 0x0504 ++#define REG_EDCA_BE_PARAM_8814A 0x0508 ++#define REG_EDCA_BK_PARAM_8814A 0x050C ++#define REG_BCNTCFG_8814A 0x0510 ++#define REG_PIFS_8814A 0x0512 ++#define REG_RDG_PIFS_8814A 0x0513 ++#define REG_SIFS_CTX_8814A 0x0514 ++#define REG_SIFS_TRX_8814A 0x0516 ++#define REG_AGGR_BREAK_TIME_8814A 0x051A ++#define REG_SLOT_8814A 0x051B ++#define REG_TX_PTCL_CTRL_8814A 0x0520 ++#define REG_TXPAUSE_8814A 0x0522 ++#define REG_DIS_TXREQ_CLR_8814A 0x0523 ++#define REG_RD_CTRL_8814A 0x0524 ++// ++// Format for offset 540h-542h: ++// [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. ++// [7:4]: Reserved. ++// [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. ++// [23:20]: Reserved ++// Description: ++// | ++// |<--Setup--|--Hold------------>| ++// --------------|---------------------- ++// | ++// TBTT ++// Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. ++// Described by Designer Tim and Bruce, 2011-01-14. ++// ++#define REG_TBTT_PROHIBIT_8814A 0x0540 ++#define REG_RD_NAV_NXT_8814A 0x0544 ++#define REG_NAV_PROT_LEN_8814A 0x0546 ++#define REG_BCN_CTRL_8814A 0x0550 ++#define REG_BCN_CTRL_1_8814A 0x0551 ++#define REG_MBID_NUM_8814A 0x0552 ++#define REG_DUAL_TSF_RST_8814A 0x0553 ++#define REG_MBSSID_BCN_SPACE_8814A 0x0554 ++#define REG_DRVERLYINT_8814A 0x0558 ++#define REG_BCNDMATIM_8814A 0x0559 ++#define REG_ATIMWND_8814A 0x055A ++#define REG_USTIME_TSF_8814A 0x055C ++#define REG_BCN_MAX_ERR_8814A 0x055D ++#define REG_RXTSF_OFFSET_CCK_8814A 0x055E ++#define REG_RXTSF_OFFSET_OFDM_8814A 0x055F ++#define REG_TSFTR_8814A 0x0560 ++#define REG_CTWND_8814A 0x0572 ++#define REG_SECONDARY_CCA_CTRL_8814A 0x0577 // ?????? ++#define REG_PSTIMER_8814A 0x0580 ++#define REG_TIMER0_8814A 0x0584 ++#define REG_TIMER1_8814A 0x0588 ++#define REG_BCN_PREDL_ITV_8814A 0x058F //Pre download beacon interval ++#define REG_ACMHWCTRL_8814A 0x05C0 ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_MAC_CR_8814A 0x0600 ++#define REG_TCR_8814A 0x0604 ++#define REG_RCR_8814A 0x0608 ++#define REG_RX_PKT_LIMIT_8814A 0x060C ++#define REG_RX_DLK_TIME_8814A 0x060D ++#define REG_RX_DRVINFO_SZ_8814A 0x060F ++ ++#define REG_MACID_8814A 0x0610 ++#define REG_BSSID_8814A 0x0618 ++#define REG_MAR_8814A 0x0620 ++#define REG_MBIDCAMCFG_8814A 0x0628 ++ ++#define REG_USTIME_EDCA_8814A 0x0638 ++#define REG_MAC_SPEC_SIFS_8814A 0x063A ++#define REG_RESP_SIFP_CCK_8814A 0x063C ++#define REG_RESP_SIFS_OFDM_8814A 0x063E ++#define REG_ACKTO_8814A 0x0640 ++#define REG_CTS2TO_8814A 0x0641 ++#define REG_EIFS_8814A 0x0642 ++ ++#define REG_NAV_UPPER_8814A 0x0652 // unit of 128 ++#define REG_TRXPTCL_CTL_8814A 0x0668 ++ ++// Security ++#define REG_CAMCMD_8814A 0x0670 ++#define REG_CAMWRITE_8814A 0x0674 ++#define REG_CAMREAD_8814A 0x0678 ++#define REG_CAMDBG_8814A 0x067C ++#define REG_SECCFG_8814A 0x0680 ++ ++// Power ++#define REG_WOW_CTRL_8814A 0x0690 ++#define REG_PS_RX_INFO_8814A 0x0692 ++#define REG_UAPSD_TID_8814A 0x0693 ++#define REG_WKFMCAM_NUM_8814A 0x0698 ++#define REG_RXFLTMAP0_8814A 0x06A0 ++#define REG_RXFLTMAP1_8814A 0x06A2 ++#define REG_RXFLTMAP2_8814A 0x06A4 ++#define REG_BCN_PSR_RPT_8814A 0x06A8 ++#define REG_BT_COEX_TABLE_8814A 0x06C0 ++#define REG_TX_DATA_RSP_RATE_8814A 0x06DE ++#define REG_ASSOCIATED_BFMER0_INFO_8814A 0x06E4 ++#define REG_ASSOCIATED_BFMER1_INFO_8814A 0x06EC ++#define REG_CSI_RPT_PARAM_BW20_8814A 0x06F4 ++#define REG_CSI_RPT_PARAM_BW40_8814A 0x06F8 ++#define REG_CSI_RPT_PARAM_BW80_8814A 0x06FC ++ ++// Hardware Port 2 ++#define REG_MACID1_8814A 0x0700 ++#define REG_BSSID1_8814A 0x0708 ++// Hardware Port 3 ++#define REG_MACID2_8814A 0x1620 ++#define REG_BSSID2_8814A 0x1628 ++// Hardware Port 4 ++#define REG_MACID3_8814A 0x1630 ++#define REG_BSSID3_8814A 0x1638 ++// Hardware Port 5 ++#define REG_MACID4_8814A 0x1640 ++#define REG_BSSID4_8814A 0x1648 ++ ++#define REG_ASSOCIATED_BFMEE_SEL_8814A 0x0714 ++#define REG_SND_PTCL_CTRL_8814A 0x0718 ++#define REG_IQ_DUMP_8814A 0x07C0 ++ ++/**** page 19 ****/ ++//TX BeamForming ++#define REG_BB_TXBF_ANT_SET_BF1 0x19ac ++#define REG_BB_TXBF_ANT_SET_BF0 0x19b4 ++ ++// 0x1200h ~ 0x12FFh DDMA CTRL ++// ++//----------------------------------------------------- ++#define REG_DDMA_CH0SA 0x1200 ++#define REG_DDMA_CH0DA 0x1204 ++#define REG_DDMA_CH0CTRL 0x1208 ++#define REG_DDMA_CH1SA 0x1210 ++#define REG_DDMA_CH1DA 0x1214 ++#define REG_DDMA_CH1CTRL 0x1218 ++#define REG_DDMA_CH2SA 0x1220 ++#define REG_DDMA_CH2DA 0x1224 ++#define REG_DDMA_CH2CTRL 0x1228 ++#define REG_DDMA_CH3SA 0x1230 ++#define REG_DDMA_CH3DA 0x1234 ++#define REG_DDMA_CH3CTRL 0x1238 ++#define REG_DDMA_CH4SA 0x1240 ++#define REG_DDMA_CH4DA 0x1244 ++#define REG_DDMA_CH4CTRL 0x1248 ++#define REG_DDMA_CH5SA 0x1250 ++#define REG_DDMA_CH5DA 0x1254 ++#define REG_DDMA_CH5CTRL 0x1258 ++#define REG_DDMA_INT_MSK 0x12E0 ++#define REG_DDMA_CHSTATUS 0x12E8 ++#define REG_DDMA_CHKSUM 0x12F0 ++#define REG_DDMA_MONITER 0x12FC ++ ++#define DDMA_LEN_MASK 0x0001FFFF ++#define FW_CHKSUM_DUMMY_SZ 8 ++#define DDMA_CH_CHKSUM_CNT BIT(24) ++#define DDMA_RST_CHKSUM_STS BIT(25) ++#define DDMA_MODE_BLOCK_CPU BIT(26) ++#define DDMA_CHKSUM_FAIL BIT(27) ++#define DDMA_DA_W_DISABLE BIT(28) ++#define DDMA_CHKSUM_EN BIT(29) ++#define DDMA_CH_OWN BIT(31) ++ ++ ++//3081 FWDL ++#define FWDL_EN BIT0 ++#define IMEM_BOOT_DL_RDY BIT1 ++#define IMEM_BOOT_CHKSUM_FAIL BIT2 ++#define IMEM_DL_RDY BIT3 ++#define IMEM_CHKSUM_OK BIT4 ++#define DMEM_DL_RDY BIT5 ++#define DMEM_CHKSUM_OK BIT6 ++#define EMEM_DL_RDY BIT7 ++#define EMEM_CHKSUM_FAIL BIT8 ++#define EMEM_TXBUF_DL_RDY BIT9 ++#define EMEM_TXBUF_CHKSUM_FAIL BIT10 ++#define CPU_CLK_SWITCH_BUSY BIT11 ++#define CPU_CLK_SEL (BIT12|BIT13) ++#define FWDL_OK BIT14 ++#define FW_INIT_RDY BIT15 ++#define R_EN_BOOT_FLASH BIT20 ++ ++#define OCPBASE_IMEM_3081 0x00000000 ++#define OCPBASE_DMEM_3081 0x00200000 ++#define OCPBASE_RPTBUF_3081 0x18660000 ++#define OCPBASE_RXBUF2_3081 0x18680000 ++#define OCPBASE_RXBUF_3081 0x18700000 ++#define OCPBASE_TXBUF_3081 0x18780000 ++ ++ ++#define REG_FAST_EDCA_VOVI_SETTING_8814A 0x1448 ++#define REG_FAST_EDCA_BEBK_SETTING_8814A 0x144C ++ ++ ++//----------------------------------------------------- ++// ++ ++ ++//----------------------------------------------------- ++// ++// Redifine 8192C register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++#define EFUSE_CTRL_8814A REG_EFUSE_CTRL_8814A // E-Fuse Control. ++#define EFUSE_TEST_8814A REG_LDO_EFUSE_CTRL_8814A // E-Fuse Test. ++#define MSR_8814A (REG_CR_8814A + 2) // Media Status register ++#define ISR_8814A REG_HISR0_8814A ++#define TSFR_8814A REG_TSFTR_8814A // Timing Sync Function Timer Register. ++ ++#define PBP_8814A REG_PBP_8814A ++ ++// Redifine MACID register, to compatible prior ICs. ++#define IDR0_8814A REG_MACID_8814A // MAC ID Register, Offset 0x0050-0x0053 ++#define IDR4_8814A (REG_MACID_8814A + 4) // MAC ID Register, Offset 0x0054-0x0055 ++ ++ ++// ++// 9. Security Control Registers (Offset: ) ++// ++#define RWCAM_8814A REG_CAMCMD_8814A //IN 8190 Data Sheet is called CAMcmd ++#define WCAMI_8814A REG_CAMWRITE_8814A // Software write CAM input content ++#define RCAMO_8814A REG_CAMREAD_8814A // Software read/write CAM config ++#define CAMDBG_8814A REG_CAMDBG_8814A ++#define SECR_8814A REG_SECCFG_8814A //Security Configuration Register ++ ++ ++//---------------------------------------------------------------------------- ++// 8195 IMR/ISR bits (offset 0xB0, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR_DISABLED_8814A 0 ++// IMR DW0(0x00B0-00B3) Bit 0-31 ++#define IMR_TIMER2_8814A BIT31 // Timeout interrupt 2 ++#define IMR_TIMER1_8814A BIT30 // Timeout interrupt 1 ++#define IMR_PSTIMEOUT_8814A BIT29 // Power Save Time Out Interrupt ++#define IMR_GTINT4_8814A BIT28 // When GTIMER4 expires, this bit is set to 1 ++#define IMR_GTINT3_8814A BIT27 // When GTIMER3 expires, this bit is set to 1 ++#define IMR_TXBCN0ERR_8814A BIT26 // Transmit Beacon0 Error ++#define IMR_TXBCN0OK_8814A BIT25 // Transmit Beacon0 OK ++#define IMR_TSF_BIT32_TOGGLE_8814A BIT24 // TSF Timer BIT32 toggle indication interrupt ++#define IMR_BCNDMAINT0_8814A BIT20 // Beacon DMA Interrupt 0 ++#define IMR_BCNDERR0_8814A BIT16 // Beacon Queue DMA OK0 ++#define IMR_HSISR_IND_ON_INT_8814A BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) ++#define IMR_BCNDMAINT_E_8814A BIT14 // Beacon DMA Interrupt Extension for Win7 ++#define IMR_ATIMEND_8814A BIT12 // CTWidnow End or ATIM Window End ++#define IMR_C2HCMD_8814A BIT10 // CPU to Host Command INT Status, Write 1 clear ++#define IMR_CPWM2_8814A BIT9 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_CPWM_8814A BIT8 // CPU power Mode exchange INT Status, Write 1 clear ++#define IMR_HIGHDOK_8814A BIT7 // High Queue DMA OK ++#define IMR_MGNTDOK_8814A BIT6 // Management Queue DMA OK ++#define IMR_BKDOK_8814A BIT5 // AC_BK DMA OK ++#define IMR_BEDOK_8814A BIT4 // AC_BE DMA OK ++#define IMR_VIDOK_8814A BIT3 // AC_VI DMA OK ++#define IMR_VODOK_8814A BIT2 // AC_VO DMA OK ++#define IMR_RDU_8814A BIT1 // Rx Descriptor Unavailable ++#define IMR_ROK_8814A BIT0 // Receive DMA OK ++ ++// IMR DW1(0x00B4-00B7) Bit 0-31 ++#define IMR_MCUERR_8814A BIT28 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT7_8814A BIT27 // Beacon DMA Interrupt 7 ++#define IMR_BCNDMAINT6_8814A BIT26 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5_8814A BIT25 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4_8814A BIT24 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3_8814A BIT23 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2_8814A BIT22 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1_8814A BIT21 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK7_8814A BIT20 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6_8814A BIT19 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5_8814A BIT18 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4_8814A BIT17 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3_8814A BIT16 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2_8814A BIT15 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1_8814A BIT14 // Beacon Queue DMA OK Interrup 1 ++#define IMR_ATIMEND_E_8814A BIT13 // ATIM Window End Extension for Win7 ++#define IMR_TXERR_8814A BIT11 // Tx Error Flag Interrupt Status, write 1 clear. ++#define IMR_RXERR_8814A BIT10 // Rx Error Flag INT Status, Write 1 clear ++#define IMR_TXFOVW_8814A BIT9 // Transmit FIFO Overflow ++#define IMR_RXFOVW_8814A BIT8 // Receive FIFO Overflow ++ ++ ++#ifdef CONFIG_PCI_HCI ++#define IMR_TX_MASK (IMR_VODOK_8814A | IMR_VIDOK_8814A | IMR_BEDOK_8814A | IMR_BKDOK_8814A | IMR_MGNTDOK_8814A | IMR_HIGHDOK_8814A) ++ ++#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8814A | IMR_TXBCN0OK_8814A | IMR_TXBCN0ERR_8814A | IMR_BCNDERR0_8814A) ++ ++#define RT_AC_INT_MASKS (IMR_VIDOK_8814A | IMR_VODOK_8814A | IMR_BEDOK_8814A | IMR_BKDOK_8814A) ++#endif ++ ++ ++/*=================================================================== ++===================================================================== ++Here the register defines are for 92C. When the define is as same with 92C, ++we will use the 92C's define for the consistency ++So the following defines for 92C is not entire!!!!!! ++===================================================================== ++=====================================================================*/ ++ ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++ ++//2 Special Option ++#define USB_AGG_EN_8814A BIT(7) ++#define REG_USB_HRPWM_U3 0xF052 ++ ++#define LAST_ENTRY_OF_TX_PKT_BUFFER_8814A 2048-1 //20130415 KaiYuan add for 8814 ++ ++#define MACID_NUM_8814A 128 ++#define SEC_CAM_ENT_NUM_8814A 64 ++#define NSS_NUM_8814A 3 ++#define BAND_CAP_8814A (BAND_CAP_2G | BAND_CAP_5G) ++#define BW_CAP_8814A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M) ++#define PROTO_CAP_8814A (PROTO_CAP_11B|PROTO_CAP_11G|PROTO_CAP_11N|PROTO_CAP_11AC) ++ ++#endif //__RTL8814A_SPEC_H__ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_sreset.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_sreset.h +new file mode 100644 +index 0000000..af26460 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_sreset.h +@@ -0,0 +1,30 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTL88814A_SRESET_H_ ++#define _RTL8814A_SRESET_H_ ++ ++#include ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++extern void rtl8814_sreset_xmit_status_check(_adapter *padapter); ++extern void rtl8814_sreset_linked_status_check(_adapter *padapter); ++#endif ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_xmit.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_xmit.h +new file mode 100644 +index 0000000..940e293 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8814a_xmit.h +@@ -0,0 +1,309 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8814A_XMIT_H__ ++#define __RTL8814A_XMIT_H__ ++ ++typedef struct txdescriptor_8814 ++{ ++ // Offset 0 ++ u32 pktlen:16; ++ u32 offset:8; ++ u32 bmc:1; ++ u32 htc:1; ++ u32 ls:1; ++}TXDESC_8814, *PTXDESC_8814; ++ ++ ++#define OFFSET_SZ 0 ++#define OFFSET_SHT 16 ++ ++ ++ ++#ifdef CONFIG_SDIO_HCI ++#define SET_TX_DESC_SDIO_TXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) ++#endif //CONFIG_SDIO_HCI ++ ++//----------------------------------------------------------------- ++// RTL8814A TX BUFFER DESC ++//----------------------------------------------------------------- ++/* ++- Each TXBD has 4 segment. ++ -- For 32 bit, each segment is 8 bytes. ++ -- For 64 bit, each segment is 16 bytes. ++*/ ++#if 0 ++#if 1 /* 32 bit */ ++#define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8), 0, 16, __Value) ++#define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8)+4, 0, 32, __Value) ++#else /* 64 bit */ ++#define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16), 0, 16, __Value) ++#define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+4, 0, 32, __Value) ++#endif ++#define SET_TX_EXTBUFF_DESC_ADDR_HIGH_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+8, 0, 32, __Value) ++#endif ++/*c2h-DWORD 2*/ ++#define GET_RX_STATUS_DESC_RPT_SEL_8814A(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+8, 28, 1) ++ ++//========================================================= ++// for Txfilldescroptor8814Ae, fill the desc content. ++#if 1 /* 32 bit */ ++#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 0, 16, __Valeu) ++#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 31, 1, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8)+4, 0, 32, __Valeu) ++#else /* 64 bit */ ++#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) ++#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) ++#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) ++#endif ++#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) ++ ++//========================================================= ++ ++//TX buffer ++//============= ++// Dword 0 ++#define SET_TX_BUFF_DESC_LEN_0_8814A(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Valeu) ++#define SET_TX_BUFF_DESC_PSB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) ++#define SET_TX_BUFF_DESC_OWN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++#define GET_TX_BUFF_DESC_OWN_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) ++ ++// Dword 1 ++#define SET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) ++#define GET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) ++// Dword 2 ++#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) ++#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) ++// Dword 3 //RESERVED 0 ++ ++#if 0 /* 64 bit */ ++// Dword 4 ++#define SET_TX_BUFF_DESC_LEN_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 16, __Value) ++#define SET_TX_BUFF_DESC_AMSDU_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 31, 1, __Value) ++// Dword 5 ++#define SET_TX_BUFF_DESC_ADDR_LOW_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 32, __Value) ++// Dword 6 ++#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 32, __Value) ++// Dword 7 //RESERVED 0 ++// Dword 8 ++#define SET_TX_BUFF_DESC_LEN_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 16, __Value) ++#define SET_TX_BUFF_DESC_AMSDU_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 31, 1, __Value) ++// Dword 9 ++#define SET_TX_BUFF_DESC_ADDR_LOW_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 32, __Value) ++// Dword 10 ++#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) ++// Dword 11 //RESERVED 0 ++// Dword 12 ++#define SET_TX_BUFF_DESC_LEN_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 16, __Value) ++#define SET_TX_BUFF_DESC_AMSDU_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 31, 1, __Value) ++// Dword 13 ++#define SET_TX_BUFF_DESC_ADDR_LOW_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+52, 0, 32, __Value) ++// Dword 14 ++#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+56, 0, 32, __Value) ++// Dword 15 //RESERVED 0 ++#endif ++ ++//=====Desc content ++//TX Info ++//============= ++// Dword 0 ++#define SET_TX_DESC_PKT_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) ++#define GET_TX_DESC_PKT_SIZE_8814A(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc, 0, 16) ++#define SET_TX_DESC_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) ++#define GET_TX_DESC_OFFSET_8814A(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc, 16, 8) ++#define SET_TX_DESC_BMC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) ++#define SET_TX_DESC_HTC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) ++#define SET_TX_DESC_LAST_SEG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) ++#define SET_TX_DESC_LINIP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) ++#define SET_TX_DESC_AMSDU_PAD_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) ++#define SET_TX_DESC_NO_ACM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) ++#define SET_TX_DESC_GF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) ++#define SET_TX_DESC_DISQSELSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) ++ ++// Dword 1 ++#define SET_TX_DESC_MACID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) ++#define SET_TX_DESC_QUEUE_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) ++#define SET_TX_DESC_RDG_NAV_EXT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) ++#define SET_TX_DESC_LSIG_TXOP_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) ++#define SET_TX_DESC_PIFS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) ++#define SET_TX_DESC_RATE_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) ++#define SET_TX_DESC_EN_DESC_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) ++#define SET_TX_DESC_SEC_TYPE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) ++#define SET_TX_DESC_PKT_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) ++#define SET_TX_DESC_MORE_DATA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) ++#define SET_TX_DESC_TXOP_PS_CAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) ++#define SET_TX_DESC_TXOP_PS_MODE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) ++ ++ ++// Dword 2 ++#define SET_TX_DESC_PAID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) ++#define SET_TX_DESC_CCA_RTS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) ++#define SET_TX_DESC_AGG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) ++#define SET_TX_DESC_RDG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) ++#define SET_TX_DESC_NULL_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) ++#define SET_TX_DESC_NULL_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) ++#define SET_TX_DESC_BK_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) ++#define SET_TX_DESC_MORE_FRAG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) ++#define GET_TX_DESC_MORE_FRAG_8814A(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc+8, 17, 1) ++#define SET_TX_DESC_RAW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) ++#define SET_TX_DESC_SPE_RPT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) ++#define SET_TX_DESC_AMPDU_DENSITY_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) ++#define SET_TX_DESC_BT_NULL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) ++#define SET_TX_DESC_GID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) ++#define SET_TX_DESC_HW_AES_IV_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 31, 1, __Value) ++ ++ ++// Dword 3 ++#define SET_TX_DESC_WHEADER_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 5, __Value) ++#define SET_TX_DESC_EARLY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) ++#define SET_TX_DESC_HW_SSN_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) ++#define SET_TX_DESC_USE_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) ++#define SET_TX_DESC_DISABLE_RTS_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) ++#define SET_TX_DESC_DISABLE_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) ++#define SET_TX_DESC_CTS2SELF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) ++#define SET_TX_DESC_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) ++#define SET_TX_DESC_HW_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) ++#define SET_TX_DESC_CHECK_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) ++#define SET_TX_DESC_NAV_USE_HDR_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) ++#define SET_TX_DESC_USE_MAX_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) ++#define SET_TX_DESC_MAX_AGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) ++#define SET_TX_DESC_NDPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) ++#define SET_TX_DESC_AMPDU_MAX_TIME_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) ++ ++// Dword 4 ++#define SET_TX_DESC_TX_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) ++#define SET_TX_DESC_TRY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) ++#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) ++#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) ++#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) ++#define SET_TX_DESC_DATA_RETRY_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) ++#define SET_TX_DESC_RTS_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) ++#define SET_TX_DESC_PCTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) ++#define SET_TX_DESC_PCTS_MASK_IDX_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) ++ ++ ++// Dword 5 ++#define SET_TX_DESC_DATA_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) ++#define SET_TX_DESC_DATA_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) ++#define SET_TX_DESC_DATA_BW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) ++#define SET_TX_DESC_DATA_LDPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) ++#define SET_TX_DESC_DATA_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) ++#define SET_TX_DESC_CTROL_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) ++#define SET_TX_DESC_RTS_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) ++#define SET_TX_DESC_RTS_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) ++#define SET_TX_DESC_SIGNALING_TA_PKT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 17, 1, __Value) ++#define SET_TX_DESC_PORT_ID_8814A(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 3, __Value)//20130415 KaiYuan add for 8814 ++#define SET_TX_DESC_TX_ANT_8814A(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) ++#define SET_TX_DESC_TX_POWER_OFFSET_8814A(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) ++ ++// Dword 6 ++#define SET_TX_DESC_SW_DEFINE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) ++#define SET_TX_DESC_MBSSID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) ++#define SET_TX_DESC_ANTSEL_A_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) ++#define SET_TX_DESC_ANTSEL_B_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) ++#define SET_TX_DESC_ANT_MAPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 2, __Value) ++#define SET_TX_DESC_ANT_MAPB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 24, 2, __Value) ++#define SET_TX_DESC_ANT_MAPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 26, 2, __Value) ++#define SET_TX_DESC_ANT_MAPD_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 28, 2, __Value) ++ ++ ++// Dword 7 ++#if(DEV_BUS_TYPE == RT_PCI_INTERFACE) ++#define SET_TX_DESC_TX_BUFFER_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#else ++#define SET_TX_DESC_TX_DESC_CHECKSUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) ++#endif ++#define SET_TX_DESC_NTX_MAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 20, 4, __Value) ++#define SET_TX_DESC_USB_TXAGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) ++ ++ ++// Dword 8 ++#define SET_TX_DESC_RTS_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) ++#define SET_TX_DESC_BAR_RTY_TH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) ++#define SET_TX_DESC_DATA_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) ++#define SET_TX_DESC_EN_HWEXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 14, 1, __Value) ++#define SET_TX_DESC_HWSEQ_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) ++#if(DEV_BUS_TYPE != RT_SDIO_INTERFACE) ++#define SET_TX_DESC_NEXT_HEAD_PAGE_L_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) ++#else ++#define SET_TX_DESC_SDIO_SEQ_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) //20130415 KaiYuan add for 8814AS ++#endif ++#define SET_TX_DESC_TAIL_PAGE_L_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) ++ ++// Dword 9 ++#define SET_TX_DESC_PADDING_LENGTH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) ++#define SET_TX_DESC_TXBF_PATH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) ++#define SET_TX_DESC_SEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) ++#define SET_TX_DESC_NEXT_HEAD_PAGE_H_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 4, __Value) ++#define SET_TX_DESC_TAIL_PAGE_H_8814A(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 28, 4, __Value) ++ ++ ++ ++#define SET_EARLYMODE_PKTNUM_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) ++#define SET_EARLYMODE_LEN0_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) ++#define SET_EARLYMODE_LEN1_1_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) ++#define SET_EARLYMODE_LEN1_2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) ++#define SET_EARLYMODE_LEN2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) ++#define SET_EARLYMODE_LEN3_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) ++ ++ ++void rtl8814a_cal_txdesc_chksum(u8 *ptxdesc); ++void rtl8814a_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); ++void rtl8814a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); ++void rtl8814a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); ++void rtl8814a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); ++ ++#ifdef CONFIG_USB_HCI ++s32 rtl8814au_init_xmit_priv(PADAPTER padapter); ++void rtl8814au_free_xmit_priv(PADAPTER padapter); ++s32 rtl8814au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8814au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8814au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtl8814au_xmit_buf_handler(PADAPTER padapter); ++void rtl8814au_xmit_tasklet(void *priv); ++s32 rtl8814au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++#endif //CONFIG_USB_HCI ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8814ae_init_xmit_priv(PADAPTER padapter); ++void rtl8814ae_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf *rtl8814ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++void rtl8814ae_xmitframe_resume(_adapter *padapter); ++s32 rtl8814ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8814ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8814ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++void rtl8814ae_xmit_tasklet(void *priv); ++#endif ++ ++void _dbg_dump_tx_info(_adapter *padapter,int frame_tag, u8 *ptxdesc); ++u8 ++SCMapping_8814( ++ IN PADAPTER Adapter, ++ IN struct pkt_attrib *pattrib ++); ++ ++u8 ++BWMapping_8814( ++ IN PADAPTER Adapter, ++ IN struct pkt_attrib *pattrib ++); ++ ++ ++#endif /* __RTL8814_XMIT_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8821a_spec.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8821a_spec.h +old mode 100755 +new mode 100644 +index a6fe31b..f65fe16 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8821a_spec.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8821a_spec.h +@@ -1,97 +1,108 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- *******************************************************************************/ +-#ifndef __RTL8821A_SPEC_H__ +-#define __RTL8821A_SPEC_H__ +- +-#include +-// This file should based on "hal_com_reg.h" +-#include +-// Because 8812a and 8821a is the same serial, +-// most of 8821a register definitions are the same as 8812a. +-#include +- +- +-//============================================================ +-// 8821A Regsiter offset definition +-//============================================================ +- +-//============================================================ +-// MAC register +-//============================================================ +- +-//----------------------------------------------------- +-// 0x0000h ~ 0x00FFh System Configuration +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// 0x0100h ~ 0x01FFh MACTOP General Configuration +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// 0x0200h ~ 0x027Fh TXDMA Configuration +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// 0x0280h ~ 0x02FFh RXDMA Configuration +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// 0x0300h ~ 0x03FFh PCIe +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// 0x0400h ~ 0x047Fh Protocol Configuration +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// 0x0500h ~ 0x05FFh EDCA Configuration +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// 0x0600h ~ 0x07FFh WMAC Configuration +-//----------------------------------------------------- +- +- +-//============================================================ +-// SDIO Bus Specification +-//============================================================ +- +-//----------------------------------------------------- +-// SDIO CMD Address Mapping +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// I/O bus domain (Host) +-//----------------------------------------------------- +- +-//----------------------------------------------------- +-// SDIO register +-//----------------------------------------------------- +-#undef SDIO_REG_HCPWM1 +-#define SDIO_REG_FREE_TXPG2 0x024 +-#define SDIO_REG_HCPWM1 0x025 +- +- +-//============================================================ +-// Regsiter Bit and Content definition +-//============================================================ +- +- +-#endif // __RTL8821A_SPEC_H__ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#ifndef __RTL8821A_SPEC_H__ ++#define __RTL8821A_SPEC_H__ ++ ++#include ++// This file should based on "hal_com_reg.h" ++#include ++// Because 8812a and 8821a is the same serial, ++// most of 8821a register definitions are the same as 8812a. ++#include ++ ++ ++//============================================================ ++// 8821A Regsiter offset definition ++//============================================================ ++ ++//============================================================ ++// MAC register ++//============================================================ ++ ++//----------------------------------------------------- ++// 0x0000h ~ 0x00FFh System Configuration ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++//----------------------------------------------------- ++#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN ++ ++//----------------------------------------------------- ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0300h ~ 0x03FFh PCIe ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0400h ~ 0x047Fh Protocol Configuration ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0500h ~ 0x05FFh EDCA Configuration ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// 0x0600h ~ 0x07FFh WMAC Configuration ++//----------------------------------------------------- ++ ++ ++//============================================================ ++// SDIO Bus Specification ++//============================================================ ++ ++//----------------------------------------------------- ++// SDIO CMD Address Mapping ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// I/O bus domain (Host) ++//----------------------------------------------------- ++ ++//----------------------------------------------------- ++// SDIO register ++//----------------------------------------------------- ++#undef SDIO_REG_HCPWM1 ++#define SDIO_REG_FREE_TXPG2 0x024 ++#define SDIO_REG_HCPWM1 0x025 ++ ++ ++//============================================================ ++// Regsiter Bit and Content definition ++//============================================================ ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MACID_NUM_8821A 128 ++#define SEC_CAM_ENT_NUM_8821A 64 ++#define NSS_NUM_8821A 1 ++#define BAND_CAP_8821A (BAND_CAP_2G | BAND_CAP_5G) ++#define BW_CAP_8821A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M) ++#define PROTO_CAP_8821A (PROTO_CAP_11B|PROTO_CAP_11G|PROTO_CAP_11N|PROTO_CAP_11AC) ++ ++#endif /* __RTL8821A_SPEC_H__ */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8821a_xmit.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8821a_xmit.h +old mode 100755 +new mode 100644 +index 2b7320d..8128f80 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8821a_xmit.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8821a_xmit.h +@@ -1,180 +1,180 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTL8821A_XMIT_H__ +-#define __RTL8821A_XMIT_H__ +- +-#include +- +-typedef struct txdescriptor_8821a +-{ +- // Offset 0 +- u32 pktlen:16; +- u32 offset:8; +- u32 bmc:1; +- u32 htc:1; +- u32 rsvd0026:1; +- u32 rsvd0027:1; +- u32 linip:1; +- u32 noacm:1; +- u32 gf:1; +- u32 rsvd0031:1; +- +- // Offset 4 +- u32 macid:7; +- u32 rsvd0407:1; +- u32 qsel:5; +- u32 rdg_nav_ext:1; +- u32 lsig_txop_en:1; +- u32 pifs:1; +- u32 rate_id:5; +- u32 en_desc_id:1; +- u32 sectype:2; +- u32 pkt_offset:5; // unit: 8 bytes +- u32 moredata:1; +- u32 txop_ps_cap:1; +- u32 txop_ps_mode:1; +- +- // Offset 8 +- u32 p_aid:9; +- u32 rsvd0809:1; +- u32 cca_rts:2; +- u32 agg_en:1; +- u32 rdg_en:1; +- u32 null_0:1; +- u32 null_1:1; +- u32 bk:1; +- u32 morefrag:1; +- u32 raw:1; +- u32 spe_rpt:1; +- u32 ampdu_density:3; +- u32 bt_null:1; +- u32 g_id:6; +- u32 rsvd0830:2; +- +- // Offset 12 +- u32 wheader_len:4; +- u32 chk_en:1; +- u32 early_rate:1; +- u32 hw_ssn_sel:2; +- u32 userate:1; +- u32 disrtsfb:1; +- u32 disdatafb:1; +- u32 cts2self:1; +- u32 rtsen:1; +- u32 hw_rts_en:1; +- u32 port_id:1; +- u32 navusehdr:1; +- u32 use_max_len:1; +- u32 max_agg_num:5; +- u32 ndpa:2; +- u32 ampdu_max_time:8; +- +- // Offset 16 +- u32 datarate:7; +- u32 try_rate:1; +- u32 data_ratefb_lmt:5; +- u32 rts_ratefb_lmt:4; +- u32 rty_lmt_en:1; +- u32 data_rt_lmt:6; +- u32 rtsrate:5; +- u32 pcts_en:1; +- u32 pcts_mask_idx:2; +- +- // Offset 20 +- u32 data_sc:4; +- u32 data_short:1; +- u32 data_bw:2; +- u32 data_ldpc:1; +- u32 data_stbc:2; +- u32 vcs_stbc:2; +- u32 rts_short:1; +- u32 rts_sc:4; +- u32 rsvd2016:7; +- u32 tx_ant:4; +- u32 txpwr_offset:3; +- u32 rsvd2031:1; +- +- // Offset 24 +- u32 sw_define:12; +- u32 mbssid:4; +- u32 antsel_A:3; +- u32 antsel_B:3; +- u32 antsel_C:3; +- u32 antsel_D:3; +- u32 rsvd2428:4; +- +- // Offset 28 +- u32 checksum:16; +- u32 rsvd2816:8; +- u32 usb_txagg_num:8; +- +- // Offset 32 +- u32 rts_rc:6; +- u32 bar_rty_th:2; +- u32 data_rc:6; +- u32 rsvd3214:1; +- u32 en_hwseq:1; +- u32 nextneadpage:8; +- u32 tailpage:8; +- +- // Offset 36 +- u32 padding_len:11; +- u32 txbf_path:1; +- u32 seq:12; +- u32 final_data_rate:8; +-}TXDESC_8821A, *PTXDESC_8821A; +- +-#ifdef CONFIG_SDIO_HCI +-s32 InitXmitPriv8821AS(PADAPTER padapter); +-void FreeXmitPriv8821AS(PADAPTER padapter); +-s32 XmitBufHandler8821AS(PADAPTER padapter); +-s32 MgntXmit8821AS(PADAPTER padapter, struct xmit_frame *pmgntframe); +-s32 HalXmitNoLock8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 HalXmit8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); +-#ifndef CONFIG_SDIO_TX_TASKLET +-thread_return XmitThread8821AS(thread_context context); +-#endif // !CONFIG_SDIO_TX_TASKLET +-#endif // CONFIG_SDIO_HCI +- +-#if 0 +-#ifdef CONFIG_USB_HCI +-s32 rtl8821au_init_xmit_priv(PADAPTER padapter); +-void rtl8821au_free_xmit_priv(PADAPTER padapter); +-s32 rtl8821au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8821au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-s32 rtl8821au_hal_xmitframe_enqueue(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8821au_xmit_buf_handler(PADAPTER padapter); +-void rtl8821au_xmit_tasklet(void *priv); +-s32 rtl8821au_xmitframe_complete(PADAPTER padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); +-#endif // CONFIG_USB_HCI +- +-#ifdef CONFIG_PCI_HCI +-s32 rtl8821e_init_xmit_priv(PADAPTER padapter); +-void rtl8821e_free_xmit_priv(PADAPTER padapter); +-struct xmit_buf* rtl8821e_dequeue_xmitbuf(struct rtw_tx_ring *ring); +-void rtl8821e_xmitframe_resume(PADAPTER padapter); +-s32 rtl8821e_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); +-s32 rtl8821e_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); +-void rtl8821e_xmit_tasklet(void *priv); +-#endif // CONFIG_PCI_HCI +-#endif +- +-#endif //__RTL8821_XMIT_H__ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8821A_XMIT_H__ ++#define __RTL8821A_XMIT_H__ ++ ++#include ++ ++typedef struct txdescriptor_8821a ++{ ++ // Offset 0 ++ u32 pktlen:16; ++ u32 offset:8; ++ u32 bmc:1; ++ u32 htc:1; ++ u32 rsvd0026:1; ++ u32 rsvd0027:1; ++ u32 linip:1; ++ u32 noacm:1; ++ u32 gf:1; ++ u32 rsvd0031:1; ++ ++ // Offset 4 ++ u32 macid:7; ++ u32 rsvd0407:1; ++ u32 qsel:5; ++ u32 rdg_nav_ext:1; ++ u32 lsig_txop_en:1; ++ u32 pifs:1; ++ u32 rate_id:5; ++ u32 en_desc_id:1; ++ u32 sectype:2; ++ u32 pkt_offset:5; // unit: 8 bytes ++ u32 moredata:1; ++ u32 txop_ps_cap:1; ++ u32 txop_ps_mode:1; ++ ++ // Offset 8 ++ u32 p_aid:9; ++ u32 rsvd0809:1; ++ u32 cca_rts:2; ++ u32 agg_en:1; ++ u32 rdg_en:1; ++ u32 null_0:1; ++ u32 null_1:1; ++ u32 bk:1; ++ u32 morefrag:1; ++ u32 raw:1; ++ u32 spe_rpt:1; ++ u32 ampdu_density:3; ++ u32 bt_null:1; ++ u32 g_id:6; ++ u32 rsvd0830:2; ++ ++ // Offset 12 ++ u32 wheader_len:4; ++ u32 chk_en:1; ++ u32 early_rate:1; ++ u32 hw_ssn_sel:2; ++ u32 userate:1; ++ u32 disrtsfb:1; ++ u32 disdatafb:1; ++ u32 cts2self:1; ++ u32 rtsen:1; ++ u32 hw_rts_en:1; ++ u32 port_id:1; ++ u32 navusehdr:1; ++ u32 use_max_len:1; ++ u32 max_agg_num:5; ++ u32 ndpa:2; ++ u32 ampdu_max_time:8; ++ ++ // Offset 16 ++ u32 datarate:7; ++ u32 try_rate:1; ++ u32 data_ratefb_lmt:5; ++ u32 rts_ratefb_lmt:4; ++ u32 rty_lmt_en:1; ++ u32 data_rt_lmt:6; ++ u32 rtsrate:5; ++ u32 pcts_en:1; ++ u32 pcts_mask_idx:2; ++ ++ // Offset 20 ++ u32 data_sc:4; ++ u32 data_short:1; ++ u32 data_bw:2; ++ u32 data_ldpc:1; ++ u32 data_stbc:2; ++ u32 vcs_stbc:2; ++ u32 rts_short:1; ++ u32 rts_sc:4; ++ u32 rsvd2016:7; ++ u32 tx_ant:4; ++ u32 txpwr_offset:3; ++ u32 rsvd2031:1; ++ ++ // Offset 24 ++ u32 sw_define:12; ++ u32 mbssid:4; ++ u32 antsel_A:3; ++ u32 antsel_B:3; ++ u32 antsel_C:3; ++ u32 antsel_D:3; ++ u32 rsvd2428:4; ++ ++ // Offset 28 ++ u32 checksum:16; ++ u32 rsvd2816:8; ++ u32 usb_txagg_num:8; ++ ++ // Offset 32 ++ u32 rts_rc:6; ++ u32 bar_rty_th:2; ++ u32 data_rc:6; ++ u32 rsvd3214:1; ++ u32 en_hwseq:1; ++ u32 nextneadpage:8; ++ u32 tailpage:8; ++ ++ // Offset 36 ++ u32 padding_len:11; ++ u32 txbf_path:1; ++ u32 seq:12; ++ u32 final_data_rate:8; ++}TXDESC_8821A, *PTXDESC_8821A; ++ ++#ifdef CONFIG_SDIO_HCI ++s32 InitXmitPriv8821AS(PADAPTER padapter); ++void FreeXmitPriv8821AS(PADAPTER padapter); ++s32 XmitBufHandler8821AS(PADAPTER padapter); ++s32 MgntXmit8821AS(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 HalXmitNoLock8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 HalXmit8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); ++#ifndef CONFIG_SDIO_TX_TASKLET ++thread_return XmitThread8821AS(thread_context context); ++#endif // !CONFIG_SDIO_TX_TASKLET ++#endif // CONFIG_SDIO_HCI ++ ++#if 0 ++#ifdef CONFIG_USB_HCI ++s32 rtl8821au_init_xmit_priv(PADAPTER padapter); ++void rtl8821au_free_xmit_priv(PADAPTER padapter); ++s32 rtl8821au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8821au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++s32 rtl8821au_hal_xmitframe_enqueue(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8821au_xmit_buf_handler(PADAPTER padapter); ++void rtl8821au_xmit_tasklet(void *priv); ++s32 rtl8821au_xmitframe_complete(PADAPTER padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++#endif // CONFIG_USB_HCI ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8821e_init_xmit_priv(PADAPTER padapter); ++void rtl8821e_free_xmit_priv(PADAPTER padapter); ++struct xmit_buf* rtl8821e_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++void rtl8821e_xmitframe_resume(PADAPTER padapter); ++s32 rtl8821e_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); ++s32 rtl8821e_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); ++void rtl8821e_xmit_tasklet(void *priv); ++#endif // CONFIG_PCI_HCI ++#endif ++ ++#endif //__RTL8821_XMIT_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_android.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_android.h +old mode 100755 +new mode 100644 +index cc59417..5b52846 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_android.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_android.h +@@ -57,6 +57,7 @@ enum ANDROID_WIFI_CMD { + + ANDROID_WIFI_CMD_MACADDR, + ++ ANDROID_WIFI_CMD_BLOCK_SCAN, + ANDROID_WIFI_CMD_BLOCK, + + ANDROID_WIFI_CMD_WFD_ENABLE, +@@ -69,10 +70,11 @@ enum ANDROID_WIFI_CMD { + ANDROID_WIFI_CMD_HOSTAPD_SET_MACADDR_ACL, + ANDROID_WIFI_CMD_HOSTAPD_ACL_ADD_STA, + ANDROID_WIFI_CMD_HOSTAPD_ACL_REMOVE_STA, +-#ifdef CONFIG_GTK_OL ++#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 1, 0)) + ANDROID_WIFI_CMD_GTK_REKEY_OFFLOAD, + #endif //CONFIG_GTK_OL + ANDROID_WIFI_CMD_P2P_DISABLE, ++ ANDROID_WIFI_CMD_DRIVERVERSION, + ANDROID_WIFI_CMD_MAX + }; + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ap.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ap.h +old mode 100755 +new mode 100644 +index ed8598f..f8246c6 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ap.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ap.h +@@ -1,77 +1,80 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTW_AP_H_ +-#define __RTW_AP_H_ +- +- +-#ifdef CONFIG_AP_MODE +- +-//external function +-extern void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta); +-extern void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta); +- +- +-void init_mlme_ap_info(_adapter *padapter); +-void free_mlme_ap_info(_adapter *padapter); +-//void update_BCNTIM(_adapter *padapter); +-void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len); +-void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index); +-void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag); +-#define update_beacon(adapter, ie_id, oui, tx) _update_beacon((adapter), (ie_id), (oui), (tx), __func__) +-void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level); +-void expire_timeout_chk(_adapter *padapter); +-void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta); +-void start_bss_network(_adapter *padapter, u8 *pbuf); +-int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len); +-void rtw_ap_restore_network(_adapter *padapter); +-void rtw_set_macaddr_acl(_adapter *padapter, int mode); +-int rtw_acl_add_sta(_adapter *padapter, u8 *addr); +-int rtw_acl_remove_sta(_adapter *padapter, u8 *addr); +- +-u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta); +-int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid); +-int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx); +- +-#ifdef CONFIG_NATIVEAP_MLME +-void associated_clients_update(_adapter *padapter, u8 updated); +-void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta); +-u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta); +-void sta_info_update(_adapter *padapter, struct sta_info *psta); +-void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta); +-u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason); +-int rtw_sta_flush(_adapter *padapter); +-int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset); +-void start_ap_mode(_adapter *padapter); +-void stop_ap_mode(_adapter *padapter); +-#endif +- +-#ifdef CONFIG_CONCURRENT_MODE +-void concurrent_set_ap_chbw(_adapter *padapter, u8 channel, u8 channel_offset, u8 bwmode); +-#endif //CONFIG_CONCURRENT_MODE +- +- +-#ifdef CONFIG_AUTO_AP_MODE +-extern void rtw_start_auto_ap(_adapter *adapter); +-#endif //CONFIG_AUTO_AP_MODE +- +-#endif //end of CONFIG_AP_MODE +- +-#endif +-void update_bmc_sta(_adapter *padapter); ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_AP_H_ ++#define __RTW_AP_H_ ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++//external function ++extern void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta); ++extern void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta); ++ ++ ++void init_mlme_ap_info(_adapter *padapter); ++void free_mlme_ap_info(_adapter *padapter); ++//void update_BCNTIM(_adapter *padapter); ++void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len); ++void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index); ++void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag); ++#define update_beacon(adapter, ie_id, oui, tx) _update_beacon((adapter), (ie_id), (oui), (tx), __func__) ++void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level); ++void expire_timeout_chk(_adapter *padapter); ++void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta); ++void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter); ++void start_bss_network(_adapter *padapter, struct createbss_parm *parm); ++int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len); ++void rtw_ap_restore_network(_adapter *padapter); ++void rtw_set_macaddr_acl(_adapter *padapter, int mode); ++int rtw_acl_add_sta(_adapter *padapter, u8 *addr); ++int rtw_acl_remove_sta(_adapter *padapter, u8 *addr); ++ ++u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta); ++int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid); ++int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx); ++ ++#ifdef CONFIG_NATIVEAP_MLME ++void associated_clients_update(_adapter *padapter, u8 updated, u32 sta_info_type); ++void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta); ++u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta); ++void sta_info_update(_adapter *padapter, struct sta_info *psta); ++void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta); ++u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason, bool enqueue); ++int rtw_sta_flush(_adapter *padapter, bool enqueue); ++int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset); ++void start_ap_mode(_adapter *padapter); ++void stop_ap_mode(_adapter *padapter); ++#endif ++ ++void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, u8 offset); ++bool rtw_ap_chbw_decision(_adapter *adapter, u8 req_ch, u8 req_bw, u8 req_offset, u8 *ch, u8 *bw, u8 *offset); ++ ++#ifdef CONFIG_AUTO_AP_MODE ++extern void rtw_start_auto_ap(_adapter *adapter); ++#endif //CONFIG_AUTO_AP_MODE ++ ++#endif //end of CONFIG_AP_MODE ++ ++#endif ++void update_bmc_sta(_adapter *padapter); ++ ++void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field); ++void rtw_process_public_act_bsscoex(_adapter *padapter, u8 *pframe, uint frame_len); ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_beamforming.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_beamforming.h +old mode 100755 +new mode 100644 +index 69d7819..fde6100 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_beamforming.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_beamforming.h +@@ -1,142 +1,150 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTW_BEAMFORMING_H_ +-#define __RTW_BEAMFORMING_H_ +- +-#define BEAMFORMING_ENTRY_NUM 2 +-#define GET_BEAMFORM_INFO(_pmlmepriv) ((struct beamforming_info *)(&(_pmlmepriv)->beamforming_info)) +- +-typedef enum _BEAMFORMING_ENTRY_STATE +-{ +- BEAMFORMING_ENTRY_STATE_UNINITIALIZE, +- BEAMFORMING_ENTRY_STATE_INITIALIZEING, +- BEAMFORMING_ENTRY_STATE_INITIALIZED, +- BEAMFORMING_ENTRY_STATE_PROGRESSING, +- BEAMFORMING_ENTRY_STATE_PROGRESSED, +-}BEAMFORMING_ENTRY_STATE, *PBEAMFORMING_ENTRY_STATE; +- +- +-typedef enum _BEAMFORMING_STATE +-{ +- BEAMFORMING_STATE_IDLE, +- BEAMFORMING_STATE_START, +- BEAMFORMING_STATE_END, +-}BEAMFORMING_STATE, *PBEAMFORMING_STATE; +- +- +-typedef enum _BEAMFORMING_CAP +-{ +- BEAMFORMING_CAP_NONE = 0x0, +- BEAMFORMER_CAP_HT_EXPLICIT = 0x1, +- BEAMFORMEE_CAP_HT_EXPLICIT = 0x2, +- BEAMFORMER_CAP_VHT_SU = 0x4, // Self has er Cap, because Reg er & peer ee +- BEAMFORMEE_CAP_VHT_SU = 0x8, // Self has ee Cap, because Reg ee & peer er +- BEAMFORMER_CAP = 0x10, +- BEAMFORMEE_CAP = 0x20, +-}BEAMFORMING_CAP, *PBEAMFORMING_CAP; +- +- +-typedef enum _SOUNDING_MODE +-{ +- SOUNDING_SW_VHT_TIMER = 0x0, +- SOUNDING_SW_HT_TIMER = 0x1, +- SOUNDING_STOP_All_TIMER = 0x2, +- SOUNDING_HW_VHT_TIMER = 0x3, +- SOUNDING_HW_HT_TIMER = 0x4, +- SOUNDING_STOP_OID_TIMER = 0x5, +- SOUNDING_AUTO_VHT_TIMER = 0x6, +- SOUNDING_AUTO_HT_TIMER = 0x7, +- SOUNDING_FW_VHT_TIMER = 0x8, +- SOUNDING_FW_HT_TIMER = 0x9, +-}SOUNDING_MODE, *PSOUNDING_MODE; +- +- +-enum BEAMFORMING_CTRL_TYPE +-{ +- BEAMFORMING_CTRL_ENTER = 0, +- BEAMFORMING_CTRL_LEAVE = 1, +- BEAMFORMING_CTRL_START_PERIOD = 2, +- BEAMFORMING_CTRL_END_PERIOD = 3, +- BEAMFORMING_CTRL_SOUNDING_FAIL=4, +- BEAMFORMING_CTRL_SOUNDING_CLK=5, +-}; +- +-struct beamforming_entry { +- BOOLEAN bUsed; +- BOOLEAN bSound; +- u16 aid; // Used to construct AID field of NDPA packet. +- u16 mac_id; // Used to Set Reg42C in IBSS mode. +- u16 p_aid; // Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. +- u8 mac_addr[6];// Used to fill Reg6E4 to fill Mac address of CSI report frame. +- CHANNEL_WIDTH sound_bw; // Sounding BandWidth +- u16 sound_period; +- BEAMFORMING_CAP beamforming_entry_cap; +- BEAMFORMING_ENTRY_STATE beamforming_entry_state; +- u8 LogSeq; +- u8 LogRetryCnt; +- u8 LogSuccessCnt; +- u8 LogStatusFailCnt; +- u8 PreCsiReport[327]; +- u8 DefaultCsiCnt; +- BOOLEAN bDefaultCSI; +-}; +- +-struct sounding_info { +- u8 sound_idx; +- CHANNEL_WIDTH sound_bw; +- SOUNDING_MODE sound_mode; +- u16 sound_period; +-}; +- +-struct beamforming_info { +- BEAMFORMING_CAP beamforming_cap; +- BEAMFORMING_STATE beamforming_state; +- struct beamforming_entry beamforming_entry[BEAMFORMING_ENTRY_NUM]; +- u8 beamforming_cur_idx; +- u8 beamforming_in_progress; +- u8 sounding_sequence; +- struct sounding_info sounding_info; +-}; +- +-struct rtw_ndpa_sta_info { +- u16 aid:12; +- u16 feedback_type:1; +- u16 nc_index:3; +-}; +- +-BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv ,u8 mac_id); +-void beamforming_notify(PADAPTER adapter); +-BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo); +- +-u32 beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame); +-void beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame); +- +-BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx); +-BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx); +- +-void beamforming_check_sounding_success(PADAPTER Adapter,BOOLEAN status); +- +-void beamforming_watchdog(PADAPTER Adapter); +- +-void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf); +-u8 beamforming_wk_cmd(_adapter*padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue); +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_BEAMFORMING_H_ ++#define __RTW_BEAMFORMING_H_ ++ ++#ifdef CONFIG_BEAMFORMING ++ ++#if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/ ++#define BEAMFORMING_ENTRY_NUM 2 ++#define GET_BEAMFORM_INFO(_pmlmepriv) ((struct beamforming_info *)(&(_pmlmepriv)->beamforming_info)) ++ ++ ++typedef enum _BEAMFORMING_ENTRY_STATE ++{ ++ BEAMFORMING_ENTRY_STATE_UNINITIALIZE, ++ BEAMFORMING_ENTRY_STATE_INITIALIZEING, ++ BEAMFORMING_ENTRY_STATE_INITIALIZED, ++ BEAMFORMING_ENTRY_STATE_PROGRESSING, ++ BEAMFORMING_ENTRY_STATE_PROGRESSED, ++}BEAMFORMING_ENTRY_STATE, *PBEAMFORMING_ENTRY_STATE; ++ ++ ++typedef enum _BEAMFORMING_STATE ++{ ++ BEAMFORMING_STATE_IDLE, ++ BEAMFORMING_STATE_START, ++ BEAMFORMING_STATE_END, ++}BEAMFORMING_STATE, *PBEAMFORMING_STATE; ++ ++ ++typedef enum _BEAMFORMING_CAP ++{ ++ BEAMFORMING_CAP_NONE = 0x0, ++ BEAMFORMER_CAP_HT_EXPLICIT = 0x1, ++ BEAMFORMEE_CAP_HT_EXPLICIT = 0x2, ++ BEAMFORMER_CAP_VHT_SU = 0x4, // Self has er Cap, because Reg er & peer ee ++ BEAMFORMEE_CAP_VHT_SU = 0x8, // Self has ee Cap, because Reg ee & peer er ++ BEAMFORMER_CAP = 0x10, ++ BEAMFORMEE_CAP = 0x20, ++}BEAMFORMING_CAP, *PBEAMFORMING_CAP; ++ ++ ++typedef enum _SOUNDING_MODE ++{ ++ SOUNDING_SW_VHT_TIMER = 0x0, ++ SOUNDING_SW_HT_TIMER = 0x1, ++ SOUNDING_STOP_All_TIMER = 0x2, ++ SOUNDING_HW_VHT_TIMER = 0x3, ++ SOUNDING_HW_HT_TIMER = 0x4, ++ SOUNDING_STOP_OID_TIMER = 0x5, ++ SOUNDING_AUTO_VHT_TIMER = 0x6, ++ SOUNDING_AUTO_HT_TIMER = 0x7, ++ SOUNDING_FW_VHT_TIMER = 0x8, ++ SOUNDING_FW_HT_TIMER = 0x9, ++}SOUNDING_MODE, *PSOUNDING_MODE; ++ ++struct beamforming_entry { ++ BOOLEAN bUsed; ++ BOOLEAN bSound; ++ u16 aid; // Used to construct AID field of NDPA packet. ++ u16 mac_id; // Used to Set Reg42C in IBSS mode. ++ u16 p_aid; // Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. ++ u16 g_id; ++ u8 mac_addr[6];// Used to fill Reg6E4 to fill Mac address of CSI report frame. ++ CHANNEL_WIDTH sound_bw; // Sounding BandWidth ++ u16 sound_period; ++ BEAMFORMING_CAP beamforming_entry_cap; ++ BEAMFORMING_ENTRY_STATE beamforming_entry_state; ++ u8 ClockResetTimes; /*Modified by Jeffery @2015-04-10*/ ++ u8 PreLogSeq; /*Modified by Jeffery @2015-03-30*/ ++ u8 LogSeq; /*Modified by Jeffery @2014-10-29*/ ++ u16 LogRetryCnt:3; /*Modified by Jeffery @2014-10-29*/ ++ u16 LogSuccess:2; /*Modified by Jeffery @2014-10-29*/ ++ ++ u8 LogStatusFailCnt; ++ u8 PreCsiReport[327]; ++ u8 DefaultCsiCnt; ++ BOOLEAN bDefaultCSI; ++}; ++ ++struct sounding_info { ++ u8 sound_idx; ++ CHANNEL_WIDTH sound_bw; ++ SOUNDING_MODE sound_mode; ++ u16 sound_period; ++}; ++ ++struct beamforming_info { ++ BEAMFORMING_CAP beamforming_cap; ++ BEAMFORMING_STATE beamforming_state; ++ struct beamforming_entry beamforming_entry[BEAMFORMING_ENTRY_NUM]; ++ u8 beamforming_cur_idx; ++ u8 beamforming_in_progress; ++ u8 sounding_sequence; ++ struct sounding_info sounding_info; ++}; ++ ++struct rtw_ndpa_sta_info { ++ u16 aid:12; ++ u16 feedback_type:1; ++ u16 nc_index:3; ++}; ++ ++BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv ,u8 mac_id); ++void beamforming_notify(PADAPTER adapter); ++BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo); ++ ++BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx); ++BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx); ++ ++void beamforming_check_sounding_success(PADAPTER Adapter,BOOLEAN status); ++ ++void beamforming_watchdog(PADAPTER Adapter); ++#endif /*#if (BEAMFORMING_SUPPORT ==0)- for diver defined beamforming*/ ++ ++enum BEAMFORMING_CTRL_TYPE { ++ BEAMFORMING_CTRL_ENTER = 0, ++ BEAMFORMING_CTRL_LEAVE = 1, ++ BEAMFORMING_CTRL_START_PERIOD = 2, ++ BEAMFORMING_CTRL_END_PERIOD = 3, ++ BEAMFORMING_CTRL_SOUNDING_FAIL = 4, ++ BEAMFORMING_CTRL_SOUNDING_CLK = 5, ++}; ++u32 beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame); ++void beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame); ++ ++void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf); ++u8 beamforming_wk_cmd(_adapter*padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue); ++void update_attrib_txbf_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta); ++ ++#endif /*#ifdef CONFIG_BEAMFORMING */ ++ ++#endif /*__RTW_BEAMFORMING_H_*/ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_br_ext.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_br_ext.h +old mode 100755 +new mode 100644 +index c8d7801..dcb5101 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_br_ext.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_br_ext.h +@@ -29,7 +29,7 @@ + #define DEBUG_INFO //DBG_8192C + #define DEBUG_ERR DBG_8192C + //#define GET_MY_HWADDR ((GET_MIB(priv))->dot11OperationEntry.hwaddr) +-#define GET_MY_HWADDR(padapter) ((padapter)->eeprompriv.mac_addr) ++#define GET_MY_HWADDR(padapter) (adapter_mac_addr(padapter)) + #endif // rtw_wifi_driver + + #define NAT25_HASH_BITS 4 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_bt_mp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_bt_mp.h +old mode 100755 +new mode 100644 +index 9ede51a..4624ccd +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_bt_mp.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_bt_mp.h +@@ -1,319 +1,295 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +- +-#ifndef __RTW_BT_MP_H +-#define __RTW_BT_MP_H +- +- +-#if(MP_DRIVER == 1) +- +-#pragma pack(1) +- +-// definition for BT_UP_OP_BT_READY +-#define MP_BT_NOT_READY 0 +-#define MP_BT_READY 1 +- +-// definition for BT_UP_OP_BT_SET_MODE +-typedef enum _MP_BT_MODE{ +- MP_BT_MODE_RF_TXRX_TEST_MODE = 0, +- MP_BT_MODE_BT20_DUT_TEST_MODE = 1, +- MP_BT_MODE_BT40_DIRECT_TEST_MODE = 2, +- MP_BT_MODE_CONNECT_TEST_MODE = 3, +- MP_BT_MODE_MAX +-}MP_BT_MODE,*PMP_BT_MODE; +- +- +-// definition for BT_UP_OP_BT_SET_TX_RX_PARAMETER +-typedef struct _BT_TXRX_PARAMETERS{ +- u1Byte txrxChannel; +- u4Byte txrxTxPktCnt; +- u1Byte txrxTxPktInterval; +- u1Byte txrxPayloadType; +- u1Byte txrxPktType; +- u2Byte txrxPayloadLen; +- u4Byte txrxPktHeader; +- u1Byte txrxWhitenCoeff; +- u1Byte txrxBdaddr[6]; +- u1Byte txrxTxGainIndex; +-} BT_TXRX_PARAMETERS, *PBT_TXRX_PARAMETERS; +- +-// txrxPktType +-typedef enum _MP_BT_PKT_TYPE{ +- MP_BT_PKT_DH1 = 0, +- MP_BT_PKT_DH3 = 1, +- MP_BT_PKT_DH5 = 2, +- MP_BT_PKT_2DH1 = 3, +- MP_BT_PKT_2DH3 = 4, +- MP_BT_PKT_2DH5 = 5, +- MP_BT_PKT_3DH1 = 6, +- MP_BT_PKT_3DH3 = 7, +- MP_BT_PKT_3DH5 = 8, +- MP_BT_PKT_LE = 9, +- MP_BT_PKT_MAX +-}MP_BT_PKT_TYPE,*PMP_BT_PKT_TYPE; +-// txrxPayloadType +-typedef enum _MP_BT_PAYLOAD_TYPE{ +- MP_BT_PAYLOAD_01010101 = 0, +- MP_BT_PAYLOAD_ALL_1 = 1, +- MP_BT_PAYLOAD_ALL_0 = 2, +- MP_BT_PAYLOAD_11110000 = 3, +- MP_BT_PAYLOAD_PRBS9 = 4, +- MP_BT_PAYLOAD_MAX = 8, +-}MP_BT_PAYLOAD_TYPE,*PMP_BT_PAYLOAD_TYPE; +- +- +-// definition for BT_UP_OP_BT_TEST_CTRL +-typedef enum _MP_BT_TEST_CTRL{ +- MP_BT_TEST_STOP_ALL_TESTS = 0, +- MP_BT_TEST_START_RX_TEST = 1, +- MP_BT_TEST_START_PACKET_TX_TEST = 2, +- MP_BT_TEST_START_CONTINUOUS_TX_TEST = 3, +- MP_BT_TEST_START_INQUIRY_SCAN_TEST = 4, +- MP_BT_TEST_START_PAGE_SCAN_TEST = 5, +- MP_BT_TEST_START_INQUIRY_PAGE_SCAN_TEST = 6, +- MP_BT_TEST_START_LEGACY_CONNECT_TEST = 7, +- MP_BT_TEST_START_LE_CONNECT_TEST_INITIATOR = 8, +- MP_BT_TEST_START_LE_CONNECT_TEST_ADVERTISER = 9, +- MP_BT_TEST_MAX +-}MP_BT_TEST_CTRL,*PMP_BT_TEST_CTRL; +- +- +-typedef enum _RTL_EXT_C2H_EVT +-{ +- EXT_C2H_WIFI_FW_ACTIVE_RSP = 0, +- EXT_C2H_TRIG_BY_BT_FW = 1, +- MAX_EXT_C2HEVENT +-}RTL_EXT_C2H_EVT; +- +- +-// return status definition to the user layer +-typedef enum _BT_CTRL_STATUS{ +- BT_STATUS_SUCCESS = 0x00, // Success +- BT_STATUS_BT_OP_SUCCESS = 0x01, // bt fw op execution success +- BT_STATUS_H2C_SUCCESS = 0x02, // H2c success +- BT_STATUS_H2C_TIMTOUT = 0x03, // H2c timeout +- BT_STATUS_H2C_BT_NO_RSP = 0x04, // H2c sent, bt no rsp +- BT_STATUS_C2H_SUCCESS = 0x05, // C2h success +- BT_STATUS_C2H_REQNUM_MISMATCH = 0x06, // bt fw wrong rsp +- BT_STATUS_OPCODE_U_VERSION_MISMATCH = 0x07, // Upper layer OP code version mismatch. +- BT_STATUS_OPCODE_L_VERSION_MISMATCH = 0x08, // Lower layer OP code version mismatch. +- BT_STATUS_UNKNOWN_OPCODE_U = 0x09, // Unknown Upper layer OP code +- BT_STATUS_UNKNOWN_OPCODE_L = 0x0a, // Unknown Lower layer OP code +- BT_STATUS_PARAMETER_FORMAT_ERROR_U = 0x0b, // Wrong parameters sent by upper layer. +- BT_STATUS_PARAMETER_FORMAT_ERROR_L = 0x0c, // bt fw parameter format is not consistency +- BT_STATUS_PARAMETER_OUT_OF_RANGE_U = 0x0d, // uppery layer parameter value is out of range +- BT_STATUS_PARAMETER_OUT_OF_RANGE_L = 0x0e, // bt fw parameter value is out of range +- BT_STATUS_UNKNOWN_STATUS_L = 0x0f, // bt returned an defined status code +- BT_STATUS_UNKNOWN_STATUS_H = 0x10, // driver need to do error handle or not handle-well. +- BT_STATUS_WRONG_LEVEL = 0x11, // should be under passive level +- BT_STATUS_MAX +-}BT_CTRL_STATUS,*PBT_CTRL_STATUS; +- +-// OP codes definition between the user layer and driver +-typedef enum _BT_CTRL_OPCODE_UPPER{ +- BT_UP_OP_BT_READY = 0x00, +- BT_UP_OP_BT_SET_MODE = 0x01, +- BT_UP_OP_BT_SET_TX_RX_PARAMETER = 0x02, +- BT_UP_OP_BT_SET_GENERAL = 0x03, +- BT_UP_OP_BT_GET_GENERAL = 0x04, +- BT_UP_OP_BT_TEST_CTRL = 0x05, +- BT_UP_OP_TEST_BT = 0x06, +- BT_UP_OP_MAX +-}BT_CTRL_OPCODE_UPPER,*PBT_CTRL_OPCODE_UPPER; +- +- +-typedef enum _BT_SET_GENERAL{ +- BT_GSET_REG = 0x00, +- BT_GSET_RESET = 0x01, +- BT_GSET_TARGET_BD_ADDR = 0x02, +- BT_GSET_TX_PWR_FINETUNE = 0x03, +- BT_SET_TRACKING_INTERVAL = 0x04, +- BT_SET_THERMAL_METER = 0x05, +- BT_ENABLE_CFO_TRACKING = 0x06, +- BT_GSET_UPDATE_BT_PATCH = 0x07, +- BT_GSET_MAX +-}BT_SET_GENERAL,*PBT_SET_GENERAL; +- +-typedef enum _BT_GET_GENERAL{ +- BT_GGET_REG = 0x00, +- BT_GGET_STATUS = 0x01, +- BT_GGET_REPORT = 0x02, +- BT_GGET_AFH_MAP = 0x03, +- BT_GGET_AFH_STATUS = 0x04, +- BT_GGET_MAX +-}BT_GET_GENERAL,*PBT_GET_GENERAL; +- +-// definition for BT_UP_OP_BT_SET_GENERAL +-typedef enum _BT_REG_TYPE{ +- BT_REG_RF = 0, +- BT_REG_MODEM = 1, +- BT_REG_BLUEWIZE = 2, +- BT_REG_VENDOR = 3, +- BT_REG_LE = 4, +- BT_REG_MAX +-}BT_REG_TYPE,*PBT_REG_TYPE; +- +-// definition for BT_LO_OP_GET_AFH_MAP +-typedef enum _BT_AFH_MAP_TYPE{ +- BT_AFH_MAP_RESULT = 0, +- BT_AFH_MAP_WIFI_PSD_ONLY = 1, +- BT_AFH_MAP_WIFI_CH_BW_ONLY = 2, +- BT_AFH_MAP_BT_PSD_ONLY = 3, +- BT_AFH_MAP_HOST_CLASSIFICATION_ONLY = 4, +- BT_AFH_MAP_MAX +-}BT_AFH_MAP_TYPE,*PBT_AFH_MAP_TYPE; +- +-// definition for BT_UP_OP_BT_GET_GENERAL +-typedef enum _BT_REPORT_TYPE{ +- BT_REPORT_RX_PACKET_CNT = 0, +- BT_REPORT_RX_ERROR_BITS = 1, +- BT_REPORT_RSSI = 2, +- BT_REPORT_CFO_HDR_QUALITY = 3, +- BT_REPORT_CONNECT_TARGET_BD_ADDR = 4, +- BT_REPORT_MAX +-}BT_REPORT_TYPE,*PBT_REPORT_TYPE; +- +-VOID +-MPTBT_Test( +- IN PADAPTER Adapter, +- IN u1Byte opCode, +- IN u1Byte byte1, +- IN u1Byte byte2, +- IN u1Byte byte3 +- ); +- +-NDIS_STATUS +-MPTBT_SendOidBT( +- IN PADAPTER pAdapter, +- IN PVOID InformationBuffer, +- IN ULONG InformationBufferLength, +- OUT PULONG BytesRead, +- OUT PULONG BytesNeeded +- ); +- +-VOID +-MPTBT_FwC2hBtMpCtrl( +- PADAPTER Adapter, +- pu1Byte tmpBuf, +- u1Byte length +- ); +- +-void MPh2c_timeout_handle(void *FunctionContext); +- +-VOID mptbt_BtControlProcess( +- PADAPTER Adapter, +- PVOID pInBuf +- ); +- +-#define BT_H2C_MAX_RETRY 1 +-#define BT_MAX_C2H_LEN 20 +- +-typedef struct _BT_REQ_CMD{ +- UCHAR opCodeVer; +- UCHAR OpCode; +- USHORT paraLength; +- UCHAR pParamStart[100]; +-} BT_REQ_CMD, *PBT_REQ_CMD; +- +-typedef struct _BT_RSP_CMD{ +- USHORT status; +- USHORT paraLength; +- UCHAR pParamStart[100]; +-} BT_RSP_CMD, *PBT_RSP_CMD; +- +- +-typedef struct _BT_H2C{ +- u1Byte opCodeVer:4; +- u1Byte reqNum:4; +- u1Byte opCode; +- u1Byte buf[100]; +-}BT_H2C, *PBT_H2C; +- +- +- +-typedef struct _BT_EXT_C2H{ +- u1Byte extendId; +- u1Byte statusCode:4; +- u1Byte retLen:4; +- u1Byte opCodeVer:4; +- u1Byte reqNum:4; +- u1Byte buf[100]; +-}BT_EXT_C2H, *PBT_EXT_C2H; +- +- +-typedef enum _BT_OPCODE_STATUS{ +- BT_OP_STATUS_SUCCESS = 0x00, // Success +- BT_OP_STATUS_VERSION_MISMATCH = 0x01, +- BT_OP_STATUS_UNKNOWN_OPCODE = 0x02, +- BT_OP_STATUS_ERROR_PARAMETER = 0x03, +- BT_OP_STATUS_MAX +-}BT_OPCODE_STATUS,*PBT_OPCODE_STATUS; +- +- +- +-//OP codes definition between driver and bt fw +-typedef enum _BT_CTRL_OPCODE_LOWER{ +- BT_LO_OP_GET_BT_VERSION = 0x00, +- BT_LO_OP_RESET = 0x01, +- BT_LO_OP_TEST_CTRL = 0x02, +- BT_LO_OP_SET_BT_MODE = 0x03, +- BT_LO_OP_SET_CHNL_TX_GAIN = 0x04, +- BT_LO_OP_SET_PKT_TYPE_LEN = 0x05, +- BT_LO_OP_SET_PKT_CNT_L_PL_TYPE = 0x06, +- BT_LO_OP_SET_PKT_CNT_H_PKT_INTV = 0x07, +- BT_LO_OP_SET_PKT_HEADER = 0x08, +- BT_LO_OP_SET_WHITENCOEFF = 0x09, +- BT_LO_OP_SET_BD_ADDR_L = 0x0a, +- BT_LO_OP_SET_BD_ADDR_H = 0x0b, +- BT_LO_OP_WRITE_REG_ADDR = 0x0c, +- BT_LO_OP_WRITE_REG_VALUE = 0x0d, +- BT_LO_OP_GET_BT_STATUS = 0x0e, +- BT_LO_OP_GET_BD_ADDR_L = 0x0f, +- BT_LO_OP_GET_BD_ADDR_H = 0x10, +- BT_LO_OP_READ_REG = 0x11, +- BT_LO_OP_SET_TARGET_BD_ADDR_L = 0x12, +- BT_LO_OP_SET_TARGET_BD_ADDR_H = 0x13, +- BT_LO_OP_SET_TX_POWER_CALIBRATION = 0x14, +- BT_LO_OP_GET_RX_PKT_CNT_L = 0x15, +- BT_LO_OP_GET_RX_PKT_CNT_H = 0x16, +- BT_LO_OP_GET_RX_ERROR_BITS_L = 0x17, +- BT_LO_OP_GET_RX_ERROR_BITS_H = 0x18, +- BT_LO_OP_GET_RSSI = 0x19, +- BT_LO_OP_GET_CFO_HDR_QUALITY_L = 0x1a, +- BT_LO_OP_GET_CFO_HDR_QUALITY_H = 0x1b, +- BT_LO_OP_GET_TARGET_BD_ADDR_L = 0x1c, +- BT_LO_OP_GET_TARGET_BD_ADDR_H = 0x1d, +- BT_LO_OP_GET_AFH_MAP_L = 0x1e, +- BT_LO_OP_GET_AFH_MAP_M = 0x1f, +- BT_LO_OP_GET_AFH_MAP_H = 0x20, +- BT_LO_OP_GET_AFH_STATUS = 0x21, +- BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, +- BT_LO_OP_SET_THERMAL_METER = 0x23, +- BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, +- BT_LO_OP_MAX +-}BT_CTRL_OPCODE_LOWER,*PBT_CTRL_OPCODE_LOWER; +- +- +- +- +-#endif /* #if(MP_DRIVER == 1) */ +- +-#endif // #ifndef __INC_MPT_BT_H +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __RTW_BT_MP_H ++#define __RTW_BT_MP_H ++ ++ ++#if(MP_DRIVER == 1) ++ ++#pragma pack(1) ++ ++// definition for BT_UP_OP_BT_READY ++#define MP_BT_NOT_READY 0 ++#define MP_BT_READY 1 ++ ++// definition for BT_UP_OP_BT_SET_MODE ++typedef enum _MP_BT_MODE{ ++ MP_BT_MODE_RF_TXRX_TEST_MODE = 0, ++ MP_BT_MODE_BT20_DUT_TEST_MODE = 1, ++ MP_BT_MODE_BT40_DIRECT_TEST_MODE = 2, ++ MP_BT_MODE_CONNECT_TEST_MODE = 3, ++ MP_BT_MODE_MAX ++}MP_BT_MODE,*PMP_BT_MODE; ++ ++ ++// definition for BT_UP_OP_BT_SET_TX_RX_PARAMETER ++typedef struct _BT_TXRX_PARAMETERS{ ++ u1Byte txrxChannel; ++ u4Byte txrxTxPktCnt; ++ u1Byte txrxTxPktInterval; ++ u1Byte txrxPayloadType; ++ u1Byte txrxPktType; ++ u2Byte txrxPayloadLen; ++ u4Byte txrxPktHeader; ++ u1Byte txrxWhitenCoeff; ++ u1Byte txrxBdaddr[6]; ++ u1Byte txrxTxGainIndex; ++} BT_TXRX_PARAMETERS, *PBT_TXRX_PARAMETERS; ++ ++// txrxPktType ++typedef enum _MP_BT_PKT_TYPE{ ++ MP_BT_PKT_DH1 = 0, ++ MP_BT_PKT_DH3 = 1, ++ MP_BT_PKT_DH5 = 2, ++ MP_BT_PKT_2DH1 = 3, ++ MP_BT_PKT_2DH3 = 4, ++ MP_BT_PKT_2DH5 = 5, ++ MP_BT_PKT_3DH1 = 6, ++ MP_BT_PKT_3DH3 = 7, ++ MP_BT_PKT_3DH5 = 8, ++ MP_BT_PKT_LE = 9, ++ MP_BT_PKT_MAX ++}MP_BT_PKT_TYPE,*PMP_BT_PKT_TYPE; ++// txrxPayloadType ++typedef enum _MP_BT_PAYLOAD_TYPE{ ++ MP_BT_PAYLOAD_01010101 = 0, ++ MP_BT_PAYLOAD_ALL_1 = 1, ++ MP_BT_PAYLOAD_ALL_0 = 2, ++ MP_BT_PAYLOAD_11110000 = 3, ++ MP_BT_PAYLOAD_PRBS9 = 4, ++ MP_BT_PAYLOAD_MAX = 8, ++}MP_BT_PAYLOAD_TYPE,*PMP_BT_PAYLOAD_TYPE; ++ ++ ++// definition for BT_UP_OP_BT_TEST_CTRL ++typedef enum _MP_BT_TEST_CTRL{ ++ MP_BT_TEST_STOP_ALL_TESTS = 0, ++ MP_BT_TEST_START_RX_TEST = 1, ++ MP_BT_TEST_START_PACKET_TX_TEST = 2, ++ MP_BT_TEST_START_CONTINUOUS_TX_TEST = 3, ++ MP_BT_TEST_START_INQUIRY_SCAN_TEST = 4, ++ MP_BT_TEST_START_PAGE_SCAN_TEST = 5, ++ MP_BT_TEST_START_INQUIRY_PAGE_SCAN_TEST = 6, ++ MP_BT_TEST_START_LEGACY_CONNECT_TEST = 7, ++ MP_BT_TEST_START_LE_CONNECT_TEST_INITIATOR = 8, ++ MP_BT_TEST_START_LE_CONNECT_TEST_ADVERTISER = 9, ++ MP_BT_TEST_MAX ++}MP_BT_TEST_CTRL,*PMP_BT_TEST_CTRL; ++ ++ ++typedef enum _RTL_EXT_C2H_EVT ++{ ++ EXT_C2H_WIFI_FW_ACTIVE_RSP = 0, ++ EXT_C2H_TRIG_BY_BT_FW = 1, ++ MAX_EXT_C2HEVENT ++}RTL_EXT_C2H_EVT; ++ ++// OP codes definition between the user layer and driver ++typedef enum _BT_CTRL_OPCODE_UPPER{ ++ BT_UP_OP_BT_READY = 0x00, ++ BT_UP_OP_BT_SET_MODE = 0x01, ++ BT_UP_OP_BT_SET_TX_RX_PARAMETER = 0x02, ++ BT_UP_OP_BT_SET_GENERAL = 0x03, ++ BT_UP_OP_BT_GET_GENERAL = 0x04, ++ BT_UP_OP_BT_TEST_CTRL = 0x05, ++ BT_UP_OP_TEST_BT = 0x06, ++ BT_UP_OP_MAX ++}BT_CTRL_OPCODE_UPPER,*PBT_CTRL_OPCODE_UPPER; ++ ++ ++typedef enum _BT_SET_GENERAL{ ++ BT_GSET_REG = 0x00, ++ BT_GSET_RESET = 0x01, ++ BT_GSET_TARGET_BD_ADDR = 0x02, ++ BT_GSET_TX_PWR_FINETUNE = 0x03, ++ BT_SET_TRACKING_INTERVAL = 0x04, ++ BT_SET_THERMAL_METER = 0x05, ++ BT_ENABLE_CFO_TRACKING = 0x06, ++ BT_GSET_UPDATE_BT_PATCH = 0x07, ++ BT_GSET_MAX ++}BT_SET_GENERAL,*PBT_SET_GENERAL; ++ ++typedef enum _BT_GET_GENERAL{ ++ BT_GGET_REG = 0x00, ++ BT_GGET_STATUS = 0x01, ++ BT_GGET_REPORT = 0x02, ++ BT_GGET_AFH_MAP = 0x03, ++ BT_GGET_AFH_STATUS = 0x04, ++ BT_GGET_MAX ++}BT_GET_GENERAL,*PBT_GET_GENERAL; ++ ++// definition for BT_UP_OP_BT_SET_GENERAL ++typedef enum _BT_REG_TYPE{ ++ BT_REG_RF = 0, ++ BT_REG_MODEM = 1, ++ BT_REG_BLUEWIZE = 2, ++ BT_REG_VENDOR = 3, ++ BT_REG_LE = 4, ++ BT_REG_MAX ++}BT_REG_TYPE,*PBT_REG_TYPE; ++ ++// definition for BT_LO_OP_GET_AFH_MAP ++typedef enum _BT_AFH_MAP_TYPE{ ++ BT_AFH_MAP_RESULT = 0, ++ BT_AFH_MAP_WIFI_PSD_ONLY = 1, ++ BT_AFH_MAP_WIFI_CH_BW_ONLY = 2, ++ BT_AFH_MAP_BT_PSD_ONLY = 3, ++ BT_AFH_MAP_HOST_CLASSIFICATION_ONLY = 4, ++ BT_AFH_MAP_MAX ++}BT_AFH_MAP_TYPE,*PBT_AFH_MAP_TYPE; ++ ++// definition for BT_UP_OP_BT_GET_GENERAL ++typedef enum _BT_REPORT_TYPE{ ++ BT_REPORT_RX_PACKET_CNT = 0, ++ BT_REPORT_RX_ERROR_BITS = 1, ++ BT_REPORT_RSSI = 2, ++ BT_REPORT_CFO_HDR_QUALITY = 3, ++ BT_REPORT_CONNECT_TARGET_BD_ADDR = 4, ++ BT_REPORT_MAX ++}BT_REPORT_TYPE,*PBT_REPORT_TYPE; ++ ++VOID ++MPTBT_Test( ++ IN PADAPTER Adapter, ++ IN u1Byte opCode, ++ IN u1Byte byte1, ++ IN u1Byte byte2, ++ IN u1Byte byte3 ++ ); ++ ++NDIS_STATUS ++MPTBT_SendOidBT( ++ IN PADAPTER pAdapter, ++ IN PVOID InformationBuffer, ++ IN ULONG InformationBufferLength, ++ OUT PULONG BytesRead, ++ OUT PULONG BytesNeeded ++ ); ++ ++VOID ++MPTBT_FwC2hBtMpCtrl( ++ PADAPTER Adapter, ++ pu1Byte tmpBuf, ++ u1Byte length ++ ); ++ ++void MPh2c_timeout_handle(void *FunctionContext); ++ ++VOID mptbt_BtControlProcess( ++ PADAPTER Adapter, ++ PVOID pInBuf ++ ); ++ ++#define BT_H2C_MAX_RETRY 1 ++#define BT_MAX_C2H_LEN 20 ++ ++typedef struct _BT_REQ_CMD{ ++ UCHAR opCodeVer; ++ UCHAR OpCode; ++ USHORT paraLength; ++ UCHAR pParamStart[100]; ++} BT_REQ_CMD, *PBT_REQ_CMD; ++ ++typedef struct _BT_RSP_CMD{ ++ USHORT status; ++ USHORT paraLength; ++ UCHAR pParamStart[100]; ++} BT_RSP_CMD, *PBT_RSP_CMD; ++ ++ ++typedef struct _BT_H2C{ ++ u1Byte opCodeVer:4; ++ u1Byte reqNum:4; ++ u1Byte opCode; ++ u1Byte buf[100]; ++}BT_H2C, *PBT_H2C; ++ ++ ++ ++typedef struct _BT_EXT_C2H{ ++ u1Byte extendId; ++ u1Byte statusCode:4; ++ u1Byte retLen:4; ++ u1Byte opCodeVer:4; ++ u1Byte reqNum:4; ++ u1Byte buf[100]; ++}BT_EXT_C2H, *PBT_EXT_C2H; ++ ++ ++typedef enum _BT_OPCODE_STATUS{ ++ BT_OP_STATUS_SUCCESS = 0x00, // Success ++ BT_OP_STATUS_VERSION_MISMATCH = 0x01, ++ BT_OP_STATUS_UNKNOWN_OPCODE = 0x02, ++ BT_OP_STATUS_ERROR_PARAMETER = 0x03, ++ BT_OP_STATUS_MAX ++}BT_OPCODE_STATUS,*PBT_OPCODE_STATUS; ++ ++ ++ ++//OP codes definition between driver and bt fw ++typedef enum _BT_CTRL_OPCODE_LOWER{ ++ BT_LO_OP_GET_BT_VERSION = 0x00, ++ BT_LO_OP_RESET = 0x01, ++ BT_LO_OP_TEST_CTRL = 0x02, ++ BT_LO_OP_SET_BT_MODE = 0x03, ++ BT_LO_OP_SET_CHNL_TX_GAIN = 0x04, ++ BT_LO_OP_SET_PKT_TYPE_LEN = 0x05, ++ BT_LO_OP_SET_PKT_CNT_L_PL_TYPE = 0x06, ++ BT_LO_OP_SET_PKT_CNT_H_PKT_INTV = 0x07, ++ BT_LO_OP_SET_PKT_HEADER = 0x08, ++ BT_LO_OP_SET_WHITENCOEFF = 0x09, ++ BT_LO_OP_SET_BD_ADDR_L = 0x0a, ++ BT_LO_OP_SET_BD_ADDR_H = 0x0b, ++ BT_LO_OP_WRITE_REG_ADDR = 0x0c, ++ BT_LO_OP_WRITE_REG_VALUE = 0x0d, ++ BT_LO_OP_GET_BT_STATUS = 0x0e, ++ BT_LO_OP_GET_BD_ADDR_L = 0x0f, ++ BT_LO_OP_GET_BD_ADDR_H = 0x10, ++ BT_LO_OP_READ_REG = 0x11, ++ BT_LO_OP_SET_TARGET_BD_ADDR_L = 0x12, ++ BT_LO_OP_SET_TARGET_BD_ADDR_H = 0x13, ++ BT_LO_OP_SET_TX_POWER_CALIBRATION = 0x14, ++ BT_LO_OP_GET_RX_PKT_CNT_L = 0x15, ++ BT_LO_OP_GET_RX_PKT_CNT_H = 0x16, ++ BT_LO_OP_GET_RX_ERROR_BITS_L = 0x17, ++ BT_LO_OP_GET_RX_ERROR_BITS_H = 0x18, ++ BT_LO_OP_GET_RSSI = 0x19, ++ BT_LO_OP_GET_CFO_HDR_QUALITY_L = 0x1a, ++ BT_LO_OP_GET_CFO_HDR_QUALITY_H = 0x1b, ++ BT_LO_OP_GET_TARGET_BD_ADDR_L = 0x1c, ++ BT_LO_OP_GET_TARGET_BD_ADDR_H = 0x1d, ++ BT_LO_OP_GET_AFH_MAP_L = 0x1e, ++ BT_LO_OP_GET_AFH_MAP_M = 0x1f, ++ BT_LO_OP_GET_AFH_MAP_H = 0x20, ++ BT_LO_OP_GET_AFH_STATUS = 0x21, ++ BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, ++ BT_LO_OP_SET_THERMAL_METER = 0x23, ++ BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, ++ BT_LO_OP_MAX ++}BT_CTRL_OPCODE_LOWER,*PBT_CTRL_OPCODE_LOWER; ++ ++ ++ ++ ++#endif /* #if(MP_DRIVER == 1) */ ++ ++#endif // #ifndef __INC_MPT_BT_H ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_btcoex.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_btcoex.h +old mode 100755 +new mode 100644 +index e7b2fa0..b1489c4 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_btcoex.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_btcoex.h +@@ -22,6 +22,338 @@ + + #include + ++/* For H2C: H2C_BT_MP_OPER. Return status definition to the user layer */ ++typedef enum _BT_CTRL_STATUS { ++ BT_STATUS_SUCCESS = 0x00, /* Success */ ++ BT_STATUS_BT_OP_SUCCESS = 0x01, /* bt fw op execution success */ ++ BT_STATUS_H2C_SUCCESS = 0x02, /* H2c success */ ++ BT_STATUS_H2C_FAIL = 0x03, /* H2c fail */ ++ BT_STATUS_H2C_LENGTH_EXCEEDED = 0x04, /* H2c command length exceeded */ ++ BT_STATUS_H2C_TIMTOUT = 0x05, /* H2c timeout */ ++ BT_STATUS_H2C_BT_NO_RSP = 0x06, /* H2c sent, bt no rsp */ ++ BT_STATUS_C2H_SUCCESS = 0x07, /* C2h success */ ++ BT_STATUS_C2H_REQNUM_MISMATCH = 0x08, /* bt fw wrong rsp */ ++ BT_STATUS_OPCODE_U_VERSION_MISMATCH = 0x08, /* Upper layer OP code version mismatch. */ ++ BT_STATUS_OPCODE_L_VERSION_MISMATCH = 0x0a, /* Lower layer OP code version mismatch. */ ++ BT_STATUS_UNKNOWN_OPCODE_U = 0x0b, /* Unknown Upper layer OP code */ ++ BT_STATUS_UNKNOWN_OPCODE_L = 0x0c, /* Unknown Lower layer OP code */ ++ BT_STATUS_PARAMETER_FORMAT_ERROR_U = 0x0d, /* Wrong parameters sent by upper layer. */ ++ BT_STATUS_PARAMETER_FORMAT_ERROR_L = 0x0e, /* bt fw parameter format is not consistency */ ++ BT_STATUS_PARAMETER_OUT_OF_RANGE_U = 0x0f, /* uppery layer parameter value is out of range */ ++ BT_STATUS_PARAMETER_OUT_OF_RANGE_L = 0x10, /* bt fw parameter value is out of range */ ++ BT_STATUS_UNKNOWN_STATUS_L = 0x11, /* bt returned an defined status code */ ++ BT_STATUS_UNKNOWN_STATUS_H = 0x12, /* driver need to do error handle or not handle-well. */ ++ BT_STATUS_WRONG_LEVEL = 0x13, /* should be under passive level */ ++ BT_STATUS_NOT_IMPLEMENT = 0x14, /* op code not implemented yet */ ++ BT_STATUS_BT_STACK_OP_SUCCESS = 0x15, /* bt stack op execution success */ ++ BT_STATUS_BT_STACK_NOT_SUPPORT = 0x16, /* stack version not support this. */ ++ BT_STATUS_BT_STACK_SEND_HCI_EVENT_FAIL = 0x17, /* send hci event fail */ ++ BT_STATUS_BT_STACK_NOT_BIND = 0x18, /* stack not bind wifi driver */ ++ BT_STATUS_BT_STACK_NO_RSP = 0x19, /* stack doesn't have any rsp. */ ++ BT_STATUS_MAX ++} BT_CTRL_STATUS, *PBT_CTRL_STATUS; ++ ++#define SET_BT_MP_OPER_RET(OpCode, StatusCode) ((OpCode << 8) | StatusCode) ++#define GET_OP_CODE_FROM_BT_MP_OPER_RET(RetCode) ((RetCode & 0xF0) >> 8) ++#define GET_STATUS_CODE_FROM_BT_MP_OPER_RET(RetCode) (RetCode & 0x0F) ++#define CHECK_STATUS_CODE_FROM_BT_MP_OPER_RET(RetCode, StatusCode) (GET_STATUS_CODE_FROM_BT_MP_OPER_RET(RetCode) == StatusCode) ++ ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ ++#define NETLINK_USER 31 ++#define CONNECT_PORT 30000 ++#define CONNECT_PORT_BT 30001 ++#define KERNEL_SOCKET_OK 0x01 ++#define NETLINK_SOCKET_OK 0x02 ++ ++#define OTHER 0 ++#define RX_ATTEND_ACK 1 ++#define RX_LEAVE_ACK 2 ++#define RX_BT_LEAVE 3 ++#define RX_INVITE_REQ 4 ++#define RX_ATTEND_REQ 5 ++#define RX_INVITE_RSP 6 ++ ++#define invite_req "INVITE_REQ" ++#define invite_rsp "INVITE_RSP" ++#define attend_req "ATTEND_REQ" ++#define attend_ack "ATTEND_ACK" ++#define wifi_leave "WIFI_LEAVE" ++#define leave_ack "LEAVE_ACK" ++#define bt_leave "BT_LEAVE" ++ ++#define BT_INFO_NOTIFY_CMD 0x0106 ++#define BT_INFO_LEN 8 ++ ++typedef struct _HCI_LINK_INFO{ ++ u2Byte ConnectHandle; ++ u1Byte IncomingTrafficMode; ++ u1Byte OutgoingTrafficMode; ++ u1Byte BTProfile; ++ u1Byte BTCoreSpec; ++ s1Byte BT_RSSI; ++ u1Byte TrafficProfile; ++ u1Byte linkRole; ++}HCI_LINK_INFO, *PHCI_LINK_INFO; ++ ++#define MAX_BT_ACL_LINK_NUM 8 ++ ++typedef struct _HCI_EXT_CONFIG{ ++ HCI_LINK_INFO aclLink[MAX_BT_ACL_LINK_NUM]; ++ u1Byte btOperationCode; ++ u2Byte CurrentConnectHandle; ++ u1Byte CurrentIncomingTrafficMode; ++ u1Byte CurrentOutgoingTrafficMode; ++ ++ u1Byte NumberOfACL; ++ u1Byte NumberOfSCO; ++ u1Byte CurrentBTStatus; ++ u2Byte HCIExtensionVer; ++ ++ BOOLEAN bEnableWifiScanNotify; ++}HCI_EXT_CONFIG, *PHCI_EXT_CONFIG; ++ ++typedef struct _HCI_PHY_LINK_BSS_INFO{ ++ u2Byte bdCap; // capability information ++ ++ // Qos related. Added by Annie, 2005-11-01. ++ //BSS_QOS BssQos; ++ ++}HCI_PHY_LINK_BSS_INFO, *PHCI_PHY_LINK_BSS_INFO; ++ ++typedef enum _BT_CONNECT_TYPE{ ++ BT_CONNECT_AUTH_REQ =0x00, ++ BT_CONNECT_AUTH_RSP =0x01, ++ BT_CONNECT_ASOC_REQ =0x02, ++ BT_CONNECT_ASOC_RSP =0x03, ++ BT_DISCONNECT =0x04 ++}BT_CONNECT_TYPE,*PBT_CONNECT_TYPE; ++ ++ ++typedef struct _PACKET_IRP_HCIEVENT_DATA { ++ u8 EventCode; ++ u8 Length; //total cmd length = extension event length+1(extension event code length) ++ u8 Data[1]; // byte1 is extension event code ++} rtw_HCI_event; ++ ++ ++struct btinfo_8761ATV { ++ u8 cid; ++ u8 len; ++ ++ u8 bConnection:1; ++ u8 bSCOeSCO:1; ++ u8 bInQPage:1; ++ u8 bACLBusy:1; ++ u8 bSCOBusy:1; ++ u8 bHID:1; ++ u8 bA2DP:1; ++ u8 bFTP:1; ++ ++ u8 retry_cnt:4; ++ u8 rsvd_34:1; ++ u8 bPage:1; ++ u8 TRxMask:1; ++ u8 Sniff_attempt:1; ++ ++ u8 rssi; ++ ++ u8 A2dp_rate:1; ++ u8 ReInit:1; ++ u8 MaxPower:1; ++ u8 bEnIgnoreWlanAct:1; ++ u8 TxPowerLow:1; ++ u8 TxPowerHigh:1; ++ u8 eSCO_SCO:1; ++ u8 Master_Slave:1; ++ ++ u8 ACL_TRx_TP_low; ++ u8 ACL_TRx_TP_high; ++}; ++ ++#define HCIOPCODE(_OCF, _OGF) ((_OGF)<<10|(_OCF)) ++#define HCIOPCODELOW(_OCF, _OGF) (u8)(HCIOPCODE(_OCF, _OGF)&0x00ff) ++#define HCIOPCODEHIGHT(_OCF, _OGF) (u8)(HCIOPCODE(_OCF, _OGF)>>8) ++#define HCI_OGF(opCode) (unsigned char)((0xFC00 & (opCode)) >> 10) ++#define HCI_OCF(opCode) ( 0x3FF & (opCode)) ++ ++ ++typedef enum _HCI_STATUS{ ++ HCI_STATUS_SUCCESS =0x00, //Success ++ HCI_STATUS_UNKNOW_HCI_CMD =0x01, //Unknown HCI Command ++ HCI_STATUS_UNKNOW_CONNECT_ID =0X02, //Unknown Connection Identifier ++ HCI_STATUS_HW_FAIL =0X03, //Hardware Failure ++ HCI_STATUS_PAGE_TIMEOUT =0X04, //Page Timeout ++ HCI_STATUS_AUTH_FAIL =0X05, //Authentication Failure ++ HCI_STATUS_PIN_OR_KEY_MISSING =0X06, //PIN or Key Missing ++ HCI_STATUS_MEM_CAP_EXCEED =0X07, //Memory Capacity Exceeded ++ HCI_STATUS_CONNECT_TIMEOUT =0X08, //Connection Timeout ++ HCI_STATUS_CONNECT_LIMIT =0X09, //Connection Limit Exceeded ++ HCI_STATUS_SYN_CONNECT_LIMIT =0X0a, //Synchronous Connection Limit To A Device Exceeded ++ HCI_STATUS_ACL_CONNECT_EXISTS =0X0b, //ACL Connection Already Exists ++ HCI_STATUS_CMD_DISALLOW =0X0c, //Command Disallowed ++ HCI_STATUS_CONNECT_RJT_LIMIT_RESOURCE =0X0d, //Connection Rejected due to Limited Resources ++ HCI_STATUS_CONNECT_RJT_SEC_REASON =0X0e, //Connection Rejected Due To Security Reasons ++ HCI_STATUS_CONNECT_RJT_UNACCEPT_BD_ADDR =0X0f, //Connection Rejected due to Unacceptable BD_ADDR ++ HCI_STATUS_CONNECT_ACCEPT_TIMEOUT =0X10, //Connection Accept Timeout Exceeded ++ HCI_STATUS_UNSUPPORT_FEATURE_PARA_VALUE =0X11, //Unsupported Feature or Parameter Value ++ HCI_STATUS_INVALID_HCI_CMD_PARA_VALUE =0X12, //Invalid HCI Command Parameters ++ HCI_STATUS_REMOTE_USER_TERMINATE_CONNECT =0X13, //Remote User Terminated Connection ++ HCI_STATUS_REMOTE_DEV_TERMINATE_LOW_RESOURCE =0X14, //Remote Device Terminated Connection due to Low Resources ++ HCI_STATUS_REMOTE_DEV_TERMINATE_CONNECT_POWER_OFF =0X15, //Remote Device Terminated Connection due to Power Off ++ HCI_STATUS_CONNECT_TERMINATE_LOCAL_HOST =0X16, //Connection Terminated By Local Host ++ HCI_STATUS_REPEATE_ATTEMPT =0X17, //Repeated Attempts ++ HCI_STATUS_PAIR_NOT_ALLOW =0X18, //Pairing Not Allowed ++ HCI_STATUS_UNKNOW_LMP_PDU =0X19, //Unknown LMP PDU ++ HCI_STATUS_UNSUPPORT_REMOTE_LMP_FEATURE =0X1a, //Unsupported Remote Feature / Unsupported LMP Feature ++ HCI_STATUS_SOC_OFFSET_REJECT =0X1b, //SCO Offset Rejected ++ HCI_STATUS_SOC_INTERVAL_REJECT =0X1c, //SCO Interval Rejected ++ HCI_STATUS_SOC_AIR_MODE_REJECT =0X1d,//SCO Air Mode Rejected ++ HCI_STATUS_INVALID_LMP_PARA =0X1e, //Invalid LMP Parameters ++ HCI_STATUS_UNSPECIFIC_ERROR =0X1f, //Unspecified Error ++ HCI_STATUS_UNSUPPORT_LMP_PARA_VALUE =0X20, //Unsupported LMP Parameter Value ++ HCI_STATUS_ROLE_CHANGE_NOT_ALLOW =0X21, //Role Change Not Allowed ++ HCI_STATUS_LMP_RESPONSE_TIMEOUT =0X22, //LMP Response Timeout ++ HCI_STATUS_LMP_ERROR_TRANSACTION_COLLISION =0X23, //LMP Error Transaction Collision ++ HCI_STATUS_LMP_PDU_NOT_ALLOW =0X24, //LMP PDU Not Allowed ++ HCI_STATUS_ENCRYPTION_MODE_NOT_ALLOW =0X25, //Encryption Mode Not Acceptable ++ HCI_STATUS_LINK_KEY_CAN_NOT_CHANGE =0X26, //Link Key Can Not be Changed ++ HCI_STATUS_REQUEST_QOS_NOT_SUPPORT =0X27, //Requested QoS Not Supported ++ HCI_STATUS_INSTANT_PASSED =0X28, //Instant Passed ++ HCI_STATUS_PAIRING_UNIT_KEY_NOT_SUPPORT =0X29, //Pairing With Unit Key Not Supported ++ HCI_STATUS_DIFFERENT_TRANSACTION_COLLISION =0X2a, //Different Transaction Collision ++ HCI_STATUS_RESERVE_1 =0X2b, //Reserved ++ HCI_STATUS_QOS_UNACCEPT_PARA =0X2c, //QoS Unacceptable Parameter ++ HCI_STATUS_QOS_REJECT =0X2d, //QoS Rejected ++ HCI_STATUS_CHNL_CLASSIFICATION_NOT_SUPPORT =0X2e, //Channel Classification Not Supported ++ HCI_STATUS_INSUFFICIENT_SECURITY =0X2f, //Insufficient Security ++ HCI_STATUS_PARA_OUT_OF_RANGE =0x30, //Parameter Out Of Mandatory Range ++ HCI_STATUS_RESERVE_2 =0X31, //Reserved ++ HCI_STATUS_ROLE_SWITCH_PENDING =0X32, //Role Switch Pending ++ HCI_STATUS_RESERVE_3 =0X33, //Reserved ++ HCI_STATUS_RESERVE_SOLT_VIOLATION =0X34, //Reserved Slot Violation ++ HCI_STATUS_ROLE_SWITCH_FAIL =0X35, //Role Switch Failed ++ HCI_STATUS_EXTEND_INQUIRY_RSP_TOO_LARGE =0X36, //Extended Inquiry Response Too Large ++ HCI_STATUS_SEC_SIMPLE_PAIRING_NOT_SUPPORT =0X37, //Secure Simple Pairing Not Supported By Host. ++ HCI_STATUS_HOST_BUSY_PAIRING =0X38, //Host Busy - Pairing ++ HCI_STATUS_CONNECT_REJ_NOT_SUIT_CHNL_FOUND =0X39, //Connection Rejected due to No Suitable Channel Found ++ HCI_STATUS_CONTROLLER_BUSY =0X3a //CONTROLLER BUSY ++}RTW_HCI_STATUS; ++ ++#define HCI_EVENT_COMMAND_COMPLETE 0x0e ++ ++#define OGF_EXTENSION 0X3f ++typedef enum HCI_EXTENSION_COMMANDS{ ++ HCI_SET_ACL_LINK_DATA_FLOW_MODE =0x0010, ++ HCI_SET_ACL_LINK_STATUS =0x0020, ++ HCI_SET_SCO_LINK_STATUS =0x0030, ++ HCI_SET_RSSI_VALUE =0x0040, ++ HCI_SET_CURRENT_BLUETOOTH_STATUS =0x0041, ++ ++ //The following is for RTK8723 ++ HCI_EXTENSION_VERSION_NOTIFY =0x0100, ++ HCI_LINK_STATUS_NOTIFY =0x0101, ++ HCI_BT_OPERATION_NOTIFY =0x0102, ++ HCI_ENABLE_WIFI_SCAN_NOTIFY =0x0103, ++ HCI_QUERY_RF_STATUS =0x0104, ++ HCI_BT_ABNORMAL_NOTIFY =0x0105, ++ HCI_BT_INFO_NOTIFY =0x0106, ++ HCI_BT_COEX_NOTIFY =0x0107, ++ HCI_BT_PATCH_VERSION_NOTIFY =0x0108, ++ HCI_BT_AFH_MAP_NOTIFY =0x0109, ++ HCI_BT_REGISTER_VALUE_NOTIFY =0x010a, ++ ++ //The following is for IVT ++ HCI_WIFI_CURRENT_CHANNEL =0x0300, ++ HCI_WIFI_CURRENT_BANDWIDTH =0x0301, ++ HCI_WIFI_CONNECTION_STATUS =0x0302 ++}RTW_HCI_EXT_CMD; ++ ++#define HCI_EVENT_EXTENSION_RTK 0xfe ++typedef enum HCI_EXTENSION_EVENT_RTK{ ++ HCI_EVENT_EXT_WIFI_SCAN_NOTIFY =0x01, ++ HCI_EVENT_EXT_WIFI_RF_STATUS_NOTIFY =0x02, ++ HCI_EVENT_EXT_BT_INFO_CONTROL =0x03, ++ HCI_EVENT_EXT_BT_COEX_CONTROL =0x04 ++}RTW_HCI_EXT_EVENT; ++ ++typedef enum _BT_TRAFFIC_MODE{ ++ BT_MOTOR_EXT_BE = 0x00, //Best Effort. Default. for HCRP, PAN, SDP, RFCOMM-based profiles like FTP,OPP, SPP, DUN, etc. ++ BT_MOTOR_EXT_GUL = 0x01, //Guaranteed Latency. This type of traffic is used e.g. for HID and AVRCP. ++ BT_MOTOR_EXT_GUB = 0X02, //Guaranteed Bandwidth. ++ BT_MOTOR_EXT_GULB = 0X03 //Guaranteed Latency and Bandwidth. for A2DP and VDP. ++} BT_TRAFFIC_MODE; ++ ++typedef enum _BT_TRAFFIC_MODE_PROFILE{ ++ BT_PROFILE_NONE, ++ BT_PROFILE_A2DP, ++ BT_PROFILE_PAN , ++ BT_PROFILE_HID, ++ BT_PROFILE_SCO ++} BT_TRAFFIC_MODE_PROFILE; ++ ++typedef enum _HCI_EXT_BT_OPERATION { ++ HCI_BT_OP_NONE = 0x0, ++ HCI_BT_OP_INQUIRY_START = 0x1, ++ HCI_BT_OP_INQUIRY_FINISH = 0x2, ++ HCI_BT_OP_PAGING_START = 0x3, ++ HCI_BT_OP_PAGING_SUCCESS = 0x4, ++ HCI_BT_OP_PAGING_UNSUCCESS = 0x5, ++ HCI_BT_OP_PAIRING_START = 0x6, ++ HCI_BT_OP_PAIRING_FINISH = 0x7, ++ HCI_BT_OP_BT_DEV_ENABLE = 0x8, ++ HCI_BT_OP_BT_DEV_DISABLE = 0x9, ++ HCI_BT_OP_MAX ++} HCI_EXT_BT_OPERATION, *PHCI_EXT_BT_OPERATION; ++ ++typedef struct _BT_MGNT{ ++ BOOLEAN bBTConnectInProgress; ++ BOOLEAN bLogLinkInProgress; ++ BOOLEAN bPhyLinkInProgress; ++ BOOLEAN bPhyLinkInProgressStartLL; ++ u1Byte BtCurrentPhyLinkhandle; ++ u2Byte BtCurrentLogLinkhandle; ++ u1Byte CurrentConnectEntryNum; ++ u1Byte DisconnectEntryNum; ++ u1Byte CurrentBTConnectionCnt; ++ BT_CONNECT_TYPE BTCurrentConnectType; ++ BT_CONNECT_TYPE BTReceiveConnectPkt; ++ u1Byte BTAuthCount; ++ u1Byte BTAsocCount; ++ BOOLEAN bStartSendSupervisionPkt; ++ BOOLEAN BtOperationOn; ++ BOOLEAN BTNeedAMPStatusChg; ++ BOOLEAN JoinerNeedSendAuth; ++ HCI_PHY_LINK_BSS_INFO bssDesc; ++ HCI_EXT_CONFIG ExtConfig; ++ BOOLEAN bNeedNotifyAMPNoCap; ++ BOOLEAN bCreateSpportQos; ++ BOOLEAN bSupportProfile; ++ u1Byte BTChannel; ++ BOOLEAN CheckChnlIsSuit; ++ BOOLEAN bBtScan; ++ BOOLEAN btLogoTest; ++ BOOLEAN bRfStatusNotified; ++ BOOLEAN bBtRsvedPageDownload; ++}BT_MGNT, *PBT_MGNT; ++ ++struct bt_coex_info { ++ /* For Kernel Socket */ ++ struct socket *udpsock; ++ struct sockaddr_in wifi_sockaddr; /*wifi socket*/ ++ struct sockaddr_in bt_sockaddr;/* BT socket */ ++ struct sock *sk_store;/*back up socket for UDP RX int*/ ++ ++ /* store which socket is OK */ ++ u8 sock_open; ++ ++ u8 BT_attend; ++ u8 is_exist; /* socket exist */ ++ BT_MGNT BtMgnt; ++ struct workqueue_struct *btcoex_wq; ++ struct delayed_work recvmsg_work; ++}; ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX + + #define PACKET_NORMAL 0 + #define PACKET_DHCP 1 +@@ -40,12 +372,15 @@ void rtw_btcoex_MediaStatusNotify(PADAPTER, u8 mediaStatus); + void rtw_btcoex_SpecialPacketNotify(PADAPTER, u8 pktType); + void rtw_btcoex_IQKNotify(PADAPTER padapter, u8 state); + void rtw_btcoex_BtInfoNotify(PADAPTER, u8 length, u8 *tmpBuf); ++void rtw_btcoex_BtMpRptNotify(PADAPTER, u8 length, u8 *tmpBuf); + void rtw_btcoex_SuspendNotify(PADAPTER, u8 state); + void rtw_btcoex_HaltNotify(PADAPTER); ++void rtw_btcoex_ScoreBoardStatusNotify(PADAPTER, u8 length, u8 *tmpBuf); + void rtw_btcoex_SwitchBtTRxMask(PADAPTER); + void rtw_btcoex_Switch(PADAPTER, u8 enable); + u8 rtw_btcoex_IsBtDisabled(PADAPTER); + void rtw_btcoex_Handler(PADAPTER); ++s32 rtw_btcoex_IsBTCoexRejectAMPDU(PADAPTER padapter); + s32 rtw_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER); + u32 rtw_btcoex_GetAMPDUSize(PADAPTER); + void rtw_btcoex_SetManualControl(PADAPTER, u8 bmanual); +@@ -66,11 +401,34 @@ void rtw_btcoex_SetDBG(PADAPTER, u32 *pDbgModule); + u32 rtw_btcoex_GetDBG(PADAPTER, u8 *pStrBuf, u32 bufSize); + u8 rtw_btcoex_IncreaseScanDeviceNum(PADAPTER); + u8 rtw_btcoex_IsBtLinkExist(PADAPTER); ++void rtw_btcoex_BTOffOnNotify(PADAPTER padapter, u8 bBTON); ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++void rtw_btcoex_SetBtPatchVersion(PADAPTER padapter,u16 btHciVer, u16 btPatchVer); ++void rtw_btcoex_SetHciVersion(PADAPTER padapter, u16 hciVersion); ++void rtw_btcoex_StackUpdateProfileInfo(void); ++void rtw_btcoex_init_socket(_adapter *padapter); ++void rtw_btcoex_close_socket(_adapter *padapter); ++void rtw_btcoex_dump_tx_msg(u8 *tx_msg, u8 len, u8 *msg_name); ++u8 rtw_btcoex_sendmsgbysocket(_adapter *padapter, u8 *msg, u8 msg_size, bool force); ++u8 rtw_btcoex_create_kernel_socket(_adapter *padapter); ++void rtw_btcoex_close_kernel_socket(_adapter *padapter); ++void rtw_btcoex_recvmsgbysocket(void *data); ++u16 rtw_btcoex_parse_recv_data(u8 *msg, u8 msg_size); ++u8 rtw_btcoex_btinfo_cmd(PADAPTER padapter, u8 *pbuf, u16 length); ++void rtw_btcoex_parse_hci_cmd(_adapter *padapter, u8 *cmd, u16 len); ++void rtw_btcoex_SendEventExtBtCoexControl(PADAPTER Adapter, u8 bNeedDbgRsp, u8 dataLen, void *pData); ++void rtw_btcoex_SendEventExtBtInfoControl(PADAPTER Adapter, u8 dataLen, void *pData); ++void rtw_btcoex_SendScanNotify(PADAPTER padapter, u8 scanType); ++#define BT_SendEventExtBtCoexControl(Adapter, bNeedDbgRsp, dataLen, pData) rtw_btcoex_SendEventExtBtCoexControl(Adapter, bNeedDbgRsp, dataLen, pData) ++#define BT_SendEventExtBtInfoControl(Adapter, dataLen, pData) rtw_btcoex_SendEventExtBtInfoControl(Adapter, dataLen, pData) ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX ++u16 rtw_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data); ++u16 rtw_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val); + + // ================================================== + // Below Functions are called by BT-Coex + // ================================================== +-void rtw_btcoex_RejectApAggregatedPacket(PADAPTER, u8 enable); ++void rtw_btcoex_rx_ampdu_apply(PADAPTER); + void rtw_btcoex_LPS_Enter(PADAPTER); + void rtw_btcoex_LPS_Leave(PADAPTER); + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_byteorder.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_byteorder.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_cmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_cmd.h +old mode 100755 +new mode 100644 +index eb0e33e..e9d486a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_cmd.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_cmd.h +@@ -46,6 +46,7 @@ + u8 *rsp; + u32 rspsz; + struct submit_ctx *sctx; ++ u8 no_io; + //_sema cmd_sem; + _list list; + }; +@@ -214,6 +215,7 @@ u8 p2p_protocol_wk_cmd(_adapter*padapter, int intCmdType ); + enum rtw_drvextra_cmd_id + { + NONE_WK_CID, ++ STA_MSTATUS_RPT_WK_CID, + DYNAMIC_CHK_WK_CID, + DM_CTRL_WK_CID, + PBC_POLLING_WK_CID, +@@ -233,6 +235,9 @@ enum rtw_drvextra_cmd_id + BEAMFORMING_WK_CID, + LPS_CHANGE_DTIM_CID, + BTINFO_WK_CID, ++ DFS_MASTER_WK_CID, ++ SESSION_TRACKER_WK_CID, ++ EN_HW_UPDATE_TSF_WK_CID, + MAX_WK_CID + }; + +@@ -248,6 +253,14 @@ enum LPS_CTRL_TYPE + LPS_CTRL_TX_TRAFFIC_LEAVE = 7, + LPS_CTRL_RX_TRAFFIC_LEAVE = 8, + LPS_CTRL_ENTER = 9, ++ LPS_CTRL_LEAVE_CFG80211_PWRMGMT = 10, ++}; ++ ++enum STAKEY_TYPE ++{ ++ GROUP_KEY =0, ++ UNICAST_KEY =1, ++ TDLS_KEY =2, + }; + + enum RFINTFS { +@@ -309,7 +322,12 @@ Notes: To create a BSS + Command Mode + */ + struct createbss_parm { +- WLAN_BSSID_EX network; ++ bool adhoc; ++ ++ /* used by AP mode now */ ++ s16 req_ch; ++ u8 req_bw; ++ u8 req_offset; + }; + + /* +@@ -593,6 +611,11 @@ struct readTSSI_rsp { + u8 value; + }; + ++struct readMAC_parm { ++ u8 len; ++ u32 addr; ++}; ++ + struct writeBB_parm { + u8 offset; + u8 value; +@@ -875,6 +898,14 @@ struct addBaReq_parm + u8 addr[ETH_ALEN]; + }; + ++struct addBaRsp_parm { ++ unsigned int tid; ++ unsigned int start_seq; ++ u8 addr[ETH_ALEN]; ++ u8 status; ++ u8 size; ++}; ++ + /*H2C Handler index: 46 */ + struct set_ch_parm { + u8 ch; +@@ -943,6 +974,7 @@ struct SwitchBandwidth_parm + /*H2C Handler index: 59 */ + struct SetChannelPlan_param + { ++ const struct country_chplan *country_ent; + u8 channel_plan; + }; + +@@ -997,17 +1029,21 @@ Result: + #define H2C_REJECTED 0x05 + #define H2C_CMD_OVERFLOW 0x06 + #define H2C_RESERVED 0x07 ++#define H2C_ENQ_HEAD 0x08 ++#define H2C_ENQ_HEAD_FAIL 0x09 + + extern u8 rtw_setassocsta_cmd(_adapter *padapter, u8 *mac_addr); + extern u8 rtw_setstandby_cmd(_adapter *padapter, uint action); + u8 rtw_sitesurvey_cmd(_adapter *padapter, NDIS_802_11_SSID *ssid, int ssid_num, struct rtw_ieee80211_channel *ch, int ch_num); +-extern u8 rtw_createbss_cmd(_adapter *padapter); +-extern u8 rtw_createbss_cmd_ex(_adapter *padapter, unsigned char *pbss, unsigned int sz); +-u8 rtw_startbss_cmd(_adapter *padapter, int flags); ++ ++u8 rtw_create_ibss_cmd(_adapter *adapter, int flags); ++u8 rtw_startbss_cmd(_adapter *adapter, int flags); ++u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags, u8 req_ch, u8 req_bw, u8 req_offset); ++ + extern u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch); + + struct sta_info; +-extern u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 unicast_key, bool enqueue); ++extern u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 key_type, bool enqueue); + extern u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue); + + extern u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network* pnetwork); +@@ -1015,6 +1051,8 @@ u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, bool enqueue); + extern u8 rtw_setopmode_cmd(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype, bool enqueue); + extern u8 rtw_setdatarate_cmd(_adapter *padapter, u8 *rateset); + extern u8 rtw_setbasicrate_cmd(_adapter *padapter, u8 *rateset); ++extern u8 rtw_getmacreg_cmd(_adapter *padapter, u8 len, u32 addr); ++extern void rtw_usb_catc_trigger_cmd(_adapter *padapter, const char *caller); + extern u8 rtw_setbbreg_cmd(_adapter * padapter, u8 offset, u8 val); + extern u8 rtw_setrfreg_cmd(_adapter * padapter, u8 offset, u32 val); + extern u8 rtw_getbbreg_cmd(_adapter * padapter, u8 offset, u8 * pval); +@@ -1028,6 +1066,7 @@ extern u8 rtw_setfwdig_cmd(_adapter*padapter, u8 type); + extern u8 rtw_setfwra_cmd(_adapter*padapter, u8 type); + + extern u8 rtw_addbareq_cmd(_adapter*padapter, u8 tid, u8 *addr); ++extern u8 rtw_addbarsp_cmd(_adapter *padapter, u8 *addr, u16 tid, u8 status, u8 size, u16 start_seq); + // add for CONFIG_IEEE80211W, none 11w also can use + extern u8 rtw_reset_securitypriv_cmd(_adapter*padapter); + extern u8 rtw_free_assoc_resources_cmd(_adapter *padapter); +@@ -1051,17 +1090,36 @@ extern u8 rtw_ps_cmd(_adapter*padapter); + + #ifdef CONFIG_AP_MODE + u8 rtw_chk_hi_queue_cmd(_adapter*padapter); +-#endif ++#ifdef CONFIG_DFS_MASTER ++u8 rtw_dfs_master_cmd(_adapter *adapter, bool enqueue); ++void rtw_dfs_master_timer_hdl(RTW_TIMER_HDL_ARGS); ++void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset); ++void rtw_dfs_master_disable(_adapter *adapter, bool ld_sta_in_dfs); ++enum { ++ MLME_STA_CONNECTING, ++ MLME_STA_CONNECTED, ++ MLME_STA_DISCONNECTED, ++ MLME_AP_STARTED, ++ MLME_AP_STOPPED, ++}; ++void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action); ++#endif /* CONFIG_DFS_MASTER */ ++#endif /* CONFIG_AP_MODE */ + + #ifdef CONFIG_BT_COEXIST + u8 rtw_btinfo_cmd(PADAPTER padapter, u8 *pbuf, u16 length); + #endif + ++u8 rtw_enable_hw_update_tsf_cmd(_adapter *padapter); ++ + u8 rtw_set_ch_cmd(_adapter*padapter, u8 ch, u8 bw, u8 ch_offset, u8 enqueue); +-extern u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enqueue, u8 swconfig); ++ ++u8 rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, u8 swconfig); ++u8 rtw_set_country_cmd(_adapter *adapter, int flags, const char *country_code, u8 swconfig); ++ + extern u8 rtw_led_blink_cmd(_adapter*padapter, PVOID pLed); + extern u8 rtw_set_csa_cmd(_adapter*padapter, u8 new_ch_no); +-extern u8 rtw_tdls_cmd(_adapter*padapter, u8 *addr, u8 option); ++extern u8 rtw_tdls_cmd(_adapter*padapter, const u8 *addr, u8 option); + + //#ifdef CONFIG_C2H_PACKET_EN + extern u8 rtw_c2h_packet_wk_cmd(PADAPTER padapter, u8 *pbuf, u16 length); +@@ -1071,18 +1129,23 @@ extern u8 rtw_c2h_wk_cmd(PADAPTER padapter, u8 *c2h_evt); + + u8 rtw_run_in_thread_cmd(PADAPTER padapter, void (*func)(void*), void* context); + ++u8 session_tracker_chk_cmd(_adapter *adapter, struct sta_info *sta); ++u8 session_tracker_add_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port); ++u8 session_tracker_del_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port); ++ + u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf); + + extern void rtw_survey_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); + extern void rtw_disassoc_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); +-extern void rtw_joinbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); +-extern void rtw_createbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_joinbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); ++void rtw_create_ibss_post_hdl(_adapter *padapter, int status); + extern void rtw_getbbrfreg_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); + extern void rtw_readtssi_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd); + + extern void rtw_setstaKey_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); + extern void rtw_setassocsta_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); + extern void rtw_getrttbl_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_getmacreg_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); + + + struct _cmd_callback { +@@ -1166,10 +1229,13 @@ enum rtw_h2c_cmd + GEN_CMD_CODE(_ChkBMCSleepq), /*63*/ + + GEN_CMD_CODE(_RunInThreadCMD), /*64*/ ++ GEN_CMD_CODE(_AddBARsp) , /*65*/ + + MAX_H2CCMD + }; + ++#define _GetMACReg_CMD_ _Read_MACREG_CMD_ ++#define _SetMACReg_CMD_ _Write_MACREG_CMD_ + #define _GetBBReg_CMD_ _Read_BBREG_CMD_ + #define _SetBBReg_CMD_ _Write_BBREG_CMD_ + #define _GetRFReg_CMD_ _Read_RFREG_CMD_ +@@ -1178,7 +1244,7 @@ enum rtw_h2c_cmd + #ifdef _RTW_CMD_C_ + struct _cmd_callback rtw_cmd_callback[] = + { +- {GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/ ++ {GEN_CMD_CODE(_Read_MACREG), &rtw_getmacreg_cmdrsp_callback}, /*0*/ + {GEN_CMD_CODE(_Write_MACREG), NULL}, + {GEN_CMD_CODE(_Read_BBREG), &rtw_getbbrfreg_cmdrsp_callback}, + {GEN_CMD_CODE(_Write_BBREG), NULL}, +@@ -1195,7 +1261,7 @@ struct _cmd_callback rtw_cmd_callback[] = + {GEN_CMD_CODE(_setMBIDCFG), NULL}, + {GEN_CMD_CODE(_JoinBss), &rtw_joinbss_cmd_callback}, /*14*/ + {GEN_CMD_CODE(_DisConnect), &rtw_disassoc_cmd_callback}, /*15*/ +- {GEN_CMD_CODE(_CreateBss), &rtw_createbss_cmd_callback}, ++ {GEN_CMD_CODE(_CreateBss), NULL}, + {GEN_CMD_CODE(_SetOpMode), NULL}, + {GEN_CMD_CODE(_SiteSurvey), &rtw_survey_cmd_callback}, /*18*/ + {GEN_CMD_CODE(_SetAuth), NULL}, +@@ -1251,8 +1317,15 @@ struct _cmd_callback rtw_cmd_callback[] = + {GEN_CMD_CODE(_ChkBMCSleepq), NULL}, /*63*/ + + {GEN_CMD_CODE(_RunInThreadCMD), NULL},/*64*/ ++ {GEN_CMD_CODE(_AddBARsp), NULL}, /*65*/ + }; + #endif + ++#define CMD_FMT "cmd=%d,%d,%d" ++#define CMD_ARG(cmd) \ ++ (cmd)->cmdcode, \ ++ (cmd)->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra) ? ((struct drvextra_cmd_parm *)(cmd)->parmbuf)->ec_id : ((cmd)->cmdcode == GEN_CMD_CODE(_Set_MLME_EVT) ? ((struct C2HEvent_Header *)(cmd)->parmbuf)->ID : 0), \ ++ (cmd)->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra) ? ((struct drvextra_cmd_parm *)(cmd)->parmbuf)->type : 0 ++ + #endif // _CMD_H_ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_debug.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_debug.h +old mode 100755 +new mode 100644 +index 67edf7f..2146dd4 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_debug.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_debug.h +@@ -229,7 +229,7 @@ extern void rtl871x_cedbg(const char *fmt, ...); + if (sel == RTW_DBGDUMP)\ + _DBG_871X_LEVEL(_drv_always_, fmt, ##arg); \ + else {\ +- if(_seqdump(sel, fmt, ##arg)) /*rtw_warn_on(1)*/; \ ++ _seqdump(sel, fmt, ##arg); \ + } \ + }while(0) + +@@ -239,7 +239,7 @@ extern void rtl871x_cedbg(const char *fmt, ...); + if (sel == RTW_DBGDUMP)\ + DBG_871X_LEVEL(_drv_always_, fmt, ##arg); \ + else {\ +- if(_seqdump(sel, fmt, ##arg)) /*rtw_warn_on(1)*/; \ ++ _seqdump(sel, fmt, ##arg) /*rtw_warn_on(1)*/; \ + } \ + }while(0) + +@@ -327,9 +327,11 @@ extern void rtl871x_cedbg(const char *fmt, ...); + + void dump_drv_version(void *sel); + void dump_log_level(void *sel); ++void dump_drv_cfg(void *sel); + + #ifdef CONFIG_SDIO_HCI + void sd_f0_reg_dump(void *sel, _adapter *adapter); ++void sdio_local_reg_dump(void *sel, _adapter *adapter); + #endif /* CONFIG_SDIO_HCI */ + + void mac_reg_dump(void *sel, _adapter *adapter); +@@ -338,10 +340,22 @@ void rf_reg_dump(void *sel, _adapter *adapter); + + bool rtw_fwdl_test_trigger_chksum_fail(void); + bool rtw_fwdl_test_trigger_wintint_rdy_fail(void); ++bool rtw_del_rx_ampdu_test_trigger_no_tx_fail(void); + + u32 rtw_get_wait_hiq_empty_ms(void); + void rtw_sink_rtp_seq_dbg( _adapter *adapter,_pkt *pkt); + ++struct sta_info; ++void sta_rx_reorder_ctl_dump(void *sel, struct sta_info *sta); ++ ++struct dvobj_priv; ++void dump_adapters_status(void *sel, struct dvobj_priv *dvobj); ++ ++struct sec_cam_ent; ++void dump_sec_cam_ent(void *sel, struct sec_cam_ent *ent, int id); ++void dump_sec_cam_ent_title(void *sel, u8 has_id); ++void dump_sec_cam(void *sel, _adapter *adapter); ++ + #ifdef CONFIG_PROC_DEBUG + ssize_t proc_set_write_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + int proc_get_read_reg(struct seq_file *m, void *v); +@@ -360,19 +374,38 @@ ssize_t proc_set_roam_tgt_addr(struct file *file, const char __user *buffer, siz + int proc_get_qos_option(struct seq_file *m, void *v); + int proc_get_ht_option(struct seq_file *m, void *v); + int proc_get_rf_info(struct seq_file *m, void *v); ++int proc_get_scan_param(struct seq_file *m, void *v); ++ssize_t proc_set_scan_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++int proc_get_scan_abort(struct seq_file *m, void *v); ++#ifdef CONFIG_SCAN_BACKOP ++int proc_get_backop_flags_sta(struct seq_file *m, void *v); ++ssize_t proc_set_backop_flags_sta(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++int proc_get_backop_flags_ap(struct seq_file *m, void *v); ++ssize_t proc_set_backop_flags_ap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++#endif /* CONFIG_SCAN_BACKOP */ + int proc_get_survey_info(struct seq_file *m, void *v); ++ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + int proc_get_ap_info(struct seq_file *m, void *v); +-int proc_get_adapter_state(struct seq_file *m, void *v); ++ssize_t proc_reset_trx_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + int proc_get_trx_info(struct seq_file *m, void *v); + int proc_get_rate_ctl(struct seq_file *m, void *v); + int proc_get_wifi_spec(struct seq_file *m, void *v); + ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++#ifdef DBG_RX_COUNTER_DUMP ++int proc_get_rx_cnt_dump(struct seq_file *m, void *v); ++ssize_t proc_set_rx_cnt_dump(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++#endif + int proc_get_dis_pwt(struct seq_file *m, void *v); + ssize_t proc_set_dis_pwt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + + int proc_get_suspend_resume_info(struct seq_file *m, void *v); + + ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++#ifdef CONFIG_DFS_MASTER ++int proc_get_dfs_master_test_case(struct seq_file *m, void *v); ++ssize_t proc_set_dfs_master_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++#endif /* CONFIG_DFS_MASTER */ + ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + + #ifdef CONFIG_AP_MODE +@@ -388,6 +421,8 @@ int proc_get_best_channel(struct seq_file *m, void *v); + ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + #endif /* CONFIG_FIND_BEST_CHANNEL */ + ++int proc_get_trx_info_debug(struct seq_file *m, void *v); ++ + int proc_get_rx_signal(struct seq_file *m, void *v); + ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + int proc_get_hw_status(struct seq_file *m, void *v); +@@ -402,6 +437,8 @@ ssize_t proc_set_bw_mode(struct file *file, const char __user *buffer, size_t co + int proc_get_ampdu_enable(struct seq_file *m, void *v); + ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + ++int proc_get_mac_rptbuf(struct seq_file *m, void *v); ++ + int proc_get_rx_ampdu(struct seq_file *m, void *v); + ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + +@@ -456,6 +493,12 @@ int proc_get_rx_ring(struct seq_file *m, void *v); + int proc_get_tx_ring(struct seq_file *m, void *v); + #endif + ++#ifdef CONFIG_GPIO_WAKEUP ++int proc_get_wowlan_gpio_info(struct seq_file *m, void *v); ++ssize_t proc_set_wowlan_gpio_info(struct file *file, const char __user *buffer, ++ size_t count, loff_t *pos, void *data); ++#endif /*CONFIG_GPIO_WAKEUP*/ ++ + #ifdef CONFIG_P2P_WOWLAN + int proc_get_p2p_wowlan_info(struct seq_file *m, void *v); + #endif /* CONFIG_P2P_WOWLAN */ +@@ -463,7 +506,35 @@ int proc_get_p2p_wowlan_info(struct seq_file *m, void *v); + int proc_get_new_bcn_max(struct seq_file *m, void *v); + ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); + ++#ifdef CONFIG_POWER_SAVING ++int proc_get_ps_info(struct seq_file *m, void *v); ++#endif //CONFIG_POWER_SAVING ++ ++#ifdef CONFIG_TDLS ++int proc_get_tdls_info(struct seq_file *m, void *v); ++#endif ++ ++int proc_get_monitor(struct seq_file *m, void *v); ++ssize_t proc_set_monitor(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++ ++ ++#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER ++int proc_get_rtkm_info(struct seq_file *m, void *v); ++#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ ++ ++#ifdef CONFIG_IEEE80211W ++ssize_t proc_set_tx_sa_query(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++int proc_get_tx_sa_query(struct seq_file *m, void *v); ++ssize_t proc_set_tx_deauth(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++int proc_get_tx_deauth(struct seq_file *m, void *v); ++ssize_t proc_set_tx_auth(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++int proc_get_tx_auth(struct seq_file *m, void *v); ++#endif /* CONFIG_IEEE80211W */ ++ + #endif /* CONFIG_PROC_DEBUG */ + ++int proc_get_efuse_map(struct seq_file *m, void *v); ++ssize_t proc_set_efuse_map(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ++ + #endif //__RTW_DEBUG_H__ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_eeprom.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_eeprom.h +old mode 100755 +new mode 100644 +index 7705adc..2da2a67 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_eeprom.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_eeprom.h +@@ -27,8 +27,9 @@ + #define HWSET_MAX_SIZE_128 128 + #define HWSET_MAX_SIZE_256 256 + #define HWSET_MAX_SIZE_512 512 ++#define HWSET_MAX_SIZE_1024 1024 + +-#define EEPROM_MAX_SIZE HWSET_MAX_SIZE_512 ++#define EEPROM_MAX_SIZE HWSET_MAX_SIZE_1024 + + #define CLOCK_RATE 50 //100us + +@@ -44,11 +45,6 @@ + #define EUROPE 0x1 //temp, should be provided later + #define JAPAN 0x2 //temp, should be provided later + +-#ifdef CONFIG_SDIO_HCI +-#define eeprom_cis0_sz 17 +-#define eeprom_cis1_sz 50 +-#endif +- + // + // Customer ID, note that: + // This variable is initiailzed through EEPROM or registry, +@@ -108,35 +104,6 @@ typedef enum _RT_CUSTOMER_ID + RT_CID_DNI_BUFFALO = 46,//add by page for NEC + }RT_CUSTOMER_ID, *PRT_CUSTOMER_ID; + +-struct eeprom_priv +-{ +- u8 bautoload_fail_flag; +- u8 bloadfile_fail_flag; +- u8 bloadmac_fail_flag; +- u8 EepromOrEfuse; +- +- u8 mac_addr[6]; //PermanentAddress +- +- u16 channel_plan; +- u16 CustomerID; +- +- u8 efuse_eeprom_data[EEPROM_MAX_SIZE]; //92C:256bytes, 88E:512bytes, we use union set (512bytes) +- u8 adjuseVoltageVal; +- +-#ifdef CONFIG_RF_GAIN_OFFSET +- u8 EEPROMRFGainOffset; +- u8 EEPROMRFGainVal; +-#endif //CONFIG_RF_GAIN_OFFSET +- +-#ifdef CONFIG_SDIO_HCI +- u8 sdio_setting; +- u32 ocr; +- u8 cis0[eeprom_cis0_sz]; +- u8 cis1[eeprom_cis1_sz]; +-#endif +-}; +- +- + extern void eeprom_write16(_adapter *padapter, u16 reg, u16 data); + extern u16 eeprom_read16(_adapter *padapter, u16 reg); + extern void read_eeprom_content(_adapter *padapter); +@@ -147,8 +114,8 @@ extern void read_eeprom_content_by_attrib(_adapter * padapter ); + #ifdef PLATFORM_LINUX + #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE + extern int isAdaptorInfoFileValid(void); +-extern int storeAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv); +-extern int retriveAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv); ++extern int storeAdaptorInfoFile(char *path, u8 *efuse_data); ++extern int retriveAdaptorInfoFile(char *path, u8 *efuse_data); + #endif //CONFIG_ADAPTOR_INFO_CACHING_FILE + #endif //PLATFORM_LINUX + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_efuse.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_efuse.h +old mode 100755 +new mode 100644 +index 9dbab56..945ccf7 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_efuse.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_efuse.h +@@ -59,6 +59,18 @@ enum _EFUSE_DEF_TYPE { + + #define EFUSE_REPEAT_THRESHOLD_ 3 + ++#define IS_MASKED_MP(ic, txt, offset) (EFUSE_IsAddressMasked_MP_##ic##txt(offset)) ++#define IS_MASKED_TC(ic, txt, offset) (EFUSE_IsAddressMasked_TC_##ic##txt(offset)) ++#define GET_MASK_ARRAY_LEN_MP(ic, txt) (EFUSE_GetArrayLen_MP_##ic##txt()) ++#define GET_MASK_ARRAY_LEN_TC(ic, txt) (EFUSE_GetArrayLen_TC_##ic##txt()) ++#define GET_MASK_ARRAY_MP(ic, txt, offset) (EFUSE_GetMaskArray_MP_##ic##txt(offset)) ++#define GET_MASK_ARRAY_TC(ic, txt, offset) (EFUSE_GetMaskArray_TC_##ic##txt(offset)) ++ ++ ++#define IS_MASKED(ic, txt, offset) ( IS_MASKED_MP(ic,txt, offset) ) ++#define GET_MASK_ARRAY_LEN(ic, txt) ( GET_MASK_ARRAY_LEN_MP(ic,txt) ) ++#define GET_MASK_ARRAY(ic, txt, out) do { GET_MASK_ARRAY_MP(ic,txt, out);} while(0) ++ + //============================================= + // The following is for BT Efuse definition + //============================================= +@@ -77,6 +89,21 @@ typedef struct PG_PKT_STRUCT_A{ + u8 word_cnts; + }PGPKT_STRUCT,*PPGPKT_STRUCT; + ++typedef enum ++{ ++ ERR_SUCCESS = 0, ++ ERR_DRIVER_FAILURE, ++ ERR_IO_FAILURE, ++ ERR_WI_TIMEOUT, ++ ERR_WI_BUSY, ++ ERR_BAD_FORMAT, ++ ERR_INVALID_DATA, ++ ERR_NOT_ENOUGH_SPACE, ++ ERR_WRITE_PROTECT, ++ ERR_READ_BACK_FAIL, ++ ERR_OUT_OF_RANGE ++} ERROR_CODE; ++ + /*------------------------------Define structure----------------------------*/ + typedef struct _EFUSE_HAL{ + u8 fakeEfuseBank; +@@ -84,7 +111,9 @@ typedef struct _EFUSE_HAL{ + u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE]; + u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN]; + u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN]; +- ++ u32 EfuseUsedBytes; ++ u8 EfuseUsedPercentage; ++ + u16 BTEfuseUsedBytes; + u8 BTEfuseUsedPercentage; + u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; +@@ -95,8 +124,32 @@ typedef struct _EFUSE_HAL{ + u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; + u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]; + u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]; ++ ++ // EFUSE Configuration, initialized in HAL_CmnInitPGData(). ++ const u16 MaxSecNum_WiFi; ++ const u16 MaxSecNum_BT; ++ const u16 WordUnit; ++ const u16 PhysicalLen_WiFi; ++ const u16 PhysicalLen_BT; ++ const u16 LogicalLen_WiFi; ++ const u16 LogicalLen_BT; ++ const u16 BankSize; ++ const u16 TotalBankNum; ++ const u16 BankNum_WiFi; ++ const u16 BankNum_BT; ++ const u16 OOBProtectBytes; ++ const u16 ProtectBytes; ++ const u16 BankAvailBytes; ++ const u16 TotalAvailBytes_WiFi; ++ const u16 TotalAvailBytes_BT; ++ const u16 HeaderRetry; ++ const u16 DataRetry; ++ ++ ERROR_CODE Status; ++ + }EFUSE_HAL, *PEFUSE_HAL; + ++extern u8 maskfileBuffer[32]; + + /*------------------------Export global variable----------------------------*/ + extern u8 fakeEfuseBank; +@@ -115,10 +168,13 @@ extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; + extern u8 fakeBTEfuseInitMap[]; + extern u8 fakeBTEfuseModifiedMap[]; + /*------------------------Export global variable----------------------------*/ ++u8 efuse_bt_GetCurrentSize(PADAPTER padapter, u16 *size); ++u16 efuse_bt_GetMaxSize(PADAPTER padapter); + + u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size); + u16 efuse_GetMaxSize(PADAPTER padapter); + u8 rtw_efuse_access(PADAPTER padapter, u8 bRead, u16 start_addr, u16 cnts, u8 *data); ++u8 rtw_efuse_mask_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); + u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); + u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); + u8 rtw_BT_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); +@@ -141,8 +197,24 @@ u8 Efuse_WordEnableDataWrite(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 * + u8 EFUSE_Read1Byte(PADAPTER pAdapter, u16 Address); + void EFUSE_ShadowMapUpdate(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest); + void EFUSE_ShadowRead(PADAPTER pAdapter, u8 Type, u16 Offset, u32 *Value); +-void Rtw_Hal_ReadMACAddrFromFile(PADAPTER padapter); +-u32 Rtw_Hal_readPGDataFromConfigFile(PADAPTER padapter); ++u8 rtw_efuse_file_read(PADAPTER padapter,u8 *filepatch,u8 *buf, u32 len); ++ ++#define MAC_HIDDEN_MAX_BW_NUM 8 ++extern const u8 _mac_hidden_max_bw_to_hal_bw_cap[]; ++#define mac_hidden_max_bw_to_hal_bw_cap(max_bw) (((max_bw) >= MAC_HIDDEN_MAX_BW_NUM) ? 0 : _mac_hidden_max_bw_to_hal_bw_cap[(max_bw)]) ++ ++#define MAC_HIDDEN_PROTOCOL_NUM 4 ++extern const u8 _mac_hidden_proto_to_hal_proto_cap[]; ++#define mac_hidden_proto_to_hal_proto_cap(proto) (((proto) >= MAC_HIDDEN_PROTOCOL_NUM) ? 0 : _mac_hidden_proto_to_hal_proto_cap[(proto)]) ++ ++u8 mac_hidden_wl_func_to_hal_wl_func(u8 func); ++ ++#ifdef PLATFORM_LINUX ++#ifdef CONFIG_EFUSE_CONFIG_FILE ++u32 rtw_read_efuse_from_file(const char *path, u8 *buf); ++u32 rtw_read_macaddr_from_file(const char *path, u8 *buf); ++#endif /* CONFIG_EFUSE_CONFIG_FILE */ ++#endif /* PLATFORM_LINUX */ + + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_event.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_event.h +old mode 100755 +new mode 100644 +index 2fb9503..2aad9cb +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_event.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_event.h +@@ -66,14 +66,12 @@ It is used in AP/Ad-HoC(M) mode. + */ + struct stassoc_event { + unsigned char macaddr[6]; +- unsigned char rsvd[2]; +- int cam_id; +- + }; + + struct stadel_event { + unsigned char macaddr[6]; + unsigned char rsvd[2]; //for reason ++unsigned char locally_generated; + int mac_id; + }; + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ht.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ht.h +old mode 100755 +new mode 100644 +index 84b3bfb..1509dba +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ht.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ht.h +@@ -46,6 +46,7 @@ struct ht_priv + u8 ldpc_cap; + u8 stbc_cap; + u8 beamform_cap; ++ u8 smps_cap; /*spatial multiplexing power save mode. 0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/ + + struct rtw_ieee80211_ht_cap ht_cap; + +@@ -92,40 +93,54 @@ typedef enum _RT_HT_INF1_CAP{ + #define BEAMFORMING_HT_BEAMFORMER_ENABLE BIT0 // Declare our NIC supports beamformer + #define BEAMFORMING_HT_BEAMFORMEE_ENABLE BIT1 // Declare our NIC supports beamformee + #define BEAMFORMING_HT_BEAMFORMER_TEST BIT2 // Transmiting Beamforming no matter the target supports it or not ++#define BEAMFORMING_HT_BEAMFORMER_STEER_NUM (BIT4|BIT5) ++#define BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP (BIT6|BIT7) + + //------------------------------------------------------------ + // The HT Control field + //------------------------------------------------------------ +-#define SET_HT_CTRL_CSI_STEERING(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_pEleStart))+2, 6, 2, _val) +-#define SET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_pEleStart))+3, 0, 1, _val) +-#define GET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+3, 0, 1) ++#define SET_HT_CTRL_CSI_STEERING(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart))+2, 6, 2, _val) ++#define SET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart))+3, 0, 1, _val) ++#define GET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+3, 0, 1) + + // 20/40 BSS Coexist +-#define SET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_pEleStart)), 0, 1, _val) +-#define GET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 0, 1) ++#define SET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 0, 1, _val) ++#define GET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 0, 1) + + /* HT Capabilities Info field */ +-#define HT_CAP_ELE_CAP_INFO(_pEleStart) ((u8*)(_pEleStart)) +-#define GET_HT_CAP_ELE_LDPC_CAP(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 0, 1) +-#define GET_HT_CAP_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 1, 1) +-#define GET_HT_CAP_ELE_SM_PS(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 2, 2) +-#define GET_HT_CAP_ELE_GREENFIELD(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 4, 1) +-#define GET_HT_CAP_ELE_SHORT_GI20M(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 5, 1) +-#define GET_HT_CAP_ELE_SHORT_GI40M(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 6, 1) +-#define GET_HT_CAP_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 7, 1) +-#define GET_HT_CAP_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 0, 2) +-#define GET_HT_CAP_ELE_DELAYED_BA(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 2, 1) +-#define GET_HT_CAP_ELE_MAX_AMSDU_LENGTH(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 3, 1) +-#define GET_HT_CAP_ELE_DSSS_CCK_40M(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 4, 1) +-#define GET_HT_CAP_ELE_FORTY_INTOLERANT(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 6, 1) +-#define GET_HT_CAP_ELE_LSIG_TXOP_PROTECT(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 7, 1) +- +-#define SET_HT_CAP_ELE_FORTY_INTOLERANT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_pEleStart))+1, 6, 1, _val) ++#define HT_CAP_ELE_CAP_INFO(_pEleStart) ((u8 *)(_pEleStart)) ++#define GET_HT_CAP_ELE_LDPC_CAP(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 0, 1) ++#define GET_HT_CAP_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 1, 1) ++#define GET_HT_CAP_ELE_SM_PS(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 2, 2) ++#define GET_HT_CAP_ELE_GREENFIELD(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 4, 1) ++#define GET_HT_CAP_ELE_SHORT_GI20M(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 5, 1) ++#define GET_HT_CAP_ELE_SHORT_GI40M(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 6, 1) ++#define GET_HT_CAP_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 7, 1) ++#define GET_HT_CAP_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 0, 2) ++#define GET_HT_CAP_ELE_DELAYED_BA(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 2, 1) ++#define GET_HT_CAP_ELE_MAX_AMSDU_LENGTH(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 3, 1) ++#define GET_HT_CAP_ELE_DSSS_CCK_40M(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 4, 1) ++#define GET_HT_CAP_ELE_FORTY_INTOLERANT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 6, 1) ++#define GET_HT_CAP_ELE_LSIG_TXOP_PROTECT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 7, 1) ++ ++#define SET_HT_CAP_ELE_LDPC_CAP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 0, 1, _val) ++#define SET_HT_CAP_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 1, 1, _val) ++#define SET_HT_CAP_ELE_SM_PS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 2, 2, _val) ++#define SET_HT_CAP_ELE_GREENFIELD(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 4, 1, _val) ++#define SET_HT_CAP_ELE_SHORT_GI20M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 5, 1, _val) ++#define SET_HT_CAP_ELE_SHORT_GI40M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 6, 1, _val) ++#define SET_HT_CAP_ELE_TX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 7, 1, _val) ++#define SET_HT_CAP_ELE_RX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 0, 2, _val) ++#define SET_HT_CAP_ELE_DELAYED_BA(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 2, 1, _val) ++#define SET_HT_CAP_ELE_MAX_AMSDU_LENGTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 3, 1, _val) ++#define SET_HT_CAP_ELE_DSSS_CCK_40M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 4, 1, _val) ++#define SET_HT_CAP_ELE_FORTY_INTOLERANT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 6, 1, _val) ++#define SET_HT_CAP_ELE_LSIG_TXOP_PROTECT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 7, 1, _val) + + /* A-MPDU Parameters field */ +-#define HT_CAP_ELE_AMPDU_PARA(_pEleStart) (((u8*)(_pEleStart))+2) +-#define GET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+2, 0, 2) +-#define GET_HT_CAP_ELE_MIN_MPDU_S_SPACE(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+2, 2, 3) ++#define HT_CAP_ELE_AMPDU_PARA(_pEleStart) (((u8 *)(_pEleStart))+2) ++#define GET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+2, 0, 2) ++#define GET_HT_CAP_ELE_MIN_MPDU_S_SPACE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+2, 2, 3) + + #define HT_AMPDU_PARA_FMT "%02x " \ + "MAX AMPDU len:%u bytes, MIN MPDU Start Spacing:%u" +@@ -136,34 +151,71 @@ typedef enum _RT_HT_INF1_CAP{ + , GET_HT_CAP_ELE_MIN_MPDU_S_SPACE(((u8*)x)-2) + + /* Supported MCS Set field */ +-#define HT_CAP_ELE_SUP_MCS_SET(_pEleStart) (((u8*)(_pEleStart))+3) ++#define HT_CAP_ELE_SUP_MCS_SET(_pEleStart) (((u8 *)(_pEleStart))+3) + #define HT_CAP_ELE_RX_MCS_MAP(_pEleStart) HT_CAP_ELE_SUP_MCS_SET(_pEleStart) +-#define GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(_pEleStart) LE_BITS_TO_2BYTE(((u8*)(_pEleStart))+13, 0, 10) +-#define GET_HT_CAP_ELE_TX_MCS_DEF(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+15, 0, 1) +-#define GET_HT_CAP_ELE_TRX_MCS_NEQ(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+15, 1, 1) +-#define GET_HT_CAP_ELE_TX_MAX_SS(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+15, 2, 2) +-#define GET_HT_CAP_ELE_TX_UEQM(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+15, 4, 1) ++#define GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(_pEleStart) LE_BITS_TO_2BYTE(((u8 *)(_pEleStart))+13, 0, 10) ++#define GET_HT_CAP_ELE_TX_MCS_DEF(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 0, 1) ++#define GET_HT_CAP_ELE_TRX_MCS_NEQ(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 1, 1) ++#define GET_HT_CAP_ELE_TX_MAX_SS(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 2, 2) ++#define GET_HT_CAP_ELE_TX_UEQM(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 4, 1) + + #define HT_SUP_MCS_SET_FMT "%02x %02x %02x %02x %02x%02x%02x%02x%02x%02x" \ + /* "\n%02x%02x%02x%02x%02x%02x" */\ + " %uMbps %s%s%s" +-#define HT_SUP_MCS_SET_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5], \ +- ((u8*)(x))[6],((u8*)(x))[7],((u8*)(x))[8],((u8*)(x))[9] \ +- /*,((u8*)(x))[10],((u8*)(x))[11], ((u8*)(x))[12],((u8*)(x))[13],((u8*)(x))[14],((u8*)(x))[15] */\ +- , GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(((u8*)x)-3) \ +- , GET_HT_CAP_ELE_TX_MCS_DEF(((u8*)x)-3) ? "TX_MCS_DEF " : "" \ +- , GET_HT_CAP_ELE_TRX_MCS_NEQ(((u8*)x)-3) ? "TRX_MCS_NEQ " : "" \ +- , GET_HT_CAP_ELE_TX_UEQM(((u8*)x)-3) ? "TX_UEQM " : "" ++#define HT_SUP_MCS_SET_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5], \ ++ ((u8 *)(x))[6], ((u8 *)(x))[7], ((u8 *)(x))[8], ((u8 *)(x))[9] \ ++ /*,((u8 *)(x))[10],((u8 *)(x))[11], ((u8 *)(x))[12],((u8 *)(x))[13],((u8 *)(x))[14],((u8 *)(x))[15] */\ ++ , GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(((u8 *)x)-3) \ ++ , GET_HT_CAP_ELE_TX_MCS_DEF(((u8 *)x)-3) ? "TX_MCS_DEF " : "" \ ++ , GET_HT_CAP_ELE_TRX_MCS_NEQ(((u8 *)x)-3) ? "TRX_MCS_NEQ " : "" \ ++ , GET_HT_CAP_ELE_TX_UEQM(((u8 *)x)-3) ? "TX_UEQM " : "" + + //TXBF Capabilities +-#define SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE( ((u8*)(_pEleStart))+21, 3, 1, ((u8)_val) ) +-#define SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE( ((u8*)(_pEleStart))+21, 4, 1, ((u8)_val) ) +-#define SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE( ((u8*)(_pEleStart))+21, 10, 1, ((u8)_val) ) +-#define SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE( ((u8*)(_pEleStart))+21, 15, 2, ((u8)_val) ) +-#define SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart, _val) SET_BITS_TO_LE_4BYTE( ((u8 *)(_pEleStart))+21, 23, 2, ((u8)_val) ) +- +-#define GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart) LE_BITS_TO_4BYTE(((u8*)(_pEleStart))+21, 10, 1) +-#define GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart) LE_BITS_TO_4BYTE(((u8*)(_pEleStart))+21, 15, 2) ++#define SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 3, 1, ((u8)_val)) ++#define SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 4, 1, ((u8)_val)) ++#define SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 10, 1, ((u8)_val)) ++#define SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 15, 2, ((u8)_val)) ++#define SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 23, 2, ((u8)_val)) ++#define SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 27, 2, ((u8)_val)) ++ ++ ++#define GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 10, 1) ++#define GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 15, 2) ++#define GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 23, 2) ++#define GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 27, 2) ++ ++/* HT Operation element */ ++ ++#define GET_HT_OP_ELE_PRI_CHL(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 0, 8) ++#define SET_HT_OP_ELE_PRI_CHL(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 0, 8, _val) ++ ++/* HT Operation Info field */ ++#define HT_OP_ELE_OP_INFO(_pEleStart) (((u8 *)(_pEleStart)) + 1) ++#define GET_HT_OP_ELE_2ND_CHL_OFFSET(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 1, 0, 2) ++#define GET_HT_OP_ELE_STA_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 1, 2, 1) ++#define GET_HT_OP_ELE_RIFS_MODE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 1, 3, 1) ++#define GET_HT_OP_ELE_HT_PROTECT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 2, 0, 2) ++#define GET_HT_OP_ELE_NON_GREEN_PRESENT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 2, 2, 1) ++#define GET_HT_OP_ELE_OBSS_NON_HT_PRESENT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 2, 4, 1) ++#define GET_HT_OP_ELE_DUAL_BEACON(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 4, 6, 1) ++#define GET_HT_OP_ELE_DUAL_CTS(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 4, 7, 1) ++#define GET_HT_OP_ELE_STBC_BEACON(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 0, 1) ++#define GET_HT_OP_ELE_LSIG_TXOP_PROTECT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 1, 1) ++#define GET_HT_OP_ELE_PCO_ACTIVE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 2, 1) ++#define GET_HT_OP_ELE_PCO_PHASE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 3, 1) ++ ++#define SET_HT_OP_ELE_2ND_CHL_OFFSET(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 0, 2, _val) ++#define SET_HT_OP_ELE_STA_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 2, 1, _val) ++#define SET_HT_OP_ELE_RIFS_MODE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 3, 1, _val) ++#define SET_HT_OP_ELE_HT_PROTECT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 0, 2, _val) ++#define SET_HT_OP_ELE_NON_GREEN_PRESENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 2, 1, _val) ++#define SET_HT_OP_ELE_OBSS_NON_HT_PRESENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 4, 1, _val) ++#define SET_HT_OP_ELE_DUAL_BEACON(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 4, 6, 1, _val) ++#define SET_HT_OP_ELE_DUAL_CTS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 4, 7, 1, _val) ++#define SET_HT_OP_ELE_STBC_BEACON(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 0, 1, _val) ++#define SET_HT_OP_ELE_LSIG_TXOP_PROTECT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 1, 1, _val) ++#define SET_HT_OP_ELE_PCO_ACTIVE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 2, 1, _val) ++#define SET_HT_OP_ELE_PCO_PHASE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 3, 1, _val) + + #endif //_RTL871X_HT_H_ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_io.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_io.h +old mode 100755 +new mode 100644 +index bad0acc..1b031f5 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_io.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_io.h +@@ -126,6 +126,14 @@ struct _io_ops + + #ifdef CONFIG_SDIO_HCI + u8 (*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr); ++ #ifdef CONFIG_SDIO_INDIRECT_ACCESS ++ u8 (*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr); ++ u16 (*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr); ++ u32 (*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr); ++ int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++ int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++ int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++ #endif /* CONFIG_SDIO_INDIRECT_ACCESS */ + #endif + + }; +@@ -371,7 +379,17 @@ extern int _rtw_write16(_adapter *adapter, u32 addr, u16 val); + extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val); + extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata); + +-extern u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr); ++#ifdef CONFIG_SDIO_HCI ++u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr); ++#ifdef CONFIG_SDIO_INDIRECT_ACCESS ++u8 _rtw_sd_iread8(_adapter *adapter, u32 addr); ++u16 _rtw_sd_iread16(_adapter *adapter, u32 addr); ++u32 _rtw_sd_iread32(_adapter *adapter, u32 addr); ++int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val); ++int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val); ++int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val); ++#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ ++#endif /* CONFIG_SDIO_HCI */ + + extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val); + extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val); +@@ -383,8 +401,10 @@ u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int + extern void _rtw_write_port_cancel(_adapter *adapter); + + #ifdef DBG_IO +-bool match_read_sniff_ranges(u16 addr, u16 len); +-bool match_write_sniff_ranges(u16 addr, u16 len); ++bool match_read_sniff_ranges(u32 addr, u16 len); ++bool match_write_sniff_ranges(u32 addr, u16 len); ++bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask); ++bool match_rf_write_sniff_ranges(u8 path, u32 addr, u32 mask); + + extern u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line); + extern u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line); +@@ -395,6 +415,18 @@ extern int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *cal + extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); + extern int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line); + ++#ifdef CONFIG_SDIO_HCI ++u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const int line); ++#ifdef CONFIG_SDIO_INDIRECT_ACCESS ++u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line); ++u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line); ++u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line); ++int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line); ++int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line); ++int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); ++#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ ++#endif /* CONFIG_SDIO_HCI */ ++ + #define rtw_read8(adapter, addr) dbg_rtw_read8((adapter), (addr), __FUNCTION__, __LINE__) + #define rtw_read16(adapter, addr) dbg_rtw_read16((adapter), (addr), __FUNCTION__, __LINE__) + #define rtw_read32(adapter, addr) dbg_rtw_read32((adapter), (addr), __FUNCTION__, __LINE__) +@@ -415,7 +447,24 @@ extern int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, co + #define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port(adapter, addr, cnt, mem) + #define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) + #define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter) +-#else //DBG_IO ++ ++#ifdef CONFIG_SDIO_HCI ++#define rtw_sd_f0_read8(adapter, addr) dbg_rtw_sd_f0_read8((adapter), (addr), __func__, __LINE__) ++#ifdef CONFIG_SDIO_INDIRECT_ACCESS ++#define rtw_sd_iread8(adapter, addr) dbg_rtw_sd_iread8((adapter), (addr), __func__, __LINE__) ++#define rtw_sd_iread16(adapter, addr) dbg_rtw_sd_iread16((adapter), (addr), __func__, __LINE__) ++#define rtw_sd_iread32(adapter, addr) dbg_rtw_sd_iread32((adapter), (addr), __func__, __LINE__) ++#define rtw_sd_iwrite8(adapter, addr, val) dbg_rtw_sd_iwrite8((adapter), (addr), (val), __func__, __LINE__) ++#define rtw_sd_iwrite16(adapter, addr, val) dbg_rtw_sd_iwrite16((adapter), (addr), (val), __func__, __LINE__) ++#define rtw_sd_iwrite32(adapter, addr, val) dbg_rtw_sd_iwrite32((adapter), (addr), (val), __func__, __LINE__) ++#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ ++#endif /* CONFIG_SDIO_HCI */ ++ ++#else /* DBG_IO */ ++#define match_read_sniff_ranges(addr, len) _FALSE ++#define match_write_sniff_ranges(addr, len) _FALSE ++#define match_rf_read_sniff_ranges(path, addr, mask) _FALSE ++#define match_rf_write_sniff_ranges(path, addr, mask) _FALSE + #define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr)) + #define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr)) + #define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr)) +@@ -436,9 +485,20 @@ extern int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, co + #define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port((adapter), (addr), (cnt), (mem)) + #define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) + #define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter)) +-#endif //DBG_IO + ++#ifdef CONFIG_SDIO_HCI + #define rtw_sd_f0_read8(adapter, addr) _rtw_sd_f0_read8((adapter), (addr)) ++#ifdef CONFIG_SDIO_INDIRECT_ACCESS ++#define rtw_sd_iread8(adapter, addr) _rtw_sd_iread8((adapter), (addr)) ++#define rtw_sd_iread16(adapter, addr) _rtw_sd_iread16((adapter), (addr)) ++#define rtw_sd_iread32(adapter, addr) _rtw_sd_iread32((adapter), (addr)) ++#define rtw_sd_iwrite8(adapter, addr, val) _rtw_sd_iwrite8((adapter), (addr), (val)) ++#define rtw_sd_iwrite16(adapter, addr, val) _rtw_sd_iwrite16((adapter), (addr), (val)) ++#define rtw_sd_iwrite32(adapter, addr, val) _rtw_sd_iwrite32((adapter), (addr), (val)) ++#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ ++#endif /* CONFIG_SDIO_HCI */ ++ ++#endif /* DBG_IO */ + + extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem); + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ioctl.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ioctl.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ioctl_query.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ioctl_query.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ioctl_rtl.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ioctl_rtl.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ioctl_set.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ioctl_set.h +old mode 100755 +new mode 100644 +index da08376..1b71846 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ioctl_set.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_ioctl_set.h +@@ -70,7 +70,7 @@ u16 rtw_get_cur_max_rate(_adapter *adapter); + int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode); + int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan); + int rtw_set_country(_adapter *adapter, const char *country_code); +-int rtw_set_band(_adapter *adapter, enum _BAND band); ++int rtw_set_band(_adapter *adapter, u8 band); + + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_iol.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_iol.h +old mode 100755 +new mode 100644 +index ddabeac..128668c +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_iol.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_iol.h +@@ -1,137 +1,137 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTW_IOL_H_ +-#define __RTW_IOL_H_ +- +- +-struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter); +-int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len); +-int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary); +-int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); +-bool rtw_IOL_applied(ADAPTER *adapter); +-int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us); +-int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms); +-int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame); +- +- +-#ifdef CONFIG_IOL_NEW_GENERATION +-#define IOREG_CMD_END_LEN 4 +- +-struct ioreg_cfg{ +- u8 length; +- u8 cmd_id; +- u16 address; +- u32 data; +- u32 mask; +-}; +-enum ioreg_cmd{ +- IOREG_CMD_LLT = 0x01, +- IOREG_CMD_REFUSE = 0x02, +- IOREG_CMD_EFUSE_PATH = 0x03, +- IOREG_CMD_WB_REG = 0x04, +- IOREG_CMD_WW_REG = 0x05, +- IOREG_CMD_WD_REG = 0x06, +- IOREG_CMD_W_RF = 0x07, +- IOREG_CMD_DELAY_US = 0x10, +- IOREG_CMD_DELAY_MS = 0x11, +- IOREG_CMD_END = 0xFF, +-}; +-void read_efuse_from_txpktbuf(ADAPTER *adapter, int bcnhead, u8 *content, u16 *size); +- +-int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask); +-int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask); +-int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask); +-int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask); +-#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value) ,(mask)) +-#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value),(mask)) +-#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value),(mask)) +-#define rtw_IOL_append_WRF_cmd(xmit_frame, rf_path, addr, value,mask) _rtw_IOL_append_WRF_cmd((xmit_frame),(rf_path), (addr), (value),(mask)) +- +-u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame); +-void rtw_IOL_cmd_buf_dump(ADAPTER *Adapter,int buf_len,u8 *pbuf); +- +-#ifdef CONFIG_IOL_IOREG_CFG_DBG +- struct cmd_cmp{ +- u16 addr; +- u32 value; +- }; +-#endif +- +-#else //CONFIG_IOL_NEW_GENERATION +- +-typedef struct _io_offload_cmd { +- u8 rsvd0; +- u8 cmd; +- u16 address; +- u32 value; +-} IO_OFFLOAD_CMD, IOL_CMD; +- +-#define IOL_CMD_LLT 0x00 +-//#define IOL_CMD_R_EFUSE 0x01 +-#define IOL_CMD_WB_REG 0x02 +-#define IOL_CMD_WW_REG 0x03 +-#define IOL_CMD_WD_REG 0x04 +-//#define IOL_CMD_W_RF 0x05 +-#define IOL_CMD_DELAY_US 0x80 +-#define IOL_CMD_DELAY_MS 0x81 +-//#define IOL_CMD_DELAY_S 0x82 +-#define IOL_CMD_END 0x83 +- +-/***************************************************** +-CMD Address Value +-(B1) (B2/B3:H/L addr) (B4:B7 : MSB:LSB) +-****************************************************** +-IOL_CMD_LLT - B7: PGBNDY +-//IOL_CMD_R_EFUSE - - +-IOL_CMD_WB_REG 0x0~0xFFFF B7 +-IOL_CMD_WW_REG 0x0~0xFFFF B6~B7 +-IOL_CMD_WD_REG 0x0~0xFFFF B4~B7 +-//IOL_CMD_W_RF RF Reg B5~B7 +-IOL_CMD_DELAY_US - B6~B7 +-IOL_CMD_DELAY_MS - B6~B7 +-//IOL_CMD_DELAY_S - B6~B7 +-IOL_CMD_END - - +-******************************************************/ +-int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value); +-int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value); +-int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value); +- +- +-int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms); +-int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms); +- +-#ifdef DBG_IO +-int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line); +-int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line); +-int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line); +-#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) +-#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) +-#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) +-#else +-#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value)) +-#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value)) +-#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value)) +-#endif // DBG_IO +-#endif // CONFIG_IOL_NEW_GENERATION +- +- +- +-#endif //__RTW_IOL_H_ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_IOL_H_ ++#define __RTW_IOL_H_ ++ ++ ++struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter); ++int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len); ++int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary); ++int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); ++bool rtw_IOL_applied(ADAPTER *adapter); ++int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us); ++int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms); ++int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame); ++ ++ ++#ifdef CONFIG_IOL_NEW_GENERATION ++#define IOREG_CMD_END_LEN 4 ++ ++struct ioreg_cfg{ ++ u8 length; ++ u8 cmd_id; ++ u16 address; ++ u32 data; ++ u32 mask; ++}; ++enum ioreg_cmd{ ++ IOREG_CMD_LLT = 0x01, ++ IOREG_CMD_REFUSE = 0x02, ++ IOREG_CMD_EFUSE_PATH = 0x03, ++ IOREG_CMD_WB_REG = 0x04, ++ IOREG_CMD_WW_REG = 0x05, ++ IOREG_CMD_WD_REG = 0x06, ++ IOREG_CMD_W_RF = 0x07, ++ IOREG_CMD_DELAY_US = 0x10, ++ IOREG_CMD_DELAY_MS = 0x11, ++ IOREG_CMD_END = 0xFF, ++}; ++void read_efuse_from_txpktbuf(ADAPTER *adapter, int bcnhead, u8 *content, u16 *size); ++ ++int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask); ++int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask); ++int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask); ++int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask); ++#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value) ,(mask)) ++#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value),(mask)) ++#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value),(mask)) ++#define rtw_IOL_append_WRF_cmd(xmit_frame, rf_path, addr, value,mask) _rtw_IOL_append_WRF_cmd((xmit_frame),(rf_path), (addr), (value),(mask)) ++ ++u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame); ++void rtw_IOL_cmd_buf_dump(ADAPTER *Adapter,int buf_len,u8 *pbuf); ++ ++#ifdef CONFIG_IOL_IOREG_CFG_DBG ++ struct cmd_cmp{ ++ u16 addr; ++ u32 value; ++ }; ++#endif ++ ++#else //CONFIG_IOL_NEW_GENERATION ++ ++typedef struct _io_offload_cmd { ++ u8 rsvd0; ++ u8 cmd; ++ u16 address; ++ u32 value; ++} IO_OFFLOAD_CMD, IOL_CMD; ++ ++#define IOL_CMD_LLT 0x00 ++//#define IOL_CMD_R_EFUSE 0x01 ++#define IOL_CMD_WB_REG 0x02 ++#define IOL_CMD_WW_REG 0x03 ++#define IOL_CMD_WD_REG 0x04 ++//#define IOL_CMD_W_RF 0x05 ++#define IOL_CMD_DELAY_US 0x80 ++#define IOL_CMD_DELAY_MS 0x81 ++//#define IOL_CMD_DELAY_S 0x82 ++#define IOL_CMD_END 0x83 ++ ++/***************************************************** ++CMD Address Value ++(B1) (B2/B3:H/L addr) (B4:B7 : MSB:LSB) ++****************************************************** ++IOL_CMD_LLT - B7: PGBNDY ++//IOL_CMD_R_EFUSE - - ++IOL_CMD_WB_REG 0x0~0xFFFF B7 ++IOL_CMD_WW_REG 0x0~0xFFFF B6~B7 ++IOL_CMD_WD_REG 0x0~0xFFFF B4~B7 ++//IOL_CMD_W_RF RF Reg B5~B7 ++IOL_CMD_DELAY_US - B6~B7 ++IOL_CMD_DELAY_MS - B6~B7 ++//IOL_CMD_DELAY_S - B6~B7 ++IOL_CMD_END - - ++******************************************************/ ++int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value); ++int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value); ++int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value); ++ ++ ++int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms); ++int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms); ++ ++#ifdef DBG_IO ++int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line); ++int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line); ++int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line); ++#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#else ++#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value)) ++#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value)) ++#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value)) ++#endif // DBG_IO ++#endif // CONFIG_IOL_NEW_GENERATION ++ ++ ++ ++#endif //__RTW_IOL_H_ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mem.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mem.h +old mode 100755 +new mode 100644 +index 5283d77..8017e6a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mem.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mem.h +@@ -1,38 +1,42 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTW_MEM_H__ +-#define __RTW_MEM_H__ +- +-#include +-#include +-#include +- +- +-#ifndef MAX_RECVBUF_SZ +-#define MAX_RECVBUF_SZ (32768-RECVBUFF_ALIGN_SZ) // 32k +-#endif +- +-struct u8* rtw_alloc_revcbuf_premem(void); +-struct sk_buff *rtw_alloc_skb_premem(void); +-int rtw_free_skb_premem(struct sk_buff *pskb); +- +- +-#endif //__RTW_MEM_H__ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_MEM_H__ ++#define __RTW_MEM_H__ ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_PLATFORM_MSTAR_HIGH ++#define MAX_RTKM_RECVBUF_SZ (31744) /* 31k */ ++#else ++#define MAX_RTKM_RECVBUF_SZ (15360) /* 15k */ ++#endif /* CONFIG_PLATFORM_MSTAR_HIGH */ ++#define MAX_RTKM_NR_PREALLOC_RECV_SKB 16 ++ ++u16 rtw_rtkm_get_buff_size(void); ++u8 rtw_rtkm_get_nr_recv_skb(void); ++struct u8* rtw_alloc_revcbuf_premem(void); ++struct sk_buff *rtw_alloc_skb_premem(u16 in_size); ++int rtw_free_skb_premem(struct sk_buff *pskb); ++ ++ ++#endif //__RTW_MEM_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mlme.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mlme.h +old mode 100755 +new mode 100644 +index d5c9744..3831890 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mlme.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mlme.h +@@ -29,7 +29,11 @@ + // Commented by Albert 20101105 + // Increase the scanning timeout because of increasing the SURVEY_TO value. + +-#define SCANNING_TIMEOUT 8000 ++#define SCANNING_TIMEOUT 8000 ++#ifdef CONFIG_SCAN_BACKOP ++#define CONC_SCANNING_TIMEOUT_SINGLE_BAND 10000 ++#define CONC_SCANNING_TIMEOUT_DUAL_BAND 15000 ++#endif + + #ifdef PALTFORM_OS_WINCE + #define SCANQUEUE_LIFETIME 12000000 // unit:us +@@ -37,48 +41,87 @@ + #define SCANQUEUE_LIFETIME 20000 // 20sec, unit:msec + #endif + +-#define WIFI_NULL_STATE 0x00000000 +-#define WIFI_ASOC_STATE 0x00000001 // Under Linked state... +-#define WIFI_REASOC_STATE 0x00000002 +-#define WIFI_SLEEP_STATE 0x00000004 +-#define WIFI_STATION_STATE 0x00000008 +-#define WIFI_AP_STATE 0x00000010 +-#define WIFI_ADHOC_STATE 0x00000020 +-#define WIFI_ADHOC_MASTER_STATE 0x00000040 +-#define WIFI_UNDER_LINKING 0x00000080 +- +-#define WIFI_UNDER_WPS 0x00000100 +-//#define WIFI_UNDER_CMD 0x00000200 +-//#define WIFI_UNDER_P2P 0x00000400 +-#define WIFI_STA_ALIVE_CHK_STATE 0x00000400 +-#define WIFI_SITE_MONITOR 0x00000800 //to indicate the station is under site surveying +-#ifdef WDS +-#define WIFI_WDS 0x00001000 +-#define WIFI_WDS_RX_BEACON 0x00002000 // already rx WDS AP beacon +-#endif +-#ifdef AUTO_CONFIG +-#define WIFI_AUTOCONF 0x00004000 +-#define WIFI_AUTOCONF_IND 0x00008000 +-#endif ++#define WIFI_NULL_STATE 0x00000000 ++#define WIFI_ASOC_STATE 0x00000001 /* Linked */ ++#define WIFI_REASOC_STATE 0x00000002 ++#define WIFI_SLEEP_STATE 0x00000004 ++#define WIFI_STATION_STATE 0x00000008 ++#define WIFI_AP_STATE 0x00000010 ++#define WIFI_ADHOC_STATE 0x00000020 ++#define WIFI_ADHOC_MASTER_STATE 0x00000040 ++#define WIFI_UNDER_LINKING 0x00000080 ++#define WIFI_UNDER_WPS 0x00000100 ++/*#define WIFI_UNDEFINED_STATE 0x00000200*/ ++#define WIFI_STA_ALIVE_CHK_STATE 0x00000400 ++#define WIFI_SITE_MONITOR 0x00000800 /* under site surveying */ ++#define WIFI_WDS 0x00001000 ++#define WIFI_WDS_RX_BEACON 0x00002000 /* already rx WDS AP beacon */ ++#define WIFI_AUTOCONF 0x00004000 ++#define WIFI_AUTOCONF_IND 0x00008000 ++#define WIFI_MP_STATE 0x00010000 ++#define WIFI_MP_CTX_BACKGROUND 0x00020000 /* in continuous tx background */ ++#define WIFI_MP_CTX_ST 0x00040000 /* in continuous tx with single-tone */ ++#define WIFI_MP_CTX_BACKGROUND_PENDING 0x00080000 /* pending in continuous tx background due to out of skb */ ++#define WIFI_MP_CTX_CCK_HW 0x00100000 /* in continuous tx */ ++#define WIFI_MP_CTX_CCK_CS 0x00200000 /* in continuous tx with carrier suppression */ ++#define WIFI_MP_LPBK_STATE 0x00400000 ++#define WIFI_OP_CH_SWITCHING 0x00800000 ++/*#define WIFI_UNDEFINED_STATE 0x01000000*/ ++/*#define WIFI_UNDEFINED_STATE 0x02000000*/ ++/*#define WIFI_UNDEFINED_STATE 0x04000000*/ ++/*#define WIFI_UNDEFINED_STATE 0x08000000*/ ++/*#define WIFI_UNDEFINED_STATE 0x10000000*/ ++/*#define WIFI_UNDEFINED_STATE 0x20000000*/ ++/*#define WIFI_UNDEFINED_STATE 0x40000000*/ ++#define WIFI_MONITOR_STATE 0x80000000 ++ ++#define MIRACAST_DISABLED 0 ++#define MIRACAST_SOURCE BIT0 ++#define MIRACAST_SINK BIT1 ++ ++#define MIRACAST_MODE_REVERSE(mode) \ ++ ((((mode) & MIRACAST_SOURCE) ? MIRACAST_SINK : 0) | (((mode) & MIRACAST_SINK) ? MIRACAST_SOURCE : 0)) ++ ++bool is_miracast_enabled(_adapter *adapter); ++bool rtw_chk_miracast_mode(_adapter *adapter, u8 mode); ++const char *get_miracast_mode_str(int mode); ++void rtw_wfd_st_switch(struct sta_info *sta, bool on); ++ ++#define MLME_STATE(adapter) get_fwstate(&((adapter)->mlmepriv)) ++ ++#define MLME_IS_STA(adapter) (MLME_STATE((adapter)) & WIFI_STATION_STATE) ++#define MLME_IS_AP(adapter) (MLME_STATE((adapter)) & WIFI_AP_STATE) ++#define MLME_IS_ADHOC(adapter) (MLME_STATE((adapter)) & WIFI_ADHOC_STATE) ++#define MLME_IS_ADHOC_MASTER(adapter) (MLME_STATE((adapter)) & WIFI_ADHOC_MASTER_STATE) ++#define MLME_IS_MONITOR(adapter) (MLME_STATE((adapter)) & WIFI_MONITOR_STATE) ++#define MLME_IS_MP(adapter) (MLME_STATE((adapter)) & WIFI_MP_STATE) ++#ifdef CONFIG_P2P ++#define MLME_IS_GC(adapter) rtw_p2p_chk_role(&(adapter)->wdinfo, P2P_ROLE_CLIENT) ++#define MLME_IS_GO(adapter) rtw_p2p_chk_role(&(adapter)->wdinfo, P2P_ROLE_GO) ++#else /* !CONFIG_P2P */ ++#define MLME_IS_GC(adapter) 0 ++#define MLME_IS_GO(adapter) 0 ++#endif /* !CONFIG_P2P */ ++#define MLME_IS_MSRC(adapter) rtw_chk_miracast_mode((adapter), MIRACAST_SOURCE) ++#define MLME_IS_MSINK(adapter) rtw_chk_miracast_mode((adapter), MIRACAST_SINK) ++ ++#define MLME_STATE_FMT "%s%s%s%s%s%s%s%s%s%s%s%s%s%s" ++#define MLME_STATE_ARG(adapter) \ ++ MLME_IS_STA((adapter)) ? (MLME_IS_GC((adapter)) ? " GC" : " STA") : "", \ ++ MLME_IS_AP((adapter)) ? (MLME_IS_GO((adapter)) ? " GO" : " AP") : "", \ ++ MLME_IS_ADHOC((adapter)) ? " ADHOC" : "", \ ++ MLME_IS_ADHOC_MASTER((adapter)) ? " ADHOC_M" : "", \ ++ MLME_IS_MONITOR((adapter)) ? " MONITOR" : "", \ ++ MLME_IS_MP((adapter)) ? " MP" : "", \ ++ MLME_IS_MSRC((adapter)) ? " MSRC" : "", \ ++ MLME_IS_MSINK((adapter)) ? " MSINK" : "", \ ++ (MLME_STATE((adapter)) & WIFI_SITE_MONITOR) ? " SCAN" : "", \ ++ (MLME_STATE((adapter)) & WIFI_UNDER_LINKING) ? " LINKING" : "", \ ++ (MLME_STATE((adapter)) & WIFI_ASOC_STATE) ? " ASOC" : "", \ ++ (MLME_STATE((adapter)) & WIFI_OP_CH_SWITCHING) ? " OP_CH_SW" : "", \ ++ (MLME_STATE((adapter)) & WIFI_UNDER_WPS) ? " WPS" : "", \ ++ (MLME_STATE((adapter)) & WIFI_SLEEP_STATE) ? " SLEEP" : "" + +-/* +-// ========== P2P Section Start =============== +-#define WIFI_P2P_LISTEN_STATE 0x00010000 +-#define WIFI_P2P_GROUP_FORMATION_STATE 0x00020000 +-// ========== P2P Section End =============== +-*/ +- +-//#ifdef UNDER_MPTEST +-#define WIFI_MP_STATE 0x00010000 +-#define WIFI_MP_CTX_BACKGROUND 0x00020000 // in continous tx background +-#define WIFI_MP_CTX_ST 0x00040000 // in continous tx with single-tone +-#define WIFI_MP_CTX_BACKGROUND_PENDING 0x00080000 // pending in continous tx background due to out of skb +-#define WIFI_MP_CTX_CCK_HW 0x00100000 // in continous tx +-#define WIFI_MP_CTX_CCK_CS 0x00200000 // in continous tx with carrier suppression +-#define WIFI_MP_LPBK_STATE 0x00400000 +-//#endif +- +-//#define _FW_UNDER_CMD WIFI_UNDER_CMD + #define _FW_UNDER_LINKING WIFI_UNDER_LINKING + #define _FW_LINKED WIFI_ASOC_STATE + #define _FW_UNDER_SURVEY WIFI_SITE_MONITOR +@@ -101,15 +144,11 @@ typedef enum _RT_SCAN_TYPE + SCAN_MIX, + }RT_SCAN_TYPE, *PRT_SCAN_TYPE; + +-enum _BAND +-{ +- GHZ24_50 = 0, +- GHZ_50, +- GHZ_24, +- GHZ_MAX, +-}; ++#define WIFI_FREQUENCY_BAND_AUTO 0 ++#define WIFI_FREQUENCY_BAND_5GHZ 1 ++#define WIFI_FREQUENCY_BAND_2GHZ 2 + +-#define rtw_band_valid(band) ((band) >= GHZ24_50 && (band) < GHZ_MAX) ++#define rtw_band_valid(band) ((band) <= WIFI_FREQUENCY_BAND_2GHZ) + + enum DriverInterface { + DRIVER_WEXT = 1, +@@ -191,7 +230,9 @@ struct tx_invite_resp_info{ + + struct wifi_display_info{ + u16 wfd_enable; // Eanble/Disable the WFD function. +- u16 rtsp_ctrlport; // TCP port number at which the this WFD device listens for RTSP messages ++ u16 init_rtsp_ctrlport; /* init value of rtsp_ctrlport when WFD enable */ ++ u16 rtsp_ctrlport; /* TCP port number at which the this WFD device listens for RTSP messages, 0 when WFD disable */ ++ u16 tdls_rtsp_ctrlport; /* rtsp_ctrlport used by tdls, will sync when rtsp_ctrlport is changed by user */ + u16 peer_rtsp_ctrlport; // TCP port number at which the peer WFD device listens for RTSP messages + // This filed should be filled when receiving the gropu negotiation request + +@@ -208,7 +249,8 @@ struct wifi_display_info{ + // 0 -> WFD Source Device + // 1 -> WFD Primary Sink Device + enum SCAN_RESULT_TYPE scan_result_type; // Used when P2P is enable. This parameter will impact the scan result. +- ++ u8 op_wfd_mode; ++ u8 stack_wfd_mode; + }; + #endif //CONFIG_WFD + +@@ -231,6 +273,7 @@ struct tx_nego_req_info{ + u16 peer_channel_num[2]; // The channel number which the receiver stands. + u8 peerDevAddr[ ETH_ALEN ]; // Peer device address + u8 benable; // This negoitation request frame is trigger to send or not ++ u8 peer_ch; /* The listen channel for peer P2P device */ + }; + + struct group_id_info{ +@@ -253,8 +296,8 @@ struct cfg80211_wifidirect_info{ + u8 restore_channel; + struct ieee80211_channel remain_on_ch_channel; + enum nl80211_channel_type remain_on_ch_type; +- u64 remain_on_ch_cookie; +- bool not_indic_ro_ch_exp; ++ ATOMIC_T ro_ch_cookie_gen; ++ u64 remain_on_ch_cookie; + bool is_ro_ch; + u32 last_ro_ch_time; /* this will be updated at the beginning and end of ro_ch */ + }; +@@ -390,22 +433,47 @@ struct tdls_ss_record{ //signal strength record + u8 is_tdls_sta; // _TRUE: direct link sta, _FALSE: else + }; + ++struct tdls_temp_mgmt{ ++ u8 initiator; // 0: None, 1: we initiate, 2: peer initiate ++ u8 peer_addr[ETH_ALEN]; ++}; ++ ++#ifdef CONFIG_TDLS_CH_SW ++struct tdls_ch_switch{ ++ u32 ch_sw_state; ++ ATOMIC_T chsw_on; ++ u8 addr[ETH_ALEN]; ++ u8 off_ch_num; ++ u8 ch_offset; ++ u32 cur_time; ++ u8 delay_switch_back; ++ u8 dump_stack; ++ struct submit_ctx chsw_sctx; ++}; ++#endif ++ + struct tdls_info{ + u8 ap_prohibited; ++ u8 ch_switch_prohibited; + u8 link_established; + u8 sta_cnt; +- u8 sta_maximum; // 1:tdls sta is equal (NUM_STA-1), reach max direct link number; 0: else; ++ u8 sta_maximum; /* 1:tdls sta is equal (NUM_STA-1), reach max direct link number; 0: else; */ + struct tdls_ss_record ss_record; ++#ifdef CONFIG_TDLS_CH_SW ++ struct tdls_ch_switch chsw_info; ++#endif ++ + u8 ch_sensing; + u8 cur_channel; +- u8 candidate_ch; + u8 collect_pkt_num[MAX_CHANNEL_NUM]; + _lock cmd_lock; + _lock hdl_lock; + u8 watchdog_count; +- u8 dev_discovered; //WFD_TDLS: for sigma test ++ u8 dev_discovered; /* WFD_TDLS: for sigma test */ + u8 tdls_enable; +- u8 external_setup; // _TRUE: setup is handled by wpa_supplicant ++ ++ /* Let wpa_supplicant to setup*/ ++ u8 driver_setup; + #ifdef CONFIG_WFD + struct wifi_display_info *wfd_info; + #endif +@@ -418,7 +486,6 @@ struct tdls_txmgmt { + u16 status_code; + u8 *buf; + size_t len; +- u8 external_support; + }; + + /* used for mlme_priv.roam_flags */ +@@ -458,7 +525,9 @@ struct mlme_priv { + + u8 *nic_hdl; + ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 + u8 not_indic_disco; ++ #endif + _list *pscanned; + _queue free_bss_pool; + _queue scanned_queue; +@@ -478,6 +547,7 @@ struct mlme_priv { + + #ifdef CONFIG_ARP_KEEP_ALIVE + // for arp offload keep alive ++ u8 bGetGateway; + u8 gw_mac_addr[6]; + u8 gw_ip[4]; + #endif +@@ -520,23 +590,33 @@ struct mlme_priv { + struct vht_priv vhtpriv; + #endif + #ifdef CONFIG_BEAMFORMING ++#if (BEAMFORMING_SUPPORT == 0)/*for driver beamforming*/ + struct beamforming_info beamforming_info; + #endif ++#endif + + #ifdef CONFIG_DFS + u8 handle_dfs; +-#endif //CONFIG_DFS ++#endif ++#ifdef CONFIG_DFS_MASTER ++ /* TODO: move to rfctl */ ++ _timer dfs_master_timer; ++#endif + + RT_LINK_DETECT_T LinkDetectInfo; + _timer dynamic_chk_timer; //dynamic/periodic check timer + + u8 acm_mask; // for wmm acm mask ++ const struct country_chplan *country_ent; + u8 ChannelPlan; + RT_SCAN_TYPE scan_mode; // active: 1, passive: 0 + + u8 *wps_probe_req_ie; + u32 wps_probe_req_ie_len; + ++ u8 ext_capab_ie_data[8];/*currently for ap mode only*/ ++ u8 ext_capab_ie_len; ++ + #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) + /* Number of associated Non-ERP stations (i.e., stations using 802.11b + * in 802.11g BSS) */ +@@ -548,7 +628,7 @@ struct mlme_priv { + /* Number of associated stations that do not support Short Preamble */ + int num_sta_no_short_preamble; + +- int olbc; /* Overlapping Legacy BSS Condition */ ++ int olbc; /* Overlapping Legacy BSS Condition (Legacy b/g)*/ + + /* Number of HT associated stations that do not support greenfield */ + int num_sta_ht_no_gf; +@@ -559,11 +639,17 @@ struct mlme_priv { + /* Number of HT associated stations 20 MHz */ + int num_sta_ht_20mhz; + ++ /* number of associated stations 40MHz intolerant */ ++ int num_sta_40mhz_intolerant; ++ + /* Overlapping BSS information */ + int olbc_ht; + + #ifdef CONFIG_80211N_HT ++ int ht_20mhz_width_req; ++ int ht_intolerant_ch_reported; + u16 ht_op_mode; ++ u8 sw_to_20mhz; /*switch to 20Mhz BW*/ + #endif /* CONFIG_80211N_HT */ + + u8 *assoc_req; +@@ -586,29 +672,21 @@ struct mlme_priv { + u8 *p2p_probe_resp_ie; + u8 *p2p_go_probe_resp_ie; //for GO + u8 *p2p_assoc_req_ie; ++ u8 *p2p_assoc_resp_ie; + + u32 p2p_beacon_ie_len; + u32 p2p_probe_req_ie_len; + u32 p2p_probe_resp_ie_len; + u32 p2p_go_probe_resp_ie_len; //for GO + u32 p2p_assoc_req_ie_len; +-/* +-#if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) +- //u8 *wps_p2p_beacon_ie; +- u8 *p2p_beacon_ie; +- u8 *wps_p2p_probe_resp_ie; +- u8 *wps_p2p_assoc_resp_ie; +- //u32 wps_p2p_beacon_ie_len; +- u32 p2p_beacon_ie_len; +- u32 wps_p2p_probe_resp_ie_len; +- u32 wps_p2p_assoc_resp_ie_len; +-#endif +-*/ ++ u32 p2p_assoc_resp_ie_len; + + _lock bcn_update_lock; + u8 update_bcn; + +- ++ u8 ori_ch; ++ u8 ori_bw; ++ u8 ori_offset; + #endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) + + #if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) +@@ -618,12 +696,14 @@ struct mlme_priv { + u8 *wfd_probe_resp_ie; + u8 *wfd_go_probe_resp_ie; //for GO + u8 *wfd_assoc_req_ie; ++ u8 *wfd_assoc_resp_ie; + + u32 wfd_beacon_ie_len; + u32 wfd_probe_req_ie_len; + u32 wfd_probe_resp_ie_len; + u32 wfd_go_probe_resp_ie_len; //for GO + u32 wfd_assoc_req_ie_len; ++ u32 wfd_assoc_resp_ie_len; + + #endif + +@@ -668,10 +748,16 @@ struct mlme_priv { + // u32 timeBcnInfoChkStart; + }; + ++#define mlme_set_scan_to_timer(mlme, ms) \ ++ do { \ ++ /* DBG_871X("%s set_scan_to_timer(%p, %d)\n", __FUNCTION__, (mlme), (ms)); */ \ ++ _set_timer(&(mlme)->scan_to_timer, (ms)); \ ++ } while(0) ++ + #define rtw_mlme_set_auto_scan_int(adapter, ms) \ + do { \ + adapter->mlmepriv.auto_scan_int_ms = ms; \ +- while (0) ++ } while (0) + + void rtw_mlme_reset_auto_scan_int(_adapter *adapter); + +@@ -702,7 +788,9 @@ extern void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf); + extern void rtw_atimdone_event_callback(_adapter *adapter, u8 *pbuf); + extern void rtw_cpwm_event_callback(_adapter *adapter, u8 *pbuf); + extern void rtw_wmm_event_callback(PADAPTER padapter, u8 *pbuf); +- ++#ifdef CONFIG_IEEE80211W ++void rtw_sta_timeout_event_callback(_adapter *adapter, u8 *pbuf); ++#endif /* CONFIG_IEEE80211W */ + extern void rtw_join_timeout_handler(RTW_TIMER_HDL_ARGS); + extern void _rtw_scan_timeout_handler(RTW_TIMER_HDL_ARGS); + +@@ -771,16 +859,6 @@ __inline static void clr_fwstate(struct mlme_priv *pmlmepriv, sint state) + _irqL irqL; + + _enter_critical_bh(&pmlmepriv->lock, &irqL); +- if (check_fwstate(pmlmepriv, state) == _TRUE) +- pmlmepriv->fw_state ^= state; +- _exit_critical_bh(&pmlmepriv->lock, &irqL); +-} +- +-__inline static void clr_fwstate_ex(struct mlme_priv *pmlmepriv, sint state) +-{ +- _irqL irqL; +- +- _enter_critical_bh(&pmlmepriv->lock, &irqL); + _clr_fwstate_(pmlmepriv, state); + _exit_critical_bh(&pmlmepriv->lock, &irqL); + } +@@ -828,9 +906,14 @@ struct wlan_network *_rtw_find_same_network(_queue *scanned_queue, struct wlan_n + struct wlan_network *rtw_find_same_network(_queue *scanned_queue, struct wlan_network *network); + + extern void rtw_free_assoc_resources(_adapter* adapter, int lock_scanned_queue); +-extern void rtw_indicate_disconnect(_adapter* adapter); ++extern void rtw_indicate_disconnect(_adapter *adapter, u16 reason, u8 locally_generated); + extern void rtw_indicate_connect(_adapter* adapter); + void rtw_indicate_scan_done( _adapter *padapter, bool aborted); ++ ++void rtw_drv_scan_by_self(_adapter *padapter); ++void rtw_scan_wait_completed(_adapter *adapter); ++u32 rtw_scan_abort_timeout(_adapter *adapter, u32 timeout_ms); ++void rtw_scan_abort_no_wait(_adapter *adapter); + void rtw_scan_abort(_adapter *adapter); + + extern int rtw_restruct_sec_ie(_adapter *adapter,u8 *in_ie,u8 *out_ie,uint in_len); +@@ -857,11 +940,20 @@ void rtw_set_scan_deny(_adapter *adapter, u32 ms); + #define rtw_set_scan_deny(adapter, ms) do {} while (0) + #endif + ++void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv); + +-extern int _rtw_init_mlme_priv(_adapter *padapter); ++#define MLME_BEACON_IE 0 ++#define MLME_PROBE_REQ_IE 1 ++#define MLME_PROBE_RESP_IE 2 ++#define MLME_GO_PROBE_RESP_IE 3 ++#define MLME_ASSOC_REQ_IE 4 ++#define MLME_ASSOC_RESP_IE 5 + +-void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv); ++#if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) ++int rtw_mlme_update_wfd_ie_data(struct mlme_priv *mlme, u8 type, u8 *ie, u32 ie_len); ++#endif + ++extern int _rtw_init_mlme_priv(_adapter *padapter); + extern void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv); + + extern int _rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork); +@@ -940,12 +1032,48 @@ int rtw_select_roaming_candidate(struct mlme_priv *pmlmepriv); + #define rtw_select_roaming_candidate(mlme) _FAIL + #endif /* CONFIG_LAYER2_ROAMING */ + +-void rtw_sta_media_status_rpt(_adapter *adapter,struct sta_info *psta, u32 mstatus); ++bool rtw_adjust_chbw(_adapter *adapter, u8 req_ch, u8 *req_bw, u8 *req_offset); ++ ++struct sta_media_status_rpt_cmd_parm { ++ struct sta_info *sta; ++ bool connected; ++}; ++ ++void rtw_sta_media_status_rpt(_adapter *adapter, struct sta_info *sta, bool connected); ++u8 rtw_sta_media_status_rpt_cmd(_adapter *adapter, struct sta_info *sta, bool connected); ++void rtw_sta_media_status_rpt_cmd_hdl(_adapter *adapter, struct sta_media_status_rpt_cmd_parm *parm); + + #ifdef CONFIG_INTEL_PROXIM + void rtw_proxim_enable(_adapter *padapter); + void rtw_proxim_disable(_adapter *padapter); + void rtw_proxim_send_packet(_adapter *padapter,u8 *pbuf,u16 len,u8 hw_rate); + #endif //CONFIG_INTEL_PROXIM ++ ++#define IPV4_SRC(_iphdr) (((u8 *)(_iphdr)) + 12) ++#define IPV4_DST(_iphdr) (((u8 *)(_iphdr)) + 16) ++#define GET_IPV4_IHL(_iphdr) BE_BITS_TO_1BYTE(((u8 *)(_iphdr)) + 0, 0, 4) ++#define GET_IPV4_PROTOCOL(_iphdr) BE_BITS_TO_1BYTE(((u8 *)(_iphdr)) + 9, 0, 8) ++#define GET_IPV4_SRC(_iphdr) BE_BITS_TO_4BYTE(((u8 *)(_iphdr)) + 12, 0, 32) ++#define GET_IPV4_DST(_iphdr) BE_BITS_TO_4BYTE(((u8 *)(_iphdr)) + 16, 0, 32) ++ ++#define GET_UDP_SRC(_udphdr) BE_BITS_TO_2BYTE(((u8 *)(_udphdr)) + 0, 0, 16) ++#define GET_UDP_DST(_udphdr) BE_BITS_TO_2BYTE(((u8 *)(_udphdr)) + 2, 0, 16) ++ ++#define TCP_SRC(_tcphdr) (((u8 *)(_tcphdr)) + 0) ++#define TCP_DST(_tcphdr) (((u8 *)(_tcphdr)) + 2) ++#define GET_TCP_SRC(_tcphdr) BE_BITS_TO_2BYTE(((u8 *)(_tcphdr)) + 0, 0, 16) ++#define GET_TCP_DST(_tcphdr) BE_BITS_TO_2BYTE(((u8 *)(_tcphdr)) + 2, 0, 16) ++#define GET_TCP_SEQ(_tcphdr) BE_BITS_TO_4BYTE(((u8 *)(_tcphdr)) + 4, 0, 32) ++#define GET_TCP_ACK_SEQ(_tcphdr) BE_BITS_TO_4BYTE(((u8 *)(_tcphdr)) + 8, 0, 32) ++#define GET_TCP_DOFF(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 12, 4, 4) ++#define GET_TCP_FIN(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 0, 1) ++#define GET_TCP_SYN(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 1, 1) ++#define GET_TCP_RST(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 2, 1) ++#define GET_TCP_PSH(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 3, 1) ++#define GET_TCP_ACK(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 4, 1) ++#define GET_TCP_URG(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 5, 1) ++#define GET_TCP_ECE(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 6, 1) ++#define GET_TCP_CWR(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 7, 1) ++ + #endif //__RTL871X_MLME_H_ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mlme_ext.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mlme_ext.h +old mode 100755 +new mode 100644 +index c85a387..f673352 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mlme_ext.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mlme_ext.h +@@ -54,41 +54,11 @@ + //#define SET_CHANNEL_CMD 0xF3000000 + //#define UPDATE_RA_CMD 0xFD0000A2 + +-#define DYNAMIC_FUNC_DISABLE (0x0) +- +-// ====== ODM_ABILITY_E ======== +-// BB ODM section BIT 0-15 +-#define DYNAMIC_BB_DIG BIT0 //ODM_BB_DIG +-#define DYNAMIC_BB_RA_MASK BIT1 //ODM_BB_RA_MASK +-#define DYNAMIC_BB_DYNAMIC_TXPWR BIT2 //ODM_BB_DYNAMIC_TXPWR +-#define DYNAMIC_BB_BB_FA_CNT BIT3 //ODM_BB_FA_CNT +-#define DYNAMIC_BB_RSSI_MONITOR BIT4 //ODM_BB_RSSI_MONITOR +-#define DYNAMIC_BB_CCK_PD BIT5 //ODM_BB_CCK_PD +-#define DYNAMIC_BB_ANT_DIV BIT6 //ODM_BB_ANT_DIV +-#define DYNAMIC_BB_PWR_SAVE BIT7 //ODM_BB_PWR_SAVE +-#define DYNAMIC_BB_PWR_TRAIN BIT8 //ODM_BB_PWR_TRAIN +-#define DYNAMIC_BB_RATE_ADAPTIVE BIT9 //ODM_BB_RATE_ADAPTIVE +-#define DYNAMIC_BB_PATH_DIV BIT10//ODM_BB_PATH_DIV +-#define DYNAMIC_BB_PSD BIT11//ODM_BB_PSD +-#define DYNAMIC_BB_RXHP BIT12//ODM_BB_RXHP +-#define DYNAMIC_BB_ADAPTIVITY BIT13//ODM_BB_ADAPTIVITY +-#define DYNAMIC_BB_DYNAMIC_ATC BIT14//ODM_BB_DYNAMIC_ATC +- +-// MAC DM section BIT 16-23 +-#define DYNAMIC_MAC_EDCA_TURBO BIT16//ODM_MAC_EDCA_TURBO +-#define DYNAMIC_MAC_EARLY_MODE BIT17//ODM_MAC_EARLY_MODE +- +-// RF ODM section BIT 24-31 +-#define DYNAMIC_RF_TX_PWR_TRACK BIT24//ODM_RF_TX_PWR_TRACK +-#define DYNAMIC_RF_RX_GAIN_TRACK BIT25//ODM_RF_RX_GAIN_TRACK +-#define DYNAMIC_RF_CALIBRATION BIT26//ODM_RF_CALIBRATION +- +-#define DYNAMIC_ALL_FUNC_ENABLE 0xFFFFFFF +- + #define _HW_STATE_NOLINK_ 0x00 + #define _HW_STATE_ADHOC_ 0x01 + #define _HW_STATE_STATION_ 0x02 + #define _HW_STATE_AP_ 0x03 ++#define _HW_STATE_MONITOR_ 0x04 + + + #define _1M_RATE_ 0 +@@ -123,145 +93,142 @@ extern unsigned char P2P_OUI[]; + extern unsigned char WMM_INFO_OUI[]; + extern unsigned char WMM_PARA_OUI[]; + +- +-// +-// Channel Plan Type. +-// Note: +-// We just add new channel plan when the new channel plan is different from any of the following +-// channel plan. +-// If you just wnat to customize the acitions(scan period or join actions) about one of the channel plan, +-// customize them in RT_CHANNEL_INFO in the RT_CHANNEL_LIST. +-// + typedef enum _RT_CHANNEL_DOMAIN + { +- //===== old channel plan mapping =====// +- RT_CHANNEL_DOMAIN_FCC = 0x00, +- RT_CHANNEL_DOMAIN_IC = 0x01, +- RT_CHANNEL_DOMAIN_ETSI = 0x02, +- RT_CHANNEL_DOMAIN_SPAIN = 0x03, +- RT_CHANNEL_DOMAIN_FRANCE = 0x04, +- RT_CHANNEL_DOMAIN_MKK = 0x05, +- RT_CHANNEL_DOMAIN_MKK1 = 0x06, +- RT_CHANNEL_DOMAIN_ISRAEL = 0x07, +- RT_CHANNEL_DOMAIN_TELEC = 0x08, +- RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN = 0x09, +- RT_CHANNEL_DOMAIN_WORLD_WIDE_13 = 0x0A, +- RT_CHANNEL_DOMAIN_TAIWAN = 0x0B, +- RT_CHANNEL_DOMAIN_CHINA = 0x0C, +- RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO = 0x0D, +- RT_CHANNEL_DOMAIN_KOREA = 0x0E, +- RT_CHANNEL_DOMAIN_TURKEY = 0x0F, +- RT_CHANNEL_DOMAIN_JAPAN = 0x10, +- RT_CHANNEL_DOMAIN_FCC_NO_DFS = 0x11, +- RT_CHANNEL_DOMAIN_JAPAN_NO_DFS = 0x12, +- RT_CHANNEL_DOMAIN_WORLD_WIDE_5G = 0x13, +- RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS = 0x14, +- +- //===== new channel plan mapping, (2GDOMAIN_5GDOMAIN) =====// +- RT_CHANNEL_DOMAIN_WORLD_NULL = 0x20, +- RT_CHANNEL_DOMAIN_ETSI1_NULL = 0x21, +- RT_CHANNEL_DOMAIN_FCC1_NULL = 0x22, +- RT_CHANNEL_DOMAIN_MKK1_NULL = 0x23, +- RT_CHANNEL_DOMAIN_ETSI2_NULL = 0x24, +- RT_CHANNEL_DOMAIN_FCC1_FCC1 = 0x25, +- RT_CHANNEL_DOMAIN_WORLD_ETSI1 = 0x26, +- RT_CHANNEL_DOMAIN_MKK1_MKK1 = 0x27, +- RT_CHANNEL_DOMAIN_WORLD_KCC1 = 0x28, +- RT_CHANNEL_DOMAIN_WORLD_FCC2 = 0x29, +- RT_CHANNEL_DOMAIN_WORLD_FCC3 = 0x30, +- RT_CHANNEL_DOMAIN_WORLD_FCC4 = 0x31, +- RT_CHANNEL_DOMAIN_WORLD_FCC5 = 0x32, +- RT_CHANNEL_DOMAIN_WORLD_FCC6 = 0x33, +- RT_CHANNEL_DOMAIN_FCC1_FCC7 = 0x34, +- RT_CHANNEL_DOMAIN_WORLD_ETSI2 = 0x35, +- RT_CHANNEL_DOMAIN_WORLD_ETSI3 = 0x36, +- RT_CHANNEL_DOMAIN_MKK1_MKK2 = 0x37, +- RT_CHANNEL_DOMAIN_MKK1_MKK3 = 0x38, +- RT_CHANNEL_DOMAIN_FCC1_NCC1 = 0x39, +- RT_CHANNEL_DOMAIN_FCC1_NCC2 = 0x40, +- RT_CHANNEL_DOMAIN_GLOBAL_NULL = 0x41, +- RT_CHANNEL_DOMAIN_ETSI1_ETSI4 = 0x42, +- RT_CHANNEL_DOMAIN_FCC1_FCC2 = 0x43, +- RT_CHANNEL_DOMAIN_FCC1_NCC3 = 0x44, +- RT_CHANNEL_DOMAIN_WORLD_ETSI5 = 0x45, +- RT_CHANNEL_DOMAIN_FCC1_FCC8 = 0x46, +- RT_CHANNEL_DOMAIN_WORLD_ETSI6 = 0x47, +- RT_CHANNEL_DOMAIN_WORLD_ETSI7 = 0x48, +- RT_CHANNEL_DOMAIN_WORLD_ETSI8 = 0x49, +- RT_CHANNEL_DOMAIN_WORLD_ETSI9 = 0x50, +- RT_CHANNEL_DOMAIN_WORLD_ETSI10 = 0x51, +- RT_CHANNEL_DOMAIN_WORLD_ETSI11 = 0x52, +- RT_CHANNEL_DOMAIN_FCC1_NCC4 = 0x53, +- RT_CHANNEL_DOMAIN_WORLD_ETSI12 = 0x54, +- RT_CHANNEL_DOMAIN_FCC1_FCC9 = 0x55, +- RT_CHANNEL_DOMAIN_WORLD_ETSI13 = 0x56, +- RT_CHANNEL_DOMAIN_FCC1_FCC10 = 0x57, +- RT_CHANNEL_DOMAIN_WORLD_MKK4 = 0x58, +- //===== Add new channel plan above this line===============// +- RT_CHANNEL_DOMAIN_MAX, +- RT_CHANNEL_DOMAIN_REALTEK_DEFINE = 0x7F, ++ /* ===== 0x00 ~ 0x1F, legacy channel plan ===== */ ++ RTW_CHPLAN_FCC = 0x00, ++ RTW_CHPLAN_IC = 0x01, ++ RTW_CHPLAN_ETSI = 0x02, ++ RTW_CHPLAN_SPAIN = 0x03, ++ RTW_CHPLAN_FRANCE = 0x04, ++ RTW_CHPLAN_MKK = 0x05, ++ RTW_CHPLAN_MKK1 = 0x06, ++ RTW_CHPLAN_ISRAEL = 0x07, ++ RTW_CHPLAN_TELEC = 0x08, ++ RTW_CHPLAN_GLOBAL_DOAMIN = 0x09, ++ RTW_CHPLAN_WORLD_WIDE_13 = 0x0A, ++ RTW_CHPLAN_TAIWAN = 0x0B, ++ RTW_CHPLAN_CHINA = 0x0C, ++ RTW_CHPLAN_SINGAPORE_INDIA_MEXICO = 0x0D, ++ RTW_CHPLAN_KOREA = 0x0E, ++ RTW_CHPLAN_TURKEY = 0x0F, ++ RTW_CHPLAN_JAPAN = 0x10, ++ RTW_CHPLAN_FCC_NO_DFS = 0x11, ++ RTW_CHPLAN_JAPAN_NO_DFS = 0x12, ++ RTW_CHPLAN_WORLD_WIDE_5G = 0x13, ++ RTW_CHPLAN_TAIWAN_NO_DFS = 0x14, ++ ++ /* ===== 0x20 ~ 0x7F, new channel plan ===== */ ++ RTW_CHPLAN_WORLD_NULL = 0x20, ++ RTW_CHPLAN_ETSI1_NULL = 0x21, ++ RTW_CHPLAN_FCC1_NULL = 0x22, ++ RTW_CHPLAN_MKK1_NULL = 0x23, ++ RTW_CHPLAN_ETSI2_NULL = 0x24, ++ RTW_CHPLAN_FCC1_FCC1 = 0x25, ++ RTW_CHPLAN_WORLD_ETSI1 = 0x26, ++ RTW_CHPLAN_MKK1_MKK1 = 0x27, ++ RTW_CHPLAN_WORLD_KCC1 = 0x28, ++ RTW_CHPLAN_WORLD_FCC2 = 0x29, ++ RTW_CHPLAN_FCC2_NULL = 0x2A, ++ RTW_CHPLAN_WORLD_FCC3 = 0x30, ++ RTW_CHPLAN_WORLD_FCC4 = 0x31, ++ RTW_CHPLAN_WORLD_FCC5 = 0x32, ++ RTW_CHPLAN_WORLD_FCC6 = 0x33, ++ RTW_CHPLAN_FCC1_FCC7 = 0x34, ++ RTW_CHPLAN_WORLD_ETSI2 = 0x35, ++ RTW_CHPLAN_WORLD_ETSI3 = 0x36, ++ RTW_CHPLAN_MKK1_MKK2 = 0x37, ++ RTW_CHPLAN_MKK1_MKK3 = 0x38, ++ RTW_CHPLAN_FCC1_NCC1 = 0x39, ++ RTW_CHPLAN_FCC1_NCC2 = 0x40, ++ RTW_CHPLAN_GLOBAL_NULL = 0x41, ++ RTW_CHPLAN_ETSI1_ETSI4 = 0x42, ++ RTW_CHPLAN_FCC1_FCC2 = 0x43, ++ RTW_CHPLAN_FCC1_NCC3 = 0x44, ++ RTW_CHPLAN_WORLD_ETSI5 = 0x45, ++ RTW_CHPLAN_FCC1_FCC8 = 0x46, ++ RTW_CHPLAN_WORLD_ETSI6 = 0x47, ++ RTW_CHPLAN_WORLD_ETSI7 = 0x48, ++ RTW_CHPLAN_WORLD_ETSI8 = 0x49, ++ RTW_CHPLAN_WORLD_ETSI9 = 0x50, ++ RTW_CHPLAN_WORLD_ETSI10 = 0x51, ++ RTW_CHPLAN_WORLD_ETSI11 = 0x52, ++ RTW_CHPLAN_FCC1_NCC4 = 0x53, ++ RTW_CHPLAN_WORLD_ETSI12 = 0x54, ++ RTW_CHPLAN_FCC1_FCC9 = 0x55, ++ RTW_CHPLAN_WORLD_ETSI13 = 0x56, ++ RTW_CHPLAN_FCC1_FCC10 = 0x57, ++ RTW_CHPLAN_MKK2_MKK4 = 0x58, ++ RTW_CHPLAN_WORLD_ETSI14 = 0x59, ++ RTW_CHPLAN_FCC1_FCC5 = 0x60, ++ ++ RTW_CHPLAN_MAX, ++ RTW_CHPLAN_REALTEK_DEFINE = 0x7F, + }RT_CHANNEL_DOMAIN, *PRT_CHANNEL_DOMAIN; + + typedef enum _RT_CHANNEL_DOMAIN_2G + { +- RT_CHANNEL_DOMAIN_2G_WORLD = 0x00, //Worldwird 13 +- RT_CHANNEL_DOMAIN_2G_ETSI1 = 0x01, //Europe +- RT_CHANNEL_DOMAIN_2G_FCC1 = 0x02, //US +- RT_CHANNEL_DOMAIN_2G_MKK1 = 0x03, //Japan +- RT_CHANNEL_DOMAIN_2G_ETSI2 = 0x04, //France +- RT_CHANNEL_DOMAIN_2G_GLOBAL = 0x05, //Global domain +- RT_CHANNEL_DOMAIN_2G_NULL = 0x06, +- //===== Add new channel plan above this line===============// +- RT_CHANNEL_DOMAIN_2G_MAX, ++ RTW_RD_2G_NULL = 0, ++ RTW_RD_2G_WORLD = 1, /* Worldwird 13 */ ++ RTW_RD_2G_ETSI1 = 2, /* Europe */ ++ RTW_RD_2G_FCC1 = 3, /* US */ ++ RTW_RD_2G_MKK1 = 4, /* Japan */ ++ RTW_RD_2G_ETSI2 = 5, /* France */ ++ RTW_RD_2G_GLOBAL = 6, /* Global domain */ ++ RTW_RD_2G_MKK2 = 7, /* Japan */ ++ RTW_RD_2G_FCC2 = 8, /* US */ ++ ++ RTW_RD_2G_MAX, + }RT_CHANNEL_DOMAIN_2G, *PRT_CHANNEL_DOMAIN_2G; + + typedef enum _RT_CHANNEL_DOMAIN_5G + { +- RT_CHANNEL_DOMAIN_5G_NULL = 0x00, +- RT_CHANNEL_DOMAIN_5G_ETSI1 = 0x01, //Europe +- RT_CHANNEL_DOMAIN_5G_ETSI2 = 0x02, //Australia, New Zealand +- RT_CHANNEL_DOMAIN_5G_ETSI3 = 0x03, //Russia +- RT_CHANNEL_DOMAIN_5G_FCC1 = 0x04, //US +- RT_CHANNEL_DOMAIN_5G_FCC2 = 0x05, //FCC o/w DFS Channels +- RT_CHANNEL_DOMAIN_5G_FCC3 = 0x06, //India, Mexico +- RT_CHANNEL_DOMAIN_5G_FCC4 = 0x07, //Venezuela +- RT_CHANNEL_DOMAIN_5G_FCC5 = 0x08, //China +- RT_CHANNEL_DOMAIN_5G_FCC6 = 0x09, //Israel +- RT_CHANNEL_DOMAIN_5G_FCC7_IC1 = 0x0A, //US, Canada +- RT_CHANNEL_DOMAIN_5G_KCC1 = 0x0B, //Korea +- RT_CHANNEL_DOMAIN_5G_MKK1 = 0x0C, //Japan +- RT_CHANNEL_DOMAIN_5G_MKK2 = 0x0D, //Japan (W52, W53) +- RT_CHANNEL_DOMAIN_5G_MKK3 = 0x0E, //Japan (W56) +- RT_CHANNEL_DOMAIN_5G_NCC1 = 0x0F, //Taiwan +- RT_CHANNEL_DOMAIN_5G_NCC2 = 0x10, //Taiwan o/w DFS +- RT_CHANNEL_DOMAIN_5G_NCC3 = 0x11, //Taiwan w/o DFS, Band4 only +- RT_CHANNEL_DOMAIN_5G_ETSI4 = 0x12, //Europe w/o DFS, Band1 only +- RT_CHANNEL_DOMAIN_5G_ETSI5 = 0x13, //Australia, New Zealand(w/o Weather radar) +- RT_CHANNEL_DOMAIN_5G_FCC8 = 0x14, //Latin America +- RT_CHANNEL_DOMAIN_5G_ETSI6 = 0x15, //Israel, Bahrain, Egypt, India, China, Malaysia +- RT_CHANNEL_DOMAIN_5G_ETSI7 = 0x16, //China +- RT_CHANNEL_DOMAIN_5G_ETSI8 = 0x17, //Jordan +- RT_CHANNEL_DOMAIN_5G_ETSI9 = 0x18, //Lebanon +- RT_CHANNEL_DOMAIN_5G_ETSI10 = 0x19, //Qatar +- RT_CHANNEL_DOMAIN_5G_ETSI11 = 0x1A, //Russia +- RT_CHANNEL_DOMAIN_5G_NCC4 = 0x1B, //Taiwan, (w/o Weather radar) +- RT_CHANNEL_DOMAIN_5G_ETSI12 = 0x1C, //Indonesia +- RT_CHANNEL_DOMAIN_5G_FCC9 = 0x1D, //(w/o Weather radar) +- RT_CHANNEL_DOMAIN_5G_ETSI13 = 0x1E, //(w/o Weather radar) +- RT_CHANNEL_DOMAIN_5G_FCC10 = 0x1F, //Argentina (w/o Weather radar) +- RT_CHANNEL_DOMAIN_5G_KCC2 = 0x20, //Korea 5G +- RT_CHANNEL_DOMAIN_5G_FCC11 = 0x21, //US/Canada +- RT_CHANNEL_DOMAIN_5G_NCC5 = 0x22, //Taiwan +- RT_CHANNEL_DOMAIN_5G_MKK4 = 0x23, //Japan W52 +- //===== Add new channel plan above this line===============// +- //===== Driver Self Defined =====// +- RT_CHANNEL_DOMAIN_5G_FCC = 0x30, +- RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS = 0x31, +- RT_CHANNEL_DOMAIN_5G_FCC4_NO_DFS = 0x32, +- RT_CHANNEL_DOMAIN_5G_MAX, ++ RTW_RD_5G_NULL = 0, /* */ ++ RTW_RD_5G_ETSI1 = 1, /* Europe */ ++ RTW_RD_5G_ETSI2 = 2, /* Australia, New Zealand */ ++ RTW_RD_5G_ETSI3 = 3, /* Russia */ ++ RTW_RD_5G_FCC1 = 4, /* US */ ++ RTW_RD_5G_FCC2 = 5, /* FCC w/o DFS Channels */ ++ RTW_RD_5G_FCC3 = 6, /* Bolivia, Chile, El Salvador, Venezuela */ ++ RTW_RD_5G_FCC4 = 7, /* Venezuela */ ++ RTW_RD_5G_FCC5 = 8, /* China */ ++ RTW_RD_5G_FCC6 = 9, /* */ ++ RTW_RD_5G_FCC7 = 10, /* US Canada(w/o Weather radar) */ ++ RTW_RD_5G_KCC1 = 11, /* Korea */ ++ RTW_RD_5G_MKK1 = 12, /* Japan */ ++ RTW_RD_5G_MKK2 = 13, /* Japan (W52, W53) */ ++ RTW_RD_5G_MKK3 = 14, /* Japan (W56) */ ++ RTW_RD_5G_NCC1 = 15, /* Taiwan, (w/o Weather radar) */ ++ RTW_RD_5G_NCC2 = 16, /* Taiwan, Band2, Band4 */ ++ RTW_RD_5G_NCC3 = 17, /* Taiwan w/o DFS, Band4 only */ ++ RTW_RD_5G_ETSI4 = 18, /* Europe w/o DFS, Band1 only */ ++ RTW_RD_5G_ETSI5 = 19, /* Australia, New Zealand(w/o Weather radar) */ ++ RTW_RD_5G_FCC8 = 20, /* Latin America */ ++ RTW_RD_5G_ETSI6 = 21, /* Israel, Bahrain, Egypt, India, China, Malaysia */ ++ RTW_RD_5G_ETSI7 = 22, /* China */ ++ RTW_RD_5G_ETSI8 = 23, /* Jordan */ ++ RTW_RD_5G_ETSI9 = 24, /* Lebanon */ ++ RTW_RD_5G_ETSI10 = 25, /* Qatar */ ++ RTW_RD_5G_ETSI11 = 26, /* Russia */ ++ RTW_RD_5G_NCC4 = 27, /* Taiwan, (w/o Weather radar) */ ++ RTW_RD_5G_ETSI12 = 28, /* Indonesia */ ++ RTW_RD_5G_FCC9 = 29, /* (w/o Weather radar) */ ++ RTW_RD_5G_ETSI13 = 30, /* (w/o Weather radar) */ ++ RTW_RD_5G_FCC10 = 31, /* Argentina(w/o Weather radar) */ ++ RTW_RD_5G_MKK4 = 32, /* Japan (W52) */ ++ RTW_RD_5G_ETSI14 = 33, /* Russia */ ++ ++ /* === Below are driver defined for legacy channel plan compatible, DON'T assign index ==== */ ++ RTW_RD_5G_OLD_FCC1, ++ RTW_RD_5G_OLD_NCC1, ++ RTW_RD_5G_OLD_KCC1, ++ ++ RTW_RD_5G_MAX, + }RT_CHANNEL_DOMAIN_5G, *PRT_CHANNEL_DOMAIN_5G; + +-#define rtw_is_channel_plan_valid(chplan) (chplannon_ocp_end_time, (unsigned long)rtw_get_current_time())) ++void rtw_rfctl_reset_cac(struct rf_ctl_t *rfctl); ++bool rtw_is_cac_reset_needed(_adapter *adapter); ++bool _rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset); ++bool rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl); ++bool rtw_rfctl_is_tx_blocked_by_cac(struct rf_ctl_t *rfctl); ++bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset); ++void rtw_chset_update_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset); ++void rtw_chset_update_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset, int ms); ++#else ++#define CH_IS_NON_OCP(rt_ch_info) 0 ++#define rtw_chset_is_ch_non_ocp(ch_set, ch, bw, offset) _FALSE ++#define rtw_rfctl_is_tx_blocked_by_cac(rfctl) _FALSE ++#endif ++ ++enum { ++ RTW_CHF_2G = BIT0, ++ RTW_CHF_5G = BIT1, ++ RTW_CHF_DFS = BIT2, ++ RTW_CHF_LONG_CAC = BIT3, ++ RTW_CHF_NON_DFS = BIT4, ++ RTW_CHF_NON_LONG_CAC = BIT5, ++}; ++bool rtw_choose_available_chbw(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8 *dec_bw, u8 *dec_offset, u8 d_flags); ++void dump_country_chplan(void *sel, const struct country_chplan *ent); ++void dump_country_chplan_map(void *sel); ++void dump_chplan_id_list(void *sel); ++void dump_chplan_test(void *sel); ++void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set); ++void dump_cur_chset(void *sel, _adapter *adapter); ++ + int rtw_ch_set_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch); + bool rtw_mlme_band_check(_adapter *adapter, const u32 ch); + +@@ -576,11 +599,8 @@ struct mlme_ext_priv + //for ap mode, network includes ap's cap_info + _timer survey_timer; + _timer link_timer; +-#ifdef CONFIG_IEEE80211W +- _timer sa_query_timer; +-#endif //CONFIG_IEEE80211W ++ + //_timer ADDBA_timer; +- u16 chan_scan_time; + u32 last_scan_time; + u8 scan_abort; + u8 tx_rate; // TXRATE when USERATE is set. +@@ -614,9 +634,64 @@ struct mlme_ext_priv + #ifdef DBG_FIXED_CHAN + u8 fixed_chan; + #endif +- ++ /* set hw sync bcn tsf register or not */ ++ u8 en_hw_update_tsf; + }; + ++#define mlmeext_msr(mlmeext) ((mlmeext)->mlmext_info.state & 0x03) ++#define mlmeext_scan_state(mlmeext) ((mlmeext)->sitesurvey_res.state) ++#define mlmeext_scan_state_str(mlmeext) scan_state_str((mlmeext)->sitesurvey_res.state) ++#define mlmeext_chk_scan_state(mlmeext, _state) ((mlmeext)->sitesurvey_res.state == (_state)) ++#define mlmeext_set_scan_state(mlmeext, _state) \ ++ do { \ ++ ((mlmeext)->sitesurvey_res.state = (_state)); \ ++ ((mlmeext)->sitesurvey_res.next_state = (_state)); \ ++ /* DBG_871X("set_scan_state:%s\n", scan_state_str(_state)); */ \ ++ } while (0) ++ ++#define mlmeext_scan_next_state(mlmeext) ((mlmeext)->sitesurvey_res.next_state) ++#define mlmeext_set_scan_next_state(mlmeext, _state) \ ++ do { \ ++ ((mlmeext)->sitesurvey_res.next_state = (_state)); \ ++ /* DBG_871X("set_scan_next_state:%s\n", scan_state_str(_state)); */ \ ++ } while (0) ++ ++#ifdef CONFIG_SCAN_BACKOP ++#define mlmeext_scan_backop_flags(mlmeext) ((mlmeext)->sitesurvey_res.backop_flags) ++#define mlmeext_chk_scan_backop_flags(mlmeext, flags) ((mlmeext)->sitesurvey_res.backop_flags & (flags)) ++#define mlmeext_assign_scan_backop_flags(mlmeext, flags) \ ++ do { \ ++ ((mlmeext)->sitesurvey_res.backop_flags = (flags)); \ ++ DBG_871X("assign_scan_backop_flags:0x%02x\n", (mlmeext)->sitesurvey_res.backop_flags); \ ++ } while (0) ++ ++#define mlmeext_scan_backop_flags_sta(mlmeext) ((mlmeext)->sitesurvey_res.backop_flags_sta) ++#define mlmeext_chk_scan_backop_flags_sta(mlmeext, flags) ((mlmeext)->sitesurvey_res.backop_flags_sta & (flags)) ++#define mlmeext_assign_scan_backop_flags_sta(mlmeext, flags) \ ++ do { \ ++ ((mlmeext)->sitesurvey_res.backop_flags_sta = (flags)); \ ++ } while (0) ++ ++#define mlmeext_scan_backop_flags_ap(mlmeext) ((mlmeext)->sitesurvey_res.backop_flags_ap) ++#define mlmeext_chk_scan_backop_flags_ap(mlmeext, flags) ((mlmeext)->sitesurvey_res.backop_flags_ap & (flags)) ++#define mlmeext_assign_scan_backop_flags_ap(mlmeext, flags) \ ++ do { \ ++ ((mlmeext)->sitesurvey_res.backop_flags_ap = (flags)); \ ++ } while (0) ++#else ++#define mlmeext_scan_backop_flags(mlmeext) (0) ++#define mlmeext_chk_scan_backop_flags(mlmeext, flags) (0) ++#define mlmeext_assign_scan_backop_flags(mlmeext, flags) do {} while (0) ++ ++#define mlmeext_scan_backop_flags_sta(mlmeext) (0) ++#define mlmeext_chk_scan_backop_flags_sta(mlmeext, flags) (0) ++#define mlmeext_assign_scan_backop_flags_sta(mlmeext, flags) do {} while (0) ++ ++#define mlmeext_scan_backop_flags_ap(mlmeext) (0) ++#define mlmeext_chk_scan_backop_flags_ap(mlmeext, flags) (0) ++#define mlmeext_assign_scan_backop_flags_ap(mlmeext, flags) do {} while (0) ++#endif ++ + void init_mlme_default_rate_set(_adapter* padapter); + int init_mlme_ext_priv(_adapter* padapter); + int init_hw_mlme_ext(_adapter *padapter); +@@ -636,11 +711,7 @@ void get_rate_set(_adapter *padapter, unsigned char *pbssrate, int *bssrate_len) + void set_mcs_rate_by_mask(u8 *mcs_set, u32 mask); + void UpdateBrateTbl(_adapter *padapter,u8 *mBratesOS); + void UpdateBrateTblForSoftAP(u8 *bssrateset, u32 bssratelen); +-void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork); +- +-void Save_DM_Func_Flag(_adapter *padapter); +-void Restore_DM_Func_Flag(_adapter *padapter); +-void Switch_DM_Func(_adapter *padapter, u32 mode, u8 enable); ++void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 ch); + + //void Set_NETYPE1_MSR(_adapter *padapter, u8 type); + //void Set_NETYPE0_MSR(_adapter *padapter, u8 type); +@@ -664,11 +735,6 @@ void SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_ + + unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval); + +-void read_cam(_adapter *padapter ,u8 entry, u8 *get_key); +-void dump_cam_table(_adapter *padapter); +- +-/* modify HW only */ +-void _write_cam(_adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key); + void _clear_cam_entry(_adapter *padapter, u8 entry); + void write_cam_from_cache(_adapter *adapter, u8 id); + +@@ -683,13 +749,11 @@ void clear_cam_cache(_adapter *adapter, u8 id); + void invalidate_cam_all(_adapter *padapter); + void CAM_empty_entry(PADAPTER Adapter, u8 ucIndex); + +- +-int allocate_fw_sta_entry(_adapter *padapter); + void flush_all_cam_entry(_adapter *padapter); + + BOOLEAN IsLegal5GChannel(PADAPTER Adapter, u8 channel); + +-void site_survey(_adapter *padapter); ++void site_survey(_adapter *padapter, u8 survey_channel, RT_SCAN_TYPE ScanType); + u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid); + void update_network(WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src, _adapter * padapter, bool update_ie); + +@@ -705,7 +769,8 @@ unsigned char check_assoc_AP(u8 *pframe, uint len); + + int WMM_param_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); + #ifdef CONFIG_WFD +-int WFD_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); ++void rtw_process_wfd_ie(_adapter *adapter, u8 *ie, u8 ie_len, const char *tag); ++void rtw_process_wfd_ies(_adapter *adapter, u8 *ies, u8 ies_len, const char *tag); + #endif + void WMMOnAssocRsp(_adapter *padapter); + +@@ -725,12 +790,11 @@ void update_beacon_info(_adapter *padapter, u8 *pframe, uint len, struct sta_inf + #ifdef CONFIG_DFS + void process_csa_ie(_adapter *padapter, u8 *pframe, uint len); + #endif //CONFIG_DFS +-void update_IOT_info(_adapter *padapter); + void update_capinfo(PADAPTER Adapter, u16 updateCap); + void update_wireless_mode(_adapter * padapter); + void update_tx_basic_rate(_adapter *padapter, u8 modulation); + void update_sta_basic_rate(struct sta_info *psta, u8 wireless_mode); +-int update_sta_support_rate(_adapter *padapter, u8* pvar_ie, uint var_ie_len, int cam_idx); ++int rtw_ies_get_supported_rate(u8 *ies, uint ies_len, u8 *rate_set, u8 *rate_num); + + //for sta/adhoc mode + void update_sta_info(_adapter *padapter, struct sta_info *psta); +@@ -740,7 +804,7 @@ unsigned int update_MCS_rate(struct HT_caps_element *pHT_caps); + void Update_RA_Entry(_adapter *padapter, struct sta_info *psta); + void set_sta_rate(_adapter *padapter, struct sta_info *psta); + +-unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsigned short reason); ++unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsigned short reason, u8 locally_generated); + + unsigned char get_highest_rate_idx(u32 mask); + int support_short_GI(_adapter *padapter, struct HT_caps_element *pHT_caps, u8 bwmode); +@@ -749,11 +813,22 @@ unsigned int is_ap_in_wep(_adapter *padapter); + unsigned int should_forbid_n_rate(_adapter * padapter); + + s16 rtw_get_camid(_adapter *adapter, struct sta_info* sta, s16 kid); +-s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid); +-s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid); ++bool _rtw_camctl_chk_cap(_adapter *adapter, u8 cap); ++void _rtw_camctl_set_flags(_adapter *adapter, u32 flags); ++void rtw_camctl_set_flags(_adapter *adapter, u32 flags); ++void _rtw_camctl_clr_flags(_adapter *adapter, u32 flags); ++void rtw_camctl_clr_flags(_adapter *adapter, u32 flags); ++bool _rtw_camctl_chk_flags(_adapter *adapter, u32 flags); ++ ++struct sec_cam_bmp; ++void dump_sec_cam_map(void *sel, struct sec_cam_bmp *map, u8 max_num); ++void rtw_sec_cam_map_clr_all(struct sec_cam_bmp *map); ++ ++bool _rtw_camid_is_gk(_adapter *adapter, u8 cam_id); ++bool rtw_camid_is_gk(_adapter *adapter, u8 cam_id); ++s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid, s8 gk); ++s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid, bool *used); + void rtw_camid_free(_adapter *adapter, u8 cam_id); +-bool rtw_camid_is_gk(_adapter *padapter, u8 entry); +-bool read_phy_cam_is_gtk(_adapter *padapter, u8 entry); + + struct macid_bmp; + struct macid_ctl_t; +@@ -766,14 +841,15 @@ s8 rtw_macid_get_ch_g(struct macid_ctl_t *macid_ctl, u8 id); + void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta); + void rtw_release_macid(_adapter *padapter, struct sta_info *psta); + u8 rtw_search_max_mac_id(_adapter *padapter); ++void rtw_macid_ctl_set_h2c_msr(struct macid_ctl_t *macid_ctl, u8 id, u8 h2c_msr); + void rtw_macid_ctl_init(struct macid_ctl_t *macid_ctl); + void rtw_macid_ctl_deinit(struct macid_ctl_t *macid_ctl); + + void report_join_res(_adapter *padapter, int res); + void report_survey_event(_adapter *padapter, union recv_frame *precv_frame); + void report_surveydone_event(_adapter *padapter); +-void report_del_sta_event(_adapter *padapter, unsigned char* MacAddr, unsigned short reason); +-void report_add_sta_event(_adapter *padapter, unsigned char* MacAddr, int cam_idx); ++void report_del_sta_event(_adapter *padapter, unsigned char *MacAddr, unsigned short reason, bool enqueue, u8 locally_generated); ++void report_add_sta_event(_adapter *padapter, unsigned char *MacAddr); + bool rtw_port_switch_chk(_adapter *adapter); + void report_wmm_edca_update(_adapter *padapter); + +@@ -782,11 +858,13 @@ u8 chk_bmc_sleepq_cmd(_adapter* padapter); + extern u8 set_tx_beacon_cmd(_adapter*padapter); + unsigned int setup_beacon_frame(_adapter *padapter, unsigned char *beacon_frame); + void update_mgnt_tx_rate(_adapter *padapter, u8 rate); ++void update_monitor_frame_attrib(_adapter *padapter, struct pkt_attrib *pattrib); + void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib); + void update_mgntframe_attrib_addr(_adapter *padapter, struct xmit_frame *pmgntframe); + void dump_mgntframe(_adapter *padapter, struct xmit_frame *pmgntframe); + s32 dump_mgntframe_and_wait(_adapter *padapter, struct xmit_frame *pmgntframe, int timeout_ms); + s32 dump_mgntframe_and_wait_ack(_adapter *padapter, struct xmit_frame *pmgntframe); ++s32 dump_mgntframe_and_wait_ack_timeout(_adapter *padapter, struct xmit_frame *pmgntframe, int timeout_ms); + + #ifdef CONFIG_P2P + void issue_probersp_p2p(_adapter *padapter, unsigned char *da); +@@ -810,12 +888,23 @@ int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, int try_c + int issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason); + int issue_deauth_ex(_adapter *padapter, u8 *da, unsigned short reason, int try_cnt, int wait_ms); + void issue_action_spct_ch_switch(_adapter *padapter, u8 *ra, u8 new_ch, u8 ch_offset); +-void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short status); ++void issue_addba_req(_adapter *adapter, unsigned char *ra, u8 tid); ++void issue_addba_rsp(_adapter *adapter, unsigned char *ra, u8 tid, u16 status, u8 size); ++u8 issue_addba_rsp_wait_ack(_adapter *adapter, unsigned char *ra, u8 tid, u16 status, u8 size, int try_cnt, int wait_ms); ++void issue_del_ba(_adapter *adapter, unsigned char *ra, u8 tid, u16 reason, u8 initiator); ++int issue_del_ba_ex(_adapter *adapter, unsigned char *ra, u8 tid, u16 reason, u8 initiator, int try_cnt, int wait_ms); ++ + #ifdef CONFIG_IEEE80211W +-void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short tid); ++void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short tid, u8 key_type); ++int issue_deauth_11w(_adapter *padapter, unsigned char *da, unsigned short reason, u8 key_type); ++extern void init_dot11w_expire_timer(_adapter *padapter, struct sta_info *psta); + #endif //CONFIG_IEEE80211W + int issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoPsMode); + int issue_action_SM_PS_wait_ack(_adapter *padapter, unsigned char *raddr, u8 NewMimoPsMode, int try_cnt, int wait_ms); ++ ++unsigned int send_delba_sta_tid(_adapter *adapter, u8 initiator, struct sta_info *sta, u8 tid, u8 force); ++unsigned int send_delba_sta_tid_wait_ack(_adapter *adapter, u8 initiator, struct sta_info *sta, u8 tid, u8 force); ++ + unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr); + unsigned int send_beacon(_adapter *padapter); + +@@ -840,6 +929,23 @@ unsigned int OnAction(_adapter *padapter, union recv_frame *precv_frame); + unsigned int on_action_spct(_adapter *padapter, union recv_frame *precv_frame); + unsigned int OnAction_qos(_adapter *padapter, union recv_frame *precv_frame); + unsigned int OnAction_dls(_adapter *padapter, union recv_frame *precv_frame); ++ ++#define RX_AMPDU_ACCEPT_INVALID 0xFF ++#define RX_AMPDU_SIZE_INVALID 0xFF ++ ++enum rx_ampdu_reason { ++ RX_AMPDU_DRV_FIXED = 1, ++ RX_AMPDU_BTCOEX = 2, /* not used, because BTCOEX has its own variable management */ ++ RX_AMPDU_DRV_SCAN = 3, ++}; ++u8 rtw_rx_ampdu_size(_adapter *adapter); ++bool rtw_rx_ampdu_is_accept(_adapter *adapter); ++bool rtw_rx_ampdu_set_size(_adapter *adapter, u8 size, u8 reason); ++bool rtw_rx_ampdu_set_accept(_adapter *adapter, u8 accept, u8 reason); ++u8 rx_ampdu_apply_sta_tid(_adapter *adapter, struct sta_info *sta, u8 tid, u8 accept, u8 size); ++u8 rx_ampdu_apply_sta(_adapter *adapter, struct sta_info *sta, u8 accept, u8 size); ++u16 rtw_rx_ampdu_apply(_adapter *adapter); ++ + unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame); + unsigned int on_action_public(_adapter *padapter, union recv_frame *precv_frame); + unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame); +@@ -863,7 +969,7 @@ void survey_timer_hdl (_adapter *padapter); + void link_timer_hdl (_adapter *padapter); + void addba_timer_hdl(struct sta_info *psta); + #ifdef CONFIG_IEEE80211W +-void sa_query_timer_hdl(_adapter *padapter); ++void sa_query_timer_hdl(struct sta_info *psta); + #endif //CONFIG_IEEE80211W + //void reauth_timer_hdl(_adapter *padapter); + //void reassoc_timer_hdl(_adapter *padapter); +@@ -879,13 +985,7 @@ void sa_query_timer_hdl(_adapter *padapter); + /*DBG_871X("%s set_link_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms));*/ \ + _set_timer(&(mlmeext)->link_timer, (ms)); \ + } while(0) +-#ifdef CONFIG_IEEE80211W +-#define set_sa_query_timer(mlmeext, ms) \ +- do { \ +- DBG_871X("%s set_sa_query_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms)); \ +- _set_timer(&(mlmeext)->sa_query_timer, (ms)); \ +- } while(0) +-#endif //CONFIG_IEEE80211W ++ + extern int cckrates_included(unsigned char *rate, int ratelen); + extern int cckratesonly_included(unsigned char *rate, int ratelen); + +@@ -898,27 +998,19 @@ extern u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer); + + + #ifdef CONFIG_CONCURRENT_MODE +- sint check_buddy_mlmeinfo_state(_adapter *padapter, u32 state); +-void concurrent_chk_joinbss_done(_adapter *padapter, int join_res); +-#endif //CONFIG_CONCURRENT_MODE +- +-#ifdef CONFIG_DUALMAC_CONCURRENT +-void dc_SelectChannel(_adapter *padapter, unsigned char channel); +-void dc_SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset); +-void dc_set_channel_bwmode_disconnect(_adapter *padapter); +-u8 dc_handle_join_request(_adapter *padapter, u8 *ch, u8 *bw, u8 *offset); +-void dc_handle_join_done(_adapter *padapter, u8 join_res); +-sint dc_check_fwstate(_adapter *padapter, sint fw_state); +-u8 dc_handle_site_survey(_adapter *padapter); +-void dc_report_survey_event(_adapter *padapter, union recv_frame *precv_frame); +-void dc_set_channel_bwmode_survey_done(_adapter *padapter); +-void dc_set_ap_channel_bandwidth(_adapter *padapter, u8 channel, u8 channel_offset, u8 bwmode); +-void dc_resume_xmit(_adapter *padapter); +-u8 dc_check_xmit(_adapter *padapter); ++sint check_buddy_mlmeinfo_state(_adapter *padapter, u32 state); + #endif + ++void rtw_join_done_chk_ch(_adapter *padapter, int join_res); ++ + int rtw_chk_start_clnt_join(_adapter *padapter, u8 *ch, u8 *bw, u8 *offset); + int rtw_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset); ++int rtw_get_ch_setting_union_no_self(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset); ++ ++void rtw_dev_iface_status(_adapter *adapter, u8 *sta_num, u8 *ld_sta_num, u8 *lg_sta_num ++ , u8 *ap_num, u8 *ld_ap_num); ++void rtw_dev_iface_status_no_self(_adapter *adapter, u8 *sta_num, u8 *ld_sta_num, u8 *lg_sta_num ++ , u8 *ap_num, u8 *ld_ap_num); + + struct cmd_hdl { + uint parmsize; +@@ -946,6 +1038,7 @@ u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf); + u8 set_assocsta_hdl(_adapter *padapter, u8 *pbuf); + u8 del_assocsta_hdl(_adapter *padapter, u8 *pbuf); + u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf); ++u8 add_ba_rsp_hdl(_adapter *padapter, unsigned char *pbuf); + + u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf); + u8 h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf); +@@ -957,7 +1050,7 @@ u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf); + u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf); //Kurt: Handling DFS channel switch announcement ie. + u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf); + u8 run_in_thread_hdl(_adapter *padapter, u8 *pbuf); +- ++u8 rtw_getmacreg_hdl(_adapter *padapter, u8 *pbuf); + + #define GEN_DRV_CMD_HANDLER(size, cmd) {size, &cmd ## _hdl}, + #define GEN_MLME_EXT_HANDLER(size, cmd) {size, cmd}, +@@ -966,7 +1059,7 @@ u8 run_in_thread_hdl(_adapter *padapter, u8 *pbuf); + + struct cmd_hdl wlancmds[] = + { +- GEN_DRV_CMD_HANDLER(0, NULL) /*0*/ ++ GEN_DRV_CMD_HANDLER(sizeof(struct readMAC_parm), rtw_getmacreg) /*0*/ + GEN_DRV_CMD_HANDLER(0, NULL) + GEN_DRV_CMD_HANDLER(0, NULL) + GEN_DRV_CMD_HANDLER(0, NULL) +@@ -1034,6 +1127,7 @@ struct cmd_hdl wlancmds[] = + GEN_MLME_EXT_HANDLER(sizeof(struct TDLSoption_param), tdls_hdl) /*62*/ + GEN_MLME_EXT_HANDLER(0, chk_bmc_sleepq_hdl) /*63*/ + GEN_MLME_EXT_HANDLER(sizeof(struct RunInThread_param), run_in_thread_hdl) /*64*/ ++ GEN_MLME_EXT_HANDLER(sizeof(struct addBaRsp_parm), add_ba_rsp_hdl) /* 65 */ + }; + + #endif +@@ -1095,6 +1189,9 @@ enum rtw_c2h_event + GEN_EVT_CODE(_ReportPwrState), //filen: only for PCIE, USB + GEN_EVT_CODE(_CloseRF), //filen: only for PCIE, work around ASPM + GEN_EVT_CODE(_WMM), /*25*/ ++#ifdef CONFIG_IEEE80211W ++ GEN_EVT_CODE(_TimeoutSTA), ++#endif /* CONFIG_IEEE80211W */ + MAX_C2HEVT + }; + +@@ -1129,11 +1226,14 @@ static struct fwevent wlanevents[] = + {0, NULL}, + {0, &rtw_cpwm_event_callback}, + {0, NULL}, +- {0, &rtw_wmm_event_callback}, ++ {0, &rtw_wmm_event_callback}, /*25*/ ++#ifdef CONFIG_IEEE80211W ++ {sizeof(struct stadel_event), &rtw_sta_timeout_event_callback}, ++#endif /* CONFIG_IEEE80211W */ + + }; + +-#endif//_RTL8192C_CMD_C_ ++#endif//_RTW_MLME_EXT_C_ + + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mp.h +old mode 100755 +new mode 100644 +index e5f1141..1753bdd +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mp.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mp.h +@@ -20,39 +20,6 @@ + #ifndef _RTW_MP_H_ + #define _RTW_MP_H_ + +-#if 0 +-#define MPT_NOOP 0 +-#define MPT_READ_MAC_1BYTE 1 +-#define MPT_READ_MAC_2BYTE 2 +-#define MPT_READ_MAC_4BYTE 3 +-#define MPT_WRITE_MAC_1BYTE 4 +-#define MPT_WRITE_MAC_2BYTE 5 +-#define MPT_WRITE_MAC_4BYTE 6 +-#define MPT_READ_BB_CCK 7 +-#define MPT_WRITE_BB_CCK 8 +-#define MPT_READ_BB_OFDM 9 +-#define MPT_WRITE_BB_OFDM 10 +-#define MPT_READ_RF 11 +-#define MPT_WRITE_RF 12 +-#define MPT_READ_EEPROM_1BYTE 13 +-#define MPT_WRITE_EEPROM_1BYTE 14 +-#define MPT_READ_EEPROM_2BYTE 15 +-#define MPT_WRITE_EEPROM_2BYTE 16 +-#define MPT_SET_CSTHRESHOLD 21 +-#define MPT_SET_INITGAIN 22 +-#define MPT_SWITCH_BAND 23 +-#define MPT_SWITCH_CHANNEL 24 +-#define MPT_SET_DATARATE 25 +-#define MPT_SWITCH_ANTENNA 26 +-#define MPT_SET_TX_POWER 27 +-#define MPT_SET_CONT_TX 28 +-#define MPT_SET_SINGLE_CARRIER 29 +-#define MPT_SET_CARRIER_SUPPRESSION 30 +-#define MPT_GET_RATE_TABLE 31 +-#define MPT_READ_TSSI 32 +-#define MPT_GET_THERMAL_METER 33 +-#endif +- + #define RTWPRIV_VER_INFO 1 + + #define MAX_MP_XMITBUF_SZ 2048 +@@ -137,8 +104,6 @@ struct mp_tx + _thread_hdl_ PktTxThread; + }; + +-#if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) || defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ||defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8723B) +- + #define MP_MAX_LINES 1000 + #define MP_MAX_LINES_BYTES 256 + #define u1Byte u8 +@@ -175,6 +140,45 @@ struct mp_tx + #define ULONG u32 + #define PULONG u32* + ++typedef struct _RT_PMAC_PKT_INFO { ++ UCHAR MCS; ++ UCHAR Nss; ++ UCHAR Nsts; ++ UINT N_sym; ++ UCHAR SIGA2B3; ++} RT_PMAC_PKT_INFO, *PRT_PMAC_PKT_INFO; ++ ++typedef struct _RT_PMAC_TX_INFO { ++ u8 bEnPMacTx:1; /* 0: Disable PMac 1: Enable PMac */ ++ u8 Mode:3; /* 0: Packet TX 3:Continuous TX */ ++ u8 Ntx:4; /* 0-7 */ ++ u8 TX_RATE; /* MPT_RATE_E */ ++ u8 TX_RATE_HEX; ++ u8 TX_SC; ++ u8 bSGI:1; ++ u8 bSPreamble:1; ++ u8 bSTBC:1; ++ u8 bLDPC:1; ++ u8 NDP_sound:1; ++ u8 BandWidth:3; /* 0: 20 1:40 2:80Mhz */ ++ u8 m_STBC; /* bSTBC + 1 */ ++ USHORT PacketPeriod; ++ UINT PacketCount; ++ UINT PacketLength; ++ u8 PacketPattern; ++ USHORT SFD; ++ u8 SignalField; ++ u8 ServiceField; ++ USHORT LENGTH; ++ u8 CRC16[2]; ++ u8 LSIG[3]; ++ u8 HT_SIG[6]; ++ u8 VHT_SIG_A[6]; ++ u8 VHT_SIG_B[4]; ++ u8 VHT_SIG_B_CRC; ++ u8 VHT_Delimiter[4]; ++ u8 MacAddress[6]; ++} RT_PMAC_TX_INFO, *PRT_PMAC_TX_INFO; + + + typedef VOID (*MPT_WORK_ITEM_HANDLER)(IN PVOID Adapter); +@@ -231,7 +235,7 @@ typedef struct _MPT_CONTEXT + // Register value kept for Single Carrier Tx test. + u8 btMpOfdmTxPower; + // For MP Tx Power index +- u8 TxPwrLevel[2]; // rf-A, rf-B ++ u8 TxPwrLevel[4]; /* rf-A, rf-B*/ + u32 RegTxPwrLimit; + // Content of RCR Regsiter for Mass Production Test. + ULONG MptRCR; +@@ -279,25 +283,20 @@ typedef struct _MPT_CONTEXT + u1Byte btInBuf[100]; + ULONG mptOutLen; + u1Byte mptOutBuf[100]; +- ++ RT_PMAC_TX_INFO PMacTxInfo; ++ RT_PMAC_PKT_INFO PMacPktInfo; ++ u8 HWTxmode; ++ ++ BOOLEAN bldpc; ++ BOOLEAN bstbc; + }MPT_CONTEXT, *PMPT_CONTEXT; +-#endif + //#endif + + /* E-Fuse */ +-#ifdef CONFIG_RTL8192D +-#define EFUSE_MAP_SIZE 256 +-#endif +-#ifdef CONFIG_RTL8192C +-#define EFUSE_MAP_SIZE 128 +-#endif +-#ifdef CONFIG_RTL8723A +-#define EFUSE_MAP_SIZE 256 +-#endif + #ifdef CONFIG_RTL8188E + #define EFUSE_MAP_SIZE 512 + #endif +-#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) + #define EFUSE_MAP_SIZE 512 + #endif + #ifdef CONFIG_RTL8192E +@@ -306,10 +305,19 @@ typedef struct _MPT_CONTEXT + #ifdef CONFIG_RTL8723B + #define EFUSE_MAP_SIZE 512 + #endif ++#ifdef CONFIG_RTL8814A ++#define EFUSE_MAP_SIZE 512 ++#endif ++#ifdef CONFIG_RTL8703B ++#define EFUSE_MAP_SIZE 512 ++#endif ++#ifdef CONFIG_RTL8188F ++#define EFUSE_MAP_SIZE 512 ++#endif + +-#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ++#if defined(CONFIG_RTL8814A) + #define EFUSE_MAX_SIZE 1024 +-#elif defined(CONFIG_RTL8188E) ++#elif defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8703B) + #define EFUSE_MAX_SIZE 256 + #else + #define EFUSE_MAX_SIZE 512 +@@ -349,14 +357,24 @@ enum { + MP_DISABLE_BT_COEXIST, + MP_PwrCtlDM, + MP_GETVER, ++ MP_MON, ++ EFUSE_MASK, ++ EFUSE_FILE, ++ MP_TX, ++ MP_RX, ++ MP_HW_TX_MODE, + #ifdef CONFIG_WOWLAN + MP_WOW_ENABLE, ++ MP_WOW_SET_PATTERN, + #endif + #ifdef CONFIG_AP_WOWLAN + MP_AP_WOW_ENABLE, + #endif + MP_NULL, + MP_GET_TXPOWER_INX, ++ ++ MP_SD_IREAD, ++ MP_SD_IWRITE, + }; + + struct mp_priv +@@ -376,6 +394,7 @@ struct mp_priv + u8 TID; + u32 tx_pktcount; + u32 pktInterval; ++ u32 pktLength; + struct mp_tx tx; + + //Rx Section +@@ -392,7 +411,6 @@ struct mp_priv + u8 bandwidth; + u8 prime_channel_offset; + u8 txpoweridx; +- u8 txpoweridx_b; + u8 rateidx; + u32 preamble; + // u8 modem; +@@ -445,7 +463,7 @@ struct mp_priv + u32 free_mp_xmitframe_cnt; + BOOLEAN bSetRxBssid; + BOOLEAN bTxBufCkFail; +- ++ BOOLEAN bRTWSmbCfg; + MPT_CONTEXT MptCtx; + + u8 *TXradomBuffer; +@@ -523,6 +541,30 @@ typedef enum _MP_MODE_ { + MP_PACKET_RX + } MP_MODE; + ++typedef enum _TEST_MODE { ++ TEST_NONE , ++ PACKETS_TX , ++ PACKETS_RX , ++ CONTINUOUS_TX , ++ OFDM_Single_Tone_TX , ++ CCK_Carrier_Suppression_TX ++} TEST_MODE; ++ ++ ++typedef enum _MPT_BANDWIDTH { ++ MPT_BW_20MHZ = 0, ++ MPT_BW_40MHZ_DUPLICATE = 1, ++ MPT_BW_40MHZ_ABOVE = 2, ++ MPT_BW_40MHZ_BELOW = 3, ++ MPT_BW_40MHZ = 4, ++ MPT_BW_80MHZ = 5, ++ MPT_BW_80MHZ_20_ABOVE = 6, ++ MPT_BW_80MHZ_20_BELOW = 7, ++ MPT_BW_80MHZ_20_BOTTOM = 8, ++ MPT_BW_80MHZ_20_TOP = 9, ++ MPT_BW_80MHZ_40_ABOVE = 10, ++ MPT_BW_80MHZ_40_BELOW = 11, ++} MPT_BANDWIDTHE, *PMPT_BANDWIDTH; + + #define MAX_RF_PATH_NUMS RF_PATH_MAX + +@@ -533,7 +575,7 @@ extern u8 mpdatarate[NumRates]; + typedef enum _MPT_RATE_INDEX + { + /* CCK rate. */ +- MPT_RATE_1M =0 , /* 0 */ ++ MPT_RATE_1M = 1 , /* 0 */ + MPT_RATE_2M, + MPT_RATE_55M, + MPT_RATE_11M, /* 3 */ +@@ -582,7 +624,7 @@ typedef enum _MPT_RATE_INDEX + MPT_RATE_MCS30, // #42 + MPT_RATE_MCS31, // #43 + /* VHT rate. Total: 20*/ +- MPT_RATE_VHT1SS_MCS0,// #44 ++ MPT_RATE_VHT1SS_MCS0 = 100,/* #44*/ + MPT_RATE_VHT1SS_MCS1, // # + MPT_RATE_VHT1SS_MCS2, + MPT_RATE_VHT1SS_MCS3, +@@ -627,6 +669,27 @@ typedef enum _MPT_RATE_INDEX + + #define MAX_TX_PWR_INDEX_N_MODE 64 // 0x3F + ++#define MPT_IS_CCK_RATE(_value) (MPT_RATE_1M <= _value && _value <= MPT_RATE_11M) ++#define MPT_IS_OFDM_RATE(_value) (MPT_RATE_6M <= _value && _value <= MPT_RATE_54M) ++#define MPT_IS_HT_RATE(_value) (MPT_RATE_MCS0 <= _value && _value <= MPT_RATE_MCS31) ++#define MPT_IS_HT_1S_RATE(_value) (MPT_RATE_MCS0 <= _value && _value <= MPT_RATE_MCS7) ++#define MPT_IS_HT_2S_RATE(_value) (MPT_RATE_MCS8 <= _value && _value <= MPT_RATE_MCS15) ++#define MPT_IS_HT_3S_RATE(_value) (MPT_RATE_MCS16 <= _value && _value <= MPT_RATE_MCS23) ++#define MPT_IS_HT_4S_RATE(_value) (MPT_RATE_MCS24 <= _value && _value <= MPT_RATE_MCS31) ++ ++#define MPT_IS_VHT_RATE(_value) (MPT_RATE_VHT1SS_MCS0 <= _value && _value <= MPT_RATE_VHT4SS_MCS9) ++#define MPT_IS_VHT_1S_RATE(_value) (MPT_RATE_VHT1SS_MCS0 <= _value && _value <= MPT_RATE_VHT1SS_MCS9) ++#define MPT_IS_VHT_2S_RATE(_value) (MPT_RATE_VHT2SS_MCS0 <= _value && _value <= MPT_RATE_VHT2SS_MCS9) ++#define MPT_IS_VHT_3S_RATE(_value) (MPT_RATE_VHT3SS_MCS0 <= _value && _value <= MPT_RATE_VHT3SS_MCS9) ++#define MPT_IS_VHT_4S_RATE(_value) (MPT_RATE_VHT4SS_MCS0 <= _value && _value <= MPT_RATE_VHT4SS_MCS9) ++ ++#define MPT_IS_2SS_RATE(_rate) ((MPT_RATE_MCS8 <= _rate && _rate <= MPT_RATE_MCS15) ||\ ++ (MPT_RATE_VHT2SS_MCS0 <= _rate && _rate <= MPT_RATE_VHT2SS_MCS9)) ++#define MPT_IS_3SS_RATE(_rate) ((MPT_RATE_MCS16 <= _rate && _rate <= MPT_RATE_MCS23) ||\ ++ (MPT_RATE_VHT3SS_MCS0 <= _rate && _rate <= MPT_RATE_VHT3SS_MCS9)) ++#define MPT_IS_4SS_RATE(_rate) ((MPT_RATE_MCS24 <= _rate && _rate <= MPT_RATE_MCS31) ||\ ++ (MPT_RATE_VHT4SS_MCS0 <= _rate && _rate <= MPT_RATE_VHT4SS_MCS9)) ++ + typedef enum _POWER_MODE_ { + POWER_LOW = 0, + POWER_NORMAL +@@ -645,42 +708,6 @@ typedef enum _OFDM_TX_MODE { + #define RX_PKT_DEST_ADDR 2 + #define RX_PKT_PHY_MATCH 3 + +-#if 0 +-#define RPTMaxCount 0x000FFFFF; +- +-// parameter 1 : BitMask +-// bit 0 : OFDM PPDU +-// bit 1 : OFDM False Alarm +-// bit 2 : OFDM MPDU OK +-// bit 3 : OFDM MPDU Fail +-// bit 4 : CCK PPDU +-// bit 5 : CCK False Alarm +-// bit 6 : CCK MPDU ok +-// bit 7 : CCK MPDU fail +-// bit 8 : HT PPDU counter +-// bit 9 : HT false alarm +-// bit 10 : HT MPDU total +-// bit 11 : HT MPDU OK +-// bit 12 : HT MPDU fail +-// bit 15 : RX full drop +-typedef enum _RXPHY_BITMASK_ +-{ +- OFDM_PPDU_BIT = 0, +- OFDM_FALSE_BIT, +- OFDM_MPDU_OK_BIT, +- OFDM_MPDU_FAIL_BIT, +- CCK_PPDU_BIT, +- CCK_FALSE_BIT, +- CCK_MPDU_OK_BIT, +- CCK_MPDU_FAIL_BIT, +- HT_PPDU_BIT, +- HT_FALSE_BIT, +- HT_MPDU_BIT, +- HT_MPDU_OK_BIT, +- HT_MPDU_FAIL_BIT, +-} RXPHY_BITMASK; +-#endif +- + #define Mac_OFDM_OK 0x00000000 + #define Mac_OFDM_Fail 0x10000000 + #define Mac_OFDM_FasleAlarm 0x20000000 +@@ -702,16 +729,14 @@ typedef enum _ENCRY_CTRL_STATE_ { + typedef enum _MPT_TXPWR_DEF{ + MPT_CCK, + MPT_OFDM, // L and HT OFDM +- MPT_VHT_OFDM ++ MPT_OFDM_AND_HT, ++ MPT_HT, ++ MPT_VHT + }MPT_TXPWR_DEF; + + #ifdef CONFIG_RF_GAIN_OFFSET + +-#if defined(CONFIG_RTL8723A) +- #define REG_RF_BB_GAIN_OFFSET_CCK 0x0d +- #define REG_RF_BB_GAIN_OFFSET_OFDM 0x0e +- #define RF_GAIN_OFFSET_MASK 0xfffff +-#elif defined(CONFIG_RTL8723B) ++#if defined(CONFIG_RTL8723B) + #define REG_RF_BB_GAIN_OFFSET 0x7f + #define RF_GAIN_OFFSET_MASK 0xfffff + #elif defined(CONFIG_RTL8188E) +@@ -720,10 +745,14 @@ typedef enum _MPT_TXPWR_DEF{ + #else + #define REG_RF_BB_GAIN_OFFSET 0x55 + #define RF_GAIN_OFFSET_MASK 0xfffff +-#endif //CONFIG_RTL8723A ++#endif //CONFIG_RTL8723B + + #endif //CONFIG_RF_GAIN_OFFSET + ++#define IS_MPT_HT_RATE(_rate) (_rate >= MPT_RATE_MCS0 && _rate <= MPT_RATE_MCS31) ++#define IS_MPT_VHT_RATE(_rate) (_rate >= MPT_RATE_VHT1SS_MCS0 && _rate <= MPT_RATE_VHT4SS_MCS9) ++#define IS_MPT_CCK_RATE(_rate) (_rate >= MPT_RATE_1M && _rate <= MPT_RATE_11M) ++#define IS_MPT_OFDM_RATE(_rate) (_rate >= MPT_RATE_6M && _rate <= MPT_RATE_54M) + //======================================================================= + //extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv); + //extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe); +@@ -735,19 +764,6 @@ extern void MPT_DeInitAdapter(PADAPTER padapter); + extern s32 mp_start_test(PADAPTER padapter); + extern void mp_stop_test(PADAPTER padapter); + +-//======================================================================= +-//extern void IQCalibrateBcut(PADAPTER pAdapter); +- +-//extern u32 bb_reg_read(PADAPTER Adapter, u16 offset); +-//extern u8 bb_reg_write(PADAPTER Adapter, u16 offset, u32 value); +-//extern u32 rf_reg_read(PADAPTER Adapter, u8 path, u8 offset); +-//extern u8 rf_reg_write(PADAPTER Adapter, u8 path, u8 offset, u32 value); +- +-//extern u32 get_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask); +-//extern u8 set_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask, u32 value); +-//extern u32 get_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask); +-//extern u8 set_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask, u32 value); +- + extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask); + extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val); + +@@ -758,73 +774,210 @@ extern void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val); + extern u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr); + extern void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val); + +-extern void SetChannel(PADAPTER pAdapter); +-extern void SetBandwidth(PADAPTER pAdapter); +-extern int SetTxPower(PADAPTER pAdapter); +-extern void SetAntennaPathPower(PADAPTER pAdapter); +-//extern void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset); +-extern void SetDataRate(PADAPTER pAdapter); +- +-extern void SetAntenna(PADAPTER pAdapter); +- +-//extern void SetCrystalCap(PADAPTER pAdapter); +- +-extern s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther); +-extern void GetThermalMeter(PADAPTER pAdapter, u8 *value); +- +-extern void SetContinuousTx(PADAPTER pAdapter, u8 bStart); +-extern void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart); +-extern void SetSingleToneTx(PADAPTER pAdapter, u8 bStart); +-extern void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); +-extern void PhySetTxPowerLevel(PADAPTER pAdapter); +- +-extern void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc); +-extern void SetPacketTx(PADAPTER padapter); +-extern void SetPacketRx(PADAPTER pAdapter, u8 bStartRx); +- +-extern void ResetPhyRxPktCount(PADAPTER pAdapter); +-extern u32 GetPhyRxPktReceived(PADAPTER pAdapter); +-extern u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter); +- +-extern s32 SetPowerTracking(PADAPTER padapter, u8 enable); +-extern void GetPowerTracking(PADAPTER padapter, u8 *enable); +- +-extern u32 mp_query_psd(PADAPTER pAdapter, u8 *data); +- +- +-extern void Hal_SetAntenna(PADAPTER pAdapter); +-extern void Hal_SetBandwidth(PADAPTER pAdapter); +- +-extern void Hal_SetTxPower(PADAPTER pAdapter); +-extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); +-extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart ); +-extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart); +-extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart); +-extern void Hal_SetBandwidth(PADAPTER pAdapter); +- +-extern void Hal_SetDataRate(PADAPTER pAdapter); +-extern void Hal_SetChannel(PADAPTER pAdapter); +-extern void Hal_SetAntennaPathPower(PADAPTER pAdapter); +-extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); +-extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable); +-extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable); +-extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value); +-extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter); +-extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14); +-extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven); +-extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower); +-extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower); +-extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter); +-extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter); +-extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart); +-extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart); +-extern void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal); +-//extern void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv); +-extern void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter ,BOOLEAN bMain); +-extern ULONG mpt_ProQueryCalTxPower(PADAPTER pAdapter,u8 RfPath); +-extern void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart); +-extern u8 MptToMgntRate(u32 MptRateIdx); +-extern u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr); ++void SetChannel(PADAPTER pAdapter); ++void SetBandwidth(PADAPTER pAdapter); ++int SetTxPower(PADAPTER pAdapter); ++void SetAntenna(PADAPTER pAdapter); ++void SetDataRate(PADAPTER pAdapter); ++void SetAntenna(PADAPTER pAdapter); ++s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther); ++void GetThermalMeter(PADAPTER pAdapter, u8 *value); ++void SetContinuousTx(PADAPTER pAdapter, u8 bStart); ++void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart); ++void SetSingleToneTx(PADAPTER pAdapter, u8 bStart); ++void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); ++void PhySetTxPowerLevel(PADAPTER pAdapter); ++void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc); ++void SetPacketTx(PADAPTER padapter); ++void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB); ++void ResetPhyRxPktCount(PADAPTER pAdapter); ++u32 GetPhyRxPktReceived(PADAPTER pAdapter); ++u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter); ++s32 SetPowerTracking(PADAPTER padapter, u8 enable); ++void GetPowerTracking(PADAPTER padapter, u8 *enable); ++u32 mp_query_psd(PADAPTER pAdapter, u8 *data); ++ ++ ++ ++void hal_mpt_SwitchRfSetting(PADAPTER pAdapter); ++s32 hal_mpt_SetPowerTracking(PADAPTER padapter, u8 enable); ++void hal_mpt_GetPowerTracking(PADAPTER padapter, u8 *enable); ++void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14); ++void hal_mpt_SetChannel(PADAPTER pAdapter); ++void hal_mpt_SetBandwidth(PADAPTER pAdapter); ++void hal_mpt_SetTxPower(PADAPTER pAdapter); ++void hal_mpt_SetDataRate(PADAPTER pAdapter); ++void hal_mpt_SetAntenna(PADAPTER pAdapter); ++s32 hal_mpt_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); ++void hal_mpt_TriggerRFThermalMeter(PADAPTER pAdapter); ++u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter); ++void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 *value); ++void hal_mpt_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven); ++void hal_mpt_SetContinuousTx(PADAPTER pAdapter, u8 bStart); ++void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart); ++void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart); ++void hal_mpt_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); ++void hal_mpt_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart); ++void hal_mpt_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart); ++void mpt_ProSetPMacTx(PADAPTER Adapter); ++ ++void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter , BOOLEAN bMain); ++ULONG mpt_ProQueryCalTxPower(PADAPTER pAdapter, u8 RfPath); ++void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart); ++u8 MptToMgntRate(u32 MptRateIdx); ++u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr); ++u32 mp_join(PADAPTER padapter, u8 mode); ++ ++void ++PMAC_Get_Pkt_Param( ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo ++ ); ++void ++CCK_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo ++ ); ++void ++PMAC_Nsym_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo ++ ); ++void ++L_SIG_generator( ++ UINT N_SYM, /* Max: 750*/ ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo ++ ); ++ ++void HT_SIG_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo); ++ ++void VHT_SIG_A_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo, ++ PRT_PMAC_PKT_INFO pPMacPktInfo); ++ ++void VHT_SIG_B_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo); ++ ++void VHT_Delimiter_generator( ++ PRT_PMAC_TX_INFO pPMacTxInfo); ++ ++ ++int rtw_mp_write_reg(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_read_reg(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_write_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_read_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_start(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_stop(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_rate(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_channel(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_bandwidth(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_txpower_index(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_txpower(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_txpower(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_ant_tx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_ant_rx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_set_ctx_destAddr(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_ctx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_disable_bt_coexist(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++int rtw_mp_disable_bt_coexist(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++int rtw_mp_arx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_trx_query(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_pwrtrk(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_psd(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_thermal(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_reset_stats(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_dump(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_phypara(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_SetRFPath(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++int rtw_mp_QueryDrv(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++int rtw_mp_PwrCtlDM(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra); ++int rtw_mp_getver(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++int rtw_mp_mon(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++int rtw_efuse_mask_file(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++int rtw_efuse_file_map(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++int rtw_mp_SetBT(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra); ++int rtw_mp_tx(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++int rtw_mp_rx(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++int rtw_mp_hwtx(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++u8 HwRateToMPTRate(u8 rate); + + #endif //_RTW_MP_H_ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mp_ioctl.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mp_ioctl.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mp_phy_regdef.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_mp_phy_regdef.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_odm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_odm.h +old mode 100755 +new mode 100644 +index a1d81ac..8375fe1 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_odm.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_odm.h +@@ -21,7 +21,7 @@ + #define __RTW_ODM_H__ + + #include +-#include "../hal/OUTSRC/phydm_types.h" ++#include "../hal/phydm/phydm_types.h" + /* + * This file provides utilities/wrappers for rtw driver to use ODM + */ +@@ -34,12 +34,22 @@ void rtw_odm_dbg_level_set(_adapter *adapter, u32 level); + void rtw_odm_ability_msg(void *sel, _adapter *adapter); + void rtw_odm_ability_set(_adapter *adapter, u32 ability); + ++void rtw_odm_init_ic_type(_adapter *adapter); ++ ++void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter); ++ + bool rtw_odm_adaptivity_needed(_adapter *adapter); + void rtw_odm_adaptivity_parm_msg(void *sel,_adapter *adapter); +-void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, +- s8 IGI_Base, bool ForceEDCCA, u8 AdapEn_RSSI, u8 IGI_LowerBound); ++void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, s8 TH_L2H_ini_mode2, s8 TH_EDCCA_HL_diff_mode2, u8 EDCCA_enable); + void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter); + void rtw_odm_acquirespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type); + void rtw_odm_releasespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type); ++ ++#ifdef CONFIG_DFS_MASTER ++VOID rtw_odm_radar_detect_reset(_adapter *adapter); ++VOID rtw_odm_radar_detect_disable(_adapter *adapter); ++VOID rtw_odm_radar_detect_enable(_adapter *adapter); ++BOOLEAN rtw_odm_radar_detect(_adapter *adapter); ++#endif /* CONFIG_DFS_MASTER */ + #endif // __RTW_ODM_H__ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_p2p.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_p2p.h +old mode 100755 +new mode 100644 +index d43ad24..ab3f4c8 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_p2p.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_p2p.h +@@ -27,6 +27,11 @@ u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 + u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code); + u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); + #ifdef CONFIG_WFD ++int rtw_init_wifi_display_info(_adapter *padapter); ++void rtw_wfd_enable(_adapter *adapter, bool on); ++void rtw_wfd_set_ctrl_port(_adapter *adapter, u16 port); ++void rtw_tdls_wfd_enable(_adapter *adapter, bool on); ++ + u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); + u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunneled); + u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +@@ -39,7 +44,15 @@ u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); + u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); + u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); + u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +-#endif //CONFIG_WFD ++ ++u32 rtw_append_beacon_wfd_ie(_adapter *adapter, u8 *pbuf); ++u32 rtw_append_probe_req_wfd_ie(_adapter *adapter, u8 *pbuf); ++u32 rtw_append_probe_resp_wfd_ie(_adapter *adapter, u8 *pbuf); ++u32 rtw_append_assoc_req_wfd_ie(_adapter *adapter, u8 *pbuf); ++u32 rtw_append_assoc_resp_wfd_ie(_adapter *adapter, u8 *pbuf); ++#endif /*CONFIG_WFD */ ++ ++void rtw_xframe_chk_wfd_ie(struct xmit_frame *xframe); + + u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); + u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta); +@@ -51,6 +64,7 @@ u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe + u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); + u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); + u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); ++int process_p2p_cross_connect_ie(PADAPTER padapter, u8 *IEs, u32 IELength); + + void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType); + +@@ -63,11 +77,9 @@ u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue); + #ifdef CONFIG_IOCTL_CFG80211 + void rtw_init_cfg80211_wifidirect_info( _adapter* padapter); + int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx); +-void rtw_append_wfd_ie(_adapter *padapter, u8 *buf, u32 *len); +-#endif //CONFIG_IOCTL_CFG80211 ++#endif /* CONFIG_IOCTL_CFG80211 */ + + void reset_global_wifidirect_info( _adapter* padapter ); +-int rtw_init_wifi_display_info(_adapter* padapter); + void rtw_init_wifidirect_timers(_adapter* padapter); + void rtw_init_wifidirect_addrs(_adapter* padapter, u8 *dev_addr, u8 *iface_addr); + void init_wifidirect_info( _adapter* padapter, enum P2P_ROLE role); +@@ -147,6 +159,7 @@ void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, co + #define rtw_p2p_findphase_ex_set(wdinfo, value) \ + (wdinfo)->find_phase_state_exchange_cnt = (value) + ++#ifdef CONFIG_P2P + //is this find phase exchange for social channel scan? + #define rtw_p2p_findphase_ex_is_social(wdinfo) \ + (wdinfo)->find_phase_state_exchange_cnt >= P2P_FINDPHASE_EX_SOCIAL_FIRST +@@ -154,7 +167,13 @@ void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, co + //should we need find phase exchange anymore? + #define rtw_p2p_findphase_ex_is_needed(wdinfo) \ + ((wdinfo)->find_phase_state_exchange_cnt < P2P_FINDPHASE_EX_MAX && \ +- (wdinfo)->find_phase_state_exchange_cnt != P2P_FINDPHASE_EX_NONE) ++ (wdinfo)->find_phase_state_exchange_cnt != P2P_FINDPHASE_EX_NONE && \ ++ !(wdinfo)->rx_invitereq_info.scan_op_ch_only && \ ++ !(wdinfo)->p2p_info.scan_op_ch_only) ++#else ++#define rtw_p2p_findphase_ex_is_social(wdinfo) 0 ++#define rtw_p2p_findphase_ex_is_needed(wdinfo) 0 ++#endif /* CONFIG_P2P */ + + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_pwrctrl.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_pwrctrl.h +old mode 100755 +new mode 100644 +index 0eb89fa..8c4fa6b +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_pwrctrl.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_pwrctrl.h +@@ -44,6 +44,32 @@ + #define BTCOEX_ALIVE BIT(4) + #endif // CONFIG_BT_COEXIST + ++#ifdef CONFIG_WOWLAN ++#define MAX_WKFM_NUM 16 /* Frame Mask Cam number for pattern match */ ++#define MAX_WKFM_SIZE 16 /* (16 bytes for WKFM bit mask, 16*8 = 128 bits) */ ++#define MAX_WKFM_PATTERN_SIZE 128 ++#define WKFMCAM_ADDR_NUM 6 ++#define WKFMCAM_SIZE 24 /* each entry need 6*4 bytes */ ++enum pattern_type { ++ PATTERN_BROADCAST = 0, ++ PATTERN_MULTICAST, ++ PATTERN_UNICAST, ++ PATTERN_VALID, ++ PATTERN_INVALID, ++}; ++ ++typedef struct rtl_priv_pattern { ++ int len; ++ char content[MAX_WKFM_PATTERN_SIZE]; ++ char mask[MAX_WKFM_SIZE]; ++} rtl_priv_pattern_t; ++ ++struct rtl_wow_pattern { ++ u16 crc; ++ u8 type; ++ u32 mask[4]; ++}; ++#endif /* CONFIG_WOWLAN */ + + enum Power_Mgnt + { +@@ -282,6 +308,8 @@ struct pwrctrl_priv + + uint ips_enter_cnts; + uint ips_leave_cnts; ++ uint lps_enter_cnts; ++ uint lps_leave_cnts; + + u8 ips_mode; + u8 ips_org_mode; +@@ -320,23 +348,24 @@ struct pwrctrl_priv + u8 wowlan_ap_mode; + u8 wowlan_mode; + u8 wowlan_p2p_mode; ++ u8 wowlan_pno_enable; ++#ifdef CONFIG_GPIO_WAKEUP ++ u8 is_high_active; ++#endif /* CONFIG_GPIO_WAKEUP */ + #ifdef CONFIG_WOWLAN ++ u8 wowlan_txpause_status; + u8 wowlan_pattern; +- u8 wowlan_magic; +- u8 wowlan_unicast; + u8 wowlan_pattern_idx; +- u8 wowlan_pno_enable; +- u8 wowlan_from_cmd; ++ u64 wowlan_fw_iv; ++ struct rtl_priv_pattern patterns[MAX_WKFM_NUM]; + #ifdef CONFIG_PNO_SUPPORT + u8 pno_in_resume; + u8 pno_inited; + pno_nlo_info_t *pnlo_info; + pno_scan_info_t *pscan_info; + pno_ssid_list_t *pno_ssid_list; +-#endif +- u32 wowlan_pattern_context[8][5]; +- u64 wowlan_fw_iv; +-#endif // CONFIG_WOWLAN ++#endif /* CONFIG_PNO_SUPPORT */ ++#endif /* CONFIG_WOWLAN */ + _timer pwr_state_check_timer; + int pwr_state_check_interval; + u8 pwr_state_check_cnts; +@@ -469,5 +498,17 @@ void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason); + void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason); + u32 rtw_ps_deny_get(PADAPTER padapter); + ++#if defined(CONFIG_WOWLAN) ++void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip); ++void rtw_get_sec_iv(PADAPTER padapter, u8 *pcur_dot11txpn, u8 *StaAddr); ++void rtw_set_sec_pn(_adapter *padapter); ++bool rtw_check_pattern_valid(u8 *input, u8 len); ++bool rtw_write_to_frame_mask(_adapter *adapter, u8 idx, ++ struct rtl_wow_pattern *content); ++ ++bool rtw_read_from_frame_mask(_adapter *adapter, u8 idx); ++void rtw_dump_priv_pattern(_adapter *adapter, u8 idx); ++void rtw_clean_pattern(_adapter *adapter); ++#endif /* CONFIG_WOWLAN */ + #endif //__RTL871X_PWRCTRL_H_ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_qos.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_qos.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_recv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_recv.h +old mode 100755 +new mode 100644 +index dab240e..498e88a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_recv.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_recv.h +@@ -45,8 +45,12 @@ + #define NR_RECVBUFF (8) + #endif + #endif //CONFIG_SINGLE_RECV_BUF ++ #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER ++ #define NR_PREALLOC_RECV_SKB (rtw_rtkm_get_nr_recv_skb()>>1) ++ #else /*!CONFIG_PREALLOC_RX_SKB_BUFFER */ ++ #define NR_PREALLOC_RECV_SKB 8 ++ #endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ + +- #define NR_PREALLOC_RECV_SKB (8) + #endif + + #define NR_RECVFRAME 256 +@@ -59,7 +63,7 @@ + #define MAX_RXFRAME_CNT 512 + #define MAX_RX_NUMBLKS (32) + #define RECVFRAME_HDR_ALIGN 128 +- ++#define MAX_CONTINUAL_NORXPACKET_COUNT 1 /* In MAX_CONTINUAL_NORXPACKET_COUNT*2 sec , no rx traffict would issue DELBA*/ + + #define PHY_RSSI_SLID_WIN_MAX 100 + #define PHY_LINKQUALITY_SLID_WIN_MAX 20 +@@ -96,8 +100,10 @@ struct recv_reorder_ctrl + u16 indicate_seq;//=wstart_b, init_value=0xffff + u16 wend_b; + u8 wsize_b; ++ u8 ampdu_size; + _queue pending_recvframe_queue; + _timer reordering_ctrl_timer; ++ u8 bReorderWaiting; + }; + + struct stainfo_rxcache { +@@ -174,26 +180,32 @@ typedef struct _ODM_Phy_Status_Info_ + + struct phy_info + { +- u8 RxPWDBAll; +- +- u8 SignalQuality; // in 0-100 index. +- s8 RxMIMOSignalQuality[4]; //per-path's EVM +- u8 RxMIMOEVMdbm[4]; //per-path's EVM dbm +- +- u8 RxMIMOSignalStrength[4];// in 0~100 index +- +- u16 Cfo_short[4]; // per-path's Cfo_short +- u16 Cfo_tail[4]; // per-path's Cfo_tail +- +- s8 RxPower; // in dBm Translate from PWdB +- s8 RecvSignalPower;// Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. +- u8 BTRxRSSIPercentage; +- u8 SignalStrength; // in 0-100 index. +- +- s8 RxPwr[4]; //per-path's pwdb +- u8 RxSNR[4]; //per-path's SNR +- u8 BandWidth; +- u8 btCoexPwrAdjust; ++ u8 RxPWDBAll; ++ u8 SignalQuality; /* in 0-100 index. */ ++ s8 RxMIMOSignalQuality[4]; /* per-path's EVM */ ++ u8 RxMIMOEVMdbm[4]; /* per-path's EVM dbm */ ++ u8 RxMIMOSignalStrength[4]; /* in 0~100 index */ ++ s16 Cfo_short[4]; /* per-path's Cfo_short */ ++ s16 Cfo_tail[4]; /* per-path's Cfo_tail */ ++ s8 RxPower; /* in dBm Translate from PWdB */ ++ s8 RecvSignalPower; /* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */ ++ u8 BTRxRSSIPercentage; ++ u8 SignalStrength; /* in 0-100 index. */ ++ s8 RxPwr[4]; /* per-path's pwdb */ ++ s8 RxSNR[4]; ++#if (RTL8822B_SUPPORT == 1) ++ u8 RxCount:2; ++ u8 BandWidth:2; ++ u8 rxsc:4; ++#else ++ u8 BandWidth; ++#endif ++ u8 btCoexPwrAdjust; ++#if (RTL8822B_SUPPORT == 1) ++ u8 channel; /* channel number---*/ ++ BOOLEAN bMuPacket; /* is MU packet or not---*/ ++ BOOLEAN bBeamformed; ++#endif + }; + + #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA +@@ -203,8 +215,8 @@ struct rx_raw_rssi + u8 pwdball; + s8 pwr_all; + +- u8 mimo_singal_strength[4];// in 0~100 index +- u8 mimo_singal_quality[4]; ++ u8 mimo_signal_strength[4];/* in 0~100 index */ ++ u8 mimo_signal_quality[4]; + + s8 ofdm_pwr[4]; + u8 ofdm_snr[4]; +@@ -254,8 +266,12 @@ struct rx_pkt_attrib { + u8 key_index; + + u8 data_rate; ++ u8 bw; ++ u8 stbc; ++ u8 ldpc; + u8 sgi; + u8 pkt_rpt_type; ++ u32 tsfl; + u32 MacIDValidEntry[2]; // 64 bits present 64 entry. + + /* +@@ -265,7 +281,7 @@ struct rx_pkt_attrib { + u32 RxPWDBAll; + s32 RecvSignalPower; + */ +- struct phy_info phy_info; ++ struct phy_info phy_info; + }; + + +@@ -278,7 +294,7 @@ struct rx_pkt_attrib { + + #define RECVBUFF_ALIGN_SZ 8 + +-#if defined (CONFIG_RTL8192E) ++#if defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) + #ifdef CONFIG_PCI_HCI + #define RXDESC_SIZE 16 + #define RX_WIFI_INFO_SIZE 24 +@@ -296,7 +312,7 @@ struct recv_stat + + unsigned int rxdw1; + +-#if !(defined(CONFIG_RTL8192E) && defined(CONFIG_PCI_HCI)) //exclude 8192ee ++#if !((defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A)) && defined(CONFIG_PCI_HCI)) /* exclude 8192ee, 8814ae */ + unsigned int rxdw2; + + unsigned int rxdw3; +@@ -521,11 +537,9 @@ struct recv_buf + + #ifdef PLATFORM_LINUX + _pkt *pskb; +- u8 reuse; + #endif + #ifdef PLATFORM_FREEBSD //skb solution + struct sk_buff *pskb; +- u8 reuse; + #endif //PLATFORM_FREEBSD //skb solution + }; + +@@ -602,6 +616,8 @@ union recv_frame{ + + }; + ++bool rtw_rframe_del_wfd_ie(union recv_frame *rframe, u8 ies_offset); ++ + typedef enum _RX_PACKET_TYPE{ + NORMAL_RX,//Normal rx packet + TX_REPORT1,//CCX +@@ -628,6 +644,10 @@ struct recv_buf *rtw_dequeue_recvbuf (_queue *queue); + + void rtw_reordering_ctrl_timeout_handler(void *pcontext); + ++void rx_query_phy_status(union recv_frame *rframe, u8 *phy_stat); ++int rtw_inc_and_chk_continual_no_rx_packet(struct sta_info *sta, int tid_index); ++void rtw_reset_continual_no_rx_packet(struct sta_info *sta, int tid_index); ++ + __inline static u8 *get_rxmem(union recv_frame *precvframe) + { + //always return rx_head... +@@ -716,6 +736,8 @@ __inline static u8 *recvframe_put(union recv_frame *precvframe, sint sz) + //after putting, rx_tail must be still larger than rx_end. + unsigned char * prev_rx_tail; + ++ /* DBG_871X("recvframe_put: len=%d\n", sz); */ ++ + if(precvframe==NULL) + return NULL; + +@@ -835,13 +857,13 @@ __inline static s32 translate_percentage_to_dbm(u32 SignalStrengthIndex) + { + s32 SignalPower; // in dBm. + +-#ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING +- // Translate to dBm (x=y-100) +- SignalPower = SignalStrengthIndex - 100; +-#else +- // Translate to dBm (x=0.5y-95). ++#ifdef CONFIG_SIGNAL_SCALE_MAPPING ++ /* Translate to dBm (x=0.5y-95). */ + SignalPower = (s32)((SignalStrengthIndex + 1) >> 1); + SignalPower -= 95; ++#else ++ /* Translate to dBm (x=y-100) */ ++ SignalPower = SignalStrengthIndex - 100; + #endif + + return SignalPower; +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_rf.h +old mode 100755 +new mode 100644 +index 35d031f..d4dd6a2 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_rf.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_rf.h +@@ -44,6 +44,20 @@ + #define MAX_CHANNEL_NUM_5G 24 + #define MAX_CHANNEL_NUM 38//14+24 + ++#define CENTER_CH_2G_NUM 14 ++#define CENTER_CH_5G_20M_NUM 28 /* 20M center channels */ ++#define CENTER_CH_5G_40M_NUM 14 /* 40M center channels */ ++#define CENTER_CH_5G_80M_NUM 7 /* 80M center channels */ ++#define CENTER_CH_5G_ALL_NUM (CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM + CENTER_CH_5G_80M_NUM) ++ ++extern u8 center_ch_5g_20m[CENTER_CH_5G_20M_NUM]; ++extern u8 center_ch_5g_40m[CENTER_CH_5G_40M_NUM]; ++extern u8 center_ch_5g_80m[CENTER_CH_5G_80M_NUM]; ++extern u8 center_ch_5g_all[CENTER_CH_5G_ALL_NUM]; ++ ++u8 center_chs_5g_num(u8 bw); ++u8 center_chs_5g(u8 bw, u8 id); ++ + //#define NUM_REGULATORYS 21 + #define NUM_REGULATORYS 1 + +@@ -99,20 +113,33 @@ enum _RTL8712_RF_MIMO_CONFIG_{ + RTL8712_RFCONFIG_2T2R=0x22 + }; + ++typedef enum _RF_PATH { ++ RF_PATH_A = 0, ++ RF_PATH_B = 1, ++ RF_PATH_C = 2, ++ RF_PATH_D = 3, ++} RF_PATH, *PRF_PATH; + +-typedef enum _RF90_RADIO_PATH{ +- RF90_PATH_A = 0, //Radio Path A +- RF90_PATH_B = 1, //Radio Path B +- RF90_PATH_C = 2, //Radio Path C +- RF90_PATH_D = 3 //Radio Path D +- //RF90_PATH_MAX //Max RF number 90 support +-}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; ++#define rf_path_char(path) (((path) >= RF_PATH_MAX) ? 'X' : 'A' + (path)) + + // Bandwidth Offset + #define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0 + #define HAL_PRIME_CHNL_OFFSET_LOWER 1 + #define HAL_PRIME_CHNL_OFFSET_UPPER 2 + ++typedef enum _BAND_TYPE { ++ BAND_ON_2_4G = 0, ++ BAND_ON_5G = 1, ++ BAND_ON_BOTH = 2, ++ BAND_MAX = 3, ++} BAND_TYPE, *PBAND_TYPE; ++ ++extern const char * const _band_str[]; ++#define band_str(band) (((band) >= BAND_MAX) ? _band_str[BAND_MAX] : _band_str[(band)]) ++ ++extern const u8 _band_to_band_cap[]; ++#define band_to_band_cap(band) (((band) >= BAND_MAX) ? _band_to_band_cap[BAND_MAX] : _band_to_band_cap[(band)]) ++ + // Represent Channel Width in HT Capabilities + // + typedef enum _CHANNEL_WIDTH{ +@@ -124,6 +151,12 @@ typedef enum _CHANNEL_WIDTH{ + CHANNEL_WIDTH_MAX = 5, + }CHANNEL_WIDTH, *PCHANNEL_WIDTH; + ++extern const char * const _ch_width_str[]; ++#define ch_width_str(bw) (((bw) >= CHANNEL_WIDTH_MAX) ? _ch_width_str[CHANNEL_WIDTH_MAX] : _ch_width_str[(bw)]) ++ ++extern const u8 _ch_width_to_bw_cap[]; ++#define ch_width_to_bw_cap(bw) (((bw) >= CHANNEL_WIDTH_MAX) ? _ch_width_to_bw_cap[CHANNEL_WIDTH_MAX] : _ch_width_to_bw_cap[(bw)]) ++ + // + // Represent Extention Channel Offset in HT Capabilities + // This is available only in 40Mhz mode. +@@ -155,7 +188,6 @@ typedef enum _PROTECTION_MODE{ + PROTECTION_MODE_FORCE_DISABLE = 2, + }PROTECTION_MODE, *PPROTECTION_MODE; + +-/* 2007/11/15 MH Define different RF type. */ + typedef enum _RT_RF_TYPE_DEFINITION + { + RF_1T2R = 0, +@@ -163,13 +195,77 @@ typedef enum _RT_RF_TYPE_DEFINITION + RF_2T2R = 2, + RF_1T1R = 3, + RF_2T2R_GREEN = 4, +- RF_MAX_TYPE = 5, ++ RF_2T3R = 5, ++ RF_3T3R = 6, ++ RF_3T4R = 7, ++ RF_4T4R = 8, ++ ++ RF_MAX_TYPE = 0xF, /* u1Byte */ + }RT_RF_TYPE_DEF_E; + ++int rtw_ch2freq(int chan); ++int rtw_freq2ch(int freq); ++bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo); ++ ++#define RTW_MODULE_RTL8821AE_HMC_M2 BIT0 /* RTL8821AE(HMC+M.2) */ ++#define RTW_MODULE_RTL8821AU BIT1 /* RTL8821AU */ ++#define RTW_MODULE_RTL8812AENF_NGFF BIT2 /* RTL8812AENF(8812AE+8761)_NGFF */ ++#define RTW_MODULE_RTL8812AEBT_HMC BIT3 /* RTL8812AEBT(8812AE+8761)_HMC */ ++#define RTW_MODULE_RTL8188EE_HMC_M2 BIT4 /* RTL8188EE(HMC+M.2) */ ++#define RTW_MODULE_RTL8723BE_HMC_M2 BIT5 /* RTL8723BE(HMC+M.2) */ ++#define RTW_MODULE_RTL8723BS_NGFF1216 BIT6 /* RTL8723BS(NGFF1216) */ ++#define RTW_MODULE_RTL8192EEBT_HMC_M2 BIT7 /* RTL8192EEBT(8192EE+8761AU)_(HMC+M.2) */ ++ ++#define IS_ALPHA2_NO_SPECIFIED(_alpha2) ((*((u16 *)(_alpha2))) == 0xFFFF) ++ ++struct country_chplan { ++ char alpha2[2]; ++ u8 chplan; ++#ifdef CONFIG_80211AC_VHT ++ u8 en_11ac; ++#endif ++#if RTW_DEF_MODULE_REGULATORY_CERT ++ u8 def_module_flags; /* RTW_MODULE_RTLXXX */ ++#endif ++}; ++ ++#ifdef CONFIG_80211AC_VHT ++#define COUNTRY_CHPLAN_EN_11AC(_ent) ((_ent)->en_11ac) ++#else ++#define COUNTRY_CHPLAN_EN_11AC(_ent) 0 ++#endif ++ ++#if RTW_DEF_MODULE_REGULATORY_CERT ++#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) ((_ent)->def_module_flags) ++#else ++#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) 0 ++#endif ++ ++const struct country_chplan *rtw_get_chplan_from_country(const char *country_code); ++ ++#define BB_GAIN_2G 0 ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++#define BB_GAIN_5GLB1 1 ++#define BB_GAIN_5GLB2 2 ++#define BB_GAIN_5GMB1 3 ++#define BB_GAIN_5GMB2 4 ++#define BB_GAIN_5GHB 5 ++#endif ++ ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++#define BB_GAIN_NUM 6 ++#else ++#define BB_GAIN_NUM 1 ++#endif + +-u32 rtw_ch2freq(u32 ch); +-u32 rtw_freq2ch(u32 freq); ++int rtw_ch_to_bb_gain_sel(int ch); ++void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset); ++void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch); + ++bool rtw_is_dfs_range(u32 hi, u32 lo); ++bool rtw_is_dfs_ch(u8 ch, u8 bw, u8 offset); ++bool rtw_is_long_cac_range(u32 hi, u32 lo); ++bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset); + + #endif //_RTL8711_RF_H_ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_security.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_security.h +old mode 100755 +new mode 100644 +index 00b08fd..5820a55 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_security.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_security.h +@@ -30,8 +30,13 @@ + #define _WEP_WPA_MIXED_ 0x07 // WEP + WPA + #define _SMS4_ 0x06 + #ifdef CONFIG_IEEE80211W +-#define _BIP_ 0x8 ++#define _BIP_ 0x8 + #endif //CONFIG_IEEE80211W ++/* 802.11W use wrong key */ ++#define IEEE80211W_RIGHT_KEY 0x0 ++#define IEEE80211W_WRONG_KEY 0x1 ++#define IEEE80211W_NO_KEY 0x2 ++ + #define is_wep_enc(alg) (((alg) == _WEP40_) || ((alg) == _WEP104_)) + + const char *security_type_str(u8 value); +@@ -178,8 +183,6 @@ struct security_priv + u32 ndisauthtype; // NDIS_802_11_AUTHENTICATION_MODE + u32 ndisencryptstatus; // NDIS_802_11_ENCRYPTION_STATUS + +- WLAN_BSSID_EX sec_bss; //for joinbss (h2c buffer) usage +- + NDIS_802_11_WEP ndiswep; + #ifdef PLATFORM_WINDOWS + u8 KeyMaterial[16];// variable length depending on above field. +@@ -468,6 +471,8 @@ void wpa_tdls_generate_tpk(_adapter *padapter, PVOID sta); + int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, + u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie, + u8 *mic); ++int wpa_tdls_teardown_ftie_mic(u8 *kck, u8 *lnkid, u16 reason, ++ u8 dialog_token, u8 trans_seq, u8 *ftie, u8 *mic); + int tdls_verify_mic(u8 *kck, u8 trans_seq, + u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie); + #endif //CONFIG_TDLS +@@ -477,5 +482,9 @@ void rtw_use_tkipkey_handler(RTW_TIMER_HDL_ARGS); + void rtw_sec_restore_wep_key(_adapter *adapter); + u8 rtw_handle_tkip_countermeasure(_adapter* adapter, const char *caller); + ++#ifdef CONFIG_WOWLAN ++u16 rtw_calc_crc(u8 *pdata, int length); ++#endif /*CONFIG_WOWLAN*/ ++ + #endif //__RTL871X_SECURITY_H_ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_sreset.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_sreset.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_tdls.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_tdls.h +old mode 100755 +new mode 100644 +index ce0e2fc..bc2cbd0 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_tdls.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_tdls.h +@@ -1,141 +1,175 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __RTW_TDLS_H_ +-#define __RTW_TDLS_H_ +- +- +-#ifdef CONFIG_TDLS +-/* TDLS STA state */ +-#define TDLS_STATE_NONE 0x00000000 //default state +-#define TDLS_INITIATOR_STATE 0x10000000 +-#define TDLS_RESPONDER_STATE 0x20000000 +-#define TDLS_LINKED_STATE 0x40000000 +-#define TDLS_CH_SWITCH_ON_STATE 0x01000000 +-#define TDLS_PEER_AT_OFF_STATE 0x02000000 //could send pkt on target ch +-#define TDLS_AT_OFF_CH_STATE 0x04000000 +-#define TDLS_CH_SW_INITIATOR_STATE 0x08000000 //avoiding duplicated or unconditional ch. switch rsp. +-#define TDLS_APSD_CHSW_STATE 0x00100000 //in APSD and want to setup channel switch +-#define TDLS_PEER_SLEEP_STATE 0x00200000 //peer sta is sleeping //[TDLS] UAPSD: will not be used one day +-#define TDLS_SW_OFF_STATE 0x00400000 //terminate channel swithcing +-#define TDLS_ALIVE_STATE 0x00010000 //Check if peer sta is alived. +-#define TDLS_WAIT_PTR_STATE 0x00020000 //Waiting peer's TDLS_PEER_TRAFFIC_RESPONSE frame +- +-#define TPK_RESEND_COUNT 301 +-#define CH_SWITCH_TIME 10 +-#define CH_SWITCH_TIMEOUT 30 +-#define TDLS_STAY_TIME 500 +-#define TDLS_SIGNAL_THRESH 0x20 +-#define TDLS_WATCHDOG_PERIOD 10 //Periodically sending tdls discovery request in TDLS_WATCHDOG_PERIOD * 2 sec +-#define TDLS_STAY_TIME 500 +-#define TDLS_HANDSHAKE_TIME 3000 +-#define TDLS_PTI_TIME 7000 +-#define TDLS_ALIVE_COUNT 3 +-#define TDLS_INI_MACID_ENTRY 6 +- +-/* TDLS */ +-#define TDLS_MIC_LEN 16 +-#define WPA_NONCE_LEN 32 +-#define TDLS_TIMEOUT_LEN 4 +- +-struct wpa_tdls_ftie { +- u8 ie_type; /* FTIE */ +- u8 ie_len; +- u8 mic_ctrl[2]; +- u8 mic[TDLS_MIC_LEN]; +- u8 Anonce[WPA_NONCE_LEN]; /* Responder Nonce in TDLS */ +- u8 Snonce[WPA_NONCE_LEN]; /* Initiator Nonce in TDLS */ +- /* followed by optional elements */ +-} ; +- +-struct wpa_tdls_lnkid { +- u8 ie_type; /* Link Identifier IE */ +- u8 ie_len; +- u8 bssid[ETH_ALEN]; +- u8 init_sta[ETH_ALEN]; +- u8 resp_sta[ETH_ALEN]; +-} ; +- +-static u8 TDLS_RSNIE[]={ 0x01, 0x00, //version shall be set to 1 +- 0x00, 0x0f, 0xac, 0x07, //group sipher suite +- 0x01, 0x00, //pairwise cipher suite count +- 0x00, 0x0f, 0xac, 0x04, //pairwise cipher suite list; CCMP only +- 0x01, 0x00, //AKM suite count +- 0x00, 0x0f, 0xac, 0x07, //TPK Handshake +- 0x0c, 0x02, +- //PMKID shall not be present +- }; +- +-static u8 TDLS_WMMIE[]={0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; //Qos info all set zero +- +-static u8 TDLS_EXT_CAPIE[] = {0x00, 0x00, 0x00, 0x50, 0x20, 0x00, 0x00, 0x00}; //bit(28), bit(30), bit(37) +- +-// SRC: Supported Regulatory Classes +-static u8 TDLS_SRC[] = { 0x01, 0x01, 0x02, 0x03, 0x04, 0x0c, 0x16, 0x17, 0x18, 0x19, 0x1b, 0x1c, 0x1d, 0x1e, 0x20, 0x21 }; +- +-void rtw_reset_tdls_info(_adapter* padapter); +-int rtw_init_tdls_info(_adapter* padapter); +-void rtw_free_tdls_info(struct tdls_info *ptdlsinfo); +-int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms); +-void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta); +-void rtw_free_tdls_timer(struct sta_info *psta); +-void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta); +-#ifdef CONFIG_WFD +-int issue_tunneled_probe_req(_adapter *padapter); +-int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame); +-#endif //CONFIG_WFD +-int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); +-int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack); +-int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); +-int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); +-int issue_tdls_dis_rsp(_adapter * padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy); +-int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack); +-int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *psta); +-int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *psta); +-int issue_tdls_ch_switch_req(_adapter *padapter, u8 *mac_addr); +-int issue_tdls_ch_switch_rsp(_adapter *padapter, u8 *mac_addr); +-sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame); +-sint On_TDLS_Setup_Req(_adapter *adapter, union recv_frame *precv_frame); +-int On_TDLS_Setup_Rsp(_adapter *adapter, union recv_frame *precv_frame); +-int On_TDLS_Setup_Cfm(_adapter *adapter, union recv_frame *precv_frame); +-int On_TDLS_Dis_Req(_adapter *adapter, union recv_frame *precv_frame); +-int On_TDLS_Teardown(_adapter *adapter, union recv_frame *precv_frame); +-int On_TDLS_Peer_Traffic_Indication(_adapter *adapter, union recv_frame *precv_frame); +-int On_TDLS_Peer_Traffic_Rsp(_adapter *adapter, union recv_frame *precv_frame); +-sint On_TDLS_Ch_Switch_Req(_adapter *adapter, union recv_frame *precv_frame); +-sint On_TDLS_Ch_Switch_Rsp(_adapter *adapter, union recv_frame *precv_frame); +-void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); +-void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); +-void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); +-void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); +-void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); +-void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, u8 dialog, u8 privacy); +-void rtw_build_tdls_peer_traffic_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); +-void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); +-void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); +-void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); +-void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); +-void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); +- +-u8 update_sgi_tdls(_adapter *padapter, struct sta_info *psta); +-u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta); +-#endif //CONFIG_TDLS +- +-#endif +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_TDLS_H_ ++#define __RTW_TDLS_H_ ++ ++ ++#ifdef CONFIG_TDLS ++/* TDLS STA state */ ++ ++ ++/* TDLS Diect Link Establishment */ ++#define TDLS_STATE_NONE 0x00000000 /* Default state */ ++#define TDLS_INITIATOR_STATE BIT(28) /* 0x10000000 */ ++#define TDLS_RESPONDER_STATE BIT(29) /* 0x20000000 */ ++#define TDLS_LINKED_STATE BIT(30) /* 0x40000000 */ ++/* TDLS PU Buffer STA */ ++#define TDLS_WAIT_PTR_STATE BIT(24) /* 0x01000000 */ /* Waiting peer's TDLS_PEER_TRAFFIC_RESPONSE frame */ ++/* TDLS Check ALive */ ++#define TDLS_ALIVE_STATE BIT(20) /* 0x00100000 */ /* Check if peer sta is alived. */ ++/* TDLS Channel Switch */ ++#define TDLS_CH_SWITCH_PREPARE_STATE BIT(15) /* 0x00008000 */ ++#define TDLS_CH_SWITCH_ON_STATE BIT(16) /* 0x00010000 */ ++#define TDLS_PEER_AT_OFF_STATE BIT(17) /* 0x00020000 */ /* Could send pkt on target ch */ ++#define TDLS_CH_SW_INITIATOR_STATE BIT(18) /* 0x00040000 */ /* Avoid duplicated or unconditional ch. switch rsp. */ ++#define TDLS_WAIT_CH_RSP_STATE BIT(19) /* 0x00080000 */ /* Wait Ch. response as we are TDLS channel switch initiator */ ++ ++ ++#define TDLS_TPK_RESEND_COUNT 86400 /*Unit: seconds */ ++#define TDLS_CH_SWITCH_TIME 15 ++#define TDLS_CH_SWITCH_TIMEOUT 30 ++#define TDLS_CH_SWITCH_OPER_OFFLOAD_TIMEOUT 10 ++#define TDLS_SIGNAL_THRESH 0x20 ++#define TDLS_WATCHDOG_PERIOD 10 /* Periodically sending tdls discovery request in TDLS_WATCHDOG_PERIOD * 2 sec */ ++#define TDLS_HANDSHAKE_TIME 3000 ++#define TDLS_PTI_TIME 7000 ++ ++#define TDLS_CH_SW_STAY_ON_BASE_CHNL_TIMEOUT 20 /* ms */ ++#define TDLS_CH_SW_MONITOR_TIMEOUT 2000 /*ms */ ++ ++#define TDLS_MIC_LEN 16 ++#define WPA_NONCE_LEN 32 ++#define TDLS_TIMEOUT_LEN 4 ++ ++enum TDLS_CH_SW_CHNL { ++ TDLS_CH_SW_BASE_CHNL = 0, ++ TDLS_CH_SW_OFF_CHNL ++}; ++ ++struct wpa_tdls_ftie { ++ u8 ie_type; /* FTIE */ ++ u8 ie_len; ++ u8 mic_ctrl[2]; ++ u8 mic[TDLS_MIC_LEN]; ++ u8 Anonce[WPA_NONCE_LEN]; /* Responder Nonce in TDLS */ ++ u8 Snonce[WPA_NONCE_LEN]; /* Initiator Nonce in TDLS */ ++ /* followed by optional elements */ ++} ; ++ ++struct wpa_tdls_lnkid { ++ u8 ie_type; /* Link Identifier IE */ ++ u8 ie_len; ++ u8 bssid[ETH_ALEN]; ++ u8 init_sta[ETH_ALEN]; ++ u8 resp_sta[ETH_ALEN]; ++} ; ++ ++static u8 TDLS_RSNIE[20]={ 0x01, 0x00, /* Version shall be set to 1 */ ++ 0x00, 0x0f, 0xac, 0x07, /* Group sipher suite */ ++ 0x01, 0x00, /* Pairwise cipher suite count */ ++ 0x00, 0x0f, 0xac, 0x04, /* Pairwise cipher suite list; CCMP only */ ++ 0x01, 0x00, /* AKM suite count */ ++ 0x00, 0x0f, 0xac, 0x07, /* TPK Handshake */ ++ 0x0c, 0x02, ++ /* PMKID shall not be present */ ++ }; ++ ++static u8 TDLS_WMMIE[]={0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; /* Qos info all set zero */ ++ ++static u8 TDLS_WMM_PARAM_IE[] = {0x00, 0x00, 0x03, 0xa4, 0x00, 0x00, 0x27, 0xa4, 0x00, 0x00, 0x42, 0x43, 0x5e, 0x00, 0x62, 0x32, 0x2f, 0x00}; ++ ++static u8 TDLS_EXT_CAPIE[] = {0x00, 0x00, 0x00, 0x50, 0x20, 0x00, 0x00, 0x00}; /* bit(28), bit(30), bit(37) */ ++ ++/* SRC: Supported Regulatory Classes */ ++static u8 TDLS_SRC[] = { 0x01, 0x01, 0x02, 0x03, 0x04, 0x0c, 0x16, 0x17, 0x18, 0x19, 0x1b, 0x1c, 0x1d, 0x1e, 0x20, 0x21 }; ++ ++int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len); ++int check_ap_tdls_ch_switching_prohibited(u8 *pframe, u8 pkt_len); ++ ++u8 rtw_tdls_is_setup_allowed(_adapter *padapter); ++#ifdef CONFIG_TDLS_CH_SW ++u8 rtw_tdls_is_chsw_allowed(_adapter *padapter); ++#endif ++ ++void rtw_reset_tdls_info(_adapter* padapter); ++int rtw_init_tdls_info(_adapter* padapter); ++void rtw_free_tdls_info(struct tdls_info *ptdlsinfo); ++int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms); ++void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta); ++void rtw_free_tdls_timer(struct sta_info *psta); ++void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta); ++ ++#ifdef CONFIG_TDLS_CH_SW ++void rtw_tdls_set_ch_sw_oper_control(_adapter *padapter, u8 enable); ++void rtw_tdls_ch_sw_back_to_base_chnl(_adapter *padapter); ++s32 rtw_tdls_do_ch_sw(_adapter *padapter, u8 chnl_type, u8 channel, u8 channel_offset, u16 bwmode, u16 ch_switch_time); ++void rtw_tdls_chsw_oper_done(_adapter *padapter); ++#endif ++ ++#ifdef CONFIG_WFD ++int issue_tunneled_probe_req(_adapter *padapter); ++int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame); ++#endif /* CONFIG_WFD */ ++int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); ++int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack); ++int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); ++int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); ++int issue_tdls_dis_rsp(_adapter * padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy); ++int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack); ++int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *psta, struct tdls_txmgmt *ptxmgmt); ++int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *psta); ++#ifdef CONFIG_TDLS_CH_SW ++int issue_tdls_ch_switch_req(_adapter *padapter, struct sta_info *ptdls_sta); ++int issue_tdls_ch_switch_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack); ++#endif ++sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Setup_Req(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Setup_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Setup_Cfm(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Dis_Req(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Teardown(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Peer_Traffic_Indication(_adapter *adapter, union recv_frame *precv_frame); ++int On_TDLS_Peer_Traffic_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++#ifdef CONFIG_TDLS_CH_SW ++sint On_TDLS_Ch_Switch_Req(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Ch_Switch_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++#endif ++void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, u8 privacy); ++void rtw_build_tdls_peer_traffic_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); ++void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++ ++u8 update_sgi_tdls(_adapter *padapter, struct sta_info *psta); ++u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta); ++int rtw_tdls_is_driver_setup(_adapter *padapter); ++void rtw_tdls_set_key(_adapter *padapter, struct sta_info *ptdls_sta); ++const char * rtw_tdls_action_txt(enum TDLS_ACTION_FIELD action); ++#endif /* CONFIG_TDLS */ ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_version.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_version.h +old mode 100755 +new mode 100644 +index 03215b8..8f4df71 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_version.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_version.h +@@ -1,2 +1,2 @@ +-#define DRIVERVERSION "v4.3.9.5_13590.20150304_BTCOEX20140929-5443" +-#define BTCOEXVERSION "BTCOEX20140929-5443" ++#define DRIVERVERSION "v4.4.0_17166.20160322_BTCOEX20151223-654a" ++#define BTCOEXVERSION "BTCOEX20151223-654a" +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_vht.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_vht.h +old mode 100755 +new mode 100644 +index 62ad08b..def791a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_vht.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_vht.h +@@ -32,7 +32,12 @@ + + #define BEAMFORMING_VHT_BEAMFORMER_ENABLE BIT0 // Declare our NIC supports beamformer + #define BEAMFORMING_VHT_BEAMFORMEE_ENABLE BIT1 // Declare our NIC supports beamformee +-#define BEAMFORMING_VHT_BEAMFORMER_TEST BIT2 // Transmiting Beamforming no matter the target supports it or not ++#define BEAMFORMING_VHT_MU_MIMO_AP_ENABLE BIT2 /*Declare our NIC support MU-MIMO AP mode*/ ++#define BEAMFORMING_VHT_MU_MIMO_STA_ENABLE BIT3 /*Declare our NIC support MU-MIMO STA mode*/ ++#define BEAMFORMING_VHT_BEAMFORMER_TEST BIT4 /*Transmiting Beamforming no matter the target supports it or not*/ ++#define BEAMFORMING_VHT_BEAMFORMER_STS_CAP (BIT8|BIT9|BIT10) /*Asoc rsp cap*/ ++#define BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM (BIT12|BIT13|BIT14) /*Asoc rsp cap*/ ++ + + //VHT capability info + #define SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val) +@@ -46,15 +51,16 @@ + #define SET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 4, 1, _val) + #define SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 5, 3, _val) + #define SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 0, 3, _val) ++ + #define SET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 3, 1, _val) + #define SET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 4, 1, _val) + #define SET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 5, 1, _val) + #define SET_VHT_CAPABILITY_ELE_HTC_VHT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 1, _val) + #define SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+2, 7, 3, _val) //B23~B25 + #define SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 2, 2, _val) +-#define SET_VHT_CAPABILITY_ELE_MCS_RX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE_16BIT((_pEleStart)+4, 0, 16, _val) //B0~B15 indicate Rx MCS MAP, we write 0 to indicate MCS0~7. by page ++#define SET_VHT_CAPABILITY_ELE_MCS_RX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+4, 0, 16, _val) /* B0~B15 indicate Rx MCS MAP, we write 0 to indicate MCS0~7. by page */ + #define SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+6, 0, 13, _val) +-#define SET_VHT_CAPABILITY_ELE_MCS_TX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE_16BIT((_pEleStart)+8, 0, 16, _val) //B0~B15 indicate Tx MCS MAP, we write 0 to indicate MCS0~7. by page ++#define SET_VHT_CAPABILITY_ELE_MCS_TX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+8, 0, 16, _val) /* B0~B15 indicate Tx MCS MAP, we write 0 to indicate MCS0~7. by page */ + #define SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+10, 0, 13, _val) + + +@@ -67,6 +73,9 @@ + #define GET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 3) + #define GET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 3, 1) + #define GET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 4, 1) ++/*phydm-beamforming*/ ++#define GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+1, 5, 3) ++#define GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 0, 3) + #define GET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 5, 1) + #define GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 7, 3) + #define GET_VHT_CAPABILITY_ELE_RX_MCS(_pEleStart) ((_pEleStart)+4) +@@ -76,10 +85,10 @@ + + + //VHT Operation Information Element +-#define SET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE_8BIT(_pEleStart, 0, 8, _val) +-#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(_pEleStart, _val) SET_BITS_TO_LE_1BYTE_8BIT(_pEleStart+1, 0, 8, _val) +-#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(_pEleStart, _val) SET_BITS_TO_LE_1BYTE_8BIT(_pEleStart+2, 0, 8, _val) +-#define SET_VHT_OPERATION_ELE_BASIC_MCS_SET(_pEleStart, _val) SET_BITS_TO_LE_2BYTE_16BIT((_pEleStart)+3, 0, 16, _val) ++#define SET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 8, _val) ++#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+1, 0, 8, _val) ++#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+2, 0, 8, _val) ++#define SET_VHT_OPERATION_ELE_BASIC_MCS_SET(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+3, 0, 16, _val) + + #define GET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart,0,8) + #define GET_VHT_OPERATION_ELE_CENTER_FREQ1(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1,0,8) +@@ -102,7 +111,7 @@ struct vht_priv + + u8 ldpc_cap; + u8 stbc_cap; +- u8 beamform_cap; ++ u16 beamform_cap; + + u8 sgi_80m;//short GI + u8 ampdu_len; +@@ -115,9 +124,8 @@ struct vht_priv + }; + + u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map); +-void rtw_get_vht_nss(u8 *pvht_mcs_map); + u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate); +-u32 rtw_vht_rate_to_bitmap(u8 *pVHTRate); ++u64 rtw_vht_rate_to_bitmap(u8 *pVHTRate); + void rtw_vht_use_default_setting(_adapter *padapter); + u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel); + u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw); +@@ -129,6 +137,7 @@ void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); + void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta); + u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len); + void VHTOnAssocRsp(_adapter *padapter); ++u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map); + + #endif //_RTW_VHT_H_ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_wapi.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_wapi.h +old mode 100755 +new mode 100644 +index 582410c..15b9212 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_wapi.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtw_wapi.h +@@ -1,222 +1,222 @@ +-#ifndef __INC_WAPI_H +-#define __INC_WAPI_H +- +- +-#define CONFIG_WAPI_SW_SMS4 +-#define WAPI_DEBUG +- +-#define SMS4_MIC_LEN 16 +-#define WAPI_EXT_LEN 18 +-#define MAX_WAPI_IE_LEN 256 +-#define sMacHdrLng 24 // octets in data header, no WEP +- +-#ifdef WAPI_DEBUG +- +-/* WAPI trace debug */ +-extern u32 wapi_debug_component; +- +-static inline void dump_buf(u8 *buf, u32 len) +-{ +- u32 i; +- printk("-----------------Len %d----------------\n", len); +- for(i=0; i0: up to ms waiting */ +@@ -669,10 +564,6 @@ struct xmit_frame + u8 agg_num; + #endif + s8 pkt_offset; +-#ifdef CONFIG_RTL8192D +- u8 EMPktNum; +- u16 EMPktLen[5];//The max value by HW +-#endif + #endif + + #ifdef CONFIG_XMIT_ACK +@@ -876,7 +767,13 @@ struct xmit_priv { + extern struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv, + enum cmdbuf_type buf_type); + #define rtw_alloc_cmdxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_RSVD) ++#if defined(CONFIG_RTL8192E) && defined(CONFIG_PCI_HCI) ++extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8192ee(struct xmit_priv *pxmitpriv, ++ enum cmdbuf_type buf_type); ++#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8192ee(p, CMDBUF_BEACON) ++#else + #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON) ++#endif + + extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv); + extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); +@@ -928,6 +825,7 @@ void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv); + void rtw_alloc_hwxmits(_adapter *padapter); + void rtw_free_hwxmits(_adapter *padapter); + ++s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev); + + s32 rtw_xmit(_adapter *padapter, _pkt **pkt); + bool xmitframe_hiq_filter(struct xmit_frame *xmitframe); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_hal.h +old mode 100755 +new mode 100644 +index a918a76..a694cdd +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_hal.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_hal.h +@@ -26,11 +26,7 @@ extern u8 sd_hal_bus_deinit(PADAPTER padapter); + + u8 sd_int_isr(PADAPTER padapter); + void sd_int_dpc(PADAPTER padapter); +-void rtw_set_hal_ops(_adapter *padapter); +- +-#ifdef CONFIG_RTL8723A +-void rtl8723as_set_hal_ops(PADAPTER padapter); +-#endif ++u8 rtw_set_hal_ops(_adapter *padapter); + + #ifdef CONFIG_RTL8188E + void rtl8188es_set_hal_ops(PADAPTER padapter); +@@ -48,5 +44,13 @@ void rtl8821as_set_hal_ops(PADAPTER padapter); + void rtl8192es_set_hal_ops(PADAPTER padapter); + #endif + ++#ifdef CONFIG_RTL8703B ++void rtl8703bs_set_hal_ops(PADAPTER padapter); ++#endif ++ ++#ifdef CONFIG_RTL8188F ++void rtl8188fs_set_hal_ops(PADAPTER padapter); ++#endif ++ + #endif //__SDIO_HAL_H__ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops.h +old mode 100755 +new mode 100644 +index 0dcd86f..6907814 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops.h +@@ -62,14 +62,6 @@ s32 _sdio_write32(PADAPTER padapter, u32 addr, u32 val); + extern void sd_int_hdl(PADAPTER padapter); + extern u8 CheckIPSStatus(PADAPTER padapter); + +-#ifdef CONFIG_RTL8723A +-extern void InitInterrupt8723ASdio(PADAPTER padapter); +-extern void InitSysInterrupt8723ASdio(PADAPTER padapter); +-extern void EnableInterrupt8723ASdio(PADAPTER padapter); +-extern void DisableInterrupt8723ASdio(PADAPTER padapter); +-extern u8 HalQueryTxBufferStatus8723ASdio(PADAPTER padapter); +-#endif // CONFIG_RTL8723A +- + #ifdef CONFIG_RTL8188E + extern void InitInterrupt8188ESdio(PADAPTER padapter); + extern void EnableInterrupt8188ESdio(PADAPTER padapter); +@@ -86,7 +78,10 @@ extern void EnableInterrupt8821AS(PADAPTER padapter); + extern void DisableInterrupt8821AS(PADAPTER padapter); + extern u8 HalQueryTxBufferStatus8821AS(PADAPTER padapter); + extern u8 HalQueryTxOQTBufferStatus8821ASdio(PADAPTER padapter); +-#endif // CONFIG_RTL8188E ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++void ClearInterrupt8821AS(PADAPTER padapter); ++#endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */ ++#endif /* CONFIG_RTL8821A */ + + #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) + extern u8 RecvOnePkt(PADAPTER padapter, u32 size); +@@ -115,7 +110,31 @@ extern u8 HalQueryTxOQTBufferStatus8192ESdio(PADAPTER padapter); + extern void ClearInterrupt8192ESdio(PADAPTER padapter); + #endif // CONFIG_RTL8192E + ++#ifdef CONFIG_RTL8703B ++extern void InitInterrupt8703BSdio(PADAPTER padapter); ++extern void InitSysInterrupt8703BSdio(PADAPTER padapter); ++extern void EnableInterrupt8703BSdio(PADAPTER padapter); ++extern void DisableInterrupt8703BSdio(PADAPTER padapter); ++extern u8 HalQueryTxBufferStatus8703BSdio(PADAPTER padapter); ++extern u8 HalQueryTxOQTBufferStatus8703BSdio(PADAPTER padapter); ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++extern void DisableInterruptButCpwm28703BSdio(PADAPTER padapter); ++extern void ClearInterrupt8703BSdio(PADAPTER padapter); ++#endif //CONFIG_WOWLAN ++#endif + ++#ifdef CONFIG_RTL8188F ++extern void InitInterrupt8188FSdio(PADAPTER padapter); ++extern void InitSysInterrupt8188FSdio(PADAPTER padapter); ++extern void EnableInterrupt8188FSdio(PADAPTER padapter); ++extern void DisableInterrupt8188FSdio(PADAPTER padapter); ++extern u8 HalQueryTxBufferStatus8188FSdio(PADAPTER padapter); ++extern u8 HalQueryTxOQTBufferStatus8188FSdio(PADAPTER padapter); ++#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) ++extern void DisableInterruptButCpwm28188FSdio(PADAPTER padapter); ++extern void ClearInterrupt8188FSdio(PADAPTER padapter); ++#endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */ ++#endif + + #endif // !__SDIO_OPS_H__ + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops_ce.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops_ce.h +old mode 100755 +new mode 100644 +index d2da293..6dfc774 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops_ce.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops_ce.h +@@ -16,40 +16,40 @@ + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * +- ******************************************************************************/ +-#ifndef _SDIO_OPS_WINCE_H_ +-#define _SDIO_OPS_WINCE_H_ +- +-#include +-#include +-#include +-#include +- +- +-#ifdef PLATFORM_OS_CE +- +- +-extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); +- +- +-extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr,u8 val8); +- +- +-uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); +- +-extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); +- +- +-extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); +- +-extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); +-extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); +-extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); +-extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); +-extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); +-extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata); +- +-#endif +- +-#endif +- ++ ******************************************************************************/ ++#ifndef _SDIO_OPS_WINCE_H_ ++#define _SDIO_OPS_WINCE_H_ ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_OS_CE ++ ++ ++extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); ++ ++ ++extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr,u8 val8); ++ ++ ++uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ ++extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ ++ ++extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); ++ ++extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); ++extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); ++extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); ++extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); ++extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata); ++ ++#endif ++ ++#endif ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops_linux.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops_linux.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops_xp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_ops_xp.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_osintf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sdio_osintf.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sta_info.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sta_info.h +old mode 100755 +new mode 100644 +index 15964d7..25ccf7c +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sta_info.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/sta_info.h +@@ -22,9 +22,29 @@ + + + #define IBSS_START_MAC_ID 2 +-#define NUM_STA 32 ++#define NUM_STA MACID_NUM_SW_LIMIT + #define NUM_ACL 16 + ++#ifdef CONFIG_TDLS ++#define MAX_ALLOWED_TDLS_STA_NUM 4 ++#endif ++ ++enum sta_info_update_type { ++ STA_INFO_UPDATE_NONE = 0, ++ STA_INFO_UPDATE_BW = BIT(0), ++ STA_INFO_UPDATE_RATE = BIT(1), ++ STA_INFO_UPDATE_PROTECTION_MODE = BIT(2), ++ STA_INFO_UPDATE_CAP = BIT(3), ++ STA_INFO_UPDATE_HT_CAP = BIT(4), ++ STA_INFO_UPDATE_VHT_CAP = BIT(5), ++ STA_INFO_UPDATE_ALL = STA_INFO_UPDATE_BW ++ |STA_INFO_UPDATE_RATE ++ |STA_INFO_UPDATE_PROTECTION_MODE ++ |STA_INFO_UPDATE_CAP ++ |STA_INFO_UPDATE_HT_CAP ++ |STA_INFO_UPDATE_VHT_CAP, ++ STA_INFO_UPDATE_MAX ++}; + + //if mode ==0, then the sta is allowed once the addr is hit. + //if mode ==1, then the sta is rejected once the addr is non-hit. +@@ -48,6 +68,7 @@ typedef struct _RSSI_STA{ + s32 UndecoratedSmoothedPWDB; + s32 UndecoratedSmoothedCCK; + s32 UndecoratedSmoothedOFDM; ++ u32 OFDM_pkt; + u64 PacketMap; + u8 ValidBit; + }RSSI_STA, *PRSSI_STA; +@@ -62,7 +83,7 @@ struct stainfo_stats { + u64 rx_probersp_uo_pkts; + u64 rx_ctrl_pkts; + u64 rx_data_pkts; +- ++ u64 rx_data_qos_pkts[TID_NUM]; + u64 last_rx_mgnt_pkts; + u64 last_rx_beacon_pkts; + u64 last_rx_probereq_pkts; +@@ -71,7 +92,11 @@ struct stainfo_stats { + u64 last_rx_probersp_uo_pkts; + u64 last_rx_ctrl_pkts; + u64 last_rx_data_pkts; +- ++ u64 last_rx_data_qos_pkts[TID_NUM]; ++#ifdef CONFIG_TDLS ++ u64 rx_tdls_disc_rsp_pkts; ++ u64 last_rx_tdls_disc_rsp_pkts; ++#endif + u64 rx_bytes; + u64 rx_drops; + +@@ -80,6 +105,65 @@ struct stainfo_stats { + u64 tx_drops; + }; + ++#ifndef DBG_SESSION_TRACKER ++#define DBG_SESSION_TRACKER 0 ++#endif ++ ++/* session tracker status */ ++#define ST_STATUS_NONE 0 ++#define ST_STATUS_CHECK BIT0 ++#define ST_STATUS_ESTABLISH BIT1 ++#define ST_STATUS_EXPIRE BIT2 ++ ++#define ST_EXPIRE_MS (10 * 1000) ++ ++struct session_tracker { ++ _list list; /* session_tracker_queue */ ++ u32 local_naddr; ++ u16 local_port; ++ u32 remote_naddr; ++ u16 remote_port; ++ u32 set_time; ++ u8 status; ++}; ++ ++/* session tracker cmd */ ++#define ST_CMD_ADD 0 ++#define ST_CMD_DEL 1 ++#define ST_CMD_CHK 2 ++ ++struct st_cmd_parm { ++ u8 cmd; ++ struct sta_info *sta; ++ u32 local_naddr; /* TODO: IPV6 */ ++ u16 local_port; ++ u32 remote_naddr; /* TODO: IPV6 */ ++ u16 remote_port; ++}; ++ ++typedef bool (*st_match_rule)(_adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port); ++ ++struct st_register { ++ u8 s_proto; ++ st_match_rule rule; ++}; ++ ++#define SESSION_TRACKER_REG_ID_WFD 0 ++#define SESSION_TRACKER_REG_ID_NUM 1 ++ ++struct st_ctl_t { ++ struct st_register reg[SESSION_TRACKER_REG_ID_NUM]; ++ _queue tracker_q; ++}; ++ ++void rtw_st_ctl_init(struct st_ctl_t *st_ctl); ++void rtw_st_ctl_deinit(struct st_ctl_t *st_ctl); ++void rtw_st_ctl_register(struct st_ctl_t *st_ctl, u8 st_reg_id, struct st_register *reg); ++void rtw_st_ctl_unregister(struct st_ctl_t *st_ctl, u8 st_reg_id); ++bool rtw_st_ctl_chk_reg_s_proto(struct st_ctl_t *st_ctl, u8 s_proto); ++bool rtw_st_ctl_chk_reg_rule(struct st_ctl_t *st_ctl, _adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port); ++void dump_st_ctl(void *sel, struct st_ctl_t *st_ctl); ++ + #ifdef CONFIG_TDLS + struct TDLS_PeerKey { + u8 kck[16]; /* TPK-KCK */ +@@ -108,6 +192,8 @@ struct sta_info { + uint mac_id; + uint qos_option; + u8 hwaddr[ETH_ALEN]; ++ u16 hwseq; ++ u8 ra_rpt_linked; + + uint ieee8021x_blocked; //0: allowed, 1:blocked + uint dot118021XPrivacy; //aes, tkip... +@@ -122,6 +208,7 @@ struct sta_info { + #endif //CONFIG_GTK_OL + #ifdef CONFIG_IEEE80211W + union pn48 dot11wtxpn; // PN48 used for Unicast mgmt xmit. ++ _timer dot11w_expire_timer; + #endif //CONFIG_IEEE80211W + union pn48 dot11rxpn; // PN48 used for Unicast recv. + +@@ -136,45 +223,49 @@ struct sta_info { + + u8 raid; + u8 init_rate; +- u32 ra_mask; ++ u64 ra_mask; + u8 wireless_mode; // NETWORK_TYPE + u8 bw_mode; + + u8 ldpc; + u8 stbc; + ++#ifdef CONFIG_BEAMFORMING ++ u16 txbf_paid; ++ u16 txbf_gid; ++#endif ++ + struct stainfo_stats sta_stats; + + #ifdef CONFIG_TDLS + u32 tdls_sta_state; +- u8 dialog; + u8 SNonce[32]; + u8 ANonce[32]; + u32 TDLS_PeerKey_Lifetime; +- u16 TPK_count; ++ u32 TPK_count; + _timer TPK_timer; + struct TDLS_PeerKey tpk; +- u16 stat_code; +- u8 off_ch; ++#ifdef CONFIG_TDLS_CH_SW + u16 ch_switch_time; + u16 ch_switch_timeout; +- u8 option; +- _timer option_timer; +- _timer base_ch_timer; +- _timer off_ch_timer; ++ //u8 option; ++ _timer ch_sw_timer; ++ _timer delay_timer; ++ _timer stay_on_base_chnl_timer; ++ _timer ch_sw_monitor_timer; ++#endif + _timer handshake_timer; +- u8 timer_flag; + u8 alive_count; + _timer pti_timer; +- u8 TDLS_RSNIE[20]; //Save peer's RSNIE, use for sending TDLS_SETUP_RSP +-#endif //CONFIG_TDLS ++ u8 TDLS_RSNIE[20]; /* Save peer's RSNIE, used for sending TDLS_SETUP_RSP */ ++#endif /* CONFIG_TDLS */ + + //for A-MPDU TX, ADDBA timeout check + _timer addba_retry_timer; + + //for A-MPDU Rx reordering buffer control +- struct recv_reorder_ctrl recvreorder_ctrl[16]; +- ++ struct recv_reorder_ctrl recvreorder_ctrl[TID_NUM]; ++ ATOMIC_T continual_no_rx_packet[TID_NUM]; + //for A-MPDU Tx + //unsigned char ampdu_txen_bitmap; + u16 BA_starting_seqctrl[16]; +@@ -196,13 +287,14 @@ struct sta_info { + //AP_Mode: + //curr_network(mlme_priv/security_priv/qos/ht) : AP CAP/INFO + //sta_info: (AP & STA) CAP/INFO +- ++ ++ unsigned int expire_to; ++ + #ifdef CONFIG_AP_MODE + + _list asoc_list; + _list auth_list; +- +- unsigned int expire_to; ++ + unsigned int auth_seq; + unsigned int authalg; + unsigned char chg_txt[128]; +@@ -228,13 +320,13 @@ struct sta_info { + u8 no_ht_gf_set; + u8 no_ht_set; + u8 ht_20mhz_set; ++ u8 ht_40mhz_intolerant; + #endif // CONFIG_NATIVEAP_MLME + + #ifdef CONFIG_ATMEL_RC_PATCH + u8 flag_atmel_rc; + #endif + +- unsigned int tx_ra_bitmap; + u8 qos_info; + + u8 max_sp_len; +@@ -263,6 +355,10 @@ struct sta_info { + u8 dev_name[32]; + #endif //CONFIG_P2P + ++#ifdef CONFIG_WFD ++ u8 op_wfd_mode; ++#endif ++ + #ifdef CONFIG_TX_MCAST2UNI + u8 under_exist_checking; + #endif // CONFIG_TX_MCAST2UNI +@@ -312,6 +408,8 @@ struct sta_info { + + /* To store the sequence number of received management frame */ + u16 RxMgmtFrameSeqNum; ++ ++ struct st_ctl_t st_ctl; + }; + + #define sta_rx_pkts(sta) \ +@@ -327,9 +425,15 @@ struct sta_info { + #define sta_rx_data_pkts(sta) \ + (sta->sta_stats.rx_data_pkts) + ++#define sta_rx_data_qos_pkts(sta, i) \ ++ (sta->sta_stats.rx_data_qos_pkts[i]) ++ + #define sta_last_rx_data_pkts(sta) \ + (sta->sta_stats.last_rx_data_pkts) + ++#define sta_last_rx_data_qos_pkts(sta, i) \ ++ (sta->sta_stats.last_rx_data_qos_pkts[i]) ++ + #define sta_rx_mgnt_pkts(sta) \ + (sta->sta_stats.rx_mgnt_pkts) + +@@ -394,7 +498,15 @@ struct sta_info { + , sta->sta_stats.rx_data_pkts -sta->sta_stats.last_rx_data_pkts + + #define STA_PKTS_FMT "(m:%llu, c:%llu, d:%llu)" +- ++ ++#ifdef CONFIG_WFD ++#define STA_OP_WFD_MODE(sta) (sta)->op_wfd_mode ++#define STA_SET_OP_WFD_MODE(sta, mode) (sta)->op_wfd_mode = (mode) ++#else ++#define STA_OP_WFD_MODE(sta) 0 ++#define STA_SET_OP_WFD_MODE(sta, mode) do {} while (0) ++#endif ++ + struct sta_priv { + + u8 *pallocated_stainfo_buf; +@@ -408,7 +520,8 @@ struct sta_priv { + _queue wakeup_q; + + _adapter *padapter; +- ++ ++ u32 adhoc_expire_to; + + #ifdef CONFIG_AP_MODE + _list asoc_list; +@@ -443,7 +556,7 @@ struct sta_priv { + }; + + +-__inline static u32 wifi_mac_hash(u8 *mac) ++static u32 wifi_mac_hash(const u8 *mac) + { + u32 x; + +@@ -468,10 +581,10 @@ extern u32 _rtw_free_sta_priv(struct sta_priv *pstapriv); + int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta); + struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset); + +-extern struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr); ++extern struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr); + extern u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta); + extern void rtw_free_all_stainfo(_adapter *padapter); +-extern struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr); ++extern struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr); + extern u32 rtw_init_bcmc_stainfo(_adapter* padapter); + extern struct sta_info* rtw_get_bcmc_stainfo(_adapter* padapter); + extern u8 rtw_access_ctrl(_adapter *padapter, u8 *mac_addr); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_hal.h +old mode 100755 +new mode 100644 +index 51f25b8..8d500eb +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_hal.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_hal.h +@@ -20,19 +20,10 @@ + #ifndef __USB_HAL_H__ + #define __USB_HAL_H__ + +-void rtw_set_hal_ops(_adapter *padapter); ++int usb_init_recv_priv(_adapter *padapter, u16 ini_in_buf_sz); ++void usb_free_recv_priv (_adapter *padapter, u16 ini_in_buf_sz); + +-#ifdef CONFIG_RTL8192C +-void rtl8192cu_set_hal_ops(_adapter * padapter); +-#endif +- +-#ifdef CONFIG_RTL8192D +-void rtl8192du_set_hal_ops(_adapter * padapter); +-#endif +- +-#ifdef CONFIG_RTL8723A +-void rtl8723au_set_hal_ops(_adapter * padapter); +-#endif ++u8 rtw_set_hal_ops(_adapter *padapter); + + #ifdef CONFIG_RTL8188E + void rtl8188eu_set_hal_ops(_adapter * padapter); +@@ -51,6 +42,18 @@ void rtl8192eu_set_hal_ops(_adapter * padapter); + void rtl8723bu_set_hal_ops(_adapter * padapter); + #endif + ++#ifdef CONFIG_RTL8814A ++void rtl8814au_set_hal_ops(_adapter * padapter); ++#endif /* CONFIG_RTL8814A */ ++ ++#ifdef CONFIG_RTL8188F ++void rtl8188fu_set_hal_ops(_adapter *padapter); ++#endif ++ ++#ifdef CONFIG_RTL8703B ++void rtl8703bu_set_hal_ops(_adapter *padapter); ++#endif ++ + #ifdef CONFIG_INTEL_PROXIM + extern _adapter *rtw_usb_get_sw_pointer(void); + #endif //CONFIG_INTEL_PROXIM +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_ops.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_ops.h +old mode 100755 +new mode 100644 +index 5606891..ee23314 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_ops.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_ops.h +@@ -22,9 +22,10 @@ + + + #define REALTEK_USB_VENQT_READ 0xC0 +-#define REALTEK_USB_VENQT_WRITE 0x40 ++#define REALTEK_USB_VENQT_WRITE 0x40 + #define REALTEK_USB_VENQT_CMD_REQ 0x05 + #define REALTEK_USB_VENQT_CMD_IDX 0x00 ++#define REALTEK_USB_IN_INT_EP_IDX 1 + + enum{ + VENDOR_WRITE = 0x00, +@@ -51,57 +52,68 @@ enum{ + #include + #endif //PLATFORM_LINUX + +-#ifdef CONFIG_RTL8192C +-void rtl8192cu_set_hw_type(_adapter *padapter); +-void rtl8192cu_set_intf_ops(struct _io_ops *pops); +-void rtl8192cu_recv_tasklet(void *priv); +-void rtl8192cu_xmit_tasklet(void *priv); +-#endif +- +-#ifdef CONFIG_RTL8723A +-void rtl8723au_set_hw_type(_adapter *padapter); +-void rtl8723au_set_intf_ops(struct _io_ops *pops); +-void rtl8192cu_recv_tasklet(void *priv); +-void rtl8192cu_xmit_tasklet(void *priv); +-#endif +- +-#ifdef CONFIG_RTL8192D +-void rtl8192du_set_hw_type(_adapter *padapter); +-void rtl8192du_set_intf_ops(struct _io_ops *pops); +-#ifndef PLATFORM_FREEBSD +-void rtl8192du_recv_tasklet(void *priv); +-#else // PLATFORM_FREEBSD +-void rtl8192du_recv_tasklet(void *priv, int npending); +-#ifdef CONFIG_RX_INDICATE_QUEUE +-void rtw_rx_indicate_tasklet(void *priv, int npending); +-#endif // CONFIG_RX_INDICATE_QUEUE +-#endif // PLATFORM_FREEBSD +- +-void rtl8192du_xmit_tasklet(void *priv); +-#endif +- + #ifdef CONFIG_RTL8188E +-void rtl8188eu_set_hw_type(_adapter *padapter); ++void rtl8188eu_set_hw_type(struct dvobj_priv *pdvobj); + void rtl8188eu_set_intf_ops(struct _io_ops *pops); ++#ifdef CONFIG_SUPPORT_USB_INT ++void interrupt_handler_8188eu(_adapter *padapter, u16 pkt_len, u8 *pbuf); ++#endif + #endif + + #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) +-void rtl8812au_set_hw_type(_adapter *padapter); ++void rtl8812au_set_hw_type(struct dvobj_priv *pdvobj); + void rtl8812au_set_intf_ops(struct _io_ops *pops); ++#ifdef CONFIG_SUPPORT_USB_INT ++void interrupt_handler_8812au(_adapter *padapter, u16 pkt_len, u8 *pbuf); ++#endif + #endif + ++#ifdef CONFIG_RTL8814A ++void rtl8814au_set_hw_type(struct dvobj_priv *pdvobj); ++void rtl8814au_set_intf_ops(struct _io_ops *pops); ++#ifdef CONFIG_SUPPORT_USB_INT ++void interrupt_handler_8814au(_adapter *padapter, u16 pkt_len, u8 *pbuf); ++#endif ++#endif /* CONFIG_RTL8814 */ ++ + #ifdef CONFIG_RTL8192E +-void rtl8192eu_set_hw_type(_adapter *padapter); ++void rtl8192eu_set_hw_type(struct dvobj_priv *pdvobj); + void rtl8192eu_set_intf_ops(struct _io_ops *pops); ++#ifdef CONFIG_SUPPORT_USB_INT ++void interrupt_handler_8192eu(_adapter *padapter, u16 pkt_len, u8 *pbuf); ++#endif ++ ++#endif ++ ++#ifdef CONFIG_RTL8188F ++void rtl8188fu_set_hw_type(struct dvobj_priv *pdvobj); ++void rtl8188fu_set_intf_ops(struct _io_ops *pops); ++void rtl8188fu_recv_tasklet(void *priv); ++void rtl8188fu_xmit_tasklet(void *priv); ++#ifdef CONFIG_SUPPORT_USB_INT ++void interrupt_handler_8188fu(_adapter *padapter, u16 pkt_len, u8 *pbuf); ++#endif + #endif + + #ifdef CONFIG_RTL8723B +-void rtl8723bu_set_hw_type(_adapter *padapter); ++void rtl8723bu_set_hw_type(struct dvobj_priv *pdvobj); + void rtl8723bu_set_intf_ops(struct _io_ops *pops); + void rtl8723bu_recv_tasklet(void *priv); + void rtl8723bu_xmit_tasklet(void *priv); ++#ifdef CONFIG_SUPPORT_USB_INT ++void interrupt_handler_8723bu(_adapter *padapter, u16 pkt_len, u8 *pbuf); ++#endif + #endif + ++#ifdef CONFIG_RTL8703B ++void rtl8703bu_set_hw_type(struct dvobj_priv *pdvobj); ++void rtl8703bu_set_intf_ops(struct _io_ops *pops); ++void rtl8703bu_recv_tasklet(void *priv); ++void rtl8703bu_xmit_tasklet(void *priv); ++#ifdef CONFIG_SUPPORT_USB_INT ++void interrupt_handler_8703bu(_adapter *padapter, u16 pkt_len, u8 *pbuf); ++#endif /* CONFIG_SUPPORT_USB_INT */ ++#endif /* CONFIG_RTL8703B */ + + enum RTW_USB_SPEED { + RTW_USB_SPEED_UNKNOWN = 0, +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_ops_linux.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_ops_linux.h +old mode 100755 +new mode 100644 +index a048e83..b0d0f43 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_ops_linux.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_ops_linux.h +@@ -29,6 +29,7 @@ + #define RECV_BULK_IN_ADDR 0x80//assign by drv,not real address + #define RECV_INT_IN_ADDR 0x81//assign by drv,not real address + ++#define INTERRUPT_MSG_FORMAT_LEN 60 + + #if defined(CONFIG_VENDOR_REQ_RETRY) && defined(CONFIG_USB_VENDOR_REQ_MUTEX) + /* vendor req retry should be in the situation when each vendor req is atomically submitted from others */ +@@ -65,5 +66,24 @@ u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem); + void usb_write_port_cancel(struct intf_hdl *pintfhdl); + + int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype); ++#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ ++int _usbctrl_vendorreq_async_write(struct usb_device *udev, u8 request, ++ u16 value, u16 index, void *pdata, u16 len, u8 requesttype); ++#endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */ ++ ++u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr); ++u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr); ++u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr); ++int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); ++u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem); ++void usb_recv_tasklet(void *priv); ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs); ++u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr); ++#endif + #endif + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_osintf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_osintf.h +old mode 100755 +new mode 100644 +index 1c0f5a0..62dc44a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_osintf.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_osintf.h +@@ -25,9 +25,6 @@ + #define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3) + + +-//uint usb_dvobj_init(_adapter * adapter); +-//void usb_dvobj_deinit(_adapter * adapter); +- + u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, RT_USB_BREQUEST brequest, RT_USB_WVALUE wvalue, u8 windex, void* data, u8 datalen, u8 isdirectionin); + + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_vendor_req.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/usb_vendor_req.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/wifi.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/wifi.h +old mode 100755 +new mode 100644 +index dff95b4..9d21a5a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/wifi.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/wifi.h +@@ -170,6 +170,8 @@ enum WIFI_REASON_CODE { + enum WIFI_STATUS_CODE { + _STATS_SUCCESSFUL_ = 0, + _STATS_FAILURE_ = 1, ++ _STATS_SEC_DISABLED_ = 5, ++ _STATS_NOT_IN_SAME_BSS_ = 7, + _STATS_CAP_FAIL_ = 10, + _STATS_NO_ASOC_ = 11, + _STATS_OTHER_ = 12, +@@ -179,6 +181,10 @@ enum WIFI_STATUS_CODE { + _STATS_AUTH_TIMEOUT_ = 16, + _STATS_UNABLE_HANDLE_STA_ = 17, + _STATS_RATE_FAIL_ = 18, ++ _STATS_REFUSED_TEMPORARILY_ = 30, ++ _STATS_DECLINE_REQ_ = 37, ++ _STATS_INVALID_PARAMETERS_ = 38, ++ _STATS_INVALID_RSNIE_ = 72, + }; + + /* Status codes (IEEE 802.11-2007, 7.3.1.9, Table 7-23) */ +@@ -668,6 +674,7 @@ typedef enum _ELEMENT_ID{ + EID_WAPI = 68, + EID_VHTCapability = 191, // Based on 802.11ac D2.0 + EID_VHTOperation = 192, // Based on 802.11ac D2.0 ++ EID_AID = 197, /* Based on 802.11ac D4.0 */ + EID_OpModeNotification = 199, // Based on 802.11ac D3.0 + }ELEMENT_ID, *PELEMENT_ID; + +@@ -933,6 +940,18 @@ typedef enum _HT_CAP_AMPDU_FACTOR { + MAX_AMPDU_FACTOR_64K = 3, + }HT_CAP_AMPDU_FACTOR; + ++ ++typedef enum _HT_CAP_AMPDU_DENSITY { ++ AMPDU_DENSITY_VALUE_0 = 0 , /* For no restriction */ ++ AMPDU_DENSITY_VALUE_1 = 1 , /* For 1/4 us */ ++ AMPDU_DENSITY_VALUE_2 = 2 , /* For 1/2 us */ ++ AMPDU_DENSITY_VALUE_3 = 3 , /* For 1 us */ ++ AMPDU_DENSITY_VALUE_4 = 4 , /* For 2 us */ ++ AMPDU_DENSITY_VALUE_5 = 5 , /* For 4 us */ ++ AMPDU_DENSITY_VALUE_6 = 6 , /* For 8 us */ ++ AMPDU_DENSITY_VALUE_7 = 7 , /* For 16 us */ ++} HT_CAP_AMPDU_DENSITY; ++ + /* 802.11n HT capabilities masks */ + #define IEEE80211_HT_CAP_LDPC_CODING 0x0001 + #define IEEE80211_HT_CAP_SUP_WIDTH 0x0002 +@@ -947,6 +966,7 @@ typedef enum _HT_CAP_AMPDU_FACTOR { + #define IEEE80211_HT_CAP_DELAY_BA 0x0400 + #define IEEE80211_HT_CAP_MAX_AMSDU 0x0800 + #define IEEE80211_HT_CAP_DSSSCCK40 0x1000 ++#define RTW_IEEE80211_HT_CAP_40MHZ_INTOLERANT ((u16) BIT(14)) + /* 802.11n HT capability AMPDU settings */ + #define IEEE80211_HT_CAP_AMPDU_FACTOR 0x03 + #define IEEE80211_HT_CAP_AMPDU_DENSITY 0x1C +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/wlan_bssdef.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/wlan_bssdef.h +old mode 100755 +new mode 100644 +index dac17a0..bd5237a +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/wlan_bssdef.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/wlan_bssdef.h +@@ -73,7 +73,7 @@ typedef struct _NDIS_802_11_CONFIGURATION + ULONG Length; // Length of structure + ULONG BeaconPeriod; // units are Kusec + ULONG ATIMWindow; // units are Kusec +- ULONG DSConfig; // Frequency, units are kHz ++ ULONG DSConfig; /* channel number */ + NDIS_802_11_CONFIGURATION_FH FHConfig; + } NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; + +@@ -85,7 +85,8 @@ typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE + Ndis802_11Infrastructure, + Ndis802_11AutoUnknown, + Ndis802_11InfrastructureMax, // Not a real value, defined as upper bound +- Ndis802_11APMode ++ Ndis802_11APMode, ++ Ndis802_11Monitor, + } NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE; + + +@@ -345,7 +346,7 @@ typedef struct _NDIS_802_11_CONFIGURATION + ULONG Length; // Length of structure + ULONG BeaconPeriod; // units are Kusec + ULONG ATIMWindow; // units are Kusec +- ULONG DSConfig; // Frequency, units are kHz ++ ULONG DSConfig; /* channel number */ + NDIS_802_11_CONFIGURATION_FH FHConfig; + } NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; + +@@ -622,6 +623,12 @@ WLAN_BSSID_EX, *PWLAN_BSSID_EX; + #pragma pack(pop) + #endif + ++#define BSS_EX_IES(bss_ex) ((bss_ex)->IEs) ++#define BSS_EX_IES_LEN(bss_ex) ((bss_ex)->IELength) ++#define BSS_EX_FIXED_IE_OFFSET(bss_ex) ((bss_ex)->Reserved[0] == 2 ? 0 : 12) ++#define BSS_EX_TLV_IES(bss_ex) (BSS_EX_IES((bss_ex)) + BSS_EX_FIXED_IE_OFFSET((bss_ex))) ++#define BSS_EX_TLV_IES_LEN(bss_ex) (BSS_EX_IES_LEN((bss_ex)) - BSS_EX_FIXED_IE_OFFSET((bss_ex))) ++ + __inline static uint get_WLAN_BSSID_EX_sz(WLAN_BSSID_EX *bss) + { + #if 0 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/xmit_osdep.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/xmit_osdep.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/custom_gpio_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/custom_gpio_linux.c +old mode 100755 +new mode 100644 +index 45606cd..418d793 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/custom_gpio_linux.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/custom_gpio_linux.c +@@ -71,7 +71,7 @@ int rtw_wifi_gpio_init(void) + gpio_request(GPIO_WIFI_POWER, "wifi_power"); + + #ifdef CONFIG_SDIO_HCI +-#if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) ++#if (defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) + if(rtw_mp_mode==1){ + DBG_871X("%s GPIO_BT_RESET pin special for mp_test\n", __func__); + if (GPIO_BT_RESET > 0) +@@ -94,7 +94,7 @@ int rtw_wifi_gpio_deinit(void) + gpio_free(GPIO_WIFI_POWER); + + #ifdef CONFIG_SDIO_HCI +-#if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) ++#if ( defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) + if(rtw_mp_mode==1){ + DBG_871X("%s GPIO_BT_RESET pin special for mp_test\n", __func__); + if (GPIO_BT_RESET > 0) +@@ -134,7 +134,7 @@ void rtw_wifi_gpio_wlan_ctrl(int onoff) + case WLAN_POWER_ON: + break; + #ifdef CONFIG_SDIO_HCI +-#if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) ++#if ( defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) + case WLAN_BT_PWDN_OFF: + if(rtw_mp_mode==1) + { +@@ -168,13 +168,13 @@ void rtw_wifi_gpio_wlan_ctrl(int onoff) + extern int sprd_3rdparty_gpio_wifi_power; + #endif + extern int sprd_3rdparty_gpio_wifi_pwd; +-#if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) ++#if defined(CONFIG_RTL8723B) + extern int sprd_3rdparty_gpio_bt_reset; + #endif + + int rtw_wifi_gpio_init(void) + { +-#if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) ++#if defined(CONFIG_RTL8723B) + if (sprd_3rdparty_gpio_bt_reset > 0) + gpio_direction_output(sprd_3rdparty_gpio_bt_reset, 1); + #endif +@@ -259,7 +259,7 @@ void rtw_wifi_gpio_wlan_ctrl(int onoff) + case WLAN_BT_PWDN_OFF: + DBG_8192C("%s: call customer specific GPIO to set bt power down pin to 0\n", + __FUNCTION__); +-#if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) ++#if defined(CONFIG_RTL8723B) + if (sprd_3rdparty_gpio_bt_reset > 0) + gpio_set_value(sprd_3rdparty_gpio_bt_reset, 0); + #endif +@@ -268,7 +268,7 @@ void rtw_wifi_gpio_wlan_ctrl(int onoff) + case WLAN_BT_PWDN_ON: + DBG_8192C("%s: callc customer specific GPIO to set bt power down pin to 1\n", + __FUNCTION__); +-#if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) ++#if defined(CONFIG_RTL8723B) + if (sprd_3rdparty_gpio_bt_reset > 0) + gpio_set_value(sprd_3rdparty_gpio_bt_reset, 1); + #endif +@@ -312,6 +312,37 @@ void rtw_wifi_gpio_wlan_ctrl(int onoff) + { + } + ++#ifdef CONFIG_GPIO_API ++//this is a demo for extending GPIO pin[7] as interrupt mode ++struct net_device * rtl_net; ++extern int rtw_register_gpio_interrupt(struct net_device *netdev, int gpio_num, void(*callback)(u8 level)); ++extern int rtw_disable_gpio_interrupt(struct net_device *netdev, int gpio_num); ++void gpio_int(u8 is_high) ++{ ++ DBG_8192C("%s level=%d\n",__func__, is_high); ++} ++int register_net_gpio_init(void) ++{ ++ rtl_net = dev_get_by_name(&init_net,"wlan0"); ++ if(!rtl_net) ++ { ++ DBG_871X_LEVEL(_drv_always_, "rtl_net init fail!\n"); ++ return -1; ++ } ++ return rtw_register_gpio_interrupt(rtl_net,7, gpio_int); ++} ++int unregister_net_gpio_init(void) ++{ ++ rtl_net = dev_get_by_name(&init_net,"wlan0"); ++ if(!rtl_net) ++ { ++ DBG_871X_LEVEL(_drv_always_, "rtl_net init fail!\n"); ++ return -1; ++ } ++ return rtw_disable_gpio_interrupt(rtl_net,7); ++} ++#endif ++ + #else + + int rtw_wifi_gpio_init(void) +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_cfg80211.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_cfg80211.c +old mode 100755 +new mode 100644 +index 029d918..4714dcc +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_cfg80211.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_cfg80211.c +@@ -1,6291 +1,6905 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#define _IOCTL_CFG80211_C_ +- +-#include +- +-#ifdef CONFIG_IOCTL_CFG80211 +- +-#include +- +-#define RTW_MAX_MGMT_TX_CNT (8) +- +-#define RTW_SCAN_IE_LEN_MAX 2304 +-#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 5000 //ms +-#define RTW_MAX_NUM_PMKIDS 4 +- +-#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ +- +-#ifdef CONFIG_WAPI_SUPPORT +- +-#ifndef WLAN_CIPHER_SUITE_SMS4 +-#define WLAN_CIPHER_SUITE_SMS4 0x00147201 +-#endif +- +-#ifndef WLAN_AKM_SUITE_WAPI_PSK +-#define WLAN_AKM_SUITE_WAPI_PSK 0x000FAC04 +-#endif +- +-#ifndef WLAN_AKM_SUITE_WAPI_CERT +-#define WLAN_AKM_SUITE_WAPI_CERT 0x000FAC12 +-#endif +- +-#ifndef NL80211_WAPI_VERSION_1 +-#define NL80211_WAPI_VERSION_1 (1 << 2) +-#endif +- +-#endif +- +-#ifdef CONFIG_PLATFORM_ARM_SUN8I +-#define BUSY_TRAFFIC_SCAN_DENY_PERIOD 8000 +-#else +-#define BUSY_TRAFFIC_SCAN_DENY_PERIOD 12000 +-#endif +- +-static const u32 rtw_cipher_suites[] = { +- WLAN_CIPHER_SUITE_WEP40, +- WLAN_CIPHER_SUITE_WEP104, +- WLAN_CIPHER_SUITE_TKIP, +- WLAN_CIPHER_SUITE_CCMP, +-#ifdef CONFIG_WAPI_SUPPORT +- WLAN_CIPHER_SUITE_SMS4, +-#endif // CONFIG_WAPI_SUPPORT +-#ifdef CONFIG_IEEE80211W +- WLAN_CIPHER_SUITE_AES_CMAC, +-#endif //CONFIG_IEEE80211W +-}; +- +-#define RATETAB_ENT(_rate, _rateid, _flags) \ +- { \ +- .bitrate = (_rate), \ +- .hw_value = (_rateid), \ +- .flags = (_flags), \ +- } +- +-#define CHAN2G(_channel, _freq, _flags) { \ +- .band = IEEE80211_BAND_2GHZ, \ +- .center_freq = (_freq), \ +- .hw_value = (_channel), \ +- .flags = (_flags), \ +- .max_antenna_gain = 0, \ +- .max_power = 30, \ +-} +- +-#define CHAN5G(_channel, _flags) { \ +- .band = IEEE80211_BAND_5GHZ, \ +- .center_freq = 5000 + (5 * (_channel)), \ +- .hw_value = (_channel), \ +- .flags = (_flags), \ +- .max_antenna_gain = 0, \ +- .max_power = 30, \ +-} +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) +-/* if wowlan is not supported, kernel generate a disconnect at each suspend +- * cf: /net/wireless/sysfs.c, so register a stub wowlan. +- * Moreover wowlan has to be enabled via a the nl80211_set_wowlan callback. +- * (from user space, e.g. iw phy0 wowlan enable) +- */ +-static const struct wiphy_wowlan_support wowlan_stub = { +- .flags = WIPHY_WOWLAN_ANY, +- .n_patterns = 0, +- .pattern_max_len = 0, +- .pattern_min_len = 0, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) +- .max_pkt_offset = 0, +-#endif +-}; +-#endif +- +-static struct ieee80211_rate rtw_rates[] = { +- RATETAB_ENT(10, 0x1, 0), +- RATETAB_ENT(20, 0x2, 0), +- RATETAB_ENT(55, 0x4, 0), +- RATETAB_ENT(110, 0x8, 0), +- RATETAB_ENT(60, 0x10, 0), +- RATETAB_ENT(90, 0x20, 0), +- RATETAB_ENT(120, 0x40, 0), +- RATETAB_ENT(180, 0x80, 0), +- RATETAB_ENT(240, 0x100, 0), +- RATETAB_ENT(360, 0x200, 0), +- RATETAB_ENT(480, 0x400, 0), +- RATETAB_ENT(540, 0x800, 0), +-}; +- +-#define rtw_a_rates (rtw_rates + 4) +-#define RTW_A_RATES_NUM 8 +-#define rtw_g_rates (rtw_rates + 0) +-#define RTW_G_RATES_NUM 12 +- +-#define RTW_2G_CHANNELS_NUM 14 +-#define RTW_5G_CHANNELS_NUM 37 +- +-static struct ieee80211_channel rtw_2ghz_channels[] = { +- CHAN2G(1, 2412, 0), +- CHAN2G(2, 2417, 0), +- CHAN2G(3, 2422, 0), +- CHAN2G(4, 2427, 0), +- CHAN2G(5, 2432, 0), +- CHAN2G(6, 2437, 0), +- CHAN2G(7, 2442, 0), +- CHAN2G(8, 2447, 0), +- CHAN2G(9, 2452, 0), +- CHAN2G(10, 2457, 0), +- CHAN2G(11, 2462, 0), +- CHAN2G(12, 2467, 0), +- CHAN2G(13, 2472, 0), +- CHAN2G(14, 2484, 0), +-}; +- +-static struct ieee80211_channel rtw_5ghz_a_channels[] = { +- CHAN5G(34, 0), CHAN5G(36, 0), +- CHAN5G(38, 0), CHAN5G(40, 0), +- CHAN5G(42, 0), CHAN5G(44, 0), +- CHAN5G(46, 0), CHAN5G(48, 0), +- CHAN5G(52, 0), CHAN5G(56, 0), +- CHAN5G(60, 0), CHAN5G(64, 0), +- CHAN5G(100, 0), CHAN5G(104, 0), +- CHAN5G(108, 0), CHAN5G(112, 0), +- CHAN5G(116, 0), CHAN5G(120, 0), +- CHAN5G(124, 0), CHAN5G(128, 0), +- CHAN5G(132, 0), CHAN5G(136, 0), +- CHAN5G(140, 0), CHAN5G(149, 0), +- CHAN5G(153, 0), CHAN5G(157, 0), +- CHAN5G(161, 0), CHAN5G(165, 0), +- CHAN5G(184, 0), CHAN5G(188, 0), +- CHAN5G(192, 0), CHAN5G(196, 0), +- CHAN5G(200, 0), CHAN5G(204, 0), +- CHAN5G(208, 0), CHAN5G(212, 0), +- CHAN5G(216, 0), +-}; +- +- +-void rtw_2g_channels_init(struct ieee80211_channel *channels) +-{ +- _rtw_memcpy((void*)channels, (void*)rtw_2ghz_channels, +- sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM +- ); +-} +- +-void rtw_5g_channels_init(struct ieee80211_channel *channels) +-{ +- _rtw_memcpy((void*)channels, (void*)rtw_5ghz_a_channels, +- sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM +- ); +-} +- +-void rtw_2g_rates_init(struct ieee80211_rate *rates) +-{ +- _rtw_memcpy(rates, rtw_g_rates, +- sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM +- ); +-} +- +-void rtw_5g_rates_init(struct ieee80211_rate *rates) +-{ +- _rtw_memcpy(rates, rtw_a_rates, +- sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM +- ); +-} +- +-struct ieee80211_supported_band *rtw_spt_band_alloc( +- enum ieee80211_band band +- ) +-{ +- struct ieee80211_supported_band *spt_band = NULL; +- int n_channels, n_bitrates; +- +- if(band == IEEE80211_BAND_2GHZ) +- { +- n_channels = RTW_2G_CHANNELS_NUM; +- n_bitrates = RTW_G_RATES_NUM; +- } +- else if(band == IEEE80211_BAND_5GHZ) +- { +- n_channels = RTW_5G_CHANNELS_NUM; +- n_bitrates = RTW_A_RATES_NUM; +- } +- else +- { +- goto exit; +- } +- +- spt_band = (struct ieee80211_supported_band *)rtw_zmalloc( +- sizeof(struct ieee80211_supported_band) +- + sizeof(struct ieee80211_channel)*n_channels +- + sizeof(struct ieee80211_rate)*n_bitrates +- ); +- if(!spt_band) +- goto exit; +- +- spt_band->channels = (struct ieee80211_channel*)(((u8*)spt_band)+sizeof(struct ieee80211_supported_band)); +- spt_band->bitrates= (struct ieee80211_rate*)(((u8*)spt_band->channels)+sizeof(struct ieee80211_channel)*n_channels); +- spt_band->band = band; +- spt_band->n_channels = n_channels; +- spt_band->n_bitrates = n_bitrates; +- +- if(band == IEEE80211_BAND_2GHZ) +- { +- rtw_2g_channels_init(spt_band->channels); +- rtw_2g_rates_init(spt_band->bitrates); +- } +- else if(band == IEEE80211_BAND_5GHZ) +- { +- rtw_5g_channels_init(spt_band->channels); +- rtw_5g_rates_init(spt_band->bitrates); +- } +- +- //spt_band.ht_cap +- +-exit: +- +- return spt_band; +-} +- +-void rtw_spt_band_free(struct ieee80211_supported_band *spt_band) +-{ +- u32 size = 0; +- +- if(!spt_band) +- return; +- +- if(spt_band->band == IEEE80211_BAND_2GHZ) +- { +- size = sizeof(struct ieee80211_supported_band) +- + sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM +- + sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM; +- } +- else if(spt_band->band == IEEE80211_BAND_5GHZ) +- { +- size = sizeof(struct ieee80211_supported_band) +- + sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM +- + sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM; +- } +- else +- { +- +- } +- rtw_mfree((u8*)spt_band, size); +-} +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +-static const struct ieee80211_txrx_stypes +-rtw_cfg80211_default_mgmt_stypes[NUM_NL80211_IFTYPES] = { +- [NL80211_IFTYPE_ADHOC] = { +- .tx = 0xffff, +- .rx = BIT(IEEE80211_STYPE_ACTION >> 4) +- }, +- [NL80211_IFTYPE_STATION] = { +- .tx = 0xffff, +- .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | +- BIT(IEEE80211_STYPE_PROBE_REQ >> 4) +- }, +- [NL80211_IFTYPE_AP] = { +- .tx = 0xffff, +- .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | +- BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | +- BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | +- BIT(IEEE80211_STYPE_DISASSOC >> 4) | +- BIT(IEEE80211_STYPE_AUTH >> 4) | +- BIT(IEEE80211_STYPE_DEAUTH >> 4) | +- BIT(IEEE80211_STYPE_ACTION >> 4) +- }, +- [NL80211_IFTYPE_AP_VLAN] = { +- /* copy AP */ +- .tx = 0xffff, +- .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | +- BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | +- BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | +- BIT(IEEE80211_STYPE_DISASSOC >> 4) | +- BIT(IEEE80211_STYPE_AUTH >> 4) | +- BIT(IEEE80211_STYPE_DEAUTH >> 4) | +- BIT(IEEE80211_STYPE_ACTION >> 4) +- }, +- [NL80211_IFTYPE_P2P_CLIENT] = { +- .tx = 0xffff, +- .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | +- BIT(IEEE80211_STYPE_PROBE_REQ >> 4) +- }, +- [NL80211_IFTYPE_P2P_GO] = { +- .tx = 0xffff, +- .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | +- BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | +- BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | +- BIT(IEEE80211_STYPE_DISASSOC >> 4) | +- BIT(IEEE80211_STYPE_AUTH >> 4) | +- BIT(IEEE80211_STYPE_DEAUTH >> 4) | +- BIT(IEEE80211_STYPE_ACTION >> 4) +- }, +-}; +-#endif +- +-static int rtw_ieee80211_channel_to_frequency(int chan, int band) +-{ +- /* see 802.11 17.3.8.3.2 and Annex J +- * there are overlapping channel numbers in 5GHz and 2GHz bands */ +- +- if (band == IEEE80211_BAND_5GHZ) { +- if (chan >= 182 && chan <= 196) +- return 4000 + chan * 5; +- else +- return 5000 + chan * 5; +- } else { /* IEEE80211_BAND_2GHZ */ +- if (chan == 14) +- return 2484; +- else if (chan < 14) +- return 2407 + chan * 5; +- else +- return 0; /* not supported */ +- } +-} +- +-static u64 rtw_get_systime_us(void) +-{ +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,39)) +- struct timespec ts; +- get_monotonic_boottime(&ts); +- return ((u64)ts.tv_sec*1000000) + ts.tv_nsec / 1000; +-#else +- struct timeval tv; +- do_gettimeofday(&tv); +- return ((u64)tv.tv_sec*1000000) + tv.tv_usec; +-#endif +-} +- +-#define MAX_BSSINFO_LEN 1000 +-struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork) +-{ +- struct ieee80211_channel *notify_channel; +- struct cfg80211_bss *bss = NULL; +- //struct ieee80211_supported_band *band; +- u16 channel; +- u32 freq; +- u64 notify_timestamp; +- u16 notify_capability; +- u16 notify_interval; +- u8 *notify_ie; +- size_t notify_ielen; +- s32 notify_signal; +- //u8 buf[MAX_BSSINFO_LEN]; +- +- u8 *pbuf; +- size_t buf_size = MAX_BSSINFO_LEN; +- size_t len,bssinf_len=0; +- struct rtw_ieee80211_hdr *pwlanhdr; +- unsigned short *fctrl; +- u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; +- +- struct wireless_dev *wdev = padapter->rtw_wdev; +- struct wiphy *wiphy = wdev->wiphy; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- +- pbuf = rtw_zmalloc(buf_size); +- if(pbuf == NULL){ +- DBG_871X("%s pbuf allocate failed !! \n",__FUNCTION__); +- return bss; +- } +- +- //DBG_8192C("%s\n", __func__); +- +- bssinf_len = pnetwork->network.IELength+sizeof (struct rtw_ieee80211_hdr_3addr); +- if(bssinf_len > buf_size){ +- DBG_871X("%s IE Length too long > %zu byte \n",__FUNCTION__,buf_size); +- goto exit; +- } +- +-#ifndef CONFIG_WAPI_SUPPORT +- { +- u16 wapi_len = 0; +- +- if(rtw_get_wapi_ie(pnetwork->network.IEs, pnetwork->network.IELength, NULL, &wapi_len)>0) +- { +- if(wapi_len > 0) +- { +- DBG_871X("%s, no support wapi!\n",__FUNCTION__); +- goto exit; +- } +- } +- } +-#endif //!CONFIG_WAPI_SUPPORT +- +- //To reduce PBC Overlap rate +- //_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); +- if(adapter_wdev_data(padapter)->scan_request != NULL) +- { +- u8 *psr=NULL, sr = 0; +- NDIS_802_11_SSID *pssid = &pnetwork->network.Ssid; +- struct cfg80211_scan_request *request = adapter_wdev_data(padapter)->scan_request; +- struct cfg80211_ssid *ssids = request->ssids; +- u32 wpsielen=0; +- u8 *wpsie=NULL; +- +- wpsie = rtw_get_wps_ie(pnetwork->network.IEs+_FIXED_IE_LENGTH_, pnetwork->network.IELength-_FIXED_IE_LENGTH_, NULL, &wpsielen); +- +- if(wpsie && wpsielen>0) +- psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); +- +- if (sr != 0) +- { +- if(request->n_ssids == 1 && request->n_channels == 1) // it means under processing WPS +- { +- DBG_8192C("ssid=%s, len=%d\n", pssid->Ssid, pssid->SsidLength); +- +- if (ssids[0].ssid_len == 0) { +- } +- else if(pssid->SsidLength == ssids[0].ssid_len && +- _rtw_memcmp(pssid->Ssid, ssids[0].ssid, ssids[0].ssid_len)) +- { +- DBG_871X("%s, got sr and ssid match!\n", __func__); +- } +- else +- { +- if(psr !=NULL) +- *psr = 0; //clear sr +- +-#if 0 +- WLAN_BSSID_EX *pselect_network = &pnetwork->network; +- struct cfg80211_bss *pselect_bss = NULL; +- struct ieee80211_channel *notify_channel = NULL; +- u32 freq; +- +- DBG_871X("%s, got sr, but ssid mismatch, to remove this bss\n", __func__); +- +- if (pselect_network->Configuration.DSConfig <= RTW_CH_MAX_2G_CHANNEL) +- freq = rtw_ieee80211_channel_to_frequency(pselect_network->Configuration.DSConfig, IEEE80211_BAND_2GHZ); +- else +- freq = rtw_ieee80211_channel_to_frequency(pselect_network->Configuration.DSConfig, IEEE80211_BAND_5GHZ); +- +- notify_channel = ieee80211_get_channel(wiphy, freq); +- pselect_bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, +- pselect_network->MacAddress, pselect_network->Ssid.Ssid, +- pselect_network->Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, +- 0/*WLAN_CAPABILITY_ESS*/); +- +- if(pselect_bss) +- { +- DBG_871X("%s, got bss for cfg80211 for unlinking bss\n", __func__); +- +- cfg80211_unlink_bss(wiphy, pselect_bss); +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) +- cfg80211_put_bss(wiphy, pselect_bss); +-#else +- cfg80211_put_bss(pselect_bss); +-#endif +- +- } +- +- goto exit; +-#endif +- } +- } +- } +- } +- //_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); +- +- +- channel = pnetwork->network.Configuration.DSConfig; +- if (channel <= RTW_CH_MAX_2G_CHANNEL) +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); +- else +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); +- +- notify_channel = ieee80211_get_channel(wiphy, freq); +- +- if (0) +- notify_timestamp = le64_to_cpu(*(u64*)rtw_get_timestampe_from_ie(pnetwork->network.IEs)); +- else +- notify_timestamp = rtw_get_systime_us(); +- +- notify_interval = le16_to_cpu(*(u16*)rtw_get_beacon_interval_from_ie(pnetwork->network.IEs)); +- notify_capability = le16_to_cpu(*(u16*)rtw_get_capability_from_ie(pnetwork->network.IEs)); +- +- notify_ie = pnetwork->network.IEs+_FIXED_IE_LENGTH_; +- notify_ielen = pnetwork->network.IELength-_FIXED_IE_LENGTH_; +- +- //We've set wiphy's signal_type as CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) +- if ( check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE && +- is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)) { +- notify_signal = 100*translate_percentage_to_dbm(padapter->recvpriv.signal_strength);//dbm +- } else { +- notify_signal = 100*translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm +- } +- +- #if 0 +- DBG_8192C("bssid: "MAC_FMT"\n", MAC_ARG(pnetwork->network.MacAddress)); +- DBG_8192C("Channel: %d(%d)\n", channel, freq); +- DBG_8192C("Capability: %X\n", notify_capability); +- DBG_8192C("Beacon interval: %d\n", notify_interval); +- DBG_8192C("Signal: %d\n", notify_signal); +- DBG_8192C("notify_timestamp: %llu\n", notify_timestamp); +- #endif +- +- //pbuf = buf; +- +- pwlanhdr = (struct rtw_ieee80211_hdr *)pbuf; +- fctrl = &(pwlanhdr->frame_ctl); +- *(fctrl) = 0; +- +- SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); +- //pmlmeext->mgnt_seq++; +- +- if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON +- _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); +- SetFrameSubType(pbuf, WIFI_BEACON); +- } else { +- _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); +- SetFrameSubType(pbuf, WIFI_PROBERSP); +- } +- +- _rtw_memcpy(pwlanhdr->addr2, pnetwork->network.MacAddress, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, pnetwork->network.MacAddress, ETH_ALEN); +- +- +- //pbuf += sizeof(struct rtw_ieee80211_hdr_3addr); +- len = sizeof (struct rtw_ieee80211_hdr_3addr); +- _rtw_memcpy((pbuf+len), pnetwork->network.IEs, pnetwork->network.IELength); +- *((u64*)(pbuf+len)) = cpu_to_le64(notify_timestamp); +- +- len += pnetwork->network.IELength; +- +- //#ifdef CONFIG_P2P +- //if(rtw_get_p2p_ie(pnetwork->network.IEs+12, pnetwork->network.IELength-12, NULL, NULL)) +- //{ +- // DBG_8192C("%s, got p2p_ie\n", __func__); +- //} +- //#endif +- +-#if 1 +- bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)pbuf, +- len, notify_signal, GFP_ATOMIC); +-#else +- +- bss = cfg80211_inform_bss(wiphy, notify_channel, (const u8 *)pnetwork->network.MacAddress, +- notify_timestamp, notify_capability, notify_interval, notify_ie, +- notify_ielen, notify_signal, GFP_ATOMIC/*GFP_KERNEL*/); +-#endif +- +- if (unlikely(!bss)) { +- DBG_8192C(FUNC_ADPT_FMT" bss NULL\n", FUNC_ADPT_ARG(padapter)); +- goto exit; +- } +- +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38)) +-#ifndef COMPAT_KERNEL_RELEASE +- //patch for cfg80211, update beacon ies to information_elements +- if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON +- +- if(bss->len_information_elements != bss->len_beacon_ies) +- { +- bss->information_elements = bss->beacon_ies; +- bss->len_information_elements = bss->len_beacon_ies; +- } +- } +-#endif //COMPAT_KERNEL_RELEASE +-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) +- +-/* +- { +- if( bss->information_elements == bss->proberesp_ies) +- { +- if( bss->len_information_elements != bss->len_proberesp_ies) +- { +- DBG_8192C("error!, len_information_elements != bss->len_proberesp_ies\n"); +- } +- +- } +- else if(bss->len_information_elements < bss->len_beacon_ies) +- { +- bss->information_elements = bss->beacon_ies; +- bss->len_information_elements = bss->len_beacon_ies; +- } +- } +-*/ +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) +- cfg80211_put_bss(wiphy, bss); +-#else +- cfg80211_put_bss(bss); +-#endif +- +-exit: +- if(pbuf) +- rtw_mfree(pbuf, buf_size); +- return bss; +- +-} +- +-/* +- Check the given bss is valid by kernel API cfg80211_get_bss() +- @padapter : the given adapter +- +- return _TRUE if bss is valid, _FALSE for not found. +-*/ +-int rtw_cfg80211_check_bss(_adapter *padapter) +-{ +- WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); +- struct cfg80211_bss *bss = NULL; +- struct ieee80211_channel *notify_channel = NULL; +- u32 freq; +- +- if (!(pnetwork) || !(padapter->rtw_wdev)) +- return _FALSE; +- +- if (pnetwork->Configuration.DSConfig <= RTW_CH_MAX_2G_CHANNEL) +- freq = rtw_ieee80211_channel_to_frequency(pnetwork->Configuration.DSConfig, IEEE80211_BAND_2GHZ); +- else +- freq = rtw_ieee80211_channel_to_frequency(pnetwork->Configuration.DSConfig, IEEE80211_BAND_5GHZ); +- +- notify_channel = ieee80211_get_channel(padapter->rtw_wdev->wiphy, freq); +- bss = cfg80211_get_bss(padapter->rtw_wdev->wiphy, notify_channel, +- pnetwork->MacAddress, pnetwork->Ssid.Ssid, +- pnetwork->Ssid.SsidLength, +- WLAN_CAPABILITY_ESS, WLAN_CAPABILITY_ESS); +- +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) +- cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); +-#else +- cfg80211_put_bss(bss); +-#endif +- +- return (bss!=NULL); +-} +- +-void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter) +-{ +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct wlan_network *cur_network = &(pmlmepriv->cur_network); +- struct wireless_dev *pwdev = padapter->rtw_wdev; +- struct cfg80211_bss *bss = NULL; +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) +- struct wiphy *wiphy = pwdev->wiphy; +- int freq = (int)cur_network->network.Configuration.DSConfig; +- struct ieee80211_channel *chan; +-#endif +- +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); +- if (pwdev->iftype != NL80211_IFTYPE_ADHOC) +- { +- return; +- } +- +- if (!rtw_cfg80211_check_bss(padapter)) { +- WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); +- struct wlan_network *scanned = pmlmepriv->cur_network_scanned; +- +- if(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE) +- { +- +- _rtw_memcpy(&cur_network->network, pnetwork, sizeof(WLAN_BSSID_EX)); +- if(cur_network) +- { +- if (!rtw_cfg80211_inform_bss(padapter,cur_network)) +- DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); +- else +- DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); +- } +- else +- { +- DBG_871X("cur_network is not exist!!!\n"); +- return ; +- } +- } +- else +- { +- if(scanned == NULL) +- rtw_warn_on(1); +- +- if (_rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE +- && _rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE +- ) { +- if (!rtw_cfg80211_inform_bss(padapter,scanned)) { +- DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); +- } else { +- //DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); +- } +- } else { +- DBG_871X("scanned & pnetwork compare fail\n"); +- rtw_warn_on(1); +- } +- } +- +- if (!rtw_cfg80211_check_bss(padapter)) +- DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); +- } +- //notify cfg80211 that device joined an IBSS +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) +- chan = ieee80211_get_channel(wiphy, freq); +- cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, chan, GFP_ATOMIC); +-#else +- cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, GFP_ATOMIC); +-#endif +-} +- +-void rtw_cfg80211_indicate_connect(_adapter *padapter) +-{ +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct wlan_network *cur_network = &(pmlmepriv->cur_network); +- struct wireless_dev *pwdev = padapter->rtw_wdev; +-#ifdef CONFIG_P2P +- struct wifidirect_info *pwdinfo= &(padapter->wdinfo); +-#endif +- struct cfg80211_bss *bss = NULL; +- +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); +- if (pwdev->iftype != NL80211_IFTYPE_STATION +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT +- #endif +- ) { +- return; +- } +- +- if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) +- return; +- +-#ifdef CONFIG_P2P +- if(pwdinfo->driver_interface == DRIVER_CFG80211 ) +- { +- if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) +- { +- rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); +- rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); +- rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); +- DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); +- } +- } +-#endif //CONFIG_P2P +- +- { +- WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); +- struct wlan_network *scanned = pmlmepriv->cur_network_scanned; +- +- //DBG_871X(FUNC_ADPT_FMT" BSS not found\n", FUNC_ADPT_ARG(padapter)); +- +- if(scanned == NULL) { +- rtw_warn_on(1); +- goto check_bss; +- } +- +- if (_rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE +- && _rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE +- ) { +- if (!rtw_cfg80211_inform_bss(padapter,scanned)) { +- DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); +- } else { +- //DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); +- } +- } else { +- DBG_871X("scanned: %s("MAC_FMT"), cur: %s("MAC_FMT")\n", +- scanned->network.Ssid.Ssid, MAC_ARG(scanned->network.MacAddress), +- pnetwork->Ssid.Ssid, MAC_ARG(pnetwork->MacAddress) +- ); +- rtw_warn_on(1); +- } +- } +- +-check_bss: +- if (!rtw_cfg80211_check_bss(padapter)) +- DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); +- +- if (rtw_to_roam(padapter) > 0) { +- #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) +- struct wiphy *wiphy = pwdev->wiphy; +- struct ieee80211_channel *notify_channel; +- u32 freq; +- u16 channel = cur_network->network.Configuration.DSConfig; +- +- if (channel <= RTW_CH_MAX_2G_CHANNEL) +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); +- else +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); +- +- notify_channel = ieee80211_get_channel(wiphy, freq); +- #endif +- +- DBG_871X(FUNC_ADPT_FMT" call cfg80211_roamed\n", FUNC_ADPT_ARG(padapter)); +- cfg80211_roamed(padapter->pnetdev +- #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) +- , notify_channel +- #endif +- , cur_network->network.MacAddress +- , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 +- , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 +- , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 +- , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 +- , GFP_ATOMIC); +- } +- else +- { +- #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) +- DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); +- #endif +- cfg80211_connect_result(padapter->pnetdev, cur_network->network.MacAddress +- , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 +- , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 +- , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 +- , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 +- , WLAN_STATUS_SUCCESS, GFP_ATOMIC); +- #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) +- DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); +- #endif +- } +-} +- +-void rtw_cfg80211_indicate_disconnect(_adapter *padapter) +-{ +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct wireless_dev *pwdev = padapter->rtw_wdev; +-#ifdef CONFIG_P2P +- struct wifidirect_info *pwdinfo= &(padapter->wdinfo); +-#endif +- +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); +- +- if (pwdev->iftype != NL80211_IFTYPE_STATION +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT +- #endif +- ) { +- return; +- } +- +- if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) +- return; +- +-#ifdef CONFIG_P2P +- if( pwdinfo->driver_interface == DRIVER_CFG80211 ) +- { +- if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) +- { +- rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); +- rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); +- +- DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); +- } +- } +-#endif //CONFIG_P2P +- +- if (!padapter->mlmepriv.not_indic_disco) { +- #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) +- DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); +- +- if(pwdev->sme_state==CFG80211_SME_CONNECTING) +- cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, +- WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); +- else if(pwdev->sme_state==CFG80211_SME_CONNECTED) +- cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC); +- //else +- //DBG_8192C("pwdev->sme_state=%d\n", pwdev->sme_state); +- +- DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); +- #else +- +- if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) +- cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC); +- else +- cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, +- WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); +- #endif +- } +-} +- +- +-#ifdef CONFIG_AP_MODE +-static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) +-{ +- int ret = 0; +- u32 wep_key_idx, wep_key_len,wep_total_len; +- struct sta_info *psta = NULL, *pbcmc_sta = NULL; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct security_priv* psecuritypriv=&(padapter->securitypriv); +- struct sta_priv *pstapriv = &padapter->stapriv; +- +- DBG_8192C("%s\n", __FUNCTION__); +- +- param->u.crypt.err = 0; +- param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; +- +- //sizeof(struct ieee_param) = 64 bytes; +- //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) +- if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) +- { +- ret = -EINVAL; +- goto exit; +- } +- +- if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && +- param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && +- param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) +- { +- if (param->u.crypt.idx >= WEP_KEYS) +- { +- ret = -EINVAL; +- goto exit; +- } +- } +- else +- { +- psta = rtw_get_stainfo(pstapriv, param->sta_addr); +- if(!psta) +- { +- //ret = -EINVAL; +- DBG_8192C("rtw_set_encryption(), sta has already been removed or never been added\n"); +- goto exit; +- } +- } +- +- if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) +- { +- //todo:clear default encryption keys +- +- DBG_8192C("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); +- +- goto exit; +- } +- +- +- if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) +- { +- DBG_8192C("r871x_set_encryption, crypt.alg = WEP\n"); +- +- wep_key_idx = param->u.crypt.idx; +- wep_key_len = param->u.crypt.key_len; +- +- DBG_8192C("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); +- +- if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) +- { +- ret = -EINVAL; +- goto exit; +- } +- +- if (wep_key_len > 0) +- { +- wep_key_len = wep_key_len <= 5 ? 5 : 13; +- } +- +- if (psecuritypriv->bWepDefaultKeyIdxSet == 0) +- { +- //wep default key has not been set, so use this key index as default key. +- +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; +- psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; +- psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; +- psecuritypriv->dot118021XGrpPrivacy=_WEP40_; +- +- if(wep_key_len == 13) +- { +- psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; +- psecuritypriv->dot118021XGrpPrivacy=_WEP104_; +- } +- +- psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; +- } +- +- _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); +- +- psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; +- +- rtw_ap_set_wep_key(padapter, param->u.crypt.key, wep_key_len, wep_key_idx, 1); +- +- goto exit; +- +- } +- +- +- if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key +- { +- if(param->u.crypt.set_tx == 0) //group key +- { +- if(strcmp(param->u.crypt.alg, "WEP") == 0) +- { +- DBG_8192C("%s, set group_key, WEP\n", __FUNCTION__); +- +- _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); +- +- psecuritypriv->dot118021XGrpPrivacy = _WEP40_; +- if(param->u.crypt.key_len==13) +- { +- psecuritypriv->dot118021XGrpPrivacy = _WEP104_; +- } +- +- } +- else if(strcmp(param->u.crypt.alg, "TKIP") == 0) +- { +- DBG_8192C("%s, set group_key, TKIP\n", __FUNCTION__); +- +- psecuritypriv->dot118021XGrpPrivacy = _TKIP_; +- +- _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); +- +- //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); +- //set mic key +- _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); +- _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); +- +- psecuritypriv->busetkipkey = _TRUE; +- +- } +- else if(strcmp(param->u.crypt.alg, "CCMP") == 0) +- { +- DBG_8192C("%s, set group_key, CCMP\n", __FUNCTION__); +- +- psecuritypriv->dot118021XGrpPrivacy = _AES_; +- +- _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); +- } +- else +- { +- DBG_8192C("%s, set group_key, none\n", __FUNCTION__); +- +- psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; +- } +- +- psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; +- +- psecuritypriv->binstallGrpkey = _TRUE; +- +- psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! +- +- rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); +- +- pbcmc_sta=rtw_get_bcmc_stainfo(padapter); +- if(pbcmc_sta) +- { +- pbcmc_sta->ieee8021x_blocked = _FALSE; +- pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy +- } +- +- } +- +- goto exit; +- +- } +- +- if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x +- { +- if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) +- { +- if(param->u.crypt.set_tx ==1) //pairwise key +- { +- _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); +- +- if(strcmp(param->u.crypt.alg, "WEP") == 0) +- { +- DBG_8192C("%s, set pairwise key, WEP\n", __FUNCTION__); +- +- psta->dot118021XPrivacy = _WEP40_; +- if(param->u.crypt.key_len==13) +- { +- psta->dot118021XPrivacy = _WEP104_; +- } +- } +- else if(strcmp(param->u.crypt.alg, "TKIP") == 0) +- { +- DBG_8192C("%s, set pairwise key, TKIP\n", __FUNCTION__); +- +- psta->dot118021XPrivacy = _TKIP_; +- +- //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); +- //set mic key +- _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); +- _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); +- +- psecuritypriv->busetkipkey = _TRUE; +- +- } +- else if(strcmp(param->u.crypt.alg, "CCMP") == 0) +- { +- +- DBG_8192C("%s, set pairwise key, CCMP\n", __FUNCTION__); +- +- psta->dot118021XPrivacy = _AES_; +- } +- else +- { +- DBG_8192C("%s, set pairwise key, none\n", __FUNCTION__); +- +- psta->dot118021XPrivacy = _NO_PRIVACY_; +- } +- +- rtw_ap_set_pairwise_key(padapter, psta); +- +- psta->ieee8021x_blocked = _FALSE; +- +- psta->bpairwise_key_installed = _TRUE; +- +- } +- else//group key??? +- { +- if(strcmp(param->u.crypt.alg, "WEP") == 0) +- { +- _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); +- +- psecuritypriv->dot118021XGrpPrivacy = _WEP40_; +- if(param->u.crypt.key_len==13) +- { +- psecuritypriv->dot118021XGrpPrivacy = _WEP104_; +- } +- } +- else if(strcmp(param->u.crypt.alg, "TKIP") == 0) +- { +- psecuritypriv->dot118021XGrpPrivacy = _TKIP_; +- +- _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); +- +- //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); +- //set mic key +- _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); +- _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); +- +- psecuritypriv->busetkipkey = _TRUE; +- +- } +- else if(strcmp(param->u.crypt.alg, "CCMP") == 0) +- { +- psecuritypriv->dot118021XGrpPrivacy = _AES_; +- +- _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); +- } +- else +- { +- psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; +- } +- +- psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; +- +- psecuritypriv->binstallGrpkey = _TRUE; +- +- psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! +- +- rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); +- +- pbcmc_sta=rtw_get_bcmc_stainfo(padapter); +- if(pbcmc_sta) +- { +- pbcmc_sta->ieee8021x_blocked = _FALSE; +- pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy +- } +- +- } +- +- } +- +- } +- +-exit: +- +- return ret; +- +-} +-#endif +- +-static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) +-{ +- int ret = 0; +- u32 wep_key_idx, wep_key_len,wep_total_len; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct security_priv *psecuritypriv = &padapter->securitypriv; +-#ifdef CONFIG_P2P +- struct wifidirect_info* pwdinfo = &padapter->wdinfo; +-#endif //CONFIG_P2P +- +-_func_enter_; +- +- DBG_8192C("%s\n", __func__); +- +- param->u.crypt.err = 0; +- param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; +- +- if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) +- { +- ret = -EINVAL; +- goto exit; +- } +- +- if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && +- param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && +- param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) +- { +- if (param->u.crypt.idx >= WEP_KEYS +-#ifdef CONFIG_IEEE80211W +- && param->u.crypt.idx > BIP_MAX_KEYID +-#endif //CONFIG_IEEE80211W +- ) +- { +- ret = -EINVAL; +- goto exit; +- } +- } else { +-#ifdef CONFIG_WAPI_SUPPORT +- if (strcmp(param->u.crypt.alg, "SMS4")) +-#endif +- { +- ret = -EINVAL; +- goto exit; +- } +- } +- +- if (strcmp(param->u.crypt.alg, "WEP") == 0) +- { +- RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); +- DBG_8192C("wpa_set_encryption, crypt.alg = WEP\n"); +- +- wep_key_idx = param->u.crypt.idx; +- wep_key_len = param->u.crypt.key_len; +- +- if ((wep_key_idx > WEP_KEYS) || (wep_key_len <= 0)) +- { +- ret = -EINVAL; +- goto exit; +- } +- +- if (psecuritypriv->bWepDefaultKeyIdxSet == 0) +- { +- //wep default key has not been set, so use this key index as default key. +- +- wep_key_len = wep_key_len <= 5 ? 5 : 13; +- +- psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; +- psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; +- psecuritypriv->dot118021XGrpPrivacy = _WEP40_; +- +- if(wep_key_len==13) +- { +- psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; +- psecuritypriv->dot118021XGrpPrivacy = _WEP104_; +- } +- +- psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; +- } +- +- _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); +- +- psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; +- +- rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0, _TRUE); +- +- goto exit; +- } +- +- if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x +- { +- struct sta_info * psta,*pbcmc_sta; +- struct sta_priv * pstapriv = &padapter->stapriv; +- +- //DBG_8192C("%s, : dot11AuthAlgrthm == dot11AuthAlgrthm_8021X \n", __func__); +- +- if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode +- { +- psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); +- if (psta == NULL) { +- //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); +- DBG_8192C("%s, : Obtain Sta_info fail \n", __func__); +- } +- else +- { +- //Jeff: don't disable ieee8021x_blocked while clearing key +- if (strcmp(param->u.crypt.alg, "none") != 0) +- psta->ieee8021x_blocked = _FALSE; +- +- +- if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| +- (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) +- { +- psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; +- } +- +- if(param->u.crypt.set_tx ==1)//pairwise key +- { +- +- DBG_8192C("%s, : param->u.crypt.set_tx ==1 \n", __func__); +- +- _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); +- +- if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key +- { +- //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); +- _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); +- _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); +- +- padapter->securitypriv.busetkipkey=_FALSE; +- //_set_timer(&padapter->securitypriv.tkip_timer, 50); +- } +- +- //DEBUG_ERR((" param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); +- DBG_871X(" ~~~~set sta key:unicastkey\n"); +- +- rtw_setstakey_cmd(padapter, psta, _TRUE, _TRUE); +- } +- else//group key +- { +- if(strcmp(param->u.crypt.alg, "TKIP") == 0 || strcmp(param->u.crypt.alg, "CCMP") == 0) +- { +- _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); +- _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); +- _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); +- padapter->securitypriv.binstallGrpkey = _TRUE; +- //DEBUG_ERR((" param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); +- DBG_871X(" ~~~~set sta key:groupkey\n"); +- +- padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; +- rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1, _TRUE); +- } +-#ifdef CONFIG_IEEE80211W +- else if(strcmp(param->u.crypt.alg, "BIP") == 0) +- { +- int no; +- //DBG_871X("BIP key_len=%d , index=%d @@@@@@@@@@@@@@@@@@\n", param->u.crypt.key_len, param->u.crypt.idx); +- //save the IGTK key, length 16 bytes +- _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); +- /*DBG_871X("IGTK key below:\n"); +- for(no=0;no<16;no++) +- printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); +- DBG_871X("\n");*/ +- padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; +- padapter->securitypriv.binstallBIPkey = _TRUE; +- DBG_871X(" ~~~~set sta key:IGKT\n"); +- } +-#endif //CONFIG_IEEE80211W +- +-#ifdef CONFIG_P2P +- if(pwdinfo->driver_interface == DRIVER_CFG80211 ) +- { +- if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) +- { +- rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); +- } +- } +-#endif //CONFIG_P2P +- +- } +- } +- +- pbcmc_sta=rtw_get_bcmc_stainfo(padapter); +- if(pbcmc_sta==NULL) +- { +- //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); +- } +- else +- { +- //Jeff: don't disable ieee8021x_blocked while clearing key +- if (strcmp(param->u.crypt.alg, "none") != 0) +- pbcmc_sta->ieee8021x_blocked = _FALSE; +- +- if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| +- (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) +- { +- pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; +- } +- } +- } +- else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode +- { +- } +- } +- +-#ifdef CONFIG_WAPI_SUPPORT +- if (strcmp(param->u.crypt.alg, "SMS4") == 0) +- { +- PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; +- PRT_WAPI_STA_INFO pWapiSta; +- u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; +- u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; +- u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; +- +- if(param->u.crypt.set_tx == 1) +- { +- list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { +- if(_rtw_memcmp(pWapiSta->PeerMacAddr,param->sta_addr,6)) +- { +- _rtw_memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); +- +- pWapiSta->wapiUsk.bSet = true; +- _rtw_memcpy(pWapiSta->wapiUsk.dataKey,param->u.crypt.key,16); +- _rtw_memcpy(pWapiSta->wapiUsk.micKey,param->u.crypt.key+16,16); +- pWapiSta->wapiUsk.keyId = param->u.crypt.idx ; +- pWapiSta->wapiUsk.bTxEnable = true; +- +- _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16); +- _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16); +- _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16); +- _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16); +- _rtw_memcpy(pWapiSta->lastRxUnicastPN,WapiAEPNInitialValueSrc,16); +- pWapiSta->wapiUskUpdate.bTxEnable = false; +- pWapiSta->wapiUskUpdate.bSet = false; +- +- if (psecuritypriv->sw_encrypt== false || psecuritypriv->sw_decrypt == false) +- { +- //set unicast key for ASUE +- rtw_wapi_set_key(padapter, &pWapiSta->wapiUsk, pWapiSta, false, false); +- } +- } +- } +- } +- else +- { +- list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { +- if(_rtw_memcmp(pWapiSta->PeerMacAddr,get_bssid(pmlmepriv),6)) +- { +- pWapiSta->wapiMsk.bSet = true; +- _rtw_memcpy(pWapiSta->wapiMsk.dataKey,param->u.crypt.key,16); +- _rtw_memcpy(pWapiSta->wapiMsk.micKey,param->u.crypt.key+16,16); +- pWapiSta->wapiMsk.keyId = param->u.crypt.idx ; +- pWapiSta->wapiMsk.bTxEnable = false; +- if(!pWapiSta->bSetkeyOk) +- pWapiSta->bSetkeyOk = true; +- pWapiSta->bAuthenticateInProgress = false; +- +- _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); +- +- if (psecuritypriv->sw_decrypt == false) +- { +- //set rx broadcast key for ASUE +- rtw_wapi_set_key(padapter, &pWapiSta->wapiMsk, pWapiSta, true, false); +- } +- } +- +- } +- } +- } +-#endif +- +- +-exit: +- +- DBG_8192C("%s, ret=%d\n", __func__, ret); +- +- _func_exit_; +- +- return ret; +-} +- +-static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- u8 key_index, bool pairwise, const u8 *mac_addr, +-#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +- u8 key_index, const u8 *mac_addr, +-#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +- struct key_params *params) +-{ +- char *alg_name; +- u32 param_len; +- struct ieee_param *param = NULL; +- int ret=0; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct wireless_dev *rtw_wdev = padapter->rtw_wdev; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- +- DBG_871X(FUNC_NDEV_FMT" adding key for %pM\n", FUNC_NDEV_ARG(ndev), mac_addr); +- DBG_871X("cipher=0x%x\n", params->cipher); +- DBG_871X("key_len=0x%x\n", params->key_len); +- DBG_871X("seq_len=0x%x\n", params->seq_len); +- DBG_871X("key_index=%d\n", key_index); +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- DBG_871X("pairwise=%d\n", pairwise); +-#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +- +- param_len = sizeof(struct ieee_param) + params->key_len; +- param = (struct ieee_param *)rtw_malloc(param_len); +- if (param == NULL) +- return -1; +- +- _rtw_memset(param, 0, param_len); +- +- param->cmd = IEEE_CMD_SET_ENCRYPTION; +- _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); +- +- switch (params->cipher) { +- case IW_AUTH_CIPHER_NONE: +- //todo: remove key +- //remove = 1; +- alg_name = "none"; +- break; +- case WLAN_CIPHER_SUITE_WEP40: +- case WLAN_CIPHER_SUITE_WEP104: +- alg_name = "WEP"; +- break; +- case WLAN_CIPHER_SUITE_TKIP: +- alg_name = "TKIP"; +- break; +- case WLAN_CIPHER_SUITE_CCMP: +- alg_name = "CCMP"; +- break; +-#ifdef CONFIG_IEEE80211W +- case WLAN_CIPHER_SUITE_AES_CMAC: +- alg_name = "BIP"; +- break; +-#endif //CONFIG_IEEE80211W +-#ifdef CONFIG_WAPI_SUPPORT +- case WLAN_CIPHER_SUITE_SMS4: +- alg_name= "SMS4"; +- if(pairwise == NL80211_KEYTYPE_PAIRWISE) { +- if (key_index != 0 && key_index != 1) { +- ret = -ENOTSUPP; +- goto addkey_end; +- } +- _rtw_memcpy((void*)param->sta_addr, (void*)mac_addr, ETH_ALEN); +- } else { +- DBG_871X("mac_addr is null \n"); +- } +- DBG_871X("rtw_wx_set_enc_ext: SMS4 case \n"); +- break; +-#endif +- +- default: +- ret = -ENOTSUPP; +- goto addkey_end; +- } +- +- strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); +- +- +- if (!mac_addr || is_broadcast_ether_addr(mac_addr)) +- { +- param->u.crypt.set_tx = 0; //for wpa/wpa2 group key +- } else { +- param->u.crypt.set_tx = 1; //for wpa/wpa2 pairwise key +- } +- +- +- //param->u.crypt.idx = key_index - 1; +- param->u.crypt.idx = key_index; +- +- if (params->seq_len && params->seq) +- { +- _rtw_memcpy(param->u.crypt.seq, (u8 *)params->seq, params->seq_len); +- } +- +- if(params->key_len && params->key) +- { +- param->u.crypt.key_len = params->key_len; +- _rtw_memcpy(param->u.crypt.key, (u8 *)params->key, params->key_len); +- } +- +- if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) +- { +- ret = rtw_cfg80211_set_encryption(ndev, param, param_len); +- } +- else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) +- { +-#ifdef CONFIG_AP_MODE +- if(mac_addr) +- _rtw_memcpy(param->sta_addr, (void*)mac_addr, ETH_ALEN); +- +- ret = rtw_cfg80211_ap_set_encryption(ndev, param, param_len); +-#endif +- } +- else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE +- || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) +- { +- //DBG_8192C("@@@@@@@@@@ fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); +- ret = rtw_cfg80211_set_encryption(ndev, param, param_len); +- } +- else +- { +- DBG_8192C("error! fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); +- +- } +- +-addkey_end: +- if(param) +- { +- rtw_mfree((u8*)param, param_len); +- } +- +- return ret; +- +-} +- +-static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- u8 key_index, bool pairwise, const u8 *mac_addr, +-#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +- u8 key_index, const u8 *mac_addr, +-#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +- void *cookie, +- void (*callback)(void *cookie, +- struct key_params*)) +-{ +-#if 0 +- struct iwm_priv *iwm = ndev_to_iwm(ndev); +- struct iwm_key *key = &iwm->keys[key_index]; +- struct key_params params; +- +- IWM_DBG_WEXT(iwm, DBG, "Getting key %d\n", key_index); +- +- memset(¶ms, 0, sizeof(params)); +- +- params.cipher = key->cipher; +- params.key_len = key->key_len; +- params.seq_len = key->seq_len; +- params.seq = key->seq; +- params.key = key->key; +- +- callback(cookie, ¶ms); +- +- return key->key_len ? 0 : -ENOENT; +-#endif +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- return 0; +-} +- +-static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- u8 key_index, bool pairwise, const u8 *mac_addr) +-#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +- u8 key_index, const u8 *mac_addr) +-#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +-{ +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- +- DBG_871X(FUNC_NDEV_FMT" key_index=%d\n", FUNC_NDEV_ARG(ndev), key_index); +- +- if (key_index == psecuritypriv->dot11PrivacyKeyIndex) +- { +- //clear the flag of wep default key set. +- psecuritypriv->bWepDefaultKeyIdxSet = 0; +- } +- +- return 0; +-} +- +-static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, +- struct net_device *ndev, u8 key_index +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) +- , bool unicast, bool multicast +- #endif +- ) +-{ +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- +- DBG_871X(FUNC_NDEV_FMT" key_index=%d" +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) +- ", unicast=%d, multicast=%d" +- #endif +- ".\n", FUNC_NDEV_ARG(ndev), key_index +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) +- , unicast, multicast +- #endif +- ); +- +- if ((key_index < WEP_KEYS) && ((psecuritypriv->dot11PrivacyAlgrthm == _WEP40_) || (psecuritypriv->dot11PrivacyAlgrthm == _WEP104_))) //set wep default key +- { +- psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; +- +- psecuritypriv->dot11PrivacyKeyIndex = key_index; +- +- psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; +- psecuritypriv->dot118021XGrpPrivacy = _WEP40_; +- if (psecuritypriv->dot11DefKeylen[key_index] == 13) +- { +- psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; +- psecuritypriv->dot118021XGrpPrivacy = _WEP104_; +- } +- +- psecuritypriv->bWepDefaultKeyIdxSet = 1; //set the flag to represent that wep default key has been set +- } +- +- return 0; +- +-} +- +-static int cfg80211_rtw_get_station(struct wiphy *wiphy, +- struct net_device *ndev, +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) +- u8 *mac, +-#else +- const u8 *mac, +-#endif +- struct station_info *sinfo) +-{ +- int ret = 0; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct sta_info *psta = NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- +- sinfo->filled = 0; +- +- if (!mac) { +- DBG_871X(FUNC_NDEV_FMT" mac==%p\n", FUNC_NDEV_ARG(ndev), mac); +- ret = -ENOENT; +- goto exit; +- } +- +- psta = rtw_get_stainfo(pstapriv, (u8 *)mac); +- if (psta == NULL) { +- DBG_8192C("%s, sta_info is null\n", __func__); +- ret = -ENOENT; +- goto exit; +- } +- +-#ifdef CONFIG_DEBUG_CFG80211 +- DBG_871X(FUNC_NDEV_FMT" mac="MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(mac)); +-#endif +- +- //for infra./P2PClient mode +- if( check_fwstate(pmlmepriv, WIFI_STATION_STATE) +- && check_fwstate(pmlmepriv, _FW_LINKED) +- ) +- { +- struct wlan_network *cur_network = &(pmlmepriv->cur_network); +- +- if (_rtw_memcmp((u8 *)mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) { +- DBG_871X("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); +- ret = -ENOENT; +- goto exit; +- } +- +- sinfo->filled |= STATION_INFO_SIGNAL; +- sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); +- +- sinfo->filled |= STATION_INFO_TX_BITRATE; +- sinfo->txrate.legacy = rtw_get_cur_max_rate(padapter); +- +- sinfo->filled |= STATION_INFO_RX_PACKETS; +- sinfo->rx_packets = sta_rx_data_pkts(psta); +- +- sinfo->filled |= STATION_INFO_TX_PACKETS; +- sinfo->tx_packets = psta->sta_stats.tx_pkts; +- +- } +- +- //for Ad-Hoc/AP mode +- if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) +- ||check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) +- ||check_fwstate(pmlmepriv, WIFI_AP_STATE)) +- && check_fwstate(pmlmepriv, _FW_LINKED) +- ) +- { +- //TODO: should acquire station info... +- } +- +-exit: +- return ret; +-} +- +-extern int netdev_open(struct net_device *pnetdev); +-#ifdef CONFIG_CONCURRENT_MODE +-extern int netdev_if2_open(struct net_device *pnetdev); +-#endif +- +-/* +-enum nl80211_iftype { +- NL80211_IFTYPE_UNSPECIFIED, +- NL80211_IFTYPE_ADHOC, //1 +- NL80211_IFTYPE_STATION, //2 +- NL80211_IFTYPE_AP, //3 +- NL80211_IFTYPE_AP_VLAN, +- NL80211_IFTYPE_WDS, +- NL80211_IFTYPE_MONITOR, //6 +- NL80211_IFTYPE_MESH_POINT, +- NL80211_IFTYPE_P2P_CLIENT, //8 +- NL80211_IFTYPE_P2P_GO, //9 +- //keep last +- NUM_NL80211_IFTYPES, +- NL80211_IFTYPE_MAX = NUM_NL80211_IFTYPES - 1 +-}; +-*/ +-static int cfg80211_rtw_change_iface(struct wiphy *wiphy, +- struct net_device *ndev, +- enum nl80211_iftype type, u32 *flags, +- struct vif_params *params) +-{ +- enum nl80211_iftype old_type; +- NDIS_802_11_NETWORK_INFRASTRUCTURE networkType; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct wireless_dev *rtw_wdev = padapter->rtw_wdev; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +-#ifdef CONFIG_P2P +- struct wifidirect_info *pwdinfo= &(padapter->wdinfo); +-#endif +- int ret = 0; +- u8 change = _FALSE; +- +- DBG_871X(FUNC_NDEV_FMT" type=%d\n", FUNC_NDEV_ARG(ndev), type); +- +- if(adapter_to_dvobj(padapter)->processing_dev_remove == _TRUE) +- { +- ret= -EPERM; +- goto exit; +- } +- +-#ifdef CONFIG_CONCURRENT_MODE +- if(padapter->adapter_type == SECONDARY_ADAPTER) +- { +- DBG_871X(FUNC_NDEV_FMT" call netdev_if2_open\n", FUNC_NDEV_ARG(ndev)); +- if(netdev_if2_open(ndev) != 0) { +- DBG_871X(FUNC_NDEV_FMT" call netdev_if2_open fail\n", FUNC_NDEV_ARG(ndev)); +- ret= -EPERM; +- goto exit; +- } +- } +- else if(padapter->adapter_type == PRIMARY_ADAPTER) +-#endif //CONFIG_CONCURRENT_MODE +- { +- DBG_871X(FUNC_NDEV_FMT" call netdev_open\n", FUNC_NDEV_ARG(ndev)); +- if(netdev_open(ndev) != 0) { +- DBG_871X(FUNC_NDEV_FMT" call netdev_open fail\n", FUNC_NDEV_ARG(ndev)); +- ret= -EPERM; +- goto exit; +- } +- } +- +- if(_FAIL == rtw_pwr_wakeup(padapter)) { +- DBG_871X(FUNC_NDEV_FMT" call rtw_pwr_wakeup fail\n", FUNC_NDEV_ARG(ndev)); +- ret= -EPERM; +- goto exit; +- } +- +- old_type = rtw_wdev->iftype; +- DBG_871X(FUNC_NDEV_FMT" old_iftype=%d, new_iftype=%d\n", +- FUNC_NDEV_ARG(ndev), old_type, type); +- +- if(old_type != type) +- { +- change = _TRUE; +- pmlmeext->action_public_rxseq = 0xffff; +- pmlmeext->action_public_dialog_token = 0xff; +- } +- +- switch (type) { +- case NL80211_IFTYPE_ADHOC: +- networkType = Ndis802_11IBSS; +- break; +-#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) +- case NL80211_IFTYPE_P2P_CLIENT: +-#endif +- case NL80211_IFTYPE_STATION: +- networkType = Ndis802_11Infrastructure; +- #ifdef CONFIG_P2P +- if(pwdinfo->driver_interface == DRIVER_CFG80211 ) +- { +- if(change && rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) +- { +- //it means remove GO and change mode from AP(GO) to station(P2P DEVICE) +- rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); +- rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); +- +- DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); +- } +- } +- #endif //CONFIG_P2P +- break; +-#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) +- case NL80211_IFTYPE_P2P_GO: +-#endif +- case NL80211_IFTYPE_AP: +- networkType = Ndis802_11APMode; +- #ifdef CONFIG_P2P +- if(pwdinfo->driver_interface == DRIVER_CFG80211 ) +- { +- if(change && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) +- { +- //it means P2P Group created, we will be GO and change mode from P2P DEVICE to AP(GO) +- rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); +- } +- } +- #endif //CONFIG_P2P +- break; +- default: +- ret = -EOPNOTSUPP; +- goto exit; +- } +- +- rtw_wdev->iftype = type; +- +- if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE) +- { +- rtw_wdev->iftype = old_type; +- ret = -EPERM; +- goto exit; +- } +- +- rtw_setopmode_cmd(padapter, networkType,_TRUE); +- +-exit: +- +- DBG_871X(FUNC_NDEV_FMT" ret:%d\n", FUNC_NDEV_ARG(ndev), ret); +- return ret; +-} +- +-void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted) +-{ +- struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); +- _irqL irqL; +- +- _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); +- if (pwdev_priv->scan_request != NULL) { +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_871X("%s with scan req\n", __FUNCTION__); +- #endif +- +- /* avoid WARN_ON(request != wiphy_to_dev(request->wiphy)->scan_req); */ +- if(pwdev_priv->scan_request->wiphy != pwdev_priv->rtw_wdev->wiphy) +- { +- DBG_8192C("error wiphy compare\n"); +- } +- else +- { +- cfg80211_scan_done(pwdev_priv->scan_request, aborted); +- } +- +- pwdev_priv->scan_request = NULL; +- } else { +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_871X("%s without scan req\n", __FUNCTION__); +- #endif +- } +- _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); +-} +- +-void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork) +-{ +- struct wireless_dev *pwdev = padapter->rtw_wdev; +- struct wiphy *wiphy = pwdev->wiphy; +- struct cfg80211_bss *bss = NULL; +- WLAN_BSSID_EX select_network = pnetwork->network; +- +- bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, +- select_network.MacAddress, select_network.Ssid.Ssid, +- select_network.Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, +- 0/*WLAN_CAPABILITY_ESS*/); +- +- if (bss) { +- cfg80211_unlink_bss(wiphy, bss); +- DBG_8192C("%s(): cfg80211_unlink %s!! () ",__func__,select_network.Ssid.Ssid ); +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) +- cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); +-#else +- cfg80211_put_bss(bss); +-#endif +- } +- return; +-} +- +-void rtw_cfg80211_surveydone_event_callback(_adapter *padapter) +-{ +- _irqL irqL; +- _list *plist, *phead; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- _queue *queue = &(pmlmepriv->scanned_queue); +- struct wlan_network *pnetwork = NULL; +- u32 cnt=0; +- u32 wait_for_surveydone; +- sint wait_status; +-#ifdef CONFIG_P2P +- struct wifidirect_info* pwdinfo = &padapter->wdinfo; +-#endif //CONFIG_P2P +- struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); +- +-#ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s\n", __func__); +-#endif +- +- _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); +- +- phead = get_list_head(queue); +- plist = get_next(phead); +- +- while(1) +- { +- if (rtw_end_of_queue_search(phead,plist)== _TRUE) +- break; +- +- pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); +- +- //report network only if the current channel set contains the channel to which this network belongs +- if(rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0 +- && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE +- && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) +- ) +- { +- //ev=translate_scan(padapter, a, pnetwork, ev, stop); +- rtw_cfg80211_inform_bss(padapter, pnetwork); +- } +- /* //check ralink testbed RSN IE length +- { +- if(_rtw_memcmp(pnetwork->network.Ssid.Ssid, "Ralink_11n_AP",13)) +- { +- uint ie_len=0; +- u8 *p=NULL; +- p = rtw_get_ie(pnetwork->network.IEs + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pnetwork->network.IELength - _BEACON_IE_OFFSET_)); +- DBG_871X("ie_len=%d\n", ie_len); +- } +- }*/ +- plist = get_next(plist); +- +- } +- +- _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); +-} +- +-static int rtw_cfg80211_set_probe_req_wpsp2pie(_adapter *padapter, char *buf, int len) +-{ +- int ret = 0; +- uint wps_ielen = 0; +- u8 *wps_ie; +- u32 p2p_ielen = 0; +- u8 *p2p_ie; +- u32 wfd_ielen = 0; +- u8 *wfd_ie; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- +-#ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s, ielen=%d\n", __func__, len); +-#endif +- +- if(len>0) +- { +- if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) +- { +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("probe_req_wps_ielen=%d\n", wps_ielen); +- #endif +- +- if(pmlmepriv->wps_probe_req_ie) +- { +- u32 free_len = pmlmepriv->wps_probe_req_ie_len; +- pmlmepriv->wps_probe_req_ie_len = 0; +- rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); +- pmlmepriv->wps_probe_req_ie = NULL; +- } +- +- pmlmepriv->wps_probe_req_ie = rtw_malloc(wps_ielen); +- if ( pmlmepriv->wps_probe_req_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- return -EINVAL; +- +- } +- _rtw_memcpy(pmlmepriv->wps_probe_req_ie, wps_ie, wps_ielen); +- pmlmepriv->wps_probe_req_ie_len = wps_ielen; +- } +- +- //buf += wps_ielen; +- //len -= wps_ielen; +- +- #ifdef CONFIG_P2P +- if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) +- { +- struct wifidirect_info *wdinfo = &padapter->wdinfo; +- u32 attr_contentlen = 0; +- u8 listen_ch_attr[5]; +- +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("probe_req_p2p_ielen=%d\n", p2p_ielen); +- #endif +- +- if(pmlmepriv->p2p_probe_req_ie) +- { +- u32 free_len = pmlmepriv->p2p_probe_req_ie_len; +- pmlmepriv->p2p_probe_req_ie_len = 0; +- rtw_mfree(pmlmepriv->p2p_probe_req_ie, free_len); +- pmlmepriv->p2p_probe_req_ie = NULL; +- } +- +- pmlmepriv->p2p_probe_req_ie = rtw_malloc(p2p_ielen); +- if ( pmlmepriv->p2p_probe_req_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- return -EINVAL; +- +- } +- _rtw_memcpy(pmlmepriv->p2p_probe_req_ie, p2p_ie, p2p_ielen); +- pmlmepriv->p2p_probe_req_ie_len = p2p_ielen; +- +- if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, (u8*)listen_ch_attr, (uint*) &attr_contentlen) +- && attr_contentlen == 5) +- { +- if (wdinfo->listen_channel != listen_ch_attr[4]) { +- DBG_871X(FUNC_ADPT_FMT" listen channel - country:%c%c%c, class:%u, ch:%u\n", +- FUNC_ADPT_ARG(padapter), listen_ch_attr[0], listen_ch_attr[1], listen_ch_attr[2], +- listen_ch_attr[3], listen_ch_attr[4]); +- wdinfo->listen_channel = listen_ch_attr[4]; +- } +- } +- } +- #endif //CONFIG_P2P +- +- //buf += p2p_ielen; +- //len -= p2p_ielen; +- +- #ifdef CONFIG_WFD +- if(rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen)) +- { +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("probe_req_wfd_ielen=%d\n", wfd_ielen); +- #endif +- +- if(pmlmepriv->wfd_probe_req_ie) +- { +- u32 free_len = pmlmepriv->wfd_probe_req_ie_len; +- pmlmepriv->wfd_probe_req_ie_len = 0; +- rtw_mfree(pmlmepriv->wfd_probe_req_ie, free_len); +- pmlmepriv->wfd_probe_req_ie = NULL; +- } +- +- pmlmepriv->wfd_probe_req_ie = rtw_malloc(wfd_ielen); +- if ( pmlmepriv->wfd_probe_req_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- return -EINVAL; +- +- } +- rtw_get_wfd_ie(buf, len, pmlmepriv->wfd_probe_req_ie, &pmlmepriv->wfd_probe_req_ie_len); +- } +- #endif //CONFIG_WFD +- +- } +- +- return ret; +- +-} +- +-static int cfg80211_rtw_scan(struct wiphy *wiphy +- #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) +- , struct net_device *ndev +- #endif +- , struct cfg80211_scan_request *request) +-{ +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +- struct net_device *ndev = wdev_to_ndev(request->wdev); +-#endif +- int i; +- u8 _status = _FALSE; +- int ret = 0; +- NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; +- struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT]; +- _irqL irqL; +- u8 *wps_ie=NULL; +- uint wps_ielen=0; +- u8 *p2p_ie=NULL; +- uint p2p_ielen=0; +- u8 survey_times=3; +- u8 survey_times_for_one_ch=6; +- struct cfg80211_ssid *ssids = request->ssids; +- int social_channel = 0, j = 0; +- bool need_indicate_scan_done = _FALSE; +- +- _adapter *padapter; +- struct rtw_wdev_priv *pwdev_priv; +- struct mlme_priv *pmlmepriv; +-#ifdef CONFIG_P2P +- struct wifidirect_info *pwdinfo; +-#endif //CONFIG_P2P +-#ifdef CONFIG_CONCURRENT_MODE +- PADAPTER pbuddy_adapter = NULL; +- struct mlme_priv *pbuddy_mlmepriv = NULL; +-#endif //CONFIG_CONCURRENT_MODE +- +- if (ndev == NULL) { +- ret = -EINVAL; +- goto exit; +- } +- +- padapter = (_adapter *)rtw_netdev_priv(ndev); +- pwdev_priv = adapter_wdev_data(padapter); +- pmlmepriv= &padapter->mlmepriv; +-#ifdef CONFIG_P2P +- pwdinfo= &(padapter->wdinfo); +-#endif //CONFIG_P2P +- +-//#ifdef CONFIG_DEBUG_CFG80211 +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); +-//#endif +- +-#ifdef CONFIG_CONCURRENT_MODE +- if (padapter->pbuddy_adapter) { +- pbuddy_adapter = padapter->pbuddy_adapter; +- pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); +- } +-#endif //CONFIG_CONCURRENT_MODE +- +-#ifdef CONFIG_MP_INCLUDED +-if (padapter->registrypriv.mp_mode == 1) +-{ +- DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter)); +- ret = -EPERM; +- goto exit; +-} +-#ifdef CONFIG_CONCURRENT_MODE +- if (padapter->pbuddy_adapter) { +- if (padapter->pbuddy_adapter->registrypriv.mp_mode == 1) +- { +- DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter)); +- ret = -EPERM; +- goto exit; +- } +- } +-#endif //CONFIG_CONCURRENT_MODE +-#endif +- +- _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); +- pwdev_priv->scan_request = request; +- _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); +- +- if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) +- { +-#ifdef CONFIG_DEBUG_CFG80211 +- DBG_871X("%s under WIFI_AP_STATE\n", __FUNCTION__); +-#endif +- +- if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) +- { +- DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); +- +- if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) +- { +- DBG_8192C("AP mode process WPS \n"); +- } +- +- need_indicate_scan_done = _TRUE; +- goto check_need_indicate_scan_done; +- } +- } +- +- rtw_ps_deny(padapter, PS_DENY_SCAN); +- if(_FAIL == rtw_pwr_wakeup(padapter)) { +- need_indicate_scan_done = _TRUE; +- goto check_need_indicate_scan_done; +- } +- +- #ifdef CONFIG_P2P +- if( pwdinfo->driver_interface == DRIVER_CFG80211 ) +- { +- if(ssids->ssid != NULL +- && _rtw_memcmp(ssids->ssid, "DIRECT-", 7) +- && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) +- ) +- { +- if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) +- { +- rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); +- adapter_wdev_data(padapter)->p2p_enabled = _TRUE; +- } +- else +- { +- rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); +- #endif +- } +- rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); +- +- if(request->n_channels == 3 && +- request->channels[0]->hw_value == 1 && +- request->channels[1]->hw_value == 6 && +- request->channels[2]->hw_value == 11 +- ) +- { +- social_channel = 1; +- } +- } +- } +- #endif //CONFIG_P2P +- +- if(request->ie && request->ie_len>0) +- { +- rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len ); +- } +- +- if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { +- DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); +- need_indicate_scan_done = _TRUE; +- goto check_need_indicate_scan_done; +- } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { +- DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); +- ret = -EBUSY; +- goto check_need_indicate_scan_done; +- } +- +- if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) +- { +-#if 1 // Miracast can't do AP scan +- static u32 lastscantime = 0; +- u32 passtime; +- +- passtime = rtw_get_passing_time_ms(lastscantime); +- lastscantime = rtw_get_current_time(); +- if (passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) +-#endif +- { +- DBG_871X("%s: bBusyTraffic == _TRUE\n", __FUNCTION__); +- need_indicate_scan_done = _TRUE; +- goto check_need_indicate_scan_done; +- } +- } +- +- if (rtw_is_scan_deny(padapter)){ +- DBG_871X(FUNC_ADPT_FMT ": scan deny\n", FUNC_ADPT_ARG(padapter)); +- need_indicate_scan_done = _TRUE; +- goto check_need_indicate_scan_done; +- } +- +-#ifdef CONFIG_CONCURRENT_MODE +- if(pbuddy_mlmepriv && (pbuddy_mlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)) +- { +-#if 1 // Miracast can't do AP scan +- static u32 buddylastscantime = 0; +- u32 passtime; +- +- passtime = rtw_get_passing_time_ms(buddylastscantime); +- buddylastscantime = rtw_get_current_time(); +- if ((passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) +-//#ifdef CONFIG_P2P +-// ||(!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) +-//#endif //CONFIG_P2P +- ) +-#endif +- { +- DBG_871X("%s: bBusyTraffic == _TRUE at buddy_intf\n", __FUNCTION__); +- need_indicate_scan_done = _TRUE; +- goto check_need_indicate_scan_done; +- } +- } +- +- if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) { +- DBG_871X("buddy_intf's mlme state:0x%x\n", pbuddy_mlmepriv->fw_state); +- need_indicate_scan_done = _TRUE; +- goto check_need_indicate_scan_done; +- +- } else if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY)) { +- bool scan_via_buddy = _FALSE; +- struct rtw_wdev_priv *buddy_wdev_priv = adapter_wdev_data(pbuddy_adapter); +- +- _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); +- _enter_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); +- if (buddy_wdev_priv->scan_request) { +- DBG_871X("scan via buddy\n"); +- pmlmepriv->scanning_via_buddy_intf = _TRUE; +- _enter_critical_bh(&pmlmepriv->lock, &irqL); +- set_fwstate(pmlmepriv, _FW_UNDER_SURVEY); +- _exit_critical_bh(&pmlmepriv->lock, &irqL); +- scan_via_buddy = _TRUE; +- } +- _exit_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); +- _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); +- +- if (scan_via_buddy == _FALSE) +- need_indicate_scan_done = _TRUE; +- +- goto check_need_indicate_scan_done; +- } +-#endif /* CONFIG_CONCURRENT_MODE */ +- +-#ifdef CONFIG_P2P +- if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) +- { +- rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); +- rtw_free_network_queue(padapter, _TRUE); +- +- if(social_channel == 0) +- rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); +- else +- rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_SOCIAL_LAST); +- } +-#endif //CONFIG_P2P +- +- +- _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); +- //parsing request ssids, n_ssids +- for (i = 0; i < request->n_ssids && i < RTW_SSID_SCAN_AMOUNT; i++) { +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("ssid=%s, len=%d\n", ssids[i].ssid, ssids[i].ssid_len); +- #endif +- _rtw_memcpy(ssid[i].Ssid, ssids[i].ssid, ssids[i].ssid_len); +- ssid[i].SsidLength = ssids[i].ssid_len; +- } +- +- /* parsing channels, n_channels */ +- _rtw_memset(ch, 0, sizeof(struct rtw_ieee80211_channel)*RTW_CHANNEL_SCAN_AMOUNT); +- for (i=0;in_channels && ichannels[i])); +- #endif +- ch[i].hw_value = request->channels[i]->hw_value; +- ch[i].flags = request->channels[i]->flags; +- } +- +- _enter_critical_bh(&pmlmepriv->lock, &irqL); +- if (request->n_channels == 1) { +- for(i=1;in_channels <= 4) { +- for(j=request->n_channels-1;j>=0;j--) +- for(i=0;in_channels); +- } else { +- _status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT, NULL, 0); +- } +- _exit_critical_bh(&pmlmepriv->lock, &irqL); +- +- +- if(_status == _FALSE) +- { +- ret = -1; +- } +- +-check_need_indicate_scan_done: +- if (_TRUE == need_indicate_scan_done) +- { +- rtw_cfg80211_surveydone_event_callback(padapter); +- rtw_cfg80211_indicate_scan_done(padapter, _FALSE); +- } +- +-cancel_ps_deny: +- rtw_ps_deny_cancel(padapter, PS_DENY_SCAN); +- +-exit: +- return ret; +- +-} +- +-static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed) +-{ +-#if 0 +- struct iwm_priv *iwm = wiphy_to_iwm(wiphy); +- +- if (changed & WIPHY_PARAM_RTS_THRESHOLD && +- (iwm->conf.rts_threshold != wiphy->rts_threshold)) { +- int ret; +- +- iwm->conf.rts_threshold = wiphy->rts_threshold; +- +- ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, +- CFG_RTS_THRESHOLD, +- iwm->conf.rts_threshold); +- if (ret < 0) +- return ret; +- } +- +- if (changed & WIPHY_PARAM_FRAG_THRESHOLD && +- (iwm->conf.frag_threshold != wiphy->frag_threshold)) { +- int ret; +- +- iwm->conf.frag_threshold = wiphy->frag_threshold; +- +- ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_FA_CFG_FIX, +- CFG_FRAG_THRESHOLD, +- iwm->conf.frag_threshold); +- if (ret < 0) +- return ret; +- } +-#endif +- DBG_8192C("%s\n", __func__); +- return 0; +-} +- +- +- +-static int rtw_cfg80211_set_wpa_version(struct security_priv *psecuritypriv, u32 wpa_version) +-{ +- DBG_8192C("%s, wpa_version=%d\n", __func__, wpa_version); +- +- if (!wpa_version) { +- psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; +- return 0; +- } +- +- +- if (wpa_version & (NL80211_WPA_VERSION_1 | NL80211_WPA_VERSION_2)) +- { +- psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; +- } +- +-/* +- if (wpa_version & NL80211_WPA_VERSION_2) +- { +- psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; +- } +-*/ +- +- #ifdef CONFIG_WAPI_SUPPORT +- if (wpa_version & NL80211_WAPI_VERSION_1) +- { +- psecuritypriv->ndisauthtype = Ndis802_11AuthModeWAPI; +- } +- #endif +- +- return 0; +- +-} +- +-static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, +- enum nl80211_auth_type sme_auth_type) +-{ +- DBG_8192C("%s, nl80211_auth_type=%d\n", __func__, sme_auth_type); +- +- +- switch (sme_auth_type) { +- case NL80211_AUTHTYPE_AUTOMATIC: +- +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; +- +- break; +- case NL80211_AUTHTYPE_OPEN_SYSTEM: +- +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; +- +- if(psecuritypriv->ndisauthtype>Ndis802_11AuthModeWPA) +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; +- +-#ifdef CONFIG_WAPI_SUPPORT +- if(psecuritypriv->ndisauthtype == Ndis802_11AuthModeWAPI) +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; +-#endif +- +- break; +- case NL80211_AUTHTYPE_SHARED_KEY: +- +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; +- +- psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; +- +- +- break; +- default: +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; +- //return -ENOTSUPP; +- } +- +- return 0; +- +-} +- +-static int rtw_cfg80211_set_cipher(struct security_priv *psecuritypriv, u32 cipher, bool ucast) +-{ +- u32 ndisencryptstatus = Ndis802_11EncryptionDisabled; +- +- u32 *profile_cipher = ucast ? &psecuritypriv->dot11PrivacyAlgrthm : +- &psecuritypriv->dot118021XGrpPrivacy; +- +- DBG_8192C("%s, ucast=%d, cipher=0x%x\n", __func__, ucast, cipher); +- +- +- if (!cipher) { +- *profile_cipher = _NO_PRIVACY_; +- psecuritypriv->ndisencryptstatus = ndisencryptstatus; +- return 0; +- } +- +- switch (cipher) { +- case IW_AUTH_CIPHER_NONE: +- *profile_cipher = _NO_PRIVACY_; +- ndisencryptstatus = Ndis802_11EncryptionDisabled; +-#ifdef CONFIG_WAPI_SUPPORT +- if(psecuritypriv->dot11PrivacyAlgrthm ==_SMS4_ ) +- { +- *profile_cipher = _SMS4_; +- } +-#endif +- break; +- case WLAN_CIPHER_SUITE_WEP40: +- *profile_cipher = _WEP40_; +- ndisencryptstatus = Ndis802_11Encryption1Enabled; +- break; +- case WLAN_CIPHER_SUITE_WEP104: +- *profile_cipher = _WEP104_; +- ndisencryptstatus = Ndis802_11Encryption1Enabled; +- break; +- case WLAN_CIPHER_SUITE_TKIP: +- *profile_cipher = _TKIP_; +- ndisencryptstatus = Ndis802_11Encryption2Enabled; +- break; +- case WLAN_CIPHER_SUITE_CCMP: +- *profile_cipher = _AES_; +- ndisencryptstatus = Ndis802_11Encryption3Enabled; +- break; +-#ifdef CONFIG_WAPI_SUPPORT +- case WLAN_CIPHER_SUITE_SMS4: +- *profile_cipher = _SMS4_; +- ndisencryptstatus = Ndis802_11_EncrypteionWAPI; +- break; +-#endif +- default: +- DBG_8192C("Unsupported cipher: 0x%x\n", cipher); +- return -ENOTSUPP; +- } +- +- if(ucast) +- { +- psecuritypriv->ndisencryptstatus = ndisencryptstatus; +- +- //if(psecuritypriv->dot11PrivacyAlgrthm >= _AES_) +- // psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; +- } +- +- return 0; +-} +- +-static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key_mgt) +-{ +- DBG_8192C("%s, key_mgt=0x%x\n", __func__, key_mgt); +- +- if (key_mgt == WLAN_AKM_SUITE_8021X) +- //*auth_type = UMAC_AUTH_TYPE_8021X; +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; +- else if (key_mgt == WLAN_AKM_SUITE_PSK) { +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; +- } +-#ifdef CONFIG_WAPI_SUPPORT +- else if(key_mgt ==WLAN_AKM_SUITE_WAPI_PSK){ +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; +- } +- else if(key_mgt ==WLAN_AKM_SUITE_WAPI_CERT){ +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; +- } +-#endif +- +- +- else { +- DBG_8192C("Invalid key mgt: 0x%x\n", key_mgt); +- //return -EINVAL; +- } +- +- return 0; +-} +- +-static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen) +-{ +- u8 *buf=NULL, *pos=NULL; +- u32 left; +- int group_cipher = 0, pairwise_cipher = 0; +- int ret = 0; +- int wpa_ielen=0; +- int wpa2_ielen=0; +- u8 *pwpa, *pwpa2; +- u8 null_addr[]= {0,0,0,0,0,0}; +- +- if (pie == NULL || !ielen) { +- /* Treat this as normal case, but need to clear WIFI_UNDER_WPS */ +- _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); +- goto exit; +- } +- +- if (ielen > MAX_WPA_IE_LEN+MAX_WPS_IE_LEN+MAX_P2P_IE_LEN) { +- ret = -EINVAL; +- goto exit; +- } +- +- buf = rtw_zmalloc(ielen); +- if (buf == NULL){ +- ret = -ENOMEM; +- goto exit; +- } +- +- _rtw_memcpy(buf, pie , ielen); +- +- //dump +- { +- int i; +- DBG_8192C("set wpa_ie(length:%zu):\n", ielen); +- for(i=0;i0) +- { +- if(rtw_parse_wpa_ie(pwpa, wpa_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) +- { +- padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; +- padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; +- _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen+2); +- +- DBG_8192C("got wpa_ie, wpa_ielen:%u\n", wpa_ielen); +- } +- } +- +- pwpa2 = rtw_get_wpa2_ie(buf, &wpa2_ielen, ielen); +- if(pwpa2 && wpa2_ielen>0) +- { +- if(rtw_parse_wpa2_ie(pwpa2, wpa2_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) +- { +- padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; +- padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; +- _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen+2); +- +- DBG_8192C("got wpa2_ie, wpa2_ielen:%u\n", wpa2_ielen); +- } +- } +- +- if (group_cipher == 0) +- { +- group_cipher = WPA_CIPHER_NONE; +- } +- if (pairwise_cipher == 0) +- { +- pairwise_cipher = WPA_CIPHER_NONE; +- } +- +- switch(group_cipher) +- { +- case WPA_CIPHER_NONE: +- padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; +- padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; +- break; +- case WPA_CIPHER_WEP40: +- padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; +- padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; +- break; +- case WPA_CIPHER_TKIP: +- padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; +- padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; +- break; +- case WPA_CIPHER_CCMP: +- padapter->securitypriv.dot118021XGrpPrivacy=_AES_; +- padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; +- break; +- case WPA_CIPHER_WEP104: +- padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; +- padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; +- break; +- } +- +- switch(pairwise_cipher) +- { +- case WPA_CIPHER_NONE: +- padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; +- padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; +- break; +- case WPA_CIPHER_WEP40: +- padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; +- padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; +- break; +- case WPA_CIPHER_TKIP: +- padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; +- padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; +- break; +- case WPA_CIPHER_CCMP: +- padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; +- padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; +- break; +- case WPA_CIPHER_WEP104: +- padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; +- padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; +- break; +- } +- +- {/* handle wps_ie */ +- uint wps_ielen; +- u8 *wps_ie; +- +- wps_ie = rtw_get_wps_ie(buf, ielen, NULL, &wps_ielen); +- if (wps_ie && wps_ielen > 0) { +- DBG_8192C("got wps_ie, wps_ielen:%u\n", wps_ielen); +- padapter->securitypriv.wps_ie_len = wps_ielensecuritypriv.wps_ie, wps_ie, padapter->securitypriv.wps_ie_len); +- set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS); +- } else { +- _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); +- } +- } +- +- #ifdef CONFIG_P2P +- {//check p2p_ie for assoc req; +- uint p2p_ielen=0; +- u8 *p2p_ie; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- +- if((p2p_ie=rtw_get_p2p_ie(buf, ielen, NULL, &p2p_ielen))) +- { +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s p2p_assoc_req_ielen=%d\n", __FUNCTION__, p2p_ielen); +- #endif +- +- if(pmlmepriv->p2p_assoc_req_ie) +- { +- u32 free_len = pmlmepriv->p2p_assoc_req_ie_len; +- pmlmepriv->p2p_assoc_req_ie_len = 0; +- rtw_mfree(pmlmepriv->p2p_assoc_req_ie, free_len); +- pmlmepriv->p2p_assoc_req_ie = NULL; +- } +- +- pmlmepriv->p2p_assoc_req_ie = rtw_malloc(p2p_ielen); +- if ( pmlmepriv->p2p_assoc_req_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- goto exit; +- } +- _rtw_memcpy(pmlmepriv->p2p_assoc_req_ie, p2p_ie, p2p_ielen); +- pmlmepriv->p2p_assoc_req_ie_len = p2p_ielen; +- } +- } +- #endif //CONFIG_P2P +- +- #ifdef CONFIG_WFD +- {//check wfd_ie for assoc req; +- uint wfd_ielen=0; +- u8 *wfd_ie; +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- +- if(rtw_get_wfd_ie(buf, ielen, NULL, &wfd_ielen)) +- { +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s wfd_assoc_req_ielen=%d\n", __FUNCTION__, wfd_ielen); +- #endif +- +- if(pmlmepriv->wfd_assoc_req_ie) +- { +- u32 free_len = pmlmepriv->wfd_assoc_req_ie_len; +- pmlmepriv->wfd_assoc_req_ie_len = 0; +- rtw_mfree(pmlmepriv->wfd_assoc_req_ie, free_len); +- pmlmepriv->wfd_assoc_req_ie = NULL; +- } +- +- pmlmepriv->wfd_assoc_req_ie = rtw_malloc(wfd_ielen); +- if ( pmlmepriv->wfd_assoc_req_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- goto exit; +- } +- rtw_get_wfd_ie(buf, ielen, pmlmepriv->wfd_assoc_req_ie, &pmlmepriv->wfd_assoc_req_ie_len); +- } +- } +- #endif //CONFIG_WFD +- +- //TKIP and AES disallow multicast packets until installing group key +- if(padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_ +- || padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ +- || padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) +- //WPS open need to enable multicast +- //|| check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == _TRUE) +- rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); +- +- RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, +- ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", +- pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); +- +-exit: +- if (buf) +- rtw_mfree(buf, ielen); +- if (ret) +- _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); +- return ret; +-} +- +-static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *ndev, +- struct cfg80211_ibss_params *params) +-{ +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- NDIS_802_11_SSID ndis_ssid; +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- int ret=0; +- +- if(_FAIL == rtw_pwr_wakeup(padapter)) { +- ret= -EPERM; +- goto exit; +- } +- +- if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { +- ret = -EPERM; +- goto exit; +- } +- +-#ifdef CONFIG_CONCURRENT_MODE +- if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING) == _TRUE) { +- DBG_8192C("%s, but buddy_intf is under linking\n", __FUNCTION__); +- ret = -EINVAL; +- goto exit; +- } +- if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY) == _TRUE) { +- rtw_scan_abort(padapter->pbuddy_adapter); +- } +-#endif //CONFIG_CONCURRENT_MODE +- +- if (!params->ssid || !params->ssid_len) +- { +- ret = -EINVAL; +- goto exit; +- } +- +- if (params->ssid_len > IW_ESSID_MAX_SIZE){ +- +- ret= -E2BIG; +- goto exit; +- } +- +- _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); +- ndis_ssid.SsidLength = params->ssid_len; +- _rtw_memcpy(ndis_ssid.Ssid, (u8 *)params->ssid, params->ssid_len); +- +- //DBG_8192C("ssid=%s, len=%zu\n", ndis_ssid.Ssid, params->ssid_len); +- +- psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; +- psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; +- psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system +- psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; +- +- ret = rtw_cfg80211_set_auth_type(psecuritypriv, NL80211_AUTHTYPE_OPEN_SYSTEM); +- rtw_set_802_11_authentication_mode(padapter, psecuritypriv->ndisauthtype); +- +- if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) +- { +- ret = -1; +- goto exit; +- } +- +-exit: +- return ret; +-} +- +-static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *ndev) +-{ +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct wireless_dev *rtw_wdev = padapter->rtw_wdev; +- enum nl80211_iftype old_type; +- int ret = 0; +- +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- padapter->mlmepriv.not_indic_disco = _TRUE; +- +- old_type = rtw_wdev->iftype; +- +- rtw_set_to_roam(padapter, 0); +- +- if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) +- { +- rtw_scan_abort(padapter); +- LeaveAllPowerSaveMode(padapter); +- +- rtw_wdev->iftype = NL80211_IFTYPE_STATION; +- +- if (rtw_set_802_11_infrastructure_mode(padapter, Ndis802_11Infrastructure) ==_FALSE) +- { +- rtw_wdev->iftype = old_type; +- ret = -EPERM; +- goto leave_ibss; +- } +- rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure,_TRUE); +- } +- +-leave_ibss: +- padapter->mlmepriv.not_indic_disco = _FALSE; +- +- return 0; +-} +- +-static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, +- struct cfg80211_connect_params *sme) +-{ +- int ret=0; +- _irqL irqL; +- _list *phead; +- struct wlan_network *pnetwork = NULL; +- NDIS_802_11_AUTHENTICATION_MODE authmode; +- NDIS_802_11_SSID ndis_ssid; +- u8 *dst_ssid, *src_ssid; +- u8 *dst_bssid, *src_bssid; +- //u8 matched_by_bssid=_FALSE; +- //u8 matched_by_ssid=_FALSE; +- u8 matched=_FALSE; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- _queue *queue = &pmlmepriv->scanned_queue; +- +- padapter->mlmepriv.not_indic_disco = _TRUE; +- +- DBG_871X("=>"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- DBG_871X("privacy=%d, key=%p, key_len=%d, key_idx=%d\n", +- sme->privacy, sme->key, sme->key_len, sme->key_idx); +- +- +- if(adapter_wdev_data(padapter)->block == _TRUE) +- { +- ret = -EBUSY; +- DBG_871X("%s wdev_priv.block is set\n", __FUNCTION__); +- goto exit; +- } +- +-#ifdef CONFIG_PLATFORM_MSTAR_SCAN_BEFORE_CONNECT +- printk("MStar Android!\n"); +- if(adapter_wdev_data(padapter)->bandroid_scan == _FALSE) +- { +-#ifdef CONFIG_P2P +- struct wifidirect_info *pwdinfo= &(padapter->wdinfo); +- if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) +-#endif //CONFIG_P2P +- { +- ret = -EBUSY; +- printk("Android hasn't attached yet!\n"); +- goto exit; +- } +- } +-#endif +- +- rtw_ps_deny(padapter, PS_DENY_JOIN); +- if(_FAIL == rtw_pwr_wakeup(padapter)) { +- ret= -EPERM; +- goto exit; +- } +- +- if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { +- ret = -EPERM; +- goto exit; +- } +- +-#ifdef CONFIG_CONCURRENT_MODE +- if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING) == _TRUE) { +- DBG_8192C("%s, but buddy_intf is under linking\n", __FUNCTION__); +- ret = -EINVAL; +- goto exit; +- } +- if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY) == _TRUE) { +- rtw_scan_abort(padapter->pbuddy_adapter); +- } +-#endif +- +- if (!sme->ssid || !sme->ssid_len) +- { +- ret = -EINVAL; +- goto exit; +- } +- +- if (sme->ssid_len > IW_ESSID_MAX_SIZE){ +- +- ret= -E2BIG; +- goto exit; +- } +- +- _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); +- ndis_ssid.SsidLength = sme->ssid_len; +- _rtw_memcpy(ndis_ssid.Ssid, (u8 *)sme->ssid, sme->ssid_len); +- +- DBG_8192C("ssid=%s, len=%zu\n", ndis_ssid.Ssid, sme->ssid_len); +- +- +- if (sme->bssid) +- DBG_8192C("bssid="MAC_FMT"\n", MAC_ARG(sme->bssid)); +- +- +- if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { +- ret = -EBUSY; +- DBG_8192C("%s, fw_state=0x%x, goto exit\n", __FUNCTION__, pmlmepriv->fw_state); +- goto exit; +- } +- if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { +- rtw_scan_abort(padapter); +- } +- +- psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; +- psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; +- psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; +- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system +- psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; +- +-#ifdef CONFIG_WAPI_SUPPORT +- padapter->wapiInfo.bWapiEnable = false; +-#endif +- +- ret = rtw_cfg80211_set_wpa_version(psecuritypriv, sme->crypto.wpa_versions); +- if (ret < 0) +- goto exit; +- +-#ifdef CONFIG_WAPI_SUPPORT +- if(sme->crypto.wpa_versions & NL80211_WAPI_VERSION_1) +- { +- padapter->wapiInfo.bWapiEnable = true; +- padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; +- padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; +- } +-#endif +- +- ret = rtw_cfg80211_set_auth_type(psecuritypriv, sme->auth_type); +- +-#ifdef CONFIG_WAPI_SUPPORT +- if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_WAPI) +- padapter->mlmeextpriv.mlmext_info.auth_algo = psecuritypriv->dot11AuthAlgrthm; +-#endif +- +- +- if (ret < 0) +- goto exit; +- +- DBG_8192C("%s, ie_len=%zu\n", __func__, sme->ie_len); +- +- ret = rtw_cfg80211_set_wpa_ie(padapter, (u8 *)sme->ie, sme->ie_len); +- if (ret < 0) +- goto exit; +- +- if (sme->crypto.n_ciphers_pairwise) { +- ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.ciphers_pairwise[0], _TRUE); +- if (ret < 0) +- goto exit; +- } +- +- //For WEP Shared auth +- if((psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Shared +- || psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Auto) && sme->key +- ) +- { +- u32 wep_key_idx, wep_key_len,wep_total_len; +- NDIS_802_11_WEP *pwep = NULL; +- DBG_871X("%s(): Shared/Auto WEP\n",__FUNCTION__); +- +- wep_key_idx = sme->key_idx; +- wep_key_len = sme->key_len; +- +- if (sme->key_idx > WEP_KEYS) { +- ret = -EINVAL; +- goto exit; +- } +- +- if (wep_key_len > 0) +- { +- wep_key_len = wep_key_len <= 5 ? 5 : 13; +- wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); +- pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); +- if(pwep == NULL){ +- DBG_871X(" wpa_set_encryption: pwep allocate fail !!!\n"); +- ret = -ENOMEM; +- goto exit; +- } +- +- _rtw_memset(pwep, 0, wep_total_len); +- +- pwep->KeyLength = wep_key_len; +- pwep->Length = wep_total_len; +- +- if(wep_key_len==13) +- { +- padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; +- padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; +- } +- } +- else { +- ret = -EINVAL; +- goto exit; +- } +- +- pwep->KeyIndex = wep_key_idx; +- pwep->KeyIndex |= 0x80000000; +- +- _rtw_memcpy(pwep->KeyMaterial, (void *)sme->key, pwep->KeyLength); +- +- if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) +- { +- ret = -EOPNOTSUPP ; +- } +- +- if (pwep) { +- rtw_mfree((u8 *)pwep,wep_total_len); +- } +- +- if(ret < 0) +- goto exit; +- } +- +- ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.cipher_group, _FALSE); +- if (ret < 0) +- return ret; +- +- if (sme->crypto.n_akm_suites) { +- ret = rtw_cfg80211_set_key_mgt(psecuritypriv, sme->crypto.akm_suites[0]); +- if (ret < 0) +- goto exit; +- } +- +-#ifdef CONFIG_WAPI_SUPPORT +- if(sme->crypto.akm_suites[0] ==WLAN_AKM_SUITE_WAPI_PSK){ +- padapter->wapiInfo.bWapiPSK = true; +- } +- else if(sme->crypto.akm_suites[0] ==WLAN_AKM_SUITE_WAPI_CERT){ +- padapter->wapiInfo.bWapiPSK = false; +- } +-#endif +- +- authmode = psecuritypriv->ndisauthtype; +- rtw_set_802_11_authentication_mode(padapter, authmode); +- +- //rtw_set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); +- +- if (rtw_set_802_11_connect(padapter, (u8 *)sme->bssid, &ndis_ssid) == _FALSE) { +- ret = -1; +- goto exit; +- } +- +- DBG_8192C("set ssid:dot11AuthAlgrthm=%d, dot11PrivacyAlgrthm=%d, dot118021XGrpPrivacy=%d\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, psecuritypriv->dot118021XGrpPrivacy); +- +-exit: +- +- rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); +- +- DBG_8192C("<=%s, ret %d\n",__FUNCTION__, ret); +- +- padapter->mlmepriv.not_indic_disco = _FALSE; +- +- return ret; +-} +- +-static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev, +- u16 reason_code) +-{ +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- padapter->mlmepriv.not_indic_disco = _TRUE; +- +- rtw_set_to_roam(padapter, 0); +- +- //if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) +- { +- rtw_scan_abort(padapter); +- LeaveAllPowerSaveMode(padapter); +- rtw_disassoc_cmd(padapter, 500, _FALSE); +- +- DBG_871X("%s...call rtw_indicate_disconnect\n", __FUNCTION__); +- +- rtw_indicate_disconnect(padapter); +- +- rtw_free_assoc_resources(padapter, 1); +- rtw_pwr_wakeup(padapter); +- } +- +- padapter->mlmepriv.not_indic_disco = _FALSE; +- +- DBG_871X(FUNC_NDEV_FMT" return 0\n", FUNC_NDEV_ARG(ndev)); +- return 0; +-} +- +-static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) +- struct wireless_dev *wdev, +-#endif +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) || defined(COMPAT_KERNEL_RELEASE) +- enum nl80211_tx_power_setting type, int mbm) +-#else +- enum tx_power_setting type, int dbm) +-#endif +-{ +-#if 0 +- struct iwm_priv *iwm = wiphy_to_iwm(wiphy); +- int ret; +- +- switch (type) { +- case NL80211_TX_POWER_AUTOMATIC: +- return 0; +- case NL80211_TX_POWER_FIXED: +- if (mbm < 0 || (mbm % 100)) +- return -EOPNOTSUPP; +- +- if (!test_bit(IWM_STATUS_READY, &iwm->status)) +- return 0; +- +- ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, +- CFG_TX_PWR_LIMIT_USR, +- MBM_TO_DBM(mbm) * 2); +- if (ret < 0) +- return ret; +- +- return iwm_tx_power_trigger(iwm); +- default: +- IWM_ERR(iwm, "Unsupported power type: %d\n", type); +- return -EOPNOTSUPP; +- } +-#endif +- DBG_8192C("%s\n", __func__); +- return 0; +-} +- +-static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) +- struct wireless_dev *wdev, +-#endif +- int *dbm) +-{ +- DBG_8192C("%s\n", __func__); +- +- *dbm = (12); +- +- return 0; +-} +- +-inline bool rtw_cfg80211_pwr_mgmt(_adapter *adapter) +-{ +- struct rtw_wdev_priv *rtw_wdev_priv = adapter_wdev_data(adapter); +- return rtw_wdev_priv->power_mgmt; +-} +- +-static int cfg80211_rtw_set_power_mgmt(struct wiphy *wiphy, +- struct net_device *ndev, +- bool enabled, int timeout) +-{ +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct rtw_wdev_priv *rtw_wdev_priv = adapter_wdev_data(padapter); +- +- DBG_871X(FUNC_NDEV_FMT" enabled:%u, timeout:%d\n", FUNC_NDEV_ARG(ndev), +- enabled, timeout); +- +- rtw_wdev_priv->power_mgmt = enabled; +- +- #ifdef CONFIG_LPS +- if (!enabled) +- LPS_Leave(padapter, "CFG80211_PWRMGMT"); +- #endif +- +- return 0; +-} +- +-static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, +- struct net_device *ndev, +- struct cfg80211_pmksa *pmksa) +-{ +- u8 index,blInserted = _FALSE; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct mlme_priv *mlme = &padapter->mlmepriv; +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- u8 strZeroMacAddress[ ETH_ALEN ] = { 0x00 }; +- +- DBG_871X(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) +- , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); +- +- if ( _rtw_memcmp((u8 *)pmksa->bssid, strZeroMacAddress, ETH_ALEN ) == _TRUE ) +- { +- return -EINVAL; +- } +- +- if (check_fwstate(mlme, _FW_LINKED) == _FALSE) { +- DBG_871X(FUNC_NDEV_FMT" not set pmksa cause not in linked state\n", FUNC_NDEV_ARG(ndev)); +- return -EINVAL; +- } +- +- blInserted = _FALSE; +- +- //overwrite PMKID +- for(index=0 ; indexPMKIDList[index].Bssid, (u8 *)pmksa->bssid, ETH_ALEN) ==_TRUE ) +- { // BSSID is matched, the same AP => rewrite with new PMKID. +- DBG_871X(FUNC_NDEV_FMT" BSSID exists in the PMKList.\n", FUNC_NDEV_ARG(ndev)); +- +- _rtw_memcpy( psecuritypriv->PMKIDList[index].PMKID, (u8 *)pmksa->pmkid, WLAN_PMKID_LEN); +- psecuritypriv->PMKIDList[index].bUsed = _TRUE; +- psecuritypriv->PMKIDIndex = index+1; +- blInserted = _TRUE; +- break; +- } +- } +- +- if(!blInserted) +- { +- // Find a new entry +- DBG_871X(FUNC_NDEV_FMT" Use the new entry index = %d for this PMKID.\n", +- FUNC_NDEV_ARG(ndev), psecuritypriv->PMKIDIndex ); +- +- _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, (u8 *)pmksa->bssid, ETH_ALEN); +- _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, (u8 *)pmksa->pmkid, WLAN_PMKID_LEN); +- +- psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].bUsed = _TRUE; +- psecuritypriv->PMKIDIndex++ ; +- if(psecuritypriv->PMKIDIndex==16) +- { +- psecuritypriv->PMKIDIndex =0; +- } +- } +- +- return 0; +-} +- +-static int cfg80211_rtw_del_pmksa(struct wiphy *wiphy, +- struct net_device *ndev, +- struct cfg80211_pmksa *pmksa) +-{ +- u8 index, bMatched = _FALSE; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- +- DBG_871X(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) +- , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); +- +- for(index=0 ; indexPMKIDList[index].Bssid, (u8 *)pmksa->bssid, ETH_ALEN) ==_TRUE ) +- { // BSSID is matched, the same AP => Remove this PMKID information and reset it. +- _rtw_memset(psecuritypriv->PMKIDList[index].Bssid, 0x00, ETH_ALEN ); +- _rtw_memset(psecuritypriv->PMKIDList[index].PMKID, 0x00, WLAN_PMKID_LEN ); +- psecuritypriv->PMKIDList[index].bUsed = _FALSE; +- bMatched = _TRUE; +- DBG_871X(FUNC_NDEV_FMT" clear id:%hhu\n", FUNC_NDEV_ARG(ndev), index); +- break; +- } +- } +- +- if(_FALSE == bMatched) +- { +- DBG_871X(FUNC_NDEV_FMT" do not have matched BSSID\n" +- , FUNC_NDEV_ARG(ndev)); +- return -EINVAL; +- } +- +- return 0; +-} +- +-static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, +- struct net_device *ndev) +-{ +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct security_priv *psecuritypriv = &padapter->securitypriv; +- +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- _rtw_memset( &psecuritypriv->PMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); +- psecuritypriv->PMKIDIndex = 0; +- +- return 0; +-} +- +-#ifdef CONFIG_AP_MODE +-void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) +-{ +- s32 freq; +- int channel; +- struct wireless_dev *pwdev = padapter->rtw_wdev; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct net_device *ndev = padapter->pnetdev; +- +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); +- +-#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) +- { +- struct station_info sinfo; +- u8 ie_offset; +- if (GetFrameSubType(pmgmt_frame) == WIFI_ASSOCREQ) +- ie_offset = _ASOCREQ_IE_OFFSET_; +- else // WIFI_REASSOCREQ +- ie_offset = _REASOCREQ_IE_OFFSET_; +- +- sinfo.filled = 0; +- sinfo.filled = STATION_INFO_ASSOC_REQ_IES; +- sinfo.assoc_req_ies = pmgmt_frame + WLAN_HDR_A3_LEN + ie_offset; +- sinfo.assoc_req_ies_len = frame_len - WLAN_HDR_A3_LEN - ie_offset; +- cfg80211_new_sta(ndev, GetAddr2Ptr(pmgmt_frame), &sinfo, GFP_ATOMIC); +- } +-#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ +- channel = pmlmeext->cur_channel; +- if (channel <= RTW_CH_MAX_2G_CHANNEL) +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); +- else +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); +- +- #ifdef COMPAT_KERNEL_RELEASE +- rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); +- #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) +- rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); +- #else //COMPAT_KERNEL_RELEASE +- { +- //to avoid WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION) when calling cfg80211_send_rx_assoc() +- #ifndef CONFIG_PLATFORM_MSTAR +- pwdev->iftype = NL80211_IFTYPE_STATION; +- #endif //CONFIG_PLATFORM_MSTAR +- DBG_8192C("iftype=%d before call cfg80211_send_rx_assoc()\n", pwdev->iftype); +- rtw_cfg80211_send_rx_assoc(padapter, NULL, pmgmt_frame, frame_len); +- DBG_8192C("iftype=%d after call cfg80211_send_rx_assoc()\n", pwdev->iftype); +- pwdev->iftype = NL80211_IFTYPE_AP; +- //cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); +- } +- #endif //COMPAT_KERNEL_RELEASE +-#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ +- +-} +- +-void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason) +-{ +- s32 freq; +- int channel; +- u8 *pmgmt_frame; +- uint frame_len; +- struct rtw_ieee80211_hdr *pwlanhdr; +- unsigned short *fctrl; +- u8 mgmt_buf[128] = {0}; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct net_device *ndev = padapter->pnetdev; +- +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); +- +-#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) +- cfg80211_del_sta(ndev, da, GFP_ATOMIC); +-#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ +- channel = pmlmeext->cur_channel; +- if (channel <= RTW_CH_MAX_2G_CHANNEL) +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); +- else +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); +- +- pmgmt_frame = mgmt_buf; +- pwlanhdr = (struct rtw_ieee80211_hdr *)pmgmt_frame; +- +- fctrl = &(pwlanhdr->frame_ctl); +- *(fctrl) = 0; +- +- //_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); +- //_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, da, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); +- +- SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +- pmlmeext->mgnt_seq++; +- SetFrameSubType(pmgmt_frame, WIFI_DEAUTH); +- +- pmgmt_frame += sizeof(struct rtw_ieee80211_hdr_3addr); +- frame_len = sizeof(struct rtw_ieee80211_hdr_3addr); +- +- reason = cpu_to_le16(reason); +- pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len); +- +- #ifdef COMPAT_KERNEL_RELEASE +- rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); +- #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) +- rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); +- #else //COMPAT_KERNEL_RELEASE +- cfg80211_send_disassoc(padapter->pnetdev, mgmt_buf, frame_len); +- //cfg80211_rx_action(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); +- #endif //COMPAT_KERNEL_RELEASE +-#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ +-} +- +-static int rtw_cfg80211_monitor_if_open(struct net_device *ndev) +-{ +- int ret = 0; +- +- DBG_8192C("%s\n", __func__); +- +- return ret; +-} +- +-static int rtw_cfg80211_monitor_if_close(struct net_device *ndev) +-{ +- int ret = 0; +- +- DBG_8192C("%s\n", __func__); +- +- return ret; +-} +- +-static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_device *ndev) +-{ +- int ret = 0; +- int rtap_len; +- int qos_len = 0; +- int dot11_hdr_len = 24; +- int snap_len = 6; +- unsigned char *pdata; +- u16 frame_ctl; +- unsigned char src_mac_addr[6]; +- unsigned char dst_mac_addr[6]; +- struct ieee80211_hdr *dot11_hdr; +- struct ieee80211_radiotap_header *rtap_hdr; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- if (skb) +- rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); +- +- if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) +- goto fail; +- +- rtap_hdr = (struct ieee80211_radiotap_header *)skb->data; +- if (unlikely(rtap_hdr->it_version)) +- goto fail; +- +- rtap_len = ieee80211_get_radiotap_len(skb->data); +- if (unlikely(skb->len < rtap_len)) +- goto fail; +- +- if(rtap_len != 14) +- { +- DBG_8192C("radiotap len (should be 14): %d\n", rtap_len); +- goto fail; +- } +- +- /* Skip the ratio tap header */ +- skb_pull(skb, rtap_len); +- +- dot11_hdr = (struct ieee80211_hdr *)skb->data; +- frame_ctl = le16_to_cpu(dot11_hdr->frame_control); +- /* Check if the QoS bit is set */ +- if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) { +- /* Check if this ia a Wireless Distribution System (WDS) frame +- * which has 4 MAC addresses +- */ +- if (dot11_hdr->frame_control & 0x0080) +- qos_len = 2; +- if ((dot11_hdr->frame_control & 0x0300) == 0x0300) +- dot11_hdr_len += 6; +- +- memcpy(dst_mac_addr, dot11_hdr->addr1, sizeof(dst_mac_addr)); +- memcpy(src_mac_addr, dot11_hdr->addr2, sizeof(src_mac_addr)); +- +- /* Skip the 802.11 header, QoS (if any) and SNAP, but leave spaces for +- * for two MAC addresses +- */ +- skb_pull(skb, dot11_hdr_len + qos_len + snap_len - sizeof(src_mac_addr) * 2); +- pdata = (unsigned char*)skb->data; +- memcpy(pdata, dst_mac_addr, sizeof(dst_mac_addr)); +- memcpy(pdata + sizeof(dst_mac_addr), src_mac_addr, sizeof(src_mac_addr)); +- +- DBG_8192C("should be eapol packet\n"); +- +- /* Use the real net device to transmit the packet */ +- ret = _rtw_xmit_entry(skb, padapter->pnetdev); +- +- return ret; +- +- } +- else if ((frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)) +- == (RTW_IEEE80211_FTYPE_MGMT|RTW_IEEE80211_STYPE_ACTION) +- ) +- { +- //only for action frames +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- unsigned char *pframe; +- //u8 category, action, OUI_Subtype, dialogToken=0; +- //unsigned char *frame_body; +- struct rtw_ieee80211_hdr *pwlanhdr; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- u8 *buf = skb->data; +- u32 len = skb->len; +- u8 category, action; +- int type = -1; +- +- if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { +- DBG_8192C(FUNC_NDEV_FMT" frame_control:0x%x\n", FUNC_NDEV_ARG(ndev), +- le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); +- goto fail; +- } +- +- DBG_8192C("RTW_Tx:da="MAC_FMT" via "FUNC_NDEV_FMT"\n", +- MAC_ARG(GetAddr1Ptr(buf)), FUNC_NDEV_ARG(ndev)); +- #ifdef CONFIG_P2P +- if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) +- goto dump; +- #endif +- if (category == RTW_WLAN_CATEGORY_PUBLIC) +- DBG_871X("RTW_Tx:%s\n", action_public_str(action)); +- else +- DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); +- +-dump: +- //starting alloc mgmt frame to dump it +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- goto fail; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- update_mgntframe_attrib(padapter, pattrib); +- pattrib->retry_ctrl = _FALSE; +- +- _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); +- +- pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; +- +- _rtw_memcpy(pframe, (void*)buf, len); +- #ifdef CONFIG_WFD +- if (type >= 0) +- { +- struct wifi_display_info *pwfd_info; +- +- pwfd_info = padapter->wdinfo.wfd_info; +- +- if ( _TRUE == pwfd_info->wfd_enable ) +- { +- rtw_append_wfd_ie( padapter, pframe, &len ); +- } +- } +- #endif // CONFIG_WFD +- pattrib->pktlen = len; +- +- pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; +- //update seq number +- pmlmeext->mgnt_seq = GetSequence(pwlanhdr); +- pattrib->seqnum = pmlmeext->mgnt_seq; +- pmlmeext->mgnt_seq++; +- +- +- pattrib->last_txcmdsz = pattrib->pktlen; +- +- dump_mgntframe(padapter, pmgntframe); +- +- } +- else +- { +- DBG_8192C("frame_ctl=0x%x\n", frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)); +- } +- +- +-fail: +- +- rtw_skb_free(skb); +- +- return 0; +- +-} +- +-static void rtw_cfg80211_monitor_if_set_multicast_list(struct net_device *ndev) +-{ +- DBG_8192C("%s\n", __func__); +-} +- +-static int rtw_cfg80211_monitor_if_set_mac_address(struct net_device *ndev, void *addr) +-{ +- int ret = 0; +- +- DBG_8192C("%s\n", __func__); +- +- return ret; +-} +- +-#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) +-static const struct net_device_ops rtw_cfg80211_monitor_if_ops = { +- .ndo_open = rtw_cfg80211_monitor_if_open, +- .ndo_stop = rtw_cfg80211_monitor_if_close, +- .ndo_start_xmit = rtw_cfg80211_monitor_if_xmit_entry, +- #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)) +- .ndo_set_multicast_list = rtw_cfg80211_monitor_if_set_multicast_list, +- #endif +- .ndo_set_mac_address = rtw_cfg80211_monitor_if_set_mac_address, +-}; +-#endif +- +-static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, struct net_device **ndev) +-{ +- int ret = 0; +- struct net_device* mon_ndev = NULL; +- struct wireless_dev* mon_wdev = NULL; +- struct rtw_netdev_priv_indicator *pnpi; +- struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); +- +- if (!name ) { +- DBG_871X(FUNC_ADPT_FMT" without specific name\n", FUNC_ADPT_ARG(padapter)); +- ret = -EINVAL; +- goto out; +- } +- +- if (pwdev_priv->pmon_ndev) { +- DBG_871X(FUNC_ADPT_FMT" monitor interface exist: "NDEV_FMT"\n", +- FUNC_ADPT_ARG(padapter), NDEV_ARG(pwdev_priv->pmon_ndev)); +- ret = -EBUSY; +- goto out; +- } +- +- mon_ndev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); +- if (!mon_ndev) { +- DBG_871X(FUNC_ADPT_FMT" allocate ndev fail\n", FUNC_ADPT_ARG(padapter)); +- ret = -ENOMEM; +- goto out; +- } +- +- mon_ndev->type = ARPHRD_IEEE80211_RADIOTAP; +- strncpy(mon_ndev->name, name, IFNAMSIZ); +- mon_ndev->name[IFNAMSIZ - 1] = 0; +- mon_ndev->destructor = rtw_ndev_destructor; +- +-#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) +- mon_ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops; +-#else +- mon_ndev->open = rtw_cfg80211_monitor_if_open; +- mon_ndev->stop = rtw_cfg80211_monitor_if_close; +- mon_ndev->hard_start_xmit = rtw_cfg80211_monitor_if_xmit_entry; +- mon_ndev->set_mac_address = rtw_cfg80211_monitor_if_set_mac_address; +-#endif +- +- pnpi = netdev_priv(mon_ndev); +- pnpi->priv = padapter; +- pnpi->sizeof_priv = sizeof(_adapter); +- +- /* wdev */ +- mon_wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); +- if (!mon_wdev) { +- DBG_871X(FUNC_ADPT_FMT" allocate mon_wdev fail\n", FUNC_ADPT_ARG(padapter)); +- ret = -ENOMEM; +- goto out; +- } +- +- mon_wdev->wiphy = padapter->rtw_wdev->wiphy; +- mon_wdev->netdev = mon_ndev; +- mon_wdev->iftype = NL80211_IFTYPE_MONITOR; +- mon_ndev->ieee80211_ptr = mon_wdev; +- +- ret = register_netdevice(mon_ndev); +- if (ret) { +- goto out; +- } +- +- *ndev = pwdev_priv->pmon_ndev = mon_ndev; +- _rtw_memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ+1); +- +-out: +- if (ret && mon_wdev) { +- rtw_mfree((u8*)mon_wdev, sizeof(struct wireless_dev)); +- mon_wdev = NULL; +- } +- +- if (ret && mon_ndev) { +- free_netdev(mon_ndev); +- *ndev = mon_ndev = NULL; +- } +- +- return ret; +-} +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +-static struct wireless_dev * +-#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) +-static struct net_device * +-#else +-static int +-#endif +- cfg80211_rtw_add_virtual_intf( +- struct wiphy *wiphy, +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0)) +- const char *name, +- #else +- char *name, +- #endif +- enum nl80211_iftype type, u32 *flags, struct vif_params *params) +-{ +- int ret = 0; +- struct net_device* ndev = NULL; +- _adapter *padapter = wiphy_to_adapter(wiphy); +- +- DBG_871X(FUNC_ADPT_FMT " wiphy:%s, name:%s, type:%d\n", +- FUNC_ADPT_ARG(padapter), wiphy_name(wiphy), name, type); +- +- switch (type) { +- case NL80211_IFTYPE_ADHOC: +- case NL80211_IFTYPE_AP_VLAN: +- case NL80211_IFTYPE_WDS: +- case NL80211_IFTYPE_MESH_POINT: +- ret = -ENODEV; +- break; +- case NL80211_IFTYPE_MONITOR: +- ret = rtw_cfg80211_add_monitor_if(padapter, (char *)name, &ndev); +- break; +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- case NL80211_IFTYPE_P2P_CLIENT: +-#endif +- case NL80211_IFTYPE_STATION: +- ret = -ENODEV; +- break; +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- case NL80211_IFTYPE_P2P_GO: +-#endif +- case NL80211_IFTYPE_AP: +- ret = -ENODEV; +- break; +- default: +- ret = -ENODEV; +- DBG_871X("Unsupported interface type\n"); +- break; +- } +- +- DBG_871X(FUNC_ADPT_FMT" ndev:%p, ret:%d\n", FUNC_ADPT_ARG(padapter), ndev, ret); +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +- return ndev ? ndev->ieee80211_ptr : ERR_PTR(ret); +-#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) +- return ndev ? ndev : ERR_PTR(ret); +-#else +- return ret; +-#endif +-} +- +-static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +- struct wireless_dev *wdev +-#else +- struct net_device *ndev +-#endif +-) +-{ +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +- struct net_device *ndev = wdev_to_ndev(wdev); +-#endif +- int ret = 0; +- _adapter *adapter; +- struct rtw_wdev_priv *pwdev_priv; +- +- if (!ndev) { +- ret = -EINVAL; +- goto exit; +- } +- +- adapter = (_adapter *)rtw_netdev_priv(ndev); +- pwdev_priv = adapter_wdev_data(adapter); +- +- unregister_netdevice(ndev); +- +- if (ndev == pwdev_priv->pmon_ndev) { +- pwdev_priv->pmon_ndev = NULL; +- pwdev_priv->ifname_mon[0] = '\0'; +- DBG_871X(FUNC_NDEV_FMT" remove monitor interface\n", FUNC_NDEV_ARG(ndev)); +- } +- +-exit: +- return ret; +-} +- +-static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, const u8 *tail, size_t tail_len) +-{ +- int ret=0; +- u8 *pbuf = NULL; +- uint len, wps_ielen=0; +- uint p2p_ielen=0; +- u8 *p2p_ie; +- u8 got_p2p_ie = _FALSE; +- struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); +- //struct sta_priv *pstapriv = &padapter->stapriv; +- +- +- DBG_8192C("%s beacon_head_len=%zu, beacon_tail_len=%zu\n", __FUNCTION__, head_len, tail_len); +- +- +- if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) +- return -EINVAL; +- +- if(head_len<24) +- return -EINVAL; +- +- +- pbuf = rtw_zmalloc(head_len+tail_len); +- if(!pbuf) +- return -ENOMEM; +- +- +- //_rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); +- +- //if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) +- // pstapriv->max_num_sta = NUM_STA; +- +- +- _rtw_memcpy(pbuf, (void *)head+24, head_len-24);// 24=beacon header len. +- _rtw_memcpy(pbuf+head_len-24, (void *)tail, tail_len); +- +- len = head_len+tail_len-24; +- +- //check wps ie if inclued +- if(rtw_get_wps_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &wps_ielen)) +- DBG_8192C("add bcn, wps_ielen=%d\n", wps_ielen); +- +-#ifdef CONFIG_P2P +- if( adapter->wdinfo.driver_interface == DRIVER_CFG80211 ) +- { +- //check p2p if enable +- if(rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen)) +- { +- struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; +- struct wifidirect_info *pwdinfo= &(adapter->wdinfo); +- +- DBG_8192C("got p2p_ie, len=%d\n", p2p_ielen); +- +- got_p2p_ie = _TRUE; +- +- if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) +- { +- DBG_8192C("Enable P2P function for the first time\n"); +- rtw_p2p_enable(adapter, P2P_ROLE_GO); +- adapter_wdev_data(adapter)->p2p_enabled = _TRUE; +- +- adapter->stapriv.expire_to = 3; // 3x2 = 6 sec in p2p mode +- } +- else +- { +- DBG_8192C("enter GO Mode, p2p_ielen=%d\n", p2p_ielen); +- +- rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); +- rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); +- pwdinfo->intent = 15; +- } +- } +- } +-#endif // CONFIG_P2P +- +- /* pbss_network->IEs will not include p2p_ie, wfd ie */ +- rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, P2P_OUI, 4); +- rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, WFD_OUI, 4); +- +- if (rtw_check_beacon_data(adapter, pbuf, len) == _SUCCESS) +- { +-#ifdef CONFIG_P2P +- //check p2p if enable +- if(got_p2p_ie == _TRUE) +- { +- struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; +- struct wifidirect_info *pwdinfo= &(adapter->wdinfo); +- pwdinfo->operating_channel = pmlmeext->cur_channel; +- } +-#endif //CONFIG_P2P +- ret = 0; +- } +- else +- { +- ret = -EINVAL; +- } +- +- +- rtw_mfree(pbuf, head_len+tail_len); +- +- return ret; +-} +- +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) +-static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *ndev, +- struct beacon_parameters *info) +-{ +- int ret=0; +- _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); +- +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); +- +- return ret; +-} +- +-static int cfg80211_rtw_set_beacon(struct wiphy *wiphy, struct net_device *ndev, +- struct beacon_parameters *info) +-{ +- _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); +- struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); +- +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- pmlmeext->bstart_bss = _TRUE; +- +- cfg80211_rtw_add_beacon(wiphy, ndev, info); +- +- return 0; +-} +- +-static int cfg80211_rtw_del_beacon(struct wiphy *wiphy, struct net_device *ndev) +-{ +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- return 0; +-} +-#else +-static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, +- struct cfg80211_ap_settings *settings) +-{ +- int ret = 0; +- _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); +- +- DBG_871X(FUNC_NDEV_FMT" hidden_ssid:%d, auth_type:%d\n", FUNC_NDEV_ARG(ndev), +- settings->hidden_ssid, settings->auth_type); +- +- ret = rtw_add_beacon(adapter, settings->beacon.head, settings->beacon.head_len, +- settings->beacon.tail, settings->beacon.tail_len); +- +- adapter->mlmeextpriv.mlmext_info.hidden_ssid_mode = settings->hidden_ssid; +- +- if (settings->ssid && settings->ssid_len) { +- WLAN_BSSID_EX *pbss_network = &adapter->mlmepriv.cur_network.network; +- WLAN_BSSID_EX *pbss_network_ext = &adapter->mlmeextpriv.mlmext_info.network; +- +- if(0) +- DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%zu), from ie:(%s,%d)\n", FUNC_ADPT_ARG(adapter), +- settings->ssid, settings->ssid_len, +- pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); +- +- _rtw_memcpy(pbss_network->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); +- pbss_network->Ssid.SsidLength = settings->ssid_len; +- _rtw_memcpy(pbss_network_ext->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); +- pbss_network_ext->Ssid.SsidLength = settings->ssid_len; +- +- if(0) +- DBG_871X(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), +- pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, +- pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); +- } +- +- return ret; +-} +- +-static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *ndev, +- struct cfg80211_beacon_data *info) +-{ +- int ret = 0; +- _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); +- +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); +- +- return ret; +-} +- +-static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev) +-{ +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- return 0; +-} +- +-#endif //(LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) +- +-static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev, +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) +- u8 *mac, +-#else +- const u8 *mac, +-#endif +- struct station_parameters *params) +-{ +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- return 0; +-} +- +-static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev, +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) +- u8 *mac +-#else +- const u8 *mac +-#endif +- ) +-{ +- int ret=0; +- _irqL irqL; +- _list *phead, *plist; +- u8 updated = _FALSE; +- struct sta_info *psta = NULL; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct sta_priv *pstapriv = &padapter->stapriv; +- +- DBG_871X("+"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) +- { +- DBG_8192C("%s, fw_state != FW_LINKED|WIFI_AP_STATE\n", __func__); +- return -EINVAL; +- } +- +- +- if(!mac) +- { +- DBG_8192C("flush all sta, and cam_entry\n"); +- +- flush_all_cam_entry(padapter); //clear CAM +- +- ret = rtw_sta_flush(padapter); +- +- return ret; +- } +- +- +- DBG_8192C("free sta macaddr =" MAC_FMT "\n", MAC_ARG(mac)); +- +- if (mac[0] == 0xff && mac[1] == 0xff && +- mac[2] == 0xff && mac[3] == 0xff && +- mac[4] == 0xff && mac[5] == 0xff) +- { +- return -EINVAL; +- } +- +- +- _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- phead = &pstapriv->asoc_list; +- plist = get_next(phead); +- +- //check asoc_queue +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) +- { +- psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); +- +- plist = get_next(plist); +- +- if(_rtw_memcmp((u8 *)mac, psta->hwaddr, ETH_ALEN)) +- { +- if(psta->dot8021xalg == 1 && psta->bpairwise_key_installed == _FALSE) +- { +- DBG_8192C("%s, sta's dot8021xalg = 1 and key_installed = _FALSE\n", __func__); +- } +- else +- { +- DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); +- +- rtw_list_delete(&psta->asoc_list); +- pstapriv->asoc_list_cnt--; +- +- //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING); +- //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- psta = NULL; +- +- break; +- } +- +- } +- +- } +- +- _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- +- associated_clients_update(padapter, updated); +- +- DBG_871X("-"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- return ret; +- +-} +- +-static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *ndev, +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) +- u8 *mac, +-#else +- const u8 *mac, +-#endif +- struct station_parameters *params) +-{ +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- return 0; +-} +- +-struct sta_info *rtw_sta_info_get_by_idx(const int idx, struct sta_priv *pstapriv) +- +-{ +- _list *phead, *plist; +- struct sta_info *psta = NULL; +- int i = 0; +- +- phead = &pstapriv->asoc_list; +- plist = get_next(phead); +- +- //check asoc_queue +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) +- { +- if(idx == i) psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); +- plist = get_next(plist); +- i++; +- } +- return psta; +-} +- +-static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *ndev, +- int idx, u8 *mac, struct station_info *sinfo) +-{ +- +- int ret = 0; +- _irqL irqL; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct sta_info *psta = NULL; +- struct sta_priv *pstapriv = &padapter->stapriv; +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- psta = rtw_sta_info_get_by_idx(idx, pstapriv); +- _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); +- if(NULL == psta) +- { +- DBG_871X("Station is not found\n"); +- ret = -ENOENT; +- goto exit; +- } +- _rtw_memcpy(mac, psta->hwaddr, ETH_ALEN); +- sinfo->filled = 0; +- sinfo->filled |= STATION_INFO_SIGNAL; +- sinfo->signal = psta->rssi; +- +-exit: +- return ret; +-} +- +-static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev, +- struct bss_parameters *params) +-{ +- u8 i; +- +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +-/* +- DBG_8192C("use_cts_prot=%d\n", params->use_cts_prot); +- DBG_8192C("use_short_preamble=%d\n", params->use_short_preamble); +- DBG_8192C("use_short_slot_time=%d\n", params->use_short_slot_time); +- DBG_8192C("ap_isolate=%d\n", params->ap_isolate); +- +- DBG_8192C("basic_rates_len=%d\n", params->basic_rates_len); +- for(i=0; ibasic_rates_len; i++) +- { +- DBG_8192C("basic_rates=%d\n", params->basic_rates[i]); +- +- } +-*/ +- return 0; +- +-} +- +-static int cfg80211_rtw_set_channel(struct wiphy *wiphy +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) +- , struct net_device *ndev +- #endif +- , struct ieee80211_channel *chan, enum nl80211_channel_type channel_type) +-{ +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- #endif +- +- return 0; +-} +- +-static int cfg80211_rtw_auth(struct wiphy *wiphy, struct net_device *ndev, +- struct cfg80211_auth_request *req) +-{ +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- return 0; +-} +- +-static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *ndev, +- struct cfg80211_assoc_request *req) +-{ +- DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +- +- return 0; +-} +-#endif //CONFIG_AP_MODE +- +-void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) +-{ +- int type; +- s32 freq; +- int channel; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- u8 category, action; +- +- channel = rtw_get_oper_ch(padapter); +- +- DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); +- #ifdef CONFIG_P2P +- type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); +- if (type >= 0) +- goto indicate; +- #endif +- rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); +- DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); +- +-indicate: +- if (channel <= RTW_CH_MAX_2G_CHANNEL) +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); +- else +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); +-#else +- cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); +-#endif +-} +- +-void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) +-{ +- int type; +- s32 freq; +- int channel; +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- u8 category, action; +- +- channel = rtw_get_oper_ch(padapter); +- +- DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); +- #ifdef CONFIG_P2P +- type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); +- if (type >= 0) { +- switch (type) { +- case P2P_GO_NEGO_CONF: +- case P2P_PROVISION_DISC_RESP: +- case P2P_INVIT_RESP: +- rtw_set_scan_deny(padapter, 2000); +- rtw_clear_scan_deny(padapter); +- } +- goto indicate; +- } +- #endif +- rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); +- DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); +- +-indicate: +- if (channel <= RTW_CH_MAX_2G_CHANNEL) +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); +- else +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); +-#else +- cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); +-#endif +-} +- +-void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg) +-{ +- s32 freq; +- int channel; +- struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); +- struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); +- u8 category, action; +- +- channel = rtw_get_oper_ch(adapter); +- +- rtw_action_frame_parse(frame, frame_len, &category, &action); +- +- DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); +- if (msg) +- DBG_871X("RTW_Rx:%s\n", msg); +- else +- DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); +- +- if (channel <= RTW_CH_MAX_2G_CHANNEL) +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); +- else +- freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- rtw_cfg80211_rx_mgmt(adapter, freq, 0, frame, frame_len, GFP_ATOMIC); +-#else +- cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); +-#endif +- +-} +- +-#ifdef CONFIG_P2P +-void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len) +-{ +- u16 wps_devicepassword_id = 0x0000; +- uint wps_devicepassword_id_len = 0; +- u8 wpsie[ 255 ] = { 0x00 }, p2p_ie[ 255 ] = { 0x00 }; +- uint p2p_ielen = 0; +- uint wpsielen = 0; +- u32 devinfo_contentlen = 0; +- u8 devinfo_content[64] = { 0x00 }; +- u16 capability = 0; +- uint capability_len = 0; +- +- unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; +- u8 action = P2P_PUB_ACTION_ACTION; +- u8 dialogToken = 1; +- u32 p2poui = cpu_to_be32(P2POUI); +- u8 oui_subtype = P2P_PROVISION_DISC_REQ; +- u32 p2pielen = 0; +-#ifdef CONFIG_WFD +- u32 wfdielen = 0; +-#endif //CONFIG_WFD +- +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- unsigned char *pframe; +- struct rtw_ieee80211_hdr *pwlanhdr; +- unsigned short *fctrl; +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- +- struct wifidirect_info *pwdinfo = &(padapter->wdinfo); +- u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); +- size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); +- +- +- DBG_871X( "[%s] In\n", __FUNCTION__ ); +- +- //prepare for building provision_request frame +- _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr1Ptr(buf), ETH_ALEN); +- _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, GetAddr1Ptr(buf), ETH_ALEN); +- +- pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; +- +- rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); +- rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); +- wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); +- +- switch(wps_devicepassword_id) +- { +- case WPS_DPID_PIN: +- pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; +- break; +- case WPS_DPID_USER_SPEC: +- pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; +- break; +- case WPS_DPID_MACHINE_SPEC: +- break; +- case WPS_DPID_REKEY: +- break; +- case WPS_DPID_PBC: +- pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; +- break; +- case WPS_DPID_REGISTRAR_SPEC: +- pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; +- break; +- default: +- break; +- } +- +- +- if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) ) +- { +- +- rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, devinfo_content, &devinfo_contentlen); +- rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&capability, &capability_len); +- +- } +- +- +- //start to build provision_request frame +- _rtw_memset(wpsie, 0, sizeof(wpsie)); +- _rtw_memset(p2p_ie, 0, sizeof(p2p_ie)); +- p2p_ielen = 0; +- +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- return; +- } +- +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- update_mgntframe_attrib(padapter, pattrib); +- +- _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); +- +- pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; +- pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; +- +- fctrl = &(pwlanhdr->frame_ctl); +- *(fctrl) = 0; +- +- _rtw_memcpy(pwlanhdr->addr1, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); +- _rtw_memcpy(pwlanhdr->addr3, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); +- +- SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); +- pmlmeext->mgnt_seq++; +- SetFrameSubType(pframe, WIFI_ACTION); +- +- pframe += sizeof(struct rtw_ieee80211_hdr_3addr); +- pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); +- +- pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); +- pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); +- +- +- //build_prov_disc_request_p2p_ie +- // P2P OUI +- p2pielen = 0; +- p2p_ie[ p2pielen++ ] = 0x50; +- p2p_ie[ p2pielen++ ] = 0x6F; +- p2p_ie[ p2pielen++ ] = 0x9A; +- p2p_ie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 +- +- // Commented by Albert 20110301 +- // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes +- // 1. P2P Capability +- // 2. Device Info +- // 3. Group ID ( When joining an operating P2P Group ) +- +- // P2P Capability ATTR +- // Type: +- p2p_ie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; +- +- // Length: +- //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); +- RTW_PUT_LE16(p2p_ie + p2pielen, 0x0002); +- p2pielen += 2; +- +- // Value: +- // Device Capability Bitmap, 1 byte +- // Group Capability Bitmap, 1 byte +- _rtw_memcpy(p2p_ie + p2pielen, &capability, 2); +- p2pielen += 2; +- +- +- // Device Info ATTR +- // Type: +- p2p_ie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; +- +- // Length: +- // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) +- // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) +- //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); +- RTW_PUT_LE16(p2p_ie + p2pielen, devinfo_contentlen); +- p2pielen += 2; +- +- // Value: +- _rtw_memcpy(p2p_ie + p2pielen, devinfo_content, devinfo_contentlen); +- p2pielen += devinfo_contentlen; +- +- +- pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2p_ie, &p2p_ielen); +- //p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr); +- //pframe += p2pielen; +- pattrib->pktlen += p2p_ielen; +- +- wpsielen = 0; +- // WPS OUI +- *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); +- wpsielen += 4; +- +- // WPS version +- // Type: +- *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); +- wpsielen += 2; +- +- // Length: +- *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); +- wpsielen += 2; +- +- // Value: +- wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 +- +- // Config Method +- // Type: +- *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); +- wpsielen += 2; +- +- // Length: +- *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); +- wpsielen += 2; +- +- // Value: +- *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); +- wpsielen += 2; +- +- pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); +- +- +-#ifdef CONFIG_WFD +- wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); +- pframe += wfdielen; +- pattrib->pktlen += wfdielen; +-#endif //CONFIG_WFD +- +- pattrib->last_txcmdsz = pattrib->pktlen; +- +- //dump_mgntframe(padapter, pmgntframe); +- if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) +- DBG_8192C("%s, ack to\n", __func__); +- +- //if(wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) +- //{ +- // DBG_8192C("waiting for p2p peer key-in PIN CODE\n"); +- // rtw_msleep_os(15000); // 15 sec for key in PIN CODE, workaround for GS2 before issuing Nego Req. +- //} +- +-} +- +-static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +- struct wireless_dev *wdev, +-#else +- struct net_device *ndev, +-#endif +- struct ieee80211_channel * channel, +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) +- enum nl80211_channel_type channel_type, +-#endif +- unsigned int duration, u64 *cookie) +-{ +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +- struct net_device *ndev = wdev_to_ndev(wdev); +-#endif +- s32 err = 0; +- u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq); +- u8 ready_on_channel = _FALSE; +- _adapter *padapter; +- struct rtw_wdev_priv *pwdev_priv; +- struct mlme_ext_priv *pmlmeext; +- struct wifidirect_info *pwdinfo; +- struct cfg80211_wifidirect_info *pcfg80211_wdinfo; +- u8 is_p2p_find = _FALSE; +- +- if (ndev == NULL) { +- return -EINVAL; +- } +- +- padapter = (_adapter *)rtw_netdev_priv(ndev); +- pwdev_priv = adapter_wdev_data(padapter); +- pmlmeext = &padapter->mlmeextpriv; +- pwdinfo = &padapter->wdinfo; +- pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; +- #ifdef CONFIG_CONCURRENT_MODE +- is_p2p_find=(duration < (pwdinfo->ext_listen_interval))? _TRUE : _FALSE; +- #endif +- DBG_871X(FUNC_ADPT_FMT" ch:%u duration:%d\n", FUNC_ADPT_ARG(padapter), remain_ch, duration); +- +- if(pcfg80211_wdinfo->is_ro_ch == _TRUE) +- { +- pcfg80211_wdinfo->not_indic_ro_ch_exp = _TRUE; +- DBG_8192C("%s, cancel ro ch timer\n", __func__); +- _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); +- #ifdef CONFIG_CONCURRENT_MODE +- ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); +- #endif //CONFIG_CONCURRENT_MODE +- p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); +- pcfg80211_wdinfo->not_indic_ro_ch_exp = _FALSE; +- } +- +- pcfg80211_wdinfo->is_ro_ch = _TRUE; +- pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); +- +- if(_FAIL == rtw_pwr_wakeup(padapter)) { +- err = -EFAULT; +- goto exit; +- } +- +- _rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel)); +- #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) +- pcfg80211_wdinfo->remain_on_ch_type= channel_type; +- #endif +- pcfg80211_wdinfo->remain_on_ch_cookie= *cookie; +- +- rtw_scan_abort(padapter); +-#ifdef CONFIG_CONCURRENT_MODE +- if ((rtw_buddy_adapter_up(padapter)) && is_p2p_find) //don't scan_abort during p2p_listen. +- rtw_scan_abort(padapter->pbuddy_adapter); +-#endif //CONFIG_CONCURRENT_MODE +- +- if (check_fwstate(&padapter->mlmepriv, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) +- { +- DBG_871X("mlme state:0x%x\n", get_fwstate(&padapter->mlmepriv)); +- remain_ch = padapter->mlmeextpriv.cur_channel; +- } +-#ifdef CONFIG_CONCURRENT_MODE +- if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) +- { +- DBG_871X("buddy_intf's mlme state:0x%x\n", get_fwstate(&(padapter->pbuddy_adapter->mlmepriv))); +- remain_ch = padapter->pbuddy_adapter->mlmeextpriv.cur_channel; +- } +-#endif /* CONFIG_CONCURRENT_MODE */ +- +- //if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) +- if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) +- { +- rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); +- adapter_wdev_data(padapter)->p2p_enabled = _TRUE; +- padapter->wdinfo.listen_channel = remain_ch; +- } +- else +- { +- rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); +-#ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); +-#endif +- } +- +- +- rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); +- +- +- if(duration < 400) +- duration = duration*3;//extend from exper. +- +- +-#ifdef CONFIG_CONCURRENT_MODE +- if (check_buddy_fwstate(padapter, _FW_LINKED)) +- { +- if (is_p2p_find) // p2p_find , duration<1000 +- duration = duration + pwdinfo->ext_listen_interval; +- else // p2p_listen, duration=5000 +- duration = pwdinfo->ext_listen_interval +- + (pwdinfo->ext_listen_interval/4); +- } +-#endif +- +- pcfg80211_wdinfo->restore_channel = rtw_get_oper_ch(padapter); +- +- if(rtw_ch_set_search_ch(pmlmeext->channel_set, remain_ch) >= 0) { +-#ifdef CONFIG_CONCURRENT_MODE +- if ( check_buddy_fwstate(padapter, _FW_LINKED) ) +- { +- PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; +- struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +- +- if((remain_ch != pbuddy_mlmeext->cur_channel) && !check_fwstate(&padapter->mlmepriv, _FW_LINKED)) +- { +- if(ATOMIC_READ(&pwdev_priv->switch_ch_to)==1 || +- (remain_ch != pmlmeext->cur_channel)) +- { +- DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); +- issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); +- +- ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); +- +- DBG_8192C("%s, set switch ch timer, duration=%d\n", __func__, duration-pwdinfo->ext_listen_interval); +- _set_timer(&pwdinfo->ap_p2p_switch_timer, duration-pwdinfo->ext_listen_interval); +- } +- } +- +- ready_on_channel = _TRUE; +- //pmlmeext->cur_channel = remain_ch; +- //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); +- }else +-#endif //CONFIG_CONCURRENT_MODE +- if(remain_ch != rtw_get_oper_ch(padapter) ) +- { +- ready_on_channel = _TRUE; +- //pmlmeext->cur_channel = remain_ch; +- //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); +- } +- } else { +- DBG_871X("%s remain_ch:%u not in channel plan!!!!\n", __FUNCTION__, remain_ch); +- } +- +- +- //call this after other things have been done +-#ifdef CONFIG_CONCURRENT_MODE +- if(ATOMIC_READ(&pwdev_priv->ro_ch_to)==1 || +- (remain_ch != rtw_get_oper_ch(padapter))) +- { +- u8 co_channel = 0xff; +- ATOMIC_SET(&pwdev_priv->ro_ch_to, 0); +-#endif +- +- if(ready_on_channel == _TRUE) +- { +- if ( !check_fwstate(&padapter->mlmepriv, _FW_LINKED ) ) +- { +- pmlmeext->cur_channel = remain_ch; +- +-#ifdef CONFIG_CONCURRENT_MODE +- co_channel = rtw_get_oper_ch(padapter); +- +- if(co_channel !=remain_ch) +-#endif +- { +- //if (!padapter->mlmepriv.LinkDetectInfo.bBusyTraffic) +- set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); +- } +- } +- } +- DBG_8192C("%s, set ro ch timer, duration=%d\n", __func__, duration); +- _set_timer( &pcfg80211_wdinfo->remain_on_ch_timer, duration); +- +-#ifdef CONFIG_CONCURRENT_MODE +- } +-#endif +- +- rtw_cfg80211_ready_on_channel(padapter, *cookie, channel, channel_type, duration, GFP_KERNEL); +- +-exit: +- if (err) { +- pcfg80211_wdinfo->is_ro_ch = _FALSE; +- pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); +- } +- +- return err; +-} +- +-static s32 cfg80211_rtw_cancel_remain_on_channel(struct wiphy *wiphy, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +- struct wireless_dev *wdev, +-#else +- struct net_device *ndev, +-#endif +- u64 cookie) +-{ +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +- struct net_device *ndev = wdev_to_ndev(wdev); +-#endif +- s32 err = 0; +- _adapter *padapter; +- struct rtw_wdev_priv *pwdev_priv; +- struct wifidirect_info *pwdinfo; +- struct cfg80211_wifidirect_info *pcfg80211_wdinfo; +- +- if (ndev == NULL) { +- err = -EINVAL; +- goto exit; +- } +- +- padapter = (_adapter *)rtw_netdev_priv(ndev); +- pwdev_priv = adapter_wdev_data(padapter); +- pwdinfo = &padapter->wdinfo; +- pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; +- +- DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); +- +- if (pcfg80211_wdinfo->is_ro_ch == _TRUE) { +- pcfg80211_wdinfo->not_indic_ro_ch_exp = _TRUE; +- DBG_8192C("%s, cancel ro ch timer\n", __func__); +- _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); +- #ifdef CONFIG_CONCURRENT_MODE +- ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); +- #endif +- p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); +- pcfg80211_wdinfo->not_indic_ro_ch_exp = _FALSE; +- } +- +- #if 0 +- // Disable P2P Listen State +- if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) +- { +- if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) +- { +- rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); +- _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); +- } +- } +- else +- #endif +- { +- rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); +-#ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); +-#endif +- } +- +- pcfg80211_wdinfo->is_ro_ch = _FALSE; +- pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); +- +-exit: +- return err; +-} +- +-#endif //CONFIG_P2P +- +-static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, const u8 *buf, size_t len) +-{ +- struct xmit_frame *pmgntframe; +- struct pkt_attrib *pattrib; +- unsigned char *pframe; +- int ret = _FAIL; +- bool ack = _TRUE; +- struct rtw_ieee80211_hdr *pwlanhdr; +- struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); +- struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +-#ifdef CONFIG_P2P +- struct wifidirect_info *pwdinfo = &padapter->wdinfo; +-#endif //CONFIG_P2P +- //struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; +- +- rtw_set_scan_deny(padapter, 1000); +- +- rtw_scan_abort(padapter); +- #ifdef CONFIG_CONCURRENT_MODE +- if(rtw_buddy_adapter_up(padapter)) +- rtw_scan_abort(padapter->pbuddy_adapter); +- #endif /* CONFIG_CONCURRENT_MODE */ +-#ifdef CONFIG_P2P +- if (padapter->cfg80211_wdinfo.is_ro_ch == _TRUE) { +- //DBG_8192C("%s, cancel ro ch timer\n", __func__); +- //_cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); +- //padapter->cfg80211_wdinfo.is_ro_ch = _FALSE; +- #ifdef CONFIG_CONCURRENT_MODE +- if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) +- { +- DBG_8192C("%s, extend ro ch time\n", __func__); +- _set_timer( &padapter->cfg80211_wdinfo.remain_on_ch_timer, pwdinfo->ext_listen_period); +- } +- #endif //CONFIG_CONCURRENT_MODE +- } +-#endif //CONFIG_P2P +-#ifdef CONFIG_CONCURRENT_MODE +- if (check_buddy_fwstate(padapter, _FW_LINKED )) { +- u8 co_channel=0xff; +- PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; +- struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; +- +- co_channel = rtw_get_oper_ch(padapter); +- +- if (tx_ch != pbuddy_mlmeext->cur_channel) { +- +- u16 ext_listen_period; +- +- if (ATOMIC_READ(&pwdev_priv->switch_ch_to)==1) { +- DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); +- issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); +- +- ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); +- +- //DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, pwdinfo->ext_listen_period); +- //_set_timer(&pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_period); +- } +- +- if (check_fwstate(&padapter->mlmepriv, _FW_LINKED )) +- { +- ext_listen_period = 500;// 500ms +- } +- else +- { +- ext_listen_period = pwdinfo->ext_listen_period; +- } +- +- DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, ext_listen_period); +- _set_timer(&pwdinfo->ap_p2p_switch_timer, ext_listen_period); +- +- } +- +- if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) +- pmlmeext->cur_channel = tx_ch; +- +- if (tx_ch != co_channel) +- set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); +- }else +-#endif //CONFIG_CONCURRENT_MODE +- //if (tx_ch != pmlmeext->cur_channel) { +- if(tx_ch != rtw_get_oper_ch(padapter)) { +- if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) +- pmlmeext->cur_channel = tx_ch; +- set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); +- } +- +- //starting alloc mgmt frame to dump it +- if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +- { +- //ret = -ENOMEM; +- ret = _FAIL; +- goto exit; +- } +- +- //update attribute +- pattrib = &pmgntframe->attrib; +- update_mgntframe_attrib(padapter, pattrib); +- pattrib->retry_ctrl = _FALSE; +- +- _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); +- +- pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; +- +- _rtw_memcpy(pframe, (void*)buf, len); +- pattrib->pktlen = len; +- +- pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; +- //update seq number +- pmlmeext->mgnt_seq = GetSequence(pwlanhdr); +- pattrib->seqnum = pmlmeext->mgnt_seq; +- pmlmeext->mgnt_seq++; +- +-#ifdef CONFIG_WFD +- { +- struct wifi_display_info *pwfd_info; +- +- pwfd_info = padapter->wdinfo.wfd_info; +- +- if ( _TRUE == pwfd_info->wfd_enable ) +- { +- rtw_append_wfd_ie( padapter, pframe, &pattrib->pktlen ); +- } +- } +-#endif // CONFIG_WFD +- +- pattrib->last_txcmdsz = pattrib->pktlen; +- +- if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) +- { +- ack = _FALSE; +- ret = _FAIL; +- +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s, ack == _FAIL\n", __func__); +- #endif +- } +- else +- { +- +-#ifdef CONFIG_XMIT_ACK +- rtw_msleep_os(50); +-#endif +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s, ack=%d, ok!\n", __func__, ack); +- #endif +- ret = _SUCCESS; +- } +- +-exit: +- +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s, ret=%d\n", __func__, ret); +- #endif +- +- return ret; +- +-} +- +-static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +- struct wireless_dev *wdev, +-#else +- struct net_device *ndev, +-#endif +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) +- struct ieee80211_channel *chan, +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) +- bool offchan, +- #endif +- #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) +- enum nl80211_channel_type channel_type, +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- bool channel_type_valid, +- #endif +- #endif +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) +- unsigned int wait, +- #endif +- const u8 *buf, size_t len, +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) +- bool no_cck, +- #endif +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) +- bool dont_wait_for_ack, +- #endif +-#else +- struct cfg80211_mgmt_tx_params *params, +-#endif +- u64 *cookie) +-{ +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +- struct net_device *ndev = wdev_to_ndev(wdev); +-#endif +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) +- struct ieee80211_channel *chan = params->chan; +- bool offchan = params->offchan; +- unsigned int wait = params->wait; +- const u8 *buf = params->buf; +- size_t len = params->len; +- bool no_cck = params->no_cck; +- bool dont_wait_for_ack = params->dont_wait_for_ack; +-#endif +- int ret = 0; +- int tx_ret; +- u32 dump_limit = RTW_MAX_MGMT_TX_CNT; +- u32 dump_cnt = 0; +- bool ack = _TRUE; +- u8 tx_ch = (u8)ieee80211_frequency_to_channel(chan->center_freq); +- u8 category, action; +- int type = (-1); +- u32 start = rtw_get_current_time(); +- _adapter *padapter; +- struct rtw_wdev_priv *pwdev_priv; +- +- if (ndev == NULL) { +- ret = -EINVAL; +- goto exit; +- } +- +- padapter = (_adapter *)rtw_netdev_priv(ndev); +- pwdev_priv = adapter_wdev_data(padapter); +- +- /* cookie generation */ +- *cookie = (unsigned long) buf; +- +-#ifdef CONFIG_DEBUG_CFG80211 +- DBG_871X(FUNC_ADPT_FMT" len=%zu, ch=%d" +- #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) +- ", ch_type=%d" +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- ", channel_type_valid=%d" +- #endif +- #endif +- "\n", FUNC_ADPT_ARG(padapter), +- len, tx_ch +- #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) +- , channel_type +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- , channel_type_valid +- #endif +- #endif +- ); +-#endif /* CONFIG_DEBUG_CFG80211 */ +- +- /* indicate ack before issue frame to avoid racing with rsp frame */ +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- rtw_cfg80211_mgmt_tx_status(padapter, *cookie, buf, len, ack, GFP_KERNEL); +-#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) +- cfg80211_action_tx_status(ndev, *cookie, buf, len, ack, GFP_KERNEL); +-#endif +- +- if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { +- DBG_8192C(FUNC_ADPT_FMT" frame_control:0x%x\n", FUNC_ADPT_ARG(padapter), +- le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); +- goto exit; +- } +- +- DBG_8192C("RTW_Tx:tx_ch=%d, da="MAC_FMT"\n", tx_ch, MAC_ARG(GetAddr1Ptr(buf))); +- #ifdef CONFIG_P2P +- if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) { +- goto dump; +- } +- #endif +- if (category == RTW_WLAN_CATEGORY_PUBLIC) +- DBG_871X("RTW_Tx:%s\n", action_public_str(action)); +- else +- DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); +- +-dump: +- +- rtw_ps_deny(padapter, PS_DENY_MGNT_TX); +- if(_FAIL == rtw_pwr_wakeup(padapter)) { +- ret = -EFAULT; +- goto cancel_ps_deny; +- } +- +- do { +- dump_cnt++; +- tx_ret = _cfg80211_rtw_mgmt_tx(padapter, tx_ch, buf, len); +- } while (dump_cnt < dump_limit && tx_ret != _SUCCESS); +- +- if (tx_ret != _SUCCESS || dump_cnt > 1) { +- DBG_871X(FUNC_ADPT_FMT" %s (%d/%d) in %d ms\n", FUNC_ADPT_ARG(padapter), +- tx_ret==_SUCCESS?"OK":"FAIL", dump_cnt, dump_limit, rtw_get_passing_time_ms(start)); +- } +- +- switch (type) { +- case P2P_GO_NEGO_CONF: +- rtw_clear_scan_deny(padapter); +- break; +- case P2P_INVIT_RESP: +- if (pwdev_priv->invit_info.flags & BIT(0) +- && pwdev_priv->invit_info.status == 0) +- { +- DBG_871X(FUNC_ADPT_FMT" agree with invitation of persistent group\n", +- FUNC_ADPT_ARG(padapter)); +- rtw_set_scan_deny(padapter, 5000); +- rtw_pwr_wakeup_ex(padapter, 5000); +- rtw_clear_scan_deny(padapter); +- } +- break; +- } +- +-cancel_ps_deny: +- rtw_ps_deny_cancel(padapter, PS_DENY_MGNT_TX); +-exit: +- return ret; +-} +- +-static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) +- struct wireless_dev *wdev, +-#else +- struct net_device *ndev, +-#endif +- u16 frame_type, bool reg) +-{ +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) +- struct net_device *ndev = wdev_to_ndev(wdev); +-#endif +- _adapter *adapter; +- +- if (ndev == NULL) +- goto exit; +- +- adapter = (_adapter *)rtw_netdev_priv(ndev); +- +-#ifdef CONFIG_DEBUG_CFG80211 +- DBG_871X(FUNC_ADPT_FMT" frame_type:%x, reg:%d\n", FUNC_ADPT_ARG(adapter), +- frame_type, reg); +-#endif +- +- if (frame_type != (IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_PROBE_REQ)) +- return; +-exit: +- return; +-} +- +-#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) +-static int cfg80211_rtw_tdls_mgmt(struct wiphy *wiphy, +- struct net_device *ndev, +- u8 *peer, +- u8 action_code, +- u8 dialog_token, +- u16 status_code, +- const u8 *buf, +- size_t len) +-{ +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- int ret = 0; +- struct tdls_txmgmt txmgmt; +- +- //TDLS: discard wpa_supplicant's frame mgmt +- DBG_871X("%s %d\n", __FUNCTION__, __LINE__); +- return 0; +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); +- txmgmt.action_code = action_code; +- txmgmt.dialog_token= dialog_token; +- txmgmt.status_code = status_code; +- txmgmt.len = len; +- txmgmt.buf = (u8 *)rtw_malloc(txmgmt.len); +- if (txmgmt.buf == NULL) +- { +- ret = -ENOMEM; +- goto bad; +- } +- _rtw_memcpy(txmgmt.buf, (void*)buf, txmgmt.len); +- txmgmt.external_support = _TRUE; +- +-//TDLS: Debug purpose +-#if 0 +- DBG_871X("%s %d\n", __FUNCTION__, __LINE__); +- DBG_871X("peer:"MAC_FMT" ", MAC_ARG(txmgmt.peer)); +- DBG_871X("action code:%d ", txmgmt.action_code); +- DBG_871X("dialog:%d ", txmgmt.dialog_token); +- DBG_871X("status code:%d\n", txmgmt.status_code); +- if( txmgmt.len > 0 ) +- { +- int i=0; +- for(;i < len; i++) +- DBG_871X("%02x ", *(txmgmt.buf+i)); +- DBG_871X("\n len:%d\n", txmgmt.len); +- } +-#endif +- +- switch(txmgmt.action_code) { +- case TDLS_SETUP_REQUEST: +- issue_tdls_setup_req(padapter, &txmgmt, _TRUE); +- break; +- case TDLS_SETUP_RESPONSE: +- issue_tdls_setup_rsp(padapter, &txmgmt); +- break; +- case TDLS_SETUP_CONFIRM: +- issue_tdls_setup_cfm(padapter, &txmgmt); +- break; +- case TDLS_TEARDOWN: +- break; +- case TDLS_DISCOVERY_REQUEST: +- issue_tdls_dis_req(padapter, &txmgmt); +- break; +- } +- +-bad: +- if (txmgmt.buf) +- { +- rtw_mfree(txmgmt.buf, txmgmt.len); +- } +- +- return ret; +-} +- +-static int cfg80211_rtw_tdls_oper(struct wiphy *wiphy, +- struct net_device *ndev, +- u8 *peer, +- enum nl80211_tdls_operation oper) +-{ +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct tdls_txmgmt txmgmt; +- struct sta_info *ptdls_sta = NULL; +- +- DBG_871X(FUNC_NDEV_FMT", nl80211_tdls_operation:%d\n", FUNC_NDEV_ARG(ndev), oper); +- +-#ifdef CONFIG_LPS +- rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); +-#endif //CONFIG_LPS +- +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- if(peer) +- _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); +-#if 0 +- CFG80211_TDLS_DISCOVERY_REQ, +- CFG80211_TDLS_SETUP, +- CFG80211_TDLS_TEARDOWN, +- CFG80211_TDLS_ENABLE_LINK, +- CFG80211_TDLS_DISABLE_LINK, +- CFG80211_TDLS_ENABLE, +- CFG80211_TDLS_DISABLE +-#endif +- switch(oper) { +- case NL80211_TDLS_DISCOVERY_REQ: +- issue_tdls_dis_req(padapter, &txmgmt); +- break; +- case NL80211_TDLS_SETUP: +-#ifdef CONFIG_WFD +- if ( _AES_ != padapter->securitypriv.dot11PrivacyAlgrthm ) +- { +- if ( padapter->wdinfo.wfd_tdls_weaksec == _TRUE) +- issue_tdls_setup_req(padapter, &txmgmt, _TRUE); +- else +- DBG_871X( "[%s] Current link is not AES, SKIP sending the tdls setup request!!\n", __FUNCTION__ ); +- } +- else +-#endif // CONFIG_WFD +- { +- issue_tdls_setup_req(padapter, &txmgmt, _TRUE); +- } +- break; +- case NL80211_TDLS_TEARDOWN: +- ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), txmgmt.peer); +- if(ptdls_sta != NULL) +- { +- txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; +- issue_tdls_teardown(padapter, &txmgmt, _FALSE); +- } +- else +- DBG_871X( "TDLS peer not found\n"); +- break; +- case NL80211_TDLS_ENABLE_LINK: +- break; +- case NL80211_TDLS_DISABLE_LINK: +- break; +- } +- return 0; +-} +-#endif /* CONFIG_TDLS */ +- +-#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) +-static int cfg80211_rtw_sched_scan_start(struct wiphy *wiphy, +- struct net_device *dev, +- struct cfg80211_sched_scan_request *request) { +- +- _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- u8 ret; +- +- if (padapter->bup == _FALSE) { +- DBG_871X("%s: net device is down.\n", __func__); +- return -EIO; +- } +- +- if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE || +- check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE || +- check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { +- DBG_871X("%s: device is busy.\n", __func__); +- rtw_scan_abort(padapter); +- } +- +- if (request == NULL) { +- DBG_871X("%s: invalid cfg80211_requests parameters.\n", __func__); +- return -EINVAL; +- } +- +- ret = rtw_android_cfg80211_pno_setup(dev, request->ssids, +- request->n_ssids, request->interval); +- +- if (ret < 0) { +- DBG_871X("%s ret: %d\n", __func__, ret); +- goto exit; +- } +- +- ret = rtw_android_pno_enable(dev, _TRUE); +- if (ret < 0) { +- DBG_871X("%s ret: %d\n", __func__, ret); +- goto exit; +- } +-exit: +- return ret; +-} +- +-static int cfg80211_rtw_sched_scan_stop(struct wiphy *wiphy, +- struct net_device *dev) { +- return rtw_android_pno_enable(dev, _FALSE); +-} +-#endif /* CONFIG_PNO_SUPPORT */ +- +-static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *ndev, char *buf, int len) +-{ +- int ret = 0; +- uint wps_ielen = 0; +- u8 *wps_ie; +- u32 p2p_ielen = 0; +- u8 wps_oui[8]={0x0,0x50,0xf2,0x04}; +- u8 *p2p_ie; +- u32 wfd_ielen = 0; +- u8 *wfd_ie; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- +- DBG_871X(FUNC_NDEV_FMT" ielen=%d\n", FUNC_NDEV_ARG(ndev), len); +- +- if(len>0) +- { +- if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) +- { +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("bcn_wps_ielen=%d\n", wps_ielen); +- #endif +- +- if(pmlmepriv->wps_beacon_ie) +- { +- u32 free_len = pmlmepriv->wps_beacon_ie_len; +- pmlmepriv->wps_beacon_ie_len = 0; +- rtw_mfree(pmlmepriv->wps_beacon_ie, free_len); +- pmlmepriv->wps_beacon_ie = NULL; +- } +- +- pmlmepriv->wps_beacon_ie = rtw_malloc(wps_ielen); +- if ( pmlmepriv->wps_beacon_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- return -EINVAL; +- +- } +- +- _rtw_memcpy(pmlmepriv->wps_beacon_ie, wps_ie, wps_ielen); +- pmlmepriv->wps_beacon_ie_len = wps_ielen; +- +- update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); +- +- } +- +- //buf += wps_ielen; +- //len -= wps_ielen; +- +- #ifdef CONFIG_P2P +- if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) +- { +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("bcn_p2p_ielen=%d\n", p2p_ielen); +- #endif +- +- if(pmlmepriv->p2p_beacon_ie) +- { +- u32 free_len = pmlmepriv->p2p_beacon_ie_len; +- pmlmepriv->p2p_beacon_ie_len = 0; +- rtw_mfree(pmlmepriv->p2p_beacon_ie, free_len); +- pmlmepriv->p2p_beacon_ie = NULL; +- } +- +- pmlmepriv->p2p_beacon_ie = rtw_malloc(p2p_ielen); +- if ( pmlmepriv->p2p_beacon_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- return -EINVAL; +- +- } +- +- _rtw_memcpy(pmlmepriv->p2p_beacon_ie, p2p_ie, p2p_ielen); +- pmlmepriv->p2p_beacon_ie_len = p2p_ielen; +- +- } +- #endif //CONFIG_P2P +- +- //buf += p2p_ielen; +- //len -= p2p_ielen; +- +- #ifdef CONFIG_WFD +- if(rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen)) +- { +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("bcn_wfd_ielen=%d\n", wfd_ielen); +- #endif +- +- if(pmlmepriv->wfd_beacon_ie) +- { +- u32 free_len = pmlmepriv->wfd_beacon_ie_len; +- pmlmepriv->wfd_beacon_ie_len = 0; +- rtw_mfree(pmlmepriv->wfd_beacon_ie, free_len); +- pmlmepriv->wfd_beacon_ie = NULL; +- } +- +- pmlmepriv->wfd_beacon_ie = rtw_malloc(wfd_ielen); +- if ( pmlmepriv->wfd_beacon_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- return -EINVAL; +- +- } +- rtw_get_wfd_ie(buf, len, pmlmepriv->wfd_beacon_ie, &pmlmepriv->wfd_beacon_ie_len); +- } +- #endif //CONFIG_WFD +- +- pmlmeext->bstart_bss = _TRUE; +- +- } +- +- return ret; +- +-} +- +-static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *buf, int len) +-{ +- int ret = 0; +- uint wps_ielen = 0; +- u8 *wps_ie; +- u32 p2p_ielen = 0; +- u8 *p2p_ie; +- u32 wfd_ielen = 0; +- u8 *wfd_ie; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(net); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- +-#ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s, ielen=%d\n", __func__, len); +-#endif +- +- if(len>0) +- { +- if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) +- { +- uint attr_contentlen = 0; +- u16 uconfig_method, *puconfig_method = NULL; +- +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("probe_resp_wps_ielen=%d\n", wps_ielen); +- #endif +- +- if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) +- { +- u8 sr = 0; +- rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); +- +- if (sr != 0) +- { +- DBG_871X("%s, got sr\n", __func__); +- } +- else +- { +- DBG_8192C("GO mode process WPS under site-survey, sr no set\n"); +- return ret; +- } +- } +- +- if(pmlmepriv->wps_probe_resp_ie) +- { +- u32 free_len = pmlmepriv->wps_probe_resp_ie_len; +- pmlmepriv->wps_probe_resp_ie_len = 0; +- rtw_mfree(pmlmepriv->wps_probe_resp_ie, free_len); +- pmlmepriv->wps_probe_resp_ie = NULL; +- } +- +- pmlmepriv->wps_probe_resp_ie = rtw_malloc(wps_ielen); +- if ( pmlmepriv->wps_probe_resp_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- return -EINVAL; +- +- } +- +- //add PUSH_BUTTON config_method by driver self in wpsie of probe_resp at GO Mode +- if ( (puconfig_method = (u16*)rtw_get_wps_attr_content( wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD , NULL, &attr_contentlen)) != NULL ) +- { +- //struct registry_priv *pregistrypriv = &padapter->registrypriv; +- struct wireless_dev *wdev = padapter->rtw_wdev; +- +- #ifdef CONFIG_DEBUG_CFG80211 +- //printk("config_method in wpsie of probe_resp = 0x%x\n", be16_to_cpu(*puconfig_method)); +- #endif +- +- //if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- if(wdev->iftype != NL80211_IFTYPE_P2P_GO) //for WIFI-DIRECT LOGO 4.2.2, AUTO GO can't set PUSH_BUTTON flags +- { +- uconfig_method = WPS_CM_PUSH_BUTTON; +- uconfig_method = cpu_to_be16( uconfig_method ); +- +- *puconfig_method |= uconfig_method; +- } +- #endif +- } +- +- _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, wps_ie, wps_ielen); +- pmlmepriv->wps_probe_resp_ie_len = wps_ielen; +- +- } +- +- //buf += wps_ielen; +- //len -= wps_ielen; +- +- #ifdef CONFIG_P2P +- if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) +- { +- u8 is_GO = _FALSE; +- u32 attr_contentlen = 0; +- u16 cap_attr=0; +- +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("probe_resp_p2p_ielen=%d\n", p2p_ielen); +- #endif +- +- //Check P2P Capability ATTR +- if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) +- { +- u8 grp_cap=0; +- //DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); +- cap_attr = le16_to_cpu(cap_attr); +- grp_cap = (u8)((cap_attr >> 8)&0xff); +- +- is_GO = (grp_cap&BIT(0)) ? _TRUE:_FALSE; +- +- if(is_GO) +- DBG_8192C("Got P2P Capability Attr, grp_cap=0x%x, is_GO\n", grp_cap); +- } +- +- +- if(is_GO == _FALSE) +- { +- if(pmlmepriv->p2p_probe_resp_ie) +- { +- u32 free_len = pmlmepriv->p2p_probe_resp_ie_len; +- pmlmepriv->p2p_probe_resp_ie_len = 0; +- rtw_mfree(pmlmepriv->p2p_probe_resp_ie, free_len); +- pmlmepriv->p2p_probe_resp_ie = NULL; +- } +- +- pmlmepriv->p2p_probe_resp_ie = rtw_malloc(p2p_ielen); +- if ( pmlmepriv->p2p_probe_resp_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- return -EINVAL; +- +- } +- _rtw_memcpy(pmlmepriv->p2p_probe_resp_ie, p2p_ie, p2p_ielen); +- pmlmepriv->p2p_probe_resp_ie_len = p2p_ielen; +- } +- else +- { +- if(pmlmepriv->p2p_go_probe_resp_ie) +- { +- u32 free_len = pmlmepriv->p2p_go_probe_resp_ie_len; +- pmlmepriv->p2p_go_probe_resp_ie_len = 0; +- rtw_mfree(pmlmepriv->p2p_go_probe_resp_ie, free_len); +- pmlmepriv->p2p_go_probe_resp_ie = NULL; +- } +- +- pmlmepriv->p2p_go_probe_resp_ie = rtw_malloc(p2p_ielen); +- if ( pmlmepriv->p2p_go_probe_resp_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- return -EINVAL; +- +- } +- _rtw_memcpy(pmlmepriv->p2p_go_probe_resp_ie, p2p_ie, p2p_ielen); +- pmlmepriv->p2p_go_probe_resp_ie_len = p2p_ielen; +- } +- +- } +- #endif //CONFIG_P2P +- +- //buf += p2p_ielen; +- //len -= p2p_ielen; +- +- #ifdef CONFIG_WFD +- if(rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen)) +- { +- #ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("probe_resp_wfd_ielen=%d\n", wfd_ielen); +- #endif +- +- if(pmlmepriv->wfd_probe_resp_ie) +- { +- u32 free_len = pmlmepriv->wfd_probe_resp_ie_len; +- pmlmepriv->wfd_probe_resp_ie_len = 0; +- rtw_mfree(pmlmepriv->wfd_probe_resp_ie, free_len); +- pmlmepriv->wfd_probe_resp_ie = NULL; +- } +- +- pmlmepriv->wfd_probe_resp_ie = rtw_malloc(wfd_ielen); +- if ( pmlmepriv->wfd_probe_resp_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- return -EINVAL; +- +- } +- rtw_get_wfd_ie(buf, len, pmlmepriv->wfd_probe_resp_ie, &pmlmepriv->wfd_probe_resp_ie_len); +- } +- #endif //CONFIG_WFD +- +- } +- +- return ret; +- +-} +- +-static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *buf, int len) +-{ +- int ret = 0; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(net); +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- +- DBG_8192C("%s, ielen=%d\n", __func__, len); +- +- if(len>0) +- { +- if(pmlmepriv->wps_assoc_resp_ie) +- { +- u32 free_len = pmlmepriv->wps_assoc_resp_ie_len; +- pmlmepriv->wps_assoc_resp_ie_len = 0; +- rtw_mfree(pmlmepriv->wps_assoc_resp_ie, free_len); +- pmlmepriv->wps_assoc_resp_ie = NULL; +- } +- +- pmlmepriv->wps_assoc_resp_ie = rtw_malloc(len); +- if ( pmlmepriv->wps_assoc_resp_ie == NULL) { +- DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); +- return -EINVAL; +- +- } +- _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, buf, len); +- pmlmepriv->wps_assoc_resp_ie_len = len; +- } +- +- return ret; +- +-} +- +-int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, +- int type) +-{ +- int ret = 0; +- uint wps_ielen = 0; +- u32 p2p_ielen = 0; +- +-#ifdef CONFIG_DEBUG_CFG80211 +- DBG_8192C("%s, ielen=%d\n", __func__, len); +-#endif +- +- if( (rtw_get_wps_ie(buf, len, NULL, &wps_ielen) && (wps_ielen>0)) +- #ifdef CONFIG_P2P +- || (rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen) && (p2p_ielen>0)) +- #endif +- ) +- { +- if (net != NULL) +- { +- switch (type) +- { +- case 0x1: //BEACON +- ret = rtw_cfg80211_set_beacon_wpsp2pie(net, buf, len); +- break; +- case 0x2: //PROBE_RESP +- ret = rtw_cfg80211_set_probe_resp_wpsp2pie(net, buf, len); +- break; +- case 0x4: //ASSOC_RESP +- ret = rtw_cfg80211_set_assoc_resp_wpsp2pie(net, buf, len); +- break; +- } +- } +- } +- +- return ret; +- +-} +- +-static void rtw_cfg80211_init_ht_capab(struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type) +-{ +- +-#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */ +-#define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */ +- +- ht_cap->ht_supported = _TRUE; +- +- ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | +- IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 | +- IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU; +- +- /* +- *Maximum length of AMPDU that the STA can receive. +- *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets) +- */ +- ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; +- +- /*Minimum MPDU start spacing , */ +- ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; +- +- ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; +- +- /* +- *hw->wiphy->bands[IEEE80211_BAND_2GHZ] +- *base on ant_num +- *rx_mask: RX mask +- *if rx_ant =1 rx_mask[0]=0xff;==>MCS0-MCS7 +- *if rx_ant =2 rx_mask[1]=0xff;==>MCS8-MCS15 +- *if rx_ant >=3 rx_mask[2]=0xff; +- *if BW_40 rx_mask[4]=0x01; +- *highest supported RX rate +- */ +- if(rf_type == RF_1T1R) +- { +- ht_cap->mcs.rx_mask[0] = 0xFF; +- ht_cap->mcs.rx_mask[1] = 0x00; +- ht_cap->mcs.rx_mask[4] = 0x01; +- +- ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7; +- } +- else if((rf_type == RF_1T2R) || (rf_type==RF_2T2R)) +- { +- ht_cap->mcs.rx_mask[0] = 0xFF; +- ht_cap->mcs.rx_mask[1] = 0xFF; +- ht_cap->mcs.rx_mask[4] = 0x01; +- +- ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15; +- } +- else +- { +- DBG_8192C("%s, error rf_type=%d\n", __func__, rf_type); +- } +- +-} +- +-void rtw_cfg80211_init_wiphy(_adapter *padapter) +-{ +- u8 rf_type; +- struct ieee80211_supported_band *bands; +- struct wireless_dev *pwdev = padapter->rtw_wdev; +- struct wiphy *wiphy = pwdev->wiphy; +- +- rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); +- +- DBG_8192C("%s:rf_type=%d\n", __func__, rf_type); +- +- /* if (padapter->registrypriv.wireless_mode & WIRELESS_11G) */ +- { +- bands = wiphy->bands[IEEE80211_BAND_2GHZ]; +- if(bands) +- rtw_cfg80211_init_ht_capab(&bands->ht_cap, IEEE80211_BAND_2GHZ, rf_type); +- } +- +- /* if (padapter->registrypriv.wireless_mode & WIRELESS_11A) */ +- { +- bands = wiphy->bands[IEEE80211_BAND_5GHZ]; +- if(bands) +- rtw_cfg80211_init_ht_capab(&bands->ht_cap, IEEE80211_BAND_5GHZ, rf_type); +- } +- +- /* init regulary domain */ +- rtw_regd_init(padapter); +- +- /* copy mac_addr to wiphy */ +- _rtw_memcpy(wiphy->perm_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); +- +-} +- +-/* +-struct ieee80211_iface_limit rtw_limits[] = { +- { .max = 1, .types = BIT(NL80211_IFTYPE_STATION) +- | BIT(NL80211_IFTYPE_ADHOC) +-#ifdef CONFIG_AP_MODE +- | BIT(NL80211_IFTYPE_AP) +-#endif +-#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) +- | BIT(NL80211_IFTYPE_P2P_CLIENT) +- | BIT(NL80211_IFTYPE_P2P_GO) +-#endif +- }, +- {.max = 1, .types = BIT(NL80211_IFTYPE_MONITOR)}, +-}; +- +-struct ieee80211_iface_combination rtw_combinations = { +- .limits = rtw_limits, +- .n_limits = ARRAY_SIZE(rtw_limits), +- .max_interfaces = 2, +- .num_different_channels = 1, +-}; +-*/ +- +-static void rtw_cfg80211_preinit_wiphy(_adapter *padapter, struct wiphy *wiphy) +-{ +- +- wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; +- +- wiphy->max_scan_ssids = RTW_SSID_SCAN_AMOUNT; +- wiphy->max_scan_ie_len = RTW_SCAN_IE_LEN_MAX; +- wiphy->max_num_pmkids = RTW_MAX_NUM_PMKIDS; +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) +- wiphy->max_remain_on_channel_duration = RTW_MAX_REMAIN_ON_CHANNEL_DURATION; +-#endif +- +- wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) +- | BIT(NL80211_IFTYPE_ADHOC) +-#ifdef CONFIG_AP_MODE +- | BIT(NL80211_IFTYPE_AP) +- | BIT(NL80211_IFTYPE_MONITOR) +-#endif +-#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) +- | BIT(NL80211_IFTYPE_P2P_CLIENT) +- | BIT(NL80211_IFTYPE_P2P_GO) +-#endif +- ; +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +-#ifdef CONFIG_AP_MODE +- wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes; +-#endif //CONFIG_AP_MODE +-#endif +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) +- wiphy->software_iftypes |= BIT(NL80211_IFTYPE_MONITOR); +-#endif +- +- /* +- wiphy->iface_combinations = &rtw_combinations; +- wiphy->n_iface_combinations = 1; +- */ +- +- wiphy->cipher_suites = rtw_cipher_suites; +- wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites); +- +- /* if (padapter->registrypriv.wireless_mode & WIRELESS_11G) */ +- wiphy->bands[IEEE80211_BAND_2GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_2GHZ); +- /* if (padapter->registrypriv.wireless_mode & WIRELESS_11A) */ +- wiphy->bands[IEEE80211_BAND_5GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_5GHZ); +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38) && LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)) +- wiphy->flags |= WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS; +-#endif +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) +- wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; +- wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX | WIPHY_FLAG_HAVE_AP_SME; +-#endif +- +-#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) +- wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; +-#ifdef CONFIG_PNO_SUPPORT +- wiphy->max_sched_scan_ssids = MAX_PNO_LIST_COUNT; +-#endif +-#endif +- +-#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,11,0)) +- wiphy->wowlan = wowlan_stub; +-#else +- wiphy->wowlan = &wowlan_stub; +-#endif +-#endif +- +-#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) +- wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS; +- //wiphy->flags |= WIPHY_FLAG_TDLS_EXTERNAL_SETUP; +-#endif /* CONFIG_TDLS */ +- +- if(padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE) +- wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT; +- else +- wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) +- //wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM; +-#endif +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) +- rtw_cfgvendor_attach(wiphy); +-#endif +-} +- +-static struct cfg80211_ops rtw_cfg80211_ops = { +- .change_virtual_intf = cfg80211_rtw_change_iface, +- .add_key = cfg80211_rtw_add_key, +- .get_key = cfg80211_rtw_get_key, +- .del_key = cfg80211_rtw_del_key, +- .set_default_key = cfg80211_rtw_set_default_key, +- .get_station = cfg80211_rtw_get_station, +- .scan = cfg80211_rtw_scan, +- .set_wiphy_params = cfg80211_rtw_set_wiphy_params, +- .connect = cfg80211_rtw_connect, +- .disconnect = cfg80211_rtw_disconnect, +- .join_ibss = cfg80211_rtw_join_ibss, +- .leave_ibss = cfg80211_rtw_leave_ibss, +- .set_tx_power = cfg80211_rtw_set_txpower, +- .get_tx_power = cfg80211_rtw_get_txpower, +- .set_power_mgmt = cfg80211_rtw_set_power_mgmt, +- .set_pmksa = cfg80211_rtw_set_pmksa, +- .del_pmksa = cfg80211_rtw_del_pmksa, +- .flush_pmksa = cfg80211_rtw_flush_pmksa, +- +-#ifdef CONFIG_AP_MODE +- .add_virtual_intf = cfg80211_rtw_add_virtual_intf, +- .del_virtual_intf = cfg80211_rtw_del_virtual_intf, +- +- #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) +- .add_beacon = cfg80211_rtw_add_beacon, +- .set_beacon = cfg80211_rtw_set_beacon, +- .del_beacon = cfg80211_rtw_del_beacon, +- #else +- .start_ap = cfg80211_rtw_start_ap, +- .change_beacon = cfg80211_rtw_change_beacon, +- .stop_ap = cfg80211_rtw_stop_ap, +- #endif +- +- .add_station = cfg80211_rtw_add_station, +- .del_station = cfg80211_rtw_del_station, +- .change_station = cfg80211_rtw_change_station, +- .dump_station = cfg80211_rtw_dump_station, +- .change_bss = cfg80211_rtw_change_bss, +- #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) +- .set_channel = cfg80211_rtw_set_channel, +- #endif +- //.auth = cfg80211_rtw_auth, +- //.assoc = cfg80211_rtw_assoc, +-#endif //CONFIG_AP_MODE +- +-#ifdef CONFIG_P2P +- .remain_on_channel = cfg80211_rtw_remain_on_channel, +- .cancel_remain_on_channel = cfg80211_rtw_cancel_remain_on_channel, +-#endif +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +- .mgmt_tx = cfg80211_rtw_mgmt_tx, +- .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, +-#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) +- .action = cfg80211_rtw_mgmt_tx, +-#endif +- +-#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) +- .tdls_mgmt = cfg80211_rtw_tdls_mgmt, +- .tdls_oper = cfg80211_rtw_tdls_oper, +-#endif /* CONFIG_TDLS */ +- +-#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) +- .sched_scan_start = cfg80211_rtw_sched_scan_start, +- .sched_scan_stop = cfg80211_rtw_sched_scan_stop, +-#endif /* CONFIG_PNO_SUPPORT */ +-}; +- +-int rtw_wdev_alloc(_adapter *padapter, struct device *dev) +-{ +- int ret = 0; +- struct wiphy *wiphy; +- struct wireless_dev *wdev; +- struct rtw_wdev_priv *pwdev_priv; +- struct net_device *pnetdev = padapter->pnetdev; +- +- DBG_8192C("%s(padapter=%p)\n", __func__, padapter); +- +- /* wiphy */ +- wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(_adapter*)); +- if (!wiphy) { +- DBG_8192C("Couldn't allocate wiphy device\n"); +- ret = -ENOMEM; +- goto exit; +- } +- set_wiphy_dev(wiphy, dev); +- *((_adapter**)wiphy_priv(wiphy)) = padapter; +- rtw_cfg80211_preinit_wiphy(padapter, wiphy); +- +- ret = wiphy_register(wiphy); +- if (ret < 0) { +- DBG_8192C("Couldn't register wiphy device\n"); +- goto free_wiphy; +- } +- +- /* wdev */ +- wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); +- if (!wdev) { +- DBG_8192C("Couldn't allocate wireless device\n"); +- ret = -ENOMEM; +- goto unregister_wiphy; +- } +- wdev->wiphy = wiphy; +- wdev->netdev = pnetdev; +- +- wdev->iftype = NL80211_IFTYPE_STATION; // will be init in rtw_hal_init() +- // Must sync with _rtw_init_mlme_priv() +- // pmlmepriv->fw_state = WIFI_STATION_STATE +- //wdev->iftype = NL80211_IFTYPE_MONITOR; // for rtw_setopmode_cmd() in cfg80211_rtw_change_iface() +- padapter->rtw_wdev = wdev; +- pnetdev->ieee80211_ptr = wdev; +- +- //init pwdev_priv +- pwdev_priv = adapter_wdev_data(padapter); +- pwdev_priv->rtw_wdev = wdev; +- pwdev_priv->pmon_ndev = NULL; +- pwdev_priv->ifname_mon[0] = '\0'; +- pwdev_priv->padapter = padapter; +- pwdev_priv->scan_request = NULL; +- _rtw_spinlock_init(&pwdev_priv->scan_req_lock); +- +- pwdev_priv->p2p_enabled = _FALSE; +- pwdev_priv->provdisc_req_issued = _FALSE; +- rtw_wdev_invit_info_init(&pwdev_priv->invit_info); +- rtw_wdev_nego_info_init(&pwdev_priv->nego_info); +- +- pwdev_priv->bandroid_scan = _FALSE; +- +- if(padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE) +- pwdev_priv->power_mgmt = _TRUE; +- else +- pwdev_priv->power_mgmt = _FALSE; +- +-#ifdef CONFIG_CONCURRENT_MODE +- ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); +- ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); +-#endif +- +- return ret; +- +- rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); +-unregister_wiphy: +- wiphy_unregister(wiphy); +- free_wiphy: +- wiphy_free(wiphy); +-exit: +- return ret; +- +-} +- +-void rtw_wdev_free(struct wireless_dev *wdev) +-{ +- DBG_8192C("%s(wdev=%p)\n", __func__, wdev); +- +- if (!wdev) +- return; +- +- rtw_spt_band_free(wdev->wiphy->bands[IEEE80211_BAND_2GHZ]); +- rtw_spt_band_free(wdev->wiphy->bands[IEEE80211_BAND_5GHZ]); +- +- wiphy_free(wdev->wiphy); +- +- rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); +-} +- +-void rtw_wdev_unregister(struct wireless_dev *wdev) +-{ +- struct net_device *ndev; +- _adapter *adapter; +- struct rtw_wdev_priv *pwdev_priv; +- +- DBG_8192C("%s(wdev=%p)\n", __func__, wdev); +- +- if (!wdev) +- return; +- +- if(!(ndev = wdev_to_ndev(wdev))) +- return; +- +- adapter = (_adapter *)rtw_netdev_priv(ndev); +- pwdev_priv = adapter_wdev_data(adapter); +- +- rtw_cfg80211_indicate_scan_done(adapter, _TRUE); +- +- if (pwdev_priv->pmon_ndev) { +- DBG_8192C("%s, unregister monitor interface\n", __func__); +- unregister_netdev(pwdev_priv->pmon_ndev); +- } +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) +- rtw_cfgvendor_detach(wdev->wiphy); +-#endif +- +- wiphy_unregister(wdev->wiphy); +-} +- +-#endif //CONFIG_IOCTL_CFG80211 +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _IOCTL_CFG80211_C_ ++ ++#include ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) ++#define STATION_INFO_SIGNAL BIT(NL80211_STA_INFO_SIGNAL) ++#define STATION_INFO_TX_BITRATE BIT(NL80211_STA_INFO_TX_BITRATE) ++#define STATION_INFO_RX_PACKETS BIT(NL80211_STA_INFO_RX_PACKETS) ++#define STATION_INFO_TX_PACKETS BIT(NL80211_STA_INFO_TX_PACKETS) ++#define STATION_INFO_ASSOC_REQ_IES 0 ++#endif /* Linux kernel >= 4.0.0 */ ++ ++#include ++ ++#define RTW_MAX_MGMT_TX_CNT (8) ++#define RTW_MAX_MGMT_TX_MS_GAS (500) ++ ++#define RTW_SCAN_IE_LEN_MAX 2304 ++#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 5000 //ms ++#define RTW_MAX_NUM_PMKIDS 4 ++ ++#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ ++#ifndef WLAN_CIPHER_SUITE_SMS4 ++#define WLAN_CIPHER_SUITE_SMS4 0x00147201 ++#endif ++ ++#ifndef WLAN_AKM_SUITE_WAPI_PSK ++#define WLAN_AKM_SUITE_WAPI_PSK 0x000FAC04 ++#endif ++ ++#ifndef WLAN_AKM_SUITE_WAPI_CERT ++#define WLAN_AKM_SUITE_WAPI_CERT 0x000FAC12 ++#endif ++ ++#ifndef NL80211_WAPI_VERSION_1 ++#define NL80211_WAPI_VERSION_1 (1 << 2) ++#endif ++ ++#endif ++ ++#ifdef CONFIG_PLATFORM_ARM_SUN8I ++#define BUSY_TRAFFIC_SCAN_DENY_PERIOD 8000 ++#else ++#define BUSY_TRAFFIC_SCAN_DENY_PERIOD 12000 ++#endif ++ ++static const u32 rtw_cipher_suites[] = { ++ WLAN_CIPHER_SUITE_WEP40, ++ WLAN_CIPHER_SUITE_WEP104, ++ WLAN_CIPHER_SUITE_TKIP, ++ WLAN_CIPHER_SUITE_CCMP, ++#ifdef CONFIG_WAPI_SUPPORT ++ WLAN_CIPHER_SUITE_SMS4, ++#endif // CONFIG_WAPI_SUPPORT ++#ifdef CONFIG_IEEE80211W ++ WLAN_CIPHER_SUITE_AES_CMAC, ++#endif //CONFIG_IEEE80211W ++}; ++ ++#define RATETAB_ENT(_rate, _rateid, _flags) \ ++ { \ ++ .bitrate = (_rate), \ ++ .hw_value = (_rateid), \ ++ .flags = (_flags), \ ++ } ++ ++#define CHAN2G(_channel, _freq, _flags) { \ ++ .band = IEEE80211_BAND_2GHZ, \ ++ .center_freq = (_freq), \ ++ .hw_value = (_channel), \ ++ .flags = (_flags), \ ++ .max_antenna_gain = 0, \ ++ .max_power = 30, \ ++} ++ ++#define CHAN5G(_channel, _flags) { \ ++ .band = IEEE80211_BAND_5GHZ, \ ++ .center_freq = 5000 + (5 * (_channel)), \ ++ .hw_value = (_channel), \ ++ .flags = (_flags), \ ++ .max_antenna_gain = 0, \ ++ .max_power = 30, \ ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) ++/* if wowlan is not supported, kernel generate a disconnect at each suspend ++ * cf: /net/wireless/sysfs.c, so register a stub wowlan. ++ * Moreover wowlan has to be enabled via a the nl80211_set_wowlan callback. ++ * (from user space, e.g. iw phy0 wowlan enable) ++ */ ++static const struct wiphy_wowlan_support wowlan_stub = { ++ .flags = WIPHY_WOWLAN_ANY, ++ .n_patterns = 0, ++ .pattern_max_len = 0, ++ .pattern_min_len = 0, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) ++ .max_pkt_offset = 0, ++#endif ++}; ++#endif ++ ++static struct ieee80211_rate rtw_rates[] = { ++ RATETAB_ENT(10, 0x1, 0), ++ RATETAB_ENT(20, 0x2, 0), ++ RATETAB_ENT(55, 0x4, 0), ++ RATETAB_ENT(110, 0x8, 0), ++ RATETAB_ENT(60, 0x10, 0), ++ RATETAB_ENT(90, 0x20, 0), ++ RATETAB_ENT(120, 0x40, 0), ++ RATETAB_ENT(180, 0x80, 0), ++ RATETAB_ENT(240, 0x100, 0), ++ RATETAB_ENT(360, 0x200, 0), ++ RATETAB_ENT(480, 0x400, 0), ++ RATETAB_ENT(540, 0x800, 0), ++}; ++ ++#define rtw_a_rates (rtw_rates + 4) ++#define RTW_A_RATES_NUM 8 ++#define rtw_g_rates (rtw_rates + 0) ++#define RTW_G_RATES_NUM 12 ++ ++#define RTW_2G_CHANNELS_NUM 14 ++#define RTW_5G_CHANNELS_NUM 37 ++ ++static struct ieee80211_channel rtw_2ghz_channels[] = { ++ CHAN2G(1, 2412, 0), ++ CHAN2G(2, 2417, 0), ++ CHAN2G(3, 2422, 0), ++ CHAN2G(4, 2427, 0), ++ CHAN2G(5, 2432, 0), ++ CHAN2G(6, 2437, 0), ++ CHAN2G(7, 2442, 0), ++ CHAN2G(8, 2447, 0), ++ CHAN2G(9, 2452, 0), ++ CHAN2G(10, 2457, 0), ++ CHAN2G(11, 2462, 0), ++ CHAN2G(12, 2467, 0), ++ CHAN2G(13, 2472, 0), ++ CHAN2G(14, 2484, 0), ++}; ++ ++static struct ieee80211_channel rtw_5ghz_a_channels[] = { ++ CHAN5G(34, 0), CHAN5G(36, 0), ++ CHAN5G(38, 0), CHAN5G(40, 0), ++ CHAN5G(42, 0), CHAN5G(44, 0), ++ CHAN5G(46, 0), CHAN5G(48, 0), ++ CHAN5G(52, 0), CHAN5G(56, 0), ++ CHAN5G(60, 0), CHAN5G(64, 0), ++ CHAN5G(100, 0), CHAN5G(104, 0), ++ CHAN5G(108, 0), CHAN5G(112, 0), ++ CHAN5G(116, 0), CHAN5G(120, 0), ++ CHAN5G(124, 0), CHAN5G(128, 0), ++ CHAN5G(132, 0), CHAN5G(136, 0), ++ CHAN5G(140, 0), CHAN5G(149, 0), ++ CHAN5G(153, 0), CHAN5G(157, 0), ++ CHAN5G(161, 0), CHAN5G(165, 0), ++ CHAN5G(184, 0), CHAN5G(188, 0), ++ CHAN5G(192, 0), CHAN5G(196, 0), ++ CHAN5G(200, 0), CHAN5G(204, 0), ++ CHAN5G(208, 0), CHAN5G(212, 0), ++ CHAN5G(216, 0), ++}; ++ ++ ++void rtw_2g_channels_init(struct ieee80211_channel *channels) ++{ ++ _rtw_memcpy((void*)channels, (void*)rtw_2ghz_channels, ++ sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM ++ ); ++} ++ ++void rtw_5g_channels_init(struct ieee80211_channel *channels) ++{ ++ _rtw_memcpy((void*)channels, (void*)rtw_5ghz_a_channels, ++ sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM ++ ); ++} ++ ++void rtw_2g_rates_init(struct ieee80211_rate *rates) ++{ ++ _rtw_memcpy(rates, rtw_g_rates, ++ sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM ++ ); ++} ++ ++void rtw_5g_rates_init(struct ieee80211_rate *rates) ++{ ++ _rtw_memcpy(rates, rtw_a_rates, ++ sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM ++ ); ++} ++ ++struct ieee80211_supported_band *rtw_spt_band_alloc( ++ enum ieee80211_band band ++ ) ++{ ++ struct ieee80211_supported_band *spt_band = NULL; ++ int n_channels, n_bitrates; ++ ++ if(band == IEEE80211_BAND_2GHZ) ++ { ++ n_channels = RTW_2G_CHANNELS_NUM; ++ n_bitrates = RTW_G_RATES_NUM; ++ } ++ else if(band == IEEE80211_BAND_5GHZ) ++ { ++ n_channels = RTW_5G_CHANNELS_NUM; ++ n_bitrates = RTW_A_RATES_NUM; ++ } ++ else ++ { ++ goto exit; ++ } ++ ++ spt_band = (struct ieee80211_supported_band *)rtw_zmalloc( ++ sizeof(struct ieee80211_supported_band) ++ + sizeof(struct ieee80211_channel)*n_channels ++ + sizeof(struct ieee80211_rate)*n_bitrates ++ ); ++ if(!spt_band) ++ goto exit; ++ ++ spt_band->channels = (struct ieee80211_channel*)(((u8*)spt_band)+sizeof(struct ieee80211_supported_band)); ++ spt_band->bitrates= (struct ieee80211_rate*)(((u8*)spt_band->channels)+sizeof(struct ieee80211_channel)*n_channels); ++ spt_band->band = band; ++ spt_band->n_channels = n_channels; ++ spt_band->n_bitrates = n_bitrates; ++ ++ if(band == IEEE80211_BAND_2GHZ) ++ { ++ rtw_2g_channels_init(spt_band->channels); ++ rtw_2g_rates_init(spt_band->bitrates); ++ } ++ else if(band == IEEE80211_BAND_5GHZ) ++ { ++ rtw_5g_channels_init(spt_band->channels); ++ rtw_5g_rates_init(spt_band->bitrates); ++ } ++ ++ //spt_band.ht_cap ++ ++exit: ++ ++ return spt_band; ++} ++ ++void rtw_spt_band_free(struct ieee80211_supported_band *spt_band) ++{ ++ u32 size = 0; ++ ++ if(!spt_band) ++ return; ++ ++ if(spt_band->band == IEEE80211_BAND_2GHZ) ++ { ++ size = sizeof(struct ieee80211_supported_band) ++ + sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM ++ + sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM; ++ } ++ else if(spt_band->band == IEEE80211_BAND_5GHZ) ++ { ++ size = sizeof(struct ieee80211_supported_band) ++ + sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM ++ + sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM; ++ } ++ else ++ { ++ ++ } ++ rtw_mfree((u8*)spt_band, size); ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++static const struct ieee80211_txrx_stypes ++rtw_cfg80211_default_mgmt_stypes[NUM_NL80211_IFTYPES] = { ++ [NL80211_IFTYPE_ADHOC] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_STATION] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) ++ }, ++ [NL80211_IFTYPE_AP] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_AP_VLAN] = { ++ /* copy AP */ ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_P2P_CLIENT] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) ++ }, ++ [NL80211_IFTYPE_P2P_GO] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++}; ++#endif ++ ++static u64 rtw_get_systime_us(void) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,39)) ++ struct timespec ts; ++ get_monotonic_boottime(&ts); ++ return ((u64)ts.tv_sec*1000000) + ts.tv_nsec / 1000; ++#else ++ struct timeval tv; ++ do_gettimeofday(&tv); ++ return ((u64)tv.tv_sec*1000000) + tv.tv_usec; ++#endif ++} ++ ++#define MAX_BSSINFO_LEN 1000 ++struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork) ++{ ++ struct ieee80211_channel *notify_channel; ++ struct cfg80211_bss *bss = NULL; ++ //struct ieee80211_supported_band *band; ++ u16 channel; ++ u32 freq; ++ u64 notify_timestamp; ++ u16 notify_capability; ++ u16 notify_interval; ++ u8 *notify_ie; ++ size_t notify_ielen; ++ s32 notify_signal; ++ //u8 buf[MAX_BSSINFO_LEN]; ++ ++ u8 *pbuf; ++ size_t buf_size = MAX_BSSINFO_LEN; ++ size_t len,bssinf_len=0; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ struct wireless_dev *wdev = padapter->rtw_wdev; ++ struct wiphy *wiphy = wdev->wiphy; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ pbuf = rtw_zmalloc(buf_size); ++ if(pbuf == NULL){ ++ DBG_871X("%s pbuf allocate failed !! \n",__FUNCTION__); ++ return bss; ++ } ++ ++ //DBG_8192C("%s\n", __func__); ++ ++ bssinf_len = pnetwork->network.IELength+sizeof (struct rtw_ieee80211_hdr_3addr); ++ if(bssinf_len > buf_size){ ++ DBG_871X("%s IE Length too long > %zu byte \n",__FUNCTION__,buf_size); ++ goto exit; ++ } ++ ++#ifndef CONFIG_WAPI_SUPPORT ++ { ++ u16 wapi_len = 0; ++ ++ if(rtw_get_wapi_ie(pnetwork->network.IEs, pnetwork->network.IELength, NULL, &wapi_len)>0) ++ { ++ if(wapi_len > 0) ++ { ++ DBG_871X("%s, no support wapi!\n",__FUNCTION__); ++ goto exit; ++ } ++ } ++ } ++#endif //!CONFIG_WAPI_SUPPORT ++ ++ //To reduce PBC Overlap rate ++ //_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ if(adapter_wdev_data(padapter)->scan_request != NULL) ++ { ++ u8 *psr=NULL, sr = 0; ++ NDIS_802_11_SSID *pssid = &pnetwork->network.Ssid; ++ struct cfg80211_scan_request *request = adapter_wdev_data(padapter)->scan_request; ++ struct cfg80211_ssid *ssids = request->ssids; ++ u32 wpsielen=0; ++ u8 *wpsie=NULL; ++ ++ wpsie = rtw_get_wps_ie(pnetwork->network.IEs+_FIXED_IE_LENGTH_, pnetwork->network.IELength-_FIXED_IE_LENGTH_, NULL, &wpsielen); ++ ++ if(wpsie && wpsielen>0) ++ psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); ++ ++ if (sr != 0) ++ { ++ if(request->n_ssids == 1 && request->n_channels == 1) // it means under processing WPS ++ { ++ DBG_8192C("ssid=%s, len=%d\n", pssid->Ssid, pssid->SsidLength); ++ ++ if (ssids[0].ssid_len == 0) { ++ } ++ else if(pssid->SsidLength == ssids[0].ssid_len && ++ _rtw_memcmp(pssid->Ssid, ssids[0].ssid, ssids[0].ssid_len)) ++ { ++ DBG_871X("%s, got sr and ssid match!\n", __func__); ++ } ++ else ++ { ++ if(psr !=NULL) ++ *psr = 0; //clear sr ++ ++#if 0 ++ WLAN_BSSID_EX *pselect_network = &pnetwork->network; ++ struct cfg80211_bss *pselect_bss = NULL; ++ struct ieee80211_channel *notify_channel = NULL; ++ u32 freq; ++ ++ DBG_871X("%s, got sr, but ssid mismatch, to remove this bss\n", __func__); ++ ++ freq = rtw_ch2freq(pselect_network->Configuration.DSConfig); ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ pselect_bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, ++ pselect_network->MacAddress, pselect_network->Ssid.Ssid, ++ pselect_network->Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, ++ 0/*WLAN_CAPABILITY_ESS*/); ++ ++ if(pselect_bss) ++ { ++ DBG_871X("%s, got bss for cfg80211 for unlinking bss\n", __func__); ++ ++ cfg80211_unlink_bss(wiphy, pselect_bss); ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) ++ cfg80211_put_bss(wiphy, pselect_bss); ++#else ++ cfg80211_put_bss(pselect_bss); ++#endif ++ ++ } ++ ++ goto exit; ++#endif ++ } ++ } ++ } ++ } ++ //_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ ++ ++ channel = pnetwork->network.Configuration.DSConfig; ++ freq = rtw_ch2freq(channel); ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ ++ if (0) ++ notify_timestamp = le64_to_cpu(*(u64*)rtw_get_timestampe_from_ie(pnetwork->network.IEs)); ++ else ++ notify_timestamp = rtw_get_systime_us(); ++ ++ notify_interval = le16_to_cpu(*(u16*)rtw_get_beacon_interval_from_ie(pnetwork->network.IEs)); ++ notify_capability = le16_to_cpu(*(u16*)rtw_get_capability_from_ie(pnetwork->network.IEs)); ++ ++ notify_ie = pnetwork->network.IEs+_FIXED_IE_LENGTH_; ++ notify_ielen = pnetwork->network.IELength-_FIXED_IE_LENGTH_; ++ ++ //We've set wiphy's signal_type as CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) ++ if ( check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE && ++ is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)) { ++ notify_signal = 100*translate_percentage_to_dbm(padapter->recvpriv.signal_strength);//dbm ++ } else { ++ notify_signal = 100*translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm ++ } ++ ++ #if 0 ++ DBG_8192C("bssid: "MAC_FMT"\n", MAC_ARG(pnetwork->network.MacAddress)); ++ DBG_8192C("Channel: %d(%d)\n", channel, freq); ++ DBG_8192C("Capability: %X\n", notify_capability); ++ DBG_8192C("Beacon interval: %d\n", notify_interval); ++ DBG_8192C("Signal: %d\n", notify_signal); ++ DBG_8192C("notify_timestamp: %llu\n", notify_timestamp); ++ #endif ++ ++ //pbuf = buf; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pbuf; ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); ++ //pmlmeext->mgnt_seq++; ++ ++ if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ SetFrameSubType(pbuf, WIFI_BEACON); ++ } else { ++ _rtw_memcpy(pwlanhdr->addr1, adapter_mac_addr(padapter), ETH_ALEN); ++ SetFrameSubType(pbuf, WIFI_PROBERSP); ++ } ++ ++ _rtw_memcpy(pwlanhdr->addr2, pnetwork->network.MacAddress, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pnetwork->network.MacAddress, ETH_ALEN); ++ ++ ++ //pbuf += sizeof(struct rtw_ieee80211_hdr_3addr); ++ len = sizeof (struct rtw_ieee80211_hdr_3addr); ++ _rtw_memcpy((pbuf+len), pnetwork->network.IEs, pnetwork->network.IELength); ++ *((u64*)(pbuf+len)) = cpu_to_le64(notify_timestamp); ++ ++ len += pnetwork->network.IELength; ++ ++ //#ifdef CONFIG_P2P ++ //if(rtw_get_p2p_ie(pnetwork->network.IEs+12, pnetwork->network.IELength-12, NULL, NULL)) ++ //{ ++ // DBG_8192C("%s, got p2p_ie\n", __func__); ++ //} ++ //#endif ++ ++#if 1 ++ bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)pbuf, ++ len, notify_signal, GFP_ATOMIC); ++#else ++ ++ bss = cfg80211_inform_bss(wiphy, notify_channel, (const u8 *)pnetwork->network.MacAddress, ++ notify_timestamp, notify_capability, notify_interval, notify_ie, ++ notify_ielen, notify_signal, GFP_ATOMIC/*GFP_KERNEL*/); ++#endif ++ ++ if (unlikely(!bss)) { ++ DBG_8192C(FUNC_ADPT_FMT" bss NULL\n", FUNC_ADPT_ARG(padapter)); ++ goto exit; ++ } ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38)) ++#ifndef COMPAT_KERNEL_RELEASE ++ //patch for cfg80211, update beacon ies to information_elements ++ if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON ++ ++ if(bss->len_information_elements != bss->len_beacon_ies) ++ { ++ bss->information_elements = bss->beacon_ies; ++ bss->len_information_elements = bss->len_beacon_ies; ++ } ++ } ++#endif //COMPAT_KERNEL_RELEASE ++#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) ++ ++/* ++ { ++ if( bss->information_elements == bss->proberesp_ies) ++ { ++ if( bss->len_information_elements != bss->len_proberesp_ies) ++ { ++ DBG_8192C("error!, len_information_elements != bss->len_proberesp_ies\n"); ++ } ++ ++ } ++ else if(bss->len_information_elements < bss->len_beacon_ies) ++ { ++ bss->information_elements = bss->beacon_ies; ++ bss->len_information_elements = bss->len_beacon_ies; ++ } ++ } ++*/ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) ++ cfg80211_put_bss(wiphy, bss); ++#else ++ cfg80211_put_bss(bss); ++#endif ++ ++exit: ++ if(pbuf) ++ rtw_mfree(pbuf, buf_size); ++ return bss; ++ ++} ++ ++/* ++ Check the given bss is valid by kernel API cfg80211_get_bss() ++ @padapter : the given adapter ++ ++ return _TRUE if bss is valid, _FALSE for not found. ++*/ ++int rtw_cfg80211_check_bss(_adapter *padapter) ++{ ++ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); ++ struct cfg80211_bss *bss = NULL; ++ struct ieee80211_channel *notify_channel = NULL; ++ u32 freq; ++ ++ if (!(pnetwork) || !(padapter->rtw_wdev)) ++ return _FALSE; ++ ++ freq = rtw_ch2freq(pnetwork->Configuration.DSConfig); ++ notify_channel = ieee80211_get_channel(padapter->rtw_wdev->wiphy, freq); ++ bss = cfg80211_get_bss(padapter->rtw_wdev->wiphy, notify_channel, ++ pnetwork->MacAddress, pnetwork->Ssid.Ssid, ++ pnetwork->Ssid.SsidLength, ++ WLAN_CAPABILITY_ESS, WLAN_CAPABILITY_ESS); ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) ++ cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); ++#else ++ cfg80211_put_bss(bss); ++#endif ++ ++ return (bss!=NULL); ++} ++ ++void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct cfg80211_bss *bss = NULL; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) ++ struct wiphy *wiphy = pwdev->wiphy; ++ int freq = 2412; ++ struct ieee80211_channel *notify_channel; ++#endif ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) ++ freq = rtw_ch2freq(cur_network->network.Configuration.DSConfig); ++ ++ if (0) ++ DBG_871X("chan: %d, freq: %d\n", cur_network->network.Configuration.DSConfig, freq); ++#endif ++ ++ if (pwdev->iftype != NL80211_IFTYPE_ADHOC) ++ { ++ return; ++ } ++ ++ if (!rtw_cfg80211_check_bss(padapter)) { ++ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); ++ struct wlan_network *scanned = pmlmepriv->cur_network_scanned; ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE) ++ { ++ ++ _rtw_memcpy(&cur_network->network, pnetwork, sizeof(WLAN_BSSID_EX)); ++ if(cur_network) ++ { ++ if (!rtw_cfg80211_inform_bss(padapter,cur_network)) ++ DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); ++ else ++ DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); ++ } ++ else ++ { ++ DBG_871X("cur_network is not exist!!!\n"); ++ return ; ++ } ++ } ++ else ++ { ++ if(scanned == NULL) ++ rtw_warn_on(1); ++ ++ if (_rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE ++ && _rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE ++ ) { ++ if (!rtw_cfg80211_inform_bss(padapter,scanned)) { ++ DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); ++ } else { ++ //DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); ++ } ++ } else { ++ DBG_871X("scanned & pnetwork compare fail\n"); ++ rtw_warn_on(1); ++ } ++ } ++ ++ if (!rtw_cfg80211_check_bss(padapter)) ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); ++ } ++ //notify cfg80211 that device joined an IBSS ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, notify_channel, GFP_ATOMIC); ++#else ++ cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, GFP_ATOMIC); ++#endif ++} ++ ++void rtw_cfg80211_indicate_connect(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif ++ struct cfg80211_bss *bss = NULL; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ if (pwdev->iftype != NL80211_IFTYPE_STATION ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT ++ #endif ++ ) { ++ return; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ return; ++ ++#ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ } ++ } ++#endif //CONFIG_P2P ++ ++ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) != _TRUE) { ++ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); ++ struct wlan_network *scanned = pmlmepriv->cur_network_scanned; ++ ++ //DBG_871X(FUNC_ADPT_FMT" BSS not found\n", FUNC_ADPT_ARG(padapter)); ++ ++ if(scanned == NULL) { ++ rtw_warn_on(1); ++ goto check_bss; ++ } ++ ++ if (_rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE ++ && _rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE ++ ) { ++ if (!rtw_cfg80211_inform_bss(padapter,scanned)) { ++ DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); ++ } else { ++ //DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); ++ } ++ } else { ++ DBG_871X("scanned: %s("MAC_FMT"), cur: %s("MAC_FMT")\n", ++ scanned->network.Ssid.Ssid, MAC_ARG(scanned->network.MacAddress), ++ pnetwork->Ssid.Ssid, MAC_ARG(pnetwork->MacAddress) ++ ); ++ rtw_warn_on(1); ++ } ++ } ++ ++check_bss: ++ if (!rtw_cfg80211_check_bss(padapter)) ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); ++ ++ if (rtw_to_roam(padapter) > 0) { ++ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) ++ struct wiphy *wiphy = pwdev->wiphy; ++ struct ieee80211_channel *notify_channel; ++ u32 freq; ++ u16 channel = cur_network->network.Configuration.DSConfig; ++ ++ freq = rtw_ch2freq(channel); ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ #endif ++ ++ DBG_871X(FUNC_ADPT_FMT" call cfg80211_roamed\n", FUNC_ADPT_ARG(padapter)); ++ cfg80211_roamed(padapter->pnetdev ++ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) ++ , notify_channel ++ #endif ++ , cur_network->network.MacAddress ++ , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 ++ , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 ++ , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 ++ , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 ++ , GFP_ATOMIC); ++ } ++ else ++ { ++ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) ++ DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); ++ #endif ++ cfg80211_connect_result(padapter->pnetdev, cur_network->network.MacAddress ++ , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 ++ , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 ++ , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 ++ , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 ++ , WLAN_STATUS_SUCCESS, GFP_ATOMIC); ++ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) ++ DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); ++ #endif ++ } ++} ++ ++void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generated) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++ /*always replace privated definitions with wifi reserved value 0*/ ++ if ((reason == WLAN_REASON_ACTIVE_ROAM) || (reason == WLAN_REASON_JOIN_WRONG_CHANNEL) || (reason == WLAN_REASON_EXPIRATION_CHK)) { ++ reason = 0; ++ } ++ ++ if (pwdev->iftype != NL80211_IFTYPE_STATION ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT ++ #endif ++ ) { ++ return; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ return; ++ ++#ifdef CONFIG_P2P ++ if( pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) ++ if (pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT) ++ #endif ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ ++ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ } ++ } ++#endif //CONFIG_P2P ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ if (!padapter->mlmepriv.not_indic_disco || padapter->ndev_unregistering) { ++ #else ++ { ++ #endif ++ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) ++ DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); ++ ++ if(pwdev->sme_state==CFG80211_SME_CONNECTING) ++ cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, ++ WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); ++ else if (pwdev->sme_state == CFG80211_SME_CONNECTED) { ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0)) ++ cfg80211_disconnected(padapter->pnetdev, reason, NULL, 0, locally_generated, GFP_ATOMIC); ++#else ++ cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC); ++#endif ++ } ++ //else ++ //DBG_8192C("pwdev->sme_state=%d\n", pwdev->sme_state); ++ ++ DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); ++ #else ++ ++ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0)) ++ DBG_871X(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter)); ++ cfg80211_disconnected(padapter->pnetdev, reason, NULL, 0, locally_generated, GFP_ATOMIC); ++#else ++ DBG_871X(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter)); ++ cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC); ++#endif ++ } else { ++ DBG_871X(FUNC_ADPT_FMT" call cfg80211_connect_result\n", FUNC_ADPT_ARG(padapter)); ++ cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, ++ WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC); ++ } ++ #endif ++ } ++} ++ ++ ++#ifdef CONFIG_AP_MODE ++static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ struct sta_info *psta = NULL, *pbcmc_sta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_8192C("%s\n", __FUNCTION__); ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ //sizeof(struct ieee_param) = 64 bytes; ++ //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ if (param->u.crypt.idx >= WEP_KEYS ++#ifdef CONFIG_IEEE80211W ++ && param->u.crypt.idx > BIP_MAX_KEYID ++#endif /* CONFIG_IEEE80211W */ ++ ) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } ++ else ++ { ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(!psta) ++ { ++ //ret = -EINVAL; ++ DBG_8192C("rtw_set_encryption(), sta has already been removed or never been added\n"); ++ goto exit; ++ } ++ } ++ ++ if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) ++ { ++ //todo:clear default encryption keys ++ ++ DBG_8192C("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); ++ ++ goto exit; ++ } ++ ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) ++ { ++ DBG_8192C("r871x_set_encryption, crypt.alg = WEP\n"); ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ DBG_8192C("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); ++ ++ if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ } ++ ++ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) ++ { ++ //wep default key has not been set, so use this key index as default key. ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP40_; ++ ++ if(wep_key_len == 13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP104_; ++ } ++ ++ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; ++ } ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; ++ ++ rtw_ap_set_wep_key(padapter, param->u.crypt.key, wep_key_len, wep_key_idx, 1); ++ ++ goto exit; ++ ++ } ++ ++ ++ if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key ++ { ++ if(param->u.crypt.set_tx == 0) //group key ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_8192C("%s, set group_key, WEP\n", __FUNCTION__); ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_8192C("%s, set group_key, TKIP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ DBG_8192C("%s, set group_key, CCMP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++#ifdef CONFIG_IEEE80211W ++ else if (strcmp(param->u.crypt.alg, "BIP") == 0) { ++ int no; ++ ++ DBG_871X("BIP key_len=%d , index=%d\n", param->u.crypt.key_len, param->u.crypt.idx); ++ /* save the IGTK key, length 16 bytes */ ++ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16:param->u.crypt.key_len)); ++ /* DBG_871X("IGTK key below:\n"); ++ for(no=0;no<16;no++) ++ printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); ++ DBG_871X("\n"); */ ++ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; ++ padapter->securitypriv.binstallBIPkey = _TRUE; ++ DBG_871X(" ~~~~set sta key:IGKT\n"); ++ goto exit; ++ } ++#endif /* CONFIG_IEEE80211W */ ++ else ++ { ++ DBG_8192C("%s, set group_key, none\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ goto exit; ++ ++ } ++ ++ if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x ++ { ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++ if(param->u.crypt.set_tx ==1) //pairwise key ++ { ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_8192C("%s, set pairwise key, WEP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psta->dot118021XPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_8192C("%s, set pairwise key, TKIP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _TKIP_; ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ ++ DBG_8192C("%s, set pairwise key, CCMP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _AES_; ++ } ++ else ++ { ++ DBG_8192C("%s, set pairwise key, none\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _NO_PRIVACY_; ++ } ++ ++ rtw_ap_set_pairwise_key(padapter, psta); ++ ++ psta->ieee8021x_blocked = _FALSE; ++ ++ psta->bpairwise_key_installed = _TRUE; ++ ++ } ++ else//group key??? ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++ else ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ } ++ ++ } ++ ++exit: ++ ++ return ret; ++ ++} ++#endif ++ ++static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++_func_enter_; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ if (param->u.crypt.idx >= WEP_KEYS ++#ifdef CONFIG_IEEE80211W ++ && param->u.crypt.idx > BIP_MAX_KEYID ++#endif //CONFIG_IEEE80211W ++ ) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } else { ++#ifdef CONFIG_WAPI_SUPPORT ++ if (strcmp(param->u.crypt.alg, "SMS4")) ++#endif ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); ++ DBG_8192C("wpa_set_encryption, crypt.alg = WEP\n"); ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ if ((wep_key_idx > WEP_KEYS) || (wep_key_len <= 0)) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) ++ { ++ //wep default key has not been set, so use this key index as default key. ++ ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ ++ if(wep_key_len==13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; ++ } ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; ++ ++ rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0, _TRUE); ++ ++ goto exit; ++ } ++ ++ if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x ++ { ++ struct sta_info * psta,*pbcmc_sta; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ ++ //DBG_8192C("%s, : dot11AuthAlgrthm == dot11AuthAlgrthm_8021X \n", __func__); ++ ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode ++ { ++ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ if (psta == NULL) { ++ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); ++ DBG_8192C("%s, : Obtain Sta_info fail \n", __func__); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ psta->ieee8021x_blocked = _FALSE; ++ ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ ++ if(param->u.crypt.set_tx ==1)//pairwise key ++ { ++ ++ DBG_8192C("%s, : param->u.crypt.set_tx ==1 \n", __func__); ++ ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key ++ { ++ //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ padapter->securitypriv.busetkipkey=_FALSE; ++ //_set_timer(&padapter->securitypriv.tkip_timer, 50); ++ } ++ psta->bpairwise_key_installed = _TRUE; ++ //DEBUG_ERR((" param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); ++ DBG_871X(" ~~~~set sta key:unicastkey\n"); ++ ++ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY, _TRUE); ++ } ++ else//group key ++ { ++ if(strcmp(param->u.crypt.alg, "TKIP") == 0 || strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); ++ padapter->securitypriv.binstallGrpkey = _TRUE; ++ //DEBUG_ERR((" param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ DBG_871X(" ~~~~set sta key:groupkey\n"); ++ ++ padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; ++ rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1, _TRUE); ++ } ++#ifdef CONFIG_IEEE80211W ++ else if(strcmp(param->u.crypt.alg, "BIP") == 0) ++ { ++ int no; ++ //DBG_871X("BIP key_len=%d , index=%d @@@@@@@@@@@@@@@@@@\n", param->u.crypt.key_len, param->u.crypt.idx); ++ //save the IGTK key, length 16 bytes ++ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ /*DBG_871X("IGTK key below:\n"); ++ for(no=0;no<16;no++) ++ printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); ++ DBG_871X("\n");*/ ++ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; ++ padapter->securitypriv.binstallBIPkey = _TRUE; ++ DBG_871X(" ~~~~set sta key:IGKT\n"); ++ } ++#endif //CONFIG_IEEE80211W ++ ++#ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); ++ } ++ } ++#endif //CONFIG_P2P ++ ++ } ++ } ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta==NULL) ++ { ++ //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ } ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode ++ { ++ } ++ } ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ if (strcmp(param->u.crypt.alg, "SMS4") == 0) ++ { ++ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; ++ PRT_WAPI_STA_INFO pWapiSta; ++ u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; ++ ++ if(param->u.crypt.set_tx == 1) ++ { ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if(_rtw_memcmp(pWapiSta->PeerMacAddr,param->sta_addr,6)) ++ { ++ _rtw_memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); ++ ++ pWapiSta->wapiUsk.bSet = true; ++ _rtw_memcpy(pWapiSta->wapiUsk.dataKey,param->u.crypt.key,16); ++ _rtw_memcpy(pWapiSta->wapiUsk.micKey,param->u.crypt.key+16,16); ++ pWapiSta->wapiUsk.keyId = param->u.crypt.idx ; ++ pWapiSta->wapiUsk.bTxEnable = true; ++ ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16); ++ _rtw_memcpy(pWapiSta->lastRxUnicastPN,WapiAEPNInitialValueSrc,16); ++ pWapiSta->wapiUskUpdate.bTxEnable = false; ++ pWapiSta->wapiUskUpdate.bSet = false; ++ ++ if (psecuritypriv->sw_encrypt== false || psecuritypriv->sw_decrypt == false) ++ { ++ //set unicast key for ASUE ++ rtw_wapi_set_key(padapter, &pWapiSta->wapiUsk, pWapiSta, false, false); ++ } ++ } ++ } ++ } ++ else ++ { ++ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { ++ if(_rtw_memcmp(pWapiSta->PeerMacAddr,get_bssid(pmlmepriv),6)) ++ { ++ pWapiSta->wapiMsk.bSet = true; ++ _rtw_memcpy(pWapiSta->wapiMsk.dataKey,param->u.crypt.key,16); ++ _rtw_memcpy(pWapiSta->wapiMsk.micKey,param->u.crypt.key+16,16); ++ pWapiSta->wapiMsk.keyId = param->u.crypt.idx ; ++ pWapiSta->wapiMsk.bTxEnable = false; ++ if(!pWapiSta->bSetkeyOk) ++ pWapiSta->bSetkeyOk = true; ++ pWapiSta->bAuthenticateInProgress = false; ++ ++ _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); ++ ++ if (psecuritypriv->sw_decrypt == false) ++ { ++ //set rx broadcast key for ASUE ++ rtw_wapi_set_key(padapter, &pWapiSta->wapiMsk, pWapiSta, true, false); ++ } ++ } ++ ++ } ++ } ++ } ++#endif ++ ++ ++exit: ++ ++ DBG_8192C("%s, ret=%d\n", __func__, ret); ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ u8 key_index, bool pairwise, const u8 *mac_addr, ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr, ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ struct key_params *params) ++{ ++ char *alg_name; ++ u32 param_len; ++ struct ieee_param *param = NULL; ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#ifdef CONFIG_TDLS ++ struct sta_info *ptdls_sta; ++#endif /* CONFIG_TDLS */ ++ ++ DBG_871X(FUNC_NDEV_FMT" adding key for %pM\n", FUNC_NDEV_ARG(ndev), mac_addr); ++ DBG_871X("cipher=0x%x\n", params->cipher); ++ DBG_871X("key_len=0x%x\n", params->key_len); ++ DBG_871X("seq_len=0x%x\n", params->seq_len); ++ DBG_871X("key_index=%d\n", key_index); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ DBG_871X("pairwise=%d\n", pairwise); ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ ++ param_len = sizeof(struct ieee_param) + params->key_len; ++ param = (struct ieee_param *)rtw_malloc(param_len); ++ if (param == NULL) ++ return -1; ++ ++ _rtw_memset(param, 0, param_len); ++ ++ param->cmd = IEEE_CMD_SET_ENCRYPTION; ++ _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); ++ ++ switch (params->cipher) { ++ case IW_AUTH_CIPHER_NONE: ++ //todo: remove key ++ //remove = 1; ++ alg_name = "none"; ++ break; ++ case WLAN_CIPHER_SUITE_WEP40: ++ case WLAN_CIPHER_SUITE_WEP104: ++ alg_name = "WEP"; ++ break; ++ case WLAN_CIPHER_SUITE_TKIP: ++ alg_name = "TKIP"; ++ break; ++ case WLAN_CIPHER_SUITE_CCMP: ++ alg_name = "CCMP"; ++ break; ++#ifdef CONFIG_IEEE80211W ++ case WLAN_CIPHER_SUITE_AES_CMAC: ++ alg_name = "BIP"; ++ break; ++#endif //CONFIG_IEEE80211W ++#ifdef CONFIG_WAPI_SUPPORT ++ case WLAN_CIPHER_SUITE_SMS4: ++ alg_name= "SMS4"; ++ if(pairwise == NL80211_KEYTYPE_PAIRWISE) { ++ if (key_index != 0 && key_index != 1) { ++ ret = -ENOTSUPP; ++ goto addkey_end; ++ } ++ _rtw_memcpy((void*)param->sta_addr, (void*)mac_addr, ETH_ALEN); ++ } else { ++ DBG_871X("mac_addr is null \n"); ++ } ++ DBG_871X("rtw_wx_set_enc_ext: SMS4 case \n"); ++ break; ++#endif ++ ++ default: ++ ret = -ENOTSUPP; ++ goto addkey_end; ++ } ++ ++ strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); ++ ++ ++ if (!mac_addr || is_broadcast_ether_addr(mac_addr)) ++ { ++ param->u.crypt.set_tx = 0; //for wpa/wpa2 group key ++ } else { ++ param->u.crypt.set_tx = 1; //for wpa/wpa2 pairwise key ++ } ++ ++ ++ //param->u.crypt.idx = key_index - 1; ++ param->u.crypt.idx = key_index; ++ ++ if (params->seq_len && params->seq) ++ { ++ _rtw_memcpy(param->u.crypt.seq, (u8 *)params->seq, params->seq_len); ++ } ++ ++ if(params->key_len && params->key) ++ { ++ param->u.crypt.key_len = params->key_len; ++ _rtw_memcpy(param->u.crypt.key, (u8 *)params->key, params->key_len); ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++#ifdef CONFIG_TDLS ++ if (rtw_tdls_is_driver_setup(padapter) == _FALSE && mac_addr) { ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, (void *)mac_addr); ++ if (ptdls_sta != NULL && ptdls_sta->tdls_sta_state) { ++ _rtw_memcpy(ptdls_sta->tpk.tk, params->key, params->key_len); ++ rtw_tdls_set_key(padapter, ptdls_sta); ++ goto addkey_end; ++ } ++ } ++#endif /* CONFIG_TDLS */ ++ ++ ret = rtw_cfg80211_set_encryption(ndev, param, param_len); ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++#ifdef CONFIG_AP_MODE ++ if(mac_addr) ++ _rtw_memcpy(param->sta_addr, (void*)mac_addr, ETH_ALEN); ++ ++ ret = rtw_cfg80211_ap_set_encryption(ndev, param, param_len); ++#endif ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE ++ || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ //DBG_8192C("@@@@@@@@@@ fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); ++ ret = rtw_cfg80211_set_encryption(ndev, param, param_len); ++ } ++ else ++ { ++ DBG_8192C("error! fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); ++ ++ } ++ ++addkey_end: ++ if(param) ++ { ++ rtw_mfree((u8*)param, param_len); ++ } ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ u8 key_index, bool pairwise, const u8 *mac_addr, ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr, ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ void *cookie, ++ void (*callback)(void *cookie, ++ struct key_params*)) ++{ ++#if 0 ++ struct iwm_priv *iwm = ndev_to_iwm(ndev); ++ struct iwm_key *key = &iwm->keys[key_index]; ++ struct key_params params; ++ ++ IWM_DBG_WEXT(iwm, DBG, "Getting key %d\n", key_index); ++ ++ memset(¶ms, 0, sizeof(params)); ++ ++ params.cipher = key->cipher; ++ params.key_len = key->key_len; ++ params.seq_len = key->seq_len; ++ params.seq = key->seq; ++ params.key = key->key; ++ ++ callback(cookie, ¶ms); ++ ++ return key->key_len ? 0 : -ENOENT; ++#endif ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ return 0; ++} ++ ++static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ u8 key_index, bool pairwise, const u8 *mac_addr) ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr) ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ DBG_871X(FUNC_NDEV_FMT" key_index=%d\n", FUNC_NDEV_ARG(ndev), key_index); ++ ++ if (key_index == psecuritypriv->dot11PrivacyKeyIndex) ++ { ++ //clear the flag of wep default key set. ++ psecuritypriv->bWepDefaultKeyIdxSet = 0; ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, ++ struct net_device *ndev, u8 key_index ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ , bool unicast, bool multicast ++ #endif ++ ) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++#define SET_DEF_KEY_PARAM_FMT " key_index=%d" ++#define SET_DEF_KEY_PARAM_ARG , key_index ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) ++ #define SET_DEF_KEY_PARAM_FMT_2_6_38 ", unicast=%d, multicast=%d" ++ #define SET_DEF_KEY_PARAM_ARG_2_6_38 , unicast, multicast ++#else ++ #define SET_DEF_KEY_PARAM_FMT_2_6_38 "" ++ #define SET_DEF_KEY_PARAM_ARG_2_6_38 ++#endif ++ ++ DBG_871X(FUNC_NDEV_FMT ++ SET_DEF_KEY_PARAM_FMT ++ SET_DEF_KEY_PARAM_FMT_2_6_38 ++ "\n", FUNC_NDEV_ARG(ndev) ++ SET_DEF_KEY_PARAM_ARG ++ SET_DEF_KEY_PARAM_ARG_2_6_38 ++ ); ++ ++ if ((key_index < WEP_KEYS) && ((psecuritypriv->dot11PrivacyAlgrthm == _WEP40_) || (psecuritypriv->dot11PrivacyAlgrthm == _WEP104_))) //set wep default key ++ { ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ ++ psecuritypriv->dot11PrivacyKeyIndex = key_index; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if (psecuritypriv->dot11DefKeylen[key_index] == 13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ psecuritypriv->bWepDefaultKeyIdxSet = 1; //set the flag to represent that wep default key has been set ++ } ++ ++ return 0; ++ ++} ++#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0)) ++static int cfg80211_rtw_set_rekey_data(struct wiphy *wiphy, ++ struct net_device *ndev, ++ struct cfg80211_gtk_rekey_data *data) ++{ ++ /*int i;*/ ++ struct sta_info *psta; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct security_priv *psecuritypriv = &(padapter->securitypriv); ++ ++ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ if (psta == NULL) { ++ DBG_871X("%s, : Obtain Sta_info fail\n", __func__); ++ return -1; ++ } ++ ++ _rtw_memcpy(psta->kek, data->kek, NL80211_KEK_LEN); ++ /*printk("\ncfg80211_rtw_set_rekey_data KEK:"); ++ for(i=0;ikek[i]);*/ ++ _rtw_memcpy(psta->kck, data->kck, NL80211_KCK_LEN); ++ /*printk("\ncfg80211_rtw_set_rekey_data KCK:"); ++ for(i=0;ikck[i]);*/ ++ _rtw_memcpy(psta->replay_ctr, data->replay_ctr, NL80211_REPLAY_CTR_LEN); ++ psecuritypriv->binstallKCK_KEK = _TRUE; ++ /*printk("\nREPLAY_CTR: "); ++ for(i=0;ireplay_ctr[i]);*/ ++ ++ return 0; ++} ++#endif /*CONFIG_GTK_OL*/ ++static int cfg80211_rtw_get_station(struct wiphy *wiphy, ++ struct net_device *ndev, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) ++ u8 *mac, ++#else ++ const u8 *mac, ++#endif ++ struct station_info *sinfo) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ sinfo->filled = 0; ++ ++ if (!mac) { ++ DBG_871X(FUNC_NDEV_FMT" mac==%p\n", FUNC_NDEV_ARG(ndev), mac); ++ ret = -ENOENT; ++ goto exit; ++ } ++ ++ psta = rtw_get_stainfo(pstapriv, (u8 *)mac); ++ if (psta == NULL) { ++ DBG_8192C("%s, sta_info is null\n", __func__); ++ ret = -ENOENT; ++ goto exit; ++ } ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_NDEV_FMT" mac="MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(mac)); ++#endif ++ ++ //for infra./P2PClient mode ++ if( check_fwstate(pmlmepriv, WIFI_STATION_STATE) ++ && check_fwstate(pmlmepriv, _FW_LINKED) ++ ) ++ { ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ ++ if (_rtw_memcmp((u8 *)mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) { ++ DBG_871X("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); ++ ret = -ENOENT; ++ goto exit; ++ } ++ ++ sinfo->filled |= STATION_INFO_SIGNAL; ++ sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); ++ ++ sinfo->filled |= STATION_INFO_TX_BITRATE; ++ sinfo->txrate.legacy = rtw_get_cur_max_rate(padapter); ++ ++ sinfo->filled |= STATION_INFO_RX_PACKETS; ++ sinfo->rx_packets = sta_rx_data_pkts(psta); ++ ++ sinfo->filled |= STATION_INFO_TX_PACKETS; ++ sinfo->tx_packets = psta->sta_stats.tx_pkts; ++ ++ } ++ ++ //for Ad-Hoc/AP mode ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) ++ ||check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) ++ ||check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ && check_fwstate(pmlmepriv, _FW_LINKED) ++ ) ++ { ++ //TODO: should acquire station info... ++ } ++ ++exit: ++ return ret; ++} ++ ++extern int netdev_open(struct net_device *pnetdev); ++#ifdef CONFIG_CONCURRENT_MODE ++extern int netdev_if2_open(struct net_device *pnetdev); ++#endif ++ ++/* ++enum nl80211_iftype { ++ NL80211_IFTYPE_UNSPECIFIED, ++ NL80211_IFTYPE_ADHOC, //1 ++ NL80211_IFTYPE_STATION, //2 ++ NL80211_IFTYPE_AP, //3 ++ NL80211_IFTYPE_AP_VLAN, ++ NL80211_IFTYPE_WDS, ++ NL80211_IFTYPE_MONITOR, //6 ++ NL80211_IFTYPE_MESH_POINT, ++ NL80211_IFTYPE_P2P_CLIENT, //8 ++ NL80211_IFTYPE_P2P_GO, //9 ++ //keep last ++ NUM_NL80211_IFTYPES, ++ NL80211_IFTYPE_MAX = NUM_NL80211_IFTYPES - 1 ++}; ++*/ ++static int cfg80211_rtw_change_iface(struct wiphy *wiphy, ++ struct net_device *ndev, ++ enum nl80211_iftype type, u32 *flags, ++ struct vif_params *params) ++{ ++ enum nl80211_iftype old_type; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif ++ int ret = 0; ++ u8 change = _FALSE; ++ ++ DBG_871X(FUNC_NDEV_FMT" type=%d\n", FUNC_NDEV_ARG(ndev), type); ++ ++ if(adapter_to_dvobj(padapter)->processing_dev_remove == _TRUE) ++ { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->adapter_type == SECONDARY_ADAPTER) ++ { ++ DBG_871X(FUNC_NDEV_FMT" call netdev_if2_open\n", FUNC_NDEV_ARG(ndev)); ++ if(netdev_if2_open(ndev) != 0) { ++ DBG_871X(FUNC_NDEV_FMT" call netdev_if2_open fail\n", FUNC_NDEV_ARG(ndev)); ++ ret= -EPERM; ++ goto exit; ++ } ++ } ++ else if(padapter->adapter_type == PRIMARY_ADAPTER) ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ DBG_871X(FUNC_NDEV_FMT" call netdev_open\n", FUNC_NDEV_ARG(ndev)); ++ if(netdev_open(ndev) != 0) { ++ DBG_871X(FUNC_NDEV_FMT" call netdev_open fail\n", FUNC_NDEV_ARG(ndev)); ++ ret= -EPERM; ++ goto exit; ++ } ++ } ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ DBG_871X(FUNC_NDEV_FMT" call rtw_pwr_wakeup fail\n", FUNC_NDEV_ARG(ndev)); ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ old_type = rtw_wdev->iftype; ++ DBG_871X(FUNC_NDEV_FMT" old_iftype=%d, new_iftype=%d\n", ++ FUNC_NDEV_ARG(ndev), old_type, type); ++ ++ if(old_type != type) ++ { ++ change = _TRUE; ++ pmlmeext->action_public_rxseq = 0xffff; ++ pmlmeext->action_public_dialog_token = 0xff; ++ } ++ ++ /* initial default type */ ++ ndev->type = ARPHRD_ETHER; ++ ++ switch (type) { ++ case NL80211_IFTYPE_ADHOC: ++ networkType = Ndis802_11IBSS; ++ break; ++#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) ++ case NL80211_IFTYPE_P2P_CLIENT: ++#endif ++ case NL80211_IFTYPE_STATION: ++ networkType = Ndis802_11Infrastructure; ++ #ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(change && rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ //it means remove GO and change mode from AP(GO) to station(P2P DEVICE) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ ++ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ } ++ #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) ++ if (type == NL80211_IFTYPE_P2P_CLIENT) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ else { ++ /* NL80211_IFTYPE_STATION */ ++ if (rtw_p2p_role(pwdinfo) == P2P_ROLE_CLIENT) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ } ++ #endif ++ } ++ #endif //CONFIG_P2P ++ break; ++#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) ++ case NL80211_IFTYPE_P2P_GO: ++#endif ++ case NL80211_IFTYPE_AP: ++ networkType = Ndis802_11APMode; ++ #ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(change && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ //it means P2P Group created, we will be GO and change mode from P2P DEVICE to AP(GO) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ } ++ #endif //CONFIG_P2P ++ break; ++ case NL80211_IFTYPE_MONITOR: ++ networkType = Ndis802_11Monitor; ++#if 0 ++ ndev->type = ARPHRD_IEEE80211; /* IEEE 802.11 : 801 */ ++#endif ++ ndev->type = ARPHRD_IEEE80211_RADIOTAP; /* IEEE 802.11 + radiotap header : 803 */ ++ break; ++ default: ++ ret = -EOPNOTSUPP; ++ goto exit; ++ } ++ ++ rtw_wdev->iftype = type; ++ ++ if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE) ++ { ++ rtw_wdev->iftype = old_type; ++ ret = -EPERM; ++ goto exit; ++ } ++ ++ rtw_setopmode_cmd(padapter, networkType, _TRUE); ++ ++exit: ++ ++ DBG_871X(FUNC_NDEV_FMT" ret:%d\n", FUNC_NDEV_ARG(ndev), ret); ++ return ret; ++} ++ ++void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted) ++{ ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); ++ _irqL irqL; ++ ++ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ if (pwdev_priv->scan_request != NULL) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s with scan req\n", __FUNCTION__); ++ #endif ++ ++ /* avoid WARN_ON(request != wiphy_to_dev(request->wiphy)->scan_req); */ ++ if(pwdev_priv->scan_request->wiphy != pwdev_priv->rtw_wdev->wiphy) ++ { ++ DBG_8192C("error wiphy compare\n"); ++ } ++ else ++ { ++ cfg80211_scan_done(pwdev_priv->scan_request, aborted); ++ } ++ ++ pwdev_priv->scan_request = NULL; ++ } else { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s without scan req\n", __FUNCTION__); ++ #endif ++ } ++ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++} ++ ++u32 rtw_cfg80211_wait_scan_req_empty(_adapter *adapter, u32 timeout_ms) ++{ ++ struct rtw_wdev_priv *wdev_priv = adapter_wdev_data(adapter); ++ u8 empty = _FALSE; ++ u32 start; ++ u32 pass_ms; ++ ++ start = rtw_get_current_time(); ++ ++ while (rtw_get_passing_time_ms(start) <= timeout_ms) { ++ ++ if (RTW_CANNOT_RUN(adapter)) ++ break; ++ ++ if (!wdev_priv->scan_request) { ++ empty = _TRUE; ++ break; ++ } ++ ++ rtw_msleep_os(10); ++ } ++ ++ pass_ms = rtw_get_passing_time_ms(start); ++ ++ if (empty == _FALSE && pass_ms > timeout_ms) ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" pass_ms:%u, timeout\n" ++ , FUNC_ADPT_ARG(adapter), pass_ms); ++ ++ return pass_ms; ++} ++ ++void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork) ++{ ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct wiphy *wiphy = pwdev->wiphy; ++ struct cfg80211_bss *bss = NULL; ++ WLAN_BSSID_EX select_network = pnetwork->network; ++ ++ bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, ++ select_network.MacAddress, select_network.Ssid.Ssid, ++ select_network.Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, ++ 0/*WLAN_CAPABILITY_ESS*/); ++ ++ if (bss) { ++ cfg80211_unlink_bss(wiphy, bss); ++ DBG_8192C("%s(): cfg80211_unlink %s!! () ",__func__,select_network.Ssid.Ssid ); ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) ++ cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); ++#else ++ cfg80211_put_bss(bss); ++#endif ++ } ++ return; ++} ++ ++void rtw_cfg80211_surveydone_event_callback(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u32 cnt=0; ++ u32 wait_for_surveydone; ++ sint wait_status; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s\n", __func__); ++#endif ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ //report network only if the current channel set contains the channel to which this network belongs ++ if(rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0 ++ && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE ++ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) ++ ) ++ { ++ //ev=translate_scan(padapter, a, pnetwork, ev, stop); ++ rtw_cfg80211_inform_bss(padapter, pnetwork); ++ } ++ /* //check ralink testbed RSN IE length ++ { ++ if(_rtw_memcmp(pnetwork->network.Ssid.Ssid, "Ralink_11n_AP",13)) ++ { ++ uint ie_len=0; ++ u8 *p=NULL; ++ p = rtw_get_ie(pnetwork->network.IEs + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pnetwork->network.IELength - _BEACON_IE_OFFSET_)); ++ DBG_871X("ie_len=%d\n", ie_len); ++ } ++ }*/ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++} ++ ++static int rtw_cfg80211_set_probe_req_wpsp2pie(_adapter *padapter, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 *p2p_ie; ++ u32 wfd_ielen = 0; ++ u8 *wfd_ie; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_req_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(pmlmepriv->wps_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_req_ie_len; ++ pmlmepriv->wps_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); ++ pmlmepriv->wps_probe_req_ie = NULL; ++ } ++ ++ pmlmepriv->wps_probe_req_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_probe_req_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->wps_probe_req_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_probe_req_ie_len = wps_ielen; ++ } ++ ++ //buf += wps_ielen; ++ //len -= wps_ielen; ++ ++ #ifdef CONFIG_P2P ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ struct wifidirect_info *wdinfo = &padapter->wdinfo; ++ u32 attr_contentlen = 0; ++ u8 listen_ch_attr[5]; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_req_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_probe_req_ie_len; ++ pmlmepriv->p2p_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_probe_req_ie, free_len); ++ pmlmepriv->p2p_probe_req_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_probe_req_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_probe_req_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_probe_req_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_probe_req_ie_len = p2p_ielen; ++ ++ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, (u8*)listen_ch_attr, (uint*) &attr_contentlen) ++ && attr_contentlen == 5) ++ { ++ if (wdinfo->listen_channel != listen_ch_attr[4]) { ++ DBG_871X(FUNC_ADPT_FMT" listen channel - country:%c%c%c, class:%u, ch:%u\n", ++ FUNC_ADPT_ARG(padapter), listen_ch_attr[0], listen_ch_attr[1], listen_ch_attr[2], ++ listen_ch_attr[3], listen_ch_attr[4]); ++ wdinfo->listen_channel = listen_ch_attr[4]; ++ } ++ } ++ } ++ #endif //CONFIG_P2P ++ ++ #ifdef CONFIG_WFD ++ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_req_wfd_ielen=%d\n", wfd_ielen); ++ #endif ++ ++ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_PROBE_REQ_IE, wfd_ie, wfd_ielen) != _SUCCESS) ++ return -EINVAL; ++ } ++ #endif /* CONFIG_WFD */ ++ } ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_scan(struct wiphy *wiphy ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) ++ , struct net_device *ndev ++ #endif ++ , struct cfg80211_scan_request *request) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(request->wdev); ++#endif ++ int i; ++ u8 _status = _FALSE; ++ int ret = 0; ++ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; ++ struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT]; ++ _irqL irqL; ++ u8 *wps_ie=NULL; ++ uint wps_ielen=0; ++ u8 *p2p_ie=NULL; ++ uint p2p_ielen=0; ++ u8 survey_times=3; ++ u8 survey_times_for_one_ch=6; ++ struct cfg80211_ssid *ssids = request->ssids; ++ int social_channel = 0, j = 0; ++ bool need_indicate_scan_done = _FALSE; ++ bool ps_denied = _FALSE; ++ ++ _adapter *padapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ struct mlme_priv *pmlmepriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo; ++#endif //CONFIG_P2P ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = NULL; ++ struct mlme_priv *pbuddy_mlmepriv = NULL; ++#endif //CONFIG_CONCURRENT_MODE ++ ++ if (ndev == NULL) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ padapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(padapter); ++ pmlmepriv= &padapter->mlmepriv; ++#ifdef CONFIG_P2P ++ pwdinfo= &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ ++//#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++//#endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->pbuddy_adapter) { ++ pbuddy_adapter = padapter->pbuddy_adapter; ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++#ifdef CONFIG_MP_INCLUDED ++if (padapter->registrypriv.mp_mode == 1) ++{ ++ DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter)); ++ ret = -EPERM; ++ goto exit; ++} ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->pbuddy_adapter) { ++ if (padapter->pbuddy_adapter->registrypriv.mp_mode == 1) ++ { ++ DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter)); ++ ret = -EPERM; ++ goto exit; ++ } ++ } ++#endif //CONFIG_CONCURRENT_MODE ++#endif ++ ++ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ pwdev_priv->scan_request = request; ++ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ ++ if (adapter_wdev_data(padapter)->block_scan == _TRUE) { ++ DBG_871X(FUNC_ADPT_FMT" wdev_priv.block_scan is set\n", FUNC_ADPT_ARG(padapter)); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s under WIFI_AP_STATE\n", __FUNCTION__); ++#endif ++ ++ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); ++ ++ if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) ++ { ++ DBG_8192C("AP mode process WPS \n"); ++ } ++ ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ } ++ ++ rtw_ps_deny(padapter, PS_DENY_SCAN); ++ ps_denied = _TRUE; ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++ #ifdef CONFIG_P2P ++ if( pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(ssids->ssid != NULL ++ && _rtw_memcmp(ssids->ssid, "DIRECT-", 7) ++ && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) ++ ) ++ { ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); ++ adapter_wdev_data(padapter)->p2p_enabled = _TRUE; ++ } ++ else ++ { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++ #endif ++ } ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ ++ if(request->n_channels == 3 && ++ request->channels[0]->hw_value == 1 && ++ request->channels[1]->hw_value == 6 && ++ request->channels[2]->hw_value == 11 ++ ) ++ { ++ social_channel = 1; ++ } ++ } ++ } ++ #endif //CONFIG_P2P ++ ++ if(request->ie && request->ie_len>0) ++ { ++ rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len ); ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); ++ ret = -EBUSY; ++ goto check_need_indicate_scan_done; ++ } ++ ++ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) ++ { ++#if 1 // Miracast can't do AP scan ++ static u32 lastscantime = 0; ++ u32 passtime; ++ ++ passtime = rtw_get_passing_time_ms(lastscantime); ++ lastscantime = rtw_get_current_time(); ++ if (passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) ++#endif ++ { ++ DBG_871X("%s: bBusyTraffic == _TRUE\n", __FUNCTION__); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ } ++ ++ if (rtw_is_scan_deny(padapter)){ ++ DBG_871X(FUNC_ADPT_FMT ": scan deny\n", FUNC_ADPT_ARG(padapter)); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pbuddy_mlmepriv && (pbuddy_mlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)) ++ { ++#if 1 // Miracast can't do AP scan ++ static u32 buddylastscantime = 0; ++ u32 passtime; ++ ++ passtime = rtw_get_passing_time_ms(buddylastscantime); ++ buddylastscantime = rtw_get_current_time(); ++ if ((passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) ++//#ifdef CONFIG_P2P ++// ||(!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) ++//#endif //CONFIG_P2P ++ ) ++#endif ++ { ++ DBG_871X("%s: bBusyTraffic == _TRUE at buddy_intf\n", __FUNCTION__); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ } ++ ++ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) { ++ DBG_871X("buddy_intf's mlme state:0x%x\n", pbuddy_mlmepriv->fw_state); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ ++ } else if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY)) { ++ bool scan_via_buddy = _FALSE; ++ struct rtw_wdev_priv *buddy_wdev_priv = adapter_wdev_data(pbuddy_adapter); ++ ++ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ _enter_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); ++ if (buddy_wdev_priv->scan_request) { ++ DBG_871X("scan via buddy\n"); ++ pmlmepriv->scanning_via_buddy_intf = _TRUE; ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ set_fwstate(pmlmepriv, _FW_UNDER_SURVEY); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ scan_via_buddy = _TRUE; ++ } ++ _exit_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); ++ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ ++ if (scan_via_buddy == _FALSE) ++ need_indicate_scan_done = _TRUE; ++ ++ goto check_need_indicate_scan_done; ++ } ++#endif /* CONFIG_CONCURRENT_MODE */ ++ ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); ++ rtw_free_network_queue(padapter, _TRUE); ++ ++ if(social_channel == 0) ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); ++ else ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_SOCIAL_LAST); ++ } ++#endif //CONFIG_P2P ++ ++ ++ _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); ++ //parsing request ssids, n_ssids ++ for (i = 0; i < request->n_ssids && i < RTW_SSID_SCAN_AMOUNT; i++) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("ssid=%s, len=%d\n", ssids[i].ssid, ssids[i].ssid_len); ++ #endif ++ _rtw_memcpy(ssid[i].Ssid, ssids[i].ssid, ssids[i].ssid_len); ++ ssid[i].SsidLength = ssids[i].ssid_len; ++ } ++ ++ /* parsing channels, n_channels */ ++ _rtw_memset(ch, 0, sizeof(struct rtw_ieee80211_channel)*RTW_CHANNEL_SCAN_AMOUNT); ++ for (i=0;in_channels && ichannels[i])); ++ #endif ++ ch[i].hw_value = request->channels[i]->hw_value; ++ ch[i].flags = request->channels[i]->flags; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ if (request->n_channels == 1) { ++ for(i=1;in_channels <= 4) { ++ for(j=request->n_channels-1;j>=0;j--) ++ for(i=0;in_channels); ++ } else { ++ _status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT, NULL, 0); ++ } ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++ if(_status == _FALSE) ++ { ++ ret = -1; ++ } ++ ++check_need_indicate_scan_done: ++ if (_TRUE == need_indicate_scan_done) ++ { ++ rtw_cfg80211_surveydone_event_callback(padapter); ++ rtw_cfg80211_indicate_scan_done(padapter, _FALSE); ++ } ++ ++cancel_ps_deny: ++ if (ps_denied == _TRUE) ++ rtw_ps_deny_cancel(padapter, PS_DENY_SCAN); ++ ++exit: ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed) ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ ++ if (changed & WIPHY_PARAM_RTS_THRESHOLD && ++ (iwm->conf.rts_threshold != wiphy->rts_threshold)) { ++ int ret; ++ ++ iwm->conf.rts_threshold = wiphy->rts_threshold; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, ++ CFG_RTS_THRESHOLD, ++ iwm->conf.rts_threshold); ++ if (ret < 0) ++ return ret; ++ } ++ ++ if (changed & WIPHY_PARAM_FRAG_THRESHOLD && ++ (iwm->conf.frag_threshold != wiphy->frag_threshold)) { ++ int ret; ++ ++ iwm->conf.frag_threshold = wiphy->frag_threshold; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_FA_CFG_FIX, ++ CFG_FRAG_THRESHOLD, ++ iwm->conf.frag_threshold); ++ if (ret < 0) ++ return ret; ++ } ++#endif ++ DBG_8192C("%s\n", __func__); ++ return 0; ++} ++ ++ ++ ++static int rtw_cfg80211_set_wpa_version(struct security_priv *psecuritypriv, u32 wpa_version) ++{ ++ DBG_8192C("%s, wpa_version=%d\n", __func__, wpa_version); ++ ++ if (!wpa_version) { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ return 0; ++ } ++ ++ ++ if (wpa_version & (NL80211_WPA_VERSION_1 | NL80211_WPA_VERSION_2)) ++ { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; ++ } ++ ++/* ++ if (wpa_version & NL80211_WPA_VERSION_2) ++ { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; ++ } ++*/ ++ ++ #ifdef CONFIG_WAPI_SUPPORT ++ if (wpa_version & NL80211_WAPI_VERSION_1) ++ { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWAPI; ++ } ++ #endif ++ ++ return 0; ++ ++} ++ ++static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, ++ enum nl80211_auth_type sme_auth_type) ++{ ++ DBG_8192C("%s, nl80211_auth_type=%d\n", __func__, sme_auth_type); ++ ++ ++ switch (sme_auth_type) { ++ case NL80211_AUTHTYPE_AUTOMATIC: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++ ++ break; ++ case NL80211_AUTHTYPE_OPEN_SYSTEM: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; ++ ++ if(psecuritypriv->ndisauthtype>Ndis802_11AuthModeWPA) ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ if(psecuritypriv->ndisauthtype == Ndis802_11AuthModeWAPI) ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; ++#endif ++ ++ break; ++ case NL80211_AUTHTYPE_SHARED_KEY: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ ++ ++ break; ++ default: ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; ++ //return -ENOTSUPP; ++ } ++ ++ return 0; ++ ++} ++ ++static int rtw_cfg80211_set_cipher(struct security_priv *psecuritypriv, u32 cipher, bool ucast) ++{ ++ u32 ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ ++ u32 *profile_cipher = ucast ? &psecuritypriv->dot11PrivacyAlgrthm : ++ &psecuritypriv->dot118021XGrpPrivacy; ++ ++ DBG_8192C("%s, ucast=%d, cipher=0x%x\n", __func__, ucast, cipher); ++ ++ ++ if (!cipher) { ++ *profile_cipher = _NO_PRIVACY_; ++ psecuritypriv->ndisencryptstatus = ndisencryptstatus; ++ return 0; ++ } ++ ++ switch (cipher) { ++ case IW_AUTH_CIPHER_NONE: ++ *profile_cipher = _NO_PRIVACY_; ++ ndisencryptstatus = Ndis802_11EncryptionDisabled; ++#ifdef CONFIG_WAPI_SUPPORT ++ if(psecuritypriv->dot11PrivacyAlgrthm ==_SMS4_ ) ++ { ++ *profile_cipher = _SMS4_; ++ } ++#endif ++ break; ++ case WLAN_CIPHER_SUITE_WEP40: ++ *profile_cipher = _WEP40_; ++ ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_WEP104: ++ *profile_cipher = _WEP104_; ++ ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_TKIP: ++ *profile_cipher = _TKIP_; ++ ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_CCMP: ++ *profile_cipher = _AES_; ++ ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++#ifdef CONFIG_WAPI_SUPPORT ++ case WLAN_CIPHER_SUITE_SMS4: ++ *profile_cipher = _SMS4_; ++ ndisencryptstatus = Ndis802_11_EncrypteionWAPI; ++ break; ++#endif ++ default: ++ DBG_8192C("Unsupported cipher: 0x%x\n", cipher); ++ return -ENOTSUPP; ++ } ++ ++ if(ucast) ++ { ++ psecuritypriv->ndisencryptstatus = ndisencryptstatus; ++ ++ //if(psecuritypriv->dot11PrivacyAlgrthm >= _AES_) ++ // psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; ++ } ++ ++ return 0; ++} ++ ++static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key_mgt) ++{ ++ DBG_8192C("%s, key_mgt=0x%x\n", __func__, key_mgt); ++ ++ if (key_mgt == WLAN_AKM_SUITE_8021X) ++ //*auth_type = UMAC_AUTH_TYPE_8021X; ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ else if (key_mgt == WLAN_AKM_SUITE_PSK) { ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ } ++#ifdef CONFIG_WAPI_SUPPORT ++ else if(key_mgt ==WLAN_AKM_SUITE_WAPI_PSK){ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; ++ } ++ else if(key_mgt ==WLAN_AKM_SUITE_WAPI_CERT){ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; ++ } ++#endif ++ ++ ++ else { ++ DBG_8192C("Invalid key mgt: 0x%x\n", key_mgt); ++ //return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen) ++{ ++ u8 *buf=NULL, *pos=NULL; ++ u32 left; ++ int group_cipher = 0, pairwise_cipher = 0; ++ int ret = 0; ++ int wpa_ielen=0; ++ int wpa2_ielen=0; ++ u8 *pwpa, *pwpa2; ++ u8 null_addr[]= {0,0,0,0,0,0}; ++ ++ if (pie == NULL || !ielen) { ++ /* Treat this as normal case, but need to clear WIFI_UNDER_WPS */ ++ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ goto exit; ++ } ++ ++ if (ielen > MAX_WPA_IE_LEN+MAX_WPS_IE_LEN+MAX_P2P_IE_LEN) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ buf = rtw_zmalloc(ielen); ++ if (buf == NULL){ ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ _rtw_memcpy(buf, pie , ielen); ++ ++ //dump ++ { ++ int i; ++ DBG_8192C("set wpa_ie(length:%zu):\n", ielen); ++ for(i=0;i0) ++ { ++ if(rtw_parse_wpa_ie(pwpa, wpa_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen+2); ++ ++ DBG_8192C("got wpa_ie, wpa_ielen:%u\n", wpa_ielen); ++ } ++ } ++ ++ pwpa2 = rtw_get_wpa2_ie(buf, &wpa2_ielen, ielen); ++ if(pwpa2 && wpa2_ielen>0) ++ { ++ if(rtw_parse_wpa2_ie(pwpa2, wpa2_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen+2); ++ ++ DBG_8192C("got wpa2_ie, wpa2_ielen:%u\n", wpa2_ielen); ++ } ++ } ++ ++ if (group_cipher == 0) ++ { ++ group_cipher = WPA_CIPHER_NONE; ++ } ++ if (pairwise_cipher == 0) ++ { ++ pairwise_cipher = WPA_CIPHER_NONE; ++ } ++ ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ {/* handle wps_ie */ ++ uint wps_ielen; ++ u8 *wps_ie; ++ ++ wps_ie = rtw_get_wps_ie(buf, ielen, NULL, &wps_ielen); ++ if (wps_ie && wps_ielen > 0) { ++ DBG_8192C("got wps_ie, wps_ielen:%u\n", wps_ielen); ++ padapter->securitypriv.wps_ie_len = wps_ielensecuritypriv.wps_ie, wps_ie, padapter->securitypriv.wps_ie_len); ++ set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ } else { ++ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ } ++ } ++ ++ #ifdef CONFIG_P2P ++ {//check p2p_ie for assoc req; ++ uint p2p_ielen=0; ++ u8 *p2p_ie; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if((p2p_ie=rtw_get_p2p_ie(buf, ielen, NULL, &p2p_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s p2p_assoc_req_ielen=%d\n", __FUNCTION__, p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_assoc_req_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_assoc_req_ie_len; ++ pmlmepriv->p2p_assoc_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_assoc_req_ie, free_len); ++ pmlmepriv->p2p_assoc_req_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_assoc_req_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_assoc_req_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ goto exit; ++ } ++ _rtw_memcpy(pmlmepriv->p2p_assoc_req_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_assoc_req_ie_len = p2p_ielen; ++ } ++ } ++ #endif //CONFIG_P2P ++ ++ #ifdef CONFIG_WFD ++ { ++ uint wfd_ielen=0; ++ u8 *wfd_ie; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ wfd_ie = rtw_get_wfd_ie(buf, ielen, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s wfd_assoc_req_ielen=%d\n", __FUNCTION__, wfd_ielen); ++ #endif ++ ++ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_ASSOC_REQ_IE, wfd_ie, wfd_ielen) != _SUCCESS) ++ goto exit; ++ } ++ } ++ #endif /* CONFIG_WFD */ ++ ++ //TKIP and AES disallow multicast packets until installing group key ++ if(padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_ ++ || padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ ++ || padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) ++ //WPS open need to enable multicast ++ //|| check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == _TRUE) ++ rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", ++ pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); ++ ++exit: ++ if (buf) ++ rtw_mfree(buf, ielen); ++ if (ret) ++ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ return ret; ++} ++ ++static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_ibss_params *params) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ NDIS_802_11_SSID ndis_ssid; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) ++ struct cfg80211_chan_def *pch_def; ++#endif ++ struct ieee80211_channel *pch; ++ int ret=0; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) ++ pch_def = (struct cfg80211_chan_def *)(¶ms->chandef); ++ pch = (struct ieee80211_channel *) pch_def->chan; ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) ++ pch = (struct ieee80211_channel *)(params->channel); ++#endif ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ++ ret = -EPERM; ++ goto exit; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING) == _TRUE) { ++ DBG_8192C("%s, but buddy_intf is under linking\n", __FUNCTION__); ++ ret = -EINVAL; ++ goto exit; ++ } ++ if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY) == _TRUE) { ++ rtw_scan_abort(padapter->pbuddy_adapter); ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++ if (!params->ssid || !params->ssid_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (params->ssid_len > IW_ESSID_MAX_SIZE){ ++ ++ ret= -E2BIG; ++ goto exit; ++ } ++ ++ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); ++ ndis_ssid.SsidLength = params->ssid_len; ++ _rtw_memcpy(ndis_ssid.Ssid, (u8 *)params->ssid, params->ssid_len); ++ ++ //DBG_8192C("ssid=%s, len=%zu\n", ndis_ssid.Ssid, params->ssid_len); ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ ++ ret = rtw_cfg80211_set_auth_type(psecuritypriv, NL80211_AUTHTYPE_OPEN_SYSTEM); ++ rtw_set_802_11_authentication_mode(padapter, psecuritypriv->ndisauthtype); ++ ++ DBG_871X("%s: center_freq = %d\n", __func__, pch->center_freq); ++ pmlmeext->cur_channel = rtw_freq2ch(pch->center_freq); ++ ++ if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) ++ { ++ ret = -1; ++ goto exit; ++ } ++ ++exit: ++ return ret; ++} ++ ++static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *ndev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; ++ enum nl80211_iftype old_type; ++ int ret = 0; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _TRUE; ++ #endif ++ ++ old_type = rtw_wdev->iftype; ++ ++ rtw_set_to_roam(padapter, 0); ++ ++ if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) ++ { ++ rtw_scan_abort(padapter); ++ LeaveAllPowerSaveMode(padapter); ++ ++ rtw_wdev->iftype = NL80211_IFTYPE_STATION; ++ ++ if (rtw_set_802_11_infrastructure_mode(padapter, Ndis802_11Infrastructure) ==_FALSE) ++ { ++ rtw_wdev->iftype = old_type; ++ ret = -EPERM; ++ goto leave_ibss; ++ } ++ rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure,_TRUE); ++ } ++ ++leave_ibss: ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _FALSE; ++ #endif ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_connect_params *sme) ++{ ++ int ret=0; ++ _irqL irqL; ++ _list *phead; ++ struct wlan_network *pnetwork = NULL; ++ NDIS_802_11_AUTHENTICATION_MODE authmode; ++ NDIS_802_11_SSID ndis_ssid; ++ u8 *dst_ssid, *src_ssid; ++ u8 *dst_bssid, *src_bssid; ++ //u8 matched_by_bssid=_FALSE; ++ //u8 matched_by_ssid=_FALSE; ++ u8 matched=_FALSE; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ _queue *queue = &pmlmepriv->scanned_queue; ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _TRUE; ++ #endif ++ ++ DBG_871X("=>"FUNC_NDEV_FMT" - Start to Connection\n", FUNC_NDEV_ARG(ndev)); ++ DBG_871X("privacy=%d, key=%p, key_len=%d, key_idx=%d, auth_type=%d\n", ++ sme->privacy, sme->key, sme->key_len, sme->key_idx, sme->auth_type); ++ ++ ++ if(adapter_wdev_data(padapter)->block == _TRUE) ++ { ++ ret = -EBUSY; ++ DBG_871X("%s wdev_priv.block is set\n", __FUNCTION__); ++ goto exit; ++ } ++ ++#ifdef CONFIG_PLATFORM_MSTAR_SCAN_BEFORE_CONNECT ++ printk("MStar Android!\n"); ++ if(adapter_wdev_data(padapter)->bandroid_scan == _FALSE) ++ { ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++#endif //CONFIG_P2P ++ { ++ ret = -EBUSY; ++ printk("Android hasn't attached yet!\n"); ++ goto exit; ++ } ++ } ++#endif ++ ++ rtw_ps_deny(padapter, PS_DENY_JOIN); ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ++ ret = -EPERM; ++ goto exit; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING) == _TRUE) { ++ DBG_8192C("%s, but buddy_intf is under linking\n", __FUNCTION__); ++ ret = -EINVAL; ++ goto exit; ++ } ++ if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY) == _TRUE) { ++ rtw_scan_abort(padapter->pbuddy_adapter); ++ } ++#endif ++ ++ if (!sme->ssid || !sme->ssid_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (sme->ssid_len > IW_ESSID_MAX_SIZE){ ++ ++ ret= -E2BIG; ++ goto exit; ++ } ++ ++ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); ++ ndis_ssid.SsidLength = sme->ssid_len; ++ _rtw_memcpy(ndis_ssid.Ssid, (u8 *)sme->ssid, sme->ssid_len); ++ ++ DBG_8192C("ssid=%s, len=%zu\n", ndis_ssid.Ssid, sme->ssid_len); ++ ++ ++ if (sme->bssid) ++ DBG_8192C("bssid="MAC_FMT"\n", MAC_ARG(sme->bssid)); ++ ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ ret = -EBUSY; ++ DBG_8192C("%s, fw_state=0x%x, goto exit\n", __FUNCTION__, pmlmepriv->fw_state); ++ goto exit; ++ } ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ rtw_scan_abort(padapter); ++ } ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ padapter->wapiInfo.bWapiEnable = false; ++#endif ++ ++ ret = rtw_cfg80211_set_wpa_version(psecuritypriv, sme->crypto.wpa_versions); ++ if (ret < 0) ++ goto exit; ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ if(sme->crypto.wpa_versions & NL80211_WAPI_VERSION_1) ++ { ++ padapter->wapiInfo.bWapiEnable = true; ++ padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; ++ padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; ++ } ++#endif ++ ++ ret = rtw_cfg80211_set_auth_type(psecuritypriv, sme->auth_type); ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_WAPI) ++ padapter->mlmeextpriv.mlmext_info.auth_algo = psecuritypriv->dot11AuthAlgrthm; ++#endif ++ ++ ++ if (ret < 0) ++ goto exit; ++ ++ DBG_8192C("%s, ie_len=%zu\n", __func__, sme->ie_len); ++ ++ ret = rtw_cfg80211_set_wpa_ie(padapter, (u8 *)sme->ie, sme->ie_len); ++ if (ret < 0) ++ goto exit; ++ ++ if (sme->crypto.n_ciphers_pairwise) { ++ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.ciphers_pairwise[0], _TRUE); ++ if (ret < 0) ++ goto exit; ++ } ++ ++ //For WEP Shared auth ++ if (sme->key_len > 0 && sme->key) ++ { ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ NDIS_802_11_WEP *pwep = NULL; ++ DBG_871X("%s(): Shared/Auto WEP\n",__FUNCTION__); ++ ++ wep_key_idx = sme->key_idx; ++ wep_key_len = sme->key_len; ++ ++ if (sme->key_idx > WEP_KEYS) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); ++ if(pwep == NULL){ ++ DBG_871X(" wpa_set_encryption: pwep allocate fail !!!\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ _rtw_memset(pwep, 0, wep_total_len); ++ ++ pwep->KeyLength = wep_key_len; ++ pwep->Length = wep_total_len; ++ ++ if(wep_key_len==13) ++ { ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ } ++ } ++ else { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ pwep->KeyIndex = wep_key_idx; ++ pwep->KeyIndex |= 0x80000000; ++ ++ _rtw_memcpy(pwep->KeyMaterial, (void *)sme->key, pwep->KeyLength); ++ ++ if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) ++ { ++ ret = -EOPNOTSUPP ; ++ } ++ ++ if (pwep) { ++ rtw_mfree((u8 *)pwep,wep_total_len); ++ } ++ ++ if(ret < 0) ++ goto exit; ++ } ++ ++ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.cipher_group, _FALSE); ++ if (ret < 0) ++ return ret; ++ ++ if (sme->crypto.n_akm_suites) { ++ ret = rtw_cfg80211_set_key_mgt(psecuritypriv, sme->crypto.akm_suites[0]); ++ if (ret < 0) ++ goto exit; ++ } ++ ++#ifdef CONFIG_WAPI_SUPPORT ++ if(sme->crypto.akm_suites[0] ==WLAN_AKM_SUITE_WAPI_PSK){ ++ padapter->wapiInfo.bWapiPSK = true; ++ } ++ else if(sme->crypto.akm_suites[0] ==WLAN_AKM_SUITE_WAPI_CERT){ ++ padapter->wapiInfo.bWapiPSK = false; ++ } ++#endif ++ ++ authmode = psecuritypriv->ndisauthtype; ++ rtw_set_802_11_authentication_mode(padapter, authmode); ++ ++ //rtw_set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); ++ ++ if (rtw_set_802_11_connect(padapter, (u8 *)sme->bssid, &ndis_ssid) == _FALSE) { ++ ret = -1; ++ goto exit; ++ } ++ ++ DBG_8192C("set ssid:dot11AuthAlgrthm=%d, dot11PrivacyAlgrthm=%d, dot118021XGrpPrivacy=%d\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, psecuritypriv->dot118021XGrpPrivacy); ++ ++exit: ++ ++ rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); ++ ++ DBG_8192C("<=%s, ret %d\n",__FUNCTION__, ret); ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _FALSE; ++ #endif ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev, ++ u16 reason_code) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ DBG_871X(FUNC_NDEV_FMT" - Start to Disconnect\n", FUNC_NDEV_ARG(ndev)); ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _TRUE; ++ #endif ++ ++ rtw_set_to_roam(padapter, 0); ++ ++ //if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) ++ { ++ rtw_scan_abort(padapter); ++ LeaveAllPowerSaveMode(padapter); ++ rtw_disassoc_cmd(padapter, 500, _FALSE); ++ ++ DBG_871X("%s...call rtw_indicate_disconnect\n", __FUNCTION__); ++ ++ rtw_indicate_disconnect(padapter, 0, _TRUE); ++ ++ rtw_free_assoc_resources(padapter, 1); ++ rtw_pwr_wakeup(padapter); ++ } ++ ++ #ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42 ++ padapter->mlmepriv.not_indic_disco = _FALSE; ++ #endif ++ ++ DBG_871X(FUNC_NDEV_FMT" return 0\n", FUNC_NDEV_ARG(ndev)); ++ return 0; ++} ++ ++static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) ++ struct wireless_dev *wdev, ++#endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) || defined(COMPAT_KERNEL_RELEASE) ++ enum nl80211_tx_power_setting type, int mbm) ++#else ++ enum tx_power_setting type, int dbm) ++#endif ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ int ret; ++ ++ switch (type) { ++ case NL80211_TX_POWER_AUTOMATIC: ++ return 0; ++ case NL80211_TX_POWER_FIXED: ++ if (mbm < 0 || (mbm % 100)) ++ return -EOPNOTSUPP; ++ ++ if (!test_bit(IWM_STATUS_READY, &iwm->status)) ++ return 0; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, ++ CFG_TX_PWR_LIMIT_USR, ++ MBM_TO_DBM(mbm) * 2); ++ if (ret < 0) ++ return ret; ++ ++ return iwm_tx_power_trigger(iwm); ++ default: ++ IWM_ERR(iwm, "Unsupported power type: %d\n", type); ++ return -EOPNOTSUPP; ++ } ++#endif ++ DBG_8192C("%s\n", __func__); ++ return 0; ++} ++ ++static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) ++ struct wireless_dev *wdev, ++#endif ++ int *dbm) ++{ ++ DBG_8192C("%s\n", __func__); ++ ++ *dbm = (12); ++ ++ return 0; ++} ++ ++inline bool rtw_cfg80211_pwr_mgmt(_adapter *adapter) ++{ ++ struct rtw_wdev_priv *rtw_wdev_priv = adapter_wdev_data(adapter); ++ return rtw_wdev_priv->power_mgmt; ++} ++ ++static int cfg80211_rtw_set_power_mgmt(struct wiphy *wiphy, ++ struct net_device *ndev, ++ bool enabled, int timeout) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct rtw_wdev_priv *rtw_wdev_priv = adapter_wdev_data(padapter); ++ ++ DBG_871X(FUNC_NDEV_FMT" enabled:%u, timeout:%d\n", FUNC_NDEV_ARG(ndev), ++ enabled, timeout); ++ ++ rtw_wdev_priv->power_mgmt = enabled; ++ ++ #ifdef CONFIG_LPS ++ if (!enabled) ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE_CFG80211_PWRMGMT, 1); ++ #endif ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, ++ struct net_device *ndev, ++ struct cfg80211_pmksa *pmksa) ++{ ++ u8 index,blInserted = _FALSE; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *mlme = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ u8 strZeroMacAddress[ ETH_ALEN ] = { 0x00 }; ++ ++ DBG_871X(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) ++ , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); ++ ++ if ( _rtw_memcmp((u8 *)pmksa->bssid, strZeroMacAddress, ETH_ALEN ) == _TRUE ) ++ { ++ return -EINVAL; ++ } ++ ++ if (check_fwstate(mlme, _FW_LINKED) == _FALSE) { ++ DBG_871X(FUNC_NDEV_FMT" not set pmksa cause not in linked state\n", FUNC_NDEV_ARG(ndev)); ++ return -EINVAL; ++ } ++ ++ blInserted = _FALSE; ++ ++ //overwrite PMKID ++ for(index=0 ; indexPMKIDList[index].Bssid, (u8 *)pmksa->bssid, ETH_ALEN) ==_TRUE ) ++ { // BSSID is matched, the same AP => rewrite with new PMKID. ++ DBG_871X(FUNC_NDEV_FMT" BSSID exists in the PMKList.\n", FUNC_NDEV_ARG(ndev)); ++ ++ _rtw_memcpy( psecuritypriv->PMKIDList[index].PMKID, (u8 *)pmksa->pmkid, WLAN_PMKID_LEN); ++ psecuritypriv->PMKIDList[index].bUsed = _TRUE; ++ psecuritypriv->PMKIDIndex = index+1; ++ blInserted = _TRUE; ++ break; ++ } ++ } ++ ++ if(!blInserted) ++ { ++ // Find a new entry ++ DBG_871X(FUNC_NDEV_FMT" Use the new entry index = %d for this PMKID.\n", ++ FUNC_NDEV_ARG(ndev), psecuritypriv->PMKIDIndex ); ++ ++ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, (u8 *)pmksa->bssid, ETH_ALEN); ++ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, (u8 *)pmksa->pmkid, WLAN_PMKID_LEN); ++ ++ psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].bUsed = _TRUE; ++ psecuritypriv->PMKIDIndex++ ; ++ if(psecuritypriv->PMKIDIndex==16) ++ { ++ psecuritypriv->PMKIDIndex =0; ++ } ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_del_pmksa(struct wiphy *wiphy, ++ struct net_device *ndev, ++ struct cfg80211_pmksa *pmksa) ++{ ++ u8 index, bMatched = _FALSE; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ DBG_871X(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) ++ , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); ++ ++ for(index=0 ; indexPMKIDList[index].Bssid, (u8 *)pmksa->bssid, ETH_ALEN) ==_TRUE ) ++ { // BSSID is matched, the same AP => Remove this PMKID information and reset it. ++ _rtw_memset(psecuritypriv->PMKIDList[index].Bssid, 0x00, ETH_ALEN ); ++ _rtw_memset(psecuritypriv->PMKIDList[index].PMKID, 0x00, WLAN_PMKID_LEN ); ++ psecuritypriv->PMKIDList[index].bUsed = _FALSE; ++ bMatched = _TRUE; ++ DBG_871X(FUNC_NDEV_FMT" clear id:%hhu\n", FUNC_NDEV_ARG(ndev), index); ++ break; ++ } ++ } ++ ++ if(_FALSE == bMatched) ++ { ++ DBG_871X(FUNC_NDEV_FMT" do not have matched BSSID\n" ++ , FUNC_NDEV_ARG(ndev)); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, ++ struct net_device *ndev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ _rtw_memset( &psecuritypriv->PMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); ++ psecuritypriv->PMKIDIndex = 0; ++ ++ return 0; ++} ++ ++#ifdef CONFIG_AP_MODE ++void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ s32 freq; ++ int channel; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct net_device *ndev = padapter->pnetdev; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) ++ { ++ struct station_info sinfo; ++ u8 ie_offset; ++ if (GetFrameSubType(pmgmt_frame) == WIFI_ASSOCREQ) ++ ie_offset = _ASOCREQ_IE_OFFSET_; ++ else // WIFI_REASSOCREQ ++ ie_offset = _REASOCREQ_IE_OFFSET_; ++ ++ memset(&sinfo, 0, sizeof(sinfo)); ++ sinfo.filled = STATION_INFO_ASSOC_REQ_IES; ++ sinfo.assoc_req_ies = pmgmt_frame + WLAN_HDR_A3_LEN + ie_offset; ++ sinfo.assoc_req_ies_len = frame_len - WLAN_HDR_A3_LEN - ie_offset; ++ cfg80211_new_sta(ndev, GetAddr2Ptr(pmgmt_frame), &sinfo, GFP_ATOMIC); ++ } ++#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++ channel = pmlmeext->cur_channel; ++ freq = rtw_ch2freq(channel); ++ ++ #ifdef COMPAT_KERNEL_RELEASE ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++ #else //COMPAT_KERNEL_RELEASE ++ { ++ //to avoid WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION) when calling cfg80211_send_rx_assoc() ++ #ifndef CONFIG_PLATFORM_MSTAR ++ pwdev->iftype = NL80211_IFTYPE_STATION; ++ #endif //CONFIG_PLATFORM_MSTAR ++ DBG_8192C("iftype=%d before call cfg80211_send_rx_assoc()\n", pwdev->iftype); ++ rtw_cfg80211_send_rx_assoc(padapter, NULL, pmgmt_frame, frame_len); ++ DBG_8192C("iftype=%d after call cfg80211_send_rx_assoc()\n", pwdev->iftype); ++ pwdev->iftype = NL80211_IFTYPE_AP; ++ //cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++ } ++ #endif //COMPAT_KERNEL_RELEASE ++#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++ ++} ++ ++void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason) ++{ ++ s32 freq; ++ int channel; ++ u8 *pmgmt_frame; ++ uint frame_len; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ u8 mgmt_buf[128] = {0}; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct net_device *ndev = padapter->pnetdev; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) ++ cfg80211_del_sta(ndev, da, GFP_ATOMIC); ++#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++ channel = pmlmeext->cur_channel; ++ freq = rtw_ch2freq(channel); ++ ++ pmgmt_frame = mgmt_buf; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pmgmt_frame; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pmgmt_frame, WIFI_DEAUTH); ++ ++ pmgmt_frame += sizeof(struct rtw_ieee80211_hdr_3addr); ++ frame_len = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ reason = cpu_to_le16(reason); ++ pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len); ++ ++ #ifdef COMPAT_KERNEL_RELEASE ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); ++ #else //COMPAT_KERNEL_RELEASE ++ cfg80211_send_disassoc(padapter->pnetdev, mgmt_buf, frame_len); ++ //cfg80211_rx_action(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); ++ #endif //COMPAT_KERNEL_RELEASE ++#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++} ++ ++static int rtw_cfg80211_monitor_if_open(struct net_device *ndev) ++{ ++ int ret = 0; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ return ret; ++} ++ ++static int rtw_cfg80211_monitor_if_close(struct net_device *ndev) ++{ ++ int ret = 0; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ return ret; ++} ++ ++static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_device *ndev) ++{ ++ int ret = 0; ++ int rtap_len; ++ int qos_len = 0; ++ int dot11_hdr_len = 24; ++ int snap_len = 6; ++ unsigned char *pdata; ++ u16 frame_ctl; ++ unsigned char src_mac_addr[6]; ++ unsigned char dst_mac_addr[6]; ++ struct rtw_ieee80211_hdr *dot11_hdr; ++ struct ieee80211_radiotap_header *rtap_hdr; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ if (skb) ++ rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); ++ ++ if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) ++ goto fail; ++ ++ rtap_hdr = (struct ieee80211_radiotap_header *)skb->data; ++ if (unlikely(rtap_hdr->it_version)) ++ goto fail; ++ ++ rtap_len = ieee80211_get_radiotap_len(skb->data); ++ if (unlikely(skb->len < rtap_len)) ++ goto fail; ++ ++ if(rtap_len != 14) ++ { ++ DBG_8192C("radiotap len (should be 14): %d\n", rtap_len); ++ goto fail; ++ } ++ ++ /* Skip the ratio tap header */ ++ skb_pull(skb, rtap_len); ++ ++ dot11_hdr = (struct rtw_ieee80211_hdr *)skb->data; ++ frame_ctl = le16_to_cpu(dot11_hdr->frame_ctl); ++ /* Check if the QoS bit is set */ ++ if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) { ++ /* Check if this ia a Wireless Distribution System (WDS) frame ++ * which has 4 MAC addresses ++ */ ++ if (dot11_hdr->frame_ctl & 0x0080) ++ qos_len = 2; ++ if ((dot11_hdr->frame_ctl & 0x0300) == 0x0300) ++ dot11_hdr_len += 6; ++ ++ memcpy(dst_mac_addr, dot11_hdr->addr1, sizeof(dst_mac_addr)); ++ memcpy(src_mac_addr, dot11_hdr->addr2, sizeof(src_mac_addr)); ++ ++ /* Skip the 802.11 header, QoS (if any) and SNAP, but leave spaces for ++ * for two MAC addresses ++ */ ++ skb_pull(skb, dot11_hdr_len + qos_len + snap_len - sizeof(src_mac_addr) * 2); ++ pdata = (unsigned char*)skb->data; ++ memcpy(pdata, dst_mac_addr, sizeof(dst_mac_addr)); ++ memcpy(pdata + sizeof(dst_mac_addr), src_mac_addr, sizeof(src_mac_addr)); ++ ++ DBG_8192C("should be eapol packet\n"); ++ ++ /* Use the real net device to transmit the packet */ ++ ret = _rtw_xmit_entry(skb, padapter->pnetdev); ++ ++ return ret; ++ ++ } ++ else if ((frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)) ++ == (RTW_IEEE80211_FTYPE_MGMT|RTW_IEEE80211_STYPE_ACTION) ++ ) ++ { ++ //only for action frames ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ //u8 category, action, OUI_Subtype, dialogToken=0; ++ //unsigned char *frame_body; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 *buf = skb->data; ++ u32 len = skb->len; ++ u8 category, action; ++ int type = -1; ++ ++ if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { ++ DBG_8192C(FUNC_NDEV_FMT" frame_control:0x%x\n", FUNC_NDEV_ARG(ndev), ++ le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); ++ goto fail; ++ } ++ ++ DBG_8192C("RTW_Tx:da="MAC_FMT" via "FUNC_NDEV_FMT"\n", ++ MAC_ARG(GetAddr1Ptr(buf)), FUNC_NDEV_ARG(ndev)); ++ #ifdef CONFIG_P2P ++ if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) ++ goto dump; ++ #endif ++ if (category == RTW_WLAN_CATEGORY_PUBLIC) ++ DBG_871X("RTW_Tx:%s\n", action_public_str(action)); ++ else ++ DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); ++ ++dump: ++ //starting alloc mgmt frame to dump it ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ goto fail; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ _rtw_memcpy(pframe, (void*)buf, len); ++ pattrib->pktlen = len; ++ ++#ifdef CONFIG_P2P ++ if (type >= 0) ++ rtw_xframe_chk_wfd_ie(pmgntframe); ++#endif /* CONFIG_P2P */ ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ //update seq number ++ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ pmlmeext->mgnt_seq++; ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ } ++ else ++ { ++ DBG_8192C("frame_ctl=0x%x\n", frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)); ++ } ++ ++ ++fail: ++ ++ rtw_skb_free(skb); ++ ++ return 0; ++ ++} ++ ++static void rtw_cfg80211_monitor_if_set_multicast_list(struct net_device *ndev) ++{ ++ DBG_8192C("%s\n", __func__); ++} ++ ++static int rtw_cfg80211_monitor_if_set_mac_address(struct net_device *ndev, void *addr) ++{ ++ int ret = 0; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ return ret; ++} ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++static const struct net_device_ops rtw_cfg80211_monitor_if_ops = { ++ .ndo_open = rtw_cfg80211_monitor_if_open, ++ .ndo_stop = rtw_cfg80211_monitor_if_close, ++ .ndo_start_xmit = rtw_cfg80211_monitor_if_xmit_entry, ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)) ++ .ndo_set_multicast_list = rtw_cfg80211_monitor_if_set_multicast_list, ++ #endif ++ .ndo_set_mac_address = rtw_cfg80211_monitor_if_set_mac_address, ++}; ++#endif ++ ++static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, struct net_device **ndev) ++{ ++ int ret = 0; ++ struct net_device* mon_ndev = NULL; ++ struct wireless_dev* mon_wdev = NULL; ++ struct rtw_netdev_priv_indicator *pnpi; ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); ++ ++ if (!name) { ++ DBG_871X(FUNC_ADPT_FMT" without specific name\n", FUNC_ADPT_ARG(padapter)); ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ if (pwdev_priv->pmon_ndev) { ++ DBG_871X(FUNC_ADPT_FMT" monitor interface exist: "NDEV_FMT"\n", ++ FUNC_ADPT_ARG(padapter), NDEV_ARG(pwdev_priv->pmon_ndev)); ++ ret = -EBUSY; ++ goto out; ++ } ++ ++ mon_ndev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); ++ if (!mon_ndev) { ++ DBG_871X(FUNC_ADPT_FMT" allocate ndev fail\n", FUNC_ADPT_ARG(padapter)); ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ mon_ndev->type = ARPHRD_IEEE80211_RADIOTAP; ++ strncpy(mon_ndev->name, name, IFNAMSIZ); ++ mon_ndev->name[IFNAMSIZ - 1] = 0; ++ mon_ndev->destructor = rtw_ndev_destructor; ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++ mon_ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops; ++#else ++ mon_ndev->open = rtw_cfg80211_monitor_if_open; ++ mon_ndev->stop = rtw_cfg80211_monitor_if_close; ++ mon_ndev->hard_start_xmit = rtw_cfg80211_monitor_if_xmit_entry; ++ mon_ndev->set_mac_address = rtw_cfg80211_monitor_if_set_mac_address; ++#endif ++ ++ pnpi = netdev_priv(mon_ndev); ++ pnpi->priv = padapter; ++ pnpi->sizeof_priv = sizeof(_adapter); ++ ++ /* wdev */ ++ mon_wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); ++ if (!mon_wdev) { ++ DBG_871X(FUNC_ADPT_FMT" allocate mon_wdev fail\n", FUNC_ADPT_ARG(padapter)); ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ mon_wdev->wiphy = padapter->rtw_wdev->wiphy; ++ mon_wdev->netdev = mon_ndev; ++ mon_wdev->iftype = NL80211_IFTYPE_MONITOR; ++ mon_ndev->ieee80211_ptr = mon_wdev; ++ ++ ret = register_netdevice(mon_ndev); ++ if (ret) { ++ goto out; ++ } ++ ++ *ndev = pwdev_priv->pmon_ndev = mon_ndev; ++ _rtw_memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ+1); ++ ++out: ++ if (ret && mon_wdev) { ++ rtw_mfree((u8*)mon_wdev, sizeof(struct wireless_dev)); ++ mon_wdev = NULL; ++ } ++ ++ if (ret && mon_ndev) { ++ free_netdev(mon_ndev); ++ *ndev = mon_ndev = NULL; ++ } ++ ++ return ret; ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++static struct wireless_dev * ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++static struct net_device * ++#else ++static int ++#endif ++ cfg80211_rtw_add_virtual_intf( ++ struct wiphy *wiphy, ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0)) ++ const char *name, ++ #else ++ char *name, ++ #endif ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) ++ unsigned char name_assign_type, ++ #endif ++ enum nl80211_iftype type, u32 *flags, struct vif_params *params) ++{ ++ int ret = 0; ++ struct net_device* ndev = NULL; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ DBG_871X("%s wiphy:%s, name:%s, type:%d\n", ++ __func__, wiphy_name(wiphy), name, type); ++ ++ switch (type) { ++ case NL80211_IFTYPE_ADHOC: ++ case NL80211_IFTYPE_AP_VLAN: ++ case NL80211_IFTYPE_WDS: ++ case NL80211_IFTYPE_MESH_POINT: ++ ret = -ENODEV; ++ break; ++ case NL80211_IFTYPE_MONITOR: ++ ret = rtw_cfg80211_add_monitor_if(padapter, (char *)name, &ndev); ++ break; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ case NL80211_IFTYPE_P2P_CLIENT: ++#endif ++ case NL80211_IFTYPE_STATION: ++ ret = -ENODEV; ++ break; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ case NL80211_IFTYPE_P2P_GO: ++#endif ++ case NL80211_IFTYPE_AP: ++ ret = -ENODEV; ++ break; ++ default: ++ ret = -ENODEV; ++ DBG_871X("Unsupported interface type\n"); ++ break; ++ } ++ ++ DBG_871X("%s ndev:%p, ret:%d\n", __func__, ndev, ret); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ return ndev ? ndev->ieee80211_ptr : ERR_PTR(ret); ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ return ndev ? ndev : ERR_PTR(ret); ++#else ++ return ret; ++#endif ++} ++ ++static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev ++#else ++ struct net_device *ndev ++#endif ++) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(wdev); ++#endif ++ int ret = 0; ++ _adapter *adapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ if (!ndev) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ adapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(adapter); ++ ++ unregister_netdevice(ndev); ++ ++ if (ndev == pwdev_priv->pmon_ndev) { ++ pwdev_priv->pmon_ndev = NULL; ++ pwdev_priv->ifname_mon[0] = '\0'; ++ DBG_871X(FUNC_NDEV_FMT" remove monitor interface\n", FUNC_NDEV_ARG(ndev)); ++ } ++ ++exit: ++ return ret; ++} ++ ++static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, const u8 *tail, size_t tail_len) ++{ ++ int ret=0; ++ u8 *pbuf = NULL; ++ uint len, wps_ielen=0; ++ uint p2p_ielen=0; ++ u8 *p2p_ie; ++ u8 got_p2p_ie = _FALSE; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ //struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ ++ DBG_8192C("%s beacon_head_len=%zu, beacon_tail_len=%zu\n", __FUNCTION__, head_len, tail_len); ++ ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ if(head_len<24) ++ return -EINVAL; ++ ++ ++ pbuf = rtw_zmalloc(head_len+tail_len); ++ if(!pbuf) ++ return -ENOMEM; ++ ++ ++ //_rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); ++ ++ //if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) ++ // pstapriv->max_num_sta = NUM_STA; ++ ++ ++ _rtw_memcpy(pbuf, (void *)head+24, head_len-24);// 24=beacon header len. ++ _rtw_memcpy(pbuf+head_len-24, (void *)tail, tail_len); ++ ++ len = head_len+tail_len-24; ++ ++ //check wps ie if inclued ++ if(rtw_get_wps_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &wps_ielen)) ++ DBG_8192C("add bcn, wps_ielen=%d\n", wps_ielen); ++ ++#ifdef CONFIG_P2P ++ if( adapter->wdinfo.driver_interface == DRIVER_CFG80211 ) ++ { ++ //check p2p if enable ++ if(rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen)) ++ { ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct wifidirect_info *pwdinfo= &(adapter->wdinfo); ++ ++ DBG_8192C("got p2p_ie, len=%d\n", p2p_ielen); ++ ++ got_p2p_ie = _TRUE; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ DBG_8192C("Enable P2P function for the first time\n"); ++ rtw_p2p_enable(adapter, P2P_ROLE_GO); ++ adapter_wdev_data(adapter)->p2p_enabled = _TRUE; ++ ++ adapter->stapriv.expire_to = 3; // 3x2 = 6 sec in p2p mode ++ } ++ else ++ { ++ DBG_8192C("enter GO Mode, p2p_ielen=%d\n", p2p_ielen); ++ ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ pwdinfo->intent = 15; ++ } ++ } ++ } ++#endif // CONFIG_P2P ++ ++ /* pbss_network->IEs will not include p2p_ie, wfd ie */ ++ rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, P2P_OUI, 4); ++ rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, WFD_OUI, 4); ++ ++ if (rtw_check_beacon_data(adapter, pbuf, len) == _SUCCESS) ++ { ++#ifdef CONFIG_P2P ++ //check p2p if enable ++ if(got_p2p_ie == _TRUE) ++ { ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct wifidirect_info *pwdinfo= &(adapter->wdinfo); ++ pwdinfo->operating_channel = pmlmeext->cur_channel; ++ } ++#endif //CONFIG_P2P ++ ret = 0; ++ } ++ else ++ { ++ ret = -EINVAL; ++ } ++ ++ ++ rtw_mfree(pbuf, head_len+tail_len); ++ ++ return ret; ++} ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) ++static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *ndev, ++ struct beacon_parameters *info) ++{ ++ int ret=0; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_set_beacon(struct wiphy *wiphy, struct net_device *ndev, ++ struct beacon_parameters *info) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ pmlmeext->bstart_bss = _TRUE; ++ ++ cfg80211_rtw_add_beacon(wiphy, ndev, info); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_del_beacon(struct wiphy *wiphy, struct net_device *ndev) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++#else ++static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_ap_settings *settings) ++{ ++ int ret = 0; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ DBG_871X(FUNC_NDEV_FMT" hidden_ssid:%d, auth_type:%d\n", FUNC_NDEV_ARG(ndev), ++ settings->hidden_ssid, settings->auth_type); ++ ++ ret = rtw_add_beacon(adapter, settings->beacon.head, settings->beacon.head_len, ++ settings->beacon.tail, settings->beacon.tail_len); ++ ++ adapter->mlmeextpriv.mlmext_info.hidden_ssid_mode = settings->hidden_ssid; ++ ++ if (settings->ssid && settings->ssid_len) { ++ WLAN_BSSID_EX *pbss_network = &adapter->mlmepriv.cur_network.network; ++ WLAN_BSSID_EX *pbss_network_ext = &adapter->mlmeextpriv.mlmext_info.network; ++ ++ if(0) ++ DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%zu), from ie:(%s,%d)\n", FUNC_ADPT_ARG(adapter), ++ settings->ssid, settings->ssid_len, ++ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); ++ ++ _rtw_memcpy(pbss_network->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); ++ pbss_network->Ssid.SsidLength = settings->ssid_len; ++ _rtw_memcpy(pbss_network_ext->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); ++ pbss_network_ext->Ssid.SsidLength = settings->ssid_len; ++ ++ if(0) ++ DBG_871X(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), ++ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, ++ pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); ++ } ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_beacon_data *info) ++{ ++ int ret = 0; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ return 0; ++} ++ ++#endif //(LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) ++ ++static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) ++ u8 *mac, ++#else ++ const u8 *mac, ++#endif ++ struct station_parameters *params) ++{ ++ int ret = 0; ++#ifdef CONFIG_TDLS ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++#endif /* CONFIG_TDLS */ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++#ifdef CONFIG_TDLS ++ psta = rtw_get_stainfo(pstapriv, mac); ++ if (psta == NULL) { ++ psta = rtw_alloc_stainfo(pstapriv, mac); ++ if (psta ==NULL) { ++ DBG_871X("[%s] Alloc station for "MAC_FMT" fail\n", __FUNCTION__, MAC_ARG(mac)); ++ ret =-EOPNOTSUPP; ++ goto exit; ++ } ++ } ++#endif /* CONFIG_TDLS */ ++ ++exit: ++ return ret; ++} ++ ++static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) ++ u8 *mac ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)) ++ const u8 *mac ++#else ++ struct station_del_parameters *params ++#endif ++ ) ++{ ++ int ret=0; ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 updated = _FALSE; ++ const u8 *target_mac; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_871X("+"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)) ++ target_mac = mac; ++#else ++ target_mac = params->mac; ++#endif ++ ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) ++ { ++ DBG_8192C("%s, fw_state != FW_LINKED|WIFI_AP_STATE\n", __func__); ++ return -EINVAL; ++ } ++ ++ ++ if (!target_mac) ++ { ++ DBG_8192C("flush all sta, and cam_entry\n"); ++ ++ flush_all_cam_entry(padapter); //clear CAM ++ ++ ret = rtw_sta_flush(padapter, _TRUE); ++ ++ return ret; ++ } ++ ++ ++ DBG_8192C("free sta macaddr =" MAC_FMT "\n", MAC_ARG(target_mac)); ++ ++ if (target_mac[0] == 0xff && target_mac[1] == 0xff && ++ target_mac[2] == 0xff && target_mac[3] == 0xff && ++ target_mac[4] == 0xff && target_mac[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ if (_rtw_memcmp((u8 *)target_mac, psta->hwaddr, ETH_ALEN)) ++ { ++ if(psta->dot8021xalg == 1 && psta->bpairwise_key_installed == _FALSE) ++ { ++ DBG_8192C("%s, sta's dot8021xalg = 1 and key_installed = _FALSE\n", __func__); ++ } ++ else ++ { ++ DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); ++ ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ ++ //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (check_fwstate(pmlmepriv, (WIFI_AP_STATE)) == _TRUE) ++ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE); ++ else ++ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); ++ //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ psta = NULL; ++ ++ break; ++ } ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); ++ ++ DBG_871X("-"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) ++ u8 *mac, ++#else ++ const u8 *mac, ++#endif ++ struct station_parameters *params) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++ ++struct sta_info *rtw_sta_info_get_by_idx(const int idx, struct sta_priv *pstapriv) ++ ++{ ++ ++ _list *phead, *plist; ++ struct sta_info *psta = NULL; ++ int i = 0; ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ if(idx == i) psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ i++; ++ } ++ return psta; ++} ++ ++static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *ndev, ++ int idx, u8 *mac, struct station_info *sinfo) ++{ ++ ++ int ret = 0; ++ _irqL irqL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ psta = rtw_sta_info_get_by_idx(idx, pstapriv); ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if(NULL == psta) ++ { ++ DBG_871X("Station is not found\n"); ++ ret = -ENOENT; ++ goto exit; ++ } ++ _rtw_memcpy(mac, psta->hwaddr, ETH_ALEN); ++ sinfo->filled = 0; ++ sinfo->filled |= STATION_INFO_SIGNAL; ++ sinfo->signal = psta->rssi; ++ ++exit: ++ return ret; ++} ++ ++static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev, ++ struct bss_parameters *params) ++{ ++ u8 i; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++/* ++ DBG_8192C("use_cts_prot=%d\n", params->use_cts_prot); ++ DBG_8192C("use_short_preamble=%d\n", params->use_short_preamble); ++ DBG_8192C("use_short_slot_time=%d\n", params->use_short_slot_time); ++ DBG_8192C("ap_isolate=%d\n", params->ap_isolate); ++ ++ DBG_8192C("basic_rates_len=%d\n", params->basic_rates_len); ++ for(i=0; ibasic_rates_len; i++) ++ { ++ DBG_8192C("basic_rates=%d\n", params->basic_rates[i]); ++ ++ } ++*/ ++ return 0; ++ ++} ++ ++static int cfg80211_rtw_set_channel(struct wiphy *wiphy ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++ , struct net_device *ndev ++ #endif ++ , struct ieee80211_channel *chan, enum nl80211_channel_type channel_type) ++{ ++ int chan_target = (u8) ieee80211_frequency_to_channel(chan->center_freq); ++ int chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ int chan_width = CHANNEL_WIDTH_20; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ #endif ++ ++ switch (channel_type) { ++ case NL80211_CHAN_NO_HT: ++ case NL80211_CHAN_HT20: ++ chan_width = CHANNEL_WIDTH_20; ++ chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ case NL80211_CHAN_HT40MINUS: ++ chan_width = CHANNEL_WIDTH_40; ++ chan_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ case NL80211_CHAN_HT40PLUS: ++ chan_width = CHANNEL_WIDTH_40; ++ chan_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ default: ++ chan_width = CHANNEL_WIDTH_20; ++ chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ ++ set_channel_bwmode(padapter, chan_target, chan_offset, chan_width); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_monitor_channel(struct wiphy *wiphy ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) ++ , struct cfg80211_chan_def *chandef ++#else ++ , struct ieee80211_channel *chan ++ , enum nl80211_channel_type channel_type ++#endif ++ ) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) ++ struct ieee80211_channel *chan = chandef->chan; ++#endif ++ ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ int target_channal = chan->hw_value; ++ int target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ int target_width = CHANNEL_WIDTH_20; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("center_freq %u Mhz ch %u width %u freq1 %u freq2 %u\n" ++ , chan->center_freq ++ , chan->hw_value ++ , chandef->width ++ , chandef->center_freq1 ++ , chandef->center_freq2); ++#endif /* CONFIG_DEBUG_CFG80211 */ ++ ++ switch (chandef->width) { ++ case NL80211_CHAN_WIDTH_20_NOHT: ++ case NL80211_CHAN_WIDTH_20: ++ target_width = CHANNEL_WIDTH_20; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ case NL80211_CHAN_WIDTH_40: ++ target_width = CHANNEL_WIDTH_40; ++ if (chandef->center_freq1 > chan->center_freq) ++ target_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ else ++ target_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ case NL80211_CHAN_WIDTH_80: ++ target_width = CHANNEL_WIDTH_80; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ case NL80211_CHAN_WIDTH_80P80: ++ target_width = CHANNEL_WIDTH_80_80; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ case NL80211_CHAN_WIDTH_160: ++ target_width = CHANNEL_WIDTH_160; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) ++ case NL80211_CHAN_WIDTH_5: ++ case NL80211_CHAN_WIDTH_10: ++#endif ++ default: ++ target_width = CHANNEL_WIDTH_20; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++#else ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("center_freq %u Mhz ch %u channel_type %u\n" ++ , chan->center_freq ++ , chan->hw_value ++ , channel_type); ++#endif /* CONFIG_DEBUG_CFG80211 */ ++ ++ switch (channel_type) { ++ case NL80211_CHAN_NO_HT: ++ case NL80211_CHAN_HT20: ++ target_width = CHANNEL_WIDTH_20; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ case NL80211_CHAN_HT40MINUS: ++ target_width = CHANNEL_WIDTH_40; ++ target_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ case NL80211_CHAN_HT40PLUS: ++ target_width = CHANNEL_WIDTH_40; ++ target_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ default: ++ target_width = CHANNEL_WIDTH_20; ++ target_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++#endif ++ ++ set_channel_bwmode(padapter, target_channal, target_offset, target_width); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_auth(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_auth_request *req) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_assoc_request *req) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++#endif //CONFIG_AP_MODE ++ ++void rtw_cfg80211_rx_probe_request(_adapter *adapter, u8 *frame, uint frame_len) ++{ ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); ++ u8 category, action; ++ ++ channel = rtw_get_oper_ch(adapter); ++ freq = rtw_ch2freq(channel); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("RTW_Rx: probe request, cur_ch=%d\n", channel); ++#endif /* CONFIG_DEBUG_CFG80211 */ ++ rtw_cfg80211_rx_mgmt(adapter, freq, 0, frame, frame_len, GFP_ATOMIC); ++} ++ ++void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ int type; ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 category, action; ++ ++ channel = rtw_get_oper_ch(padapter); ++ ++ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); ++ #ifdef CONFIG_P2P ++ type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); ++ if (type >= 0) ++ goto indicate; ++ #endif ++ rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); ++ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); ++ ++indicate: ++ freq = rtw_ch2freq(channel); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#endif ++} ++ ++void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ int type; ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 category, action; ++ ++ channel = rtw_get_oper_ch(padapter); ++ ++ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); ++ #ifdef CONFIG_P2P ++ type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); ++ if (type >= 0) { ++ switch (type) { ++ case P2P_GO_NEGO_CONF: ++ case P2P_PROVISION_DISC_RESP: ++ case P2P_INVIT_RESP: ++ rtw_set_scan_deny(padapter, 2000); ++ rtw_clear_scan_deny(padapter); ++ } ++ goto indicate; ++ } ++ #endif ++ rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); ++ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); ++ ++indicate: ++ freq = rtw_ch2freq(channel); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#endif ++} ++ ++void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg) ++{ ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); ++ u8 category, action; ++ ++ channel = rtw_get_oper_ch(adapter); ++ ++ rtw_action_frame_parse(frame, frame_len, &category, &action); ++ ++ if (action == ACT_PUBLIC_GAS_INITIAL_REQ) { ++ rtw_set_scan_deny(adapter, 200); ++ rtw_scan_abort_no_wait(adapter); ++ #ifdef CONFIG_CONCURRENT_MODE ++ if (rtw_buddy_adapter_up(adapter)) ++ rtw_scan_abort_no_wait(adapter->pbuddy_adapter); ++ #endif ++ } ++ ++ freq = rtw_ch2freq(channel); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_rx_mgmt(adapter, freq, 0, frame, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); ++#endif ++ ++ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); ++ if (msg) ++ DBG_871X("RTW_Rx:%s\n", msg); ++ else ++ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); ++} ++ ++#ifdef CONFIG_P2P ++void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len) ++{ ++ u16 wps_devicepassword_id = 0x0000; ++ uint wps_devicepassword_id_len = 0; ++ u8 wpsie[ 255 ] = { 0x00 }, p2p_ie[ 255 ] = { 0x00 }; ++ uint p2p_ielen = 0; ++ uint wpsielen = 0; ++ u32 devinfo_contentlen = 0; ++ u8 devinfo_content[64] = { 0x00 }; ++ u16 capability = 0; ++ uint capability_len = 0; ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u8 dialogToken = 1; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_PROVISION_DISC_REQ; ++ u32 p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ ++ DBG_871X( "[%s] In\n", __FUNCTION__ ); ++ ++ //prepare for building provision_request frame ++ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr1Ptr(buf), ETH_ALEN); ++ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, GetAddr1Ptr(buf), ETH_ALEN); ++ ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; ++ ++ rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); ++ rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); ++ wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); ++ ++ switch(wps_devicepassword_id) ++ { ++ case WPS_DPID_PIN: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; ++ break; ++ case WPS_DPID_USER_SPEC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; ++ break; ++ case WPS_DPID_MACHINE_SPEC: ++ break; ++ case WPS_DPID_REKEY: ++ break; ++ case WPS_DPID_PBC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; ++ break; ++ case WPS_DPID_REGISTRAR_SPEC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; ++ break; ++ default: ++ break; ++ } ++ ++ ++ if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) ) ++ { ++ ++ rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, devinfo_content, &devinfo_contentlen); ++ rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&capability, &capability_len); ++ ++ } ++ ++ ++ //start to build provision_request frame ++ _rtw_memset(wpsie, 0, sizeof(wpsie)); ++ _rtw_memset(p2p_ie, 0, sizeof(p2p_ie)); ++ p2p_ielen = 0; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ ++ //build_prov_disc_request_p2p_ie ++ // P2P OUI ++ p2pielen = 0; ++ p2p_ie[ p2pielen++ ] = 0x50; ++ p2p_ie[ p2pielen++ ] = 0x6F; ++ p2p_ie[ p2pielen++ ] = 0x9A; ++ p2p_ie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110301 ++ // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes ++ // 1. P2P Capability ++ // 2. Device Info ++ // 3. Group ID ( When joining an operating P2P Group ) ++ ++ // P2P Capability ATTR ++ // Type: ++ p2p_ie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ RTW_PUT_LE16(p2p_ie + p2pielen, 0x0002); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Group Capability Bitmap, 1 byte ++ _rtw_memcpy(p2p_ie + p2pielen, &capability, 2); ++ p2pielen += 2; ++ ++ ++ // Device Info ATTR ++ // Type: ++ p2p_ie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ RTW_PUT_LE16(p2p_ie + p2pielen, devinfo_contentlen); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy(p2p_ie + p2pielen, devinfo_content, devinfo_contentlen); ++ p2pielen += devinfo_contentlen; ++ ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2p_ie, &p2p_ielen); ++ //p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr); ++ //pframe += p2pielen; ++ pattrib->pktlen += p2p_ielen; ++ ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // Config Method ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ //dump_mgntframe(padapter, pmgntframe); ++ if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) ++ DBG_8192C("%s, ack to\n", __func__); ++ ++ //if(wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) ++ //{ ++ // DBG_8192C("waiting for p2p peer key-in PIN CODE\n"); ++ // rtw_msleep_os(15000); // 15 sec for key in PIN CODE, workaround for GS2 before issuing Nego Req. ++ //} ++ ++} ++ ++static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++ struct ieee80211_channel * channel, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ enum nl80211_channel_type channel_type, ++#endif ++ unsigned int duration, u64 *cookie) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(wdev); ++#endif ++ s32 err = 0; ++ u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq); ++ u8 ready_on_channel = _FALSE; ++ _adapter *padapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ struct mlme_ext_priv *pmlmeext; ++ struct wifidirect_info *pwdinfo; ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo; ++ u8 is_p2p_find = _FALSE; ++ ++#ifndef CONFIG_RADIO_WORK ++ #define RTW_ROCH_DURATION_ENLARGE ++ #define RTW_ROCH_BACK_OP ++#endif ++ ++ if (ndev == NULL) { ++ return -EINVAL; ++ } ++ ++ padapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(padapter); ++ pmlmeext = &padapter->mlmeextpriv; ++ pwdinfo = &padapter->wdinfo; ++ pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ #ifdef CONFIG_CONCURRENT_MODE ++ is_p2p_find=(duration < (pwdinfo->ext_listen_interval))? _TRUE : _FALSE; ++ #endif ++ ++ *cookie = ATOMIC_INC_RETURN(&pcfg80211_wdinfo->ro_ch_cookie_gen); ++ ++ DBG_871X(FUNC_ADPT_FMT" ch:%u duration:%d, cookie:0x%llx\n", FUNC_ADPT_ARG(padapter), remain_ch, duration, *cookie); ++ ++#ifdef CONFIG_MP_INCLUDED ++ if (padapter->registrypriv.mp_mode == 1) { ++ DBG_871X(FUNC_ADPT_FMT ": MP mode block remain_on_channel request\n", FUNC_ADPT_ARG(padapter)); ++ err = -EFAULT; ++ goto exit; ++ } ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->pbuddy_adapter) { ++ if (padapter->pbuddy_adapter->registrypriv.mp_mode == 1) { ++ DBG_871X(FUNC_ADPT_FMT ": MP mode block remain_on_channel request\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter)); ++ err = -EFAULT; ++ goto exit; ++ } ++ } ++#endif ++#endif ++ ++ if(pcfg80211_wdinfo->is_ro_ch == _TRUE) ++ { ++ DBG_8192C("%s, cancel ro ch timer\n", __func__); ++ _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++ #ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); ++ #endif //CONFIG_CONCURRENT_MODE ++ p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); ++ } ++ ++ pcfg80211_wdinfo->is_ro_ch = _TRUE; ++ pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ _rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel)); ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ pcfg80211_wdinfo->remain_on_ch_type= channel_type; ++ #endif ++ pcfg80211_wdinfo->remain_on_ch_cookie= *cookie; ++ ++ rtw_scan_abort(padapter); ++#ifdef CONFIG_CONCURRENT_MODE ++ if ((rtw_buddy_adapter_up(padapter)) && is_p2p_find) //don't scan_abort during p2p_listen. ++ rtw_scan_abort(padapter->pbuddy_adapter); ++#endif //CONFIG_CONCURRENT_MODE ++ ++ if (check_fwstate(&padapter->mlmepriv, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) ++ { ++ DBG_871X("mlme state:0x%x\n", get_fwstate(&padapter->mlmepriv)); ++ remain_ch = padapter->mlmeextpriv.cur_channel; ++ } ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) ++ { ++ DBG_871X("buddy_intf's mlme state:0x%x\n", get_fwstate(&(padapter->pbuddy_adapter->mlmepriv))); ++ remain_ch = padapter->pbuddy_adapter->mlmeextpriv.cur_channel; ++ } ++#endif /* CONFIG_CONCURRENT_MODE */ ++ ++ //if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); ++ adapter_wdev_data(padapter)->p2p_enabled = _TRUE; ++ padapter->wdinfo.listen_channel = remain_ch; ++ } else if (rtw_p2p_chk_state(pwdinfo , P2P_STATE_LISTEN)) { ++ padapter->wdinfo.listen_channel = remain_ch; ++ } else { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++#endif ++ } ++ ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ ++ #ifdef RTW_ROCH_DURATION_ENLARGE ++ if (duration < 400) ++ duration = duration * 3; /* extend from exper */ ++ #endif ++ ++#ifdef RTW_ROCH_BACK_OP ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_LINKED)) { ++ if (is_p2p_find) /* p2p_find , duration<1000 */ ++ duration = duration + pwdinfo->ext_listen_interval; ++ else /* p2p_listen, duration=5000 */ ++ duration = pwdinfo->ext_listen_interval + (pwdinfo->ext_listen_interval / 4); ++ } ++#endif ++#endif /* RTW_ROCH_BACK_OP */ ++ ++ pcfg80211_wdinfo->restore_channel = rtw_get_oper_ch(padapter); ++ ++ if(rtw_ch_set_search_ch(pmlmeext->channel_set, remain_ch) >= 0) { ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED) ) ++ { ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ if((remain_ch != pbuddy_mlmeext->cur_channel) && !check_fwstate(&padapter->mlmepriv, _FW_LINKED)) ++ { ++ if(ATOMIC_READ(&pwdev_priv->switch_ch_to)==1 || ++ (remain_ch != pmlmeext->cur_channel)) ++ { ++ if (check_buddy_fwstate(padapter, WIFI_FW_STATION_STATE)) { ++ DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); ++ issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); ++ } ++ ++ ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); ++ ++ #ifdef RTW_ROCH_BACK_OP ++ DBG_8192C("%s, set switch ch timer, duration=%d\n", __func__, duration-pwdinfo->ext_listen_interval); ++ _set_timer(&pwdinfo->ap_p2p_switch_timer, duration-pwdinfo->ext_listen_interval); ++ #endif ++ } ++ } ++ ++ ready_on_channel = _TRUE; ++ //pmlmeext->cur_channel = remain_ch; ++ //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ }else ++#endif //CONFIG_CONCURRENT_MODE ++ if(remain_ch != rtw_get_oper_ch(padapter) ) ++ { ++ ready_on_channel = _TRUE; ++ //pmlmeext->cur_channel = remain_ch; ++ //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ } ++ } else { ++ DBG_871X("%s remain_ch:%u not in channel plan!!!!\n", __FUNCTION__, remain_ch); ++ } ++ ++ ++ //call this after other things have been done ++#ifdef CONFIG_CONCURRENT_MODE ++ if(ATOMIC_READ(&pwdev_priv->ro_ch_to)==1 || ++ (remain_ch != rtw_get_oper_ch(padapter))) ++ { ++ u8 co_channel = 0xff; ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 0); ++#endif ++ ++ if(ready_on_channel == _TRUE) ++ { ++ if ( !check_fwstate(&padapter->mlmepriv, _FW_LINKED ) ) ++ { ++ pmlmeext->cur_channel = remain_ch; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ co_channel = rtw_get_oper_ch(padapter); ++ ++ if(co_channel !=remain_ch) ++#endif ++ { ++ //if (!padapter->mlmepriv.LinkDetectInfo.bBusyTraffic) ++ set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ } ++ } ++ } ++ DBG_8192C("%s, set ro ch timer, duration=%d\n", __func__, duration); ++ _set_timer( &pcfg80211_wdinfo->remain_on_ch_timer, duration); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ } ++#endif ++ ++ rtw_cfg80211_ready_on_channel(padapter, *cookie, channel, channel_type, duration, GFP_KERNEL); ++ ++exit: ++ if (err) { ++ pcfg80211_wdinfo->is_ro_ch = _FALSE; ++ pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); ++ } ++ ++ return err; ++} ++ ++static s32 cfg80211_rtw_cancel_remain_on_channel(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++ u64 cookie) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(wdev); ++#endif ++ s32 err = 0; ++ _adapter *padapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ struct wifidirect_info *pwdinfo; ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo; ++ ++ if (ndev == NULL) { ++ err = -EINVAL; ++ goto exit; ++ } ++ ++ padapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(padapter); ++ pwdinfo = &padapter->wdinfo; ++ pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ ++ DBG_871X(FUNC_ADPT_FMT" cookie:0x%llx\n", FUNC_ADPT_ARG(padapter), cookie); ++ ++ if (pcfg80211_wdinfo->is_ro_ch == _TRUE) { ++ DBG_8192C("%s, cancel ro ch timer\n", __func__); ++ _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++ #ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); ++ #endif ++ p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); ++ } ++ ++ #if 0 ++ // Disable P2P Listen State ++ if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); ++ _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); ++ } ++ } ++ else ++ #endif ++ { ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++#endif ++ } ++ ++ pcfg80211_wdinfo->is_ro_ch = _FALSE; ++ pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); ++ ++exit: ++ return err; ++} ++ ++#endif //CONFIG_P2P ++ ++static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, const u8 *buf, size_t len, int wait_ack) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ int ret = _FAIL; ++ bool ack = _TRUE; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ //struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ ++ rtw_set_scan_deny(padapter, 1000); ++ ++ rtw_scan_abort(padapter); ++ #ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_buddy_adapter_up(padapter)) ++ rtw_scan_abort(padapter->pbuddy_adapter); ++ #endif /* CONFIG_CONCURRENT_MODE */ ++#ifdef CONFIG_P2P ++ if (padapter->cfg80211_wdinfo.is_ro_ch == _TRUE) { ++ //DBG_8192C("%s, cancel ro ch timer\n", __func__); ++ //_cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++ //padapter->cfg80211_wdinfo.is_ro_ch = _FALSE; ++ #ifdef CONFIG_CONCURRENT_MODE ++ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ { ++ DBG_8192C("%s, extend ro ch time\n", __func__); ++ _set_timer( &padapter->cfg80211_wdinfo.remain_on_ch_timer, pwdinfo->ext_listen_period); ++ } ++ #endif //CONFIG_CONCURRENT_MODE ++ } ++#endif //CONFIG_P2P ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_LINKED )) { ++ u8 co_channel=0xff; ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ co_channel = rtw_get_oper_ch(padapter); ++ ++ if (tx_ch != pbuddy_mlmeext->cur_channel) { ++ ++ u16 ext_listen_period; ++ ++ if (ATOMIC_READ(&pwdev_priv->switch_ch_to)==1) { ++ if (check_buddy_fwstate(padapter, WIFI_FW_STATION_STATE)) { ++ DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); ++ issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); ++ } ++ ++ ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); ++ ++ //DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, pwdinfo->ext_listen_period); ++ //_set_timer(&pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_period); ++ } ++ ++ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ { ++ ext_listen_period = 500;// 500ms ++ } ++ else ++ { ++ ext_listen_period = pwdinfo->ext_listen_period; ++ } ++ ++ DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, ext_listen_period); ++ _set_timer(&pwdinfo->ap_p2p_switch_timer, ext_listen_period); ++ ++ } ++ ++ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ pmlmeext->cur_channel = tx_ch; ++ ++ if (tx_ch != co_channel) ++ set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ }else ++#endif //CONFIG_CONCURRENT_MODE ++ //if (tx_ch != pmlmeext->cur_channel) { ++ if(tx_ch != rtw_get_oper_ch(padapter)) { ++ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ pmlmeext->cur_channel = tx_ch; ++ set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ } ++ ++ //starting alloc mgmt frame to dump it ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ //ret = -ENOMEM; ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ _rtw_memcpy(pframe, (void*)buf, len); ++ pattrib->pktlen = len; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ //update seq number ++ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ pmlmeext->mgnt_seq++; ++ ++#ifdef CONFIG_P2P ++ rtw_xframe_chk_wfd_ie(pmgntframe); ++#endif /* CONFIG_P2P */ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ if (wait_ack) { ++ if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) { ++ ack = _FALSE; ++ ret = _FAIL; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ack == _FAIL\n", __func__); ++#endif ++ } else { ++ ++#ifdef CONFIG_XMIT_ACK ++ rtw_msleep_os(50); ++#endif ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ack=%d, ok!\n", __func__, ack); ++#endif ++ ret = _SUCCESS; ++ } ++ } else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++exit: ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ret=%d\n", __func__, ret); ++ #endif ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) ++ struct ieee80211_channel *chan, ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ bool offchan, ++ #endif ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ enum nl80211_channel_type channel_type, ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ bool channel_type_valid, ++ #endif ++ #endif ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ unsigned int wait, ++ #endif ++ const u8 *buf, size_t len, ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) ++ bool no_cck, ++ #endif ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) ++ bool dont_wait_for_ack, ++ #endif ++#else ++ struct cfg80211_mgmt_tx_params *params, ++#endif ++ u64 *cookie) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(wdev); ++#endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) ++ struct ieee80211_channel *chan = params->chan; ++ bool offchan = params->offchan; ++ unsigned int wait = params->wait; ++ const u8 *buf = params->buf; ++ size_t len = params->len; ++ bool no_cck = params->no_cck; ++ bool dont_wait_for_ack = params->dont_wait_for_ack; ++#endif ++ int ret = 0; ++ int tx_ret; ++ int wait_ack = 1; ++ u32 dump_limit = RTW_MAX_MGMT_TX_CNT; ++ u32 dump_cnt = 0; ++ bool ack = _TRUE; ++ u8 tx_ch; ++ u8 category, action; ++ u8 frame_styp; ++ int type = (-1); ++ u32 start = rtw_get_current_time(); ++ _adapter *padapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ if ((ndev == NULL) || (chan == NULL)) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ tx_ch = (u8)ieee80211_frequency_to_channel(chan->center_freq); ++ ++ padapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(padapter); ++ ++ /* cookie generation */ ++ *cookie = (unsigned long) buf; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_ADPT_FMT" len=%zu, ch=%d" ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ ", ch_type=%d" ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ ", channel_type_valid=%d" ++ #endif ++ #endif ++ "\n", FUNC_ADPT_ARG(padapter), ++ len, tx_ch ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ , channel_type ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ , channel_type_valid ++ #endif ++ #endif ++ ); ++#endif /* CONFIG_DEBUG_CFG80211 */ ++ ++ /* indicate ack before issue frame to avoid racing with rsp frame */ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_mgmt_tx_status(padapter, *cookie, buf, len, ack, GFP_KERNEL); ++#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) ++ cfg80211_action_tx_status(ndev, *cookie, buf, len, ack, GFP_KERNEL); ++#endif ++ ++ frame_styp = le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl) & IEEE80211_FCTL_STYPE; ++ if (IEEE80211_STYPE_PROBE_RESP == frame_styp) { ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("RTW_Tx: probe_resp tx_ch=%d, da="MAC_FMT"\n", tx_ch, MAC_ARG(GetAddr1Ptr(buf))); ++#endif /* CONFIG_DEBUG_CFG80211 */ ++ wait_ack = 0; ++ goto dump; ++ } ++ ++ if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { ++ DBG_8192C(FUNC_ADPT_FMT" frame_control:0x%x\n", FUNC_ADPT_ARG(padapter), ++ le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); ++ goto exit; ++ } ++ ++ DBG_8192C("RTW_Tx:tx_ch=%d, da="MAC_FMT"\n", tx_ch, MAC_ARG(GetAddr1Ptr(buf))); ++ #ifdef CONFIG_P2P ++ if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) { ++ goto dump; ++ } ++ #endif ++ if (category == RTW_WLAN_CATEGORY_PUBLIC) ++ DBG_871X("RTW_Tx:%s\n", action_public_str(action)); ++ else ++ DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); ++ ++dump: ++ ++ rtw_ps_deny(padapter, PS_DENY_MGNT_TX); ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret = -EFAULT; ++ goto cancel_ps_deny; ++ } ++ ++ while (1) { ++ u32 sleep_ms = 0; ++ u32 retry_guarantee_ms = 0; ++ ++ dump_cnt++; ++ tx_ret = _cfg80211_rtw_mgmt_tx(padapter, tx_ch, buf, len, wait_ack); ++ ++ switch (action) { ++ case ACT_PUBLIC_GAS_INITIAL_REQ: ++ case ACT_PUBLIC_GAS_INITIAL_RSP: ++ sleep_ms = 50; ++ retry_guarantee_ms = RTW_MAX_MGMT_TX_MS_GAS; ++ } ++ ++ if (tx_ret == _SUCCESS ++ || (dump_cnt >= dump_limit && rtw_get_passing_time_ms(start) >= retry_guarantee_ms)) ++ break; ++ ++ if (sleep_ms > 0) ++ rtw_msleep_os(sleep_ms); ++ } ++ ++ if (tx_ret != _SUCCESS || dump_cnt > 1) { ++ DBG_871X(FUNC_ADPT_FMT" %s (%d/%d) in %d ms\n", FUNC_ADPT_ARG(padapter), ++ tx_ret==_SUCCESS?"OK":"FAIL", dump_cnt, dump_limit, rtw_get_passing_time_ms(start)); ++ } ++ ++ switch (type) { ++ case P2P_GO_NEGO_CONF: ++ rtw_clear_scan_deny(padapter); ++ break; ++ case P2P_INVIT_RESP: ++ if (pwdev_priv->invit_info.flags & BIT(0) ++ && pwdev_priv->invit_info.status == 0) ++ { ++ DBG_871X(FUNC_ADPT_FMT" agree with invitation of persistent group\n", ++ FUNC_ADPT_ARG(padapter)); ++ rtw_set_scan_deny(padapter, 5000); ++ rtw_pwr_wakeup_ex(padapter, 5000); ++ rtw_clear_scan_deny(padapter); ++ } ++ break; ++ } ++ ++cancel_ps_deny: ++ rtw_ps_deny_cancel(padapter, PS_DENY_MGNT_TX); ++exit: ++ return ret; ++} ++ ++static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++ u16 frame_type, bool reg) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev = wdev_to_ndev(wdev); ++#endif ++ _adapter *adapter; ++ ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ if (ndev == NULL) ++ goto exit; ++ ++ adapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(adapter); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_ADPT_FMT" frame_type:%x, reg:%d\n", FUNC_ADPT_ARG(adapter), ++ frame_type, reg); ++#endif ++ ++ /* Wait QC Verify */ ++ return; ++ ++ switch (frame_type) { ++ case IEEE80211_STYPE_PROBE_REQ: /* 0x0040 */ ++ SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ, reg); ++ break; ++ case IEEE80211_STYPE_ACTION: /* 0x00D0 */ ++ SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_ACTION, reg); ++ break; ++ default: ++ break; ++ } ++ ++exit: ++ return; ++} ++ ++#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) ++static int cfg80211_rtw_tdls_mgmt(struct wiphy *wiphy, ++ struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0)) ++ const u8 *peer, ++#else ++ u8 *peer, ++#endif ++ u8 action_code, ++ u8 dialog_token, ++ u16 status_code, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0)) ++ u32 peer_capability, ++#endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 17, 0)) ++ bool initiator, ++#endif ++ const u8 *buf, ++ size_t len) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ int ret = 0; ++ struct tdls_txmgmt txmgmt; ++ ++ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { ++ DBG_871X("Discard tdls action:%d, since hal doesn't support tdls\n", action_code); ++ goto discard; ++ } ++ ++ if (rtw_tdls_is_driver_setup(padapter)) { ++ DBG_871X("Discard tdls action:%d, let driver to set up direct link\n", action_code); ++ goto discard; ++ } ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); ++ txmgmt.action_code = action_code; ++ txmgmt.dialog_token= dialog_token; ++ txmgmt.status_code = status_code; ++ txmgmt.len = len; ++ txmgmt.buf = (u8 *)rtw_malloc(txmgmt.len); ++ if (txmgmt.buf == NULL) { ++ ret = -ENOMEM; ++ goto bad; ++ } ++ _rtw_memcpy(txmgmt.buf, (void*)buf, txmgmt.len); ++ ++/* Debug purpose */ ++#if 1 ++ DBG_871X("%s %d\n", __FUNCTION__, __LINE__); ++ DBG_871X("peer:"MAC_FMT", action code:%d, dialog:%d, status code:%d\n", ++ MAC_ARG(txmgmt.peer), txmgmt.action_code, ++ txmgmt.dialog_token, txmgmt.status_code); ++ if (txmgmt.len > 0) { ++ int i=0; ++ for(;i < len; i++) ++ printk("%02x ", *(txmgmt.buf+i)); ++ DBG_871X("len:%d\n", (u32)txmgmt.len); ++ } ++#endif ++ ++ switch (txmgmt.action_code) { ++ case TDLS_SETUP_REQUEST: ++ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); ++ break; ++ case TDLS_SETUP_RESPONSE: ++ issue_tdls_setup_rsp(padapter, &txmgmt); ++ break; ++ case TDLS_SETUP_CONFIRM: ++ issue_tdls_setup_cfm(padapter, &txmgmt); ++ break; ++ case TDLS_TEARDOWN: ++ issue_tdls_teardown(padapter, &txmgmt, _TRUE); ++ break; ++ case TDLS_DISCOVERY_REQUEST: ++ issue_tdls_dis_req(padapter, &txmgmt); ++ break; ++ case TDLS_DISCOVERY_RESPONSE: ++ issue_tdls_dis_rsp(padapter, &txmgmt, pmlmeinfo->enc_algo? _TRUE : _FALSE); ++ break; ++ } ++ ++bad: ++ if (txmgmt.buf) ++ rtw_mfree(txmgmt.buf, txmgmt.len); ++ ++discard: ++ return ret; ++} ++ ++static int cfg80211_rtw_tdls_oper(struct wiphy *wiphy, ++ struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0)) ++ const u8 *peer, ++#else ++ u8 *peer, ++#endif ++ enum nl80211_tdls_operation oper) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct tdls_txmgmt txmgmt; ++ struct sta_info *ptdls_sta = NULL; ++ ++ DBG_871X(FUNC_NDEV_FMT", nl80211_tdls_operation:%d\n", FUNC_NDEV_ARG(ndev), oper); ++ ++ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { ++ DBG_871X("Discard tdls oper:%d, since hal doesn't support tdls\n", oper); ++ return 0; ++ } ++ ++#ifdef CONFIG_LPS ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); ++#endif //CONFIG_LPS ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ if (peer) ++ _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); ++ ++ if (rtw_tdls_is_driver_setup(padapter)) { ++ /* these two cases are done by driver itself */ ++ if (oper == NL80211_TDLS_ENABLE_LINK || oper == NL80211_TDLS_DISABLE_LINK) ++ return 0; ++ } ++ ++ switch (oper) { ++ case NL80211_TDLS_DISCOVERY_REQ: ++ issue_tdls_dis_req(padapter, &txmgmt); ++ break; ++ case NL80211_TDLS_SETUP: ++#ifdef CONFIG_WFD ++ if ( _AES_ != padapter->securitypriv.dot11PrivacyAlgrthm ) { ++ if ( padapter->wdinfo.wfd_tdls_weaksec == _TRUE) ++ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); ++ else ++ DBG_871X( "[%s] Current link is not AES, SKIP sending the tdls setup request!!\n", __FUNCTION__ ); ++ } else ++#endif // CONFIG_WFD ++ { ++ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); ++ } ++ break; ++ case NL80211_TDLS_TEARDOWN: ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), txmgmt.peer); ++ if (ptdls_sta != NULL) { ++ txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; ++ issue_tdls_teardown(padapter, &txmgmt, _TRUE); ++ }else { ++ DBG_871X( "TDLS peer not found\n"); ++ } ++ break; ++ case NL80211_TDLS_ENABLE_LINK: ++ DBG_871X(FUNC_NDEV_FMT", NL80211_TDLS_ENABLE_LINK;mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(peer)); ++ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), peer); ++ if (ptdls_sta != NULL) { ++ ptdlsinfo->link_established = _TRUE; ++ ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; ++ ptdls_sta->state |= _FW_LINKED; ++ rtw_tdls_cmd(padapter, txmgmt.peer, TDLS_ESTABLISHED); ++ } ++ break; ++ case NL80211_TDLS_DISABLE_LINK: ++ DBG_871X(FUNC_NDEV_FMT", NL80211_TDLS_DISABLE_LINK;mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(peer)); ++ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), peer); ++ if (ptdls_sta != NULL) { ++ rtw_tdls_cmd(padapter, peer, TDLS_TEARDOWN_STA_LOCALLY); ++ } ++ break; ++ } ++ return 0; ++} ++#endif /* CONFIG_TDLS */ ++ ++#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) ++static int cfg80211_rtw_sched_scan_start(struct wiphy *wiphy, ++ struct net_device *dev, ++ struct cfg80211_sched_scan_request *request) { ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 ret; ++ ++ if (padapter->bup == _FALSE) { ++ DBG_871X("%s: net device is down.\n", __func__); ++ return -EIO; ++ } ++ ++ if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE || ++ check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE || ++ check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ DBG_871X("%s: device is busy.\n", __func__); ++ rtw_scan_abort(padapter); ++ } ++ ++ if (request == NULL) { ++ DBG_871X("%s: invalid cfg80211_requests parameters.\n", __func__); ++ return -EINVAL; ++ } ++ ++ ret = rtw_android_cfg80211_pno_setup(dev, request->ssids, ++ request->n_ssids, request->interval); ++ ++ if (ret < 0) { ++ DBG_871X("%s ret: %d\n", __func__, ret); ++ goto exit; ++ } ++ ++ ret = rtw_android_pno_enable(dev, _TRUE); ++ if (ret < 0) { ++ DBG_871X("%s ret: %d\n", __func__, ret); ++ goto exit; ++ } ++exit: ++ return ret; ++} ++ ++static int cfg80211_rtw_sched_scan_stop(struct wiphy *wiphy, ++ struct net_device *dev) { ++ return rtw_android_pno_enable(dev, _FALSE); ++} ++#endif /* CONFIG_PNO_SUPPORT */ ++ ++static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *ndev, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 wps_oui[8]={0x0,0x50,0xf2,0x04}; ++ u8 *p2p_ie; ++ u32 wfd_ielen = 0; ++ u8 *wfd_ie; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ DBG_871X(FUNC_NDEV_FMT" ielen=%d\n", FUNC_NDEV_ARG(ndev), len); ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("bcn_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(pmlmepriv->wps_beacon_ie) ++ { ++ u32 free_len = pmlmepriv->wps_beacon_ie_len; ++ pmlmepriv->wps_beacon_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_beacon_ie, free_len); ++ pmlmepriv->wps_beacon_ie = NULL; ++ } ++ ++ pmlmepriv->wps_beacon_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_beacon_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_beacon_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_beacon_ie_len = wps_ielen; ++ ++ update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); ++ ++ } ++ ++ //buf += wps_ielen; ++ //len -= wps_ielen; ++ ++ #ifdef CONFIG_P2P ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("bcn_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_beacon_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_beacon_ie_len; ++ pmlmepriv->p2p_beacon_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_beacon_ie, free_len); ++ pmlmepriv->p2p_beacon_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_beacon_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_beacon_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ _rtw_memcpy(pmlmepriv->p2p_beacon_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_beacon_ie_len = p2p_ielen; ++ ++ } ++ #endif //CONFIG_P2P ++ ++ ++ #ifdef CONFIG_WFD ++ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("bcn_wfd_ielen=%d\n", wfd_ielen); ++ #endif ++ ++ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_BEACON_IE, wfd_ie, wfd_ielen) != _SUCCESS) ++ return -EINVAL; ++ } ++ #endif /* CONFIG_WFD */ ++ ++ pmlmeext->bstart_bss = _TRUE; ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 *p2p_ie; ++ u32 wfd_ielen = 0; ++ u8 *wfd_ie; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ uint attr_contentlen = 0; ++ u16 uconfig_method, *puconfig_method = NULL; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_resp_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) ++ { ++ u8 sr = 0; ++ rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); ++ ++ if (sr != 0) ++ { ++ DBG_871X("%s, got sr\n", __func__); ++ } ++ else ++ { ++ DBG_8192C("GO mode process WPS under site-survey, sr no set\n"); ++ return ret; ++ } ++ } ++ ++ if(pmlmepriv->wps_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_resp_ie_len; ++ pmlmepriv->wps_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_resp_ie, free_len); ++ pmlmepriv->wps_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->wps_probe_resp_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_probe_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ //add PUSH_BUTTON config_method by driver self in wpsie of probe_resp at GO Mode ++ if ( (puconfig_method = (u16*)rtw_get_wps_attr_content( wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD , NULL, &attr_contentlen)) != NULL ) ++ { ++ //struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct wireless_dev *wdev = padapter->rtw_wdev; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ //printk("config_method in wpsie of probe_resp = 0x%x\n", be16_to_cpu(*puconfig_method)); ++ #endif ++ ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ /* for WIFI-DIRECT LOGO 4.2.2, AUTO GO can't set PUSH_BUTTON flags */ ++ if (wdev->iftype == NL80211_IFTYPE_P2P_GO) { ++ uconfig_method = WPS_CM_PUSH_BUTTON; ++ uconfig_method = cpu_to_be16(uconfig_method); ++ ++ *puconfig_method &= ~uconfig_method; ++ } ++ #endif ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_probe_resp_ie_len = wps_ielen; ++ ++ } ++ ++ //buf += wps_ielen; ++ //len -= wps_ielen; ++ ++ #ifdef CONFIG_P2P ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ u8 is_GO = _FALSE; ++ u32 attr_contentlen = 0; ++ u16 cap_attr=0; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_resp_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ //Check P2P Capability ATTR ++ if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) ++ { ++ u8 grp_cap=0; ++ //DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); ++ cap_attr = le16_to_cpu(cap_attr); ++ grp_cap = (u8)((cap_attr >> 8)&0xff); ++ ++ is_GO = (grp_cap&BIT(0)) ? _TRUE:_FALSE; ++ ++ if(is_GO) ++ DBG_8192C("Got P2P Capability Attr, grp_cap=0x%x, is_GO\n", grp_cap); ++ } ++ ++ ++ if(is_GO == _FALSE) ++ { ++ if(pmlmepriv->p2p_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_probe_resp_ie_len; ++ pmlmepriv->p2p_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_probe_resp_ie, free_len); ++ pmlmepriv->p2p_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_probe_resp_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_probe_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_probe_resp_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_probe_resp_ie_len = p2p_ielen; ++ } ++ else ++ { ++ if(pmlmepriv->p2p_go_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_go_probe_resp_ie_len; ++ pmlmepriv->p2p_go_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_go_probe_resp_ie, free_len); ++ pmlmepriv->p2p_go_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_go_probe_resp_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_go_probe_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_go_probe_resp_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_go_probe_resp_ie_len = p2p_ielen; ++ } ++ ++ } ++ #endif //CONFIG_P2P ++ ++ ++ #ifdef CONFIG_WFD ++ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_resp_wfd_ielen=%d\n", wfd_ielen); ++ #endif ++ ++ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_PROBE_RESP_IE, wfd_ie, wfd_ielen) != _SUCCESS) ++ return -EINVAL; ++ } ++ #endif /* CONFIG_WFD */ ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *buf, int len) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 *ie; ++ u32 ie_len; ++ ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++ ++ if (len <= 0) ++ goto exit; ++ ++ ie = rtw_get_wps_ie(buf, len, NULL, &ie_len); ++ if (ie && ie_len) { ++ if (pmlmepriv->wps_assoc_resp_ie) { ++ u32 free_len = pmlmepriv->wps_assoc_resp_ie_len; ++ ++ pmlmepriv->wps_assoc_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_assoc_resp_ie, free_len); ++ pmlmepriv->wps_assoc_resp_ie = NULL; ++ } ++ ++ pmlmepriv->wps_assoc_resp_ie = rtw_malloc(ie_len); ++ if (pmlmepriv->wps_assoc_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ } ++ _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, ie, ie_len); ++ pmlmepriv->wps_assoc_resp_ie_len = ie_len; ++ } ++ ++ ie = rtw_get_p2p_ie(buf, len, NULL, &ie_len); ++ if (ie && ie_len) { ++ if (pmlmepriv->p2p_assoc_resp_ie) { ++ u32 free_len = pmlmepriv->p2p_assoc_resp_ie_len; ++ ++ pmlmepriv->p2p_assoc_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_assoc_resp_ie, free_len); ++ pmlmepriv->p2p_assoc_resp_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_assoc_resp_ie = rtw_malloc(ie_len); ++ if (pmlmepriv->p2p_assoc_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ } ++ _rtw_memcpy(pmlmepriv->p2p_assoc_resp_ie, ie, ie_len); ++ pmlmepriv->p2p_assoc_resp_ie_len = ie_len; ++ } ++ ++#ifdef CONFIG_WFD ++ ie = rtw_get_wfd_ie(buf, len, NULL, &ie_len); ++ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_ASSOC_RESP_IE, ie, ie_len) != _SUCCESS) ++ return -EINVAL; ++#endif ++ ++exit: ++ return ret; ++} ++ ++int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, ++ int type) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u32 p2p_ielen = 0; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if( (rtw_get_wps_ie(buf, len, NULL, &wps_ielen) && (wps_ielen>0)) ++ #ifdef CONFIG_P2P ++ || (rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen) && (p2p_ielen>0)) ++ #endif ++ ) ++ { ++ if (net != NULL) ++ { ++ switch (type) ++ { ++ case 0x1: //BEACON ++ ret = rtw_cfg80211_set_beacon_wpsp2pie(net, buf, len); ++ break; ++ case 0x2: //PROBE_RESP ++ ret = rtw_cfg80211_set_probe_resp_wpsp2pie(net, buf, len); ++ break; ++ case 0x4: //ASSOC_RESP ++ ret = rtw_cfg80211_set_assoc_resp_wpsp2pie(net, buf, len); ++ break; ++ } ++ } ++ } ++ ++ return ret; ++ ++} ++ ++static void rtw_cfg80211_init_ht_capab_ex(_adapter *padapter, struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ u8 stbc_rx_enable = _FALSE; ++ ++ rtw_ht_use_default_setting(padapter); ++ ++ /* RX LDPC */ ++ if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_RX)) ++ ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; ++ ++ /* TX STBC */ ++ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX)) ++ ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC; ++ ++ /* RX STBC */ ++ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX)) { ++ /*rtw_rx_stbc 0: disable, bit(0):enable 2.4g, bit(1):enable 5g*/ ++ if (IEEE80211_BAND_2GHZ == band) ++ stbc_rx_enable = (pregistrypriv->rx_stbc & BIT(0))?_TRUE:_FALSE; ++ if (IEEE80211_BAND_5GHZ == band) ++ stbc_rx_enable = (pregistrypriv->rx_stbc & BIT(1))?_TRUE:_FALSE; ++ ++ if (stbc_rx_enable) { ++ switch (rf_type) { ++ case RF_1T1R: ++ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/*RX STBC One spatial stream*/ ++ break; ++ ++ case RF_2T2R: ++ case RF_1T2R: ++ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/* Only one spatial-stream STBC RX is supported */ ++ break; ++ case RF_3T3R: ++ case RF_3T4R: ++ case RF_4T4R: ++ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/* Only one spatial-stream STBC RX is supported */ ++ break; ++ default: ++ DBG_871X("[warning] rf_type %d is not expected\n", rf_type); ++ break; ++ } ++ } ++ } ++} ++ ++static void rtw_cfg80211_init_ht_capab(_adapter *padapter, struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type) ++{ ++#define MAX_BIT_RATE_40MHZ_MCS23 450 /* Mbps */ ++#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */ ++#define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */ ++ ++ ht_cap->ht_supported = _TRUE; ++ ++ ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | ++ IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 | ++ IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU; ++ rtw_cfg80211_init_ht_capab_ex(padapter, ht_cap, band, rf_type); ++ ++ /* ++ *Maximum length of AMPDU that the STA can receive. ++ *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets) ++ */ ++ ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; ++ ++ /*Minimum MPDU start spacing , */ ++ ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; ++ ++ ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; ++ ++ /* ++ *hw->wiphy->bands[IEEE80211_BAND_2GHZ] ++ *base on ant_num ++ *rx_mask: RX mask ++ *if rx_ant =1 rx_mask[0]=0xff;==>MCS0-MCS7 ++ *if rx_ant =2 rx_mask[1]=0xff;==>MCS8-MCS15 ++ *if rx_ant >=3 rx_mask[2]=0xff; ++ *if BW_40 rx_mask[4]=0x01; ++ *highest supported RX rate ++ */ ++ if (rf_type == RF_1T1R) { ++ ht_cap->mcs.rx_mask[0] = 0xFF; ++ ++ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7; ++ } else if ((rf_type == RF_1T2R) || (rf_type == RF_2T2R) || (rf_type == RF_2T2R_GREEN)) { ++ ht_cap->mcs.rx_mask[0] = 0xFF; ++ ht_cap->mcs.rx_mask[1] = 0xFF; ++ ++ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15; ++ } else if ((rf_type == RF_2T3R) || (rf_type == RF_3T3R)) { ++ ht_cap->mcs.rx_mask[0] = 0xFF; ++ ht_cap->mcs.rx_mask[1] = 0xFF; ++ ht_cap->mcs.rx_mask[2] = 0xFF; ++ ++ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS23; ++ } else { ++ rtw_warn_on(1); ++ DBG_8192C("%s, error rf_type=%d\n", __func__, rf_type); ++ } ++ ++} ++ ++void rtw_cfg80211_init_wiphy(_adapter *padapter) ++{ ++ u8 rf_type; ++ struct ieee80211_supported_band *bands; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct wiphy *wiphy = pwdev->wiphy; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ DBG_8192C("%s:rf_type=%d\n", __func__, rf_type); ++ ++ if (IsSupported24G(padapter->registrypriv.wireless_mode)) { ++ bands = wiphy->bands[IEEE80211_BAND_2GHZ]; ++ if(bands) ++ rtw_cfg80211_init_ht_capab(padapter, &bands->ht_cap, IEEE80211_BAND_2GHZ, rf_type); ++ } ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++ if (IsSupported5G(padapter->registrypriv.wireless_mode)) { ++ bands = wiphy->bands[IEEE80211_BAND_5GHZ]; ++ if(bands) ++ rtw_cfg80211_init_ht_capab(padapter, &bands->ht_cap, IEEE80211_BAND_5GHZ, rf_type); ++ } ++#endif ++ /* init regulary domain */ ++ rtw_regd_init(padapter); ++ ++ /* copy mac_addr to wiphy */ ++ _rtw_memcpy(wiphy->perm_addr, adapter_mac_addr(padapter), ETH_ALEN); ++ ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) ++struct ieee80211_iface_limit rtw_limits[] = { ++ { .max = 2, ++ .types = BIT(NL80211_IFTYPE_STATION) ++ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) ++ | BIT(NL80211_IFTYPE_P2P_CLIENT) ++ #endif ++ }, ++ #ifdef CONFIG_AP_MODE ++ { .max = 1, ++ .types = BIT(NL80211_IFTYPE_AP) ++ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) ++ | BIT(NL80211_IFTYPE_P2P_GO) ++ #endif ++ }, ++ #endif ++}; ++ ++struct ieee80211_iface_combination rtw_combinations[] = { ++ { .limits = rtw_limits, ++ .n_limits = ARRAY_SIZE(rtw_limits), ++ .max_interfaces = 2, ++ .num_different_channels = 1, ++ }, ++}; ++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) */ ++ ++static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct registry_priv *regsty = dvobj_to_regsty(dvobj); ++ ++ wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; ++ ++ wiphy->max_scan_ssids = RTW_SSID_SCAN_AMOUNT; ++ wiphy->max_scan_ie_len = RTW_SCAN_IE_LEN_MAX; ++ wiphy->max_num_pmkids = RTW_MAX_NUM_PMKIDS; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ wiphy->max_remain_on_channel_duration = RTW_MAX_REMAIN_ON_CHANNEL_DURATION; ++#endif ++ ++ wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) ++ | BIT(NL80211_IFTYPE_ADHOC) ++#ifdef CONFIG_AP_MODE ++ | BIT(NL80211_IFTYPE_AP) ++ #ifdef CONFIG_WIFI_MONITOR ++ | BIT(NL80211_IFTYPE_MONITOR) ++ #endif ++#endif ++#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) ++ | BIT(NL80211_IFTYPE_P2P_CLIENT) ++ | BIT(NL80211_IFTYPE_P2P_GO) ++#endif ++ ; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++#ifdef CONFIG_AP_MODE ++ wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes; ++#endif //CONFIG_AP_MODE ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) ++ #ifdef CONFIG_WIFI_MONITOR ++ wiphy->software_iftypes |= BIT(NL80211_IFTYPE_MONITOR); ++ #endif ++#endif ++ ++ #if defined(RTW_SINGLE_WIPHY) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) ++ wiphy->iface_combinations = rtw_combinations; ++ wiphy->n_iface_combinations = ARRAY_SIZE(rtw_combinations); ++ #endif ++ ++ wiphy->cipher_suites = rtw_cipher_suites; ++ wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites); ++ ++ if (IsSupported24G(adapter->registrypriv.wireless_mode)) ++ wiphy->bands[IEEE80211_BAND_2GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_2GHZ); ++ ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++ if (IsSupported5G(adapter->registrypriv.wireless_mode)) ++ wiphy->bands[IEEE80211_BAND_5GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_5GHZ); ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38) && LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)) ++ wiphy->flags |= WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS; ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) ++ wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; ++ wiphy->flags |= WIPHY_FLAG_HAVE_AP_SME; ++ /* remove WIPHY_FLAG_OFFCHAN_TX, because we not support this feature */ ++ /* wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX | WIPHY_FLAG_HAVE_AP_SME; */ ++#endif ++ ++#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) ++ wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; ++#ifdef CONFIG_PNO_SUPPORT ++ wiphy->max_sched_scan_ssids = MAX_PNO_LIST_COUNT; ++#endif ++#endif ++ ++#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,11,0)) ++ wiphy->wowlan = wowlan_stub; ++#else ++ wiphy->wowlan = &wowlan_stub; ++#endif ++#endif ++ ++#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) ++ wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS; ++#ifndef CONFIG_TDLS_DRIVER_SETUP ++ wiphy->flags |= WIPHY_FLAG_TDLS_EXTERNAL_SETUP; //Driver handles key exchange ++ wiphy->flags |= NL80211_ATTR_HT_CAPABILITY; ++#endif //CONFIG_TDLS_DRIVER_SETUP ++#endif /* CONFIG_TDLS */ ++ ++ if (regsty->power_mgnt != PS_MODE_ACTIVE) ++ wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT; ++ else ++ wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) ++ //wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM; ++#endif ++} ++ ++static struct cfg80211_ops rtw_cfg80211_ops = { ++ .change_virtual_intf = cfg80211_rtw_change_iface, ++ .add_key = cfg80211_rtw_add_key, ++ .get_key = cfg80211_rtw_get_key, ++ .del_key = cfg80211_rtw_del_key, ++ .set_default_key = cfg80211_rtw_set_default_key, ++#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0)) ++ .set_rekey_data = cfg80211_rtw_set_rekey_data, ++#endif /*CONFIG_GTK_OL*/ ++ .get_station = cfg80211_rtw_get_station, ++ .scan = cfg80211_rtw_scan, ++ .set_wiphy_params = cfg80211_rtw_set_wiphy_params, ++ .connect = cfg80211_rtw_connect, ++ .disconnect = cfg80211_rtw_disconnect, ++ .join_ibss = cfg80211_rtw_join_ibss, ++ .leave_ibss = cfg80211_rtw_leave_ibss, ++ .set_tx_power = cfg80211_rtw_set_txpower, ++ .get_tx_power = cfg80211_rtw_get_txpower, ++ .set_power_mgmt = cfg80211_rtw_set_power_mgmt, ++ .set_pmksa = cfg80211_rtw_set_pmksa, ++ .del_pmksa = cfg80211_rtw_del_pmksa, ++ .flush_pmksa = cfg80211_rtw_flush_pmksa, ++ ++#ifdef CONFIG_AP_MODE ++ .add_virtual_intf = cfg80211_rtw_add_virtual_intf, ++ .del_virtual_intf = cfg80211_rtw_del_virtual_intf, ++ ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) ++ .add_beacon = cfg80211_rtw_add_beacon, ++ .set_beacon = cfg80211_rtw_set_beacon, ++ .del_beacon = cfg80211_rtw_del_beacon, ++ #else ++ .start_ap = cfg80211_rtw_start_ap, ++ .change_beacon = cfg80211_rtw_change_beacon, ++ .stop_ap = cfg80211_rtw_stop_ap, ++ #endif ++ ++ .add_station = cfg80211_rtw_add_station, ++ .del_station = cfg80211_rtw_del_station, ++ .change_station = cfg80211_rtw_change_station, ++ .dump_station = cfg80211_rtw_dump_station, ++ .change_bss = cfg80211_rtw_change_bss, ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) ++ .set_channel = cfg80211_rtw_set_channel, ++ #endif ++ //.auth = cfg80211_rtw_auth, ++ //.assoc = cfg80211_rtw_assoc, ++#endif //CONFIG_AP_MODE ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) ++ .set_monitor_channel = cfg80211_rtw_set_monitor_channel, ++#endif ++ ++#ifdef CONFIG_P2P ++ .remain_on_channel = cfg80211_rtw_remain_on_channel, ++ .cancel_remain_on_channel = cfg80211_rtw_cancel_remain_on_channel, ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ .mgmt_tx = cfg80211_rtw_mgmt_tx, ++ .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, ++#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) ++ .action = cfg80211_rtw_mgmt_tx, ++#endif ++ ++#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) ++ .tdls_mgmt = cfg80211_rtw_tdls_mgmt, ++ .tdls_oper = cfg80211_rtw_tdls_oper, ++#endif /* CONFIG_TDLS */ ++ ++#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) ++ .sched_scan_start = cfg80211_rtw_sched_scan_start, ++ .sched_scan_stop = cfg80211_rtw_sched_scan_stop, ++#endif /* CONFIG_PNO_SUPPORT */ ++}; ++ ++struct wiphy *rtw_wiphy_alloc(_adapter *padapter, struct device *dev) ++{ ++ struct wiphy *wiphy; ++ struct rtw_wiphy_data *wiphy_data; ++ ++ /* wiphy */ ++ wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(_adapter*)); ++ if (!wiphy) { ++ DBG_8192C("Couldn't allocate wiphy device\n"); ++ goto exit; ++ } ++ set_wiphy_dev(wiphy, dev); ++ *((_adapter**)wiphy_priv(wiphy)) = padapter; ++ ++ rtw_cfg80211_preinit_wiphy(padapter, wiphy); ++ ++ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); ++ ++exit: ++ return wiphy; ++} ++ ++void rtw_wiphy_free(struct wiphy *wiphy) ++{ ++ if (!wiphy) ++ return; ++ ++ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); ++ ++ if (wiphy->bands[IEEE80211_BAND_2GHZ]) { ++ rtw_spt_band_free(wiphy->bands[IEEE80211_BAND_2GHZ]); ++ wiphy->bands[IEEE80211_BAND_2GHZ] = NULL; ++ } ++ if (wiphy->bands[IEEE80211_BAND_5GHZ]) { ++ rtw_spt_band_free(wiphy->bands[IEEE80211_BAND_5GHZ]); ++ wiphy->bands[IEEE80211_BAND_5GHZ] = NULL; ++ } ++ ++ wiphy_free(wiphy); ++} ++ ++int rtw_wiphy_register(struct wiphy *wiphy) ++{ ++ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) ++ rtw_cfgvendor_attach(wiphy); ++#endif ++ ++ return wiphy_register(wiphy); ++} ++ ++void rtw_wiphy_unregister(struct wiphy *wiphy) ++{ ++ DBG_871X(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) ++ rtw_cfgvendor_detach(wiphy); ++#endif ++ ++ return wiphy_unregister(wiphy); ++} ++ ++int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy) ++{ ++ int ret = 0; ++ struct net_device *pnetdev = padapter->pnetdev; ++ struct wireless_dev *wdev; ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ DBG_8192C("%s(padapter=%p)\n", __func__, padapter); ++ ++ /* wdev */ ++ wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); ++ if (!wdev) { ++ DBG_8192C("Couldn't allocate wireless device\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ wdev->wiphy = wiphy; ++ wdev->netdev = pnetdev; ++ ++ wdev->iftype = NL80211_IFTYPE_STATION; // will be init in rtw_hal_init() ++ // Must sync with _rtw_init_mlme_priv() ++ // pmlmepriv->fw_state = WIFI_STATION_STATE ++ //wdev->iftype = NL80211_IFTYPE_MONITOR; // for rtw_setopmode_cmd() in cfg80211_rtw_change_iface() ++ padapter->rtw_wdev = wdev; ++ pnetdev->ieee80211_ptr = wdev; ++ ++ //init pwdev_priv ++ pwdev_priv = adapter_wdev_data(padapter); ++ pwdev_priv->rtw_wdev = wdev; ++ pwdev_priv->pmon_ndev = NULL; ++ pwdev_priv->ifname_mon[0] = '\0'; ++ pwdev_priv->padapter = padapter; ++ pwdev_priv->scan_request = NULL; ++ _rtw_spinlock_init(&pwdev_priv->scan_req_lock); ++ ++ pwdev_priv->p2p_enabled = _FALSE; ++ pwdev_priv->provdisc_req_issued = _FALSE; ++ rtw_wdev_invit_info_init(&pwdev_priv->invit_info); ++ rtw_wdev_nego_info_init(&pwdev_priv->nego_info); ++ ++ pwdev_priv->bandroid_scan = _FALSE; ++ ++ if(padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE) ++ pwdev_priv->power_mgmt = _TRUE; ++ else ++ pwdev_priv->power_mgmt = _FALSE; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); ++#endif ++ ++exit: ++ return ret; ++} ++ ++void rtw_wdev_free(struct wireless_dev *wdev) ++{ ++ DBG_8192C("%s(wdev=%p)\n", __func__, wdev); ++ ++ if (!wdev) ++ return; ++ ++ rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); ++} ++ ++void rtw_wdev_unregister(struct wireless_dev *wdev) ++{ ++ struct net_device *ndev; ++ _adapter *adapter; ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ DBG_8192C("%s(wdev=%p)\n", __func__, wdev); ++ ++ if (!wdev) ++ return; ++ ++ if(!(ndev = wdev_to_ndev(wdev))) ++ return; ++ ++ adapter = (_adapter *)rtw_netdev_priv(ndev); ++ pwdev_priv = adapter_wdev_data(adapter); ++ ++ rtw_cfg80211_indicate_scan_done(adapter, _TRUE); ++ ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0)) ++ if (wdev->current_bss) { ++ u8 locally_generated = 1; ++ DBG_871X(FUNC_ADPT_FMT" clear current_bss by cfg80211_disconnected\n", FUNC_ADPT_ARG(adapter)); ++ cfg80211_disconnected(adapter->pnetdev, 0, NULL, 0, locally_generated, GFP_ATOMIC); ++ } ++ #elif ((LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4, 2, 0))) || defined(COMPAT_KERNEL_RELEASE) ++ if (wdev->current_bss) { ++ DBG_871X(FUNC_ADPT_FMT" clear current_bss by cfg80211_disconnected\n", FUNC_ADPT_ARG(adapter)); ++ cfg80211_disconnected(adapter->pnetdev, 0, NULL, 0, GFP_ATOMIC); ++ } ++ #endif ++ ++ if (pwdev_priv->pmon_ndev) { ++ DBG_8192C("%s, unregister monitor interface\n", __func__); ++ unregister_netdev(pwdev_priv->pmon_ndev); ++ } ++} ++ ++int rtw_cfg80211_ndev_res_alloc(_adapter *adapter) ++{ ++ int ret = _FAIL; ++ ++#if !defined(RTW_SINGLE_WIPHY) ++ struct wiphy *wiphy; ++ struct device *dev = dvobj_to_dev(adapter_to_dvobj(adapter)); ++ ++ wiphy = rtw_wiphy_alloc(adapter, dev); ++ if (wiphy == NULL) ++ goto exit; ++ ++ adapter->wiphy = wiphy; ++#endif ++ ++ if (rtw_wdev_alloc(adapter, adapter_to_wiphy(adapter)) == 0) ++ ret = _SUCCESS; ++ ++#if !defined(RTW_SINGLE_WIPHY) ++ if (ret != _SUCCESS) { ++ rtw_wiphy_free(wiphy); ++ adapter->wiphy = NULL; ++ } ++#endif ++ ++exit: ++ return ret; ++} ++ ++void rtw_cfg80211_ndev_res_free(_adapter *adapter) ++{ ++ rtw_wdev_free(adapter->rtw_wdev); ++#if !defined(RTW_SINGLE_WIPHY) ++ rtw_wiphy_free(adapter_to_wiphy(adapter)); ++ adapter->wiphy = NULL; ++#endif ++} ++ ++int rtw_cfg80211_ndev_res_register(_adapter *adapter) ++{ ++ int ret = _FAIL; ++ ++#if !defined(RTW_SINGLE_WIPHY) ++ if (rtw_wiphy_register(adapter_to_wiphy(adapter)) < 0) { ++ DBG_871X("%s rtw_wiphy_register fail for if%d\n", __func__, (adapter->iface_id+1)); ++ goto exit; ++ } ++#endif ++ ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++void rtw_cfg80211_ndev_res_unregister(_adapter *adapter) ++{ ++ rtw_wdev_unregister(adapter->rtw_wdev); ++} ++ ++int rtw_cfg80211_dev_res_alloc(struct dvobj_priv *dvobj) ++{ ++ int ret = _FAIL; ++ ++#if defined(RTW_SINGLE_WIPHY) ++ struct wiphy *wiphy; ++ struct device *dev = dvobj_to_dev(dvobj); ++ ++ wiphy = rtw_wiphy_alloc(dvobj->padapters[IFACE_ID0], dev); ++ if (wiphy == NULL) ++ goto exit; ++ ++ dvobj->wiphy = wiphy; ++#endif ++ ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++void rtw_cfg80211_dev_res_free(struct dvobj_priv *dvobj) ++{ ++#if defined(RTW_SINGLE_WIPHY) ++ rtw_wiphy_free(dvobj_to_wiphy(dvobj)); ++ dvobj->wiphy = NULL; ++#endif ++} ++ ++int rtw_cfg80211_dev_res_register(struct dvobj_priv *dvobj) ++{ ++ int ret = _FAIL; ++ ++#if defined(RTW_SINGLE_WIPHY) ++ if (rtw_wiphy_register(dvobj_to_wiphy(dvobj)) != 0) ++ goto exit; ++#endif ++ ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++void rtw_cfg80211_dev_res_unregister(struct dvobj_priv *dvobj) ++{ ++#if defined(RTW_SINGLE_WIPHY) ++ rtw_wiphy_unregister(dvobj_to_wiphy(dvobj)); ++#endif ++} ++ ++#endif /* CONFIG_IOCTL_CFG80211 */ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_cfg80211.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_cfg80211.h +old mode 100755 +new mode 100644 +index 3727922..242a1c1 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_cfg80211.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_cfg80211.h +@@ -1,179 +1,212 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __IOCTL_CFG80211_H__ +-#define __IOCTL_CFG80211_H__ +- +- +-#if defined(RTW_USE_CFG80211_STA_EVENT) +- #undef CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER +-#endif +- +-struct rtw_wdev_invit_info { +- u8 state; /* 0: req, 1:rep */ +- u8 peer_mac[ETH_ALEN]; +- u8 active; +- u8 token; +- u8 flags; +- u8 status; +- u8 req_op_ch; +- u8 rsp_op_ch; +-}; +- +-#define rtw_wdev_invit_info_init(invit_info) \ +- do { \ +- (invit_info)->state = 0xff; \ +- _rtw_memset((invit_info)->peer_mac, 0, ETH_ALEN); \ +- (invit_info)->active = 0xff; \ +- (invit_info)->token = 0; \ +- (invit_info)->flags = 0x00; \ +- (invit_info)->status = 0xff; \ +- (invit_info)->req_op_ch = 0; \ +- (invit_info)->rsp_op_ch = 0; \ +- } while (0) +- +-struct rtw_wdev_nego_info { +- u8 state; /* 0: req, 1:rep, 2:conf */ +- u8 peer_mac[ETH_ALEN]; +- u8 active; +- u8 token; +- u8 status; +- u8 req_intent; +- u8 req_op_ch; +- u8 req_listen_ch; +- u8 rsp_intent; +- u8 rsp_op_ch; +- u8 conf_op_ch; +-}; +- +-#define rtw_wdev_nego_info_init(nego_info) \ +- do { \ +- (nego_info)->state = 0xff; \ +- _rtw_memset((nego_info)->peer_mac, 0, ETH_ALEN); \ +- (nego_info)->active = 0xff; \ +- (nego_info)->token = 0; \ +- (nego_info)->status = 0xff; \ +- (nego_info)->req_intent = 0xff; \ +- (nego_info)->req_op_ch = 0; \ +- (nego_info)->req_listen_ch = 0; \ +- (nego_info)->rsp_intent = 0xff; \ +- (nego_info)->rsp_op_ch = 0; \ +- (nego_info)->conf_op_ch = 0; \ +- } while (0) +- +-struct rtw_wdev_priv +-{ +- struct wireless_dev *rtw_wdev; +- +- _adapter *padapter; +- +- struct cfg80211_scan_request *scan_request; +- _lock scan_req_lock; +- +- struct net_device *pmon_ndev;//for monitor interface +- char ifname_mon[IFNAMSIZ + 1]; //interface name for monitor interface +- +- u8 p2p_enabled; +- +- u8 provdisc_req_issued; +- +- struct rtw_wdev_invit_info invit_info; +- struct rtw_wdev_nego_info nego_info; +- +- u8 bandroid_scan; +- bool block; +- bool power_mgmt; +- +-#ifdef CONFIG_CONCURRENT_MODE +- ATOMIC_T ro_ch_to; +- ATOMIC_T switch_ch_to; +-#endif +- +-}; +- +-#define wiphy_to_adapter(x) (*((_adapter**)wiphy_priv(x))) +- +-#define wdev_to_ndev(w) ((w)->netdev) +- +-int rtw_wdev_alloc(_adapter *padapter, struct device *dev); +-void rtw_wdev_free(struct wireless_dev *wdev); +-void rtw_wdev_unregister(struct wireless_dev *wdev); +- +-void rtw_cfg80211_init_wiphy(_adapter *padapter); +- +-void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork); +-void rtw_cfg80211_surveydone_event_callback(_adapter *padapter); +-struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork); +-int rtw_cfg80211_check_bss(_adapter *padapter); +-void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter); +-void rtw_cfg80211_indicate_connect(_adapter *padapter); +-void rtw_cfg80211_indicate_disconnect(_adapter *padapter); +-void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted); +- +-#ifdef CONFIG_AP_MODE +-void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); +-void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason); +-#endif //CONFIG_AP_MODE +- +-void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len); +-void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); +-void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); +-void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg); +- +-int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type); +- +-bool rtw_cfg80211_pwr_mgmt(_adapter *adapter); +- +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) +-#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, buf, len, gfp) +-#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) +-#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, sig_dbm, buf, len, gfp) +-#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0)) +-#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, gfp) +-#else +-#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len,0,gfp) +-#endif +- +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) +-#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, buf, len) +-#else +-#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, bss, buf, len) +-#endif +- +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) +-#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->pnetdev, cookie, buf, len, ack, gfp) +-#else +-#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->rtw_wdev, cookie, buf, len, ack, gfp) +-#endif +- +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) +-#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->pnetdev, cookie, chan, channel_type, duration, gfp) +-#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->pnetdev, cookie, chan, chan_type, gfp) +-#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) +-#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, channel_type, duration, gfp) +-#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, chan_type, gfp) +-#else +-#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, duration, gfp) +-#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, gfp) +-#endif +- +-#include "rtw_cfgvendor.h" +- +-#endif //__IOCTL_CFG80211_H__ +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __IOCTL_CFG80211_H__ ++#define __IOCTL_CFG80211_H__ ++ ++ ++#if defined(RTW_USE_CFG80211_STA_EVENT) ++ #undef CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER ++#endif ++ ++struct rtw_wdev_invit_info { ++ u8 state; /* 0: req, 1:rep */ ++ u8 peer_mac[ETH_ALEN]; ++ u8 active; ++ u8 token; ++ u8 flags; ++ u8 status; ++ u8 req_op_ch; ++ u8 rsp_op_ch; ++}; ++ ++#define rtw_wdev_invit_info_init(invit_info) \ ++ do { \ ++ (invit_info)->state = 0xff; \ ++ _rtw_memset((invit_info)->peer_mac, 0, ETH_ALEN); \ ++ (invit_info)->active = 0xff; \ ++ (invit_info)->token = 0; \ ++ (invit_info)->flags = 0x00; \ ++ (invit_info)->status = 0xff; \ ++ (invit_info)->req_op_ch = 0; \ ++ (invit_info)->rsp_op_ch = 0; \ ++ } while (0) ++ ++struct rtw_wdev_nego_info { ++ u8 state; /* 0: req, 1:rep, 2:conf */ ++ u8 peer_mac[ETH_ALEN]; ++ u8 active; ++ u8 token; ++ u8 status; ++ u8 req_intent; ++ u8 req_op_ch; ++ u8 req_listen_ch; ++ u8 rsp_intent; ++ u8 rsp_op_ch; ++ u8 conf_op_ch; ++}; ++ ++#define rtw_wdev_nego_info_init(nego_info) \ ++ do { \ ++ (nego_info)->state = 0xff; \ ++ _rtw_memset((nego_info)->peer_mac, 0, ETH_ALEN); \ ++ (nego_info)->active = 0xff; \ ++ (nego_info)->token = 0; \ ++ (nego_info)->status = 0xff; \ ++ (nego_info)->req_intent = 0xff; \ ++ (nego_info)->req_op_ch = 0; \ ++ (nego_info)->req_listen_ch = 0; \ ++ (nego_info)->rsp_intent = 0xff; \ ++ (nego_info)->rsp_op_ch = 0; \ ++ (nego_info)->conf_op_ch = 0; \ ++ } while (0) ++ ++struct rtw_wdev_priv ++{ ++ struct wireless_dev *rtw_wdev; ++ ++ _adapter *padapter; ++ ++ struct cfg80211_scan_request *scan_request; ++ _lock scan_req_lock; ++ ++ struct net_device *pmon_ndev;//for monitor interface ++ char ifname_mon[IFNAMSIZ + 1]; //interface name for monitor interface ++ ++ u8 p2p_enabled; ++ ++ u8 provdisc_req_issued; ++ ++ struct rtw_wdev_invit_info invit_info; ++ struct rtw_wdev_nego_info nego_info; ++ ++ u8 bandroid_scan; ++ bool block; ++ bool block_scan; ++ bool power_mgmt; ++ ++ /* report mgmt_frame registered */ ++ u16 report_mgmt; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_T ro_ch_to; ++ ATOMIC_T switch_ch_to; ++#endif ++ ++}; ++ ++#define wiphy_to_adapter(x) (*((_adapter**)wiphy_priv(x))) ++ ++#define wdev_to_ndev(w) ((w)->netdev) ++#define wdev_to_wiphy(w) ((w)->wiphy) ++#define ndev_to_wdev(n) ((n)->ieee80211_ptr) ++ ++#define WIPHY_FMT "%s" ++#define WIPHY_ARG(wiphy) wiphy_name(wiphy) ++#define FUNC_WIPHY_FMT "%s("WIPHY_FMT")" ++#define FUNC_WIPHY_ARG(wiphy) __func__, WIPHY_ARG(wiphy) ++ ++#define SET_CFG80211_REPORT_MGMT(w, t, v) (w->report_mgmt |= (v?BIT(t >> 4):0)) ++#define GET_CFG80211_REPORT_MGMT(w, t) ((w->report_mgmt & BIT(t >> 4)) > 0) ++ ++struct wiphy *rtw_wiphy_alloc(_adapter *padapter, struct device *dev); ++void rtw_wiphy_free(struct wiphy *wiphy); ++int rtw_wiphy_register(struct wiphy *wiphy); ++void rtw_wiphy_unregister(struct wiphy *wiphy); ++ ++int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy); ++void rtw_wdev_free(struct wireless_dev *wdev); ++void rtw_wdev_unregister(struct wireless_dev *wdev); ++ ++int rtw_cfg80211_ndev_res_alloc(_adapter *adapter); ++void rtw_cfg80211_ndev_res_free(_adapter *adapter); ++int rtw_cfg80211_ndev_res_register(_adapter *adapter); ++void rtw_cfg80211_ndev_res_unregister(_adapter *adapter); ++ ++int rtw_cfg80211_dev_res_alloc(struct dvobj_priv *dvobj); ++void rtw_cfg80211_dev_res_free(struct dvobj_priv *dvobj); ++int rtw_cfg80211_dev_res_register(struct dvobj_priv *dvobj); ++void rtw_cfg80211_dev_res_unregister(struct dvobj_priv *dvobj); ++ ++void rtw_cfg80211_init_wiphy(_adapter *padapter); ++ ++void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork); ++void rtw_cfg80211_surveydone_event_callback(_adapter *padapter); ++struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork); ++int rtw_cfg80211_check_bss(_adapter *padapter); ++void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter); ++void rtw_cfg80211_indicate_connect(_adapter *padapter); ++void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generated); ++void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted); ++u32 rtw_cfg80211_wait_scan_req_empty(_adapter *adapter, u32 timeout_ms); ++ ++#ifdef CONFIG_AP_MODE ++void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason); ++#endif //CONFIG_AP_MODE ++ ++void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len); ++void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg); ++void rtw_cfg80211_rx_probe_request(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++ ++int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type); ++ ++bool rtw_cfg80211_pwr_mgmt(_adapter *adapter); ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) ++#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, buf, len, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) ++#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, sig_dbm, buf, len, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0)) ++#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3 , 18 , 0)) ++#define rtw_cfg80211_rx_mgmt(adapter , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev , freq , sig_dbm , buf , len , 0 , gfp) ++#else ++#define rtw_cfg80211_rx_mgmt(adapter , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev , freq , sig_dbm , buf , len , 0) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) ++#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, buf, len) ++#else ++#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, bss, buf, len) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) ++#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->pnetdev, cookie, buf, len, ack, gfp) ++#else ++#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->rtw_wdev, cookie, buf, len, ack, gfp) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) ++#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->pnetdev, cookie, chan, channel_type, duration, gfp) ++#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->pnetdev, cookie, chan, chan_type, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, channel_type, duration, gfp) ++#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, chan_type, gfp) ++#else ++#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, duration, gfp) ++#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, gfp) ++#endif ++ ++#include "rtw_cfgvendor.h" ++ ++#endif //__IOCTL_CFG80211_H__ ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_linux.c +old mode 100755 +new mode 100644 +index 1c6c50b..22bb5c2 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_linux.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_linux.c +@@ -20,20 +20,9 @@ + #define _IOCTL_LINUX_C_ + + #include +- +-//#ifdef CONFIG_MP_INCLUDED ++#include + #include +-#include "../../hal/OUTSRC/phydm_precomp.h" +-//#endif +- +-#if defined(CONFIG_RTL8723A) +-#include "rtl8723a_hal.h" +-#include +-#endif +- +-#if defined(CONFIG_RTL8723B) +-#include +-#endif ++#include "../../hal/phydm/phydm_precomp.h" + + #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)) + #define iwe_stream_add_event(a, b, c, d, e) iwe_stream_add_event(b, c, d, e) +@@ -333,10 +322,8 @@ static int search_p2p_wfd_ie(_adapter *padapter, + u32 p2pielen = 0; + + // Verifying the P2P IE +- if (rtw_get_p2p_ie_from_scan_queue(&pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0])) +- { ++ if (rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen)) + blnGotP2PIE = _TRUE; +- } + } + + if ( blnGotP2PIE == _FALSE ) +@@ -351,16 +338,16 @@ static int search_p2p_wfd_ie(_adapter *padapter, + if ( SCAN_RESULT_WFD_TYPE == pwdinfo->wfd_info->scan_result_type ) + { + u32 blnGotWFD = _FALSE; +- u8 wfd_ie[ 128 ] = { 0x00 }; +- uint wfd_ielen = 0; +- +- if ( rtw_get_wfd_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, wfd_ie, &wfd_ielen, pnetwork->network.Reserved[0]) ) +- { +- u8 wfd_devinfo[ 6 ] = { 0x00 }; +- uint wfd_devlen = 6; +- +- if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen) ) +- { ++ u8 *wfd_ie; ++ uint wfd_ielen = 0; ++ ++ wfd_ie = rtw_bss_ex_get_wfd_ie(&pnetwork->network, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ u8 *wfd_devinfo; ++ uint wfd_devlen; ++ ++ wfd_devinfo = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &wfd_devlen); ++ if (wfd_devinfo) { + if ( pwdinfo->wfd_info->wfd_device_type == WFD_DEVINFO_PSINK ) + { + // the first two bits will indicate the WFD device type +@@ -813,18 +800,18 @@ static inline char * iwe_stream_rssi_process(_adapter *padapter, + + + #ifdef CONFIG_SIGNAL_DISPLAY_DBM +- iwe->u.qual.level = (u8) translate_percentage_to_dbm(ss);//dbm ++ iwe->u.qual.level = (u8) translate_percentage_to_dbm(ss); /* dbm */ ++ #else ++ #ifdef CONFIG_SIGNAL_SCALE_MAPPING ++ iwe->u.qual.level = (u8)ss; /* % */ + #else +- #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING + { + /* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */ + + HAL_DATA_TYPE *pHal = GET_HAL_DATA(padapter); + + iwe->u.qual.level = (u8)odm_SignalScaleMapping(&pHal->odmpriv, ss); +- } +- #else +- iwe->u.qual.level = (u8)ss;//% ++ } + #endif + #endif + +@@ -1263,9 +1250,11 @@ static char *translate_scan(_adapter *padapter, + + + #ifdef CONFIG_SIGNAL_DISPLAY_DBM +- iwe.u.qual.level = (u8) translate_percentage_to_dbm(ss);//dbm ++ iwe.u.qual.level = (u8) translate_percentage_to_dbm(ss); /* dbm */ ++ #else ++ #ifdef CONFIG_SIGNAL_SCALE_MAPPING ++ iwe.u.qual.level = (u8)ss; /* % */ + #else +- #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING + { + /* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */ + +@@ -1273,8 +1262,6 @@ static char *translate_scan(_adapter *padapter, + + iwe.u.qual.level = (u8)odm_SignalScaleMapping(&pHal->odmpriv, ss); + } +- #else +- iwe.u.qual.level = (u8)ss;//% + #endif + #endif + +@@ -1376,7 +1363,6 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, + { + int ret = 0; + u32 wep_key_idx, wep_key_len,wep_total_len; +- NDIS_802_11_WEP *pwep = NULL; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct security_priv *psecuritypriv = &padapter->securitypriv; +@@ -1426,77 +1412,38 @@ _func_enter_; + RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); + DBG_871X("wpa_set_encryption, crypt.alg = WEP\n"); + +- padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; +- padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; +- padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; +- + wep_key_idx = param->u.crypt.idx; + wep_key_len = param->u.crypt.key_len; + +- RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(1)wep_key_idx=%d\n", wep_key_idx)); +- DBG_871X("(1)wep_key_idx=%d\n", wep_key_idx); +- +- if (wep_key_idx > WEP_KEYS) +- return -EINVAL; +- +- RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(2)wep_key_idx=%d\n", wep_key_idx)); +- +- if (wep_key_len > 0) ++ if ((wep_key_idx > WEP_KEYS) || (wep_key_len <= 0)) + { +- wep_key_len = wep_key_len <= 5 ? 5 : 13; +- wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); +- pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); +- if(pwep == NULL){ +- RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,(" wpa_set_encryption: pwep allocate fail !!!\n")); +- goto exit; +- } +- +- _rtw_memset(pwep, 0, wep_total_len); +- +- pwep->KeyLength = wep_key_len; +- pwep->Length = wep_total_len; +- +- if(wep_key_len==13) +- { +- padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; +- padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; +- } +- } +- else { + ret = -EINVAL; + goto exit; + } + +- pwep->KeyIndex = wep_key_idx; +- pwep->KeyIndex |= 0x80000000; ++ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) { ++ /* wep default key has not been set, so use this key index as default key.*/ + +- _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; + +- if(param->u.crypt.set_tx) +- { +- DBG_871X("wep, set_tx=1\n"); ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; + +- if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) ++ if (wep_key_len == 13) + { +- ret = -EOPNOTSUPP ; ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; + } ++ ++ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; + } +- else +- { +- DBG_871X("wep, set_tx=0\n"); +- +- //don't update "psecuritypriv->dot11PrivacyAlgrthm" and +- //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to fw/cam + +- if (wep_key_idx >= WEP_KEYS) { +- ret = -EOPNOTSUPP ; +- goto exit; +- } ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); + +- _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); +- psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; +- rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0, _TRUE); +- } ++ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; ++ ++ psecuritypriv->key_mask |= BIT(wep_key_idx); + + goto exit; + } +@@ -1541,7 +1488,10 @@ _func_enter_; + //DEBUG_ERR((" param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); + DBG_871X(" ~~~~set sta key:unicastkey\n"); + +- rtw_setstakey_cmd(padapter, psta, _TRUE, _TRUE); ++ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY, _TRUE); ++ ++ psta->bpairwise_key_installed = _TRUE; ++ + } + else//group key + { +@@ -1680,10 +1630,6 @@ _func_enter_; + + exit: + +- if (pwep) { +- rtw_mfree((u8 *)pwep, wep_total_len); +- } +- + _func_exit_; + + return ret; +@@ -1962,10 +1908,60 @@ static int rtw_wx_set_freq(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) + { ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ int exp = 1, freq = 0, div = 0; ++ + _func_enter_; + + RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+rtw_wx_set_freq\n")); + ++ if (wrqu->freq.m <= 1000) { ++ if (wrqu->freq.flags == IW_FREQ_AUTO) { ++ if (rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, wrqu->freq.m) > 0) { ++ padapter->mlmeextpriv.cur_channel = wrqu->freq.m; ++ DBG_871X("%s: channel is auto, set to channel %d\n", __func__, wrqu->freq.m); ++ } else { ++ padapter->mlmeextpriv.cur_channel = 1; ++ DBG_871X("%s: channel is auto, Channel Plan don't match just set to channel 1\n", __func__); ++ } ++ } else { ++ padapter->mlmeextpriv.cur_channel = wrqu->freq.m; ++ DBG_871X("%s: set to channel %d\n", __func__, padapter->mlmeextpriv.cur_channel); ++ } ++ } else { ++ while (wrqu->freq.e) { ++ exp *= 10; ++ wrqu->freq.e--; ++ } ++ ++ freq = wrqu->freq.m; ++ ++ while (!(freq%10)) { ++ freq /= 10; ++ exp *= 10; ++ } ++ ++ /* freq unit is MHz here */ ++ div = 1000000/exp; ++ ++ if (div) ++ freq /= div; ++ else { ++ div = exp/1000000; ++ freq *= div; ++ } ++ ++ /* If freq is invalid, rtw_freq2ch() will return channel 1 */ ++ padapter->mlmeextpriv.cur_channel = rtw_freq2ch(freq); ++ DBG_871X("%s: set to channel %d\n", __func__, padapter->mlmeextpriv.cur_channel); ++ } ++ ++ set_channel_bwmode(padapter, padapter->mlmeextpriv.cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); ++ + _func_exit_; + + return 0; +@@ -1978,16 +1974,14 @@ static int rtw_wx_get_freq(struct net_device *dev, + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; +- +- if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) +- { +- //wrqu->freq.m = ieee80211_wlan_frequencies[pcur_bss->Configuration.DSConfig-1] * 100000; ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE && check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) != _TRUE) { ++ + wrqu->freq.m = rtw_ch2freq(pcur_bss->Configuration.DSConfig) * 100000; + wrqu->freq.e = 1; + wrqu->freq.i = pcur_bss->Configuration.DSConfig; + +- } +- else{ ++ } else { + wrqu->freq.m = rtw_ch2freq(padapter->mlmeextpriv.cur_channel) * 100000; + wrqu->freq.e = 1; + wrqu->freq.i = padapter->mlmeextpriv.cur_channel; +@@ -2000,6 +1994,7 @@ static int rtw_wx_set_mode(struct net_device *dev, struct iw_request_info *a, + union iwreq_data *wrqu, char *b) + { + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + NDIS_802_11_NETWORK_INFRASTRUCTURE networkType ; + int ret = 0; + +@@ -2010,13 +2005,25 @@ static int rtw_wx_set_mode(struct net_device *dev, struct iw_request_info *a, + goto exit; + } + +- if (padapter->hw_init_completed==_FALSE){ ++ if (!rtw_is_hw_init_completed(padapter)) { + ret = -EPERM; + goto exit; + } +- ++ ++ /* initial default type */ ++ dev->type = ARPHRD_ETHER; ++ + switch(wrqu->mode) + { ++ case IW_MODE_MONITOR: ++ networkType = Ndis802_11Monitor; ++#if 0 ++ dev->type = ARPHRD_IEEE80211; /* IEEE 802.11 : 801 */ ++#endif ++ dev->type = ARPHRD_IEEE80211_RADIOTAP; /* IEEE 802.11 + radiotap header : 803 */ ++ DBG_871X("set_mode = IW_MODE_MONITOR\n"); ++ break; ++ + case IW_MODE_AUTO: + networkType = Ndis802_11AutoUnknown; + DBG_871X("set_mode = IW_MODE_AUTO\n"); +@@ -2061,6 +2068,9 @@ static int rtw_wx_set_mode(struct net_device *dev, struct iw_request_info *a, + + rtw_setopmode_cmd(padapter, networkType,_TRUE); + ++ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) == _TRUE) ++ rtw_indicate_connect(padapter); ++ + exit: + + _func_exit_; +@@ -2092,11 +2102,10 @@ static int rtw_wx_get_mode(struct net_device *dev, struct iw_request_info *a, + else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) + { + wrqu->mode = IW_MODE_MASTER; +- } ++ } else if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) == _TRUE) ++ wrqu->mode = IW_MODE_MONITOR; + else +- { + wrqu->mode = IW_MODE_AUTO; +- } + + _func_exit_; + +@@ -2270,18 +2279,52 @@ static int rtw_wx_get_range(struct net_device *dev, + + /* signal level threshold range */ + ++ /* Quality of link & SNR stuff */ ++ /* Quality range (link, level, noise) ++ * If the quality is absolute, it will be in the range [0 ; max_qual], ++ * if the quality is dBm, it will be in the range [max_qual ; 0]. ++ * Don't forget that we use 8 bit arithmetics... ++ * ++ * If percentage range is 0~100 ++ * Signal strength dbm range logical is -100 ~ 0 ++ * but usually value is -90 ~ -20 ++ * When CONFIG_SIGNAL_SCALE_MAPPING is defined, dbm range is -95 ~ -45 ++ */ ++ range->max_qual.qual = 100; ++#ifdef CONFIG_SIGNAL_DISPLAY_DBM ++ range->max_qual.level = (u8)-100; ++ range->max_qual.noise = (u8)-100; ++ range->max_qual.updated = IW_QUAL_ALL_UPDATED; /* Updated all three */ ++ range->max_qual.updated |= IW_QUAL_DBM; ++#else /* !CONFIG_SIGNAL_DISPLAY_DBM */ + //percent values between 0 and 100. +- range->max_qual.qual = 100; + range->max_qual.level = 100; + range->max_qual.noise = 100; +- range->max_qual.updated = 7; /* Updated all three */ +- +- ++ range->max_qual.updated = IW_QUAL_ALL_UPDATED; /* Updated all three */ ++#endif /* !CONFIG_SIGNAL_DISPLAY_DBM */ ++ ++ /* This should contain the average/typical values of the quality ++ * indicator. This should be the threshold between a "good" and ++ * a "bad" link (example : monitor going from green to orange). ++ * Currently, user space apps like quality monitors don't have any ++ * way to calibrate the measurement. With this, they can split ++ * the range between 0 and max_qual in different quality level ++ * (using a geometric subdivision centered on the average). ++ * I expect that people doing the user space apps will feedback ++ * us on which value we need to put in each driver... */ + range->avg_qual.qual = 92; /* > 8% missed beacons is 'bad' */ +- /* TODO: Find real 'good' to 'bad' threshol value for RSSI */ +- range->avg_qual.level = 20 + -98; ++#ifdef CONFIG_SIGNAL_DISPLAY_DBM ++ /* TODO: Find real 'good' to 'bad' threshold value for RSSI */ ++ range->avg_qual.level = (u8)-70; + range->avg_qual.noise = 0; +- range->avg_qual.updated = 7; /* Updated all three */ ++ range->avg_qual.updated = IW_QUAL_ALL_UPDATED; /* Updated all three */ ++ range->avg_qual.updated |= IW_QUAL_DBM; ++#else /* !CONFIG_SIGNAL_DISPLAY_DBM */ ++ /* TODO: Find real 'good' to 'bad' threshol value for RSSI */ ++ range->avg_qual.level = 30; ++ range->avg_qual.noise = 100; ++ range->avg_qual.updated = IW_QUAL_ALL_UPDATED; /* Updated all three */ ++#endif /* !CONFIG_SIGNAL_DISPLAY_DBM */ + + range->num_bitrates = RATE_COUNT; + +@@ -2399,15 +2442,6 @@ static int rtw_wx_set_wap(struct net_device *dev, + } + #endif + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- if (dc_check_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)== _TRUE) +- { +- DBG_871X("set bssid, but buddy_intf is under scanning or linking\n"); +- ret = -EINVAL; +- goto exit; +- } +-#endif +- + rtw_ps_deny(padapter, PS_DENY_JOIN); + if(_FAIL == rtw_pwr_wakeup(padapter)) + { +@@ -2564,12 +2598,12 @@ struct iw_mlme + { + case IW_MLME_DEAUTH: + if(!rtw_set_802_11_disassociate(padapter)) +- ret = -1; ++ ret = -1; + break; + + case IW_MLME_DISASSOC: + if(!rtw_set_802_11_disassociate(padapter)) +- ret = -1; ++ ret = -1; + + break; + +@@ -2616,14 +2650,14 @@ _func_enter_; + goto exit; + } + #ifdef CONFIG_CONCURRENT_MODE +- if (padapter->pbuddy_adapter) { ++ if (padapter->pbuddy_adapter) { + if (padapter->pbuddy_adapter->registrypriv.mp_mode == 1) + { + DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter)); + ret = -1; + goto exit; + } +- } ++ } + #endif //CONFIG_CONCURRENT_MODE + #endif + +@@ -2634,8 +2668,8 @@ _func_enter_; + goto exit; + } + +- if(padapter->bDriverStopped){ +- DBG_871X("bDriverStopped=%d\n", padapter->bDriverStopped); ++ if (rtw_is_drv_stopped(padapter)) { ++ DBG_871X("%s bDriverStopped=_TRUE\n", __func__); + ret= -1; + goto exit; + } +@@ -2645,11 +2679,12 @@ _func_enter_; + goto exit; + } + +- if (padapter->hw_init_completed==_FALSE){ ++ if (!rtw_is_hw_init_completed(padapter)) { + ret = -1; + goto exit; + } + ++#ifndef CONFIG_DOSCAN_IN_BUSYTRAFFIC + // When Busy Traffic, driver do not site survey. So driver return success. + // wpa_supplicant will not issue SIOCSIWSCAN cmd again after scan timeout. + // modify by thomas 2011-02-22. +@@ -2662,6 +2697,7 @@ _func_enter_; + indicate_wx_scan_complete_event(padapter); + goto exit; + } ++#endif + + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) + { +@@ -2678,14 +2714,6 @@ _func_enter_; + } + #endif + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- if (dc_check_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)== _TRUE) +- { +- indicate_wx_scan_complete_event(padapter); +- goto exit; +- } +-#endif +- + #ifdef CONFIG_P2P + if ( pwdinfo->p2p_state != P2P_STATE_NONE ) + { +@@ -2863,8 +2891,7 @@ static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a, + } + #endif + */ +- if(adapter_to_pwrctl(padapter)->brfoffbyhw && padapter->bDriverStopped) +- { ++ if (adapter_to_pwrctl(padapter)->brfoffbyhw && rtw_is_drv_stopped(padapter)) { + ret = -EINVAL; + goto exit; + } +@@ -2872,11 +2899,7 @@ static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a, + #ifdef CONFIG_P2P + if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { +- // P2P is enabled +- if ( padapter->chip_type == RTL8192D ) +- wait_for_surveydone = 300; // Because the 8192du supports more channels. +- else +- wait_for_surveydone = 200; ++ wait_for_surveydone = 200; + } + else + { +@@ -2907,16 +2930,6 @@ static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a, + #endif + ; + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- while(dc_check_fwstate(padapter, wait_status)== _TRUE) +- { +- rtw_msleep_os(30); +- cnt++; +- if(cnt > wait_for_surveydone ) +- break; +- } +-#endif // CONFIG_DUALMAC_CONCURRENT +- + while(check_fwstate(pmlmepriv, wait_status) == _TRUE) + { + rtw_msleep_os(30); +@@ -2999,7 +3012,10 @@ static int rtw_wx_set_essid(struct net_device *dev, + #ifdef DBG_IOCTL + DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__); + #endif +- ++ #ifdef CONFIG_WEXT_DONT_JOIN_BYSSID ++ DBG_871X("%s: CONFIG_WEXT_DONT_JOIN_BYSSID be defined!! only allow bssid joining\n", __func__); ++ return -EPERM; ++ #endif + /* + #ifdef CONFIG_CONCURRENT_MODE + if(padapter->iface_type > PRIMARY_IFACE) +@@ -3021,15 +3037,6 @@ static int rtw_wx_set_essid(struct net_device *dev, + } + #endif + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- if (dc_check_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)== _TRUE) +- { +- DBG_871X("set bssid, but buddy_intf is under scanning or linking\n"); +- ret = -EINVAL; +- goto exit; +- } +-#endif +- + RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, + ("+rtw_wx_set_essid: fw_state=0x%08x\n", get_fwstate(pmlmepriv))); + +@@ -3824,7 +3831,7 @@ static int rtw_wx_set_auth(struct net_device *dev, + LeaveAllPowerSaveMode(padapter); + rtw_disassoc_cmd(padapter, 500, _FALSE); + DBG_871X("%s...call rtw_indicate_disconnect\n ",__FUNCTION__); +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + rtw_free_assoc_resources(padapter, 1); + } + #endif +@@ -4209,20 +4216,10 @@ static int rtw_wx_set_channel_plan(struct net_device *dev, + union iwreq_data *wrqu, char *extra) + { + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct registry_priv *pregistrypriv = &padapter->registrypriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- extern int rtw_channel_plan; + u8 channel_plan_req = (u8) (*((int *)wrqu)); + +- #if 0 +- rtw_channel_plan = (int)wrqu->data.pointer; +- pregistrypriv->channel_plan = rtw_channel_plan; +- pmlmepriv->ChannelPlan = pregistrypriv->channel_plan; +- #endif +- +- if (_SUCCESS == rtw_set_chplan_cmd(padapter, channel_plan_req, 1, 1)) { +- DBG_871X("%s set channel_plan = 0x%02X\n", __func__, pmlmepriv->ChannelPlan); +- } else ++ if (_SUCCESS != rtw_set_channel_plan(padapter, channel_plan_req)) + return -EPERM; + + return 0; +@@ -4631,8 +4628,7 @@ static int rtw_get_ap_info(struct net_device *dev, + + DBG_871X("+rtw_get_aplist_info\n"); + +- if((padapter->bDriverStopped) || (pdata==NULL)) +- { ++ if (rtw_is_drv_stopped(padapter) || (pdata == NULL)) { + ret= -EINVAL; + goto exit; + } +@@ -4735,8 +4731,7 @@ static int rtw_set_pid(struct net_device *dev, + int *pdata = (int *)wrqu; + int selector; + +- if((padapter->bDriverStopped) || (pdata==NULL)) +- { ++ if (rtw_is_drv_stopped(padapter) || (pdata == NULL)) { + ret= -EINVAL; + goto exit; + } +@@ -4769,8 +4764,7 @@ static int rtw_wps_start(struct net_device *dev, + u32 u32wps_start = 0; + unsigned int uintRet = 0; + +- if((_TRUE == padapter->bDriverStopped) ||(_TRUE==padapter->bSurpriseRemoved) || (NULL== pdata)) +- { ++ if (RTW_CANNOT_RUN(padapter) || (NULL == pdata)) { + ret= -EINVAL; + goto exit; + } +@@ -5400,8 +5394,7 @@ static int rtw_p2p_get_peer_wfd_session_available(struct net_device *dev, + return ret; + + } +- +-#endif // CONFIG_WFD ++#endif /* CONFIG_WFD */ + + static int rtw_p2p_get_go_device_address(struct net_device *dev, + struct iw_request_info *info, +@@ -5446,8 +5439,8 @@ static int rtw_p2p_get_go_device_address(struct net_device *dev, + // Match the device address located in the P2P IE + // This is for the case that the P2P device address is not the same as the P2P interface address. + +- if ((p2pie = rtw_get_p2p_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0]))) +- { ++ p2pie = rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen); ++ if (p2pie) { + while (p2pie) + { + // The P2P Device ID attribute is included in the Beacon frame. +@@ -5468,7 +5461,7 @@ static int rtw_p2p_get_go_device_address(struct net_device *dev, + } + + //Get the next P2P IE +- p2pie = rtw_get_p2p_ie(p2pie + p2pielen, pnetwork->network.IELength - 12 - (p2pie - &pnetwork->network.IEs[12] + p2pielen), NULL, &p2pielen); ++ p2pie = rtw_get_p2p_ie(p2pie + p2pielen, BSS_EX_TLV_IES_LEN(&pnetwork->network) - (p2pie + p2pielen - BSS_EX_TLV_IES(&pnetwork->network)), NULL, &p2pielen); + } + } + } +@@ -5690,8 +5683,8 @@ static int rtw_p2p_get_invitation_procedure(struct net_device *dev, + // Match the device address located in the P2P IE + // This is for the case that the P2P device address is not the same as the P2P interface address. + +- if ((p2pie = rtw_get_p2p_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0]))) +- { ++ p2pie = rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen); ++ if (p2pie) { + while (p2pie) + { + //_rtw_memset( attr_content, 0x00, 2); +@@ -5704,7 +5697,7 @@ static int rtw_p2p_get_invitation_procedure(struct net_device *dev, + } + + //Get the next P2P IE +- p2pie = rtw_get_p2p_ie(p2pie + p2pielen, pnetwork->network.IELength - 12 - (p2pie - &pnetwork->network.IEs[12] + p2pielen), NULL, &p2pielen); ++ p2pie = rtw_get_p2p_ie(p2pie + p2pielen, BSS_EX_TLV_IES_LEN(&pnetwork->network) - (p2pie + p2pielen - BSS_EX_TLV_IES(&pnetwork->network)), NULL, &p2pielen); + } + } + } +@@ -5720,13 +5713,10 @@ static int rtw_p2p_get_invitation_procedure(struct net_device *dev, + sprintf(inv_proc_str, "\nIP=-1"); + } else + { +- if (attr_content[0] && 0x20) +- { ++ if ((attr_content[0] & 0x20) == 0x20) + sprintf(inv_proc_str, "\nIP=1"); +- } else +- { ++ else + sprintf(inv_proc_str, "\nIP=0"); +- } + } + + wrqu->data.length = strlen(inv_proc_str); +@@ -5804,7 +5794,15 @@ static int rtw_p2p_connect(struct net_device *dev, + pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); + if ( _rtw_memcmp( pnetwork->network.MacAddress, peerMAC, ETH_ALEN ) ) + { +- uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ if (pnetwork->network.Configuration.DSConfig != 0) ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ else if (pwdinfo->nego_req_info.peer_ch != 0) ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig = pwdinfo->nego_req_info.peer_ch; ++ else{ ++ /* Unexpected case */ ++ uintPeerChannel = 0; ++ DBG_871X("%s uintPeerChannel = 0\n", __func__); ++ } + break; + } + +@@ -5909,16 +5907,11 @@ static int rtw_p2p_invite_req(struct net_device *dev, + uint p2pielen = 0, attr_contentlen = 0; + _irqL irqL; + struct tx_invite_req_info* pinvite_req_info = &pwdinfo->invitereq_info; +- u8 ie_offset = 12; + #ifdef CONFIG_CONCURRENT_MODE + _adapter *pbuddy_adapter = padapter->pbuddy_adapter; + struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; + struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; + #endif // CONFIG_CONCURRENT_MODE +- +-#ifdef CONFIG_WFD +- struct wifi_display_info* pwfd_info = pwdinfo->wfd_info; +-#endif // CONFIG_WFD + + // Commented by Albert 20120321 + // The input data contains two informations. +@@ -5973,9 +5966,8 @@ static int rtw_p2p_invite_req(struct net_device *dev, + // Match the device address located in the P2P IE + // This is for the case that the P2P device address is not the same as the P2P interface address. + +- ie_offset = (pnetwork->network.Reserved[0] == 2? 0:12); +- if ( (p2pie=rtw_get_p2p_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0]))) +- { ++ p2pie = rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen); ++ if (p2pie) { + // The P2P Device ID attribute is included in the Beacon frame. + // The P2P Device Info attribute is included in the probe response frame. + +@@ -6007,19 +5999,19 @@ static int rtw_p2p_invite_req(struct net_device *dev, + _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); + + #ifdef CONFIG_WFD +- if ( uintPeerChannel ) +- { +- u8 wfd_ie[ 128 ] = { 0x00 }; +- uint wfd_ielen = 0; +- +- if ( rtw_get_wfd_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, wfd_ie, &wfd_ielen, pnetwork->network.Reserved[0]) ) +- { +- u8 wfd_devinfo[ 6 ] = { 0x00 }; +- uint wfd_devlen = 6; ++ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST) && uintPeerChannel) { ++ struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; ++ u8 *wfd_ie; ++ uint wfd_ielen = 0; ++ ++ wfd_ie = rtw_bss_ex_get_wfd_ie(&pnetwork->network, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ u8 *wfd_devinfo; ++ uint wfd_devlen; + + DBG_871X( "[%s] Found WFD IE!\n", __FUNCTION__ ); +- if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen ) ) +- { ++ wfd_devinfo = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &wfd_devlen); ++ if (wfd_devinfo) { + u16 wfd_devinfo_field = 0; + + // Commented by Albert 20120319 +@@ -6043,7 +6035,7 @@ static int rtw_p2p_invite_req(struct net_device *dev, + goto exit; + } + } +-#endif // CONFIG_WFD ++#endif /* CONFIG_WFD */ + + if ( uintPeerChannel ) + { +@@ -6138,10 +6130,6 @@ static int rtw_p2p_set_persistent(struct net_device *dev, + struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; + struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; + #endif // CONFIG_CONCURRENT_MODE +- +-#ifdef CONFIG_WFD +- struct wifi_display_info* pwfd_info = pwdinfo->wfd_info; +-#endif // CONFIG_WFD + + // Commented by Albert 20120328 + // The input data is 0 or 1 +@@ -6313,8 +6301,8 @@ static int rtw_p2p_set_pc(struct net_device *dev, + // Match the device address located in the P2P IE + // This is for the case that the P2P device address is not the same as the P2P interface address. + +- if ( (p2pie=rtw_get_p2p_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0]))) +- { ++ p2pie = rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen); ++ if (p2pie) { + // The P2P Device ID attribute is included in the Beacon frame. + // The P2P Device Info attribute is included in the probe response frame. + printk( "[%s] Got P2P IE\n", __FUNCTION__ ); +@@ -6350,18 +6338,17 @@ static int rtw_p2p_set_pc(struct net_device *dev, + + if ( uintPeerChannel ) + { +- u8 wfd_ie[ 128 ] = { 0x00 }; +- uint wfd_ielen = 0; +- u8 ie_offset = (pnetwork->network.Reserved[0] == 2 ? 0:12); ++ u8 *wfd_ie; ++ uint wfd_ielen = 0; + +- if ( rtw_get_wfd_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, wfd_ie, &wfd_ielen, pnetwork->network.Reserved[0]) ) +- { +- u8 wfd_devinfo[ 6 ] = { 0x00 }; +- uint wfd_devlen = 6; ++ wfd_ie = rtw_bss_ex_get_wfd_ie(&pnetwork->network, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ u8 *wfd_devinfo; ++ uint wfd_devlen; + + DBG_871X( "[%s] Found WFD IE!\n", __FUNCTION__ ); +- if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen ) ) +- { ++ wfd_devinfo = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &wfd_devlen); ++ if (wfd_devinfo) { + u16 wfd_devinfo_field = 0; + + // Commented by Albert 20120319 +@@ -6434,10 +6421,10 @@ static int rtw_p2p_set_wfd_enable(struct net_device *dev, + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); + +- if(*extra == '0' ) +- pwdinfo->wfd_info->wfd_enable = _FALSE; +- else if(*extra == '1') +- pwdinfo->wfd_info->wfd_enable = _TRUE; ++ if (*extra == '0') ++ rtw_wfd_enable(padapter, 0); ++ else if (*extra == '1') ++ rtw_wfd_enable(padapter, 1); + + DBG_871X( "[%s] wfd_enable = %d\n", __FUNCTION__, pwdinfo->wfd_info->wfd_enable ); + +@@ -6511,7 +6498,7 @@ exit: + return ret; + + } +-#endif // CONFIG_WFD ++#endif /* CONFIG_WFD */ + + static int rtw_p2p_prov_disc(struct net_device *dev, + struct iw_request_info *info, +@@ -6532,15 +6519,11 @@ static int rtw_p2p_prov_disc(struct net_device *dev, + u8 *p2pie; + uint p2pielen = 0, attr_contentlen = 0; + _irqL irqL; +- u8 ie_offset = 12; + #ifdef CONFIG_CONCURRENT_MODE + _adapter *pbuddy_adapter = padapter->pbuddy_adapter; + struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; + struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; + #endif // CONFIG_CONCURRENT_MODE +-#ifdef CONFIG_WFD +- struct wifi_display_info* pwfd_info = pwdinfo->wfd_info; +-#endif // CONFIG_WFD + + // Commented by Albert 20110301 + // The input data contains two informations. +@@ -6622,9 +6605,8 @@ static int rtw_p2p_prov_disc(struct net_device *dev, + // Match the device address located in the P2P IE + // This is for the case that the P2P device address is not the same as the P2P interface address. + +- ie_offset = (pnetwork->network.Reserved[0] == 2? 0:12); +- if ( (p2pie=rtw_get_p2p_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0]))) +- { ++ p2pie = rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen); ++ if (p2pie) { + while ( p2pie ) + { + // The P2P Device ID attribute is included in the Beacon frame. +@@ -6650,7 +6632,7 @@ static int rtw_p2p_prov_disc(struct net_device *dev, + } + + //Get the next P2P IE +- p2pie = rtw_get_p2p_ie(p2pie+p2pielen, pnetwork->network.IELength - ie_offset -(p2pie -&pnetwork->network.IEs[ie_offset] + p2pielen), NULL, &p2pielen); ++ p2pie = rtw_get_p2p_ie(p2pie + p2pielen, BSS_EX_TLV_IES_LEN(&pnetwork->network) - (p2pie + p2pielen - BSS_EX_TLV_IES(&pnetwork->network)), NULL, &p2pielen); + } + + } +@@ -6677,19 +6659,20 @@ static int rtw_p2p_prov_disc(struct net_device *dev, + + if ( uintPeerChannel ) + { +-#ifdef CONFIG_WFD +- { +- u8 wfd_ie[ 128 ] = { 0x00 }; +- uint wfd_ielen = 0; +- +- if ( rtw_get_wfd_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, wfd_ie, &wfd_ielen, pnetwork->network.Reserved[0]) ) +- { +- u8 wfd_devinfo[ 6 ] = { 0x00 }; +- uint wfd_devlen = 6; ++ #ifdef CONFIG_WFD ++ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { ++ struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; ++ u8 *wfd_ie; ++ uint wfd_ielen = 0; ++ ++ wfd_ie = rtw_bss_ex_get_wfd_ie(&pnetwork->network, NULL, &wfd_ielen); ++ if (wfd_ie) { ++ u8 *wfd_devinfo; ++ uint wfd_devlen; + + DBG_871X( "[%s] Found WFD IE!\n", __FUNCTION__ ); +- if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen ) ) +- { ++ wfd_devinfo = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &wfd_devlen); ++ if (wfd_devinfo) { + u16 wfd_devinfo_field = 0; + + // Commented by Albert 20120319 +@@ -6713,7 +6696,7 @@ static int rtw_p2p_prov_disc(struct net_device *dev, + goto exit; + } + } +-#endif // CONFIG_WFD ++ #endif /* CONFIG_WFD */ + + DBG_871X( "[%s] peer channel: %d!\n", __FUNCTION__, uintPeerChannel ); + #ifdef CONFIG_CONCURRENT_MODE +@@ -6927,36 +6910,29 @@ static int rtw_p2p_set(struct net_device *dev, + wrqu->data.length -= 5; + ret = rtw_p2p_set_wps_uuid( dev, info, wrqu, &extra[5] ); + } ++ + #ifdef CONFIG_WFD +- else if ( _rtw_memcmp( extra, "sa=", 3 ) ) +- { +- // sa: WFD Session Available information +- wrqu->data.length -= 3; +- rtw_p2p_set_sa( dev, info, wrqu, &extra[3] ); +- } +- else if ( _rtw_memcmp( extra, "pc=", 3 ) ) +- { +- // pc: WFD Preferred Connection +- wrqu->data.length -= 3; +- rtw_p2p_set_pc( dev, info, wrqu, &extra[3] ); +- } +- else if ( _rtw_memcmp( extra, "wfd_type=", 9 ) ) +- { +- // pc: WFD Preferred Connection +- wrqu->data.length -= 9; +- rtw_p2p_set_wfd_device_type( dev, info, wrqu, &extra[9] ); +- } +- else if ( _rtw_memcmp( extra, "wfd_enable=", 11 ) ) +- { +- wrqu->data.length -= 11; +- rtw_p2p_set_wfd_enable( dev, info, wrqu, &extra[11] ); +- } +- else if ( _rtw_memcmp( extra, "driver_iface=", 13 ) ) +- { +- wrqu->data.length -= 13; +- rtw_p2p_set_driver_iface( dev, info, wrqu, &extra[13] ); +- } +-#endif //CONFIG_WFD ++ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { ++ if (_rtw_memcmp(extra, "sa=", 3)) { ++ /* sa: WFD Session Available information */ ++ wrqu->data.length -= 3; ++ rtw_p2p_set_sa(dev, info, wrqu, &extra[3]); ++ } else if (_rtw_memcmp(extra, "pc=", 3)) { ++ /* pc: WFD Preferred Connection */ ++ wrqu->data.length -= 3; ++ rtw_p2p_set_pc(dev, info, wrqu, &extra[3]); ++ } else if (_rtw_memcmp(extra, "wfd_type=", 9)) { ++ wrqu->data.length -= 9; ++ rtw_p2p_set_wfd_device_type(dev, info, wrqu, &extra[9]); ++ } else if (_rtw_memcmp(extra, "wfd_enable=", 11)) { ++ wrqu->data.length -= 11; ++ rtw_p2p_set_wfd_enable(dev, info, wrqu, &extra[11]); ++ } else if (_rtw_memcmp(extra, "driver_iface=", 13)) { ++ wrqu->data.length -= 13; ++ rtw_p2p_set_driver_iface(dev, info, wrqu, &extra[13]); ++ } ++ } ++#endif /* CONFIG_WFD */ + + #endif //CONFIG_P2P + +@@ -7018,20 +6994,17 @@ static int rtw_p2p_get(struct net_device *dev, + { + rtw_p2p_get_op_ch( dev, info, wrqu, extra); + } ++ + #ifdef CONFIG_WFD +- else if ( _rtw_memcmp( wrqu->data.pointer, "peer_port", 9 ) ) +- { +- rtw_p2p_get_peer_wfd_port( dev, info, wrqu, extra ); +- } +- else if ( _rtw_memcmp( wrqu->data.pointer, "wfd_sa", 6 ) ) +- { +- rtw_p2p_get_peer_wfd_session_available( dev, info, wrqu, extra ); +- } +- else if ( _rtw_memcmp( wrqu->data.pointer, "wfd_pc", 6 ) ) +- { +- rtw_p2p_get_peer_wfd_preferred_connection( dev, info, wrqu, extra ); ++ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { ++ if (_rtw_memcmp(wrqu->data.pointer, "peer_port", 9)) ++ rtw_p2p_get_peer_wfd_port(dev, info, wrqu, extra); ++ else if (_rtw_memcmp(wrqu->data.pointer, "wfd_sa", 6)) ++ rtw_p2p_get_peer_wfd_session_available(dev, info, wrqu, extra); ++ else if (_rtw_memcmp(wrqu->data.pointer, "wfd_pc", 6)) ++ rtw_p2p_get_peer_wfd_preferred_connection(dev, info, wrqu, extra); + } +-#endif // CONFIG_WFD ++#endif /* CONFIG_WFD */ + + #endif //CONFIG_P2P + +@@ -7059,7 +7032,7 @@ static int rtw_p2p_get2(struct net_device *dev, + + if (copy_from_user(buffer, wrqu->data.pointer, wrqu->data.length)) + { +- ret - EFAULT; ++ ret = -EFAULT; + goto bad; + } + +@@ -7290,7 +7263,6 @@ static int rtw_dbg_port(struct net_device *dev, + case 0x01: //dbg mode + padapter->recvpriv.is_signal_dbg = 1; + extra_arg = extra_arg>100?100:extra_arg; +- extra_arg = extra_arg<0?0:extra_arg; + padapter->recvpriv.signal_strength_dbg=extra_arg; + break; + } +@@ -7483,7 +7455,7 @@ static int rtw_dbg_port(struct net_device *dev, + break; + case 0x7a: + receive_disconnect(padapter, pmlmeinfo->network.MacAddress +- , WLAN_REASON_EXPIRATION_CHK); ++ , WLAN_REASON_EXPIRATION_CHK, _FALSE); + break; + case 0x7F: + switch(minor_cmd) +@@ -7521,9 +7493,6 @@ static int rtw_dbg_port(struct net_device *dev, + psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); + if(psta) + { +- int i; +- struct recv_reorder_ctrl *preorder_ctrl; +- + DBG_871X("SSID=%s\n", cur_network->network.Ssid.Ssid); + DBG_871X("sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); + DBG_871X("cur_channel=%d, cur_bwmode=%d, cur_ch_offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); +@@ -7535,16 +7504,8 @@ static int rtw_dbg_port(struct net_device *dev, + DBG_871X("ampdu_enable = %d\n", psta->htpriv.ampdu_enable); + DBG_871X("agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); + #endif //CONFIG_80211N_HT +- +- for(i=0;i<16;i++) +- { +- preorder_ctrl = &psta->recvreorder_ctrl[i]; +- if(preorder_ctrl->enable) +- { +- DBG_871X("tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq); +- } +- } +- ++ ++ sta_rx_reorder_ctl_dump(RTW_DBGDUMP, psta); + } + else + { +@@ -7552,18 +7513,13 @@ static int rtw_dbg_port(struct net_device *dev, + } + break; + case 0x06: +- { +- u32 ODMFlag; +- rtw_hal_get_hwreg(padapter, HW_VAR_DM_FLAG, (u8*)(&ODMFlag)); +- DBG_871X("(B)DMFlag=0x%x, arg=0x%x\n", ODMFlag, arg); +- ODMFlag = (u32)(0x0f&arg); +- DBG_871X("(A)DMFlag=0x%x\n", ODMFlag); +- rtw_hal_set_hwreg(padapter, HW_VAR_DM_FLAG, (u8 *)(&ODMFlag)); ++ { + } + break; + case 0x07: +- DBG_871X("bSurpriseRemoved=%d, bDriverStopped=%d\n", +- padapter->bSurpriseRemoved, padapter->bDriverStopped); ++ DBG_871X("bSurpriseRemoved=%s, bDriverStopped=%s\n" ++ , rtw_is_surprise_removed(padapter)?"True":"False" ++ , rtw_is_drv_stopped(padapter)?"True":"False"); + break; + case 0x08: + { +@@ -7583,9 +7539,8 @@ static int rtw_dbg_port(struct net_device *dev, + break; + case 0x09: + { +- int i, j; ++ int i; + _list *plist, *phead; +- struct recv_reorder_ctrl *preorder_ctrl; + + #ifdef CONFIG_AP_MODE + DBG_871X("sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap); +@@ -7624,18 +7579,8 @@ static int rtw_dbg_port(struct net_device *dev, + DBG_871X("qos_info=0x%x\n", psta->qos_info); + #endif + DBG_871X("dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy); +- +- +- +- for(j=0;j<16;j++) +- { +- preorder_ctrl = &psta->recvreorder_ctrl[j]; +- if(preorder_ctrl->enable) +- { +- DBG_871X("tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq); +- } +- } +- ++ ++ sta_rx_reorder_ctl_dump(RTW_DBGDUMP, psta); + } + + } +@@ -7645,13 +7590,7 @@ static int rtw_dbg_port(struct net_device *dev, + + } + break; +- case 0x0a: +- { +- int max_mac_id = 0; +- max_mac_id = rtw_search_max_mac_id( padapter); +- printk("%s ==> max_mac_id = %d \n",__FUNCTION__,max_mac_id); +- } +- break; ++ + case 0x0b: //Enable=1, Disable=0 driver control vrtl_carrier_sense. + { + //u8 driver_vcs_en; //Enable=1, Disable=0 driver control vrtl_carrier_sense. +@@ -7685,17 +7624,6 @@ static int rtw_dbg_port(struct net_device *dev, + } + } + break; +-#if 0 +- case 0x0d://dump cam +- { +- //u8 entry = (u8) extra_arg; +- u8 entry=0; +- //dump cam +- for(entry=0;entry<32;entry++) +- read_cam(padapter,entry); +- } +- break; +-#endif + case 0x0e: + { + if(arg == 0){ +@@ -8021,31 +7949,9 @@ static int rtw_dbg_port(struct net_device *dev, + } + break; + +- case 0xee://turn on/off dynamic funcs ++ case 0xee: + { +- u32 odm_flag; +- +- if(0xf==extra_arg){ +- rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DM_FUNC,&odm_flag); +- DBG_871X(" === DMFlag(0x%08x) === \n",odm_flag); +- DBG_871X("extra_arg = 0 - disable all dynamic func \n"); +- DBG_871X("extra_arg = 1 - disable DIG- BIT(0)\n"); +- DBG_871X("extra_arg = 2 - disable High power - BIT(1)\n"); +- DBG_871X("extra_arg = 3 - disable tx power tracking - BIT(2)\n"); +- DBG_871X("extra_arg = 4 - disable BT coexistence - BIT(3)\n"); +- DBG_871X("extra_arg = 5 - disable antenna diversity - BIT(4)\n"); +- DBG_871X("extra_arg = 6 - enable all dynamic func \n"); +- } +- else{ +- /* extra_arg = 0 - disable all dynamic func +- extra_arg = 1 - disable DIG +- extra_arg = 2 - disable tx power tracking +- extra_arg = 3 - turn on all dynamic func +- */ +- rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DM_FUNC, &(extra_arg)); +- rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DM_FUNC,&odm_flag); +- DBG_871X(" === DMFlag(0x%08x) === \n",odm_flag); +- } ++ DBG_871X(" === please control /proc to trun on/off PHYDM func === \n"); + } + break; + +@@ -8340,7 +8246,11 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, + param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && + param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) + { +- if (param->u.crypt.idx >= WEP_KEYS) ++ if (param->u.crypt.idx >= WEP_KEYS ++#ifdef CONFIG_IEEE80211W ++ && param->u.crypt.idx > BIP_MAX_KEYID ++#endif /* CONFIG_IEEE80211W */ ++ ) + { + ret = -EINVAL; + goto exit; +@@ -8493,6 +8403,23 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, + + _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); + } ++#ifdef CONFIG_IEEE80211W ++ else if (strcmp(param->u.crypt.alg, "BIP") == 0) { ++ int no; ++ ++ DBG_871X("BIP key_len=%d , index=%d\n", param->u.crypt.key_len, param->u.crypt.idx); ++ /* save the IGTK key, length 16 bytes */ ++ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16:param->u.crypt.key_len)); ++ /* DBG_871X("IGTK key below:\n"); ++ for(no=0;no<16;no++) ++ printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); ++ DBG_871X("\n"); */ ++ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; ++ padapter->securitypriv.binstallBIPkey = _TRUE; ++ DBG_871X(" ~~~~set sta key:IGKT\n"); ++ goto exit; ++ } ++#endif /* CONFIG_IEEE80211W */ + else + { + DBG_871X("%s, set group_key, none\n", __FUNCTION__); +@@ -8570,6 +8497,8 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, + rtw_ap_set_pairwise_key(padapter, psta); + + psta->ieee8021x_blocked = _FALSE; ++ ++ psta->bpairwise_key_installed = _TRUE; + + } + else//group key??? +@@ -8684,7 +8613,7 @@ static int rtw_hostapd_sta_flush(struct net_device *dev) + + flush_all_cam_entry(padapter); //clear CAM + +- ret = rtw_sta_flush(padapter); ++ ret = rtw_sta_flush(padapter, _TRUE); + + return ret; + +@@ -8814,12 +8743,12 @@ static int rtw_del_sta(struct net_device *dev, struct ieee_param *param) + { + rtw_list_delete(&psta->asoc_list); + pstapriv->asoc_list_cnt--; +- updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING); ++ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); + + } + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + +- associated_clients_update(padapter, updated); ++ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); + + psta = NULL; + +@@ -9108,7 +9037,7 @@ static int rtw_set_hidden_ssid(struct net_device *dev, struct ieee_param *param, + int ie_len; + u8 *ssid_ie; + char ssid[NDIS_802_11_LENGTH_SSID + 1]; +- sint ssid_len; ++ sint ssid_len = 0; + u8 ignore_broadcast_ssid; + + if(check_fwstate(mlmepriv, WIFI_AP_STATE) != _TRUE) +@@ -9130,10 +9059,10 @@ static int rtw_set_hidden_ssid(struct net_device *dev, struct ieee_param *param, + ssid[ssid_len] = 0x0; + + if(0) +- DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%d), from ie:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), +- ssid, ssid_len, +- pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, +- pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); ++ DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%d), from ie:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), ++ ssid, ssid_len, ++ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, ++ pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); + + _rtw_memcpy(pbss_network->Ssid.Ssid, (void *)ssid, ssid_len); + pbss_network->Ssid.SsidLength = ssid_len; +@@ -9141,9 +9070,9 @@ static int rtw_set_hidden_ssid(struct net_device *dev, struct ieee_param *param, + pbss_network_ext->Ssid.SsidLength = ssid_len; + + if(0) +- DBG_871X(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), +- pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, +- pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); ++ DBG_871X(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), ++ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, ++ pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); + } + + DBG_871X(FUNC_ADPT_FMT" ignore_broadcast_ssid:%d, %s,%d\n", FUNC_ADPT_ARG(adapter), +@@ -9223,7 +9152,7 @@ static int rtw_hostapd_ioctl(struct net_device *dev, struct iw_point *p) + * so, we just check hw_init_completed + */ + +- if (padapter->hw_init_completed==_FALSE){ ++ if (!rtw_is_hw_init_completed(padapter)) { + ret = -EPERM; + goto out; + } +@@ -9556,12 +9485,6 @@ static int rtw_wowlan_ctrl(struct net_device *dev, + + DBG_871X("+rtw_wowlan_ctrl: %s\n", extra); + +- if(pwrctrlpriv->bSupportRemoteWakeup==_FALSE){ +- ret = -EPERM; +- DBG_871X("+rtw_wowlan_ctrl: Device didn't support the remote wakeup!!\n"); +- goto _rtw_wowlan_ctrl_exit_free; +- } +- + if (!check_fwstate(pmlmepriv, _FW_LINKED) && + check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { + #ifdef CONFIG_PNO_SUPPORT +@@ -9572,20 +9495,22 @@ static int rtw_wowlan_ctrl(struct net_device *dev, + #endif //CONFIG_PNO_SUPPORT + } + +- if (_rtw_memcmp( extra, "enable", 6 )) { ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) ++ rtw_scan_abort(padapter); + +- padapter->registrypriv.mp_mode = 1; ++ if (_rtw_memcmp(extra, "enable", 6)) { + +- pwrctrlpriv->wowlan_from_cmd = _TRUE; ++ padapter->registrypriv.mp_mode = 1; + + rtw_suspend_common(padapter); + +- } else if (_rtw_memcmp( extra, "disable", 6 )) { +- ++ } else if (_rtw_memcmp(extra, "disable", 7)) { ++#ifdef CONFIG_USB_HCI ++ RTW_ENABLE_FUNC(padapter, DF_RX_BIT); ++ RTW_ENABLE_FUNC(padapter, DF_TX_BIT); ++#endif + rtw_resume_common(padapter); + +- pwrctrlpriv->wowlan_from_cmd = _FALSE; +- + #ifdef CONFIG_PNO_SUPPORT + pwrctrlpriv->wowlan_pno_enable = _FALSE; + #endif //CONFIG_PNO_SUPPORT +@@ -9603,6 +9528,159 @@ _rtw_wowlan_ctrl_exit_free: + _rtw_wowlan_ctrl_exit: + return ret; + } ++ ++static bool rtw_wowlan_parser_pattern_cmd(u8 *input, char *pattern, ++ int *pattern_len, char *bit_mask) ++{ ++ char *cp = NULL, *end = NULL; ++ size_t len = 0; ++ int pos = 0, mask_pos = 0, res = 0; ++ u8 member[2] = {0}; ++ ++ cp = strchr(input, '='); ++ if (cp) { ++ *cp = 0; ++ cp++; ++ } ++ ++ input = cp; ++ ++ while (1) { ++ cp = strchr(input, ':'); ++ ++ if (cp) { ++ len = strlen(input) - strlen(cp); ++ *cp = 0; ++ cp++; ++ } else { ++ len = 2; ++ } ++ ++ if (bit_mask && (strcmp(input, "-") == 0 || ++ strcmp(input, "xx") == 0 || ++ strcmp(input, "--") == 0)) { ++ /* skip this byte and leave mask bit unset */ ++ } else { ++ u8 hex; ++ strncpy(member, input, len); ++ if (!rtw_check_pattern_valid(member, sizeof(member))) { ++ DBG_871X("%s:[ERROR] pattern is invalid!!\n", ++ __func__); ++ goto error; ++ } ++ ++ res = sscanf(member, "%02hhx", &hex); ++ pattern[pos] = hex; ++ mask_pos = pos / 8; ++ if (bit_mask) ++ bit_mask[mask_pos] |= 1 << (pos % 8); ++ } ++ ++ pos++; ++ if (!cp) ++ break; ++ input = cp; ++ } ++ ++ (*pattern_len) = pos; ++ ++ return _TRUE; ++error: ++ return _FALSE; ++} ++ ++/* ++ * IP filter This pattern if for a frame containing a ip packet: ++ * AA:AA:AA:AA:AA:AA:BB:BB:BB:BB:BB:BB:CC:CC:DD:-:-:-:-:-:-:-:-:EE:-:-:FF:FF:FF:FF:GG:GG:GG:GG:HH:HH:II:II ++ * ++ * A: Ethernet destination address ++ * B: Ethernet source address ++ * C: Ethernet protocol type ++ * D: IP header VER+Hlen, use: 0x45 (4 is for ver 4, 5 is for len 20) ++ * E: IP protocol ++ * F: IP source address ( 192.168.0.4: C0:A8:00:2C ) ++ * G: IP destination address ( 192.168.0.4: C0:A8:00:2C ) ++ * H: Source port (1024: 04:00) ++ * I: Destination port (1024: 04:00) ++ */ ++ ++static int rtw_wowlan_set_pattern(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wowlan_ioctl_param poidparam; ++ int ret = 0, len = 0, i = 0; ++ u32 start_time = rtw_get_current_time(); ++ u8 input[wrqu->data.length]; ++ u8 index = 0; ++ ++ poidparam.subcode = 0; ++ ++ if (!check_fwstate(pmlmepriv, _FW_LINKED) && ++ check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { ++ ret = -EFAULT; ++ DBG_871X("Please Connect With AP First!!\n"); ++ goto _rtw_wowlan_set_pattern_exit; ++ } ++ ++ if (wrqu->data.length <= 0) { ++ ret = -EFAULT; ++ DBG_871X("ERROR: parameter length <= 0\n"); ++ goto _rtw_wowlan_set_pattern_exit; ++ } else { ++ /* set pattern */ ++ if (copy_from_user(input, ++ wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ /* leave PS first */ ++ rtw_ps_deny(padapter, PS_DENY_IOCTL); ++ LeaveAllPowerSaveModeDirect(padapter); ++ if (strncmp(input, "pattern=", 8) == 0) { ++ if (pwrpriv->wowlan_pattern_idx >= MAX_WKFM_NUM) { ++ DBG_871X("WARNING: priv-pattern is full(%d)\n", ++ MAX_WKFM_NUM); ++ DBG_871X("WARNING: please clean priv-pattern first\n"); ++ ret = -EINVAL; ++ goto _rtw_wowlan_set_pattern_exit; ++ } else { ++ index = pwrpriv->wowlan_pattern_idx; ++ ++ ret = rtw_wowlan_parser_pattern_cmd(input, ++ pwrpriv->patterns[index].content, ++ &pwrpriv->patterns[index].len, ++ pwrpriv->patterns[index].mask); ++ ++ if (ret == _TRUE) { ++ pwrpriv->wowlan_pattern_idx++; ++ pwrpriv->wowlan_pattern = _TRUE; ++ } ++ } ++ } else if (strncmp(input, "clean", 5) == 0) { ++ poidparam.subcode = WOWLAN_PATTERN_CLEAN; ++ rtw_hal_set_hwreg(padapter, ++ HW_VAR_WOWLAN, (u8 *)&poidparam); ++ pwrpriv->wowlan_pattern = _FALSE; ++ } else if (strncmp(input, "show", 4) == 0) { ++ for (i = 0 ; i < MAX_WKFM_NUM ; i++) { ++ DBG_871X("=======[%d]=======\n", i); ++ rtw_read_from_frame_mask(padapter, i); ++ } ++ ++ DBG_871X("********[RTK priv-patterns]*********\n"); ++ for (i = 0 ; i < MAX_WKFM_NUM ; i++) ++ rtw_dump_priv_pattern(padapter, i); ++ } else { ++ DBG_871X("ERROR: incorrect parameter!\n"); ++ ret = -EINVAL; ++ } ++ rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); ++ } ++_rtw_wowlan_set_pattern_exit: ++ return ret; ++} + #endif //CONFIG_WOWLAN + + #ifdef CONFIG_AP_WOWLAN +@@ -9621,72 +9699,22 @@ static int rtw_ap_wowlan_ctrl(struct net_device *dev, + + DBG_871X("+rtw_ap_wowlan_ctrl: %s\n", extra); + +- if(pwrctrlpriv->bSupportRemoteWakeup==_FALSE){ +- ret = -EPERM; +- DBG_871X("+rtw_wowlan_ctrl: Device didn't support the remote wakeup!!\n"); +- goto _rtw_ap_wowlan_ctrl_exit_free; +- } +- + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) { + DBG_871X("[%s] It is not AP mode!!\n", __func__); + goto _rtw_ap_wowlan_ctrl_exit_free; + } + +- if (_rtw_memcmp( extra, "enable", 6 )) { +- pwrctrlpriv->wowlan_ap_mode = _TRUE; +- while (pwrctrlpriv->bips_processing == _TRUE) +- rtw_msleep_os(1); +- +- rtw_cancel_all_timer(padapter); ++ if (_rtw_memcmp(extra, "enable", 6)) { + +- padapter->bDriverStopped = _TRUE; //for stop thread +- rtw_stop_drv_threads(padapter); +- padapter->bDriverStopped = _FALSE; //for 32k command ++ pwrctrlpriv->wowlan_ap_mode = _TRUE; + +-#ifdef CONFIG_LPS +- LeaveAllPowerSaveModeDirect(padapter); ++ rtw_suspend_common(padapter); ++ } else if (_rtw_memcmp(extra, "disable", 7)) { ++#ifdef CONFIG_USB_HCI ++ RTW_ENABLE_FUNC(padapter, DF_RX_BIT); ++ RTW_ENABLE_FUNC(padapter, DF_TX_BIT); + #endif +- rtw_hal_disable_interrupt(padapter); // It need wait for leaving 32K. +- +- // 2.1 clean interupt +- if (padapter->HalFunc.clear_interrupt) +- padapter->HalFunc.clear_interrupt(padapter); +- +- poidparam.subcode = WOWLAN_AP_ENABLE; +- +- rtw_hal_set_hwreg(padapter, HW_VAR_AP_WOWLAN,(u8 *)&poidparam); +- } else if (_rtw_memcmp( extra, "disable", 6 )) { +-#ifdef CONFIG_LPS +- LeaveAllPowerSaveModeDirect(padapter); +-#endif //CONFIG_LPS +- pwrctrlpriv->bFwCurrentInPSMode = _FALSE; +- +- rtw_hal_disable_interrupt(padapter); +- +- if (padapter->HalFunc.clear_interrupt) +- padapter->HalFunc.clear_interrupt(padapter); +- +- poidparam.subcode = WOWLAN_AP_ENABLE; +- +- rtw_hal_set_hwreg(padapter, HW_VAR_AP_WOWLAN,(u8 *)&poidparam); +- +- pwrctrlpriv->wowlan_ap_mode = _FALSE; +- +- psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); +- if (psta) { +- set_sta_rate(padapter, psta); +- } +- +- padapter->bDriverStopped = _FALSE; +- DBG_871X("%s: wowmode resuming, DriverStopped:%d\n", __func__, padapter->bDriverStopped); +- rtw_start_drv_threads(padapter); +- +- rtw_hal_enable_interrupt(padapter); +- +- _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); +- pwrctrlpriv->bips_processing = _FALSE; +- rtw_set_pwr_state_check_timer(pwrctrlpriv); +- ++ rtw_resume_common(padapter); + } else { + DBG_871X("[%s] Invalid Parameter.\n", __func__); + goto _rtw_ap_wowlan_ctrl_exit_free; +@@ -9733,12 +9761,12 @@ static int rtw_mp_efuse_get(struct net_device *dev, + union iwreq_data *wdata, char *extra) + { + PADAPTER padapter = rtw_netdev_priv(dev); +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ + PEFUSE_HAL pEfuseHal; + struct iw_point *wrqu; + +- u8 *PROMContent = pEEPROM->efuse_eeprom_data; ++ u8 *PROMContent = pHalData->efuse_eeprom_data; + u8 ips_mode = IPS_NUM; // init invalid value + u8 lps_mode = PS_MODE_NUM; // init invalid value + struct pwrctrl_priv *pwrctrlpriv ; +@@ -9746,7 +9774,7 @@ static int rtw_mp_efuse_get(struct net_device *dev, + u8 *rawdata = NULL; + char *pch, *ptmp, *token, *tmp[3]={0x00,0x00,0x00}; + u16 i=0, j=0, mapLen=0, addr=0, cnts=0; +- u16 max_available_size=0, raw_cursize=0, raw_maxsize=0; ++ u16 max_available_len = 0, raw_cursize = 0, raw_maxsize = 0; + int err; + #ifdef CONFIG_IOL + u8 org_fw_iol = padapter->registrypriv.fw_iol;// 0:Disable, 1:enable, 2:by usb speed +@@ -9801,8 +9829,10 @@ static int rtw_mp_efuse_get(struct net_device *dev, + #endif + + if(strcmp(tmp[0], "status") == 0){ +- sprintf(extra, "Load File efuse=%s,Load File MAC=%s",(pEEPROM->bloadfile_fail_flag? "FAIL" : "OK"),(pEEPROM->bloadmac_fail_flag? "FAIL" : "OK")); +- ++ sprintf(extra, "Load File efuse=%s,Load File MAC=%s" ++ , pHalData->efuse_file_status == EFUSE_FILE_FAILED ? "FAIL" : "OK" ++ , pHalData->macaddr_file_status == MACADDR_FILE_FAILED ? "FAIL" : "OK" ++ ); + goto exit; + } + else if (strcmp(tmp[0], "drvmap") == 0) +@@ -9832,7 +9862,7 @@ static int rtw_mp_efuse_get(struct net_device *dev, + else if (strcmp(tmp[0], "realmap") == 0) + { + mapLen = EFUSE_MAP_SIZE; +- if (rtw_efuse_map_read(padapter, EFUSE_WIFI , mapLen, pEfuseHal->fakeEfuseInitMap) == _FAIL) ++ if (rtw_efuse_mask_map_read(padapter, EFUSE_WIFI , mapLen, pEfuseHal->fakeEfuseInitMap) == _FAIL) + { + DBG_871X("%s: read realmap Fail!!\n", __FUNCTION__); + err = -EFAULT; +@@ -9882,17 +9912,17 @@ static int rtw_mp_efuse_get(struct net_device *dev, + } + DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); + +- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (PVOID)&max_available_size, _FALSE); +- if ((addr+ cnts) > max_available_size) ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (PVOID)&max_available_len, _FALSE); ++ if ((addr + cnts) > max_available_len) + { + DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); + err = -EINVAL; + goto exit; + } + +- if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) ++ if (rtw_efuse_mask_map_read(padapter, addr, cnts, data) == _FAIL) + { +- DBG_871X("%s: rtw_efuse_map_read error!\n", __FUNCTION__); ++ DBG_871X("%s: rtw_efuse_mask_map_read error!\n", __func__); + err = -EFAULT; + goto exit; + } +@@ -9909,6 +9939,37 @@ static int rtw_mp_efuse_get(struct net_device *dev, + { + addr = 0; + mapLen = EFUSE_MAX_SIZE; ++ DBG_871X("EFUSE_MAX_SIZE = %d\n", EFUSE_MAX_SIZE); ++ ++ if (rtw_efuse_access(padapter, _FALSE, addr, mapLen, rawdata) == _FAIL) { ++ DBG_871X("%s: rtw_efuse_access Fail!!\n", __func__); ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ if (mapLen >= 512) ++ mapLen = 512; ++ ++ _rtw_memset(extra,'\0',strlen(extra)); ++ ++ sprintf(extra, "\n0x00\t"); ++ ++ for (i = 0; i < mapLen ; i++) { ++ sprintf(extra, "%s%02X", extra, rawdata[i]); ++ if ((i & 0xF) == 0xF) { ++ sprintf(extra, "%s\n", extra); ++ sprintf(extra, "%s0x%02x\t", extra, i+1); ++ } else if ((i & 0x7) == 0x7) { ++ sprintf(extra, "%s \t", extra); ++ } else { ++ sprintf(extra, "%s ", extra); ++ } ++ } ++ ++ } else if (strcmp(tmp[0], "realrawb") == 0) { ++ addr = 0; ++ mapLen = EFUSE_MAX_SIZE; ++ DBG_871X("EFUSE_MAX_SIZE =%d\n", EFUSE_MAX_SIZE); + if (rtw_efuse_access(padapter, _FALSE, addr, mapLen, rawdata) == _FAIL) + { + DBG_871X("%s: rtw_efuse_access Fail!!\n", __FUNCTION__); +@@ -9918,7 +9979,7 @@ static int rtw_mp_efuse_get(struct net_device *dev, + _rtw_memset(extra,'\0',strlen(extra)); + // DBG_871X("%s: realraw={\n", __FUNCTION__); + sprintf(extra, "\n0x00\t"); +- for (i=0; i< mapLen; i++) ++ for (i= 512; i< mapLen; i++) + { + // DBG_871X("%02X", rawdata[i]); + sprintf(extra, "%s%02X", extra, rawdata[i]); +@@ -9938,80 +9999,25 @@ static int rtw_mp_efuse_get(struct net_device *dev, + // DBG_871X("}\n"); + } + else if (strcmp(tmp[0], "mac") == 0) +- { +- #ifdef CONFIG_RTL8192C +- addr = EEPROM_MAC_ADDR_92C; +- #endif // CONFIG_RTL8192C +- #ifdef CONFIG_RTL8192D +- #ifdef CONFIG_USB_HCI +- if (pHalData->interfaceIndex == 0) +- addr = EEPROM_MAC_ADDR_MAC0_92DU; +- else +- addr = EEPROM_MAC_ADDR_MAC1_92DU; +- #else +- if (pHalData->interfaceIndex == 0) +- addr = EEPROM_MAC_ADDR_MAC0_92DE; +- else +- addr = EEPROM_MAC_ADDR_MAC1_92DE; +- #endif +- #endif // CONFIG_RTL8192D +- #ifdef CONFIG_RTL8723A +- #ifdef CONFIG_SDIO_HCI +- addr = EEPROM_MAC_ADDR_8723AS; +- #endif +- #ifdef CONFIG_GSPI_HCI +- addr = EEPROM_MAC_ADDR_8723AS; +- #endif +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_MAC_ADDR_8723AU; +- #endif +- #endif // CONFIG_RTL8723A +- #ifdef CONFIG_RTL8188E +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_MAC_ADDR_88EU; +- #endif +- #ifdef CONFIG_SDIO_HCI +- addr = EEPROM_MAC_ADDR_88ES; +- #endif +- #ifdef CONFIG_PCI_HCI +- addr = EEPROM_MAC_ADDR_88EE; +- #endif +- #endif // CONFIG_RTL8188E ++ { ++ if (hal_efuse_macaddr_offset(padapter) == -1) { ++ err = -EFAULT; ++ goto exit; ++ } + +- #ifdef CONFIG_RTL8192E +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_MAC_ADDR_8192EU; +- #endif +- #ifdef CONFIG_SDIO_HCI +- addr = EEPROM_MAC_ADDR_8192ES; +- #endif +- #ifdef CONFIG_PCI_HCI +- addr = EEPROM_MAC_ADDR_8192EE; +- #endif +- #endif +- #ifdef CONFIG_RTL8723B +- #ifdef CONFIG_SDIO_HCI +- addr = EEPROM_MAC_ADDR_8723BS; +- #endif +- #ifdef CONFIG_GSPI_HCI +- addr = EEPROM_MAC_ADDR_8723BS; +- #endif +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_MAC_ADDR_8723BU; +- #endif +- #endif // CONFIG_RTL8723B ++ addr = hal_efuse_macaddr_offset(padapter); + cnts = 6; + +- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); +- if ((addr + cnts) > max_available_size) { ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); ++ if ((addr + cnts) > max_available_len) { + DBG_871X("%s: addr(0x%02x)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); + err = -EFAULT; + goto exit; + } + +- if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) ++ if (rtw_efuse_mask_map_read(padapter, addr, cnts, data) == _FAIL) + { +- DBG_871X("%s: rtw_efuse_map_read error!\n", __FUNCTION__); ++ DBG_871X("%s: rtw_efuse_mask_map_read error!\n", __func__); + err = -EFAULT; + goto exit; + } +@@ -10032,21 +10038,6 @@ static int rtw_mp_efuse_get(struct net_device *dev, + } + else if (strcmp(tmp[0], "vidpid") == 0) + { +- #ifdef CONFIG_RTL8192C +- addr = EEPROM_VID_92C; +- #endif // CONFIG_RTL8192C +- #ifdef CONFIG_RTL8192D +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_VID_92DU; +- #else +- addr = EEPROM_VID_92DE; +- #endif +- #endif // CONFIG_RTL8192D +- #ifdef CONFIG_RTL8723A +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_VID_8723AU; +- #endif +- #endif // CONFIG_RTL8723A + #ifdef CONFIG_RTL8188E + #ifdef CONFIG_USB_HCI + addr = EEPROM_VID_88EU; +@@ -10067,16 +10058,26 @@ static int rtw_mp_efuse_get(struct net_device *dev, + #ifdef CONFIG_RTL8723B + addr = EEPROM_VID_8723BU; + #endif // CONFIG_RTL8192E ++ ++ #ifdef CONFIG_RTL8188F ++ addr = EEPROM_VID_8188FU; ++ #endif /* CONFIG_RTL8188F */ ++ ++ #ifdef CONFIG_RTL8703B ++ #ifdef CONFIG_USB_HCI ++ addr = EEPROM_VID_8703BU; ++ #endif ++ #endif /* CONFIG_RTL8703B */ ++ + cnts = 4; + +- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); +- if ((addr + cnts) > max_available_size) +- { ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); ++ if ((addr + cnts) > max_available_len) { + DBG_871X("%s: addr(0x%02x)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); + err = -EFAULT; + goto exit; + } +- if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) ++ if (rtw_efuse_mask_map_read(padapter, addr, cnts, data) == _FAIL) + { + DBG_871X("%s: rtw_efuse_access error!!\n", __FUNCTION__); + err = -EFAULT; +@@ -10096,15 +10097,16 @@ static int rtw_mp_efuse_get(struct net_device *dev, + } + } + // DBG_871X("}\n"); +- } +- else if (strcmp(tmp[0], "ableraw") == 0) +- { +- efuse_GetCurrentSize(padapter,&raw_cursize); +- raw_maxsize = efuse_GetMaxSize(padapter); +- sprintf(extra, "[available raw size]= %d bytes", raw_maxsize-raw_cursize); +- } +- else if (strcmp(tmp[0], "btfmap") == 0) +- { ++ } else if (strcmp(tmp[0], "ableraw") == 0) { ++ efuse_GetCurrentSize(padapter, &raw_cursize); ++ raw_maxsize = efuse_GetMaxSize(padapter); ++ sprintf(extra, "[available raw size]= %d bytes\n", raw_maxsize - raw_cursize); ++ } else if (strcmp(tmp[0], "btableraw") == 0) { ++ efuse_bt_GetCurrentSize(padapter, &raw_cursize); ++ raw_maxsize = efuse_bt_GetMaxSize(padapter); ++ sprintf(extra, "[available raw size]= %d bytes\n", raw_maxsize - raw_cursize); ++ } else if (strcmp(tmp[0], "btfmap") == 0) { ++ + BTEfuse_PowerSwitch(padapter,1,_TRUE); + + mapLen = EFUSE_BT_MAX_MAP_LEN; +@@ -10193,9 +10195,8 @@ static int rtw_mp_efuse_get(struct net_device *dev, + } + DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); + +- EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); +- if ((addr + cnts) > max_available_size) +- { ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); ++ if ((addr + cnts) > max_available_len) { + DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); + err = -EFAULT; + goto exit; +@@ -10392,7 +10393,7 @@ static int rtw_mp_efuse_set(struct net_device *dev, + u8 *ShadowMapWiFi = NULL; + u8 *setrawdata = NULL; + char *pch, *ptmp, *token, *tmp[3]={0x00,0x00,0x00}; +- u16 addr=0xFF, cnts=0, BTStatus=0 , max_available_size=0; ++ u16 addr = 0xFF, cnts = 0, BTStatus = 0 , max_available_len = 0; + int err; + + wrqu = (struct iw_point*)wdata; +@@ -10497,14 +10498,10 @@ static int rtw_mp_efuse_set(struct net_device *dev, + { + setdata[jj] = key_2char2num(tmp[2][kk], tmp[2][kk+1]); + } +-#ifndef CONFIG_RTL8188E +- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); +-#else +- //Change to check TYPE_EFUSE_MAP_LEN ,beacuse 8188E raw 256,logic map over 256. +- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_size, _FALSE); +-#endif +- if ((addr+cnts) > max_available_size) +- { ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); ++ ++ if ((addr + cnts) > max_available_len) { + DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); + err = -EFAULT; + goto exit; +@@ -10517,8 +10514,8 @@ static int rtw_mp_efuse_set(struct net_device *dev, + goto exit; + } + *extra = 0; +- DBG_871X("%s: after rtw_BT_efuse_map_write to _rtw_memcmp \n", __FUNCTION__); +- if ( (rtw_efuse_map_read(padapter, addr, cnts, ShadowMapWiFi) == _SUCCESS ) ) ++ DBG_871X("%s: after rtw_efuse_map_write to _rtw_memcmp\n", __func__); ++ if (rtw_efuse_mask_map_read(padapter, addr, cnts, ShadowMapWiFi) == _SUCCESS) + { + if (_rtw_memcmp((void*)ShadowMapWiFi ,(void*)setdata,cnts)) + { +@@ -10585,82 +10582,13 @@ static int rtw_mp_efuse_set(struct net_device *dev, + } + + //mac,00e04c871200 +- #ifdef CONFIG_RTL8192C +- addr = EEPROM_MAC_ADDR_92C; +- #endif +- #ifdef CONFIG_RTL8192D +- #ifdef CONFIG_USB_HCI +- if (pHalData->interfaceIndex == 0) +- addr = EEPROM_MAC_ADDR_MAC0_92DU; +- else +- addr = EEPROM_MAC_ADDR_MAC1_92DU; +- #else +- if (pHalData->interfaceIndex == 0) +- addr = EEPROM_MAC_ADDR_MAC0_92DE; +- else +- addr = EEPROM_MAC_ADDR_MAC1_92DE; +- #endif +- #endif +- #ifdef CONFIG_RTL8723A +- #ifdef CONFIG_SDIO_HCI +- addr = EEPROM_MAC_ADDR_8723AS; +- #endif +- #ifdef CONFIG_GSPI_HCI +- addr = EEPROM_MAC_ADDR_8723AS; +- #endif +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_MAC_ADDR_8723AU; +- #endif +- #endif // CONFIG_RTL8723A +- #ifdef CONFIG_RTL8188E +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_MAC_ADDR_88EU; +- #endif +- #ifdef CONFIG_SDIO_HCI +- addr = EEPROM_MAC_ADDR_88ES; +- #endif +- #ifdef CONFIG_PCI_HCI +- addr = EEPROM_MAC_ADDR_88EE; +- #endif +- #endif //#ifdef CONFIG_RTL8188E +- +- #ifdef CONFIG_RTL8192E +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_MAC_ADDR_8192EU; +- #endif +- #ifdef CONFIG_SDIO_HCI +- addr = EEPROM_MAC_ADDR_8192ES; +- #endif +- #ifdef CONFIG_PCI_HCI +- addr = EEPROM_MAC_ADDR_8192EE; +- #endif +- #endif //#ifdef CONFIG_RTL8192E +- +- #ifdef CONFIG_RTL8723B +- #ifdef CONFIG_SDIO_HCI +- addr = EEPROM_MAC_ADDR_8723BS; +- #endif +- #ifdef CONFIG_GSPI_HCI +- addr = EEPROM_MAC_ADDR_8723BS; +- #endif +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_MAC_ADDR_8723BU; +- #endif +- #endif // CONFIG_RTL8723B +- +- #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) +- #ifdef CONFIG_SDIO_HCI +- addr = EEPROM_MAC_ADDR_8821AS; +- #endif +- #ifdef CONFIG_PCI_HCI +- addr = EEPROM_MAC_ADDR_8821AE; +- #endif +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_MAC_ADDR_8821AU; +- #endif +- +- #endif // CONFIG_RTL8812A/CONFIG_RTL8821A + ++ if (hal_efuse_macaddr_offset(padapter) == -1) { ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ addr = hal_efuse_macaddr_offset(padapter); + cnts = strlen(tmp[1]); + if (cnts%2) + { +@@ -10688,14 +10616,10 @@ static int rtw_mp_efuse_set(struct net_device *dev, + { + setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+1]); + } +-#ifndef CONFIG_RTL8188E +- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); +-#else +- //Change to check TYPE_EFUSE_MAP_LEN ,beacuse 8188E raw 256,logic map over 256. +- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_size, _FALSE); +-#endif +- if ((addr+cnts) > max_available_size) +- { ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); ++ ++ if ((addr + cnts) > max_available_len) { + DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); + err = -EFAULT; + goto exit; +@@ -10716,22 +10640,7 @@ static int rtw_mp_efuse_set(struct net_device *dev, + goto exit; + } + +- // pidvid,da0b7881 +- #ifdef CONFIG_RTL8192C +- addr = EEPROM_VID_92C; +- #endif // CONFIG_RTL8192C +- #ifdef CONFIG_RTL8192D +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_VID_92DU; +- #else +- addr = EEPROM_VID_92DE; +- #endif +- #endif // CONFIG_RTL8192D +- #ifdef CONFIG_RTL8723A +- #ifdef CONFIG_USB_HCI +- addr = EEPROM_VID_8723AU; +- #endif +- #endif // CONFIG_RTL8723A ++ // pidvid,da0b7881 + #ifdef CONFIG_RTL8188E + #ifdef CONFIG_USB_HCI + addr = EEPROM_VID_88EU; +@@ -10753,7 +10662,17 @@ static int rtw_mp_efuse_set(struct net_device *dev, + #ifdef CONFIG_RTL8723B + addr = EEPROM_VID_8723BU; + #endif +- ++ ++ #ifdef CONFIG_RTL8188F ++ addr = EEPROM_VID_8188FU; ++ #endif ++ ++ #ifdef CONFIG_RTL8703B ++ #ifdef CONFIG_USB_HCI ++ addr = EEPROM_VID_8703BU; ++ #endif /* CONFIG_USB_HCI */ ++ #endif /* CONFIG_RTL8703B */ ++ + cnts = strlen(tmp[1]); + if (cnts%2) + { +@@ -10776,9 +10695,8 @@ static int rtw_mp_efuse_set(struct net_device *dev, + setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+1]); + } + +- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); +- if ((addr+cnts) > max_available_size) +- { ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); ++ if ((addr + cnts) > max_available_len) { + DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); + err = -EFAULT; + goto exit; +@@ -10793,10 +10711,10 @@ static int rtw_mp_efuse_set(struct net_device *dev, + } + else if (strcmp(tmp[0], "wldumpfake") == 0) + { +- if (rtw_efuse_map_read(padapter, 0, EFUSE_MAP_SIZE, pEfuseHal->fakeEfuseModifiedMap) == _SUCCESS) { +- DBG_871X("%s: WiFi hw efuse dump to Fake map success \n", __FUNCTION__); ++ if (rtw_efuse_mask_map_read(padapter, 0, EFUSE_MAP_SIZE, pEfuseHal->fakeEfuseModifiedMap) == _SUCCESS) { ++ DBG_871X("%s: WiFi hw efuse dump to Fake map success\n", __func__); + } else { +- DBG_871X("%s: WiFi hw efuse dump to Fake map Fail \n", __FUNCTION__); ++ DBG_871X("%s: WiFi hw efuse dump to Fake map Fail\n", __func__); + err = -EFAULT; + } + } +@@ -10851,10 +10769,24 @@ static int rtw_mp_efuse_set(struct net_device *dev, + { + setdata[jj] = key_2char2num(tmp[2][kk], tmp[2][kk+1]); + } ++#ifdef CONFIG_RTL8703B ++ if (cnts == 1 && addr == 0x189) { ++ setdata[1] = setdata[0]; ++ setdata[0] = 0x00; ++ cnts += 1; ++ addr = 0x188; ++ DBG_871X("addr 0x%x ,setdata=0x%X 0x%X\n", addr, setdata[0], setdata[1]); ++ } else if (cnts == 1 && addr == 0x161) { ++ setdata[1] = setdata[0]; ++ setdata[0] = 0xFE; ++ cnts += 1; ++ addr = 0x160; ++ DBG_871X("addr 0x%x ,setdata=0x%X 0x%X\n", addr, setdata[0], setdata[1]); ++ } ++#endif + +- EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); +- if ((addr+cnts) > max_available_size) +- { ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (PVOID)&max_available_len, _FALSE); ++ if ((addr + cnts) > max_available_len) { + DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); + err = -EFAULT; + goto exit; +@@ -10951,13 +10883,6 @@ static int rtw_mp_efuse_set(struct net_device *dev, + rtw_read8(padapter, EFUSE_CTRL); + + _rtw_memcpy(pEfuseHal->BTEfuseModifiedMap, pEfuseHal->fakeBTEfuseModifiedMap, EFUSE_BT_MAX_MAP_LEN); +- +- EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); +- if (max_available_size < 1) +- { +- err = -EFAULT; +- goto exit; +- } + + if (rtw_BT_efuse_map_write(padapter, 0x00, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseModifiedMap) == _FAIL) + { +@@ -11028,12 +10953,6 @@ static int rtw_mp_efuse_set(struct net_device *dev, + } + else if (strcmp(tmp[0], "wlfk2map") == 0) + { +- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); +- if (max_available_size < 1) +- { +- err = -EFAULT; +- goto exit; +- } + if (rtw_efuse_map_write(padapter, 0x00, EFUSE_MAP_SIZE, pEfuseHal->fakeEfuseModifiedMap) == _FAIL) + { + DBG_871X("%s: rtw_efuse_map_write fakeEfuseModifiedMap error!\n", __FUNCTION__); +@@ -11041,8 +10960,8 @@ static int rtw_mp_efuse_set(struct net_device *dev, + goto exit; + } + *extra = 0; +- DBG_871X("%s: after rtw_BT_efuse_map_write to _rtw_memcmp \n", __FUNCTION__); +- if ( (rtw_efuse_map_read(padapter, 0x00, EFUSE_MAP_SIZE, ShadowMapWiFi) == _SUCCESS ) ) ++ DBG_871X("%s: after rtw_BT_efuse_map_write to _rtw_memcmp\n", __func__); ++ if (rtw_efuse_mask_map_read(padapter, 0x00, EFUSE_MAP_SIZE, ShadowMapWiFi) == _SUCCESS) + { + if (_rtw_memcmp((void*)ShadowMapWiFi ,(void*)setdata,cnts)) + { +@@ -11092,6 +11011,8 @@ static int rtw_mp_efuse_set(struct net_device *dev, + { + pEfuseHal->fakeEfuseModifiedMap[addr+jj] = key_2char2num(tmp[2][kk], tmp[2][kk+1]); + } ++ _rtw_memset(extra, '\0', strlen(extra)); ++ sprintf(extra, "wlwfake OK\n"); + } + + exit: +@@ -11120,1790 +11041,142 @@ exit: + return err; + } + +-#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) +-/* +- * Input Format: %s,%d,%d +- * %s is width, could be +- * "b" for 1 byte +- * "w" for WORD (2 bytes) +- * "dw" for DWORD (4 bytes) +- * 1st %d is address(offset) +- * 2st %d is data to write +- */ +-static int rtw_mp_write_reg(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) ++ ++#ifdef CONFIG_MP_INCLUDED ++ ++#ifdef CONFIG_SDIO_INDIRECT_ACCESS ++#define DBG_MP_SDIO_INDIRECT_ACCESS 1 ++static int rtw_mp_sd_iread(struct net_device *dev ++ , struct iw_request_info *info ++ , struct iw_point *wrqu ++ , char *extra) + { +- char *pch, *pnext, *ptmp; +- char *width_str; +- char width; +- u32 addr, data; +- int ret; ++ char input[16]; ++ u8 width; ++ unsigned long addr; ++ u32 ret = 0; + PADAPTER padapter = rtw_netdev_priv(dev); +- char input[wrqu->length]; + +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- _rtw_memset(extra, 0, wrqu->length); +- +- pch = input; ++ if (wrqu->length > 16) { ++ DBG_871X(FUNC_ADPT_FMT" wrqu->length:%d\n", FUNC_ADPT_ARG(padapter), wrqu->length); ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) { ++ DBG_871X(FUNC_ADPT_FMT" copy_from_user fail\n", FUNC_ADPT_ARG(padapter)); ++ ret = -EFAULT; ++ goto exit; ++ } + +- pnext = strpbrk(pch, " ,.-"); +- if (pnext == NULL) return -EINVAL; +- *pnext = 0; +- width_str = pch; ++ _rtw_memset(extra, 0, wrqu->length); + +- pch = pnext + 1; +- pnext = strpbrk(pch, " ,.-"); +- if (pnext == NULL) return -EINVAL; +- *pnext = 0; +- addr = simple_strtoul(pch, &ptmp, 16); +- if (addr > 0x3FFF) return -EINVAL; ++ if (sscanf(input, "%hhu,%lx", &width, &addr) != 2) { ++ DBG_871X(FUNC_ADPT_FMT" sscanf fail\n", FUNC_ADPT_ARG(padapter)); ++ ret = -EINVAL; ++ goto exit; ++ } + +- pch = pnext + 1; +- if ((pch - extra) >= wrqu->length) return -EINVAL; +- data = simple_strtoul(pch, &ptmp, 16); ++ if (addr > 0x3FFF) { ++ DBG_871X(FUNC_ADPT_FMT" addr:0x%lx\n", FUNC_ADPT_ARG(padapter), addr); ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (DBG_MP_SDIO_INDIRECT_ACCESS) ++ DBG_871X(FUNC_ADPT_FMT" width:%u, addr:0x%lx\n", FUNC_ADPT_ARG(padapter), width, addr); + +- ret = 0; +- width = width_str[0]; + switch (width) { +- case 'b': +- // 1 byte +- if (data > 0xFF) { +- ret = -EINVAL; +- break; +- } +- rtw_write8(padapter, addr, data); +- break; +- case 'w': +- // 2 bytes +- if (data > 0xFFFF) { +- ret = -EINVAL; +- break; +- } +- rtw_write16(padapter, addr, data); +- break; +- case 'd': +- // 4 bytes +- rtw_write32(padapter, addr, data); +- break; +- default: +- ret = -EINVAL; +- break; +- } +- +- return ret; +-} +- +-/* +- * Input Format: %s,%d +- * %s is width, could be +- * "b" for 1 byte +- * "w" for WORD (2 bytes) +- * "dw" for DWORD (4 bytes) +- * %d is address(offset) +- * +- * Return: +- * %d for data readed +- */ +-static int rtw_mp_read_reg(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- char input[wrqu->length]; +- char *pch, *pnext, *ptmp; +- char *width_str; +- char width; +- char data[20],tmp[20]; +- u32 addr; +- //u32 *data = (u32*)extra; +- u32 ret, i=0, j=0, strtout=0; +- PADAPTER padapter = rtw_netdev_priv(dev); +- +- +- if (wrqu->length > 128) +- return -EFAULT; +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- _rtw_memset(data, 0, 20); +- _rtw_memset(tmp, 0, 20); +- _rtw_memset(extra, 0, wrqu->length); +- +- pch = input; +- pnext = strpbrk(pch, " ,.-"); +- if (pnext == NULL) return -EINVAL; +- *pnext = 0; +- width_str = pch; +- +- pch = pnext + 1; +- if ((pch - input) >= wrqu->length) return -EINVAL; +- +- addr = simple_strtoul(pch, &ptmp, 16); +- if (addr > 0x3FFF) return -EINVAL; +- +- ret = 0; +- width = width_str[0]; +- switch (width) +- { +- case 'b': +- // 1 byte +- // *(u8*)data = rtw_read8(padapter, addr); +- sprintf(extra, "%d\n", rtw_read8(padapter, addr)); +- wrqu->length = strlen(extra); +- break; +- case 'w': +- // 2 bytes +- //*(u16*)data = rtw_read16(padapter, addr); +- sprintf(data, "%04x\n", rtw_read16(padapter, addr)); +- for( i=0 ; i <= strlen(data) ; i++) +- { +- if( i%2==0 ) +- { +- tmp[j]=' '; +- j++; +- } +- if ( data[i] != '\0' ) +- tmp[j] = data[i]; +- +- j++; +- } +- pch = tmp; +- DBG_871X("pch=%s",pch); +- +- while( *pch != '\0' ) +- { +- pnext = strpbrk(pch, " "); +- if (!pnext) +- break; +- +- pnext++; +- if ( *pnext != '\0' ) +- { +- strtout = simple_strtoul (pnext , &ptmp, 16); +- sprintf( extra, "%s %d" ,extra ,strtout ); +- } +- else{ +- break; +- } +- pch = pnext; +- } +- wrqu->length = 7; +- break; +- case 'd': +- // 4 bytes +- //*data = rtw_read32(padapter, addr); +- sprintf(data, "%08x", rtw_read32(padapter, addr)); +- //add read data format blank +- for( i=0 ; i <= strlen(data) ; i++) +- { +- if( i%2==0 ) +- { +- tmp[j]=' '; +- j++; +- } +- if ( data[i] != '\0' ) +- tmp[j] = data[i]; +- +- j++; +- } +- pch = tmp; +- DBG_871X("pch=%s",pch); +- +- while( *pch != '\0' ) +- { +- pnext = strpbrk(pch, " "); +- if (!pnext) +- break; +- +- pnext++; +- if ( *pnext != '\0' ) +- { +- strtout = simple_strtoul (pnext , &ptmp, 16); +- sprintf( extra, "%s %d" ,extra ,strtout ); +- } +- else{ +- break; +- } +- pch = pnext; +- } +- wrqu->length = strlen(extra); +- break; +- +- default: +- wrqu->length = 0; +- ret = -EINVAL; +- break; +- ++ case 1: ++ sprintf(extra, "0x%02x", rtw_sd_iread8(padapter, addr)); ++ wrqu->length = strlen(extra); ++ break; ++ case 2: ++ sprintf(extra, "0x%04x", rtw_sd_iread16(padapter, addr)); ++ wrqu->length = strlen(extra); ++ break; ++ case 4: ++ sprintf(extra, "0x%08x", rtw_sd_iread32(padapter, addr)); ++ wrqu->length = strlen(extra); ++ break; ++ default: ++ wrqu->length = 0; ++ ret = -EINVAL; ++ break; + } + ++exit: + return ret; + } + +-/* +- * Input Format: %d,%x,%x +- * %d is RF path, should be smaller than MAX_RF_PATH_NUMS +- * 1st %x is address(offset) +- * 2st %x is data to write +- */ +- static int rtw_mp_write_rf(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +-/*static int rtw_mp_write_rf(struct net_device *dev, +- struct iw_request_info *info, +- union iwreq_data *wrqu, char *extra) +-*/ +- u32 path, addr, data; +- int ret; +- PADAPTER padapter = rtw_netdev_priv(dev); +- char input[wrqu->length]; +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- +- ret = sscanf(input, "%d,%x,%x", &path, &addr, &data); +- if (ret < 3) return -EINVAL; +- +- if (path >= GET_HAL_RFPATH_NUM(padapter)) return -EINVAL; +- if (addr > 0xFF) return -EINVAL; +- if (data > 0xFFFFF) return -EINVAL; +- +- _rtw_memset(extra, 0, wrqu->length); +- +- write_rfreg(padapter, path, addr, data); +- +- sprintf(extra, "write_rf completed \n"); +- wrqu->length = strlen(extra); +- +- return 0; +-} +- +-/* +- * Input Format: %d,%x +- * %d is RF path, should be smaller than MAX_RF_PATH_NUMS +- * %x is address(offset) +- * +- * Return: +- * %d for data readed +- */ +-static int rtw_mp_read_rf(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- char input[wrqu->length]; +- char *pch, *pnext, *ptmp; +- char data[20],tmp[20]; +- //u32 *data = (u32*)extra; +- u32 path, addr; +- u32 ret,i=0 ,j=0,strtou=0; +- PADAPTER padapter = rtw_netdev_priv(dev); +- +- +- if (wrqu->length > 128) return -EFAULT; +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- ret = sscanf(input, "%d,%x", &path, &addr); +- if (ret < 2) return -EINVAL; +- +- if (path >= GET_HAL_RFPATH_NUM(padapter)) return -EINVAL; +- if (addr > 0xFF) return -EINVAL; +- +- _rtw_memset(extra, 0, wrqu->length); +- +- //*data = read_rfreg(padapter, path, addr); +- sprintf(data, "%08x", read_rfreg(padapter, path, addr)); +- //add read data format blank +- for( i=0 ; i <= strlen(data) ; i++) +- { +- if( i%2==0 ) +- { +- tmp[j]=' '; +- j++; +- } +- tmp[j] = data[i]; +- j++; +- } +- pch = tmp; +- DBG_871X("pch=%s",pch); +- +- while( *pch != '\0' ) +- { +- pnext = strpbrk(pch, " "); +- if (!pnext) +- break; +- pnext++; +- if ( *pnext != '\0' ) +- { +- strtou = simple_strtoul (pnext , &ptmp, 16); +- sprintf( extra, "%s %d" ,extra ,strtou ); +- } +- else{ +- break; +- } +- pch = pnext; +- } +- wrqu->length = strlen(extra); +- +- return 0; +-} +- +-static int rtw_mp_start(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- u8 val8; +- PADAPTER padapter = rtw_netdev_priv(dev); +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +- struct hal_ops *pHalFunc = &padapter->HalFunc; +- +- rtw_pm_set_ips(padapter,IPS_NONE); +- LeaveAllPowerSaveMode(padapter); +- +- if(padapter->registrypriv.mp_mode ==0) +- { +- +-#ifdef CONFIG_BT_COEXIST +- pdmpriv->DMFlag &= ~DYNAMIC_FUNC_BT; +-#endif +- pHalFunc->hal_deinit(padapter); +- padapter->registrypriv.mp_mode =1; +- pHalFunc->hal_init(padapter); +- +- rtw_pm_set_ips(padapter,IPS_NONE); +- LeaveAllPowerSaveMode(padapter); +- } +- +- if (padapter->registrypriv.mp_mode == 0) +- return -EPERM; +- +- if (padapter->mppriv.mode == MP_OFF) { +- if (mp_start_test(padapter) == _FAIL) +- return -EPERM; +- padapter->mppriv.mode = MP_ON; +- MPT_PwrCtlDM(padapter,0); +- } +- padapter->mppriv.bmac_filter = _FALSE; +-#ifdef CONFIG_RTL8723B +-#ifdef CONFIG_USB_HCI +- rtw_write32(padapter, 0x765, 0x0000); +- rtw_write32(padapter, 0x948, 0x0280); +-#else +- rtw_write32(padapter, 0x765, 0x0000); +- rtw_write32(padapter, 0x948, 0x0000); +-#endif +-#ifdef CONFIG_FOR_RTL8723BS_VQ0 +- rtw_write32(padapter, 0x765, 0x0000); +- rtw_write32(padapter, 0x948, 0x0280); +-#endif +- rtw_write8(padapter, 0x66, 0x27); //Open BT uart Log +- rtw_write8(padapter, 0xc50, 0x20); //for RX init Gain +-#endif +- ODM_Write_DIG(&pHalData->odmpriv,0x20); +- +- return 0; +-} +- +-static int rtw_mp_stop(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- PADAPTER padapter = rtw_netdev_priv(dev); +- struct hal_ops *pHalFunc = &padapter->HalFunc; +- +- if(padapter->registrypriv.mp_mode ==1) +- { +- +- MPT_DeInitAdapter(padapter); +- pHalFunc->hal_deinit(padapter); +- padapter->registrypriv.mp_mode=0; +- pHalFunc->hal_init(padapter); +- } +- +- if (padapter->mppriv.mode != MP_OFF) { +- mp_stop_test(padapter); +- padapter->mppriv.mode = MP_OFF; +- } +- +- return 0; +-} +- +-extern int wifirate2_ratetbl_inx(unsigned char rate); +- +-static int rtw_mp_rate(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- u32 rate = MPT_RATE_1M; +- u8 input[wrqu->length]; +- PADAPTER padapter = rtw_netdev_priv(dev); +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- rate = rtw_mpRateParseFunc(padapter,input); +- +- if (rate ==0 && strcmp(input,"1M")!=0) +- { +- rate = rtw_atoi(input); +- if(rate <= 0x7f) +- rate = wifirate2_ratetbl_inx( (u8)rate); +- else if (rate < 0xC8) +- rate =(rate - 0x80 + MPT_RATE_MCS0); +- //HT rate 0x80(MCS0) ~ 0x8F(MCS15) ~ 0x9F(MCS31) 128~159 +- //VHT1SS~2SS rate 0xA0 (VHT1SS_MCS0 44) ~ 0xB3 (VHT2SS_MCS9 #63) 160~179 +- //VHT rate 0xB4 (VHT3SS_MCS0 64) ~ 0xC7 (VHT2SS_MCS9 #83) 180~199 +- //else +- //VHT rate 0x90(VHT1SS_MCS0) ~ 0x99(VHT1SS_MCS9) 144~153 +- // rate =(rate - MPT_RATE_VHT1SS_MCS0); +- } +- _rtw_memset(extra, 0, wrqu->length); +- +- sprintf( extra, "Set data rate to %s index %d" ,input,rate ); +- DBG_871X("%s: %s rate index=%d \n", __func__,input,rate); +- +- if (rate >= MPT_RATE_LAST ) +- return -EINVAL; +- +- padapter->mppriv.rateidx = rate; +- Hal_SetDataRate(padapter); +- +- wrqu->length = strlen(extra); +- return 0; +-} +- +-static int rtw_mp_channel(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- +- PADAPTER padapter = rtw_netdev_priv(dev); +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- u8 input[wrqu->length]; +- u32 channel = 1; +- int cur_ch_offset; +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- channel = rtw_atoi(input); +- //DBG_871X("%s: channel=%d\n", __func__, channel); +- _rtw_memset(extra, 0, wrqu->length); +- sprintf( extra, "Change channel %d to channel %d", padapter->mppriv.channel , channel ); +- padapter->mppriv.channel = channel; +- Hal_SetChannel(padapter); +- pHalData->CurrentChannel = channel; +- +- wrqu->length = strlen(extra); +- return 0; +-} +- +-static int rtw_mp_bandwidth(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- u32 bandwidth=0, sg=0; +- int cur_ch_offset; +- //u8 buffer[40]; +- PADAPTER padapter = rtw_netdev_priv(dev); +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- //if (copy_from_user(buffer, (void*)wrqu->data.pointer, wrqu->data.length)) +- // return -EFAULT; +- +- //DBG_871X("%s:iwpriv in=%s\n", __func__, extra); +- +- sscanf(extra, "40M=%d,shortGI=%d", &bandwidth, &sg); +- +- if (bandwidth == 1) +- bandwidth=CHANNEL_WIDTH_40; +- else if (bandwidth == 2) +- bandwidth=CHANNEL_WIDTH_80; +- DBG_871X("%s: bw=%d sg=%d \n", __func__, bandwidth , sg); +- +- padapter->mppriv.bandwidth = (u8)bandwidth; +- padapter->mppriv.preamble = sg; +- +- SetBandwidth(padapter); +- pHalData->CurrentChannelBW = bandwidth; +- //cur_ch_offset = rtw_get_offset_by_ch(padapter->mppriv.channel); +- //set_channel_bwmode(padapter, padapter->mppriv.channel, cur_ch_offset, bandwidth); +- +- return 0; +-} +- +- +-static int rtw_mp_txpower_index(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- PADAPTER padapter = rtw_netdev_priv(dev); +- char input[wrqu->length]; +- u32 rfpath; +- u32 txpower_inx; +- +- if (wrqu->length > 128) +- return -EFAULT; +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- rfpath = rtw_atoi(input); +- txpower_inx = mpt_ProQueryCalTxPower(padapter, rfpath); +- sprintf(extra, " %d", txpower_inx); +- wrqu->length = strlen(extra); +- +- return 0; +-} +- +- +-static int rtw_mp_txpower(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- u32 idx_a=0,idx_b=0,MsetPower=1; +- u8 input[wrqu->length]; +- +- PADAPTER padapter = rtw_netdev_priv(dev); +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- MsetPower = strncmp(input, "off", 3); +- sscanf(input,"patha=%d,pathb=%d",&idx_a,&idx_b); +- //DBG_871X("%s: tx_pwr_idx_a=%x b=%x\n", __func__, idx_a, idx_b); +- if(MsetPower==0) +- { +- padapter->mppriv.bSetTxPower = 0; +- sprintf( extra, "MP Set power off"); +- } +- else +- { +- sprintf( extra, "Set power level path_A:%d path_B:%d", idx_a , idx_b ); +- padapter->mppriv.txpoweridx = (u8)idx_a; +- padapter->mppriv.txpoweridx_b = (u8)idx_b; +- padapter->mppriv.bSetTxPower = 1; +- Hal_SetAntennaPathPower(padapter); +- } +- wrqu->length = strlen(extra); +- return 0; +-} +- +-static int rtw_mp_ant_tx(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- u8 i; +- u8 input[wrqu->length]; +- u16 antenna = 0; +- PADAPTER padapter = rtw_netdev_priv(dev); +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- //DBG_871X("%s: input=%s\n", __func__, input); +- +- sprintf( extra, "switch Tx antenna to %s", input); +- +- for (i=0; i < strlen(input); i++) +- { +- switch(input[i]) +- { +- case 'a' : +- antenna|=ANTENNA_A; +- break; +- case 'b': +- antenna|=ANTENNA_B; +- break; +- } +- } +- //antenna |= BIT(extra[i]-'a'); +- //DBG_871X("%s: antenna=0x%x\n", __func__, antenna); +- padapter->mppriv.antenna_tx = antenna; +- padapter->mppriv.antenna_rx = antenna; +- //DBG_871X("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_tx); +- +- Hal_SetAntenna(padapter); +- +- wrqu->length = strlen(extra); +- return 0; +-} +- +-static int rtw_mp_ant_rx(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- u8 i; +- u16 antenna = 0; +- u8 input[wrqu->length]; +- PADAPTER padapter = rtw_netdev_priv(dev); +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- //DBG_871X("%s: input=%s\n", __func__, input); +- _rtw_memset(extra, 0, wrqu->length); +- +- sprintf( extra, "switch Rx antenna to %s", input ); +- +- for (i=0; i < strlen(input); i++) { +- switch( input[i] ) +- { +- case 'a' : +- antenna|=ANTENNA_A; +- break; +- case 'b': +- antenna|=ANTENNA_B; +- break; +- case 'c' : +- antenna|=ANTENNA_C; +- break; +- } +- } +- +- //DBG_871X("%s: antenna=0x%x\n", __func__, antenna); +- padapter->mppriv.antenna_tx = antenna; +- padapter->mppriv.antenna_rx = antenna; +- //DBG_871X("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_rx); +- Hal_SetAntenna(padapter); +- wrqu->length = strlen(extra); +- +- return 0; +-} +- +-static int rtw_mp_ctx(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- u32 pkTx = 1, countPkTx = 1, cotuTx = 1, CarrSprTx = 1, scTx = 1, sgleTx = 1, stop = 1; +- u32 bStartTest = 1; +- u32 count = 0,pktinterval=0; +- struct mp_priv *pmp_priv; +- struct pkt_attrib *pattrib; +- +- PADAPTER padapter = rtw_netdev_priv(dev); +- +- +- pmp_priv = &padapter->mppriv; +- +- if (copy_from_user(extra, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- DBG_871X("%s: in=%s\n", __func__, extra); +- +- countPkTx = strncmp(extra, "count=", 5); // strncmp TRUE is 0 +- cotuTx = strncmp(extra, "background", 20); +- CarrSprTx = strncmp(extra, "background,cs", 20); +- scTx = strncmp(extra, "background,sc", 20); +- sgleTx = strncmp(extra, "background,stone", 20); +- pkTx = strncmp(extra, "background,pkt", 20); +- stop = strncmp(extra, "stop", 4); +- sscanf(extra, "count=%d,pkt", &count); +- sscanf(extra, "pktinterval=%d", &pktinterval); +- +- //DBG_871X("%s: count=%d countPkTx=%d cotuTx=%d CarrSprTx=%d scTx=%d sgleTx=%d pkTx=%d stop=%d\n", __func__, count, countPkTx, cotuTx, CarrSprTx, pkTx, sgleTx, scTx, stop); +- _rtw_memset(extra, '\0', sizeof(extra)); +- +- if( pktinterval !=0 ) +- { +- sprintf( extra, "Pkt Interval = %d",pktinterval); +- padapter->mppriv.pktInterval = pktinterval; +- +- wrqu->length = strlen(extra); +- return 0; +- } +- +- if (stop == 0) { +- bStartTest = 0; // To set Stop +- pmp_priv->tx.stop = 1; +- sprintf( extra, "Stop continuous Tx"); +- } else { +- bStartTest = 1; +- if (pmp_priv->mode != MP_ON) { +- if (pmp_priv->tx.stop != 1) { +- DBG_871X("%s: MP_MODE != ON %d\n", __func__, pmp_priv->mode); +- return -EFAULT; +- } +- } +- } +- +- if (pkTx == 0 || countPkTx == 0) +- pmp_priv->mode = MP_PACKET_TX; +- if (sgleTx == 0) +- pmp_priv->mode = MP_SINGLE_TONE_TX; +- if (cotuTx == 0) +- pmp_priv->mode = MP_CONTINUOUS_TX; +- if (CarrSprTx == 0) +- pmp_priv->mode = MP_CARRIER_SUPPRISSION_TX; +- if (scTx == 0) +- pmp_priv->mode = MP_SINGLE_CARRIER_TX; +- +- switch (pmp_priv->mode) +- { +- case MP_PACKET_TX: +- +- //DBG_871X("%s:pkTx %d\n", __func__,bStartTest); +- if (bStartTest == 0) +- { +- pmp_priv->tx.stop = 1; +- pmp_priv->mode = MP_ON; +- sprintf( extra, "Stop continuous Tx"); +- } +- else if (pmp_priv->tx.stop == 1) +- { +- sprintf( extra, "Start continuous DA=ffffffffffff len=1500 count=%u,\n",count); +- //DBG_871X("%s:countPkTx %d\n", __func__,count); +- pmp_priv->tx.stop = 0; +- pmp_priv->tx.count = count; +- pmp_priv->tx.payload = 2; +-#ifdef CONFIG_80211N_HT +- pmp_priv->tx.attrib.ht_en = 1; +-#endif +-#ifdef CONFIG_80211AC_VHT +- pmp_priv->tx.attrib.raid = RATEID_IDX_VHT_1SS; //10 +-#endif +- pattrib = &pmp_priv->tx.attrib; +- pattrib->pktlen = 1000; +- _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); +- SetPacketTx(padapter); +- } +- else { +- //DBG_871X("%s: pkTx not stop\n", __func__); +- return -EFAULT; +- } +- wrqu->length = strlen(extra); +- return 0; +- +- case MP_SINGLE_TONE_TX: +- //DBG_871X("%s: sgleTx %d \n", __func__, bStartTest); +- if (bStartTest != 0){ +- sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); +- } +- Hal_SetSingleToneTx(padapter, (u8)bStartTest); +- break; +- +- case MP_CONTINUOUS_TX: +- //DBG_871X("%s: cotuTx %d\n", __func__, bStartTest); +- if (bStartTest != 0){ +- sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); +- } +- Hal_SetContinuousTx(padapter, (u8)bStartTest); +- break; +- +- case MP_CARRIER_SUPPRISSION_TX: +- //DBG_871X("%s: CarrSprTx %d\n", __func__, bStartTest); +- if (bStartTest != 0){ +- if( pmp_priv->rateidx <= MPT_RATE_11M ) +- { +- sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); +- +- }else +- sprintf( extra, "Specify carrier suppression but not CCK rate"); +- } +- Hal_SetCarrierSuppressionTx(padapter, (u8)bStartTest); +- break; +- +- case MP_SINGLE_CARRIER_TX: +- //DBG_871X("%s: scTx %d\n", __func__, bStartTest); +- if (bStartTest != 0){ +- sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); +- } +- Hal_SetSingleCarrierTx(padapter, (u8)bStartTest); +- break; +- +- default: +- //DBG_871X("%s:No Match MP_MODE\n", __func__); +- sprintf( extra, "Error! Continuous-Tx is not on-going."); +- return -EFAULT; +- } +- +- if ( bStartTest==1 && pmp_priv->mode != MP_ON) { +- struct mp_priv *pmp_priv = &padapter->mppriv; +- if (pmp_priv->tx.stop == 0) { +- pmp_priv->tx.stop = 1; +- //DBG_871X("%s: pkt tx is running...\n", __func__); +- rtw_msleep_os(5); +- } +-#ifdef CONFIG_80211N_HT +- pmp_priv->tx.attrib.ht_en = 1; +-#endif +-#ifdef CONFIG_80211AC_VHT +- pmp_priv->tx.attrib.raid = RATEID_IDX_VHT_1SS; //10 +-#endif +- pmp_priv->tx.stop = 0; +- pmp_priv->tx.count = 1; +- SetPacketTx(padapter); +- } else { +- pmp_priv->mode = MP_ON; +- } +- +- wrqu->length = strlen(extra); +- return 0; +-} +- +- +-static int rtw_mp_disable_bt_coexist(struct net_device *dev, +- struct iw_request_info *info, +- union iwreq_data *wrqu, char *extra) +-{ +- PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev); +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- struct dm_priv *pdmpriv = &pHalData->dmpriv; +- struct hal_ops *pHalFunc = &padapter->HalFunc; +- +- u8 input[wrqu->data.length]; +- u32 bt_coexist; +- +- if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) +- return -EFAULT; +- +- bt_coexist = rtw_atoi(input); +- +- if( bt_coexist == 0 ) +- { +- RT_TRACE(_module_mp_, _drv_info_, +- ("Set OID_RT_SET_DISABLE_BT_COEXIST: disable BT_COEXIST\n")); +- DBG_871X("Set OID_RT_SET_DISABLE_BT_COEXIST: disable BT_COEXIST\n"); +-#ifdef CONFIG_BT_COEXIST +- rtw_btcoex_HaltNotify(padapter); +- rtw_btcoex_SetManualControl(padapter, _TRUE); +- pdmpriv->DMFlag &= ~DYNAMIC_FUNC_BT; +- // Force to switch Antenna to WiFi +- rtw_write16(padapter, 0x870, 0x300); +- rtw_write16(padapter, 0x860, 0x110); +-#endif // CONFIG_BT_COEXIST +- } +- else +- { +- RT_TRACE(_module_mp_, _drv_info_, +- ("Set OID_RT_SET_DISABLE_BT_COEXIST: enable BT_COEXIST\n")); +-#ifdef CONFIG_BT_COEXIST +- pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; +- rtw_btcoex_SetManualControl(padapter, _FALSE); +-#endif +- } +- +- return 0; +-} +- +- +-static int rtw_mp_arx(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- u8 bStartRx=0,bStopRx=0,bQueryPhy=0,bQueryMac=0,bSetBssid=0; +- u8 bmac_filter = 0,bfilter_init=0; +- u32 cckok=0,cckcrc=0,ofdmok=0,ofdmcrc=0,htok=0,htcrc=0,OFDM_FA=0,CCK_FA=0,DropPacket=0,vht_ok=0,vht_err=0; +- u32 mac_cck_ok=0, mac_ofdm_ok=0, mac_ht_ok=0, mac_vht_ok=0; +- u32 mac_cck_err=0, mac_ofdm_err=0, mac_ht_err=0, mac_vht_err=0; +- u8 input[wrqu->length]; +- char *pch, *ptmp, *token, *tmp[2]={0x00,0x00}; +- u32 i=0,ii=0,jj=0,kk=0,cnts=0,bmon=0; +- PADAPTER padapter = rtw_netdev_priv(dev); +- struct mp_priv *pmppriv = &padapter->mppriv; +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- DBG_871X("%s: %s\n", __func__, input); +- +- bStartRx = (strncmp(input, "start", 5)==0)?1:0; // strncmp TRUE is 0 +- bStopRx = (strncmp(input, "stop", 5)==0)?1:0; // strncmp TRUE is 0 +- bQueryPhy = (strncmp(input, "phy", 3)==0)?1:0; // strncmp TRUE is 0 +- bQueryMac = (strncmp(input, "mac", 3)==0)?1:0; // strncmp TRUE is 0 +- bSetBssid = (strncmp(input, "setbssid=", 8)==0)?1:0; // strncmp TRUE is 0 +- //bfilter_init = (strncmp(input, "filter_init",11)==0)?1:0; +- bmac_filter = (strncmp(input, "accept_mac",10)==0)?1:0; +- bmon = (strncmp(input, "mon=",4)==0)?1:0; +- +- if(bSetBssid==1){ +- pch = input; +- while ((token = strsep(&pch, "=")) != NULL) +- { +- if (i > 1) break; +- tmp[i] = token; +- i++; +- } +- if ((tmp[0]==NULL) && (tmp[1]==NULL)){ +- return -EFAULT; +- } +- else{ +- cnts = strlen(tmp[1])/2; +- if (cnts<1) return -EFAULT; +- DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); +- DBG_871X("%s: data=%s\n", __FUNCTION__, tmp[1]); +- for (jj=0, kk=0; jj < cnts ; jj++, kk+=2){ +- pmppriv->network_macaddr[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+1]); +- DBG_871X("network_macaddr[%d]=%x \n",jj, pmppriv->network_macaddr[jj]); +- } +- } +- pmppriv->bSetRxBssid = _TRUE; +- } +- +- if(bmac_filter) +- { +- pmppriv->bmac_filter = bmac_filter; +- pch = input; +- while ((token = strsep(&pch, "=")) != NULL) +- { +- if (i > 1) break; +- tmp[i] = token; +- i++; +- } +- if ((tmp[0]==NULL) && (tmp[1]==NULL)){ +- return -EFAULT; +- } +- else{ +- cnts = strlen(tmp[1])/2; +- if (cnts<1) return -EFAULT; +- DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); +- DBG_871X("%s: data=%s\n", __FUNCTION__, tmp[1]); +- for (jj=0, kk=0; jj < cnts ; jj++, kk+=2){ +- pmppriv->mac_filter[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+1]); +- DBG_871X("%s mac_filter[%d]=%x \n",__FUNCTION__,jj, pmppriv->mac_filter[jj]); +- } +- } +- } +- +- if(bStartRx) +- { +- sprintf( extra, "start"); +- SetPacketRx(padapter, bStartRx); +- } +- else if(bStopRx) +- { +- SetPacketRx(padapter, 0); +- pmppriv->bmac_filter = _FALSE; +- sprintf( extra, "Received packet OK:%d CRC error:%d ,Filter out:%d",padapter->mppriv.rx_pktcount,padapter->mppriv.rx_crcerrpktcount,padapter->mppriv.rx_pktcount_filter_out); +- } +- else if(bQueryPhy) +- { +- +- if (IS_HARDWARE_TYPE_JAGUAR(padapter)) +- { +- cckok = PHY_QueryBBReg(padapter, 0xF04, 0x3FFF); // [13:0] +- ofdmok = PHY_QueryBBReg(padapter, 0xF14, 0x3FFF); // [13:0] +- htok = PHY_QueryBBReg(padapter, 0xF10, 0x3FFF); // [13:0] +- vht_ok = PHY_QueryBBReg(padapter, 0xF0C, 0x3FFF); // [13:0] +- +- cckcrc = PHY_QueryBBReg(padapter, 0xF04, 0x3FFF0000); // [29:16] +- ofdmcrc = PHY_QueryBBReg(padapter, 0xF14, 0x3FFF0000); // [29:16] +- htcrc = PHY_QueryBBReg(padapter, 0xF10, 0x3FFF0000); // [29:16] +- vht_err = PHY_QueryBBReg(padapter, 0xF0C, 0x3FFF0000); // [29:16] +- +- CCK_FA = PHY_QueryBBReg(padapter, 0xa5c, bMaskLWord); +- OFDM_FA = PHY_QueryBBReg(padapter, 0xF48, bMaskLWord); +- } +- else +- { +- cckok = PHY_QueryBBReg(padapter, 0xF88, bMaskDWord); +- ofdmok = PHY_QueryBBReg(padapter, 0xF94, bMaskLWord); +- htok = PHY_QueryBBReg(padapter, 0xF90, bMaskLWord); +- vht_ok = 0; +- +- cckcrc = PHY_QueryBBReg(padapter, 0xF84, bMaskDWord); +- ofdmcrc = PHY_QueryBBReg(padapter, 0xF94, bMaskHWord); +- htcrc = PHY_QueryBBReg(padapter, 0xF90, bMaskHWord); +- vht_err = 0; +- +- OFDM_FA = PHY_QueryBBReg(padapter, 0xCF0, bMaskLWord) + PHY_QueryBBReg(padapter, 0xCF2, bMaskLWord) + +- PHY_QueryBBReg(padapter, 0xDA2, bMaskLWord)+ PHY_QueryBBReg(padapter, 0xDA4, bMaskLWord) + +- PHY_QueryBBReg(padapter, 0xDA6, bMaskLWord) + PHY_QueryBBReg(padapter, 0xDA8, bMaskLWord); +- +- CCK_FA=(rtw_read8(padapter, 0xa5b )<<8 ) | (rtw_read8(padapter, 0xa5c)); +- } +- DBG_871X("%s: OFDM_FA =%d\n", __FUNCTION__, OFDM_FA); +- DBG_871X("%s: CCK_FA =%d\n", __FUNCTION__, CCK_FA); +- sprintf( extra, "Phy Received packet OK:%d CRC error:%d FA Counter: %d",cckok+ofdmok+htok+vht_ok,cckcrc+ofdmcrc+htcrc+vht_err,OFDM_FA+CCK_FA); +- } +- else if(bQueryMac) +- { +- // for 8723A +- { +- PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x3); +- mac_cck_ok = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] +- PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x0); +- mac_ofdm_ok = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] +- PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x6); +- mac_ht_ok = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] +- mac_vht_ok = 0; +- +- PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x4); +- mac_cck_err = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] +- PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x1); +- mac_ofdm_err = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] +- PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x7); +- mac_ht_err = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] +- mac_vht_err = 0; +- //Mac_DropPacket +- rtw_write32(padapter, 0x664, (rtw_read32(padapter, 0x0664)& 0x0FFFFFFF)| Mac_DropPacket); +- DropPacket = rtw_read32(padapter, 0x664)& 0x0000FFFF; +- } +- +- sprintf( extra, "Mac Received packet OK: %d , CRC error: %d , Drop Packets: %d\n", +- mac_cck_ok+mac_ofdm_ok+mac_ht_ok+mac_vht_ok,mac_cck_err+mac_ofdm_err+mac_ht_err+mac_vht_err,DropPacket); +- } +- +- if( bmon==1 ) { +- sscanf(input, "mon=%d", &bmon); +- +- if(bmon==1) +- { +- pmppriv->rx_bindicatePkt= _TRUE; +- sprintf( extra, "Indicating Receive Packet to network start\n"); +- }else { +- pmppriv->rx_bindicatePkt= _FALSE; +- sprintf( extra, "Indicating Receive Packet to network Stop\n"); +- } +- } +- +- wrqu->length = strlen(extra) + 1; +- +- return 0; +-} +- +-static int rtw_mp_trx_query(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- u32 txok,txfail,rxok,rxfail,rxfilterout; +- PADAPTER padapter = rtw_netdev_priv(dev); +- //if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) +- // return -EFAULT; +- +- txok=padapter->mppriv.tx.sended; +- txfail=0; +- rxok = padapter->mppriv.rx_pktcount; +- rxfail = padapter->mppriv.rx_crcerrpktcount; +- rxfilterout = padapter->mppriv.rx_pktcount_filter_out; +- +- _rtw_memset(extra, '\0', 128); +- +- sprintf(extra, "Tx OK:%d, Tx Fail:%d, Rx OK:%d, CRC error:%d ,Rx Filter out:%d \n", txok, txfail,rxok,rxfail,rxfilterout); +- +- wrqu->length=strlen(extra)+1; +- +- return 0; +-} +- +-static int rtw_mp_pwrtrk(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- u8 enable; +- u32 thermal; +- s32 ret; +- PADAPTER padapter = rtw_netdev_priv(dev); +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- u8 input[wrqu->length]; +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- _rtw_memset(extra, 0, wrqu->length); +- +- enable = 1; +- if (wrqu->length > 1) { // not empty string +- if (strncmp(input, "stop", 4) == 0) +- { +- enable = 0; +- sprintf(extra, "mp tx power tracking stop"); +- pHalData->TxPowerTrackControl = _FALSE; +- } +- else if (sscanf(input, "ther=%d", &thermal)) { +- pHalData->TxPowerTrackControl = _TRUE; +- ret = Hal_SetThermalMeter(padapter, (u8)thermal); +- if (ret == _FAIL) return -EPERM; +- sprintf(extra, "mp tx power tracking start,target value=%d ok ",thermal); +- }else{ +- return -EINVAL; +- } +- } +- +- ret = Hal_SetPowerTracking(padapter, enable); +- if (ret == _FAIL) return -EPERM; +- +- wrqu->length = strlen(extra); +- +- return 0; +-} +- +-static int rtw_mp_psd(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- PADAPTER padapter = rtw_netdev_priv(dev); +- u8 input[wrqu->length]; +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- strcpy(extra,input); +- +- wrqu->length = mp_query_psd(padapter, extra); +- +- return 0; +-} +- +-static int rtw_mp_thermal(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- u8 val; +- int bwrite=1; +- +- #ifdef CONFIG_RTL8192C +- u16 addr=EEPROM_THERMAL_METER_92C; +- #endif +- #ifdef CONFIG_RTL8192D +- u16 addr=EEPROM_THERMAL_METER_92D; +- #endif +- #ifdef CONFIG_RTL8723A +- u16 addr=EEPROM_THERMAL_METER_8723A; +- #endif +- #ifdef CONFIG_RTL8188E +- u16 addr=EEPROM_THERMAL_METER_88E; +- #endif +- #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) +- u16 addr=EEPROM_THERMAL_METER_8812; +- #endif +- #ifdef CONFIG_RTL8192E +- u16 addr=EEPROM_THERMAL_METER_8192E; +- #endif +- #ifdef CONFIG_RTL8723B +- u16 addr=EEPROM_THERMAL_METER_8723B; +- #endif +- u16 cnt=1; +- u16 max_available_size=0; +- PADAPTER padapter = rtw_netdev_priv(dev); +- +- if (copy_from_user(extra, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- //DBG_871X("print extra %s \n",extra); +- +- bwrite = strncmp(extra, "write", 6); // strncmp TRUE is 0 +- +- Hal_GetThermalMeter(padapter, &val); +- +- if( bwrite == 0 ) +- { +- //DBG_871X("to write val:%d",val); +- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); +- if( 2 > max_available_size ) +- { +- DBG_871X("no available efuse!\n"); +- return -EFAULT; +- } +- if ( rtw_efuse_map_write(padapter, addr, cnt, &val) == _FAIL ) +- { +- DBG_871X("rtw_efuse_map_write error \n"); +- return -EFAULT; +- } +- else +- { +- sprintf(extra, " efuse write ok :%d", val); +- } +- } +- else +- { +- sprintf(extra, "%d", val); +- } +- wrqu->length = strlen(extra); +- +- return 0; +-} +- +-static int rtw_mp_reset_stats(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- struct mp_priv *pmp_priv; +- struct pkt_attrib *pattrib; +- PADAPTER padapter = rtw_netdev_priv(dev); +- +- pmp_priv = &padapter->mppriv; +- +- pmp_priv->tx.sended = 0; +- pmp_priv->tx_pktcount = 0; +- pmp_priv->rx_pktcount = 0; +- pmp_priv->rx_pktcount_filter_out=0; +- pmp_priv->rx_crcerrpktcount = 0; +- +- //reset phy counter +- if (IS_HARDWARE_TYPE_JAGUAR(padapter)) +- { +- write_bbreg(padapter, 0xB58, BIT0, 0x1); +- write_bbreg(padapter, 0xB58, BIT0, 0x0); +- +- write_bbreg(padapter, 0x9A4, BIT17, 0x1);//reset OFDA FA counter +- write_bbreg(padapter, 0x9A4, BIT17, 0x0); +- +- write_bbreg(padapter, 0xA5C, BIT15, 0x0);//reset CCK FA counter +- write_bbreg(padapter, 0xA5C, BIT15, 0x1); +- } +- else +- { +- write_bbreg(padapter, 0xF14, BIT16, 0x1); +- rtw_msleep_os(10); +- write_bbreg(padapter, 0xF14, BIT16, 0x0); +- +- write_bbreg(padapter, 0xD00, BIT27, 0x1);//reset OFDA FA counter +- write_bbreg(padapter, 0xC0C, BIT31, 0x1);//reset OFDA FA counter +- write_bbreg(padapter, 0xD00, BIT27, 0x0); +- write_bbreg(padapter, 0xC0C, BIT31, 0x0); +- +- write_bbreg(padapter, 0xA2C, BIT15, 0x0);//reset CCK FA counter +- write_bbreg(padapter, 0xA2C, BIT15, 0x1); +- } +- //reset mac counter +- PHY_SetMacReg(padapter, 0x664, BIT27, 0x1); +- PHY_SetMacReg(padapter, 0x664, BIT27, 0x0); +- return 0; +-} +- +-static int rtw_mp_dump(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- struct mp_priv *pmp_priv; +- struct pkt_attrib *pattrib; +- u32 value; +- u8 input[wrqu->length]; +- u8 rf_type,path_nums = 0; +- u32 i,j=1,path; +- PADAPTER padapter = rtw_netdev_priv(dev); +- +- pmp_priv = &padapter->mppriv; +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- if ( strncmp(input, "all", 4)==0 ) +- { +- mac_reg_dump(RTW_DBGDUMP, padapter); +- bb_reg_dump(RTW_DBGDUMP, padapter); +- rf_reg_dump(RTW_DBGDUMP, padapter); +- } +- return 0; +-} +- +-static int rtw_mp_phypara(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- +- PADAPTER padapter = rtw_netdev_priv(dev); +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- char input[wrqu->length]; +- u32 valxcap; +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- DBG_871X("%s:iwpriv in=%s\n", __func__, input); +- +- sscanf(input, "xcap=%d", &valxcap); +- +- pHalData->CrystalCap = (u8)valxcap; +- Hal_ProSetCrystalCap( padapter , valxcap ); +- +- sprintf( extra, "Set xcap=%d",valxcap ); +- wrqu->length = strlen(extra) + 1; +- +-return 0; +- +-} +- +-static int rtw_mp_SetRFPath(struct net_device *dev, +- struct iw_request_info *info, +- union iwreq_data *wrqu, char *extra) +-{ +- PADAPTER padapter = rtw_netdev_priv(dev); +- char input[wrqu->data.length]; +- s32 bMain=1,bTurnoff=1; +- +- if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) +- return -EFAULT; +- DBG_871X("%s:iwpriv in=%s\n", __func__, input); +- +- bMain = strncmp(input, "1", 2); // strncmp TRUE is 0 +- bTurnoff = strncmp(input, "0", 3); // strncmp TRUE is 0 +- +- if(bMain==0) +- { +- MP_PHY_SetRFPathSwitch(padapter,_TRUE); +- DBG_871X("%s:PHY_SetRFPathSwitch=TRUE\n", __func__); +- } +- else if(bTurnoff==0) +- { +- MP_PHY_SetRFPathSwitch(padapter,_FALSE); +- DBG_871X("%s:PHY_SetRFPathSwitch=FALSE\n", __func__); +- } +- +- return 0; +-} +- +-static int rtw_mp_QueryDrv(struct net_device *dev, +- struct iw_request_info *info, +- union iwreq_data *wrqu, char *extra) +-{ +- PADAPTER padapter = rtw_netdev_priv(dev); +- char input[wrqu->data.length]; +- s32 qAutoLoad=1; +- +- EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +- +- if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) +- return -EFAULT; +- DBG_871X("%s:iwpriv in=%s\n", __func__, input); +- +- qAutoLoad = strncmp(input, "autoload", 8); // strncmp TRUE is 0 +- +- if(qAutoLoad==0) +- { +- DBG_871X("%s:qAutoLoad\n", __func__); +- +- if(pEEPROM->bautoload_fail_flag) +- sprintf(extra, "fail"); +- else +- sprintf(extra, "ok"); +- } +- wrqu->data.length = strlen(extra) + 1; +- return 0; +-} +- +-/* update Tx AGC offset */ +-static int rtw_mp_antBdiff(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- +- +- // MPT_ProSetTxAGCOffset +- return 0; +-} +- +- +-static int rtw_mp_PwrCtlDM(struct net_device *dev, +- struct iw_request_info *info, +- struct iw_point *wrqu, char *extra) +-{ +- PADAPTER padapter = rtw_netdev_priv(dev); +- u8 input[wrqu->length]; +- int bstart=1; +- +- if (copy_from_user(input, wrqu->pointer, wrqu->length)) +- return -EFAULT; +- +- bstart = strncmp(input, "start", 5); // strncmp TRUE is 0 +- if(bstart==0){ +- sprintf(extra, "PwrCtlDM start \n"); +- MPT_PwrCtlDM(padapter,1); +- }else{ +- sprintf(extra, "PwrCtlDM stop \n"); +- MPT_PwrCtlDM(padapter,0); +- } +- wrqu->length = strlen(extra); +- +- return 0; +-} +- +-static int rtw_mp_getver(struct net_device *dev, +- struct iw_request_info *info, +- union iwreq_data *wrqu, char *extra) +-{ +- PADAPTER padapter = rtw_netdev_priv(dev); +- struct mp_priv *pmp_priv; +- +- pmp_priv = &padapter->mppriv; +- +- if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) +- return -EFAULT; +- +- sprintf(extra, "rtwpriv=%d\n",RTWPRIV_VER_INFO); +- wrqu->data.length = strlen(extra); +- return 0; +-} +- +-#if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) +-/* update Tx AGC offset */ +-static int rtw_mp_SetBT(struct net_device *dev, +- struct iw_request_info *info, +- union iwreq_data *wrqu, char *extra) +-{ +- PADAPTER padapter = rtw_netdev_priv(dev); +- struct hal_ops *pHalFunc = &padapter->HalFunc; +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +- +- BT_REQ_CMD BtReq; +- PMPT_CONTEXT pMptCtx=&(padapter->mppriv.MptCtx); +- PBT_RSP_CMD pBtRsp=(PBT_RSP_CMD)&pMptCtx->mptOutBuf[0]; +- char input[128]; +- char *pch, *ptmp, *token, *tmp[2]={0x00,0x00}; +- u8 setdata[100]; +- u8 resetbt=0x00; +- u8 tempval,BTStatus; +- u8 H2cSetbtmac[6]; +- u8 u1H2CBtMpOperParm[4]={0x01}; +- u16 testmode=1,ready=1,trxparam=1,setgen=1,getgen=1,testctrl=1,testbt=1,readtherm=1,setbtmac=1; +- u32 i=0,ii=0,jj=0,kk=0,cnts=0,status=0; +- PRT_MP_FIRMWARE pBTFirmware = NULL; +- +- if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) +- return -EFAULT; +- if(strlen(extra)<1) return -EFAULT; +- +- DBG_871X("%s:iwpriv in=%s\n", __FUNCTION__, extra); +- ready = strncmp(extra, "ready", 5); +- testmode = strncmp(extra, "testmode", 8); // strncmp TRUE is 0 +- trxparam = strncmp(extra, "trxparam", 8); +- setgen = strncmp(extra, "setgen", 6); +- getgen = strncmp(extra, "getgen", 6); +- testctrl = strncmp(extra, "testctrl", 8); +- testbt = strncmp(extra, "testbt", 6); +- readtherm = strncmp(extra, "readtherm", 9); +- setbtmac = strncmp(extra, "setbtmac", 8); +- +- if ( strncmp(extra, "dlbt", 4) == 0) +- { +- pHalData->LastHMEBoxNum=0; +- padapter->bBTFWReady = _FALSE; +- rtw_write8(padapter, 0xa3, 0x05); +- BTStatus=rtw_read8(padapter, 0xa0); +- DBG_871X("%s: btwmap before read 0xa0 BT Status =0x%x \n", __FUNCTION__,BTStatus); +- if (BTStatus != 0x04) +- { +- sprintf(extra, "BT Status not Active DLFW FAIL\n"); +- goto exit; +- } +- +- tempval = rtw_read8(padapter, 0x6B); +- tempval |= BIT7; +- rtw_write8(padapter, 0x6B, tempval); +- +- // Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay +- // So don't wirte 0x6A[14]=1 and 0x6A[15]=0 together! +- rtw_usleep_os(100); +- // disable BT power cut +- // 0x6A[14] = 0 +- tempval = rtw_read8(padapter, 0x6B); +- tempval &= ~BIT6; +- rtw_write8(padapter, 0x6B, tempval); +- rtw_usleep_os(100); +- MPT_PwrCtlDM(padapter,0); +- rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)| 0x00000004)); +- rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)& 0xFFFFFFEF)); +- rtw_msleep_os(600); +- rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)| 0x00000010)); +- rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)& 0xFFFFFFFB)); +- rtw_msleep_os(1200); +- pBTFirmware = (PRT_MP_FIRMWARE)rtw_zmalloc(sizeof(RT_MP_FIRMWARE)); +- if(pBTFirmware==NULL) +- goto exit; +- padapter->bBTFWReady = _FALSE; +- FirmwareDownloadBT(padapter, pBTFirmware); +- if (pBTFirmware) +- rtw_mfree((u8*)pBTFirmware, sizeof(RT_MP_FIRMWARE)); +- +- DBG_871X("Wait for FirmwareDownloadBT fw boot!\n"); +- rtw_msleep_os(2000); +- _rtw_memset(extra,'\0', wrqu->data.length); +- BtReq.opCodeVer = 1; +- BtReq.OpCode = 0; +- BtReq.paraLength = 0; +- mptbt_BtControlProcess(padapter, &BtReq); +- rtw_msleep_os(100); +- +- DBG_8192C("FirmwareDownloadBT ready = 0x%x 0x%x", pMptCtx->mptOutBuf[4],pMptCtx->mptOutBuf[5]); +- if( (pMptCtx->mptOutBuf[4]==0x00) && (pMptCtx->mptOutBuf[5]==0x00)) +- { +- if(padapter->mppriv.bTxBufCkFail==_TRUE) +- sprintf(extra, "check TxBuf Fail.\n"); +- else +- sprintf(extra, "download FW Fail.\n"); +- } +- else +- { +- sprintf(extra, "download FW OK.\n"); +- goto exit; +- } +- goto exit; +- goto exit; +- } +- if ( strncmp(extra, "dlfw", 4) == 0) +- { +- pHalData->LastHMEBoxNum=0; +- padapter->bBTFWReady = _FALSE; +- rtw_write8(padapter, 0xa3, 0x05); +- BTStatus=rtw_read8(padapter, 0xa0); +- DBG_871X("%s: btwmap before read 0xa0 BT Status =0x%x \n", __FUNCTION__,BTStatus); +- if (BTStatus != 0x04) +- { +- sprintf(extra, "BT Status not Active DLFW FAIL\n"); +- goto exit; +- } +- +- tempval = rtw_read8(padapter, 0x6B); +- tempval |= BIT7; +- rtw_write8(padapter, 0x6B, tempval); +- +- // Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay +- // So don't wirte 0x6A[14]=1 and 0x6A[15]=0 together! +- rtw_usleep_os(100); +- // disable BT power cut +- // 0x6A[14] = 0 +- tempval = rtw_read8(padapter, 0x6B); +- tempval &= ~BIT6; +- rtw_write8(padapter, 0x6B, tempval); +- rtw_usleep_os(100); +- +- MPT_PwrCtlDM(padapter,0); +- rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)| 0x00000004)); +- rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)& 0xFFFFFFEF)); +- rtw_msleep_os(600); +- rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)| 0x00000010)); +- rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)& 0xFFFFFFFB)); +- rtw_msleep_os(1200); +- +-#if defined(CONFIG_PLATFORM_SPRD) && (MP_DRIVER == 1) +- // Pull up BT reset pin. +- DBG_871X("%s: pull up BT reset pin when bt start mp test\n", __FUNCTION__); +- rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON); +-#endif +- DBG_871X(" rtl8723a_FirmwareDownload!\n"); ++static int rtw_mp_sd_iwrite(struct net_device *dev ++ , struct iw_request_info *info ++ , struct iw_point *wrqu ++ , char *extra) ++{ ++ char width; ++ unsigned long addr, data; ++ int ret = 0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ char input[32]; + +-#ifdef CONFIG_RTL8723A +- status = rtl8723a_FirmwareDownload(padapter); +-#elif defined(CONFIG_RTL8723B) +- status = rtl8723b_FirmwareDownload(padapter, _FALSE); +-#endif +- DBG_871X("Wait for FirmwareDownloadBT fw boot!\n"); +- rtw_msleep_os(1000); +-#ifdef CONFIG_BT_COEXIST +- rtw_btcoex_HaltNotify(padapter); +- DBG_871X("SetBT btcoex HaltNotify !\n"); +- //hal_btcoex1ant_SetAntPath(padapter); +- rtw_btcoex_SetManualControl(padapter, _TRUE); +-#endif +- _rtw_memset(extra,'\0', wrqu->data.length); +- BtReq.opCodeVer = 1; +- BtReq.OpCode = 0; +- BtReq.paraLength = 0; +- mptbt_BtControlProcess(padapter, &BtReq); +- rtw_msleep_os(200); +- +- DBG_8192C("FirmwareDownloadBT ready = 0x%x 0x%x", pMptCtx->mptOutBuf[4],pMptCtx->mptOutBuf[5]); +- if( (pMptCtx->mptOutBuf[4]==0x00) && (pMptCtx->mptOutBuf[5]==0x00)) +- { +- if(padapter->mppriv.bTxBufCkFail==_TRUE) +- sprintf(extra, "check TxBuf Fail.\n"); +- else +- sprintf(extra, "download FW Fail.\n"); +- } +- else +- { +- #ifdef CONFIG_BT_COEXIST +- rtw_btcoex_SwitchBtTRxMask(padapter); +- #endif +- rtw_msleep_os(200); +- sprintf(extra, "download FW OK.\n"); +- goto exit; +- } ++ if (wrqu->length > 32) { ++ DBG_871X(FUNC_ADPT_FMT" wrqu->length:%d\n", FUNC_ADPT_ARG(padapter), wrqu->length); ++ ret = -EINVAL; + goto exit; + } + +- if ( strncmp(extra, "down", 4) == 0){ +- DBG_871X("SetBT down for to hal_init !\n"); +-#ifdef CONFIG_BT_COEXIST +- rtw_btcoex_SetManualControl(padapter, _FALSE); +- rtw_btcoex_Initialize(padapter); +-#endif +- pHalFunc->read_adapter_info(padapter); +- pHalFunc->hal_deinit(padapter); +- pHalFunc->hal_init(padapter); +- rtw_pm_set_ips(padapter,IPS_NONE); +- LeaveAllPowerSaveMode(padapter); +- MPT_PwrCtlDM(padapter,0); +- rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)| 0x00000004)); +- rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)& 0xFFFFFFEF)); +- rtw_msleep_os(600); +- //rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a)& 0xFFFFFFFE)); +- rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)| 0x00000010)); +- rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)& 0xFFFFFFFB)); +- rtw_msleep_os(1200); +- goto exit; +- } +- if ( strncmp(extra, "disable", 7) == 0){ +- DBG_871X("SetBT disable !\n"); +- rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a)& 0xFFFFFFFB)); +- rtw_msleep_os(500); +- goto exit; +- } +- if ( strncmp(extra, "enable", 6) == 0){ +- DBG_871X("SetBT enable !\n"); +- rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a)| 0x00000004)); +- rtw_msleep_os(500); +- goto exit; +- } +- if ( strncmp(extra, "h2c", 3) == 0){ +- DBG_871X("SetBT h2c !\n"); +- padapter->bBTFWReady = _TRUE; +- rtw_hal_fill_h2c_cmd(padapter, 0x63, 1, u1H2CBtMpOperParm); +- goto exit; +- } +- if ( strncmp(extra, "2ant", 4) == 0){ +- DBG_871X("Set BT 2ant use!\n"); +- PHY_SetMacReg(padapter,0x67,BIT5,0x1); +- rtw_write32(padapter, 0x948, 0000); +- ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) { ++ DBG_871X(FUNC_ADPT_FMT" copy_from_user fail\n", FUNC_ADPT_ARG(padapter)); ++ ret = -EFAULT; + goto exit; + } +- +- if( ready!=0 && testmode!=0 && trxparam!=0 && setgen!=0 && getgen!=0 && testctrl!=0 && testbt!=0 && readtherm!=0 &&setbtmac!=0) +- return -EFAULT; +- +- if( testbt==0 ) +- { +- BtReq.opCodeVer=1; +- BtReq.OpCode=6; +- BtReq.paraLength=cnts/2; +- goto todo; +- } +- if( ready==0 ) +- { +- BtReq.opCodeVer=1; +- BtReq.OpCode=0; +- BtReq.paraLength=0; +- goto todo; +- } +- +- pch = extra; +- i = 0; +- while ((token = strsep(&pch, ",")) != NULL) +- { +- if (i > 1) break; +- tmp[i] = token; +- i++; +- } +- +- if ((tmp[0]==NULL) && (tmp[1]==NULL)) +- { +- return -EFAULT; +- } +- else +- { +- cnts = strlen(tmp[1]); +- if (cnts<1) return -EFAULT; +- +- DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); +- DBG_871X("%s: data=%s\n", __FUNCTION__, tmp[1]); +- +- for (jj=0, kk=0; jjlength); + +- if(BtReq.paraLength<1) +- goto todo; +- for (i=0; idata.length); + +- if (padapter->bBTFWReady == _FALSE) +- { +- sprintf(extra, "BTFWReady = FALSE.\n"); ++ if (addr > 0x3FFF) { ++ DBG_871X(FUNC_ADPT_FMT" addr:0x%lx\n", FUNC_ADPT_ARG(padapter), addr); ++ ret = -EINVAL; + goto exit; + } + +- mptbt_BtControlProcess(padapter, &BtReq); +- +- if (readtherm == 0) +- { +- sprintf(extra, "BT thermal="); +- for (i=4; imptOutLen; i++) +- { +- if ((pMptCtx->mptOutBuf[i]==0x00) && (pMptCtx->mptOutBuf[i+1]==0x00)) +- goto exit; ++ if (DBG_MP_SDIO_INDIRECT_ACCESS) ++ DBG_871X(FUNC_ADPT_FMT" width:%u, addr:0x%lx, data:0x%lx\n", FUNC_ADPT_ARG(padapter), width, addr, data); + +-#ifdef CONFIG_RTL8723A +- sprintf(extra, "%s %d ", extra, (pMptCtx->mptOutBuf[i]& 0x3f)); +-#else +- sprintf(extra, "%s %d ", extra, (pMptCtx->mptOutBuf[i]& 0x1f)); +-#endif ++ switch (width) { ++ case 1: ++ if (data > 0xFF) { ++ ret = -EINVAL; ++ break; + } +- } +- else +- { +- for (i=4; imptOutLen; i++) +- { +- sprintf(extra, "%s 0x%x ", extra, pMptCtx->mptOutBuf[i]); ++ rtw_sd_iwrite8(padapter, addr, data); ++ break; ++ case 2: ++ if (data > 0xFFFF) { ++ ret = -EINVAL; ++ break; + } ++ rtw_sd_iwrite16(padapter, addr, data); ++ break; ++ case 4: ++ rtw_sd_iwrite32(padapter, addr, data); ++ break; ++ default: ++ wrqu->length = 0; ++ ret = -EINVAL; ++ break; + } +- +-exit: +- wrqu->data.length = strlen(extra) + 1; +- DBG_871X("-%s: output len=%d data=%s\n", __FUNCTION__, wrqu->data.length, extra); + +- return status; ++exit: ++ return ret; + } +- +-#endif //#ifdef CONFIG_RTL8723A ++#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ + + static int rtw_mp_set(struct net_device *dev, + struct iw_request_info *info, +@@ -12924,10 +11197,9 @@ static int rtw_mp_set(struct net_device *dev, + return -ENETDOWN; + } + +- if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) +- { +- DBG_871X("%s fail =>(padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE) \n",__FUNCTION__); +- return -ENETDOWN; ++ if (RTW_CANNOT_RUN(padapter)) { ++ DBG_871X("%s fail =>(bSurpriseRemoved == _TRUE) || ( bDriverStopped == _TRUE)\n", __func__); ++ return -ENETDOWN; + } + + +@@ -12974,13 +11246,18 @@ static int rtw_mp_set(struct net_device *dev, + break; + #ifdef CONFIG_WOWLAN + case MP_WOW_ENABLE: +- DBG_871X("set case MP_WOW_ENABLE: %s \n", extra); ++ DBG_871X("set case MP_WOW_ENABLE: %s\n", extra); ++ + rtw_wowlan_ctrl(dev, info, wdata, extra); + break; ++ case MP_WOW_SET_PATTERN: ++ DBG_871X("set case MP_WOW_SET_PATTERN: %s\n", extra); ++ rtw_wowlan_set_pattern(dev, info, wdata, extra); ++ break; + #endif + #ifdef CONFIG_AP_WOWLAN + case MP_AP_WOW_ENABLE: +- DBG_871X("set case MP_AP_WOW_ENABLE: %s \n", extra); ++ DBG_871X("set case MP_AP_WOW_ENABLE: %s\n", extra); + rtw_ap_wowlan_ctrl(dev, info, wdata, extra); + break; + #endif +@@ -13011,139 +11288,166 @@ static int rtw_mp_get(struct net_device *dev, + return -ENETDOWN; + } + +- if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) +- { +- DBG_871X("%s fail =>(padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE) \n",__FUNCTION__); +- return -ENETDOWN; ++ if (RTW_CANNOT_RUN(padapter)) { ++ DBG_871X("%s fail =>(padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)\n", __func__); ++ return -ENETDOWN; + } + +- if (extra == NULL) +- { ++ if (extra == NULL) { + wrqu->length = 0; + return -EIO; + } + +- switch(subcmd) +- { +- case WRITE_REG : +- rtw_mp_write_reg (dev,info,wrqu,extra); ++ switch (subcmd) { ++ case WRITE_REG: ++ rtw_mp_write_reg(dev, info, wrqu, extra); + break; + + case WRITE_RF: +- rtw_mp_write_rf (dev,info,wrqu,extra); ++ rtw_mp_write_rf(dev, info, wrqu, extra); + break; + + case MP_PHYPARA: +- DBG_871X("mp_get MP_PHYPARA \n"); +- rtw_mp_phypara(dev,info,wrqu,extra); ++ DBG_871X("mp_get MP_PHYPARA\n"); ++ rtw_mp_phypara(dev, info, wrqu, extra); + break; + + case MP_CHANNEL: +- DBG_871X("set case mp_channel \n"); +- rtw_mp_channel (dev,info,wrqu,extra); ++ DBG_871X("set case mp_channel\n"); ++ rtw_mp_channel(dev , info, wrqu, extra); + break; + + case READ_REG: +- DBG_871X("mp_get READ_REG \n"); +- rtw_mp_read_reg (dev,info,wrqu,extra); ++ DBG_871X("mp_get READ_REG\n"); ++ rtw_mp_read_reg(dev, info, wrqu, extra); + break; + case READ_RF: +- DBG_871X("mp_get READ_RF \n"); +- rtw_mp_read_rf (dev,info,wrqu,extra); ++ DBG_871X("mp_get READ_RF\n"); ++ rtw_mp_read_rf(dev, info, wrqu, extra); + break; + + case MP_RATE: +- DBG_871X("set case mp_rate \n"); +- rtw_mp_rate (dev,info,wrqu,extra); ++ DBG_871X("set case mp_rate\n"); ++ rtw_mp_rate(dev, info, wrqu, extra); + break; + + case MP_TXPOWER: +- DBG_871X("set case MP_TXPOWER \n"); +- rtw_mp_txpower (dev,info,wrqu,extra); ++ DBG_871X("set case MP_TXPOWER\n"); ++ rtw_mp_txpower(dev, info, wrqu, extra); + break; + + case MP_ANT_TX: +- DBG_871X("set case MP_ANT_TX \n"); +- rtw_mp_ant_tx (dev,info,wrqu,extra); ++ DBG_871X("set case MP_ANT_TX\n"); ++ rtw_mp_ant_tx(dev, info, wrqu, extra); + break; + + case MP_ANT_RX: +- DBG_871X("set case MP_ANT_RX \n"); +- rtw_mp_ant_rx (dev,info,wrqu,extra); ++ DBG_871X("set case MP_ANT_RX\n"); ++ rtw_mp_ant_rx(dev, info, wrqu, extra); + break; + + case MP_QUERY: +- //DBG_871X("mp_get mp_query MP_QUERY \n"); +- rtw_mp_trx_query(dev,info,wrqu,extra); ++ rtw_mp_trx_query(dev, info, wrqu, extra); + break; + + case MP_CTX: +- DBG_871X("set case MP_CTX \n"); +- rtw_mp_ctx (dev,info,wrqu,extra); ++ DBG_871X("set case MP_CTX\n"); ++ rtw_mp_ctx(dev, info, wrqu, extra); + break; +- ++ + case MP_ARX: +- DBG_871X("set case MP_ARX \n"); +- rtw_mp_arx (dev,info,wrqu,extra); ++ DBG_871X("set case MP_ARX\n"); ++ rtw_mp_arx(dev, info, wrqu, extra); + break; + + case EFUSE_GET: +- DBG_871X("efuse get EFUSE_GET \n"); +- rtw_mp_efuse_get(dev,info,wdata,extra); ++ DBG_871X("efuse get EFUSE_GET\n"); ++ rtw_mp_efuse_get(dev, info, wdata, extra); + break; + + case MP_DUMP: +- DBG_871X("set case MP_DUMP \n"); +- rtw_mp_dump (dev,info,wrqu,extra); ++ DBG_871X("set case MP_DUMP\n"); ++ rtw_mp_dump(dev, info, wrqu, extra); + break; + case MP_PSD: +- DBG_871X("set case MP_PSD \n"); +- rtw_mp_psd (dev,info,wrqu,extra); ++ DBG_871X("set case MP_PSD\n"); ++ rtw_mp_psd(dev, info, wrqu, extra); + break; + case MP_THER: +- DBG_871X("set case MP_THER \n"); +- rtw_mp_thermal (dev,info,wrqu,extra); ++ DBG_871X("set case MP_THER\n"); ++ rtw_mp_thermal(dev, info, wrqu, extra); + break; + case MP_PwrCtlDM: + DBG_871X("set MP_PwrCtlDM\n"); +- rtw_mp_PwrCtlDM (dev,info,wrqu,extra); ++ rtw_mp_PwrCtlDM(dev, info, wrqu, extra); + break; + case MP_QueryDrvStats: +- DBG_871X("mp_get MP_QueryDrvStats \n"); +- rtw_mp_QueryDrv(dev,info,wdata,extra); ++ DBG_871X("mp_get MP_QueryDrvStats\n"); ++ rtw_mp_QueryDrv(dev, info, wdata, extra); + break; +- case MP_PWRTRK: +- DBG_871X("set case MP_PWRTRK \n"); +- rtw_mp_pwrtrk(dev,info,wrqu,extra); ++ case MP_PWRTRK: ++ DBG_871X("set case MP_PWRTRK\n"); ++ rtw_mp_pwrtrk(dev, info, wrqu, extra); + break; + case EFUSE_SET: +- DBG_871X("set case efuse set \n"); +- rtw_mp_efuse_set(dev,info,wdata,extra); ++ DBG_871X("set case efuse set\n"); ++ rtw_mp_efuse_set(dev, info, wdata, extra); + break; + case MP_GET_TXPOWER_INX: +- DBG_871X("mp_get MP_GET_TXPOWER_INX \n"); +- rtw_mp_txpower_index(dev,info,wrqu,extra); +- break; ++ DBG_871X("mp_get MP_GET_TXPOWER_INX\n"); ++ rtw_mp_txpower_index(dev, info, wrqu, extra); ++ break; + case MP_GETVER: +- DBG_871X("mp_get MP_GETVER \n"); +- rtw_mp_getver(dev,info,wdata,extra); ++ DBG_871X("mp_get MP_GETVER\n"); ++ rtw_mp_getver(dev, info, wdata, extra); + break; +-#if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) ++ case MP_MON: ++ DBG_871X("mp_get MP_MON\n"); ++ rtw_mp_mon(dev, info, wdata, extra); ++ break; ++ case EFUSE_MASK: ++ DBG_871X("mp_get EFUSE_MASK\n"); ++ rtw_efuse_mask_file(dev, info, wdata, extra); ++ break; ++ case EFUSE_FILE: ++ DBG_871X("mp_get EFUSE_FILE\n"); ++ rtw_efuse_file_map(dev, info, wdata, extra); ++ break; ++ case MP_TX: ++ DBG_871X("mp_get MP_TX\n"); ++ rtw_mp_tx(dev, info, wdata, extra); ++ break; ++ case MP_RX: ++ DBG_871X("mp_get MP_RX\n"); ++ rtw_mp_rx(dev, info, wdata, extra); ++ break; ++ case MP_HW_TX_MODE: ++ DBG_871X("mp_get MP_HW_TX_MODE\n"); ++ rtw_mp_hwtx(dev, info, wdata, extra); ++ break; ++#if defined(CONFIG_RTL8723B) + case MP_SetBT: +- DBG_871X("set MP_SetBT \n"); +- rtw_mp_SetBT(dev,info,wdata,extra); ++ DBG_871X("set MP_SetBT\n"); ++ rtw_mp_SetBT(dev, info, wdata, extra); + break; + #endif +- ++#ifdef CONFIG_SDIO_INDIRECT_ACCESS ++ case MP_SD_IREAD: ++ rtw_mp_sd_iread(dev, info, wrqu, extra); ++ break; ++ case MP_SD_IWRITE: ++ rtw_mp_sd_iwrite(dev, info, wrqu, extra); ++ break; ++#endif + } + + rtw_msleep_os(10); //delay 5ms for sending pkt before exit adb shell operation + return 0; + } + +-#endif //#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) ++#endif /*#if defined(CONFIG_MP_INCLUDED)*/ + +-static int rtw_wfd_tdls_enable(struct net_device *dev, ++static int rtw_wx_tdls_wfd_enable(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) + { +@@ -13154,19 +11458,15 @@ static int rtw_wfd_tdls_enable(struct net_device *dev, + + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + +- printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); + + if ( extra[ 0 ] == '0' ) +- { +- padapter->wdinfo.wfd_tdls_enable = 0; +- } ++ rtw_tdls_wfd_enable(padapter, 0); + else +- { +- padapter->wdinfo.wfd_tdls_enable = 1; +- } ++ rtw_tdls_wfd_enable(padapter, 1); + +-#endif //CONFIG_WFD +-#endif //CONFIG_TDLS ++#endif /* CONFIG_WFD */ ++#endif /* CONFIG_TDLS */ + + return ret; + } +@@ -13185,14 +11485,11 @@ static int rtw_tdls_weaksec(struct net_device *dev, + DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); + + if ( extra[ 0 ] == '0' ) +- { + padapter->wdinfo.wfd_tdls_weaksec = 0; +- } + else +- { + padapter->wdinfo.wfd_tdls_weaksec = 1; +- } +-#endif ++ ++#endif /* CONFIG_TDLS */ + + return ret; + } +@@ -13217,56 +11514,48 @@ static int rtw_tdls_enable(struct net_device *dev, + u8 empty_hwaddr[ETH_ALEN] = { 0x00 }; + struct tdls_txmgmt txmgmt; + +- printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); + + _rtw_memset(tdls_sta, 0x00, sizeof(tdls_sta)); + _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); + +- if ( extra[ 0 ] == '0' ) +- { ++ if (extra[ 0 ] == '0') { + ptdlsinfo->tdls_enable = 0; + + if(pstapriv->asoc_sta_count==1) + return ret; + + _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); +- for(index=0; index< NUM_STA; index++) +- { ++ for (index=0; index< NUM_STA; index++) { + phead = &(pstapriv->sta_hash[index]); + plist = get_next(phead); + +- while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) +- { ++ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { + psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list); + + plist = get_next(plist); + +- if(psta->tdls_sta_state != TDLS_STATE_NONE) +- { ++ if (psta->tdls_sta_state != TDLS_STATE_NONE) { + _rtw_memcpy(tdls_sta[index], psta->hwaddr, ETH_ALEN); + } + } + } + _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); + +- for(index=0; index< NUM_STA; index++) +- { +- if( !_rtw_memcmp(tdls_sta[index], empty_hwaddr, ETH_ALEN) ) +- { +- printk("issue tear down to "MAC_FMT"\n", MAC_ARG(tdls_sta[index])); ++ for (index=0; index< NUM_STA; index++) { ++ if (!_rtw_memcmp(tdls_sta[index], empty_hwaddr, ETH_ALEN)) { ++ DBG_871X("issue tear down to "MAC_FMT"\n", MAC_ARG(tdls_sta[index])); + txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; + _rtw_memcpy(txmgmt.peer, tdls_sta[index], ETH_ALEN); +- issue_tdls_teardown(padapter, &txmgmt, _FALSE); ++ issue_tdls_teardown(padapter, &txmgmt, _TRUE); + } + } +- rtw_tdls_cmd(padapter, myid(&(padapter->eeprompriv)), TDLS_RS_RCR); ++ rtw_tdls_cmd(padapter, NULL, TDLS_RS_RCR); + rtw_reset_tdls_info(padapter); +- } +- else if ( extra[ 0 ] == '1' ) +- { ++ } else if (extra[0] == '1') { + ptdlsinfo->tdls_enable = 1; + } +-#endif //CONFIG_TDLS ++#endif /* CONFIG_TDLS */ + + return ret; + } +@@ -13282,13 +11571,12 @@ static int rtw_tdls_setup(struct net_device *dev, + struct tdls_txmgmt txmgmt; + #ifdef CONFIG_WFD + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); +-#endif // CONFIG_WFD ++#endif /* CONFIG_WFD */ + +- printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ DBG_871X("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1); + +- if(wrqu->data.length - 1 != 17 ) +- { +- printk( "[%s] length:%d != 17\n", __FUNCTION__, (wrqu->data.length -1) ); ++ if (wrqu->data.length - 1 != 17) { ++ DBG_871X("[%s] length:%d != 17\n", __FUNCTION__, (wrqu->data.length -1)); + return ret; + } + +@@ -13298,128 +11586,291 @@ static int rtw_tdls_setup(struct net_device *dev, + } + + #ifdef CONFIG_WFD +- if ( _AES_ != padapter->securitypriv.dot11PrivacyAlgrthm ) +- { +- // Weak Security situation with AP. +- if ( 0 == pwdinfo->wfd_tdls_weaksec ) +- { +- // Can't send the tdls setup request out!! +- DBG_871X( "[%s] Current link is not AES, SKIP sending the tdls setup request!!\n", __FUNCTION__ ); +- } +- else +- { ++ if (_AES_ != padapter->securitypriv.dot11PrivacyAlgrthm) { ++ /* Weak Security situation with AP. */ ++ if (0 == pwdinfo->wfd_tdls_weaksec) { ++ /* Can't send the tdls setup request out!! */ ++ DBG_871X("[%s] Current link is not AES, " ++ "SKIP sending the tdls setup request!!\n", __FUNCTION__); ++ } else { + issue_tdls_setup_req(padapter, &txmgmt, _TRUE); + } +- } +- else +-#endif // CONFIG_WFD ++ } else ++#endif /* CONFIG_WFD */ + { + issue_tdls_setup_req(padapter, &txmgmt, _TRUE); + } +-#endif ++#endif /* CONFIG_TDLS */ ++ ++ return ret; ++} ++ ++static int rtw_tdls_teardown(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ u8 i,j; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct sta_info *ptdls_sta = NULL; ++ struct tdls_txmgmt txmgmt; ++ ++ DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ if (wrqu->data.length - 1 != 17 && wrqu->data.length - 1 != 19) { ++ DBG_871X("[%s] length:%d != 17 or 19\n", ++ __FUNCTION__, (wrqu->data.length -1)); ++ return ret; ++ } ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ for (i=0, j=0; i < ETH_ALEN; i++, j+=3) ++ txmgmt.peer[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), txmgmt.peer); ++ ++ if (ptdls_sta != NULL) { ++ txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; ++ if (wrqu->data.length - 1 == 19) ++ issue_tdls_teardown(padapter, &txmgmt, _FALSE); ++ else ++ issue_tdls_teardown(padapter, &txmgmt, _TRUE); ++ } else { ++ DBG_871X( "TDLS peer not found\n"); ++ } ++#endif /* CONFIG_TDLS */ ++ ++ return ret; ++} ++ ++static int rtw_tdls_discovery(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_txmgmt txmgmt; ++ int i = 0, j=0; ++ ++ DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ txmgmt.peer[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ issue_tdls_dis_req(padapter, &txmgmt); ++ ++#endif /* CONFIG_TDLS */ ++ ++ return ret; ++} ++ ++static int rtw_tdls_ch_switch(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ u8 i, j; ++ struct sta_info *ptdls_sta = NULL; ++ u8 take_care_iqk; ++ ++ DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) ++ { ++ DBG_871X("TDLS channel switch is not allowed\n"); ++ return ret; ++ } ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ pchsw_info->addr[i] = key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pchsw_info->addr); ++ if( ptdls_sta == NULL ) ++ return ret; ++ ++ pchsw_info->ch_sw_state |= TDLS_CH_SW_INITIATOR_STATE; ++ ++ if (ptdls_sta != NULL) { ++ if (pchsw_info->off_ch_num == 0) ++ pchsw_info->off_ch_num = 11; ++ }else { ++ DBG_871X( "TDLS peer not found\n"); ++ } ++ ++ rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk); ++ if (take_care_iqk == _TRUE) { ++ u8 central_chnl; ++ u8 bw_mode; ++ ++ bw_mode = (pchsw_info->ch_offset) ? CHANNEL_WIDTH_40 : CHANNEL_WIDTH_20; ++ central_chnl = rtw_get_center_ch(pchsw_info->off_ch_num, bw_mode, pchsw_info->ch_offset); ++ if (rtw_hal_ch_sw_iqk_info_search(padapter, central_chnl, bw_mode) >= 0) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_START); ++ else ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_PREPARE); ++ } else ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_START); + ++ //issue_tdls_ch_switch_req(padapter, ptdls_sta); ++ /* DBG_871X("issue tdls ch switch req\n"); */ ++ ++#endif /* CONFIG_TDLS_CH_SW */ ++#endif /* CONFIG_TDLS */ ++ + return ret; + } + +-static int rtw_tdls_teardown(struct net_device *dev, ++static int rtw_tdls_ch_switch_off(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) + { + int ret = 0; + + #ifdef CONFIG_TDLS +- +- u8 i,j; ++#ifdef CONFIG_TDLS_CH_SW ++ + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; ++ u8 i, j, mac_addr[ETH_ALEN]; + struct sta_info *ptdls_sta = NULL; + struct tdls_txmgmt txmgmt; + ++ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ++ + DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); + +- if(wrqu->data.length - 1 != 17 && wrqu->data.length - 1 != 19) ++ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) + { +- printk( "[%s] length:%d != 17 or 19\n", __FUNCTION__, (wrqu->data.length -1) ); ++ DBG_871X("TDLS channel switch is not allowed\n"); + return ret; + } + +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ +- txmgmt.peer[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ if (wrqu->data.length >= 17) { ++ for (i=0, j=0 ; i < ETH_ALEN; i++, j+=3) ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); + } + +- ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), txmgmt.peer); +- +- if(ptdls_sta != NULL) +- { +- txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; +- if(wrqu->data.length - 1 == 17) +- issue_tdls_teardown(padapter, &txmgmt, _FALSE); +- else if(wrqu->data.length - 1 == 19) +- issue_tdls_teardown(padapter, &txmgmt, _TRUE); +- } +- else +- DBG_871X( "TDLS peer not found\n"); +-#endif //CONFIG_TDLS +- ++ if (ptdls_sta == NULL) ++ return ret; ++ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_END_TO_BASE_CHNL); ++ ++ pchsw_info->ch_sw_state &= ~(TDLS_CH_SW_INITIATOR_STATE | ++ TDLS_CH_SWITCH_ON_STATE | ++ TDLS_PEER_AT_OFF_STATE); ++ _rtw_memset(pchsw_info->addr, 0x00, ETH_ALEN); ++ ++ ptdls_sta->ch_switch_time = 0; ++ ptdls_sta->ch_switch_timeout = 0; ++ _cancel_timer_ex(&ptdls_sta->ch_sw_timer); ++ _cancel_timer_ex(&ptdls_sta->delay_timer); ++ _cancel_timer_ex(&ptdls_sta->stay_on_base_chnl_timer); ++ _cancel_timer_ex(&ptdls_sta->ch_sw_monitor_timer); ++ ++ rtw_pm_set_lps(padapter, PS_MODE_MAX); ++#endif /* CONFIG_TDLS_CH_SW */ ++#endif /* CONFIG_TDLS */ ++ + return ret; + } + +-static int rtw_tdls_discovery(struct net_device *dev, ++static int rtw_tdls_dump_ch(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) + { + int ret = 0; + + #ifdef CONFIG_TDLS +- ++#ifdef CONFIG_TDLS_CH_SW + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +- struct tdls_txmgmt txmgmt; +- int i = 0, j=0; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; + +- DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ DBG_8192C("[%s] dump_stack:%s\n", __FUNCTION__, extra); + +- _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); +- for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ +- txmgmt.peer[i]=key_2char2num(*(extra+j), *(extra+j+1)); +- } ++ extra[ wrqu->data.length ] = 0x00; ++ ptdlsinfo->chsw_info.dump_stack = rtw_atoi( extra ); + +- issue_tdls_dis_req(padapter, &txmgmt); ++ return ret; + +-#endif //CONFIG_TDLS ++#endif ++#endif /* CONFIG_TDLS */ + + return ret; + } + +-static int rtw_tdls_ch_switch(struct net_device *dev, ++static int rtw_tdls_off_ch_num(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) + { + int ret = 0; + + #ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ DBG_8192C("[%s] off_ch_num:%s\n", __FUNCTION__, extra); ++ ++ extra[ wrqu->data.length ] = 0x00; ++ ptdlsinfo->chsw_info.off_ch_num = rtw_atoi(extra); ++ ++ return ret; + ++#endif ++#endif /* CONFIG_TDLS */ ++ ++ return ret; ++} ++ ++static int rtw_tdls_ch_offset(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_CH_SW + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- u8 i, j, mac_addr[ETH_ALEN]; +- struct sta_info *ptdls_sta = NULL; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; + +- DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ DBG_8192C("[%s] ch_offset:%s\n", __FUNCTION__, extra); + +- for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ +- mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); +- } ++ extra[ wrqu->data.length ] = 0x00; ++ switch (rtw_atoi(extra)) { ++ case SCA: ++ ptdlsinfo->chsw_info.ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; + +- ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); +- if( ptdls_sta == NULL ) +- return ret; ++ case SCB: ++ ptdlsinfo->chsw_info.ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; + +-// ptdlsinfo->ch_sensing=1; ++ default: ++ ptdlsinfo->chsw_info.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } + +-// rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_INIT_CH_SEN); ++ return ret; + +-#endif //CONFIG_TDLS ++#endif ++#endif /* CONFIG_TDLS */ + + return ret; + } +@@ -13433,22 +11884,19 @@ static int rtw_tdls_pson(struct net_device *dev, + #ifdef CONFIG_TDLS + + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u8 i, j, mac_addr[ETH_ALEN]; + struct sta_info *ptdls_sta = NULL; + + DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); + +- for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ for (i=0, j=0; i < ETH_ALEN; i++, j+=3) + mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); +- } + + ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); + + issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 1, 3, 500); + +-#endif //CONFIG_TDLS ++#endif /* CONFIG_TDLS */ + + return ret; + } +@@ -13462,25 +11910,20 @@ static int rtw_tdls_psoff(struct net_device *dev, + #ifdef CONFIG_TDLS + + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); +- struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u8 i, j, mac_addr[ETH_ALEN]; + struct sta_info *ptdls_sta = NULL; + + DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); + +- for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ for (i=0, j=0; i < ETH_ALEN; i++, j+=3) + mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); +- } + + ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); + + if(ptdls_sta) +- { +- //issue_tdls_peer_traffic_rsp(padapter, ptdls_sta); + issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 0, 3, 500); +- } +-#endif //CONFIG_TDLS ++ ++#endif /* CONFIG_TDLS */ + + return ret; + } +@@ -13497,17 +11940,13 @@ static int rtw_tdls_setip(struct net_device *dev, + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; + struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; +- u8 i=0, j=0, k=0, tag=0, ip[3] = { 0xff }, *ptr = extra; +- +- printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1 ); ++ u8 i=0, j=0, k=0, tag=0; + ++ DBG_871X("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); + +- while( i < 4 ) +- { +- for( j=0; j < 4; j++) +- { +- if( *( extra + j + tag ) == '.' || *( extra + j + tag ) == '\0' ) +- { ++ while (i < 4) { ++ for (j=0; j < 4; j++) { ++ if (*( extra + j + tag ) == '.' || *( extra + j + tag ) == '\0') { + if( j == 1 ) + pwfd_info->ip_address[i]=convert_ip_addr( '0', '0', *(extra+(j-1)+tag)); + if( j == 2 ) +@@ -13522,13 +11961,14 @@ static int rtw_tdls_setip(struct net_device *dev, + i++; + } + +- printk( "[%s] Set IP = %u.%u.%u.%u \n", __FUNCTION__, +- ptdlsinfo->wfd_info->ip_address[0], ptdlsinfo->wfd_info->ip_address[1], +- ptdlsinfo->wfd_info->ip_address[2], ptdlsinfo->wfd_info->ip_address[3] +- ); ++ DBG_871X( "[%s] Set IP = %u.%u.%u.%u \n", __FUNCTION__, ++ ptdlsinfo->wfd_info->ip_address[0], ++ ptdlsinfo->wfd_info->ip_address[1], ++ ptdlsinfo->wfd_info->ip_address[2], ++ ptdlsinfo->wfd_info->ip_address[3]); + +-#endif //CONFIG_WFD +-#endif //CONFIG_TDLS ++#endif /* CONFIG_WFD */ ++#endif /* CONFIG_TDLS */ + + return ret; + } +@@ -13546,22 +11986,20 @@ static int rtw_tdls_getip(struct net_device *dev, + struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; + struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; + +- printk( "[%s]\n", __FUNCTION__); ++ DBG_871X( "[%s]\n", __FUNCTION__); + + sprintf( extra, "\n\n%u.%u.%u.%u\n", + pwfd_info->peer_ip_address[0], pwfd_info->peer_ip_address[1], +- pwfd_info->peer_ip_address[2], pwfd_info->peer_ip_address[3] +- ); ++ pwfd_info->peer_ip_address[2], pwfd_info->peer_ip_address[3]); + +- printk( "[%s] IP=%u.%u.%u.%u\n", __FUNCTION__, ++ DBG_871X( "[%s] IP=%u.%u.%u.%u\n", __FUNCTION__, + pwfd_info->peer_ip_address[0], pwfd_info->peer_ip_address[1], +- pwfd_info->peer_ip_address[2], pwfd_info->peer_ip_address[3] +- ); ++ pwfd_info->peer_ip_address[2], pwfd_info->peer_ip_address[3]); + + wrqu->data.length = strlen( extra ); + +-#endif //CONFIG_WFD +-#endif //CONFIG_TDLS ++#endif /* CONFIG_WFD */ ++#endif /* CONFIG_TDLS */ + + return ret; + } +@@ -13580,21 +12018,22 @@ static int rtw_tdls_getport(struct net_device *dev, + struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; + struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; + +- printk( "[%s]\n", __FUNCTION__); ++ DBG_871X( "[%s]\n", __FUNCTION__); + + sprintf( extra, "\n\n%d\n", pwfd_info->peer_rtsp_ctrlport ); +- printk( "[%s] remote port = %d\n", __FUNCTION__, pwfd_info->peer_rtsp_ctrlport ); ++ DBG_871X( "[%s] remote port = %d\n", ++ __FUNCTION__, pwfd_info->peer_rtsp_ctrlport ); + + wrqu->data.length = strlen( extra ); + +-#endif //CONFIG_WFD +-#endif //CONFIG_TDLS ++#endif /* CONFIG_WFD */ ++#endif /* CONFIG_TDLS */ + + return ret; + + } + +-//WFDTDLS, for sigma test ++/* WFDTDLS, for sigma test */ + static int rtw_tdls_dis_result(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +@@ -13607,26 +12046,24 @@ static int rtw_tdls_dis_result(struct net_device *dev, + + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; +- struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; + +- printk( "[%s]\n", __FUNCTION__); ++ DBG_871X( "[%s]\n", __FUNCTION__); + +- if(ptdlsinfo->dev_discovered == 1 ) +- { ++ if (ptdlsinfo->dev_discovered == _TRUE) { + sprintf( extra, "\n\nDis=1\n" ); +- ptdlsinfo->dev_discovered = 0; ++ ptdlsinfo->dev_discovered = _FALSE; + } + + wrqu->data.length = strlen( extra ); + +-#endif //CONFIG_WFD +-#endif //CONFIG_TDLS ++#endif /* CONFIG_WFD */ ++#endif /* CONFIG_TDLS */ + + return ret; + + } + +-//WFDTDLS, for sigma test ++/* WFDTDLS, for sigma test */ + static int rtw_wfd_tdls_status(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +@@ -13639,20 +12076,39 @@ static int rtw_wfd_tdls_status(struct net_device *dev, + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; + +- printk( "[%s]\n", __FUNCTION__); ++ DBG_871X("[%s]\n", __FUNCTION__); + +- sprintf( extra, "\nlink_established:0x%08x \n" ++ sprintf( extra, "\nlink_established:%d \n" + "sta_cnt:%d \n" + "sta_maximum:%d \n" + "cur_channel:%d \n" +- "tdls_enable:%d", +- ptdlsinfo->link_established, ptdlsinfo->sta_cnt, ptdlsinfo->sta_maximum, +- ptdlsinfo->cur_channel, ptdlsinfo->tdls_enable +- ); ++ "tdls_enable:%d" ++#ifdef CONFIG_TDLS_CH_SW ++ "ch_sw_state:%08x\n" ++ "chsw_on:%d\n" ++ "off_ch_num:%d\n" ++ "cur_time:%d\n" ++ "ch_offset:%d\n" ++ "delay_swtich_back:%d" ++#endif ++ , ++ ptdlsinfo->link_established, ptdlsinfo->sta_cnt, ++ ptdlsinfo->sta_maximum, ptdlsinfo->cur_channel, ++ ptdlsinfo->tdls_enable ++#ifdef CONFIG_TDLS_CH_SW ++, ++ ptdlsinfo->chsw_info.ch_sw_state, ++ ATOMIC_READ(&padapter->tdlsinfo.chsw_info.chsw_on), ++ ptdlsinfo->chsw_info.off_ch_num, ++ ptdlsinfo->chsw_info.cur_time, ++ ptdlsinfo->chsw_info.ch_offset, ++ ptdlsinfo->chsw_info.delay_switch_back ++#endif ++); + + wrqu->data.length = strlen( extra ); + +-#endif //CONFIG_TDLS ++#endif /* CONFIG_TDLS */ + + return ret; + +@@ -13671,68 +12127,102 @@ static int rtw_tdls_getsta(struct net_device *dev, + char charmac[17]; + struct sta_info *ptdls_sta = NULL; + +- printk( "[%s] %s %d\n", __FUNCTION__, (char *)wrqu->data.pointer, wrqu->data.length -1 ); ++ DBG_871X("[%s] %s %d\n", __FUNCTION__, ++ (char *)wrqu->data.pointer, wrqu->data.length -1); + + if(copy_from_user(charmac, wrqu->data.pointer+9, 17)){ + ret = -EFAULT; + goto exit; + } + +- printk("[%s] %d, charmac:%s\n", __FUNCTION__, __LINE__, charmac); +- for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ DBG_871X("[%s] %d, charmac:%s\n", __FUNCTION__, __LINE__, charmac); ++ for (i=0, j=0 ; i < ETH_ALEN; i++, j+=3) + addr[i]=key_2char2num(*(charmac+j), *(charmac+j+1)); +- } + +- printk("[%s] %d, charmac:%s, addr:"MAC_FMT"\n", __FUNCTION__, __LINE__, charmac, MAC_ARG(addr)); ++ DBG_871X("[%s] %d, charmac:%s, addr:"MAC_FMT"\n", ++ __FUNCTION__, __LINE__, charmac, MAC_ARG(addr)); + ptdls_sta = rtw_get_stainfo(&padapter->stapriv, addr); + if(ptdls_sta) { +- sprintf(extra, "\n\ntdls_sta_state=%d\n", ptdls_sta->tdls_sta_state); +- printk("\n\ntdls_sta_state=%d\n", ptdls_sta->tdls_sta_state); +- } +- else { ++ sprintf(extra, "\n\ntdls_sta_state=0x%08x\n", ptdls_sta->tdls_sta_state); ++ DBG_871X("\n\ntdls_sta_state=%d\n", ptdls_sta->tdls_sta_state); ++ } else { + sprintf(extra, "\n\nNot found this sta\n"); +- printk("\n\nNot found this sta\n"); ++ DBG_871X("\n\nNot found this sta\n"); + } + wrqu->data.length = strlen( extra ); + +-#endif //CONFIG_TDLS ++#endif /* CONFIG_TDLS */ + exit: + return ret; + + } + +-static int rtw_tdls_ch_switch_off(struct net_device *dev, ++static int rtw_tdls_get_best_ch(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) + { +- int ret = 0; +- +-#ifdef CONFIG_TDLS +- ++#ifdef CONFIG_FIND_BEST_CHANNEL + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- u8 i, j, mac_addr[ETH_ALEN]; +- struct sta_info *ptdls_sta = NULL; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0; ++ ++ for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) { ++ if (pmlmeext->channel_set[i].ChannelNum == 1) ++ index_24G = i; ++ if (pmlmeext->channel_set[i].ChannelNum == 36) ++ index_5G = i; ++ } ++ ++ for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) { ++ /* 2.4G */ ++ if (pmlmeext->channel_set[i].ChannelNum == 6 || pmlmeext->channel_set[i].ChannelNum == 11) { ++ if (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_24G].rx_count) { ++ index_24G = i; ++ best_channel_24G = pmlmeext->channel_set[i].ChannelNum; ++ } ++ } ++ ++ /* 5G */ ++ if (pmlmeext->channel_set[i].ChannelNum >= 36 ++ && pmlmeext->channel_set[i].ChannelNum < 140) { ++ /* Find primary channel */ ++ if (((pmlmeext->channel_set[i].ChannelNum - 36) % 8 == 0) ++ && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count)) { ++ index_5G = i; ++ best_channel_5G = pmlmeext->channel_set[i].ChannelNum; ++ } ++ } ++ ++ if (pmlmeext->channel_set[i].ChannelNum >= 149 ++ && pmlmeext->channel_set[i].ChannelNum < 165) { ++ /* Find primary channel */ ++ if (((pmlmeext->channel_set[i].ChannelNum - 149) % 8 == 0) ++ && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count)) { ++ index_5G = i; ++ best_channel_5G = pmlmeext->channel_set[i].ChannelNum; ++ } ++ } ++#if 1 /* debug */ ++ DBG_871X("The rx cnt of channel %3d = %d\n", ++ pmlmeext->channel_set[i].ChannelNum, ++ pmlmeext->channel_set[i].rx_count); ++#endif ++ } + +- DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ sprintf( extra, "\nbest_channel_24G = %d\n", best_channel_24G ); ++ DBG_871X("best_channel_24G = %d\n", best_channel_24G); + +- for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ +- mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ if (index_5G != 0) { ++ sprintf(extra, "best_channel_5G = %d\n", best_channel_5G); ++ DBG_871X("best_channel_5G = %d\n", best_channel_5G); + } + +- ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); ++ wrqu->data.length = strlen( extra ); + +- ptdls_sta->tdls_sta_state |= TDLS_SW_OFF_STATE; +-/* +- if((ptdls_sta->tdls_sta_state & TDLS_AT_OFF_CH_STATE) && (ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE)){ +- pmlmeinfo->tdls_candidate_ch= pmlmeext->cur_channel; +- issue_tdls_ch_switch_req(padapter, mac_addr); +- DBG_871X("issue tdls ch switch req back to base channel\n"); +- } +-*/ +- +-#endif //CONFIG_TDLS ++#endif ++ ++ return 0; + +- return ret; + } + + static int rtw_tdls(struct net_device *dev, +@@ -13742,85 +12232,85 @@ static int rtw_tdls(struct net_device *dev, + int ret = 0; + + #ifdef CONFIG_TDLS ++ + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + ++ DBG_871X( "[%s] extra = %s\n", __FUNCTION__, extra ); + ++ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { ++ DBG_871X("Discard tdls oper since hal doesn't support tdls\n"); ++ return 0; ++ } + +- DBG_871X( "[%s] extra = %s\n", __FUNCTION__, extra ); +- // WFD Sigma will use the tdls enable command to let the driver know we want to test the tdls now! +- if ( _rtw_memcmp( extra, "wfdenable=", 10 ) ) +- { +- wrqu->data.length -=10; +- rtw_wfd_tdls_enable( dev, info, wrqu, &extra[10] ); +- return ret; ++ if (padapter->tdlsinfo.tdls_enable == 0) { ++ DBG_871X("tdls haven't enabled\n"); ++ return 0; + } +- else if ( _rtw_memcmp( extra, "weaksec=", 8 ) ) +- { ++ ++ /* WFD Sigma will use the tdls enable command to let the driver know we want to test the tdls now! */ ++ ++ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { ++ if (_rtw_memcmp(extra, "wfdenable=", 10)) { ++ wrqu->data.length -= 10; ++ rtw_wx_tdls_wfd_enable(dev, info, wrqu, &extra[10]); ++ return ret; ++ } ++ } ++ ++ if (_rtw_memcmp(extra, "weaksec=", 8)) { + wrqu->data.length -=8; + rtw_tdls_weaksec( dev, info, wrqu, &extra[8] ); + return ret; +- } +- else if ( _rtw_memcmp( extra, "tdlsenable=", 11 ) ) +- { ++ } else if (_rtw_memcmp( extra, "tdlsenable=", 11)) { + wrqu->data.length -=11; + rtw_tdls_enable( dev, info, wrqu, &extra[11] ); + return ret; + } + +- if( padapter->tdlsinfo.tdls_enable == 0 ) +- { +- printk("tdls haven't enabled\n"); +- return 0; +- } +- +- if ( _rtw_memcmp( extra, "setup=", 6 ) ) +- { ++ if (_rtw_memcmp(extra, "setup=", 6)) { + wrqu->data.length -=6; + rtw_tdls_setup( dev, info, wrqu, &extra[6] ); +- } +- else if (_rtw_memcmp( extra, "tear=", 5 ) ) +- { ++ } else if (_rtw_memcmp(extra, "tear=", 5)) { + wrqu->data.length -= 5; + rtw_tdls_teardown( dev, info, wrqu, &extra[5] ); +- } +- else if (_rtw_memcmp( extra, "dis=", 4 ) ) +- { ++ } else if (_rtw_memcmp(extra, "dis=", 4)) { + wrqu->data.length -= 4; + rtw_tdls_discovery( dev, info, wrqu, &extra[4] ); +- } +- else if (_rtw_memcmp( extra, "sw=", 3 ) ) +- { ++ } else if (_rtw_memcmp(extra, "swoff=", 6)) { ++ wrqu->data.length -= 6; ++ rtw_tdls_ch_switch_off(dev, info, wrqu, &extra[6]); ++ } else if (_rtw_memcmp(extra, "sw=", 3)) { + wrqu->data.length -= 3; + rtw_tdls_ch_switch( dev, info, wrqu, &extra[3] ); +- } +- else if (_rtw_memcmp( extra, "swoff=", 6 ) ) +- { +- wrqu->data.length -= 6; +- rtw_tdls_ch_switch_off( dev, info, wrqu, &extra[6] ); +- } +- else if (_rtw_memcmp( extra, "pson=", 5 ) ) +- { ++ } else if (_rtw_memcmp(extra, "dumpstack=", 10)) { ++ wrqu->data.length -= 10; ++ rtw_tdls_dump_ch(dev, info, wrqu, &extra[10]); ++ } else if (_rtw_memcmp(extra, "offchnum=", 9)) { ++ wrqu->data.length -= 9; ++ rtw_tdls_off_ch_num(dev, info, wrqu, &extra[9]); ++ } else if (_rtw_memcmp(extra, "choffset=", 9)) { ++ wrqu->data.length -= 9; ++ rtw_tdls_ch_offset(dev, info, wrqu, &extra[9]); ++ } else if (_rtw_memcmp(extra, "pson=", 5)) { + wrqu->data.length -= 5; + rtw_tdls_pson( dev, info, wrqu, &extra[5] ); +- } +- else if (_rtw_memcmp( extra, "psoff=", 6 ) ) +- { ++ } else if (_rtw_memcmp(extra, "psoff=", 6)) { + wrqu->data.length -= 6; + rtw_tdls_psoff( dev, info, wrqu, &extra[6] ); + } ++ + #ifdef CONFIG_WFD +- else if (_rtw_memcmp( extra, "setip=", 6 ) ) +- { +- wrqu->data.length -= 6; +- rtw_tdls_setip( dev, info, wrqu, &extra[6] ); +- } +- else if (_rtw_memcmp( extra, "tprobe=", 6 ) ) +- { +- issue_tunneled_probe_req((_adapter *)rtw_netdev_priv(dev)); ++ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { ++ if (_rtw_memcmp(extra, "setip=", 6)) { ++ wrqu->data.length -= 6; ++ rtw_tdls_setip(dev, info, wrqu, &extra[6]); ++ } else if (_rtw_memcmp(extra, "tprobe=", 6)) { ++ issue_tunneled_probe_req((_adapter *)rtw_netdev_priv(dev)); ++ } + } +-#endif //CONFIG_WFD ++#endif /* CONFIG_WFD */ + +-#endif //CONFIG_TDLS ++#endif /* CONFIG_TDLS */ + + return ret; + } +@@ -13832,33 +12322,24 @@ static int rtw_tdls_get(struct net_device *dev, + { + int ret = 0; + +-#ifdef CONFIG_WFD ++#ifdef CONFIG_TDLS + + DBG_871X( "[%s] extra = %s\n", __FUNCTION__, (char*) wrqu->data.pointer ); + + if ( _rtw_memcmp( wrqu->data.pointer, "ip", 2 ) ) +- { + rtw_tdls_getip( dev, info, wrqu, extra ); +- } +- if ( _rtw_memcmp( wrqu->data.pointer, "port", 4 ) ) +- { ++ else if (_rtw_memcmp(wrqu->data.pointer, "port", 4)) + rtw_tdls_getport( dev, info, wrqu, extra ); +- } +- //WFDTDLS, for sigma test +- if ( _rtw_memcmp( wrqu->data.pointer, "dis", 3 ) ) +- { ++ /* WFDTDLS, for sigma test */ ++ else if ( _rtw_memcmp(wrqu->data.pointer, "dis", 3)) + rtw_tdls_dis_result( dev, info, wrqu, extra ); +- } +- if ( _rtw_memcmp( wrqu->data.pointer, "status", 6 ) ) +- { ++ else if ( _rtw_memcmp(wrqu->data.pointer, "status", 6)) + rtw_wfd_tdls_status( dev, info, wrqu, extra ); +- } +- if ( _rtw_memcmp( wrqu->data.pointer, "tdls_sta=", 9 ) ) +- { ++ else if ( _rtw_memcmp(wrqu->data.pointer, "tdls_sta=", 9)) + rtw_tdls_getsta( dev, info, wrqu, extra ); +- } +- +-#endif //CONFIG_WFD ++ else if (_rtw_memcmp(wrqu->data.pointer, "best_ch", 7)) ++ rtw_tdls_get_best_ch(dev, info, wrqu, extra); ++#endif /* CONFIG_TDLS */ + + return ret; + } +@@ -13906,12 +12387,6 @@ static int rtw_widi_set_probe_request(struct net_device *dev, + + #ifdef CONFIG_MAC_LOOPBACK_DRIVER + +-#ifdef CONFIG_RTL8723A +-extern void rtl8723a_cal_txdesc_chksum(struct tx_desc *ptxdesc); +-#define cal_txdesc_chksum rtl8723a_cal_txdesc_chksum +-extern void rtl8723a_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); +-#define fill_default_txdesc rtl8723a_fill_default_txdesc +-#endif + #if defined(CONFIG_RTL8188E) + #include + extern void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc); +@@ -13927,6 +12402,14 @@ extern void rtl8723b_cal_txdesc_chksum(struct tx_desc *ptxdesc); + extern void rtl8723b_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); + #define fill_default_txdesc rtl8723b_fill_default_txdesc + #endif // CONFIG_RTL8723B ++ ++#if defined(CONFIG_RTL8703B) ++/* extern void rtl8703b_cal_txdesc_chksum(struct tx_desc *ptxdesc); */ ++#define cal_txdesc_chksum rtl8703b_cal_txdesc_chksum ++/* extern void rtl8703b_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); */ ++#define fill_default_txdesc rtl8703b_fill_default_txdesc ++#endif /* CONFIG_RTL8703B */ ++ + #if defined(CONFIG_RTL8192E) + extern void rtl8192e_cal_txdesc_chksum(struct tx_desc *ptxdesc); + #define cal_txdesc_chksum rtl8192e_cal_txdesc_chksum +@@ -14019,7 +12502,7 @@ static s32 createpseudoadhoc(PADAPTER padapter) + _exit_critical_bh(&pmlmepriv->lock, &irqL); + + #if 0 +- err = rtw_createbss_cmd(padapter); ++ err = rtw_create_ibss_cmd(padapter, 0); + if (err == _FAIL) return _FAIL; + #else + { +@@ -14103,7 +12586,7 @@ static struct xmit_frame* createloopbackpkt(PADAPTER padapter, u32 size) + _rtw_memset(pattrib, 0, sizeof(struct pkt_attrib)); + + pattrib->ether_type = 0x8723; +- _rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); + _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); + _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); +@@ -14415,11 +12898,9 @@ static void loopbackTest(PADAPTER padapter, u32 cnt, u32 size, u8* pmsg) + return; + } + +- // disable dynamic algorithm +- { +- u32 DMFlag = DYNAMIC_FUNC_DISABLE; +- rtw_hal_get_hwreg(padapter, HW_VAR_DM_FLAG, (u8*)&DMFlag); +- } ++ // disable dynamic algorithm ++ rtw_phydm_ability_backup(padapter); ++ rtw_phydm_func_disable_all(padapter); + + // create pseudo ad-hoc connection + err = initpseudoadhoc(padapter); +@@ -14522,51 +13003,22 @@ static int rtw_test( + loopbackTest(padapter, cnt, size, extra); + wrqu->data.length = strlen(extra) + 1; + +- rtw_mfree(pbuf, len); +- return 0; ++ goto free_buf; + } + #endif + +-#if 0 +-//#ifdef CONFIG_RTL8723A +- if (strcmp(pch, "poweron") == 0) +- { +- s32 ret; +- +- ret = _InitPowerOn(padapter); +- DBG_871X("%s: power on %s\n", __func__, (_FAIL==ret) ? "FAIL!":"OK."); +- sprintf(extra, "Power ON %s", (_FAIL==ret) ? "FAIL!":"OK."); +- wrqu->data.length = strlen(extra) + 1; +- +- rtw_mfree(pbuf, len); +- return 0; +- } +- +- if (strcmp(pch, "dlfw") == 0) +- { +- s32 ret; +- +- ret = rtl8723a_FirmwareDownload(padapter); +- DBG_871X("%s: download FW %s\n", __func__, (_FAIL==ret) ? "FAIL!":"OK."); +- sprintf(extra, "download FW %s", (_FAIL==ret) ? "FAIL!":"OK."); +- wrqu->data.length = strlen(extra) + 1; +- +- rtw_mfree(pbuf, len); +- return 0; +- } +-#endif + + #ifdef CONFIG_BT_COEXIST +- if (strcmp(pch, "bton") == 0) +- { ++ if (strcmp(pch, "bton") == 0) { + rtw_btcoex_SetManualControl(padapter, _FALSE); +- } +- else if (strcmp(pch, "btoff") == 0) +- { ++ goto free_buf; ++ } else if (strcmp(pch, "btoff") == 0) { + rtw_btcoex_SetManualControl(padapter, _TRUE); ++ goto free_buf; + } +- else if (strcmp(pch, "h2c") == 0) +- { ++#endif ++ ++ if (strcmp(pch, "h2c") == 0) { + u8 param[8]; + u8 count = 0; + u32 tmp; +@@ -14574,7 +13026,6 @@ static int rtw_test( + u32 pos; + s32 ret; + +- + do { + pch = strsep(&ptmp, delim); + if ((pch == NULL) || (strlen(pch) == 0)) +@@ -14601,23 +13052,11 @@ static int rtw_test( + pos += sprintf(extra+pos, " %s", ret==_FAIL?"FAIL":"OK"); + + wrqu->data.length = strlen(extra) + 1; +- } +- else if (strcmp(pch, "ba_rxbuf_sz") == 0) +- { +- u8 ba_rxbuf_bz; + +- pch = strsep(&ptmp, delim); +- if ((pch != NULL) && (strlen(pch) != 0)) { +- sscanf(pch, "%hhu", &ba_rxbuf_bz); +- DBG_871X("%s set ba_rxbuf_bz as %u\n", __func__, ba_rxbuf_bz); +- padapter->fix_ba_rxbuf_bz = ba_rxbuf_bz; +- rtw_btcoex_RejectApAggregatedPacket(padapter, _TRUE); +- rtw_btcoex_RejectApAggregatedPacket(padapter, _FALSE); +- } ++ goto free_buf; + } + +-#endif // CONFIG_BT_COEXIST +- ++free_buf: + rtw_mfree(pbuf, len); + return 0; + } +@@ -14834,19 +13273,29 @@ static const struct iw_priv_args rtw_private_args[] = { + { MP_PwrCtlDM, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_pwrctldm" }, + { MP_GET_TXPOWER_INX, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_get_txpower" }, + { MP_GETVER, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_priv_ver" }, +- +-#if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) ++ { MP_MON, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_mon" }, ++ { EFUSE_MASK, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_mask" }, ++ { EFUSE_FILE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_file" }, ++ { MP_TX, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_tx" }, ++ { MP_RX, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rx" }, ++ { MP_HW_TX_MODE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_hxtx" }, ++#if defined(CONFIG_RTL8723B) + { MP_SetBT, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_setbt" }, + { MP_DISABLE_BT_COEXIST, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_disa_btcoex"}, + #endif + { CTA_TEST, IW_PRIV_TYPE_CHAR | 1024, 0, "cta_test"}, + #endif + #ifdef CONFIG_WOWLAN +- { MP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "wow_mode" }, //set ++ { MP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "wow_mode" }, ++ { MP_WOW_SET_PATTERN , IW_PRIV_TYPE_CHAR | 1024, 0, "wow_set_pattern" }, + #endif + #ifdef CONFIG_AP_WOWLAN + { MP_AP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "ap_wow_mode" }, //set + #endif ++#ifdef CONFIG_SDIO_INDIRECT_ACCESS ++ { MP_SD_IREAD, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "sd_iread" }, ++ { MP_SD_IWRITE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "sd_iwrite" }, ++#endif + }; + + static iw_handler rtw_private_handler[] = +@@ -14929,7 +13378,9 @@ static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) + #ifdef CONFIG_SIGNAL_DISPLAY_DBM + tmp_level = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); + #else +- #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING ++ #ifdef CONFIG_SIGNAL_SCALE_MAPPING ++ tmp_level = padapter->recvpriv.signal_strength; ++ #else + { + /* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */ + +@@ -14937,32 +13388,11 @@ static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) + + tmp_level = (u8)odm_SignalScaleMapping(&pHal->odmpriv, padapter->recvpriv.signal_strength); + } +- #else +- tmp_level = padapter->recvpriv.signal_strength; + #endif + #endif + + tmp_qual = padapter->recvpriv.signal_qual; +-#if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) +- if(rtw_linked_check(padapter)){ +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +- struct noise_info info; +- info.bPauseDIG = _TRUE; +- info.IGIValue = 0x1e; +- info.max_time = 100;//ms +- info.chan = pmlmeext->cur_channel ;//rtw_get_oper_ch(padapter); +- rtw_ps_deny(padapter, PS_DENY_IOCTL); +- LeaveAllPowerSaveModeDirect(padapter); +- +- rtw_hal_set_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&info, _FALSE); +- //ODM_InbandNoise_Monitor(podmpriv,_TRUE,0x20,100); +- rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); +- rtw_hal_get_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&(info.chan), &(padapter->recvpriv.noise)); +- #ifdef DBG_NOISE_MONITOR +- DBG_871X("chan:%d,noise_level:%d\n",info.chan,padapter->recvpriv.noise); +- #endif +- } +-#endif ++ rtw_get_noise(padapter); + tmp_noise = padapter->recvpriv.noise; + //DBG_871X("level:%d, qual:%d, noise:%d, rssi (%d)\n", tmp_level, tmp_qual, tmp_noise,padapter->recvpriv.rssi); + +@@ -15067,14 +13497,21 @@ static int _rtw_ioctl_wext_private(struct net_device *dev, union iwreq_data *wrq + + input_len = wdata.data.length; + input = rtw_zmalloc(input_len); +- if (NULL == input) ++ if (NULL == input || input_len == 0) + return -ENOMEM; + if (copy_from_user(input, wdata.data.pointer, input_len)) { + err = -EFAULT; + goto exit; + } ++ input[input_len - 1] = '\0'; + ptr = input; + len = input_len; ++ ++ if (ptr == NULL) { ++ err = -EOPNOTSUPP; ++ goto exit; ++ } ++ + sscanf(ptr, "%16s", cmdname); + cmdlen = strlen(cmdname); + DBG_871X("%s: cmd=%s\n", __func__, cmdname); +@@ -15439,7 +13876,7 @@ int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) + case RTL_IOCTL_HOSTAPD: + ret = rtw_hostapd_ioctl(dev, &wrq->u.data); + break; +-#ifdef CONFIG_NO_WIRELESS_HANDLERS ++#ifdef CONFIG_WIRELESS_EXT + case SIOCSIWMODE: + ret = rtw_wx_set_mode(dev, NULL, &wrq->u, NULL); + break; +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_mp.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_mp.c +new file mode 100644 +index 0000000..96f1e4e +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/ioctl_mp.c +@@ -0,0 +1,2335 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#if defined(CONFIG_MP_INCLUDED) ++ ++#include ++#include ++#include ++#include "../../hal/phydm/phydm_precomp.h" ++ ++ ++#if defined(CONFIG_RTL8723B) ++#include ++#endif ++ ++/* ++ * Input Format: %s,%d,%d ++ * %s is width, could be ++ * "b" for 1 byte ++ * "w" for WORD (2 bytes) ++ * "dw" for DWORD (4 bytes) ++ * 1st %d is address(offset) ++ * 2st %d is data to write ++ */ ++int rtw_mp_write_reg(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ char *pch, *pnext, *ptmp; ++ char *width_str; ++ char width, buf[5]; ++ u32 addr, data; ++ int ret; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ char input[wrqu->length]; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ _rtw_memset(extra, 0, wrqu->length); ++ ++ pch = input; ++ ++ pnext = strpbrk(pch, " ,.-"); ++ if (pnext == NULL) ++ return -EINVAL; ++ *pnext = 0; ++ width_str = pch; ++ ++ pch = pnext + 1; ++ pnext = strpbrk(pch, " ,.-"); ++ if (pnext == NULL) ++ return -EINVAL; ++ *pnext = 0; ++ /*addr = simple_strtoul(pch, &ptmp, 16); ++ _rtw_memset(buf, '\0', sizeof(buf)); ++ _rtw_memcpy(buf, pch, pnext-pch); ++ ret = kstrtoul(buf, 16, &addr);*/ ++ ret = sscanf(pch, "%x", &addr); ++ if (addr > 0x3FFF) ++ return -EINVAL; ++ ++ pch = pnext + 1; ++ pnext = strpbrk(pch, " ,.-"); ++ if ((pch - input) >= wrqu->length) ++ return -EINVAL; ++ /*data = simple_strtoul(pch, &ptmp, 16);*/ ++ ret = sscanf(pch, "%x", &data); ++ DBG_871X("data=%x,addr=%x\n", (u32)data, (u32)addr); ++ ret = 0; ++ width = width_str[0]; ++ switch (width) { ++ case 'b': ++ /* 1 byte*/ ++ if (data > 0xFF) { ++ ret = -EINVAL; ++ break; ++ } ++ rtw_write8(padapter, addr, data); ++ break; ++ case 'w': ++ /* 2 bytes*/ ++ if (data > 0xFFFF) { ++ ret = -EINVAL; ++ break; ++ } ++ rtw_write16(padapter, addr, data); ++ break; ++ case 'd': ++ /* 4 bytes*/ ++ rtw_write32(padapter, addr, data); ++ break; ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ ++ return ret; ++} ++ ++ ++/* ++ * Input Format: %s,%d ++ * %s is width, could be ++ * "b" for 1 byte ++ * "w" for WORD (2 bytes) ++ * "dw" for DWORD (4 bytes) ++ * %d is address(offset) ++ * ++ * Return: ++ * %d for data readed ++ */ ++int rtw_mp_read_reg(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ char input[wrqu->length]; ++ char *pch, *pnext, *ptmp; ++ char *width_str; ++ char width; ++ char data[20], tmp[20], buf[3]; ++ u32 addr = 0, strtout = 0; ++ u32 i = 0, j = 0, ret = 0, data32 = 0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ if (wrqu->length > 128) ++ return -EFAULT; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ _rtw_memset(extra, 0, wrqu->length); ++ _rtw_memset(data, '\0', sizeof(data)); ++ _rtw_memset(tmp, '\0', sizeof(tmp)); ++ pch = input; ++ pnext = strpbrk(pch, " ,.-"); ++ if (pnext == NULL) ++ return -EINVAL; ++ *pnext = 0; ++ width_str = pch; ++ ++ pch = pnext + 1; ++ ++ ret = sscanf(pch, "%x", &addr); ++ if (addr > 0x3FFF) ++ return -EINVAL; ++ ++ ret = 0; ++ width = width_str[0]; ++ ++ switch (width) { ++ case 'b': ++ data32 = rtw_read8(padapter, addr); ++ DBG_871X("%x\n", data32); ++ sprintf(extra, "%d", data32); ++ wrqu->length = strlen(extra); ++ break; ++ case 'w': ++ /* 2 bytes*/ ++ sprintf(data, "%04x\n", rtw_read16(padapter, addr)); ++ ++ for (i = 0 ; i <= strlen(data) ; i++) { ++ if (i % 2 == 0) { ++ tmp[j] = ' '; ++ j++; ++ } ++ if (data[i] != '\0') ++ tmp[j] = data[i]; ++ ++ j++; ++ } ++ pch = tmp; ++ DBG_871X("pch=%s", pch); ++ ++ while (*pch != '\0') { ++ pnext = strpbrk(pch, " "); ++ if (!pnext || ((pnext - tmp) > 4)) ++ break; ++ ++ pnext++; ++ if (*pnext != '\0') { ++ /*strtout = simple_strtoul(pnext , &ptmp, 16);*/ ++ ret = sscanf(pnext, "%x", &strtout); ++ sprintf(extra, "%s %d" , extra , strtout); ++ } else ++ break; ++ pch = pnext; ++ } ++ wrqu->length = strlen(extra); ++ break; ++ case 'd': ++ /* 4 bytes */ ++ sprintf(data, "%08x", rtw_read32(padapter, addr)); ++ /*add read data format blank*/ ++ for (i = 0 ; i <= strlen(data) ; i++) { ++ if (i % 2 == 0) { ++ tmp[j] = ' '; ++ j++; ++ } ++ if (data[i] != '\0') ++ tmp[j] = data[i]; ++ ++ j++; ++ } ++ pch = tmp; ++ DBG_871X("pch=%s", pch); ++ ++ while (*pch != '\0') { ++ pnext = strpbrk(pch, " "); ++ if (!pnext) ++ break; ++ ++ pnext++; ++ if (*pnext != '\0') { ++ ret = sscanf(pnext, "%x", &strtout); ++ sprintf(extra, "%s %d" , extra , strtout); ++ } else ++ break; ++ pch = pnext; ++ } ++ wrqu->length = strlen(extra); ++ break; ++ ++ default: ++ wrqu->length = 0; ++ ret = -EINVAL; ++ break; ++ } ++ ++ return ret; ++} ++ ++ ++/* ++ * Input Format: %d,%x,%x ++ * %d is RF path, should be smaller than MAX_RF_PATH_NUMS ++ * 1st %x is address(offset) ++ * 2st %x is data to write ++ */ ++int rtw_mp_write_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ ++ u32 path, addr, data; ++ int ret; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ char input[wrqu->length]; ++ ++ ++ _rtw_memset(input, 0, wrqu->length); ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ ++ ret = sscanf(input, "%d,%x,%x", &path, &addr, &data); ++ if (ret < 3) ++ return -EINVAL; ++ ++ if (path >= GET_HAL_RFPATH_NUM(padapter)) ++ return -EINVAL; ++ if (addr > 0xFF) ++ return -EINVAL; ++ if (data > 0xFFFFF) ++ return -EINVAL; ++ ++ _rtw_memset(extra, 0, wrqu->length); ++ ++ write_rfreg(padapter, path, addr, data); ++ ++ sprintf(extra, "write_rf completed\n"); ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++ ++/* ++ * Input Format: %d,%x ++ * %d is RF path, should be smaller than MAX_RF_PATH_NUMS ++ * %x is address(offset) ++ * ++ * Return: ++ * %d for data readed ++ */ ++int rtw_mp_read_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ char input[wrqu->length]; ++ char *pch, *pnext, *ptmp; ++ char data[20], tmp[20], buf[3]; ++ u32 path, addr, strtou; ++ u32 ret, i = 0 , j = 0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (wrqu->length > 128) ++ return -EFAULT; ++ _rtw_memset(input, 0, wrqu->length); ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ ret = sscanf(input, "%d,%x", &path, &addr); ++ if (ret < 2) ++ return -EINVAL; ++ ++ if (path >= GET_HAL_RFPATH_NUM(padapter)) ++ return -EINVAL; ++ if (addr > 0xFF) ++ return -EINVAL; ++ ++ _rtw_memset(extra, 0, wrqu->length); ++ ++ sprintf(data, "%08x", read_rfreg(padapter, path, addr)); ++ /*add read data format blank*/ ++ for (i = 0 ; i <= strlen(data) ; i++) { ++ if (i % 2 == 0) { ++ tmp[j] = ' '; ++ j++; ++ } ++ tmp[j] = data[i]; ++ j++; ++ } ++ pch = tmp; ++ DBG_871X("pch=%s", pch); ++ ++ while (*pch != '\0') { ++ pnext = strpbrk(pch, " "); ++ if (!pnext) ++ break; ++ pnext++; ++ if (*pnext != '\0') { ++ /*strtou =simple_strtoul(pnext , &ptmp, 16);*/ ++ ret = sscanf(pnext, "%x", &strtou); ++ sprintf(extra, "%s %d" , extra , strtou); ++ } else ++ break; ++ pch = pnext; ++ } ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++ ++int rtw_mp_start(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 val8; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct hal_ops *pHalFunc = &padapter->HalFunc; ++ ++ rtw_pm_set_ips(padapter, IPS_NONE); ++ LeaveAllPowerSaveMode(padapter); ++ ++ if (padapter->registrypriv.mp_mode == 0) { ++ rtw_hal_deinit(padapter); ++ padapter->registrypriv.mp_mode = 1; ++ #ifdef CONFIG_RF_GAIN_OFFSET ++ if (!IS_HARDWARE_TYPE_8814A(padapter)) ++ padapter->registrypriv.RegRfKFreeEnable = 1; ++ rtw_hal_read_chip_info(padapter); ++ #endif /*CONFIG_RF_GAIN_OFFSET*/ ++ rtw_hal_init(padapter); ++ } ++ ++ if (padapter->registrypriv.mp_mode == 0) ++ return -EPERM; ++ ++ if (padapter->mppriv.mode == MP_OFF) { ++ if (mp_start_test(padapter) == _FAIL) ++ return -EPERM; ++ padapter->mppriv.mode = MP_ON; ++ MPT_PwrCtlDM(padapter, 0); ++ } ++ padapter->mppriv.bmac_filter = _FALSE; ++#ifdef CONFIG_RTL8723B ++#ifdef CONFIG_USB_HCI ++ rtw_write32(padapter, 0x765, 0x0000); ++ rtw_write32(padapter, 0x948, 0x0280); ++#else ++ rtw_write32(padapter, 0x765, 0x0000); ++ rtw_write32(padapter, 0x948, 0x0000); ++#endif ++#ifdef CONFIG_FOR_RTL8723BS_VQ0 ++ rtw_write32(padapter, 0x765, 0x0000); ++ rtw_write32(padapter, 0x948, 0x0280); ++#endif ++ rtw_write8(padapter, 0x66, 0x27); /*Open BT uart Log*/ ++ rtw_write8(padapter, 0xc50, 0x20); /*for RX init Gain*/ ++#endif ++ ODM_Write_DIG(&pHalData->odmpriv, 0x20); ++ ++ return 0; ++} ++ ++ ++ ++int rtw_mp_stop(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ struct hal_ops *pHalFunc = &padapter->HalFunc; ++ ++ if (padapter->registrypriv.mp_mode == 1) { ++ ++ MPT_DeInitAdapter(padapter); ++ pHalFunc->hal_deinit(padapter); ++ padapter->registrypriv.mp_mode = 0; ++ pHalFunc->hal_init(padapter); ++ } ++ ++ if (padapter->mppriv.mode != MP_OFF) { ++ mp_stop_test(padapter); ++ padapter->mppriv.mode = MP_OFF; ++ } ++ ++ return 0; ++} ++ ++ ++int rtw_mp_rate(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 rate = MPT_RATE_1M; ++ u8 input[wrqu->length]; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.MptCtx); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ rate = rtw_mpRateParseFunc(padapter, input); ++ padapter->mppriv.rateidx = rate; ++ ++ if (rate == 0 && strcmp(input, "1M") != 0) { ++ rate = rtw_atoi(input); ++ padapter->mppriv.rateidx = MRateToHwRate(rate); ++ /*if (rate <= 0x7f) ++ rate = wifirate2_ratetbl_inx((u8)rate); ++ else if (rate < 0xC8) ++ rate = (rate - 0x79 + MPT_RATE_MCS0); ++ HT rate 0x80(MCS0) ~ 0x8F(MCS15) ~ 0x9F(MCS31) 128~159 ++ VHT1SS~2SS rate 0xA0 (VHT1SS_MCS0 44) ~ 0xB3 (VHT2SS_MCS9 #63) 160~179 ++ VHT rate 0xB4 (VHT3SS_MCS0 64) ~ 0xC7 (VHT2SS_MCS9 #83) 180~199 ++ else ++ VHT rate 0x90(VHT1SS_MCS0) ~ 0x99(VHT1SS_MCS9) 144~153 ++ rate =(rate - MPT_RATE_VHT1SS_MCS0); ++ */ ++ } ++ _rtw_memset(extra, 0, wrqu->length); ++ ++ sprintf(extra, "Set data rate to %s index %d" , input, padapter->mppriv.rateidx); ++ DBG_871X("%s: %s rate index=%d\n", __func__, input, padapter->mppriv.rateidx); ++ ++ if (padapter->mppriv.rateidx >= DESC_RATEVHTSS4MCS9) ++ return -EINVAL; ++ ++ pMptCtx->MptRateIndex = HwRateToMPTRate(padapter->mppriv.rateidx); ++ SetDataRate(padapter); ++ ++ wrqu->length = strlen(extra); ++ return 0; ++} ++ ++ ++int rtw_mp_channel(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 input[wrqu->length]; ++ u32 channel = 1; ++ int cur_ch_offset; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ channel = rtw_atoi(input); ++ /*DBG_871X("%s: channel=%d\n", __func__, channel);*/ ++ _rtw_memset(extra, 0, wrqu->length); ++ sprintf(extra, "Change channel %d to channel %d", padapter->mppriv.channel , channel); ++ padapter->mppriv.channel = channel; ++ SetChannel(padapter); ++ pHalData->CurrentChannel = channel; ++ ++ wrqu->length = strlen(extra); ++ return 0; ++} ++ ++ ++int rtw_mp_bandwidth(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 bandwidth = 0, sg = 0; ++ int cur_ch_offset; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (sscanf(extra, "40M=%d,shortGI=%d", &bandwidth, &sg) > 0) ++ DBG_871X("%s: bw=%d sg=%d\n", __func__, bandwidth , sg); ++ ++ if (bandwidth == 1) ++ bandwidth = CHANNEL_WIDTH_40; ++ else if (bandwidth == 2) ++ bandwidth = CHANNEL_WIDTH_80; ++ ++ padapter->mppriv.bandwidth = (u8)bandwidth; ++ padapter->mppriv.preamble = sg; ++ ++ SetBandwidth(padapter); ++ pHalData->CurrentChannelBW = bandwidth; ++ /*cur_ch_offset = rtw_get_offset_by_ch(padapter->mppriv.channel);*/ ++ /*set_channel_bwmode(padapter, padapter->mppriv.channel, cur_ch_offset, bandwidth);*/ ++ ++ return 0; ++} ++ ++ ++int rtw_mp_txpower_index(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ char input[wrqu->length]; ++ u32 rfpath; ++ u32 txpower_inx; ++ ++ if (wrqu->length > 128) ++ return -EFAULT; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ rfpath = rtw_atoi(input); ++ txpower_inx = mpt_ProQueryCalTxPower(padapter, rfpath); ++ sprintf(extra, " %d", txpower_inx); ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++ ++int rtw_mp_txpower(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 idx_a = 0, idx_b = 0, idx_c = 0, idx_d = 0, status = 0; ++ int MsetPower = 1; ++ u8 input[wrqu->length]; ++ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.MptCtx); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ MsetPower = strncmp(input, "off", 3); ++ if (MsetPower == 0) { ++ padapter->mppriv.bSetTxPower = 0; ++ sprintf(extra, "MP Set power off"); ++ } else { ++ if (sscanf(input, "patha=%d,pathb=%d,pathc=%d,pathd=%d", &idx_a, &idx_b, &idx_c, &idx_d) < 3) ++ DBG_871X("Invalid format on line %s ,patha=%d,pathb=%d,pathc=%d,pathd=%d\n", input , idx_a , idx_b , idx_c , idx_d); ++ ++ sprintf(extra, "Set power level path_A:%d path_B:%d path_C:%d path_D:%d", idx_a , idx_b , idx_c , idx_d); ++ padapter->mppriv.txpoweridx = (u8)idx_a; ++ ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_A] = (u8)idx_a; ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_B] = (u8)idx_b; ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_C] = (u8)idx_c; ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_D] = (u8)idx_d; ++ padapter->mppriv.bSetTxPower = 1; ++ ++ SetTxPower(padapter); ++ } ++ ++ wrqu->length = strlen(extra); ++ return 0; ++} ++ ++ ++int rtw_mp_ant_tx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 i; ++ u8 input[wrqu->length]; ++ u16 antenna = 0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ sprintf(extra, "switch Tx antenna to %s", input); ++ ++ for (i = 0; i < strlen(input); i++) { ++ switch (input[i]) { ++ case 'a': ++ antenna |= ANTENNA_A; ++ break; ++ case 'b': ++ antenna |= ANTENNA_B; ++ break; ++ case 'c': ++ antenna |= ANTENNA_C; ++ break; ++ case 'd': ++ antenna |= ANTENNA_D; ++ break; ++ } ++ } ++ /*antenna |= BIT(extra[i]-'a');*/ ++ DBG_871X("%s: antenna=0x%x\n", __func__, antenna); ++ padapter->mppriv.antenna_tx = antenna; ++ padapter->mppriv.antenna_rx = antenna; ++ /*DBG_871X("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_tx);*/ ++ pHalData->AntennaTxPath = antenna; ++ ++ SetAntenna(padapter); ++ ++ wrqu->length = strlen(extra); ++ return 0; ++} ++ ++ ++int rtw_mp_ant_rx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 i; ++ u16 antenna = 0; ++ u8 input[wrqu->length]; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ /*DBG_871X("%s: input=%s\n", __func__, input);*/ ++ _rtw_memset(extra, 0, wrqu->length); ++ ++ sprintf(extra, "switch Rx antenna to %s", input); ++ ++ for (i = 0; i < strlen(input); i++) { ++ switch (input[i]) { ++ case 'a': ++ antenna |= ANTENNA_A; ++ break; ++ case 'b': ++ antenna |= ANTENNA_B; ++ break; ++ case 'c': ++ antenna |= ANTENNA_C; ++ break; ++ case 'd': ++ antenna |= ANTENNA_D; ++ break; ++ } ++ } ++ ++ DBG_871X("%s: antenna=0x%x\n", __func__, antenna); ++ padapter->mppriv.antenna_tx = antenna; ++ padapter->mppriv.antenna_rx = antenna; ++ pHalData->AntennaRxPath = antenna; ++ /*DBG_871X("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_rx);*/ ++ SetAntenna(padapter); ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++ ++int rtw_set_ctx_destAddr(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ int jj, kk = 0; ++ ++ struct pkt_attrib *pattrib; ++ struct mp_priv *pmp_priv; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ pmp_priv = &padapter->mppriv; ++ pattrib = &pmp_priv->tx.attrib; ++ ++ if (strlen(extra) < 5) ++ return _FAIL; ++ ++ DBG_871X("%s: in=%s\n", __func__, extra); ++ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3) ++ pattrib->dst[jj] = key_2char2num(extra[kk], extra[kk + 1]); ++ ++ DBG_871X("pattrib->dst:%x %x %x %x %x %x\n", pattrib->dst[0], pattrib->dst[1], pattrib->dst[2], pattrib->dst[3], pattrib->dst[4], pattrib->dst[5]); ++ return 0; ++} ++ ++ ++ ++int rtw_mp_ctx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 pkTx = 1; ++ int countPkTx = 1, cotuTx = 1, CarrSprTx = 1, scTx = 1, sgleTx = 1, stop = 1; ++ u32 bStartTest = 1; ++ u32 count = 0, pktinterval = 0, pktlen = 0; ++ u8 status; ++ struct mp_priv *pmp_priv; ++ struct pkt_attrib *pattrib; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ pmp_priv = &padapter->mppriv; ++ pattrib = &pmp_priv->tx.attrib; ++ ++ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ DBG_871X("%s: in=%s\n", __func__, extra); ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->adapter_type == SECONDARY_ADAPTER) { ++ sprintf(extra, "Error: MP mode can't support Virtual Adapter, Please to use main Adapter.\n"); ++ wrqu->length = strlen(extra); ++ return 0; ++ } ++#endif ++ countPkTx = strncmp(extra, "count=", 5); /* strncmp TRUE is 0*/ ++ cotuTx = strncmp(extra, "background", 20); ++ CarrSprTx = strncmp(extra, "background,cs", 20); ++ scTx = strncmp(extra, "background,sc", 20); ++ sgleTx = strncmp(extra, "background,stone", 20); ++ pkTx = strncmp(extra, "background,pkt", 20); ++ stop = strncmp(extra, "stop", 4); ++ if (sscanf(extra, "count=%d,pkt", &count) > 0) ++ DBG_871X("count= %d\n", count); ++ if (sscanf(extra, "pktinterval=%d", &pktinterval) > 0) ++ DBG_871X("pktinterval= %d\n", pktinterval); ++ ++ if (sscanf(extra, "pktlen=%d", &pktlen) > 0) ++ DBG_871X("pktlen= %d\n", pktlen); ++ ++ if (_rtw_memcmp(extra, "destmac=", 8)) { ++ wrqu->length -= 8; ++ rtw_set_ctx_destAddr(dev, info, wrqu, &extra[8]); ++ sprintf(extra, "Set dest mac OK !\n"); ++ return 0; ++ } ++ ++ /*DBG_871X("%s: count=%d countPkTx=%d cotuTx=%d CarrSprTx=%d scTx=%d sgleTx=%d pkTx=%d stop=%d\n", __func__, count, countPkTx, cotuTx, CarrSprTx, pkTx, sgleTx, scTx, stop);*/ ++ _rtw_memset(extra, '\0', strlen(extra)); ++ ++ if (pktinterval != 0) { ++ sprintf(extra, "Pkt Interval = %d", pktinterval); ++ padapter->mppriv.pktInterval = pktinterval; ++ wrqu->length = strlen(extra); ++ return 0; ++ } ++ if (pktlen != 0) { ++ sprintf(extra, "Pkt len = %d", pktlen); ++ pattrib->pktlen = pktlen; ++ wrqu->length = strlen(extra); ++ return 0; ++ } ++ if (stop == 0) { ++ bStartTest = 0; /* To set Stop*/ ++ pmp_priv->tx.stop = 1; ++ sprintf(extra, "Stop continuous Tx"); ++ ODM_Write_DIG(&pHalData->odmpriv, 0x20); ++ } else { ++ bStartTest = 1; ++ ODM_Write_DIG(&pHalData->odmpriv, 0x7f); ++ if (pmp_priv->mode != MP_ON) { ++ if (pmp_priv->tx.stop != 1) { ++ DBG_871X("%s: MP_MODE != ON %d\n", __func__, pmp_priv->mode); ++ return -EFAULT; ++ } ++ } ++ } ++ ++ pmp_priv->tx.count = count; ++ ++ if (pkTx == 0 || countPkTx == 0) ++ pmp_priv->mode = MP_PACKET_TX; ++ if (sgleTx == 0) ++ pmp_priv->mode = MP_SINGLE_TONE_TX; ++ if (cotuTx == 0) ++ pmp_priv->mode = MP_CONTINUOUS_TX; ++ if (CarrSprTx == 0) ++ pmp_priv->mode = MP_CARRIER_SUPPRISSION_TX; ++ if (scTx == 0) ++ pmp_priv->mode = MP_SINGLE_CARRIER_TX; ++ ++ status = rtw_mp_pretx_proc(padapter, bStartTest, extra); ++ ++ wrqu->length = strlen(extra); ++ return status; ++} ++ ++ ++ ++int rtw_mp_disable_bt_coexist(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct hal_ops *pHalFunc = &padapter->HalFunc; ++ ++ u8 input[wrqu->data.length]; ++ u32 bt_coexist; ++ ++ if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ ++ bt_coexist = rtw_atoi(input); ++ ++ if (bt_coexist == 0) { ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("Set OID_RT_SET_DISABLE_BT_COEXIST: disable BT_COEXIST\n")); ++ DBG_871X("Set OID_RT_SET_DISABLE_BT_COEXIST: disable BT_COEXIST\n"); ++#ifdef CONFIG_BT_COEXIST ++ rtw_btcoex_HaltNotify(padapter); ++ rtw_btcoex_SetManualControl(padapter, _TRUE); ++ /* Force to switch Antenna to WiFi*/ ++ rtw_write16(padapter, 0x870, 0x300); ++ rtw_write16(padapter, 0x860, 0x110); ++#endif ++ /* CONFIG_BT_COEXIST */ ++ } else { ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("Set OID_RT_SET_DISABLE_BT_COEXIST: enable BT_COEXIST\n")); ++#ifdef CONFIG_BT_COEXIST ++ rtw_btcoex_SetManualControl(padapter, _FALSE); ++#endif ++ } ++ ++ return 0; ++} ++ ++ ++int rtw_mp_arx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ int bStartRx = 0, bStopRx = 0, bQueryPhy = 0, bQueryMac = 0, bSetBssid = 0; ++ int bmac_filter = 0, bfilter_init = 0, bmon = 0, bSmpCfg = 0; ++ u8 input[wrqu->length]; ++ char *pch, *ptmp, *token, *tmp[2] = {0x00, 0x00}; ++ u32 i = 0, ii = 0, jj = 0, kk = 0, cnts = 0, ret; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ struct mp_priv *pmppriv = &padapter->mppriv; ++ struct dbg_rx_counter rx_counter; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ DBG_871X("%s: %s\n", __func__, input); ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->adapter_type == SECONDARY_ADAPTER) { ++ sprintf(extra, "Error: MP mode can't support Virtual Adapter, Please to use main Adapter.\n"); ++ wrqu->length = strlen(extra); ++ return 0; ++ } ++#endif ++ bStartRx = (strncmp(input, "start", 5) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ ++ bStopRx = (strncmp(input, "stop", 5) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ ++ bQueryPhy = (strncmp(input, "phy", 3) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ ++ bQueryMac = (strncmp(input, "mac", 3) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ ++ bSetBssid = (strncmp(input, "setbssid=", 8) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ ++ /*bfilter_init = (strncmp(input, "filter_init",11)==0)?1:0;*/ ++ bmac_filter = (strncmp(input, "accept_mac", 10) == 0) ? 1 : 0; ++ bmon = (strncmp(input, "mon=", 4) == 0) ? 1 : 0; ++ bSmpCfg = (strncmp(input , "smpcfg=" , 7) == 0) ? 1 : 0; ++ ++ if (bSetBssid == 1) { ++ pch = input; ++ while ((token = strsep(&pch, "=")) != NULL) { ++ if (i > 1) ++ break; ++ tmp[i] = token; ++ i++; ++ } ++ if ((tmp[0] != NULL) && (tmp[1] != NULL)) { ++ cnts = strlen(tmp[1]) / 2; ++ if (cnts < 1) ++ return -EFAULT; ++ DBG_871X("%s: cnts=%d\n", __func__, cnts); ++ DBG_871X("%s: data=%s\n", __func__, tmp[1]); ++ for (jj = 0, kk = 0; jj < cnts ; jj++, kk += 2) { ++ pmppriv->network_macaddr[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); ++ DBG_871X("network_macaddr[%d]=%x\n", jj, pmppriv->network_macaddr[jj]); ++ } ++ } else ++ return -EFAULT; ++ ++ pmppriv->bSetRxBssid = _TRUE; ++ } ++ ++ if (bmac_filter) { ++ pmppriv->bmac_filter = bmac_filter; ++ pch = input; ++ while ((token = strsep(&pch, "=")) != NULL) { ++ if (i > 1) ++ break; ++ tmp[i] = token; ++ i++; ++ } ++ if ((tmp[0] != NULL) && (tmp[1] != NULL)) { ++ cnts = strlen(tmp[1]) / 2; ++ if (cnts < 1) ++ return -EFAULT; ++ DBG_871X("%s: cnts=%d\n", __func__, cnts); ++ DBG_871X("%s: data=%s\n", __func__, tmp[1]); ++ for (jj = 0, kk = 0; jj < cnts ; jj++, kk += 2) { ++ pmppriv->mac_filter[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); ++ DBG_871X("%s mac_filter[%d]=%x\n", __func__, jj, pmppriv->mac_filter[jj]); ++ } ++ } else ++ return -EFAULT; ++ ++ } ++ ++ if (bStartRx) { ++ sprintf(extra, "start"); ++ SetPacketRx(padapter, bStartRx, _FALSE); ++ } else if (bStopRx) { ++ SetPacketRx(padapter, bStartRx, _FALSE); ++ pmppriv->bmac_filter = _FALSE; ++ sprintf(extra, "Received packet OK:%d CRC error:%d ,Filter out:%d", padapter->mppriv.rx_pktcount, padapter->mppriv.rx_crcerrpktcount, padapter->mppriv.rx_pktcount_filter_out); ++ } else if (bQueryPhy) { ++ _rtw_memset(&rx_counter, 0, sizeof(struct dbg_rx_counter)); ++ rtw_dump_phy_rx_counters(padapter, &rx_counter); ++ ++ DBG_871X("%s: OFDM_FA =%d\n", __func__, rx_counter.rx_ofdm_fa); ++ DBG_871X("%s: CCK_FA =%d\n", __func__, rx_counter.rx_cck_fa); ++ sprintf(extra, "Phy Received packet OK:%d CRC error:%d FA Counter: %d", rx_counter.rx_pkt_ok, rx_counter.rx_pkt_crc_error, rx_counter.rx_cck_fa + rx_counter.rx_ofdm_fa); ++ ++ ++ } else if (bQueryMac) { ++ _rtw_memset(&rx_counter, 0, sizeof(struct dbg_rx_counter)); ++ rtw_dump_mac_rx_counters(padapter, &rx_counter); ++ sprintf(extra, "Mac Received packet OK: %d , CRC error: %d , Drop Packets: %d\n", ++ rx_counter.rx_pkt_ok, rx_counter.rx_pkt_crc_error, rx_counter.rx_pkt_drop); ++ ++ } ++ ++ if (bmon == 1) { ++ ret = sscanf(input, "mon=%d", &bmon); ++ ++ if (bmon == 1) { ++ pmppriv->rx_bindicatePkt = _TRUE; ++ sprintf(extra, "Indicating Receive Packet to network start\n"); ++ } else { ++ pmppriv->rx_bindicatePkt = _FALSE; ++ sprintf(extra, "Indicating Receive Packet to network Stop\n"); ++ } ++ } ++ if (bSmpCfg == 1) { ++ ret = sscanf(input, "smpcfg=%d", &bSmpCfg); ++ ++ if (bSmpCfg == 1) { ++ pmppriv->bRTWSmbCfg = _TRUE; ++ sprintf(extra , "Indicate By Simple Config Format\n"); ++ SetPacketRx(padapter, _TRUE, _TRUE); ++ } else { ++ pmppriv->bRTWSmbCfg = _FALSE; ++ sprintf(extra , "Indicate By Normal Format\n"); ++ SetPacketRx(padapter, _TRUE, _FALSE); ++ } ++ } ++ ++ wrqu->length = strlen(extra) + 1; ++ ++ return 0; ++} ++ ++ ++int rtw_mp_trx_query(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 txok, txfail, rxok, rxfail, rxfilterout; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ txok = padapter->mppriv.tx.sended; ++ txfail = 0; ++ rxok = padapter->mppriv.rx_pktcount; ++ rxfail = padapter->mppriv.rx_crcerrpktcount; ++ rxfilterout = padapter->mppriv.rx_pktcount_filter_out; ++ ++ _rtw_memset(extra, '\0', 128); ++ ++ sprintf(extra, "Tx OK:%d, Tx Fail:%d, Rx OK:%d, CRC error:%d ,Rx Filter out:%d\n", txok, txfail, rxok, rxfail, rxfilterout); ++ ++ wrqu->length = strlen(extra) + 1; ++ ++ return 0; ++} ++ ++ ++int rtw_mp_pwrtrk(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 enable; ++ u32 thermal; ++ s32 ret; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 input[wrqu->length]; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ _rtw_memset(extra, 0, wrqu->length); ++ ++ enable = 1; ++ if (wrqu->length > 1) { ++ /* not empty string*/ ++ if (strncmp(input, "stop", 4) == 0) { ++ enable = 0; ++ sprintf(extra, "mp tx power tracking stop"); ++ } else if (sscanf(input, "ther=%d", &thermal) == 1) { ++ ret = SetThermalMeter(padapter, (u8)thermal); ++ if (ret == _FAIL) ++ return -EPERM; ++ sprintf(extra, "mp tx power tracking start,target value=%d ok", thermal); ++ } else ++ return -EINVAL; ++ } ++ ++ ret = SetPowerTracking(padapter, enable); ++ if (ret == _FAIL) ++ return -EPERM; ++ ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++ ++ ++int rtw_mp_psd(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ u8 input[wrqu->length]; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ strcpy(extra, input); ++ ++ wrqu->length = mp_query_psd(padapter, extra); ++ ++ return 0; ++} ++ ++ ++int rtw_mp_thermal(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 val; ++ int bwrite = 1; ++ ++#ifdef CONFIG_RTL8188E ++ u16 addr = EEPROM_THERMAL_METER_88E; ++#endif ++#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) ++ u16 addr = EEPROM_THERMAL_METER_8812; ++#endif ++#ifdef CONFIG_RTL8192E ++ u16 addr = EEPROM_THERMAL_METER_8192E; ++#endif ++#ifdef CONFIG_RTL8723B ++ u16 addr = EEPROM_THERMAL_METER_8723B; ++#endif ++#ifdef CONFIG_RTL8703B ++ u16 addr = EEPROM_THERMAL_METER_8703B; ++#endif ++#ifdef CONFIG_RTL8188F ++ u16 addr = EEPROM_THERMAL_METER_8188F; ++#endif ++ u16 cnt = 1; ++ u16 max_available_size = 0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ bwrite = strncmp(extra, "write", 6);/* strncmp TRUE is 0*/ ++ ++ GetThermalMeter(padapter, &val); ++ ++ if (bwrite == 0) { ++ /*DBG_871X("to write val:%d",val);*/ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ if (2 > max_available_size) { ++ DBG_871X("no available efuse!\n"); ++ return -EFAULT; ++ } ++ if (rtw_efuse_map_write(padapter, addr, cnt, &val) == _FAIL) { ++ DBG_871X("rtw_efuse_map_write error\n"); ++ return -EFAULT; ++ } ++ sprintf(extra, " efuse write ok :%d", val); ++ } else ++ sprintf(extra, "%d", val); ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++ ++ ++int rtw_mp_reset_stats(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ struct mp_priv *pmp_priv; ++ struct pkt_attrib *pattrib; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ pmp_priv = &padapter->mppriv; ++ ++ pmp_priv->tx.sended = 0; ++ pmp_priv->tx_pktcount = 0; ++ pmp_priv->rx_pktcount = 0; ++ pmp_priv->rx_pktcount_filter_out = 0; ++ pmp_priv->rx_crcerrpktcount = 0; ++ ++ rtw_reset_phy_rx_counters(padapter); ++ rtw_reset_mac_rx_counters(padapter); ++ ++ return 0; ++} ++ ++ ++int rtw_mp_dump(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ struct mp_priv *pmp_priv; ++ struct pkt_attrib *pattrib; ++ u32 value; ++ u8 input[wrqu->length]; ++ u8 rf_type, path_nums = 0; ++ u32 i, j = 1, path; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ pmp_priv = &padapter->mppriv; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ if (strncmp(input, "all", 4) == 0) { ++ mac_reg_dump(RTW_DBGDUMP, padapter); ++ bb_reg_dump(RTW_DBGDUMP, padapter); ++ rf_reg_dump(RTW_DBGDUMP, padapter); ++ } ++ return 0; ++} ++ ++ ++int rtw_mp_phypara(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ char input[wrqu->length]; ++ u32 valxcap, ret; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ DBG_871X("%s:iwpriv in=%s\n", __func__, input); ++ ++ ret = sscanf(input, "xcap=%d", &valxcap); ++ ++ pHalData->CrystalCap = (u8)valxcap; ++ hal_set_crystal_cap(padapter , valxcap); ++ ++ sprintf(extra, "Set xcap=%d", valxcap); ++ wrqu->length = strlen(extra) + 1; ++ ++ return 0; ++ ++} ++ ++ ++int rtw_mp_SetRFPath(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ char input[wrqu->data.length]; ++ int bMain = 1, bTurnoff = 1; ++ ++ if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ DBG_871X("%s:iwpriv in=%s\n", __func__, input); ++ ++ bMain = strncmp(input, "1", 2); /* strncmp TRUE is 0*/ ++ bTurnoff = strncmp(input, "0", 3); /* strncmp TRUE is 0*/ ++ ++ if (bMain == 0) { ++ MP_PHY_SetRFPathSwitch(padapter, _TRUE); ++ DBG_871X("%s:PHY_SetRFPathSwitch=TRUE\n", __func__); ++ } else if (bTurnoff == 0) { ++ MP_PHY_SetRFPathSwitch(padapter, _FALSE); ++ DBG_871X("%s:PHY_SetRFPathSwitch=FALSE\n", __func__); ++ } ++ ++ return 0; ++} ++ ++ ++int rtw_mp_QueryDrv(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ char input[wrqu->data.length]; ++ int qAutoLoad = 1; ++ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ ++ if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ DBG_871X("%s:iwpriv in=%s\n", __func__, input); ++ ++ qAutoLoad = strncmp(input, "autoload", 8); /* strncmp TRUE is 0*/ ++ ++ if (qAutoLoad == 0) { ++ DBG_871X("%s:qAutoLoad\n", __func__); ++ ++ if (pHalData->bautoload_fail_flag) ++ sprintf(extra, "fail"); ++ else ++ sprintf(extra, "ok"); ++ } ++ wrqu->data.length = strlen(extra) + 1; ++ return 0; ++} ++ ++ ++int rtw_mp_PwrCtlDM(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ u8 input[wrqu->length]; ++ int bstart = 1; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ bstart = strncmp(input, "start", 5); /* strncmp TRUE is 0*/ ++ if (bstart == 0) { ++ sprintf(extra, "PwrCtlDM start\n"); ++ MPT_PwrCtlDM(padapter, 1); ++ } else { ++ sprintf(extra, "PwrCtlDM stop\n"); ++ MPT_PwrCtlDM(padapter, 0); ++ } ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++ ++int rtw_mp_getver(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ struct mp_priv *pmp_priv; ++ ++ pmp_priv = &padapter->mppriv; ++ ++ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ ++ sprintf(extra, "rtwpriv=%d\n", RTWPRIV_VER_INFO); ++ wrqu->data.length = strlen(extra); ++ return 0; ++} ++ ++ ++int rtw_mp_mon(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct hal_ops *pHalFunc = &padapter->HalFunc; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType; ++ int bstart = 1, bstop = 1; ++ ++ networkType = Ndis802_11Infrastructure; ++ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ ++ rtw_pm_set_ips(padapter, IPS_NONE); ++ LeaveAllPowerSaveMode(padapter); ++ ++#ifdef CONFIG_MP_INCLUDED ++ if (init_mp_priv(padapter) == _FAIL) ++ DBG_871X("%s: initialize MP private data Fail!\n", __func__); ++ padapter->mppriv.channel = 6; ++ ++ bstart = strncmp(extra, "start", 5); /* strncmp TRUE is 0*/ ++ bstop = strncmp(extra, "stop", 4); /* strncmp TRUE is 0*/ ++ if (bstart == 0) { ++ mp_join(padapter, WIFI_FW_ADHOC_STATE); ++ SetPacketRx(padapter, _TRUE, _FALSE); ++ SetChannel(padapter); ++ pmp_priv->rx_bindicatePkt = _TRUE; ++ pmp_priv->bRTWSmbCfg = _TRUE; ++ sprintf(extra, "monitor mode start\n"); ++ } else if (bstop == 0) { ++ SetPacketRx(padapter, _FALSE, _FALSE); ++ pmp_priv->rx_bindicatePkt = _FALSE; ++ pmp_priv->bRTWSmbCfg = _FALSE; ++ padapter->registrypriv.mp_mode = 1; ++ pHalFunc->hal_deinit(padapter); ++ padapter->registrypriv.mp_mode = 0; ++ pHalFunc->hal_init(padapter); ++ /*rtw_disassoc_cmd(padapter, 0, _TRUE);*/ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ rtw_disassoc_cmd(padapter, 500, _TRUE); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); ++ /*rtw_free_assoc_resources(padapter, 1);*/ ++ } ++ rtw_pm_set_ips(padapter, IPS_NORMAL); ++ sprintf(extra, "monitor mode Stop\n"); ++ } ++#endif ++ wrqu->data.length = strlen(extra); ++ return 0; ++} ++ ++int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.MptCtx); ++ ++ switch (pmp_priv->mode) { ++ ++ case MP_PACKET_TX: ++ if (bStartTest == 0) { ++ pmp_priv->tx.stop = 1; ++ pmp_priv->mode = MP_ON; ++ sprintf(extra, "Stop continuous Tx"); ++ } else if (pmp_priv->tx.stop == 1) { ++ sprintf(extra, "%s\nStart continuous DA=ffffffffffff len=1500 count=%u\n", extra, pmp_priv->tx.count); ++ pmp_priv->tx.stop = 0; ++ SetPacketTx(padapter); ++ } else { ++ return -EFAULT; ++ } ++ return 0; ++ case MP_SINGLE_TONE_TX: ++ if (bStartTest != 0) ++ sprintf(extra, "%s\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.", extra); ++ SetSingleToneTx(padapter, (u8)bStartTest); ++ break; ++ case MP_CONTINUOUS_TX: ++ if (bStartTest != 0) ++ sprintf(extra, "%s\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.", extra); ++ SetContinuousTx(padapter, (u8)bStartTest); ++ break; ++ case MP_CARRIER_SUPPRISSION_TX: ++ if (bStartTest != 0) { ++ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_11M) ++ sprintf(extra, "%s\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.", extra); ++ else ++ sprintf(extra, "%s\nSpecify carrier suppression but not CCK rate", extra); ++ } ++ SetCarrierSuppressionTx(padapter, (u8)bStartTest); ++ break; ++ case MP_SINGLE_CARRIER_TX: ++ if (bStartTest != 0) ++ sprintf(extra, "%s\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.", extra); ++ SetSingleCarrierTx(padapter, (u8)bStartTest); ++ break; ++ ++ default: ++ sprintf(extra, "Error! Continuous-Tx is not on-going."); ++ return -EFAULT; ++ } ++ ++ if (bStartTest == 1 && pmp_priv->mode != MP_ON) { ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ ++ if (pmp_priv->tx.stop == 0) { ++ pmp_priv->tx.stop = 1; ++ rtw_msleep_os(5); ++ } ++#ifdef CONFIG_80211N_HT ++ pmp_priv->tx.attrib.ht_en = 1; ++#endif ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = 1; ++ SetPacketTx(padapter); ++ } else ++ pmp_priv->mode = MP_ON; ++ ++#if defined(CONFIG_RTL8812A) ++ if (IS_HARDWARE_TYPE_8812AU(padapter)) { ++ /* <20130425, Kordan> Turn off OFDM Rx to prevent from CCA causing Tx hang.*/ ++ if (pmp_priv->mode == MP_PACKET_TX) ++ PHY_SetBBReg(padapter, rCCAonSec_Jaguar, BIT3, 1); ++ else ++ PHY_SetBBReg(padapter, rCCAonSec_Jaguar, BIT3, 0); ++ } ++#endif ++ ++ return 0; ++} ++ ++ ++int rtw_mp_tx(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.MptCtx); ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ ++ u32 bandwidth = 0, sg = 0, channel = 6, txpower = 40, rate = 108, ant = 0, txmode = 1, count = 0; ++ u8 i = 0, j = 0, bStartTest = 1, status = 0, Idx = 0, tmpU1B = 0; ++ u16 antenna = 0; ++ ++ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ DBG_871X("extra = %s\n", extra); ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->adapter_type == SECONDARY_ADAPTER) { ++ sprintf(extra, "Error: MP mode can't support Virtual Adapter, Please to use main Adapter.\n"); ++ wrqu->data.length = strlen(extra); ++ return 0; ++ } ++#endif ++ ++ if (strncmp(extra, "stop", 3) == 0) { ++ bStartTest = 0; /* To set Stop*/ ++ pmp_priv->tx.stop = 1; ++ sprintf(extra, "Stop continuous Tx"); ++ status = rtw_mp_pretx_proc(padapter, bStartTest, extra); ++ wrqu->data.length = strlen(extra); ++ return status; ++ } else if (strncmp(extra, "count", 5) == 0) { ++ if (sscanf(extra, "count=%d", &count) < 1) ++ DBG_871X("Got Count=%d]\n", count); ++ pmp_priv->tx.count = count; ++ return 0; ++ } else if (strncmp(extra, "setting", 7) == 0) { ++ _rtw_memset(extra, 0, wrqu->data.length); ++ sprintf(extra, "Current Setting :\n Channel:%d", pmp_priv->channel); ++ sprintf(extra, "%s\n Bandwidth:%d", extra, pmp_priv->bandwidth); ++ sprintf(extra, "%s\n Rate index:%d", extra, pmp_priv->rateidx); ++ sprintf(extra, "%s\n TxPower index:%d", extra, pmp_priv->txpoweridx); ++ sprintf(extra, "%s\n Antenna TxPath:%d", extra, pmp_priv->antenna_tx); ++ sprintf(extra, "%s\n Antenna RxPath:%d", extra, pmp_priv->antenna_rx); ++ sprintf(extra, "%s\n MP Mode:%d", extra, pmp_priv->mode); ++ wrqu->data.length = strlen(extra); ++ return 0; ++#ifdef CONFIG_MP_VHT_HW_TX_MODE ++ } else if (strncmp(extra, "pmact", 5) == 0) { ++ if (strncmp(extra, "pmact=", 6) == 0) { ++ _rtw_memset(&pMptCtx->PMacTxInfo, 0, sizeof(pMptCtx->PMacTxInfo)); ++ if (strncmp(extra, "pmact=start", 11) == 0) { ++ pMptCtx->PMacTxInfo.bEnPMacTx = _TRUE; ++ } else { ++ pMptCtx->PMacTxInfo.bEnPMacTx = _FALSE; ++ sprintf(extra, "Set PMac Tx Mode Stop\n"); ++ } ++ if (pMptCtx->bldpc == TRUE) ++ pMptCtx->PMacTxInfo.bLDPC = _TRUE; ++ ++ if (pMptCtx->bstbc == TRUE) ++ pMptCtx->PMacTxInfo.bSTBC = _TRUE; ++ ++ pMptCtx->PMacTxInfo.bSPreamble = pmp_priv->preamble; ++ pMptCtx->PMacTxInfo.bSGI = pmp_priv->preamble; ++ pMptCtx->PMacTxInfo.BandWidth = pmp_priv->bandwidth; ++ pMptCtx->PMacTxInfo.TX_RATE = HwRateToMPTRate(pmp_priv->rateidx); ++ ++ pMptCtx->PMacTxInfo.Mode = pMptCtx->HWTxmode; ++ ++ pMptCtx->PMacTxInfo.NDP_sound = FALSE;/*(Adapter.PacketType == NDP_PKT)?TRUE:FALSE;*/ ++ ++ if (padapter->mppriv.pktInterval == 0) ++ pMptCtx->PMacTxInfo.PacketPeriod = 100; ++ else ++ pMptCtx->PMacTxInfo.PacketPeriod = padapter->mppriv.pktInterval; ++ ++ if (padapter->mppriv.pktLength < 1000) ++ pMptCtx->PMacTxInfo.PacketLength = 1000; ++ else ++ pMptCtx->PMacTxInfo.PacketLength = padapter->mppriv.pktLength; ++ ++ pMptCtx->PMacTxInfo.PacketPattern = rtw_random32() % 0xFF; ++ ++ if (padapter->mppriv.tx_pktcount != 0) ++ pMptCtx->PMacTxInfo.PacketCount = padapter->mppriv.tx_pktcount; ++ ++ pMptCtx->PMacTxInfo.Ntx = 0; ++ for (Idx = 16; Idx < 20; Idx++) { ++ tmpU1B = (padapter->mppriv.antenna_tx >> Idx) & 1; ++ if (tmpU1B) ++ pMptCtx->PMacTxInfo.Ntx++; ++ } ++ ++ _rtw_memset(pMptCtx->PMacTxInfo.MacAddress, 0xFF, ETH_ALEN); ++ ++ PMAC_Get_Pkt_Param(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); ++ ++ if (MPT_IS_CCK_RATE(pMptCtx->PMacTxInfo.TX_RATE)) { ++ ++ CCK_generator(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); ++ } else { ++ PMAC_Nsym_generator(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); ++ /* 24 BIT*/ ++ L_SIG_generator(pMptCtx->PMacPktInfo.N_sym, &pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); ++ } ++ /* 48BIT*/ ++ if (MPT_IS_HT_RATE(pMptCtx->PMacTxInfo.TX_RATE)) ++ HT_SIG_generator(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); ++ else if (MPT_IS_VHT_RATE(pMptCtx->PMacTxInfo.TX_RATE)) { ++ /* 48BIT*/ ++ VHT_SIG_A_generator(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); ++ ++ /* 26/27/29 BIT & CRC 8 BIT*/ ++ VHT_SIG_B_generator(&pMptCtx->PMacTxInfo); ++ ++ /* 32 BIT*/ ++ VHT_Delimiter_generator(&pMptCtx->PMacTxInfo); ++ } ++ ++ mpt_ProSetPMacTx(padapter); ++ sprintf(extra, "Set PMac Tx Mode start\n"); ++ ++ } else if (strncmp(extra, "pmact,mode=", 11) == 0) { ++ int txmode = 0; ++ ++ if (sscanf(extra, "pmact,mode=%d", &txmode) > 0) { ++ if (txmode == 1) { ++ pMptCtx->HWTxmode = CONTINUOUS_TX; ++ sprintf(extra, "\t Config HW Tx mode = CONTINUOUS_TX\n"); ++ } else if (txmode == 2) { ++ pMptCtx->HWTxmode = OFDM_Single_Tone_TX; ++ sprintf(extra, "\t Config HW Tx mode = OFDM_Single_Tone_TX\n"); ++ } else { ++ pMptCtx->HWTxmode = PACKETS_TX; ++ sprintf(extra, "\t Config HW Tx mode = PACKETS_TX\n"); ++ } ++ } else { ++ pMptCtx->HWTxmode = PACKETS_TX; ++ sprintf(extra, "\t Config HW Tx mode=\n 0 = PACKETS_TX\n 1 = CONTINUOUS_TX\n 2 = OFDM_Single_Tone_TX"); ++ } ++ } else if (strncmp(extra, "pmact,", 6) == 0) { ++ int PacketPeriod = 0, PacketLength = 0, PacketCout = 0; ++ int bldpc = 0, bstbc = 0; ++ ++ if (sscanf(extra, "pmact,period=%d", &PacketPeriod) > 0) { ++ padapter->mppriv.pktInterval = PacketPeriod; ++ DBG_871X("PacketPeriod=%d\n", padapter->mppriv.pktInterval); ++ sprintf(extra, "PacketPeriod [1~255]= %d\n", padapter->mppriv.pktInterval); ++ ++ } else if (sscanf(extra, "pmact,length=%d", &PacketLength) > 0) { ++ padapter->mppriv.pktLength = PacketLength; ++ DBG_871X("PacketPeriod=%d\n", padapter->mppriv.pktLength); ++ sprintf(extra, "PacketLength[~65535]=%d\n", padapter->mppriv.pktLength); ++ ++ } else if (sscanf(extra, "pmact,count=%d", &PacketCout) > 0) { ++ padapter->mppriv.tx_pktcount = PacketCout; ++ DBG_871X("Packet Cout =%d\n", padapter->mppriv.tx_pktcount); ++ sprintf(extra, "Packet Cout =%d\n", padapter->mppriv.tx_pktcount); ++ ++ } else if (sscanf(extra, "pmact,ldpc=%d", &bldpc) > 0) { ++ pMptCtx->bldpc = bldpc; ++ DBG_871X("Set LDPC =%d\n", pMptCtx->bldpc); ++ sprintf(extra, "Set LDPC =%d\n", pMptCtx->bldpc); ++ ++ } else if (sscanf(extra, "pmact,stbc=%d", &bstbc) > 0) { ++ pMptCtx->bstbc = bstbc; ++ DBG_871X("Set STBC =%d\n", pMptCtx->bstbc); ++ sprintf(extra, "Set STBC =%d\n", pMptCtx->bstbc); ++ } else ++ sprintf(extra, "\n period={1~255}\n length={1000~65535}\n count={0~}\n ldpc={0/1}\n stbc={0/1}"); ++ ++ } ++ ++ wrqu->data.length = strlen(extra); ++ return 0; ++#endif ++ } else { ++ ++ if (sscanf(extra, "ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d", &channel, &bandwidth, &rate, &txpower, &ant, &txmode) < 6) { ++ DBG_871X("Invalid format [ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d]\n", channel, bandwidth, rate, txpower, ant, txmode); ++ _rtw_memset(extra, 0, wrqu->data.length); ++ sprintf(extra, "\n Please input correct format as bleow:\n"); ++ sprintf(extra, "%s\t ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d\n", extra, channel, bandwidth, rate, txpower, ant, txmode); ++ sprintf(extra, "%s\n [ ch : BGN = <1~14> , A or AC = <36~165> ]", extra); ++ sprintf(extra, "%s\n [ bw : Bandwidth: 0 = 20M, 1 = 40M, 2 = 80M ]", extra); ++ sprintf(extra, "%s\n [ rate : CCK: 1 2 5.5 11M X 2 = < 2 4 11 22 >]", extra); ++ sprintf(extra, "%s\n [ OFDM: 6 9 12 18 24 36 48 54M X 2 = < 12 18 24 36 48 72 96 108>", extra); ++ sprintf(extra, "%s\n [ HT 1S2SS MCS0 ~ MCS15 : < [MCS0]=128 ~ [MCS7]=135 ~ [MCS15]=143 >", extra); ++ sprintf(extra, "%s\n [ HT 3SS MCS16 ~ MCS32 : < [MCS16]=144 ~ [MCS23]=151 ~ [MCS32]=159 >", extra); ++ sprintf(extra, "%s\n [ VHT 1SS MCS0 ~ MCS9 : < [MCS0]=160 ~ [MCS9]=169 >", extra); ++ sprintf(extra, "%s\n [ txpower : 1~63 power index", extra); ++ sprintf(extra, "%s\n [ ant : ,2T ex: AB=3 BC=6 CD=12", extra); ++ sprintf(extra, "%s\n [ txmode : < 0 = CONTINUOUS_TX, 1 = PACKET_TX, 2 = SINGLE_TONE_TX, 3 = CARRIER_SUPPRISSION_TX, 4 = SINGLE_CARRIER_TX>\n", extra); ++ wrqu->data.length = strlen(extra); ++ return status; ++ ++ } else { ++ DBG_871X("Got format [ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d]\n", channel, bandwidth, rate, txpower, ant, txmode); ++ _rtw_memset(extra, 0, wrqu->data.length); ++ sprintf(extra, "Change Current channel %d to channel %d", padapter->mppriv.channel , channel); ++ padapter->mppriv.channel = channel; ++ SetChannel(padapter); ++ pHalData->CurrentChannel = channel; ++ ++ if (bandwidth == 1) ++ bandwidth = CHANNEL_WIDTH_40; ++ else if (bandwidth == 2) ++ bandwidth = CHANNEL_WIDTH_80; ++ sprintf(extra, "%s\nChange Current Bandwidth %d to Bandwidth %d", extra, padapter->mppriv.bandwidth , bandwidth); ++ padapter->mppriv.bandwidth = (u8)bandwidth; ++ padapter->mppriv.preamble = sg; ++ SetBandwidth(padapter); ++ pHalData->CurrentChannelBW = bandwidth; ++ ++ sprintf(extra, "%s\nSet power level :%d", extra, txpower); ++ padapter->mppriv.txpoweridx = (u8)txpower; ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_A] = (u8)txpower; ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_B] = (u8)txpower; ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_C] = (u8)txpower; ++ pMptCtx->TxPwrLevel[ODM_RF_PATH_D] = (u8)txpower; ++ ++ DBG_871X("%s: bw=%d sg=%d\n", __func__, bandwidth, sg); ++ ++ if (rate <= 0x7f) ++ rate = wifirate2_ratetbl_inx((u8)rate); ++ else if (rate < 0xC8) ++ rate = (rate - 0x80 + MPT_RATE_MCS0); ++ /*HT rate 0x80(MCS0) ~ 0x8F(MCS15) ~ 0x9F(MCS31) 128~159 ++ VHT1SS~2SS rate 0xA0 (VHT1SS_MCS0 44) ~ 0xB3 (VHT2SS_MCS9 #63) 160~179 ++ VHT rate 0xB4 (VHT3SS_MCS0 64) ~ 0xC7 (VHT2SS_MCS9 #83) 180~199 ++ else ++ VHT rate 0x90(VHT1SS_MCS0) ~ 0x99(VHT1SS_MCS9) 144~153 ++ rate =(rate - MPT_RATE_VHT1SS_MCS0); ++ */ ++ DBG_871X("%s: rate index=%d\n", __func__, rate); ++ if (rate >= MPT_RATE_LAST) ++ return -EINVAL; ++ sprintf(extra, "%s\nSet data rate to %d index %d", extra, padapter->mppriv.rateidx, rate); ++ ++ padapter->mppriv.rateidx = rate; ++ pMptCtx->MptRateIndex = rate; ++ SetDataRate(padapter); ++ ++ sprintf(extra, "%s\nSet Antenna Path :%d", extra, ant); ++ switch (ant) { ++ case 1: ++ antenna = ANTENNA_A; ++ break; ++ case 2: ++ antenna = ANTENNA_B; ++ break; ++ case 4: ++ antenna = ANTENNA_C; ++ break; ++ case 8: ++ antenna = ANTENNA_D; ++ break; ++ case 3: ++ antenna = ANTENNA_AB; ++ break; ++ case 5: ++ antenna = ANTENNA_AC; ++ break; ++ case 9: ++ antenna = ANTENNA_AD; ++ break; ++ case 6: ++ antenna = ANTENNA_BC; ++ break; ++ case 10: ++ antenna = ANTENNA_BD; ++ break; ++ case 12: ++ antenna = ANTENNA_CD; ++ break; ++ case 7: ++ antenna = ANTENNA_ABC; ++ break; ++ case 14: ++ antenna = ANTENNA_BCD; ++ break; ++ case 11: ++ antenna = ANTENNA_ABD; ++ break; ++ case 15: ++ antenna = ANTENNA_ABCD; ++ break; ++ } ++ DBG_871X("%s: antenna=0x%x\n", __func__, antenna); ++ padapter->mppriv.antenna_tx = antenna; ++ padapter->mppriv.antenna_rx = antenna; ++ pHalData->AntennaTxPath = antenna; ++ SetAntenna(padapter); ++ ++ if (txmode == 0) { ++ pmp_priv->mode = MP_CONTINUOUS_TX; ++ } else if (txmode == 1) { ++ pmp_priv->mode = MP_PACKET_TX; ++ pmp_priv->tx.count = count; ++ } else if (txmode == 2) { ++ pmp_priv->mode = MP_SINGLE_TONE_TX; ++ } else if (txmode == 3) { ++ pmp_priv->mode = MP_CARRIER_SUPPRISSION_TX; ++ } else if (txmode == 4) { ++ pmp_priv->mode = MP_SINGLE_CARRIER_TX; ++ } ++ ++ status = rtw_mp_pretx_proc(padapter, bStartTest, extra); ++ } ++ ++ } ++ ++ wrqu->data.length = strlen(extra); ++ return status; ++} ++ ++ ++int rtw_mp_rx(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.MptCtx); ++ ++ u32 bandwidth = 0, sg = 0, channel = 6, ant = 0; ++ u16 antenna = 0; ++ u8 bStartRx = 0; ++ ++ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->adapter_type == SECONDARY_ADAPTER) { ++ sprintf(extra, "Error: MP mode can't support Virtual Adapter, Please to use main Adapter.\n"); ++ wrqu->data.length = strlen(extra); ++ return 0; ++ } ++#endif ++ ++ if (strncmp(extra, "stop", 4) == 0) { ++ _rtw_memset(extra, 0, wrqu->data.length); ++ SetPacketRx(padapter, bStartRx, _FALSE); ++ pmp_priv->bmac_filter = _FALSE; ++ sprintf(extra, "Received packet OK:%d CRC error:%d ,Filter out:%d", padapter->mppriv.rx_pktcount, padapter->mppriv.rx_crcerrpktcount, padapter->mppriv.rx_pktcount_filter_out); ++ wrqu->data.length = strlen(extra); ++ return 0; ++ ++ } else if (sscanf(extra, "ch=%d,bw=%d,ant=%d", &channel, &bandwidth, &ant) < 3) { ++ DBG_871X("Invalid format [ch=%d,bw=%d,ant=%d]\n", channel, bandwidth, ant); ++ _rtw_memset(extra, 0, wrqu->data.length); ++ sprintf(extra, "\n Please input correct format as bleow:\n"); ++ sprintf(extra, "%s\t ch=%d,bw=%d,ant=%d\n", extra, channel, bandwidth, ant); ++ sprintf(extra, "%s\n [ ch : BGN = <1~14> , A or AC = <36~165> ]", extra); ++ sprintf(extra, "%s\n [ bw : Bandwidth: 0 = 20M, 1 = 40M, 2 = 80M ]", extra); ++ sprintf(extra, "%s\n [ ant : ,2T ex: AB=3 BC=6 CD=12", extra); ++ wrqu->data.length = strlen(extra); ++ return 0; ++ ++ } else { ++ bStartRx = 1; ++ DBG_871X("Got format [ch=%d,bw=%d,ant=%d]\n", channel, bandwidth, ant); ++ _rtw_memset(extra, 0, wrqu->data.length); ++ sprintf(extra, "Change Current channel %d to channel %d", padapter->mppriv.channel , channel); ++ padapter->mppriv.channel = channel; ++ SetChannel(padapter); ++ pHalData->CurrentChannel = channel; ++ ++ if (bandwidth == 1) ++ bandwidth = CHANNEL_WIDTH_40; ++ else if (bandwidth == 2) ++ bandwidth = CHANNEL_WIDTH_80; ++ sprintf(extra, "%s\nChange Current Bandwidth %d to Bandwidth %d", extra, padapter->mppriv.bandwidth , bandwidth); ++ padapter->mppriv.bandwidth = (u8)bandwidth; ++ padapter->mppriv.preamble = sg; ++ SetBandwidth(padapter); ++ pHalData->CurrentChannelBW = bandwidth; ++ ++ sprintf(extra, "%s\nSet Antenna Path :%d", extra, ant); ++ switch (ant) { ++ case 1: ++ antenna = ANTENNA_A; ++ break; ++ case 2: ++ antenna = ANTENNA_B; ++ break; ++ case 4: ++ antenna = ANTENNA_C; ++ break; ++ case 8: ++ antenna = ANTENNA_D; ++ break; ++ case 3: ++ antenna = ANTENNA_AB; ++ break; ++ case 5: ++ antenna = ANTENNA_AC; ++ break; ++ case 9: ++ antenna = ANTENNA_AD; ++ break; ++ case 6: ++ antenna = ANTENNA_BC; ++ break; ++ case 10: ++ antenna = ANTENNA_BD; ++ break; ++ case 12: ++ antenna = ANTENNA_CD; ++ break; ++ case 7: ++ antenna = ANTENNA_ABC; ++ break; ++ case 14: ++ antenna = ANTENNA_BCD; ++ break; ++ case 11: ++ antenna = ANTENNA_ABD; ++ break; ++ case 15: ++ antenna = ANTENNA_ABCD; ++ break; ++ } ++ DBG_871X("%s: antenna=0x%x\n", __func__, antenna); ++ padapter->mppriv.antenna_tx = antenna; ++ padapter->mppriv.antenna_rx = antenna; ++ pHalData->AntennaTxPath = antenna; ++ SetAntenna(padapter); ++ ++ sprintf(extra, "%s\nstart Rx", extra); ++ SetPacketRx(padapter, bStartRx, _FALSE); ++ } ++ wrqu->data.length = strlen(extra); ++ return 0; ++} ++ ++ ++int rtw_mp_hwtx(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.MptCtx); ++ ++#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) ++ u8 input[wrqu->data.length]; ++ ++ if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ ++ _rtw_memset(&pMptCtx->PMacTxInfo, 0, sizeof(RT_PMAC_TX_INFO)); ++ _rtw_memcpy((void *)&pMptCtx->PMacTxInfo, (void *)input, sizeof(RT_PMAC_TX_INFO)); ++ ++ mpt_ProSetPMacTx(padapter); ++ sprintf(extra, "Set PMac Tx Mode start\n"); ++ ++ wrqu->data.length = strlen(extra); ++#endif ++ return 0; ++ ++} ++ ++int rtw_efuse_mask_file(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ char *rtw_efuse_mask_file_path; ++ u8 Status; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ _rtw_memset(maskfileBuffer, 0x00, sizeof(maskfileBuffer)); ++ ++ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ ++ if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) { ++ padapter->registrypriv.boffefusemask = 1; ++ sprintf(extra, "Turn off Efuse Mask\n"); ++ wrqu->data.length = strlen(extra); ++ return 0; ++ } ++ if (strncmp(extra, "on", 2) == 0 && strlen(extra) < 3) { ++ padapter->registrypriv.boffefusemask = 0; ++ sprintf(extra, "Turn on Efuse Mask\n"); ++ wrqu->data.length = strlen(extra); ++ return 0; ++ } ++ rtw_efuse_mask_file_path = extra; ++ ++ if (rtw_is_file_readable(rtw_efuse_mask_file_path) == _TRUE) { ++ DBG_871X("%s do rtw_efuse_mask_file_read = %s! ,sizeof maskfileBuffer %zu\n", __func__, rtw_efuse_mask_file_path, sizeof(maskfileBuffer)); ++ Status = rtw_efuse_file_read(padapter, rtw_efuse_mask_file_path, maskfileBuffer, sizeof(maskfileBuffer)); ++ if (Status == _TRUE) ++ padapter->registrypriv.bFileMaskEfuse = _TRUE; ++ sprintf(extra, "efuse mask file read OK\n"); ++ } else { ++ padapter->registrypriv.bFileMaskEfuse = _FALSE; ++ sprintf(extra, "efuse mask file readable FAIL\n"); ++ DBG_871X("%s rtw_is_file_readable fail!\n", __func__); ++ } ++ wrqu->data.length = strlen(extra); ++ return 0; ++} ++ ++ ++int rtw_efuse_file_map(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ char *rtw_efuse_file_map_path; ++ u8 Status; ++ PEFUSE_HAL pEfuseHal; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ pEfuseHal = &pHalData->EfuseHal; ++ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ ++ rtw_efuse_file_map_path = extra; ++ ++ if (rtw_is_file_readable(rtw_efuse_file_map_path) == _TRUE) { ++ DBG_871X("%s do rtw_efuse_mask_file_read = %s!\n", __func__, rtw_efuse_file_map_path); ++ Status = rtw_efuse_file_read(padapter, rtw_efuse_file_map_path, pEfuseHal->fakeEfuseModifiedMap, sizeof(pEfuseHal->fakeEfuseModifiedMap)); ++ if (Status == _TRUE) ++ sprintf(extra, "efuse file file_read OK\n"); ++ else ++ sprintf(extra, "efuse file file_read FAIL\n"); ++ } else { ++ sprintf(extra, "efuse file readable FAIL\n"); ++ DBG_871X("%s rtw_is_file_readable fail!\n", __func__); ++ } ++ wrqu->data.length = strlen(extra); ++ return 0; ++} ++ ++#if defined(CONFIG_RTL8723B) ++int rtw_mp_SetBT(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ struct hal_ops *pHalFunc = &padapter->HalFunc; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ BT_REQ_CMD BtReq; ++ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.MptCtx); ++ PBT_RSP_CMD pBtRsp = (PBT_RSP_CMD)&pMptCtx->mptOutBuf[0]; ++ char input[128]; ++ char *pch, *ptmp, *token, *tmp[2] = {0x00, 0x00}; ++ u8 setdata[100]; ++ u8 resetbt = 0x00; ++ u8 tempval, BTStatus; ++ u8 H2cSetbtmac[6]; ++ u8 u1H2CBtMpOperParm[4] = {0x01}; ++ int testmode = 1, ready = 1, trxparam = 1, setgen = 1, getgen = 1, testctrl = 1, testbt = 1, readtherm = 1, setbtmac = 1; ++ u32 i = 0, ii = 0, jj = 0, kk = 0, cnts = 0, status = 0; ++ PRT_MP_FIRMWARE pBTFirmware = NULL; ++ ++ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) ++ return -EFAULT; ++ if (strlen(extra) < 1) ++ return -EFAULT; ++ ++ DBG_871X("%s:iwpriv in=%s\n", __func__, extra); ++ ready = strncmp(extra, "ready", 5); ++ testmode = strncmp(extra, "testmode", 8); /* strncmp TRUE is 0*/ ++ trxparam = strncmp(extra, "trxparam", 8); ++ setgen = strncmp(extra, "setgen", 6); ++ getgen = strncmp(extra, "getgen", 6); ++ testctrl = strncmp(extra, "testctrl", 8); ++ testbt = strncmp(extra, "testbt", 6); ++ readtherm = strncmp(extra, "readtherm", 9); ++ setbtmac = strncmp(extra, "setbtmac", 8); ++ ++ if (strncmp(extra, "dlbt", 4) == 0) { ++ pHalData->LastHMEBoxNum = 0; ++ padapter->bBTFWReady = _FALSE; ++ rtw_write8(padapter, 0xa3, 0x05); ++ BTStatus = rtw_read8(padapter, 0xa0); ++ DBG_871X("%s: btwmap before read 0xa0 BT Status =0x%x\n", __func__, BTStatus); ++ if (BTStatus != 0x04) { ++ sprintf(extra, "BT Status not Active DLFW FAIL\n"); ++ goto exit; ++ } ++ ++ tempval = rtw_read8(padapter, 0x6B); ++ tempval |= BIT7; ++ rtw_write8(padapter, 0x6B, tempval); ++ ++ /* Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay*/ ++ /* So don't write 0x6A[14]=1 and 0x6A[15]=0 together!*/ ++ rtw_usleep_os(100); ++ /* disable BT power cut*/ ++ /* 0x6A[14] = 0*/ ++ tempval = rtw_read8(padapter, 0x6B); ++ tempval &= ~BIT6; ++ rtw_write8(padapter, 0x6B, tempval); ++ rtw_usleep_os(100); ++ MPT_PwrCtlDM(padapter, 0); ++ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) | 0x00000004)); ++ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) & 0xFFFFFFEF)); ++ rtw_msleep_os(600); ++ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) | 0x00000010)); ++ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) & 0xFFFFFFFB)); ++ rtw_msleep_os(1200); ++ pBTFirmware = (PRT_MP_FIRMWARE)rtw_zmalloc(sizeof(RT_MP_FIRMWARE)); ++ if (pBTFirmware == NULL) ++ goto exit; ++ padapter->bBTFWReady = _FALSE; ++ FirmwareDownloadBT(padapter, pBTFirmware); ++ if (pBTFirmware) ++ rtw_mfree((u8 *)pBTFirmware, sizeof(RT_MP_FIRMWARE)); ++ ++ DBG_871X("Wait for FirmwareDownloadBT fw boot!\n"); ++ rtw_msleep_os(2000); ++ _rtw_memset(extra, '\0', wrqu->data.length); ++ BtReq.opCodeVer = 1; ++ BtReq.OpCode = 0; ++ BtReq.paraLength = 0; ++ mptbt_BtControlProcess(padapter, &BtReq); ++ rtw_msleep_os(100); ++ ++ DBG_8192C("FirmwareDownloadBT ready = 0x%x 0x%x", pMptCtx->mptOutBuf[4], pMptCtx->mptOutBuf[5]); ++ if ((pMptCtx->mptOutBuf[4] == 0x00) && (pMptCtx->mptOutBuf[5] == 0x00)) { ++ ++ if (padapter->mppriv.bTxBufCkFail == _TRUE) ++ sprintf(extra, "check TxBuf Fail.\n"); ++ else ++ sprintf(extra, "download FW Fail.\n"); ++ } else { ++ sprintf(extra, "download FW OK.\n"); ++ goto exit; ++ } ++ goto exit; ++ } ++ if (strncmp(extra, "dlfw", 4) == 0) { ++ pHalData->LastHMEBoxNum = 0; ++ padapter->bBTFWReady = _FALSE; ++ rtw_write8(padapter, 0xa3, 0x05); ++ BTStatus = rtw_read8(padapter, 0xa0); ++ DBG_871X("%s: btwmap before read 0xa0 BT Status =0x%x\n", __func__, BTStatus); ++ if (BTStatus != 0x04) { ++ sprintf(extra, "BT Status not Active DLFW FAIL\n"); ++ goto exit; ++ } ++ ++ tempval = rtw_read8(padapter, 0x6B); ++ tempval |= BIT7; ++ rtw_write8(padapter, 0x6B, tempval); ++ ++ /* Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay*/ ++ /* So don't write 0x6A[14]=1 and 0x6A[15]=0 together!*/ ++ rtw_usleep_os(100); ++ /* disable BT power cut*/ ++ /* 0x6A[14] = 0*/ ++ tempval = rtw_read8(padapter, 0x6B); ++ tempval &= ~BIT6; ++ rtw_write8(padapter, 0x6B, tempval); ++ rtw_usleep_os(100); ++ ++ MPT_PwrCtlDM(padapter, 0); ++ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) | 0x00000004)); ++ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) & 0xFFFFFFEF)); ++ rtw_msleep_os(600); ++ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) | 0x00000010)); ++ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) & 0xFFFFFFFB)); ++ rtw_msleep_os(1200); ++ ++#if defined(CONFIG_PLATFORM_SPRD) && (MP_DRIVER == 1) ++ /* Pull up BT reset pin.*/ ++ DBG_871X("%s: pull up BT reset pin when bt start mp test\n", __func__); ++ rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON); ++#endif ++ DBG_871X(" FirmwareDownload!\n"); ++ ++#if defined(CONFIG_RTL8723B) ++ status = rtl8723b_FirmwareDownload(padapter, _FALSE); ++#endif ++ DBG_871X("Wait for FirmwareDownloadBT fw boot!\n"); ++ rtw_msleep_os(1000); ++#ifdef CONFIG_BT_COEXIST ++ rtw_btcoex_HaltNotify(padapter); ++ DBG_871X("SetBT btcoex HaltNotify !\n"); ++ /*hal_btcoex1ant_SetAntPath(padapter);*/ ++ rtw_btcoex_SetManualControl(padapter, _TRUE); ++#endif ++ _rtw_memset(extra, '\0', wrqu->data.length); ++ BtReq.opCodeVer = 1; ++ BtReq.OpCode = 0; ++ BtReq.paraLength = 0; ++ mptbt_BtControlProcess(padapter, &BtReq); ++ rtw_msleep_os(200); ++ ++ DBG_8192C("FirmwareDownloadBT ready = 0x%x 0x%x", pMptCtx->mptOutBuf[4], pMptCtx->mptOutBuf[5]); ++ if ((pMptCtx->mptOutBuf[4] == 0x00) && (pMptCtx->mptOutBuf[5] == 0x00)) { ++ if (padapter->mppriv.bTxBufCkFail == _TRUE) ++ sprintf(extra, "check TxBuf Fail.\n"); ++ else ++ sprintf(extra, "download FW Fail.\n"); ++ } else { ++#ifdef CONFIG_BT_COEXIST ++ rtw_btcoex_SwitchBtTRxMask(padapter); ++#endif ++ rtw_msleep_os(200); ++ sprintf(extra, "download FW OK.\n"); ++ goto exit; ++ } ++ goto exit; ++ } ++ ++ if (strncmp(extra, "down", 4) == 0) { ++ DBG_871X("SetBT down for to hal_init !\n"); ++#ifdef CONFIG_BT_COEXIST ++ rtw_btcoex_SetManualControl(padapter, _FALSE); ++ rtw_btcoex_Initialize(padapter); ++#endif ++ pHalFunc->read_adapter_info(padapter); ++ pHalFunc->hal_deinit(padapter); ++ pHalFunc->hal_init(padapter); ++ rtw_pm_set_ips(padapter, IPS_NONE); ++ LeaveAllPowerSaveMode(padapter); ++ MPT_PwrCtlDM(padapter, 0); ++ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) | 0x00000004)); ++ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) & 0xFFFFFFEF)); ++ rtw_msleep_os(600); ++ /*rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a)& 0xFFFFFFFE));*/ ++ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) | 0x00000010)); ++ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) & 0xFFFFFFFB)); ++ rtw_msleep_os(1200); ++ goto exit; ++ } ++ if (strncmp(extra, "disable", 7) == 0) { ++ DBG_871X("SetBT disable !\n"); ++ rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a) & 0xFFFFFFFB)); ++ rtw_msleep_os(500); ++ goto exit; ++ } ++ if (strncmp(extra, "enable", 6) == 0) { ++ DBG_871X("SetBT enable !\n"); ++ rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a) | 0x00000004)); ++ rtw_msleep_os(500); ++ goto exit; ++ } ++ if (strncmp(extra, "h2c", 3) == 0) { ++ DBG_871X("SetBT h2c !\n"); ++ padapter->bBTFWReady = _TRUE; ++ rtw_hal_fill_h2c_cmd(padapter, 0x63, 1, u1H2CBtMpOperParm); ++ goto exit; ++ } ++ if (strncmp(extra, "2ant", 4) == 0) { ++ DBG_871X("Set BT 2ant use!\n"); ++ PHY_SetMacReg(padapter, 0x67, BIT5, 0x1); ++ rtw_write32(padapter, 0x948, 0000); ++ ++ goto exit; ++ } ++ ++ if (ready != 0 && testmode != 0 && trxparam != 0 && setgen != 0 && getgen != 0 && testctrl != 0 && testbt != 0 && readtherm != 0 && setbtmac != 0) ++ return -EFAULT; ++ ++ if (testbt == 0) { ++ BtReq.opCodeVer = 1; ++ BtReq.OpCode = 6; ++ BtReq.paraLength = cnts / 2; ++ goto todo; ++ } ++ if (ready == 0) { ++ BtReq.opCodeVer = 1; ++ BtReq.OpCode = 0; ++ BtReq.paraLength = 0; ++ goto todo; ++ } ++ ++ pch = extra; ++ i = 0; ++ while ((token = strsep(&pch, ",")) != NULL) { ++ if (i > 1) ++ break; ++ tmp[i] = token; ++ i++; ++ } ++ ++ if ((tmp[0] != NULL) && (tmp[1] != NULL)) { ++ cnts = strlen(tmp[1]); ++ if (cnts < 1) ++ return -EFAULT; ++ ++ DBG_871X("%s: cnts=%d\n", __func__, cnts); ++ DBG_871X("%s: data=%s\n", __func__, tmp[1]); ++ ++ for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) { ++ BtReq.pParamStart[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); ++ /* DBG_871X("BtReq.pParamStart[%d]=0x%02x\n", jj, BtReq.pParamStart[jj]);*/ ++ } ++ } else ++ return -EFAULT; ++ ++ if (testmode == 0) { ++ BtReq.opCodeVer = 1; ++ BtReq.OpCode = 1; ++ BtReq.paraLength = 1; ++ } ++ if (trxparam == 0) { ++ BtReq.opCodeVer = 1; ++ BtReq.OpCode = 2; ++ BtReq.paraLength = cnts / 2; ++ } ++ if (setgen == 0) { ++ DBG_871X("%s: BT_SET_GENERAL\n", __func__); ++ BtReq.opCodeVer = 1; ++ BtReq.OpCode = 3;/*BT_SET_GENERAL 3*/ ++ BtReq.paraLength = cnts / 2; ++ } ++ if (getgen == 0) { ++ DBG_871X("%s: BT_GET_GENERAL\n", __func__); ++ BtReq.opCodeVer = 1; ++ BtReq.OpCode = 4;/*BT_GET_GENERAL 4*/ ++ BtReq.paraLength = cnts / 2; ++ } ++ if (readtherm == 0) { ++ DBG_871X("%s: BT_GET_GENERAL\n", __func__); ++ BtReq.opCodeVer = 1; ++ BtReq.OpCode = 4;/*BT_GET_GENERAL 4*/ ++ BtReq.paraLength = cnts / 2; ++ } ++ ++ if (testctrl == 0) { ++ DBG_871X("%s: BT_TEST_CTRL\n", __func__); ++ BtReq.opCodeVer = 1; ++ BtReq.OpCode = 5;/*BT_TEST_CTRL 5*/ ++ BtReq.paraLength = cnts / 2; ++ } ++ ++ DBG_871X("%s: Req opCodeVer=%d OpCode=%d paraLength=%d\n", ++ __func__, BtReq.opCodeVer, BtReq.OpCode, BtReq.paraLength); ++ ++ if (BtReq.paraLength < 1) ++ goto todo; ++ for (i = 0; i < BtReq.paraLength; i++) { ++ DBG_871X("%s: BtReq.pParamStart[%d] = 0x%02x\n", ++ __func__, i, BtReq.pParamStart[i]); ++ } ++ ++todo: ++ _rtw_memset(extra, '\0', wrqu->data.length); ++ ++ if (padapter->bBTFWReady == _FALSE) { ++ sprintf(extra, "BTFWReady = FALSE.\n"); ++ goto exit; ++ } ++ ++ mptbt_BtControlProcess(padapter, &BtReq); ++ ++ if (readtherm == 0) { ++ sprintf(extra, "BT thermal="); ++ for (i = 4; i < pMptCtx->mptOutLen; i++) { ++ if ((pMptCtx->mptOutBuf[i] == 0x00) && (pMptCtx->mptOutBuf[i + 1] == 0x00)) ++ goto exit; ++ ++ sprintf(extra, "%s %d ", extra, (pMptCtx->mptOutBuf[i] & 0x1f)); ++ } ++ } else { ++ for (i = 4; i < pMptCtx->mptOutLen; i++) ++ sprintf(extra, "%s 0x%x ", extra, pMptCtx->mptOutBuf[i]); ++ } ++ ++exit: ++ wrqu->data.length = strlen(extra) + 1; ++ DBG_871X("-%s: output len=%d data=%s\n", __func__, wrqu->data.length, extra); ++ ++ return status; ++} ++ ++#endif /*#ifdef CONFIG_RTL8723B*/ ++ ++#endif +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/mlme_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/mlme_linux.c +old mode 100755 +new mode 100644 +index ba0ab12..c9659ed +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/mlme_linux.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/mlme_linux.c +@@ -128,6 +128,10 @@ void rtw_init_mlme_timer(_adapter *padapter) + //_init_timer(&(pmlmepriv->sitesurveyctrl.sitesurvey_ctrl_timer), padapter->pnetdev, sitesurvey_ctrl_handler, padapter); + _init_timer(&(pmlmepriv->scan_to_timer), padapter->pnetdev, _rtw_scan_timeout_handler, padapter); + ++ #ifdef CONFIG_DFS_MASTER ++ _init_timer(&(pmlmepriv->dfs_master_timer), padapter->pnetdev, rtw_dfs_master_timer_hdl, padapter); ++ #endif ++ + _init_timer(&(pmlmepriv->dynamic_chk_timer), padapter->pnetdev, _dynamic_check_timer_handlder, padapter); + + #ifdef CONFIG_SET_SCAN_DENY_TIMER +@@ -245,9 +249,11 @@ void rtw_reset_securitypriv( _adapter *adapter ) + } + // add for CONFIG_IEEE80211W, none 11w also can use + _exit_critical_bh(&adapter->security_key_mutex, &irqL); ++ ++ DBG_871X(FUNC_ADPT_FMT" - End to Disconnect\n", FUNC_ADPT_ARG(adapter)); + } + +-void rtw_os_indicate_disconnect( _adapter *adapter ) ++void rtw_os_indicate_disconnect(_adapter *adapter, u16 reason, u8 locally_generated) + { + //RT_PMKID_LIST backupPMKIDList[ NUM_PMKID_CACHE ]; + +@@ -256,7 +262,7 @@ _func_enter_; + netif_carrier_off(adapter->pnetdev); // Do it first for tx broadcast pkt after disconnection issue! + + #ifdef CONFIG_IOCTL_CFG80211 +- rtw_cfg80211_indicate_disconnect(adapter); ++ rtw_cfg80211_indicate_disconnect(adapter, reason, locally_generated); + #endif //CONFIG_IOCTL_CFG80211 + + rtw_indicate_wx_disassoc_event(adapter); +@@ -344,11 +350,19 @@ void _addba_timer_hdl(void *FunctionContext) + } + + #ifdef CONFIG_IEEE80211W ++ + void _sa_query_timer_hdl (void *FunctionContext) + { +- _adapter *padapter = (_adapter *)FunctionContext; +- sa_query_timer_hdl(padapter); ++ struct sta_info *psta = (struct sta_info *)FunctionContext; ++ ++ sa_query_timer_hdl(psta); + } ++ ++void init_dot11w_expire_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ _init_timer(&psta->dot11w_expire_timer, padapter->pnetdev, _sa_query_timer_hdl, psta); ++} ++ + #endif //CONFIG_IEEE80211W + + void init_addba_retry_timer(_adapter *padapter, struct sta_info *psta) +@@ -377,9 +391,7 @@ void init_mlme_ext_timer(_adapter *padapter) + + _init_timer(&pmlmeext->survey_timer, padapter->pnetdev, _survey_timer_hdl, padapter); + _init_timer(&pmlmeext->link_timer, padapter->pnetdev, _link_timer_hdl, padapter); +-#ifdef CONFIG_IEEE80211W +- _init_timer(&pmlmeext->sa_query_timer, padapter->pnetdev, _sa_query_timer_hdl, padapter); +-#endif //CONFIG_IEEE80211W ++ + //_init_timer(&pmlmeext->ADDBA_timer, padapter->pnetdev, _addba_timer_hdl, padapter); + + //_init_timer(&pmlmeext->reauth_timer, padapter->pnetdev, _reauth_timer_hdl, padapter); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/os_intfs.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/os_intfs.c +old mode 100755 +new mode 100644 +index 1eef779..ff20062 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/os_intfs.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/os_intfs.c +@@ -54,11 +54,7 @@ int rtw_adhoc_tx_pwr = 1; + int rtw_soft_ap = 0; + //int smart_ps = 1; + #ifdef CONFIG_POWER_SAVING +-#ifdef CONFIG_PLATFORM_INTEL_BYT + int rtw_power_mgnt = PS_MODE_MAX; +-#else +-int rtw_power_mgnt = PS_MODE_MIN; +-#endif + #ifdef CONFIG_IPS_LEVEL_2 + int rtw_ips_mode = IPS_LEVEL_2; + #else +@@ -103,14 +99,17 @@ int rtw_uapsd_acbk_en = 0; + int rtw_uapsd_acbe_en = 0; + int rtw_uapsd_acvi_en = 0; + int rtw_uapsd_acvo_en = 0; +- ++#ifdef CONFIG_RTL8814A ++int rtw_rfkfree_enable = 2; /* disable kfree */ ++#else ++int rtw_rfkfree_enable = 0; /* Default Enalbe kfree by efuse config */ ++#endif + #ifdef CONFIG_80211N_HT + int rtw_ht_enable = 1; + // 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz, 4: 80+80MHz + // 2.4G use bit 0 ~ 3, 5G use bit 4 ~ 7 + // 0x21 means enable 2.4G 40MHz & 5G 80MHz + int rtw_bw_mode = 0x21; +-int rtw_cbw40_enable = 3; // 0 :diable, bit(0): enable 2.4g, bit(1): enable 5g + int rtw_ampdu_enable = 1;//for enable tx_ampdu ,// 0: disable, 0x1:enable (but wifi_spec should be 0), 0x2: force enable (don't care wifi_spec) + int rtw_rx_stbc = 1;// 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ + int rtw_ampdu_amsdu = 0;// 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on +@@ -121,11 +120,14 @@ int rtw_ampdu_amsdu = 0;// 0: disabled, 1:enabled, 2:auto . There is an IOT issu + // BIT3 - 160MHz, 0: non-support, 1: support + int rtw_short_gi = 0xf; + // BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx +-int rtw_ldpc_cap = 0x33; ++int rtw_ldpc_cap = 0x00; + // BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx + int rtw_stbc_cap = 0x13; + // BIT0: Enable VHT Beamformer, BIT1: Enable VHT Beamformee, BIT4: Enable HT Beamformer, BIT5: Enable HT Beamformee + int rtw_beamform_cap = 0x2; ++int rtw_bfer_rf_number = 0; /*BeamformerCapRfNum Rf path number, 0 for auto, others for manual*/ ++int rtw_bfee_rf_number = 0; /*BeamformeeCapRfNum Rf path number, 0 for auto, others for manual*/ ++ + #endif //CONFIG_80211N_HT + + #ifdef CONFIG_80211AC_VHT +@@ -138,6 +140,7 @@ int rtw_lowrate_two_xmit = 1;//Use 2 path Tx to transmit MCS0~7 and legacy mode + + //int rf_config = RF_1T2R; // 1T2R + int rtw_rf_config = RF_MAX_TYPE; //auto ++ + int rtw_low_power = 0; + #ifdef CONFIG_WIFI_TEST + int rtw_wifi_spec = 1;//for wifi test +@@ -147,7 +150,22 @@ int rtw_wifi_spec = 0; + + int rtw_special_rf_path = 0; //0: 2T2R ,1: only turn on path A 1T1R + +-int rtw_channel_plan = RT_CHANNEL_DOMAIN_MAX; ++char rtw_country_unspecified[] = {0xFF, 0xFF, 0x00}; ++char *rtw_country_code = rtw_country_unspecified; ++module_param(rtw_country_code, charp, 0644); ++MODULE_PARM_DESC(rtw_country_code, "The default country code (in alpha2)"); ++ ++int rtw_channel_plan = RTW_CHPLAN_MAX; ++module_param(rtw_channel_plan, int, 0644); ++MODULE_PARM_DESC(rtw_channel_plan, "The default chplan ID when rtw_alpha2 is not specified or valid"); ++ ++/*if concurrent softap + p2p(GO) is needed, this param lets p2p response full channel list. ++But Softap must be SHUT DOWN once P2P decide to set up connection and become a GO.*/ ++#ifdef CONFIG_FULL_CH_IN_P2P_HANDSHAKE ++int rtw_full_ch_in_p2p_handshake = 1; /* reply full channel list*/ ++#else ++int rtw_full_ch_in_p2p_handshake = 0; /* reply only softap channel*/ ++#endif + + #ifdef CONFIG_BT_COEXIST + int rtw_btcoex_enable = 1; +@@ -166,6 +184,7 @@ int rtw_AcceptAddbaReq = _TRUE;// 0:Reject AP's Add BA req, 1:Accept AP's Add BA + int rtw_antdiv_cfg = 2; // 0:OFF , 1:ON, 2:decide by Efuse config + int rtw_antdiv_type = 0 ; //0:decide by efuse 1: for 88EE, 1Tx and 1RxCG are diversity.(2 Ant with SPDT), 2: for 88EE, 1Tx and 2Rx are diversity.( 2 Ant, Tx and RxCG are both on aux port, RxCS is on main port ), 3: for 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) + ++int rtw_switch_usb3 = _FALSE; /* _FALSE: doesn't switch, _TRUE: switch from usb2.0 to usb 3.0 */ + + #ifdef CONFIG_USB_AUTOSUSPEND + int rtw_enusbss = 1;//0:disable,1:enable +@@ -191,10 +210,6 @@ int rtw_hw_wps_pbc = 0; + int rtw_mc2u_disable = 0; + #endif // CONFIG_TX_MCAST2UNI + +-#ifdef CONFIG_DUALMAC_CONCURRENT +-int rtw_dmsp = 0; +-#endif // CONFIG_DUALMAC_CONCURRENT +- + #ifdef CONFIG_80211D + int rtw_80211d = 0; + #endif +@@ -213,6 +228,15 @@ int rtw_qos_opt_enable=0;//0: disable,1:enable + #endif + module_param(rtw_qos_opt_enable,int,0644); + ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++int rtw_acs_mode = 1; /*0:disable, 1:enable*/ ++module_param(rtw_acs_mode, int, 0644); ++ ++int rtw_acs_auto_scan = 0; /*0:disable, 1:enable*/ ++module_param(rtw_acs_auto_scan, int, 0644); ++ ++#endif ++ + char* ifname = "wlan%d"; + module_param(ifname, charp, 0644); + MODULE_PARM_DESC(ifname, "The default name to allocate for first interface"); +@@ -232,8 +256,8 @@ int rtw_ext_iface_num = 1;//primary/secondary iface is excluded + module_param(rtw_ext_iface_num, int, 0644); + #endif //CONFIG_MULTI_VIR_IFACES + ++module_param(rtw_rfkfree_enable, int, 0644); + module_param(rtw_initmac, charp, 0644); +-module_param(rtw_channel_plan, int, 0644); + module_param(rtw_special_rf_path, int, 0644); + module_param(rtw_chip_version, int, 0644); + module_param(rtw_rfintfs, int, 0644); +@@ -256,7 +280,9 @@ module_param(rtw_ampdu_amsdu, int, 0644); + #ifdef CONFIG_80211AC_VHT + module_param(rtw_vht_enable, int, 0644); + #endif //CONFIG_80211AC_VHT +- ++#ifdef CONFIG_BEAMFORMING ++module_param(rtw_beamform_cap, int, 0644); ++#endif + module_param(rtw_lowrate_two_xmit, int, 0644); + + module_param(rtw_rf_config, int, 0644); +@@ -265,9 +291,12 @@ module_param(rtw_smart_ps, int, 0644); + module_param(rtw_low_power, int, 0644); + module_param(rtw_wifi_spec, int, 0644); + ++module_param(rtw_full_ch_in_p2p_handshake, int, 0644); + module_param(rtw_antdiv_cfg, int, 0644); + module_param(rtw_antdiv_type, int, 0644); + ++module_param(rtw_switch_usb3, int, 0644); ++ + module_param(rtw_enusbss, int, 0644); + module_param(rtw_hwpdn_mode, int, 0644); + module_param(rtw_hwpwrp_detect, int, 0644); +@@ -290,9 +319,9 @@ MODULE_PARM_DESC(rtw_max_roaming_times,"The max roaming times to try"); + #endif //CONFIG_LAYER2_ROAMING + + #ifdef CONFIG_IOL +-int rtw_fw_iol=1;// 0:Disable, 1:enable, 2:by usb speed ++int rtw_fw_iol=1; + module_param(rtw_fw_iol, int, 0644); +-MODULE_PARM_DESC(rtw_fw_iol,"FW IOL"); ++MODULE_PARM_DESC(rtw_fw_iol, "FW IOL. 0:Disable, 1:enable, 2:by usb speed"); + #endif //CONFIG_IOL + + #ifdef CONFIG_FILE_FWIMG +@@ -315,10 +344,6 @@ MODULE_PARM_DESC(rtw_fw_mp_bt_file_path, "The path of fw for MP-BT image"); + module_param(rtw_mc2u_disable, int, 0644); + #endif // CONFIG_TX_MCAST2UNI + +-#ifdef CONFIG_DUALMAC_CONCURRENT +-module_param(rtw_dmsp, int, 0644); +-#endif // CONFIG_DUALMAC_CONCURRENT +- + #ifdef CONFIG_80211D + module_param(rtw_80211d, int, 0644); + MODULE_PARM_DESC(rtw_80211d, "Enable 802.11d mechanism"); +@@ -334,15 +359,27 @@ MODULE_PARM_DESC(rtw_hiq_filter, "0:allow all, 1:allow special, 2:deny all"); + + uint rtw_adaptivity_en = CONFIG_RTW_ADAPTIVITY_EN; + module_param(rtw_adaptivity_en, uint, 0644); +-MODULE_PARM_DESC(rtw_adaptivity_en, "0:disable, 1:enable, 2:auto"); ++MODULE_PARM_DESC(rtw_adaptivity_en, "0:disable, 1:enable"); + + uint rtw_adaptivity_mode = CONFIG_RTW_ADAPTIVITY_MODE; + module_param(rtw_adaptivity_mode, uint, 0644); + MODULE_PARM_DESC(rtw_adaptivity_mode, "0:normal, 1:carrier sense"); + +-uint rtw_nhm_en = CONFIG_RTW_NHM_EN; +-module_param(rtw_nhm_en, uint, 0644); +-MODULE_PARM_DESC(rtw_nhm_en, "0:disable, 1:enable"); ++uint rtw_adaptivity_dml = CONFIG_RTW_ADAPTIVITY_DML; ++module_param(rtw_adaptivity_dml, uint, 0644); ++MODULE_PARM_DESC(rtw_adaptivity_dml, "0:disable, 1:enable"); ++ ++uint rtw_adaptivity_dc_backoff = CONFIG_RTW_ADAPTIVITY_DC_BACKOFF; ++module_param(rtw_adaptivity_dc_backoff, uint, 0644); ++MODULE_PARM_DESC(rtw_adaptivity_dc_backoff, "DC backoff for Adaptivity"); ++ ++int rtw_adaptivity_th_l2h_ini = CONFIG_RTW_ADAPTIVITY_TH_L2H_INI; ++module_param(rtw_adaptivity_th_l2h_ini, int, 0644); ++MODULE_PARM_DESC(rtw_adaptivity_th_l2h_ini, "TH_L2H_ini for Adaptivity"); ++ ++int rtw_adaptivity_th_edcca_hl_diff = CONFIG_RTW_ADAPTIVITY_TH_EDCCA_HL_DIFF; ++module_param(rtw_adaptivity_th_edcca_hl_diff, int, 0644); ++MODULE_PARM_DESC(rtw_adaptivity_th_edcca_hl_diff, "TH_EDCCA_HL_diff for Adaptivity"); + + uint rtw_amplifier_type_2g = CONFIG_RTW_AMPLIFIER_TYPE_2G; + module_param(rtw_amplifier_type_2g, uint, 0644); +@@ -352,10 +389,14 @@ uint rtw_amplifier_type_5g = CONFIG_RTW_AMPLIFIER_TYPE_5G; + module_param(rtw_amplifier_type_5g, uint, 0644); + MODULE_PARM_DESC(rtw_amplifier_type_5g, "BIT6:5G ext-PA, BIT7:5G ext-LNA"); + +-uint rtw_RFE_type = 64; ++uint rtw_RFE_type = CONFIG_RTW_RFE_TYPE; + module_param(rtw_RFE_type, uint, 0644); + MODULE_PARM_DESC(rtw_RFE_type, "default init value:64"); + ++uint rtw_GLNA_type = CONFIG_RTW_GLNA_TYPE; ++module_param(rtw_GLNA_type, uint, 0644); ++MODULE_PARM_DESC(rtw_GLNA_type, "default init value:0"); ++ + uint rtw_TxBBSwing_2G = 0xFF; + module_param(rtw_TxBBSwing_2G, uint, 0644); + MODULE_PARM_DESC(rtw_TxBBSwing_2G, "default init value:0xFF"); +@@ -364,6 +405,39 @@ uint rtw_TxBBSwing_5G = 0xFF; + module_param(rtw_TxBBSwing_5G, uint, 0644); + MODULE_PARM_DESC(rtw_TxBBSwing_5G, "default init value:0xFF"); + ++uint rtw_OffEfuseMask = 0; ++module_param(rtw_OffEfuseMask, uint, 0644); ++MODULE_PARM_DESC(rtw_OffEfuseMask, "default open Efuse Mask value:0"); ++ ++uint rtw_FileMaskEfuse = 0; ++module_param(rtw_FileMaskEfuse, uint, 0644); ++MODULE_PARM_DESC(rtw_FileMaskEfuse, "default drv Mask Efuse value:0"); ++ ++uint rtw_kfree = 0; ++module_param(rtw_kfree, uint, 0644); ++MODULE_PARM_DESC(rtw_kfree, "default kfree config value:0"); ++ ++uint rtw_rxgain_offset_2g = 0; ++module_param(rtw_rxgain_offset_2g, uint, 0644); ++MODULE_PARM_DESC(rtw_rxgain_offset_2g, "default RF Gain 2G Offset value:0"); ++ ++uint rtw_rxgain_offset_5gl = 0; ++module_param(rtw_rxgain_offset_5gl, uint, 0644); ++MODULE_PARM_DESC(rtw_rxgain_offset_5gl, "default RF Gain 5GL Offset value:0"); ++ ++uint rtw_rxgain_offset_5gm = 0; ++module_param(rtw_rxgain_offset_5gm, uint, 0644); ++MODULE_PARM_DESC(rtw_rxgain_offset_5gm, "default RF Gain 5GM Offset value:0"); ++ ++uint rtw_rxgain_offset_5gh = 0; ++module_param(rtw_rxgain_offset_5gh, uint, 0644); ++MODULE_PARM_DESC(rtw_rxgain_offset_5gm, "default RF Gain 5GL Offset value:0"); ++ ++ ++uint rtw_pll_ref_clk_sel = CONFIG_RTW_PLL_REF_CLK_SEL; ++module_param(rtw_pll_ref_clk_sel, uint, 0644); ++MODULE_PARM_DESC(rtw_pll_ref_clk_sel, "force pll_ref_clk_sel, 0xF:use autoload value"); ++ + #if defined(CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY) //eFuse: Regulatory selection=1 + int rtw_tx_pwr_lmt_enable = 1; + int rtw_tx_pwr_by_rate = 1; +@@ -386,6 +460,48 @@ MODULE_PARM_DESC(rtw_tx_pwr_lmt_enable,"0:Disable, 1:Enable, 2: Depend on efuse" + module_param(rtw_tx_pwr_by_rate, int, 0644); + MODULE_PARM_DESC(rtw_tx_pwr_by_rate,"0:Disable, 1:Enable, 2: Depend on efuse"); + ++static int rtw_target_tx_pwr_2g_a[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_A; ++static int rtw_target_tx_pwr_2g_a_num = 0; ++module_param_array(rtw_target_tx_pwr_2g_a, int, &rtw_target_tx_pwr_2g_a_num, 0644); ++MODULE_PARM_DESC(rtw_target_tx_pwr_2g_a, "2.4G target tx power (unit:dBm) of RF path A for each rate section, should match the real calibrate power, -1: undefined"); ++ ++static int rtw_target_tx_pwr_2g_b[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_B; ++static int rtw_target_tx_pwr_2g_b_num = 0; ++module_param_array(rtw_target_tx_pwr_2g_b, int, &rtw_target_tx_pwr_2g_b_num, 0644); ++MODULE_PARM_DESC(rtw_target_tx_pwr_2g_b, "2.4G target tx power (unit:dBm) of RF path B for each rate section, should match the real calibrate power, -1: undefined"); ++ ++static int rtw_target_tx_pwr_2g_c[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_C; ++static int rtw_target_tx_pwr_2g_c_num = 0; ++module_param_array(rtw_target_tx_pwr_2g_c, int, &rtw_target_tx_pwr_2g_c_num, 0644); ++MODULE_PARM_DESC(rtw_target_tx_pwr_2g_c, "2.4G target tx power (unit:dBm) of RF path C for each rate section, should match the real calibrate power, -1: undefined"); ++ ++static int rtw_target_tx_pwr_2g_d[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_D; ++static int rtw_target_tx_pwr_2g_d_num = 0; ++module_param_array(rtw_target_tx_pwr_2g_d, int, &rtw_target_tx_pwr_2g_d_num, 0644); ++MODULE_PARM_DESC(rtw_target_tx_pwr_2g_d, "2.4G target tx power (unit:dBm) of RF path D for each rate section, should match the real calibrate power, -1: undefined"); ++ ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++static int rtw_target_tx_pwr_5g_a[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_A; ++static int rtw_target_tx_pwr_5g_a_num = 0; ++module_param_array(rtw_target_tx_pwr_5g_a, int, &rtw_target_tx_pwr_5g_a_num, 0644); ++MODULE_PARM_DESC(rtw_target_tx_pwr_5g_a, "5G target tx power (unit:dBm) of RF path A for each rate section, should match the real calibrate power, -1: undefined"); ++ ++static int rtw_target_tx_pwr_5g_b[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_B; ++static int rtw_target_tx_pwr_5g_b_num = 0; ++module_param_array(rtw_target_tx_pwr_5g_b, int, &rtw_target_tx_pwr_5g_b_num, 0644); ++MODULE_PARM_DESC(rtw_target_tx_pwr_5g_b, "5G target tx power (unit:dBm) of RF path B for each rate section, should match the real calibrate power, -1: undefined"); ++ ++static int rtw_target_tx_pwr_5g_c[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_C; ++static int rtw_target_tx_pwr_5g_c_num = 0; ++module_param_array(rtw_target_tx_pwr_5g_c, int, &rtw_target_tx_pwr_5g_c_num, 0644); ++MODULE_PARM_DESC(rtw_target_tx_pwr_5g_c, "5G target tx power (unit:dBm) of RF path C for each rate section, should match the real calibrate power, -1: undefined"); ++ ++static int rtw_target_tx_pwr_5g_d[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_D; ++static int rtw_target_tx_pwr_5g_d_num = 0; ++module_param_array(rtw_target_tx_pwr_5g_d, int, &rtw_target_tx_pwr_5g_d_num, 0644); ++MODULE_PARM_DESC(rtw_target_tx_pwr_5g_d, "5G target tx power (unit:dBm) of RF path D for each rate section, should match the real calibrate power, -1: undefined"); ++#endif /* CONFIG_IEEE80211_BAND_5GHZ */ ++ + #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + char *rtw_phy_file_path = REALTEK_CONFIG_PATH; + module_param(rtw_phy_file_path, charp, 0644); +@@ -406,7 +522,6 @@ module_param(rtw_decrypt_phy_file, int, 0644); + MODULE_PARM_DESC(rtw_decrypt_phy_file,"Enable Decrypt PHY File"); + #endif + +-static uint loadparam(PADAPTER padapter, _nic_hdl pnetdev); + int _netdev_open(struct net_device *pnetdev); + int netdev_open (struct net_device *pnetdev); + static int netdev_close (struct net_device *pnetdev); +@@ -414,13 +529,47 @@ static int netdev_close (struct net_device *pnetdev); + extern int rtw_sdio_set_power(int on); + #endif //CONFIG_PLATFORM_INTEL_BYT + +-//#ifdef RTK_DMP_PLATFORM +-uint loadparam( _adapter *padapter, _nic_hdl pnetdev) ++void rtw_regsty_load_target_tx_power(struct registry_priv *regsty) + { ++ int path, rs; ++ int *target_tx_pwr; ++ ++ for (path = RF_PATH_A; path < RF_PATH_MAX; path++) { ++ if (path == RF_PATH_A) ++ target_tx_pwr = rtw_target_tx_pwr_2g_a; ++ else if (path == RF_PATH_B) ++ target_tx_pwr = rtw_target_tx_pwr_2g_b; ++ else if (path == RF_PATH_C) ++ target_tx_pwr = rtw_target_tx_pwr_2g_c; ++ else if (path == RF_PATH_D) ++ target_tx_pwr = rtw_target_tx_pwr_2g_d; ++ ++ for (rs = CCK; rs < RATE_SECTION_NUM; rs++) ++ regsty->target_tx_pwr_2g[path][rs] = target_tx_pwr[rs]; ++ } ++ ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++ for (path = RF_PATH_A; path < RF_PATH_MAX; path++) { ++ if (path == RF_PATH_A) ++ target_tx_pwr = rtw_target_tx_pwr_5g_a; ++ else if (path == RF_PATH_B) ++ target_tx_pwr = rtw_target_tx_pwr_5g_b; ++ else if (path == RF_PATH_C) ++ target_tx_pwr = rtw_target_tx_pwr_5g_c; ++ else if (path == RF_PATH_D) ++ target_tx_pwr = rtw_target_tx_pwr_5g_d; ++ ++ for (rs = OFDM; rs < RATE_SECTION_NUM; rs++) ++ regsty->target_tx_pwr_5g[path][rs - 1] = target_tx_pwr[rs - 1]; ++ } ++#endif /* CONFIG_IEEE80211_BAND_5GHZ */ ++} + ++uint loadparam(_adapter *padapter) ++{ + uint status = _SUCCESS; + struct registry_priv *registry_par = &padapter->registrypriv; +- ++ + _func_enter_; + + registry_par->chip_version = (u8)rtw_chip_version; +@@ -478,6 +627,8 @@ _func_enter_; + registry_par->uapsd_acvi_en = (u8)rtw_uapsd_acvi_en; + registry_par->uapsd_acvo_en = (u8)rtw_uapsd_acvo_en; + ++ registry_par->RegRfKFreeEnable = (u8)rtw_rfkfree_enable; ++ + #ifdef CONFIG_80211N_HT + registry_par->ht_enable = (u8)rtw_ht_enable; + registry_par->bw_mode = (u8)rtw_bw_mode; +@@ -488,6 +639,8 @@ _func_enter_; + registry_par->ldpc_cap = (u8)rtw_ldpc_cap; + registry_par->stbc_cap = (u8)rtw_stbc_cap; + registry_par->beamform_cap = (u8)rtw_beamform_cap; ++ registry_par->beamformer_rf_num = (u8)rtw_bfer_rf_number; ++ registry_par->beamformee_rf_num = (u8)rtw_bfee_rf_number; + #endif + + #ifdef CONFIG_80211AC_VHT +@@ -506,9 +659,20 @@ _func_enter_; + + registry_par->wifi_spec = (u8)rtw_wifi_spec; + ++ if (strlen(rtw_country_code) != 2 ++ || is_alpha(rtw_country_code[0]) == _FALSE ++ || is_alpha(rtw_country_code[1]) == _FALSE ++ ) { ++ if (rtw_country_code != rtw_country_unspecified) ++ DBG_871X_LEVEL(_drv_err_, "%s discard rtw_country_code not in alpha2\n", __func__); ++ _rtw_memset(registry_par->alpha2, 0xFF, 2); ++ } else ++ _rtw_memcpy(registry_par->alpha2, rtw_country_code, 2); ++ + registry_par->channel_plan = (u8)rtw_channel_plan; + registry_par->special_rf_path = (u8)rtw_special_rf_path; + ++ registry_par->full_ch_in_p2p_handshake = (u8)rtw_full_ch_in_p2p_handshake; + #ifdef CONFIG_BT_COEXIST + registry_par->btcoex = (u8)rtw_btcoex_enable; + registry_par->bt_iso = (u8)rtw_bt_iso; +@@ -521,6 +685,8 @@ _func_enter_; + + registry_par->antdiv_cfg = (u8)rtw_antdiv_cfg; + registry_par->antdiv_type = (u8)rtw_antdiv_type; ++ ++ registry_par->switch_usb3 = (u8)rtw_switch_usb3; + + #ifdef CONFIG_AUTOSUSPEND + registry_par->usbss_enable = (u8)rtw_enusbss;//0:disable,1:enable +@@ -548,10 +714,6 @@ _func_enter_; + registry_par->fw_iol = rtw_fw_iol; + #endif + +-#ifdef CONFIG_DUALMAC_CONCURRENT +- registry_par->dmsp= (u8)rtw_dmsp; +-#endif +- + #ifdef CONFIG_80211D + registry_par->enable80211d = (u8)rtw_80211d; + #endif +@@ -570,9 +732,13 @@ _func_enter_; + registry_par->ext_iface_num = (u8)rtw_ext_iface_num; + #endif //CONFIG_MULTI_VIR_IFACES + ++ registry_par->pll_ref_clk_sel = (u8)rtw_pll_ref_clk_sel; ++ + registry_par->RegEnableTxPowerLimit = (u8)rtw_tx_pwr_lmt_enable; + registry_par->RegEnableTxPowerByRate = (u8)rtw_tx_pwr_by_rate; + ++ rtw_regsty_load_target_tx_power(registry_par); ++ + registry_par->RegPowerBase = 14; + registry_par->TxBBSwing_2G = (s8)rtw_TxBBSwing_2G; + registry_par->TxBBSwing_5G = (s8)rtw_TxBBSwing_5G; +@@ -580,7 +746,7 @@ _func_enter_; + registry_par->RFE_Type = (u8)rtw_RFE_type; + registry_par->AmplifierType_2G = (u8)rtw_amplifier_type_2g; + registry_par->AmplifierType_5G = (u8)rtw_amplifier_type_5g; +- ++ registry_par->GLNA_Type = (u8)rtw_GLNA_type; + #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + registry_par->load_phy_file = (u8)rtw_load_phy_file; + registry_par->RegDecryptCustomFile = (u8)rtw_decrypt_phy_file; +@@ -591,28 +757,89 @@ _func_enter_; + + registry_par->adaptivity_en = (u8)rtw_adaptivity_en; + registry_par->adaptivity_mode = (u8)rtw_adaptivity_mode; +- registry_par->nhm_en = (u8)rtw_nhm_en; +- ++ registry_par->adaptivity_dml = (u8)rtw_adaptivity_dml; ++ registry_par->adaptivity_dc_backoff = (u8)rtw_adaptivity_dc_backoff; ++ registry_par->adaptivity_th_l2h_ini = (s8)rtw_adaptivity_th_l2h_ini; ++ registry_par->adaptivity_th_edcca_hl_diff = (s8)rtw_adaptivity_th_edcca_hl_diff; ++ ++ registry_par->boffefusemask = (u8)rtw_OffEfuseMask; ++ registry_par->bFileMaskEfuse = (u8)rtw_FileMaskEfuse; ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ registry_par->acs_mode = (u8)rtw_acs_mode; ++ registry_par->acs_auto_scan = (u8)rtw_acs_auto_scan; ++#endif ++ registry_par->reg_rxgain_offset_2g = (u32) rtw_rxgain_offset_2g; ++ registry_par->reg_rxgain_offset_5gl = (u32) rtw_rxgain_offset_5gl; ++ registry_par->reg_rxgain_offset_5gm = (u32) rtw_rxgain_offset_5gm; ++ registry_par->reg_rxgain_offset_5gh = (u32) rtw_rxgain_offset_5gh; + _func_exit_; + + return status; + } + +-static int rtw_net_set_mac_address(struct net_device *pnetdev, void *p) ++/** ++ * rtw_net_set_mac_address ++ * This callback function is used for the Media Access Control address ++ * of each net_device needs to be changed. ++ * ++ * Arguments: ++ * @pnetdev: net_device pointer. ++ * @addr: new MAC address. ++ * ++ * Return: ++ * ret = 0: Permit to change net_device's MAC address. ++ * ret = -1 (Default): Operation not permitted. ++ * ++ * Auther: Arvin Liu ++ * Date: 2015/05/29 ++ */ ++static int rtw_net_set_mac_address(struct net_device *pnetdev, void *addr) + { + _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); +- struct sockaddr *addr = p; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct sockaddr *sa = (struct sockaddr *)addr; ++ int ret = -1; + +- if(padapter->bup == _FALSE) +- { +- //DBG_871X("r8711_net_set_mac_address(), MAC=%x:%x:%x:%x:%x:%x\n", addr->sa_data[0], addr->sa_data[1], addr->sa_data[2], addr->sa_data[3], +- //addr->sa_data[4], addr->sa_data[5]); +- _rtw_memcpy(padapter->eeprompriv.mac_addr, addr->sa_data, ETH_ALEN); +- //_rtw_memcpy(pnetdev->dev_addr, addr->sa_data, ETH_ALEN); +- //padapter->bset_hwaddr = _TRUE; ++ /* only the net_device is in down state to permit modifying mac addr */ ++ if ((pnetdev->flags & IFF_UP) == _TRUE) { ++ DBG_871X(FUNC_ADPT_FMT": The net_device's is not in down state\n" ++ , FUNC_ADPT_ARG(padapter)); ++ ++ return ret; + } + +- return 0; ++ /* if the net_device is linked, it's not permit to modify mac addr */ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) || ++ check_fwstate(pmlmepriv, _FW_LINKED) || ++ check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) { ++ DBG_871X(FUNC_ADPT_FMT": The net_device's is not idle currently\n" ++ , FUNC_ADPT_ARG(padapter)); ++ ++ return ret; ++ } ++ ++ /* check whether the input mac address is valid to permit modifying mac addr */ ++ if (rtw_check_invalid_mac_address(sa->sa_data, _FALSE) == _TRUE) { ++ DBG_871X(FUNC_ADPT_FMT": Invalid Mac Addr for "MAC_FMT"\n" ++ , FUNC_ADPT_ARG(padapter), MAC_ARG(sa->sa_data)); ++ ++ return ret; ++ } ++ ++ _rtw_memcpy(adapter_mac_addr(padapter), sa->sa_data, ETH_ALEN); /* set mac addr to adapter */ ++ _rtw_memcpy(pnetdev->dev_addr, sa->sa_data, ETH_ALEN); /* set mac addr to net_device */ ++ ++ rtw_ps_deny(padapter, PS_DENY_IOCTL); ++ LeaveAllPowerSaveModeDirect(padapter); /* leave PS mode for guaranteeing to access hw register successfully */ ++ rtw_hal_set_hwreg(padapter, HW_VAR_MAC_ADDR, sa->sa_data); /* set mac addr to mac register */ ++ rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); ++ ++ DBG_871X(FUNC_ADPT_FMT": Set Mac Addr to "MAC_FMT" Successfully\n" ++ , FUNC_ADPT_ARG(padapter), MAC_ARG(sa->sa_data)); ++ ++ ret = 0; ++ ++ return ret; + } + + static struct net_device_stats *rtw_net_get_stats(struct net_device *pnetdev) +@@ -728,8 +955,14 @@ static int rtw_ndev_notifier_call(struct notifier_block * nb, unsigned long stat + #endif + + #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++ if (dev->netdev_ops->ndo_do_ioctl == NULL) ++ return NOTIFY_DONE; ++ + if (dev->netdev_ops->ndo_do_ioctl != rtw_ioctl) + #else ++ if (dev->do_ioctl == NULL) ++ return NOTIFY_DONE; ++ + if (dev->do_ioctl != rtw_ioctl) + #endif + return NOTIFY_DONE; +@@ -764,8 +997,10 @@ int rtw_ndev_init(struct net_device *dev) + { + _adapter *adapter = rtw_netdev_priv(dev); + +- DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" if%d mac_addr="MAC_FMT"\n" ++ , FUNC_ADPT_ARG(adapter), (adapter->iface_id+1), MAC_ARG(dev->dev_addr)); + strncpy(adapter->old_ifname, dev->name, IFNAMSIZ); ++ adapter->old_ifname[IFNAMSIZ-1] = '\0'; + rtw_adapter_proc_init(dev); + + return 0; +@@ -775,7 +1010,8 @@ void rtw_ndev_uninit(struct net_device *dev) + { + _adapter *adapter = rtw_netdev_priv(dev); + +- DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" if%d\n" ++ , FUNC_ADPT_ARG(adapter), (adapter->iface_id+1)); + rtw_adapter_proc_deinit(dev); + } + +@@ -844,6 +1080,22 @@ int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname) + return 0; + } + ++void rtw_hook_if_ops(struct net_device *ndev) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) ++ ndev->netdev_ops = &rtw_netdev_ops; ++#else ++ ndev->init = rtw_ndev_init; ++ ndev->uninit = rtw_ndev_uninit; ++ ndev->open = netdev_open; ++ ndev->stop = netdev_close; ++ ndev->hard_start_xmit = rtw_xmit_entry; ++ ndev->set_mac_address = rtw_net_set_mac_address; ++ ndev->get_stats = rtw_net_get_stats; ++ ndev->do_ioctl = rtw_ioctl; ++#endif ++} ++ + struct net_device *rtw_init_netdev(_adapter *old_padapter) + { + _adapter *padapter; +@@ -866,28 +1118,15 @@ struct net_device *rtw_init_netdev(_adapter *old_padapter) + SET_MODULE_OWNER(pnetdev); + #endif + +- //pnetdev->init = NULL; +- +-#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) +- DBG_871X("register rtw_netdev_ops to netdev_ops\n"); +- pnetdev->netdev_ops = &rtw_netdev_ops; +-#else +- pnetdev->init = rtw_ndev_init; +- pnetdev->uninit = rtw_ndev_uninit; +- pnetdev->open = netdev_open; +- pnetdev->stop = netdev_close; +- pnetdev->hard_start_xmit = rtw_xmit_entry; +- pnetdev->set_mac_address = rtw_net_set_mac_address; +- pnetdev->get_stats = rtw_net_get_stats; +- pnetdev->do_ioctl = rtw_ioctl; +-#endif +- ++ rtw_hook_if_ops(pnetdev); + + #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX + pnetdev->features |= NETIF_F_IP_CSUM; + #endif ++ + //pnetdev->tx_timeout = NULL; + pnetdev->watchdog_timeo = HZ*3; /* 3 second timeout */ ++ + #ifdef CONFIG_WIRELESS_EXT + pnetdev->wireless_handlers = (struct iw_handler_def *)&rtw_handlers_def; + #endif +@@ -897,58 +1136,245 @@ struct net_device *rtw_init_netdev(_adapter *old_padapter) + //pnetdev->wireless_data = &priv->wireless_data; + #endif + +- //step 2. +- loadparam(padapter, pnetdev); +- + return pnetdev; ++} ++ ++int rtw_os_ndev_alloc(_adapter *adapter) ++{ ++ int ret = _FAIL; ++ struct net_device *ndev = NULL; ++ ++ ndev = rtw_init_netdev(adapter); ++ if (ndev == NULL) { ++ rtw_warn_on(1); ++ goto exit; ++ } ++ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0) ++ SET_NETDEV_DEV(ndev, dvobj_to_dev(adapter_to_dvobj(adapter))); ++ #endif ++ ++ #ifdef CONFIG_PCI_HCI ++ if (adapter_to_dvobj(adapter)->bdma64) ++ ndev->features |= NETIF_F_HIGHDMA; ++ ndev->irq = adapter_to_dvobj(adapter)->irq; ++ #endif + ++#if defined(CONFIG_IOCTL_CFG80211) ++ if (rtw_cfg80211_ndev_res_alloc(adapter) != _SUCCESS) { ++ rtw_warn_on(1); ++ goto free_ndev; ++ } ++#endif ++ ++ ret = _SUCCESS; ++ ++free_ndev: ++ if (ret != _SUCCESS && ndev) ++ rtw_free_netdev(ndev); ++exit: ++ return ret; + } + +-void rtw_unregister_netdevs(struct dvobj_priv *dvobj) ++void rtw_os_ndev_free(_adapter *adapter) + { +- int i; +- _adapter *padapter = NULL; ++#if defined(CONFIG_IOCTL_CFG80211) ++ rtw_cfg80211_ndev_res_free(adapter); ++#endif + +- for(i=0;iiface_nums;i++) +- { +- struct net_device *pnetdev = NULL; +- +- padapter = dvobj->padapters[i]; ++ if (adapter->pnetdev) { ++ rtw_free_netdev(adapter->pnetdev); ++ adapter->pnetdev = NULL; ++ } ++} ++ ++int rtw_os_ndev_register(_adapter *adapter, char *name) ++{ ++ int ret = _SUCCESS; ++ struct net_device *ndev = adapter->pnetdev; ++ ++#if defined(CONFIG_IOCTL_CFG80211) ++ if (rtw_cfg80211_ndev_res_register(adapter) != _SUCCESS) { ++ rtw_warn_on(1); ++ ret = _FAIL; ++ goto exit; ++ } ++#endif ++ ++ /* alloc netdev name */ ++ rtw_init_netdev_name(ndev, name); ++ ++ _rtw_memcpy(ndev->dev_addr, adapter_mac_addr(adapter), ETH_ALEN); ++ ++ /* Tell the network stack we exist */ ++ if (register_netdev(ndev) != 0) { ++ DBG_871X(FUNC_NDEV_FMT" if%d Failed!\n", FUNC_NDEV_ARG(ndev), (adapter->iface_id+1)); ++ ret = _FAIL; ++ } ++ ++#if defined(CONFIG_IOCTL_CFG80211) ++ if (ret != _SUCCESS) { ++ rtw_cfg80211_ndev_res_unregister(adapter); ++ #if !defined(RTW_SINGLE_WIPHY) ++ rtw_wiphy_unregister(adapter_to_wiphy(adapter)); ++ #endif ++ } ++#endif ++ ++exit: ++ return ret; ++} ++ ++void rtw_os_ndev_unregister(_adapter *adapter) ++{ ++ struct net_device *netdev = NULL; ++ ++ if (adapter == NULL) ++ return; ++ ++ adapter->ndev_unregistering = 1; + +- if (padapter == NULL) ++ netdev = adapter->pnetdev; ++ ++#if defined(CONFIG_IOCTL_CFG80211) ++ rtw_cfg80211_ndev_res_unregister(adapter); ++#endif ++ ++ if ((adapter->DriverState != DRIVER_DISAPPEAR) && netdev) ++ unregister_netdev(netdev); /* will call netdev_close() */ ++ ++#if defined(CONFIG_IOCTL_CFG80211) && !defined(RTW_SINGLE_WIPHY) ++ rtw_wiphy_unregister(adapter_to_wiphy(adapter)); ++#endif ++ ++ adapter->ndev_unregistering = 0; ++} ++ ++/** ++ * rtw_os_ndev_init - Allocate and register OS layer net device and relating structures for @adapter ++ * @adapter: the adapter on which this function applies ++ * @name: the requesting net device name ++ * ++ * Returns: ++ * _SUCCESS or _FAIL ++ */ ++int rtw_os_ndev_init(_adapter *adapter, char *name) ++{ ++ int ret = _FAIL; ++ ++ if (rtw_os_ndev_alloc(adapter) != _SUCCESS) ++ goto exit; ++ ++ if (rtw_os_ndev_register(adapter, name) != _SUCCESS) ++ goto os_ndev_free; ++ ++ ret = _SUCCESS; ++ ++os_ndev_free: ++ if (ret != _SUCCESS) ++ rtw_os_ndev_free(adapter); ++exit: ++ return ret; ++} ++ ++/** ++ * rtw_os_ndev_deinit - Unregister and free OS layer net device and relating structures for @adapter ++ * @adapter: the adapter on which this function applies ++ */ ++void rtw_os_ndev_deinit(_adapter *adapter) ++{ ++ rtw_os_ndev_unregister(adapter); ++ rtw_os_ndev_free(adapter); ++} ++ ++int rtw_os_ndevs_alloc(struct dvobj_priv *dvobj) ++{ ++ int i, status = _SUCCESS; ++ _adapter *adapter; ++ ++#if defined(CONFIG_IOCTL_CFG80211) ++ if (rtw_cfg80211_dev_res_alloc(dvobj) != _SUCCESS) { ++ rtw_warn_on(1); ++ status = _FAIL; ++ goto exit; ++ } ++#endif ++ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ ++ if (i >= IFACE_ID_MAX) { ++ DBG_871X_LEVEL(_drv_err_, "%s %d >= IFACE_ID_MAX\n", __func__, i); ++ rtw_warn_on(1); + continue; ++ } + +- pnetdev = padapter->pnetdev; ++ adapter = dvobj->padapters[i]; ++ if (adapter && !adapter->pnetdev) { ++ status = rtw_os_ndev_alloc(adapter); ++ if (status != _SUCCESS) { ++ rtw_warn_on(1); ++ break; ++ } ++ } ++ } + +- if((padapter->DriverState != DRIVER_DISAPPEAR) && pnetdev) { +- +- unregister_netdev(pnetdev); //will call netdev_close() ++ if (status != _SUCCESS) { ++ for (; i >= 0; i--) { ++ adapter = dvobj->padapters[i]; ++ if (adapter && adapter->pnetdev) ++ rtw_os_ndev_free(adapter); + } ++ } + +-#ifdef CONFIG_IOCTL_CFG80211 +- rtw_wdev_unregister(padapter->rtw_wdev); ++#if defined(CONFIG_IOCTL_CFG80211) ++ if (status != _SUCCESS) ++ rtw_cfg80211_dev_res_free(dvobj); + #endif ++exit: ++ return status; ++} ++ ++void rtw_os_ndevs_free(struct dvobj_priv *dvobj) ++{ ++ int i; ++ _adapter *adapter = NULL; ++ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ ++ if (i >= IFACE_ID_MAX) { ++ DBG_871X_LEVEL(_drv_err_, "%s %d >= IFACE_ID_MAX\n", __func__, i); ++ rtw_warn_on(1); ++ continue; ++ } + ++ adapter = dvobj->padapters[i]; ++ ++ if (adapter == NULL) ++ continue; ++ ++ rtw_os_ndev_free(adapter); + } +- +-} ++ ++#if defined(CONFIG_IOCTL_CFG80211) ++ rtw_cfg80211_dev_res_free(dvobj); ++#endif ++} + + u32 rtw_start_drv_threads(_adapter *padapter) + { + u32 _status = _SUCCESS; + + RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_start_drv_threads\n")); ++ + #ifdef CONFIG_XMIT_THREAD_MODE +-#if defined(CONFIG_SDIO_HCI) && defined(CONFIG_CONCURRENT_MODE) +- if(padapter->adapter_type == PRIMARY_ADAPTER){ +-#endif +- padapter->xmitThread = kthread_run(rtw_xmit_thread, padapter, "RTW_XMIT_THREAD"); +- if(IS_ERR(padapter->xmitThread)) +- _status = _FAIL; +-#if defined(CONFIG_SDIO_HCI) && defined(CONFIG_CONCURRENT_MODE) ++#if defined(CONFIG_SDIO_HCI) ++ if (is_primary_adapter(padapter)) ++#endif ++ { ++ padapter->xmitThread = kthread_run(rtw_xmit_thread, padapter, "RTW_XMIT_THREAD"); ++ if(IS_ERR(padapter->xmitThread)) ++ _status = _FAIL; + } +-#endif // CONFIG_SDIO_HCI+CONFIG_CONCURRENT_MODE +-#endif ++#endif //#ifdef CONFIG_XMIT_THREAD_MODE + + #ifdef CONFIG_RECV_THREAD_MODE + padapter->recvThread = kthread_run(rtw_recv_thread, padapter, "RTW_RECV_THREAD"); +@@ -956,11 +1382,7 @@ u32 rtw_start_drv_threads(_adapter *padapter) + _status = _FAIL; + #endif + +- +-#ifdef CONFIG_CONCURRENT_MODE +- if(padapter->isprimary == _TRUE) +-#endif //CONFIG_CONCURRENT_MODE +- { ++ if (is_primary_adapter(padapter)) { + padapter->cmdThread = kthread_run(rtw_cmd_thread, padapter, "RTW_CMD_THREAD"); + if(IS_ERR(padapter->cmdThread)) + _status = _FAIL; +@@ -984,12 +1406,8 @@ void rtw_stop_drv_threads (_adapter *padapter) + { + RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_stop_drv_threads\n")); + +-#ifdef CONFIG_CONCURRENT_MODE +- if(padapter->isprimary == _TRUE) +-#endif //CONFIG_CONCURRENT_MODE +- { ++ if (is_primary_adapter(padapter)) + rtw_stop_cmd_thread(padapter); +- } + + #ifdef CONFIG_EVENT_THREAD_MODE + _rtw_up_sema(&padapter->evtpriv.evt_notify); +@@ -1000,15 +1418,15 @@ void rtw_stop_drv_threads (_adapter *padapter) + + #ifdef CONFIG_XMIT_THREAD_MODE + // Below is to termindate tx_thread... +-#if defined(CONFIG_SDIO_HCI) && defined(CONFIG_CONCURRENT_MODE) ++#if defined(CONFIG_SDIO_HCI) + // Only wake-up primary adapter +- if(padapter->adapter_type == PRIMARY_ADAPTER) +-#endif //SDIO_HCI + CONCURRENT ++ if (is_primary_adapter(padapter)) ++#endif /*SDIO_HCI */ + { +- _rtw_up_sema(&padapter->xmitpriv.xmit_sema); +- _rtw_down_sema(&padapter->xmitpriv.terminate_xmitthread_sema); ++ _rtw_up_sema(&padapter->xmitpriv.xmit_sema); ++ _rtw_down_sema(&padapter->xmitpriv.terminate_xmitthread_sema); + } +- RT_TRACE(_module_os_intfs_c_,_drv_info_,("\n drv_halt: rtw_xmit_thread can be terminated ! \n")); ++ RT_TRACE(_module_os_intfs_c_, _drv_info_, ("\n drv_halt: rtw_xmit_thread can be terminated !\n")); + #endif + + #ifdef CONFIG_RECV_THREAD_MODE +@@ -1086,7 +1504,7 @@ u8 rtw_init_default_value(_adapter *padapter) + RTW_ENABLE_FUNC(padapter, DF_RX_BIT); + RTW_ENABLE_FUNC(padapter, DF_TX_BIT); + padapter->bLinkInfoDump = 0; +- padapter->bNotifyChannelChange = 0; ++ padapter->bNotifyChannelChange = _FALSE; + #ifdef CONFIG_P2P + padapter->bShowGetP2PState = 1; + #endif +@@ -1097,8 +1515,14 @@ u8 rtw_init_default_value(_adapter *padapter) + padapter->driver_ampdu_spacing = 0xFF; + padapter->driver_rx_ampdu_factor = 0xFF; + padapter->driver_rx_ampdu_spacing = 0xFF; +- padapter->fix_ba_rxbuf_bz = 0xFF; +- ++ padapter->fix_rx_ampdu_accept = RX_AMPDU_ACCEPT_INVALID; ++ padapter->fix_rx_ampdu_size = RX_AMPDU_SIZE_INVALID; ++#ifdef DBG_RX_COUNTER_DUMP ++ padapter->dump_rx_cnt_mode = 0; ++ padapter->drv_rx_cnt_ok = 0; ++ padapter->drv_rx_cnt_crcerror = 0; ++ padapter->drv_rx_cnt_drop = 0; ++#endif + return ret; + } + +@@ -1115,6 +1539,10 @@ struct dvobj_priv *devobj_init(void) + _rtw_mutex_init(&pdvobj->h2c_fwcmd_mutex); + _rtw_mutex_init(&pdvobj->setch_mutex); + _rtw_mutex_init(&pdvobj->setbw_mutex); ++ _rtw_mutex_init(&pdvobj->rf_read_reg_mutex); ++#ifdef CONFIG_SDIO_INDIRECT_ACCESS ++ _rtw_mutex_init(&pdvobj->sd_indirect_access_mutex); ++#endif + + pdvobj->processing_dev_remove = _FALSE; + +@@ -1122,6 +1550,7 @@ struct dvobj_priv *devobj_init(void) + + rtw_macid_ctl_init(&pdvobj->macid_ctl); + _rtw_spinlock_init(&pdvobj->cam_ctl.lock); ++ _rtw_mutex_init(&pdvobj->cam_ctl.sec_cam_access_mutex); + + return pdvobj; + +@@ -1132,13 +1561,23 @@ void devobj_deinit(struct dvobj_priv *pdvobj) + if(!pdvobj) + return; + ++ /* TODO: use rtw_os_ndevs_deinit instead at the first stage of driver's dev deinit function */ ++#if defined(CONFIG_IOCTL_CFG80211) ++ rtw_cfg80211_dev_res_free(pdvobj); ++#endif ++ + _rtw_mutex_free(&pdvobj->hw_init_mutex); + _rtw_mutex_free(&pdvobj->h2c_fwcmd_mutex); + _rtw_mutex_free(&pdvobj->setch_mutex); + _rtw_mutex_free(&pdvobj->setbw_mutex); ++ _rtw_mutex_free(&pdvobj->rf_read_reg_mutex); ++#ifdef CONFIG_SDIO_INDIRECT_ACCESS ++ _rtw_mutex_free(&pdvobj->sd_indirect_access_mutex); ++#endif + + rtw_macid_ctl_deinit(&pdvobj->macid_ctl); + _rtw_spinlock_free(&pdvobj->cam_ctl.lock); ++ _rtw_mutex_free(&pdvobj->cam_ctl.sec_cam_access_mutex); + + rtw_mfree((u8*)pdvobj, sizeof(*pdvobj)); + } +@@ -1181,7 +1620,7 @@ u8 rtw_reset_drv_sw(_adapter *padapter) + pwrctrlpriv->pwr_state_check_cnts = 0; + + //mlmeextpriv +- padapter->mlmeextpriv.sitesurvey_res.state= SCAN_DISABLE; ++ mlmeext_set_scan_state(&padapter->mlmeextpriv, SCAN_DISABLE); + + #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS + rtw_set_signal_stat_timer(&padapter->recvpriv); +@@ -1284,10 +1723,17 @@ _func_enter_; + } + + padapter->stapriv.padapter = padapter; +- padapter->setband = GHZ24_50; ++ padapter->setband = WIFI_FREQUENCY_BAND_AUTO; + padapter->fix_rate = 0xFF; + padapter->data_fb = 0; +- padapter->fix_ba_rxbuf_bz = 0xFF; ++ padapter->fix_rx_ampdu_accept = RX_AMPDU_ACCEPT_INVALID; ++ padapter->fix_rx_ampdu_size = RX_AMPDU_SIZE_INVALID; ++#ifdef DBG_RX_COUNTER_DUMP ++ padapter->dump_rx_cnt_mode = 0; ++ padapter->drv_rx_cnt_ok = 0; ++ padapter->drv_rx_cnt_crcerror = 0; ++ padapter->drv_rx_cnt_drop = 0; ++#endif + rtw_init_bcmc_stainfo(padapter); + + rtw_init_pwrctrl_priv(padapter); +@@ -1301,8 +1747,9 @@ _func_enter_; + #endif + + rtw_hal_dm_init(padapter); ++#ifdef CONFIG_SW_LED + rtw_hal_sw_led_init(padapter); +- ++#endif + #ifdef DBG_CONFIG_ERROR_DETECT + rtw_hal_sreset_init(padapter); + #endif +@@ -1348,16 +1795,22 @@ void rtw_cancel_all_timer(_adapter *padapter) + RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_cancel_all_timer\n")); + + _cancel_timer_ex(&padapter->mlmepriv.assoc_timer); +- RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel association timer complete! \n")); ++ RT_TRACE(_module_os_intfs_c_, _drv_info_, ("rtw_cancel_all_timer:cancel association timer complete!\n")); + +- //_cancel_timer_ex(&padapter->securitypriv.tkip_timer); +- //RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel tkip_timer! \n")); ++ #if 0 ++ _cancel_timer_ex(&padapter->securitypriv.tkip_timer); ++ RT_TRACE(_module_os_intfs_c_, _drv_info_, ("rtw_cancel_all_timer:cancel tkip_timer!\n")); ++ #endif + + _cancel_timer_ex(&padapter->mlmepriv.scan_to_timer); +- RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel scan_to_timer! \n")); ++ RT_TRACE(_module_os_intfs_c_, _drv_info_, ("rtw_cancel_all_timer:cancel scan_to_timer!\n")); ++ ++ #ifdef CONFIG_DFS_MASTER ++ _cancel_timer_ex(&padapter->mlmepriv.dfs_master_timer); ++ #endif + + _cancel_timer_ex(&padapter->mlmepriv.dynamic_chk_timer); +- RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel dynamic_chk_timer! \n")); ++ RT_TRACE(_module_os_intfs_c_, _drv_info_, ("rtw_cancel_all_timer:cancel dynamic_chk_timer!\n")); + + // cancel sw led timer + rtw_hal_sw_led_deinit(padapter); +@@ -1390,8 +1843,6 @@ void rtw_cancel_all_timer(_adapter *padapter) + + u8 rtw_free_drv_sw(_adapter *padapter) + { +- struct net_device *pnetdev = (struct net_device*)padapter->pnetdev; +- + RT_TRACE(_module_os_intfs_c_,_drv_info_,("==>rtw_free_drv_sw")); + + #ifdef CONFIG_WAPI_SUPPORT +@@ -1488,20 +1939,12 @@ int _netdev_vir_if_open(struct net_device *pnetdev) + if(!primary_padapter) + goto _netdev_virtual_iface_open_error; + +- if(primary_padapter->bup == _FALSE || primary_padapter->hw_init_completed == _FALSE) +- { ++ if (primary_padapter->bup == _FALSE || !rtw_is_hw_init_completed(primary_padapter)) + _netdev_open(primary_padapter->pnetdev); +- } + + if(padapter->bup == _FALSE && primary_padapter->bup == _TRUE && +- primary_padapter->hw_init_completed == _TRUE) ++ rtw_is_hw_init_completed(primary_padapter)) + { +- int i; +- +- padapter->bDriverStopped = _FALSE; +- padapter->bSurpriseRemoved = _FALSE; +- padapter->bCardDisableWOHSM = _FALSE; +- + padapter->bFWReady = primary_padapter->bFWReady; + + if(rtw_start_drv_threads(padapter) == _FAIL) +@@ -1567,6 +2010,7 @@ static int netdev_vir_if_close(struct net_device *pnetdev) + + #ifdef CONFIG_IOCTL_CFG80211 + rtw_scan_abort(padapter); ++ rtw_cfg80211_wait_scan_req_empty(padapter, 200); + adapter_wdev_data(padapter)->bandroid_scan = _FALSE; + #endif + +@@ -1587,12 +2031,21 @@ static const struct net_device_ops rtw_netdev_vir_if_ops = { + }; + #endif + ++void rtw_hook_vir_if_ops(struct net_device *ndev) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) ++ ndev->netdev_ops = &rtw_netdev_vir_if_ops; ++#else ++ ndev->open = netdev_vir_if_open; ++ ndev->stop = netdev_vir_if_close; ++ ndev->set_mac_address = rtw_net_set_mac_address; ++#endif ++} ++ + _adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, + void (*set_intf_ops)(_adapter *primary_padapter,struct _io_ops *pops)) + { +- + int res = _FAIL; +- struct net_device *pnetdev=NULL; + _adapter *padapter = NULL; + struct dvobj_priv *pdvobjpriv; + u8 mac[ETH_ALEN]; +@@ -1600,36 +2053,22 @@ _adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, + /* + if((primary_padapter->bup == _FALSE) || + (rtw_buddy_adapter_up(primary_padapter) == _FALSE)) +- { +- goto error_rtw_drv_add_iface; +- } +- ++ goto exit; + */ +- /****** init netdev ******/ +- pnetdev = rtw_init_netdev(NULL); +- if (!pnetdev) +- goto error_rtw_drv_add_iface; + +-#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) +- DBG_871X("register rtw_netdev_virtual_iface_ops to netdev_ops\n"); +- pnetdev->netdev_ops = &rtw_netdev_vir_if_ops; +-#else +- pnetdev->open = netdev_vir_if_open; +- pnetdev->stop = netdev_vir_if_close; +-#endif ++ /****** init adapter ******/ ++ padapter = (_adapter *)rtw_zvmalloc(sizeof(*padapter)); ++ if (padapter == NULL) ++ goto exit; + +-#ifdef CONFIG_NO_WIRELESS_HANDLERS +- pnetdev->wireless_handlers = NULL; +-#endif ++ if (loadparam(padapter) != _SUCCESS) ++ goto free_adapter; + +- /****** init adapter ******/ +- padapter = rtw_netdev_priv(pnetdev); + _rtw_memcpy(padapter, primary_padapter, sizeof(_adapter)); + + // + padapter->bup = _FALSE; + padapter->net_closed = _TRUE; +- padapter->hw_init_completed = _FALSE; + padapter->dir_dev = NULL; + padapter->dir_odm = NULL; + +@@ -1648,92 +2087,52 @@ _adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, + //extended virtual interfaces always are set to port0 + padapter->iface_type = IFACE_PORT0; + #endif +- // +- padapter->pnetdev = pnetdev; + +- /****** setup dvobj ******/ ++ /****** hook vir if into dvobj ******/ + pdvobjpriv = adapter_to_dvobj(padapter); + padapter->iface_id = pdvobjpriv->iface_nums; + pdvobjpriv->padapters[pdvobjpriv->iface_nums++] = padapter; + +- SET_NETDEV_DEV(pnetdev, dvobj_to_dev(pdvobjpriv)); +-#ifdef CONFIG_IOCTL_CFG80211 +- rtw_wdev_alloc(padapter, dvobj_to_dev(pdvobjpriv)); +-#endif //CONFIG_IOCTL_CFG80211 +- +- //set interface_type/chip_type/HardwareType +- padapter->interface_type = primary_padapter->interface_type; +- padapter->chip_type = primary_padapter->chip_type; +- padapter->HardwareType = primary_padapter->HardwareType; +- +- //step 2. hook HalFunc, allocate HalData +- //hal_set_hal_ops(padapter); +- rtw_set_hal_ops(padapter); +- +- padapter->HalFunc.inirp_init = NULL; +- padapter->HalFunc.inirp_deinit = NULL; + padapter->intf_start = NULL; + padapter->intf_stop = NULL; + + //step init_io_priv + if ((rtw_init_io_priv(padapter, set_intf_ops)) == _FAIL) { +- RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n")); ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("\n Can't init io_reqs\n")); ++ goto free_adapter; + } + +- //step read_chip_version +- rtw_hal_read_chip_version(padapter); +- +- //step usb endpoint mapping +- rtw_hal_chip_configure(padapter); +- +- + //init drv data + if(rtw_init_drv_sw(padapter)!= _SUCCESS) +- goto error_rtw_drv_add_iface; ++ goto free_drv_sw; + + + //get mac address from primary_padapter +- _rtw_memcpy(mac, primary_padapter->eeprompriv.mac_addr, ETH_ALEN); +- +- if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && +- (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || +- ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && +- (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) +- { +- mac[0] = 0x00; +- mac[1] = 0xe0; +- mac[2] = 0x4c; +- mac[3] = 0x87; +- mac[4] = 0x11; +- mac[5] = 0x22; +- } +- else +- { +- //If the BIT1 is 0, the address is universally administered. +- //If it is 1, the address is locally administered +-#if 1 //needs enable MBSSID CAM +- mac[0] |= BIT(1); // locally administered +- mac[0] |= (padapter->iface_id-1)<<4; ++ _rtw_memcpy(mac, adapter_mac_addr(primary_padapter), ETH_ALEN); ++ ++ /* ++ * If the BIT1 is 0, the address is universally administered. ++ * If it is 1, the address is locally administered ++ */ ++#if 1 /* needs enable MBSSID CAM */ ++ mac[0] |= BIT(1); ++ mac[0] |= (padapter->iface_id-1)<<4; + #endif +- } + +- _rtw_memcpy(padapter->eeprompriv.mac_addr, mac, ETH_ALEN); ++ _rtw_memcpy(adapter_mac_addr(padapter), mac, ETH_ALEN); + + res = _SUCCESS; + +- return padapter; +- +- +-error_rtw_drv_add_iface: +- +- if(padapter) ++free_drv_sw: ++ if (res != _SUCCESS && padapter) + rtw_free_drv_sw(padapter); +- +- if (pnetdev) +- rtw_free_netdev(pnetdev); +- +- return NULL; +- ++free_adapter: ++ if (res != _SUCCESS && padapter) { ++ rtw_vmfree((u8 *)padapter, sizeof(*padapter)); ++ padapter = NULL; ++ } ++exit: ++ return padapter; + } + + void rtw_drv_stop_vir_if(_adapter *padapter) +@@ -1745,12 +2144,9 @@ void rtw_drv_stop_vir_if(_adapter *padapter) + + pnetdev = padapter->pnetdev; + +- rtw_cancel_all_timer(padapter); + + if (padapter->bup == _TRUE) + { +- padapter->bDriverStopped = _TRUE; +- + #ifdef CONFIG_XMIT_ACK + if (padapter->xmitpriv.ack_tx) + rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); +@@ -1765,26 +2161,24 @@ void rtw_drv_stop_vir_if(_adapter *padapter) + + padapter->bup = _FALSE; + } ++ ++ /* cancel timer after thread stop */ ++ rtw_cancel_all_timer(padapter); + } + + void rtw_drv_free_vir_if(_adapter *padapter) + { +- struct net_device *pnetdev=NULL; +- + if (padapter == NULL) + return; + + padapter->pbuddy_adapter = NULL; + +- pnetdev = padapter->pnetdev; +- +-#ifdef CONFIG_IOCTL_CFG80211 +- rtw_wdev_free(padapter->rtw_wdev); +-#endif //CONFIG_IOCTL_CFG80211 +- + rtw_free_drv_sw(padapter); + +- rtw_free_netdev(pnetdev); ++ /* TODO: use rtw_os_ndevs_deinit instead at the first stage of driver's dev deinit function */ ++ rtw_os_ndev_free(padapter); ++ ++ rtw_vmfree((u8 *)padapter, sizeof(_adapter)); + } + + void rtw_drv_stop_vir_ifaces(struct dvobj_priv *dvobj) +@@ -1837,53 +2231,32 @@ int _netdev_if2_open(struct net_device *pnetdev) + #ifdef CONFIG_PLATFORM_INTEL_BYT + if (padapter->bup == _FALSE) + { +- u8 mac[ETH_ALEN]; ++ u8 mac[ETH_ALEN]; + +- //get mac address from primary_padapter ++ /* get mac address from primary_padapter */ + if (primary_padapter->bup == _FALSE) +- rtw_macaddr_cfg(primary_padapter->eeprompriv.mac_addr); ++ rtw_macaddr_cfg(adapter_mac_addr(primary_padapter), get_hal_mac_addr(primary_padapter)); + +- _rtw_memcpy(mac, primary_padapter->eeprompriv.mac_addr, ETH_ALEN); ++ _rtw_memcpy(mac, adapter_mac_addr(primary_padapter), ETH_ALEN); + +- if (((mac[0] == 0xff) && (mac[1] == 0xff) && (mac[2] == 0xff) && +- (mac[3] == 0xff) && (mac[4] == 0xff) && (mac[5] == 0xff)) || +- ((mac[0] == 0x0) && (mac[1] == 0x0) && (mac[2] == 0x0) && +- (mac[3] == 0x0) && (mac[4] == 0x0) && (mac[5] == 0x0))) +- { +- mac[0] = 0x00; +- mac[1] = 0xe0; +- mac[2] = 0x4c; +- mac[3] = 0x87; +- mac[4] = 0x11; +- mac[5] = 0x22; +- } +- else +- { +- //If the BIT1 is 0, the address is universally administered. +- //If it is 1, the address is locally administered +- mac[0] |= BIT(1); // locally administered +- } ++ /* ++ * If the BIT1 is 0, the address is universally administered. ++ * If it is 1, the address is locally administered ++ */ ++ mac[0] |= BIT(1); + +- _rtw_memcpy(padapter->eeprompriv.mac_addr, mac, ETH_ALEN); +- rtw_init_wifidirect_addrs(padapter, padapter->eeprompriv.mac_addr, padapter->eeprompriv.mac_addr); +- _rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ _rtw_memcpy(adapter_mac_addr(padapter), mac, ETH_ALEN); ++ rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); ++ _rtw_memcpy(pnetdev->dev_addr, adapter_mac_addr(padapter), ETH_ALEN); + } + #endif //CONFIG_PLATFORM_INTEL_BYT + +- if(primary_padapter->bup == _FALSE || primary_padapter->hw_init_completed == _FALSE) +- { ++ if (primary_padapter->bup == _FALSE || !rtw_is_hw_init_completed(primary_padapter)) + _netdev_open(primary_padapter->pnetdev); +- } + + if(padapter->bup == _FALSE && primary_padapter->bup == _TRUE && +- primary_padapter->hw_init_completed == _TRUE) ++ rtw_is_hw_init_completed(primary_padapter)) + { +- int i; +- +- padapter->bDriverStopped = _FALSE; +- padapter->bSurpriseRemoved = _FALSE; +- padapter->bCardDisableWOHSM = _FALSE; +- + padapter->bFWReady = primary_padapter->bFWReady; + + //if (init_mlme_ext_priv(padapter) == _FAIL) +@@ -1958,8 +2331,10 @@ int netdev_if2_open(struct net_device *pnetdev) + static int netdev_if2_close(struct net_device *pnetdev) + { + _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + + padapter->net_closed = _TRUE; ++ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; + + if(pnetdev) + { +@@ -1967,11 +2342,13 @@ static int netdev_if2_close(struct net_device *pnetdev) + } + + #ifdef CONFIG_P2P +- rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); ++ if (!rtw_p2p_chk_role(&padapter->wdinfo, P2P_ROLE_DISABLE)) ++ rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); + #endif + + #ifdef CONFIG_IOCTL_CFG80211 + rtw_scan_abort(padapter); ++ rtw_cfg80211_wait_scan_req_empty(padapter, 200); + adapter_wdev_data(padapter)->bandroid_scan = _FALSE; + #endif + +@@ -1994,42 +2371,40 @@ static const struct net_device_ops rtw_netdev_if2_ops = { + }; + #endif + ++void rtw_hook_if2_ops(struct net_device *ndev) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) ++ ndev->netdev_ops = &rtw_netdev_if2_ops; ++#else ++ ndev->init = rtw_ndev_init; ++ ndev->uninit = rtw_ndev_uninit; ++ ndev->open = netdev_if2_open; ++ ndev->stop = netdev_if2_close; ++ ndev->set_mac_address = rtw_net_set_mac_address; ++#endif ++} ++ + _adapter *rtw_drv_if2_init(_adapter *primary_padapter, + void (*set_intf_ops)(_adapter *primary_padapter,struct _io_ops *pops)) + { + int res = _FAIL; +- struct net_device *pnetdev = NULL; + _adapter *padapter = NULL; + struct dvobj_priv *pdvobjpriv; + u8 mac[ETH_ALEN]; + +- /****** init netdev ******/ +- pnetdev = rtw_init_netdev(NULL); +- if (!pnetdev) +- goto error_rtw_drv_if2_init; +- +-#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) +- DBG_871X("register rtw_netdev_if2_ops to netdev_ops\n"); +- pnetdev->netdev_ops = &rtw_netdev_if2_ops; +-#else +- pnetdev->init = rtw_ndev_init; +- pnetdev->uninit = rtw_ndev_uninit; +- pnetdev->open = netdev_if2_open; +- pnetdev->stop = netdev_if2_close; +-#endif ++ /****** init adapter ******/ ++ padapter = (_adapter *)rtw_zvmalloc(sizeof(*padapter)); ++ if (padapter == NULL) ++ goto exit; + +-#ifdef CONFIG_NO_WIRELESS_HANDLERS +- pnetdev->wireless_handlers = NULL; +-#endif ++ if (loadparam(padapter) != _SUCCESS) ++ goto free_adapter; + +- /****** init adapter ******/ +- padapter = rtw_netdev_priv(pnetdev); +- _rtw_memcpy(padapter, primary_padapter, sizeof(_adapter)); ++ _rtw_memcpy(padapter, primary_padapter, sizeof(*padapter)); + + // + padapter->bup = _FALSE; + padapter->net_closed = _TRUE; +- padapter->hw_init_completed = _FALSE; + padapter->dir_dev = NULL; + padapter->dir_odm = NULL; + +@@ -2043,116 +2418,67 @@ _adapter *rtw_drv_if2_init(_adapter *primary_padapter, + #else + padapter->iface_type = IFACE_PORT0; + #endif //CONFIG_HWPORT_SWAP +- // +- padapter->pnetdev = pnetdev; + +- /****** setup dvobj ******/ ++ /****** hook if2 into dvobj ******/ + pdvobjpriv = adapter_to_dvobj(padapter); +- pdvobjpriv->if2 = padapter; + pdvobjpriv->padapters[pdvobjpriv->iface_nums++] = padapter; + +- SET_NETDEV_DEV(pnetdev, dvobj_to_dev(pdvobjpriv)); +- #ifdef CONFIG_IOCTL_CFG80211 +- rtw_wdev_alloc(padapter, dvobj_to_dev(pdvobjpriv)); +- #endif //CONFIG_IOCTL_CFG80211 +- +- //set interface_type/chip_type/HardwareType +- padapter->interface_type = primary_padapter->interface_type; +- padapter->chip_type = primary_padapter->chip_type; +- padapter->HardwareType = primary_padapter->HardwareType; +- +- //step 2. hook HalFunc, allocate HalData +- //hal_set_hal_ops(padapter); +- rtw_set_hal_ops(padapter); +- +- padapter->HalFunc.inirp_init = NULL; +- padapter->HalFunc.inirp_deinit = NULL; +- + // + padapter->intf_start = primary_padapter->intf_start; + padapter->intf_stop = primary_padapter->intf_stop; + + //step init_io_priv + if ((rtw_init_io_priv(padapter, set_intf_ops)) == _FAIL) { +- RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n")); ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("\n Can't init io_reqs\n")); ++ goto free_adapter; + } + +- //step read_chip_version +- rtw_hal_read_chip_version(padapter); +- +- //step usb endpoint mapping +- rtw_hal_chip_configure(padapter); +- +- + //init drv data + if(rtw_init_drv_sw(padapter)!= _SUCCESS) +- goto error_rtw_drv_if2_init; +- ++ goto free_drv_sw; + +- //get mac address from primary_padapter +- _rtw_memcpy(mac, primary_padapter->eeprompriv.mac_addr, ETH_ALEN); + +- if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && +- (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || +- ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && +- (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) +- { +- mac[0] = 0x00; +- mac[1] = 0xe0; +- mac[2] = 0x4c; +- mac[3] = 0x87; +- mac[4] = 0x11; +- mac[5] = 0x22; +- } +- else +- { +- //If the BIT1 is 0, the address is universally administered. +- //If it is 1, the address is locally administered +- mac[0] |= BIT(1); // locally administered ++ /* get mac address from primary_padapter */ ++ _rtw_memcpy(mac, adapter_mac_addr(primary_padapter), ETH_ALEN); + +- } ++ /* ++ * If the BIT1 is 0, the address is universally administered. ++ * If it is 1, the address is locally administered ++ */ ++ mac[0] |= BIT(1); + +- _rtw_memcpy(padapter->eeprompriv.mac_addr, mac, ETH_ALEN); +- rtw_init_wifidirect_addrs(padapter, padapter->eeprompriv.mac_addr, padapter->eeprompriv.mac_addr); ++ _rtw_memcpy(adapter_mac_addr(padapter), mac, ETH_ALEN); ++ rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); + + primary_padapter->pbuddy_adapter = padapter; + + res = _SUCCESS; + +- return padapter; +- +- +-error_rtw_drv_if2_init: +- +- if(padapter) ++free_drv_sw: ++ if (res != _SUCCESS && padapter) + rtw_free_drv_sw(padapter); +- +- if (pnetdev) +- rtw_free_netdev(pnetdev); +- +- return NULL; +- ++free_adapter: ++ if (res != _SUCCESS && padapter) { ++ rtw_vmfree((u8 *)padapter, sizeof(*padapter)); ++ padapter = NULL; ++ } ++exit: ++ return padapter; + } + + void rtw_drv_if2_free(_adapter *if2) + { + _adapter *padapter = if2; +- struct net_device *pnetdev = NULL; + + if (padapter == NULL) + return; + +- pnetdev = padapter->pnetdev; +- +-#ifdef CONFIG_IOCTL_CFG80211 +- rtw_wdev_free(padapter->rtw_wdev); +-#endif /* CONFIG_IOCTL_CFG80211 */ +- +- + rtw_free_drv_sw(padapter); + +- rtw_free_netdev(pnetdev); ++ /* TODO: use rtw_os_ndevs_deinit instead at the first stage of driver's dev deinit function */ ++ rtw_os_ndev_free(padapter); + ++ rtw_vmfree((u8 *)padapter, sizeof(_adapter)); + } + + void rtw_drv_if2_stop(_adapter *if2) +@@ -2163,10 +2489,8 @@ void rtw_drv_if2_stop(_adapter *if2) + if (padapter == NULL) + return; + +- rtw_cancel_all_timer(padapter); + + if (padapter->bup == _TRUE) { +- padapter->bDriverStopped = _TRUE; + #ifdef CONFIG_XMIT_ACK + if (padapter->xmitpriv.ack_tx) + rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); +@@ -2181,9 +2505,138 @@ void rtw_drv_if2_stop(_adapter *if2) + + padapter->bup = _FALSE; + } ++ ++ /* cancel timer after thread stop */ ++ rtw_cancel_all_timer(padapter); + } + #endif //end of CONFIG_CONCURRENT_MODE + ++int rtw_os_ndevs_register(struct dvobj_priv *dvobj) ++{ ++ int i, status = _SUCCESS; ++ struct registry_priv *regsty = dvobj_to_regsty(dvobj); ++ _adapter *adapter; ++ ++#if defined(CONFIG_IOCTL_CFG80211) ++ if (rtw_cfg80211_dev_res_register(dvobj) != _SUCCESS) { ++ rtw_warn_on(1); ++ status = _FAIL; ++ goto exit; ++ } ++#endif ++ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ ++ if (i >= IFACE_ID_MAX) { ++ DBG_871X_LEVEL(_drv_err_, "%s %d >= IFACE_ID_MAX\n", __func__, i); ++ rtw_warn_on(1); ++ continue; ++ } ++ ++ adapter = dvobj->padapters[i]; ++ if (adapter) { ++ char *name; ++ ++ if (adapter->iface_id == IFACE_ID0) ++ name = regsty->ifname; ++ else if (adapter->iface_id == IFACE_ID1) ++ name = regsty->if2name; ++ else ++ name = "wlan%d"; ++ ++ #ifdef CONFIG_CONCURRENT_MODE ++ switch (adapter->adapter_type) { ++ case SECONDARY_ADAPTER: ++ rtw_hook_if2_ops(adapter->pnetdev); ++ break; ++ #ifdef CONFIG_MULTI_VIR_IFACES ++ case MAX_ADAPTER: ++ rtw_hook_vir_if_ops(adapter->pnetdev); ++ break; ++ #endif ++ } ++ #endif /* CONFIG_CONCURRENT_MODE */ ++ ++ status = rtw_os_ndev_register(adapter, name); ++ ++ if (status != _SUCCESS) { ++ rtw_warn_on(1); ++ break; ++ } ++ } ++ } ++ ++ if (status != _SUCCESS) { ++ for (; i >= 0; i--) { ++ adapter = dvobj->padapters[i]; ++ if (adapter) ++ rtw_os_ndev_unregister(adapter); ++ } ++ } ++ ++#if defined(CONFIG_IOCTL_CFG80211) ++ if (status != _SUCCESS) ++ rtw_cfg80211_dev_res_unregister(dvobj); ++#endif ++exit: ++ return status; ++} ++ ++void rtw_os_ndevs_unregister(struct dvobj_priv *dvobj) ++{ ++ int i; ++ _adapter *adapter = NULL; ++ ++ for (i = 0; i < dvobj->iface_nums; i++) { ++ adapter = dvobj->padapters[i]; ++ ++ if (adapter == NULL) ++ continue; ++ ++ rtw_os_ndev_unregister(adapter); ++ } ++ ++#if defined(CONFIG_IOCTL_CFG80211) ++ rtw_cfg80211_dev_res_unregister(dvobj); ++#endif ++} ++ ++/** ++ * rtw_os_ndevs_init - Allocate and register OS layer net devices and relating structures for @dvobj ++ * @dvobj: the dvobj on which this function applies ++ * ++ * Returns: ++ * _SUCCESS or _FAIL ++ */ ++int rtw_os_ndevs_init(struct dvobj_priv *dvobj) ++{ ++ int ret = _FAIL; ++ ++ if (rtw_os_ndevs_alloc(dvobj) != _SUCCESS) ++ goto exit; ++ ++ if (rtw_os_ndevs_register(dvobj) != _SUCCESS) ++ goto os_ndevs_free; ++ ++ ret = _SUCCESS; ++ ++os_ndevs_free: ++ if (ret != _SUCCESS) ++ rtw_os_ndevs_free(dvobj); ++exit: ++ return ret; ++} ++ ++/** ++ * rtw_os_ndevs_deinit - Unregister and free OS layer net devices and relating structures for @dvobj ++ * @dvobj: the dvobj on which this function applies ++ */ ++void rtw_os_ndevs_deinit(struct dvobj_priv *dvobj) ++{ ++ rtw_os_ndevs_unregister(dvobj); ++ rtw_os_ndevs_free(dvobj); ++} ++ + #ifdef CONFIG_BR_EXT + void netdev_br_init(struct net_device *netdev) + { +@@ -2233,76 +2686,14 @@ void netdev_br_init(struct net_device *netdev) + } + #endif //CONFIG_BR_EXT + +-static int _rtw_drv_register_netdev(_adapter *padapter, char *name) +-{ +- int ret = _SUCCESS; +- struct net_device *pnetdev = padapter->pnetdev; +- +- /* alloc netdev name */ +- rtw_init_netdev_name(pnetdev, name); +- +- _rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); +- +- /* Tell the network stack we exist */ +- if (register_netdev(pnetdev) != 0) { +- DBG_871X(FUNC_NDEV_FMT "Failed!\n", FUNC_NDEV_ARG(pnetdev)); +- ret = _FAIL; +- goto error_register_netdev; +- } +- +- DBG_871X("%s, MAC Address (if%d) = " MAC_FMT "\n", __FUNCTION__, (padapter->iface_id+1), MAC_ARG(pnetdev->dev_addr)); +- +- return ret; +- +-error_register_netdev: +- +- if(padapter->iface_id > IFACE_ID0) +- { +- rtw_free_drv_sw(padapter); +- +- rtw_free_netdev(pnetdev); +- } +- +- return ret; +-} +- +-int rtw_drv_register_netdev(_adapter *if1) +-{ +- int i, status = _SUCCESS; +- struct dvobj_priv *dvobj = if1->dvobj; +- +- if(dvobj->iface_nums < IFACE_ID_MAX) +- { +- for(i=0; iiface_nums; i++) +- { +- _adapter *padapter = dvobj->padapters[i]; +- +- if(padapter) +- { +- char *name; +- +- if(padapter->iface_id == IFACE_ID0) +- name = if1->registrypriv.ifname; +- else if(padapter->iface_id == IFACE_ID1) +- name = if1->registrypriv.if2name; +- else +- name = "wlan%d"; +- +- if((status = _rtw_drv_register_netdev(padapter, name)) != _SUCCESS) { +- break; +- } +- } +- } +- } +- +- return status; +-} +- + int _netdev_open(struct net_device *pnetdev) + { + uint status; + _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX + + RT_TRACE(_module_os_intfs_c_,_drv_info_,("+871x_drv - dev_open\n")); + DBG_871X("+871x_drv - drv_open, bup=%d\n", padapter->bup); +@@ -2321,14 +2712,13 @@ int _netdev_open(struct net_device *pnetdev) + if(padapter->bup == _FALSE) + { + #ifdef CONFIG_PLATFORM_INTEL_BYT +- rtw_macaddr_cfg(padapter->eeprompriv.mac_addr); +- rtw_init_wifidirect_addrs(padapter, padapter->eeprompriv.mac_addr, padapter->eeprompriv.mac_addr); +- _rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ rtw_macaddr_cfg(adapter_mac_addr(padapter), get_hal_mac_addr(padapter)); ++ rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); ++ _rtw_memcpy(pnetdev->dev_addr, adapter_mac_addr(padapter), ETH_ALEN); + #endif //CONFIG_PLATFORM_INTEL_BYT + +- padapter->bDriverStopped = _FALSE; +- padapter->bSurpriseRemoved = _FALSE; +- padapter->bCardDisableWOHSM = _FALSE; ++ rtw_clr_surprise_removed(padapter); ++ rtw_clr_drv_stopped(padapter); + + status = rtw_hal_init(padapter); + if (status ==_FAIL) +@@ -2385,6 +2775,18 @@ int _netdev_open(struct net_device *pnetdev) + netdev_br_init(pnetdev); + #endif // CONFIG_BR_EXT + ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ if(is_primary_adapter(padapter) && _TRUE == pHalData->EEPROMBluetoothCoexist) ++ { ++ rtw_btcoex_init_socket(padapter); ++ padapter->coex_info.BtMgnt.ExtConfig.HCIExtensionVer = 0x04; ++ rtw_btcoex_SetHciVersion(padapter,0x04); ++ } ++ else ++ DBG_871X("CONFIG_BT_COEXIST: SECONDARY_ADAPTER\n"); ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX ++ ++ + netdev_open_normal_process: + + #ifdef CONFIG_CONCURRENT_MODE +@@ -2444,8 +2846,7 @@ int ips_netdrv_open(_adapter *padapter) + DBG_871X("===> %s.........\n",__FUNCTION__); + + +- padapter->bDriverStopped = _FALSE; +- padapter->bCardDisableWOHSM = _FALSE; ++ rtw_clr_drv_stopped(padapter); + //padapter->bup = _TRUE; + + status = rtw_hal_init(padapter); +@@ -2490,7 +2891,7 @@ int rtw_ips_pwr_up(_adapter *padapter) + if (psrtpriv->silent_reset_inprogress == _TRUE) + #endif//#ifdef DBG_CONFIG_ERROR_DETECT + #endif //defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) +- rtw_reset_drv_sw(padapter); ++ rtw_reset_drv_sw(padapter); + + result = ips_netdrv_open(padapter); + +@@ -2506,11 +2907,9 @@ void rtw_ips_pwr_down(_adapter *padapter) + u32 start_time = rtw_get_current_time(); + DBG_871X("===> rtw_ips_pwr_down...................\n"); + +- padapter->bCardDisableWOHSM = _TRUE; + padapter->net_closed = _TRUE; + + rtw_ips_dev_unload(padapter); +- padapter->bCardDisableWOHSM = _FALSE; + DBG_871X("<=== rtw_ips_pwr_down..................... in %dms\n", rtw_get_passing_time_ms(start_time)); + } + #endif +@@ -2539,10 +2938,8 @@ void rtw_ips_dev_unload(_adapter *padapter) + } + } + +- if(padapter->bSurpriseRemoved == _FALSE) +- { ++ if (!rtw_is_surprise_removed(padapter)) + rtw_hal_deinit(padapter); +- } + + } + +@@ -2571,6 +2968,10 @@ static int netdev_close(struct net_device *pnetdev) + { + _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX + + RT_TRACE(_module_os_intfs_c_,_drv_info_,("+871x_drv - drv_close\n")); + +@@ -2583,18 +2984,18 @@ static int netdev_close(struct net_device *pnetdev) + } + padapter->net_closed = _TRUE; + padapter->netif_up = _FALSE; ++ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; + +-/* if(!padapter->hw_init_completed) +- { +- DBG_871X("(1)871x_drv - drv_close, bup=%d, hw_init_completed=%d\n", padapter->bup, padapter->hw_init_completed); ++/* if (!rtw_is_hw_init_completed(padapter)) { ++ DBG_871X("(1)871x_drv - drv_close, bup=%d, hw_init_completed=%s\n", padapter->bup, rtw_is_hw_init_completed(padapter)?"_TRUE":"_FALSE"); + +- padapter->bDriverStopped = _TRUE; ++ rtw_set_drv_stopped(padapter); + + rtw_dev_unload(padapter); + } + else*/ + if(pwrctl->rf_pwrstate == rf_on){ +- DBG_871X("(2)871x_drv - drv_close, bup=%d, hw_init_completed=%d\n", padapter->bup, padapter->hw_init_completed); ++ DBG_871X("(2)871x_drv - drv_close, bup=%d, hw_init_completed=%s\n", padapter->bup, rtw_is_hw_init_completed(padapter)?"_TRUE":"_FALSE"); + + //s1. + if(pnetdev) +@@ -2607,7 +3008,7 @@ static int netdev_close(struct net_device *pnetdev) + LeaveAllPowerSaveMode(padapter); + rtw_disassoc_cmd(padapter, 500, _FALSE); + //s2-2. indicate disconnect to os +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + //s2-3. + rtw_free_assoc_resources(padapter, 1); + //s2-4. +@@ -2626,11 +3027,13 @@ static int netdev_close(struct net_device *pnetdev) + #endif // CONFIG_BR_EXT + + #ifdef CONFIG_P2P +- rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); ++ if (!rtw_p2p_chk_role(&padapter->wdinfo, P2P_ROLE_DISABLE)) ++ rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); + #endif //CONFIG_P2P + + #ifdef CONFIG_IOCTL_CFG80211 + rtw_scan_abort(padapter); ++ rtw_cfg80211_wait_scan_req_empty(padapter, 200); + adapter_wdev_data(padapter)->bandroid_scan = _FALSE; + //padapter->rtw_wdev->iftype = NL80211_IFTYPE_MONITOR; //set this at the end + #endif //CONFIG_IOCTL_CFG80211 +@@ -2638,6 +3041,12 @@ static int netdev_close(struct net_device *pnetdev) + #ifdef CONFIG_WAPI_SUPPORT + rtw_wapi_disable_tx(padapter); + #endif ++#ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ if(is_primary_adapter(padapter) && _TRUE == pHalData->EEPROMBluetoothCoexist) ++ rtw_btcoex_close_socket(padapter); ++ else ++ DBG_871X("CONFIG_BT_COEXIST: SECONDARY_ADAPTER\n"); ++#endif //CONFIG_BT_COEXIST_SOCKET_TRX + #else //!CONFIG_PLATFORM_INTEL_BYT + + if (pwrctl->bInSuspend == _TRUE) +@@ -2647,6 +3056,9 @@ static int netdev_close(struct net_device *pnetdev) + } + + rtw_scan_abort(padapter); // stop scanning process before wifi is going to down ++ #ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_wait_scan_req_empty(padapter, 200); ++ #endif + + DBG_871X("netdev_close, bips_processing=%d\n", pwrctl->bips_processing); + while (pwrctl->bips_processing == _TRUE) // waiting for ips_processing done before call rtw_dev_unload() +@@ -2760,17 +3172,30 @@ static int route_dump(u32 *gw_addr ,int* gw_index) + + msg.msg_name = &nladdr; + msg.msg_namelen = sizeof(nladdr); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) ++ /* referece:sock_xmit in kernel code ++ * WRITE for sock_sendmsg, READ for sock_recvmsg ++ * third parameter for msg_iovlen ++ * last parameter for iov_len ++ */ ++ iov_iter_init(&msg.msg_iter, WRITE, &iov, 1, sizeof(req)); ++#else + msg.msg_iov = &iov; + msg.msg_iovlen = 1; ++#endif + msg.msg_control = NULL; + msg.msg_controllen = 0; + msg.msg_flags = MSG_DONTWAIT; + + oldfs = get_fs(); set_fs(KERNEL_DS); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) ++ err = sock_sendmsg(sock, &msg); ++#else + err = sock_sendmsg(sock, &msg, sizeof(req)); ++#endif + set_fs(oldfs); + +- if (size < 0) ++ if (err < 0) + goto out_sock; + + pg = (char *) __get_free_page(GFP_KERNEL); +@@ -2790,6 +3215,10 @@ restart: + iov.iov_base = pg; + iov.iov_len = PAGE_SIZE; + ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) ++ iov_iter_init(&msg.msg_iter, READ, &iov, 1, PAGE_SIZE); ++#endif ++ + oldfs = get_fs(); set_fs(KERNEL_DS); + err = sock_recvmsg(sock, &msg, PAGE_SIZE, MSG_DONTWAIT); + set_fs(oldfs); +@@ -2858,14 +3287,22 @@ done: + + msg.msg_name = &nladdr; + msg.msg_namelen = sizeof(nladdr); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) ++ iov_iter_init(&msg.msg_iter, WRITE, &iov, 1, sizeof(req)); ++#else + msg.msg_iov = &iov; + msg.msg_iovlen = 1; ++#endif + msg.msg_control = NULL; + msg.msg_controllen = 0; + msg.msg_flags=MSG_DONTWAIT; + + oldfs = get_fs(); set_fs(KERNEL_DS); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) ++ err = sock_sendmsg(sock, &msg); ++#else + err = sock_sendmsg(sock, &msg, sizeof(req)); ++#endif + set_fs(oldfs); + + if (err > 0) +@@ -2942,11 +3379,6 @@ int rtw_gw_addr_query(_adapter *padapter) + int i; + int res; + +- if (pwrctl->wowlan_from_cmd == _TRUE) { +- DBG_871X("%s: return cuz wowlan_from_cmd\n", __func__); +- return 0; +- } +- + res = get_defaultgw(&gw_addr, gw_mac); + if(!res) + { +@@ -2982,7 +3414,7 @@ void rtw_dev_unload(PADAPTER padapter) + { + DBG_871X("===> %s\n",__FUNCTION__); + +- padapter->bDriverStopped = _TRUE; ++ rtw_set_drv_stopped(padapter); + #ifdef CONFIG_XMIT_ACK + if (padapter->xmitpriv.ack_tx) + rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); +@@ -3013,13 +3445,11 @@ void rtw_dev_unload(PADAPTER padapter) + if(rtw_hal_check_ips_status(padapter) == _TRUE || pwrctl->rf_pwrstate == rf_off) { //check HW status and SW state + DBG_871X_LEVEL(_drv_always_, "%s: driver in IPS-FWLPS\n", __func__); + pdbgpriv->dbg_dev_unload_inIPS_cnt++; +- LeaveAllPowerSaveMode(padapter); + } else { + DBG_871X_LEVEL(_drv_always_, "%s: driver not in IPS\n", __func__); + } + +- if (padapter->bSurpriseRemoved == _FALSE) +- { ++ if (!rtw_is_surprise_removed(padapter)) { + #ifdef CONFIG_BT_COEXIST + rtw_btcoex_IpsNotify(padapter, pwrctl->ips_mode_req); + #endif +@@ -3034,7 +3464,7 @@ void rtw_dev_unload(PADAPTER padapter) + //amy modify 20120221 for power seq is different between driver open and ips + rtw_hal_deinit(padapter); + } +- padapter->bSurpriseRemoved = _TRUE; ++ rtw_set_surprise_removed(padapter); + } + RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("@ %s: deinit hal complelt!\n",__FUNCTION__)); + +@@ -3046,7 +3476,9 @@ void rtw_dev_unload(PADAPTER padapter) + RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("%s: bup==_FALSE\n",__FUNCTION__)); + DBG_871X("%s: bup==_FALSE\n",__FUNCTION__); + } +- ++ ++ /* cancel timer after thread stop */ ++ rtw_cancel_all_timer(padapter); + RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("-%s\n",__FUNCTION__)); + } + +@@ -3081,12 +3513,12 @@ int rtw_suspend_free_assoc_resource(_adapter *padapter) + { + rtw_disassoc_cmd(padapter, 0, _FALSE); + //s2-2. indicate disconnect to os +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + } + #ifdef CONFIG_AP_MODE + else if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) + { +- rtw_sta_flush(padapter); ++ rtw_sta_flush(padapter, _TRUE); + } + #endif + +@@ -3097,15 +3529,18 @@ int rtw_suspend_free_assoc_resource(_adapter *padapter) + #ifdef CONFIG_AUTOSUSPEND + if(is_primary_adapter(padapter) && (!adapter_to_pwrctl(padapter)->bInternalAutoSuspend )) + #endif +- rtw_free_network_queue(padapter, _TRUE); ++ rtw_free_network_queue(padapter, _TRUE); + +- if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) { ++ DBG_871X_LEVEL(_drv_always_, "%s: fw_under_survey\n", __func__); + rtw_indicate_scan_done(padapter, 1); ++ clr_fwstate(pmlmepriv, _FW_UNDER_SURVEY); ++ } + + if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) + { + DBG_871X_LEVEL(_drv_always_, "%s: fw_under_linking\n", __FUNCTION__); +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + } + + DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); +@@ -3138,6 +3573,7 @@ int rtw_suspend_wow(_adapter *padapter) + #endif + + if (pwrpriv->wowlan_mode == _TRUE) { ++ + if(pnetdev) + rtw_netif_stop_queue(pnetdev); + #ifdef CONFIG_CONCURRENT_MODE +@@ -3146,18 +3582,16 @@ int rtw_suspend_wow(_adapter *padapter) + rtw_netif_stop_queue(pbuddy_netdev); + } + #endif//CONFIG_CONCURRENT_MODE ++ // 0. Power off LED ++ rtw_led_control(padapter, LED_CTL_POWER_OFF); + // 1. stop thread +- padapter->bDriverStopped = _TRUE; //for stop thread ++ rtw_set_drv_stopped(padapter); /*for stop thread*/ + rtw_stop_drv_threads(padapter); +- padapter->bDriverStopped = _FALSE; //for 32k command +- + #ifdef CONFIG_CONCURRENT_MODE +- if (rtw_buddy_adapter_up(padapter)) { +- padapter->pbuddy_adapter->bDriverStopped = _TRUE; //for stop thread ++ if (rtw_buddy_adapter_up(padapter)) + rtw_stop_drv_threads(padapter->pbuddy_adapter); +- padapter->pbuddy_adapter->bDriverStopped = _FALSE; //for 32k command +- } +- #endif // CONFIG_CONCURRENT_MODE ++ #endif /*CONFIG_CONCURRENT_MODE*/ ++ rtw_clr_drv_stopped(padapter); /*for 32k command*/ + + //#ifdef CONFIG_LPS + //rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); +@@ -3177,8 +3611,7 @@ int rtw_suspend_wow(_adapter *padapter) + #endif + + // 2.1 clean interupt +- if (padapter->HalFunc.clear_interrupt) +- padapter->HalFunc.clear_interrupt(padapter); ++ rtw_hal_clear_interrupt(padapter); + #endif //CONFIG_SDIO_HCI + + // 2.2 free irq +@@ -3194,7 +3627,7 @@ int rtw_suspend_wow(_adapter *padapter) + #endif + + poidparam.subcode = WOWLAN_ENABLE; +- padapter->HalFunc.SetHwRegHandler(padapter,HW_VAR_WOWLAN,(u8 *)&poidparam); ++ rtw_hal_set_hwreg(padapter,HW_VAR_WOWLAN,(u8 *)&poidparam); + if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) { + if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) + && check_fwstate(pmlmepriv, _FW_LINKED)) +@@ -3232,10 +3665,13 @@ int rtw_suspend_wow(_adapter *padapter) + if(pwrpriv->wowlan_pno_enable) { + DBG_871X_LEVEL(_drv_always_, "%s: pno: %d\n", __func__, + pwrpriv->wowlan_pno_enable); ++#ifdef CONFIG_FWLPS_IN_IPS ++ rtw_set_fw_in_ips_mode(padapter, _TRUE); ++#endif + } + #ifdef CONFIG_LPS + else +- rtw_set_ps_mode(padapter, PS_MODE_DTIM, 0, 0, "WOWLAN"); ++ rtw_set_ps_mode(padapter, PS_MODE_MAX, 0, 0, "WOWLAN"); + #endif //#ifdef CONFIG_LPS + + } +@@ -3279,22 +3715,16 @@ int rtw_suspend_ap_wow(_adapter *padapter) + rtw_netif_stop_queue(pbuddy_netdev); + } + #endif//CONFIG_CONCURRENT_MODE ++ // 0. Power off LED ++ rtw_led_control(padapter, LED_CTL_POWER_OFF); + // 1. stop thread +- padapter->bDriverStopped = _TRUE; //for stop thread ++ rtw_set_drv_stopped(padapter); /*for stop thread*/ + rtw_stop_drv_threads(padapter); +- padapter->bDriverStopped = _FALSE; //for 32k command +- + #ifdef CONFIG_CONCURRENT_MODE +- if(rtw_buddy_adapter_up(padapter)){ +- padapter->pbuddy_adapter->bDriverStopped = _TRUE; //for stop thread ++ if (rtw_buddy_adapter_up(padapter)) + rtw_stop_drv_threads(padapter->pbuddy_adapter); +- padapter->pbuddy_adapter->bDriverStopped = _FALSE; //for 32k command +- } +- #endif // CONFIG_CONCURRENT_MODE +- +- //#ifdef CONFIG_LPS +- //rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); +- //#endif ++ #endif /* CONFIG_CONCURRENT_MODE */ ++ rtw_clr_drv_stopped(padapter); /*for 32k command*/ + + #ifdef CONFIG_SDIO_HCI + // 2. disable interrupt +@@ -3307,12 +3737,10 @@ int rtw_suspend_ap_wow(_adapter *padapter) + #endif + + // 2.1 clean interupt +- if (padapter->HalFunc.clear_interrupt) +- padapter->HalFunc.clear_interrupt(padapter); ++ rtw_hal_clear_interrupt(padapter); + #endif //CONFIG_SDIO_HCI + + // 2.2 free irq +- //sdio_free_irq(adapter_to_dvobj(padapter)); + if(padapter->intf_free_irq) + padapter->intf_free_irq(adapter_to_dvobj(padapter)); + +@@ -3324,8 +3752,7 @@ int rtw_suspend_ap_wow(_adapter *padapter) + #endif + + poidparam.subcode = WOWLAN_AP_ENABLE; +- padapter->HalFunc.SetHwRegHandler(padapter, +- HW_VAR_AP_WOWLAN,(u8 *)&poidparam); ++ rtw_hal_set_hwreg(padapter, HW_VAR_WOWLAN, (u8 *)&poidparam); + + DBG_871X_LEVEL(_drv_always_, "%s: wowmode suspending\n", __func__); + +@@ -3353,12 +3780,10 @@ int rtw_suspend_ap_wow(_adapter *padapter) + } + #endif + +- + #ifdef CONFIG_LPS + rtw_set_ps_mode(padapter, PS_MODE_MIN, 0, 0, "AP-WOWLAN"); + #endif + +- + DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); + return ret; + } +@@ -3431,6 +3856,7 @@ int rtw_suspend_common(_adapter *padapter) + + DBG_871X_LEVEL(_drv_always_, " suspend start\n"); + DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); ++ + pdbgpriv->dbg_suspend_cnt++; + + pwrpriv->bInSuspend = _TRUE; +@@ -3447,10 +3873,11 @@ int rtw_suspend_common(_adapter *padapter) + } + #endif + +- if((!padapter->bup) || (padapter->bDriverStopped)||(padapter->bSurpriseRemoved)) +- { +- DBG_871X("%s bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n", __FUNCTION__ +- ,padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved); ++ if ((!padapter->bup) || RTW_CANNOT_RUN(padapter)) { ++ DBG_871X("%s bup=%d bDriverStopped=%s bSurpriseRemoved = %s\n", __func__ ++ , padapter->bup ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False"); + pdbgpriv->dbg_suspend_error_cnt++; + goto exit; + } +@@ -3483,10 +3910,6 @@ int rtw_suspend_common(_adapter *padapter) + } + #endif // CONFIG_BT_COEXIST + +-#if defined(CONFIG_WOWLAN) && defined(CONFIG_GPIO_WAKEUP) +- rtw_clear_hostwakeupgpio(padapter); +-#endif // CONFIG_WOWLAN && CONFIG_GPIO_WAKEUP +- + rtw_ps_deny_cancel(padapter, PS_DENY_SUSPEND); + + if (check_fwstate(pmlmepriv,WIFI_STATION_STATE) == _TRUE +@@ -3541,6 +3964,7 @@ int rtw_suspend_common(_adapter *padapter) + rtw_suspend_normal(padapter); + } + ++ + DBG_871X_LEVEL(_drv_always_, "rtw suspend success in %d ms\n", + rtw_get_passing_time_ms(start_time)); + +@@ -3580,16 +4004,21 @@ _func_enter_; + goto exit; + } + +- if (padapter->bDriverStopped || padapter->bSurpriseRemoved) { +- DBG_871X("%s pdapter %p bDriverStopped %d bSurpriseRemoved %d\n", +- __FUNCTION__, padapter, padapter->bDriverStopped, +- padapter->bSurpriseRemoved); ++ if (RTW_CANNOT_RUN(padapter)) { ++ DBG_871X("%s pdapter %p bDriverStopped %s bSurpriseRemoved %s\n" ++ , __func__, padapter ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False"); + goto exit; + } + + #ifdef CONFIG_PNO_SUPPORT + pwrpriv->pno_in_resume = _TRUE; +-#endif ++#ifdef CONFIG_FWLPS_IN_IPS ++ if(pwrpriv->wowlan_pno_enable) ++ rtw_set_fw_in_ips_mode(padapter, _FALSE); ++#endif //CONFIG_FWLPS_IN_IPS ++#endif//CONFIG_PNO_SUPPORT + + if (pwrpriv->wowlan_mode == _TRUE){ + #ifdef CONFIG_LPS +@@ -3609,8 +4038,7 @@ _func_enter_; + } + #endif + +- if (padapter->HalFunc.clear_interrupt) +- padapter->HalFunc.clear_interrupt(padapter); ++ rtw_hal_clear_interrupt(padapter); + #endif //CONFIG_SDIO_HCI + + //if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) { +@@ -3622,7 +4050,7 @@ _func_enter_; + + //Disable WOW, set H2C command + poidparam.subcode=WOWLAN_DISABLE; +- padapter->HalFunc.SetHwRegHandler(padapter,HW_VAR_WOWLAN,(u8 *)&poidparam); ++ rtw_hal_set_hwreg(padapter,HW_VAR_WOWLAN,(u8 *)&poidparam); + + #ifdef CONFIG_CONCURRENT_MODE + rtw_reset_drv_sw(padapter->pbuddy_adapter); +@@ -3634,19 +4062,14 @@ _func_enter_; + } + + +- padapter->bDriverStopped = _FALSE; +- DBG_871X("%s: wowmode resuming, DriverStopped:%d\n", __func__, padapter->bDriverStopped); ++ rtw_clr_drv_stopped(padapter); ++ DBG_871X("%s: wowmode resuming, DriverStopped:%s\n", __func__, rtw_is_drv_stopped(padapter)?"True":"False"); + rtw_start_drv_threads(padapter); + + #ifdef CONFIG_CONCURRENT_MODE + if (padapter->pbuddy_adapter) +- { +- padapter->pbuddy_adapter->bDriverStopped = _FALSE; +- DBG_871X("%s: wowmode resuming, pbuddy_adapter->DriverStopped:%d\n", +- __FUNCTION__, padapter->pbuddy_adapter->bDriverStopped); + rtw_start_drv_threads(padapter->pbuddy_adapter); +- } +-#endif // CONFIG_CONCURRENT_MODE ++#endif /* CONFIG_CONCURRENT_MODE*/ + + if (padapter->intf_start) { + padapter->intf_start(padapter); +@@ -3688,7 +4111,7 @@ _func_enter_; + + DBG_871X("%s: disconnect reason: %02x\n", __func__, + pwrpriv->wowlan_wake_reason); +- rtw_indicate_disconnect(padapter); ++ rtw_indicate_disconnect(padapter, 0, _FALSE); + + rtw_sta_media_status_rpt(padapter, + rtw_get_stainfo(&padapter->stapriv, +@@ -3714,7 +4137,16 @@ _func_enter_; + } + + if (pwrpriv->wowlan_wake_reason == RX_PNOWakeUp) { +- rtw_lock_ext_suspend_timeout(15000); ++#ifdef CONFIG_IOCTL_CFG80211 ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0)) ++ u8 locally_generated = 1; ++ ++ cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, locally_generated, GFP_ATOMIC); ++#else ++ cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC); ++#endif ++#endif /* CONFIG_IOCTL_CFG80211 */ ++ rtw_lock_ext_suspend_timeout(10000); + } + + if (pwrpriv->wowlan_mode == _TRUE) { +@@ -3729,8 +4161,19 @@ _func_enter_; + + pwrpriv->wowlan_mode =_FALSE; + ++ // Power On LED ++#ifdef CONFIG_SW_LED ++ rtw_hal_sw_led_init(padapter); ++ if(pwrpriv->wowlan_wake_reason == Rx_DisAssoc || ++ pwrpriv->wowlan_wake_reason == Rx_DeAuth || ++ pwrpriv->wowlan_wake_reason == FWDecisionDisconnect) ++ rtw_led_control(padapter, LED_CTL_NO_LINK); ++ else ++ rtw_led_control(padapter, LED_CTL_LINK); ++#endif + //clean driver side wake up reason. + pwrpriv->wowlan_wake_reason = 0; ++ + exit: + DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); + _func_exit_; +@@ -3775,8 +4218,7 @@ _func_enter_; + + rtw_hal_disable_interrupt(padapter); + +- if (padapter->HalFunc.clear_interrupt) +- padapter->HalFunc.clear_interrupt(padapter); ++ rtw_hal_clear_interrupt(padapter); + + //if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) { + if((padapter->intf_alloc_irq) && (padapter->intf_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS)){ +@@ -3787,23 +4229,17 @@ _func_enter_; + + //Disable WOW, set H2C command + poidparam.subcode = WOWLAN_AP_DISABLE; +- padapter->HalFunc.SetHwRegHandler(padapter, +- HW_VAR_AP_WOWLAN,(u8 *)&poidparam); ++ rtw_hal_set_hwreg(padapter, HW_VAR_WOWLAN, (u8 *)&poidparam); + pwrpriv->wowlan_ap_mode = _FALSE; + +- padapter->bDriverStopped = _FALSE; +- DBG_871X("%s: wowmode resuming, DriverStopped:%d\n", __func__, padapter->bDriverStopped); ++ rtw_clr_drv_stopped(padapter); ++ DBG_871X("%s: wowmode resuming, DriverStopped:%s\n", __func__, rtw_is_drv_stopped(padapter)?"True":"False"); + rtw_start_drv_threads(padapter); + + #ifdef CONFIG_CONCURRENT_MODE + if (rtw_buddy_adapter_up(padapter)) +- { +- padapter->pbuddy_adapter->bDriverStopped = _FALSE; +- DBG_871X("%s: wowmode resuming, pbuddy_adapter->DriverStopped:%d\n", +- __FUNCTION__, padapter->pbuddy_adapter->bDriverStopped); + rtw_start_drv_threads(padapter->pbuddy_adapter); +- } +-#endif // CONFIG_CONCURRENT_MODE ++#endif /* CONFIG_CONCURRENT_MODE */ + + #ifdef CONFIG_CONCURRENT_MODE + if (rtw_buddy_adapter_up(padapter)) { +@@ -3869,6 +4305,12 @@ _func_enter_; + #endif + //clean driver side wake up reason. + pwrpriv->wowlan_wake_reason = 0; ++ ++ // Power On LED ++#ifdef CONFIG_SW_LED ++ rtw_hal_sw_led_init(padapter); ++ rtw_led_control(padapter, LED_CTL_LINK); ++#endif + exit: + DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); + _func_exit_; +@@ -3988,7 +4430,9 @@ _func_enter_; + } + } + #endif +- ++#ifdef CONFIG_SW_LED ++ rtw_hal_sw_led_init(padapter); ++#endif + #ifdef CONFIG_RESUME_IN_WORKQUEUE + //rtw_unlock_suspend(); + #endif //CONFIG_RESUME_IN_WORKQUEUE +@@ -4077,7 +4521,7 @@ u8 rtw_get_gpio(struct net_device *netdev, u8 gpio_num) + } + EXPORT_SYMBOL(rtw_get_gpio); + +-int rtw_set_gpio_output_value(struct net_device *netdev, u8 gpio_num, BOOLEAN isHigh) ++int rtw_set_gpio_output_value(struct net_device *netdev, u8 gpio_num, bool isHigh) + { + u8 direction = 0; + u8 res = -1; +@@ -4086,11 +4530,25 @@ int rtw_set_gpio_output_value(struct net_device *netdev, u8 gpio_num, BOOLEAN i + } + EXPORT_SYMBOL(rtw_set_gpio_output_value); + +-int rtw_config_gpio(struct net_device *netdev, u8 gpio_num, BOOLEAN isOutput) ++int rtw_config_gpio(struct net_device *netdev, u8 gpio_num, bool isOutput) + { + _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); + return rtw_hal_config_gpio(adapter,gpio_num,isOutput); + } + EXPORT_SYMBOL(rtw_config_gpio); ++int rtw_register_gpio_interrupt(struct net_device *netdev, int gpio_num, void(*callback)(u8 level)) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); ++ return rtw_hal_register_gpio_interrupt(adapter,gpio_num,callback); ++} ++EXPORT_SYMBOL(rtw_register_gpio_interrupt); ++ ++int rtw_disable_gpio_interrupt(struct net_device *netdev, int gpio_num) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); ++ return rtw_hal_disable_gpio_interrupt(adapter,gpio_num); ++} ++EXPORT_SYMBOL(rtw_disable_gpio_interrupt); ++ + #endif //#ifdef CONFIG_GPIO_API + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/recv_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/recv_linux.c +old mode 100755 +new mode 100644 +index 2c2a47a..e37f014 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/recv_linux.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/recv_linux.c +@@ -183,8 +183,6 @@ int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf) + + precvbuf->pskb = NULL; + +- precvbuf->reuse = _FALSE; +- + precvbuf->pallocated_buf = precvbuf->pbuf = NULL; + + precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pend = NULL; +@@ -299,6 +297,10 @@ _pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, u16 nSubframe_Length, u8 + return sub_skb; + } + ++#ifdef DBG_UDP_PKT_LOSE_11AC ++#define PAYLOAD_LEN_LOC_OF_IP_HDR 0x10 /*ethernet payload length location of ip header (DA+SA+eth_type+(version&hdr_len)) */ ++#endif ++ + void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, struct rx_pkt_attrib *pattrib) + { + struct mlme_priv*pmlmepriv = &padapter->mlmepriv; +@@ -319,7 +321,7 @@ void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, struct rx_pkt_attri + + //DBG_871X("bmcast=%d\n", bmcast); + +- if(_rtw_memcmp(pattrib->dst, myid(&padapter->eeprompriv), ETH_ALEN)==_FALSE) ++ if (_rtw_memcmp(pattrib->dst, adapter_mac_addr(padapter), ETH_ALEN) == _FALSE) + { + //DBG_871X("not ap psta=%p, addr=%pM\n", psta, pattrib->dst); + +@@ -391,6 +393,23 @@ void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, struct rx_pkt_attri + #endif // CONFIG_BR_EXT + if( precvpriv->sink_udpport > 0) + rtw_sink_rtp_seq_dbg(padapter,pkt); ++#ifdef DBG_UDP_PKT_LOSE_11AC ++ /* After eth_type_trans process , pkt->data pointer will move from ethrnet header to ip header , ++ * we have to check ethernet type , so this debug must be print before eth_type_trans ++ */ ++ if (*((unsigned short *)(pkt->data+ETH_ALEN*2)) == htons(ETH_P_ARP)) { ++ /* ARP Payload length will be 42bytes or 42+18(tailer)=60bytes*/ ++ if (pkt->len != 42 && pkt->len != 60) ++ DBG_871X("Error !!%s,ARP Payload length %u not correct\n" , __func__ , pkt->len); ++ } else if (*((unsigned short *)(pkt->data+ETH_ALEN*2)) == htons(ETH_P_IP)) { ++ if (be16_to_cpu(*((u16 *)(pkt->data+PAYLOAD_LEN_LOC_OF_IP_HDR))) != (pkt->len)-ETH_HLEN) { ++ DBG_871X("Error !!%s,Payload length not correct\n" , __func__); ++ DBG_871X("%s, IP header describe Total length=%u\n" , __func__ , be16_to_cpu(*((u16 *)(pkt->data+PAYLOAD_LEN_LOC_OF_IP_HDR)))); ++ DBG_871X("%s, Pkt real length=%u\n" , __func__ , (pkt->len)-ETH_HLEN); ++ } ++ } ++#endif ++ /* After eth_type_trans process , pkt->data pointer will move from ethrnet header to ip header */ + pkt->protocol = eth_type_trans(pkt, padapter->pnetdev); + pkt->dev = padapter->pnetdev; + +@@ -412,7 +431,7 @@ void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, struct rx_pkt_attri + } + } + +-void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup) ++void rtw_handle_tkip_mic_err(_adapter *padapter, struct sta_info *sta, u8 bgroup) + { + #ifdef CONFIG_IOCTL_CFG80211 + enum nl80211_key_type key_type = 0; +@@ -453,8 +472,7 @@ void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup) + key_type |= NL80211_KEYTYPE_PAIRWISE; + } + +- cfg80211_michael_mic_failure(padapter->pnetdev, (u8 *)&pmlmepriv->assoc_bssid[ 0 ], key_type, -1, +- NULL, GFP_ATOMIC); ++ cfg80211_michael_mic_failure(padapter->pnetdev, sta->hwaddr, key_type, -1, NULL, GFP_ATOMIC); + #endif + + _rtw_memset( &ev, 0x00, sizeof( ev ) ); +@@ -468,7 +486,7 @@ void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup) + } + + ev.src_addr.sa_family = ARPHRD_ETHER; +- _rtw_memcpy( ev.src_addr.sa_data, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ _rtw_memcpy(ev.src_addr.sa_data, sta->hwaddr, ETH_ALEN); + + _rtw_memset( &wrqu, 0x00, sizeof( wrqu ) ); + wrqu.data.length = sizeof( ev ); +@@ -565,6 +583,52 @@ static void rtw_os_ksocket_send(_adapter *padapter, union recv_frame *precv_fram + } + #endif //CONFIG_AUTO_AP_MODE + ++int rtw_recv_monitor(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ int ret = _FAIL; ++ struct recv_priv *precvpriv; ++ _queue *pfree_recv_queue; ++ _pkt *skb; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct rx_pkt_attrib *pattrib; ++ ++ if (NULL == precv_frame) ++ goto _recv_drop; ++ ++ pattrib = &precv_frame->u.hdr.attrib; ++ precvpriv = &(padapter->recvpriv); ++ pfree_recv_queue = &(precvpriv->free_recv_queue); ++ ++ skb = precv_frame->u.hdr.pkt; ++ if (skb == NULL) { ++ DBG_871X("%s :skb==NULL something wrong!!!!\n", __func__); ++ goto _recv_drop; ++ } ++ ++ skb->data = precv_frame->u.hdr.rx_data; ++ skb_set_tail_pointer(skb, precv_frame->u.hdr.len); ++ skb->len = precv_frame->u.hdr.len; ++ skb->ip_summed = CHECKSUM_NONE; ++ skb->pkt_type = PACKET_OTHERHOST; ++ skb->protocol = htons(0x0019); /* ETH_P_80211_RAW */ ++ ++ rtw_netif_rx(padapter->pnetdev, skb); ++ ++ /* pointers to NULL before rtw_free_recvframe() */ ++ precv_frame->u.hdr.pkt = NULL; ++ ++ ret = _SUCCESS; ++ ++_recv_drop: ++ ++ /* enqueue back to free_recv_queue */ ++ if (precv_frame) ++ rtw_free_recvframe(precv_frame, pfree_recv_queue); ++ ++ return ret; ++ ++} ++ + int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame) + { + struct recv_priv *precvpriv; +@@ -615,6 +679,9 @@ int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame) + + RT_TRACE(_module_recv_osdep_c_,_drv_info_,("\n skb->head=%p skb->data=%p skb->tail=%p skb->end=%p skb->len=%d\n", skb->head, skb->data, skb_tail_pointer(skb), skb_end_pointer(skb), skb->len)); + ++ if (pattrib->eth_type == 0x888e) ++ DBG_871X_LEVEL(_drv_always_, "recv eapol packet\n"); ++ + #ifdef CONFIG_AUTO_AP_MODE + #if 1 //for testing + #if 1 +@@ -635,6 +702,52 @@ int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame) + #endif + #endif //CONFIG_AUTO_AP_MODE + ++ /* TODO: move to core */ ++ { ++ _pkt *pkt = skb; ++ struct ethhdr *etherhdr = (struct ethhdr *)pkt->data; ++ struct sta_info *sta = precv_frame->u.hdr.psta; ++ ++ if (!sta) ++ goto bypass_session_tracker; ++ ++ if (ntohs(etherhdr->h_proto) == ETH_P_IP) { ++ u8 *ip = pkt->data + 14; ++ ++ if (GET_IPV4_PROTOCOL(ip) == 0x06 /* TCP */ ++ && rtw_st_ctl_chk_reg_s_proto(&sta->st_ctl, 0x06) == _TRUE ++ ) { ++ u8 *tcp = ip + GET_IPV4_IHL(ip) * 4; ++ ++ if (rtw_st_ctl_chk_reg_rule(&sta->st_ctl, padapter, IPV4_DST(ip), TCP_DST(tcp), IPV4_SRC(ip), TCP_SRC(tcp)) == _TRUE) { ++ if (GET_TCP_SYN(tcp) && GET_TCP_ACK(tcp)) { ++ session_tracker_add_cmd(padapter, sta ++ , IPV4_DST(ip), TCP_DST(tcp) ++ , IPV4_SRC(ip), TCP_SRC(tcp)); ++ if (DBG_SESSION_TRACKER) ++ DBG_871X(FUNC_ADPT_FMT" local:"IP_FMT":"PORT_FMT", remote:"IP_FMT":"PORT_FMT" SYN-ACK\n" ++ , FUNC_ADPT_ARG(padapter) ++ , IP_ARG(IPV4_DST(ip)), PORT_ARG(TCP_DST(tcp)) ++ , IP_ARG(IPV4_SRC(ip)), PORT_ARG(TCP_SRC(tcp))); ++ } ++ if (GET_TCP_FIN(tcp)) { ++ session_tracker_del_cmd(padapter, sta ++ , IPV4_DST(ip), TCP_DST(tcp) ++ , IPV4_SRC(ip), TCP_SRC(tcp)); ++ if (DBG_SESSION_TRACKER) ++ DBG_871X(FUNC_ADPT_FMT" local:"IP_FMT":"PORT_FMT", remote:"IP_FMT":"PORT_FMT" FIN\n" ++ , FUNC_ADPT_ARG(padapter) ++ , IP_ARG(IPV4_DST(ip)), PORT_ARG(TCP_DST(tcp)) ++ , IP_ARG(IPV4_SRC(ip)), PORT_ARG(TCP_SRC(tcp))); ++ } ++ } ++ ++ } ++ } ++bypass_session_tracker: ++ ; ++ } ++ + rtw_os_recv_indicate_pkt(padapter, skb, pattrib); + + _recv_indicatepkt_end: +@@ -672,7 +785,6 @@ void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf) + rtw_skb_free(precvbuf->pskb); + + precvbuf->pskb = NULL; +- precvbuf->reuse = _FALSE; + + if(precvbuf->irp_pending == _FALSE) + { +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_android.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_android.c +old mode 100755 +new mode 100644 +index d6fe592..8de7ff7 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_android.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_android.c +@@ -33,11 +33,17 @@ + #endif + #endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ + ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) ++#define strnicmp strncasecmp ++#endif /* Linux kernel >= 4.0.0 */ ++ + #ifdef CONFIG_GPIO_WAKEUP + #include + #include + #endif + ++#include "rtw_version.h" ++ + extern void macstr2num(u8 *dst, u8 *src); + + const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = { +@@ -76,6 +82,7 @@ const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = { + + "MACADDR", + ++ "BLOCK_SCAN", + "BLOCK", + "WFD-ENABLE", + "WFD-DISABLE", +@@ -86,11 +93,12 @@ const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = { + "HOSTAPD_SET_MACADDR_ACL", + "HOSTAPD_ACL_ADD_STA", + "HOSTAPD_ACL_REMOVE_STA", +-#ifdef CONFIG_GTK_OL ++#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 1, 0)) + "GTK_REKEY_OFFLOAD", + #endif //CONFIG_GTK_OL + /* Private command for P2P disable*/ +- "P2P_DISABLE" ++ "P2P_DISABLE", ++ "DRIVER_VERSION" + }; + + #ifdef CONFIG_PNO_SUPPORT +@@ -409,6 +417,18 @@ int rtw_android_get_p2p_dev_addr(struct net_device *net, char *command, int tota + return bytes_written; + } + ++int rtw_android_set_block_scan(struct net_device *net, char *command, int total_len) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); ++ char *block_value = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_BLOCK_SCAN]) + 1; ++ ++ #ifdef CONFIG_IOCTL_CFG80211 ++ adapter_wdev_data(adapter)->block_scan = (*block_value == '0')?_FALSE:_TRUE; ++ #endif ++ ++ return 0; ++} ++ + int rtw_android_set_block(struct net_device *net, char *command, int total_len) + { + _adapter *adapter = (_adapter *)rtw_netdev_priv(net); +@@ -425,11 +445,11 @@ int rtw_android_setband(struct net_device *net, char *command, int total_len) + { + _adapter *adapter = (_adapter *)rtw_netdev_priv(net); + char *arg = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SETBAND]) + 1; +- u32 band = GHZ_MAX; ++ u32 band = WIFI_FREQUENCY_BAND_AUTO; + int ret = _FAIL; + +- sscanf(arg, "%u", &band); +- ret = rtw_set_band(adapter, band); ++ if (sscanf(arg, "%u", &band) >= 1) ++ ret = rtw_set_band(adapter, band); + + return (ret==_SUCCESS)?0:-1; + } +@@ -444,31 +464,11 @@ int rtw_android_getband(struct net_device *net, char *command, int total_len) + return bytes_written; + } + +-enum { +- MIRACAST_DISABLED = 0, +- MIRACAST_SOURCE, +- MIRACAST_SINK, +- MIRACAST_INVALID, +-}; +- +-static const char *miracast_mode_str[] = { +- "DISABLED", +- "SOURCE", +- "SINK", +- "INVALID", +-}; +- +-static const char *get_miracast_mode_str(int mode) +-{ +- if (mode < MIRACAST_DISABLED || mode >= MIRACAST_INVALID) +- mode = MIRACAST_INVALID; +- +- return miracast_mode_str[mode]; +-} +- ++#ifdef CONFIG_WFD + int rtw_android_set_miracast_mode(struct net_device *net, char *command, int total_len) + { + _adapter *adapter = (_adapter *)rtw_netdev_priv(net); ++ struct wifi_display_info *wfd_info = &adapter->wfd_info; + char *arg = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_MIRACAST]) + 1; + u8 mode; + int num; +@@ -476,13 +476,30 @@ int rtw_android_set_miracast_mode(struct net_device *net, char *command, int tot + + num = sscanf(arg, "%hhu", &mode); + +- if (num >= 1) { +- DBG_871X("Miracast mode: %s(%u)\n", get_miracast_mode_str(mode), mode); +- ret = _SUCCESS; ++ if (num < 1) ++ goto exit; ++ ++ switch (mode) { ++ case 1: /* soruce */ ++ mode = MIRACAST_SOURCE; ++ break; ++ case 2: /* sink */ ++ mode = MIRACAST_SINK; ++ break; ++ case 0: /* disabled */ ++ default: ++ mode = MIRACAST_DISABLED; ++ break; + } ++ wfd_info->stack_wfd_mode = mode; ++ DBG_871X("stack miracast mode: %s\n", get_miracast_mode_str(wfd_info->stack_wfd_mode)); + +- return (ret==_SUCCESS)?0:-1; ++ ret = _SUCCESS; ++ ++exit: ++ return (ret == _SUCCESS)?0:-1; + } ++#endif /* CONFIG_WFD */ + + int get_int_from_command( char* pcmd ) + { +@@ -500,7 +517,7 @@ int get_int_from_command( char* pcmd ) + return ( rtw_atoi( pcmd + i ) ); + } + +-#ifdef CONFIG_GTK_OL ++#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 1, 0)) + int rtw_gtk_offload(struct net_device *net, u8 *cmd_ptr) + { + int i; +@@ -570,6 +587,10 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) + ret = -EINVAL; + goto exit; + } ++ if (padapter->registrypriv.mp_mode == 1) { ++ ret = -EINVAL; ++ goto exit; ++ } + #ifdef CONFIG_COMPAT + if (is_compat_task()) { + /* User space is 32-bit, use compat ioctl */ +@@ -592,7 +613,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) + ret = -EFAULT; + goto exit; + } +- //DBG_871X("%s priv_cmd.buf=%p priv_cmd.total_len=%d priv_cmd.used_len=%d\n",__func__,priv_cmd.buf,priv_cmd.total_len,priv_cmd.used_len); ++ /*DBG_871X("%s priv_cmd.buf=%p priv_cmd.total_len=%d priv_cmd.used_len=%d\n",__func__,priv_cmd.buf,priv_cmd.total_len,priv_cmd.used_len);*/ + command = rtw_zmalloc(priv_cmd.total_len); + if (!command) + { +@@ -631,6 +652,17 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) + goto exit; + } + ++ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { ++ switch (cmd_num) { ++ case ANDROID_WIFI_CMD_WFD_ENABLE: ++ case ANDROID_WIFI_CMD_WFD_DISABLE: ++ case ANDROID_WIFI_CMD_WFD_SET_TCPPORT: ++ case ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT: ++ case ANDROID_WIFI_CMD_WFD_SET_DEVTYPE: ++ goto response; ++ } ++ } ++ + switch(cmd_num) { + + case ANDROID_WIFI_CMD_STOP: +@@ -659,7 +691,11 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) + case ANDROID_WIFI_CMD_MACADDR: + bytes_written = rtw_android_get_macaddr(net, command, priv_cmd.total_len); + break; +- ++ ++ case ANDROID_WIFI_CMD_BLOCK_SCAN: ++ bytes_written = rtw_android_set_block_scan(net, command, priv_cmd.total_len); ++ break; ++ + case ANDROID_WIFI_CMD_BLOCK: + bytes_written = rtw_android_set_block(net, command, priv_cmd.total_len); + break; +@@ -710,10 +746,6 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) + bytes_written = rtw_android_getband(net, command, priv_cmd.total_len); + break; + +- case ANDROID_WIFI_CMD_MIRACAST: +- bytes_written = rtw_android_set_miracast_mode(net, command, priv_cmd.total_len); +- break; +- + case ANDROID_WIFI_CMD_COUNTRY: + bytes_written = rtw_android_set_country(net, command, priv_cmd.total_len); + break; +@@ -757,15 +789,19 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) + #endif //CONFIG_IOCTL_CFG80211 + + #ifdef CONFIG_WFD ++ ++ case ANDROID_WIFI_CMD_MIRACAST: ++ bytes_written = rtw_android_set_miracast_mode(net, command, priv_cmd.total_len); ++ break; ++ + case ANDROID_WIFI_CMD_WFD_ENABLE: + { + // Commented by Albert 2012/07/24 + // We can enable the WFD function by using the following command: + // wpa_cli driver wfd-enable + +- pwfd_info = &padapter->wfd_info; +- if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) +- pwfd_info->wfd_enable = _TRUE; ++ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) ++ rtw_wfd_enable(padapter, 1); + break; + } + +@@ -775,9 +811,8 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) + // We can disable the WFD function by using the following command: + // wpa_cli driver wfd-disable + +- pwfd_info = &padapter->wfd_info; +- if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) +- pwfd_info->wfd_enable = _FALSE; ++ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) ++ rtw_wfd_enable(padapter, 0); + break; + } + case ANDROID_WIFI_CMD_WFD_SET_TCPPORT: +@@ -786,11 +821,8 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) + // We can set the tcp port number by using the following command: + // wpa_cli driver wfd-set-tcpport = 554 + +- pwfd_info = &padapter->wfd_info; +- if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) +- { +- pwfd_info->rtsp_ctrlport = ( u16 ) get_int_from_command( priv_cmd.buf ); +- } ++ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) ++ rtw_wfd_set_ctrl_port(padapter, (u16)get_int_from_command(priv_cmd.buf)); + break; + } + case ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT: +@@ -847,7 +879,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) + rtw_acl_remove_sta(padapter, addr); + break; + } +-#ifdef CONFIG_GTK_OL ++#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 1, 0)) + case ANDROID_WIFI_CMD_GTK_REKEY_OFFLOAD: + rtw_gtk_offload(net, (u8*)command); + break; +@@ -863,6 +895,12 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) + #endif // CONFIG_P2P + break; + } ++ case ANDROID_WIFI_CMD_DRIVERVERSION: ++ { ++ bytes_written = strlen(DRIVERVERSION); ++ snprintf(command, bytes_written+1, DRIVERVERSION); ++ break; ++ } + default: + DBG_871X("Unknown PRIVATE command %s - ignored\n", command); + snprintf(command, 3, "OK"); +@@ -1125,19 +1163,9 @@ static void shutdown_card(void) + // lock register page0 0x0~0xB read/write + rtw_write8(g_test_adapter, 0x1C, 0x0E); + +- g_test_adapter->bSurpriseRemoved = _TRUE; +- DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=%d\n", +- FUNC_ADPT_ARG(g_test_adapter), g_test_adapter->bSurpriseRemoved); +-#ifdef CONFIG_CONCURRENT_MODE +- if (g_test_adapter->pbuddy_adapter) +- { +- PADAPTER pbuddy; +- pbuddy = g_test_adapter->pbuddy_adapter; +- pbuddy->bSurpriseRemoved = _TRUE; +- DBG_871X(FUNC_ADPT_FMT ": buddy(" ADPT_FMT ") bSurpriseRemoved=%d\n", +- FUNC_ADPT_ARG(g_test_adapter), ADPT_ARG(pbuddy), pbuddy->bSurpriseRemoved); +- } +-#endif // CONFIG_CONCURRENT_MODE ++ rtw_set_surprise_removed(g_test_adapter); ++ DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=%s\n", ++ FUNC_ADPT_ARG(g_test_adapter), rtw_is_surprise_removed(g_test_adapter)?"True":"False"); + } + #endif // RTW_SUPPORT_PLATFORM_SHUTDOWN + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_cfgvendor.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_cfgvendor.c +old mode 100755 +new mode 100644 +index 2e249c9..13e0748 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_cfgvendor.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_cfgvendor.c +@@ -20,6 +20,10 @@ + + #include + ++#ifdef CONFIG_IOCTL_CFG80211 ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) ++ + /* + #include + #include +@@ -38,19 +42,22 @@ + + #include + +-#ifdef CONFIG_IOCTL_CFG80211 +- +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) +- + #ifdef DBG_MEM_ALLOC + extern bool match_mstat_sniff_rules(const enum mstat_f flags, const size_t size); +-struct sk_buff * dbg_rtw_cfg80211_vendor_event_alloc(struct wiphy *wiphy, int len, int event_id, gfp_t gfp ++struct sk_buff *dbg_rtw_cfg80211_vendor_event_alloc(struct wiphy *wiphy, int len, int event_id, gfp_t gfp + , const enum mstat_f flags, const char *func, const int line) + { ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct wireless_dev *wdev = padapter->rtw_wdev; ++ + struct sk_buff *skb; + unsigned int truesize = 0; + ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 1, 0)) + skb = cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp); ++#else ++ skb = cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp); ++#endif + + if(skb) + truesize = skb->truesize; +@@ -139,9 +146,22 @@ int dbg_rtw_cfg80211_vendor_cmd_reply(struct sk_buff *skb + #define rtw_cfg80211_vendor_cmd_reply(skb) \ + dbg_rtw_cfg80211_vendor_cmd_reply(skb, MSTAT_FUNC_CFG_VENDOR|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) + #else +-#define rtw_cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp) \ +- cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp) +- ++ ++struct sk_buff *rtw_cfg80211_vendor_event_alloc( ++ struct wiphy *wiphy, int len, int event_id, gfp_t gfp) ++{ ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct wireless_dev *wdev = padapter->rtw_wdev; ++ struct sk_buff *skb; ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 1, 0)) ++ skb = cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp); ++#else ++ skb = cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp); ++#endif ++ return skb; ++} ++ + #define rtw_cfg80211_vendor_event(skb, gfp) \ + cfg80211_vendor_event(skb, gfp) + +@@ -229,7 +249,8 @@ int rtw_dev_get_feature_set(struct net_device *dev) + + feature_set |= WIFI_FEATURE_INFRA; + +- if(IS_92D(*hal_ver) || IS_8812_SERIES(*hal_ver) || IS_8821_SERIES(*hal_ver)) ++ if (IS_8814A_SERIES(*hal_ver) || IS_8812_SERIES(*hal_ver) || ++ IS_8821_SERIES(*hal_ver)) + feature_set |= WIFI_FEATURE_INFRA_5G; + + feature_set |= WIFI_FEATURE_P2P; +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_cfgvendor.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_cfgvendor.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_proc.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_proc.c +old mode 100755 +new mode 100644 +index c752173..8fd05d1 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_proc.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_proc.c +@@ -18,9 +18,13 @@ + * + ******************************************************************************/ + ++#include /* tolower() */ + #include + #include + #include "rtw_proc.h" ++#ifdef CONFIG_BT_COEXIST ++#include ++#endif + + #ifdef CONFIG_PROC_DEBUG + +@@ -99,6 +103,12 @@ static int proc_get_log_level(struct seq_file *m, void *v) + return 0; + } + ++static int proc_get_drv_cfg(struct seq_file *m, void *v) ++{ ++ dump_drv_cfg(m); ++ return 0; ++} ++ + static ssize_t proc_set_log_level(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) + { + char tmp[32]; +@@ -107,7 +117,12 @@ static ssize_t proc_set_log_level(struct file *file, const char __user *buffer, + if (count < 1) + return -EINVAL; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d ", &log_level); + +@@ -131,6 +146,23 @@ static int proc_get_mstat(struct seq_file *m, void *v) + } + #endif /* DBG_MEM_ALLOC */ + ++static int proc_get_country_chplan_map(struct seq_file *m, void *v) ++{ ++ dump_country_chplan_map(m); ++ return 0; ++} ++ ++static int proc_get_chplan_id_list(struct seq_file *m, void *v) ++{ ++ dump_chplan_id_list(m); ++ return 0; ++} ++ ++static int proc_get_chplan_test(struct seq_file *m, void *v) ++{ ++ dump_chplan_test(m); ++ return 0; ++} + + /* + * rtw_drv_proc: +@@ -139,9 +171,13 @@ static int proc_get_mstat(struct seq_file *m, void *v) + const struct rtw_proc_hdl drv_proc_hdls [] = { + {"ver_info", proc_get_drv_version, NULL}, + {"log_level", proc_get_log_level, proc_set_log_level}, ++ {"drv_cfg", proc_get_drv_cfg, NULL}, + #ifdef DBG_MEM_ALLOC + {"mstat", proc_get_mstat, NULL}, + #endif /* DBG_MEM_ALLOC */ ++ {"country_chplan_map", proc_get_country_chplan_map, NULL}, ++ {"chplan_id_list", proc_get_chplan_id_list, NULL}, ++ {"chplan_test", proc_get_chplan_test, NULL}, + }; + + const int drv_proc_hdls_num = sizeof(drv_proc_hdls) / sizeof(struct rtw_proc_hdl); +@@ -231,6 +267,16 @@ static int proc_get_sd_f0_reg_dump(struct seq_file *m, void *v) + + return 0; + } ++ ++static int proc_get_sdio_local_reg_dump(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ sdio_local_reg_dump(m, adapter); ++ ++ return 0; ++} + #endif /* CONFIG_SDIO_HCI */ + + static int proc_get_mac_reg_dump(struct seq_file *m, void *v) +@@ -263,6 +309,15 @@ static int proc_get_rf_reg_dump(struct seq_file *m, void *v) + return 0; + } + ++static int proc_get_dump_adapters_status(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ dump_adapters_status(m, adapter_to_dvobj(adapter)); ++ ++ return 0; ++} + + //gpio setting + #ifdef CONFIG_GPIO_API +@@ -275,8 +330,13 @@ static ssize_t proc_set_config_gpio(struct file *file, const char __user *buffer + + if (count < 2) + return -EFAULT; +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) +- { ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + num =sscanf(tmp, "%d %d",&gpio_pin,&gpio_mode); + DBG_871X("num=%d gpio_pin=%d mode=%d\n",num,gpio_pin,gpio_mode); + padapter->pre_gpio_pin=gpio_pin; +@@ -296,8 +356,13 @@ static ssize_t proc_set_gpio_output_value(struct file *file, const char __user * + + if (count < 2) + return -EFAULT; +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) +- { ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + num =sscanf(tmp, "%d %d",&gpio_pin,&pin_mode); + DBG_871X("num=%d gpio_pin=%d pin_high=%d\n",num,gpio_pin,pin_mode); + padapter->pre_gpio_pin=gpio_pin; +@@ -330,8 +395,13 @@ static ssize_t proc_set_gpio(struct file *file, const char __user *buffer, size_ + + if (count < 1) + return -EFAULT; +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) +- { ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + num =sscanf(tmp, "%d",&gpio_pin); + DBG_871X("num=%d gpio_pin=%d\n",num,gpio_pin); + padapter->pre_gpio_pin=gpio_pin; +@@ -340,6 +410,45 @@ static ssize_t proc_set_gpio(struct file *file, const char __user *buffer, size_ + return count; + } + #endif ++static int proc_get_current_tx_rate(struct seq_file *m, void *v) ++{ ++ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); ++ u8 i; ++ u8 null_addr[ETH_ALEN] = {0}; ++ u8 *macaddr; ++ u8 current_rate_id = 0; ++ ++ DBG_871X_SEL_NL(m, "%-5s %-4s %-17s %-7s\n" ++ , "macid", "if_g", "macaddr", "tx_rate"); ++ ++ for (i = 0; i < macid_ctl->num; i++) { ++ if (rtw_macid_is_used(macid_ctl, i) || macid_ctl->h2c_msr[i]) { ++ if (macid_ctl->sta[i]) ++ macaddr = macid_ctl->sta[i]->hwaddr; ++ else ++ macaddr = null_addr; ++ current_rate_id = rtw_get_current_tx_rate(adapter, i); ++ if (!rtw_macid_is_bmc(macid_ctl, i)) { ++ DBG_871X_SEL_NL(m, "%5u %4u "MAC_FMT" %s\n" ++ , i ++ , rtw_macid_get_if_g(macid_ctl, i) ++ , MAC_ARG(macaddr) ++ , HDATA_RATE(current_rate_id) ++ ); ++ } ++ ++ ++ } ++ } ++ ++ ++return 0; ++ ++} + + + static int proc_get_linked_info_dump(struct seq_file *m, void *v) +@@ -352,6 +461,7 @@ static int proc_get_linked_info_dump(struct seq_file *m, void *v) + return 0; + } + ++ + static ssize_t proc_set_linked_info_dump(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) + { + struct net_device *dev = data; +@@ -364,11 +474,16 @@ static ssize_t proc_set_linked_info_dump(struct file *file, const char __user *b + if (count < 1) + return -EFAULT; + ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ + pre_mode=padapter->bLinkInfoDump; +- DBG_871X("pre_mode=%d \n",pre_mode); ++ DBG_871X("pre_mode=%d\n", pre_mode); ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) +- { + num =sscanf(tmp, "%d ", &mode); + DBG_871X("num=%d mode=%d\n",num,mode); + +@@ -392,24 +507,6 @@ static ssize_t proc_set_linked_info_dump(struct file *file, const char __user *b + return count; + } + +-int proc_get_rx_info(struct seq_file *m, void *v) +-{ +- struct net_device *dev = m->private; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct dvobj_priv *psdpriv = padapter->dvobj; +- struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; +- +- //Counts of packets whose seq_num is less than preorder_ctrl->indicate_seq, Ex delay, retransmission, redundant packets and so on +- DBG_871X_SEL_NL(m,"Counts of Packets Whose Seq_Num Less Than Reorder Control Seq_Num: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_drop_count); +- //How many times the Rx Reorder Timer is triggered. +- DBG_871X_SEL_NL(m,"Rx Reorder Time-out Trigger Counts: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_forced_indicate_count); +- //Total counts of packets loss +- DBG_871X_SEL_NL(m,"Rx Packet Loss Counts: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_loss_count); +- DBG_871X_SEL_NL(m,"Duplicate Management Frame Drop Count: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_dup_mgt_frame_drop_count); +- DBG_871X_SEL_NL(m,"AMPDU BA window shift Count: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_window_shift_cnt); +- return 0; +-} +- + static int proc_get_mac_qinfo(struct seq_file *m, void *v) + { + struct net_device *dev = m->private; +@@ -420,26 +517,6 @@ static int proc_get_mac_qinfo(struct seq_file *m, void *v) + return 0; + } + +-ssize_t proc_reset_rx_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +-{ +- struct net_device *dev = data; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct dvobj_priv *psdpriv = padapter->dvobj; +- struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; +- char cmd[32]; +- if (buffer && !copy_from_user(cmd, buffer, sizeof(cmd))) { +- if('0' == cmd[0]){ +- pdbgpriv->dbg_rx_ampdu_drop_count = 0; +- pdbgpriv->dbg_rx_ampdu_forced_indicate_count = 0; +- pdbgpriv->dbg_rx_ampdu_loss_count = 0; +- pdbgpriv->dbg_rx_dup_mgt_frame_drop_count = 0; +- pdbgpriv->dbg_rx_ampdu_window_shift_cnt = 0; +- } +- } +- +- return count; +-} +- + int proc_get_wifi_spec(struct seq_file *m, void *v) + { + struct net_device *dev = m->private; +@@ -453,20 +530,20 @@ int proc_get_wifi_spec(struct seq_file *m, void *v) + static int proc_get_chan_plan(struct seq_file *m, void *v) + { + struct net_device *dev = m->private; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ dump_cur_chset(m, adapter); + +- DBG_871X_SEL_NL(m,"Channel plan=0x%02x\n",padapter->mlmepriv.ChannelPlan); + return 0; + } ++ + static ssize_t proc_set_chan_plan(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) + { + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct SetChannelPlan_param setChannelPlan_param; +- + char tmp[32]; +- u8 chan_plan = RT_CHANNEL_DOMAIN_REALTEK_DEFINE; +- ++ u8 chan_plan = RTW_CHPLAN_MAX; ++ + if (!padapter) + return -EFAULT; + +@@ -476,23 +553,132 @@ static ssize_t proc_set_chan_plan(struct file *file, const char __user *buffer, + return -EFAULT; + } + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } + ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + int num = sscanf(tmp, "%hhx", &chan_plan); +- +- if (num != 1) { +- DBG_871X("invalid read_reg parameter!\n"); ++ if (num != 1) + return count; +- } ++ } ++ ++ rtw_set_channel_plan(padapter, chan_plan); ++ ++ return count; ++} ++ ++static int proc_get_country_code(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ if (adapter->mlmepriv.country_ent) ++ dump_country_chplan(m, adapter->mlmepriv.country_ent); ++ else ++ DBG_871X_SEL_NL(m, "unspecified\n"); ++ ++ return 0; ++} ++ ++static ssize_t proc_set_country_code(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ char alpha2[2]; ++ int num; ++ ++ if (count < 1) ++ return -EFAULT; + ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; + } +- setChannelPlan_param.channel_plan = chan_plan; +- if( H2C_SUCCESS != set_chplan_hdl(padapter, (unsigned char *)&setChannelPlan_param) ) ++ ++ if (!buffer || copy_from_user(tmp, buffer, count)) ++ goto exit; ++ ++ num = sscanf(tmp, "%c%c", &alpha2[0], &alpha2[1]); ++ if (num != 2) ++ return count; ++ ++ rtw_set_country(padapter, alpha2); ++ ++exit: ++ return count; ++} ++ ++#ifdef CONFIG_DFS_MASTER ++ssize_t proc_set_update_non_ocp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *mlme = &adapter->mlmepriv; ++ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; ++ char tmp[32]; ++ u8 ch, bw = CHANNEL_WIDTH_20, offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ int ms = -1; ++ ++ if (count < 1) + return -EFAULT; +- ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ int num = sscanf(tmp, "%hhu %hhu %hhu %d", &ch, &bw, &offset, &ms); ++ ++ if (num < 1 || (bw != CHANNEL_WIDTH_20 && num < 3)) ++ goto exit; ++ ++ if (bw == CHANNEL_WIDTH_20) ++ rtw_chset_update_non_ocp_ms(mlmeext->channel_set ++ , ch, bw, HAL_PRIME_CHNL_OFFSET_DONT_CARE, ms); ++ else ++ rtw_chset_update_non_ocp_ms(mlmeext->channel_set ++ , ch, bw, offset, ms); ++ } ++ ++exit: + return count; ++} ++ ++ssize_t proc_set_radar_detect(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); ++ char tmp[32]; ++ u8 fake_radar_detect_cnt = 0; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ int num = sscanf(tmp, "%hhu", &fake_radar_detect_cnt); ++ ++ if (num < 1) ++ goto exit; ++ ++ rfctl->dbg_dfs_master_fake_radar_detect_cnt = fake_radar_detect_cnt; ++ } + ++exit: ++ return count; + } ++#endif /* CONFIG_DFS_MASTER */ + + static int proc_get_udpport(struct seq_file *m, void *v) + { +@@ -521,7 +707,12 @@ static ssize_t proc_set_udpport(struct file *file, const char __user *buffer, si + return -EFAULT; + } + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d", &sink_udpport); + +@@ -544,6 +735,8 @@ static int proc_get_macid_info(struct seq_file *m, void *v) + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); + u8 i; ++ u8 null_addr[ETH_ALEN] = {0}; ++ u8 *macaddr; + + DBG_871X_SEL_NL(m, "max_num:%u\n", macid_ctl->num); + DBG_871X_SEL_NL(m, "\n"); +@@ -552,48 +745,76 @@ static int proc_get_macid_info(struct seq_file *m, void *v) + dump_macid_map(m, &macid_ctl->used, macid_ctl->num); + DBG_871X_SEL_NL(m, "\n"); + +- DBG_871X_SEL_NL(m, "%-3s %-3s %-4s %-4s" ++ DBG_871X_SEL_NL(m, "%-3s %-3s %-4s %-4s %-17s %s" + "\n" +- , "id", "bmc", "if_g", "ch_g" ++ , "id", "bmc", "if_g", "ch_g", "macaddr", "status" + ); + + for (i=0;inum;i++) { +- if (rtw_macid_is_used(macid_ctl, i)) +- DBG_871X_SEL_NL(m, "%3u %3u %4d %4d" ++ if (rtw_macid_is_used(macid_ctl, i) ++ || macid_ctl->h2c_msr[i] ++ ) { ++ if (macid_ctl->sta[i]) ++ macaddr = macid_ctl->sta[i]->hwaddr; ++ else ++ macaddr = null_addr; ++ ++ DBG_871X_SEL_NL(m, "%3u %3u %4d %4d "MAC_FMT" "H2C_MSR_FMT" %s" + "\n" + , i + , rtw_macid_is_bmc(macid_ctl, i) + , rtw_macid_get_if_g(macid_ctl, i) + , rtw_macid_get_ch_g(macid_ctl, i) ++ , MAC_ARG(macaddr) ++ , H2C_MSR_ARG(&macid_ctl->h2c_msr[i]) ++ , rtw_macid_is_used(macid_ctl, i) ? "" : "[unused]" + ); ++ } + } + + return 0; + } + +-static int proc_get_cam(struct seq_file *m, void *v) ++static int proc_get_sec_cam(struct seq_file *m, void *v) + { + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); +- u8 i; ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; ++ ++ DBG_871X_SEL_NL(m, "sec_cap:0x%02x\n", cam_ctl->sec_cap); ++ DBG_871X_SEL_NL(m, "flags:0x%08x\n", cam_ctl->flags); ++ DBG_871X_SEL_NL(m, "\n"); ++ ++ DBG_871X_SEL_NL(m, "max_num:%u\n", cam_ctl->num); ++ DBG_871X_SEL_NL(m, "used:\n"); ++ dump_sec_cam_map(m, &cam_ctl->used, cam_ctl->num); ++ DBG_871X_SEL_NL(m, "\n"); ++ ++ DBG_871X_SEL_NL(m, "reg_scr:0x%04x\n", rtw_read16(adapter, 0x680)); ++ DBG_871X_SEL_NL(m, "\n"); ++ ++ dump_sec_cam(m, adapter); + + return 0; + } + +-static ssize_t proc_set_cam(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++static ssize_t proc_set_sec_cam(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) + { + struct net_device *dev = data; +- _adapter *adapter; +- +- char tmp[32]; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; ++ char tmp[32] = {0}; + char cmd[4]; + u8 id; + +- adapter = (_adapter *)rtw_netdev_priv(dev); +- if (!adapter) ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); + return -EFAULT; ++ } + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + /* c : clear specific cam entry */ + /* wfc : write specific cam entry from cam cache */ +@@ -603,6 +824,11 @@ static ssize_t proc_set_cam(struct file *file, const char __user *buffer, size_t + if (num < 2) + return count; + ++ if (id >= cam_ctl->num) { ++ DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" invalid id:%u\n", FUNC_ADPT_ARG(adapter), id); ++ return count; ++ } ++ + if (strcmp("c", cmd) == 0) { + _clear_cam_entry(adapter, id); + adapter->securitypriv.hw_decrypted = _FALSE; /* temporarily set this for TX path to use SW enc */ +@@ -614,99 +840,702 @@ static ssize_t proc_set_cam(struct file *file, const char __user *buffer, size_t + return count; + } + +-static int proc_get_cam_cache(struct seq_file *m, void *v) ++static int proc_get_sec_cam_cache(struct seq_file *m, void *v) + { + struct net_device *dev = m->private; + _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + u8 i; + +- DBG_871X_SEL_NL(m, "cam bitmap:0x%016llx\n", dvobj->cam_ctl.bitmap); +- +- DBG_871X_SEL_NL(m, "%-2s %-6s %-17s %-32s %-3s %-7s" +- //" %-2s %-2s %-4s %-5s" +- "\n" +- , "id", "ctrl", "addr", "key", "kid", "type" +- //, "MK", "GK", "MFB", "valid" +- ); +- +- for (i=0;i<32;i++) { ++ DBG_871X_SEL_NL(m, "SW sec cam cache:\n"); ++ dump_sec_cam_ent_title(m, 1); ++ for (i = 0; i < cam_ctl->num; i++) { + if (dvobj->cam_cache[i].ctrl != 0) +- DBG_871X_SEL_NL(m, "%2u 0x%04x "MAC_FMT" "KEY_FMT" %3u %-7s" +- //" %2u %2u 0x%02x %5u" +- "\n", i +- , dvobj->cam_cache[i].ctrl +- , MAC_ARG(dvobj->cam_cache[i].mac) +- , KEY_ARG(dvobj->cam_cache[i].key) +- , (dvobj->cam_cache[i].ctrl)&0x03 +- , security_type_str(((dvobj->cam_cache[i].ctrl)>>2)&0x07) +- //, ((dvobj->cam_cache[i].ctrl)>>5)&0x01 +- //, ((dvobj->cam_cache[i].ctrl)>>6)&0x01 +- //, ((dvobj->cam_cache[i].ctrl)>>8)&0x7f +- //, ((dvobj->cam_cache[i].ctrl)>>15)&0x01 +- ); ++ dump_sec_cam_ent(m, &dvobj->cam_cache[i], i); + } + + return 0; + } + +-#ifdef CONFIG_BT_COEXIST +-ssize_t proc_set_btinfo_evt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++static ssize_t proc_set_change_bss_chbw(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) + { + struct net_device *dev = data; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *mlme = &(adapter->mlmepriv); ++ struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); + char tmp[32]; +- u8 btinfo[8]; ++ u8 ch, bw = CHANNEL_WIDTH_20, offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + +- if (count < 6) ++ if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { +- int num = 0; ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } + +- _rtw_memset(btinfo, 0, 8); +- +- num = sscanf(tmp, "%hhx %hhx %hhx %hhx %hhx %hhx %hhx %hhx" +- , &btinfo[0], &btinfo[1], &btinfo[2], &btinfo[3] +- , &btinfo[4], &btinfo[5], &btinfo[6], &btinfo[7]); ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + +- if (num < 6) +- return -EINVAL; ++ int num = sscanf(tmp, "%hhu %hhu %hhu", &ch, &bw, &offset); + +- btinfo[1] = num-2; ++ if (num < 1 || (bw != CHANNEL_WIDTH_20 && num < 3)) ++ goto exit; + +- rtw_btinfo_cmd(padapter, btinfo, btinfo[1]+2); ++ if (check_fwstate(mlme, WIFI_AP_STATE) && check_fwstate(mlme, WIFI_ASOC_STATE)) ++ rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_WAIT_ACK, ch, bw, offset); + } +- ++ ++exit: + return count; + } +-#endif + +-/* +-* rtw_adapter_proc: +-* init/deinit when register/unregister net_device +-*/ +-const struct rtw_proc_hdl adapter_proc_hdls [] = { +- {"write_reg", proc_get_dummy, proc_set_write_reg}, +- {"read_reg", proc_get_read_reg, proc_set_read_reg}, +- {"fwstate", proc_get_fwstate, NULL}, +- {"sec_info", proc_get_sec_info, NULL}, +- {"mlmext_state", proc_get_mlmext_state, NULL}, ++static int proc_get_target_tx_power(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ dump_target_tx_power(m, adapter); ++ ++ return 0; ++} ++ ++static int proc_get_tx_power_by_rate(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ dump_tx_power_by_rate(m, adapter); ++ ++ return 0; ++} ++ ++static int proc_get_tx_power_limit(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ dump_tx_power_limit(m, adapter); ++ ++ return 0; ++} ++ ++static int proc_get_tx_power_ext_info(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ dump_tx_power_ext_info(m, adapter); ++ ++ return 0; ++} ++ ++static ssize_t proc_set_tx_power_ext_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ char tmp[32] = {0}; ++ char cmd[16] = {0}; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ int num = sscanf(tmp, "%s", cmd); ++ ++ if (num < 1) ++ return count; ++ ++ #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE ++ phy_free_filebuf_mask(adapter, LOAD_BB_PG_PARA_FILE | LOAD_RF_TXPWR_LMT_PARA_FILE); ++ #endif ++ ++ rtw_ps_deny(adapter, PS_DENY_IOCTL); ++ LeaveAllPowerSaveModeDirect(adapter); ++ ++ if (strcmp("default", cmd) == 0) ++ rtw_run_in_thread_cmd(adapter, ((void *)(phy_reload_default_tx_power_ext_info)), adapter); ++ else ++ rtw_run_in_thread_cmd(adapter, ((void *)(phy_reload_tx_power_ext_info)), adapter); ++ ++ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); ++ } ++ ++ return count; ++} ++ ++#ifdef CONFIG_RF_GAIN_OFFSET ++static int proc_get_kfree_flag(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); ++ ++ DBG_871X_SEL_NL(m, "0x%02x\n", kfree_data->flag); ++ ++ return 0; ++} ++ ++static ssize_t proc_set_kfree_flag(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); ++ char tmp[32] = {0}; ++ u8 flag; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ int num = sscanf(tmp, "%hhx", &flag); ++ ++ if (num < 1) ++ return count; ++ ++ kfree_data->flag = flag; ++ } ++ ++ return count; ++} ++ ++static int proc_get_kfree_bb_gain(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); ++ u8 i, j; ++ ++ for (i = 0; i < BB_GAIN_NUM; i++) { ++ if (i == 0) ++ DBG_871X_SEL(m, "2G: "); ++ else if (i == 1) ++ DBG_871X_SEL(m, "5GLB1: "); ++ else if (i == 2) ++ DBG_871X_SEL(m, "5GLB2: "); ++ else if (i == 3) ++ DBG_871X_SEL(m, "5GMB1: "); ++ else if (i == 4) ++ DBG_871X_SEL(m, "5GMB2: "); ++ else if (i == 5) ++ DBG_871X_SEL(m, "5GHB: "); ++ ++ for (j = 0; j < hal_data->NumTotalRFPath; j++) ++ DBG_871X_SEL(m, "%d ", kfree_data->bb_gain[i][j]); ++ DBG_871X_SEL(m, "\n"); ++ } ++ ++ return 0; ++} ++ ++static ssize_t proc_set_kfree_bb_gain(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); ++ char tmp[BB_GAIN_NUM * RF_PATH_MAX] = {0}; ++ u8 path, chidx; ++ s8 bb_gain[BB_GAIN_NUM]; ++ char ch_band_Group[6]; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ char *c, *next; ++ int i = 0; ++ ++ next = tmp; ++ c = strsep(&next, " \t"); ++ ++ if (sscanf(c, "%s", ch_band_Group) != 1) { ++ DBG_871X("Error Head Format, channel Group select\n,Please input:\t 2G , 5GLB1 , 5GLB2 , 5GMB1 , 5GMB2 , 5GHB\n"); ++ return count; ++ } ++ if (strcmp("2G", ch_band_Group) == 0) ++ chidx = BB_GAIN_2G; ++#ifdef CONFIG_IEEE80211_BAND_5GHZ ++ else if (strcmp("5GLB1", ch_band_Group) == 0) ++ chidx = BB_GAIN_5GLB1; ++ else if (strcmp("5GLB2", ch_band_Group) == 0) ++ chidx = BB_GAIN_5GLB2; ++ else if (strcmp("5GMB1", ch_band_Group) == 0) ++ chidx = BB_GAIN_5GMB1; ++ else if (strcmp("5GMB2", ch_band_Group) == 0) ++ chidx = BB_GAIN_5GMB2; ++ else if (strcmp("5GHB", ch_band_Group) == 0) ++ chidx = BB_GAIN_5GHB; ++#endif /*CONFIG_IEEE80211_BAND_5GHZ*/ ++ else { ++ DBG_871X("Error Head Format, channel Group select\n,Please input:\t 2G , 5GLB1 , 5GLB2 , 5GMB1 , 5GMB2 , 5GHB\n"); ++ return count; ++ } ++ c = strsep(&next, " \t"); ++ ++ while (c != NULL) { ++ if (sscanf(c, "%hhx", &bb_gain[i]) != 1) ++ break; ++ ++ kfree_data->bb_gain[chidx][i] = bb_gain[i]; ++ DBG_871X("%s,kfree_data->bb_gain[%d][%d]=%x\n", __func__, chidx, i, kfree_data->bb_gain[chidx][i]); ++ ++ c = strsep(&next, " \t"); ++ i++; ++ } ++ ++ } ++ ++ return count; ++ ++} ++ ++static int proc_get_kfree_thermal(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); ++ ++ DBG_871X_SEL(m, "%d\n", kfree_data->thermal); ++ ++ return 0; ++} ++ ++static ssize_t proc_set_kfree_thermal(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); ++ char tmp[32] = {0}; ++ s8 thermal; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ int num = sscanf(tmp, "%hhd", &thermal); ++ ++ if (num < 1) ++ return count; ++ ++ kfree_data->thermal = thermal; ++ } ++ ++ return count; ++} ++ ++static ssize_t proc_set_tx_gain_offset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *adapter; ++ char tmp[32] = {0}; ++ u8 rf_path; ++ s8 offset; ++ ++ adapter = (_adapter *)rtw_netdev_priv(dev); ++ if (!adapter) ++ return -EFAULT; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ u8 write_value; ++ int num = sscanf(tmp, "%hhu %hhd", &rf_path, &offset); ++ ++ if (num < 2) ++ return count; ++ ++ DBG_871X("write rf_path:%u tx gain offset:%d\n", rf_path, offset); ++ rtw_rf_set_tx_gain_offset(adapter, rf_path, offset); ++ } ++ ++ return count; ++} ++#endif /* CONFIG_RF_GAIN_OFFSET */ ++ ++#ifdef CONFIG_BT_COEXIST ++ssize_t proc_set_btinfo_evt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u8 btinfo[8]; ++ ++ if (count < 6) ++ return -EFAULT; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ int num = 0; ++ ++ _rtw_memset(btinfo, 0, 8); ++ ++ num = sscanf(tmp, "%hhx %hhx %hhx %hhx %hhx %hhx %hhx %hhx" ++ , &btinfo[0], &btinfo[1], &btinfo[2], &btinfo[3] ++ , &btinfo[4], &btinfo[5], &btinfo[6], &btinfo[7]); ++ ++ if (num < 6) ++ return -EINVAL; ++ ++ btinfo[1] = num-2; ++ ++ rtw_btinfo_cmd(padapter, btinfo, btinfo[1]+2); ++ } ++ ++ return count; ++} ++ ++static u8 btreg_read_type = 0; ++static u16 btreg_read_addr = 0; ++static int btreg_read_error = 0; ++static u8 btreg_write_type = 0; ++static u16 btreg_write_addr = 0; ++static int btreg_write_error = 0; ++ ++static u8 *btreg_type[] = { ++ "rf", ++ "modem", ++ "bluewize", ++ "vendor", ++ "le" ++}; ++ ++static int btreg_parse_str(char *input, u8 *type, u16 *addr, u16 *val) ++{ ++ u32 num; ++ u8 str[80] = {0}; ++ u8 t = 0; ++ u32 a, v; ++ u8 i, n; ++ u8 *p; ++ ++ ++ num = sscanf(input, "%s %x %x", str, &a, &v); ++ if (num < 2) { ++ DBG_871X("%s: INVALID input!(%s)\n", __FUNCTION__, input); ++ return -EINVAL; ++ } ++ if ((num < 3) && val) { ++ DBG_871X("%s: INVALID input!(%s)\n", __FUNCTION__, input); ++ return -EINVAL; ++ } ++ ++ /* convert to lower case for following type compare */ ++ p = str; ++ for ( ; *p; ++p) ++ *p = tolower(*p); ++ n = sizeof(btreg_type)/sizeof(btreg_type[0]); ++ for (i = 0; i < n; i++) { ++ if (!strcmp(str, btreg_type[i])) { ++ t = i; ++ break; ++ } ++ } ++ if (i == n) { ++ DBG_871X("%s: unknown type(%s)!\n", __FUNCTION__, str); ++ return -EINVAL; ++ } ++ ++ switch (t) { ++ case 0: ++ /* RF */ ++ if (a & 0xFFFFFF80) { ++ DBG_871X("%s: INVALID address(0x%X) for type %s(%d)!\n", ++ __FUNCTION__, a, btreg_type[t], t); ++ return -EINVAL; ++ } ++ break; ++ case 1: ++ /* Modem */ ++ if (a & 0xFFFFFE00) { ++ DBG_871X("%s: INVALID address(0x%X) for type %s(%d)!\n", ++ __FUNCTION__, a, btreg_type[t], t); ++ return -EINVAL; ++ } ++ break; ++ default: ++ /* Others(Bluewize, Vendor, LE) */ ++ if (a & 0xFFFFF000) { ++ DBG_871X("%s: INVALID address(0x%X) for type %s(%d)!\n", ++ __FUNCTION__, a, btreg_type[t], t); ++ return -EINVAL; ++ } ++ break; ++ } ++ ++ if (val) { ++ if (v & 0xFFFF0000) { ++ DBG_871X("%s: INVALID value(0x%x)!\n", __FUNCTION__, v); ++ return -EINVAL; ++ } ++ *val = (u16)v; ++ } ++ ++ *type = (u8)t; ++ *addr = (u16)a; ++ ++ return 0; ++} ++ ++int proc_get_btreg_read(struct seq_file *m, void *v) ++{ ++ struct net_device *dev; ++ PADAPTER padapter; ++ u16 ret; ++ u32 data; ++ ++ ++ if (btreg_read_error) ++ return btreg_read_error; ++ ++ dev = m->private; ++ padapter = (PADAPTER)rtw_netdev_priv(dev); ++ ++ ret = rtw_btcoex_btreg_read(padapter, btreg_read_type, btreg_read_addr, &data); ++ if (CHECK_STATUS_CODE_FROM_BT_MP_OPER_RET(ret, BT_STATUS_BT_OP_SUCCESS)) ++ DBG_871X_SEL_NL(m, "BTREG read: (%s)0x%04X = 0x%08x\n", btreg_type[btreg_read_type], btreg_read_addr, data); ++ else ++ DBG_871X_SEL_NL(m, "BTREG read: (%s)0x%04X read fail. error code = 0x%04x.\n", btreg_type[btreg_read_type], btreg_read_addr, ret); ++ ++ return 0; ++} ++ ++ssize_t proc_set_btreg_read(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ PADAPTER padapter; ++ u8 tmp[80] = {0}; ++ u32 num; ++ int err; ++ ++ ++ padapter = (PADAPTER)rtw_netdev_priv(dev); ++ ++ if (NULL == buffer) { ++ DBG_871X(FUNC_ADPT_FMT ": input buffer is NULL!\n", ++ FUNC_ADPT_ARG(padapter)); ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ if (count < 1) { ++ DBG_871X(FUNC_ADPT_FMT ": input length is 0!\n", ++ FUNC_ADPT_ARG(padapter)); ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ num = count; ++ if (num > (sizeof(tmp) - 1)) ++ num = (sizeof(tmp) - 1); ++ ++ if (copy_from_user(tmp, buffer, num)) { ++ DBG_871X(FUNC_ADPT_FMT ": copy buffer from user space FAIL!\n", ++ FUNC_ADPT_ARG(padapter)); ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ err = btreg_parse_str(tmp, &btreg_read_type, &btreg_read_addr, NULL); ++ if (err) ++ goto exit; ++ ++ DBG_871X(FUNC_ADPT_FMT ": addr=(%s)0x%X\n", ++ FUNC_ADPT_ARG(padapter), btreg_type[btreg_read_type], btreg_read_addr); ++ ++exit: ++ btreg_read_error = err; ++ ++ return count; ++} ++ ++int proc_get_btreg_write(struct seq_file *m, void *v) ++{ ++ struct net_device *dev; ++ PADAPTER padapter; ++ u16 ret; ++ u32 data; ++ ++ ++ if (btreg_write_error < 0) ++ return btreg_write_error; ++ else if (btreg_write_error > 0) { ++ DBG_871X_SEL_NL(m, "BTREG write: (%s)0x%04X write fail. error code = 0x%04x.\n", btreg_type[btreg_write_type], btreg_write_addr, btreg_write_error); ++ return 0; ++ } ++ ++ dev = m->private; ++ padapter = (PADAPTER)rtw_netdev_priv(dev); ++ ++ ret = rtw_btcoex_btreg_read(padapter, btreg_write_type, btreg_write_addr, &data); ++ if (CHECK_STATUS_CODE_FROM_BT_MP_OPER_RET(ret, BT_STATUS_BT_OP_SUCCESS)) ++ DBG_871X_SEL_NL(m, "BTREG read: (%s)0x%04X = 0x%08x\n", btreg_type[btreg_write_type], btreg_write_addr, data); ++ else ++ DBG_871X_SEL_NL(m, "BTREG read: (%s)0x%04X read fail. error code = 0x%04x.\n", btreg_type[btreg_write_type], btreg_write_addr, ret); ++ ++ return 0; ++} ++ ++ssize_t proc_set_btreg_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ PADAPTER padapter; ++ u8 tmp[80] = {0}; ++ u32 num; ++ u16 val; ++ u16 ret; ++ int err; ++ ++ ++ padapter = (PADAPTER)rtw_netdev_priv(dev); ++ ++ if (NULL == buffer) { ++ DBG_871X(FUNC_ADPT_FMT ": input buffer is NULL!\n", ++ FUNC_ADPT_ARG(padapter)); ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ if (count < 1) { ++ DBG_871X(FUNC_ADPT_FMT ": input length is 0!\n", ++ FUNC_ADPT_ARG(padapter)); ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ num = count; ++ if (num > (sizeof(tmp) - 1)) ++ num = (sizeof(tmp) - 1); ++ ++ if (copy_from_user(tmp, buffer, num)) { ++ DBG_871X(FUNC_ADPT_FMT ": copy buffer from user space FAIL!\n", ++ FUNC_ADPT_ARG(padapter)); ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ err = btreg_parse_str(tmp, &btreg_write_type, &btreg_write_addr, &val); ++ if (err) ++ goto exit; ++ ++ DBG_871X(FUNC_ADPT_FMT ": Set (%s)0x%X = 0x%x\n", ++ FUNC_ADPT_ARG(padapter), btreg_type[btreg_write_type], btreg_write_addr, val); ++ ++ ret = rtw_btcoex_btreg_write(padapter, btreg_write_type, btreg_write_addr, val); ++ if (!CHECK_STATUS_CODE_FROM_BT_MP_OPER_RET(ret, BT_STATUS_BT_OP_SUCCESS)) ++ err = ret; ++ ++exit: ++ btreg_write_error = err; ++ ++ return count; ++} ++#endif /* CONFIG_BT_COEXIST */ ++ ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++static int proc_get_best_chan(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 best_24g_ch = 0, best_5g_ch = 0; ++ ++ rtw_hal_get_odm_var(adapter, HAL_ODM_AUTO_CHNL_SEL, &(best_24g_ch), &(best_5g_ch)); ++ ++ DBG_871X_SEL_NL(m, "Best 2.4G CH:%u\n", best_24g_ch); ++ DBG_871X_SEL_NL(m, "Best 5G CH:%u\n", best_5g_ch); ++ return 0; ++} ++ ++static ssize_t proc_set_acs(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u8 acs_satae = 0; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ if (buffer && !copy_from_user(tmp, buffer, count)) { ++ ++ int num = sscanf(tmp, "%hhu", &acs_satae); ++ ++ if (num < 1) ++ return -EINVAL; ++ ++ if (1 == acs_satae) ++ rtw_acs_start(padapter, _TRUE); ++ else ++ rtw_acs_start(padapter, _FALSE); ++ ++ } ++ return count; ++} ++#endif ++ ++static int proc_get_hal_spec(struct seq_file *m, void *v) ++{ ++ struct net_device *dev = m->private; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ dump_hal_spec(m, adapter); ++ return 0; ++} ++ ++/* ++* rtw_adapter_proc: ++* init/deinit when register/unregister net_device ++*/ ++const struct rtw_proc_hdl adapter_proc_hdls [] = { ++ {"write_reg", proc_get_dummy, proc_set_write_reg}, ++ {"read_reg", proc_get_read_reg, proc_set_read_reg}, ++ {"adapters_status", proc_get_dump_adapters_status, NULL}, ++ {"fwstate", proc_get_fwstate, NULL}, ++ {"sec_info", proc_get_sec_info, NULL}, ++ {"mlmext_state", proc_get_mlmext_state, NULL}, + {"qos_option", proc_get_qos_option, NULL}, + {"ht_option", proc_get_ht_option, NULL}, + {"rf_info", proc_get_rf_info, NULL}, +- {"survey_info", proc_get_survey_info, NULL}, ++ {"scan_param", proc_get_scan_param, proc_set_scan_param}, ++ {"scan_abort", proc_get_scan_abort, NULL}, ++#ifdef CONFIG_SCAN_BACKOP ++ {"backop_flags_sta", proc_get_backop_flags_sta, proc_set_backop_flags_sta}, ++ {"backop_flags_ap", proc_get_backop_flags_ap, proc_set_backop_flags_ap}, ++#endif ++ {"survey_info", proc_get_survey_info, proc_set_survey_info}, + {"ap_info", proc_get_ap_info, NULL}, +- {"adapter_state", proc_get_adapter_state, NULL}, +- {"trx_info", proc_get_trx_info, NULL}, ++ {"trx_info", proc_get_trx_info, proc_reset_trx_info}, + {"rate_ctl", proc_get_rate_ctl, proc_set_rate_ctl}, + {"dis_pwt_ctl", proc_get_dis_pwt, proc_set_dis_pwt}, + {"mac_qinfo", proc_get_mac_qinfo, NULL}, + {"macid_info", proc_get_macid_info, NULL}, +- {"cam", proc_get_cam, proc_set_cam}, +- {"cam_cache", proc_get_cam_cache, NULL}, ++ {"sec_cam", proc_get_sec_cam, proc_set_sec_cam}, ++ {"sec_cam_cache", proc_get_sec_cam_cache, NULL}, + {"suspend_info", proc_get_suspend_resume_info, NULL}, +- {"rx_info", proc_get_rx_info, proc_reset_rx_info}, + {"wifi_spec",proc_get_wifi_spec,NULL}, + #ifdef CONFIG_LAYER2_ROAMING + {"roam_flags", proc_get_roam_flags, proc_set_roam_flags}, +@@ -716,9 +1545,11 @@ const struct rtw_proc_hdl adapter_proc_hdls [] = { + + #ifdef CONFIG_SDIO_HCI + {"sd_f0_reg_dump", proc_get_sd_f0_reg_dump, NULL}, ++ {"sdio_local_reg_dump", proc_get_sdio_local_reg_dump, NULL}, + #endif /* CONFIG_SDIO_HCI */ + + {"fwdl_test_case", proc_get_dummy, proc_set_fwdl_test_case}, ++ {"del_rx_ampdu_test_case", proc_get_dummy, proc_set_del_rx_ampdu_test_case}, + {"wait_hiq_empty", proc_get_dummy, proc_set_wait_hiq_empty}, + + {"mac_reg_dump", proc_get_mac_reg_dump, NULL}, +@@ -752,6 +1583,7 @@ const struct rtw_proc_hdl adapter_proc_hdls [] = { + #endif /* CONFIG_80211N_HT */ + + {"en_fwps", proc_get_en_fwps, proc_set_en_fwps}, ++ {"mac_rptbuf", proc_get_mac_rptbuf, NULL}, + + //{"path_rssi", proc_get_two_path_rssi, NULL}, + // {"rssi_disp",proc_get_rssi_disp, proc_set_rssi_disp}, +@@ -760,17 +1592,20 @@ const struct rtw_proc_hdl adapter_proc_hdls [] = { + {"btcoex_dbg", proc_get_btcoex_dbg, proc_set_btcoex_dbg}, + {"btcoex", proc_get_btcoex_info, NULL}, + {"btinfo_evt", proc_get_dummy, proc_set_btinfo_evt}, ++ {"btreg_read", proc_get_btreg_read, proc_set_btreg_read}, ++ {"btreg_write", proc_get_btreg_write, proc_set_btreg_write}, + #endif /* CONFIG_BT_COEXIST */ + + #if defined(DBG_CONFIG_ERROR_DETECT) + {"sreset", proc_get_sreset, proc_set_sreset}, + #endif /* DBG_CONFIG_ERROR_DETECT */ ++ {"trx_info_debug", proc_get_trx_info_debug, NULL}, + {"linked_info_dump",proc_get_linked_info_dump,proc_set_linked_info_dump}, +- ++ {"current_tx_rate", proc_get_current_tx_rate, NULL}, + #ifdef CONFIG_GPIO_API +- {"get_gpio",proc_get_gpio,proc_set_gpio}, +- {"set_gpio_output_value",proc_get_dummy,proc_set_gpio_output_value}, +- {"config_gpio",proc_get_dummy,proc_set_config_gpio}, ++ {"gpio_info",proc_get_gpio,proc_set_gpio}, ++ {"gpio_set_output_value",proc_get_dummy,proc_set_gpio_output_value}, ++ {"gpio_set_direction",proc_get_dummy,proc_set_config_gpio}, + #endif + + #ifdef CONFIG_DBG_COUNTER +@@ -783,12 +1618,57 @@ const struct rtw_proc_hdl adapter_proc_hdls [] = { + {"rx_ring", proc_get_rx_ring, NULL}, + {"tx_ring", proc_get_tx_ring, NULL}, + #endif ++#ifdef CONFIG_GPIO_WAKEUP ++ {"wowlan_gpio_info", proc_get_wowlan_gpio_info, ++ proc_set_wowlan_gpio_info}, ++#endif + #ifdef CONFIG_P2P_WOWLAN + {"p2p_wowlan_info", proc_get_p2p_wowlan_info, NULL}, + #endif +- {"chan_plan",proc_get_chan_plan,proc_set_chan_plan}, ++ {"country_code", proc_get_country_code, proc_set_country_code}, ++ {"chan_plan", proc_get_chan_plan, proc_set_chan_plan}, ++#ifdef CONFIG_DFS_MASTER ++ {"dfs_master_test_case", proc_get_dfs_master_test_case, proc_set_dfs_master_test_case}, ++ {"update_non_ocp", proc_get_dummy, proc_set_update_non_ocp}, ++ {"radar_detect", proc_get_dummy, proc_set_radar_detect}, ++#endif + {"new_bcn_max", proc_get_new_bcn_max, proc_set_new_bcn_max}, + {"sink_udpport",proc_get_udpport,proc_set_udpport}, ++#ifdef DBG_RX_COUNTER_DUMP ++ {"dump_rx_cnt_mode",proc_get_rx_cnt_dump,proc_set_rx_cnt_dump}, ++#endif ++ {"change_bss_chbw", NULL, proc_set_change_bss_chbw}, ++ {"target_tx_power", proc_get_target_tx_power, NULL}, ++ {"tx_power_by_rate", proc_get_tx_power_by_rate, NULL}, ++ {"tx_power_limit", proc_get_tx_power_limit, NULL}, ++ {"tx_power_ext_info", proc_get_tx_power_ext_info, proc_set_tx_power_ext_info}, ++#ifdef CONFIG_RF_GAIN_OFFSET ++ {"tx_gain_offset", proc_get_dummy, proc_set_tx_gain_offset}, ++ {"kfree_flag", proc_get_kfree_flag, proc_set_kfree_flag}, ++ {"kfree_bb_gain", proc_get_kfree_bb_gain, proc_set_kfree_bb_gain}, ++ {"kfree_thermal", proc_get_kfree_thermal, proc_set_kfree_thermal}, ++#endif ++#ifdef CONFIG_POWER_SAVING ++ {"ps_info",proc_get_ps_info, NULL}, ++#endif ++#ifdef CONFIG_TDLS ++ {"tdls_info", proc_get_tdls_info, NULL}, ++#endif ++ {"monitor", proc_get_monitor, proc_set_monitor}, ++ ++#ifdef CONFIG_AUTO_CHNL_SEL_NHM ++ {"acs", proc_get_best_chan, proc_set_acs}, ++#endif ++#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER ++ {"rtkm_info", proc_get_rtkm_info, NULL} ++#endif ++ {"efuse_map", proc_get_efuse_map, NULL}, ++#ifdef CONFIG_IEEE80211W ++ {"11w_tx_sa_query", proc_get_tx_sa_query, proc_set_tx_sa_query}, ++ {"11w_tx_deauth", proc_get_tx_deauth, proc_set_tx_deauth}, ++ {"11w_tx_auth", proc_get_tx_auth, proc_set_tx_auth}, ++#endif /* CONFIG_IEEE80211W */ ++ {"hal_spec", proc_get_hal_spec, NULL}, + }; + + const int adapter_proc_hdls_num = sizeof(adapter_proc_hdls) / sizeof(struct rtw_proc_hdl); +@@ -843,7 +1723,12 @@ ssize_t proc_set_odm_dbg_comp(struct file *file, const char __user *buffer, size + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%llx", &dbg_comp); + +@@ -877,7 +1762,12 @@ ssize_t proc_set_odm_dbg_level(struct file *file, const char __user *buffer, siz + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%u", &dbg_level); + +@@ -911,7 +1801,12 @@ ssize_t proc_set_odm_ability(struct file *file, const char __user *buffer, size_ + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%x", &ability); + +@@ -940,24 +1835,27 @@ ssize_t proc_set_odm_adaptivity(struct file *file, const char __user *buffer, si + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + char tmp[32]; + u32 TH_L2H_ini; ++ u32 TH_L2H_ini_mode2; + s8 TH_EDCCA_HL_diff; +- u32 IGI_Base; +- int ForceEDCCA; +- u8 AdapEn_RSSI; +- u8 IGI_LowerBound; ++ s8 TH_EDCCA_HL_diff_mode2; ++ u8 EDCCA_enable; + + if (count < 1) + return -EFAULT; + +- if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ if (count > sizeof(tmp)) { ++ rtw_warn_on(1); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, count)) { + +- int num = sscanf(tmp, "%x %hhd %x %d %hhu %hhu", +- &TH_L2H_ini, &TH_EDCCA_HL_diff, &IGI_Base, &ForceEDCCA, &AdapEn_RSSI, &IGI_LowerBound); ++ int num = sscanf(tmp, "%x %hhd %x %hhd %hhu", &TH_L2H_ini, &TH_EDCCA_HL_diff, &TH_L2H_ini_mode2, &TH_EDCCA_HL_diff_mode2, &EDCCA_enable); + +- if (num != 6) ++ if (num != 5) + return count; + +- rtw_odm_adaptivity_parm_set(padapter, (s8)TH_L2H_ini, TH_EDCCA_HL_diff, (s8)IGI_Base, (bool)ForceEDCCA, AdapEn_RSSI, IGI_LowerBound); ++ rtw_odm_adaptivity_parm_set(padapter, (s8)TH_L2H_ini, TH_EDCCA_HL_diff, (s8)TH_L2H_ini_mode2, TH_EDCCA_HL_diff_mode2, EDCCA_enable); + } + + return count; +@@ -984,7 +1882,7 @@ int proc_get_phydm_cmd(struct seq_file *m, void *v) + if (NULL == phydm_msg) + return -ENOMEM; + +- PhyDM_Cmd(phydm, NULL, 0, 0, phydm_msg, PHYDM_MSG_LEN); ++ phydm_cmd(phydm, NULL, 0, 0, phydm_msg, PHYDM_MSG_LEN); + } + + DBG_871X_SEL(m, "%s\n", phydm_msg); +@@ -1024,7 +1922,7 @@ ssize_t proc_set_phydm_cmd(struct file *file, const char __user *buffer, size_t + _rtw_memset(phydm_msg, 0, PHYDM_MSG_LEN); + } + +- PhyDM_Cmd(phydm, tmp, count, 1, phydm_msg, PHYDM_MSG_LEN); ++ phydm_cmd(phydm, tmp, count, 1, phydm_msg, PHYDM_MSG_LEN); + + if (strlen(phydm_msg) == 0) { + rtw_mfree(phydm_msg, PHYDM_MSG_LEN); +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_proc.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/rtw_proc.h +old mode 100755 +new mode 100644 +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c +old mode 100755 +new mode 100644 +index a6577d6..6dc417e +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c +@@ -20,6 +20,7 @@ + #define _HCI_INTF_C_ + + #include ++#include + #include + + #ifndef CONFIG_SDIO_HCI +@@ -45,9 +46,6 @@ static struct mmc_host *mmc_host = NULL; + + static const struct sdio_device_id sdio_ids[] = + { +-#ifdef CONFIG_RTL8723A +- { SDIO_DEVICE(0x024c, 0x8723),.driver_data = RTL8723A}, +-#endif //CONFIG_RTL8723A + #ifdef CONFIG_RTL8723B + { SDIO_DEVICE(0x024c, 0xB723),.driver_data = RTL8723B}, + #endif +@@ -63,9 +61,17 @@ static const struct sdio_device_id sdio_ids[] = + { SDIO_DEVICE(0x024c, 0x818B),.driver_data = RTL8192E}, + #endif //CONFIG_RTL8192E + +-#if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) /* temporarily add this to accept all sdio wlan id */ +- { SDIO_DEVICE_CLASS(SDIO_CLASS_WLAN) }, ++#ifdef CONFIG_RTL8703B ++ { SDIO_DEVICE(0x024c, 0xB703), .driver_data = RTL8703B}, ++#endif ++ ++#ifdef CONFIG_RTL8188F ++ {SDIO_DEVICE(0x024c, 0xF179), .driver_data = RTL8188F}, + #endif ++ ++//#if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) /* temporarily add this to accept all sdio wlan id */ ++ { SDIO_DEVICE_CLASS(SDIO_CLASS_WLAN) }, ++//#endif + { /* end: all zeroes */ }, + }; + +@@ -107,13 +113,13 @@ static void sd_sync_int_hdl(struct sdio_func *func) + + psdpriv = sdio_get_drvdata(func); + +- if (!psdpriv->if1) { ++ if (!psdpriv->padapters[IFACE_ID0]) { + DBG_871X("%s if1 == NULL\n", __func__); + return; + } + + rtw_sdio_set_irq_thd(psdpriv, current); +- sd_int_hdl(psdpriv->if1); ++ sd_int_hdl(psdpriv->padapters[IFACE_ID0]); + rtw_sdio_set_irq_thd(psdpriv, NULL); + } + +@@ -191,21 +197,27 @@ static irqreturn_t gpio_hostwakeup_irq_thread(int irq, void *data) + static u8 gpio_hostwakeup_alloc_irq(PADAPTER padapter) + { + int err; ++ u32 status = 0; ++ + if (oob_irq == 0) { + DBG_871X("oob_irq ZERO!\n"); + return _FAIL; + } + + DBG_871X("%s : oob_irq = %d\n", __func__, oob_irq); +- +- /* dont set it IRQF_TRIGGER_LOW, or wowlan */ +- /* power is high after suspend */ +- /* and failing can prevent can not sleep issue if */ +- /* wifi gpio12 pin is not linked with CPU */ ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32)) ++ status = IRQF_NO_SUSPEND; ++#endif ++ ++ if (HIGH_ACTIVE) ++ status |= IRQF_TRIGGER_RISING; ++ else ++ status |= IRQF_TRIGGER_FALLING; ++ + err = request_threaded_irq(oob_irq, gpio_hostwakeup_irq_thread, NULL, +- //IRQF_TRIGGER_LOW | IRQF_ONESHOT, +- IRQF_TRIGGER_FALLING, +- "rtw_wifi_gpio_wakeup", padapter); ++ status, "rtw_wifi_gpio_wakeup", padapter); ++ + if (err < 0) { + DBG_871X("Oops: can't allocate gpio irq %d err:%d\n", oob_irq, err); + return _FALSE; +@@ -307,7 +319,53 @@ static void sdio_deinit(struct dvobj_priv *dvobj) + sdio_release_host(func); + } + } +-static struct dvobj_priv *sdio_dvobj_init(struct sdio_func *func) ++ ++static void rtw_decide_chip_type_by_device_id(struct dvobj_priv *dvobj, const struct sdio_device_id *pdid) ++{ ++ dvobj->chip_type = pdid->driver_data; ++ ++#if defined(CONFIG_RTL8188E) ++ if (dvobj->chip_type == RTL8188E) { ++ dvobj->HardwareType = HARDWARE_TYPE_RTL8188ES; ++ DBG_871X("CHIP TYPE: RTL8188E\n"); ++ } ++#endif ++ ++#if defined(CONFIG_RTL8723B) ++ dvobj->chip_type = RTL8723B; ++ dvobj->HardwareType = HARDWARE_TYPE_RTL8723BS; ++#endif ++ ++#if defined(CONFIG_RTL8821A) ++ if (dvobj->chip_type == RTL8821) { ++ dvobj->HardwareType = HARDWARE_TYPE_RTL8821S; ++ DBG_871X("CHIP TYPE: RTL8821A\n"); ++ } ++#endif ++ ++#if defined(CONFIG_RTL8192E) ++ if (dvobj->chip_type == RTL8192E) { ++ dvobj->HardwareType = HARDWARE_TYPE_RTL8192ES; ++ DBG_871X("CHIP TYPE: RTL8192E\n"); ++ } ++#endif ++ ++#if defined(CONFIG_RTL8703B) ++ if (dvobj->chip_type == RTL8703B) { ++ dvobj->HardwareType = HARDWARE_TYPE_RTL8703BS; ++ DBG_871X("CHIP TYPE: RTL8703B\n"); ++ } ++#endif ++ ++#if defined(CONFIG_RTL8188F) ++ if (dvobj->chip_type == RTL8188F) { ++ dvobj->HardwareType = HARDWARE_TYPE_RTL8188FS; ++ DBG_871X("CHIP TYPE: RTL8188F\n"); ++ } ++#endif ++} ++ ++static struct dvobj_priv *sdio_dvobj_init(struct sdio_func *func, const struct sdio_device_id *pdid) + { + int status = _FAIL; + struct dvobj_priv *dvobj = NULL; +@@ -327,6 +385,10 @@ _func_enter_; + RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s: initialize SDIO Failed!\n", __FUNCTION__)); + goto free_dvobj; + } ++ ++ dvobj->interface_type = RTW_SDIO; ++ rtw_decide_chip_type_by_device_id(dvobj, pdid); ++ + rtw_reset_continual_io_error(dvobj); + status = _SUCCESS; + +@@ -357,78 +419,50 @@ _func_enter_; + _func_exit_; + return; + } +-static void rtw_decide_chip_type_by_device_id(PADAPTER padapter, const struct sdio_device_id *pdid) +-{ +- padapter->chip_type = pdid->driver_data; + +-#if defined(CONFIG_RTL8723A) +- if( padapter->chip_type == RTL8723A){ +- padapter->HardwareType = HARDWARE_TYPE_RTL8723AS; +- DBG_871X("CHIP TYPE: RTL8723A\n"); +- } +-#endif ++u8 rtw_set_hal_ops(PADAPTER padapter) ++{ ++ //alloc memory for HAL DATA ++ if(rtw_hal_data_init(padapter) == _FAIL) ++ return _FAIL; + + #if defined(CONFIG_RTL8188E) +- if(padapter->chip_type == RTL8188E){ +- padapter->HardwareType = HARDWARE_TYPE_RTL8188ES; +- DBG_871X("CHIP TYPE: RTL8188E\n"); +- } ++ if (rtw_get_chip_type(padapter) == RTL8188E) ++ rtl8188es_set_hal_ops(padapter); + #endif + + #if defined(CONFIG_RTL8723B) +- padapter->chip_type = RTL8723B; +- padapter->HardwareType = HARDWARE_TYPE_RTL8723BS; ++ if (rtw_get_chip_type(padapter) == RTL8723B) ++ rtl8723bs_set_hal_ops(padapter); + #endif + + #if defined(CONFIG_RTL8821A) +- if (padapter->chip_type == RTL8821) { +- padapter->HardwareType = HARDWARE_TYPE_RTL8821S; +- DBG_871X("CHIP TYPE: RTL8821A\n"); +- } ++ if (rtw_get_chip_type(padapter) == RTL8821) ++ rtl8821as_set_hal_ops(padapter); + #endif + + #if defined(CONFIG_RTL8192E) +- if (padapter->chip_type == RTL8192E) { +- padapter->HardwareType = HARDWARE_TYPE_RTL8192E; +- DBG_871X("CHIP TYPE: RTL8192E\n"); +- } ++ if (rtw_get_chip_type(padapter) == RTL8192E) ++ rtl8192es_set_hal_ops(padapter); + #endif + +- +-} +- +-void rtw_set_hal_ops(PADAPTER padapter) +-{ +- //alloc memory for HAL DATA +- rtw_hal_data_init(padapter); +- +-#if defined(CONFIG_RTL8723A) +- if( padapter->chip_type == RTL8723A){ +- rtl8723as_set_hal_ops(padapter); +- } +-#endif +-#if defined(CONFIG_RTL8188E) +- if(padapter->chip_type == RTL8188E){ +- rtl8188es_set_hal_ops(padapter); +- } +-#endif +-#if defined(CONFIG_RTL8723B) +- if(padapter->chip_type == RTL8723B){ +- rtl8723bs_set_hal_ops(padapter); +- } +-#endif +-#if defined(CONFIG_RTL8821A) +- if(padapter->chip_type == RTL8821){ +- rtl8821as_set_hal_ops(padapter); +- } ++#if defined(CONFIG_RTL8703B) ++ if (rtw_get_chip_type(padapter) == RTL8703B) ++ rtl8703bs_set_hal_ops(padapter); + #endif + +-#if defined(CONFIG_RTL8192E) +- if(padapter->chip_type == RTL8192E){ +- rtl8192es_set_hal_ops(padapter); +- } ++#if defined(CONFIG_RTL8188F) ++ if (rtw_get_chip_type(padapter) == RTL8188F) ++ rtl8188fs_set_hal_ops(padapter); + #endif + ++ if( rtw_hal_ops_check(padapter) == _FAIL) ++ return _FAIL; ++ ++ if (hal_spec_init(padapter) == _FAIL) ++ return _FAIL; ++ ++ return _SUCCESS; + } + + static void sd_intf_start(PADAPTER padapter) +@@ -458,28 +492,29 @@ static void sd_intf_stop(PADAPTER padapter) + PADAPTER g_test_adapter = NULL; + #endif // RTW_SUPPORT_PLATFORM_SHUTDOWN + +-_adapter *rtw_sdio_if1_init(struct dvobj_priv *dvobj, const struct sdio_device_id *pdid) ++_adapter *rtw_sdio_if1_init(struct dvobj_priv *dvobj) + { + int status = _FAIL; +- struct net_device *pnetdev; + PADAPTER padapter = NULL; +- +- if ((padapter = (_adapter *)rtw_zvmalloc(sizeof(*padapter))) == NULL) { ++ ++ padapter = (_adapter *)rtw_zvmalloc(sizeof(*padapter)); ++ if (padapter == NULL) + goto exit; +- } ++ ++ if (loadparam(padapter) != _SUCCESS) ++ goto free_adapter; + + #ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN + g_test_adapter = padapter; + #endif // RTW_SUPPORT_PLATFORM_SHUTDOWN + padapter->dvobj = dvobj; +- dvobj->if1 = padapter; + +- padapter->bDriverStopped=_TRUE; ++ rtw_set_drv_stopped(padapter);/*init*/ + + dvobj->padapters[dvobj->iface_nums++] = padapter; + padapter->iface_id = IFACE_ID0; + +-#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT) ++#if defined(CONFIG_CONCURRENT_MODE) + //set adapter_type/iface type for primary padapter + padapter->isprimary = _TRUE; + padapter->adapter_type = PRIMARY_ADAPTER; +@@ -490,27 +525,11 @@ _adapter *rtw_sdio_if1_init(struct dvobj_priv *dvobj, const struct sdio_device_i + #endif + #endif + +- padapter->interface_type = RTW_SDIO; +- rtw_decide_chip_type_by_device_id(padapter, pdid); +- +- //3 1. init network device data +- pnetdev = rtw_init_netdev(padapter); +- if (!pnetdev) +- goto free_adapter; +- +- SET_NETDEV_DEV(pnetdev, dvobj_to_dev(dvobj)); +- +- padapter = rtw_netdev_priv(pnetdev); +- +-#ifdef CONFIG_IOCTL_CFG80211 +- rtw_wdev_alloc(padapter, dvobj_to_dev(dvobj)); +-#endif +- + //3 3. init driver special setting, interface, OS and hardware relative + + //4 3.1 set hardware operation functions +- rtw_set_hal_ops(padapter); +- ++ if (rtw_set_hal_ops(padapter)== _FAIL) ++ goto free_hal_data; + + //3 5. initialize Chip version + padapter->intf_start = &sd_intf_start; +@@ -548,38 +567,29 @@ _adapter *rtw_sdio_if1_init(struct dvobj_priv *dvobj, const struct sdio_device_i + + //3 8. get WLan MAC address + // set mac addr +- rtw_macaddr_cfg(padapter->eeprompriv.mac_addr); +- rtw_init_wifidirect_addrs(padapter, padapter->eeprompriv.mac_addr, padapter->eeprompriv.mac_addr); ++ rtw_macaddr_cfg(adapter_mac_addr(padapter), get_hal_mac_addr(padapter)); ++#ifdef CONFIG_P2P ++ rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); ++#endif /* CONFIG_P2P */ + + rtw_hal_disable_interrupt(padapter); + +- DBG_871X("bDriverStopped:%d, bSurpriseRemoved:%d, bup:%d, hw_init_completed:%d\n" +- ,padapter->bDriverStopped +- ,padapter->bSurpriseRemoved +- ,padapter->bup +- ,padapter->hw_init_completed ++ DBG_871X("bDriverStopped:%s, bSurpriseRemoved:%s, bup:%d, hw_init_completed:%d\n" ++ , rtw_is_drv_stopped(padapter)?"True":"False" ++ , rtw_is_surprise_removed(padapter)?"True":"False" ++ , padapter->bup ++ , rtw_get_hw_init_completed(padapter) + ); + + status = _SUCCESS; + + free_hal_data: +- if(status != _SUCCESS && padapter->HalData) +- rtw_mfree(padapter->HalData, sizeof(*(padapter->HalData))); +- +-free_wdev: +- if(status != _SUCCESS) { +- #ifdef CONFIG_IOCTL_CFG80211 +- rtw_wdev_unregister(padapter->rtw_wdev); +- rtw_wdev_free(padapter->rtw_wdev); +- #endif +- } ++ if (status != _SUCCESS && padapter->HalData) ++ rtw_hal_free_data(padapter); + + free_adapter: +- if (status != _SUCCESS) { +- if (pnetdev) +- rtw_free_netdev(pnetdev); +- else +- rtw_vmfree((u8*)padapter, sizeof(*padapter)); ++ if (status != _SUCCESS && padapter) { ++ rtw_vmfree((u8 *)padapter, sizeof(*padapter)); + padapter = NULL; + } + exit: +@@ -588,7 +598,6 @@ exit: + + static void rtw_sdio_if1_deinit(_adapter *if1) + { +- struct net_device *pnetdev = if1->pnetdev; + struct mlme_priv *pmlmepriv= &if1->mlmepriv; + + if(check_fwstate(pmlmepriv, _FW_LINKED)) +@@ -610,7 +619,6 @@ static void rtw_sdio_if1_deinit(_adapter *if1) + #endif + #endif + +- rtw_cancel_all_timer(if1); + + #ifdef CONFIG_WOWLAN + adapter_to_pwrctl(if1)->wowlan_mode=_FALSE; +@@ -618,20 +626,14 @@ static void rtw_sdio_if1_deinit(_adapter *if1) + #endif //CONFIG_WOWLAN + + rtw_dev_unload(if1); +- DBG_871X("+r871xu_dev_remove, hw_init_completed=%d\n", if1->hw_init_completed); +- +- rtw_handle_dualmac(if1, 0); +- +-#ifdef CONFIG_IOCTL_CFG80211 +- if (if1->rtw_wdev) { +- rtw_wdev_free(if1->rtw_wdev); +- } +-#endif ++ DBG_871X("+r871xu_dev_remove, hw_init_completed=%d\n", rtw_get_hw_init_completed(if1)); + + rtw_free_drv_sw(if1); + +- if(pnetdev) +- rtw_free_netdev(pnetdev); ++ /* TODO: use rtw_os_ndevs_deinit instead at the first stage of driver's dev deinit function */ ++ rtw_os_ndev_free(if1); ++ ++ rtw_vmfree((u8 *)if1, sizeof(_adapter)); + + #ifdef CONFIG_PLATFORM_RTD2880B + DBG_871X("wlan link down\n"); +@@ -699,12 +701,12 @@ static int rtw_drv_init( + ("+rtw_drv_init: vendor=0x%04x device=0x%04x class=0x%02x\n", + func->vendor, func->device, func->class)); + +- if ((dvobj = sdio_dvobj_init(func)) == NULL) { ++ if ((dvobj = sdio_dvobj_init(func, id)) == NULL) { + RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("initialize device object priv Failed!\n")); + goto exit; + } + +- if ((if1 = rtw_sdio_if1_init(dvobj, id)) == NULL) { ++ if ((if1 = rtw_sdio_if1_init(dvobj)) == NULL) { + DBG_871X("rtw_init_primary_adapter Failed!\n"); + goto free_dvobj; + } +@@ -716,9 +718,8 @@ static int rtw_drv_init( + #endif + + //dev_alloc_name && register_netdev +- if((status = rtw_drv_register_netdev(if1)) != _SUCCESS) { ++ if (rtw_os_ndevs_init(dvobj) != _SUCCESS) + goto free_if2; +- } + + #ifdef CONFIG_HOSTAPD_MLME + hostapd_mode_init(if1); +@@ -730,7 +731,7 @@ static int rtw_drv_init( + #endif + + if (sdio_alloc_irq(dvobj) != _SUCCESS) +- goto free_if2; ++ goto os_ndevs_deinit; + + #ifdef CONFIG_GPIO_WAKEUP + #ifdef CONFIG_PLATFORM_ARM_SUN6I +@@ -755,6 +756,9 @@ static int rtw_drv_init( + + status = _SUCCESS; + ++os_ndevs_deinit: ++ if (status != _SUCCESS) ++ rtw_os_ndevs_deinit(dvobj); + free_if2: + if(status != _SUCCESS && if2) { + #ifdef CONFIG_CONCURRENT_MODE +@@ -777,7 +781,7 @@ static void rtw_dev_remove(struct sdio_func *func) + { + struct dvobj_priv *dvobj = sdio_get_drvdata(func); + struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(dvobj); +- PADAPTER padapter = dvobj->if1; ++ PADAPTER padapter = dvobj->padapters[IFACE_ID0]; + + _func_enter_; + +@@ -785,9 +789,10 @@ _func_enter_; + + dvobj->processing_dev_remove = _TRUE; + +- rtw_unregister_netdevs(dvobj); ++ /* TODO: use rtw_os_ndevs_deinit instead at the first stage of driver's dev deinit function */ ++ rtw_os_ndevs_unregister(dvobj); + +- if (padapter->bSurpriseRemoved == _FALSE) { ++ if (!rtw_is_surprise_removed(padapter)) { + int err; + + /* test surprise remove */ +@@ -795,7 +800,7 @@ _func_enter_; + sdio_readb(func, 0, &err); + sdio_release_host(func); + if (err == -ENOMEDIUM) { +- padapter->bSurpriseRemoved = _TRUE; ++ rtw_set_surprise_removed(padapter); + DBG_871X(KERN_NOTICE "%s: device had been removed!\n", __func__); + } + } +@@ -804,25 +809,32 @@ _func_enter_; + rtw_unregister_early_suspend(pwrctl); + #endif + +- rtw_ps_deny(padapter, PS_DENY_DRV_REMOVE); +- +- rtw_pm_set_ips(padapter, IPS_NONE); +- rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); +- +- LeaveAllPowerSaveMode(padapter); ++ if (padapter->bFWReady == _TRUE) { ++ rtw_ps_deny(padapter, PS_DENY_DRV_REMOVE); ++ rtw_pm_set_ips(padapter, IPS_NONE); ++ rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); ++ LeaveAllPowerSaveMode(padapter); ++ } ++ rtw_set_drv_stopped(padapter); /*for stop thread*/ + ++ /* stop cmd thread */ ++ rtw_stop_cmd_thread(padapter); + #ifdef CONFIG_CONCURRENT_MODE +- rtw_drv_if2_stop(dvobj->if2); ++ rtw_drv_if2_stop(dvobj->padapters[IFACE_ID1]); + #endif + + #ifdef CONFIG_BT_COEXIST ++ #ifdef CONFIG_BT_COEXIST_SOCKET_TRX ++ if (GET_HAL_DATA(padapter)->EEPROMBluetoothCoexist) ++ rtw_btcoex_close_socket(padapter); ++ #endif + rtw_btcoex_HaltNotify(padapter); + #endif + + rtw_sdio_if1_deinit(padapter); + + #ifdef CONFIG_CONCURRENT_MODE +- rtw_drv_if2_free(dvobj->if2); ++ rtw_drv_if2_free(dvobj->padapters[IFACE_ID1]); + #endif + + sdio_dvobj_deinit(func); +@@ -838,21 +850,26 @@ static int rtw_sdio_suspend(struct device *dev) + { + struct sdio_func *func =dev_to_sdio_func(dev); + struct dvobj_priv *psdpriv = sdio_get_drvdata(func); +- struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(psdpriv); +- _adapter *padapter = psdpriv->if1; +- struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; ++ struct pwrctrl_priv *pwrpriv = NULL; ++ _adapter *padapter = NULL; ++ struct debug_priv *pdbgpriv = NULL; + int ret = 0; + u8 ch, bw, offset; + +- if(padapter->bDriverStopped == _TRUE) +- { +- DBG_871X("%s bDriverStopped = %d\n", __FUNCTION__, padapter->bDriverStopped); ++ if (psdpriv == NULL) ++ goto exit; ++ ++ pwrpriv = dvobj_to_pwrctl(psdpriv); ++ padapter = psdpriv->padapters[IFACE_ID0]; ++ pdbgpriv = &psdpriv->drv_dbg; ++ if (rtw_is_drv_stopped(padapter)) { ++ DBG_871X("%s bDriverStopped == _TRUE\n", __func__); + goto exit; + } + + if (pwrpriv->bInSuspend == _TRUE) + { +- DBG_871X("%s bInSuspend = %d\n", __FUNCTION__, pwrpriv->bInSuspend); ++ DBG_871X("%s bInSuspend = %d\n", __func__, pwrpriv->bInSuspend); + pdbgpriv->dbg_suspend_error_cnt++; + goto exit; + } +@@ -873,7 +890,8 @@ exit: + DBG_871X("cmd: %s: suspend: PM flag = 0x%x\n", sdio_func_id(func), pm_flag); + if (!(pm_flag & MMC_PM_KEEP_POWER)) { + DBG_871X("%s: cannot remain alive while host is suspended\n", sdio_func_id(func)); +- pdbgpriv->dbg_suspend_error_cnt++; ++ if (pdbgpriv) ++ pdbgpriv->dbg_suspend_error_cnt++; + return -ENOSYS; + } else { + DBG_871X("cmd: suspend with MMC_PM_KEEP_POWER\n"); +@@ -905,7 +923,7 @@ static int rtw_sdio_resume(struct device *dev) + struct sdio_func *func =dev_to_sdio_func(dev); + struct dvobj_priv *psdpriv = sdio_get_drvdata(func); + struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(psdpriv); +- _adapter *padapter = psdpriv->if1; ++ _adapter *padapter = psdpriv->padapters[IFACE_ID0]; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + int ret = 0; + struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; +@@ -955,7 +973,7 @@ static int rtw_sdio_resume(struct device *dev) + + } + +-static int rtw_drv_entry(void) ++static int __init rtw_drv_entry(void) + { + int ret = 0; + +@@ -1002,7 +1020,7 @@ exit: + return ret; + } + +-static void rtw_drv_halt(void) ++static void __exit rtw_drv_halt(void) + { + DBG_871X_LEVEL(_drv_always_, "module exit start\n"); + +@@ -1038,54 +1056,6 @@ int rtw_sdio_set_power(int on) + } + #endif //CONFIG_PLATFORM_INTEL_BYT + +-#include "wifi_version.h" +-#include +-extern int rockchip_wifi_power(int on); +-extern int rockchip_wifi_set_carddetect(int val); +-extern int get_wifi_chip_type(void); +- +-int rockchip_wifi_init_module_rtkwifi(void) +-{ +-#ifdef CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP +- int type = get_wifi_chip_type(); +- if (type < WIFI_AP6XXX_SERIES || type == WIFI_ESP8089) return 0; +-#endif +- printk("\n"); +- printk("=======================================================\n"); +- printk("==== Launching Wi-Fi driver! (Powered by Rockchip) ====\n"); +- printk("=======================================================\n"); +- printk("Realtek 8723BS SDIO WiFi driver (Powered by Rockchip,Ver %s) init.\n", RTL8723BS_DRV_VERSION); +- +- rockchip_wifi_power(1); +- rockchip_wifi_set_carddetect(1); +- return rtw_drv_entry(); +-} +- +-void rockchip_wifi_exit_module_rtkwifi(void) +-{ +-#ifdef CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP +- int type = get_wifi_chip_type(); +- if (type < WIFI_AP6XXX_SERIES || type == WIFI_ESP8089) return; +-#endif +- printk("\n"); +- printk("=======================================================\n"); +- printk("==== Dislaunching Wi-Fi driver! (Powered by Rockchip) ====\n"); +- printk("=======================================================\n"); +- printk("Realtek 8723BS SDIO WiFi driver (Powered by Rockchip,Ver %s) init.\n", RTL8723BS_DRV_VERSION); +- +- rtw_drv_halt(); +- +- rockchip_wifi_set_carddetect(0); +- rockchip_wifi_power(0); +-} +- +-#ifdef CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP +-late_initcall(rockchip_wifi_init_module_rtkwifi); +-module_exit(rockchip_wifi_exit_module_rtkwifi); +-#else +-EXPORT_SYMBOL(rockchip_wifi_init_module_rtkwifi); +-EXPORT_SYMBOL(rockchip_wifi_exit_module_rtkwifi); +-#endif +-//module_init(rtw_drv_entry); +-//module_exit(rtw_drv_halt); ++module_init(rtw_drv_entry); ++module_exit(rtw_drv_halt); + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_ops_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_ops_linux.c +old mode 100755 +new mode 100644 +index bc91468..0ea81f1 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_ops_linux.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_ops_linux.c +@@ -53,7 +53,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return v; + } +@@ -88,7 +88,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return; + } +@@ -126,7 +126,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return err; + } +@@ -166,7 +166,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return err; + } +@@ -204,7 +204,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return err; + } +@@ -244,7 +244,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return err; + } +@@ -277,7 +277,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return v; + } +@@ -309,7 +309,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return v; + } +@@ -345,7 +345,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return v; + } +@@ -380,7 +380,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return v; + } +@@ -409,11 +409,11 @@ _func_enter_; + DBG_871X(KERN_ERR "%s: (%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); + if(( -ESHUTDOWN == *err ) || ( -ENODEV == *err)) + { +- padapter->bSurpriseRemoved = _TRUE; ++ rtw_set_surprise_removed(padapter); + } + + if(rtw_inc_and_chk_continual_io_error(psdiodev) == _TRUE ){ +- padapter->bSurpriseRemoved = _TRUE; ++ rtw_set_surprise_removed(padapter); + break; + } + +@@ -447,7 +447,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return v; + } +@@ -480,11 +480,11 @@ _func_enter_; + }else{ + DBG_871X(KERN_ERR "%s: (%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); + if(( -ESHUTDOWN == *err ) || ( -ENODEV == *err)){ +- padapter->bSurpriseRemoved = _TRUE; ++ rtw_set_surprise_removed(padapter); + } + + if(rtw_inc_and_chk_continual_io_error(psdiodev) == _TRUE ){ +- padapter->bSurpriseRemoved = _TRUE; ++ rtw_set_surprise_removed(padapter); + break; + } + } +@@ -517,7 +517,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return ; + } +@@ -550,7 +550,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return ; + } +@@ -582,7 +582,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return ; + } +@@ -607,11 +607,11 @@ _func_enter_; + }else{ + DBG_871X(KERN_ERR "%s: (%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); + if(( -ESHUTDOWN == *err ) || ( -ENODEV == *err)){ +- padapter->bSurpriseRemoved = _TRUE; ++ rtw_set_surprise_removed(padapter); + } + + if(rtw_inc_and_chk_continual_io_error(psdiodev) == _TRUE ){ +- padapter->bSurpriseRemoved = _TRUE; ++ rtw_set_surprise_removed(padapter); + break; + } + } +@@ -640,7 +640,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return ; + } +@@ -672,11 +672,11 @@ _func_enter_; + }else{ + DBG_871X(KERN_ERR "%s: (%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); + if(( -ESHUTDOWN == *err ) || ( -ENODEV == *err)){ +- padapter->bSurpriseRemoved = _TRUE; ++ rtw_set_surprise_removed(padapter); + } + + if(rtw_inc_and_chk_continual_io_error(psdiodev) == _TRUE ){ +- padapter->bSurpriseRemoved = _TRUE; ++ rtw_set_surprise_removed(padapter); + break; + } + } +@@ -720,7 +720,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return err; + } +@@ -782,7 +782,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return err; + } +@@ -828,7 +828,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return err; + } +@@ -891,7 +891,7 @@ _func_enter_; + psdiodev = pintfhdl->pintf_dev; + psdio = &psdiodev->intf_data; + +- if(padapter->bSurpriseRemoved){ ++ if (rtw_is_surprise_removed(padapter)) { + //DBG_871X(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); + return err; + } +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/wifi_regd.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/wifi_regd.c +old mode 100755 +new mode 100644 +index 04ffe78..154a28f +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/wifi_regd.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/wifi_regd.c +@@ -268,6 +268,7 @@ static void _rtw_reg_apply_radar_flags(struct wiphy *wiphy) + if (!_rtw_is_radar_freq(ch->center_freq)) + continue; + #ifdef CONFIG_DFS ++ #if defined(CONFIG_DFS_MASTER) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) + if (!(ch->flags & IEEE80211_CHAN_DISABLED)) { + ch->flags |= IEEE80211_CHAN_RADAR; + #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) +@@ -276,6 +277,7 @@ static void _rtw_reg_apply_radar_flags(struct wiphy *wiphy) + ch->flags |= IEEE80211_CHAN_NO_IR; + #endif + } ++ #endif + #endif //CONFIG_DFS + + #if 0 +@@ -298,26 +300,6 @@ static void _rtw_reg_apply_radar_flags(struct wiphy *wiphy) + } + } + +-static int rtw_ieee80211_channel_to_frequency(int chan, int band) +-{ +- /* see 802.11 17.3.8.3.2 and Annex J +- * there are overlapping channel numbers in 5GHz and 2GHz bands */ +- +- if (band == IEEE80211_BAND_5GHZ) { +- if (chan >= 182 && chan <= 196) +- return 4000 + chan * 5; +- else +- return 5000 + chan * 5; +- } else { /* IEEE80211_BAND_2GHZ */ +- if (chan == 14) +- return 2484; +- else if (chan < 14) +- return 2407 + chan * 5; +- else +- return 0; /* not supported */ +- } +-} +- + static void _rtw_reg_apply_flags(struct wiphy *wiphy) + { + #if 1 // by channel plan +@@ -350,20 +332,14 @@ static void _rtw_reg_apply_flags(struct wiphy *wiphy) + // channels apply by channel plans. + for (i = 0; i < max_chan_nums; i++) { + channel = channel_set[i].ChannelNum; +- if (channel <= 14) +- freq = +- rtw_ieee80211_channel_to_frequency(channel, +- IEEE80211_BAND_2GHZ); +- else +- freq = +- rtw_ieee80211_channel_to_frequency(channel, +- IEEE80211_BAND_5GHZ); +- ++ freq = rtw_ch2freq(channel); + + ch = ieee80211_get_channel(wiphy, freq); + if (ch) { + if (channel_set[i].ScanType == SCAN_PASSIVE) { +- #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) ++ #if defined(CONFIG_DFS_MASTER) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0)) ++ ch->flags = 0; ++ #elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0)) + ch->flags = (IEEE80211_CHAN_NO_IBSS|IEEE80211_CHAN_PASSIVE_SCAN); + #else + ch->flags = IEEE80211_CHAN_NO_IR; +@@ -402,14 +378,7 @@ static void _rtw_reg_apply_flags(struct wiphy *wiphy) + + for (i = 0; i < 37; i++) { + channel = channels[i]; +- if (channel <= 14) +- freq = +- rtw_ieee80211_channel_to_frequency(channel, +- IEEE80211_BAND_2GHZ); +- else +- freq = +- rtw_ieee80211_channel_to_frequency(channel, +- IEEE80211_BAND_5GHZ); ++ freq = rtw_ch2freq(channel); + + ch = ieee80211_get_channel(wiphy, freq); + if (ch) { +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/xmit_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/xmit_linux.c +old mode 100755 +new mode 100644 +index db9b311..1292699 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/xmit_linux.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/xmit_linux.c +@@ -424,7 +424,7 @@ int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb) + res = rtw_xmit(padapter, &newskb); + if (res < 0) { + DBG_COUNTER(padapter->tx_logs.os_tx_m2u_entry_err_xmit); +- DBG_871X("%s()-%d: rtw_xmit() return error!\n", __FUNCTION__, __LINE__); ++ DBG_871X("%s()-%d: rtw_xmit() return error! res=%d\n", __FUNCTION__, __LINE__, res); + pxmitpriv->tx_drop++; + rtw_skb_free(newskb); + } +@@ -527,11 +527,18 @@ _func_exit_; + + int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) + { ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + int ret = 0; + + if (pkt) { +- rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, pkt->truesize); +- ret = _rtw_xmit_entry(pkt, pnetdev); ++ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) == _TRUE) { ++ rtw_monitor_xmit_entry((struct sk_buff *)pkt, pnetdev); ++ } else { ++ rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, pkt->truesize); ++ ret = _rtw_xmit_entry(pkt, pnetdev); ++ } ++ + } + + return ret; +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/osdep_service.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/osdep_service.c +old mode 100755 +new mode 100644 +index dcef0e7..fa910bf +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/osdep_service.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/osdep_service.c +@@ -804,7 +804,7 @@ void rtw_mfree2d(void *pbuf, int h, int w, int size) + rtw_mfree((u8 *)pbuf, h*sizeof(void*) + w*h*size); + } + +-void _rtw_memcpy(void* dst, void* src, u32 sz) ++void _rtw_memcpy(void *dst, const void *src, u32 sz) + { + + #if defined (PLATFORM_LINUX)|| defined (PLATFORM_FREEBSD) +@@ -821,7 +821,16 @@ void _rtw_memcpy(void* dst, void* src, u32 sz) + + } + +-int _rtw_memcmp(void *dst, void *src, u32 sz) ++inline void _rtw_memmove(void *dst, const void *src, u32 sz) ++{ ++#if defined(PLATFORM_LINUX) ++ memmove(dst, src, sz); ++#else ++ #warning "no implementation\n" ++#endif ++} ++ ++int _rtw_memcmp(void *dst, const void *src, u32 sz) + { + + #if defined (PLATFORM_LINUX)|| defined (PLATFORM_FREEBSD) +@@ -1270,13 +1279,15 @@ void _rtw_spinunlock_ex(_lock *plock) + + + +-void _rtw_init_queue(_queue *pqueue) ++void _rtw_init_queue(_queue *pqueue) + { +- + _rtw_init_listhead(&(pqueue->queue)); +- + _rtw_spinlock_init(&(pqueue->lock)); ++} + ++void _rtw_deinit_queue(_queue *pqueue) ++{ ++ _rtw_spinlock_free(&(pqueue->lock)); + } + + u32 _rtw_queue_empty(_queue *pqueue) +@@ -1551,7 +1562,7 @@ void rtw_udelay_os(int us) + } + #endif + +-void rtw_yield_os() ++void rtw_yield_os(void) + { + #ifdef PLATFORM_LINUX + yield(); +@@ -1598,7 +1609,7 @@ static android_suspend_lock_t rtw_resume_scan_lock ={ + }; + #endif + +-inline void rtw_suspend_lock_init() ++inline void rtw_suspend_lock_init(void) + { + #ifdef CONFIG_WAKELOCK + wake_lock_init(&rtw_suspend_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_LOCK_NAME); +@@ -1617,7 +1628,7 @@ inline void rtw_suspend_lock_init() + #endif + } + +-inline void rtw_suspend_lock_uninit() ++inline void rtw_suspend_lock_uninit(void) + { + #ifdef CONFIG_WAKELOCK + wake_lock_destroy(&rtw_suspend_lock); +@@ -2051,7 +2062,7 @@ int rtw_is_file_readable(char *path) + * @param sz how many bytes to read at most + * @return the byte we've read + */ +-int rtw_retrive_from_file(char *path, u8* buf, u32 sz) ++int rtw_retrieve_from_file(char *path, u8 *buf, u32 sz) + { + #ifdef PLATFORM_LINUX + int ret =retriveFromFile(path, buf, sz); +@@ -2141,7 +2152,6 @@ void rtw_free_netdev(struct net_device * netdev) + if(!pnpi->priv) + goto RETURN; + +- rtw_vmfree(pnpi->priv, pnpi->sizeof_priv); + free_netdev(netdev); + + RETURN: +@@ -2190,7 +2200,7 @@ int rtw_change_ifname(_adapter *padapter, const char *ifname) + + rtw_init_netdev_name(pnetdev, ifname); + +- _rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ _rtw_memcpy(pnetdev->dev_addr, adapter_mac_addr(padapter), ETH_ALEN); + + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) + if(!rtnl_is_locked()) +@@ -2476,3 +2486,41 @@ void rtw_cbuf_free(struct rtw_cbuf *cbuf) + rtw_mfree((u8*)cbuf, sizeof(*cbuf) + sizeof(void*)*cbuf->size); + } + ++/** ++* IsHexDigit - ++* ++* Return TRUE if chTmp is represent for hex digit ++* FALSE otherwise. ++*/ ++inline BOOLEAN IsHexDigit(char chTmp) ++{ ++ if ((chTmp >= '0' && chTmp <= '9') || ++ (chTmp >= 'a' && chTmp <= 'f') || ++ (chTmp >= 'A' && chTmp <= 'F')) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++ ++/** ++* is_alpha - ++* ++* Return TRUE if chTmp is represent for alphabet ++* FALSE otherwise. ++*/ ++inline BOOLEAN is_alpha(char chTmp) ++{ ++ if ((chTmp >= 'a' && chTmp <= 'z') || ++ (chTmp >= 'A' && chTmp <= 'Z')) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++ ++inline char alpha_to_upper(char c) ++{ ++ if ((c >= 'a' && c <= 'z')) ++ c = 'A' + (c - 'a'); ++ return c; ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/custom_country_chplan.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/custom_country_chplan.h +new file mode 100644 +index 0000000..a9b7146 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/custom_country_chplan.h +@@ -0,0 +1,29 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#error "You have defined CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP to use a customized map of your own instead of the default one" ++#error "Before removing these error notifications, please make sure regulatory certification requirements of your target markets" ++ ++static const struct country_chplan CUSTOMIZED_country_chplan_map[] = { ++ COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0xFF), /* Taiwan */ ++}; ++ ++static const u16 CUSTOMIZED_country_chplan_map_sz = sizeof(CUSTOMIZED_country_chplan_map)/sizeof(struct country_chplan); ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUN50IW1P1_sdio.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUN50IW1P1_sdio.c +new file mode 100644 +index 0000000..8e78cce +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUN50IW1P1_sdio.c +@@ -0,0 +1,91 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/* ++ * Description: ++ * This file can be applied to following platforms: ++ * CONFIG_PLATFORM_ARM_SUN50IW1P1 ++ */ ++#include ++#ifdef CONFIG_GPIO_WAKEUP ++#include ++#endif ++ ++#ifdef CONFIG_MMC ++#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) ++extern void sunxi_mmc_rescan_card(unsigned ids); ++extern void sunxi_wlan_set_power(int on); ++extern int sunxi_wlan_get_bus_index(void); ++extern int sunxi_wlan_get_oob_irq(void); ++extern int sunxi_wlan_get_oob_irq_flags(void); ++#endif ++#ifdef CONFIG_GPIO_WAKEUP ++extern unsigned int oob_irq; ++#endif ++#endif // CONFIG_MMC ++ ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_MMC ++{ ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) ++ int wlan_bus_index = sunxi_wlan_get_bus_index(); ++ if(wlan_bus_index < 0) ++ return wlan_bus_index; ++ ++ sunxi_wlan_set_power(1); ++ mdelay(100); ++ sunxi_mmc_rescan_card(wlan_bus_index); ++#endif ++ DBG_871X("%s: power up, rescan card.\n", __FUNCTION__); ++ ++#ifdef CONFIG_GPIO_WAKEUP ++#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) ++ oob_irq = sunxi_wlan_get_oob_irq(); ++#endif ++#endif // CONFIG_GPIO_WAKEUP ++} ++#endif // CONFIG_MMC ++ ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++#ifdef CONFIG_MMC ++#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) ++ int wlan_bus_index = sunxi_wlan_get_bus_index(); ++ if(wlan_bus_index < 0) ++ return; ++ ++ sunxi_mmc_rescan_card(wlan_bus_index); ++ mdelay(100); ++ sunxi_wlan_set_power(0); ++#endif ++ DBG_871X("%s: remove card, power off.\n", __FUNCTION__); ++#endif // CONFIG_MMC ++} +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNnI_sdio.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNnI_sdio.c +old mode 100755 +new mode 100644 +index d384141..5484415 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNnI_sdio.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNnI_sdio.c +@@ -1,120 +1,135 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-/* +- * Description: +- * This file can be applied to following platforms: +- * CONFIG_PLATFORM_ARM_SUN6I +- * CONFIG_PLATFORM_ARM_SUN7I +- * CONFIG_PLATFORM_ARM_SUN8I +- */ +-#include +-#include +-#ifdef CONFIG_GPIO_WAKEUP +-#include +-#endif +- +-#ifdef CONFIG_MMC +-static int sdc_id = -1; +-static signed int gpio_eint_wlan = -1; +-static u32 eint_wlan_handle = 0; +-#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) +-extern void sw_mci_rescan_card(unsigned id, unsigned insert); +-#elif defined(CONFIG_PLATFORM_ARM_SUN8I) +-extern void sunxi_mci_rescan_card(unsigned id, unsigned insert); +-#endif +-extern int wifi_pm_get_mod_type(void); +-extern void wifi_pm_power(int on); +-#ifdef CONFIG_GPIO_WAKEUP +-extern unsigned int oob_irq; +-#endif +-#endif // CONFIG_MMC +- +-/* +- * Return: +- * 0: power on successfully +- * others: power on failed +- */ +-int platform_wifi_power_on(void) +-{ +- int ret = 0; +- +-#ifdef CONFIG_MMC +-{ +- script_item_u val; +- script_item_value_type_e type; +- +- unsigned int mod_sel = wifi_pm_get_mod_type(); +- +- type = script_get_item("wifi_para", "wifi_sdc_id", &val); +- if (SCIRPT_ITEM_VALUE_TYPE_INT!=type) { +- DBG_871X("get wifi_sdc_id failed\n"); +- ret = -1; +- } else { +- sdc_id = val.val; +- DBG_871X("----- %s sdc_id: %d, mod_sel: %d\n", __FUNCTION__, sdc_id, mod_sel); +- +-#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) +- sw_mci_rescan_card(sdc_id, 1); +-#elif defined(CONFIG_PLATFORM_ARM_SUN8I) +- sunxi_mci_rescan_card(sdc_id, 1); +-#endif +- mdelay(100); +- wifi_pm_power(1); +- +- DBG_871X("%s: power up, rescan card.\n", __FUNCTION__); +- } +- +-#ifdef CONFIG_GPIO_WAKEUP +-#ifdef CONFIG_RTL8723B +- type = script_get_item("wifi_para", "rtl8723bs_wl_host_wake", &val); +-#endif +-#ifdef CONFIG_RTL8188E +- type = script_get_item("wifi_para", "rtl8189es_host_wake", &val); +-#endif +- if (SCIRPT_ITEM_VALUE_TYPE_PIO != type) { +- DBG_871X("No definition of wake up host PIN\n"); +- ret = -1; +- } else { +- gpio_eint_wlan = val.gpio.gpio; +-#ifdef CONFIG_PLATFORM_ARM_SUN8I +- oob_irq = gpio_to_irq(gpio_eint_wlan); +-#endif +- } +-#endif // CONFIG_GPIO_WAKEUP +-} +-#endif // CONFIG_MMC +- +- return ret; +-} +- +-void platform_wifi_power_off(void) +-{ +-#ifdef CONFIG_MMC +-#if defined(CONFIG_PLATFORM_ARM_SUN6I) ||defined(CONFIG_PLATFORM_ARM_SUN7I) +- sw_mci_rescan_card(sdc_id, 0); +-#elif defined(CONFIG_PLATFORM_ARM_SUN8I) +- sunxi_mci_rescan_card(sdc_id, 0); +-#endif +- mdelay(100); +- wifi_pm_power(0); +- +- DBG_871X("%s: remove card, power off.\n", __FUNCTION__); +-#endif // CONFIG_MMC +-} ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/* ++ * Description: ++ * This file can be applied to following platforms: ++ * CONFIG_PLATFORM_ARM_SUN6I ++ * CONFIG_PLATFORM_ARM_SUN7I ++ * CONFIG_PLATFORM_ARM_SUN8I ++ */ ++#include ++#include ++#ifdef CONFIG_GPIO_WAKEUP ++#include ++#endif ++ ++#ifdef CONFIG_MMC ++static int sdc_id = -1; ++static signed int gpio_eint_wlan = -1; ++static u32 eint_wlan_handle = 0; ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++extern void sw_mci_rescan_card(unsigned id, unsigned insert); ++#elif defined(CONFIG_PLATFORM_ARM_SUN8I) ++extern void sunxi_mci_rescan_card(unsigned id, unsigned insert); ++#endif ++ ++#ifdef CONFIG_PLATFORM_ARM_SUN8I_W5P1 ++extern int get_rf_mod_type(void); ++#else ++extern int wifi_pm_get_mod_type(void); ++#endif ++ ++extern void wifi_pm_power(int on); ++#ifdef CONFIG_GPIO_WAKEUP ++extern unsigned int oob_irq; ++#endif ++#endif // CONFIG_MMC ++ ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_MMC ++{ ++ script_item_u val; ++ script_item_value_type_e type; ++ ++#ifdef CONFIG_PLATFORM_ARM_SUN8I_W5P1 ++ unsigned int mod_sel = get_rf_mod_type(); ++#else ++ unsigned int mod_sel = wifi_pm_get_mod_type(); ++#endif ++ ++ type = script_get_item("wifi_para", "wifi_sdc_id", &val); ++ if (SCIRPT_ITEM_VALUE_TYPE_INT!=type) { ++ DBG_871X("get wifi_sdc_id failed\n"); ++ ret = -1; ++ } else { ++ sdc_id = val.val; ++ DBG_871X("----- %s sdc_id: %d, mod_sel: %d\n", __FUNCTION__, sdc_id, mod_sel); ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++ sw_mci_rescan_card(sdc_id, 1); ++#elif defined(CONFIG_PLATFORM_ARM_SUN8I) ++ sunxi_mci_rescan_card(sdc_id, 1); ++#endif ++ mdelay(100); ++ wifi_pm_power(1); ++ ++ DBG_871X("%s: power up, rescan card.\n", __FUNCTION__); ++ } ++ ++#ifdef CONFIG_GPIO_WAKEUP ++#ifdef CONFIG_PLATFORM_ARM_SUN8I_W5P1 ++ type = script_get_item("wifi_para", "wl_host_wake", &val); ++#else ++#ifdef CONFIG_RTL8723B ++ type = script_get_item("wifi_para", "rtl8723bs_wl_host_wake", &val); ++#endif ++#ifdef CONFIG_RTL8188E ++ type = script_get_item("wifi_para", "rtl8189es_host_wake", &val); ++#endif ++#endif /* CONFIG_PLATFORM_ARM_SUN8I_W5P1 */ ++ if (SCIRPT_ITEM_VALUE_TYPE_PIO != type) { ++ DBG_871X("No definition of wake up host PIN\n"); ++ ret = -1; ++ } else { ++ gpio_eint_wlan = val.gpio.gpio; ++#ifdef CONFIG_PLATFORM_ARM_SUN8I ++ oob_irq = gpio_to_irq(gpio_eint_wlan); ++#endif ++ } ++#endif // CONFIG_GPIO_WAKEUP ++} ++#endif // CONFIG_MMC ++ ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++#ifdef CONFIG_MMC ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) ||defined(CONFIG_PLATFORM_ARM_SUN7I) ++ sw_mci_rescan_card(sdc_id, 0); ++#elif defined(CONFIG_PLATFORM_ARM_SUN8I) ++ sunxi_mci_rescan_card(sdc_id, 0); ++#endif ++ mdelay(100); ++ wifi_pm_power(0); ++ ++ DBG_871X("%s: remove card, power off.\n", __FUNCTION__); ++#endif // CONFIG_MMC ++} +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNxI_sdio.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNxI_sdio.c +old mode 100755 +new mode 100644 +index 5bc888d..770f935 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNxI_sdio.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNxI_sdio.c +@@ -1,95 +1,95 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#include +- +-#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL +-#ifdef CONFIG_WITS_EVB_V13 +-#define SDIOID 0 +-#else // !CONFIG_WITS_EVB_V13 +-#define SDIOID (CONFIG_CHIP_ID==1123 ? 3 : 1) +-#endif // !CONFIG_WITS_EVB_V13 +- +-#define SUNXI_SDIO_WIFI_NUM_RTL8189ES 10 +-extern void sunximmc_rescan_card(unsigned id, unsigned insert); +-extern int mmc_pm_get_mod_type(void); +-extern int mmc_pm_gpio_ctrl(char* name, int level); +-/* +- * rtl8189es_shdn = port:PH09<1><0> +- * rtl8189es_wakeup = port:PH10<1><1> +- * rtl8189es_vdd_en = port:PH11<1><0> +- * rtl8189es_vcc_en = port:PH12<1><0> +- */ +- +-int rtl8189es_sdio_powerup(void) +-{ +- mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 1); +- udelay(100); +- mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 1); +- udelay(50); +- mmc_pm_gpio_ctrl("rtl8189es_shdn", 1); +- return 0; +-} +- +-int rtl8189es_sdio_poweroff(void) +-{ +- mmc_pm_gpio_ctrl("rtl8189es_shdn", 0); +- mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 0); +- mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 0); +- return 0; +-} +-#endif // CONFIG_MMC_SUNXI_POWER_CONTROL +- +-/* +- * Return: +- * 0: power on successfully +- * others: power on failed +- */ +-int platform_wifi_power_on(void) +-{ +- int ret = 0; +-#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL +- unsigned int mod_sel = mmc_pm_get_mod_type(); +-#endif // CONFIG_MMC_SUNXI_POWER_CONTROL +- +- +-#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL +- if (mod_sel == SUNXI_SDIO_WIFI_NUM_RTL8189ES) { +- rtl8189es_sdio_powerup(); +- sunximmc_rescan_card(SDIOID, 1); +- printk("[rtl8189es] %s: power up, rescan card.\n", __FUNCTION__); +- } else { +- ret = -1; +- printk("[rtl8189es] %s: mod_sel = %d is incorrect.\n", __FUNCTION__, mod_sel); +- } +-#endif // CONFIG_MMC_SUNXI_POWER_CONTROL +- +- return ret; +-} +- +-void platform_wifi_power_off(void) +-{ +-#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL +- sunximmc_rescan_card(SDIOID, 0); +-#ifdef CONFIG_RTL8188E +- rtl8189es_sdio_poweroff(); +- printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); +-#endif // CONFIG_RTL8188E +-#endif // CONFIG_MMC_SUNXI_POWER_CONTROL +-} ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include ++ ++#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL ++#ifdef CONFIG_WITS_EVB_V13 ++#define SDIOID 0 ++#else // !CONFIG_WITS_EVB_V13 ++#define SDIOID (CONFIG_CHIP_ID==1123 ? 3 : 1) ++#endif // !CONFIG_WITS_EVB_V13 ++ ++#define SUNXI_SDIO_WIFI_NUM_RTL8189ES 10 ++extern void sunximmc_rescan_card(unsigned id, unsigned insert); ++extern int mmc_pm_get_mod_type(void); ++extern int mmc_pm_gpio_ctrl(char* name, int level); ++/* ++ * rtl8189es_shdn = port:PH09<1><0> ++ * rtl8189es_wakeup = port:PH10<1><1> ++ * rtl8189es_vdd_en = port:PH11<1><0> ++ * rtl8189es_vcc_en = port:PH12<1><0> ++ */ ++ ++int rtl8189es_sdio_powerup(void) ++{ ++ mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 1); ++ udelay(100); ++ mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 1); ++ udelay(50); ++ mmc_pm_gpio_ctrl("rtl8189es_shdn", 1); ++ return 0; ++} ++ ++int rtl8189es_sdio_poweroff(void) ++{ ++ mmc_pm_gpio_ctrl("rtl8189es_shdn", 0); ++ mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 0); ++ mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 0); ++ return 0; ++} ++#endif // CONFIG_MMC_SUNXI_POWER_CONTROL ++ ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL ++ unsigned int mod_sel = mmc_pm_get_mod_type(); ++#endif // CONFIG_MMC_SUNXI_POWER_CONTROL ++ ++ ++#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL ++ if (mod_sel == SUNXI_SDIO_WIFI_NUM_RTL8189ES) { ++ rtl8189es_sdio_powerup(); ++ sunximmc_rescan_card(SDIOID, 1); ++ printk("[rtl8189es] %s: power up, rescan card.\n", __FUNCTION__); ++ } else { ++ ret = -1; ++ printk("[rtl8189es] %s: mod_sel = %d is incorrect.\n", __FUNCTION__, mod_sel); ++ } ++#endif // CONFIG_MMC_SUNXI_POWER_CONTROL ++ ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL ++ sunximmc_rescan_card(SDIOID, 0); ++#ifdef CONFIG_RTL8188E ++ rtl8189es_sdio_poweroff(); ++ printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); ++#endif // CONFIG_RTL8188E ++#endif // CONFIG_MMC_SUNXI_POWER_CONTROL ++} +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNxI_usb.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNxI_usb.c +old mode 100755 +new mode 100644 +index 5352313..774392b +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNxI_usb.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_SUNxI_usb.c +@@ -1,142 +1,142 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-/* +- * Description: +- * This file can be applied to following platforms: +- * CONFIG_PLATFORM_ARM_SUNXI Series platform +- * +- */ +- +-#include +-#include +- +-#ifdef CONFIG_PLATFORM_ARM_SUNxI +-extern int sw_usb_disable_hcd(__u32 usbc_no); +-extern int sw_usb_enable_hcd(__u32 usbc_no); +-static int usb_wifi_host = 2; +-#endif +- +-#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) +-extern int sw_usb_disable_hcd(__u32 usbc_no); +-extern int sw_usb_enable_hcd(__u32 usbc_no); +-extern void wifi_pm_power(int on); +-static script_item_u item; +-#endif +- +-#ifdef CONFIG_PLATFORM_ARM_SUN8I +-extern int sunxi_usb_disable_hcd(__u32 usbc_no); +-extern int sunxi_usb_enable_hcd(__u32 usbc_no); +-extern void wifi_pm_power(int on); +-static script_item_u item; +-#endif +- +- +-int platform_wifi_power_on(void) +-{ +- int ret = 0; +- +-#ifdef CONFIG_PLATFORM_ARM_SUNxI +-#ifndef CONFIG_RTL8723A +- { +- /* ----------get usb_wifi_usbc_num------------- */ +- ret = script_parser_fetch("usb_wifi_para", "usb_wifi_usbc_num", (int *)&usb_wifi_host, 64); +- if(ret != 0){ +- DBG_8192C("ERR: script_parser_fetch usb_wifi_usbc_num failed\n"); +- ret = -ENOMEM; +- goto exit; +- } +- DBG_8192C("sw_usb_enable_hcd: usbc_num = %d\n", usb_wifi_host); +- sw_usb_enable_hcd(usb_wifi_host); +- } +-#endif //CONFIG_RTL8723A +-#endif //CONFIG_PLATFORM_ARM_SUNxI +- +-#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) +- { +- script_item_value_type_e type; +- +- type = script_get_item("wifi_para", "wifi_usbc_id", &item); +- if(SCIRPT_ITEM_VALUE_TYPE_INT != type){ +- printk("ERR: script_get_item wifi_usbc_id failed\n"); +- ret = -ENOMEM; +- goto exit; +- } +- +- printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); +- wifi_pm_power(1); +- mdelay(10); +- +- #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) +- sw_usb_enable_hcd(item.val); +- #endif +- } +-#endif //defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) +- +-#if defined(CONFIG_PLATFORM_ARM_SUN8I) +- { +- script_item_value_type_e type; +- +- type = script_get_item("wifi_para", "wifi_usbc_id", &item); +- if(SCIRPT_ITEM_VALUE_TYPE_INT != type){ +- printk("ERR: script_get_item wifi_usbc_id failed\n"); +- ret = -ENOMEM; +- goto exit; +- } +- +- printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); +- wifi_pm_power(1); +- mdelay(10); +- +- #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) +- sunxi_usb_enable_hcd(item.val); +- #endif +- } +-#endif //CONFIG_PLATFORM_ARM_SUN8I +- +-exit: +- return ret; +-} +- +-void platform_wifi_power_off(void) +-{ +- +-#ifdef CONFIG_PLATFORM_ARM_SUNxI +-#ifndef CONFIG_RTL8723A +- DBG_8192C("sw_usb_disable_hcd: usbc_num = %d\n", usb_wifi_host); +- sw_usb_disable_hcd(usb_wifi_host); +-#endif //ifndef CONFIG_RTL8723A +-#endif //CONFIG_PLATFORM_ARM_SUNxI +- +-#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) +- #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) +- sw_usb_disable_hcd(item.val); +- #endif +- wifi_pm_power(0); +-#endif //defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) +- +-#if defined(CONFIG_PLATFORM_ARM_SUN8I) +- #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) +- sunxi_usb_disable_hcd(item.val); +- #endif +- wifi_pm_power(0); +-#endif //defined(CONFIG_PLATFORM_ARM_SUN8I) +- +-} +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/* ++ * Description: ++ * This file can be applied to following platforms: ++ * CONFIG_PLATFORM_ARM_SUNXI Series platform ++ * ++ */ ++ ++#include ++#include ++ ++#ifdef CONFIG_PLATFORM_ARM_SUNxI ++extern int sw_usb_disable_hcd(__u32 usbc_no); ++extern int sw_usb_enable_hcd(__u32 usbc_no); ++static int usb_wifi_host = 2; ++#endif ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++extern int sw_usb_disable_hcd(__u32 usbc_no); ++extern int sw_usb_enable_hcd(__u32 usbc_no); ++extern void wifi_pm_power(int on); ++static script_item_u item; ++#endif ++ ++#ifdef CONFIG_PLATFORM_ARM_SUN8I ++extern int sunxi_usb_disable_hcd(__u32 usbc_no); ++extern int sunxi_usb_enable_hcd(__u32 usbc_no); ++extern void wifi_pm_power(int on); ++static script_item_u item; ++#endif ++ ++ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_PLATFORM_ARM_SUNxI ++#ifndef CONFIG_RTL8723A ++ { ++ /* ----------get usb_wifi_usbc_num------------- */ ++ ret = script_parser_fetch("usb_wifi_para", "usb_wifi_usbc_num", (int *)&usb_wifi_host, 64); ++ if(ret != 0){ ++ DBG_8192C("ERR: script_parser_fetch usb_wifi_usbc_num failed\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ DBG_8192C("sw_usb_enable_hcd: usbc_num = %d\n", usb_wifi_host); ++ sw_usb_enable_hcd(usb_wifi_host); ++ } ++#endif //CONFIG_RTL8723A ++#endif //CONFIG_PLATFORM_ARM_SUNxI ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++ { ++ script_item_value_type_e type; ++ ++ type = script_get_item("wifi_para", "wifi_usbc_id", &item); ++ if(SCIRPT_ITEM_VALUE_TYPE_INT != type){ ++ printk("ERR: script_get_item wifi_usbc_id failed\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); ++ wifi_pm_power(1); ++ mdelay(10); ++ ++ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) ++ sw_usb_enable_hcd(item.val); ++ #endif ++ } ++#endif //defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN8I) ++ { ++ script_item_value_type_e type; ++ ++ type = script_get_item("wifi_para", "wifi_usbc_id", &item); ++ if(SCIRPT_ITEM_VALUE_TYPE_INT != type){ ++ printk("ERR: script_get_item wifi_usbc_id failed\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); ++ wifi_pm_power(1); ++ mdelay(10); ++ ++ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) ++ sunxi_usb_enable_hcd(item.val); ++ #endif ++ } ++#endif //CONFIG_PLATFORM_ARM_SUN8I ++ ++exit: ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++ ++#ifdef CONFIG_PLATFORM_ARM_SUNxI ++#ifndef CONFIG_RTL8723A ++ DBG_8192C("sw_usb_disable_hcd: usbc_num = %d\n", usb_wifi_host); ++ sw_usb_disable_hcd(usb_wifi_host); ++#endif //ifndef CONFIG_RTL8723A ++#endif //CONFIG_PLATFORM_ARM_SUNxI ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) ++ sw_usb_disable_hcd(item.val); ++ #endif ++ wifi_pm_power(0); ++#endif //defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) ++ ++#if defined(CONFIG_PLATFORM_ARM_SUN8I) ++ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) ++ sunxi_usb_disable_hcd(item.val); ++ #endif ++ wifi_pm_power(0); ++#endif //defined(CONFIG_PLATFORM_ARM_SUN8I) ++ ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_WMT_sdio.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_WMT_sdio.c +old mode 100755 +new mode 100644 +index 62e5825..e994ea5 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_WMT_sdio.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ARM_WMT_sdio.c +@@ -1,51 +1,51 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#include +-#include +-#include +- +-extern void wmt_detect_sdio2(void); +-extern void force_remove_sdio2(void); +- +-int platform_wifi_power_on(void) +-{ +- int err = 0; +- err = gpio_request(WMT_PIN_GP62_SUSGPIO1, "wifi_chip_en"); +- if (err < 0){ +- printk("request gpio for rtl8188eu failed!\n"); +- return err; +- } +- gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 0);//pull sus_gpio1 to 0 to open vcc_wifi. +- printk("power on rtl8189.\n"); +- msleep(500); +- wmt_detect_sdio2(); +- printk("[rtl8189es] %s: new card, power on.\n", __FUNCTION__); +- return err; +-} +- +-void platform_wifi_power_off(void) +-{ +- force_remove_sdio2(); +- +- gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 1);//pull sus_gpio1 to 1 to close vcc_wifi. +- printk("power off rtl8189.\n"); +- gpio_free(WMT_PIN_GP62_SUSGPIO1); +- printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); +-} ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include ++#include ++#include ++ ++extern void wmt_detect_sdio2(void); ++extern void force_remove_sdio2(void); ++ ++int platform_wifi_power_on(void) ++{ ++ int err = 0; ++ err = gpio_request(WMT_PIN_GP62_SUSGPIO1, "wifi_chip_en"); ++ if (err < 0){ ++ printk("request gpio for rtl8188eu failed!\n"); ++ return err; ++ } ++ gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 0);//pull sus_gpio1 to 0 to open vcc_wifi. ++ printk("power on rtl8189.\n"); ++ msleep(500); ++ wmt_detect_sdio2(); ++ printk("[rtl8189es] %s: new card, power on.\n", __FUNCTION__); ++ return err; ++} ++ ++void platform_wifi_power_off(void) ++{ ++ force_remove_sdio2(); ++ ++ gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 1);//pull sus_gpio1 to 1 to close vcc_wifi. ++ printk("power off rtl8189.\n"); ++ gpio_free(WMT_PIN_GP62_SUSGPIO1); ++ printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); ++} +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_RTK_DMP_usb.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_RTK_DMP_usb.c +old mode 100755 +new mode 100644 +index 5331433..d296641 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_RTK_DMP_usb.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_RTK_DMP_usb.c +@@ -1,36 +1,36 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#include +- +-int platform_wifi_power_on(void) +-{ +- int ret = 0; +- u32 tmp; +- tmp=readl((volatile unsigned int*)0xb801a608); +- tmp &= 0xffffff00; +- tmp |= 0x55; +- writel(tmp,(volatile unsigned int*)0xb801a608);//write dummy register for 1055 +- return ret; +-} +- +-void platform_wifi_power_off(void) +-{ +-} +- ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include ++ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ u32 tmp; ++ tmp=readl((volatile unsigned int*)0xb801a608); ++ tmp &= 0xffffff00; ++ tmp |= 0x55; ++ writel(tmp,(volatile unsigned int*)0xb801a608);//write dummy register for 1055 ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++} ++ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_arm_act_sdio.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_arm_act_sdio.c +new file mode 100644 +index 0000000..539bb17 +--- /dev/null ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_arm_act_sdio.c +@@ -0,0 +1,58 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/* ++ * Description: ++ * This file can be applied to following platforms: ++ * CONFIG_PLATFORM_ACTIONS_ATM703X ++ */ ++#include ++ ++#ifdef CONFIG_PLATFORM_ACTIONS_ATM705X ++extern int acts_wifi_init(void); ++extern void acts_wifi_cleanup(void); ++#endif ++ ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_PLATFORM_ACTIONS_ATM705X ++ ret = acts_wifi_init(); ++ if (unlikely(ret < 0)) { ++ pr_err("%s Failed to register the power control driver.\n", __FUNCTION__); ++ goto exit; ++ } ++#endif ++ ++exit: ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++#ifdef CONFIG_PLATFORM_ACTIONS_ATM705X ++ acts_wifi_cleanup(); ++#endif ++} +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ops.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ops.c +old mode 100755 +new mode 100644 +index e9b0191..cd2f4e5 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ops.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ops.c +@@ -1,37 +1,37 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef CONFIG_PLATFORM_OPS +-/* +- * Return: +- * 0: power on successfully +- * others: power on failed +- */ +-int platform_wifi_power_on(void) +-{ +- int ret = 0; +- +- +- return ret; +-} +- +-void platform_wifi_power_off(void) +-{ +-} +-#endif // !CONFIG_PLATFORM_OPS ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef CONFIG_PLATFORM_OPS ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ ++ ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++} ++#endif // !CONFIG_PLATFORM_OPS +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ops.h b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ops.h +old mode 100755 +new mode 100644 +index bd2e668..7b66f44 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ops.h ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_ops.h +@@ -1,31 +1,31 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#ifndef __PLATFORM_OPS_H__ +-#define __PLATFORM_OPS_H__ +- +-/* +- * Return: +- * 0: power on successfully +- * others: power on failed +- */ +-int platform_wifi_power_on(void); +-void platform_wifi_power_off(void); +- +-#endif // __PLATFORM_OPS_H__ ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __PLATFORM_OPS_H__ ++#define __PLATFORM_OPS_H__ ++ ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void); ++void platform_wifi_power_off(void); ++ ++#endif // __PLATFORM_OPS_H__ +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_sprd_sdio.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_sprd_sdio.c +old mode 100755 +new mode 100644 +index a4e2502..eec8945 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_sprd_sdio.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/platform/platform_sprd_sdio.c +@@ -1,89 +1,89 @@ +-/****************************************************************************** +- * +- * Copyright(c) 2013 Realtek Corporation. All rights reserved. +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but WITHOUT +- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +- * more details. +- * +- * You should have received a copy of the GNU General Public License along with +- * this program; if not, write to the Free Software Foundation, Inc., +- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +- * +- * +- ******************************************************************************/ +-#include +- +-extern void sdhci_bus_scan(void); +-#ifndef ANDROID_2X +-extern int sdhci_device_attached(void); +-#endif +- +-/* +- * Return: +- * 0: power on successfully +- * others: power on failed +- */ +-int platform_wifi_power_on(void) +-{ +- int ret = 0; +- +- +-#ifdef CONFIG_RTL8188E +- rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_ON); +-#endif // CONFIG_RTL8188E +- +- /* Pull up pwd pin, make wifi leave power down mode. */ +- rtw_wifi_gpio_init(); +- rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_ON); +- +-#if (MP_DRIVER == 1) && (defined(CONFIG_RTL8723A)||defined(CONFIG_RTL8723B)) +- // Pull up BT reset pin. +- rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON); +-#endif +- rtw_mdelay_os(5); +- +- sdhci_bus_scan(); +-#ifdef CONFIG_RTL8723B +- //YJ,test,130305 +- rtw_mdelay_os(1000); +-#endif +-#ifdef ANDROID_2X +- rtw_mdelay_os(200); +-#else // !ANDROID_2X +- if (1) { +- int i = 0; +- +- for (i = 0; i <= 50; i++) { +- msleep(10); +- if (sdhci_device_attached()) +- break; +- printk("%s delay times:%d\n", __func__, i); +- } +- } +-#endif // !ANDROID_2X +- +- return ret; +-} +- +-void platform_wifi_power_off(void) +-{ +- /* Pull down pwd pin, make wifi enter power down mode. */ +- rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_OFF); +- rtw_mdelay_os(5); +- rtw_wifi_gpio_deinit(); +- +-#ifdef CONFIG_RTL8188E +- rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_OFF); +-#endif // CONFIG_RTL8188E +- +-#ifdef CONFIG_WOWLAN +- if(mmc_host) +- mmc_host->pm_flags &= ~MMC_PM_KEEP_POWER; +-#endif // CONFIG_WOWLAN +-} ++/****************************************************************************** ++ * ++ * Copyright(c) 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include ++ ++extern void sdhci_bus_scan(void); ++#ifndef ANDROID_2X ++extern int sdhci_device_attached(void); ++#endif ++ ++/* ++ * Return: ++ * 0: power on successfully ++ * others: power on failed ++ */ ++int platform_wifi_power_on(void) ++{ ++ int ret = 0; ++ ++ ++#ifdef CONFIG_RTL8188E ++ rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_ON); ++#endif // CONFIG_RTL8188E ++ ++ /* Pull up pwd pin, make wifi leave power down mode. */ ++ rtw_wifi_gpio_init(); ++ rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_ON); ++ ++#if (MP_DRIVER == 1) && (defined(CONFIG_RTL8723A)||defined(CONFIG_RTL8723B)) ++ // Pull up BT reset pin. ++ rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON); ++#endif ++ rtw_mdelay_os(5); ++ ++ sdhci_bus_scan(); ++#ifdef CONFIG_RTL8723B ++ //YJ,test,130305 ++ rtw_mdelay_os(1000); ++#endif ++#ifdef ANDROID_2X ++ rtw_mdelay_os(200); ++#else // !ANDROID_2X ++ if (1) { ++ int i = 0; ++ ++ for (i = 0; i <= 50; i++) { ++ msleep(10); ++ if (sdhci_device_attached()) ++ break; ++ printk("%s delay times:%d\n", __func__, i); ++ } ++ } ++#endif // !ANDROID_2X ++ ++ return ret; ++} ++ ++void platform_wifi_power_off(void) ++{ ++ /* Pull down pwd pin, make wifi enter power down mode. */ ++ rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_OFF); ++ rtw_mdelay_os(5); ++ rtw_wifi_gpio_deinit(); ++ ++#ifdef CONFIG_RTL8188E ++ rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_OFF); ++#endif // CONFIG_RTL8188E ++ ++#ifdef CONFIG_WOWLAN ++ if(mmc_host) ++ mmc_host->pm_flags &= ~MMC_PM_KEEP_POWER; ++#endif // CONFIG_WOWLAN ++} diff --git a/patch/kernel/rockchip-default/120_workaround_tinker_board_reboot.patch b/patch/kernel/rockchip-default/120_workaround_tinker_board_reboot.patch new file mode 100644 index 000000000..f4c1209c1 --- /dev/null +++ b/patch/kernel/rockchip-default/120_workaround_tinker_board_reboot.patch @@ -0,0 +1,44 @@ +diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c +index 29e3ae9..7f35aa4 100644 +--- a/drivers/mmc/host/dw_mmc-rockchip.c ++++ b/drivers/mmc/host/dw_mmc-rockchip.c +@@ -13,7 +13,9 @@ + #include + #include + #include ++#include + #include ++#include + + #include "dw_mmc.h" + #include "dw_mmc-pltfm.h" +@@ -285,6 +287,21 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev) + return dw_mci_pltfm_register(pdev, drv_data); + } + ++static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev) ++{ ++ struct dw_mci *host = platform_get_drvdata(pdev); ++ struct mmc_host *mmc = host->cur_slot->mmc; ++ int ret; ++ ++ mdelay(20); ++ ++ if (!IS_ERR(mmc->supply.vmmc)) ++ ret = regulator_enable(mmc->supply.vmmc); ++ ++ if (!IS_ERR(mmc->supply.vqmmc)) ++ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000); ++} ++ + #ifdef CONFIG_PM_SLEEP + static int dw_mci_rockchip_suspend(struct device *dev) + { +@@ -308,6 +325,7 @@ static SIMPLE_DEV_PM_OPS(dw_mci_rockchip_pmops, + static struct platform_driver dw_mci_rockchip_pltfm_driver = { + .probe = dw_mci_rockchip_probe, + .remove = dw_mci_pltfm_remove, ++ .shutdown = dw_mci_rockchip_platfm_shutdown, + .driver = { + .name = "dwmmc_rockchip", + .of_match_table = dw_mci_rockchip_match, diff --git a/patch/kernel/rockchip-default/130_Clk_RK3288_assignment_fixes.patch b/patch/kernel/rockchip-default/130_Clk_RK3288_assignment_fixes.patch new file mode 100644 index 000000000..b7509579c --- /dev/null +++ b/patch/kernel/rockchip-default/130_Clk_RK3288_assignment_fixes.patch @@ -0,0 +1,55 @@ +diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c +index 07469dc..adff1a3 100644 +--- a/drivers/clk/rockchip/clk-rk3288.c ++++ b/drivers/clk/rockchip/clk-rk3288.c +@@ -291,13 +291,13 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { + COMPOSITE_NOMUX(0, "aclk_core_mp", "armclk", CLK_IGNORE_UNUSED, + RK3288_CLKSEL_CON(0), 4, 4, DFLAGS | CLK_DIVIDER_READ_ONLY, + RK3288_CLKGATE_CON(12), 6, GFLAGS), +- COMPOSITE_NOMUX(0, "atclk", "armclk", 0, ++ COMPOSITE_NOMUX(0, "atclk", "armclk", CLK_IGNORE_UNUSED, + RK3288_CLKSEL_CON(37), 4, 5, DFLAGS | CLK_DIVIDER_READ_ONLY, + RK3288_CLKGATE_CON(12), 7, GFLAGS), + COMPOSITE_NOMUX(0, "pclk_dbg_pre", "armclk", CLK_IGNORE_UNUSED, + RK3288_CLKSEL_CON(37), 9, 5, DFLAGS | CLK_DIVIDER_READ_ONLY, + RK3288_CLKGATE_CON(12), 8, GFLAGS), +- GATE(0, "pclk_dbg", "pclk_dbg_pre", 0, ++ GATE(0, "pclk_dbg", "pclk_dbg_pre", CLK_IGNORE_UNUSED, + RK3288_CLKGATE_CON(12), 9, GFLAGS), + GATE(0, "cs_dbg", "pclk_dbg_pre", CLK_IGNORE_UNUSED, + RK3288_CLKGATE_CON(12), 10, GFLAGS), +@@ -627,7 +627,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { + INVERTER(SCLK_HSADC, "sclk_hsadc", "sclk_hsadc_out", + RK3288_CLKSEL_CON(22), 7, IFLAGS), + +- GATE(0, "jtag", "ext_jtag", 0, ++ GATE(0, "jtag", "ext_jtag", CLK_IGNORE_UNUSED, + RK3288_CLKGATE_CON(4), 14, GFLAGS), + + COMPOSITE_NODIV(SCLK_USBPHY480M_SRC, "usbphy480m_src", mux_usbphy480m_p, 0, +@@ -636,7 +636,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { + COMPOSITE_NODIV(SCLK_HSICPHY480M, "sclk_hsicphy480m", mux_hsicphy480m_p, 0, + RK3288_CLKSEL_CON(29), 0, 2, MFLAGS, + RK3288_CLKGATE_CON(3), 6, GFLAGS), +- GATE(0, "hsicphy12m_xin12m", "xin12m", 0, ++ GATE(0, "hsicphy12m_xin12m", "xin12m", CLK_IGNORE_UNUSED, + RK3288_CLKGATE_CON(13), 9, GFLAGS), + DIV(0, "hsicphy12m_usbphy", "sclk_hsicphy480m", 0, + RK3288_CLKSEL_CON(11), 8, 6, DFLAGS), +@@ -809,7 +809,15 @@ static const char *const rk3288_critical_clocks[] __initconst = { + "aclk_cpu", + "aclk_peri", + "hclk_peri", +- "pclk_pd_pmu", ++ "pclk_alive_niu", ++ "pclk_pd_pmu", ++ "pclk_pmu_niu", ++ "pclk_core_niu", ++ "pclk_ddrupctl0", ++ "pclk_publ0", ++ "pclk_ddrupctl1", ++ "pclk_publ1", ++ "pmu_hclk_otg0" + }; + + static void __iomem *rk3288_cru_base;